Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 34
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 86
1 00:22:36.530247 lava-dispatcher, installed at version: 2024.03
2 00:22:36.530473 start: 0 validate
3 00:22:36.530622 Start time: 2024-06-21 00:22:36.530614+00:00 (UTC)
4 00:22:36.530757 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:22:36.530902 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 00:22:36.792018 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:22:36.792215 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 00:22:37.043655 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:22:37.043862 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 00:22:37.298562 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:22:37.298751 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 00:22:37.808026 validate duration: 1.28
14 00:22:37.808347 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 00:22:37.808475 start: 1.1 download-retry (timeout 00:10:00) [common]
16 00:22:37.808587 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 00:22:37.808739 Not decompressing ramdisk as can be used compressed.
18 00:22:37.808833 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 00:22:37.808904 saving as /var/lib/lava/dispatcher/tmp/14479163/tftp-deploy-s99zyal3/ramdisk/rootfs.cpio.gz
20 00:22:37.808977 total size: 8181887 (7 MB)
21 00:22:37.810160 progress 0 % (0 MB)
22 00:22:37.812759 progress 5 % (0 MB)
23 00:22:37.815083 progress 10 % (0 MB)
24 00:22:37.817580 progress 15 % (1 MB)
25 00:22:37.819881 progress 20 % (1 MB)
26 00:22:37.822349 progress 25 % (1 MB)
27 00:22:37.824645 progress 30 % (2 MB)
28 00:22:37.827130 progress 35 % (2 MB)
29 00:22:37.829437 progress 40 % (3 MB)
30 00:22:37.831906 progress 45 % (3 MB)
31 00:22:37.834214 progress 50 % (3 MB)
32 00:22:37.836677 progress 55 % (4 MB)
33 00:22:37.838927 progress 60 % (4 MB)
34 00:22:37.841364 progress 65 % (5 MB)
35 00:22:37.843609 progress 70 % (5 MB)
36 00:22:37.846065 progress 75 % (5 MB)
37 00:22:37.848350 progress 80 % (6 MB)
38 00:22:37.850803 progress 85 % (6 MB)
39 00:22:37.853062 progress 90 % (7 MB)
40 00:22:37.855587 progress 95 % (7 MB)
41 00:22:37.857868 progress 100 % (7 MB)
42 00:22:37.858095 7 MB downloaded in 0.05 s (158.86 MB/s)
43 00:22:37.858268 end: 1.1.1 http-download (duration 00:00:00) [common]
45 00:22:37.858533 end: 1.1 download-retry (duration 00:00:00) [common]
46 00:22:37.858628 start: 1.2 download-retry (timeout 00:10:00) [common]
47 00:22:37.858720 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 00:22:37.858887 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 00:22:37.858998 saving as /var/lib/lava/dispatcher/tmp/14479163/tftp-deploy-s99zyal3/kernel/Image
50 00:22:37.859076 total size: 54813184 (52 MB)
51 00:22:37.859145 No compression specified
52 00:22:37.860356 progress 0 % (0 MB)
53 00:22:37.875782 progress 5 % (2 MB)
54 00:22:37.891639 progress 10 % (5 MB)
55 00:22:37.907136 progress 15 % (7 MB)
56 00:22:37.922758 progress 20 % (10 MB)
57 00:22:37.938378 progress 25 % (13 MB)
58 00:22:37.953648 progress 30 % (15 MB)
59 00:22:37.969378 progress 35 % (18 MB)
60 00:22:37.985025 progress 40 % (20 MB)
61 00:22:38.000438 progress 45 % (23 MB)
62 00:22:38.016076 progress 50 % (26 MB)
63 00:22:38.031672 progress 55 % (28 MB)
64 00:22:38.047033 progress 60 % (31 MB)
65 00:22:38.062631 progress 65 % (34 MB)
66 00:22:38.078059 progress 70 % (36 MB)
67 00:22:38.094059 progress 75 % (39 MB)
68 00:22:38.109624 progress 80 % (41 MB)
69 00:22:38.124945 progress 85 % (44 MB)
70 00:22:38.140564 progress 90 % (47 MB)
71 00:22:38.156034 progress 95 % (49 MB)
72 00:22:38.171292 progress 100 % (52 MB)
73 00:22:38.171579 52 MB downloaded in 0.31 s (167.28 MB/s)
74 00:22:38.171750 end: 1.2.1 http-download (duration 00:00:00) [common]
76 00:22:38.172007 end: 1.2 download-retry (duration 00:00:00) [common]
77 00:22:38.172103 start: 1.3 download-retry (timeout 00:10:00) [common]
78 00:22:38.172195 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 00:22:38.172345 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 00:22:38.172422 saving as /var/lib/lava/dispatcher/tmp/14479163/tftp-deploy-s99zyal3/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 00:22:38.172490 total size: 57695 (0 MB)
82 00:22:38.172559 No compression specified
83 00:22:38.173806 progress 56 % (0 MB)
84 00:22:38.174121 progress 100 % (0 MB)
85 00:22:38.174346 0 MB downloaded in 0.00 s (29.70 MB/s)
86 00:22:38.174497 end: 1.3.1 http-download (duration 00:00:00) [common]
88 00:22:38.174756 end: 1.3 download-retry (duration 00:00:00) [common]
89 00:22:38.174851 start: 1.4 download-retry (timeout 00:10:00) [common]
90 00:22:38.174941 start: 1.4.1 http-download (timeout 00:10:00) [common]
91 00:22:38.175068 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 00:22:38.175144 saving as /var/lib/lava/dispatcher/tmp/14479163/tftp-deploy-s99zyal3/modules/modules.tar
93 00:22:38.175209 total size: 8618924 (8 MB)
94 00:22:38.175276 Using unxz to decompress xz
95 00:22:38.180046 progress 0 % (0 MB)
96 00:22:38.202300 progress 5 % (0 MB)
97 00:22:38.229505 progress 10 % (0 MB)
98 00:22:38.258005 progress 15 % (1 MB)
99 00:22:38.285595 progress 20 % (1 MB)
100 00:22:38.314102 progress 25 % (2 MB)
101 00:22:38.342110 progress 30 % (2 MB)
102 00:22:38.370243 progress 35 % (2 MB)
103 00:22:38.397382 progress 40 % (3 MB)
104 00:22:38.424816 progress 45 % (3 MB)
105 00:22:38.451627 progress 50 % (4 MB)
106 00:22:38.479420 progress 55 % (4 MB)
107 00:22:38.507037 progress 60 % (4 MB)
108 00:22:38.533663 progress 65 % (5 MB)
109 00:22:38.566027 progress 70 % (5 MB)
110 00:22:38.594602 progress 75 % (6 MB)
111 00:22:38.621491 progress 80 % (6 MB)
112 00:22:38.647772 progress 85 % (7 MB)
113 00:22:38.674348 progress 90 % (7 MB)
114 00:22:38.706144 progress 95 % (7 MB)
115 00:22:38.740244 progress 100 % (8 MB)
116 00:22:38.745379 8 MB downloaded in 0.57 s (14.42 MB/s)
117 00:22:38.745668 end: 1.4.1 http-download (duration 00:00:01) [common]
119 00:22:38.745979 end: 1.4 download-retry (duration 00:00:01) [common]
120 00:22:38.746084 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 00:22:38.746187 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 00:22:38.746279 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 00:22:38.746375 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 00:22:38.746629 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w
125 00:22:38.746782 makedir: /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin
126 00:22:38.746899 makedir: /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/tests
127 00:22:38.747011 makedir: /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/results
128 00:22:38.747137 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-add-keys
129 00:22:38.747306 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-add-sources
130 00:22:38.747451 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-background-process-start
131 00:22:38.747596 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-background-process-stop
132 00:22:38.747788 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-common-functions
133 00:22:38.747937 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-echo-ipv4
134 00:22:38.748078 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-install-packages
135 00:22:38.748218 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-installed-packages
136 00:22:38.748355 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-os-build
137 00:22:38.748492 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-probe-channel
138 00:22:38.748628 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-probe-ip
139 00:22:38.748763 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-target-ip
140 00:22:38.748898 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-target-mac
141 00:22:38.749032 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-target-storage
142 00:22:38.749174 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-test-case
143 00:22:38.749314 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-test-event
144 00:22:38.749461 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-test-feedback
145 00:22:38.749601 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-test-raise
146 00:22:38.749738 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-test-reference
147 00:22:38.749875 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-test-runner
148 00:22:38.750011 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-test-set
149 00:22:38.750150 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-test-shell
150 00:22:38.750292 Updating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-install-packages (oe)
151 00:22:38.750460 Updating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/bin/lava-installed-packages (oe)
152 00:22:38.750596 Creating /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/environment
153 00:22:38.750707 LAVA metadata
154 00:22:38.750789 - LAVA_JOB_ID=14479163
155 00:22:38.750860 - LAVA_DISPATCHER_IP=192.168.201.1
156 00:22:38.750974 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 00:22:38.751047 skipped lava-vland-overlay
158 00:22:38.751128 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 00:22:38.751220 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 00:22:38.751291 skipped lava-multinode-overlay
161 00:22:38.751369 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 00:22:38.751475 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 00:22:38.751557 Loading test definitions
164 00:22:38.751657 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 00:22:38.751738 Using /lava-14479163 at stage 0
166 00:22:38.752096 uuid=14479163_1.5.2.3.1 testdef=None
167 00:22:38.752196 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 00:22:38.752292 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 00:22:38.752886 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 00:22:38.753138 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 00:22:38.753859 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 00:22:38.754116 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 00:22:38.754798 runner path: /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/0/tests/0_dmesg test_uuid 14479163_1.5.2.3.1
176 00:22:38.754975 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 00:22:38.755207 Creating lava-test-runner.conf files
179 00:22:38.755276 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14479163/lava-overlay-ukre0y8w/lava-14479163/0 for stage 0
180 00:22:38.755374 - 0_dmesg
181 00:22:38.755483 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 00:22:38.755577 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 00:22:38.763687 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 00:22:38.763855 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 00:22:38.763960 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 00:22:38.764056 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 00:22:38.764149 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 00:22:39.031338 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
189 00:22:39.031747 start: 1.5.4 extract-modules (timeout 00:09:59) [common]
190 00:22:39.031877 extracting modules file /var/lib/lava/dispatcher/tmp/14479163/tftp-deploy-s99zyal3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14479163/extract-overlay-ramdisk-j8fehnyq/ramdisk
191 00:22:39.269020 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 00:22:39.269210 start: 1.5.5 apply-overlay-tftp (timeout 00:09:59) [common]
193 00:22:39.269315 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14479163/compress-overlay-rs9qadq1/overlay-1.5.2.4.tar.gz to ramdisk
194 00:22:39.269393 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14479163/compress-overlay-rs9qadq1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14479163/extract-overlay-ramdisk-j8fehnyq/ramdisk
195 00:22:39.276736 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 00:22:39.276863 start: 1.5.6 configure-preseed-file (timeout 00:09:59) [common]
197 00:22:39.276962 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 00:22:39.277067 start: 1.5.7 compress-ramdisk (timeout 00:09:59) [common]
199 00:22:39.277155 Building ramdisk /var/lib/lava/dispatcher/tmp/14479163/extract-overlay-ramdisk-j8fehnyq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14479163/extract-overlay-ramdisk-j8fehnyq/ramdisk
200 00:22:39.692299 >> 145269 blocks
201 00:22:42.211037 rename /var/lib/lava/dispatcher/tmp/14479163/extract-overlay-ramdisk-j8fehnyq/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14479163/tftp-deploy-s99zyal3/ramdisk/ramdisk.cpio.gz
202 00:22:42.211521 end: 1.5.7 compress-ramdisk (duration 00:00:03) [common]
203 00:22:42.211667 start: 1.5.8 prepare-kernel (timeout 00:09:56) [common]
204 00:22:42.211928 start: 1.5.8.1 prepare-fit (timeout 00:09:56) [common]
205 00:22:42.212083 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14479163/tftp-deploy-s99zyal3/kernel/Image']
206 00:22:56.442558 Returned 0 in 14 seconds
207 00:22:56.543237 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14479163/tftp-deploy-s99zyal3/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14479163/tftp-deploy-s99zyal3/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14479163/tftp-deploy-s99zyal3/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14479163/tftp-deploy-s99zyal3/kernel/image.itb
208 00:22:56.980737 output: FIT description: Kernel Image image with one or more FDT blobs
209 00:22:56.981134 output: Created: Fri Jun 21 01:22:56 2024
210 00:22:56.981213 output: Image 0 (kernel-1)
211 00:22:56.981284 output: Description:
212 00:22:56.981353 output: Created: Fri Jun 21 01:22:56 2024
213 00:22:56.981419 output: Type: Kernel Image
214 00:22:56.981493 output: Compression: lzma compressed
215 00:22:56.981558 output: Data Size: 13124896 Bytes = 12817.28 KiB = 12.52 MiB
216 00:22:56.981623 output: Architecture: AArch64
217 00:22:56.981689 output: OS: Linux
218 00:22:56.981754 output: Load Address: 0x00000000
219 00:22:56.981821 output: Entry Point: 0x00000000
220 00:22:56.981885 output: Hash algo: crc32
221 00:22:56.981949 output: Hash value: ab2f7826
222 00:22:56.982012 output: Image 1 (fdt-1)
223 00:22:56.982073 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 00:22:56.982134 output: Created: Fri Jun 21 01:22:56 2024
225 00:22:56.982197 output: Type: Flat Device Tree
226 00:22:56.982261 output: Compression: uncompressed
227 00:22:56.982348 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 00:22:56.982432 output: Architecture: AArch64
229 00:22:56.982515 output: Hash algo: crc32
230 00:22:56.982597 output: Hash value: a9713552
231 00:22:56.982678 output: Image 2 (ramdisk-1)
232 00:22:56.982759 output: Description: unavailable
233 00:22:56.982861 output: Created: Fri Jun 21 01:22:56 2024
234 00:22:56.982963 output: Type: RAMDisk Image
235 00:22:56.983064 output: Compression: Unknown Compression
236 00:22:56.983165 output: Data Size: 21384683 Bytes = 20883.48 KiB = 20.39 MiB
237 00:22:56.983267 output: Architecture: AArch64
238 00:22:56.983369 output: OS: Linux
239 00:22:56.983470 output: Load Address: unavailable
240 00:22:56.983570 output: Entry Point: unavailable
241 00:22:56.983671 output: Hash algo: crc32
242 00:22:56.983771 output: Hash value: 1bd1d523
243 00:22:56.983872 output: Default Configuration: 'conf-1'
244 00:22:56.983973 output: Configuration 0 (conf-1)
245 00:22:56.984073 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 00:22:56.984174 output: Kernel: kernel-1
247 00:22:56.984275 output: Init Ramdisk: ramdisk-1
248 00:22:56.984375 output: FDT: fdt-1
249 00:22:56.984476 output: Loadables: kernel-1
250 00:22:56.984575 output:
251 00:22:56.984858 end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
252 00:22:56.985013 end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
253 00:22:56.985173 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
254 00:22:56.985326 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:41) [common]
255 00:22:56.985461 No LXC device requested
256 00:22:56.985600 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 00:22:56.985745 start: 1.7 deploy-device-env (timeout 00:09:41) [common]
258 00:22:56.985875 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 00:22:56.985991 Checking files for TFTP limit of 4294967296 bytes.
260 00:22:56.986732 end: 1 tftp-deploy (duration 00:00:19) [common]
261 00:22:56.986894 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 00:22:56.987040 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 00:22:56.987233 substitutions:
264 00:22:56.987341 - {DTB}: 14479163/tftp-deploy-s99zyal3/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 00:22:56.987453 - {INITRD}: 14479163/tftp-deploy-s99zyal3/ramdisk/ramdisk.cpio.gz
266 00:22:56.987562 - {KERNEL}: 14479163/tftp-deploy-s99zyal3/kernel/Image
267 00:22:56.987669 - {LAVA_MAC}: None
268 00:22:56.987776 - {PRESEED_CONFIG}: None
269 00:22:56.987881 - {PRESEED_LOCAL}: None
270 00:22:56.987985 - {RAMDISK}: 14479163/tftp-deploy-s99zyal3/ramdisk/ramdisk.cpio.gz
271 00:22:56.988089 - {ROOT_PART}: None
272 00:22:56.988192 - {ROOT}: None
273 00:22:56.988295 - {SERVER_IP}: 192.168.201.1
274 00:22:56.988399 - {TEE}: None
275 00:22:56.988502 Parsed boot commands:
276 00:22:56.988604 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 00:22:56.988920 Parsed boot commands: tftpboot 192.168.201.1 14479163/tftp-deploy-s99zyal3/kernel/image.itb 14479163/tftp-deploy-s99zyal3/kernel/cmdline
278 00:22:56.989061 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 00:22:56.989207 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 00:22:56.989356 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 00:22:56.989507 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 00:22:56.989630 Not connected, no need to disconnect.
283 00:22:56.989761 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 00:22:56.989899 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 00:22:56.990011 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-2'
286 00:22:56.994149 Setting prompt string to ['lava-test: # ']
287 00:22:56.994574 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 00:22:56.994707 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 00:22:56.994834 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 00:22:56.994951 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 00:22:56.995169 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-2']
292 00:23:07.121707 Returned 0 in 10 seconds
293 00:23:07.222738 end: 2.2.2.1 pdu-reboot (duration 00:00:10) [common]
295 00:23:07.223108 end: 2.2.2 reset-device (duration 00:00:10) [common]
296 00:23:07.223244 start: 2.2.3 depthcharge-start (timeout 00:04:50) [common]
297 00:23:07.223355 Setting prompt string to 'Starting depthcharge on Juniper...'
298 00:23:07.223445 Changing prompt to 'Starting depthcharge on Juniper...'
299 00:23:07.223543 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 00:23:07.224162 [Enter `^Ec?' for help]
301 00:23:07.224289 [DL] 00000000 00000000 010701
302 00:23:07.224404
303 00:23:07.224515
304 00:23:07.224625 F0: 102B 0000
305 00:23:07.224734
306 00:23:07.224843 F3: 1006 0033 [0200]
307 00:23:07.224951
308 00:23:07.225058 F3: 4001 00E0 [0200]
309 00:23:07.225167
310 00:23:07.225272 F3: 0000 0000
311 00:23:07.225377
312 00:23:07.225491 V0: 0000 0000 [0001]
313 00:23:07.225596
314 00:23:07.225700 00: 1027 0002
315 00:23:07.225809
316 00:23:07.225913 01: 0000 0000
317 00:23:07.226020
318 00:23:07.226123 BP: 0C00 0251 [0000]
319 00:23:07.226226
320 00:23:07.226329 G0: 1182 0000
321 00:23:07.226433
322 00:23:07.226536 EC: 0004 0000 [0001]
323 00:23:07.226638
324 00:23:07.226741 S7: 0000 0000 [0000]
325 00:23:07.226843
326 00:23:07.226946 CC: 0000 0000 [0001]
327 00:23:07.227049
328 00:23:07.227152 T0: 0000 00DB [000F]
329 00:23:07.227254
330 00:23:07.227356 Jump to BL
331 00:23:07.227459
332 00:23:07.227560
333 00:23:07.227662
334 00:23:07.227763 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 00:23:07.227870 ARM64: Exception handlers installed.
336 00:23:07.227973 ARM64: Testing exception
337 00:23:07.228074 ARM64: Done test exception
338 00:23:07.228176 WDT: Last reset was cold boot
339 00:23:07.228279 SPI0(PAD0) initialized at 992727 Hz
340 00:23:07.228381 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 00:23:07.228484 Manufacturer: ef
342 00:23:07.228597 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 00:23:07.228702 Probing TPM: . done!
344 00:23:07.228805 TPM ready after 0 ms
345 00:23:07.228909 Connected to device vid:did:rid of 1ae0:0028:00
346 00:23:07.229012 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-afa1dd1
347 00:23:07.229117 Initialized TPM device CR50 revision 0
348 00:23:07.229220 tlcl_send_startup: Startup return code is 0
349 00:23:07.229323 TPM: setup succeeded
350 00:23:07.229427 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 00:23:07.229537 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 00:23:07.229644 in-header: 03 19 00 00 08 00 00 00
353 00:23:07.229747 in-data: a2 e0 47 00 13 00 00 00
354 00:23:07.229850 Chrome EC: UHEPI supported
355 00:23:07.229952 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 00:23:07.230056 in-header: 03 a1 00 00 08 00 00 00
357 00:23:07.230158 in-data: 84 60 60 10 00 00 00 00
358 00:23:07.230260 Phase 1
359 00:23:07.230362 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 00:23:07.230465 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 00:23:07.230568 VB2:vb2_check_recovery() Recovery was requested manually
362 00:23:07.230670 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 00:23:07.230772 Recovery requested (1009000e)
364 00:23:07.230875 tlcl_extend: response is 0
365 00:23:07.230977 tlcl_extend: response is 0
366 00:23:07.231080
367 00:23:07.231184
368 00:23:07.231287 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 00:23:07.231390 ARM64: Exception handlers installed.
370 00:23:07.231493 ARM64: Testing exception
371 00:23:07.231596 ARM64: Done test exception
372 00:23:07.231698 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x926b, sec=0x2038
373 00:23:07.231800 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 00:23:07.231904 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 00:23:07.232006 [RTC]rtc_get_frequency_meter,134: input=0xf, output=863
376 00:23:07.232108 [RTC]rtc_get_frequency_meter,134: input=0x7, output=734
377 00:23:07.232210 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
378 00:23:07.232312 [RTC]rtc_get_frequency_meter,134: input=0x9, output=765
379 00:23:07.232414 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
380 00:23:07.232516 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
381 00:23:07.232618 [RTC]rtc_get_frequency_meter,134: input=0xb, output=798
382 00:23:07.232729 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x926b
383 00:23:07.232834 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
384 00:23:07.232937 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
385 00:23:07.233041 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
386 00:23:07.233144 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
387 00:23:07.233247 in-header: 03 19 00 00 08 00 00 00
388 00:23:07.233350 in-data: a2 e0 47 00 13 00 00 00
389 00:23:07.233460 Chrome EC: UHEPI supported
390 00:23:07.233564 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
391 00:23:07.233669 in-header: 03 a1 00 00 08 00 00 00
392 00:23:07.233772 in-data: 84 60 60 10 00 00 00 00
393 00:23:07.233875 Skip loading cached calibration data
394 00:23:07.233978 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
395 00:23:07.234081 in-header: 03 a1 00 00 08 00 00 00
396 00:23:07.234184 in-data: 84 60 60 10 00 00 00 00
397 00:23:07.234286 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
398 00:23:07.234389 in-header: 03 a1 00 00 08 00 00 00
399 00:23:07.234491 in-data: 84 60 60 10 00 00 00 00
400 00:23:07.234593 ADC[3]: Raw value=215404 ID=1
401 00:23:07.234695 Manufacturer: ef
402 00:23:07.234798 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
403 00:23:07.234900 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
404 00:23:07.235003 CBFS @ 21000 size 3d4000
405 00:23:07.235106 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
406 00:23:07.235209 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
407 00:23:07.235312 CBFS: Found @ offset 3c700 size 44
408 00:23:07.235414 DRAM-K: Full Calibration
409 00:23:07.235515 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
410 00:23:07.235618 CBFS @ 21000 size 3d4000
411 00:23:07.235723 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
412 00:23:07.235825 CBFS: Locating 'fallback/dram'
413 00:23:07.235928 CBFS: Found @ offset 24b00 size 12268
414 00:23:07.236030 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
415 00:23:07.236133 ddr_geometry: 1, config: 0x0
416 00:23:07.236235 header.status = 0x0
417 00:23:07.236337 header.magic = 0x44524d4b (expected: 0x44524d4b)
418 00:23:07.236439 header.version = 0x5 (expected: 0x5)
419 00:23:07.236738 header.size = 0x8f0 (expected: 0x8f0)
420 00:23:07.236843 header.config = 0x0
421 00:23:07.236950 header.flags = 0x0
422 00:23:07.237055 header.checksum = 0x0
423 00:23:07.237169 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
424 00:23:07.237276 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
425 00:23:07.237382 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
426 00:23:07.237483 ddr_geometry:1
427 00:23:07.237568 [EMI] new MDL number = 1
428 00:23:07.237651 dram_cbt_mode_extern: 0
429 00:23:07.237755 dram_cbt_mode [RK0]: 0, [RK1]: 0
430 00:23:07.237858 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
431 00:23:07.237962
432 00:23:07.238064
433 00:23:07.238167 [Bianco] ETT version 0.0.0.1
434 00:23:07.238269 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
435 00:23:07.238372
436 00:23:07.238473 vSetVcoreByFreq with vcore:762500, freq=1600
437 00:23:07.238578
438 00:23:07.238680 [DramcInit]
439 00:23:07.238783 AutoRefreshCKEOff AutoREF OFF
440 00:23:07.238885 DDRPhyPLLSetting-CKEOFF
441 00:23:07.238987 DDRPhyPLLSetting-CKEON
442 00:23:07.239088
443 00:23:07.239189 Enable WDQS
444 00:23:07.239290 [ModeRegInit_LP4] CH0 RK0
445 00:23:07.239392 Write Rank0 MR13 =0x18
446 00:23:07.239493 Write Rank0 MR12 =0x5d
447 00:23:07.239595 Write Rank0 MR1 =0x56
448 00:23:07.239697 Write Rank0 MR2 =0x1a
449 00:23:07.239798 Write Rank0 MR11 =0x0
450 00:23:07.239899 Write Rank0 MR22 =0x38
451 00:23:07.240001 Write Rank0 MR14 =0x5d
452 00:23:07.240102 Write Rank0 MR3 =0x30
453 00:23:07.240203 Write Rank0 MR13 =0x58
454 00:23:07.240303 Write Rank0 MR12 =0x5d
455 00:23:07.240404 Write Rank0 MR1 =0x56
456 00:23:07.240505 Write Rank0 MR2 =0x2d
457 00:23:07.240606 Write Rank0 MR11 =0x23
458 00:23:07.240707 Write Rank0 MR22 =0x34
459 00:23:07.240808 Write Rank0 MR14 =0x10
460 00:23:07.240910 Write Rank0 MR3 =0x30
461 00:23:07.241012 Write Rank0 MR13 =0xd8
462 00:23:07.241113 [ModeRegInit_LP4] CH0 RK1
463 00:23:07.241214 Write Rank1 MR13 =0x18
464 00:23:07.241316 Write Rank1 MR12 =0x5d
465 00:23:07.241417 Write Rank1 MR1 =0x56
466 00:23:07.241530 Write Rank1 MR2 =0x1a
467 00:23:07.241633 Write Rank1 MR11 =0x0
468 00:23:07.241753 Write Rank1 MR22 =0x38
469 00:23:07.241873 Write Rank1 MR14 =0x5d
470 00:23:07.241975 Write Rank1 MR3 =0x30
471 00:23:07.242071 Write Rank1 MR13 =0x58
472 00:23:07.242165 Write Rank1 MR12 =0x5d
473 00:23:07.242258 Write Rank1 MR1 =0x56
474 00:23:07.242350 Write Rank1 MR2 =0x2d
475 00:23:07.242442 Write Rank1 MR11 =0x23
476 00:23:07.242548 Write Rank1 MR22 =0x34
477 00:23:07.242653 Write Rank1 MR14 =0x10
478 00:23:07.242748 Write Rank1 MR3 =0x30
479 00:23:07.242840 Write Rank1 MR13 =0xd8
480 00:23:07.242933 [ModeRegInit_LP4] CH1 RK0
481 00:23:07.243026 Write Rank0 MR13 =0x18
482 00:23:07.243118 Write Rank0 MR12 =0x5d
483 00:23:07.243210 Write Rank0 MR1 =0x56
484 00:23:07.243302 Write Rank0 MR2 =0x1a
485 00:23:07.243394 Write Rank0 MR11 =0x0
486 00:23:07.243486 Write Rank0 MR22 =0x38
487 00:23:07.243581 Write Rank0 MR14 =0x5d
488 00:23:07.243673 Write Rank0 MR3 =0x30
489 00:23:07.243764 Write Rank0 MR13 =0x58
490 00:23:07.243856 Write Rank0 MR12 =0x5d
491 00:23:07.243948 Write Rank0 MR1 =0x56
492 00:23:07.244039 Write Rank0 MR2 =0x2d
493 00:23:07.244131 Write Rank0 MR11 =0x23
494 00:23:07.244222 Write Rank0 MR22 =0x34
495 00:23:07.244314 Write Rank0 MR14 =0x10
496 00:23:07.244405 Write Rank0 MR3 =0x30
497 00:23:07.244497 Write Rank0 MR13 =0xd8
498 00:23:07.244588 [ModeRegInit_LP4] CH1 RK1
499 00:23:07.244680 Write Rank1 MR13 =0x18
500 00:23:07.244771 Write Rank1 MR12 =0x5d
501 00:23:07.244863 Write Rank1 MR1 =0x56
502 00:23:07.244954 Write Rank1 MR2 =0x1a
503 00:23:07.245046 Write Rank1 MR11 =0x0
504 00:23:07.245138 Write Rank1 MR22 =0x38
505 00:23:07.245229 Write Rank1 MR14 =0x5d
506 00:23:07.245321 Write Rank1 MR3 =0x30
507 00:23:07.245413 Write Rank1 MR13 =0x58
508 00:23:07.245490 Write Rank1 MR12 =0x5d
509 00:23:07.245551 Write Rank1 MR1 =0x56
510 00:23:07.245609 Write Rank1 MR2 =0x2d
511 00:23:07.245668 Write Rank1 MR11 =0x23
512 00:23:07.245727 Write Rank1 MR22 =0x34
513 00:23:07.245787 Write Rank1 MR14 =0x10
514 00:23:07.245846 Write Rank1 MR3 =0x30
515 00:23:07.245905 Write Rank1 MR13 =0xd8
516 00:23:07.245965 match AC timing 3
517 00:23:07.246024 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
518 00:23:07.246085 [MiockJmeterHQA]
519 00:23:07.246165 vSetVcoreByFreq with vcore:762500, freq=1600
520 00:23:07.246228
521 00:23:07.246289 MIOCK jitter meter ch=0
522 00:23:07.246347
523 00:23:07.246406 1T = (102-18) = 84 dly cells
524 00:23:07.246467 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 744/100 ps
525 00:23:07.246527 vSetVcoreByFreq with vcore:725000, freq=1200
526 00:23:07.246587
527 00:23:07.246645 MIOCK jitter meter ch=0
528 00:23:07.246704
529 00:23:07.246763 1T = (97-17) = 80 dly cells
530 00:23:07.246823 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
531 00:23:07.246882 vSetVcoreByFreq with vcore:725000, freq=800
532 00:23:07.246941
533 00:23:07.247000 MIOCK jitter meter ch=0
534 00:23:07.247059
535 00:23:07.247117 1T = (97-17) = 80 dly cells
536 00:23:07.247177 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
537 00:23:07.247236 vSetVcoreByFreq with vcore:762500, freq=1600
538 00:23:07.247296 vSetVcoreByFreq with vcore:762500, freq=1600
539 00:23:07.247355
540 00:23:07.247414 K DRVP
541 00:23:07.247472 1. OCD DRVP=0 CALOUT=0
542 00:23:07.247535 1. OCD DRVP=1 CALOUT=0
543 00:23:07.247596 1. OCD DRVP=2 CALOUT=0
544 00:23:07.247656 1. OCD DRVP=3 CALOUT=0
545 00:23:07.247715 1. OCD DRVP=4 CALOUT=0
546 00:23:07.247775 1. OCD DRVP=5 CALOUT=0
547 00:23:07.247835 1. OCD DRVP=6 CALOUT=0
548 00:23:07.247895 1. OCD DRVP=7 CALOUT=0
549 00:23:07.247955 1. OCD DRVP=8 CALOUT=1
550 00:23:07.248014
551 00:23:07.248073 1. OCD DRVP calibration OK! DRVP=8
552 00:23:07.248132
553 00:23:07.248190
554 00:23:07.248248
555 00:23:07.248306 K ODTN
556 00:23:07.248364 3. OCD ODTN=0 ,CALOUT=1
557 00:23:07.248427 3. OCD ODTN=1 ,CALOUT=1
558 00:23:07.248488 3. OCD ODTN=2 ,CALOUT=1
559 00:23:07.248548 3. OCD ODTN=3 ,CALOUT=1
560 00:23:07.248627 3. OCD ODTN=4 ,CALOUT=1
561 00:23:07.248689 3. OCD ODTN=5 ,CALOUT=1
562 00:23:07.248750 3. OCD ODTN=6 ,CALOUT=1
563 00:23:07.248810 3. OCD ODTN=7 ,CALOUT=0
564 00:23:07.248870
565 00:23:07.248929 3. OCD ODTN calibration OK! ODTN=7
566 00:23:07.248989
567 00:23:07.249048 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
568 00:23:07.249107 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
569 00:23:07.249167 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
570 00:23:07.249227
571 00:23:07.249286 K DRVP
572 00:23:07.249345 1. OCD DRVP=0 CALOUT=0
573 00:23:07.249405 1. OCD DRVP=1 CALOUT=0
574 00:23:07.249475 1. OCD DRVP=2 CALOUT=0
575 00:23:07.249536 1. OCD DRVP=3 CALOUT=0
576 00:23:07.249596 1. OCD DRVP=4 CALOUT=0
577 00:23:07.249656 1. OCD DRVP=5 CALOUT=0
578 00:23:07.249716 1. OCD DRVP=6 CALOUT=0
579 00:23:07.249777 1. OCD DRVP=7 CALOUT=0
580 00:23:07.249837 1. OCD DRVP=8 CALOUT=0
581 00:23:07.249897 1. OCD DRVP=9 CALOUT=0
582 00:23:07.249957 1. OCD DRVP=10 CALOUT=1
583 00:23:07.250017
584 00:23:07.250269 1. OCD DRVP calibration OK! DRVP=10
585 00:23:07.250341
586 00:23:07.250401
587 00:23:07.250461
588 00:23:07.250520 K ODTN
589 00:23:07.250602 3. OCD ODTN=0 ,CALOUT=1
590 00:23:07.250666 3. OCD ODTN=1 ,CALOUT=1
591 00:23:07.250727 3. OCD ODTN=2 ,CALOUT=1
592 00:23:07.250788 3. OCD ODTN=3 ,CALOUT=1
593 00:23:07.250848 3. OCD ODTN=4 ,CALOUT=1
594 00:23:07.250908 3. OCD ODTN=5 ,CALOUT=1
595 00:23:07.250968 3. OCD ODTN=6 ,CALOUT=1
596 00:23:07.251027 3. OCD ODTN=7 ,CALOUT=1
597 00:23:07.251087 3. OCD ODTN=8 ,CALOUT=1
598 00:23:07.251147 3. OCD ODTN=9 ,CALOUT=1
599 00:23:07.251207 3. OCD ODTN=10 ,CALOUT=1
600 00:23:07.251267 3. OCD ODTN=11 ,CALOUT=1
601 00:23:07.251327 3. OCD ODTN=12 ,CALOUT=1
602 00:23:07.251387 3. OCD ODTN=13 ,CALOUT=1
603 00:23:07.251447 3. OCD ODTN=14 ,CALOUT=1
604 00:23:07.251506 3. OCD ODTN=15 ,CALOUT=0
605 00:23:07.251566
606 00:23:07.251624 3. OCD ODTN calibration OK! ODTN=15
607 00:23:07.251684
608 00:23:07.251742 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
609 00:23:07.251802 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
610 00:23:07.251861 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
611 00:23:07.251921
612 00:23:07.251980 [DramcInit]
613 00:23:07.252038 AutoRefreshCKEOff AutoREF OFF
614 00:23:07.252097 DDRPhyPLLSetting-CKEOFF
615 00:23:07.252156 DDRPhyPLLSetting-CKEON
616 00:23:07.252214
617 00:23:07.252272 Enable WDQS
618 00:23:07.252331 ==
619 00:23:07.252390 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
620 00:23:07.252450 fsp= 1, odt_onoff= 1, Byte mode= 0
621 00:23:07.252510 ==
622 00:23:07.252568 [Duty_Offset_Calibration]
623 00:23:07.252627
624 00:23:07.252685 ===========================
625 00:23:07.252744 B0:1 B1:-1 CA:0
626 00:23:07.252803 ==
627 00:23:07.252862 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
628 00:23:07.252922 fsp= 1, odt_onoff= 1, Byte mode= 0
629 00:23:07.252981 ==
630 00:23:07.253040 [Duty_Offset_Calibration]
631 00:23:07.253099
632 00:23:07.253157 ===========================
633 00:23:07.253216 B0:1 B1:0 CA:0
634 00:23:07.253275 [ModeRegInit_LP4] CH0 RK0
635 00:23:07.253333 Write Rank0 MR13 =0x18
636 00:23:07.253391 Write Rank0 MR12 =0x5d
637 00:23:07.253460 Write Rank0 MR1 =0x56
638 00:23:07.253521 Write Rank0 MR2 =0x1a
639 00:23:07.253579 Write Rank0 MR11 =0x0
640 00:23:07.253638 Write Rank0 MR22 =0x38
641 00:23:07.253697 Write Rank0 MR14 =0x5d
642 00:23:07.253755 Write Rank0 MR3 =0x30
643 00:23:07.253813 Write Rank0 MR13 =0x58
644 00:23:07.253871 Write Rank0 MR12 =0x5d
645 00:23:07.253930 Write Rank0 MR1 =0x56
646 00:23:07.253989 Write Rank0 MR2 =0x2d
647 00:23:07.254047 Write Rank0 MR11 =0x23
648 00:23:07.254105 Write Rank0 MR22 =0x34
649 00:23:07.254164 Write Rank0 MR14 =0x10
650 00:23:07.254223 Write Rank0 MR3 =0x30
651 00:23:07.254281 Write Rank0 MR13 =0xd8
652 00:23:07.254339 [ModeRegInit_LP4] CH0 RK1
653 00:23:07.254398 Write Rank1 MR13 =0x18
654 00:23:07.254457 Write Rank1 MR12 =0x5d
655 00:23:07.254516 Write Rank1 MR1 =0x56
656 00:23:07.254574 Write Rank1 MR2 =0x1a
657 00:23:07.254632 Write Rank1 MR11 =0x0
658 00:23:07.254691 Write Rank1 MR22 =0x38
659 00:23:07.254749 Write Rank1 MR14 =0x5d
660 00:23:07.254829 Write Rank1 MR3 =0x30
661 00:23:07.254891 Write Rank1 MR13 =0x58
662 00:23:07.254950 Write Rank1 MR12 =0x5d
663 00:23:07.255008 Write Rank1 MR1 =0x56
664 00:23:07.255067 Write Rank1 MR2 =0x2d
665 00:23:07.255125 Write Rank1 MR11 =0x23
666 00:23:07.255192 Write Rank1 MR22 =0x34
667 00:23:07.255277 Write Rank1 MR14 =0x10
668 00:23:07.255339 Write Rank1 MR3 =0x30
669 00:23:07.255409 Write Rank1 MR13 =0xd8
670 00:23:07.255484 [ModeRegInit_LP4] CH1 RK0
671 00:23:07.255548 Write Rank0 MR13 =0x18
672 00:23:07.255607 Write Rank0 MR12 =0x5d
673 00:23:07.255675 Write Rank0 MR1 =0x56
674 00:23:07.255735 Write Rank0 MR2 =0x1a
675 00:23:07.255794 Write Rank0 MR11 =0x0
676 00:23:07.255854 Write Rank0 MR22 =0x38
677 00:23:07.255940 Write Rank0 MR14 =0x5d
678 00:23:07.256001 Write Rank0 MR3 =0x30
679 00:23:07.256060 Write Rank0 MR13 =0x58
680 00:23:07.256119 Write Rank0 MR12 =0x5d
681 00:23:07.256184 Write Rank0 MR1 =0x56
682 00:23:07.256290 Write Rank0 MR2 =0x2d
683 00:23:07.256384 Write Rank0 MR11 =0x23
684 00:23:07.256477 Write Rank0 MR22 =0x34
685 00:23:07.256569 Write Rank0 MR14 =0x10
686 00:23:07.256661 Write Rank0 MR3 =0x30
687 00:23:07.256753 Write Rank0 MR13 =0xd8
688 00:23:07.256846 [ModeRegInit_LP4] CH1 RK1
689 00:23:07.256938 Write Rank1 MR13 =0x18
690 00:23:07.257030 Write Rank1 MR12 =0x5d
691 00:23:07.257122 Write Rank1 MR1 =0x56
692 00:23:07.257214 Write Rank1 MR2 =0x1a
693 00:23:07.257306 Write Rank1 MR11 =0x0
694 00:23:07.257398 Write Rank1 MR22 =0x38
695 00:23:07.257483 Write Rank1 MR14 =0x5d
696 00:23:07.257543 Write Rank1 MR3 =0x30
697 00:23:07.257602 Write Rank1 MR13 =0x58
698 00:23:07.257662 Write Rank1 MR12 =0x5d
699 00:23:07.257720 Write Rank1 MR1 =0x56
700 00:23:07.257780 Write Rank1 MR2 =0x2d
701 00:23:07.257839 Write Rank1 MR11 =0x23
702 00:23:07.257897 Write Rank1 MR22 =0x34
703 00:23:07.257956 Write Rank1 MR14 =0x10
704 00:23:07.258015 Write Rank1 MR3 =0x30
705 00:23:07.258073 Write Rank1 MR13 =0xd8
706 00:23:07.258133 match AC timing 3
707 00:23:07.258192 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
708 00:23:07.258252 DramC Write-DBI off
709 00:23:07.258311 DramC Read-DBI off
710 00:23:07.258370 Write Rank0 MR13 =0x59
711 00:23:07.258429 ==
712 00:23:07.258488 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
713 00:23:07.258547 fsp= 1, odt_onoff= 1, Byte mode= 0
714 00:23:07.258607 ==
715 00:23:07.258667 === u2Vref_new: 0x56 --> 0x2d
716 00:23:07.258726 === u2Vref_new: 0x58 --> 0x38
717 00:23:07.258785 === u2Vref_new: 0x5a --> 0x39
718 00:23:07.258844 === u2Vref_new: 0x5c --> 0x3c
719 00:23:07.258904 === u2Vref_new: 0x5e --> 0x3d
720 00:23:07.258963 === u2Vref_new: 0x60 --> 0xa0
721 00:23:07.259022 [CA 0] Center 34 (6~63) winsize 58
722 00:23:07.259081 [CA 1] Center 35 (8~63) winsize 56
723 00:23:07.259140 [CA 2] Center 28 (-1~58) winsize 60
724 00:23:07.259199 [CA 3] Center 24 (-4~52) winsize 57
725 00:23:07.259258 [CA 4] Center 25 (-3~53) winsize 57
726 00:23:07.259317 [CA 5] Center 30 (1~59) winsize 59
727 00:23:07.259375
728 00:23:07.259434 [CATrainingPosCal] consider 1 rank data
729 00:23:07.259493 u2DelayCellTimex100 = 744/100 ps
730 00:23:07.259551 CA0 delay=34 (6~63),Diff = 10 PI (13 cell)
731 00:23:07.259611 CA1 delay=35 (8~63),Diff = 11 PI (14 cell)
732 00:23:07.259670 CA2 delay=28 (-1~58),Diff = 4 PI (5 cell)
733 00:23:07.259729 CA3 delay=24 (-4~52),Diff = 0 PI (0 cell)
734 00:23:07.259800 CA4 delay=25 (-3~53),Diff = 1 PI (1 cell)
735 00:23:07.259883 CA5 delay=30 (1~59),Diff = 6 PI (7 cell)
736 00:23:07.259970
737 00:23:07.260031 CA PerBit enable=1, Macro0, CA PI delay=24
738 00:23:07.260092 === u2Vref_new: 0x5c --> 0x3c
739 00:23:07.260152
740 00:23:07.260210 Vref(ca) range 1: 28
741 00:23:07.260270
742 00:23:07.260328 CS Dly= 8 (39-0-32)
743 00:23:07.260387 Write Rank0 MR13 =0xd8
744 00:23:07.260446 Write Rank0 MR13 =0xd8
745 00:23:07.260506 Write Rank0 MR12 =0x5c
746 00:23:07.260565 Write Rank1 MR13 =0x59
747 00:23:07.260623 ==
748 00:23:07.260890 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
749 00:23:07.260956 fsp= 1, odt_onoff= 1, Byte mode= 0
750 00:23:07.261018 ==
751 00:23:07.261078 === u2Vref_new: 0x56 --> 0x2d
752 00:23:07.261139 === u2Vref_new: 0x58 --> 0x38
753 00:23:07.261198 === u2Vref_new: 0x5a --> 0x39
754 00:23:07.261258 === u2Vref_new: 0x5c --> 0x3c
755 00:23:07.261317 === u2Vref_new: 0x5e --> 0x3d
756 00:23:07.261377 === u2Vref_new: 0x60 --> 0xa0
757 00:23:07.261447 [CA 0] Center 35 (7~63) winsize 57
758 00:23:07.261542 [CA 1] Center 35 (7~63) winsize 57
759 00:23:07.261635 [CA 2] Center 28 (-1~58) winsize 60
760 00:23:07.261728 [CA 3] Center 23 (-5~51) winsize 57
761 00:23:07.261821 [CA 4] Center 24 (-4~52) winsize 57
762 00:23:07.261902 [CA 5] Center 29 (0~59) winsize 60
763 00:23:07.261963
764 00:23:07.262022 [CATrainingPosCal] consider 2 rank data
765 00:23:07.262083 u2DelayCellTimex100 = 744/100 ps
766 00:23:07.262142 CA0 delay=35 (7~63),Diff = 12 PI (15 cell)
767 00:23:07.262202 CA1 delay=35 (8~63),Diff = 12 PI (15 cell)
768 00:23:07.262262 CA2 delay=28 (-1~58),Diff = 5 PI (6 cell)
769 00:23:07.262321 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
770 00:23:07.262380 CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)
771 00:23:07.262439 CA5 delay=30 (1~59),Diff = 7 PI (9 cell)
772 00:23:07.262498
773 00:23:07.262557 CA PerBit enable=1, Macro0, CA PI delay=23
774 00:23:07.262616 === u2Vref_new: 0x5e --> 0x3d
775 00:23:07.262676
776 00:23:07.262734 Vref(ca) range 1: 30
777 00:23:07.262793
778 00:23:07.262852 CS Dly= 6 (37-0-32)
779 00:23:07.262911 Write Rank1 MR13 =0xd8
780 00:23:07.262970 Write Rank1 MR13 =0xd8
781 00:23:07.263029 Write Rank1 MR12 =0x5e
782 00:23:07.263088 [RankSwap] Rank num 2, (Multi 1), Rank 0
783 00:23:07.263147 Write Rank0 MR2 =0xad
784 00:23:07.263205 [Write Leveling]
785 00:23:07.263264 delay byte0 byte1 byte2 byte3
786 00:23:07.263322
787 00:23:07.263380 10 0 0
788 00:23:07.263440 11 0 0
789 00:23:07.263500 12 0 0
790 00:23:07.263560 13 0 0
791 00:23:07.263620 14 0 0
792 00:23:07.263679 15 0 0
793 00:23:07.263738 16 0 0
794 00:23:07.263798 17 0 0
795 00:23:07.263857 18 0 0
796 00:23:07.263916 19 0 0
797 00:23:07.263976 20 0 0
798 00:23:07.264036 21 0 0
799 00:23:07.264096 22 0 0
800 00:23:07.264155 23 0 0
801 00:23:07.264215 24 0 0
802 00:23:07.264275 25 0 0
803 00:23:07.264334 26 0 0
804 00:23:07.264394 27 0 ff
805 00:23:07.264453 28 0 ff
806 00:23:07.264513 29 0 ff
807 00:23:07.264572 30 0 ff
808 00:23:07.264632 31 ff ff
809 00:23:07.264691 32 ff ff
810 00:23:07.264751 33 ff ff
811 00:23:07.264811 34 ff ff
812 00:23:07.264871 35 ff ff
813 00:23:07.264930 36 ff ff
814 00:23:07.264990 37 ff ff
815 00:23:07.265050 pass bytecount = 0xff (0xff: all bytes pass)
816 00:23:07.265109
817 00:23:07.265168 DQS0 dly: 31
818 00:23:07.265228 DQS1 dly: 27
819 00:23:07.265286 Write Rank0 MR2 =0x2d
820 00:23:07.265345 [RankSwap] Rank num 2, (Multi 1), Rank 0
821 00:23:07.265404 Write Rank0 MR1 =0xd6
822 00:23:07.265473 [Gating]
823 00:23:07.265533 ==
824 00:23:07.265592 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
825 00:23:07.265652 fsp= 1, odt_onoff= 1, Byte mode= 0
826 00:23:07.265711 ==
827 00:23:07.265769 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
828 00:23:07.265830 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
829 00:23:07.265890 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
830 00:23:07.265951 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
831 00:23:07.266011 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
832 00:23:07.266071 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
833 00:23:07.266132 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
834 00:23:07.266192 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
835 00:23:07.266252 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
836 00:23:07.266312 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
837 00:23:07.266373 3 2 8 |2c2c 2c2b |(11 0)(11 11) |(0 0)(1 0)| 0
838 00:23:07.266433 3 2 12 |201 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
839 00:23:07.266494 3 2 16 |3534 404 |(11 11)(11 11) |(0 0)(0 0)| 0
840 00:23:07.266555 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
841 00:23:07.266615 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
842 00:23:07.266676 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
843 00:23:07.266736 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
844 00:23:07.266796 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
845 00:23:07.266857 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
846 00:23:07.266917 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
847 00:23:07.266977 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
848 00:23:07.267037 [Byte 0] Lead/lag Transition tap number (1)
849 00:23:07.267096 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
850 00:23:07.267157 [Byte 1] Lead/lag falling Transition (3, 3, 20)
851 00:23:07.267216 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
852 00:23:07.267277 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
853 00:23:07.267337 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
854 00:23:07.267397 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
855 00:23:07.267458 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
856 00:23:07.267519 3 4 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
857 00:23:07.267579 3 4 16 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
858 00:23:07.267640 3 4 20 |3d3d 1110 |(11 11)(11 11) |(1 1)(1 1)| 0
859 00:23:07.267700 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 00:23:07.267760 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 00:23:07.267821 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 00:23:07.267881 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 00:23:07.267941 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 00:23:07.268001 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 00:23:07.268061 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 00:23:07.268121 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 00:23:07.268181 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 00:23:07.268241 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 00:23:07.268301 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 00:23:07.268362 [Byte 0] Lead/lag falling Transition (3, 6, 0)
871 00:23:07.268619 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
872 00:23:07.268687 [Byte 1] Lead/lag falling Transition (3, 6, 4)
873 00:23:07.268748 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
874 00:23:07.268810 [Byte 0] Lead/lag Transition tap number (3)
875 00:23:07.268870 3 6 12 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
876 00:23:07.268931 [Byte 1] Lead/lag Transition tap number (3)
877 00:23:07.268991 3 6 16 |1818 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
878 00:23:07.269080 3 6 20 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
879 00:23:07.269176 [Byte 0]First pass (3, 6, 20)
880 00:23:07.269270 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 00:23:07.269365 [Byte 1]First pass (3, 6, 24)
882 00:23:07.269462 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 00:23:07.269527 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 00:23:07.269589 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 00:23:07.269650 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 00:23:07.269711 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 00:23:07.269772 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 00:23:07.269832 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 00:23:07.269893 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
890 00:23:07.269952 All bytes gating window > 1UI, Early break!
891 00:23:07.270013
892 00:23:07.270072 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
893 00:23:07.270131
894 00:23:07.270190 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
895 00:23:07.270249
896 00:23:07.270307
897 00:23:07.270365
898 00:23:07.270429 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
899 00:23:07.270501
900 00:23:07.270562 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
901 00:23:07.270622
902 00:23:07.270680
903 00:23:07.270738 Write Rank0 MR1 =0x56
904 00:23:07.270797
905 00:23:07.270856 best RODT dly(2T, 0.5T) = (2, 3)
906 00:23:07.270914
907 00:23:07.270973 best RODT dly(2T, 0.5T) = (2, 3)
908 00:23:07.271032 ==
909 00:23:07.271092 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
910 00:23:07.271151 fsp= 1, odt_onoff= 1, Byte mode= 0
911 00:23:07.271210 ==
912 00:23:07.271269 Start DQ dly to find pass range UseTestEngine =0
913 00:23:07.271329 x-axis: bit #, y-axis: DQ dly (-127~63)
914 00:23:07.271388 RX Vref Scan = 0
915 00:23:07.271447 -26, [0] xxxxxxxx xxxxxxxx [MSB]
916 00:23:07.271507 -25, [0] xxxxxxxx xxxxxxxx [MSB]
917 00:23:07.271567 -24, [0] xxxxxxxx xxxxxxxx [MSB]
918 00:23:07.271627 -23, [0] xxxxxxxx xxxxxxxx [MSB]
919 00:23:07.271687 -22, [0] xxxxxxxx xxxxxxxx [MSB]
920 00:23:07.271747 -21, [0] xxxxxxxx xxxxxxxx [MSB]
921 00:23:07.271807 -20, [0] xxxxxxxx xxxxxxxx [MSB]
922 00:23:07.271867 -19, [0] xxxxxxxx xxxxxxxx [MSB]
923 00:23:07.271927 -18, [0] xxxxxxxx xxxxxxxx [MSB]
924 00:23:07.271987 -17, [0] xxxxxxxx xxxxxxxx [MSB]
925 00:23:07.272047 -16, [0] xxxxxxxx xxxxxxxx [MSB]
926 00:23:07.272106 -15, [0] xxxxxxxx xxxxxxxx [MSB]
927 00:23:07.272166 -14, [0] xxxxxxxx xxxxxxxx [MSB]
928 00:23:07.272226 -13, [0] xxxxxxxx xxxxxxxx [MSB]
929 00:23:07.272286 -12, [0] xxxxxxxx xxxxxxxx [MSB]
930 00:23:07.272346 -11, [0] xxxxxxxx xxxxxxxx [MSB]
931 00:23:07.272405 -10, [0] xxxxxxxx xxxxxxxx [MSB]
932 00:23:07.272465 -9, [0] xxxxxxxx xxxxxxxx [MSB]
933 00:23:07.272524 -8, [0] xxxxxxxx xxxxxxxx [MSB]
934 00:23:07.272583 -7, [0] xxxxxxxx xxxxxxxx [MSB]
935 00:23:07.272643 -6, [0] xxxxxxxx xxxxxxxx [MSB]
936 00:23:07.272703 -5, [0] xxxxxxxx xxxxxxxx [MSB]
937 00:23:07.272763 -4, [0] xxxxxxxx oxxxxxxx [MSB]
938 00:23:07.272822 -3, [0] xxxxxxxx oxxxxxxx [MSB]
939 00:23:07.272882 -2, [0] xxxoxxxx oxxoxxxx [MSB]
940 00:23:07.272942 -1, [0] xxxoxxxx oxxoxxxx [MSB]
941 00:23:07.273001 0, [0] xxxoxxxx ooxoooxx [MSB]
942 00:23:07.273061 1, [0] xxxoxxxx ooxoooxx [MSB]
943 00:23:07.273126 2, [0] xxxoxoxx ooxoooox [MSB]
944 00:23:07.273186 3, [0] xxxoxoox ooxoooox [MSB]
945 00:23:07.273246 4, [0] xxxoxooo ooxooooo [MSB]
946 00:23:07.273306 5, [0] oxxooooo ooxooooo [MSB]
947 00:23:07.273366 6, [0] oooooooo ooxooooo [MSB]
948 00:23:07.273425 32, [0] oooxoooo oooooooo [MSB]
949 00:23:07.273498 33, [0] oooxoooo xooooooo [MSB]
950 00:23:07.273558 34, [0] oooxoooo xooxoooo [MSB]
951 00:23:07.273618 35, [0] oooxoooo xxoxoooo [MSB]
952 00:23:07.273678 36, [0] oooxoxoo xxoxxoxo [MSB]
953 00:23:07.273737 37, [0] oooxoxxx xxoxxxxo [MSB]
954 00:23:07.273797 38, [0] oooxoxxx xxoxxxxx [MSB]
955 00:23:07.273857 39, [0] oooxoxxx xxoxxxxx [MSB]
956 00:23:07.273917 40, [0] oooxxxxx xxoxxxxx [MSB]
957 00:23:07.273977 41, [0] xxxxxxxx xxoxxxxx [MSB]
958 00:23:07.274036 42, [0] xxxxxxxx xxxxxxxx [MSB]
959 00:23:07.274096 iDelay=42, Bit 0, Center 22 (5 ~ 40) 36
960 00:23:07.274155 iDelay=42, Bit 1, Center 23 (6 ~ 40) 35
961 00:23:07.274213 iDelay=42, Bit 2, Center 23 (6 ~ 40) 35
962 00:23:07.274272 iDelay=42, Bit 3, Center 14 (-2 ~ 31) 34
963 00:23:07.274330 iDelay=42, Bit 4, Center 22 (5 ~ 39) 35
964 00:23:07.274390 iDelay=42, Bit 5, Center 18 (2 ~ 35) 34
965 00:23:07.274491 iDelay=42, Bit 6, Center 19 (3 ~ 36) 34
966 00:23:07.274588 iDelay=42, Bit 7, Center 20 (4 ~ 36) 33
967 00:23:07.274653 iDelay=42, Bit 8, Center 14 (-4 ~ 32) 37
968 00:23:07.274713 iDelay=42, Bit 9, Center 17 (0 ~ 34) 35
969 00:23:07.274773 iDelay=42, Bit 10, Center 24 (7 ~ 41) 35
970 00:23:07.274833 iDelay=42, Bit 11, Center 15 (-2 ~ 33) 36
971 00:23:07.274892 iDelay=42, Bit 12, Center 17 (0 ~ 35) 36
972 00:23:07.274951 iDelay=42, Bit 13, Center 18 (0 ~ 36) 37
973 00:23:07.275010 iDelay=42, Bit 14, Center 18 (2 ~ 35) 34
974 00:23:07.275068 iDelay=42, Bit 15, Center 20 (4 ~ 37) 34
975 00:23:07.275127 ==
976 00:23:07.275186 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
977 00:23:07.275245 fsp= 1, odt_onoff= 1, Byte mode= 0
978 00:23:07.275305 ==
979 00:23:07.275363 DQS Delay:
980 00:23:07.275422 DQS0 = 0, DQS1 = 0
981 00:23:07.275480 DQM Delay:
982 00:23:07.275538 DQM0 = 20, DQM1 = 17
983 00:23:07.275597 DQ Delay:
984 00:23:07.275657 DQ0 =22, DQ1 =23, DQ2 =23, DQ3 =14
985 00:23:07.275715 DQ4 =22, DQ5 =18, DQ6 =19, DQ7 =20
986 00:23:07.275774 DQ8 =14, DQ9 =17, DQ10 =24, DQ11 =15
987 00:23:07.275833 DQ12 =17, DQ13 =18, DQ14 =18, DQ15 =20
988 00:23:07.275892
989 00:23:07.275950
990 00:23:07.276008 DramC Write-DBI off
991 00:23:07.276066 ==
992 00:23:07.276125 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
993 00:23:07.276184 fsp= 1, odt_onoff= 1, Byte mode= 0
994 00:23:07.276242 ==
995 00:23:07.276301 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
996 00:23:07.276359
997 00:23:07.276417 Begin, DQ Scan Range 923~1179
998 00:23:07.276475
999 00:23:07.276533
1000 00:23:07.276790 TX Vref Scan disable
1001 00:23:07.276858 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1002 00:23:07.276921 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1003 00:23:07.276983 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1004 00:23:07.277043 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1005 00:23:07.277104 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1006 00:23:07.277164 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1007 00:23:07.277224 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1008 00:23:07.277285 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1009 00:23:07.277345 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1010 00:23:07.277405 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1011 00:23:07.277476 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1012 00:23:07.277537 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1013 00:23:07.277597 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1014 00:23:07.277657 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1015 00:23:07.277717 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1016 00:23:07.277777 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1017 00:23:07.277838 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1018 00:23:07.277900 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1019 00:23:07.277960 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1020 00:23:07.278021 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1021 00:23:07.278081 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1022 00:23:07.278142 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1023 00:23:07.278202 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1024 00:23:07.278263 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1025 00:23:07.278329 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1026 00:23:07.278393 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1027 00:23:07.278454 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1028 00:23:07.278514 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1029 00:23:07.278574 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1030 00:23:07.278634 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1031 00:23:07.278693 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1032 00:23:07.278752 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1033 00:23:07.278814 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1034 00:23:07.278874 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1035 00:23:07.278934 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1036 00:23:07.278993 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1037 00:23:07.279053 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1038 00:23:07.279111 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1039 00:23:07.279171 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1040 00:23:07.279231 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1041 00:23:07.279291 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1042 00:23:07.279351 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1043 00:23:07.279410 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1044 00:23:07.279470 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1045 00:23:07.279529 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1046 00:23:07.279589 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1047 00:23:07.279648 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1048 00:23:07.279708 970 |3 6 10|[0] xxxxxxxx ooxoxxxx [MSB]
1049 00:23:07.279767 971 |3 6 11|[0] xxxxxxxx ooxooxxx [MSB]
1050 00:23:07.279826 972 |3 6 12|[0] xxxxxxxx ooxoooxx [MSB]
1051 00:23:07.279886 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1052 00:23:07.279945 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1053 00:23:07.280005 975 |3 6 15|[0] xxxxxxxx ooxooooo [MSB]
1054 00:23:07.280064 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1055 00:23:07.280124 977 |3 6 17|[0] xxxoxoox oooooooo [MSB]
1056 00:23:07.280183 978 |3 6 18|[0] xoxooooo oooooooo [MSB]
1057 00:23:07.280243 991 |3 6 31|[0] oooooooo xooxxxoo [MSB]
1058 00:23:07.280303 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1059 00:23:07.280362 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1060 00:23:07.280422 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1061 00:23:07.280481 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1062 00:23:07.280541 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1063 00:23:07.280600 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1064 00:23:07.280660 998 |3 6 38|[0] oooxoxxo xxxxxxxx [MSB]
1065 00:23:07.280719 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1066 00:23:07.280778 Byte0, DQ PI dly=986, DQM PI dly= 986
1067 00:23:07.280837 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1068 00:23:07.280896
1069 00:23:07.280954 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1070 00:23:07.281013
1071 00:23:07.281070 Byte1, DQ PI dly=981, DQM PI dly= 981
1072 00:23:07.281129 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1073 00:23:07.281187
1074 00:23:07.281245 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1075 00:23:07.281303
1076 00:23:07.281361 ==
1077 00:23:07.281420 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1078 00:23:07.281490 fsp= 1, odt_onoff= 1, Byte mode= 0
1079 00:23:07.281550 ==
1080 00:23:07.281607 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1081 00:23:07.281666
1082 00:23:07.281723 Begin, DQ Scan Range 957~1021
1083 00:23:07.281781 Write Rank0 MR14 =0x0
1084 00:23:07.281847
1085 00:23:07.281907 CH=0, VrefRange= 0, VrefLevel = 0
1086 00:23:07.281966 TX Bit0 (982~993) 12 987, Bit8 (971~985) 15 978,
1087 00:23:07.282025 TX Bit1 (980~993) 14 986, Bit9 (973~987) 15 980,
1088 00:23:07.282084 TX Bit2 (982~994) 13 988, Bit10 (978~991) 14 984,
1089 00:23:07.282143 TX Bit3 (977~990) 14 983, Bit11 (973~984) 12 978,
1090 00:23:07.282201 TX Bit4 (980~992) 13 986, Bit12 (975~985) 11 980,
1091 00:23:07.282260 TX Bit5 (978~991) 14 984, Bit13 (976~985) 10 980,
1092 00:23:07.282319 TX Bit6 (978~991) 14 984, Bit14 (976~989) 14 982,
1093 00:23:07.282391 TX Bit7 (980~993) 14 986, Bit15 (977~991) 15 984,
1094 00:23:07.282454
1095 00:23:07.282513 Write Rank0 MR14 =0x2
1096 00:23:07.282571
1097 00:23:07.282629 CH=0, VrefRange= 0, VrefLevel = 2
1098 00:23:07.282688 TX Bit0 (982~994) 13 988, Bit8 (970~986) 17 978,
1099 00:23:07.282747 TX Bit1 (980~994) 15 987, Bit9 (973~988) 16 980,
1100 00:23:07.282806 TX Bit2 (981~995) 15 988, Bit10 (977~992) 16 984,
1101 00:23:07.282864 TX Bit3 (976~991) 16 983, Bit11 (972~985) 14 978,
1102 00:23:07.282924 TX Bit4 (979~993) 15 986, Bit12 (975~986) 12 980,
1103 00:23:07.282983 TX Bit5 (977~992) 16 984, Bit13 (975~986) 12 980,
1104 00:23:07.283041 TX Bit6 (978~992) 15 985, Bit14 (975~990) 16 982,
1105 00:23:07.283309 TX Bit7 (980~993) 14 986, Bit15 (977~992) 16 984,
1106 00:23:07.283379
1107 00:23:07.283440 Write Rank0 MR14 =0x4
1108 00:23:07.283498
1109 00:23:07.283557 CH=0, VrefRange= 0, VrefLevel = 4
1110 00:23:07.283616 TX Bit0 (982~995) 14 988, Bit8 (970~987) 18 978,
1111 00:23:07.283676 TX Bit1 (979~995) 17 987, Bit9 (973~989) 17 981,
1112 00:23:07.283735 TX Bit2 (982~996) 15 989, Bit10 (977~993) 17 985,
1113 00:23:07.283794 TX Bit3 (976~991) 16 983, Bit11 (971~986) 16 978,
1114 00:23:07.283854 TX Bit4 (979~994) 16 986, Bit12 (974~987) 14 980,
1115 00:23:07.283913 TX Bit5 (977~992) 16 984, Bit13 (974~988) 15 981,
1116 00:23:07.283988 TX Bit6 (978~992) 15 985, Bit14 (975~990) 16 982,
1117 00:23:07.284052 TX Bit7 (979~994) 16 986, Bit15 (977~993) 17 985,
1118 00:23:07.284112
1119 00:23:07.284170 Write Rank0 MR14 =0x6
1120 00:23:07.284228
1121 00:23:07.284287 CH=0, VrefRange= 0, VrefLevel = 6
1122 00:23:07.284346 TX Bit0 (982~996) 15 989, Bit8 (970~988) 19 979,
1123 00:23:07.284405 TX Bit1 (979~996) 18 987, Bit9 (972~989) 18 980,
1124 00:23:07.284464 TX Bit2 (980~997) 18 988, Bit10 (977~994) 18 985,
1125 00:23:07.284524 TX Bit3 (976~991) 16 983, Bit11 (971~987) 17 979,
1126 00:23:07.284583 TX Bit4 (978~994) 17 986, Bit12 (974~988) 15 981,
1127 00:23:07.284642 TX Bit5 (977~993) 17 985, Bit13 (974~988) 15 981,
1128 00:23:07.284701 TX Bit6 (978~993) 16 985, Bit14 (975~991) 17 983,
1129 00:23:07.284760 TX Bit7 (979~995) 17 987, Bit15 (976~994) 19 985,
1130 00:23:07.284819
1131 00:23:07.284877 Write Rank0 MR14 =0x8
1132 00:23:07.284935
1133 00:23:07.284993 CH=0, VrefRange= 0, VrefLevel = 8
1134 00:23:07.285052 TX Bit0 (980~997) 18 988, Bit8 (969~988) 20 978,
1135 00:23:07.285111 TX Bit1 (978~997) 20 987, Bit9 (972~989) 18 980,
1136 00:23:07.285170 TX Bit2 (980~997) 18 988, Bit10 (977~994) 18 985,
1137 00:23:07.285228 TX Bit3 (975~992) 18 983, Bit11 (971~988) 18 979,
1138 00:23:07.285287 TX Bit4 (978~995) 18 986, Bit12 (974~989) 16 981,
1139 00:23:07.285346 TX Bit5 (977~993) 17 985, Bit13 (974~989) 16 981,
1140 00:23:07.285405 TX Bit6 (977~993) 17 985, Bit14 (974~991) 18 982,
1141 00:23:07.285475 TX Bit7 (979~996) 18 987, Bit15 (976~994) 19 985,
1142 00:23:07.285536
1143 00:23:07.285594 Write Rank0 MR14 =0xa
1144 00:23:07.285652
1145 00:23:07.285711 CH=0, VrefRange= 0, VrefLevel = 10
1146 00:23:07.285770 TX Bit0 (981~997) 17 989, Bit8 (969~989) 21 979,
1147 00:23:07.285829 TX Bit1 (978~997) 20 987, Bit9 (972~990) 19 981,
1148 00:23:07.285906 TX Bit2 (979~998) 20 988, Bit10 (976~995) 20 985,
1149 00:23:07.285989 TX Bit3 (975~992) 18 983, Bit11 (970~989) 20 979,
1150 00:23:07.286075 TX Bit4 (978~996) 19 987, Bit12 (973~989) 17 981,
1151 00:23:07.286137 TX Bit5 (977~993) 17 985, Bit13 (973~989) 17 981,
1152 00:23:07.286197 TX Bit6 (977~994) 18 985, Bit14 (974~991) 18 982,
1153 00:23:07.286257 TX Bit7 (978~997) 20 987, Bit15 (976~995) 20 985,
1154 00:23:07.286317
1155 00:23:07.286377 Write Rank0 MR14 =0xc
1156 00:23:07.286436
1157 00:23:07.286494 CH=0, VrefRange= 0, VrefLevel = 12
1158 00:23:07.286554 TX Bit0 (980~998) 19 989, Bit8 (969~990) 22 979,
1159 00:23:07.286613 TX Bit1 (978~998) 21 988, Bit9 (971~990) 20 980,
1160 00:23:07.286673 TX Bit2 (979~999) 21 989, Bit10 (976~996) 21 986,
1161 00:23:07.286732 TX Bit3 (975~992) 18 983, Bit11 (970~989) 20 979,
1162 00:23:07.286792 TX Bit4 (978~997) 20 987, Bit12 (973~990) 18 981,
1163 00:23:07.286851 TX Bit5 (977~994) 18 985, Bit13 (973~989) 17 981,
1164 00:23:07.286910 TX Bit6 (977~995) 19 986, Bit14 (974~992) 19 983,
1165 00:23:07.286969 TX Bit7 (979~998) 20 988, Bit15 (976~996) 21 986,
1166 00:23:07.287028
1167 00:23:07.287086 Write Rank0 MR14 =0xe
1168 00:23:07.287144
1169 00:23:07.287202 CH=0, VrefRange= 0, VrefLevel = 14
1170 00:23:07.287261 TX Bit0 (980~999) 20 989, Bit8 (969~990) 22 979,
1171 00:23:07.287320 TX Bit1 (978~998) 21 988, Bit9 (970~990) 21 980,
1172 00:23:07.287380 TX Bit2 (979~999) 21 989, Bit10 (976~997) 22 986,
1173 00:23:07.287439 TX Bit3 (975~993) 19 984, Bit11 (970~989) 20 979,
1174 00:23:07.287498 TX Bit4 (978~998) 21 988, Bit12 (972~990) 19 981,
1175 00:23:07.287557 TX Bit5 (976~995) 20 985, Bit13 (973~990) 18 981,
1176 00:23:07.287617 TX Bit6 (977~996) 20 986, Bit14 (973~993) 21 983,
1177 00:23:07.287676 TX Bit7 (978~999) 22 988, Bit15 (975~997) 23 986,
1178 00:23:07.287735
1179 00:23:07.287793 Write Rank0 MR14 =0x10
1180 00:23:07.287851
1181 00:23:07.287909 CH=0, VrefRange= 0, VrefLevel = 16
1182 00:23:07.287967 TX Bit0 (979~999) 21 989, Bit8 (969~990) 22 979,
1183 00:23:07.288026 TX Bit1 (978~999) 22 988, Bit9 (970~991) 22 980,
1184 00:23:07.288085 TX Bit2 (978~999) 22 988, Bit10 (976~997) 22 986,
1185 00:23:07.288144 TX Bit3 (974~993) 20 983, Bit11 (969~989) 21 979,
1186 00:23:07.288204 TX Bit4 (978~998) 21 988, Bit12 (972~990) 19 981,
1187 00:23:07.288263 TX Bit5 (976~996) 21 986, Bit13 (972~990) 19 981,
1188 00:23:07.288322 TX Bit6 (977~997) 21 987, Bit14 (972~994) 23 983,
1189 00:23:07.288381 TX Bit7 (978~999) 22 988, Bit15 (975~997) 23 986,
1190 00:23:07.288462
1191 00:23:07.288522 Write Rank0 MR14 =0x12
1192 00:23:07.288581
1193 00:23:07.288639 CH=0, VrefRange= 0, VrefLevel = 18
1194 00:23:07.288697 TX Bit0 (979~1000) 22 989, Bit8 (968~991) 24 979,
1195 00:23:07.288757 TX Bit1 (978~999) 22 988, Bit9 (969~991) 23 980,
1196 00:23:07.288816 TX Bit2 (978~1000) 23 989, Bit10 (976~997) 22 986,
1197 00:23:07.288875 TX Bit3 (974~993) 20 983, Bit11 (969~990) 22 979,
1198 00:23:07.288935 TX Bit4 (978~999) 22 988, Bit12 (971~991) 21 981,
1199 00:23:07.288993 TX Bit5 (976~996) 21 986, Bit13 (971~991) 21 981,
1200 00:23:07.289053 TX Bit6 (976~998) 23 987, Bit14 (972~994) 23 983,
1201 00:23:07.289111 TX Bit7 (978~999) 22 988, Bit15 (975~997) 23 986,
1202 00:23:07.289171
1203 00:23:07.289228 Write Rank0 MR14 =0x14
1204 00:23:07.289286
1205 00:23:07.289345 CH=0, VrefRange= 0, VrefLevel = 20
1206 00:23:07.289404 TX Bit0 (979~1000) 22 989, Bit8 (968~991) 24 979,
1207 00:23:07.289477 TX Bit1 (978~999) 22 988, Bit9 (969~992) 24 980,
1208 00:23:07.289733 TX Bit2 (978~1000) 23 989, Bit10 (975~998) 24 986,
1209 00:23:07.289799 TX Bit3 (974~994) 21 984, Bit11 (969~990) 22 979,
1210 00:23:07.289859 TX Bit4 (977~999) 23 988, Bit12 (971~991) 21 981,
1211 00:23:07.289920 TX Bit5 (976~996) 21 986, Bit13 (971~991) 21 981,
1212 00:23:07.289979 TX Bit6 (976~998) 23 987, Bit14 (972~995) 24 983,
1213 00:23:07.290039 TX Bit7 (978~1000) 23 989, Bit15 (975~997) 23 986,
1214 00:23:07.290098
1215 00:23:07.290156 Write Rank0 MR14 =0x16
1216 00:23:07.290214
1217 00:23:07.290272 CH=0, VrefRange= 0, VrefLevel = 22
1218 00:23:07.290331 TX Bit0 (978~1000) 23 989, Bit8 (968~991) 24 979,
1219 00:23:07.290390 TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980,
1220 00:23:07.290449 TX Bit2 (978~1000) 23 989, Bit10 (975~998) 24 986,
1221 00:23:07.290508 TX Bit3 (974~994) 21 984, Bit11 (969~991) 23 980,
1222 00:23:07.290567 TX Bit4 (977~999) 23 988, Bit12 (970~992) 23 981,
1223 00:23:07.290626 TX Bit5 (976~997) 22 986, Bit13 (971~991) 21 981,
1224 00:23:07.290684 TX Bit6 (976~999) 24 987, Bit14 (971~996) 26 983,
1225 00:23:07.290743 TX Bit7 (977~1000) 24 988, Bit15 (975~998) 24 986,
1226 00:23:07.290802
1227 00:23:07.290860 Write Rank0 MR14 =0x18
1228 00:23:07.290919
1229 00:23:07.290977 CH=0, VrefRange= 0, VrefLevel = 24
1230 00:23:07.291035 TX Bit0 (978~1001) 24 989, Bit8 (968~991) 24 979,
1231 00:23:07.291094 TX Bit1 (977~1000) 24 988, Bit9 (969~993) 25 981,
1232 00:23:07.291153 TX Bit2 (978~1001) 24 989, Bit10 (975~998) 24 986,
1233 00:23:07.291212 TX Bit3 (974~995) 22 984, Bit11 (969~991) 23 980,
1234 00:23:07.291271 TX Bit4 (977~999) 23 988, Bit12 (970~992) 23 981,
1235 00:23:07.291330 TX Bit5 (975~998) 24 986, Bit13 (970~992) 23 981,
1236 00:23:07.291388 TX Bit6 (976~999) 24 987, Bit14 (971~995) 25 983,
1237 00:23:07.291447 TX Bit7 (977~1000) 24 988, Bit15 (974~998) 25 986,
1238 00:23:07.291506
1239 00:23:07.291563 Write Rank0 MR14 =0x1a
1240 00:23:07.291621
1241 00:23:07.291680 CH=0, VrefRange= 0, VrefLevel = 26
1242 00:23:07.291738 TX Bit0 (978~1001) 24 989, Bit8 (968~991) 24 979,
1243 00:23:07.291797 TX Bit1 (977~1000) 24 988, Bit9 (969~994) 26 981,
1244 00:23:07.291856 TX Bit2 (978~1001) 24 989, Bit10 (974~999) 26 986,
1245 00:23:07.291914 TX Bit3 (973~995) 23 984, Bit11 (969~991) 23 980,
1246 00:23:07.291974 TX Bit4 (977~1000) 24 988, Bit12 (970~993) 24 981,
1247 00:23:07.292033 TX Bit5 (975~999) 25 987, Bit13 (970~993) 24 981,
1248 00:23:07.292092 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
1249 00:23:07.292151 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
1250 00:23:07.292210
1251 00:23:07.292267 Write Rank0 MR14 =0x1c
1252 00:23:07.292326
1253 00:23:07.292383 CH=0, VrefRange= 0, VrefLevel = 28
1254 00:23:07.292442 TX Bit0 (978~1001) 24 989, Bit8 (968~991) 24 979,
1255 00:23:07.292523 TX Bit1 (977~1001) 25 989, Bit9 (969~993) 25 981,
1256 00:23:07.292585 TX Bit2 (977~1001) 25 989, Bit10 (974~998) 25 986,
1257 00:23:07.292644 TX Bit3 (972~995) 24 983, Bit11 (968~992) 25 980,
1258 00:23:07.292704 TX Bit4 (977~1000) 24 988, Bit12 (970~993) 24 981,
1259 00:23:07.292763 TX Bit5 (975~998) 24 986, Bit13 (970~993) 24 981,
1260 00:23:07.292822 TX Bit6 (976~999) 24 987, Bit14 (970~997) 28 983,
1261 00:23:07.292881 TX Bit7 (977~1001) 25 989, Bit15 (973~998) 26 985,
1262 00:23:07.292940
1263 00:23:07.292997 Write Rank0 MR14 =0x1e
1264 00:23:07.293055
1265 00:23:07.293113 CH=0, VrefRange= 0, VrefLevel = 30
1266 00:23:07.293172 TX Bit0 (978~1002) 25 990, Bit8 (968~991) 24 979,
1267 00:23:07.293231 TX Bit1 (977~1001) 25 989, Bit9 (969~993) 25 981,
1268 00:23:07.293291 TX Bit2 (978~1002) 25 990, Bit10 (975~998) 24 986,
1269 00:23:07.293350 TX Bit3 (972~995) 24 983, Bit11 (968~992) 25 980,
1270 00:23:07.293410 TX Bit4 (977~1000) 24 988, Bit12 (969~994) 26 981,
1271 00:23:07.293481 TX Bit5 (975~998) 24 986, Bit13 (970~994) 25 982,
1272 00:23:07.293541 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
1273 00:23:07.293600 TX Bit7 (977~1001) 25 989, Bit15 (973~998) 26 985,
1274 00:23:07.293660
1275 00:23:07.293718 Write Rank0 MR14 =0x20
1276 00:23:07.293776
1277 00:23:07.293834 CH=0, VrefRange= 0, VrefLevel = 32
1278 00:23:07.293892 TX Bit0 (978~1002) 25 990, Bit8 (968~991) 24 979,
1279 00:23:07.293952 TX Bit1 (977~1001) 25 989, Bit9 (969~993) 25 981,
1280 00:23:07.294010 TX Bit2 (978~1002) 25 990, Bit10 (975~998) 24 986,
1281 00:23:07.294070 TX Bit3 (972~995) 24 983, Bit11 (968~992) 25 980,
1282 00:23:07.294128 TX Bit4 (977~1000) 24 988, Bit12 (969~994) 26 981,
1283 00:23:07.294188 TX Bit5 (975~998) 24 986, Bit13 (970~994) 25 982,
1284 00:23:07.294246 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
1285 00:23:07.294305 TX Bit7 (977~1001) 25 989, Bit15 (973~998) 26 985,
1286 00:23:07.294363
1287 00:23:07.294421 Write Rank0 MR14 =0x22
1288 00:23:07.294492
1289 00:23:07.294552 CH=0, VrefRange= 0, VrefLevel = 34
1290 00:23:07.294611 TX Bit0 (978~1002) 25 990, Bit8 (968~991) 24 979,
1291 00:23:07.294670 TX Bit1 (977~1001) 25 989, Bit9 (969~993) 25 981,
1292 00:23:07.294730 TX Bit2 (978~1002) 25 990, Bit10 (975~998) 24 986,
1293 00:23:07.294789 TX Bit3 (972~995) 24 983, Bit11 (968~992) 25 980,
1294 00:23:07.294847 TX Bit4 (977~1000) 24 988, Bit12 (969~994) 26 981,
1295 00:23:07.294905 TX Bit5 (975~998) 24 986, Bit13 (970~994) 25 982,
1296 00:23:07.294964 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
1297 00:23:07.295022 TX Bit7 (977~1001) 25 989, Bit15 (973~998) 26 985,
1298 00:23:07.295081
1299 00:23:07.295138 Write Rank0 MR14 =0x24
1300 00:23:07.295196
1301 00:23:07.295253 CH=0, VrefRange= 0, VrefLevel = 36
1302 00:23:07.295311 TX Bit0 (978~1002) 25 990, Bit8 (968~991) 24 979,
1303 00:23:07.295369 TX Bit1 (977~1001) 25 989, Bit9 (969~993) 25 981,
1304 00:23:07.295427 TX Bit2 (978~1002) 25 990, Bit10 (975~998) 24 986,
1305 00:23:07.295486 TX Bit3 (972~995) 24 983, Bit11 (968~992) 25 980,
1306 00:23:07.295545 TX Bit4 (977~1000) 24 988, Bit12 (969~994) 26 981,
1307 00:23:07.295800 TX Bit5 (975~998) 24 986, Bit13 (970~994) 25 982,
1308 00:23:07.295868 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
1309 00:23:07.295928 TX Bit7 (977~1001) 25 989, Bit15 (973~998) 26 985,
1310 00:23:07.295986
1311 00:23:07.296043
1312 00:23:07.296101 TX Vref found, early break! 377< 378
1313 00:23:07.296159 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
1314 00:23:07.296217 u1DelayCellOfst[0]=9 cells (7 PI)
1315 00:23:07.296276 u1DelayCellOfst[1]=7 cells (6 PI)
1316 00:23:07.296334 u1DelayCellOfst[2]=9 cells (7 PI)
1317 00:23:07.296392 u1DelayCellOfst[3]=0 cells (0 PI)
1318 00:23:07.296460 u1DelayCellOfst[4]=6 cells (5 PI)
1319 00:23:07.296526 u1DelayCellOfst[5]=3 cells (3 PI)
1320 00:23:07.296584 u1DelayCellOfst[6]=5 cells (4 PI)
1321 00:23:07.296642 u1DelayCellOfst[7]=7 cells (6 PI)
1322 00:23:07.296700 Byte0, DQ PI dly=983, DQM PI dly= 986
1323 00:23:07.296759 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
1324 00:23:07.296818
1325 00:23:07.296876 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
1326 00:23:07.296934
1327 00:23:07.296991 u1DelayCellOfst[8]=0 cells (0 PI)
1328 00:23:07.297048 u1DelayCellOfst[9]=2 cells (2 PI)
1329 00:23:07.297106 u1DelayCellOfst[10]=9 cells (7 PI)
1330 00:23:07.297163 u1DelayCellOfst[11]=1 cells (1 PI)
1331 00:23:07.297221 u1DelayCellOfst[12]=2 cells (2 PI)
1332 00:23:07.297280 u1DelayCellOfst[13]=3 cells (3 PI)
1333 00:23:07.297337 u1DelayCellOfst[14]=5 cells (4 PI)
1334 00:23:07.297394 u1DelayCellOfst[15]=7 cells (6 PI)
1335 00:23:07.297465 Byte1, DQ PI dly=979, DQM PI dly= 982
1336 00:23:07.297525 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1337 00:23:07.297583
1338 00:23:07.297641 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1339 00:23:07.297699
1340 00:23:07.297756 Write Rank0 MR14 =0x1e
1341 00:23:07.297813
1342 00:23:07.297871 Final TX Range 0 Vref 30
1343 00:23:07.297929
1344 00:23:07.297986 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1345 00:23:07.298045
1346 00:23:07.298102 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1347 00:23:07.298161 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1348 00:23:07.298219 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1349 00:23:07.298277 Write Rank0 MR3 =0xb0
1350 00:23:07.298334 DramC Write-DBI on
1351 00:23:07.298392 ==
1352 00:23:07.298450 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1353 00:23:07.298508 fsp= 1, odt_onoff= 1, Byte mode= 0
1354 00:23:07.298567 ==
1355 00:23:07.298625 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1356 00:23:07.298683
1357 00:23:07.298740 Begin, DQ Scan Range 702~766
1358 00:23:07.298798
1359 00:23:07.298855
1360 00:23:07.298912 TX Vref Scan disable
1361 00:23:07.298970 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1362 00:23:07.299030 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1363 00:23:07.299089 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1364 00:23:07.299148 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1365 00:23:07.299207 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1366 00:23:07.299266 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1367 00:23:07.299324 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1368 00:23:07.299384 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1369 00:23:07.299443 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1370 00:23:07.299502 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1371 00:23:07.299565 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1372 00:23:07.299625 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1373 00:23:07.299684 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1374 00:23:07.299742 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1375 00:23:07.299801 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1376 00:23:07.299860 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1377 00:23:07.299919 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1378 00:23:07.299977 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1379 00:23:07.300036 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1380 00:23:07.300096 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1381 00:23:07.300155 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1382 00:23:07.300214 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1383 00:23:07.300273 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1384 00:23:07.300331 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1385 00:23:07.300390 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1386 00:23:07.300450 Byte0, DQ PI dly=732, DQM PI dly= 732
1387 00:23:07.300523 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1388 00:23:07.300586
1389 00:23:07.300644 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1390 00:23:07.300703
1391 00:23:07.300761 Byte1, DQ PI dly=726, DQM PI dly= 726
1392 00:23:07.300818 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 22)
1393 00:23:07.300877
1394 00:23:07.300934 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 22)
1395 00:23:07.300992
1396 00:23:07.301050 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1397 00:23:07.301108 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1398 00:23:07.301167 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1399 00:23:07.301225 Write Rank0 MR3 =0x30
1400 00:23:07.301283 DramC Write-DBI off
1401 00:23:07.301340
1402 00:23:07.301397 [DATLAT]
1403 00:23:07.301466 Freq=1600, CH0 RK0, use_rxtx_scan=0
1404 00:23:07.301526
1405 00:23:07.301583 DATLAT Default: 0xf
1406 00:23:07.301641 7, 0xFFFF, sum=0
1407 00:23:07.301700 8, 0xFFFF, sum=0
1408 00:23:07.301759 9, 0xFFFF, sum=0
1409 00:23:07.301818 10, 0xFFFF, sum=0
1410 00:23:07.301877 11, 0xFFFF, sum=0
1411 00:23:07.301936 12, 0xFFFF, sum=0
1412 00:23:07.301995 13, 0xFFFF, sum=0
1413 00:23:07.302053 14, 0x0, sum=1
1414 00:23:07.302111 15, 0x0, sum=2
1415 00:23:07.302170 16, 0x0, sum=3
1416 00:23:07.302229 17, 0x0, sum=4
1417 00:23:07.302288 pattern=2 first_step=14 total pass=5 best_step=16
1418 00:23:07.302346 ==
1419 00:23:07.302405 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1420 00:23:07.302463 fsp= 1, odt_onoff= 1, Byte mode= 0
1421 00:23:07.302522 ==
1422 00:23:07.302580 Start DQ dly to find pass range UseTestEngine =1
1423 00:23:07.302638 x-axis: bit #, y-axis: DQ dly (-127~63)
1424 00:23:07.302696 RX Vref Scan = 1
1425 00:23:07.302753
1426 00:23:07.302810 RX Vref found, early break!
1427 00:23:07.302868
1428 00:23:07.302925 Final RX Vref 11, apply to both rank0 and 1
1429 00:23:07.302983 ==
1430 00:23:07.303040 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1431 00:23:07.303098 fsp= 1, odt_onoff= 1, Byte mode= 0
1432 00:23:07.303156 ==
1433 00:23:07.303213 DQS Delay:
1434 00:23:07.303271 DQS0 = 0, DQS1 = 0
1435 00:23:07.303328 DQM Delay:
1436 00:23:07.303385 DQM0 = 19, DQM1 = 17
1437 00:23:07.303442 DQ Delay:
1438 00:23:07.303697 DQ0 =22, DQ1 =22, DQ2 =23, DQ3 =14
1439 00:23:07.303763 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =20
1440 00:23:07.303822 DQ8 =13, DQ9 =17, DQ10 =23, DQ11 =15
1441 00:23:07.303881 DQ12 =17, DQ13 =16, DQ14 =18, DQ15 =20
1442 00:23:07.303940
1443 00:23:07.303998
1444 00:23:07.304055
1445 00:23:07.304113 [DramC_TX_OE_Calibration] TA2
1446 00:23:07.304171 Original DQ_B0 (3 6) =30, OEN = 27
1447 00:23:07.304230 Original DQ_B1 (3 6) =30, OEN = 27
1448 00:23:07.304288 23, 0x0, End_B0=23 End_B1=23
1449 00:23:07.304347 24, 0x0, End_B0=24 End_B1=24
1450 00:23:07.304406 25, 0x0, End_B0=25 End_B1=25
1451 00:23:07.304465 26, 0x0, End_B0=26 End_B1=26
1452 00:23:07.304523 27, 0x0, End_B0=27 End_B1=27
1453 00:23:07.304583 28, 0x0, End_B0=28 End_B1=28
1454 00:23:07.304642 29, 0x0, End_B0=29 End_B1=29
1455 00:23:07.304708 30, 0x0, End_B0=30 End_B1=30
1456 00:23:07.304779 31, 0xFFFF, End_B0=30 End_B1=30
1457 00:23:07.304839 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1458 00:23:07.304897 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1459 00:23:07.304955
1460 00:23:07.305012
1461 00:23:07.305069 Write Rank0 MR23 =0x3f
1462 00:23:07.305127 [DQSOSC]
1463 00:23:07.305185 [DQSOSCAuto] RK0, (LSB)MR18= 0xc2c2, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
1464 00:23:07.305244 CH0_RK0: MR19=0x202, MR18=0xC2C2, DQSOSC=446, MR23=63, INC=12, DEC=18
1465 00:23:07.305303 Write Rank0 MR23 =0x3f
1466 00:23:07.305361 [DQSOSC]
1467 00:23:07.305419 [DQSOSCAuto] RK0, (LSB)MR18= 0xc1c1, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
1468 00:23:07.305488 CH0 RK0: MR19=202, MR18=C1C1
1469 00:23:07.305547 [RankSwap] Rank num 2, (Multi 1), Rank 1
1470 00:23:07.305605 Write Rank0 MR2 =0xad
1471 00:23:07.305663 [Write Leveling]
1472 00:23:07.305721 delay byte0 byte1 byte2 byte3
1473 00:23:07.305778
1474 00:23:07.305835 10 0 0
1475 00:23:07.305894 11 0 0
1476 00:23:07.305953 12 0 0
1477 00:23:07.306012 13 0 0
1478 00:23:07.306070 14 0 0
1479 00:23:07.306129 15 0 0
1480 00:23:07.306187 16 0 0
1481 00:23:07.306246 17 0 0
1482 00:23:07.306304 18 0 0
1483 00:23:07.306363 19 0 0
1484 00:23:07.306421 20 0 0
1485 00:23:07.306480 21 0 0
1486 00:23:07.306538 22 0 0
1487 00:23:07.306595 23 0 0
1488 00:23:07.306653 24 0 ff
1489 00:23:07.306712 25 0 ff
1490 00:23:07.306770 26 ff ff
1491 00:23:07.306829 27 ff ff
1492 00:23:07.306887 28 ff ff
1493 00:23:07.306945 29 ff ff
1494 00:23:07.307004 30 ff ff
1495 00:23:07.307063 31 ff ff
1496 00:23:07.307121 32 ff ff
1497 00:23:07.307180 pass bytecount = 0xff (0xff: all bytes pass)
1498 00:23:07.307239
1499 00:23:07.307296 DQS0 dly: 26
1500 00:23:07.307353 DQS1 dly: 24
1501 00:23:07.307410 Write Rank0 MR2 =0x2d
1502 00:23:07.307468 [RankSwap] Rank num 2, (Multi 1), Rank 0
1503 00:23:07.307525 Write Rank1 MR1 =0xd6
1504 00:23:07.307583 [Gating]
1505 00:23:07.307640 ==
1506 00:23:07.307698 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1507 00:23:07.307756 fsp= 1, odt_onoff= 1, Byte mode= 0
1508 00:23:07.307814 ==
1509 00:23:07.307871 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1510 00:23:07.307931 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1511 00:23:07.307990 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1512 00:23:07.308050 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1513 00:23:07.308108 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1514 00:23:07.308167 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1515 00:23:07.308226 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1516 00:23:07.308285 [Byte 0] Lead/lag falling Transition (3, 1, 24)
1517 00:23:07.308343 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1518 00:23:07.308401 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1519 00:23:07.308460 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1520 00:23:07.308518 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1521 00:23:07.308576 3 2 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1522 00:23:07.308635 [Byte 0] Lead/lag Transition tap number (6)
1523 00:23:07.308693 3 2 16 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1524 00:23:07.308752 3 2 20 |201 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1525 00:23:07.308811 3 2 24 |3534 2727 |(11 11)(11 11) |(0 0)(0 0)| 0
1526 00:23:07.308870 3 2 28 |3534 909 |(11 11)(11 11) |(0 0)(0 0)| 0
1527 00:23:07.308953 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1528 00:23:07.309014 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1529 00:23:07.309074 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1530 00:23:07.309133 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1531 00:23:07.309192 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1532 00:23:07.309252 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1533 00:23:07.309311 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1534 00:23:07.309370 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1535 00:23:07.309434 [Byte 1] Lead/lag falling Transition (3, 3, 28)
1536 00:23:07.309497 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1537 00:23:07.309556 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1538 00:23:07.309615 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1539 00:23:07.309674 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1540 00:23:07.309733 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1541 00:23:07.309792 3 4 20 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1542 00:23:07.309851 3 4 24 |100f 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1543 00:23:07.309910 3 4 28 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
1544 00:23:07.309968 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1545 00:23:07.310027 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1546 00:23:07.310086 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1547 00:23:07.310145 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1548 00:23:07.310204 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1549 00:23:07.310263 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1550 00:23:07.310321 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1551 00:23:07.310379 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1552 00:23:07.310438 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1553 00:23:07.310496 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1554 00:23:07.310751 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1555 00:23:07.310817 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 00:23:07.310877 [Byte 0] Lead/lag falling Transition (3, 6, 12)
1557 00:23:07.310937 [Byte 1] Lead/lag falling Transition (3, 6, 12)
1558 00:23:07.310996 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1559 00:23:07.311056 [Byte 0] Lead/lag Transition tap number (2)
1560 00:23:07.311113 3 6 20 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1561 00:23:07.311173 [Byte 1] Lead/lag Transition tap number (3)
1562 00:23:07.311231 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1563 00:23:07.311290 [Byte 0]First pass (3, 6, 24)
1564 00:23:07.311348 3 6 28 |4646 e0e |(0 0)(11 11) |(0 0)(0 0)| 0
1565 00:23:07.311407 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1566 00:23:07.311467 [Byte 1]First pass (3, 7, 0)
1567 00:23:07.311525 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1568 00:23:07.311583 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1569 00:23:07.311643 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1570 00:23:07.311701 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1571 00:23:07.311760 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1572 00:23:07.311819 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1573 00:23:07.311879 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1574 00:23:07.311937 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1575 00:23:07.311996 All bytes gating window > 1UI, Early break!
1576 00:23:07.312054
1577 00:23:07.312111 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 16)
1578 00:23:07.312169
1579 00:23:07.312227 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
1580 00:23:07.312283
1581 00:23:07.312340
1582 00:23:07.312397
1583 00:23:07.312454 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
1584 00:23:07.312512
1585 00:23:07.312568 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
1586 00:23:07.312626
1587 00:23:07.312684
1588 00:23:07.312741 Write Rank1 MR1 =0x56
1589 00:23:07.312798
1590 00:23:07.312855 best RODT dly(2T, 0.5T) = (2, 3)
1591 00:23:07.312913
1592 00:23:07.312978 best RODT dly(2T, 0.5T) = (2, 3)
1593 00:23:07.313046 ==
1594 00:23:07.313105 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1595 00:23:07.313164 fsp= 1, odt_onoff= 1, Byte mode= 0
1596 00:23:07.313223 ==
1597 00:23:07.313281 Start DQ dly to find pass range UseTestEngine =0
1598 00:23:07.313339 x-axis: bit #, y-axis: DQ dly (-127~63)
1599 00:23:07.313397 RX Vref Scan = 0
1600 00:23:07.313467 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1601 00:23:07.313528 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1602 00:23:07.313587 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1603 00:23:07.313645 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1604 00:23:07.313704 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1605 00:23:07.313763 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1606 00:23:07.313822 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1607 00:23:07.313882 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1608 00:23:07.313941 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1609 00:23:07.314000 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1610 00:23:07.314059 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1611 00:23:07.314118 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1612 00:23:07.314177 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1613 00:23:07.314237 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1614 00:23:07.314296 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1615 00:23:07.314355 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1616 00:23:07.314414 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1617 00:23:07.314472 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1618 00:23:07.314531 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1619 00:23:07.314590 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1620 00:23:07.314649 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1621 00:23:07.314708 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1622 00:23:07.314766 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1623 00:23:07.314825 -3, [0] xxxxxxxx oxxoxxxx [MSB]
1624 00:23:07.314883 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1625 00:23:07.314941 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1626 00:23:07.315000 0, [0] xxxoxoxx ooxoooxx [MSB]
1627 00:23:07.315059 1, [0] xxxoxoox ooxoooxx [MSB]
1628 00:23:07.315118 2, [0] xxxoxoox ooxoooox [MSB]
1629 00:23:07.315177 3, [0] xxxooooo ooxoooox [MSB]
1630 00:23:07.315235 4, [0] ooxooooo ooxooooo [MSB]
1631 00:23:07.315293 5, [0] oooooooo ooxooooo [MSB]
1632 00:23:07.315352 32, [0] oooxoooo oooooooo [MSB]
1633 00:23:07.315411 33, [0] oooxoooo xooooooo [MSB]
1634 00:23:07.315471 34, [0] oooxoooo xooooooo [MSB]
1635 00:23:07.315530 35, [0] oooxoxoo xxoxoooo [MSB]
1636 00:23:07.315589 36, [0] oooxoxxo xxoxxooo [MSB]
1637 00:23:07.315648 37, [0] oooxoxxx xxoxxxxo [MSB]
1638 00:23:07.315707 38, [0] oooxoxxx xxoxxxxo [MSB]
1639 00:23:07.315766 39, [0] ooxxxxxx xxoxxxxx [MSB]
1640 00:23:07.315824 40, [0] xoxxxxxx xxoxxxxx [MSB]
1641 00:23:07.315883 41, [0] xxxxxxxx xxoxxxxx [MSB]
1642 00:23:07.315942 42, [0] xxxxxxxx xxxxxxxx [MSB]
1643 00:23:07.316001 iDelay=42, Bit 0, Center 21 (4 ~ 39) 36
1644 00:23:07.316059 iDelay=42, Bit 1, Center 22 (4 ~ 40) 37
1645 00:23:07.316117 iDelay=42, Bit 2, Center 21 (5 ~ 38) 34
1646 00:23:07.316176 iDelay=42, Bit 3, Center 14 (-2 ~ 31) 34
1647 00:23:07.316234 iDelay=42, Bit 4, Center 20 (3 ~ 38) 36
1648 00:23:07.316291 iDelay=42, Bit 5, Center 17 (0 ~ 34) 35
1649 00:23:07.316349 iDelay=42, Bit 6, Center 18 (1 ~ 35) 35
1650 00:23:07.316406 iDelay=42, Bit 7, Center 19 (3 ~ 36) 34
1651 00:23:07.316464 iDelay=42, Bit 8, Center 14 (-3 ~ 32) 36
1652 00:23:07.316521 iDelay=42, Bit 9, Center 17 (0 ~ 34) 35
1653 00:23:07.316579 iDelay=42, Bit 10, Center 23 (6 ~ 41) 36
1654 00:23:07.316636 iDelay=42, Bit 11, Center 15 (-3 ~ 34) 38
1655 00:23:07.316694 iDelay=42, Bit 12, Center 17 (0 ~ 35) 36
1656 00:23:07.316752 iDelay=42, Bit 13, Center 18 (0 ~ 36) 37
1657 00:23:07.316809 iDelay=42, Bit 14, Center 19 (2 ~ 36) 35
1658 00:23:07.316867 iDelay=42, Bit 15, Center 21 (4 ~ 38) 35
1659 00:23:07.316925 ==
1660 00:23:07.316983 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1661 00:23:07.317041 fsp= 1, odt_onoff= 1, Byte mode= 0
1662 00:23:07.317104 ==
1663 00:23:07.317170 DQS Delay:
1664 00:23:07.317228 DQS0 = 0, DQS1 = 0
1665 00:23:07.317286 DQM Delay:
1666 00:23:07.317344 DQM0 = 19, DQM1 = 18
1667 00:23:07.317401 DQ Delay:
1668 00:23:07.317474 DQ0 =21, DQ1 =22, DQ2 =21, DQ3 =14
1669 00:23:07.317540 DQ4 =20, DQ5 =17, DQ6 =18, DQ7 =19
1670 00:23:07.317597 DQ8 =14, DQ9 =17, DQ10 =23, DQ11 =15
1671 00:23:07.317655 DQ12 =17, DQ13 =18, DQ14 =19, DQ15 =21
1672 00:23:07.317713
1673 00:23:07.317771
1674 00:23:07.317828 DramC Write-DBI off
1675 00:23:07.317885 ==
1676 00:23:07.317943 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1677 00:23:07.318001 fsp= 1, odt_onoff= 1, Byte mode= 0
1678 00:23:07.318059 ==
1679 00:23:07.318116 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1680 00:23:07.318175
1681 00:23:07.318233 Begin, DQ Scan Range 920~1176
1682 00:23:07.318291
1683 00:23:07.318544
1684 00:23:07.318610 TX Vref Scan disable
1685 00:23:07.318670 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1686 00:23:07.318730 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1687 00:23:07.318790 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1688 00:23:07.318850 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1689 00:23:07.318909 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1690 00:23:07.318968 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1691 00:23:07.319027 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1692 00:23:07.319086 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1693 00:23:07.319145 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1694 00:23:07.319203 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1695 00:23:07.319262 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1696 00:23:07.319322 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1697 00:23:07.319380 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1698 00:23:07.319439 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1699 00:23:07.319498 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1700 00:23:07.319557 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1701 00:23:07.319616 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1702 00:23:07.319675 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1703 00:23:07.319733 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1704 00:23:07.319792 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1705 00:23:07.319852 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1706 00:23:07.319911 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1707 00:23:07.319970 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1708 00:23:07.320028 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1709 00:23:07.320087 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1710 00:23:07.320146 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1711 00:23:07.320205 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1712 00:23:07.320263 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1713 00:23:07.320322 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1714 00:23:07.320380 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1715 00:23:07.320439 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1716 00:23:07.320498 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1717 00:23:07.320557 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1718 00:23:07.320616 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1719 00:23:07.320674 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1720 00:23:07.320733 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1721 00:23:07.320792 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1722 00:23:07.320851 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1723 00:23:07.320910 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1724 00:23:07.320969 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1725 00:23:07.321028 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1726 00:23:07.321086 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1727 00:23:07.321145 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1728 00:23:07.321203 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1729 00:23:07.321261 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1730 00:23:07.321336 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1731 00:23:07.321399 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1732 00:23:07.321474 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1733 00:23:07.321534 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1734 00:23:07.321592 969 |3 6 9|[0] xxxxxxxx oxxxxxxx [MSB]
1735 00:23:07.321651 970 |3 6 10|[0] xxxxxxxx oxxoxxxx [MSB]
1736 00:23:07.321710 971 |3 6 11|[0] xxxxxxxx oxxoxxxx [MSB]
1737 00:23:07.321769 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1738 00:23:07.321829 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1739 00:23:07.321888 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1740 00:23:07.321947 975 |3 6 15|[0] xxxxxxxx ooxooooo [MSB]
1741 00:23:07.322006 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1742 00:23:07.322065 977 |3 6 17|[0] xoxooooo oooooooo [MSB]
1743 00:23:07.322124 990 |3 6 30|[0] oooooooo oooxoooo [MSB]
1744 00:23:07.322183 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1745 00:23:07.322242 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1746 00:23:07.322301 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1747 00:23:07.322359 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1748 00:23:07.322418 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1749 00:23:07.322477 996 |3 6 36|[0] xxxxxxxx xxxxxxxx [MSB]
1750 00:23:07.322536 Byte0, DQ PI dly=985, DQM PI dly= 985
1751 00:23:07.322594 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1752 00:23:07.322653
1753 00:23:07.322711 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1754 00:23:07.322769
1755 00:23:07.322827 Byte1, DQ PI dly=981, DQM PI dly= 981
1756 00:23:07.322885 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1757 00:23:07.322943
1758 00:23:07.323001 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1759 00:23:07.323059
1760 00:23:07.323116 ==
1761 00:23:07.323175 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1762 00:23:07.323233 fsp= 1, odt_onoff= 1, Byte mode= 0
1763 00:23:07.323291 ==
1764 00:23:07.323348 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1765 00:23:07.323406
1766 00:23:07.323464 Begin, DQ Scan Range 957~1021
1767 00:23:07.323521 Write Rank1 MR14 =0x0
1768 00:23:07.323579
1769 00:23:07.323637 CH=0, VrefRange= 0, VrefLevel = 0
1770 00:23:07.323695 TX Bit0 (980~992) 13 986, Bit8 (972~984) 13 978,
1771 00:23:07.323754 TX Bit1 (979~992) 14 985, Bit9 (974~984) 11 979,
1772 00:23:07.323813 TX Bit2 (980~991) 12 985, Bit10 (978~991) 14 984,
1773 00:23:07.323870 TX Bit3 (974~988) 15 981, Bit11 (974~983) 10 978,
1774 00:23:07.323928 TX Bit4 (978~991) 14 984, Bit12 (976~984) 9 980,
1775 00:23:07.323986 TX Bit5 (977~986) 10 981, Bit13 (974~986) 13 980,
1776 00:23:07.324044 TX Bit6 (977~990) 14 983, Bit14 (974~990) 17 982,
1777 00:23:07.324102 TX Bit7 (979~992) 14 985, Bit15 (977~990) 14 983,
1778 00:23:07.324160
1779 00:23:07.324217 Write Rank1 MR14 =0x2
1780 00:23:07.324275
1781 00:23:07.324332 CH=0, VrefRange= 0, VrefLevel = 2
1782 00:23:07.324390 TX Bit0 (979~992) 14 985, Bit8 (971~984) 14 977,
1783 00:23:07.324449 TX Bit1 (978~993) 16 985, Bit9 (974~985) 12 979,
1784 00:23:07.324507 TX Bit2 (980~992) 13 986, Bit10 (977~992) 16 984,
1785 00:23:07.324566 TX Bit3 (974~988) 15 981, Bit11 (973~983) 11 978,
1786 00:23:07.324624 TX Bit4 (978~992) 15 985, Bit12 (975~985) 11 980,
1787 00:23:07.324682 TX Bit5 (977~988) 12 982, Bit13 (974~986) 13 980,
1788 00:23:07.324740 TX Bit6 (977~991) 15 984, Bit14 (974~991) 18 982,
1789 00:23:07.324994 TX Bit7 (978~992) 15 985, Bit15 (977~991) 15 984,
1790 00:23:07.325058
1791 00:23:07.325133 Write Rank1 MR14 =0x4
1792 00:23:07.325197
1793 00:23:07.325254 CH=0, VrefRange= 0, VrefLevel = 4
1794 00:23:07.325312 TX Bit0 (979~993) 15 986, Bit8 (970~985) 16 977,
1795 00:23:07.325371 TX Bit1 (978~993) 16 985, Bit9 (974~985) 12 979,
1796 00:23:07.325439 TX Bit2 (979~992) 14 985, Bit10 (977~992) 16 984,
1797 00:23:07.325500 TX Bit3 (973~988) 16 980, Bit11 (973~984) 12 978,
1798 00:23:07.325558 TX Bit4 (978~992) 15 985, Bit12 (975~985) 11 980,
1799 00:23:07.325618 TX Bit5 (977~989) 13 983, Bit13 (974~987) 14 980,
1800 00:23:07.325676 TX Bit6 (977~991) 15 984, Bit14 (974~991) 18 982,
1801 00:23:07.325734 TX Bit7 (978~993) 16 985, Bit15 (977~992) 16 984,
1802 00:23:07.325792
1803 00:23:07.325849 Write Rank1 MR14 =0x6
1804 00:23:07.325906
1805 00:23:07.325963 CH=0, VrefRange= 0, VrefLevel = 6
1806 00:23:07.326021 TX Bit0 (979~993) 15 986, Bit8 (970~986) 17 978,
1807 00:23:07.326079 TX Bit1 (978~994) 17 986, Bit9 (974~987) 14 980,
1808 00:23:07.326137 TX Bit2 (979~993) 15 986, Bit10 (977~993) 17 985,
1809 00:23:07.326195 TX Bit3 (973~990) 18 981, Bit11 (972~985) 14 978,
1810 00:23:07.326252 TX Bit4 (978~993) 16 985, Bit12 (974~986) 13 980,
1811 00:23:07.326311 TX Bit5 (976~990) 15 983, Bit13 (974~988) 15 981,
1812 00:23:07.326369 TX Bit6 (977~992) 16 984, Bit14 (974~991) 18 982,
1813 00:23:07.326428 TX Bit7 (978~993) 16 985, Bit15 (977~992) 16 984,
1814 00:23:07.326485
1815 00:23:07.326543 wait MRW command Rank1 MR14 =0x8 fired (1)
1816 00:23:07.326601 Write Rank1 MR14 =0x8
1817 00:23:07.326658
1818 00:23:07.326715 CH=0, VrefRange= 0, VrefLevel = 8
1819 00:23:07.326772 TX Bit0 (979~994) 16 986, Bit8 (970~986) 17 978,
1820 00:23:07.326831 TX Bit1 (978~994) 17 986, Bit9 (973~988) 16 980,
1821 00:23:07.326889 TX Bit2 (979~993) 15 986, Bit10 (977~992) 16 984,
1822 00:23:07.326947 TX Bit3 (972~991) 20 981, Bit11 (972~985) 14 978,
1823 00:23:07.327005 TX Bit4 (978~993) 16 985, Bit12 (974~988) 15 981,
1824 00:23:07.327062 TX Bit5 (976~991) 16 983, Bit13 (973~989) 17 981,
1825 00:23:07.327121 TX Bit6 (976~992) 17 984, Bit14 (973~992) 20 982,
1826 00:23:07.327179 TX Bit7 (978~994) 17 986, Bit15 (976~992) 17 984,
1827 00:23:07.327237
1828 00:23:07.327293 Write Rank1 MR14 =0xa
1829 00:23:07.327350
1830 00:23:07.327408 CH=0, VrefRange= 0, VrefLevel = 10
1831 00:23:07.327466 TX Bit0 (978~994) 17 986, Bit8 (969~988) 20 978,
1832 00:23:07.327524 TX Bit1 (978~995) 18 986, Bit9 (973~988) 16 980,
1833 00:23:07.327582 TX Bit2 (979~994) 16 986, Bit10 (976~993) 18 984,
1834 00:23:07.327641 TX Bit3 (972~991) 20 981, Bit11 (971~986) 16 978,
1835 00:23:07.327699 TX Bit4 (978~994) 17 986, Bit12 (973~988) 16 980,
1836 00:23:07.327757 TX Bit5 (976~991) 16 983, Bit13 (973~990) 18 981,
1837 00:23:07.327815 TX Bit6 (976~993) 18 984, Bit14 (973~992) 20 982,
1838 00:23:07.327873 TX Bit7 (978~994) 17 986, Bit15 (976~993) 18 984,
1839 00:23:07.327930
1840 00:23:07.327986 Write Rank1 MR14 =0xc
1841 00:23:07.328043
1842 00:23:07.328100 CH=0, VrefRange= 0, VrefLevel = 12
1843 00:23:07.328158 TX Bit0 (978~995) 18 986, Bit8 (969~989) 21 979,
1844 00:23:07.328215 TX Bit1 (977~995) 19 986, Bit9 (973~989) 17 981,
1845 00:23:07.328273 TX Bit2 (979~994) 16 986, Bit10 (976~994) 19 985,
1846 00:23:07.328331 TX Bit3 (972~991) 20 981, Bit11 (970~986) 17 978,
1847 00:23:07.328389 TX Bit4 (977~994) 18 985, Bit12 (973~989) 17 981,
1848 00:23:07.328447 TX Bit5 (976~992) 17 984, Bit13 (972~990) 19 981,
1849 00:23:07.328505 TX Bit6 (976~993) 18 984, Bit14 (972~993) 22 982,
1850 00:23:07.328563 TX Bit7 (978~995) 18 986, Bit15 (976~994) 19 985,
1851 00:23:07.328620
1852 00:23:07.328677 Write Rank1 MR14 =0xe
1853 00:23:07.328734
1854 00:23:07.328790 CH=0, VrefRange= 0, VrefLevel = 14
1855 00:23:07.328848 TX Bit0 (978~996) 19 987, Bit8 (969~989) 21 979,
1856 00:23:07.328907 TX Bit1 (977~996) 20 986, Bit9 (972~990) 19 981,
1857 00:23:07.328965 TX Bit2 (978~995) 18 986, Bit10 (976~995) 20 985,
1858 00:23:07.329023 TX Bit3 (971~991) 21 981, Bit11 (970~988) 19 979,
1859 00:23:07.329081 TX Bit4 (978~995) 18 986, Bit12 (972~990) 19 981,
1860 00:23:07.329139 TX Bit5 (975~992) 18 983, Bit13 (972~991) 20 981,
1861 00:23:07.329197 TX Bit6 (976~994) 19 985, Bit14 (972~993) 22 982,
1862 00:23:07.329254 TX Bit7 (978~995) 18 986, Bit15 (975~995) 21 985,
1863 00:23:07.329312
1864 00:23:07.329369 Write Rank1 MR14 =0x10
1865 00:23:07.329426
1866 00:23:07.329495 CH=0, VrefRange= 0, VrefLevel = 16
1867 00:23:07.329553 TX Bit0 (978~996) 19 987, Bit8 (969~990) 22 979,
1868 00:23:07.329612 TX Bit1 (977~997) 21 987, Bit9 (971~990) 20 980,
1869 00:23:07.329670 TX Bit2 (978~996) 19 987, Bit10 (976~997) 22 986,
1870 00:23:07.329728 TX Bit3 (971~991) 21 981, Bit11 (970~988) 19 979,
1871 00:23:07.329807 TX Bit4 (977~995) 19 986, Bit12 (972~990) 19 981,
1872 00:23:07.329870 TX Bit5 (975~993) 19 984, Bit13 (972~991) 20 981,
1873 00:23:07.329929 TX Bit6 (976~994) 19 985, Bit14 (971~993) 23 982,
1874 00:23:07.329987 TX Bit7 (977~996) 20 986, Bit15 (975~996) 22 985,
1875 00:23:07.330046
1876 00:23:07.330104 Write Rank1 MR14 =0x12
1877 00:23:07.330161
1878 00:23:07.330219 CH=0, VrefRange= 0, VrefLevel = 18
1879 00:23:07.330276 TX Bit0 (977~997) 21 987, Bit8 (968~990) 23 979,
1880 00:23:07.330335 TX Bit1 (977~997) 21 987, Bit9 (971~990) 20 980,
1881 00:23:07.330393 TX Bit2 (978~996) 19 987, Bit10 (976~997) 22 986,
1882 00:23:07.330451 TX Bit3 (971~992) 22 981, Bit11 (969~989) 21 979,
1883 00:23:07.330509 TX Bit4 (977~996) 20 986, Bit12 (971~990) 20 980,
1884 00:23:07.330567 TX Bit5 (975~993) 19 984, Bit13 (971~991) 21 981,
1885 00:23:07.330624 TX Bit6 (975~995) 21 985, Bit14 (971~994) 24 982,
1886 00:23:07.330683 TX Bit7 (977~997) 21 987, Bit15 (975~996) 22 985,
1887 00:23:07.330741
1888 00:23:07.330798 Write Rank1 MR14 =0x14
1889 00:23:07.330855
1890 00:23:07.330913 CH=0, VrefRange= 0, VrefLevel = 20
1891 00:23:07.330970 TX Bit0 (977~998) 22 987, Bit8 (968~990) 23 979,
1892 00:23:07.331228 TX Bit1 (977~998) 22 987, Bit9 (970~991) 22 980,
1893 00:23:07.331299 TX Bit2 (977~997) 21 987, Bit10 (975~997) 23 986,
1894 00:23:07.331359 TX Bit3 (970~992) 23 981, Bit11 (969~990) 22 979,
1895 00:23:07.331418 TX Bit4 (977~997) 21 987, Bit12 (971~991) 21 981,
1896 00:23:07.331477 TX Bit5 (974~993) 20 983, Bit13 (971~992) 22 981,
1897 00:23:07.331535 TX Bit6 (975~995) 21 985, Bit14 (971~994) 24 982,
1898 00:23:07.331594 TX Bit7 (977~997) 21 987, Bit15 (975~996) 22 985,
1899 00:23:07.331652
1900 00:23:07.331710 Write Rank1 MR14 =0x16
1901 00:23:07.331768
1902 00:23:07.331825 CH=0, VrefRange= 0, VrefLevel = 22
1903 00:23:07.331882 TX Bit0 (977~999) 23 988, Bit8 (968~991) 24 979,
1904 00:23:07.331941 TX Bit1 (977~999) 23 988, Bit9 (971~991) 21 981,
1905 00:23:07.331999 TX Bit2 (978~998) 21 988, Bit10 (975~998) 24 986,
1906 00:23:07.332057 TX Bit3 (970~992) 23 981, Bit11 (969~990) 22 979,
1907 00:23:07.332115 TX Bit4 (976~998) 23 987, Bit12 (970~991) 22 980,
1908 00:23:07.469101 TX Bit5 (974~994) 21 984, Bit13 (970~992) 23 981,
1909 00:23:07.469246 TX Bit6 (975~995) 21 985, Bit14 (971~995) 25 983,
1910 00:23:07.469347 TX Bit7 (977~998) 22 987, Bit15 (975~998) 24 986,
1911 00:23:07.469454
1912 00:23:07.469523 Write Rank1 MR14 =0x18
1913 00:23:07.469586
1914 00:23:07.469648 CH=0, VrefRange= 0, VrefLevel = 24
1915 00:23:07.469708 TX Bit0 (977~999) 23 988, Bit8 (968~991) 24 979,
1916 00:23:07.469769 TX Bit1 (976~999) 24 987, Bit9 (970~991) 22 980,
1917 00:23:07.469830 TX Bit2 (978~998) 21 988, Bit10 (975~998) 24 986,
1918 00:23:07.469890 TX Bit3 (970~993) 24 981, Bit11 (969~991) 23 980,
1919 00:23:07.469950 TX Bit4 (976~998) 23 987, Bit12 (970~991) 22 980,
1920 00:23:07.470015 TX Bit5 (974~994) 21 984, Bit13 (970~993) 24 981,
1921 00:23:07.470074 TX Bit6 (974~996) 23 985, Bit14 (970~996) 27 983,
1922 00:23:07.470134 TX Bit7 (977~999) 23 988, Bit15 (975~998) 24 986,
1923 00:23:07.470192
1924 00:23:07.470250 Write Rank1 MR14 =0x1a
1925 00:23:07.470308
1926 00:23:07.470366 CH=0, VrefRange= 0, VrefLevel = 26
1927 00:23:07.470424 TX Bit0 (977~1000) 24 988, Bit8 (968~991) 24 979,
1928 00:23:07.470483 TX Bit1 (976~999) 24 987, Bit9 (970~992) 23 981,
1929 00:23:07.470541 TX Bit2 (977~999) 23 988, Bit10 (975~998) 24 986,
1930 00:23:07.470600 TX Bit3 (970~993) 24 981, Bit11 (968~991) 24 979,
1931 00:23:07.470658 TX Bit4 (976~999) 24 987, Bit12 (970~992) 23 981,
1932 00:23:07.470730 TX Bit5 (973~994) 22 983, Bit13 (969~993) 25 981,
1933 00:23:07.470792 TX Bit6 (974~997) 24 985, Bit14 (970~996) 27 983,
1934 00:23:07.470851 TX Bit7 (976~999) 24 987, Bit15 (975~998) 24 986,
1935 00:23:07.470910
1936 00:23:07.470967 Write Rank1 MR14 =0x1c
1937 00:23:07.471025
1938 00:23:07.471082 CH=0, VrefRange= 0, VrefLevel = 28
1939 00:23:07.471140 TX Bit0 (977~1000) 24 988, Bit8 (968~992) 25 980,
1940 00:23:07.471198 TX Bit1 (976~1000) 25 988, Bit9 (969~992) 24 980,
1941 00:23:07.471256 TX Bit2 (977~999) 23 988, Bit10 (974~999) 26 986,
1942 00:23:07.471315 TX Bit3 (969~993) 25 981, Bit11 (968~991) 24 979,
1943 00:23:07.471373 TX Bit4 (976~999) 24 987, Bit12 (969~993) 25 981,
1944 00:23:07.471431 TX Bit5 (972~995) 24 983, Bit13 (969~993) 25 981,
1945 00:23:07.471489 TX Bit6 (974~998) 25 986, Bit14 (969~996) 28 982,
1946 00:23:07.471547 TX Bit7 (976~999) 24 987, Bit15 (974~998) 25 986,
1947 00:23:07.471605
1948 00:23:07.471662 Write Rank1 MR14 =0x1e
1949 00:23:07.471719
1950 00:23:07.471776 CH=0, VrefRange= 0, VrefLevel = 30
1951 00:23:07.471833 TX Bit0 (977~1000) 24 988, Bit8 (968~992) 25 980,
1952 00:23:07.471892 TX Bit1 (976~1000) 25 988, Bit9 (969~992) 24 980,
1953 00:23:07.471949 TX Bit2 (977~1000) 24 988, Bit10 (974~999) 26 986,
1954 00:23:07.472011 TX Bit3 (970~993) 24 981, Bit11 (968~992) 25 980,
1955 00:23:07.472070 TX Bit4 (976~999) 24 987, Bit12 (969~993) 25 981,
1956 00:23:07.472128 TX Bit5 (972~995) 24 983, Bit13 (969~993) 25 981,
1957 00:23:07.472186 TX Bit6 (974~998) 25 986, Bit14 (970~996) 27 983,
1958 00:23:07.472244 TX Bit7 (976~1000) 25 988, Bit15 (974~998) 25 986,
1959 00:23:07.472302
1960 00:23:07.472359 Write Rank1 MR14 =0x20
1961 00:23:07.472417
1962 00:23:07.472474 CH=0, VrefRange= 0, VrefLevel = 32
1963 00:23:07.472532 TX Bit0 (977~1000) 24 988, Bit8 (968~992) 25 980,
1964 00:23:07.472590 TX Bit1 (976~1000) 25 988, Bit9 (969~992) 24 980,
1965 00:23:07.472649 TX Bit2 (977~1000) 24 988, Bit10 (974~999) 26 986,
1966 00:23:07.472706 TX Bit3 (970~993) 24 981, Bit11 (968~992) 25 980,
1967 00:23:07.472765 TX Bit4 (976~999) 24 987, Bit12 (969~993) 25 981,
1968 00:23:07.472822 TX Bit5 (972~995) 24 983, Bit13 (969~993) 25 981,
1969 00:23:07.472881 TX Bit6 (974~998) 25 986, Bit14 (970~996) 27 983,
1970 00:23:07.472938 TX Bit7 (976~1000) 25 988, Bit15 (974~998) 25 986,
1971 00:23:07.472995
1972 00:23:07.473053 Write Rank1 MR14 =0x22
1973 00:23:07.473110
1974 00:23:07.473167 CH=0, VrefRange= 0, VrefLevel = 34
1975 00:23:07.473224 TX Bit0 (977~1000) 24 988, Bit8 (968~992) 25 980,
1976 00:23:07.473283 TX Bit1 (976~1000) 25 988, Bit9 (969~992) 24 980,
1977 00:23:07.473341 TX Bit2 (977~1000) 24 988, Bit10 (974~999) 26 986,
1978 00:23:07.473399 TX Bit3 (970~993) 24 981, Bit11 (968~992) 25 980,
1979 00:23:07.473468 TX Bit4 (976~999) 24 987, Bit12 (969~993) 25 981,
1980 00:23:07.473528 TX Bit5 (972~995) 24 983, Bit13 (969~993) 25 981,
1981 00:23:07.473586 TX Bit6 (974~998) 25 986, Bit14 (970~996) 27 983,
1982 00:23:07.473645 TX Bit7 (976~1000) 25 988, Bit15 (974~998) 25 986,
1983 00:23:07.473703
1984 00:23:07.473761 Write Rank1 MR14 =0x24
1985 00:23:07.473818
1986 00:23:07.473876 CH=0, VrefRange= 0, VrefLevel = 36
1987 00:23:07.473933 TX Bit0 (977~1000) 24 988, Bit8 (968~992) 25 980,
1988 00:23:07.473991 TX Bit1 (976~1000) 25 988, Bit9 (969~992) 24 980,
1989 00:23:07.474050 TX Bit2 (977~1000) 24 988, Bit10 (974~999) 26 986,
1990 00:23:07.474108 TX Bit3 (970~993) 24 981, Bit11 (968~992) 25 980,
1991 00:23:07.474423 TX Bit4 (976~999) 24 987, Bit12 (969~993) 25 981,
1992 00:23:07.474571 TX Bit5 (972~995) 24 983, Bit13 (969~993) 25 981,
1993 00:23:07.474684 TX Bit6 (974~998) 25 986, Bit14 (970~996) 27 983,
1994 00:23:07.474781 TX Bit7 (976~1000) 25 988, Bit15 (974~998) 25 986,
1995 00:23:07.474873
1996 00:23:07.474935
1997 00:23:07.474996 TX Vref found, early break! 373< 377
1998 00:23:07.475079 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
1999 00:23:07.475250 u1DelayCellOfst[0]=9 cells (7 PI)
2000 00:23:07.475361 u1DelayCellOfst[1]=9 cells (7 PI)
2001 00:23:07.475427 u1DelayCellOfst[2]=9 cells (7 PI)
2002 00:23:07.475488 u1DelayCellOfst[3]=0 cells (0 PI)
2003 00:23:07.475548 u1DelayCellOfst[4]=7 cells (6 PI)
2004 00:23:07.475607 u1DelayCellOfst[5]=2 cells (2 PI)
2005 00:23:07.475667 u1DelayCellOfst[6]=6 cells (5 PI)
2006 00:23:07.475727 u1DelayCellOfst[7]=9 cells (7 PI)
2007 00:23:07.475786 Byte0, DQ PI dly=981, DQM PI dly= 984
2008 00:23:07.475844 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2009 00:23:07.475904
2010 00:23:07.475963 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2011 00:23:07.476022
2012 00:23:07.476080 u1DelayCellOfst[8]=0 cells (0 PI)
2013 00:23:07.476138 u1DelayCellOfst[9]=0 cells (0 PI)
2014 00:23:07.476197 u1DelayCellOfst[10]=7 cells (6 PI)
2015 00:23:07.476275 u1DelayCellOfst[11]=0 cells (0 PI)
2016 00:23:07.476383 u1DelayCellOfst[12]=1 cells (1 PI)
2017 00:23:07.476510 u1DelayCellOfst[13]=1 cells (1 PI)
2018 00:23:07.476655 u1DelayCellOfst[14]=3 cells (3 PI)
2019 00:23:07.476757 u1DelayCellOfst[15]=7 cells (6 PI)
2020 00:23:07.476820 Byte1, DQ PI dly=980, DQM PI dly= 983
2021 00:23:07.476880 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2022 00:23:07.476940
2023 00:23:07.476999 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2024 00:23:07.477058
2025 00:23:07.477117 Write Rank1 MR14 =0x1e
2026 00:23:07.477175
2027 00:23:07.477233 Final TX Range 0 Vref 30
2028 00:23:07.477292
2029 00:23:07.477350 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2030 00:23:07.477409
2031 00:23:07.477496 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2032 00:23:07.477559 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2033 00:23:07.477619 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2034 00:23:07.477678 Write Rank1 MR3 =0xb0
2035 00:23:07.477737 DramC Write-DBI on
2036 00:23:07.477796 ==
2037 00:23:07.477865 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2038 00:23:07.477926 fsp= 1, odt_onoff= 1, Byte mode= 0
2039 00:23:07.477985 ==
2040 00:23:07.478044 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2041 00:23:07.478102
2042 00:23:07.478160 Begin, DQ Scan Range 703~767
2043 00:23:07.478218
2044 00:23:07.478276
2045 00:23:07.478334 TX Vref Scan disable
2046 00:23:07.478393 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2047 00:23:07.478453 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2048 00:23:07.478513 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2049 00:23:07.478572 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2050 00:23:07.478631 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2051 00:23:07.478690 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2052 00:23:07.478750 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2053 00:23:07.478810 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2054 00:23:07.478869 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2055 00:23:07.478929 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2056 00:23:07.478988 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2057 00:23:07.479048 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2058 00:23:07.479107 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2059 00:23:07.479167 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2060 00:23:07.479227 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2061 00:23:07.479286 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2062 00:23:07.479345 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2063 00:23:07.479405 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2064 00:23:07.479464 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2065 00:23:07.479524 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2066 00:23:07.479583 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2067 00:23:07.479643 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2068 00:23:07.479702 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
2069 00:23:07.479762 Byte0, DQ PI dly=731, DQM PI dly= 731
2070 00:23:07.479821 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
2071 00:23:07.479880
2072 00:23:07.479938 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
2073 00:23:07.479997
2074 00:23:07.480055 Byte1, DQ PI dly=725, DQM PI dly= 725
2075 00:23:07.480113 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
2076 00:23:07.480172
2077 00:23:07.480229 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
2078 00:23:07.480288
2079 00:23:07.480345 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2080 00:23:07.480405 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2081 00:23:07.480463 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2082 00:23:07.480522 Write Rank1 MR3 =0x30
2083 00:23:07.480581 DramC Write-DBI off
2084 00:23:07.480639
2085 00:23:07.480696 [DATLAT]
2086 00:23:07.480754 Freq=1600, CH0 RK1, use_rxtx_scan=0
2087 00:23:07.480813
2088 00:23:07.480871 DATLAT Default: 0x10
2089 00:23:07.480929 7, 0xFFFF, sum=0
2090 00:23:07.480989 8, 0xFFFF, sum=0
2091 00:23:07.481048 9, 0xFFFF, sum=0
2092 00:23:07.481107 10, 0xFFFF, sum=0
2093 00:23:07.481167 11, 0xFFFF, sum=0
2094 00:23:07.481226 12, 0xFFFF, sum=0
2095 00:23:07.481285 13, 0xFFFF, sum=0
2096 00:23:07.481344 14, 0x0, sum=1
2097 00:23:07.481404 15, 0x0, sum=2
2098 00:23:07.481474 16, 0x0, sum=3
2099 00:23:07.481535 17, 0x0, sum=4
2100 00:23:07.481595 pattern=2 first_step=14 total pass=5 best_step=16
2101 00:23:07.481664 ==
2102 00:23:07.481724 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2103 00:23:07.481785 fsp= 1, odt_onoff= 1, Byte mode= 0
2104 00:23:07.481844 ==
2105 00:23:07.481904 Start DQ dly to find pass range UseTestEngine =1
2106 00:23:07.481963 x-axis: bit #, y-axis: DQ dly (-127~63)
2107 00:23:07.482022 RX Vref Scan = 0
2108 00:23:07.482081 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2109 00:23:07.482141 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2110 00:23:07.482201 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2111 00:23:07.482261 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2112 00:23:07.482337 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2113 00:23:07.482401 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2114 00:23:07.483279 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2115 00:23:07.486773 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2116 00:23:07.489937 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2117 00:23:07.493318 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2118 00:23:07.496526 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2119 00:23:07.496618 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2120 00:23:07.499967 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2121 00:23:07.503267 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2122 00:23:07.506275 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2123 00:23:07.509797 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2124 00:23:07.512957 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2125 00:23:07.516260 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2126 00:23:07.519555 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2127 00:23:07.522796 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2128 00:23:07.522888 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2129 00:23:07.526156 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2130 00:23:07.529425 -4, [0] xxxxxxxx oxxxxxxx [MSB]
2131 00:23:07.532699 -3, [0] xxxxxxxx oxxoxxxx [MSB]
2132 00:23:07.535960 -2, [0] xxxoxxxx ooxoxoxx [MSB]
2133 00:23:07.539170 -1, [0] xxxoxxxx ooxoxoxx [MSB]
2134 00:23:07.542443 0, [0] xxxoxoxx ooxoooxx [MSB]
2135 00:23:07.542536 1, [0] xxxoxoox ooxoooxx [MSB]
2136 00:23:07.545761 2, [0] xxxoxoox ooxoooox [MSB]
2137 00:23:07.549045 3, [0] xxxoxooo ooxoooox [MSB]
2138 00:23:07.552325 4, [0] xoxoxooo ooxooooo [MSB]
2139 00:23:07.555464 5, [0] ooxooooo oooooooo [MSB]
2140 00:23:07.558902 32, [0] oooxoooo oooooooo [MSB]
2141 00:23:07.562078 33, [0] oooxoooo xooooooo [MSB]
2142 00:23:07.565377 34, [0] oooxoooo xooxoooo [MSB]
2143 00:23:07.568693 35, [0] oooxoxoo xxoxxxoo [MSB]
2144 00:23:07.571961 36, [0] oooxoxxo xxoxxxxo [MSB]
2145 00:23:07.575224 37, [0] oooxoxxx xxoxxxxo [MSB]
2146 00:23:07.578432 38, [0] oooxoxxx xxoxxxxx [MSB]
2147 00:23:07.578523 39, [0] oooxxxxx xxoxxxxx [MSB]
2148 00:23:07.581765 40, [0] xxoxxxxx xxoxxxxx [MSB]
2149 00:23:07.584795 41, [0] xxxxxxxx xxxxxxxx [MSB]
2150 00:23:07.588345 iDelay=41, Bit 0, Center 22 (5 ~ 39) 35
2151 00:23:07.591446 iDelay=41, Bit 1, Center 21 (4 ~ 39) 36
2152 00:23:07.594871 iDelay=41, Bit 2, Center 23 (6 ~ 40) 35
2153 00:23:07.598088 iDelay=41, Bit 3, Center 14 (-2 ~ 31) 34
2154 00:23:07.604415 iDelay=41, Bit 4, Center 21 (5 ~ 38) 34
2155 00:23:07.607802 iDelay=41, Bit 5, Center 17 (0 ~ 34) 35
2156 00:23:07.610993 iDelay=41, Bit 6, Center 18 (1 ~ 35) 35
2157 00:23:07.614471 iDelay=41, Bit 7, Center 19 (3 ~ 36) 34
2158 00:23:07.617645 iDelay=41, Bit 8, Center 14 (-4 ~ 32) 37
2159 00:23:07.620970 iDelay=41, Bit 9, Center 16 (-2 ~ 34) 37
2160 00:23:07.624133 iDelay=41, Bit 10, Center 22 (5 ~ 40) 36
2161 00:23:07.627463 iDelay=41, Bit 11, Center 15 (-3 ~ 33) 37
2162 00:23:07.630672 iDelay=41, Bit 12, Center 17 (0 ~ 34) 35
2163 00:23:07.633999 iDelay=41, Bit 13, Center 16 (-2 ~ 34) 37
2164 00:23:07.640506 iDelay=41, Bit 14, Center 18 (2 ~ 35) 34
2165 00:23:07.644037 iDelay=41, Bit 15, Center 20 (4 ~ 37) 34
2166 00:23:07.644129 ==
2167 00:23:07.647340 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2168 00:23:07.650575 fsp= 1, odt_onoff= 1, Byte mode= 0
2169 00:23:07.650666 ==
2170 00:23:07.653607 DQS Delay:
2171 00:23:07.653697 DQS0 = 0, DQS1 = 0
2172 00:23:07.653769 DQM Delay:
2173 00:23:07.656810 DQM0 = 19, DQM1 = 17
2174 00:23:07.656899 DQ Delay:
2175 00:23:07.660063 DQ0 =22, DQ1 =21, DQ2 =23, DQ3 =14
2176 00:23:07.663660 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =19
2177 00:23:07.666666 DQ8 =14, DQ9 =16, DQ10 =22, DQ11 =15
2178 00:23:07.669964 DQ12 =17, DQ13 =16, DQ14 =18, DQ15 =20
2179 00:23:07.670053
2180 00:23:07.670123
2181 00:23:07.670188
2182 00:23:07.673338 [DramC_TX_OE_Calibration] TA2
2183 00:23:07.676753 Original DQ_B0 (3 6) =30, OEN = 27
2184 00:23:07.680003 Original DQ_B1 (3 6) =30, OEN = 27
2185 00:23:07.683212 23, 0x0, End_B0=23 End_B1=23
2186 00:23:07.686372 24, 0x0, End_B0=24 End_B1=24
2187 00:23:07.689833 25, 0x0, End_B0=25 End_B1=25
2188 00:23:07.689924 26, 0x0, End_B0=26 End_B1=26
2189 00:23:07.692858 27, 0x0, End_B0=27 End_B1=27
2190 00:23:07.696181 28, 0x0, End_B0=28 End_B1=28
2191 00:23:07.699554 29, 0x0, End_B0=29 End_B1=29
2192 00:23:07.699652 30, 0x0, End_B0=30 End_B1=30
2193 00:23:07.702951 31, 0xFFFF, End_B0=30 End_B1=30
2194 00:23:07.709084 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2195 00:23:07.715807 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2196 00:23:07.715899
2197 00:23:07.715970
2198 00:23:07.716035 Write Rank1 MR23 =0x3f
2199 00:23:07.719157 [DQSOSC]
2200 00:23:07.725492 [DQSOSCAuto] RK1, (LSB)MR18= 0xa3a3, (MSB)MR19= 0x202, tDQSOscB0 = 466 ps tDQSOscB1 = 466 ps
2201 00:23:07.732029 CH0_RK1: MR19=0x202, MR18=0xA3A3, DQSOSC=466, MR23=63, INC=11, DEC=16
2202 00:23:07.735467 Write Rank1 MR23 =0x3f
2203 00:23:07.735557 [DQSOSC]
2204 00:23:07.741867 [DQSOSCAuto] RK1, (LSB)MR18= 0xa3a3, (MSB)MR19= 0x202, tDQSOscB0 = 466 ps tDQSOscB1 = 466 ps
2205 00:23:07.745198 CH0 RK1: MR19=202, MR18=A3A3
2206 00:23:07.748518 [RxdqsGatingPostProcess] freq 1600
2207 00:23:07.755103 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2208 00:23:07.755191 Rank: 0
2209 00:23:07.758395 best DQS0 dly(2T, 0.5T) = (2, 6)
2210 00:23:07.761772 best DQS1 dly(2T, 0.5T) = (2, 6)
2211 00:23:07.764955 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2212 00:23:07.768273 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2213 00:23:07.768357 Rank: 1
2214 00:23:07.771216 best DQS0 dly(2T, 0.5T) = (2, 6)
2215 00:23:07.774706 best DQS1 dly(2T, 0.5T) = (2, 6)
2216 00:23:07.778125 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2217 00:23:07.781145 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2218 00:23:07.784458 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2219 00:23:07.787747 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2220 00:23:07.794306 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2221 00:23:07.794430 Write Rank0 MR13 =0x59
2222 00:23:07.797583 ==
2223 00:23:07.800902 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2224 00:23:07.804155 fsp= 1, odt_onoff= 1, Byte mode= 0
2225 00:23:07.804271 ==
2226 00:23:07.807594 === u2Vref_new: 0x56 --> 0x3a
2227 00:23:07.810708 === u2Vref_new: 0x58 --> 0x58
2228 00:23:07.813814 === u2Vref_new: 0x5a --> 0x5a
2229 00:23:07.817286 === u2Vref_new: 0x5c --> 0x78
2230 00:23:07.820561 === u2Vref_new: 0x5e --> 0x7a
2231 00:23:07.823903 === u2Vref_new: 0x60 --> 0x90
2232 00:23:07.827051 [CA 0] Center 38 (13~63) winsize 51
2233 00:23:07.830369 [CA 1] Center 37 (11~63) winsize 53
2234 00:23:07.833328 [CA 2] Center 34 (5~63) winsize 59
2235 00:23:07.836989 [CA 3] Center 34 (6~63) winsize 58
2236 00:23:07.840011 [CA 4] Center 34 (5~63) winsize 59
2237 00:23:07.843438 [CA 5] Center 28 (-1~58) winsize 60
2238 00:23:07.843573
2239 00:23:07.846470 [CATrainingPosCal] consider 1 rank data
2240 00:23:07.849799 u2DelayCellTimex100 = 744/100 ps
2241 00:23:07.853280 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2242 00:23:07.856450 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2243 00:23:07.859691 CA2 delay=34 (5~63),Diff = 6 PI (7 cell)
2244 00:23:07.862975 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2245 00:23:07.866274 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2246 00:23:07.869554 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2247 00:23:07.869672
2248 00:23:07.876087 CA PerBit enable=1, Macro0, CA PI delay=28
2249 00:23:07.876180 === u2Vref_new: 0x5e --> 0x7a
2250 00:23:07.876252
2251 00:23:07.879617 Vref(ca) range 1: 30
2252 00:23:07.879707
2253 00:23:07.882532 CS Dly= 12 (43-0-32)
2254 00:23:07.882629 Write Rank0 MR13 =0xd8
2255 00:23:07.885764 Write Rank0 MR13 =0xd8
2256 00:23:07.889130 Write Rank0 MR12 =0x5e
2257 00:23:07.889220 Write Rank1 MR13 =0x59
2258 00:23:07.889290 ==
2259 00:23:07.895769 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2260 00:23:07.898966 fsp= 1, odt_onoff= 1, Byte mode= 0
2261 00:23:07.899057 ==
2262 00:23:07.902247 === u2Vref_new: 0x56 --> 0x3a
2263 00:23:07.905367 === u2Vref_new: 0x58 --> 0x58
2264 00:23:07.908761 === u2Vref_new: 0x5a --> 0x5a
2265 00:23:07.911907 === u2Vref_new: 0x5c --> 0x78
2266 00:23:07.911998 === u2Vref_new: 0x5e --> 0x7a
2267 00:23:07.915509 === u2Vref_new: 0x60 --> 0x90
2268 00:23:07.919062 [CA 0] Center 37 (12~63) winsize 52
2269 00:23:07.922159 [CA 1] Center 37 (12~63) winsize 52
2270 00:23:07.925479 [CA 2] Center 34 (5~63) winsize 59
2271 00:23:07.928689 [CA 3] Center 35 (7~63) winsize 57
2272 00:23:07.931912 [CA 4] Center 33 (4~63) winsize 60
2273 00:23:07.935115 [CA 5] Center 28 (-1~57) winsize 59
2274 00:23:07.935205
2275 00:23:07.938414 [CATrainingPosCal] consider 2 rank data
2276 00:23:07.941792 u2DelayCellTimex100 = 744/100 ps
2277 00:23:07.944941 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2278 00:23:07.951753 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2279 00:23:07.955126 CA2 delay=34 (5~63),Diff = 6 PI (7 cell)
2280 00:23:07.958230 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2281 00:23:07.961304 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2282 00:23:07.964526 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2283 00:23:07.964615
2284 00:23:07.967959 CA PerBit enable=1, Macro0, CA PI delay=28
2285 00:23:07.971196 === u2Vref_new: 0x5c --> 0x78
2286 00:23:07.971287
2287 00:23:07.974619 Vref(ca) range 1: 28
2288 00:23:07.974708
2289 00:23:07.974779 CS Dly= 10 (41-0-32)
2290 00:23:07.977951 Write Rank1 MR13 =0xd8
2291 00:23:07.981253 Write Rank1 MR13 =0xd8
2292 00:23:07.981380 Write Rank1 MR12 =0x5c
2293 00:23:07.984223 [RankSwap] Rank num 2, (Multi 1), Rank 0
2294 00:23:07.987624 Write Rank0 MR2 =0xad
2295 00:23:07.987704 [Write Leveling]
2296 00:23:07.991056 delay byte0 byte1 byte2 byte3
2297 00:23:07.991146
2298 00:23:07.994412 10 0 0
2299 00:23:07.994490 11 0 0
2300 00:23:07.997580 12 0 0
2301 00:23:07.997662 13 0 0
2302 00:23:07.997732 14 0 0
2303 00:23:08.001069 15 0 0
2304 00:23:08.001148 16 0 0
2305 00:23:08.003916 17 0 0
2306 00:23:08.003993 18 0 0
2307 00:23:08.007246 19 0 0
2308 00:23:08.007322 20 0 0
2309 00:23:08.007388 21 0 0
2310 00:23:08.010671 22 0 0
2311 00:23:08.010746 23 0 0
2312 00:23:08.013900 24 0 0
2313 00:23:08.013982 25 0 0
2314 00:23:08.017030 26 0 0
2315 00:23:08.017116 27 0 0
2316 00:23:08.017186 28 0 0
2317 00:23:08.020383 29 0 ff
2318 00:23:08.020460 30 0 0
2319 00:23:08.023747 31 0 ff
2320 00:23:08.023825 32 0 ff
2321 00:23:08.026932 33 0 ff
2322 00:23:08.027015 34 0 ff
2323 00:23:08.027081 35 0 ff
2324 00:23:08.030324 36 0 ff
2325 00:23:08.030400 37 ff ff
2326 00:23:08.033448 38 ff ff
2327 00:23:08.033524 39 ff ff
2328 00:23:08.036794 40 ff ff
2329 00:23:08.036872 41 ff ff
2330 00:23:08.039995 42 ff ff
2331 00:23:08.040074 43 ff ff
2332 00:23:08.046595 pass bytecount = 0xff (0xff: all bytes pass)
2333 00:23:08.046681
2334 00:23:08.046758 DQS0 dly: 37
2335 00:23:08.046823 DQS1 dly: 31
2336 00:23:08.049829 Write Rank0 MR2 =0x2d
2337 00:23:08.052880 [RankSwap] Rank num 2, (Multi 1), Rank 0
2338 00:23:08.056460 Write Rank0 MR1 =0xd6
2339 00:23:08.056557 [Gating]
2340 00:23:08.056630 ==
2341 00:23:08.059736 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2342 00:23:08.063015 fsp= 1, odt_onoff= 1, Byte mode= 0
2343 00:23:08.066278 ==
2344 00:23:08.069331 3 1 0 |2c2b 202 |(11 11)(11 11) |(1 1)(1 1)| 0
2345 00:23:08.072868 3 1 4 |2c2b 3636 |(11 11)(0 0) |(1 1)(1 1)| 0
2346 00:23:08.075783 3 1 8 |2c2b 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
2347 00:23:08.082509 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2348 00:23:08.085958 3 1 16 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
2349 00:23:08.089224 3 1 20 |2c2b f0e |(11 11)(11 11) |(1 0)(1 1)| 0
2350 00:23:08.095734 3 1 24 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
2351 00:23:08.098826 3 1 28 |2c2b 2827 |(11 11)(11 11) |(1 0)(1 1)| 0
2352 00:23:08.101984 [Byte 1] Lead/lag falling Transition (3, 1, 28)
2353 00:23:08.108727 3 2 0 |2c2b 3635 |(11 11)(11 11) |(1 0)(0 1)| 0
2354 00:23:08.112072 [Byte 1] Lead/lag Transition tap number (2)
2355 00:23:08.115097 3 2 4 |2c2b 3635 |(11 11)(11 11) |(1 0)(0 0)| 0
2356 00:23:08.121693 3 2 8 |2c2b 201 |(11 11)(11 11) |(1 0)(0 1)| 0
2357 00:23:08.124963 3 2 12 |2c2b 3434 |(11 11)(11 11) |(1 0)(0 1)| 0
2358 00:23:08.128174 3 2 16 |302 2020 |(11 11)(11 11) |(0 0)(0 1)| 0
2359 00:23:08.131533 3 2 20 |c0c 3535 |(11 11)(11 11) |(0 0)(0 1)| 0
2360 00:23:08.137907 3 2 24 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
2361 00:23:08.141361 3 2 28 |3534 3e3d |(11 11)(11 11) |(0 0)(1 1)| 0
2362 00:23:08.144618 3 3 0 |3534 3d3c |(11 11)(11 11) |(0 0)(0 0)| 0
2363 00:23:08.151246 3 3 4 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
2364 00:23:08.154541 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2365 00:23:08.157774 3 3 12 |3534 3c3b |(11 11)(11 11) |(0 0)(0 0)| 0
2366 00:23:08.164330 3 3 16 |3534 1414 |(11 11)(11 11) |(1 1)(1 1)| 0
2367 00:23:08.167510 3 3 20 |3534 3c3b |(11 11)(11 11) |(1 1)(1 1)| 0
2368 00:23:08.170855 [Byte 0] Lead/lag falling Transition (3, 3, 20)
2369 00:23:08.177283 3 3 24 |3534 1010 |(11 11)(11 11) |(0 1)(1 1)| 0
2370 00:23:08.180849 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2371 00:23:08.183765 [Byte 1] Lead/lag falling Transition (3, 3, 28)
2372 00:23:08.190452 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2373 00:23:08.193671 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2374 00:23:08.196997 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2375 00:23:08.203620 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2376 00:23:08.206731 3 4 16 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2377 00:23:08.210353 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2378 00:23:08.216524 3 4 24 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
2379 00:23:08.219840 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2380 00:23:08.223109 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2381 00:23:08.229624 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2382 00:23:08.232889 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2383 00:23:08.236148 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2384 00:23:08.243028 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2385 00:23:08.245936 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2386 00:23:08.249476 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2387 00:23:08.256135 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2388 00:23:08.259345 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2389 00:23:08.262589 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2390 00:23:08.269179 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2391 00:23:08.272261 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2392 00:23:08.275575 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2393 00:23:08.278733 [Byte 0] Lead/lag Transition tap number (2)
2394 00:23:08.285438 [Byte 1] Lead/lag falling Transition (3, 6, 12)
2395 00:23:08.288731 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2396 00:23:08.292278 [Byte 1] Lead/lag Transition tap number (2)
2397 00:23:08.298435 3 6 20 |1616 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
2398 00:23:08.301790 3 6 24 |4646 808 |(0 0)(11 11) |(0 0)(0 0)| 0
2399 00:23:08.305135 [Byte 0]First pass (3, 6, 24)
2400 00:23:08.308242 3 6 28 |4646 3636 |(0 0)(11 11) |(0 0)(0 0)| 0
2401 00:23:08.311453 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2402 00:23:08.314839 [Byte 1]First pass (3, 7, 0)
2403 00:23:08.317952 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2404 00:23:08.321189 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2405 00:23:08.327765 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2406 00:23:08.331081 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2407 00:23:08.334273 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2408 00:23:08.337569 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2409 00:23:08.344044 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2410 00:23:08.347421 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2411 00:23:08.350795 All bytes gating window > 1UI, Early break!
2412 00:23:08.350878
2413 00:23:08.354143 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
2414 00:23:08.354256
2415 00:23:08.357367 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 16)
2416 00:23:08.357460
2417 00:23:08.357538
2418 00:23:08.357603
2419 00:23:08.363755 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
2420 00:23:08.363838
2421 00:23:08.367250 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
2422 00:23:08.367330
2423 00:23:08.367405
2424 00:23:08.370287 Write Rank0 MR1 =0x56
2425 00:23:08.370371
2426 00:23:08.370440 best RODT dly(2T, 0.5T) = (2, 3)
2427 00:23:08.373554
2428 00:23:08.373666 best RODT dly(2T, 0.5T) = (2, 3)
2429 00:23:08.376717 ==
2430 00:23:08.380147 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2431 00:23:08.383509 fsp= 1, odt_onoff= 1, Byte mode= 0
2432 00:23:08.383598 ==
2433 00:23:08.386622 Start DQ dly to find pass range UseTestEngine =0
2434 00:23:08.393126 x-axis: bit #, y-axis: DQ dly (-127~63)
2435 00:23:08.393216 RX Vref Scan = 0
2436 00:23:08.396504 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2437 00:23:08.399785 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2438 00:23:08.403028 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2439 00:23:08.406313 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2440 00:23:08.406400 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2441 00:23:08.409561 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2442 00:23:08.412986 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2443 00:23:08.415918 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2444 00:23:08.419416 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2445 00:23:08.422649 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2446 00:23:08.425899 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2447 00:23:08.429174 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2448 00:23:08.432408 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2449 00:23:08.435626 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2450 00:23:08.435707 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2451 00:23:08.439082 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2452 00:23:08.442320 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2453 00:23:08.445392 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2454 00:23:08.448853 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2455 00:23:08.452165 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2456 00:23:08.455368 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2457 00:23:08.458806 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2458 00:23:08.458893 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2459 00:23:08.461721 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2460 00:23:08.465238 -2, [0] xxxoxxxx ooxxxxxo [MSB]
2461 00:23:08.468493 -1, [0] xxxoxxxx ooxxxxxo [MSB]
2462 00:23:08.471718 0, [0] xxxoxxxx ooxxxxxo [MSB]
2463 00:23:08.475116 1, [0] xxooxxxx ooxxxxxo [MSB]
2464 00:23:08.478370 2, [0] xxooxxxo oooxxxxo [MSB]
2465 00:23:08.478459 3, [0] xxooxxxo ooooxxoo [MSB]
2466 00:23:08.481738 4, [0] xooooxxo oooooooo [MSB]
2467 00:23:08.484962 5, [0] oooooxoo oooooooo [MSB]
2468 00:23:08.488012 6, [0] oooooxoo oooooooo [MSB]
2469 00:23:08.491181 32, [0] oooooooo ooooooox [MSB]
2470 00:23:08.494528 33, [0] oooooooo ooooooox [MSB]
2471 00:23:08.498022 34, [0] oooooooo ooooooox [MSB]
2472 00:23:08.498144 35, [0] ooxooooo oxooooox [MSB]
2473 00:23:08.501155 36, [0] ooxxoooo xxooooox [MSB]
2474 00:23:08.504425 37, [0] ooxxoooo xxooooox [MSB]
2475 00:23:08.507757 38, [0] oxxxoooo xxooooox [MSB]
2476 00:23:08.511126 39, [0] oxxxooox xxxxooox [MSB]
2477 00:23:08.514395 40, [0] oxxxxoox xxxxxoox [MSB]
2478 00:23:08.517284 41, [0] xxxxxoxx xxxxxxxx [MSB]
2479 00:23:08.520708 42, [0] xxxxxxxx xxxxxxxx [MSB]
2480 00:23:08.523958 iDelay=42, Bit 0, Center 22 (5 ~ 40) 36
2481 00:23:08.527415 iDelay=42, Bit 1, Center 20 (4 ~ 37) 34
2482 00:23:08.530560 iDelay=42, Bit 2, Center 17 (1 ~ 34) 34
2483 00:23:08.533922 iDelay=42, Bit 3, Center 16 (-2 ~ 35) 38
2484 00:23:08.537201 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2485 00:23:08.540447 iDelay=42, Bit 5, Center 24 (7 ~ 41) 35
2486 00:23:08.543753 iDelay=42, Bit 6, Center 22 (5 ~ 40) 36
2487 00:23:08.547142 iDelay=42, Bit 7, Center 20 (2 ~ 38) 37
2488 00:23:08.550221 iDelay=42, Bit 8, Center 16 (-2 ~ 35) 38
2489 00:23:08.553514 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
2490 00:23:08.560135 iDelay=42, Bit 10, Center 20 (2 ~ 38) 37
2491 00:23:08.563330 iDelay=42, Bit 11, Center 20 (3 ~ 38) 36
2492 00:23:08.566635 iDelay=42, Bit 12, Center 21 (4 ~ 39) 36
2493 00:23:08.569792 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
2494 00:23:08.573135 iDelay=42, Bit 14, Center 21 (3 ~ 40) 38
2495 00:23:08.576452 iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36
2496 00:23:08.576540 ==
2497 00:23:08.582945 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2498 00:23:08.586152 fsp= 1, odt_onoff= 1, Byte mode= 0
2499 00:23:08.586238 ==
2500 00:23:08.586314 DQS Delay:
2501 00:23:08.589576 DQS0 = 0, DQS1 = 0
2502 00:23:08.589688 DQM Delay:
2503 00:23:08.589788 DQM0 = 20, DQM1 = 18
2504 00:23:08.592668 DQ Delay:
2505 00:23:08.595915 DQ0 =22, DQ1 =20, DQ2 =17, DQ3 =16
2506 00:23:08.599290 DQ4 =21, DQ5 =24, DQ6 =22, DQ7 =20
2507 00:23:08.602647 DQ8 =16, DQ9 =16, DQ10 =20, DQ11 =20
2508 00:23:08.606083 DQ12 =21, DQ13 =22, DQ14 =21, DQ15 =13
2509 00:23:08.606174
2510 00:23:08.606244
2511 00:23:08.606310 DramC Write-DBI off
2512 00:23:08.606375 ==
2513 00:23:08.612283 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2514 00:23:08.615561 fsp= 1, odt_onoff= 1, Byte mode= 0
2515 00:23:08.615652 ==
2516 00:23:08.618919 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2517 00:23:08.619009
2518 00:23:08.622236 Begin, DQ Scan Range 927~1183
2519 00:23:08.622327
2520 00:23:08.622397
2521 00:23:08.625368 TX Vref Scan disable
2522 00:23:08.628721 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2523 00:23:08.631965 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2524 00:23:08.635408 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2525 00:23:08.638321 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2526 00:23:08.642048 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2527 00:23:08.644865 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2528 00:23:08.648186 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2529 00:23:08.654700 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2530 00:23:08.658216 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2531 00:23:08.661358 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2532 00:23:08.664843 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2533 00:23:08.667887 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2534 00:23:08.671252 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2535 00:23:08.674564 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2536 00:23:08.677933 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2537 00:23:08.681218 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2538 00:23:08.684296 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2539 00:23:08.687536 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2540 00:23:08.690942 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2541 00:23:08.694143 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2542 00:23:08.700618 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2543 00:23:08.704033 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2544 00:23:08.707125 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2545 00:23:08.710458 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2546 00:23:08.713848 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2547 00:23:08.716956 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2548 00:23:08.720434 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2549 00:23:08.723867 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2550 00:23:08.726748 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2551 00:23:08.730116 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2552 00:23:08.733441 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2553 00:23:08.736783 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2554 00:23:08.743470 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2555 00:23:08.746375 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2556 00:23:08.749747 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2557 00:23:08.752998 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2558 00:23:08.756234 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2559 00:23:08.759420 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2560 00:23:08.762948 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2561 00:23:08.766295 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2562 00:23:08.769601 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2563 00:23:08.772572 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2564 00:23:08.775895 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2565 00:23:08.779258 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2566 00:23:08.782490 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2567 00:23:08.785833 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2568 00:23:08.789003 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2569 00:23:08.792319 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2570 00:23:08.798993 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2571 00:23:08.802078 976 |3 6 16|[0] xxxxxxxx ooxxxxxo [MSB]
2572 00:23:08.805523 977 |3 6 17|[0] xxxxxxxx ooxxxxxo [MSB]
2573 00:23:08.808865 978 |3 6 18|[0] xxxxxxxx oooxxxoo [MSB]
2574 00:23:08.811934 979 |3 6 19|[0] xxxxxxxx oooxoxoo [MSB]
2575 00:23:08.815223 980 |3 6 20|[0] xxxxxxxx oooooxoo [MSB]
2576 00:23:08.818746 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
2577 00:23:08.821812 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
2578 00:23:08.825150 983 |3 6 23|[0] xxxxxxxx oooooooo [MSB]
2579 00:23:08.828520 984 |3 6 24|[0] xooooxoo oooooooo [MSB]
2580 00:23:08.835257 992 |3 6 32|[0] oooooooo ooooooox [MSB]
2581 00:23:08.838195 993 |3 6 33|[0] oooooooo ooooooox [MSB]
2582 00:23:08.841736 994 |3 6 34|[0] oooooooo oxooooox [MSB]
2583 00:23:08.844804 995 |3 6 35|[0] oooooooo oxooooox [MSB]
2584 00:23:08.848343 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2585 00:23:08.851692 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2586 00:23:08.854567 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2587 00:23:08.857916 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
2588 00:23:08.861163 1000 |3 6 40|[0] oooooooo xxxxxxxx [MSB]
2589 00:23:08.864551 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2590 00:23:08.867817 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2591 00:23:08.874354 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
2592 00:23:08.877484 1004 |3 6 44|[0] ooxxoooo xxxxxxxx [MSB]
2593 00:23:08.880743 1005 |3 6 45|[0] ooxxoooo xxxxxxxx [MSB]
2594 00:23:08.884120 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
2595 00:23:08.887337 Byte0, DQ PI dly=993, DQM PI dly= 993
2596 00:23:08.890789 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 33)
2597 00:23:08.890880
2598 00:23:08.897402 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 33)
2599 00:23:08.897500
2600 00:23:08.900696 Byte1, DQ PI dly=985, DQM PI dly= 985
2601 00:23:08.903821 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2602 00:23:08.903912
2603 00:23:08.907299 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2604 00:23:08.907389
2605 00:23:08.910520 ==
2606 00:23:08.913553 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2607 00:23:08.916944 fsp= 1, odt_onoff= 1, Byte mode= 0
2608 00:23:08.917035 ==
2609 00:23:08.920365 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2610 00:23:08.920459
2611 00:23:08.923309 Begin, DQ Scan Range 961~1025
2612 00:23:08.926499 Write Rank0 MR14 =0x0
2613 00:23:08.934528
2614 00:23:08.934622 CH=1, VrefRange= 0, VrefLevel = 0
2615 00:23:08.940769 TX Bit0 (986~1001) 16 993, Bit8 (978~992) 15 985,
2616 00:23:08.944070 TX Bit1 (985~1001) 17 993, Bit9 (978~990) 13 984,
2617 00:23:08.950902 TX Bit2 (984~998) 15 991, Bit10 (981~993) 13 987,
2618 00:23:08.954029 TX Bit3 (981~996) 16 988, Bit11 (984~993) 10 988,
2619 00:23:08.957318 TX Bit4 (985~999) 15 992, Bit12 (983~993) 11 988,
2620 00:23:08.964033 TX Bit5 (986~1001) 16 993, Bit13 (983~995) 13 989,
2621 00:23:08.967125 TX Bit6 (985~999) 15 992, Bit14 (982~993) 12 987,
2622 00:23:08.973571 TX Bit7 (985~999) 15 992, Bit15 (977~985) 9 981,
2623 00:23:08.973662
2624 00:23:08.973733 Write Rank0 MR14 =0x2
2625 00:23:08.982756
2626 00:23:08.986169 CH=1, VrefRange= 0, VrefLevel = 2
2627 00:23:08.989497 TX Bit0 (986~1002) 17 994, Bit8 (978~992) 15 985,
2628 00:23:08.992440 TX Bit1 (984~1001) 18 992, Bit9 (978~991) 14 984,
2629 00:23:08.998966 TX Bit2 (984~999) 16 991, Bit10 (981~994) 14 987,
2630 00:23:09.002479 TX Bit3 (981~997) 17 989, Bit11 (983~993) 11 988,
2631 00:23:09.008909 TX Bit4 (985~1000) 16 992, Bit12 (982~994) 13 988,
2632 00:23:09.012453 TX Bit5 (986~1002) 17 994, Bit13 (983~996) 14 989,
2633 00:23:09.015358 TX Bit6 (985~1000) 16 992, Bit14 (982~993) 12 987,
2634 00:23:09.022058 TX Bit7 (985~1000) 16 992, Bit15 (977~986) 10 981,
2635 00:23:09.022149
2636 00:23:09.022220 Write Rank0 MR14 =0x4
2637 00:23:09.031866
2638 00:23:09.031956 CH=1, VrefRange= 0, VrefLevel = 4
2639 00:23:09.038471 TX Bit0 (986~1003) 18 994, Bit8 (978~992) 15 985,
2640 00:23:09.041967 TX Bit1 (984~1002) 19 993, Bit9 (978~991) 14 984,
2641 00:23:09.048492 TX Bit2 (983~999) 17 991, Bit10 (980~995) 16 987,
2642 00:23:09.051450 TX Bit3 (981~998) 18 989, Bit11 (983~994) 12 988,
2643 00:23:09.054733 TX Bit4 (984~1001) 18 992, Bit12 (982~995) 14 988,
2644 00:23:09.061336 TX Bit5 (986~1002) 17 994, Bit13 (983~997) 15 990,
2645 00:23:09.064610 TX Bit6 (985~1001) 17 993, Bit14 (982~994) 13 988,
2646 00:23:09.071062 TX Bit7 (985~1001) 17 993, Bit15 (977~988) 12 982,
2647 00:23:09.071176
2648 00:23:09.071270 Write Rank0 MR14 =0x6
2649 00:23:09.081040
2650 00:23:09.081156 CH=1, VrefRange= 0, VrefLevel = 6
2651 00:23:09.087928 TX Bit0 (985~1004) 20 994, Bit8 (977~993) 17 985,
2652 00:23:09.090858 TX Bit1 (984~1003) 20 993, Bit9 (977~991) 15 984,
2653 00:23:09.097401 TX Bit2 (983~1000) 18 991, Bit10 (981~997) 17 989,
2654 00:23:09.100782 TX Bit3 (980~998) 19 989, Bit11 (983~995) 13 989,
2655 00:23:09.107294 TX Bit4 (984~1002) 19 993, Bit12 (981~996) 16 988,
2656 00:23:09.110867 TX Bit5 (985~1003) 19 994, Bit13 (983~997) 15 990,
2657 00:23:09.113797 TX Bit6 (985~1002) 18 993, Bit14 (981~995) 15 988,
2658 00:23:09.120262 TX Bit7 (985~1001) 17 993, Bit15 (977~989) 13 983,
2659 00:23:09.120353
2660 00:23:09.120423 Write Rank0 MR14 =0x8
2661 00:23:09.130633
2662 00:23:09.130722 CH=1, VrefRange= 0, VrefLevel = 8
2663 00:23:09.137177 TX Bit0 (985~1005) 21 995, Bit8 (977~994) 18 985,
2664 00:23:09.140727 TX Bit1 (984~1004) 21 994, Bit9 (977~992) 16 984,
2665 00:23:09.147159 TX Bit2 (983~1000) 18 991, Bit10 (979~997) 19 988,
2666 00:23:09.150460 TX Bit3 (980~998) 19 989, Bit11 (982~996) 15 989,
2667 00:23:09.156683 TX Bit4 (984~1002) 19 993, Bit12 (981~996) 16 988,
2668 00:23:09.160313 TX Bit5 (985~1004) 20 994, Bit13 (982~998) 17 990,
2669 00:23:09.163371 TX Bit6 (985~1003) 19 994, Bit14 (981~995) 15 988,
2670 00:23:09.169905 TX Bit7 (985~1002) 18 993, Bit15 (976~990) 15 983,
2671 00:23:09.169996
2672 00:23:09.170067 Write Rank0 MR14 =0xa
2673 00:23:09.180218
2674 00:23:09.183616 CH=1, VrefRange= 0, VrefLevel = 10
2675 00:23:09.186607 TX Bit0 (986~1005) 20 995, Bit8 (977~994) 18 985,
2676 00:23:09.190125 TX Bit1 (984~1005) 22 994, Bit9 (977~992) 16 984,
2677 00:23:09.196431 TX Bit2 (983~1001) 19 992, Bit10 (979~997) 19 988,
2678 00:23:09.199730 TX Bit3 (979~999) 21 989, Bit11 (982~997) 16 989,
2679 00:23:09.206335 TX Bit4 (984~1003) 20 993, Bit12 (981~998) 18 989,
2680 00:23:09.209631 TX Bit5 (985~1005) 21 995, Bit13 (982~998) 17 990,
2681 00:23:09.212645 TX Bit6 (984~1004) 21 994, Bit14 (980~997) 18 988,
2682 00:23:09.219451 TX Bit7 (984~1003) 20 993, Bit15 (976~990) 15 983,
2683 00:23:09.219542
2684 00:23:09.219613 Write Rank0 MR14 =0xc
2685 00:23:09.229590
2686 00:23:09.233115 CH=1, VrefRange= 0, VrefLevel = 12
2687 00:23:09.236148 TX Bit0 (985~1005) 21 995, Bit8 (977~995) 19 986,
2688 00:23:09.239350 TX Bit1 (984~1005) 22 994, Bit9 (977~992) 16 984,
2689 00:23:09.246103 TX Bit2 (982~1002) 21 992, Bit10 (979~998) 20 988,
2690 00:23:09.249452 TX Bit3 (980~999) 20 989, Bit11 (982~998) 17 990,
2691 00:23:09.255743 TX Bit4 (983~1004) 22 993, Bit12 (980~998) 19 989,
2692 00:23:09.259405 TX Bit5 (985~1005) 21 995, Bit13 (982~999) 18 990,
2693 00:23:09.262510 TX Bit6 (984~1004) 21 994, Bit14 (980~998) 19 989,
2694 00:23:09.269080 TX Bit7 (984~1004) 21 994, Bit15 (976~991) 16 983,
2695 00:23:09.269171
2696 00:23:09.272275 wait MRW command Rank0 MR14 =0xe fired (1)
2697 00:23:09.275574 Write Rank0 MR14 =0xe
2698 00:23:09.282890
2699 00:23:09.286157 CH=1, VrefRange= 0, VrefLevel = 14
2700 00:23:09.289517 TX Bit0 (985~1005) 21 995, Bit8 (976~996) 21 986,
2701 00:23:09.292587 TX Bit1 (984~1005) 22 994, Bit9 (977~993) 17 985,
2702 00:23:09.299199 TX Bit2 (982~1002) 21 992, Bit10 (978~998) 21 988,
2703 00:23:09.302507 TX Bit3 (978~999) 22 988, Bit11 (981~998) 18 989,
2704 00:23:09.309174 TX Bit4 (983~1004) 22 993, Bit12 (980~999) 20 989,
2705 00:23:09.312512 TX Bit5 (985~1005) 21 995, Bit13 (982~999) 18 990,
2706 00:23:09.315836 TX Bit6 (984~1004) 21 994, Bit14 (979~998) 20 988,
2707 00:23:09.322055 TX Bit7 (984~1004) 21 994, Bit15 (976~991) 16 983,
2708 00:23:09.322146
2709 00:23:09.325298 Write Rank0 MR14 =0x10
2710 00:23:09.332857
2711 00:23:09.336299 CH=1, VrefRange= 0, VrefLevel = 16
2712 00:23:09.339355 TX Bit0 (985~1006) 22 995, Bit8 (976~996) 21 986,
2713 00:23:09.342621 TX Bit1 (983~1005) 23 994, Bit9 (976~993) 18 984,
2714 00:23:09.349043 TX Bit2 (982~1003) 22 992, Bit10 (978~998) 21 988,
2715 00:23:09.352547 TX Bit3 (978~1000) 23 989, Bit11 (980~998) 19 989,
2716 00:23:09.358923 TX Bit4 (983~1005) 23 994, Bit12 (979~999) 21 989,
2717 00:23:09.362112 TX Bit5 (985~1006) 22 995, Bit13 (981~999) 19 990,
2718 00:23:09.365414 TX Bit6 (985~1005) 21 995, Bit14 (979~998) 20 988,
2719 00:23:09.371946 TX Bit7 (984~1005) 22 994, Bit15 (975~991) 17 983,
2720 00:23:09.372063
2721 00:23:09.375214 Write Rank0 MR14 =0x12
2722 00:23:09.382758
2723 00:23:09.385995 CH=1, VrefRange= 0, VrefLevel = 18
2724 00:23:09.389214 TX Bit0 (985~1006) 22 995, Bit8 (976~997) 22 986,
2725 00:23:09.392472 TX Bit1 (983~1006) 24 994, Bit9 (976~994) 19 985,
2726 00:23:09.399022 TX Bit2 (982~1004) 23 993, Bit10 (977~999) 23 988,
2727 00:23:09.402137 TX Bit3 (978~1000) 23 989, Bit11 (980~999) 20 989,
2728 00:23:09.408889 TX Bit4 (983~1005) 23 994, Bit12 (978~999) 22 988,
2729 00:23:09.412248 TX Bit5 (985~1006) 22 995, Bit13 (980~999) 20 989,
2730 00:23:09.415241 TX Bit6 (984~1005) 22 994, Bit14 (978~999) 22 988,
2731 00:23:09.422040 TX Bit7 (984~1005) 22 994, Bit15 (975~991) 17 983,
2732 00:23:09.422157
2733 00:23:09.425320 Write Rank0 MR14 =0x14
2734 00:23:09.432786
2735 00:23:09.435805 CH=1, VrefRange= 0, VrefLevel = 20
2736 00:23:09.439038 TX Bit0 (984~1006) 23 995, Bit8 (976~997) 22 986,
2737 00:23:09.442282 TX Bit1 (983~1006) 24 994, Bit9 (976~994) 19 985,
2738 00:23:09.448817 TX Bit2 (982~1004) 23 993, Bit10 (977~999) 23 988,
2739 00:23:09.452183 TX Bit3 (978~1001) 24 989, Bit11 (979~999) 21 989,
2740 00:23:09.458753 TX Bit4 (983~1005) 23 994, Bit12 (978~999) 22 988,
2741 00:23:09.462111 TX Bit5 (985~1006) 22 995, Bit13 (980~1000) 21 990,
2742 00:23:09.465369 TX Bit6 (984~1006) 23 995, Bit14 (978~999) 22 988,
2743 00:23:09.471926 TX Bit7 (984~1005) 22 994, Bit15 (975~992) 18 983,
2744 00:23:09.472018
2745 00:23:09.475021 Write Rank0 MR14 =0x16
2746 00:23:09.482738
2747 00:23:09.486159 CH=1, VrefRange= 0, VrefLevel = 22
2748 00:23:09.489285 TX Bit0 (984~1007) 24 995, Bit8 (976~998) 23 987,
2749 00:23:09.492747 TX Bit1 (983~1006) 24 994, Bit9 (976~995) 20 985,
2750 00:23:09.499202 TX Bit2 (980~1005) 26 992, Bit10 (978~999) 22 988,
2751 00:23:09.502327 TX Bit3 (978~1001) 24 989, Bit11 (979~1000) 22 989,
2752 00:23:09.508793 TX Bit4 (982~1006) 25 994, Bit12 (978~1000) 23 989,
2753 00:23:09.512116 TX Bit5 (984~1006) 23 995, Bit13 (979~1000) 22 989,
2754 00:23:09.515394 TX Bit6 (984~1006) 23 995, Bit14 (978~999) 22 988,
2755 00:23:09.521908 TX Bit7 (984~1006) 23 995, Bit15 (974~992) 19 983,
2756 00:23:09.522000
2757 00:23:09.525214 wait MRW command Rank0 MR14 =0x18 fired (1)
2758 00:23:09.528601 Write Rank0 MR14 =0x18
2759 00:23:09.536897
2760 00:23:09.540255 CH=1, VrefRange= 0, VrefLevel = 24
2761 00:23:09.543370 TX Bit0 (984~1007) 24 995, Bit8 (975~999) 25 987,
2762 00:23:09.546662 TX Bit1 (982~1006) 25 994, Bit9 (976~996) 21 986,
2763 00:23:09.553144 TX Bit2 (980~1005) 26 992, Bit10 (977~999) 23 988,
2764 00:23:09.556396 TX Bit3 (977~1001) 25 989, Bit11 (979~1000) 22 989,
2765 00:23:09.562971 TX Bit4 (982~1006) 25 994, Bit12 (977~1000) 24 988,
2766 00:23:09.566326 TX Bit5 (984~1007) 24 995, Bit13 (979~1000) 22 989,
2767 00:23:09.573002 TX Bit6 (983~1006) 24 994, Bit14 (977~999) 23 988,
2768 00:23:09.576383 TX Bit7 (983~1006) 24 994, Bit15 (973~993) 21 983,
2769 00:23:09.576474
2770 00:23:09.579270 Write Rank0 MR14 =0x1a
2771 00:23:09.587243
2772 00:23:09.590559 CH=1, VrefRange= 0, VrefLevel = 26
2773 00:23:09.593742 TX Bit0 (984~1007) 24 995, Bit8 (975~998) 24 986,
2774 00:23:09.596919 TX Bit1 (982~1006) 25 994, Bit9 (975~997) 23 986,
2775 00:23:09.603477 TX Bit2 (979~1006) 28 992, Bit10 (977~1000) 24 988,
2776 00:23:09.606711 TX Bit3 (977~1002) 26 989, Bit11 (979~1000) 22 989,
2777 00:23:09.613383 TX Bit4 (982~1006) 25 994, Bit12 (977~1000) 24 988,
2778 00:23:09.616711 TX Bit5 (984~1007) 24 995, Bit13 (978~1000) 23 989,
2779 00:23:09.623341 TX Bit6 (983~1006) 24 994, Bit14 (977~1000) 24 988,
2780 00:23:09.626614 TX Bit7 (983~1006) 24 994, Bit15 (973~993) 21 983,
2781 00:23:09.626706
2782 00:23:09.629712 Write Rank0 MR14 =0x1c
2783 00:23:09.637761
2784 00:23:09.641149 CH=1, VrefRange= 0, VrefLevel = 28
2785 00:23:09.644108 TX Bit0 (984~1007) 24 995, Bit8 (975~999) 25 987,
2786 00:23:09.647324 TX Bit1 (982~1006) 25 994, Bit9 (974~997) 24 985,
2787 00:23:09.654166 TX Bit2 (980~1006) 27 993, Bit10 (976~1000) 25 988,
2788 00:23:09.657448 TX Bit3 (977~1003) 27 990, Bit11 (978~1001) 24 989,
2789 00:23:09.663674 TX Bit4 (982~1006) 25 994, Bit12 (977~1000) 24 988,
2790 00:23:09.667408 TX Bit5 (984~1007) 24 995, Bit13 (978~1001) 24 989,
2791 00:23:09.673644 TX Bit6 (983~1006) 24 994, Bit14 (976~1000) 25 988,
2792 00:23:09.676963 TX Bit7 (982~1006) 25 994, Bit15 (972~995) 24 983,
2793 00:23:09.677053
2794 00:23:09.680128 Write Rank0 MR14 =0x1e
2795 00:23:09.688283
2796 00:23:09.691615 CH=1, VrefRange= 0, VrefLevel = 30
2797 00:23:09.695014 TX Bit0 (984~1007) 24 995, Bit8 (975~999) 25 987,
2798 00:23:09.698152 TX Bit1 (982~1006) 25 994, Bit9 (974~997) 24 985,
2799 00:23:09.704859 TX Bit2 (980~1006) 27 993, Bit10 (976~1000) 25 988,
2800 00:23:09.707968 TX Bit3 (977~1003) 27 990, Bit11 (978~1001) 24 989,
2801 00:23:09.714407 TX Bit4 (982~1006) 25 994, Bit12 (977~1000) 24 988,
2802 00:23:09.717920 TX Bit5 (984~1007) 24 995, Bit13 (978~1001) 24 989,
2803 00:23:09.724183 TX Bit6 (983~1006) 24 994, Bit14 (976~1000) 25 988,
2804 00:23:09.727511 TX Bit7 (982~1006) 25 994, Bit15 (972~995) 24 983,
2805 00:23:09.727630
2806 00:23:09.730882 wait MRW command Rank0 MR14 =0x20 fired (1)
2807 00:23:09.734174 Write Rank0 MR14 =0x20
2808 00:23:09.742683
2809 00:23:09.745945 CH=1, VrefRange= 0, VrefLevel = 32
2810 00:23:09.749177 TX Bit0 (984~1007) 24 995, Bit8 (975~999) 25 987,
2811 00:23:09.752500 TX Bit1 (982~1006) 25 994, Bit9 (974~997) 24 985,
2812 00:23:09.759055 TX Bit2 (980~1006) 27 993, Bit10 (976~1000) 25 988,
2813 00:23:09.762286 TX Bit3 (977~1003) 27 990, Bit11 (978~1001) 24 989,
2814 00:23:09.768661 TX Bit4 (982~1006) 25 994, Bit12 (977~1000) 24 988,
2815 00:23:09.772077 TX Bit5 (984~1007) 24 995, Bit13 (978~1001) 24 989,
2816 00:23:09.778818 TX Bit6 (983~1006) 24 994, Bit14 (976~1000) 25 988,
2817 00:23:09.782183 TX Bit7 (982~1006) 25 994, Bit15 (972~995) 24 983,
2818 00:23:09.782271
2819 00:23:09.785065 Write Rank0 MR14 =0x22
2820 00:23:09.793514
2821 00:23:09.796720 CH=1, VrefRange= 0, VrefLevel = 34
2822 00:23:09.799780 TX Bit0 (984~1007) 24 995, Bit8 (975~999) 25 987,
2823 00:23:09.803102 TX Bit1 (982~1006) 25 994, Bit9 (974~997) 24 985,
2824 00:23:09.809705 TX Bit2 (980~1006) 27 993, Bit10 (976~1000) 25 988,
2825 00:23:09.812922 TX Bit3 (977~1003) 27 990, Bit11 (978~1001) 24 989,
2826 00:23:09.819520 TX Bit4 (982~1006) 25 994, Bit12 (977~1000) 24 988,
2827 00:23:09.823028 TX Bit5 (984~1007) 24 995, Bit13 (978~1001) 24 989,
2828 00:23:09.829425 TX Bit6 (983~1006) 24 994, Bit14 (976~1000) 25 988,
2829 00:23:09.832680 TX Bit7 (982~1006) 25 994, Bit15 (972~995) 24 983,
2830 00:23:09.832772
2831 00:23:09.835908 Write Rank0 MR14 =0x24
2832 00:23:09.844084
2833 00:23:09.847003 CH=1, VrefRange= 0, VrefLevel = 36
2834 00:23:09.850405 TX Bit0 (984~1007) 24 995, Bit8 (975~999) 25 987,
2835 00:23:09.853844 TX Bit1 (982~1006) 25 994, Bit9 (974~997) 24 985,
2836 00:23:09.860298 TX Bit2 (980~1006) 27 993, Bit10 (976~1000) 25 988,
2837 00:23:09.863605 TX Bit3 (977~1003) 27 990, Bit11 (978~1001) 24 989,
2838 00:23:09.870222 TX Bit4 (982~1006) 25 994, Bit12 (977~1000) 24 988,
2839 00:23:09.873178 TX Bit5 (984~1007) 24 995, Bit13 (978~1001) 24 989,
2840 00:23:09.879894 TX Bit6 (983~1006) 24 994, Bit14 (976~1000) 25 988,
2841 00:23:09.883062 TX Bit7 (982~1006) 25 994, Bit15 (972~995) 24 983,
2842 00:23:09.883155
2843 00:23:09.886387 Write Rank0 MR14 =0x26
2844 00:23:09.894401
2845 00:23:09.897651 CH=1, VrefRange= 0, VrefLevel = 38
2846 00:23:09.901072 TX Bit0 (984~1007) 24 995, Bit8 (975~999) 25 987,
2847 00:23:09.904347 TX Bit1 (982~1006) 25 994, Bit9 (974~997) 24 985,
2848 00:23:09.910715 TX Bit2 (980~1006) 27 993, Bit10 (976~1000) 25 988,
2849 00:23:09.914051 TX Bit3 (977~1003) 27 990, Bit11 (978~1001) 24 989,
2850 00:23:09.920728 TX Bit4 (982~1006) 25 994, Bit12 (977~1000) 24 988,
2851 00:23:09.923625 TX Bit5 (984~1007) 24 995, Bit13 (978~1001) 24 989,
2852 00:23:09.930464 TX Bit6 (983~1006) 24 994, Bit14 (976~1000) 25 988,
2853 00:23:09.933813 TX Bit7 (982~1006) 25 994, Bit15 (972~995) 24 983,
2854 00:23:09.933907
2855 00:23:09.934001
2856 00:23:09.936754 TX Vref found, early break! 374< 376
2857 00:23:09.943415 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2858 00:23:09.943512 u1DelayCellOfst[0]=6 cells (5 PI)
2859 00:23:09.946925 u1DelayCellOfst[1]=5 cells (4 PI)
2860 00:23:09.950045 u1DelayCellOfst[2]=3 cells (3 PI)
2861 00:23:09.953195 u1DelayCellOfst[3]=0 cells (0 PI)
2862 00:23:09.956771 u1DelayCellOfst[4]=5 cells (4 PI)
2863 00:23:09.959727 u1DelayCellOfst[5]=6 cells (5 PI)
2864 00:23:09.962995 u1DelayCellOfst[6]=5 cells (4 PI)
2865 00:23:09.966287 u1DelayCellOfst[7]=5 cells (4 PI)
2866 00:23:09.969612 Byte0, DQ PI dly=990, DQM PI dly= 992
2867 00:23:09.973051 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2868 00:23:09.973144
2869 00:23:09.979581 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2870 00:23:09.979672
2871 00:23:09.982818 u1DelayCellOfst[8]=5 cells (4 PI)
2872 00:23:09.986060 u1DelayCellOfst[9]=2 cells (2 PI)
2873 00:23:09.986152 u1DelayCellOfst[10]=6 cells (5 PI)
2874 00:23:09.989409 u1DelayCellOfst[11]=7 cells (6 PI)
2875 00:23:09.992638 u1DelayCellOfst[12]=6 cells (5 PI)
2876 00:23:09.995873 u1DelayCellOfst[13]=7 cells (6 PI)
2877 00:23:09.999069 u1DelayCellOfst[14]=6 cells (5 PI)
2878 00:23:10.002470 u1DelayCellOfst[15]=0 cells (0 PI)
2879 00:23:10.005602 Byte1, DQ PI dly=983, DQM PI dly= 986
2880 00:23:10.012178 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2881 00:23:10.012278
2882 00:23:10.015509 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2883 00:23:10.015600
2884 00:23:10.018912 Write Rank0 MR14 =0x1c
2885 00:23:10.019003
2886 00:23:10.019075 Final TX Range 0 Vref 28
2887 00:23:10.019142
2888 00:23:10.025454 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2889 00:23:10.025546
2890 00:23:10.032059 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2891 00:23:10.041456 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2892 00:23:10.048190 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2893 00:23:10.048283 Write Rank0 MR3 =0xb0
2894 00:23:10.051354 DramC Write-DBI on
2895 00:23:10.051444 ==
2896 00:23:10.054649 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2897 00:23:10.057960 fsp= 1, odt_onoff= 1, Byte mode= 0
2898 00:23:10.058052 ==
2899 00:23:10.064720 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2900 00:23:10.064811
2901 00:23:10.068148 Begin, DQ Scan Range 706~770
2902 00:23:10.068239
2903 00:23:10.068310
2904 00:23:10.068394 TX Vref Scan disable
2905 00:23:10.071059 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2906 00:23:10.074424 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2907 00:23:10.077832 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2908 00:23:10.084136 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2909 00:23:10.087340 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2910 00:23:10.090552 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2911 00:23:10.093792 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2912 00:23:10.097202 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2913 00:23:10.100582 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2914 00:23:10.103907 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2915 00:23:10.106982 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2916 00:23:10.110260 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2917 00:23:10.113667 718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2918 00:23:10.116925 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2919 00:23:10.120127 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2920 00:23:10.123476 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2921 00:23:10.126624 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2922 00:23:10.133266 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2923 00:23:10.136648 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2924 00:23:10.139974 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
2925 00:23:10.146511 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2926 00:23:10.149892 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2927 00:23:10.152898 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2928 00:23:10.156259 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2929 00:23:10.159523 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2930 00:23:10.162943 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2931 00:23:10.166193 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2932 00:23:10.169373 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2933 00:23:10.172813 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
2934 00:23:10.175880 752 |2 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
2935 00:23:10.179101 Byte0, DQ PI dly=738, DQM PI dly= 738
2936 00:23:10.185538 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 34)
2937 00:23:10.185631
2938 00:23:10.188932 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 34)
2939 00:23:10.189023
2940 00:23:10.192272 Byte1, DQ PI dly=730, DQM PI dly= 730
2941 00:23:10.195448 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2942 00:23:10.195540
2943 00:23:10.202157 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2944 00:23:10.202249
2945 00:23:10.208887 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2946 00:23:10.214943 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2947 00:23:10.221550 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2948 00:23:10.224931 Write Rank0 MR3 =0x30
2949 00:23:10.225022 DramC Write-DBI off
2950 00:23:10.225094
2951 00:23:10.228065 [DATLAT]
2952 00:23:10.231472 Freq=1600, CH1 RK0, use_rxtx_scan=0
2953 00:23:10.231563
2954 00:23:10.231635 DATLAT Default: 0xf
2955 00:23:10.234608 7, 0xFFFF, sum=0
2956 00:23:10.234700 8, 0xFFFF, sum=0
2957 00:23:10.238078 9, 0xFFFF, sum=0
2958 00:23:10.238200 10, 0xFFFF, sum=0
2959 00:23:10.241084 11, 0xFFFF, sum=0
2960 00:23:10.241189 12, 0xFFFF, sum=0
2961 00:23:10.244422 13, 0xFFFF, sum=0
2962 00:23:10.244515 14, 0x0, sum=1
2963 00:23:10.244588 15, 0x0, sum=2
2964 00:23:10.248125 16, 0x0, sum=3
2965 00:23:10.248219 17, 0x0, sum=4
2966 00:23:10.254294 pattern=2 first_step=14 total pass=5 best_step=16
2967 00:23:10.254385 ==
2968 00:23:10.257771 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2969 00:23:10.260752 fsp= 1, odt_onoff= 1, Byte mode= 0
2970 00:23:10.260845 ==
2971 00:23:10.267390 Start DQ dly to find pass range UseTestEngine =1
2972 00:23:10.270555 x-axis: bit #, y-axis: DQ dly (-127~63)
2973 00:23:10.270645 RX Vref Scan = 1
2974 00:23:10.378493
2975 00:23:10.378640 RX Vref found, early break!
2976 00:23:10.378716
2977 00:23:10.384915 Final RX Vref 11, apply to both rank0 and 1
2978 00:23:10.385008 ==
2979 00:23:10.388299 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2980 00:23:10.391765 fsp= 1, odt_onoff= 1, Byte mode= 0
2981 00:23:10.391858 ==
2982 00:23:10.395009 DQS Delay:
2983 00:23:10.395099 DQS0 = 0, DQS1 = 0
2984 00:23:10.395172 DQM Delay:
2985 00:23:10.398153 DQM0 = 20, DQM1 = 18
2986 00:23:10.398245 DQ Delay:
2987 00:23:10.401263 DQ0 =21, DQ1 =21, DQ2 =18, DQ3 =16
2988 00:23:10.404829 DQ4 =20, DQ5 =23, DQ6 =23, DQ7 =20
2989 00:23:10.407888 DQ8 =16, DQ9 =15, DQ10 =20, DQ11 =20
2990 00:23:10.411261 DQ12 =21, DQ13 =21, DQ14 =21, DQ15 =13
2991 00:23:10.411353
2992 00:23:10.411425
2993 00:23:10.411491
2994 00:23:10.414516 [DramC_TX_OE_Calibration] TA2
2995 00:23:10.417705 Original DQ_B0 (3 6) =30, OEN = 27
2996 00:23:10.420935 Original DQ_B1 (3 6) =30, OEN = 27
2997 00:23:10.424219 23, 0x0, End_B0=23 End_B1=23
2998 00:23:10.427532 24, 0x0, End_B0=24 End_B1=24
2999 00:23:10.427625 25, 0x0, End_B0=25 End_B1=25
3000 00:23:10.430819 26, 0x0, End_B0=26 End_B1=26
3001 00:23:10.434137 27, 0x0, End_B0=27 End_B1=27
3002 00:23:10.437542 28, 0x0, End_B0=28 End_B1=28
3003 00:23:10.440761 29, 0x0, End_B0=29 End_B1=29
3004 00:23:10.440853 30, 0x0, End_B0=30 End_B1=30
3005 00:23:10.443817 31, 0xFFFF, End_B0=30 End_B1=30
3006 00:23:10.450447 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3007 00:23:10.457048 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3008 00:23:10.457142
3009 00:23:10.457254
3010 00:23:10.457363 Write Rank0 MR23 =0x3f
3011 00:23:10.460285 [DQSOSC]
3012 00:23:10.466773 [DQSOSCAuto] RK0, (LSB)MR18= 0xb5b5, (MSB)MR19= 0x202, tDQSOscB0 = 454 ps tDQSOscB1 = 454 ps
3013 00:23:10.473375 CH1_RK0: MR19=0x202, MR18=0xB5B5, DQSOSC=454, MR23=63, INC=11, DEC=17
3014 00:23:10.476631 Write Rank0 MR23 =0x3f
3015 00:23:10.476724 [DQSOSC]
3016 00:23:10.483265 [DQSOSCAuto] RK0, (LSB)MR18= 0xb5b5, (MSB)MR19= 0x202, tDQSOscB0 = 454 ps tDQSOscB1 = 454 ps
3017 00:23:10.486716 CH1 RK0: MR19=202, MR18=B5B5
3018 00:23:10.489588 [RankSwap] Rank num 2, (Multi 1), Rank 1
3019 00:23:10.493119 Write Rank0 MR2 =0xad
3020 00:23:10.493213 [Write Leveling]
3021 00:23:10.496135 delay byte0 byte1 byte2 byte3
3022 00:23:10.496228
3023 00:23:10.499496 10 0 0
3024 00:23:10.499592 11 0 0
3025 00:23:10.502755 12 0 0
3026 00:23:10.502850 13 0 0
3027 00:23:10.502946 14 0 0
3028 00:23:10.506115 15 0 0
3029 00:23:10.506238 16 0 0
3030 00:23:10.509457 17 0 0
3031 00:23:10.509551 18 0 0
3032 00:23:10.509647 19 0 0
3033 00:23:10.512591 20 0 0
3034 00:23:10.512685 21 0 0
3035 00:23:10.515950 22 0 0
3036 00:23:10.516044 23 0 0
3037 00:23:10.519315 24 0 0
3038 00:23:10.519410 25 0 0
3039 00:23:10.519505 26 0 0
3040 00:23:10.522485 27 0 0
3041 00:23:10.522579 28 0 ff
3042 00:23:10.525745 29 0 ff
3043 00:23:10.525839 30 0 ff
3044 00:23:10.529099 31 0 ff
3045 00:23:10.529223 32 0 ff
3046 00:23:10.533060 33 0 ff
3047 00:23:10.533154 34 0 ff
3048 00:23:10.533268 35 ff ff
3049 00:23:10.535369 36 ff ff
3050 00:23:10.535463 37 ff ff
3051 00:23:10.538699 38 ff ff
3052 00:23:10.538793 39 ff ff
3053 00:23:10.542001 40 ff ff
3054 00:23:10.542096 41 ff ff
3055 00:23:10.548748 pass bytecount = 0xff (0xff: all bytes pass)
3056 00:23:10.548843
3057 00:23:10.548937 DQS0 dly: 35
3058 00:23:10.549026 DQS1 dly: 28
3059 00:23:10.551777 Write Rank0 MR2 =0x2d
3060 00:23:10.555228 [RankSwap] Rank num 2, (Multi 1), Rank 0
3061 00:23:10.558583 Write Rank1 MR1 =0xd6
3062 00:23:10.558676 [Gating]
3063 00:23:10.558788 ==
3064 00:23:10.565098 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3065 00:23:10.565191 fsp= 1, odt_onoff= 1, Byte mode= 0
3066 00:23:10.568311 ==
3067 00:23:10.571413 3 1 0 |2c2b 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
3068 00:23:10.574915 3 1 4 |2c2b 3535 |(11 11)(0 0) |(1 1)(1 1)| 0
3069 00:23:10.578073 3 1 8 |2c2b 3535 |(11 11)(10 10) |(1 1)(0 0)| 0
3070 00:23:10.584531 3 1 12 |2c2b 3736 |(11 11)(11 11) |(0 0)(0 0)| 0
3071 00:23:10.587897 3 1 16 |2c2b 3636 |(11 11)(11 11) |(1 1)(1 1)| 0
3072 00:23:10.591324 3 1 20 |2c2b 3636 |(11 11)(11 11) |(1 0)(0 0)| 0
3073 00:23:10.597555 3 1 24 |2c2b d0d |(11 11)(11 11) |(1 0)(1 0)| 0
3074 00:23:10.601125 3 1 28 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
3075 00:23:10.604316 3 2 0 |2c2b 100f |(11 11)(11 11) |(1 0)(0 1)| 0
3076 00:23:10.610776 3 2 4 |2c2b 1313 |(11 11)(11 11) |(1 0)(0 1)| 0
3077 00:23:10.613940 3 2 8 |2c2b 3535 |(11 11)(0 0) |(1 0)(1 1)| 0
3078 00:23:10.617305 [Byte 1] Lead/lag falling Transition (3, 2, 8)
3079 00:23:10.623901 3 2 12 |2c2b 3434 |(11 11)(0 0) |(1 0)(0 1)| 0
3080 00:23:10.626987 3 2 16 |2c2c 3433 |(11 0)(11 11) |(0 0)(0 1)| 0
3081 00:23:10.630348 3 2 20 |302 3434 |(11 1)(0 0) |(0 0)(0 1)| 0
3082 00:23:10.633702 3 2 24 |3534 b0b |(11 11)(11 11) |(0 0)(1 1)| 0
3083 00:23:10.640343 3 2 28 |3534 403 |(11 11)(11 11) |(0 0)(1 1)| 0
3084 00:23:10.643725 3 3 0 |3534 1e1d |(11 11)(11 11) |(0 0)(1 1)| 0
3085 00:23:10.646698 [Byte 1] Lead/lag Transition tap number (1)
3086 00:23:10.653304 3 3 4 |3534 3d3c |(11 11)(11 11) |(0 0)(0 0)| 0
3087 00:23:10.656601 3 3 8 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
3088 00:23:10.659846 3 3 12 |3534 3a3a |(11 11)(11 11) |(0 0)(1 1)| 0
3089 00:23:10.666340 3 3 16 |3534 3c3c |(11 11)(0 0) |(0 0)(1 1)| 0
3090 00:23:10.669893 3 3 20 |3534 1313 |(11 11)(1 1) |(1 1)(1 1)| 0
3091 00:23:10.672922 3 3 24 |3534 3938 |(11 11)(11 11) |(1 1)(1 1)| 0
3092 00:23:10.676285 [Byte 0] Lead/lag falling Transition (3, 3, 24)
3093 00:23:10.682909 3 3 28 |3534 504 |(11 11)(11 11) |(0 1)(1 1)| 0
3094 00:23:10.686021 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3095 00:23:10.689127 [Byte 1] Lead/lag falling Transition (3, 4, 0)
3096 00:23:10.695727 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3097 00:23:10.699281 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3098 00:23:10.702291 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3099 00:23:10.709127 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3100 00:23:10.712213 3 4 20 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3101 00:23:10.715446 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3102 00:23:10.722169 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3103 00:23:10.725426 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3104 00:23:10.728748 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3105 00:23:10.734961 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3106 00:23:10.738270 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3107 00:23:10.741596 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3108 00:23:10.748357 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3109 00:23:10.751373 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3110 00:23:10.754704 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3111 00:23:10.761327 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3112 00:23:10.764614 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3113 00:23:10.767735 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3114 00:23:10.774319 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3115 00:23:10.777436 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3116 00:23:10.780790 [Byte 0] Lead/lag Transition tap number (2)
3117 00:23:10.784062 [Byte 1] Lead/lag falling Transition (3, 6, 12)
3118 00:23:10.790852 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3119 00:23:10.794118 3 6 20 |2525 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3120 00:23:10.797119 [Byte 1] Lead/lag Transition tap number (3)
3121 00:23:10.803811 3 6 24 |202 3a3a |(11 11)(11 11) |(0 0)(0 0)| 0
3122 00:23:10.807272 3 6 28 |4646 1414 |(0 0)(11 11) |(0 0)(0 0)| 0
3123 00:23:10.810259 [Byte 0]First pass (3, 6, 28)
3124 00:23:10.813519 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3125 00:23:10.816856 [Byte 1]First pass (3, 7, 0)
3126 00:23:10.820244 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3127 00:23:10.823450 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3128 00:23:10.826621 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3129 00:23:10.833270 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3130 00:23:10.836306 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3131 00:23:10.839698 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3132 00:23:10.842990 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3133 00:23:10.849694 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3134 00:23:10.853014 All bytes gating window > 1UI, Early break!
3135 00:23:10.853100
3136 00:23:10.856291 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
3137 00:23:10.856373
3138 00:23:10.859258 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
3139 00:23:10.859338
3140 00:23:10.859414
3141 00:23:10.859479
3142 00:23:10.862552 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
3143 00:23:10.862630
3144 00:23:10.869188 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
3145 00:23:10.869271
3146 00:23:10.869340
3147 00:23:10.869413 Write Rank1 MR1 =0x56
3148 00:23:10.869490
3149 00:23:10.872575 best RODT dly(2T, 0.5T) = (2, 3)
3150 00:23:10.872653
3151 00:23:10.875737 best RODT dly(2T, 0.5T) = (2, 3)
3152 00:23:10.875817 ==
3153 00:23:10.882314 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3154 00:23:10.885672 fsp= 1, odt_onoff= 1, Byte mode= 0
3155 00:23:10.885763 ==
3156 00:23:10.888849 Start DQ dly to find pass range UseTestEngine =0
3157 00:23:10.892003 x-axis: bit #, y-axis: DQ dly (-127~63)
3158 00:23:10.895304 RX Vref Scan = 0
3159 00:23:10.898548 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3160 00:23:10.901772 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3161 00:23:10.901857 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3162 00:23:10.905366 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3163 00:23:10.908319 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3164 00:23:10.911933 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3165 00:23:10.914882 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3166 00:23:10.918209 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3167 00:23:10.921561 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3168 00:23:10.925005 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3169 00:23:10.928122 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3170 00:23:10.928217 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3171 00:23:10.931525 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3172 00:23:10.934521 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3173 00:23:10.938044 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3174 00:23:10.941043 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3175 00:23:10.944453 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3176 00:23:10.947828 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3177 00:23:10.951138 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3178 00:23:10.954473 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3179 00:23:10.954567 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3180 00:23:10.957801 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3181 00:23:10.960752 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3182 00:23:10.964110 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3183 00:23:10.967405 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3184 00:23:10.970746 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3185 00:23:10.974027 0, [0] xxxoxxxx ooxxxxxo [MSB]
3186 00:23:10.974123 1, [0] xxxoxxxx ooxxxxxo [MSB]
3187 00:23:10.977037 2, [0] xxooxxxo oooxoxxo [MSB]
3188 00:23:10.980363 3, [0] xxooxxxo oooxoxxo [MSB]
3189 00:23:10.983782 4, [0] oooooxoo oooooooo [MSB]
3190 00:23:10.987174 32, [0] oooooooo ooooooox [MSB]
3191 00:23:10.990172 33, [0] oooooooo ooooooox [MSB]
3192 00:23:10.993475 34, [0] oooooooo ooooooox [MSB]
3193 00:23:10.996812 35, [0] ooxxoooo oxooooox [MSB]
3194 00:23:10.996900 36, [0] ooxxoooo xxooooox [MSB]
3195 00:23:11.000186 37, [0] ooxxoooo xxooooox [MSB]
3196 00:23:11.003580 38, [0] ooxxoooo xxooooox [MSB]
3197 00:23:11.006812 39, [0] oxxxooox xxooooox [MSB]
3198 00:23:11.009826 40, [0] oxxxooox xxxxooox [MSB]
3199 00:23:11.013178 41, [0] oxxxxoxx xxxxxoox [MSB]
3200 00:23:11.016527 42, [0] xxxxxoxx xxxxxxxx [MSB]
3201 00:23:11.016621 43, [0] xxxxxxxx xxxxxxxx [MSB]
3202 00:23:11.023172 iDelay=43, Bit 0, Center 22 (4 ~ 41) 38
3203 00:23:11.026379 iDelay=43, Bit 1, Center 21 (4 ~ 38) 35
3204 00:23:11.029690 iDelay=43, Bit 2, Center 18 (2 ~ 34) 33
3205 00:23:11.032891 iDelay=43, Bit 3, Center 16 (-2 ~ 34) 37
3206 00:23:11.036040 iDelay=43, Bit 4, Center 22 (4 ~ 40) 37
3207 00:23:11.039425 iDelay=43, Bit 5, Center 23 (5 ~ 42) 38
3208 00:23:11.042503 iDelay=43, Bit 6, Center 22 (4 ~ 40) 37
3209 00:23:11.046031 iDelay=43, Bit 7, Center 20 (2 ~ 38) 37
3210 00:23:11.049224 iDelay=43, Bit 8, Center 17 (-1 ~ 35) 37
3211 00:23:11.052328 iDelay=43, Bit 9, Center 16 (-2 ~ 34) 37
3212 00:23:11.055612 iDelay=43, Bit 10, Center 20 (2 ~ 39) 38
3213 00:23:11.062299 iDelay=43, Bit 11, Center 21 (4 ~ 39) 36
3214 00:23:11.065533 iDelay=43, Bit 12, Center 21 (2 ~ 40) 39
3215 00:23:11.068872 iDelay=43, Bit 13, Center 22 (4 ~ 41) 38
3216 00:23:11.072159 iDelay=43, Bit 14, Center 22 (4 ~ 41) 38
3217 00:23:11.075604 iDelay=43, Bit 15, Center 13 (-4 ~ 31) 36
3218 00:23:11.075687 ==
3219 00:23:11.081776 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3220 00:23:11.085179 fsp= 1, odt_onoff= 1, Byte mode= 0
3221 00:23:11.085274 ==
3222 00:23:11.085385 DQS Delay:
3223 00:23:11.088487 DQS0 = 0, DQS1 = 0
3224 00:23:11.088580 DQM Delay:
3225 00:23:11.088674 DQM0 = 20, DQM1 = 19
3226 00:23:11.091581 DQ Delay:
3227 00:23:11.094927 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3228 00:23:11.098064 DQ4 =22, DQ5 =23, DQ6 =22, DQ7 =20
3229 00:23:11.101731 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =21
3230 00:23:11.104709 DQ12 =21, DQ13 =22, DQ14 =22, DQ15 =13
3231 00:23:11.104801
3232 00:23:11.104895
3233 00:23:11.104983 DramC Write-DBI off
3234 00:23:11.105068 ==
3235 00:23:11.111213 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3236 00:23:11.114667 fsp= 1, odt_onoff= 1, Byte mode= 0
3237 00:23:11.114761 ==
3238 00:23:11.117763 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3239 00:23:11.117855
3240 00:23:11.121105 Begin, DQ Scan Range 924~1180
3241 00:23:11.121197
3242 00:23:11.121307
3243 00:23:11.124305 TX Vref Scan disable
3244 00:23:11.127503 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3245 00:23:11.130977 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3246 00:23:11.134353 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3247 00:23:11.137278 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3248 00:23:11.140854 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3249 00:23:11.143880 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3250 00:23:11.147132 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3251 00:23:11.150574 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3252 00:23:11.157069 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3253 00:23:11.160234 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3254 00:23:11.163716 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3255 00:23:11.166889 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3256 00:23:11.170099 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3257 00:23:11.173519 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3258 00:23:11.176445 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3259 00:23:11.179856 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3260 00:23:11.183111 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3261 00:23:11.186534 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3262 00:23:11.189836 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3263 00:23:11.193181 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3264 00:23:11.199430 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3265 00:23:11.202878 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3266 00:23:11.206264 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3267 00:23:11.209302 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3268 00:23:11.212676 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3269 00:23:11.215734 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3270 00:23:11.219327 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3271 00:23:11.222564 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3272 00:23:11.225762 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3273 00:23:11.228755 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3274 00:23:11.232357 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3275 00:23:11.235461 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3276 00:23:11.242204 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3277 00:23:11.245114 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3278 00:23:11.248422 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3279 00:23:11.251911 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3280 00:23:11.255206 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3281 00:23:11.258621 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3282 00:23:11.261787 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3283 00:23:11.265164 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3284 00:23:11.268418 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3285 00:23:11.271601 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3286 00:23:11.274717 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3287 00:23:11.278140 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3288 00:23:11.281408 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3289 00:23:11.284718 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3290 00:23:11.288094 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3291 00:23:11.291008 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3292 00:23:11.297599 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3293 00:23:11.300903 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3294 00:23:11.304435 974 |3 6 14|[0] xxxxxxxx xxxxxxxo [MSB]
3295 00:23:11.307587 975 |3 6 15|[0] xxxxxxxx xoxxxxxo [MSB]
3296 00:23:11.310755 976 |3 6 16|[0] xxxxxxxx oooxxxxo [MSB]
3297 00:23:11.313901 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3298 00:23:11.317382 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
3299 00:23:11.320447 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3300 00:23:11.323841 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3301 00:23:11.327226 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3302 00:23:11.330235 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
3303 00:23:11.333409 983 |3 6 23|[0] xooooxoo oooooooo [MSB]
3304 00:23:11.341159 991 |3 6 31|[0] oooooooo ooooooox [MSB]
3305 00:23:11.344418 992 |3 6 32|[0] oooooooo oxooooox [MSB]
3306 00:23:11.347708 993 |3 6 33|[0] oooooooo xxooooox [MSB]
3307 00:23:11.350940 994 |3 6 34|[0] oooooooo xxooooox [MSB]
3308 00:23:11.353905 995 |3 6 35|[0] oooooooo xxooooox [MSB]
3309 00:23:11.357212 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3310 00:23:11.360723 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3311 00:23:11.364087 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3312 00:23:11.367071 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3313 00:23:11.370456 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3314 00:23:11.373759 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3315 00:23:11.380348 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
3316 00:23:11.383553 1003 |3 6 43|[0] ooxxoooo xxxxxxxx [MSB]
3317 00:23:11.386727 1004 |3 6 44|[0] ooxxooox xxxxxxxx [MSB]
3318 00:23:11.389917 1005 |3 6 45|[0] ooxxooox xxxxxxxx [MSB]
3319 00:23:11.393338 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3320 00:23:11.396594 Byte0, DQ PI dly=992, DQM PI dly= 992
3321 00:23:11.399929 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
3322 00:23:11.400007
3323 00:23:11.406478 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
3324 00:23:11.406558
3325 00:23:11.409553 Byte1, DQ PI dly=984, DQM PI dly= 984
3326 00:23:11.413159 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
3327 00:23:11.413246
3328 00:23:11.416375 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
3329 00:23:11.416457
3330 00:23:11.419699 ==
3331 00:23:11.422957 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3332 00:23:11.426151 fsp= 1, odt_onoff= 1, Byte mode= 0
3333 00:23:11.426228 ==
3334 00:23:11.429343 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3335 00:23:11.429417
3336 00:23:11.432708 Begin, DQ Scan Range 960~1024
3337 00:23:11.435741 Write Rank1 MR14 =0x0
3338 00:23:11.443832
3339 00:23:11.443908 CH=1, VrefRange= 0, VrefLevel = 0
3340 00:23:11.450481 TX Bit0 (985~1001) 17 993, Bit8 (978~989) 12 983,
3341 00:23:11.453841 TX Bit1 (985~999) 15 992, Bit9 (976~987) 12 981,
3342 00:23:11.460520 TX Bit2 (983~998) 16 990, Bit10 (977~992) 16 984,
3343 00:23:11.463504 TX Bit3 (981~993) 13 987, Bit11 (979~992) 14 985,
3344 00:23:11.466771 TX Bit4 (984~999) 16 991, Bit12 (980~991) 12 985,
3345 00:23:11.473389 TX Bit5 (985~1000) 16 992, Bit13 (980~993) 14 986,
3346 00:23:11.476898 TX Bit6 (985~999) 15 992, Bit14 (979~991) 13 985,
3347 00:23:11.483100 TX Bit7 (985~998) 14 991, Bit15 (975~984) 10 979,
3348 00:23:11.483186
3349 00:23:11.483262 Write Rank1 MR14 =0x2
3350 00:23:11.492727
3351 00:23:11.492807 CH=1, VrefRange= 0, VrefLevel = 2
3352 00:23:11.499546 TX Bit0 (985~1002) 18 993, Bit8 (977~990) 14 983,
3353 00:23:11.502756 TX Bit1 (984~1000) 17 992, Bit9 (976~989) 14 982,
3354 00:23:11.509163 TX Bit2 (983~998) 16 990, Bit10 (977~992) 16 984,
3355 00:23:11.512531 TX Bit3 (980~995) 16 987, Bit11 (978~992) 15 985,
3356 00:23:11.515635 TX Bit4 (984~1000) 17 992, Bit12 (979~991) 13 985,
3357 00:23:11.522216 TX Bit5 (985~1002) 18 993, Bit13 (979~993) 15 986,
3358 00:23:11.525451 TX Bit6 (985~1000) 16 992, Bit14 (978~992) 15 985,
3359 00:23:11.532096 TX Bit7 (985~998) 14 991, Bit15 (975~985) 11 980,
3360 00:23:11.532181
3361 00:23:11.532251 Write Rank1 MR14 =0x4
3362 00:23:11.542139
3363 00:23:11.544987 CH=1, VrefRange= 0, VrefLevel = 4
3364 00:23:11.548274 TX Bit0 (985~1003) 19 994, Bit8 (977~990) 14 983,
3365 00:23:11.551706 TX Bit1 (985~1000) 16 992, Bit9 (976~989) 14 982,
3366 00:23:11.558356 TX Bit2 (983~998) 16 990, Bit10 (977~993) 17 985,
3367 00:23:11.561566 TX Bit3 (980~995) 16 987, Bit11 (978~993) 16 985,
3368 00:23:11.568313 TX Bit4 (984~1001) 18 992, Bit12 (978~992) 15 985,
3369 00:23:11.571267 TX Bit5 (985~1002) 18 993, Bit13 (979~994) 16 986,
3370 00:23:11.574500 TX Bit6 (984~1000) 17 992, Bit14 (978~992) 15 985,
3371 00:23:11.581009 TX Bit7 (984~999) 16 991, Bit15 (973~986) 14 979,
3372 00:23:11.581111
3373 00:23:11.584488 wait MRW command Rank1 MR14 =0x6 fired (1)
3374 00:23:11.587672 Write Rank1 MR14 =0x6
3375 00:23:11.595127
3376 00:23:11.595211 CH=1, VrefRange= 0, VrefLevel = 6
3377 00:23:11.601877 TX Bit0 (985~1004) 20 994, Bit8 (976~991) 16 983,
3378 00:23:11.605227 TX Bit1 (984~1001) 18 992, Bit9 (976~990) 15 983,
3379 00:23:11.611470 TX Bit2 (983~999) 17 991, Bit10 (977~994) 18 985,
3380 00:23:11.614837 TX Bit3 (979~996) 18 987, Bit11 (978~994) 17 986,
3381 00:23:11.617986 TX Bit4 (984~1001) 18 992, Bit12 (979~992) 14 985,
3382 00:23:11.624551 TX Bit5 (985~1003) 19 994, Bit13 (978~995) 18 986,
3383 00:23:11.627973 TX Bit6 (984~1001) 18 992, Bit14 (978~993) 16 985,
3384 00:23:11.634297 TX Bit7 (984~999) 16 991, Bit15 (973~987) 15 980,
3385 00:23:11.634389
3386 00:23:11.634459 Write Rank1 MR14 =0x8
3387 00:23:11.644493
3388 00:23:11.644575 CH=1, VrefRange= 0, VrefLevel = 8
3389 00:23:11.651450 TX Bit0 (985~1005) 21 995, Bit8 (976~991) 16 983,
3390 00:23:11.654367 TX Bit1 (984~1002) 19 993, Bit9 (975~990) 16 982,
3391 00:23:11.660979 TX Bit2 (982~999) 18 990, Bit10 (977~995) 19 986,
3392 00:23:11.664437 TX Bit3 (979~997) 19 988, Bit11 (978~995) 18 986,
3393 00:23:11.667523 TX Bit4 (983~1002) 20 992, Bit12 (979~993) 15 986,
3394 00:23:11.674303 TX Bit5 (984~1004) 21 994, Bit13 (978~996) 19 987,
3395 00:23:11.677499 TX Bit6 (984~1002) 19 993, Bit14 (978~993) 16 985,
3396 00:23:11.683987 TX Bit7 (984~1000) 17 992, Bit15 (973~988) 16 980,
3397 00:23:11.684078
3398 00:23:11.684148 Write Rank1 MR14 =0xa
3399 00:23:11.694389
3400 00:23:11.697680 CH=1, VrefRange= 0, VrefLevel = 10
3401 00:23:11.701003 TX Bit0 (985~1005) 21 995, Bit8 (977~991) 15 984,
3402 00:23:11.704226 TX Bit1 (984~1003) 20 993, Bit9 (975~990) 16 982,
3403 00:23:11.710879 TX Bit2 (982~1000) 19 991, Bit10 (977~995) 19 986,
3404 00:23:11.713738 TX Bit3 (979~997) 19 988, Bit11 (977~995) 19 986,
3405 00:23:11.720690 TX Bit4 (983~1003) 21 993, Bit12 (978~994) 17 986,
3406 00:23:11.723674 TX Bit5 (984~1004) 21 994, Bit13 (978~997) 20 987,
3407 00:23:11.727126 TX Bit6 (984~1003) 20 993, Bit14 (977~994) 18 985,
3408 00:23:11.733574 TX Bit7 (984~1001) 18 992, Bit15 (972~989) 18 980,
3409 00:23:11.733658
3410 00:23:11.733733 Write Rank1 MR14 =0xc
3411 00:23:11.744223
3412 00:23:11.747458 CH=1, VrefRange= 0, VrefLevel = 12
3413 00:23:11.750566 TX Bit0 (984~1005) 22 994, Bit8 (976~992) 17 984,
3414 00:23:11.753900 TX Bit1 (984~1003) 20 993, Bit9 (975~991) 17 983,
3415 00:23:11.760505 TX Bit2 (982~1001) 20 991, Bit10 (976~996) 21 986,
3416 00:23:11.763484 TX Bit3 (979~998) 20 988, Bit11 (977~996) 20 986,
3417 00:23:11.770294 TX Bit4 (983~1004) 22 993, Bit12 (978~995) 18 986,
3418 00:23:11.773346 TX Bit5 (984~1005) 22 994, Bit13 (978~997) 20 987,
3419 00:23:11.776854 TX Bit6 (984~1004) 21 994, Bit14 (977~995) 19 986,
3420 00:23:11.783207 TX Bit7 (984~1002) 19 993, Bit15 (971~990) 20 980,
3421 00:23:11.783297
3422 00:23:11.783367 Write Rank1 MR14 =0xe
3423 00:23:11.794041
3424 00:23:11.796957 CH=1, VrefRange= 0, VrefLevel = 14
3425 00:23:11.800340 TX Bit0 (984~1005) 22 994, Bit8 (975~992) 18 983,
3426 00:23:11.803557 TX Bit1 (984~1004) 21 994, Bit9 (975~991) 17 983,
3427 00:23:11.810271 TX Bit2 (981~1001) 21 991, Bit10 (976~997) 22 986,
3428 00:23:11.813471 TX Bit3 (978~998) 21 988, Bit11 (977~997) 21 987,
3429 00:23:11.820239 TX Bit4 (983~1004) 22 993, Bit12 (977~996) 20 986,
3430 00:23:11.823187 TX Bit5 (984~1005) 22 994, Bit13 (978~998) 21 988,
3431 00:23:11.826462 TX Bit6 (983~1004) 22 993, Bit14 (977~995) 19 986,
3432 00:23:11.833306 TX Bit7 (984~1003) 20 993, Bit15 (971~990) 20 980,
3433 00:23:11.833396
3434 00:23:11.833479 Write Rank1 MR14 =0x10
3435 00:23:11.843935
3436 00:23:11.847274 CH=1, VrefRange= 0, VrefLevel = 16
3437 00:23:11.850559 TX Bit0 (984~1006) 23 995, Bit8 (976~992) 17 984,
3438 00:23:11.853647 TX Bit1 (983~1005) 23 994, Bit9 (975~991) 17 983,
3439 00:23:11.860332 TX Bit2 (980~1002) 23 991, Bit10 (976~997) 22 986,
3440 00:23:11.863642 TX Bit3 (978~998) 21 988, Bit11 (977~998) 22 987,
3441 00:23:11.869918 TX Bit4 (982~1005) 24 993, Bit12 (977~996) 20 986,
3442 00:23:11.873209 TX Bit5 (984~1005) 22 994, Bit13 (977~998) 22 987,
3443 00:23:11.876474 TX Bit6 (983~1005) 23 994, Bit14 (977~996) 20 986,
3444 00:23:11.883263 TX Bit7 (983~1003) 21 993, Bit15 (970~991) 22 980,
3445 00:23:11.883354
3446 00:23:11.886432 Write Rank1 MR14 =0x12
3447 00:23:11.893955
3448 00:23:11.897231 CH=1, VrefRange= 0, VrefLevel = 18
3449 00:23:11.900416 TX Bit0 (984~1006) 23 995, Bit8 (975~993) 19 984,
3450 00:23:11.903757 TX Bit1 (983~1005) 23 994, Bit9 (974~992) 19 983,
3451 00:23:11.910184 TX Bit2 (980~1003) 24 991, Bit10 (976~998) 23 987,
3452 00:23:11.913470 TX Bit3 (978~999) 22 988, Bit11 (977~998) 22 987,
3453 00:23:11.920194 TX Bit4 (982~1005) 24 993, Bit12 (977~997) 21 987,
3454 00:23:11.923573 TX Bit5 (984~1005) 22 994, Bit13 (977~998) 22 987,
3455 00:23:11.926929 TX Bit6 (983~1005) 23 994, Bit14 (976~997) 22 986,
3456 00:23:11.933286 TX Bit7 (983~1004) 22 993, Bit15 (970~991) 22 980,
3457 00:23:11.933377
3458 00:23:11.933453 Write Rank1 MR14 =0x14
3459 00:23:11.944011
3460 00:23:11.947158 CH=1, VrefRange= 0, VrefLevel = 20
3461 00:23:11.950401 TX Bit0 (984~1006) 23 995, Bit8 (975~994) 20 984,
3462 00:23:11.953577 TX Bit1 (983~1005) 23 994, Bit9 (973~992) 20 982,
3463 00:23:11.960093 TX Bit2 (980~1003) 24 991, Bit10 (975~998) 24 986,
3464 00:23:11.963427 TX Bit3 (978~999) 22 988, Bit11 (977~998) 22 987,
3465 00:23:11.970032 TX Bit4 (982~1005) 24 993, Bit12 (977~997) 21 987,
3466 00:23:11.973331 TX Bit5 (984~1006) 23 995, Bit13 (977~999) 23 988,
3467 00:23:11.976582 TX Bit6 (983~1005) 23 994, Bit14 (976~998) 23 987,
3468 00:23:11.983344 TX Bit7 (983~1004) 22 993, Bit15 (970~991) 22 980,
3469 00:23:11.983431
3470 00:23:11.983501 Write Rank1 MR14 =0x16
3471 00:23:11.993931
3472 00:23:11.997253 CH=1, VrefRange= 0, VrefLevel = 22
3473 00:23:12.000556 TX Bit0 (984~1006) 23 995, Bit8 (974~994) 21 984,
3474 00:23:12.003895 TX Bit1 (982~1006) 25 994, Bit9 (973~993) 21 983,
3475 00:23:12.010235 TX Bit2 (979~1004) 26 991, Bit10 (975~998) 24 986,
3476 00:23:12.013452 TX Bit3 (978~1000) 23 989, Bit11 (976~998) 23 987,
3477 00:23:12.020118 TX Bit4 (981~1006) 26 993, Bit12 (977~998) 22 987,
3478 00:23:12.023389 TX Bit5 (983~1006) 24 994, Bit13 (977~999) 23 988,
3479 00:23:12.026814 TX Bit6 (982~1006) 25 994, Bit14 (976~998) 23 987,
3480 00:23:12.033123 TX Bit7 (982~1005) 24 993, Bit15 (970~992) 23 981,
3481 00:23:12.033210
3482 00:23:12.036318 Write Rank1 MR14 =0x18
3483 00:23:12.043899
3484 00:23:12.047524 CH=1, VrefRange= 0, VrefLevel = 24
3485 00:23:12.050693 TX Bit0 (983~1006) 24 994, Bit8 (975~995) 21 985,
3486 00:23:12.054056 TX Bit1 (982~1005) 24 993, Bit9 (973~993) 21 983,
3487 00:23:12.060255 TX Bit2 (979~1004) 26 991, Bit10 (975~999) 25 987,
3488 00:23:12.063813 TX Bit3 (977~1000) 24 988, Bit11 (976~999) 24 987,
3489 00:23:12.070403 TX Bit4 (981~1006) 26 993, Bit12 (976~998) 23 987,
3490 00:23:12.073761 TX Bit5 (983~1006) 24 994, Bit13 (977~999) 23 988,
3491 00:23:12.076867 TX Bit6 (982~1005) 24 993, Bit14 (975~998) 24 986,
3492 00:23:12.083407 TX Bit7 (982~1005) 24 993, Bit15 (970~992) 23 981,
3493 00:23:12.083494
3494 00:23:12.086415 Write Rank1 MR14 =0x1a
3495 00:23:12.094163
3496 00:23:12.097571 CH=1, VrefRange= 0, VrefLevel = 26
3497 00:23:12.100794 TX Bit0 (983~1007) 25 995, Bit8 (974~995) 22 984,
3498 00:23:12.104067 TX Bit1 (982~1006) 25 994, Bit9 (972~994) 23 983,
3499 00:23:12.110762 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
3500 00:23:12.113894 TX Bit3 (977~1001) 25 989, Bit11 (976~999) 24 987,
3501 00:23:12.120427 TX Bit4 (980~1006) 27 993, Bit12 (976~998) 23 987,
3502 00:23:12.123731 TX Bit5 (983~1006) 24 994, Bit13 (976~999) 24 987,
3503 00:23:12.126705 TX Bit6 (981~1006) 26 993, Bit14 (975~998) 24 986,
3504 00:23:12.133347 TX Bit7 (982~1005) 24 993, Bit15 (970~992) 23 981,
3505 00:23:12.133435
3506 00:23:12.136838 Write Rank1 MR14 =0x1c
3507 00:23:12.144482
3508 00:23:12.147730 CH=1, VrefRange= 0, VrefLevel = 28
3509 00:23:12.151014 TX Bit0 (983~1007) 25 995, Bit8 (973~996) 24 984,
3510 00:23:12.154178 TX Bit1 (981~1006) 26 993, Bit9 (972~994) 23 983,
3511 00:23:12.160982 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
3512 00:23:12.164306 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
3513 00:23:12.170602 TX Bit4 (980~1006) 27 993, Bit12 (976~999) 24 987,
3514 00:23:12.173894 TX Bit5 (983~1007) 25 995, Bit13 (976~999) 24 987,
3515 00:23:12.177073 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
3516 00:23:12.183797 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
3517 00:23:12.183887
3518 00:23:12.187110 Write Rank1 MR14 =0x1e
3519 00:23:12.194809
3520 00:23:12.198069 CH=1, VrefRange= 0, VrefLevel = 30
3521 00:23:12.201410 TX Bit0 (983~1007) 25 995, Bit8 (973~996) 24 984,
3522 00:23:12.204720 TX Bit1 (981~1006) 26 993, Bit9 (972~994) 23 983,
3523 00:23:12.211280 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
3524 00:23:12.214352 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
3525 00:23:12.221066 TX Bit4 (980~1006) 27 993, Bit12 (976~999) 24 987,
3526 00:23:12.224358 TX Bit5 (983~1007) 25 995, Bit13 (976~999) 24 987,
3527 00:23:12.227718 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
3528 00:23:12.234168 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
3529 00:23:12.234259
3530 00:23:12.237334 Write Rank1 MR14 =0x20
3531 00:23:12.245205
3532 00:23:12.248372 CH=1, VrefRange= 0, VrefLevel = 32
3533 00:23:12.251673 TX Bit0 (983~1007) 25 995, Bit8 (973~996) 24 984,
3534 00:23:12.254905 TX Bit1 (981~1006) 26 993, Bit9 (972~994) 23 983,
3535 00:23:12.261688 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
3536 00:23:12.264887 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
3537 00:23:12.271450 TX Bit4 (980~1006) 27 993, Bit12 (976~999) 24 987,
3538 00:23:12.274820 TX Bit5 (983~1007) 25 995, Bit13 (976~999) 24 987,
3539 00:23:12.278027 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
3540 00:23:12.284459 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
3541 00:23:12.284546
3542 00:23:12.287442 Write Rank1 MR14 =0x22
3543 00:23:12.295282
3544 00:23:12.298878 CH=1, VrefRange= 0, VrefLevel = 34
3545 00:23:12.302109 TX Bit0 (983~1007) 25 995, Bit8 (973~996) 24 984,
3546 00:23:12.305400 TX Bit1 (981~1006) 26 993, Bit9 (972~994) 23 983,
3547 00:23:12.311860 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
3548 00:23:12.315081 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
3549 00:23:12.321443 TX Bit4 (980~1006) 27 993, Bit12 (976~999) 24 987,
3550 00:23:12.324879 TX Bit5 (983~1007) 25 995, Bit13 (976~999) 24 987,
3551 00:23:12.328027 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
3552 00:23:12.334639 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
3553 00:23:12.334783
3554 00:23:12.337849 Write Rank1 MR14 =0x24
3555 00:23:12.345705
3556 00:23:12.349001 CH=1, VrefRange= 0, VrefLevel = 36
3557 00:23:12.352194 TX Bit0 (983~1007) 25 995, Bit8 (973~996) 24 984,
3558 00:23:12.355299 TX Bit1 (981~1006) 26 993, Bit9 (972~994) 23 983,
3559 00:23:12.362138 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
3560 00:23:12.365267 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
3561 00:23:12.371609 TX Bit4 (980~1006) 27 993, Bit12 (976~999) 24 987,
3562 00:23:12.375174 TX Bit5 (983~1007) 25 995, Bit13 (976~999) 24 987,
3563 00:23:12.378469 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
3564 00:23:12.385009 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
3565 00:23:12.385098
3566 00:23:12.388205 Write Rank1 MR14 =0x26
3567 00:23:12.396139
3568 00:23:12.399130 CH=1, VrefRange= 0, VrefLevel = 38
3569 00:23:12.402711 TX Bit0 (983~1007) 25 995, Bit8 (973~996) 24 984,
3570 00:23:12.405890 TX Bit1 (981~1006) 26 993, Bit9 (972~994) 23 983,
3571 00:23:12.412522 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
3572 00:23:12.415462 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
3573 00:23:12.422295 TX Bit4 (980~1006) 27 993, Bit12 (976~999) 24 987,
3574 00:23:12.425411 TX Bit5 (983~1007) 25 995, Bit13 (976~999) 24 987,
3575 00:23:12.428520 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
3576 00:23:12.435126 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
3577 00:23:12.435212
3578 00:23:12.435286
3579 00:23:12.438450 TX Vref found, early break! 371< 380
3580 00:23:12.441724 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
3581 00:23:12.445040 u1DelayCellOfst[0]=7 cells (6 PI)
3582 00:23:12.448339 u1DelayCellOfst[1]=5 cells (4 PI)
3583 00:23:12.451717 u1DelayCellOfst[2]=3 cells (3 PI)
3584 00:23:12.455009 u1DelayCellOfst[3]=0 cells (0 PI)
3585 00:23:12.458156 u1DelayCellOfst[4]=5 cells (4 PI)
3586 00:23:12.461280 u1DelayCellOfst[5]=7 cells (6 PI)
3587 00:23:12.464661 u1DelayCellOfst[6]=5 cells (4 PI)
3588 00:23:12.467906 u1DelayCellOfst[7]=5 cells (4 PI)
3589 00:23:12.471450 Byte0, DQ PI dly=989, DQM PI dly= 992
3590 00:23:12.474607 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3591 00:23:12.474729
3592 00:23:12.477965 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3593 00:23:12.481202
3594 00:23:12.481291 u1DelayCellOfst[8]=5 cells (4 PI)
3595 00:23:12.484391 u1DelayCellOfst[9]=3 cells (3 PI)
3596 00:23:12.487575 u1DelayCellOfst[10]=9 cells (7 PI)
3597 00:23:12.491030 u1DelayCellOfst[11]=9 cells (7 PI)
3598 00:23:12.494316 u1DelayCellOfst[12]=9 cells (7 PI)
3599 00:23:12.497264 u1DelayCellOfst[13]=9 cells (7 PI)
3600 00:23:12.500558 u1DelayCellOfst[14]=9 cells (7 PI)
3601 00:23:12.503855 u1DelayCellOfst[15]=0 cells (0 PI)
3602 00:23:12.507461 Byte1, DQ PI dly=980, DQM PI dly= 983
3603 00:23:12.510715 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
3604 00:23:12.510798
3605 00:23:12.516933 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
3606 00:23:12.517019
3607 00:23:12.517098 Write Rank1 MR14 =0x1c
3608 00:23:12.517164
3609 00:23:12.520272 Final TX Range 0 Vref 28
3610 00:23:12.520348
3611 00:23:12.527089 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3612 00:23:12.527175
3613 00:23:12.533352 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3614 00:23:12.539990 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3615 00:23:12.549901 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3616 00:23:12.549990 Write Rank1 MR3 =0xb0
3617 00:23:12.552928 DramC Write-DBI on
3618 00:23:12.553012 ==
3619 00:23:12.556215 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3620 00:23:12.559761 fsp= 1, odt_onoff= 1, Byte mode= 0
3621 00:23:12.559842 ==
3622 00:23:12.566018 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3623 00:23:12.566113
3624 00:23:12.566183 Begin, DQ Scan Range 703~767
3625 00:23:12.569452
3626 00:23:12.569542
3627 00:23:12.569611 TX Vref Scan disable
3628 00:23:12.572789 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3629 00:23:12.576058 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3630 00:23:12.579366 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3631 00:23:12.582641 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3632 00:23:12.585867 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3633 00:23:12.592526 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3634 00:23:12.595765 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3635 00:23:12.599046 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3636 00:23:12.602275 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3637 00:23:12.605668 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3638 00:23:12.608547 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3639 00:23:12.611848 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3640 00:23:12.615037 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3641 00:23:12.618311 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3642 00:23:12.621666 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3643 00:23:12.625065 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3644 00:23:12.628193 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3645 00:23:12.631776 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3646 00:23:12.634779 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3647 00:23:12.638024 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3648 00:23:12.644642 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3649 00:23:12.647760 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3650 00:23:12.654629 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3651 00:23:12.657975 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3652 00:23:12.660799 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3653 00:23:12.664210 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3654 00:23:12.667690 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3655 00:23:12.670697 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3656 00:23:12.674075 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3657 00:23:12.677188 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3658 00:23:12.680623 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3659 00:23:12.683854 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3660 00:23:12.687227 Byte0, DQ PI dly=737, DQM PI dly= 737
3661 00:23:12.693971 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
3662 00:23:12.694058
3663 00:23:12.696960 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
3664 00:23:12.697046
3665 00:23:12.700583 Byte1, DQ PI dly=728, DQM PI dly= 728
3666 00:23:12.703524 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
3667 00:23:12.703606
3668 00:23:12.710261 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
3669 00:23:12.710346
3670 00:23:12.716871 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3671 00:23:12.723040 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3672 00:23:12.729807 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3673 00:23:12.733013 Write Rank1 MR3 =0x30
3674 00:23:12.733104 DramC Write-DBI off
3675 00:23:12.733175
3676 00:23:12.736560 [DATLAT]
3677 00:23:12.739512 Freq=1600, CH1 RK1, use_rxtx_scan=0
3678 00:23:12.739601
3679 00:23:12.739671 DATLAT Default: 0x10
3680 00:23:12.742901 7, 0xFFFF, sum=0
3681 00:23:12.742984 8, 0xFFFF, sum=0
3682 00:23:12.746160 9, 0xFFFF, sum=0
3683 00:23:12.746244 10, 0xFFFF, sum=0
3684 00:23:12.749316 11, 0xFFFF, sum=0
3685 00:23:12.749442 12, 0xFFFF, sum=0
3686 00:23:12.752715 13, 0xFFFF, sum=0
3687 00:23:12.752805 14, 0x0, sum=1
3688 00:23:12.752877 15, 0x0, sum=2
3689 00:23:12.756017 16, 0x0, sum=3
3690 00:23:12.756109 17, 0x0, sum=4
3691 00:23:12.762358 pattern=2 first_step=14 total pass=5 best_step=16
3692 00:23:12.762452 ==
3693 00:23:12.765718 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3694 00:23:12.768987 fsp= 1, odt_onoff= 1, Byte mode= 0
3695 00:23:12.769081 ==
3696 00:23:12.775692 Start DQ dly to find pass range UseTestEngine =1
3697 00:23:12.778985 x-axis: bit #, y-axis: DQ dly (-127~63)
3698 00:23:12.779079 RX Vref Scan = 0
3699 00:23:12.782294 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3700 00:23:12.785402 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3701 00:23:12.788474 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3702 00:23:12.791785 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3703 00:23:12.795040 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3704 00:23:12.798579 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3705 00:23:12.798674 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3706 00:23:12.801784 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3707 00:23:12.804917 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3708 00:23:12.808259 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3709 00:23:12.811707 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3710 00:23:12.814903 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3711 00:23:12.818073 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3712 00:23:12.821333 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3713 00:23:12.824545 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3714 00:23:12.824636 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3715 00:23:12.827920 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3716 00:23:12.831156 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3717 00:23:12.834480 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3718 00:23:12.837674 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3719 00:23:12.840923 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3720 00:23:12.844250 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3721 00:23:12.847473 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3722 00:23:12.847572 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3723 00:23:12.850841 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3724 00:23:12.854259 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3725 00:23:12.857550 0, [0] xxxoxxxx ooxxxxxo [MSB]
3726 00:23:12.860481 1, [0] xxxoxxxx ooxxxxxo [MSB]
3727 00:23:12.863836 2, [0] xxxoxxxx ooxxxxxo [MSB]
3728 00:23:12.867178 3, [0] oxooxxxo oooxooxo [MSB]
3729 00:23:12.867270 4, [0] oooooxxo oooooooo [MSB]
3730 00:23:12.870492 5, [0] ooooooxo oooooooo [MSB]
3731 00:23:12.875038 32, [0] oooooooo ooooooox [MSB]
3732 00:23:12.878178 33, [0] oooooooo oxooooox [MSB]
3733 00:23:12.881556 34, [0] oooxoooo oxooooox [MSB]
3734 00:23:12.884903 35, [0] ooxxoooo oxooooox [MSB]
3735 00:23:12.888117 36, [0] ooxxoooo xxooooox [MSB]
3736 00:23:12.891529 37, [0] ooxxoooo xxooooox [MSB]
3737 00:23:12.894755 38, [0] ooxxooox xxooxoox [MSB]
3738 00:23:12.894854 39, [0] oxxxooox xxxxxoox [MSB]
3739 00:23:12.897948 40, [0] oxxxxoox xxxxxxox [MSB]
3740 00:23:12.901172 41, [0] xxxxxxxx xxxxxxxx [MSB]
3741 00:23:12.904402 iDelay=41, Bit 0, Center 21 (3 ~ 40) 38
3742 00:23:12.907703 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
3743 00:23:12.910907 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3744 00:23:12.917492 iDelay=41, Bit 3, Center 15 (-2 ~ 33) 36
3745 00:23:12.921041 iDelay=41, Bit 4, Center 21 (4 ~ 39) 36
3746 00:23:12.924315 iDelay=41, Bit 5, Center 22 (5 ~ 40) 36
3747 00:23:12.927590 iDelay=41, Bit 6, Center 23 (6 ~ 40) 35
3748 00:23:12.930476 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
3749 00:23:12.934020 iDelay=41, Bit 8, Center 17 (-1 ~ 35) 37
3750 00:23:12.937117 iDelay=41, Bit 9, Center 15 (-2 ~ 32) 35
3751 00:23:12.940369 iDelay=41, Bit 10, Center 20 (3 ~ 38) 36
3752 00:23:12.943889 iDelay=41, Bit 11, Center 21 (4 ~ 38) 35
3753 00:23:12.947131 iDelay=41, Bit 12, Center 20 (3 ~ 37) 35
3754 00:23:12.950166 iDelay=41, Bit 13, Center 21 (3 ~ 39) 37
3755 00:23:12.956678 iDelay=41, Bit 14, Center 22 (4 ~ 40) 37
3756 00:23:12.960102 iDelay=41, Bit 15, Center 13 (-4 ~ 31) 36
3757 00:23:12.960188 ==
3758 00:23:12.963398 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3759 00:23:12.966697 fsp= 1, odt_onoff= 1, Byte mode= 0
3760 00:23:12.966777 ==
3761 00:23:12.969789 DQS Delay:
3762 00:23:12.969867 DQS0 = 0, DQS1 = 0
3763 00:23:12.973090 DQM Delay:
3764 00:23:12.973171 DQM0 = 20, DQM1 = 18
3765 00:23:12.973282 DQ Delay:
3766 00:23:12.976405 DQ0 =21, DQ1 =21, DQ2 =18, DQ3 =15
3767 00:23:12.979687 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3768 00:23:12.983282 DQ8 =17, DQ9 =15, DQ10 =20, DQ11 =21
3769 00:23:12.986570 DQ12 =20, DQ13 =21, DQ14 =22, DQ15 =13
3770 00:23:12.986657
3771 00:23:12.986726
3772 00:23:12.986796
3773 00:23:12.989520 [DramC_TX_OE_Calibration] TA2
3774 00:23:12.992823 Original DQ_B0 (3 6) =30, OEN = 27
3775 00:23:12.996227 Original DQ_B1 (3 6) =30, OEN = 27
3776 00:23:12.999508 23, 0x0, End_B0=23 End_B1=23
3777 00:23:13.002738 24, 0x0, End_B0=24 End_B1=24
3778 00:23:13.006078 25, 0x0, End_B0=25 End_B1=25
3779 00:23:13.006168 26, 0x0, End_B0=26 End_B1=26
3780 00:23:13.009324 27, 0x0, End_B0=27 End_B1=27
3781 00:23:13.012595 28, 0x0, End_B0=28 End_B1=28
3782 00:23:13.015921 29, 0x0, End_B0=29 End_B1=29
3783 00:23:13.019210 30, 0x0, End_B0=30 End_B1=30
3784 00:23:13.019300 31, 0xFFFF, End_B0=30 End_B1=30
3785 00:23:13.025773 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3786 00:23:13.032150 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3787 00:23:13.032236
3788 00:23:13.032306
3789 00:23:13.032379 Write Rank1 MR23 =0x3f
3790 00:23:13.035660 [DQSOSC]
3791 00:23:13.042115 [DQSOSCAuto] RK1, (LSB)MR18= 0xb7b7, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3792 00:23:13.048732 CH1_RK1: MR19=0x202, MR18=0xB7B7, DQSOSC=453, MR23=63, INC=11, DEC=17
3793 00:23:13.051910 Write Rank1 MR23 =0x3f
3794 00:23:13.051997 [DQSOSC]
3795 00:23:13.058372 [DQSOSCAuto] RK1, (LSB)MR18= 0xbaba, (MSB)MR19= 0x202, tDQSOscB0 = 451 ps tDQSOscB1 = 451 ps
3796 00:23:13.061729 CH1 RK1: MR19=202, MR18=BABA
3797 00:23:13.065142 [RxdqsGatingPostProcess] freq 1600
3798 00:23:13.071502 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3799 00:23:13.071585 Rank: 0
3800 00:23:13.074835 best DQS0 dly(2T, 0.5T) = (2, 6)
3801 00:23:13.078000 best DQS1 dly(2T, 0.5T) = (2, 6)
3802 00:23:13.081253 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3803 00:23:13.084484 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3804 00:23:13.084563 Rank: 1
3805 00:23:13.087894 best DQS0 dly(2T, 0.5T) = (2, 6)
3806 00:23:13.091047 best DQS1 dly(2T, 0.5T) = (2, 6)
3807 00:23:13.094251 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3808 00:23:13.097558 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3809 00:23:13.100903 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3810 00:23:13.104097 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3811 00:23:13.110829 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3812 00:23:13.110916
3813 00:23:13.110994
3814 00:23:13.113917 [Calibration Summary] Freqency 1600
3815 00:23:13.113994 CH 0, Rank 0
3816 00:23:13.117308 All Pass.
3817 00:23:13.117417
3818 00:23:13.117509 CH 0, Rank 1
3819 00:23:13.117575 All Pass.
3820 00:23:13.117638
3821 00:23:13.120692 CH 1, Rank 0
3822 00:23:13.120763 All Pass.
3823 00:23:13.120827
3824 00:23:13.120894 CH 1, Rank 1
3825 00:23:13.124063 All Pass.
3826 00:23:13.124142
3827 00:23:13.130204 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3828 00:23:13.136934 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3829 00:23:13.143590 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3830 00:23:13.146910 Write Rank0 MR3 =0xb0
3831 00:23:13.153147 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3832 00:23:13.159786 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3833 00:23:13.166363 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3834 00:23:13.166451 Write Rank1 MR3 =0xb0
3835 00:23:13.172941 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3836 00:23:13.182867 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3837 00:23:13.189240 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3838 00:23:13.189325 Write Rank0 MR3 =0xb0
3839 00:23:13.195768 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3840 00:23:13.202290 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3841 00:23:13.212335 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3842 00:23:13.212430 Write Rank1 MR3 =0xb0
3843 00:23:13.215599 DramC Write-DBI on
3844 00:23:13.218987 [GetDramInforAfterCalByMRR] Vendor 6.
3845 00:23:13.222116 [GetDramInforAfterCalByMRR] Revision 505.
3846 00:23:13.222209 MR8 1111
3847 00:23:13.228838 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3848 00:23:13.228931 MR8 1111
3849 00:23:13.231762 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3850 00:23:13.235240 MR8 1111
3851 00:23:13.238363 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3852 00:23:13.238446 MR8 1111
3853 00:23:13.244716 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3854 00:23:13.254761 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3855 00:23:13.254851 Write Rank0 MR13 =0xd0
3856 00:23:13.257801 Write Rank1 MR13 =0xd0
3857 00:23:13.261356 Write Rank0 MR13 =0xd0
3858 00:23:13.261472 Write Rank1 MR13 =0xd0
3859 00:23:13.264489 Save calibration result to emmc
3860 00:23:13.264567
3861 00:23:13.264634
3862 00:23:13.267897 [DramcModeReg_Check] Freq_1600, FSP_1
3863 00:23:13.270856 FSP_1, CH_0, RK0
3864 00:23:13.270936 Write Rank0 MR13 =0xd8
3865 00:23:13.274205 MR12 = 0x5c (global = 0x5c) match
3866 00:23:13.277391 MR14 = 0x1e (global = 0x1e) match
3867 00:23:13.280699 FSP_1, CH_0, RK1
3868 00:23:13.280781 Write Rank1 MR13 =0xd8
3869 00:23:13.283910 MR12 = 0x5e (global = 0x5e) match
3870 00:23:13.287546 MR14 = 0x1e (global = 0x1e) match
3871 00:23:13.290525 FSP_1, CH_1, RK0
3872 00:23:13.290606 Write Rank0 MR13 =0xd8
3873 00:23:13.294065 MR12 = 0x5e (global = 0x5e) match
3874 00:23:13.297005 MR14 = 0x1c (global = 0x1c) match
3875 00:23:13.300667 FSP_1, CH_1, RK1
3876 00:23:13.300747 Write Rank1 MR13 =0xd8
3877 00:23:13.303890 MR12 = 0x5c (global = 0x5c) match
3878 00:23:13.306911 MR14 = 0x1c (global = 0x1c) match
3879 00:23:13.306989
3880 00:23:13.313710 [MEM_TEST] 02: After DFS, before run time config
3881 00:23:13.323475 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3882 00:23:13.323568
3883 00:23:13.323640 [TA2_TEST]
3884 00:23:13.323706 === TA2 HW
3885 00:23:13.326632 TA2 PAT: XTALK
3886 00:23:13.329908 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3887 00:23:13.336507 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3888 00:23:13.339682 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3889 00:23:13.346522 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3890 00:23:13.346605
3891 00:23:13.346674
3892 00:23:13.346750 Settings after calibration
3893 00:23:13.346828
3894 00:23:13.349649 [DramcRunTimeConfig]
3895 00:23:13.352965 TransferPLLToSPMControl - MODE SW PHYPLL
3896 00:23:13.356241 TX_TRACKING: ON
3897 00:23:13.356325 RX_TRACKING: ON
3898 00:23:13.356403 HW_GATING: ON
3899 00:23:13.359523 HW_GATING DBG: OFF
3900 00:23:13.359601 ddr_geometry:1
3901 00:23:13.362778 ddr_geometry:1
3902 00:23:13.362857 ddr_geometry:1
3903 00:23:13.365886 ddr_geometry:1
3904 00:23:13.365973 ddr_geometry:1
3905 00:23:13.369212 ddr_geometry:1
3906 00:23:13.369295 ddr_geometry:1
3907 00:23:13.369371 ddr_geometry:1
3908 00:23:13.372401 High Freq DUMMY_READ_FOR_TRACKING: ON
3909 00:23:13.375834 ZQCS_ENABLE_LP4: OFF
3910 00:23:13.379066 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3911 00:23:13.382190 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3912 00:23:13.385427 SPM_CONTROL_AFTERK: ON
3913 00:23:13.385524 IMPEDANCE_TRACKING: ON
3914 00:23:13.388739 TEMP_SENSOR: ON
3915 00:23:13.388823 PER_BANK_REFRESH: ON
3916 00:23:13.392074 HW_SAVE_FOR_SR: ON
3917 00:23:13.395383 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3918 00:23:13.398352 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3919 00:23:13.401948 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3920 00:23:13.402028 Read ODT Tracking: ON
3921 00:23:13.404993 =========================
3922 00:23:13.405070
3923 00:23:13.408362 [TA2_TEST]
3924 00:23:13.408452 === TA2 HW
3925 00:23:13.411684 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3926 00:23:13.418043 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3927 00:23:13.421346 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3928 00:23:13.427884 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3929 00:23:13.428012
3930 00:23:13.431059 [MEM_TEST] 03: After run time config
3931 00:23:13.440994 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3932 00:23:13.444508 [complex_mem_test] start addr:0x40024000, len:131072
3933 00:23:13.648998 1st complex R/W mem test pass
3934 00:23:13.655436 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3935 00:23:13.658786 sync preloader write leveling
3936 00:23:13.661712 sync preloader cbt_mr12
3937 00:23:13.665035 sync preloader cbt_clk_dly
3938 00:23:13.665120 sync preloader cbt_cmd_dly
3939 00:23:13.668213 sync preloader cbt_cs
3940 00:23:13.671520 sync preloader cbt_ca_perbit_delay
3941 00:23:13.674880 sync preloader clk_delay
3942 00:23:13.674961 sync preloader dqs_delay
3943 00:23:13.678206 sync preloader u1Gating2T_Save
3944 00:23:13.681549 sync preloader u1Gating05T_Save
3945 00:23:13.684848 sync preloader u1Gatingfine_tune_Save
3946 00:23:13.688042 sync preloader u1Gatingucpass_count_Save
3947 00:23:13.691485 sync preloader u1TxWindowPerbitVref_Save
3948 00:23:13.694707 sync preloader u1TxCenter_min_Save
3949 00:23:13.697848 sync preloader u1TxCenter_max_Save
3950 00:23:13.701106 sync preloader u1Txwin_center_Save
3951 00:23:13.704379 sync preloader u1Txfirst_pass_Save
3952 00:23:13.707664 sync preloader u1Txlast_pass_Save
3953 00:23:13.710909 sync preloader u1RxDatlat_Save
3954 00:23:13.714424 sync preloader u1RxWinPerbitVref_Save
3955 00:23:13.717644 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3956 00:23:13.720733 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3957 00:23:13.724092 sync preloader delay_cell_unit
3958 00:23:13.730794 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3959 00:23:13.733883 sync preloader write leveling
3960 00:23:13.737120 sync preloader cbt_mr12
3961 00:23:13.737207 sync preloader cbt_clk_dly
3962 00:23:13.740479 sync preloader cbt_cmd_dly
3963 00:23:13.743632 sync preloader cbt_cs
3964 00:23:13.747211 sync preloader cbt_ca_perbit_delay
3965 00:23:13.747302 sync preloader clk_delay
3966 00:23:13.750255 sync preloader dqs_delay
3967 00:23:13.753530 sync preloader u1Gating2T_Save
3968 00:23:13.756673 sync preloader u1Gating05T_Save
3969 00:23:13.759904 sync preloader u1Gatingfine_tune_Save
3970 00:23:13.763202 sync preloader u1Gatingucpass_count_Save
3971 00:23:13.766612 sync preloader u1TxWindowPerbitVref_Save
3972 00:23:13.769785 sync preloader u1TxCenter_min_Save
3973 00:23:13.773063 sync preloader u1TxCenter_max_Save
3974 00:23:13.776304 sync preloader u1Txwin_center_Save
3975 00:23:13.779647 sync preloader u1Txfirst_pass_Save
3976 00:23:13.783059 sync preloader u1Txlast_pass_Save
3977 00:23:13.786262 sync preloader u1RxDatlat_Save
3978 00:23:13.789699 sync preloader u1RxWinPerbitVref_Save
3979 00:23:13.792650 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3980 00:23:13.795922 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3981 00:23:13.799556 sync preloader delay_cell_unit
3982 00:23:13.805928 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3983 00:23:13.809154 sync preloader write leveling
3984 00:23:13.812446 sync preloader cbt_mr12
3985 00:23:13.812530 sync preloader cbt_clk_dly
3986 00:23:13.815569 sync preloader cbt_cmd_dly
3987 00:23:13.819139 sync preloader cbt_cs
3988 00:23:13.822194 sync preloader cbt_ca_perbit_delay
3989 00:23:13.822281 sync preloader clk_delay
3990 00:23:13.825424 sync preloader dqs_delay
3991 00:23:13.828652 sync preloader u1Gating2T_Save
3992 00:23:13.832031 sync preloader u1Gating05T_Save
3993 00:23:13.835344 sync preloader u1Gatingfine_tune_Save
3994 00:23:13.838701 sync preloader u1Gatingucpass_count_Save
3995 00:23:13.841794 sync preloader u1TxWindowPerbitVref_Save
3996 00:23:13.845129 sync preloader u1TxCenter_min_Save
3997 00:23:13.848560 sync preloader u1TxCenter_max_Save
3998 00:23:13.851880 sync preloader u1Txwin_center_Save
3999 00:23:13.854815 sync preloader u1Txfirst_pass_Save
4000 00:23:13.858304 sync preloader u1Txlast_pass_Save
4001 00:23:13.858392 sync preloader u1RxDatlat_Save
4002 00:23:13.861294 sync preloader u1RxWinPerbitVref_Save
4003 00:23:13.867876 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4004 00:23:13.871530 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4005 00:23:13.874459 sync preloader delay_cell_unit
4006 00:23:13.877669 just_for_test_dump_coreboot_params dump all params
4007 00:23:13.881222 dump source = 0x0
4008 00:23:13.881308 dump params frequency:1600
4009 00:23:13.884575 dump params rank number:2
4010 00:23:13.884661
4011 00:23:13.887801 dump params write leveling
4012 00:23:13.891129 write leveling[0][0][0] = 0x1f
4013 00:23:13.894058 write leveling[0][0][1] = 0x1b
4014 00:23:13.897382 write leveling[0][1][0] = 0x1a
4015 00:23:13.897483 write leveling[0][1][1] = 0x18
4016 00:23:13.900795 write leveling[1][0][0] = 0x25
4017 00:23:13.904100 write leveling[1][0][1] = 0x1f
4018 00:23:13.907317 write leveling[1][1][0] = 0x23
4019 00:23:13.910608 write leveling[1][1][1] = 0x1c
4020 00:23:13.910697 dump params cbt_cs
4021 00:23:13.913689 cbt_cs[0][0] = 0x7
4022 00:23:13.913770 cbt_cs[0][1] = 0x7
4023 00:23:13.917202 cbt_cs[1][0] = 0xb
4024 00:23:13.917289 cbt_cs[1][1] = 0xb
4025 00:23:13.920489 dump params cbt_mr12
4026 00:23:13.923762 cbt_mr12[0][0] = 0x1c
4027 00:23:13.923851 cbt_mr12[0][1] = 0x1e
4028 00:23:13.926980 cbt_mr12[1][0] = 0x1e
4029 00:23:13.927069 cbt_mr12[1][1] = 0x1c
4030 00:23:13.930408 dump params tx window
4031 00:23:13.933320 tx_center_min[0][0][0] = 983
4032 00:23:13.936647 tx_center_max[0][0][0] = 990
4033 00:23:13.936731 tx_center_min[0][0][1] = 979
4034 00:23:13.939922 tx_center_max[0][0][1] = 986
4035 00:23:13.943240 tx_center_min[0][1][0] = 981
4036 00:23:13.946484 tx_center_max[0][1][0] = 988
4037 00:23:13.950125 tx_center_min[0][1][1] = 980
4038 00:23:13.950206 tx_center_max[0][1][1] = 986
4039 00:23:13.953282 tx_center_min[1][0][0] = 990
4040 00:23:13.956345 tx_center_max[1][0][0] = 995
4041 00:23:13.959867 tx_center_min[1][0][1] = 983
4042 00:23:13.963021 tx_center_max[1][0][1] = 989
4043 00:23:13.963103 tx_center_min[1][1][0] = 989
4044 00:23:13.966084 tx_center_max[1][1][0] = 995
4045 00:23:13.969491 tx_center_min[1][1][1] = 980
4046 00:23:13.972796 tx_center_max[1][1][1] = 987
4047 00:23:13.972877 dump params tx window
4048 00:23:13.976095 tx_win_center[0][0][0] = 990
4049 00:23:13.979467 tx_first_pass[0][0][0] = 978
4050 00:23:13.982687 tx_last_pass[0][0][0] = 1002
4051 00:23:13.985944 tx_win_center[0][0][1] = 989
4052 00:23:13.986023 tx_first_pass[0][0][1] = 977
4053 00:23:13.989184 tx_last_pass[0][0][1] = 1001
4054 00:23:13.992506 tx_win_center[0][0][2] = 990
4055 00:23:13.995819 tx_first_pass[0][0][2] = 978
4056 00:23:13.998838 tx_last_pass[0][0][2] = 1002
4057 00:23:13.998932 tx_win_center[0][0][3] = 983
4058 00:23:14.002185 tx_first_pass[0][0][3] = 972
4059 00:23:14.005462 tx_last_pass[0][0][3] = 995
4060 00:23:14.008864 tx_win_center[0][0][4] = 988
4061 00:23:14.011984 tx_first_pass[0][0][4] = 977
4062 00:23:14.012077 tx_last_pass[0][0][4] = 1000
4063 00:23:14.015307 tx_win_center[0][0][5] = 986
4064 00:23:14.018632 tx_first_pass[0][0][5] = 975
4065 00:23:14.022106 tx_last_pass[0][0][5] = 998
4066 00:23:14.025012 tx_win_center[0][0][6] = 987
4067 00:23:14.025099 tx_first_pass[0][0][6] = 976
4068 00:23:14.028325 tx_last_pass[0][0][6] = 999
4069 00:23:14.031648 tx_win_center[0][0][7] = 989
4070 00:23:14.035082 tx_first_pass[0][0][7] = 977
4071 00:23:14.035175 tx_last_pass[0][0][7] = 1001
4072 00:23:14.038140 tx_win_center[0][0][8] = 979
4073 00:23:14.041478 tx_first_pass[0][0][8] = 968
4074 00:23:14.044685 tx_last_pass[0][0][8] = 991
4075 00:23:14.047940 tx_win_center[0][0][9] = 981
4076 00:23:14.048033 tx_first_pass[0][0][9] = 969
4077 00:23:14.051122 tx_last_pass[0][0][9] = 993
4078 00:23:14.054685 tx_win_center[0][0][10] = 986
4079 00:23:14.057974 tx_first_pass[0][0][10] = 975
4080 00:23:14.061101 tx_last_pass[0][0][10] = 998
4081 00:23:14.064324 tx_win_center[0][0][11] = 980
4082 00:23:14.064417 tx_first_pass[0][0][11] = 968
4083 00:23:14.067516 tx_last_pass[0][0][11] = 992
4084 00:23:14.071024 tx_win_center[0][0][12] = 981
4085 00:23:14.074241 tx_first_pass[0][0][12] = 969
4086 00:23:14.077641 tx_last_pass[0][0][12] = 994
4087 00:23:14.077734 tx_win_center[0][0][13] = 982
4088 00:23:14.080876 tx_first_pass[0][0][13] = 970
4089 00:23:14.084137 tx_last_pass[0][0][13] = 994
4090 00:23:14.087544 tx_win_center[0][0][14] = 983
4091 00:23:14.090741 tx_first_pass[0][0][14] = 970
4092 00:23:14.090834 tx_last_pass[0][0][14] = 996
4093 00:23:14.093908 tx_win_center[0][0][15] = 985
4094 00:23:14.097196 tx_first_pass[0][0][15] = 973
4095 00:23:14.100577 tx_last_pass[0][0][15] = 998
4096 00:23:14.103847 tx_win_center[0][1][0] = 988
4097 00:23:14.107064 tx_first_pass[0][1][0] = 977
4098 00:23:14.107156 tx_last_pass[0][1][0] = 1000
4099 00:23:14.110381 tx_win_center[0][1][1] = 988
4100 00:23:14.113730 tx_first_pass[0][1][1] = 976
4101 00:23:14.116793 tx_last_pass[0][1][1] = 1000
4102 00:23:14.116885 tx_win_center[0][1][2] = 988
4103 00:23:14.120127 tx_first_pass[0][1][2] = 977
4104 00:23:14.123579 tx_last_pass[0][1][2] = 1000
4105 00:23:14.126732 tx_win_center[0][1][3] = 981
4106 00:23:14.130087 tx_first_pass[0][1][3] = 970
4107 00:23:14.133315 tx_last_pass[0][1][3] = 993
4108 00:23:14.133408 tx_win_center[0][1][4] = 987
4109 00:23:14.136435 tx_first_pass[0][1][4] = 976
4110 00:23:14.139638 tx_last_pass[0][1][4] = 999
4111 00:23:14.142756 tx_win_center[0][1][5] = 983
4112 00:23:14.142849 tx_first_pass[0][1][5] = 972
4113 00:23:14.146344 tx_last_pass[0][1][5] = 995
4114 00:23:14.149610 tx_win_center[0][1][6] = 986
4115 00:23:14.152888 tx_first_pass[0][1][6] = 974
4116 00:23:14.155992 tx_last_pass[0][1][6] = 998
4117 00:23:14.156086 tx_win_center[0][1][7] = 988
4118 00:23:14.159228 tx_first_pass[0][1][7] = 976
4119 00:23:14.162744 tx_last_pass[0][1][7] = 1000
4120 00:23:14.166005 tx_win_center[0][1][8] = 980
4121 00:23:14.169284 tx_first_pass[0][1][8] = 968
4122 00:23:14.169377 tx_last_pass[0][1][8] = 992
4123 00:23:14.172575 tx_win_center[0][1][9] = 980
4124 00:23:14.175800 tx_first_pass[0][1][9] = 969
4125 00:23:14.179081 tx_last_pass[0][1][9] = 992
4126 00:23:14.182375 tx_win_center[0][1][10] = 986
4127 00:23:14.182478 tx_first_pass[0][1][10] = 974
4128 00:23:14.185368 tx_last_pass[0][1][10] = 999
4129 00:23:14.188562 tx_win_center[0][1][11] = 980
4130 00:23:14.192150 tx_first_pass[0][1][11] = 968
4131 00:23:14.195434 tx_last_pass[0][1][11] = 992
4132 00:23:14.195527 tx_win_center[0][1][12] = 981
4133 00:23:14.198704 tx_first_pass[0][1][12] = 969
4134 00:23:14.201550 tx_last_pass[0][1][12] = 993
4135 00:23:14.204774 tx_win_center[0][1][13] = 981
4136 00:23:14.208061 tx_first_pass[0][1][13] = 969
4137 00:23:14.211693 tx_last_pass[0][1][13] = 993
4138 00:23:14.211786 tx_win_center[0][1][14] = 983
4139 00:23:14.214706 tx_first_pass[0][1][14] = 970
4140 00:23:14.217963 tx_last_pass[0][1][14] = 996
4141 00:23:14.221444 tx_win_center[0][1][15] = 986
4142 00:23:14.224450 tx_first_pass[0][1][15] = 974
4143 00:23:14.224543 tx_last_pass[0][1][15] = 998
4144 00:23:14.227793 tx_win_center[1][0][0] = 995
4145 00:23:14.231317 tx_first_pass[1][0][0] = 984
4146 00:23:14.234208 tx_last_pass[1][0][0] = 1007
4147 00:23:14.237549 tx_win_center[1][0][1] = 994
4148 00:23:14.240869 tx_first_pass[1][0][1] = 982
4149 00:23:14.240961 tx_last_pass[1][0][1] = 1006
4150 00:23:14.244010 tx_win_center[1][0][2] = 993
4151 00:23:14.247272 tx_first_pass[1][0][2] = 980
4152 00:23:14.250851 tx_last_pass[1][0][2] = 1006
4153 00:23:14.250942 tx_win_center[1][0][3] = 990
4154 00:23:14.253939 tx_first_pass[1][0][3] = 977
4155 00:23:14.257104 tx_last_pass[1][0][3] = 1003
4156 00:23:14.260578 tx_win_center[1][0][4] = 994
4157 00:23:14.263585 tx_first_pass[1][0][4] = 982
4158 00:23:14.263670 tx_last_pass[1][0][4] = 1006
4159 00:23:14.266977 tx_win_center[1][0][5] = 995
4160 00:23:14.270214 tx_first_pass[1][0][5] = 984
4161 00:23:14.273681 tx_last_pass[1][0][5] = 1007
4162 00:23:14.276768 tx_win_center[1][0][6] = 994
4163 00:23:14.280085 tx_first_pass[1][0][6] = 983
4164 00:23:14.280165 tx_last_pass[1][0][6] = 1006
4165 00:23:14.283341 tx_win_center[1][0][7] = 994
4166 00:23:14.286691 tx_first_pass[1][0][7] = 982
4167 00:23:14.289884 tx_last_pass[1][0][7] = 1006
4168 00:23:14.289961 tx_win_center[1][0][8] = 987
4169 00:23:14.292944 tx_first_pass[1][0][8] = 975
4170 00:23:14.296381 tx_last_pass[1][0][8] = 999
4171 00:23:14.299781 tx_win_center[1][0][9] = 985
4172 00:23:14.302982 tx_first_pass[1][0][9] = 974
4173 00:23:14.303066 tx_last_pass[1][0][9] = 997
4174 00:23:14.306221 tx_win_center[1][0][10] = 988
4175 00:23:14.309552 tx_first_pass[1][0][10] = 976
4176 00:23:14.312937 tx_last_pass[1][0][10] = 1000
4177 00:23:14.316232 tx_win_center[1][0][11] = 989
4178 00:23:14.319168 tx_first_pass[1][0][11] = 978
4179 00:23:14.319248 tx_last_pass[1][0][11] = 1001
4180 00:23:14.322466 tx_win_center[1][0][12] = 988
4181 00:23:14.325704 tx_first_pass[1][0][12] = 977
4182 00:23:14.328963 tx_last_pass[1][0][12] = 1000
4183 00:23:14.332288 tx_win_center[1][0][13] = 989
4184 00:23:14.335847 tx_first_pass[1][0][13] = 978
4185 00:23:14.335940 tx_last_pass[1][0][13] = 1001
4186 00:23:14.339183 tx_win_center[1][0][14] = 988
4187 00:23:14.342154 tx_first_pass[1][0][14] = 976
4188 00:23:14.345403 tx_last_pass[1][0][14] = 1000
4189 00:23:14.348742 tx_win_center[1][0][15] = 983
4190 00:23:14.348820 tx_first_pass[1][0][15] = 972
4191 00:23:14.352165 tx_last_pass[1][0][15] = 995
4192 00:23:14.355182 tx_win_center[1][1][0] = 995
4193 00:23:14.358689 tx_first_pass[1][1][0] = 983
4194 00:23:14.361935 tx_last_pass[1][1][0] = 1007
4195 00:23:14.362031 tx_win_center[1][1][1] = 993
4196 00:23:14.365062 tx_first_pass[1][1][1] = 981
4197 00:23:14.368329 tx_last_pass[1][1][1] = 1006
4198 00:23:14.371708 tx_win_center[1][1][2] = 992
4199 00:23:14.374931 tx_first_pass[1][1][2] = 979
4200 00:23:14.375016 tx_last_pass[1][1][2] = 1005
4201 00:23:14.378125 tx_win_center[1][1][3] = 989
4202 00:23:14.381558 tx_first_pass[1][1][3] = 977
4203 00:23:14.384812 tx_last_pass[1][1][3] = 1002
4204 00:23:14.388096 tx_win_center[1][1][4] = 993
4205 00:23:14.388176 tx_first_pass[1][1][4] = 980
4206 00:23:14.391367 tx_last_pass[1][1][4] = 1006
4207 00:23:14.394763 tx_win_center[1][1][5] = 995
4208 00:23:14.397894 tx_first_pass[1][1][5] = 983
4209 00:23:14.401007 tx_last_pass[1][1][5] = 1007
4210 00:23:14.401082 tx_win_center[1][1][6] = 993
4211 00:23:14.404489 tx_first_pass[1][1][6] = 981
4212 00:23:14.407771 tx_last_pass[1][1][6] = 1006
4213 00:23:14.410872 tx_win_center[1][1][7] = 993
4214 00:23:14.414090 tx_first_pass[1][1][7] = 981
4215 00:23:14.414182 tx_last_pass[1][1][7] = 1006
4216 00:23:14.417750 tx_win_center[1][1][8] = 984
4217 00:23:14.420699 tx_first_pass[1][1][8] = 973
4218 00:23:14.423944 tx_last_pass[1][1][8] = 996
4219 00:23:14.427457 tx_win_center[1][1][9] = 983
4220 00:23:14.427537 tx_first_pass[1][1][9] = 972
4221 00:23:14.430691 tx_last_pass[1][1][9] = 994
4222 00:23:14.434090 tx_win_center[1][1][10] = 987
4223 00:23:14.437138 tx_first_pass[1][1][10] = 975
4224 00:23:14.440605 tx_last_pass[1][1][10] = 999
4225 00:23:14.440685 tx_win_center[1][1][11] = 987
4226 00:23:14.443925 tx_first_pass[1][1][11] = 976
4227 00:23:14.446844 tx_last_pass[1][1][11] = 999
4228 00:23:14.450095 tx_win_center[1][1][12] = 987
4229 00:23:14.453457 tx_first_pass[1][1][12] = 976
4230 00:23:14.456895 tx_last_pass[1][1][12] = 999
4231 00:23:14.456978 tx_win_center[1][1][13] = 987
4232 00:23:14.460016 tx_first_pass[1][1][13] = 976
4233 00:23:14.463257 tx_last_pass[1][1][13] = 999
4234 00:23:14.466528 tx_win_center[1][1][14] = 987
4235 00:23:14.469911 tx_first_pass[1][1][14] = 976
4236 00:23:14.470003 tx_last_pass[1][1][14] = 999
4237 00:23:14.473204 tx_win_center[1][1][15] = 980
4238 00:23:14.476516 tx_first_pass[1][1][15] = 969
4239 00:23:14.479454 tx_last_pass[1][1][15] = 992
4240 00:23:14.479540 dump params rx window
4241 00:23:14.482871 rx_firspass[0][0][0] = 7
4242 00:23:14.486157 rx_lastpass[0][0][0] = 36
4243 00:23:14.489419 rx_firspass[0][0][1] = 8
4244 00:23:14.489517 rx_lastpass[0][0][1] = 36
4245 00:23:14.492654 rx_firspass[0][0][2] = 5
4246 00:23:14.496021 rx_lastpass[0][0][2] = 39
4247 00:23:14.496098 rx_firspass[0][0][3] = -4
4248 00:23:14.499235 rx_lastpass[0][0][3] = 30
4249 00:23:14.502569 rx_firspass[0][0][4] = 6
4250 00:23:14.505856 rx_lastpass[0][0][4] = 36
4251 00:23:14.505937 rx_firspass[0][0][5] = 3
4252 00:23:14.509040 rx_lastpass[0][0][5] = 33
4253 00:23:14.512240 rx_firspass[0][0][6] = 3
4254 00:23:14.512315 rx_lastpass[0][0][6] = 34
4255 00:23:14.515680 rx_firspass[0][0][7] = 4
4256 00:23:14.518874 rx_lastpass[0][0][7] = 36
4257 00:23:14.522089 rx_firspass[0][0][8] = -2
4258 00:23:14.522170 rx_lastpass[0][0][8] = 30
4259 00:23:14.525341 rx_firspass[0][0][9] = 1
4260 00:23:14.528756 rx_lastpass[0][0][9] = 32
4261 00:23:14.528829 rx_firspass[0][0][10] = 8
4262 00:23:14.531845 rx_lastpass[0][0][10] = 37
4263 00:23:14.535476 rx_firspass[0][0][11] = 0
4264 00:23:14.538397 rx_lastpass[0][0][11] = 30
4265 00:23:14.538473 rx_firspass[0][0][12] = 3
4266 00:23:14.541723 rx_lastpass[0][0][12] = 31
4267 00:23:14.544896 rx_firspass[0][0][13] = 1
4268 00:23:14.548272 rx_lastpass[0][0][13] = 32
4269 00:23:14.548351 rx_firspass[0][0][14] = 0
4270 00:23:14.551529 rx_lastpass[0][0][14] = 35
4271 00:23:14.554997 rx_firspass[0][0][15] = 4
4272 00:23:14.558230 rx_lastpass[0][0][15] = 36
4273 00:23:14.558372 rx_firspass[0][1][0] = 5
4274 00:23:14.561629 rx_lastpass[0][1][0] = 39
4275 00:23:14.564606 rx_firspass[0][1][1] = 4
4276 00:23:14.564696 rx_lastpass[0][1][1] = 39
4277 00:23:14.567813 rx_firspass[0][1][2] = 6
4278 00:23:14.571224 rx_lastpass[0][1][2] = 40
4279 00:23:14.574468 rx_firspass[0][1][3] = -2
4280 00:23:14.574545 rx_lastpass[0][1][3] = 31
4281 00:23:14.577885 rx_firspass[0][1][4] = 5
4282 00:23:14.580966 rx_lastpass[0][1][4] = 38
4283 00:23:14.581058 rx_firspass[0][1][5] = 0
4284 00:23:14.584185 rx_lastpass[0][1][5] = 34
4285 00:23:14.587794 rx_firspass[0][1][6] = 1
4286 00:23:14.591066 rx_lastpass[0][1][6] = 35
4287 00:23:14.591154 rx_firspass[0][1][7] = 3
4288 00:23:14.593981 rx_lastpass[0][1][7] = 36
4289 00:23:14.597308 rx_firspass[0][1][8] = -4
4290 00:23:14.597448 rx_lastpass[0][1][8] = 32
4291 00:23:14.600682 rx_firspass[0][1][9] = -2
4292 00:23:14.603755 rx_lastpass[0][1][9] = 34
4293 00:23:14.607166 rx_firspass[0][1][10] = 5
4294 00:23:14.607249 rx_lastpass[0][1][10] = 40
4295 00:23:14.610370 rx_firspass[0][1][11] = -3
4296 00:23:14.613719 rx_lastpass[0][1][11] = 33
4297 00:23:14.617157 rx_firspass[0][1][12] = 0
4298 00:23:14.617245 rx_lastpass[0][1][12] = 34
4299 00:23:14.620207 rx_firspass[0][1][13] = -2
4300 00:23:14.623522 rx_lastpass[0][1][13] = 34
4301 00:23:14.626796 rx_firspass[0][1][14] = 2
4302 00:23:14.626929 rx_lastpass[0][1][14] = 35
4303 00:23:14.630269 rx_firspass[0][1][15] = 4
4304 00:23:14.633543 rx_lastpass[0][1][15] = 37
4305 00:23:14.633637 rx_firspass[1][0][0] = 5
4306 00:23:14.636647 rx_lastpass[1][0][0] = 37
4307 00:23:14.640220 rx_firspass[1][0][1] = 4
4308 00:23:14.643508 rx_lastpass[1][0][1] = 37
4309 00:23:14.643598 rx_firspass[1][0][2] = 1
4310 00:23:14.646691 rx_lastpass[1][0][2] = 35
4311 00:23:14.649965 rx_firspass[1][0][3] = 0
4312 00:23:14.650055 rx_lastpass[1][0][3] = 31
4313 00:23:14.653030 rx_firspass[1][0][4] = 4
4314 00:23:14.656638 rx_lastpass[1][0][4] = 35
4315 00:23:14.659511 rx_firspass[1][0][5] = 9
4316 00:23:14.659602 rx_lastpass[1][0][5] = 38
4317 00:23:14.662885 rx_firspass[1][0][6] = 6
4318 00:23:14.666212 rx_lastpass[1][0][6] = 38
4319 00:23:14.666301 rx_firspass[1][0][7] = 5
4320 00:23:14.669441 rx_lastpass[1][0][7] = 35
4321 00:23:14.672918 rx_firspass[1][0][8] = 0
4322 00:23:14.676234 rx_lastpass[1][0][8] = 33
4323 00:23:14.676325 rx_firspass[1][0][9] = -1
4324 00:23:14.679164 rx_lastpass[1][0][9] = 32
4325 00:23:14.682629 rx_firspass[1][0][10] = 3
4326 00:23:14.682718 rx_lastpass[1][0][10] = 36
4327 00:23:14.685963 rx_firspass[1][0][11] = 4
4328 00:23:14.688917 rx_lastpass[1][0][11] = 37
4329 00:23:14.692483 rx_firspass[1][0][12] = 5
4330 00:23:14.692568 rx_lastpass[1][0][12] = 35
4331 00:23:14.695584 rx_firspass[1][0][13] = 6
4332 00:23:14.699105 rx_lastpass[1][0][13] = 36
4333 00:23:14.702038 rx_firspass[1][0][14] = 5
4334 00:23:14.702119 rx_lastpass[1][0][14] = 37
4335 00:23:14.705348 rx_firspass[1][0][15] = -3
4336 00:23:14.708579 rx_lastpass[1][0][15] = 29
4337 00:23:14.711909 rx_firspass[1][1][0] = 3
4338 00:23:14.711984 rx_lastpass[1][1][0] = 40
4339 00:23:14.715106 rx_firspass[1][1][1] = 4
4340 00:23:14.718453 rx_lastpass[1][1][1] = 38
4341 00:23:14.718543 rx_firspass[1][1][2] = 3
4342 00:23:14.721698 rx_lastpass[1][1][2] = 34
4343 00:23:14.725213 rx_firspass[1][1][3] = -2
4344 00:23:14.728144 rx_lastpass[1][1][3] = 33
4345 00:23:14.728228 rx_firspass[1][1][4] = 4
4346 00:23:14.731550 rx_lastpass[1][1][4] = 39
4347 00:23:14.734960 rx_firspass[1][1][5] = 5
4348 00:23:14.735061 rx_lastpass[1][1][5] = 40
4349 00:23:14.737943 rx_firspass[1][1][6] = 6
4350 00:23:14.741389 rx_lastpass[1][1][6] = 40
4351 00:23:14.744627 rx_firspass[1][1][7] = 3
4352 00:23:14.744720 rx_lastpass[1][1][7] = 37
4353 00:23:14.747840 rx_firspass[1][1][8] = -1
4354 00:23:14.751166 rx_lastpass[1][1][8] = 35
4355 00:23:14.751290 rx_firspass[1][1][9] = -2
4356 00:23:14.754495 rx_lastpass[1][1][9] = 32
4357 00:23:14.757850 rx_firspass[1][1][10] = 3
4358 00:23:14.761205 rx_lastpass[1][1][10] = 38
4359 00:23:14.761313 rx_firspass[1][1][11] = 4
4360 00:23:14.764132 rx_lastpass[1][1][11] = 38
4361 00:23:14.767444 rx_firspass[1][1][12] = 3
4362 00:23:14.770807 rx_lastpass[1][1][12] = 37
4363 00:23:14.770893 rx_firspass[1][1][13] = 3
4364 00:23:14.774216 rx_lastpass[1][1][13] = 39
4365 00:23:14.777514 rx_firspass[1][1][14] = 4
4366 00:23:14.780905 rx_lastpass[1][1][14] = 40
4367 00:23:14.780996 rx_firspass[1][1][15] = -4
4368 00:23:14.783918 rx_lastpass[1][1][15] = 31
4369 00:23:14.787209 dump params clk_delay
4370 00:23:14.787332 clk_delay[0] = -1
4371 00:23:14.790471 clk_delay[1] = 0
4372 00:23:14.790554 dump params dqs_delay
4373 00:23:14.793718 dqs_delay[0][0] = -1
4374 00:23:14.793799 dqs_delay[0][1] = 0
4375 00:23:14.796856 dqs_delay[1][0] = 0
4376 00:23:14.800362 dqs_delay[1][1] = -1
4377 00:23:14.800469 dump params delay_cell_unit = 744
4378 00:23:14.803523 dump source = 0x0
4379 00:23:14.806853 dump params frequency:1200
4380 00:23:14.806945 dump params rank number:2
4381 00:23:14.807019
4382 00:23:14.810148 dump params write leveling
4383 00:23:14.813339 write leveling[0][0][0] = 0x0
4384 00:23:14.816696 write leveling[0][0][1] = 0x0
4385 00:23:14.819961 write leveling[0][1][0] = 0x0
4386 00:23:14.820051 write leveling[0][1][1] = 0x0
4387 00:23:14.823247 write leveling[1][0][0] = 0x0
4388 00:23:14.826369 write leveling[1][0][1] = 0x0
4389 00:23:14.829709 write leveling[1][1][0] = 0x0
4390 00:23:14.832893 write leveling[1][1][1] = 0x0
4391 00:23:14.832992 dump params cbt_cs
4392 00:23:14.836090 cbt_cs[0][0] = 0x0
4393 00:23:14.836172 cbt_cs[0][1] = 0x0
4394 00:23:14.839449 cbt_cs[1][0] = 0x0
4395 00:23:14.839547 cbt_cs[1][1] = 0x0
4396 00:23:14.842711 dump params cbt_mr12
4397 00:23:14.846226 cbt_mr12[0][0] = 0x0
4398 00:23:14.846309 cbt_mr12[0][1] = 0x0
4399 00:23:14.849294 cbt_mr12[1][0] = 0x0
4400 00:23:14.849412 cbt_mr12[1][1] = 0x0
4401 00:23:14.852564 dump params tx window
4402 00:23:14.855852 tx_center_min[0][0][0] = 0
4403 00:23:14.855991 tx_center_max[0][0][0] = 0
4404 00:23:14.859291 tx_center_min[0][0][1] = 0
4405 00:23:14.862786 tx_center_max[0][0][1] = 0
4406 00:23:14.865554 tx_center_min[0][1][0] = 0
4407 00:23:14.865648 tx_center_max[0][1][0] = 0
4408 00:23:14.869024 tx_center_min[0][1][1] = 0
4409 00:23:14.872279 tx_center_max[0][1][1] = 0
4410 00:23:14.875652 tx_center_min[1][0][0] = 0
4411 00:23:14.875765 tx_center_max[1][0][0] = 0
4412 00:23:14.878559 tx_center_min[1][0][1] = 0
4413 00:23:14.881944 tx_center_max[1][0][1] = 0
4414 00:23:14.885287 tx_center_min[1][1][0] = 0
4415 00:23:14.885397 tx_center_max[1][1][0] = 0
4416 00:23:14.888552 tx_center_min[1][1][1] = 0
4417 00:23:14.891879 tx_center_max[1][1][1] = 0
4418 00:23:14.895056 dump params tx window
4419 00:23:14.895171 tx_win_center[0][0][0] = 0
4420 00:23:14.898246 tx_first_pass[0][0][0] = 0
4421 00:23:14.901528 tx_last_pass[0][0][0] = 0
4422 00:23:14.901616 tx_win_center[0][0][1] = 0
4423 00:23:14.904806 tx_first_pass[0][0][1] = 0
4424 00:23:14.908282 tx_last_pass[0][0][1] = 0
4425 00:23:14.911610 tx_win_center[0][0][2] = 0
4426 00:23:14.911730 tx_first_pass[0][0][2] = 0
4427 00:23:14.914849 tx_last_pass[0][0][2] = 0
4428 00:23:14.917946 tx_win_center[0][0][3] = 0
4429 00:23:14.921217 tx_first_pass[0][0][3] = 0
4430 00:23:14.921307 tx_last_pass[0][0][3] = 0
4431 00:23:14.924506 tx_win_center[0][0][4] = 0
4432 00:23:14.927889 tx_first_pass[0][0][4] = 0
4433 00:23:14.931173 tx_last_pass[0][0][4] = 0
4434 00:23:14.931276 tx_win_center[0][0][5] = 0
4435 00:23:14.934358 tx_first_pass[0][0][5] = 0
4436 00:23:14.937687 tx_last_pass[0][0][5] = 0
4437 00:23:14.940792 tx_win_center[0][0][6] = 0
4438 00:23:14.940872 tx_first_pass[0][0][6] = 0
4439 00:23:14.944086 tx_last_pass[0][0][6] = 0
4440 00:23:14.947295 tx_win_center[0][0][7] = 0
4441 00:23:14.947374 tx_first_pass[0][0][7] = 0
4442 00:23:14.950900 tx_last_pass[0][0][7] = 0
4443 00:23:14.953986 tx_win_center[0][0][8] = 0
4444 00:23:14.957209 tx_first_pass[0][0][8] = 0
4445 00:23:14.957294 tx_last_pass[0][0][8] = 0
4446 00:23:14.960800 tx_win_center[0][0][9] = 0
4447 00:23:14.963672 tx_first_pass[0][0][9] = 0
4448 00:23:14.967156 tx_last_pass[0][0][9] = 0
4449 00:23:14.967266 tx_win_center[0][0][10] = 0
4450 00:23:14.970264 tx_first_pass[0][0][10] = 0
4451 00:23:14.973774 tx_last_pass[0][0][10] = 0
4452 00:23:14.976859 tx_win_center[0][0][11] = 0
4453 00:23:14.976974 tx_first_pass[0][0][11] = 0
4454 00:23:14.980159 tx_last_pass[0][0][11] = 0
4455 00:23:14.983567 tx_win_center[0][0][12] = 0
4456 00:23:14.986887 tx_first_pass[0][0][12] = 0
4457 00:23:14.986968 tx_last_pass[0][0][12] = 0
4458 00:23:14.989876 tx_win_center[0][0][13] = 0
4459 00:23:14.993145 tx_first_pass[0][0][13] = 0
4460 00:23:14.996389 tx_last_pass[0][0][13] = 0
4461 00:23:15.000045 tx_win_center[0][0][14] = 0
4462 00:23:15.000152 tx_first_pass[0][0][14] = 0
4463 00:23:15.003136 tx_last_pass[0][0][14] = 0
4464 00:23:15.006369 tx_win_center[0][0][15] = 0
4465 00:23:15.009638 tx_first_pass[0][0][15] = 0
4466 00:23:15.009716 tx_last_pass[0][0][15] = 0
4467 00:23:15.012775 tx_win_center[0][1][0] = 0
4468 00:23:15.016056 tx_first_pass[0][1][0] = 0
4469 00:23:15.019632 tx_last_pass[0][1][0] = 0
4470 00:23:15.019747 tx_win_center[0][1][1] = 0
4471 00:23:15.022776 tx_first_pass[0][1][1] = 0
4472 00:23:15.026008 tx_last_pass[0][1][1] = 0
4473 00:23:15.029274 tx_win_center[0][1][2] = 0
4474 00:23:15.029387 tx_first_pass[0][1][2] = 0
4475 00:23:15.032630 tx_last_pass[0][1][2] = 0
4476 00:23:15.035892 tx_win_center[0][1][3] = 0
4477 00:23:15.039044 tx_first_pass[0][1][3] = 0
4478 00:23:15.039127 tx_last_pass[0][1][3] = 0
4479 00:23:15.042343 tx_win_center[0][1][4] = 0
4480 00:23:15.045687 tx_first_pass[0][1][4] = 0
4481 00:23:15.045763 tx_last_pass[0][1][4] = 0
4482 00:23:15.048978 tx_win_center[0][1][5] = 0
4483 00:23:15.052005 tx_first_pass[0][1][5] = 0
4484 00:23:15.055223 tx_last_pass[0][1][5] = 0
4485 00:23:15.055342 tx_win_center[0][1][6] = 0
4486 00:23:15.058850 tx_first_pass[0][1][6] = 0
4487 00:23:15.061955 tx_last_pass[0][1][6] = 0
4488 00:23:15.065050 tx_win_center[0][1][7] = 0
4489 00:23:15.065160 tx_first_pass[0][1][7] = 0
4490 00:23:15.068368 tx_last_pass[0][1][7] = 0
4491 00:23:15.071795 tx_win_center[0][1][8] = 0
4492 00:23:15.074874 tx_first_pass[0][1][8] = 0
4493 00:23:15.074956 tx_last_pass[0][1][8] = 0
4494 00:23:15.078109 tx_win_center[0][1][9] = 0
4495 00:23:15.081484 tx_first_pass[0][1][9] = 0
4496 00:23:15.081607 tx_last_pass[0][1][9] = 0
4497 00:23:15.084733 tx_win_center[0][1][10] = 0
4498 00:23:15.087954 tx_first_pass[0][1][10] = 0
4499 00:23:15.091315 tx_last_pass[0][1][10] = 0
4500 00:23:15.094611 tx_win_center[0][1][11] = 0
4501 00:23:15.094691 tx_first_pass[0][1][11] = 0
4502 00:23:15.097957 tx_last_pass[0][1][11] = 0
4503 00:23:15.101215 tx_win_center[0][1][12] = 0
4504 00:23:15.104595 tx_first_pass[0][1][12] = 0
4505 00:23:15.104703 tx_last_pass[0][1][12] = 0
4506 00:23:15.107750 tx_win_center[0][1][13] = 0
4507 00:23:15.110865 tx_first_pass[0][1][13] = 0
4508 00:23:15.114156 tx_last_pass[0][1][13] = 0
4509 00:23:15.114240 tx_win_center[0][1][14] = 0
4510 00:23:15.117311 tx_first_pass[0][1][14] = 0
4511 00:23:15.120587 tx_last_pass[0][1][14] = 0
4512 00:23:15.123833 tx_win_center[0][1][15] = 0
4513 00:23:15.127233 tx_first_pass[0][1][15] = 0
4514 00:23:15.127314 tx_last_pass[0][1][15] = 0
4515 00:23:15.130488 tx_win_center[1][0][0] = 0
4516 00:23:15.134042 tx_first_pass[1][0][0] = 0
4517 00:23:15.134135 tx_last_pass[1][0][0] = 0
4518 00:23:15.137000 tx_win_center[1][0][1] = 0
4519 00:23:15.140348 tx_first_pass[1][0][1] = 0
4520 00:23:15.143729 tx_last_pass[1][0][1] = 0
4521 00:23:15.143813 tx_win_center[1][0][2] = 0
4522 00:23:15.147071 tx_first_pass[1][0][2] = 0
4523 00:23:15.150474 tx_last_pass[1][0][2] = 0
4524 00:23:15.153441 tx_win_center[1][0][3] = 0
4525 00:23:15.153534 tx_first_pass[1][0][3] = 0
4526 00:23:15.156898 tx_last_pass[1][0][3] = 0
4527 00:23:15.159961 tx_win_center[1][0][4] = 0
4528 00:23:15.163397 tx_first_pass[1][0][4] = 0
4529 00:23:15.163476 tx_last_pass[1][0][4] = 0
4530 00:23:15.166544 tx_win_center[1][0][5] = 0
4531 00:23:15.169995 tx_first_pass[1][0][5] = 0
4532 00:23:15.173146 tx_last_pass[1][0][5] = 0
4533 00:23:15.173252 tx_win_center[1][0][6] = 0
4534 00:23:15.176442 tx_first_pass[1][0][6] = 0
4535 00:23:15.179968 tx_last_pass[1][0][6] = 0
4536 00:23:15.180086 tx_win_center[1][0][7] = 0
4537 00:23:15.183039 tx_first_pass[1][0][7] = 0
4538 00:23:15.186210 tx_last_pass[1][0][7] = 0
4539 00:23:15.189557 tx_win_center[1][0][8] = 0
4540 00:23:15.189634 tx_first_pass[1][0][8] = 0
4541 00:23:15.192722 tx_last_pass[1][0][8] = 0
4542 00:23:15.196187 tx_win_center[1][0][9] = 0
4543 00:23:15.199579 tx_first_pass[1][0][9] = 0
4544 00:23:15.199684 tx_last_pass[1][0][9] = 0
4545 00:23:15.202890 tx_win_center[1][0][10] = 0
4546 00:23:15.205788 tx_first_pass[1][0][10] = 0
4547 00:23:15.209101 tx_last_pass[1][0][10] = 0
4548 00:23:15.209177 tx_win_center[1][0][11] = 0
4549 00:23:15.212424 tx_first_pass[1][0][11] = 0
4550 00:23:15.215509 tx_last_pass[1][0][11] = 0
4551 00:23:15.218999 tx_win_center[1][0][12] = 0
4552 00:23:15.222127 tx_first_pass[1][0][12] = 0
4553 00:23:15.222204 tx_last_pass[1][0][12] = 0
4554 00:23:15.225416 tx_win_center[1][0][13] = 0
4555 00:23:15.228782 tx_first_pass[1][0][13] = 0
4556 00:23:15.232097 tx_last_pass[1][0][13] = 0
4557 00:23:15.232176 tx_win_center[1][0][14] = 0
4558 00:23:15.235485 tx_first_pass[1][0][14] = 0
4559 00:23:15.238731 tx_last_pass[1][0][14] = 0
4560 00:23:15.241818 tx_win_center[1][0][15] = 0
4561 00:23:15.241931 tx_first_pass[1][0][15] = 0
4562 00:23:15.245002 tx_last_pass[1][0][15] = 0
4563 00:23:15.248525 tx_win_center[1][1][0] = 0
4564 00:23:15.251853 tx_first_pass[1][1][0] = 0
4565 00:23:15.251958 tx_last_pass[1][1][0] = 0
4566 00:23:15.255161 tx_win_center[1][1][1] = 0
4567 00:23:15.258045 tx_first_pass[1][1][1] = 0
4568 00:23:15.261360 tx_last_pass[1][1][1] = 0
4569 00:23:15.261470 tx_win_center[1][1][2] = 0
4570 00:23:15.264864 tx_first_pass[1][1][2] = 0
4571 00:23:15.268156 tx_last_pass[1][1][2] = 0
4572 00:23:15.268268 tx_win_center[1][1][3] = 0
4573 00:23:15.271443 tx_first_pass[1][1][3] = 0
4574 00:23:15.274429 tx_last_pass[1][1][3] = 0
4575 00:23:15.277719 tx_win_center[1][1][4] = 0
4576 00:23:15.277795 tx_first_pass[1][1][4] = 0
4577 00:23:15.281117 tx_last_pass[1][1][4] = 0
4578 00:23:15.284198 tx_win_center[1][1][5] = 0
4579 00:23:15.287382 tx_first_pass[1][1][5] = 0
4580 00:23:15.287459 tx_last_pass[1][1][5] = 0
4581 00:23:15.290932 tx_win_center[1][1][6] = 0
4582 00:23:15.293956 tx_first_pass[1][1][6] = 0
4583 00:23:15.297392 tx_last_pass[1][1][6] = 0
4584 00:23:15.297487 tx_win_center[1][1][7] = 0
4585 00:23:15.300675 tx_first_pass[1][1][7] = 0
4586 00:23:15.303745 tx_last_pass[1][1][7] = 0
4587 00:23:15.307222 tx_win_center[1][1][8] = 0
4588 00:23:15.307333 tx_first_pass[1][1][8] = 0
4589 00:23:15.310617 tx_last_pass[1][1][8] = 0
4590 00:23:15.313791 tx_win_center[1][1][9] = 0
4591 00:23:15.317106 tx_first_pass[1][1][9] = 0
4592 00:23:15.317196 tx_last_pass[1][1][9] = 0
4593 00:23:15.320424 tx_win_center[1][1][10] = 0
4594 00:23:15.323540 tx_first_pass[1][1][10] = 0
4595 00:23:15.326636 tx_last_pass[1][1][10] = 0
4596 00:23:15.326728 tx_win_center[1][1][11] = 0
4597 00:23:15.330021 tx_first_pass[1][1][11] = 0
4598 00:23:15.333322 tx_last_pass[1][1][11] = 0
4599 00:23:15.336692 tx_win_center[1][1][12] = 0
4600 00:23:15.336781 tx_first_pass[1][1][12] = 0
4601 00:23:15.340075 tx_last_pass[1][1][12] = 0
4602 00:23:15.343236 tx_win_center[1][1][13] = 0
4603 00:23:15.346517 tx_first_pass[1][1][13] = 0
4604 00:23:15.346606 tx_last_pass[1][1][13] = 0
4605 00:23:15.349571 tx_win_center[1][1][14] = 0
4606 00:23:15.353019 tx_first_pass[1][1][14] = 0
4607 00:23:15.356378 tx_last_pass[1][1][14] = 0
4608 00:23:15.356496 tx_win_center[1][1][15] = 0
4609 00:23:15.359788 tx_first_pass[1][1][15] = 0
4610 00:23:15.362650 tx_last_pass[1][1][15] = 0
4611 00:23:15.366235 dump params rx window
4612 00:23:15.366325 rx_firspass[0][0][0] = 0
4613 00:23:15.369325 rx_lastpass[0][0][0] = 0
4614 00:23:15.372615 rx_firspass[0][0][1] = 0
4615 00:23:15.372730 rx_lastpass[0][0][1] = 0
4616 00:23:15.375851 rx_firspass[0][0][2] = 0
4617 00:23:15.379138 rx_lastpass[0][0][2] = 0
4618 00:23:15.379224 rx_firspass[0][0][3] = 0
4619 00:23:15.382631 rx_lastpass[0][0][3] = 0
4620 00:23:15.385849 rx_firspass[0][0][4] = 0
4621 00:23:15.388997 rx_lastpass[0][0][4] = 0
4622 00:23:15.389076 rx_firspass[0][0][5] = 0
4623 00:23:15.392173 rx_lastpass[0][0][5] = 0
4624 00:23:15.395536 rx_firspass[0][0][6] = 0
4625 00:23:15.395613 rx_lastpass[0][0][6] = 0
4626 00:23:15.398918 rx_firspass[0][0][7] = 0
4627 00:23:15.402114 rx_lastpass[0][0][7] = 0
4628 00:23:15.402203 rx_firspass[0][0][8] = 0
4629 00:23:15.405452 rx_lastpass[0][0][8] = 0
4630 00:23:15.408647 rx_firspass[0][0][9] = 0
4631 00:23:15.411819 rx_lastpass[0][0][9] = 0
4632 00:23:15.411911 rx_firspass[0][0][10] = 0
4633 00:23:15.415363 rx_lastpass[0][0][10] = 0
4634 00:23:15.418484 rx_firspass[0][0][11] = 0
4635 00:23:15.418574 rx_lastpass[0][0][11] = 0
4636 00:23:15.421638 rx_firspass[0][0][12] = 0
4637 00:23:15.425155 rx_lastpass[0][0][12] = 0
4638 00:23:15.428126 rx_firspass[0][0][13] = 0
4639 00:23:15.428230 rx_lastpass[0][0][13] = 0
4640 00:23:15.431497 rx_firspass[0][0][14] = 0
4641 00:23:15.434786 rx_lastpass[0][0][14] = 0
4642 00:23:15.438059 rx_firspass[0][0][15] = 0
4643 00:23:15.438148 rx_lastpass[0][0][15] = 0
4644 00:23:15.441066 rx_firspass[0][1][0] = 0
4645 00:23:15.444311 rx_lastpass[0][1][0] = 0
4646 00:23:15.444401 rx_firspass[0][1][1] = 0
4647 00:23:15.447744 rx_lastpass[0][1][1] = 0
4648 00:23:15.451203 rx_firspass[0][1][2] = 0
4649 00:23:15.451292 rx_lastpass[0][1][2] = 0
4650 00:23:15.454111 rx_firspass[0][1][3] = 0
4651 00:23:15.457562 rx_lastpass[0][1][3] = 0
4652 00:23:15.461005 rx_firspass[0][1][4] = 0
4653 00:23:15.461123 rx_lastpass[0][1][4] = 0
4654 00:23:15.463956 rx_firspass[0][1][5] = 0
4655 00:23:15.467313 rx_lastpass[0][1][5] = 0
4656 00:23:15.467428 rx_firspass[0][1][6] = 0
4657 00:23:15.470596 rx_lastpass[0][1][6] = 0
4658 00:23:15.474168 rx_firspass[0][1][7] = 0
4659 00:23:15.474274 rx_lastpass[0][1][7] = 0
4660 00:23:15.477081 rx_firspass[0][1][8] = 0
4661 00:23:15.480447 rx_lastpass[0][1][8] = 0
4662 00:23:15.483838 rx_firspass[0][1][9] = 0
4663 00:23:15.483928 rx_lastpass[0][1][9] = 0
4664 00:23:15.487157 rx_firspass[0][1][10] = 0
4665 00:23:15.490142 rx_lastpass[0][1][10] = 0
4666 00:23:15.490220 rx_firspass[0][1][11] = 0
4667 00:23:15.493537 rx_lastpass[0][1][11] = 0
4668 00:23:15.496812 rx_firspass[0][1][12] = 0
4669 00:23:15.500184 rx_lastpass[0][1][12] = 0
4670 00:23:15.500295 rx_firspass[0][1][13] = 0
4671 00:23:15.503400 rx_lastpass[0][1][13] = 0
4672 00:23:15.506624 rx_firspass[0][1][14] = 0
4673 00:23:15.509901 rx_lastpass[0][1][14] = 0
4674 00:23:15.509989 rx_firspass[0][1][15] = 0
4675 00:23:15.513053 rx_lastpass[0][1][15] = 0
4676 00:23:15.516389 rx_firspass[1][0][0] = 0
4677 00:23:15.516502 rx_lastpass[1][0][0] = 0
4678 00:23:15.519665 rx_firspass[1][0][1] = 0
4679 00:23:15.522872 rx_lastpass[1][0][1] = 0
4680 00:23:15.522963 rx_firspass[1][0][2] = 0
4681 00:23:15.526260 rx_lastpass[1][0][2] = 0
4682 00:23:15.529580 rx_firspass[1][0][3] = 0
4683 00:23:15.533851 rx_lastpass[1][0][3] = 0
4684 00:23:15.533929 rx_firspass[1][0][4] = 0
4685 00:23:15.536244 rx_lastpass[1][0][4] = 0
4686 00:23:15.539312 rx_firspass[1][0][5] = 0
4687 00:23:15.539390 rx_lastpass[1][0][5] = 0
4688 00:23:15.542595 rx_firspass[1][0][6] = 0
4689 00:23:15.545697 rx_lastpass[1][0][6] = 0
4690 00:23:15.545776 rx_firspass[1][0][7] = 0
4691 00:23:15.548996 rx_lastpass[1][0][7] = 0
4692 00:23:15.552302 rx_firspass[1][0][8] = 0
4693 00:23:15.555691 rx_lastpass[1][0][8] = 0
4694 00:23:15.555779 rx_firspass[1][0][9] = 0
4695 00:23:15.558935 rx_lastpass[1][0][9] = 0
4696 00:23:15.562371 rx_firspass[1][0][10] = 0
4697 00:23:15.562450 rx_lastpass[1][0][10] = 0
4698 00:23:15.565427 rx_firspass[1][0][11] = 0
4699 00:23:15.568735 rx_lastpass[1][0][11] = 0
4700 00:23:15.572205 rx_firspass[1][0][12] = 0
4701 00:23:15.572310 rx_lastpass[1][0][12] = 0
4702 00:23:15.575419 rx_firspass[1][0][13] = 0
4703 00:23:15.578570 rx_lastpass[1][0][13] = 0
4704 00:23:15.578676 rx_firspass[1][0][14] = 0
4705 00:23:15.581977 rx_lastpass[1][0][14] = 0
4706 00:23:15.585313 rx_firspass[1][0][15] = 0
4707 00:23:15.588513 rx_lastpass[1][0][15] = 0
4708 00:23:15.588618 rx_firspass[1][1][0] = 0
4709 00:23:15.591899 rx_lastpass[1][1][0] = 0
4710 00:23:15.595101 rx_firspass[1][1][1] = 0
4711 00:23:15.595179 rx_lastpass[1][1][1] = 0
4712 00:23:15.598101 rx_firspass[1][1][2] = 0
4713 00:23:15.601730 rx_lastpass[1][1][2] = 0
4714 00:23:15.601819 rx_firspass[1][1][3] = 0
4715 00:23:15.604699 rx_lastpass[1][1][3] = 0
4716 00:23:15.607916 rx_firspass[1][1][4] = 0
4717 00:23:15.611215 rx_lastpass[1][1][4] = 0
4718 00:23:15.611305 rx_firspass[1][1][5] = 0
4719 00:23:15.614444 rx_lastpass[1][1][5] = 0
4720 00:23:15.618112 rx_firspass[1][1][6] = 0
4721 00:23:15.618201 rx_lastpass[1][1][6] = 0
4722 00:23:15.621107 rx_firspass[1][1][7] = 0
4723 00:23:15.624334 rx_lastpass[1][1][7] = 0
4724 00:23:15.624452 rx_firspass[1][1][8] = 0
4725 00:23:15.627749 rx_lastpass[1][1][8] = 0
4726 00:23:15.630975 rx_firspass[1][1][9] = 0
4727 00:23:15.634030 rx_lastpass[1][1][9] = 0
4728 00:23:15.634113 rx_firspass[1][1][10] = 0
4729 00:23:15.637341 rx_lastpass[1][1][10] = 0
4730 00:23:15.640887 rx_firspass[1][1][11] = 0
4731 00:23:15.640998 rx_lastpass[1][1][11] = 0
4732 00:23:15.643906 rx_firspass[1][1][12] = 0
4733 00:23:15.647285 rx_lastpass[1][1][12] = 0
4734 00:23:15.650695 rx_firspass[1][1][13] = 0
4735 00:23:15.650774 rx_lastpass[1][1][13] = 0
4736 00:23:15.654087 rx_firspass[1][1][14] = 0
4737 00:23:15.657179 rx_lastpass[1][1][14] = 0
4738 00:23:15.660371 rx_firspass[1][1][15] = 0
4739 00:23:15.660468 rx_lastpass[1][1][15] = 0
4740 00:23:15.663697 dump params clk_delay
4741 00:23:15.663789 clk_delay[0] = 0
4742 00:23:15.667031 clk_delay[1] = 0
4743 00:23:15.667146 dump params dqs_delay
4744 00:23:15.670286 dqs_delay[0][0] = 0
4745 00:23:15.673592 dqs_delay[0][1] = 0
4746 00:23:15.673669 dqs_delay[1][0] = 0
4747 00:23:15.676824 dqs_delay[1][1] = 0
4748 00:23:15.679843 dump params delay_cell_unit = 744
4749 00:23:15.679948 dump source = 0x0
4750 00:23:15.683338 dump params frequency:800
4751 00:23:15.683420 dump params rank number:2
4752 00:23:15.686565
4753 00:23:15.686657 dump params write leveling
4754 00:23:15.689873 write leveling[0][0][0] = 0x0
4755 00:23:15.693097 write leveling[0][0][1] = 0x0
4756 00:23:15.696391 write leveling[0][1][0] = 0x0
4757 00:23:15.699700 write leveling[0][1][1] = 0x0
4758 00:23:15.699778 write leveling[1][0][0] = 0x0
4759 00:23:15.703031 write leveling[1][0][1] = 0x0
4760 00:23:15.706200 write leveling[1][1][0] = 0x0
4761 00:23:15.709345 write leveling[1][1][1] = 0x0
4762 00:23:15.709465 dump params cbt_cs
4763 00:23:15.712569 cbt_cs[0][0] = 0x0
4764 00:23:15.712643 cbt_cs[0][1] = 0x0
4765 00:23:15.716001 cbt_cs[1][0] = 0x0
4766 00:23:15.716077 cbt_cs[1][1] = 0x0
4767 00:23:15.719449 dump params cbt_mr12
4768 00:23:15.722701 cbt_mr12[0][0] = 0x0
4769 00:23:15.722777 cbt_mr12[0][1] = 0x0
4770 00:23:15.725983 cbt_mr12[1][0] = 0x0
4771 00:23:15.726078 cbt_mr12[1][1] = 0x0
4772 00:23:15.728954 dump params tx window
4773 00:23:15.732270 tx_center_min[0][0][0] = 0
4774 00:23:15.732371 tx_center_max[0][0][0] = 0
4775 00:23:15.735910 tx_center_min[0][0][1] = 0
4776 00:23:15.739034 tx_center_max[0][0][1] = 0
4777 00:23:15.742354 tx_center_min[0][1][0] = 0
4778 00:23:15.742466 tx_center_max[0][1][0] = 0
4779 00:23:15.745759 tx_center_min[0][1][1] = 0
4780 00:23:15.748865 tx_center_max[0][1][1] = 0
4781 00:23:15.752093 tx_center_min[1][0][0] = 0
4782 00:23:15.752173 tx_center_max[1][0][0] = 0
4783 00:23:15.755250 tx_center_min[1][0][1] = 0
4784 00:23:15.758648 tx_center_max[1][0][1] = 0
4785 00:23:15.761758 tx_center_min[1][1][0] = 0
4786 00:23:15.761840 tx_center_max[1][1][0] = 0
4787 00:23:15.765238 tx_center_min[1][1][1] = 0
4788 00:23:15.768421 tx_center_max[1][1][1] = 0
4789 00:23:15.771763 dump params tx window
4790 00:23:15.771879 tx_win_center[0][0][0] = 0
4791 00:23:15.774739 tx_first_pass[0][0][0] = 0
4792 00:23:15.778083 tx_last_pass[0][0][0] = 0
4793 00:23:15.781277 tx_win_center[0][0][1] = 0
4794 00:23:15.781396 tx_first_pass[0][0][1] = 0
4795 00:23:15.784632 tx_last_pass[0][0][1] = 0
4796 00:23:15.787890 tx_win_center[0][0][2] = 0
4797 00:23:15.788009 tx_first_pass[0][0][2] = 0
4798 00:23:15.791111 tx_last_pass[0][0][2] = 0
4799 00:23:15.794779 tx_win_center[0][0][3] = 0
4800 00:23:15.797667 tx_first_pass[0][0][3] = 0
4801 00:23:15.797752 tx_last_pass[0][0][3] = 0
4802 00:23:15.800939 tx_win_center[0][0][4] = 0
4803 00:23:15.804213 tx_first_pass[0][0][4] = 0
4804 00:23:15.807606 tx_last_pass[0][0][4] = 0
4805 00:23:15.807718 tx_win_center[0][0][5] = 0
4806 00:23:15.810942 tx_first_pass[0][0][5] = 0
4807 00:23:15.814203 tx_last_pass[0][0][5] = 0
4808 00:23:15.817515 tx_win_center[0][0][6] = 0
4809 00:23:15.817600 tx_first_pass[0][0][6] = 0
4810 00:23:15.820664 tx_last_pass[0][0][6] = 0
4811 00:23:15.823818 tx_win_center[0][0][7] = 0
4812 00:23:15.826981 tx_first_pass[0][0][7] = 0
4813 00:23:15.827092 tx_last_pass[0][0][7] = 0
4814 00:23:15.830396 tx_win_center[0][0][8] = 0
4815 00:23:15.833706 tx_first_pass[0][0][8] = 0
4816 00:23:15.836914 tx_last_pass[0][0][8] = 0
4817 00:23:15.836994 tx_win_center[0][0][9] = 0
4818 00:23:15.840167 tx_first_pass[0][0][9] = 0
4819 00:23:15.843310 tx_last_pass[0][0][9] = 0
4820 00:23:15.843401 tx_win_center[0][0][10] = 0
4821 00:23:15.846811 tx_first_pass[0][0][10] = 0
4822 00:23:15.850085 tx_last_pass[0][0][10] = 0
4823 00:23:15.853436 tx_win_center[0][0][11] = 0
4824 00:23:15.856460 tx_first_pass[0][0][11] = 0
4825 00:23:15.856574 tx_last_pass[0][0][11] = 0
4826 00:23:15.859887 tx_win_center[0][0][12] = 0
4827 00:23:15.863110 tx_first_pass[0][0][12] = 0
4828 00:23:15.866390 tx_last_pass[0][0][12] = 0
4829 00:23:15.866501 tx_win_center[0][0][13] = 0
4830 00:23:15.869843 tx_first_pass[0][0][13] = 0
4831 00:23:15.873017 tx_last_pass[0][0][13] = 0
4832 00:23:15.876255 tx_win_center[0][0][14] = 0
4833 00:23:15.876378 tx_first_pass[0][0][14] = 0
4834 00:23:15.879553 tx_last_pass[0][0][14] = 0
4835 00:23:15.882832 tx_win_center[0][0][15] = 0
4836 00:23:15.886086 tx_first_pass[0][0][15] = 0
4837 00:23:15.886193 tx_last_pass[0][0][15] = 0
4838 00:23:15.889248 tx_win_center[0][1][0] = 0
4839 00:23:15.892676 tx_first_pass[0][1][0] = 0
4840 00:23:15.895744 tx_last_pass[0][1][0] = 0
4841 00:23:15.895856 tx_win_center[0][1][1] = 0
4842 00:23:15.899335 tx_first_pass[0][1][1] = 0
4843 00:23:15.902333 tx_last_pass[0][1][1] = 0
4844 00:23:15.905657 tx_win_center[0][1][2] = 0
4845 00:23:15.905776 tx_first_pass[0][1][2] = 0
4846 00:23:15.909016 tx_last_pass[0][1][2] = 0
4847 00:23:15.912127 tx_win_center[0][1][3] = 0
4848 00:23:15.915394 tx_first_pass[0][1][3] = 0
4849 00:23:15.915503 tx_last_pass[0][1][3] = 0
4850 00:23:15.918627 tx_win_center[0][1][4] = 0
4851 00:23:15.922263 tx_first_pass[0][1][4] = 0
4852 00:23:15.925531 tx_last_pass[0][1][4] = 0
4853 00:23:15.925621 tx_win_center[0][1][5] = 0
4854 00:23:15.928758 tx_first_pass[0][1][5] = 0
4855 00:23:15.931975 tx_last_pass[0][1][5] = 0
4856 00:23:15.932083 tx_win_center[0][1][6] = 0
4857 00:23:15.935281 tx_first_pass[0][1][6] = 0
4858 00:23:15.938331 tx_last_pass[0][1][6] = 0
4859 00:23:15.941600 tx_win_center[0][1][7] = 0
4860 00:23:15.941693 tx_first_pass[0][1][7] = 0
4861 00:23:15.944834 tx_last_pass[0][1][7] = 0
4862 00:23:15.948504 tx_win_center[0][1][8] = 0
4863 00:23:15.951407 tx_first_pass[0][1][8] = 0
4864 00:23:15.951515 tx_last_pass[0][1][8] = 0
4865 00:23:15.954862 tx_win_center[0][1][9] = 0
4866 00:23:15.958163 tx_first_pass[0][1][9] = 0
4867 00:23:15.961271 tx_last_pass[0][1][9] = 0
4868 00:23:15.961382 tx_win_center[0][1][10] = 0
4869 00:23:15.964842 tx_first_pass[0][1][10] = 0
4870 00:23:15.967884 tx_last_pass[0][1][10] = 0
4871 00:23:15.971126 tx_win_center[0][1][11] = 0
4872 00:23:15.971205 tx_first_pass[0][1][11] = 0
4873 00:23:15.974528 tx_last_pass[0][1][11] = 0
4874 00:23:15.977582 tx_win_center[0][1][12] = 0
4875 00:23:15.981074 tx_first_pass[0][1][12] = 0
4876 00:23:15.981176 tx_last_pass[0][1][12] = 0
4877 00:23:15.984494 tx_win_center[0][1][13] = 0
4878 00:23:15.987384 tx_first_pass[0][1][13] = 0
4879 00:23:15.990638 tx_last_pass[0][1][13] = 0
4880 00:23:15.990728 tx_win_center[0][1][14] = 0
4881 00:23:15.994142 tx_first_pass[0][1][14] = 0
4882 00:23:15.997509 tx_last_pass[0][1][14] = 0
4883 00:23:16.000483 tx_win_center[0][1][15] = 0
4884 00:23:16.003680 tx_first_pass[0][1][15] = 0
4885 00:23:16.003781 tx_last_pass[0][1][15] = 0
4886 00:23:16.007162 tx_win_center[1][0][0] = 0
4887 00:23:16.010212 tx_first_pass[1][0][0] = 0
4888 00:23:16.013569 tx_last_pass[1][0][0] = 0
4889 00:23:16.013654 tx_win_center[1][0][1] = 0
4890 00:23:16.016817 tx_first_pass[1][0][1] = 0
4891 00:23:16.020338 tx_last_pass[1][0][1] = 0
4892 00:23:16.020447 tx_win_center[1][0][2] = 0
4893 00:23:16.023330 tx_first_pass[1][0][2] = 0
4894 00:23:16.026600 tx_last_pass[1][0][2] = 0
4895 00:23:16.030088 tx_win_center[1][0][3] = 0
4896 00:23:16.030169 tx_first_pass[1][0][3] = 0
4897 00:23:16.033208 tx_last_pass[1][0][3] = 0
4898 00:23:16.036510 tx_win_center[1][0][4] = 0
4899 00:23:16.039879 tx_first_pass[1][0][4] = 0
4900 00:23:16.039969 tx_last_pass[1][0][4] = 0
4901 00:23:16.043123 tx_win_center[1][0][5] = 0
4902 00:23:16.046423 tx_first_pass[1][0][5] = 0
4903 00:23:16.049559 tx_last_pass[1][0][5] = 0
4904 00:23:16.049648 tx_win_center[1][0][6] = 0
4905 00:23:16.053066 tx_first_pass[1][0][6] = 0
4906 00:23:16.056373 tx_last_pass[1][0][6] = 0
4907 00:23:16.059310 tx_win_center[1][0][7] = 0
4908 00:23:16.059429 tx_first_pass[1][0][7] = 0
4909 00:23:16.062594 tx_last_pass[1][0][7] = 0
4910 00:23:16.066048 tx_win_center[1][0][8] = 0
4911 00:23:16.069207 tx_first_pass[1][0][8] = 0
4912 00:23:16.069288 tx_last_pass[1][0][8] = 0
4913 00:23:16.072369 tx_win_center[1][0][9] = 0
4914 00:23:16.075957 tx_first_pass[1][0][9] = 0
4915 00:23:16.076047 tx_last_pass[1][0][9] = 0
4916 00:23:16.078878 tx_win_center[1][0][10] = 0
4917 00:23:16.082378 tx_first_pass[1][0][10] = 0
4918 00:23:16.085646 tx_last_pass[1][0][10] = 0
4919 00:23:16.088846 tx_win_center[1][0][11] = 0
4920 00:23:16.088935 tx_first_pass[1][0][11] = 0
4921 00:23:16.092077 tx_last_pass[1][0][11] = 0
4922 00:23:16.095273 tx_win_center[1][0][12] = 0
4923 00:23:16.098477 tx_first_pass[1][0][12] = 0
4924 00:23:16.098568 tx_last_pass[1][0][12] = 0
4925 00:23:16.101899 tx_win_center[1][0][13] = 0
4926 00:23:16.105245 tx_first_pass[1][0][13] = 0
4927 00:23:16.108384 tx_last_pass[1][0][13] = 0
4928 00:23:16.108468 tx_win_center[1][0][14] = 0
4929 00:23:16.111787 tx_first_pass[1][0][14] = 0
4930 00:23:16.115010 tx_last_pass[1][0][14] = 0
4931 00:23:16.118304 tx_win_center[1][0][15] = 0
4932 00:23:16.118388 tx_first_pass[1][0][15] = 0
4933 00:23:16.121361 tx_last_pass[1][0][15] = 0
4934 00:23:16.124709 tx_win_center[1][1][0] = 0
4935 00:23:16.128058 tx_first_pass[1][1][0] = 0
4936 00:23:16.128170 tx_last_pass[1][1][0] = 0
4937 00:23:16.131233 tx_win_center[1][1][1] = 0
4938 00:23:16.134611 tx_first_pass[1][1][1] = 0
4939 00:23:16.137712 tx_last_pass[1][1][1] = 0
4940 00:23:16.137834 tx_win_center[1][1][2] = 0
4941 00:23:16.140954 tx_first_pass[1][1][2] = 0
4942 00:23:16.144227 tx_last_pass[1][1][2] = 0
4943 00:23:16.147687 tx_win_center[1][1][3] = 0
4944 00:23:16.147799 tx_first_pass[1][1][3] = 0
4945 00:23:16.151031 tx_last_pass[1][1][3] = 0
4946 00:23:16.154361 tx_win_center[1][1][4] = 0
4947 00:23:16.157461 tx_first_pass[1][1][4] = 0
4948 00:23:16.157556 tx_last_pass[1][1][4] = 0
4949 00:23:16.160861 tx_win_center[1][1][5] = 0
4950 00:23:16.164197 tx_first_pass[1][1][5] = 0
4951 00:23:16.164317 tx_last_pass[1][1][5] = 0
4952 00:23:16.167556 tx_win_center[1][1][6] = 0
4953 00:23:16.170684 tx_first_pass[1][1][6] = 0
4954 00:23:16.174010 tx_last_pass[1][1][6] = 0
4955 00:23:16.174125 tx_win_center[1][1][7] = 0
4956 00:23:16.177296 tx_first_pass[1][1][7] = 0
4957 00:23:16.180345 tx_last_pass[1][1][7] = 0
4958 00:23:16.183454 tx_win_center[1][1][8] = 0
4959 00:23:16.183568 tx_first_pass[1][1][8] = 0
4960 00:23:16.186725 tx_last_pass[1][1][8] = 0
4961 00:23:16.190345 tx_win_center[1][1][9] = 0
4962 00:23:16.193505 tx_first_pass[1][1][9] = 0
4963 00:23:16.193629 tx_last_pass[1][1][9] = 0
4964 00:23:16.196694 tx_win_center[1][1][10] = 0
4965 00:23:16.199810 tx_first_pass[1][1][10] = 0
4966 00:23:16.203133 tx_last_pass[1][1][10] = 0
4967 00:23:16.203248 tx_win_center[1][1][11] = 0
4968 00:23:16.206778 tx_first_pass[1][1][11] = 0
4969 00:23:16.209991 tx_last_pass[1][1][11] = 0
4970 00:23:16.212903 tx_win_center[1][1][12] = 0
4971 00:23:16.213018 tx_first_pass[1][1][12] = 0
4972 00:23:16.216361 tx_last_pass[1][1][12] = 0
4973 00:23:16.219687 tx_win_center[1][1][13] = 0
4974 00:23:16.223025 tx_first_pass[1][1][13] = 0
4975 00:23:16.226348 tx_last_pass[1][1][13] = 0
4976 00:23:16.226431 tx_win_center[1][1][14] = 0
4977 00:23:16.229585 tx_first_pass[1][1][14] = 0
4978 00:23:16.232679 tx_last_pass[1][1][14] = 0
4979 00:23:16.235931 tx_win_center[1][1][15] = 0
4980 00:23:16.236054 tx_first_pass[1][1][15] = 0
4981 00:23:16.239163 tx_last_pass[1][1][15] = 0
4982 00:23:16.242707 dump params rx window
4983 00:23:16.242796 rx_firspass[0][0][0] = 0
4984 00:23:16.245777 rx_lastpass[0][0][0] = 0
4985 00:23:16.249079 rx_firspass[0][0][1] = 0
4986 00:23:16.249198 rx_lastpass[0][0][1] = 0
4987 00:23:16.252333 rx_firspass[0][0][2] = 0
4988 00:23:16.255624 rx_lastpass[0][0][2] = 0
4989 00:23:16.258872 rx_firspass[0][0][3] = 0
4990 00:23:16.258963 rx_lastpass[0][0][3] = 0
4991 00:23:16.262030 rx_firspass[0][0][4] = 0
4992 00:23:16.265288 rx_lastpass[0][0][4] = 0
4993 00:23:16.265406 rx_firspass[0][0][5] = 0
4994 00:23:16.268695 rx_lastpass[0][0][5] = 0
4995 00:23:16.271957 rx_firspass[0][0][6] = 0
4996 00:23:16.272047 rx_lastpass[0][0][6] = 0
4997 00:23:16.275469 rx_firspass[0][0][7] = 0
4998 00:23:16.278399 rx_lastpass[0][0][7] = 0
4999 00:23:16.281964 rx_firspass[0][0][8] = 0
5000 00:23:16.282053 rx_lastpass[0][0][8] = 0
5001 00:23:16.285150 rx_firspass[0][0][9] = 0
5002 00:23:16.288348 rx_lastpass[0][0][9] = 0
5003 00:23:16.288442 rx_firspass[0][0][10] = 0
5004 00:23:16.291772 rx_lastpass[0][0][10] = 0
5005 00:23:16.295052 rx_firspass[0][0][11] = 0
5006 00:23:16.298347 rx_lastpass[0][0][11] = 0
5007 00:23:16.298437 rx_firspass[0][0][12] = 0
5008 00:23:16.301388 rx_lastpass[0][0][12] = 0
5009 00:23:16.304751 rx_firspass[0][0][13] = 0
5010 00:23:16.304840 rx_lastpass[0][0][13] = 0
5011 00:23:16.307995 rx_firspass[0][0][14] = 0
5012 00:23:16.311306 rx_lastpass[0][0][14] = 0
5013 00:23:16.314577 rx_firspass[0][0][15] = 0
5014 00:23:16.314667 rx_lastpass[0][0][15] = 0
5015 00:23:16.317885 rx_firspass[0][1][0] = 0
5016 00:23:16.321206 rx_lastpass[0][1][0] = 0
5017 00:23:16.321325 rx_firspass[0][1][1] = 0
5018 00:23:16.324537 rx_lastpass[0][1][1] = 0
5019 00:23:16.327465 rx_firspass[0][1][2] = 0
5020 00:23:16.330871 rx_lastpass[0][1][2] = 0
5021 00:23:16.330960 rx_firspass[0][1][3] = 0
5022 00:23:16.334152 rx_lastpass[0][1][3] = 0
5023 00:23:16.337612 rx_firspass[0][1][4] = 0
5024 00:23:16.337703 rx_lastpass[0][1][4] = 0
5025 00:23:16.340581 rx_firspass[0][1][5] = 0
5026 00:23:16.344078 rx_lastpass[0][1][5] = 0
5027 00:23:16.344202 rx_firspass[0][1][6] = 0
5028 00:23:16.347232 rx_lastpass[0][1][6] = 0
5029 00:23:16.350469 rx_firspass[0][1][7] = 0
5030 00:23:16.353765 rx_lastpass[0][1][7] = 0
5031 00:23:16.353854 rx_firspass[0][1][8] = 0
5032 00:23:16.357281 rx_lastpass[0][1][8] = 0
5033 00:23:16.360240 rx_firspass[0][1][9] = 0
5034 00:23:16.360329 rx_lastpass[0][1][9] = 0
5035 00:23:16.363733 rx_firspass[0][1][10] = 0
5036 00:23:16.366776 rx_lastpass[0][1][10] = 0
5037 00:23:16.366866 rx_firspass[0][1][11] = 0
5038 00:23:16.370186 rx_lastpass[0][1][11] = 0
5039 00:23:16.373279 rx_firspass[0][1][12] = 0
5040 00:23:16.376696 rx_lastpass[0][1][12] = 0
5041 00:23:16.376786 rx_firspass[0][1][13] = 0
5042 00:23:16.380157 rx_lastpass[0][1][13] = 0
5043 00:23:16.383089 rx_firspass[0][1][14] = 0
5044 00:23:16.386421 rx_lastpass[0][1][14] = 0
5045 00:23:16.386511 rx_firspass[0][1][15] = 0
5046 00:23:16.389583 rx_lastpass[0][1][15] = 0
5047 00:23:16.393162 rx_firspass[1][0][0] = 0
5048 00:23:16.393251 rx_lastpass[1][0][0] = 0
5049 00:23:16.396357 rx_firspass[1][0][1] = 0
5050 00:23:16.399727 rx_lastpass[1][0][1] = 0
5051 00:23:16.399816 rx_firspass[1][0][2] = 0
5052 00:23:16.402993 rx_lastpass[1][0][2] = 0
5053 00:23:16.406224 rx_firspass[1][0][3] = 0
5054 00:23:16.409227 rx_lastpass[1][0][3] = 0
5055 00:23:16.409317 rx_firspass[1][0][4] = 0
5056 00:23:16.412509 rx_lastpass[1][0][4] = 0
5057 00:23:16.416149 rx_firspass[1][0][5] = 0
5058 00:23:16.416256 rx_lastpass[1][0][5] = 0
5059 00:23:16.419115 rx_firspass[1][0][6] = 0
5060 00:23:16.422401 rx_lastpass[1][0][6] = 0
5061 00:23:16.422514 rx_firspass[1][0][7] = 0
5062 00:23:16.425887 rx_lastpass[1][0][7] = 0
5063 00:23:16.429244 rx_firspass[1][0][8] = 0
5064 00:23:16.432579 rx_lastpass[1][0][8] = 0
5065 00:23:16.432660 rx_firspass[1][0][9] = 0
5066 00:23:16.435524 rx_lastpass[1][0][9] = 0
5067 00:23:16.438741 rx_firspass[1][0][10] = 0
5068 00:23:16.438858 rx_lastpass[1][0][10] = 0
5069 00:23:16.441990 rx_firspass[1][0][11] = 0
5070 00:23:16.445608 rx_lastpass[1][0][11] = 0
5071 00:23:16.448526 rx_firspass[1][0][12] = 0
5072 00:23:16.448633 rx_lastpass[1][0][12] = 0
5073 00:23:16.451854 rx_firspass[1][0][13] = 0
5074 00:23:16.455056 rx_lastpass[1][0][13] = 0
5075 00:23:16.455160 rx_firspass[1][0][14] = 0
5076 00:23:16.458513 rx_lastpass[1][0][14] = 0
5077 00:23:16.461799 rx_firspass[1][0][15] = 0
5078 00:23:16.465161 rx_lastpass[1][0][15] = 0
5079 00:23:16.465273 rx_firspass[1][1][0] = 0
5080 00:23:16.468467 rx_lastpass[1][1][0] = 0
5081 00:23:16.471566 rx_firspass[1][1][1] = 0
5082 00:23:16.471672 rx_lastpass[1][1][1] = 0
5083 00:23:16.475013 rx_firspass[1][1][2] = 0
5084 00:23:16.478217 rx_lastpass[1][1][2] = 0
5085 00:23:16.481320 rx_firspass[1][1][3] = 0
5086 00:23:16.481436 rx_lastpass[1][1][3] = 0
5087 00:23:16.484554 rx_firspass[1][1][4] = 0
5088 00:23:16.488131 rx_lastpass[1][1][4] = 0
5089 00:23:16.488220 rx_firspass[1][1][5] = 0
5090 00:23:16.491066 rx_lastpass[1][1][5] = 0
5091 00:23:16.494532 rx_firspass[1][1][6] = 0
5092 00:23:16.494613 rx_lastpass[1][1][6] = 0
5093 00:23:16.497851 rx_firspass[1][1][7] = 0
5094 00:23:16.501096 rx_lastpass[1][1][7] = 0
5095 00:23:16.501205 rx_firspass[1][1][8] = 0
5096 00:23:16.504451 rx_lastpass[1][1][8] = 0
5097 00:23:16.507700 rx_firspass[1][1][9] = 0
5098 00:23:16.510981 rx_lastpass[1][1][9] = 0
5099 00:23:16.511089 rx_firspass[1][1][10] = 0
5100 00:23:16.514053 rx_lastpass[1][1][10] = 0
5101 00:23:16.517447 rx_firspass[1][1][11] = 0
5102 00:23:16.520776 rx_lastpass[1][1][11] = 0
5103 00:23:16.520888 rx_firspass[1][1][12] = 0
5104 00:23:16.523755 rx_lastpass[1][1][12] = 0
5105 00:23:16.527016 rx_firspass[1][1][13] = 0
5106 00:23:16.527096 rx_lastpass[1][1][13] = 0
5107 00:23:16.530431 rx_firspass[1][1][14] = 0
5108 00:23:16.533834 rx_lastpass[1][1][14] = 0
5109 00:23:16.537096 rx_firspass[1][1][15] = 0
5110 00:23:16.537188 rx_lastpass[1][1][15] = 0
5111 00:23:16.540067 dump params clk_delay
5112 00:23:16.540161 clk_delay[0] = 0
5113 00:23:16.543274 clk_delay[1] = 0
5114 00:23:16.543381 dump params dqs_delay
5115 00:23:16.546825 dqs_delay[0][0] = 0
5116 00:23:16.549997 dqs_delay[0][1] = 0
5117 00:23:16.550078 dqs_delay[1][0] = 0
5118 00:23:16.553190 dqs_delay[1][1] = 0
5119 00:23:16.556425 dump params delay_cell_unit = 744
5120 00:23:16.556541 mt_set_emi_preloader end
5121 00:23:16.563027 [mt_mem_init] dram size: 0x100000000, rank number: 2
5122 00:23:16.566255 [complex_mem_test] start addr:0x40000000, len:20480
5123 00:23:16.603280 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5124 00:23:16.609933 [complex_mem_test] start addr:0x80000000, len:20480
5125 00:23:16.645933 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5126 00:23:16.652049 [complex_mem_test] start addr:0xc0000000, len:20480
5127 00:23:16.688145 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5128 00:23:16.694648 [complex_mem_test] start addr:0x56000000, len:8192
5129 00:23:16.711431 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5130 00:23:16.714786 ddr_geometry:1
5131 00:23:16.718006 [complex_mem_test] start addr:0x80000000, len:8192
5132 00:23:16.734989 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5133 00:23:16.738434 dram_init: dram init end (result: 0)
5134 00:23:16.745103 Successfully loaded DRAM blobs and ran DRAM calibration
5135 00:23:16.754797 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5136 00:23:16.754889 CBMEM:
5137 00:23:16.758011 IMD: root @ 00000000fffff000 254 entries.
5138 00:23:16.761062 IMD: root @ 00000000ffffec00 62 entries.
5139 00:23:16.767931 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5140 00:23:16.774665 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5141 00:23:16.777649 in-header: 03 a1 00 00 08 00 00 00
5142 00:23:16.780984 in-data: 84 60 60 10 00 00 00 00
5143 00:23:16.784366 Chrome EC: clear events_b mask to 0x0000000020004000
5144 00:23:16.794376 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5145 00:23:16.797694 in-header: 03 fd 00 00 00 00 00 00
5146 00:23:16.797783 in-data:
5147 00:23:16.800809 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5148 00:23:16.804388 CBFS @ 21000 size 3d4000
5149 00:23:16.807563 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5150 00:23:16.811092 CBFS: Locating 'fallback/ramstage'
5151 00:23:16.814187 CBFS: Found @ offset 10d40 size d563
5152 00:23:16.837176 read SPI 0x31d94 0xd547: 16639 us, 3281 KB/s, 26.248 Mbps
5153 00:23:16.849002 Accumulated console time in romstage 13546 ms
5154 00:23:16.849124
5155 00:23:16.849230
5156 00:23:16.859064 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5157 00:23:16.862308 ARM64: Exception handlers installed.
5158 00:23:16.862432 ARM64: Testing exception
5159 00:23:16.865515 ARM64: Done test exception
5160 00:23:16.868949 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5161 00:23:16.872295 Manufacturer: ef
5162 00:23:16.878870 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5163 00:23:16.882057 WARNING: RO_VPD is uninitialized or empty.
5164 00:23:16.885354 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5165 00:23:16.888281 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5166 00:23:16.898835 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5167 00:23:16.902177 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5168 00:23:16.908771 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5169 00:23:16.908891 Enumerating buses...
5170 00:23:16.915162 Show all devs... Before device enumeration.
5171 00:23:16.915283 Root Device: enabled 1
5172 00:23:16.918390 CPU_CLUSTER: 0: enabled 1
5173 00:23:16.921670 CPU: 00: enabled 1
5174 00:23:16.921791 Compare with tree...
5175 00:23:16.925502 Root Device: enabled 1
5176 00:23:16.925613 CPU_CLUSTER: 0: enabled 1
5177 00:23:16.928538 CPU: 00: enabled 1
5178 00:23:16.931505 Root Device scanning...
5179 00:23:16.934887 root_dev_scan_bus for Root Device
5180 00:23:16.935005 CPU_CLUSTER: 0 enabled
5181 00:23:16.938227 root_dev_scan_bus for Root Device done
5182 00:23:16.944497 scan_bus: scanning of bus Root Device took 10689 usecs
5183 00:23:16.944602 done
5184 00:23:16.948017 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5185 00:23:16.951014 Allocating resources...
5186 00:23:16.954385 Reading resources...
5187 00:23:16.957735 Root Device read_resources bus 0 link: 0
5188 00:23:16.960910 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5189 00:23:16.964138 CPU: 00 missing read_resources
5190 00:23:16.967490 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5191 00:23:16.970797 Root Device read_resources bus 0 link: 0 done
5192 00:23:16.974309 Done reading resources.
5193 00:23:16.980765 Show resources in subtree (Root Device)...After reading.
5194 00:23:16.984146 Root Device child on link 0 CPU_CLUSTER: 0
5195 00:23:16.987367 CPU_CLUSTER: 0 child on link 0 CPU: 00
5196 00:23:16.997014 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5197 00:23:16.997133 CPU: 00
5198 00:23:16.997240 Setting resources...
5199 00:23:17.003669 Root Device assign_resources, bus 0 link: 0
5200 00:23:17.006936 CPU_CLUSTER: 0 missing set_resources
5201 00:23:17.009867 Root Device assign_resources, bus 0 link: 0
5202 00:23:17.009961 Done setting resources.
5203 00:23:17.016666 Show resources in subtree (Root Device)...After assigning values.
5204 00:23:17.019938 Root Device child on link 0 CPU_CLUSTER: 0
5205 00:23:17.026160 CPU_CLUSTER: 0 child on link 0 CPU: 00
5206 00:23:17.032833 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5207 00:23:17.036119 CPU: 00
5208 00:23:17.036241 Done allocating resources.
5209 00:23:17.042880 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5210 00:23:17.043004 Enabling resources...
5211 00:23:17.043108 done.
5212 00:23:17.049094 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5213 00:23:17.052437 Initializing devices...
5214 00:23:17.052554 Root Device init ...
5215 00:23:17.055652 mainboard_init: Starting display init.
5216 00:23:17.059078 ADC[4]: Raw value=75836 ID=0
5217 00:23:17.081690 anx7625_power_on_init: Init interface.
5218 00:23:17.084797 anx7625_disable_pd_protocol: Disabled PD feature.
5219 00:23:17.091410 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5220 00:23:17.138269 anx7625_start_dp_work: Secure OCM version=00
5221 00:23:17.141390 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5222 00:23:17.158921 sp_tx_get_edid_block: EDID Block = 1
5223 00:23:17.275999 Extracted contents:
5224 00:23:17.279257 header: 00 ff ff ff ff ff ff 00
5225 00:23:17.282630 serial number: 06 af 5c 14 00 00 00 00 00 1a
5226 00:23:17.285666 version: 01 04
5227 00:23:17.289007 basic params: 95 1a 0e 78 02
5228 00:23:17.292163 chroma info: 99 85 95 55 56 92 28 22 50 54
5229 00:23:17.295522 established: 00 00 00
5230 00:23:17.302030 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5231 00:23:17.308626 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5232 00:23:17.314932 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5233 00:23:17.318412 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5234 00:23:17.324782 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5235 00:23:17.328064 extensions: 00
5236 00:23:17.328179 checksum: ae
5237 00:23:17.331433
5238 00:23:17.334701 Manufacturer: AUO Model 145c Serial Number 0
5239 00:23:17.334814 Made week 0 of 2016
5240 00:23:17.338082 EDID version: 1.4
5241 00:23:17.338175 Digital display
5242 00:23:17.341037 6 bits per primary color channel
5243 00:23:17.344322 DisplayPort interface
5244 00:23:17.347609 Maximum image size: 26 cm x 14 cm
5245 00:23:17.347727 Gamma: 220%
5246 00:23:17.347837 Check DPMS levels
5247 00:23:17.350929 Supported color formats: RGB 4:4:4
5248 00:23:17.357744 First detailed timing is preferred timing
5249 00:23:17.357833 Established timings supported:
5250 00:23:17.360914 Standard timings supported:
5251 00:23:17.364316 Detailed timings
5252 00:23:17.367275 Hex of detail: ce1d56ea50001a3030204600009010000018
5253 00:23:17.374135 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5254 00:23:17.377179 0556 0586 05a6 0640 hborder 0
5255 00:23:17.380393 0300 0304 030a 031a vborder 0
5256 00:23:17.383707 -hsync -vsync
5257 00:23:17.383821 Did detailed timing
5258 00:23:17.390449 Hex of detail: 0000000f0000000000000000000000000020
5259 00:23:17.393719 Manufacturer-specified data, tag 15
5260 00:23:17.396752 Hex of detail: 000000fe0041554f0a202020202020202020
5261 00:23:17.400313 ASCII string: AUO
5262 00:23:17.403455 Hex of detail: 000000fe004231313658414230312e34200a
5263 00:23:17.406708 ASCII string: B116XAB01.4
5264 00:23:17.406838 Checksum
5265 00:23:17.409814 Checksum: 0xae (valid)
5266 00:23:17.413310 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5267 00:23:17.416307 DSI data_rate: 457800000 bps
5268 00:23:17.422958 anx7625_parse_edid: set default k value to 0x3d for panel
5269 00:23:17.426104 anx7625_parse_edid: pixelclock(76300).
5270 00:23:17.429547 hactive(1366), hsync(32), hfp(48), hbp(154)
5271 00:23:17.432709 vactive(768), vsync(6), vfp(4), vbp(16)
5272 00:23:17.436050 anx7625_dsi_config: config dsi.
5273 00:23:17.444144 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5274 00:23:17.465352 anx7625_dsi_config: success to config DSI
5275 00:23:17.468318 anx7625_dp_start: MIPI phy setup OK.
5276 00:23:17.471903 [SSUSB] Setting up USB HOST controller...
5277 00:23:17.475143 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5278 00:23:17.478200 [SSUSB] phy power-on done.
5279 00:23:17.481949 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5280 00:23:17.485140 in-header: 03 fc 01 00 00 00 00 00
5281 00:23:17.485230 in-data:
5282 00:23:17.491851 handle_proto3_response: EC response with error code: 1
5283 00:23:17.491942 SPM: pcm index = 1
5284 00:23:17.498086 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5285 00:23:17.498176 CBFS @ 21000 size 3d4000
5286 00:23:17.504665 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5287 00:23:17.508031 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5288 00:23:17.511190 CBFS: Found @ offset 1e7c0 size 1026
5289 00:23:17.518129 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5290 00:23:17.521320 SPM: binary array size = 2988
5291 00:23:17.524522 SPM: version = pcm_allinone_v1.17.2_20180829
5292 00:23:17.527732 SPM binary loaded in 32 msecs
5293 00:23:17.536402 spm_kick_im_to_fetch: ptr = 000000004021eec2
5294 00:23:17.539846 spm_kick_im_to_fetch: len = 2988
5295 00:23:17.539966 SPM: spm_kick_pcm_to_run
5296 00:23:17.542779 SPM: spm_kick_pcm_to_run done
5297 00:23:17.546139 SPM: spm_init done in 52 msecs
5298 00:23:17.549322 Root Device init finished in 494995 usecs
5299 00:23:17.552715 CPU_CLUSTER: 0 init ...
5300 00:23:17.562646 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5301 00:23:17.566098 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5302 00:23:17.569156 CBFS @ 21000 size 3d4000
5303 00:23:17.572353 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5304 00:23:17.575655 CBFS: Locating 'sspm.bin'
5305 00:23:17.578808 CBFS: Found @ offset 208c0 size 41cb
5306 00:23:17.589621 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5307 00:23:17.597287 CPU_CLUSTER: 0 init finished in 42802 usecs
5308 00:23:17.597377 Devices initialized
5309 00:23:17.600640 Show all devs... After init.
5310 00:23:17.604059 Root Device: enabled 1
5311 00:23:17.604147 CPU_CLUSTER: 0: enabled 1
5312 00:23:17.607253 CPU: 00: enabled 1
5313 00:23:17.610485 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5314 00:23:17.616988 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5315 00:23:17.620206 ELOG: NV offset 0x558000 size 0x1000
5316 00:23:17.623659 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5317 00:23:17.630169 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5318 00:23:17.636657 ELOG: Event(17) added with size 13 at 2024-06-21 00:23:16 UTC
5319 00:23:17.639897 out: cmd=0x121: 03 db 21 01 00 00 00 00
5320 00:23:17.643102 in-header: 03 15 00 00 2c 00 00 00
5321 00:23:17.656312 in-data: b8 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 91 50 09 00 06 80 00 00 5e fe 00 00 06 80 00 00 c0 61 04 00 06 80 00 00 8d 92 05 00
5322 00:23:17.659716 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5323 00:23:17.663018 in-header: 03 19 00 00 08 00 00 00
5324 00:23:17.666018 in-data: a2 e0 47 00 13 00 00 00
5325 00:23:17.669221 Chrome EC: UHEPI supported
5326 00:23:17.675969 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5327 00:23:17.679286 in-header: 03 e1 00 00 08 00 00 00
5328 00:23:17.682192 in-data: 84 20 60 10 00 00 00 00
5329 00:23:17.685725 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5330 00:23:17.692117 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5331 00:23:17.695496 in-header: 03 e1 00 00 08 00 00 00
5332 00:23:17.698879 in-data: 84 20 60 10 00 00 00 00
5333 00:23:17.705070 ELOG: Event(A1) added with size 10 at 2024-06-21 00:23:17 UTC
5334 00:23:17.711747 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5335 00:23:17.715067 ELOG: Event(A0) added with size 9 at 2024-06-21 00:23:17 UTC
5336 00:23:17.721326 elog_add_boot_reason: Logged dev mode boot
5337 00:23:17.721416 Finalize devices...
5338 00:23:17.724689 Devices finalized
5339 00:23:17.727983 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5340 00:23:17.734480 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5341 00:23:17.737748 ELOG: Event(91) added with size 10 at 2024-06-21 00:23:17 UTC
5342 00:23:17.741225 Writing coreboot table at 0xffeda000
5343 00:23:17.747505 0. 0000000000114000-000000000011efff: RAMSTAGE
5344 00:23:17.751187 1. 0000000040000000-000000004023cfff: RAMSTAGE
5345 00:23:17.754293 2. 000000004023d000-00000000545fffff: RAM
5346 00:23:17.757247 3. 0000000054600000-000000005465ffff: BL31
5347 00:23:17.760930 4. 0000000054660000-00000000ffed9fff: RAM
5348 00:23:17.767117 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5349 00:23:17.770407 6. 0000000100000000-000000013fffffff: RAM
5350 00:23:17.773778 Passing 5 GPIOs to payload:
5351 00:23:17.777013 NAME | PORT | POLARITY | VALUE
5352 00:23:17.783477 write protect | 0x00000096 | low | high
5353 00:23:17.786860 EC in RW | 0x000000b1 | high | undefined
5354 00:23:17.793338 EC interrupt | 0x00000097 | low | undefined
5355 00:23:17.796760 TPM interrupt | 0x00000099 | high | undefined
5356 00:23:17.800081 speaker enable | 0x000000af | high | undefined
5357 00:23:17.803384 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5358 00:23:17.806490 in-header: 03 f7 00 00 02 00 00 00
5359 00:23:17.809762 in-data: 04 00
5360 00:23:17.809852 Board ID: 4
5361 00:23:17.813118 ADC[3]: Raw value=215048 ID=1
5362 00:23:17.813237 RAM code: 1
5363 00:23:17.816580 SKU ID: 16
5364 00:23:17.819888 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5365 00:23:17.822931 CBFS @ 21000 size 3d4000
5366 00:23:17.826265 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5367 00:23:17.832964 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 5832
5368 00:23:17.836199 coreboot table: 940 bytes.
5369 00:23:17.839197 IMD ROOT 0. 00000000fffff000 00001000
5370 00:23:17.842587 IMD SMALL 1. 00000000ffffe000 00001000
5371 00:23:17.845682 CONSOLE 2. 00000000fffde000 00020000
5372 00:23:17.848953 FMAP 3. 00000000fffdd000 0000047c
5373 00:23:17.855426 TIME STAMP 4. 00000000fffdc000 00000910
5374 00:23:17.858821 RAMOOPS 5. 00000000ffedc000 00100000
5375 00:23:17.862123 COREBOOT 6. 00000000ffeda000 00002000
5376 00:23:17.862220 IMD small region:
5377 00:23:17.865539 IMD ROOT 0. 00000000ffffec00 00000400
5378 00:23:17.871982 VBOOT WORK 1. 00000000ffffeb00 00000100
5379 00:23:17.875308 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5380 00:23:17.878557 VPD 3. 00000000ffffea60 0000006c
5381 00:23:17.881813 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5382 00:23:17.888347 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5383 00:23:17.891558 in-header: 03 e1 00 00 08 00 00 00
5384 00:23:17.894840 in-data: 84 20 60 10 00 00 00 00
5385 00:23:17.901448 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5386 00:23:17.901532 CBFS @ 21000 size 3d4000
5387 00:23:17.907836 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5388 00:23:17.911105 CBFS: Locating 'fallback/payload'
5389 00:23:17.919187 CBFS: Found @ offset dc040 size 439a0
5390 00:23:18.006898 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5391 00:23:18.010285 Checking segment from ROM address 0x0000000040003a00
5392 00:23:18.016914 Checking segment from ROM address 0x0000000040003a1c
5393 00:23:18.019897 Loading segment from ROM address 0x0000000040003a00
5394 00:23:18.023175 code (compression=0)
5395 00:23:18.033192 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5396 00:23:18.039506 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5397 00:23:18.042894 it's not compressed!
5398 00:23:18.046215 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5399 00:23:18.052769 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5400 00:23:18.061106 Loading segment from ROM address 0x0000000040003a1c
5401 00:23:18.064379 Entry Point 0x0000000080000000
5402 00:23:18.064469 Loaded segments
5403 00:23:18.071223 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5404 00:23:18.074527 Jumping to boot code at 0000000080000000(00000000ffeda000)
5405 00:23:18.084328 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5406 00:23:18.090626 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5407 00:23:18.090718 CBFS @ 21000 size 3d4000
5408 00:23:18.097365 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5409 00:23:18.100353 CBFS: Locating 'fallback/bl31'
5410 00:23:18.103831 CBFS: Found @ offset 36dc0 size 5820
5411 00:23:18.115092 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5412 00:23:18.118408 Checking segment from ROM address 0x0000000040003a00
5413 00:23:18.125036 Checking segment from ROM address 0x0000000040003a1c
5414 00:23:18.128331 Loading segment from ROM address 0x0000000040003a00
5415 00:23:18.131483 code (compression=1)
5416 00:23:18.141128 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5417 00:23:18.147844 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5418 00:23:18.147935 using LZMA
5419 00:23:18.156963 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5420 00:23:18.163378 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5421 00:23:18.166752 Loading segment from ROM address 0x0000000040003a1c
5422 00:23:18.170066 Entry Point 0x0000000054601000
5423 00:23:18.170156 Loaded segments
5424 00:23:18.173410 NOTICE: MT8183 bl31_setup
5425 00:23:18.180501 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5426 00:23:18.183858 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5427 00:23:18.187125 INFO: [DEVAPC] dump DEVAPC registers:
5428 00:23:18.197053 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5429 00:23:18.203641 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5430 00:23:18.213235 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5431 00:23:18.219706 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5432 00:23:18.229572 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5433 00:23:18.236099 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5434 00:23:18.246191 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5435 00:23:18.252720 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5436 00:23:18.262548 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5437 00:23:18.268867 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5438 00:23:18.278714 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5439 00:23:18.285291 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5440 00:23:18.295004 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5441 00:23:18.301563 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5442 00:23:18.308100 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5443 00:23:18.318104 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5444 00:23:18.324479 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5445 00:23:18.331084 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5446 00:23:18.337879 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5447 00:23:18.347748 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5448 00:23:18.354075 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5449 00:23:18.360685 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5450 00:23:18.364104 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5451 00:23:18.367240 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5452 00:23:18.370365 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5453 00:23:18.373641 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5454 00:23:18.376922 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5455 00:23:18.383447 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5456 00:23:18.386777 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5457 00:23:18.390044 WARNING: region 0:
5458 00:23:18.393455 WARNING: apc:0x168, sa:0x0, ea:0xfff
5459 00:23:18.396783 WARNING: region 1:
5460 00:23:18.400090 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5461 00:23:18.400180 WARNING: region 2:
5462 00:23:18.403397 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5463 00:23:18.406802 WARNING: region 3:
5464 00:23:18.409733 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5465 00:23:18.413036 WARNING: region 4:
5466 00:23:18.416333 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5467 00:23:18.416423 WARNING: region 5:
5468 00:23:18.419550 WARNING: apc:0x0, sa:0x0, ea:0x0
5469 00:23:18.423007 WARNING: region 6:
5470 00:23:18.426136 WARNING: apc:0x0, sa:0x0, ea:0x0
5471 00:23:18.426229 WARNING: region 7:
5472 00:23:18.429361 WARNING: apc:0x0, sa:0x0, ea:0x0
5473 00:23:18.436043 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5474 00:23:18.439030 INFO: SPM: enable SPMC mode
5475 00:23:18.442422 NOTICE: spm_boot_init() start
5476 00:23:18.445801 NOTICE: spm_boot_init() end
5477 00:23:18.449052 INFO: BL31: Initializing runtime services
5478 00:23:18.455746 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5479 00:23:18.458650 INFO: BL31: Preparing for EL3 exit to normal world
5480 00:23:18.462358 INFO: Entry point address = 0x80000000
5481 00:23:18.465464 INFO: SPSR = 0x8
5482 00:23:18.487451
5483 00:23:18.487540
5484 00:23:18.487611
5485 00:23:18.488090 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5486 00:23:18.488195 start: 2.2.4 bootloader-commands (timeout 00:04:38) [common]
5487 00:23:18.488289 Setting prompt string to ['jacuzzi:']
5488 00:23:18.488373 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:38)
5489 00:23:18.490496 Starting depthcharge on Juniper...
5490 00:23:18.490588
5491 00:23:18.493757 vboot_handoff: creating legacy vboot_handoff structure
5492 00:23:18.493847
5493 00:23:18.497114 ec_init(0): CrosEC protocol v3 supported (544, 544)
5494 00:23:18.500415
5495 00:23:18.500503 Wipe memory regions:
5496 00:23:18.500575
5497 00:23:18.503815 [0x00000040000000, 0x00000054600000)
5498 00:23:18.546505
5499 00:23:18.549600 [0x00000054660000, 0x00000080000000)
5500 00:23:18.637895
5501 00:23:18.638008 [0x000000811994a0, 0x000000ffeda000)
5502 00:23:18.897478
5503 00:23:18.897618 [0x00000100000000, 0x00000140000000)
5504 00:23:19.029915
5505 00:23:19.033084 Initializing XHCI USB controller at 0x11200000.
5506 00:23:19.056024
5507 00:23:19.059381 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5508 00:23:19.059471
5509 00:23:19.059541
5510 00:23:19.059856 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5512 00:23:19.160231 jacuzzi: tftpboot 192.168.201.1 14479163/tftp-deploy-s99zyal3/kernel/image.itb 14479163/tftp-deploy-s99zyal3/kernel/cmdline
5513 00:23:19.160369 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5514 00:23:19.160462 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
5515 00:23:19.164733 tftpboot 192.168.201.1 14479163/tftp-deploy-s99zyal3/kernel/image.itp-deploy-s99zyal3/kernel/cmdline
5516 00:23:19.164827
5517 00:23:19.164898 Waiting for link
5518 00:23:19.570040
5519 00:23:19.570195 R8152: Initializing
5520 00:23:19.570270
5521 00:23:19.573279 Version 9 (ocp_data = 6010)
5522 00:23:19.573370
5523 00:23:19.576481 R8152: Done initializing
5524 00:23:19.576572
5525 00:23:19.576644 Adding net device
5526 00:23:19.962286
5527 00:23:19.962450 done.
5528 00:23:19.962524
5529 00:23:19.962592 MAC: 00:e0:4c:78:85:cb
5530 00:23:19.962656
5531 00:23:19.965667 Sending DHCP discover... done.
5532 00:23:19.965773
5533 00:23:19.968940 Waiting for reply... done.
5534 00:23:19.969061
5535 00:23:19.973030 Sending DHCP request... done.
5536 00:23:19.973159
5537 00:23:19.977302 Waiting for reply... done.
5538 00:23:19.977418
5539 00:23:19.977504 My ip is 192.168.201.22
5540 00:23:19.977573
5541 00:23:19.980743 The DHCP server ip is 192.168.201.1
5542 00:23:19.980834
5543 00:23:19.987410 TFTP server IP predefined by user: 192.168.201.1
5544 00:23:19.987500
5545 00:23:19.993756 Bootfile predefined by user: 14479163/tftp-deploy-s99zyal3/kernel/image.itb
5546 00:23:19.993847
5547 00:23:19.997233 Sending tftp read request... done.
5548 00:23:19.997325
5549 00:23:20.000624 Waiting for the transfer...
5550 00:23:20.000742
5551 00:23:20.264164 00000000 ################################################################
5552 00:23:20.264305
5553 00:23:20.534187 00080000 ################################################################
5554 00:23:20.534334
5555 00:23:20.799870 00100000 ################################################################
5556 00:23:20.800043
5557 00:23:21.059564 00180000 ################################################################
5558 00:23:21.059704
5559 00:23:21.325063 00200000 ################################################################
5560 00:23:21.325207
5561 00:23:21.624486 00280000 ################################################################
5562 00:23:21.624676
5563 00:23:21.946539 00300000 ################################################################
5564 00:23:21.946691
5565 00:23:22.235775 00380000 ################################################################
5566 00:23:22.235932
5567 00:23:22.499541 00400000 ################################################################
5568 00:23:22.499694
5569 00:23:22.749846 00480000 ################################################################
5570 00:23:22.749998
5571 00:23:22.997608 00500000 ################################################################
5572 00:23:22.997764
5573 00:23:23.267699 00580000 ################################################################
5574 00:23:23.267856
5575 00:23:23.560230 00600000 ################################################################
5576 00:23:23.560391
5577 00:23:23.823373 00680000 ################################################################
5578 00:23:23.823556
5579 00:23:24.092198 00700000 ################################################################
5580 00:23:24.092381
5581 00:23:24.349206 00780000 ################################################################
5582 00:23:24.349384
5583 00:23:24.613824 00800000 ################################################################
5584 00:23:24.613967
5585 00:23:24.893373 00880000 ################################################################
5586 00:23:24.893586
5587 00:23:25.162952 00900000 ################################################################
5588 00:23:25.163109
5589 00:23:25.427705 00980000 ################################################################
5590 00:23:25.427889
5591 00:23:25.685304 00a00000 ################################################################
5592 00:23:25.685496
5593 00:23:25.946030 00a80000 ################################################################
5594 00:23:25.946178
5595 00:23:26.237227 00b00000 ################################################################
5596 00:23:26.237382
5597 00:23:26.554102 00b80000 ################################################################
5598 00:23:26.554245
5599 00:23:26.825765 00c00000 ################################################################
5600 00:23:26.825909
5601 00:23:27.106027 00c80000 ################################################################
5602 00:23:27.106205
5603 00:23:27.380417 00d00000 ################################################################
5604 00:23:27.380571
5605 00:23:27.639879 00d80000 ################################################################
5606 00:23:27.640033
5607 00:23:27.911942 00e00000 ################################################################
5608 00:23:27.912097
5609 00:23:28.170261 00e80000 ################################################################
5610 00:23:28.170412
5611 00:23:28.424663 00f00000 ################################################################
5612 00:23:28.424846
5613 00:23:28.681065 00f80000 ################################################################
5614 00:23:28.681221
5615 00:23:28.932072 01000000 ################################################################
5616 00:23:28.932205
5617 00:23:29.183428 01080000 ################################################################
5618 00:23:29.183585
5619 00:23:29.438664 01100000 ################################################################
5620 00:23:29.438819
5621 00:23:29.688942 01180000 ################################################################
5622 00:23:29.689090
5623 00:23:29.944097 01200000 ################################################################
5624 00:23:29.944287
5625 00:23:30.209469 01280000 ################################################################
5626 00:23:30.209630
5627 00:23:30.483000 01300000 ################################################################
5628 00:23:30.483189
5629 00:23:30.780836 01380000 ################################################################
5630 00:23:30.780987
5631 00:23:31.055535 01400000 ################################################################
5632 00:23:31.055680
5633 00:23:31.320358 01480000 ################################################################
5634 00:23:31.320512
5635 00:23:31.580534 01500000 ################################################################
5636 00:23:31.580688
5637 00:23:31.834387 01580000 ################################################################
5638 00:23:31.834533
5639 00:23:32.086363 01600000 ################################################################
5640 00:23:32.086515
5641 00:23:32.337613 01680000 ################################################################
5642 00:23:32.337766
5643 00:23:32.628375 01700000 ################################################################
5644 00:23:32.628528
5645 00:23:32.961860 01780000 ################################################################
5646 00:23:32.962005
5647 00:23:33.219121 01800000 ################################################################
5648 00:23:33.219268
5649 00:23:33.491176 01880000 ################################################################
5650 00:23:33.491324
5651 00:23:33.746781 01900000 ################################################################
5652 00:23:33.746921
5653 00:23:33.997715 01980000 ################################################################
5654 00:23:33.997854
5655 00:23:34.259120 01a00000 ################################################################
5656 00:23:34.259269
5657 00:23:34.509701 01a80000 ################################################################
5658 00:23:34.509857
5659 00:23:34.759581 01b00000 ################################################################
5660 00:23:34.759735
5661 00:23:35.005996 01b80000 ################################################################
5662 00:23:35.006145
5663 00:23:35.273675 01c00000 ################################################################
5664 00:23:35.273835
5665 00:23:35.527240 01c80000 ################################################################
5666 00:23:35.527397
5667 00:23:35.777002 01d00000 ################################################################
5668 00:23:35.777158
5669 00:23:36.041064 01d80000 ################################################################
5670 00:23:36.041219
5671 00:23:36.312184 01e00000 ################################################################
5672 00:23:36.312333
5673 00:23:36.570839 01e80000 ################################################################
5674 00:23:36.570991
5675 00:23:36.825848 01f00000 ################################################################
5676 00:23:36.826006
5677 00:23:37.079764 01f80000 ################################################################
5678 00:23:37.079914
5679 00:23:37.356756 02000000 ################################################################
5680 00:23:37.356912
5681 00:23:37.597521 02080000 ############################################################ done.
5682 00:23:37.597675
5683 00:23:37.600929 The bootfile was 34569322 bytes long.
5684 00:23:37.601027
5685 00:23:37.604045 Sending tftp read request... done.
5686 00:23:37.604161
5687 00:23:37.604267 Waiting for the transfer...
5688 00:23:37.607253
5689 00:23:37.607378 00000000 # done.
5690 00:23:37.607500
5691 00:23:37.614075 Command line loaded dynamically from TFTP file: 14479163/tftp-deploy-s99zyal3/kernel/cmdline
5692 00:23:37.614168
5693 00:23:37.633456 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5694 00:23:37.633564
5695 00:23:37.633657 Loading FIT.
5696 00:23:37.633729
5697 00:23:37.636791 Image ramdisk-1 has 21384683 bytes.
5698 00:23:37.636905
5699 00:23:37.640130 Image fdt-1 has 57695 bytes.
5700 00:23:37.640214
5701 00:23:37.643382 Image kernel-1 has 13124896 bytes.
5702 00:23:37.643465
5703 00:23:37.650029 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5704 00:23:37.650123
5705 00:23:37.662880 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5706 00:23:37.663000
5707 00:23:37.669552 Choosing best match conf-1 for compat google,juniper-sku16.
5708 00:23:37.669642
5709 00:23:37.676511 Connected to device vid:did:rid of 1ae0:0028:00
5710 00:23:37.683950
5711 00:23:37.687282 tpm_get_response: command 0x17b, return code 0x0
5712 00:23:37.687371
5713 00:23:37.690721 tpm_cleanup: add release locality here.
5714 00:23:37.690813
5715 00:23:37.693895 Shutting down all USB controllers.
5716 00:23:37.693979
5717 00:23:37.697006 Removing current net device
5718 00:23:37.697097
5719 00:23:37.700352 Exiting depthcharge with code 4 at timestamp: 36358471
5720 00:23:37.700433
5721 00:23:37.707091 LZMA decompressing kernel-1 to 0x80193568
5722 00:23:37.707176
5723 00:23:37.709970 LZMA decompressing kernel-1 to 0x40000000
5724 00:23:39.574491
5725 00:23:39.574642 jumping to kernel
5726 00:23:39.575355 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
5727 00:23:39.575507 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
5728 00:23:39.575625 Setting prompt string to ['Linux version [0-9]']
5729 00:23:39.575741 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5730 00:23:39.575863 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5731 00:23:39.649740
5732 00:23:39.652933 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5733 00:23:39.656510 start: 2.2.5.1 login-action (timeout 00:04:17) [common]
5734 00:23:39.656613 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5735 00:23:39.656693 Setting prompt string to []
5736 00:23:39.656777 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5737 00:23:39.656854 Using line separator: #'\n'#
5738 00:23:39.656919 No login prompt set.
5739 00:23:39.656984 Parsing kernel messages
5740 00:23:39.657044 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5741 00:23:39.657155 [login-action] Waiting for messages, (timeout 00:04:17)
5742 00:23:39.657225 Waiting using forced prompt support (timeout 00:02:09)
5743 00:23:39.675672 [ 0.000000] Linux version 6.1.94-cip23 (KernelCI@build-j239242-arm64-gcc-10-defconfig-arm64-chromebook-c5lwc) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Fri Jun 21 00:04:56 UTC 2024
5744 00:23:39.678928 [ 0.000000] random: crng init done
5745 00:23:39.685792 [ 0.000000] Machine model: Google juniper sku16 board
5746 00:23:39.688856 [ 0.000000] efi: UEFI not found.
5747 00:23:39.695231 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5748 00:23:39.705235 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5749 00:23:39.711587 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5750 00:23:39.714951 [ 0.000000] printk: bootconsole [mtk8250] enabled
5751 00:23:39.724454 [ 0.000000] NUMA: No NUMA configuration found
5752 00:23:39.730938 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5753 00:23:39.737628 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5754 00:23:39.740797 [ 0.000000] Zone ranges:
5755 00:23:39.744086 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5756 00:23:39.747446 [ 0.000000] DMA32 empty
5757 00:23:39.753848 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5758 00:23:39.757052 [ 0.000000] Movable zone start for each node
5759 00:23:39.760343 [ 0.000000] Early memory node ranges
5760 00:23:39.766709 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5761 00:23:39.773677 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5762 00:23:39.779980 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5763 00:23:39.786654 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5764 00:23:39.792983 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5765 00:23:39.799437 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5766 00:23:39.816900 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5767 00:23:39.823274 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5768 00:23:39.829699 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5769 00:23:39.833171 [ 0.000000] psci: probing for conduit method from DT.
5770 00:23:39.839707 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5771 00:23:39.842947 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5772 00:23:39.849519 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5773 00:23:39.852815 [ 0.000000] psci: SMC Calling Convention v1.1
5774 00:23:39.859158 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5775 00:23:39.862480 [ 0.000000] Detected VIPT I-cache on CPU0
5776 00:23:39.868967 [ 0.000000] CPU features: detected: GIC system register CPU interface
5777 00:23:39.875681 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5778 00:23:39.882385 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5779 00:23:39.888759 [ 0.000000] CPU features: detected: ARM erratum 845719
5780 00:23:39.892033 [ 0.000000] alternatives: applying boot alternatives
5781 00:23:39.898536 [ 0.000000] Fallback order for Node 0: 0
5782 00:23:39.904873 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5783 00:23:39.908490 [ 0.000000] Policy zone: Normal
5784 00:23:39.924664 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5785 00:23:39.938001 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5786 00:23:39.947744 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5787 00:23:39.953971 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5788 00:23:39.960495 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5789 00:23:39.967035 <6>[ 0.000000] software IO TLB: area num 8.
5790 00:23:39.991503 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5791 00:23:40.049135 <6>[ 0.000000] Memory: 3894192K/4191232K available (18112K kernel code, 4120K rwdata, 22648K rodata, 8512K init, 616K bss, 264272K reserved, 32768K cma-reserved)
5792 00:23:40.055815 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5793 00:23:40.062449 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5794 00:23:40.065601 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5795 00:23:40.072179 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5796 00:23:40.078752 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5797 00:23:40.085042 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5798 00:23:40.091823 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5799 00:23:40.098168 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5800 00:23:40.104540 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5801 00:23:40.114726 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5802 00:23:40.121191 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5803 00:23:40.124294 <6>[ 0.000000] GICv3: 640 SPIs implemented
5804 00:23:40.127574 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5805 00:23:40.134155 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5806 00:23:40.137337 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5807 00:23:40.143864 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5808 00:23:40.156890 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5809 00:23:40.170125 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5810 00:23:40.176338 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5811 00:23:40.186632 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5812 00:23:40.199711 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5813 00:23:40.206217 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5814 00:23:40.213358 <6>[ 0.009478] Console: colour dummy device 80x25
5815 00:23:40.216305 <6>[ 0.014520] printk: console [tty1] enabled
5816 00:23:40.229674 <6>[ 0.018904] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5817 00:23:40.232958 <6>[ 0.029368] pid_max: default: 32768 minimum: 301
5818 00:23:40.239354 <6>[ 0.034250] LSM: Security Framework initializing
5819 00:23:40.246037 <6>[ 0.039166] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5820 00:23:40.252350 <6>[ 0.046790] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5821 00:23:40.259374 <4>[ 0.055661] cacheinfo: Unable to detect cache hierarchy for CPU 0
5822 00:23:40.269220 <6>[ 0.062291] cblist_init_generic: Setting adjustable number of callback queues.
5823 00:23:40.275625 <6>[ 0.069738] cblist_init_generic: Setting shift to 3 and lim to 1.
5824 00:23:40.282445 <6>[ 0.076090] cblist_init_generic: Setting adjustable number of callback queues.
5825 00:23:40.288911 <6>[ 0.083535] cblist_init_generic: Setting shift to 3 and lim to 1.
5826 00:23:40.295177 <6>[ 0.089935] rcu: Hierarchical SRCU implementation.
5827 00:23:40.298366 <6>[ 0.094962] rcu: Max phase no-delay instances is 1000.
5828 00:23:40.306444 <6>[ 0.102892] EFI services will not be available.
5829 00:23:40.309690 <6>[ 0.107842] smp: Bringing up secondary CPUs ...
5830 00:23:40.320647 <6>[ 0.113153] Detected VIPT I-cache on CPU1
5831 00:23:40.326949 <4>[ 0.113199] cacheinfo: Unable to detect cache hierarchy for CPU 1
5832 00:23:40.333547 <6>[ 0.113207] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5833 00:23:40.339947 <6>[ 0.113238] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5834 00:23:40.343265 <6>[ 0.113723] Detected VIPT I-cache on CPU2
5835 00:23:40.349841 <4>[ 0.113756] cacheinfo: Unable to detect cache hierarchy for CPU 2
5836 00:23:40.356571 <6>[ 0.113762] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5837 00:23:40.363100 <6>[ 0.113774] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5838 00:23:40.369333 <6>[ 0.114218] Detected VIPT I-cache on CPU3
5839 00:23:40.375961 <4>[ 0.114248] cacheinfo: Unable to detect cache hierarchy for CPU 3
5840 00:23:40.382556 <6>[ 0.114253] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5841 00:23:40.389240 <6>[ 0.114264] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5842 00:23:40.392280 <6>[ 0.114839] CPU features: detected: Spectre-v2
5843 00:23:40.398675 <6>[ 0.114849] CPU features: detected: Spectre-BHB
5844 00:23:40.401866 <6>[ 0.114853] CPU features: detected: ARM erratum 858921
5845 00:23:40.408521 <6>[ 0.114859] Detected VIPT I-cache on CPU4
5846 00:23:40.414970 <4>[ 0.114906] cacheinfo: Unable to detect cache hierarchy for CPU 4
5847 00:23:40.421664 <6>[ 0.114913] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5848 00:23:40.428360 <6>[ 0.114922] arch_timer: Enabling local workaround for ARM erratum 858921
5849 00:23:40.434615 <6>[ 0.114932] arch_timer: CPU4: Trapping CNTVCT access
5850 00:23:40.441500 <6>[ 0.114940] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5851 00:23:40.444446 <6>[ 0.115426] Detected VIPT I-cache on CPU5
5852 00:23:40.451046 <4>[ 0.115468] cacheinfo: Unable to detect cache hierarchy for CPU 5
5853 00:23:40.457632 <6>[ 0.115473] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5854 00:23:40.464099 <6>[ 0.115480] arch_timer: Enabling local workaround for ARM erratum 858921
5855 00:23:40.470693 <6>[ 0.115486] arch_timer: CPU5: Trapping CNTVCT access
5856 00:23:40.477287 <6>[ 0.115491] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5857 00:23:40.480543 <6>[ 0.116027] Detected VIPT I-cache on CPU6
5858 00:23:40.486810 <4>[ 0.116073] cacheinfo: Unable to detect cache hierarchy for CPU 6
5859 00:23:40.493237 <6>[ 0.116079] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5860 00:23:40.500079 <6>[ 0.116086] arch_timer: Enabling local workaround for ARM erratum 858921
5861 00:23:40.506372 <6>[ 0.116092] arch_timer: CPU6: Trapping CNTVCT access
5862 00:23:40.513087 <6>[ 0.116098] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5863 00:23:40.516352 <6>[ 0.116626] Detected VIPT I-cache on CPU7
5864 00:23:40.522894 <4>[ 0.116669] cacheinfo: Unable to detect cache hierarchy for CPU 7
5865 00:23:40.532611 <6>[ 0.116675] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5866 00:23:40.539330 <6>[ 0.116682] arch_timer: Enabling local workaround for ARM erratum 858921
5867 00:23:40.542645 <6>[ 0.116688] arch_timer: CPU7: Trapping CNTVCT access
5868 00:23:40.548912 <6>[ 0.116694] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5869 00:23:40.555578 <6>[ 0.116741] smp: Brought up 1 node, 8 CPUs
5870 00:23:40.558761 <6>[ 0.355621] SMP: Total of 8 processors activated.
5871 00:23:40.565519 <6>[ 0.360558] CPU features: detected: 32-bit EL0 Support
5872 00:23:40.568953 <6>[ 0.365929] CPU features: detected: 32-bit EL1 Support
5873 00:23:40.575239 <6>[ 0.371295] CPU features: detected: CRC32 instructions
5874 00:23:40.578516 <6>[ 0.376722] CPU: All CPU(s) started at EL2
5875 00:23:40.585112 <6>[ 0.381060] alternatives: applying system-wide alternatives
5876 00:23:40.592786 <6>[ 0.389248] devtmpfs: initialized
5877 00:23:40.608294 <6>[ 0.398181] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5878 00:23:40.614919 <6>[ 0.408130] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5879 00:23:40.621527 <6>[ 0.415860] pinctrl core: initialized pinctrl subsystem
5880 00:23:40.624757 <6>[ 0.422963] DMI not present or invalid.
5881 00:23:40.631168 <6>[ 0.427332] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5882 00:23:40.641296 <6>[ 0.434223] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5883 00:23:40.647663 <6>[ 0.441735] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5884 00:23:40.657749 <6>[ 0.449906] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5885 00:23:40.661036 <6>[ 0.458052] audit: initializing netlink subsys (disabled)
5886 00:23:40.670900 <5>[ 0.463733] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5887 00:23:40.677227 <6>[ 0.464690] thermal_sys: Registered thermal governor 'step_wise'
5888 00:23:40.683726 <6>[ 0.471685] thermal_sys: Registered thermal governor 'power_allocator'
5889 00:23:40.687153 <6>[ 0.477931] cpuidle: using governor menu
5890 00:23:40.693754 <6>[ 0.488877] NET: Registered PF_QIPCRTR protocol family
5891 00:23:40.700170 <6>[ 0.494356] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5892 00:23:40.706813 <6>[ 0.501448] ASID allocator initialised with 32768 entries
5893 00:23:40.709869 <6>[ 0.508232] Serial: AMBA PL011 UART driver
5894 00:23:40.722147 <4>[ 0.518607] Trying to register duplicate clock ID: 113
5895 00:23:40.781456 <6>[ 0.574627] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5896 00:23:40.795957 <6>[ 0.588951] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5897 00:23:40.799251 <6>[ 0.598689] KASLR enabled
5898 00:23:40.813678 <6>[ 0.606698] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5899 00:23:40.820270 <6>[ 0.613702] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5900 00:23:40.826787 <6>[ 0.620181] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5901 00:23:40.833397 <6>[ 0.627172] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5902 00:23:40.839716 <6>[ 0.633645] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5903 00:23:40.846352 <6>[ 0.640636] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5904 00:23:40.852983 <6>[ 0.647110] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5905 00:23:40.859409 <6>[ 0.654100] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5906 00:23:40.866155 <6>[ 0.661668] ACPI: Interpreter disabled.
5907 00:23:40.873351 <6>[ 0.669627] iommu: Default domain type: Translated
5908 00:23:40.879974 <6>[ 0.674734] iommu: DMA domain TLB invalidation policy: strict mode
5909 00:23:40.883329 <5>[ 0.681366] SCSI subsystem initialized
5910 00:23:40.889552 <6>[ 0.685788] usbcore: registered new interface driver usbfs
5911 00:23:40.896261 <6>[ 0.691515] usbcore: registered new interface driver hub
5912 00:23:40.902511 <6>[ 0.697057] usbcore: registered new device driver usb
5913 00:23:40.906158 <6>[ 0.703357] pps_core: LinuxPPS API ver. 1 registered
5914 00:23:40.915767 <6>[ 0.708542] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5915 00:23:40.922224 <6>[ 0.717866] PTP clock support registered
5916 00:23:40.925414 <6>[ 0.722118] EDAC MC: Ver: 3.0.0
5917 00:23:40.928534 <6>[ 0.727747] FPGA manager framework
5918 00:23:40.935177 <6>[ 0.731429] Advanced Linux Sound Architecture Driver Initialized.
5919 00:23:40.938637 <6>[ 0.738181] vgaarb: loaded
5920 00:23:40.945245 <6>[ 0.741296] clocksource: Switched to clocksource arch_sys_counter
5921 00:23:40.951815 <5>[ 0.747726] VFS: Disk quotas dquot_6.6.0
5922 00:23:40.958072 <6>[ 0.751901] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5923 00:23:40.961279 <6>[ 0.759078] pnp: PnP ACPI: disabled
5924 00:23:40.969770 <6>[ 0.765975] NET: Registered PF_INET protocol family
5925 00:23:40.976247 <6>[ 0.771209] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5926 00:23:40.988314 <6>[ 0.781124] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5927 00:23:40.998004 <6>[ 0.789879] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5928 00:23:41.004577 <6>[ 0.797829] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5929 00:23:41.011265 <6>[ 0.806060] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5930 00:23:41.021054 <6>[ 0.814159] TCP: Hash tables configured (established 32768 bind 32768)
5931 00:23:41.027833 <6>[ 0.820989] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5932 00:23:41.034369 <6>[ 0.827964] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5933 00:23:41.040703 <6>[ 0.835444] NET: Registered PF_UNIX/PF_LOCAL protocol family
5934 00:23:41.047364 <6>[ 0.841574] RPC: Registered named UNIX socket transport module.
5935 00:23:41.050299 <6>[ 0.847721] RPC: Registered udp transport module.
5936 00:23:41.056990 <6>[ 0.852646] RPC: Registered tcp transport module.
5937 00:23:41.063793 <6>[ 0.857569] RPC: Registered tcp NFSv4.1 backchannel transport module.
5938 00:23:41.066695 <6>[ 0.864224] PCI: CLS 0 bytes, default 64
5939 00:23:41.070015 <6>[ 0.868513] Unpacking initramfs...
5940 00:23:41.088980 <6>[ 0.881869] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5941 00:23:41.098727 <6>[ 0.890580] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5942 00:23:41.102086 <6>[ 0.899483] kvm [1]: IPA Size Limit: 40 bits
5943 00:23:41.109493 <6>[ 0.905865] kvm [1]: vgic-v2@c420000
5944 00:23:41.116261 <6>[ 0.909700] kvm [1]: GIC system register CPU interface enabled
5945 00:23:41.119262 <6>[ 0.915888] kvm [1]: vgic interrupt IRQ18
5946 00:23:41.125844 <6>[ 0.920260] kvm [1]: Hyp mode initialized successfully
5947 00:23:41.129254 <5>[ 0.926619] Initialise system trusted keyrings
5948 00:23:41.135431 <6>[ 0.931405] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5949 00:23:41.145183 <6>[ 0.941396] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5950 00:23:41.151601 <5>[ 0.947847] NFS: Registering the id_resolver key type
5951 00:23:41.154852 <5>[ 0.953174] Key type id_resolver registered
5952 00:23:41.161469 <5>[ 0.957591] Key type id_legacy registered
5953 00:23:41.167789 <6>[ 0.961895] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5954 00:23:41.174354 <6>[ 0.968818] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5955 00:23:41.180687 <6>[ 0.976563] 9p: Installing v9fs 9p2000 file system support
5956 00:23:41.208676 <5>[ 1.005091] Key type asymmetric registered
5957 00:23:41.211981 <5>[ 1.009435] Asymmetric key parser 'x509' registered
5958 00:23:41.222005 <6>[ 1.014584] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5959 00:23:41.225267 <6>[ 1.022195] io scheduler mq-deadline registered
5960 00:23:41.228573 <6>[ 1.026963] io scheduler kyber registered
5961 00:23:41.251542 <6>[ 1.047674] EINJ: ACPI disabled.
5962 00:23:41.258123 <4>[ 1.051446] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5963 00:23:41.296075 <6>[ 1.092262] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5964 00:23:41.304361 <6>[ 1.100747] printk: console [ttyS0] disabled
5965 00:23:41.332477 <6>[ 1.125406] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5966 00:23:41.339181 <6>[ 1.134891] printk: console [ttyS0] enabled
5967 00:23:41.342303 <6>[ 1.134891] printk: console [ttyS0] enabled
5968 00:23:41.348603 <6>[ 1.143807] printk: bootconsole [mtk8250] disabled
5969 00:23:41.351861 <6>[ 1.143807] printk: bootconsole [mtk8250] disabled
5970 00:23:41.361908 <3>[ 1.154336] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5971 00:23:41.368054 <3>[ 1.162720] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5972 00:23:41.398298 <6>[ 1.191121] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5973 00:23:41.404578 <6>[ 1.200771] serial serial0: tty port ttyS1 registered
5974 00:23:41.411212 <6>[ 1.207344] SuperH (H)SCI(F) driver initialized
5975 00:23:41.414610 <6>[ 1.212829] msm_serial: driver initialized
5976 00:23:41.430331 <6>[ 1.223197] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5977 00:23:41.439922 <6>[ 1.231798] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5978 00:23:41.446672 <6>[ 1.240374] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5979 00:23:41.456354 <6>[ 1.248949] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5980 00:23:41.466090 <6>[ 1.257619] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5981 00:23:41.472745 <6>[ 1.266289] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5982 00:23:41.482142 <6>[ 1.275031] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5983 00:23:41.492095 <6>[ 1.283774] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5984 00:23:41.498678 <6>[ 1.292342] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5985 00:23:41.508417 <6>[ 1.301135] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5986 00:23:41.517245 <4>[ 1.313536] cacheinfo: Unable to detect cache hierarchy for CPU 0
5987 00:23:41.526420 <6>[ 1.322890] loop: module loaded
5988 00:23:41.538364 <6>[ 1.334766] vsim1: Bringing 1800000uV into 2700000-2700000uV
5989 00:23:41.556615 <6>[ 1.352695] megasas: 07.719.03.00-rc1
5990 00:23:41.565334 <6>[ 1.361461] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5991 00:23:41.575770 <6>[ 1.368662] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5992 00:23:41.589203 <6>[ 1.385213] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5993 00:23:41.649001 <6>[ 1.438839] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-a
5994 00:23:41.775986 <6>[ 1.572101] Freeing initrd memory: 20880K
5995 00:23:41.794651 <4>[ 1.587809] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5996 00:23:41.801223 <4>[ 1.597042] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.94-cip23 #1
5997 00:23:41.808060 <4>[ 1.603741] Hardware name: Google juniper sku16 board (DT)
5998 00:23:41.811407 <4>[ 1.609480] Call trace:
5999 00:23:41.814620 <4>[ 1.612181] dump_backtrace.part.0+0xe0/0xf0
6000 00:23:41.817651 <4>[ 1.616716] show_stack+0x18/0x30
6001 00:23:41.824087 <4>[ 1.620289] dump_stack_lvl+0x68/0x84
6002 00:23:41.827697 <4>[ 1.624211] dump_stack+0x18/0x34
6003 00:23:41.830803 <4>[ 1.627781] sysfs_warn_dup+0x64/0x80
6004 00:23:41.834152 <4>[ 1.631703] sysfs_do_create_link_sd+0xf0/0x100
6005 00:23:41.840609 <4>[ 1.636488] sysfs_create_link+0x20/0x40
6006 00:23:41.843924 <4>[ 1.640665] bus_add_device+0x68/0x10c
6007 00:23:41.847112 <4>[ 1.644671] device_add+0x364/0x7cc
6008 00:23:41.850721 <4>[ 1.648414] of_device_add+0x44/0x60
6009 00:23:41.856995 <4>[ 1.652248] of_platform_device_create_pdata+0x90/0x120
6010 00:23:41.860474 <4>[ 1.657730] of_platform_bus_create+0x170/0x370
6011 00:23:41.866926 <4>[ 1.662514] of_platform_populate+0x50/0xfc
6012 00:23:41.870192 <4>[ 1.666951] parse_mtd_partitions+0x1dc/0x510
6013 00:23:41.876757 <4>[ 1.671565] mtd_device_parse_register+0xf0/0x2e4
6014 00:23:41.879904 <4>[ 1.676523] spi_nor_probe+0x21c/0x2f0
6015 00:23:41.883300 <4>[ 1.680529] spi_mem_probe+0x6c/0xb0
6016 00:23:41.886523 <4>[ 1.684361] spi_probe+0x84/0xe4
6017 00:23:41.889793 <4>[ 1.687843] really_probe+0xbc/0x2e0
6018 00:23:41.896389 <4>[ 1.691673] __driver_probe_device+0x78/0x11c
6019 00:23:41.899732 <4>[ 1.696285] driver_probe_device+0xd8/0x160
6020 00:23:41.902951 <4>[ 1.700723] __device_attach_driver+0xb8/0x134
6021 00:23:41.909344 <4>[ 1.705422] bus_for_each_drv+0x78/0xd0
6022 00:23:41.912693 <4>[ 1.709512] __device_attach+0xa8/0x1c0
6023 00:23:41.915883 <4>[ 1.713603] device_initial_probe+0x14/0x20
6024 00:23:41.922739 <4>[ 1.718041] bus_probe_device+0x9c/0xa4
6025 00:23:41.925914 <4>[ 1.722131] device_add+0x3d0/0x7cc
6026 00:23:41.928926 <4>[ 1.725874] __spi_add_device+0x78/0x120
6027 00:23:41.932177 <4>[ 1.730052] spi_add_device+0x40/0x7c
6028 00:23:41.938938 <4>[ 1.733970] spi_register_controller+0x610/0xad0
6029 00:23:41.942052 <4>[ 1.738842] devm_spi_register_controller+0x4c/0xa4
6030 00:23:41.945228 <4>[ 1.743976] mtk_spi_probe+0x3f8/0x650
6031 00:23:41.952230 <4>[ 1.747980] platform_probe+0x68/0xe0
6032 00:23:41.955167 <4>[ 1.751899] really_probe+0xbc/0x2e0
6033 00:23:41.958562 <4>[ 1.755729] __driver_probe_device+0x78/0x11c
6034 00:23:41.964837 <4>[ 1.760340] driver_probe_device+0xd8/0x160
6035 00:23:41.968373 <4>[ 1.764778] __driver_attach+0x94/0x19c
6036 00:23:41.971630 <4>[ 1.768869] bus_for_each_dev+0x70/0xd0
6037 00:23:41.974938 <4>[ 1.772958] driver_attach+0x24/0x30
6038 00:23:41.981437 <4>[ 1.776788] bus_add_driver+0x154/0x20c
6039 00:23:41.984836 <4>[ 1.780878] driver_register+0x78/0x130
6040 00:23:41.987693 <4>[ 1.784969] __platform_driver_register+0x28/0x34
6041 00:23:41.995857 <4>[ 1.789929] mtk_spi_driver_init+0x1c/0x28
6042 00:23:41.997770 <4>[ 1.794283] do_one_initcall+0x50/0x1d0
6043 00:23:42.001086 <4>[ 1.798373] kernel_init_freeable+0x21c/0x288
6044 00:23:42.004646 <4>[ 1.802986] kernel_init+0x24/0x12c
6045 00:23:42.010785 <4>[ 1.806732] ret_from_fork+0x10/0x20
6046 00:23:42.019372 <6>[ 1.815616] tun: Universal TUN/TAP device driver, 1.6
6047 00:23:42.022650 <6>[ 1.821920] thunder_xcv, ver 1.0
6048 00:23:42.029421 <6>[ 1.825432] thunder_bgx, ver 1.0
6049 00:23:42.029623 <6>[ 1.828928] nicpf, ver 1.0
6050 00:23:42.040510 <6>[ 1.833287] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6051 00:23:42.043817 <6>[ 1.840776] hns3: Copyright (c) 2017 Huawei Corporation.
6052 00:23:42.050789 <6>[ 1.846377] hclge is initializing
6053 00:23:42.053505 <6>[ 1.849962] e1000: Intel(R) PRO/1000 Network Driver
6054 00:23:42.060240 <6>[ 1.855097] e1000: Copyright (c) 1999-2006 Intel Corporation.
6055 00:23:42.066630 <6>[ 1.861119] e1000e: Intel(R) PRO/1000 Network Driver
6056 00:23:42.069770 <6>[ 1.866340] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6057 00:23:42.076478 <6>[ 1.872535] igb: Intel(R) Gigabit Ethernet Network Driver
6058 00:23:42.083130 <6>[ 1.878190] igb: Copyright (c) 2007-2014 Intel Corporation.
6059 00:23:42.089388 <6>[ 1.884033] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6060 00:23:42.095948 <6>[ 1.890557] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6061 00:23:42.099119 <6>[ 1.897104] sky2: driver version 1.30
6062 00:23:42.106035 <6>[ 1.902359] usbcore: registered new device driver r8152-cfgselector
6063 00:23:42.112557 <6>[ 1.908899] usbcore: registered new interface driver r8152
6064 00:23:42.119319 <6>[ 1.914731] VFIO - User Level meta-driver version: 0.3
6065 00:23:42.126493 <6>[ 1.922549] mtu3 11201000.usb: uwk - reg:0x420, version:101
6066 00:23:42.132770 <4>[ 1.928425] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6067 00:23:42.139356 <6>[ 1.935699] mtu3 11201000.usb: dr_mode: 1, drd: auto
6068 00:23:42.145981 <6>[ 1.940925] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6069 00:23:42.149451 <6>[ 1.947110] mtu3 11201000.usb: usb3-drd: 0
6070 00:23:42.159709 <6>[ 1.952655] mtu3 11201000.usb: xHCI platform device register success...
6071 00:23:42.166248 <4>[ 1.961282] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6072 00:23:42.172918 <6>[ 1.969227] xhci-mtk 11200000.usb: xHCI Host Controller
6073 00:23:42.182836 <6>[ 1.974731] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6074 00:23:42.186267 <6>[ 1.982453] xhci-mtk 11200000.usb: USB3 root hub has no ports
6075 00:23:42.195997 <6>[ 1.988461] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6076 00:23:42.202672 <6>[ 1.997886] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6077 00:23:42.209146 <6>[ 2.003961] xhci-mtk 11200000.usb: xHCI Host Controller
6078 00:23:42.215717 <6>[ 2.009449] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6079 00:23:42.222265 <6>[ 2.017105] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6080 00:23:42.225566 <6>[ 2.023925] hub 1-0:1.0: USB hub found
6081 00:23:42.232169 <6>[ 2.027955] hub 1-0:1.0: 1 port detected
6082 00:23:42.242113 <6>[ 2.033300] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6083 00:23:42.245275 <6>[ 2.041916] hub 2-0:1.0: USB hub found
6084 00:23:42.251631 <3>[ 2.045943] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6085 00:23:42.258309 <6>[ 2.053830] usbcore: registered new interface driver usb-storage
6086 00:23:42.264759 <6>[ 2.060418] usbcore: registered new device driver onboard-usb-hub
6087 00:23:42.276329 <4>[ 2.069411] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6088 00:23:42.285463 <6>[ 2.081637] mt6397-rtc mt6358-rtc: registered as rtc0
6089 00:23:42.295309 <6>[ 2.087119] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-21T00:23:41 UTC (1718929421)
6090 00:23:42.301758 <6>[ 2.097015] i2c_dev: i2c /dev entries driver
6091 00:23:42.311742 <6>[ 2.103400] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6092 00:23:42.318322 <6>[ 2.111782] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6093 00:23:42.325061 <6>[ 2.120687] i2c 4-0058: Fixed dependency cycle(s) with /panel
6094 00:23:42.331633 <6>[ 2.126760] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6095 00:23:42.350102 <6>[ 2.146311] cpu cpu0: EM: created perf domain
6096 00:23:42.363308 <6>[ 2.151805] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6097 00:23:42.366289 <6>[ 2.163105] cpu cpu4: EM: created perf domain
6098 00:23:42.373901 <6>[ 2.170181] sdhci: Secure Digital Host Controller Interface driver
6099 00:23:42.380413 <6>[ 2.176636] sdhci: Copyright(c) Pierre Ossman
6100 00:23:42.387151 <6>[ 2.182063] Synopsys Designware Multimedia Card Interface Driver
6101 00:23:42.393799 <6>[ 2.182476] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6102 00:23:42.400431 <6>[ 2.189146] sdhci-pltfm: SDHCI platform and OF driver helper
6103 00:23:42.406877 <6>[ 2.202766] ledtrig-cpu: registered to indicate activity on CPUs
6104 00:23:42.414501 <6>[ 2.210541] usbcore: registered new interface driver usbhid
6105 00:23:42.420674 <6>[ 2.216385] usbhid: USB HID core driver
6106 00:23:42.427895 <6>[ 2.220650] spi_master spi2: will run message pump with realtime priority
6107 00:23:42.435054 <4>[ 2.220651] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6108 00:23:42.441614 <4>[ 2.220705] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6109 00:23:42.454442 <6>[ 2.241558] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6110 00:23:42.471689 <6>[ 2.257941] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6111 00:23:42.478217 <4>[ 2.265425] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6112 00:23:42.485035 <6>[ 2.279144] cros-ec-spi spi2.0: Chrome EC device registered
6113 00:23:42.491468 <4>[ 2.286418] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6114 00:23:42.504367 <4>[ 2.297481] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6115 00:23:42.511065 <4>[ 2.306362] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6116 00:23:42.524196 <6>[ 2.317054] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6117 00:23:42.545633 <6>[ 2.341890] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6118 00:23:42.553232 <6>[ 2.349309] mmc0: new HS400 MMC card at address 0001
6119 00:23:42.559871 <6>[ 2.356222] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6120 00:23:42.568939 <6>[ 2.365087] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6121 00:23:42.576027 <6>[ 2.372241] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6122 00:23:42.585859 <6>[ 2.373796] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6123 00:23:42.592495 <6>[ 2.387003] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6124 00:23:42.602222 <6>[ 2.390519] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6125 00:23:42.615619 <6>[ 2.391466] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6126 00:23:42.618885 <6>[ 2.393119] NET: Registered PF_PACKET protocol family
6127 00:23:42.625064 <6>[ 2.420713] 9pnet: Installing 9P2000 support
6128 00:23:42.634849 <6>[ 2.421063] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6129 00:23:42.641669 <6>[ 2.421583] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6130 00:23:42.644792 <5>[ 2.425286] Key type dns_resolver registered
6131 00:23:42.651180 <6>[ 2.446978] registered taskstats version 1
6132 00:23:42.657969 <6>[ 2.449309] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6133 00:23:42.660942 <5>[ 2.451342] Loading compiled-in X.509 certificates
6134 00:23:42.707159 <3>[ 2.500033] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6135 00:23:42.739678 <6>[ 2.529348] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6136 00:23:42.750990 <6>[ 2.543704] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6137 00:23:42.760373 <6>[ 2.552276] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6138 00:23:42.767196 <6>[ 2.560981] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6139 00:23:42.776865 <6>[ 2.569505] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6140 00:23:42.786842 <6>[ 2.578024] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6141 00:23:42.793020 <6>[ 2.586542] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6142 00:23:42.802658 <6>[ 2.595060] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6143 00:23:42.809227 <6>[ 2.604420] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6144 00:23:42.815924 <6>[ 2.611968] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6145 00:23:42.822344 <6>[ 2.613823] hub 1-1:1.0: USB hub found
6146 00:23:42.828579 <6>[ 2.619349] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6147 00:23:42.831979 <6>[ 2.623123] hub 1-1:1.0: 3 ports detected
6148 00:23:42.838557 <6>[ 2.629842] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6149 00:23:42.844978 <6>[ 2.640815] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6150 00:23:42.853042 <6>[ 2.649338] panfrost 13040000.gpu: clock rate = 511999970
6151 00:23:42.863006 <6>[ 2.655027] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6152 00:23:42.872673 <6>[ 2.665284] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6153 00:23:42.879082 <6>[ 2.673297] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6154 00:23:42.892071 <6>[ 2.681728] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6155 00:23:42.898741 <6>[ 2.693812] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6156 00:23:42.911872 <6>[ 2.704891] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6157 00:23:42.921936 <6>[ 2.713843] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6158 00:23:42.931561 <6>[ 2.722994] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6159 00:23:42.941299 <6>[ 2.732126] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6160 00:23:42.951111 <6>[ 2.741254] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6161 00:23:42.957427 <6>[ 2.750556] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6162 00:23:42.967333 <6>[ 2.759857] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6163 00:23:42.977101 <6>[ 2.769330] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6164 00:23:42.986978 <6>[ 2.778806] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6165 00:23:42.996582 <6>[ 2.787932] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6166 00:23:43.067217 <6>[ 2.860183] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6167 00:23:43.077143 <6>[ 2.869116] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6168 00:23:43.088059 <6>[ 2.880965] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6169 00:23:43.144490 <6>[ 2.937450] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6170 00:23:43.789963 <6>[ 3.121674] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6171 00:23:43.799717 <4>[ 3.225594] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6172 00:23:43.806589 <4>[ 3.225608] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6173 00:23:43.813169 <6>[ 3.225893] r8152 1-1.2:1.0 eth0: v1.12.13
6174 00:23:43.819727 <6>[ 3.305312] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6175 00:23:43.825891 <6>[ 3.565888] Console: switching to colour frame buffer device 170x48
6176 00:23:43.835748 <6>[ 3.626547] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6177 00:23:43.854947 <6>[ 3.644163] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6178 00:23:43.872341 <6>[ 3.661688] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6179 00:23:43.882390 <6>[ 3.674209] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6180 00:23:43.888970 <6>[ 3.682433] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6181 00:23:43.901979 <6>[ 3.688996] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6182 00:23:43.917333 <6>[ 3.707146] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6183 00:23:45.080737 <6>[ 4.876868] r8152 1-1.2:1.0 eth0: carrier on
6184 00:23:47.545385 <5>[ 4.901334] Sending DHCP requests .., OK
6185 00:23:47.552196 <6>[ 7.345797] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.22
6186 00:23:47.555378 <6>[ 7.354234] IP-Config: Complete:
6187 00:23:47.568399 <6>[ 7.357801] device=eth0, hwaddr=00:e0:4c:78:85:cb, ipaddr=192.168.201.22, mask=255.255.255.0, gw=192.168.201.1
6188 00:23:47.577833 <6>[ 7.368699] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2, domain=lava-rack, nis-domain=(none)
6189 00:23:47.590188 <6>[ 7.382973] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6190 00:23:47.598611 <6>[ 7.382984] nameserver0=192.168.201.1
6191 00:23:47.606558 <6>[ 7.402727] clk: Disabling unused clocks
6192 00:23:47.611512 <6>[ 7.410676] ALSA device list:
6193 00:23:47.620427 <6>[ 7.416719] No soundcards found.
6194 00:23:47.629489 <6>[ 7.425746] Freeing unused kernel memory: 8512K
6195 00:23:47.636543 <6>[ 7.432875] Run /init as init process
6196 00:23:47.674812 Starting syslogd: OK
6197 00:23:47.677962 Starting klogd: OK
6198 00:23:47.686935 Running sysctl: OK
6199 00:23:47.696351 Populating /dev using udev: <30>[ 7.491564] udevd[205]: starting version 3.2.9
6200 00:23:47.705353 <27>[ 7.501494] udevd[205]: specified user 'tss' unknown
6201 00:23:47.712936 <27>[ 7.508986] udevd[205]: specified group 'tss' unknown
6202 00:23:47.721753 <30>[ 7.517924] udevd[206]: starting eudev-3.2.9
6203 00:23:47.755978 <27>[ 7.552214] udevd[206]: specified user 'tss' unknown
6204 00:23:47.762687 <27>[ 7.558523] udevd[206]: specified group 'tss' unknown
6205 00:23:47.876855 <6>[ 7.669947] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6206 00:23:47.910591 <4>[ 7.700178] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6207 00:23:47.926158 <3>[ 7.722159] mtk-scp 10500000.scp: invalid resource
6208 00:23:47.935807 <6>[ 7.725264] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6209 00:23:47.942199 <6>[ 7.727386] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6210 00:23:47.956925 <6>[ 7.745007] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6211 00:23:47.963510 <4>[ 7.751493] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6212 00:23:47.976522 <3>[ 7.759098] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6213 00:23:47.983061 <4>[ 7.765557] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6214 00:23:47.989601 <6>[ 7.766039] remoteproc remoteproc0: scp is available
6215 00:23:47.996329 <4>[ 7.766106] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6216 00:23:48.003868 <6>[ 7.766113] remoteproc remoteproc0: powering up scp
6217 00:23:48.014260 <4>[ 7.766126] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6218 00:23:48.021142 <3>[ 7.766129] remoteproc remoteproc0: request_firmware failed: -2
6219 00:23:48.030842 <3>[ 7.766367] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6220 00:23:48.040911 <3>[ 7.766373] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6221 00:23:48.050590 <3>[ 7.766376] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6222 00:23:48.061789 <3>[ 7.766380] elan_i2c 2-0015: Error applying setting, reverse things back
6223 00:23:48.068532 <6>[ 7.783318] mc: Linux media interface: v0.10
6224 00:23:48.078163 <3>[ 7.786117] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6225 00:23:48.084677 <6>[ 7.818964] videodev: Linux video capture interface: v2.00
6226 00:23:48.094970 <3>[ 7.823532] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6227 00:23:48.105484 <6>[ 7.825382] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6228 00:23:48.129407 <6>[ 7.921982] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6229 00:23:48.139259 <3>[ 7.922357] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6230 00:23:48.145584 <6>[ 7.922589] cs_system_cfg: CoreSight Configuration manager initialised
6231 00:23:48.155296 <6>[ 7.940561] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6232 00:23:48.162117 <3>[ 7.940817] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6233 00:23:48.171772 <5>[ 7.943098] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6234 00:23:48.178235 <6>[ 7.947817] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6235 00:23:48.188214 <3>[ 7.955585] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6236 00:23:48.194431 <6>[ 7.964283] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6237 00:23:48.201141 <5>[ 7.968542] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6238 00:23:48.210891 <5>[ 7.969030] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6239 00:23:48.220574 <4>[ 7.969109] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6240 00:23:48.223939 <6>[ 7.969120] cfg80211: failed to load regulatory.db
6241 00:23:48.233778 <3>[ 7.972340] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6242 00:23:48.236970 <6>[ 7.972794] Bluetooth: Core ver 2.22
6243 00:23:48.243567 <6>[ 7.973513] NET: Registered PF_BLUETOOTH protocol family
6244 00:23:48.250303 <6>[ 7.973519] Bluetooth: HCI device and connection manager initialized
6245 00:23:48.256439 <6>[ 7.973536] Bluetooth: HCI socket layer initialized
6246 00:23:48.259797 <6>[ 7.973542] Bluetooth: L2CAP socket layer initialized
6247 00:23:48.266732 <6>[ 7.973555] Bluetooth: SCO socket layer initialized
6248 00:23:48.276385 <6>[ 7.980264] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6249 00:23:48.283920 <3>[ 7.988604] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6250 00:23:48.293389 <6>[ 7.996649] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6251 00:23:48.299936 <6>[ 8.002093] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6252 00:23:48.306712 <3>[ 8.003324] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6253 00:23:48.316587 <3>[ 8.003607] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6254 00:23:48.323240 <6>[ 8.006122] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6255 00:23:48.329641 <6>[ 8.007356] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6256 00:23:48.339578 <6>[ 8.007626] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6257 00:23:48.345940 <6>[ 8.010327] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6258 00:23:48.356002 <6>[ 8.011832] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6259 00:23:48.369118 <3>[ 8.020907] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6260 00:23:48.382106 <6>[ 8.021452] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6261 00:23:48.388742 <6>[ 8.021556] usbcore: registered new interface driver uvcvideo
6262 00:23:48.395250 <6>[ 8.025809] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6263 00:23:48.402009 <6>[ 8.026033] Bluetooth: HCI UART driver ver 2.3
6264 00:23:48.405641 <6>[ 8.026063] Bluetooth: HCI UART protocol H4 registered
6265 00:23:48.412127 <6>[ 8.026109] Bluetooth: HCI UART protocol LL registered
6266 00:23:48.419347 <6>[ 8.026125] Bluetooth: HCI UART protocol Three-wire (H5) registered
6267 00:23:48.422779 <6>[ 8.026493] Bluetooth: HCI UART protocol Broadcom registered
6268 00:23:48.429294 <6>[ 8.026667] Bluetooth: HCI UART protocol QCA registered
6269 00:23:48.435615 <6>[ 8.026687] Bluetooth: HCI UART protocol Marvell registered
6270 00:23:48.442297 <6>[ 8.028254] Bluetooth: hci0: setting up ROME/QCA6390
6271 00:23:48.448623 <3>[ 8.035057] debugfs: File 'Playback' in directory 'dapm' already present!
6272 00:23:48.459972 <6>[ 8.043637] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6273 00:23:48.470740 <3>[ 8.044363] debugfs: File 'Capture' in directory 'dapm' already present!
6274 00:23:48.483912 <6>[ 8.079770] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6275 00:23:48.493849 <6>[ 8.087825] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6276 00:23:48.503823 <6>[ 8.094939] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6277 00:23:48.510654 <3>[ 8.101598] thermal_sys: Failed to find 'trips' node
6278 00:23:48.523682 <6>[ 8.109660] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6279 00:23:48.530777 <3>[ 8.117233] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6280 00:23:48.540885 <3>[ 8.117240] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6281 00:23:48.550582 <4>[ 8.117243] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6282 00:23:48.554108 <3>[ 8.118495] thermal_sys: Failed to find 'trips' node
6283 00:23:48.564577 <4>[ 8.194743] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6284 00:23:48.571146 <4>[ 8.194743] Fallback method does not support PEC.
6285 00:23:48.577742 <3>[ 8.196829] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6286 00:23:48.587305 <3>[ 8.203906] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6287 00:23:48.597305 <3>[ 8.206913] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6288 00:23:48.603947 <3>[ 8.218387] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6289 00:23:48.614061 <4>[ 8.218825] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6290 00:23:48.620276 <3>[ 8.240975] Bluetooth: hci0: Frame reassembly failed (-84)
6291 00:23:48.626860 <6>[ 8.273132] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6292 00:23:48.662154 done
6293 00:23:48.671661 Saving random seed: OK
6294 00:23:48.683095 Starting network: ip: RTNETLINK answers: File exists
6295 00:23:48.686261 FAIL
6296 00:23:48.719025 Starting dropbear sshd: <6>[ 8.514922] Bluetooth: hci0: QCA Product ID :0x00000008
6297 00:23:48.727627 <6>[ 8.523828] Bluetooth: hci0: QCA SOC Version :0x00000044
6298 00:23:48.734127 <6>[ 8.525076] NET: Registered PF_INET6 protocol family
6299 00:23:48.740855 <6>[ 8.529543] Bluetooth: hci0: QCA ROM Version :0x00000302
6300 00:23:48.744147 <6>[ 8.536084] Segment Routing with IPv6
6301 00:23:48.747180 <6>[ 8.541499] Bluetooth: hci0: QCA Patch Version:0x00000111
6302 00:23:48.753831 <6>[ 8.544354] In-situ OAM (IOAM) with IPv6
6303 00:23:48.760452 <6>[ 8.550040] Bluetooth: hci0: QCA controller version 0x00440302
6304 00:23:48.760541 OK
6305 00:23:48.787919 <6>[ 8.580681] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6306 00:23:48.797783 <4>[ 8.589820] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6307 00:23:48.808217 <3>[ 8.601062] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6308 00:23:48.815040 <3>[ 8.611123] Bluetooth: hci0: QCA Failed to download patch (-2)
6309 00:23:48.823561 /bin/sh: can't access tty; job control turned off
6310 00:23:48.823918 Matched prompt #10: / #
6312 00:23:48.824144 Setting prompt string to ['/ #']
6313 00:23:48.824243 end: 2.2.5.1 login-action (duration 00:00:09) [common]
6315 00:23:48.824452 end: 2.2.5 auto-login-action (duration 00:00:09) [common]
6316 00:23:48.824547 start: 2.2.6 expect-shell-connection (timeout 00:04:08) [common]
6317 00:23:48.824630 Setting prompt string to ['/ #']
6318 00:23:48.824696 Forcing a shell prompt, looking for ['/ #']
6320 00:23:48.874928 / #
6321 00:23:48.875047 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6322 00:23:48.875128 Waiting using forced prompt support (timeout 00:02:30)
6323 00:23:48.879855
6324 00:23:48.880136 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6325 00:23:48.880239 start: 2.2.7 export-device-env (timeout 00:04:08) [common]
6326 00:23:48.880342 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6327 00:23:48.880435 end: 2.2 depthcharge-retry (duration 00:00:52) [common]
6328 00:23:48.880524 end: 2 depthcharge-action (duration 00:00:52) [common]
6329 00:23:48.880622 start: 3 lava-test-retry (timeout 00:01:00) [common]
6330 00:23:48.880714 start: 3.1 lava-test-shell (timeout 00:01:00) [common]
6331 00:23:48.880795 Using namespace: common
6333 00:23:48.981157 / # #
6334 00:23:48.981300 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:01:00)
6335 00:23:48.985958 #
6336 00:23:48.986234 Using /lava-14479163
6338 00:23:49.086554 / # export SHELL=/bin/sh
6339 00:23:49.095992 export SHELL=/bin/sh<6>[ 8.888862] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6340 00:23:49.103850
6342 00:23:49.204391 / # . /lava-14479163/environment
6343 00:23:49.204558 . /lava-14479163/environment<4>[ 8.974597] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6344 00:23:49.204641 <4>[ 8.995039] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6345 00:23:49.209242
6347 00:23:49.309827 / # <4>[ 9./lava-14479163/bin/lava-test-runner /lava-14479163/0
6348 00:23:49.309999 Test shell timeout: 10s (minimum of the action and connection timeout)
6349 00:23:49.310402 010983] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6350 00:23:49.310491 <4>[ 9.024249] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6351 00:23:49.314895 /lava-14479163/bin/lava-test-runner /lava-14479163/0
6352 00:23:49.357540 + export 'TESTRUN_ID=0_dmesg'
6353 00:23:49.357635 + c<8>[ 9.139658] <LAVA_SIGNAL_STARTRUN 0_dmesg 14479163_1.5.2.3.1>
6354 00:23:49.357710 d /lava-14479163/0/tests/0_dmesg
6355 00:23:49.357778 + cat uuid
6356 00:23:49.357844 + UUID=14479163_1.5.2.3.1
6357 00:23:49.357908 + set +x
6358 00:23:49.357971 + KERNELCI_LAVA=y /bin/sh /opt/kernelci/dmesg.sh
6359 00:23:49.358213 Received signal: <STARTRUN> 0_dmesg 14479163_1.5.2.3.1
6360 00:23:49.358286 Starting test lava.0_dmesg (14479163_1.5.2.3.1)
6361 00:23:49.358368 Skipping test definition patterns.
6362 00:23:49.372935 <8>[ 9.165787] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0>
6363 00:23:49.373200 Received signal: <TESTCASE> TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0
6365 00:23:49.397287 <8>[ 9.190129] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0>
6366 00:23:49.397550 Received signal: <TESTCASE> TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0
6368 00:23:49.421222 <8>[ 9.213937] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0>
6369 00:23:49.421528 Received signal: <TESTCASE> TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0
6371 00:23:49.426324 + set +x
6372 00:23:49.429804 Received signal: <ENDRUN> 0_dmesg 14479163_1.5.2.3.1
6373 00:23:49.429935 Ending use of test pattern.
6374 00:23:49.430037 Ending test lava.0_dmesg (14479163_1.5.2.3.1), duration 0.07
6376 00:23:49.432587 <8>[ 9.225778] <LAVA_SIGNAL_ENDRUN 0_dmesg 14479163_1.5.2.3.1>
6377 00:23:49.437701 <LAVA_TEST_RUNNER EXIT>
6378 00:23:49.437963 ok: lava_test_shell seems to have completed
6379 00:23:49.438079 alert: pass
crit: pass
emerg: pass
6380 00:23:49.438173 end: 3.1 lava-test-shell (duration 00:00:01) [common]
6381 00:23:49.438265 end: 3 lava-test-retry (duration 00:00:01) [common]
6382 00:23:49.438359 start: 4 finalize (timeout 00:08:48) [common]
6383 00:23:49.438455 start: 4.1 power-off (timeout 00:00:30) [common]
6384 00:23:49.438622 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2', '--port=1', '--command=off']
6385 00:23:50.836337 >> Command sent successfully.
6386 00:23:50.839109 Returned 0 in 1 seconds
6387 00:23:50.939511 end: 4.1 power-off (duration 00:00:02) [common]
6389 00:23:50.939870 start: 4.2 read-feedback (timeout 00:08:47) [common]
6390 00:23:50.940165 Listened to connection for namespace 'common' for up to 1s
6391 00:23:51.941082 Finalising connection for namespace 'common'
6392 00:23:51.941260 Disconnecting from shell: Finalise
6393 00:23:51.941357 / #
6394 00:23:52.041673 end: 4.2 read-feedback (duration 00:00:01) [common]
6395 00:23:52.041836 end: 4 finalize (duration 00:00:03) [common]
6396 00:23:52.041967 Cleaning after the job
6397 00:23:52.042080 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479163/tftp-deploy-s99zyal3/ramdisk
6398 00:23:52.044660 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479163/tftp-deploy-s99zyal3/kernel
6399 00:23:52.052588 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479163/tftp-deploy-s99zyal3/dtb
6400 00:23:52.052781 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479163/tftp-deploy-s99zyal3/modules
6401 00:23:52.058901 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14479163
6402 00:23:52.104067 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14479163
6403 00:23:52.104252 Job finished correctly