Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 37
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 84
1 01:56:20.239712 lava-dispatcher, installed at version: 2024.03
2 01:56:20.239968 start: 0 validate
3 01:56:20.240150 Start time: 2024-06-21 01:56:20.240138+00:00 (UTC)
4 01:56:20.240326 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:56:20.240526 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-cros-ec%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 01:56:20.511797 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:56:20.512516 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 01:56:20.775158 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:56:20.775936 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 01:56:21.043051 Using caching service: 'http://localhost/cache/?uri=%s'
11 01:56:21.043722 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 01:56:21.303889 validate duration: 1.06
14 01:56:21.305187 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 01:56:21.305811 start: 1.1 download-retry (timeout 00:10:00) [common]
16 01:56:21.306339 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 01:56:21.307203 Not decompressing ramdisk as can be used compressed.
18 01:56:21.307644 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-cros-ec/20240313.0/arm64/rootfs.cpio.gz
19 01:56:21.307972 saving as /var/lib/lava/dispatcher/tmp/14479180/tftp-deploy-w_t3ps90/ramdisk/rootfs.cpio.gz
20 01:56:21.308302 total size: 39026414 (37 MB)
21 01:56:21.314047 progress 0 % (0 MB)
22 01:56:21.347013 progress 5 % (1 MB)
23 01:56:21.361745 progress 10 % (3 MB)
24 01:56:21.372951 progress 15 % (5 MB)
25 01:56:21.384449 progress 20 % (7 MB)
26 01:56:21.395478 progress 25 % (9 MB)
27 01:56:21.407438 progress 30 % (11 MB)
28 01:56:21.418768 progress 35 % (13 MB)
29 01:56:21.430176 progress 40 % (14 MB)
30 01:56:21.441508 progress 45 % (16 MB)
31 01:56:21.452742 progress 50 % (18 MB)
32 01:56:21.463939 progress 55 % (20 MB)
33 01:56:21.474846 progress 60 % (22 MB)
34 01:56:21.485810 progress 65 % (24 MB)
35 01:56:21.496580 progress 70 % (26 MB)
36 01:56:21.507606 progress 75 % (27 MB)
37 01:56:21.518514 progress 80 % (29 MB)
38 01:56:21.529657 progress 85 % (31 MB)
39 01:56:21.540436 progress 90 % (33 MB)
40 01:56:21.551199 progress 95 % (35 MB)
41 01:56:21.561854 progress 100 % (37 MB)
42 01:56:21.562123 37 MB downloaded in 0.25 s (146.62 MB/s)
43 01:56:21.562346 end: 1.1.1 http-download (duration 00:00:00) [common]
45 01:56:21.562645 end: 1.1 download-retry (duration 00:00:00) [common]
46 01:56:21.562744 start: 1.2 download-retry (timeout 00:10:00) [common]
47 01:56:21.562836 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 01:56:21.562985 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 01:56:21.563061 saving as /var/lib/lava/dispatcher/tmp/14479180/tftp-deploy-w_t3ps90/kernel/Image
50 01:56:21.563130 total size: 54813184 (52 MB)
51 01:56:21.563197 No compression specified
52 01:56:21.564403 progress 0 % (0 MB)
53 01:56:21.579770 progress 5 % (2 MB)
54 01:56:21.595226 progress 10 % (5 MB)
55 01:56:21.610426 progress 15 % (7 MB)
56 01:56:21.625888 progress 20 % (10 MB)
57 01:56:21.641272 progress 25 % (13 MB)
58 01:56:21.656448 progress 30 % (15 MB)
59 01:56:21.671893 progress 35 % (18 MB)
60 01:56:21.687297 progress 40 % (20 MB)
61 01:56:21.702579 progress 45 % (23 MB)
62 01:56:21.718079 progress 50 % (26 MB)
63 01:56:21.733252 progress 55 % (28 MB)
64 01:56:21.748380 progress 60 % (31 MB)
65 01:56:21.763548 progress 65 % (34 MB)
66 01:56:21.778641 progress 70 % (36 MB)
67 01:56:21.793786 progress 75 % (39 MB)
68 01:56:21.809131 progress 80 % (41 MB)
69 01:56:21.824488 progress 85 % (44 MB)
70 01:56:21.839779 progress 90 % (47 MB)
71 01:56:21.854851 progress 95 % (49 MB)
72 01:56:21.869537 progress 100 % (52 MB)
73 01:56:21.869773 52 MB downloaded in 0.31 s (170.47 MB/s)
74 01:56:21.869945 end: 1.2.1 http-download (duration 00:00:00) [common]
76 01:56:21.870229 end: 1.2 download-retry (duration 00:00:00) [common]
77 01:56:21.870322 start: 1.3 download-retry (timeout 00:09:59) [common]
78 01:56:21.870412 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 01:56:21.870556 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 01:56:21.870630 saving as /var/lib/lava/dispatcher/tmp/14479180/tftp-deploy-w_t3ps90/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 01:56:21.870695 total size: 57695 (0 MB)
82 01:56:21.870760 No compression specified
83 01:56:21.876589 progress 56 % (0 MB)
84 01:56:21.876985 progress 100 % (0 MB)
85 01:56:21.877239 0 MB downloaded in 0.01 s (8.41 MB/s)
86 01:56:21.877398 end: 1.3.1 http-download (duration 00:00:00) [common]
88 01:56:21.877688 end: 1.3 download-retry (duration 00:00:00) [common]
89 01:56:21.877780 start: 1.4 download-retry (timeout 00:09:59) [common]
90 01:56:21.877870 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 01:56:21.878074 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 01:56:21.878147 saving as /var/lib/lava/dispatcher/tmp/14479180/tftp-deploy-w_t3ps90/modules/modules.tar
93 01:56:21.878213 total size: 8618924 (8 MB)
94 01:56:21.878279 Using unxz to decompress xz
95 01:56:21.882483 progress 0 % (0 MB)
96 01:56:21.904254 progress 5 % (0 MB)
97 01:56:21.930966 progress 10 % (0 MB)
98 01:56:21.958899 progress 15 % (1 MB)
99 01:56:21.985909 progress 20 % (1 MB)
100 01:56:22.013891 progress 25 % (2 MB)
101 01:56:22.041102 progress 30 % (2 MB)
102 01:56:22.068558 progress 35 % (2 MB)
103 01:56:22.095088 progress 40 % (3 MB)
104 01:56:22.122055 progress 45 % (3 MB)
105 01:56:22.148305 progress 50 % (4 MB)
106 01:56:22.175318 progress 55 % (4 MB)
107 01:56:22.202126 progress 60 % (4 MB)
108 01:56:22.228178 progress 65 % (5 MB)
109 01:56:22.258915 progress 70 % (5 MB)
110 01:56:22.286330 progress 75 % (6 MB)
111 01:56:22.312168 progress 80 % (6 MB)
112 01:56:22.337786 progress 85 % (7 MB)
113 01:56:22.363428 progress 90 % (7 MB)
114 01:56:22.394064 progress 95 % (7 MB)
115 01:56:22.427545 progress 100 % (8 MB)
116 01:56:22.432717 8 MB downloaded in 0.55 s (14.82 MB/s)
117 01:56:22.432978 end: 1.4.1 http-download (duration 00:00:01) [common]
119 01:56:22.433267 end: 1.4 download-retry (duration 00:00:01) [common]
120 01:56:22.433372 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 01:56:22.433481 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 01:56:22.433570 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 01:56:22.433666 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 01:56:22.433913 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn
125 01:56:22.434062 makedir: /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin
126 01:56:22.434179 makedir: /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/tests
127 01:56:22.434286 makedir: /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/results
128 01:56:22.434412 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-add-keys
129 01:56:22.434572 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-add-sources
130 01:56:22.434717 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-background-process-start
131 01:56:22.434862 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-background-process-stop
132 01:56:22.435002 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-common-functions
133 01:56:22.435140 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-echo-ipv4
134 01:56:22.435278 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-install-packages
135 01:56:22.435414 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-installed-packages
136 01:56:22.435550 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-os-build
137 01:56:22.435692 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-probe-channel
138 01:56:22.435829 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-probe-ip
139 01:56:22.435962 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-target-ip
140 01:56:22.436098 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-target-mac
141 01:56:22.436234 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-target-storage
142 01:56:22.436375 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-test-case
143 01:56:22.436513 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-test-event
144 01:56:22.436647 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-test-feedback
145 01:56:22.436782 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-test-raise
146 01:56:22.436917 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-test-reference
147 01:56:22.437054 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-test-runner
148 01:56:22.437189 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-test-set
149 01:56:22.437326 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-test-shell
150 01:56:22.437476 Updating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-install-packages (oe)
151 01:56:22.437642 Updating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/bin/lava-installed-packages (oe)
152 01:56:22.437777 Creating /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/environment
153 01:56:22.437888 LAVA metadata
154 01:56:22.437968 - LAVA_JOB_ID=14479180
155 01:56:22.438037 - LAVA_DISPATCHER_IP=192.168.201.1
156 01:56:22.438152 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 01:56:22.438226 skipped lava-vland-overlay
158 01:56:22.438307 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 01:56:22.438397 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 01:56:22.438477 skipped lava-multinode-overlay
161 01:56:22.438557 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 01:56:22.438648 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 01:56:22.438727 Loading test definitions
164 01:56:22.438828 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 01:56:22.438907 Using /lava-14479180 at stage 0
166 01:56:22.439249 uuid=14479180_1.5.2.3.1 testdef=None
167 01:56:22.439347 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 01:56:22.439442 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 01:56:22.440152 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 01:56:22.440499 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 01:56:22.441282 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 01:56:22.441733 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 01:56:22.442704 runner path: /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/0/tests/0_cros-ec test_uuid 14479180_1.5.2.3.1
176 01:56:22.442929 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 01:56:22.443301 Creating lava-test-runner.conf files
179 01:56:22.443402 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14479180/lava-overlay-b2r9jhyn/lava-14479180/0 for stage 0
180 01:56:22.443534 - 0_cros-ec
181 01:56:22.443677 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 01:56:22.443803 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 01:56:22.452066 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 01:56:22.452190 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 01:56:22.452285 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 01:56:22.452378 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 01:56:22.452473 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 01:56:23.782237 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 01:56:23.782656 start: 1.5.4 extract-modules (timeout 00:09:58) [common]
190 01:56:23.782777 extracting modules file /var/lib/lava/dispatcher/tmp/14479180/tftp-deploy-w_t3ps90/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14479180/extract-overlay-ramdisk-9_cgic8h/ramdisk
191 01:56:24.032663 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 01:56:24.032839 start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
193 01:56:24.032938 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14479180/compress-overlay-zo7v8snr/overlay-1.5.2.4.tar.gz to ramdisk
194 01:56:24.033014 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14479180/compress-overlay-zo7v8snr/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14479180/extract-overlay-ramdisk-9_cgic8h/ramdisk
195 01:56:24.040398 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 01:56:24.040524 start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
197 01:56:24.040622 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 01:56:24.040725 start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
199 01:56:24.040816 Building ramdisk /var/lib/lava/dispatcher/tmp/14479180/extract-overlay-ramdisk-9_cgic8h/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14479180/extract-overlay-ramdisk-9_cgic8h/ramdisk
200 01:56:24.990835 >> 336023 blocks
201 01:56:30.623003 rename /var/lib/lava/dispatcher/tmp/14479180/extract-overlay-ramdisk-9_cgic8h/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14479180/tftp-deploy-w_t3ps90/ramdisk/ramdisk.cpio.gz
202 01:56:30.623494 end: 1.5.7 compress-ramdisk (duration 00:00:07) [common]
203 01:56:30.623664 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
204 01:56:30.623771 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
205 01:56:30.623921 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14479180/tftp-deploy-w_t3ps90/kernel/Image']
206 01:56:44.546629 Returned 0 in 13 seconds
207 01:56:44.647666 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14479180/tftp-deploy-w_t3ps90/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14479180/tftp-deploy-w_t3ps90/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14479180/tftp-deploy-w_t3ps90/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14479180/tftp-deploy-w_t3ps90/kernel/image.itb
208 01:56:45.501662 output: FIT description: Kernel Image image with one or more FDT blobs
209 01:56:45.502063 output: Created: Fri Jun 21 02:56:45 2024
210 01:56:45.502144 output: Image 0 (kernel-1)
211 01:56:45.502211 output: Description:
212 01:56:45.502277 output: Created: Fri Jun 21 02:56:45 2024
213 01:56:45.502340 output: Type: Kernel Image
214 01:56:45.502410 output: Compression: lzma compressed
215 01:56:45.502477 output: Data Size: 13124896 Bytes = 12817.28 KiB = 12.52 MiB
216 01:56:45.502544 output: Architecture: AArch64
217 01:56:45.502611 output: OS: Linux
218 01:56:45.502676 output: Load Address: 0x00000000
219 01:56:45.502742 output: Entry Point: 0x00000000
220 01:56:45.502805 output: Hash algo: crc32
221 01:56:45.502867 output: Hash value: ab2f7826
222 01:56:45.502930 output: Image 1 (fdt-1)
223 01:56:45.502992 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 01:56:45.503051 output: Created: Fri Jun 21 02:56:45 2024
225 01:56:45.503111 output: Type: Flat Device Tree
226 01:56:45.503169 output: Compression: uncompressed
227 01:56:45.503226 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 01:56:45.503285 output: Architecture: AArch64
229 01:56:45.503342 output: Hash algo: crc32
230 01:56:45.503399 output: Hash value: a9713552
231 01:56:45.503457 output: Image 2 (ramdisk-1)
232 01:56:45.503515 output: Description: unavailable
233 01:56:45.503572 output: Created: Fri Jun 21 02:56:45 2024
234 01:56:45.503629 output: Type: RAMDisk Image
235 01:56:45.503687 output: Compression: Unknown Compression
236 01:56:45.503745 output: Data Size: 52153486 Bytes = 50931.14 KiB = 49.74 MiB
237 01:56:45.503803 output: Architecture: AArch64
238 01:56:45.503860 output: OS: Linux
239 01:56:45.503918 output: Load Address: unavailable
240 01:56:45.503975 output: Entry Point: unavailable
241 01:56:45.504033 output: Hash algo: crc32
242 01:56:45.504090 output: Hash value: 53bfada6
243 01:56:45.504147 output: Default Configuration: 'conf-1'
244 01:56:45.504205 output: Configuration 0 (conf-1)
245 01:56:45.504262 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 01:56:45.504320 output: Kernel: kernel-1
247 01:56:45.504377 output: Init Ramdisk: ramdisk-1
248 01:56:45.504434 output: FDT: fdt-1
249 01:56:45.504491 output: Loadables: kernel-1
250 01:56:45.504549 output:
251 01:56:45.504772 end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
252 01:56:45.504875 end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
253 01:56:45.504986 end: 1.5 prepare-tftp-overlay (duration 00:00:23) [common]
254 01:56:45.505086 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
255 01:56:45.505171 No LXC device requested
256 01:56:45.505257 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 01:56:45.505348 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
258 01:56:45.505438 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 01:56:45.505550 Checking files for TFTP limit of 4294967296 bytes.
260 01:56:45.506089 end: 1 tftp-deploy (duration 00:00:24) [common]
261 01:56:45.506200 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 01:56:45.506301 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 01:56:45.506437 substitutions:
264 01:56:45.506509 - {DTB}: 14479180/tftp-deploy-w_t3ps90/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 01:56:45.506580 - {INITRD}: 14479180/tftp-deploy-w_t3ps90/ramdisk/ramdisk.cpio.gz
266 01:56:45.506645 - {KERNEL}: 14479180/tftp-deploy-w_t3ps90/kernel/Image
267 01:56:45.506708 - {LAVA_MAC}: None
268 01:56:45.506770 - {PRESEED_CONFIG}: None
269 01:56:45.506831 - {PRESEED_LOCAL}: None
270 01:56:45.506891 - {RAMDISK}: 14479180/tftp-deploy-w_t3ps90/ramdisk/ramdisk.cpio.gz
271 01:56:45.506950 - {ROOT_PART}: None
272 01:56:45.507010 - {ROOT}: None
273 01:56:45.507069 - {SERVER_IP}: 192.168.201.1
274 01:56:45.507128 - {TEE}: None
275 01:56:45.507187 Parsed boot commands:
276 01:56:45.507246 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 01:56:45.507435 Parsed boot commands: tftpboot 192.168.201.1 14479180/tftp-deploy-w_t3ps90/kernel/image.itb 14479180/tftp-deploy-w_t3ps90/kernel/cmdline
278 01:56:45.507534 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 01:56:45.507629 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 01:56:45.507726 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 01:56:45.507816 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 01:56:45.507895 Not connected, no need to disconnect.
283 01:56:45.507976 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 01:56:45.508062 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 01:56:45.508138 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-2'
286 01:56:45.512020 Setting prompt string to ['lava-test: # ']
287 01:56:45.512413 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 01:56:45.512528 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 01:56:45.512635 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 01:56:45.512783 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 01:56:45.513031 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-2']
292 01:56:55.660189 Returned 0 in 10 seconds
293 01:56:55.761252 end: 2.2.2.1 pdu-reboot (duration 00:00:10) [common]
295 01:56:55.761632 end: 2.2.2 reset-device (duration 00:00:10) [common]
296 01:56:55.761740 start: 2.2.3 depthcharge-start (timeout 00:04:50) [common]
297 01:56:55.761836 Setting prompt string to 'Starting depthcharge on Juniper...'
298 01:56:55.761911 Changing prompt to 'Starting depthcharge on Juniper...'
299 01:56:55.761986 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 01:56:55.762426 [Enter `^Ec?' for help]
301 01:56:55.762516 [DL] 00000000 00000000 010701
302 01:56:55.762588
303 01:56:55.762655
304 01:56:55.762719 F0: 102B 0000
305 01:56:55.762784
306 01:56:55.762848 F3: 1006 0033 [0200]
307 01:56:55.762915
308 01:56:55.762981 F3: 4001 00E0 [0200]
309 01:56:55.763045
310 01:56:55.763105 F3: 0000 0000
311 01:56:55.763166
312 01:56:55.763226 V0: 0000 0000 [0001]
313 01:56:55.763285
314 01:56:55.763344 00: 1027 0002
315 01:56:55.763411
316 01:56:55.763479 01: 0000 0000
317 01:56:55.763541
318 01:56:55.763600 BP: 0C00 0251 [0000]
319 01:56:55.763659
320 01:56:55.763718 G0: 1182 0000
321 01:56:55.763776
322 01:56:55.763835 EC: 0004 0000 [0001]
323 01:56:55.763894
324 01:56:55.763953 S7: 0000 0000 [0000]
325 01:56:55.764012
326 01:56:55.764071 CC: 0000 0000 [0001]
327 01:56:55.764130
328 01:56:55.764189 T0: 0000 00DB [000F]
329 01:56:55.764248
330 01:56:55.764306 Jump to BL
331 01:56:55.764366
332 01:56:55.764425
333 01:56:55.764483
334 01:56:55.764551 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 01:56:55.764616 ARM64: Exception handlers installed.
336 01:56:55.764677 ARM64: Testing exception
337 01:56:55.764736 ARM64: Done test exception
338 01:56:55.764795 WDT: Last reset was cold boot
339 01:56:55.764854 SPI0(PAD0) initialized at 992727 Hz
340 01:56:55.764913 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 01:56:55.764973 Manufacturer: ef
342 01:56:55.765031 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 01:56:55.765090 Probing TPM: . done!
344 01:56:55.765149 TPM ready after 0 ms
345 01:56:55.765207 Connected to device vid:did:rid of 1ae0:0028:00
346 01:56:55.765266 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-afa1dd1
347 01:56:55.765327 Initialized TPM device CR50 revision 0
348 01:56:55.765386 tlcl_send_startup: Startup return code is 0
349 01:56:55.765465 TPM: setup succeeded
350 01:56:55.765528 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 01:56:55.765587 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 01:56:55.765648 in-header: 03 19 00 00 08 00 00 00
353 01:56:55.765706 in-data: a2 e0 47 00 13 00 00 00
354 01:56:55.765764 Chrome EC: UHEPI supported
355 01:56:55.765823 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 01:56:55.765882 in-header: 03 a1 00 00 08 00 00 00
357 01:56:55.765941 in-data: 84 60 60 10 00 00 00 00
358 01:56:55.765999 Phase 1
359 01:56:55.766058 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 01:56:55.766118 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 01:56:55.766177 VB2:vb2_check_recovery() Recovery was requested manually
362 01:56:55.766237 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 01:56:55.766296 Recovery requested (1009000e)
364 01:56:55.766355 tlcl_extend: response is 0
365 01:56:55.766414 tlcl_extend: response is 0
366 01:56:55.766474
367 01:56:55.766533
368 01:56:55.766591 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 01:56:55.766651 ARM64: Exception handlers installed.
370 01:56:55.766710 ARM64: Testing exception
371 01:56:55.766768 ARM64: Done test exception
372 01:56:55.766827 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x926b, sec=0x2038
373 01:56:55.766887 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 01:56:55.766946 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 01:56:55.767005 [RTC]rtc_get_frequency_meter,134: input=0xf, output=861
376 01:56:55.767064 [RTC]rtc_get_frequency_meter,134: input=0x7, output=731
377 01:56:55.767123 [RTC]rtc_get_frequency_meter,134: input=0xb, output=797
378 01:56:55.767183 [RTC]rtc_get_frequency_meter,134: input=0x9, output=765
379 01:56:55.767241 [RTC]rtc_get_frequency_meter,134: input=0xa, output=781
380 01:56:55.767300 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
381 01:56:55.767359 [RTC]rtc_get_frequency_meter,134: input=0xb, output=798
382 01:56:55.767422 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x926b
383 01:56:55.767490 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
384 01:56:55.767549 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
385 01:56:55.767608 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
386 01:56:55.767667 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
387 01:56:55.767725 in-header: 03 19 00 00 08 00 00 00
388 01:56:55.767784 in-data: a2 e0 47 00 13 00 00 00
389 01:56:55.767843 Chrome EC: UHEPI supported
390 01:56:55.767909 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
391 01:56:55.767971 in-header: 03 a1 00 00 08 00 00 00
392 01:56:55.768030 in-data: 84 60 60 10 00 00 00 00
393 01:56:55.768089 Skip loading cached calibration data
394 01:56:55.768148 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
395 01:56:55.768207 in-header: 03 a1 00 00 08 00 00 00
396 01:56:55.768266 in-data: 84 60 60 10 00 00 00 00
397 01:56:55.768325 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
398 01:56:55.768385 in-header: 03 a1 00 00 08 00 00 00
399 01:56:55.768443 in-data: 84 60 60 10 00 00 00 00
400 01:56:55.768502 ADC[3]: Raw value=215404 ID=1
401 01:56:55.768561 Manufacturer: ef
402 01:56:55.768619 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
403 01:56:55.768678 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
404 01:56:55.768738 CBFS @ 21000 size 3d4000
405 01:56:55.768797 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
406 01:56:55.768856 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
407 01:56:55.768914 CBFS: Found @ offset 3c700 size 44
408 01:56:55.768972 DRAM-K: Full Calibration
409 01:56:55.769031 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
410 01:56:55.769090 CBFS @ 21000 size 3d4000
411 01:56:55.769149 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
412 01:56:55.769208 CBFS: Locating 'fallback/dram'
413 01:56:55.769266 CBFS: Found @ offset 24b00 size 12268
414 01:56:55.769324 read SPI 0x45b44 0x1224c: 22773 us, 3263 KB/s, 26.104 Mbps
415 01:56:55.769383 ddr_geometry: 1, config: 0x0
416 01:56:55.769458 header.status = 0x0
417 01:56:55.769526 header.magic = 0x44524d4b (expected: 0x44524d4b)
418 01:56:55.769586 header.version = 0x5 (expected: 0x5)
419 01:56:55.769837 header.size = 0x8f0 (expected: 0x8f0)
420 01:56:55.769907 header.config = 0x0
421 01:56:55.769968 header.flags = 0x0
422 01:56:55.770028 header.checksum = 0x0
423 01:56:55.770087 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
424 01:56:55.770147 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
425 01:56:55.770207 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
426 01:56:55.770267 ddr_geometry:1
427 01:56:55.770326 [EMI] new MDL number = 1
428 01:56:55.770385 dram_cbt_mode_extern: 0
429 01:56:55.770443 dram_cbt_mode [RK0]: 0, [RK1]: 0
430 01:56:55.770502 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
431 01:56:55.770562
432 01:56:55.770621
433 01:56:55.770679 [Bianco] ETT version 0.0.0.1
434 01:56:55.770738 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
435 01:56:55.770797
436 01:56:55.770855 vSetVcoreByFreq with vcore:762500, freq=1600
437 01:56:55.770916
438 01:56:55.770974 [DramcInit]
439 01:56:55.771033 AutoRefreshCKEOff AutoREF OFF
440 01:56:55.771092 DDRPhyPLLSetting-CKEOFF
441 01:56:55.771150 DDRPhyPLLSetting-CKEON
442 01:56:55.771217
443 01:56:55.771276 Enable WDQS
444 01:56:55.771334 [ModeRegInit_LP4] CH0 RK0
445 01:56:55.771392 Write Rank0 MR13 =0x18
446 01:56:55.771451 Write Rank0 MR12 =0x5d
447 01:56:55.771509 Write Rank0 MR1 =0x56
448 01:56:55.771568 Write Rank0 MR2 =0x1a
449 01:56:55.771626 Write Rank0 MR11 =0x0
450 01:56:55.771685 Write Rank0 MR22 =0x38
451 01:56:55.771744 Write Rank0 MR14 =0x5d
452 01:56:55.771802 Write Rank0 MR3 =0x30
453 01:56:55.771859 Write Rank0 MR13 =0x58
454 01:56:55.771917 Write Rank0 MR12 =0x5d
455 01:56:55.771975 Write Rank0 MR1 =0x56
456 01:56:55.772034 Write Rank0 MR2 =0x2d
457 01:56:55.772092 Write Rank0 MR11 =0x23
458 01:56:55.772151 Write Rank0 MR22 =0x34
459 01:56:55.772209 Write Rank0 MR14 =0x10
460 01:56:55.772267 Write Rank0 MR3 =0x30
461 01:56:55.772325 Write Rank0 MR13 =0xd8
462 01:56:55.772383 [ModeRegInit_LP4] CH0 RK1
463 01:56:55.772441 Write Rank1 MR13 =0x18
464 01:56:55.772499 Write Rank1 MR12 =0x5d
465 01:56:55.772557 Write Rank1 MR1 =0x56
466 01:56:55.772616 Write Rank1 MR2 =0x1a
467 01:56:55.772675 Write Rank1 MR11 =0x0
468 01:56:55.772733 Write Rank1 MR22 =0x38
469 01:56:55.772791 Write Rank1 MR14 =0x5d
470 01:56:55.772850 Write Rank1 MR3 =0x30
471 01:56:55.772907 Write Rank1 MR13 =0x58
472 01:56:55.772966 Write Rank1 MR12 =0x5d
473 01:56:55.773023 Write Rank1 MR1 =0x56
474 01:56:55.773081 Write Rank1 MR2 =0x2d
475 01:56:55.773139 Write Rank1 MR11 =0x23
476 01:56:55.773197 Write Rank1 MR22 =0x34
477 01:56:55.773255 Write Rank1 MR14 =0x10
478 01:56:55.773313 Write Rank1 MR3 =0x30
479 01:56:55.773371 Write Rank1 MR13 =0xd8
480 01:56:55.773435 [ModeRegInit_LP4] CH1 RK0
481 01:56:55.773494 Write Rank0 MR13 =0x18
482 01:56:55.773553 Write Rank0 MR12 =0x5d
483 01:56:55.773611 Write Rank0 MR1 =0x56
484 01:56:55.773669 Write Rank0 MR2 =0x1a
485 01:56:55.773727 Write Rank0 MR11 =0x0
486 01:56:55.773785 Write Rank0 MR22 =0x38
487 01:56:55.773844 Write Rank0 MR14 =0x5d
488 01:56:55.773902 Write Rank0 MR3 =0x30
489 01:56:55.773960 Write Rank0 MR13 =0x58
490 01:56:55.774019 Write Rank0 MR12 =0x5d
491 01:56:55.774077 Write Rank0 MR1 =0x56
492 01:56:55.774135 Write Rank0 MR2 =0x2d
493 01:56:55.774193 Write Rank0 MR11 =0x23
494 01:56:55.774260 Write Rank0 MR22 =0x34
495 01:56:55.774319 Write Rank0 MR14 =0x10
496 01:56:55.774377 Write Rank0 MR3 =0x30
497 01:56:55.774435 Write Rank0 MR13 =0xd8
498 01:56:55.774494 [ModeRegInit_LP4] CH1 RK1
499 01:56:55.774553 Write Rank1 MR13 =0x18
500 01:56:55.774611 Write Rank1 MR12 =0x5d
501 01:56:55.774669 Write Rank1 MR1 =0x56
502 01:56:55.774727 Write Rank1 MR2 =0x1a
503 01:56:55.774784 Write Rank1 MR11 =0x0
504 01:56:55.774842 Write Rank1 MR22 =0x38
505 01:56:55.774900 Write Rank1 MR14 =0x5d
506 01:56:55.774958 Write Rank1 MR3 =0x30
507 01:56:55.775016 Write Rank1 MR13 =0x58
508 01:56:55.775074 Write Rank1 MR12 =0x5d
509 01:56:55.775132 Write Rank1 MR1 =0x56
510 01:56:55.775190 Write Rank1 MR2 =0x2d
511 01:56:55.775247 Write Rank1 MR11 =0x23
512 01:56:55.775305 Write Rank1 MR22 =0x34
513 01:56:55.775363 Write Rank1 MR14 =0x10
514 01:56:55.775421 Write Rank1 MR3 =0x30
515 01:56:55.775480 Write Rank1 MR13 =0xd8
516 01:56:55.775538 match AC timing 3
517 01:56:55.775596 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
518 01:56:55.775656 [MiockJmeterHQA]
519 01:56:55.775715 vSetVcoreByFreq with vcore:762500, freq=1600
520 01:56:55.775773
521 01:56:55.775831 MIOCK jitter meter ch=0
522 01:56:55.775890
523 01:56:55.775948 1T = (101-18) = 83 dly cells
524 01:56:55.776008 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 753/100 ps
525 01:56:55.776066 vSetVcoreByFreq with vcore:725000, freq=1200
526 01:56:55.776126
527 01:56:55.776183 MIOCK jitter meter ch=0
528 01:56:55.776242
529 01:56:55.776300 1T = (96-17) = 79 dly cells
530 01:56:55.776360 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
531 01:56:55.776419 vSetVcoreByFreq with vcore:725000, freq=800
532 01:56:55.776477
533 01:56:55.776535 MIOCK jitter meter ch=0
534 01:56:55.776593
535 01:56:55.776652 1T = (96-17) = 79 dly cells
536 01:56:55.776712 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
537 01:56:55.776771 vSetVcoreByFreq with vcore:762500, freq=1600
538 01:56:55.776830 vSetVcoreByFreq with vcore:762500, freq=1600
539 01:56:55.776888
540 01:56:55.776946 K DRVP
541 01:56:55.777004 1. OCD DRVP=0 CALOUT=0
542 01:56:55.777064 1. OCD DRVP=1 CALOUT=0
543 01:56:55.777124 1. OCD DRVP=2 CALOUT=0
544 01:56:55.777183 1. OCD DRVP=3 CALOUT=0
545 01:56:55.777243 1. OCD DRVP=4 CALOUT=0
546 01:56:55.777302 1. OCD DRVP=5 CALOUT=0
547 01:56:55.777362 1. OCD DRVP=6 CALOUT=0
548 01:56:55.777421 1. OCD DRVP=7 CALOUT=0
549 01:56:55.777486 1. OCD DRVP=8 CALOUT=1
550 01:56:55.777546
551 01:56:55.777603 1. OCD DRVP calibration OK! DRVP=8
552 01:56:55.777664
553 01:56:55.777725
554 01:56:55.777788
555 01:56:55.777845 K ODTN
556 01:56:55.777903 3. OCD ODTN=0 ,CALOUT=1
557 01:56:55.777963 3. OCD ODTN=1 ,CALOUT=1
558 01:56:55.778023 3. OCD ODTN=2 ,CALOUT=1
559 01:56:55.778083 3. OCD ODTN=3 ,CALOUT=1
560 01:56:55.778143 3. OCD ODTN=4 ,CALOUT=1
561 01:56:55.778202 3. OCD ODTN=5 ,CALOUT=1
562 01:56:55.778261 3. OCD ODTN=6 ,CALOUT=1
563 01:56:55.778321 3. OCD ODTN=7 ,CALOUT=0
564 01:56:55.778380
565 01:56:55.778438 3. OCD ODTN calibration OK! ODTN=7
566 01:56:55.778498
567 01:56:55.778556 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
568 01:56:55.778615 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
569 01:56:55.778674 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
570 01:56:55.778734
571 01:56:55.778791 K DRVP
572 01:56:55.778849 1. OCD DRVP=0 CALOUT=0
573 01:56:55.778908 1. OCD DRVP=1 CALOUT=0
574 01:56:55.778968 1. OCD DRVP=2 CALOUT=0
575 01:56:55.779027 1. OCD DRVP=3 CALOUT=0
576 01:56:55.779086 1. OCD DRVP=4 CALOUT=0
577 01:56:55.779145 1. OCD DRVP=5 CALOUT=0
578 01:56:55.779205 1. OCD DRVP=6 CALOUT=0
579 01:56:55.779264 1. OCD DRVP=7 CALOUT=0
580 01:56:55.779323 1. OCD DRVP=8 CALOUT=0
581 01:56:55.779383 1. OCD DRVP=9 CALOUT=0
582 01:56:55.779442 1. OCD DRVP=10 CALOUT=1
583 01:56:55.779501
584 01:56:55.779748 1. OCD DRVP calibration OK! DRVP=10
585 01:56:55.779817
586 01:56:55.779878
587 01:56:55.779936
588 01:56:55.779994 K ODTN
589 01:56:55.780053 3. OCD ODTN=0 ,CALOUT=1
590 01:56:55.780113 3. OCD ODTN=1 ,CALOUT=1
591 01:56:55.780173 3. OCD ODTN=2 ,CALOUT=1
592 01:56:55.780233 3. OCD ODTN=3 ,CALOUT=1
593 01:56:55.780293 3. OCD ODTN=4 ,CALOUT=1
594 01:56:55.780353 3. OCD ODTN=5 ,CALOUT=1
595 01:56:55.780412 3. OCD ODTN=6 ,CALOUT=1
596 01:56:55.780472 3. OCD ODTN=7 ,CALOUT=1
597 01:56:55.780531 3. OCD ODTN=8 ,CALOUT=1
598 01:56:55.780591 3. OCD ODTN=9 ,CALOUT=1
599 01:56:55.780651 3. OCD ODTN=10 ,CALOUT=1
600 01:56:55.780711 3. OCD ODTN=11 ,CALOUT=1
601 01:56:55.780782 3. OCD ODTN=12 ,CALOUT=1
602 01:56:55.780843 3. OCD ODTN=13 ,CALOUT=1
603 01:56:55.780903 3. OCD ODTN=14 ,CALOUT=1
604 01:56:55.780962 3. OCD ODTN=15 ,CALOUT=0
605 01:56:55.781021
606 01:56:55.781080 3. OCD ODTN calibration OK! ODTN=15
607 01:56:55.781140
608 01:56:55.781198 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
609 01:56:55.781256 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
610 01:56:55.781315 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
611 01:56:55.781375
612 01:56:55.781437 [DramcInit]
613 01:56:55.781497 AutoRefreshCKEOff AutoREF OFF
614 01:56:55.781556 DDRPhyPLLSetting-CKEOFF
615 01:56:55.781614 DDRPhyPLLSetting-CKEON
616 01:56:55.781672
617 01:56:55.781730 Enable WDQS
618 01:56:55.781788 ==
619 01:56:55.781847 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
620 01:56:55.781906 fsp= 1, odt_onoff= 1, Byte mode= 0
621 01:56:55.781965 ==
622 01:56:55.782023 [Duty_Offset_Calibration]
623 01:56:55.782082
624 01:56:55.782140 ===========================
625 01:56:55.782200 B0:1 B1:-1 CA:0
626 01:56:55.782258 ==
627 01:56:55.782317 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
628 01:56:55.782376 fsp= 1, odt_onoff= 1, Byte mode= 0
629 01:56:55.782435 ==
630 01:56:55.782494 [Duty_Offset_Calibration]
631 01:56:55.782552
632 01:56:55.782610 ===========================
633 01:56:55.782668 B0:1 B1:0 CA:1
634 01:56:55.782727 [ModeRegInit_LP4] CH0 RK0
635 01:56:55.782785 Write Rank0 MR13 =0x18
636 01:56:55.782843 Write Rank0 MR12 =0x5d
637 01:56:55.782901 Write Rank0 MR1 =0x56
638 01:56:55.782960 Write Rank0 MR2 =0x1a
639 01:56:55.783018 Write Rank0 MR11 =0x0
640 01:56:55.783077 Write Rank0 MR22 =0x38
641 01:56:55.783135 Write Rank0 MR14 =0x5d
642 01:56:55.783193 Write Rank0 MR3 =0x30
643 01:56:55.783272 Write Rank0 MR13 =0x58
644 01:56:55.783332 Write Rank0 MR12 =0x5d
645 01:56:55.783390 Write Rank0 MR1 =0x56
646 01:56:55.783449 Write Rank0 MR2 =0x2d
647 01:56:55.783507 Write Rank0 MR11 =0x23
648 01:56:55.783566 Write Rank0 MR22 =0x34
649 01:56:55.783625 Write Rank0 MR14 =0x10
650 01:56:55.783683 Write Rank0 MR3 =0x30
651 01:56:55.783741 Write Rank0 MR13 =0xd8
652 01:56:55.783799 [ModeRegInit_LP4] CH0 RK1
653 01:56:55.783858 Write Rank1 MR13 =0x18
654 01:56:55.783929 Write Rank1 MR12 =0x5d
655 01:56:55.783995 Write Rank1 MR1 =0x56
656 01:56:55.784054 Write Rank1 MR2 =0x1a
657 01:56:55.784113 Write Rank1 MR11 =0x0
658 01:56:55.784179 Write Rank1 MR22 =0x38
659 01:56:55.784240 Write Rank1 MR14 =0x5d
660 01:56:55.784299 Write Rank1 MR3 =0x30
661 01:56:55.784357 Write Rank1 MR13 =0x58
662 01:56:55.784416 Write Rank1 MR12 =0x5d
663 01:56:55.784473 Write Rank1 MR1 =0x56
664 01:56:55.784532 Write Rank1 MR2 =0x2d
665 01:56:55.784590 Write Rank1 MR11 =0x23
666 01:56:55.784648 Write Rank1 MR22 =0x34
667 01:56:55.784706 Write Rank1 MR14 =0x10
668 01:56:55.784764 Write Rank1 MR3 =0x30
669 01:56:55.784822 Write Rank1 MR13 =0xd8
670 01:56:55.784881 [ModeRegInit_LP4] CH1 RK0
671 01:56:55.784939 Write Rank0 MR13 =0x18
672 01:56:55.784997 Write Rank0 MR12 =0x5d
673 01:56:55.785055 Write Rank0 MR1 =0x56
674 01:56:55.785113 Write Rank0 MR2 =0x1a
675 01:56:55.785176 Write Rank0 MR11 =0x0
676 01:56:55.785273 Write Rank0 MR22 =0x38
677 01:56:55.785368 Write Rank0 MR14 =0x5d
678 01:56:55.785464 Write Rank0 MR3 =0x30
679 01:56:55.785526 Write Rank0 MR13 =0x58
680 01:56:55.785586 Write Rank0 MR12 =0x5d
681 01:56:55.785645 Write Rank0 MR1 =0x56
682 01:56:55.785703 Write Rank0 MR2 =0x2d
683 01:56:55.785761 Write Rank0 MR11 =0x23
684 01:56:55.785819 Write Rank0 MR22 =0x34
685 01:56:55.785877 Write Rank0 MR14 =0x10
686 01:56:55.785935 Write Rank0 MR3 =0x30
687 01:56:55.785994 Write Rank0 MR13 =0xd8
688 01:56:55.786052 [ModeRegInit_LP4] CH1 RK1
689 01:56:55.786111 Write Rank1 MR13 =0x18
690 01:56:55.786169 Write Rank1 MR12 =0x5d
691 01:56:55.786227 Write Rank1 MR1 =0x56
692 01:56:55.786285 Write Rank1 MR2 =0x1a
693 01:56:55.786343 Write Rank1 MR11 =0x0
694 01:56:55.786401 Write Rank1 MR22 =0x38
695 01:56:55.786460 Write Rank1 MR14 =0x5d
696 01:56:55.786519 Write Rank1 MR3 =0x30
697 01:56:55.786577 Write Rank1 MR13 =0x58
698 01:56:55.786635 Write Rank1 MR12 =0x5d
699 01:56:55.786693 Write Rank1 MR1 =0x56
700 01:56:55.786752 Write Rank1 MR2 =0x2d
701 01:56:55.786810 Write Rank1 MR11 =0x23
702 01:56:55.786868 Write Rank1 MR22 =0x34
703 01:56:55.786926 Write Rank1 MR14 =0x10
704 01:56:55.786985 Write Rank1 MR3 =0x30
705 01:56:55.787043 Write Rank1 MR13 =0xd8
706 01:56:55.787101 match AC timing 3
707 01:56:55.787163 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
708 01:56:55.787234 DramC Write-DBI off
709 01:56:55.787330 DramC Read-DBI off
710 01:56:55.787420 Write Rank0 MR13 =0x59
711 01:56:55.787482 ==
712 01:56:55.787543 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
713 01:56:55.787602 fsp= 1, odt_onoff= 1, Byte mode= 0
714 01:56:55.787662 ==
715 01:56:55.787720 === u2Vref_new: 0x56 --> 0x2d
716 01:56:55.787780 === u2Vref_new: 0x58 --> 0x38
717 01:56:55.787839 === u2Vref_new: 0x5a --> 0x39
718 01:56:55.787898 === u2Vref_new: 0x5c --> 0x3c
719 01:56:55.787958 === u2Vref_new: 0x5e --> 0x3d
720 01:56:55.788016 === u2Vref_new: 0x60 --> 0xa0
721 01:56:55.788075 [CA 0] Center 34 (6~63) winsize 58
722 01:56:55.788134 [CA 1] Center 35 (7~63) winsize 57
723 01:56:55.788193 [CA 2] Center 28 (-1~58) winsize 60
724 01:56:55.788252 [CA 3] Center 23 (-4~51) winsize 56
725 01:56:55.788311 [CA 4] Center 24 (-4~52) winsize 57
726 01:56:55.788370 [CA 5] Center 29 (0~59) winsize 60
727 01:56:55.788429
728 01:56:55.788487 [CATrainingPosCal] consider 1 rank data
729 01:56:55.788546 u2DelayCellTimex100 = 753/100 ps
730 01:56:55.788605 CA0 delay=34 (6~63),Diff = 11 PI (14 cell)
731 01:56:55.788664 CA1 delay=35 (7~63),Diff = 12 PI (15 cell)
732 01:56:55.788723 CA2 delay=28 (-1~58),Diff = 5 PI (6 cell)
733 01:56:55.788782 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
734 01:56:55.788841 CA4 delay=24 (-4~52),Diff = 1 PI (1 cell)
735 01:56:55.788900 CA5 delay=29 (0~59),Diff = 6 PI (7 cell)
736 01:56:55.788958
737 01:56:55.789016 CA PerBit enable=1, Macro0, CA PI delay=23
738 01:56:55.789075 === u2Vref_new: 0x5c --> 0x3c
739 01:56:55.789134
740 01:56:55.789236 Vref(ca) range 1: 28
741 01:56:55.789332
742 01:56:55.789423 CS Dly= 8 (39-0-32)
743 01:56:55.789494 Write Rank0 MR13 =0xd8
744 01:56:55.789554 Write Rank0 MR13 =0xd8
745 01:56:55.789613 Write Rank0 MR12 =0x5c
746 01:56:55.789672 Write Rank1 MR13 =0x59
747 01:56:55.789730 ==
748 01:56:55.789996 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
749 01:56:55.790068 fsp= 1, odt_onoff= 1, Byte mode= 0
750 01:56:55.790130 ==
751 01:56:55.790190 === u2Vref_new: 0x56 --> 0x2d
752 01:56:55.790250 === u2Vref_new: 0x58 --> 0x38
753 01:56:55.790309 === u2Vref_new: 0x5a --> 0x39
754 01:56:55.790368 === u2Vref_new: 0x5c --> 0x3c
755 01:56:55.790427 === u2Vref_new: 0x5e --> 0x3d
756 01:56:55.790486 === u2Vref_new: 0x60 --> 0xa0
757 01:56:55.790546 [CA 0] Center 35 (7~63) winsize 57
758 01:56:55.790605 [CA 1] Center 34 (6~63) winsize 58
759 01:56:55.790674 [CA 2] Center 28 (-1~58) winsize 60
760 01:56:55.790734 [CA 3] Center 23 (-5~51) winsize 57
761 01:56:55.790793 [CA 4] Center 23 (-5~51) winsize 57
762 01:56:55.790852 [CA 5] Center 29 (0~59) winsize 60
763 01:56:55.790910
764 01:56:55.790969 [CATrainingPosCal] consider 2 rank data
765 01:56:55.791028 u2DelayCellTimex100 = 753/100 ps
766 01:56:55.791087 CA0 delay=35 (7~63),Diff = 12 PI (15 cell)
767 01:56:55.791145 CA1 delay=35 (7~63),Diff = 12 PI (15 cell)
768 01:56:55.791212 CA2 delay=28 (-1~58),Diff = 5 PI (6 cell)
769 01:56:55.791271 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
770 01:56:55.791330 CA4 delay=23 (-4~51),Diff = 0 PI (0 cell)
771 01:56:55.791389 CA5 delay=29 (0~59),Diff = 6 PI (7 cell)
772 01:56:55.791448
773 01:56:55.791506 CA PerBit enable=1, Macro0, CA PI delay=23
774 01:56:55.791566 === u2Vref_new: 0x5e --> 0x3d
775 01:56:55.791625
776 01:56:55.791683 Vref(ca) range 1: 30
777 01:56:55.791742
778 01:56:55.791800 CS Dly= 5 (36-0-32)
779 01:56:55.791858 Write Rank1 MR13 =0xd8
780 01:56:55.791917 Write Rank1 MR13 =0xd8
781 01:56:55.791975 Write Rank1 MR12 =0x5e
782 01:56:55.792033 [RankSwap] Rank num 2, (Multi 1), Rank 0
783 01:56:55.792092 Write Rank0 MR2 =0xad
784 01:56:55.792150 [Write Leveling]
785 01:56:55.792209 delay byte0 byte1 byte2 byte3
786 01:56:55.792267
787 01:56:55.792325 10 0 0
788 01:56:55.792385 11 0 0
789 01:56:55.792444 12 0 0
790 01:56:55.792504 13 0 0
791 01:56:55.792564 14 0 0
792 01:56:55.792623 15 0 0
793 01:56:55.792682 16 0 0
794 01:56:55.792742 17 0 0
795 01:56:55.792801 18 0 0
796 01:56:55.792860 19 0 0
797 01:56:55.792920 20 0 0
798 01:56:55.792979 21 0 0
799 01:56:55.793039 22 0 0
800 01:56:55.793100 23 0 0
801 01:56:55.793165 24 0 0
802 01:56:55.793225 25 0 0
803 01:56:55.793285 26 0 ff
804 01:56:55.793344 27 0 ff
805 01:56:55.793404 28 0 ff
806 01:56:55.793474 29 0 ff
807 01:56:55.793535 30 0 ff
808 01:56:55.793594 31 ff ff
809 01:56:55.793654 32 ff ff
810 01:56:55.793713 33 ff ff
811 01:56:55.793773 34 ff ff
812 01:56:55.793832 35 ff ff
813 01:56:55.793891 36 ff ff
814 01:56:55.793956 37 ff ff
815 01:56:55.794017 pass bytecount = 0xff (0xff: all bytes pass)
816 01:56:55.794076
817 01:56:55.794134 DQS0 dly: 31
818 01:56:55.794193 DQS1 dly: 26
819 01:56:55.794251 Write Rank0 MR2 =0x2d
820 01:56:55.794310 [RankSwap] Rank num 2, (Multi 1), Rank 0
821 01:56:55.794369 Write Rank0 MR1 =0xd6
822 01:56:55.794427 [Gating]
823 01:56:55.794486 ==
824 01:56:55.794544 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
825 01:56:55.794604 fsp= 1, odt_onoff= 1, Byte mode= 0
826 01:56:55.794664 ==
827 01:56:55.794723 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
828 01:56:55.794783 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
829 01:56:55.794844 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(0 0)| 0
830 01:56:55.794904 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
831 01:56:55.794964 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
832 01:56:55.795024 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
833 01:56:55.795084 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
834 01:56:55.795144 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
835 01:56:55.795231 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
836 01:56:55.795296 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
837 01:56:55.795356 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
838 01:56:55.795417 3 2 12 |201 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
839 01:56:55.795477 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
840 01:56:55.795538 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
841 01:56:55.795598 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
842 01:56:55.795659 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
843 01:56:55.795719 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
844 01:56:55.795779 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
845 01:56:55.795838 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
846 01:56:55.795918 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
847 01:56:55.795982 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
848 01:56:55.796042 [Byte 0] Lead/lag Transition tap number (1)
849 01:56:55.796102 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
850 01:56:55.796163 [Byte 1] Lead/lag falling Transition (3, 3, 20)
851 01:56:55.796223 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
852 01:56:55.796282 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
853 01:56:55.796343 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
854 01:56:55.796403 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
855 01:56:55.796463 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
856 01:56:55.796522 3 4 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
857 01:56:55.796583 3 4 16 |707 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
858 01:56:55.796643 3 4 20 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
859 01:56:55.796703 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 01:56:55.796762 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 01:56:55.796822 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 01:56:55.796882 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 01:56:55.796942 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 01:56:55.797001 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 01:56:55.797061 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 01:56:55.797121 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 01:56:55.797186 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 01:56:55.797261 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 01:56:55.797357 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 01:56:55.797650 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
871 01:56:55.797719 [Byte 0] Lead/lag falling Transition (3, 6, 4)
872 01:56:55.797781 [Byte 1] Lead/lag falling Transition (3, 6, 4)
873 01:56:55.797841 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
874 01:56:55.797903 [Byte 0] Lead/lag Transition tap number (2)
875 01:56:55.797962 3 6 12 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
876 01:56:55.798022 [Byte 1] Lead/lag Transition tap number (3)
877 01:56:55.798081 3 6 16 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
878 01:56:55.798142 [Byte 0]First pass (3, 6, 16)
879 01:56:55.798201 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 01:56:55.798261 [Byte 1]First pass (3, 6, 20)
881 01:56:55.798320 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 01:56:55.798381 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 01:56:55.798441 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 01:56:55.798501 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 01:56:55.798560 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 01:56:55.798620 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 01:56:55.798680 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 01:56:55.798740 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 01:56:55.798799 All bytes gating window > 1UI, Early break!
890 01:56:55.798859
891 01:56:55.798917 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 8)
892 01:56:55.798976
893 01:56:55.799034 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
894 01:56:55.799094
895 01:56:55.799154
896 01:56:55.799233
897 01:56:55.799336 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
898 01:56:55.799402
899 01:56:55.799461 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
900 01:56:55.799522
901 01:56:55.799580
902 01:56:55.799639 Write Rank0 MR1 =0x56
903 01:56:55.799698
904 01:56:55.799757 best RODT dly(2T, 0.5T) = (2, 3)
905 01:56:55.799815
906 01:56:55.799874 best RODT dly(2T, 0.5T) = (2, 3)
907 01:56:55.799932 ==
908 01:56:55.799991 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
909 01:56:55.800050 fsp= 1, odt_onoff= 1, Byte mode= 0
910 01:56:55.800110 ==
911 01:56:55.800168 Start DQ dly to find pass range UseTestEngine =0
912 01:56:55.800227 x-axis: bit #, y-axis: DQ dly (-127~63)
913 01:56:55.800286 RX Vref Scan = 0
914 01:56:55.800345 -26, [0] xxxxxxxx xxxxxxxx [MSB]
915 01:56:55.800408 -25, [0] xxxxxxxx xxxxxxxx [MSB]
916 01:56:55.800468 -24, [0] xxxxxxxx xxxxxxxx [MSB]
917 01:56:55.800528 -23, [0] xxxxxxxx xxxxxxxx [MSB]
918 01:56:55.800588 -22, [0] xxxxxxxx xxxxxxxx [MSB]
919 01:56:55.800647 -21, [0] xxxxxxxx xxxxxxxx [MSB]
920 01:56:55.800713 -20, [0] xxxxxxxx xxxxxxxx [MSB]
921 01:56:55.800809 -19, [0] xxxxxxxx xxxxxxxx [MSB]
922 01:56:55.800907 -18, [0] xxxxxxxx xxxxxxxx [MSB]
923 01:56:55.801015 -17, [0] xxxxxxxx xxxxxxxx [MSB]
924 01:56:55.801128 -16, [0] xxxxxxxx xxxxxxxx [MSB]
925 01:56:55.801238 -15, [0] xxxxxxxx xxxxxxxx [MSB]
926 01:56:55.801344 -14, [0] xxxxxxxx xxxxxxxx [MSB]
927 01:56:55.801460 -13, [0] xxxxxxxx xxxxxxxx [MSB]
928 01:56:55.801547 -12, [0] xxxxxxxx xxxxxxxx [MSB]
929 01:56:55.801653 -11, [0] xxxxxxxx xxxxxxxx [MSB]
930 01:56:55.801758 -10, [0] xxxxxxxx xxxxxxxx [MSB]
931 01:56:55.801863 -9, [0] xxxxxxxx xxxxxxxx [MSB]
932 01:56:55.801968 -8, [0] xxxxxxxx xxxxxxxx [MSB]
933 01:56:55.802072 -7, [0] xxxxxxxx xxxxxxxx [MSB]
934 01:56:55.802177 -6, [0] xxxxxxxx xxxxxxxx [MSB]
935 01:56:55.802281 -5, [0] xxxxxxxx xxxxxxxx [MSB]
936 01:56:55.802385 -4, [0] xxxxxxxx oxxxxxxx [MSB]
937 01:56:55.802489 -3, [0] xxxxxxxx oxxxxxxx [MSB]
938 01:56:55.802592 -2, [0] xxxoxxxx oxxoxxxx [MSB]
939 01:56:55.802696 -1, [0] xxxoxxxx oxxoxxxx [MSB]
940 01:56:55.802800 0, [0] xxxoxxxx oxxoxxxx [MSB]
941 01:56:55.802905 1, [0] xxxoxoxx ooxoooxx [MSB]
942 01:56:55.803010 2, [0] xxxoxoox ooxoooox [MSB]
943 01:56:55.803118 3, [0] xxxoxoox ooxoooox [MSB]
944 01:56:55.803222 4, [0] xxxoxoox ooxooooo [MSB]
945 01:56:55.803326 5, [0] oxxooooo ooxooooo [MSB]
946 01:56:55.803430 6, [0] oooooooo ooxooooo [MSB]
947 01:56:55.803534 32, [0] oooxoooo oooooooo [MSB]
948 01:56:55.803639 33, [0] oooxoooo xooooooo [MSB]
949 01:56:55.803749 34, [0] oooxoooo xooxoooo [MSB]
950 01:56:55.803854 35, [0] oooxoooo xxoxxooo [MSB]
951 01:56:55.803958 36, [0] oooxoxoo xxoxxoxo [MSB]
952 01:56:55.804062 37, [0] oooxoxxo xxoxxxxo [MSB]
953 01:56:55.804166 38, [0] oooxoxxx xxoxxxxo [MSB]
954 01:56:55.804270 39, [0] oooxoxxx xxoxxxxx [MSB]
955 01:56:55.804373 40, [0] ooxxxxxx xxoxxxxx [MSB]
956 01:56:55.804476 41, [0] xxxxxxxx xxoxxxxx [MSB]
957 01:56:55.804580 42, [0] xxxxxxxx xxxxxxxx [MSB]
958 01:56:55.804683 iDelay=42, Bit 0, Center 22 (5 ~ 40) 36
959 01:56:55.804785 iDelay=42, Bit 1, Center 23 (6 ~ 40) 35
960 01:56:55.804888 iDelay=42, Bit 2, Center 22 (6 ~ 39) 34
961 01:56:55.804989 iDelay=42, Bit 3, Center 14 (-2 ~ 31) 34
962 01:56:55.805091 iDelay=42, Bit 4, Center 22 (5 ~ 39) 35
963 01:56:55.805193 iDelay=42, Bit 5, Center 18 (1 ~ 35) 35
964 01:56:55.805294 iDelay=42, Bit 6, Center 19 (2 ~ 36) 35
965 01:56:55.805395 iDelay=42, Bit 7, Center 21 (5 ~ 37) 33
966 01:56:55.805504 iDelay=42, Bit 8, Center 14 (-4 ~ 32) 37
967 01:56:55.805607 iDelay=42, Bit 9, Center 17 (1 ~ 34) 34
968 01:56:55.805709 iDelay=42, Bit 10, Center 24 (7 ~ 41) 35
969 01:56:55.805810 iDelay=42, Bit 11, Center 15 (-2 ~ 33) 36
970 01:56:55.805913 iDelay=42, Bit 12, Center 17 (1 ~ 34) 34
971 01:56:55.806014 iDelay=42, Bit 13, Center 18 (1 ~ 36) 36
972 01:56:55.806115 iDelay=42, Bit 14, Center 18 (2 ~ 35) 34
973 01:56:55.806216 iDelay=42, Bit 15, Center 21 (4 ~ 38) 35
974 01:56:55.806317 ==
975 01:56:55.806420 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
976 01:56:55.806522 fsp= 1, odt_onoff= 1, Byte mode= 0
977 01:56:55.806623 ==
978 01:56:55.806725 DQS Delay:
979 01:56:55.806826 DQS0 = 0, DQS1 = 0
980 01:56:55.806928 DQM Delay:
981 01:56:55.807029 DQM0 = 20, DQM1 = 18
982 01:56:55.807129 DQ Delay:
983 01:56:55.807230 DQ0 =22, DQ1 =23, DQ2 =22, DQ3 =14
984 01:56:55.807335 DQ4 =22, DQ5 =18, DQ6 =19, DQ7 =21
985 01:56:55.807437 DQ8 =14, DQ9 =17, DQ10 =24, DQ11 =15
986 01:56:55.807542 DQ12 =17, DQ13 =18, DQ14 =18, DQ15 =21
987 01:56:55.807644
988 01:56:55.807746
989 01:56:55.807847 DramC Write-DBI off
990 01:56:55.807950 ==
991 01:56:55.808052 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
992 01:56:55.808154 fsp= 1, odt_onoff= 1, Byte mode= 0
993 01:56:55.808256 ==
994 01:56:55.808358 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
995 01:56:55.808460
996 01:56:55.808561 Begin, DQ Scan Range 922~1178
997 01:56:55.808663
998 01:56:55.808763
999 01:56:55.808863 TX Vref Scan disable
1000 01:56:55.808964 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1001 01:56:55.809274 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1002 01:56:55.809381 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1003 01:56:55.809499 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1004 01:56:55.809615 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1005 01:56:55.809723 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1006 01:56:55.809830 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1007 01:56:55.809935 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1008 01:56:55.810042 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1009 01:56:55.810147 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1010 01:56:55.810252 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1011 01:56:55.810357 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1012 01:56:55.810462 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1013 01:56:55.810567 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1014 01:56:55.810671 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1015 01:56:55.810775 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1016 01:56:55.810879 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1017 01:56:55.810985 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1018 01:56:55.811090 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1019 01:56:55.811196 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1020 01:56:55.811301 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1021 01:56:55.811405 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1022 01:56:55.811510 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1023 01:56:55.811618 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1024 01:56:55.811723 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1025 01:56:55.811833 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1026 01:56:55.811940 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1027 01:56:55.812046 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1028 01:56:55.812151 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1029 01:56:55.812255 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1030 01:56:55.812360 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1031 01:56:55.812464 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1032 01:56:55.812568 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1033 01:56:55.812672 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1034 01:56:55.812775 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1035 01:56:55.812878 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1036 01:56:55.812981 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1037 01:56:55.813085 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1038 01:56:55.813187 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1039 01:56:55.813290 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1040 01:56:55.813393 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1041 01:56:55.813505 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1042 01:56:55.813617 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1043 01:56:55.813723 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1044 01:56:55.813827 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1045 01:56:55.813931 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1046 01:56:55.814034 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1047 01:56:55.814137 969 |3 6 9|[0] xxxxxxxx ooxoxxxx [MSB]
1048 01:56:55.814240 970 |3 6 10|[0] xxxxxxxx ooxoxxxx [MSB]
1049 01:56:55.814343 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1050 01:56:55.814446 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1051 01:56:55.814548 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1052 01:56:55.814651 974 |3 6 14|[0] xxxxxxxx ooxooooo [MSB]
1053 01:56:55.814754 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1054 01:56:55.814856 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1055 01:56:55.814958 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1056 01:56:55.815061 978 |3 6 18|[0] xooooooo oooooooo [MSB]
1057 01:56:55.815163 990 |3 6 30|[0] oooooooo oooxoxoo [MSB]
1058 01:56:55.815266 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1059 01:56:55.815368 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1060 01:56:55.815470 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1061 01:56:55.815578 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1062 01:56:55.815682 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1063 01:56:55.815785 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1064 01:56:55.815887 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1065 01:56:55.815990 998 |3 6 38|[0] xoxxxxxx xxxxxxxx [MSB]
1066 01:56:55.816092 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1067 01:56:55.816194 Byte0, DQ PI dly=986, DQM PI dly= 986
1068 01:56:55.816295 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1069 01:56:55.816396
1070 01:56:55.816496 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1071 01:56:55.816598
1072 01:56:55.816699 Byte1, DQ PI dly=980, DQM PI dly= 980
1073 01:56:55.816799 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1074 01:56:55.816901
1075 01:56:55.817001 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1076 01:56:55.817103
1077 01:56:55.817202 ==
1078 01:56:55.817303 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1079 01:56:55.817403 fsp= 1, odt_onoff= 1, Byte mode= 0
1080 01:56:55.817516 ==
1081 01:56:55.817622 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1082 01:56:55.817725
1083 01:56:55.817826 Begin, DQ Scan Range 956~1020
1084 01:56:55.817927 Write Rank0 MR14 =0x0
1085 01:56:55.818027
1086 01:56:55.818127 CH=0, VrefRange= 0, VrefLevel = 0
1087 01:56:55.818227 TX Bit0 (983~993) 11 988, Bit8 (970~984) 15 977,
1088 01:56:55.818329 TX Bit1 (980~993) 14 986, Bit9 (973~986) 14 979,
1089 01:56:55.818429 TX Bit2 (982~994) 13 988, Bit10 (977~991) 15 984,
1090 01:56:55.818531 TX Bit3 (977~990) 14 983, Bit11 (971~983) 13 977,
1091 01:56:55.818632 TX Bit4 (980~992) 13 986, Bit12 (975~984) 10 979,
1092 01:56:55.818733 TX Bit5 (978~991) 14 984, Bit13 (975~984) 10 979,
1093 01:56:55.818834 TX Bit6 (979~991) 13 985, Bit14 (975~989) 15 982,
1094 01:56:55.818935 TX Bit7 (980~993) 14 986, Bit15 (976~991) 16 983,
1095 01:56:55.819036
1096 01:56:55.819135 Write Rank0 MR14 =0x2
1097 01:56:55.819235
1098 01:56:55.819334 CH=0, VrefRange= 0, VrefLevel = 2
1099 01:56:55.819434 TX Bit0 (983~994) 12 988, Bit8 (969~985) 17 977,
1100 01:56:55.819535 TX Bit1 (980~994) 15 987, Bit9 (972~987) 16 979,
1101 01:56:55.819635 TX Bit2 (981~995) 15 988, Bit10 (977~991) 15 984,
1102 01:56:55.819735 TX Bit3 (976~990) 15 983, Bit11 (970~984) 15 977,
1103 01:56:55.819835 TX Bit4 (979~993) 15 986, Bit12 (974~985) 12 979,
1104 01:56:55.819937 TX Bit5 (977~992) 16 984, Bit13 (974~985) 12 979,
1105 01:56:55.820037 TX Bit6 (978~992) 15 985, Bit14 (975~989) 15 982,
1106 01:56:55.820346 TX Bit7 (980~993) 14 986, Bit15 (976~991) 16 983,
1107 01:56:55.820451
1108 01:56:55.820553 Write Rank0 MR14 =0x4
1109 01:56:55.820656
1110 01:56:55.820761 CH=0, VrefRange= 0, VrefLevel = 4
1111 01:56:55.820860 TX Bit0 (982~995) 14 988, Bit8 (970~986) 17 978,
1112 01:56:55.820955 TX Bit1 (980~995) 16 987, Bit9 (972~988) 17 980,
1113 01:56:55.821048 TX Bit2 (980~995) 16 987, Bit10 (976~992) 17 984,
1114 01:56:55.821141 TX Bit3 (976~991) 16 983, Bit11 (970~985) 16 977,
1115 01:56:55.821233 TX Bit4 (979~993) 15 986, Bit12 (974~986) 13 980,
1116 01:56:55.821325 TX Bit5 (977~992) 16 984, Bit13 (974~986) 13 980,
1117 01:56:55.821417 TX Bit6 (978~992) 15 985, Bit14 (974~990) 17 982,
1118 01:56:55.821519 TX Bit7 (979~994) 16 986, Bit15 (976~992) 17 984,
1119 01:56:55.821610
1120 01:56:55.821700 Write Rank0 MR14 =0x6
1121 01:56:55.821790
1122 01:56:55.821880 CH=0, VrefRange= 0, VrefLevel = 6
1123 01:56:55.821971 TX Bit0 (981~996) 16 988, Bit8 (969~987) 19 978,
1124 01:56:55.822063 TX Bit1 (979~996) 18 987, Bit9 (971~989) 19 980,
1125 01:56:55.822155 TX Bit2 (980~997) 18 988, Bit10 (976~993) 18 984,
1126 01:56:55.822247 TX Bit3 (975~991) 17 983, Bit11 (970~986) 17 978,
1127 01:56:55.822338 TX Bit4 (978~994) 17 986, Bit12 (973~987) 15 980,
1128 01:56:55.822429 TX Bit5 (977~992) 16 984, Bit13 (973~988) 16 980,
1129 01:56:55.822521 TX Bit6 (978~993) 16 985, Bit14 (974~990) 17 982,
1130 01:56:55.822612 TX Bit7 (979~995) 17 987, Bit15 (976~993) 18 984,
1131 01:56:55.822702
1132 01:56:55.822792 Write Rank0 MR14 =0x8
1133 01:56:55.822882
1134 01:56:55.822972 CH=0, VrefRange= 0, VrefLevel = 8
1135 01:56:55.823063 TX Bit0 (981~997) 17 989, Bit8 (969~988) 20 978,
1136 01:56:55.823155 TX Bit1 (979~997) 19 988, Bit9 (971~989) 19 980,
1137 01:56:55.823247 TX Bit2 (981~997) 17 989, Bit10 (976~994) 19 985,
1138 01:56:55.823338 TX Bit3 (975~992) 18 983, Bit11 (970~987) 18 978,
1139 01:56:55.823430 TX Bit4 (978~995) 18 986, Bit12 (973~988) 16 980,
1140 01:56:55.823516 TX Bit5 (977~993) 17 985, Bit13 (973~988) 16 980,
1141 01:56:55.823577 TX Bit6 (977~993) 17 985, Bit14 (973~991) 19 982,
1142 01:56:55.823637 TX Bit7 (979~996) 18 987, Bit15 (976~994) 19 985,
1143 01:56:55.823695
1144 01:56:55.823753 Write Rank0 MR14 =0xa
1145 01:56:55.823811
1146 01:56:55.823869 CH=0, VrefRange= 0, VrefLevel = 10
1147 01:56:55.823928 TX Bit0 (980~998) 19 989, Bit8 (969~989) 21 979,
1148 01:56:55.823986 TX Bit1 (979~998) 20 988, Bit9 (970~989) 20 979,
1149 01:56:55.824045 TX Bit2 (979~998) 20 988, Bit10 (976~995) 20 985,
1150 01:56:55.824104 TX Bit3 (975~992) 18 983, Bit11 (969~988) 20 978,
1151 01:56:55.824162 TX Bit4 (978~996) 19 987, Bit12 (972~989) 18 980,
1152 01:56:55.824221 TX Bit5 (977~993) 17 985, Bit13 (973~989) 17 981,
1153 01:56:55.824279 TX Bit6 (977~994) 18 985, Bit14 (972~991) 20 981,
1154 01:56:55.824337 TX Bit7 (978~997) 20 987, Bit15 (975~995) 21 985,
1155 01:56:55.824395
1156 01:56:55.824452 Write Rank0 MR14 =0xc
1157 01:56:55.824510
1158 01:56:55.824567 CH=0, VrefRange= 0, VrefLevel = 12
1159 01:56:55.824625 TX Bit0 (980~998) 19 989, Bit8 (968~989) 22 978,
1160 01:56:55.824684 TX Bit1 (979~998) 20 988, Bit9 (970~990) 21 980,
1161 01:56:55.824743 TX Bit2 (979~999) 21 989, Bit10 (976~996) 21 986,
1162 01:56:55.824801 TX Bit3 (975~992) 18 983, Bit11 (969~988) 20 978,
1163 01:56:55.824860 TX Bit4 (978~997) 20 987, Bit12 (971~989) 19 980,
1164 01:56:55.824919 TX Bit5 (977~994) 18 985, Bit13 (972~989) 18 980,
1165 01:56:55.824977 TX Bit6 (977~995) 19 986, Bit14 (973~991) 19 982,
1166 01:56:55.825036 TX Bit7 (978~998) 21 988, Bit15 (976~995) 20 985,
1167 01:56:55.825094
1168 01:56:55.825151 Write Rank0 MR14 =0xe
1169 01:56:55.825209
1170 01:56:55.825267 CH=0, VrefRange= 0, VrefLevel = 14
1171 01:56:55.825325 TX Bit0 (980~999) 20 989, Bit8 (969~989) 21 979,
1172 01:56:55.825383 TX Bit1 (978~999) 22 988, Bit9 (969~990) 22 979,
1173 01:56:55.825454 TX Bit2 (980~999) 20 989, Bit10 (975~996) 22 985,
1174 01:56:55.825547 TX Bit3 (975~992) 18 983, Bit11 (969~989) 21 979,
1175 01:56:55.825639 TX Bit4 (978~997) 20 987, Bit12 (972~989) 18 980,
1176 01:56:55.825731 TX Bit5 (976~995) 20 985, Bit13 (972~989) 18 980,
1177 01:56:55.825823 TX Bit6 (977~995) 19 986, Bit14 (972~992) 21 982,
1178 01:56:55.825900 TX Bit7 (978~998) 21 988, Bit15 (975~996) 22 985,
1179 01:56:55.825959
1180 01:56:55.826017 Write Rank0 MR14 =0x10
1181 01:56:55.826075
1182 01:56:55.826132 CH=0, VrefRange= 0, VrefLevel = 16
1183 01:56:55.826191 TX Bit0 (979~999) 21 989, Bit8 (968~990) 23 979,
1184 01:56:55.826250 TX Bit1 (978~999) 22 988, Bit9 (969~990) 22 979,
1185 01:56:55.826309 TX Bit2 (979~999) 21 989, Bit10 (975~997) 23 986,
1186 01:56:55.826367 TX Bit3 (975~993) 19 984, Bit11 (969~989) 21 979,
1187 01:56:55.826426 TX Bit4 (978~998) 21 988, Bit12 (971~990) 20 980,
1188 01:56:55.826484 TX Bit5 (976~995) 20 985, Bit13 (971~989) 19 980,
1189 01:56:55.826543 TX Bit6 (977~997) 21 987, Bit14 (972~992) 21 982,
1190 01:56:55.826601 TX Bit7 (978~999) 22 988, Bit15 (974~997) 24 985,
1191 01:56:55.826660
1192 01:56:55.826718 Write Rank0 MR14 =0x12
1193 01:56:55.826775
1194 01:56:55.826839 CH=0, VrefRange= 0, VrefLevel = 18
1195 01:56:55.826899 TX Bit0 (979~1000) 22 989, Bit8 (968~990) 23 979,
1196 01:56:55.826958 TX Bit1 (978~999) 22 988, Bit9 (969~991) 23 980,
1197 01:56:55.827017 TX Bit2 (978~1000) 23 989, Bit10 (975~997) 23 986,
1198 01:56:55.827075 TX Bit3 (974~993) 20 983, Bit11 (969~989) 21 979,
1199 01:56:55.827134 TX Bit4 (978~998) 21 988, Bit12 (970~990) 21 980,
1200 01:56:55.827192 TX Bit5 (976~995) 20 985, Bit13 (971~990) 20 980,
1201 01:56:55.827251 TX Bit6 (976~998) 23 987, Bit14 (971~993) 23 982,
1202 01:56:55.827309 TX Bit7 (978~999) 22 988, Bit15 (974~997) 24 985,
1203 01:56:55.827367
1204 01:56:55.827425 Write Rank0 MR14 =0x14
1205 01:56:55.827482
1206 01:56:55.827540 CH=0, VrefRange= 0, VrefLevel = 20
1207 01:56:55.827598 TX Bit0 (979~1000) 22 989, Bit8 (968~990) 23 979,
1208 01:56:55.827854 TX Bit1 (978~999) 22 988, Bit9 (969~991) 23 980,
1209 01:56:55.827922 TX Bit2 (978~1000) 23 989, Bit10 (975~997) 23 986,
1210 01:56:55.827982 TX Bit3 (974~994) 21 984, Bit11 (969~990) 22 979,
1211 01:56:55.828042 TX Bit4 (977~999) 23 988, Bit12 (970~990) 21 980,
1212 01:56:55.828102 TX Bit5 (976~997) 22 986, Bit13 (971~991) 21 981,
1213 01:56:55.828161 TX Bit6 (976~998) 23 987, Bit14 (971~994) 24 982,
1214 01:56:55.828219 TX Bit7 (977~1000) 24 988, Bit15 (974~997) 24 985,
1215 01:56:55.828278
1216 01:56:55.828337 Write Rank0 MR14 =0x16
1217 01:56:55.828396
1218 01:56:55.828454 CH=0, VrefRange= 0, VrefLevel = 22
1219 01:56:55.828512 TX Bit0 (978~1000) 23 989, Bit8 (968~991) 24 979,
1220 01:56:55.828570 TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980,
1221 01:56:55.828629 TX Bit2 (978~1000) 23 989, Bit10 (974~997) 24 985,
1222 01:56:55.828688 TX Bit3 (974~994) 21 984, Bit11 (968~990) 23 979,
1223 01:56:55.828746 TX Bit4 (977~999) 23 988, Bit12 (970~991) 22 980,
1224 01:56:55.828805 TX Bit5 (976~997) 22 986, Bit13 (970~991) 22 980,
1225 01:56:55.828863 TX Bit6 (976~999) 24 987, Bit14 (970~994) 25 982,
1226 01:56:55.828921 TX Bit7 (977~1000) 24 988, Bit15 (974~997) 24 985,
1227 01:56:55.828979
1228 01:56:55.829036 Write Rank0 MR14 =0x18
1229 01:56:55.829094
1230 01:56:55.829152 CH=0, VrefRange= 0, VrefLevel = 24
1231 01:56:55.829210 TX Bit0 (978~1001) 24 989, Bit8 (967~991) 25 979,
1232 01:56:55.829268 TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980,
1233 01:56:55.829327 TX Bit2 (978~1001) 24 989, Bit10 (974~998) 25 986,
1234 01:56:55.829386 TX Bit3 (973~995) 23 984, Bit11 (968~991) 24 979,
1235 01:56:55.829454 TX Bit4 (977~999) 23 988, Bit12 (970~992) 23 981,
1236 01:56:55.829515 TX Bit5 (975~998) 24 986, Bit13 (970~991) 22 980,
1237 01:56:55.829574 TX Bit6 (976~999) 24 987, Bit14 (970~995) 26 982,
1238 01:56:55.829633 TX Bit7 (977~1000) 24 988, Bit15 (973~997) 25 985,
1239 01:56:55.829691
1240 01:56:55.829749 Write Rank0 MR14 =0x1a
1241 01:56:55.829807
1242 01:56:55.829865 CH=0, VrefRange= 0, VrefLevel = 26
1243 01:56:55.829923 TX Bit0 (978~1001) 24 989, Bit8 (967~991) 25 979,
1244 01:56:55.829982 TX Bit1 (977~1000) 24 988, Bit9 (968~992) 25 980,
1245 01:56:55.830041 TX Bit2 (978~1001) 24 989, Bit10 (974~998) 25 986,
1246 01:56:55.830109 TX Bit3 (972~995) 24 983, Bit11 (968~991) 24 979,
1247 01:56:55.830167 TX Bit4 (977~1000) 24 988, Bit12 (969~992) 24 980,
1248 01:56:55.830226 TX Bit5 (975~999) 25 987, Bit13 (970~992) 23 981,
1249 01:56:55.830285 TX Bit6 (976~999) 24 987, Bit14 (970~995) 26 982,
1250 01:56:55.830343 TX Bit7 (977~1001) 25 989, Bit15 (973~997) 25 985,
1251 01:56:55.830401
1252 01:56:55.830459 Write Rank0 MR14 =0x1c
1253 01:56:55.830516
1254 01:56:55.830574 CH=0, VrefRange= 0, VrefLevel = 28
1255 01:56:55.830632 TX Bit0 (978~1002) 25 990, Bit8 (967~990) 24 978,
1256 01:56:55.830690 TX Bit1 (977~1001) 25 989, Bit9 (968~993) 26 980,
1257 01:56:55.830748 TX Bit2 (977~1002) 26 989, Bit10 (973~998) 26 985,
1258 01:56:55.830807 TX Bit3 (972~996) 25 984, Bit11 (968~991) 24 979,
1259 01:56:55.830865 TX Bit4 (977~1000) 24 988, Bit12 (969~993) 25 981,
1260 01:56:55.830923 TX Bit5 (975~999) 25 987, Bit13 (969~992) 24 980,
1261 01:56:55.830981 TX Bit6 (976~999) 24 987, Bit14 (969~996) 28 982,
1262 01:56:55.831040 TX Bit7 (977~1001) 25 989, Bit15 (973~998) 26 985,
1263 01:56:55.831098
1264 01:56:55.831155 Write Rank0 MR14 =0x1e
1265 01:56:55.831213
1266 01:56:55.831271 CH=0, VrefRange= 0, VrefLevel = 30
1267 01:56:55.831328 TX Bit0 (978~1002) 25 990, Bit8 (967~990) 24 978,
1268 01:56:55.831387 TX Bit1 (977~1001) 25 989, Bit9 (968~993) 26 980,
1269 01:56:55.831445 TX Bit2 (977~1002) 26 989, Bit10 (973~998) 26 985,
1270 01:56:55.831503 TX Bit3 (972~996) 25 984, Bit11 (968~991) 24 979,
1271 01:56:55.831574 TX Bit4 (977~1000) 24 988, Bit12 (969~993) 25 981,
1272 01:56:55.831636 TX Bit5 (975~999) 25 987, Bit13 (969~992) 24 980,
1273 01:56:55.831694 TX Bit6 (976~999) 24 987, Bit14 (969~996) 28 982,
1274 01:56:55.831752 TX Bit7 (977~1001) 25 989, Bit15 (973~998) 26 985,
1275 01:56:55.831810
1276 01:56:55.831868 Write Rank0 MR14 =0x20
1277 01:56:55.831925
1278 01:56:55.831983 CH=0, VrefRange= 0, VrefLevel = 32
1279 01:56:55.832041 TX Bit0 (978~1002) 25 990, Bit8 (967~990) 24 978,
1280 01:56:55.832099 TX Bit1 (977~1001) 25 989, Bit9 (968~993) 26 980,
1281 01:56:55.832157 TX Bit2 (977~1002) 26 989, Bit10 (973~998) 26 985,
1282 01:56:55.832216 TX Bit3 (972~996) 25 984, Bit11 (968~991) 24 979,
1283 01:56:55.832275 TX Bit4 (977~1000) 24 988, Bit12 (969~993) 25 981,
1284 01:56:55.832333 TX Bit5 (975~999) 25 987, Bit13 (969~992) 24 980,
1285 01:56:55.832391 TX Bit6 (976~999) 24 987, Bit14 (969~996) 28 982,
1286 01:56:55.832449 TX Bit7 (977~1001) 25 989, Bit15 (973~998) 26 985,
1287 01:56:55.832507
1288 01:56:55.832564 Write Rank0 MR14 =0x22
1289 01:56:55.832622
1290 01:56:55.832680 CH=0, VrefRange= 0, VrefLevel = 34
1291 01:56:55.832738 TX Bit0 (978~1002) 25 990, Bit8 (967~990) 24 978,
1292 01:56:55.832797 TX Bit1 (977~1001) 25 989, Bit9 (968~993) 26 980,
1293 01:56:55.832855 TX Bit2 (977~1002) 26 989, Bit10 (973~998) 26 985,
1294 01:56:55.832914 TX Bit3 (972~996) 25 984, Bit11 (968~991) 24 979,
1295 01:56:55.832972 TX Bit4 (977~1000) 24 988, Bit12 (969~993) 25 981,
1296 01:56:55.833030 TX Bit5 (975~999) 25 987, Bit13 (969~992) 24 980,
1297 01:56:55.833087 TX Bit6 (976~999) 24 987, Bit14 (969~996) 28 982,
1298 01:56:55.833145 TX Bit7 (977~1001) 25 989, Bit15 (973~998) 26 985,
1299 01:56:55.833203
1300 01:56:55.833260 Write Rank0 MR14 =0x24
1301 01:56:55.833317
1302 01:56:55.833374 CH=0, VrefRange= 0, VrefLevel = 36
1303 01:56:55.833475 TX Bit0 (978~1002) 25 990, Bit8 (967~990) 24 978,
1304 01:56:55.833580 TX Bit1 (977~1001) 25 989, Bit9 (968~993) 26 980,
1305 01:56:55.833643 TX Bit2 (977~1002) 26 989, Bit10 (973~998) 26 985,
1306 01:56:55.833702 TX Bit3 (972~996) 25 984, Bit11 (968~991) 24 979,
1307 01:56:55.833958 TX Bit4 (977~1000) 24 988, Bit12 (969~993) 25 981,
1308 01:56:55.834027 TX Bit5 (975~999) 25 987, Bit13 (969~992) 24 980,
1309 01:56:55.834087 TX Bit6 (976~999) 24 987, Bit14 (969~996) 28 982,
1310 01:56:55.834146 TX Bit7 (977~1001) 25 989, Bit15 (973~998) 26 985,
1311 01:56:55.834204
1312 01:56:55.834261
1313 01:56:55.834319 TX Vref found, early break! 379< 381
1314 01:56:55.834378 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
1315 01:56:55.834436 u1DelayCellOfst[0]=7 cells (6 PI)
1316 01:56:55.834495 u1DelayCellOfst[1]=6 cells (5 PI)
1317 01:56:55.834552 u1DelayCellOfst[2]=6 cells (5 PI)
1318 01:56:55.834610 u1DelayCellOfst[3]=0 cells (0 PI)
1319 01:56:55.834668 u1DelayCellOfst[4]=5 cells (4 PI)
1320 01:56:55.834725 u1DelayCellOfst[5]=3 cells (3 PI)
1321 01:56:55.834782 u1DelayCellOfst[6]=3 cells (3 PI)
1322 01:56:55.834840 u1DelayCellOfst[7]=6 cells (5 PI)
1323 01:56:55.834898 Byte0, DQ PI dly=984, DQM PI dly= 987
1324 01:56:55.834956 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1325 01:56:55.835014
1326 01:56:55.835071 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1327 01:56:55.835130
1328 01:56:55.835187 u1DelayCellOfst[8]=0 cells (0 PI)
1329 01:56:55.835245 u1DelayCellOfst[9]=2 cells (2 PI)
1330 01:56:55.835302 u1DelayCellOfst[10]=9 cells (7 PI)
1331 01:56:55.835360 u1DelayCellOfst[11]=1 cells (1 PI)
1332 01:56:55.835418 u1DelayCellOfst[12]=3 cells (3 PI)
1333 01:56:55.835475 u1DelayCellOfst[13]=2 cells (2 PI)
1334 01:56:55.835540 u1DelayCellOfst[14]=5 cells (4 PI)
1335 01:56:55.835621 u1DelayCellOfst[15]=9 cells (7 PI)
1336 01:56:55.835681 Byte1, DQ PI dly=978, DQM PI dly= 981
1337 01:56:55.835739 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1338 01:56:55.835797
1339 01:56:55.835855 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1340 01:56:55.835913
1341 01:56:55.835971 Write Rank0 MR14 =0x1c
1342 01:56:55.836028
1343 01:56:55.836086 Final TX Range 0 Vref 28
1344 01:56:55.836143
1345 01:56:55.836200 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1346 01:56:55.836259
1347 01:56:55.836315 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1348 01:56:55.836374 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1349 01:56:55.836433 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1350 01:56:55.836500 Write Rank0 MR3 =0xb0
1351 01:56:55.836570 DramC Write-DBI on
1352 01:56:55.836629 ==
1353 01:56:55.836688 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1354 01:56:55.836746 fsp= 1, odt_onoff= 1, Byte mode= 0
1355 01:56:55.836804 ==
1356 01:56:55.836862 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1357 01:56:55.836920
1358 01:56:55.836977 Begin, DQ Scan Range 701~765
1359 01:56:55.837033
1360 01:56:55.837090
1361 01:56:55.837148 TX Vref Scan disable
1362 01:56:55.837205 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1363 01:56:55.837265 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1364 01:56:55.837324 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1365 01:56:55.837383 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1366 01:56:55.837452 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1367 01:56:55.837512 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1368 01:56:55.837582 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1369 01:56:55.837642 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1370 01:56:55.837702 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1371 01:56:55.837761 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1372 01:56:55.837821 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1373 01:56:55.837879 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1374 01:56:55.837938 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1375 01:56:55.837996 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1376 01:56:55.838056 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1377 01:56:55.838114 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1378 01:56:55.838173 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1379 01:56:55.838231 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1380 01:56:55.838290 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1381 01:56:55.838349 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1382 01:56:55.838407 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1383 01:56:55.838466 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1384 01:56:55.838525 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1385 01:56:55.838584 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1386 01:56:55.838642 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1387 01:56:55.838700 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1388 01:56:55.838759 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1389 01:56:55.838817 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1390 01:56:55.838875 Byte0, DQ PI dly=732, DQM PI dly= 732
1391 01:56:55.838933 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1392 01:56:55.838991
1393 01:56:55.839049 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1394 01:56:55.839107
1395 01:56:55.839164 Byte1, DQ PI dly=725, DQM PI dly= 725
1396 01:56:55.839222 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
1397 01:56:55.839279
1398 01:56:55.839337 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
1399 01:56:55.839395
1400 01:56:55.839452 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1401 01:56:55.839510 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1402 01:56:55.839576 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1403 01:56:55.839635 Write Rank0 MR3 =0x30
1404 01:56:55.839693 DramC Write-DBI off
1405 01:56:55.839750
1406 01:56:55.839807 [DATLAT]
1407 01:56:55.839864 Freq=1600, CH0 RK0, use_rxtx_scan=0
1408 01:56:55.839932
1409 01:56:55.839990 DATLAT Default: 0xf
1410 01:56:55.840047 7, 0xFFFF, sum=0
1411 01:56:55.840105 8, 0xFFFF, sum=0
1412 01:56:55.840163 9, 0xFFFF, sum=0
1413 01:56:55.840222 10, 0xFFFF, sum=0
1414 01:56:55.840281 11, 0xFFFF, sum=0
1415 01:56:55.840339 12, 0xFFFF, sum=0
1416 01:56:55.840398 13, 0xFFFF, sum=0
1417 01:56:55.840456 14, 0x0, sum=1
1418 01:56:55.840514 15, 0x0, sum=2
1419 01:56:55.840573 16, 0x0, sum=3
1420 01:56:55.840631 17, 0x0, sum=4
1421 01:56:55.840689 pattern=2 first_step=14 total pass=5 best_step=16
1422 01:56:55.840747 ==
1423 01:56:55.840805 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1424 01:56:55.840863 fsp= 1, odt_onoff= 1, Byte mode= 0
1425 01:56:55.840921 ==
1426 01:56:55.840979 Start DQ dly to find pass range UseTestEngine =1
1427 01:56:55.841037 x-axis: bit #, y-axis: DQ dly (-127~63)
1428 01:56:55.841094 RX Vref Scan = 1
1429 01:56:55.841152
1430 01:56:55.841209 RX Vref found, early break!
1431 01:56:55.841266
1432 01:56:55.841323 Final RX Vref 11, apply to both rank0 and 1
1433 01:56:55.841381 ==
1434 01:56:55.841647 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1435 01:56:55.841715 fsp= 1, odt_onoff= 1, Byte mode= 0
1436 01:56:55.841775 ==
1437 01:56:55.841833 DQS Delay:
1438 01:56:55.841891 DQS0 = 0, DQS1 = 0
1439 01:56:55.841949 DQM Delay:
1440 01:56:55.842006 DQM0 = 19, DQM1 = 17
1441 01:56:55.842064 DQ Delay:
1442 01:56:55.842120 DQ0 =21, DQ1 =21, DQ2 =23, DQ3 =14
1443 01:56:55.842178 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =20
1444 01:56:55.842235 DQ8 =14, DQ9 =17, DQ10 =23, DQ11 =15
1445 01:56:55.842293 DQ12 =17, DQ13 =16, DQ14 =18, DQ15 =20
1446 01:56:55.842350
1447 01:56:55.842407
1448 01:56:55.842464
1449 01:56:55.842521 [DramC_TX_OE_Calibration] TA2
1450 01:56:55.842578 Original DQ_B0 (3 6) =30, OEN = 27
1451 01:56:55.842635 Original DQ_B1 (3 6) =30, OEN = 27
1452 01:56:55.842694 23, 0x0, End_B0=23 End_B1=23
1453 01:56:55.842753 24, 0x0, End_B0=24 End_B1=24
1454 01:56:55.842811 25, 0x0, End_B0=25 End_B1=25
1455 01:56:55.842869 26, 0x0, End_B0=26 End_B1=26
1456 01:56:55.842927 27, 0x0, End_B0=27 End_B1=27
1457 01:56:55.842985 28, 0x0, End_B0=28 End_B1=28
1458 01:56:55.843049 29, 0x0, End_B0=29 End_B1=29
1459 01:56:55.843109 30, 0x0, End_B0=30 End_B1=30
1460 01:56:55.843169 31, 0xFFFF, End_B0=30 End_B1=30
1461 01:56:55.843227 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1462 01:56:55.843286 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1463 01:56:55.843344
1464 01:56:55.843401
1465 01:56:55.843458 Write Rank0 MR23 =0x3f
1466 01:56:55.843516 [DQSOSC]
1467 01:56:55.843612 [DQSOSCAuto] RK0, (LSB)MR18= 0xbfbf, (MSB)MR19= 0x202, tDQSOscB0 = 448 ps tDQSOscB1 = 448 ps
1468 01:56:55.843705 CH0_RK0: MR19=0x202, MR18=0xBFBF, DQSOSC=448, MR23=63, INC=12, DEC=18
1469 01:56:55.843766 Write Rank0 MR23 =0x3f
1470 01:56:55.843825 [DQSOSC]
1471 01:56:55.843883 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
1472 01:56:55.843943 CH0 RK0: MR19=202, MR18=C0C0
1473 01:56:55.844002 [RankSwap] Rank num 2, (Multi 1), Rank 1
1474 01:56:55.844060 Write Rank0 MR2 =0xad
1475 01:56:55.844117 [Write Leveling]
1476 01:56:55.844175 delay byte0 byte1 byte2 byte3
1477 01:56:55.844232
1478 01:56:55.844289 10 0 0
1479 01:56:55.844348 11 0 0
1480 01:56:55.844406 12 0 0
1481 01:56:55.844465 13 0 0
1482 01:56:55.844523 14 0 0
1483 01:56:55.844581 15 0 0
1484 01:56:55.844639 16 0 0
1485 01:56:55.844698 17 0 0
1486 01:56:55.844757 18 0 0
1487 01:56:55.844815 19 0 0
1488 01:56:55.844874 20 0 0
1489 01:56:55.844932 21 0 0
1490 01:56:55.844990 22 0 0
1491 01:56:55.845048 23 0 0
1492 01:56:55.845106 24 0 ff
1493 01:56:55.845165 25 0 ff
1494 01:56:55.845223 26 ff ff
1495 01:56:55.845282 27 ff ff
1496 01:56:55.845340 28 ff ff
1497 01:56:55.845398 29 ff ff
1498 01:56:55.845474 30 ff ff
1499 01:56:55.845541 31 ff ff
1500 01:56:55.845601 32 ff ff
1501 01:56:55.845660 pass bytecount = 0xff (0xff: all bytes pass)
1502 01:56:55.845718
1503 01:56:55.845776 DQS0 dly: 26
1504 01:56:55.845833 DQS1 dly: 24
1505 01:56:55.845890 Write Rank0 MR2 =0x2d
1506 01:56:55.845948 [RankSwap] Rank num 2, (Multi 1), Rank 0
1507 01:56:55.846006 Write Rank1 MR1 =0xd6
1508 01:56:55.846064 [Gating]
1509 01:56:55.846121 ==
1510 01:56:55.846178 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1511 01:56:55.846237 fsp= 1, odt_onoff= 1, Byte mode= 0
1512 01:56:55.846294 ==
1513 01:56:55.846351 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1514 01:56:55.846410 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1515 01:56:55.846470 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1516 01:56:55.846529 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1517 01:56:55.846593 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1518 01:56:55.846655 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1519 01:56:55.846714 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1520 01:56:55.846772 [Byte 0] Lead/lag falling Transition (3, 1, 24)
1521 01:56:55.846830 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1522 01:56:55.846889 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1523 01:56:55.846948 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1524 01:56:55.847006 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1525 01:56:55.847065 3 2 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1526 01:56:55.847124 3 2 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1527 01:56:55.847183 [Byte 0] Lead/lag Transition tap number (7)
1528 01:56:55.847240 3 2 20 |303 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1529 01:56:55.847299 3 2 24 |3534 404 |(11 11)(11 11) |(0 0)(0 0)| 0
1530 01:56:55.847357 3 2 28 |3534 2322 |(11 11)(11 11) |(0 0)(0 0)| 0
1531 01:56:55.847416 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1532 01:56:55.847475 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1533 01:56:55.847541 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1534 01:56:55.847640 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1535 01:56:55.847721 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1536 01:56:55.847826 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1537 01:56:55.847923 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1538 01:56:55.848016 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1539 01:56:55.848109 [Byte 1] Lead/lag falling Transition (3, 3, 28)
1540 01:56:55.848201 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1541 01:56:55.848294 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1542 01:56:55.848387 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1543 01:56:55.848480 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1544 01:56:55.848573 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1545 01:56:55.848666 3 4 20 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1546 01:56:55.848759 3 4 24 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
1547 01:56:55.848852 3 4 28 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1548 01:56:55.848944 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1549 01:56:55.849037 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1550 01:56:55.849130 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1551 01:56:55.849222 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1552 01:56:55.849315 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1553 01:56:55.849408 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1554 01:56:55.849512 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1555 01:56:55.849824 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 01:56:55.849931 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1557 01:56:55.850028 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 01:56:55.850122 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 01:56:55.850217 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 01:56:55.850310 [Byte 0] Lead/lag falling Transition (3, 6, 12)
1561 01:56:55.850402 [Byte 1] Lead/lag falling Transition (3, 6, 12)
1562 01:56:55.850493 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1563 01:56:55.850617 [Byte 0] Lead/lag Transition tap number (2)
1564 01:56:55.850726 3 6 20 |3736 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1565 01:56:55.850829 [Byte 1] Lead/lag Transition tap number (3)
1566 01:56:55.850921 3 6 24 |202 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1567 01:56:55.851015 3 6 28 |4646 1c1c |(0 0)(1 1) |(0 0)(0 0)| 0
1568 01:56:55.851108 [Byte 0]First pass (3, 6, 28)
1569 01:56:55.851198 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1570 01:56:55.851291 [Byte 1]First pass (3, 7, 0)
1571 01:56:55.851382 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1572 01:56:55.851475 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1573 01:56:55.851567 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1574 01:56:55.851660 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1575 01:56:55.851753 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1576 01:56:55.851846 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1577 01:56:55.851938 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1578 01:56:55.852034 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1579 01:56:55.852127 All bytes gating window > 1UI, Early break!
1580 01:56:55.852217
1581 01:56:55.852307 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 16)
1582 01:56:55.852396
1583 01:56:55.852486 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
1584 01:56:55.852575
1585 01:56:55.852664
1586 01:56:55.852753
1587 01:56:55.852843 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
1588 01:56:55.852932
1589 01:56:55.853025 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
1590 01:56:55.853087
1591 01:56:55.853145
1592 01:56:55.853203 Write Rank1 MR1 =0x56
1593 01:56:55.853260
1594 01:56:55.853318 best RODT dly(2T, 0.5T) = (2, 3)
1595 01:56:55.853375
1596 01:56:55.853441 best RODT dly(2T, 0.5T) = (2, 3)
1597 01:56:55.853502 ==
1598 01:56:55.853560 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1599 01:56:55.853618 fsp= 1, odt_onoff= 1, Byte mode= 0
1600 01:56:55.853676 ==
1601 01:56:55.853734 Start DQ dly to find pass range UseTestEngine =0
1602 01:56:55.853792 x-axis: bit #, y-axis: DQ dly (-127~63)
1603 01:56:55.853850 RX Vref Scan = 0
1604 01:56:55.853907 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1605 01:56:55.853966 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1606 01:56:55.854026 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1607 01:56:55.854085 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1608 01:56:55.854144 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1609 01:56:55.854202 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1610 01:56:55.854260 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1611 01:56:55.854318 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1612 01:56:55.854376 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1613 01:56:55.854434 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1614 01:56:55.854491 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1615 01:56:55.854550 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1616 01:56:55.854609 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1617 01:56:55.854667 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1618 01:56:55.854726 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1619 01:56:55.854784 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1620 01:56:55.854842 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1621 01:56:55.854900 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1622 01:56:55.854959 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1623 01:56:55.855017 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1624 01:56:55.855074 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1625 01:56:55.855132 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1626 01:56:55.855190 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1627 01:56:55.855248 -3, [0] xxxxxxxx oxxxxxxx [MSB]
1628 01:56:55.855306 -2, [0] xxxxxxxx oxxxxxxx [MSB]
1629 01:56:55.855364 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1630 01:56:55.855422 0, [0] xxxoxxxx ooxoooxx [MSB]
1631 01:56:55.855481 1, [0] xxxoxoox ooxoooxx [MSB]
1632 01:56:55.855540 2, [0] xxxoxoox ooxoooxx [MSB]
1633 01:56:55.855598 3, [0] xoxooooo ooxoooox [MSB]
1634 01:56:55.855657 4, [0] xoxooooo ooxooooo [MSB]
1635 01:56:55.855714 31, [0] oooxoooo oooooooo [MSB]
1636 01:56:55.855772 32, [0] oooxoooo oooooooo [MSB]
1637 01:56:55.855830 33, [0] oooxoooo xooooooo [MSB]
1638 01:56:55.855888 34, [0] oooxoooo xooooooo [MSB]
1639 01:56:55.855946 35, [0] oooxoxxo xxoxoooo [MSB]
1640 01:56:55.856004 36, [0] oooxoxxo xxoxxoxo [MSB]
1641 01:56:55.856062 37, [0] oooxoxxx xxoxxxxo [MSB]
1642 01:56:55.856120 38, [0] oooxoxxx xxoxxxxo [MSB]
1643 01:56:55.856187 39, [0] ooxxxxxx xxoxxxxx [MSB]
1644 01:56:55.856247 40, [0] xoxxxxxx xxoxxxxx [MSB]
1645 01:56:55.856306 41, [0] xxxxxxxx xxoxxxxx [MSB]
1646 01:56:55.856365 42, [0] xxxxxxxx xxxxxxxx [MSB]
1647 01:56:55.856423 iDelay=42, Bit 0, Center 22 (5 ~ 39) 35
1648 01:56:55.856481 iDelay=42, Bit 1, Center 21 (3 ~ 40) 38
1649 01:56:55.856538 iDelay=42, Bit 2, Center 21 (5 ~ 38) 34
1650 01:56:55.856595 iDelay=42, Bit 3, Center 14 (-1 ~ 30) 32
1651 01:56:55.856652 iDelay=42, Bit 4, Center 20 (3 ~ 38) 36
1652 01:56:55.856709 iDelay=42, Bit 5, Center 17 (1 ~ 34) 34
1653 01:56:55.856767 iDelay=42, Bit 6, Center 17 (1 ~ 34) 34
1654 01:56:55.856824 iDelay=42, Bit 7, Center 19 (3 ~ 36) 34
1655 01:56:55.856881 iDelay=42, Bit 8, Center 14 (-3 ~ 32) 36
1656 01:56:55.856938 iDelay=42, Bit 9, Center 17 (0 ~ 34) 35
1657 01:56:55.856996 iDelay=42, Bit 10, Center 23 (5 ~ 41) 37
1658 01:56:55.857053 iDelay=42, Bit 11, Center 16 (-1 ~ 34) 36
1659 01:56:55.857111 iDelay=42, Bit 12, Center 17 (0 ~ 35) 36
1660 01:56:55.857168 iDelay=42, Bit 13, Center 18 (0 ~ 36) 37
1661 01:56:55.857225 iDelay=42, Bit 14, Center 19 (3 ~ 35) 33
1662 01:56:55.857283 iDelay=42, Bit 15, Center 21 (4 ~ 38) 35
1663 01:56:55.857340 ==
1664 01:56:55.857398 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1665 01:56:55.857461 fsp= 1, odt_onoff= 1, Byte mode= 0
1666 01:56:55.857520 ==
1667 01:56:55.857577 DQS Delay:
1668 01:56:55.857634 DQS0 = 0, DQS1 = 0
1669 01:56:55.857692 DQM Delay:
1670 01:56:55.857749 DQM0 = 18, DQM1 = 18
1671 01:56:55.857807 DQ Delay:
1672 01:56:55.857863 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =14
1673 01:56:55.857921 DQ4 =20, DQ5 =17, DQ6 =17, DQ7 =19
1674 01:56:55.857979 DQ8 =14, DQ9 =17, DQ10 =23, DQ11 =16
1675 01:56:55.858037 DQ12 =17, DQ13 =18, DQ14 =19, DQ15 =21
1676 01:56:55.858094
1677 01:56:55.858151
1678 01:56:55.858207 DramC Write-DBI off
1679 01:56:55.858264 ==
1680 01:56:55.858520 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1681 01:56:55.858585 fsp= 1, odt_onoff= 1, Byte mode= 0
1682 01:56:55.858645 ==
1683 01:56:55.858703 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1684 01:56:55.858761
1685 01:56:55.858819 Begin, DQ Scan Range 920~1176
1686 01:56:55.858877
1687 01:56:55.858933
1688 01:56:55.858990 TX Vref Scan disable
1689 01:56:55.859047 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1690 01:56:55.859106 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1691 01:56:55.859165 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1692 01:56:55.859224 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1693 01:56:55.859283 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1694 01:56:55.859341 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1695 01:56:55.859400 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1696 01:56:55.859459 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1697 01:56:55.859517 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1698 01:56:55.859576 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1699 01:56:55.859634 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1700 01:56:55.859693 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1701 01:56:55.859760 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1702 01:56:55.859821 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1703 01:56:55.859880 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1704 01:56:55.859938 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1705 01:56:55.859997 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1706 01:56:55.860055 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1707 01:56:55.860114 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1708 01:56:55.860172 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1709 01:56:55.860230 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1710 01:56:55.860289 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1711 01:56:55.860347 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1712 01:56:55.860406 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1713 01:56:55.860465 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1714 01:56:55.860523 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1715 01:56:55.860581 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1716 01:56:55.860639 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1717 01:56:55.860698 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1718 01:56:55.860756 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1719 01:56:55.860815 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1720 01:56:55.860873 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1721 01:56:55.860931 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1722 01:56:55.860989 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1723 01:56:55.861049 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1724 01:56:55.861108 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1725 01:56:55.861166 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1726 01:56:55.861224 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1727 01:56:55.861282 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1728 01:56:55.861341 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1729 01:56:55.861427 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1730 01:56:55.861495 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1731 01:56:55.861554 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1732 01:56:55.861633 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1733 01:56:55.861704 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1734 01:56:55.861766 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1735 01:56:55.861825 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1736 01:56:55.861883 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1737 01:56:55.861942 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1738 01:56:55.862000 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1739 01:56:55.862059 970 |3 6 10|[0] xxxxxxxx oxxoxxxx [MSB]
1740 01:56:55.862118 971 |3 6 11|[0] xxxxxxxx ooxoxoxx [MSB]
1741 01:56:55.862176 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1742 01:56:55.862234 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1743 01:56:55.862293 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1744 01:56:55.862352 975 |3 6 15|[0] xxxxxxxx ooxooooo [MSB]
1745 01:56:55.862410 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1746 01:56:55.862469 977 |3 6 17|[0] xoxooooo oooooooo [MSB]
1747 01:56:55.862527 990 |3 6 30|[0] oooooooo oooxoooo [MSB]
1748 01:56:55.862586 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1749 01:56:55.862645 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1750 01:56:55.862703 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1751 01:56:55.862762 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1752 01:56:55.862821 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1753 01:56:55.862887 996 |3 6 36|[0] xxxxxxxx xxxxxxxx [MSB]
1754 01:56:55.862946 Byte0, DQ PI dly=985, DQM PI dly= 985
1755 01:56:55.863003 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1756 01:56:55.863061
1757 01:56:55.863118 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1758 01:56:55.863176
1759 01:56:55.863233 Byte1, DQ PI dly=981, DQM PI dly= 981
1760 01:56:55.863291 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1761 01:56:55.863348
1762 01:56:55.863405 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1763 01:56:55.863463
1764 01:56:55.863520 ==
1765 01:56:55.863578 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1766 01:56:55.863654 fsp= 1, odt_onoff= 1, Byte mode= 0
1767 01:56:55.863717 ==
1768 01:56:55.863805 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1769 01:56:55.863881
1770 01:56:55.863940 Begin, DQ Scan Range 957~1021
1771 01:56:55.863998 Write Rank1 MR14 =0x0
1772 01:56:55.864056
1773 01:56:55.864113 CH=0, VrefRange= 0, VrefLevel = 0
1774 01:56:55.864171 TX Bit0 (980~992) 13 986, Bit8 (972~984) 13 978,
1775 01:56:55.864230 TX Bit1 (979~992) 14 985, Bit9 (975~984) 10 979,
1776 01:56:55.864288 TX Bit2 (980~991) 12 985, Bit10 (977~991) 15 984,
1777 01:56:55.864346 TX Bit3 (975~987) 13 981, Bit11 (973~982) 10 977,
1778 01:56:55.864404 TX Bit4 (979~991) 13 985, Bit12 (975~984) 10 979,
1779 01:56:55.864461 TX Bit5 (977~987) 11 982, Bit13 (974~986) 13 980,
1780 01:56:55.864520 TX Bit6 (977~990) 14 983, Bit14 (974~990) 17 982,
1781 01:56:55.864578 TX Bit7 (979~992) 14 985, Bit15 (977~991) 15 984,
1782 01:56:55.864636
1783 01:56:55.864693 Write Rank1 MR14 =0x2
1784 01:56:55.864750
1785 01:56:55.864807 CH=0, VrefRange= 0, VrefLevel = 2
1786 01:56:55.864865 TX Bit0 (979~992) 14 985, Bit8 (971~985) 15 978,
1787 01:56:55.864923 TX Bit1 (978~993) 16 985, Bit9 (975~985) 11 980,
1788 01:56:55.864981 TX Bit2 (979~992) 14 985, Bit10 (977~992) 16 984,
1789 01:56:55.865038 TX Bit3 (974~988) 15 981, Bit11 (973~983) 11 978,
1790 01:56:55.865292 TX Bit4 (978~992) 15 985, Bit12 (975~985) 11 980,
1791 01:56:55.865357 TX Bit5 (977~988) 12 982, Bit13 (974~987) 14 980,
1792 01:56:55.865416 TX Bit6 (977~991) 15 984, Bit14 (975~991) 17 983,
1793 01:56:55.865484 TX Bit7 (978~992) 15 985, Bit15 (977~991) 15 984,
1794 01:56:55.865542
1795 01:56:55.865600 Write Rank1 MR14 =0x4
1796 01:56:55.865657
1797 01:56:55.865714 CH=0, VrefRange= 0, VrefLevel = 4
1798 01:56:55.865772 TX Bit0 (979~993) 15 986, Bit8 (970~985) 16 977,
1799 01:56:55.865831 TX Bit1 (978~993) 16 985, Bit9 (973~986) 14 979,
1800 01:56:55.865890 TX Bit2 (979~992) 14 985, Bit10 (977~992) 16 984,
1801 01:56:55.865948 TX Bit3 (974~990) 17 982, Bit11 (973~984) 12 978,
1802 01:56:55.866006 TX Bit4 (978~992) 15 985, Bit12 (975~986) 12 980,
1803 01:56:55.866064 TX Bit5 (977~989) 13 983, Bit13 (974~987) 14 980,
1804 01:56:55.866122 TX Bit6 (977~991) 15 984, Bit14 (974~991) 18 982,
1805 01:56:55.866180 TX Bit7 (978~993) 16 985, Bit15 (977~991) 15 984,
1806 01:56:55.866245
1807 01:56:55.866304 Write Rank1 MR14 =0x6
1808 01:56:55.866362
1809 01:56:55.866419 CH=0, VrefRange= 0, VrefLevel = 6
1810 01:56:55.866477 TX Bit0 (979~993) 15 986, Bit8 (970~986) 17 978,
1811 01:56:55.866535 TX Bit1 (978~994) 17 986, Bit9 (974~987) 14 980,
1812 01:56:55.866593 TX Bit2 (979~992) 14 985, Bit10 (977~992) 16 984,
1813 01:56:55.866650 TX Bit3 (973~990) 18 981, Bit11 (972~985) 14 978,
1814 01:56:55.866708 TX Bit4 (978~993) 16 985, Bit12 (974~987) 14 980,
1815 01:56:55.866765 TX Bit5 (976~991) 16 983, Bit13 (974~989) 16 981,
1816 01:56:55.866823 TX Bit6 (977~992) 16 984, Bit14 (974~991) 18 982,
1817 01:56:55.866880 TX Bit7 (978~993) 16 985, Bit15 (976~992) 17 984,
1818 01:56:55.866938
1819 01:56:55.866994 Write Rank1 MR14 =0x8
1820 01:56:55.867051
1821 01:56:55.867108 CH=0, VrefRange= 0, VrefLevel = 8
1822 01:56:55.867165 TX Bit0 (978~994) 17 986, Bit8 (970~986) 17 978,
1823 01:56:55.867223 TX Bit1 (978~994) 17 986, Bit9 (973~987) 15 980,
1824 01:56:55.867280 TX Bit2 (978~993) 16 985, Bit10 (976~993) 18 984,
1825 01:56:55.867338 TX Bit3 (972~990) 19 981, Bit11 (972~985) 14 978,
1826 01:56:55.867396 TX Bit4 (977~993) 17 985, Bit12 (974~987) 14 980,
1827 01:56:55.867453 TX Bit5 (976~991) 16 983, Bit13 (973~989) 17 981,
1828 01:56:55.867510 TX Bit6 (977~992) 16 984, Bit14 (973~992) 20 982,
1829 01:56:55.867582 TX Bit7 (978~994) 17 986, Bit15 (976~993) 18 984,
1830 01:56:55.867642
1831 01:56:55.867699 Write Rank1 MR14 =0xa
1832 01:56:55.867756
1833 01:56:55.867812 CH=0, VrefRange= 0, VrefLevel = 10
1834 01:56:55.867870 TX Bit0 (978~994) 17 986, Bit8 (969~988) 20 978,
1835 01:56:55.867929 TX Bit1 (978~995) 18 986, Bit9 (973~989) 17 981,
1836 01:56:55.867986 TX Bit2 (979~994) 16 986, Bit10 (976~994) 19 985,
1837 01:56:55.868043 TX Bit3 (972~991) 20 981, Bit11 (971~986) 16 978,
1838 01:56:55.868100 TX Bit4 (978~994) 17 986, Bit12 (974~989) 16 981,
1839 01:56:55.868158 TX Bit5 (976~991) 16 983, Bit13 (973~990) 18 981,
1840 01:56:55.868216 TX Bit6 (976~992) 17 984, Bit14 (973~992) 20 982,
1841 01:56:55.868273 TX Bit7 (978~994) 17 986, Bit15 (976~993) 18 984,
1842 01:56:55.868330
1843 01:56:55.868387 Write Rank1 MR14 =0xc
1844 01:56:55.868444
1845 01:56:55.868500 CH=0, VrefRange= 0, VrefLevel = 12
1846 01:56:55.868558 TX Bit0 (978~995) 18 986, Bit8 (969~988) 20 978,
1847 01:56:55.868616 TX Bit1 (977~995) 19 986, Bit9 (972~989) 18 980,
1848 01:56:55.868673 TX Bit2 (979~994) 16 986, Bit10 (976~995) 20 985,
1849 01:56:55.868730 TX Bit3 (972~991) 20 981, Bit11 (971~987) 17 979,
1850 01:56:55.868788 TX Bit4 (977~994) 18 985, Bit12 (973~990) 18 981,
1851 01:56:55.868846 TX Bit5 (976~992) 17 984, Bit13 (972~990) 19 981,
1852 01:56:55.868903 TX Bit6 (976~993) 18 984, Bit14 (972~993) 22 982,
1853 01:56:55.868961 TX Bit7 (978~995) 18 986, Bit15 (976~994) 19 985,
1854 01:56:55.869018
1855 01:56:55.869074 Write Rank1 MR14 =0xe
1856 01:56:55.869132
1857 01:56:55.869188 CH=0, VrefRange= 0, VrefLevel = 14
1858 01:56:55.869245 TX Bit0 (978~996) 19 987, Bit8 (969~989) 21 979,
1859 01:56:55.869302 TX Bit1 (978~996) 19 987, Bit9 (972~990) 19 981,
1860 01:56:55.869359 TX Bit2 (978~995) 18 986, Bit10 (976~996) 21 986,
1861 01:56:55.869417 TX Bit3 (971~991) 21 981, Bit11 (970~987) 18 978,
1862 01:56:55.869488 TX Bit4 (977~995) 19 986, Bit12 (972~990) 19 981,
1863 01:56:55.869552 TX Bit5 (975~992) 18 983, Bit13 (973~990) 18 981,
1864 01:56:55.869621 TX Bit6 (976~994) 19 985, Bit14 (972~993) 22 982,
1865 01:56:55.869681 TX Bit7 (977~996) 20 986, Bit15 (975~994) 20 984,
1866 01:56:55.869739
1867 01:56:55.869796 Write Rank1 MR14 =0x10
1868 01:56:55.869853
1869 01:56:55.869911 CH=0, VrefRange= 0, VrefLevel = 16
1870 01:56:55.869968 TX Bit0 (978~997) 20 987, Bit8 (969~990) 22 979,
1871 01:56:55.870027 TX Bit1 (978~997) 20 987, Bit9 (971~990) 20 980,
1872 01:56:55.870086 TX Bit2 (978~996) 19 987, Bit10 (976~996) 21 986,
1873 01:56:55.870144 TX Bit3 (971~992) 22 981, Bit11 (970~989) 20 979,
1874 01:56:55.870202 TX Bit4 (977~996) 20 986, Bit12 (971~990) 20 980,
1875 01:56:55.870260 TX Bit5 (975~993) 19 984, Bit13 (971~991) 21 981,
1876 01:56:55.870317 TX Bit6 (975~994) 20 984, Bit14 (972~993) 22 982,
1877 01:56:55.870375 TX Bit7 (977~996) 20 986, Bit15 (976~996) 21 986,
1878 01:56:55.870432
1879 01:56:55.870488 Write Rank1 MR14 =0x12
1880 01:56:55.870545
1881 01:56:55.870602 CH=0, VrefRange= 0, VrefLevel = 18
1882 01:56:55.870659 TX Bit0 (977~997) 21 987, Bit8 (969~990) 22 979,
1883 01:56:55.870717 TX Bit1 (977~997) 21 987, Bit9 (970~990) 21 980,
1884 01:56:55.870774 TX Bit2 (978~996) 19 987, Bit10 (975~997) 23 986,
1885 01:56:55.870832 TX Bit3 (970~992) 23 981, Bit11 (969~990) 22 979,
1886 01:56:55.870889 TX Bit4 (977~997) 21 987, Bit12 (972~991) 20 981,
1887 01:56:55.870947 TX Bit5 (975~993) 19 984, Bit13 (971~991) 21 981,
1888 01:56:55.871004 TX Bit6 (975~995) 21 985, Bit14 (972~994) 23 983,
1889 01:56:55.871062 TX Bit7 (977~997) 21 987, Bit15 (975~996) 22 985,
1890 01:56:55.871119
1891 01:56:55.871372 Write Rank1 MR14 =0x14
1892 01:56:55.871436
1893 01:56:55.871495 CH=0, VrefRange= 0, VrefLevel = 20
1894 01:56:55.871563 TX Bit0 (977~998) 22 987, Bit8 (968~991) 24 979,
1895 01:56:55.871623 TX Bit1 (977~998) 22 987, Bit9 (971~991) 21 981,
1896 01:56:55.871681 TX Bit2 (978~997) 20 987, Bit10 (975~997) 23 986,
1897 01:56:55.871739 TX Bit3 (970~992) 23 981, Bit11 (969~990) 22 979,
1898 01:56:55.871797 TX Bit4 (977~997) 21 987, Bit12 (971~991) 21 981,
1899 01:56:55.871855 TX Bit5 (975~994) 20 984, Bit13 (971~992) 22 981,
1900 01:56:55.871913 TX Bit6 (974~995) 22 984, Bit14 (971~994) 24 982,
1901 01:56:55.871971 TX Bit7 (977~998) 22 987, Bit15 (975~997) 23 986,
1902 01:56:55.872029
1903 01:56:55.872086 Write Rank1 MR14 =0x16
1904 01:56:55.872144
1905 01:56:55.872201 CH=0, VrefRange= 0, VrefLevel = 22
1906 01:56:55.872259 TX Bit0 (977~999) 23 988, Bit8 (968~991) 24 979,
1907 01:56:56.019975 TX Bit1 (977~999) 23 988, Bit9 (970~991) 22 980,
1908 01:56:56.020133 TX Bit2 (978~998) 21 988, Bit10 (975~998) 24 986,
1909 01:56:56.020204 TX Bit3 (970~993) 24 981, Bit11 (969~990) 22 979,
1910 01:56:56.020269 TX Bit4 (976~998) 23 987, Bit12 (971~991) 21 981,
1911 01:56:56.020332 TX Bit5 (974~994) 21 984, Bit13 (970~992) 23 981,
1912 01:56:56.020393 TX Bit6 (975~995) 21 985, Bit14 (970~995) 26 982,
1913 01:56:56.020468 TX Bit7 (977~999) 23 988, Bit15 (975~997) 23 986,
1914 01:56:56.020540
1915 01:56:56.020598 Write Rank1 MR14 =0x18
1916 01:56:56.020656
1917 01:56:56.020713 CH=0, VrefRange= 0, VrefLevel = 24
1918 01:56:56.020771 TX Bit0 (977~999) 23 988, Bit8 (968~991) 24 979,
1919 01:56:56.020828 TX Bit1 (977~999) 23 988, Bit9 (970~991) 22 980,
1920 01:56:56.020886 TX Bit2 (977~999) 23 988, Bit10 (975~998) 24 986,
1921 01:56:56.020943 TX Bit3 (970~993) 24 981, Bit11 (969~991) 23 980,
1922 01:56:56.021026 TX Bit4 (976~998) 23 987, Bit12 (970~992) 23 981,
1923 01:56:56.021088 TX Bit5 (973~994) 22 983, Bit13 (970~993) 24 981,
1924 01:56:56.021148 TX Bit6 (974~996) 23 985, Bit14 (970~996) 27 983,
1925 01:56:56.021219 TX Bit7 (977~999) 23 988, Bit15 (975~998) 24 986,
1926 01:56:56.021276
1927 01:56:56.021331 Write Rank1 MR14 =0x1a
1928 01:56:56.021387
1929 01:56:56.021471 CH=0, VrefRange= 0, VrefLevel = 26
1930 01:56:56.021573 TX Bit0 (977~1000) 24 988, Bit8 (968~992) 25 980,
1931 01:56:56.021631 TX Bit1 (977~999) 23 988, Bit9 (970~992) 23 981,
1932 01:56:56.021688 TX Bit2 (977~999) 23 988, Bit10 (975~998) 24 986,
1933 01:56:56.021745 TX Bit3 (969~993) 25 981, Bit11 (969~991) 23 980,
1934 01:56:56.021802 TX Bit4 (976~999) 24 987, Bit12 (970~992) 23 981,
1935 01:56:56.021859 TX Bit5 (973~995) 23 984, Bit13 (969~993) 25 981,
1936 01:56:56.021915 TX Bit6 (974~997) 24 985, Bit14 (969~996) 28 982,
1937 01:56:56.021972 TX Bit7 (976~999) 24 987, Bit15 (974~998) 25 986,
1938 01:56:56.022058
1939 01:56:56.022113 Write Rank1 MR14 =0x1c
1940 01:56:56.022195
1941 01:56:56.022267 CH=0, VrefRange= 0, VrefLevel = 28
1942 01:56:56.022353 TX Bit0 (977~1000) 24 988, Bit8 (968~992) 25 980,
1943 01:56:56.022410 TX Bit1 (976~1000) 25 988, Bit9 (969~992) 24 980,
1944 01:56:56.022467 TX Bit2 (977~999) 23 988, Bit10 (975~998) 24 986,
1945 01:56:56.022524 TX Bit3 (969~994) 26 981, Bit11 (968~992) 25 980,
1946 01:56:56.022596 TX Bit4 (976~999) 24 987, Bit12 (970~992) 23 981,
1947 01:56:56.022667 TX Bit5 (972~995) 24 983, Bit13 (969~993) 25 981,
1948 01:56:56.022722 TX Bit6 (974~998) 25 986, Bit14 (969~996) 28 982,
1949 01:56:56.022779 TX Bit7 (976~999) 24 987, Bit15 (974~998) 25 986,
1950 01:56:56.022834
1951 01:56:56.022890 Write Rank1 MR14 =0x1e
1952 01:56:56.022945
1953 01:56:56.023001 CH=0, VrefRange= 0, VrefLevel = 30
1954 01:56:56.023057 TX Bit0 (977~1001) 25 989, Bit8 (967~992) 26 979,
1955 01:56:56.023129 TX Bit1 (977~1000) 24 988, Bit9 (969~993) 25 981,
1956 01:56:56.023187 TX Bit2 (977~1000) 24 988, Bit10 (974~999) 26 986,
1957 01:56:56.023245 TX Bit3 (970~993) 24 981, Bit11 (968~992) 25 980,
1958 01:56:56.023316 TX Bit4 (976~999) 24 987, Bit12 (969~993) 25 981,
1959 01:56:56.023372 TX Bit5 (972~996) 25 984, Bit13 (969~993) 25 981,
1960 01:56:56.023428 TX Bit6 (974~998) 25 986, Bit14 (970~996) 27 983,
1961 01:56:56.023484 TX Bit7 (976~1000) 25 988, Bit15 (974~998) 25 986,
1962 01:56:56.023541
1963 01:56:56.023612 Write Rank1 MR14 =0x20
1964 01:56:56.023681
1965 01:56:56.023736 CH=0, VrefRange= 0, VrefLevel = 32
1966 01:56:56.023792 TX Bit0 (977~1001) 25 989, Bit8 (967~992) 26 979,
1967 01:56:56.023849 TX Bit1 (977~1000) 24 988, Bit9 (969~993) 25 981,
1968 01:56:56.023905 TX Bit2 (977~1000) 24 988, Bit10 (974~999) 26 986,
1969 01:56:56.023961 TX Bit3 (970~993) 24 981, Bit11 (968~992) 25 980,
1970 01:56:56.024017 TX Bit4 (976~999) 24 987, Bit12 (969~993) 25 981,
1971 01:56:56.024074 TX Bit5 (972~996) 25 984, Bit13 (969~993) 25 981,
1972 01:56:56.024159 TX Bit6 (974~998) 25 986, Bit14 (970~996) 27 983,
1973 01:56:56.024215 TX Bit7 (976~1000) 25 988, Bit15 (974~998) 25 986,
1974 01:56:56.024272
1975 01:56:56.024327 Write Rank1 MR14 =0x22
1976 01:56:56.024383
1977 01:56:56.024438 CH=0, VrefRange= 0, VrefLevel = 34
1978 01:56:56.024493 TX Bit0 (977~1001) 25 989, Bit8 (967~992) 26 979,
1979 01:56:56.024550 TX Bit1 (977~1000) 24 988, Bit9 (969~993) 25 981,
1980 01:56:56.024619 TX Bit2 (977~1000) 24 988, Bit10 (974~999) 26 986,
1981 01:56:56.024690 TX Bit3 (970~993) 24 981, Bit11 (968~992) 25 980,
1982 01:56:56.024745 TX Bit4 (976~999) 24 987, Bit12 (969~993) 25 981,
1983 01:56:56.024802 TX Bit5 (972~996) 25 984, Bit13 (969~993) 25 981,
1984 01:56:56.024858 TX Bit6 (974~998) 25 986, Bit14 (970~996) 27 983,
1985 01:56:56.024914 TX Bit7 (976~1000) 25 988, Bit15 (974~998) 25 986,
1986 01:56:56.024969
1987 01:56:56.025024 Write Rank1 MR14 =0x24
1988 01:56:56.025079
1989 01:56:56.025161 CH=0, VrefRange= 0, VrefLevel = 36
1990 01:56:56.025252 TX Bit0 (977~1001) 25 989, Bit8 (967~992) 26 979,
1991 01:56:56.025344 TX Bit1 (977~1000) 24 988, Bit9 (969~993) 25 981,
1992 01:56:56.025664 TX Bit2 (977~1000) 24 988, Bit10 (974~999) 26 986,
1993 01:56:56.025745 TX Bit3 (970~993) 24 981, Bit11 (968~992) 25 980,
1994 01:56:56.025804 TX Bit4 (976~999) 24 987, Bit12 (969~993) 25 981,
1995 01:56:56.025861 TX Bit5 (972~996) 25 984, Bit13 (969~993) 25 981,
1996 01:56:56.025918 TX Bit6 (974~998) 25 986, Bit14 (970~996) 27 983,
1997 01:56:56.025974 TX Bit7 (976~1000) 25 988, Bit15 (974~998) 25 986,
1998 01:56:56.026030
1999 01:56:56.026086
2000 01:56:56.026170 TX Vref found, early break! 374< 380
2001 01:56:56.026241 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2002 01:56:56.026298 u1DelayCellOfst[0]=10 cells (8 PI)
2003 01:56:56.026354 u1DelayCellOfst[1]=9 cells (7 PI)
2004 01:56:56.026412 u1DelayCellOfst[2]=9 cells (7 PI)
2005 01:56:56.026467 u1DelayCellOfst[3]=0 cells (0 PI)
2006 01:56:56.026523 u1DelayCellOfst[4]=7 cells (6 PI)
2007 01:56:56.026579 u1DelayCellOfst[5]=3 cells (3 PI)
2008 01:56:56.026635 u1DelayCellOfst[6]=6 cells (5 PI)
2009 01:56:56.026728 u1DelayCellOfst[7]=9 cells (7 PI)
2010 01:56:56.026785 Byte0, DQ PI dly=981, DQM PI dly= 985
2011 01:56:56.026841 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2012 01:56:56.026898
2013 01:56:56.026954 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2014 01:56:56.027011
2015 01:56:56.027068 u1DelayCellOfst[8]=0 cells (0 PI)
2016 01:56:56.027124 u1DelayCellOfst[9]=2 cells (2 PI)
2017 01:56:56.027198 u1DelayCellOfst[10]=9 cells (7 PI)
2018 01:56:56.027256 u1DelayCellOfst[11]=1 cells (1 PI)
2019 01:56:56.027313 u1DelayCellOfst[12]=2 cells (2 PI)
2020 01:56:56.027371 u1DelayCellOfst[13]=2 cells (2 PI)
2021 01:56:56.027441 u1DelayCellOfst[14]=5 cells (4 PI)
2022 01:56:56.027498 u1DelayCellOfst[15]=9 cells (7 PI)
2023 01:56:56.027554 Byte1, DQ PI dly=979, DQM PI dly= 982
2024 01:56:56.027610 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2025 01:56:56.027683
2026 01:56:56.027753 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2027 01:56:56.027810
2028 01:56:56.027866 Write Rank1 MR14 =0x1e
2029 01:56:56.027922
2030 01:56:56.027977 Final TX Range 0 Vref 30
2031 01:56:56.028034
2032 01:56:56.028090 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2033 01:56:56.028147
2034 01:56:56.028230 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2035 01:56:56.028287 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2036 01:56:56.028345 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2037 01:56:56.028402 Write Rank1 MR3 =0xb0
2038 01:56:56.028459 DramC Write-DBI on
2039 01:56:56.028515 ==
2040 01:56:56.028598 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2041 01:56:56.028672 fsp= 1, odt_onoff= 1, Byte mode= 0
2042 01:56:56.028759 ==
2043 01:56:56.028814 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2044 01:56:56.028871
2045 01:56:56.028941 Begin, DQ Scan Range 702~766
2046 01:56:56.029012
2047 01:56:56.029068
2048 01:56:56.029123 TX Vref Scan disable
2049 01:56:56.029195 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2050 01:56:56.029255 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2051 01:56:56.029314 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2052 01:56:56.029373 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2053 01:56:56.029440 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2054 01:56:56.029514 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2055 01:56:56.029572 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2056 01:56:56.029645 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2057 01:56:56.029705 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2058 01:56:56.029763 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2059 01:56:56.029821 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2060 01:56:56.029893 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2061 01:56:56.029950 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2062 01:56:56.030008 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2063 01:56:56.030065 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2064 01:56:56.030153 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2065 01:56:56.030210 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2066 01:56:56.030268 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2067 01:56:56.030325 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2068 01:56:56.030382 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2069 01:56:56.030440 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2070 01:56:56.030497 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2071 01:56:56.030584 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2072 01:56:56.030642 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
2073 01:56:56.030699 Byte0, DQ PI dly=731, DQM PI dly= 731
2074 01:56:56.030756 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
2075 01:56:56.030812
2076 01:56:56.030868 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
2077 01:56:56.030925
2078 01:56:56.030996 Byte1, DQ PI dly=725, DQM PI dly= 725
2079 01:56:56.031054 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
2080 01:56:56.031112
2081 01:56:56.031169 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
2082 01:56:56.031240
2083 01:56:56.031296 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2084 01:56:56.031353 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2085 01:56:56.031410 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2086 01:56:56.031496 Write Rank1 MR3 =0x30
2087 01:56:56.031552 DramC Write-DBI off
2088 01:56:56.031608
2089 01:56:56.031664 [DATLAT]
2090 01:56:56.031741 Freq=1600, CH0 RK1, use_rxtx_scan=0
2091 01:56:56.031811
2092 01:56:56.031911 DATLAT Default: 0x10
2093 01:56:56.031998 7, 0xFFFF, sum=0
2094 01:56:56.032056 8, 0xFFFF, sum=0
2095 01:56:56.032114 9, 0xFFFF, sum=0
2096 01:56:56.032171 10, 0xFFFF, sum=0
2097 01:56:56.032229 11, 0xFFFF, sum=0
2098 01:56:56.032286 12, 0xFFFF, sum=0
2099 01:56:56.032344 13, 0xFFFF, sum=0
2100 01:56:56.032430 14, 0x0, sum=1
2101 01:56:56.032488 15, 0x0, sum=2
2102 01:56:56.032545 16, 0x0, sum=3
2103 01:56:56.032602 17, 0x0, sum=4
2104 01:56:56.032659 pattern=2 first_step=14 total pass=5 best_step=16
2105 01:56:56.032716 ==
2106 01:56:56.032772 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2107 01:56:56.032829 fsp= 1, odt_onoff= 1, Byte mode= 0
2108 01:56:56.032902 ==
2109 01:56:56.032960 Start DQ dly to find pass range UseTestEngine =1
2110 01:56:56.033019 x-axis: bit #, y-axis: DQ dly (-127~63)
2111 01:56:56.033077 RX Vref Scan = 0
2112 01:56:56.033147 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2113 01:56:56.033205 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2114 01:56:56.033263 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2115 01:56:56.033336 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2116 01:56:56.033600 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2117 01:56:56.033667 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2118 01:56:56.035402 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2119 01:56:56.038700 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2120 01:56:56.041873 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2121 01:56:56.045094 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2122 01:56:56.048403 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2123 01:56:56.051910 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2124 01:56:56.054862 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2125 01:56:56.054951 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2126 01:56:56.058407 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2127 01:56:56.061393 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2128 01:56:56.064794 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2129 01:56:56.068045 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2130 01:56:56.071316 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2131 01:56:56.074444 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2132 01:56:56.077704 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2133 01:56:56.077798 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2134 01:56:56.081188 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2135 01:56:56.084439 -3, [0] xxxxxxxx oxxxxxxx [MSB]
2136 01:56:56.087742 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2137 01:56:56.090833 -1, [0] xxxoxxxx ooxoxoxx [MSB]
2138 01:56:56.094383 0, [0] xxxoxoxx ooxoooxx [MSB]
2139 01:56:56.097665 1, [0] xxxoxoox ooxoooxx [MSB]
2140 01:56:56.097778 2, [0] xxxoxoox ooxoooox [MSB]
2141 01:56:56.100627 3, [0] xxxoxooo ooxoooox [MSB]
2142 01:56:56.104074 4, [0] ooxoxooo ooxoooox [MSB]
2143 01:56:56.107200 5, [0] ooxooooo ooxooooo [MSB]
2144 01:56:56.110894 32, [0] oooxoooo oooooooo [MSB]
2145 01:56:56.114239 33, [0] oooxoooo xooooooo [MSB]
2146 01:56:56.117754 34, [0] oooxoooo xooxoooo [MSB]
2147 01:56:56.121096 35, [0] oooxoxoo xxoxoxoo [MSB]
2148 01:56:56.124033 36, [0] oooxoxxo xxoxxxxo [MSB]
2149 01:56:56.127307 37, [0] oooxoxxx xxoxxxxo [MSB]
2150 01:56:56.130678 38, [0] oooxoxxx xxoxxxxx [MSB]
2151 01:56:56.130770 39, [0] oooxxxxx xxoxxxxx [MSB]
2152 01:56:56.134008 40, [0] xxxxxxxx xxoxxxxx [MSB]
2153 01:56:56.137196 41, [0] xxxxxxxx xxoxxxxx [MSB]
2154 01:56:56.140501 42, [0] xxxxxxxx xxxxxxxx [MSB]
2155 01:56:56.143959 iDelay=42, Bit 0, Center 21 (4 ~ 39) 36
2156 01:56:56.146988 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
2157 01:56:56.150236 iDelay=42, Bit 2, Center 22 (6 ~ 39) 34
2158 01:56:56.153546 iDelay=42, Bit 3, Center 14 (-2 ~ 31) 34
2159 01:56:56.156800 iDelay=42, Bit 4, Center 21 (5 ~ 38) 34
2160 01:56:56.163487 iDelay=42, Bit 5, Center 17 (0 ~ 34) 35
2161 01:56:56.166698 iDelay=42, Bit 6, Center 18 (1 ~ 35) 35
2162 01:56:56.170164 iDelay=42, Bit 7, Center 19 (3 ~ 36) 34
2163 01:56:56.173116 iDelay=42, Bit 8, Center 14 (-3 ~ 32) 36
2164 01:56:56.176509 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
2165 01:56:56.180074 iDelay=42, Bit 10, Center 23 (6 ~ 41) 36
2166 01:56:56.183303 iDelay=42, Bit 11, Center 15 (-2 ~ 33) 36
2167 01:56:56.186590 iDelay=42, Bit 12, Center 17 (0 ~ 35) 36
2168 01:56:56.189720 iDelay=42, Bit 13, Center 16 (-1 ~ 34) 36
2169 01:56:56.192818 iDelay=42, Bit 14, Center 18 (2 ~ 35) 34
2170 01:56:56.199445 iDelay=42, Bit 15, Center 21 (5 ~ 37) 33
2171 01:56:56.199539 ==
2172 01:56:56.202658 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2173 01:56:56.206077 fsp= 1, odt_onoff= 1, Byte mode= 0
2174 01:56:56.206174 ==
2175 01:56:56.209206 DQS Delay:
2176 01:56:56.209300 DQS0 = 0, DQS1 = 0
2177 01:56:56.209411 DQM Delay:
2178 01:56:56.212525 DQM0 = 19, DQM1 = 17
2179 01:56:56.212617 DQ Delay:
2180 01:56:56.216242 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14
2181 01:56:56.218954 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =19
2182 01:56:56.222611 DQ8 =14, DQ9 =16, DQ10 =23, DQ11 =15
2183 01:56:56.225991 DQ12 =17, DQ13 =16, DQ14 =18, DQ15 =21
2184 01:56:56.226084
2185 01:56:56.226196
2186 01:56:56.226305
2187 01:56:56.228720 [DramC_TX_OE_Calibration] TA2
2188 01:56:56.232172 Original DQ_B0 (3 6) =30, OEN = 27
2189 01:56:56.235343 Original DQ_B1 (3 6) =30, OEN = 27
2190 01:56:56.238678 23, 0x0, End_B0=23 End_B1=23
2191 01:56:56.242200 24, 0x0, End_B0=24 End_B1=24
2192 01:56:56.242295 25, 0x0, End_B0=25 End_B1=25
2193 01:56:56.245137 26, 0x0, End_B0=26 End_B1=26
2194 01:56:56.248586 27, 0x0, End_B0=27 End_B1=27
2195 01:56:56.251812 28, 0x0, End_B0=28 End_B1=28
2196 01:56:56.255158 29, 0x0, End_B0=29 End_B1=29
2197 01:56:56.255245 30, 0x0, End_B0=30 End_B1=30
2198 01:56:56.258611 31, 0xFFFF, End_B0=30 End_B1=30
2199 01:56:56.264817 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2200 01:56:56.271449 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2201 01:56:56.271544
2202 01:56:56.271637
2203 01:56:56.271725 Write Rank1 MR23 =0x3f
2204 01:56:56.274757 [DQSOSC]
2205 01:56:56.281288 [DQSOSCAuto] RK1, (LSB)MR18= 0xa3a3, (MSB)MR19= 0x202, tDQSOscB0 = 466 ps tDQSOscB1 = 466 ps
2206 01:56:56.287898 CH0_RK1: MR19=0x202, MR18=0xA3A3, DQSOSC=466, MR23=63, INC=11, DEC=16
2207 01:56:56.291037 Write Rank1 MR23 =0x3f
2208 01:56:56.291131 [DQSOSC]
2209 01:56:56.297702 [DQSOSCAuto] RK1, (LSB)MR18= 0xa1a1, (MSB)MR19= 0x202, tDQSOscB0 = 468 ps tDQSOscB1 = 468 ps
2210 01:56:56.300747 CH0 RK1: MR19=202, MR18=A1A1
2211 01:56:56.304344 [RxdqsGatingPostProcess] freq 1600
2212 01:56:56.310903 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2213 01:56:56.310999 Rank: 0
2214 01:56:56.313930 best DQS0 dly(2T, 0.5T) = (2, 6)
2215 01:56:56.317405 best DQS1 dly(2T, 0.5T) = (2, 6)
2216 01:56:56.320423 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2217 01:56:56.323691 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2218 01:56:56.323783 Rank: 1
2219 01:56:56.326996 best DQS0 dly(2T, 0.5T) = (2, 6)
2220 01:56:56.330317 best DQS1 dly(2T, 0.5T) = (2, 6)
2221 01:56:56.333723 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2222 01:56:56.337407 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2223 01:56:56.340179 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2224 01:56:56.343589 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2225 01:56:56.350017 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2226 01:56:56.350111 Write Rank0 MR13 =0x59
2227 01:56:56.350223 ==
2228 01:56:56.356530 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2229 01:56:56.360223 fsp= 1, odt_onoff= 1, Byte mode= 0
2230 01:56:56.360317 ==
2231 01:56:56.363235 === u2Vref_new: 0x56 --> 0x3a
2232 01:56:56.366216 === u2Vref_new: 0x58 --> 0x58
2233 01:56:56.369438 === u2Vref_new: 0x5a --> 0x5a
2234 01:56:56.372912 === u2Vref_new: 0x5c --> 0x78
2235 01:56:56.376133 === u2Vref_new: 0x5e --> 0x7a
2236 01:56:56.379351 === u2Vref_new: 0x60 --> 0x90
2237 01:56:56.382607 [CA 0] Center 37 (12~63) winsize 52
2238 01:56:56.385816 [CA 1] Center 37 (12~63) winsize 52
2239 01:56:56.389076 [CA 2] Center 34 (6~63) winsize 58
2240 01:56:56.392494 [CA 3] Center 35 (7~63) winsize 57
2241 01:56:56.392588 [CA 4] Center 34 (5~63) winsize 59
2242 01:56:56.395743 [CA 5] Center 28 (-1~58) winsize 60
2243 01:56:56.395836
2244 01:56:56.402386 [CATrainingPosCal] consider 1 rank data
2245 01:56:56.402492 u2DelayCellTimex100 = 753/100 ps
2246 01:56:56.408753 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2247 01:56:56.412066 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2248 01:56:56.415418 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2249 01:56:56.418985 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2250 01:56:56.421933 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2251 01:56:56.425227 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2252 01:56:56.425319
2253 01:56:56.428361 CA PerBit enable=1, Macro0, CA PI delay=28
2254 01:56:56.431707 === u2Vref_new: 0x5a --> 0x5a
2255 01:56:56.431799
2256 01:56:56.434976 Vref(ca) range 1: 26
2257 01:56:56.435067
2258 01:56:56.438319 CS Dly= 11 (42-0-32)
2259 01:56:56.438410 Write Rank0 MR13 =0xd8
2260 01:56:56.441695 Write Rank0 MR13 =0xd8
2261 01:56:56.441786 Write Rank0 MR12 =0x5a
2262 01:56:56.444629 Write Rank1 MR13 =0x59
2263 01:56:56.444719 ==
2264 01:56:56.451433 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2265 01:56:56.454383 fsp= 1, odt_onoff= 1, Byte mode= 0
2266 01:56:56.454475 ==
2267 01:56:56.457866 === u2Vref_new: 0x56 --> 0x3a
2268 01:56:56.460950 === u2Vref_new: 0x58 --> 0x58
2269 01:56:56.461041 === u2Vref_new: 0x5a --> 0x5a
2270 01:56:56.464599 === u2Vref_new: 0x5c --> 0x78
2271 01:56:56.467970 === u2Vref_new: 0x5e --> 0x7a
2272 01:56:56.471160 === u2Vref_new: 0x60 --> 0x90
2273 01:56:56.474418 [CA 0] Center 37 (12~63) winsize 52
2274 01:56:56.477777 [CA 1] Center 37 (12~63) winsize 52
2275 01:56:56.481177 [CA 2] Center 34 (5~63) winsize 59
2276 01:56:56.484383 [CA 3] Center 35 (7~63) winsize 57
2277 01:56:56.487503 [CA 4] Center 34 (5~63) winsize 59
2278 01:56:56.491103 [CA 5] Center 28 (-1~58) winsize 60
2279 01:56:56.491193
2280 01:56:56.494034 [CATrainingPosCal] consider 2 rank data
2281 01:56:56.497370 u2DelayCellTimex100 = 753/100 ps
2282 01:56:56.500502 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2283 01:56:56.503770 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2284 01:56:56.510404 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2285 01:56:56.513942 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2286 01:56:56.516944 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2287 01:56:56.520331 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2288 01:56:56.520421
2289 01:56:56.523429 CA PerBit enable=1, Macro0, CA PI delay=28
2290 01:56:56.526830 === u2Vref_new: 0x5c --> 0x78
2291 01:56:56.526922
2292 01:56:56.529937 Vref(ca) range 1: 28
2293 01:56:56.530028
2294 01:56:56.530099 CS Dly= 10 (41-0-32)
2295 01:56:56.533181 Write Rank1 MR13 =0xd8
2296 01:56:56.533271 Write Rank1 MR13 =0xd8
2297 01:56:56.536924 Write Rank1 MR12 =0x5c
2298 01:56:56.539949 [RankSwap] Rank num 2, (Multi 1), Rank 0
2299 01:56:56.543254 Write Rank0 MR2 =0xad
2300 01:56:56.543345 [Write Leveling]
2301 01:56:56.546385 delay byte0 byte1 byte2 byte3
2302 01:56:56.546475
2303 01:56:56.549706 10 0 0
2304 01:56:56.549798 11 0 0
2305 01:56:56.552920 12 0 0
2306 01:56:56.553011 13 0 0
2307 01:56:56.553083 14 0 0
2308 01:56:56.556226 15 0 0
2309 01:56:56.556317 16 0 0
2310 01:56:56.559523 17 0 0
2311 01:56:56.559613 18 0 0
2312 01:56:56.559685 19 0 0
2313 01:56:56.563084 20 0 0
2314 01:56:56.563175 21 0 0
2315 01:56:56.566253 22 0 0
2316 01:56:56.566343 23 0 0
2317 01:56:56.569374 24 0 0
2318 01:56:56.569473 25 0 0
2319 01:56:56.569547 26 0 0
2320 01:56:56.572894 27 0 0
2321 01:56:56.572985 28 0 ff
2322 01:56:56.576080 29 0 ff
2323 01:56:56.576170 30 0 ff
2324 01:56:56.579233 31 0 ff
2325 01:56:56.579325 32 0 ff
2326 01:56:56.582489 33 0 ff
2327 01:56:56.582580 34 0 ff
2328 01:56:56.582672 35 0 ff
2329 01:56:56.585765 36 ff ff
2330 01:56:56.585856 37 ff ff
2331 01:56:56.588972 38 ff ff
2332 01:56:56.589063 39 ff ff
2333 01:56:56.592207 40 ff ff
2334 01:56:56.592299 41 ff ff
2335 01:56:56.595474 42 ff ff
2336 01:56:56.598966 pass bytecount = 0xff (0xff: all bytes pass)
2337 01:56:56.599057
2338 01:56:56.599128 DQS0 dly: 36
2339 01:56:56.602092 DQS1 dly: 28
2340 01:56:56.602183 Write Rank0 MR2 =0x2d
2341 01:56:56.605337 [RankSwap] Rank num 2, (Multi 1), Rank 0
2342 01:56:56.608685 Write Rank0 MR1 =0xd6
2343 01:56:56.608780 [Gating]
2344 01:56:56.608851 ==
2345 01:56:56.615055 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2346 01:56:56.618300 fsp= 1, odt_onoff= 1, Byte mode= 0
2347 01:56:56.618387 ==
2348 01:56:56.621932 3 1 0 |2c2b 3535 |(11 11)(11 11) |(1 1)(1 1)| 0
2349 01:56:56.628260 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2350 01:56:56.631845 3 1 8 |2c2b 3635 |(11 11)(11 11) |(0 0)(1 1)| 0
2351 01:56:56.634834 3 1 12 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
2352 01:56:56.641377 3 1 16 |2c2b 3635 |(11 11)(11 11) |(1 0)(0 0)| 0
2353 01:56:56.644540 3 1 20 |2c2b 1111 |(11 11)(11 11) |(1 0)(1 1)| 0
2354 01:56:56.647827 3 1 24 |2c2b 3636 |(11 11)(0 0) |(1 0)(1 1)| 0
2355 01:56:56.654287 3 1 28 |2c2b 1b1b |(11 11)(11 11) |(1 0)(1 1)| 0
2356 01:56:56.657995 [Byte 1] Lead/lag falling Transition (3, 1, 28)
2357 01:56:56.660825 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2358 01:56:56.667664 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2359 01:56:56.670810 3 2 8 |2c2b 3434 |(11 11)(11 11) |(1 0)(0 1)| 0
2360 01:56:56.674001 3 2 12 |2c2b 2d2d |(11 11)(11 11) |(1 0)(0 1)| 0
2361 01:56:56.677310 3 2 16 |302 1312 |(11 11)(11 11) |(0 0)(1 0)| 0
2362 01:56:56.683874 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2363 01:56:56.687286 3 2 24 |3534 403 |(11 11)(11 11) |(0 0)(1 1)| 0
2364 01:56:56.690527 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2365 01:56:56.696916 3 3 0 |3534 605 |(11 11)(11 11) |(0 0)(1 1)| 0
2366 01:56:56.700519 3 3 4 |3534 3c3c |(11 11)(11 11) |(0 0)(1 1)| 0
2367 01:56:56.703811 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2368 01:56:56.710202 3 3 12 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
2369 01:56:56.713490 3 3 16 |3534 3736 |(11 11)(11 11) |(1 1)(1 1)| 0
2370 01:56:56.716797 3 3 20 |3534 e0e |(11 11)(11 11) |(1 1)(1 1)| 0
2371 01:56:56.723272 [Byte 0] Lead/lag falling Transition (3, 3, 20)
2372 01:56:56.726536 3 3 24 |3534 403 |(11 11)(11 11) |(0 1)(1 1)| 0
2373 01:56:56.729838 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2374 01:56:56.736528 [Byte 1] Lead/lag falling Transition (3, 3, 28)
2375 01:56:56.739764 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2376 01:56:56.743050 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2377 01:56:56.749543 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2378 01:56:56.753061 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2379 01:56:56.755966 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2380 01:56:56.762425 3 4 20 |505 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2381 01:56:56.765633 3 4 24 |3d3d b0a |(11 11)(11 11) |(1 1)(1 1)| 0
2382 01:56:56.769086 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2383 01:56:56.775537 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2384 01:56:56.778681 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2385 01:56:56.781991 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2386 01:56:56.788459 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2387 01:56:56.791683 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2388 01:56:56.795043 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2389 01:56:56.801860 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2390 01:56:56.805254 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2391 01:56:56.808251 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2392 01:56:56.814638 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2393 01:56:56.817928 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2394 01:56:56.821174 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2395 01:56:56.827703 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2396 01:56:56.830955 [Byte 0] Lead/lag Transition tap number (2)
2397 01:56:56.834314 [Byte 1] Lead/lag falling Transition (3, 6, 12)
2398 01:56:56.837466 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2399 01:56:56.844203 3 6 20 |4646 3d3d |(10 10)(11 11) |(0 0)(1 0)| 0
2400 01:56:56.847375 [Byte 1] Lead/lag Transition tap number (3)
2401 01:56:56.850717 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2402 01:56:56.854015 [Byte 0]First pass (3, 6, 24)
2403 01:56:56.857182 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2404 01:56:56.860664 [Byte 1]First pass (3, 6, 28)
2405 01:56:56.864025 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2406 01:56:56.867466 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2407 01:56:56.873729 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2408 01:56:56.876898 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2409 01:56:56.880194 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2410 01:56:56.883248 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2411 01:56:56.889805 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2412 01:56:56.893560 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2413 01:56:56.896361 All bytes gating window > 1UI, Early break!
2414 01:56:56.896473
2415 01:56:56.900007 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
2416 01:56:56.900090
2417 01:56:56.903078 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
2418 01:56:56.903186
2419 01:56:56.903308
2420 01:56:56.903416
2421 01:56:56.909798 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
2422 01:56:56.909885
2423 01:56:56.912893 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
2424 01:56:56.912996
2425 01:56:56.913106
2426 01:56:56.916126 Write Rank0 MR1 =0x56
2427 01:56:56.916235
2428 01:56:56.919405 best RODT dly(2T, 0.5T) = (2, 3)
2429 01:56:56.919489
2430 01:56:56.919597 best RODT dly(2T, 0.5T) = (2, 3)
2431 01:56:56.922756 ==
2432 01:56:56.925812 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2433 01:56:56.929066 fsp= 1, odt_onoff= 1, Byte mode= 0
2434 01:56:56.929177 ==
2435 01:56:56.932372 Start DQ dly to find pass range UseTestEngine =0
2436 01:56:56.939321 x-axis: bit #, y-axis: DQ dly (-127~63)
2437 01:56:56.939416 RX Vref Scan = 0
2438 01:56:56.942235 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2439 01:56:56.945437 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2440 01:56:56.948700 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2441 01:56:56.952256 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2442 01:56:56.955211 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2443 01:56:56.955308 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2444 01:56:56.958619 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2445 01:56:56.961841 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2446 01:56:56.965213 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2447 01:56:56.968598 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2448 01:56:56.971944 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2449 01:56:56.974945 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2450 01:56:56.978191 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2451 01:56:56.981415 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2452 01:56:56.981522 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2453 01:56:56.985050 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2454 01:56:56.988090 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2455 01:56:56.991317 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2456 01:56:56.994516 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2457 01:56:56.997886 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2458 01:56:57.001127 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2459 01:56:57.004276 -5, [0] xxxxxxxx xxxxxxxo [MSB]
2460 01:56:57.004373 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2461 01:56:57.007570 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2462 01:56:57.011177 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2463 01:56:57.014330 -1, [0] xxxoxxxx ooxxxxxo [MSB]
2464 01:56:57.017383 0, [0] xxxoxxxx ooxxxxxo [MSB]
2465 01:56:57.020664 1, [0] xxooxxxx ooxxxxxo [MSB]
2466 01:56:57.023932 2, [0] xxooxxxo oooxxxxo [MSB]
2467 01:56:57.024026 3, [0] xxooxxxo ooooxxxo [MSB]
2468 01:56:57.027723 4, [0] xooooxxo oooooooo [MSB]
2469 01:56:57.030804 5, [0] oooooxoo oooooooo [MSB]
2470 01:56:57.033974 6, [0] oooooxoo oooooooo [MSB]
2471 01:56:57.037643 32, [0] oooooooo ooooooox [MSB]
2472 01:56:57.040401 33, [0] oooooooo ooooooox [MSB]
2473 01:56:57.043687 34, [0] oooooooo ooooooox [MSB]
2474 01:56:57.047071 35, [0] ooxooooo oxooooox [MSB]
2475 01:56:57.047166 36, [0] ooxxoooo oxooooox [MSB]
2476 01:56:57.050274 37, [0] ooxxoooo xxooooox [MSB]
2477 01:56:57.053406 38, [0] ooxxoooo xxooooox [MSB]
2478 01:56:57.056859 39, [0] oxxxooox xxxxooox [MSB]
2479 01:56:57.059838 40, [0] oxxxxoxx xxxxxoox [MSB]
2480 01:56:57.063200 41, [0] xxxxxoxx xxxxxxxx [MSB]
2481 01:56:57.066473 42, [0] xxxxxxxx xxxxxxxx [MSB]
2482 01:56:57.069974 iDelay=42, Bit 0, Center 22 (5 ~ 40) 36
2483 01:56:57.072982 iDelay=42, Bit 1, Center 21 (4 ~ 38) 35
2484 01:56:57.076427 iDelay=42, Bit 2, Center 17 (1 ~ 34) 34
2485 01:56:57.079626 iDelay=42, Bit 3, Center 17 (-1 ~ 35) 37
2486 01:56:57.082908 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2487 01:56:57.086004 iDelay=42, Bit 5, Center 24 (7 ~ 41) 35
2488 01:56:57.089663 iDelay=42, Bit 6, Center 22 (5 ~ 39) 35
2489 01:56:57.092848 iDelay=42, Bit 7, Center 20 (2 ~ 38) 37
2490 01:56:57.095887 iDelay=42, Bit 8, Center 17 (-1 ~ 36) 38
2491 01:56:57.099198 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
2492 01:56:57.105981 iDelay=42, Bit 10, Center 20 (2 ~ 38) 37
2493 01:56:57.109201 iDelay=42, Bit 11, Center 20 (3 ~ 38) 36
2494 01:56:57.112345 iDelay=42, Bit 12, Center 21 (4 ~ 39) 36
2495 01:56:57.115548 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
2496 01:56:57.118999 iDelay=42, Bit 14, Center 22 (4 ~ 40) 37
2497 01:56:57.122546 iDelay=42, Bit 15, Center 13 (-5 ~ 31) 37
2498 01:56:57.122640 ==
2499 01:56:57.128607 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2500 01:56:57.131979 fsp= 1, odt_onoff= 1, Byte mode= 0
2501 01:56:57.132073 ==
2502 01:56:57.132166 DQS Delay:
2503 01:56:57.135131 DQS0 = 0, DQS1 = 0
2504 01:56:57.135224 DQM Delay:
2505 01:56:57.138598 DQM0 = 20, DQM1 = 18
2506 01:56:57.138691 DQ Delay:
2507 01:56:57.141878 DQ0 =22, DQ1 =21, DQ2 =17, DQ3 =17
2508 01:56:57.145189 DQ4 =21, DQ5 =24, DQ6 =22, DQ7 =20
2509 01:56:57.148427 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =20
2510 01:56:57.151662 DQ12 =21, DQ13 =22, DQ14 =22, DQ15 =13
2511 01:56:57.151755
2512 01:56:57.151866
2513 01:56:57.151975 DramC Write-DBI off
2514 01:56:57.154834 ==
2515 01:56:57.158386 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2516 01:56:57.161663 fsp= 1, odt_onoff= 1, Byte mode= 0
2517 01:56:57.161753 ==
2518 01:56:57.165119 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2519 01:56:57.165243
2520 01:56:57.168055 Begin, DQ Scan Range 924~1180
2521 01:56:57.168167
2522 01:56:57.168238
2523 01:56:57.171316 TX Vref Scan disable
2524 01:56:57.174700 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2525 01:56:57.178096 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2526 01:56:57.181325 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2527 01:56:57.184249 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2528 01:56:57.187734 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2529 01:56:57.191044 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2530 01:56:57.194148 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2531 01:56:57.200801 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2532 01:56:57.203963 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2533 01:56:57.207259 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2534 01:56:57.210534 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2535 01:56:57.213979 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2536 01:56:57.217320 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2537 01:56:57.220535 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2538 01:56:57.223583 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2539 01:56:57.226845 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2540 01:56:57.230222 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2541 01:56:57.233858 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2542 01:56:57.236675 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2543 01:56:57.243337 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2544 01:56:57.246732 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2545 01:56:57.249880 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2546 01:56:57.253054 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2547 01:56:57.256225 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2548 01:56:57.259562 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2549 01:56:57.262843 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2550 01:56:57.266134 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2551 01:56:57.269320 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2552 01:56:57.272646 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2553 01:56:57.276174 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2554 01:56:57.279158 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2555 01:56:57.282607 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2556 01:56:57.288955 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2557 01:56:57.292247 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2558 01:56:57.295453 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2559 01:56:57.299133 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2560 01:56:57.302096 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2561 01:56:57.305444 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2562 01:56:57.308726 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2563 01:56:57.312067 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2564 01:56:57.315162 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2565 01:56:57.318396 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2566 01:56:57.321810 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2567 01:56:57.325007 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2568 01:56:57.328252 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2569 01:56:57.331585 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2570 01:56:57.334944 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2571 01:56:57.341346 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2572 01:56:57.344758 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2573 01:56:57.348121 973 |3 6 13|[0] xxxxxxxx xoxxxxxo [MSB]
2574 01:56:57.351358 974 |3 6 14|[0] xxxxxxxx ooxxxxxo [MSB]
2575 01:56:57.354587 975 |3 6 15|[0] xxxxxxxx ooxxxxxo [MSB]
2576 01:56:57.357870 976 |3 6 16|[0] xxxxxxxx oooxxxoo [MSB]
2577 01:56:57.361105 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2578 01:56:57.364478 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2579 01:56:57.367552 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2580 01:56:57.370950 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2581 01:56:57.374346 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
2582 01:56:57.377420 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
2583 01:56:57.380683 983 |3 6 23|[0] xxxxxxxo oooooooo [MSB]
2584 01:56:57.388518 991 |3 6 31|[0] oooooooo ooooooox [MSB]
2585 01:56:57.391420 992 |3 6 32|[0] oooooooo oxooooox [MSB]
2586 01:56:57.394721 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2587 01:56:57.398232 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2588 01:56:57.401226 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2589 01:56:57.404720 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2590 01:56:57.407740 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2591 01:56:57.411047 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2592 01:56:57.414460 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
2593 01:56:57.417831 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2594 01:56:57.420911 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2595 01:56:57.427373 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2596 01:56:57.430941 1003 |3 6 43|[0] ooxxoooo xxxxxxxx [MSB]
2597 01:56:57.433756 1004 |3 6 44|[0] ooxxoooo xxxxxxxx [MSB]
2598 01:56:57.437198 1005 |3 6 45|[0] ooxxxoxx xxxxxxxx [MSB]
2599 01:56:57.440349 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
2600 01:56:57.443695 Byte0, DQ PI dly=992, DQM PI dly= 992
2601 01:56:57.446951 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
2602 01:56:57.447042
2603 01:56:57.453441 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
2604 01:56:57.453535
2605 01:56:57.456869 Byte1, DQ PI dly=982, DQM PI dly= 982
2606 01:56:57.460329 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
2607 01:56:57.460420
2608 01:56:57.463595 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
2609 01:56:57.466739
2610 01:56:57.466865 ==
2611 01:56:57.470157 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2612 01:56:57.473108 fsp= 1, odt_onoff= 1, Byte mode= 0
2613 01:56:57.473204 ==
2614 01:56:57.476560 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2615 01:56:57.479570
2616 01:56:57.479654 Begin, DQ Scan Range 958~1022
2617 01:56:57.483034 Write Rank0 MR14 =0x0
2618 01:56:57.491282
2619 01:56:57.491367 CH=1, VrefRange= 0, VrefLevel = 0
2620 01:56:57.497921 TX Bit0 (986~1001) 16 993, Bit8 (976~990) 15 983,
2621 01:56:57.501216 TX Bit1 (985~1000) 16 992, Bit9 (976~987) 12 981,
2622 01:56:57.507646 TX Bit2 (983~998) 16 990, Bit10 (978~992) 15 985,
2623 01:56:57.511024 TX Bit3 (981~995) 15 988, Bit11 (980~991) 12 985,
2624 01:56:57.514453 TX Bit4 (984~999) 16 991, Bit12 (979~991) 13 985,
2625 01:56:57.520937 TX Bit5 (986~1000) 15 993, Bit13 (980~992) 13 986,
2626 01:56:57.523999 TX Bit6 (985~999) 15 992, Bit14 (978~991) 14 984,
2627 01:56:57.530546 TX Bit7 (985~999) 15 992, Bit15 (976~984) 9 980,
2628 01:56:57.530638
2629 01:56:57.530709 Write Rank0 MR14 =0x2
2630 01:56:57.540308
2631 01:56:57.543651 CH=1, VrefRange= 0, VrefLevel = 2
2632 01:56:57.546673 TX Bit0 (986~1001) 16 993, Bit8 (976~990) 15 983,
2633 01:56:57.549967 TX Bit1 (984~1000) 17 992, Bit9 (976~988) 13 982,
2634 01:56:57.556612 TX Bit2 (984~998) 15 991, Bit10 (978~992) 15 985,
2635 01:56:57.560035 TX Bit3 (980~996) 17 988, Bit11 (979~991) 13 985,
2636 01:56:57.566427 TX Bit4 (984~1000) 17 992, Bit12 (978~992) 15 985,
2637 01:56:57.569567 TX Bit5 (985~1001) 17 993, Bit13 (980~993) 14 986,
2638 01:56:57.572932 TX Bit6 (985~1000) 16 992, Bit14 (979~991) 13 985,
2639 01:56:57.579468 TX Bit7 (985~999) 15 992, Bit15 (975~984) 10 979,
2640 01:56:57.579566
2641 01:56:57.579637 Write Rank0 MR14 =0x4
2642 01:56:57.589407
2643 01:56:57.592654 CH=1, VrefRange= 0, VrefLevel = 4
2644 01:56:57.596227 TX Bit0 (986~1002) 17 994, Bit8 (976~991) 16 983,
2645 01:56:57.599317 TX Bit1 (984~1001) 18 992, Bit9 (975~989) 15 982,
2646 01:56:57.606084 TX Bit2 (983~999) 17 991, Bit10 (977~993) 17 985,
2647 01:56:57.609261 TX Bit3 (979~997) 19 988, Bit11 (979~992) 14 985,
2648 01:56:57.615821 TX Bit4 (984~1000) 17 992, Bit12 (978~992) 15 985,
2649 01:56:57.618943 TX Bit5 (986~1001) 16 993, Bit13 (979~993) 15 986,
2650 01:56:57.622350 TX Bit6 (985~1000) 16 992, Bit14 (978~992) 15 985,
2651 01:56:57.628827 TX Bit7 (985~1000) 16 992, Bit15 (974~985) 12 979,
2652 01:56:57.628920
2653 01:56:57.628992 Write Rank0 MR14 =0x6
2654 01:56:57.639328
2655 01:56:57.639423 CH=1, VrefRange= 0, VrefLevel = 6
2656 01:56:57.646074 TX Bit0 (985~1003) 19 994, Bit8 (975~991) 17 983,
2657 01:56:57.648899 TX Bit1 (984~1002) 19 993, Bit9 (975~990) 16 982,
2658 01:56:57.655858 TX Bit2 (983~999) 17 991, Bit10 (977~993) 17 985,
2659 01:56:57.658716 TX Bit3 (979~997) 19 988, Bit11 (978~992) 15 985,
2660 01:56:57.661964 TX Bit4 (984~1001) 18 992, Bit12 (977~993) 17 985,
2661 01:56:57.668655 TX Bit5 (985~1002) 18 993, Bit13 (978~994) 17 986,
2662 01:56:57.671873 TX Bit6 (984~1001) 18 992, Bit14 (978~992) 15 985,
2663 01:56:57.678198 TX Bit7 (984~1000) 17 992, Bit15 (973~986) 14 979,
2664 01:56:57.678291
2665 01:56:57.678362 Write Rank0 MR14 =0x8
2666 01:56:57.688755
2667 01:56:57.688842 CH=1, VrefRange= 0, VrefLevel = 8
2668 01:56:57.695685 TX Bit0 (985~1004) 20 994, Bit8 (975~991) 17 983,
2669 01:56:57.698540 TX Bit1 (984~1003) 20 993, Bit9 (975~990) 16 982,
2670 01:56:57.705287 TX Bit2 (982~999) 18 990, Bit10 (977~994) 18 985,
2671 01:56:57.708424 TX Bit3 (979~998) 20 988, Bit11 (978~993) 16 985,
2672 01:56:57.711750 TX Bit4 (984~1001) 18 992, Bit12 (977~993) 17 985,
2673 01:56:57.718189 TX Bit5 (985~1003) 19 994, Bit13 (978~995) 18 986,
2674 01:56:57.721690 TX Bit6 (984~1002) 19 993, Bit14 (977~993) 17 985,
2675 01:56:57.728032 TX Bit7 (984~1001) 18 992, Bit15 (972~987) 16 979,
2676 01:56:57.728123
2677 01:56:57.728198 Write Rank0 MR14 =0xa
2678 01:56:57.738700
2679 01:56:57.742159 CH=1, VrefRange= 0, VrefLevel = 10
2680 01:56:57.745277 TX Bit0 (985~1005) 21 995, Bit8 (975~992) 18 983,
2681 01:56:57.748533 TX Bit1 (984~1004) 21 994, Bit9 (975~990) 16 982,
2682 01:56:57.755060 TX Bit2 (982~1000) 19 991, Bit10 (977~995) 19 986,
2683 01:56:57.758523 TX Bit3 (978~998) 21 988, Bit11 (978~993) 16 985,
2684 01:56:57.765096 TX Bit4 (983~1002) 20 992, Bit12 (977~994) 18 985,
2685 01:56:57.768302 TX Bit5 (985~1004) 20 994, Bit13 (978~996) 19 987,
2686 01:56:57.771499 TX Bit6 (984~1002) 19 993, Bit14 (977~993) 17 985,
2687 01:56:57.777987 TX Bit7 (984~1002) 19 993, Bit15 (971~988) 18 979,
2688 01:56:57.778079
2689 01:56:57.778150 Write Rank0 MR14 =0xc
2690 01:56:57.789109
2691 01:56:57.791981 CH=1, VrefRange= 0, VrefLevel = 12
2692 01:56:57.795245 TX Bit0 (985~1005) 21 995, Bit8 (975~992) 18 983,
2693 01:56:57.798526 TX Bit1 (983~1004) 22 993, Bit9 (974~991) 18 982,
2694 01:56:57.805082 TX Bit2 (981~1001) 21 991, Bit10 (977~995) 19 986,
2695 01:56:57.808403 TX Bit3 (978~998) 21 988, Bit11 (978~994) 17 986,
2696 01:56:57.815037 TX Bit4 (983~1003) 21 993, Bit12 (977~995) 19 986,
2697 01:56:57.818116 TX Bit5 (985~1005) 21 995, Bit13 (978~996) 19 987,
2698 01:56:57.821310 TX Bit6 (984~1003) 20 993, Bit14 (977~994) 18 985,
2699 01:56:57.828143 TX Bit7 (984~1003) 20 993, Bit15 (972~989) 18 980,
2700 01:56:57.828240
2701 01:56:57.831091 Write Rank0 MR14 =0xe
2702 01:56:57.838629
2703 01:56:57.842014 CH=1, VrefRange= 0, VrefLevel = 14
2704 01:56:57.845513 TX Bit0 (984~1005) 22 994, Bit8 (974~993) 20 983,
2705 01:56:57.848413 TX Bit1 (983~1005) 23 994, Bit9 (974~991) 18 982,
2706 01:56:57.854972 TX Bit2 (982~1002) 21 992, Bit10 (976~996) 21 986,
2707 01:56:57.858387 TX Bit3 (978~999) 22 988, Bit11 (977~995) 19 986,
2708 01:56:57.864916 TX Bit4 (983~1004) 22 993, Bit12 (976~996) 21 986,
2709 01:56:57.868221 TX Bit5 (984~1005) 22 994, Bit13 (978~997) 20 987,
2710 01:56:57.871491 TX Bit6 (984~1004) 21 994, Bit14 (977~995) 19 986,
2711 01:56:57.877941 TX Bit7 (984~1004) 21 994, Bit15 (971~990) 20 980,
2712 01:56:57.878032
2713 01:56:57.881365 Write Rank0 MR14 =0x10
2714 01:56:57.888792
2715 01:56:57.892214 CH=1, VrefRange= 0, VrefLevel = 16
2716 01:56:57.895505 TX Bit0 (985~1005) 21 995, Bit8 (974~993) 20 983,
2717 01:56:57.898638 TX Bit1 (983~1005) 23 994, Bit9 (973~991) 19 982,
2718 01:56:57.905346 TX Bit2 (980~1002) 23 991, Bit10 (976~997) 22 986,
2719 01:56:57.908497 TX Bit3 (978~999) 22 988, Bit11 (977~997) 21 987,
2720 01:56:57.915242 TX Bit4 (983~1004) 22 993, Bit12 (976~997) 22 986,
2721 01:56:57.918494 TX Bit5 (984~1005) 22 994, Bit13 (977~998) 22 987,
2722 01:56:57.921533 TX Bit6 (983~1004) 22 993, Bit14 (977~996) 20 986,
2723 01:56:57.928062 TX Bit7 (984~1004) 21 994, Bit15 (970~990) 21 980,
2724 01:56:57.928154
2725 01:56:57.928225 Write Rank0 MR14 =0x12
2726 01:56:57.939263
2727 01:56:57.942476 CH=1, VrefRange= 0, VrefLevel = 18
2728 01:56:57.945542 TX Bit0 (984~1006) 23 995, Bit8 (974~994) 21 984,
2729 01:56:57.948803 TX Bit1 (982~1005) 24 993, Bit9 (973~992) 20 982,
2730 01:56:57.955358 TX Bit2 (980~1002) 23 991, Bit10 (976~997) 22 986,
2731 01:56:57.958821 TX Bit3 (977~999) 23 988, Bit11 (977~997) 21 987,
2732 01:56:57.965522 TX Bit4 (982~1005) 24 993, Bit12 (976~997) 22 986,
2733 01:56:57.968490 TX Bit5 (984~1006) 23 995, Bit13 (977~998) 22 987,
2734 01:56:57.971957 TX Bit6 (984~1005) 22 994, Bit14 (977~997) 21 987,
2735 01:56:57.978316 TX Bit7 (983~1005) 23 994, Bit15 (970~990) 21 980,
2736 01:56:57.978409
2737 01:56:57.981602 Write Rank0 MR14 =0x14
2738 01:56:57.989398
2739 01:56:57.992700 CH=1, VrefRange= 0, VrefLevel = 20
2740 01:56:57.996253 TX Bit0 (984~1006) 23 995, Bit8 (973~994) 22 983,
2741 01:56:57.999243 TX Bit1 (982~1005) 24 993, Bit9 (972~992) 21 982,
2742 01:56:58.005942 TX Bit2 (980~1004) 25 992, Bit10 (975~997) 23 986,
2743 01:56:58.009010 TX Bit3 (978~1000) 23 989, Bit11 (977~998) 22 987,
2744 01:56:58.015534 TX Bit4 (982~1005) 24 993, Bit12 (976~998) 23 987,
2745 01:56:58.019044 TX Bit5 (984~1006) 23 995, Bit13 (977~998) 22 987,
2746 01:56:58.022175 TX Bit6 (982~1005) 24 993, Bit14 (976~997) 22 986,
2747 01:56:58.028654 TX Bit7 (983~1005) 23 994, Bit15 (970~991) 22 980,
2748 01:56:58.028746
2749 01:56:58.032022 Write Rank0 MR14 =0x16
2750 01:56:58.039837
2751 01:56:58.043417 CH=1, VrefRange= 0, VrefLevel = 22
2752 01:56:58.046471 TX Bit0 (984~1006) 23 995, Bit8 (973~995) 23 984,
2753 01:56:58.050069 TX Bit1 (982~1005) 24 993, Bit9 (972~993) 22 982,
2754 01:56:58.056478 TX Bit2 (979~1004) 26 991, Bit10 (975~998) 24 986,
2755 01:56:58.059635 TX Bit3 (977~1000) 24 988, Bit11 (977~998) 22 987,
2756 01:56:58.066130 TX Bit4 (981~1005) 25 993, Bit12 (976~998) 23 987,
2757 01:56:58.069355 TX Bit5 (984~1006) 23 995, Bit13 (977~998) 22 987,
2758 01:56:58.072663 TX Bit6 (983~1005) 23 994, Bit14 (976~998) 23 987,
2759 01:56:58.079145 TX Bit7 (982~1005) 24 993, Bit15 (970~991) 22 980,
2760 01:56:58.079238
2761 01:56:58.082281 Write Rank0 MR14 =0x18
2762 01:56:58.090162
2763 01:56:58.093590 CH=1, VrefRange= 0, VrefLevel = 24
2764 01:56:58.096734 TX Bit0 (984~1006) 23 995, Bit8 (973~996) 24 984,
2765 01:56:58.100082 TX Bit1 (982~1006) 25 994, Bit9 (971~993) 23 982,
2766 01:56:58.106935 TX Bit2 (980~1005) 26 992, Bit10 (975~998) 24 986,
2767 01:56:58.110124 TX Bit3 (977~1001) 25 989, Bit11 (976~998) 23 987,
2768 01:56:58.116524 TX Bit4 (981~1005) 25 993, Bit12 (976~998) 23 987,
2769 01:56:58.119776 TX Bit5 (983~1006) 24 994, Bit13 (976~999) 24 987,
2770 01:56:58.122940 TX Bit6 (982~1005) 24 993, Bit14 (976~998) 23 987,
2771 01:56:58.129415 TX Bit7 (982~1005) 24 993, Bit15 (969~991) 23 980,
2772 01:56:58.129518
2773 01:56:58.132914 Write Rank0 MR14 =0x1a
2774 01:56:58.140873
2775 01:56:58.144142 CH=1, VrefRange= 0, VrefLevel = 26
2776 01:56:58.147256 TX Bit0 (984~1007) 24 995, Bit8 (972~996) 25 984,
2777 01:56:58.150527 TX Bit1 (982~1006) 25 994, Bit9 (971~994) 24 982,
2778 01:56:58.157163 TX Bit2 (979~1005) 27 992, Bit10 (975~998) 24 986,
2779 01:56:58.160407 TX Bit3 (977~1001) 25 989, Bit11 (976~998) 23 987,
2780 01:56:58.166933 TX Bit4 (981~1006) 26 993, Bit12 (976~999) 24 987,
2781 01:56:58.170115 TX Bit5 (983~1006) 24 994, Bit13 (976~999) 24 987,
2782 01:56:58.173412 TX Bit6 (982~1006) 25 994, Bit14 (976~998) 23 987,
2783 01:56:58.180071 TX Bit7 (982~1006) 25 994, Bit15 (969~991) 23 980,
2784 01:56:58.180162
2785 01:56:58.183178 Write Rank0 MR14 =0x1c
2786 01:56:58.191104
2787 01:56:58.194453 CH=1, VrefRange= 0, VrefLevel = 28
2788 01:56:58.197992 TX Bit0 (983~1007) 25 995, Bit8 (971~997) 27 984,
2789 01:56:58.201042 TX Bit1 (981~1006) 26 993, Bit9 (971~994) 24 982,
2790 01:56:58.207788 TX Bit2 (979~1005) 27 992, Bit10 (975~998) 24 986,
2791 01:56:58.210981 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
2792 01:56:58.217438 TX Bit4 (981~1006) 26 993, Bit12 (975~999) 25 987,
2793 01:56:58.220513 TX Bit5 (983~1006) 24 994, Bit13 (976~999) 24 987,
2794 01:56:58.223878 TX Bit6 (982~1006) 25 994, Bit14 (975~999) 25 987,
2795 01:56:58.230608 TX Bit7 (982~1006) 25 994, Bit15 (969~992) 24 980,
2796 01:56:58.230708
2797 01:56:58.233764 Write Rank0 MR14 =0x1e
2798 01:56:58.241662
2799 01:56:58.244966 CH=1, VrefRange= 0, VrefLevel = 30
2800 01:56:58.248263 TX Bit0 (983~1007) 25 995, Bit8 (972~996) 25 984,
2801 01:56:58.251581 TX Bit1 (982~1006) 25 994, Bit9 (971~994) 24 982,
2802 01:56:58.257991 TX Bit2 (978~1005) 28 991, Bit10 (974~998) 25 986,
2803 01:56:58.261517 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
2804 01:56:58.267943 TX Bit4 (982~1006) 25 994, Bit12 (975~999) 25 987,
2805 01:56:58.271146 TX Bit5 (983~1007) 25 995, Bit13 (976~999) 24 987,
2806 01:56:58.274538 TX Bit6 (981~1006) 26 993, Bit14 (975~999) 25 987,
2807 01:56:58.281023 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
2808 01:56:58.281115
2809 01:56:58.284174 Write Rank0 MR14 =0x20
2810 01:56:58.292664
2811 01:56:58.295851 CH=1, VrefRange= 0, VrefLevel = 32
2812 01:56:58.298836 TX Bit0 (983~1007) 25 995, Bit8 (972~996) 25 984,
2813 01:56:58.302251 TX Bit1 (982~1006) 25 994, Bit9 (971~994) 24 982,
2814 01:56:58.308699 TX Bit2 (978~1005) 28 991, Bit10 (974~998) 25 986,
2815 01:56:58.312100 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
2816 01:56:58.318481 TX Bit4 (982~1006) 25 994, Bit12 (975~999) 25 987,
2817 01:56:58.321638 TX Bit5 (983~1007) 25 995, Bit13 (976~999) 24 987,
2818 01:56:58.325370 TX Bit6 (981~1006) 26 993, Bit14 (975~999) 25 987,
2819 01:56:58.331697 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
2820 01:56:58.331787
2821 01:56:58.334688 Write Rank0 MR14 =0x22
2822 01:56:58.342778
2823 01:56:58.346040 CH=1, VrefRange= 0, VrefLevel = 34
2824 01:56:58.349463 TX Bit0 (983~1007) 25 995, Bit8 (972~996) 25 984,
2825 01:56:58.352615 TX Bit1 (982~1006) 25 994, Bit9 (971~994) 24 982,
2826 01:56:58.359344 TX Bit2 (978~1005) 28 991, Bit10 (974~998) 25 986,
2827 01:56:58.362503 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
2828 01:56:58.369062 TX Bit4 (982~1006) 25 994, Bit12 (975~999) 25 987,
2829 01:56:58.372443 TX Bit5 (983~1007) 25 995, Bit13 (976~999) 24 987,
2830 01:56:58.375677 TX Bit6 (981~1006) 26 993, Bit14 (975~999) 25 987,
2831 01:56:58.381985 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
2832 01:56:58.382078
2833 01:56:58.385406 Write Rank0 MR14 =0x24
2834 01:56:58.393427
2835 01:56:58.396941 CH=1, VrefRange= 0, VrefLevel = 36
2836 01:56:58.399931 TX Bit0 (983~1007) 25 995, Bit8 (972~996) 25 984,
2837 01:56:58.403097 TX Bit1 (982~1006) 25 994, Bit9 (971~994) 24 982,
2838 01:56:58.409896 TX Bit2 (978~1005) 28 991, Bit10 (974~998) 25 986,
2839 01:56:58.413111 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
2840 01:56:58.419692 TX Bit4 (982~1006) 25 994, Bit12 (975~999) 25 987,
2841 01:56:58.422912 TX Bit5 (983~1007) 25 995, Bit13 (976~999) 24 987,
2842 01:56:58.426168 TX Bit6 (981~1006) 26 993, Bit14 (975~999) 25 987,
2843 01:56:58.432819 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
2844 01:56:58.432911
2845 01:56:58.435931 Write Rank0 MR14 =0x26
2846 01:56:58.443595
2847 01:56:58.447017 CH=1, VrefRange= 0, VrefLevel = 38
2848 01:56:58.450318 TX Bit0 (983~1007) 25 995, Bit8 (972~996) 25 984,
2849 01:56:58.453745 TX Bit1 (982~1006) 25 994, Bit9 (971~994) 24 982,
2850 01:56:58.460110 TX Bit2 (978~1005) 28 991, Bit10 (974~998) 25 986,
2851 01:56:58.463441 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
2852 01:56:58.470088 TX Bit4 (982~1006) 25 994, Bit12 (975~999) 25 987,
2853 01:56:58.473294 TX Bit5 (983~1007) 25 995, Bit13 (976~999) 24 987,
2854 01:56:58.476594 TX Bit6 (981~1006) 26 993, Bit14 (975~999) 25 987,
2855 01:56:58.483070 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
2856 01:56:58.483191
2857 01:56:58.483293
2858 01:56:58.486662 TX Vref found, early break! 375< 381
2859 01:56:58.489661 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2860 01:56:58.492750 u1DelayCellOfst[0]=7 cells (6 PI)
2861 01:56:58.496270 u1DelayCellOfst[1]=6 cells (5 PI)
2862 01:56:58.499338 u1DelayCellOfst[2]=2 cells (2 PI)
2863 01:56:58.502817 u1DelayCellOfst[3]=0 cells (0 PI)
2864 01:56:58.505969 u1DelayCellOfst[4]=6 cells (5 PI)
2865 01:56:58.509658 u1DelayCellOfst[5]=7 cells (6 PI)
2866 01:56:58.512493 u1DelayCellOfst[6]=5 cells (4 PI)
2867 01:56:58.515751 u1DelayCellOfst[7]=5 cells (4 PI)
2868 01:56:58.519303 Byte0, DQ PI dly=989, DQM PI dly= 992
2869 01:56:58.522430 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2870 01:56:58.522521
2871 01:56:58.525538 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2872 01:56:58.528828
2873 01:56:58.528918 u1DelayCellOfst[8]=5 cells (4 PI)
2874 01:56:58.532065 u1DelayCellOfst[9]=2 cells (2 PI)
2875 01:56:58.535432 u1DelayCellOfst[10]=7 cells (6 PI)
2876 01:56:58.538681 u1DelayCellOfst[11]=9 cells (7 PI)
2877 01:56:58.541777 u1DelayCellOfst[12]=9 cells (7 PI)
2878 01:56:58.544967 u1DelayCellOfst[13]=9 cells (7 PI)
2879 01:56:58.548624 u1DelayCellOfst[14]=9 cells (7 PI)
2880 01:56:58.551662 u1DelayCellOfst[15]=0 cells (0 PI)
2881 01:56:58.554948 Byte1, DQ PI dly=980, DQM PI dly= 983
2882 01:56:58.558185 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2883 01:56:58.558276
2884 01:56:58.564862 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2885 01:56:58.564965
2886 01:56:58.565038 Write Rank0 MR14 =0x1e
2887 01:56:58.568140
2888 01:56:58.568229 Final TX Range 0 Vref 30
2889 01:56:58.568301
2890 01:56:58.574681 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2891 01:56:58.574772
2892 01:56:58.581182 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2893 01:56:58.587624 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2894 01:56:58.597403 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2895 01:56:58.597508 Write Rank0 MR3 =0xb0
2896 01:56:58.600833 DramC Write-DBI on
2897 01:56:58.600923 ==
2898 01:56:58.604255 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2899 01:56:58.607419 fsp= 1, odt_onoff= 1, Byte mode= 0
2900 01:56:58.607511 ==
2901 01:56:58.613899 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2902 01:56:58.613991
2903 01:56:58.614062 Begin, DQ Scan Range 703~767
2904 01:56:58.617270
2905 01:56:58.617359
2906 01:56:58.617439 TX Vref Scan disable
2907 01:56:58.620608 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2908 01:56:58.623666 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2909 01:56:58.626948 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2910 01:56:58.630420 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2911 01:56:58.633571 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2912 01:56:58.640027 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2913 01:56:58.643170 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2914 01:56:58.646674 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2915 01:56:58.649712 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2916 01:56:58.652964 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2917 01:56:58.656302 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2918 01:56:58.659543 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2919 01:56:58.662734 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2920 01:56:58.666179 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2921 01:56:58.669334 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2922 01:56:58.672525 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2923 01:56:58.675895 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2924 01:56:58.679186 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2925 01:56:58.682227 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2926 01:56:58.688971 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2927 01:56:58.692248 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2928 01:56:58.695455 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2929 01:56:58.702233 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2930 01:56:58.705507 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2931 01:56:58.708877 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2932 01:56:58.712034 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2933 01:56:58.715170 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2934 01:56:58.718768 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2935 01:56:58.722033 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2936 01:56:58.725095 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2937 01:56:58.728334 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2938 01:56:58.731691 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2939 01:56:58.734757 Byte0, DQ PI dly=737, DQM PI dly= 737
2940 01:56:58.741403 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
2941 01:56:58.741511
2942 01:56:58.744653 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
2943 01:56:58.744744
2944 01:56:58.747957 Byte1, DQ PI dly=728, DQM PI dly= 728
2945 01:56:58.751415 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2946 01:56:58.751520
2947 01:56:58.757983 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2948 01:56:58.758076
2949 01:56:58.764324 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2950 01:56:58.771151 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2951 01:56:58.777349 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2952 01:56:58.780829 Write Rank0 MR3 =0x30
2953 01:56:58.780919 DramC Write-DBI off
2954 01:56:58.780989
2955 01:56:58.784092 [DATLAT]
2956 01:56:58.787128 Freq=1600, CH1 RK0, use_rxtx_scan=0
2957 01:56:58.787219
2958 01:56:58.787291 DATLAT Default: 0xf
2959 01:56:58.790417 7, 0xFFFF, sum=0
2960 01:56:58.790509 8, 0xFFFF, sum=0
2961 01:56:58.793743 9, 0xFFFF, sum=0
2962 01:56:58.793835 10, 0xFFFF, sum=0
2963 01:56:58.797088 11, 0xFFFF, sum=0
2964 01:56:58.797180 12, 0xFFFF, sum=0
2965 01:56:58.800329 13, 0xFFFF, sum=0
2966 01:56:58.800422 14, 0x0, sum=1
2967 01:56:58.800494 15, 0x0, sum=2
2968 01:56:58.803644 16, 0x0, sum=3
2969 01:56:58.803736 17, 0x0, sum=4
2970 01:56:58.810087 pattern=2 first_step=14 total pass=5 best_step=16
2971 01:56:58.810183 ==
2972 01:56:58.813306 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2973 01:56:58.816524 fsp= 1, odt_onoff= 1, Byte mode= 0
2974 01:56:58.816616 ==
2975 01:56:58.823045 Start DQ dly to find pass range UseTestEngine =1
2976 01:56:58.826378 x-axis: bit #, y-axis: DQ dly (-127~63)
2977 01:56:58.826469 RX Vref Scan = 1
2978 01:56:58.934253
2979 01:56:58.934414 RX Vref found, early break!
2980 01:56:58.934490
2981 01:56:58.940737 Final RX Vref 11, apply to both rank0 and 1
2982 01:56:58.940831 ==
2983 01:56:58.943926 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2984 01:56:58.947445 fsp= 1, odt_onoff= 1, Byte mode= 0
2985 01:56:58.947537 ==
2986 01:56:58.950667 DQS Delay:
2987 01:56:58.950757 DQS0 = 0, DQS1 = 0
2988 01:56:58.950829 DQM Delay:
2989 01:56:58.953998 DQM0 = 20, DQM1 = 18
2990 01:56:58.954092 DQ Delay:
2991 01:56:58.957356 DQ0 =21, DQ1 =21, DQ2 =17, DQ3 =16
2992 01:56:58.960355 DQ4 =20, DQ5 =23, DQ6 =22, DQ7 =20
2993 01:56:58.963578 DQ8 =17, DQ9 =15, DQ10 =19, DQ11 =20
2994 01:56:58.967249 DQ12 =21, DQ13 =21, DQ14 =21, DQ15 =13
2995 01:56:58.967340
2996 01:56:58.967411
2997 01:56:58.967499
2998 01:56:58.970148 [DramC_TX_OE_Calibration] TA2
2999 01:56:58.973639 Original DQ_B0 (3 6) =30, OEN = 27
3000 01:56:58.977080 Original DQ_B1 (3 6) =30, OEN = 27
3001 01:56:58.979914 23, 0x0, End_B0=23 End_B1=23
3002 01:56:58.983498 24, 0x0, End_B0=24 End_B1=24
3003 01:56:58.983591 25, 0x0, End_B0=25 End_B1=25
3004 01:56:58.986597 26, 0x0, End_B0=26 End_B1=26
3005 01:56:58.989988 27, 0x0, End_B0=27 End_B1=27
3006 01:56:58.993117 28, 0x0, End_B0=28 End_B1=28
3007 01:56:58.996487 29, 0x0, End_B0=29 End_B1=29
3008 01:56:58.996579 30, 0x0, End_B0=30 End_B1=30
3009 01:56:58.999612 31, 0xFFFF, End_B0=30 End_B1=30
3010 01:56:59.006111 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3011 01:56:59.012694 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3012 01:56:59.012789
3013 01:56:59.012861
3014 01:56:59.012927 Write Rank0 MR23 =0x3f
3015 01:56:59.016181 [DQSOSC]
3016 01:56:59.022459 [DQSOSCAuto] RK0, (LSB)MR18= 0xb3b3, (MSB)MR19= 0x202, tDQSOscB0 = 455 ps tDQSOscB1 = 455 ps
3017 01:56:59.028990 CH1_RK0: MR19=0x202, MR18=0xB3B3, DQSOSC=455, MR23=63, INC=11, DEC=17
3018 01:56:59.032400 Write Rank0 MR23 =0x3f
3019 01:56:59.032490 [DQSOSC]
3020 01:56:59.039011 [DQSOSCAuto] RK0, (LSB)MR18= 0xb4b4, (MSB)MR19= 0x202, tDQSOscB0 = 455 ps tDQSOscB1 = 455 ps
3021 01:56:59.042250 CH1 RK0: MR19=202, MR18=B4B4
3022 01:56:59.045584 [RankSwap] Rank num 2, (Multi 1), Rank 1
3023 01:56:59.048610 Write Rank0 MR2 =0xad
3024 01:56:59.048701 [Write Leveling]
3025 01:56:59.051907 delay byte0 byte1 byte2 byte3
3026 01:56:59.052009
3027 01:56:59.055473 10 0 0
3028 01:56:59.055566 11 0 0
3029 01:56:59.058665 12 0 0
3030 01:56:59.058756 13 0 0
3031 01:56:59.058830 14 0 0
3032 01:56:59.061763 15 0 0
3033 01:56:59.061855 16 0 0
3034 01:56:59.064966 17 0 0
3035 01:56:59.065057 18 0 0
3036 01:56:59.065130 19 0 0
3037 01:56:59.068389 20 0 0
3038 01:56:59.068481 21 0 0
3039 01:56:59.071706 22 0 0
3040 01:56:59.071798 23 0 0
3041 01:56:59.074950 24 0 0
3042 01:56:59.075043 25 0 0
3043 01:56:59.075116 26 0 0
3044 01:56:59.078358 27 0 0
3045 01:56:59.078449 28 0 ff
3046 01:56:59.081712 29 0 ff
3047 01:56:59.081804 30 0 ff
3048 01:56:59.084655 31 0 ff
3049 01:56:59.084746 32 0 ff
3050 01:56:59.087946 33 0 ff
3051 01:56:59.088038 34 0 ff
3052 01:56:59.088111 35 ff ff
3053 01:56:59.091265 36 ff ff
3054 01:56:59.091357 37 ff ff
3055 01:56:59.094462 38 ff ff
3056 01:56:59.094554 39 ff ff
3057 01:56:59.097787 40 ff ff
3058 01:56:59.097908 41 ff ff
3059 01:56:59.104425 pass bytecount = 0xff (0xff: all bytes pass)
3060 01:56:59.104516
3061 01:56:59.104588 DQS0 dly: 35
3062 01:56:59.104654 DQS1 dly: 28
3063 01:56:59.107691 Write Rank0 MR2 =0x2d
3064 01:56:59.111046 [RankSwap] Rank num 2, (Multi 1), Rank 0
3065 01:56:59.114119 Write Rank1 MR1 =0xd6
3066 01:56:59.114210 [Gating]
3067 01:56:59.114281 ==
3068 01:56:59.120747 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3069 01:56:59.120839 fsp= 1, odt_onoff= 1, Byte mode= 0
3070 01:56:59.124120 ==
3071 01:56:59.127214 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3072 01:56:59.130684 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3073 01:56:59.133949 3 1 8 |2c2b 3636 |(11 11)(0 0) |(1 1)(0 0)| 0
3074 01:56:59.140418 3 1 12 |2c2b 3635 |(11 11)(11 11) |(0 0)(0 0)| 0
3075 01:56:59.144201 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
3076 01:56:59.147333 3 1 20 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
3077 01:56:59.153548 3 1 24 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
3078 01:56:59.156918 3 1 28 |2c2b 3332 |(11 11)(11 11) |(1 0)(1 1)| 0
3079 01:56:59.160178 [Byte 1] Lead/lag falling Transition (3, 1, 28)
3080 01:56:59.166511 3 2 0 |2c2b 3535 |(11 11)(0 0) |(1 0)(0 1)| 0
3081 01:56:59.169770 3 2 4 |2c2b 3434 |(11 11)(11 11) |(1 0)(0 1)| 0
3082 01:56:59.173205 3 2 8 |2c2b 3434 |(11 11)(10 10) |(1 0)(0 1)| 0
3083 01:56:59.179549 3 2 12 |2c2b 3434 |(11 11)(11 11) |(1 0)(0 1)| 0
3084 01:56:59.183024 3 2 16 |2c2b 3332 |(11 11)(11 11) |(0 0)(0 1)| 0
3085 01:56:59.186329 3 2 20 |201 3434 |(11 11)(10 10) |(0 0)(0 1)| 0
3086 01:56:59.192766 3 2 24 |3534 3434 |(11 11)(11 0) |(0 0)(1 1)| 0
3087 01:56:59.195811 [Byte 1] Lead/lag Transition tap number (1)
3088 01:56:59.199116 3 2 28 |3534 b0a |(11 11)(11 11) |(0 0)(0 0)| 0
3089 01:56:59.202648 3 3 0 |3534 3d3d |(11 11)(0 0) |(0 0)(0 0)| 0
3090 01:56:59.209188 3 3 4 |3534 3d3c |(11 11)(11 11) |(0 0)(0 0)| 0
3091 01:56:59.212606 3 3 8 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
3092 01:56:59.215715 3 3 12 |3534 3c3c |(11 11)(0 0) |(0 0)(1 1)| 0
3093 01:56:59.222106 3 3 16 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
3094 01:56:59.225314 3 3 20 |3534 3c3b |(11 11)(11 11) |(1 1)(1 1)| 0
3095 01:56:59.228889 3 3 24 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
3096 01:56:59.235450 [Byte 0] Lead/lag falling Transition (3, 3, 24)
3097 01:56:59.238584 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3098 01:56:59.241730 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3099 01:56:59.248192 [Byte 1] Lead/lag falling Transition (3, 4, 0)
3100 01:56:59.251511 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3101 01:56:59.254706 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3102 01:56:59.261272 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3103 01:56:59.264453 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3104 01:56:59.267759 3 4 20 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3105 01:56:59.274295 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3106 01:56:59.277693 3 4 28 |3d3d 1211 |(11 11)(11 11) |(1 1)(1 1)| 0
3107 01:56:59.280996 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3108 01:56:59.287335 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3109 01:56:59.290701 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3110 01:56:59.294106 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3111 01:56:59.300636 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3112 01:56:59.303650 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3113 01:56:59.307192 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3114 01:56:59.313566 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3115 01:56:59.316778 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3116 01:56:59.320112 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3117 01:56:59.326837 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3118 01:56:59.329980 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3119 01:56:59.333354 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3120 01:56:59.339660 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3121 01:56:59.343041 [Byte 0] Lead/lag Transition tap number (3)
3122 01:56:59.346221 [Byte 1] Lead/lag falling Transition (3, 6, 16)
3123 01:56:59.349571 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3124 01:56:59.356084 [Byte 1] Lead/lag Transition tap number (2)
3125 01:56:59.359393 3 6 24 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
3126 01:56:59.362537 [Byte 0]First pass (3, 6, 24)
3127 01:56:59.365904 3 6 28 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3128 01:56:59.369084 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3129 01:56:59.372673 [Byte 1]First pass (3, 7, 0)
3130 01:56:59.375693 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3131 01:56:59.378937 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3132 01:56:59.386088 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3133 01:56:59.389072 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3134 01:56:59.392129 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3135 01:56:59.395471 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3136 01:56:59.401917 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3137 01:56:59.405261 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3138 01:56:59.408578 All bytes gating window > 1UI, Early break!
3139 01:56:59.408671
3140 01:56:59.411798 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 14)
3141 01:56:59.411890
3142 01:56:59.415042 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
3143 01:56:59.415133
3144 01:56:59.415204
3145 01:56:59.415271
3146 01:56:59.421544 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
3147 01:56:59.421635
3148 01:56:59.425146 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
3149 01:56:59.425237
3150 01:56:59.425309
3151 01:56:59.428028 Write Rank1 MR1 =0x56
3152 01:56:59.428119
3153 01:56:59.428190 best RODT dly(2T, 0.5T) = (2, 3)
3154 01:56:59.431158
3155 01:56:59.431248 best RODT dly(2T, 0.5T) = (2, 3)
3156 01:56:59.434657 ==
3157 01:56:59.437833 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3158 01:56:59.441224 fsp= 1, odt_onoff= 1, Byte mode= 0
3159 01:56:59.441346 ==
3160 01:56:59.444459 Start DQ dly to find pass range UseTestEngine =0
3161 01:56:59.447603 x-axis: bit #, y-axis: DQ dly (-127~63)
3162 01:56:59.450937 RX Vref Scan = 0
3163 01:56:59.454421 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3164 01:56:59.457919 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3165 01:56:59.460928 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3166 01:56:59.463961 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3167 01:56:59.464054 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3168 01:56:59.467072 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3169 01:56:59.470325 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3170 01:56:59.473965 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3171 01:56:59.477124 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3172 01:56:59.480663 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3173 01:56:59.483561 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3174 01:56:59.486792 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3175 01:56:59.490284 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3176 01:56:59.493337 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3177 01:56:59.493462 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3178 01:56:59.496955 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3179 01:56:59.499903 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3180 01:56:59.503286 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3181 01:56:59.506399 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3182 01:56:59.510004 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3183 01:56:59.513189 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3184 01:56:59.516452 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3185 01:56:59.516544 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3186 01:56:59.519660 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3187 01:56:59.523065 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3188 01:56:59.526296 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3189 01:56:59.529753 0, [0] xxxoxxxx ooxxxxxo [MSB]
3190 01:56:59.532943 1, [0] xxxoxxxx ooxxxxxo [MSB]
3191 01:56:59.536112 2, [0] xxxoxxxx ooxxxxxo [MSB]
3192 01:56:59.536208 3, [0] xxooxxxo oooxoxxo [MSB]
3193 01:56:59.539223 4, [0] oooooxxo oooooooo [MSB]
3194 01:56:59.542746 32, [0] oooooooo ooooooox [MSB]
3195 01:56:59.545973 33, [0] oooooooo ooooooox [MSB]
3196 01:56:59.549083 34, [0] oooooooo oxooooox [MSB]
3197 01:56:59.552340 35, [0] ooxxoooo xxooooox [MSB]
3198 01:56:59.555554 36, [0] ooxxoooo xxooooox [MSB]
3199 01:56:59.555646 37, [0] ooxxoooo xxooooox [MSB]
3200 01:56:59.559082 38, [0] ooxxoooo xxooooox [MSB]
3201 01:56:59.562236 39, [0] oxxxooox xxxoooox [MSB]
3202 01:56:59.565424 40, [0] oxxxooox xxxxooox [MSB]
3203 01:56:59.568788 41, [0] xxxxxoxx xxxxxoxx [MSB]
3204 01:56:59.571957 42, [0] xxxxxxxx xxxxxxxx [MSB]
3205 01:56:59.575255 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
3206 01:56:59.578866 iDelay=42, Bit 1, Center 21 (4 ~ 38) 35
3207 01:56:59.581706 iDelay=42, Bit 2, Center 18 (3 ~ 34) 32
3208 01:56:59.585106 iDelay=42, Bit 3, Center 16 (-1 ~ 34) 36
3209 01:56:59.588410 iDelay=42, Bit 4, Center 22 (4 ~ 40) 37
3210 01:56:59.591638 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3211 01:56:59.595100 iDelay=42, Bit 6, Center 22 (5 ~ 40) 36
3212 01:56:59.598213 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3213 01:56:59.604876 iDelay=42, Bit 8, Center 16 (-1 ~ 34) 36
3214 01:56:59.607922 iDelay=42, Bit 9, Center 16 (-1 ~ 33) 35
3215 01:56:59.611371 iDelay=42, Bit 10, Center 20 (3 ~ 38) 36
3216 01:56:59.614617 iDelay=42, Bit 11, Center 21 (4 ~ 39) 36
3217 01:56:59.617662 iDelay=42, Bit 12, Center 21 (3 ~ 40) 38
3218 01:56:59.621279 iDelay=42, Bit 13, Center 22 (4 ~ 41) 38
3219 01:56:59.624293 iDelay=42, Bit 14, Center 22 (4 ~ 40) 37
3220 01:56:59.627856 iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36
3221 01:56:59.627948 ==
3222 01:56:59.634243 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3223 01:56:59.637784 fsp= 1, odt_onoff= 1, Byte mode= 0
3224 01:56:59.637875 ==
3225 01:56:59.637947 DQS Delay:
3226 01:56:59.640828 DQS0 = 0, DQS1 = 0
3227 01:56:59.640918 DQM Delay:
3228 01:56:59.643890 DQM0 = 20, DQM1 = 18
3229 01:56:59.643980 DQ Delay:
3230 01:56:59.647388 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3231 01:56:59.650719 DQ4 =22, DQ5 =23, DQ6 =22, DQ7 =20
3232 01:56:59.653983 DQ8 =16, DQ9 =16, DQ10 =20, DQ11 =21
3233 01:56:59.657162 DQ12 =21, DQ13 =22, DQ14 =22, DQ15 =13
3234 01:56:59.657252
3235 01:56:59.657322
3236 01:56:59.660476 DramC Write-DBI off
3237 01:56:59.660565 ==
3238 01:56:59.663600 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3239 01:56:59.666885 fsp= 1, odt_onoff= 1, Byte mode= 0
3240 01:56:59.666975 ==
3241 01:56:59.673410 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3242 01:56:59.673510
3243 01:56:59.673581 Begin, DQ Scan Range 924~1180
3244 01:56:59.676827
3245 01:56:59.676916
3246 01:56:59.676987 TX Vref Scan disable
3247 01:56:59.679939 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3248 01:56:59.683146 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3249 01:56:59.686641 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3250 01:56:59.693110 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3251 01:56:59.696202 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3252 01:56:59.699456 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3253 01:56:59.702896 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3254 01:56:59.706027 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3255 01:56:59.709408 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3256 01:56:59.712981 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3257 01:56:59.715818 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3258 01:56:59.719118 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3259 01:56:59.722541 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3260 01:56:59.725612 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3261 01:56:59.728862 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3262 01:56:59.732305 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3263 01:56:59.738710 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3264 01:56:59.742164 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3265 01:56:59.745411 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3266 01:56:59.748646 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3267 01:56:59.751813 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3268 01:56:59.755370 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3269 01:56:59.758498 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3270 01:56:59.761971 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3271 01:56:59.764970 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3272 01:56:59.768162 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3273 01:56:59.771771 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3274 01:56:59.774956 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3275 01:56:59.781379 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3276 01:56:59.784675 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3277 01:56:59.787754 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3278 01:56:59.791156 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3279 01:56:59.794493 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3280 01:56:59.797726 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3281 01:56:59.801115 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3282 01:56:59.804171 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3283 01:56:59.807414 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3284 01:56:59.810833 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3285 01:56:59.814030 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3286 01:56:59.817172 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3287 01:56:59.820892 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3288 01:56:59.823813 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3289 01:56:59.827087 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3290 01:56:59.830330 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3291 01:56:59.837031 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3292 01:56:59.840462 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3293 01:56:59.843528 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3294 01:56:59.847060 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3295 01:56:59.850377 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3296 01:56:59.853529 973 |3 6 13|[0] xxxxxxxx xxxxxxxo [MSB]
3297 01:56:59.856853 974 |3 6 14|[0] xxxxxxxx xxxxxxxo [MSB]
3298 01:56:59.860014 975 |3 6 15|[0] xxxxxxxx ooxxxxxo [MSB]
3299 01:56:59.863361 976 |3 6 16|[0] xxxxxxxx oooxxxxo [MSB]
3300 01:56:59.866559 977 |3 6 17|[0] xxxxxxxx ooooxxoo [MSB]
3301 01:56:59.869786 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
3302 01:56:59.873296 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3303 01:56:59.876248 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3304 01:56:59.882935 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3305 01:56:59.886406 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
3306 01:56:59.889594 983 |3 6 23|[0] xooooxox oooooooo [MSB]
3307 01:56:59.892835 991 |3 6 31|[0] oooooooo ooooooox [MSB]
3308 01:56:59.895986 992 |3 6 32|[0] oooooooo oxooooox [MSB]
3309 01:56:59.899477 993 |3 6 33|[0] oooooooo xxooooox [MSB]
3310 01:56:59.902682 994 |3 6 34|[0] oooooooo xxooooox [MSB]
3311 01:56:59.906111 995 |3 6 35|[0] oooooooo xxooooox [MSB]
3312 01:56:59.909051 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3313 01:56:59.915611 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3314 01:56:59.918862 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3315 01:56:59.926486 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3316 01:56:59.926584 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3317 01:56:59.928774 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3318 01:56:59.931915 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
3319 01:56:59.935246 1003 |3 6 43|[0] ooxxoooo xxxxxxxx [MSB]
3320 01:56:59.938429 1004 |3 6 44|[0] ooxxooox xxxxxxxx [MSB]
3321 01:56:59.941882 1005 |3 6 45|[0] ooxxooox xxxxxxxx [MSB]
3322 01:56:59.945339 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3323 01:56:59.948276 Byte0, DQ PI dly=992, DQM PI dly= 992
3324 01:56:59.955091 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
3325 01:56:59.955212
3326 01:56:59.958348 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
3327 01:56:59.958442
3328 01:56:59.961779 Byte1, DQ PI dly=983, DQM PI dly= 983
3329 01:56:59.967994 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3330 01:56:59.968088
3331 01:56:59.971271 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3332 01:56:59.971369
3333 01:56:59.971439 ==
3334 01:56:59.977888 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3335 01:56:59.981126 fsp= 1, odt_onoff= 1, Byte mode= 0
3336 01:56:59.981224 ==
3337 01:56:59.984423 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3338 01:56:59.984517
3339 01:56:59.987602 Begin, DQ Scan Range 959~1023
3340 01:56:59.987695 Write Rank1 MR14 =0x0
3341 01:56:59.997749
3342 01:56:59.997867 CH=1, VrefRange= 0, VrefLevel = 0
3343 01:57:00.004398 TX Bit0 (985~1002) 18 993, Bit8 (978~989) 12 983,
3344 01:57:00.007568 TX Bit1 (985~999) 15 992, Bit9 (976~987) 12 981,
3345 01:57:00.013982 TX Bit2 (984~997) 14 990, Bit10 (977~992) 16 984,
3346 01:57:00.017452 TX Bit3 (981~993) 13 987, Bit11 (979~992) 14 985,
3347 01:57:00.020545 TX Bit4 (984~999) 16 991, Bit12 (980~990) 11 985,
3348 01:57:00.027220 TX Bit5 (986~1001) 16 993, Bit13 (980~993) 14 986,
3349 01:57:00.030482 TX Bit6 (985~999) 15 992, Bit14 (979~991) 13 985,
3350 01:57:00.037038 TX Bit7 (985~998) 14 991, Bit15 (975~984) 10 979,
3351 01:57:00.037198
3352 01:57:00.037302 Write Rank1 MR14 =0x2
3353 01:57:00.046801
3354 01:57:00.046931 CH=1, VrefRange= 0, VrefLevel = 2
3355 01:57:00.053242 TX Bit0 (985~1002) 18 993, Bit8 (978~990) 13 984,
3356 01:57:00.056296 TX Bit1 (984~1000) 17 992, Bit9 (976~988) 13 982,
3357 01:57:00.062929 TX Bit2 (983~998) 16 990, Bit10 (977~992) 16 984,
3358 01:57:00.066137 TX Bit3 (980~994) 15 987, Bit11 (978~992) 15 985,
3359 01:57:00.072943 TX Bit4 (984~1000) 17 992, Bit12 (980~991) 12 985,
3360 01:57:00.076139 TX Bit5 (985~1002) 18 993, Bit13 (979~994) 16 986,
3361 01:57:00.079521 TX Bit6 (985~1000) 16 992, Bit14 (978~991) 14 984,
3362 01:57:00.085952 TX Bit7 (985~998) 14 991, Bit15 (975~985) 11 980,
3363 01:57:00.086152
3364 01:57:00.086279 Write Rank1 MR14 =0x4
3365 01:57:00.096440
3366 01:57:00.096627 CH=1, VrefRange= 0, VrefLevel = 4
3367 01:57:00.102676 TX Bit0 (985~1003) 19 994, Bit8 (977~990) 14 983,
3368 01:57:00.105964 TX Bit1 (984~1000) 17 992, Bit9 (976~989) 14 982,
3369 01:57:00.112418 TX Bit2 (983~998) 16 990, Bit10 (977~993) 17 985,
3370 01:57:00.115625 TX Bit3 (980~995) 16 987, Bit11 (978~993) 16 985,
3371 01:57:00.118860 TX Bit4 (984~1001) 18 992, Bit12 (979~992) 14 985,
3372 01:57:00.125882 TX Bit5 (985~1002) 18 993, Bit13 (979~994) 16 986,
3373 01:57:00.128993 TX Bit6 (984~1001) 18 992, Bit14 (978~992) 15 985,
3374 01:57:00.135246 TX Bit7 (985~999) 15 992, Bit15 (974~986) 13 980,
3375 01:57:00.135377
3376 01:57:00.135451 Write Rank1 MR14 =0x6
3377 01:57:00.145735
3378 01:57:00.145857 CH=1, VrefRange= 0, VrefLevel = 6
3379 01:57:00.152129 TX Bit0 (985~1004) 20 994, Bit8 (977~990) 14 983,
3380 01:57:00.155352 TX Bit1 (984~1001) 18 992, Bit9 (975~990) 16 982,
3381 01:57:00.161949 TX Bit2 (982~999) 18 990, Bit10 (977~994) 18 985,
3382 01:57:00.165222 TX Bit3 (979~997) 19 988, Bit11 (978~994) 17 986,
3383 01:57:00.168493 TX Bit4 (984~1002) 19 993, Bit12 (979~992) 14 985,
3384 01:57:00.175346 TX Bit5 (985~1003) 19 994, Bit13 (979~995) 17 987,
3385 01:57:00.178371 TX Bit6 (984~1001) 18 992, Bit14 (978~992) 15 985,
3386 01:57:00.184759 TX Bit7 (984~1000) 17 992, Bit15 (973~986) 14 979,
3387 01:57:00.184864
3388 01:57:00.184936 Write Rank1 MR14 =0x8
3389 01:57:00.195309
3390 01:57:00.195400 CH=1, VrefRange= 0, VrefLevel = 8
3391 01:57:00.201893 TX Bit0 (985~1005) 21 995, Bit8 (977~991) 15 984,
3392 01:57:00.205207 TX Bit1 (984~1002) 19 993, Bit9 (976~990) 15 983,
3393 01:57:00.211810 TX Bit2 (982~999) 18 990, Bit10 (977~994) 18 985,
3394 01:57:00.215407 TX Bit3 (979~997) 19 988, Bit11 (978~994) 17 986,
3395 01:57:00.218501 TX Bit4 (983~1003) 21 993, Bit12 (978~993) 16 985,
3396 01:57:00.224673 TX Bit5 (985~1004) 20 994, Bit13 (979~996) 18 987,
3397 01:57:00.228237 TX Bit6 (984~1002) 19 993, Bit14 (977~993) 17 985,
3398 01:57:00.234387 TX Bit7 (984~1001) 18 992, Bit15 (972~988) 17 980,
3399 01:57:00.234480
3400 01:57:00.234551 Write Rank1 MR14 =0xa
3401 01:57:00.245279
3402 01:57:00.248339 CH=1, VrefRange= 0, VrefLevel = 10
3403 01:57:00.251552 TX Bit0 (984~1005) 22 994, Bit8 (976~991) 16 983,
3404 01:57:00.255144 TX Bit1 (984~1002) 19 993, Bit9 (975~990) 16 982,
3405 01:57:00.261515 TX Bit2 (982~1000) 19 991, Bit10 (977~995) 19 986,
3406 01:57:00.264967 TX Bit3 (979~997) 19 988, Bit11 (977~996) 20 986,
3407 01:57:00.271554 TX Bit4 (983~1003) 21 993, Bit12 (978~994) 17 986,
3408 01:57:00.274853 TX Bit5 (984~1004) 21 994, Bit13 (978~997) 20 987,
3409 01:57:00.278066 TX Bit6 (984~1003) 20 993, Bit14 (977~994) 18 985,
3410 01:57:00.284467 TX Bit7 (984~1001) 18 992, Bit15 (972~989) 18 980,
3411 01:57:00.284560
3412 01:57:00.284631 Write Rank1 MR14 =0xc
3413 01:57:00.295200
3414 01:57:00.298366 CH=1, VrefRange= 0, VrefLevel = 12
3415 01:57:00.301689 TX Bit0 (984~1005) 22 994, Bit8 (976~991) 16 983,
3416 01:57:00.304938 TX Bit1 (984~1003) 20 993, Bit9 (975~991) 17 983,
3417 01:57:00.311615 TX Bit2 (981~1001) 21 991, Bit10 (976~996) 21 986,
3418 01:57:00.314814 TX Bit3 (978~998) 21 988, Bit11 (977~996) 20 986,
3419 01:57:00.321312 TX Bit4 (983~1004) 22 993, Bit12 (977~995) 19 986,
3420 01:57:00.324803 TX Bit5 (984~1005) 22 994, Bit13 (978~997) 20 987,
3421 01:57:00.327946 TX Bit6 (984~1004) 21 994, Bit14 (977~994) 18 985,
3422 01:57:00.334451 TX Bit7 (984~1002) 19 993, Bit15 (971~990) 20 980,
3423 01:57:00.334543
3424 01:57:00.334613 Write Rank1 MR14 =0xe
3425 01:57:00.345344
3426 01:57:00.348366 CH=1, VrefRange= 0, VrefLevel = 14
3427 01:57:00.351693 TX Bit0 (984~1005) 22 994, Bit8 (975~992) 18 983,
3428 01:57:00.354919 TX Bit1 (983~1004) 22 993, Bit9 (975~991) 17 983,
3429 01:57:00.361438 TX Bit2 (981~1001) 21 991, Bit10 (976~997) 22 986,
3430 01:57:00.364812 TX Bit3 (978~998) 21 988, Bit11 (977~997) 21 987,
3431 01:57:00.371430 TX Bit4 (983~1004) 22 993, Bit12 (978~996) 19 987,
3432 01:57:00.374592 TX Bit5 (984~1005) 22 994, Bit13 (977~998) 22 987,
3433 01:57:00.377836 TX Bit6 (983~1005) 23 994, Bit14 (977~996) 20 986,
3434 01:57:00.384469 TX Bit7 (984~1003) 20 993, Bit15 (971~990) 20 980,
3435 01:57:00.384563
3436 01:57:00.384635 Write Rank1 MR14 =0x10
3437 01:57:00.395477
3438 01:57:00.398598 CH=1, VrefRange= 0, VrefLevel = 16
3439 01:57:00.401866 TX Bit0 (984~1006) 23 995, Bit8 (975~992) 18 983,
3440 01:57:00.405135 TX Bit1 (983~1005) 23 994, Bit9 (975~991) 17 983,
3441 01:57:00.411892 TX Bit2 (980~1002) 23 991, Bit10 (976~998) 23 987,
3442 01:57:00.415050 TX Bit3 (978~998) 21 988, Bit11 (977~998) 22 987,
3443 01:57:00.421562 TX Bit4 (982~1005) 24 993, Bit12 (977~996) 20 986,
3444 01:57:00.424748 TX Bit5 (984~1005) 22 994, Bit13 (977~998) 22 987,
3445 01:57:00.428144 TX Bit6 (983~1005) 23 994, Bit14 (976~997) 22 986,
3446 01:57:00.434712 TX Bit7 (983~1004) 22 993, Bit15 (970~990) 21 980,
3447 01:57:00.434805
3448 01:57:00.434877 Write Rank1 MR14 =0x12
3449 01:57:00.445518
3450 01:57:00.448919 CH=1, VrefRange= 0, VrefLevel = 18
3451 01:57:00.451893 TX Bit0 (984~1006) 23 995, Bit8 (975~993) 19 984,
3452 01:57:00.455187 TX Bit1 (982~1005) 24 993, Bit9 (975~992) 18 983,
3453 01:57:00.461870 TX Bit2 (980~1003) 24 991, Bit10 (976~998) 23 987,
3454 01:57:00.465075 TX Bit3 (978~999) 22 988, Bit11 (977~998) 22 987,
3455 01:57:00.471587 TX Bit4 (982~1005) 24 993, Bit12 (977~997) 21 987,
3456 01:57:00.475035 TX Bit5 (984~1005) 22 994, Bit13 (977~999) 23 988,
3457 01:57:00.478091 TX Bit6 (983~1005) 23 994, Bit14 (976~997) 22 986,
3458 01:57:00.484668 TX Bit7 (983~1004) 22 993, Bit15 (970~991) 22 980,
3459 01:57:00.484759
3460 01:57:00.487664 Write Rank1 MR14 =0x14
3461 01:57:00.495879
3462 01:57:00.499107 CH=1, VrefRange= 0, VrefLevel = 20
3463 01:57:00.502170 TX Bit0 (984~1006) 23 995, Bit8 (975~993) 19 984,
3464 01:57:00.505736 TX Bit1 (983~1005) 23 994, Bit9 (974~992) 19 983,
3465 01:57:00.512063 TX Bit2 (980~1004) 25 992, Bit10 (975~998) 24 986,
3466 01:57:00.515248 TX Bit3 (978~999) 22 988, Bit11 (976~998) 23 987,
3467 01:57:00.521812 TX Bit4 (982~1005) 24 993, Bit12 (977~997) 21 987,
3468 01:57:00.525294 TX Bit5 (983~1006) 24 994, Bit13 (977~999) 23 988,
3469 01:57:00.528433 TX Bit6 (982~1005) 24 993, Bit14 (976~998) 23 987,
3470 01:57:00.534930 TX Bit7 (982~1005) 24 993, Bit15 (970~991) 22 980,
3471 01:57:00.535021
3472 01:57:00.538247 Write Rank1 MR14 =0x16
3473 01:57:00.545950
3474 01:57:00.549389 CH=1, VrefRange= 0, VrefLevel = 22
3475 01:57:00.552451 TX Bit0 (984~1006) 23 995, Bit8 (974~994) 21 984,
3476 01:57:00.555620 TX Bit1 (983~1005) 23 994, Bit9 (974~992) 19 983,
3477 01:57:00.562356 TX Bit2 (980~1004) 25 992, Bit10 (975~998) 24 986,
3478 01:57:00.565416 TX Bit3 (977~1000) 24 988, Bit11 (976~999) 24 987,
3479 01:57:00.572015 TX Bit4 (981~1005) 25 993, Bit12 (976~998) 23 987,
3480 01:57:00.575532 TX Bit5 (983~1006) 24 994, Bit13 (977~999) 23 988,
3481 01:57:00.578722 TX Bit6 (982~1005) 24 993, Bit14 (976~998) 23 987,
3482 01:57:00.584985 TX Bit7 (983~1005) 23 994, Bit15 (970~992) 23 981,
3483 01:57:00.585077
3484 01:57:00.588148 Write Rank1 MR14 =0x18
3485 01:57:00.596108
3486 01:57:00.599716 CH=1, VrefRange= 0, VrefLevel = 24
3487 01:57:00.602922 TX Bit0 (984~1006) 23 995, Bit8 (974~995) 22 984,
3488 01:57:00.605991 TX Bit1 (982~1006) 25 994, Bit9 (973~993) 21 983,
3489 01:57:00.612646 TX Bit2 (979~1005) 27 992, Bit10 (975~998) 24 986,
3490 01:57:00.615962 TX Bit3 (978~1000) 23 989, Bit11 (976~999) 24 987,
3491 01:57:00.622602 TX Bit4 (981~1006) 26 993, Bit12 (976~998) 23 987,
3492 01:57:00.625659 TX Bit5 (983~1006) 24 994, Bit13 (977~999) 23 988,
3493 01:57:00.629248 TX Bit6 (982~1006) 25 994, Bit14 (976~998) 23 987,
3494 01:57:00.635410 TX Bit7 (982~1005) 24 993, Bit15 (970~992) 23 981,
3495 01:57:00.635533
3496 01:57:00.638597 Write Rank1 MR14 =0x1a
3497 01:57:00.646623
3498 01:57:00.649890 CH=1, VrefRange= 0, VrefLevel = 26
3499 01:57:00.653207 TX Bit0 (983~1007) 25 995, Bit8 (974~996) 23 985,
3500 01:57:00.656481 TX Bit1 (982~1006) 25 994, Bit9 (972~994) 23 983,
3501 01:57:00.663134 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
3502 01:57:00.666356 TX Bit3 (977~1001) 25 989, Bit11 (976~999) 24 987,
3503 01:57:00.672888 TX Bit4 (981~1006) 26 993, Bit12 (976~998) 23 987,
3504 01:57:00.676013 TX Bit5 (983~1006) 24 994, Bit13 (976~999) 24 987,
3505 01:57:00.679507 TX Bit6 (981~1006) 26 993, Bit14 (975~998) 24 986,
3506 01:57:00.685830 TX Bit7 (982~1006) 25 994, Bit15 (969~992) 24 980,
3507 01:57:00.685921
3508 01:57:00.689116 Write Rank1 MR14 =0x1c
3509 01:57:00.697278
3510 01:57:00.700186 CH=1, VrefRange= 0, VrefLevel = 28
3511 01:57:00.703902 TX Bit0 (983~1007) 25 995, Bit8 (973~996) 24 984,
3512 01:57:00.706920 TX Bit1 (981~1006) 26 993, Bit9 (972~994) 23 983,
3513 01:57:00.713390 TX Bit2 (978~1005) 28 991, Bit10 (975~999) 25 987,
3514 01:57:00.716679 TX Bit3 (977~1001) 25 989, Bit11 (975~999) 25 987,
3515 01:57:00.723345 TX Bit4 (980~1006) 27 993, Bit12 (976~999) 24 987,
3516 01:57:00.726587 TX Bit5 (983~1007) 25 995, Bit13 (976~999) 24 987,
3517 01:57:00.729942 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
3518 01:57:00.736428 TX Bit7 (981~1005) 25 993, Bit15 (969~992) 24 980,
3519 01:57:00.736519
3520 01:57:00.739841 Write Rank1 MR14 =0x1e
3521 01:57:00.747611
3522 01:57:00.750856 CH=1, VrefRange= 0, VrefLevel = 30
3523 01:57:00.753973 TX Bit0 (983~1007) 25 995, Bit8 (973~997) 25 985,
3524 01:57:00.757414 TX Bit1 (981~1006) 26 993, Bit9 (971~994) 24 982,
3525 01:57:00.764079 TX Bit2 (979~1005) 27 992, Bit10 (976~999) 24 987,
3526 01:57:00.767250 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
3527 01:57:00.773752 TX Bit4 (981~1006) 26 993, Bit12 (976~999) 24 987,
3528 01:57:00.777071 TX Bit5 (982~1006) 25 994, Bit13 (976~999) 24 987,
3529 01:57:00.780362 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
3530 01:57:00.786762 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
3531 01:57:00.786854
3532 01:57:00.789902 Write Rank1 MR14 =0x20
3533 01:57:00.797978
3534 01:57:00.801299 CH=1, VrefRange= 0, VrefLevel = 32
3535 01:57:00.804557 TX Bit0 (983~1007) 25 995, Bit8 (973~997) 25 985,
3536 01:57:00.807873 TX Bit1 (981~1006) 26 993, Bit9 (971~994) 24 982,
3537 01:57:00.814381 TX Bit2 (979~1005) 27 992, Bit10 (976~999) 24 987,
3538 01:57:00.817760 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
3539 01:57:00.824152 TX Bit4 (981~1006) 26 993, Bit12 (976~999) 24 987,
3540 01:57:00.827458 TX Bit5 (982~1006) 25 994, Bit13 (976~999) 24 987,
3541 01:57:00.831121 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
3542 01:57:00.837486 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
3543 01:57:00.837577
3544 01:57:00.840351 Write Rank1 MR14 =0x22
3545 01:57:00.848568
3546 01:57:00.851909 CH=1, VrefRange= 0, VrefLevel = 34
3547 01:57:00.855001 TX Bit0 (983~1007) 25 995, Bit8 (973~997) 25 985,
3548 01:57:00.858237 TX Bit1 (981~1006) 26 993, Bit9 (971~994) 24 982,
3549 01:57:00.864748 TX Bit2 (979~1005) 27 992, Bit10 (976~999) 24 987,
3550 01:57:00.868013 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
3551 01:57:00.874830 TX Bit4 (981~1006) 26 993, Bit12 (976~999) 24 987,
3552 01:57:00.878056 TX Bit5 (982~1006) 25 994, Bit13 (976~999) 24 987,
3553 01:57:00.881452 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
3554 01:57:00.887804 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
3555 01:57:00.887895
3556 01:57:00.890963 Write Rank1 MR14 =0x24
3557 01:57:00.898980
3558 01:57:00.902473 CH=1, VrefRange= 0, VrefLevel = 36
3559 01:57:00.905390 TX Bit0 (983~1007) 25 995, Bit8 (973~997) 25 985,
3560 01:57:00.908672 TX Bit1 (981~1006) 26 993, Bit9 (971~994) 24 982,
3561 01:57:00.915102 TX Bit2 (979~1005) 27 992, Bit10 (976~999) 24 987,
3562 01:57:00.918765 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
3563 01:57:00.925148 TX Bit4 (981~1006) 26 993, Bit12 (976~999) 24 987,
3564 01:57:00.928479 TX Bit5 (982~1006) 25 994, Bit13 (976~999) 24 987,
3565 01:57:00.931545 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
3566 01:57:00.938119 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
3567 01:57:00.938212
3568 01:57:00.941135 Write Rank1 MR14 =0x26
3569 01:57:00.949419
3570 01:57:00.952626 CH=1, VrefRange= 0, VrefLevel = 38
3571 01:57:00.955949 TX Bit0 (983~1007) 25 995, Bit8 (973~997) 25 985,
3572 01:57:00.959170 TX Bit1 (981~1006) 26 993, Bit9 (971~994) 24 982,
3573 01:57:00.965644 TX Bit2 (979~1005) 27 992, Bit10 (976~999) 24 987,
3574 01:57:00.968948 TX Bit3 (977~1002) 26 989, Bit11 (976~999) 24 987,
3575 01:57:00.975741 TX Bit4 (981~1006) 26 993, Bit12 (976~999) 24 987,
3576 01:57:00.978758 TX Bit5 (982~1006) 25 994, Bit13 (976~999) 24 987,
3577 01:57:00.981937 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
3578 01:57:00.988557 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
3579 01:57:00.988650
3580 01:57:00.988720
3581 01:57:00.991940 TX Vref found, early break! 372< 380
3582 01:57:00.995250 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
3583 01:57:00.998386 u1DelayCellOfst[0]=7 cells (6 PI)
3584 01:57:01.001686 u1DelayCellOfst[1]=5 cells (4 PI)
3585 01:57:01.004741 u1DelayCellOfst[2]=3 cells (3 PI)
3586 01:57:01.008296 u1DelayCellOfst[3]=0 cells (0 PI)
3587 01:57:01.011151 u1DelayCellOfst[4]=5 cells (4 PI)
3588 01:57:01.014622 u1DelayCellOfst[5]=6 cells (5 PI)
3589 01:57:01.017999 u1DelayCellOfst[6]=5 cells (4 PI)
3590 01:57:01.021443 u1DelayCellOfst[7]=5 cells (4 PI)
3591 01:57:01.024477 Byte0, DQ PI dly=989, DQM PI dly= 992
3592 01:57:01.027805 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3593 01:57:01.027896
3594 01:57:01.034442 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3595 01:57:01.034532
3596 01:57:01.034604 u1DelayCellOfst[8]=6 cells (5 PI)
3597 01:57:01.037615 u1DelayCellOfst[9]=2 cells (2 PI)
3598 01:57:01.040866 u1DelayCellOfst[10]=9 cells (7 PI)
3599 01:57:01.044054 u1DelayCellOfst[11]=9 cells (7 PI)
3600 01:57:01.047357 u1DelayCellOfst[12]=9 cells (7 PI)
3601 01:57:01.050501 u1DelayCellOfst[13]=9 cells (7 PI)
3602 01:57:01.054107 u1DelayCellOfst[14]=9 cells (7 PI)
3603 01:57:01.057387 u1DelayCellOfst[15]=0 cells (0 PI)
3604 01:57:01.060670 Byte1, DQ PI dly=980, DQM PI dly= 983
3605 01:57:01.063867 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
3606 01:57:01.067071
3607 01:57:01.070393 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
3608 01:57:01.070484
3609 01:57:01.070555 Write Rank1 MR14 =0x1e
3610 01:57:01.073452
3611 01:57:01.073541 Final TX Range 0 Vref 30
3612 01:57:01.073613
3613 01:57:01.079988 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3614 01:57:01.080078
3615 01:57:01.086541 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3616 01:57:01.093184 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3617 01:57:01.102966 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3618 01:57:01.103058 Write Rank1 MR3 =0xb0
3619 01:57:01.106384 DramC Write-DBI on
3620 01:57:01.106474 ==
3621 01:57:01.109495 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3622 01:57:01.112848 fsp= 1, odt_onoff= 1, Byte mode= 0
3623 01:57:01.112940 ==
3624 01:57:01.119301 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3625 01:57:01.119392
3626 01:57:01.119464 Begin, DQ Scan Range 703~767
3627 01:57:01.122524
3628 01:57:01.122614
3629 01:57:01.122686 TX Vref Scan disable
3630 01:57:01.126063 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3631 01:57:01.129564 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3632 01:57:01.132455 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3633 01:57:01.135921 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3634 01:57:01.139000 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3635 01:57:01.145581 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3636 01:57:01.148700 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3637 01:57:01.152215 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3638 01:57:01.155322 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3639 01:57:01.158604 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3640 01:57:01.161878 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3641 01:57:01.165099 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3642 01:57:01.168318 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3643 01:57:01.171881 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3644 01:57:01.174847 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3645 01:57:01.178149 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3646 01:57:01.181351 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3647 01:57:01.184915 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3648 01:57:01.188128 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3649 01:57:01.194442 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3650 01:57:01.197693 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3651 01:57:01.200981 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3652 01:57:01.208113 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3653 01:57:01.211320 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3654 01:57:01.214393 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3655 01:57:01.217919 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3656 01:57:01.221254 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3657 01:57:01.224737 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3658 01:57:01.227647 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3659 01:57:01.230838 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3660 01:57:01.234128 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3661 01:57:01.237698 Byte0, DQ PI dly=737, DQM PI dly= 737
3662 01:57:01.244046 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
3663 01:57:01.244137
3664 01:57:01.247437 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
3665 01:57:01.247526
3666 01:57:01.250630 Byte1, DQ PI dly=728, DQM PI dly= 728
3667 01:57:01.253911 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
3668 01:57:01.254005
3669 01:57:01.260398 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
3670 01:57:01.260489
3671 01:57:01.267015 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3672 01:57:01.273549 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3673 01:57:01.280155 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3674 01:57:01.283245 Write Rank1 MR3 =0x30
3675 01:57:01.283335 DramC Write-DBI off
3676 01:57:01.283406
3677 01:57:01.283472 [DATLAT]
3678 01:57:01.286465 Freq=1600, CH1 RK1, use_rxtx_scan=0
3679 01:57:01.286555
3680 01:57:01.289936 DATLAT Default: 0x10
3681 01:57:01.293049 7, 0xFFFF, sum=0
3682 01:57:01.293139 8, 0xFFFF, sum=0
3683 01:57:01.293210 9, 0xFFFF, sum=0
3684 01:57:01.296650 10, 0xFFFF, sum=0
3685 01:57:01.296740 11, 0xFFFF, sum=0
3686 01:57:01.299926 12, 0xFFFF, sum=0
3687 01:57:01.300021 13, 0xFFFF, sum=0
3688 01:57:01.302871 14, 0x0, sum=1
3689 01:57:01.302961 15, 0x0, sum=2
3690 01:57:01.306270 16, 0x0, sum=3
3691 01:57:01.306361 17, 0x0, sum=4
3692 01:57:01.312996 pattern=2 first_step=14 total pass=5 best_step=16
3693 01:57:01.313088 ==
3694 01:57:01.316043 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3695 01:57:01.319304 fsp= 1, odt_onoff= 1, Byte mode= 0
3696 01:57:01.319395 ==
3697 01:57:01.322724 Start DQ dly to find pass range UseTestEngine =1
3698 01:57:01.329273 x-axis: bit #, y-axis: DQ dly (-127~63)
3699 01:57:01.329365 RX Vref Scan = 0
3700 01:57:01.332446 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3701 01:57:01.335636 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3702 01:57:01.338985 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3703 01:57:01.342306 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3704 01:57:01.345590 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3705 01:57:01.345682 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3706 01:57:01.348648 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3707 01:57:01.352059 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3708 01:57:01.355445 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3709 01:57:01.358959 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3710 01:57:01.361889 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3711 01:57:01.365191 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3712 01:57:01.368510 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3713 01:57:01.371753 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3714 01:57:01.371846 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3715 01:57:01.375083 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3716 01:57:01.378347 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3717 01:57:01.381550 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3718 01:57:01.384755 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3719 01:57:01.387938 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3720 01:57:01.391400 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3721 01:57:01.394709 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3722 01:57:01.394801 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3723 01:57:01.397825 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3724 01:57:01.401325 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3725 01:57:01.404539 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3726 01:57:01.407564 0, [0] xxxoxxxx ooxxxxxo [MSB]
3727 01:57:01.410981 1, [0] xxxoxxxx ooxxxxxo [MSB]
3728 01:57:01.414082 2, [0] xxxoxxxx ooxxxxxo [MSB]
3729 01:57:01.414176 3, [0] oxooxxxo oooxoxxo [MSB]
3730 01:57:01.417405 4, [0] oooooxxo oooooooo [MSB]
3731 01:57:01.421296 5, [0] ooooooxo oooooooo [MSB]
3732 01:57:01.424093 6, [0] ooooooxo oooooooo [MSB]
3733 01:57:01.427754 31, [0] oooooooo ooooooox [MSB]
3734 01:57:01.430882 32, [0] oooooooo ooooooox [MSB]
3735 01:57:01.434358 33, [0] oooooooo oxooooox [MSB]
3736 01:57:01.437177 34, [0] oooooooo oxooooox [MSB]
3737 01:57:01.440722 35, [0] ooxxoooo xxooooox [MSB]
3738 01:57:01.443826 36, [0] ooxxoooo xxooooox [MSB]
3739 01:57:01.447266 37, [0] ooxxoooo xxooooox [MSB]
3740 01:57:01.447358 38, [0] ooxxooox xxooooox [MSB]
3741 01:57:01.450466 39, [0] oxxxooox xxxxxoox [MSB]
3742 01:57:01.453574 40, [0] oxxxxoox xxxxxxox [MSB]
3743 01:57:01.457283 41, [0] xxxxxxxx xxxxxxxx [MSB]
3744 01:57:01.460174 iDelay=41, Bit 0, Center 21 (3 ~ 40) 38
3745 01:57:01.463855 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
3746 01:57:01.467008 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3747 01:57:01.470123 iDelay=41, Bit 3, Center 16 (-2 ~ 34) 37
3748 01:57:01.473247 iDelay=41, Bit 4, Center 21 (4 ~ 39) 36
3749 01:57:01.479892 iDelay=41, Bit 5, Center 22 (5 ~ 40) 36
3750 01:57:01.483529 iDelay=41, Bit 6, Center 23 (7 ~ 40) 34
3751 01:57:01.486527 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
3752 01:57:01.489612 iDelay=41, Bit 8, Center 16 (-1 ~ 34) 36
3753 01:57:01.492849 iDelay=41, Bit 9, Center 15 (-2 ~ 32) 35
3754 01:57:01.496234 iDelay=41, Bit 10, Center 20 (3 ~ 38) 36
3755 01:57:01.499507 iDelay=41, Bit 11, Center 21 (4 ~ 38) 35
3756 01:57:01.503228 iDelay=41, Bit 12, Center 20 (3 ~ 38) 36
3757 01:57:01.506131 iDelay=41, Bit 13, Center 21 (4 ~ 39) 36
3758 01:57:01.509278 iDelay=41, Bit 14, Center 22 (4 ~ 40) 37
3759 01:57:01.516093 iDelay=41, Bit 15, Center 13 (-4 ~ 30) 35
3760 01:57:01.516186 ==
3761 01:57:01.519434 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3762 01:57:01.522482 fsp= 1, odt_onoff= 1, Byte mode= 0
3763 01:57:01.522572 ==
3764 01:57:01.526027 DQS Delay:
3765 01:57:01.526116 DQS0 = 0, DQS1 = 0
3766 01:57:01.526188 DQM Delay:
3767 01:57:01.528914 DQM0 = 20, DQM1 = 18
3768 01:57:01.529004 DQ Delay:
3769 01:57:01.532267 DQ0 =21, DQ1 =21, DQ2 =18, DQ3 =16
3770 01:57:01.535490 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3771 01:57:01.538822 DQ8 =16, DQ9 =15, DQ10 =20, DQ11 =21
3772 01:57:01.542296 DQ12 =20, DQ13 =21, DQ14 =22, DQ15 =13
3773 01:57:01.542385
3774 01:57:01.542456
3775 01:57:01.542521
3776 01:57:01.545512 [DramC_TX_OE_Calibration] TA2
3777 01:57:01.548591 Original DQ_B0 (3 6) =30, OEN = 27
3778 01:57:01.551884 Original DQ_B1 (3 6) =30, OEN = 27
3779 01:57:01.555202 23, 0x0, End_B0=23 End_B1=23
3780 01:57:01.558710 24, 0x0, End_B0=24 End_B1=24
3781 01:57:01.558802 25, 0x0, End_B0=25 End_B1=25
3782 01:57:01.561768 26, 0x0, End_B0=26 End_B1=26
3783 01:57:01.565096 27, 0x0, End_B0=27 End_B1=27
3784 01:57:01.568608 28, 0x0, End_B0=28 End_B1=28
3785 01:57:01.571718 29, 0x0, End_B0=29 End_B1=29
3786 01:57:01.571810 30, 0x0, End_B0=30 End_B1=30
3787 01:57:01.574771 31, 0xFFFF, End_B0=30 End_B1=30
3788 01:57:01.581694 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3789 01:57:01.588010 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3790 01:57:01.588101
3791 01:57:01.588172
3792 01:57:01.588239 Write Rank1 MR23 =0x3f
3793 01:57:01.591287 [DQSOSC]
3794 01:57:01.597795 [DQSOSCAuto] RK1, (LSB)MR18= 0xb8b8, (MSB)MR19= 0x202, tDQSOscB0 = 452 ps tDQSOscB1 = 452 ps
3795 01:57:01.604488 CH1_RK1: MR19=0x202, MR18=0xB8B8, DQSOSC=452, MR23=63, INC=12, DEC=18
3796 01:57:01.607904 Write Rank1 MR23 =0x3f
3797 01:57:01.607994 [DQSOSC]
3798 01:57:01.614251 [DQSOSCAuto] RK1, (LSB)MR18= 0xb4b4, (MSB)MR19= 0x202, tDQSOscB0 = 455 ps tDQSOscB1 = 455 ps
3799 01:57:01.617363 CH1 RK1: MR19=202, MR18=B4B4
3800 01:57:01.620679 [RxdqsGatingPostProcess] freq 1600
3801 01:57:01.627228 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3802 01:57:01.627319 Rank: 0
3803 01:57:01.630578 best DQS0 dly(2T, 0.5T) = (2, 6)
3804 01:57:01.633764 best DQS1 dly(2T, 0.5T) = (2, 6)
3805 01:57:01.636934 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3806 01:57:01.640577 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3807 01:57:01.640668 Rank: 1
3808 01:57:01.643745 best DQS0 dly(2T, 0.5T) = (2, 6)
3809 01:57:01.646850 best DQS1 dly(2T, 0.5T) = (2, 6)
3810 01:57:01.650288 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3811 01:57:01.653395 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3812 01:57:01.656655 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3813 01:57:01.659917 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3814 01:57:01.666435 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3815 01:57:01.666527
3816 01:57:01.666598
3817 01:57:01.669913 [Calibration Summary] Freqency 1600
3818 01:57:01.670004 CH 0, Rank 0
3819 01:57:01.670075 All Pass.
3820 01:57:01.670142
3821 01:57:01.673257 CH 0, Rank 1
3822 01:57:01.673346 All Pass.
3823 01:57:01.673417
3824 01:57:01.676398 CH 1, Rank 0
3825 01:57:01.676488 All Pass.
3826 01:57:01.676564
3827 01:57:01.676631 CH 1, Rank 1
3828 01:57:01.679697 All Pass.
3829 01:57:01.679787
3830 01:57:01.686139 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3831 01:57:01.692671 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3832 01:57:01.699361 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3833 01:57:01.699452 Write Rank0 MR3 =0xb0
3834 01:57:01.706036 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3835 01:57:01.715474 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3836 01:57:01.722243 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3837 01:57:01.722338 Write Rank1 MR3 =0xb0
3838 01:57:01.728640 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3839 01:57:01.735176 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3840 01:57:01.745076 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3841 01:57:01.745167 Write Rank0 MR3 =0xb0
3842 01:57:01.751671 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3843 01:57:01.758183 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3844 01:57:01.768374 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3845 01:57:01.768465 Write Rank1 MR3 =0xb0
3846 01:57:01.771296 DramC Write-DBI on
3847 01:57:01.774507 [GetDramInforAfterCalByMRR] Vendor 6.
3848 01:57:01.777634 [GetDramInforAfterCalByMRR] Revision 505.
3849 01:57:01.777753 MR8 1111
3850 01:57:01.784505 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3851 01:57:01.784602 MR8 1111
3852 01:57:01.787499 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3853 01:57:01.791026 MR8 1111
3854 01:57:01.794226 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3855 01:57:01.794317 MR8 1111
3856 01:57:01.800730 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3857 01:57:01.807302 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3858 01:57:01.810646 Write Rank0 MR13 =0xd0
3859 01:57:01.813690 Write Rank1 MR13 =0xd0
3860 01:57:01.813785 Write Rank0 MR13 =0xd0
3861 01:57:01.817194 Write Rank1 MR13 =0xd0
3862 01:57:01.820532 Save calibration result to emmc
3863 01:57:01.820622
3864 01:57:01.820694
3865 01:57:01.823739 [DramcModeReg_Check] Freq_1600, FSP_1
3866 01:57:01.823829 FSP_1, CH_0, RK0
3867 01:57:01.827012 Write Rank0 MR13 =0xd8
3868 01:57:01.830331 MR12 = 0x5c (global = 0x5c) match
3869 01:57:01.833288 MR14 = 0x1c (global = 0x1c) match
3870 01:57:01.836864 FSP_1, CH_0, RK1
3871 01:57:01.836956 Write Rank1 MR13 =0xd8
3872 01:57:01.840142 MR12 = 0x5e (global = 0x5e) match
3873 01:57:01.843123 MR14 = 0x1e (global = 0x1e) match
3874 01:57:01.846720 FSP_1, CH_1, RK0
3875 01:57:01.846810 Write Rank0 MR13 =0xd8
3876 01:57:01.849818 MR12 = 0x5a (global = 0x5a) match
3877 01:57:01.853181 MR14 = 0x1e (global = 0x1e) match
3878 01:57:01.856346 FSP_1, CH_1, RK1
3879 01:57:01.856438 Write Rank1 MR13 =0xd8
3880 01:57:01.859548 MR12 = 0x5c (global = 0x5c) match
3881 01:57:01.862970 MR14 = 0x1e (global = 0x1e) match
3882 01:57:01.863060
3883 01:57:01.869289 [MEM_TEST] 02: After DFS, before run time config
3884 01:57:01.875934 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3885 01:57:01.879222
3886 01:57:01.879314 [TA2_TEST]
3887 01:57:01.879385 === TA2 HW
3888 01:57:01.882570 TA2 PAT: XTALK
3889 01:57:01.885826 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3890 01:57:01.892368 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3891 01:57:01.895513 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3892 01:57:01.899015 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3893 01:57:01.902190
3894 01:57:01.902280
3895 01:57:01.902368 Settings after calibration
3896 01:57:01.902439
3897 01:57:01.905312 [DramcRunTimeConfig]
3898 01:57:01.908753 TransferPLLToSPMControl - MODE SW PHYPLL
3899 01:57:01.911966 TX_TRACKING: ON
3900 01:57:01.912057 RX_TRACKING: ON
3901 01:57:01.912130 HW_GATING: ON
3902 01:57:01.915220 HW_GATING DBG: OFF
3903 01:57:01.915311 ddr_geometry:1
3904 01:57:01.918469 ddr_geometry:1
3905 01:57:01.918559 ddr_geometry:1
3906 01:57:01.921887 ddr_geometry:1
3907 01:57:01.921977 ddr_geometry:1
3908 01:57:01.922049 ddr_geometry:1
3909 01:57:01.925090 ddr_geometry:1
3910 01:57:01.925180 ddr_geometry:1
3911 01:57:01.928388 High Freq DUMMY_READ_FOR_TRACKING: ON
3912 01:57:01.931653 ZQCS_ENABLE_LP4: OFF
3913 01:57:01.934709 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3914 01:57:01.938230 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3915 01:57:01.938320 SPM_CONTROL_AFTERK: ON
3916 01:57:01.941571 IMPEDANCE_TRACKING: ON
3917 01:57:01.941661 TEMP_SENSOR: ON
3918 01:57:01.944654 PER_BANK_REFRESH: ON
3919 01:57:01.948038 HW_SAVE_FOR_SR: ON
3920 01:57:01.951141 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3921 01:57:01.954250 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3922 01:57:01.957628 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3923 01:57:01.957718 Read ODT Tracking: ON
3924 01:57:01.961009 =========================
3925 01:57:01.961111
3926 01:57:01.961187 [TA2_TEST]
3927 01:57:01.964297 === TA2 HW
3928 01:57:01.967653 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3929 01:57:01.973939 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3930 01:57:01.977346 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3931 01:57:01.983967 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3932 01:57:01.984059
3933 01:57:01.987188 [MEM_TEST] 03: After run time config
3934 01:57:01.997136 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3935 01:57:02.000352 [complex_mem_test] start addr:0x40024000, len:131072
3936 01:57:02.204214 1st complex R/W mem test pass
3937 01:57:02.210724 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3938 01:57:02.213904 sync preloader write leveling
3939 01:57:02.216959 sync preloader cbt_mr12
3940 01:57:02.220516 sync preloader cbt_clk_dly
3941 01:57:02.220605 sync preloader cbt_cmd_dly
3942 01:57:02.223579 sync preloader cbt_cs
3943 01:57:02.227249 sync preloader cbt_ca_perbit_delay
3944 01:57:02.230306 sync preloader clk_delay
3945 01:57:02.230405 sync preloader dqs_delay
3946 01:57:02.233313 sync preloader u1Gating2T_Save
3947 01:57:02.236929 sync preloader u1Gating05T_Save
3948 01:57:02.240100 sync preloader u1Gatingfine_tune_Save
3949 01:57:02.243129 sync preloader u1Gatingucpass_count_Save
3950 01:57:02.246638 sync preloader u1TxWindowPerbitVref_Save
3951 01:57:02.249888 sync preloader u1TxCenter_min_Save
3952 01:57:02.253054 sync preloader u1TxCenter_max_Save
3953 01:57:02.256318 sync preloader u1Txwin_center_Save
3954 01:57:02.259523 sync preloader u1Txfirst_pass_Save
3955 01:57:02.262841 sync preloader u1Txlast_pass_Save
3956 01:57:02.266063 sync preloader u1RxDatlat_Save
3957 01:57:02.269320 sync preloader u1RxWinPerbitVref_Save
3958 01:57:02.272754 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3959 01:57:02.276254 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3960 01:57:02.279480 sync preloader delay_cell_unit
3961 01:57:02.285791 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3962 01:57:02.289229 sync preloader write leveling
3963 01:57:02.292361 sync preloader cbt_mr12
3964 01:57:02.292450 sync preloader cbt_clk_dly
3965 01:57:02.295739 sync preloader cbt_cmd_dly
3966 01:57:02.298825 sync preloader cbt_cs
3967 01:57:02.302435 sync preloader cbt_ca_perbit_delay
3968 01:57:02.302526 sync preloader clk_delay
3969 01:57:02.305537 sync preloader dqs_delay
3970 01:57:02.309057 sync preloader u1Gating2T_Save
3971 01:57:02.312112 sync preloader u1Gating05T_Save
3972 01:57:02.315322 sync preloader u1Gatingfine_tune_Save
3973 01:57:02.318609 sync preloader u1Gatingucpass_count_Save
3974 01:57:02.321989 sync preloader u1TxWindowPerbitVref_Save
3975 01:57:02.325215 sync preloader u1TxCenter_min_Save
3976 01:57:02.328479 sync preloader u1TxCenter_max_Save
3977 01:57:02.331969 sync preloader u1Txwin_center_Save
3978 01:57:02.334911 sync preloader u1Txfirst_pass_Save
3979 01:57:02.338098 sync preloader u1Txlast_pass_Save
3980 01:57:02.341622 sync preloader u1RxDatlat_Save
3981 01:57:02.344593 sync preloader u1RxWinPerbitVref_Save
3982 01:57:02.347966 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3983 01:57:02.351131 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3984 01:57:02.354768 sync preloader delay_cell_unit
3985 01:57:02.361153 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3986 01:57:02.364305 sync preloader write leveling
3987 01:57:02.367641 sync preloader cbt_mr12
3988 01:57:02.367732 sync preloader cbt_clk_dly
3989 01:57:02.370680 sync preloader cbt_cmd_dly
3990 01:57:02.374128 sync preloader cbt_cs
3991 01:57:02.377287 sync preloader cbt_ca_perbit_delay
3992 01:57:02.377408 sync preloader clk_delay
3993 01:57:02.380663 sync preloader dqs_delay
3994 01:57:02.383784 sync preloader u1Gating2T_Save
3995 01:57:02.387173 sync preloader u1Gating05T_Save
3996 01:57:02.390390 sync preloader u1Gatingfine_tune_Save
3997 01:57:02.393989 sync preloader u1Gatingucpass_count_Save
3998 01:57:02.397046 sync preloader u1TxWindowPerbitVref_Save
3999 01:57:02.400453 sync preloader u1TxCenter_min_Save
4000 01:57:02.403865 sync preloader u1TxCenter_max_Save
4001 01:57:02.406987 sync preloader u1Txwin_center_Save
4002 01:57:02.410239 sync preloader u1Txfirst_pass_Save
4003 01:57:02.413260 sync preloader u1Txlast_pass_Save
4004 01:57:02.413382 sync preloader u1RxDatlat_Save
4005 01:57:02.420030 sync preloader u1RxWinPerbitVref_Save
4006 01:57:02.423210 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4007 01:57:02.426483 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4008 01:57:02.429868 sync preloader delay_cell_unit
4009 01:57:02.433259 just_for_test_dump_coreboot_params dump all params
4010 01:57:02.436318 dump source = 0x0
4011 01:57:02.436412 dump params frequency:1600
4012 01:57:02.439667 dump params rank number:2
4013 01:57:02.439760
4014 01:57:02.443008 dump params write leveling
4015 01:57:02.446225 write leveling[0][0][0] = 0x1f
4016 01:57:02.449629 write leveling[0][0][1] = 0x1a
4017 01:57:02.452880 write leveling[0][1][0] = 0x1a
4018 01:57:02.452973 write leveling[0][1][1] = 0x18
4019 01:57:02.456051 write leveling[1][0][0] = 0x24
4020 01:57:02.459224 write leveling[1][0][1] = 0x1c
4021 01:57:02.462523 write leveling[1][1][0] = 0x23
4022 01:57:02.465992 write leveling[1][1][1] = 0x1c
4023 01:57:02.466085 dump params cbt_cs
4024 01:57:02.469022 cbt_cs[0][0] = 0x6
4025 01:57:02.469114 cbt_cs[0][1] = 0x6
4026 01:57:02.472384 cbt_cs[1][0] = 0xa
4027 01:57:02.472477 cbt_cs[1][1] = 0xa
4028 01:57:02.475631 dump params cbt_mr12
4029 01:57:02.478902 cbt_mr12[0][0] = 0x1c
4030 01:57:02.478994 cbt_mr12[0][1] = 0x1e
4031 01:57:02.482281 cbt_mr12[1][0] = 0x1a
4032 01:57:02.482373 cbt_mr12[1][1] = 0x1c
4033 01:57:02.485407 dump params tx window
4034 01:57:02.488792 tx_center_min[0][0][0] = 984
4035 01:57:02.491939 tx_center_max[0][0][0] = 990
4036 01:57:02.492031 tx_center_min[0][0][1] = 978
4037 01:57:02.495598 tx_center_max[0][0][1] = 985
4038 01:57:02.498713 tx_center_min[0][1][0] = 981
4039 01:57:02.501952 tx_center_max[0][1][0] = 989
4040 01:57:02.505245 tx_center_min[0][1][1] = 979
4041 01:57:02.505357 tx_center_max[0][1][1] = 986
4042 01:57:02.508279 tx_center_min[1][0][0] = 989
4043 01:57:02.511658 tx_center_max[1][0][0] = 995
4044 01:57:02.515266 tx_center_min[1][0][1] = 980
4045 01:57:02.518277 tx_center_max[1][0][1] = 987
4046 01:57:02.518373 tx_center_min[1][1][0] = 989
4047 01:57:02.521487 tx_center_max[1][1][0] = 995
4048 01:57:02.524707 tx_center_min[1][1][1] = 980
4049 01:57:02.528072 tx_center_max[1][1][1] = 987
4050 01:57:02.528195 dump params tx window
4051 01:57:02.531417 tx_win_center[0][0][0] = 990
4052 01:57:02.534587 tx_first_pass[0][0][0] = 978
4053 01:57:02.537892 tx_last_pass[0][0][0] = 1002
4054 01:57:02.541276 tx_win_center[0][0][1] = 989
4055 01:57:02.541410 tx_first_pass[0][0][1] = 977
4056 01:57:02.544724 tx_last_pass[0][0][1] = 1001
4057 01:57:02.547591 tx_win_center[0][0][2] = 989
4058 01:57:02.551047 tx_first_pass[0][0][2] = 977
4059 01:57:02.554198 tx_last_pass[0][0][2] = 1002
4060 01:57:02.554291 tx_win_center[0][0][3] = 984
4061 01:57:02.557548 tx_first_pass[0][0][3] = 972
4062 01:57:02.560742 tx_last_pass[0][0][3] = 996
4063 01:57:02.563953 tx_win_center[0][0][4] = 988
4064 01:57:02.567367 tx_first_pass[0][0][4] = 977
4065 01:57:02.567459 tx_last_pass[0][0][4] = 1000
4066 01:57:02.570316 tx_win_center[0][0][5] = 987
4067 01:57:02.573797 tx_first_pass[0][0][5] = 975
4068 01:57:02.577206 tx_last_pass[0][0][5] = 999
4069 01:57:02.580402 tx_win_center[0][0][6] = 987
4070 01:57:02.580529 tx_first_pass[0][0][6] = 976
4071 01:57:02.583613 tx_last_pass[0][0][6] = 999
4072 01:57:02.587146 tx_win_center[0][0][7] = 989
4073 01:57:02.590056 tx_first_pass[0][0][7] = 977
4074 01:57:02.593294 tx_last_pass[0][0][7] = 1001
4075 01:57:02.593386 tx_win_center[0][0][8] = 978
4076 01:57:02.596766 tx_first_pass[0][0][8] = 967
4077 01:57:02.599856 tx_last_pass[0][0][8] = 990
4078 01:57:02.603329 tx_win_center[0][0][9] = 980
4079 01:57:02.606624 tx_first_pass[0][0][9] = 968
4080 01:57:02.606730 tx_last_pass[0][0][9] = 993
4081 01:57:02.609900 tx_win_center[0][0][10] = 985
4082 01:57:02.613034 tx_first_pass[0][0][10] = 973
4083 01:57:02.616458 tx_last_pass[0][0][10] = 998
4084 01:57:02.619470 tx_win_center[0][0][11] = 979
4085 01:57:02.619579 tx_first_pass[0][0][11] = 968
4086 01:57:02.622868 tx_last_pass[0][0][11] = 991
4087 01:57:02.626162 tx_win_center[0][0][12] = 981
4088 01:57:02.629603 tx_first_pass[0][0][12] = 969
4089 01:57:02.632578 tx_last_pass[0][0][12] = 993
4090 01:57:02.632671 tx_win_center[0][0][13] = 980
4091 01:57:02.635974 tx_first_pass[0][0][13] = 969
4092 01:57:02.639345 tx_last_pass[0][0][13] = 992
4093 01:57:02.642390 tx_win_center[0][0][14] = 982
4094 01:57:02.645670 tx_first_pass[0][0][14] = 969
4095 01:57:02.648799 tx_last_pass[0][0][14] = 996
4096 01:57:02.648892 tx_win_center[0][0][15] = 985
4097 01:57:02.652155 tx_first_pass[0][0][15] = 973
4098 01:57:02.655585 tx_last_pass[0][0][15] = 998
4099 01:57:02.658883 tx_win_center[0][1][0] = 989
4100 01:57:02.662073 tx_first_pass[0][1][0] = 977
4101 01:57:02.662192 tx_last_pass[0][1][0] = 1001
4102 01:57:02.665458 tx_win_center[0][1][1] = 988
4103 01:57:02.668618 tx_first_pass[0][1][1] = 977
4104 01:57:02.671865 tx_last_pass[0][1][1] = 1000
4105 01:57:02.675294 tx_win_center[0][1][2] = 988
4106 01:57:02.675392 tx_first_pass[0][1][2] = 977
4107 01:57:02.678692 tx_last_pass[0][1][2] = 1000
4108 01:57:02.681788 tx_win_center[0][1][3] = 981
4109 01:57:02.685056 tx_first_pass[0][1][3] = 970
4110 01:57:02.688392 tx_last_pass[0][1][3] = 993
4111 01:57:02.688600 tx_win_center[0][1][4] = 987
4112 01:57:02.691681 tx_first_pass[0][1][4] = 976
4113 01:57:02.694958 tx_last_pass[0][1][4] = 999
4114 01:57:02.698089 tx_win_center[0][1][5] = 984
4115 01:57:02.701562 tx_first_pass[0][1][5] = 972
4116 01:57:02.701655 tx_last_pass[0][1][5] = 996
4117 01:57:02.704547 tx_win_center[0][1][6] = 986
4118 01:57:02.708024 tx_first_pass[0][1][6] = 974
4119 01:57:02.711135 tx_last_pass[0][1][6] = 998
4120 01:57:02.711227 tx_win_center[0][1][7] = 988
4121 01:57:02.714421 tx_first_pass[0][1][7] = 976
4122 01:57:02.717923 tx_last_pass[0][1][7] = 1000
4123 01:57:02.721247 tx_win_center[0][1][8] = 979
4124 01:57:02.724557 tx_first_pass[0][1][8] = 967
4125 01:57:02.724650 tx_last_pass[0][1][8] = 992
4126 01:57:02.727712 tx_win_center[0][1][9] = 981
4127 01:57:02.730992 tx_first_pass[0][1][9] = 969
4128 01:57:02.734119 tx_last_pass[0][1][9] = 993
4129 01:57:02.737404 tx_win_center[0][1][10] = 986
4130 01:57:02.737508 tx_first_pass[0][1][10] = 974
4131 01:57:02.740822 tx_last_pass[0][1][10] = 999
4132 01:57:02.743715 tx_win_center[0][1][11] = 980
4133 01:57:02.747272 tx_first_pass[0][1][11] = 968
4134 01:57:02.750569 tx_last_pass[0][1][11] = 992
4135 01:57:02.753966 tx_win_center[0][1][12] = 981
4136 01:57:02.754059 tx_first_pass[0][1][12] = 969
4137 01:57:02.756815 tx_last_pass[0][1][12] = 993
4138 01:57:02.760322 tx_win_center[0][1][13] = 981
4139 01:57:02.763892 tx_first_pass[0][1][13] = 969
4140 01:57:02.766901 tx_last_pass[0][1][13] = 993
4141 01:57:02.766994 tx_win_center[0][1][14] = 983
4142 01:57:02.769946 tx_first_pass[0][1][14] = 970
4143 01:57:02.773454 tx_last_pass[0][1][14] = 996
4144 01:57:02.776815 tx_win_center[0][1][15] = 986
4145 01:57:02.779832 tx_first_pass[0][1][15] = 974
4146 01:57:02.779925 tx_last_pass[0][1][15] = 998
4147 01:57:02.783153 tx_win_center[1][0][0] = 995
4148 01:57:02.786594 tx_first_pass[1][0][0] = 983
4149 01:57:02.789712 tx_last_pass[1][0][0] = 1007
4150 01:57:02.793067 tx_win_center[1][0][1] = 994
4151 01:57:02.793159 tx_first_pass[1][0][1] = 982
4152 01:57:02.796324 tx_last_pass[1][0][1] = 1006
4153 01:57:02.799475 tx_win_center[1][0][2] = 991
4154 01:57:02.802945 tx_first_pass[1][0][2] = 978
4155 01:57:02.806092 tx_last_pass[1][0][2] = 1005
4156 01:57:02.806185 tx_win_center[1][0][3] = 989
4157 01:57:02.809493 tx_first_pass[1][0][3] = 977
4158 01:57:02.812928 tx_last_pass[1][0][3] = 1002
4159 01:57:02.816030 tx_win_center[1][0][4] = 994
4160 01:57:02.819113 tx_first_pass[1][0][4] = 982
4161 01:57:02.819206 tx_last_pass[1][0][4] = 1006
4162 01:57:02.822747 tx_win_center[1][0][5] = 995
4163 01:57:02.825634 tx_first_pass[1][0][5] = 983
4164 01:57:02.829022 tx_last_pass[1][0][5] = 1007
4165 01:57:02.832170 tx_win_center[1][0][6] = 993
4166 01:57:02.832262 tx_first_pass[1][0][6] = 981
4167 01:57:02.835478 tx_last_pass[1][0][6] = 1006
4168 01:57:02.838925 tx_win_center[1][0][7] = 993
4169 01:57:02.842047 tx_first_pass[1][0][7] = 981
4170 01:57:02.845445 tx_last_pass[1][0][7] = 1006
4171 01:57:02.845537 tx_win_center[1][0][8] = 984
4172 01:57:02.848691 tx_first_pass[1][0][8] = 972
4173 01:57:02.851929 tx_last_pass[1][0][8] = 996
4174 01:57:02.855146 tx_win_center[1][0][9] = 982
4175 01:57:02.858659 tx_first_pass[1][0][9] = 971
4176 01:57:02.858752 tx_last_pass[1][0][9] = 994
4177 01:57:02.861789 tx_win_center[1][0][10] = 986
4178 01:57:02.864955 tx_first_pass[1][0][10] = 974
4179 01:57:02.868355 tx_last_pass[1][0][10] = 998
4180 01:57:02.871617 tx_win_center[1][0][11] = 987
4181 01:57:02.871708 tx_first_pass[1][0][11] = 976
4182 01:57:02.875229 tx_last_pass[1][0][11] = 999
4183 01:57:02.878127 tx_win_center[1][0][12] = 987
4184 01:57:02.881592 tx_first_pass[1][0][12] = 975
4185 01:57:02.884727 tx_last_pass[1][0][12] = 999
4186 01:57:02.887953 tx_win_center[1][0][13] = 987
4187 01:57:02.888044 tx_first_pass[1][0][13] = 976
4188 01:57:02.891293 tx_last_pass[1][0][13] = 999
4189 01:57:02.894405 tx_win_center[1][0][14] = 987
4190 01:57:02.897995 tx_first_pass[1][0][14] = 975
4191 01:57:02.901055 tx_last_pass[1][0][14] = 999
4192 01:57:02.901146 tx_win_center[1][0][15] = 980
4193 01:57:02.904289 tx_first_pass[1][0][15] = 969
4194 01:57:02.907563 tx_last_pass[1][0][15] = 992
4195 01:57:02.911003 tx_win_center[1][1][0] = 995
4196 01:57:02.914184 tx_first_pass[1][1][0] = 983
4197 01:57:02.914276 tx_last_pass[1][1][0] = 1007
4198 01:57:02.917407 tx_win_center[1][1][1] = 993
4199 01:57:02.920978 tx_first_pass[1][1][1] = 981
4200 01:57:02.923911 tx_last_pass[1][1][1] = 1006
4201 01:57:02.927285 tx_win_center[1][1][2] = 992
4202 01:57:02.927377 tx_first_pass[1][1][2] = 979
4203 01:57:02.930513 tx_last_pass[1][1][2] = 1005
4204 01:57:02.933631 tx_win_center[1][1][3] = 989
4205 01:57:02.937040 tx_first_pass[1][1][3] = 977
4206 01:57:02.940413 tx_last_pass[1][1][3] = 1002
4207 01:57:02.940505 tx_win_center[1][1][4] = 993
4208 01:57:02.943772 tx_first_pass[1][1][4] = 981
4209 01:57:02.947071 tx_last_pass[1][1][4] = 1006
4210 01:57:02.950211 tx_win_center[1][1][5] = 994
4211 01:57:02.953468 tx_first_pass[1][1][5] = 982
4212 01:57:02.953559 tx_last_pass[1][1][5] = 1006
4213 01:57:02.956906 tx_win_center[1][1][6] = 993
4214 01:57:02.960097 tx_first_pass[1][1][6] = 981
4215 01:57:02.963177 tx_last_pass[1][1][6] = 1006
4216 01:57:02.966553 tx_win_center[1][1][7] = 993
4217 01:57:02.966644 tx_first_pass[1][1][7] = 981
4218 01:57:02.969979 tx_last_pass[1][1][7] = 1006
4219 01:57:02.973076 tx_win_center[1][1][8] = 985
4220 01:57:02.976150 tx_first_pass[1][1][8] = 973
4221 01:57:02.979669 tx_last_pass[1][1][8] = 997
4222 01:57:02.979760 tx_win_center[1][1][9] = 982
4223 01:57:02.982880 tx_first_pass[1][1][9] = 971
4224 01:57:02.986149 tx_last_pass[1][1][9] = 994
4225 01:57:02.989316 tx_win_center[1][1][10] = 987
4226 01:57:02.993114 tx_first_pass[1][1][10] = 976
4227 01:57:02.993205 tx_last_pass[1][1][10] = 999
4228 01:57:02.996153 tx_win_center[1][1][11] = 987
4229 01:57:02.999374 tx_first_pass[1][1][11] = 976
4230 01:57:03.002628 tx_last_pass[1][1][11] = 999
4231 01:57:03.006054 tx_win_center[1][1][12] = 987
4232 01:57:03.008916 tx_first_pass[1][1][12] = 976
4233 01:57:03.009006 tx_last_pass[1][1][12] = 999
4234 01:57:03.012363 tx_win_center[1][1][13] = 987
4235 01:57:03.015558 tx_first_pass[1][1][13] = 976
4236 01:57:03.018836 tx_last_pass[1][1][13] = 999
4237 01:57:03.022056 tx_win_center[1][1][14] = 987
4238 01:57:03.022149 tx_first_pass[1][1][14] = 976
4239 01:57:03.025413 tx_last_pass[1][1][14] = 999
4240 01:57:03.028904 tx_win_center[1][1][15] = 980
4241 01:57:03.031801 tx_first_pass[1][1][15] = 969
4242 01:57:03.035380 tx_last_pass[1][1][15] = 992
4243 01:57:03.035472 dump params rx window
4244 01:57:03.038459 rx_firspass[0][0][0] = 6
4245 01:57:03.041653 rx_lastpass[0][0][0] = 36
4246 01:57:03.041744 rx_firspass[0][0][1] = 7
4247 01:57:03.044945 rx_lastpass[0][0][1] = 36
4248 01:57:03.048270 rx_firspass[0][0][2] = 5
4249 01:57:03.051718 rx_lastpass[0][0][2] = 39
4250 01:57:03.051810 rx_firspass[0][0][3] = -4
4251 01:57:03.055031 rx_lastpass[0][0][3] = 30
4252 01:57:03.058174 rx_firspass[0][0][4] = 6
4253 01:57:03.058265 rx_lastpass[0][0][4] = 36
4254 01:57:03.061361 rx_firspass[0][0][5] = 2
4255 01:57:03.064640 rx_lastpass[0][0][5] = 33
4256 01:57:03.067915 rx_firspass[0][0][6] = 3
4257 01:57:03.068006 rx_lastpass[0][0][6] = 33
4258 01:57:03.071047 rx_firspass[0][0][7] = 4
4259 01:57:03.074376 rx_lastpass[0][0][7] = 36
4260 01:57:03.074467 rx_firspass[0][0][8] = -1
4261 01:57:03.077716 rx_lastpass[0][0][8] = 30
4262 01:57:03.080954 rx_firspass[0][0][9] = 2
4263 01:57:03.084317 rx_lastpass[0][0][9] = 33
4264 01:57:03.084408 rx_firspass[0][0][10] = 9
4265 01:57:03.087388 rx_lastpass[0][0][10] = 37
4266 01:57:03.091016 rx_firspass[0][0][11] = 1
4267 01:57:03.094261 rx_lastpass[0][0][11] = 30
4268 01:57:03.094352 rx_firspass[0][0][12] = 4
4269 01:57:03.097351 rx_lastpass[0][0][12] = 32
4270 01:57:03.100706 rx_firspass[0][0][13] = 1
4271 01:57:03.100797 rx_lastpass[0][0][13] = 32
4272 01:57:03.103971 rx_firspass[0][0][14] = 1
4273 01:57:03.107158 rx_lastpass[0][0][14] = 35
4274 01:57:03.110569 rx_firspass[0][0][15] = 4
4275 01:57:03.110659 rx_lastpass[0][0][15] = 36
4276 01:57:03.113702 rx_firspass[0][1][0] = 4
4277 01:57:03.116933 rx_lastpass[0][1][0] = 39
4278 01:57:03.120199 rx_firspass[0][1][1] = 4
4279 01:57:03.120289 rx_lastpass[0][1][1] = 39
4280 01:57:03.123424 rx_firspass[0][1][2] = 6
4281 01:57:03.126635 rx_lastpass[0][1][2] = 39
4282 01:57:03.126726 rx_firspass[0][1][3] = -2
4283 01:57:03.129988 rx_lastpass[0][1][3] = 31
4284 01:57:03.133448 rx_firspass[0][1][4] = 5
4285 01:57:03.136714 rx_lastpass[0][1][4] = 38
4286 01:57:03.136805 rx_firspass[0][1][5] = 0
4287 01:57:03.140244 rx_lastpass[0][1][5] = 34
4288 01:57:03.143186 rx_firspass[0][1][6] = 1
4289 01:57:03.143277 rx_lastpass[0][1][6] = 35
4290 01:57:03.146612 rx_firspass[0][1][7] = 3
4291 01:57:03.149749 rx_lastpass[0][1][7] = 36
4292 01:57:03.152952 rx_firspass[0][1][8] = -3
4293 01:57:03.153043 rx_lastpass[0][1][8] = 32
4294 01:57:03.156304 rx_firspass[0][1][9] = -1
4295 01:57:03.159527 rx_lastpass[0][1][9] = 34
4296 01:57:03.159620 rx_firspass[0][1][10] = 6
4297 01:57:03.162694 rx_lastpass[0][1][10] = 41
4298 01:57:03.165936 rx_firspass[0][1][11] = -2
4299 01:57:03.169404 rx_lastpass[0][1][11] = 33
4300 01:57:03.169511 rx_firspass[0][1][12] = 0
4301 01:57:03.172715 rx_lastpass[0][1][12] = 35
4302 01:57:03.176191 rx_firspass[0][1][13] = -1
4303 01:57:03.179209 rx_lastpass[0][1][13] = 34
4304 01:57:03.179299 rx_firspass[0][1][14] = 2
4305 01:57:03.182478 rx_lastpass[0][1][14] = 35
4306 01:57:03.185752 rx_firspass[0][1][15] = 5
4307 01:57:03.188949 rx_lastpass[0][1][15] = 37
4308 01:57:03.189040 rx_firspass[1][0][0] = 5
4309 01:57:03.192196 rx_lastpass[1][0][0] = 37
4310 01:57:03.195639 rx_firspass[1][0][1] = 4
4311 01:57:03.195729 rx_lastpass[1][0][1] = 37
4312 01:57:03.198710 rx_firspass[1][0][2] = 1
4313 01:57:03.201912 rx_lastpass[1][0][2] = 35
4314 01:57:03.205249 rx_firspass[1][0][3] = 0
4315 01:57:03.205339 rx_lastpass[1][0][3] = 31
4316 01:57:03.208865 rx_firspass[1][0][4] = 4
4317 01:57:03.211809 rx_lastpass[1][0][4] = 36
4318 01:57:03.211900 rx_firspass[1][0][5] = 9
4319 01:57:03.215218 rx_lastpass[1][0][5] = 38
4320 01:57:03.218453 rx_firspass[1][0][6] = 5
4321 01:57:03.221703 rx_lastpass[1][0][6] = 38
4322 01:57:03.221794 rx_firspass[1][0][7] = 5
4323 01:57:03.224872 rx_lastpass[1][0][7] = 35
4324 01:57:03.228154 rx_firspass[1][0][8] = 0
4325 01:57:03.228245 rx_lastpass[1][0][8] = 33
4326 01:57:03.231651 rx_firspass[1][0][9] = 0
4327 01:57:03.234844 rx_lastpass[1][0][9] = 32
4328 01:57:03.237988 rx_firspass[1][0][10] = 2
4329 01:57:03.238079 rx_lastpass[1][0][10] = 36
4330 01:57:03.241409 rx_firspass[1][0][11] = 4
4331 01:57:03.244755 rx_lastpass[1][0][11] = 37
4332 01:57:03.244844 rx_firspass[1][0][12] = 5
4333 01:57:03.248008 rx_lastpass[1][0][12] = 35
4334 01:57:03.251104 rx_firspass[1][0][13] = 6
4335 01:57:03.254402 rx_lastpass[1][0][13] = 36
4336 01:57:03.254495 rx_firspass[1][0][14] = 5
4337 01:57:03.257650 rx_lastpass[1][0][14] = 37
4338 01:57:03.261143 rx_firspass[1][0][15] = -4
4339 01:57:03.264359 rx_lastpass[1][0][15] = 29
4340 01:57:03.264449 rx_firspass[1][1][0] = 3
4341 01:57:03.267560 rx_lastpass[1][1][0] = 40
4342 01:57:03.270944 rx_firspass[1][1][1] = 4
4343 01:57:03.274112 rx_lastpass[1][1][1] = 38
4344 01:57:03.274203 rx_firspass[1][1][2] = 3
4345 01:57:03.277329 rx_lastpass[1][1][2] = 34
4346 01:57:03.280543 rx_firspass[1][1][3] = -2
4347 01:57:03.280633 rx_lastpass[1][1][3] = 34
4348 01:57:03.283855 rx_firspass[1][1][4] = 4
4349 01:57:03.287209 rx_lastpass[1][1][4] = 39
4350 01:57:03.287299 rx_firspass[1][1][5] = 5
4351 01:57:03.290484 rx_lastpass[1][1][5] = 40
4352 01:57:03.293894 rx_firspass[1][1][6] = 7
4353 01:57:03.297154 rx_lastpass[1][1][6] = 40
4354 01:57:03.297244 rx_firspass[1][1][7] = 3
4355 01:57:03.300248 rx_lastpass[1][1][7] = 37
4356 01:57:03.303820 rx_firspass[1][1][8] = -1
4357 01:57:03.306705 rx_lastpass[1][1][8] = 34
4358 01:57:03.306796 rx_firspass[1][1][9] = -2
4359 01:57:03.310421 rx_lastpass[1][1][9] = 32
4360 01:57:03.313314 rx_firspass[1][1][10] = 3
4361 01:57:03.313405 rx_lastpass[1][1][10] = 38
4362 01:57:03.316510 rx_firspass[1][1][11] = 4
4363 01:57:03.320111 rx_lastpass[1][1][11] = 38
4364 01:57:03.323210 rx_firspass[1][1][12] = 3
4365 01:57:03.323301 rx_lastpass[1][1][12] = 38
4366 01:57:03.326669 rx_firspass[1][1][13] = 4
4367 01:57:03.329905 rx_lastpass[1][1][13] = 39
4368 01:57:03.332869 rx_firspass[1][1][14] = 4
4369 01:57:03.332960 rx_lastpass[1][1][14] = 40
4370 01:57:03.336159 rx_firspass[1][1][15] = -4
4371 01:57:03.339499 rx_lastpass[1][1][15] = 30
4372 01:57:03.339590 dump params clk_delay
4373 01:57:03.342758 clk_delay[0] = 0
4374 01:57:03.342849 clk_delay[1] = 0
4375 01:57:03.346142 dump params dqs_delay
4376 01:57:03.349325 dqs_delay[0][0] = -1
4377 01:57:03.349415 dqs_delay[0][1] = 0
4378 01:57:03.352841 dqs_delay[1][0] = 0
4379 01:57:03.352933 dqs_delay[1][1] = -1
4380 01:57:03.356143 dump params delay_cell_unit = 753
4381 01:57:03.359215 dump source = 0x0
4382 01:57:03.359313 dump params frequency:1200
4383 01:57:03.362377 dump params rank number:2
4384 01:57:03.362470
4385 01:57:03.365881 dump params write leveling
4386 01:57:03.369078 write leveling[0][0][0] = 0x0
4387 01:57:03.372469 write leveling[0][0][1] = 0x0
4388 01:57:03.372561 write leveling[0][1][0] = 0x0
4389 01:57:03.375599 write leveling[0][1][1] = 0x0
4390 01:57:03.378893 write leveling[1][0][0] = 0x0
4391 01:57:03.382039 write leveling[1][0][1] = 0x0
4392 01:57:03.385361 write leveling[1][1][0] = 0x0
4393 01:57:03.385469 write leveling[1][1][1] = 0x0
4394 01:57:03.388722 dump params cbt_cs
4395 01:57:03.392076 cbt_cs[0][0] = 0x0
4396 01:57:03.392168 cbt_cs[0][1] = 0x0
4397 01:57:03.395239 cbt_cs[1][0] = 0x0
4398 01:57:03.395331 cbt_cs[1][1] = 0x0
4399 01:57:03.398417 dump params cbt_mr12
4400 01:57:03.398508 cbt_mr12[0][0] = 0x0
4401 01:57:03.401757 cbt_mr12[0][1] = 0x0
4402 01:57:03.401849 cbt_mr12[1][0] = 0x0
4403 01:57:03.404995 cbt_mr12[1][1] = 0x0
4404 01:57:03.408303 dump params tx window
4405 01:57:03.408402 tx_center_min[0][0][0] = 0
4406 01:57:03.411497 tx_center_max[0][0][0] = 0
4407 01:57:03.414664 tx_center_min[0][0][1] = 0
4408 01:57:03.418293 tx_center_max[0][0][1] = 0
4409 01:57:03.418392 tx_center_min[0][1][0] = 0
4410 01:57:03.421356 tx_center_max[0][1][0] = 0
4411 01:57:03.424691 tx_center_min[0][1][1] = 0
4412 01:57:03.428242 tx_center_max[0][1][1] = 0
4413 01:57:03.428335 tx_center_min[1][0][0] = 0
4414 01:57:03.431280 tx_center_max[1][0][0] = 0
4415 01:57:03.434601 tx_center_min[1][0][1] = 0
4416 01:57:03.438205 tx_center_max[1][0][1] = 0
4417 01:57:03.438298 tx_center_min[1][1][0] = 0
4418 01:57:03.441146 tx_center_max[1][1][0] = 0
4419 01:57:03.444447 tx_center_min[1][1][1] = 0
4420 01:57:03.448008 tx_center_max[1][1][1] = 0
4421 01:57:03.448100 dump params tx window
4422 01:57:03.450937 tx_win_center[0][0][0] = 0
4423 01:57:03.453913 tx_first_pass[0][0][0] = 0
4424 01:57:03.454005 tx_last_pass[0][0][0] = 0
4425 01:57:03.457394 tx_win_center[0][0][1] = 0
4426 01:57:03.460693 tx_first_pass[0][0][1] = 0
4427 01:57:03.463884 tx_last_pass[0][0][1] = 0
4428 01:57:03.463977 tx_win_center[0][0][2] = 0
4429 01:57:03.467126 tx_first_pass[0][0][2] = 0
4430 01:57:03.470356 tx_last_pass[0][0][2] = 0
4431 01:57:03.473889 tx_win_center[0][0][3] = 0
4432 01:57:03.473981 tx_first_pass[0][0][3] = 0
4433 01:57:03.477224 tx_last_pass[0][0][3] = 0
4434 01:57:03.480364 tx_win_center[0][0][4] = 0
4435 01:57:03.483375 tx_first_pass[0][0][4] = 0
4436 01:57:03.483467 tx_last_pass[0][0][4] = 0
4437 01:57:03.487026 tx_win_center[0][0][5] = 0
4438 01:57:03.490129 tx_first_pass[0][0][5] = 0
4439 01:57:03.493287 tx_last_pass[0][0][5] = 0
4440 01:57:03.493407 tx_win_center[0][0][6] = 0
4441 01:57:03.496582 tx_first_pass[0][0][6] = 0
4442 01:57:03.499704 tx_last_pass[0][0][6] = 0
4443 01:57:03.499796 tx_win_center[0][0][7] = 0
4444 01:57:03.503346 tx_first_pass[0][0][7] = 0
4445 01:57:03.506514 tx_last_pass[0][0][7] = 0
4446 01:57:03.509827 tx_win_center[0][0][8] = 0
4447 01:57:03.509920 tx_first_pass[0][0][8] = 0
4448 01:57:03.513035 tx_last_pass[0][0][8] = 0
4449 01:57:03.516318 tx_win_center[0][0][9] = 0
4450 01:57:03.519491 tx_first_pass[0][0][9] = 0
4451 01:57:03.519584 tx_last_pass[0][0][9] = 0
4452 01:57:03.522790 tx_win_center[0][0][10] = 0
4453 01:57:03.526018 tx_first_pass[0][0][10] = 0
4454 01:57:03.529321 tx_last_pass[0][0][10] = 0
4455 01:57:03.529450 tx_win_center[0][0][11] = 0
4456 01:57:03.532499 tx_first_pass[0][0][11] = 0
4457 01:57:03.535734 tx_last_pass[0][0][11] = 0
4458 01:57:03.539240 tx_win_center[0][0][12] = 0
4459 01:57:03.539332 tx_first_pass[0][0][12] = 0
4460 01:57:03.542349 tx_last_pass[0][0][12] = 0
4461 01:57:03.545773 tx_win_center[0][0][13] = 0
4462 01:57:03.549314 tx_first_pass[0][0][13] = 0
4463 01:57:03.549460 tx_last_pass[0][0][13] = 0
4464 01:57:03.552398 tx_win_center[0][0][14] = 0
4465 01:57:03.555510 tx_first_pass[0][0][14] = 0
4466 01:57:03.558749 tx_last_pass[0][0][14] = 0
4467 01:57:03.562121 tx_win_center[0][0][15] = 0
4468 01:57:03.562213 tx_first_pass[0][0][15] = 0
4469 01:57:03.565288 tx_last_pass[0][0][15] = 0
4470 01:57:03.568485 tx_win_center[0][1][0] = 0
4471 01:57:03.571704 tx_first_pass[0][1][0] = 0
4472 01:57:03.571797 tx_last_pass[0][1][0] = 0
4473 01:57:03.575228 tx_win_center[0][1][1] = 0
4474 01:57:03.578303 tx_first_pass[0][1][1] = 0
4475 01:57:03.581651 tx_last_pass[0][1][1] = 0
4476 01:57:03.581771 tx_win_center[0][1][2] = 0
4477 01:57:03.584937 tx_first_pass[0][1][2] = 0
4478 01:57:03.588356 tx_last_pass[0][1][2] = 0
4479 01:57:03.588449 tx_win_center[0][1][3] = 0
4480 01:57:03.591690 tx_first_pass[0][1][3] = 0
4481 01:57:03.595144 tx_last_pass[0][1][3] = 0
4482 01:57:03.597987 tx_win_center[0][1][4] = 0
4483 01:57:03.598080 tx_first_pass[0][1][4] = 0
4484 01:57:03.601395 tx_last_pass[0][1][4] = 0
4485 01:57:03.604757 tx_win_center[0][1][5] = 0
4486 01:57:03.607807 tx_first_pass[0][1][5] = 0
4487 01:57:03.607899 tx_last_pass[0][1][5] = 0
4488 01:57:03.611203 tx_win_center[0][1][6] = 0
4489 01:57:03.614303 tx_first_pass[0][1][6] = 0
4490 01:57:03.618051 tx_last_pass[0][1][6] = 0
4491 01:57:03.618147 tx_win_center[0][1][7] = 0
4492 01:57:03.620890 tx_first_pass[0][1][7] = 0
4493 01:57:03.624304 tx_last_pass[0][1][7] = 0
4494 01:57:03.627507 tx_win_center[0][1][8] = 0
4495 01:57:03.627599 tx_first_pass[0][1][8] = 0
4496 01:57:03.630798 tx_last_pass[0][1][8] = 0
4497 01:57:03.634177 tx_win_center[0][1][9] = 0
4498 01:57:03.637234 tx_first_pass[0][1][9] = 0
4499 01:57:03.637325 tx_last_pass[0][1][9] = 0
4500 01:57:03.640352 tx_win_center[0][1][10] = 0
4501 01:57:03.643732 tx_first_pass[0][1][10] = 0
4502 01:57:03.646961 tx_last_pass[0][1][10] = 0
4503 01:57:03.647053 tx_win_center[0][1][11] = 0
4504 01:57:03.650354 tx_first_pass[0][1][11] = 0
4505 01:57:03.653915 tx_last_pass[0][1][11] = 0
4506 01:57:03.656705 tx_win_center[0][1][12] = 0
4507 01:57:03.656797 tx_first_pass[0][1][12] = 0
4508 01:57:03.660017 tx_last_pass[0][1][12] = 0
4509 01:57:03.663376 tx_win_center[0][1][13] = 0
4510 01:57:03.666734 tx_first_pass[0][1][13] = 0
4511 01:57:03.666827 tx_last_pass[0][1][13] = 0
4512 01:57:03.669797 tx_win_center[0][1][14] = 0
4513 01:57:03.673115 tx_first_pass[0][1][14] = 0
4514 01:57:03.676632 tx_last_pass[0][1][14] = 0
4515 01:57:03.676724 tx_win_center[0][1][15] = 0
4516 01:57:03.679837 tx_first_pass[0][1][15] = 0
4517 01:57:03.683018 tx_last_pass[0][1][15] = 0
4518 01:57:03.686352 tx_win_center[1][0][0] = 0
4519 01:57:03.686445 tx_first_pass[1][0][0] = 0
4520 01:57:03.689435 tx_last_pass[1][0][0] = 0
4521 01:57:03.693254 tx_win_center[1][0][1] = 0
4522 01:57:03.696155 tx_first_pass[1][0][1] = 0
4523 01:57:03.696247 tx_last_pass[1][0][1] = 0
4524 01:57:03.699267 tx_win_center[1][0][2] = 0
4525 01:57:03.702683 tx_first_pass[1][0][2] = 0
4526 01:57:03.706148 tx_last_pass[1][0][2] = 0
4527 01:57:03.706304 tx_win_center[1][0][3] = 0
4528 01:57:03.709243 tx_first_pass[1][0][3] = 0
4529 01:57:03.712446 tx_last_pass[1][0][3] = 0
4530 01:57:03.715782 tx_win_center[1][0][4] = 0
4531 01:57:03.715876 tx_first_pass[1][0][4] = 0
4532 01:57:03.718874 tx_last_pass[1][0][4] = 0
4533 01:57:03.722364 tx_win_center[1][0][5] = 0
4534 01:57:03.725364 tx_first_pass[1][0][5] = 0
4535 01:57:03.725484 tx_last_pass[1][0][5] = 0
4536 01:57:03.728916 tx_win_center[1][0][6] = 0
4537 01:57:03.732410 tx_first_pass[1][0][6] = 0
4538 01:57:03.732503 tx_last_pass[1][0][6] = 0
4539 01:57:03.735462 tx_win_center[1][0][7] = 0
4540 01:57:03.738487 tx_first_pass[1][0][7] = 0
4541 01:57:03.741974 tx_last_pass[1][0][7] = 0
4542 01:57:03.742067 tx_win_center[1][0][8] = 0
4543 01:57:03.745214 tx_first_pass[1][0][8] = 0
4544 01:57:03.748464 tx_last_pass[1][0][8] = 0
4545 01:57:03.751669 tx_win_center[1][0][9] = 0
4546 01:57:03.751773 tx_first_pass[1][0][9] = 0
4547 01:57:03.754967 tx_last_pass[1][0][9] = 0
4548 01:57:03.758228 tx_win_center[1][0][10] = 0
4549 01:57:03.761451 tx_first_pass[1][0][10] = 0
4550 01:57:03.761572 tx_last_pass[1][0][10] = 0
4551 01:57:03.765142 tx_win_center[1][0][11] = 0
4552 01:57:03.768170 tx_first_pass[1][0][11] = 0
4553 01:57:03.771313 tx_last_pass[1][0][11] = 0
4554 01:57:03.771405 tx_win_center[1][0][12] = 0
4555 01:57:03.774626 tx_first_pass[1][0][12] = 0
4556 01:57:03.777874 tx_last_pass[1][0][12] = 0
4557 01:57:03.781160 tx_win_center[1][0][13] = 0
4558 01:57:03.784491 tx_first_pass[1][0][13] = 0
4559 01:57:03.784602 tx_last_pass[1][0][13] = 0
4560 01:57:03.787775 tx_win_center[1][0][14] = 0
4561 01:57:03.791025 tx_first_pass[1][0][14] = 0
4562 01:57:03.794276 tx_last_pass[1][0][14] = 0
4563 01:57:03.794369 tx_win_center[1][0][15] = 0
4564 01:57:03.797505 tx_first_pass[1][0][15] = 0
4565 01:57:03.800848 tx_last_pass[1][0][15] = 0
4566 01:57:03.804073 tx_win_center[1][1][0] = 0
4567 01:57:03.804187 tx_first_pass[1][1][0] = 0
4568 01:57:03.807418 tx_last_pass[1][1][0] = 0
4569 01:57:03.810659 tx_win_center[1][1][1] = 0
4570 01:57:03.813948 tx_first_pass[1][1][1] = 0
4571 01:57:03.814040 tx_last_pass[1][1][1] = 0
4572 01:57:03.817149 tx_win_center[1][1][2] = 0
4573 01:57:03.820447 tx_first_pass[1][1][2] = 0
4574 01:57:03.820622 tx_last_pass[1][1][2] = 0
4575 01:57:03.823647 tx_win_center[1][1][3] = 0
4576 01:57:03.826973 tx_first_pass[1][1][3] = 0
4577 01:57:03.830115 tx_last_pass[1][1][3] = 0
4578 01:57:03.830207 tx_win_center[1][1][4] = 0
4579 01:57:03.833507 tx_first_pass[1][1][4] = 0
4580 01:57:03.836610 tx_last_pass[1][1][4] = 0
4581 01:57:03.839972 tx_win_center[1][1][5] = 0
4582 01:57:03.840094 tx_first_pass[1][1][5] = 0
4583 01:57:03.843475 tx_last_pass[1][1][5] = 0
4584 01:57:03.846769 tx_win_center[1][1][6] = 0
4585 01:57:03.849800 tx_first_pass[1][1][6] = 0
4586 01:57:03.849921 tx_last_pass[1][1][6] = 0
4587 01:57:03.853018 tx_win_center[1][1][7] = 0
4588 01:57:03.856642 tx_first_pass[1][1][7] = 0
4589 01:57:03.859762 tx_last_pass[1][1][7] = 0
4590 01:57:03.859854 tx_win_center[1][1][8] = 0
4591 01:57:03.862957 tx_first_pass[1][1][8] = 0
4592 01:57:03.866107 tx_last_pass[1][1][8] = 0
4593 01:57:03.869442 tx_win_center[1][1][9] = 0
4594 01:57:03.869537 tx_first_pass[1][1][9] = 0
4595 01:57:03.872604 tx_last_pass[1][1][9] = 0
4596 01:57:03.876078 tx_win_center[1][1][10] = 0
4597 01:57:03.879365 tx_first_pass[1][1][10] = 0
4598 01:57:03.879458 tx_last_pass[1][1][10] = 0
4599 01:57:03.882456 tx_win_center[1][1][11] = 0
4600 01:57:03.885679 tx_first_pass[1][1][11] = 0
4601 01:57:03.889037 tx_last_pass[1][1][11] = 0
4602 01:57:03.889129 tx_win_center[1][1][12] = 0
4603 01:57:03.892368 tx_first_pass[1][1][12] = 0
4604 01:57:03.895443 tx_last_pass[1][1][12] = 0
4605 01:57:03.898985 tx_win_center[1][1][13] = 0
4606 01:57:03.899077 tx_first_pass[1][1][13] = 0
4607 01:57:03.902156 tx_last_pass[1][1][13] = 0
4608 01:57:03.905310 tx_win_center[1][1][14] = 0
4609 01:57:03.908881 tx_first_pass[1][1][14] = 0
4610 01:57:03.908975 tx_last_pass[1][1][14] = 0
4611 01:57:03.911773 tx_win_center[1][1][15] = 0
4612 01:57:03.915190 tx_first_pass[1][1][15] = 0
4613 01:57:03.918397 tx_last_pass[1][1][15] = 0
4614 01:57:03.918492 dump params rx window
4615 01:57:03.921707 rx_firspass[0][0][0] = 0
4616 01:57:03.925065 rx_lastpass[0][0][0] = 0
4617 01:57:03.925157 rx_firspass[0][0][1] = 0
4618 01:57:03.928174 rx_lastpass[0][0][1] = 0
4619 01:57:03.931489 rx_firspass[0][0][2] = 0
4620 01:57:03.934925 rx_lastpass[0][0][2] = 0
4621 01:57:03.935017 rx_firspass[0][0][3] = 0
4622 01:57:03.938148 rx_lastpass[0][0][3] = 0
4623 01:57:03.941169 rx_firspass[0][0][4] = 0
4624 01:57:03.941260 rx_lastpass[0][0][4] = 0
4625 01:57:03.944555 rx_firspass[0][0][5] = 0
4626 01:57:03.947982 rx_lastpass[0][0][5] = 0
4627 01:57:03.948073 rx_firspass[0][0][6] = 0
4628 01:57:03.951117 rx_lastpass[0][0][6] = 0
4629 01:57:03.954472 rx_firspass[0][0][7] = 0
4630 01:57:03.957638 rx_lastpass[0][0][7] = 0
4631 01:57:03.957730 rx_firspass[0][0][8] = 0
4632 01:57:03.961157 rx_lastpass[0][0][8] = 0
4633 01:57:03.964387 rx_firspass[0][0][9] = 0
4634 01:57:03.964479 rx_lastpass[0][0][9] = 0
4635 01:57:03.967582 rx_firspass[0][0][10] = 0
4636 01:57:03.970800 rx_lastpass[0][0][10] = 0
4637 01:57:03.970892 rx_firspass[0][0][11] = 0
4638 01:57:03.974193 rx_lastpass[0][0][11] = 0
4639 01:57:03.977353 rx_firspass[0][0][12] = 0
4640 01:57:03.980762 rx_lastpass[0][0][12] = 0
4641 01:57:03.980854 rx_firspass[0][0][13] = 0
4642 01:57:03.983808 rx_lastpass[0][0][13] = 0
4643 01:57:03.987268 rx_firspass[0][0][14] = 0
4644 01:57:03.990330 rx_lastpass[0][0][14] = 0
4645 01:57:03.990422 rx_firspass[0][0][15] = 0
4646 01:57:03.993571 rx_lastpass[0][0][15] = 0
4647 01:57:03.997111 rx_firspass[0][1][0] = 0
4648 01:57:03.997203 rx_lastpass[0][1][0] = 0
4649 01:57:04.000163 rx_firspass[0][1][1] = 0
4650 01:57:04.003663 rx_lastpass[0][1][1] = 0
4651 01:57:04.003754 rx_firspass[0][1][2] = 0
4652 01:57:04.006711 rx_lastpass[0][1][2] = 0
4653 01:57:04.010212 rx_firspass[0][1][3] = 0
4654 01:57:04.013297 rx_lastpass[0][1][3] = 0
4655 01:57:04.013388 rx_firspass[0][1][4] = 0
4656 01:57:04.016602 rx_lastpass[0][1][4] = 0
4657 01:57:04.020077 rx_firspass[0][1][5] = 0
4658 01:57:04.020174 rx_lastpass[0][1][5] = 0
4659 01:57:04.023044 rx_firspass[0][1][6] = 0
4660 01:57:04.026536 rx_lastpass[0][1][6] = 0
4661 01:57:04.026628 rx_firspass[0][1][7] = 0
4662 01:57:04.029837 rx_lastpass[0][1][7] = 0
4663 01:57:04.033418 rx_firspass[0][1][8] = 0
4664 01:57:04.036297 rx_lastpass[0][1][8] = 0
4665 01:57:04.036387 rx_firspass[0][1][9] = 0
4666 01:57:04.039447 rx_lastpass[0][1][9] = 0
4667 01:57:04.042810 rx_firspass[0][1][10] = 0
4668 01:57:04.042902 rx_lastpass[0][1][10] = 0
4669 01:57:04.046012 rx_firspass[0][1][11] = 0
4670 01:57:04.049202 rx_lastpass[0][1][11] = 0
4671 01:57:04.052578 rx_firspass[0][1][12] = 0
4672 01:57:04.052669 rx_lastpass[0][1][12] = 0
4673 01:57:04.055849 rx_firspass[0][1][13] = 0
4674 01:57:04.058984 rx_lastpass[0][1][13] = 0
4675 01:57:04.059075 rx_firspass[0][1][14] = 0
4676 01:57:04.062358 rx_lastpass[0][1][14] = 0
4677 01:57:04.065677 rx_firspass[0][1][15] = 0
4678 01:57:04.068864 rx_lastpass[0][1][15] = 0
4679 01:57:04.068955 rx_firspass[1][0][0] = 0
4680 01:57:04.072298 rx_lastpass[1][0][0] = 0
4681 01:57:04.075508 rx_firspass[1][0][1] = 0
4682 01:57:04.075606 rx_lastpass[1][0][1] = 0
4683 01:57:04.078936 rx_firspass[1][0][2] = 0
4684 01:57:04.082115 rx_lastpass[1][0][2] = 0
4685 01:57:04.085308 rx_firspass[1][0][3] = 0
4686 01:57:04.085399 rx_lastpass[1][0][3] = 0
4687 01:57:04.088833 rx_firspass[1][0][4] = 0
4688 01:57:04.091959 rx_lastpass[1][0][4] = 0
4689 01:57:04.092050 rx_firspass[1][0][5] = 0
4690 01:57:04.095205 rx_lastpass[1][0][5] = 0
4691 01:57:04.098279 rx_firspass[1][0][6] = 0
4692 01:57:04.098370 rx_lastpass[1][0][6] = 0
4693 01:57:04.101927 rx_firspass[1][0][7] = 0
4694 01:57:04.105404 rx_lastpass[1][0][7] = 0
4695 01:57:04.105504 rx_firspass[1][0][8] = 0
4696 01:57:04.108431 rx_lastpass[1][0][8] = 0
4697 01:57:04.111728 rx_firspass[1][0][9] = 0
4698 01:57:04.114931 rx_lastpass[1][0][9] = 0
4699 01:57:04.115025 rx_firspass[1][0][10] = 0
4700 01:57:04.118250 rx_lastpass[1][0][10] = 0
4701 01:57:04.121369 rx_firspass[1][0][11] = 0
4702 01:57:04.121468 rx_lastpass[1][0][11] = 0
4703 01:57:04.124683 rx_firspass[1][0][12] = 0
4704 01:57:04.127973 rx_lastpass[1][0][12] = 0
4705 01:57:04.131069 rx_firspass[1][0][13] = 0
4706 01:57:04.131163 rx_lastpass[1][0][13] = 0
4707 01:57:04.134293 rx_firspass[1][0][14] = 0
4708 01:57:04.137882 rx_lastpass[1][0][14] = 0
4709 01:57:04.140937 rx_firspass[1][0][15] = 0
4710 01:57:04.141027 rx_lastpass[1][0][15] = 0
4711 01:57:04.144322 rx_firspass[1][1][0] = 0
4712 01:57:04.147612 rx_lastpass[1][1][0] = 0
4713 01:57:04.147703 rx_firspass[1][1][1] = 0
4714 01:57:04.150750 rx_lastpass[1][1][1] = 0
4715 01:57:04.153994 rx_firspass[1][1][2] = 0
4716 01:57:04.154086 rx_lastpass[1][1][2] = 0
4717 01:57:04.157313 rx_firspass[1][1][3] = 0
4718 01:57:04.160515 rx_lastpass[1][1][3] = 0
4719 01:57:04.163795 rx_firspass[1][1][4] = 0
4720 01:57:04.163886 rx_lastpass[1][1][4] = 0
4721 01:57:04.167063 rx_firspass[1][1][5] = 0
4722 01:57:04.170472 rx_lastpass[1][1][5] = 0
4723 01:57:04.170563 rx_firspass[1][1][6] = 0
4724 01:57:04.173737 rx_lastpass[1][1][6] = 0
4725 01:57:04.177014 rx_firspass[1][1][7] = 0
4726 01:57:04.177106 rx_lastpass[1][1][7] = 0
4727 01:57:04.180344 rx_firspass[1][1][8] = 0
4728 01:57:04.183387 rx_lastpass[1][1][8] = 0
4729 01:57:04.186749 rx_firspass[1][1][9] = 0
4730 01:57:04.186839 rx_lastpass[1][1][9] = 0
4731 01:57:04.190054 rx_firspass[1][1][10] = 0
4732 01:57:04.193394 rx_lastpass[1][1][10] = 0
4733 01:57:04.193493 rx_firspass[1][1][11] = 0
4734 01:57:04.196638 rx_lastpass[1][1][11] = 0
4735 01:57:04.199946 rx_firspass[1][1][12] = 0
4736 01:57:04.203091 rx_lastpass[1][1][12] = 0
4737 01:57:04.203183 rx_firspass[1][1][13] = 0
4738 01:57:04.206665 rx_lastpass[1][1][13] = 0
4739 01:57:04.209724 rx_firspass[1][1][14] = 0
4740 01:57:04.209815 rx_lastpass[1][1][14] = 0
4741 01:57:04.212921 rx_firspass[1][1][15] = 0
4742 01:57:04.216210 rx_lastpass[1][1][15] = 0
4743 01:57:04.219545 dump params clk_delay
4744 01:57:04.219638 clk_delay[0] = 0
4745 01:57:04.219711 clk_delay[1] = 0
4746 01:57:04.222785 dump params dqs_delay
4747 01:57:04.225946 dqs_delay[0][0] = 0
4748 01:57:04.226037 dqs_delay[0][1] = 0
4749 01:57:04.229346 dqs_delay[1][0] = 0
4750 01:57:04.229447 dqs_delay[1][1] = 0
4751 01:57:04.232550 dump params delay_cell_unit = 753
4752 01:57:04.235971 dump source = 0x0
4753 01:57:04.236061 dump params frequency:800
4754 01:57:04.239088 dump params rank number:2
4755 01:57:04.239179
4756 01:57:04.242324 dump params write leveling
4757 01:57:04.246113 write leveling[0][0][0] = 0x0
4758 01:57:04.248988 write leveling[0][0][1] = 0x0
4759 01:57:04.249078 write leveling[0][1][0] = 0x0
4760 01:57:04.252474 write leveling[0][1][1] = 0x0
4761 01:57:04.255680 write leveling[1][0][0] = 0x0
4762 01:57:04.259040 write leveling[1][0][1] = 0x0
4763 01:57:04.262015 write leveling[1][1][0] = 0x0
4764 01:57:04.262106 write leveling[1][1][1] = 0x0
4765 01:57:04.265548 dump params cbt_cs
4766 01:57:04.268546 cbt_cs[0][0] = 0x0
4767 01:57:04.268636 cbt_cs[0][1] = 0x0
4768 01:57:04.271916 cbt_cs[1][0] = 0x0
4769 01:57:04.272007 cbt_cs[1][1] = 0x0
4770 01:57:04.275144 dump params cbt_mr12
4771 01:57:04.275235 cbt_mr12[0][0] = 0x0
4772 01:57:04.278671 cbt_mr12[0][1] = 0x0
4773 01:57:04.278761 cbt_mr12[1][0] = 0x0
4774 01:57:04.281894 cbt_mr12[1][1] = 0x0
4775 01:57:04.285273 dump params tx window
4776 01:57:04.285364 tx_center_min[0][0][0] = 0
4777 01:57:04.288166 tx_center_max[0][0][0] = 0
4778 01:57:04.291545 tx_center_min[0][0][1] = 0
4779 01:57:04.294759 tx_center_max[0][0][1] = 0
4780 01:57:04.294850 tx_center_min[0][1][0] = 0
4781 01:57:04.298318 tx_center_max[0][1][0] = 0
4782 01:57:04.301483 tx_center_min[0][1][1] = 0
4783 01:57:04.304603 tx_center_max[0][1][1] = 0
4784 01:57:04.304697 tx_center_min[1][0][0] = 0
4785 01:57:04.307899 tx_center_max[1][0][0] = 0
4786 01:57:04.311319 tx_center_min[1][0][1] = 0
4787 01:57:04.314351 tx_center_max[1][0][1] = 0
4788 01:57:04.314443 tx_center_min[1][1][0] = 0
4789 01:57:04.317859 tx_center_max[1][1][0] = 0
4790 01:57:04.321031 tx_center_min[1][1][1] = 0
4791 01:57:04.324166 tx_center_max[1][1][1] = 0
4792 01:57:04.324257 dump params tx window
4793 01:57:04.327477 tx_win_center[0][0][0] = 0
4794 01:57:04.331084 tx_first_pass[0][0][0] = 0
4795 01:57:04.331175 tx_last_pass[0][0][0] = 0
4796 01:57:04.333953 tx_win_center[0][0][1] = 0
4797 01:57:04.337193 tx_first_pass[0][0][1] = 0
4798 01:57:04.340452 tx_last_pass[0][0][1] = 0
4799 01:57:04.340543 tx_win_center[0][0][2] = 0
4800 01:57:04.343954 tx_first_pass[0][0][2] = 0
4801 01:57:04.347195 tx_last_pass[0][0][2] = 0
4802 01:57:04.350390 tx_win_center[0][0][3] = 0
4803 01:57:04.350481 tx_first_pass[0][0][3] = 0
4804 01:57:04.353639 tx_last_pass[0][0][3] = 0
4805 01:57:04.356891 tx_win_center[0][0][4] = 0
4806 01:57:04.360188 tx_first_pass[0][0][4] = 0
4807 01:57:04.360280 tx_last_pass[0][0][4] = 0
4808 01:57:04.363457 tx_win_center[0][0][5] = 0
4809 01:57:04.366904 tx_first_pass[0][0][5] = 0
4810 01:57:04.366996 tx_last_pass[0][0][5] = 0
4811 01:57:04.369996 tx_win_center[0][0][6] = 0
4812 01:57:04.373255 tx_first_pass[0][0][6] = 0
4813 01:57:04.376760 tx_last_pass[0][0][6] = 0
4814 01:57:04.376851 tx_win_center[0][0][7] = 0
4815 01:57:04.379919 tx_first_pass[0][0][7] = 0
4816 01:57:04.382997 tx_last_pass[0][0][7] = 0
4817 01:57:04.386443 tx_win_center[0][0][8] = 0
4818 01:57:04.386535 tx_first_pass[0][0][8] = 0
4819 01:57:04.389776 tx_last_pass[0][0][8] = 0
4820 01:57:04.392936 tx_win_center[0][0][9] = 0
4821 01:57:04.396265 tx_first_pass[0][0][9] = 0
4822 01:57:04.396357 tx_last_pass[0][0][9] = 0
4823 01:57:04.399424 tx_win_center[0][0][10] = 0
4824 01:57:04.402798 tx_first_pass[0][0][10] = 0
4825 01:57:04.406172 tx_last_pass[0][0][10] = 0
4826 01:57:04.406264 tx_win_center[0][0][11] = 0
4827 01:57:04.409224 tx_first_pass[0][0][11] = 0
4828 01:57:04.412657 tx_last_pass[0][0][11] = 0
4829 01:57:04.416047 tx_win_center[0][0][12] = 0
4830 01:57:04.416138 tx_first_pass[0][0][12] = 0
4831 01:57:04.419347 tx_last_pass[0][0][12] = 0
4832 01:57:04.422447 tx_win_center[0][0][13] = 0
4833 01:57:04.425910 tx_first_pass[0][0][13] = 0
4834 01:57:04.426001 tx_last_pass[0][0][13] = 0
4835 01:57:04.429029 tx_win_center[0][0][14] = 0
4836 01:57:04.432127 tx_first_pass[0][0][14] = 0
4837 01:57:04.435772 tx_last_pass[0][0][14] = 0
4838 01:57:04.438762 tx_win_center[0][0][15] = 0
4839 01:57:04.438854 tx_first_pass[0][0][15] = 0
4840 01:57:04.442160 tx_last_pass[0][0][15] = 0
4841 01:57:04.445538 tx_win_center[0][1][0] = 0
4842 01:57:04.448519 tx_first_pass[0][1][0] = 0
4843 01:57:04.448611 tx_last_pass[0][1][0] = 0
4844 01:57:04.451883 tx_win_center[0][1][1] = 0
4845 01:57:04.455344 tx_first_pass[0][1][1] = 0
4846 01:57:04.455437 tx_last_pass[0][1][1] = 0
4847 01:57:04.458575 tx_win_center[0][1][2] = 0
4848 01:57:04.461662 tx_first_pass[0][1][2] = 0
4849 01:57:04.464904 tx_last_pass[0][1][2] = 0
4850 01:57:04.464995 tx_win_center[0][1][3] = 0
4851 01:57:04.468395 tx_first_pass[0][1][3] = 0
4852 01:57:04.471451 tx_last_pass[0][1][3] = 0
4853 01:57:04.474899 tx_win_center[0][1][4] = 0
4854 01:57:04.474992 tx_first_pass[0][1][4] = 0
4855 01:57:04.478342 tx_last_pass[0][1][4] = 0
4856 01:57:04.481393 tx_win_center[0][1][5] = 0
4857 01:57:04.484487 tx_first_pass[0][1][5] = 0
4858 01:57:04.484580 tx_last_pass[0][1][5] = 0
4859 01:57:04.488300 tx_win_center[0][1][6] = 0
4860 01:57:04.491346 tx_first_pass[0][1][6] = 0
4861 01:57:04.494596 tx_last_pass[0][1][6] = 0
4862 01:57:04.494687 tx_win_center[0][1][7] = 0
4863 01:57:04.497790 tx_first_pass[0][1][7] = 0
4864 01:57:04.500842 tx_last_pass[0][1][7] = 0
4865 01:57:04.500933 tx_win_center[0][1][8] = 0
4866 01:57:04.504156 tx_first_pass[0][1][8] = 0
4867 01:57:04.507492 tx_last_pass[0][1][8] = 0
4868 01:57:04.510955 tx_win_center[0][1][9] = 0
4869 01:57:04.511048 tx_first_pass[0][1][9] = 0
4870 01:57:04.514109 tx_last_pass[0][1][9] = 0
4871 01:57:04.517642 tx_win_center[0][1][10] = 0
4872 01:57:04.520843 tx_first_pass[0][1][10] = 0
4873 01:57:04.520937 tx_last_pass[0][1][10] = 0
4874 01:57:04.524114 tx_win_center[0][1][11] = 0
4875 01:57:04.527354 tx_first_pass[0][1][11] = 0
4876 01:57:04.530469 tx_last_pass[0][1][11] = 0
4877 01:57:04.533870 tx_win_center[0][1][12] = 0
4878 01:57:04.533962 tx_first_pass[0][1][12] = 0
4879 01:57:04.537047 tx_last_pass[0][1][12] = 0
4880 01:57:04.540173 tx_win_center[0][1][13] = 0
4881 01:57:04.543798 tx_first_pass[0][1][13] = 0
4882 01:57:04.543889 tx_last_pass[0][1][13] = 0
4883 01:57:04.546856 tx_win_center[0][1][14] = 0
4884 01:57:04.550163 tx_first_pass[0][1][14] = 0
4885 01:57:04.553382 tx_last_pass[0][1][14] = 0
4886 01:57:04.553488 tx_win_center[0][1][15] = 0
4887 01:57:04.556780 tx_first_pass[0][1][15] = 0
4888 01:57:04.560186 tx_last_pass[0][1][15] = 0
4889 01:57:04.563076 tx_win_center[1][0][0] = 0
4890 01:57:04.563168 tx_first_pass[1][0][0] = 0
4891 01:57:04.566571 tx_last_pass[1][0][0] = 0
4892 01:57:04.569673 tx_win_center[1][0][1] = 0
4893 01:57:04.573244 tx_first_pass[1][0][1] = 0
4894 01:57:04.573336 tx_last_pass[1][0][1] = 0
4895 01:57:04.576382 tx_win_center[1][0][2] = 0
4896 01:57:04.579762 tx_first_pass[1][0][2] = 0
4897 01:57:04.582921 tx_last_pass[1][0][2] = 0
4898 01:57:04.583013 tx_win_center[1][0][3] = 0
4899 01:57:04.586049 tx_first_pass[1][0][3] = 0
4900 01:57:04.589300 tx_last_pass[1][0][3] = 0
4901 01:57:04.589392 tx_win_center[1][0][4] = 0
4902 01:57:04.592715 tx_first_pass[1][0][4] = 0
4903 01:57:04.595961 tx_last_pass[1][0][4] = 0
4904 01:57:04.599234 tx_win_center[1][0][5] = 0
4905 01:57:04.599326 tx_first_pass[1][0][5] = 0
4906 01:57:04.602521 tx_last_pass[1][0][5] = 0
4907 01:57:04.606051 tx_win_center[1][0][6] = 0
4908 01:57:04.609167 tx_first_pass[1][0][6] = 0
4909 01:57:04.609259 tx_last_pass[1][0][6] = 0
4910 01:57:04.612493 tx_win_center[1][0][7] = 0
4911 01:57:04.615579 tx_first_pass[1][0][7] = 0
4912 01:57:04.619019 tx_last_pass[1][0][7] = 0
4913 01:57:04.619116 tx_win_center[1][0][8] = 0
4914 01:57:04.622145 tx_first_pass[1][0][8] = 0
4915 01:57:04.625310 tx_last_pass[1][0][8] = 0
4916 01:57:04.628759 tx_win_center[1][0][9] = 0
4917 01:57:04.628851 tx_first_pass[1][0][9] = 0
4918 01:57:04.631778 tx_last_pass[1][0][9] = 0
4919 01:57:04.635051 tx_win_center[1][0][10] = 0
4920 01:57:04.638296 tx_first_pass[1][0][10] = 0
4921 01:57:04.638388 tx_last_pass[1][0][10] = 0
4922 01:57:04.641724 tx_win_center[1][0][11] = 0
4923 01:57:04.644873 tx_first_pass[1][0][11] = 0
4924 01:57:04.648279 tx_last_pass[1][0][11] = 0
4925 01:57:04.648372 tx_win_center[1][0][12] = 0
4926 01:57:04.651551 tx_first_pass[1][0][12] = 0
4927 01:57:04.654775 tx_last_pass[1][0][12] = 0
4928 01:57:04.658487 tx_win_center[1][0][13] = 0
4929 01:57:04.658579 tx_first_pass[1][0][13] = 0
4930 01:57:04.661374 tx_last_pass[1][0][13] = 0
4931 01:57:04.664568 tx_win_center[1][0][14] = 0
4932 01:57:04.667900 tx_first_pass[1][0][14] = 0
4933 01:57:04.667993 tx_last_pass[1][0][14] = 0
4934 01:57:04.671245 tx_win_center[1][0][15] = 0
4935 01:57:04.674411 tx_first_pass[1][0][15] = 0
4936 01:57:04.677909 tx_last_pass[1][0][15] = 0
4937 01:57:04.681027 tx_win_center[1][1][0] = 0
4938 01:57:04.681120 tx_first_pass[1][1][0] = 0
4939 01:57:04.684306 tx_last_pass[1][1][0] = 0
4940 01:57:04.687387 tx_win_center[1][1][1] = 0
4941 01:57:04.690861 tx_first_pass[1][1][1] = 0
4942 01:57:04.690956 tx_last_pass[1][1][1] = 0
4943 01:57:04.693835 tx_win_center[1][1][2] = 0
4944 01:57:04.697146 tx_first_pass[1][1][2] = 0
4945 01:57:04.697238 tx_last_pass[1][1][2] = 0
4946 01:57:04.700395 tx_win_center[1][1][3] = 0
4947 01:57:04.704219 tx_first_pass[1][1][3] = 0
4948 01:57:04.707029 tx_last_pass[1][1][3] = 0
4949 01:57:04.707123 tx_win_center[1][1][4] = 0
4950 01:57:04.710362 tx_first_pass[1][1][4] = 0
4951 01:57:04.713713 tx_last_pass[1][1][4] = 0
4952 01:57:04.716832 tx_win_center[1][1][5] = 0
4953 01:57:04.716929 tx_first_pass[1][1][5] = 0
4954 01:57:04.720114 tx_last_pass[1][1][5] = 0
4955 01:57:04.723880 tx_win_center[1][1][6] = 0
4956 01:57:04.726838 tx_first_pass[1][1][6] = 0
4957 01:57:04.726933 tx_last_pass[1][1][6] = 0
4958 01:57:04.730350 tx_win_center[1][1][7] = 0
4959 01:57:04.733464 tx_first_pass[1][1][7] = 0
4960 01:57:04.733558 tx_last_pass[1][1][7] = 0
4961 01:57:04.736574 tx_win_center[1][1][8] = 0
4962 01:57:04.739830 tx_first_pass[1][1][8] = 0
4963 01:57:04.743296 tx_last_pass[1][1][8] = 0
4964 01:57:04.743387 tx_win_center[1][1][9] = 0
4965 01:57:04.746599 tx_first_pass[1][1][9] = 0
4966 01:57:04.749573 tx_last_pass[1][1][9] = 0
4967 01:57:04.752961 tx_win_center[1][1][10] = 0
4968 01:57:04.753054 tx_first_pass[1][1][10] = 0
4969 01:57:04.756270 tx_last_pass[1][1][10] = 0
4970 01:57:04.759466 tx_win_center[1][1][11] = 0
4971 01:57:04.762985 tx_first_pass[1][1][11] = 0
4972 01:57:04.765965 tx_last_pass[1][1][11] = 0
4973 01:57:04.766058 tx_win_center[1][1][12] = 0
4974 01:57:04.769180 tx_first_pass[1][1][12] = 0
4975 01:57:04.772609 tx_last_pass[1][1][12] = 0
4976 01:57:04.775886 tx_win_center[1][1][13] = 0
4977 01:57:04.775978 tx_first_pass[1][1][13] = 0
4978 01:57:04.779074 tx_last_pass[1][1][13] = 0
4979 01:57:04.782339 tx_win_center[1][1][14] = 0
4980 01:57:04.785411 tx_first_pass[1][1][14] = 0
4981 01:57:04.785518 tx_last_pass[1][1][14] = 0
4982 01:57:04.788993 tx_win_center[1][1][15] = 0
4983 01:57:04.792117 tx_first_pass[1][1][15] = 0
4984 01:57:04.795400 tx_last_pass[1][1][15] = 0
4985 01:57:04.795505 dump params rx window
4986 01:57:04.798585 rx_firspass[0][0][0] = 0
4987 01:57:04.801797 rx_lastpass[0][0][0] = 0
4988 01:57:04.801924 rx_firspass[0][0][1] = 0
4989 01:57:04.805467 rx_lastpass[0][0][1] = 0
4990 01:57:04.808364 rx_firspass[0][0][2] = 0
4991 01:57:04.808469 rx_lastpass[0][0][2] = 0
4992 01:57:04.811727 rx_firspass[0][0][3] = 0
4993 01:57:04.815119 rx_lastpass[0][0][3] = 0
4994 01:57:04.818237 rx_firspass[0][0][4] = 0
4995 01:57:04.818398 rx_lastpass[0][0][4] = 0
4996 01:57:04.821455 rx_firspass[0][0][5] = 0
4997 01:57:04.824779 rx_lastpass[0][0][5] = 0
4998 01:57:04.824887 rx_firspass[0][0][6] = 0
4999 01:57:04.828236 rx_lastpass[0][0][6] = 0
5000 01:57:04.831387 rx_firspass[0][0][7] = 0
5001 01:57:04.831490 rx_lastpass[0][0][7] = 0
5002 01:57:04.834457 rx_firspass[0][0][8] = 0
5003 01:57:04.837874 rx_lastpass[0][0][8] = 0
5004 01:57:04.841139 rx_firspass[0][0][9] = 0
5005 01:57:04.841242 rx_lastpass[0][0][9] = 0
5006 01:57:04.844399 rx_firspass[0][0][10] = 0
5007 01:57:04.847562 rx_lastpass[0][0][10] = 0
5008 01:57:04.847660 rx_firspass[0][0][11] = 0
5009 01:57:04.850865 rx_lastpass[0][0][11] = 0
5010 01:57:04.854053 rx_firspass[0][0][12] = 0
5011 01:57:04.857380 rx_lastpass[0][0][12] = 0
5012 01:57:04.857493 rx_firspass[0][0][13] = 0
5013 01:57:04.860875 rx_lastpass[0][0][13] = 0
5014 01:57:04.864007 rx_firspass[0][0][14] = 0
5015 01:57:04.864104 rx_lastpass[0][0][14] = 0
5016 01:57:04.867432 rx_firspass[0][0][15] = 0
5017 01:57:04.870619 rx_lastpass[0][0][15] = 0
5018 01:57:04.873694 rx_firspass[0][1][0] = 0
5019 01:57:04.873794 rx_lastpass[0][1][0] = 0
5020 01:57:04.877077 rx_firspass[0][1][1] = 0
5021 01:57:04.880365 rx_lastpass[0][1][1] = 0
5022 01:57:04.880464 rx_firspass[0][1][2] = 0
5023 01:57:04.883721 rx_lastpass[0][1][2] = 0
5024 01:57:04.886852 rx_firspass[0][1][3] = 0
5025 01:57:04.890337 rx_lastpass[0][1][3] = 0
5026 01:57:04.890440 rx_firspass[0][1][4] = 0
5027 01:57:04.893404 rx_lastpass[0][1][4] = 0
5028 01:57:04.896642 rx_firspass[0][1][5] = 0
5029 01:57:04.896740 rx_lastpass[0][1][5] = 0
5030 01:57:04.899940 rx_firspass[0][1][6] = 0
5031 01:57:04.903311 rx_lastpass[0][1][6] = 0
5032 01:57:04.903409 rx_firspass[0][1][7] = 0
5033 01:57:04.906484 rx_lastpass[0][1][7] = 0
5034 01:57:04.909612 rx_firspass[0][1][8] = 0
5035 01:57:04.913206 rx_lastpass[0][1][8] = 0
5036 01:57:04.913298 rx_firspass[0][1][9] = 0
5037 01:57:04.916190 rx_lastpass[0][1][9] = 0
5038 01:57:04.921015 rx_firspass[0][1][10] = 0
5039 01:57:04.921219 rx_lastpass[0][1][10] = 0
5040 01:57:04.922792 rx_firspass[0][1][11] = 0
5041 01:57:04.926189 rx_lastpass[0][1][11] = 0
5042 01:57:04.929401 rx_firspass[0][1][12] = 0
5043 01:57:04.929529 rx_lastpass[0][1][12] = 0
5044 01:57:04.932747 rx_firspass[0][1][13] = 0
5045 01:57:04.935878 rx_lastpass[0][1][13] = 0
5046 01:57:04.935974 rx_firspass[0][1][14] = 0
5047 01:57:04.939248 rx_lastpass[0][1][14] = 0
5048 01:57:04.946263 rx_firspass[0][1][15] = 0
5049 01:57:04.946358 rx_lastpass[0][1][15] = 0
5050 01:57:04.946430 rx_firspass[1][0][0] = 0
5051 01:57:04.949128 rx_lastpass[1][0][0] = 0
5052 01:57:04.952564 rx_firspass[1][0][1] = 0
5053 01:57:04.952658 rx_lastpass[1][0][1] = 0
5054 01:57:04.955582 rx_firspass[1][0][2] = 0
5055 01:57:04.958920 rx_lastpass[1][0][2] = 0
5056 01:57:04.959015 rx_firspass[1][0][3] = 0
5057 01:57:04.962057 rx_lastpass[1][0][3] = 0
5058 01:57:04.965485 rx_firspass[1][0][4] = 0
5059 01:57:04.968884 rx_lastpass[1][0][4] = 0
5060 01:57:04.968978 rx_firspass[1][0][5] = 0
5061 01:57:04.971921 rx_lastpass[1][0][5] = 0
5062 01:57:04.975283 rx_firspass[1][0][6] = 0
5063 01:57:04.975384 rx_lastpass[1][0][6] = 0
5064 01:57:04.978385 rx_firspass[1][0][7] = 0
5065 01:57:04.981788 rx_lastpass[1][0][7] = 0
5066 01:57:04.981884 rx_firspass[1][0][8] = 0
5067 01:57:04.985247 rx_lastpass[1][0][8] = 0
5068 01:57:04.988383 rx_firspass[1][0][9] = 0
5069 01:57:04.991863 rx_lastpass[1][0][9] = 0
5070 01:57:04.991957 rx_firspass[1][0][10] = 0
5071 01:57:04.995025 rx_lastpass[1][0][10] = 0
5072 01:57:04.998335 rx_firspass[1][0][11] = 0
5073 01:57:04.998429 rx_lastpass[1][0][11] = 0
5074 01:57:05.001641 rx_firspass[1][0][12] = 0
5075 01:57:05.005009 rx_lastpass[1][0][12] = 0
5076 01:57:05.007946 rx_firspass[1][0][13] = 0
5077 01:57:05.008041 rx_lastpass[1][0][13] = 0
5078 01:57:05.011359 rx_firspass[1][0][14] = 0
5079 01:57:05.014548 rx_lastpass[1][0][14] = 0
5080 01:57:05.014642 rx_firspass[1][0][15] = 0
5081 01:57:05.017861 rx_lastpass[1][0][15] = 0
5082 01:57:05.021253 rx_firspass[1][1][0] = 0
5083 01:57:05.024559 rx_lastpass[1][1][0] = 0
5084 01:57:05.024656 rx_firspass[1][1][1] = 0
5085 01:57:05.027635 rx_lastpass[1][1][1] = 0
5086 01:57:05.030883 rx_firspass[1][1][2] = 0
5087 01:57:05.030977 rx_lastpass[1][1][2] = 0
5088 01:57:05.034181 rx_firspass[1][1][3] = 0
5089 01:57:05.037338 rx_lastpass[1][1][3] = 0
5090 01:57:05.037440 rx_firspass[1][1][4] = 0
5091 01:57:05.040802 rx_lastpass[1][1][4] = 0
5092 01:57:05.043904 rx_firspass[1][1][5] = 0
5093 01:57:05.047226 rx_lastpass[1][1][5] = 0
5094 01:57:05.047318 rx_firspass[1][1][6] = 0
5095 01:57:05.050502 rx_lastpass[1][1][6] = 0
5096 01:57:05.053660 rx_firspass[1][1][7] = 0
5097 01:57:05.053754 rx_lastpass[1][1][7] = 0
5098 01:57:05.056932 rx_firspass[1][1][8] = 0
5099 01:57:05.060269 rx_lastpass[1][1][8] = 0
5100 01:57:05.060363 rx_firspass[1][1][9] = 0
5101 01:57:05.063646 rx_lastpass[1][1][9] = 0
5102 01:57:05.066886 rx_firspass[1][1][10] = 0
5103 01:57:05.070403 rx_lastpass[1][1][10] = 0
5104 01:57:05.070497 rx_firspass[1][1][11] = 0
5105 01:57:05.073351 rx_lastpass[1][1][11] = 0
5106 01:57:05.076613 rx_firspass[1][1][12] = 0
5107 01:57:05.079939 rx_lastpass[1][1][12] = 0
5108 01:57:05.080032 rx_firspass[1][1][13] = 0
5109 01:57:05.082983 rx_lastpass[1][1][13] = 0
5110 01:57:05.086601 rx_firspass[1][1][14] = 0
5111 01:57:05.086695 rx_lastpass[1][1][14] = 0
5112 01:57:05.089614 rx_firspass[1][1][15] = 0
5113 01:57:05.092799 rx_lastpass[1][1][15] = 0
5114 01:57:05.096242 dump params clk_delay
5115 01:57:05.096335 clk_delay[0] = 0
5116 01:57:05.096408 clk_delay[1] = 0
5117 01:57:05.099462 dump params dqs_delay
5118 01:57:05.102585 dqs_delay[0][0] = 0
5119 01:57:05.102678 dqs_delay[0][1] = 0
5120 01:57:05.105996 dqs_delay[1][0] = 0
5121 01:57:05.106089 dqs_delay[1][1] = 0
5122 01:57:05.109223 dump params delay_cell_unit = 753
5123 01:57:05.112575 mt_set_emi_preloader end
5124 01:57:05.115793 [mt_mem_init] dram size: 0x100000000, rank number: 2
5125 01:57:05.122494 [complex_mem_test] start addr:0x40000000, len:20480
5126 01:57:05.158021 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5127 01:57:05.164696 [complex_mem_test] start addr:0x80000000, len:20480
5128 01:57:05.200254 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5129 01:57:05.206823 [complex_mem_test] start addr:0xc0000000, len:20480
5130 01:57:05.242749 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5131 01:57:05.249055 [complex_mem_test] start addr:0x56000000, len:8192
5132 01:57:05.265958 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5133 01:57:05.269205 ddr_geometry:1
5134 01:57:05.272415 [complex_mem_test] start addr:0x80000000, len:8192
5135 01:57:05.289634 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5136 01:57:05.293248 dram_init: dram init end (result: 0)
5137 01:57:05.299517 Successfully loaded DRAM blobs and ran DRAM calibration
5138 01:57:05.309313 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5139 01:57:05.309427 CBMEM:
5140 01:57:05.312523 IMD: root @ 00000000fffff000 254 entries.
5141 01:57:05.315825 IMD: root @ 00000000ffffec00 62 entries.
5142 01:57:05.322805 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5143 01:57:05.329004 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5144 01:57:05.332437 in-header: 03 a1 00 00 08 00 00 00
5145 01:57:05.335650 in-data: 84 60 60 10 00 00 00 00
5146 01:57:05.338940 Chrome EC: clear events_b mask to 0x0000000020004000
5147 01:57:05.345529 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5148 01:57:05.349062 in-header: 03 fd 00 00 00 00 00 00
5149 01:57:05.352556 in-data:
5150 01:57:05.355619 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5151 01:57:05.359156 CBFS @ 21000 size 3d4000
5152 01:57:05.362824 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5153 01:57:05.365406 CBFS: Locating 'fallback/ramstage'
5154 01:57:05.368959 CBFS: Found @ offset 10d40 size d563
5155 01:57:05.391462 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5156 01:57:05.403893 Accumulated console time in romstage 13549 ms
5157 01:57:05.404045
5158 01:57:05.404152
5159 01:57:05.413576 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5160 01:57:05.416831 ARM64: Exception handlers installed.
5161 01:57:05.416944 ARM64: Testing exception
5162 01:57:05.420058 ARM64: Done test exception
5163 01:57:05.423445 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5164 01:57:05.426515 Manufacturer: ef
5165 01:57:05.433190 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5166 01:57:05.436142 WARNING: RO_VPD is uninitialized or empty.
5167 01:57:05.439689 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5168 01:57:05.442556 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5169 01:57:05.453316 read SPI 0x550600 0x3a00: 4533 us, 3275 KB/s, 26.200 Mbps
5170 01:57:05.456788 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5171 01:57:05.463365 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5172 01:57:05.463476 Enumerating buses...
5173 01:57:05.469793 Show all devs... Before device enumeration.
5174 01:57:05.469897 Root Device: enabled 1
5175 01:57:05.473276 CPU_CLUSTER: 0: enabled 1
5176 01:57:05.476285 CPU: 00: enabled 1
5177 01:57:05.476381 Compare with tree...
5178 01:57:05.479587 Root Device: enabled 1
5179 01:57:05.479683 CPU_CLUSTER: 0: enabled 1
5180 01:57:05.483082 CPU: 00: enabled 1
5181 01:57:05.486462 Root Device scanning...
5182 01:57:05.489544 root_dev_scan_bus for Root Device
5183 01:57:05.489640 CPU_CLUSTER: 0 enabled
5184 01:57:05.492831 root_dev_scan_bus for Root Device done
5185 01:57:05.499217 scan_bus: scanning of bus Root Device took 10689 usecs
5186 01:57:05.499322 done
5187 01:57:05.502479 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5188 01:57:05.505690 Allocating resources...
5189 01:57:05.509095 Reading resources...
5190 01:57:05.512259 Root Device read_resources bus 0 link: 0
5191 01:57:05.515741 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5192 01:57:05.518927 CPU: 00 missing read_resources
5193 01:57:05.522043 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5194 01:57:05.525641 Root Device read_resources bus 0 link: 0 done
5195 01:57:05.528721 Done reading resources.
5196 01:57:05.532048 Show resources in subtree (Root Device)...After reading.
5197 01:57:05.538751 Root Device child on link 0 CPU_CLUSTER: 0
5198 01:57:05.541936 CPU_CLUSTER: 0 child on link 0 CPU: 00
5199 01:57:05.548197 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5200 01:57:05.551635 CPU: 00
5201 01:57:05.551749 Setting resources...
5202 01:57:05.558249 Root Device assign_resources, bus 0 link: 0
5203 01:57:05.561411 CPU_CLUSTER: 0 missing set_resources
5204 01:57:05.565071 Root Device assign_resources, bus 0 link: 0
5205 01:57:05.565185 Done setting resources.
5206 01:57:05.571107 Show resources in subtree (Root Device)...After assigning values.
5207 01:57:05.574554 Root Device child on link 0 CPU_CLUSTER: 0
5208 01:57:05.577995 CPU_CLUSTER: 0 child on link 0 CPU: 00
5209 01:57:05.587606 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5210 01:57:05.590758 CPU: 00
5211 01:57:05.590864 Done allocating resources.
5212 01:57:05.597289 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5213 01:57:05.597411 Enabling resources...
5214 01:57:05.597500 done.
5215 01:57:05.604049 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5216 01:57:05.607182 Initializing devices...
5217 01:57:05.607292 Root Device init ...
5218 01:57:05.610371 mainboard_init: Starting display init.
5219 01:57:05.613450 ADC[4]: Raw value=75836 ID=0
5220 01:57:05.636250 anx7625_power_on_init: Init interface.
5221 01:57:05.639527 anx7625_disable_pd_protocol: Disabled PD feature.
5222 01:57:05.646059 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5223 01:57:05.692911 anx7625_start_dp_work: Secure OCM version=00
5224 01:57:05.696219 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5225 01:57:05.713415 sp_tx_get_edid_block: EDID Block = 1
5226 01:57:05.830626 Extracted contents:
5227 01:57:05.833694 header: 00 ff ff ff ff ff ff 00
5228 01:57:05.837133 serial number: 06 af 5c 14 00 00 00 00 00 1a
5229 01:57:05.840378 version: 01 04
5230 01:57:05.843806 basic params: 95 1a 0e 78 02
5231 01:57:05.846882 chroma info: 99 85 95 55 56 92 28 22 50 54
5232 01:57:05.850204 established: 00 00 00
5233 01:57:05.856739 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5234 01:57:05.863296 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5235 01:57:05.866474 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5236 01:57:05.873077 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5237 01:57:05.879818 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5238 01:57:05.883228 extensions: 00
5239 01:57:05.883339 checksum: ae
5240 01:57:05.883412
5241 01:57:05.889675 Manufacturer: AUO Model 145c Serial Number 0
5242 01:57:05.889805 Made week 0 of 2016
5243 01:57:05.892851 EDID version: 1.4
5244 01:57:05.892952 Digital display
5245 01:57:05.896068 6 bits per primary color channel
5246 01:57:05.899154 DisplayPort interface
5247 01:57:05.902430 Maximum image size: 26 cm x 14 cm
5248 01:57:05.902540 Gamma: 220%
5249 01:57:05.902615 Check DPMS levels
5250 01:57:05.905796 Supported color formats: RGB 4:4:4
5251 01:57:05.909053 First detailed timing is preferred timing
5252 01:57:05.912450 Established timings supported:
5253 01:57:05.915705 Standard timings supported:
5254 01:57:05.919083 Detailed timings
5255 01:57:05.922234 Hex of detail: ce1d56ea50001a3030204600009010000018
5256 01:57:05.925591 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5257 01:57:05.931915 0556 0586 05a6 0640 hborder 0
5258 01:57:05.935457 0300 0304 030a 031a vborder 0
5259 01:57:05.938598 -hsync -vsync
5260 01:57:05.938704 Did detailed timing
5261 01:57:05.945440 Hex of detail: 0000000f0000000000000000000000000020
5262 01:57:05.948396 Manufacturer-specified data, tag 15
5263 01:57:05.951499 Hex of detail: 000000fe0041554f0a202020202020202020
5264 01:57:05.955132 ASCII string: AUO
5265 01:57:05.958304 Hex of detail: 000000fe004231313658414230312e34200a
5266 01:57:05.961528 ASCII string: B116XAB01.4
5267 01:57:05.961621 Checksum
5268 01:57:05.964942 Checksum: 0xae (valid)
5269 01:57:05.967805 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5270 01:57:05.971165 DSI data_rate: 457800000 bps
5271 01:57:05.977737 anx7625_parse_edid: set default k value to 0x3d for panel
5272 01:57:05.981141 anx7625_parse_edid: pixelclock(76300).
5273 01:57:05.984128 hactive(1366), hsync(32), hfp(48), hbp(154)
5274 01:57:05.987333 vactive(768), vsync(6), vfp(4), vbp(16)
5275 01:57:05.990973 anx7625_dsi_config: config dsi.
5276 01:57:05.998964 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5277 01:57:06.019553 anx7625_dsi_config: success to config DSI
5278 01:57:06.022800 anx7625_dp_start: MIPI phy setup OK.
5279 01:57:06.026197 [SSUSB] Setting up USB HOST controller...
5280 01:57:06.029697 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5281 01:57:06.032607 [SSUSB] phy power-on done.
5282 01:57:06.036407 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5283 01:57:06.039709 in-header: 03 fc 01 00 00 00 00 00
5284 01:57:06.039822 in-data:
5285 01:57:06.046419 handle_proto3_response: EC response with error code: 1
5286 01:57:06.046552 SPM: pcm index = 1
5287 01:57:06.052964 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5288 01:57:06.053098 CBFS @ 21000 size 3d4000
5289 01:57:06.059128 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5290 01:57:06.062554 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5291 01:57:06.066026 CBFS: Found @ offset 1e7c0 size 1026
5292 01:57:06.072445 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5293 01:57:06.075651 SPM: binary array size = 2988
5294 01:57:06.079047 SPM: version = pcm_allinone_v1.17.2_20180829
5295 01:57:06.082365 SPM binary loaded in 32 msecs
5296 01:57:06.090972 spm_kick_im_to_fetch: ptr = 000000004021eec2
5297 01:57:06.094201 spm_kick_im_to_fetch: len = 2988
5298 01:57:06.094294 SPM: spm_kick_pcm_to_run
5299 01:57:06.097464 SPM: spm_kick_pcm_to_run done
5300 01:57:06.100664 SPM: spm_init done in 52 msecs
5301 01:57:06.103899 Root Device init finished in 495029 usecs
5302 01:57:06.107315 CPU_CLUSTER: 0 init ...
5303 01:57:06.116887 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5304 01:57:06.120179 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5305 01:57:06.123385 CBFS @ 21000 size 3d4000
5306 01:57:06.126817 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5307 01:57:06.129911 CBFS: Locating 'sspm.bin'
5308 01:57:06.133253 CBFS: Found @ offset 208c0 size 41cb
5309 01:57:06.143983 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5310 01:57:06.151837 CPU_CLUSTER: 0 init finished in 42799 usecs
5311 01:57:06.151947 Devices initialized
5312 01:57:06.155128 Show all devs... After init.
5313 01:57:06.158578 Root Device: enabled 1
5314 01:57:06.158695 CPU_CLUSTER: 0: enabled 1
5315 01:57:06.161679 CPU: 00: enabled 1
5316 01:57:06.165043 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5317 01:57:06.171659 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5318 01:57:06.174830 ELOG: NV offset 0x558000 size 0x1000
5319 01:57:06.178272 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5320 01:57:06.184884 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5321 01:57:06.191134 ELOG: Event(17) added with size 13 at 2024-06-21 01:57:05 UTC
5322 01:57:06.194730 out: cmd=0x121: 03 db 21 01 00 00 00 00
5323 01:57:06.197865 in-header: 03 83 00 00 2c 00 00 00
5324 01:57:06.210796 in-data: c9 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 ac 40 09 00 06 80 00 00 73 00 01 00 06 80 00 00 5d 86 13 00 06 80 00 00 d9 c4 14 00
5325 01:57:06.213865 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5326 01:57:06.217062 in-header: 03 19 00 00 08 00 00 00
5327 01:57:06.220344 in-data: a2 e0 47 00 13 00 00 00
5328 01:57:06.223841 Chrome EC: UHEPI supported
5329 01:57:06.230153 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5330 01:57:06.233667 in-header: 03 e1 00 00 08 00 00 00
5331 01:57:06.236865 in-data: 84 20 60 10 00 00 00 00
5332 01:57:06.240194 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5333 01:57:06.246586 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5334 01:57:06.249950 in-header: 03 e1 00 00 08 00 00 00
5335 01:57:06.253310 in-data: 84 20 60 10 00 00 00 00
5336 01:57:06.259545 ELOG: Event(A1) added with size 10 at 2024-06-21 01:57:05 UTC
5337 01:57:06.266201 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5338 01:57:06.269420 ELOG: Event(A0) added with size 9 at 2024-06-21 01:57:05 UTC
5339 01:57:06.276410 elog_add_boot_reason: Logged dev mode boot
5340 01:57:06.276507 Finalize devices...
5341 01:57:06.279312 Devices finalized
5342 01:57:06.282676 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5343 01:57:06.288929 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5344 01:57:06.292364 ELOG: Event(91) added with size 10 at 2024-06-21 01:57:06 UTC
5345 01:57:06.295321 Writing coreboot table at 0xffeda000
5346 01:57:06.302075 0. 0000000000114000-000000000011efff: RAMSTAGE
5347 01:57:06.305332 1. 0000000040000000-000000004023cfff: RAMSTAGE
5348 01:57:06.308696 2. 000000004023d000-00000000545fffff: RAM
5349 01:57:06.311700 3. 0000000054600000-000000005465ffff: BL31
5350 01:57:06.315137 4. 0000000054660000-00000000ffed9fff: RAM
5351 01:57:06.321682 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5352 01:57:06.324969 6. 0000000100000000-000000013fffffff: RAM
5353 01:57:06.328323 Passing 5 GPIOs to payload:
5354 01:57:06.331459 NAME | PORT | POLARITY | VALUE
5355 01:57:06.337927 write protect | 0x00000096 | low | high
5356 01:57:06.341351 EC in RW | 0x000000b1 | high | undefined
5357 01:57:06.347646 EC interrupt | 0x00000097 | low | undefined
5358 01:57:06.350905 TPM interrupt | 0x00000099 | high | undefined
5359 01:57:06.354293 speaker enable | 0x000000af | high | undefined
5360 01:57:06.357647 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5361 01:57:06.360998 in-header: 03 f7 00 00 02 00 00 00
5362 01:57:06.364232 in-data: 04 00
5363 01:57:06.364332 Board ID: 4
5364 01:57:06.367202 ADC[3]: Raw value=214692 ID=1
5365 01:57:06.367296 RAM code: 1
5366 01:57:06.370431 SKU ID: 16
5367 01:57:06.373827 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5368 01:57:06.377350 CBFS @ 21000 size 3d4000
5369 01:57:06.380274 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5370 01:57:06.386712 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 582f
5371 01:57:06.390210 coreboot table: 940 bytes.
5372 01:57:06.393449 IMD ROOT 0. 00000000fffff000 00001000
5373 01:57:06.396624 IMD SMALL 1. 00000000ffffe000 00001000
5374 01:57:06.400222 CONSOLE 2. 00000000fffde000 00020000
5375 01:57:06.406450 FMAP 3. 00000000fffdd000 0000047c
5376 01:57:06.409845 TIME STAMP 4. 00000000fffdc000 00000910
5377 01:57:06.413181 RAMOOPS 5. 00000000ffedc000 00100000
5378 01:57:06.416640 COREBOOT 6. 00000000ffeda000 00002000
5379 01:57:06.416740 IMD small region:
5380 01:57:06.419546 IMD ROOT 0. 00000000ffffec00 00000400
5381 01:57:06.426242 VBOOT WORK 1. 00000000ffffeb00 00000100
5382 01:57:06.429667 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5383 01:57:06.432831 VPD 3. 00000000ffffea60 0000006c
5384 01:57:06.436196 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5385 01:57:06.442607 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5386 01:57:06.445986 in-header: 03 e1 00 00 08 00 00 00
5387 01:57:06.449042 in-data: 84 20 60 10 00 00 00 00
5388 01:57:06.455717 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5389 01:57:06.455827 CBFS @ 21000 size 3d4000
5390 01:57:06.462007 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5391 01:57:06.465446 CBFS: Locating 'fallback/payload'
5392 01:57:06.473680 CBFS: Found @ offset dc040 size 439a0
5393 01:57:06.561503 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5394 01:57:06.564730 Checking segment from ROM address 0x0000000040003a00
5395 01:57:06.571189 Checking segment from ROM address 0x0000000040003a1c
5396 01:57:06.574477 Loading segment from ROM address 0x0000000040003a00
5397 01:57:06.577859 code (compression=0)
5398 01:57:06.587922 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5399 01:57:06.594073 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5400 01:57:06.597336 it's not compressed!
5401 01:57:06.600804 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5402 01:57:06.607078 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5403 01:57:06.615709 Loading segment from ROM address 0x0000000040003a1c
5404 01:57:06.619023 Entry Point 0x0000000080000000
5405 01:57:06.619123 Loaded segments
5406 01:57:06.625585 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5407 01:57:06.628599 Jumping to boot code at 0000000080000000(00000000ffeda000)
5408 01:57:06.638842 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5409 01:57:06.645252 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5410 01:57:06.645350 CBFS @ 21000 size 3d4000
5411 01:57:06.651565 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5412 01:57:06.655100 CBFS: Locating 'fallback/bl31'
5413 01:57:06.658079 CBFS: Found @ offset 36dc0 size 5820
5414 01:57:06.669786 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5415 01:57:06.673173 Checking segment from ROM address 0x0000000040003a00
5416 01:57:06.679570 Checking segment from ROM address 0x0000000040003a1c
5417 01:57:06.682693 Loading segment from ROM address 0x0000000040003a00
5418 01:57:06.686019 code (compression=1)
5419 01:57:06.695919 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5420 01:57:06.702627 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5421 01:57:06.702727 using LZMA
5422 01:57:06.711661 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5423 01:57:06.718014 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5424 01:57:06.721542 Loading segment from ROM address 0x0000000040003a1c
5425 01:57:06.724394 Entry Point 0x0000000054601000
5426 01:57:06.724521 Loaded segments
5427 01:57:06.727663 NOTICE: MT8183 bl31_setup
5428 01:57:06.735142 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5429 01:57:06.738740 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5430 01:57:06.741735 INFO: [DEVAPC] dump DEVAPC registers:
5431 01:57:06.751662 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5432 01:57:06.758631 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5433 01:57:06.768164 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5434 01:57:06.774460 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5435 01:57:06.784343 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5436 01:57:06.790993 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5437 01:57:06.800787 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5438 01:57:06.807247 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5439 01:57:06.817029 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5440 01:57:06.823765 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5441 01:57:06.833545 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5442 01:57:06.840023 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5443 01:57:06.849944 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5444 01:57:06.856358 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5445 01:57:06.863063 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5446 01:57:06.872587 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5447 01:57:06.879293 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5448 01:57:06.886082 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5449 01:57:06.892601 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5450 01:57:06.902208 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5451 01:57:06.908906 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5452 01:57:06.915703 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5453 01:57:06.918796 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5454 01:57:06.921930 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5455 01:57:06.925313 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5456 01:57:06.928354 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5457 01:57:06.931982 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5458 01:57:06.938569 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5459 01:57:06.941732 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5460 01:57:06.945029 WARNING: region 0:
5461 01:57:06.948096 WARNING: apc:0x168, sa:0x0, ea:0xfff
5462 01:57:06.951341 WARNING: region 1:
5463 01:57:06.954734 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5464 01:57:06.954825 WARNING: region 2:
5465 01:57:06.957940 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5466 01:57:06.961180 WARNING: region 3:
5467 01:57:06.964402 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5468 01:57:06.967726 WARNING: region 4:
5469 01:57:06.971061 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5470 01:57:06.971152 WARNING: region 5:
5471 01:57:06.974472 WARNING: apc:0x0, sa:0x0, ea:0x0
5472 01:57:06.977579 WARNING: region 6:
5473 01:57:06.980674 WARNING: apc:0x0, sa:0x0, ea:0x0
5474 01:57:06.980764 WARNING: region 7:
5475 01:57:06.984005 WARNING: apc:0x0, sa:0x0, ea:0x0
5476 01:57:06.990574 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5477 01:57:06.994159 INFO: SPM: enable SPMC mode
5478 01:57:06.997351 NOTICE: spm_boot_init() start
5479 01:57:07.000479 NOTICE: spm_boot_init() end
5480 01:57:07.003843 INFO: BL31: Initializing runtime services
5481 01:57:07.010570 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5482 01:57:07.013641 INFO: BL31: Preparing for EL3 exit to normal world
5483 01:57:07.016827 INFO: Entry point address = 0x80000000
5484 01:57:07.020143 INFO: SPSR = 0x8
5485 01:57:07.041836
5486 01:57:07.041945
5487 01:57:07.042018
5488 01:57:07.042483 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5489 01:57:07.042591 start: 2.2.4 bootloader-commands (timeout 00:04:38) [common]
5490 01:57:07.042684 Setting prompt string to ['jacuzzi:']
5491 01:57:07.042771 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:38)
5492 01:57:07.045207 Starting depthcharge on Juniper...
5493 01:57:07.045298
5494 01:57:07.048524 vboot_handoff: creating legacy vboot_handoff structure
5495 01:57:07.048616
5496 01:57:07.051630 ec_init(0): CrosEC protocol v3 supported (544, 544)
5497 01:57:07.055216
5498 01:57:07.055306 Wipe memory regions:
5499 01:57:07.055378
5500 01:57:07.058226 [0x00000040000000, 0x00000054600000)
5501 01:57:07.101193
5502 01:57:07.101336 [0x00000054660000, 0x00000080000000)
5503 01:57:07.192970
5504 01:57:07.193127 [0x000000811994a0, 0x000000ffeda000)
5505 01:57:07.453270
5506 01:57:07.453416 [0x00000100000000, 0x00000140000000)
5507 01:57:07.585727
5508 01:57:07.588909 Initializing XHCI USB controller at 0x11200000.
5509 01:57:07.612274
5510 01:57:07.615342 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5511 01:57:07.615460
5512 01:57:07.615561
5513 01:57:07.615888 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5515 01:57:07.716358 jacuzzi: tftpboot 192.168.201.1 14479180/tftp-deploy-w_t3ps90/kernel/image.itb 14479180/tftp-deploy-w_t3ps90/kernel/cmdline
5516 01:57:07.716549 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5517 01:57:07.716673 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
5518 01:57:07.720650 tftpboot 192.168.201.1 14479180/tftp-deploy-w_t3ps90/kernel/image.itp-deploy-w_t3ps90/kernel/cmdline
5519 01:57:07.720744
5520 01:57:07.720816 Waiting for link
5521 01:57:08.126210
5522 01:57:08.126371 R8152: Initializing
5523 01:57:08.126445
5524 01:57:08.129385 Version 9 (ocp_data = 6010)
5525 01:57:08.129503
5526 01:57:08.132777 R8152: Done initializing
5527 01:57:08.132868
5528 01:57:08.132940 Adding net device
5529 01:57:08.518558
5530 01:57:08.518751 done.
5531 01:57:08.518832
5532 01:57:08.518899 MAC: 00:e0:4c:78:85:cb
5533 01:57:08.518964
5534 01:57:08.521636 Sending DHCP discover... done.
5535 01:57:08.521732
5536 01:57:08.524837 Waiting for reply... done.
5537 01:57:08.524936
5538 01:57:08.529056 Sending DHCP request... done.
5539 01:57:08.529193
5540 01:57:08.540163 Waiting for reply... done.
5541 01:57:08.540312
5542 01:57:08.540419 My ip is 192.168.201.22
5543 01:57:08.540510
5544 01:57:08.543606 The DHCP server ip is 192.168.201.1
5545 01:57:08.543703
5546 01:57:08.550150 TFTP server IP predefined by user: 192.168.201.1
5547 01:57:08.550264
5548 01:57:08.556672 Bootfile predefined by user: 14479180/tftp-deploy-w_t3ps90/kernel/image.itb
5549 01:57:08.556779
5550 01:57:08.559829 Sending tftp read request... done.
5551 01:57:08.559929
5552 01:57:08.563653 Waiting for the transfer...
5553 01:57:08.563751
5554 01:57:08.853344 00000000 ################################################################
5555 01:57:08.853542
5556 01:57:09.153446 00080000 ################################################################
5557 01:57:09.153604
5558 01:57:09.452283 00100000 ################################################################
5559 01:57:09.452443
5560 01:57:09.751885 00180000 ################################################################
5561 01:57:09.752067
5562 01:57:10.044394 00200000 ################################################################
5563 01:57:10.044601
5564 01:57:10.349308 00280000 ################################################################
5565 01:57:10.349480
5566 01:57:10.638892 00300000 ################################################################
5567 01:57:10.639054
5568 01:57:10.928701 00380000 ################################################################
5569 01:57:10.928859
5570 01:57:11.194018 00400000 ################################################################
5571 01:57:11.194170
5572 01:57:11.458329 00480000 ################################################################
5573 01:57:11.458490
5574 01:57:11.758792 00500000 ################################################################
5575 01:57:11.758953
5576 01:57:12.038413 00580000 ################################################################
5577 01:57:12.038575
5578 01:57:12.332918 00600000 ################################################################
5579 01:57:12.333075
5580 01:57:12.597902 00680000 ################################################################
5581 01:57:12.598065
5582 01:57:12.879153 00700000 ################################################################
5583 01:57:12.879305
5584 01:57:13.138904 00780000 ################################################################
5585 01:57:13.139067
5586 01:57:13.406935 00800000 ################################################################
5587 01:57:13.407100
5588 01:57:13.673349 00880000 ################################################################
5589 01:57:13.673519
5590 01:57:13.942449 00900000 ################################################################
5591 01:57:13.942607
5592 01:57:14.238795 00980000 ################################################################
5593 01:57:14.238945
5594 01:57:14.506981 00a00000 ################################################################
5595 01:57:14.507143
5596 01:57:14.796519 00a80000 ################################################################
5597 01:57:14.796681
5598 01:57:15.092793 00b00000 ################################################################
5599 01:57:15.092951
5600 01:57:15.395476 00b80000 ################################################################
5601 01:57:15.395631
5602 01:57:15.684681 00c00000 ################################################################
5603 01:57:15.684838
5604 01:57:15.963925 00c80000 ################################################################
5605 01:57:15.964114
5606 01:57:16.250314 00d00000 ################################################################
5607 01:57:16.250592
5608 01:57:16.544811 00d80000 ################################################################
5609 01:57:16.544999
5610 01:57:16.900528 00e00000 ################################################################
5611 01:57:16.900710
5612 01:57:17.198316 00e80000 ################################################################
5613 01:57:17.198463
5614 01:57:17.474527 00f00000 ################################################################
5615 01:57:17.474689
5616 01:57:17.751437 00f80000 ################################################################
5617 01:57:17.751593
5618 01:57:18.045176 01000000 ################################################################
5619 01:57:18.045335
5620 01:57:18.348344 01080000 ################################################################
5621 01:57:18.348506
5622 01:57:18.646834 01100000 ################################################################
5623 01:57:18.646992
5624 01:57:18.941491 01180000 ################################################################
5625 01:57:18.941643
5626 01:57:19.240491 01200000 ################################################################
5627 01:57:19.240640
5628 01:57:19.539628 01280000 ################################################################
5629 01:57:19.539779
5630 01:57:19.828216 01300000 ################################################################
5631 01:57:19.828371
5632 01:57:20.105115 01380000 ################################################################
5633 01:57:20.105271
5634 01:57:20.393257 01400000 ################################################################
5635 01:57:20.393439
5636 01:57:20.663445 01480000 ################################################################
5637 01:57:20.663595
5638 01:57:20.955415 01500000 ################################################################
5639 01:57:20.955564
5640 01:57:21.240209 01580000 ################################################################
5641 01:57:21.240361
5642 01:57:21.522927 01600000 ################################################################
5643 01:57:21.523080
5644 01:57:21.817606 01680000 ################################################################
5645 01:57:21.817769
5646 01:57:22.163232 01700000 ################################################################
5647 01:57:22.163749
5648 01:57:22.545350 01780000 ################################################################
5649 01:57:22.545511
5650 01:57:22.837675 01800000 ################################################################
5651 01:57:22.837829
5652 01:57:23.143144 01880000 ################################################################
5653 01:57:23.143291
5654 01:57:23.435296 01900000 ################################################################
5655 01:57:23.435444
5656 01:57:23.707331 01980000 ################################################################
5657 01:57:23.707482
5658 01:57:24.003813 01a00000 ################################################################
5659 01:57:24.003962
5660 01:57:24.407228 01a80000 ################################################################
5661 01:57:24.407374
5662 01:57:24.790259 01b00000 ################################################################
5663 01:57:24.790760
5664 01:57:25.212377 01b80000 ################################################################
5665 01:57:25.212888
5666 01:57:25.641761 01c00000 ################################################################
5667 01:57:25.641920
5668 01:57:26.051355 01c80000 ################################################################
5669 01:57:26.051836
5670 01:57:26.464944 01d00000 ################################################################
5671 01:57:26.465485
5672 01:57:26.821628 01d80000 ################################################################
5673 01:57:26.821779
5674 01:57:27.188261 01e00000 ################################################################
5675 01:57:27.188418
5676 01:57:27.449588 01e80000 ################################################################
5677 01:57:27.449742
5678 01:57:27.707463 01f00000 ################################################################
5679 01:57:27.707621
5680 01:57:27.959782 01f80000 ################################################################
5681 01:57:27.959935
5682 01:57:28.228528 02000000 ################################################################
5683 01:57:28.228679
5684 01:57:28.506809 02080000 ################################################################
5685 01:57:28.506963
5686 01:57:28.769755 02100000 ################################################################
5687 01:57:28.769920
5688 01:57:29.047012 02180000 ################################################################
5689 01:57:29.047161
5690 01:57:29.305186 02200000 ################################################################
5691 01:57:29.305334
5692 01:57:29.603542 02280000 ################################################################
5693 01:57:29.603689
5694 01:57:29.865820 02300000 ################################################################
5695 01:57:29.865970
5696 01:57:30.162281 02380000 ################################################################
5697 01:57:30.162434
5698 01:57:30.437619 02400000 ################################################################
5699 01:57:30.437787
5700 01:57:30.692730 02480000 ################################################################
5701 01:57:30.692879
5702 01:57:30.947014 02500000 ################################################################
5703 01:57:30.947168
5704 01:57:31.204867 02580000 ################################################################
5705 01:57:31.205017
5706 01:57:31.457338 02600000 ################################################################
5707 01:57:31.457510
5708 01:57:31.711921 02680000 ################################################################
5709 01:57:31.712072
5710 01:57:31.965834 02700000 ################################################################
5711 01:57:31.965983
5712 01:57:32.220845 02780000 ################################################################
5713 01:57:32.220995
5714 01:57:32.474254 02800000 ################################################################
5715 01:57:32.474430
5716 01:57:32.723478 02880000 ################################################################
5717 01:57:32.723637
5718 01:57:32.969296 02900000 ################################################################
5719 01:57:32.969485
5720 01:57:33.207201 02980000 ################################################################
5721 01:57:33.207389
5722 01:57:33.450909 02a00000 ################################################################
5723 01:57:33.451051
5724 01:57:33.703221 02a80000 ################################################################
5725 01:57:33.703368
5726 01:57:33.949692 02b00000 ################################################################
5727 01:57:33.949832
5728 01:57:34.195456 02b80000 ################################################################
5729 01:57:34.195607
5730 01:57:34.440740 02c00000 ################################################################
5731 01:57:34.440892
5732 01:57:34.686375 02c80000 ################################################################
5733 01:57:34.686563
5734 01:57:34.933297 02d00000 ################################################################
5735 01:57:34.933467
5736 01:57:35.181365 02d80000 ################################################################
5737 01:57:35.181539
5738 01:57:35.431701 02e00000 ################################################################
5739 01:57:35.431855
5740 01:57:35.701215 02e80000 ################################################################
5741 01:57:35.701358
5742 01:57:35.963167 02f00000 ################################################################
5743 01:57:35.963310
5744 01:57:36.223078 02f80000 ################################################################
5745 01:57:36.223226
5746 01:57:36.479326 03000000 ################################################################
5747 01:57:36.479475
5748 01:57:36.743537 03080000 ################################################################
5749 01:57:36.743684
5750 01:57:36.999493 03100000 ################################################################
5751 01:57:36.999637
5752 01:57:37.254957 03180000 ################################################################
5753 01:57:37.255103
5754 01:57:37.508015 03200000 ################################################################
5755 01:57:37.508160
5756 01:57:37.770795 03280000 ################################################################
5757 01:57:37.770939
5758 01:57:38.034660 03300000 ################################################################
5759 01:57:38.034833
5760 01:57:38.311367 03380000 ################################################################
5761 01:57:38.311523
5762 01:57:38.571376 03400000 ################################################################
5763 01:57:38.571563
5764 01:57:38.821727 03480000 ################################################################
5765 01:57:38.821898
5766 01:57:39.098946 03500000 ################################################################
5767 01:57:39.099102
5768 01:57:39.362954 03580000 ################################################################
5769 01:57:39.363102
5770 01:57:39.629384 03600000 ################################################################
5771 01:57:39.629548
5772 01:57:39.896461 03680000 ################################################################
5773 01:57:39.896643
5774 01:57:40.147032 03700000 ################################################################
5775 01:57:40.147222
5776 01:57:40.400675 03780000 ################################################################
5777 01:57:40.400821
5778 01:57:40.661952 03800000 ################################################################
5779 01:57:40.662098
5780 01:57:40.917377 03880000 ################################################################
5781 01:57:40.917534
5782 01:57:41.171989 03900000 ################################################################
5783 01:57:41.172144
5784 01:57:41.426390 03980000 ################################################################
5785 01:57:41.426545
5786 01:57:41.682568 03a00000 ################################################################
5787 01:57:41.682705
5788 01:57:41.939131 03a80000 ################################################################
5789 01:57:41.939270
5790 01:57:42.195142 03b00000 ################################################################
5791 01:57:42.195292
5792 01:57:42.449792 03b80000 ################################################################
5793 01:57:42.449935
5794 01:57:42.706079 03c00000 ################################################################
5795 01:57:42.706223
5796 01:57:42.961086 03c80000 ################################################################
5797 01:57:42.961226
5798 01:57:43.217169 03d00000 ################################################################
5799 01:57:43.217317
5800 01:57:43.474013 03d80000 ################################################################
5801 01:57:43.474146
5802 01:57:43.632735 03e00000 ######################################## done.
5803 01:57:43.632875
5804 01:57:43.636322 The bootfile was 65338126 bytes long.
5805 01:57:43.636417
5806 01:57:43.639461 Sending tftp read request... done.
5807 01:57:43.639554
5808 01:57:43.639627 Waiting for the transfer...
5809 01:57:43.639695
5810 01:57:43.642825 00000000 # done.
5811 01:57:43.642920
5812 01:57:43.649342 Command line loaded dynamically from TFTP file: 14479180/tftp-deploy-w_t3ps90/kernel/cmdline
5813 01:57:43.649440
5814 01:57:43.668883 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5815 01:57:43.669001
5816 01:57:43.669075 Loading FIT.
5817 01:57:43.669142
5818 01:57:43.672207 Image ramdisk-1 has 52153486 bytes.
5819 01:57:43.672315
5820 01:57:43.675447 Image fdt-1 has 57695 bytes.
5821 01:57:43.675539
5822 01:57:43.678490 Image kernel-1 has 13124896 bytes.
5823 01:57:43.678609
5824 01:57:43.685650 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5825 01:57:43.685742
5826 01:57:43.698444 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5827 01:57:43.698540
5828 01:57:43.705082 Choosing best match conf-1 for compat google,juniper-sku16.
5829 01:57:43.705175
5830 01:57:43.711835 Connected to device vid:did:rid of 1ae0:0028:00
5831 01:57:43.719164
5832 01:57:43.722199 tpm_get_response: command 0x17b, return code 0x0
5833 01:57:43.722319
5834 01:57:43.725687 tpm_cleanup: add release locality here.
5835 01:57:43.725811
5836 01:57:43.728670 Shutting down all USB controllers.
5837 01:57:43.728789
5838 01:57:43.732136 Removing current net device
5839 01:57:43.732261
5840 01:57:43.735367 Exiting depthcharge with code 4 at timestamp: 53854742
5841 01:57:43.735486
5842 01:57:43.742197 LZMA decompressing kernel-1 to 0x80193568
5843 01:57:43.742289
5844 01:57:43.745113 LZMA decompressing kernel-1 to 0x40000000
5845 01:57:45.609938
5846 01:57:45.610458 jumping to kernel
5847 01:57:45.612409 end: 2.2.4 bootloader-commands (duration 00:00:39) [common]
5848 01:57:45.612898 start: 2.2.5 auto-login-action (timeout 00:04:00) [common]
5849 01:57:45.613273 Setting prompt string to ['Linux version [0-9]']
5850 01:57:45.613673 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5851 01:57:45.614026 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5852 01:57:45.685170
5853 01:57:45.688043 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5854 01:57:45.692031 start: 2.2.5.1 login-action (timeout 00:04:00) [common]
5855 01:57:45.692510 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5856 01:57:45.692876 Setting prompt string to []
5857 01:57:45.693254 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5858 01:57:45.693662 Using line separator: #'\n'#
5859 01:57:45.693973 No login prompt set.
5860 01:57:45.694286 Parsing kernel messages
5861 01:57:45.694569 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5862 01:57:45.695060 [login-action] Waiting for messages, (timeout 00:04:00)
5863 01:57:45.695389 Waiting using forced prompt support (timeout 00:02:00)
5864 01:57:45.710876 [ 0.000000] Linux version 6.1.94-cip23 (KernelCI@build-j239242-arm64-gcc-10-defconfig-arm64-chromebook-c5lwc) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Fri Jun 21 00:04:56 UTC 2024
5865 01:57:45.714121 [ 0.000000] random: crng init done
5866 01:57:45.720708 [ 0.000000] Machine model: Google juniper sku16 board
5867 01:57:45.724006 [ 0.000000] efi: UEFI not found.
5868 01:57:45.730383 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5869 01:57:45.740422 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5870 01:57:45.747151 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5871 01:57:45.750046 [ 0.000000] printk: bootconsole [mtk8250] enabled
5872 01:57:45.759720 [ 0.000000] NUMA: No NUMA configuration found
5873 01:57:45.766379 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5874 01:57:45.772696 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5875 01:57:45.773269 [ 0.000000] Zone ranges:
5876 01:57:45.779133 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5877 01:57:45.782529 [ 0.000000] DMA32 empty
5878 01:57:45.788977 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5879 01:57:45.792264 [ 0.000000] Movable zone start for each node
5880 01:57:45.795630 [ 0.000000] Early memory node ranges
5881 01:57:45.802026 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5882 01:57:45.808615 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5883 01:57:45.814865 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5884 01:57:45.821592 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5885 01:57:45.828305 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5886 01:57:45.834405 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5887 01:57:45.851862 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5888 01:57:45.858137 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5889 01:57:45.864768 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5890 01:57:45.867980 [ 0.000000] psci: probing for conduit method from DT.
5891 01:57:45.874821 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5892 01:57:45.878040 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5893 01:57:45.884437 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5894 01:57:45.887632 [ 0.000000] psci: SMC Calling Convention v1.1
5895 01:57:45.894171 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5896 01:57:45.897542 [ 0.000000] Detected VIPT I-cache on CPU0
5897 01:57:45.904263 [ 0.000000] CPU features: detected: GIC system register CPU interface
5898 01:57:45.911065 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5899 01:57:45.917314 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5900 01:57:45.923614 [ 0.000000] CPU features: detected: ARM erratum 845719
5901 01:57:45.926941 [ 0.000000] alternatives: applying boot alternatives
5902 01:57:45.933329 [ 0.000000] Fallback order for Node 0: 0
5903 01:57:45.940073 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5904 01:57:45.943283 [ 0.000000] Policy zone: Normal
5905 01:57:45.959839 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5906 01:57:45.972642 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5907 01:57:45.982553 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5908 01:57:45.989341 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5909 01:57:45.995553 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5910 01:57:46.002086 <6>[ 0.000000] software IO TLB: area num 8.
5911 01:57:46.026551 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5912 01:57:46.084664 <6>[ 0.000000] Memory: 3864144K/4191232K available (18112K kernel code, 4120K rwdata, 22648K rodata, 8512K init, 616K bss, 294320K reserved, 32768K cma-reserved)
5913 01:57:46.090923 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5914 01:57:46.097711 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5915 01:57:46.101092 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5916 01:57:46.107337 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5917 01:57:46.113958 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5918 01:57:46.120514 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5919 01:57:46.127012 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5920 01:57:46.133377 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5921 01:57:46.139653 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5922 01:57:46.149780 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5923 01:57:46.156207 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5924 01:57:46.159667 <6>[ 0.000000] GICv3: 640 SPIs implemented
5925 01:57:46.163005 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5926 01:57:46.169503 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5927 01:57:46.172555 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5928 01:57:46.179137 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5929 01:57:46.192096 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5930 01:57:46.205326 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5931 01:57:46.211567 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5932 01:57:46.221696 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5933 01:57:46.234939 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5934 01:57:46.241472 <6>[ 0.000001] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5935 01:57:46.248682 <6>[ 0.009482] Console: colour dummy device 80x25
5936 01:57:46.251919 <6>[ 0.014523] printk: console [tty1] enabled
5937 01:57:46.264786 <6>[ 0.018913] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5938 01:57:46.268334 <6>[ 0.029378] pid_max: default: 32768 minimum: 301
5939 01:57:46.274740 <6>[ 0.034260] LSM: Security Framework initializing
5940 01:57:46.281339 <6>[ 0.039173] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5941 01:57:46.287513 <6>[ 0.046796] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5942 01:57:46.294760 <4>[ 0.055653] cacheinfo: Unable to detect cache hierarchy for CPU 0
5943 01:57:46.304821 <6>[ 0.062279] cblist_init_generic: Setting adjustable number of callback queues.
5944 01:57:46.311280 <6>[ 0.069726] cblist_init_generic: Setting shift to 3 and lim to 1.
5945 01:57:46.317744 <6>[ 0.076078] cblist_init_generic: Setting adjustable number of callback queues.
5946 01:57:46.324066 <6>[ 0.083523] cblist_init_generic: Setting shift to 3 and lim to 1.
5947 01:57:46.327582 <6>[ 0.089923] rcu: Hierarchical SRCU implementation.
5948 01:57:46.333806 <6>[ 0.094949] rcu: Max phase no-delay instances is 1000.
5949 01:57:46.342348 <6>[ 0.102885] EFI services will not be available.
5950 01:57:46.345296 <6>[ 0.107837] smp: Bringing up secondary CPUs ...
5951 01:57:46.355941 <6>[ 0.113134] Detected VIPT I-cache on CPU1
5952 01:57:46.362482 <4>[ 0.113180] cacheinfo: Unable to detect cache hierarchy for CPU 1
5953 01:57:46.369069 <6>[ 0.113189] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5954 01:57:46.375370 <6>[ 0.113222] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5955 01:57:46.378621 <6>[ 0.113704] Detected VIPT I-cache on CPU2
5956 01:57:46.385508 <4>[ 0.113738] cacheinfo: Unable to detect cache hierarchy for CPU 2
5957 01:57:46.392038 <6>[ 0.113742] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5958 01:57:46.398220 <6>[ 0.113755] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5959 01:57:46.404840 <6>[ 0.114200] Detected VIPT I-cache on CPU3
5960 01:57:46.411402 <4>[ 0.114229] cacheinfo: Unable to detect cache hierarchy for CPU 3
5961 01:57:46.417971 <6>[ 0.114234] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5962 01:57:46.424652 <6>[ 0.114245] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5963 01:57:46.428070 <6>[ 0.114820] CPU features: detected: Spectre-v2
5964 01:57:46.434453 <6>[ 0.114831] CPU features: detected: Spectre-BHB
5965 01:57:46.437528 <6>[ 0.114835] CPU features: detected: ARM erratum 858921
5966 01:57:46.443940 <6>[ 0.114840] Detected VIPT I-cache on CPU4
5967 01:57:46.450405 <4>[ 0.114890] cacheinfo: Unable to detect cache hierarchy for CPU 4
5968 01:57:46.456927 <6>[ 0.114897] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5969 01:57:46.463438 <6>[ 0.114906] arch_timer: Enabling local workaround for ARM erratum 858921
5970 01:57:46.470113 <6>[ 0.114916] arch_timer: CPU4: Trapping CNTVCT access
5971 01:57:46.476434 <6>[ 0.114923] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5972 01:57:46.479955 <6>[ 0.115407] Detected VIPT I-cache on CPU5
5973 01:57:46.486562 <4>[ 0.115448] cacheinfo: Unable to detect cache hierarchy for CPU 5
5974 01:57:46.493040 <6>[ 0.115454] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5975 01:57:46.499504 <6>[ 0.115461] arch_timer: Enabling local workaround for ARM erratum 858921
5976 01:57:46.506029 <6>[ 0.115467] arch_timer: CPU5: Trapping CNTVCT access
5977 01:57:46.512781 <6>[ 0.115472] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5978 01:57:46.515772 <6>[ 0.115907] Detected VIPT I-cache on CPU6
5979 01:57:46.522646 <4>[ 0.115952] cacheinfo: Unable to detect cache hierarchy for CPU 6
5980 01:57:46.528990 <6>[ 0.115958] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5981 01:57:46.535523 <6>[ 0.115966] arch_timer: Enabling local workaround for ARM erratum 858921
5982 01:57:46.541896 <6>[ 0.115972] arch_timer: CPU6: Trapping CNTVCT access
5983 01:57:46.548572 <6>[ 0.115977] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5984 01:57:46.551852 <6>[ 0.116507] Detected VIPT I-cache on CPU7
5985 01:57:46.558409 <4>[ 0.116551] cacheinfo: Unable to detect cache hierarchy for CPU 7
5986 01:57:46.565158 <6>[ 0.116557] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5987 01:57:46.574583 <6>[ 0.116564] arch_timer: Enabling local workaround for ARM erratum 858921
5988 01:57:46.578030 <6>[ 0.116570] arch_timer: CPU7: Trapping CNTVCT access
5989 01:57:46.584697 <6>[ 0.116576] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5990 01:57:46.590898 <6>[ 0.116626] smp: Brought up 1 node, 8 CPUs
5991 01:57:46.594314 <6>[ 0.355511] SMP: Total of 8 processors activated.
5992 01:57:46.600592 <6>[ 0.360448] CPU features: detected: 32-bit EL0 Support
5993 01:57:46.604199 <6>[ 0.365820] CPU features: detected: 32-bit EL1 Support
5994 01:57:46.610909 <6>[ 0.371186] CPU features: detected: CRC32 instructions
5995 01:57:46.613982 <6>[ 0.376613] CPU: All CPU(s) started at EL2
5996 01:57:46.620467 <6>[ 0.380951] alternatives: applying system-wide alternatives
5997 01:57:46.627722 <6>[ 0.388963] devtmpfs: initialized
5998 01:57:46.643918 <6>[ 0.397910] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5999 01:57:46.649923 <6>[ 0.407859] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6000 01:57:46.656709 <6>[ 0.415586] pinctrl core: initialized pinctrl subsystem
6001 01:57:46.660371 <6>[ 0.422682] DMI not present or invalid.
6002 01:57:46.666460 <6>[ 0.427051] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6003 01:57:46.676515 <6>[ 0.433949] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6004 01:57:46.683168 <6>[ 0.441478] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6005 01:57:46.692712 <6>[ 0.449729] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6006 01:57:46.699431 <6>[ 0.457905] audit: initializing netlink subsys (disabled)
6007 01:57:46.705746 <5>[ 0.463609] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
6008 01:57:46.712158 <6>[ 0.464580] thermal_sys: Registered thermal governor 'step_wise'
6009 01:57:46.718902 <6>[ 0.471575] thermal_sys: Registered thermal governor 'power_allocator'
6010 01:57:46.722233 <6>[ 0.477874] cpuidle: using governor menu
6011 01:57:46.728825 <6>[ 0.488839] NET: Registered PF_QIPCRTR protocol family
6012 01:57:46.735593 <6>[ 0.494323] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6013 01:57:46.741790 <6>[ 0.501420] ASID allocator initialised with 32768 entries
6014 01:57:46.748169 <6>[ 0.508187] Serial: AMBA PL011 UART driver
6015 01:57:46.757713 <4>[ 0.518592] Trying to register duplicate clock ID: 113
6016 01:57:46.817109 <6>[ 0.574809] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6017 01:57:46.831754 <6>[ 0.589150] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6018 01:57:46.834614 <6>[ 0.598892] KASLR enabled
6019 01:57:46.849609 <6>[ 0.606928] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6020 01:57:46.856063 <6>[ 0.613930] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6021 01:57:46.862475 <6>[ 0.620407] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6022 01:57:46.868965 <6>[ 0.627397] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6023 01:57:46.875687 <6>[ 0.633870] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6024 01:57:46.882089 <6>[ 0.640860] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6025 01:57:46.888728 <6>[ 0.647333] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6026 01:57:46.895212 <6>[ 0.654323] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6027 01:57:46.901529 <6>[ 0.661887] ACPI: Interpreter disabled.
6028 01:57:46.908742 <6>[ 0.669851] iommu: Default domain type: Translated
6029 01:57:46.915382 <6>[ 0.674957] iommu: DMA domain TLB invalidation policy: strict mode
6030 01:57:46.918855 <5>[ 0.681589] SCSI subsystem initialized
6031 01:57:46.925322 <6>[ 0.686008] usbcore: registered new interface driver usbfs
6032 01:57:46.931918 <6>[ 0.691735] usbcore: registered new interface driver hub
6033 01:57:46.938136 <6>[ 0.697277] usbcore: registered new device driver usb
6034 01:57:46.941696 <6>[ 0.703586] pps_core: LinuxPPS API ver. 1 registered
6035 01:57:46.951677 <6>[ 0.708771] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6036 01:57:46.958029 <6>[ 0.718095] PTP clock support registered
6037 01:57:46.960970 <6>[ 0.722346] EDAC MC: Ver: 3.0.0
6038 01:57:46.964998 <6>[ 0.727981] FPGA manager framework
6039 01:57:46.971020 <6>[ 0.731665] Advanced Linux Sound Architecture Driver Initialized.
6040 01:57:46.974172 <6>[ 0.738417] vgaarb: loaded
6041 01:57:46.981231 <6>[ 0.741536] clocksource: Switched to clocksource arch_sys_counter
6042 01:57:46.987276 <5>[ 0.747967] VFS: Disk quotas dquot_6.6.0
6043 01:57:46.993942 <6>[ 0.752143] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6044 01:57:46.997116 <6>[ 0.759316] pnp: PnP ACPI: disabled
6045 01:57:47.005362 <6>[ 0.766189] NET: Registered PF_INET protocol family
6046 01:57:47.011787 <6>[ 0.771413] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6047 01:57:47.023697 <6>[ 0.781317] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6048 01:57:47.033591 <6>[ 0.790070] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6049 01:57:47.040157 <6>[ 0.798021] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6050 01:57:47.046467 <6>[ 0.806256] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6051 01:57:47.056616 <6>[ 0.814351] TCP: Hash tables configured (established 32768 bind 32768)
6052 01:57:47.063265 <6>[ 0.821179] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6053 01:57:47.069693 <6>[ 0.828151] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6054 01:57:47.076234 <6>[ 0.835633] NET: Registered PF_UNIX/PF_LOCAL protocol family
6055 01:57:47.082823 <6>[ 0.841756] RPC: Registered named UNIX socket transport module.
6056 01:57:47.086064 <6>[ 0.847900] RPC: Registered udp transport module.
6057 01:57:47.093046 <6>[ 0.852825] RPC: Registered tcp transport module.
6058 01:57:47.098957 <6>[ 0.857748] RPC: Registered tcp NFSv4.1 backchannel transport module.
6059 01:57:47.102493 <6>[ 0.864401] PCI: CLS 0 bytes, default 64
6060 01:57:47.105616 <6>[ 0.868689] Unpacking initramfs...
6061 01:57:47.120537 <6>[ 0.878099] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6062 01:57:47.130161 <6>[ 0.886721] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6063 01:57:47.133601 <6>[ 0.895573] kvm [1]: IPA Size Limit: 40 bits
6064 01:57:47.141259 <6>[ 0.901899] kvm [1]: vgic-v2@c420000
6065 01:57:47.147453 <6>[ 0.905714] kvm [1]: GIC system register CPU interface enabled
6066 01:57:47.150719 <6>[ 0.913607] kvm [1]: vgic interrupt IRQ18
6067 01:57:47.157417 <6>[ 0.917974] kvm [1]: Hyp mode initialized successfully
6068 01:57:47.163816 <5>[ 0.924326] Initialise system trusted keyrings
6069 01:57:47.170088 <6>[ 0.929186] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6070 01:57:47.178243 <6>[ 0.939179] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6071 01:57:47.184787 <5>[ 0.945652] NFS: Registering the id_resolver key type
6072 01:57:47.188126 <5>[ 0.950957] Key type id_resolver registered
6073 01:57:47.194676 <5>[ 0.955371] Key type id_legacy registered
6074 01:57:47.201027 <6>[ 0.959674] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6075 01:57:47.207592 <6>[ 0.966597] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6076 01:57:47.213987 <6>[ 0.974348] 9p: Installing v9fs 9p2000 file system support
6077 01:57:47.241970 <5>[ 1.002708] Key type asymmetric registered
6078 01:57:47.245038 <5>[ 1.007054] Asymmetric key parser 'x509' registered
6079 01:57:47.255029 <6>[ 1.012219] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6080 01:57:47.257941 <6>[ 1.019833] io scheduler mq-deadline registered
6081 01:57:47.261391 <6>[ 1.024587] io scheduler kyber registered
6082 01:57:47.284484 <6>[ 1.045384] EINJ: ACPI disabled.
6083 01:57:47.290959 <4>[ 1.049182] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6084 01:57:47.329415 <6>[ 1.090108] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6085 01:57:47.337741 <6>[ 1.098621] printk: console [ttyS0] disabled
6086 01:57:47.365951 <6>[ 1.123269] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6087 01:57:47.372282 <6>[ 1.132742] printk: console [ttyS0] enabled
6088 01:57:47.375273 <6>[ 1.132742] printk: console [ttyS0] enabled
6089 01:57:47.381729 <6>[ 1.141657] printk: bootconsole [mtk8250] disabled
6090 01:57:47.385292 <6>[ 1.141657] printk: bootconsole [mtk8250] disabled
6091 01:57:47.394778 <3>[ 1.152192] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6092 01:57:47.401419 <3>[ 1.160573] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6093 01:57:47.431391 <6>[ 1.188986] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6094 01:57:47.437769 <6>[ 1.198646] serial serial0: tty port ttyS1 registered
6095 01:57:47.444169 <6>[ 1.205232] SuperH (H)SCI(F) driver initialized
6096 01:57:47.450688 <6>[ 1.210781] msm_serial: driver initialized
6097 01:57:47.463854 <6>[ 1.221184] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6098 01:57:47.473288 <6>[ 1.229794] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6099 01:57:47.479815 <6>[ 1.238380] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6100 01:57:47.489570 <6>[ 1.246951] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6101 01:57:47.499391 <6>[ 1.255608] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6102 01:57:47.505980 <6>[ 1.264269] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6103 01:57:47.515807 <6>[ 1.273012] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6104 01:57:47.525333 <6>[ 1.281751] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6105 01:57:47.532279 <6>[ 1.290318] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6106 01:57:47.541844 <6>[ 1.299115] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6107 01:57:47.550500 <4>[ 1.311518] cacheinfo: Unable to detect cache hierarchy for CPU 0
6108 01:57:47.559898 <6>[ 1.320913] loop: module loaded
6109 01:57:47.571820 <6>[ 1.332877] vsim1: Bringing 1800000uV into 2700000-2700000uV
6110 01:57:47.589947 <6>[ 1.350846] megasas: 07.719.03.00-rc1
6111 01:57:47.598507 <6>[ 1.359622] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6112 01:57:47.611545 <6>[ 1.368927] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6113 01:57:47.624399 <6>[ 1.385525] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6114 01:57:47.684730 <6>[ 1.439255] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-a
6115 01:57:48.787802 <6>[ 2.548711] Freeing initrd memory: 50928K
6116 01:57:48.803303 <4>[ 2.560772] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6117 01:57:48.809894 <4>[ 2.570007] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.94-cip23 #1
6118 01:57:48.816489 <4>[ 2.576705] Hardware name: Google juniper sku16 board (DT)
6119 01:57:48.819440 <4>[ 2.582444] Call trace:
6120 01:57:48.822754 <4>[ 2.585144] dump_backtrace.part.0+0xe0/0xf0
6121 01:57:48.825994 <4>[ 2.589680] show_stack+0x18/0x30
6122 01:57:48.832667 <4>[ 2.593253] dump_stack_lvl+0x68/0x84
6123 01:57:48.835731 <4>[ 2.597174] dump_stack+0x18/0x34
6124 01:57:48.839428 <4>[ 2.600745] sysfs_warn_dup+0x64/0x80
6125 01:57:48.842348 <4>[ 2.604666] sysfs_do_create_link_sd+0xf0/0x100
6126 01:57:48.848973 <4>[ 2.609451] sysfs_create_link+0x20/0x40
6127 01:57:48.852344 <4>[ 2.613628] bus_add_device+0x68/0x10c
6128 01:57:48.855450 <4>[ 2.617634] device_add+0x364/0x7cc
6129 01:57:48.858803 <4>[ 2.621378] of_device_add+0x44/0x60
6130 01:57:48.865294 <4>[ 2.625212] of_platform_device_create_pdata+0x90/0x120
6131 01:57:48.868155 <4>[ 2.630694] of_platform_bus_create+0x170/0x370
6132 01:57:48.874722 <4>[ 2.635478] of_platform_populate+0x50/0xfc
6133 01:57:48.878000 <4>[ 2.639915] parse_mtd_partitions+0x1dc/0x510
6134 01:57:48.884845 <4>[ 2.644529] mtd_device_parse_register+0xf0/0x2e4
6135 01:57:48.888024 <4>[ 2.649488] spi_nor_probe+0x21c/0x2f0
6136 01:57:48.891090 <4>[ 2.653494] spi_mem_probe+0x6c/0xb0
6137 01:57:48.894500 <4>[ 2.657326] spi_probe+0x84/0xe4
6138 01:57:48.897964 <4>[ 2.660808] really_probe+0xbc/0x2e0
6139 01:57:48.904515 <4>[ 2.664639] __driver_probe_device+0x78/0x11c
6140 01:57:48.907977 <4>[ 2.669250] driver_probe_device+0xd8/0x160
6141 01:57:48.913793 <4>[ 2.673689] __device_attach_driver+0xb8/0x134
6142 01:57:48.917177 <4>[ 2.678388] bus_for_each_drv+0x78/0xd0
6143 01:57:48.920575 <4>[ 2.682478] __device_attach+0xa8/0x1c0
6144 01:57:48.923850 <4>[ 2.686568] device_initial_probe+0x14/0x20
6145 01:57:48.930265 <4>[ 2.691006] bus_probe_device+0x9c/0xa4
6146 01:57:48.933395 <4>[ 2.695097] device_add+0x3d0/0x7cc
6147 01:57:48.936752 <4>[ 2.698839] __spi_add_device+0x78/0x120
6148 01:57:48.940164 <4>[ 2.703017] spi_add_device+0x40/0x7c
6149 01:57:48.946478 <4>[ 2.706935] spi_register_controller+0x610/0xad0
6150 01:57:48.949670 <4>[ 2.711808] devm_spi_register_controller+0x4c/0xa4
6151 01:57:48.956215 <4>[ 2.716941] mtk_spi_probe+0x3f8/0x650
6152 01:57:48.959454 <4>[ 2.720946] platform_probe+0x68/0xe0
6153 01:57:48.963166 <4>[ 2.724864] really_probe+0xbc/0x2e0
6154 01:57:48.966122 <4>[ 2.728694] __driver_probe_device+0x78/0x11c
6155 01:57:48.972719 <4>[ 2.733305] driver_probe_device+0xd8/0x160
6156 01:57:48.975632 <4>[ 2.737743] __driver_attach+0x94/0x19c
6157 01:57:48.979204 <4>[ 2.741834] bus_for_each_dev+0x70/0xd0
6158 01:57:48.985373 <4>[ 2.745924] driver_attach+0x24/0x30
6159 01:57:48.988970 <4>[ 2.749754] bus_add_driver+0x154/0x20c
6160 01:57:48.992284 <4>[ 2.753844] driver_register+0x78/0x130
6161 01:57:48.998313 <4>[ 2.757935] __platform_driver_register+0x28/0x34
6162 01:57:49.001844 <4>[ 2.762894] mtk_spi_driver_init+0x1c/0x28
6163 01:57:49.005255 <4>[ 2.767249] do_one_initcall+0x50/0x1d0
6164 01:57:49.011394 <4>[ 2.771338] kernel_init_freeable+0x21c/0x288
6165 01:57:49.014747 <4>[ 2.775951] kernel_init+0x24/0x12c
6166 01:57:49.017870 <4>[ 2.779697] ret_from_fork+0x10/0x20
6167 01:57:49.027760 <6>[ 2.788621] tun: Universal TUN/TAP device driver, 1.6
6168 01:57:49.030918 <6>[ 2.794921] thunder_xcv, ver 1.0
6169 01:57:49.037757 <6>[ 2.798438] thunder_bgx, ver 1.0
6170 01:57:49.038195 <6>[ 2.801943] nicpf, ver 1.0
6171 01:57:49.048865 <6>[ 2.806316] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6172 01:57:49.052183 <6>[ 2.813801] hns3: Copyright (c) 2017 Huawei Corporation.
6173 01:57:49.058679 <6>[ 2.819397] hclge is initializing
6174 01:57:49.061747 <6>[ 2.822986] e1000: Intel(R) PRO/1000 Network Driver
6175 01:57:49.068284 <6>[ 2.828121] e1000: Copyright (c) 1999-2006 Intel Corporation.
6176 01:57:49.074882 <6>[ 2.834144] e1000e: Intel(R) PRO/1000 Network Driver
6177 01:57:49.081683 <6>[ 2.839365] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6178 01:57:49.084634 <6>[ 2.845558] igb: Intel(R) Gigabit Ethernet Network Driver
6179 01:57:49.091411 <6>[ 2.851213] igb: Copyright (c) 2007-2014 Intel Corporation.
6180 01:57:49.097854 <6>[ 2.857056] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6181 01:57:49.104170 <6>[ 2.863579] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6182 01:57:49.107428 <6>[ 2.870134] sky2: driver version 1.30
6183 01:57:49.114646 <6>[ 2.875389] usbcore: registered new device driver r8152-cfgselector
6184 01:57:49.120988 <6>[ 2.881931] usbcore: registered new interface driver r8152
6185 01:57:49.127383 <6>[ 2.887767] VFIO - User Level meta-driver version: 0.3
6186 01:57:49.134707 <6>[ 2.895562] mtu3 11201000.usb: uwk - reg:0x420, version:101
6187 01:57:49.144378 <4>[ 2.901434] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6188 01:57:49.147683 <6>[ 2.908716] mtu3 11201000.usb: dr_mode: 1, drd: auto
6189 01:57:49.154435 <6>[ 2.913941] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6190 01:57:49.157502 <6>[ 2.920150] mtu3 11201000.usb: usb3-drd: 0
6191 01:57:49.168117 <6>[ 2.925711] mtu3 11201000.usb: xHCI platform device register success...
6192 01:57:49.174561 <4>[ 2.934360] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6193 01:57:49.181547 <6>[ 2.942293] xhci-mtk 11200000.usb: xHCI Host Controller
6194 01:57:49.191335 <6>[ 2.947798] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6195 01:57:49.194454 <6>[ 2.955521] xhci-mtk 11200000.usb: USB3 root hub has no ports
6196 01:57:49.204069 <6>[ 2.961533] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6197 01:57:49.210827 <6>[ 2.970957] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6198 01:57:49.217202 <6>[ 2.977035] xhci-mtk 11200000.usb: xHCI Host Controller
6199 01:57:49.223738 <6>[ 2.982522] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6200 01:57:49.230197 <6>[ 2.990180] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6201 01:57:49.236891 <6>[ 2.997042] hub 1-0:1.0: USB hub found
6202 01:57:49.240012 <6>[ 3.001071] hub 1-0:1.0: 1 port detected
6203 01:57:49.249696 <6>[ 3.006413] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6204 01:57:49.253172 <6>[ 3.015041] hub 2-0:1.0: USB hub found
6205 01:57:49.259359 <3>[ 3.019068] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6206 01:57:49.266119 <6>[ 3.026954] usbcore: registered new interface driver usb-storage
6207 01:57:49.272917 <6>[ 3.033538] usbcore: registered new device driver onboard-usb-hub
6208 01:57:49.283869 <4>[ 3.041632] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6209 01:57:49.293057 <6>[ 3.053862] mt6397-rtc mt6358-rtc: registered as rtc0
6210 01:57:49.302825 <6>[ 3.059339] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-21T01:57:49 UTC (1718935069)
6211 01:57:49.309299 <6>[ 3.069215] i2c_dev: i2c /dev entries driver
6212 01:57:49.319349 <6>[ 3.075613] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6213 01:57:49.325675 <6>[ 3.083939] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6214 01:57:49.332149 <6>[ 3.092847] i2c 4-0058: Fixed dependency cycle(s) with /panel
6215 01:57:49.338717 <6>[ 3.098878] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6216 01:57:49.357834 <6>[ 3.118416] cpu cpu0: EM: created perf domain
6217 01:57:49.370394 <6>[ 3.123939] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6218 01:57:49.373777 <6>[ 3.135215] cpu cpu4: EM: created perf domain
6219 01:57:49.381315 <6>[ 3.142250] sdhci: Secure Digital Host Controller Interface driver
6220 01:57:49.387857 <6>[ 3.148706] sdhci: Copyright(c) Pierre Ossman
6221 01:57:49.394827 <6>[ 3.154105] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6222 01:57:49.401090 <6>[ 3.154196] Synopsys Designware Multimedia Card Interface Driver
6223 01:57:49.407648 <6>[ 3.166679] sdhci-pltfm: SDHCI platform and OF driver helper
6224 01:57:49.414289 <6>[ 3.175156] ledtrig-cpu: registered to indicate activity on CPUs
6225 01:57:49.422153 <6>[ 3.182926] usbcore: registered new interface driver usbhid
6226 01:57:49.428537 <6>[ 3.188775] usbhid: USB HID core driver
6227 01:57:49.435264 <6>[ 3.193081] spi_master spi2: will run message pump with realtime priority
6228 01:57:49.441607 <4>[ 3.193257] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6229 01:57:49.448342 <4>[ 3.207513] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6230 01:57:49.475933 <6>[ 3.226882] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6231 01:57:49.482406 <4>[ 3.240229] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6232 01:57:49.495135 <6>[ 3.241958] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6233 01:57:49.501903 <4>[ 3.255498] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6234 01:57:49.508932 <6>[ 3.261123] cros-ec-spi spi2.0: Chrome EC device registered
6235 01:57:49.515303 <4>[ 3.271915] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6236 01:57:49.521777 <6>[ 3.282265] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6237 01:57:49.528395 <4>[ 3.288312] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6238 01:57:49.535168 <6>[ 3.295572] mmc0: new HS400 MMC card at address 0001
6239 01:57:49.541097 <6>[ 3.302223] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6240 01:57:49.551649 <6>[ 3.308586] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6241 01:57:49.554761 <6>[ 3.314870] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6242 01:57:49.563041 <6>[ 3.323906] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6243 01:57:49.570167 <6>[ 3.331065] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6244 01:57:49.580419 <6>[ 3.338197] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6245 01:57:49.606609 <6>[ 3.363957] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6246 01:57:49.619413 <6>[ 3.365615] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6247 01:57:49.629218 <6>[ 3.376862] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6248 01:57:49.638873 <6>[ 3.385142] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6249 01:57:49.645359 <6>[ 3.396952] NET: Registered PF_PACKET protocol family
6250 01:57:49.648450 <6>[ 3.410944] 9pnet: Installing 9P2000 support
6251 01:57:49.655159 <5>[ 3.415510] Key type dns_resolver registered
6252 01:57:49.658546 <6>[ 3.420586] registered taskstats version 1
6253 01:57:49.664563 <6>[ 3.421661] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6254 01:57:49.671370 <5>[ 3.424953] Loading compiled-in X.509 certificates
6255 01:57:49.729181 <3>[ 3.486733] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6256 01:57:49.760786 <6>[ 3.515467] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6257 01:57:49.772093 <6>[ 3.529711] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6258 01:57:49.781932 <6>[ 3.538281] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6259 01:57:49.788209 <6>[ 3.547031] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6260 01:57:49.798018 <6>[ 3.555578] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6261 01:57:49.807980 <6>[ 3.564103] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6262 01:57:49.814519 <6>[ 3.572626] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6263 01:57:49.817603 <6>[ 3.580491] hub 1-1:1.0: USB hub found
6264 01:57:49.827636 <6>[ 3.581142] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6265 01:57:49.830716 <6>[ 3.585560] hub 1-1:1.0: 3 ports detected
6266 01:57:49.837201 <6>[ 3.594431] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6267 01:57:49.844251 <6>[ 3.605460] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6268 01:57:49.851434 <6>[ 3.612807] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6269 01:57:49.862217 <6>[ 3.620097] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6270 01:57:49.868681 <6>[ 3.627523] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6271 01:57:49.875227 <6>[ 3.635850] panfrost 13040000.gpu: clock rate = 511999970
6272 01:57:49.885031 <6>[ 3.641555] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6273 01:57:49.894797 <6>[ 3.651672] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6274 01:57:49.901052 <6>[ 3.659687] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6275 01:57:49.914071 <6>[ 3.668125] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6276 01:57:49.920391 <6>[ 3.680203] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6277 01:57:49.932406 <6>[ 3.690313] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6278 01:57:49.942380 <6>[ 3.699096] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6279 01:57:49.951929 <6>[ 3.708246] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6280 01:57:49.961621 <6>[ 3.717376] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6281 01:57:49.968256 <6>[ 3.726503] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6282 01:57:49.978169 <6>[ 3.735804] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6283 01:57:49.987868 <6>[ 3.745105] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6284 01:57:49.997944 <6>[ 3.754580] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6285 01:57:50.007546 <6>[ 3.764055] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6286 01:57:50.017250 <6>[ 3.773181] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6287 01:57:50.087290 <6>[ 3.845044] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6288 01:57:50.097040 <6>[ 3.853944] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6289 01:57:50.107802 <6>[ 3.865577] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6290 01:57:50.127871 <6>[ 3.885557] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6291 01:57:50.804627 <6>[ 4.069896] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6292 01:57:50.811229 <6>[ 4.190161] r8152 1-1.2:1.0: load rtl8153b-2 v1 10/23/19 successfully
6293 01:57:50.817724 <6>[ 4.222637] r8152 1-1.2:1.0 eth0: v1.12.13
6294 01:57:50.824157 <6>[ 4.301570] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6295 01:57:50.830871 <6>[ 4.546099] Console: switching to colour frame buffer device 170x48
6296 01:57:50.837570 <6>[ 4.596176] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6297 01:57:50.859401 <6>[ 4.614290] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6298 01:57:50.879010 <6>[ 4.633786] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6299 01:57:50.889055 <6>[ 4.646787] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6300 01:57:50.895421 <6>[ 4.655020] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6301 01:57:50.908734 <6>[ 4.663551] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6302 01:57:50.929204 <6>[ 4.684095] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6303 01:57:52.072657 <6>[ 5.834049] r8152 1-1.2:1.0 eth0: carrier on
6304 01:57:54.128735 <5>[ 5.857574] Sending DHCP requests .., OK
6305 01:57:54.135070 <6>[ 7.894083] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.22
6306 01:57:54.138192 <6>[ 7.902523] IP-Config: Complete:
6307 01:57:54.151429 <6>[ 7.906094] device=eth0, hwaddr=00:e0:4c:78:85:cb, ipaddr=192.168.201.22, mask=255.255.255.0, gw=192.168.201.1
6308 01:57:54.161290 <6>[ 7.916994] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2, domain=lava-rack, nis-domain=(none)
6309 01:57:54.167756 <6>[ 7.926476] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6310 01:57:54.177054 <6>[ 7.926486] nameserver0=192.168.201.1
6311 01:57:54.185313 <6>[ 7.946683] clk: Disabling unused clocks
6312 01:57:54.190617 <6>[ 7.954941] ALSA device list:
6313 01:57:54.199712 <6>[ 7.960964] No soundcards found.
6314 01:57:54.209014 <6>[ 7.970122] Freeing unused kernel memory: 8512K
6315 01:57:54.215934 <6>[ 7.977309] Run /init as init process
6316 01:57:54.246113 <6>[ 8.007400] NET: Registered PF_INET6 protocol family
6317 01:57:54.253071 <6>[ 8.014421] Segment Routing with IPv6
6318 01:57:54.256484 <6>[ 8.019067] In-situ OAM (IOAM) with IPv6
6319 01:57:54.301574 <30>[ 8.033221] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6320 01:57:54.308068 <30>[ 8.068393] systemd[1]: Detected architecture arm64.
6321 01:57:54.308167
6322 01:57:54.314201 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6323 01:57:54.314294
6324 01:57:54.328555 <30>[ 8.089774] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6325 01:57:54.459589 <30>[ 8.217510] systemd[1]: Queued start job for default target graphical.target.
6326 01:57:54.485231 <30>[ 8.243199] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6327 01:57:54.495059 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6328 01:57:54.512504 <30>[ 8.270351] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6329 01:57:54.522037 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6330 01:57:54.541345 <30>[ 8.299305] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6331 01:57:54.552741 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6332 01:57:54.568486 <30>[ 8.326282] systemd[1]: Created slice user.slice - User and Session Slice.
6333 01:57:54.578062 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6334 01:57:54.599579 <30>[ 8.354182] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6335 01:57:54.609125 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6336 01:57:54.631848 <30>[ 8.386573] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6337 01:57:54.642772 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6338 01:57:54.672847 <30>[ 8.417998] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6339 01:57:54.687308 <30>[ 8.445177] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6340 01:57:54.694021 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6341 01:57:54.711774 <30>[ 8.469684] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6342 01:57:54.723772 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6343 01:57:54.739934 <30>[ 8.497821] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6344 01:57:54.753959 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6345 01:57:54.768422 <30>[ 8.529851] systemd[1]: Reached target paths.target - Path Units.
6346 01:57:54.783124 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6347 01:57:54.799774 <30>[ 8.557637] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6348 01:57:54.812144 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6349 01:57:54.827534 <30>[ 8.585712] systemd[1]: Reached target slices.target - Slice Units.
6350 01:57:54.839284 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6351 01:57:54.852482 <30>[ 8.613749] systemd[1]: Reached target swap.target - Swaps.
6352 01:57:54.863247 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6353 01:57:54.883959 <30>[ 8.641772] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6354 01:57:54.897297 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6355 01:57:54.916407 <30>[ 8.674183] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6356 01:57:54.930150 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6357 01:57:54.949333 <30>[ 8.707398] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6358 01:57:54.962996 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6359 01:57:54.980374 <30>[ 8.738428] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6360 01:57:54.994451 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6361 01:57:55.012362 <30>[ 8.770348] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6362 01:57:55.024658 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6363 01:57:55.044530 <30>[ 8.802555] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6364 01:57:55.058080 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6365 01:57:55.076671 <30>[ 8.834473] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6366 01:57:55.089721 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6367 01:57:55.108209 <30>[ 8.866202] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6368 01:57:55.120907 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6369 01:57:55.172330 <30>[ 8.930130] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6370 01:57:55.182475 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6371 01:57:55.203518 <30>[ 8.961017] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6372 01:57:55.214806 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6373 01:57:55.237970 <30>[ 8.995554] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6374 01:57:55.250911 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6375 01:57:55.274789 <30>[ 9.026268] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6376 01:57:55.297582 <30>[ 9.055582] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6377 01:57:55.310690 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6378 01:57:55.364892 <30>[ 9.122707] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6379 01:57:55.378365 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6380 01:57:55.401821 <30>[ 9.159497] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6381 01:57:55.418356 Startin<6>[ 9.173191] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6382 01:57:55.424615 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6383 01:57:55.446045 <30>[ 9.204042] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6384 01:57:55.459053 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6385 01:57:55.508875 <30>[ 9.266727] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6386 01:57:55.520990 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6387 01:57:55.545824 <30>[ 9.303731] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6388 01:57:55.556847 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6389 01:57:55.616669 <30>[ 9.374499] systemd[1]: Starting systemd-journald.service - Journal Service...
6390 01:57:55.627641 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6391 01:57:55.648485 <30>[ 9.406294] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6392 01:57:55.659355 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6393 01:57:55.682704 <30>[ 9.437374] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6394 01:57:55.694339 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6395 01:57:55.713888 <30>[ 9.471610] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6396 01:57:55.723915 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6397 01:57:55.747016 <30>[ 9.505079] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6398 01:57:55.757903 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6399 01:57:55.779725 <30>[ 9.537609] systemd[1]: Started systemd-journald.service - Journal Service.
6400 01:57:55.789822 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6401 01:57:55.809787 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6402 01:57:55.832582 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6403 01:57:55.852360 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6404 01:57:55.872970 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6405 01:57:55.898566 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6406 01:57:55.921980 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6407 01:57:55.942571 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6408 01:57:55.963126 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6409 01:57:55.982742 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6410 01:57:56.005575 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6411 01:57:56.029236 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6412 01:57:56.051187 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6413 01:57:56.068895 See 'systemctl status systemd-remount-fs.service' for details.
6414 01:57:56.082203 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6415 01:57:56.104647 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6416 01:57:56.152528 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6417 01:57:56.178441 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6418 01:57:56.190774 <46>[ 9.948484] systemd-journald[201]: Received client request to flush runtime journal.
6419 01:57:56.205348 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6420 01:57:56.233979 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6421 01:57:56.260157 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6422 01:57:56.281074 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6423 01:57:56.302723 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6424 01:57:56.322188 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6425 01:57:56.341690 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6426 01:57:56.361892 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6427 01:57:56.400944 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6428 01:57:56.436706 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6429 01:57:56.457281 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6430 01:57:56.476630 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6431 01:57:56.521483 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6432 01:57:56.546483 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6433 01:57:56.569133 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6434 01:57:56.596749 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6435 01:57:56.615417 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6436 01:57:56.633218 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6437 01:57:56.661262 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6438 01:57:56.680811 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6439 01:57:56.701876 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6440 01:57:56.824353 <6>[ 10.581822] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6441 01:57:56.831730 <3>[ 10.592383] thermal_sys: Failed to find 'trips' node
6442 01:57:56.841296 <3>[ 10.598389] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6443 01:57:56.851189 <3>[ 10.599507] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6444 01:57:56.857559 <3>[ 10.605859] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6445 01:57:56.864380 <3>[ 10.615719] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6446 01:57:56.874035 <4>[ 10.624148] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6447 01:57:56.877480 <3>[ 10.628187] thermal_sys: Failed to find 'trips' node
6448 01:57:56.890205 <3>[ 10.630946] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6449 01:57:56.896780 <3>[ 10.638518] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6450 01:57:56.903407 <3>[ 10.643726] elan_i2c 2-0015: Error applying setting, reverse things back
6451 01:57:56.909879 <4>[ 10.654269] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6452 01:57:56.919904 <3>[ 10.654741] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6453 01:57:56.923060 <6>[ 10.655155] mc: Linux media interface: v0.10
6454 01:57:56.932796 <3>[ 10.662698] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6455 01:57:56.939204 <4>[ 10.667008] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6456 01:57:56.949020 <4>[ 10.668967] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6457 01:57:56.958750 <4>[ 10.673209] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6458 01:57:56.968885 <3>[ 10.676292] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6459 01:57:56.971996 <3>[ 10.691195] mtk-scp 10500000.scp: invalid resource
6460 01:57:56.985896 <6>[ 10.697953] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6461 01:57:56.992105 <3>[ 10.698712] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6462 01:57:57.004820 <6>[ 10.700451] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6463 01:57:57.011673 <6>[ 10.706282] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6464 01:57:57.017929 <6>[ 10.712319] videodev: Linux video capture interface: v2.00
6465 01:57:57.024812 <3>[ 10.727536] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6466 01:57:57.034625 <5>[ 10.744124] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6467 01:57:57.041302 <3>[ 10.749913] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6468 01:57:57.047612 <6>[ 10.750498] remoteproc remoteproc0: scp is available
6469 01:57:57.057632 <4>[ 10.750620] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6470 01:57:57.060603 <6>[ 10.750628] remoteproc remoteproc0: powering up scp
6471 01:57:57.070977 <4>[ 10.750655] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6472 01:57:57.077531 <3>[ 10.750660] remoteproc remoteproc0: request_firmware failed: -2
6473 01:57:57.090600 <3>[ 10.750675] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6474 01:57:57.097224 <5>[ 10.770028] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6475 01:57:57.106609 <6>[ 10.773512] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6476 01:57:57.113426 <3>[ 10.777622] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6477 01:57:57.123958 <6>[ 10.782814] cs_system_cfg: CoreSight Configuration manager initialised
6478 01:57:57.130536 <5>[ 10.783903] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6479 01:57:57.140582 <3>[ 10.791877] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6480 01:57:57.147052 <4>[ 10.799919] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6481 01:57:57.157535 <3>[ 10.808391] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6482 01:57:57.167601 <6>[ 10.813452] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6483 01:57:57.174215 <6>[ 10.813610] cfg80211: failed to load regulatory.db
6484 01:57:57.181081 <3>[ 10.822574] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6485 01:57:57.190888 <6>[ 10.836352] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6486 01:57:57.197191 <6>[ 10.846057] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6487 01:57:57.203935 <6>[ 10.857733] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6488 01:57:57.207224 <6>[ 10.865135] Bluetooth: Core ver 2.22
6489 01:57:57.218478 <6>[ 10.865524] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6490 01:57:57.224999 <6>[ 10.865574] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6491 01:57:57.236006 <6>[ 10.865996] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6492 01:57:57.246519 <6>[ 10.866213] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6493 01:57:57.256379 <6>[ 10.880042] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6494 01:57:57.269533 <6>[ 10.882068] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6495 01:57:57.276391 <6>[ 10.882448] NET: Registered PF_BLUETOOTH protocol family
6496 01:57:57.286886 <6>[ 10.882453] Bluetooth: HCI device and connection manager initialized
6497 01:57:57.293566 <6>[ 10.882468] Bluetooth: HCI socket layer initialized
6498 01:57:57.300336 <6>[ 10.882474] Bluetooth: L2CAP socket layer initialized
6499 01:57:57.306875 <6>[ 10.882486] Bluetooth: SCO socket layer initialized
6500 01:57:57.320549 <3>[ 10.882928] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6501 01:57:57.331537 <3>[ 10.884697] debugfs: File 'Playback' in directory 'dapm' already present!
6502 01:57:57.338065 <3>[ 10.884714] debugfs: File 'Capture' in directory 'dapm' already present!
6503 01:57:57.352809 <6>[ 10.886022] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6504 01:57:57.362524 <6>[ 10.889375] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6505 01:57:57.369297 <6>[ 10.897385] usbcore: registered new interface driver uvcvideo
6506 01:57:57.379032 <6>[ 10.914614] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6507 01:57:57.391483 <6>[ 10.914727] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6508 01:57:57.401112 <6>[ 10.925057] Bluetooth: HCI UART driver ver 2.3
6509 01:57:57.413846 <6>[ 10.936979] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6510 01:57:57.423459 <6>[ 10.939165] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6511 01:57:57.432624 <6>[ 10.939173] Bluetooth: HCI UART protocol H4 registered
6512 01:57:57.442807 <6>[ 10.939208] Bluetooth: HCI UART protocol LL registered
6513 01:57:57.453602 <6>[ 10.939221] Bluetooth: HCI UART protocol Three-wire (H5) registered
6514 01:57:57.463746 <6>[ 10.939558] Bluetooth: HCI UART protocol Broadcom registered
6515 01:57:57.473089 <6>[ 10.939587] Bluetooth: HCI UART protocol QCA registered
6516 01:57:57.481260 <6>[ 10.939600] Bluetooth: HCI UART protocol Marvell registered
6517 01:57:57.489949 <6>[ 10.941022] Bluetooth: hci0: setting up ROME/QCA6390
6518 01:57:57.500863 <6>[ 10.947794] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6519 01:57:57.511441 <6>[ 10.955731] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6520 01:57:57.524952 <6>[ 10.962394] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6521 01:57:57.534638 <4>[ 11.133938] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6522 01:57:57.537582 <4>[ 11.133938] Fallback method does not support PEC.
6523 01:57:57.546950 <3>[ 11.173138] Bluetooth: hci0: Frame reassembly failed (-84)
6524 01:57:57.559914 <3>[ 11.173524] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6525 01:57:57.571011 <3>[ 11.279667] power_supply sbs-12-000b: driver failed to report `technology' property: -6
6526 01:57:57.581913 <6>[ 11.284326] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6527 01:57:57.677940 [[0;32m OK [0m] Created slice [0;1;39msyste<3>[ 11.434449] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6528 01:57:57.688157 m-syste…- Slic<3>[ 11.439855] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6529 01:57:57.695699 e /system/system<3>[ 11.449652] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6530 01:57:57.698747 d-backlight.
6531 01:57:57.705503 <3>[ 11.458960] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6532 01:57:57.712022 <6>[ 11.463602] Bluetooth: hci0: QCA Product ID :0x00000008
6533 01:57:57.722644 <3>[ 11.479404] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6534 01:57:57.729620 <6>[ 11.480350] Bluetooth: hci0: QCA SOC Version :0x00000044
6535 01:57:57.736427 <3>[ 11.494191] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6536 01:57:57.743889 <6>[ 11.494260] Bluetooth: hci0: QCA ROM Version :0x00000302
6537 01:57:57.750152 <3>[ 11.507989] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6538 01:57:57.757504 <6>[ 11.508164] Bluetooth: hci0: QCA Patch Version:0x00000111
6539 01:57:57.766961 <3>[ 11.522388] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6540 01:57:57.770763 <6>[ 11.523797] Bluetooth: hci0: QCA controller version 0x00440302
6541 01:57:57.778984 <6>[ 11.523803] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6542 01:57:57.808308 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6543 01:57:57.848390 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6544 01:57:57.873105 <6>[ 11.630885] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6545 01:57:57.889328 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6546 01:57:57.911587 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6547 01:57:57.954263 [[0;32m OK [0m] Started [0;<4>[ 11.714556] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6548 01:57:57.964644 1;39msystemd-networkd.service[0m - Network Configuration.
6549 01:57:57.975502 <4>[ 11.733544] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6550 01:57:57.990490 <4>[ 11.748457] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6551 01:57:58.003080 [[0;32m OK [<4>[ 11.761977] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6552 01:57:58.011726 0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6553 01:57:58.028243 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6554 01:57:58.048281 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6555 01:57:58.064513 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6556 01:57:58.082141 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6557 01:57:58.101732 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6558 01:57:58.118135 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6559 01:57:58.134729 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6560 01:57:58.150519 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6561 01:57:58.167005 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6562 01:57:58.183735 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6563 01:57:58.238024 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6564 01:57:58.264867 <6>[ 12.022462] Bluetooth: hci0: QCA Downloading qca/nvm_00440302_i2s.bin
6565 01:57:58.275166 <4>[ 12.029930] bluetooth hci0: Direct firmware load for qca/nvm_00440302_i2s.bin failed with error -2
6566 01:57:58.284619 Startin<3>[ 12.039818] Bluetooth: hci0: QCA Failed to request file: qca/nvm_00440302_i2s.bin (-2)
6567 01:57:58.291243 g [0;1;39msyste<3>[ 12.049471] Bluetooth: hci0: QCA Failed to download NVM (-2)
6568 01:57:58.294703 md-logind.se…ice[0m - User Login Management...
6569 01:57:58.364386 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6570 01:57:58.381221 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6571 01:57:58.417981 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6572 01:57:58.491848 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6573 01:57:58.511449 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6574 01:57:58.528443 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6575 01:57:58.569876 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6576 01:57:58.590250 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6577 01:57:58.610741 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6578 01:57:58.633554 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6579 01:57:58.651639 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6580 01:57:58.709426 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6581 01:57:58.743023 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6582 01:57:58.780584
6583 01:57:58.783601 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6584 01:57:58.783817
6585 01:57:58.787123 debian-bookworm-arm64 login: root (automatic login)
6586 01:57:58.787243
6587 01:57:58.811942 Linux debian-bookworm-arm64 6.1.94-cip23 #1 SMP PREEMPT Fri Jun 21 00:04:56 UTC 2024 aarch64
6588 01:57:58.812048
6589 01:57:58.818380 The programs included with the Debian GNU/Linux system are free software;
6590 01:57:58.824614 the exact distribution terms for each program are described in the
6591 01:57:58.828354 individual files in /usr/share/doc/*/copyright.
6592 01:57:58.828446
6593 01:57:58.834509 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6594 01:57:58.837692 permitted by applicable law.
6595 01:57:58.838257 Matched prompt #10: / #
6597 01:57:58.838486 Setting prompt string to ['/ #']
6598 01:57:58.838592 end: 2.2.5.1 login-action (duration 00:00:13) [common]
6600 01:57:58.838809 end: 2.2.5 auto-login-action (duration 00:00:13) [common]
6601 01:57:58.838905 start: 2.2.6 expect-shell-connection (timeout 00:03:47) [common]
6602 01:57:58.838983 Setting prompt string to ['/ #']
6603 01:57:58.839051 Forcing a shell prompt, looking for ['/ #']
6605 01:57:58.889330 / #
6606 01:57:58.889462 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6607 01:57:58.889561 Waiting using forced prompt support (timeout 00:02:30)
6608 01:57:58.894754
6609 01:57:58.895046 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6610 01:57:58.895155 start: 2.2.7 export-device-env (timeout 00:03:47) [common]
6611 01:57:58.895254 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6612 01:57:58.895353 end: 2.2 depthcharge-retry (duration 00:01:13) [common]
6613 01:57:58.895445 end: 2 depthcharge-action (duration 00:01:13) [common]
6614 01:57:58.895539 start: 3 lava-test-retry (timeout 00:05:00) [common]
6615 01:57:58.895636 start: 3.1 lava-test-shell (timeout 00:05:00) [common]
6616 01:57:58.895720 Using namespace: common
6618 01:57:58.996057 / # #
6619 01:57:58.996197 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:05:00)
6620 01:57:59.000884 #
6621 01:57:59.001159 Using /lava-14479180
6623 01:57:59.101486 / # export SHELL=/bin/sh
6624 01:57:59.106802 export SHELL=/bin/sh
6626 01:57:59.207323 / # . /lava-14479180/environment
6627 01:57:59.212679 . /lava-14479180/environment
6629 01:57:59.313247 / # /lava-14479180/bin/lava-test-runner /lava-14479180/0
6630 01:57:59.313385 Test shell timeout: 10s (minimum of the action and connection timeout)
6631 01:57:59.318589 /lava-14479180/bin/lava-test-runner /lava-14479180/0
6632 01:57:59.341593 + export TESTRUN_ID=0_cros-ec
6633 01:57:59.348470 + c<8>[ 13.108083] <LAVA_SIGNAL_STARTRUN 0_cros-ec 14479180_1.5.2.3.1>
6634 01:57:59.348747 Received signal: <STARTRUN> 0_cros-ec 14479180_1.5.2.3.1
6635 01:57:59.348828 Starting test lava.0_cros-ec (14479180_1.5.2.3.1)
6636 01:57:59.348917 Skipping test definition patterns.
6637 01:57:59.351391 d /lava-14479180/0/tests/0_cros-ec
6638 01:57:59.354619 + cat uuid
6639 01:57:59.354712 + UUID=14479180_1.5.2.3.1
6640 01:57:59.357972 + set +x
6641 01:57:59.360954 + python3 -m cros.runners.lava_runner -v
6642 01:57:59.960107 test_cros_ec_accel_iio_abi (cros.tests.cros_ec_accel.TestCrosECAccel.test_cros_ec_accel_iio_abi)
6643 01:57:59.966407 Checks the cros-ec accelerometer IIO ABI. ... skipped 'No cros-ec-accel found'
6644 01:57:59.966527
6645 01:57:59.976323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_accel_iio_abi RESULT=skip>
6646 01:57:59.976615 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_accel_iio_abi RESULT=skip
6648 01:57:59.986049 test_cros_ec_accel_iio_data_is_valid (cros.tests.cros_ec_accel.TestCrosECAccel.test_cros_ec_accel_iio_data_is_valid)
6649 01:57:59.995709 Validates accelerometer data by computing the magnitude. If the ... skipped 'No accelerometer found'
6650 01:57:59.995826
6651 01:58:00.002199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_accel_iio_data_is_valid RESULT=skip>
6652 01:58:00.002484 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_accel_iio_data_is_valid RESULT=skip
6654 01:58:00.011979 test_cros_ec_gyro_iio_abi (cros.tests.cros_ec_gyro.TestCrosECGyro.test_cros_ec_gyro_iio_abi)
6655 01:58:00.018790 Checks the cros-ec gyroscope IIO ABI. ... skipped 'No cros-ec-gyro found'
6656 01:58:00.018871
6657 01:58:00.025149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_gyro_iio_abi RESULT=skip>
6658 01:58:00.025437 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_gyro_iio_abi RESULT=skip
6660 01:58:00.031583 test_cros_ec_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_abi)
6661 01:58:00.037808 Checks the standard ABI for the main Embedded Controller. ... ok
6662 01:58:00.037914
6663 01:58:00.044594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_abi RESULT=pass>
6664 01:58:00.044893 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_abi RESULT=pass
6666 01:58:00.054313 test_cros_ec_chardev (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_chardev)
6667 01:58:00.057681 Checks the main Embedded controller character device. ... ok
6668 01:58:00.057791
6669 01:58:00.064068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_chardev RESULT=pass>
6670 01:58:00.064355 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_chardev RESULT=pass
6672 01:58:00.073804 test_cros_ec_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_hello)
6673 01:58:00.080373 Checks basic comunication with the main Embedded controller. ... ok
6674 01:58:00.080458
6675 01:58:00.083638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_hello RESULT=pass>
6676 01:58:00.083921 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_hello RESULT=pass
6678 01:58:00.089987 test_cros_fp_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_abi)
6679 01:58:00.099809 Checks the standard ABI for the Fingerprint EC. ... skipped 'MCU cros_fp not supported'
6680 01:58:00.099900
6681 01:58:00.106365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_abi RESULT=skip>
6682 01:58:00.106650 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_abi RESULT=skip
6684 01:58:00.112812 test_cros_fp_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_hello)
6685 01:58:00.122416 Checks basic comunication with the fingerprint controller. ... skipped 'MCU cros_fp not found'
6686 01:58:00.122502
6687 01:58:00.125810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_hello RESULT=skip>
6688 01:58:00.126059 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_hello RESULT=skip
6690 01:58:00.135741 test_cros_fp_reboot (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_reboot)
6691 01:58:00.142070 Test reboot command on Fingerprint MCU. ... skipped 'MCU cros_fp not found'
6692 01:58:00.142188
6693 01:58:00.148585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_reboot RESULT=skip>
6694 01:58:00.148858 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_reboot RESULT=skip
6696 01:58:00.155134 test_cros_pd_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_pd_abi)
6697 01:58:00.161892 Checks the standard ABI for the Power Delivery EC. ... skipped 'MCU cros_pd not supported'
6698 01:58:00.161975
6699 01:58:00.168204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_pd_abi RESULT=skip>
6700 01:58:00.168483 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_pd_abi RESULT=skip
6702 01:58:00.174907 test_cros_pd_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_pd_hello)
6703 01:58:00.184694 Checks basic comunication with the power delivery controller. ... skipped 'MCU cros_pd not found'
6704 01:58:00.184781
6705 01:58:00.191286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_pd_hello RESULT=skip>
6706 01:58:00.191573 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_pd_hello RESULT=skip
6708 01:58:00.197541 test_cros_tp_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_tp_abi)
6709 01:58:00.204219 Checks the standard ABI for the Touchpad EC. ... skipped 'MCU cros_tp not supported'
6710 01:58:00.204333
6711 01:58:00.210979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_tp_abi RESULT=skip>
6712 01:58:00.211232 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_tp_abi RESULT=skip
6714 01:58:00.217308 test_cros_tp_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_tp_hello)
6715 01:58:00.226890 Checks basic comunication with the touchpad controller. ... skipped 'MCU cros_tp not found'
6716 01:58:00.227002
6717 01:58:00.233640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_tp_hello RESULT=skip>
6718 01:58:00.233892 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_tp_hello RESULT=skip
6720 01:58:00.239842 test_cros_ec_pwm_backlight (cros.tests.cros_ec_pwm.TestCrosECPWM.test_cros_ec_pwm_backlight)
6721 01:58:00.249425 Check that the backlight is connected to a pwm of the EC and that ... skipped 'No backlight pwm found'
6722 01:58:00.249526
6723 01:58:00.256097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_pwm_backlight RESULT=skip>
6724 01:58:00.256379 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_pwm_backlight RESULT=skip
6726 01:58:00.265579 test_cros_ec_battery_abi (cros.tests.cros_ec_power.TestCrosECPower.test_cros_ec_battery_abi)
6727 01:58:00.272395 Check the cros battery ABI. ... skipped 'No BAT found'
6728 01:58:00.272477
6729 01:58:00.278825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_battery_abi RESULT=skip>
6730 01:58:00.279075 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_battery_abi RESULT=skip
6732 01:58:00.288596 test_cros_ec_usbpd_charger_abi (cros.tests.cros_ec_power.TestCrosECPower.test_cros_ec_usbpd_charger_abi)
6733 01:58:00.295072 Check the cros USBPD charger ABI. ... skipped 'No CROS_USBPD_CHARGER found'
6734 01:58:00.295183
6735 01:58:00.301438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_usbpd_charger_abi RESULT=skip>
6736 01:58:00.301727 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_usbpd_charger_abi RESULT=skip
6738 01:58:00.307963 test_cros_ec_rtc_abi (cros.tests.cros_ec_rtc.TestCrosECRTC.test_cros_ec_rtc_abi)
6739 01:58:00.314630 Check the cros RTC ABI. ... skipped 'EC_FEATURE_RTC not supported, skipping'
6740 01:58:00.314716
6741 01:58:00.321092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_rtc_abi RESULT=skip>
6742 01:58:00.321374 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_rtc_abi RESULT=skip
6744 01:58:00.330802 test_cros_ec_extcon_usbc_abi (cros.tests.cros_ec_extcon.TestCrosECextcon.test_cros_ec_extcon_usbc_abi)
6745 01:58:00.337614 Checks the cros-ec extcon ABI. ... skipped 'No extcon device found'
6746 01:58:00.337725
6747 01:58:00.343906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_extcon_usbc_abi RESULT=skip>
6748 01:58:00.343995
6749 01:58:00.344242 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_extcon_usbc_abi RESULT=skip
6751 01:58:00.356964 ----------------------------------------------------------<8>[ 14.115204] <LAVA_SIGNAL_ENDRUN 0_cros-ec 14479180_1.5.2.3.1>
6752 01:58:00.357085 ------------
6753 01:58:00.357364 Received signal: <ENDRUN> 0_cros-ec 14479180_1.5.2.3.1
6754 01:58:00.357484 Ending use of test pattern.
6755 01:58:00.357557 Ending test lava.0_cros-ec (14479180_1.5.2.3.1), duration 1.01
6757 01:58:00.360333 Ran 18 tests in 0.348s
6758 01:58:00.360418
6759 01:58:00.360492 OK (skipped=15)
6760 01:58:00.360590 + set +x
6761 01:58:00.363459 <LAVA_TEST_RUNNER EXIT>
6762 01:58:00.363735 ok: lava_test_shell seems to have completed
6763 01:58:00.363930 test_cros_ec_abi: pass
test_cros_ec_accel_iio_abi: skip
test_cros_ec_accel_iio_data_is_valid: skip
test_cros_ec_battery_abi: skip
test_cros_ec_chardev: pass
test_cros_ec_extcon_usbc_abi: skip
test_cros_ec_gyro_iio_abi: skip
test_cros_ec_hello: pass
test_cros_ec_pwm_backlight: skip
test_cros_ec_rtc_abi: skip
test_cros_ec_usbpd_charger_abi: skip
test_cros_fp_abi: skip
test_cros_fp_hello: skip
test_cros_fp_reboot: skip
test_cros_pd_abi: skip
test_cros_pd_hello: skip
test_cros_tp_abi: skip
test_cros_tp_hello: skip
6764 01:58:00.364037 end: 3.1 lava-test-shell (duration 00:00:01) [common]
6765 01:58:00.364129 end: 3 lava-test-retry (duration 00:00:01) [common]
6766 01:58:00.364227 start: 4 finalize (timeout 00:08:21) [common]
6767 01:58:00.364360 start: 4.1 power-off (timeout 00:00:30) [common]
6768 01:58:00.364682 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2', '--port=1', '--command=off']
6769 01:58:01.820032 >> Command sent successfully.
6770 01:58:01.832795 Returned 0 in 1 seconds
6771 01:58:01.934069 end: 4.1 power-off (duration 00:00:02) [common]
6773 01:58:01.935438 start: 4.2 read-feedback (timeout 00:08:19) [common]
6774 01:58:01.936606 Listened to connection for namespace 'common' for up to 1s
6775 01:58:02.937097 Finalising connection for namespace 'common'
6776 01:58:02.937276 Disconnecting from shell: Finalise
6777 01:58:02.937370 / #
6778 01:58:03.037683 end: 4.2 read-feedback (duration 00:00:01) [common]
6779 01:58:03.037852 end: 4 finalize (duration 00:00:03) [common]
6780 01:58:03.037979 Cleaning after the job
6781 01:58:03.038101 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479180/tftp-deploy-w_t3ps90/ramdisk
6782 01:58:03.044117 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479180/tftp-deploy-w_t3ps90/kernel
6783 01:58:03.059649 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479180/tftp-deploy-w_t3ps90/dtb
6784 01:58:03.059913 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479180/tftp-deploy-w_t3ps90/modules
6785 01:58:03.066023 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14479180
6786 01:58:03.170216 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14479180
6787 01:58:03.170406 Job finished correctly