Boot log: mt8183-kukui-jacuzzi-juniper-sku16

    1 01:59:10.201322  lava-dispatcher, installed at version: 2024.03
    2 01:59:10.201547  start: 0 validate
    3 01:59:10.201698  Start time: 2024-06-21 01:59:10.201690+00:00 (UTC)
    4 01:59:10.201834  Using caching service: 'http://localhost/cache/?uri=%s'
    5 01:59:10.201973  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 01:59:10.456123  Using caching service: 'http://localhost/cache/?uri=%s'
    7 01:59:10.456825  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
    8 01:59:10.709896  Using caching service: 'http://localhost/cache/?uri=%s'
    9 01:59:10.710693  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
   10 01:59:10.971151  Using caching service: 'http://localhost/cache/?uri=%s'
   11 01:59:10.971801  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 01:59:11.240919  Using caching service: 'http://localhost/cache/?uri=%s'
   13 01:59:11.241709  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   14 01:59:11.502965  validate duration: 1.30
   16 01:59:11.503268  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 01:59:11.503372  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 01:59:11.503458  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 01:59:11.503577  Not decompressing ramdisk as can be used compressed.
   20 01:59:11.503674  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
   21 01:59:11.503746  saving as /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/ramdisk/initrd.cpio.gz
   22 01:59:11.503813  total size: 5628169 (5 MB)
   23 01:59:11.504950  progress   0 % (0 MB)
   24 01:59:11.506700  progress   5 % (0 MB)
   25 01:59:11.508320  progress  10 % (0 MB)
   26 01:59:11.509777  progress  15 % (0 MB)
   27 01:59:11.511428  progress  20 % (1 MB)
   28 01:59:11.512902  progress  25 % (1 MB)
   29 01:59:11.514540  progress  30 % (1 MB)
   30 01:59:11.516115  progress  35 % (1 MB)
   31 01:59:11.517556  progress  40 % (2 MB)
   32 01:59:11.519135  progress  45 % (2 MB)
   33 01:59:11.520546  progress  50 % (2 MB)
   34 01:59:11.522228  progress  55 % (2 MB)
   35 01:59:11.523874  progress  60 % (3 MB)
   36 01:59:11.525396  progress  65 % (3 MB)
   37 01:59:11.527006  progress  70 % (3 MB)
   38 01:59:11.528414  progress  75 % (4 MB)
   39 01:59:11.530015  progress  80 % (4 MB)
   40 01:59:11.531420  progress  85 % (4 MB)
   41 01:59:11.533000  progress  90 % (4 MB)
   42 01:59:11.534606  progress  95 % (5 MB)
   43 01:59:11.536033  progress 100 % (5 MB)
   44 01:59:11.536238  5 MB downloaded in 0.03 s (165.54 MB/s)
   45 01:59:11.536407  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 01:59:11.536653  end: 1.1 download-retry (duration 00:00:00) [common]
   48 01:59:11.536737  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 01:59:11.536830  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 01:59:11.536969  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
   51 01:59:11.537037  saving as /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/kernel/Image
   52 01:59:11.537098  total size: 54813184 (52 MB)
   53 01:59:11.537159  No compression specified
   54 01:59:11.538283  progress   0 % (0 MB)
   55 01:59:11.552568  progress   5 % (2 MB)
   56 01:59:11.566974  progress  10 % (5 MB)
   57 01:59:11.581376  progress  15 % (7 MB)
   58 01:59:11.596622  progress  20 % (10 MB)
   59 01:59:11.611528  progress  25 % (13 MB)
   60 01:59:11.626005  progress  30 % (15 MB)
   61 01:59:11.640442  progress  35 % (18 MB)
   62 01:59:11.655421  progress  40 % (20 MB)
   63 01:59:11.669574  progress  45 % (23 MB)
   64 01:59:11.684082  progress  50 % (26 MB)
   65 01:59:11.698652  progress  55 % (28 MB)
   66 01:59:11.713057  progress  60 % (31 MB)
   67 01:59:11.728135  progress  65 % (34 MB)
   68 01:59:11.742804  progress  70 % (36 MB)
   69 01:59:11.757484  progress  75 % (39 MB)
   70 01:59:11.772006  progress  80 % (41 MB)
   71 01:59:11.786415  progress  85 % (44 MB)
   72 01:59:11.800802  progress  90 % (47 MB)
   73 01:59:11.815102  progress  95 % (49 MB)
   74 01:59:11.829181  progress 100 % (52 MB)
   75 01:59:11.829466  52 MB downloaded in 0.29 s (178.80 MB/s)
   76 01:59:11.829633  end: 1.2.1 http-download (duration 00:00:00) [common]
   78 01:59:11.829869  end: 1.2 download-retry (duration 00:00:00) [common]
   79 01:59:11.829954  start: 1.3 download-retry (timeout 00:10:00) [common]
   80 01:59:11.830051  start: 1.3.1 http-download (timeout 00:10:00) [common]
   81 01:59:11.830185  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
   82 01:59:11.830253  saving as /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
   83 01:59:11.830313  total size: 57695 (0 MB)
   84 01:59:11.830373  No compression specified
   85 01:59:11.831469  progress  56 % (0 MB)
   86 01:59:11.831764  progress 100 % (0 MB)
   87 01:59:11.831961  0 MB downloaded in 0.00 s (33.43 MB/s)
   88 01:59:11.832097  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 01:59:11.832321  end: 1.3 download-retry (duration 00:00:00) [common]
   91 01:59:11.832405  start: 1.4 download-retry (timeout 00:10:00) [common]
   92 01:59:11.832487  start: 1.4.1 http-download (timeout 00:10:00) [common]
   93 01:59:11.832614  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
   94 01:59:11.832682  saving as /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/nfsrootfs/full.rootfs.tar
   95 01:59:11.832741  total size: 120894716 (115 MB)
   96 01:59:11.832802  Using unxz to decompress xz
   97 01:59:11.836574  progress   0 % (0 MB)
   98 01:59:12.179880  progress   5 % (5 MB)
   99 01:59:12.553763  progress  10 % (11 MB)
  100 01:59:12.921043  progress  15 % (17 MB)
  101 01:59:13.251906  progress  20 % (23 MB)
  102 01:59:13.547404  progress  25 % (28 MB)
  103 01:59:13.923209  progress  30 % (34 MB)
  104 01:59:14.284127  progress  35 % (40 MB)
  105 01:59:14.457898  progress  40 % (46 MB)
  106 01:59:14.644125  progress  45 % (51 MB)
  107 01:59:14.972077  progress  50 % (57 MB)
  108 01:59:15.361897  progress  55 % (63 MB)
  109 01:59:15.718267  progress  60 % (69 MB)
  110 01:59:16.057836  progress  65 % (74 MB)
  111 01:59:16.400786  progress  70 % (80 MB)
  112 01:59:16.769549  progress  75 % (86 MB)
  113 01:59:17.125732  progress  80 % (92 MB)
  114 01:59:17.490659  progress  85 % (98 MB)
  115 01:59:17.870558  progress  90 % (103 MB)
  116 01:59:18.205607  progress  95 % (109 MB)
  117 01:59:18.571547  progress 100 % (115 MB)
  118 01:59:18.576875  115 MB downloaded in 6.74 s (17.10 MB/s)
  119 01:59:18.577185  end: 1.4.1 http-download (duration 00:00:07) [common]
  121 01:59:18.577635  end: 1.4 download-retry (duration 00:00:07) [common]
  122 01:59:18.577755  start: 1.5 download-retry (timeout 00:09:53) [common]
  123 01:59:18.577873  start: 1.5.1 http-download (timeout 00:09:53) [common]
  124 01:59:18.578060  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
  125 01:59:18.578156  saving as /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/modules/modules.tar
  126 01:59:18.578244  total size: 8618924 (8 MB)
  127 01:59:18.578333  Using unxz to decompress xz
  128 01:59:18.582449  progress   0 % (0 MB)
  129 01:59:18.602449  progress   5 % (0 MB)
  130 01:59:18.626879  progress  10 % (0 MB)
  131 01:59:18.652210  progress  15 % (1 MB)
  132 01:59:18.676754  progress  20 % (1 MB)
  133 01:59:18.702386  progress  25 % (2 MB)
  134 01:59:18.727696  progress  30 % (2 MB)
  135 01:59:18.752735  progress  35 % (2 MB)
  136 01:59:18.776732  progress  40 % (3 MB)
  137 01:59:18.801192  progress  45 % (3 MB)
  138 01:59:18.825369  progress  50 % (4 MB)
  139 01:59:18.850281  progress  55 % (4 MB)
  140 01:59:18.874451  progress  60 % (4 MB)
  141 01:59:18.898477  progress  65 % (5 MB)
  142 01:59:18.926849  progress  70 % (5 MB)
  143 01:59:18.952208  progress  75 % (6 MB)
  144 01:59:18.975973  progress  80 % (6 MB)
  145 01:59:18.999526  progress  85 % (7 MB)
  146 01:59:19.023619  progress  90 % (7 MB)
  147 01:59:19.053107  progress  95 % (7 MB)
  148 01:59:19.085321  progress 100 % (8 MB)
  149 01:59:19.090115  8 MB downloaded in 0.51 s (16.06 MB/s)
  150 01:59:19.090448  end: 1.5.1 http-download (duration 00:00:01) [common]
  152 01:59:19.090876  end: 1.5 download-retry (duration 00:00:01) [common]
  153 01:59:19.091015  start: 1.6 prepare-tftp-overlay (timeout 00:09:52) [common]
  154 01:59:19.091161  start: 1.6.1 extract-nfsrootfs (timeout 00:09:52) [common]
  155 01:59:22.976841  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14479219/extract-nfsrootfs-cgh7e9h3
  156 01:59:22.977029  end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
  157 01:59:22.977130  start: 1.6.2 lava-overlay (timeout 00:09:49) [common]
  158 01:59:22.977310  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755
  159 01:59:22.977445  makedir: /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin
  160 01:59:22.977549  makedir: /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/tests
  161 01:59:22.977648  makedir: /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/results
  162 01:59:22.977746  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-add-keys
  163 01:59:22.977888  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-add-sources
  164 01:59:22.978017  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-background-process-start
  165 01:59:22.978144  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-background-process-stop
  166 01:59:22.978269  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-common-functions
  167 01:59:22.978391  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-echo-ipv4
  168 01:59:22.978518  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-install-packages
  169 01:59:22.978640  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-installed-packages
  170 01:59:22.978763  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-os-build
  171 01:59:22.978885  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-probe-channel
  172 01:59:22.979010  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-probe-ip
  173 01:59:22.979132  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-target-ip
  174 01:59:22.979253  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-target-mac
  175 01:59:22.979374  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-target-storage
  176 01:59:22.979497  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-test-case
  177 01:59:22.979618  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-test-event
  178 01:59:22.979739  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-test-feedback
  179 01:59:22.979859  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-test-raise
  180 01:59:22.980000  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-test-reference
  181 01:59:22.980127  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-test-runner
  182 01:59:22.980249  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-test-set
  183 01:59:22.980374  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-test-shell
  184 01:59:22.980497  Updating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-add-keys (debian)
  185 01:59:22.980646  Updating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-add-sources (debian)
  186 01:59:22.980792  Updating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-install-packages (debian)
  187 01:59:22.980931  Updating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-installed-packages (debian)
  188 01:59:22.981069  Updating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/bin/lava-os-build (debian)
  189 01:59:22.981186  Creating /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/environment
  190 01:59:22.981438  LAVA metadata
  191 01:59:22.981507  - LAVA_JOB_ID=14479219
  192 01:59:22.981570  - LAVA_DISPATCHER_IP=192.168.201.1
  193 01:59:22.981670  start: 1.6.2.1 lava-vland-overlay (timeout 00:09:49) [common]
  194 01:59:22.981736  skipped lava-vland-overlay
  195 01:59:22.981809  end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
  196 01:59:22.981886  start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
  197 01:59:22.981945  skipped lava-multinode-overlay
  198 01:59:22.982014  end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  199 01:59:22.982091  start: 1.6.2.3 test-definition (timeout 00:09:49) [common]
  200 01:59:22.982163  Loading test definitions
  201 01:59:22.982250  start: 1.6.2.3.1 inline-repo-action (timeout 00:09:49) [common]
  202 01:59:22.982319  Using /lava-14479219 at stage 0
  203 01:59:22.982597  uuid=14479219_1.6.2.3.1 testdef=None
  204 01:59:22.982684  end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
  205 01:59:22.982767  start: 1.6.2.3.2 test-overlay (timeout 00:09:49) [common]
  206 01:59:22.983214  end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
  208 01:59:22.983433  start: 1.6.2.3.3 test-install-overlay (timeout 00:09:49) [common]
  209 01:59:22.983981  end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
  211 01:59:22.984205  start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
  212 01:59:22.984783  runner path: /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/0/tests/0_timesync-off test_uuid 14479219_1.6.2.3.1
  213 01:59:22.984941  end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  215 01:59:22.985165  start: 1.6.2.3.5 git-repo-action (timeout 00:09:49) [common]
  216 01:59:22.985236  Using /lava-14479219 at stage 0
  217 01:59:22.985380  Fetching tests from https://github.com/kernelci/test-definitions.git
  218 01:59:22.985468  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/0/tests/1_kselftest-arm64'
  219 01:59:25.300697  Running '/usr/bin/git checkout kernelci.org
  220 01:59:25.446841  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/0/tests/1_kselftest-arm64/automated/linux/kselftest/kselftest.yaml
  221 01:59:25.447772  uuid=14479219_1.6.2.3.5 testdef=None
  222 01:59:25.447958  end: 1.6.2.3.5 git-repo-action (duration 00:00:02) [common]
  224 01:59:25.448329  start: 1.6.2.3.6 test-overlay (timeout 00:09:46) [common]
  225 01:59:25.449538  end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
  227 01:59:25.449776  start: 1.6.2.3.7 test-install-overlay (timeout 00:09:46) [common]
  228 01:59:25.450766  end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
  230 01:59:25.451008  start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:46) [common]
  231 01:59:25.451952  runner path: /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/0/tests/1_kselftest-arm64 test_uuid 14479219_1.6.2.3.5
  232 01:59:25.452044  BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
  233 01:59:25.452108  BRANCH='cip'
  234 01:59:25.452166  SKIPFILE='/dev/null'
  235 01:59:25.452223  SKIP_INSTALL='True'
  236 01:59:25.452279  TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
  237 01:59:25.452338  TST_CASENAME=''
  238 01:59:25.452392  TST_CMDFILES='arm64'
  239 01:59:25.452532  end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  241 01:59:25.452740  Creating lava-test-runner.conf files
  242 01:59:25.452865  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14479219/lava-overlay-alx9z755/lava-14479219/0 for stage 0
  243 01:59:25.453005  - 0_timesync-off
  244 01:59:25.453103  - 1_kselftest-arm64
  245 01:59:25.453231  end: 1.6.2.3 test-definition (duration 00:00:02) [common]
  246 01:59:25.453367  start: 1.6.2.4 compress-overlay (timeout 00:09:46) [common]
  247 01:59:33.028805  end: 1.6.2.4 compress-overlay (duration 00:00:08) [common]
  248 01:59:33.028960  start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
  249 01:59:33.029054  end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  250 01:59:33.029153  end: 1.6.2 lava-overlay (duration 00:00:10) [common]
  251 01:59:33.029241  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
  252 01:59:33.198659  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  253 01:59:33.199033  start: 1.6.4 extract-modules (timeout 00:09:38) [common]
  254 01:59:33.199147  extracting modules file /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14479219/extract-nfsrootfs-cgh7e9h3
  255 01:59:33.416954  extracting modules file /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14479219/extract-overlay-ramdisk-_v_01yh8/ramdisk
  256 01:59:33.643138  end: 1.6.4 extract-modules (duration 00:00:00) [common]
  257 01:59:33.643312  start: 1.6.5 apply-overlay-tftp (timeout 00:09:38) [common]
  258 01:59:33.643408  [common] Applying overlay to NFS
  259 01:59:33.643480  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14479219/compress-overlay-lmegk02_/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14479219/extract-nfsrootfs-cgh7e9h3
  260 01:59:34.598236  end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
  261 01:59:34.598414  start: 1.6.6 configure-preseed-file (timeout 00:09:37) [common]
  262 01:59:34.598509  end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
  263 01:59:34.598598  start: 1.6.7 compress-ramdisk (timeout 00:09:37) [common]
  264 01:59:34.598691  Building ramdisk /var/lib/lava/dispatcher/tmp/14479219/extract-overlay-ramdisk-_v_01yh8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14479219/extract-overlay-ramdisk-_v_01yh8/ramdisk
  265 01:59:34.910294  >> 130487 blocks

  266 01:59:36.974860  rename /var/lib/lava/dispatcher/tmp/14479219/extract-overlay-ramdisk-_v_01yh8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/ramdisk/ramdisk.cpio.gz
  267 01:59:36.975307  end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
  268 01:59:36.975443  start: 1.6.8 prepare-kernel (timeout 00:09:35) [common]
  269 01:59:36.975578  start: 1.6.8.1 prepare-fit (timeout 00:09:35) [common]
  270 01:59:36.975720  Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/kernel/Image']
  271 01:59:50.538834  Returned 0 in 13 seconds
  272 01:59:50.639474  mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/kernel/image.itb
  273 01:59:51.010961  output: FIT description: Kernel Image image with one or more FDT blobs
  274 01:59:51.011329  output: Created:         Fri Jun 21 02:59:50 2024
  275 01:59:51.011411  output:  Image 0 (kernel-1)
  276 01:59:51.011477  output:   Description:  
  277 01:59:51.011539  output:   Created:      Fri Jun 21 02:59:50 2024
  278 01:59:51.011604  output:   Type:         Kernel Image
  279 01:59:51.011667  output:   Compression:  lzma compressed
  280 01:59:51.011728  output:   Data Size:    13124896 Bytes = 12817.28 KiB = 12.52 MiB
  281 01:59:51.011786  output:   Architecture: AArch64
  282 01:59:51.011844  output:   OS:           Linux
  283 01:59:51.011902  output:   Load Address: 0x00000000
  284 01:59:51.011959  output:   Entry Point:  0x00000000
  285 01:59:51.012014  output:   Hash algo:    crc32
  286 01:59:51.012068  output:   Hash value:   ab2f7826
  287 01:59:51.012123  output:  Image 1 (fdt-1)
  288 01:59:51.012178  output:   Description:  mt8183-kukui-jacuzzi-juniper-sku16
  289 01:59:51.012234  output:   Created:      Fri Jun 21 02:59:50 2024
  290 01:59:51.012290  output:   Type:         Flat Device Tree
  291 01:59:51.012344  output:   Compression:  uncompressed
  292 01:59:51.012398  output:   Data Size:    57695 Bytes = 56.34 KiB = 0.06 MiB
  293 01:59:51.012451  output:   Architecture: AArch64
  294 01:59:51.012503  output:   Hash algo:    crc32
  295 01:59:51.012556  output:   Hash value:   a9713552
  296 01:59:51.012608  output:  Image 2 (ramdisk-1)
  297 01:59:51.012661  output:   Description:  unavailable
  298 01:59:51.012715  output:   Created:      Fri Jun 21 02:59:50 2024
  299 01:59:51.012768  output:   Type:         RAMDisk Image
  300 01:59:51.012821  output:   Compression:  Unknown Compression
  301 01:59:51.012874  output:   Data Size:    18737520 Bytes = 18298.36 KiB = 17.87 MiB
  302 01:59:51.012927  output:   Architecture: AArch64
  303 01:59:51.013029  output:   OS:           Linux
  304 01:59:51.013121  output:   Load Address: unavailable
  305 01:59:51.013206  output:   Entry Point:  unavailable
  306 01:59:51.013323  output:   Hash algo:    crc32
  307 01:59:51.013393  output:   Hash value:   b8e2512f
  308 01:59:51.013471  output:  Default Configuration: 'conf-1'
  309 01:59:51.013527  output:  Configuration 0 (conf-1)
  310 01:59:51.013582  output:   Description:  mt8183-kukui-jacuzzi-juniper-sku16
  311 01:59:51.013636  output:   Kernel:       kernel-1
  312 01:59:51.013689  output:   Init Ramdisk: ramdisk-1
  313 01:59:51.013742  output:   FDT:          fdt-1
  314 01:59:51.013795  output:   Loadables:    kernel-1
  315 01:59:51.013848  output: 
  316 01:59:51.014048  end: 1.6.8.1 prepare-fit (duration 00:00:14) [common]
  317 01:59:51.014143  end: 1.6.8 prepare-kernel (duration 00:00:14) [common]
  318 01:59:51.014267  end: 1.6 prepare-tftp-overlay (duration 00:00:32) [common]
  319 01:59:51.014367  start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
  320 01:59:51.014447  No LXC device requested
  321 01:59:51.014526  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  322 01:59:51.014613  start: 1.8 deploy-device-env (timeout 00:09:20) [common]
  323 01:59:51.014694  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  324 01:59:51.014763  Checking files for TFTP limit of 4294967296 bytes.
  325 01:59:51.015257  end: 1 tftp-deploy (duration 00:00:40) [common]
  326 01:59:51.015370  start: 2 depthcharge-action (timeout 00:05:00) [common]
  327 01:59:51.015461  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  328 01:59:51.015586  substitutions:
  329 01:59:51.015657  - {DTB}: 14479219/tftp-deploy-exyhzxbh/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
  330 01:59:51.015721  - {INITRD}: 14479219/tftp-deploy-exyhzxbh/ramdisk/ramdisk.cpio.gz
  331 01:59:51.015780  - {KERNEL}: 14479219/tftp-deploy-exyhzxbh/kernel/Image
  332 01:59:51.015838  - {LAVA_MAC}: None
  333 01:59:51.015893  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14479219/extract-nfsrootfs-cgh7e9h3
  334 01:59:51.015950  - {NFS_SERVER_IP}: 192.168.201.1
  335 01:59:51.016006  - {PRESEED_CONFIG}: None
  336 01:59:51.016061  - {PRESEED_LOCAL}: None
  337 01:59:51.016116  - {RAMDISK}: 14479219/tftp-deploy-exyhzxbh/ramdisk/ramdisk.cpio.gz
  338 01:59:51.016171  - {ROOT_PART}: None
  339 01:59:51.016225  - {ROOT}: None
  340 01:59:51.016280  - {SERVER_IP}: 192.168.201.1
  341 01:59:51.016333  - {TEE}: None
  342 01:59:51.016387  Parsed boot commands:
  343 01:59:51.016441  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  344 01:59:51.016617  Parsed boot commands: tftpboot 192.168.201.1 14479219/tftp-deploy-exyhzxbh/kernel/image.itb 14479219/tftp-deploy-exyhzxbh/kernel/cmdline 
  345 01:59:51.016705  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  346 01:59:51.016785  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  347 01:59:51.016875  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  348 01:59:51.017035  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  349 01:59:51.017155  Not connected, no need to disconnect.
  350 01:59:51.017276  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  351 01:59:51.017377  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  352 01:59:51.017447  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
  353 01:59:51.021389  Setting prompt string to ['lava-test: # ']
  354 01:59:51.021808  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  355 01:59:51.021951  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  356 01:59:51.022049  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  357 01:59:51.022176  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  358 01:59:51.022399  Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-3']
  359 02:00:16.179168  Returned 0 in 25 seconds
  360 02:00:16.279806  end: 2.2.2.1 pdu-reboot (duration 00:00:25) [common]
  362 02:00:16.280138  end: 2.2.2 reset-device (duration 00:00:25) [common]
  363 02:00:16.280239  start: 2.2.3 depthcharge-start (timeout 00:04:35) [common]
  364 02:00:16.280340  Setting prompt string to 'Starting depthcharge on Juniper...'
  365 02:00:16.280407  Changing prompt to 'Starting depthcharge on Juniper...'
  366 02:00:16.280484  depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
  367 02:00:16.280950  [Enter `^Ec?' for help]

  368 02:00:16.281105  [DL] 00000000 00000000 010701

  369 02:00:16.281220  

  370 02:00:16.281328  

  371 02:00:16.281429  F0: 102B 0000

  372 02:00:16.281526  

  373 02:00:16.281638  F3: 1006 0033 [0200]

  374 02:00:16.281731  

  375 02:00:16.281841  F3: 4001 00E0 [0200]

  376 02:00:16.281902  

  377 02:00:16.281968  F3: 0000 0000

  378 02:00:16.282054  

  379 02:00:16.282111  V0: 0000 0000 [0001]

  380 02:00:16.282175  

  381 02:00:16.282290  00: 1027 0002

  382 02:00:16.282349  

  383 02:00:16.282437  01: 0000 0000

  384 02:00:16.282498  

  385 02:00:16.282552  BP: 0C00 0251 [0000]

  386 02:00:16.282674  

  387 02:00:16.282829  G0: 1182 0000

  388 02:00:16.282976  

  389 02:00:16.283160  EC: 0004 0000 [0001]

  390 02:00:16.283276  

  391 02:00:16.283360  S7: 0000 0000 [0000]

  392 02:00:16.283511  

  393 02:00:16.283614  CC: 0000 0000 [0001]

  394 02:00:16.283722  

  395 02:00:16.283816  T0: 0000 00DB [000F]

  396 02:00:16.283918  

  397 02:00:16.284007  Jump to BL

  398 02:00:16.284110  

  399 02:00:16.284206  


  400 02:00:16.284304  

  401 02:00:16.284385  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...

  402 02:00:16.284488  ARM64: Exception handlers installed.

  403 02:00:16.284603  ARM64: Testing exception

  404 02:00:16.284726  ARM64: Done test exception

  405 02:00:16.284831  WDT: Last reset was cold boot

  406 02:00:16.284917  SPI0(PAD0) initialized at 992727 Hz

  407 02:00:16.285040  FMAP: area RW_NVRAM found @ 554000 (8192 bytes)

  408 02:00:16.285147  Manufacturer: ef

  409 02:00:16.285234  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

  410 02:00:16.285360  Probing TPM: . done!

  411 02:00:16.285446  TPM ready after 0 ms

  412 02:00:16.285639  Connected to device vid:did:rid of 1ae0:0028:00

  413 02:00:16.285750  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c

  414 02:00:16.285850  Initialized TPM device CR50 revision 0

  415 02:00:16.285937  tlcl_send_startup: Startup return code is 0

  416 02:00:16.286049  TPM: setup succeeded

  417 02:00:16.286143  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  418 02:00:16.286242  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

  419 02:00:16.286334  in-header: 03 19 00 00 08 00 00 00 

  420 02:00:16.286473  in-data: a2 e0 47 00 13 00 00 00 

  421 02:00:16.286645  Chrome EC: UHEPI supported

  422 02:00:16.286752  out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00 

  423 02:00:16.286841  in-header: 03 a1 00 00 08 00 00 00 

  424 02:00:16.286975  in-data: 84 60 60 10 00 00 00 00 

  425 02:00:16.287080  Phase 1

  426 02:00:16.287172  FMAP: area GBB found @ 3f5000 (12032 bytes)

  427 02:00:16.287276  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  428 02:00:16.287372  VB2:vb2_check_recovery() Recovery was requested manually

  429 02:00:16.287480  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0

  430 02:00:16.287568  Recovery requested (1009000e)

  431 02:00:16.287672  tlcl_extend: response is 0

  432 02:00:16.287773  tlcl_extend: response is 0

  433 02:00:16.287858  

  434 02:00:16.287957  

  435 02:00:16.288056  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...

  436 02:00:16.288162  ARM64: Exception handlers installed.

  437 02:00:16.288259  ARM64: Testing exception

  438 02:00:16.288378  ARM64: Done test exception

  439 02:00:16.288439  [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x2000

  440 02:00:16.288520  [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2

  441 02:00:16.288610  [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a

  442 02:00:16.288724  [RTC]rtc_get_frequency_meter,134: input=0xf, output=860

  443 02:00:16.288825  [RTC]rtc_get_frequency_meter,134: input=0x7, output=734

  444 02:00:16.288936  [RTC]rtc_get_frequency_meter,134: input=0xb, output=798

  445 02:00:16.289045  [RTC]rtc_get_frequency_meter,134: input=0x9, output=766

  446 02:00:16.289144  [RTC]rtc_get_frequency_meter,134: input=0xa, output=781

  447 02:00:16.289231  [RTC]rtc_get_frequency_meter,134: input=0xa, output=781

  448 02:00:16.289365  [RTC]rtc_get_frequency_meter,134: input=0xb, output=799

  449 02:00:16.289455  [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b

  450 02:00:16.289560  [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482

  451 02:00:16.289652  [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1

  452 02:00:16.289752  [RTC]rtc_bbpu_power_on,376: done BBPU=0x9

  453 02:00:16.289841  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

  454 02:00:16.289952  in-header: 03 19 00 00 08 00 00 00 

  455 02:00:16.290047  in-data: a2 e0 47 00 13 00 00 00 

  456 02:00:16.290144  Chrome EC: UHEPI supported

  457 02:00:16.290235  out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00 

  458 02:00:16.290344  in-header: 03 a1 00 00 08 00 00 00 

  459 02:00:16.290439  in-data: 84 60 60 10 00 00 00 00 

  460 02:00:16.290523  Skip loading cached calibration data

  461 02:00:16.290634  out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00 

  462 02:00:16.290720  in-header: 03 a1 00 00 08 00 00 00 

  463 02:00:16.290816  in-data: 84 60 60 10 00 00 00 00 

  464 02:00:16.290901  out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10 

  465 02:00:16.291010  in-header: 03 a1 00 00 08 00 00 00 

  466 02:00:16.291097  in-data: 84 60 60 10 00 00 00 00 

  467 02:00:16.291191  ADC[3]: Raw value=1037832 ID=8

  468 02:00:16.291278  Manufacturer: ef

  469 02:00:16.291380  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

  470 02:00:16.291477  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

  471 02:00:16.291574  CBFS @ 21000 size 3d4000

  472 02:00:16.291662  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

  473 02:00:16.291766  CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'

  474 02:00:16.291860  CBFS: Found @ offset 3c880 size 4b

  475 02:00:16.291964  DRAM-K: Full Calibration

  476 02:00:16.292048  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

  477 02:00:16.292143  CBFS @ 21000 size 3d4000

  478 02:00:16.292238  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

  479 02:00:16.292342  CBFS: Locating 'fallback/dram'

  480 02:00:16.292436  CBFS: Found @ offset 24b00 size 12268

  481 02:00:16.292536  read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps

  482 02:00:16.292621  ddr_geometry: 1, config: 0x0

  483 02:00:16.292766  header.status = 0x0

  484 02:00:16.292860  header.magic = 0x44524d4b (expected: 0x44524d4b)

  485 02:00:16.292958  header.version = 0x5 (expected: 0x5)

  486 02:00:16.293273  header.size = 0x8f0 (expected: 0x8f0)

  487 02:00:16.293433  header.config = 0x0

  488 02:00:16.293566  header.flags = 0x0

  489 02:00:16.293652  header.checksum = 0x0

  490 02:00:16.293773  dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5

  491 02:00:16.293887  Set DRAM voltage: vdram1 = 1125000, vddq = 600000

  492 02:00:16.293987  Get DRAM voltage to vdram1 = 1125000, vddq = 600000

  493 02:00:16.294089  ddr_geometry:1

  494 02:00:16.294191  [EMI] new MDL number = 1

  495 02:00:16.294295  dram_cbt_mode_extern: 0

  496 02:00:16.294387  dram_cbt_mode [RK0]: 0, [RK1]: 0

  497 02:00:16.294486  Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]

  498 02:00:16.294594  

  499 02:00:16.294678  

  500 02:00:16.294781  [Bianco] ETT version 0.0.0.1

  501 02:00:16.294867   dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6

  502 02:00:16.294966  

  503 02:00:16.295061  vSetVcoreByFreq with vcore:762500, freq=1600

  504 02:00:16.295165  

  505 02:00:16.295252  [DramcInit]

  506 02:00:16.295354  AutoRefreshCKEOff AutoREF OFF

  507 02:00:16.295449  DDRPhyPLLSetting-CKEOFF

  508 02:00:16.295548  DDRPhyPLLSetting-CKEON

  509 02:00:16.295634  

  510 02:00:16.295730  Enable WDQS

  511 02:00:16.295825  [ModeRegInit_LP4] CH0 RK0

  512 02:00:16.295942  Write Rank0 MR13 =0x18

  513 02:00:16.296029  Write Rank0 MR12 =0x5d

  514 02:00:16.296123  Write Rank0 MR1 =0x56

  515 02:00:16.296217  Write Rank0 MR2 =0x1a

  516 02:00:16.296315  Write Rank0 MR11 =0x0

  517 02:00:16.296400  Write Rank0 MR22 =0x38

  518 02:00:16.296504  Write Rank0 MR14 =0x5d

  519 02:00:16.296588  Write Rank0 MR3 =0x30

  520 02:00:16.296687  Write Rank0 MR13 =0x58

  521 02:00:16.296776  Write Rank0 MR12 =0x5d

  522 02:00:16.296883  Write Rank0 MR1 =0x56

  523 02:00:16.296968  Write Rank0 MR2 =0x2d

  524 02:00:16.297085  Write Rank0 MR11 =0x23

  525 02:00:16.297172  Write Rank0 MR22 =0x34

  526 02:00:16.297303  Write Rank0 MR14 =0x10

  527 02:00:16.297392  Write Rank0 MR3 =0x30

  528 02:00:16.297476  Write Rank0 MR13 =0xd8

  529 02:00:16.297596  [ModeRegInit_LP4] CH0 RK1

  530 02:00:16.297697  Write Rank1 MR13 =0x18

  531 02:00:16.297807  Write Rank1 MR12 =0x5d

  532 02:00:16.297890  Write Rank1 MR1 =0x56

  533 02:00:16.297983  Write Rank1 MR2 =0x1a

  534 02:00:16.298138  Write Rank1 MR11 =0x0

  535 02:00:16.298273  Write Rank1 MR22 =0x38

  536 02:00:16.298458  Write Rank1 MR14 =0x5d

  537 02:00:16.298569  Write Rank1 MR3 =0x30

  538 02:00:16.298659  Write Rank1 MR13 =0x58

  539 02:00:16.298761  Write Rank1 MR12 =0x5d

  540 02:00:16.298850  Write Rank1 MR1 =0x56

  541 02:00:16.298949  Write Rank1 MR2 =0x2d

  542 02:00:16.299043  Write Rank1 MR11 =0x23

  543 02:00:16.299154  Write Rank1 MR22 =0x34

  544 02:00:16.299246  Write Rank1 MR14 =0x10

  545 02:00:16.299346  Write Rank1 MR3 =0x30

  546 02:00:16.299488  Write Rank1 MR13 =0xd8

  547 02:00:16.299614  [ModeRegInit_LP4] CH1 RK0

  548 02:00:16.299714  Write Rank0 MR13 =0x18

  549 02:00:16.299813  Write Rank0 MR12 =0x5d

  550 02:00:16.299916  Write Rank0 MR1 =0x56

  551 02:00:16.300031  Write Rank0 MR2 =0x1a

  552 02:00:16.300117  Write Rank0 MR11 =0x0

  553 02:00:16.300233  Write Rank0 MR22 =0x38

  554 02:00:16.300317  Write Rank0 MR14 =0x5d

  555 02:00:16.300450  Write Rank0 MR3 =0x30

  556 02:00:16.300540  Write Rank0 MR13 =0x58

  557 02:00:16.300631  Write Rank0 MR12 =0x5d

  558 02:00:16.300722  Write Rank0 MR1 =0x56

  559 02:00:16.300831  Write Rank0 MR2 =0x2d

  560 02:00:16.300917  Write Rank0 MR11 =0x23

  561 02:00:16.301012  Write Rank0 MR22 =0x34

  562 02:00:16.301097  Write Rank0 MR14 =0x10

  563 02:00:16.301213  Write Rank0 MR3 =0x30

  564 02:00:16.301345  Write Rank0 MR13 =0xd8

  565 02:00:16.301433  [ModeRegInit_LP4] CH1 RK1

  566 02:00:16.301526  Write Rank1 MR13 =0x18

  567 02:00:16.301672  Write Rank1 MR12 =0x5d

  568 02:00:16.301756  Write Rank1 MR1 =0x56

  569 02:00:16.301867  Write Rank1 MR2 =0x1a

  570 02:00:16.301959  Write Rank1 MR11 =0x0

  571 02:00:16.302050  Write Rank1 MR22 =0x38

  572 02:00:16.302133  Write Rank1 MR14 =0x5d

  573 02:00:16.302236  Write Rank1 MR3 =0x30

  574 02:00:16.302323  Write Rank1 MR13 =0x58

  575 02:00:16.302473  Write Rank1 MR12 =0x5d

  576 02:00:16.302573  Write Rank1 MR1 =0x56

  577 02:00:16.302667  Write Rank1 MR2 =0x2d

  578 02:00:16.302763  Write Rank1 MR11 =0x23

  579 02:00:16.302866  Write Rank1 MR22 =0x34

  580 02:00:16.303001  Write Rank1 MR14 =0x10

  581 02:00:16.303127  Write Rank1 MR3 =0x30

  582 02:00:16.303230  Write Rank1 MR13 =0xd8

  583 02:00:16.303315  match AC timing 3

  584 02:00:16.303419  [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0

  585 02:00:16.303504  [MiockJmeterHQA]

  586 02:00:16.303604  vSetVcoreByFreq with vcore:762500, freq=1600

  587 02:00:16.303689  

  588 02:00:16.303802  	MIOCK jitter meter	ch=0

  589 02:00:16.303888  

  590 02:00:16.303969  1T = (99-17) = 82 dly cells

  591 02:00:16.304031  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps

  592 02:00:16.304086  vSetVcoreByFreq with vcore:725000, freq=1200

  593 02:00:16.304166  

  594 02:00:16.304267  	MIOCK jitter meter	ch=0

  595 02:00:16.304356  

  596 02:00:16.304448  1T = (94-16) = 78 dly cells

  597 02:00:16.304553  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps

  598 02:00:16.304649  vSetVcoreByFreq with vcore:725000, freq=800

  599 02:00:16.304737  

  600 02:00:16.304832  	MIOCK jitter meter	ch=0

  601 02:00:16.304953  

  602 02:00:16.305072  1T = (94-16) = 78 dly cells

  603 02:00:16.305164  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps

  604 02:00:16.305295  vSetVcoreByFreq with vcore:762500, freq=1600

  605 02:00:16.305403  vSetVcoreByFreq with vcore:762500, freq=1600

  606 02:00:16.305524  

  607 02:00:16.305609  	K DRVP

  608 02:00:16.305720  1. OCD DRVP=0 CALOUT=0

  609 02:00:16.305808  1. OCD DRVP=1 CALOUT=0

  610 02:00:16.305926  1. OCD DRVP=2 CALOUT=0

  611 02:00:16.306027  1. OCD DRVP=3 CALOUT=0

  612 02:00:16.306168  1. OCD DRVP=4 CALOUT=0

  613 02:00:16.306286  1. OCD DRVP=5 CALOUT=0

  614 02:00:16.306388  1. OCD DRVP=6 CALOUT=0

  615 02:00:16.306563  1. OCD DRVP=7 CALOUT=0

  616 02:00:16.306732  1. OCD DRVP=8 CALOUT=0

  617 02:00:16.306832  1. OCD DRVP=9 CALOUT=1

  618 02:00:16.306945  

  619 02:00:16.307040  1. OCD DRVP calibration OK! DRVP=9

  620 02:00:16.307144  

  621 02:00:16.307226  

  622 02:00:16.307301  

  623 02:00:16.307388  	K ODTN

  624 02:00:16.307472  3. OCD ODTN=0 ,CALOUT=1

  625 02:00:16.307572  3. OCD ODTN=1 ,CALOUT=1

  626 02:00:16.307670  3. OCD ODTN=2 ,CALOUT=1

  627 02:00:16.307767  3. OCD ODTN=3 ,CALOUT=1

  628 02:00:16.307859  3. OCD ODTN=4 ,CALOUT=1

  629 02:00:16.307946  3. OCD ODTN=5 ,CALOUT=1

  630 02:00:16.308033  3. OCD ODTN=6 ,CALOUT=1

  631 02:00:16.308147  3. OCD ODTN=7 ,CALOUT=0

  632 02:00:16.308258  

  633 02:00:16.308347  3. OCD ODTN calibration OK! ODTN=7

  634 02:00:16.308441  

  635 02:00:16.308534  [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7

  636 02:00:16.308621  term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15

  637 02:00:16.308716  term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)

  638 02:00:16.308804  

  639 02:00:16.308889  	K DRVP

  640 02:00:16.308981  1. OCD DRVP=0 CALOUT=0

  641 02:00:16.309068  1. OCD DRVP=1 CALOUT=0

  642 02:00:16.309164  1. OCD DRVP=2 CALOUT=0

  643 02:00:16.309252  1. OCD DRVP=3 CALOUT=0

  644 02:00:16.309350  1. OCD DRVP=4 CALOUT=0

  645 02:00:16.309408  1. OCD DRVP=5 CALOUT=0

  646 02:00:16.309464  1. OCD DRVP=6 CALOUT=0

  647 02:00:16.309529  1. OCD DRVP=7 CALOUT=0

  648 02:00:16.309588  1. OCD DRVP=8 CALOUT=0

  649 02:00:16.309643  1. OCD DRVP=9 CALOUT=0

  650 02:00:16.309892  1. OCD DRVP=10 CALOUT=1

  651 02:00:16.309963  

  652 02:00:16.310019  1. OCD DRVP calibration OK! DRVP=10

  653 02:00:16.310075  

  654 02:00:16.310140  

  655 02:00:16.310196  

  656 02:00:16.310250  	K ODTN

  657 02:00:16.310304  3. OCD ODTN=0 ,CALOUT=1

  658 02:00:16.310368  3. OCD ODTN=1 ,CALOUT=1

  659 02:00:16.310424  3. OCD ODTN=2 ,CALOUT=1

  660 02:00:16.310479  3. OCD ODTN=3 ,CALOUT=1

  661 02:00:16.310550  3. OCD ODTN=4 ,CALOUT=1

  662 02:00:16.310607  3. OCD ODTN=5 ,CALOUT=1

  663 02:00:16.310663  3. OCD ODTN=6 ,CALOUT=1

  664 02:00:16.310725  3. OCD ODTN=7 ,CALOUT=1

  665 02:00:16.310781  3. OCD ODTN=8 ,CALOUT=1

  666 02:00:16.310837  3. OCD ODTN=9 ,CALOUT=1

  667 02:00:16.310899  3. OCD ODTN=10 ,CALOUT=1

  668 02:00:16.310956  3. OCD ODTN=11 ,CALOUT=1

  669 02:00:16.311019  3. OCD ODTN=12 ,CALOUT=1

  670 02:00:16.311074  3. OCD ODTN=13 ,CALOUT=1

  671 02:00:16.311130  3. OCD ODTN=14 ,CALOUT=0

  672 02:00:16.311197  

  673 02:00:16.311252  3. OCD ODTN calibration OK! ODTN=14

  674 02:00:16.311308  

  675 02:00:16.311371  [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14

  676 02:00:16.311426  term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14

  677 02:00:16.311481  term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)

  678 02:00:16.311542  

  679 02:00:16.311597  [DramcInit]

  680 02:00:16.311652  AutoRefreshCKEOff AutoREF OFF

  681 02:00:16.311706  DDRPhyPLLSetting-CKEOFF

  682 02:00:16.311772  DDRPhyPLLSetting-CKEON

  683 02:00:16.311826  

  684 02:00:16.311880  Enable WDQS

  685 02:00:16.311940  ==

  686 02:00:16.311996  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  687 02:00:16.312050  fsp= 1, odt_onoff= 1, Byte mode= 0

  688 02:00:16.312112  ==

  689 02:00:16.312169  [Duty_Offset_Calibration]

  690 02:00:16.312229  

  691 02:00:16.312285  ===========================

  692 02:00:16.312339  	B0:0	B1:1	CA:1

  693 02:00:16.312393  ==

  694 02:00:16.312454  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

  695 02:00:16.312509  fsp= 1, odt_onoff= 1, Byte mode= 0

  696 02:00:16.312563  ==

  697 02:00:16.312624  [Duty_Offset_Calibration]

  698 02:00:16.312679  

  699 02:00:16.312733  ===========================

  700 02:00:16.312793  	B0:1	B1:2	CA:0

  701 02:00:16.312848  [ModeRegInit_LP4] CH0 RK0

  702 02:00:16.312903  Write Rank0 MR13 =0x18

  703 02:00:16.312957  Write Rank0 MR12 =0x5d

  704 02:00:16.313023  Write Rank0 MR1 =0x56

  705 02:00:16.313077  Write Rank0 MR2 =0x1a

  706 02:00:16.313131  Write Rank0 MR11 =0x0

  707 02:00:16.313196  Write Rank0 MR22 =0x38

  708 02:00:16.313251  Write Rank0 MR14 =0x5d

  709 02:00:16.313358  Write Rank0 MR3 =0x30

  710 02:00:16.313445  Write Rank0 MR13 =0x58

  711 02:00:16.313532  Write Rank0 MR12 =0x5d

  712 02:00:16.313605  Write Rank0 MR1 =0x56

  713 02:00:16.313673  Write Rank0 MR2 =0x2d

  714 02:00:16.313729  Write Rank0 MR11 =0x23

  715 02:00:16.313783  Write Rank0 MR22 =0x34

  716 02:00:16.313844  Write Rank0 MR14 =0x10

  717 02:00:16.313899  Write Rank0 MR3 =0x30

  718 02:00:16.313952  Write Rank0 MR13 =0xd8

  719 02:00:16.314011  [ModeRegInit_LP4] CH0 RK1

  720 02:00:16.314067  Write Rank1 MR13 =0x18

  721 02:00:16.314121  Write Rank1 MR12 =0x5d

  722 02:00:16.314175  Write Rank1 MR1 =0x56

  723 02:00:16.314236  Write Rank1 MR2 =0x1a

  724 02:00:16.314290  Write Rank1 MR11 =0x0

  725 02:00:16.314344  Write Rank1 MR22 =0x38

  726 02:00:16.314405  Write Rank1 MR14 =0x5d

  727 02:00:16.314460  Write Rank1 MR3 =0x30

  728 02:00:16.314513  Write Rank1 MR13 =0x58

  729 02:00:16.314575  Write Rank1 MR12 =0x5d

  730 02:00:16.314632  Write Rank1 MR1 =0x56

  731 02:00:16.314686  Write Rank1 MR2 =0x2d

  732 02:00:16.314741  Write Rank1 MR11 =0x23

  733 02:00:16.314806  Write Rank1 MR22 =0x34

  734 02:00:16.314861  Write Rank1 MR14 =0x10

  735 02:00:16.314914  Write Rank1 MR3 =0x30

  736 02:00:16.314975  Write Rank1 MR13 =0xd8

  737 02:00:16.315035  [ModeRegInit_LP4] CH1 RK0

  738 02:00:16.315091  Write Rank0 MR13 =0x18

  739 02:00:16.315157  Write Rank0 MR12 =0x5d

  740 02:00:16.315211  Write Rank0 MR1 =0x56

  741 02:00:16.315265  Write Rank0 MR2 =0x1a

  742 02:00:16.315325  Write Rank0 MR11 =0x0

  743 02:00:16.315381  Write Rank0 MR22 =0x38

  744 02:00:16.315435  Write Rank0 MR14 =0x5d

  745 02:00:16.315489  Write Rank0 MR3 =0x30

  746 02:00:16.315550  Write Rank0 MR13 =0x58

  747 02:00:16.315604  Write Rank0 MR12 =0x5d

  748 02:00:16.315657  Write Rank0 MR1 =0x56

  749 02:00:16.315720  Write Rank0 MR2 =0x2d

  750 02:00:16.315774  Write Rank0 MR11 =0x23

  751 02:00:16.315828  Write Rank0 MR22 =0x34

  752 02:00:16.315888  Write Rank0 MR14 =0x10

  753 02:00:16.315943  Write Rank0 MR3 =0x30

  754 02:00:16.315997  Write Rank0 MR13 =0xd8

  755 02:00:16.316051  [ModeRegInit_LP4] CH1 RK1

  756 02:00:16.316107  Write Rank1 MR13 =0x18

  757 02:00:16.316160  Write Rank1 MR12 =0x5d

  758 02:00:16.316214  Write Rank1 MR1 =0x56

  759 02:00:16.316279  Write Rank1 MR2 =0x1a

  760 02:00:16.316335  Write Rank1 MR11 =0x0

  761 02:00:16.316388  Write Rank1 MR22 =0x38

  762 02:00:16.316442  Write Rank1 MR14 =0x5d

  763 02:00:16.316505  Write Rank1 MR3 =0x30

  764 02:00:16.316559  Write Rank1 MR13 =0x58

  765 02:00:16.316612  Write Rank1 MR12 =0x5d

  766 02:00:16.316673  Write Rank1 MR1 =0x56

  767 02:00:16.316727  Write Rank1 MR2 =0x2d

  768 02:00:16.316787  Write Rank1 MR11 =0x23

  769 02:00:16.316841  Write Rank1 MR22 =0x34

  770 02:00:16.316895  Write Rank1 MR14 =0x10

  771 02:00:16.316959  Write Rank1 MR3 =0x30

  772 02:00:16.317014  Write Rank1 MR13 =0xd8

  773 02:00:16.317073  match AC timing 3

  774 02:00:16.317134  [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0

  775 02:00:16.317192  DramC Write-DBI off

  776 02:00:16.317246  DramC Read-DBI off

  777 02:00:16.317341  Write Rank0 MR13 =0x59

  778 02:00:16.317398  ==

  779 02:00:16.317453  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  780 02:00:16.317519  fsp= 1, odt_onoff= 1, Byte mode= 0

  781 02:00:16.317575  ==

  782 02:00:16.317630  === u2Vref_new: 0x56 --> 0x2d

  783 02:00:16.317693  === u2Vref_new: 0x58 --> 0x38

  784 02:00:16.317751  === u2Vref_new: 0x5a --> 0x39

  785 02:00:16.317806  === u2Vref_new: 0x5c --> 0x3c

  786 02:00:16.317860  === u2Vref_new: 0x5e --> 0x3d

  787 02:00:16.317914  === u2Vref_new: 0x60 --> 0xa0

  788 02:00:16.317975  [CA 0] Center 33 (4~63) winsize 60

  789 02:00:16.318030  [CA 1] Center 34 (5~63) winsize 59

  790 02:00:16.318083  [CA 2] Center 28 (0~57) winsize 58

  791 02:00:16.318149  [CA 3] Center 24 (-3~51) winsize 55

  792 02:00:16.318205  [CA 4] Center 25 (-2~52) winsize 55

  793 02:00:16.318259  [CA 5] Center 30 (2~58) winsize 57

  794 02:00:16.318323  

  795 02:00:16.318380  [CATrainingPosCal] consider 1 rank data

  796 02:00:16.318434  u2DelayCellTimex100 = 762/100 ps

  797 02:00:16.318488  CA0 delay=33 (4~63),Diff = 9 PI (11 cell)

  798 02:00:16.318550  CA1 delay=34 (5~63),Diff = 10 PI (12 cell)

  799 02:00:16.318605  CA2 delay=28 (0~57),Diff = 4 PI (5 cell)

  800 02:00:16.318659  CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)

  801 02:00:16.318726  CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)

  802 02:00:16.318782  CA5 delay=30 (2~58),Diff = 6 PI (7 cell)

  803 02:00:16.318836  

  804 02:00:16.318890  CA PerBit enable=1, Macro0, CA PI delay=24

  805 02:00:16.318952  === u2Vref_new: 0x56 --> 0x2d

  806 02:00:16.319006  

  807 02:00:16.319060  Vref(ca) range 1: 22

  808 02:00:16.319122  

  809 02:00:16.319183  CS Dly= 10 (41-0-32)

  810 02:00:16.319238  Write Rank0 MR13 =0xd8

  811 02:00:16.319292  Write Rank0 MR13 =0xd8

  812 02:00:16.319346  Write Rank0 MR12 =0x56

  813 02:00:16.319407  Write Rank1 MR13 =0x59

  814 02:00:16.319461  ==

  815 02:00:16.319725  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

  816 02:00:16.319797  fsp= 1, odt_onoff= 1, Byte mode= 0

  817 02:00:16.319854  ==

  818 02:00:16.319909  === u2Vref_new: 0x56 --> 0x2d

  819 02:00:16.319978  === u2Vref_new: 0x58 --> 0x38

  820 02:00:16.320035  === u2Vref_new: 0x5a --> 0x39

  821 02:00:16.320089  === u2Vref_new: 0x5c --> 0x3c

  822 02:00:16.320154  === u2Vref_new: 0x5e --> 0x3d

  823 02:00:16.320209  === u2Vref_new: 0x60 --> 0xa0

  824 02:00:16.320264  [CA 0] Center 34 (5~63) winsize 59

  825 02:00:16.320325  [CA 1] Center 34 (6~63) winsize 58

  826 02:00:16.320381  [CA 2] Center 29 (1~58) winsize 58

  827 02:00:16.320443  [CA 3] Center 23 (-4~51) winsize 56

  828 02:00:16.320498  [CA 4] Center 24 (-3~52) winsize 56

  829 02:00:16.320553  [CA 5] Center 30 (1~59) winsize 59

  830 02:00:16.320617  

  831 02:00:16.320673  [CATrainingPosCal] consider 2 rank data

  832 02:00:16.320727  u2DelayCellTimex100 = 762/100 ps

  833 02:00:16.320788  CA0 delay=34 (5~63),Diff = 10 PI (12 cell)

  834 02:00:16.320844  CA1 delay=34 (6~63),Diff = 10 PI (12 cell)

  835 02:00:16.320898  CA2 delay=29 (1~57),Diff = 5 PI (6 cell)

  836 02:00:16.320952  CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)

  837 02:00:16.321014  CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)

  838 02:00:16.321068  CA5 delay=30 (2~58),Diff = 6 PI (7 cell)

  839 02:00:16.321123  

  840 02:00:16.321182  CA PerBit enable=1, Macro0, CA PI delay=24

  841 02:00:16.321238  === u2Vref_new: 0x56 --> 0x2d

  842 02:00:16.321349  

  843 02:00:16.321415  Vref(ca) range 1: 22

  844 02:00:16.321471  

  845 02:00:16.321525  CS Dly= 11 (42-0-32)

  846 02:00:16.321589  Write Rank1 MR13 =0xd8

  847 02:00:16.321645  Write Rank1 MR13 =0xd8

  848 02:00:16.321718  Write Rank1 MR12 =0x56

  849 02:00:16.321813  [RankSwap] Rank num 2, (Multi 1), Rank 0

  850 02:00:16.321900  Write Rank0 MR2 =0xad

  851 02:00:16.321999  [Write Leveling]

  852 02:00:16.322097  delay  byte0  byte1  byte2  byte3

  853 02:00:16.322196  

  854 02:00:16.322292  10    0   0   

  855 02:00:16.322398  11    0   0   

  856 02:00:16.322498  12    0   0   

  857 02:00:16.322602  13    0   0   

  858 02:00:16.322700  14    0   0   

  859 02:00:16.322804  15    0   0   

  860 02:00:16.322910  16    0   0   

  861 02:00:16.323005  17    0   0   

  862 02:00:16.323108  18    0   0   

  863 02:00:16.323217  19    0   0   

  864 02:00:16.323283  20    0   0   

  865 02:00:16.323341  21    0   0   

  866 02:00:16.323406  22    0   0   

  867 02:00:16.323463  23    0   0   

  868 02:00:16.323518  24    0   0   

  869 02:00:16.323585  25    0   0   

  870 02:00:16.323643  26    0   0   

  871 02:00:16.323698  27    0   0   

  872 02:00:16.323762  28    0   ff   

  873 02:00:16.323818  29    0   ff   

  874 02:00:16.323873  30    0   ff   

  875 02:00:16.323929  31    0   ff   

  876 02:00:16.323992  32    ff   ff   

  877 02:00:16.324047  33    ff   ff   

  878 02:00:16.324102  34    ff   ff   

  879 02:00:16.324169  35    ff   ff   

  880 02:00:16.324225  36    ff   ff   

  881 02:00:16.324281  37    ff   ff   

  882 02:00:16.324347  38    ff   ff   

  883 02:00:16.324404  pass bytecount = 0xff (0xff: all bytes pass) 

  884 02:00:16.324459  

  885 02:00:16.324531  DQS0 dly: 32

  886 02:00:16.324596  DQS1 dly: 28

  887 02:00:16.324650  Write Rank0 MR2 =0x2d

  888 02:00:16.324705  [RankSwap] Rank num 2, (Multi 1), Rank 0

  889 02:00:16.324773  Write Rank0 MR1 =0xd6

  890 02:00:16.324829  [Gating]

  891 02:00:16.324883  ==

  892 02:00:16.324943  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  893 02:00:16.325000  fsp= 1, odt_onoff= 1, Byte mode= 0

  894 02:00:16.325055  ==

  895 02:00:16.325109  3 1 0 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  896 02:00:16.325177  3 1 4 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  897 02:00:16.325234  3 1 8 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  898 02:00:16.325299  3 1 12 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  899 02:00:16.325365  3 1 16 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  900 02:00:16.325423  3 1 20 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  901 02:00:16.325479  3 1 24 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  902 02:00:16.325546  3 1 28 |2c2c 2c2b  |(11 0)(11 11) |(0 0)(1 0)| 0

  903 02:00:16.325602  3 2 0 |201 2c2c  |(11 11)(11 0) |(0 0)(1 0)| 0

  904 02:00:16.325658  3 2 4 |3534 404  |(11 11)(11 11) |(0 0)(0 0)| 0

  905 02:00:16.325720  3 2 8 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

  906 02:00:16.325777  3 2 12 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

  907 02:00:16.325832  3 2 16 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

  908 02:00:16.325888  3 2 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

  909 02:00:16.325952  3 2 24 |3534 3534  |(11 11)(11 11) |(0 0)(1 1)| 0

  910 02:00:16.326014  3 2 28 |3534 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

  911 02:00:16.326070  3 3 0 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

  912 02:00:16.326130  3 3 4 |3534 3534  |(11 11)(11 11) |(0 0)(1 1)| 0

  913 02:00:16.326191  3 3 8 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  914 02:00:16.326249  3 3 12 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  915 02:00:16.326304  3 3 16 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  916 02:00:16.326360  3 3 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  917 02:00:16.326423  3 3 24 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

  918 02:00:16.326479  3 3 28 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

  919 02:00:16.326534  3 4 0 |201 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

  920 02:00:16.326597  3 4 4 |3d3d 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

  921 02:00:16.326653  3 4 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  922 02:00:16.326707  3 4 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  923 02:00:16.326778  3 4 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  924 02:00:16.326835  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  925 02:00:16.326891  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  926 02:00:16.326946  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  927 02:00:16.327011  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  928 02:00:16.327067  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  929 02:00:16.327123  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  930 02:00:16.327192  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  931 02:00:16.327249  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  932 02:00:16.327304  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  933 02:00:16.327377  [Byte 0] Lead/lag falling Transition (3, 5, 20)

  934 02:00:16.327448  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

  935 02:00:16.327504  [Byte 0] Lead/lag Transition tap number (2)

  936 02:00:16.327559  [Byte 1] Lead/lag falling Transition (3, 5, 24)

  937 02:00:16.327621  3 5 28 |3e3d 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

  938 02:00:16.327874  [Byte 1] Lead/lag Transition tap number (2)

  939 02:00:16.327936  3 6 0 |202 3d3d  |(11 11)(11 11) |(0 0)(0 0)| 0

  940 02:00:16.328003  3 6 4 |4646 202  |(0 0)(11 11) |(0 0)(0 0)| 0

  941 02:00:16.328061  [Byte 0]First pass (3, 6, 4)

  942 02:00:16.328115  3 6 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  943 02:00:16.328178  [Byte 1]First pass (3, 6, 8)

  944 02:00:16.328234  3 6 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  945 02:00:16.328289  3 6 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  946 02:00:16.328354  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  947 02:00:16.328412  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  948 02:00:16.328467  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  949 02:00:16.328523  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  950 02:00:16.328586  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  951 02:00:16.328642  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  952 02:00:16.328698  All bytes gating window > 1UI, Early break!

  953 02:00:16.328761  

  954 02:00:16.328818  best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)

  955 02:00:16.328873  

  956 02:00:16.328927  best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)

  957 02:00:16.328981  

  958 02:00:16.329043  

  959 02:00:16.329097  

  960 02:00:16.329150  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)

  961 02:00:16.329212  

  962 02:00:16.329286  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)

  963 02:00:16.329355  

  964 02:00:16.329417  

  965 02:00:16.329473  Write Rank0 MR1 =0x56

  966 02:00:16.329527  

  967 02:00:16.329587  best RODT dly(2T, 0.5T) = (2, 2)

  968 02:00:16.329644  

  969 02:00:16.329698  best RODT dly(2T, 0.5T) = (2, 2)

  970 02:00:16.329752  ==

  971 02:00:16.329819  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  972 02:00:16.329876  fsp= 1, odt_onoff= 1, Byte mode= 0

  973 02:00:16.329932  ==

  974 02:00:16.329994  Start DQ dly to find pass range UseTestEngine =0

  975 02:00:16.330049  x-axis: bit #, y-axis: DQ dly (-127~63)

  976 02:00:16.330104  RX Vref Scan = 0

  977 02:00:16.330158  -26, [0] xxxxxxxx xxxxxxxx [MSB]

  978 02:00:16.330234  -25, [0] xxxxxxxx xxxxxxxx [MSB]

  979 02:00:16.330293  -24, [0] xxxxxxxx xxxxxxxx [MSB]

  980 02:00:16.330349  -23, [0] xxxxxxxx xxxxxxxx [MSB]

  981 02:00:16.330404  -22, [0] xxxxxxxx xxxxxxxx [MSB]

  982 02:00:16.330467  -21, [0] xxxxxxxx xxxxxxxx [MSB]

  983 02:00:16.330522  -20, [0] xxxxxxxx xxxxxxxx [MSB]

  984 02:00:16.330578  -19, [0] xxxxxxxx xxxxxxxx [MSB]

  985 02:00:16.330640  -18, [0] xxxxxxxx xxxxxxxx [MSB]

  986 02:00:16.330696  -17, [0] xxxxxxxx xxxxxxxx [MSB]

  987 02:00:16.330751  -16, [0] xxxxxxxx xxxxxxxx [MSB]

  988 02:00:16.330811  -15, [0] xxxxxxxx xxxxxxxx [MSB]

  989 02:00:16.330869  -14, [0] xxxxxxxx xxxxxxxx [MSB]

  990 02:00:16.330924  -13, [0] xxxxxxxx xxxxxxxx [MSB]

  991 02:00:16.330979  -12, [0] xxxxxxxx xxxxxxxx [MSB]

  992 02:00:16.331046  -11, [0] xxxxxxxx xxxxxxxx [MSB]

  993 02:00:16.331103  -10, [0] xxxxxxxx xxxxxxxx [MSB]

  994 02:00:16.331158  -9, [0] xxxxxxxx xxxxxxxx [MSB]

  995 02:00:16.331220  -8, [0] xxxxxxxx xxxxxxxx [MSB]

  996 02:00:16.331276  -7, [0] xxxxxxxx xxxxxxxx [MSB]

  997 02:00:16.331331  -6, [0] xxxxxxxx xxxxxxxx [MSB]

  998 02:00:16.331393  -5, [0] xxxxxxxx xxxxxxxx [MSB]

  999 02:00:16.331456  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 1000 02:00:16.331512  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 1001 02:00:16.331568  -2, [0] xxxxxxxx xxxxxxxx [MSB]

 1002 02:00:16.331623  -1, [0] xxxxxxxx xxxxxxxx [MSB]

 1003 02:00:16.331686  0, [0] xxxoxoxx xxxxxxxx [MSB]

 1004 02:00:16.331742  1, [0] xxxoxoxx xxxoxxxx [MSB]

 1005 02:00:16.331797  2, [0] xxxoxoxo xxxoxoxx [MSB]

 1006 02:00:16.331854  3, [0] xxxoxooo oxxoxoox [MSB]

 1007 02:00:16.331909  4, [0] xxxoxooo oxxoxooo [MSB]

 1008 02:00:16.331964  5, [0] xxxoxooo ooxooooo [MSB]

 1009 02:00:16.332019  6, [0] xxxoxooo ooxooooo [MSB]

 1010 02:00:16.332082  7, [0] xxxooooo ooxooooo [MSB]

 1011 02:00:16.372622  8, [0] xooooooo oooooooo [MSB]

 1012 02:00:16.372738  9, [0] xooooooo oooooooo [MSB]

 1013 02:00:16.372806  10, [0] xooooooo oooooooo [MSB]

 1014 02:00:16.372870  32, [0] oooxoooo oooooooo [MSB]

 1015 02:00:16.372931  33, [0] oooxoooo oooooxoo [MSB]

 1016 02:00:16.372990  34, [0] oooxoxxo oooooxxo [MSB]

 1017 02:00:16.373048  35, [0] oooxoxxx xooooxxo [MSB]

 1018 02:00:16.373106  36, [0] oooxoxxx xooxoxxo [MSB]

 1019 02:00:16.373163  37, [0] oooxoxxx xxoxxxxx [MSB]

 1020 02:00:16.373220  38, [0] oooxoxxx xxoxxxxx [MSB]

 1021 02:00:16.373289  39, [0] oooxoxxx xxoxxxxx [MSB]

 1022 02:00:16.373348  40, [0] oooxxxxx xxoxxxxx [MSB]

 1023 02:00:16.373404  41, [0] xoxxxxxx xxoxxxxx [MSB]

 1024 02:00:16.373461  42, [0] xxxxxxxx xxxxxxxx [MSB]

 1025 02:00:16.373526  iDelay=42, Bit 0, Center 25 (11 ~ 40) 30

 1026 02:00:16.373584  iDelay=42, Bit 1, Center 24 (8 ~ 41) 34

 1027 02:00:16.373640  iDelay=42, Bit 2, Center 24 (8 ~ 40) 33

 1028 02:00:16.373695  iDelay=42, Bit 3, Center 15 (0 ~ 31) 32

 1029 02:00:16.373749  iDelay=42, Bit 4, Center 23 (7 ~ 39) 33

 1030 02:00:16.373803  iDelay=42, Bit 5, Center 16 (0 ~ 33) 34

 1031 02:00:16.373856  iDelay=42, Bit 6, Center 18 (3 ~ 33) 31

 1032 02:00:16.373910  iDelay=42, Bit 7, Center 18 (2 ~ 34) 33

 1033 02:00:16.373963  iDelay=42, Bit 8, Center 18 (3 ~ 34) 32

 1034 02:00:16.374016  iDelay=42, Bit 9, Center 20 (5 ~ 36) 32

 1035 02:00:16.374069  iDelay=42, Bit 10, Center 24 (8 ~ 41) 34

 1036 02:00:16.374129  iDelay=42, Bit 11, Center 18 (1 ~ 35) 35

 1037 02:00:16.374183  iDelay=42, Bit 12, Center 20 (5 ~ 36) 32

 1038 02:00:16.374237  iDelay=42, Bit 13, Center 17 (2 ~ 32) 31

 1039 02:00:16.374290  iDelay=42, Bit 14, Center 18 (3 ~ 33) 31

 1040 02:00:16.374344  iDelay=42, Bit 15, Center 20 (4 ~ 36) 33

 1041 02:00:16.374397  ==

 1042 02:00:16.374451  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1043 02:00:16.374505  fsp= 1, odt_onoff= 1, Byte mode= 0

 1044 02:00:16.374559  ==

 1045 02:00:16.374612  DQS Delay:

 1046 02:00:16.374665  DQS0 = 0, DQS1 = 0

 1047 02:00:16.374719  DQM Delay:

 1048 02:00:16.374772  DQM0 = 20, DQM1 = 19

 1049 02:00:16.374825  DQ Delay:

 1050 02:00:16.374879  DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15

 1051 02:00:16.374933  DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18

 1052 02:00:16.374986  DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =18

 1053 02:00:16.375040  DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20

 1054 02:00:16.375113  

 1055 02:00:16.375175  

 1056 02:00:16.375240  DramC Write-DBI off

 1057 02:00:16.375294  ==

 1058 02:00:16.375348  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1059 02:00:16.375402  fsp= 1, odt_onoff= 1, Byte mode= 0

 1060 02:00:16.375455  ==

 1061 02:00:16.375509  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 1062 02:00:16.375562  

 1063 02:00:16.375614  Begin, DQ Scan Range 924~1180

 1064 02:00:16.375668  

 1065 02:00:16.375720  

 1066 02:00:16.375773  	TX Vref Scan disable

 1067 02:00:16.375826  924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]

 1068 02:00:16.375881  925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]

 1069 02:00:16.375935  926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]

 1070 02:00:16.376197  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 1071 02:00:16.376284  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 1072 02:00:16.376394  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 1073 02:00:16.376504  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 1074 02:00:16.376614  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 1075 02:00:16.376711  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 1076 02:00:16.376804  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1077 02:00:16.376890  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 1078 02:00:16.376975  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 1079 02:00:16.377067  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 1080 02:00:16.377154  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 1081 02:00:16.377239  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 1082 02:00:16.377311  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 1083 02:00:16.377367  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 1084 02:00:16.377422  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 1085 02:00:16.377482  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 1086 02:00:16.377538  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 1087 02:00:16.377593  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 1088 02:00:16.377647  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 1089 02:00:16.377702  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 1090 02:00:16.377756  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 1091 02:00:16.377812  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 1092 02:00:16.377866  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 1093 02:00:16.377921  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 1094 02:00:16.377976  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 1095 02:00:16.378030  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 1096 02:00:16.378085  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1097 02:00:16.378139  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1098 02:00:16.378194  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1099 02:00:16.378248  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1100 02:00:16.378302  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1101 02:00:16.378356  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1102 02:00:16.378410  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1103 02:00:16.378464  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1104 02:00:16.378518  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1105 02:00:16.378572  962 |3 6 2|[0] xxxxxxxx xxxoxxxx [MSB]

 1106 02:00:16.378625  963 |3 6 3|[0] xxxxxxxx oxxoxoxx [MSB]

 1107 02:00:16.378680  964 |3 6 4|[0] xxxxxxxx oxxoxoxx [MSB]

 1108 02:00:16.378734  965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]

 1109 02:00:16.378788  966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]

 1110 02:00:16.378842  967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]

 1111 02:00:16.378897  968 |3 6 8|[0] xxxoxxxx ooxooooo [MSB]

 1112 02:00:16.378952  969 |3 6 9|[0] xxxoxoox oooooooo [MSB]

 1113 02:00:16.379006  970 |3 6 10|[0] xxxoxoox oooooooo [MSB]

 1114 02:00:16.379060  971 |3 6 11|[0] xxxoooox oooooooo [MSB]

 1115 02:00:16.379114  972 |3 6 12|[0] xxxooooo oooooooo [MSB]

 1116 02:00:16.379167  973 |3 6 13|[0] xxxooooo oooooooo [MSB]

 1117 02:00:16.379221  974 |3 6 14|[0] xooooooo oooooooo [MSB]

 1118 02:00:16.379275  987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]

 1119 02:00:16.379329  988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]

 1120 02:00:16.379384  989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]

 1121 02:00:16.379437  990 |3 6 30|[0] oooxoooo xxxxxxxx [MSB]

 1122 02:00:16.379491  991 |3 6 31|[0] oooxoxoo xxxxxxxx [MSB]

 1123 02:00:16.379545  992 |3 6 32|[0] xxxxxxxx xxxxxxxx [MSB]

 1124 02:00:16.379599  Byte0, DQ PI dly=980, DQM PI dly= 980

 1125 02:00:16.379653  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)

 1126 02:00:16.379707  

 1127 02:00:16.379760  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)

 1128 02:00:16.379814  

 1129 02:00:16.379867  Byte1, DQ PI dly=975, DQM PI dly= 975

 1130 02:00:16.379921  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)

 1131 02:00:16.379975  

 1132 02:00:16.380027  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)

 1133 02:00:16.380080  

 1134 02:00:16.380133  ==

 1135 02:00:16.380186  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1136 02:00:16.380239  fsp= 1, odt_onoff= 1, Byte mode= 0

 1137 02:00:16.380292  ==

 1138 02:00:16.380345  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 1139 02:00:16.380399  

 1140 02:00:16.380452  Begin, DQ Scan Range 951~1015

 1141 02:00:16.380504  Write Rank0 MR14 =0x0

 1142 02:00:16.380557  

 1143 02:00:16.380610  	CH=0, VrefRange= 0, VrefLevel = 0

 1144 02:00:16.380663  TX Bit0 (976~993) 18 984,   Bit8 (966~984) 19 975,

 1145 02:00:16.380717  TX Bit1 (976~991) 16 983,   Bit9 (967~984) 18 975,

 1146 02:00:16.380770  TX Bit2 (975~992) 18 983,   Bit10 (970~989) 20 979,

 1147 02:00:16.380824  TX Bit3 (969~985) 17 977,   Bit11 (966~983) 18 974,

 1148 02:00:16.380877  TX Bit4 (974~992) 19 983,   Bit12 (967~984) 18 975,

 1149 02:00:16.380931  TX Bit5 (971~986) 16 978,   Bit13 (967~983) 17 975,

 1150 02:00:16.380984  TX Bit6 (972~986) 15 979,   Bit14 (968~984) 17 976,

 1151 02:00:16.381038  TX Bit7 (976~989) 14 982,   Bit15 (969~985) 17 977,

 1152 02:00:16.381091  

 1153 02:00:16.381144  Write Rank0 MR14 =0x2

 1154 02:00:16.381217  

 1155 02:00:16.381303  	CH=0, VrefRange= 0, VrefLevel = 2

 1156 02:00:16.381360  TX Bit0 (977~993) 17 985,   Bit8 (965~984) 20 974,

 1157 02:00:16.381415  TX Bit1 (976~992) 17 984,   Bit9 (967~984) 18 975,

 1158 02:00:16.381469  TX Bit2 (975~992) 18 983,   Bit10 (970~989) 20 979,

 1159 02:00:16.381524  TX Bit3 (969~985) 17 977,   Bit11 (966~984) 19 975,

 1160 02:00:16.381578  TX Bit4 (974~992) 19 983,   Bit12 (967~984) 18 975,

 1161 02:00:16.381632  TX Bit5 (970~986) 17 978,   Bit13 (966~983) 18 974,

 1162 02:00:16.381685  TX Bit6 (971~987) 17 979,   Bit14 (968~984) 17 976,

 1163 02:00:16.381739  TX Bit7 (976~990) 15 983,   Bit15 (969~986) 18 977,

 1164 02:00:16.381792  

 1165 02:00:16.381845  Write Rank0 MR14 =0x4

 1166 02:00:16.381898  

 1167 02:00:16.381951  	CH=0, VrefRange= 0, VrefLevel = 4

 1168 02:00:16.382005  TX Bit0 (976~993) 18 984,   Bit8 (966~984) 19 975,

 1169 02:00:16.382059  TX Bit1 (976~992) 17 984,   Bit9 (967~984) 18 975,

 1170 02:00:16.382112  TX Bit2 (975~992) 18 983,   Bit10 (970~990) 21 980,

 1171 02:00:16.382165  TX Bit3 (969~986) 18 977,   Bit11 (964~984) 21 974,

 1172 02:00:16.382219  TX Bit4 (974~992) 19 983,   Bit12 (967~984) 18 975,

 1173 02:00:16.382273  TX Bit5 (970~986) 17 978,   Bit13 (966~983) 18 974,

 1174 02:00:16.382326  TX Bit6 (971~987) 17 979,   Bit14 (967~985) 19 976,

 1175 02:00:16.382577  TX Bit7 (975~990) 16 982,   Bit15 (969~986) 18 977,

 1176 02:00:16.382673  

 1177 02:00:16.382780  Write Rank0 MR14 =0x6

 1178 02:00:16.382882  

 1179 02:00:16.382975  	CH=0, VrefRange= 0, VrefLevel = 6

 1180 02:00:16.383065  TX Bit0 (976~994) 19 985,   Bit8 (964~985) 22 974,

 1181 02:00:16.383151  TX Bit1 (976~992) 17 984,   Bit9 (966~985) 20 975,

 1182 02:00:16.383235  TX Bit2 (975~992) 18 983,   Bit10 (969~990) 22 979,

 1183 02:00:16.383319  TX Bit3 (969~986) 18 977,   Bit11 (963~984) 22 973,

 1184 02:00:16.383404  TX Bit4 (974~993) 20 983,   Bit12 (966~985) 20 975,

 1185 02:00:16.383488  TX Bit5 (970~987) 18 978,   Bit13 (965~983) 19 974,

 1186 02:00:16.383572  TX Bit6 (970~988) 19 979,   Bit14 (967~985) 19 976,

 1187 02:00:16.383657  TX Bit7 (975~990) 16 982,   Bit15 (969~987) 19 978,

 1188 02:00:16.383743  

 1189 02:00:16.383826  Write Rank0 MR14 =0x8

 1190 02:00:16.383908  

 1191 02:00:16.383991  	CH=0, VrefRange= 0, VrefLevel = 8

 1192 02:00:16.384075  TX Bit0 (976~994) 19 985,   Bit8 (964~985) 22 974,

 1193 02:00:16.384159  TX Bit1 (975~992) 18 983,   Bit9 (967~985) 19 976,

 1194 02:00:16.384243  TX Bit2 (975~993) 19 984,   Bit10 (969~990) 22 979,

 1195 02:00:16.384327  TX Bit3 (968~987) 20 977,   Bit11 (964~985) 22 974,

 1196 02:00:16.384411  TX Bit4 (973~993) 21 983,   Bit12 (967~985) 19 976,

 1197 02:00:16.384495  TX Bit5 (969~987) 19 978,   Bit13 (965~983) 19 974,

 1198 02:00:16.384579  TX Bit6 (970~989) 20 979,   Bit14 (967~986) 20 976,

 1199 02:00:16.384663  TX Bit7 (974~991) 18 982,   Bit15 (969~988) 20 978,

 1200 02:00:16.384746  

 1201 02:00:16.384829  Write Rank0 MR14 =0xa

 1202 02:00:16.384911  

 1203 02:00:16.384994  	CH=0, VrefRange= 0, VrefLevel = 10

 1204 02:00:16.385077  TX Bit0 (975~994) 20 984,   Bit8 (963~985) 23 974,

 1205 02:00:16.385161  TX Bit1 (975~993) 19 984,   Bit9 (967~985) 19 976,

 1206 02:00:16.385245  TX Bit2 (974~993) 20 983,   Bit10 (969~990) 22 979,

 1207 02:00:16.385319  TX Bit3 (968~987) 20 977,   Bit11 (963~985) 23 974,

 1208 02:00:16.385374  TX Bit4 (973~993) 21 983,   Bit12 (966~986) 21 976,

 1209 02:00:16.385429  TX Bit5 (969~988) 20 978,   Bit13 (965~984) 20 974,

 1210 02:00:16.385484  TX Bit6 (970~990) 21 980,   Bit14 (966~986) 21 976,

 1211 02:00:16.385539  TX Bit7 (974~991) 18 982,   Bit15 (968~989) 22 978,

 1212 02:00:16.385593  

 1213 02:00:16.385646  Write Rank0 MR14 =0xc

 1214 02:00:16.385706  

 1215 02:00:16.385788  	CH=0, VrefRange= 0, VrefLevel = 12

 1216 02:00:16.385847  TX Bit0 (975~994) 20 984,   Bit8 (963~986) 24 974,

 1217 02:00:16.385904  TX Bit1 (975~993) 19 984,   Bit9 (965~986) 22 975,

 1218 02:00:16.385959  TX Bit2 (974~993) 20 983,   Bit10 (969~991) 23 980,

 1219 02:00:16.386014  TX Bit3 (968~987) 20 977,   Bit11 (963~986) 24 974,

 1220 02:00:16.386069  TX Bit4 (972~994) 23 983,   Bit12 (965~987) 23 976,

 1221 02:00:16.386123  TX Bit5 (969~989) 21 979,   Bit13 (964~985) 22 974,

 1222 02:00:16.386177  TX Bit6 (969~990) 22 979,   Bit14 (966~987) 22 976,

 1223 02:00:16.386231  TX Bit7 (973~992) 20 982,   Bit15 (968~989) 22 978,

 1224 02:00:16.386285  

 1225 02:00:16.386338  Write Rank0 MR14 =0xe

 1226 02:00:16.386392  

 1227 02:00:16.386445  	CH=0, VrefRange= 0, VrefLevel = 14

 1228 02:00:16.386499  TX Bit0 (975~995) 21 985,   Bit8 (963~986) 24 974,

 1229 02:00:16.386553  TX Bit1 (974~994) 21 984,   Bit9 (965~987) 23 976,

 1230 02:00:16.386607  TX Bit2 (974~993) 20 983,   Bit10 (969~991) 23 980,

 1231 02:00:16.386661  TX Bit3 (968~988) 21 978,   Bit11 (962~986) 25 974,

 1232 02:00:16.386715  TX Bit4 (972~994) 23 983,   Bit12 (966~987) 22 976,

 1233 02:00:16.386769  TX Bit5 (969~990) 22 979,   Bit13 (964~985) 22 974,

 1234 02:00:16.386823  TX Bit6 (969~991) 23 980,   Bit14 (966~988) 23 977,

 1235 02:00:16.386876  TX Bit7 (972~992) 21 982,   Bit15 (968~989) 22 978,

 1236 02:00:16.386930  

 1237 02:00:16.386983  Write Rank0 MR14 =0x10

 1238 02:00:16.387036  

 1239 02:00:16.387092  	CH=0, VrefRange= 0, VrefLevel = 16

 1240 02:00:16.387146  TX Bit0 (975~995) 21 985,   Bit8 (962~987) 26 974,

 1241 02:00:16.387202  TX Bit1 (974~994) 21 984,   Bit9 (965~987) 23 976,

 1242 02:00:16.387255  TX Bit2 (973~994) 22 983,   Bit10 (969~991) 23 980,

 1243 02:00:16.387310  TX Bit3 (967~988) 22 977,   Bit11 (963~987) 25 975,

 1244 02:00:16.387364  TX Bit4 (971~995) 25 983,   Bit12 (965~988) 24 976,

 1245 02:00:16.387418  TX Bit5 (969~991) 23 980,   Bit13 (963~986) 24 974,

 1246 02:00:16.387471  TX Bit6 (969~991) 23 980,   Bit14 (965~988) 24 976,

 1247 02:00:16.387525  TX Bit7 (971~992) 22 981,   Bit15 (968~989) 22 978,

 1248 02:00:16.387579  

 1249 02:00:16.387633  Write Rank0 MR14 =0x12

 1250 02:00:16.387686  

 1251 02:00:16.387739  	CH=0, VrefRange= 0, VrefLevel = 18

 1252 02:00:16.387793  TX Bit0 (974~996) 23 985,   Bit8 (963~988) 26 975,

 1253 02:00:16.387848  TX Bit1 (974~994) 21 984,   Bit9 (964~988) 25 976,

 1254 02:00:16.387901  TX Bit2 (973~994) 22 983,   Bit10 (969~991) 23 980,

 1255 02:00:16.387955  TX Bit3 (967~990) 24 978,   Bit11 (962~987) 26 974,

 1256 02:00:16.388009  TX Bit4 (971~995) 25 983,   Bit12 (963~988) 26 975,

 1257 02:00:16.388063  TX Bit5 (968~991) 24 979,   Bit13 (963~986) 24 974,

 1258 02:00:16.388117  TX Bit6 (969~991) 23 980,   Bit14 (964~989) 26 976,

 1259 02:00:16.388172  TX Bit7 (971~993) 23 982,   Bit15 (968~989) 22 978,

 1260 02:00:16.388226  

 1261 02:00:16.388279  Write Rank0 MR14 =0x14

 1262 02:00:16.388333  

 1263 02:00:16.388386  	CH=0, VrefRange= 0, VrefLevel = 20

 1264 02:00:16.388439  TX Bit0 (974~996) 23 985,   Bit8 (962~987) 26 974,

 1265 02:00:16.388493  TX Bit1 (974~995) 22 984,   Bit9 (963~988) 26 975,

 1266 02:00:16.388548  TX Bit2 (972~994) 23 983,   Bit10 (969~992) 24 980,

 1267 02:00:16.388601  TX Bit3 (967~990) 24 978,   Bit11 (962~988) 27 975,

 1268 02:00:16.388655  TX Bit4 (971~995) 25 983,   Bit12 (964~988) 25 976,

 1269 02:00:16.388709  TX Bit5 (968~991) 24 979,   Bit13 (962~987) 26 974,

 1270 02:00:16.388764  TX Bit6 (969~991) 23 980,   Bit14 (964~989) 26 976,

 1271 02:00:16.388818  TX Bit7 (971~993) 23 982,   Bit15 (968~990) 23 979,

 1272 02:00:16.388871  

 1273 02:00:16.388925  wait MRW command Rank0 MR14 =0x16 fired (1)

 1274 02:00:16.388979  Write Rank0 MR14 =0x16

 1275 02:00:16.389033  

 1276 02:00:16.389086  	CH=0, VrefRange= 0, VrefLevel = 22

 1277 02:00:16.389140  TX Bit0 (973~996) 24 984,   Bit8 (962~987) 26 974,

 1278 02:00:16.389393  TX Bit1 (972~995) 24 983,   Bit9 (963~989) 27 976,

 1279 02:00:16.389455  TX Bit2 (972~995) 24 983,   Bit10 (968~992) 25 980,

 1280 02:00:16.389511  TX Bit3 (967~990) 24 978,   Bit11 (961~988) 28 974,

 1281 02:00:16.389566  TX Bit4 (971~995) 25 983,   Bit12 (963~989) 27 976,

 1282 02:00:16.389620  TX Bit5 (968~991) 24 979,   Bit13 (962~988) 27 975,

 1283 02:00:16.389674  TX Bit6 (969~992) 24 980,   Bit14 (963~989) 27 976,

 1284 02:00:16.389729  TX Bit7 (971~993) 23 982,   Bit15 (967~990) 24 978,

 1285 02:00:16.389783  

 1286 02:00:16.389836  Write Rank0 MR14 =0x18

 1287 02:00:16.389890  

 1288 02:00:16.389944  	CH=0, VrefRange= 0, VrefLevel = 24

 1289 02:00:16.389998  TX Bit0 (973~997) 25 985,   Bit8 (962~987) 26 974,

 1290 02:00:16.390053  TX Bit1 (972~995) 24 983,   Bit9 (963~988) 26 975,

 1291 02:00:16.390107  TX Bit2 (971~995) 25 983,   Bit10 (968~991) 24 979,

 1292 02:00:16.390161  TX Bit3 (967~991) 25 979,   Bit11 (962~987) 26 974,

 1293 02:00:16.390229  TX Bit4 (971~996) 26 983,   Bit12 (963~989) 27 976,

 1294 02:00:16.390284  TX Bit5 (968~991) 24 979,   Bit13 (962~988) 27 975,

 1295 02:00:16.390338  TX Bit6 (968~992) 25 980,   Bit14 (964~988) 25 976,

 1296 02:00:16.390393  TX Bit7 (970~993) 24 981,   Bit15 (967~990) 24 978,

 1297 02:00:16.390447  

 1298 02:00:16.390501  Write Rank0 MR14 =0x1a

 1299 02:00:16.390555  

 1300 02:00:16.390608  	CH=0, VrefRange= 0, VrefLevel = 26

 1301 02:00:16.390662  TX Bit0 (973~997) 25 985,   Bit8 (962~987) 26 974,

 1302 02:00:16.390716  TX Bit1 (972~995) 24 983,   Bit9 (963~988) 26 975,

 1303 02:00:16.390770  TX Bit2 (971~995) 25 983,   Bit10 (968~991) 24 979,

 1304 02:00:16.390824  TX Bit3 (967~991) 25 979,   Bit11 (962~987) 26 974,

 1305 02:00:16.390877  TX Bit4 (971~996) 26 983,   Bit12 (963~989) 27 976,

 1306 02:00:16.390930  TX Bit5 (968~991) 24 979,   Bit13 (962~988) 27 975,

 1307 02:00:16.390984  TX Bit6 (968~992) 25 980,   Bit14 (964~988) 25 976,

 1308 02:00:16.391037  TX Bit7 (970~993) 24 981,   Bit15 (967~990) 24 978,

 1309 02:00:16.391091  

 1310 02:00:16.391144  Write Rank0 MR14 =0x1c

 1311 02:00:16.391198  

 1312 02:00:16.391250  	CH=0, VrefRange= 0, VrefLevel = 28

 1313 02:00:16.391304  TX Bit0 (973~997) 25 985,   Bit8 (962~987) 26 974,

 1314 02:00:16.391358  TX Bit1 (972~995) 24 983,   Bit9 (963~988) 26 975,

 1315 02:00:16.391412  TX Bit2 (971~995) 25 983,   Bit10 (968~991) 24 979,

 1316 02:00:16.391466  TX Bit3 (967~991) 25 979,   Bit11 (962~987) 26 974,

 1317 02:00:16.391520  TX Bit4 (971~996) 26 983,   Bit12 (963~989) 27 976,

 1318 02:00:16.391574  TX Bit5 (968~991) 24 979,   Bit13 (962~988) 27 975,

 1319 02:00:16.391628  TX Bit6 (968~992) 25 980,   Bit14 (964~988) 25 976,

 1320 02:00:16.391683  TX Bit7 (970~993) 24 981,   Bit15 (967~990) 24 978,

 1321 02:00:16.391736  

 1322 02:00:16.391790  Write Rank0 MR14 =0x1e

 1323 02:00:16.391844  

 1324 02:00:16.391897  	CH=0, VrefRange= 0, VrefLevel = 30

 1325 02:00:16.391951  TX Bit0 (973~997) 25 985,   Bit8 (962~987) 26 974,

 1326 02:00:16.392005  TX Bit1 (972~995) 24 983,   Bit9 (963~988) 26 975,

 1327 02:00:16.392059  TX Bit2 (971~995) 25 983,   Bit10 (968~991) 24 979,

 1328 02:00:16.392113  TX Bit3 (967~991) 25 979,   Bit11 (962~987) 26 974,

 1329 02:00:16.392167  TX Bit4 (971~996) 26 983,   Bit12 (963~989) 27 976,

 1330 02:00:16.392221  TX Bit5 (968~991) 24 979,   Bit13 (962~988) 27 975,

 1331 02:00:16.392275  TX Bit6 (968~992) 25 980,   Bit14 (964~988) 25 976,

 1332 02:00:16.392329  TX Bit7 (970~993) 24 981,   Bit15 (967~990) 24 978,

 1333 02:00:16.392382  

 1334 02:00:16.392434  

 1335 02:00:16.392488  TX Vref found, early break! 373< 382

 1336 02:00:16.392542  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 1337 02:00:16.392596  u1DelayCellOfst[0]=7 cells (6 PI)

 1338 02:00:16.392650  u1DelayCellOfst[1]=5 cells (4 PI)

 1339 02:00:16.392704  u1DelayCellOfst[2]=5 cells (4 PI)

 1340 02:00:16.392758  u1DelayCellOfst[3]=0 cells (0 PI)

 1341 02:00:16.392814  u1DelayCellOfst[4]=5 cells (4 PI)

 1342 02:00:16.392867  u1DelayCellOfst[5]=0 cells (0 PI)

 1343 02:00:16.392921  u1DelayCellOfst[6]=1 cells (1 PI)

 1344 02:00:16.392974  u1DelayCellOfst[7]=2 cells (2 PI)

 1345 02:00:16.393027  Byte0, DQ PI dly=979, DQM PI dly= 982

 1346 02:00:16.393080  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)

 1347 02:00:16.393134  

 1348 02:00:16.393188  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)

 1349 02:00:16.393242  

 1350 02:00:16.393305  u1DelayCellOfst[8]=0 cells (0 PI)

 1351 02:00:16.393360  u1DelayCellOfst[9]=1 cells (1 PI)

 1352 02:00:16.393414  u1DelayCellOfst[10]=6 cells (5 PI)

 1353 02:00:16.393468  u1DelayCellOfst[11]=0 cells (0 PI)

 1354 02:00:16.393521  u1DelayCellOfst[12]=2 cells (2 PI)

 1355 02:00:16.393575  u1DelayCellOfst[13]=1 cells (1 PI)

 1356 02:00:16.393628  u1DelayCellOfst[14]=2 cells (2 PI)

 1357 02:00:16.393682  u1DelayCellOfst[15]=5 cells (4 PI)

 1358 02:00:16.393735  Byte1, DQ PI dly=974, DQM PI dly= 976

 1359 02:00:16.393789  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)

 1360 02:00:16.393843  

 1361 02:00:16.393896  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)

 1362 02:00:16.393950  

 1363 02:00:16.394003  Write Rank0 MR14 =0x18

 1364 02:00:16.394056  

 1365 02:00:16.394108  Final TX Range 0 Vref 24

 1366 02:00:16.394162  

 1367 02:00:16.394215  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 1368 02:00:16.394269  

 1369 02:00:16.394322  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 1370 02:00:16.394376  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 1371 02:00:16.394430  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 1372 02:00:16.394484  Write Rank0 MR3 =0xb0

 1373 02:00:16.394537  DramC Write-DBI on

 1374 02:00:16.394591  ==

 1375 02:00:16.394644  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1376 02:00:16.394698  fsp= 1, odt_onoff= 1, Byte mode= 0

 1377 02:00:16.394751  ==

 1378 02:00:16.394805  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 1379 02:00:16.394858  

 1380 02:00:16.394911  Begin, DQ Scan Range 696~760

 1381 02:00:16.394964  

 1382 02:00:16.395017  

 1383 02:00:16.395070  	TX Vref Scan disable

 1384 02:00:16.395123  696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 1385 02:00:16.395178  697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1386 02:00:16.395232  698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1387 02:00:16.395287  699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1388 02:00:16.395341  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1389 02:00:16.395587  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1390 02:00:16.395649  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1391 02:00:16.395705  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1392 02:00:16.395759  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1393 02:00:16.395814  705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]

 1394 02:00:16.395869  706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]

 1395 02:00:16.395923  707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]

 1396 02:00:16.395977  708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]

 1397 02:00:16.396031  709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]

 1398 02:00:16.396086  710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]

 1399 02:00:16.396140  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 1400 02:00:16.396195  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 1401 02:00:16.396250  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 1402 02:00:16.396304  734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]

 1403 02:00:16.396358  735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]

 1404 02:00:16.396412  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 1405 02:00:16.396466  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 1406 02:00:16.396520  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 1407 02:00:16.396574  739 |2 6 35|[0] xxxxxxxx xxxxxxxx [MSB]

 1408 02:00:16.396628  Byte0, DQ PI dly=726, DQM PI dly= 726

 1409 02:00:16.396682  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 22)

 1410 02:00:16.396735  

 1411 02:00:16.396788  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 22)

 1412 02:00:16.396842  

 1413 02:00:16.396895  Byte1, DQ PI dly=719, DQM PI dly= 719

 1414 02:00:16.396947  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 15)

 1415 02:00:16.397001  

 1416 02:00:16.397053  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 15)

 1417 02:00:16.397107  

 1418 02:00:16.397160  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 1419 02:00:16.397214  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 1420 02:00:16.397287  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 1421 02:00:16.397344  Write Rank0 MR3 =0x30

 1422 02:00:16.397397  DramC Write-DBI off

 1423 02:00:16.397450  

 1424 02:00:16.397503  [DATLAT]

 1425 02:00:16.397556  Freq=1600, CH0 RK0, use_rxtx_scan=0

 1426 02:00:16.397610  

 1427 02:00:16.397662  DATLAT Default: 0xf

 1428 02:00:16.397715  7, 0xFFFF, sum=0

 1429 02:00:16.397769  8, 0xFFFF, sum=0

 1430 02:00:16.397824  9, 0xFFFF, sum=0

 1431 02:00:16.397878  10, 0xFFFF, sum=0

 1432 02:00:16.397932  11, 0xFFFF, sum=0

 1433 02:00:16.397986  12, 0xFFFF, sum=0

 1434 02:00:16.398039  13, 0xFFFF, sum=0

 1435 02:00:16.398092  14, 0x0, sum=1

 1436 02:00:16.398146  15, 0x0, sum=2

 1437 02:00:16.398199  16, 0x0, sum=3

 1438 02:00:16.398253  17, 0x0, sum=4

 1439 02:00:16.398306  pattern=2 first_step=14 total pass=5 best_step=16

 1440 02:00:16.398361  ==

 1441 02:00:16.398414  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1442 02:00:16.398467  fsp= 1, odt_onoff= 1, Byte mode= 0

 1443 02:00:16.398521  ==

 1444 02:00:16.398574  Start DQ dly to find pass range UseTestEngine =1

 1445 02:00:16.398627  x-axis: bit #, y-axis: DQ dly (-127~63)

 1446 02:00:16.398681  RX Vref Scan = 1

 1447 02:00:16.398734  

 1448 02:00:16.398786  RX Vref found, early break!

 1449 02:00:16.398839  

 1450 02:00:16.398893  Final RX Vref 13, apply to both rank0 and 1

 1451 02:00:16.398947  ==

 1452 02:00:16.398999  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1453 02:00:16.399053  fsp= 1, odt_onoff= 1, Byte mode= 0

 1454 02:00:16.399106  ==

 1455 02:00:16.399159  DQS Delay:

 1456 02:00:16.399212  DQS0 = 0, DQS1 = 0

 1457 02:00:16.399265  DQM Delay:

 1458 02:00:16.399318  DQM0 = 20, DQM1 = 19

 1459 02:00:16.399371  DQ Delay:

 1460 02:00:16.399425  DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15

 1461 02:00:16.399478  DQ4 =22, DQ5 =16, DQ6 =17, DQ7 =19

 1462 02:00:16.399531  DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =17

 1463 02:00:16.399584  DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20

 1464 02:00:16.399637  

 1465 02:00:16.399689  

 1466 02:00:16.399742  

 1467 02:00:16.399794  [DramC_TX_OE_Calibration] TA2

 1468 02:00:16.399847  Original DQ_B0 (3 6) =30, OEN = 27

 1469 02:00:16.399901  Original DQ_B1 (3 6) =30, OEN = 27

 1470 02:00:16.399954  23, 0x0, End_B0=23 End_B1=23

 1471 02:00:16.400008  24, 0x0, End_B0=24 End_B1=24

 1472 02:00:16.400062  25, 0x0, End_B0=25 End_B1=25

 1473 02:00:16.400116  26, 0x0, End_B0=26 End_B1=26

 1474 02:00:16.400169  27, 0x0, End_B0=27 End_B1=27

 1475 02:00:16.400223  28, 0x0, End_B0=28 End_B1=28

 1476 02:00:16.400277  29, 0x0, End_B0=29 End_B1=29

 1477 02:00:16.400330  30, 0x0, End_B0=30 End_B1=30

 1478 02:00:16.400384  31, 0xFFFF, End_B0=30 End_B1=30

 1479 02:00:16.400438  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 1480 02:00:16.400492  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 1481 02:00:16.400547  

 1482 02:00:16.400600  

 1483 02:00:16.400653  Write Rank0 MR23 =0x3f

 1484 02:00:16.400706  [DQSOSC]

 1485 02:00:16.400759  [DQSOSCAuto] RK0, (LSB)MR18= 0xac, (MSB)MR19= 0x3, tDQSOscB0 = 335 ps tDQSOscB1 = 0 ps

 1486 02:00:16.400813  CH0_RK0: MR19=0x3, MR18=0xAC, DQSOSC=335, MR23=63, INC=21, DEC=32

 1487 02:00:16.400871  Write Rank0 MR23 =0x3f

 1488 02:00:16.400925  [DQSOSC]

 1489 02:00:16.400982  [DQSOSCAuto] RK0, (LSB)MR18= 0xa8, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps

 1490 02:00:16.401076  CH0 RK0: MR19=3, MR18=A8

 1491 02:00:16.401161  [RankSwap] Rank num 2, (Multi 1), Rank 1

 1492 02:00:16.401243  Write Rank0 MR2 =0xad

 1493 02:00:16.401310  [Write Leveling]

 1494 02:00:16.401365  delay  byte0  byte1  byte2  byte3

 1495 02:00:16.401419  

 1496 02:00:16.401472  10    0   0   

 1497 02:00:16.401527  11    0   0   

 1498 02:00:16.401581  12    0   0   

 1499 02:00:16.401635  13    0   0   

 1500 02:00:16.401689  14    0   0   

 1501 02:00:16.401743  15    0   0   

 1502 02:00:16.401796  16    0   0   

 1503 02:00:16.401850  17    0   0   

 1504 02:00:16.401904  18    0   0   

 1505 02:00:16.401958  19    0   0   

 1506 02:00:16.402012  20    0   0   

 1507 02:00:16.402066  21    0   0   

 1508 02:00:16.402120  22    0   0   

 1509 02:00:16.402173  23    0   0   

 1510 02:00:16.402227  24    0   0   

 1511 02:00:16.402281  25    0   0   

 1512 02:00:16.402334  26    0   0   

 1513 02:00:16.402388  27    0   0   

 1514 02:00:16.402442  28    0   0   

 1515 02:00:16.402496  29    0   0   

 1516 02:00:16.402549  30    0   ff   

 1517 02:00:16.402603  31    0   ff   

 1518 02:00:16.402658  32    0   ff   

 1519 02:00:16.402712  33    0   ff   

 1520 02:00:16.402765  34    0   ff   

 1521 02:00:16.402819  35    ff   ff   

 1522 02:00:16.402873  36    ff   ff   

 1523 02:00:16.402926  37    ff   ff   

 1524 02:00:16.402979  38    ff   ff   

 1525 02:00:16.403033  39    ff   ff   

 1526 02:00:16.403087  40    ff   ff   

 1527 02:00:16.403141  41    ff   ff   

 1528 02:00:16.403194  pass bytecount = 0xff (0xff: all bytes pass) 

 1529 02:00:16.403248  

 1530 02:00:16.403300  DQS0 dly: 35

 1531 02:00:16.403353  DQS1 dly: 30

 1532 02:00:16.403406  Write Rank0 MR2 =0x2d

 1533 02:00:16.403459  [RankSwap] Rank num 2, (Multi 1), Rank 0

 1534 02:00:16.403512  Write Rank1 MR1 =0xd6

 1535 02:00:16.403565  [Gating]

 1536 02:00:16.403617  ==

 1537 02:00:16.403670  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1538 02:00:16.403723  fsp= 1, odt_onoff= 1, Byte mode= 0

 1539 02:00:16.403777  ==

 1540 02:00:16.403830  3 1 0 |2c2b 2c2b  |(11 11)(11 11) |(1 1)(1 1)| 0

 1541 02:00:16.404078  3 1 4 |2c2b 2c2b  |(11 11)(11 11) |(0 0)(0 0)| 0

 1542 02:00:16.404140  3 1 8 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1543 02:00:16.404196  3 1 12 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1544 02:00:16.404250  3 1 16 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1545 02:00:16.404305  3 1 20 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1546 02:00:16.404359  3 1 24 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1547 02:00:16.404413  3 1 28 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1548 02:00:16.404467  3 2 0 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1549 02:00:16.404522  3 2 4 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1550 02:00:16.404576  3 2 8 |1818 2c2b  |(11 11)(11 1) |(0 0)(0 0)| 0

 1551 02:00:16.404630  3 2 12 |3534 2c2c  |(11 11)(11 0) |(0 0)(0 0)| 0

 1552 02:00:16.404684  3 2 16 |3534 201  |(11 11)(11 11) |(0 0)(0 0)| 0

 1553 02:00:16.404739  3 2 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 1554 02:00:16.404793  3 2 24 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 1555 02:00:16.404847  3 2 28 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 1556 02:00:16.404902  3 3 0 |3534 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 1557 02:00:16.404956  3 3 4 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 1558 02:00:16.405010  3 3 8 |3534 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 1559 02:00:16.405064  3 3 12 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1560 02:00:16.405118  3 3 16 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1561 02:00:16.405172  [Byte 0] Lead/lag Transition tap number (1)

 1562 02:00:16.405226  3 3 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1563 02:00:16.405293  3 3 24 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1564 02:00:16.405348  3 3 28 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1565 02:00:16.405402  3 4 0 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1566 02:00:16.405457  3 4 4 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 1567 02:00:16.405511  3 4 8 |3534 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 1568 02:00:16.405565  3 4 12 |707 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1569 02:00:16.405619  3 4 16 |3d3d 2323  |(11 11)(11 11) |(1 1)(1 1)| 0

 1570 02:00:16.405673  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1571 02:00:16.405727  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1572 02:00:16.405781  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1573 02:00:16.405835  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1574 02:00:16.405888  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1575 02:00:16.405942  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1576 02:00:16.405995  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1577 02:00:16.406049  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1578 02:00:16.406140  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1579 02:00:16.406223  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1580 02:00:16.406281  3 5 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1581 02:00:16.406336  3 6 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1582 02:00:16.406390  [Byte 0] Lead/lag falling Transition (3, 6, 0)

 1583 02:00:16.406443  [Byte 1] Lead/lag falling Transition (3, 6, 0)

 1584 02:00:16.406497  3 6 4 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 0)| 0

 1585 02:00:16.406551  [Byte 0] Lead/lag Transition tap number (2)

 1586 02:00:16.406604  3 6 8 |403 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 1587 02:00:16.406658  [Byte 1] Lead/lag Transition tap number (3)

 1588 02:00:16.406711  3 6 12 |404 3e3d  |(1 1)(11 11) |(0 0)(0 0)| 0

 1589 02:00:16.406765  3 6 16 |4646 404  |(0 0)(11 11) |(0 0)(0 0)| 0

 1590 02:00:16.406820  [Byte 0]First pass (3, 6, 16)

 1591 02:00:16.406873  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1592 02:00:16.406927  [Byte 1]First pass (3, 6, 20)

 1593 02:00:16.406980  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1594 02:00:16.407035  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1595 02:00:16.407088  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1596 02:00:16.407143  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1597 02:00:16.407198  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1598 02:00:16.407252  3 7 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1599 02:00:16.407305  3 7 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1600 02:00:16.407360  3 7 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1601 02:00:16.407413  All bytes gating window > 1UI, Early break!

 1602 02:00:16.407467  

 1603 02:00:16.407519  best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)

 1604 02:00:16.407573  

 1605 02:00:16.407625  best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)

 1606 02:00:16.407678  

 1607 02:00:16.407731  

 1608 02:00:16.407783  

 1609 02:00:16.407836  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)

 1610 02:00:16.407890  

 1611 02:00:16.407943  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)

 1612 02:00:16.407995  

 1613 02:00:16.408048  

 1614 02:00:16.408100  Write Rank1 MR1 =0x56

 1615 02:00:16.408153  

 1616 02:00:16.408206  best RODT dly(2T, 0.5T) = (2, 3)

 1617 02:00:16.408259  

 1618 02:00:16.408311  best RODT dly(2T, 0.5T) = (2, 3)

 1619 02:00:16.408364  ==

 1620 02:00:16.408418  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1621 02:00:16.408471  fsp= 1, odt_onoff= 1, Byte mode= 0

 1622 02:00:16.408525  ==

 1623 02:00:16.408578  Start DQ dly to find pass range UseTestEngine =0

 1624 02:00:16.408631  x-axis: bit #, y-axis: DQ dly (-127~63)

 1625 02:00:16.408684  RX Vref Scan = 0

 1626 02:00:16.408737  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 1627 02:00:16.408792  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 1628 02:00:16.408847  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 1629 02:00:16.408901  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 1630 02:00:16.408954  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 1631 02:00:16.409009  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 1632 02:00:16.409063  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 1633 02:00:16.409117  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 1634 02:00:16.409170  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 1635 02:00:16.409224  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 1636 02:00:16.409291  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 1637 02:00:16.409348  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 1638 02:00:16.409402  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 1639 02:00:16.409456  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 1640 02:00:16.409510  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 1641 02:00:16.409565  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 1642 02:00:16.409619  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 1643 02:00:16.409673  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 1644 02:00:16.409727  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 1645 02:00:16.409982  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 1646 02:00:16.410043  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 1647 02:00:16.410099  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 1648 02:00:16.410153  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 1649 02:00:16.410207  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 1650 02:00:16.410261  -2, [0] xxxxxxxx xxxxxxxx [MSB]

 1651 02:00:16.410333  -1, [0] xxxoxxxx xxxoxxxx [MSB]

 1652 02:00:16.410388  0, [0] xxxoxoxx oxxoxoox [MSB]

 1653 02:00:16.410443  1, [0] xxxoxoxx ooxoooox [MSB]

 1654 02:00:16.410497  2, [0] xxxoxooo ooxoooox [MSB]

 1655 02:00:16.410551  3, [0] xxxoxooo ooxooooo [MSB]

 1656 02:00:16.410605  4, [0] xxxoxooo ooxooooo [MSB]

 1657 02:00:16.410659  5, [0] xxxoxooo ooxooooo [MSB]

 1658 02:00:16.410713  6, [0] xxxooooo oooooooo [MSB]

 1659 02:00:16.410767  7, [0] xooooooo oooooooo [MSB]

 1660 02:00:16.410821  8, [0] xooooooo oooooooo [MSB]

 1661 02:00:16.410875  9, [0] xooooooo oooooooo [MSB]

 1662 02:00:16.410928  34, [0] oooooooo oooooooo [MSB]

 1663 02:00:16.410982  35, [0] oooxoooo oooxoooo [MSB]

 1664 02:00:16.411037  36, [0] oooxoxoo oooxoxxo [MSB]

 1665 02:00:16.411090  37, [0] oooxoxxx xooxoxxo [MSB]

 1666 02:00:16.411144  38, [0] oooxoxxx xxoxxxxo [MSB]

 1667 02:00:16.411197  39, [0] oooxoxxx xxoxxxxx [MSB]

 1668 02:00:16.411251  40, [0] oooxoxxx xxoxxxxx [MSB]

 1669 02:00:16.411306  41, [0] oooxoxxx xxoxxxxx [MSB]

 1670 02:00:16.411360  42, [0] oooxxxxx xxoxxxxx [MSB]

 1671 02:00:16.411415  43, [0] xoxxxxxx xxxxxxxx [MSB]

 1672 02:00:16.411469  44, [0] xxxxxxxx xxxxxxxx [MSB]

 1673 02:00:16.411523  iDelay=44, Bit 0, Center 26 (10 ~ 42) 33

 1674 02:00:16.411576  iDelay=44, Bit 1, Center 25 (7 ~ 43) 37

 1675 02:00:16.411629  iDelay=44, Bit 2, Center 24 (7 ~ 42) 36

 1676 02:00:16.411683  iDelay=44, Bit 3, Center 16 (-1 ~ 34) 36

 1677 02:00:16.411736  iDelay=44, Bit 4, Center 23 (6 ~ 41) 36

 1678 02:00:16.411789  iDelay=44, Bit 5, Center 17 (0 ~ 35) 36

 1679 02:00:16.411842  iDelay=44, Bit 6, Center 19 (2 ~ 36) 35

 1680 02:00:16.411895  iDelay=44, Bit 7, Center 19 (2 ~ 36) 35

 1681 02:00:16.411948  iDelay=44, Bit 8, Center 18 (0 ~ 36) 37

 1682 02:00:16.412001  iDelay=44, Bit 9, Center 19 (1 ~ 37) 37

 1683 02:00:16.412054  iDelay=44, Bit 10, Center 24 (6 ~ 42) 37

 1684 02:00:16.412107  iDelay=44, Bit 11, Center 16 (-1 ~ 34) 36

 1685 02:00:16.412159  iDelay=44, Bit 12, Center 19 (1 ~ 37) 37

 1686 02:00:16.412212  iDelay=44, Bit 13, Center 17 (0 ~ 35) 36

 1687 02:00:16.412265  iDelay=44, Bit 14, Center 17 (0 ~ 35) 36

 1688 02:00:16.412317  iDelay=44, Bit 15, Center 20 (3 ~ 38) 36

 1689 02:00:16.412370  ==

 1690 02:00:16.412423  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1691 02:00:16.412477  fsp= 1, odt_onoff= 1, Byte mode= 0

 1692 02:00:16.412530  ==

 1693 02:00:16.412583  DQS Delay:

 1694 02:00:16.412636  DQS0 = 0, DQS1 = 0

 1695 02:00:16.412692  DQM Delay:

 1696 02:00:16.412744  DQM0 = 21, DQM1 = 18

 1697 02:00:16.412798  DQ Delay:

 1698 02:00:16.412851  DQ0 =26, DQ1 =25, DQ2 =24, DQ3 =16

 1699 02:00:16.412904  DQ4 =23, DQ5 =17, DQ6 =19, DQ7 =19

 1700 02:00:16.412957  DQ8 =18, DQ9 =19, DQ10 =24, DQ11 =16

 1701 02:00:16.413010  DQ12 =19, DQ13 =17, DQ14 =17, DQ15 =20

 1702 02:00:16.413064  

 1703 02:00:16.413117  

 1704 02:00:16.413169  DramC Write-DBI off

 1705 02:00:16.413222  ==

 1706 02:00:16.413284  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1707 02:00:16.413339  fsp= 1, odt_onoff= 1, Byte mode= 0

 1708 02:00:16.413393  ==

 1709 02:00:16.413446  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 1710 02:00:16.413499  

 1711 02:00:16.413552  Begin, DQ Scan Range 926~1182

 1712 02:00:16.413605  

 1713 02:00:16.413658  

 1714 02:00:16.413710  	TX Vref Scan disable

 1715 02:00:16.413762  926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]

 1716 02:00:16.413817  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 1717 02:00:16.413872  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 1718 02:00:16.413927  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 1719 02:00:16.413980  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 1720 02:00:16.414034  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 1721 02:00:16.414088  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 1722 02:00:16.414142  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1723 02:00:16.414196  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 1724 02:00:16.414250  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 1725 02:00:16.414303  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 1726 02:00:16.414357  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 1727 02:00:16.414412  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 1728 02:00:16.414465  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 1729 02:00:16.414519  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 1730 02:00:16.414573  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 1731 02:00:16.414627  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 1732 02:00:16.414681  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 1733 02:00:16.414734  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 1734 02:00:16.414788  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 1735 02:00:16.414842  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 1736 02:00:16.414896  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 1737 02:00:16.414949  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 1738 02:00:16.415003  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 1739 02:00:16.415057  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 1740 02:00:16.415111  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 1741 02:00:16.415165  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 1742 02:00:16.415219  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1743 02:00:16.415273  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1744 02:00:16.415327  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1745 02:00:16.415382  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1746 02:00:16.415436  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1747 02:00:16.415491  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1748 02:00:16.415545  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1749 02:00:16.415598  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1750 02:00:16.415653  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1751 02:00:16.415706  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 1752 02:00:16.415760  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 1753 02:00:16.415815  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 1754 02:00:16.415869  965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 1755 02:00:16.415923  966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 1756 02:00:16.415977  967 |3 6 7|[0] xxxxxxxx xxxoxoxx [MSB]

 1757 02:00:16.416030  968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]

 1758 02:00:16.416083  969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]

 1759 02:00:16.416137  970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]

 1760 02:00:16.416191  971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]

 1761 02:00:16.416245  972 |3 6 12|[0] xxxxxxxx ooxooooo [MSB]

 1762 02:00:16.416299  973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]

 1763 02:00:16.416546  974 |3 6 14|[0] xxxoxoox oooooooo [MSB]

 1764 02:00:16.416606  975 |3 6 15|[0] xxxoxoox oooooooo [MSB]

 1765 02:00:16.416661  976 |3 6 16|[0] xxxoxooo oooooooo [MSB]

 1766 02:00:16.416715  977 |3 6 17|[0] xxxooooo oooooooo [MSB]

 1767 02:00:16.416770  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 1768 02:00:16.416824  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 1769 02:00:16.416878  993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]

 1770 02:00:16.416932  994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]

 1771 02:00:16.416987  995 |3 6 35|[0] oooooxoo xxxxxxxx [MSB]

 1772 02:00:16.417041  996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]

 1773 02:00:16.417095  997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]

 1774 02:00:16.417149  998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]

 1775 02:00:16.417202  Byte0, DQ PI dly=985, DQM PI dly= 985

 1776 02:00:16.417261  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)

 1777 02:00:16.417320  

 1778 02:00:16.417373  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)

 1779 02:00:16.417426  

 1780 02:00:16.417479  Byte1, DQ PI dly=979, DQM PI dly= 979

 1781 02:00:16.417532  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)

 1782 02:00:16.417586  

 1783 02:00:16.417639  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)

 1784 02:00:16.417692  

 1785 02:00:16.417744  ==

 1786 02:00:16.417796  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1787 02:00:16.417850  fsp= 1, odt_onoff= 1, Byte mode= 0

 1788 02:00:16.417903  ==

 1789 02:00:16.417956  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 1790 02:00:16.418009  

 1791 02:00:16.418063  Begin, DQ Scan Range 955~1019

 1792 02:00:16.418116  Write Rank1 MR14 =0x0

 1793 02:00:16.418169  

 1794 02:00:16.418221  	CH=0, VrefRange= 0, VrefLevel = 0

 1795 02:00:16.418274  TX Bit0 (980~999) 20 989,   Bit8 (969~986) 18 977,

 1796 02:00:16.418328  TX Bit1 (979~998) 20 988,   Bit9 (970~988) 19 979,

 1797 02:00:16.418381  TX Bit2 (979~997) 19 988,   Bit10 (975~991) 17 983,

 1798 02:00:16.418434  TX Bit3 (974~991) 18 982,   Bit11 (968~986) 19 977,

 1799 02:00:16.418487  TX Bit4 (979~997) 19 988,   Bit12 (969~987) 19 978,

 1800 02:00:16.418541  TX Bit5 (977~991) 15 984,   Bit13 (969~986) 18 977,

 1801 02:00:16.418595  TX Bit6 (977~992) 16 984,   Bit14 (970~987) 18 978,

 1802 02:00:16.418648  TX Bit7 (978~994) 17 986,   Bit15 (973~989) 17 981,

 1803 02:00:16.418702  

 1804 02:00:16.418754  Write Rank1 MR14 =0x2

 1805 02:00:16.418807  

 1806 02:00:16.418859  	CH=0, VrefRange= 0, VrefLevel = 2

 1807 02:00:16.418912  TX Bit0 (979~999) 21 989,   Bit8 (969~987) 19 978,

 1808 02:00:16.418965  TX Bit1 (979~998) 20 988,   Bit9 (969~988) 20 978,

 1809 02:00:16.419018  TX Bit2 (979~998) 20 988,   Bit10 (975~991) 17 983,

 1810 02:00:16.419071  TX Bit3 (974~992) 19 983,   Bit11 (968~987) 20 977,

 1811 02:00:16.419124  TX Bit4 (979~998) 20 988,   Bit12 (969~988) 20 978,

 1812 02:00:16.419178  TX Bit5 (976~991) 16 983,   Bit13 (969~986) 18 977,

 1813 02:00:16.419232  TX Bit6 (977~993) 17 985,   Bit14 (969~987) 19 978,

 1814 02:00:16.419284  TX Bit7 (978~994) 17 986,   Bit15 (975~990) 16 982,

 1815 02:00:16.419338  

 1816 02:00:16.419390  Write Rank1 MR14 =0x4

 1817 02:00:16.419442  

 1818 02:00:16.419495  	CH=0, VrefRange= 0, VrefLevel = 4

 1819 02:00:16.419548  TX Bit0 (979~999) 21 989,   Bit8 (969~988) 20 978,

 1820 02:00:16.419601  TX Bit1 (978~998) 21 988,   Bit9 (969~989) 21 979,

 1821 02:00:16.419679  TX Bit2 (979~998) 20 988,   Bit10 (975~992) 18 983,

 1822 02:00:16.419734  TX Bit3 (973~992) 20 982,   Bit11 (968~988) 21 978,

 1823 02:00:16.419788  TX Bit4 (979~998) 20 988,   Bit12 (969~989) 21 979,

 1824 02:00:16.419842  TX Bit5 (976~991) 16 983,   Bit13 (968~987) 20 977,

 1825 02:00:16.419896  TX Bit6 (976~993) 18 984,   Bit14 (969~988) 20 978,

 1826 02:00:16.419949  TX Bit7 (977~995) 19 986,   Bit15 (972~990) 19 981,

 1827 02:00:16.420003  

 1828 02:00:16.420057  Write Rank1 MR14 =0x6

 1829 02:00:16.420111  

 1830 02:00:16.420164  	CH=0, VrefRange= 0, VrefLevel = 6

 1831 02:00:16.420216  TX Bit0 (979~999) 21 989,   Bit8 (968~988) 21 978,

 1832 02:00:16.420270  TX Bit1 (978~999) 22 988,   Bit9 (969~990) 22 979,

 1833 02:00:16.420323  TX Bit2 (978~998) 21 988,   Bit10 (975~992) 18 983,

 1834 02:00:16.420377  TX Bit3 (973~992) 20 982,   Bit11 (968~988) 21 978,

 1835 02:00:16.420430  TX Bit4 (978~998) 21 988,   Bit12 (968~989) 22 978,

 1836 02:00:16.420483  TX Bit5 (976~992) 17 984,   Bit13 (968~987) 20 977,

 1837 02:00:16.420536  TX Bit6 (976~994) 19 985,   Bit14 (969~989) 21 979,

 1838 02:00:16.420590  TX Bit7 (977~996) 20 986,   Bit15 (972~990) 19 981,

 1839 02:00:16.420642  

 1840 02:00:16.420695  Write Rank1 MR14 =0x8

 1841 02:00:16.420748  

 1842 02:00:16.420800  	CH=0, VrefRange= 0, VrefLevel = 8

 1843 02:00:16.420854  TX Bit0 (979~1000) 22 989,   Bit8 (968~989) 22 978,

 1844 02:00:16.420907  TX Bit1 (978~999) 22 988,   Bit9 (969~990) 22 979,

 1845 02:00:16.420960  TX Bit2 (978~999) 22 988,   Bit10 (974~992) 19 983,

 1846 02:00:16.421014  TX Bit3 (972~993) 22 982,   Bit11 (968~989) 22 978,

 1847 02:00:16.421067  TX Bit4 (978~999) 22 988,   Bit12 (968~990) 23 979,

 1848 02:00:16.421120  TX Bit5 (975~992) 18 983,   Bit13 (968~988) 21 978,

 1849 02:00:16.421173  TX Bit6 (976~994) 19 985,   Bit14 (969~989) 21 979,

 1850 02:00:16.421226  TX Bit7 (977~997) 21 987,   Bit15 (971~990) 20 980,

 1851 02:00:16.421291  

 1852 02:00:16.421345  Write Rank1 MR14 =0xa

 1853 02:00:16.421398  

 1854 02:00:16.421451  	CH=0, VrefRange= 0, VrefLevel = 10

 1855 02:00:16.421505  TX Bit0 (979~1000) 22 989,   Bit8 (968~989) 22 978,

 1856 02:00:16.421558  TX Bit1 (978~999) 22 988,   Bit9 (969~990) 22 979,

 1857 02:00:16.421611  TX Bit2 (978~999) 22 988,   Bit10 (974~993) 20 983,

 1858 02:00:16.421665  TX Bit3 (972~993) 22 982,   Bit11 (968~989) 22 978,

 1859 02:00:16.421719  TX Bit4 (978~999) 22 988,   Bit12 (968~990) 23 979,

 1860 02:00:16.421772  TX Bit5 (975~993) 19 984,   Bit13 (968~989) 22 978,

 1861 02:00:16.421825  TX Bit6 (975~995) 21 985,   Bit14 (969~990) 22 979,

 1862 02:00:16.421878  TX Bit7 (977~997) 21 987,   Bit15 (971~991) 21 981,

 1863 02:00:16.421932  

 1864 02:00:16.421984  Write Rank1 MR14 =0xc

 1865 02:00:16.422037  

 1866 02:00:16.422090  	CH=0, VrefRange= 0, VrefLevel = 12

 1867 02:00:16.422143  TX Bit0 (979~1000) 22 989,   Bit8 (968~990) 23 979,

 1868 02:00:16.422198  TX Bit1 (978~999) 22 988,   Bit9 (968~990) 23 979,

 1869 02:00:16.422251  TX Bit2 (978~999) 22 988,   Bit10 (973~993) 21 983,

 1870 02:00:16.422501  TX Bit3 (971~994) 24 982,   Bit11 (967~990) 24 978,

 1871 02:00:16.422562  TX Bit4 (978~999) 22 988,   Bit12 (968~990) 23 979,

 1872 02:00:16.422617  TX Bit5 (974~993) 20 983,   Bit13 (968~989) 22 978,

 1873 02:00:16.422670  TX Bit6 (975~996) 22 985,   Bit14 (968~990) 23 979,

 1874 02:00:16.422724  TX Bit7 (977~998) 22 987,   Bit15 (971~991) 21 981,

 1875 02:00:16.422777  

 1876 02:00:16.422830  Write Rank1 MR14 =0xe

 1877 02:00:16.422883  

 1878 02:00:16.422936  	CH=0, VrefRange= 0, VrefLevel = 14

 1879 02:00:16.422989  TX Bit0 (978~1001) 24 989,   Bit8 (968~990) 23 979,

 1880 02:00:16.423043  TX Bit1 (977~999) 23 988,   Bit9 (968~991) 24 979,

 1881 02:00:16.423096  TX Bit2 (978~999) 22 988,   Bit10 (972~993) 22 982,

 1882 02:00:16.423149  TX Bit3 (971~995) 25 983,   Bit11 (967~990) 24 978,

 1883 02:00:16.423203  TX Bit4 (977~1000) 24 988,   Bit12 (968~990) 23 979,

 1884 02:00:16.423257  TX Bit5 (974~993) 20 983,   Bit13 (968~989) 22 978,

 1885 02:00:16.423310  TX Bit6 (974~996) 23 985,   Bit14 (968~990) 23 979,

 1886 02:00:16.423364  TX Bit7 (977~998) 22 987,   Bit15 (971~991) 21 981,

 1887 02:00:16.423417  

 1888 02:00:16.423470  Write Rank1 MR14 =0x10

 1889 02:00:16.423523  

 1890 02:00:16.423576  	CH=0, VrefRange= 0, VrefLevel = 16

 1891 02:00:16.423629  TX Bit0 (978~1001) 24 989,   Bit8 (968~990) 23 979,

 1892 02:00:16.423683  TX Bit1 (977~1000) 24 988,   Bit9 (968~991) 24 979,

 1893 02:00:16.423736  TX Bit2 (978~999) 22 988,   Bit10 (973~994) 22 983,

 1894 02:00:16.423789  TX Bit3 (971~995) 25 983,   Bit11 (967~990) 24 978,

 1895 02:00:16.423843  TX Bit4 (978~1000) 23 989,   Bit12 (968~991) 24 979,

 1896 02:00:16.423896  TX Bit5 (974~994) 21 984,   Bit13 (967~989) 23 978,

 1897 02:00:16.423949  TX Bit6 (974~997) 24 985,   Bit14 (967~990) 24 978,

 1898 02:00:16.424002  TX Bit7 (976~998) 23 987,   Bit15 (969~992) 24 980,

 1899 02:00:16.424055  

 1900 02:00:16.424108  Write Rank1 MR14 =0x12

 1901 02:00:16.424161  

 1902 02:00:16.424214  	CH=0, VrefRange= 0, VrefLevel = 18

 1903 02:00:16.424268  TX Bit0 (978~1002) 25 990,   Bit8 (967~990) 24 978,

 1904 02:00:16.424321  TX Bit1 (977~1000) 24 988,   Bit9 (968~991) 24 979,

 1905 02:00:16.424374  TX Bit2 (978~1000) 23 989,   Bit10 (971~994) 24 982,

 1906 02:00:16.424428  TX Bit3 (971~996) 26 983,   Bit11 (966~990) 25 978,

 1907 02:00:16.424481  TX Bit4 (977~1000) 24 988,   Bit12 (968~991) 24 979,

 1908 02:00:16.424534  TX Bit5 (974~995) 22 984,   Bit13 (966~990) 25 978,

 1909 02:00:16.424588  TX Bit6 (973~997) 25 985,   Bit14 (967~991) 25 979,

 1910 02:00:16.424641  TX Bit7 (976~999) 24 987,   Bit15 (970~992) 23 981,

 1911 02:00:16.424693  

 1912 02:00:16.424746  Write Rank1 MR14 =0x14

 1913 02:00:16.424798  

 1914 02:00:16.424851  	CH=0, VrefRange= 0, VrefLevel = 20

 1915 02:00:16.424904  TX Bit0 (977~1002) 26 989,   Bit8 (967~990) 24 978,

 1916 02:00:16.424956  TX Bit1 (977~1000) 24 988,   Bit9 (968~991) 24 979,

 1917 02:00:16.425009  TX Bit2 (977~1000) 24 988,   Bit10 (972~995) 24 983,

 1918 02:00:16.425063  TX Bit3 (970~997) 28 983,   Bit11 (966~991) 26 978,

 1919 02:00:16.425117  TX Bit4 (977~1001) 25 989,   Bit12 (967~991) 25 979,

 1920 02:00:16.425171  TX Bit5 (973~996) 24 984,   Bit13 (967~990) 24 978,

 1921 02:00:16.425224  TX Bit6 (973~998) 26 985,   Bit14 (968~991) 24 979,

 1922 02:00:16.425301  TX Bit7 (976~999) 24 987,   Bit15 (969~992) 24 980,

 1923 02:00:16.425387  

 1924 02:00:16.425481  Write Rank1 MR14 =0x16

 1925 02:00:16.425562  

 1926 02:00:16.425618  	CH=0, VrefRange= 0, VrefLevel = 22

 1927 02:00:16.425672  TX Bit0 (977~1002) 26 989,   Bit8 (967~990) 24 978,

 1928 02:00:16.425726  TX Bit1 (977~1000) 24 988,   Bit9 (968~991) 24 979,

 1929 02:00:16.425780  TX Bit2 (977~1000) 24 988,   Bit10 (972~995) 24 983,

 1930 02:00:16.425833  TX Bit3 (970~997) 28 983,   Bit11 (966~991) 26 978,

 1931 02:00:16.425887  TX Bit4 (977~1001) 25 989,   Bit12 (967~991) 25 979,

 1932 02:00:16.425941  TX Bit5 (973~996) 24 984,   Bit13 (967~990) 24 978,

 1933 02:00:16.425994  TX Bit6 (973~998) 26 985,   Bit14 (968~991) 24 979,

 1934 02:00:16.426047  TX Bit7 (976~999) 24 987,   Bit15 (969~992) 24 980,

 1935 02:00:16.426100  

 1936 02:00:16.426153  Write Rank1 MR14 =0x18

 1937 02:00:16.426205  

 1938 02:00:16.426258  	CH=0, VrefRange= 0, VrefLevel = 24

 1939 02:00:16.426317  TX Bit0 (977~1003) 27 990,   Bit8 (967~991) 25 979,

 1940 02:00:16.426371  TX Bit1 (977~1001) 25 989,   Bit9 (968~991) 24 979,

 1941 02:00:16.426425  TX Bit2 (977~1001) 25 989,   Bit10 (970~994) 25 982,

 1942 02:00:16.426478  TX Bit3 (970~995) 26 982,   Bit11 (967~990) 24 978,

 1943 02:00:16.426531  TX Bit4 (976~1001) 26 988,   Bit12 (967~991) 25 979,

 1944 02:00:16.426585  TX Bit5 (972~997) 26 984,   Bit13 (966~990) 25 978,

 1945 02:00:16.426638  TX Bit6 (972~998) 27 985,   Bit14 (967~991) 25 979,

 1946 02:00:16.426691  TX Bit7 (975~999) 25 987,   Bit15 (969~992) 24 980,

 1947 02:00:16.426745  

 1948 02:00:16.426798  Write Rank1 MR14 =0x1a

 1949 02:00:16.426851  

 1950 02:00:16.426903  	CH=0, VrefRange= 0, VrefLevel = 26

 1951 02:00:16.426956  TX Bit0 (977~1003) 27 990,   Bit8 (967~991) 25 979,

 1952 02:00:16.427010  TX Bit1 (977~1001) 25 989,   Bit9 (968~991) 24 979,

 1953 02:00:16.427063  TX Bit2 (977~1001) 25 989,   Bit10 (970~994) 25 982,

 1954 02:00:16.427117  TX Bit3 (970~995) 26 982,   Bit11 (967~990) 24 978,

 1955 02:00:16.427170  TX Bit4 (976~1001) 26 988,   Bit12 (967~991) 25 979,

 1956 02:00:16.427223  TX Bit5 (972~997) 26 984,   Bit13 (966~990) 25 978,

 1957 02:00:16.427276  TX Bit6 (972~998) 27 985,   Bit14 (967~991) 25 979,

 1958 02:00:16.427330  TX Bit7 (975~999) 25 987,   Bit15 (969~992) 24 980,

 1959 02:00:16.427383  

 1960 02:00:16.427435  Write Rank1 MR14 =0x1c

 1961 02:00:16.427488  

 1962 02:00:16.427540  	CH=0, VrefRange= 0, VrefLevel = 28

 1963 02:00:16.427593  TX Bit0 (977~1003) 27 990,   Bit8 (967~991) 25 979,

 1964 02:00:16.427647  TX Bit1 (977~1001) 25 989,   Bit9 (968~991) 24 979,

 1965 02:00:16.427700  TX Bit2 (977~1001) 25 989,   Bit10 (970~994) 25 982,

 1966 02:00:16.427753  TX Bit3 (970~995) 26 982,   Bit11 (967~990) 24 978,

 1967 02:00:16.427806  TX Bit4 (976~1001) 26 988,   Bit12 (967~991) 25 979,

 1968 02:00:16.427859  TX Bit5 (972~997) 26 984,   Bit13 (966~990) 25 978,

 1969 02:00:16.428108  TX Bit6 (972~998) 27 985,   Bit14 (967~991) 25 979,

 1970 02:00:16.428168  TX Bit7 (975~999) 25 987,   Bit15 (969~992) 24 980,

 1971 02:00:16.428223  

 1972 02:00:16.428276  Write Rank1 MR14 =0x1e

 1973 02:00:16.428330  

 1974 02:00:16.428382  	CH=0, VrefRange= 0, VrefLevel = 30

 1975 02:00:16.668309  TX Bit0 (977~1003) 27 990,   Bit8 (967~991) 25 979,

 1976 02:00:16.668452  TX Bit1 (977~1001) 25 989,   Bit9 (968~991) 24 979,

 1977 02:00:16.668518  TX Bit2 (977~1001) 25 989,   Bit10 (970~994) 25 982,

 1978 02:00:16.668579  TX Bit3 (970~995) 26 982,   Bit11 (967~990) 24 978,

 1979 02:00:16.668637  TX Bit4 (976~1001) 26 988,   Bit12 (967~991) 25 979,

 1980 02:00:16.668695  TX Bit5 (972~997) 26 984,   Bit13 (966~990) 25 978,

 1981 02:00:16.668751  TX Bit6 (972~998) 27 985,   Bit14 (967~991) 25 979,

 1982 02:00:16.668807  TX Bit7 (975~999) 25 987,   Bit15 (969~992) 24 980,

 1983 02:00:16.668862  

 1984 02:00:16.668916  

 1985 02:00:16.668970  TX Vref found, early break! 379< 383

 1986 02:00:16.669025  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 1987 02:00:16.669078  u1DelayCellOfst[0]=10 cells (8 PI)

 1988 02:00:16.669132  u1DelayCellOfst[1]=8 cells (7 PI)

 1989 02:00:16.669187  u1DelayCellOfst[2]=8 cells (7 PI)

 1990 02:00:16.669241  u1DelayCellOfst[3]=0 cells (0 PI)

 1991 02:00:16.669332  u1DelayCellOfst[4]=7 cells (6 PI)

 1992 02:00:16.669391  u1DelayCellOfst[5]=2 cells (2 PI)

 1993 02:00:16.669445  u1DelayCellOfst[6]=3 cells (3 PI)

 1994 02:00:16.669498  u1DelayCellOfst[7]=6 cells (5 PI)

 1995 02:00:16.669551  Byte0, DQ PI dly=982, DQM PI dly= 986

 1996 02:00:16.669605  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)

 1997 02:00:16.669660  

 1998 02:00:16.669714  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)

 1999 02:00:16.669768  

 2000 02:00:16.669821  u1DelayCellOfst[8]=1 cells (1 PI)

 2001 02:00:16.669875  u1DelayCellOfst[9]=1 cells (1 PI)

 2002 02:00:16.669928  u1DelayCellOfst[10]=5 cells (4 PI)

 2003 02:00:16.669981  u1DelayCellOfst[11]=0 cells (0 PI)

 2004 02:00:16.670034  u1DelayCellOfst[12]=1 cells (1 PI)

 2005 02:00:16.670087  u1DelayCellOfst[13]=0 cells (0 PI)

 2006 02:00:16.670141  u1DelayCellOfst[14]=1 cells (1 PI)

 2007 02:00:16.670226  u1DelayCellOfst[15]=2 cells (2 PI)

 2008 02:00:16.670329  Byte1, DQ PI dly=978, DQM PI dly= 980

 2009 02:00:16.670387  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)

 2010 02:00:16.670442  

 2011 02:00:16.670516  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)

 2012 02:00:16.670573  

 2013 02:00:16.670627  Write Rank1 MR14 =0x18

 2014 02:00:16.670680  

 2015 02:00:16.670733  Final TX Range 0 Vref 24

 2016 02:00:16.670786  

 2017 02:00:16.670840  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 2018 02:00:16.670926  

 2019 02:00:16.670994  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 2020 02:00:16.671092  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2021 02:00:16.671182  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2022 02:00:16.671266  Write Rank1 MR3 =0xb0

 2023 02:00:16.671348  DramC Write-DBI on

 2024 02:00:16.671431  ==

 2025 02:00:16.671514  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2026 02:00:16.671598  fsp= 1, odt_onoff= 1, Byte mode= 0

 2027 02:00:16.671680  ==

 2028 02:00:16.671763  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 2029 02:00:16.671845  

 2030 02:00:16.671927  Begin, DQ Scan Range 700~764

 2031 02:00:16.672009  

 2032 02:00:16.672090  

 2033 02:00:16.672185  	TX Vref Scan disable

 2034 02:00:16.672270  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 2035 02:00:16.672355  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 2036 02:00:16.672441  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2037 02:00:16.672527  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2038 02:00:16.672612  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2039 02:00:16.672697  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2040 02:00:16.672783  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2041 02:00:16.672868  707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 2042 02:00:16.672953  708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 2043 02:00:16.673038  709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]

 2044 02:00:16.673123  710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]

 2045 02:00:16.673208  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 2046 02:00:16.673292  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 2047 02:00:16.673349  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 2048 02:00:16.673403  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 2049 02:00:16.673459  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 2050 02:00:16.673513  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 2051 02:00:16.673569  717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]

 2052 02:00:16.673623  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 2053 02:00:16.673677  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 2054 02:00:16.673730  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 2055 02:00:16.673784  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 2056 02:00:16.673838  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 2057 02:00:16.673892  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 2058 02:00:16.673946  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 2059 02:00:16.674000  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 2060 02:00:16.674054  744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]

 2061 02:00:16.674108  745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]

 2062 02:00:16.674162  Byte0, DQ PI dly=731, DQM PI dly= 731

 2063 02:00:16.674215  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)

 2064 02:00:16.674269  

 2065 02:00:16.674321  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)

 2066 02:00:16.674375  

 2067 02:00:16.674428  Byte1, DQ PI dly=722, DQM PI dly= 722

 2068 02:00:16.674481  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)

 2069 02:00:16.674534  

 2070 02:00:16.674587  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)

 2071 02:00:16.674640  

 2072 02:00:16.674692  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 2073 02:00:16.674746  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2074 02:00:16.674799  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2075 02:00:16.674852  Write Rank1 MR3 =0x30

 2076 02:00:16.674905  DramC Write-DBI off

 2077 02:00:16.674957  

 2078 02:00:16.675009  [DATLAT]

 2079 02:00:16.675062  Freq=1600, CH0 RK1, use_rxtx_scan=0

 2080 02:00:16.675115  

 2081 02:00:16.675167  DATLAT Default: 0x10

 2082 02:00:16.675219  7, 0xFFFF, sum=0

 2083 02:00:16.675273  8, 0xFFFF, sum=0

 2084 02:00:16.675327  9, 0xFFFF, sum=0

 2085 02:00:16.675381  10, 0xFFFF, sum=0

 2086 02:00:16.675450  11, 0xFFFF, sum=0

 2087 02:00:16.675505  12, 0xFFFF, sum=0

 2088 02:00:16.675559  13, 0xFFFF, sum=0

 2089 02:00:16.675613  14, 0x0, sum=1

 2090 02:00:16.675878  15, 0x0, sum=2

 2091 02:00:16.675968  16, 0x0, sum=3

 2092 02:00:16.676026  17, 0x0, sum=4

 2093 02:00:16.676081  pattern=2 first_step=14 total pass=5 best_step=16

 2094 02:00:16.676135  ==

 2095 02:00:16.676188  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2096 02:00:16.676242  fsp= 1, odt_onoff= 1, Byte mode= 0

 2097 02:00:16.676296  ==

 2098 02:00:16.676350  Start DQ dly to find pass range UseTestEngine =1

 2099 02:00:16.676404  x-axis: bit #, y-axis: DQ dly (-127~63)

 2100 02:00:16.676458  RX Vref Scan = 0

 2101 02:00:16.676511  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 2102 02:00:16.676566  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 2103 02:00:16.676620  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 2104 02:00:16.676674  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 2105 02:00:16.676728  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 2106 02:00:16.676782  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 2107 02:00:16.676836  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 2108 02:00:16.676890  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 2109 02:00:16.676944  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 2110 02:00:16.676999  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 2111 02:00:16.677053  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 2112 02:00:16.677107  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 2113 02:00:16.677162  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 2114 02:00:16.677216  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 2115 02:00:16.677283  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 2116 02:00:16.677368  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 2117 02:00:16.677459  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 2118 02:00:16.677518  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 2119 02:00:16.677573  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 2120 02:00:16.677627  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 2121 02:00:16.677682  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 2122 02:00:16.677736  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 2123 02:00:16.677790  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 2124 02:00:16.677845  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 2125 02:00:16.677899  -2, [0] xxxoxxxx xxxxxxxx [MSB]

 2126 02:00:16.677957  -1, [0] xxxoxxxx xxxxxxxx [MSB]

 2127 02:00:16.678013  0, [0] xxxoxxxx oxxxxoxx [MSB]

 2128 02:00:16.678069  1, [0] xxxoxoxx oxxoxoox [MSB]

 2129 02:00:16.678124  2, [0] xxxoxooo ooxoooox [MSB]

 2130 02:00:16.678179  3, [0] xxxoxooo ooxooooo [MSB]

 2131 02:00:16.678234  4, [0] xxxoxooo ooxooooo [MSB]

 2132 02:00:16.678289  5, [0] xxxooooo ooxooooo [MSB]

 2133 02:00:16.678344  6, [0] xxxooooo oooooooo [MSB]

 2134 02:00:16.678398  7, [0] xooooooo oooooooo [MSB]

 2135 02:00:16.678453  34, [0] oooxoooo oooxoooo [MSB]

 2136 02:00:16.678507  35, [0] oooxoxoo oooxoxoo [MSB]

 2137 02:00:16.678562  36, [0] oooxoxxo oooxoxoo [MSB]

 2138 02:00:16.678616  37, [0] oooxoxxx xooxxxxo [MSB]

 2139 02:00:16.678677  38, [0] oooxoxxx xooxxxxo [MSB]

 2140 02:00:16.678731  39, [0] oooxoxxx xxoxxxxx [MSB]

 2141 02:00:16.678786  40, [0] oooxoxxx xxoxxxxx [MSB]

 2142 02:00:16.678840  41, [0] oooxoxxx xxoxxxxx [MSB]

 2143 02:00:16.678895  42, [0] oooxxxxx xxxxxxxx [MSB]

 2144 02:00:16.678949  43, [0] xxxxxxxx xxxxxxxx [MSB]

 2145 02:00:16.679004  iDelay=43, Bit 0, Center 25 (8 ~ 42) 35

 2146 02:00:16.679066  iDelay=43, Bit 1, Center 24 (7 ~ 42) 36

 2147 02:00:16.679135  iDelay=43, Bit 2, Center 24 (7 ~ 42) 36

 2148 02:00:16.679190  iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36

 2149 02:00:16.679244  iDelay=43, Bit 4, Center 23 (5 ~ 41) 37

 2150 02:00:16.679298  iDelay=43, Bit 5, Center 17 (1 ~ 34) 34

 2151 02:00:16.679352  iDelay=43, Bit 6, Center 18 (2 ~ 35) 34

 2152 02:00:16.679409  iDelay=43, Bit 7, Center 19 (2 ~ 36) 35

 2153 02:00:16.679463  iDelay=43, Bit 8, Center 18 (0 ~ 36) 37

 2154 02:00:16.679517  iDelay=43, Bit 9, Center 20 (2 ~ 38) 37

 2155 02:00:16.679571  iDelay=43, Bit 10, Center 23 (6 ~ 41) 36

 2156 02:00:16.679625  iDelay=43, Bit 11, Center 17 (1 ~ 33) 33

 2157 02:00:16.679679  iDelay=43, Bit 12, Center 19 (2 ~ 36) 35

 2158 02:00:16.679732  iDelay=43, Bit 13, Center 17 (0 ~ 34) 35

 2159 02:00:16.679786  iDelay=43, Bit 14, Center 18 (1 ~ 36) 36

 2160 02:00:16.679839  iDelay=43, Bit 15, Center 20 (3 ~ 38) 36

 2161 02:00:16.679893  ==

 2162 02:00:16.679946  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2163 02:00:16.680000  fsp= 1, odt_onoff= 1, Byte mode= 0

 2164 02:00:16.680053  ==

 2165 02:00:16.680107  DQS Delay:

 2166 02:00:16.680160  DQS0 = 0, DQS1 = 0

 2167 02:00:16.680214  DQM Delay:

 2168 02:00:16.680273  DQM0 = 20, DQM1 = 19

 2169 02:00:16.680328  DQ Delay:

 2170 02:00:16.680382  DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15

 2171 02:00:16.680436  DQ4 =23, DQ5 =17, DQ6 =18, DQ7 =19

 2172 02:00:16.680490  DQ8 =18, DQ9 =20, DQ10 =23, DQ11 =17

 2173 02:00:16.680544  DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20

 2174 02:00:16.680597  

 2175 02:00:16.680650  

 2176 02:00:16.680703  

 2177 02:00:16.680756  [DramC_TX_OE_Calibration] TA2

 2178 02:00:16.680810  Original DQ_B0 (3 6) =30, OEN = 27

 2179 02:00:16.680864  Original DQ_B1 (3 6) =30, OEN = 27

 2180 02:00:16.680917  23, 0x0, End_B0=23 End_B1=23

 2181 02:00:16.680972  24, 0x0, End_B0=24 End_B1=24

 2182 02:00:16.681025  25, 0x0, End_B0=25 End_B1=25

 2183 02:00:16.681080  26, 0x0, End_B0=26 End_B1=26

 2184 02:00:16.681134  27, 0x0, End_B0=27 End_B1=27

 2185 02:00:16.681188  28, 0x0, End_B0=28 End_B1=28

 2186 02:00:16.681241  29, 0x0, End_B0=29 End_B1=29

 2187 02:00:16.681329  30, 0x0, End_B0=30 End_B1=30

 2188 02:00:16.681425  31, 0xFFFE, End_B0=30 End_B1=30

 2189 02:00:16.681502  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2190 02:00:16.681559  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2191 02:00:16.681614  

 2192 02:00:16.681667  

 2193 02:00:16.681720  Write Rank1 MR23 =0x3f

 2194 02:00:16.681774  [DQSOSC]

 2195 02:00:16.681828  [DQSOSCAuto] RK1, (LSB)MR18= 0x78, (MSB)MR19= 0x3, tDQSOscB0 = 354 ps tDQSOscB1 = 0 ps

 2196 02:00:16.681888  CH0_RK1: MR19=0x3, MR18=0x78, DQSOSC=354, MR23=63, INC=19, DEC=29

 2197 02:00:16.681943  Write Rank1 MR23 =0x3f

 2198 02:00:16.681997  [DQSOSC]

 2199 02:00:16.682050  [DQSOSCAuto] RK1, (LSB)MR18= 0x7a, (MSB)MR19= 0x3, tDQSOscB0 = 353 ps tDQSOscB1 = 0 ps

 2200 02:00:16.682105  CH0 RK1: MR19=3, MR18=7A

 2201 02:00:16.682159  [RxdqsGatingPostProcess] freq 1600

 2202 02:00:16.682212  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 2203 02:00:16.682266  Rank: 0

 2204 02:00:16.682320  best DQS0 dly(2T, 0.5T) = (2, 5)

 2205 02:00:16.682374  best DQS1 dly(2T, 0.5T) = (2, 5)

 2206 02:00:16.682427  best DQS0 P1 dly(2T, 0.5T) = (3, 1)

 2207 02:00:16.682481  best DQS1 P1 dly(2T, 0.5T) = (3, 1)

 2208 02:00:16.682533  Rank: 1

 2209 02:00:16.682586  best DQS0 dly(2T, 0.5T) = (2, 6)

 2210 02:00:16.682667  best DQS1 dly(2T, 0.5T) = (2, 6)

 2211 02:00:16.682724  best DQS0 P1 dly(2T, 0.5T) = (3, 2)

 2212 02:00:16.682777  best DQS1 P1 dly(2T, 0.5T) = (3, 2)

 2213 02:00:16.682832  TX_dly_DQSgated check: min 2  max 3, ChangeDQSINCTL=-1

 2214 02:00:16.683080  DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9

 2215 02:00:16.683141  [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16

 2216 02:00:16.683196  Write Rank0 MR13 =0x59

 2217 02:00:16.683250  ==

 2218 02:00:16.683304  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2219 02:00:16.683358  fsp= 1, odt_onoff= 1, Byte mode= 0

 2220 02:00:16.683412  ==

 2221 02:00:16.683469  === u2Vref_new: 0x56 --> 0x3a

 2222 02:00:16.683525  === u2Vref_new: 0x58 --> 0x58

 2223 02:00:16.683579  === u2Vref_new: 0x5a --> 0x5a

 2224 02:00:16.683632  === u2Vref_new: 0x5c --> 0x78

 2225 02:00:16.683686  === u2Vref_new: 0x5e --> 0x7a

 2226 02:00:16.683754  === u2Vref_new: 0x60 --> 0x90

 2227 02:00:16.683815  [CA 0] Center 36 (9~63) winsize 55

 2228 02:00:16.683889  [CA 1] Center 34 (6~63) winsize 58

 2229 02:00:16.683986  [CA 2] Center 32 (3~61) winsize 59

 2230 02:00:16.684086  [CA 3] Center 32 (3~62) winsize 60

 2231 02:00:16.684171  [CA 4] Center 33 (3~63) winsize 61

 2232 02:00:16.684255  [CA 5] Center 25 (-1~52) winsize 54

 2233 02:00:16.684338  

 2234 02:00:16.684422  [CATrainingPosCal] consider 1 rank data

 2235 02:00:16.684506  u2DelayCellTimex100 = 762/100 ps

 2236 02:00:16.684589  CA0 delay=36 (9~63),Diff = 11 PI (14 cell)

 2237 02:00:16.684674  CA1 delay=34 (6~63),Diff = 9 PI (11 cell)

 2238 02:00:16.684757  CA2 delay=32 (3~61),Diff = 7 PI (8 cell)

 2239 02:00:16.684841  CA3 delay=32 (3~62),Diff = 7 PI (8 cell)

 2240 02:00:16.684925  CA4 delay=33 (3~63),Diff = 8 PI (10 cell)

 2241 02:00:16.685008  CA5 delay=25 (-1~52),Diff = 0 PI (0 cell)

 2242 02:00:16.685091  

 2243 02:00:16.685174  CA PerBit enable=1, Macro0, CA PI delay=25

 2244 02:00:16.685264  === u2Vref_new: 0x56 --> 0x3a

 2245 02:00:16.685351  

 2246 02:00:16.685434  Vref(ca) range 1: 22

 2247 02:00:16.685517  

 2248 02:00:16.685600  CS Dly= 10 (41-0-32)

 2249 02:00:16.685683  Write Rank0 MR13 =0xd8

 2250 02:00:16.685766  Write Rank0 MR13 =0xd8

 2251 02:00:16.685848  Write Rank0 MR12 =0x56

 2252 02:00:16.685931  Write Rank1 MR13 =0x59

 2253 02:00:16.686013  ==

 2254 02:00:16.686096  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 2255 02:00:16.686193  fsp= 1, odt_onoff= 1, Byte mode= 0

 2256 02:00:16.686281  ==

 2257 02:00:16.686364  === u2Vref_new: 0x56 --> 0x3a

 2258 02:00:16.686448  === u2Vref_new: 0x58 --> 0x58

 2259 02:00:16.686531  === u2Vref_new: 0x5a --> 0x5a

 2260 02:00:16.686615  === u2Vref_new: 0x5c --> 0x78

 2261 02:00:16.686698  === u2Vref_new: 0x5e --> 0x7a

 2262 02:00:16.686782  === u2Vref_new: 0x60 --> 0x90

 2263 02:00:16.686865  [CA 0] Center 36 (10~63) winsize 54

 2264 02:00:16.686949  [CA 1] Center 35 (8~63) winsize 56

 2265 02:00:16.687032  [CA 2] Center 33 (3~63) winsize 61

 2266 02:00:16.687114  [CA 3] Center 33 (3~63) winsize 61

 2267 02:00:16.687197  [CA 4] Center 33 (4~63) winsize 60

 2268 02:00:16.687280  [CA 5] Center 25 (-2~53) winsize 56

 2269 02:00:16.687362  

 2270 02:00:16.687453  [CATrainingPosCal] consider 2 rank data

 2271 02:00:16.687549  u2DelayCellTimex100 = 762/100 ps

 2272 02:00:16.687610  CA0 delay=36 (10~63),Diff = 11 PI (14 cell)

 2273 02:00:16.687665  CA1 delay=35 (8~63),Diff = 10 PI (12 cell)

 2274 02:00:16.687719  CA2 delay=32 (3~61),Diff = 7 PI (8 cell)

 2275 02:00:16.687773  CA3 delay=32 (3~62),Diff = 7 PI (8 cell)

 2276 02:00:16.687827  CA4 delay=33 (4~63),Diff = 8 PI (10 cell)

 2277 02:00:16.687881  CA5 delay=25 (-1~52),Diff = 0 PI (0 cell)

 2278 02:00:16.687935  

 2279 02:00:16.687988  CA PerBit enable=1, Macro0, CA PI delay=25

 2280 02:00:16.688042  === u2Vref_new: 0x56 --> 0x3a

 2281 02:00:16.688097  

 2282 02:00:16.688150  Vref(ca) range 1: 22

 2283 02:00:16.688203  

 2284 02:00:16.688256  CS Dly= 11 (42-0-32)

 2285 02:00:16.688309  Write Rank1 MR13 =0xd8

 2286 02:00:16.688362  Write Rank1 MR13 =0xd8

 2287 02:00:16.688415  Write Rank1 MR12 =0x56

 2288 02:00:16.688469  [RankSwap] Rank num 2, (Multi 1), Rank 0

 2289 02:00:16.688525  Write Rank0 MR2 =0xad

 2290 02:00:16.688580  [Write Leveling]

 2291 02:00:16.688633  delay  byte0  byte1  byte2  byte3

 2292 02:00:16.688687  

 2293 02:00:16.688739  10    0   0   

 2294 02:00:16.688794  11    0   0   

 2295 02:00:16.688848  12    0   0   

 2296 02:00:16.688902  13    0   0   

 2297 02:00:16.688956  14    0   0   

 2298 02:00:16.689010  15    0   0   

 2299 02:00:16.689070  16    0   0   

 2300 02:00:16.689156  17    0   0   

 2301 02:00:16.689263  18    0   0   

 2302 02:00:16.689364  19    0   0   

 2303 02:00:16.689457  20    0   0   

 2304 02:00:16.689543  21    0   0   

 2305 02:00:16.689628  22    0   0   

 2306 02:00:16.689713  23    0   0   

 2307 02:00:16.689798  24    0   0   

 2308 02:00:16.689883  25    0   0   

 2309 02:00:16.689968  26    0   0   

 2310 02:00:16.690052  27    0   0   

 2311 02:00:16.690119  28    0   0   

 2312 02:00:16.690175  29    0   0   

 2313 02:00:16.690229  30    0   0   

 2314 02:00:16.690284  31    0   ff   

 2315 02:00:16.690338  32    0   ff   

 2316 02:00:16.690392  33    0   ff   

 2317 02:00:16.690446  34    0   ff   

 2318 02:00:16.690501  35    ff   ff   

 2319 02:00:16.690555  36    0   ff   

 2320 02:00:16.690623  37    ff   ff   

 2321 02:00:16.690680  38    ff   ff   

 2322 02:00:16.690735  39    ff   ff   

 2323 02:00:16.690789  40    ff   ff   

 2324 02:00:16.690844  41    ff   ff   

 2325 02:00:16.690899  42    ff   ff   

 2326 02:00:16.690952  43    ff   ff   

 2327 02:00:16.691006  pass bytecount = 0xff (0xff: all bytes pass) 

 2328 02:00:16.691061  

 2329 02:00:16.691115  DQS0 dly: 37

 2330 02:00:16.691169  DQS1 dly: 31

 2331 02:00:16.691222  Write Rank0 MR2 =0x2d

 2332 02:00:16.691276  [RankSwap] Rank num 2, (Multi 1), Rank 0

 2333 02:00:16.691331  Write Rank0 MR1 =0xd6

 2334 02:00:16.691384  [Gating]

 2335 02:00:16.691448  ==

 2336 02:00:16.691502  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2337 02:00:16.691556  fsp= 1, odt_onoff= 1, Byte mode= 0

 2338 02:00:16.691611  ==

 2339 02:00:16.691665  3 1 0 |201 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 2340 02:00:16.691737  3 1 4 |2d2d 3534  |(11 11)(11 11) |(1 0)(1 1)| 0

 2341 02:00:16.691798  3 1 8 |2423 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 2342 02:00:16.695984  3 1 12 |3130 3534  |(11 11)(11 11) |(1 0)(0 1)| 0

 2343 02:00:16.699762  3 1 16 |d0d 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2344 02:00:16.702677  3 1 20 |2524 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2345 02:00:16.706114  3 1 24 |3030 3534  |(10 10)(11 11) |(1 1)(0 1)| 0

 2346 02:00:16.712513  3 1 28 |807 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 2347 02:00:16.716138  3 2 0 |3737 403  |(11 11)(11 11) |(1 1)(1 1)| 0

 2348 02:00:16.719372  3 2 4 |3939 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 2349 02:00:16.726353  3 2 8 |3a39 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 2350 02:00:16.729250  3 2 12 |3c3b 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2351 02:00:16.732681  3 2 16 |3535 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2352 02:00:16.739510  3 2 20 |1818 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2353 02:00:16.742630  3 2 24 |2625 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2354 02:00:16.745883  3 2 28 |3a3a 3d3d  |(0 0)(11 11) |(1 1)(1 1)| 0

 2355 02:00:16.749454  [Byte 0] Lead/lag falling Transition (3, 2, 28)

 2356 02:00:16.756184  3 3 0 |201 3d3d  |(11 11)(11 11) |(0 1)(1 1)| 0

 2357 02:00:16.759667  3 3 4 |3534 d0c  |(11 11)(11 11) |(0 1)(1 1)| 0

 2358 02:00:16.762705  3 3 8 |3534 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 2359 02:00:16.766427  3 3 12 |3534 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 2360 02:00:16.772989  [Byte 1] Lead/lag falling Transition (3, 3, 12)

 2361 02:00:16.776554  3 3 16 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2362 02:00:16.779690  3 3 20 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2363 02:00:16.786209  3 3 24 |3534 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2364 02:00:16.789987  3 3 28 |201 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2365 02:00:16.792977  3 4 0 |3d3d 201  |(11 11)(11 11) |(1 1)(1 1)| 0

 2366 02:00:16.799841  3 4 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2367 02:00:16.803373  3 4 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2368 02:00:16.806657  3 4 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2369 02:00:16.809763  3 4 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2370 02:00:16.816309  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2371 02:00:16.819869  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2372 02:00:16.823176  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2373 02:00:16.829862  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2374 02:00:16.833253  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2375 02:00:16.836855  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2376 02:00:16.840020  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2377 02:00:16.847062  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2378 02:00:16.849954  [Byte 0] Lead/lag falling Transition (3, 5, 16)

 2379 02:00:16.853325  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 2380 02:00:16.856829  [Byte 0] Lead/lag Transition tap number (2)

 2381 02:00:16.863837  3 5 24 |3e3d 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 2382 02:00:16.866761  [Byte 1] Lead/lag falling Transition (3, 5, 24)

 2383 02:00:16.870393  3 5 28 |606 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 2384 02:00:16.877060  [Byte 1] Lead/lag Transition tap number (2)

 2385 02:00:16.880760  3 6 0 |4646 403  |(0 0)(11 11) |(0 0)(0 0)| 0

 2386 02:00:16.880844  [Byte 0]First pass (3, 6, 0)

 2387 02:00:16.886890  3 6 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2388 02:00:16.886976  [Byte 1]First pass (3, 6, 4)

 2389 02:00:16.893649  3 6 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2390 02:00:16.897346  3 6 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2391 02:00:16.900506  3 6 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2392 02:00:16.903659  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2393 02:00:16.907461  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2394 02:00:16.913709  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2395 02:00:16.917129  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2396 02:00:16.920811  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2397 02:00:16.924071  All bytes gating window > 1UI, Early break!

 2398 02:00:16.924179  

 2399 02:00:16.927082  best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)

 2400 02:00:16.927170  

 2401 02:00:16.930976  best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)

 2402 02:00:16.933849  

 2403 02:00:16.933943  

 2404 02:00:16.934038  

 2405 02:00:16.937484  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)

 2406 02:00:16.937564  

 2407 02:00:16.940822  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)

 2408 02:00:16.940940  

 2409 02:00:16.941041  

 2410 02:00:16.944342  Write Rank0 MR1 =0x56

 2411 02:00:16.944440  

 2412 02:00:16.947707  best RODT dly(2T, 0.5T) = (2, 2)

 2413 02:00:16.947805  

 2414 02:00:16.947907  best RODT dly(2T, 0.5T) = (2, 2)

 2415 02:00:16.950939  ==

 2416 02:00:16.954208  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2417 02:00:16.957356  fsp= 1, odt_onoff= 1, Byte mode= 0

 2418 02:00:16.957447  ==

 2419 02:00:16.960874  Start DQ dly to find pass range UseTestEngine =0

 2420 02:00:16.964363  x-axis: bit #, y-axis: DQ dly (-127~63)

 2421 02:00:16.968069  RX Vref Scan = 0

 2422 02:00:16.970878  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 2423 02:00:16.974490  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 2424 02:00:16.974573  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 2425 02:00:16.978021  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 2426 02:00:16.981500  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 2427 02:00:16.984312  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 2428 02:00:16.987883  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 2429 02:00:16.991080  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 2430 02:00:16.994571  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 2431 02:00:16.997616  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 2432 02:00:16.997730  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 2433 02:00:17.001155  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 2434 02:00:17.004276  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 2435 02:00:17.008242  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 2436 02:00:17.011245  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 2437 02:00:17.014710  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 2438 02:00:17.018153  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 2439 02:00:17.021593  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 2440 02:00:17.021676  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 2441 02:00:17.024486  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 2442 02:00:17.027895  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 2443 02:00:17.031539  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 2444 02:00:17.034758  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 2445 02:00:17.038475  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 2446 02:00:17.038559  -2, [0] xxxxxxxx xxxxxxxx [MSB]

 2447 02:00:17.041283  -1, [0] xxxxxxxx xxxxxxxx [MSB]

 2448 02:00:17.044780  0, [0] xxxoxxxx xxxxxxxx [MSB]

 2449 02:00:17.048320  1, [0] xxxoxxxx xxxxxxxo [MSB]

 2450 02:00:17.051773  2, [0] xxooxxxo xxxxxxxo [MSB]

 2451 02:00:17.054640  3, [0] xxoooxxo oooxxoxo [MSB]

 2452 02:00:17.054723  4, [0] xxoooxxo oooxooxo [MSB]

 2453 02:00:17.058166  5, [0] xooooxxo oooooooo [MSB]

 2454 02:00:17.061546  6, [0] xoooooxo oooooooo [MSB]

 2455 02:00:17.064704  7, [0] xoooooxo oooooooo [MSB]

 2456 02:00:17.068166  8, [0] xoooooxo oooooooo [MSB]

 2457 02:00:17.071721  32, [0] ooxxoooo oooooooo [MSB]

 2458 02:00:17.071805  33, [0] ooxxoooo ooooooox [MSB]

 2459 02:00:17.075201  34, [0] ooxxoooo ooooooox [MSB]

 2460 02:00:17.078692  35, [0] ooxxxooo ooxoooox [MSB]

 2461 02:00:17.081542  36, [0] ooxxxoox xoxoooox [MSB]

 2462 02:00:17.085169  37, [0] ooxxxoox xxxoooxx [MSB]

 2463 02:00:17.088566  38, [0] ooxxxoox xxxxoxxx [MSB]

 2464 02:00:17.091561  39, [0] ooxxxoox xxxxxxxx [MSB]

 2465 02:00:17.091645  40, [0] xxxxxoox xxxxxxxx [MSB]

 2466 02:00:17.095025  41, [0] xxxxxxxx xxxxxxxx [MSB]

 2467 02:00:17.098546  iDelay=41, Bit 0, Center 24 (9 ~ 39) 31

 2468 02:00:17.101466  iDelay=41, Bit 1, Center 22 (5 ~ 39) 35

 2469 02:00:17.105021  iDelay=41, Bit 2, Center 16 (2 ~ 31) 30

 2470 02:00:17.111843  iDelay=41, Bit 3, Center 15 (0 ~ 31) 32

 2471 02:00:17.114827  iDelay=41, Bit 4, Center 18 (3 ~ 34) 32

 2472 02:00:17.118688  iDelay=41, Bit 5, Center 23 (6 ~ 40) 35

 2473 02:00:17.121604  iDelay=41, Bit 6, Center 24 (9 ~ 40) 32

 2474 02:00:17.124936  iDelay=41, Bit 7, Center 18 (2 ~ 35) 34

 2475 02:00:17.128533  iDelay=41, Bit 8, Center 19 (3 ~ 35) 33

 2476 02:00:17.131799  iDelay=41, Bit 9, Center 19 (3 ~ 36) 34

 2477 02:00:17.134964  iDelay=41, Bit 10, Center 18 (3 ~ 34) 32

 2478 02:00:17.138425  iDelay=41, Bit 11, Center 21 (5 ~ 37) 33

 2479 02:00:17.142090  iDelay=41, Bit 12, Center 21 (4 ~ 38) 35

 2480 02:00:17.145751  iDelay=41, Bit 13, Center 20 (3 ~ 37) 35

 2481 02:00:17.148371  iDelay=41, Bit 14, Center 20 (5 ~ 36) 32

 2482 02:00:17.151703  iDelay=41, Bit 15, Center 16 (1 ~ 32) 32

 2483 02:00:17.151785  ==

 2484 02:00:17.158720  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2485 02:00:17.162404  fsp= 1, odt_onoff= 1, Byte mode= 0

 2486 02:00:17.162485  ==

 2487 02:00:17.162549  DQS Delay:

 2488 02:00:17.165050  DQS0 = 0, DQS1 = 0

 2489 02:00:17.165130  DQM Delay:

 2490 02:00:17.168635  DQM0 = 20, DQM1 = 19

 2491 02:00:17.168716  DQ Delay:

 2492 02:00:17.171931  DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15

 2493 02:00:17.175542  DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =18

 2494 02:00:17.178535  DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =21

 2495 02:00:17.182007  DQ12 =21, DQ13 =20, DQ14 =20, DQ15 =16

 2496 02:00:17.182090  

 2497 02:00:17.182154  

 2498 02:00:17.182229  DramC Write-DBI off

 2499 02:00:17.185415  ==

 2500 02:00:17.188891  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2501 02:00:17.191874  fsp= 1, odt_onoff= 1, Byte mode= 0

 2502 02:00:17.191957  ==

 2503 02:00:17.195328  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 2504 02:00:17.195438  

 2505 02:00:17.198486  Begin, DQ Scan Range 927~1183

 2506 02:00:17.198568  

 2507 02:00:17.198633  

 2508 02:00:17.201777  	TX Vref Scan disable

 2509 02:00:17.205412  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 2510 02:00:17.209133  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 2511 02:00:17.211729  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 2512 02:00:17.215783  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 2513 02:00:17.218487  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 2514 02:00:17.221939  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 2515 02:00:17.225055  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 2516 02:00:17.228679  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 2517 02:00:17.232350  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 2518 02:00:17.235449  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 2519 02:00:17.238984  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 2520 02:00:17.245266  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 2521 02:00:17.248735  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 2522 02:00:17.251931  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 2523 02:00:17.255212  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 2524 02:00:17.258919  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 2525 02:00:17.262398  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 2526 02:00:17.265446  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 2527 02:00:17.268902  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 2528 02:00:17.271848  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 2529 02:00:17.275297  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 2530 02:00:17.278951  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 2531 02:00:17.282389  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 2532 02:00:17.285336  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 2533 02:00:17.288829  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 2534 02:00:17.292320  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 2535 02:00:17.295669  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 2536 02:00:17.302186  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 2537 02:00:17.305487  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 2538 02:00:17.308471  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 2539 02:00:17.311904  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 2540 02:00:17.315446  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2541 02:00:17.318765  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2542 02:00:17.322021  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2543 02:00:17.325581  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2544 02:00:17.328703  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2545 02:00:17.331880  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 2546 02:00:17.335362  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 2547 02:00:17.338830  965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]

 2548 02:00:17.342031  966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]

 2549 02:00:17.345444  967 |3 6 7|[0] xxxxxxxx ooxxxxxo [MSB]

 2550 02:00:17.348808  968 |3 6 8|[0] xxxxxxxx ooxxxxxo [MSB]

 2551 02:00:17.351966  969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]

 2552 02:00:17.355160  970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]

 2553 02:00:17.358410  971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]

 2554 02:00:17.362097  972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]

 2555 02:00:17.365060  973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]

 2556 02:00:17.372102  974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]

 2557 02:00:17.375225  975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]

 2558 02:00:17.378824  976 |3 6 16|[0] xxoooxxx oooooooo [MSB]

 2559 02:00:17.381658  977 |3 6 17|[0] xoooooxo oooooooo [MSB]

 2560 02:00:17.385165  989 |3 6 29|[0] oooooooo ooooooox [MSB]

 2561 02:00:17.388887  990 |3 6 30|[0] oooooooo ooooooox [MSB]

 2562 02:00:17.391575  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 2563 02:00:17.395138  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 2564 02:00:17.401503  993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]

 2565 02:00:17.405129  994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]

 2566 02:00:17.408506  995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]

 2567 02:00:17.411603  996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]

 2568 02:00:17.414969  997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]

 2569 02:00:17.417835  998 |3 6 38|[0] ooxxooox xxxxxxxx [MSB]

 2570 02:00:17.421487  999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]

 2571 02:00:17.424404  Byte0, DQ PI dly=986, DQM PI dly= 986

 2572 02:00:17.427958  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)

 2573 02:00:17.428043  

 2574 02:00:17.434451  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)

 2575 02:00:17.434530  

 2576 02:00:17.438232  Byte1, DQ PI dly=977, DQM PI dly= 977

 2577 02:00:17.441593  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)

 2578 02:00:17.441669  

 2579 02:00:17.444449  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)

 2580 02:00:17.444529  

 2581 02:00:17.447904  ==

 2582 02:00:17.451124  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2583 02:00:17.454304  fsp= 1, odt_onoff= 1, Byte mode= 0

 2584 02:00:17.454386  ==

 2585 02:00:17.458028  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 2586 02:00:17.458136  

 2587 02:00:17.461355  Begin, DQ Scan Range 953~1017

 2588 02:00:17.464435  Write Rank0 MR14 =0x0

 2589 02:00:17.472613  

 2590 02:00:17.472718  	CH=1, VrefRange= 0, VrefLevel = 0

 2591 02:00:17.479494  TX Bit0 (980~998) 19 989,   Bit8 (969~985) 17 977,

 2592 02:00:17.482723  TX Bit1 (978~997) 20 987,   Bit9 (969~985) 17 977,

 2593 02:00:17.489297  TX Bit2 (977~992) 16 984,   Bit10 (970~985) 16 977,

 2594 02:00:17.492767  TX Bit3 (976~991) 16 983,   Bit11 (972~988) 17 980,

 2595 02:00:17.496058  TX Bit4 (978~994) 17 986,   Bit12 (970~988) 19 979,

 2596 02:00:17.503256  TX Bit5 (978~998) 21 988,   Bit13 (972~988) 17 980,

 2597 02:00:17.505943  TX Bit6 (981~998) 18 989,   Bit14 (970~986) 17 978,

 2598 02:00:17.509436  TX Bit7 (978~992) 15 985,   Bit15 (967~985) 19 976,

 2599 02:00:17.509559  

 2600 02:00:17.512964  Write Rank0 MR14 =0x2

 2601 02:00:17.521734  

 2602 02:00:17.521918  	CH=1, VrefRange= 0, VrefLevel = 2

 2603 02:00:17.528154  TX Bit0 (979~998) 20 988,   Bit8 (968~985) 18 976,

 2604 02:00:17.531455  TX Bit1 (978~997) 20 987,   Bit9 (968~985) 18 976,

 2605 02:00:17.538443  TX Bit2 (977~993) 17 985,   Bit10 (970~986) 17 978,

 2606 02:00:17.541617  TX Bit3 (976~991) 16 983,   Bit11 (971~988) 18 979,

 2607 02:00:17.544963  TX Bit4 (978~995) 18 986,   Bit12 (970~988) 19 979,

 2608 02:00:17.551641  TX Bit5 (978~998) 21 988,   Bit13 (971~988) 18 979,

 2609 02:00:17.554807  TX Bit6 (980~998) 19 989,   Bit14 (969~986) 18 977,

 2610 02:00:17.558827  TX Bit7 (978~993) 16 985,   Bit15 (967~985) 19 976,

 2611 02:00:17.558911  

 2612 02:00:17.561687  Write Rank0 MR14 =0x4

 2613 02:00:17.571054  

 2614 02:00:17.571161  	CH=1, VrefRange= 0, VrefLevel = 4

 2615 02:00:17.577516  TX Bit0 (979~999) 21 989,   Bit8 (968~986) 19 977,

 2616 02:00:17.581014  TX Bit1 (978~998) 21 988,   Bit9 (968~985) 18 976,

 2617 02:00:17.587663  TX Bit2 (977~993) 17 985,   Bit10 (969~986) 18 977,

 2618 02:00:17.590970  TX Bit3 (976~991) 16 983,   Bit11 (971~989) 19 980,

 2619 02:00:17.594517  TX Bit4 (977~995) 19 986,   Bit12 (970~989) 20 979,

 2620 02:00:17.600857  TX Bit5 (978~999) 22 988,   Bit13 (971~989) 19 980,

 2621 02:00:17.604488  TX Bit6 (980~998) 19 989,   Bit14 (970~987) 18 978,

 2622 02:00:17.607388  TX Bit7 (978~994) 17 986,   Bit15 (967~985) 19 976,

 2623 02:00:17.607499  

 2624 02:00:17.610653  Write Rank0 MR14 =0x6

 2625 02:00:17.619936  

 2626 02:00:17.620051  	CH=1, VrefRange= 0, VrefLevel = 6

 2627 02:00:17.626798  TX Bit0 (979~999) 21 989,   Bit8 (968~986) 19 977,

 2628 02:00:17.629853  TX Bit1 (978~998) 21 988,   Bit9 (967~986) 20 976,

 2629 02:00:17.636889  TX Bit2 (977~994) 18 985,   Bit10 (969~987) 19 978,

 2630 02:00:17.640368  TX Bit3 (975~992) 18 983,   Bit11 (970~990) 21 980,

 2631 02:00:17.643203  TX Bit4 (978~996) 19 987,   Bit12 (970~990) 21 980,

 2632 02:00:17.649895  TX Bit5 (978~999) 22 988,   Bit13 (970~990) 21 980,

 2633 02:00:17.653398  TX Bit6 (980~999) 20 989,   Bit14 (969~988) 20 978,

 2634 02:00:17.656762  TX Bit7 (977~994) 18 985,   Bit15 (966~986) 21 976,

 2635 02:00:17.659687  

 2636 02:00:17.659770  Write Rank0 MR14 =0x8

 2637 02:00:17.669362  

 2638 02:00:17.669445  	CH=1, VrefRange= 0, VrefLevel = 8

 2639 02:00:17.676006  TX Bit0 (978~1000) 23 989,   Bit8 (968~987) 20 977,

 2640 02:00:17.679543  TX Bit1 (978~998) 21 988,   Bit9 (968~987) 20 977,

 2641 02:00:17.686717  TX Bit2 (976~994) 19 985,   Bit10 (969~987) 19 978,

 2642 02:00:17.689505  TX Bit3 (975~992) 18 983,   Bit11 (970~990) 21 980,

 2643 02:00:17.692666  TX Bit4 (977~997) 21 987,   Bit12 (969~990) 22 979,

 2644 02:00:17.699578  TX Bit5 (978~999) 22 988,   Bit13 (970~990) 21 980,

 2645 02:00:17.702693  TX Bit6 (979~999) 21 989,   Bit14 (969~989) 21 979,

 2646 02:00:17.705864  TX Bit7 (977~995) 19 986,   Bit15 (966~986) 21 976,

 2647 02:00:17.705948  

 2648 02:00:17.709623  Write Rank0 MR14 =0xa

 2649 02:00:17.718891  

 2650 02:00:17.722143  	CH=1, VrefRange= 0, VrefLevel = 10

 2651 02:00:17.725775  TX Bit0 (978~1000) 23 989,   Bit8 (968~987) 20 977,

 2652 02:00:17.728615  TX Bit1 (977~999) 23 988,   Bit9 (968~987) 20 977,

 2653 02:00:17.735690  TX Bit2 (977~995) 19 986,   Bit10 (969~988) 20 978,

 2654 02:00:17.738856  TX Bit3 (975~993) 19 984,   Bit11 (970~991) 22 980,

 2655 02:00:17.742155  TX Bit4 (977~997) 21 987,   Bit12 (969~991) 23 980,

 2656 02:00:17.748503  TX Bit5 (977~999) 23 988,   Bit13 (970~990) 21 980,

 2657 02:00:17.752061  TX Bit6 (979~999) 21 989,   Bit14 (969~989) 21 979,

 2658 02:00:17.755218  TX Bit7 (977~996) 20 986,   Bit15 (965~987) 23 976,

 2659 02:00:17.758610  

 2660 02:00:17.758719  Write Rank0 MR14 =0xc

 2661 02:00:17.768046  

 2662 02:00:17.771891  	CH=1, VrefRange= 0, VrefLevel = 12

 2663 02:00:17.774764  TX Bit0 (978~1000) 23 989,   Bit8 (968~988) 21 978,

 2664 02:00:17.778111  TX Bit1 (977~999) 23 988,   Bit9 (968~988) 21 978,

 2665 02:00:17.784604  TX Bit2 (976~996) 21 986,   Bit10 (969~989) 21 979,

 2666 02:00:17.788382  TX Bit3 (974~993) 20 983,   Bit11 (969~991) 23 980,

 2667 02:00:17.791329  TX Bit4 (977~998) 22 987,   Bit12 (969~991) 23 980,

 2668 02:00:17.798000  TX Bit5 (978~1000) 23 989,   Bit13 (970~991) 22 980,

 2669 02:00:17.801750  TX Bit6 (978~1000) 23 989,   Bit14 (969~990) 22 979,

 2670 02:00:17.808327  TX Bit7 (977~997) 21 987,   Bit15 (965~987) 23 976,

 2671 02:00:17.808415  

 2672 02:00:17.808480  Write Rank0 MR14 =0xe

 2673 02:00:17.817926  

 2674 02:00:17.821299  	CH=1, VrefRange= 0, VrefLevel = 14

 2675 02:00:17.824881  TX Bit0 (978~1000) 23 989,   Bit8 (967~989) 23 978,

 2676 02:00:17.828217  TX Bit1 (977~999) 23 988,   Bit9 (968~988) 21 978,

 2677 02:00:17.834744  TX Bit2 (976~997) 22 986,   Bit10 (969~990) 22 979,

 2678 02:00:17.838103  TX Bit3 (974~994) 21 984,   Bit11 (970~991) 22 980,

 2679 02:00:17.841592  TX Bit4 (977~998) 22 987,   Bit12 (969~991) 23 980,

 2680 02:00:17.847879  TX Bit5 (978~1000) 23 989,   Bit13 (970~991) 22 980,

 2681 02:00:17.851306  TX Bit6 (978~1000) 23 989,   Bit14 (969~990) 22 979,

 2682 02:00:17.857741  TX Bit7 (976~997) 22 986,   Bit15 (965~987) 23 976,

 2683 02:00:17.857824  

 2684 02:00:17.857889  Write Rank0 MR14 =0x10

 2685 02:00:17.867675  

 2686 02:00:17.871245  	CH=1, VrefRange= 0, VrefLevel = 16

 2687 02:00:17.874734  TX Bit0 (978~1001) 24 989,   Bit8 (967~990) 24 978,

 2688 02:00:17.878013  TX Bit1 (977~999) 23 988,   Bit9 (967~989) 23 978,

 2689 02:00:17.884859  TX Bit2 (976~997) 22 986,   Bit10 (969~990) 22 979,

 2690 02:00:17.887796  TX Bit3 (974~995) 22 984,   Bit11 (969~991) 23 980,

 2691 02:00:17.891189  TX Bit4 (976~998) 23 987,   Bit12 (969~991) 23 980,

 2692 02:00:17.898257  TX Bit5 (977~1001) 25 989,   Bit13 (969~991) 23 980,

 2693 02:00:17.901213  TX Bit6 (978~1001) 24 989,   Bit14 (969~991) 23 980,

 2694 02:00:17.904856  TX Bit7 (976~997) 22 986,   Bit15 (965~989) 25 977,

 2695 02:00:17.908218  

 2696 02:00:17.911290  wait MRW command Rank0 MR14 =0x12 fired (1)

 2697 02:00:17.911372  Write Rank0 MR14 =0x12

 2698 02:00:17.921592  

 2699 02:00:17.925565  	CH=1, VrefRange= 0, VrefLevel = 18

 2700 02:00:17.928563  TX Bit0 (978~1001) 24 989,   Bit8 (967~990) 24 978,

 2701 02:00:17.931592  TX Bit1 (977~1000) 24 988,   Bit9 (966~990) 25 978,

 2702 02:00:17.938457  TX Bit2 (975~997) 23 986,   Bit10 (968~991) 24 979,

 2703 02:00:17.941752  TX Bit3 (973~995) 23 984,   Bit11 (969~992) 24 980,

 2704 02:00:17.945049  TX Bit4 (976~999) 24 987,   Bit12 (969~992) 24 980,

 2705 02:00:17.951989  TX Bit5 (977~1001) 25 989,   Bit13 (969~991) 23 980,

 2706 02:00:17.955410  TX Bit6 (978~1001) 24 989,   Bit14 (969~991) 23 980,

 2707 02:00:17.958391  TX Bit7 (976~998) 23 987,   Bit15 (965~989) 25 977,

 2708 02:00:17.961612  

 2709 02:00:17.961713  Write Rank0 MR14 =0x14

 2710 02:00:17.971890  

 2711 02:00:17.975479  	CH=1, VrefRange= 0, VrefLevel = 20

 2712 02:00:17.978635  TX Bit0 (977~1002) 26 989,   Bit8 (967~991) 25 979,

 2713 02:00:17.981661  TX Bit1 (976~1000) 25 988,   Bit9 (967~990) 24 978,

 2714 02:00:17.988836  TX Bit2 (975~998) 24 986,   Bit10 (968~991) 24 979,

 2715 02:00:17.991991  TX Bit3 (973~996) 24 984,   Bit11 (969~992) 24 980,

 2716 02:00:17.995097  TX Bit4 (976~999) 24 987,   Bit12 (969~992) 24 980,

 2717 02:00:18.002035  TX Bit5 (977~1001) 25 989,   Bit13 (969~991) 23 980,

 2718 02:00:18.005534  TX Bit6 (978~1001) 24 989,   Bit14 (968~991) 24 979,

 2719 02:00:18.011820  TX Bit7 (976~998) 23 987,   Bit15 (964~989) 26 976,

 2720 02:00:18.011923  

 2721 02:00:18.012018  Write Rank0 MR14 =0x16

 2722 02:00:18.021972  

 2723 02:00:18.025609  	CH=1, VrefRange= 0, VrefLevel = 22

 2724 02:00:18.028762  TX Bit0 (977~1002) 26 989,   Bit8 (967~991) 25 979,

 2725 02:00:18.031953  TX Bit1 (976~1000) 25 988,   Bit9 (967~990) 24 978,

 2726 02:00:18.038883  TX Bit2 (975~998) 24 986,   Bit10 (968~991) 24 979,

 2727 02:00:18.042470  TX Bit3 (972~997) 26 984,   Bit11 (968~992) 25 980,

 2728 02:00:18.045292  TX Bit4 (976~999) 24 987,   Bit12 (968~992) 25 980,

 2729 02:00:18.052381  TX Bit5 (977~1002) 26 989,   Bit13 (969~991) 23 980,

 2730 02:00:18.055541  TX Bit6 (977~1002) 26 989,   Bit14 (968~991) 24 979,

 2731 02:00:18.061921  TX Bit7 (976~998) 23 987,   Bit15 (963~988) 26 975,

 2732 02:00:18.062002  

 2733 02:00:18.062082  Write Rank0 MR14 =0x18

 2734 02:00:18.072804  

 2735 02:00:18.075739  	CH=1, VrefRange= 0, VrefLevel = 24

 2736 02:00:18.079157  TX Bit0 (977~1003) 27 990,   Bit8 (966~991) 26 978,

 2737 02:00:18.082516  TX Bit1 (976~1000) 25 988,   Bit9 (966~990) 25 978,

 2738 02:00:18.089348  TX Bit2 (974~998) 25 986,   Bit10 (968~991) 24 979,

 2739 02:00:18.092441  TX Bit3 (972~997) 26 984,   Bit11 (968~992) 25 980,

 2740 02:00:18.095583  TX Bit4 (976~999) 24 987,   Bit12 (968~992) 25 980,

 2741 02:00:18.102444  TX Bit5 (977~1001) 25 989,   Bit13 (969~991) 23 980,

 2742 02:00:18.105596  TX Bit6 (977~1003) 27 990,   Bit14 (968~991) 24 979,

 2743 02:00:18.112451  TX Bit7 (976~999) 24 987,   Bit15 (963~988) 26 975,

 2744 02:00:18.112576  

 2745 02:00:18.112641  Write Rank0 MR14 =0x1a

 2746 02:00:18.122643  

 2747 02:00:18.126172  	CH=1, VrefRange= 0, VrefLevel = 26

 2748 02:00:18.129555  TX Bit0 (977~1003) 27 990,   Bit8 (966~991) 26 978,

 2749 02:00:18.132695  TX Bit1 (976~1000) 25 988,   Bit9 (966~990) 25 978,

 2750 02:00:18.139654  TX Bit2 (974~998) 25 986,   Bit10 (968~991) 24 979,

 2751 02:00:18.142815  TX Bit3 (972~997) 26 984,   Bit11 (968~992) 25 980,

 2752 02:00:18.146458  TX Bit4 (976~999) 24 987,   Bit12 (968~992) 25 980,

 2753 02:00:18.152587  TX Bit5 (977~1001) 25 989,   Bit13 (969~991) 23 980,

 2754 02:00:18.155955  TX Bit6 (977~1003) 27 990,   Bit14 (968~991) 24 979,

 2755 02:00:18.162742  TX Bit7 (976~999) 24 987,   Bit15 (963~988) 26 975,

 2756 02:00:18.162857  

 2757 02:00:18.162952  Write Rank0 MR14 =0x1c

 2758 02:00:18.173124  

 2759 02:00:18.176685  	CH=1, VrefRange= 0, VrefLevel = 28

 2760 02:00:18.179465  TX Bit0 (977~1003) 27 990,   Bit8 (966~991) 26 978,

 2761 02:00:18.183117  TX Bit1 (976~1000) 25 988,   Bit9 (966~990) 25 978,

 2762 02:00:18.189717  TX Bit2 (974~998) 25 986,   Bit10 (968~991) 24 979,

 2763 02:00:18.192864  TX Bit3 (972~997) 26 984,   Bit11 (968~992) 25 980,

 2764 02:00:18.196171  TX Bit4 (976~999) 24 987,   Bit12 (968~992) 25 980,

 2765 02:00:18.202972  TX Bit5 (977~1001) 25 989,   Bit13 (969~991) 23 980,

 2766 02:00:18.206298  TX Bit6 (977~1003) 27 990,   Bit14 (968~991) 24 979,

 2767 02:00:18.209476  TX Bit7 (976~999) 24 987,   Bit15 (963~988) 26 975,

 2768 02:00:18.212853  

 2769 02:00:18.212967  Write Rank0 MR14 =0x1e

 2770 02:00:18.223360  

 2771 02:00:18.226684  	CH=1, VrefRange= 0, VrefLevel = 30

 2772 02:00:18.229733  TX Bit0 (977~1003) 27 990,   Bit8 (966~991) 26 978,

 2773 02:00:18.233181  TX Bit1 (976~1000) 25 988,   Bit9 (966~990) 25 978,

 2774 02:00:18.239889  TX Bit2 (974~998) 25 986,   Bit10 (968~991) 24 979,

 2775 02:00:18.243426  TX Bit3 (972~997) 26 984,   Bit11 (968~992) 25 980,

 2776 02:00:18.246514  TX Bit4 (976~999) 24 987,   Bit12 (968~992) 25 980,

 2777 02:00:18.252825  TX Bit5 (977~1001) 25 989,   Bit13 (969~991) 23 980,

 2778 02:00:18.256604  TX Bit6 (977~1003) 27 990,   Bit14 (968~991) 24 979,

 2779 02:00:18.262611  TX Bit7 (976~999) 24 987,   Bit15 (963~988) 26 975,

 2780 02:00:18.262716  

 2781 02:00:18.262822  Write Rank0 MR14 =0x20

 2782 02:00:18.273387  

 2783 02:00:18.276502  	CH=1, VrefRange= 0, VrefLevel = 32

 2784 02:00:18.280221  TX Bit0 (977~1003) 27 990,   Bit8 (966~991) 26 978,

 2785 02:00:18.283160  TX Bit1 (976~1000) 25 988,   Bit9 (966~990) 25 978,

 2786 02:00:18.289818  TX Bit2 (974~998) 25 986,   Bit10 (968~991) 24 979,

 2787 02:00:18.293349  TX Bit3 (972~997) 26 984,   Bit11 (968~992) 25 980,

 2788 02:00:18.296928  TX Bit4 (976~999) 24 987,   Bit12 (968~992) 25 980,

 2789 02:00:18.302962  TX Bit5 (977~1001) 25 989,   Bit13 (969~991) 23 980,

 2790 02:00:18.306411  TX Bit6 (977~1003) 27 990,   Bit14 (968~991) 24 979,

 2791 02:00:18.313254  TX Bit7 (976~999) 24 987,   Bit15 (963~988) 26 975,

 2792 02:00:18.313379  

 2793 02:00:18.313442  

 2794 02:00:18.316615  TX Vref found, early break! 370< 380

 2795 02:00:18.319555  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 2796 02:00:18.323361  u1DelayCellOfst[0]=7 cells (6 PI)

 2797 02:00:18.326491  u1DelayCellOfst[1]=5 cells (4 PI)

 2798 02:00:18.329788  u1DelayCellOfst[2]=2 cells (2 PI)

 2799 02:00:18.333141  u1DelayCellOfst[3]=0 cells (0 PI)

 2800 02:00:18.336545  u1DelayCellOfst[4]=3 cells (3 PI)

 2801 02:00:18.339538  u1DelayCellOfst[5]=6 cells (5 PI)

 2802 02:00:18.339615  u1DelayCellOfst[6]=7 cells (6 PI)

 2803 02:00:18.342965  u1DelayCellOfst[7]=3 cells (3 PI)

 2804 02:00:18.346661  Byte0, DQ PI dly=984, DQM PI dly= 987

 2805 02:00:18.353209  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)

 2806 02:00:18.353337  

 2807 02:00:18.356274  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)

 2808 02:00:18.356387  

 2809 02:00:18.359657  u1DelayCellOfst[8]=3 cells (3 PI)

 2810 02:00:18.363014  u1DelayCellOfst[9]=3 cells (3 PI)

 2811 02:00:18.366701  u1DelayCellOfst[10]=5 cells (4 PI)

 2812 02:00:18.369908  u1DelayCellOfst[11]=6 cells (5 PI)

 2813 02:00:18.373292  u1DelayCellOfst[12]=6 cells (5 PI)

 2814 02:00:18.376444  u1DelayCellOfst[13]=6 cells (5 PI)

 2815 02:00:18.379539  u1DelayCellOfst[14]=5 cells (4 PI)

 2816 02:00:18.379619  u1DelayCellOfst[15]=0 cells (0 PI)

 2817 02:00:18.382994  Byte1, DQ PI dly=975, DQM PI dly= 977

 2818 02:00:18.389561  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)

 2819 02:00:18.389645  

 2820 02:00:18.393012  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)

 2821 02:00:18.393095  

 2822 02:00:18.396697  Write Rank0 MR14 =0x18

 2823 02:00:18.396778  

 2824 02:00:18.396841  Final TX Range 0 Vref 24

 2825 02:00:18.400026  

 2826 02:00:18.402940  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 2827 02:00:18.406465  

 2828 02:00:18.409812  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 2829 02:00:18.420220  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2830 02:00:18.426476  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2831 02:00:18.426607  Write Rank0 MR3 =0xb0

 2832 02:00:18.429771  DramC Write-DBI on

 2833 02:00:18.429854  ==

 2834 02:00:18.433108  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2835 02:00:18.436512  fsp= 1, odt_onoff= 1, Byte mode= 0

 2836 02:00:18.436594  ==

 2837 02:00:18.442988  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 2838 02:00:18.443069  

 2839 02:00:18.443133  Begin, DQ Scan Range 697~761

 2840 02:00:18.446758  

 2841 02:00:18.446838  

 2842 02:00:18.446901  	TX Vref Scan disable

 2843 02:00:18.449759  697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 2844 02:00:18.453253  698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 2845 02:00:18.456261  699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 2846 02:00:18.459940  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 2847 02:00:18.466234  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 2848 02:00:18.469797  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2849 02:00:18.473084  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2850 02:00:18.476239  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2851 02:00:18.479893  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2852 02:00:18.483105  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2853 02:00:18.486296  707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]

 2854 02:00:18.489769  708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]

 2855 02:00:18.493135  709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]

 2856 02:00:18.496370  710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]

 2857 02:00:18.499506  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 2858 02:00:18.502684  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 2859 02:00:18.506388  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 2860 02:00:18.509790  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 2861 02:00:18.512755  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 2862 02:00:18.516219  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 2863 02:00:18.519375  717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]

 2864 02:00:18.522833  718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]

 2865 02:00:18.531230  735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]

 2866 02:00:18.534906  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 2867 02:00:18.537974  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 2868 02:00:18.541163  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 2869 02:00:18.544932  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 2870 02:00:18.548303  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 2871 02:00:18.551183  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 2872 02:00:18.554484  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 2873 02:00:18.558067  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 2874 02:00:18.561200  744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]

 2875 02:00:18.564616  745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]

 2876 02:00:18.568157  746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]

 2877 02:00:18.571253  Byte0, DQ PI dly=732, DQM PI dly= 732

 2878 02:00:18.578201  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)

 2879 02:00:18.578283  

 2880 02:00:18.581752  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)

 2881 02:00:18.581835  

 2882 02:00:18.584939  Byte1, DQ PI dly=720, DQM PI dly= 720

 2883 02:00:18.588254  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)

 2884 02:00:18.588337  

 2885 02:00:18.594776  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)

 2886 02:00:18.594859  

 2887 02:00:18.601440  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 2888 02:00:18.608525  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2889 02:00:18.614940  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2890 02:00:18.615019  Write Rank0 MR3 =0x30

 2891 02:00:18.618138  DramC Write-DBI off

 2892 02:00:18.618208  

 2893 02:00:18.618268  [DATLAT]

 2894 02:00:18.621674  Freq=1600, CH1 RK0, use_rxtx_scan=0

 2895 02:00:18.621803  

 2896 02:00:18.624960  DATLAT Default: 0xf

 2897 02:00:18.625055  7, 0xFFFF, sum=0

 2898 02:00:18.628278  8, 0xFFFF, sum=0

 2899 02:00:18.628349  9, 0xFFFF, sum=0

 2900 02:00:18.631396  10, 0xFFFF, sum=0

 2901 02:00:18.631468  11, 0xFFFF, sum=0

 2902 02:00:18.634773  12, 0xFFFF, sum=0

 2903 02:00:18.634847  13, 0xFFFF, sum=0

 2904 02:00:18.634908  14, 0x0, sum=1

 2905 02:00:18.638265  15, 0x0, sum=2

 2906 02:00:18.638339  16, 0x0, sum=3

 2907 02:00:18.641870  17, 0x0, sum=4

 2908 02:00:18.644891  pattern=2 first_step=14 total pass=5 best_step=16

 2909 02:00:18.644996  ==

 2910 02:00:18.651592  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2911 02:00:18.654756  fsp= 1, odt_onoff= 1, Byte mode= 0

 2912 02:00:18.654830  ==

 2913 02:00:18.658401  Start DQ dly to find pass range UseTestEngine =1

 2914 02:00:18.661232  x-axis: bit #, y-axis: DQ dly (-127~63)

 2915 02:00:18.661368  RX Vref Scan = 1

 2916 02:00:18.777920  

 2917 02:00:18.778055  RX Vref found, early break!

 2918 02:00:18.778122  

 2919 02:00:18.784525  Final RX Vref 13, apply to both rank0 and 1

 2920 02:00:18.784609  ==

 2921 02:00:18.787711  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2922 02:00:18.791166  fsp= 1, odt_onoff= 1, Byte mode= 0

 2923 02:00:18.791250  ==

 2924 02:00:18.791312  DQS Delay:

 2925 02:00:18.794543  DQS0 = 0, DQS1 = 0

 2926 02:00:18.794614  DQM Delay:

 2927 02:00:18.798364  DQM0 = 20, DQM1 = 18

 2928 02:00:18.798432  DQ Delay:

 2929 02:00:18.801360  DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15

 2930 02:00:18.804750  DQ4 =19, DQ5 =24, DQ6 =25, DQ7 =19

 2931 02:00:18.807800  DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19

 2932 02:00:18.811273  DQ12 =20, DQ13 =19, DQ14 =19, DQ15 =16

 2933 02:00:18.811350  

 2934 02:00:18.811412  

 2935 02:00:18.811478  

 2936 02:00:18.814681  [DramC_TX_OE_Calibration] TA2

 2937 02:00:18.817840  Original DQ_B0 (3 6) =30, OEN = 27

 2938 02:00:18.821537  Original DQ_B1 (3 6) =30, OEN = 27

 2939 02:00:18.824449  23, 0x0, End_B0=23 End_B1=23

 2940 02:00:18.824531  24, 0x0, End_B0=24 End_B1=24

 2941 02:00:18.827970  25, 0x0, End_B0=25 End_B1=25

 2942 02:00:18.831110  26, 0x0, End_B0=26 End_B1=26

 2943 02:00:18.834489  27, 0x0, End_B0=27 End_B1=27

 2944 02:00:18.834571  28, 0x0, End_B0=28 End_B1=28

 2945 02:00:18.837875  29, 0x0, End_B0=29 End_B1=29

 2946 02:00:18.841475  30, 0x0, End_B0=30 End_B1=30

 2947 02:00:18.844538  31, 0xFFFF, End_B0=30 End_B1=30

 2948 02:00:18.851225  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2949 02:00:18.854798  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2950 02:00:18.854869  

 2951 02:00:18.854929  

 2952 02:00:18.857719  Write Rank0 MR23 =0x3f

 2953 02:00:18.857789  [DQSOSC]

 2954 02:00:18.864568  [DQSOSCAuto] RK0, (LSB)MR18= 0xbe, (MSB)MR19= 0x3, tDQSOscB0 = 328 ps tDQSOscB1 = 0 ps

 2955 02:00:18.871272  CH1_RK0: MR19=0x3, MR18=0xBE, DQSOSC=328, MR23=63, INC=22, DEC=34

 2956 02:00:18.874607  Write Rank0 MR23 =0x3f

 2957 02:00:18.874685  [DQSOSC]

 2958 02:00:18.881148  [DQSOSCAuto] RK0, (LSB)MR18= 0xbd, (MSB)MR19= 0x3, tDQSOscB0 = 329 ps tDQSOscB1 = 0 ps

 2959 02:00:18.884379  CH1 RK0: MR19=3, MR18=BD

 2960 02:00:18.887784  [RankSwap] Rank num 2, (Multi 1), Rank 1

 2961 02:00:18.891048  Write Rank0 MR2 =0xad

 2962 02:00:18.891156  [Write Leveling]

 2963 02:00:18.894788  delay  byte0  byte1  byte2  byte3

 2964 02:00:18.894859  

 2965 02:00:18.897637  10    0   0   

 2966 02:00:18.897708  11    0   0   

 2967 02:00:18.897772  12    0   0   

 2968 02:00:18.901140  13    0   0   

 2969 02:00:18.901208  14    0   0   

 2970 02:00:18.904136  15    0   0   

 2971 02:00:18.904216  16    0   0   

 2972 02:00:18.904285  17    0   0   

 2973 02:00:18.907714  18    0   0   

 2974 02:00:18.907788  19    0   0   

 2975 02:00:18.910919  20    0   0   

 2976 02:00:18.910995  21    0   0   

 2977 02:00:18.914227  22    0   0   

 2978 02:00:18.914327  23    0   0   

 2979 02:00:18.914431  24    0   0   

 2980 02:00:18.917669  25    0   0   

 2981 02:00:18.917745  26    0   0   

 2982 02:00:18.921090  27    0   0   

 2983 02:00:18.921167  28    0   0   

 2984 02:00:18.921231  29    0   0   

 2985 02:00:18.924561  30    0   0   

 2986 02:00:18.924634  31    0   ff   

 2987 02:00:18.927527  32    0   ff   

 2988 02:00:18.927627  33    0   ff   

 2989 02:00:18.931298  34    ff   ff   

 2990 02:00:18.931378  35    0   ff   

 2991 02:00:18.934342  36    ff   ff   

 2992 02:00:18.934412  37    ff   ff   

 2993 02:00:18.934483  38    ff   ff   

 2994 02:00:18.937476  39    ff   ff   

 2995 02:00:18.937550  40    ff   ff   

 2996 02:00:18.940829  41    ff   ff   

 2997 02:00:18.940911  42    ff   ff   

 2998 02:00:18.947464  pass bytecount = 0xff (0xff: all bytes pass) 

 2999 02:00:18.947568  

 3000 02:00:18.947668  DQS0 dly: 36

 3001 02:00:18.947742  DQS1 dly: 31

 3002 02:00:18.950770  Write Rank0 MR2 =0x2d

 3003 02:00:18.954449  [RankSwap] Rank num 2, (Multi 1), Rank 0

 3004 02:00:18.957418  Write Rank1 MR1 =0xd6

 3005 02:00:18.957502  [Gating]

 3006 02:00:18.957591  ==

 3007 02:00:18.960876  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3008 02:00:18.964347  fsp= 1, odt_onoff= 1, Byte mode= 0

 3009 02:00:18.967809  ==

 3010 02:00:18.971181  3 1 0 |1b1a 3534  |(11 11)(11 11) |(1 0)(1 1)| 0

 3011 02:00:18.974063  3 1 4 |3130 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 3012 02:00:18.977394  3 1 8 |1110 3534  |(11 11)(11 11) |(1 0)(0 1)| 0

 3013 02:00:18.984390  3 1 12 |1414 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 3014 02:00:18.987532  3 1 16 |302f 3534  |(11 11)(11 11) |(1 0)(0 1)| 0

 3015 02:00:18.990638  3 1 20 |302f 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 3016 02:00:18.997185  3 1 24 |3231 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 3017 02:00:19.001006  3 1 28 |201 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 3018 02:00:19.004208  3 2 0 |2928 b0a  |(11 11)(11 11) |(1 1)(1 1)| 0

 3019 02:00:19.011191  3 2 4 |3838 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 3020 02:00:19.013816  3 2 8 |2322 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3021 02:00:19.017517  3 2 12 |1c1c 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 3022 02:00:19.020438  3 2 16 |3737 3d3d  |(0 0)(11 11) |(0 0)(1 1)| 0

 3023 02:00:19.027547  3 2 20 |3a39 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3024 02:00:19.031243  3 2 24 |3737 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3025 02:00:19.034077  3 2 28 |3636 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3026 02:00:19.040576  [Byte 0] Lead/lag falling Transition (3, 2, 28)

 3027 02:00:19.043788  3 3 0 |3534 3d3d  |(11 11)(11 11) |(0 1)(1 1)| 0

 3028 02:00:19.047254  3 3 4 |3534 707  |(11 11)(11 11) |(0 1)(1 1)| 0

 3029 02:00:19.053953  3 3 8 |3534 504  |(11 11)(11 11) |(0 1)(1 1)| 0

 3030 02:00:19.057576  [Byte 1] Lead/lag falling Transition (3, 3, 8)

 3031 02:00:19.060392  3 3 12 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 3032 02:00:19.063939  3 3 16 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 3033 02:00:19.070282  3 3 20 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 3034 02:00:19.073681  3 3 24 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 3035 02:00:19.077157  3 3 28 |4b4b 3534  |(10 10)(11 11) |(1 1)(0 1)| 0

 3036 02:00:19.083601  3 4 0 |3d3d 403  |(11 11)(11 11) |(1 1)(1 1)| 0

 3037 02:00:19.086983  3 4 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3038 02:00:19.090536  3 4 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3039 02:00:19.096897  3 4 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3040 02:00:19.100284  3 4 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3041 02:00:19.104014  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3042 02:00:19.110254  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3043 02:00:19.113814  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3044 02:00:19.117368  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3045 02:00:19.120588  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3046 02:00:19.127128  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3047 02:00:19.130260  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3048 02:00:19.133749  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3049 02:00:19.140122  [Byte 0] Lead/lag falling Transition (3, 5, 16)

 3050 02:00:19.143434  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 3051 02:00:19.147395  [Byte 0] Lead/lag Transition tap number (2)

 3052 02:00:19.150467  3 5 24 |3e3d 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 3053 02:00:19.156924  [Byte 1] Lead/lag falling Transition (3, 5, 24)

 3054 02:00:19.160313  3 5 28 |202 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 3055 02:00:19.163865  [Byte 1] Lead/lag Transition tap number (2)

 3056 02:00:19.166905  3 6 0 |4646 202  |(0 0)(11 11) |(0 0)(0 0)| 0

 3057 02:00:19.170098  [Byte 0]First pass (3, 6, 0)

 3058 02:00:19.173826  3 6 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3059 02:00:19.177086  [Byte 1]First pass (3, 6, 4)

 3060 02:00:19.179894  3 6 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3061 02:00:19.186825  3 6 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3062 02:00:19.190116  3 6 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3063 02:00:19.193433  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3064 02:00:19.196716  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3065 02:00:19.199927  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3066 02:00:19.206680  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3067 02:00:19.209849  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3068 02:00:19.213227  All bytes gating window > 1UI, Early break!

 3069 02:00:19.213322  

 3070 02:00:19.216608  best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)

 3071 02:00:19.216684  

 3072 02:00:19.219893  best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)

 3073 02:00:19.219963  

 3074 02:00:19.220055  

 3075 02:00:19.220141  

 3076 02:00:19.226401  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)

 3077 02:00:19.226478  

 3078 02:00:19.229811  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)

 3079 02:00:19.229887  

 3080 02:00:19.229950  

 3081 02:00:19.233098  Write Rank1 MR1 =0x56

 3082 02:00:19.233194  

 3083 02:00:19.233302  best RODT dly(2T, 0.5T) = (2, 2)

 3084 02:00:19.236337  

 3085 02:00:19.236405  best RODT dly(2T, 0.5T) = (2, 2)

 3086 02:00:19.239802  ==

 3087 02:00:19.242982  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3088 02:00:19.246434  fsp= 1, odt_onoff= 1, Byte mode= 0

 3089 02:00:19.246596  ==

 3090 02:00:19.249999  Start DQ dly to find pass range UseTestEngine =0

 3091 02:00:19.253238  x-axis: bit #, y-axis: DQ dly (-127~63)

 3092 02:00:19.256682  RX Vref Scan = 0

 3093 02:00:19.260116  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 3094 02:00:19.263428  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 3095 02:00:19.263502  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 3096 02:00:19.266625  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 3097 02:00:19.269694  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 3098 02:00:19.273535  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 3099 02:00:19.276615  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 3100 02:00:19.279771  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 3101 02:00:19.283501  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 3102 02:00:19.287093  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 3103 02:00:19.290217  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 3104 02:00:19.290321  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 3105 02:00:19.293478  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 3106 02:00:19.296354  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 3107 02:00:19.299938  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 3108 02:00:19.303113  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 3109 02:00:19.306660  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 3110 02:00:19.309688  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 3111 02:00:19.313160  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 3112 02:00:19.313276  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 3113 02:00:19.316120  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 3114 02:00:19.319653  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 3115 02:00:19.323246  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 3116 02:00:19.326545  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 3117 02:00:19.329734  -2, [0] xxxoxxxx xxxxxxxx [MSB]

 3118 02:00:19.333004  -1, [0] xxxoxxxx xxxxxxxo [MSB]

 3119 02:00:19.333119  0, [0] xxooxxxx xxxxxxxo [MSB]

 3120 02:00:19.336500  1, [0] xxooxxxo xxxxxxxo [MSB]

 3121 02:00:19.339519  2, [0] xxoooxxo oooxxxxo [MSB]

 3122 02:00:19.343235  3, [0] xxoooxxo ooooxooo [MSB]

 3123 02:00:19.346265  4, [0] xxoooxxo ooooxooo [MSB]

 3124 02:00:19.346371  5, [0] xoooooxo oooooooo [MSB]

 3125 02:00:19.349692  6, [0] xoooooxo oooooooo [MSB]

 3126 02:00:19.353166  34, [0] oooxoooo oooooooo [MSB]

 3127 02:00:19.356463  35, [0] ooxxoooo ooooooox [MSB]

 3128 02:00:19.359742  36, [0] ooxxoooo ooooooox [MSB]

 3129 02:00:19.363140  37, [0] ooxxoooo ooxoooox [MSB]

 3130 02:00:19.366096  38, [0] ooxxxoox xoxooxxx [MSB]

 3131 02:00:19.369443  39, [0] ooxxxoox xxxxoxxx [MSB]

 3132 02:00:19.369546  40, [0] ooxxxoox xxxxoxxx [MSB]

 3133 02:00:19.372879  41, [0] ooxxxoox xxxxxxxx [MSB]

 3134 02:00:19.376279  42, [0] xxxxxxxx xxxxxxxx [MSB]

 3135 02:00:19.379865  iDelay=42, Bit 0, Center 24 (7 ~ 41) 35

 3136 02:00:19.382797  iDelay=42, Bit 1, Center 23 (5 ~ 41) 37

 3137 02:00:19.386001  iDelay=42, Bit 2, Center 17 (0 ~ 34) 35

 3138 02:00:19.389451  iDelay=42, Bit 3, Center 15 (-2 ~ 33) 36

 3139 02:00:19.392976  iDelay=42, Bit 4, Center 19 (2 ~ 37) 36

 3140 02:00:19.396194  iDelay=42, Bit 5, Center 23 (5 ~ 41) 37

 3141 02:00:19.403041  iDelay=42, Bit 6, Center 24 (7 ~ 41) 35

 3142 02:00:19.406163  iDelay=42, Bit 7, Center 19 (1 ~ 37) 37

 3143 02:00:19.409533  iDelay=42, Bit 8, Center 19 (2 ~ 37) 36

 3144 02:00:19.412710  iDelay=42, Bit 9, Center 20 (2 ~ 38) 37

 3145 02:00:19.416299  iDelay=42, Bit 10, Center 19 (2 ~ 36) 35

 3146 02:00:19.419716  iDelay=42, Bit 11, Center 20 (3 ~ 38) 36

 3147 02:00:19.422758  iDelay=42, Bit 12, Center 22 (5 ~ 40) 36

 3148 02:00:19.425947  iDelay=42, Bit 13, Center 20 (3 ~ 37) 35

 3149 02:00:19.429813  iDelay=42, Bit 14, Center 20 (3 ~ 37) 35

 3150 02:00:19.432596  iDelay=42, Bit 15, Center 16 (-1 ~ 34) 36

 3151 02:00:19.432670  ==

 3152 02:00:19.439548  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3153 02:00:19.442901  fsp= 1, odt_onoff= 1, Byte mode= 0

 3154 02:00:19.442998  ==

 3155 02:00:19.443101  DQS Delay:

 3156 02:00:19.446222  DQS0 = 0, DQS1 = 0

 3157 02:00:19.446298  DQM Delay:

 3158 02:00:19.449604  DQM0 = 20, DQM1 = 19

 3159 02:00:19.449681  DQ Delay:

 3160 02:00:19.452960  DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15

 3161 02:00:19.456027  DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19

 3162 02:00:19.459709  DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =20

 3163 02:00:19.462873  DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =16

 3164 02:00:19.462954  

 3165 02:00:19.463018  

 3166 02:00:19.463086  DramC Write-DBI off

 3167 02:00:19.463146  ==

 3168 02:00:19.469503  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3169 02:00:19.472695  fsp= 1, odt_onoff= 1, Byte mode= 0

 3170 02:00:19.472772  ==

 3171 02:00:19.476051  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 3172 02:00:19.476157  

 3173 02:00:19.479620  Begin, DQ Scan Range 927~1183

 3174 02:00:19.479698  

 3175 02:00:19.479761  

 3176 02:00:19.482846  	TX Vref Scan disable

 3177 02:00:19.486570  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 3178 02:00:19.489421  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 3179 02:00:19.492836  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 3180 02:00:19.496317  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 3181 02:00:19.499227  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 3182 02:00:19.502577  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 3183 02:00:19.505982  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 3184 02:00:19.509910  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 3185 02:00:19.512535  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 3186 02:00:19.516601  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 3187 02:00:19.519640  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 3188 02:00:19.526050  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 3189 02:00:19.529598  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 3190 02:00:19.533068  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 3191 02:00:19.536082  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 3192 02:00:19.539488  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 3193 02:00:19.542836  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 3194 02:00:19.546319  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 3195 02:00:19.549568  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 3196 02:00:19.553188  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 3197 02:00:19.556232  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 3198 02:00:19.559497  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 3199 02:00:19.563014  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 3200 02:00:19.566247  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 3201 02:00:19.569412  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 3202 02:00:19.573027  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 3203 02:00:19.576366  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 3204 02:00:19.582606  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 3205 02:00:19.585958  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 3206 02:00:19.589140  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 3207 02:00:19.592858  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 3208 02:00:19.596320  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 3209 02:00:19.599197  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 3210 02:00:19.602408  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 3211 02:00:19.605872  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 3212 02:00:19.609490  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 3213 02:00:19.612712  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 3214 02:00:19.616140  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 3215 02:00:19.619370  965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]

 3216 02:00:19.622842  966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]

 3217 02:00:19.626482  967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]

 3218 02:00:19.629200  968 |3 6 8|[0] xxxxxxxx oooxxxxo [MSB]

 3219 02:00:19.632749  969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]

 3220 02:00:19.636281  970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]

 3221 02:00:19.639276  971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]

 3222 02:00:19.642775  972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]

 3223 02:00:19.646002  973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]

 3224 02:00:19.649027  974 |3 6 14|[0] xxxoxxxx oooooooo [MSB]

 3225 02:00:19.655816  975 |3 6 15|[0] xxoooxxx oooooooo [MSB]

 3226 02:00:19.659257  976 |3 6 16|[0] xxoooxxo oooooooo [MSB]

 3227 02:00:19.663110  977 |3 6 17|[0] xooooxoo oooooooo [MSB]

 3228 02:00:19.666089  987 |3 6 27|[0] oooooooo ooooooox [MSB]

 3229 02:00:19.669234  988 |3 6 28|[0] oooooooo ooooooox [MSB]

 3230 02:00:19.672674  989 |3 6 29|[0] oooooooo ooooooox [MSB]

 3231 02:00:19.675956  990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]

 3232 02:00:19.679462  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 3233 02:00:19.682328  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 3234 02:00:19.689305  993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]

 3235 02:00:19.692280  994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]

 3236 02:00:19.695638  995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]

 3237 02:00:19.698995  996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]

 3238 02:00:19.702401  997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]

 3239 02:00:19.705724  998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]

 3240 02:00:19.709372  999 |3 6 39|[0] ooxxxoox xxxxxxxx [MSB]

 3241 02:00:19.712541  1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]

 3242 02:00:19.715580  Byte0, DQ PI dly=986, DQM PI dly= 986

 3243 02:00:19.718965  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)

 3244 02:00:19.719045  

 3245 02:00:19.725978  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)

 3246 02:00:19.726059  

 3247 02:00:19.729328  Byte1, DQ PI dly=977, DQM PI dly= 977

 3248 02:00:19.732251  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)

 3249 02:00:19.732355  

 3250 02:00:19.735804  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)

 3251 02:00:19.735909  

 3252 02:00:19.735999  ==

 3253 02:00:19.742392  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3254 02:00:19.745600  fsp= 1, odt_onoff= 1, Byte mode= 0

 3255 02:00:19.745705  ==

 3256 02:00:19.749109  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 3257 02:00:19.749206  

 3258 02:00:19.752560  Begin, DQ Scan Range 953~1017

 3259 02:00:19.756126  Write Rank1 MR14 =0x0

 3260 02:00:19.764018  

 3261 02:00:19.764095  	CH=1, VrefRange= 0, VrefLevel = 0

 3262 02:00:19.770458  TX Bit0 (980~998) 19 989,   Bit8 (969~985) 17 977,

 3263 02:00:19.773914  TX Bit1 (979~997) 19 988,   Bit9 (969~985) 17 977,

 3264 02:00:19.780785  TX Bit2 (977~992) 16 984,   Bit10 (970~985) 16 977,

 3265 02:00:19.783707  TX Bit3 (976~991) 16 983,   Bit11 (971~989) 19 980,

 3266 02:00:19.787269  TX Bit4 (977~993) 17 985,   Bit12 (970~987) 18 978,

 3267 02:00:19.793956  TX Bit5 (979~997) 19 988,   Bit13 (971~985) 15 978,

 3268 02:00:19.797019  TX Bit6 (979~998) 20 988,   Bit14 (970~986) 17 978,

 3269 02:00:19.800510  TX Bit7 (978~992) 15 985,   Bit15 (967~984) 18 975,

 3270 02:00:19.800586  

 3271 02:00:19.803757  Write Rank1 MR14 =0x2

 3272 02:00:19.813128  

 3273 02:00:19.813237  	CH=1, VrefRange= 0, VrefLevel = 2

 3274 02:00:19.820207  TX Bit0 (979~999) 21 989,   Bit8 (969~985) 17 977,

 3275 02:00:19.822988  TX Bit1 (979~997) 19 988,   Bit9 (969~985) 17 977,

 3276 02:00:19.829567  TX Bit2 (976~992) 17 984,   Bit10 (969~985) 17 977,

 3277 02:00:19.833028  TX Bit3 (975~991) 17 983,   Bit11 (971~990) 20 980,

 3278 02:00:19.836126  TX Bit4 (977~994) 18 985,   Bit12 (970~987) 18 978,

 3279 02:00:19.843284  TX Bit5 (978~997) 20 987,   Bit13 (971~986) 16 978,

 3280 02:00:19.846694  TX Bit6 (979~998) 20 988,   Bit14 (970~987) 18 978,

 3281 02:00:19.849624  TX Bit7 (978~993) 16 985,   Bit15 (967~984) 18 975,

 3282 02:00:19.853174  

 3283 02:00:19.853314  Write Rank1 MR14 =0x4

 3284 02:00:19.862217  

 3285 02:00:19.865660  	CH=1, VrefRange= 0, VrefLevel = 4

 3286 02:00:19.868888  TX Bit0 (979~999) 21 989,   Bit8 (969~987) 19 978,

 3287 02:00:19.872087  TX Bit1 (978~998) 21 988,   Bit9 (969~986) 18 977,

 3288 02:00:19.878828  TX Bit2 (976~992) 17 984,   Bit10 (969~986) 18 977,

 3289 02:00:19.882308  TX Bit3 (975~992) 18 983,   Bit11 (970~990) 21 980,

 3290 02:00:19.885653  TX Bit4 (977~994) 18 985,   Bit12 (970~988) 19 979,

 3291 02:00:19.892674  TX Bit5 (978~998) 21 988,   Bit13 (970~986) 17 978,

 3292 02:00:19.895504  TX Bit6 (978~998) 21 988,   Bit14 (969~987) 19 978,

 3293 02:00:19.898876  TX Bit7 (977~993) 17 985,   Bit15 (967~984) 18 975,

 3294 02:00:19.898979  

 3295 02:00:19.902506  Write Rank1 MR14 =0x6

 3296 02:00:19.911630  

 3297 02:00:19.911741  	CH=1, VrefRange= 0, VrefLevel = 6

 3298 02:00:19.918148  TX Bit0 (979~999) 21 989,   Bit8 (969~987) 19 978,

 3299 02:00:19.921646  TX Bit1 (978~998) 21 988,   Bit9 (968~986) 19 977,

 3300 02:00:19.928157  TX Bit2 (976~992) 17 984,   Bit10 (969~986) 18 977,

 3301 02:00:19.931761  TX Bit3 (975~992) 18 983,   Bit11 (970~990) 21 980,

 3302 02:00:19.935389  TX Bit4 (976~995) 20 985,   Bit12 (969~988) 20 978,

 3303 02:00:19.941765  TX Bit5 (978~998) 21 988,   Bit13 (971~987) 17 979,

 3304 02:00:19.944896  TX Bit6 (978~999) 22 988,   Bit14 (969~988) 20 978,

 3305 02:00:19.948106  TX Bit7 (977~994) 18 985,   Bit15 (966~985) 20 975,

 3306 02:00:19.948183  

 3307 02:00:19.951457  Write Rank1 MR14 =0x8

 3308 02:00:19.961107  

 3309 02:00:19.961210  	CH=1, VrefRange= 0, VrefLevel = 8

 3310 02:00:19.967558  TX Bit0 (978~999) 22 988,   Bit8 (969~988) 20 978,

 3311 02:00:19.971033  TX Bit1 (978~998) 21 988,   Bit9 (968~986) 19 977,

 3312 02:00:19.978009  TX Bit2 (976~993) 18 984,   Bit10 (969~987) 19 978,

 3313 02:00:19.980980  TX Bit3 (974~992) 19 983,   Bit11 (969~991) 23 980,

 3314 02:00:19.984527  TX Bit4 (977~996) 20 986,   Bit12 (969~989) 21 979,

 3315 02:00:19.990819  TX Bit5 (978~998) 21 988,   Bit13 (970~987) 18 978,

 3316 02:00:19.994314  TX Bit6 (978~999) 22 988,   Bit14 (969~988) 20 978,

 3317 02:00:19.998289  TX Bit7 (977~994) 18 985,   Bit15 (966~985) 20 975,

 3318 02:00:19.998371  

 3319 02:00:20.000841  Write Rank1 MR14 =0xa

 3320 02:00:20.010409  

 3321 02:00:20.013785  	CH=1, VrefRange= 0, VrefLevel = 10

 3322 02:00:20.016793  TX Bit0 (978~1000) 23 989,   Bit8 (968~988) 21 978,

 3323 02:00:20.020446  TX Bit1 (978~998) 21 988,   Bit9 (968~987) 20 977,

 3324 02:00:20.027239  TX Bit2 (975~994) 20 984,   Bit10 (969~987) 19 978,

 3325 02:00:20.030380  TX Bit3 (974~993) 20 983,   Bit11 (969~991) 23 980,

 3326 02:00:20.034112  TX Bit4 (976~997) 22 986,   Bit12 (969~990) 22 979,

 3327 02:00:20.040306  TX Bit5 (978~998) 21 988,   Bit13 (970~988) 19 979,

 3328 02:00:20.043747  TX Bit6 (978~999) 22 988,   Bit14 (969~989) 21 979,

 3329 02:00:20.047282  TX Bit7 (977~995) 19 986,   Bit15 (966~985) 20 975,

 3330 02:00:20.047373  

 3331 02:00:20.050201  Write Rank1 MR14 =0xc

 3332 02:00:20.060122  

 3333 02:00:20.063313  	CH=1, VrefRange= 0, VrefLevel = 12

 3334 02:00:20.066661  TX Bit0 (978~1000) 23 989,   Bit8 (968~988) 21 978,

 3335 02:00:20.069858  TX Bit1 (978~999) 22 988,   Bit9 (968~988) 21 978,

 3336 02:00:20.076559  TX Bit2 (975~994) 20 984,   Bit10 (969~988) 20 978,

 3337 02:00:20.080058  TX Bit3 (974~993) 20 983,   Bit11 (969~991) 23 980,

 3338 02:00:20.082905  TX Bit4 (976~997) 22 986,   Bit12 (969~990) 22 979,

 3339 02:00:20.089764  TX Bit5 (978~999) 22 988,   Bit13 (970~989) 20 979,

 3340 02:00:20.093100  TX Bit6 (978~1000) 23 989,   Bit14 (969~990) 22 979,

 3341 02:00:20.099560  TX Bit7 (977~996) 20 986,   Bit15 (966~986) 21 976,

 3342 02:00:20.099639  

 3343 02:00:20.099706  Write Rank1 MR14 =0xe

 3344 02:00:20.109644  

 3345 02:00:20.113207  	CH=1, VrefRange= 0, VrefLevel = 14

 3346 02:00:20.116943  TX Bit0 (978~1000) 23 989,   Bit8 (968~989) 22 978,

 3347 02:00:20.120307  TX Bit1 (978~999) 22 988,   Bit9 (968~988) 21 978,

 3348 02:00:20.126495  TX Bit2 (975~995) 21 985,   Bit10 (968~989) 22 978,

 3349 02:00:20.129804  TX Bit3 (973~994) 22 983,   Bit11 (969~991) 23 980,

 3350 02:00:20.132931  TX Bit4 (976~997) 22 986,   Bit12 (969~990) 22 979,

 3351 02:00:20.139949  TX Bit5 (977~999) 23 988,   Bit13 (969~990) 22 979,

 3352 02:00:20.143039  TX Bit6 (977~1000) 24 988,   Bit14 (969~990) 22 979,

 3353 02:00:20.146530  TX Bit7 (977~997) 21 987,   Bit15 (966~986) 21 976,

 3354 02:00:20.146603  

 3355 02:00:20.149575  Write Rank1 MR14 =0x10

 3356 02:00:20.159740  

 3357 02:00:20.163159  	CH=1, VrefRange= 0, VrefLevel = 16

 3358 02:00:20.166081  TX Bit0 (978~1001) 24 989,   Bit8 (968~990) 23 979,

 3359 02:00:20.169526  TX Bit1 (978~999) 22 988,   Bit9 (967~989) 23 978,

 3360 02:00:20.175939  TX Bit2 (974~996) 23 985,   Bit10 (968~989) 22 978,

 3361 02:00:20.179260  TX Bit3 (973~994) 22 983,   Bit11 (969~992) 24 980,

 3362 02:00:20.182932  TX Bit4 (975~998) 24 986,   Bit12 (969~991) 23 980,

 3363 02:00:20.189210  TX Bit5 (977~999) 23 988,   Bit13 (969~990) 22 979,

 3364 02:00:20.192490  TX Bit6 (977~1000) 24 988,   Bit14 (968~990) 23 979,

 3365 02:00:20.199163  TX Bit7 (976~997) 22 986,   Bit15 (965~986) 22 975,

 3366 02:00:20.199242  

 3367 02:00:20.199304  Write Rank1 MR14 =0x12

 3368 02:00:20.209456  

 3369 02:00:20.212820  	CH=1, VrefRange= 0, VrefLevel = 18

 3370 02:00:20.216327  TX Bit0 (978~1001) 24 989,   Bit8 (968~990) 23 979,

 3371 02:00:20.219722  TX Bit1 (977~1000) 24 988,   Bit9 (967~989) 23 978,

 3372 02:00:20.226360  TX Bit2 (974~996) 23 985,   Bit10 (968~990) 23 979,

 3373 02:00:20.229098  TX Bit3 (972~995) 24 983,   Bit11 (969~992) 24 980,

 3374 02:00:20.232565  TX Bit4 (975~998) 24 986,   Bit12 (969~991) 23 980,

 3375 02:00:20.239774  TX Bit5 (977~1000) 24 988,   Bit13 (969~990) 22 979,

 3376 02:00:20.242854  TX Bit6 (978~1001) 24 989,   Bit14 (969~991) 23 980,

 3377 02:00:20.249116  TX Bit7 (976~997) 22 986,   Bit15 (965~986) 22 975,

 3378 02:00:20.249221  

 3379 02:00:20.249338  Write Rank1 MR14 =0x14

 3380 02:00:20.259602  

 3381 02:00:20.263125  	CH=1, VrefRange= 0, VrefLevel = 20

 3382 02:00:20.266666  TX Bit0 (978~1002) 25 990,   Bit8 (968~990) 23 979,

 3383 02:00:20.270246  TX Bit1 (977~1000) 24 988,   Bit9 (967~990) 24 978,

 3384 02:00:20.276490  TX Bit2 (974~997) 24 985,   Bit10 (968~990) 23 979,

 3385 02:00:20.279615  TX Bit3 (972~996) 25 984,   Bit11 (968~992) 25 980,

 3386 02:00:20.282870  TX Bit4 (975~998) 24 986,   Bit12 (968~991) 24 979,

 3387 02:00:20.289840  TX Bit5 (977~1000) 24 988,   Bit13 (969~991) 23 980,

 3388 02:00:20.293565  TX Bit6 (977~1001) 25 989,   Bit14 (968~991) 24 979,

 3389 02:00:20.299718  TX Bit7 (976~998) 23 987,   Bit15 (965~987) 23 976,

 3390 02:00:20.299791  

 3391 02:00:20.299859  Write Rank1 MR14 =0x16

 3392 02:00:20.310156  

 3393 02:00:20.310232  	CH=1, VrefRange= 0, VrefLevel = 22

 3394 02:00:20.317051  TX Bit0 (977~1002) 26 989,   Bit8 (967~991) 25 979,

 3395 02:00:20.320140  TX Bit1 (977~1000) 24 988,   Bit9 (967~990) 24 978,

 3396 02:00:20.326720  TX Bit2 (973~997) 25 985,   Bit10 (967~990) 24 978,

 3397 02:00:20.330296  TX Bit3 (971~996) 26 983,   Bit11 (968~992) 25 980,

 3398 02:00:20.333461  TX Bit4 (975~998) 24 986,   Bit12 (968~991) 24 979,

 3399 02:00:20.340006  TX Bit5 (977~1000) 24 988,   Bit13 (968~991) 24 979,

 3400 02:00:20.343357  TX Bit6 (977~1001) 25 989,   Bit14 (968~991) 24 979,

 3401 02:00:20.349942  TX Bit7 (976~998) 23 987,   Bit15 (964~988) 25 976,

 3402 02:00:20.350020  

 3403 02:00:20.350082  Write Rank1 MR14 =0x18

 3404 02:00:20.360748  

 3405 02:00:20.364351  	CH=1, VrefRange= 0, VrefLevel = 24

 3406 02:00:20.367320  TX Bit0 (977~1002) 26 989,   Bit8 (967~991) 25 979,

 3407 02:00:20.370761  TX Bit1 (977~1000) 24 988,   Bit9 (967~990) 24 978,

 3408 02:00:20.376887  TX Bit2 (973~997) 25 985,   Bit10 (967~990) 24 978,

 3409 02:00:20.380420  TX Bit3 (971~996) 26 983,   Bit11 (968~992) 25 980,

 3410 02:00:20.383777  TX Bit4 (975~998) 24 986,   Bit12 (968~991) 24 979,

 3411 02:00:20.390339  TX Bit5 (977~1000) 24 988,   Bit13 (968~991) 24 979,

 3412 02:00:20.393636  TX Bit6 (977~1001) 25 989,   Bit14 (968~991) 24 979,

 3413 02:00:20.400736  TX Bit7 (976~998) 23 987,   Bit15 (964~988) 25 976,

 3414 02:00:20.400817  

 3415 02:00:20.400879  Write Rank1 MR14 =0x1a

 3416 02:00:20.411025  

 3417 02:00:20.413870  	CH=1, VrefRange= 0, VrefLevel = 26

 3418 02:00:20.417234  TX Bit0 (977~1002) 26 989,   Bit8 (967~991) 25 979,

 3419 02:00:20.420726  TX Bit1 (977~1000) 24 988,   Bit9 (967~990) 24 978,

 3420 02:00:20.427242  TX Bit2 (973~997) 25 985,   Bit10 (967~990) 24 978,

 3421 02:00:20.430930  TX Bit3 (971~996) 26 983,   Bit11 (968~992) 25 980,

 3422 02:00:20.433881  TX Bit4 (975~998) 24 986,   Bit12 (968~991) 24 979,

 3423 02:00:20.440809  TX Bit5 (977~1000) 24 988,   Bit13 (968~991) 24 979,

 3424 02:00:20.444093  TX Bit6 (977~1001) 25 989,   Bit14 (968~991) 24 979,

 3425 02:00:20.450689  TX Bit7 (976~998) 23 987,   Bit15 (964~988) 25 976,

 3426 02:00:20.450769  

 3427 02:00:20.450831  Write Rank1 MR14 =0x1c

 3428 02:00:20.460907  

 3429 02:00:20.464413  	CH=1, VrefRange= 0, VrefLevel = 28

 3430 02:00:20.467615  TX Bit0 (977~1002) 26 989,   Bit8 (967~991) 25 979,

 3431 02:00:20.470958  TX Bit1 (977~1000) 24 988,   Bit9 (967~990) 24 978,

 3432 02:00:20.478015  TX Bit2 (973~997) 25 985,   Bit10 (967~990) 24 978,

 3433 02:00:20.480840  TX Bit3 (971~996) 26 983,   Bit11 (968~992) 25 980,

 3434 02:00:20.484958  TX Bit4 (975~998) 24 986,   Bit12 (968~991) 24 979,

 3435 02:00:20.491190  TX Bit5 (977~1000) 24 988,   Bit13 (968~991) 24 979,

 3436 02:00:20.494423  TX Bit6 (977~1001) 25 989,   Bit14 (968~991) 24 979,

 3437 02:00:20.500758  TX Bit7 (976~998) 23 987,   Bit15 (964~988) 25 976,

 3438 02:00:20.500867  

 3439 02:00:20.500959  Write Rank1 MR14 =0x1e

 3440 02:00:20.511156  

 3441 02:00:20.514761  	CH=1, VrefRange= 0, VrefLevel = 30

 3442 02:00:20.518058  TX Bit0 (977~1002) 26 989,   Bit8 (967~991) 25 979,

 3443 02:00:20.521191  TX Bit1 (977~1000) 24 988,   Bit9 (967~990) 24 978,

 3444 02:00:20.527816  TX Bit2 (973~997) 25 985,   Bit10 (967~990) 24 978,

 3445 02:00:20.531459  TX Bit3 (971~996) 26 983,   Bit11 (968~992) 25 980,

 3446 02:00:20.534401  TX Bit4 (975~998) 24 986,   Bit12 (968~991) 24 979,

 3447 02:00:20.541174  TX Bit5 (977~1000) 24 988,   Bit13 (968~991) 24 979,

 3448 02:00:20.544349  TX Bit6 (977~1001) 25 989,   Bit14 (968~991) 24 979,

 3449 02:00:20.551327  TX Bit7 (976~998) 23 987,   Bit15 (964~988) 25 976,

 3450 02:00:20.551400  

 3451 02:00:20.551462  Write Rank1 MR14 =0x20

 3452 02:00:20.561494  

 3453 02:00:20.565104  	CH=1, VrefRange= 0, VrefLevel = 32

 3454 02:00:20.568378  TX Bit0 (977~1002) 26 989,   Bit8 (967~991) 25 979,

 3455 02:00:20.571277  TX Bit1 (977~1000) 24 988,   Bit9 (967~990) 24 978,

 3456 02:00:20.578528  TX Bit2 (973~997) 25 985,   Bit10 (967~990) 24 978,

 3457 02:00:20.581411  TX Bit3 (971~996) 26 983,   Bit11 (968~992) 25 980,

 3458 02:00:20.584804  TX Bit4 (975~998) 24 986,   Bit12 (968~991) 24 979,

 3459 02:00:20.591277  TX Bit5 (977~1000) 24 988,   Bit13 (968~991) 24 979,

 3460 02:00:20.594985  TX Bit6 (977~1001) 25 989,   Bit14 (968~991) 24 979,

 3461 02:00:20.601195  TX Bit7 (976~998) 23 987,   Bit15 (964~988) 25 976,

 3462 02:00:20.601282  

 3463 02:00:20.601345  

 3464 02:00:20.604845  TX Vref found, early break! 362< 372

 3465 02:00:20.607928  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 3466 02:00:20.611482  u1DelayCellOfst[0]=7 cells (6 PI)

 3467 02:00:20.614619  u1DelayCellOfst[1]=6 cells (5 PI)

 3468 02:00:20.617987  u1DelayCellOfst[2]=2 cells (2 PI)

 3469 02:00:20.621403  u1DelayCellOfst[3]=0 cells (0 PI)

 3470 02:00:20.624851  u1DelayCellOfst[4]=3 cells (3 PI)

 3471 02:00:20.624925  u1DelayCellOfst[5]=6 cells (5 PI)

 3472 02:00:20.628318  u1DelayCellOfst[6]=7 cells (6 PI)

 3473 02:00:20.631930  u1DelayCellOfst[7]=5 cells (4 PI)

 3474 02:00:20.634948  Byte0, DQ PI dly=983, DQM PI dly= 986

 3475 02:00:20.641303  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)

 3476 02:00:20.641384  

 3477 02:00:20.644921  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)

 3478 02:00:20.645002  

 3479 02:00:20.648293  u1DelayCellOfst[8]=3 cells (3 PI)

 3480 02:00:20.651330  u1DelayCellOfst[9]=2 cells (2 PI)

 3481 02:00:20.654777  u1DelayCellOfst[10]=2 cells (2 PI)

 3482 02:00:20.658397  u1DelayCellOfst[11]=5 cells (4 PI)

 3483 02:00:20.661171  u1DelayCellOfst[12]=3 cells (3 PI)

 3484 02:00:20.664746  u1DelayCellOfst[13]=3 cells (3 PI)

 3485 02:00:20.664826  u1DelayCellOfst[14]=3 cells (3 PI)

 3486 02:00:20.668160  u1DelayCellOfst[15]=0 cells (0 PI)

 3487 02:00:20.671296  Byte1, DQ PI dly=976, DQM PI dly= 978

 3488 02:00:20.678277  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)

 3489 02:00:20.678354  

 3490 02:00:20.681426  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)

 3491 02:00:20.681504  

 3492 02:00:20.684810  Write Rank1 MR14 =0x16

 3493 02:00:20.684922  

 3494 02:00:20.685014  Final TX Range 0 Vref 22

 3495 02:00:20.685103  

 3496 02:00:20.691741  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 3497 02:00:20.694669  

 3498 02:00:20.698035  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3499 02:00:20.708095  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3500 02:00:20.714638  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3501 02:00:20.714739  Write Rank1 MR3 =0xb0

 3502 02:00:20.718146  DramC Write-DBI on

 3503 02:00:20.718226  ==

 3504 02:00:20.721325  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3505 02:00:20.724830  fsp= 1, odt_onoff= 1, Byte mode= 0

 3506 02:00:20.724938  ==

 3507 02:00:20.730947  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 3508 02:00:20.731028  

 3509 02:00:20.734452  Begin, DQ Scan Range 698~762

 3510 02:00:20.734526  

 3511 02:00:20.734586  

 3512 02:00:20.734642  	TX Vref Scan disable

 3513 02:00:20.737997  698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 3514 02:00:20.741457  699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 3515 02:00:20.744325  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 3516 02:00:20.747738  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 3517 02:00:20.754264  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 3518 02:00:20.757744  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 3519 02:00:20.761206  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 3520 02:00:20.764654  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 3521 02:00:20.767428  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 3522 02:00:20.771162  707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 3523 02:00:20.774472  708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]

 3524 02:00:20.777892  709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]

 3525 02:00:20.780795  710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]

 3526 02:00:20.784620  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 3527 02:00:20.787801  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 3528 02:00:20.791136  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 3529 02:00:20.794533  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 3530 02:00:20.797906  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 3531 02:00:20.801405  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 3532 02:00:20.804460  717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]

 3533 02:00:20.807706  718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]

 3534 02:00:20.815923  735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]

 3535 02:00:20.819571  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 3536 02:00:20.822592  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 3537 02:00:20.826185  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 3538 02:00:20.829612  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 3539 02:00:20.832730  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 3540 02:00:20.835983  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 3541 02:00:20.839335  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 3542 02:00:20.842618  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 3543 02:00:20.846239  744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]

 3544 02:00:20.849211  745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]

 3545 02:00:20.852675  Byte0, DQ PI dly=731, DQM PI dly= 731

 3546 02:00:20.856163  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)

 3547 02:00:20.856243  

 3548 02:00:20.863229  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)

 3549 02:00:20.863310  

 3550 02:00:20.866279  Byte1, DQ PI dly=721, DQM PI dly= 721

 3551 02:00:20.869549  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)

 3552 02:00:20.869630  

 3553 02:00:20.873023  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)

 3554 02:00:20.873104  

 3555 02:00:20.879959  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 3556 02:00:20.889301  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3557 02:00:20.896144  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3558 02:00:20.896225  Write Rank1 MR3 =0x30

 3559 02:00:20.899718  DramC Write-DBI off

 3560 02:00:20.899799  

 3561 02:00:20.899860  [DATLAT]

 3562 02:00:20.902772  Freq=1600, CH1 RK1, use_rxtx_scan=0

 3563 02:00:20.902852  

 3564 02:00:20.906222  DATLAT Default: 0x10

 3565 02:00:20.906302  7, 0xFFFF, sum=0

 3566 02:00:20.909528  8, 0xFFFF, sum=0

 3567 02:00:20.909609  9, 0xFFFF, sum=0

 3568 02:00:20.912921  10, 0xFFFF, sum=0

 3569 02:00:20.913008  11, 0xFFFF, sum=0

 3570 02:00:20.916103  12, 0xFFFF, sum=0

 3571 02:00:20.916212  13, 0xFFFF, sum=0

 3572 02:00:20.916308  14, 0x0, sum=1

 3573 02:00:20.919432  15, 0x0, sum=2

 3574 02:00:20.919533  16, 0x0, sum=3

 3575 02:00:20.922987  17, 0x0, sum=4

 3576 02:00:20.926547  pattern=2 first_step=14 total pass=5 best_step=16

 3577 02:00:20.926628  ==

 3578 02:00:20.933104  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3579 02:00:20.933206  fsp= 1, odt_onoff= 1, Byte mode= 0

 3580 02:00:20.936525  ==

 3581 02:00:20.939969  Start DQ dly to find pass range UseTestEngine =1

 3582 02:00:20.943062  x-axis: bit #, y-axis: DQ dly (-127~63)

 3583 02:00:20.943142  RX Vref Scan = 0

 3584 02:00:20.946327  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 3585 02:00:20.949934  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 3586 02:00:20.952965  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 3587 02:00:20.956277  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 3588 02:00:20.959389  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 3589 02:00:20.962936  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 3590 02:00:20.966465  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 3591 02:00:20.966547  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 3592 02:00:20.969501  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 3593 02:00:20.972961  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 3594 02:00:20.976495  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 3595 02:00:20.979799  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 3596 02:00:20.982789  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 3597 02:00:20.986188  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 3598 02:00:20.989523  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 3599 02:00:20.992687  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 3600 02:00:20.992798  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 3601 02:00:20.996056  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 3602 02:00:20.999967  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 3603 02:00:21.003315  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 3604 02:00:21.006544  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 3605 02:00:21.010037  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 3606 02:00:21.013048  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 3607 02:00:21.013146  -3, [0] xxxoxxxx xxxxxxxx [MSB]

 3608 02:00:21.015994  -2, [0] xxxoxxxx xxxxxxxx [MSB]

 3609 02:00:21.019406  -1, [0] xxxoxxxx xxxxxxxx [MSB]

 3610 02:00:21.022912  0, [0] xxooxxxx xxxxxxxo [MSB]

 3611 02:00:21.026106  1, [0] xxooxxxx oxxxxxxo [MSB]

 3612 02:00:21.029439  2, [0] xxoooxxo oooxxxxo [MSB]

 3613 02:00:21.029542  3, [0] xxoooxxo ooooxooo [MSB]

 3614 02:00:21.033234  4, [0] xxoooxxo oooooooo [MSB]

 3615 02:00:21.036591  5, [0] xooooxxo oooooooo [MSB]

 3616 02:00:21.039361  6, [0] ooooooxo oooooooo [MSB]

 3617 02:00:21.042899  7, [0] ooooooxo oooooooo [MSB]

 3618 02:00:21.046617  34, [0] oooxoooo oooooooo [MSB]

 3619 02:00:21.049773  35, [0] oooxoooo ooooooox [MSB]

 3620 02:00:21.052984  36, [0] ooxxoooo ooooooox [MSB]

 3621 02:00:21.056412  37, [0] ooxxxoox ooxooxxx [MSB]

 3622 02:00:21.059441  38, [0] ooxxxoox xxxooxxx [MSB]

 3623 02:00:21.059541  39, [0] ooxxxoox xxxxoxxx [MSB]

 3624 02:00:21.062837  40, [0] ooxxxoox xxxxxxxx [MSB]

 3625 02:00:21.066195  41, [0] oxxxxoox xxxxxxxx [MSB]

 3626 02:00:21.069223  42, [0] oxxxxxox xxxxxxxx [MSB]

 3627 02:00:21.072696  43, [0] xxxxxxxx xxxxxxxx [MSB]

 3628 02:00:21.076248  iDelay=43, Bit 0, Center 24 (6 ~ 42) 37

 3629 02:00:21.079661  iDelay=43, Bit 1, Center 22 (5 ~ 40) 36

 3630 02:00:21.082661  iDelay=43, Bit 2, Center 17 (0 ~ 35) 36

 3631 02:00:21.086820  iDelay=43, Bit 3, Center 15 (-3 ~ 33) 37

 3632 02:00:21.089585  iDelay=43, Bit 4, Center 19 (2 ~ 36) 35

 3633 02:00:21.093075  iDelay=43, Bit 5, Center 23 (6 ~ 41) 36

 3634 02:00:21.096255  iDelay=43, Bit 6, Center 25 (8 ~ 42) 35

 3635 02:00:21.099486  iDelay=43, Bit 7, Center 19 (2 ~ 36) 35

 3636 02:00:21.103003  iDelay=43, Bit 8, Center 19 (1 ~ 37) 37

 3637 02:00:21.106078  iDelay=43, Bit 9, Center 19 (2 ~ 37) 36

 3638 02:00:21.113230  iDelay=43, Bit 10, Center 19 (2 ~ 36) 35

 3639 02:00:21.115935  iDelay=43, Bit 11, Center 20 (3 ~ 38) 36

 3640 02:00:21.119594  iDelay=43, Bit 12, Center 21 (4 ~ 39) 36

 3641 02:00:21.123211  iDelay=43, Bit 13, Center 19 (3 ~ 36) 34

 3642 02:00:21.125889  iDelay=43, Bit 14, Center 19 (3 ~ 36) 34

 3643 02:00:21.129697  iDelay=43, Bit 15, Center 17 (0 ~ 34) 35

 3644 02:00:21.129772  ==

 3645 02:00:21.135874  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3646 02:00:21.139345  fsp= 1, odt_onoff= 1, Byte mode= 0

 3647 02:00:21.139444  ==

 3648 02:00:21.139536  DQS Delay:

 3649 02:00:21.139625  DQS0 = 0, DQS1 = 0

 3650 02:00:21.142950  DQM Delay:

 3651 02:00:21.143045  DQM0 = 20, DQM1 = 19

 3652 02:00:21.146538  DQ Delay:

 3653 02:00:21.149409  DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15

 3654 02:00:21.149485  DQ4 =19, DQ5 =23, DQ6 =25, DQ7 =19

 3655 02:00:21.152640  DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =20

 3656 02:00:21.159639  DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17

 3657 02:00:21.159737  

 3658 02:00:21.159827  

 3659 02:00:21.159912  

 3660 02:00:21.159998  [DramC_TX_OE_Calibration] TA2

 3661 02:00:21.163124  Original DQ_B0 (3 6) =30, OEN = 27

 3662 02:00:21.166038  Original DQ_B1 (3 6) =30, OEN = 27

 3663 02:00:21.169556  23, 0x0, End_B0=23 End_B1=23

 3664 02:00:21.173187  24, 0x0, End_B0=24 End_B1=24

 3665 02:00:21.176055  25, 0x0, End_B0=25 End_B1=25

 3666 02:00:21.176157  26, 0x0, End_B0=26 End_B1=26

 3667 02:00:21.179587  27, 0x0, End_B0=27 End_B1=27

 3668 02:00:21.182883  28, 0x0, End_B0=28 End_B1=28

 3669 02:00:21.186183  29, 0x0, End_B0=29 End_B1=29

 3670 02:00:21.189372  30, 0x0, End_B0=30 End_B1=30

 3671 02:00:21.189474  31, 0xFFFF, End_B0=30 End_B1=30

 3672 02:00:21.195810  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3673 02:00:21.202675  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3674 02:00:21.202780  

 3675 02:00:21.202873  

 3676 02:00:21.202960  Write Rank1 MR23 =0x3f

 3677 02:00:21.205887  [DQSOSC]

 3678 02:00:21.212655  [DQSOSCAuto] RK1, (LSB)MR18= 0xb3, (MSB)MR19= 0x3, tDQSOscB0 = 332 ps tDQSOscB1 = 0 ps

 3679 02:00:21.219691  CH1_RK1: MR19=0x3, MR18=0xB3, DQSOSC=332, MR23=63, INC=22, DEC=33

 3680 02:00:21.219794  Write Rank1 MR23 =0x3f

 3681 02:00:21.223018  [DQSOSC]

 3682 02:00:21.229390  [DQSOSCAuto] RK1, (LSB)MR18= 0xb1, (MSB)MR19= 0x3, tDQSOscB0 = 333 ps tDQSOscB1 = 0 ps

 3683 02:00:21.229476  CH1 RK1: MR19=3, MR18=B1

 3684 02:00:21.232874  [RxdqsGatingPostProcess] freq 1600

 3685 02:00:21.239526  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 3686 02:00:21.239640  Rank: 0

 3687 02:00:21.242726  best DQS0 dly(2T, 0.5T) = (2, 5)

 3688 02:00:21.246145  best DQS1 dly(2T, 0.5T) = (2, 5)

 3689 02:00:21.249149  best DQS0 P1 dly(2T, 0.5T) = (3, 1)

 3690 02:00:21.252576  best DQS1 P1 dly(2T, 0.5T) = (3, 1)

 3691 02:00:21.252734  Rank: 1

 3692 02:00:21.256090  best DQS0 dly(2T, 0.5T) = (2, 5)

 3693 02:00:21.259587  best DQS1 dly(2T, 0.5T) = (2, 5)

 3694 02:00:21.263115  best DQS0 P1 dly(2T, 0.5T) = (3, 1)

 3695 02:00:21.265966  best DQS1 P1 dly(2T, 0.5T) = (3, 1)

 3696 02:00:21.269403  TX_dly_DQSgated check: min 2  max 3, ChangeDQSINCTL=-1

 3697 02:00:21.272498  DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9

 3698 02:00:21.279346  [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16

 3699 02:00:21.279470  

 3700 02:00:21.279537  

 3701 02:00:21.282278  [Calibration Summary] Freqency 1600

 3702 02:00:21.282351  CH 0, Rank 0

 3703 02:00:21.285817  All Pass.

 3704 02:00:21.285888  

 3705 02:00:21.285947  CH 0, Rank 1

 3706 02:00:21.286007  All Pass.

 3707 02:00:21.286062  

 3708 02:00:21.289273  CH 1, Rank 0

 3709 02:00:21.289358  All Pass.

 3710 02:00:21.289421  

 3711 02:00:21.289478  CH 1, Rank 1

 3712 02:00:21.292154  All Pass.

 3713 02:00:21.292250  

 3714 02:00:21.298986  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3715 02:00:21.305990  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3716 02:00:21.312287  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3717 02:00:21.312399  Write Rank0 MR3 =0xb0

 3718 02:00:21.319280  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3719 02:00:21.329249  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3720 02:00:21.335838  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3721 02:00:21.336019  Write Rank1 MR3 =0xb0

 3722 02:00:21.342507  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3723 02:00:21.349168  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3724 02:00:21.355808  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3725 02:00:21.358622  Write Rank0 MR3 =0xb0

 3726 02:00:21.365434  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3727 02:00:21.372337  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3728 02:00:21.378997  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3729 02:00:21.382124  Write Rank1 MR3 =0xb0

 3730 02:00:21.382225  DramC Write-DBI on

 3731 02:00:21.385357  [GetDramInforAfterCalByMRR] Vendor 1.

 3732 02:00:21.389025  [GetDramInforAfterCalByMRR] Revision 7.

 3733 02:00:21.392303  MR8 12

 3734 02:00:21.395718  CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.

 3735 02:00:21.395824  MR8 12

 3736 02:00:21.402609  CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.

 3737 02:00:21.402719  MR8 12

 3738 02:00:21.405968  CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.

 3739 02:00:21.409181  MR8 12

 3740 02:00:21.412182  CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.

 3741 02:00:21.422422  [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0

 3742 02:00:21.422503  Write Rank0 MR13 =0xd0

 3743 02:00:21.425930  Write Rank1 MR13 =0xd0

 3744 02:00:21.428929  Write Rank0 MR13 =0xd0

 3745 02:00:21.429029  Write Rank1 MR13 =0xd0

 3746 02:00:21.432566  Save calibration result to emmc

 3747 02:00:21.432638  

 3748 02:00:21.432703  

 3749 02:00:21.435497  [DramcModeReg_Check] Freq_1600, FSP_1

 3750 02:00:21.438815  FSP_1, CH_0, RK0

 3751 02:00:21.438888  Write Rank0 MR13 =0xd8

 3752 02:00:21.442123  		MR12 = 0x56 (global = 0x56)	match

 3753 02:00:21.445401  		MR14 = 0x18 (global = 0x18)	match

 3754 02:00:21.448624  FSP_1, CH_0, RK1

 3755 02:00:21.448728  Write Rank1 MR13 =0xd8

 3756 02:00:21.452089  		MR12 = 0x56 (global = 0x56)	match

 3757 02:00:21.455475  		MR14 = 0x18 (global = 0x18)	match

 3758 02:00:21.458689  FSP_1, CH_1, RK0

 3759 02:00:21.458761  Write Rank0 MR13 =0xd8

 3760 02:00:21.462375  		MR12 = 0x56 (global = 0x56)	match

 3761 02:00:21.465282  		MR14 = 0x18 (global = 0x18)	match

 3762 02:00:21.468748  FSP_1, CH_1, RK1

 3763 02:00:21.468821  Write Rank1 MR13 =0xd8

 3764 02:00:21.472391  		MR12 = 0x56 (global = 0x56)	match

 3765 02:00:21.475731  		MR14 = 0x16 (global = 0x16)	match

 3766 02:00:21.475805  

 3767 02:00:21.478659  [MEM_TEST] 02: After DFS, before run time config

 3768 02:00:21.491453  [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)

 3769 02:00:21.491546  

 3770 02:00:21.491608  [TA2_TEST]

 3771 02:00:21.491665  === TA2 HW

 3772 02:00:21.494457  TA2 PAT: XTALK

 3773 02:00:21.497853  HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0

 3774 02:00:21.504570  HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0

 3775 02:00:21.507759  HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0

 3776 02:00:21.511144  HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0

 3777 02:00:21.514726  

 3778 02:00:21.514826  

 3779 02:00:21.514933  Settings after calibration

 3780 02:00:21.515022  

 3781 02:00:21.517692  [DramcRunTimeConfig]

 3782 02:00:21.520986  TransferPLLToSPMControl - MODE SW PHYPLL

 3783 02:00:21.521099  TX_TRACKING: ON

 3784 02:00:21.524622  RX_TRACKING: ON

 3785 02:00:21.524728  HW_GATING: ON

 3786 02:00:21.528030  HW_GATING DBG: OFF

 3787 02:00:21.528128  ddr_geometry:1

 3788 02:00:21.531615  ddr_geometry:1

 3789 02:00:21.531715  ddr_geometry:1

 3790 02:00:21.531811  ddr_geometry:1

 3791 02:00:21.534862  ddr_geometry:1

 3792 02:00:21.534965  ddr_geometry:1

 3793 02:00:21.538275  ddr_geometry:1

 3794 02:00:21.538380  ddr_geometry:1

 3795 02:00:21.541397  High Freq DUMMY_READ_FOR_TRACKING: ON

 3796 02:00:21.545101  ZQCS_ENABLE_LP4: OFF

 3797 02:00:21.547881  LOWPOWER_GOLDEN_SETTINGS(DCM): ON

 3798 02:00:21.551230  DUMMY_READ_FOR_DQS_GATING_RETRY: OFF

 3799 02:00:21.551331  SPM_CONTROL_AFTERK: ON

 3800 02:00:21.554898  IMPEDANCE_TRACKING: ON

 3801 02:00:21.554996  TEMP_SENSOR: ON

 3802 02:00:21.557916  PER_BANK_REFRESH: ON

 3803 02:00:21.558015  HW_SAVE_FOR_SR: ON

 3804 02:00:21.561388  SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON

 3805 02:00:21.564699  CLK_FREE_FUN_FOR_DRAMC_PSEL: ON

 3806 02:00:21.567841  PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON

 3807 02:00:21.571000  Read ODT Tracking: ON

 3808 02:00:21.574565  =========================

 3809 02:00:21.574669  

 3810 02:00:21.574759  [TA2_TEST]

 3811 02:00:21.574852  === TA2 HW

 3812 02:00:21.581246  HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0

 3813 02:00:21.584322  HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0

 3814 02:00:21.591206  HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0

 3815 02:00:21.594126  HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0

 3816 02:00:21.594203  

 3817 02:00:21.597489  [MEM_TEST] 03: After run time config

 3818 02:00:21.609027  [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)

 3819 02:00:21.612560  [complex_mem_test] start addr:0x40024000, len:131072

 3820 02:00:21.816621  1st complex R/W mem test pass

 3821 02:00:21.823086  save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0 

 3822 02:00:21.826486  sync preloader write leveling

 3823 02:00:21.830081  sync preloader cbt_mr12

 3824 02:00:21.833160  sync preloader cbt_clk_dly

 3825 02:00:21.833284  sync preloader cbt_cmd_dly

 3826 02:00:21.836299  sync preloader cbt_cs

 3827 02:00:21.839841  sync preloader cbt_ca_perbit_delay

 3828 02:00:21.839918  sync preloader clk_delay

 3829 02:00:21.843397  sync preloader dqs_delay

 3830 02:00:21.846736  sync preloader u1Gating2T_Save

 3831 02:00:21.849611  sync preloader u1Gating05T_Save

 3832 02:00:21.853086  sync preloader u1Gatingfine_tune_Save

 3833 02:00:21.856377  sync preloader u1Gatingucpass_count_Save

 3834 02:00:21.859598  sync preloader u1TxWindowPerbitVref_Save

 3835 02:00:21.863212  sync preloader u1TxCenter_min_Save

 3836 02:00:21.866608  sync preloader u1TxCenter_max_Save

 3837 02:00:21.869823  sync preloader u1Txwin_center_Save

 3838 02:00:21.873226  sync preloader u1Txfirst_pass_Save

 3839 02:00:21.876504  sync preloader u1Txlast_pass_Save

 3840 02:00:21.876636  sync preloader u1RxDatlat_Save

 3841 02:00:21.883254  sync preloader u1RxWinPerbitVref_Save

 3842 02:00:21.886356  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 3843 02:00:21.889795  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 3844 02:00:21.892781  sync preloader delay_cell_unit

 3845 02:00:21.899539  save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1 

 3846 02:00:21.902776  sync preloader write leveling

 3847 02:00:21.902908  sync preloader cbt_mr12

 3848 02:00:21.906502  sync preloader cbt_clk_dly

 3849 02:00:21.909636  sync preloader cbt_cmd_dly

 3850 02:00:21.909713  sync preloader cbt_cs

 3851 02:00:21.912736  sync preloader cbt_ca_perbit_delay

 3852 02:00:21.916206  sync preloader clk_delay

 3853 02:00:21.919438  sync preloader dqs_delay

 3854 02:00:21.922495  sync preloader u1Gating2T_Save

 3855 02:00:21.922570  sync preloader u1Gating05T_Save

 3856 02:00:21.926396  sync preloader u1Gatingfine_tune_Save

 3857 02:00:21.929281  sync preloader u1Gatingucpass_count_Save

 3858 02:00:21.936398  sync preloader u1TxWindowPerbitVref_Save

 3859 02:00:21.939867  sync preloader u1TxCenter_min_Save

 3860 02:00:21.939950  sync preloader u1TxCenter_max_Save

 3861 02:00:21.942696  sync preloader u1Txwin_center_Save

 3862 02:00:21.945999  sync preloader u1Txfirst_pass_Save

 3863 02:00:21.949137  sync preloader u1Txlast_pass_Save

 3864 02:00:21.952630  sync preloader u1RxDatlat_Save

 3865 02:00:21.956165  sync preloader u1RxWinPerbitVref_Save

 3866 02:00:21.958974  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 3867 02:00:21.965829  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 3868 02:00:21.965913  sync preloader delay_cell_unit

 3869 02:00:21.972824  save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2 

 3870 02:00:21.975617  sync preloader write leveling

 3871 02:00:21.978972  sync preloader cbt_mr12

 3872 02:00:21.982384  sync preloader cbt_clk_dly

 3873 02:00:21.982464  sync preloader cbt_cmd_dly

 3874 02:00:21.985725  sync preloader cbt_cs

 3875 02:00:21.989241  sync preloader cbt_ca_perbit_delay

 3876 02:00:21.992295  sync preloader clk_delay

 3877 02:00:21.992368  sync preloader dqs_delay

 3878 02:00:21.995615  sync preloader u1Gating2T_Save

 3879 02:00:21.999169  sync preloader u1Gating05T_Save

 3880 02:00:22.002383  sync preloader u1Gatingfine_tune_Save

 3881 02:00:22.006012  sync preloader u1Gatingucpass_count_Save

 3882 02:00:22.009134  sync preloader u1TxWindowPerbitVref_Save

 3883 02:00:22.012505  sync preloader u1TxCenter_min_Save

 3884 02:00:22.015611  sync preloader u1TxCenter_max_Save

 3885 02:00:22.019358  sync preloader u1Txwin_center_Save

 3886 02:00:22.022477  sync preloader u1Txfirst_pass_Save

 3887 02:00:22.025851  sync preloader u1Txlast_pass_Save

 3888 02:00:22.025929  sync preloader u1RxDatlat_Save

 3889 02:00:22.032614  sync preloader u1RxWinPerbitVref_Save

 3890 02:00:22.035801  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 3891 02:00:22.039073  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 3892 02:00:22.042557  sync preloader delay_cell_unit

 3893 02:00:22.046060  just_for_test_dump_coreboot_params dump all params

 3894 02:00:22.049153  dump source = 0x0

 3895 02:00:22.049289  dump params frequency:1600

 3896 02:00:22.052305  dump params rank number:2

 3897 02:00:22.052385  

 3898 02:00:22.055787   dump params write leveling

 3899 02:00:22.059018  write leveling[0][0][0] = 0x20

 3900 02:00:22.062519  write leveling[0][0][1] = 0x1c

 3901 02:00:22.062588  write leveling[0][1][0] = 0x23

 3902 02:00:22.065588  write leveling[0][1][1] = 0x1e

 3903 02:00:22.069288  write leveling[1][0][0] = 0x25

 3904 02:00:22.072635  write leveling[1][0][1] = 0x1f

 3905 02:00:22.075975  write leveling[1][1][0] = 0x24

 3906 02:00:22.076045  write leveling[1][1][1] = 0x1f

 3907 02:00:22.079287  dump params cbt_cs

 3908 02:00:22.082226  cbt_cs[0][0] = 0xa

 3909 02:00:22.082297  cbt_cs[0][1] = 0xa

 3910 02:00:22.086072  cbt_cs[1][0] = 0xa

 3911 02:00:22.086141  cbt_cs[1][1] = 0xa

 3912 02:00:22.089457  dump params cbt_mr12

 3913 02:00:22.089553  cbt_mr12[0][0] = 0x16

 3914 02:00:22.092500  cbt_mr12[0][1] = 0x16

 3915 02:00:22.092568  cbt_mr12[1][0] = 0x16

 3916 02:00:22.096159  cbt_mr12[1][1] = 0x16

 3917 02:00:22.098911  dump params tx window

 3918 02:00:22.098982  tx_center_min[0][0][0] = 979

 3919 02:00:22.102563  tx_center_max[0][0][0] =  985

 3920 02:00:22.105672  tx_center_min[0][0][1] = 974

 3921 02:00:22.108851  tx_center_max[0][0][1] =  979

 3922 02:00:22.112556  tx_center_min[0][1][0] = 982

 3923 02:00:22.112626  tx_center_max[0][1][0] =  990

 3924 02:00:22.115927  tx_center_min[0][1][1] = 978

 3925 02:00:22.118908  tx_center_max[0][1][1] =  982

 3926 02:00:22.122168  tx_center_min[1][0][0] = 984

 3927 02:00:22.125612  tx_center_max[1][0][0] =  990

 3928 02:00:22.125682  tx_center_min[1][0][1] = 975

 3929 02:00:22.128929  tx_center_max[1][0][1] =  980

 3930 02:00:22.132631  tx_center_min[1][1][0] = 983

 3931 02:00:22.135797  tx_center_max[1][1][0] =  989

 3932 02:00:22.135866  tx_center_min[1][1][1] = 976

 3933 02:00:22.139039  tx_center_max[1][1][1] =  980

 3934 02:00:22.142488  dump params tx window

 3935 02:00:22.145964  tx_win_center[0][0][0] = 985

 3936 02:00:22.146035  tx_first_pass[0][0][0] =  973

 3937 02:00:22.149486  tx_last_pass[0][0][0] =	997

 3938 02:00:22.152486  tx_win_center[0][0][1] = 983

 3939 02:00:22.155796  tx_first_pass[0][0][1] =  972

 3940 02:00:22.158816  tx_last_pass[0][0][1] =	995

 3941 02:00:22.158886  tx_win_center[0][0][2] = 983

 3942 02:00:22.162191  tx_first_pass[0][0][2] =  971

 3943 02:00:22.165558  tx_last_pass[0][0][2] =	995

 3944 02:00:22.169533  tx_win_center[0][0][3] = 979

 3945 02:00:22.169602  tx_first_pass[0][0][3] =  967

 3946 02:00:22.172759  tx_last_pass[0][0][3] =	991

 3947 02:00:22.175641  tx_win_center[0][0][4] = 983

 3948 02:00:22.179198  tx_first_pass[0][0][4] =  971

 3949 02:00:22.179296  tx_last_pass[0][0][4] =	996

 3950 02:00:22.182640  tx_win_center[0][0][5] = 979

 3951 02:00:22.186208  tx_first_pass[0][0][5] =  968

 3952 02:00:22.189280  tx_last_pass[0][0][5] =	991

 3953 02:00:22.192631  tx_win_center[0][0][6] = 980

 3954 02:00:22.192719  tx_first_pass[0][0][6] =  968

 3955 02:00:22.195786  tx_last_pass[0][0][6] =	992

 3956 02:00:22.199033  tx_win_center[0][0][7] = 981

 3957 02:00:22.202369  tx_first_pass[0][0][7] =  970

 3958 02:00:22.202440  tx_last_pass[0][0][7] =	993

 3959 02:00:22.205677  tx_win_center[0][0][8] = 974

 3960 02:00:22.208953  tx_first_pass[0][0][8] =  962

 3961 02:00:22.212479  tx_last_pass[0][0][8] =	987

 3962 02:00:22.215738  tx_win_center[0][0][9] = 975

 3963 02:00:22.215811  tx_first_pass[0][0][9] =  963

 3964 02:00:22.219247  tx_last_pass[0][0][9] =	988

 3965 02:00:22.222244  tx_win_center[0][0][10] = 979

 3966 02:00:22.225744  tx_first_pass[0][0][10] =  968

 3967 02:00:22.225816  tx_last_pass[0][0][10] =	991

 3968 02:00:22.229214  tx_win_center[0][0][11] = 974

 3969 02:00:22.232256  tx_first_pass[0][0][11] =  962

 3970 02:00:22.235932  tx_last_pass[0][0][11] =	987

 3971 02:00:22.239407  tx_win_center[0][0][12] = 976

 3972 02:00:22.242871  tx_first_pass[0][0][12] =  963

 3973 02:00:22.242941  tx_last_pass[0][0][12] =	989

 3974 02:00:22.245966  tx_win_center[0][0][13] = 975

 3975 02:00:22.249240  tx_first_pass[0][0][13] =  962

 3976 02:00:22.253096  tx_last_pass[0][0][13] =	988

 3977 02:00:22.253200  tx_win_center[0][0][14] = 976

 3978 02:00:22.255702  tx_first_pass[0][0][14] =  964

 3979 02:00:22.259436  tx_last_pass[0][0][14] =	988

 3980 02:00:22.262604  tx_win_center[0][0][15] = 978

 3981 02:00:22.266144  tx_first_pass[0][0][15] =  967

 3982 02:00:22.266214  tx_last_pass[0][0][15] =	990

 3983 02:00:22.269028  tx_win_center[0][1][0] = 990

 3984 02:00:22.272766  tx_first_pass[0][1][0] =  977

 3985 02:00:22.276433  tx_last_pass[0][1][0] =	1003

 3986 02:00:22.279508  tx_win_center[0][1][1] = 989

 3987 02:00:22.279607  tx_first_pass[0][1][1] =  977

 3988 02:00:22.283180  tx_last_pass[0][1][1] =	1001

 3989 02:00:22.286020  tx_win_center[0][1][2] = 989

 3990 02:00:22.289539  tx_first_pass[0][1][2] =  977

 3991 02:00:22.289611  tx_last_pass[0][1][2] =	1001

 3992 02:00:22.292901  tx_win_center[0][1][3] = 982

 3993 02:00:22.296261  tx_first_pass[0][1][3] =  970

 3994 02:00:22.299445  tx_last_pass[0][1][3] =	995

 3995 02:00:22.302677  tx_win_center[0][1][4] = 988

 3996 02:00:22.302753  tx_first_pass[0][1][4] =  976

 3997 02:00:22.305911  tx_last_pass[0][1][4] =	1001

 3998 02:00:22.309508  tx_win_center[0][1][5] = 984

 3999 02:00:22.313220  tx_first_pass[0][1][5] =  972

 4000 02:00:22.316052  tx_last_pass[0][1][5] =	997

 4001 02:00:22.316125  tx_win_center[0][1][6] = 985

 4002 02:00:22.319188  tx_first_pass[0][1][6] =  972

 4003 02:00:22.322873  tx_last_pass[0][1][6] =	998

 4004 02:00:22.325916  tx_win_center[0][1][7] = 987

 4005 02:00:22.325987  tx_first_pass[0][1][7] =  975

 4006 02:00:22.329365  tx_last_pass[0][1][7] =	999

 4007 02:00:22.332673  tx_win_center[0][1][8] = 979

 4008 02:00:22.336504  tx_first_pass[0][1][8] =  967

 4009 02:00:22.339178  tx_last_pass[0][1][8] =	991

 4010 02:00:22.339250  tx_win_center[0][1][9] = 979

 4011 02:00:22.342605  tx_first_pass[0][1][9] =  968

 4012 02:00:22.346107  tx_last_pass[0][1][9] =	991

 4013 02:00:22.349137  tx_win_center[0][1][10] = 982

 4014 02:00:22.352331  tx_first_pass[0][1][10] =  970

 4015 02:00:22.352406  tx_last_pass[0][1][10] =	994

 4016 02:00:22.355619  tx_win_center[0][1][11] = 978

 4017 02:00:22.359217  tx_first_pass[0][1][11] =  967

 4018 02:00:22.362295  tx_last_pass[0][1][11] =	990

 4019 02:00:22.365894  tx_win_center[0][1][12] = 979

 4020 02:00:22.365966  tx_first_pass[0][1][12] =  967

 4021 02:00:22.368920  tx_last_pass[0][1][12] =	991

 4022 02:00:22.372297  tx_win_center[0][1][13] = 978

 4023 02:00:22.375664  tx_first_pass[0][1][13] =  966

 4024 02:00:22.379277  tx_last_pass[0][1][13] =	990

 4025 02:00:22.379347  tx_win_center[0][1][14] = 979

 4026 02:00:22.382201  tx_first_pass[0][1][14] =  967

 4027 02:00:22.385512  tx_last_pass[0][1][14] =	991

 4028 02:00:22.389152  tx_win_center[0][1][15] = 980

 4029 02:00:22.392555  tx_first_pass[0][1][15] =  969

 4030 02:00:22.392625  tx_last_pass[0][1][15] =	992

 4031 02:00:22.395887  tx_win_center[1][0][0] = 990

 4032 02:00:22.398766  tx_first_pass[1][0][0] =  977

 4033 02:00:22.402224  tx_last_pass[1][0][0] =	1003

 4034 02:00:22.405359  tx_win_center[1][0][1] = 988

 4035 02:00:22.405432  tx_first_pass[1][0][1] =  976

 4036 02:00:22.409093  tx_last_pass[1][0][1] =	1000

 4037 02:00:22.412289  tx_win_center[1][0][2] = 986

 4038 02:00:22.415590  tx_first_pass[1][0][2] =  974

 4039 02:00:22.415663  tx_last_pass[1][0][2] =	998

 4040 02:00:22.418937  tx_win_center[1][0][3] = 984

 4041 02:00:22.422249  tx_first_pass[1][0][3] =  972

 4042 02:00:22.425716  tx_last_pass[1][0][3] =	997

 4043 02:00:22.429067  tx_win_center[1][0][4] = 987

 4044 02:00:22.429176  tx_first_pass[1][0][4] =  976

 4045 02:00:22.432357  tx_last_pass[1][0][4] =	999

 4046 02:00:22.435430  tx_win_center[1][0][5] = 989

 4047 02:00:22.439164  tx_first_pass[1][0][5] =  977

 4048 02:00:22.439238  tx_last_pass[1][0][5] =	1001

 4049 02:00:22.442153  tx_win_center[1][0][6] = 990

 4050 02:00:22.445635  tx_first_pass[1][0][6] =  977

 4051 02:00:22.448705  tx_last_pass[1][0][6] =	1003

 4052 02:00:22.451951  tx_win_center[1][0][7] = 987

 4053 02:00:22.452022  tx_first_pass[1][0][7] =  976

 4054 02:00:22.455597  tx_last_pass[1][0][7] =	999

 4055 02:00:22.458687  tx_win_center[1][0][8] = 978

 4056 02:00:22.462195  tx_first_pass[1][0][8] =  966

 4057 02:00:22.462264  tx_last_pass[1][0][8] =	991

 4058 02:00:22.465582  tx_win_center[1][0][9] = 978

 4059 02:00:22.468914  tx_first_pass[1][0][9] =  966

 4060 02:00:22.472451  tx_last_pass[1][0][9] =	990

 4061 02:00:22.475866  tx_win_center[1][0][10] = 979

 4062 02:00:22.475971  tx_first_pass[1][0][10] =  968

 4063 02:00:22.479184  tx_last_pass[1][0][10] =	991

 4064 02:00:22.482746  tx_win_center[1][0][11] = 980

 4065 02:00:22.485988  tx_first_pass[1][0][11] =  968

 4066 02:00:22.488840  tx_last_pass[1][0][11] =	992

 4067 02:00:22.488919  tx_win_center[1][0][12] = 980

 4068 02:00:22.492266  tx_first_pass[1][0][12] =  968

 4069 02:00:22.495466  tx_last_pass[1][0][12] =	992

 4070 02:00:22.498882  tx_win_center[1][0][13] = 980

 4071 02:00:22.502509  tx_first_pass[1][0][13] =  969

 4072 02:00:22.502588  tx_last_pass[1][0][13] =	991

 4073 02:00:22.505578  tx_win_center[1][0][14] = 979

 4074 02:00:22.509013  tx_first_pass[1][0][14] =  968

 4075 02:00:22.512636  tx_last_pass[1][0][14] =	991

 4076 02:00:22.515371  tx_win_center[1][0][15] = 975

 4077 02:00:22.515450  tx_first_pass[1][0][15] =  963

 4078 02:00:22.519263  tx_last_pass[1][0][15] =	988

 4079 02:00:22.522268  tx_win_center[1][1][0] = 989

 4080 02:00:22.525750  tx_first_pass[1][1][0] =  977

 4081 02:00:22.525829  tx_last_pass[1][1][0] =	1002

 4082 02:00:22.529153  tx_win_center[1][1][1] = 988

 4083 02:00:22.532444  tx_first_pass[1][1][1] =  977

 4084 02:00:22.536154  tx_last_pass[1][1][1] =	1000

 4085 02:00:22.539416  tx_win_center[1][1][2] = 985

 4086 02:00:22.539496  tx_first_pass[1][1][2] =  973

 4087 02:00:22.542439  tx_last_pass[1][1][2] =	997

 4088 02:00:22.545546  tx_win_center[1][1][3] = 983

 4089 02:00:22.549290  tx_first_pass[1][1][3] =  971

 4090 02:00:22.549382  tx_last_pass[1][1][3] =	996

 4091 02:00:22.552611  tx_win_center[1][1][4] = 986

 4092 02:00:22.555702  tx_first_pass[1][1][4] =  975

 4093 02:00:22.559229  tx_last_pass[1][1][4] =	998

 4094 02:00:22.562737  tx_win_center[1][1][5] = 988

 4095 02:00:22.562816  tx_first_pass[1][1][5] =  977

 4096 02:00:22.565631  tx_last_pass[1][1][5] =	1000

 4097 02:00:22.569028  tx_win_center[1][1][6] = 989

 4098 02:00:22.572571  tx_first_pass[1][1][6] =  977

 4099 02:00:22.575997  tx_last_pass[1][1][6] =	1001

 4100 02:00:22.576077  tx_win_center[1][1][7] = 987

 4101 02:00:22.579261  tx_first_pass[1][1][7] =  976

 4102 02:00:22.582210  tx_last_pass[1][1][7] =	998

 4103 02:00:22.585774  tx_win_center[1][1][8] = 979

 4104 02:00:22.585854  tx_first_pass[1][1][8] =  967

 4105 02:00:22.589285  tx_last_pass[1][1][8] =	991

 4106 02:00:22.592334  tx_win_center[1][1][9] = 978

 4107 02:00:22.595832  tx_first_pass[1][1][9] =  967

 4108 02:00:22.595912  tx_last_pass[1][1][9] =	990

 4109 02:00:22.598800  tx_win_center[1][1][10] = 978

 4110 02:00:22.602395  tx_first_pass[1][1][10] =  967

 4111 02:00:22.605787  tx_last_pass[1][1][10] =	990

 4112 02:00:22.608974  tx_win_center[1][1][11] = 980

 4113 02:00:22.612440  tx_first_pass[1][1][11] =  968

 4114 02:00:22.612519  tx_last_pass[1][1][11] =	992

 4115 02:00:22.615850  tx_win_center[1][1][12] = 979

 4116 02:00:22.618967  tx_first_pass[1][1][12] =  968

 4117 02:00:22.622249  tx_last_pass[1][1][12] =	991

 4118 02:00:22.625686  tx_win_center[1][1][13] = 979

 4119 02:00:22.625765  tx_first_pass[1][1][13] =  968

 4120 02:00:22.629250  tx_last_pass[1][1][13] =	991

 4121 02:00:22.632291  tx_win_center[1][1][14] = 979

 4122 02:00:22.635885  tx_first_pass[1][1][14] =  968

 4123 02:00:22.639241  tx_last_pass[1][1][14] =	991

 4124 02:00:22.639320  tx_win_center[1][1][15] = 976

 4125 02:00:22.642302  tx_first_pass[1][1][15] =  964

 4126 02:00:22.645657  tx_last_pass[1][1][15] =	988

 4127 02:00:22.649022  dump params rx window

 4128 02:00:22.649127  rx_firspass[0][0][0] = 9

 4129 02:00:22.652493  rx_lastpass[0][0][0] =  42

 4130 02:00:22.655683  rx_firspass[0][0][1] = 8

 4131 02:00:22.655762  rx_lastpass[0][0][1] =  40

 4132 02:00:22.658972  rx_firspass[0][0][2] = 9

 4133 02:00:22.662241  rx_lastpass[0][0][2] =  39

 4134 02:00:22.662320  rx_firspass[0][0][3] = -2

 4135 02:00:22.665921  rx_lastpass[0][0][3] =  31

 4136 02:00:22.668836  rx_firspass[0][0][4] = 7

 4137 02:00:22.672575  rx_lastpass[0][0][4] =  39

 4138 02:00:22.672653  rx_firspass[0][0][5] = 3

 4139 02:00:22.676031  rx_lastpass[0][0][5] =  29

 4140 02:00:22.679265  rx_firspass[0][0][6] = 2

 4141 02:00:22.679343  rx_lastpass[0][0][6] =  32

 4142 02:00:22.682166  rx_firspass[0][0][7] = 4

 4143 02:00:22.685717  rx_lastpass[0][0][7] =  34

 4144 02:00:22.685795  rx_firspass[0][0][8] = 2

 4145 02:00:22.689179  rx_lastpass[0][0][8] =  34

 4146 02:00:22.692290  rx_firspass[0][0][9] = 5

 4147 02:00:22.695460  rx_lastpass[0][0][9] =  36

 4148 02:00:22.695539  rx_firspass[0][0][10] = 9

 4149 02:00:22.698862  rx_lastpass[0][0][10] =  38

 4150 02:00:22.702309  rx_firspass[0][0][11] = 3

 4151 02:00:22.702388  rx_lastpass[0][0][11] =  31

 4152 02:00:22.705749  rx_firspass[0][0][12] = 5

 4153 02:00:22.709199  rx_lastpass[0][0][12] =  34

 4154 02:00:22.712338  rx_firspass[0][0][13] = 1

 4155 02:00:22.712416  rx_lastpass[0][0][13] =  32

 4156 02:00:22.715776  rx_firspass[0][0][14] = 3

 4157 02:00:22.719393  rx_lastpass[0][0][14] =  33

 4158 02:00:22.719469  rx_firspass[0][0][15] = 4

 4159 02:00:22.722480  rx_lastpass[0][0][15] =  35

 4160 02:00:22.725402  rx_firspass[0][1][0] = 8

 4161 02:00:22.729367  rx_lastpass[0][1][0] =  42

 4162 02:00:22.729469  rx_firspass[0][1][1] = 7

 4163 02:00:22.732090  rx_lastpass[0][1][1] =  42

 4164 02:00:22.735385  rx_firspass[0][1][2] = 7

 4165 02:00:22.735452  rx_lastpass[0][1][2] =  42

 4166 02:00:22.738660  rx_firspass[0][1][3] = -2

 4167 02:00:22.742164  rx_lastpass[0][1][3] =  33

 4168 02:00:22.745664  rx_firspass[0][1][4] = 5

 4169 02:00:22.745730  rx_lastpass[0][1][4] =  41

 4170 02:00:22.749126  rx_firspass[0][1][5] = 1

 4171 02:00:22.752193  rx_lastpass[0][1][5] =  34

 4172 02:00:22.752259  rx_firspass[0][1][6] = 2

 4173 02:00:22.755443  rx_lastpass[0][1][6] =  35

 4174 02:00:22.759068  rx_firspass[0][1][7] = 2

 4175 02:00:22.759135  rx_lastpass[0][1][7] =  36

 4176 02:00:22.762572  rx_firspass[0][1][8] = 0

 4177 02:00:22.765294  rx_lastpass[0][1][8] =  36

 4178 02:00:22.768648  rx_firspass[0][1][9] = 2

 4179 02:00:22.768711  rx_lastpass[0][1][9] =  38

 4180 02:00:22.772466  rx_firspass[0][1][10] = 6

 4181 02:00:22.775357  rx_lastpass[0][1][10] =  41

 4182 02:00:22.775424  rx_firspass[0][1][11] = 1

 4183 02:00:22.778497  rx_lastpass[0][1][11] =  33

 4184 02:00:22.782135  rx_firspass[0][1][12] = 2

 4185 02:00:22.785366  rx_lastpass[0][1][12] =  36

 4186 02:00:22.785437  rx_firspass[0][1][13] = 0

 4187 02:00:22.788351  rx_lastpass[0][1][13] =  34

 4188 02:00:22.791662  rx_firspass[0][1][14] = 1

 4189 02:00:22.795180  rx_lastpass[0][1][14] =  36

 4190 02:00:22.795249  rx_firspass[0][1][15] = 3

 4191 02:00:22.798764  rx_lastpass[0][1][15] =  38

 4192 02:00:22.801695  rx_firspass[1][0][0] = 7

 4193 02:00:22.801764  rx_lastpass[1][0][0] =  42

 4194 02:00:22.804922  rx_firspass[1][0][1] = 6

 4195 02:00:22.808089  rx_lastpass[1][0][1] =  40

 4196 02:00:22.811579  rx_firspass[1][0][2] = 0

 4197 02:00:22.811653  rx_lastpass[1][0][2] =  33

 4198 02:00:22.814970  rx_firspass[1][0][3] = -1

 4199 02:00:22.818265  rx_lastpass[1][0][3] =  32

 4200 02:00:22.818340  rx_firspass[1][0][4] = 3

 4201 02:00:22.821358  rx_lastpass[1][0][4] =  34

 4202 02:00:22.824771  rx_firspass[1][0][5] = 8

 4203 02:00:22.824845  rx_lastpass[1][0][5] =  40

 4204 02:00:22.828523  rx_firspass[1][0][6] = 9

 4205 02:00:22.831929  rx_lastpass[1][0][6] =  41

 4206 02:00:22.835155  rx_firspass[1][0][7] = 4

 4207 02:00:22.835226  rx_lastpass[1][0][7] =  34

 4208 02:00:22.838360  rx_firspass[1][0][8] = 2

 4209 02:00:22.841502  rx_lastpass[1][0][8] =  36

 4210 02:00:22.841603  rx_firspass[1][0][9] = 3

 4211 02:00:22.844870  rx_lastpass[1][0][9] =  36

 4212 02:00:22.848471  rx_firspass[1][0][10] = 1

 4213 02:00:22.851292  rx_lastpass[1][0][10] =  35

 4214 02:00:22.851363  rx_firspass[1][0][11] = 3

 4215 02:00:22.854905  rx_lastpass[1][0][11] =  36

 4216 02:00:22.858306  rx_firspass[1][0][12] = 5

 4217 02:00:22.858377  rx_lastpass[1][0][12] =  36

 4218 02:00:22.861136  rx_firspass[1][0][13] = 4

 4219 02:00:22.864607  rx_lastpass[1][0][13] =  34

 4220 02:00:22.867606  rx_firspass[1][0][14] = 3

 4221 02:00:22.867682  rx_lastpass[1][0][14] =  35

 4222 02:00:22.871090  rx_firspass[1][0][15] = 0

 4223 02:00:22.874718  rx_lastpass[1][0][15] =  34

 4224 02:00:22.877760  rx_firspass[1][1][0] = 6

 4225 02:00:22.877832  rx_lastpass[1][1][0] =  42

 4226 02:00:22.881368  rx_firspass[1][1][1] = 5

 4227 02:00:22.884365  rx_lastpass[1][1][1] =  40

 4228 02:00:22.884439  rx_firspass[1][1][2] = 0

 4229 02:00:22.887757  rx_lastpass[1][1][2] =  35

 4230 02:00:22.891404  rx_firspass[1][1][3] = -3

 4231 02:00:22.891473  rx_lastpass[1][1][3] =  33

 4232 02:00:22.894397  rx_firspass[1][1][4] = 2

 4233 02:00:22.897734  rx_lastpass[1][1][4] =  36

 4234 02:00:22.901114  rx_firspass[1][1][5] = 6

 4235 02:00:22.901211  rx_lastpass[1][1][5] =  41

 4236 02:00:22.904057  rx_firspass[1][1][6] = 8

 4237 02:00:22.907623  rx_lastpass[1][1][6] =  42

 4238 02:00:22.907702  rx_firspass[1][1][7] = 2

 4239 02:00:22.910834  rx_lastpass[1][1][7] =  36

 4240 02:00:22.914307  rx_firspass[1][1][8] = 1

 4241 02:00:22.917563  rx_lastpass[1][1][8] =  37

 4242 02:00:22.917640  rx_firspass[1][1][9] = 2

 4243 02:00:22.921096  rx_lastpass[1][1][9] =  37

 4244 02:00:22.924079  rx_firspass[1][1][10] = 2

 4245 02:00:22.924151  rx_lastpass[1][1][10] =  36

 4246 02:00:22.927590  rx_firspass[1][1][11] = 3

 4247 02:00:22.931038  rx_lastpass[1][1][11] =  38

 4248 02:00:22.934682  rx_firspass[1][1][12] = 4

 4249 02:00:22.934751  rx_lastpass[1][1][12] =  39

 4250 02:00:22.937556  rx_firspass[1][1][13] = 3

 4251 02:00:22.941096  rx_lastpass[1][1][13] =  36

 4252 02:00:22.941201  rx_firspass[1][1][14] = 3

 4253 02:00:22.944546  rx_lastpass[1][1][14] =  36

 4254 02:00:22.947767  rx_firspass[1][1][15] = 0

 4255 02:00:22.950890  rx_lastpass[1][1][15] =  34

 4256 02:00:22.950988  dump params clk_delay

 4257 02:00:22.954084  clk_delay[0] = -1

 4258 02:00:22.954158  clk_delay[1] = 0

 4259 02:00:22.957834  dump params dqs_delay

 4260 02:00:22.957904  dqs_delay[0][0] = 0

 4261 02:00:22.960618  dqs_delay[0][1] = 0

 4262 02:00:22.960689  dqs_delay[1][0] = -1

 4263 02:00:22.964414  dqs_delay[1][1] = 0

 4264 02:00:22.967779  dump params delay_cell_unit = 762

 4265 02:00:22.967853  dump source = 0x0

 4266 02:00:22.970738  dump params frequency:1200

 4267 02:00:22.974170  dump params rank number:2

 4268 02:00:22.974243  

 4269 02:00:22.977767   dump params write leveling

 4270 02:00:22.977835  write leveling[0][0][0] = 0x0

 4271 02:00:22.980861  write leveling[0][0][1] = 0x0

 4272 02:00:22.984398  write leveling[0][1][0] = 0x0

 4273 02:00:22.987342  write leveling[0][1][1] = 0x0

 4274 02:00:22.990730  write leveling[1][0][0] = 0x0

 4275 02:00:22.990799  write leveling[1][0][1] = 0x0

 4276 02:00:22.994270  write leveling[1][1][0] = 0x0

 4277 02:00:22.997916  write leveling[1][1][1] = 0x0

 4278 02:00:23.000807  dump params cbt_cs

 4279 02:00:23.000878  cbt_cs[0][0] = 0x0

 4280 02:00:23.004228  cbt_cs[0][1] = 0x0

 4281 02:00:23.004299  cbt_cs[1][0] = 0x0

 4282 02:00:23.007716  cbt_cs[1][1] = 0x0

 4283 02:00:23.007787  dump params cbt_mr12

 4284 02:00:23.010919  cbt_mr12[0][0] = 0x0

 4285 02:00:23.010989  cbt_mr12[0][1] = 0x0

 4286 02:00:23.014276  cbt_mr12[1][0] = 0x0

 4287 02:00:23.014347  cbt_mr12[1][1] = 0x0

 4288 02:00:23.017877  dump params tx window

 4289 02:00:23.020727  tx_center_min[0][0][0] = 0

 4290 02:00:23.024202  tx_center_max[0][0][0] =  0

 4291 02:00:23.024275  tx_center_min[0][0][1] = 0

 4292 02:00:23.027475  tx_center_max[0][0][1] =  0

 4293 02:00:23.030489  tx_center_min[0][1][0] = 0

 4294 02:00:23.030620  tx_center_max[0][1][0] =  0

 4295 02:00:23.033899  tx_center_min[0][1][1] = 0

 4296 02:00:23.037757  tx_center_max[0][1][1] =  0

 4297 02:00:23.040703  tx_center_min[1][0][0] = 0

 4298 02:00:23.040803  tx_center_max[1][0][0] =  0

 4299 02:00:23.044276  tx_center_min[1][0][1] = 0

 4300 02:00:23.047758  tx_center_max[1][0][1] =  0

 4301 02:00:23.050650  tx_center_min[1][1][0] = 0

 4302 02:00:23.050738  tx_center_max[1][1][0] =  0

 4303 02:00:23.054160  tx_center_min[1][1][1] = 0

 4304 02:00:23.057402  tx_center_max[1][1][1] =  0

 4305 02:00:23.057503  dump params tx window

 4306 02:00:23.060895  tx_win_center[0][0][0] = 0

 4307 02:00:23.064276  tx_first_pass[0][0][0] =  0

 4308 02:00:23.067633  tx_last_pass[0][0][0] =	0

 4309 02:00:23.067721  tx_win_center[0][0][1] = 0

 4310 02:00:23.071133  tx_first_pass[0][0][1] =  0

 4311 02:00:23.074015  tx_last_pass[0][0][1] =	0

 4312 02:00:23.074106  tx_win_center[0][0][2] = 0

 4313 02:00:23.077573  tx_first_pass[0][0][2] =  0

 4314 02:00:23.081032  tx_last_pass[0][0][2] =	0

 4315 02:00:23.084529  tx_win_center[0][0][3] = 0

 4316 02:00:23.084605  tx_first_pass[0][0][3] =  0

 4317 02:00:23.087492  tx_last_pass[0][0][3] =	0

 4318 02:00:23.090995  tx_win_center[0][0][4] = 0

 4319 02:00:23.094080  tx_first_pass[0][0][4] =  0

 4320 02:00:23.094188  tx_last_pass[0][0][4] =	0

 4321 02:00:23.097700  tx_win_center[0][0][5] = 0

 4322 02:00:23.101227  tx_first_pass[0][0][5] =  0

 4323 02:00:23.101350  tx_last_pass[0][0][5] =	0

 4324 02:00:23.104182  tx_win_center[0][0][6] = 0

 4325 02:00:23.107550  tx_first_pass[0][0][6] =  0

 4326 02:00:23.111103  tx_last_pass[0][0][6] =	0

 4327 02:00:23.111224  tx_win_center[0][0][7] = 0

 4328 02:00:23.114053  tx_first_pass[0][0][7] =  0

 4329 02:00:23.117802  tx_last_pass[0][0][7] =	0

 4330 02:00:23.117888  tx_win_center[0][0][8] = 0

 4331 02:00:23.120917  tx_first_pass[0][0][8] =  0

 4332 02:00:23.124292  tx_last_pass[0][0][8] =	0

 4333 02:00:23.127959  tx_win_center[0][0][9] = 0

 4334 02:00:23.128065  tx_first_pass[0][0][9] =  0

 4335 02:00:23.130842  tx_last_pass[0][0][9] =	0

 4336 02:00:23.134747  tx_win_center[0][0][10] = 0

 4337 02:00:23.137400  tx_first_pass[0][0][10] =  0

 4338 02:00:23.137516  tx_last_pass[0][0][10] =	0

 4339 02:00:23.140805  tx_win_center[0][0][11] = 0

 4340 02:00:23.143910  tx_first_pass[0][0][11] =  0

 4341 02:00:23.147417  tx_last_pass[0][0][11] =	0

 4342 02:00:23.147493  tx_win_center[0][0][12] = 0

 4343 02:00:23.150596  tx_first_pass[0][0][12] =  0

 4344 02:00:23.154163  tx_last_pass[0][0][12] =	0

 4345 02:00:23.157402  tx_win_center[0][0][13] = 0

 4346 02:00:23.157505  tx_first_pass[0][0][13] =  0

 4347 02:00:23.160507  tx_last_pass[0][0][13] =	0

 4348 02:00:23.164142  tx_win_center[0][0][14] = 0

 4349 02:00:23.167539  tx_first_pass[0][0][14] =  0

 4350 02:00:23.167625  tx_last_pass[0][0][14] =	0

 4351 02:00:23.170954  tx_win_center[0][0][15] = 0

 4352 02:00:23.174125  tx_first_pass[0][0][15] =  0

 4353 02:00:23.177357  tx_last_pass[0][0][15] =	0

 4354 02:00:23.177459  tx_win_center[0][1][0] = 0

 4355 02:00:23.180693  tx_first_pass[0][1][0] =  0

 4356 02:00:23.184395  tx_last_pass[0][1][0] =	0

 4357 02:00:23.187277  tx_win_center[0][1][1] = 0

 4358 02:00:23.187351  tx_first_pass[0][1][1] =  0

 4359 02:00:23.190690  tx_last_pass[0][1][1] =	0

 4360 02:00:23.194184  tx_win_center[0][1][2] = 0

 4361 02:00:23.194261  tx_first_pass[0][1][2] =  0

 4362 02:00:23.197344  tx_last_pass[0][1][2] =	0

 4363 02:00:23.201059  tx_win_center[0][1][3] = 0

 4364 02:00:23.204183  tx_first_pass[0][1][3] =  0

 4365 02:00:23.204258  tx_last_pass[0][1][3] =	0

 4366 02:00:23.207212  tx_win_center[0][1][4] = 0

 4367 02:00:23.210639  tx_first_pass[0][1][4] =  0

 4368 02:00:23.214243  tx_last_pass[0][1][4] =	0

 4369 02:00:23.214312  tx_win_center[0][1][5] = 0

 4370 02:00:23.217020  tx_first_pass[0][1][5] =  0

 4371 02:00:23.220580  tx_last_pass[0][1][5] =	0

 4372 02:00:23.220668  tx_win_center[0][1][6] = 0

 4373 02:00:23.223741  tx_first_pass[0][1][6] =  0

 4374 02:00:23.226963  tx_last_pass[0][1][6] =	0

 4375 02:00:23.230220  tx_win_center[0][1][7] = 0

 4376 02:00:23.230294  tx_first_pass[0][1][7] =  0

 4377 02:00:23.233663  tx_last_pass[0][1][7] =	0

 4378 02:00:23.237332  tx_win_center[0][1][8] = 0

 4379 02:00:23.240170  tx_first_pass[0][1][8] =  0

 4380 02:00:23.240244  tx_last_pass[0][1][8] =	0

 4381 02:00:23.243569  tx_win_center[0][1][9] = 0

 4382 02:00:23.247158  tx_first_pass[0][1][9] =  0

 4383 02:00:23.247232  tx_last_pass[0][1][9] =	0

 4384 02:00:23.250741  tx_win_center[0][1][10] = 0

 4385 02:00:23.253883  tx_first_pass[0][1][10] =  0

 4386 02:00:23.257107  tx_last_pass[0][1][10] =	0

 4387 02:00:23.257215  tx_win_center[0][1][11] = 0

 4388 02:00:23.260441  tx_first_pass[0][1][11] =  0

 4389 02:00:23.264032  tx_last_pass[0][1][11] =	0

 4390 02:00:23.267175  tx_win_center[0][1][12] = 0

 4391 02:00:23.267258  tx_first_pass[0][1][12] =  0

 4392 02:00:23.270299  tx_last_pass[0][1][12] =	0

 4393 02:00:23.273867  tx_win_center[0][1][13] = 0

 4394 02:00:23.277111  tx_first_pass[0][1][13] =  0

 4395 02:00:23.277183  tx_last_pass[0][1][13] =	0

 4396 02:00:23.280183  tx_win_center[0][1][14] = 0

 4397 02:00:23.283684  tx_first_pass[0][1][14] =  0

 4398 02:00:23.286986  tx_last_pass[0][1][14] =	0

 4399 02:00:23.287056  tx_win_center[0][1][15] = 0

 4400 02:00:23.290479  tx_first_pass[0][1][15] =  0

 4401 02:00:23.293744  tx_last_pass[0][1][15] =	0

 4402 02:00:23.296945  tx_win_center[1][0][0] = 0

 4403 02:00:23.297039  tx_first_pass[1][0][0] =  0

 4404 02:00:23.300458  tx_last_pass[1][0][0] =	0

 4405 02:00:23.304060  tx_win_center[1][0][1] = 0

 4406 02:00:23.306868  tx_first_pass[1][0][1] =  0

 4407 02:00:23.306967  tx_last_pass[1][0][1] =	0

 4408 02:00:23.310482  tx_win_center[1][0][2] = 0

 4409 02:00:23.313852  tx_first_pass[1][0][2] =  0

 4410 02:00:23.313922  tx_last_pass[1][0][2] =	0

 4411 02:00:23.317530  tx_win_center[1][0][3] = 0

 4412 02:00:23.320869  tx_first_pass[1][0][3] =  0

 4413 02:00:23.323979  tx_last_pass[1][0][3] =	0

 4414 02:00:23.324057  tx_win_center[1][0][4] = 0

 4415 02:00:23.327102  tx_first_pass[1][0][4] =  0

 4416 02:00:23.330356  tx_last_pass[1][0][4] =	0

 4417 02:00:23.333670  tx_win_center[1][0][5] = 0

 4418 02:00:23.333757  tx_first_pass[1][0][5] =  0

 4419 02:00:23.337368  tx_last_pass[1][0][5] =	0

 4420 02:00:23.340253  tx_win_center[1][0][6] = 0

 4421 02:00:23.340323  tx_first_pass[1][0][6] =  0

 4422 02:00:23.344247  tx_last_pass[1][0][6] =	0

 4423 02:00:23.347042  tx_win_center[1][0][7] = 0

 4424 02:00:23.350575  tx_first_pass[1][0][7] =  0

 4425 02:00:23.350652  tx_last_pass[1][0][7] =	0

 4426 02:00:23.353929  tx_win_center[1][0][8] = 0

 4427 02:00:23.357586  tx_first_pass[1][0][8] =  0

 4428 02:00:23.357664  tx_last_pass[1][0][8] =	0

 4429 02:00:23.360193  tx_win_center[1][0][9] = 0

 4430 02:00:23.363540  tx_first_pass[1][0][9] =  0

 4431 02:00:23.366883  tx_last_pass[1][0][9] =	0

 4432 02:00:23.366961  tx_win_center[1][0][10] = 0

 4433 02:00:23.370192  tx_first_pass[1][0][10] =  0

 4434 02:00:23.374006  tx_last_pass[1][0][10] =	0

 4435 02:00:23.377284  tx_win_center[1][0][11] = 0

 4436 02:00:23.377365  tx_first_pass[1][0][11] =  0

 4437 02:00:23.380284  tx_last_pass[1][0][11] =	0

 4438 02:00:23.383644  tx_win_center[1][0][12] = 0

 4439 02:00:23.387023  tx_first_pass[1][0][12] =  0

 4440 02:00:23.387117  tx_last_pass[1][0][12] =	0

 4441 02:00:23.390906  tx_win_center[1][0][13] = 0

 4442 02:00:23.393549  tx_first_pass[1][0][13] =  0

 4443 02:00:23.396761  tx_last_pass[1][0][13] =	0

 4444 02:00:23.396850  tx_win_center[1][0][14] = 0

 4445 02:00:23.400035  tx_first_pass[1][0][14] =  0

 4446 02:00:23.403507  tx_last_pass[1][0][14] =	0

 4447 02:00:23.406959  tx_win_center[1][0][15] = 0

 4448 02:00:23.407049  tx_first_pass[1][0][15] =  0

 4449 02:00:23.410084  tx_last_pass[1][0][15] =	0

 4450 02:00:23.413446  tx_win_center[1][1][0] = 0

 4451 02:00:23.416858  tx_first_pass[1][1][0] =  0

 4452 02:00:23.416942  tx_last_pass[1][1][0] =	0

 4453 02:00:23.420384  tx_win_center[1][1][1] = 0

 4454 02:00:23.423372  tx_first_pass[1][1][1] =  0

 4455 02:00:23.426853  tx_last_pass[1][1][1] =	0

 4456 02:00:23.426922  tx_win_center[1][1][2] = 0

 4457 02:00:23.430316  tx_first_pass[1][1][2] =  0

 4458 02:00:23.433137  tx_last_pass[1][1][2] =	0

 4459 02:00:23.433204  tx_win_center[1][1][3] = 0

 4460 02:00:23.436840  tx_first_pass[1][1][3] =  0

 4461 02:00:23.440647  tx_last_pass[1][1][3] =	0

 4462 02:00:23.443812  tx_win_center[1][1][4] = 0

 4463 02:00:23.443913  tx_first_pass[1][1][4] =  0

 4464 02:00:23.446767  tx_last_pass[1][1][4] =	0

 4465 02:00:23.450332  tx_win_center[1][1][5] = 0

 4466 02:00:23.453231  tx_first_pass[1][1][5] =  0

 4467 02:00:23.453337  tx_last_pass[1][1][5] =	0

 4468 02:00:23.456645  tx_win_center[1][1][6] = 0

 4469 02:00:23.460327  tx_first_pass[1][1][6] =  0

 4470 02:00:23.460439  tx_last_pass[1][1][6] =	0

 4471 02:00:23.463343  tx_win_center[1][1][7] = 0

 4472 02:00:23.466677  tx_first_pass[1][1][7] =  0

 4473 02:00:23.470482  tx_last_pass[1][1][7] =	0

 4474 02:00:23.470600  tx_win_center[1][1][8] = 0

 4475 02:00:23.473556  tx_first_pass[1][1][8] =  0

 4476 02:00:23.477071  tx_last_pass[1][1][8] =	0

 4477 02:00:23.479970  tx_win_center[1][1][9] = 0

 4478 02:00:23.480079  tx_first_pass[1][1][9] =  0

 4479 02:00:23.483580  tx_last_pass[1][1][9] =	0

 4480 02:00:23.486946  tx_win_center[1][1][10] = 0

 4481 02:00:23.487062  tx_first_pass[1][1][10] =  0

 4482 02:00:23.490454  tx_last_pass[1][1][10] =	0

 4483 02:00:23.493467  tx_win_center[1][1][11] = 0

 4484 02:00:23.496619  tx_first_pass[1][1][11] =  0

 4485 02:00:23.496691  tx_last_pass[1][1][11] =	0

 4486 02:00:23.500234  tx_win_center[1][1][12] = 0

 4487 02:00:23.503695  tx_first_pass[1][1][12] =  0

 4488 02:00:23.507132  tx_last_pass[1][1][12] =	0

 4489 02:00:23.507230  tx_win_center[1][1][13] = 0

 4490 02:00:23.510141  tx_first_pass[1][1][13] =  0

 4491 02:00:23.513720  tx_last_pass[1][1][13] =	0

 4492 02:00:23.516761  tx_win_center[1][1][14] = 0

 4493 02:00:23.516870  tx_first_pass[1][1][14] =  0

 4494 02:00:23.520273  tx_last_pass[1][1][14] =	0

 4495 02:00:23.523280  tx_win_center[1][1][15] = 0

 4496 02:00:23.527412  tx_first_pass[1][1][15] =  0

 4497 02:00:23.527487  tx_last_pass[1][1][15] =	0

 4498 02:00:23.530101  dump params rx window

 4499 02:00:23.533507  rx_firspass[0][0][0] = 0

 4500 02:00:23.533576  rx_lastpass[0][0][0] =  0

 4501 02:00:23.536925  rx_firspass[0][0][1] = 0

 4502 02:00:23.539892  rx_lastpass[0][0][1] =  0

 4503 02:00:23.539974  rx_firspass[0][0][2] = 0

 4504 02:00:23.543338  rx_lastpass[0][0][2] =  0

 4505 02:00:23.546894  rx_firspass[0][0][3] = 0

 4506 02:00:23.546968  rx_lastpass[0][0][3] =  0

 4507 02:00:23.549879  rx_firspass[0][0][4] = 0

 4508 02:00:23.553197  rx_lastpass[0][0][4] =  0

 4509 02:00:23.556629  rx_firspass[0][0][5] = 0

 4510 02:00:23.556698  rx_lastpass[0][0][5] =  0

 4511 02:00:23.560077  rx_firspass[0][0][6] = 0

 4512 02:00:23.563605  rx_lastpass[0][0][6] =  0

 4513 02:00:23.563672  rx_firspass[0][0][7] = 0

 4514 02:00:23.566584  rx_lastpass[0][0][7] =  0

 4515 02:00:23.570169  rx_firspass[0][0][8] = 0

 4516 02:00:23.570246  rx_lastpass[0][0][8] =  0

 4517 02:00:23.573959  rx_firspass[0][0][9] = 0

 4518 02:00:23.576771  rx_lastpass[0][0][9] =  0

 4519 02:00:23.576838  rx_firspass[0][0][10] = 0

 4520 02:00:23.580316  rx_lastpass[0][0][10] =  0

 4521 02:00:23.583754  rx_firspass[0][0][11] = 0

 4522 02:00:23.586571  rx_lastpass[0][0][11] =  0

 4523 02:00:23.586640  rx_firspass[0][0][12] = 0

 4524 02:00:23.590275  rx_lastpass[0][0][12] =  0

 4525 02:00:23.593739  rx_firspass[0][0][13] = 0

 4526 02:00:23.593807  rx_lastpass[0][0][13] =  0

 4527 02:00:23.596632  rx_firspass[0][0][14] = 0

 4528 02:00:23.600266  rx_lastpass[0][0][14] =  0

 4529 02:00:23.603382  rx_firspass[0][0][15] = 0

 4530 02:00:23.603452  rx_lastpass[0][0][15] =  0

 4531 02:00:23.606798  rx_firspass[0][1][0] = 0

 4532 02:00:23.610200  rx_lastpass[0][1][0] =  0

 4533 02:00:23.610269  rx_firspass[0][1][1] = 0

 4534 02:00:23.613974  rx_lastpass[0][1][1] =  0

 4535 02:00:23.617066  rx_firspass[0][1][2] = 0

 4536 02:00:23.617166  rx_lastpass[0][1][2] =  0

 4537 02:00:23.619979  rx_firspass[0][1][3] = 0

 4538 02:00:23.623651  rx_lastpass[0][1][3] =  0

 4539 02:00:23.623720  rx_firspass[0][1][4] = 0

 4540 02:00:23.626702  rx_lastpass[0][1][4] =  0

 4541 02:00:23.630134  rx_firspass[0][1][5] = 0

 4542 02:00:23.630204  rx_lastpass[0][1][5] =  0

 4543 02:00:23.633192  rx_firspass[0][1][6] = 0

 4544 02:00:23.636527  rx_lastpass[0][1][6] =  0

 4545 02:00:23.639994  rx_firspass[0][1][7] = 0

 4546 02:00:23.640074  rx_lastpass[0][1][7] =  0

 4547 02:00:23.643440  rx_firspass[0][1][8] = 0

 4548 02:00:23.646976  rx_lastpass[0][1][8] =  0

 4549 02:00:23.647056  rx_firspass[0][1][9] = 0

 4550 02:00:23.650005  rx_lastpass[0][1][9] =  0

 4551 02:00:23.653514  rx_firspass[0][1][10] = 0

 4552 02:00:23.653594  rx_lastpass[0][1][10] =  0

 4553 02:00:23.656497  rx_firspass[0][1][11] = 0

 4554 02:00:23.660485  rx_lastpass[0][1][11] =  0

 4555 02:00:23.663443  rx_firspass[0][1][12] = 0

 4556 02:00:23.663523  rx_lastpass[0][1][12] =  0

 4557 02:00:23.666959  rx_firspass[0][1][13] = 0

 4558 02:00:23.669845  rx_lastpass[0][1][13] =  0

 4559 02:00:23.669925  rx_firspass[0][1][14] = 0

 4560 02:00:23.673350  rx_lastpass[0][1][14] =  0

 4561 02:00:23.676777  rx_firspass[0][1][15] = 0

 4562 02:00:23.679861  rx_lastpass[0][1][15] =  0

 4563 02:00:23.679941  rx_firspass[1][0][0] = 0

 4564 02:00:23.683432  rx_lastpass[1][0][0] =  0

 4565 02:00:23.686815  rx_firspass[1][0][1] = 0

 4566 02:00:23.686895  rx_lastpass[1][0][1] =  0

 4567 02:00:23.689865  rx_firspass[1][0][2] = 0

 4568 02:00:23.693609  rx_lastpass[1][0][2] =  0

 4569 02:00:23.693688  rx_firspass[1][0][3] = 0

 4570 02:00:23.696628  rx_lastpass[1][0][3] =  0

 4571 02:00:23.700329  rx_firspass[1][0][4] = 0

 4572 02:00:23.700410  rx_lastpass[1][0][4] =  0

 4573 02:00:23.703217  rx_firspass[1][0][5] = 0

 4574 02:00:23.706822  rx_lastpass[1][0][5] =  0

 4575 02:00:23.706902  rx_firspass[1][0][6] = 0

 4576 02:00:23.710038  rx_lastpass[1][0][6] =  0

 4577 02:00:23.713434  rx_firspass[1][0][7] = 0

 4578 02:00:23.716780  rx_lastpass[1][0][7] =  0

 4579 02:00:23.716860  rx_firspass[1][0][8] = 0

 4580 02:00:23.720138  rx_lastpass[1][0][8] =  0

 4581 02:00:23.723282  rx_firspass[1][0][9] = 0

 4582 02:00:23.723362  rx_lastpass[1][0][9] =  0

 4583 02:00:23.726664  rx_firspass[1][0][10] = 0

 4584 02:00:23.730316  rx_lastpass[1][0][10] =  0

 4585 02:00:23.730397  rx_firspass[1][0][11] = 0

 4586 02:00:23.733431  rx_lastpass[1][0][11] =  0

 4587 02:00:23.736784  rx_firspass[1][0][12] = 0

 4588 02:00:23.736864  rx_lastpass[1][0][12] =  0

 4589 02:00:23.739888  rx_firspass[1][0][13] = 0

 4590 02:00:23.743586  rx_lastpass[1][0][13] =  0

 4591 02:00:23.746576  rx_firspass[1][0][14] = 0

 4592 02:00:23.746657  rx_lastpass[1][0][14] =  0

 4593 02:00:23.749950  rx_firspass[1][0][15] = 0

 4594 02:00:23.753150  rx_lastpass[1][0][15] =  0

 4595 02:00:23.753276  rx_firspass[1][1][0] = 0

 4596 02:00:23.756772  rx_lastpass[1][1][0] =  0

 4597 02:00:23.760128  rx_firspass[1][1][1] = 0

 4598 02:00:23.760229  rx_lastpass[1][1][1] =  0

 4599 02:00:23.763336  rx_firspass[1][1][2] = 0

 4600 02:00:23.767050  rx_lastpass[1][1][2] =  0

 4601 02:00:23.770312  rx_firspass[1][1][3] = 0

 4602 02:00:23.770408  rx_lastpass[1][1][3] =  0

 4603 02:00:23.773180  rx_firspass[1][1][4] = 0

 4604 02:00:23.776698  rx_lastpass[1][1][4] =  0

 4605 02:00:23.776768  rx_firspass[1][1][5] = 0

 4606 02:00:23.780174  rx_lastpass[1][1][5] =  0

 4607 02:00:23.783712  rx_firspass[1][1][6] = 0

 4608 02:00:23.783825  rx_lastpass[1][1][6] =  0

 4609 02:00:23.786700  rx_firspass[1][1][7] = 0

 4610 02:00:23.790893  rx_lastpass[1][1][7] =  0

 4611 02:00:23.790996  rx_firspass[1][1][8] = 0

 4612 02:00:23.793669  rx_lastpass[1][1][8] =  0

 4613 02:00:23.797200  rx_firspass[1][1][9] = 0

 4614 02:00:23.797325  rx_lastpass[1][1][9] =  0

 4615 02:00:23.800130  rx_firspass[1][1][10] = 0

 4616 02:00:23.803641  rx_lastpass[1][1][10] =  0

 4617 02:00:23.806963  rx_firspass[1][1][11] = 0

 4618 02:00:23.807059  rx_lastpass[1][1][11] =  0

 4619 02:00:23.810027  rx_firspass[1][1][12] = 0

 4620 02:00:23.813942  rx_lastpass[1][1][12] =  0

 4621 02:00:23.814014  rx_firspass[1][1][13] = 0

 4622 02:00:23.816889  rx_lastpass[1][1][13] =  0

 4623 02:00:23.820223  rx_firspass[1][1][14] = 0

 4624 02:00:23.820324  rx_lastpass[1][1][14] =  0

 4625 02:00:23.823510  rx_firspass[1][1][15] = 0

 4626 02:00:23.826993  rx_lastpass[1][1][15] =  0

 4627 02:00:23.829967  dump params clk_delay

 4628 02:00:23.830047  clk_delay[0] = 0

 4629 02:00:23.830110  clk_delay[1] = 0

 4630 02:00:23.833305  dump params dqs_delay

 4631 02:00:23.836871  dqs_delay[0][0] = 0

 4632 02:00:23.836991  dqs_delay[0][1] = 0

 4633 02:00:23.840169  dqs_delay[1][0] = 0

 4634 02:00:23.840249  dqs_delay[1][1] = 0

 4635 02:00:23.843324  dump params delay_cell_unit = 762

 4636 02:00:23.846776  dump source = 0x0

 4637 02:00:23.846855  dump params frequency:800

 4638 02:00:23.849980  dump params rank number:2

 4639 02:00:23.850060  

 4640 02:00:23.853253   dump params write leveling

 4641 02:00:23.856730  write leveling[0][0][0] = 0x0

 4642 02:00:23.856846  write leveling[0][0][1] = 0x0

 4643 02:00:23.860295  write leveling[0][1][0] = 0x0

 4644 02:00:23.863051  write leveling[0][1][1] = 0x0

 4645 02:00:23.866671  write leveling[1][0][0] = 0x0

 4646 02:00:23.869804  write leveling[1][0][1] = 0x0

 4647 02:00:23.873243  write leveling[1][1][0] = 0x0

 4648 02:00:23.873362  write leveling[1][1][1] = 0x0

 4649 02:00:23.876856  dump params cbt_cs

 4650 02:00:23.876935  cbt_cs[0][0] = 0x0

 4651 02:00:23.879904  cbt_cs[0][1] = 0x0

 4652 02:00:23.879984  cbt_cs[1][0] = 0x0

 4653 02:00:23.883448  cbt_cs[1][1] = 0x0

 4654 02:00:23.883528  dump params cbt_mr12

 4655 02:00:23.886305  cbt_mr12[0][0] = 0x0

 4656 02:00:23.889783  cbt_mr12[0][1] = 0x0

 4657 02:00:23.889862  cbt_mr12[1][0] = 0x0

 4658 02:00:23.893188  cbt_mr12[1][1] = 0x0

 4659 02:00:23.893328  dump params tx window

 4660 02:00:23.896677  tx_center_min[0][0][0] = 0

 4661 02:00:23.899619  tx_center_max[0][0][0] =  0

 4662 02:00:23.903286  tx_center_min[0][0][1] = 0

 4663 02:00:23.903366  tx_center_max[0][0][1] =  0

 4664 02:00:23.906707  tx_center_min[0][1][0] = 0

 4665 02:00:23.910196  tx_center_max[0][1][0] =  0

 4666 02:00:23.910276  tx_center_min[0][1][1] = 0

 4667 02:00:23.913700  tx_center_max[0][1][1] =  0

 4668 02:00:23.916361  tx_center_min[1][0][0] = 0

 4669 02:00:23.919862  tx_center_max[1][0][0] =  0

 4670 02:00:23.919943  tx_center_min[1][0][1] = 0

 4671 02:00:23.923182  tx_center_max[1][0][1] =  0

 4672 02:00:23.926412  tx_center_min[1][1][0] = 0

 4673 02:00:23.929821  tx_center_max[1][1][0] =  0

 4674 02:00:23.929894  tx_center_min[1][1][1] = 0

 4675 02:00:23.933144  tx_center_max[1][1][1] =  0

 4676 02:00:23.936661  dump params tx window

 4677 02:00:23.936739  tx_win_center[0][0][0] = 0

 4678 02:00:23.939661  tx_first_pass[0][0][0] =  0

 4679 02:00:23.943273  tx_last_pass[0][0][0] =	0

 4680 02:00:23.946845  tx_win_center[0][0][1] = 0

 4681 02:00:23.946925  tx_first_pass[0][0][1] =  0

 4682 02:00:23.950293  tx_last_pass[0][0][1] =	0

 4683 02:00:23.953245  tx_win_center[0][0][2] = 0

 4684 02:00:23.956747  tx_first_pass[0][0][2] =  0

 4685 02:00:23.956827  tx_last_pass[0][0][2] =	0

 4686 02:00:23.959740  tx_win_center[0][0][3] = 0

 4687 02:00:23.963617  tx_first_pass[0][0][3] =  0

 4688 02:00:23.963696  tx_last_pass[0][0][3] =	0

 4689 02:00:23.966344  tx_win_center[0][0][4] = 0

 4690 02:00:23.969951  tx_first_pass[0][0][4] =  0

 4691 02:00:23.973032  tx_last_pass[0][0][4] =	0

 4692 02:00:23.973113  tx_win_center[0][0][5] = 0

 4693 02:00:23.976742  tx_first_pass[0][0][5] =  0

 4694 02:00:23.979743  tx_last_pass[0][0][5] =	0

 4695 02:00:23.979823  tx_win_center[0][0][6] = 0

 4696 02:00:23.982947  tx_first_pass[0][0][6] =  0

 4697 02:00:23.986688  tx_last_pass[0][0][6] =	0

 4698 02:00:23.990205  tx_win_center[0][0][7] = 0

 4699 02:00:23.990285  tx_first_pass[0][0][7] =  0

 4700 02:00:23.993130  tx_last_pass[0][0][7] =	0

 4701 02:00:23.996656  tx_win_center[0][0][8] = 0

 4702 02:00:23.999656  tx_first_pass[0][0][8] =  0

 4703 02:00:23.999736  tx_last_pass[0][0][8] =	0

 4704 02:00:24.003184  tx_win_center[0][0][9] = 0

 4705 02:00:24.006799  tx_first_pass[0][0][9] =  0

 4706 02:00:24.006879  tx_last_pass[0][0][9] =	0

 4707 02:00:24.010219  tx_win_center[0][0][10] = 0

 4708 02:00:24.013265  tx_first_pass[0][0][10] =  0

 4709 02:00:24.016655  tx_last_pass[0][0][10] =	0

 4710 02:00:24.016735  tx_win_center[0][0][11] = 0

 4711 02:00:24.020029  tx_first_pass[0][0][11] =  0

 4712 02:00:24.023415  tx_last_pass[0][0][11] =	0

 4713 02:00:24.026662  tx_win_center[0][0][12] = 0

 4714 02:00:24.026743  tx_first_pass[0][0][12] =  0

 4715 02:00:24.029994  tx_last_pass[0][0][12] =	0

 4716 02:00:24.033631  tx_win_center[0][0][13] = 0

 4717 02:00:24.036807  tx_first_pass[0][0][13] =  0

 4718 02:00:24.036887  tx_last_pass[0][0][13] =	0

 4719 02:00:24.040235  tx_win_center[0][0][14] = 0

 4720 02:00:24.043555  tx_first_pass[0][0][14] =  0

 4721 02:00:24.046802  tx_last_pass[0][0][14] =	0

 4722 02:00:24.046882  tx_win_center[0][0][15] = 0

 4723 02:00:24.050441  tx_first_pass[0][0][15] =  0

 4724 02:00:24.053611  tx_last_pass[0][0][15] =	0

 4725 02:00:24.056475  tx_win_center[0][1][0] = 0

 4726 02:00:24.056555  tx_first_pass[0][1][0] =  0

 4727 02:00:24.060029  tx_last_pass[0][1][0] =	0

 4728 02:00:24.063165  tx_win_center[0][1][1] = 0

 4729 02:00:24.066355  tx_first_pass[0][1][1] =  0

 4730 02:00:24.066452  tx_last_pass[0][1][1] =	0

 4731 02:00:24.070098  tx_win_center[0][1][2] = 0

 4732 02:00:24.073192  tx_first_pass[0][1][2] =  0

 4733 02:00:24.073325  tx_last_pass[0][1][2] =	0

 4734 02:00:24.076636  tx_win_center[0][1][3] = 0

 4735 02:00:24.080104  tx_first_pass[0][1][3] =  0

 4736 02:00:24.083173  tx_last_pass[0][1][3] =	0

 4737 02:00:24.083253  tx_win_center[0][1][4] = 0

 4738 02:00:24.086745  tx_first_pass[0][1][4] =  0

 4739 02:00:24.090128  tx_last_pass[0][1][4] =	0

 4740 02:00:24.090209  tx_win_center[0][1][5] = 0

 4741 02:00:24.093511  tx_first_pass[0][1][5] =  0

 4742 02:00:24.096492  tx_last_pass[0][1][5] =	0

 4743 02:00:24.099903  tx_win_center[0][1][6] = 0

 4744 02:00:24.099983  tx_first_pass[0][1][6] =  0

 4745 02:00:24.103769  tx_last_pass[0][1][6] =	0

 4746 02:00:24.106864  tx_win_center[0][1][7] = 0

 4747 02:00:24.110028  tx_first_pass[0][1][7] =  0

 4748 02:00:24.110109  tx_last_pass[0][1][7] =	0

 4749 02:00:24.113508  tx_win_center[0][1][8] = 0

 4750 02:00:24.116618  tx_first_pass[0][1][8] =  0

 4751 02:00:24.116699  tx_last_pass[0][1][8] =	0

 4752 02:00:24.120009  tx_win_center[0][1][9] = 0

 4753 02:00:24.123348  tx_first_pass[0][1][9] =  0

 4754 02:00:24.126516  tx_last_pass[0][1][9] =	0

 4755 02:00:24.126631  tx_win_center[0][1][10] = 0

 4756 02:00:24.130104  tx_first_pass[0][1][10] =  0

 4757 02:00:24.133466  tx_last_pass[0][1][10] =	0

 4758 02:00:24.136811  tx_win_center[0][1][11] = 0

 4759 02:00:24.136892  tx_first_pass[0][1][11] =  0

 4760 02:00:24.140178  tx_last_pass[0][1][11] =	0

 4761 02:00:24.143667  tx_win_center[0][1][12] = 0

 4762 02:00:24.146826  tx_first_pass[0][1][12] =  0

 4763 02:00:24.146907  tx_last_pass[0][1][12] =	0

 4764 02:00:24.150582  tx_win_center[0][1][13] = 0

 4765 02:00:24.153626  tx_first_pass[0][1][13] =  0

 4766 02:00:24.157023  tx_last_pass[0][1][13] =	0

 4767 02:00:24.157105  tx_win_center[0][1][14] = 0

 4768 02:00:24.160390  tx_first_pass[0][1][14] =  0

 4769 02:00:24.163557  tx_last_pass[0][1][14] =	0

 4770 02:00:24.166910  tx_win_center[0][1][15] = 0

 4771 02:00:24.166991  tx_first_pass[0][1][15] =  0

 4772 02:00:24.170080  tx_last_pass[0][1][15] =	0

 4773 02:00:24.173848  tx_win_center[1][0][0] = 0

 4774 02:00:24.176882  tx_first_pass[1][0][0] =  0

 4775 02:00:24.176963  tx_last_pass[1][0][0] =	0

 4776 02:00:24.180211  tx_win_center[1][0][1] = 0

 4777 02:00:24.183700  tx_first_pass[1][0][1] =  0

 4778 02:00:24.183784  tx_last_pass[1][0][1] =	0

 4779 02:00:24.186727  tx_win_center[1][0][2] = 0

 4780 02:00:24.190165  tx_first_pass[1][0][2] =  0

 4781 02:00:24.193379  tx_last_pass[1][0][2] =	0

 4782 02:00:24.193460  tx_win_center[1][0][3] = 0

 4783 02:00:24.196725  tx_first_pass[1][0][3] =  0

 4784 02:00:24.199983  tx_last_pass[1][0][3] =	0

 4785 02:00:24.200064  tx_win_center[1][0][4] = 0

 4786 02:00:24.203418  tx_first_pass[1][0][4] =  0

 4787 02:00:24.207267  tx_last_pass[1][0][4] =	0

 4788 02:00:24.210002  tx_win_center[1][0][5] = 0

 4789 02:00:24.210088  tx_first_pass[1][0][5] =  0

 4790 02:00:24.213722  tx_last_pass[1][0][5] =	0

 4791 02:00:24.216635  tx_win_center[1][0][6] = 0

 4792 02:00:24.220011  tx_first_pass[1][0][6] =  0

 4793 02:00:24.220092  tx_last_pass[1][0][6] =	0

 4794 02:00:24.223677  tx_win_center[1][0][7] = 0

 4795 02:00:24.226519  tx_first_pass[1][0][7] =  0

 4796 02:00:24.226600  tx_last_pass[1][0][7] =	0

 4797 02:00:24.230448  tx_win_center[1][0][8] = 0

 4798 02:00:24.233464  tx_first_pass[1][0][8] =  0

 4799 02:00:24.236864  tx_last_pass[1][0][8] =	0

 4800 02:00:24.236944  tx_win_center[1][0][9] = 0

 4801 02:00:24.240268  tx_first_pass[1][0][9] =  0

 4802 02:00:24.243225  tx_last_pass[1][0][9] =	0

 4803 02:00:24.246713  tx_win_center[1][0][10] = 0

 4804 02:00:24.246794  tx_first_pass[1][0][10] =  0

 4805 02:00:24.250104  tx_last_pass[1][0][10] =	0

 4806 02:00:24.253527  tx_win_center[1][0][11] = 0

 4807 02:00:24.256952  tx_first_pass[1][0][11] =  0

 4808 02:00:24.257033  tx_last_pass[1][0][11] =	0

 4809 02:00:24.260018  tx_win_center[1][0][12] = 0

 4810 02:00:24.263494  tx_first_pass[1][0][12] =  0

 4811 02:00:24.266655  tx_last_pass[1][0][12] =	0

 4812 02:00:24.266735  tx_win_center[1][0][13] = 0

 4813 02:00:24.270260  tx_first_pass[1][0][13] =  0

 4814 02:00:24.273443  tx_last_pass[1][0][13] =	0

 4815 02:00:24.276558  tx_win_center[1][0][14] = 0

 4816 02:00:24.276638  tx_first_pass[1][0][14] =  0

 4817 02:00:24.279887  tx_last_pass[1][0][14] =	0

 4818 02:00:24.283424  tx_win_center[1][0][15] = 0

 4819 02:00:24.286747  tx_first_pass[1][0][15] =  0

 4820 02:00:24.286828  tx_last_pass[1][0][15] =	0

 4821 02:00:24.290205  tx_win_center[1][1][0] = 0

 4822 02:00:24.293359  tx_first_pass[1][1][0] =  0

 4823 02:00:24.293440  tx_last_pass[1][1][0] =	0

 4824 02:00:24.296953  tx_win_center[1][1][1] = 0

 4825 02:00:24.299935  tx_first_pass[1][1][1] =  0

 4826 02:00:24.303076  tx_last_pass[1][1][1] =	0

 4827 02:00:24.303156  tx_win_center[1][1][2] = 0

 4828 02:00:24.306279  tx_first_pass[1][1][2] =  0

 4829 02:00:24.309724  tx_last_pass[1][1][2] =	0

 4830 02:00:24.313064  tx_win_center[1][1][3] = 0

 4831 02:00:24.313144  tx_first_pass[1][1][3] =  0

 4832 02:00:24.316775  tx_last_pass[1][1][3] =	0

 4833 02:00:24.319701  tx_win_center[1][1][4] = 0

 4834 02:00:24.319782  tx_first_pass[1][1][4] =  0

 4835 02:00:24.323111  tx_last_pass[1][1][4] =	0

 4836 02:00:24.326586  tx_win_center[1][1][5] = 0

 4837 02:00:24.329927  tx_first_pass[1][1][5] =  0

 4838 02:00:24.330007  tx_last_pass[1][1][5] =	0

 4839 02:00:24.333280  tx_win_center[1][1][6] = 0

 4840 02:00:24.336312  tx_first_pass[1][1][6] =  0

 4841 02:00:24.339702  tx_last_pass[1][1][6] =	0

 4842 02:00:24.339782  tx_win_center[1][1][7] = 0

 4843 02:00:24.343207  tx_first_pass[1][1][7] =  0

 4844 02:00:24.346581  tx_last_pass[1][1][7] =	0

 4845 02:00:24.346661  tx_win_center[1][1][8] = 0

 4846 02:00:24.349715  tx_first_pass[1][1][8] =  0

 4847 02:00:24.353270  tx_last_pass[1][1][8] =	0

 4848 02:00:24.356165  tx_win_center[1][1][9] = 0

 4849 02:00:24.356244  tx_first_pass[1][1][9] =  0

 4850 02:00:24.359706  tx_last_pass[1][1][9] =	0

 4851 02:00:24.363213  tx_win_center[1][1][10] = 0

 4852 02:00:24.366662  tx_first_pass[1][1][10] =  0

 4853 02:00:24.366743  tx_last_pass[1][1][10] =	0

 4854 02:00:24.370198  tx_win_center[1][1][11] = 0

 4855 02:00:24.373251  tx_first_pass[1][1][11] =  0

 4856 02:00:24.376707  tx_last_pass[1][1][11] =	0

 4857 02:00:24.376787  tx_win_center[1][1][12] = 0

 4858 02:00:24.379882  tx_first_pass[1][1][12] =  0

 4859 02:00:24.383236  tx_last_pass[1][1][12] =	0

 4860 02:00:24.386587  tx_win_center[1][1][13] = 0

 4861 02:00:24.386668  tx_first_pass[1][1][13] =  0

 4862 02:00:24.390281  tx_last_pass[1][1][13] =	0

 4863 02:00:24.393001  tx_win_center[1][1][14] = 0

 4864 02:00:24.396510  tx_first_pass[1][1][14] =  0

 4865 02:00:24.396590  tx_last_pass[1][1][14] =	0

 4866 02:00:24.399963  tx_win_center[1][1][15] = 0

 4867 02:00:24.403480  tx_first_pass[1][1][15] =  0

 4868 02:00:24.406476  tx_last_pass[1][1][15] =	0

 4869 02:00:24.406557  dump params rx window

 4870 02:00:24.410201  rx_firspass[0][0][0] = 0

 4871 02:00:24.413280  rx_lastpass[0][0][0] =  0

 4872 02:00:24.413445  rx_firspass[0][0][1] = 0

 4873 02:00:24.416388  rx_lastpass[0][0][1] =  0

 4874 02:00:24.419686  rx_firspass[0][0][2] = 0

 4875 02:00:24.419766  rx_lastpass[0][0][2] =  0

 4876 02:00:24.423412  rx_firspass[0][0][3] = 0

 4877 02:00:24.426331  rx_lastpass[0][0][3] =  0

 4878 02:00:24.426412  rx_firspass[0][0][4] = 0

 4879 02:00:24.429497  rx_lastpass[0][0][4] =  0

 4880 02:00:24.432885  rx_firspass[0][0][5] = 0

 4881 02:00:24.432965  rx_lastpass[0][0][5] =  0

 4882 02:00:24.436227  rx_firspass[0][0][6] = 0

 4883 02:00:24.439677  rx_lastpass[0][0][6] =  0

 4884 02:00:24.439757  rx_firspass[0][0][7] = 0

 4885 02:00:24.443252  rx_lastpass[0][0][7] =  0

 4886 02:00:24.446563  rx_firspass[0][0][8] = 0

 4887 02:00:24.450283  rx_lastpass[0][0][8] =  0

 4888 02:00:24.450363  rx_firspass[0][0][9] = 0

 4889 02:00:24.452860  rx_lastpass[0][0][9] =  0

 4890 02:00:24.456390  rx_firspass[0][0][10] = 0

 4891 02:00:24.456485  rx_lastpass[0][0][10] =  0

 4892 02:00:24.459822  rx_firspass[0][0][11] = 0

 4893 02:00:24.462833  rx_lastpass[0][0][11] =  0

 4894 02:00:24.462913  rx_firspass[0][0][12] = 0

 4895 02:00:24.466255  rx_lastpass[0][0][12] =  0

 4896 02:00:24.469812  rx_firspass[0][0][13] = 0

 4897 02:00:24.472848  rx_lastpass[0][0][13] =  0

 4898 02:00:24.472928  rx_firspass[0][0][14] = 0

 4899 02:00:24.476193  rx_lastpass[0][0][14] =  0

 4900 02:00:24.479773  rx_firspass[0][0][15] = 0

 4901 02:00:24.479852  rx_lastpass[0][0][15] =  0

 4902 02:00:24.482990  rx_firspass[0][1][0] = 0

 4903 02:00:24.486235  rx_lastpass[0][1][0] =  0

 4904 02:00:24.486315  rx_firspass[0][1][1] = 0

 4905 02:00:24.489693  rx_lastpass[0][1][1] =  0

 4906 02:00:24.493455  rx_firspass[0][1][2] = 0

 4907 02:00:24.493535  rx_lastpass[0][1][2] =  0

 4908 02:00:24.496361  rx_firspass[0][1][3] = 0

 4909 02:00:24.500226  rx_lastpass[0][1][3] =  0

 4910 02:00:24.500305  rx_firspass[0][1][4] = 0

 4911 02:00:24.503384  rx_lastpass[0][1][4] =  0

 4912 02:00:24.506371  rx_firspass[0][1][5] = 0

 4913 02:00:24.509814  rx_lastpass[0][1][5] =  0

 4914 02:00:24.509894  rx_firspass[0][1][6] = 0

 4915 02:00:24.513495  rx_lastpass[0][1][6] =  0

 4916 02:00:24.516470  rx_firspass[0][1][7] = 0

 4917 02:00:24.516549  rx_lastpass[0][1][7] =  0

 4918 02:00:24.520251  rx_firspass[0][1][8] = 0

 4919 02:00:24.523632  rx_lastpass[0][1][8] =  0

 4920 02:00:24.523713  rx_firspass[0][1][9] = 0

 4921 02:00:24.526580  rx_lastpass[0][1][9] =  0

 4922 02:00:24.529980  rx_firspass[0][1][10] = 0

 4923 02:00:24.530059  rx_lastpass[0][1][10] =  0

 4924 02:00:24.533639  rx_firspass[0][1][11] = 0

 4925 02:00:24.536654  rx_lastpass[0][1][11] =  0

 4926 02:00:24.540309  rx_firspass[0][1][12] = 0

 4927 02:00:24.540389  rx_lastpass[0][1][12] =  0

 4928 02:00:24.543128  rx_firspass[0][1][13] = 0

 4929 02:00:24.546844  rx_lastpass[0][1][13] =  0

 4930 02:00:24.546924  rx_firspass[0][1][14] = 0

 4931 02:00:24.550011  rx_lastpass[0][1][14] =  0

 4932 02:00:24.553222  rx_firspass[0][1][15] = 0

 4933 02:00:24.556664  rx_lastpass[0][1][15] =  0

 4934 02:00:24.556744  rx_firspass[1][0][0] = 0

 4935 02:00:24.559692  rx_lastpass[1][0][0] =  0

 4936 02:00:24.563497  rx_firspass[1][0][1] = 0

 4937 02:00:24.563576  rx_lastpass[1][0][1] =  0

 4938 02:00:24.566317  rx_firspass[1][0][2] = 0

 4939 02:00:24.569907  rx_lastpass[1][0][2] =  0

 4940 02:00:24.569986  rx_firspass[1][0][3] = 0

 4941 02:00:24.573446  rx_lastpass[1][0][3] =  0

 4942 02:00:24.576377  rx_firspass[1][0][4] = 0

 4943 02:00:24.576456  rx_lastpass[1][0][4] =  0

 4944 02:00:24.579803  rx_firspass[1][0][5] = 0

 4945 02:00:24.583661  rx_lastpass[1][0][5] =  0

 4946 02:00:24.583740  rx_firspass[1][0][6] = 0

 4947 02:00:24.586489  rx_lastpass[1][0][6] =  0

 4948 02:00:24.589745  rx_firspass[1][0][7] = 0

 4949 02:00:24.593022  rx_lastpass[1][0][7] =  0

 4950 02:00:24.593102  rx_firspass[1][0][8] = 0

 4951 02:00:24.596263  rx_lastpass[1][0][8] =  0

 4952 02:00:24.599802  rx_firspass[1][0][9] = 0

 4953 02:00:24.599882  rx_lastpass[1][0][9] =  0

 4954 02:00:24.602977  rx_firspass[1][0][10] = 0

 4955 02:00:24.606240  rx_lastpass[1][0][10] =  0

 4956 02:00:24.606320  rx_firspass[1][0][11] = 0

 4957 02:00:24.609869  rx_lastpass[1][0][11] =  0

 4958 02:00:24.613032  rx_firspass[1][0][12] = 0

 4959 02:00:24.616349  rx_lastpass[1][0][12] =  0

 4960 02:00:24.616429  rx_firspass[1][0][13] = 0

 4961 02:00:24.619757  rx_lastpass[1][0][13] =  0

 4962 02:00:24.622874  rx_firspass[1][0][14] = 0

 4963 02:00:24.626158  rx_lastpass[1][0][14] =  0

 4964 02:00:24.626238  rx_firspass[1][0][15] = 0

 4965 02:00:24.629450  rx_lastpass[1][0][15] =  0

 4966 02:00:24.632857  rx_firspass[1][1][0] = 0

 4967 02:00:24.632937  rx_lastpass[1][1][0] =  0

 4968 02:00:24.636342  rx_firspass[1][1][1] = 0

 4969 02:00:24.639352  rx_lastpass[1][1][1] =  0

 4970 02:00:24.639431  rx_firspass[1][1][2] = 0

 4971 02:00:24.642800  rx_lastpass[1][1][2] =  0

 4972 02:00:24.646119  rx_firspass[1][1][3] = 0

 4973 02:00:24.646202  rx_lastpass[1][1][3] =  0

 4974 02:00:24.649444  rx_firspass[1][1][4] = 0

 4975 02:00:24.652442  rx_lastpass[1][1][4] =  0

 4976 02:00:24.656150  rx_firspass[1][1][5] = 0

 4977 02:00:24.656230  rx_lastpass[1][1][5] =  0

 4978 02:00:24.659238  rx_firspass[1][1][6] = 0

 4979 02:00:24.662595  rx_lastpass[1][1][6] =  0

 4980 02:00:24.662692  rx_firspass[1][1][7] = 0

 4981 02:00:24.665852  rx_lastpass[1][1][7] =  0

 4982 02:00:24.669179  rx_firspass[1][1][8] = 0

 4983 02:00:24.669305  rx_lastpass[1][1][8] =  0

 4984 02:00:24.672738  rx_firspass[1][1][9] = 0

 4985 02:00:24.676170  rx_lastpass[1][1][9] =  0

 4986 02:00:24.676250  rx_firspass[1][1][10] = 0

 4987 02:00:24.679038  rx_lastpass[1][1][10] =  0

 4988 02:00:24.682410  rx_firspass[1][1][11] = 0

 4989 02:00:24.686193  rx_lastpass[1][1][11] =  0

 4990 02:00:24.686273  rx_firspass[1][1][12] = 0

 4991 02:00:24.689152  rx_lastpass[1][1][12] =  0

 4992 02:00:24.692859  rx_firspass[1][1][13] = 0

 4993 02:00:24.692939  rx_lastpass[1][1][13] =  0

 4994 02:00:24.696224  rx_firspass[1][1][14] = 0

 4995 02:00:24.699398  rx_lastpass[1][1][14] =  0

 4996 02:00:24.702788  rx_firspass[1][1][15] = 0

 4997 02:00:24.702868  rx_lastpass[1][1][15] =  0

 4998 02:00:24.705822  dump params clk_delay

 4999 02:00:24.705916  clk_delay[0] = 0

 5000 02:00:24.709212  clk_delay[1] = 0

 5001 02:00:24.709326  dump params dqs_delay

 5002 02:00:24.712598  dqs_delay[0][0] = 0

 5003 02:00:24.712678  dqs_delay[0][1] = 0

 5004 02:00:24.715841  dqs_delay[1][0] = 0

 5005 02:00:24.719120  dqs_delay[1][1] = 0

 5006 02:00:24.719199  dump params delay_cell_unit = 762

 5007 02:00:24.722808  mt_set_emi_preloader end

 5008 02:00:24.729817  [mt_mem_init] dram size: 0x100000000, rank number: 2 

 5009 02:00:24.732743  [complex_mem_test] start addr:0x40000000, len:20480

 5010 02:00:24.768885  [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0

 5011 02:00:24.775421  [complex_mem_test] start addr:0x80000000, len:20480

 5012 02:00:24.811366  [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0

 5013 02:00:24.818180  [complex_mem_test] start addr:0xc0000000, len:20480

 5014 02:00:24.853547  [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0

 5015 02:00:24.860024  [complex_mem_test] start addr:0x56000000, len:8192

 5016 02:00:24.876734  [MEM] 1st complex R/W mem test pass (start addr:0x56000000)

 5017 02:00:24.876817  ddr_geometry:1

 5018 02:00:24.883564  [complex_mem_test] start addr:0x80000000, len:8192

 5019 02:00:24.900297  [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)

 5020 02:00:24.903857  dram_init: dram init end (result: 0)

 5021 02:00:24.910566  Successfully loaded DRAM blobs and ran DRAM calibration

 5022 02:00:24.920143  Mapping address range [0000000040000000:0000000140000000) as     cacheable | read-write | non-secure | normal

 5023 02:00:24.920226  CBMEM:

 5024 02:00:24.923968  IMD: root @ 00000000fffff000 254 entries.

 5025 02:00:24.927040  IMD: root @ 00000000ffffec00 62 entries.

 5026 02:00:24.933611  VBOOT: copying vboot_working_data (256 bytes) to CBMEM...

 5027 02:00:24.940335  out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00 

 5028 02:00:24.943415  in-header: 03 a1 00 00 08 00 00 00 

 5029 02:00:24.946970  in-data: 84 60 60 10 00 00 00 00 

 5030 02:00:24.950742  Chrome EC: clear events_b mask to 0x0000000020004000

 5031 02:00:24.958046  out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00 

 5032 02:00:24.960776  in-header: 03 fd 00 00 00 00 00 00 

 5033 02:00:24.960856  in-data: 

 5034 02:00:24.967943  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5035 02:00:24.968025  CBFS @ 21000 size 3d4000

 5036 02:00:24.973886  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5037 02:00:24.977690  CBFS: Locating 'fallback/ramstage'

 5038 02:00:24.980534  CBFS: Found @ offset 10d40 size d563

 5039 02:00:25.002280  read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps

 5040 02:00:25.014444  Accumulated console time in romstage 12833 ms

 5041 02:00:25.014528  

 5042 02:00:25.014604  

 5043 02:00:25.024667  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...

 5044 02:00:25.027634  ARM64: Exception handlers installed.

 5045 02:00:25.027715  ARM64: Testing exception

 5046 02:00:25.031073  ARM64: Done test exception

 5047 02:00:25.034478  FMAP: area RO_VPD found @ 3f8000 (32768 bytes)

 5048 02:00:25.037685  Manufacturer: ef

 5049 02:00:25.040917  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

 5050 02:00:25.047488  WARNING: RO_VPD is uninitialized or empty.

 5051 02:00:25.050943  FMAP: area RW_VPD found @ 550000 (16384 bytes)

 5052 02:00:25.054447  FMAP: area RW_VPD found @ 550000 (16384 bytes)

 5053 02:00:25.064408  read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps

 5054 02:00:25.067632  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

 5055 02:00:25.074258  BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0

 5056 02:00:25.074341  Enumerating buses...

 5057 02:00:25.081277  Show all devs... Before device enumeration.

 5058 02:00:25.081374  Root Device: enabled 1

 5059 02:00:25.084353  CPU_CLUSTER: 0: enabled 1

 5060 02:00:25.084437  CPU: 00: enabled 1

 5061 02:00:25.087380  Compare with tree...

 5062 02:00:25.090811  Root Device: enabled 1

 5063 02:00:25.090908   CPU_CLUSTER: 0: enabled 1

 5064 02:00:25.094432    CPU: 00: enabled 1

 5065 02:00:25.094527  Root Device scanning...

 5066 02:00:25.097421  root_dev_scan_bus for Root Device

 5067 02:00:25.100960  CPU_CLUSTER: 0 enabled

 5068 02:00:25.104572  root_dev_scan_bus for Root Device done

 5069 02:00:25.107495  scan_bus: scanning of bus Root Device took 10689 usecs

 5070 02:00:25.111115  done

 5071 02:00:25.114151  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0

 5072 02:00:25.117768  Allocating resources...

 5073 02:00:25.117851  Reading resources...

 5074 02:00:25.120629  Root Device read_resources bus 0 link: 0

 5075 02:00:25.127503  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 5076 02:00:25.127585  CPU: 00 missing read_resources

 5077 02:00:25.134316  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 5078 02:00:25.137791  Root Device read_resources bus 0 link: 0 done

 5079 02:00:25.140949  Done reading resources.

 5080 02:00:25.144211  Show resources in subtree (Root Device)...After reading.

 5081 02:00:25.147607   Root Device child on link 0 CPU_CLUSTER: 0

 5082 02:00:25.150635    CPU_CLUSTER: 0 child on link 0 CPU: 00

 5083 02:00:25.160991    CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0

 5084 02:00:25.161074     CPU: 00

 5085 02:00:25.164357  Setting resources...

 5086 02:00:25.167515  Root Device assign_resources, bus 0 link: 0

 5087 02:00:25.170975  CPU_CLUSTER: 0 missing set_resources

 5088 02:00:25.174385  Root Device assign_resources, bus 0 link: 0

 5089 02:00:25.177466  Done setting resources.

 5090 02:00:25.184370  Show resources in subtree (Root Device)...After assigning values.

 5091 02:00:25.187296   Root Device child on link 0 CPU_CLUSTER: 0

 5092 02:00:25.190740    CPU_CLUSTER: 0 child on link 0 CPU: 00

 5093 02:00:25.197598    CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0

 5094 02:00:25.200947     CPU: 00

 5095 02:00:25.201027  Done allocating resources.

 5096 02:00:25.207224  BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0

 5097 02:00:25.210965  Enabling resources...

 5098 02:00:25.211046  done.

 5099 02:00:25.214375  BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0

 5100 02:00:25.217215  Initializing devices...

 5101 02:00:25.217323  Root Device init ...

 5102 02:00:25.220861  mainboard_init: Starting display init.

 5103 02:00:25.223854  ADC[4]: Raw value=76850 ID=0

 5104 02:00:25.247124  anx7625_power_on_init: Init interface.

 5105 02:00:25.250360  anx7625_disable_pd_protocol: Disabled PD feature.

 5106 02:00:25.256937  anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.

 5107 02:00:25.303877  anx7625_start_dp_work: Secure OCM version=00

 5108 02:00:25.307314  anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91

 5109 02:00:25.324069  sp_tx_get_edid_block: EDID Block = 1

 5110 02:00:25.441210  Extracted contents:

 5111 02:00:25.444641  header:          00 ff ff ff ff ff ff 00

 5112 02:00:25.448145  serial number:   06 af 5c 14 00 00 00 00 00 1a

 5113 02:00:25.451418  version:         01 04

 5114 02:00:25.454396  basic params:    95 1a 0e 78 02

 5115 02:00:25.457822  chroma info:     99 85 95 55 56 92 28 22 50 54

 5116 02:00:25.461154  established:     00 00 00

 5117 02:00:25.467647  standard:        01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01

 5118 02:00:25.471063  descriptor 1:    ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18

 5119 02:00:25.477800  descriptor 2:    00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20

 5120 02:00:25.484571  descriptor 3:    00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20

 5121 02:00:25.490856  descriptor 4:    00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a

 5122 02:00:25.494121  extensions:      00

 5123 02:00:25.494205  checksum:        ae

 5124 02:00:25.494271  

 5125 02:00:25.497610  Manufacturer: AUO Model 145c Serial Number 0

 5126 02:00:25.500950  Made week 0 of 2016

 5127 02:00:25.501058  EDID version: 1.4

 5128 02:00:25.504181  Digital display

 5129 02:00:25.507860  6 bits per primary color channel

 5130 02:00:25.507942  DisplayPort interface

 5131 02:00:25.511125  Maximum image size: 26 cm x 14 cm

 5132 02:00:25.515014  Gamma: 220%

 5133 02:00:25.515095  Check DPMS levels

 5134 02:00:25.517663  Supported color formats: RGB 4:4:4

 5135 02:00:25.520921  First detailed timing is preferred timing

 5136 02:00:25.524332  Established timings supported:

 5137 02:00:25.527900  Standard timings supported:

 5138 02:00:25.527980  Detailed timings

 5139 02:00:25.534148  Hex of detail: ce1d56ea50001a3030204600009010000018

 5140 02:00:25.537804  Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm

 5141 02:00:25.541234                 0556 0586 05a6 0640 hborder 0

 5142 02:00:25.544403                 0300 0304 030a 031a vborder 0

 5143 02:00:25.547686                 -hsync -vsync 

 5144 02:00:25.551284  Did detailed timing

 5145 02:00:25.554557  Hex of detail: 0000000f0000000000000000000000000020

 5146 02:00:25.557624  Manufacturer-specified data, tag 15

 5147 02:00:25.560765  Hex of detail: 000000fe0041554f0a202020202020202020

 5148 02:00:25.564280  ASCII string: AUO

 5149 02:00:25.567503  Hex of detail: 000000fe004231313658414230312e34200a

 5150 02:00:25.571007  ASCII string: B116XAB01.4 

 5151 02:00:25.571093  Checksum

 5152 02:00:25.574490  Checksum: 0xae (valid)

 5153 02:00:25.580832  get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz

 5154 02:00:25.580913  DSI data_rate: 457800000 bps

 5155 02:00:25.588291  anx7625_parse_edid: set default k value to 0x3d for panel

 5156 02:00:25.591773  anx7625_parse_edid: pixelclock(76300).

 5157 02:00:25.595413   hactive(1366), hsync(32), hfp(48), hbp(154)

 5158 02:00:25.598268   vactive(768), vsync(6), vfp(4), vbp(16)

 5159 02:00:25.601358  anx7625_dsi_config: config dsi.

 5160 02:00:25.609208  anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).

 5161 02:00:25.630987  anx7625_dsi_config: success to config DSI

 5162 02:00:25.633699  anx7625_dp_start: MIPI phy setup OK.

 5163 02:00:25.637154  [SSUSB] Setting up USB HOST controller...

 5164 02:00:25.640703  [SSUSB] u3phy_ports_enable u2p:1, u3p:0

 5165 02:00:25.640778  [SSUSB] phy power-on done.

 5166 02:00:25.647574  out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00 

 5167 02:00:25.651236  in-header: 03 fc 01 00 00 00 00 00 

 5168 02:00:25.651340  in-data: 

 5169 02:00:25.657826  handle_proto3_response: EC response with error code: 1

 5170 02:00:25.657901  SPM: pcm index = 1

 5171 02:00:25.661092  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5172 02:00:25.664499  CBFS @ 21000 size 3d4000

 5173 02:00:25.670977  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5174 02:00:25.674641  CBFS: Locating 'pcm_allinone_lp4_3200.bin'

 5175 02:00:25.677591  CBFS: Found @ offset 1e7c0 size 1026

 5176 02:00:25.684470  read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps

 5177 02:00:25.687877  SPM: binary array size = 2988

 5178 02:00:25.691231  SPM: version = pcm_allinone_v1.17.2_20180829

 5179 02:00:25.694123  SPM binary loaded in 32 msecs

 5180 02:00:25.701876  spm_kick_im_to_fetch: ptr = 000000004021eec2

 5181 02:00:25.705158  spm_kick_im_to_fetch: len = 2988

 5182 02:00:25.705267  SPM: spm_kick_pcm_to_run

 5183 02:00:25.708699  SPM: spm_kick_pcm_to_run done

 5184 02:00:25.711941  SPM: spm_init done in 52 msecs

 5185 02:00:25.715550  Root Device init finished in 495229 usecs

 5186 02:00:25.718331  CPU_CLUSTER: 0 init ...

 5187 02:00:25.728739  Mapping address range [0000000000200000:0000000000280000) as     cacheable | read-write |     secure | device

 5188 02:00:25.731890  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5189 02:00:25.735320  CBFS @ 21000 size 3d4000

 5190 02:00:25.738236  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5191 02:00:25.741516  CBFS: Locating 'sspm.bin'

 5192 02:00:25.744648  CBFS: Found @ offset 208c0 size 41cb

 5193 02:00:25.754822  read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps

 5194 02:00:25.763158  CPU_CLUSTER: 0 init finished in 42798 usecs

 5195 02:00:25.763256  Devices initialized

 5196 02:00:25.766358  Show all devs... After init.

 5197 02:00:25.769762  Root Device: enabled 1

 5198 02:00:25.769872  CPU_CLUSTER: 0: enabled 1

 5199 02:00:25.773267  CPU: 00: enabled 1

 5200 02:00:25.776133  BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0

 5201 02:00:25.779500  FMAP: area RW_ELOG found @ 558000 (4096 bytes)

 5202 02:00:25.782823  ELOG: NV offset 0x558000 size 0x1000

 5203 02:00:25.790224  read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps

 5204 02:00:25.797207  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 5205 02:00:25.800824  ELOG: Event(17) added with size 13 at 2024-06-21 02:00:25 UTC

 5206 02:00:25.803793  out: cmd=0x121: 03 db 21 01 00 00 00 00 

 5207 02:00:25.807230  in-header: 03 78 00 00 2c 00 00 00 

 5208 02:00:25.820544  in-data: 2b 48 00 00 00 00 00 00 02 10 00 00 06 80 00 00 4d 2b 01 00 06 80 00 00 2a 3a 02 00 06 80 00 00 da 94 01 00 06 80 00 00 97 d5 02 00 

 5209 02:00:25.823822  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

 5210 02:00:25.827286  in-header: 03 19 00 00 08 00 00 00 

 5211 02:00:25.830987  in-data: a2 e0 47 00 13 00 00 00 

 5212 02:00:25.833686  Chrome EC: UHEPI supported

 5213 02:00:25.840629  out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00 

 5214 02:00:25.844083  in-header: 03 e1 00 00 08 00 00 00 

 5215 02:00:25.847474  in-data: 84 20 60 10 00 00 00 00 

 5216 02:00:25.850956  FMAP: area RW_NVRAM found @ 554000 (8192 bytes)

 5217 02:00:25.857507  out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00 

 5218 02:00:25.860531  in-header: 03 e1 00 00 08 00 00 00 

 5219 02:00:25.864084  in-data: 84 20 60 10 00 00 00 00 

 5220 02:00:25.870640  ELOG: Event(A1) added with size 10 at 2024-06-21 02:00:25 UTC

 5221 02:00:25.877736  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02

 5222 02:00:25.880342  ELOG: Event(A0) added with size 9 at 2024-06-21 02:00:25 UTC

 5223 02:00:25.883872  elog_add_boot_reason: Logged dev mode boot

 5224 02:00:25.887268  Finalize devices...

 5225 02:00:25.890851  Devices finalized

 5226 02:00:25.893759  BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0

 5227 02:00:25.897009  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 5228 02:00:25.904162  ELOG: Event(91) added with size 10 at 2024-06-21 02:00:25 UTC

 5229 02:00:25.907121  Writing coreboot table at 0xffeda000

 5230 02:00:25.910523   0. 0000000000114000-000000000011efff: RAMSTAGE

 5231 02:00:25.916994   1. 0000000040000000-000000004023cfff: RAMSTAGE

 5232 02:00:25.920349   2. 000000004023d000-00000000545fffff: RAM

 5233 02:00:25.923863   3. 0000000054600000-000000005465ffff: BL31

 5234 02:00:25.927073   4. 0000000054660000-00000000ffed9fff: RAM

 5235 02:00:25.933754   5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES

 5236 02:00:25.937166   6. 0000000100000000-000000013fffffff: RAM

 5237 02:00:25.937300  Passing 5 GPIOs to payload:

 5238 02:00:25.943683              NAME |       PORT | POLARITY |     VALUE

 5239 02:00:25.947163     write protect | 0x00000096 |      low |      high

 5240 02:00:25.953808          EC in RW | 0x000000b1 |     high | undefined

 5241 02:00:25.956929      EC interrupt | 0x00000097 |      low | undefined

 5242 02:00:25.960229     TPM interrupt | 0x00000099 |     high | undefined

 5243 02:00:25.967102    speaker enable | 0x000000af |     high | undefined

 5244 02:00:25.970295  out: cmd=0x6: 03 f7 06 00 00 00 00 00 

 5245 02:00:25.973386  in-header: 03 f7 00 00 02 00 00 00 

 5246 02:00:25.973488  in-data: 04 00 

 5247 02:00:25.977084  Board ID: 4

 5248 02:00:25.980302  ADC[3]: Raw value=1034985 ID=8

 5249 02:00:25.980403  RAM code: 8

 5250 02:00:25.980492  SKU ID: 16

 5251 02:00:25.987113  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5252 02:00:25.987190  CBFS @ 21000 size 3d4000

 5253 02:00:25.993531  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5254 02:00:26.000362  Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 26c5

 5255 02:00:26.000465  coreboot table: 940 bytes.

 5256 02:00:26.003663  IMD ROOT    0. 00000000fffff000 00001000

 5257 02:00:26.010460  IMD SMALL   1. 00000000ffffe000 00001000

 5258 02:00:26.013778  CONSOLE     2. 00000000fffde000 00020000

 5259 02:00:26.016824  FMAP        3. 00000000fffdd000 0000047c

 5260 02:00:26.020375  TIME STAMP  4. 00000000fffdc000 00000910

 5261 02:00:26.024087  RAMOOPS     5. 00000000ffedc000 00100000

 5262 02:00:26.027202  COREBOOT    6. 00000000ffeda000 00002000

 5263 02:00:26.027299  IMD small region:

 5264 02:00:26.033625    IMD ROOT    0. 00000000ffffec00 00000400

 5265 02:00:26.036654    VBOOT WORK  1. 00000000ffffeb00 00000100

 5266 02:00:26.039985    EC HOSTEVENT 2. 00000000ffffeae0 00000008

 5267 02:00:26.043520    VPD         3. 00000000ffffea60 0000006c

 5268 02:00:26.049807  BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0

 5269 02:00:26.056508  out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00 

 5270 02:00:26.059809  in-header: 03 e1 00 00 08 00 00 00 

 5271 02:00:26.059881  in-data: 84 20 60 10 00 00 00 00 

 5272 02:00:26.066706  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5273 02:00:26.066780  CBFS @ 21000 size 3d4000

 5274 02:00:26.073394  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5275 02:00:26.076791  CBFS: Locating 'fallback/payload'

 5276 02:00:26.084700  CBFS: Found @ offset dc040 size 439a0

 5277 02:00:26.172468  read SPI 0xfd078 0x439a0: 84428 us, 3279 KB/s, 26.232 Mbps

 5278 02:00:26.176146  Checking segment from ROM address 0x0000000040003a00

 5279 02:00:26.182700  Checking segment from ROM address 0x0000000040003a1c

 5280 02:00:26.186046  Loading segment from ROM address 0x0000000040003a00

 5281 02:00:26.189004    code (compression=0)

 5282 02:00:26.199393    New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968

 5283 02:00:26.205506  Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968

 5284 02:00:26.208818  it's not compressed!

 5285 02:00:26.212143  [ 0x80000000, 80043968, 0x811994a0) <- 40003a38

 5286 02:00:26.218774  Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38

 5287 02:00:26.227220  Loading segment from ROM address 0x0000000040003a1c

 5288 02:00:26.230558    Entry Point 0x0000000080000000

 5289 02:00:26.230645  Loaded segments

 5290 02:00:26.237015  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0

 5291 02:00:26.240029  Jumping to boot code at 0000000080000000(00000000ffeda000)

 5292 02:00:26.249922  CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes

 5293 02:00:26.253558  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5294 02:00:26.256711  CBFS @ 21000 size 3d4000

 5295 02:00:26.263777  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5296 02:00:26.266747  CBFS: Locating 'fallback/bl31'

 5297 02:00:26.269619  CBFS: Found @ offset 36dc0 size 5820

 5298 02:00:26.280572  read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps

 5299 02:00:26.284010  Checking segment from ROM address 0x0000000040003a00

 5300 02:00:26.290521  Checking segment from ROM address 0x0000000040003a1c

 5301 02:00:26.294080  Loading segment from ROM address 0x0000000040003a00

 5302 02:00:26.297361    code (compression=1)

 5303 02:00:26.304255    New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8

 5304 02:00:26.313695  Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8

 5305 02:00:26.313773  using LZMA

 5306 02:00:26.322445  [ 0x54600000, 5460f420, 0x54629000) <- 40003a38

 5307 02:00:26.329561  Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0

 5308 02:00:26.332903  Loading segment from ROM address 0x0000000040003a1c

 5309 02:00:26.335880    Entry Point 0x0000000054601000

 5310 02:00:26.335978  Loaded segments

 5311 02:00:26.339567  NOTICE:  MT8183 bl31_setup

 5312 02:00:26.346508  NOTICE:  BL31: v2.1(debug):v2.1-806-g3addeb68c

 5313 02:00:26.349345  NOTICE:  BL31: Built : Sun Jan 30 03:25:20 UTC 2022

 5314 02:00:26.352742  INFO:    [DEVAPC] dump DEVAPC registers:

 5315 02:00:26.362746  INFO:    [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0

 5316 02:00:26.369604  INFO:    [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0

 5317 02:00:26.379674  INFO:    [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0

 5318 02:00:26.386456  INFO:    [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0

 5319 02:00:26.396097  INFO:    [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0

 5320 02:00:26.403082  INFO:    [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0

 5321 02:00:26.412519  INFO:    [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0

 5322 02:00:26.419473  INFO:    [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0

 5323 02:00:26.425842  INFO:    [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0

 5324 02:00:26.436039  INFO:    [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0

 5325 02:00:26.442914  INFO:    [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0

 5326 02:00:26.452673  INFO:    [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0

 5327 02:00:26.459731  INFO:    [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0

 5328 02:00:26.469081  INFO:    [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0

 5329 02:00:26.476192  INFO:    [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0

 5330 02:00:26.482438  INFO:    [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0

 5331 02:00:26.489384  INFO:    [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0

 5332 02:00:26.495984  INFO:    [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0

 5333 02:00:26.505871  INFO:    [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0

 5334 02:00:26.512292  INFO:    [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0

 5335 02:00:26.519225  INFO:    [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0

 5336 02:00:26.525880  INFO:    [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0

 5337 02:00:26.529457  INFO:    [DEVAPC] MAS_DOM_0 = 0x1

 5338 02:00:26.532291  INFO:    [DEVAPC] MAS_DOM_1 = 0x200

 5339 02:00:26.536019  INFO:    [DEVAPC] MAS_DOM_2 = 0x0

 5340 02:00:26.539284  INFO:    [DEVAPC] MAS_DOM_3 = 0x2000

 5341 02:00:26.542458  INFO:    [DEVAPC] MAS_SEC_0 = 0x8000000

 5342 02:00:26.548856  INFO:    [DEVAPC]  (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0

 5343 02:00:26.555777  INFO:    [DEVAPC]  (MM)MAS_DOMAIN_REMAP_0 = 0x24

 5344 02:00:26.555858  WARNING: region 0:

 5345 02:00:26.559341  WARNING: 	apc:0x168, sa:0x0, ea:0xfff

 5346 02:00:26.562240  WARNING: region 1:

 5347 02:00:26.566017  WARNING: 	apc:0x140, sa:0x1000, ea:0x128f

 5348 02:00:26.566097  WARNING: region 2:

 5349 02:00:26.569312  WARNING: 	apc:0x168, sa:0x1290, ea:0x1fff

 5350 02:00:26.572866  WARNING: region 3:

 5351 02:00:26.575669  WARNING: 	apc:0x168, sa:0x2000, ea:0xbfff

 5352 02:00:26.575749  WARNING: region 4:

 5353 02:00:26.582270  WARNING: 	apc:0x168, sa:0xc000, ea:0x1ffff

 5354 02:00:26.582350  WARNING: region 5:

 5355 02:00:26.585560  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5356 02:00:26.589032  WARNING: region 6:

 5357 02:00:26.589112  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5358 02:00:26.592716  WARNING: region 7:

 5359 02:00:26.595787  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5360 02:00:26.602757  INFO:    GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3

 5361 02:00:26.605694  INFO:    SPM: enable SPMC mode

 5362 02:00:26.609124  NOTICE:  spm_boot_init() start

 5363 02:00:26.609204  NOTICE:  spm_boot_init() end

 5364 02:00:26.616184  INFO:    BL31: Initializing runtime services

 5365 02:00:26.619058  INFO:    BL31: cortex_a53: CPU workaround for 855873 was applied

 5366 02:00:26.626045  INFO:    BL31: Preparing for EL3 exit to normal world

 5367 02:00:26.629132  INFO:    Entry point address = 0x80000000

 5368 02:00:26.629212  INFO:    SPSR = 0x8

 5369 02:00:26.653032  

 5370 02:00:26.653122  

 5371 02:00:26.653203  

 5372 02:00:26.653668  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 5373 02:00:26.653770  start: 2.2.4 bootloader-commands (timeout 00:04:24) [common]
 5374 02:00:26.653856  Setting prompt string to ['jacuzzi:']
 5375 02:00:26.653939  bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:24)
 5376 02:00:26.656346  Starting depthcharge on Juniper...

 5377 02:00:26.656489  

 5378 02:00:26.659536  vboot_handoff: creating legacy vboot_handoff structure

 5379 02:00:26.659617  

 5380 02:00:26.662703  ec_init(0): CrosEC protocol v3 supported (544, 544)

 5381 02:00:26.662955  

 5382 02:00:26.666080  Wipe memory regions:

 5383 02:00:26.666186  

 5384 02:00:26.669415  	[0x00000040000000, 0x00000054600000)

 5385 02:00:26.712608  

 5386 02:00:26.712744  	[0x00000054660000, 0x00000080000000)

 5387 02:00:26.803537  

 5388 02:00:26.803706  	[0x000000811994a0, 0x000000ffeda000)

 5389 02:00:27.063753  

 5390 02:00:27.063910  	[0x00000100000000, 0x00000140000000)

 5391 02:00:27.196416  

 5392 02:00:27.199177  Initializing XHCI USB controller at 0x11200000.

 5393 02:00:27.222587  

 5394 02:00:27.225640  [firmware-jacuzzi-12573.B-collabora] Jun  8 2022 08:18:54

 5395 02:00:27.225727  

 5396 02:00:27.225791  


 5397 02:00:27.226076  Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5399 02:00:27.326497  jacuzzi: tftpboot 192.168.201.1 14479219/tftp-deploy-exyhzxbh/kernel/image.itb 14479219/tftp-deploy-exyhzxbh/kernel/cmdline 

 5400 02:00:27.326679  Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5401 02:00:27.326766  bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:24)
 5402 02:00:27.330766  tftpboot 192.168.201.1 14479219/tftp-deploy-exyhzxbh/kernel/image.ittp-deploy-exyhzxbh/kernel/cmdline 

 5403 02:00:27.330849  

 5404 02:00:27.330913  Waiting for link

 5405 02:00:27.736149  

 5406 02:00:27.736304  R8152: Initializing

 5407 02:00:27.736374  

 5408 02:00:27.739297  Version 9 (ocp_data = 6010)

 5409 02:00:27.739378  

 5410 02:00:27.742400  R8152: Done initializing

 5411 02:00:27.742480  

 5412 02:00:27.742542  Adding net device

 5413 02:00:28.128383  

 5414 02:00:28.128537  done.

 5415 02:00:28.128605  

 5416 02:00:28.128666  MAC: 00:e0:4c:71:a7:1f

 5417 02:00:28.128723  

 5418 02:00:28.131949  Sending DHCP discover... done.

 5419 02:00:28.132048  

 5420 02:00:28.135044  Waiting for reply... done.

 5421 02:00:28.135141  

 5422 02:00:28.138266  Sending DHCP request... done.

 5423 02:00:28.138387  

 5424 02:00:28.138451  Waiting for reply... done.

 5425 02:00:28.138511  

 5426 02:00:28.141670  My ip is 192.168.201.23

 5427 02:00:28.141751  

 5428 02:00:28.144984  The DHCP server ip is 192.168.201.1

 5429 02:00:28.145065  

 5430 02:00:28.148234  TFTP server IP predefined by user: 192.168.201.1

 5431 02:00:28.148332  

 5432 02:00:28.154911  Bootfile predefined by user: 14479219/tftp-deploy-exyhzxbh/kernel/image.itb

 5433 02:00:28.154994  

 5434 02:00:28.158422  Sending tftp read request... done.

 5435 02:00:28.158504  

 5436 02:00:28.161831  Waiting for the transfer... 

 5437 02:00:28.161912  

 5438 02:00:28.500755  00000000 ################################################################

 5439 02:00:28.500935  

 5440 02:00:28.832133  00080000 ################################################################

 5441 02:00:28.832316  

 5442 02:00:29.164509  00100000 ################################################################

 5443 02:00:29.164665  

 5444 02:00:29.470145  00180000 ################################################################

 5445 02:00:29.470317  

 5446 02:00:29.739184  00200000 ################################################################

 5447 02:00:29.739336  

 5448 02:00:29.999370  00280000 ################################################################

 5449 02:00:29.999537  

 5450 02:00:30.300005  00300000 ################################################################

 5451 02:00:30.300176  

 5452 02:00:30.637387  00380000 ################################################################

 5453 02:00:30.637517  

 5454 02:00:30.978454  00400000 ################################################################

 5455 02:00:30.978613  

 5456 02:00:31.332514  00480000 ################################################################

 5457 02:00:31.332660  

 5458 02:00:31.682661  00500000 ################################################################

 5459 02:00:31.682812  

 5460 02:00:32.026110  00580000 ################################################################

 5461 02:00:32.026271  

 5462 02:00:32.361448  00600000 ################################################################

 5463 02:00:32.361615  

 5464 02:00:32.698242  00680000 ################################################################

 5465 02:00:32.698407  

 5466 02:00:33.031620  00700000 ################################################################

 5467 02:00:33.031830  

 5468 02:00:33.364614  00780000 ################################################################

 5469 02:00:33.364769  

 5470 02:00:33.693483  00800000 ################################################################

 5471 02:00:33.693628  

 5472 02:00:34.024133  00880000 ################################################################

 5473 02:00:34.024309  

 5474 02:00:34.349766  00900000 ################################################################

 5475 02:00:34.349922  

 5476 02:00:34.685841  00980000 ################################################################

 5477 02:00:34.685988  

 5478 02:00:35.019673  00a00000 ################################################################

 5479 02:00:35.019821  

 5480 02:00:35.350227  00a80000 ################################################################

 5481 02:00:35.350388  

 5482 02:00:35.679263  00b00000 ################################################################

 5483 02:00:35.679441  

 5484 02:00:36.014677  00b80000 ################################################################

 5485 02:00:36.014871  

 5486 02:00:36.351294  00c00000 ################################################################

 5487 02:00:36.351453  

 5488 02:00:36.685165  00c80000 ################################################################

 5489 02:00:36.685362  

 5490 02:00:37.011727  00d00000 ################################################################

 5491 02:00:37.011903  

 5492 02:00:37.344529  00d80000 ################################################################

 5493 02:00:37.344681  

 5494 02:00:37.603212  00e00000 ################################################################

 5495 02:00:37.603341  

 5496 02:00:37.889428  00e80000 ################################################################

 5497 02:00:37.889602  

 5498 02:00:38.217202  00f00000 ################################################################

 5499 02:00:38.217358  

 5500 02:00:38.553756  00f80000 ################################################################

 5501 02:00:38.553932  

 5502 02:00:38.904083  01000000 ################################################################

 5503 02:00:38.904237  

 5504 02:00:39.233624  01080000 ################################################################

 5505 02:00:39.233777  

 5506 02:00:39.574709  01100000 ################################################################

 5507 02:00:39.574849  

 5508 02:00:39.912102  01180000 ################################################################

 5509 02:00:39.912247  

 5510 02:00:40.266548  01200000 ################################################################

 5511 02:00:40.266705  

 5512 02:00:40.601865  01280000 ################################################################

 5513 02:00:40.602018  

 5514 02:00:40.932252  01300000 ################################################################

 5515 02:00:40.932421  

 5516 02:00:41.278385  01380000 ################################################################

 5517 02:00:41.278532  

 5518 02:00:41.611487  01400000 ################################################################

 5519 02:00:41.611661  

 5520 02:00:41.885153  01480000 ################################################################

 5521 02:00:41.885335  

 5522 02:00:42.161279  01500000 ################################################################

 5523 02:00:42.161425  

 5524 02:00:42.414253  01580000 ################################################################

 5525 02:00:42.414416  

 5526 02:00:42.675427  01600000 ################################################################

 5527 02:00:42.675591  

 5528 02:00:42.941076  01680000 ################################################################

 5529 02:00:42.941225  

 5530 02:00:43.207432  01700000 ################################################################

 5531 02:00:43.207608  

 5532 02:00:43.463858  01780000 ################################################################

 5533 02:00:43.464030  

 5534 02:00:43.718834  01800000 ################################################################

 5535 02:00:43.718965  

 5536 02:00:43.984230  01880000 ################################################################

 5537 02:00:43.984393  

 5538 02:00:44.242106  01900000 ################################################################

 5539 02:00:44.242251  

 5540 02:00:44.507687  01980000 ################################################################

 5541 02:00:44.507835  

 5542 02:00:44.768586  01a00000 ################################################################

 5543 02:00:44.768724  

 5544 02:00:45.022873  01a80000 ################################################################

 5545 02:00:45.023009  

 5546 02:00:45.286050  01b00000 ################################################################

 5547 02:00:45.286194  

 5548 02:00:45.555732  01b80000 ################################################################

 5549 02:00:45.555915  

 5550 02:00:45.833708  01c00000 ################################################################

 5551 02:00:45.833898  

 5552 02:00:46.109608  01c80000 ################################################################

 5553 02:00:46.109758  

 5554 02:00:46.383059  01d00000 ################################################################

 5555 02:00:46.383211  

 5556 02:00:46.643373  01d80000 ################################################################

 5557 02:00:46.643543  

 5558 02:00:46.880261  01e00000 ######################################################### done.

 5559 02:00:46.880429  

 5560 02:00:46.883762  The bootfile was 31922158 bytes long.

 5561 02:00:46.883871  

 5562 02:00:46.886621  Sending tftp read request... done.

 5563 02:00:46.886731  

 5564 02:00:46.886827  Waiting for the transfer... 

 5565 02:00:46.886917  

 5566 02:00:46.890196  00000000 # done.

 5567 02:00:46.890279  

 5568 02:00:46.896692  Command line loaded dynamically from TFTP file: 14479219/tftp-deploy-exyhzxbh/kernel/cmdline

 5569 02:00:46.896786  

 5570 02:00:46.923501  The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14479219/extract-nfsrootfs-cgh7e9h3,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1

 5571 02:00:46.923596  

 5572 02:00:46.923661  Loading FIT.

 5573 02:00:46.923721  

 5574 02:00:46.926618  Image ramdisk-1 has 18737520 bytes.

 5575 02:00:46.926701  

 5576 02:00:46.929896  Image fdt-1 has 57695 bytes.

 5577 02:00:46.929979  

 5578 02:00:46.933291  Image kernel-1 has 13124896 bytes.

 5579 02:00:46.933373  

 5580 02:00:46.943355  Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper

 5581 02:00:46.943441  

 5582 02:00:46.953431  Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183

 5583 02:00:46.953519  

 5584 02:00:46.959943  Choosing best match conf-1 for compat google,juniper-sku16.

 5585 02:00:46.963704  

 5586 02:00:46.968175  Connected to device vid:did:rid of 1ae0:0028:00

 5587 02:00:46.975150  

 5588 02:00:46.978711  tpm_get_response: command 0x17b, return code 0x0

 5589 02:00:46.978795  

 5590 02:00:46.981930  tpm_cleanup: add release locality here.

 5591 02:00:46.982014  

 5592 02:00:46.985214  Shutting down all USB controllers.

 5593 02:00:46.985305  

 5594 02:00:46.988731  Removing current net device

 5595 02:00:46.988813  

 5596 02:00:46.992017  Exiting depthcharge with code 4 at timestamp: 36729187

 5597 02:00:46.992104  

 5598 02:00:46.994834  LZMA decompressing kernel-1 to 0x80193568

 5599 02:00:46.994916  

 5600 02:00:47.001419  LZMA decompressing kernel-1 to 0x40000000

 5601 02:00:48.865514  

 5602 02:00:48.865653  jumping to kernel

 5603 02:00:48.866342  end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
 5604 02:00:48.866444  start: 2.2.5 auto-login-action (timeout 00:04:02) [common]
 5605 02:00:48.866520  Setting prompt string to ['Linux version [0-9]']
 5606 02:00:48.866590  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5607 02:00:48.866657  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 5608 02:00:48.941129  

 5609 02:00:48.943981  [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]

 5610 02:00:48.947685  start: 2.2.5.1 login-action (timeout 00:04:02) [common]
 5611 02:00:48.947803  The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
 5612 02:00:48.947876  Setting prompt string to []
 5613 02:00:48.947969  Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
 5614 02:00:48.948087  Using line separator: #'\n'#
 5615 02:00:48.948148  No login prompt set.
 5616 02:00:48.948213  Parsing kernel messages
 5617 02:00:48.948269  ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
 5618 02:00:48.948373  [login-action] Waiting for messages, (timeout 00:04:02)
 5619 02:00:48.948440  Waiting using forced prompt support (timeout 00:02:01)
 5620 02:00:48.967330  [    0.000000] Linux version 6.1.94-cip23 (KernelCI@build-j239242-arm64-gcc-10-defconfig-arm64-chromebook-c5lwc) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Fri Jun 21 00:04:56 UTC 2024

 5621 02:00:48.970716  [    0.000000] random: crng init done

 5622 02:00:48.977590  [    0.000000] Machine model: Google juniper sku16 board

 5623 02:00:48.977675  [    0.000000] efi: UEFI not found.

 5624 02:00:48.987531  [    0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB

 5625 02:00:48.994062  [    0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool

 5626 02:00:49.003973  [    0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')

 5627 02:00:49.007012  [    0.000000] printk: bootconsole [mtk8250] enabled

 5628 02:00:49.015547  [    0.000000] NUMA: No NUMA configuration found

 5629 02:00:49.022714  [    0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]

 5630 02:00:49.029108  [    0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]

 5631 02:00:49.029212  [    0.000000] Zone ranges:

 5632 02:00:49.035521  [    0.000000]   DMA      [mem 0x0000000040000000-0x00000000ffffffff]

 5633 02:00:49.039088  [    0.000000]   DMA32    empty

 5634 02:00:49.046035  [    0.000000]   Normal   [mem 0x0000000100000000-0x000000013fffffff]

 5635 02:00:49.049051  [    0.000000] Movable zone start for each node

 5636 02:00:49.052305  [    0.000000] Early memory node ranges

 5637 02:00:49.058869  [    0.000000]   node   0: [mem 0x0000000040000000-0x000000004fffffff]

 5638 02:00:49.066070  [    0.000000]   node   0: [mem 0x0000000050000000-0x00000000528fffff]

 5639 02:00:49.072495  [    0.000000]   node   0: [mem 0x0000000052900000-0x00000000545fffff]

 5640 02:00:49.078768  [    0.000000]   node   0: [mem 0x0000000054700000-0x00000000ffdfffff]

 5641 02:00:49.085644  [    0.000000]   node   0: [mem 0x0000000100000000-0x000000013fffffff]

 5642 02:00:49.092470  [    0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]

 5643 02:00:49.108272  [    0.000000] On node 0, zone DMA: 256 pages in unavailable ranges

 5644 02:00:49.114826  [    0.000000] On node 0, zone Normal: 512 pages in unavailable ranges

 5645 02:00:49.121623  [    0.000000] cma: Reserved 32 MiB at 0x00000000fde00000

 5646 02:00:49.124934  [    0.000000] psci: probing for conduit method from DT.

 5647 02:00:49.131707  [    0.000000] psci: PSCIv1.1 detected in firmware.

 5648 02:00:49.135165  [    0.000000] psci: Using standard PSCI v0.2 function IDs

 5649 02:00:49.141054  [    0.000000] psci: MIGRATE_INFO_TYPE not supported.

 5650 02:00:49.144787  [    0.000000] psci: SMC Calling Convention v1.1

 5651 02:00:49.151380  [    0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016

 5652 02:00:49.154348  [    0.000000] Detected VIPT I-cache on CPU0

 5653 02:00:49.161399  [    0.000000] CPU features: detected: GIC system register CPU interface

 5654 02:00:49.168173  [    0.000000] CPU features: kernel page table isolation forced ON by KASLR

 5655 02:00:49.174922  [    0.000000] CPU features: detected: Kernel page table isolation (KPTI)

 5656 02:00:49.177791  [    0.000000] CPU features: detected: ARM erratum 845719

 5657 02:00:49.184892  [    0.000000] alternatives: applying boot alternatives

 5658 02:00:49.188077  [    0.000000] Fallback order for Node 0: 0 

 5659 02:00:49.194548  [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 1031424

 5660 02:00:49.197591  [    0.000000] Policy zone: Normal

 5661 02:00:49.224597  [    0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14479219/extract-nfsrootfs-cgh7e9h3,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1

 5662 02:00:49.237691  <5>[    0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.

 5663 02:00:49.247737  <6>[    0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)

 5664 02:00:49.254376  <6>[    0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)

 5665 02:00:49.261377  <6>[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off

 5666 02:00:49.264196  <6>[    0.000000] software IO TLB: area num 8.

 5667 02:00:49.291586  <6>[    0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)

 5668 02:00:49.349672  <6>[    0.000000] Memory: 3896772K/4191232K available (18112K kernel code, 4120K rwdata, 22648K rodata, 8512K init, 616K bss, 261692K reserved, 32768K cma-reserved)

 5669 02:00:49.356309  <6>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1

 5670 02:00:49.362729  <6>[    0.000000] rcu: Preemptible hierarchical RCU implementation.

 5671 02:00:49.365981  <6>[    0.000000] rcu: 	RCU event tracing is enabled.

 5672 02:00:49.373058  <6>[    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.

 5673 02:00:49.379531  <6>[    0.000000] 	Trampoline variant of Tasks RCU enabled.

 5674 02:00:49.383099  <6>[    0.000000] 	Tracing variant of Tasks RCU enabled.

 5675 02:00:49.392793  <6>[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.

 5676 02:00:49.399414  <6>[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8

 5677 02:00:49.402471  <6>[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0

 5678 02:00:49.414984  <6>[    0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem

 5679 02:00:49.421198  <6>[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode

 5680 02:00:49.424540  <6>[    0.000000] GICv3: 640 SPIs implemented

 5681 02:00:49.427834  <6>[    0.000000] GICv3: 0 Extended SPIs implemented

 5682 02:00:49.434636  <6>[    0.000000] Root IRQ handler: gic_handle_irq

 5683 02:00:49.438133  <6>[    0.000000] GICv3: GICv3 features: 16 PPIs

 5684 02:00:49.444612  <6>[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000

 5685 02:00:49.454581  <6>[    0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }

 5686 02:00:49.468246  <6>[    0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }

 5687 02:00:49.474752  <6>[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.

 5688 02:00:49.486767  <6>[    0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).

 5689 02:00:49.499847  <6>[    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns

 5690 02:00:49.506199  <6>[    0.000001] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns

 5691 02:00:49.513435  <6>[    0.009471] Console: colour dummy device 80x25

 5692 02:00:49.516755  <6>[    0.014517] printk: console [tty1] enabled

 5693 02:00:49.526644  <6>[    0.018904] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)

 5694 02:00:49.533313  <6>[    0.029369] pid_max: default: 32768 minimum: 301

 5695 02:00:49.536444  <6>[    0.034252] LSM: Security Framework initializing

 5696 02:00:49.546840  <6>[    0.039166] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)

 5697 02:00:49.553178  <6>[    0.046788] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)

 5698 02:00:49.559915  <4>[    0.055657] cacheinfo: Unable to detect cache hierarchy for CPU 0

 5699 02:00:49.569940  <6>[    0.062286] cblist_init_generic: Setting adjustable number of callback queues.

 5700 02:00:49.573077  <6>[    0.069732] cblist_init_generic: Setting shift to 3 and lim to 1.

 5701 02:00:49.583623  <6>[    0.076085] cblist_init_generic: Setting adjustable number of callback queues.

 5702 02:00:49.590335  <6>[    0.083531] cblist_init_generic: Setting shift to 3 and lim to 1.

 5703 02:00:49.593484  <6>[    0.089930] rcu: Hierarchical SRCU implementation.

 5704 02:00:49.599559  <6>[    0.094957] rcu: 	Max phase no-delay instances is 1000.

 5705 02:00:49.606787  <6>[    0.102873] EFI services will not be available.

 5706 02:00:49.609757  <6>[    0.107821] smp: Bringing up secondary CPUs ...

 5707 02:00:49.620285  <6>[    0.113050] Detected VIPT I-cache on CPU1

 5708 02:00:49.626685  <4>[    0.113096] cacheinfo: Unable to detect cache hierarchy for CPU 1

 5709 02:00:49.633403  <6>[    0.113105] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000

 5710 02:00:49.640036  <6>[    0.113136] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]

 5711 02:00:49.643366  <6>[    0.113618] Detected VIPT I-cache on CPU2

 5712 02:00:49.650042  <4>[    0.113652] cacheinfo: Unable to detect cache hierarchy for CPU 2

 5713 02:00:49.657043  <6>[    0.113657] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000

 5714 02:00:49.663389  <6>[    0.113669] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]

 5715 02:00:49.666868  <6>[    0.114115] Detected VIPT I-cache on CPU3

 5716 02:00:49.673571  <4>[    0.114145] cacheinfo: Unable to detect cache hierarchy for CPU 3

 5717 02:00:49.683178  <6>[    0.114149] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000

 5718 02:00:49.690089  <6>[    0.114160] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]

 5719 02:00:49.693300  <6>[    0.114736] CPU features: detected: Spectre-v2

 5720 02:00:49.696715  <6>[    0.114746] CPU features: detected: Spectre-BHB

 5721 02:00:49.703405  <6>[    0.114750] CPU features: detected: ARM erratum 858921

 5722 02:00:49.706433  <6>[    0.114755] Detected VIPT I-cache on CPU4

 5723 02:00:49.712872  <4>[    0.114804] cacheinfo: Unable to detect cache hierarchy for CPU 4

 5724 02:00:49.719797  <6>[    0.114812] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000

 5725 02:00:49.726217  <6>[    0.114820] arch_timer: Enabling local workaround for ARM erratum 858921

 5726 02:00:49.732784  <6>[    0.114830] arch_timer: CPU4: Trapping CNTVCT access

 5727 02:00:49.739551  <6>[    0.114838] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]

 5728 02:00:49.742895  <6>[    0.115322] Detected VIPT I-cache on CPU5

 5729 02:00:49.749950  <4>[    0.115362] cacheinfo: Unable to detect cache hierarchy for CPU 5

 5730 02:00:49.756200  <6>[    0.115368] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000

 5731 02:00:49.763258  <6>[    0.115375] arch_timer: Enabling local workaround for ARM erratum 858921

 5732 02:00:49.769777  <6>[    0.115381] arch_timer: CPU5: Trapping CNTVCT access

 5733 02:00:49.776572  <6>[    0.115386] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]

 5734 02:00:49.779705  <6>[    0.115822] Detected VIPT I-cache on CPU6

 5735 02:00:49.786547  <4>[    0.115869] cacheinfo: Unable to detect cache hierarchy for CPU 6

 5736 02:00:49.793010  <6>[    0.115875] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000

 5737 02:00:49.803293  <6>[    0.115882] arch_timer: Enabling local workaround for ARM erratum 858921

 5738 02:00:49.806611  <6>[    0.115888] arch_timer: CPU6: Trapping CNTVCT access

 5739 02:00:49.812953  <6>[    0.115893] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]

 5740 02:00:49.816347  <6>[    0.116423] Detected VIPT I-cache on CPU7

 5741 02:00:49.822701  <4>[    0.116467] cacheinfo: Unable to detect cache hierarchy for CPU 7

 5742 02:00:49.832776  <6>[    0.116473] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000

 5743 02:00:49.839568  <6>[    0.116480] arch_timer: Enabling local workaround for ARM erratum 858921

 5744 02:00:49.842437  <6>[    0.116486] arch_timer: CPU7: Trapping CNTVCT access

 5745 02:00:49.849347  <6>[    0.116492] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]

 5746 02:00:49.855442  <6>[    0.116539] smp: Brought up 1 node, 8 CPUs

 5747 02:00:49.859278  <6>[    0.355451] SMP: Total of 8 processors activated.

 5748 02:00:49.865851  <6>[    0.360386] CPU features: detected: 32-bit EL0 Support

 5749 02:00:49.869405  <6>[    0.365766] CPU features: detected: 32-bit EL1 Support

 5750 02:00:49.875432  <6>[    0.371134] CPU features: detected: CRC32 instructions

 5751 02:00:49.878952  <6>[    0.376559] CPU: All CPU(s) started at EL2

 5752 02:00:49.885545  <6>[    0.380897] alternatives: applying system-wide alternatives

 5753 02:00:49.892542  <6>[    0.388998] devtmpfs: initialized

 5754 02:00:49.905164  <6>[    0.397959] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns

 5755 02:00:49.914942  <6>[    0.407908] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)

 5756 02:00:49.918250  <6>[    0.415637] pinctrl core: initialized pinctrl subsystem

 5757 02:00:49.926467  <6>[    0.422733] DMI not present or invalid.

 5758 02:00:49.933120  <6>[    0.427103] NET: Registered PF_NETLINK/PF_ROUTE protocol family

 5759 02:00:49.939988  <6>[    0.434012] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations

 5760 02:00:49.949992  <6>[    0.441542] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations

 5761 02:00:49.956147  <6>[    0.449793] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations

 5762 02:00:49.962864  <6>[    0.457972] audit: initializing netlink subsys (disabled)

 5763 02:00:49.969440  <5>[    0.463675] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1

 5764 02:00:49.975966  <6>[    0.464634] thermal_sys: Registered thermal governor 'step_wise'

 5765 02:00:49.982735  <6>[    0.471641] thermal_sys: Registered thermal governor 'power_allocator'

 5766 02:00:49.986251  <6>[    0.477938] cpuidle: using governor menu

 5767 02:00:49.992507  <6>[    0.488900] NET: Registered PF_QIPCRTR protocol family

 5768 02:00:49.999422  <6>[    0.494396] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.

 5769 02:00:50.005926  <6>[    0.501492] ASID allocator initialised with 32768 entries

 5770 02:00:50.012486  <6>[    0.508248] Serial: AMBA PL011 UART driver

 5771 02:00:50.022701  <4>[    0.518623] Trying to register duplicate clock ID: 113

 5772 02:00:50.082131  <6>[    0.574650] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5773 02:00:50.096212  <6>[    0.588955] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5774 02:00:50.099643  <6>[    0.598696] KASLR enabled

 5775 02:00:50.113874  <6>[    0.606724] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages

 5776 02:00:50.120812  <6>[    0.613726] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page

 5777 02:00:50.127355  <6>[    0.620204] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages

 5778 02:00:50.134103  <6>[    0.627194] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page

 5779 02:00:50.140344  <6>[    0.633667] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages

 5780 02:00:50.147194  <6>[    0.640657] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page

 5781 02:00:50.153721  <6>[    0.647131] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages

 5782 02:00:50.160831  <6>[    0.654121] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page

 5783 02:00:50.163594  <6>[    0.661687] ACPI: Interpreter disabled.

 5784 02:00:50.173497  <6>[    0.669644] iommu: Default domain type: Translated 

 5785 02:00:50.180133  <6>[    0.674752] iommu: DMA domain TLB invalidation policy: strict mode 

 5786 02:00:50.183561  <5>[    0.681383] SCSI subsystem initialized

 5787 02:00:50.189891  <6>[    0.685802] usbcore: registered new interface driver usbfs

 5788 02:00:50.196626  <6>[    0.691531] usbcore: registered new interface driver hub

 5789 02:00:50.200091  <6>[    0.697073] usbcore: registered new device driver usb

 5790 02:00:50.207123  <6>[    0.703370] pps_core: LinuxPPS API ver. 1 registered

 5791 02:00:50.217089  <6>[    0.708554] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>

 5792 02:00:50.220643  <6>[    0.717880] PTP clock support registered

 5793 02:00:50.223814  <6>[    0.722131] EDAC MC: Ver: 3.0.0

 5794 02:00:50.231827  <6>[    0.727768] FPGA manager framework

 5795 02:00:50.238515  <6>[    0.731451] Advanced Linux Sound Architecture Driver Initialized.

 5796 02:00:50.241639  <6>[    0.738206] vgaarb: loaded

 5797 02:00:50.244936  <6>[    0.741334] clocksource: Switched to clocksource arch_sys_counter

 5798 02:00:50.252276  <5>[    0.747764] VFS: Disk quotas dquot_6.6.0

 5799 02:00:50.258305  <6>[    0.751940] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)

 5800 02:00:50.261507  <6>[    0.759113] pnp: PnP ACPI: disabled

 5801 02:00:50.269803  <6>[    0.765980] NET: Registered PF_INET protocol family

 5802 02:00:50.276343  <6>[    0.771203] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)

 5803 02:00:50.288186  <6>[    0.781110] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)

 5804 02:00:50.298402  <6>[    0.789863] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)

 5805 02:00:50.304855  <6>[    0.797815] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)

 5806 02:00:50.311936  <6>[    0.806049] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)

 5807 02:00:50.318319  <6>[    0.814146] TCP: Hash tables configured (established 32768 bind 32768)

 5808 02:00:50.328370  <6>[    0.820974] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)

 5809 02:00:50.334831  <6>[    0.827948] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)

 5810 02:00:50.341578  <6>[    0.835429] NET: Registered PF_UNIX/PF_LOCAL protocol family

 5811 02:00:50.345069  <6>[    0.841558] RPC: Registered named UNIX socket transport module.

 5812 02:00:50.351488  <6>[    0.847702] RPC: Registered udp transport module.

 5813 02:00:50.354968  <6>[    0.852628] RPC: Registered tcp transport module.

 5814 02:00:50.361467  <6>[    0.857551] RPC: Registered tcp NFSv4.1 backchannel transport module.

 5815 02:00:50.368077  <6>[    0.864204] PCI: CLS 0 bytes, default 64

 5816 02:00:50.371098  <6>[    0.868486] Unpacking initramfs...

 5817 02:00:50.389044  <6>[    0.881913] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available

 5818 02:00:50.398758  <6>[    0.890652] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available

 5819 02:00:50.402535  <6>[    0.899578] kvm [1]: IPA Size Limit: 40 bits

 5820 02:00:50.409681  <6>[    0.905942] kvm [1]: vgic-v2@c420000

 5821 02:00:50.412759  <6>[    0.909775] kvm [1]: GIC system register CPU interface enabled

 5822 02:00:50.419649  <6>[    0.915965] kvm [1]: vgic interrupt IRQ18

 5823 02:00:50.423128  <6>[    0.920354] kvm [1]: Hyp mode initialized successfully

 5824 02:00:50.430803  <5>[    0.926751] Initialise system trusted keyrings

 5825 02:00:50.436996  <6>[    0.931617] workingset: timestamp_bits=42 max_order=20 bucket_order=0

 5826 02:00:50.445571  <6>[    0.941607] squashfs: version 4.0 (2009/01/31) Phillip Lougher

 5827 02:00:50.452359  <5>[    0.948061] NFS: Registering the id_resolver key type

 5828 02:00:50.455323  <5>[    0.953372] Key type id_resolver registered

 5829 02:00:50.462246  <5>[    0.957786] Key type id_legacy registered

 5830 02:00:50.468593  <6>[    0.962088] nfs4filelayout_init: NFSv4 File Layout Driver Registering...

 5831 02:00:50.475519  <6>[    0.969010] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...

 5832 02:00:50.482258  <6>[    0.976756] 9p: Installing v9fs 9p2000 file system support

 5833 02:00:50.509341  <5>[    1.005626] Key type asymmetric registered

 5834 02:00:50.512666  <5>[    1.009970] Asymmetric key parser 'x509' registered

 5835 02:00:50.522802  <6>[    1.015120] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)

 5836 02:00:50.525645  <6>[    1.022740] io scheduler mq-deadline registered

 5837 02:00:50.529293  <6>[    1.027498] io scheduler kyber registered

 5838 02:00:50.549133  <6>[    1.048215] EINJ: ACPI disabled.

 5839 02:00:50.559410  <4>[    1.051987] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17

 5840 02:00:50.596347  <6>[    1.092672] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled

 5841 02:00:50.605005  <6>[    1.101194] printk: console [ttyS0] disabled

 5842 02:00:50.632730  <6>[    1.125841] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2

 5843 02:00:50.639441  <6>[    1.135323] printk: console [ttyS0] enabled

 5844 02:00:50.642739  <6>[    1.135323] printk: console [ttyS0] enabled

 5845 02:00:50.649621  <6>[    1.144242] printk: bootconsole [mtk8250] disabled

 5846 02:00:50.652818  <6>[    1.144242] printk: bootconsole [mtk8250] disabled

 5847 02:00:50.663044  <3>[    1.154772] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47

 5848 02:00:50.669529  <3>[    1.163158] mt6577-uart 11003000.serial: Error applying setting, reverse things back

 5849 02:00:50.698787  <6>[    1.191562] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2

 5850 02:00:50.705425  <6>[    1.201214] serial serial0: tty port ttyS1 registered

 5851 02:00:50.712057  <6>[    1.207801] SuperH (H)SCI(F) driver initialized

 5852 02:00:50.715829  <6>[    1.213272] msm_serial: driver initialized

 5853 02:00:50.730592  <6>[    1.223572] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000

 5854 02:00:50.740535  <6>[    1.232172] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000

 5855 02:00:50.747219  <6>[    1.240751] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000

 5856 02:00:50.757155  <6>[    1.249321] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000

 5857 02:00:50.764149  <6>[    1.257994] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000

 5858 02:00:50.773797  <6>[    1.266662] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000

 5859 02:00:50.783649  <6>[    1.275402] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000

 5860 02:00:50.790907  <6>[    1.284146] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000

 5861 02:00:50.800483  <6>[    1.292728] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000

 5862 02:00:50.810248  <6>[    1.301536] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000

 5863 02:00:50.818156  <4>[    1.313938] cacheinfo: Unable to detect cache hierarchy for CPU 0

 5864 02:00:50.826857  <6>[    1.323282] loop: module loaded

 5865 02:00:50.838801  <6>[    1.335230] vsim1: Bringing 1800000uV into 2700000-2700000uV

 5866 02:00:50.857034  <6>[    1.353215] megasas: 07.719.03.00-rc1

 5867 02:00:50.865855  <6>[    1.361966] spi-nor spi1.0: w25q64dw (8192 Kbytes)

 5868 02:00:50.880530  <6>[    1.376719] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2

 5869 02:00:50.897288  <6>[    1.393487] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)

 5870 02:00:50.954474  <6>[    1.443648] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d

 5871 02:00:50.993859  <6>[    1.490297] Freeing initrd memory: 18296K

 5872 02:00:51.009368  <4>[    1.502129] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'

 5873 02:00:51.015850  <4>[    1.511363] CPU: 5 PID: 1 Comm: swapper/0 Not tainted 6.1.94-cip23 #1

 5874 02:00:51.022941  <4>[    1.518061] Hardware name: Google juniper sku16 board (DT)

 5875 02:00:51.025875  <4>[    1.523800] Call trace:

 5876 02:00:51.029562  <4>[    1.526501]  dump_backtrace.part.0+0xe0/0xf0

 5877 02:00:51.032930  <4>[    1.531037]  show_stack+0x18/0x30

 5878 02:00:51.036376  <4>[    1.534610]  dump_stack_lvl+0x68/0x84

 5879 02:00:51.039918  <4>[    1.538531]  dump_stack+0x18/0x34

 5880 02:00:51.046169  <4>[    1.542102]  sysfs_warn_dup+0x64/0x80

 5881 02:00:51.049708  <4>[    1.546024]  sysfs_do_create_link_sd+0xf0/0x100

 5882 02:00:51.052635  <4>[    1.550809]  sysfs_create_link+0x20/0x40

 5883 02:00:51.056110  <4>[    1.554985]  bus_add_device+0x68/0x10c

 5884 02:00:51.063078  <4>[    1.558992]  device_add+0x364/0x7cc

 5885 02:00:51.065955  <4>[    1.562734]  of_device_add+0x44/0x60

 5886 02:00:51.069243  <4>[    1.566568]  of_platform_device_create_pdata+0x90/0x120

 5887 02:00:51.075977  <4>[    1.572050]  of_platform_bus_create+0x170/0x370

 5888 02:00:51.079526  <4>[    1.576834]  of_platform_populate+0x50/0xfc

 5889 02:00:51.085784  <4>[    1.581271]  parse_mtd_partitions+0x1dc/0x510

 5890 02:00:51.089330  <4>[    1.585885]  mtd_device_parse_register+0xf0/0x2e4

 5891 02:00:51.092522  <4>[    1.590843]  spi_nor_probe+0x21c/0x2f0

 5892 02:00:51.096285  <4>[    1.594850]  spi_mem_probe+0x6c/0xb0

 5893 02:00:51.102827  <4>[    1.598682]  spi_probe+0x84/0xe4

 5894 02:00:51.106346  <4>[    1.602164]  really_probe+0xbc/0x2e0

 5895 02:00:51.109170  <4>[    1.605994]  __driver_probe_device+0x78/0x11c

 5896 02:00:51.112703  <4>[    1.610606]  driver_probe_device+0xd8/0x160

 5897 02:00:51.119110  <4>[    1.615044]  __device_attach_driver+0xb8/0x134

 5898 02:00:51.122640  <4>[    1.619742]  bus_for_each_drv+0x78/0xd0

 5899 02:00:51.126023  <4>[    1.623833]  __device_attach+0xa8/0x1c0

 5900 02:00:51.132864  <4>[    1.627923]  device_initial_probe+0x14/0x20

 5901 02:00:51.135842  <4>[    1.632361]  bus_probe_device+0x9c/0xa4

 5902 02:00:51.139586  <4>[    1.636452]  device_add+0x3d0/0x7cc

 5903 02:00:51.143072  <4>[    1.640194]  __spi_add_device+0x78/0x120

 5904 02:00:51.146238  <4>[    1.644372]  spi_add_device+0x40/0x7c

 5905 02:00:51.153175  <4>[    1.648289]  spi_register_controller+0x610/0xad0

 5906 02:00:51.156001  <4>[    1.653162]  devm_spi_register_controller+0x4c/0xa4

 5907 02:00:51.159737  <4>[    1.658295]  mtk_spi_probe+0x3f8/0x650

 5908 02:00:51.166303  <4>[    1.662300]  platform_probe+0x68/0xe0

 5909 02:00:51.169733  <4>[    1.666218]  really_probe+0xbc/0x2e0

 5910 02:00:51.172717  <4>[    1.670048]  __driver_probe_device+0x78/0x11c

 5911 02:00:51.179656  <4>[    1.674659]  driver_probe_device+0xd8/0x160

 5912 02:00:51.183174  <4>[    1.679097]  __driver_attach+0x94/0x19c

 5913 02:00:51.186215  <4>[    1.683188]  bus_for_each_dev+0x70/0xd0

 5914 02:00:51.189354  <4>[    1.687278]  driver_attach+0x24/0x30

 5915 02:00:51.192784  <4>[    1.691108]  bus_add_driver+0x154/0x20c

 5916 02:00:51.199878  <4>[    1.695198]  driver_register+0x78/0x130

 5917 02:00:51.203203  <4>[    1.699289]  __platform_driver_register+0x28/0x34

 5918 02:00:51.206281  <4>[    1.704249]  mtk_spi_driver_init+0x1c/0x28

 5919 02:00:51.213106  <4>[    1.708602]  do_one_initcall+0x50/0x1d0

 5920 02:00:51.216624  <4>[    1.712692]  kernel_init_freeable+0x21c/0x288

 5921 02:00:51.219365  <4>[    1.717305]  kernel_init+0x24/0x12c

 5922 02:00:51.222902  <4>[    1.721050]  ret_from_fork+0x10/0x20

 5923 02:00:51.234401  <6>[    1.729952] tun: Universal TUN/TAP device driver, 1.6

 5924 02:00:51.237380  <6>[    1.736234] thunder_xcv, ver 1.0

 5925 02:00:51.240326  <6>[    1.739750] thunder_bgx, ver 1.0

 5926 02:00:51.243809  <6>[    1.743259] nicpf, ver 1.0

 5927 02:00:51.254984  <6>[    1.747624] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version

 5928 02:00:51.258329  <6>[    1.755108] hns3: Copyright (c) 2017 Huawei Corporation.

 5929 02:00:51.264595  <6>[    1.760718] hclge is initializing

 5930 02:00:51.268346  <6>[    1.764306] e1000: Intel(R) PRO/1000 Network Driver

 5931 02:00:51.275061  <6>[    1.769441] e1000: Copyright (c) 1999-2006 Intel Corporation.

 5932 02:00:51.278036  <6>[    1.775462] e1000e: Intel(R) PRO/1000 Network Driver

 5933 02:00:51.284962  <6>[    1.780683] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.

 5934 02:00:51.291219  <6>[    1.786877] igb: Intel(R) Gigabit Ethernet Network Driver

 5935 02:00:51.298089  <6>[    1.792532] igb: Copyright (c) 2007-2014 Intel Corporation.

 5936 02:00:51.304588  <6>[    1.798375] igbvf: Intel(R) Gigabit Virtual Function Network Driver

 5937 02:00:51.311272  <6>[    1.804898] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.

 5938 02:00:51.314836  <6>[    1.811453] sky2: driver version 1.30

 5939 02:00:51.321755  <6>[    1.816701] usbcore: registered new device driver r8152-cfgselector

 5940 02:00:51.328013  <6>[    1.823243] usbcore: registered new interface driver r8152

 5941 02:00:51.335073  <6>[    1.829076] VFIO - User Level meta-driver version: 0.3

 5942 02:00:51.341190  <6>[    1.836866] mtu3 11201000.usb: uwk - reg:0x420, version:101

 5943 02:00:51.347961  <4>[    1.842744] mtu3 11201000.usb: supply vbus not found, using dummy regulator

 5944 02:00:51.354575  <6>[    1.850022] mtu3 11201000.usb: dr_mode: 1, drd: auto

 5945 02:00:51.361226  <6>[    1.855248] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0

 5946 02:00:51.364651  <6>[    1.861439] mtu3 11201000.usb: usb3-drd: 0

 5947 02:00:51.371406  <6>[    1.867018] mtu3 11201000.usb: xHCI platform device register success...

 5948 02:00:51.382728  <4>[    1.875698] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator

 5949 02:00:51.389507  <6>[    1.883623] xhci-mtk 11200000.usb: xHCI Host Controller

 5950 02:00:51.396491  <6>[    1.889128] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1

 5951 02:00:51.402843  <6>[    1.896849] xhci-mtk 11200000.usb: USB3 root hub has no ports

 5952 02:00:51.409398  <6>[    1.902874] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010

 5953 02:00:51.415976  <6>[    1.912298] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000

 5954 02:00:51.422858  <6>[    1.918375] xhci-mtk 11200000.usb: xHCI Host Controller

 5955 02:00:51.429798  <6>[    1.923863] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2

 5956 02:00:51.436795  <6>[    1.931521] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed

 5957 02:00:51.439527  <6>[    1.938333] hub 1-0:1.0: USB hub found

 5958 02:00:51.446114  <6>[    1.942361] hub 1-0:1.0: 1 port detected

 5959 02:00:51.456304  <6>[    1.947715] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.

 5960 02:00:51.459456  <6>[    1.956349] hub 2-0:1.0: USB hub found

 5961 02:00:51.466242  <3>[    1.960402] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)

 5962 02:00:51.473253  <6>[    1.968299] usbcore: registered new interface driver usb-storage

 5963 02:00:51.479591  <6>[    1.974915] usbcore: registered new device driver onboard-usb-hub

 5964 02:00:51.492511  <4>[    1.985448] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator

 5965 02:00:51.501515  <6>[    1.997685] mt6397-rtc mt6358-rtc: registered as rtc0

 5966 02:00:51.511851  <6>[    2.003165] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-21T02:00:51 UTC (1718935251)

 5967 02:00:51.514887  <6>[    2.013046] i2c_dev: i2c /dev entries driver

 5968 02:00:51.526658  <6>[    2.019471] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5969 02:00:51.536752  <6>[    2.027815] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5970 02:00:51.540243  <6>[    2.036723] i2c 4-0058: Fixed dependency cycle(s) with /panel

 5971 02:00:51.549944  <6>[    2.042754] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000

 5972 02:00:51.566206  <6>[    2.062307] cpu cpu0: EM: created perf domain

 5973 02:00:51.576296  <6>[    2.067819] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz

 5974 02:00:51.582719  <6>[    2.079106] cpu cpu4: EM: created perf domain

 5975 02:00:51.589940  <6>[    2.086197] sdhci: Secure Digital Host Controller Interface driver

 5976 02:00:51.596602  <6>[    2.092653] sdhci: Copyright(c) Pierre Ossman

 5977 02:00:51.603644  <6>[    2.098076] Synopsys Designware Multimedia Card Interface Driver

 5978 02:00:51.610054  <6>[    2.098616] mtk-msdc 11240000.mmc: allocated mmc-pwrseq

 5979 02:00:51.613634  <6>[    2.105140] sdhci-pltfm: SDHCI platform and OF driver helper

 5980 02:00:51.622369  <6>[    2.118559] ledtrig-cpu: registered to indicate activity on CPUs

 5981 02:00:51.630264  <6>[    2.126366] usbcore: registered new interface driver usbhid

 5982 02:00:51.633363  <6>[    2.132213] usbhid: USB HID core driver

 5983 02:00:51.645054  <6>[    2.136492] spi_master spi2: will run message pump with realtime priority

 5984 02:00:51.648740  <4>[    2.136510] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator

 5985 02:00:51.656133  <4>[    2.150783] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator

 5986 02:00:51.669551  <6>[    2.156428] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0

 5987 02:00:51.687822  <6>[    2.174105] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1

 5988 02:00:51.694895  <4>[    2.183837] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)

 5989 02:00:51.701472  <6>[    2.195360] cros-ec-spi spi2.0: Chrome EC device registered

 5990 02:00:51.708434  <4>[    2.202814] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)

 5991 02:00:51.721941  <4>[    2.214751] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)

 5992 02:00:51.728620  <4>[    2.223727] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)

 5993 02:00:51.740729  <6>[    2.233621] mmc1: new ultra high speed SDR104 SDIO card at address 0001

 5994 02:00:51.769213  <6>[    2.265252] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14

 5995 02:00:51.776539  <6>[    2.272746] mmc0: new HS400 MMC card at address 0001

 5996 02:00:51.783991  <6>[    2.279802] mmcblk0: mmc0:0001 TB2932 29.2 GiB 

 5997 02:00:51.797580  <6>[    2.293852]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12

 5998 02:00:51.813254  <6>[    2.302033] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2

 5999 02:00:51.819022  <6>[    2.302738] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB 

 6000 02:00:51.825768  <6>[    2.304040] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound

 6001 02:00:51.839672  <6>[    2.307577] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6002 02:00:51.842568  <6>[    2.308778] NET: Registered PF_PACKET protocol family

 6003 02:00:51.848998  <6>[    2.308886] 9pnet: Installing 9P2000 support

 6004 02:00:51.852345  <5>[    2.308929] Key type dns_resolver registered

 6005 02:00:51.855993  <6>[    2.309317] registered taskstats version 1

 6006 02:00:51.862377  <5>[    2.309359] Loading compiled-in X.509 certificates

 6007 02:00:51.873358  <6>[    2.314413] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c

 6008 02:00:51.876340  <6>[    2.321027] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB 

 6009 02:00:51.886184  <3>[    2.346348] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517

 6010 02:00:51.892736  <6>[    2.350333] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)

 6011 02:00:51.899748  <6>[    2.361492] usb 1-1: new high-speed USB device number 2 using xhci-mtk

 6012 02:00:51.909540  <6>[    2.367535] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6013 02:00:51.921922  <6>[    2.414606] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)

 6014 02:00:51.932285  <6>[    2.423183] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)

 6015 02:00:51.938785  <6>[    2.431704] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)

 6016 02:00:51.948904  <6>[    2.440222] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)

 6017 02:00:51.954933  <6>[    2.448741] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)

 6018 02:00:51.964889  <6>[    2.457259] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)

 6019 02:00:51.971507  <6>[    2.465776] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)

 6020 02:00:51.978623  <6>[    2.475017] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0

 6021 02:00:51.986207  <6>[    2.482532] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0

 6022 02:00:51.993779  <6>[    2.489865] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0

 6023 02:00:52.004464  <6>[    2.497146] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0

 6024 02:00:52.010777  <6>[    2.504630] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0

 6025 02:00:52.017987  <6>[    2.512989] panfrost 13040000.gpu: clock rate = 511999970

 6026 02:00:52.027295  <6>[    2.518694] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet

 6027 02:00:52.030640  <6>[    2.525112] hub 1-1:1.0: USB hub found

 6028 02:00:52.041035  <6>[    2.528772] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0

 6029 02:00:52.044301  <6>[    2.532851] hub 1-1:1.0: 3 ports detected

 6030 02:00:52.050868  <6>[    2.540256] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400

 6031 02:00:52.063619  <6>[    2.552963] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7

 6032 02:00:52.070538  <6>[    2.565040] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1

 6033 02:00:52.082170  <6>[    2.575193] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0

 6034 02:00:52.092633  <6>[    2.583998] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)

 6035 02:00:52.102171  <6>[    2.593149] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)

 6036 02:00:52.108776  <6>[    2.602277] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)

 6037 02:00:52.118973  <6>[    2.611405] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)

 6038 02:00:52.129107  <6>[    2.620704] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)

 6039 02:00:52.138857  <6>[    2.630006] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)

 6040 02:00:52.148558  <6>[    2.639482] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)

 6041 02:00:52.155496  <6>[    2.648958] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)

 6042 02:00:52.165587  <6>[    2.658084] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)

 6043 02:00:52.240489  <6>[    2.733221] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)

 6044 02:00:52.250242  <6>[    2.742157] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing

 6045 02:00:52.261233  <6>[    2.754434] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1

 6046 02:00:52.352465  <6>[    2.845502] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk

 6047 02:00:52.963016  <6>[    3.033630] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk

 6048 02:00:52.972727  <4>[    3.150549] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2

 6049 02:00:52.979557  <4>[    3.150567] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)

 6050 02:00:52.985955  <6>[    3.199525] r8152 1-1.2:1.0 eth0: v1.12.13

 6051 02:00:52.992608  <6>[    3.277371] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk

 6052 02:00:52.999538  <6>[    3.438999] Console: switching to colour frame buffer device 170x48

 6053 02:00:53.005894  <6>[    3.499659] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device

 6054 02:00:53.025905  <6>[    3.515664] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6055 02:00:53.043056  <6>[    3.532759] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6056 02:00:53.053223  <6>[    3.546082] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4

 6057 02:00:53.059706  <6>[    3.554340] input: volume-buttons as /devices/platform/volume-buttons/input/input5

 6058 02:00:53.073179  <6>[    3.558338] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6059 02:00:53.087839  <6>[    3.577202] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6060 02:00:54.294184  <6>[    4.790260] r8152 1-1.2:1.0 eth0: carrier on

 6061 02:00:57.189184  <5>[    4.813358] Sending DHCP requests .., OK

 6062 02:00:57.196069  <6>[    7.689738] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23

 6063 02:00:57.199602  <6>[    7.698227] IP-Config: Complete:

 6064 02:00:57.212409  <6>[    7.701793]      device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1

 6065 02:00:57.222606  <6>[    7.712695]      host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)

 6066 02:00:57.234449  <6>[    7.727011]      bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=

 6067 02:00:57.242936  <6>[    7.727022]      nameserver0=192.168.201.1

 6068 02:00:57.250610  <6>[    7.746876] clk: Disabling unused clocks

 6069 02:00:57.255664  <6>[    7.754825] ALSA device list:

 6070 02:00:57.265102  <6>[    7.760867]   No soundcards found.

 6071 02:00:57.273738  <6>[    7.769946] Freeing unused kernel memory: 8512K

 6072 02:00:57.281110  <6>[    7.777091] Run /init as init process

 6073 02:00:57.293041  Loading, please wait...

 6074 02:00:57.324144  Starting systemd-udevd version 252.22-1~deb12u1


 6075 02:00:57.650333  <3>[    8.146400] thermal_sys: Failed to find 'trips' node

 6076 02:00:57.660913  <3>[    8.153602] thermal_sys: Failed to find trip points for thermal-sensor1 id=0

 6077 02:00:57.670786  <3>[    8.163233] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22

 6078 02:00:57.674269  <3>[    8.165249] mtk-scp 10500000.scp: invalid resource

 6079 02:00:57.684156  <4>[    8.171702] generic-adc-thermal: probe of thermal-sensor1 failed with error -22

 6080 02:00:57.690962  <4>[    8.176266] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator

 6081 02:00:57.697447  <6>[    8.176845] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000

 6082 02:00:57.704486  <4>[    8.181451] elants_i2c 0-0010: supply vccio not found, using dummy regulator

 6083 02:00:57.714223  <3>[    8.184475] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015

 6084 02:00:57.724389  <6>[    8.194126] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)

 6085 02:00:57.727680  <6>[    8.194233] remoteproc remoteproc0: scp is available

 6086 02:00:57.737512  <4>[    8.194765] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2

 6087 02:00:57.744047  <6>[    8.194772] remoteproc remoteproc0: powering up scp

 6088 02:00:57.751085  <4>[    8.194793] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2

 6089 02:00:57.757662  <3>[    8.194797] remoteproc remoteproc0: request_firmware failed: -2

 6090 02:00:57.764292  <3>[    8.195268] thermal_sys: Failed to find 'trips' node

 6091 02:00:57.774944  <3>[    8.195273] thermal_sys: Failed to find trip points for thermal-sensor2 id=0

 6092 02:00:57.781243  <3>[    8.195280] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22

 6093 02:00:57.787928  <4>[    8.195284] generic-adc-thermal: probe of thermal-sensor2 failed with error -22

 6094 02:00:57.795005  <6>[    8.198713] Bluetooth: Core ver 2.22

 6095 02:00:57.798710  <6>[    8.198835] NET: Registered PF_BLUETOOTH protocol family

 6096 02:00:57.805279  <6>[    8.198838] Bluetooth: HCI device and connection manager initialized

 6097 02:00:57.812106  <6>[    8.198854] Bluetooth: HCI socket layer initialized

 6098 02:00:57.815467  <6>[    8.198860] Bluetooth: L2CAP socket layer initialized

 6099 02:00:57.822195  <6>[    8.198871] Bluetooth: SCO socket layer initialized

 6100 02:00:57.828529  <3>[    8.199405] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22

 6101 02:00:57.842176  <6>[    8.202356] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6102 02:00:57.845084  <3>[    8.206123] thermal_sys: Failed to find 'trips' node

 6103 02:00:57.855079  <3>[    8.206133] thermal_sys: Failed to find trip points for thermal-sensor1 id=0

 6104 02:00:57.861709  <3>[    8.206142] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22

 6105 02:00:57.872112  <4>[    8.206146] generic-adc-thermal: probe of thermal-sensor1 failed with error -22

 6106 02:00:57.882194  <4>[    8.210197] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW

 6107 02:00:57.895085  <3>[    8.216831] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7  on device pinctrl_paris

 6108 02:00:57.901813  <6>[    8.224933] mc: Linux media interface: v0.10

 6109 02:00:57.911792  <6>[    8.225440] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20

 6110 02:00:57.921585  <6>[    8.228649] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6111 02:00:57.928532  <3>[    8.230009] elan_i2c 2-0015: Error applying setting, reverse things back

 6112 02:00:57.938093  <3>[    8.230060] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6113 02:00:57.944813  <3>[    8.230075] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6114 02:00:57.954742  <3>[    8.230080] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6115 02:00:57.961501  <5>[    8.239637] cfg80211: Loading compiled-in X.509 certificates for regulatory database

 6116 02:00:57.971365  <3>[    8.244698] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6117 02:00:57.984509  <3>[    8.244979] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!

 6118 02:00:57.991142  <5>[    8.266237] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'

 6119 02:00:57.997891  <3>[    8.267544] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6120 02:00:58.007755  <5>[    8.275262] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'

 6121 02:00:58.014273  <6>[    8.277840] videodev: Linux video capture interface: v2.00

 6122 02:00:58.021506  <6>[    8.279290]  cs_system_cfg: CoreSight Configuration manager initialised

 6123 02:00:58.027443  <6>[    8.281885] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered

 6124 02:00:58.037590  <3>[    8.283160] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6125 02:00:58.047647  Begin: Loading essential drivers<4>[    8.290758] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2

 6126 02:00:58.051027   ... done.

 6127 02:00:58.061586  Begin: Running /scri<3>[    8.294558] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6128 02:00:58.061669  pts/init-premount ... done.

 6129 02:00:58.068093  Beg<6>[    8.300171] cfg80211: failed to load regulatory.db

 6130 02:00:58.077953  in: Mounting root file system ..<3>[    8.306750] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6131 02:00:58.091474  . Begin: Running /scripts/nfs-to<6>[    8.333151] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7

 6132 02:00:58.091647  p ... done.

 6133 02:00:58.101659  Begin: Running /scr<3>[    8.342148] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6134 02:00:58.111291  ipts/nfs-premount ... Waiting up<6>[    8.367337] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized

 6135 02:00:58.121261   to 60 secs for any ethernet to <6>[    8.397459] Bluetooth: HCI UART driver ver 2.3

 6136 02:00:58.121374  become available

 6137 02:00:58.131492  Device /sys/cl<6>[    8.401703] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized

 6138 02:00:58.131575  ass/net/eth0 found

 6139 02:00:58.134456  done.

 6140 02:00:58.141264  Begin<6>[    8.402272] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0

 6141 02:00:58.151642  : Waiting up to 180 secs for any<6>[    8.402274] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)

 6142 02:00:58.157876   network device to become availa<6>[    8.402371] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0

 6143 02:00:58.161130  ble ... done.

 6144 02:00:58.167849  <6>[    8.402792] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)

 6145 02:00:58.178909  <6>[    8.402945] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1

 6146 02:00:58.182644  <6>[    8.411544] Bluetooth: HCI UART protocol H4 registered

 6147 02:00:58.193863  <6>[    8.422670] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized

 6148 02:00:58.207210  <3>[    8.422770] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'

 6149 02:00:58.219479  <3>[    8.423416] debugfs: File 'Playback' in directory 'dapm' already present!

 6150 02:00:58.230949  <3>[    8.423420] debugfs: File 'Capture' in directory 'dapm' already present!

 6151 02:00:58.244392  <6>[    8.424628] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6

 6152 02:00:58.250848  <6>[    8.429541] Bluetooth: HCI UART protocol LL registered

 6153 02:00:58.262123  <6>[    8.438346] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized

 6154 02:00:58.268837  <6>[    8.446572] Bluetooth: HCI UART protocol Three-wire (H5) registered

 6155 02:00:58.280006  <6>[    8.455145] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized

 6156 02:00:58.293494  <6>[    8.462798] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8

 6157 02:00:58.300016  <6>[    8.463345] usbcore: registered new interface driver uvcvideo

 6158 02:00:58.307812  <6>[    8.463383] Bluetooth: HCI UART protocol Broadcom registered

 6159 02:00:58.315466  <6>[    8.463408] Bluetooth: HCI UART protocol QCA registered

 6160 02:00:58.322305  <6>[    8.463421] Bluetooth: HCI UART protocol Marvell registered

 6161 02:00:58.330422  <6>[    8.464422] Bluetooth: hci0: setting up ROME/QCA6390

 6162 02:00:58.340334  <6>[    8.471805] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized

 6163 02:00:58.350689  <6>[    8.498750] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000

 6164 02:00:58.357962  <6>[    8.500233] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized

 6165 02:00:58.367950  <6>[    8.508452] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0

 6166 02:00:58.378462  <6>[    8.514303] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized

 6167 02:00:58.391715  <6>[    8.521406] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77

 6168 02:00:58.398315  <3>[    8.676453] Bluetooth: hci0: Frame reassembly failed (-84)

 6169 02:00:58.409114  <4>[    8.694840] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.

 6170 02:00:58.416094  <4>[    8.694840] Fallback method does not support PEC.

 6171 02:00:58.423038  <6>[    8.844392] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91

 6172 02:00:58.434376  <3>[    8.856446] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6173 02:00:58.477744  <6>[    8.973797] Bluetooth: hci0: QCA Product ID   :0x00000008

 6174 02:00:58.488833  IP-Config: eth0 hardware address 00:e0:4c:71:a7:1f mtu 1500 DHCP

 6175 02:00:58.537970  IP-Config: eth0 complete (dhcp from 192.168.201.1):

 6176 02:00:58.544324   address: 1<6>[    9.039327] Bluetooth: hci0: QCA SOC Version  :0x00000044

 6177 02:00:58.554561  92.168.201.23   broadcast: 192.1<6>[    9.048397] Bluetooth: hci0: QCA ROM Version  :0x00000302

 6178 02:00:58.564331  68.201.255  netm<3>[    9.048520] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6179 02:00:58.571233  ask: 255.255.255<6>[    9.055528] Bluetooth: hci0: QCA Patch Version:0x00000111

 6180 02:00:58.571315  .0   

 6181 02:00:58.584411   gateway: 192.168.201.1    dns0     : 192.168.201.1    dns1   : 0.0.0.0  <6>[    9.077682] Bluetooth: hci0: QCA controller version 0x00440302

 6182 02:00:58.584526         

 6183 02:00:58.594883   host   : mt8183-kukui-jacuzzi-juniper-<6>[    9.087856] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin

 6184 02:00:58.597922  sku16-cbg-3                        

 6185 02:00:58.607404   domain : l<4>[    9.098840] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2

 6186 02:00:58.617543  ava-rack        <3>[    9.110489] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)

 6187 02:00:58.624738                  <3>[    9.120098] Bluetooth: hci0: QCA Failed to download patch (-2)

 6188 02:00:58.627390                                 

 6189 02:00:58.630931   rootserver: 192.168.201.1 rootpath: 

 6190 02:00:58.634271   filename  : 

 6191 02:00:58.713873  done.

 6192 02:00:58.722049  Begin: Running /scripts/nfs-bottom ... done.

 6193 02:00:58.736727  Begin: Running /scripts/init-bottom ... done.

 6194 02:00:58.774398  <6>[    9.266672] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1

 6195 02:00:58.857276  <4>[    9.352603] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)

 6196 02:00:58.880990  <4>[    9.373781] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)

 6197 02:00:58.894702  <4>[    9.387388] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)

 6198 02:00:58.903937  <4>[    9.400031] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)

 6199 02:01:00.066519  <6>[   10.562637] NET: Registered PF_INET6 protocol family

 6200 02:01:00.079371  <6>[   10.575428] Segment Routing with IPv6

 6201 02:01:00.088130  <6>[   10.584053] In-situ OAM (IOAM) with IPv6

 6202 02:01:00.259956  <30>[   10.729116] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)

 6203 02:01:00.281173  <30>[   10.776826] systemd[1]: Detected architecture arm64.

 6204 02:01:00.292374  

 6205 02:01:00.296048  Welcome to Debian GNU/Linux 12 (bookworm)!

 6206 02:01:00.296674  


 6207 02:01:00.319019  <30>[   10.814485] systemd[1]: Hostname set to <debian-bookworm-arm64>.

 6208 02:01:01.361393  <30>[   11.853772] systemd[1]: Queued start job for default target graphical.target.

 6209 02:01:01.402409  <30>[   11.895033] systemd[1]: Created slice system-getty.slice - Slice /system/getty.

 6210 02:01:01.415776  [  OK  ] Created slice system-getty.slice - Slice /system/getty.


 6211 02:01:01.434910  <30>[   11.927594] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.

 6212 02:01:01.448401  [  OK  ] Created slice system-modpr…lice - Slice /system/modprobe.


 6213 02:01:01.467928  <30>[   11.959879] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.

 6214 02:01:01.481891  [  OK  ] Created slice system-seria… - Slice /system/serial-getty.


 6215 02:01:01.498641  <30>[   11.990963] systemd[1]: Created slice user.slice - User and Session Slice.

 6216 02:01:01.510798  [  OK  ] Created slice user.slice - User and Session Slice.


 6217 02:01:01.533241  <30>[   12.021935] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.

 6218 02:01:01.546197  [  OK  ] Started systemd-ask-passwo…quests to Console Directory Watch.


 6219 02:01:01.568899  <30>[   12.057759] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.

 6220 02:01:01.581762  [  OK  ] Started systemd-ask-passwo… Requests to Wall Directory Watch.


 6221 02:01:01.607482  <30>[   12.089719] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).

 6222 02:01:01.627996  <30>[   12.120149] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...

 6223 02:01:01.636964           Expecting device dev-ttyS0.device - /dev/ttyS0...


 6224 02:01:01.657458  <30>[   12.149706] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.

 6225 02:01:01.670927  [  OK  ] Reached target cryptsetup.…get - Local Encrypted Volumes.


 6226 02:01:01.689509  <30>[   12.181593] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.

 6227 02:01:01.703322  [  OK  ] Reached target integrityse…Local Integrity Protected Volumes.


 6228 02:01:01.717824  <30>[   12.213629] systemd[1]: Reached target paths.target - Path Units.

 6229 02:01:01.732705  [  OK  ] Reached target paths.target - Path Units.


 6230 02:01:01.748699  <30>[   12.241527] systemd[1]: Reached target remote-fs.target - Remote File Systems.

 6231 02:01:01.761570  [  OK  ] Reached target remote-fs.target - Remote File Systems.


 6232 02:01:01.774247  <30>[   12.269531] systemd[1]: Reached target slices.target - Slice Units.

 6233 02:01:01.788997  [  OK  ] Reached target slices.target - Slice Units.


 6234 02:01:01.802228  <30>[   12.297570] systemd[1]: Reached target swap.target - Swaps.

 6235 02:01:01.812725  [  OK  ] Reached target swap.target - Swaps.


 6236 02:01:01.833229  <30>[   12.325587] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.

 6237 02:01:01.846742  [  OK  ] Reached target veritysetup… - Local Verity Protected Volumes.


 6238 02:01:01.865548  <30>[   12.357952] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.

 6239 02:01:01.879600  [  OK  ] Listening on systemd-initc… initctl Compatibility Named Pipe.


 6240 02:01:01.900501  <30>[   12.392727] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.

 6241 02:01:01.911460  [  OK  ] Listening on systemd-journ…socket - Journal Audit Socket.


 6242 02:01:01.931223  <30>[   12.423363] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).

 6243 02:01:01.945437  [  OK  ] Listening on systemd-journ…t - Journal Socket (/dev/log).


 6244 02:01:01.961972  <30>[   12.454320] systemd[1]: Listening on systemd-journald.socket - Journal Socket.

 6245 02:01:01.974345  [  OK  ] Listening on systemd-journald.socket - Journal Socket.


 6246 02:01:01.995119  <30>[   12.487249] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.

 6247 02:01:02.008843  [  OK  ] Listening on systemd-netwo… - Network Service Netlink Socket.


 6248 02:01:02.028562  <30>[   12.520964] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.

 6249 02:01:02.041796  [  OK  ] Listening on systemd-udevd….socket - udev Control Socket.


 6250 02:01:02.061939  <30>[   12.554205] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.

 6251 02:01:02.075056  [  OK  ] Listening on systemd-udevd…l.socket - udev Kernel Socket.


 6252 02:01:02.114445  <30>[   12.606502] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...

 6253 02:01:02.124989           Mounting dev-hugepages.mount - Huge Pages File System...


 6254 02:01:02.146575  <30>[   12.638573] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...

 6255 02:01:02.158953           Mounting dev-mqueue.mount…POSIX Message Queue File System...


 6256 02:01:02.185677  <30>[   12.677982] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...

 6257 02:01:02.197894           Mounting sys-kernel-debug.… - Kernel Debug File System...


 6258 02:01:02.220659  <30>[   12.706396] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).

 6259 02:01:02.267037  <30>[   12.758823] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...

 6260 02:01:02.279587           Starting kmod-static-nodes…ate List of Static Device Nodes...


 6261 02:01:02.303438  <30>[   12.795814] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...

 6262 02:01:02.315016           Starting modprobe@configfs…m - Load Kernel Module configfs...


 6263 02:01:02.339102  <30>[   12.831182] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...

 6264 02:01:02.349960           Starting modprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...


 6265 02:01:02.368915  <30>[   12.861374] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...

 6266 02:01:02.383499           Starting modpr<6>[   12.874044] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com

 6267 02:01:02.387185  obe@drm.service - Load Kernel Module drm...


 6268 02:01:02.430172  <30>[   12.922606] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...

 6269 02:01:02.442791           Starting modprobe@efi_psto…- Load Kernel Module efi_pstore...


 6270 02:01:02.465662  <30>[   12.958232] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...

 6271 02:01:02.476613           Starting modprobe@fuse.ser…e - Load Kernel Module fuse...


 6272 02:01:02.496678  <30>[   12.988937] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...

 6273 02:01:02.503911           Startin<6>[   12.999970] fuse: init (API version 7.37)

 6274 02:01:02.510748  g modprobe@loop.ser…e - Load Kernel Module loop...


 6275 02:01:02.565997  <30>[   13.058297] systemd[1]: Starting systemd-journald.service - Journal Service...

 6276 02:01:02.577944           Starting systemd-journald.service - Journal Service...


 6277 02:01:02.602134  <30>[   13.094335] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...

 6278 02:01:02.613034           Starting systemd-modules-l…rvice - Load Kernel Modules...


 6279 02:01:02.637227  <30>[   13.125755] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...

 6280 02:01:02.648767           Starting systemd-network-g… units from Kernel command line...


 6281 02:01:02.694409  <30>[   13.186651] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...

 6282 02:01:02.708620           Starting systemd-remount-f…nt Root and Kernel File Systems...


 6283 02:01:02.730100  <30>[   13.222438] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...

 6284 02:01:02.742092           Starting systemd-udev-trig…[0m - Coldplug All udev Devices...


 6285 02:01:02.762916  <30>[   13.254885] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.

 6286 02:01:02.772895  [  OK  ] Mounted dev-hugepages.mount - Huge Pages File System.


 6287 02:01:02.794483  <30>[   13.286253] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.

 6288 02:01:02.801046  <3>[   13.287312] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6289 02:01:02.819339  [  OK  ] Mounted dev-mqueue.mount[…- POSIX Message Queue <3>[   13.311000] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6290 02:01:02.819856  File System.


 6291 02:01:02.838762  <30>[   13.330270] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.

 6292 02:01:02.845300  <3>[   13.330442] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6293 02:01:02.863856  [  OK  ] Mounted sys-kernel-debug.m…nt - Kernel Debug <3>[   13.354133] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6294 02:01:02.864318  File System.


 6295 02:01:02.879924  <3>[   13.372219] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6296 02:01:02.891050  <30>[   13.381612] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.

 6297 02:01:02.897418  <3>[   13.389448] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6298 02:01:02.917384  [  OK  ] Finished kmod-static-nodes…reate List of Static D<3>[   13.407843] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6299 02:01:02.917832  evice Nodes.


 6300 02:01:02.935208  <3>[   13.427201] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6301 02:01:02.946054  <30>[   13.437585] systemd[1]: modprobe@configfs.service: Deactivated successfully.

 6302 02:01:02.958266  <30>[   13.449311] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.

 6303 02:01:02.968404  [  OK  ] Finished modprobe@configfs…[0m - Load Kernel Module configfs.


 6304 02:01:02.986082  <30>[   13.478321] systemd[1]: Started systemd-journald.service - Journal Service.

 6305 02:01:02.997226  [  OK  ] Started systemd-journald.service - Journal Service.


 6306 02:01:03.022537  [  OK  ] Finished modprobe@dm_mod.s…e - Load Kernel Module dm_mod.


 6307 02:01:03.048022  [  OK  ] Finished modprobe@drm.service - Load Kernel Module drm.


 6308 02:01:03.072448  [  OK  ] Finished modprobe@efi_psto…m - Load Kernel Module efi_pstore.


 6309 02:01:03.096925  [  OK  ] Finished modprobe@fuse.service - Load Kernel Module fuse.


 6310 02:01:03.114500  [  OK  ] Finished modprobe@loop.service - Load Kernel Module loop.


 6311 02:01:03.134488  [  OK  ] Finished systemd-modules-l…service - Load Kernel Modules.


 6312 02:01:03.154290  [  OK  ] Finished systemd-network-g…rk units from Kernel command line.


 6313 02:01:03.173989  [  OK  ] Finished systemd-remount-f…ount Root and Kernel File Systems.


 6314 02:01:03.196352  [  OK  ] Reached target network-pre…get - Preparation for Network.


 6315 02:01:03.221026  <4>[   13.706412] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent

 6316 02:01:03.232335  <3>[   13.724124] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5

 6317 02:01:03.267690           Mounting sys-fs-fuse-conne… - FUSE Control File System...


 6318 02:01:03.296966           Mounting sys-kernel-config…ernel Configuration File System...


 6319 02:01:03.325078           Starting systemd-journal-f…h Journal to Persistent Storage...


 6320 02:01:03.371313           Starting systemd-random-se…ice - Load/Save Random Seed...


 6321 02:01:03.394489  <46>[   13.886571] systemd-journald[320]: Received client request to flush runtime journal.

 6322 02:01:03.417857           Starting systemd-sysctl.se…ce - Apply Kernel Variables...


 6323 02:01:03.440506           Starting systemd-sysusers.…rvice - Create System Users...


 6324 02:01:03.471689  [  OK  ] Finished systemd-udev-trig…e - Coldplug All udev Devices.


 6325 02:01:03.491172  [  OK  ] Mounted sys-fs-fuse-connec…nt - FUSE Control File System.


 6326 02:01:03.511063  [  OK  ] Mounted sys-kernel-config.… Kernel Configuration File System.


 6327 02:01:03.531875  [  OK  ] Finished systemd-random-se…rvice - Load/Save Random Seed.


 6328 02:01:03.551388  [  OK  ] Finished systemd-sysctl.service - Apply Kernel Variables.


 6329 02:01:04.529845  [  OK  ] Finished systemd-sysusers.service - Create System Users.


 6330 02:01:04.586705           Starting systemd-tmpfiles-…ate Static Device Nodes in /dev...


 6331 02:01:04.878250  [  OK  ] Finished systemd-journal-f…ush Journal to Persistent Storage.


 6332 02:01:04.983188  [  OK  ] Finished systemd-tmpfiles-…reate Static Device Nodes in /dev.


 6333 02:01:05.002623  [  OK  ] Reached target local-fs-pr…reparation for Local File Systems.


 6334 02:01:05.021887  [  OK  ] Reached target local-fs.target - Local File Systems.


 6335 02:01:05.070765           Starting systemd-tmpfiles-… Volatile Files and Directories...


 6336 02:01:05.096162           Starting systemd-udevd.ser…ger for Device Events and Files...


 6337 02:01:05.370021  [  OK  ] Started systemd-udevd.serv…nager for Device Events and Files.


 6338 02:01:05.425746           Starting systemd-networkd.…ice - Network Configuration...


 6339 02:01:05.442563  [  OK  ] Finished systemd-tmpfiles-…te Volatile Files and Directories.


 6340 02:01:05.491405  [  OK  ] Found device dev-ttyS0.device - /dev/ttyS0.


 6341 02:01:05.677808           Starting systemd-timesyncd… - Network Time Synchronization...


 6342 02:01:05.687348  <4>[   16.181017] power_supply_show_property: 4 callbacks suppressed

 6343 02:01:05.694332  <3>[   16.181027] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6344 02:01:05.704661  <3>[   16.181494] power_supply sbs-12-000b: driver failed to report `capacity_level' property: -6

 6345 02:01:05.714787  <3>[   16.192748] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6346 02:01:05.736113           Starting systemd-update-ut…rd System Boot/Shutdown in UTMP..<3>[   16.226828] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6347 02:01:05.736556  .


 6348 02:01:05.750953  <3>[   16.242457] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6349 02:01:05.767048  <3>[   16.258736] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6350 02:01:05.781810  <3>[   16.273478] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6351 02:01:05.796464  <3>[   16.288076] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6352 02:01:05.812017  <3>[   16.303478] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6353 02:01:05.826959  <3>[   16.318435] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6354 02:01:05.924026  [  OK  ] Created slice system-syste…- Slice /system/systemd-backlight.


 6355 02:01:05.941896  [  OK  ] Reached target bluetooth.target - Bluetooth Support.


 6356 02:01:05.961524  [  OK  ] Listening on systemd-rfkil…l Switch Status /dev/rfkill Watch.


 6357 02:01:06.010317           Starting systemd-backlight…ess of backlight:backlight_lcd0...


 6358 02:01:06.050223  [  OK  ] Finished systemd-update-ut…cord System Boot/Shutdown in UTMP.


 6359 02:01:06.118048  [  OK  ] Finished systemd-backlight…tness of backlight:backlight_lcd0.


 6360 02:01:06.138620  [  OK  ] Started systemd-timesyncd.…0m - Network Time Synchronization.


 6361 02:01:06.158442  [  OK  ] Started systemd-networkd.service - Network Configuration.


 6362 02:01:06.176022  [  OK  ] Reached target network.target - Network.


 6363 02:01:06.188198  [  OK  ] Reached target time-set.target - System Time Set.


 6364 02:01:06.233832           Starting modprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...


 6365 02:01:06.259635           Starting modprobe@efi_psto…- Load Kernel Module efi_pstore...


 6366 02:01:06.314229           Starting modprobe@loop.ser…e - Load Kernel Module loop...


 6367 02:01:06.343916           Starting systemd-rfkill.se…Load/Save RF Kill Switch Status...


 6368 02:01:06.368833  [  OK  ] Finished modprobe@dm_mod.s…e - Load Kernel Module dm_mod.


 6369 02:01:06.385737  [  OK  ] Started systemd-rfkill.ser…- Load/Save RF Kill Switch Status.


 6370 02:01:06.407289  [  OK  ] Finished modprobe@efi_psto…m - Load Kernel Module efi_pstore.


 6371 02:01:06.428595  [  OK  ] Finished modprobe@loop.service - Load Kernel Module loop.


 6372 02:01:06.447267  [  OK  ] Reached target sysinit.target - System Initialization.


 6373 02:01:06.492651  [  OK  ] Started apt-daily.timer - Daily apt download activities.


 6374 02:01:06.511523  [  OK  ] Started apt-daily-upgrade.… apt upgrade and clean activities.


 6375 02:01:06.529614  [  OK  ] Started dpkg-db-backup.tim… Daily dpkg database backup timer.


 6376 02:01:06.547755  [  OK  ] Started e2scrub_all.timer…etadata Check for All Filesystems.


 6377 02:01:06.568614  [  OK  ] Started fstrim.timer - Discard unused blocks once a week.


 6378 02:01:06.585768  [  OK  ] Started systemd-tmpfiles-c… Cleanup of Temporary Directories.


 6379 02:01:06.601075  [  OK  ] Reached target timers.target - Timer Units.


 6380 02:01:06.619650  [  OK  ] Listening on dbus.socket[…- D-Bus System Message Bus Socket.


 6381 02:01:06.637376  [  OK  ] Reached target sockets.target - Socket Units.


 6382 02:01:06.657405  [  OK  ] Reached target basic.target - Basic System.


 6383 02:01:06.698044           Starting alsa-restore.serv…- Save/Restore Sound Card State...


 6384 02:01:06.719669           Starting dbus.service - D-Bus System Message Bus...


 6385 02:01:06.751709           Starting e2scrub_reap.serv…e ext4 Metadata Check Snapshots...


 6386 02:01:06.858861           Starting systemd-logind.se…ice - User Login Management...


 6387 02:01:06.884930           Starting systemd-user-sess…vice - Permit User Sessions...


 6388 02:01:06.906062  [  OK  ] Finished alsa-restore.serv…m - Save/Restore Sound Card State.


 6389 02:01:06.924165  [  OK  ] Reached target sound.target - Sound Card.


 6390 02:01:07.036118  [  OK  ] Finished systemd-user-sess…ervice - Permit User Sessions.


 6391 02:01:07.092259  [  OK  ] Started getty@tty1.service - Getty on tty1.


 6392 02:01:07.138939  [  OK  ] Started serial-getty@ttyS0…rvice - Serial Getty on ttyS0.


 6393 02:01:07.158622  [  OK  ] Reached target getty.target - Login Prompts.


 6394 02:01:07.179150  [  OK  ] Started dbus.service - D-Bus System Message Bus.


 6395 02:01:07.223760  [  OK  ] Finished e2scrub_reap.serv…ine ext4 Metadata Check Snapshots.


 6396 02:01:07.245608  [  OK  ] Started systemd-logind.service - User Login Management.


 6397 02:01:07.263935  [  OK  ] Reached target multi-user.target - Multi-User System.


 6398 02:01:07.283433  [  OK  ] Reached target graphical.target - Graphical Interface.


 6399 02:01:07.328298           Starting systemd-update-ut… Record Runlevel Change in UTMP...


 6400 02:01:07.379611  [  OK  ] Finished systemd-update-ut… - Record Runlevel Change in UTMP.


 6401 02:01:07.441545  


 6402 02:01:07.444422  Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0

 6403 02:01:07.444506  

 6404 02:01:07.447811  debian-bookworm-arm64 login: root (automatic login)

 6405 02:01:07.447925  


 6406 02:01:07.712722  Linux debian-bookworm-arm64 6.1.94-cip23 #1 SMP PREEMPT Fri Jun 21 00:04:56 UTC 2024 aarch64

 6407 02:01:07.713230  

 6408 02:01:07.719413  The programs included with the Debian GNU/Linux system are free software;

 6409 02:01:07.726528  the exact distribution terms for each program are described in the

 6410 02:01:07.729629  individual files in /usr/share/doc/*/copyright.

 6411 02:01:07.730043  

 6412 02:01:07.736066  Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent

 6413 02:01:07.739252  permitted by applicable law.

 6414 02:01:08.837159  Matched prompt #10: / #
 6416 02:01:08.837484  Setting prompt string to ['/ #']
 6417 02:01:08.837577  end: 2.2.5.1 login-action (duration 00:00:20) [common]
 6419 02:01:08.837766  end: 2.2.5 auto-login-action (duration 00:00:20) [common]
 6420 02:01:08.837851  start: 2.2.6 expect-shell-connection (timeout 00:03:42) [common]
 6421 02:01:08.837918  Setting prompt string to ['/ #']
 6422 02:01:08.837977  Forcing a shell prompt, looking for ['/ #']
 6424 02:01:08.888334  / # 

 6425 02:01:08.888455  expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
 6426 02:01:08.888525  Waiting using forced prompt support (timeout 00:02:30)
 6427 02:01:08.893434  

 6428 02:01:08.893700  end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
 6429 02:01:08.893788  start: 2.2.7 export-device-env (timeout 00:03:42) [common]
 6431 02:01:08.994235  / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14479219/extract-nfsrootfs-cgh7e9h3'

 6432 02:01:09.000032  export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14479219/extract-nfsrootfs-cgh7e9h3'

 6434 02:01:09.101429  / # export NFS_SERVER_IP='192.168.201.1'

 6435 02:01:09.107918  export NFS_SERVER_IP='192.168.201.1'

 6436 02:01:09.108713  end: 2.2.7 export-device-env (duration 00:00:00) [common]
 6437 02:01:09.109233  end: 2.2 depthcharge-retry (duration 00:01:18) [common]
 6438 02:01:09.109943  end: 2 depthcharge-action (duration 00:01:18) [common]
 6439 02:01:09.110400  start: 3 lava-test-retry (timeout 00:08:02) [common]
 6440 02:01:09.110891  start: 3.1 lava-test-shell (timeout 00:08:02) [common]
 6441 02:01:09.111391  Using namespace: common
 6443 02:01:09.212474  / # #

 6444 02:01:09.213025  lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
 6445 02:01:09.218330  #

 6446 02:01:09.218593  Using /lava-14479219
 6448 02:01:09.319087  / # export SHELL=/bin/bash

 6449 02:01:09.324863  export SHELL=/bin/bash

 6451 02:01:09.425672  / # . /lava-14479219/environment

 6452 02:01:09.431856  . /lava-14479219/environment

 6454 02:01:09.538620  / # /lava-14479219/bin/lava-test-runner /lava-14479219/0

 6455 02:01:09.538784  Test shell timeout: 10s (minimum of the action and connection timeout)
 6456 02:01:09.544257  /lava-14479219/bin/lava-test-runner /lava-14479219/0

 6457 02:01:09.765293  + export TESTRUN_ID=0_timesync-off

 6458 02:01:09.768262  + TESTRUN_ID=0_timesync-off

 6459 02:01:09.771797  + cd /lava-14479219/0/tests/0_timesync-off

 6460 02:01:09.774818  ++ cat uuid

 6461 02:01:09.774898  + UUID=14479219_1.6.2.3.1

 6462 02:01:09.778866  + set +x

 6463 02:01:09.781442  <LAVA_SIGNAL_STARTRUN 0_timesync-off 14479219_1.6.2.3.1>

 6464 02:01:09.781702  Received signal: <STARTRUN> 0_timesync-off 14479219_1.6.2.3.1
 6465 02:01:09.781776  Starting test lava.0_timesync-off (14479219_1.6.2.3.1)
 6466 02:01:09.781862  Skipping test definition patterns.
 6467 02:01:09.785212  + systemctl stop systemd-timesyncd

 6468 02:01:09.850838  + set +x

 6469 02:01:09.854384  <LAVA_SIGNAL_ENDRUN 0_timesync-off 14479219_1.6.2.3.1>

 6470 02:01:09.855052  Received signal: <ENDRUN> 0_timesync-off 14479219_1.6.2.3.1
 6471 02:01:09.855448  Ending use of test pattern.
 6472 02:01:09.855755  Ending test lava.0_timesync-off (14479219_1.6.2.3.1), duration 0.07
 6474 02:01:09.913660  + export TESTRUN_ID=1_kselftest-arm64

 6475 02:01:09.913775  + TESTRUN_ID=1_kselftest-arm64

 6476 02:01:09.920593  + cd /lava-14479219/0/tests/1_kselftest-arm64

 6477 02:01:09.920675  ++ cat uuid

 6478 02:01:09.923447  + UUID=14479219_1.6.2.3.5

 6479 02:01:09.923529  + set +x

 6480 02:01:09.927275  <LAVA_SIGNAL_STARTRUN 1_kselftest-arm64 14479219_1.6.2.3.5>

 6481 02:01:09.927528  Received signal: <STARTRUN> 1_kselftest-arm64 14479219_1.6.2.3.5
 6482 02:01:09.927612  Starting test lava.1_kselftest-arm64 (14479219_1.6.2.3.5)
 6483 02:01:09.927696  Skipping test definition patterns.
 6484 02:01:09.930413  + cd ./automated/linux/kselftest/

 6485 02:01:09.956926  + ./kselftest.sh -c arm64 -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1

 6486 02:01:09.982282  INFO: install_deps skipped

 6487 02:01:10.468534  --2024-06-21 02:01:10--  http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz

 6488 02:01:10.475071  Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82

 6489 02:01:10.597356  Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.

 6490 02:01:10.722097  HTTP request sent, awaiting response... 200 OK

 6491 02:01:10.725137  Length: 1642760 (1.6M) [application/octet-stream]

 6492 02:01:10.728466  Saving to: 'kselftest_armhf.tar.gz'

 6493 02:01:10.728876  

 6494 02:01:10.729196  

 6495 02:01:10.971159  kselftest_armhf.tar   0%[                    ]       0  --.-KB/s               

 6496 02:01:11.221644  kselftest_armhf.tar   2%[                    ]  44.98K   181KB/s               

 6497 02:01:11.519514  kselftest_armhf.tar  13%[=>                  ] 217.50K   436KB/s               

 6498 02:01:11.649194  kselftest_armhf.tar  52%[=========>          ] 842.51K  1.03MB/s               

 6499 02:01:11.655558  kselftest_armhf.tar 100%[===================>]   1.57M  1.69MB/s    in 0.9s    

 6500 02:01:11.656019  

 6501 02:01:11.800142  2024-06-21 02:01:11 (1.69 MB/s) - 'kselftest_armhf.tar.gz' saved [1642760/1642760]

 6502 02:01:11.800323  

 6503 02:01:15.701225  skiplist:

 6504 02:01:15.704084  ========================================

 6505 02:01:15.707483  ========================================

 6506 02:01:15.749510  arm64:tags_test

 6507 02:01:15.752416  arm64:run_tags_test.sh

 6508 02:01:15.752498  arm64:fake_sigreturn_bad_magic

 6509 02:01:15.755770  arm64:fake_sigreturn_bad_size

 6510 02:01:15.758850  arm64:fake_sigreturn_bad_size_for_magic0

 6511 02:01:15.762343  arm64:fake_sigreturn_duplicated_fpsimd

 6512 02:01:15.766233  arm64:fake_sigreturn_misaligned_sp

 6513 02:01:15.769206  arm64:fake_sigreturn_missing_fpsimd

 6514 02:01:15.772457  arm64:fake_sigreturn_sme_change_vl

 6515 02:01:15.776023  arm64:fake_sigreturn_sve_change_vl

 6516 02:01:15.779163  arm64:mangle_pstate_invalid_compat_toggle

 6517 02:01:15.782306  arm64:mangle_pstate_invalid_daif_bits

 6518 02:01:15.785638  arm64:mangle_pstate_invalid_mode_el1h

 6519 02:01:15.788845  arm64:mangle_pstate_invalid_mode_el1t

 6520 02:01:15.792062  arm64:mangle_pstate_invalid_mode_el2h

 6521 02:01:15.795363  arm64:mangle_pstate_invalid_mode_el2t

 6522 02:01:15.798787  arm64:mangle_pstate_invalid_mode_el3h

 6523 02:01:15.802478  arm64:mangle_pstate_invalid_mode_el3t

 6524 02:01:15.805429  arm64:sme_trap_no_sm

 6525 02:01:15.809014  arm64:sme_trap_non_streaming

 6526 02:01:15.809093  arm64:sme_trap_za

 6527 02:01:15.812075  arm64:sme_vl

 6528 02:01:15.812154  arm64:ssve_regs

 6529 02:01:15.815472  arm64:sve_regs

 6530 02:01:15.815876  arm64:sve_vl

 6531 02:01:15.816194  arm64:za_no_regs

 6532 02:01:15.818903  arm64:za_regs

 6533 02:01:15.819309  arm64:pac

 6534 02:01:15.822561  arm64:fp-stress

 6535 02:01:15.822970  arm64:sve-ptrace

 6536 02:01:15.825559  arm64:sve-probe-vls

 6537 02:01:15.825982  arm64:vec-syscfg

 6538 02:01:15.826306  arm64:za-fork

 6539 02:01:15.828959  arm64:za-ptrace

 6540 02:01:15.829406  arm64:check_buffer_fill

 6541 02:01:15.832357  arm64:check_child_memory

 6542 02:01:15.835406  arm64:check_gcr_el1_cswitch

 6543 02:01:15.838792  arm64:check_ksm_options

 6544 02:01:15.839249  arm64:check_mmap_options

 6545 02:01:15.842358  arm64:check_prctl

 6546 02:01:15.842776  arm64:check_tags_inclusion

 6547 02:01:15.845203  arm64:check_user_mem

 6548 02:01:15.845655  arm64:btitest

 6549 02:01:15.848907  arm64:nobtitest

 6550 02:01:15.849505  arm64:hwcap

 6551 02:01:15.852380  arm64:ptrace

 6552 02:01:15.852873  arm64:syscall-abi

 6553 02:01:15.853198  arm64:tpidr2

 6554 02:01:15.858980  ============== Tests to run ===============

 6555 02:01:15.859457  arm64:tags_test

 6556 02:01:15.862133  arm64:run_tags_test.sh

 6557 02:01:15.865860  arm64:fake_sigreturn_bad_magic

 6558 02:01:15.866294  arm64:fake_sigreturn_bad_size

 6559 02:01:15.869242  arm64:fake_sigreturn_bad_size_for_magic0

 6560 02:01:15.875181  arm64:fake_sigreturn_duplicated_fpsimd

 6561 02:01:15.875655  arm64:fake_sigreturn_misaligned_sp

 6562 02:01:15.878761  arm64:fake_sigreturn_missing_fpsimd

 6563 02:01:15.882741  arm64:fake_sigreturn_sme_change_vl

 6564 02:01:15.885093  arm64:fake_sigreturn_sve_change_vl

 6565 02:01:15.888960  arm64:mangle_pstate_invalid_compat_toggle

 6566 02:01:15.892028  arm64:mangle_pstate_invalid_daif_bits

 6567 02:01:15.895246  arm64:mangle_pstate_invalid_mode_el1h

 6568 02:01:15.901949  arm64:mangle_pstate_invalid_mode_el1t

 6569 02:01:15.905305  arm64:mangle_pstate_invalid_mode_el2h

 6570 02:01:15.908590  arm64:mangle_pstate_invalid_mode_el2t

 6571 02:01:15.911886  arm64:mangle_pstate_invalid_mode_el3h

 6572 02:01:15.914931  arm64:mangle_pstate_invalid_mode_el3t

 6573 02:01:15.915436  arm64:sme_trap_no_sm

 6574 02:01:15.918544  arm64:sme_trap_non_streaming

 6575 02:01:15.921842  arm64:sme_trap_za

 6576 02:01:15.922249  arm64:sme_vl

 6577 02:01:15.922567  arm64:ssve_regs

 6578 02:01:15.925150  arm64:sve_regs

 6579 02:01:15.925618  arm64:sve_vl

 6580 02:01:15.928169  arm64:za_no_regs

 6581 02:01:15.928578  arm64:za_regs

 6582 02:01:15.928898  arm64:pac

 6583 02:01:15.931731  arm64:fp-stress

 6584 02:01:15.932138  arm64:sve-ptrace

 6585 02:01:15.935177  arm64:sve-probe-vls

 6586 02:01:15.935647  arm64:vec-syscfg

 6587 02:01:15.938107  arm64:za-fork

 6588 02:01:15.938517  arm64:za-ptrace

 6589 02:01:15.941625  arm64:check_buffer_fill

 6590 02:01:15.942030  arm64:check_child_memory

 6591 02:01:15.945195  arm64:check_gcr_el1_cswitch

 6592 02:01:15.948058  arm64:check_ksm_options

 6593 02:01:15.948467  arm64:check_mmap_options

 6594 02:01:15.951434  arm64:check_prctl

 6595 02:01:15.954707  arm64:check_tags_inclusion

 6596 02:01:15.955230  arm64:check_user_mem

 6597 02:01:15.958196  arm64:btitest

 6598 02:01:15.958795  arm64:nobtitest

 6599 02:01:15.959306  arm64:hwcap

 6600 02:01:15.961584  arm64:ptrace

 6601 02:01:15.962017  arm64:syscall-abi

 6602 02:01:15.964219  arm64:tpidr2

 6603 02:01:15.967681  ===========End Tests to run ===============

 6604 02:01:15.967761  shardfile-arm64 pass

 6605 02:01:16.204371  <12>[   26.699499] kselftest: Running tests in arm64

 6606 02:01:16.214201  TAP version 13

 6607 02:01:16.229058  1..48

 6608 02:01:16.246242  # selftests: arm64: tags_test

 6609 02:01:16.703758  ok 1 selftests: arm64: tags_test

 6610 02:01:16.724935  # selftests: arm64: run_tags_test.sh

 6611 02:01:16.784226  # --------------------

 6612 02:01:16.787618  # running tags test

 6613 02:01:16.787731  # --------------------

 6614 02:01:16.790676  # [PASS]

 6615 02:01:16.794127  ok 2 selftests: arm64: run_tags_test.sh

 6616 02:01:16.810121  # selftests: arm64: fake_sigreturn_bad_magic

 6617 02:01:16.881384  # Registered handlers for all signals.

 6618 02:01:16.882114  # Detected MINSTKSIGSZ:4720

 6619 02:01:16.884313  # Testcase initialized.

 6620 02:01:16.888166  # uc context validated.

 6621 02:01:16.891290  # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler

 6622 02:01:16.894655  # Handled SIG_COPYCTX

 6623 02:01:16.895100  # Available space:3568

 6624 02:01:16.901022  # Using badly built context - ERR: BAD MAGIC !

 6625 02:01:16.911391  # SIG_OK -- SP:0xFFFFE6CF6670  si_addr@:0xffffe6cf6670  si_code:2  token@:0xffffe6cf5410  offset:-4704

 6626 02:01:16.911870  # ==>> completed. PASS(1)

 6627 02:01:16.917587  # # FAKE_SIGRETURN_BAD_MAGIC :: Trigger a sigreturn with a sigframe with a bad magic

 6628 02:01:16.923990  # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE6CF5410

 6629 02:01:16.930636  ok 3 selftests: arm64: fake_sigreturn_bad_magic

 6630 02:01:16.934287  # selftests: arm64: fake_sigreturn_bad_size

 6631 02:01:16.982072  # Registered handlers for all signals.

 6632 02:01:16.982529  # Detected MINSTKSIGSZ:4720

 6633 02:01:16.985414  # Testcase initialized.

 6634 02:01:16.988280  # uc context validated.

 6635 02:01:16.991590  # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler

 6636 02:01:16.995556  # Handled SIG_COPYCTX

 6637 02:01:16.996119  # Available space:3568

 6638 02:01:16.998675  # uc context validated.

 6639 02:01:17.004853  # Using badly built context - ERR: Bad size for esr_context

 6640 02:01:17.011792  # SIG_OK -- SP:0xFFFFE6AAF300  si_addr@:0xffffe6aaf300  si_code:2  token@:0xffffe6aae0a0  offset:-4704

 6641 02:01:17.015132  # ==>> completed. PASS(1)

 6642 02:01:17.021519  # # FAKE_SIGRETURN_BAD_SIZE :: Triggers a sigreturn with a overrun __reserved area

 6643 02:01:17.028178  # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE6AAE0A0

 6644 02:01:17.034548  ok 4 selftests: arm64: fake_sigreturn_bad_size

 6645 02:01:17.038044  # selftests: arm64: fake_sigreturn_bad_size_for_magic0

 6646 02:01:17.073836  # Registered handlers for all signals.

 6647 02:01:17.074258  # Detected MINSTKSIGSZ:4720

 6648 02:01:17.077351  # Testcase initialized.

 6649 02:01:17.080269  # uc context validated.

 6650 02:01:17.083484  # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler

 6651 02:01:17.086800  # Handled SIG_COPYCTX

 6652 02:01:17.086920  # Available space:3568

 6653 02:01:17.093277  # Using badly built context - ERR: Bad size for terminator

 6654 02:01:17.103790  # SIG_OK -- SP:0xFFFFE7478210  si_addr@:0xffffe7478210  si_code:2  token@:0xffffe7476fb0  offset:-4704

 6655 02:01:17.103900  # ==>> completed. PASS(1)

 6656 02:01:17.112971  # # FAKE_SIGRETURN_BAD_SIZE_FOR_TERMINATOR :: Trigger a sigreturn using non-zero size terminator

 6657 02:01:17.120040  # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE7476FB0

 6658 02:01:17.123145  ok 5 selftests: arm64: fake_sigreturn_bad_size_for_magic0

 6659 02:01:17.129738  # selftests: arm64: fake_sigreturn_duplicated_fpsimd

 6660 02:01:17.164470  # Registered handlers for all signals.

 6661 02:01:17.164585  # Detected MINSTKSIGSZ:4720

 6662 02:01:17.167779  # Testcase initialized.

 6663 02:01:17.170990  # uc context validated.

 6664 02:01:17.174568  # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler

 6665 02:01:17.177889  # Handled SIG_COPYCTX

 6666 02:01:17.178021  # Available space:3568

 6667 02:01:17.183970  # Using badly built context - ERR: Multiple FPSIMD_MAGIC

 6668 02:01:17.194262  # SIG_OK -- SP:0xFFFFC24502B0  si_addr@:0xffffc24502b0  si_code:2  token@:0xffffc244f050  offset:-4704

 6669 02:01:17.194361  # ==>> completed. PASS(1)

 6670 02:01:17.204030  # # FAKE_SIGRETURN_DUPLICATED_FPSIMD :: Triggers a sigreturn including two fpsimd_context

 6671 02:01:17.210887  # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFC244F050

 6672 02:01:17.214462  ok 6 selftests: arm64: fake_sigreturn_duplicated_fpsimd

 6673 02:01:17.217438  # selftests: arm64: fake_sigreturn_misaligned_sp

 6674 02:01:17.255095  # Registered handlers for all signals.

 6675 02:01:17.255183  # Detected MINSTKSIGSZ:4720

 6676 02:01:17.258550  # Testcase initialized.

 6677 02:01:17.262035  # uc context validated.

 6678 02:01:17.265580  # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler

 6679 02:01:17.268347  # Handled SIG_COPYCTX

 6680 02:01:17.275490  # SIG_OK -- SP:0xFFFFD31E49A3  si_addr@:0xffffd31e49a3  si_code:2  token@:0xffffd31e49a3  offset:0

 6681 02:01:17.279105  # ==>> completed. PASS(1)

 6682 02:01:17.285136  # # FAKE_SIGRETURN_MISALIGNED_SP :: Triggers a sigreturn with a misaligned sigframe

 6683 02:01:17.291763  # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFD31E49A3

 6684 02:01:17.298524  ok 7 selftests: arm64: fake_sigreturn_misaligned_sp

 6685 02:01:17.301765  # selftests: arm64: fake_sigreturn_missing_fpsimd

 6686 02:01:17.354640  # Registered handlers for all signals.

 6687 02:01:17.354755  # Detected MINSTKSIGSZ:4720

 6688 02:01:17.358110  # Testcase initialized.

 6689 02:01:17.361234  # uc context validated.

 6690 02:01:17.364603  # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler

 6691 02:01:17.368016  # Handled SIG_COPYCTX

 6692 02:01:17.371539  # Mangling template header. Spare space:4096

 6693 02:01:17.374454  # Using badly built context - ERR: Missing FPSIMD

 6694 02:01:17.384352  # SIG_OK -- SP:0xFFFFCAD609D0  si_addr@:0xffffcad609d0  si_code:2  token@:0xffffcad5f770  offset:-4704

 6695 02:01:17.388041  # ==>> completed. PASS(1)

 6696 02:01:17.394258  # # FAKE_SIGRETURN_MISSING_FPSIMD :: Triggers a sigreturn with a missing fpsimd_context

 6697 02:01:17.401482  # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFCAD5F770

 6698 02:01:17.404548  ok 8 selftests: arm64: fake_sigreturn_missing_fpsimd

 6699 02:01:17.411259  # selftests: arm64: fake_sigreturn_sme_change_vl

 6700 02:01:17.453009  # Registered handlers for all signals.

 6701 02:01:17.453124  # Detected MINSTKSIGSZ:4720

 6702 02:01:17.456207  # ==>> completed. SKIP.

 6703 02:01:17.462955  # # FAKE_SIGRETURN_SSVE_CHANGE :: Attempt to change Streaming SVE VL

 6704 02:01:17.466441  ok 9 selftests: arm64: fake_sigreturn_sme_change_vl # SKIP

 6705 02:01:17.475131  # selftests: arm64: fake_sigreturn_sve_change_vl

 6706 02:01:17.546069  # Registered handlers for all signals.

 6707 02:01:17.546184  # Detected MINSTKSIGSZ:4720

 6708 02:01:17.549439  # ==>> completed. SKIP.

 6709 02:01:17.556304  # # FAKE_SIGRETURN_SVE_CHANGE :: Attempt to change SVE VL

 6710 02:01:17.559388  ok 10 selftests: arm64: fake_sigreturn_sve_change_vl # SKIP

 6711 02:01:17.568751  # selftests: arm64: mangle_pstate_invalid_compat_toggle

 6712 02:01:17.656561  # Registered handlers for all signals.

 6713 02:01:17.656684  # Detected MINSTKSIGSZ:4720

 6714 02:01:17.659615  # Testcase initialized.

 6715 02:01:17.662698  # uc context validated.

 6716 02:01:17.662796  # Handled SIG_TRIG

 6717 02:01:17.672736  # SIG_OK -- SP:0xFFFFF27C2710  si_addr@:0xfffff27c2710  si_code:2  token@:(nil)  offset:-281474749966096

 6718 02:01:17.676174  # ==>> completed. PASS(1)

 6719 02:01:17.683112  # # MANGLE_PSTATE_INVALID_STATE_TOGGLE :: Mangling uc_mcontext with INVALID STATE_TOGGLE

 6720 02:01:17.689587  ok 11 selftests: arm64: mangle_pstate_invalid_compat_toggle

 6721 02:01:17.692738  # selftests: arm64: mangle_pstate_invalid_daif_bits

 6722 02:01:17.751320  # Registered handlers for all signals.

 6723 02:01:17.751442  # Detected MINSTKSIGSZ:4720

 6724 02:01:17.754265  # Testcase initialized.

 6725 02:01:17.757744  # uc context validated.

 6726 02:01:17.757824  # Handled SIG_TRIG

 6727 02:01:17.767398  # SIG_OK -- SP:0xFFFFC924F1D0  si_addr@:0xffffc924f1d0  si_code:2  token@:(nil)  offset:-281474056384976

 6728 02:01:17.770846  # ==>> completed. PASS(1)

 6729 02:01:17.777147  # # MANGLE_PSTATE_INVALID_DAIF_BITS :: Mangling uc_mcontext with INVALID DAIF_BITS

 6730 02:01:17.780782  ok 12 selftests: arm64: mangle_pstate_invalid_daif_bits

 6731 02:01:17.787031  # selftests: arm64: mangle_pstate_invalid_mode_el1h

 6732 02:01:17.834288  # Registered handlers for all signals.

 6733 02:01:17.834418  # Detected MINSTKSIGSZ:4720

 6734 02:01:17.837728  # Testcase initialized.

 6735 02:01:17.840650  # uc context validated.

 6736 02:01:17.840749  # Handled SIG_TRIG

 6737 02:01:17.850838  # SIG_OK -- SP:0xFFFFF8DF3610  si_addr@:0xfffff8df3610  si_code:2  token@:(nil)  offset:-281474857121296

 6738 02:01:17.854104  # ==>> completed. PASS(1)

 6739 02:01:17.861023  # # MANGLE_PSTATE_INVALID_MODE_EL1h :: Mangling uc_mcontext INVALID MODE EL1h

 6740 02:01:17.864008  ok 13 selftests: arm64: mangle_pstate_invalid_mode_el1h

 6741 02:01:17.870751  # selftests: arm64: mangle_pstate_invalid_mode_el1t

 6742 02:01:17.905697  # Registered handlers for all signals.

 6743 02:01:17.906127  # Detected MINSTKSIGSZ:4720

 6744 02:01:17.908480  # Testcase initialized.

 6745 02:01:17.912076  # uc context validated.

 6746 02:01:17.912540  # Handled SIG_TRIG

 6747 02:01:17.922096  # SIG_OK -- SP:0xFFFFF9EC91B0  si_addr@:0xfffff9ec91b0  si_code:2  token@:(nil)  offset:-281474874773936

 6748 02:01:17.925385  # ==>> completed. PASS(1)

 6749 02:01:17.932028  # # MANGLE_PSTATE_INVALID_MODE_EL1t :: Mangling uc_mcontext INVALID MODE EL1t

 6750 02:01:17.935617  ok 14 selftests: arm64: mangle_pstate_invalid_mode_el1t

 6751 02:01:17.942361  # selftests: arm64: mangle_pstate_invalid_mode_el2h

 6752 02:01:18.016111  # Registered handlers for all signals.

 6753 02:01:18.016606  # Detected MINSTKSIGSZ:4720

 6754 02:01:18.019349  # Testcase initialized.

 6755 02:01:18.022453  # uc context validated.

 6756 02:01:18.022976  # Handled SIG_TRIG

 6757 02:01:18.032777  # SIG_OK -- SP:0xFFFFE7255FA0  si_addr@:0xffffe7255fa0  si_code:2  token@:(nil)  offset:-281474559729568

 6758 02:01:18.035641  # ==>> completed. PASS(1)

 6759 02:01:18.042402  # # MANGLE_PSTATE_INVALID_MODE_EL2h :: Mangling uc_mcontext INVALID MODE EL2h

 6760 02:01:18.045465  ok 15 selftests: arm64: mangle_pstate_invalid_mode_el2h

 6761 02:01:18.052131  # selftests: arm64: mangle_pstate_invalid_mode_el2t

 6762 02:01:18.105830  # Registered handlers for all signals.

 6763 02:01:18.105961  # Detected MINSTKSIGSZ:4720

 6764 02:01:18.109415  # Testcase initialized.

 6765 02:01:18.112873  # uc context validated.

 6766 02:01:18.112974  # Handled SIG_TRIG

 6767 02:01:18.122592  # SIG_OK -- SP:0xFFFFF27FD200  si_addr@:0xfffff27fd200  si_code:2  token@:(nil)  offset:-281474750206464

 6768 02:01:18.125928  # ==>> completed. PASS(1)

 6769 02:01:18.132128  # # MANGLE_PSTATE_INVALID_MODE_EL2t :: Mangling uc_mcontext INVALID MODE EL2t

 6770 02:01:18.135680  ok 16 selftests: arm64: mangle_pstate_invalid_mode_el2t

 6771 02:01:18.142170  # selftests: arm64: mangle_pstate_invalid_mode_el3h

 6772 02:01:18.198736  # Registered handlers for all signals.

 6773 02:01:18.198839  # Detected MINSTKSIGSZ:4720

 6774 02:01:18.201906  # Testcase initialized.

 6775 02:01:18.205568  # uc context validated.

 6776 02:01:18.205649  # Handled SIG_TRIG

 6777 02:01:18.215253  # SIG_OK -- SP:0xFFFFDC1664D0  si_addr@:0xffffdc1664d0  si_code:2  token@:(nil)  offset:-281474374198480

 6778 02:01:18.218237  # ==>> completed. PASS(1)

 6779 02:01:18.225418  # # MANGLE_PSTATE_INVALID_MODE_EL3h :: Mangling uc_mcontext INVALID MODE EL3h

 6780 02:01:18.228356  ok 17 selftests: arm64: mangle_pstate_invalid_mode_el3h

 6781 02:01:18.235245  # selftests: arm64: mangle_pstate_invalid_mode_el3t

 6782 02:01:18.285566  # Registered handlers for all signals.

 6783 02:01:18.285705  # Detected MINSTKSIGSZ:4720

 6784 02:01:18.289513  # Testcase initialized.

 6785 02:01:18.292117  # uc context validated.

 6786 02:01:18.292215  # Handled SIG_TRIG

 6787 02:01:18.302106  # SIG_OK -- SP:0xFFFFE4D31370  si_addr@:0xffffe4d31370  si_code:2  token@:(nil)  offset:-281474520781680

 6788 02:01:18.305695  # ==>> completed. PASS(1)

 6789 02:01:18.311924  # # MANGLE_PSTATE_INVALID_MODE_EL3t :: Mangling uc_mcontext INVALID MODE EL3t

 6790 02:01:18.315687  ok 18 selftests: arm64: mangle_pstate_invalid_mode_el3t

 6791 02:01:18.318914  # selftests: arm64: sme_trap_no_sm

 6792 02:01:18.375753  # Registered handlers for all signals.

 6793 02:01:18.375860  # Detected MINSTKSIGSZ:4720

 6794 02:01:18.378475  # ==>> completed. SKIP.

 6795 02:01:18.388590  # # SME trap without SM :: Check that we get a SIGILL if we use streaming mode without enabling it

 6796 02:01:18.392002  ok 19 selftests: arm64: sme_trap_no_sm # SKIP

 6797 02:01:18.395195  # selftests: arm64: sme_trap_non_streaming

 6798 02:01:18.483459  # Registered handlers for all signals.

 6799 02:01:18.484069  # Detected MINSTKSIGSZ:4720

 6800 02:01:18.486611  # ==>> completed. SKIP.

 6801 02:01:18.496218  # # SME SM trap unsupported instruction :: Check that we get a SIGILL if we use an unsupported instruction in streaming mode

 6802 02:01:18.503294  ok 20 selftests: arm64: sme_trap_non_streaming # SKIP

 6803 02:01:18.506091  # selftests: arm64: sme_trap_za

 6804 02:01:18.576902  # Registered handlers for all signals.

 6805 02:01:18.577038  # Detected MINSTKSIGSZ:4720

 6806 02:01:18.580231  # Testcase initialized.

 6807 02:01:18.590049  # SIG_OK -- SP:0xFFFFE1952380  si_addr@:0xaaaac40f2510  si_code:1  token@:(nil)  offset:-187650410489104

 6808 02:01:18.590157  # ==>> completed. PASS(1)

 6809 02:01:18.599866  # # SME ZA trap :: Check that we get a SIGILL if we access ZA without enabling

 6810 02:01:18.603113  ok 21 selftests: arm64: sme_trap_za

 6811 02:01:18.603215  # selftests: arm64: sme_vl

 6812 02:01:18.679831  # Registered handlers for all signals.

 6813 02:01:18.680093  # Detected MINSTKSIGSZ:4720

 6814 02:01:18.683322  # ==>> completed. SKIP.

 6815 02:01:18.690262  # # SME VL :: Check that we get the right SME VL reported

 6816 02:01:18.693121  ok 22 selftests: arm64: sme_vl # SKIP

 6817 02:01:18.697417  # selftests: arm64: ssve_regs

 6818 02:01:18.769500  # Registered handlers for all signals.

 6819 02:01:18.770166  # Detected MINSTKSIGSZ:4720

 6820 02:01:18.772371  # ==>> completed. SKIP.

 6821 02:01:18.779465  # # Streaming SVE registers :: Check that we get the right Streaming SVE registers reported

 6822 02:01:18.785647  ok 23 selftests: arm64: ssve_regs # SKIP

 6823 02:01:18.788998  # selftests: arm64: sve_regs

 6824 02:01:18.874290  # Registered handlers for all signals.

 6825 02:01:18.874735  # Detected MINSTKSIGSZ:4720

 6826 02:01:18.877726  # ==>> completed. SKIP.

 6827 02:01:18.884141  # # SVE registers :: Check that we get the right SVE registers reported

 6828 02:01:18.887426  ok 24 selftests: arm64: sve_regs # SKIP

 6829 02:01:18.894725  # selftests: arm64: sve_vl

 6830 02:01:18.971092  # Registered handlers for all signals.

 6831 02:01:18.971552  # Detected MINSTKSIGSZ:4720

 6832 02:01:18.974148  # ==>> completed. SKIP.

 6833 02:01:18.981339  # # SVE VL :: Check that we get the right SVE VL reported

 6834 02:01:18.984169  ok 25 selftests: arm64: sve_vl # SKIP

 6835 02:01:18.990181  # selftests: arm64: za_no_regs

 6836 02:01:19.077334  # Registered handlers for all signals.

 6837 02:01:19.077790  # Detected MINSTKSIGSZ:4720

 6838 02:01:19.079961  # ==>> completed. SKIP.

 6839 02:01:19.086796  # # ZA registers - ZA disabled :: Check ZA context with ZA disabled

 6840 02:01:19.090673  ok 26 selftests: arm64: za_no_regs # SKIP

 6841 02:01:19.095369  # selftests: arm64: za_regs

 6842 02:01:19.158259  # Registered handlers for all signals.

 6843 02:01:19.158707  # Detected MINSTKSIGSZ:4720

 6844 02:01:19.161914  # ==>> completed. SKIP.

 6845 02:01:19.168294  # # ZA register :: Check that we get the right ZA registers reported

 6846 02:01:19.171916  ok 27 selftests: arm64: za_regs # SKIP

 6847 02:01:19.175314  # selftests: arm64: pac

 6848 02:01:19.260253  # TAP version 13

 6849 02:01:19.260706  # 1..7

 6850 02:01:19.263231  # # Starting 7 tests from 1 test cases.

 6851 02:01:19.266996  # #  RUN           global.corrupt_pac ...

 6852 02:01:19.269860  # #      SKIP      PAUTH not enabled

 6853 02:01:19.273505  # #            OK  global.corrupt_pac

 6854 02:01:19.276727  # ok 1 # SKIP PAUTH not enabled

 6855 02:01:19.283238  # #  RUN           global.pac_instructions_not_nop ...

 6856 02:01:19.286629  # #      SKIP      PAUTH not enabled

 6857 02:01:19.289947  # #            OK  global.pac_instructions_not_nop

 6858 02:01:19.293480  # ok 2 # SKIP PAUTH not enabled

 6859 02:01:19.300077  # #  RUN           global.pac_instructions_not_nop_generic ...

 6860 02:01:19.303178  # #      SKIP      Generic PAUTH not enabled

 6861 02:01:19.306489  # #            OK  global.pac_instructions_not_nop_generic

 6862 02:01:19.309942  # ok 3 # SKIP Generic PAUTH not enabled

 6863 02:01:19.316646  # #  RUN           global.single_thread_different_keys ...

 6864 02:01:19.320005  # #      SKIP      PAUTH not enabled

 6865 02:01:19.322979  # #            OK  global.single_thread_different_keys

 6866 02:01:19.326604  # ok 4 # SKIP PAUTH not enabled

 6867 02:01:19.332900  # #  RUN           global.exec_changed_keys ...

 6868 02:01:19.336361  # #      SKIP      PAUTH not enabled

 6869 02:01:19.339976  # #            OK  global.exec_changed_keys

 6870 02:01:19.343454  # ok 5 # SKIP PAUTH not enabled

 6871 02:01:19.346150  # #  RUN           global.context_switch_keep_keys ...

 6872 02:01:19.349381  # #      SKIP      PAUTH not enabled

 6873 02:01:19.356436  # #            OK  global.context_switch_keep_keys

 6874 02:01:19.356857  # ok 6 # SKIP PAUTH not enabled

 6875 02:01:19.362976  # #  RUN           global.context_switch_keep_keys_generic ...

 6876 02:01:19.366841  # #      SKIP      Generic PAUTH not enabled

 6877 02:01:19.372798  # #            OK  global.context_switch_keep_keys_generic

 6878 02:01:19.376239  # ok 7 # SKIP Generic PAUTH not enabled

 6879 02:01:19.379959  # # PASSED: 7 / 7 tests passed.

 6880 02:01:19.382757  # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:7 error:0

 6881 02:01:19.386302  ok 28 selftests: arm64: pac

 6882 02:01:19.389752  # selftests: arm64: fp-stress

 6883 02:01:27.495864  <6>[   37.993613] vaux18: disabling

 6884 02:01:27.498714  <6>[   37.996988] vio28: disabling

 6885 02:01:29.332338  # TAP version 13

 6886 02:01:29.332971  # 1..16

 6887 02:01:29.335754  # # 8 CPUs, 0 SVE VLs, 0 SME VLs

 6888 02:01:29.338783  # # Will run for 10s

 6889 02:01:29.339286  # # Started FPSIMD-0-0

 6890 02:01:29.342127  # # Started FPSIMD-0-1

 6891 02:01:29.345364  # # Started FPSIMD-1-0

 6892 02:01:29.345828  # # Started FPSIMD-1-1

 6893 02:01:29.348755  # # Started FPSIMD-2-0

 6894 02:01:29.349405  # # Started FPSIMD-2-1

 6895 02:01:29.351914  # # Started FPSIMD-3-0

 6896 02:01:29.355558  # # Started FPSIMD-3-1

 6897 02:01:29.356206  # # Started FPSIMD-4-0

 6898 02:01:29.358837  # # Started FPSIMD-4-1

 6899 02:01:29.362566  # # Started FPSIMD-5-0

 6900 02:01:29.363023  # # Started FPSIMD-5-1

 6901 02:01:29.365170  # # Started FPSIMD-6-0

 6902 02:01:29.365586  # # Started FPSIMD-6-1

 6903 02:01:29.368762  # # Started FPSIMD-7-0

 6904 02:01:29.372003  # # Started FPSIMD-7-1

 6905 02:01:29.375103  # # FPSIMD-1-0: Vector length:	128 bits

 6906 02:01:29.378602  # # FPSIMD-1-0: PID:	1190

 6907 02:01:29.382129  # # FPSIMD-2-0: Vector length:	128 bits

 6908 02:01:29.382747  # # FPSIMD-2-0: PID:	1192

 6909 02:01:29.385662  # # FPSIMD-1-1: Vector length:	128 bits

 6910 02:01:29.388456  # # FPSIMD-1-1: PID:	1191

 6911 02:01:29.392032  # # FPSIMD-0-1: Vector length:	128 bits

 6912 02:01:29.395089  # # FPSIMD-0-1: PID:	1189

 6913 02:01:29.398439  # # FPSIMD-0-0: Vector length:	128 bits

 6914 02:01:29.401611  # # FPSIMD-0-0: PID:	1188

 6915 02:01:29.405167  # # FPSIMD-3-1: Vector length:	128 bits

 6916 02:01:29.405742  # # FPSIMD-3-1: PID:	1195

 6917 02:01:29.411719  # # FPSIMD-2-1: Vector length:	128 bits

 6918 02:01:29.412129  # # FPSIMD-2-1: PID:	1193

 6919 02:01:29.415021  # # FPSIMD-3-0: Vector length:	128 bits

 6920 02:01:29.418223  # # FPSIMD-3-0: PID:	1194

 6921 02:01:29.421715  # # FPSIMD-7-0: Vector length:	128 bits

 6922 02:01:29.425207  # # FPSIMD-7-0: PID:	1202

 6923 02:01:29.428187  # # FPSIMD-6-1: Vector length:	128 bits

 6924 02:01:29.432133  # # FPSIMD-6-1: PID:	1201

 6925 02:01:29.435450  # # FPSIMD-7-1: Vector length:	128 bits

 6926 02:01:29.435858  # # FPSIMD-7-1: PID:	1203

 6927 02:01:29.438492  # # FPSIMD-5-0: Vector length:	128 bits

 6928 02:01:29.441892  # # FPSIMD-5-0: PID:	1198

 6929 02:01:29.444562  # # FPSIMD-4-0: Vector length:	128 bits

 6930 02:01:29.448132  # # FPSIMD-4-0: PID:	1196

 6931 02:01:29.451593  # # FPSIMD-5-1: Vector length:	128 bits

 6932 02:01:29.455035  # # FPSIMD-5-1: PID:	1199

 6933 02:01:29.458180  # # FPSIMD-4-1: Vector length:	128 bits

 6934 02:01:29.461386  # # FPSIMD-4-1: PID:	1197

 6935 02:01:29.464477  # # FPSIMD-6-0: Vector length:	128 bits

 6936 02:01:29.464888  # # FPSIMD-6-0: PID:	1200

 6937 02:01:29.468348  # # Finishing up...

 6938 02:01:29.474519  # # FPSIMD-0-0: Terminated by signal 15, no error, iterations=904652, signals=10

 6939 02:01:29.481236  # # FPSIMD-2-1: Terminated by signal 15, no error, iterations=706346, signals=10

 6940 02:01:29.487987  # # FPSIMD-1-0: Terminated by signal 15, no error, iterations=946092, signals=9

 6941 02:01:29.494736  # # FPSIMD-4-1: Terminated by signal 15, no error, iterations=753874, signals=10

 6942 02:01:29.504710  # # FPSIMD-1-1: Terminated by signal 15, no error, iterations=910632, signals=10

 6943 02:01:29.511096  # # FPSIMD-6-0: Terminated by signal 15, no error, iterations=734076, signals=10

 6944 02:01:29.517622  # # FPSIMD-5-1: Terminated by signal 15, no error, iterations=836440, signals=10

 6945 02:01:29.518040  # ok 1 FPSIMD-0-0

 6946 02:01:29.520975  # ok 2 FPSIMD-0-1

 6947 02:01:29.521433  # ok 3 FPSIMD-1-0

 6948 02:01:29.524292  # ok 4 FPSIMD-1-1

 6949 02:01:29.524699  # ok 5 FPSIMD-2-0

 6950 02:01:29.527521  # ok 6 FPSIMD-2-1

 6951 02:01:29.527931  # ok 7 FPSIMD-3-0

 6952 02:01:29.531109  # ok 8 FPSIMD-3-1

 6953 02:01:29.531521  # ok 9 FPSIMD-4-0

 6954 02:01:29.534509  # ok 10 FPSIMD-4-1

 6955 02:01:29.537729  # ok 11 FPSIMD-5-0

 6956 02:01:29.538140  # ok 12 FPSIMD-5-1

 6957 02:01:29.540304  # ok 13 FPSIMD-6-0

 6958 02:01:29.540384  # ok 14 FPSIMD-6-1

 6959 02:01:29.543678  # ok 15 FPSIMD-7-0

 6960 02:01:29.543757  # ok 16 FPSIMD-7-1

 6961 02:01:29.550267  # # FPSIMD-3-0: Terminated by signal 15, no error, iterations=994699, signals=9

 6962 02:01:29.557221  # # FPSIMD-0-1: Terminated by signal 15, no error, iterations=747693, signals=10

 6963 02:01:29.567115  # # FPSIMD-7-1: Terminated by signal 15, no error, iterations=778490, signals=10

 6964 02:01:29.574041  # # FPSIMD-6-1: Terminated by signal 15, no error, iterations=702619, signals=10

 6965 02:01:29.580220  # # FPSIMD-3-1: Terminated by signal 15, no error, iterations=851170, signals=9

 6966 02:01:29.586832  # # FPSIMD-7-0: Terminated by signal 15, no error, iterations=708265, signals=10

 6967 02:01:29.593149  # # FPSIMD-4-0: Terminated by signal 15, no error, iterations=704085, signals=10

 6968 02:01:29.599949  # # FPSIMD-5-0: Terminated by signal 15, no error, iterations=719762, signals=10

 6969 02:01:29.610066  # # FPSIMD-2-0: Terminated by signal 15, no error, iterations=737723, signals=10

 6970 02:01:29.613668  # # Totals: pass:16 fail:0 xfail:0 xpass:0 skip:0 error:0

 6971 02:01:29.616645  ok 29 selftests: arm64: fp-stress

 6972 02:01:29.620234  # selftests: arm64: sve-ptrace

 6973 02:01:29.620611  # TAP version 13

 6974 02:01:29.623204  # 1..4104

 6975 02:01:29.623577  # ok 2 # SKIP SVE not available

 6976 02:01:29.630040  # # Planned tests != run tests (4104 != 1)

 6977 02:01:29.633428  # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0

 6978 02:01:29.636349  ok 30 selftests: arm64: sve-ptrace # SKIP

 6979 02:01:29.639795  # selftests: arm64: sve-probe-vls

 6980 02:01:29.643264  # TAP version 13

 6981 02:01:29.643681  # 1..2

 6982 02:01:29.646587  # ok 2 # SKIP SVE not available

 6983 02:01:29.650124  # # Planned tests != run tests (2 != 1)

 6984 02:01:29.653101  # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0

 6985 02:01:29.659715  ok 31 selftests: arm64: sve-probe-vls # SKIP

 6986 02:01:29.660150  # selftests: arm64: vec-syscfg

 6987 02:01:29.663652  # TAP version 13

 6988 02:01:29.664080  # 1..20

 6989 02:01:29.666239  # ok 1 # SKIP SVE not supported

 6990 02:01:29.669689  # ok 2 # SKIP SVE not supported

 6991 02:01:29.673213  # ok 3 # SKIP SVE not supported

 6992 02:01:29.676328  # ok 4 # SKIP SVE not supported

 6993 02:01:29.679594  # ok 5 # SKIP SVE not supported

 6994 02:01:29.680027  # ok 6 # SKIP SVE not supported

 6995 02:01:29.683162  # ok 7 # SKIP SVE not supported

 6996 02:01:29.686939  # ok 8 # SKIP SVE not supported

 6997 02:01:29.689715  # ok 9 # SKIP SVE not supported

 6998 02:01:29.693003  # ok 10 # SKIP SVE not supported

 6999 02:01:29.696590  # ok 11 # SKIP SME not supported

 7000 02:01:29.699548  # ok 12 # SKIP SME not supported

 7001 02:01:29.703034  # ok 13 # SKIP SME not supported

 7002 02:01:29.703465  # ok 14 # SKIP SME not supported

 7003 02:01:29.706508  # ok 15 # SKIP SME not supported

 7004 02:01:29.709781  # ok 16 # SKIP SME not supported

 7005 02:01:29.712826  # ok 17 # SKIP SME not supported

 7006 02:01:29.716554  # ok 18 # SKIP SME not supported

 7007 02:01:29.719707  # ok 19 # SKIP SME not supported

 7008 02:01:29.723308  # ok 20 # SKIP SME not supported

 7009 02:01:29.726175  # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:20 error:0

 7010 02:01:29.729321  ok 32 selftests: arm64: vec-syscfg

 7011 02:01:29.732810  # selftests: arm64: za-fork

 7012 02:01:29.733386  # TAP version 13

 7013 02:01:29.736403  # 1..1

 7014 02:01:29.736833  # # PID: 1280

 7015 02:01:29.739753  # # SME support not present

 7016 02:01:29.740185  # ok 0 skipped

 7017 02:01:29.746639  # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0

 7018 02:01:29.749194  ok 33 selftests: arm64: za-fork

 7019 02:01:29.749670  # selftests: arm64: za-ptrace

 7020 02:01:29.804044  # TAP version 13

 7021 02:01:29.804495  # 1..1

 7022 02:01:29.807795  # ok 2 # SKIP SME not available

 7023 02:01:29.814087  # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0

 7024 02:01:29.817600  ok 34 selftests: arm64: za-ptrace # SKIP

 7025 02:01:29.829442  # selftests: arm64: check_buffer_fill

 7026 02:01:29.900657  # # SKIP: MTE features unavailable

 7027 02:01:29.909391  ok 35 selftests: arm64: check_buffer_fill # SKIP

 7028 02:01:29.926939  # selftests: arm64: check_child_memory

 7029 02:01:29.990382  # # SKIP: MTE features unavailable

 7030 02:01:29.997780  ok 36 selftests: arm64: check_child_memory # SKIP

 7031 02:01:30.013617  # selftests: arm64: check_gcr_el1_cswitch

 7032 02:01:30.066062  # # SKIP: MTE features unavailable

 7033 02:01:30.073627  ok 37 selftests: arm64: check_gcr_el1_cswitch # SKIP

 7034 02:01:30.089215  # selftests: arm64: check_ksm_options

 7035 02:01:30.165805  # # SKIP: MTE features unavailable

 7036 02:01:30.176435  ok 38 selftests: arm64: check_ksm_options # SKIP

 7037 02:01:30.193143  # selftests: arm64: check_mmap_options

 7038 02:01:30.271895  # # SKIP: MTE features unavailable

 7039 02:01:30.279874  ok 39 selftests: arm64: check_mmap_options # SKIP

 7040 02:01:30.291869  # selftests: arm64: check_prctl

 7041 02:01:30.360506  # TAP version 13

 7042 02:01:30.361013  # 1..5

 7043 02:01:30.363899  # ok 1 check_basic_read

 7044 02:01:30.364309  # ok 2 NONE

 7045 02:01:30.366843  # ok 3 # SKIP SYNC

 7046 02:01:30.367257  # ok 4 # SKIP ASYNC

 7047 02:01:30.370266  # ok 5 # SKIP SYNC+ASYNC

 7048 02:01:30.373755  # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:3 error:0

 7049 02:01:30.376587  ok 40 selftests: arm64: check_prctl

 7050 02:01:30.385972  # selftests: arm64: check_tags_inclusion

 7051 02:01:30.450271  # # SKIP: MTE features unavailable

 7052 02:01:30.458103  ok 41 selftests: arm64: check_tags_inclusion # SKIP

 7053 02:01:30.469445  # selftests: arm64: check_user_mem

 7054 02:01:30.536185  # # SKIP: MTE features unavailable

 7055 02:01:30.546376  ok 42 selftests: arm64: check_user_mem # SKIP

 7056 02:01:30.559483  # selftests: arm64: btitest

 7057 02:01:30.627751  # TAP version 13

 7058 02:01:30.628209  # 1..18

 7059 02:01:30.631264  # # HWCAP_PACA not present

 7060 02:01:30.634634  # # HWCAP2_BTI not present

 7061 02:01:30.637764  # # Test binary built for BTI

 7062 02:01:30.640784  # ok 1 nohint_func/call_using_br_x0 # SKIP

 7063 02:01:30.644192  # ok 1 nohint_func/call_using_br_x16 # SKIP

 7064 02:01:30.647787  # ok 1 nohint_func/call_using_blr # SKIP

 7065 02:01:30.650704  # ok 1 bti_none_func/call_using_br_x0 # SKIP

 7066 02:01:30.654475  # ok 1 bti_none_func/call_using_br_x16 # SKIP

 7067 02:01:30.660919  # ok 1 bti_none_func/call_using_blr # SKIP

 7068 02:01:30.664670  # ok 1 bti_c_func/call_using_br_x0 # SKIP

 7069 02:01:30.667353  # ok 1 bti_c_func/call_using_br_x16 # SKIP

 7070 02:01:30.670912  # ok 1 bti_c_func/call_using_blr # SKIP

 7071 02:01:30.674514  # ok 1 bti_j_func/call_using_br_x0 # SKIP

 7072 02:01:30.677378  # ok 1 bti_j_func/call_using_br_x16 # SKIP

 7073 02:01:30.681053  # ok 1 bti_j_func/call_using_blr # SKIP

 7074 02:01:30.684569  # ok 1 bti_jc_func/call_using_br_x0 # SKIP

 7075 02:01:30.690692  # ok 1 bti_jc_func/call_using_br_x16 # SKIP

 7076 02:01:30.693776  # ok 1 bti_jc_func/call_using_blr # SKIP

 7077 02:01:30.697335  # ok 1 paciasp_func/call_using_br_x0 # SKIP

 7078 02:01:30.700764  # ok 1 paciasp_func/call_using_br_x16 # SKIP

 7079 02:01:30.704449  # ok 1 paciasp_func/call_using_blr # SKIP

 7080 02:01:30.710528  # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:18 error:0

 7081 02:01:30.713890  # # WARNING - EXPECTED TEST COUNT WRONG

 7082 02:01:30.717143  ok 43 selftests: arm64: btitest

 7083 02:01:30.720616  # selftests: arm64: nobtitest

 7084 02:01:30.721051  # TAP version 13

 7085 02:01:30.721530  # 1..18

 7086 02:01:30.723771  # # HWCAP_PACA not present

 7087 02:01:30.727200  # # HWCAP2_BTI not present

 7088 02:01:30.730799  # # Test binary not built for BTI

 7089 02:01:30.734110  # ok 1 nohint_func/call_using_br_x0 # SKIP

 7090 02:01:30.736855  # ok 1 nohint_func/call_using_br_x16 # SKIP

 7091 02:01:30.740321  # ok 1 nohint_func/call_using_blr # SKIP

 7092 02:01:30.743688  # ok 1 bti_none_func/call_using_br_x0 # SKIP

 7093 02:01:30.750243  # ok 1 bti_none_func/call_using_br_x16 # SKIP

 7094 02:01:30.753681  # ok 1 bti_none_func/call_using_blr # SKIP

 7095 02:01:30.756838  # ok 1 bti_c_func/call_using_br_x0 # SKIP

 7096 02:01:30.760276  # ok 1 bti_c_func/call_using_br_x16 # SKIP

 7097 02:01:30.763623  # ok 1 bti_c_func/call_using_blr # SKIP

 7098 02:01:30.767242  # ok 1 bti_j_func/call_using_br_x0 # SKIP

 7099 02:01:30.770143  # ok 1 bti_j_func/call_using_br_x16 # SKIP

 7100 02:01:30.776644  # ok 1 bti_j_func/call_using_blr # SKIP

 7101 02:01:30.780320  # ok 1 bti_jc_func/call_using_br_x0 # SKIP

 7102 02:01:30.784026  # ok 1 bti_jc_func/call_using_br_x16 # SKIP

 7103 02:01:30.786447  # ok 1 bti_jc_func/call_using_blr # SKIP

 7104 02:01:30.789867  # ok 1 paciasp_func/call_using_br_x0 # SKIP

 7105 02:01:30.793461  # ok 1 paciasp_func/call_using_br_x16 # SKIP

 7106 02:01:30.799861  # ok 1 paciasp_func/call_using_blr # SKIP

 7107 02:01:30.803640  # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:18 error:0

 7108 02:01:30.806434  # # WARNING - EXPECTED TEST COUNT WRONG

 7109 02:01:30.809862  ok 44 selftests: arm64: nobtitest

 7110 02:01:30.813513  # selftests: arm64: hwcap

 7111 02:01:30.813930  # TAP version 13

 7112 02:01:30.814259  # 1..28

 7113 02:01:30.816434  # ok 1 cpuinfo_match_RNG

 7114 02:01:30.819852  # # SIGILL reported for RNG

 7115 02:01:30.823193  # ok 2 # SKIP sigill_RNG

 7116 02:01:30.823608  # ok 3 cpuinfo_match_SME

 7117 02:01:30.826615  # ok 4 sigill_SME

 7118 02:01:30.827032  # ok 5 cpuinfo_match_SVE

 7119 02:01:30.829845  # ok 6 sigill_SVE

 7120 02:01:30.832809  # ok 7 cpuinfo_match_SVE 2

 7121 02:01:30.836060  # # SIGILL reported for SVE 2

 7122 02:01:30.836479  # ok 8 # SKIP sigill_SVE 2

 7123 02:01:30.839953  # ok 9 cpuinfo_match_SVE AES

 7124 02:01:30.843184  # # SIGILL reported for SVE AES

 7125 02:01:30.846379  # ok 10 # SKIP sigill_SVE AES

 7126 02:01:30.849492  # ok 11 cpuinfo_match_SVE2 PMULL

 7127 02:01:30.853164  # # SIGILL reported for SVE2 PMULL

 7128 02:01:30.853635  # ok 12 # SKIP sigill_SVE2 PMULL

 7129 02:01:30.856226  # ok 13 cpuinfo_match_SVE2 BITPERM

 7130 02:01:30.859686  # # SIGILL reported for SVE2 BITPERM

 7131 02:01:30.863059  # ok 14 # SKIP sigill_SVE2 BITPERM

 7132 02:01:30.866432  # ok 15 cpuinfo_match_SVE2 SHA3

 7133 02:01:30.869374  # # SIGILL reported for SVE2 SHA3

 7134 02:01:30.873498  # ok 16 # SKIP sigill_SVE2 SHA3

 7135 02:01:30.876165  # ok 17 cpuinfo_match_SVE2 SM4

 7136 02:01:30.879719  # # SIGILL reported for SVE2 SM4

 7137 02:01:30.883048  # ok 18 # SKIP sigill_SVE2 SM4

 7138 02:01:30.883748  # ok 19 cpuinfo_match_SVE2 I8MM

 7139 02:01:30.886528  # # SIGILL reported for SVE2 I8MM

 7140 02:01:30.890059  # ok 20 # SKIP sigill_SVE2 I8MM

 7141 02:01:30.892922  # ok 21 cpuinfo_match_SVE2 F32MM

 7142 02:01:30.896218  # # SIGILL reported for SVE2 F32MM

 7143 02:01:30.899747  # ok 22 # SKIP sigill_SVE2 F32MM

 7144 02:01:30.903213  # ok 23 cpuinfo_match_SVE2 F64MM

 7145 02:01:30.906315  # # SIGILL reported for SVE2 F64MM

 7146 02:01:30.909755  # ok 24 # SKIP sigill_SVE2 F64MM

 7147 02:01:30.913334  # ok 25 cpuinfo_match_SVE2 BF16

 7148 02:01:30.913800  # # SIGILL reported for SVE2 BF16

 7149 02:01:30.916453  # ok 26 # SKIP sigill_SVE2 BF16

 7150 02:01:30.919647  # ok 27 cpuinfo_match_SVE2 EBF16

 7151 02:01:30.923041  # ok 28 # SKIP sigill_SVE2 EBF16

 7152 02:01:30.929764  # # Totals: pass:16 fail:0 xfail:0 xpass:0 skip:12 error:0

 7153 02:01:30.930335  ok 45 selftests: arm64: hwcap

 7154 02:01:30.932580  # selftests: arm64: ptrace

 7155 02:01:30.936114  # TAP version 13

 7156 02:01:30.936531  # 1..7

 7157 02:01:30.939491  # # Parent is 1522, child is 1523

 7158 02:01:30.939908  # ok 1 read_tpidr_one

 7159 02:01:30.942505  # ok 2 write_tpidr_one

 7160 02:01:30.946359  # ok 3 verify_tpidr_one

 7161 02:01:30.946773  # ok 4 count_tpidrs

 7162 02:01:30.949206  # ok 5 tpidr2_write

 7163 02:01:30.949665  # ok 6 tpidr2_read

 7164 02:01:30.952903  # ok 7 write_tpidr_only

 7165 02:01:30.959431  # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0

 7166 02:01:30.959847  ok 46 selftests: arm64: ptrace

 7167 02:01:30.962608  # selftests: arm64: syscall-abi

 7168 02:01:30.976657  # TAP version 13

 7169 02:01:30.977286  # 1..2

 7170 02:01:30.980414  # ok 1 getpid() FPSIMD

 7171 02:01:30.983664  # ok 2 sched_yield() FPSIMD

 7172 02:01:30.986689  # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:0 error:0

 7173 02:01:30.989884  ok 47 selftests: arm64: syscall-abi

 7174 02:01:30.998596  # selftests: arm64: tpidr2

 7175 02:01:31.062336  # TAP version 13

 7176 02:01:31.062848  # 1..5

 7177 02:01:31.065737  # # PID: 1559

 7178 02:01:31.066237  # # SME support not present

 7179 02:01:31.069232  # ok 0 skipped, TPIDR2 not supported

 7180 02:01:31.072166  # ok 1 skipped, TPIDR2 not supported

 7181 02:01:31.075484  # ok 2 skipped, TPIDR2 not supported

 7182 02:01:31.078445  # ok 3 skipped, TPIDR2 not supported

 7183 02:01:31.082318  # ok 4 skipped, TPIDR2 not supported

 7184 02:01:31.089024  # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:5 error:0

 7185 02:01:31.091650  ok 48 selftests: arm64: tpidr2

 7186 02:01:32.671233  arm64_tags_test pass

 7187 02:01:32.674784  arm64_run_tags_test_sh pass

 7188 02:01:32.678126  arm64_fake_sigreturn_bad_magic pass

 7189 02:01:32.681089  arm64_fake_sigreturn_bad_size pass

 7190 02:01:32.684354  arm64_fake_sigreturn_bad_size_for_magic0 pass

 7191 02:01:32.688195  arm64_fake_sigreturn_duplicated_fpsimd pass

 7192 02:01:32.691330  arm64_fake_sigreturn_misaligned_sp pass

 7193 02:01:32.694409  arm64_fake_sigreturn_missing_fpsimd pass

 7194 02:01:32.697798  arm64_fake_sigreturn_sme_change_vl skip

 7195 02:01:32.704429  arm64_fake_sigreturn_sve_change_vl skip

 7196 02:01:32.707885  arm64_mangle_pstate_invalid_compat_toggle pass

 7197 02:01:32.711056  arm64_mangle_pstate_invalid_daif_bits pass

 7198 02:01:32.714633  arm64_mangle_pstate_invalid_mode_el1h pass

 7199 02:01:32.718102  arm64_mangle_pstate_invalid_mode_el1t pass

 7200 02:01:32.721191  arm64_mangle_pstate_invalid_mode_el2h pass

 7201 02:01:32.727621  arm64_mangle_pstate_invalid_mode_el2t pass

 7202 02:01:32.731333  arm64_mangle_pstate_invalid_mode_el3h pass

 7203 02:01:32.734598  arm64_mangle_pstate_invalid_mode_el3t pass

 7204 02:01:32.738220  arm64_sme_trap_no_sm skip

 7205 02:01:32.741203  arm64_sme_trap_non_streaming skip

 7206 02:01:32.741661  arm64_sme_trap_za pass

 7207 02:01:32.744578  arm64_sme_vl skip

 7208 02:01:32.744996  arm64_ssve_regs skip

 7209 02:01:32.747733  arm64_sve_regs skip

 7210 02:01:32.748150  arm64_sve_vl skip

 7211 02:01:32.751445  arm64_za_no_regs skip

 7212 02:01:32.751863  arm64_za_regs skip

 7213 02:01:32.754696  arm64_pac_PAUTH_not_enabled skip

 7214 02:01:32.757980  arm64_pac_PAUTH_not_enabled_dup2 skip

 7215 02:01:32.764367  arm64_pac_Generic_PAUTH_not_enabled skip

 7216 02:01:32.767561  arm64_pac_PAUTH_not_enabled_dup3 skip

 7217 02:01:32.770730  arm64_pac_PAUTH_not_enabled_dup4 skip

 7218 02:01:32.774203  arm64_pac_PAUTH_not_enabled_dup5 skip

 7219 02:01:32.777731  arm64_pac_Generic_PAUTH_not_enabled_dup2 skip

 7220 02:01:32.778158  arm64_pac pass

 7221 02:01:32.781047  arm64_fp-stress_FPSIMD-0-0 pass

 7222 02:01:32.784103  arm64_fp-stress_FPSIMD-0-1 pass

 7223 02:01:32.787468  arm64_fp-stress_FPSIMD-1-0 pass

 7224 02:01:32.791164  arm64_fp-stress_FPSIMD-1-1 pass

 7225 02:01:32.794257  arm64_fp-stress_FPSIMD-2-0 pass

 7226 02:01:32.797640  arm64_fp-stress_FPSIMD-2-1 pass

 7227 02:01:32.798178  arm64_fp-stress_FPSIMD-3-0 pass

 7228 02:01:32.801036  arm64_fp-stress_FPSIMD-3-1 pass

 7229 02:01:32.804046  arm64_fp-stress_FPSIMD-4-0 pass

 7230 02:01:32.807450  arm64_fp-stress_FPSIMD-4-1 pass

 7231 02:01:32.810732  arm64_fp-stress_FPSIMD-5-0 pass

 7232 02:01:32.814257  arm64_fp-stress_FPSIMD-5-1 pass

 7233 02:01:32.817691  arm64_fp-stress_FPSIMD-6-0 pass

 7234 02:01:32.820987  arm64_fp-stress_FPSIMD-6-1 pass

 7235 02:01:32.823836  arm64_fp-stress_FPSIMD-7-0 pass

 7236 02:01:32.824308  arm64_fp-stress_FPSIMD-7-1 pass

 7237 02:01:32.827584  arm64_fp-stress pass

 7238 02:01:32.830663  arm64_sve-ptrace_SVE_not_available skip

 7239 02:01:32.834352  arm64_sve-ptrace skip

 7240 02:01:32.837493  arm64_sve-probe-vls_SVE_not_available skip

 7241 02:01:32.840719  arm64_sve-probe-vls skip

 7242 02:01:32.843803  arm64_vec-syscfg_SVE_not_supported skip

 7243 02:01:32.847041  arm64_vec-syscfg_SVE_not_supported_dup2 skip

 7244 02:01:32.850735  arm64_vec-syscfg_SVE_not_supported_dup3 skip

 7245 02:01:32.853737  arm64_vec-syscfg_SVE_not_supported_dup4 skip

 7246 02:01:32.860813  arm64_vec-syscfg_SVE_not_supported_dup5 skip

 7247 02:01:32.863871  arm64_vec-syscfg_SVE_not_supported_dup6 skip

 7248 02:01:32.867333  arm64_vec-syscfg_SVE_not_supported_dup7 skip

 7249 02:01:32.870991  arm64_vec-syscfg_SVE_not_supported_dup8 skip

 7250 02:01:32.877386  arm64_vec-syscfg_SVE_not_supported_dup9 skip

 7251 02:01:32.880621  arm64_vec-syscfg_SVE_not_supported_dup10 skip

 7252 02:01:32.883828  arm64_vec-syscfg_SME_not_supported skip

 7253 02:01:32.887194  arm64_vec-syscfg_SME_not_supported_dup2 skip

 7254 02:01:32.894155  arm64_vec-syscfg_SME_not_supported_dup3 skip

 7255 02:01:32.897055  arm64_vec-syscfg_SME_not_supported_dup4 skip

 7256 02:01:32.900642  arm64_vec-syscfg_SME_not_supported_dup5 skip

 7257 02:01:32.904032  arm64_vec-syscfg_SME_not_supported_dup6 skip

 7258 02:01:32.910394  arm64_vec-syscfg_SME_not_supported_dup7 skip

 7259 02:01:32.914466  arm64_vec-syscfg_SME_not_supported_dup8 skip

 7260 02:01:32.917120  arm64_vec-syscfg_SME_not_supported_dup9 skip

 7261 02:01:32.920585  arm64_vec-syscfg_SME_not_supported_dup10 skip

 7262 02:01:32.923870  arm64_vec-syscfg pass

 7263 02:01:32.926942  arm64_za-fork_skipped pass

 7264 02:01:32.927527  arm64_za-fork pass

 7265 02:01:32.930274  arm64_za-ptrace_SME_not_available skip

 7266 02:01:32.933625  arm64_za-ptrace skip

 7267 02:01:32.937017  arm64_check_buffer_fill skip

 7268 02:01:32.940412  arm64_check_child_memory skip

 7269 02:01:32.940987  arm64_check_gcr_el1_cswitch skip

 7270 02:01:32.943715  arm64_check_ksm_options skip

 7271 02:01:32.947132  arm64_check_mmap_options skip

 7272 02:01:32.950277  arm64_check_prctl_check_basic_read pass

 7273 02:01:32.953570  arm64_check_prctl_NONE pass

 7274 02:01:32.957146  arm64_check_prctl_SYNC skip

 7275 02:01:32.960255  arm64_check_prctl_ASYNC skip

 7276 02:01:32.963695  arm64_check_prctl_SYNC_ASYNC skip

 7277 02:01:32.964086  arm64_check_prctl pass

 7278 02:01:32.966601  arm64_check_tags_inclusion skip

 7279 02:01:32.969951  arm64_check_user_mem skip

 7280 02:01:32.973408  arm64_btitest_nohint_func_call_using_br_x0 skip

 7281 02:01:32.979774  arm64_btitest_nohint_func_call_using_br_x16 skip

 7282 02:01:32.983200  arm64_btitest_nohint_func_call_using_blr skip

 7283 02:01:32.986366  arm64_btitest_bti_none_func_call_using_br_x0 skip

 7284 02:01:32.993195  arm64_btitest_bti_none_func_call_using_br_x16 skip

 7285 02:01:32.996645  arm64_btitest_bti_none_func_call_using_blr skip

 7286 02:01:32.999654  arm64_btitest_bti_c_func_call_using_br_x0 skip

 7287 02:01:33.006772  arm64_btitest_bti_c_func_call_using_br_x16 skip

 7288 02:01:33.009571  arm64_btitest_bti_c_func_call_using_blr skip

 7289 02:01:33.012809  arm64_btitest_bti_j_func_call_using_br_x0 skip

 7290 02:01:33.016108  arm64_btitest_bti_j_func_call_using_br_x16 skip

 7291 02:01:33.023000  arm64_btitest_bti_j_func_call_using_blr skip

 7292 02:01:33.026266  arm64_btitest_bti_jc_func_call_using_br_x0 skip

 7293 02:01:33.029815  arm64_btitest_bti_jc_func_call_using_br_x16 skip

 7294 02:01:33.036075  arm64_btitest_bti_jc_func_call_using_blr skip

 7295 02:01:33.039455  arm64_btitest_paciasp_func_call_using_br_x0 skip

 7296 02:01:33.043030  arm64_btitest_paciasp_func_call_using_br_x16 skip

 7297 02:01:33.046038  arm64_btitest_paciasp_func_call_using_blr skip

 7298 02:01:33.049742  arm64_btitest pass

 7299 02:01:33.052660  arm64_nobtitest_nohint_func_call_using_br_x0 skip

 7300 02:01:33.059479  arm64_nobtitest_nohint_func_call_using_br_x16 skip

 7301 02:01:33.063091  arm64_nobtitest_nohint_func_call_using_blr skip

 7302 02:01:33.066162  arm64_nobtitest_bti_none_func_call_using_br_x0 skip

 7303 02:01:33.072407  arm64_nobtitest_bti_none_func_call_using_br_x16 skip

 7304 02:01:33.075668  arm64_nobtitest_bti_none_func_call_using_blr skip

 7305 02:01:33.079037  arm64_nobtitest_bti_c_func_call_using_br_x0 skip

 7306 02:01:33.085547  arm64_nobtitest_bti_c_func_call_using_br_x16 skip

 7307 02:01:33.088908  arm64_nobtitest_bti_c_func_call_using_blr skip

 7308 02:01:33.092641  arm64_nobtitest_bti_j_func_call_using_br_x0 skip

 7309 02:01:33.099258  arm64_nobtitest_bti_j_func_call_using_br_x16 skip

 7310 02:01:33.102472  arm64_nobtitest_bti_j_func_call_using_blr skip

 7311 02:01:33.105437  arm64_nobtitest_bti_jc_func_call_using_br_x0 skip

 7312 02:01:33.112099  arm64_nobtitest_bti_jc_func_call_using_br_x16 skip

 7313 02:01:33.115530  arm64_nobtitest_bti_jc_func_call_using_blr skip

 7314 02:01:33.118696  arm64_nobtitest_paciasp_func_call_using_br_x0 skip

 7315 02:01:33.125472  arm64_nobtitest_paciasp_func_call_using_br_x16 skip

 7316 02:01:33.128974  arm64_nobtitest_paciasp_func_call_using_blr skip

 7317 02:01:33.131868  arm64_nobtitest pass

 7318 02:01:33.135827  arm64_hwcap_cpuinfo_match_RNG pass

 7319 02:01:33.136381  arm64_hwcap_sigill_RNG skip

 7320 02:01:33.138622  arm64_hwcap_cpuinfo_match_SME pass

 7321 02:01:33.142068  arm64_hwcap_sigill_SME pass

 7322 02:01:33.145082  arm64_hwcap_cpuinfo_match_SVE pass

 7323 02:01:33.148576  arm64_hwcap_sigill_SVE pass

 7324 02:01:33.152409  arm64_hwcap_cpuinfo_match_SVE_2 pass

 7325 02:01:33.155449  arm64_hwcap_sigill_SVE_2 skip

 7326 02:01:33.158668  arm64_hwcap_cpuinfo_match_SVE_AES pass

 7327 02:01:33.159083  arm64_hwcap_sigill_SVE_AES skip

 7328 02:01:33.165374  arm64_hwcap_cpuinfo_match_SVE2_PMULL pass

 7329 02:01:33.165804  arm64_hwcap_sigill_SVE2_PMULL skip

 7330 02:01:33.171790  arm64_hwcap_cpuinfo_match_SVE2_BITPERM pass

 7331 02:01:33.175463  arm64_hwcap_sigill_SVE2_BITPERM skip

 7332 02:01:33.178139  arm64_hwcap_cpuinfo_match_SVE2_SHA3 pass

 7333 02:01:33.181683  arm64_hwcap_sigill_SVE2_SHA3 skip

 7334 02:01:33.184782  arm64_hwcap_cpuinfo_match_SVE2_SM4 pass

 7335 02:01:33.188162  arm64_hwcap_sigill_SVE2_SM4 skip

 7336 02:01:33.191438  arm64_hwcap_cpuinfo_match_SVE2_I8MM pass

 7337 02:01:33.194829  arm64_hwcap_sigill_SVE2_I8MM skip

 7338 02:01:33.198470  arm64_hwcap_cpuinfo_match_SVE2_F32MM pass

 7339 02:01:33.201805  arm64_hwcap_sigill_SVE2_F32MM skip

 7340 02:01:33.205050  arm64_hwcap_cpuinfo_match_SVE2_F64MM pass

 7341 02:01:33.208449  arm64_hwcap_sigill_SVE2_F64MM skip

 7342 02:01:33.211368  arm64_hwcap_cpuinfo_match_SVE2_BF16 pass

 7343 02:01:33.214668  arm64_hwcap_sigill_SVE2_BF16 skip

 7344 02:01:33.218152  arm64_hwcap_cpuinfo_match_SVE2_EBF16 pass

 7345 02:01:33.221390  arm64_hwcap_sigill_SVE2_EBF16 skip

 7346 02:01:33.222058  arm64_hwcap pass

 7347 02:01:33.224796  arm64_ptrace_read_tpidr_one pass

 7348 02:01:33.227976  arm64_ptrace_write_tpidr_one pass

 7349 02:01:33.231561  arm64_ptrace_verify_tpidr_one pass

 7350 02:01:33.234654  arm64_ptrace_count_tpidrs pass

 7351 02:01:33.238094  arm64_ptrace_tpidr2_write pass

 7352 02:01:33.241576  arm64_ptrace_tpidr2_read pass

 7353 02:01:33.244438  arm64_ptrace_write_tpidr_only pass

 7354 02:01:33.244847  arm64_ptrace pass

 7355 02:01:33.247874  arm64_syscall-abi_getpid_FPSIMD pass

 7356 02:01:33.251271  arm64_syscall-abi_sched_yield_FPSIMD pass

 7357 02:01:33.254863  arm64_syscall-abi pass

 7358 02:01:33.257840  arm64_tpidr2_skipped_TPIDR2_not_supported pass

 7359 02:01:33.264856  arm64_tpidr2_skipped_TPIDR2_not_supported_dup2 pass

 7360 02:01:33.267621  arm64_tpidr2_skipped_TPIDR2_not_supported_dup3 pass

 7361 02:01:33.271329  arm64_tpidr2_skipped_TPIDR2_not_supported_dup4 pass

 7362 02:01:33.278171  arm64_tpidr2_skipped_TPIDR2_not_supported_dup5 pass

 7363 02:01:33.278599  arm64_tpidr2 pass

 7364 02:01:33.284254  + ../../utils/send-to-lava.sh ./output/result.txt

 7365 02:01:33.287631  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-arm64 RESULT=pass>

 7366 02:01:33.288396  Received signal: <TESTCASE> TEST_CASE_ID=shardfile-arm64 RESULT=pass
 7368 02:01:33.294595  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tags_test RESULT=pass>

 7369 02:01:33.295309  Received signal: <TESTCASE> TEST_CASE_ID=arm64_tags_test RESULT=pass
 7371 02:01:33.301038  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass>

 7372 02:01:33.301738  Received signal: <TESTCASE> TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass
 7374 02:01:33.307632  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass>

 7375 02:01:33.308332  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass
 7377 02:01:33.314254  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass>

 7378 02:01:33.314940  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass
 7380 02:01:33.329848  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass>

 7381 02:01:33.330112  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass
 7383 02:01:33.374065  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass>

 7384 02:01:33.374322  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass
 7386 02:01:33.413205  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass>

 7387 02:01:33.413911  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass
 7389 02:01:33.468179  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass>

 7390 02:01:33.468858  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass
 7392 02:01:33.522421  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=skip>

 7393 02:01:33.523098  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=skip
 7395 02:01:33.563702  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=skip>

 7396 02:01:33.564466  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=skip
 7398 02:01:33.612979  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass>

 7399 02:01:33.613730  Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass
 7401 02:01:33.658994  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass>

 7402 02:01:33.659665  Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass
 7404 02:01:33.702656  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass>

 7405 02:01:33.703349  Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass
 7407 02:01:33.749178  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass>

 7408 02:01:33.749874  Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass
 7410 02:01:33.793960  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass>

 7411 02:01:33.794709  Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass
 7413 02:01:33.836169  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass>

 7414 02:01:33.836894  Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass
 7416 02:01:33.878084  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass>

 7417 02:01:33.878848  Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass
 7419 02:01:33.919653  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass>

 7420 02:01:33.919943  Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass
 7422 02:01:33.953677  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=skip>

 7423 02:01:33.953948  Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=skip
 7425 02:01:33.990191  Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip
 7427 02:01:33.993170  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip>

 7428 02:01:34.024284  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_za RESULT=pass>

 7429 02:01:34.024595  Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_za RESULT=pass
 7431 02:01:34.062077  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_vl RESULT=skip>

 7432 02:01:34.062574  Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_vl RESULT=skip
 7434 02:01:34.103706  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ssve_regs RESULT=skip>

 7435 02:01:34.104625  Received signal: <TESTCASE> TEST_CASE_ID=arm64_ssve_regs RESULT=skip
 7437 02:01:34.147888  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_regs RESULT=skip>

 7438 02:01:34.148774  Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_regs RESULT=skip
 7440 02:01:34.193212  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_vl RESULT=skip>

 7441 02:01:34.194233  Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_vl RESULT=skip
 7443 02:01:34.232722  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_no_regs RESULT=skip>

 7444 02:01:34.232997  Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_no_regs RESULT=skip
 7446 02:01:34.266690  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_regs RESULT=skip>

 7447 02:01:34.267011  Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_regs RESULT=skip
 7449 02:01:34.303020  Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled RESULT=skip
 7451 02:01:34.305686  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled RESULT=skip>

 7452 02:01:34.339666  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup2 RESULT=skip>

 7453 02:01:34.339973  Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup2 RESULT=skip
 7455 02:01:34.378654  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled RESULT=skip>

 7456 02:01:34.378936  Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled RESULT=skip
 7458 02:01:34.416647  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup3 RESULT=skip>

 7459 02:01:34.416937  Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup3 RESULT=skip
 7461 02:01:34.452674  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup4 RESULT=skip>

 7462 02:01:34.452983  Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup4 RESULT=skip
 7464 02:01:34.486783  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup5 RESULT=skip>

 7465 02:01:34.487067  Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup5 RESULT=skip
 7467 02:01:34.524989  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled_dup2 RESULT=skip>

 7468 02:01:34.525309  Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled_dup2 RESULT=skip
 7470 02:01:34.560129  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac RESULT=pass>

 7471 02:01:34.560391  Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac RESULT=pass
 7473 02:01:34.600335  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass>

 7474 02:01:34.600638  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass
 7476 02:01:34.640893  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-1 RESULT=pass>

 7477 02:01:34.641159  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-1 RESULT=pass
 7479 02:01:34.680518  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-0 RESULT=pass>

 7480 02:01:34.680777  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-0 RESULT=pass
 7482 02:01:34.716385  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-1 RESULT=pass>

 7483 02:01:34.716650  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-1 RESULT=pass
 7485 02:01:34.755006  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-0 RESULT=pass>

 7486 02:01:34.755299  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-0 RESULT=pass
 7488 02:01:34.790523  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-1 RESULT=pass>

 7489 02:01:34.790786  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-1 RESULT=pass
 7491 02:01:34.828645  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-0 RESULT=pass>

 7492 02:01:34.828918  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-0 RESULT=pass
 7494 02:01:34.862991  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-1 RESULT=pass>

 7495 02:01:34.863248  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-1 RESULT=pass
 7497 02:01:34.898372  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-0 RESULT=pass>

 7498 02:01:34.898660  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-0 RESULT=pass
 7500 02:01:34.935686  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-1 RESULT=pass>

 7501 02:01:34.935961  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-1 RESULT=pass
 7503 02:01:34.973861  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-0 RESULT=pass>

 7504 02:01:34.974149  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-0 RESULT=pass
 7506 02:01:35.008230  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-1 RESULT=pass>

 7507 02:01:35.008526  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-1 RESULT=pass
 7509 02:01:35.044740  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-0 RESULT=pass>

 7510 02:01:35.045027  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-0 RESULT=pass
 7512 02:01:35.080468  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-1 RESULT=pass>

 7513 02:01:35.080749  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-1 RESULT=pass
 7515 02:01:35.117034  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-0 RESULT=pass>

 7516 02:01:35.117313  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-0 RESULT=pass
 7518 02:01:35.158228  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-1 RESULT=pass>

 7519 02:01:35.158513  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-1 RESULT=pass
 7521 02:01:35.195112  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress RESULT=pass>

 7522 02:01:35.195397  Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress RESULT=pass
 7524 02:01:35.234730  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_not_available RESULT=skip>

 7525 02:01:35.235008  Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_not_available RESULT=skip
 7527 02:01:35.267979  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace RESULT=skip>

 7528 02:01:35.268240  Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace RESULT=skip
 7530 02:01:35.313685  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_SVE_not_available RESULT=skip>

 7531 02:01:35.313962  Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_SVE_not_available RESULT=skip
 7533 02:01:35.346669  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls RESULT=skip>

 7534 02:01:35.346950  Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls RESULT=skip
 7536 02:01:35.385523  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported RESULT=skip>

 7537 02:01:35.385808  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported RESULT=skip
 7539 02:01:35.423306  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup2 RESULT=skip>

 7540 02:01:35.423600  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup2 RESULT=skip
 7542 02:01:35.459707  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup3 RESULT=skip>

 7543 02:01:35.459991  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup3 RESULT=skip
 7545 02:01:35.498850  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup4 RESULT=skip>

 7546 02:01:35.499144  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup4 RESULT=skip
 7548 02:01:35.539077  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup5 RESULT=skip>

 7549 02:01:35.539359  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup5 RESULT=skip
 7551 02:01:35.572741  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup6 RESULT=skip>

 7552 02:01:35.573020  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup6 RESULT=skip
 7554 02:01:35.611901  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup7 RESULT=skip>

 7555 02:01:35.612186  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup7 RESULT=skip
 7557 02:01:35.649424  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup8 RESULT=skip>

 7558 02:01:35.649714  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup8 RESULT=skip
 7560 02:01:35.687655  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup9 RESULT=skip>

 7561 02:01:35.687932  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup9 RESULT=skip
 7563 02:01:35.727571  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup10 RESULT=skip>

 7564 02:01:35.727855  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup10 RESULT=skip
 7566 02:01:35.770250  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported RESULT=skip>

 7567 02:01:35.770505  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported RESULT=skip
 7569 02:01:35.807772  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup2 RESULT=skip>

 7570 02:01:35.808032  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup2 RESULT=skip
 7572 02:01:35.843628  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup3 RESULT=skip>

 7573 02:01:35.843883  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup3 RESULT=skip
 7575 02:01:35.884827  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup4 RESULT=skip>

 7576 02:01:35.885087  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup4 RESULT=skip
 7578 02:01:35.924080  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup5 RESULT=skip>

 7579 02:01:35.924340  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup5 RESULT=skip
 7581 02:01:35.965098  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup6 RESULT=skip>

 7582 02:01:35.965476  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup6 RESULT=skip
 7584 02:01:36.009250  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup7 RESULT=skip>

 7585 02:01:36.010163  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup7 RESULT=skip
 7587 02:01:36.054871  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup8 RESULT=skip>

 7588 02:01:36.055157  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup8 RESULT=skip
 7590 02:01:36.090486  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup9 RESULT=skip>

 7591 02:01:36.090768  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup9 RESULT=skip
 7593 02:01:36.125545  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup10 RESULT=skip>

 7594 02:01:36.125838  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup10 RESULT=skip
 7596 02:01:36.162515  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg RESULT=pass>

 7597 02:01:36.162818  Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg RESULT=pass
 7599 02:01:36.207783  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork_skipped RESULT=pass>

 7600 02:01:36.208708  Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork_skipped RESULT=pass
 7602 02:01:36.250339  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork RESULT=pass>

 7603 02:01:36.251298  Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork RESULT=pass
 7605 02:01:36.294675  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_SME_not_available RESULT=skip>

 7606 02:01:36.295616  Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_SME_not_available RESULT=skip
 7608 02:01:36.333953  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace RESULT=skip>

 7609 02:01:36.334929  Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace RESULT=skip
 7611 02:01:36.375745  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill RESULT=skip>

 7612 02:01:36.376424  Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill RESULT=skip
 7614 02:01:36.415348  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory RESULT=skip>

 7615 02:01:36.415652  Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory RESULT=skip
 7617 02:01:36.455383  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=skip>

 7618 02:01:36.455685  Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=skip
 7620 02:01:36.497908  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options RESULT=skip>

 7621 02:01:36.498211  Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options RESULT=skip
 7623 02:01:36.536466  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options RESULT=skip>

 7624 02:01:36.536730  Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options RESULT=skip
 7626 02:01:36.580624  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass>

 7627 02:01:36.580890  Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass
 7629 02:01:36.611371  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass>

 7630 02:01:36.611720  Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass
 7632 02:01:36.650244  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=skip>

 7633 02:01:36.650520  Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=skip
 7635 02:01:36.688980  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=skip>

 7636 02:01:36.689250  Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=skip
 7638 02:01:36.722404  Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=skip
 7640 02:01:36.725479  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=skip>

 7641 02:01:36.756791  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl RESULT=pass>

 7642 02:01:36.757076  Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl RESULT=pass
 7644 02:01:36.794587  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion RESULT=skip>

 7645 02:01:36.794898  Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion RESULT=skip
 7647 02:01:36.830754  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem RESULT=skip>

 7648 02:01:36.831015  Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem RESULT=skip
 7650 02:01:36.870935  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=skip>

 7651 02:01:36.871213  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=skip
 7653 02:01:36.906864  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=skip>

 7654 02:01:36.907139  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=skip
 7656 02:01:36.945532  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=skip>

 7657 02:01:36.945792  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=skip
 7659 02:01:36.984098  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=skip>

 7660 02:01:36.984360  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=skip
 7662 02:01:37.023513  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=skip>

 7663 02:01:37.023790  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=skip
 7665 02:01:37.062113  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=skip>

 7666 02:01:37.062414  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=skip
 7668 02:01:37.100015  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=skip>

 7669 02:01:37.100310  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=skip
 7671 02:01:37.136135  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=skip>

 7672 02:01:37.136406  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=skip
 7674 02:01:37.173762  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=skip>

 7675 02:01:37.174042  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=skip
 7677 02:01:37.211041  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=skip>

 7678 02:01:37.211318  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=skip
 7680 02:01:37.251182  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=skip>

 7681 02:01:37.251541  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=skip
 7683 02:01:37.288394  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=skip>

 7684 02:01:37.288666  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=skip
 7686 02:01:37.326626  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=skip>

 7687 02:01:37.326909  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=skip
 7689 02:01:37.363652  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=skip>

 7690 02:01:37.363954  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=skip
 7692 02:01:37.398809  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=skip>

 7693 02:01:37.399086  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=skip
 7695 02:01:37.432525  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=skip>

 7696 02:01:37.432800  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=skip
 7698 02:01:37.472381  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=skip>

 7699 02:01:37.472649  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=skip
 7701 02:01:37.508765  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=skip>

 7702 02:01:37.509068  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=skip
 7704 02:01:37.542226  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest RESULT=pass>

 7705 02:01:37.542490  Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest RESULT=pass
 7707 02:01:37.580619  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=skip>

 7708 02:01:37.580890  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=skip
 7710 02:01:37.618556  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=skip>

 7711 02:01:37.618813  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=skip
 7713 02:01:37.656003  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=skip>

 7714 02:01:37.656274  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=skip
 7716 02:01:37.692830  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=skip>

 7717 02:01:37.693109  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=skip
 7719 02:01:37.729033  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=skip>

 7720 02:01:37.729318  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=skip
 7722 02:01:37.763667  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=skip>

 7723 02:01:37.763928  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=skip
 7725 02:01:37.809355  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=skip>

 7726 02:01:37.809657  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=skip
 7728 02:01:37.845597  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=skip>

 7729 02:01:37.845864  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=skip
 7731 02:01:37.882231  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=skip>

 7732 02:01:37.882490  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=skip
 7734 02:01:37.917109  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=skip>

 7735 02:01:37.917408  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=skip
 7737 02:01:37.954802  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=skip>

 7738 02:01:37.955060  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=skip
 7740 02:01:37.996947  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=skip>

 7741 02:01:37.997239  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=skip
 7743 02:01:38.038716  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=skip>

 7744 02:01:38.038975  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=skip
 7746 02:01:38.075219  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=skip>

 7747 02:01:38.075505  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=skip
 7749 02:01:38.119130  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=skip>

 7750 02:01:38.120036  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=skip
 7752 02:01:38.165655  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=skip>

 7753 02:01:38.166485  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=skip
 7755 02:01:38.212169  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=skip>

 7756 02:01:38.212854  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=skip
 7758 02:01:38.266150  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=skip>

 7759 02:01:38.266834  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=skip
 7761 02:01:38.308471  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest RESULT=pass>

 7762 02:01:38.308736  Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest RESULT=pass
 7764 02:01:38.353614  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass
 7766 02:01:38.356975  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass>

 7767 02:01:38.398555  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=skip>

 7768 02:01:38.398820  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=skip
 7770 02:01:38.442215  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass>

 7771 02:01:38.442475  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass
 7773 02:01:38.475981  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass>

 7774 02:01:38.476272  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass
 7776 02:01:38.517961  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass>

 7777 02:01:38.518225  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass
 7779 02:01:38.557132  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass>

 7780 02:01:38.557388  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass
 7782 02:01:38.595176  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass>

 7783 02:01:38.595435  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass
 7785 02:01:38.630619  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=skip>

 7786 02:01:38.630884  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=skip
 7788 02:01:38.671724  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass>

 7789 02:01:38.671993  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass
 7791 02:01:38.708452  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=skip>

 7792 02:01:38.708717  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=skip
 7794 02:01:38.751888  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass>

 7795 02:01:38.752172  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass
 7797 02:01:38.788389  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=skip>

 7798 02:01:38.788663  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=skip
 7800 02:01:38.830852  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass>

 7801 02:01:38.831124  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass
 7803 02:01:38.868721  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=skip>

 7804 02:01:38.868990  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=skip
 7806 02:01:38.905397  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass>

 7807 02:01:38.905656  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass
 7809 02:01:38.937765  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=skip
 7811 02:01:38.940836  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=skip>

 7812 02:01:38.973649  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass>

 7813 02:01:38.973917  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass
 7815 02:01:39.009859  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=skip
 7817 02:01:39.013043  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=skip>

 7818 02:01:39.052702  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass>

 7819 02:01:39.052966  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass
 7821 02:01:39.090712  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=skip
 7823 02:01:39.093349  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=skip>

 7824 02:01:39.132052  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass>

 7825 02:01:39.132347  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass
 7827 02:01:39.172797  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=skip>

 7828 02:01:39.173087  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=skip
 7830 02:01:39.209664  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass>

 7831 02:01:39.209929  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass
 7833 02:01:39.253179  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=skip>

 7834 02:01:39.254093  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=skip
 7836 02:01:39.295212  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass>

 7837 02:01:39.295904  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass
 7839 02:01:39.338125  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=skip
 7841 02:01:39.341295  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=skip>

 7842 02:01:39.394488  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass>

 7843 02:01:39.394779  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass
 7845 02:01:39.427725  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip
 7847 02:01:39.430462  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip>

 7848 02:01:39.465569  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap RESULT=pass>

 7849 02:01:39.465847  Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap RESULT=pass
 7851 02:01:39.509128  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass>

 7852 02:01:39.509396  Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass
 7854 02:01:39.549215  Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass
 7856 02:01:39.552098  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass>

 7857 02:01:39.589482  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass>

 7858 02:01:39.589738  Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass
 7860 02:01:39.625853  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass>

 7861 02:01:39.626114  Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass
 7863 02:01:39.667375  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass>

 7864 02:01:39.667630  Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass
 7866 02:01:39.707971  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass>

 7867 02:01:39.708232  Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass
 7869 02:01:39.749040  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass>

 7870 02:01:39.749307  Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass
 7872 02:01:39.784484  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace RESULT=pass>

 7873 02:01:39.784738  Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace RESULT=pass
 7875 02:01:39.831236  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass>

 7876 02:01:39.831612  Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass
 7878 02:01:39.872474  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass>

 7879 02:01:39.872735  Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass
 7881 02:01:39.909124  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi RESULT=pass>

 7882 02:01:39.909392  Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi RESULT=pass
 7884 02:01:39.948389  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported RESULT=pass>

 7885 02:01:39.948650  Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported RESULT=pass
 7887 02:01:39.990498  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup2 RESULT=pass>

 7888 02:01:39.990764  Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup2 RESULT=pass
 7890 02:01:40.030995  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup3 RESULT=pass>

 7891 02:01:40.031259  Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup3 RESULT=pass
 7893 02:01:40.072181  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup4 RESULT=pass>

 7894 02:01:40.072458  Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup4 RESULT=pass
 7896 02:01:40.107019  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup5 RESULT=pass>

 7897 02:01:40.107284  Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup5 RESULT=pass
 7899 02:01:40.145004  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2 RESULT=pass>

 7900 02:01:40.145093  + set +x

 7901 02:01:40.145339  Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2 RESULT=pass
 7903 02:01:40.151562  <LAVA_SIGNAL_ENDRUN 1_kselftest-arm64 14479219_1.6.2.3.5>

 7904 02:01:40.151815  Received signal: <ENDRUN> 1_kselftest-arm64 14479219_1.6.2.3.5
 7905 02:01:40.151889  Ending use of test pattern.
 7906 02:01:40.151950  Ending test lava.1_kselftest-arm64 (14479219_1.6.2.3.5), duration 30.22
 7908 02:01:40.155196  <LAVA_TEST_RUNNER EXIT>

 7909 02:01:40.155448  ok: lava_test_shell seems to have completed
 7910 02:01:40.156604  arm64_btitest: pass
arm64_btitest_bti_c_func_call_using_blr: skip
arm64_btitest_bti_c_func_call_using_br_x0: skip
arm64_btitest_bti_c_func_call_using_br_x16: skip
arm64_btitest_bti_j_func_call_using_blr: skip
arm64_btitest_bti_j_func_call_using_br_x0: skip
arm64_btitest_bti_j_func_call_using_br_x16: skip
arm64_btitest_bti_jc_func_call_using_blr: skip
arm64_btitest_bti_jc_func_call_using_br_x0: skip
arm64_btitest_bti_jc_func_call_using_br_x16: skip
arm64_btitest_bti_none_func_call_using_blr: skip
arm64_btitest_bti_none_func_call_using_br_x0: skip
arm64_btitest_bti_none_func_call_using_br_x16: skip
arm64_btitest_nohint_func_call_using_blr: skip
arm64_btitest_nohint_func_call_using_br_x0: skip
arm64_btitest_nohint_func_call_using_br_x16: skip
arm64_btitest_paciasp_func_call_using_blr: skip
arm64_btitest_paciasp_func_call_using_br_x0: skip
arm64_btitest_paciasp_func_call_using_br_x16: skip
arm64_check_buffer_fill: skip
arm64_check_child_memory: skip
arm64_check_gcr_el1_cswitch: skip
arm64_check_ksm_options: skip
arm64_check_mmap_options: skip
arm64_check_prctl: pass
arm64_check_prctl_ASYNC: skip
arm64_check_prctl_NONE: pass
arm64_check_prctl_SYNC: skip
arm64_check_prctl_SYNC_ASYNC: skip
arm64_check_prctl_check_basic_read: pass
arm64_check_tags_inclusion: skip
arm64_check_user_mem: skip
arm64_fake_sigreturn_bad_magic: pass
arm64_fake_sigreturn_bad_size: pass
arm64_fake_sigreturn_bad_size_for_magic0: pass
arm64_fake_sigreturn_duplicated_fpsimd: pass
arm64_fake_sigreturn_misaligned_sp: pass
arm64_fake_sigreturn_missing_fpsimd: pass
arm64_fake_sigreturn_sme_change_vl: skip
arm64_fake_sigreturn_sve_change_vl: skip
arm64_fp-stress: pass
arm64_fp-stress_FPSIMD-0-0: pass
arm64_fp-stress_FPSIMD-0-1: pass
arm64_fp-stress_FPSIMD-1-0: pass
arm64_fp-stress_FPSIMD-1-1: pass
arm64_fp-stress_FPSIMD-2-0: pass
arm64_fp-stress_FPSIMD-2-1: pass
arm64_fp-stress_FPSIMD-3-0: pass
arm64_fp-stress_FPSIMD-3-1: pass
arm64_fp-stress_FPSIMD-4-0: pass
arm64_fp-stress_FPSIMD-4-1: pass
arm64_fp-stress_FPSIMD-5-0: pass
arm64_fp-stress_FPSIMD-5-1: pass
arm64_fp-stress_FPSIMD-6-0: pass
arm64_fp-stress_FPSIMD-6-1: pass
arm64_fp-stress_FPSIMD-7-0: pass
arm64_fp-stress_FPSIMD-7-1: pass
arm64_hwcap: pass
arm64_hwcap_cpuinfo_match_RNG: pass
arm64_hwcap_cpuinfo_match_SME: pass
arm64_hwcap_cpuinfo_match_SVE: pass
arm64_hwcap_cpuinfo_match_SVE2_BF16: pass
arm64_hwcap_cpuinfo_match_SVE2_BITPERM: pass
arm64_hwcap_cpuinfo_match_SVE2_EBF16: pass
arm64_hwcap_cpuinfo_match_SVE2_F32MM: pass
arm64_hwcap_cpuinfo_match_SVE2_F64MM: pass
arm64_hwcap_cpuinfo_match_SVE2_I8MM: pass
arm64_hwcap_cpuinfo_match_SVE2_PMULL: pass
arm64_hwcap_cpuinfo_match_SVE2_SHA3: pass
arm64_hwcap_cpuinfo_match_SVE2_SM4: pass
arm64_hwcap_cpuinfo_match_SVE_2: pass
arm64_hwcap_cpuinfo_match_SVE_AES: pass
arm64_hwcap_sigill_RNG: skip
arm64_hwcap_sigill_SME: pass
arm64_hwcap_sigill_SVE: pass
arm64_hwcap_sigill_SVE2_BF16: skip
arm64_hwcap_sigill_SVE2_BITPERM: skip
arm64_hwcap_sigill_SVE2_EBF16: skip
arm64_hwcap_sigill_SVE2_F32MM: skip
arm64_hwcap_sigill_SVE2_F64MM: skip
arm64_hwcap_sigill_SVE2_I8MM: skip
arm64_hwcap_sigill_SVE2_PMULL: skip
arm64_hwcap_sigill_SVE2_SHA3: skip
arm64_hwcap_sigill_SVE2_SM4: skip
arm64_hwcap_sigill_SVE_2: skip
arm64_hwcap_sigill_SVE_AES: skip
arm64_mangle_pstate_invalid_compat_toggle: pass
arm64_mangle_pstate_invalid_daif_bits: pass
arm64_mangle_pstate_invalid_mode_el1h: pass
arm64_mangle_pstate_invalid_mode_el1t: pass
arm64_mangle_pstate_invalid_mode_el2h: pass
arm64_mangle_pstate_invalid_mode_el2t: pass
arm64_mangle_pstate_invalid_mode_el3h: pass
arm64_mangle_pstate_invalid_mode_el3t: pass
arm64_nobtitest: pass
arm64_nobtitest_bti_c_func_call_using_blr: skip
arm64_nobtitest_bti_c_func_call_using_br_x0: skip
arm64_nobtitest_bti_c_func_call_using_br_x16: skip
arm64_nobtitest_bti_j_func_call_using_blr: skip
arm64_nobtitest_bti_j_func_call_using_br_x0: skip
arm64_nobtitest_bti_j_func_call_using_br_x16: skip
arm64_nobtitest_bti_jc_func_call_using_blr: skip
arm64_nobtitest_bti_jc_func_call_using_br_x0: skip
arm64_nobtitest_bti_jc_func_call_using_br_x16: skip
arm64_nobtitest_bti_none_func_call_using_blr: skip
arm64_nobtitest_bti_none_func_call_using_br_x0: skip
arm64_nobtitest_bti_none_func_call_using_br_x16: skip
arm64_nobtitest_nohint_func_call_using_blr: skip
arm64_nobtitest_nohint_func_call_using_br_x0: skip
arm64_nobtitest_nohint_func_call_using_br_x16: skip
arm64_nobtitest_paciasp_func_call_using_blr: skip
arm64_nobtitest_paciasp_func_call_using_br_x0: skip
arm64_nobtitest_paciasp_func_call_using_br_x16: skip
arm64_pac: pass
arm64_pac_Generic_PAUTH_not_enabled: skip
arm64_pac_Generic_PAUTH_not_enabled_dup2: skip
arm64_pac_PAUTH_not_enabled: skip
arm64_pac_PAUTH_not_enabled_dup2: skip
arm64_pac_PAUTH_not_enabled_dup3: skip
arm64_pac_PAUTH_not_enabled_dup4: skip
arm64_pac_PAUTH_not_enabled_dup5: skip
arm64_ptrace: pass
arm64_ptrace_count_tpidrs: pass
arm64_ptrace_read_tpidr_one: pass
arm64_ptrace_tpidr2_read: pass
arm64_ptrace_tpidr2_write: pass
arm64_ptrace_verify_tpidr_one: pass
arm64_ptrace_write_tpidr_one: pass
arm64_ptrace_write_tpidr_only: pass
arm64_run_tags_test_sh: pass
arm64_sme_trap_no_sm: skip
arm64_sme_trap_non_streaming: skip
arm64_sme_trap_za: pass
arm64_sme_vl: skip
arm64_ssve_regs: skip
arm64_sve-probe-vls: skip
arm64_sve-probe-vls_SVE_not_available: skip
arm64_sve-ptrace: skip
arm64_sve-ptrace_SVE_not_available: skip
arm64_sve_regs: skip
arm64_sve_vl: skip
arm64_syscall-abi: pass
arm64_syscall-abi_getpid_FPSIMD: pass
arm64_syscall-abi_sched_yield_FPSIMD: pass
arm64_tags_test: pass
arm64_tpidr2: pass
arm64_tpidr2_skipped_TPIDR2_not_supported: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup2: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup3: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup4: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup5: pass
arm64_vec-syscfg: pass
arm64_vec-syscfg_SME_not_supported: skip
arm64_vec-syscfg_SME_not_supported_dup10: skip
arm64_vec-syscfg_SME_not_supported_dup2: skip
arm64_vec-syscfg_SME_not_supported_dup3: skip
arm64_vec-syscfg_SME_not_supported_dup4: skip
arm64_vec-syscfg_SME_not_supported_dup5: skip
arm64_vec-syscfg_SME_not_supported_dup6: skip
arm64_vec-syscfg_SME_not_supported_dup7: skip
arm64_vec-syscfg_SME_not_supported_dup8: skip
arm64_vec-syscfg_SME_not_supported_dup9: skip
arm64_vec-syscfg_SVE_not_supported: skip
arm64_vec-syscfg_SVE_not_supported_dup10: skip
arm64_vec-syscfg_SVE_not_supported_dup2: skip
arm64_vec-syscfg_SVE_not_supported_dup3: skip
arm64_vec-syscfg_SVE_not_supported_dup4: skip
arm64_vec-syscfg_SVE_not_supported_dup5: skip
arm64_vec-syscfg_SVE_not_supported_dup6: skip
arm64_vec-syscfg_SVE_not_supported_dup7: skip
arm64_vec-syscfg_SVE_not_supported_dup8: skip
arm64_vec-syscfg_SVE_not_supported_dup9: skip
arm64_za-fork: pass
arm64_za-fork_skipped: pass
arm64_za-ptrace: skip
arm64_za-ptrace_SME_not_available: skip
arm64_za_no_regs: skip
arm64_za_regs: skip
shardfile-arm64: pass

 7911 02:01:40.156763  end: 3.1 lava-test-shell (duration 00:00:31) [common]
 7912 02:01:40.156850  end: 3 lava-test-retry (duration 00:00:31) [common]
 7913 02:01:40.156936  start: 4 finalize (timeout 00:07:31) [common]
 7914 02:01:40.157027  start: 4.1 power-off (timeout 00:00:30) [common]
 7915 02:01:40.157185  Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
 7916 02:01:41.506920  >> Command sent successfully.

 7917 02:01:41.516922  Returned 0 in 1 seconds
 7918 02:01:41.617873  end: 4.1 power-off (duration 00:00:01) [common]
 7920 02:01:41.618316  start: 4.2 read-feedback (timeout 00:07:30) [common]
 7921 02:01:41.618701  Listened to connection for namespace 'common' for up to 1s
 7922 02:01:42.619419  Finalising connection for namespace 'common'
 7923 02:01:42.619631  Disconnecting from shell: Finalise
 7924 02:01:42.619743  / # 
 7925 02:01:42.720272  end: 4.2 read-feedback (duration 00:00:01) [common]
 7926 02:01:42.720728  end: 4 finalize (duration 00:00:03) [common]
 7927 02:01:42.721078  Cleaning after the job
 7928 02:01:42.721494  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/ramdisk
 7929 02:01:42.728059  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/kernel
 7930 02:01:42.757359  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/dtb
 7931 02:01:42.757745  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/nfsrootfs
 7932 02:01:42.820629  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479219/tftp-deploy-exyhzxbh/modules
 7933 02:01:42.825719  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14479219
 7934 02:01:43.373598  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14479219
 7935 02:01:43.373782  Job finished correctly