Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 42
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 88
1 01:56:44.048590 lava-dispatcher, installed at version: 2024.03
2 01:56:44.048850 start: 0 validate
3 01:56:44.048995 Start time: 2024-06-21 01:56:44.048988+00:00 (UTC)
4 01:56:44.049185 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:56:44.049404 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:56:44.334024 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:56:44.334209 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 01:56:44.590940 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:56:44.591143 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 01:56:44.848910 Using caching service: 'http://localhost/cache/?uri=%s'
11 01:56:44.849071 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:56:45.362478 Using caching service: 'http://localhost/cache/?uri=%s'
13 01:56:45.362750 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 01:56:45.613036 validate duration: 1.56
16 01:56:45.613338 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:56:45.613457 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:56:45.613561 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:56:45.613812 Not decompressing ramdisk as can be used compressed.
20 01:56:45.613931 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 01:56:45.614011 saving as /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/ramdisk/initrd.cpio.gz
22 01:56:45.614081 total size: 5628169 (5 MB)
23 01:56:45.615139 progress 0 % (0 MB)
24 01:56:45.616977 progress 5 % (0 MB)
25 01:56:45.618811 progress 10 % (0 MB)
26 01:56:45.620385 progress 15 % (0 MB)
27 01:56:45.622114 progress 20 % (1 MB)
28 01:56:45.623668 progress 25 % (1 MB)
29 01:56:45.625458 progress 30 % (1 MB)
30 01:56:45.627164 progress 35 % (1 MB)
31 01:56:45.628689 progress 40 % (2 MB)
32 01:56:45.630460 progress 45 % (2 MB)
33 01:56:45.632000 progress 50 % (2 MB)
34 01:56:45.633680 progress 55 % (2 MB)
35 01:56:45.635445 progress 60 % (3 MB)
36 01:56:45.636952 progress 65 % (3 MB)
37 01:56:45.638673 progress 70 % (3 MB)
38 01:56:45.640259 progress 75 % (4 MB)
39 01:56:45.641959 progress 80 % (4 MB)
40 01:56:45.643461 progress 85 % (4 MB)
41 01:56:45.645227 progress 90 % (4 MB)
42 01:56:45.646940 progress 95 % (5 MB)
43 01:56:45.648501 progress 100 % (5 MB)
44 01:56:45.648739 5 MB downloaded in 0.03 s (154.91 MB/s)
45 01:56:45.648900 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:56:45.649153 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:56:45.649243 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:56:45.649329 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:56:45.649472 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 01:56:45.649541 saving as /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/kernel/Image
52 01:56:45.649601 total size: 54813184 (52 MB)
53 01:56:45.649664 No compression specified
54 01:56:45.650770 progress 0 % (0 MB)
55 01:56:45.666106 progress 5 % (2 MB)
56 01:56:45.681752 progress 10 % (5 MB)
57 01:56:45.697305 progress 15 % (7 MB)
58 01:56:45.713255 progress 20 % (10 MB)
59 01:56:45.728655 progress 25 % (13 MB)
60 01:56:45.744046 progress 30 % (15 MB)
61 01:56:45.759759 progress 35 % (18 MB)
62 01:56:45.775346 progress 40 % (20 MB)
63 01:56:45.790821 progress 45 % (23 MB)
64 01:56:45.806416 progress 50 % (26 MB)
65 01:56:45.822104 progress 55 % (28 MB)
66 01:56:45.837554 progress 60 % (31 MB)
67 01:56:45.853262 progress 65 % (34 MB)
68 01:56:45.868608 progress 70 % (36 MB)
69 01:56:45.884150 progress 75 % (39 MB)
70 01:56:45.899642 progress 80 % (41 MB)
71 01:56:45.914982 progress 85 % (44 MB)
72 01:56:45.930467 progress 90 % (47 MB)
73 01:56:45.945903 progress 95 % (49 MB)
74 01:56:45.961018 progress 100 % (52 MB)
75 01:56:45.961271 52 MB downloaded in 0.31 s (167.72 MB/s)
76 01:56:45.961434 end: 1.2.1 http-download (duration 00:00:00) [common]
78 01:56:45.961674 end: 1.2 download-retry (duration 00:00:00) [common]
79 01:56:45.961781 start: 1.3 download-retry (timeout 00:10:00) [common]
80 01:56:45.961870 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 01:56:45.962012 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 01:56:45.962081 saving as /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 01:56:45.962142 total size: 57695 (0 MB)
84 01:56:45.962205 No compression specified
85 01:56:45.963417 progress 56 % (0 MB)
86 01:56:45.963712 progress 100 % (0 MB)
87 01:56:45.963928 0 MB downloaded in 0.00 s (30.86 MB/s)
88 01:56:45.964054 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:56:45.964287 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:56:45.964375 start: 1.4 download-retry (timeout 00:10:00) [common]
92 01:56:45.964463 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 01:56:45.964578 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 01:56:45.964647 saving as /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/nfsrootfs/full.rootfs.tar
95 01:56:45.964706 total size: 120894716 (115 MB)
96 01:56:45.964767 Using unxz to decompress xz
97 01:56:45.966446 progress 0 % (0 MB)
98 01:56:46.356240 progress 5 % (5 MB)
99 01:56:46.757422 progress 10 % (11 MB)
100 01:56:47.149571 progress 15 % (17 MB)
101 01:56:47.523807 progress 20 % (23 MB)
102 01:56:47.863736 progress 25 % (28 MB)
103 01:56:48.264289 progress 30 % (34 MB)
104 01:56:48.640387 progress 35 % (40 MB)
105 01:56:48.830573 progress 40 % (46 MB)
106 01:56:49.034537 progress 45 % (51 MB)
107 01:56:49.394052 progress 50 % (57 MB)
108 01:56:49.809035 progress 55 % (63 MB)
109 01:56:50.196069 progress 60 % (69 MB)
110 01:56:50.569464 progress 65 % (74 MB)
111 01:56:50.942624 progress 70 % (80 MB)
112 01:56:51.321923 progress 75 % (86 MB)
113 01:56:51.687813 progress 80 % (92 MB)
114 01:56:52.063320 progress 85 % (98 MB)
115 01:56:52.439049 progress 90 % (103 MB)
116 01:56:52.797863 progress 95 % (109 MB)
117 01:56:53.187892 progress 100 % (115 MB)
118 01:56:53.193955 115 MB downloaded in 7.23 s (15.95 MB/s)
119 01:56:53.194145 end: 1.4.1 http-download (duration 00:00:07) [common]
121 01:56:53.194415 end: 1.4 download-retry (duration 00:00:07) [common]
122 01:56:53.194521 start: 1.5 download-retry (timeout 00:09:52) [common]
123 01:56:53.194624 start: 1.5.1 http-download (timeout 00:09:52) [common]
124 01:56:53.194784 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 01:56:53.194860 saving as /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/modules/modules.tar
126 01:56:53.194960 total size: 8618924 (8 MB)
127 01:56:53.195064 Using unxz to decompress xz
128 01:56:53.196810 progress 0 % (0 MB)
129 01:56:53.218961 progress 5 % (0 MB)
130 01:56:53.246192 progress 10 % (0 MB)
131 01:56:53.274163 progress 15 % (1 MB)
132 01:56:53.301365 progress 20 % (1 MB)
133 01:56:53.328432 progress 25 % (2 MB)
134 01:56:53.354998 progress 30 % (2 MB)
135 01:56:53.382130 progress 35 % (2 MB)
136 01:56:53.408236 progress 40 % (3 MB)
137 01:56:53.434729 progress 45 % (3 MB)
138 01:56:53.460642 progress 50 % (4 MB)
139 01:56:53.487510 progress 55 % (4 MB)
140 01:56:53.513775 progress 60 % (4 MB)
141 01:56:53.539315 progress 65 % (5 MB)
142 01:56:53.569179 progress 70 % (5 MB)
143 01:56:53.595992 progress 75 % (6 MB)
144 01:56:53.621865 progress 80 % (6 MB)
145 01:56:53.647228 progress 85 % (7 MB)
146 01:56:53.672804 progress 90 % (7 MB)
147 01:56:53.701884 progress 95 % (7 MB)
148 01:56:53.734149 progress 100 % (8 MB)
149 01:56:53.739726 8 MB downloaded in 0.54 s (15.09 MB/s)
150 01:56:53.739967 end: 1.5.1 http-download (duration 00:00:01) [common]
152 01:56:53.740368 end: 1.5 download-retry (duration 00:00:01) [common]
153 01:56:53.740499 start: 1.6 prepare-tftp-overlay (timeout 00:09:52) [common]
154 01:56:53.740630 start: 1.6.1 extract-nfsrootfs (timeout 00:09:52) [common]
155 01:56:57.828775 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14479198/extract-nfsrootfs-vfnpth8r
156 01:56:57.828950 end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
157 01:56:57.829069 start: 1.6.2 lava-overlay (timeout 00:09:48) [common]
158 01:56:57.829280 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw
159 01:56:57.829411 makedir: /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin
160 01:56:57.829513 makedir: /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/tests
161 01:56:57.829612 makedir: /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/results
162 01:56:57.829705 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-add-keys
163 01:56:57.829851 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-add-sources
164 01:56:57.829983 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-background-process-start
165 01:56:57.830118 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-background-process-stop
166 01:56:57.830257 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-common-functions
167 01:56:57.830389 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-echo-ipv4
168 01:56:57.830517 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-install-packages
169 01:56:57.830643 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-installed-packages
170 01:56:57.830769 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-os-build
171 01:56:57.830895 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-probe-channel
172 01:56:57.831021 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-probe-ip
173 01:56:57.831148 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-target-ip
174 01:56:57.831274 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-target-mac
175 01:56:57.831400 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-target-storage
176 01:56:57.831529 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-test-case
177 01:56:57.831657 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-test-event
178 01:56:57.831783 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-test-feedback
179 01:56:57.831909 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-test-raise
180 01:56:57.832033 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-test-reference
181 01:56:57.832159 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-test-runner
182 01:56:57.832284 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-test-set
183 01:56:57.832409 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-test-shell
184 01:56:57.832537 Updating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-add-keys (debian)
185 01:56:57.832690 Updating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-add-sources (debian)
186 01:56:57.832839 Updating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-install-packages (debian)
187 01:56:57.832983 Updating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-installed-packages (debian)
188 01:56:57.833125 Updating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/bin/lava-os-build (debian)
189 01:56:57.833252 Creating /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/environment
190 01:56:57.833353 LAVA metadata
191 01:56:57.833425 - LAVA_JOB_ID=14479198
192 01:56:57.833488 - LAVA_DISPATCHER_IP=192.168.201.1
193 01:56:57.833591 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:48) [common]
194 01:56:57.833654 skipped lava-vland-overlay
195 01:56:57.833844 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 01:56:57.833930 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
197 01:56:57.833991 skipped lava-multinode-overlay
198 01:56:57.834066 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 01:56:57.834145 start: 1.6.2.3 test-definition (timeout 00:09:48) [common]
200 01:56:57.834214 Loading test definitions
201 01:56:57.834297 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:48) [common]
202 01:56:57.834363 Using /lava-14479198 at stage 0
203 01:56:57.834664 uuid=14479198_1.6.2.3.1 testdef=None
204 01:56:57.834754 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 01:56:57.834837 start: 1.6.2.3.2 test-overlay (timeout 00:09:48) [common]
206 01:56:57.835282 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 01:56:57.835510 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:48) [common]
209 01:56:57.836077 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 01:56:57.836312 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
212 01:56:57.836864 runner path: /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/0/tests/0_timesync-off test_uuid 14479198_1.6.2.3.1
213 01:56:57.837025 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 01:56:57.837253 start: 1.6.2.3.5 git-repo-action (timeout 00:09:48) [common]
216 01:56:57.837327 Using /lava-14479198 at stage 0
217 01:56:57.837425 Fetching tests from https://github.com/kernelci/test-definitions.git
218 01:56:57.837507 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/0/tests/1_kselftest-rtc'
219 01:57:00.088653 Running '/usr/bin/git checkout kernelci.org
220 01:57:00.172441 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
221 01:57:00.172842 uuid=14479198_1.6.2.3.5 testdef=None
222 01:57:00.172955 end: 1.6.2.3.5 git-repo-action (duration 00:00:02) [common]
224 01:57:00.173176 start: 1.6.2.3.6 test-overlay (timeout 00:09:45) [common]
225 01:57:00.173904 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 01:57:00.174138 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:45) [common]
228 01:57:00.175107 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 01:57:00.175358 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:45) [common]
231 01:57:00.176302 runner path: /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/0/tests/1_kselftest-rtc test_uuid 14479198_1.6.2.3.5
232 01:57:00.176391 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 01:57:00.176458 BRANCH='cip'
234 01:57:00.176518 SKIPFILE='/dev/null'
235 01:57:00.176577 SKIP_INSTALL='True'
236 01:57:00.176633 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
237 01:57:00.176691 TST_CASENAME=''
238 01:57:00.176747 TST_CMDFILES='rtc'
239 01:57:00.176896 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 01:57:00.177103 Creating lava-test-runner.conf files
242 01:57:00.177166 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14479198/lava-overlay-4b5170hw/lava-14479198/0 for stage 0
243 01:57:00.177260 - 0_timesync-off
244 01:57:00.177328 - 1_kselftest-rtc
245 01:57:00.177427 end: 1.6.2.3 test-definition (duration 00:00:02) [common]
246 01:57:00.177514 start: 1.6.2.4 compress-overlay (timeout 00:09:45) [common]
247 01:57:08.232133 end: 1.6.2.4 compress-overlay (duration 00:00:08) [common]
248 01:57:08.232275 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
249 01:57:08.232371 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 01:57:08.232463 end: 1.6.2 lava-overlay (duration 00:00:10) [common]
251 01:57:08.232552 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
252 01:57:08.407141 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 01:57:08.407301 start: 1.6.4 extract-modules (timeout 00:09:37) [common]
254 01:57:08.407388 extracting modules file /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14479198/extract-nfsrootfs-vfnpth8r
255 01:57:08.665092 extracting modules file /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14479198/extract-overlay-ramdisk-4nm57hor/ramdisk
256 01:57:08.926871 end: 1.6.4 extract-modules (duration 00:00:01) [common]
257 01:57:08.927052 start: 1.6.5 apply-overlay-tftp (timeout 00:09:37) [common]
258 01:57:08.927169 [common] Applying overlay to NFS
259 01:57:08.927263 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14479198/compress-overlay-3awnp8lr/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14479198/extract-nfsrootfs-vfnpth8r
260 01:57:09.879338 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 01:57:09.879485 start: 1.6.6 configure-preseed-file (timeout 00:09:36) [common]
262 01:57:09.879580 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 01:57:09.879669 start: 1.6.7 compress-ramdisk (timeout 00:09:36) [common]
264 01:57:09.879745 Building ramdisk /var/lib/lava/dispatcher/tmp/14479198/extract-overlay-ramdisk-4nm57hor/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14479198/extract-overlay-ramdisk-4nm57hor/ramdisk
265 01:57:10.350249 >> 130487 blocks
266 01:57:12.703490 rename /var/lib/lava/dispatcher/tmp/14479198/extract-overlay-ramdisk-4nm57hor/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/ramdisk/ramdisk.cpio.gz
267 01:57:12.703659 end: 1.6.7 compress-ramdisk (duration 00:00:03) [common]
268 01:57:12.703758 start: 1.6.8 prepare-kernel (timeout 00:09:33) [common]
269 01:57:12.703847 start: 1.6.8.1 prepare-fit (timeout 00:09:33) [common]
270 01:57:12.703934 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/kernel/Image']
271 01:57:27.280939 Returned 0 in 14 seconds
272 01:57:27.381480 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/kernel/image.itb
273 01:57:27.899721 output: FIT description: Kernel Image image with one or more FDT blobs
274 01:57:27.899872 output: Created: Fri Jun 21 02:57:27 2024
275 01:57:27.899960 output: Image 0 (kernel-1)
276 01:57:27.900032 output: Description:
277 01:57:27.900097 output: Created: Fri Jun 21 02:57:27 2024
278 01:57:27.900161 output: Type: Kernel Image
279 01:57:27.900225 output: Compression: lzma compressed
280 01:57:27.900292 output: Data Size: 13124896 Bytes = 12817.28 KiB = 12.52 MiB
281 01:57:27.900357 output: Architecture: AArch64
282 01:57:27.900417 output: OS: Linux
283 01:57:27.900485 output: Load Address: 0x00000000
284 01:57:27.900584 output: Entry Point: 0x00000000
285 01:57:27.900670 output: Hash algo: crc32
286 01:57:27.900756 output: Hash value: ab2f7826
287 01:57:27.900815 output: Image 1 (fdt-1)
288 01:57:27.900868 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 01:57:27.900925 output: Created: Fri Jun 21 02:57:27 2024
290 01:57:27.900979 output: Type: Flat Device Tree
291 01:57:27.901041 output: Compression: uncompressed
292 01:57:27.901096 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 01:57:27.901154 output: Architecture: AArch64
294 01:57:27.901211 output: Hash algo: crc32
295 01:57:27.901266 output: Hash value: a9713552
296 01:57:27.901320 output: Image 2 (ramdisk-1)
297 01:57:27.901374 output: Description: unavailable
298 01:57:27.901429 output: Created: Fri Jun 21 02:57:27 2024
299 01:57:27.901483 output: Type: RAMDisk Image
300 01:57:27.901544 output: Compression: uncompressed
301 01:57:27.901630 output: Data Size: 18742923 Bytes = 18303.64 KiB = 17.87 MiB
302 01:57:27.901716 output: Architecture: AArch64
303 01:57:27.901786 output: OS: Linux
304 01:57:27.901842 output: Load Address: unavailable
305 01:57:27.901897 output: Entry Point: unavailable
306 01:57:27.901952 output: Hash algo: crc32
307 01:57:27.902007 output: Hash value: 83942739
308 01:57:27.902061 output: Default Configuration: 'conf-1'
309 01:57:27.902118 output: Configuration 0 (conf-1)
310 01:57:27.902176 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 01:57:27.902230 output: Kernel: kernel-1
312 01:57:27.902284 output: Init Ramdisk: ramdisk-1
313 01:57:27.902337 output: FDT: fdt-1
314 01:57:27.902391 output: Loadables: kernel-1
315 01:57:27.902444 output:
316 01:57:27.902594 end: 1.6.8.1 prepare-fit (duration 00:00:15) [common]
317 01:57:27.902713 end: 1.6.8 prepare-kernel (duration 00:00:15) [common]
318 01:57:27.902853 end: 1.6 prepare-tftp-overlay (duration 00:00:34) [common]
319 01:57:27.902974 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:18) [common]
320 01:57:27.903051 No LXC device requested
321 01:57:27.903130 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 01:57:27.903222 start: 1.8 deploy-device-env (timeout 00:09:18) [common]
323 01:57:27.903304 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 01:57:27.903375 Checking files for TFTP limit of 4294967296 bytes.
325 01:57:27.903886 end: 1 tftp-deploy (duration 00:00:42) [common]
326 01:57:27.903993 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 01:57:27.904083 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 01:57:27.904212 substitutions:
329 01:57:27.904283 - {DTB}: 14479198/tftp-deploy-3w3zgrbh/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 01:57:27.904349 - {INITRD}: 14479198/tftp-deploy-3w3zgrbh/ramdisk/ramdisk.cpio.gz
331 01:57:27.904409 - {KERNEL}: 14479198/tftp-deploy-3w3zgrbh/kernel/Image
332 01:57:27.904468 - {LAVA_MAC}: None
333 01:57:27.904525 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14479198/extract-nfsrootfs-vfnpth8r
334 01:57:27.904583 - {NFS_SERVER_IP}: 192.168.201.1
335 01:57:27.904640 - {PRESEED_CONFIG}: None
336 01:57:27.904751 - {PRESEED_LOCAL}: None
337 01:57:27.904839 - {RAMDISK}: 14479198/tftp-deploy-3w3zgrbh/ramdisk/ramdisk.cpio.gz
338 01:57:27.904921 - {ROOT_PART}: None
339 01:57:27.904988 - {ROOT}: None
340 01:57:27.905043 - {SERVER_IP}: 192.168.201.1
341 01:57:27.905098 - {TEE}: None
342 01:57:27.905154 Parsed boot commands:
343 01:57:27.905212 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 01:57:27.905384 Parsed boot commands: tftpboot 192.168.201.1 14479198/tftp-deploy-3w3zgrbh/kernel/image.itb 14479198/tftp-deploy-3w3zgrbh/kernel/cmdline
345 01:57:27.905478 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 01:57:27.905568 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 01:57:27.905657 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 01:57:27.905759 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 01:57:27.905830 Not connected, no need to disconnect.
350 01:57:27.905906 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 01:57:27.905991 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 01:57:27.906063 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
353 01:57:27.909948 Setting prompt string to ['lava-test: # ']
354 01:57:27.910318 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 01:57:27.910432 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 01:57:27.910536 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 01:57:27.910633 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 01:57:27.910839 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=reboot']
359 01:57:37.071157 >> Command sent successfully.
360 01:57:37.074446 Returned 0 in 9 seconds
361 01:57:37.174851 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
363 01:57:37.175166 end: 2.2.2 reset-device (duration 00:00:09) [common]
364 01:57:37.175271 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
365 01:57:37.175371 Setting prompt string to 'Starting depthcharge on Juniper...'
366 01:57:37.175440 Changing prompt to 'Starting depthcharge on Juniper...'
367 01:57:37.175511 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
368 01:57:37.175979 [Enter `^Ec?' for help]
369 01:57:44.445948 [DL] 00000000 00000000 010701
370 01:57:44.450786
371 01:57:44.450889
372 01:57:44.450965 F0: 102B 0000
373 01:57:44.451038
374 01:57:44.451102 F3: 1006 0033 [0200]
375 01:57:44.454206
376 01:57:44.454298 F3: 4001 00E0 [0200]
377 01:57:44.454373
378 01:57:44.454440 F3: 0000 0000
379 01:57:44.457518
380 01:57:44.457607 V0: 0000 0000 [0001]
381 01:57:44.457679
382 01:57:44.457753 00: 1027 0002
383 01:57:44.457817
384 01:57:44.461215 01: 0000 0000
385 01:57:44.461302
386 01:57:44.461369 BP: 0C00 0251 [0000]
387 01:57:44.461433
388 01:57:44.464342 G0: 1182 0000
389 01:57:44.464434
390 01:57:44.464502 EC: 0004 0000 [0001]
391 01:57:44.464564
392 01:57:44.467781 S7: 0000 0000 [0000]
393 01:57:44.467866
394 01:57:44.470875 CC: 0000 0000 [0001]
395 01:57:44.470966
396 01:57:44.471033 T0: 0000 00DB [000F]
397 01:57:44.471095
398 01:57:44.471152 Jump to BL
399 01:57:44.471210
400 01:57:44.506817
401 01:57:44.506905
402 01:57:44.513698 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
403 01:57:44.517008 ARM64: Exception handlers installed.
404 01:57:44.520401 ARM64: Testing exception
405 01:57:44.523843 ARM64: Done test exception
406 01:57:44.527239 WDT: Last reset was cold boot
407 01:57:44.530071 SPI0(PAD0) initialized at 992727 Hz
408 01:57:44.533501 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
409 01:57:44.533587 Manufacturer: ef
410 01:57:44.540136 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
411 01:57:44.553611 Probing TPM: . done!
412 01:57:44.553726 TPM ready after 0 ms
413 01:57:44.560371 Connected to device vid:did:rid of 1ae0:0028:00
414 01:57:44.567108 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
415 01:57:44.570586 Initialized TPM device CR50 revision 0
416 01:57:44.614168 tlcl_send_startup: Startup return code is 0
417 01:57:44.614600 TPM: setup succeeded
418 01:57:44.623049 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
419 01:57:44.626431 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
420 01:57:44.629781 in-header: 03 19 00 00 08 00 00 00
421 01:57:44.632741 in-data: a2 e0 47 00 13 00 00 00
422 01:57:44.636205 Chrome EC: UHEPI supported
423 01:57:44.642959 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
424 01:57:44.646302 in-header: 03 a1 00 00 08 00 00 00
425 01:57:44.649643 in-data: 84 60 60 10 00 00 00 00
426 01:57:44.650215 Phase 1
427 01:57:44.653068 FMAP: area GBB found @ 3f5000 (12032 bytes)
428 01:57:44.659771 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
429 01:57:44.666137 VB2:vb2_check_recovery() Recovery was requested manually
430 01:57:44.669720 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
431 01:57:44.675468 Recovery requested (1009000e)
432 01:57:44.684716 tlcl_extend: response is 0
433 01:57:44.690046 tlcl_extend: response is 0
434 01:57:44.714964
435 01:57:44.715050
436 01:57:44.721717 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
437 01:57:44.724672 ARM64: Exception handlers installed.
438 01:57:44.728029 ARM64: Testing exception
439 01:57:44.731399 ARM64: Done test exception
440 01:57:44.746918 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x201f
441 01:57:44.753456 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
442 01:57:44.756852 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
443 01:57:44.765303 [RTC]rtc_get_frequency_meter,134: input=0xf, output=915
444 01:57:44.772297 [RTC]rtc_get_frequency_meter,134: input=0x7, output=779
445 01:57:44.779415 [RTC]rtc_get_frequency_meter,134: input=0xb, output=847
446 01:57:44.786237 [RTC]rtc_get_frequency_meter,134: input=0x9, output=812
447 01:57:44.793041 [RTC]rtc_get_frequency_meter,134: input=0x8, output=798
448 01:57:44.799930 [RTC]rtc_get_frequency_meter,134: input=0x7, output=778
449 01:57:44.806778 [RTC]rtc_get_frequency_meter,134: input=0x8, output=794
450 01:57:44.809921 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
451 01:57:44.816840 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
452 01:57:44.820053 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
453 01:57:44.823474 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
454 01:57:44.830108 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
455 01:57:44.833238 in-header: 03 19 00 00 08 00 00 00
456 01:57:44.833492 in-data: a2 e0 47 00 13 00 00 00
457 01:57:44.836448 Chrome EC: UHEPI supported
458 01:57:44.843589 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
459 01:57:44.847006 in-header: 03 a1 00 00 08 00 00 00
460 01:57:44.849716 in-data: 84 60 60 10 00 00 00 00
461 01:57:44.853653 Skip loading cached calibration data
462 01:57:44.860195 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
463 01:57:44.863476 in-header: 03 a1 00 00 08 00 00 00
464 01:57:44.866993 in-data: 84 60 60 10 00 00 00 00
465 01:57:44.873605 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
466 01:57:44.876787 in-header: 03 a1 00 00 08 00 00 00
467 01:57:44.879997 in-data: 84 60 60 10 00 00 00 00
468 01:57:44.883494 ADC[3]: Raw value=216216 ID=1
469 01:57:44.883833 Manufacturer: ef
470 01:57:44.890366 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
471 01:57:44.893214 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
472 01:57:44.896783 CBFS @ 21000 size 3d4000
473 01:57:44.900224 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
474 01:57:44.907175 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
475 01:57:44.910379 CBFS: Found @ offset 3c700 size 44
476 01:57:44.910693 DRAM-K: Full Calibration
477 01:57:44.916957 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
478 01:57:44.917253 CBFS @ 21000 size 3d4000
479 01:57:44.924147 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
480 01:57:44.926949 CBFS: Locating 'fallback/dram'
481 01:57:44.930301 CBFS: Found @ offset 24b00 size 12268
482 01:57:44.958151 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
483 01:57:44.961071 ddr_geometry: 1, config: 0x0
484 01:57:44.964579 header.status = 0x0
485 01:57:44.967663 header.magic = 0x44524d4b (expected: 0x44524d4b)
486 01:57:44.971570 header.version = 0x5 (expected: 0x5)
487 01:57:44.974409 header.size = 0x8f0 (expected: 0x8f0)
488 01:57:44.974663 header.config = 0x0
489 01:57:44.978274 header.flags = 0x0
490 01:57:44.978531 header.checksum = 0x0
491 01:57:44.984782 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
492 01:57:44.991753 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
493 01:57:44.994710 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
494 01:57:44.997961 ddr_geometry:1
495 01:57:44.998315 [EMI] new MDL number = 1
496 01:57:45.001114 dram_cbt_mode_extern: 0
497 01:57:45.004694 dram_cbt_mode [RK0]: 0, [RK1]: 0
498 01:57:45.011269 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
499 01:57:45.011639
500 01:57:45.011902
501 01:57:45.012153 [Bianco] ETT version 0.0.0.1
502 01:57:45.018005 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
503 01:57:45.018281
504 01:57:45.021415 vSetVcoreByFreq with vcore:762500, freq=1600
505 01:57:45.021679
506 01:57:45.022025 [DramcInit]
507 01:57:45.024935 AutoRefreshCKEOff AutoREF OFF
508 01:57:45.028317 DDRPhyPLLSetting-CKEOFF
509 01:57:45.031698 DDRPhyPLLSetting-CKEON
510 01:57:45.031961
511 01:57:45.032296 Enable WDQS
512 01:57:45.034879 [ModeRegInit_LP4] CH0 RK0
513 01:57:45.038603 Write Rank0 MR13 =0x18
514 01:57:45.038870 Write Rank0 MR12 =0x5d
515 01:57:45.041583 Write Rank0 MR1 =0x56
516 01:57:45.045378 Write Rank0 MR2 =0x1a
517 01:57:45.045653 Write Rank0 MR11 =0x0
518 01:57:45.048343 Write Rank0 MR22 =0x38
519 01:57:45.048610 Write Rank0 MR14 =0x5d
520 01:57:45.051673 Write Rank0 MR3 =0x30
521 01:57:45.055710 Write Rank0 MR13 =0x58
522 01:57:45.055997 Write Rank0 MR12 =0x5d
523 01:57:45.058955 Write Rank0 MR1 =0x56
524 01:57:45.059359 Write Rank0 MR2 =0x2d
525 01:57:45.062029 Write Rank0 MR11 =0x23
526 01:57:45.065505 Write Rank0 MR22 =0x34
527 01:57:45.065881 Write Rank0 MR14 =0x10
528 01:57:45.068885 Write Rank0 MR3 =0x30
529 01:57:45.072158 Write Rank0 MR13 =0xd8
530 01:57:45.072482 [ModeRegInit_LP4] CH0 RK1
531 01:57:45.075496 Write Rank1 MR13 =0x18
532 01:57:45.075960 Write Rank1 MR12 =0x5d
533 01:57:45.078572 Write Rank1 MR1 =0x56
534 01:57:45.082181 Write Rank1 MR2 =0x1a
535 01:57:45.082533 Write Rank1 MR11 =0x0
536 01:57:45.085698 Write Rank1 MR22 =0x38
537 01:57:45.086181 Write Rank1 MR14 =0x5d
538 01:57:45.088717 Write Rank1 MR3 =0x30
539 01:57:45.092204 Write Rank1 MR13 =0x58
540 01:57:45.092580 Write Rank1 MR12 =0x5d
541 01:57:45.095524 Write Rank1 MR1 =0x56
542 01:57:45.098791 Write Rank1 MR2 =0x2d
543 01:57:45.099256 Write Rank1 MR11 =0x23
544 01:57:45.102171 Write Rank1 MR22 =0x34
545 01:57:45.102613 Write Rank1 MR14 =0x10
546 01:57:45.105431 Write Rank1 MR3 =0x30
547 01:57:45.108732 Write Rank1 MR13 =0xd8
548 01:57:45.109195 [ModeRegInit_LP4] CH1 RK0
549 01:57:45.111910 Write Rank0 MR13 =0x18
550 01:57:45.115113 Write Rank0 MR12 =0x5d
551 01:57:45.115536 Write Rank0 MR1 =0x56
552 01:57:45.118675 Write Rank0 MR2 =0x1a
553 01:57:45.119147 Write Rank0 MR11 =0x0
554 01:57:45.122177 Write Rank0 MR22 =0x38
555 01:57:45.125103 Write Rank0 MR14 =0x5d
556 01:57:45.125559 Write Rank0 MR3 =0x30
557 01:57:45.128442 Write Rank0 MR13 =0x58
558 01:57:45.128896 Write Rank0 MR12 =0x5d
559 01:57:45.131856 Write Rank0 MR1 =0x56
560 01:57:45.135160 Write Rank0 MR2 =0x2d
561 01:57:45.135598 Write Rank0 MR11 =0x23
562 01:57:45.138719 Write Rank0 MR22 =0x34
563 01:57:45.139047 Write Rank0 MR14 =0x10
564 01:57:45.142069 Write Rank0 MR3 =0x30
565 01:57:45.145590 Write Rank0 MR13 =0xd8
566 01:57:45.145955 [ModeRegInit_LP4] CH1 RK1
567 01:57:45.148544 Write Rank1 MR13 =0x18
568 01:57:45.152318 Write Rank1 MR12 =0x5d
569 01:57:45.152648 Write Rank1 MR1 =0x56
570 01:57:45.155283 Write Rank1 MR2 =0x1a
571 01:57:45.155751 Write Rank1 MR11 =0x0
572 01:57:45.158574 Write Rank1 MR22 =0x38
573 01:57:45.162013 Write Rank1 MR14 =0x5d
574 01:57:45.162339 Write Rank1 MR3 =0x30
575 01:57:45.165399 Write Rank1 MR13 =0x58
576 01:57:45.165723 Write Rank1 MR12 =0x5d
577 01:57:45.168503 Write Rank1 MR1 =0x56
578 01:57:45.172238 Write Rank1 MR2 =0x2d
579 01:57:45.172569 Write Rank1 MR11 =0x23
580 01:57:45.175590 Write Rank1 MR22 =0x34
581 01:57:45.175915 Write Rank1 MR14 =0x10
582 01:57:45.178479 Write Rank1 MR3 =0x30
583 01:57:45.181936 Write Rank1 MR13 =0xd8
584 01:57:45.182267 match AC timing 3
585 01:57:45.192108 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
586 01:57:45.195262 [MiockJmeterHQA]
587 01:57:45.199021 vSetVcoreByFreq with vcore:762500, freq=1600
588 01:57:45.303305
589 01:57:45.303756 MIOCK jitter meter ch=0
590 01:57:45.304103
591 01:57:45.306680 1T = (102-17) = 85 dly cells
592 01:57:45.313471 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
593 01:57:45.316265 vSetVcoreByFreq with vcore:725000, freq=1200
594 01:57:45.415930
595 01:57:45.416297 MIOCK jitter meter ch=0
596 01:57:45.416563
597 01:57:45.419179 1T = (96-16) = 80 dly cells
598 01:57:45.426163 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
599 01:57:45.429095 vSetVcoreByFreq with vcore:725000, freq=800
600 01:57:45.528288
601 01:57:45.528662 MIOCK jitter meter ch=0
602 01:57:45.528927
603 01:57:45.531616 1T = (96-16) = 80 dly cells
604 01:57:45.538122 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
605 01:57:45.541554 vSetVcoreByFreq with vcore:762500, freq=1600
606 01:57:45.545014 vSetVcoreByFreq with vcore:762500, freq=1600
607 01:57:45.545380
608 01:57:45.545645 K DRVP
609 01:57:45.548403 1. OCD DRVP=0 CALOUT=0
610 01:57:45.551262 1. OCD DRVP=1 CALOUT=0
611 01:57:45.551606 1. OCD DRVP=2 CALOUT=0
612 01:57:45.554918 1. OCD DRVP=3 CALOUT=0
613 01:57:45.555277 1. OCD DRVP=4 CALOUT=0
614 01:57:45.558075 1. OCD DRVP=5 CALOUT=0
615 01:57:45.561667 1. OCD DRVP=6 CALOUT=0
616 01:57:45.562063 1. OCD DRVP=7 CALOUT=0
617 01:57:45.564632 1. OCD DRVP=8 CALOUT=0
618 01:57:45.568233 1. OCD DRVP=9 CALOUT=1
619 01:57:45.568576
620 01:57:45.568871 1. OCD DRVP calibration OK! DRVP=9
621 01:57:45.571617
622 01:57:45.571955
623 01:57:45.572216
624 01:57:45.572459 K ODTN
625 01:57:45.574851 3. OCD ODTN=0 ,CALOUT=1
626 01:57:45.575212 3. OCD ODTN=1 ,CALOUT=1
627 01:57:45.578442 3. OCD ODTN=2 ,CALOUT=1
628 01:57:45.578785 3. OCD ODTN=3 ,CALOUT=1
629 01:57:45.581684 3. OCD ODTN=4 ,CALOUT=1
630 01:57:45.585153 3. OCD ODTN=5 ,CALOUT=1
631 01:57:45.585499 3. OCD ODTN=6 ,CALOUT=1
632 01:57:45.588110 3. OCD ODTN=7 ,CALOUT=0
633 01:57:45.588454
634 01:57:45.591943 3. OCD ODTN calibration OK! ODTN=7
635 01:57:45.592300
636 01:57:45.595207 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
637 01:57:45.598733 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
638 01:57:45.605315 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
639 01:57:45.605657
640 01:57:45.605978 K DRVP
641 01:57:45.608741 1. OCD DRVP=0 CALOUT=0
642 01:57:45.609080 1. OCD DRVP=1 CALOUT=0
643 01:57:45.612244 1. OCD DRVP=2 CALOUT=0
644 01:57:45.615396 1. OCD DRVP=3 CALOUT=0
645 01:57:45.615898 1. OCD DRVP=4 CALOUT=0
646 01:57:45.618744 1. OCD DRVP=5 CALOUT=0
647 01:57:45.619170 1. OCD DRVP=6 CALOUT=0
648 01:57:45.622103 1. OCD DRVP=7 CALOUT=0
649 01:57:45.625409 1. OCD DRVP=8 CALOUT=0
650 01:57:45.625888 1. OCD DRVP=9 CALOUT=0
651 01:57:45.628612 1. OCD DRVP=10 CALOUT=0
652 01:57:45.631962 1. OCD DRVP=11 CALOUT=1
653 01:57:45.632412
654 01:57:45.635198 1. OCD DRVP calibration OK! DRVP=11
655 01:57:45.635700
656 01:57:45.636059
657 01:57:45.636312
658 01:57:45.636631 K ODTN
659 01:57:45.638341 3. OCD ODTN=0 ,CALOUT=1
660 01:57:45.638689 3. OCD ODTN=1 ,CALOUT=1
661 01:57:45.642394 3. OCD ODTN=2 ,CALOUT=1
662 01:57:45.645105 3. OCD ODTN=3 ,CALOUT=1
663 01:57:45.645457 3. OCD ODTN=4 ,CALOUT=1
664 01:57:45.648340 3. OCD ODTN=5 ,CALOUT=1
665 01:57:45.648698 3. OCD ODTN=6 ,CALOUT=1
666 01:57:45.651880 3. OCD ODTN=7 ,CALOUT=1
667 01:57:45.655551 3. OCD ODTN=8 ,CALOUT=1
668 01:57:45.656022 3. OCD ODTN=9 ,CALOUT=1
669 01:57:45.658430 3. OCD ODTN=10 ,CALOUT=1
670 01:57:45.661853 3. OCD ODTN=11 ,CALOUT=1
671 01:57:45.662295 3. OCD ODTN=12 ,CALOUT=1
672 01:57:45.665323 3. OCD ODTN=13 ,CALOUT=1
673 01:57:45.668565 3. OCD ODTN=14 ,CALOUT=1
674 01:57:45.669031 3. OCD ODTN=15 ,CALOUT=0
675 01:57:45.669312
676 01:57:45.672220 3. OCD ODTN calibration OK! ODTN=15
677 01:57:45.672574
678 01:57:45.678525 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
679 01:57:45.682069 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
680 01:57:45.685522 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
681 01:57:45.686035
682 01:57:45.688808 [DramcInit]
683 01:57:45.691949 AutoRefreshCKEOff AutoREF OFF
684 01:57:45.692414 DDRPhyPLLSetting-CKEOFF
685 01:57:45.695173 DDRPhyPLLSetting-CKEON
686 01:57:45.695649
687 01:57:45.695940 Enable WDQS
688 01:57:45.696281 ==
689 01:57:45.702040 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
690 01:57:45.705404 fsp= 1, odt_onoff= 1, Byte mode= 0
691 01:57:45.705776 ==
692 01:57:45.708660 [Duty_Offset_Calibration]
693 01:57:45.708993
694 01:57:45.709342 ===========================
695 01:57:45.712005 B0:1 B1:1 CA:1
696 01:57:45.730699 ==
697 01:57:45.733908 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
698 01:57:45.737456 fsp= 1, odt_onoff= 1, Byte mode= 0
699 01:57:45.737542 ==
700 01:57:45.740775 [Duty_Offset_Calibration]
701 01:57:45.740862
702 01:57:45.743939 ===========================
703 01:57:45.744031 B0:1 B1:0 CA:2
704 01:57:45.776927 [ModeRegInit_LP4] CH0 RK0
705 01:57:45.780479 Write Rank0 MR13 =0x18
706 01:57:45.780675 Write Rank0 MR12 =0x5d
707 01:57:45.784080 Write Rank0 MR1 =0x56
708 01:57:45.786973 Write Rank0 MR2 =0x1a
709 01:57:45.787060 Write Rank0 MR11 =0x0
710 01:57:45.790035 Write Rank0 MR22 =0x38
711 01:57:45.790140 Write Rank0 MR14 =0x5d
712 01:57:45.793847 Write Rank0 MR3 =0x30
713 01:57:45.797210 Write Rank0 MR13 =0x58
714 01:57:45.797311 Write Rank0 MR12 =0x5d
715 01:57:45.800093 Write Rank0 MR1 =0x56
716 01:57:45.803472 Write Rank0 MR2 =0x2d
717 01:57:45.803582 Write Rank0 MR11 =0x23
718 01:57:45.806926 Write Rank0 MR22 =0x34
719 01:57:45.807061 Write Rank0 MR14 =0x10
720 01:57:45.810467 Write Rank0 MR3 =0x30
721 01:57:45.813630 Write Rank0 MR13 =0xd8
722 01:57:45.813781 [ModeRegInit_LP4] CH0 RK1
723 01:57:45.817138 Write Rank1 MR13 =0x18
724 01:57:45.817293 Write Rank1 MR12 =0x5d
725 01:57:45.820480 Write Rank1 MR1 =0x56
726 01:57:45.824072 Write Rank1 MR2 =0x1a
727 01:57:45.824283 Write Rank1 MR11 =0x0
728 01:57:45.827304 Write Rank1 MR22 =0x38
729 01:57:45.827516 Write Rank1 MR14 =0x5d
730 01:57:45.830548 Write Rank1 MR3 =0x30
731 01:57:45.834001 Write Rank1 MR13 =0x58
732 01:57:45.834261 Write Rank1 MR12 =0x5d
733 01:57:45.837511 Write Rank1 MR1 =0x56
734 01:57:45.838021 Write Rank1 MR2 =0x2d
735 01:57:45.840786 Write Rank1 MR11 =0x23
736 01:57:45.844095 Write Rank1 MR22 =0x34
737 01:57:45.844451 Write Rank1 MR14 =0x10
738 01:57:45.847490 Write Rank1 MR3 =0x30
739 01:57:45.851369 Write Rank1 MR13 =0xd8
740 01:57:45.851712 [ModeRegInit_LP4] CH1 RK0
741 01:57:45.854015 Write Rank0 MR13 =0x18
742 01:57:45.854445 Write Rank0 MR12 =0x5d
743 01:57:45.857547 Write Rank0 MR1 =0x56
744 01:57:45.860980 Write Rank0 MR2 =0x1a
745 01:57:45.861311 Write Rank0 MR11 =0x0
746 01:57:45.864338 Write Rank0 MR22 =0x38
747 01:57:45.864674 Write Rank0 MR14 =0x5d
748 01:57:45.867615 Write Rank0 MR3 =0x30
749 01:57:45.871147 Write Rank0 MR13 =0x58
750 01:57:45.871480 Write Rank0 MR12 =0x5d
751 01:57:45.874711 Write Rank0 MR1 =0x56
752 01:57:45.875163 Write Rank0 MR2 =0x2d
753 01:57:45.877720 Write Rank0 MR11 =0x23
754 01:57:45.880873 Write Rank0 MR22 =0x34
755 01:57:45.881206 Write Rank0 MR14 =0x10
756 01:57:45.884663 Write Rank0 MR3 =0x30
757 01:57:45.887850 Write Rank0 MR13 =0xd8
758 01:57:45.888182 [ModeRegInit_LP4] CH1 RK1
759 01:57:45.891142 Write Rank1 MR13 =0x18
760 01:57:45.891475 Write Rank1 MR12 =0x5d
761 01:57:45.894265 Write Rank1 MR1 =0x56
762 01:57:45.897637 Write Rank1 MR2 =0x1a
763 01:57:45.898006 Write Rank1 MR11 =0x0
764 01:57:45.901241 Write Rank1 MR22 =0x38
765 01:57:45.901574 Write Rank1 MR14 =0x5d
766 01:57:45.904506 Write Rank1 MR3 =0x30
767 01:57:45.908071 Write Rank1 MR13 =0x58
768 01:57:45.908404 Write Rank1 MR12 =0x5d
769 01:57:45.911507 Write Rank1 MR1 =0x56
770 01:57:45.914716 Write Rank1 MR2 =0x2d
771 01:57:45.915050 Write Rank1 MR11 =0x23
772 01:57:45.917546 Write Rank1 MR22 =0x34
773 01:57:45.917914 Write Rank1 MR14 =0x10
774 01:57:45.921629 Write Rank1 MR3 =0x30
775 01:57:45.924558 Write Rank1 MR13 =0xd8
776 01:57:45.924913 match AC timing 3
777 01:57:45.934423 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
778 01:57:45.934761 DramC Write-DBI off
779 01:57:45.937814 DramC Read-DBI off
780 01:57:45.941375 Write Rank0 MR13 =0x59
781 01:57:45.941708 ==
782 01:57:45.944439 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
783 01:57:45.948124 fsp= 1, odt_onoff= 1, Byte mode= 0
784 01:57:45.948459 ==
785 01:57:45.951102 === u2Vref_new: 0x56 --> 0x2d
786 01:57:45.954425 === u2Vref_new: 0x58 --> 0x38
787 01:57:45.957917 === u2Vref_new: 0x5a --> 0x39
788 01:57:45.961459 === u2Vref_new: 0x5c --> 0x3c
789 01:57:45.964703 === u2Vref_new: 0x5e --> 0x3d
790 01:57:45.968053 === u2Vref_new: 0x60 --> 0xa0
791 01:57:45.971126 [CA 0] Center 34 (6~63) winsize 58
792 01:57:45.974395 [CA 1] Center 36 (9~63) winsize 55
793 01:57:45.977780 [CA 2] Center 29 (0~59) winsize 60
794 01:57:45.981141 [CA 3] Center 25 (-2~52) winsize 55
795 01:57:45.981477 [CA 4] Center 25 (-2~53) winsize 56
796 01:57:45.984914 [CA 5] Center 30 (0~60) winsize 61
797 01:57:45.985269
798 01:57:45.991164 [CATrainingPosCal] consider 1 rank data
799 01:57:45.991502 u2DelayCellTimex100 = 735/100 ps
800 01:57:45.994408 CA0 delay=34 (6~63),Diff = 9 PI (11 cell)
801 01:57:46.001027 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
802 01:57:46.004790 CA2 delay=29 (0~59),Diff = 4 PI (5 cell)
803 01:57:46.007816 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
804 01:57:46.010934 CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)
805 01:57:46.014322 CA5 delay=30 (0~60),Diff = 5 PI (6 cell)
806 01:57:46.014660
807 01:57:46.018108 CA PerBit enable=1, Macro0, CA PI delay=25
808 01:57:46.021674 === u2Vref_new: 0x60 --> 0xa0
809 01:57:46.022062
810 01:57:46.024593 Vref(ca) range 1: 32
811 01:57:46.024928
812 01:57:46.025192 CS Dly= 9 (40-0-32)
813 01:57:46.028032 Write Rank0 MR13 =0xd8
814 01:57:46.028369 Write Rank0 MR13 =0xd8
815 01:57:46.031057 Write Rank0 MR12 =0x60
816 01:57:46.034773 Write Rank1 MR13 =0x59
817 01:57:46.035110 ==
818 01:57:46.038014 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
819 01:57:46.041386 fsp= 1, odt_onoff= 1, Byte mode= 0
820 01:57:46.041775 ==
821 01:57:46.044924 === u2Vref_new: 0x56 --> 0x2d
822 01:57:46.048373 === u2Vref_new: 0x58 --> 0x38
823 01:57:46.051839 === u2Vref_new: 0x5a --> 0x39
824 01:57:46.055161 === u2Vref_new: 0x5c --> 0x3c
825 01:57:46.058506 === u2Vref_new: 0x5e --> 0x3d
826 01:57:46.061809 === u2Vref_new: 0x60 --> 0xa0
827 01:57:46.064765 [CA 0] Center 36 (9~63) winsize 55
828 01:57:46.068161 [CA 1] Center 36 (9~63) winsize 55
829 01:57:46.071508 [CA 2] Center 31 (2~60) winsize 59
830 01:57:46.074983 [CA 3] Center 26 (-2~54) winsize 57
831 01:57:46.077856 [CA 4] Center 26 (-2~54) winsize 57
832 01:57:46.078251 [CA 5] Center 31 (2~61) winsize 60
833 01:57:46.081424
834 01:57:46.085158 [CATrainingPosCal] consider 2 rank data
835 01:57:46.085651 u2DelayCellTimex100 = 735/100 ps
836 01:57:46.091533 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
837 01:57:46.094748 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
838 01:57:46.098426 CA2 delay=30 (2~59),Diff = 5 PI (6 cell)
839 01:57:46.101789 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
840 01:57:46.105192 CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)
841 01:57:46.108417 CA5 delay=31 (2~60),Diff = 6 PI (7 cell)
842 01:57:46.108771
843 01:57:46.111822 CA PerBit enable=1, Macro0, CA PI delay=25
844 01:57:46.115074 === u2Vref_new: 0x5c --> 0x3c
845 01:57:46.115403
846 01:57:46.118237 Vref(ca) range 1: 28
847 01:57:46.118638
848 01:57:46.119024 CS Dly= 7 (38-0-32)
849 01:57:46.121678 Write Rank1 MR13 =0xd8
850 01:57:46.124929 Write Rank1 MR13 =0xd8
851 01:57:46.125293 Write Rank1 MR12 =0x5c
852 01:57:46.128281 [RankSwap] Rank num 2, (Multi 1), Rank 0
853 01:57:46.132097 Write Rank0 MR2 =0xad
854 01:57:46.132427 [Write Leveling]
855 01:57:46.134908 delay byte0 byte1 byte2 byte3
856 01:57:46.135241
857 01:57:46.138171 10 0 0
858 01:57:46.138546 11 0 0
859 01:57:46.138806 12 0 0
860 01:57:46.141468 13 0 0
861 01:57:46.141850 14 0 0
862 01:57:46.144994 15 0 0
863 01:57:46.145338 16 0 0
864 01:57:46.148382 17 0 0
865 01:57:46.148724 18 0 0
866 01:57:46.148993 19 0 0
867 01:57:46.151809 20 0 0
868 01:57:46.152152 21 0 0
869 01:57:46.154706 22 0 0
870 01:57:46.155048 23 0 ff
871 01:57:46.158138 24 0 ff
872 01:57:46.158618 25 0 ff
873 01:57:46.158948 26 0 ff
874 01:57:46.161515 27 0 ff
875 01:57:46.161893 28 0 ff
876 01:57:46.164821 29 0 ff
877 01:57:46.165183 30 0 ff
878 01:57:46.168364 31 0 ff
879 01:57:46.168704 32 ff ff
880 01:57:46.168971 33 ff ff
881 01:57:46.171881 34 ff ff
882 01:57:46.172235 35 ff ff
883 01:57:46.175174 36 ff ff
884 01:57:46.175517 37 ff ff
885 01:57:46.178371 38 ff ff
886 01:57:46.182002 pass bytecount = 0xff (0xff: all bytes pass)
887 01:57:46.182344
888 01:57:46.182609 DQS0 dly: 32
889 01:57:46.185287 DQS1 dly: 23
890 01:57:46.185776 Write Rank0 MR2 =0x2d
891 01:57:46.188264 [RankSwap] Rank num 2, (Multi 1), Rank 0
892 01:57:46.191888 Write Rank0 MR1 =0xd6
893 01:57:46.192350 [Gating]
894 01:57:46.192743 ==
895 01:57:46.198680 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
896 01:57:46.201807 fsp= 1, odt_onoff= 1, Byte mode= 0
897 01:57:46.202255 ==
898 01:57:46.205152 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
899 01:57:46.211859 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
900 01:57:46.215153 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
901 01:57:46.218600 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
902 01:57:46.222210 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
903 01:57:46.228736 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
904 01:57:46.231612 3 1 24 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
905 01:57:46.235318 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
906 01:57:46.241971 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
907 01:57:46.245339 3 2 4 |3534 c0c |(11 11)(11 11) |(0 0)(1 1)| 0
908 01:57:46.248562 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
909 01:57:46.252064 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
910 01:57:46.258919 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
911 01:57:46.262142 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
912 01:57:46.265405 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
913 01:57:46.271811 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
914 01:57:46.275024 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
915 01:57:46.278433 3 3 4 |3534 403 |(11 11)(11 11) |(0 0)(1 1)| 0
916 01:57:46.284954 3 3 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
917 01:57:46.288276 [Byte 1] Lead/lag falling Transition (3, 3, 8)
918 01:57:46.291828 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
919 01:57:46.295038 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
920 01:57:46.302046 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
921 01:57:46.305353 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
922 01:57:46.308299 3 3 28 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
923 01:57:46.315112 3 4 0 |3d3d 807 |(11 11)(11 11) |(1 1)(1 1)| 0
924 01:57:46.318394 3 4 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
925 01:57:46.321818 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
926 01:57:46.328664 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
927 01:57:46.331617 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 01:57:46.335003 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 01:57:46.338285 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 01:57:46.345087 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 01:57:46.348712 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 01:57:46.351990 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 01:57:46.358948 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 01:57:46.361786 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
935 01:57:46.365252 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
936 01:57:46.372072 [Byte 0] Lead/lag falling Transition (3, 5, 16)
937 01:57:46.375269 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
938 01:57:46.378632 [Byte 0] Lead/lag Transition tap number (2)
939 01:57:46.382074 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
940 01:57:46.388849 [Byte 1] Lead/lag falling Transition (3, 5, 24)
941 01:57:46.392266 3 5 28 |404 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
942 01:57:46.395612 [Byte 1] Lead/lag Transition tap number (2)
943 01:57:46.398863 3 6 0 |4646 605 |(0 0)(11 11) |(0 0)(0 0)| 0
944 01:57:46.401712 [Byte 0]First pass (3, 6, 0)
945 01:57:46.405279 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
946 01:57:46.408599 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
947 01:57:46.411952 [Byte 1]First pass (3, 6, 8)
948 01:57:46.415199 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 01:57:46.421759 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
950 01:57:46.425197 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 01:57:46.428837 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 01:57:46.431960 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 01:57:46.435230 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 01:57:46.442415 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
955 01:57:46.445115 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
956 01:57:46.448612 All bytes gating window > 1UI, Early break!
957 01:57:46.448732
958 01:57:46.451982 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
959 01:57:46.452100
960 01:57:46.455217 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
961 01:57:46.455332
962 01:57:46.455432
963 01:57:46.455533
964 01:57:46.462208 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
965 01:57:46.462337
966 01:57:46.465131 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
967 01:57:46.465247
968 01:57:46.465350
969 01:57:46.468484 Write Rank0 MR1 =0x56
970 01:57:46.468575
971 01:57:46.468645 best RODT dly(2T, 0.5T) = (2, 2)
972 01:57:46.471911
973 01:57:46.472007 best RODT dly(2T, 0.5T) = (2, 2)
974 01:57:46.472106 ==
975 01:57:46.478905 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
976 01:57:46.482277 fsp= 1, odt_onoff= 1, Byte mode= 0
977 01:57:46.482395 ==
978 01:57:46.485127 Start DQ dly to find pass range UseTestEngine =0
979 01:57:46.488474 x-axis: bit #, y-axis: DQ dly (-127~63)
980 01:57:46.492352 RX Vref Scan = 0
981 01:57:46.495681 -26, [0] xxxxxxxx xxxxxxxx [MSB]
982 01:57:46.499002 -25, [0] xxxxxxxx xxxxxxxx [MSB]
983 01:57:46.499118 -24, [0] xxxxxxxx xxxxxxxx [MSB]
984 01:57:46.501833 -23, [0] xxxxxxxx xxxxxxxx [MSB]
985 01:57:46.505091 -22, [0] xxxxxxxx xxxxxxxx [MSB]
986 01:57:46.508752 -21, [0] xxxxxxxx xxxxxxxx [MSB]
987 01:57:46.512384 -20, [0] xxxxxxxx xxxxxxxx [MSB]
988 01:57:46.515566 -19, [0] xxxxxxxx xxxxxxxx [MSB]
989 01:57:46.518944 -18, [0] xxxxxxxx xxxxxxxx [MSB]
990 01:57:46.522517 -17, [0] xxxxxxxx xxxxxxxx [MSB]
991 01:57:46.522666 -16, [0] xxxxxxxx xxxxxxxx [MSB]
992 01:57:46.525462 -15, [0] xxxxxxxx xxxxxxxx [MSB]
993 01:57:46.528936 -14, [0] xxxxxxxx xxxxxxxx [MSB]
994 01:57:46.532021 -13, [0] xxxxxxxx xxxxxxxx [MSB]
995 01:57:46.535534 -12, [0] xxxxxxxx xxxxxxxx [MSB]
996 01:57:46.538641 -11, [0] xxxxxxxx xxxxxxxx [MSB]
997 01:57:46.542082 -10, [0] xxxxxxxx xxxxxxxx [MSB]
998 01:57:46.545484 -9, [0] xxxxxxxx xxxxxxxx [MSB]
999 01:57:46.545623 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1000 01:57:46.549328 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1001 01:57:46.552125 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1002 01:57:46.555291 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1003 01:57:46.558629 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1004 01:57:46.562153 -3, [0] xxxoxxxx oxxxxxxx [MSB]
1005 01:57:46.566254 -2, [0] xxxoxxxx ooxxxxxx [MSB]
1006 01:57:46.566397 -1, [0] xxxoxxxx ooxxxxxx [MSB]
1007 01:57:46.568857 0, [0] xxxoxoxx ooxoxxxx [MSB]
1008 01:57:46.572399 1, [0] xxxoxoox ooxoxoxx [MSB]
1009 01:57:46.575692 2, [0] xxxoxoox ooxoooxx [MSB]
1010 01:57:46.579083 3, [0] xxxoxooo ooxoooox [MSB]
1011 01:57:46.582413 4, [0] xoooxooo ooxooooo [MSB]
1012 01:57:46.582542 5, [0] xooooooo ooxooooo [MSB]
1013 01:57:46.585308 6, [0] oooooooo ooxooooo [MSB]
1014 01:57:46.588740 7, [0] oooooooo ooxooooo [MSB]
1015 01:57:46.592656 33, [0] oooxoooo xooooooo [MSB]
1016 01:57:46.595749 34, [0] oooxoooo xooooooo [MSB]
1017 01:57:46.599107 35, [0] oooxoooo xooooooo [MSB]
1018 01:57:46.599225 36, [0] oooxoxox xooxoooo [MSB]
1019 01:57:46.602361 37, [0] oooxoxxx xxoxoooo [MSB]
1020 01:57:46.605711 38, [0] oooxoxxx xxoxxoxo [MSB]
1021 01:57:46.609165 39, [0] oooxxxxx xxoxxxxo [MSB]
1022 01:57:46.612312 40, [0] oooxxxxx xxoxxxxo [MSB]
1023 01:57:46.615635 41, [0] xxoxxxxx xxoxxxxo [MSB]
1024 01:57:46.615758 42, [0] xxxxxxxx xxoxxxxx [MSB]
1025 01:57:46.619203 43, [0] xxxxxxxx xxoxxxxx [MSB]
1026 01:57:46.622424 44, [0] xxxxxxxx xxxxxxxx [MSB]
1027 01:57:46.625626 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
1028 01:57:46.629438 iDelay=44, Bit 1, Center 22 (4 ~ 40) 37
1029 01:57:46.632329 iDelay=44, Bit 2, Center 22 (4 ~ 41) 38
1030 01:57:46.635831 iDelay=44, Bit 3, Center 14 (-3 ~ 32) 36
1031 01:57:46.642667 iDelay=44, Bit 4, Center 21 (5 ~ 38) 34
1032 01:57:46.646073 iDelay=44, Bit 5, Center 17 (0 ~ 35) 36
1033 01:57:46.649143 iDelay=44, Bit 6, Center 18 (1 ~ 36) 36
1034 01:57:46.652471 iDelay=44, Bit 7, Center 19 (3 ~ 35) 33
1035 01:57:46.655710 iDelay=44, Bit 8, Center 14 (-3 ~ 32) 36
1036 01:57:46.659347 iDelay=44, Bit 9, Center 17 (-2 ~ 36) 39
1037 01:57:46.662572 iDelay=44, Bit 10, Center 25 (8 ~ 43) 36
1038 01:57:46.666123 iDelay=44, Bit 11, Center 17 (0 ~ 35) 36
1039 01:57:46.669623 iDelay=44, Bit 12, Center 19 (2 ~ 37) 36
1040 01:57:46.672938 iDelay=44, Bit 13, Center 19 (1 ~ 38) 38
1041 01:57:46.676217 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
1042 01:57:46.679408 iDelay=44, Bit 15, Center 22 (4 ~ 41) 38
1043 01:57:46.679522 ==
1044 01:57:46.685981 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1045 01:57:46.689320 fsp= 1, odt_onoff= 1, Byte mode= 0
1046 01:57:46.689445 ==
1047 01:57:46.689555 DQS Delay:
1048 01:57:46.692650 DQS0 = 0, DQS1 = 0
1049 01:57:46.692762 DQM Delay:
1050 01:57:46.696199 DQM0 = 19, DQM1 = 19
1051 01:57:46.696318 DQ Delay:
1052 01:57:46.699426 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =14
1053 01:57:46.702654 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =19
1054 01:57:46.705954 DQ8 =14, DQ9 =17, DQ10 =25, DQ11 =17
1055 01:57:46.709381 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =22
1056 01:57:46.709498
1057 01:57:46.709595
1058 01:57:46.709691 DramC Write-DBI off
1059 01:57:46.712617 ==
1060 01:57:46.715929 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1061 01:57:46.719312 fsp= 1, odt_onoff= 1, Byte mode= 0
1062 01:57:46.719428 ==
1063 01:57:46.722509 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1064 01:57:46.722621
1065 01:57:46.725738 Begin, DQ Scan Range 919~1175
1066 01:57:46.725849
1067 01:57:46.725943
1068 01:57:46.729371 TX Vref Scan disable
1069 01:57:46.732795 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1070 01:57:46.736212 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1071 01:57:46.739136 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1072 01:57:46.743025 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1073 01:57:46.746335 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1074 01:57:46.749769 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1075 01:57:46.752822 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1076 01:57:46.756138 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1077 01:57:46.759570 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1078 01:57:46.762839 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1079 01:57:46.766119 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1080 01:57:46.773003 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1081 01:57:46.776248 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1082 01:57:46.779765 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1083 01:57:46.783147 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1084 01:57:46.786676 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1085 01:57:46.789511 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1086 01:57:46.793745 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1087 01:57:46.796273 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1088 01:57:46.799637 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1089 01:57:46.802935 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1090 01:57:46.806390 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1091 01:57:46.809657 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1092 01:57:46.813370 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1093 01:57:46.816902 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1094 01:57:46.820072 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1095 01:57:46.822920 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1096 01:57:46.826471 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1097 01:57:46.829493 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1098 01:57:46.836393 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1099 01:57:46.839862 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1100 01:57:46.843268 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1101 01:57:46.846609 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1102 01:57:46.849935 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1103 01:57:46.853448 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1104 01:57:46.856172 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1105 01:57:46.860177 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1106 01:57:46.862944 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1107 01:57:46.866518 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1108 01:57:46.869899 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1109 01:57:46.872760 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1110 01:57:46.876535 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1111 01:57:46.879707 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1112 01:57:46.883093 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1113 01:57:46.886378 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1114 01:57:46.889880 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1115 01:57:46.893157 965 |3 6 5|[0] xxxxxxxx oxxoxxxx [MSB]
1116 01:57:46.896916 966 |3 6 6|[0] xxxxxxxx oxxoxxxx [MSB]
1117 01:57:46.899636 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1118 01:57:46.906199 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1119 01:57:46.909828 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1120 01:57:46.913037 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1121 01:57:46.916264 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1122 01:57:46.919561 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1123 01:57:46.923271 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1124 01:57:46.926623 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1125 01:57:46.929544 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1126 01:57:46.932869 976 |3 6 16|[0] xooooooo oooooooo [MSB]
1127 01:57:46.936569 984 |3 6 24|[0] oooooooo xooooooo [MSB]
1128 01:57:46.939783 985 |3 6 25|[0] oooooooo xooxoooo [MSB]
1129 01:57:46.943108 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1130 01:57:46.950132 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1131 01:57:46.953404 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1132 01:57:46.956775 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1133 01:57:46.960215 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1134 01:57:46.963088 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1135 01:57:46.966890 992 |3 6 32|[0] oooxoooo xxxxxxxx [MSB]
1136 01:57:46.970377 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1137 01:57:46.973178 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1138 01:57:46.976776 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1139 01:57:46.980027 996 |3 6 36|[0] oooxxxxx xxxxxxxx [MSB]
1140 01:57:46.983454 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1141 01:57:46.986743 Byte0, DQ PI dly=984, DQM PI dly= 984
1142 01:57:46.989881 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1143 01:57:46.989998
1144 01:57:46.996897 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1145 01:57:46.997026
1146 01:57:47.000519 Byte1, DQ PI dly=975, DQM PI dly= 975
1147 01:57:47.003317 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1148 01:57:47.003434
1149 01:57:47.006640 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1150 01:57:47.006756
1151 01:57:47.010188 ==
1152 01:57:47.013395 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1153 01:57:47.016716 fsp= 1, odt_onoff= 1, Byte mode= 0
1154 01:57:47.016833 ==
1155 01:57:47.020250 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1156 01:57:47.020364
1157 01:57:47.023699 Begin, DQ Scan Range 951~1015
1158 01:57:47.027124 Write Rank0 MR14 =0x0
1159 01:57:47.034649
1160 01:57:47.034765 CH=0, VrefRange= 0, VrefLevel = 0
1161 01:57:47.041176 TX Bit0 (978~993) 16 985, Bit8 (967~977) 11 972,
1162 01:57:47.044183 TX Bit1 (977~992) 16 984, Bit9 (968~983) 16 975,
1163 01:57:47.050957 TX Bit2 (979~993) 15 986, Bit10 (974~985) 12 979,
1164 01:57:47.054235 TX Bit3 (975~985) 11 980, Bit11 (967~980) 14 973,
1165 01:57:47.057444 TX Bit4 (978~991) 14 984, Bit12 (969~982) 14 975,
1166 01:57:47.064427 TX Bit5 (976~989) 14 982, Bit13 (969~982) 14 975,
1167 01:57:47.067789 TX Bit6 (977~990) 14 983, Bit14 (968~983) 16 975,
1168 01:57:47.071032 TX Bit7 (978~991) 14 984, Bit15 (973~984) 12 978,
1169 01:57:47.071149
1170 01:57:47.074625 Write Rank0 MR14 =0x2
1171 01:57:47.083129
1172 01:57:47.083212 CH=0, VrefRange= 0, VrefLevel = 2
1173 01:57:47.089789 TX Bit0 (978~993) 16 985, Bit8 (966~977) 12 971,
1174 01:57:47.093061 TX Bit1 (977~992) 16 984, Bit9 (968~983) 16 975,
1175 01:57:47.096816 TX Bit2 (978~993) 16 985, Bit10 (974~986) 13 980,
1176 01:57:47.102976 TX Bit3 (974~986) 13 980, Bit11 (967~981) 15 974,
1177 01:57:47.106832 TX Bit4 (977~992) 16 984, Bit12 (969~982) 14 975,
1178 01:57:47.113038 TX Bit5 (976~990) 15 983, Bit13 (968~983) 16 975,
1179 01:57:47.116442 TX Bit6 (977~991) 15 984, Bit14 (968~984) 17 976,
1180 01:57:47.119954 TX Bit7 (978~992) 15 985, Bit15 (973~985) 13 979,
1181 01:57:47.120071
1182 01:57:47.123076 Write Rank0 MR14 =0x4
1183 01:57:47.131600
1184 01:57:47.131694 CH=0, VrefRange= 0, VrefLevel = 4
1185 01:57:47.138261 TX Bit0 (978~994) 17 986, Bit8 (966~978) 13 972,
1186 01:57:47.141782 TX Bit1 (977~993) 17 985, Bit9 (968~983) 16 975,
1187 01:57:47.148355 TX Bit2 (978~993) 16 985, Bit10 (974~987) 14 980,
1188 01:57:47.151415 TX Bit3 (974~987) 14 980, Bit11 (967~982) 16 974,
1189 01:57:47.154953 TX Bit4 (977~992) 16 984, Bit12 (968~983) 16 975,
1190 01:57:47.161528 TX Bit5 (975~991) 17 983, Bit13 (968~983) 16 975,
1191 01:57:47.164974 TX Bit6 (976~991) 16 983, Bit14 (968~984) 17 976,
1192 01:57:47.168013 TX Bit7 (977~992) 16 984, Bit15 (972~986) 15 979,
1193 01:57:47.168129
1194 01:57:47.171279 Write Rank0 MR14 =0x6
1195 01:57:47.180359
1196 01:57:47.180479 CH=0, VrefRange= 0, VrefLevel = 6
1197 01:57:47.186952 TX Bit0 (978~994) 17 986, Bit8 (966~979) 14 972,
1198 01:57:47.190404 TX Bit1 (977~993) 17 985, Bit9 (967~983) 17 975,
1199 01:57:47.196987 TX Bit2 (977~994) 18 985, Bit10 (973~988) 16 980,
1200 01:57:47.200374 TX Bit3 (973~989) 17 981, Bit11 (967~982) 16 974,
1201 01:57:47.203868 TX Bit4 (977~992) 16 984, Bit12 (969~983) 15 976,
1202 01:57:47.210454 TX Bit5 (975~992) 18 983, Bit13 (968~984) 17 976,
1203 01:57:47.214087 TX Bit6 (976~992) 17 984, Bit14 (967~985) 19 976,
1204 01:57:47.217248 TX Bit7 (977~993) 17 985, Bit15 (972~987) 16 979,
1205 01:57:47.217361
1206 01:57:47.272750 Write Rank0 MR14 =0x8
1207 01:57:47.272882
1208 01:57:47.272952 CH=0, VrefRange= 0, VrefLevel = 8
1209 01:57:47.273272 TX Bit0 (977~995) 19 986, Bit8 (965~981) 17 973,
1210 01:57:47.273828 TX Bit1 (977~994) 18 985, Bit9 (967~984) 18 975,
1211 01:57:47.274133 TX Bit2 (977~994) 18 985, Bit10 (972~989) 18 980,
1212 01:57:47.274245 TX Bit3 (973~989) 17 981, Bit11 (966~983) 18 974,
1213 01:57:47.274341 TX Bit4 (977~993) 17 985, Bit12 (968~984) 17 976,
1214 01:57:47.274462 TX Bit5 (975~992) 18 983, Bit13 (968~984) 17 976,
1215 01:57:47.274561 TX Bit6 (976~992) 17 984, Bit14 (967~985) 19 976,
1216 01:57:47.279023 TX Bit7 (977~993) 17 985, Bit15 (971~987) 17 979,
1217 01:57:47.279142
1218 01:57:47.279241 Write Rank0 MR14 =0xa
1219 01:57:47.279336
1220 01:57:47.282787 CH=0, VrefRange= 0, VrefLevel = 10
1221 01:57:47.285834 TX Bit0 (977~996) 20 986, Bit8 (965~981) 17 973,
1222 01:57:47.289198 TX Bit1 (976~994) 19 985, Bit9 (967~984) 18 975,
1223 01:57:47.292412 TX Bit2 (977~996) 20 986, Bit10 (972~990) 19 981,
1224 01:57:47.298885 TX Bit3 (973~990) 18 981, Bit11 (966~983) 18 974,
1225 01:57:47.302480 TX Bit4 (976~993) 18 984, Bit12 (968~984) 17 976,
1226 01:57:47.305849 TX Bit5 (975~992) 18 983, Bit13 (968~985) 18 976,
1227 01:57:47.312548 TX Bit6 (976~992) 17 984, Bit14 (967~986) 20 976,
1228 01:57:47.315918 TX Bit7 (977~993) 17 985, Bit15 (971~987) 17 979,
1229 01:57:47.316025
1230 01:57:47.319314 Write Rank0 MR14 =0xc
1231 01:57:47.327609
1232 01:57:47.330831 CH=0, VrefRange= 0, VrefLevel = 12
1233 01:57:47.333959 TX Bit0 (977~997) 21 987, Bit8 (965~982) 18 973,
1234 01:57:47.337362 TX Bit1 (976~995) 20 985, Bit9 (967~985) 19 976,
1235 01:57:47.344295 TX Bit2 (977~996) 20 986, Bit10 (972~990) 19 981,
1236 01:57:47.347720 TX Bit3 (971~991) 21 981, Bit11 (966~983) 18 974,
1237 01:57:47.351046 TX Bit4 (976~994) 19 985, Bit12 (968~985) 18 976,
1238 01:57:47.357314 TX Bit5 (974~993) 20 983, Bit13 (967~985) 19 976,
1239 01:57:47.360461 TX Bit6 (975~993) 19 984, Bit14 (967~986) 20 976,
1240 01:57:47.363891 TX Bit7 (977~994) 18 985, Bit15 (970~989) 20 979,
1241 01:57:47.363999
1242 01:57:47.367373 Write Rank0 MR14 =0xe
1243 01:57:47.376585
1244 01:57:47.380179 CH=0, VrefRange= 0, VrefLevel = 14
1245 01:57:47.383387 TX Bit0 (977~997) 21 987, Bit8 (965~983) 19 974,
1246 01:57:47.386932 TX Bit1 (976~995) 20 985, Bit9 (966~985) 20 975,
1247 01:57:47.393124 TX Bit2 (976~997) 22 986, Bit10 (971~990) 20 980,
1248 01:57:47.396507 TX Bit3 (971~991) 21 981, Bit11 (966~984) 19 975,
1249 01:57:47.399997 TX Bit4 (976~994) 19 985, Bit12 (968~985) 18 976,
1250 01:57:47.406662 TX Bit5 (974~993) 20 983, Bit13 (967~986) 20 976,
1251 01:57:47.409858 TX Bit6 (975~993) 19 984, Bit14 (967~986) 20 976,
1252 01:57:47.413244 TX Bit7 (977~994) 18 985, Bit15 (971~990) 20 980,
1253 01:57:47.413339
1254 01:57:47.416663 Write Rank0 MR14 =0x10
1255 01:57:47.426369
1256 01:57:47.429710 CH=0, VrefRange= 0, VrefLevel = 16
1257 01:57:47.432717 TX Bit0 (977~998) 22 987, Bit8 (964~983) 20 973,
1258 01:57:47.436482 TX Bit1 (976~996) 21 986, Bit9 (966~985) 20 975,
1259 01:57:47.443077 TX Bit2 (977~998) 22 987, Bit10 (970~990) 21 980,
1260 01:57:47.446451 TX Bit3 (971~991) 21 981, Bit11 (965~984) 20 974,
1261 01:57:47.449426 TX Bit4 (976~995) 20 985, Bit12 (967~985) 19 976,
1262 01:57:47.456298 TX Bit5 (974~993) 20 983, Bit13 (967~985) 19 976,
1263 01:57:47.459689 TX Bit6 (975~994) 20 984, Bit14 (967~987) 21 977,
1264 01:57:47.463166 TX Bit7 (977~995) 19 986, Bit15 (970~990) 21 980,
1265 01:57:47.463280
1266 01:57:47.466421 Write Rank0 MR14 =0x12
1267 01:57:47.475648
1268 01:57:47.479035 CH=0, VrefRange= 0, VrefLevel = 18
1269 01:57:47.482544 TX Bit0 (977~998) 22 987, Bit8 (964~983) 20 973,
1270 01:57:47.485690 TX Bit1 (976~997) 22 986, Bit9 (966~986) 21 976,
1271 01:57:47.492554 TX Bit2 (976~998) 23 987, Bit10 (970~991) 22 980,
1272 01:57:47.495851 TX Bit3 (971~992) 22 981, Bit11 (965~985) 21 975,
1273 01:57:47.499461 TX Bit4 (976~996) 21 986, Bit12 (967~986) 20 976,
1274 01:57:47.506358 TX Bit5 (974~994) 21 984, Bit13 (967~986) 20 976,
1275 01:57:47.508979 TX Bit6 (975~994) 20 984, Bit14 (967~988) 22 977,
1276 01:57:47.512886 TX Bit7 (976~995) 20 985, Bit15 (969~990) 22 979,
1277 01:57:47.513000
1278 01:57:47.515886 Write Rank0 MR14 =0x14
1279 01:57:47.525660
1280 01:57:47.528998 CH=0, VrefRange= 0, VrefLevel = 20
1281 01:57:47.532313 TX Bit0 (976~999) 24 987, Bit8 (963~984) 22 973,
1282 01:57:47.535573 TX Bit1 (976~998) 23 987, Bit9 (965~986) 22 975,
1283 01:57:47.541859 TX Bit2 (977~998) 22 987, Bit10 (969~991) 23 980,
1284 01:57:47.545361 TX Bit3 (970~992) 23 981, Bit11 (965~985) 21 975,
1285 01:57:47.548713 TX Bit4 (976~996) 21 986, Bit12 (967~987) 21 977,
1286 01:57:47.555364 TX Bit5 (973~994) 22 983, Bit13 (967~987) 21 977,
1287 01:57:47.559284 TX Bit6 (974~995) 22 984, Bit14 (966~988) 23 977,
1288 01:57:47.562324 TX Bit7 (976~996) 21 986, Bit15 (969~991) 23 980,
1289 01:57:47.562446
1290 01:57:47.565348 Write Rank0 MR14 =0x16
1291 01:57:47.575550
1292 01:57:47.575676 CH=0, VrefRange= 0, VrefLevel = 22
1293 01:57:47.581697 TX Bit0 (976~999) 24 987, Bit8 (964~984) 21 974,
1294 01:57:47.584906 TX Bit1 (976~997) 22 986, Bit9 (966~987) 22 976,
1295 01:57:47.591889 TX Bit2 (976~999) 24 987, Bit10 (969~991) 23 980,
1296 01:57:47.595368 TX Bit3 (970~992) 23 981, Bit11 (965~985) 21 975,
1297 01:57:47.598616 TX Bit4 (975~996) 22 985, Bit12 (967~988) 22 977,
1298 01:57:47.605334 TX Bit5 (973~995) 23 984, Bit13 (966~988) 23 977,
1299 01:57:47.608746 TX Bit6 (974~995) 22 984, Bit14 (966~989) 24 977,
1300 01:57:47.612060 TX Bit7 (976~997) 22 986, Bit15 (969~991) 23 980,
1301 01:57:47.612235
1302 01:57:47.618332 wait MRW command Rank0 MR14 =0x18 fired (1)
1303 01:57:47.618475 Write Rank0 MR14 =0x18
1304 01:57:47.628554
1305 01:57:47.628685 CH=0, VrefRange= 0, VrefLevel = 24
1306 01:57:47.635256 TX Bit0 (976~999) 24 987, Bit8 (962~985) 24 973,
1307 01:57:47.638851 TX Bit1 (975~999) 25 987, Bit9 (966~988) 23 977,
1308 01:57:47.645170 TX Bit2 (976~999) 24 987, Bit10 (969~992) 24 980,
1309 01:57:47.648751 TX Bit3 (969~992) 24 980, Bit11 (965~986) 22 975,
1310 01:57:47.651958 TX Bit4 (975~998) 24 986, Bit12 (967~989) 23 978,
1311 01:57:47.658981 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1312 01:57:47.661651 TX Bit6 (973~996) 24 984, Bit14 (966~990) 25 978,
1313 01:57:47.664955 TX Bit7 (976~997) 22 986, Bit15 (968~991) 24 979,
1314 01:57:47.665093
1315 01:57:47.668250 Write Rank0 MR14 =0x1a
1316 01:57:47.678167
1317 01:57:47.681597 CH=0, VrefRange= 0, VrefLevel = 26
1318 01:57:47.684966 TX Bit0 (976~999) 24 987, Bit8 (962~984) 23 973,
1319 01:57:47.688523 TX Bit1 (975~999) 25 987, Bit9 (965~988) 24 976,
1320 01:57:47.694987 TX Bit2 (975~999) 25 987, Bit10 (969~992) 24 980,
1321 01:57:47.698214 TX Bit3 (969~993) 25 981, Bit11 (964~986) 23 975,
1322 01:57:47.701763 TX Bit4 (975~998) 24 986, Bit12 (967~990) 24 978,
1323 01:57:47.708315 TX Bit5 (972~996) 25 984, Bit13 (966~989) 24 977,
1324 01:57:47.711823 TX Bit6 (973~997) 25 985, Bit14 (966~990) 25 978,
1325 01:57:47.715197 TX Bit7 (976~998) 23 987, Bit15 (968~992) 25 980,
1326 01:57:47.715327
1327 01:57:47.718069 Write Rank0 MR14 =0x1c
1328 01:57:47.728178
1329 01:57:47.731611 CH=0, VrefRange= 0, VrefLevel = 28
1330 01:57:47.734833 TX Bit0 (976~1000) 25 988, Bit8 (962~986) 25 974,
1331 01:57:47.738178 TX Bit1 (976~999) 24 987, Bit9 (965~988) 24 976,
1332 01:57:47.744916 TX Bit2 (975~999) 25 987, Bit10 (968~992) 25 980,
1333 01:57:47.748258 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1334 01:57:47.751279 TX Bit4 (975~999) 25 987, Bit12 (966~990) 25 978,
1335 01:57:47.758394 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1336 01:57:47.761637 TX Bit6 (973~998) 26 985, Bit14 (966~990) 25 978,
1337 01:57:47.765014 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1338 01:57:47.765146
1339 01:57:47.768309 Write Rank0 MR14 =0x1e
1340 01:57:47.778283
1341 01:57:47.781070 CH=0, VrefRange= 0, VrefLevel = 30
1342 01:57:47.784311 TX Bit0 (976~1000) 25 988, Bit8 (962~986) 25 974,
1343 01:57:47.788002 TX Bit1 (976~999) 24 987, Bit9 (965~988) 24 976,
1344 01:57:47.795225 TX Bit2 (975~999) 25 987, Bit10 (968~992) 25 980,
1345 01:57:47.797934 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1346 01:57:47.801489 TX Bit4 (975~999) 25 987, Bit12 (966~990) 25 978,
1347 01:57:47.808068 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1348 01:57:47.811255 TX Bit6 (973~998) 26 985, Bit14 (966~990) 25 978,
1349 01:57:47.814920 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1350 01:57:47.815010
1351 01:57:47.817789 Write Rank0 MR14 =0x20
1352 01:57:47.827815
1353 01:57:47.830992 CH=0, VrefRange= 0, VrefLevel = 32
1354 01:57:47.834368 TX Bit0 (976~1000) 25 988, Bit8 (962~986) 25 974,
1355 01:57:47.837699 TX Bit1 (976~999) 24 987, Bit9 (965~988) 24 976,
1356 01:57:47.844454 TX Bit2 (975~999) 25 987, Bit10 (968~992) 25 980,
1357 01:57:47.847866 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1358 01:57:47.851229 TX Bit4 (975~999) 25 987, Bit12 (966~990) 25 978,
1359 01:57:47.857999 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1360 01:57:47.861210 TX Bit6 (973~998) 26 985, Bit14 (966~990) 25 978,
1361 01:57:47.864710 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1362 01:57:47.864827
1363 01:57:47.867663 Write Rank0 MR14 =0x22
1364 01:57:47.877930
1365 01:57:47.881352 CH=0, VrefRange= 0, VrefLevel = 34
1366 01:57:47.884292 TX Bit0 (976~1000) 25 988, Bit8 (962~986) 25 974,
1367 01:57:47.887593 TX Bit1 (976~999) 24 987, Bit9 (965~988) 24 976,
1368 01:57:47.894575 TX Bit2 (975~999) 25 987, Bit10 (968~992) 25 980,
1369 01:57:47.897919 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1370 01:57:47.901292 TX Bit4 (975~999) 25 987, Bit12 (966~990) 25 978,
1371 01:57:47.907805 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1372 01:57:47.911200 TX Bit6 (973~998) 26 985, Bit14 (966~990) 25 978,
1373 01:57:47.914807 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1374 01:57:47.914913
1375 01:57:47.915013
1376 01:57:47.918425 TX Vref found, early break! 375< 376
1377 01:57:47.924970 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1378 01:57:47.928260 u1DelayCellOfst[0]=9 cells (7 PI)
1379 01:57:47.931492 u1DelayCellOfst[1]=7 cells (6 PI)
1380 01:57:47.934732 u1DelayCellOfst[2]=7 cells (6 PI)
1381 01:57:47.934850 u1DelayCellOfst[3]=0 cells (0 PI)
1382 01:57:47.938246 u1DelayCellOfst[4]=7 cells (6 PI)
1383 01:57:47.941577 u1DelayCellOfst[5]=2 cells (2 PI)
1384 01:57:47.944912 u1DelayCellOfst[6]=5 cells (4 PI)
1385 01:57:47.948350 u1DelayCellOfst[7]=7 cells (6 PI)
1386 01:57:47.951210 Byte0, DQ PI dly=981, DQM PI dly= 984
1387 01:57:47.954504 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1388 01:57:47.954629
1389 01:57:47.961305 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1390 01:57:47.961433
1391 01:57:47.964582 u1DelayCellOfst[8]=0 cells (0 PI)
1392 01:57:47.967959 u1DelayCellOfst[9]=2 cells (2 PI)
1393 01:57:47.971532 u1DelayCellOfst[10]=7 cells (6 PI)
1394 01:57:47.971622 u1DelayCellOfst[11]=1 cells (1 PI)
1395 01:57:47.974861 u1DelayCellOfst[12]=5 cells (4 PI)
1396 01:57:47.978279 u1DelayCellOfst[13]=3 cells (3 PI)
1397 01:57:47.981233 u1DelayCellOfst[14]=5 cells (4 PI)
1398 01:57:47.984847 u1DelayCellOfst[15]=7 cells (6 PI)
1399 01:57:47.988429 Byte1, DQ PI dly=974, DQM PI dly= 977
1400 01:57:47.991467 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
1401 01:57:47.994752
1402 01:57:47.998257 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
1403 01:57:47.998346
1404 01:57:47.998412 Write Rank0 MR14 =0x1c
1405 01:57:48.001529
1406 01:57:48.001614 Final TX Range 0 Vref 28
1407 01:57:48.001681
1408 01:57:48.008403 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1409 01:57:48.008492
1410 01:57:48.014886 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1411 01:57:48.021358 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1412 01:57:48.028171 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1413 01:57:48.031653 Write Rank0 MR3 =0xb0
1414 01:57:48.031765 DramC Write-DBI on
1415 01:57:48.034806 ==
1416 01:57:48.038347 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1417 01:57:48.041572 fsp= 1, odt_onoff= 1, Byte mode= 0
1418 01:57:48.041684 ==
1419 01:57:48.044820 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1420 01:57:48.044930
1421 01:57:48.048619 Begin, DQ Scan Range 697~761
1422 01:57:48.048737
1423 01:57:48.048835
1424 01:57:48.051626 TX Vref Scan disable
1425 01:57:48.055029 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1426 01:57:48.058380 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1427 01:57:48.061752 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1428 01:57:48.065185 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1429 01:57:48.068552 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1430 01:57:48.071484 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1431 01:57:48.074737 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1432 01:57:48.078565 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1433 01:57:48.081642 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1434 01:57:48.085298 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1435 01:57:48.088463 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1436 01:57:48.091609 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1437 01:57:48.095325 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1438 01:57:48.098744 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1439 01:57:48.105053 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1440 01:57:48.108541 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1441 01:57:48.111727 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1442 01:57:48.115112 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1443 01:57:48.118577 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1444 01:57:48.121799 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1445 01:57:48.125046 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1446 01:57:48.128410 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1447 01:57:48.135461 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1448 01:57:48.138759 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1449 01:57:48.143563 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1450 01:57:48.146156 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1451 01:57:48.148623 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1452 01:57:48.152239 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1453 01:57:48.155469 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1454 01:57:48.158734 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1455 01:57:48.161897 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1456 01:57:48.165387 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1457 01:57:48.168760 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1458 01:57:48.172211 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
1459 01:57:48.175600 Byte0, DQ PI dly=731, DQM PI dly= 731
1460 01:57:48.181859 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
1461 01:57:48.181972
1462 01:57:48.185506 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
1463 01:57:48.185609
1464 01:57:48.188990 Byte1, DQ PI dly=721, DQM PI dly= 721
1465 01:57:48.191910 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
1466 01:57:48.192014
1467 01:57:48.198663 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
1468 01:57:48.198752
1469 01:57:48.205227 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1470 01:57:48.212311 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1471 01:57:48.218806 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1472 01:57:48.218894 Write Rank0 MR3 =0x30
1473 01:57:48.222119 DramC Write-DBI off
1474 01:57:48.222206
1475 01:57:48.222272 [DATLAT]
1476 01:57:48.225617 Freq=1600, CH0 RK0, use_rxtx_scan=0
1477 01:57:48.225704
1478 01:57:48.228757 DATLAT Default: 0xf
1479 01:57:48.228844 7, 0xFFFF, sum=0
1480 01:57:48.231856 8, 0xFFFF, sum=0
1481 01:57:48.231943 9, 0xFFFF, sum=0
1482 01:57:48.235202 10, 0xFFFF, sum=0
1483 01:57:48.235289 11, 0xFFFF, sum=0
1484 01:57:48.238639 12, 0xFFFF, sum=0
1485 01:57:48.238726 13, 0xFFFF, sum=0
1486 01:57:48.241910 14, 0x0, sum=1
1487 01:57:48.241997 15, 0x0, sum=2
1488 01:57:48.242064 16, 0x0, sum=3
1489 01:57:48.245557 17, 0x0, sum=4
1490 01:57:48.249112 pattern=2 first_step=14 total pass=5 best_step=16
1491 01:57:48.249198 ==
1492 01:57:48.255653 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1493 01:57:48.258862 fsp= 1, odt_onoff= 1, Byte mode= 0
1494 01:57:48.258970 ==
1495 01:57:48.262008 Start DQ dly to find pass range UseTestEngine =1
1496 01:57:48.265498 x-axis: bit #, y-axis: DQ dly (-127~63)
1497 01:57:48.268642 RX Vref Scan = 1
1498 01:57:48.381821
1499 01:57:48.381944 RX Vref found, early break!
1500 01:57:48.382014
1501 01:57:48.388723 Final RX Vref 12, apply to both rank0 and 1
1502 01:57:48.388839 ==
1503 01:57:48.392058 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1504 01:57:48.395309 fsp= 1, odt_onoff= 1, Byte mode= 0
1505 01:57:48.395418 ==
1506 01:57:48.395514 DQS Delay:
1507 01:57:48.398484 DQS0 = 0, DQS1 = 0
1508 01:57:48.398607 DQM Delay:
1509 01:57:48.401683 DQM0 = 19, DQM1 = 19
1510 01:57:48.401790 DQ Delay:
1511 01:57:48.405531 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15
1512 01:57:48.408375 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
1513 01:57:48.411769 DQ8 =14, DQ9 =17, DQ10 =25, DQ11 =17
1514 01:57:48.414887 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1515 01:57:48.415004
1516 01:57:48.415102
1517 01:57:48.415196
1518 01:57:48.418367 [DramC_TX_OE_Calibration] TA2
1519 01:57:48.421863 Original DQ_B0 (3 6) =30, OEN = 27
1520 01:57:48.425158 Original DQ_B1 (3 6) =30, OEN = 27
1521 01:57:48.428579 23, 0x0, End_B0=23 End_B1=23
1522 01:57:48.428662 24, 0x0, End_B0=24 End_B1=24
1523 01:57:48.431973 25, 0x0, End_B0=25 End_B1=25
1524 01:57:48.435491 26, 0x0, End_B0=26 End_B1=26
1525 01:57:48.438884 27, 0x0, End_B0=27 End_B1=27
1526 01:57:48.438968 28, 0x0, End_B0=28 End_B1=28
1527 01:57:48.441955 29, 0x0, End_B0=29 End_B1=29
1528 01:57:48.445495 30, 0x0, End_B0=30 End_B1=30
1529 01:57:48.448851 31, 0xFFFF, End_B0=30 End_B1=30
1530 01:57:48.451777 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1531 01:57:48.458474 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1532 01:57:48.458587
1533 01:57:48.458688
1534 01:57:48.462035 Write Rank0 MR23 =0x3f
1535 01:57:48.462156 [DQSOSC]
1536 01:57:48.471944 [DQSOSCAuto] RK0, (LSB)MR18= 0x1414, (MSB)MR19= 0x303, tDQSOscB0 = 399 ps tDQSOscB1 = 399 ps
1537 01:57:48.475209 CH0_RK0: MR19=0x303, MR18=0x1414, DQSOSC=399, MR23=63, INC=15, DEC=23
1538 01:57:48.478755 Write Rank0 MR23 =0x3f
1539 01:57:48.478838 [DQSOSC]
1540 01:57:48.488718 [DQSOSCAuto] RK0, (LSB)MR18= 0x1313, (MSB)MR19= 0x303, tDQSOscB0 = 400 ps tDQSOscB1 = 400 ps
1541 01:57:48.488829 CH0 RK0: MR19=303, MR18=1313
1542 01:57:48.495385 [RankSwap] Rank num 2, (Multi 1), Rank 1
1543 01:57:48.495499 Write Rank0 MR2 =0xad
1544 01:57:48.498500 [Write Leveling]
1545 01:57:48.502194 delay byte0 byte1 byte2 byte3
1546 01:57:48.502312
1547 01:57:48.502407 10 0 0
1548 01:57:48.502487 11 0 0
1549 01:57:48.505456 12 0 0
1550 01:57:48.505547 13 0 0
1551 01:57:48.508583 14 0 0
1552 01:57:48.508670 15 0 0
1553 01:57:48.508739 16 0 0
1554 01:57:48.511810 17 0 0
1555 01:57:48.511924 18 0 0
1556 01:57:48.515305 19 0 0
1557 01:57:48.515411 20 0 0
1558 01:57:48.518596 21 0 0
1559 01:57:48.518710 22 0 0
1560 01:57:48.518814 23 0 ff
1561 01:57:48.521842 24 0 ff
1562 01:57:48.521934 25 0 ff
1563 01:57:48.525862 26 0 ff
1564 01:57:48.525950 27 ff ff
1565 01:57:48.528666 28 ff ff
1566 01:57:48.528757 29 ff ff
1567 01:57:48.532088 30 ff ff
1568 01:57:48.532176 31 ff ff
1569 01:57:48.532249 32 ff ff
1570 01:57:48.535409 33 ff ff
1571 01:57:48.538888 pass bytecount = 0xff (0xff: all bytes pass)
1572 01:57:48.538966
1573 01:57:48.542347 DQS0 dly: 27
1574 01:57:48.542433 DQS1 dly: 23
1575 01:57:48.545486 Write Rank0 MR2 =0x2d
1576 01:57:48.548910 [RankSwap] Rank num 2, (Multi 1), Rank 0
1577 01:57:48.549023 Write Rank1 MR1 =0xd6
1578 01:57:48.549118 [Gating]
1579 01:57:48.552011 ==
1580 01:57:48.555964 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1581 01:57:48.559122 fsp= 1, odt_onoff= 1, Byte mode= 0
1582 01:57:48.559209 ==
1583 01:57:48.562366 3 1 0 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1584 01:57:48.569029 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
1585 01:57:48.572212 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1586 01:57:48.575620 3 1 12 |2d2c 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1587 01:57:48.582190 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1588 01:57:48.585929 3 1 20 |404 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1589 01:57:48.589010 3 1 24 |2c2c 3534 |(0 0)(11 11) |(0 0)(0 1)| 0
1590 01:57:48.592681 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1591 01:57:48.599167 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1592 01:57:48.602470 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1593 01:57:48.605834 3 2 8 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1594 01:57:48.612291 3 2 12 |3635 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1595 01:57:48.615774 3 2 16 |3534 707 |(11 11)(11 11) |(0 0)(1 1)| 0
1596 01:57:48.619011 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1597 01:57:48.625953 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1598 01:57:48.629080 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1599 01:57:48.632115 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1600 01:57:48.635542 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1601 01:57:48.642212 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1602 01:57:48.645562 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1603 01:57:48.649016 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1604 01:57:48.655297 3 3 20 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
1605 01:57:48.658672 3 3 24 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
1606 01:57:48.662136 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1607 01:57:48.668865 [Byte 1] Lead/lag falling Transition (3, 3, 28)
1608 01:57:48.672289 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1609 01:57:48.675603 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1610 01:57:48.678921 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1611 01:57:48.685412 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1612 01:57:48.689331 3 4 16 |3d3d 1515 |(11 11)(11 11) |(1 1)(1 1)| 0
1613 01:57:48.692131 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1614 01:57:48.698843 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1615 01:57:48.702181 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1616 01:57:48.705504 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1617 01:57:48.712324 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1618 01:57:48.715762 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1619 01:57:48.719037 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1620 01:57:48.722514 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1621 01:57:48.728853 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1622 01:57:48.732120 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1623 01:57:48.735561 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1624 01:57:48.742426 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1625 01:57:48.745603 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1626 01:57:48.749227 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1627 01:57:48.752572 [Byte 0] Lead/lag Transition tap number (2)
1628 01:57:48.759277 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1629 01:57:48.762502 3 6 8 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1630 01:57:48.766161 [Byte 1] Lead/lag Transition tap number (2)
1631 01:57:48.769453 3 6 12 |4646 909 |(0 0)(11 11) |(0 0)(0 0)| 0
1632 01:57:48.772950 [Byte 0]First pass (3, 6, 12)
1633 01:57:48.775693 3 6 16 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
1634 01:57:48.782471 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1635 01:57:48.782561 [Byte 1]First pass (3, 6, 20)
1636 01:57:48.789414 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1637 01:57:48.792670 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1638 01:57:48.795991 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1639 01:57:48.799608 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1640 01:57:48.802628 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1641 01:57:48.809506 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1642 01:57:48.812793 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1643 01:57:48.815926 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1644 01:57:48.819476 All bytes gating window > 1UI, Early break!
1645 01:57:48.819562
1646 01:57:48.822613 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1647 01:57:48.822726
1648 01:57:48.825862 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1649 01:57:48.825948
1650 01:57:48.826013
1651 01:57:48.829435
1652 01:57:48.832796 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1653 01:57:48.832883
1654 01:57:48.836101 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1655 01:57:48.836197
1656 01:57:48.836278
1657 01:57:48.839383 Write Rank1 MR1 =0x56
1658 01:57:48.839469
1659 01:57:48.839535 best RODT dly(2T, 0.5T) = (2, 3)
1660 01:57:48.842705
1661 01:57:48.842791 best RODT dly(2T, 0.5T) = (2, 3)
1662 01:57:48.846060 ==
1663 01:57:48.849172 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1664 01:57:48.852595 fsp= 1, odt_onoff= 1, Byte mode= 0
1665 01:57:48.852682 ==
1666 01:57:48.855818 Start DQ dly to find pass range UseTestEngine =0
1667 01:57:48.859173 x-axis: bit #, y-axis: DQ dly (-127~63)
1668 01:57:48.862632 RX Vref Scan = 0
1669 01:57:48.865924 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1670 01:57:48.869442 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1671 01:57:48.869533 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1672 01:57:48.872566 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1673 01:57:48.876393 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1674 01:57:48.879486 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1675 01:57:48.882979 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1676 01:57:48.886254 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1677 01:57:48.889451 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1678 01:57:48.893060 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1679 01:57:48.893176 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1680 01:57:48.895883 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1681 01:57:48.899292 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1682 01:57:48.902586 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1683 01:57:48.906242 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1684 01:57:48.909323 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1685 01:57:48.913048 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1686 01:57:48.916597 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1687 01:57:48.916685 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1688 01:57:48.919885 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1689 01:57:48.922948 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1690 01:57:48.926601 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1691 01:57:48.929438 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1692 01:57:48.933128 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1693 01:57:48.935997 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1694 01:57:48.936091 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1695 01:57:48.939835 0, [0] xxxoxxxx oxxoxxxx [MSB]
1696 01:57:48.943101 1, [0] xxxoxoxx ooxoooxx [MSB]
1697 01:57:48.946370 2, [0] xxxoxooo ooxoooxx [MSB]
1698 01:57:48.949527 3, [0] xoxooooo ooxoooox [MSB]
1699 01:57:48.952812 4, [0] oooooooo ooxooooo [MSB]
1700 01:57:48.952900 5, [0] oooooooo ooxooooo [MSB]
1701 01:57:48.955977 6, [0] oooooooo ooxooooo [MSB]
1702 01:57:48.959352 34, [0] oooooooo xooooooo [MSB]
1703 01:57:48.962828 35, [0] oooxoooo xooooooo [MSB]
1704 01:57:48.966184 36, [0] oooxoooo xooxoooo [MSB]
1705 01:57:48.969485 37, [0] oooxoxoo xxoxoxoo [MSB]
1706 01:57:48.972856 38, [0] oooxoxoo xxoxoxxo [MSB]
1707 01:57:48.972944 39, [0] oooxoxox xxoxxxxo [MSB]
1708 01:57:48.975913 40, [0] oooxoxxx xxoxxxxo [MSB]
1709 01:57:48.979452 41, [0] oxxxxxxx xxoxxxxx [MSB]
1710 01:57:48.982925 42, [0] oxxxxxxx xxoxxxxx [MSB]
1711 01:57:48.985755 43, [0] xxxxxxxx xxoxxxxx [MSB]
1712 01:57:48.989063 44, [0] xxxxxxxx xxoxxxxx [MSB]
1713 01:57:48.992409 45, [0] xxxxxxxx xxxxxxxx [MSB]
1714 01:57:48.995970 iDelay=45, Bit 0, Center 23 (4 ~ 42) 39
1715 01:57:48.999307 iDelay=45, Bit 1, Center 21 (3 ~ 40) 38
1716 01:57:49.002824 iDelay=45, Bit 2, Center 22 (4 ~ 40) 37
1717 01:57:49.006103 iDelay=45, Bit 3, Center 16 (-2 ~ 34) 37
1718 01:57:49.009415 iDelay=45, Bit 4, Center 21 (3 ~ 40) 38
1719 01:57:49.012397 iDelay=45, Bit 5, Center 18 (1 ~ 36) 36
1720 01:57:49.016124 iDelay=45, Bit 6, Center 20 (2 ~ 39) 38
1721 01:57:49.019346 iDelay=45, Bit 7, Center 20 (2 ~ 38) 37
1722 01:57:49.022650 iDelay=45, Bit 8, Center 15 (-2 ~ 33) 36
1723 01:57:49.026124 iDelay=45, Bit 9, Center 18 (1 ~ 36) 36
1724 01:57:49.029444 iDelay=45, Bit 10, Center 25 (7 ~ 44) 38
1725 01:57:49.032588 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1726 01:57:49.036164 iDelay=45, Bit 12, Center 19 (1 ~ 38) 38
1727 01:57:49.042728 iDelay=45, Bit 13, Center 18 (1 ~ 36) 36
1728 01:57:49.045682 iDelay=45, Bit 14, Center 20 (3 ~ 37) 35
1729 01:57:49.049075 iDelay=45, Bit 15, Center 22 (4 ~ 40) 37
1730 01:57:49.049161 ==
1731 01:57:49.052880 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1732 01:57:49.056005 fsp= 1, odt_onoff= 1, Byte mode= 0
1733 01:57:49.056092 ==
1734 01:57:49.059169 DQS Delay:
1735 01:57:49.059254 DQS0 = 0, DQS1 = 0
1736 01:57:49.059321 DQM Delay:
1737 01:57:49.062608 DQM0 = 20, DQM1 = 19
1738 01:57:49.062693 DQ Delay:
1739 01:57:49.065909 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =16
1740 01:57:49.069108 DQ4 =21, DQ5 =18, DQ6 =20, DQ7 =20
1741 01:57:49.072474 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
1742 01:57:49.075879 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1743 01:57:49.075965
1744 01:57:49.076032
1745 01:57:49.079246 DramC Write-DBI off
1746 01:57:49.079331 ==
1747 01:57:49.082552 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1748 01:57:49.086283 fsp= 1, odt_onoff= 1, Byte mode= 0
1749 01:57:49.086368 ==
1750 01:57:49.092915 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1751 01:57:49.093003
1752 01:57:49.093069 Begin, DQ Scan Range 919~1175
1753 01:57:49.096138
1754 01:57:49.096224
1755 01:57:49.096290 TX Vref Scan disable
1756 01:57:49.099469 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1757 01:57:49.102917 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1758 01:57:49.106023 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1759 01:57:49.109847 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1760 01:57:49.113129 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1761 01:57:49.119533 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1762 01:57:49.123035 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1763 01:57:49.126351 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1764 01:57:49.129839 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1765 01:57:49.133114 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1766 01:57:49.136388 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1767 01:57:49.139539 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1768 01:57:49.142748 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1769 01:57:49.146208 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1770 01:57:49.149646 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1771 01:57:49.152914 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1772 01:57:49.156521 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1773 01:57:49.159947 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1774 01:57:49.163320 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1775 01:57:49.166474 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1776 01:57:49.169918 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1777 01:57:49.173264 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1778 01:57:49.176716 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1779 01:57:49.183413 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1780 01:57:49.186715 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1781 01:57:49.190056 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1782 01:57:49.193306 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1783 01:57:49.196365 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1784 01:57:49.200026 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1785 01:57:49.203106 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1786 01:57:49.206446 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1787 01:57:49.209780 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1788 01:57:49.213575 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1789 01:57:49.216708 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1790 01:57:49.220071 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1791 01:57:49.223189 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1792 01:57:49.226677 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1793 01:57:49.230203 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1794 01:57:49.233624 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1795 01:57:49.236765 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1796 01:57:49.239966 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1797 01:57:49.246588 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1798 01:57:49.249772 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1799 01:57:49.253261 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1800 01:57:49.256450 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1801 01:57:49.259885 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1802 01:57:49.263322 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1803 01:57:49.266942 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1804 01:57:49.269833 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1805 01:57:49.273267 968 |3 6 8|[0] xxxxxxxx ooxooxxx [MSB]
1806 01:57:49.276882 969 |3 6 9|[0] xxxxxxxx ooxooxox [MSB]
1807 01:57:49.280024 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1808 01:57:49.283469 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1809 01:57:49.286449 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1810 01:57:49.289816 973 |3 6 13|[0] xxxxxxxx ooxooooo [MSB]
1811 01:57:49.293242 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1812 01:57:49.296604 975 |3 6 15|[0] xoxooooo oooooooo [MSB]
1813 01:57:49.299893 976 |3 6 16|[0] xoxooooo oooooooo [MSB]
1814 01:57:49.307564 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1815 01:57:49.310798 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1816 01:57:49.314116 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1817 01:57:49.317326 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1818 01:57:49.321090 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1819 01:57:49.324439 991 |3 6 31|[0] oooxoooo xxxxxxxx [MSB]
1820 01:57:49.327257 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1821 01:57:49.330840 993 |3 6 33|[0] xxxxxxxx xxxxxxxx [MSB]
1822 01:57:49.334051 Byte0, DQ PI dly=983, DQM PI dly= 983
1823 01:57:49.337600 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
1824 01:57:49.337714
1825 01:57:49.344073 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
1826 01:57:49.344162
1827 01:57:49.347407 Byte1, DQ PI dly=977, DQM PI dly= 977
1828 01:57:49.350660 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1829 01:57:49.350776
1830 01:57:49.353941 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1831 01:57:49.354026
1832 01:57:49.354116 ==
1833 01:57:49.360516 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1834 01:57:49.363888 fsp= 1, odt_onoff= 1, Byte mode= 0
1835 01:57:49.364003 ==
1836 01:57:49.367703 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1837 01:57:49.367818
1838 01:57:49.371142 Begin, DQ Scan Range 953~1017
1839 01:57:49.373905 Write Rank1 MR14 =0x0
1840 01:57:49.381140
1841 01:57:49.381265 CH=0, VrefRange= 0, VrefLevel = 0
1842 01:57:49.387753 TX Bit0 (978~991) 14 984, Bit8 (968~981) 14 974,
1843 01:57:49.391114 TX Bit1 (977~989) 13 983, Bit9 (970~983) 14 976,
1844 01:57:49.394588 TX Bit2 (978~990) 13 984, Bit10 (976~987) 12 981,
1845 01:57:49.401108 TX Bit3 (972~983) 12 977, Bit11 (969~982) 14 975,
1846 01:57:49.404542 TX Bit4 (977~990) 14 983, Bit12 (971~983) 13 977,
1847 01:57:49.411017 TX Bit5 (975~986) 12 980, Bit13 (974~982) 9 978,
1848 01:57:49.414289 TX Bit6 (975~988) 14 981, Bit14 (973~984) 12 978,
1849 01:57:49.418003 TX Bit7 (976~990) 15 983, Bit15 (975~987) 13 981,
1850 01:57:49.418122
1851 01:57:49.420901 Write Rank1 MR14 =0x2
1852 01:57:49.428974
1853 01:57:49.429102 CH=0, VrefRange= 0, VrefLevel = 2
1854 01:57:49.435714 TX Bit0 (977~992) 16 984, Bit8 (968~982) 15 975,
1855 01:57:49.438771 TX Bit1 (977~990) 14 983, Bit9 (970~984) 15 977,
1856 01:57:49.445612 TX Bit2 (978~991) 14 984, Bit10 (976~988) 13 982,
1857 01:57:49.448984 TX Bit3 (971~984) 14 977, Bit11 (969~982) 14 975,
1858 01:57:49.452337 TX Bit4 (977~990) 14 983, Bit12 (971~984) 14 977,
1859 01:57:49.458921 TX Bit5 (974~987) 14 980, Bit13 (973~982) 10 977,
1860 01:57:49.462485 TX Bit6 (975~989) 15 982, Bit14 (972~984) 13 978,
1861 01:57:49.465771 TX Bit7 (976~990) 15 983, Bit15 (975~988) 14 981,
1862 01:57:49.465887
1863 01:57:49.469128 Write Rank1 MR14 =0x4
1864 01:57:49.476877
1865 01:57:49.476994 CH=0, VrefRange= 0, VrefLevel = 4
1866 01:57:49.483601 TX Bit0 (977~992) 16 984, Bit8 (968~982) 15 975,
1867 01:57:49.486892 TX Bit1 (977~991) 15 984, Bit9 (969~984) 16 976,
1868 01:57:49.493644 TX Bit2 (978~991) 14 984, Bit10 (975~989) 15 982,
1869 01:57:49.496789 TX Bit3 (971~985) 15 978, Bit11 (969~982) 14 975,
1870 01:57:49.500196 TX Bit4 (977~991) 15 984, Bit12 (970~985) 16 977,
1871 01:57:49.506912 TX Bit5 (973~988) 16 980, Bit13 (973~983) 11 978,
1872 01:57:49.510352 TX Bit6 (975~990) 16 982, Bit14 (971~985) 15 978,
1873 01:57:49.513457 TX Bit7 (976~991) 16 983, Bit15 (975~989) 15 982,
1874 01:57:49.513576
1875 01:57:49.516915 Write Rank1 MR14 =0x6
1876 01:57:49.525436
1877 01:57:49.525555 CH=0, VrefRange= 0, VrefLevel = 6
1878 01:57:49.531911 TX Bit0 (977~993) 17 985, Bit8 (968~983) 16 975,
1879 01:57:49.535085 TX Bit1 (977~991) 15 984, Bit9 (969~985) 17 977,
1880 01:57:49.542196 TX Bit2 (978~991) 14 984, Bit10 (975~990) 16 982,
1881 01:57:49.545301 TX Bit3 (970~986) 17 978, Bit11 (968~983) 16 975,
1882 01:57:49.548875 TX Bit4 (976~991) 16 983, Bit12 (970~985) 16 977,
1883 01:57:49.555568 TX Bit5 (973~988) 16 980, Bit13 (972~984) 13 978,
1884 01:57:49.559123 TX Bit6 (974~990) 17 982, Bit14 (971~986) 16 978,
1885 01:57:49.562227 TX Bit7 (975~991) 17 983, Bit15 (974~989) 16 981,
1886 01:57:49.562316
1887 01:57:49.565555 Write Rank1 MR14 =0x8
1888 01:57:49.573336
1889 01:57:49.573453 CH=0, VrefRange= 0, VrefLevel = 8
1890 01:57:49.580618 TX Bit0 (977~993) 17 985, Bit8 (967~983) 17 975,
1891 01:57:49.583484 TX Bit1 (977~991) 15 984, Bit9 (969~985) 17 977,
1892 01:57:49.590187 TX Bit2 (977~992) 16 984, Bit10 (975~990) 16 982,
1893 01:57:49.594015 TX Bit3 (970~986) 17 978, Bit11 (968~984) 17 976,
1894 01:57:49.596867 TX Bit4 (976~991) 16 983, Bit12 (970~986) 17 978,
1895 01:57:49.603575 TX Bit5 (972~990) 19 981, Bit13 (971~984) 14 977,
1896 01:57:49.606745 TX Bit6 (974~991) 18 982, Bit14 (970~987) 18 978,
1897 01:57:49.609997 TX Bit7 (975~992) 18 983, Bit15 (974~990) 17 982,
1898 01:57:49.610086
1899 01:57:49.613365 Write Rank1 MR14 =0xa
1900 01:57:49.622257
1901 01:57:49.625348 CH=0, VrefRange= 0, VrefLevel = 10
1902 01:57:49.628905 TX Bit0 (977~994) 18 985, Bit8 (967~984) 18 975,
1903 01:57:49.632299 TX Bit1 (976~992) 17 984, Bit9 (968~986) 19 977,
1904 01:57:49.639055 TX Bit2 (977~993) 17 985, Bit10 (975~991) 17 983,
1905 01:57:49.642163 TX Bit3 (970~987) 18 978, Bit11 (968~984) 17 976,
1906 01:57:49.645471 TX Bit4 (975~992) 18 983, Bit12 (969~986) 18 977,
1907 01:57:49.652037 TX Bit5 (972~990) 19 981, Bit13 (971~984) 14 977,
1908 01:57:49.655840 TX Bit6 (974~991) 18 982, Bit14 (970~987) 18 978,
1909 01:57:49.658659 TX Bit7 (975~992) 18 983, Bit15 (973~991) 19 982,
1910 01:57:49.658783
1911 01:57:49.662355 Write Rank1 MR14 =0xc
1912 01:57:49.670825
1913 01:57:49.674048 CH=0, VrefRange= 0, VrefLevel = 12
1914 01:57:49.677205 TX Bit0 (977~994) 18 985, Bit8 (967~984) 18 975,
1915 01:57:49.680887 TX Bit1 (976~992) 17 984, Bit9 (968~987) 20 977,
1916 01:57:49.687591 TX Bit2 (977~993) 17 985, Bit10 (974~991) 18 982,
1917 01:57:49.690543 TX Bit3 (970~988) 19 979, Bit11 (967~985) 19 976,
1918 01:57:49.694294 TX Bit4 (975~992) 18 983, Bit12 (969~987) 19 978,
1919 01:57:49.700824 TX Bit5 (971~991) 21 981, Bit13 (970~985) 16 977,
1920 01:57:49.703982 TX Bit6 (973~991) 19 982, Bit14 (969~989) 21 979,
1921 01:57:49.707735 TX Bit7 (974~992) 19 983, Bit15 (973~991) 19 982,
1922 01:57:49.707849
1923 01:57:49.710385 Write Rank1 MR14 =0xe
1924 01:57:49.719204
1925 01:57:49.719325 CH=0, VrefRange= 0, VrefLevel = 14
1926 01:57:49.726239 TX Bit0 (976~995) 20 985, Bit8 (967~985) 19 976,
1927 01:57:49.729140 TX Bit1 (976~993) 18 984, Bit9 (968~987) 20 977,
1928 01:57:49.736161 TX Bit2 (977~994) 18 985, Bit10 (974~991) 18 982,
1929 01:57:49.739644 TX Bit3 (970~989) 20 979, Bit11 (967~985) 19 976,
1930 01:57:49.743000 TX Bit4 (974~993) 20 983, Bit12 (969~988) 20 978,
1931 01:57:49.749212 TX Bit5 (971~991) 21 981, Bit13 (970~985) 16 977,
1932 01:57:49.752595 TX Bit6 (972~992) 21 982, Bit14 (969~989) 21 979,
1933 01:57:49.756416 TX Bit7 (974~993) 20 983, Bit15 (973~991) 19 982,
1934 01:57:49.756513
1935 01:57:49.759691 Write Rank1 MR14 =0x10
1936 01:57:49.768537
1937 01:57:49.768670 CH=0, VrefRange= 0, VrefLevel = 16
1938 01:57:49.775149 TX Bit0 (976~996) 21 986, Bit8 (966~985) 20 975,
1939 01:57:49.778623 TX Bit1 (975~993) 19 984, Bit9 (968~987) 20 977,
1940 01:57:49.784835 TX Bit2 (977~994) 18 985, Bit10 (974~992) 19 983,
1941 01:57:49.788181 TX Bit3 (969~990) 22 979, Bit11 (967~985) 19 976,
1942 01:57:49.791660 TX Bit4 (974~993) 20 983, Bit12 (968~988) 21 978,
1943 01:57:49.798390 TX Bit5 (971~991) 21 981, Bit13 (969~986) 18 977,
1944 01:57:49.801634 TX Bit6 (972~992) 21 982, Bit14 (969~989) 21 979,
1945 01:57:49.804900 TX Bit7 (973~994) 22 983, Bit15 (972~992) 21 982,
1946 01:57:49.804988
1947 01:57:49.808528 Write Rank1 MR14 =0x12
1948 01:57:49.817355
1949 01:57:49.820492 CH=0, VrefRange= 0, VrefLevel = 18
1950 01:57:49.823752 TX Bit0 (976~996) 21 986, Bit8 (966~985) 20 975,
1951 01:57:49.827016 TX Bit1 (975~994) 20 984, Bit9 (968~989) 22 978,
1952 01:57:49.833675 TX Bit2 (976~995) 20 985, Bit10 (973~992) 20 982,
1953 01:57:49.837058 TX Bit3 (969~990) 22 979, Bit11 (967~986) 20 976,
1954 01:57:49.840475 TX Bit4 (974~994) 21 984, Bit12 (968~989) 22 978,
1955 01:57:49.847172 TX Bit5 (971~991) 21 981, Bit13 (969~988) 20 978,
1956 01:57:49.850502 TX Bit6 (972~993) 22 982, Bit14 (969~990) 22 979,
1957 01:57:49.853901 TX Bit7 (973~994) 22 983, Bit15 (972~992) 21 982,
1958 01:57:49.853988
1959 01:57:49.857454 Write Rank1 MR14 =0x14
1960 01:57:49.866268
1961 01:57:49.869905 CH=0, VrefRange= 0, VrefLevel = 20
1962 01:57:49.873102 TX Bit0 (976~997) 22 986, Bit8 (966~986) 21 976,
1963 01:57:49.876698 TX Bit1 (975~994) 20 984, Bit9 (968~990) 23 979,
1964 01:57:49.883268 TX Bit2 (976~996) 21 986, Bit10 (972~993) 22 982,
1965 01:57:49.886224 TX Bit3 (969~990) 22 979, Bit11 (967~987) 21 977,
1966 01:57:49.889503 TX Bit4 (974~994) 21 984, Bit12 (968~990) 23 979,
1967 01:57:49.896431 TX Bit5 (970~992) 23 981, Bit13 (969~988) 20 978,
1968 01:57:49.899703 TX Bit6 (972~993) 22 982, Bit14 (968~990) 23 979,
1969 01:57:49.903094 TX Bit7 (973~995) 23 984, Bit15 (971~992) 22 981,
1970 01:57:49.903187
1971 01:57:49.906447 Write Rank1 MR14 =0x16
1972 01:57:49.915567
1973 01:57:49.918908 CH=0, VrefRange= 0, VrefLevel = 22
1974 01:57:49.922167 TX Bit0 (976~997) 22 986, Bit8 (966~986) 21 976,
1975 01:57:49.925437 TX Bit1 (974~995) 22 984, Bit9 (967~990) 24 978,
1976 01:57:49.932210 TX Bit2 (976~996) 21 986, Bit10 (972~993) 22 982,
1977 01:57:49.935577 TX Bit3 (969~991) 23 980, Bit11 (967~987) 21 977,
1978 01:57:49.938883 TX Bit4 (973~996) 24 984, Bit12 (968~990) 23 979,
1979 01:57:49.945491 TX Bit5 (970~992) 23 981, Bit13 (969~989) 21 979,
1980 01:57:49.948611 TX Bit6 (971~994) 24 982, Bit14 (968~990) 23 979,
1981 01:57:49.951872 TX Bit7 (973~996) 24 984, Bit15 (971~993) 23 982,
1982 01:57:49.951960
1983 01:57:49.955250 Write Rank1 MR14 =0x18
1984 01:57:49.964686
1985 01:57:49.968187 CH=0, VrefRange= 0, VrefLevel = 24
1986 01:57:49.971484 TX Bit0 (975~998) 24 986, Bit8 (966~987) 22 976,
1987 01:57:49.974667 TX Bit1 (974~996) 23 985, Bit9 (967~990) 24 978,
1988 01:57:49.981614 TX Bit2 (976~997) 22 986, Bit10 (973~993) 21 983,
1989 01:57:49.984656 TX Bit3 (969~991) 23 980, Bit11 (966~988) 23 977,
1990 01:57:49.988113 TX Bit4 (973~996) 24 984, Bit12 (968~990) 23 979,
1991 01:57:49.994740 TX Bit5 (970~992) 23 981, Bit13 (968~989) 22 978,
1992 01:57:49.998024 TX Bit6 (971~994) 24 982, Bit14 (968~990) 23 979,
1993 01:57:50.001613 TX Bit7 (972~996) 25 984, Bit15 (970~993) 24 981,
1994 01:57:50.001725
1995 01:57:50.004485 Write Rank1 MR14 =0x1a
1996 01:57:50.013693
1997 01:57:50.017324 CH=0, VrefRange= 0, VrefLevel = 26
1998 01:57:50.020550 TX Bit0 (975~998) 24 986, Bit8 (966~988) 23 977,
1999 01:57:50.023990 TX Bit1 (974~997) 24 985, Bit9 (966~990) 25 978,
2000 01:57:50.030511 TX Bit2 (976~997) 22 986, Bit10 (971~994) 24 982,
2001 01:57:50.033907 TX Bit3 (968~991) 24 979, Bit11 (966~989) 24 977,
2002 01:57:50.037135 TX Bit4 (972~997) 26 984, Bit12 (968~991) 24 979,
2003 01:57:50.043790 TX Bit5 (970~993) 24 981, Bit13 (968~990) 23 979,
2004 01:57:50.047895 TX Bit6 (971~995) 25 983, Bit14 (968~991) 24 979,
2005 01:57:50.050648 TX Bit7 (972~997) 26 984, Bit15 (970~993) 24 981,
2006 01:57:50.050735
2007 01:57:50.053950 Write Rank1 MR14 =0x1c
2008 01:57:50.063378
2009 01:57:50.063470 CH=0, VrefRange= 0, VrefLevel = 28
2010 01:57:50.070114 TX Bit0 (975~998) 24 986, Bit8 (965~989) 25 977,
2011 01:57:50.073643 TX Bit1 (973~997) 25 985, Bit9 (967~990) 24 978,
2012 01:57:50.080143 TX Bit2 (975~998) 24 986, Bit10 (971~995) 25 983,
2013 01:57:50.083364 TX Bit3 (968~991) 24 979, Bit11 (966~989) 24 977,
2014 01:57:50.086727 TX Bit4 (972~997) 26 984, Bit12 (967~991) 25 979,
2015 01:57:50.093190 TX Bit5 (970~993) 24 981, Bit13 (968~990) 23 979,
2016 01:57:50.096629 TX Bit6 (970~995) 26 982, Bit14 (968~991) 24 979,
2017 01:57:50.100008 TX Bit7 (971~997) 27 984, Bit15 (971~994) 24 982,
2018 01:57:50.100127
2019 01:57:50.102987 Write Rank1 MR14 =0x1e
2020 01:57:50.112374
2021 01:57:50.115636 CH=0, VrefRange= 0, VrefLevel = 30
2022 01:57:50.119653 TX Bit0 (974~999) 26 986, Bit8 (965~989) 25 977,
2023 01:57:50.122821 TX Bit1 (973~997) 25 985, Bit9 (967~990) 24 978,
2024 01:57:50.129455 TX Bit2 (975~998) 24 986, Bit10 (972~995) 24 983,
2025 01:57:50.133107 TX Bit3 (968~992) 25 980, Bit11 (966~989) 24 977,
2026 01:57:50.136260 TX Bit4 (971~997) 27 984, Bit12 (967~991) 25 979,
2027 01:57:50.142981 TX Bit5 (969~994) 26 981, Bit13 (968~990) 23 979,
2028 01:57:50.146298 TX Bit6 (970~996) 27 983, Bit14 (968~991) 24 979,
2029 01:57:50.149652 TX Bit7 (971~997) 27 984, Bit15 (969~994) 26 981,
2030 01:57:50.149772
2031 01:57:50.152871 Write Rank1 MR14 =0x20
2032 01:57:50.161860
2033 01:57:50.165449 CH=0, VrefRange= 0, VrefLevel = 32
2034 01:57:50.168858 TX Bit0 (974~999) 26 986, Bit8 (965~989) 25 977,
2035 01:57:50.172085 TX Bit1 (973~997) 25 985, Bit9 (967~990) 24 978,
2036 01:57:50.178943 TX Bit2 (975~998) 24 986, Bit10 (972~995) 24 983,
2037 01:57:50.181989 TX Bit3 (968~992) 25 980, Bit11 (966~989) 24 977,
2038 01:57:50.185607 TX Bit4 (971~997) 27 984, Bit12 (967~991) 25 979,
2039 01:57:50.192148 TX Bit5 (969~994) 26 981, Bit13 (968~990) 23 979,
2040 01:57:50.195579 TX Bit6 (970~996) 27 983, Bit14 (968~991) 24 979,
2041 01:57:50.198939 TX Bit7 (971~997) 27 984, Bit15 (969~994) 26 981,
2042 01:57:50.199025
2043 01:57:50.202126 Write Rank1 MR14 =0x22
2044 01:57:50.211595
2045 01:57:50.214722 CH=0, VrefRange= 0, VrefLevel = 34
2046 01:57:50.218073 TX Bit0 (974~999) 26 986, Bit8 (965~989) 25 977,
2047 01:57:50.221336 TX Bit1 (973~997) 25 985, Bit9 (967~990) 24 978,
2048 01:57:50.228130 TX Bit2 (975~998) 24 986, Bit10 (972~995) 24 983,
2049 01:57:50.231376 TX Bit3 (968~992) 25 980, Bit11 (966~989) 24 977,
2050 01:57:50.234681 TX Bit4 (971~997) 27 984, Bit12 (967~991) 25 979,
2051 01:57:50.241394 TX Bit5 (969~994) 26 981, Bit13 (968~990) 23 979,
2052 01:57:50.244903 TX Bit6 (970~996) 27 983, Bit14 (968~991) 24 979,
2053 01:57:50.248556 TX Bit7 (971~997) 27 984, Bit15 (969~994) 26 981,
2054 01:57:50.248643
2055 01:57:50.251533 Write Rank1 MR14 =0x24
2056 01:57:50.260906
2057 01:57:50.264121 CH=0, VrefRange= 0, VrefLevel = 36
2058 01:57:50.267341 TX Bit0 (974~999) 26 986, Bit8 (965~989) 25 977,
2059 01:57:50.270681 TX Bit1 (973~997) 25 985, Bit9 (967~990) 24 978,
2060 01:57:50.277577 TX Bit2 (975~998) 24 986, Bit10 (972~995) 24 983,
2061 01:57:50.280838 TX Bit3 (968~992) 25 980, Bit11 (966~989) 24 977,
2062 01:57:50.283988 TX Bit4 (971~997) 27 984, Bit12 (967~991) 25 979,
2063 01:57:50.290716 TX Bit5 (969~994) 26 981, Bit13 (968~990) 23 979,
2064 01:57:50.294338 TX Bit6 (970~996) 27 983, Bit14 (968~991) 24 979,
2065 01:57:50.297431 TX Bit7 (971~997) 27 984, Bit15 (969~994) 26 981,
2066 01:57:50.297518
2067 01:57:50.300857 Write Rank1 MR14 =0x26
2068 01:57:50.310071
2069 01:57:50.310170 CH=0, VrefRange= 0, VrefLevel = 38
2070 01:57:50.316630 TX Bit0 (974~999) 26 986, Bit8 (965~989) 25 977,
2071 01:57:50.319865 TX Bit1 (973~997) 25 985, Bit9 (967~990) 24 978,
2072 01:57:50.326594 TX Bit2 (975~998) 24 986, Bit10 (972~995) 24 983,
2073 01:57:50.330307 TX Bit3 (968~992) 25 980, Bit11 (966~989) 24 977,
2074 01:57:50.333557 TX Bit4 (971~997) 27 984, Bit12 (967~991) 25 979,
2075 01:57:50.340165 TX Bit5 (969~994) 26 981, Bit13 (968~990) 23 979,
2076 01:57:50.343146 TX Bit6 (970~996) 27 983, Bit14 (968~991) 24 979,
2077 01:57:50.346571 TX Bit7 (971~997) 27 984, Bit15 (969~994) 26 981,
2078 01:57:50.346659
2079 01:57:50.346727
2080 01:57:50.350443 TX Vref found, early break! 375< 381
2081 01:57:50.356940 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2082 01:57:50.360213 u1DelayCellOfst[0]=7 cells (6 PI)
2083 01:57:50.363396 u1DelayCellOfst[1]=6 cells (5 PI)
2084 01:57:50.367214 u1DelayCellOfst[2]=7 cells (6 PI)
2085 01:57:50.367301 u1DelayCellOfst[3]=0 cells (0 PI)
2086 01:57:50.370515 u1DelayCellOfst[4]=5 cells (4 PI)
2087 01:57:50.373712 u1DelayCellOfst[5]=1 cells (1 PI)
2088 01:57:50.376936 u1DelayCellOfst[6]=3 cells (3 PI)
2089 01:57:50.380323 u1DelayCellOfst[7]=5 cells (4 PI)
2090 01:57:50.383711 Byte0, DQ PI dly=980, DQM PI dly= 983
2091 01:57:50.386884 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2092 01:57:50.386974
2093 01:57:50.393958 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2094 01:57:50.394045
2095 01:57:50.397149 u1DelayCellOfst[8]=0 cells (0 PI)
2096 01:57:50.400566 u1DelayCellOfst[9]=1 cells (1 PI)
2097 01:57:50.400652 u1DelayCellOfst[10]=7 cells (6 PI)
2098 01:57:50.403851 u1DelayCellOfst[11]=0 cells (0 PI)
2099 01:57:50.407014 u1DelayCellOfst[12]=2 cells (2 PI)
2100 01:57:50.410292 u1DelayCellOfst[13]=2 cells (2 PI)
2101 01:57:50.413954 u1DelayCellOfst[14]=2 cells (2 PI)
2102 01:57:50.417144 u1DelayCellOfst[15]=5 cells (4 PI)
2103 01:57:50.420813 Byte1, DQ PI dly=977, DQM PI dly= 980
2104 01:57:50.424060 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
2105 01:57:50.424151
2106 01:57:50.430670 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
2107 01:57:50.430764
2108 01:57:50.430832 Write Rank1 MR14 =0x1e
2109 01:57:50.430897
2110 01:57:50.434135 Final TX Range 0 Vref 30
2111 01:57:50.434224
2112 01:57:50.440473 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2113 01:57:50.440565
2114 01:57:50.447436 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2115 01:57:50.454196 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2116 01:57:50.460718 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2117 01:57:50.463879 Write Rank1 MR3 =0xb0
2118 01:57:50.464000 DramC Write-DBI on
2119 01:57:50.464069 ==
2120 01:57:50.471063 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2121 01:57:50.474006 fsp= 1, odt_onoff= 1, Byte mode= 0
2122 01:57:50.474170 ==
2123 01:57:50.477328 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2124 01:57:50.477445
2125 01:57:50.480519 Begin, DQ Scan Range 700~764
2126 01:57:50.480622
2127 01:57:50.480715
2128 01:57:50.484306 TX Vref Scan disable
2129 01:57:50.487794 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2130 01:57:50.490441 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2131 01:57:50.494225 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2132 01:57:50.497118 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2133 01:57:50.500441 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2134 01:57:50.504265 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2135 01:57:50.507573 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2136 01:57:50.510850 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2137 01:57:50.513942 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2138 01:57:50.517105 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2139 01:57:50.520754 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2140 01:57:50.524027 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2141 01:57:50.527130 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2142 01:57:50.530461 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2143 01:57:50.533675 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2144 01:57:50.543734 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2145 01:57:50.547137 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2146 01:57:50.550188 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2147 01:57:50.553878 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2148 01:57:50.557246 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2149 01:57:50.560127 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2150 01:57:50.563431 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2151 01:57:50.567309 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2152 01:57:50.570014 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2153 01:57:50.573578 Byte0, DQ PI dly=728, DQM PI dly= 728
2154 01:57:50.577158 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2155 01:57:50.577248
2156 01:57:50.583965 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2157 01:57:50.584069
2158 01:57:50.587164 Byte1, DQ PI dly=722, DQM PI dly= 722
2159 01:57:50.590426 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2160 01:57:50.590514
2161 01:57:50.593803 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2162 01:57:50.593885
2163 01:57:50.600099 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2164 01:57:50.610254 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2165 01:57:50.616648 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2166 01:57:50.616771 Write Rank1 MR3 =0x30
2167 01:57:50.619878 DramC Write-DBI off
2168 01:57:50.619965
2169 01:57:50.620031 [DATLAT]
2170 01:57:50.623457 Freq=1600, CH0 RK1, use_rxtx_scan=0
2171 01:57:50.623545
2172 01:57:50.626616 DATLAT Default: 0x10
2173 01:57:50.626702 7, 0xFFFF, sum=0
2174 01:57:50.630051 8, 0xFFFF, sum=0
2175 01:57:50.630139 9, 0xFFFF, sum=0
2176 01:57:50.633123 10, 0xFFFF, sum=0
2177 01:57:50.633241 11, 0xFFFF, sum=0
2178 01:57:50.636373 12, 0xFFFF, sum=0
2179 01:57:50.636499 13, 0xFFFF, sum=0
2180 01:57:50.636601 14, 0x0, sum=1
2181 01:57:50.639828 15, 0x0, sum=2
2182 01:57:50.639915 16, 0x0, sum=3
2183 01:57:50.643160 17, 0x0, sum=4
2184 01:57:50.646525 pattern=2 first_step=14 total pass=5 best_step=16
2185 01:57:50.646644 ==
2186 01:57:50.653324 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2187 01:57:50.656611 fsp= 1, odt_onoff= 1, Byte mode= 0
2188 01:57:50.656728 ==
2189 01:57:50.659881 Start DQ dly to find pass range UseTestEngine =1
2190 01:57:50.663208 x-axis: bit #, y-axis: DQ dly (-127~63)
2191 01:57:50.663295 RX Vref Scan = 0
2192 01:57:50.667072 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2193 01:57:50.669972 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2194 01:57:50.673164 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2195 01:57:50.676937 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2196 01:57:50.680105 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2197 01:57:50.683291 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2198 01:57:50.686676 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2199 01:57:50.686764 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2200 01:57:50.690104 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2201 01:57:50.693198 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2202 01:57:50.696626 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2203 01:57:50.700012 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2204 01:57:50.703325 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2205 01:57:50.707026 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2206 01:57:50.710297 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2207 01:57:50.710403 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2208 01:57:50.713665 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2209 01:57:50.717058 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2210 01:57:50.720798 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2211 01:57:50.724414 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2212 01:57:50.727067 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2213 01:57:50.727153 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2214 01:57:50.730457 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2215 01:57:50.733809 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2216 01:57:50.737047 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2217 01:57:50.740661 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2218 01:57:50.743835 0, [0] xxxoxxxx oxxoxxxx [MSB]
2219 01:57:50.747259 1, [0] xxxoxoxx ooxooxxx [MSB]
2220 01:57:50.747347 2, [0] xxxoxoxx ooxoooxx [MSB]
2221 01:57:50.750569 3, [0] xxxoxooo ooxoooox [MSB]
2222 01:57:50.753886 4, [0] xxxoxooo ooxoooox [MSB]
2223 01:57:50.757278 5, [0] xoxooooo ooxoooox [MSB]
2224 01:57:50.760512 6, [0] oooooooo ooxooooo [MSB]
2225 01:57:50.764033 33, [0] oooooooo xooooooo [MSB]
2226 01:57:50.767279 34, [0] oooxoooo xooooooo [MSB]
2227 01:57:50.770642 35, [0] oooxoxoo xooxoooo [MSB]
2228 01:57:50.773931 36, [0] oooxoxoo xooxoxoo [MSB]
2229 01:57:50.777066 37, [0] oooxoxoo xxoxoxoo [MSB]
2230 01:57:50.777168 38, [0] oooxoxxo xxoxxxxo [MSB]
2231 01:57:50.780413 39, [0] oxxxoxxx xxoxxxxo [MSB]
2232 01:57:50.783704 40, [0] oxxxxxxx xxoxxxxx [MSB]
2233 01:57:50.787547 41, [0] xxxxxxxx xxoxxxxx [MSB]
2234 01:57:50.790613 42, [0] xxxxxxxx xxoxxxxx [MSB]
2235 01:57:50.794117 43, [0] xxxxxxxx xxoxxxxx [MSB]
2236 01:57:50.797367 44, [0] xxxxxxxx xxxxxxxx [MSB]
2237 01:57:50.800556 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
2238 01:57:50.804363 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2239 01:57:50.807370 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2240 01:57:50.810670 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2241 01:57:50.813881 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
2242 01:57:50.817170 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2243 01:57:50.820513 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2244 01:57:50.823949 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2245 01:57:50.827422 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
2246 01:57:50.831110 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2247 01:57:50.834721 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2248 01:57:50.837675 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2249 01:57:50.841128 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2250 01:57:50.844409 iDelay=44, Bit 13, Center 18 (2 ~ 35) 34
2251 01:57:50.850784 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
2252 01:57:50.854163 iDelay=44, Bit 15, Center 22 (6 ~ 39) 34
2253 01:57:50.854250 ==
2254 01:57:50.857611 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2255 01:57:50.861061 fsp= 1, odt_onoff= 1, Byte mode= 0
2256 01:57:50.861148 ==
2257 01:57:50.864194 DQS Delay:
2258 01:57:50.864280 DQS0 = 0, DQS1 = 0
2259 01:57:50.864347 DQM Delay:
2260 01:57:50.867607 DQM0 = 20, DQM1 = 19
2261 01:57:50.867693 DQ Delay:
2262 01:57:50.870695 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15
2263 01:57:50.874136 DQ4 =22, DQ5 =17, DQ6 =20, DQ7 =20
2264 01:57:50.877131 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
2265 01:57:50.880574 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
2266 01:57:50.880655
2267 01:57:50.880721
2268 01:57:50.880788
2269 01:57:50.884081 [DramC_TX_OE_Calibration] TA2
2270 01:57:50.887366 Original DQ_B0 (3 6) =30, OEN = 27
2271 01:57:50.890677 Original DQ_B1 (3 6) =30, OEN = 27
2272 01:57:50.894364 23, 0x0, End_B0=23 End_B1=23
2273 01:57:50.897567 24, 0x0, End_B0=24 End_B1=24
2274 01:57:50.897655 25, 0x0, End_B0=25 End_B1=25
2275 01:57:50.901104 26, 0x0, End_B0=26 End_B1=26
2276 01:57:50.904282 27, 0x0, End_B0=27 End_B1=27
2277 01:57:50.907505 28, 0x0, End_B0=28 End_B1=28
2278 01:57:50.907593 29, 0x0, End_B0=29 End_B1=29
2279 01:57:50.910540 30, 0x0, End_B0=30 End_B1=30
2280 01:57:50.914349 31, 0xFFFF, End_B0=30 End_B1=30
2281 01:57:50.920577 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2282 01:57:50.923817 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2283 01:57:50.923901
2284 01:57:50.923966
2285 01:57:50.927462 Write Rank1 MR23 =0x3f
2286 01:57:50.927549 [DQSOSC]
2287 01:57:50.937265 [DQSOSCAuto] RK1, (LSB)MR18= 0xd8d8, (MSB)MR19= 0x202, tDQSOscB0 = 432 ps tDQSOscB1 = 432 ps
2288 01:57:50.943955 CH0_RK1: MR19=0x202, MR18=0xD8D8, DQSOSC=432, MR23=63, INC=13, DEC=19
2289 01:57:50.944045 Write Rank1 MR23 =0x3f
2290 01:57:50.944112 [DQSOSC]
2291 01:57:50.954006 [DQSOSCAuto] RK1, (LSB)MR18= 0xd9d9, (MSB)MR19= 0x202, tDQSOscB0 = 432 ps tDQSOscB1 = 432 ps
2292 01:57:50.957354 CH0 RK1: MR19=202, MR18=D9D9
2293 01:57:50.960768 [RxdqsGatingPostProcess] freq 1600
2294 01:57:50.964081 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2295 01:57:50.967491 Rank: 0
2296 01:57:50.967575 best DQS0 dly(2T, 0.5T) = (2, 5)
2297 01:57:50.970810 best DQS1 dly(2T, 0.5T) = (2, 5)
2298 01:57:50.974250 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2299 01:57:50.977701 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2300 01:57:50.977799 Rank: 1
2301 01:57:50.980946 best DQS0 dly(2T, 0.5T) = (2, 6)
2302 01:57:50.984374 best DQS1 dly(2T, 0.5T) = (2, 6)
2303 01:57:50.987471 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2304 01:57:50.990711 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2305 01:57:50.997542 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2306 01:57:50.997633 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2307 01:57:51.004126 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2308 01:57:51.007407 Write Rank0 MR13 =0x59
2309 01:57:51.007494 ==
2310 01:57:51.010844 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2311 01:57:51.014171 fsp= 1, odt_onoff= 1, Byte mode= 0
2312 01:57:51.014264 ==
2313 01:57:51.017598 === u2Vref_new: 0x56 --> 0x3a
2314 01:57:51.020782 === u2Vref_new: 0x58 --> 0x58
2315 01:57:51.024160 === u2Vref_new: 0x5a --> 0x5a
2316 01:57:51.027965 === u2Vref_new: 0x5c --> 0x78
2317 01:57:51.031090 === u2Vref_new: 0x5e --> 0x7a
2318 01:57:51.034438 === u2Vref_new: 0x60 --> 0x90
2319 01:57:51.037648 [CA 0] Center 38 (13~63) winsize 51
2320 01:57:51.041135 [CA 1] Center 37 (11~63) winsize 53
2321 01:57:51.044442 [CA 2] Center 34 (6~63) winsize 58
2322 01:57:51.044528 [CA 3] Center 35 (7~63) winsize 57
2323 01:57:51.047478 [CA 4] Center 34 (6~63) winsize 58
2324 01:57:51.051178 [CA 5] Center 28 (-1~58) winsize 60
2325 01:57:51.051264
2326 01:57:51.054450 [CATrainingPosCal] consider 1 rank data
2327 01:57:51.057633 u2DelayCellTimex100 = 735/100 ps
2328 01:57:51.060929 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2329 01:57:51.067596 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2330 01:57:51.071023 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2331 01:57:51.074308 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2332 01:57:51.077802 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2333 01:57:51.081152 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2334 01:57:51.081240
2335 01:57:51.084504 CA PerBit enable=1, Macro0, CA PI delay=28
2336 01:57:51.087727 === u2Vref_new: 0x5c --> 0x78
2337 01:57:51.087816
2338 01:57:51.091241 Vref(ca) range 1: 28
2339 01:57:51.091362
2340 01:57:51.091456 CS Dly= 11 (42-0-32)
2341 01:57:51.094678 Write Rank0 MR13 =0xd8
2342 01:57:51.094773 Write Rank0 MR13 =0xd8
2343 01:57:51.097879 Write Rank0 MR12 =0x5c
2344 01:57:51.101121 Write Rank1 MR13 =0x59
2345 01:57:51.101208 ==
2346 01:57:51.104678 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2347 01:57:51.107971 fsp= 1, odt_onoff= 1, Byte mode= 0
2348 01:57:51.108059 ==
2349 01:57:51.111604 === u2Vref_new: 0x56 --> 0x3a
2350 01:57:51.115037 === u2Vref_new: 0x58 --> 0x58
2351 01:57:51.118378 === u2Vref_new: 0x5a --> 0x5a
2352 01:57:51.121677 === u2Vref_new: 0x5c --> 0x78
2353 01:57:51.125061 === u2Vref_new: 0x5e --> 0x7a
2354 01:57:51.128377 === u2Vref_new: 0x60 --> 0x90
2355 01:57:51.131144 [CA 0] Center 37 (12~63) winsize 52
2356 01:57:51.134979 [CA 1] Center 37 (12~63) winsize 52
2357 01:57:51.138080 [CA 2] Center 35 (7~63) winsize 57
2358 01:57:51.141441 [CA 3] Center 34 (6~63) winsize 58
2359 01:57:51.141527 [CA 4] Center 34 (6~63) winsize 58
2360 01:57:51.144867 [CA 5] Center 27 (-2~57) winsize 60
2361 01:57:51.144981
2362 01:57:51.151316 [CATrainingPosCal] consider 2 rank data
2363 01:57:51.151405 u2DelayCellTimex100 = 735/100 ps
2364 01:57:51.158091 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2365 01:57:51.161587 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2366 01:57:51.164759 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2367 01:57:51.168084 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2368 01:57:51.171300 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2369 01:57:51.174830 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2370 01:57:51.174918
2371 01:57:51.178137 CA PerBit enable=1, Macro0, CA PI delay=28
2372 01:57:51.181474 === u2Vref_new: 0x5e --> 0x7a
2373 01:57:51.181561
2374 01:57:51.184743 Vref(ca) range 1: 30
2375 01:57:51.184831
2376 01:57:51.184899 CS Dly= 11 (42-0-32)
2377 01:57:51.188212 Write Rank1 MR13 =0xd8
2378 01:57:51.191471 Write Rank1 MR13 =0xd8
2379 01:57:51.191558 Write Rank1 MR12 =0x5e
2380 01:57:51.194846 [RankSwap] Rank num 2, (Multi 1), Rank 0
2381 01:57:51.198319 Write Rank0 MR2 =0xad
2382 01:57:51.198406 [Write Leveling]
2383 01:57:51.201759 delay byte0 byte1 byte2 byte3
2384 01:57:51.201850
2385 01:57:51.204716 10 0 0
2386 01:57:51.204804 11 0 0
2387 01:57:51.207913 12 0 0
2388 01:57:51.208002 13 0 0
2389 01:57:51.208071 14 0 0
2390 01:57:51.211527 15 0 0
2391 01:57:51.211615 16 0 0
2392 01:57:51.214534 17 0 0
2393 01:57:51.214622 18 0 0
2394 01:57:51.214691 19 0 0
2395 01:57:51.218169 20 0 0
2396 01:57:51.218267 21 0 0
2397 01:57:51.221417 22 0 0
2398 01:57:51.221532 23 0 0
2399 01:57:51.224683 24 0 ff
2400 01:57:51.224772 25 0 ff
2401 01:57:51.224850 26 0 ff
2402 01:57:51.228052 27 0 ff
2403 01:57:51.228140 28 0 ff
2404 01:57:51.231511 29 0 ff
2405 01:57:51.231599 30 0 ff
2406 01:57:51.234996 31 0 ff
2407 01:57:51.235082 32 0 ff
2408 01:57:51.238253 33 ff ff
2409 01:57:51.238339 34 ff ff
2410 01:57:51.238407 35 ff ff
2411 01:57:51.241586 36 ff ff
2412 01:57:51.241673 37 ff ff
2413 01:57:51.244757 38 ff ff
2414 01:57:51.244844 39 ff ff
2415 01:57:51.251819 pass bytecount = 0xff (0xff: all bytes pass)
2416 01:57:51.251919
2417 01:57:51.251987 DQS0 dly: 33
2418 01:57:51.252049 DQS1 dly: 24
2419 01:57:51.254592 Write Rank0 MR2 =0x2d
2420 01:57:51.257904 [RankSwap] Rank num 2, (Multi 1), Rank 0
2421 01:57:51.261569 Write Rank0 MR1 =0xd6
2422 01:57:51.261655 [Gating]
2423 01:57:51.261722 ==
2424 01:57:51.264519 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2425 01:57:51.267846 fsp= 1, odt_onoff= 1, Byte mode= 0
2426 01:57:51.267932 ==
2427 01:57:51.274702 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2428 01:57:51.277886 3 1 4 |3535 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2429 01:57:51.281119 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2430 01:57:51.288027 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2431 01:57:51.291316 3 1 16 |3535 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2432 01:57:51.294813 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2433 01:57:51.301363 3 1 24 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2434 01:57:51.304500 3 1 28 |201f 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2435 01:57:51.307944 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2436 01:57:51.311492 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2437 01:57:51.318383 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2438 01:57:51.321660 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2439 01:57:51.324727 3 2 16 |504 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2440 01:57:51.331802 3 2 20 |2a2a 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2441 01:57:51.335122 3 2 24 |3d3d 2c2c |(11 11)(11 0) |(1 1)(0 0)| 0
2442 01:57:51.337959 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2443 01:57:51.345229 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2444 01:57:51.348508 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2445 01:57:51.351719 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2446 01:57:51.354667 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2447 01:57:51.361579 3 3 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2448 01:57:51.364666 3 3 20 |504 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2449 01:57:51.368454 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2450 01:57:51.375064 [Byte 0] Lead/lag falling Transition (3, 3, 24)
2451 01:57:51.378380 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2452 01:57:51.381456 [Byte 1] Lead/lag Transition tap number (1)
2453 01:57:51.384915 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2454 01:57:51.391292 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2455 01:57:51.394644 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2456 01:57:51.398077 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2457 01:57:51.404722 3 4 16 |504 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2458 01:57:51.408122 3 4 20 |1515 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2459 01:57:51.411630 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2460 01:57:51.418150 3 4 28 |3d3d c0b |(11 11)(11 11) |(1 1)(1 1)| 0
2461 01:57:51.421612 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2462 01:57:51.424834 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2463 01:57:51.431170 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2464 01:57:51.434864 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2465 01:57:51.437996 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2466 01:57:51.441225 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2467 01:57:51.448417 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2468 01:57:51.451401 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2469 01:57:51.455225 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2470 01:57:51.461604 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2471 01:57:51.464942 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2472 01:57:51.468170 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2473 01:57:51.474730 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2474 01:57:51.478066 [Byte 0] Lead/lag Transition tap number (2)
2475 01:57:51.481592 [Byte 1] Lead/lag falling Transition (3, 6, 12)
2476 01:57:51.484780 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2477 01:57:51.491779 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2478 01:57:51.494742 [Byte 1] Lead/lag Transition tap number (3)
2479 01:57:51.498036 3 6 24 |4646 2525 |(0 0)(11 11) |(0 0)(0 0)| 0
2480 01:57:51.501071 [Byte 0]First pass (3, 6, 24)
2481 01:57:51.504385 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2482 01:57:51.507886 [Byte 1]First pass (3, 6, 28)
2483 01:57:51.511034 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2484 01:57:51.514270 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2485 01:57:51.517518 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2486 01:57:51.524349 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2487 01:57:51.527435 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2488 01:57:51.530865 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2489 01:57:51.534287 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2490 01:57:51.540858 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2491 01:57:51.543991 All bytes gating window > 1UI, Early break!
2492 01:57:51.544071
2493 01:57:51.547383 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
2494 01:57:51.547460
2495 01:57:51.550467 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
2496 01:57:51.550569
2497 01:57:51.550661
2498 01:57:51.550749
2499 01:57:51.554034 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
2500 01:57:51.554110
2501 01:57:51.560443 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
2502 01:57:51.560547
2503 01:57:51.560639
2504 01:57:51.560732 Write Rank0 MR1 =0x56
2505 01:57:51.560821
2506 01:57:51.564225 best RODT dly(2T, 0.5T) = (2, 3)
2507 01:57:51.564323
2508 01:57:51.567028 best RODT dly(2T, 0.5T) = (2, 3)
2509 01:57:51.567101 ==
2510 01:57:51.573651 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2511 01:57:51.577477 fsp= 1, odt_onoff= 1, Byte mode= 0
2512 01:57:51.577588 ==
2513 01:57:51.580761 Start DQ dly to find pass range UseTestEngine =0
2514 01:57:51.584165 x-axis: bit #, y-axis: DQ dly (-127~63)
2515 01:57:51.587581 RX Vref Scan = 0
2516 01:57:51.590396 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2517 01:57:51.590504 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2518 01:57:51.593904 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2519 01:57:51.596978 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2520 01:57:51.600546 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2521 01:57:51.603601 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2522 01:57:51.607234 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2523 01:57:51.610371 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2524 01:57:51.613999 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2525 01:57:51.614081 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2526 01:57:51.617000 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2527 01:57:51.620437 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2528 01:57:51.623923 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2529 01:57:51.627348 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2530 01:57:51.630143 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2531 01:57:51.634033 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2532 01:57:51.636981 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2533 01:57:51.640055 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2534 01:57:51.640147 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2535 01:57:51.643419 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2536 01:57:51.646890 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2537 01:57:51.650215 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2538 01:57:51.653541 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2539 01:57:51.656914 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2540 01:57:51.659915 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2541 01:57:51.660028 -1, [0] xxxxxxxx xoxxxxxo [MSB]
2542 01:57:51.663494 0, [0] xxxoxxxx ooxxxxxo [MSB]
2543 01:57:51.666807 1, [0] xxxoxxxx ooxxxxxo [MSB]
2544 01:57:51.670002 2, [0] xxooxxxx ooxxxxxo [MSB]
2545 01:57:51.673343 3, [0] xxooxxxo oooxxxxo [MSB]
2546 01:57:51.676645 4, [0] oxooxxxo oooxoxxo [MSB]
2547 01:57:51.676751 32, [0] oooooooo ooooooox [MSB]
2548 01:57:51.680149 33, [0] oooooooo ooooooox [MSB]
2549 01:57:51.683374 34, [0] oooooooo ooooooox [MSB]
2550 01:57:51.686838 35, [0] oooxoooo xxooooox [MSB]
2551 01:57:51.690278 36, [0] oooxoooo xxooooox [MSB]
2552 01:57:51.693343 37, [0] ooxxoooo xxooooox [MSB]
2553 01:57:51.696642 38, [0] ooxxoooo xxooooox [MSB]
2554 01:57:51.696722 39, [0] ooxxooox xxxoooox [MSB]
2555 01:57:51.700055 40, [0] oxxxooox xxxoooox [MSB]
2556 01:57:51.703173 41, [0] xxxxxoox xxxxxxox [MSB]
2557 01:57:51.706270 42, [0] xxxxxxxx xxxxxxxx [MSB]
2558 01:57:51.709742 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
2559 01:57:51.712854 iDelay=42, Bit 1, Center 22 (5 ~ 39) 35
2560 01:57:51.716685 iDelay=42, Bit 2, Center 19 (2 ~ 36) 35
2561 01:57:51.719928 iDelay=42, Bit 3, Center 17 (0 ~ 34) 35
2562 01:57:51.722954 iDelay=42, Bit 4, Center 22 (5 ~ 40) 36
2563 01:57:51.726542 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
2564 01:57:51.729492 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
2565 01:57:51.736365 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
2566 01:57:51.739513 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
2567 01:57:51.743028 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
2568 01:57:51.746097 iDelay=42, Bit 10, Center 20 (3 ~ 38) 36
2569 01:57:51.749359 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
2570 01:57:51.753277 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
2571 01:57:51.756044 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
2572 01:57:51.759365 iDelay=42, Bit 14, Center 23 (5 ~ 41) 37
2573 01:57:51.762838 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
2574 01:57:51.762946 ==
2575 01:57:51.769406 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2576 01:57:51.772664 fsp= 1, odt_onoff= 1, Byte mode= 0
2577 01:57:51.772774 ==
2578 01:57:51.772877 DQS Delay:
2579 01:57:51.776205 DQS0 = 0, DQS1 = 0
2580 01:57:51.776308 DQM Delay:
2581 01:57:51.779409 DQM0 = 21, DQM1 = 19
2582 01:57:51.779513 DQ Delay:
2583 01:57:51.783011 DQ0 =22, DQ1 =22, DQ2 =19, DQ3 =17
2584 01:57:51.786404 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =20
2585 01:57:51.789621 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
2586 01:57:51.792912 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =14
2587 01:57:51.793005
2588 01:57:51.793108
2589 01:57:51.793208 DramC Write-DBI off
2590 01:57:51.795776 ==
2591 01:57:51.799135 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2592 01:57:51.802538 fsp= 1, odt_onoff= 1, Byte mode= 0
2593 01:57:51.802645 ==
2594 01:57:51.805905 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2595 01:57:51.805990
2596 01:57:51.809635 Begin, DQ Scan Range 920~1176
2597 01:57:51.809743
2598 01:57:51.809825
2599 01:57:51.812754 TX Vref Scan disable
2600 01:57:51.815860 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
2601 01:57:51.819393 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2602 01:57:51.822958 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2603 01:57:51.826109 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2604 01:57:51.829626 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2605 01:57:51.832497 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2606 01:57:51.835979 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2607 01:57:51.839444 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2608 01:57:51.842755 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2609 01:57:51.849139 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2610 01:57:51.853117 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2611 01:57:51.855855 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2612 01:57:51.859574 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2613 01:57:51.863029 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2614 01:57:51.865850 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2615 01:57:51.869292 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2616 01:57:51.872985 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2617 01:57:51.875792 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2618 01:57:51.879624 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2619 01:57:51.882565 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2620 01:57:51.885879 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2621 01:57:51.889088 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2622 01:57:51.893142 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2623 01:57:51.896047 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2624 01:57:51.898922 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2625 01:57:51.905483 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2626 01:57:51.908824 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2627 01:57:51.912123 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2628 01:57:51.915888 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2629 01:57:51.918544 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2630 01:57:51.922271 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2631 01:57:51.925366 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2632 01:57:51.928746 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2633 01:57:51.932071 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2634 01:57:51.935521 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2635 01:57:51.938894 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2636 01:57:51.942227 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2637 01:57:51.945532 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2638 01:57:51.948894 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2639 01:57:51.952217 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2640 01:57:51.958998 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2641 01:57:51.962238 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2642 01:57:51.965752 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2643 01:57:51.968624 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2644 01:57:51.972217 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2645 01:57:51.975769 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2646 01:57:51.978616 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2647 01:57:51.982059 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2648 01:57:51.985362 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2649 01:57:51.988717 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2650 01:57:51.992099 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2651 01:57:51.995580 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
2652 01:57:51.998832 972 |3 6 12|[0] xxxxxxxx oooxoxoo [MSB]
2653 01:57:52.002315 973 |3 6 13|[0] xxxxxxxx oooxxxoo [MSB]
2654 01:57:52.005469 974 |3 6 14|[0] xxxxxxxx oooxoxoo [MSB]
2655 01:57:52.008657 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2656 01:57:52.012559 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2657 01:57:52.015479 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2658 01:57:52.018892 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2659 01:57:52.022354 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2660 01:57:52.025513 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2661 01:57:52.032319 981 |3 6 21|[0] xooooxoo oooooooo [MSB]
2662 01:57:52.035312 982 |3 6 22|[0] oooooxoo oooooooo [MSB]
2663 01:57:52.038551 986 |3 6 26|[0] oooooooo ooooooox [MSB]
2664 01:57:52.041876 987 |3 6 27|[0] oooooooo ooooooox [MSB]
2665 01:57:52.045395 988 |3 6 28|[0] oooooooo oxooooox [MSB]
2666 01:57:52.048331 989 |3 6 29|[0] oooooooo xxooooox [MSB]
2667 01:57:52.052156 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
2668 01:57:52.055578 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2669 01:57:52.058323 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2670 01:57:52.061701 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2671 01:57:52.065140 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2672 01:57:52.068608 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2673 01:57:52.071973 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2674 01:57:52.078286 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2675 01:57:52.081562 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2676 01:57:52.085311 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2677 01:57:52.088305 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2678 01:57:52.091743 1001 |3 6 41|[0] ooxxooxx xxxxxxxx [MSB]
2679 01:57:52.094917 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2680 01:57:52.098537 Byte0, DQ PI dly=990, DQM PI dly= 990
2681 01:57:52.101918 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2682 01:57:52.102004
2683 01:57:52.108636 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2684 01:57:52.108724
2685 01:57:52.111963 Byte1, DQ PI dly=979, DQM PI dly= 979
2686 01:57:52.115443 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2687 01:57:52.115528
2688 01:57:52.118682 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2689 01:57:52.118768
2690 01:57:52.118835 ==
2691 01:57:52.125310 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2692 01:57:52.128269 fsp= 1, odt_onoff= 1, Byte mode= 0
2693 01:57:52.128387 ==
2694 01:57:52.131742 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2695 01:57:52.131827
2696 01:57:52.135284 Begin, DQ Scan Range 955~1019
2697 01:57:52.138209 Write Rank0 MR14 =0x0
2698 01:57:52.146061
2699 01:57:52.146154 CH=1, VrefRange= 0, VrefLevel = 0
2700 01:57:52.152860 TX Bit0 (984~999) 16 991, Bit8 (973~984) 12 978,
2701 01:57:52.156096 TX Bit1 (983~997) 15 990, Bit9 (974~983) 10 978,
2702 01:57:52.162215 TX Bit2 (982~996) 15 989, Bit10 (976~986) 11 981,
2703 01:57:52.165752 TX Bit3 (979~992) 14 985, Bit11 (976~987) 12 981,
2704 01:57:52.169253 TX Bit4 (983~998) 16 990, Bit12 (976~987) 12 981,
2705 01:57:52.175607 TX Bit5 (985~998) 14 991, Bit13 (977~988) 12 982,
2706 01:57:52.178971 TX Bit6 (984~997) 14 990, Bit14 (975~986) 12 980,
2707 01:57:52.182332 TX Bit7 (983~996) 14 989, Bit15 (969~979) 11 974,
2708 01:57:52.185595
2709 01:57:52.185706 Write Rank0 MR14 =0x2
2710 01:57:52.195082
2711 01:57:52.195173 CH=1, VrefRange= 0, VrefLevel = 2
2712 01:57:52.201484 TX Bit0 (984~1000) 17 992, Bit8 (973~984) 12 978,
2713 01:57:52.204986 TX Bit1 (983~996) 14 989, Bit9 (973~983) 11 978,
2714 01:57:52.211761 TX Bit2 (981~997) 17 989, Bit10 (976~987) 12 981,
2715 01:57:52.215265 TX Bit3 (979~993) 15 986, Bit11 (976~988) 13 982,
2716 01:57:52.218322 TX Bit4 (983~998) 16 990, Bit12 (975~988) 14 981,
2717 01:57:52.224747 TX Bit5 (985~999) 15 992, Bit13 (977~988) 12 982,
2718 01:57:52.228568 TX Bit6 (983~997) 15 990, Bit14 (975~987) 13 981,
2719 01:57:52.231534 TX Bit7 (983~997) 15 990, Bit15 (969~980) 12 974,
2720 01:57:52.231621
2721 01:57:52.234831 Write Rank0 MR14 =0x4
2722 01:57:52.243878
2723 01:57:52.243965 CH=1, VrefRange= 0, VrefLevel = 4
2724 01:57:52.250646 TX Bit0 (983~1000) 18 991, Bit8 (971~984) 14 977,
2725 01:57:52.253998 TX Bit1 (982~998) 17 990, Bit9 (973~984) 12 978,
2726 01:57:52.260367 TX Bit2 (981~998) 18 989, Bit10 (975~987) 13 981,
2727 01:57:52.264107 TX Bit3 (979~993) 15 986, Bit11 (976~989) 14 982,
2728 01:57:52.267267 TX Bit4 (982~999) 18 990, Bit12 (975~989) 15 982,
2729 01:57:52.274093 TX Bit5 (984~999) 16 991, Bit13 (976~990) 15 983,
2730 01:57:52.277082 TX Bit6 (983~998) 16 990, Bit14 (975~988) 14 981,
2731 01:57:52.280349 TX Bit7 (983~998) 16 990, Bit15 (969~982) 14 975,
2732 01:57:52.283871
2733 01:57:52.283957 Write Rank0 MR14 =0x6
2734 01:57:52.293155
2735 01:57:52.293272 CH=1, VrefRange= 0, VrefLevel = 6
2736 01:57:52.299989 TX Bit0 (983~1001) 19 992, Bit8 (971~985) 15 978,
2737 01:57:52.303314 TX Bit1 (982~998) 17 990, Bit9 (971~984) 14 977,
2738 01:57:52.310005 TX Bit2 (980~998) 19 989, Bit10 (974~988) 15 981,
2739 01:57:52.313578 TX Bit3 (978~994) 17 986, Bit11 (976~990) 15 983,
2740 01:57:52.316671 TX Bit4 (982~999) 18 990, Bit12 (975~990) 16 982,
2741 01:57:52.323260 TX Bit5 (984~999) 16 991, Bit13 (976~990) 15 983,
2742 01:57:52.326511 TX Bit6 (983~999) 17 991, Bit14 (974~988) 15 981,
2743 01:57:52.329638 TX Bit7 (983~998) 16 990, Bit15 (968~983) 16 975,
2744 01:57:52.333425
2745 01:57:52.333538 Write Rank0 MR14 =0x8
2746 01:57:52.342901
2747 01:57:52.342991 CH=1, VrefRange= 0, VrefLevel = 8
2748 01:57:52.349285 TX Bit0 (983~1001) 19 992, Bit8 (971~986) 16 978,
2749 01:57:52.352700 TX Bit1 (981~999) 19 990, Bit9 (972~985) 14 978,
2750 01:57:52.359310 TX Bit2 (979~998) 20 988, Bit10 (974~989) 16 981,
2751 01:57:52.362739 TX Bit3 (978~995) 18 986, Bit11 (976~990) 15 983,
2752 01:57:52.365659 TX Bit4 (981~1000) 20 990, Bit12 (975~991) 17 983,
2753 01:57:52.372421 TX Bit5 (984~1000) 17 992, Bit13 (976~990) 15 983,
2754 01:57:52.375660 TX Bit6 (982~999) 18 990, Bit14 (974~990) 17 982,
2755 01:57:52.379238 TX Bit7 (982~998) 17 990, Bit15 (969~983) 15 976,
2756 01:57:52.382496
2757 01:57:52.382583 Write Rank0 MR14 =0xa
2758 01:57:52.392218
2759 01:57:52.392308 CH=1, VrefRange= 0, VrefLevel = 10
2760 01:57:52.399225 TX Bit0 (983~1001) 19 992, Bit8 (971~986) 16 978,
2761 01:57:52.402511 TX Bit1 (981~999) 19 990, Bit9 (971~985) 15 978,
2762 01:57:52.409118 TX Bit2 (979~999) 21 989, Bit10 (974~990) 17 982,
2763 01:57:52.411988 TX Bit3 (978~995) 18 986, Bit11 (975~991) 17 983,
2764 01:57:52.415333 TX Bit4 (981~1000) 20 990, Bit12 (974~991) 18 982,
2765 01:57:52.422079 TX Bit5 (983~1001) 19 992, Bit13 (975~991) 17 983,
2766 01:57:52.425303 TX Bit6 (982~1000) 19 991, Bit14 (974~990) 17 982,
2767 01:57:52.431975 TX Bit7 (982~999) 18 990, Bit15 (968~984) 17 976,
2768 01:57:52.432063
2769 01:57:52.432131 Write Rank0 MR14 =0xc
2770 01:57:52.441972
2771 01:57:52.445108 CH=1, VrefRange= 0, VrefLevel = 12
2772 01:57:52.448757 TX Bit0 (983~1002) 20 992, Bit8 (970~987) 18 978,
2773 01:57:52.452225 TX Bit1 (981~1000) 20 990, Bit9 (970~986) 17 978,
2774 01:57:52.458773 TX Bit2 (979~999) 21 989, Bit10 (973~991) 19 982,
2775 01:57:52.461605 TX Bit3 (978~996) 19 987, Bit11 (975~991) 17 983,
2776 01:57:52.465078 TX Bit4 (981~1001) 21 991, Bit12 (974~992) 19 983,
2777 01:57:52.471902 TX Bit5 (983~1001) 19 992, Bit13 (975~991) 17 983,
2778 01:57:52.475248 TX Bit6 (982~1000) 19 991, Bit14 (973~991) 19 982,
2779 01:57:52.481645 TX Bit7 (981~1000) 20 990, Bit15 (968~984) 17 976,
2780 01:57:52.481793
2781 01:57:52.481902 Write Rank0 MR14 =0xe
2782 01:57:52.491548
2783 01:57:52.495120 CH=1, VrefRange= 0, VrefLevel = 14
2784 01:57:52.498501 TX Bit0 (983~1002) 20 992, Bit8 (970~987) 18 978,
2785 01:57:52.501626 TX Bit1 (981~1000) 20 990, Bit9 (970~986) 17 978,
2786 01:57:52.508643 TX Bit2 (979~999) 21 989, Bit10 (973~991) 19 982,
2787 01:57:52.511495 TX Bit3 (978~996) 19 987, Bit11 (975~991) 17 983,
2788 01:57:52.514783 TX Bit4 (981~1001) 21 991, Bit12 (974~992) 19 983,
2789 01:57:52.521602 TX Bit5 (983~1001) 19 992, Bit13 (975~991) 17 983,
2790 01:57:52.525264 TX Bit6 (982~1000) 19 991, Bit14 (973~991) 19 982,
2791 01:57:52.531556 TX Bit7 (981~1000) 20 990, Bit15 (968~984) 17 976,
2792 01:57:52.531674
2793 01:57:52.531772 Write Rank0 MR14 =0x10
2794 01:57:52.542037
2795 01:57:52.542127 CH=1, VrefRange= 0, VrefLevel = 16
2796 01:57:52.548834 TX Bit0 (982~1003) 22 992, Bit8 (970~988) 19 979,
2797 01:57:52.552139 TX Bit1 (979~1001) 23 990, Bit9 (970~987) 18 978,
2798 01:57:52.558650 TX Bit2 (978~1000) 23 989, Bit10 (973~991) 19 982,
2799 01:57:52.561617 TX Bit3 (977~997) 21 987, Bit11 (973~992) 20 982,
2800 01:57:52.565350 TX Bit4 (980~1001) 22 990, Bit12 (972~992) 21 982,
2801 01:57:52.571869 TX Bit5 (982~1002) 21 992, Bit13 (975~992) 18 983,
2802 01:57:52.575172 TX Bit6 (980~1001) 22 990, Bit14 (972~992) 21 982,
2803 01:57:52.581716 TX Bit7 (981~1000) 20 990, Bit15 (967~985) 19 976,
2804 01:57:52.581842
2805 01:57:52.581952 Write Rank0 MR14 =0x12
2806 01:57:52.592191
2807 01:57:52.595795 CH=1, VrefRange= 0, VrefLevel = 18
2808 01:57:52.599139 TX Bit0 (981~1004) 24 992, Bit8 (970~989) 20 979,
2809 01:57:52.602351 TX Bit1 (979~1001) 23 990, Bit9 (970~988) 19 979,
2810 01:57:52.608805 TX Bit2 (978~1001) 24 989, Bit10 (972~992) 21 982,
2811 01:57:52.612789 TX Bit3 (977~998) 22 987, Bit11 (973~992) 20 982,
2812 01:57:52.615511 TX Bit4 (979~1002) 24 990, Bit12 (973~993) 21 983,
2813 01:57:52.622090 TX Bit5 (982~1002) 21 992, Bit13 (975~992) 18 983,
2814 01:57:52.625535 TX Bit6 (980~1001) 22 990, Bit14 (971~992) 22 981,
2815 01:57:52.632085 TX Bit7 (980~1001) 22 990, Bit15 (967~985) 19 976,
2816 01:57:52.632203
2817 01:57:52.632301 Write Rank0 MR14 =0x14
2818 01:57:52.643023
2819 01:57:52.646291 CH=1, VrefRange= 0, VrefLevel = 20
2820 01:57:52.649639 TX Bit0 (981~1004) 24 992, Bit8 (969~990) 22 979,
2821 01:57:52.652534 TX Bit1 (979~1002) 24 990, Bit9 (970~988) 19 979,
2822 01:57:52.659189 TX Bit2 (977~1001) 25 989, Bit10 (971~992) 22 981,
2823 01:57:52.662356 TX Bit3 (977~999) 23 988, Bit11 (972~992) 21 982,
2824 01:57:52.666179 TX Bit4 (979~1003) 25 991, Bit12 (972~993) 22 982,
2825 01:57:52.672896 TX Bit5 (982~1003) 22 992, Bit13 (974~993) 20 983,
2826 01:57:52.675893 TX Bit6 (980~1002) 23 991, Bit14 (971~993) 23 982,
2827 01:57:52.682352 TX Bit7 (980~1001) 22 990, Bit15 (967~986) 20 976,
2828 01:57:52.682471
2829 01:57:52.682570 Write Rank0 MR14 =0x16
2830 01:57:52.693450
2831 01:57:52.696682 CH=1, VrefRange= 0, VrefLevel = 22
2832 01:57:52.700204 TX Bit0 (981~1005) 25 993, Bit8 (969~990) 22 979,
2833 01:57:52.703241 TX Bit1 (978~1002) 25 990, Bit9 (970~989) 20 979,
2834 01:57:52.709956 TX Bit2 (977~1001) 25 989, Bit10 (971~992) 22 981,
2835 01:57:52.713338 TX Bit3 (977~999) 23 988, Bit11 (972~993) 22 982,
2836 01:57:52.716656 TX Bit4 (979~1003) 25 991, Bit12 (972~993) 22 982,
2837 01:57:52.723215 TX Bit5 (981~1004) 24 992, Bit13 (974~993) 20 983,
2838 01:57:52.726843 TX Bit6 (979~1003) 25 991, Bit14 (971~993) 23 982,
2839 01:57:52.733463 TX Bit7 (980~1001) 22 990, Bit15 (967~986) 20 976,
2840 01:57:52.733589
2841 01:57:52.733689 Write Rank0 MR14 =0x18
2842 01:57:52.744074
2843 01:57:52.747418 CH=1, VrefRange= 0, VrefLevel = 24
2844 01:57:52.750759 TX Bit0 (980~1005) 26 992, Bit8 (969~991) 23 980,
2845 01:57:52.754200 TX Bit1 (978~1002) 25 990, Bit9 (969~990) 22 979,
2846 01:57:52.760354 TX Bit2 (977~1002) 26 989, Bit10 (971~993) 23 982,
2847 01:57:52.763992 TX Bit3 (977~999) 23 988, Bit11 (972~993) 22 982,
2848 01:57:52.767217 TX Bit4 (978~1003) 26 990, Bit12 (971~994) 24 982,
2849 01:57:52.773875 TX Bit5 (981~1004) 24 992, Bit13 (973~994) 22 983,
2850 01:57:52.777330 TX Bit6 (980~1003) 24 991, Bit14 (971~993) 23 982,
2851 01:57:52.783797 TX Bit7 (979~1002) 24 990, Bit15 (966~987) 22 976,
2852 01:57:52.783926
2853 01:57:52.784033 Write Rank0 MR14 =0x1a
2854 01:57:52.794546
2855 01:57:52.797906 CH=1, VrefRange= 0, VrefLevel = 26
2856 01:57:52.801178 TX Bit0 (980~1006) 27 993, Bit8 (969~991) 23 980,
2857 01:57:52.804800 TX Bit1 (978~1002) 25 990, Bit9 (969~990) 22 979,
2858 01:57:52.811332 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2859 01:57:52.814590 TX Bit3 (976~1000) 25 988, Bit11 (972~993) 22 982,
2860 01:57:52.818322 TX Bit4 (978~1004) 27 991, Bit12 (971~994) 24 982,
2861 01:57:52.824681 TX Bit5 (981~1005) 25 993, Bit13 (972~993) 22 982,
2862 01:57:52.828014 TX Bit6 (979~1004) 26 991, Bit14 (970~993) 24 981,
2863 01:57:52.834558 TX Bit7 (979~1002) 24 990, Bit15 (966~988) 23 977,
2864 01:57:52.834647
2865 01:57:52.834717 Write Rank0 MR14 =0x1c
2866 01:57:52.845457
2867 01:57:52.848672 CH=1, VrefRange= 0, VrefLevel = 28
2868 01:57:52.852058 TX Bit0 (979~1006) 28 992, Bit8 (969~992) 24 980,
2869 01:57:52.855833 TX Bit1 (978~1003) 26 990, Bit9 (969~990) 22 979,
2870 01:57:52.862370 TX Bit2 (977~1002) 26 989, Bit10 (971~993) 23 982,
2871 01:57:52.865395 TX Bit3 (976~1000) 25 988, Bit11 (971~994) 24 982,
2872 01:57:52.869066 TX Bit4 (978~1005) 28 991, Bit12 (970~994) 25 982,
2873 01:57:52.875629 TX Bit5 (980~1005) 26 992, Bit13 (972~994) 23 983,
2874 01:57:52.878540 TX Bit6 (978~1004) 27 991, Bit14 (970~994) 25 982,
2875 01:57:52.885135 TX Bit7 (979~1003) 25 991, Bit15 (966~988) 23 977,
2876 01:57:52.885234
2877 01:57:52.885335 Write Rank0 MR14 =0x1e
2878 01:57:52.896662
2879 01:57:52.899424 CH=1, VrefRange= 0, VrefLevel = 30
2880 01:57:52.902914 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2881 01:57:52.906578 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2882 01:57:52.913142 TX Bit2 (977~1002) 26 989, Bit10 (970~994) 25 982,
2883 01:57:52.916289 TX Bit3 (976~1000) 25 988, Bit11 (971~994) 24 982,
2884 01:57:52.919325 TX Bit4 (979~1004) 26 991, Bit12 (971~994) 24 982,
2885 01:57:52.926070 TX Bit5 (980~1005) 26 992, Bit13 (972~994) 23 983,
2886 01:57:52.929185 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2887 01:57:52.935859 TX Bit7 (978~1004) 27 991, Bit15 (965~988) 24 976,
2888 01:57:52.935949
2889 01:57:52.936018 Write Rank0 MR14 =0x20
2890 01:57:52.947323
2891 01:57:52.950700 CH=1, VrefRange= 0, VrefLevel = 32
2892 01:57:52.953903 TX Bit0 (980~1006) 27 993, Bit8 (969~992) 24 980,
2893 01:57:52.957633 TX Bit1 (978~1005) 28 991, Bit9 (968~991) 24 979,
2894 01:57:52.963796 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2895 01:57:52.967467 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2896 01:57:52.970532 TX Bit4 (979~1005) 27 992, Bit12 (970~994) 25 982,
2897 01:57:52.977153 TX Bit5 (980~1006) 27 993, Bit13 (971~994) 24 982,
2898 01:57:52.980421 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2899 01:57:52.987113 TX Bit7 (978~1005) 28 991, Bit15 (965~987) 23 976,
2900 01:57:52.987204
2901 01:57:52.987293 Write Rank0 MR14 =0x22
2902 01:57:52.997942
2903 01:57:52.998035 CH=1, VrefRange= 0, VrefLevel = 34
2904 01:57:53.005035 TX Bit0 (980~1006) 27 993, Bit8 (969~992) 24 980,
2905 01:57:53.007910 TX Bit1 (978~1005) 28 991, Bit9 (968~991) 24 979,
2906 01:57:53.014771 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2907 01:57:53.017891 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2908 01:57:53.021251 TX Bit4 (979~1005) 27 992, Bit12 (970~994) 25 982,
2909 01:57:53.028050 TX Bit5 (980~1006) 27 993, Bit13 (971~994) 24 982,
2910 01:57:53.031502 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2911 01:57:53.038128 TX Bit7 (978~1005) 28 991, Bit15 (965~987) 23 976,
2912 01:57:53.038222
2913 01:57:53.038311 Write Rank0 MR14 =0x24
2914 01:57:53.049015
2915 01:57:53.052346 CH=1, VrefRange= 0, VrefLevel = 36
2916 01:57:53.055899 TX Bit0 (980~1006) 27 993, Bit8 (969~992) 24 980,
2917 01:57:53.059186 TX Bit1 (978~1005) 28 991, Bit9 (968~991) 24 979,
2918 01:57:53.065365 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2919 01:57:53.068680 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2920 01:57:53.072448 TX Bit4 (979~1005) 27 992, Bit12 (970~994) 25 982,
2921 01:57:53.078818 TX Bit5 (980~1006) 27 993, Bit13 (971~994) 24 982,
2922 01:57:53.082150 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2923 01:57:53.088727 TX Bit7 (978~1005) 28 991, Bit15 (965~987) 23 976,
2924 01:57:53.088817
2925 01:57:53.088889 Write Rank0 MR14 =0x26
2926 01:57:53.099876
2927 01:57:53.103076 CH=1, VrefRange= 0, VrefLevel = 38
2928 01:57:53.106394 TX Bit0 (980~1006) 27 993, Bit8 (969~992) 24 980,
2929 01:57:53.109812 TX Bit1 (978~1005) 28 991, Bit9 (968~991) 24 979,
2930 01:57:53.116402 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2931 01:57:53.119880 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2932 01:57:53.122678 TX Bit4 (979~1005) 27 992, Bit12 (970~994) 25 982,
2933 01:57:53.129765 TX Bit5 (980~1006) 27 993, Bit13 (971~994) 24 982,
2934 01:57:53.132997 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2935 01:57:53.139439 TX Bit7 (978~1005) 28 991, Bit15 (965~987) 23 976,
2936 01:57:53.139525
2937 01:57:53.139594
2938 01:57:53.142886 TX Vref found, early break! 380< 387
2939 01:57:53.146201 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2940 01:57:53.149540 u1DelayCellOfst[0]=6 cells (5 PI)
2941 01:57:53.153003 u1DelayCellOfst[1]=3 cells (3 PI)
2942 01:57:53.156274 u1DelayCellOfst[2]=1 cells (1 PI)
2943 01:57:53.159903 u1DelayCellOfst[3]=0 cells (0 PI)
2944 01:57:53.163018 u1DelayCellOfst[4]=5 cells (4 PI)
2945 01:57:53.165914 u1DelayCellOfst[5]=6 cells (5 PI)
2946 01:57:53.169705 u1DelayCellOfst[6]=3 cells (3 PI)
2947 01:57:53.169793 u1DelayCellOfst[7]=3 cells (3 PI)
2948 01:57:53.172537 Byte0, DQ PI dly=988, DQM PI dly= 990
2949 01:57:53.179393 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2950 01:57:53.179473
2951 01:57:53.182924 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2952 01:57:53.183000
2953 01:57:53.186139 u1DelayCellOfst[8]=5 cells (4 PI)
2954 01:57:53.189286 u1DelayCellOfst[9]=3 cells (3 PI)
2955 01:57:53.192663 u1DelayCellOfst[10]=6 cells (5 PI)
2956 01:57:53.195892 u1DelayCellOfst[11]=7 cells (6 PI)
2957 01:57:53.199210 u1DelayCellOfst[12]=7 cells (6 PI)
2958 01:57:53.202749 u1DelayCellOfst[13]=7 cells (6 PI)
2959 01:57:53.205779 u1DelayCellOfst[14]=7 cells (6 PI)
2960 01:57:53.209488 u1DelayCellOfst[15]=0 cells (0 PI)
2961 01:57:53.212949 Byte1, DQ PI dly=976, DQM PI dly= 979
2962 01:57:53.216055 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2963 01:57:53.216154
2964 01:57:53.219400 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2965 01:57:53.219519
2966 01:57:53.222790 Write Rank0 MR14 =0x20
2967 01:57:53.222877
2968 01:57:53.226147 Final TX Range 0 Vref 32
2969 01:57:53.226235
2970 01:57:53.232985 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2971 01:57:53.233074
2972 01:57:53.239464 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2973 01:57:53.246194 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2974 01:57:53.252776 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2975 01:57:53.252867 Write Rank0 MR3 =0xb0
2976 01:57:53.255986 DramC Write-DBI on
2977 01:57:53.256073 ==
2978 01:57:53.259305 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2979 01:57:53.262674 fsp= 1, odt_onoff= 1, Byte mode= 0
2980 01:57:53.265637 ==
2981 01:57:53.269455 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2982 01:57:53.269533
2983 01:57:53.272734 Begin, DQ Scan Range 699~763
2984 01:57:53.272813
2985 01:57:53.272882
2986 01:57:53.272942 TX Vref Scan disable
2987 01:57:53.276153 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2988 01:57:53.279337 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2989 01:57:53.286096 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2990 01:57:53.289338 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2991 01:57:53.292456 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2992 01:57:53.295874 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2993 01:57:53.299264 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2994 01:57:53.302462 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2995 01:57:53.305694 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2996 01:57:53.309442 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2997 01:57:53.312317 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2998 01:57:53.315763 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2999 01:57:53.318889 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3000 01:57:53.322400 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3001 01:57:53.325694 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3002 01:57:53.329150 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3003 01:57:53.332419 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3004 01:57:53.335745 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3005 01:57:53.338998 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3006 01:57:53.342310 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3007 01:57:53.345652 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3008 01:57:53.348845 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3009 01:57:53.355406 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3010 01:57:53.358817 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3011 01:57:53.362199 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3012 01:57:53.365747 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3013 01:57:53.368820 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3014 01:57:53.375722 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3015 01:57:53.378568 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3016 01:57:53.381896 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3017 01:57:53.385267 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3018 01:57:53.388653 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3019 01:57:53.391918 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3020 01:57:53.395252 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3021 01:57:53.398456 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3022 01:57:53.401873 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3023 01:57:53.405257 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3024 01:57:53.408538 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3025 01:57:53.411842 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3026 01:57:53.415504 Byte0, DQ PI dly=736, DQM PI dly= 736
3027 01:57:53.422075 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
3028 01:57:53.422157
3029 01:57:53.425434 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
3030 01:57:53.425538
3031 01:57:53.428852 Byte1, DQ PI dly=724, DQM PI dly= 724
3032 01:57:53.431926 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
3033 01:57:53.432002
3034 01:57:53.438473 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
3035 01:57:53.438563
3036 01:57:53.445033 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3037 01:57:53.451884 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3038 01:57:53.458231 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3039 01:57:53.458322 Write Rank0 MR3 =0x30
3040 01:57:53.461998 DramC Write-DBI off
3041 01:57:53.462084
3042 01:57:53.462152 [DATLAT]
3043 01:57:53.465042 Freq=1600, CH1 RK0, use_rxtx_scan=0
3044 01:57:53.465129
3045 01:57:53.468706 DATLAT Default: 0xf
3046 01:57:53.468810 7, 0xFFFF, sum=0
3047 01:57:53.471761 8, 0xFFFF, sum=0
3048 01:57:53.471869 9, 0xFFFF, sum=0
3049 01:57:53.475232 10, 0xFFFF, sum=0
3050 01:57:53.475323 11, 0xFFFF, sum=0
3051 01:57:53.478641 12, 0xFFFF, sum=0
3052 01:57:53.478722 13, 0xFFFF, sum=0
3053 01:57:53.481581 14, 0x0, sum=1
3054 01:57:53.481686 15, 0x0, sum=2
3055 01:57:53.481777 16, 0x0, sum=3
3056 01:57:53.484987 17, 0x0, sum=4
3057 01:57:53.488391 pattern=2 first_step=14 total pass=5 best_step=16
3058 01:57:53.488479 ==
3059 01:57:53.495189 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3060 01:57:53.497953 fsp= 1, odt_onoff= 1, Byte mode= 0
3061 01:57:53.498042 ==
3062 01:57:53.501983 Start DQ dly to find pass range UseTestEngine =1
3063 01:57:53.505252 x-axis: bit #, y-axis: DQ dly (-127~63)
3064 01:57:53.507992 RX Vref Scan = 1
3065 01:57:53.614050
3066 01:57:53.614190 RX Vref found, early break!
3067 01:57:53.614261
3068 01:57:53.621038 Final RX Vref 11, apply to both rank0 and 1
3069 01:57:53.621139 ==
3070 01:57:53.624423 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3071 01:57:53.627561 fsp= 1, odt_onoff= 1, Byte mode= 0
3072 01:57:53.627649 ==
3073 01:57:53.627717 DQS Delay:
3074 01:57:53.630901 DQS0 = 0, DQS1 = 0
3075 01:57:53.630988 DQM Delay:
3076 01:57:53.634262 DQM0 = 20, DQM1 = 19
3077 01:57:53.634349 DQ Delay:
3078 01:57:53.637642 DQ0 =21, DQ1 =22, DQ2 =18, DQ3 =16
3079 01:57:53.640814 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =21
3080 01:57:53.644156 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3081 01:57:53.647407 DQ12 =22, DQ13 =21, DQ14 =23, DQ15 =13
3082 01:57:53.647495
3083 01:57:53.647563
3084 01:57:53.647625
3085 01:57:53.650648 [DramC_TX_OE_Calibration] TA2
3086 01:57:53.654063 Original DQ_B0 (3 6) =30, OEN = 27
3087 01:57:53.657307 Original DQ_B1 (3 6) =30, OEN = 27
3088 01:57:53.660874 23, 0x0, End_B0=23 End_B1=23
3089 01:57:53.660963 24, 0x0, End_B0=24 End_B1=24
3090 01:57:53.663774 25, 0x0, End_B0=25 End_B1=25
3091 01:57:53.666963 26, 0x0, End_B0=26 End_B1=26
3092 01:57:53.670873 27, 0x0, End_B0=27 End_B1=27
3093 01:57:53.673637 28, 0x0, End_B0=28 End_B1=28
3094 01:57:53.673766 29, 0x0, End_B0=29 End_B1=29
3095 01:57:53.677494 30, 0x0, End_B0=30 End_B1=30
3096 01:57:53.680553 31, 0xFFFF, End_B0=30 End_B1=30
3097 01:57:53.687267 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3098 01:57:53.690696 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3099 01:57:53.690772
3100 01:57:53.690836
3101 01:57:53.693941 Write Rank0 MR23 =0x3f
3102 01:57:53.694038 [DQSOSC]
3103 01:57:53.703507 [DQSOSCAuto] RK0, (LSB)MR18= 0xbdbd, (MSB)MR19= 0x202, tDQSOscB0 = 449 ps tDQSOscB1 = 449 ps
3104 01:57:53.710111 CH1_RK0: MR19=0x202, MR18=0xBDBD, DQSOSC=449, MR23=63, INC=12, DEC=18
3105 01:57:53.710197 Write Rank0 MR23 =0x3f
3106 01:57:53.713639 [DQSOSC]
3107 01:57:53.720074 [DQSOSCAuto] RK0, (LSB)MR18= 0xbebe, (MSB)MR19= 0x202, tDQSOscB0 = 448 ps tDQSOscB1 = 448 ps
3108 01:57:53.723602 CH1 RK0: MR19=202, MR18=BEBE
3109 01:57:53.726989 [RankSwap] Rank num 2, (Multi 1), Rank 1
3110 01:57:53.727064 Write Rank0 MR2 =0xad
3111 01:57:53.730124 [Write Leveling]
3112 01:57:53.733434 delay byte0 byte1 byte2 byte3
3113 01:57:53.733511
3114 01:57:53.733575 10 0 0
3115 01:57:53.736903 11 0 0
3116 01:57:53.736976 12 0 0
3117 01:57:53.740230 13 0 0
3118 01:57:53.740303 14 0 0
3119 01:57:53.740364 15 0 0
3120 01:57:53.743514 16 0 0
3121 01:57:53.743583 17 0 0
3122 01:57:53.746855 18 0 0
3123 01:57:53.746958 19 0 0
3124 01:57:53.747047 20 0 0
3125 01:57:53.750171 21 0 0
3126 01:57:53.750240 22 0 0
3127 01:57:53.753456 23 0 ff
3128 01:57:53.753524 24 0 ff
3129 01:57:53.756824 25 0 ff
3130 01:57:53.756898 26 0 ff
3131 01:57:53.756961 27 0 ff
3132 01:57:53.760187 28 0 ff
3133 01:57:53.760255 29 0 ff
3134 01:57:53.763658 30 0 ff
3135 01:57:53.763751 31 0 ff
3136 01:57:53.767005 32 0 ff
3137 01:57:53.767077 33 0 ff
3138 01:57:53.770086 34 0 ff
3139 01:57:53.770190 35 ff ff
3140 01:57:53.770283 36 ff ff
3141 01:57:53.773057 37 ff ff
3142 01:57:53.773135 38 ff ff
3143 01:57:53.776865 39 ff ff
3144 01:57:53.776969 40 ff ff
3145 01:57:53.780038 41 ff ff
3146 01:57:53.783464 pass bytecount = 0xff (0xff: all bytes pass)
3147 01:57:53.783549
3148 01:57:53.783612 DQS0 dly: 35
3149 01:57:53.786678 DQS1 dly: 23
3150 01:57:53.786750 Write Rank0 MR2 =0x2d
3151 01:57:53.789815 [RankSwap] Rank num 2, (Multi 1), Rank 0
3152 01:57:53.793386 Write Rank1 MR1 =0xd6
3153 01:57:53.793459 [Gating]
3154 01:57:53.793520 ==
3155 01:57:53.800151 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3156 01:57:53.803592 fsp= 1, odt_onoff= 1, Byte mode= 0
3157 01:57:53.803665 ==
3158 01:57:53.806269 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3159 01:57:53.813189 3 1 4 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3160 01:57:53.816627 3 1 8 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3161 01:57:53.819735 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3162 01:57:53.822980 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3163 01:57:53.830084 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3164 01:57:53.833383 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3165 01:57:53.836539 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3166 01:57:53.842877 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3167 01:57:53.846190 3 2 4 |201 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3168 01:57:53.849854 3 2 8 |3d3d 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3169 01:57:53.856613 3 2 12 |3d3d 2c2c |(11 11)(11 0) |(1 1)(0 0)| 0
3170 01:57:53.859813 3 2 16 |3d3d e0d |(11 11)(11 11) |(1 1)(0 0)| 0
3171 01:57:53.863170 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3172 01:57:53.866536 3 2 24 |3d3d 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
3173 01:57:53.873094 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3174 01:57:53.876320 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3175 01:57:53.879666 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3176 01:57:53.886382 3 3 8 |504 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3177 01:57:53.890128 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3178 01:57:53.893407 [Byte 0] Lead/lag falling Transition (3, 3, 12)
3179 01:57:53.899583 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3180 01:57:53.903122 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3181 01:57:53.906366 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3182 01:57:53.913103 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3183 01:57:53.916502 3 4 0 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3184 01:57:53.919602 3 4 4 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3185 01:57:53.922883 3 4 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3186 01:57:53.929258 3 4 12 |3d3d 2f2e |(11 11)(11 11) |(1 1)(1 1)| 0
3187 01:57:53.932935 3 4 16 |3d3d 1c1c |(11 11)(11 11) |(1 1)(1 1)| 0
3188 01:57:53.936161 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3189 01:57:53.943069 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3190 01:57:53.946169 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3191 01:57:53.949349 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3192 01:57:53.956040 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3193 01:57:53.959258 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3194 01:57:53.962612 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3195 01:57:53.969236 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3196 01:57:53.972664 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3197 01:57:53.976146 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3198 01:57:53.982715 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3199 01:57:53.985564 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3200 01:57:53.989436 [Byte 0] Lead/lag Transition tap number (2)
3201 01:57:53.992626 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3202 01:57:53.998997 3 6 4 |202 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3203 01:57:54.002316 [Byte 1] Lead/lag falling Transition (3, 6, 4)
3204 01:57:54.005935 3 6 8 |2020 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3205 01:57:54.008900 [Byte 1] Lead/lag Transition tap number (2)
3206 01:57:54.015676 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
3207 01:57:54.015799 [Byte 0]First pass (3, 6, 12)
3208 01:57:54.022476 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3209 01:57:54.025626 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3210 01:57:54.029115 [Byte 1]First pass (3, 6, 20)
3211 01:57:54.032166 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3212 01:57:54.035755 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3213 01:57:54.038909 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3214 01:57:54.046136 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3215 01:57:54.048782 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3216 01:57:54.052346 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3217 01:57:54.055856 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3218 01:57:54.059204 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3219 01:57:54.065272 All bytes gating window > 1UI, Early break!
3220 01:57:54.065359
3221 01:57:54.068612 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 28)
3222 01:57:54.068699
3223 01:57:54.072139 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
3224 01:57:54.072228
3225 01:57:54.072296
3226 01:57:54.072358
3227 01:57:54.075475 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
3228 01:57:54.075563
3229 01:57:54.078844 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
3230 01:57:54.078931
3231 01:57:54.079002
3232 01:57:54.082059 Write Rank1 MR1 =0x56
3233 01:57:54.082146
3234 01:57:54.085479 best RODT dly(2T, 0.5T) = (2, 2)
3235 01:57:54.085565
3236 01:57:54.088997 best RODT dly(2T, 0.5T) = (2, 3)
3237 01:57:54.089083 ==
3238 01:57:54.092332 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3239 01:57:54.095556 fsp= 1, odt_onoff= 1, Byte mode= 0
3240 01:57:54.098984 ==
3241 01:57:54.102372 Start DQ dly to find pass range UseTestEngine =0
3242 01:57:54.105161 x-axis: bit #, y-axis: DQ dly (-127~63)
3243 01:57:54.105250 RX Vref Scan = 0
3244 01:57:54.108557 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3245 01:57:54.111936 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3246 01:57:54.115627 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3247 01:57:54.118679 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3248 01:57:54.121982 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3249 01:57:54.125336 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3250 01:57:54.125435 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3251 01:57:54.128724 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3252 01:57:54.131965 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3253 01:57:54.135333 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3254 01:57:54.138416 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3255 01:57:54.141980 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3256 01:57:54.145542 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3257 01:57:54.148495 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3258 01:57:54.152062 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3259 01:57:54.152154 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3260 01:57:54.155123 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3261 01:57:54.158487 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3262 01:57:54.161625 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3263 01:57:54.164992 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3264 01:57:54.168609 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3265 01:57:54.171435 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3266 01:57:54.171524 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3267 01:57:54.174773 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3268 01:57:54.178171 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3269 01:57:54.181581 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3270 01:57:54.184822 0, [0] xxxoxxxx xoxxxxxo [MSB]
3271 01:57:54.188069 1, [0] xxooxxxx ooxxxxxo [MSB]
3272 01:57:54.191559 2, [0] xxooxxxx ooxxxxxo [MSB]
3273 01:57:54.191649 3, [0] xxoooxxo oooxxxxo [MSB]
3274 01:57:54.194848 4, [0] oxoooxxo oooxoxxo [MSB]
3275 01:57:54.198246 5, [0] oooooxoo ooooooxo [MSB]
3276 01:57:54.201656 32, [0] oooooooo ooooooox [MSB]
3277 01:57:54.204983 33, [0] oooooooo ooooooox [MSB]
3278 01:57:54.208275 34, [0] oooooooo ooooooox [MSB]
3279 01:57:54.211464 35, [0] oooxoooo xxooooox [MSB]
3280 01:57:54.211555 36, [0] oooxoooo xxooooox [MSB]
3281 01:57:54.214967 37, [0] ooxxoooo xxooooox [MSB]
3282 01:57:54.218034 38, [0] ooxxoooo xxooooox [MSB]
3283 01:57:54.221526 39, [0] oxxxxoox xxooooox [MSB]
3284 01:57:54.224773 40, [0] oxxxxoox xxxoooox [MSB]
3285 01:57:54.227916 41, [0] oxxxxoox xxxxxoox [MSB]
3286 01:57:54.228009 42, [0] xxxxxxxx xxxxxxxx [MSB]
3287 01:57:54.234458 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
3288 01:57:54.237777 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3289 01:57:54.241182 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
3290 01:57:54.245002 iDelay=42, Bit 3, Center 16 (-1 ~ 34) 36
3291 01:57:54.248171 iDelay=42, Bit 4, Center 20 (3 ~ 38) 36
3292 01:57:54.251125 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
3293 01:57:54.254465 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3294 01:57:54.257877 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3295 01:57:54.261344 iDelay=42, Bit 8, Center 17 (1 ~ 34) 34
3296 01:57:54.264627 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3297 01:57:54.268012 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3298 01:57:54.271676 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3299 01:57:54.274736 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3300 01:57:54.281060 iDelay=42, Bit 13, Center 23 (5 ~ 41) 37
3301 01:57:54.284357 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
3302 01:57:54.287671 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3303 01:57:54.287759 ==
3304 01:57:54.291078 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3305 01:57:54.294442 fsp= 1, odt_onoff= 1, Byte mode= 0
3306 01:57:54.294530 ==
3307 01:57:54.297898 DQS Delay:
3308 01:57:54.297988 DQS0 = 0, DQS1 = 0
3309 01:57:54.301148 DQM Delay:
3310 01:57:54.301266 DQM0 = 20, DQM1 = 19
3311 01:57:54.301338 DQ Delay:
3312 01:57:54.304528 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3313 01:57:54.307851 DQ4 =20, DQ5 =23, DQ6 =23, DQ7 =20
3314 01:57:54.310807 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3315 01:57:54.314753 DQ12 =22, DQ13 =23, DQ14 =23, DQ15 =14
3316 01:57:54.314842
3317 01:57:54.314908
3318 01:57:54.318044 DramC Write-DBI off
3319 01:57:54.318131 ==
3320 01:57:54.321092 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3321 01:57:54.324399 fsp= 1, odt_onoff= 1, Byte mode= 0
3322 01:57:54.327524 ==
3323 01:57:54.330777 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3324 01:57:54.330864
3325 01:57:54.334238 Begin, DQ Scan Range 919~1175
3326 01:57:54.334324
3327 01:57:54.334392
3328 01:57:54.334457 TX Vref Scan disable
3329 01:57:54.338002 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
3330 01:57:54.340740 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
3331 01:57:54.347766 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3332 01:57:54.351170 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3333 01:57:54.354636 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3334 01:57:54.357877 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3335 01:57:54.361014 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3336 01:57:54.364330 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3337 01:57:54.367645 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3338 01:57:54.370833 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3339 01:57:54.374185 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3340 01:57:54.377427 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3341 01:57:54.380894 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3342 01:57:54.384442 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3343 01:57:54.387782 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3344 01:57:54.390920 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3345 01:57:54.394135 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3346 01:57:54.400536 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3347 01:57:54.403849 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3348 01:57:54.407302 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3349 01:57:54.410998 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3350 01:57:54.413854 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3351 01:57:54.417691 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3352 01:57:54.420552 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3353 01:57:54.424078 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3354 01:57:54.427146 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3355 01:57:54.431042 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3356 01:57:54.434411 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3357 01:57:54.437627 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3358 01:57:54.440871 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3359 01:57:54.444111 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3360 01:57:54.447394 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3361 01:57:54.450834 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3362 01:57:54.454213 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3363 01:57:54.457610 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3364 01:57:54.464137 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3365 01:57:54.467609 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3366 01:57:54.470790 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3367 01:57:54.474294 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3368 01:57:54.477508 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3369 01:57:54.480850 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3370 01:57:54.484079 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3371 01:57:54.487342 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3372 01:57:54.490731 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3373 01:57:54.494026 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3374 01:57:54.497218 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3375 01:57:54.500946 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3376 01:57:54.504290 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
3377 01:57:54.507326 967 |3 6 7|[0] xxxxxxxx oxxxxxxo [MSB]
3378 01:57:54.510513 968 |3 6 8|[0] xxxxxxxx ooxxxxxo [MSB]
3379 01:57:54.513839 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
3380 01:57:54.517141 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
3381 01:57:54.520360 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3382 01:57:54.526984 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3383 01:57:54.530377 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3384 01:57:54.533713 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3385 01:57:54.537281 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3386 01:57:54.540435 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3387 01:57:54.543667 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3388 01:57:54.547129 978 |3 6 18|[0] xxooxxxx oooooooo [MSB]
3389 01:57:54.550112 979 |3 6 19|[0] xooooxxx oooooooo [MSB]
3390 01:57:54.553417 980 |3 6 20|[0] ooooooox oooooooo [MSB]
3391 01:57:54.557169 984 |3 6 24|[0] oooooooo ooooooox [MSB]
3392 01:57:54.560727 985 |3 6 25|[0] oooooooo ooooooox [MSB]
3393 01:57:54.563626 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3394 01:57:54.566853 987 |3 6 27|[0] oooooooo xxooooox [MSB]
3395 01:57:54.570308 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
3396 01:57:54.576878 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
3397 01:57:54.580412 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3398 01:57:54.583520 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3399 01:57:54.587165 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3400 01:57:54.590374 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3401 01:57:54.593562 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3402 01:57:54.597183 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3403 01:57:54.600492 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3404 01:57:54.603888 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3405 01:57:54.606844 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3406 01:57:54.610064 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3407 01:57:54.613390 1000 |3 6 40|[0] ooxxooox xxxxxxxx [MSB]
3408 01:57:54.617074 1001 |3 6 41|[0] oxxxxoox xxxxxxxx [MSB]
3409 01:57:54.620053 1002 |3 6 42|[0] oxxxxoxx xxxxxxxx [MSB]
3410 01:57:54.626903 1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
3411 01:57:54.630033 Byte0, DQ PI dly=989, DQM PI dly= 989
3412 01:57:54.633674 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3413 01:57:54.633772
3414 01:57:54.636886 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3415 01:57:54.636973
3416 01:57:54.640118 Byte1, DQ PI dly=976, DQM PI dly= 976
3417 01:57:54.647079 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
3418 01:57:54.647170
3419 01:57:54.649914 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
3420 01:57:54.650000
3421 01:57:54.650066 ==
3422 01:57:54.656478 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3423 01:57:54.656568 fsp= 1, odt_onoff= 1, Byte mode= 0
3424 01:57:54.659932 ==
3425 01:57:54.663306 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3426 01:57:54.663393
3427 01:57:54.666624 Begin, DQ Scan Range 952~1016
3428 01:57:54.666711 Write Rank1 MR14 =0x0
3429 01:57:54.676765
3430 01:57:54.676875 CH=1, VrefRange= 0, VrefLevel = 0
3431 01:57:54.683166 TX Bit0 (983~998) 16 990, Bit8 (969~983) 15 976,
3432 01:57:54.687107 TX Bit1 (982~997) 16 989, Bit9 (969~983) 15 976,
3433 01:57:54.693205 TX Bit2 (979~994) 16 986, Bit10 (973~984) 12 978,
3434 01:57:54.696323 TX Bit3 (978~991) 14 984, Bit11 (973~985) 13 979,
3435 01:57:54.699770 TX Bit4 (982~996) 15 989, Bit12 (972~984) 13 978,
3436 01:57:54.706493 TX Bit5 (983~998) 16 990, Bit13 (972~986) 15 979,
3437 01:57:54.709992 TX Bit6 (983~997) 15 990, Bit14 (971~984) 14 977,
3438 01:57:54.713239 TX Bit7 (984~995) 12 989, Bit15 (967~977) 11 972,
3439 01:57:54.716539
3440 01:57:54.716628 Write Rank1 MR14 =0x2
3441 01:57:54.726176
3442 01:57:54.726272 CH=1, VrefRange= 0, VrefLevel = 2
3443 01:57:54.732833 TX Bit0 (983~998) 16 990, Bit8 (969~983) 15 976,
3444 01:57:54.736163 TX Bit1 (982~998) 17 990, Bit9 (969~983) 15 976,
3445 01:57:54.742827 TX Bit2 (980~995) 16 987, Bit10 (971~984) 14 977,
3446 01:57:54.746102 TX Bit3 (978~991) 14 984, Bit11 (972~986) 15 979,
3447 01:57:54.749382 TX Bit4 (981~997) 17 989, Bit12 (972~984) 13 978,
3448 01:57:54.756269 TX Bit5 (983~998) 16 990, Bit13 (972~986) 15 979,
3449 01:57:54.759092 TX Bit6 (983~998) 16 990, Bit14 (972~984) 13 978,
3450 01:57:54.762508 TX Bit7 (984~996) 13 990, Bit15 (967~977) 11 972,
3451 01:57:54.762597
3452 01:57:54.765857 Write Rank1 MR14 =0x4
3453 01:57:54.775231
3454 01:57:54.775324 CH=1, VrefRange= 0, VrefLevel = 4
3455 01:57:54.781869 TX Bit0 (982~999) 18 990, Bit8 (969~983) 15 976,
3456 01:57:54.785384 TX Bit1 (982~998) 17 990, Bit9 (969~983) 15 976,
3457 01:57:54.792141 TX Bit2 (979~996) 18 987, Bit10 (970~985) 16 977,
3458 01:57:54.795335 TX Bit3 (978~992) 15 985, Bit11 (971~986) 16 978,
3459 01:57:54.798669 TX Bit4 (981~997) 17 989, Bit12 (972~985) 14 978,
3460 01:57:54.805149 TX Bit5 (983~999) 17 991, Bit13 (971~987) 17 979,
3461 01:57:54.808913 TX Bit6 (982~998) 17 990, Bit14 (971~984) 14 977,
3462 01:57:54.812077 TX Bit7 (983~997) 15 990, Bit15 (967~978) 12 972,
3463 01:57:54.815184
3464 01:57:54.815270 Write Rank1 MR14 =0x6
3465 01:57:54.825114
3466 01:57:54.825209 CH=1, VrefRange= 0, VrefLevel = 6
3467 01:57:54.831505 TX Bit0 (983~1000) 18 991, Bit8 (969~984) 16 976,
3468 01:57:54.835057 TX Bit1 (981~998) 18 989, Bit9 (969~984) 16 976,
3469 01:57:54.841537 TX Bit2 (979~997) 19 988, Bit10 (970~985) 16 977,
3470 01:57:54.845433 TX Bit3 (978~993) 16 985, Bit11 (971~987) 17 979,
3471 01:57:54.848480 TX Bit4 (981~998) 18 989, Bit12 (972~985) 14 978,
3472 01:57:54.855031 TX Bit5 (982~1000) 19 991, Bit13 (971~988) 18 979,
3473 01:57:54.857934 TX Bit6 (982~998) 17 990, Bit14 (971~985) 15 978,
3474 01:57:54.865158 TX Bit7 (983~998) 16 990, Bit15 (966~979) 14 972,
3475 01:57:54.865253
3476 01:57:54.865321 Write Rank1 MR14 =0x8
3477 01:57:54.874867
3478 01:57:54.874962 CH=1, VrefRange= 0, VrefLevel = 8
3479 01:57:54.881369 TX Bit0 (982~1000) 19 991, Bit8 (968~984) 17 976,
3480 01:57:54.884725 TX Bit1 (980~998) 19 989, Bit9 (969~984) 16 976,
3481 01:57:54.891438 TX Bit2 (978~997) 20 987, Bit10 (970~986) 17 978,
3482 01:57:54.895107 TX Bit3 (977~994) 18 985, Bit11 (971~987) 17 979,
3483 01:57:54.898129 TX Bit4 (980~998) 19 989, Bit12 (972~986) 15 979,
3484 01:57:54.904616 TX Bit5 (982~1000) 19 991, Bit13 (971~989) 19 980,
3485 01:57:54.907982 TX Bit6 (980~999) 20 989, Bit14 (970~986) 17 978,
3486 01:57:54.911551 TX Bit7 (982~998) 17 990, Bit15 (966~980) 15 973,
3487 01:57:54.911639
3488 01:57:54.914511 Write Rank1 MR14 =0xa
3489 01:57:54.924710
3490 01:57:54.924809 CH=1, VrefRange= 0, VrefLevel = 10
3491 01:57:54.931741 TX Bit0 (982~1000) 19 991, Bit8 (968~984) 17 976,
3492 01:57:54.934541 TX Bit1 (980~999) 20 989, Bit9 (968~984) 17 976,
3493 01:57:54.940946 TX Bit2 (978~998) 21 988, Bit10 (970~987) 18 978,
3494 01:57:54.944293 TX Bit3 (978~995) 18 986, Bit11 (970~988) 19 979,
3495 01:57:54.947537 TX Bit4 (980~999) 20 989, Bit12 (971~987) 17 979,
3496 01:57:54.954283 TX Bit5 (982~1000) 19 991, Bit13 (971~989) 19 980,
3497 01:57:54.957864 TX Bit6 (980~999) 20 989, Bit14 (970~986) 17 978,
3498 01:57:54.964384 TX Bit7 (982~998) 17 990, Bit15 (966~981) 16 973,
3499 01:57:54.964477
3500 01:57:54.964554 Write Rank1 MR14 =0xc
3501 01:57:54.974578
3502 01:57:54.974681 CH=1, VrefRange= 0, VrefLevel = 12
3503 01:57:54.981269 TX Bit0 (982~1001) 20 991, Bit8 (968~985) 18 976,
3504 01:57:54.984560 TX Bit1 (980~999) 20 989, Bit9 (968~985) 18 976,
3505 01:57:54.991470 TX Bit2 (978~998) 21 988, Bit10 (970~988) 19 979,
3506 01:57:54.994968 TX Bit3 (977~995) 19 986, Bit11 (970~989) 20 979,
3507 01:57:54.997652 TX Bit4 (980~999) 20 989, Bit12 (970~988) 19 979,
3508 01:57:55.004594 TX Bit5 (981~1001) 21 991, Bit13 (970~990) 21 980,
3509 01:57:55.007928 TX Bit6 (981~1000) 20 990, Bit14 (970~988) 19 979,
3510 01:57:55.014251 TX Bit7 (981~999) 19 990, Bit15 (965~982) 18 973,
3511 01:57:55.014378
3512 01:57:55.017663 wait MRW command Rank1 MR14 =0xe fired (1)
3513 01:57:55.017777 Write Rank1 MR14 =0xe
3514 01:57:55.028795
3515 01:57:55.032128 CH=1, VrefRange= 0, VrefLevel = 14
3516 01:57:55.035368 TX Bit0 (981~1002) 22 991, Bit8 (967~985) 19 976,
3517 01:57:55.038410 TX Bit1 (979~1000) 22 989, Bit9 (967~985) 19 976,
3518 01:57:55.044923 TX Bit2 (978~998) 21 988, Bit10 (970~988) 19 979,
3519 01:57:55.048212 TX Bit3 (977~996) 20 986, Bit11 (970~990) 21 980,
3520 01:57:55.051402 TX Bit4 (979~1000) 22 989, Bit12 (970~989) 20 979,
3521 01:57:55.057996 TX Bit5 (981~1002) 22 991, Bit13 (970~990) 21 980,
3522 01:57:55.061650 TX Bit6 (980~1001) 22 990, Bit14 (970~989) 20 979,
3523 01:57:55.068029 TX Bit7 (981~999) 19 990, Bit15 (964~983) 20 973,
3524 01:57:55.068155
3525 01:57:55.068256 Write Rank1 MR14 =0x10
3526 01:57:55.078841
3527 01:57:55.082397 CH=1, VrefRange= 0, VrefLevel = 16
3528 01:57:55.085298 TX Bit0 (981~1002) 22 991, Bit8 (967~986) 20 976,
3529 01:57:55.088933 TX Bit1 (979~1001) 23 990, Bit9 (967~986) 20 976,
3530 01:57:55.095463 TX Bit2 (978~999) 22 988, Bit10 (969~989) 21 979,
3531 01:57:55.098935 TX Bit3 (977~997) 21 987, Bit11 (970~990) 21 980,
3532 01:57:55.102143 TX Bit4 (979~1000) 22 989, Bit12 (970~989) 20 979,
3533 01:57:55.108965 TX Bit5 (980~1002) 23 991, Bit13 (970~991) 22 980,
3534 01:57:55.112367 TX Bit6 (979~1001) 23 990, Bit14 (970~989) 20 979,
3535 01:57:55.118561 TX Bit7 (980~1000) 21 990, Bit15 (964~983) 20 973,
3536 01:57:55.118658
3537 01:57:55.118734 Write Rank1 MR14 =0x12
3538 01:57:55.130152
3539 01:57:55.133370 CH=1, VrefRange= 0, VrefLevel = 18
3540 01:57:55.136252 TX Bit0 (981~1002) 22 991, Bit8 (967~986) 20 976,
3541 01:57:55.139558 TX Bit1 (979~1001) 23 990, Bit9 (967~986) 20 976,
3542 01:57:55.146614 TX Bit2 (978~999) 22 988, Bit10 (969~989) 21 979,
3543 01:57:55.149910 TX Bit3 (977~997) 21 987, Bit11 (970~990) 21 980,
3544 01:57:55.153095 TX Bit4 (979~1000) 22 989, Bit12 (970~989) 20 979,
3545 01:57:55.159774 TX Bit5 (980~1002) 23 991, Bit13 (970~991) 22 980,
3546 01:57:55.162809 TX Bit6 (979~1001) 23 990, Bit14 (970~989) 20 979,
3547 01:57:55.169494 TX Bit7 (980~1000) 21 990, Bit15 (964~983) 20 973,
3548 01:57:55.169592
3549 01:57:55.169660 Write Rank1 MR14 =0x14
3550 01:57:55.180461
3551 01:57:55.184236 CH=1, VrefRange= 0, VrefLevel = 20
3552 01:57:55.187483 TX Bit0 (980~1004) 25 992, Bit8 (967~987) 21 977,
3553 01:57:55.190390 TX Bit1 (979~1002) 24 990, Bit9 (968~987) 20 977,
3554 01:57:55.197342 TX Bit2 (977~1000) 24 988, Bit10 (969~990) 22 979,
3555 01:57:55.200364 TX Bit3 (977~998) 22 987, Bit11 (970~991) 22 980,
3556 01:57:55.204229 TX Bit4 (978~1001) 24 989, Bit12 (969~990) 22 979,
3557 01:57:55.210466 TX Bit5 (979~1004) 26 991, Bit13 (970~991) 22 980,
3558 01:57:55.213803 TX Bit6 (979~1002) 24 990, Bit14 (969~990) 22 979,
3559 01:57:55.220515 TX Bit7 (980~1000) 21 990, Bit15 (963~984) 22 973,
3560 01:57:55.220603
3561 01:57:55.220688 Write Rank1 MR14 =0x16
3562 01:57:55.231769
3563 01:57:55.234815 CH=1, VrefRange= 0, VrefLevel = 22
3564 01:57:55.238052 TX Bit0 (980~1004) 25 992, Bit8 (966~987) 22 976,
3565 01:57:55.241393 TX Bit1 (978~1002) 25 990, Bit9 (967~987) 21 977,
3566 01:57:55.248244 TX Bit2 (977~1000) 24 988, Bit10 (969~990) 22 979,
3567 01:57:55.251838 TX Bit3 (977~998) 22 987, Bit11 (969~991) 23 980,
3568 01:57:55.254962 TX Bit4 (978~1002) 25 990, Bit12 (969~991) 23 980,
3569 01:57:55.261650 TX Bit5 (979~1004) 26 991, Bit13 (969~992) 24 980,
3570 01:57:55.264994 TX Bit6 (979~1003) 25 991, Bit14 (969~990) 22 979,
3571 01:57:55.271286 TX Bit7 (980~1001) 22 990, Bit15 (962~984) 23 973,
3572 01:57:55.271375
3573 01:57:55.271444 Write Rank1 MR14 =0x18
3574 01:57:55.283101
3575 01:57:55.283201 CH=1, VrefRange= 0, VrefLevel = 24
3576 01:57:55.289572 TX Bit0 (979~1005) 27 992, Bit8 (966~988) 23 977,
3577 01:57:55.292759 TX Bit1 (978~1003) 26 990, Bit9 (967~988) 22 977,
3578 01:57:55.299558 TX Bit2 (977~1001) 25 989, Bit10 (969~991) 23 980,
3579 01:57:55.302823 TX Bit3 (976~999) 24 987, Bit11 (970~991) 22 980,
3580 01:57:55.306296 TX Bit4 (978~1003) 26 990, Bit12 (969~991) 23 980,
3581 01:57:55.312763 TX Bit5 (979~1004) 26 991, Bit13 (969~992) 24 980,
3582 01:57:55.316239 TX Bit6 (978~1003) 26 990, Bit14 (969~991) 23 980,
3583 01:57:55.322966 TX Bit7 (979~1002) 24 990, Bit15 (963~985) 23 974,
3584 01:57:55.323060
3585 01:57:55.323128 Write Rank1 MR14 =0x1a
3586 01:57:55.333779
3587 01:57:55.337371 CH=1, VrefRange= 0, VrefLevel = 26
3588 01:57:55.340534 TX Bit0 (979~1005) 27 992, Bit8 (966~989) 24 977,
3589 01:57:55.344005 TX Bit1 (978~1003) 26 990, Bit9 (966~989) 24 977,
3590 01:57:55.350820 TX Bit2 (977~1001) 25 989, Bit10 (969~991) 23 980,
3591 01:57:55.354009 TX Bit3 (976~999) 24 987, Bit11 (969~992) 24 980,
3592 01:57:55.357217 TX Bit4 (978~1003) 26 990, Bit12 (969~991) 23 980,
3593 01:57:55.364002 TX Bit5 (979~1005) 27 992, Bit13 (969~992) 24 980,
3594 01:57:55.367271 TX Bit6 (978~1004) 27 991, Bit14 (969~991) 23 980,
3595 01:57:55.373810 TX Bit7 (979~1003) 25 991, Bit15 (962~985) 24 973,
3596 01:57:55.373900
3597 01:57:55.373969 Write Rank1 MR14 =0x1c
3598 01:57:55.385397
3599 01:57:55.388451 CH=1, VrefRange= 0, VrefLevel = 28
3600 01:57:55.391624 TX Bit0 (979~1005) 27 992, Bit8 (966~990) 25 978,
3601 01:57:55.394866 TX Bit1 (978~1004) 27 991, Bit9 (966~989) 24 977,
3602 01:57:55.401885 TX Bit2 (977~1002) 26 989, Bit10 (968~991) 24 979,
3603 01:57:55.405119 TX Bit3 (976~999) 24 987, Bit11 (969~992) 24 980,
3604 01:57:55.408408 TX Bit4 (978~1004) 27 991, Bit12 (969~992) 24 980,
3605 01:57:55.415192 TX Bit5 (979~1005) 27 992, Bit13 (969~992) 24 980,
3606 01:57:55.418282 TX Bit6 (978~1005) 28 991, Bit14 (968~991) 24 979,
3607 01:57:55.424620 TX Bit7 (979~1003) 25 991, Bit15 (962~986) 25 974,
3608 01:57:55.424736
3609 01:57:55.424841 Write Rank1 MR14 =0x1e
3610 01:57:55.436159
3611 01:57:55.436251 CH=1, VrefRange= 0, VrefLevel = 30
3612 01:57:55.442923 TX Bit0 (979~1005) 27 992, Bit8 (965~989) 25 977,
3613 01:57:55.446078 TX Bit1 (978~1004) 27 991, Bit9 (966~989) 24 977,
3614 01:57:55.452436 TX Bit2 (978~1001) 24 989, Bit10 (968~991) 24 979,
3615 01:57:55.455772 TX Bit3 (975~999) 25 987, Bit11 (968~992) 25 980,
3616 01:57:55.459258 TX Bit4 (978~1004) 27 991, Bit12 (969~992) 24 980,
3617 01:57:55.466081 TX Bit5 (979~1005) 27 992, Bit13 (969~992) 24 980,
3618 01:57:55.469465 TX Bit6 (978~1005) 28 991, Bit14 (968~991) 24 979,
3619 01:57:55.475767 TX Bit7 (978~1004) 27 991, Bit15 (962~986) 25 974,
3620 01:57:55.475912
3621 01:57:55.475983 Write Rank1 MR14 =0x20
3622 01:57:55.487535
3623 01:57:55.490869 CH=1, VrefRange= 0, VrefLevel = 32
3624 01:57:55.493765 TX Bit0 (979~1005) 27 992, Bit8 (965~988) 24 976,
3625 01:57:55.497361 TX Bit1 (978~1004) 27 991, Bit9 (965~988) 24 976,
3626 01:57:55.504339 TX Bit2 (977~1002) 26 989, Bit10 (968~991) 24 979,
3627 01:57:55.507192 TX Bit3 (975~999) 25 987, Bit11 (968~992) 25 980,
3628 01:57:55.510437 TX Bit4 (978~1003) 26 990, Bit12 (968~992) 25 980,
3629 01:57:55.517191 TX Bit5 (979~1005) 27 992, Bit13 (969~992) 24 980,
3630 01:57:55.520554 TX Bit6 (978~1005) 28 991, Bit14 (968~992) 25 980,
3631 01:57:55.527100 TX Bit7 (978~1004) 27 991, Bit15 (961~986) 26 973,
3632 01:57:55.527189
3633 01:57:55.527257 Write Rank1 MR14 =0x22
3634 01:57:55.538594
3635 01:57:55.541984 CH=1, VrefRange= 0, VrefLevel = 34
3636 01:57:55.545340 TX Bit0 (979~1005) 27 992, Bit8 (965~988) 24 976,
3637 01:57:55.548126 TX Bit1 (978~1004) 27 991, Bit9 (965~988) 24 976,
3638 01:57:55.554825 TX Bit2 (977~1002) 26 989, Bit10 (968~991) 24 979,
3639 01:57:55.558135 TX Bit3 (975~999) 25 987, Bit11 (968~992) 25 980,
3640 01:57:55.561744 TX Bit4 (978~1003) 26 990, Bit12 (968~992) 25 980,
3641 01:57:55.568085 TX Bit5 (979~1005) 27 992, Bit13 (969~992) 24 980,
3642 01:57:55.571476 TX Bit6 (978~1005) 28 991, Bit14 (968~992) 25 980,
3643 01:57:55.578120 TX Bit7 (978~1004) 27 991, Bit15 (961~986) 26 973,
3644 01:57:55.578212
3645 01:57:55.578280 Write Rank1 MR14 =0x24
3646 01:57:55.589513
3647 01:57:55.593104 CH=1, VrefRange= 0, VrefLevel = 36
3648 01:57:55.596270 TX Bit0 (979~1005) 27 992, Bit8 (965~988) 24 976,
3649 01:57:55.599557 TX Bit1 (978~1004) 27 991, Bit9 (965~988) 24 976,
3650 01:57:55.606419 TX Bit2 (977~1002) 26 989, Bit10 (968~991) 24 979,
3651 01:57:55.609859 TX Bit3 (975~999) 25 987, Bit11 (968~992) 25 980,
3652 01:57:55.612811 TX Bit4 (978~1003) 26 990, Bit12 (968~992) 25 980,
3653 01:57:55.619589 TX Bit5 (979~1005) 27 992, Bit13 (969~992) 24 980,
3654 01:57:55.623066 TX Bit6 (978~1005) 28 991, Bit14 (968~992) 25 980,
3655 01:57:55.629679 TX Bit7 (978~1004) 27 991, Bit15 (961~986) 26 973,
3656 01:57:55.629780
3657 01:57:55.629849 Write Rank1 MR14 =0x26
3658 01:57:55.640918
3659 01:57:55.641034 CH=1, VrefRange= 0, VrefLevel = 38
3660 01:57:55.647904 TX Bit0 (979~1005) 27 992, Bit8 (965~988) 24 976,
3661 01:57:55.651126 TX Bit1 (978~1004) 27 991, Bit9 (965~988) 24 976,
3662 01:57:55.657666 TX Bit2 (977~1002) 26 989, Bit10 (968~991) 24 979,
3663 01:57:55.661132 TX Bit3 (975~999) 25 987, Bit11 (968~992) 25 980,
3664 01:57:55.663803 TX Bit4 (978~1003) 26 990, Bit12 (968~992) 25 980,
3665 01:57:55.671025 TX Bit5 (979~1005) 27 992, Bit13 (969~992) 24 980,
3666 01:57:55.673673 TX Bit6 (978~1005) 28 991, Bit14 (968~992) 25 980,
3667 01:57:55.680887 TX Bit7 (978~1004) 27 991, Bit15 (961~986) 26 973,
3668 01:57:55.680977
3669 01:57:55.681045
3670 01:57:55.683887 TX Vref found, early break! 382< 389
3671 01:57:55.687451 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3672 01:57:55.690635 u1DelayCellOfst[0]=6 cells (5 PI)
3673 01:57:55.693706 u1DelayCellOfst[1]=5 cells (4 PI)
3674 01:57:55.697273 u1DelayCellOfst[2]=2 cells (2 PI)
3675 01:57:55.700749 u1DelayCellOfst[3]=0 cells (0 PI)
3676 01:57:55.703632 u1DelayCellOfst[4]=3 cells (3 PI)
3677 01:57:55.707325 u1DelayCellOfst[5]=6 cells (5 PI)
3678 01:57:55.710582 u1DelayCellOfst[6]=5 cells (4 PI)
3679 01:57:55.710679 u1DelayCellOfst[7]=5 cells (4 PI)
3680 01:57:55.713696 Byte0, DQ PI dly=987, DQM PI dly= 989
3681 01:57:55.720584 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
3682 01:57:55.720671
3683 01:57:55.724083 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
3684 01:57:55.724169
3685 01:57:55.727369 u1DelayCellOfst[8]=3 cells (3 PI)
3686 01:57:55.730647 u1DelayCellOfst[9]=3 cells (3 PI)
3687 01:57:55.733503 u1DelayCellOfst[10]=7 cells (6 PI)
3688 01:57:55.736912 u1DelayCellOfst[11]=9 cells (7 PI)
3689 01:57:55.740415 u1DelayCellOfst[12]=9 cells (7 PI)
3690 01:57:55.743642 u1DelayCellOfst[13]=9 cells (7 PI)
3691 01:57:55.747005 u1DelayCellOfst[14]=9 cells (7 PI)
3692 01:57:55.750469 u1DelayCellOfst[15]=0 cells (0 PI)
3693 01:57:55.753723 Byte1, DQ PI dly=973, DQM PI dly= 976
3694 01:57:55.756840 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)
3695 01:57:55.756927
3696 01:57:55.760424 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)
3697 01:57:55.760512
3698 01:57:55.763559 Write Rank1 MR14 =0x20
3699 01:57:55.763674
3700 01:57:55.767354 Final TX Range 0 Vref 32
3701 01:57:55.767440
3702 01:57:55.773974 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3703 01:57:55.774061
3704 01:57:55.780597 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3705 01:57:55.787143 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3706 01:57:55.793418 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3707 01:57:55.793503 Write Rank1 MR3 =0xb0
3708 01:57:55.797672 DramC Write-DBI on
3709 01:57:55.797784 ==
3710 01:57:55.800354 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3711 01:57:55.803615 fsp= 1, odt_onoff= 1, Byte mode= 0
3712 01:57:55.806921 ==
3713 01:57:55.810368 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3714 01:57:55.810455
3715 01:57:55.813480 Begin, DQ Scan Range 696~760
3716 01:57:55.813593
3717 01:57:55.813689
3718 01:57:55.813779 TX Vref Scan disable
3719 01:57:55.817306 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3720 01:57:55.820330 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3721 01:57:55.827214 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3722 01:57:55.830244 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3723 01:57:55.833679 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3724 01:57:55.837034 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3725 01:57:55.840482 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3726 01:57:55.843667 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3727 01:57:55.846983 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3728 01:57:55.850229 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3729 01:57:55.853585 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3730 01:57:55.857124 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3731 01:57:55.860335 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3732 01:57:55.863598 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
3733 01:57:55.867325 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
3734 01:57:55.870379 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3735 01:57:55.873662 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3736 01:57:55.876879 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3737 01:57:55.880130 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3738 01:57:55.883399 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3739 01:57:55.886634 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3740 01:57:55.889924 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3741 01:57:55.896958 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3742 01:57:55.900297 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3743 01:57:55.903075 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3744 01:57:55.906926 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3745 01:57:55.910096 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3746 01:57:55.916343 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3747 01:57:55.920092 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3748 01:57:55.923021 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3749 01:57:55.926543 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3750 01:57:55.929666 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3751 01:57:55.933230 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3752 01:57:55.936614 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3753 01:57:55.939756 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3754 01:57:55.943204 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3755 01:57:55.946549 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3756 01:57:55.949806 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3757 01:57:55.953113 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3758 01:57:55.956623 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3759 01:57:55.959813 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3760 01:57:55.963050 Byte0, DQ PI dly=735, DQM PI dly= 735
3761 01:57:55.969722 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
3762 01:57:55.969844
3763 01:57:55.973208 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
3764 01:57:55.973296
3765 01:57:55.976434 Byte1, DQ PI dly=722, DQM PI dly= 722
3766 01:57:55.979673 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
3767 01:57:55.979761
3768 01:57:55.986756 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
3769 01:57:55.986844
3770 01:57:55.992988 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3771 01:57:55.999938 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3772 01:57:56.006466 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3773 01:57:56.009760 Write Rank1 MR3 =0x30
3774 01:57:56.009848 DramC Write-DBI off
3775 01:57:56.009918
3776 01:57:56.009982 [DATLAT]
3777 01:57:56.012948 Freq=1600, CH1 RK1, use_rxtx_scan=0
3778 01:57:56.013062
3779 01:57:56.016094 DATLAT Default: 0x10
3780 01:57:56.016181 7, 0xFFFF, sum=0
3781 01:57:56.019470 8, 0xFFFF, sum=0
3782 01:57:56.019558 9, 0xFFFF, sum=0
3783 01:57:56.022756 10, 0xFFFF, sum=0
3784 01:57:56.022844 11, 0xFFFF, sum=0
3785 01:57:56.026219 12, 0xFFFF, sum=0
3786 01:57:56.026307 13, 0xFFFF, sum=0
3787 01:57:56.029434 14, 0x0, sum=1
3788 01:57:56.029522 15, 0x0, sum=2
3789 01:57:56.032868 16, 0x0, sum=3
3790 01:57:56.032955 17, 0x0, sum=4
3791 01:57:56.036221 pattern=2 first_step=14 total pass=5 best_step=16
3792 01:57:56.036308 ==
3793 01:57:56.042843 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3794 01:57:56.046358 fsp= 1, odt_onoff= 1, Byte mode= 0
3795 01:57:56.046445 ==
3796 01:57:56.049683 Start DQ dly to find pass range UseTestEngine =1
3797 01:57:56.052682 x-axis: bit #, y-axis: DQ dly (-127~63)
3798 01:57:56.056306 RX Vref Scan = 0
3799 01:57:56.059429 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3800 01:57:56.062941 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3801 01:57:56.063032 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3802 01:57:56.066376 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3803 01:57:56.069684 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3804 01:57:56.073146 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3805 01:57:56.075943 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3806 01:57:56.079303 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3807 01:57:56.083156 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3808 01:57:56.086515 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3809 01:57:56.086612 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3810 01:57:56.089403 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3811 01:57:56.092702 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3812 01:57:56.095915 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3813 01:57:56.099859 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3814 01:57:56.102871 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3815 01:57:56.106029 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3816 01:57:56.109744 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3817 01:57:56.109834 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3818 01:57:56.112712 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3819 01:57:56.116487 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3820 01:57:56.119531 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3821 01:57:56.122798 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3822 01:57:56.126298 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3823 01:57:56.129559 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3824 01:57:56.129672 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3825 01:57:56.132854 0, [0] xxooxxxx ooxxxxxo [MSB]
3826 01:57:56.136224 1, [0] xxooxxxx ooxxxxxo [MSB]
3827 01:57:56.139507 2, [0] xxooxxxx ooxxxxxo [MSB]
3828 01:57:56.142840 3, [0] oxooxxxo ooxxxxxo [MSB]
3829 01:57:56.146211 4, [0] oooooxxo oooxoxxo [MSB]
3830 01:57:56.146303 5, [0] ooooooxo oooooooo [MSB]
3831 01:57:56.151249 32, [0] oooooooo ooooooox [MSB]
3832 01:57:56.154543 33, [0] oooooooo ooooooox [MSB]
3833 01:57:56.157653 34, [0] oooooooo ooooooox [MSB]
3834 01:57:56.160926 35, [0] oooxoooo xxooooox [MSB]
3835 01:57:56.164086 36, [0] oooxoooo xxooooox [MSB]
3836 01:57:56.167554 37, [0] ooxxoooo xxooooox [MSB]
3837 01:57:56.167643 38, [0] ooxxoooo xxooooox [MSB]
3838 01:57:56.171070 39, [0] ooxxooox xxxoooox [MSB]
3839 01:57:56.174432 40, [0] oxxxxoox xxxooxox [MSB]
3840 01:57:56.178167 41, [0] xxxxxxox xxxxxxxx [MSB]
3841 01:57:56.181012 42, [0] xxxxxxxx xxxxxxxx [MSB]
3842 01:57:56.184646 iDelay=42, Bit 0, Center 21 (3 ~ 40) 38
3843 01:57:56.187464 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
3844 01:57:56.190856 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3845 01:57:56.194160 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3846 01:57:56.197340 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3847 01:57:56.200761 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3848 01:57:56.204145 iDelay=42, Bit 6, Center 23 (6 ~ 41) 36
3849 01:57:56.207412 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3850 01:57:56.213935 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
3851 01:57:56.217456 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3852 01:57:56.220859 iDelay=42, Bit 10, Center 21 (4 ~ 38) 35
3853 01:57:56.224147 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3854 01:57:56.227831 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3855 01:57:56.231019 iDelay=42, Bit 13, Center 22 (5 ~ 39) 35
3856 01:57:56.234097 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3857 01:57:56.237368 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3858 01:57:56.237457 ==
3859 01:57:56.243615 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3860 01:57:56.247572 fsp= 1, odt_onoff= 1, Byte mode= 0
3861 01:57:56.247660 ==
3862 01:57:56.247728 DQS Delay:
3863 01:57:56.250356 DQS0 = 0, DQS1 = 0
3864 01:57:56.250444 DQM Delay:
3865 01:57:56.253673 DQM0 = 20, DQM1 = 19
3866 01:57:56.253768 DQ Delay:
3867 01:57:56.257107 DQ0 =21, DQ1 =21, DQ2 =18, DQ3 =16
3868 01:57:56.260730 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3869 01:57:56.263970 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3870 01:57:56.266795 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
3871 01:57:56.266883
3872 01:57:56.266950
3873 01:57:56.267012
3874 01:57:56.270160 [DramC_TX_OE_Calibration] TA2
3875 01:57:56.274077 Original DQ_B0 (3 6) =30, OEN = 27
3876 01:57:56.276808 Original DQ_B1 (3 6) =30, OEN = 27
3877 01:57:56.276895 23, 0x0, End_B0=23 End_B1=23
3878 01:57:56.280411 24, 0x0, End_B0=24 End_B1=24
3879 01:57:56.283980 25, 0x0, End_B0=25 End_B1=25
3880 01:57:56.286818 26, 0x0, End_B0=26 End_B1=26
3881 01:57:56.286907 27, 0x0, End_B0=27 End_B1=27
3882 01:57:56.290437 28, 0x0, End_B0=28 End_B1=28
3883 01:57:56.293509 29, 0x0, End_B0=29 End_B1=29
3884 01:57:56.297018 30, 0x0, End_B0=30 End_B1=30
3885 01:57:56.300142 31, 0xFFFF, End_B0=30 End_B1=30
3886 01:57:56.303378 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3887 01:57:56.310166 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3888 01:57:56.310254
3889 01:57:56.310322
3890 01:57:56.313389 Write Rank1 MR23 =0x3f
3891 01:57:56.313475 [DQSOSC]
3892 01:57:56.319982 [DQSOSCAuto] RK1, (LSB)MR18= 0xcccc, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
3893 01:57:56.326667 CH1_RK1: MR19=0x202, MR18=0xCCCC, DQSOSC=439, MR23=63, INC=12, DEC=19
3894 01:57:56.330279 Write Rank1 MR23 =0x3f
3895 01:57:56.330366 [DQSOSC]
3896 01:57:56.340211 [DQSOSCAuto] RK1, (LSB)MR18= 0xcdcd, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
3897 01:57:56.340300 CH1 RK1: MR19=202, MR18=CDCD
3898 01:57:56.343471 [RxdqsGatingPostProcess] freq 1600
3899 01:57:56.350052 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3900 01:57:56.350141 Rank: 0
3901 01:57:56.353289 best DQS0 dly(2T, 0.5T) = (2, 6)
3902 01:57:56.356731 best DQS1 dly(2T, 0.5T) = (2, 6)
3903 01:57:56.360191 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3904 01:57:56.363410 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3905 01:57:56.363497 Rank: 1
3906 01:57:56.366630 best DQS0 dly(2T, 0.5T) = (2, 5)
3907 01:57:56.370008 best DQS1 dly(2T, 0.5T) = (2, 6)
3908 01:57:56.373374 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3909 01:57:56.376676 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3910 01:57:56.380111 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3911 01:57:56.382955 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3912 01:57:56.389746 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3913 01:57:56.389833
3914 01:57:56.389900
3915 01:57:56.393053 [Calibration Summary] Freqency 1600
3916 01:57:56.393140 CH 0, Rank 0
3917 01:57:56.393208 All Pass.
3918 01:57:56.396540
3919 01:57:56.396626 CH 0, Rank 1
3920 01:57:56.396694 All Pass.
3921 01:57:56.396756
3922 01:57:56.399685 CH 1, Rank 0
3923 01:57:56.399771 All Pass.
3924 01:57:56.399839
3925 01:57:56.399902 CH 1, Rank 1
3926 01:57:56.402946 All Pass.
3927 01:57:56.403031
3928 01:57:56.410209 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3929 01:57:56.416008 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3930 01:57:56.422965 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3931 01:57:56.423053 Write Rank0 MR3 =0xb0
3932 01:57:56.429530 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3933 01:57:56.436202 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3934 01:57:56.446322 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3935 01:57:56.446415 Write Rank1 MR3 =0xb0
3936 01:57:56.452816 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3937 01:57:56.459553 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3938 01:57:56.466196 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3939 01:57:56.469159 Write Rank0 MR3 =0xb0
3940 01:57:56.476188 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3941 01:57:56.482972 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3942 01:57:56.489242 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3943 01:57:56.492622 Write Rank1 MR3 =0xb0
3944 01:57:56.492709 DramC Write-DBI on
3945 01:57:56.495982 [GetDramInforAfterCalByMRR] Vendor 6.
3946 01:57:56.499359 [GetDramInforAfterCalByMRR] Revision 505.
3947 01:57:56.502514 MR8 1111
3948 01:57:56.505697 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3949 01:57:56.505824 MR8 1111
3950 01:57:56.512752 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3951 01:57:56.512844 MR8 1111
3952 01:57:56.518865 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3953 01:57:56.518979 MR8 1111
3954 01:57:56.522472 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3955 01:57:56.532185 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3956 01:57:56.535477 Write Rank0 MR13 =0xd0
3957 01:57:56.535570 Write Rank1 MR13 =0xd0
3958 01:57:56.539362 Write Rank0 MR13 =0xd0
3959 01:57:56.539467 Write Rank1 MR13 =0xd0
3960 01:57:56.542640 Save calibration result to emmc
3961 01:57:56.542716
3962 01:57:56.542781
3963 01:57:56.546091 [DramcModeReg_Check] Freq_1600, FSP_1
3964 01:57:56.549289 FSP_1, CH_0, RK0
3965 01:57:56.552493 Write Rank0 MR13 =0xd8
3966 01:57:56.552567 MR12 = 0x60 (global = 0x60) match
3967 01:57:56.555725 MR14 = 0x1c (global = 0x1c) match
3968 01:57:56.559010 FSP_1, CH_0, RK1
3969 01:57:56.562328 Write Rank1 MR13 =0xd8
3970 01:57:56.562403 MR12 = 0x5c (global = 0x5c) match
3971 01:57:56.565613 MR14 = 0x1e (global = 0x1e) match
3972 01:57:56.568849 FSP_1, CH_1, RK0
3973 01:57:56.572026 Write Rank0 MR13 =0xd8
3974 01:57:56.572108 MR12 = 0x5c (global = 0x5c) match
3975 01:57:56.575509 MR14 = 0x20 (global = 0x20) match
3976 01:57:56.579208 FSP_1, CH_1, RK1
3977 01:57:56.582365 Write Rank1 MR13 =0xd8
3978 01:57:56.582469 MR12 = 0x5e (global = 0x5e) match
3979 01:57:56.585469 MR14 = 0x20 (global = 0x20) match
3980 01:57:56.585553
3981 01:57:56.592146 [MEM_TEST] 02: After DFS, before run time config
3982 01:57:56.602423 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3983 01:57:56.602553
3984 01:57:56.602641 [TA2_TEST]
3985 01:57:56.602707 === TA2 HW
3986 01:57:56.605551 TA2 PAT: XTALK
3987 01:57:56.608764 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3988 01:57:56.615368 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3989 01:57:56.618682 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3990 01:57:56.622396 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3991 01:57:56.625545
3992 01:57:56.625640
3993 01:57:56.625709 Settings after calibration
3994 01:57:56.625787
3995 01:57:56.628649 [DramcRunTimeConfig]
3996 01:57:56.631916 TransferPLLToSPMControl - MODE SW PHYPLL
3997 01:57:56.632008 TX_TRACKING: ON
3998 01:57:56.635355 RX_TRACKING: ON
3999 01:57:56.635450 HW_GATING: ON
4000 01:57:56.638469 HW_GATING DBG: OFF
4001 01:57:56.638560 ddr_geometry:1
4002 01:57:56.642272 ddr_geometry:1
4003 01:57:56.642360 ddr_geometry:1
4004 01:57:56.645616 ddr_geometry:1
4005 01:57:56.645741 ddr_geometry:1
4006 01:57:56.645844 ddr_geometry:1
4007 01:57:56.648901 ddr_geometry:1
4008 01:57:56.649020 ddr_geometry:1
4009 01:57:56.651665 High Freq DUMMY_READ_FOR_TRACKING: ON
4010 01:57:56.655088 ZQCS_ENABLE_LP4: OFF
4011 01:57:56.658878 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
4012 01:57:56.662048 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
4013 01:57:56.662142 SPM_CONTROL_AFTERK: ON
4014 01:57:56.665634 IMPEDANCE_TRACKING: ON
4015 01:57:56.665760 TEMP_SENSOR: ON
4016 01:57:56.668971 PER_BANK_REFRESH: ON
4017 01:57:56.669061 HW_SAVE_FOR_SR: ON
4018 01:57:56.671765 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
4019 01:57:56.675151 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
4020 01:57:56.678419 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
4021 01:57:56.681785 Read ODT Tracking: ON
4022 01:57:56.685489 =========================
4023 01:57:56.685605
4024 01:57:56.685703 [TA2_TEST]
4025 01:57:56.685791 === TA2 HW
4026 01:57:56.691990 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
4027 01:57:56.695054 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
4028 01:57:56.701579 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
4029 01:57:56.704918 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
4030 01:57:56.705008
4031 01:57:56.708080 [MEM_TEST] 03: After run time config
4032 01:57:56.719948 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
4033 01:57:56.723216 [complex_mem_test] start addr:0x40024000, len:131072
4034 01:57:56.927848 1st complex R/W mem test pass
4035 01:57:56.934230 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
4036 01:57:56.937391 sync preloader write leveling
4037 01:57:56.941136 sync preloader cbt_mr12
4038 01:57:56.944321 sync preloader cbt_clk_dly
4039 01:57:56.944440 sync preloader cbt_cmd_dly
4040 01:57:56.947655 sync preloader cbt_cs
4041 01:57:56.951128 sync preloader cbt_ca_perbit_delay
4042 01:57:56.951218 sync preloader clk_delay
4043 01:57:56.954122 sync preloader dqs_delay
4044 01:57:56.957518 sync preloader u1Gating2T_Save
4045 01:57:56.961122 sync preloader u1Gating05T_Save
4046 01:57:56.964719 sync preloader u1Gatingfine_tune_Save
4047 01:57:56.967730 sync preloader u1Gatingucpass_count_Save
4048 01:57:56.970873 sync preloader u1TxWindowPerbitVref_Save
4049 01:57:56.974604 sync preloader u1TxCenter_min_Save
4050 01:57:56.977483 sync preloader u1TxCenter_max_Save
4051 01:57:56.980783 sync preloader u1Txwin_center_Save
4052 01:57:56.984035 sync preloader u1Txfirst_pass_Save
4053 01:57:56.987975 sync preloader u1Txlast_pass_Save
4054 01:57:56.988054 sync preloader u1RxDatlat_Save
4055 01:57:56.990728 sync preloader u1RxWinPerbitVref_Save
4056 01:57:56.997439 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4057 01:57:57.000927 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4058 01:57:57.004091 sync preloader delay_cell_unit
4059 01:57:57.011006 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4060 01:57:57.014406 sync preloader write leveling
4061 01:57:57.014481 sync preloader cbt_mr12
4062 01:57:57.017808 sync preloader cbt_clk_dly
4063 01:57:57.021100 sync preloader cbt_cmd_dly
4064 01:57:57.021172 sync preloader cbt_cs
4065 01:57:57.024162 sync preloader cbt_ca_perbit_delay
4066 01:57:57.027349 sync preloader clk_delay
4067 01:57:57.031145 sync preloader dqs_delay
4068 01:57:57.031223 sync preloader u1Gating2T_Save
4069 01:57:57.033975 sync preloader u1Gating05T_Save
4070 01:57:57.037247 sync preloader u1Gatingfine_tune_Save
4071 01:57:57.040513 sync preloader u1Gatingucpass_count_Save
4072 01:57:57.043800 sync preloader u1TxWindowPerbitVref_Save
4073 01:57:57.047125 sync preloader u1TxCenter_min_Save
4074 01:57:57.050995 sync preloader u1TxCenter_max_Save
4075 01:57:57.054100 sync preloader u1Txwin_center_Save
4076 01:57:57.057469 sync preloader u1Txfirst_pass_Save
4077 01:57:57.060793 sync preloader u1Txlast_pass_Save
4078 01:57:57.064111 sync preloader u1RxDatlat_Save
4079 01:57:57.067038 sync preloader u1RxWinPerbitVref_Save
4080 01:57:57.070926 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4081 01:57:57.074168 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4082 01:57:57.076937 sync preloader delay_cell_unit
4083 01:57:57.083644 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4084 01:57:57.086956 sync preloader write leveling
4085 01:57:57.090607 sync preloader cbt_mr12
4086 01:57:57.093981 sync preloader cbt_clk_dly
4087 01:57:57.094075 sync preloader cbt_cmd_dly
4088 01:57:57.097106 sync preloader cbt_cs
4089 01:57:57.100387 sync preloader cbt_ca_perbit_delay
4090 01:57:57.100477 sync preloader clk_delay
4091 01:57:57.104014 sync preloader dqs_delay
4092 01:57:57.107230 sync preloader u1Gating2T_Save
4093 01:57:57.110750 sync preloader u1Gating05T_Save
4094 01:57:57.114070 sync preloader u1Gatingfine_tune_Save
4095 01:57:57.116949 sync preloader u1Gatingucpass_count_Save
4096 01:57:57.120837 sync preloader u1TxWindowPerbitVref_Save
4097 01:57:57.123733 sync preloader u1TxCenter_min_Save
4098 01:57:57.127033 sync preloader u1TxCenter_max_Save
4099 01:57:57.130637 sync preloader u1Txwin_center_Save
4100 01:57:57.133630 sync preloader u1Txfirst_pass_Save
4101 01:57:57.136908 sync preloader u1Txlast_pass_Save
4102 01:57:57.137002 sync preloader u1RxDatlat_Save
4103 01:57:57.140572 sync preloader u1RxWinPerbitVref_Save
4104 01:57:57.147132 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4105 01:57:57.150345 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4106 01:57:57.153604 sync preloader delay_cell_unit
4107 01:57:57.156818 just_for_test_dump_coreboot_params dump all params
4108 01:57:57.160093 dump source = 0x0
4109 01:57:57.160181 dump params frequency:1600
4110 01:57:57.163432 dump params rank number:2
4111 01:57:57.163529
4112 01:57:57.167014 dump params write leveling
4113 01:57:57.170214 write leveling[0][0][0] = 0x20
4114 01:57:57.170301 write leveling[0][0][1] = 0x17
4115 01:57:57.173663 write leveling[0][1][0] = 0x1b
4116 01:57:57.177040 write leveling[0][1][1] = 0x17
4117 01:57:57.180148 write leveling[1][0][0] = 0x21
4118 01:57:57.183619 write leveling[1][0][1] = 0x18
4119 01:57:57.187308 write leveling[1][1][0] = 0x23
4120 01:57:57.187461 write leveling[1][1][1] = 0x17
4121 01:57:57.190450 dump params cbt_cs
4122 01:57:57.190597 cbt_cs[0][0] = 0x8
4123 01:57:57.194070 cbt_cs[0][1] = 0x8
4124 01:57:57.194206 cbt_cs[1][0] = 0xb
4125 01:57:57.197080 cbt_cs[1][1] = 0xb
4126 01:57:57.200483 dump params cbt_mr12
4127 01:57:57.200623 cbt_mr12[0][0] = 0x20
4128 01:57:57.203968 cbt_mr12[0][1] = 0x1c
4129 01:57:57.204105 cbt_mr12[1][0] = 0x1c
4130 01:57:57.206991 cbt_mr12[1][1] = 0x1e
4131 01:57:57.210398 dump params tx window
4132 01:57:57.210547 tx_center_min[0][0][0] = 981
4133 01:57:57.213611 tx_center_max[0][0][0] = 988
4134 01:57:57.217055 tx_center_min[0][0][1] = 974
4135 01:57:57.220416 tx_center_max[0][0][1] = 980
4136 01:57:57.220508 tx_center_min[0][1][0] = 980
4137 01:57:57.223931 tx_center_max[0][1][0] = 986
4138 01:57:57.227156 tx_center_min[0][1][1] = 977
4139 01:57:57.230484 tx_center_max[0][1][1] = 983
4140 01:57:57.233991 tx_center_min[1][0][0] = 988
4141 01:57:57.234083 tx_center_max[1][0][0] = 993
4142 01:57:57.237170 tx_center_min[1][0][1] = 976
4143 01:57:57.240341 tx_center_max[1][0][1] = 982
4144 01:57:57.243609 tx_center_min[1][1][0] = 987
4145 01:57:57.246891 tx_center_max[1][1][0] = 992
4146 01:57:57.247031 tx_center_min[1][1][1] = 973
4147 01:57:57.250728 tx_center_max[1][1][1] = 980
4148 01:57:57.254130 dump params tx window
4149 01:57:57.254269 tx_win_center[0][0][0] = 988
4150 01:57:57.257345 tx_first_pass[0][0][0] = 976
4151 01:57:57.260878 tx_last_pass[0][0][0] = 1000
4152 01:57:57.264097 tx_win_center[0][0][1] = 987
4153 01:57:57.266923 tx_first_pass[0][0][1] = 976
4154 01:57:57.267062 tx_last_pass[0][0][1] = 999
4155 01:57:57.270192 tx_win_center[0][0][2] = 987
4156 01:57:57.273668 tx_first_pass[0][0][2] = 975
4157 01:57:57.277438 tx_last_pass[0][0][2] = 999
4158 01:57:57.277587 tx_win_center[0][0][3] = 981
4159 01:57:57.280864 tx_first_pass[0][0][3] = 969
4160 01:57:57.284148 tx_last_pass[0][0][3] = 993
4161 01:57:57.287593 tx_win_center[0][0][4] = 987
4162 01:57:57.290983 tx_first_pass[0][0][4] = 975
4163 01:57:57.291092 tx_last_pass[0][0][4] = 999
4164 01:57:57.293717 tx_win_center[0][0][5] = 983
4165 01:57:57.297068 tx_first_pass[0][0][5] = 972
4166 01:57:57.300450 tx_last_pass[0][0][5] = 995
4167 01:57:57.300560 tx_win_center[0][0][6] = 985
4168 01:57:57.303773 tx_first_pass[0][0][6] = 973
4169 01:57:57.306887 tx_last_pass[0][0][6] = 998
4170 01:57:57.310337 tx_win_center[0][0][7] = 987
4171 01:57:57.313564 tx_first_pass[0][0][7] = 975
4172 01:57:57.313670 tx_last_pass[0][0][7] = 999
4173 01:57:57.317192 tx_win_center[0][0][8] = 974
4174 01:57:57.320615 tx_first_pass[0][0][8] = 962
4175 01:57:57.323756 tx_last_pass[0][0][8] = 986
4176 01:57:57.327166 tx_win_center[0][0][9] = 976
4177 01:57:57.327274 tx_first_pass[0][0][9] = 965
4178 01:57:57.330190 tx_last_pass[0][0][9] = 988
4179 01:57:57.333523 tx_win_center[0][0][10] = 980
4180 01:57:57.336682 tx_first_pass[0][0][10] = 968
4181 01:57:57.340110 tx_last_pass[0][0][10] = 992
4182 01:57:57.340217 tx_win_center[0][0][11] = 975
4183 01:57:57.343187 tx_first_pass[0][0][11] = 964
4184 01:57:57.347079 tx_last_pass[0][0][11] = 987
4185 01:57:57.350032 tx_win_center[0][0][12] = 978
4186 01:57:57.353242 tx_first_pass[0][0][12] = 966
4187 01:57:57.353331 tx_last_pass[0][0][12] = 990
4188 01:57:57.356634 tx_win_center[0][0][13] = 977
4189 01:57:57.360102 tx_first_pass[0][0][13] = 966
4190 01:57:57.363318 tx_last_pass[0][0][13] = 989
4191 01:57:57.366737 tx_win_center[0][0][14] = 978
4192 01:57:57.366892 tx_first_pass[0][0][14] = 966
4193 01:57:57.369971 tx_last_pass[0][0][14] = 990
4194 01:57:57.373351 tx_win_center[0][0][15] = 980
4195 01:57:57.376671 tx_first_pass[0][0][15] = 968
4196 01:57:57.379797 tx_last_pass[0][0][15] = 992
4197 01:57:57.379962 tx_win_center[0][1][0] = 986
4198 01:57:57.382760 tx_first_pass[0][1][0] = 974
4199 01:57:57.386490 tx_last_pass[0][1][0] = 999
4200 01:57:57.389640 tx_win_center[0][1][1] = 985
4201 01:57:57.392944 tx_first_pass[0][1][1] = 973
4202 01:57:57.393068 tx_last_pass[0][1][1] = 997
4203 01:57:57.396383 tx_win_center[0][1][2] = 986
4204 01:57:57.399637 tx_first_pass[0][1][2] = 975
4205 01:57:57.402999 tx_last_pass[0][1][2] = 998
4206 01:57:57.403149 tx_win_center[0][1][3] = 980
4207 01:57:57.406458 tx_first_pass[0][1][3] = 968
4208 01:57:57.409817 tx_last_pass[0][1][3] = 992
4209 01:57:57.412703 tx_win_center[0][1][4] = 984
4210 01:57:57.416456 tx_first_pass[0][1][4] = 971
4211 01:57:57.416597 tx_last_pass[0][1][4] = 997
4212 01:57:57.419659 tx_win_center[0][1][5] = 981
4213 01:57:57.422906 tx_first_pass[0][1][5] = 969
4214 01:57:57.426286 tx_last_pass[0][1][5] = 994
4215 01:57:57.426425 tx_win_center[0][1][6] = 983
4216 01:57:57.429595 tx_first_pass[0][1][6] = 970
4217 01:57:57.432581 tx_last_pass[0][1][6] = 996
4218 01:57:57.436011 tx_win_center[0][1][7] = 984
4219 01:57:57.439869 tx_first_pass[0][1][7] = 971
4220 01:57:57.440040 tx_last_pass[0][1][7] = 997
4221 01:57:57.442487 tx_win_center[0][1][8] = 977
4222 01:57:57.446390 tx_first_pass[0][1][8] = 965
4223 01:57:57.449086 tx_last_pass[0][1][8] = 989
4224 01:57:57.449233 tx_win_center[0][1][9] = 978
4225 01:57:57.452439 tx_first_pass[0][1][9] = 967
4226 01:57:57.455866 tx_last_pass[0][1][9] = 990
4227 01:57:57.459283 tx_win_center[0][1][10] = 983
4228 01:57:57.462520 tx_first_pass[0][1][10] = 972
4229 01:57:57.462663 tx_last_pass[0][1][10] = 995
4230 01:57:57.465756 tx_win_center[0][1][11] = 977
4231 01:57:57.469139 tx_first_pass[0][1][11] = 966
4232 01:57:57.472423 tx_last_pass[0][1][11] = 989
4233 01:57:57.475972 tx_win_center[0][1][12] = 979
4234 01:57:57.479418 tx_first_pass[0][1][12] = 967
4235 01:57:57.479574 tx_last_pass[0][1][12] = 991
4236 01:57:57.482712 tx_win_center[0][1][13] = 979
4237 01:57:57.485693 tx_first_pass[0][1][13] = 968
4238 01:57:57.489358 tx_last_pass[0][1][13] = 990
4239 01:57:57.492448 tx_win_center[0][1][14] = 979
4240 01:57:57.492597 tx_first_pass[0][1][14] = 968
4241 01:57:57.495679 tx_last_pass[0][1][14] = 991
4242 01:57:57.499114 tx_win_center[0][1][15] = 981
4243 01:57:57.502399 tx_first_pass[0][1][15] = 969
4244 01:57:57.505698 tx_last_pass[0][1][15] = 994
4245 01:57:57.505882 tx_win_center[1][0][0] = 993
4246 01:57:57.509122 tx_first_pass[1][0][0] = 980
4247 01:57:57.512572 tx_last_pass[1][0][0] = 1006
4248 01:57:57.515964 tx_win_center[1][0][1] = 991
4249 01:57:57.516139 tx_first_pass[1][0][1] = 978
4250 01:57:57.519375 tx_last_pass[1][0][1] = 1005
4251 01:57:57.522637 tx_win_center[1][0][2] = 989
4252 01:57:57.525931 tx_first_pass[1][0][2] = 977
4253 01:57:57.528865 tx_last_pass[1][0][2] = 1002
4254 01:57:57.529022 tx_win_center[1][0][3] = 988
4255 01:57:57.532573 tx_first_pass[1][0][3] = 976
4256 01:57:57.535521 tx_last_pass[1][0][3] = 1000
4257 01:57:57.539119 tx_win_center[1][0][4] = 992
4258 01:57:57.542376 tx_first_pass[1][0][4] = 979
4259 01:57:57.542543 tx_last_pass[1][0][4] = 1005
4260 01:57:57.545486 tx_win_center[1][0][5] = 993
4261 01:57:57.549160 tx_first_pass[1][0][5] = 980
4262 01:57:57.552234 tx_last_pass[1][0][5] = 1006
4263 01:57:57.552399 tx_win_center[1][0][6] = 991
4264 01:57:57.555840 tx_first_pass[1][0][6] = 978
4265 01:57:57.558929 tx_last_pass[1][0][6] = 1005
4266 01:57:57.562675 tx_win_center[1][0][7] = 991
4267 01:57:57.565709 tx_first_pass[1][0][7] = 978
4268 01:57:57.565891 tx_last_pass[1][0][7] = 1005
4269 01:57:57.569378 tx_win_center[1][0][8] = 980
4270 01:57:57.572362 tx_first_pass[1][0][8] = 969
4271 01:57:57.575926 tx_last_pass[1][0][8] = 992
4272 01:57:57.579274 tx_win_center[1][0][9] = 979
4273 01:57:57.579436 tx_first_pass[1][0][9] = 968
4274 01:57:57.582615 tx_last_pass[1][0][9] = 991
4275 01:57:57.585861 tx_win_center[1][0][10] = 981
4276 01:57:57.589154 tx_first_pass[1][0][10] = 970
4277 01:57:57.589295 tx_last_pass[1][0][10] = 993
4278 01:57:57.592364 tx_win_center[1][0][11] = 982
4279 01:57:57.595728 tx_first_pass[1][0][11] = 970
4280 01:57:57.599046 tx_last_pass[1][0][11] = 994
4281 01:57:57.602565 tx_win_center[1][0][12] = 982
4282 01:57:57.602717 tx_first_pass[1][0][12] = 970
4283 01:57:57.605504 tx_last_pass[1][0][12] = 994
4284 01:57:57.609035 tx_win_center[1][0][13] = 982
4285 01:57:57.612446 tx_first_pass[1][0][13] = 971
4286 01:57:57.615806 tx_last_pass[1][0][13] = 994
4287 01:57:57.615952 tx_win_center[1][0][14] = 982
4288 01:57:57.619226 tx_first_pass[1][0][14] = 971
4289 01:57:57.622593 tx_last_pass[1][0][14] = 993
4290 01:57:57.625877 tx_win_center[1][0][15] = 976
4291 01:57:57.629256 tx_first_pass[1][0][15] = 965
4292 01:57:57.629404 tx_last_pass[1][0][15] = 987
4293 01:57:57.632482 tx_win_center[1][1][0] = 992
4294 01:57:57.635892 tx_first_pass[1][1][0] = 979
4295 01:57:57.639062 tx_last_pass[1][1][0] = 1005
4296 01:57:57.642080 tx_win_center[1][1][1] = 991
4297 01:57:57.642171 tx_first_pass[1][1][1] = 978
4298 01:57:57.645577 tx_last_pass[1][1][1] = 1004
4299 01:57:57.649052 tx_win_center[1][1][2] = 989
4300 01:57:57.652422 tx_first_pass[1][1][2] = 977
4301 01:57:57.655704 tx_last_pass[1][1][2] = 1002
4302 01:57:57.655818 tx_win_center[1][1][3] = 987
4303 01:57:57.658992 tx_first_pass[1][1][3] = 975
4304 01:57:57.662169 tx_last_pass[1][1][3] = 999
4305 01:57:57.665675 tx_win_center[1][1][4] = 990
4306 01:57:57.665808 tx_first_pass[1][1][4] = 978
4307 01:57:57.668895 tx_last_pass[1][1][4] = 1003
4308 01:57:57.672135 tx_win_center[1][1][5] = 992
4309 01:57:57.675565 tx_first_pass[1][1][5] = 979
4310 01:57:57.679252 tx_last_pass[1][1][5] = 1005
4311 01:57:57.679376 tx_win_center[1][1][6] = 991
4312 01:57:57.682179 tx_first_pass[1][1][6] = 978
4313 01:57:57.685679 tx_last_pass[1][1][6] = 1005
4314 01:57:57.688947 tx_win_center[1][1][7] = 991
4315 01:57:57.692135 tx_first_pass[1][1][7] = 978
4316 01:57:57.692240 tx_last_pass[1][1][7] = 1004
4317 01:57:57.695858 tx_win_center[1][1][8] = 976
4318 01:57:57.698688 tx_first_pass[1][1][8] = 965
4319 01:57:57.702064 tx_last_pass[1][1][8] = 988
4320 01:57:57.702181 tx_win_center[1][1][9] = 976
4321 01:57:57.705457 tx_first_pass[1][1][9] = 965
4322 01:57:57.708714 tx_last_pass[1][1][9] = 988
4323 01:57:57.711992 tx_win_center[1][1][10] = 979
4324 01:57:57.715386 tx_first_pass[1][1][10] = 968
4325 01:57:57.715488 tx_last_pass[1][1][10] = 991
4326 01:57:57.718849 tx_win_center[1][1][11] = 980
4327 01:57:57.722045 tx_first_pass[1][1][11] = 968
4328 01:57:57.725419 tx_last_pass[1][1][11] = 992
4329 01:57:57.728727 tx_win_center[1][1][12] = 980
4330 01:57:57.728827 tx_first_pass[1][1][12] = 968
4331 01:57:57.731988 tx_last_pass[1][1][12] = 992
4332 01:57:57.735346 tx_win_center[1][1][13] = 980
4333 01:57:57.738688 tx_first_pass[1][1][13] = 969
4334 01:57:57.742135 tx_last_pass[1][1][13] = 992
4335 01:57:57.742228 tx_win_center[1][1][14] = 980
4336 01:57:57.745477 tx_first_pass[1][1][14] = 968
4337 01:57:57.748613 tx_last_pass[1][1][14] = 992
4338 01:57:57.751576 tx_win_center[1][1][15] = 973
4339 01:57:57.754805 tx_first_pass[1][1][15] = 961
4340 01:57:57.758350 tx_last_pass[1][1][15] = 986
4341 01:57:57.758457 dump params rx window
4342 01:57:57.761691 rx_firspass[0][0][0] = 5
4343 01:57:57.765044 rx_lastpass[0][0][0] = 38
4344 01:57:57.765142 rx_firspass[0][0][1] = 5
4345 01:57:57.768394 rx_lastpass[0][0][1] = 36
4346 01:57:57.771627 rx_firspass[0][0][2] = 6
4347 01:57:57.771724 rx_lastpass[0][0][2] = 36
4348 01:57:57.774782 rx_firspass[0][0][3] = -2
4349 01:57:57.778051 rx_lastpass[0][0][3] = 31
4350 01:57:57.778146 rx_firspass[0][0][4] = 5
4351 01:57:57.781309 rx_lastpass[0][0][4] = 36
4352 01:57:57.784641 rx_firspass[0][0][5] = 2
4353 01:57:57.788087 rx_lastpass[0][0][5] = 31
4354 01:57:57.788204 rx_firspass[0][0][6] = 3
4355 01:57:57.791375 rx_lastpass[0][0][6] = 33
4356 01:57:57.794620 rx_firspass[0][0][7] = 5
4357 01:57:57.794736 rx_lastpass[0][0][7] = 36
4358 01:57:57.797887 rx_firspass[0][0][8] = -3
4359 01:57:57.801432 rx_lastpass[0][0][8] = 32
4360 01:57:57.804606 rx_firspass[0][0][9] = 1
4361 01:57:57.804707 rx_lastpass[0][0][9] = 32
4362 01:57:57.807990 rx_firspass[0][0][10] = 8
4363 01:57:57.811119 rx_lastpass[0][0][10] = 41
4364 01:57:57.811222 rx_firspass[0][0][11] = 1
4365 01:57:57.814512 rx_lastpass[0][0][11] = 32
4366 01:57:57.817885 rx_firspass[0][0][12] = 2
4367 01:57:57.821027 rx_lastpass[0][0][12] = 36
4368 01:57:57.821126 rx_firspass[0][0][13] = 3
4369 01:57:57.824291 rx_lastpass[0][0][13] = 33
4370 01:57:57.827563 rx_firspass[0][0][14] = 2
4371 01:57:57.830852 rx_lastpass[0][0][14] = 37
4372 01:57:57.830953 rx_firspass[0][0][15] = 5
4373 01:57:57.834121 rx_lastpass[0][0][15] = 37
4374 01:57:57.837398 rx_firspass[0][1][0] = 6
4375 01:57:57.837498 rx_lastpass[0][1][0] = 40
4376 01:57:57.840812 rx_firspass[0][1][1] = 5
4377 01:57:57.844285 rx_lastpass[0][1][1] = 38
4378 01:57:57.847803 rx_firspass[0][1][2] = 6
4379 01:57:57.847904 rx_lastpass[0][1][2] = 38
4380 01:57:57.851114 rx_firspass[0][1][3] = -2
4381 01:57:57.854374 rx_lastpass[0][1][3] = 33
4382 01:57:57.854463 rx_firspass[0][1][4] = 5
4383 01:57:57.857580 rx_lastpass[0][1][4] = 39
4384 01:57:57.860670 rx_firspass[0][1][5] = 1
4385 01:57:57.860760 rx_lastpass[0][1][5] = 34
4386 01:57:57.863953 rx_firspass[0][1][6] = 3
4387 01:57:57.867606 rx_lastpass[0][1][6] = 37
4388 01:57:57.871136 rx_firspass[0][1][7] = 3
4389 01:57:57.871227 rx_lastpass[0][1][7] = 38
4390 01:57:57.874438 rx_firspass[0][1][8] = -2
4391 01:57:57.877537 rx_lastpass[0][1][8] = 32
4392 01:57:57.877657 rx_firspass[0][1][9] = 1
4393 01:57:57.880722 rx_lastpass[0][1][9] = 36
4394 01:57:57.884015 rx_firspass[0][1][10] = 7
4395 01:57:57.887402 rx_lastpass[0][1][10] = 43
4396 01:57:57.887506 rx_firspass[0][1][11] = -2
4397 01:57:57.890614 rx_lastpass[0][1][11] = 34
4398 01:57:57.893960 rx_firspass[0][1][12] = 1
4399 01:57:57.894062 rx_lastpass[0][1][12] = 37
4400 01:57:57.897359 rx_firspass[0][1][13] = 2
4401 01:57:57.900882 rx_lastpass[0][1][13] = 35
4402 01:57:57.904121 rx_firspass[0][1][14] = 3
4403 01:57:57.904229 rx_lastpass[0][1][14] = 37
4404 01:57:57.907435 rx_firspass[0][1][15] = 6
4405 01:57:57.910554 rx_lastpass[0][1][15] = 39
4406 01:57:57.910689 rx_firspass[1][0][0] = 5
4407 01:57:57.913970 rx_lastpass[1][0][0] = 39
4408 01:57:57.917492 rx_firspass[1][0][1] = 5
4409 01:57:57.920661 rx_lastpass[1][0][1] = 38
4410 01:57:57.920788 rx_firspass[1][0][2] = 2
4411 01:57:57.924050 rx_lastpass[1][0][2] = 35
4412 01:57:57.927524 rx_firspass[1][0][3] = -1
4413 01:57:57.927653 rx_lastpass[1][0][3] = 33
4414 01:57:57.931128 rx_firspass[1][0][4] = 5
4415 01:57:57.933917 rx_lastpass[1][0][4] = 38
4416 01:57:57.937961 rx_firspass[1][0][5] = 7
4417 01:57:57.938087 rx_lastpass[1][0][5] = 39
4418 01:57:57.940474 rx_firspass[1][0][6] = 7
4419 01:57:57.943904 rx_lastpass[1][0][6] = 40
4420 01:57:57.944021 rx_firspass[1][0][7] = 5
4421 01:57:57.947220 rx_lastpass[1][0][7] = 38
4422 01:57:57.950697 rx_firspass[1][0][8] = 1
4423 01:57:57.950819 rx_lastpass[1][0][8] = 33
4424 01:57:57.953986 rx_firspass[1][0][9] = 1
4425 01:57:57.957380 rx_lastpass[1][0][9] = 32
4426 01:57:57.960797 rx_firspass[1][0][10] = 5
4427 01:57:57.960911 rx_lastpass[1][0][10] = 35
4428 01:57:57.964216 rx_firspass[1][0][11] = 6
4429 01:57:57.967627 rx_lastpass[1][0][11] = 38
4430 01:57:57.967738 rx_firspass[1][0][12] = 6
4431 01:57:57.970604 rx_lastpass[1][0][12] = 38
4432 01:57:57.974111 rx_firspass[1][0][13] = 6
4433 01:57:57.977336 rx_lastpass[1][0][13] = 37
4434 01:57:57.977445 rx_firspass[1][0][14] = 7
4435 01:57:57.980378 rx_lastpass[1][0][14] = 38
4436 01:57:57.983844 rx_firspass[1][0][15] = -3
4437 01:57:57.987417 rx_lastpass[1][0][15] = 30
4438 01:57:57.987537 rx_firspass[1][1][0] = 3
4439 01:57:57.990737 rx_lastpass[1][1][0] = 40
4440 01:57:57.994286 rx_firspass[1][1][1] = 4
4441 01:57:57.994405 rx_lastpass[1][1][1] = 39
4442 01:57:57.997556 rx_firspass[1][1][2] = 0
4443 01:57:58.000824 rx_lastpass[1][1][2] = 36
4444 01:57:58.000943 rx_firspass[1][1][3] = -2
4445 01:57:58.004147 rx_lastpass[1][1][3] = 34
4446 01:57:58.007097 rx_firspass[1][1][4] = 4
4447 01:57:58.010407 rx_lastpass[1][1][4] = 39
4448 01:57:58.010497 rx_firspass[1][1][5] = 5
4449 01:57:58.013816 rx_lastpass[1][1][5] = 40
4450 01:57:58.017121 rx_firspass[1][1][6] = 6
4451 01:57:58.017226 rx_lastpass[1][1][6] = 41
4452 01:57:58.020494 rx_firspass[1][1][7] = 3
4453 01:57:58.023661 rx_lastpass[1][1][7] = 38
4454 01:57:58.023793 rx_firspass[1][1][8] = 0
4455 01:57:58.027419 rx_lastpass[1][1][8] = 34
4456 01:57:58.030240 rx_firspass[1][1][9] = -1
4457 01:57:58.033690 rx_lastpass[1][1][9] = 34
4458 01:57:58.033796 rx_firspass[1][1][10] = 4
4459 01:57:58.037081 rx_lastpass[1][1][10] = 38
4460 01:57:58.040707 rx_firspass[1][1][11] = 5
4461 01:57:58.043650 rx_lastpass[1][1][11] = 40
4462 01:57:58.043755 rx_firspass[1][1][12] = 4
4463 01:57:58.047228 rx_lastpass[1][1][12] = 40
4464 01:57:58.050517 rx_firspass[1][1][13] = 5
4465 01:57:58.050618 rx_lastpass[1][1][13] = 39
4466 01:57:58.054330 rx_firspass[1][1][14] = 5
4467 01:57:58.057235 rx_lastpass[1][1][14] = 40
4468 01:57:58.060159 rx_firspass[1][1][15] = -3
4469 01:57:58.060259 rx_lastpass[1][1][15] = 31
4470 01:57:58.063752 dump params clk_delay
4471 01:57:58.063851 clk_delay[0] = 1
4472 01:57:58.067202 clk_delay[1] = 0
4473 01:57:58.067280 dump params dqs_delay
4474 01:57:58.070343 dqs_delay[0][0] = -2
4475 01:57:58.073626 dqs_delay[0][1] = 0
4476 01:57:58.073747 dqs_delay[1][0] = 0
4477 01:57:58.076981 dqs_delay[1][1] = 0
4478 01:57:58.080222 dump params delay_cell_unit = 735
4479 01:57:58.080311 dump source = 0x0
4480 01:57:58.083826 dump params frequency:1200
4481 01:57:58.086817 dump params rank number:2
4482 01:57:58.086904
4483 01:57:58.086972 dump params write leveling
4484 01:57:58.090363 write leveling[0][0][0] = 0x0
4485 01:57:58.093351 write leveling[0][0][1] = 0x0
4486 01:57:58.097076 write leveling[0][1][0] = 0x0
4487 01:57:58.100470 write leveling[0][1][1] = 0x0
4488 01:57:58.100586 write leveling[1][0][0] = 0x0
4489 01:57:58.103949 write leveling[1][0][1] = 0x0
4490 01:57:58.107166 write leveling[1][1][0] = 0x0
4491 01:57:58.110071 write leveling[1][1][1] = 0x0
4492 01:57:58.110158 dump params cbt_cs
4493 01:57:58.113276 cbt_cs[0][0] = 0x0
4494 01:57:58.113363 cbt_cs[0][1] = 0x0
4495 01:57:58.117013 cbt_cs[1][0] = 0x0
4496 01:57:58.117103 cbt_cs[1][1] = 0x0
4497 01:57:58.120373 dump params cbt_mr12
4498 01:57:58.120461 cbt_mr12[0][0] = 0x0
4499 01:57:58.123805 cbt_mr12[0][1] = 0x0
4500 01:57:58.126932 cbt_mr12[1][0] = 0x0
4501 01:57:58.127020 cbt_mr12[1][1] = 0x0
4502 01:57:58.130352 dump params tx window
4503 01:57:58.130443 tx_center_min[0][0][0] = 0
4504 01:57:58.133658 tx_center_max[0][0][0] = 0
4505 01:57:58.137063 tx_center_min[0][0][1] = 0
4506 01:57:58.140350 tx_center_max[0][0][1] = 0
4507 01:57:58.140441 tx_center_min[0][1][0] = 0
4508 01:57:58.143605 tx_center_max[0][1][0] = 0
4509 01:57:58.146991 tx_center_min[0][1][1] = 0
4510 01:57:58.150290 tx_center_max[0][1][1] = 0
4511 01:57:58.150382 tx_center_min[1][0][0] = 0
4512 01:57:58.153612 tx_center_max[1][0][0] = 0
4513 01:57:58.156975 tx_center_min[1][0][1] = 0
4514 01:57:58.160243 tx_center_max[1][0][1] = 0
4515 01:57:58.160338 tx_center_min[1][1][0] = 0
4516 01:57:58.163679 tx_center_max[1][1][0] = 0
4517 01:57:58.167056 tx_center_min[1][1][1] = 0
4518 01:57:58.167148 tx_center_max[1][1][1] = 0
4519 01:57:58.170400 dump params tx window
4520 01:57:58.173622 tx_win_center[0][0][0] = 0
4521 01:57:58.176806 tx_first_pass[0][0][0] = 0
4522 01:57:58.176898 tx_last_pass[0][0][0] = 0
4523 01:57:58.180217 tx_win_center[0][0][1] = 0
4524 01:57:58.183474 tx_first_pass[0][0][1] = 0
4525 01:57:58.183568 tx_last_pass[0][0][1] = 0
4526 01:57:58.186927 tx_win_center[0][0][2] = 0
4527 01:57:58.190418 tx_first_pass[0][0][2] = 0
4528 01:57:58.193574 tx_last_pass[0][0][2] = 0
4529 01:57:58.193689 tx_win_center[0][0][3] = 0
4530 01:57:58.196892 tx_first_pass[0][0][3] = 0
4531 01:57:58.200537 tx_last_pass[0][0][3] = 0
4532 01:57:58.203532 tx_win_center[0][0][4] = 0
4533 01:57:58.203647 tx_first_pass[0][0][4] = 0
4534 01:57:58.206858 tx_last_pass[0][0][4] = 0
4535 01:57:58.209909 tx_win_center[0][0][5] = 0
4536 01:57:58.213365 tx_first_pass[0][0][5] = 0
4537 01:57:58.213454 tx_last_pass[0][0][5] = 0
4538 01:57:58.216717 tx_win_center[0][0][6] = 0
4539 01:57:58.220190 tx_first_pass[0][0][6] = 0
4540 01:57:58.220305 tx_last_pass[0][0][6] = 0
4541 01:57:58.223412 tx_win_center[0][0][7] = 0
4542 01:57:58.226973 tx_first_pass[0][0][7] = 0
4543 01:57:58.230041 tx_last_pass[0][0][7] = 0
4544 01:57:58.230153 tx_win_center[0][0][8] = 0
4545 01:57:58.233245 tx_first_pass[0][0][8] = 0
4546 01:57:58.236614 tx_last_pass[0][0][8] = 0
4547 01:57:58.236800 tx_win_center[0][0][9] = 0
4548 01:57:58.239929 tx_first_pass[0][0][9] = 0
4549 01:57:58.243324 tx_last_pass[0][0][9] = 0
4550 01:57:58.246557 tx_win_center[0][0][10] = 0
4551 01:57:58.246655 tx_first_pass[0][0][10] = 0
4552 01:57:58.249808 tx_last_pass[0][0][10] = 0
4553 01:57:58.253140 tx_win_center[0][0][11] = 0
4554 01:57:58.256323 tx_first_pass[0][0][11] = 0
4555 01:57:58.256415 tx_last_pass[0][0][11] = 0
4556 01:57:58.259854 tx_win_center[0][0][12] = 0
4557 01:57:58.263025 tx_first_pass[0][0][12] = 0
4558 01:57:58.266365 tx_last_pass[0][0][12] = 0
4559 01:57:58.266457 tx_win_center[0][0][13] = 0
4560 01:57:58.269676 tx_first_pass[0][0][13] = 0
4561 01:57:58.272887 tx_last_pass[0][0][13] = 0
4562 01:57:58.276472 tx_win_center[0][0][14] = 0
4563 01:57:58.276569 tx_first_pass[0][0][14] = 0
4564 01:57:58.279783 tx_last_pass[0][0][14] = 0
4565 01:57:58.283113 tx_win_center[0][0][15] = 0
4566 01:57:58.286490 tx_first_pass[0][0][15] = 0
4567 01:57:58.286589 tx_last_pass[0][0][15] = 0
4568 01:57:58.289741 tx_win_center[0][1][0] = 0
4569 01:57:58.293080 tx_first_pass[0][1][0] = 0
4570 01:57:58.296466 tx_last_pass[0][1][0] = 0
4571 01:57:58.296578 tx_win_center[0][1][1] = 0
4572 01:57:58.299988 tx_first_pass[0][1][1] = 0
4573 01:57:58.302878 tx_last_pass[0][1][1] = 0
4574 01:57:58.306387 tx_win_center[0][1][2] = 0
4575 01:57:58.306487 tx_first_pass[0][1][2] = 0
4576 01:57:58.309634 tx_last_pass[0][1][2] = 0
4577 01:57:58.312950 tx_win_center[0][1][3] = 0
4578 01:57:58.313056 tx_first_pass[0][1][3] = 0
4579 01:57:58.316514 tx_last_pass[0][1][3] = 0
4580 01:57:58.319529 tx_win_center[0][1][4] = 0
4581 01:57:58.322635 tx_first_pass[0][1][4] = 0
4582 01:57:58.322735 tx_last_pass[0][1][4] = 0
4583 01:57:58.326177 tx_win_center[0][1][5] = 0
4584 01:57:58.329422 tx_first_pass[0][1][5] = 0
4585 01:57:58.333279 tx_last_pass[0][1][5] = 0
4586 01:57:58.333368 tx_win_center[0][1][6] = 0
4587 01:57:58.336396 tx_first_pass[0][1][6] = 0
4588 01:57:58.339801 tx_last_pass[0][1][6] = 0
4589 01:57:58.339889 tx_win_center[0][1][7] = 0
4590 01:57:58.343058 tx_first_pass[0][1][7] = 0
4591 01:57:58.346393 tx_last_pass[0][1][7] = 0
4592 01:57:58.349588 tx_win_center[0][1][8] = 0
4593 01:57:58.349675 tx_first_pass[0][1][8] = 0
4594 01:57:58.352797 tx_last_pass[0][1][8] = 0
4595 01:57:58.356345 tx_win_center[0][1][9] = 0
4596 01:57:58.359475 tx_first_pass[0][1][9] = 0
4597 01:57:58.359563 tx_last_pass[0][1][9] = 0
4598 01:57:58.362939 tx_win_center[0][1][10] = 0
4599 01:57:58.366279 tx_first_pass[0][1][10] = 0
4600 01:57:58.366369 tx_last_pass[0][1][10] = 0
4601 01:57:58.369681 tx_win_center[0][1][11] = 0
4602 01:57:58.373098 tx_first_pass[0][1][11] = 0
4603 01:57:58.376216 tx_last_pass[0][1][11] = 0
4604 01:57:58.376390 tx_win_center[0][1][12] = 0
4605 01:57:58.379455 tx_first_pass[0][1][12] = 0
4606 01:57:58.383153 tx_last_pass[0][1][12] = 0
4607 01:57:58.386496 tx_win_center[0][1][13] = 0
4608 01:57:58.389346 tx_first_pass[0][1][13] = 0
4609 01:57:58.389504 tx_last_pass[0][1][13] = 0
4610 01:57:58.392783 tx_win_center[0][1][14] = 0
4611 01:57:58.396065 tx_first_pass[0][1][14] = 0
4612 01:57:58.399394 tx_last_pass[0][1][14] = 0
4613 01:57:58.399556 tx_win_center[0][1][15] = 0
4614 01:57:58.402852 tx_first_pass[0][1][15] = 0
4615 01:57:58.406042 tx_last_pass[0][1][15] = 0
4616 01:57:58.409314 tx_win_center[1][0][0] = 0
4617 01:57:58.409475 tx_first_pass[1][0][0] = 0
4618 01:57:58.412789 tx_last_pass[1][0][0] = 0
4619 01:57:58.415885 tx_win_center[1][0][1] = 0
4620 01:57:58.416044 tx_first_pass[1][0][1] = 0
4621 01:57:58.419591 tx_last_pass[1][0][1] = 0
4622 01:57:58.422901 tx_win_center[1][0][2] = 0
4623 01:57:58.426109 tx_first_pass[1][0][2] = 0
4624 01:57:58.426265 tx_last_pass[1][0][2] = 0
4625 01:57:58.429253 tx_win_center[1][0][3] = 0
4626 01:57:58.432614 tx_first_pass[1][0][3] = 0
4627 01:57:58.432770 tx_last_pass[1][0][3] = 0
4628 01:57:58.436281 tx_win_center[1][0][4] = 0
4629 01:57:58.439099 tx_first_pass[1][0][4] = 0
4630 01:57:58.442658 tx_last_pass[1][0][4] = 0
4631 01:57:58.442815 tx_win_center[1][0][5] = 0
4632 01:57:58.446109 tx_first_pass[1][0][5] = 0
4633 01:57:58.449388 tx_last_pass[1][0][5] = 0
4634 01:57:58.452665 tx_win_center[1][0][6] = 0
4635 01:57:58.452825 tx_first_pass[1][0][6] = 0
4636 01:57:58.455837 tx_last_pass[1][0][6] = 0
4637 01:57:58.459322 tx_win_center[1][0][7] = 0
4638 01:57:58.459478 tx_first_pass[1][0][7] = 0
4639 01:57:58.462708 tx_last_pass[1][0][7] = 0
4640 01:57:58.465993 tx_win_center[1][0][8] = 0
4641 01:57:58.469563 tx_first_pass[1][0][8] = 0
4642 01:57:58.469718 tx_last_pass[1][0][8] = 0
4643 01:57:58.472347 tx_win_center[1][0][9] = 0
4644 01:57:58.475619 tx_first_pass[1][0][9] = 0
4645 01:57:58.478967 tx_last_pass[1][0][9] = 0
4646 01:57:58.479116 tx_win_center[1][0][10] = 0
4647 01:57:58.482605 tx_first_pass[1][0][10] = 0
4648 01:57:58.485947 tx_last_pass[1][0][10] = 0
4649 01:57:58.489004 tx_win_center[1][0][11] = 0
4650 01:57:58.489157 tx_first_pass[1][0][11] = 0
4651 01:57:58.492388 tx_last_pass[1][0][11] = 0
4652 01:57:58.495748 tx_win_center[1][0][12] = 0
4653 01:57:58.499246 tx_first_pass[1][0][12] = 0
4654 01:57:58.499405 tx_last_pass[1][0][12] = 0
4655 01:57:58.502596 tx_win_center[1][0][13] = 0
4656 01:57:58.505850 tx_first_pass[1][0][13] = 0
4657 01:57:58.509228 tx_last_pass[1][0][13] = 0
4658 01:57:58.509388 tx_win_center[1][0][14] = 0
4659 01:57:58.512674 tx_first_pass[1][0][14] = 0
4660 01:57:58.515565 tx_last_pass[1][0][14] = 0
4661 01:57:58.518776 tx_win_center[1][0][15] = 0
4662 01:57:58.518935 tx_first_pass[1][0][15] = 0
4663 01:57:58.522663 tx_last_pass[1][0][15] = 0
4664 01:57:58.525485 tx_win_center[1][1][0] = 0
4665 01:57:58.529183 tx_first_pass[1][1][0] = 0
4666 01:57:58.529336 tx_last_pass[1][1][0] = 0
4667 01:57:58.532043 tx_win_center[1][1][1] = 0
4668 01:57:58.535641 tx_first_pass[1][1][1] = 0
4669 01:57:58.535799 tx_last_pass[1][1][1] = 0
4670 01:57:58.539040 tx_win_center[1][1][2] = 0
4671 01:57:58.542180 tx_first_pass[1][1][2] = 0
4672 01:57:58.545718 tx_last_pass[1][1][2] = 0
4673 01:57:58.545885 tx_win_center[1][1][3] = 0
4674 01:57:58.549095 tx_first_pass[1][1][3] = 0
4675 01:57:58.552361 tx_last_pass[1][1][3] = 0
4676 01:57:58.555730 tx_win_center[1][1][4] = 0
4677 01:57:58.555868 tx_first_pass[1][1][4] = 0
4678 01:57:58.559137 tx_last_pass[1][1][4] = 0
4679 01:57:58.562117 tx_win_center[1][1][5] = 0
4680 01:57:58.562208 tx_first_pass[1][1][5] = 0
4681 01:57:58.565664 tx_last_pass[1][1][5] = 0
4682 01:57:58.568689 tx_win_center[1][1][6] = 0
4683 01:57:58.571850 tx_first_pass[1][1][6] = 0
4684 01:57:58.571938 tx_last_pass[1][1][6] = 0
4685 01:57:58.575380 tx_win_center[1][1][7] = 0
4686 01:57:58.578843 tx_first_pass[1][1][7] = 0
4687 01:57:58.582209 tx_last_pass[1][1][7] = 0
4688 01:57:58.582297 tx_win_center[1][1][8] = 0
4689 01:57:58.585414 tx_first_pass[1][1][8] = 0
4690 01:57:58.588822 tx_last_pass[1][1][8] = 0
4691 01:57:58.588936 tx_win_center[1][1][9] = 0
4692 01:57:58.592062 tx_first_pass[1][1][9] = 0
4693 01:57:58.595559 tx_last_pass[1][1][9] = 0
4694 01:57:58.598924 tx_win_center[1][1][10] = 0
4695 01:57:58.599011 tx_first_pass[1][1][10] = 0
4696 01:57:58.601807 tx_last_pass[1][1][10] = 0
4697 01:57:58.605613 tx_win_center[1][1][11] = 0
4698 01:57:58.608401 tx_first_pass[1][1][11] = 0
4699 01:57:58.608489 tx_last_pass[1][1][11] = 0
4700 01:57:58.611886 tx_win_center[1][1][12] = 0
4701 01:57:58.615329 tx_first_pass[1][1][12] = 0
4702 01:57:58.618605 tx_last_pass[1][1][12] = 0
4703 01:57:58.618692 tx_win_center[1][1][13] = 0
4704 01:57:58.622024 tx_first_pass[1][1][13] = 0
4705 01:57:58.625546 tx_last_pass[1][1][13] = 0
4706 01:57:58.628354 tx_win_center[1][1][14] = 0
4707 01:57:58.628441 tx_first_pass[1][1][14] = 0
4708 01:57:58.631621 tx_last_pass[1][1][14] = 0
4709 01:57:58.634895 tx_win_center[1][1][15] = 0
4710 01:57:58.638672 tx_first_pass[1][1][15] = 0
4711 01:57:58.638762 tx_last_pass[1][1][15] = 0
4712 01:57:58.642015 dump params rx window
4713 01:57:58.645217 rx_firspass[0][0][0] = 0
4714 01:57:58.645304 rx_lastpass[0][0][0] = 0
4715 01:57:58.648400 rx_firspass[0][0][1] = 0
4716 01:57:58.651532 rx_lastpass[0][0][1] = 0
4717 01:57:58.651635 rx_firspass[0][0][2] = 0
4718 01:57:58.655079 rx_lastpass[0][0][2] = 0
4719 01:57:58.658469 rx_firspass[0][0][3] = 0
4720 01:57:58.661644 rx_lastpass[0][0][3] = 0
4721 01:57:58.661738 rx_firspass[0][0][4] = 0
4722 01:57:58.665031 rx_lastpass[0][0][4] = 0
4723 01:57:58.668325 rx_firspass[0][0][5] = 0
4724 01:57:58.668405 rx_lastpass[0][0][5] = 0
4725 01:57:58.671686 rx_firspass[0][0][6] = 0
4726 01:57:58.675058 rx_lastpass[0][0][6] = 0
4727 01:57:58.675136 rx_firspass[0][0][7] = 0
4728 01:57:58.677939 rx_lastpass[0][0][7] = 0
4729 01:57:58.681400 rx_firspass[0][0][8] = 0
4730 01:57:58.681518 rx_lastpass[0][0][8] = 0
4731 01:57:58.685079 rx_firspass[0][0][9] = 0
4732 01:57:58.688086 rx_lastpass[0][0][9] = 0
4733 01:57:58.691324 rx_firspass[0][0][10] = 0
4734 01:57:58.691401 rx_lastpass[0][0][10] = 0
4735 01:57:58.694796 rx_firspass[0][0][11] = 0
4736 01:57:58.698182 rx_lastpass[0][0][11] = 0
4737 01:57:58.698292 rx_firspass[0][0][12] = 0
4738 01:57:58.701291 rx_lastpass[0][0][12] = 0
4739 01:57:58.704409 rx_firspass[0][0][13] = 0
4740 01:57:58.707533 rx_lastpass[0][0][13] = 0
4741 01:57:58.707621 rx_firspass[0][0][14] = 0
4742 01:57:58.711217 rx_lastpass[0][0][14] = 0
4743 01:57:58.714583 rx_firspass[0][0][15] = 0
4744 01:57:58.714673 rx_lastpass[0][0][15] = 0
4745 01:57:58.718045 rx_firspass[0][1][0] = 0
4746 01:57:58.721185 rx_lastpass[0][1][0] = 0
4747 01:57:58.724485 rx_firspass[0][1][1] = 0
4748 01:57:58.724572 rx_lastpass[0][1][1] = 0
4749 01:57:58.727506 rx_firspass[0][1][2] = 0
4750 01:57:58.730818 rx_lastpass[0][1][2] = 0
4751 01:57:58.730916 rx_firspass[0][1][3] = 0
4752 01:57:58.734175 rx_lastpass[0][1][3] = 0
4753 01:57:58.737549 rx_firspass[0][1][4] = 0
4754 01:57:58.737636 rx_lastpass[0][1][4] = 0
4755 01:57:58.740867 rx_firspass[0][1][5] = 0
4756 01:57:58.744052 rx_lastpass[0][1][5] = 0
4757 01:57:58.744140 rx_firspass[0][1][6] = 0
4758 01:57:58.747331 rx_lastpass[0][1][6] = 0
4759 01:57:58.751212 rx_firspass[0][1][7] = 0
4760 01:57:58.753969 rx_lastpass[0][1][7] = 0
4761 01:57:58.754085 rx_firspass[0][1][8] = 0
4762 01:57:58.757678 rx_lastpass[0][1][8] = 0
4763 01:57:58.761074 rx_firspass[0][1][9] = 0
4764 01:57:58.761150 rx_lastpass[0][1][9] = 0
4765 01:57:58.763912 rx_firspass[0][1][10] = 0
4766 01:57:58.767365 rx_lastpass[0][1][10] = 0
4767 01:57:58.767442 rx_firspass[0][1][11] = 0
4768 01:57:58.770718 rx_lastpass[0][1][11] = 0
4769 01:57:58.773952 rx_firspass[0][1][12] = 0
4770 01:57:58.777268 rx_lastpass[0][1][12] = 0
4771 01:57:58.777340 rx_firspass[0][1][13] = 0
4772 01:57:58.780552 rx_lastpass[0][1][13] = 0
4773 01:57:58.783923 rx_firspass[0][1][14] = 0
4774 01:57:58.783995 rx_lastpass[0][1][14] = 0
4775 01:57:58.787316 rx_firspass[0][1][15] = 0
4776 01:57:58.790709 rx_lastpass[0][1][15] = 0
4777 01:57:58.793989 rx_firspass[1][0][0] = 0
4778 01:57:58.794070 rx_lastpass[1][0][0] = 0
4779 01:57:58.797117 rx_firspass[1][0][1] = 0
4780 01:57:58.800882 rx_lastpass[1][0][1] = 0
4781 01:57:58.800955 rx_firspass[1][0][2] = 0
4782 01:57:58.803975 rx_lastpass[1][0][2] = 0
4783 01:57:58.807532 rx_firspass[1][0][3] = 0
4784 01:57:58.807606 rx_lastpass[1][0][3] = 0
4785 01:57:58.810768 rx_firspass[1][0][4] = 0
4786 01:57:58.813825 rx_lastpass[1][0][4] = 0
4787 01:57:58.813896 rx_firspass[1][0][5] = 0
4788 01:57:58.817436 rx_lastpass[1][0][5] = 0
4789 01:57:58.820471 rx_firspass[1][0][6] = 0
4790 01:57:58.820543 rx_lastpass[1][0][6] = 0
4791 01:57:58.824332 rx_firspass[1][0][7] = 0
4792 01:57:58.827452 rx_lastpass[1][0][7] = 0
4793 01:57:58.827531 rx_firspass[1][0][8] = 0
4794 01:57:58.830804 rx_lastpass[1][0][8] = 0
4795 01:57:58.834137 rx_firspass[1][0][9] = 0
4796 01:57:58.837428 rx_lastpass[1][0][9] = 0
4797 01:57:58.837502 rx_firspass[1][0][10] = 0
4798 01:57:58.840893 rx_lastpass[1][0][10] = 0
4799 01:57:58.844104 rx_firspass[1][0][11] = 0
4800 01:57:58.844174 rx_lastpass[1][0][11] = 0
4801 01:57:58.847226 rx_firspass[1][0][12] = 0
4802 01:57:58.850817 rx_lastpass[1][0][12] = 0
4803 01:57:58.853969 rx_firspass[1][0][13] = 0
4804 01:57:58.854059 rx_lastpass[1][0][13] = 0
4805 01:57:58.857469 rx_firspass[1][0][14] = 0
4806 01:57:58.860683 rx_lastpass[1][0][14] = 0
4807 01:57:58.860772 rx_firspass[1][0][15] = 0
4808 01:57:58.864094 rx_lastpass[1][0][15] = 0
4809 01:57:58.867430 rx_firspass[1][1][0] = 0
4810 01:57:58.867518 rx_lastpass[1][1][0] = 0
4811 01:57:58.870580 rx_firspass[1][1][1] = 0
4812 01:57:58.874297 rx_lastpass[1][1][1] = 0
4813 01:57:58.877215 rx_firspass[1][1][2] = 0
4814 01:57:58.877305 rx_lastpass[1][1][2] = 0
4815 01:57:58.880925 rx_firspass[1][1][3] = 0
4816 01:57:58.883780 rx_lastpass[1][1][3] = 0
4817 01:57:58.883869 rx_firspass[1][1][4] = 0
4818 01:57:58.887169 rx_lastpass[1][1][4] = 0
4819 01:57:58.890382 rx_firspass[1][1][5] = 0
4820 01:57:58.890472 rx_lastpass[1][1][5] = 0
4821 01:57:58.893761 rx_firspass[1][1][6] = 0
4822 01:57:58.897088 rx_lastpass[1][1][6] = 0
4823 01:57:58.897178 rx_firspass[1][1][7] = 0
4824 01:57:58.900314 rx_lastpass[1][1][7] = 0
4825 01:57:58.903599 rx_firspass[1][1][8] = 0
4826 01:57:58.903709 rx_lastpass[1][1][8] = 0
4827 01:57:58.907462 rx_firspass[1][1][9] = 0
4828 01:57:58.910284 rx_lastpass[1][1][9] = 0
4829 01:57:58.913542 rx_firspass[1][1][10] = 0
4830 01:57:58.913631 rx_lastpass[1][1][10] = 0
4831 01:57:58.916882 rx_firspass[1][1][11] = 0
4832 01:57:58.920125 rx_lastpass[1][1][11] = 0
4833 01:57:58.920214 rx_firspass[1][1][12] = 0
4834 01:57:58.923803 rx_lastpass[1][1][12] = 0
4835 01:57:58.926845 rx_firspass[1][1][13] = 0
4836 01:57:58.930277 rx_lastpass[1][1][13] = 0
4837 01:57:58.930366 rx_firspass[1][1][14] = 0
4838 01:57:58.933862 rx_lastpass[1][1][14] = 0
4839 01:57:58.936739 rx_firspass[1][1][15] = 0
4840 01:57:58.936829 rx_lastpass[1][1][15] = 0
4841 01:57:58.940379 dump params clk_delay
4842 01:57:58.940468 clk_delay[0] = 0
4843 01:57:58.943808 clk_delay[1] = 0
4844 01:57:58.947453 dump params dqs_delay
4845 01:57:58.947570 dqs_delay[0][0] = 0
4846 01:57:58.950220 dqs_delay[0][1] = 0
4847 01:57:58.950308 dqs_delay[1][0] = 0
4848 01:57:58.953845 dqs_delay[1][1] = 0
4849 01:57:58.956678 dump params delay_cell_unit = 735
4850 01:57:58.956765 dump source = 0x0
4851 01:57:58.960301 dump params frequency:800
4852 01:57:58.963515 dump params rank number:2
4853 01:57:58.963601
4854 01:57:58.963669 dump params write leveling
4855 01:57:58.966788 write leveling[0][0][0] = 0x0
4856 01:57:58.970342 write leveling[0][0][1] = 0x0
4857 01:57:58.973609 write leveling[0][1][0] = 0x0
4858 01:57:58.977083 write leveling[0][1][1] = 0x0
4859 01:57:58.977170 write leveling[1][0][0] = 0x0
4860 01:57:58.980296 write leveling[1][0][1] = 0x0
4861 01:57:58.983302 write leveling[1][1][0] = 0x0
4862 01:57:58.986813 write leveling[1][1][1] = 0x0
4863 01:57:58.986901 dump params cbt_cs
4864 01:57:58.989967 cbt_cs[0][0] = 0x0
4865 01:57:58.990054 cbt_cs[0][1] = 0x0
4866 01:57:58.993178 cbt_cs[1][0] = 0x0
4867 01:57:58.993266 cbt_cs[1][1] = 0x0
4868 01:57:58.997067 dump params cbt_mr12
4869 01:57:58.997154 cbt_mr12[0][0] = 0x0
4870 01:57:58.999972 cbt_mr12[0][1] = 0x0
4871 01:57:59.003212 cbt_mr12[1][0] = 0x0
4872 01:57:59.003298 cbt_mr12[1][1] = 0x0
4873 01:57:59.007013 dump params tx window
4874 01:57:59.010285 tx_center_min[0][0][0] = 0
4875 01:57:59.010372 tx_center_max[0][0][0] = 0
4876 01:57:59.013565 tx_center_min[0][0][1] = 0
4877 01:57:59.016873 tx_center_max[0][0][1] = 0
4878 01:57:59.016960 tx_center_min[0][1][0] = 0
4879 01:57:59.020238 tx_center_max[0][1][0] = 0
4880 01:57:59.023692 tx_center_min[0][1][1] = 0
4881 01:57:59.026794 tx_center_max[0][1][1] = 0
4882 01:57:59.026881 tx_center_min[1][0][0] = 0
4883 01:57:59.030158 tx_center_max[1][0][0] = 0
4884 01:57:59.033840 tx_center_min[1][0][1] = 0
4885 01:57:59.036617 tx_center_max[1][0][1] = 0
4886 01:57:59.036703 tx_center_min[1][1][0] = 0
4887 01:57:59.039940 tx_center_max[1][1][0] = 0
4888 01:57:59.043150 tx_center_min[1][1][1] = 0
4889 01:57:59.046698 tx_center_max[1][1][1] = 0
4890 01:57:59.046785 dump params tx window
4891 01:57:59.049762 tx_win_center[0][0][0] = 0
4892 01:57:59.053527 tx_first_pass[0][0][0] = 0
4893 01:57:59.053619 tx_last_pass[0][0][0] = 0
4894 01:57:59.056608 tx_win_center[0][0][1] = 0
4895 01:57:59.060057 tx_first_pass[0][0][1] = 0
4896 01:57:59.063820 tx_last_pass[0][0][1] = 0
4897 01:57:59.063907 tx_win_center[0][0][2] = 0
4898 01:57:59.066859 tx_first_pass[0][0][2] = 0
4899 01:57:59.070348 tx_last_pass[0][0][2] = 0
4900 01:57:59.070435 tx_win_center[0][0][3] = 0
4901 01:57:59.073298 tx_first_pass[0][0][3] = 0
4902 01:57:59.076827 tx_last_pass[0][0][3] = 0
4903 01:57:59.080054 tx_win_center[0][0][4] = 0
4904 01:57:59.080141 tx_first_pass[0][0][4] = 0
4905 01:57:59.083527 tx_last_pass[0][0][4] = 0
4906 01:57:59.086642 tx_win_center[0][0][5] = 0
4907 01:57:59.090068 tx_first_pass[0][0][5] = 0
4908 01:57:59.090155 tx_last_pass[0][0][5] = 0
4909 01:57:59.093378 tx_win_center[0][0][6] = 0
4910 01:57:59.096457 tx_first_pass[0][0][6] = 0
4911 01:57:59.096545 tx_last_pass[0][0][6] = 0
4912 01:57:59.099944 tx_win_center[0][0][7] = 0
4913 01:57:59.103219 tx_first_pass[0][0][7] = 0
4914 01:57:59.106493 tx_last_pass[0][0][7] = 0
4915 01:57:59.106580 tx_win_center[0][0][8] = 0
4916 01:57:59.109623 tx_first_pass[0][0][8] = 0
4917 01:57:59.112895 tx_last_pass[0][0][8] = 0
4918 01:57:59.116186 tx_win_center[0][0][9] = 0
4919 01:57:59.116274 tx_first_pass[0][0][9] = 0
4920 01:57:59.119512 tx_last_pass[0][0][9] = 0
4921 01:57:59.122981 tx_win_center[0][0][10] = 0
4922 01:57:59.126321 tx_first_pass[0][0][10] = 0
4923 01:57:59.126409 tx_last_pass[0][0][10] = 0
4924 01:57:59.129539 tx_win_center[0][0][11] = 0
4925 01:57:59.132897 tx_first_pass[0][0][11] = 0
4926 01:57:59.132984 tx_last_pass[0][0][11] = 0
4927 01:57:59.136602 tx_win_center[0][0][12] = 0
4928 01:57:59.139704 tx_first_pass[0][0][12] = 0
4929 01:57:59.142991 tx_last_pass[0][0][12] = 0
4930 01:57:59.143081 tx_win_center[0][0][13] = 0
4931 01:57:59.146271 tx_first_pass[0][0][13] = 0
4932 01:57:59.149717 tx_last_pass[0][0][13] = 0
4933 01:57:59.153032 tx_win_center[0][0][14] = 0
4934 01:57:59.156217 tx_first_pass[0][0][14] = 0
4935 01:57:59.156307 tx_last_pass[0][0][14] = 0
4936 01:57:59.159472 tx_win_center[0][0][15] = 0
4937 01:57:59.162861 tx_first_pass[0][0][15] = 0
4938 01:57:59.166047 tx_last_pass[0][0][15] = 0
4939 01:57:59.166136 tx_win_center[0][1][0] = 0
4940 01:57:59.169111 tx_first_pass[0][1][0] = 0
4941 01:57:59.172879 tx_last_pass[0][1][0] = 0
4942 01:57:59.172971 tx_win_center[0][1][1] = 0
4943 01:57:59.176199 tx_first_pass[0][1][1] = 0
4944 01:57:59.179795 tx_last_pass[0][1][1] = 0
4945 01:57:59.183292 tx_win_center[0][1][2] = 0
4946 01:57:59.183384 tx_first_pass[0][1][2] = 0
4947 01:57:59.186212 tx_last_pass[0][1][2] = 0
4948 01:57:59.189483 tx_win_center[0][1][3] = 0
4949 01:57:59.192983 tx_first_pass[0][1][3] = 0
4950 01:57:59.193092 tx_last_pass[0][1][3] = 0
4951 01:57:59.196406 tx_win_center[0][1][4] = 0
4952 01:57:59.199151 tx_first_pass[0][1][4] = 0
4953 01:57:59.199242 tx_last_pass[0][1][4] = 0
4954 01:57:59.203062 tx_win_center[0][1][5] = 0
4955 01:57:59.206212 tx_first_pass[0][1][5] = 0
4956 01:57:59.209127 tx_last_pass[0][1][5] = 0
4957 01:57:59.209228 tx_win_center[0][1][6] = 0
4958 01:57:59.212648 tx_first_pass[0][1][6] = 0
4959 01:57:59.216328 tx_last_pass[0][1][6] = 0
4960 01:57:59.219093 tx_win_center[0][1][7] = 0
4961 01:57:59.219183 tx_first_pass[0][1][7] = 0
4962 01:57:59.222926 tx_last_pass[0][1][7] = 0
4963 01:57:59.225742 tx_win_center[0][1][8] = 0
4964 01:57:59.225832 tx_first_pass[0][1][8] = 0
4965 01:57:59.229198 tx_last_pass[0][1][8] = 0
4966 01:57:59.232472 tx_win_center[0][1][9] = 0
4967 01:57:59.235762 tx_first_pass[0][1][9] = 0
4968 01:57:59.235853 tx_last_pass[0][1][9] = 0
4969 01:57:59.239015 tx_win_center[0][1][10] = 0
4970 01:57:59.242818 tx_first_pass[0][1][10] = 0
4971 01:57:59.245887 tx_last_pass[0][1][10] = 0
4972 01:57:59.245984 tx_win_center[0][1][11] = 0
4973 01:57:59.249178 tx_first_pass[0][1][11] = 0
4974 01:57:59.252503 tx_last_pass[0][1][11] = 0
4975 01:57:59.255867 tx_win_center[0][1][12] = 0
4976 01:57:59.255957 tx_first_pass[0][1][12] = 0
4977 01:57:59.259195 tx_last_pass[0][1][12] = 0
4978 01:57:59.262314 tx_win_center[0][1][13] = 0
4979 01:57:59.265746 tx_first_pass[0][1][13] = 0
4980 01:57:59.265840 tx_last_pass[0][1][13] = 0
4981 01:57:59.269155 tx_win_center[0][1][14] = 0
4982 01:57:59.272299 tx_first_pass[0][1][14] = 0
4983 01:57:59.276161 tx_last_pass[0][1][14] = 0
4984 01:57:59.276252 tx_win_center[0][1][15] = 0
4985 01:57:59.278966 tx_first_pass[0][1][15] = 0
4986 01:57:59.282787 tx_last_pass[0][1][15] = 0
4987 01:57:59.285749 tx_win_center[1][0][0] = 0
4988 01:57:59.285839 tx_first_pass[1][0][0] = 0
4989 01:57:59.289233 tx_last_pass[1][0][0] = 0
4990 01:57:59.292855 tx_win_center[1][0][1] = 0
4991 01:57:59.295937 tx_first_pass[1][0][1] = 0
4992 01:57:59.296027 tx_last_pass[1][0][1] = 0
4993 01:57:59.298961 tx_win_center[1][0][2] = 0
4994 01:57:59.302519 tx_first_pass[1][0][2] = 0
4995 01:57:59.302607 tx_last_pass[1][0][2] = 0
4996 01:57:59.305959 tx_win_center[1][0][3] = 0
4997 01:57:59.309051 tx_first_pass[1][0][3] = 0
4998 01:57:59.312245 tx_last_pass[1][0][3] = 0
4999 01:57:59.312349 tx_win_center[1][0][4] = 0
5000 01:57:59.315996 tx_first_pass[1][0][4] = 0
5001 01:57:59.318993 tx_last_pass[1][0][4] = 0
5002 01:57:59.319100 tx_win_center[1][0][5] = 0
5003 01:57:59.322129 tx_first_pass[1][0][5] = 0
5004 01:57:59.325676 tx_last_pass[1][0][5] = 0
5005 01:57:59.329056 tx_win_center[1][0][6] = 0
5006 01:57:59.329142 tx_first_pass[1][0][6] = 0
5007 01:57:59.331953 tx_last_pass[1][0][6] = 0
5008 01:57:59.335418 tx_win_center[1][0][7] = 0
5009 01:57:59.338598 tx_first_pass[1][0][7] = 0
5010 01:57:59.338685 tx_last_pass[1][0][7] = 0
5011 01:57:59.342448 tx_win_center[1][0][8] = 0
5012 01:57:59.345572 tx_first_pass[1][0][8] = 0
5013 01:57:59.348747 tx_last_pass[1][0][8] = 0
5014 01:57:59.348834 tx_win_center[1][0][9] = 0
5015 01:57:59.352166 tx_first_pass[1][0][9] = 0
5016 01:57:59.355488 tx_last_pass[1][0][9] = 0
5017 01:57:59.355575 tx_win_center[1][0][10] = 0
5018 01:57:59.358943 tx_first_pass[1][0][10] = 0
5019 01:57:59.362270 tx_last_pass[1][0][10] = 0
5020 01:57:59.365404 tx_win_center[1][0][11] = 0
5021 01:57:59.365491 tx_first_pass[1][0][11] = 0
5022 01:57:59.368618 tx_last_pass[1][0][11] = 0
5023 01:57:59.371971 tx_win_center[1][0][12] = 0
5024 01:57:59.375115 tx_first_pass[1][0][12] = 0
5025 01:57:59.375202 tx_last_pass[1][0][12] = 0
5026 01:57:59.378448 tx_win_center[1][0][13] = 0
5027 01:57:59.381775 tx_first_pass[1][0][13] = 0
5028 01:57:59.385214 tx_last_pass[1][0][13] = 0
5029 01:57:59.385304 tx_win_center[1][0][14] = 0
5030 01:57:59.388655 tx_first_pass[1][0][14] = 0
5031 01:57:59.391799 tx_last_pass[1][0][14] = 0
5032 01:57:59.395070 tx_win_center[1][0][15] = 0
5033 01:57:59.398552 tx_first_pass[1][0][15] = 0
5034 01:57:59.398640 tx_last_pass[1][0][15] = 0
5035 01:57:59.401745 tx_win_center[1][1][0] = 0
5036 01:57:59.405050 tx_first_pass[1][1][0] = 0
5037 01:57:59.405137 tx_last_pass[1][1][0] = 0
5038 01:57:59.408956 tx_win_center[1][1][1] = 0
5039 01:57:59.412190 tx_first_pass[1][1][1] = 0
5040 01:57:59.415092 tx_last_pass[1][1][1] = 0
5041 01:57:59.415179 tx_win_center[1][1][2] = 0
5042 01:57:59.418822 tx_first_pass[1][1][2] = 0
5043 01:57:59.422187 tx_last_pass[1][1][2] = 0
5044 01:57:59.422274 tx_win_center[1][1][3] = 0
5045 01:57:59.425497 tx_first_pass[1][1][3] = 0
5046 01:57:59.428588 tx_last_pass[1][1][3] = 0
5047 01:57:59.432281 tx_win_center[1][1][4] = 0
5048 01:57:59.432369 tx_first_pass[1][1][4] = 0
5049 01:57:59.435349 tx_last_pass[1][1][4] = 0
5050 01:57:59.438884 tx_win_center[1][1][5] = 0
5051 01:57:59.442122 tx_first_pass[1][1][5] = 0
5052 01:57:59.442212 tx_last_pass[1][1][5] = 0
5053 01:57:59.445359 tx_win_center[1][1][6] = 0
5054 01:57:59.448571 tx_first_pass[1][1][6] = 0
5055 01:57:59.448659 tx_last_pass[1][1][6] = 0
5056 01:57:59.452144 tx_win_center[1][1][7] = 0
5057 01:57:59.455439 tx_first_pass[1][1][7] = 0
5058 01:57:59.458820 tx_last_pass[1][1][7] = 0
5059 01:57:59.458907 tx_win_center[1][1][8] = 0
5060 01:57:59.462176 tx_first_pass[1][1][8] = 0
5061 01:57:59.465503 tx_last_pass[1][1][8] = 0
5062 01:57:59.465590 tx_win_center[1][1][9] = 0
5063 01:57:59.468887 tx_first_pass[1][1][9] = 0
5064 01:57:59.471991 tx_last_pass[1][1][9] = 0
5065 01:57:59.475362 tx_win_center[1][1][10] = 0
5066 01:57:59.475449 tx_first_pass[1][1][10] = 0
5067 01:57:59.478633 tx_last_pass[1][1][10] = 0
5068 01:57:59.481695 tx_win_center[1][1][11] = 0
5069 01:57:59.485224 tx_first_pass[1][1][11] = 0
5070 01:57:59.485310 tx_last_pass[1][1][11] = 0
5071 01:57:59.488543 tx_win_center[1][1][12] = 0
5072 01:57:59.491903 tx_first_pass[1][1][12] = 0
5073 01:57:59.495306 tx_last_pass[1][1][12] = 0
5074 01:57:59.495394 tx_win_center[1][1][13] = 0
5075 01:57:59.498519 tx_first_pass[1][1][13] = 0
5076 01:57:59.501996 tx_last_pass[1][1][13] = 0
5077 01:57:59.504936 tx_win_center[1][1][14] = 0
5078 01:57:59.508246 tx_first_pass[1][1][14] = 0
5079 01:57:59.508334 tx_last_pass[1][1][14] = 0
5080 01:57:59.512082 tx_win_center[1][1][15] = 0
5081 01:57:59.515371 tx_first_pass[1][1][15] = 0
5082 01:57:59.515482 tx_last_pass[1][1][15] = 0
5083 01:57:59.518201 dump params rx window
5084 01:57:59.521490 rx_firspass[0][0][0] = 0
5085 01:57:59.521593 rx_lastpass[0][0][0] = 0
5086 01:57:59.525172 rx_firspass[0][0][1] = 0
5087 01:57:59.528299 rx_lastpass[0][0][1] = 0
5088 01:57:59.531688 rx_firspass[0][0][2] = 0
5089 01:57:59.531794 rx_lastpass[0][0][2] = 0
5090 01:57:59.534939 rx_firspass[0][0][3] = 0
5091 01:57:59.538062 rx_lastpass[0][0][3] = 0
5092 01:57:59.538166 rx_firspass[0][0][4] = 0
5093 01:57:59.541561 rx_lastpass[0][0][4] = 0
5094 01:57:59.544604 rx_firspass[0][0][5] = 0
5095 01:57:59.544703 rx_lastpass[0][0][5] = 0
5096 01:57:59.547959 rx_firspass[0][0][6] = 0
5097 01:57:59.551317 rx_lastpass[0][0][6] = 0
5098 01:57:59.551421 rx_firspass[0][0][7] = 0
5099 01:57:59.554730 rx_lastpass[0][0][7] = 0
5100 01:57:59.558170 rx_firspass[0][0][8] = 0
5101 01:57:59.561383 rx_lastpass[0][0][8] = 0
5102 01:57:59.561487 rx_firspass[0][0][9] = 0
5103 01:57:59.564663 rx_lastpass[0][0][9] = 0
5104 01:57:59.568018 rx_firspass[0][0][10] = 0
5105 01:57:59.568120 rx_lastpass[0][0][10] = 0
5106 01:57:59.571583 rx_firspass[0][0][11] = 0
5107 01:57:59.574694 rx_lastpass[0][0][11] = 0
5108 01:57:59.574797 rx_firspass[0][0][12] = 0
5109 01:57:59.578226 rx_lastpass[0][0][12] = 0
5110 01:57:59.581411 rx_firspass[0][0][13] = 0
5111 01:57:59.584526 rx_lastpass[0][0][13] = 0
5112 01:57:59.584617 rx_firspass[0][0][14] = 0
5113 01:57:59.587971 rx_lastpass[0][0][14] = 0
5114 01:57:59.591318 rx_firspass[0][0][15] = 0
5115 01:57:59.591394 rx_lastpass[0][0][15] = 0
5116 01:57:59.594627 rx_firspass[0][1][0] = 0
5117 01:57:59.598165 rx_lastpass[0][1][0] = 0
5118 01:57:59.601313 rx_firspass[0][1][1] = 0
5119 01:57:59.601387 rx_lastpass[0][1][1] = 0
5120 01:57:59.604693 rx_firspass[0][1][2] = 0
5121 01:57:59.607983 rx_lastpass[0][1][2] = 0
5122 01:57:59.608070 rx_firspass[0][1][3] = 0
5123 01:57:59.611261 rx_lastpass[0][1][3] = 0
5124 01:57:59.614301 rx_firspass[0][1][4] = 0
5125 01:57:59.614375 rx_lastpass[0][1][4] = 0
5126 01:57:59.617654 rx_firspass[0][1][5] = 0
5127 01:57:59.620977 rx_lastpass[0][1][5] = 0
5128 01:57:59.621066 rx_firspass[0][1][6] = 0
5129 01:57:59.624366 rx_lastpass[0][1][6] = 0
5130 01:57:59.627789 rx_firspass[0][1][7] = 0
5131 01:57:59.627874 rx_lastpass[0][1][7] = 0
5132 01:57:59.631130 rx_firspass[0][1][8] = 0
5133 01:57:59.634571 rx_lastpass[0][1][8] = 0
5134 01:57:59.637547 rx_firspass[0][1][9] = 0
5135 01:57:59.637639 rx_lastpass[0][1][9] = 0
5136 01:57:59.640879 rx_firspass[0][1][10] = 0
5137 01:57:59.644290 rx_lastpass[0][1][10] = 0
5138 01:57:59.644391 rx_firspass[0][1][11] = 0
5139 01:57:59.647385 rx_lastpass[0][1][11] = 0
5140 01:57:59.650737 rx_firspass[0][1][12] = 0
5141 01:57:59.654831 rx_lastpass[0][1][12] = 0
5142 01:57:59.655131 rx_firspass[0][1][13] = 0
5143 01:57:59.657965 rx_lastpass[0][1][13] = 0
5144 01:57:59.661255 rx_firspass[0][1][14] = 0
5145 01:57:59.661570 rx_lastpass[0][1][14] = 0
5146 01:57:59.664315 rx_firspass[0][1][15] = 0
5147 01:57:59.667489 rx_lastpass[0][1][15] = 0
5148 01:57:59.667875 rx_firspass[1][0][0] = 0
5149 01:57:59.671455 rx_lastpass[1][0][0] = 0
5150 01:57:59.674765 rx_firspass[1][0][1] = 0
5151 01:57:59.677867 rx_lastpass[1][0][1] = 0
5152 01:57:59.678244 rx_firspass[1][0][2] = 0
5153 01:57:59.681157 rx_lastpass[1][0][2] = 0
5154 01:57:59.684470 rx_firspass[1][0][3] = 0
5155 01:57:59.684761 rx_lastpass[1][0][3] = 0
5156 01:57:59.687728 rx_firspass[1][0][4] = 0
5157 01:57:59.690807 rx_lastpass[1][0][4] = 0
5158 01:57:59.691006 rx_firspass[1][0][5] = 0
5159 01:57:59.694223 rx_lastpass[1][0][5] = 0
5160 01:57:59.697432 rx_firspass[1][0][6] = 0
5161 01:57:59.697606 rx_lastpass[1][0][6] = 0
5162 01:57:59.700989 rx_firspass[1][0][7] = 0
5163 01:57:59.704111 rx_lastpass[1][0][7] = 0
5164 01:57:59.704266 rx_firspass[1][0][8] = 0
5165 01:57:59.707641 rx_lastpass[1][0][8] = 0
5166 01:57:59.710709 rx_firspass[1][0][9] = 0
5167 01:57:59.714113 rx_lastpass[1][0][9] = 0
5168 01:57:59.714202 rx_firspass[1][0][10] = 0
5169 01:57:59.717304 rx_lastpass[1][0][10] = 0
5170 01:57:59.720882 rx_firspass[1][0][11] = 0
5171 01:57:59.720963 rx_lastpass[1][0][11] = 0
5172 01:57:59.724183 rx_firspass[1][0][12] = 0
5173 01:57:59.727407 rx_lastpass[1][0][12] = 0
5174 01:57:59.730717 rx_firspass[1][0][13] = 0
5175 01:57:59.730818 rx_lastpass[1][0][13] = 0
5176 01:57:59.734064 rx_firspass[1][0][14] = 0
5177 01:57:59.737437 rx_lastpass[1][0][14] = 0
5178 01:57:59.737507 rx_firspass[1][0][15] = 0
5179 01:57:59.740817 rx_lastpass[1][0][15] = 0
5180 01:57:59.743651 rx_firspass[1][1][0] = 0
5181 01:57:59.747391 rx_lastpass[1][1][0] = 0
5182 01:57:59.747461 rx_firspass[1][1][1] = 0
5183 01:57:59.750343 rx_lastpass[1][1][1] = 0
5184 01:57:59.753792 rx_firspass[1][1][2] = 0
5185 01:57:59.753889 rx_lastpass[1][1][2] = 0
5186 01:57:59.756968 rx_firspass[1][1][3] = 0
5187 01:57:59.760535 rx_lastpass[1][1][3] = 0
5188 01:57:59.760610 rx_firspass[1][1][4] = 0
5189 01:57:59.763897 rx_lastpass[1][1][4] = 0
5190 01:57:59.767081 rx_firspass[1][1][5] = 0
5191 01:57:59.767179 rx_lastpass[1][1][5] = 0
5192 01:57:59.770638 rx_firspass[1][1][6] = 0
5193 01:57:59.773633 rx_lastpass[1][1][6] = 0
5194 01:57:59.773736 rx_firspass[1][1][7] = 0
5195 01:57:59.776988 rx_lastpass[1][1][7] = 0
5196 01:57:59.780432 rx_firspass[1][1][8] = 0
5197 01:57:59.780502 rx_lastpass[1][1][8] = 0
5198 01:57:59.783694 rx_firspass[1][1][9] = 0
5199 01:57:59.786997 rx_lastpass[1][1][9] = 0
5200 01:57:59.790551 rx_firspass[1][1][10] = 0
5201 01:57:59.790629 rx_lastpass[1][1][10] = 0
5202 01:57:59.793450 rx_firspass[1][1][11] = 0
5203 01:57:59.797309 rx_lastpass[1][1][11] = 0
5204 01:57:59.797387 rx_firspass[1][1][12] = 0
5205 01:57:59.800620 rx_lastpass[1][1][12] = 0
5206 01:57:59.804001 rx_firspass[1][1][13] = 0
5207 01:57:59.806823 rx_lastpass[1][1][13] = 0
5208 01:57:59.806908 rx_firspass[1][1][14] = 0
5209 01:57:59.810576 rx_lastpass[1][1][14] = 0
5210 01:57:59.813765 rx_firspass[1][1][15] = 0
5211 01:57:59.813844 rx_lastpass[1][1][15] = 0
5212 01:57:59.817112 dump params clk_delay
5213 01:57:59.817186 clk_delay[0] = 0
5214 01:57:59.820533 clk_delay[1] = 0
5215 01:57:59.823725 dump params dqs_delay
5216 01:57:59.823802 dqs_delay[0][0] = 0
5217 01:57:59.827023 dqs_delay[0][1] = 0
5218 01:57:59.827106 dqs_delay[1][0] = 0
5219 01:57:59.830383 dqs_delay[1][1] = 0
5220 01:57:59.833728 dump params delay_cell_unit = 735
5221 01:57:59.833814 mt_set_emi_preloader end
5222 01:57:59.840449 [mt_mem_init] dram size: 0x100000000, rank number: 2
5223 01:57:59.843747 [complex_mem_test] start addr:0x40000000, len:20480
5224 01:57:59.880766 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5225 01:57:59.887141 [complex_mem_test] start addr:0x80000000, len:20480
5226 01:57:59.922794 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5227 01:57:59.929363 [complex_mem_test] start addr:0xc0000000, len:20480
5228 01:57:59.965279 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5229 01:57:59.971678 [complex_mem_test] start addr:0x56000000, len:8192
5230 01:57:59.988259 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5231 01:57:59.991989 ddr_geometry:1
5232 01:57:59.995029 [complex_mem_test] start addr:0x80000000, len:8192
5233 01:58:00.012232 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5234 01:58:00.015395 dram_init: dram init end (result: 0)
5235 01:58:00.021978 Successfully loaded DRAM blobs and ran DRAM calibration
5236 01:58:00.032394 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5237 01:58:00.032499 CBMEM:
5238 01:58:00.035380 IMD: root @ 00000000fffff000 254 entries.
5239 01:58:00.038670 IMD: root @ 00000000ffffec00 62 entries.
5240 01:58:00.045431 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5241 01:58:00.052068 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5242 01:58:00.055372 in-header: 03 a1 00 00 08 00 00 00
5243 01:58:00.058692 in-data: 84 60 60 10 00 00 00 00
5244 01:58:00.062127 Chrome EC: clear events_b mask to 0x0000000020004000
5245 01:58:00.069223 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5246 01:58:00.072553 in-header: 03 fd 00 00 00 00 00 00
5247 01:58:00.072630 in-data:
5248 01:58:00.079146 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5249 01:58:00.079230 CBFS @ 21000 size 3d4000
5250 01:58:00.085805 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5251 01:58:00.089281 CBFS: Locating 'fallback/ramstage'
5252 01:58:00.092129 CBFS: Found @ offset 10d40 size d563
5253 01:58:00.114266 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5254 01:58:00.126310 Accumulated console time in romstage 13621 ms
5255 01:58:00.126393
5256 01:58:00.126459
5257 01:58:00.136080 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5258 01:58:00.139500 ARM64: Exception handlers installed.
5259 01:58:00.139602 ARM64: Testing exception
5260 01:58:00.143253 ARM64: Done test exception
5261 01:58:00.146147 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5262 01:58:00.150000 Manufacturer: ef
5263 01:58:00.153322 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5264 01:58:00.159550 WARNING: RO_VPD is uninitialized or empty.
5265 01:58:00.162936 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5266 01:58:00.166277 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5267 01:58:00.175770 read SPI 0x550600 0x3a00: 4533 us, 3275 KB/s, 26.200 Mbps
5268 01:58:00.178936 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5269 01:58:00.185891 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5270 01:58:00.185980 Enumerating buses...
5271 01:58:00.192636 Show all devs... Before device enumeration.
5272 01:58:00.192723 Root Device: enabled 1
5273 01:58:00.195997 CPU_CLUSTER: 0: enabled 1
5274 01:58:00.196084 CPU: 00: enabled 1
5275 01:58:00.198819 Compare with tree...
5276 01:58:00.202152 Root Device: enabled 1
5277 01:58:00.202252 CPU_CLUSTER: 0: enabled 1
5278 01:58:00.205698 CPU: 00: enabled 1
5279 01:58:00.209027 Root Device scanning...
5280 01:58:00.209113 root_dev_scan_bus for Root Device
5281 01:58:00.212205 CPU_CLUSTER: 0 enabled
5282 01:58:00.215830 root_dev_scan_bus for Root Device done
5283 01:58:00.222711 scan_bus: scanning of bus Root Device took 10690 usecs
5284 01:58:00.222799 done
5285 01:58:00.225920 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5286 01:58:00.229092 Allocating resources...
5287 01:58:00.229179 Reading resources...
5288 01:58:00.232264 Root Device read_resources bus 0 link: 0
5289 01:58:00.239220 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5290 01:58:00.239308 CPU: 00 missing read_resources
5291 01:58:00.246141 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5292 01:58:00.248905 Root Device read_resources bus 0 link: 0 done
5293 01:58:00.252324 Done reading resources.
5294 01:58:00.255903 Show resources in subtree (Root Device)...After reading.
5295 01:58:00.259308 Root Device child on link 0 CPU_CLUSTER: 0
5296 01:58:00.262388 CPU_CLUSTER: 0 child on link 0 CPU: 00
5297 01:58:00.272449 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5298 01:58:00.272538 CPU: 00
5299 01:58:00.275866 Setting resources...
5300 01:58:00.279023 Root Device assign_resources, bus 0 link: 0
5301 01:58:00.282357 CPU_CLUSTER: 0 missing set_resources
5302 01:58:00.285559 Root Device assign_resources, bus 0 link: 0
5303 01:58:00.288877 Done setting resources.
5304 01:58:00.295361 Show resources in subtree (Root Device)...After assigning values.
5305 01:58:00.298763 Root Device child on link 0 CPU_CLUSTER: 0
5306 01:58:00.302324 CPU_CLUSTER: 0 child on link 0 CPU: 00
5307 01:58:00.312354 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5308 01:58:00.312443 CPU: 00
5309 01:58:00.315600 Done allocating resources.
5310 01:58:00.318944 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5311 01:58:00.322160 Enabling resources...
5312 01:58:00.322247 done.
5313 01:58:00.325498 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5314 01:58:00.328766 Initializing devices...
5315 01:58:00.328866 Root Device init ...
5316 01:58:00.331944 mainboard_init: Starting display init.
5317 01:58:00.335379 ADC[4]: Raw value=76102 ID=0
5318 01:58:00.358949 anx7625_power_on_init: Init interface.
5319 01:58:00.361761 anx7625_disable_pd_protocol: Disabled PD feature.
5320 01:58:00.368490 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5321 01:58:00.415341 anx7625_start_dp_work: Secure OCM version=00
5322 01:58:00.418576 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5323 01:58:00.436006 sp_tx_get_edid_block: EDID Block = 1
5324 01:58:00.553188 Extracted contents:
5325 01:58:00.556398 header: 00 ff ff ff ff ff ff 00
5326 01:58:00.559452 serial number: 06 af 5c 14 00 00 00 00 00 1a
5327 01:58:00.563053 version: 01 04
5328 01:58:00.566337 basic params: 95 1a 0e 78 02
5329 01:58:00.569603 chroma info: 99 85 95 55 56 92 28 22 50 54
5330 01:58:00.572832 established: 00 00 00
5331 01:58:00.579312 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5332 01:58:00.582660 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5333 01:58:00.589162 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5334 01:58:00.595868 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5335 01:58:00.602827 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5336 01:58:00.605991 extensions: 00
5337 01:58:00.606084 checksum: ae
5338 01:58:00.606148
5339 01:58:00.608946 Manufacturer: AUO Model 145c Serial Number 0
5340 01:58:00.612369 Made week 0 of 2016
5341 01:58:00.615955 EDID version: 1.4
5342 01:58:00.616048 Digital display
5343 01:58:00.618864 6 bits per primary color channel
5344 01:58:00.618953 DisplayPort interface
5345 01:58:00.622264 Maximum image size: 26 cm x 14 cm
5346 01:58:00.625621 Gamma: 220%
5347 01:58:00.625708 Check DPMS levels
5348 01:58:00.629047 Supported color formats: RGB 4:4:4
5349 01:58:00.632398 First detailed timing is preferred timing
5350 01:58:00.635581 Established timings supported:
5351 01:58:00.638994 Standard timings supported:
5352 01:58:00.639081 Detailed timings
5353 01:58:00.645586 Hex of detail: ce1d56ea50001a3030204600009010000018
5354 01:58:00.649025 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5355 01:58:00.652437 0556 0586 05a6 0640 hborder 0
5356 01:58:00.658780 0300 0304 030a 031a vborder 0
5357 01:58:00.658876 -hsync -vsync
5358 01:58:00.662088 Did detailed timing
5359 01:58:00.665901 Hex of detail: 0000000f0000000000000000000000000020
5360 01:58:00.668750 Manufacturer-specified data, tag 15
5361 01:58:00.675779 Hex of detail: 000000fe0041554f0a202020202020202020
5362 01:58:00.675900 ASCII string: AUO
5363 01:58:00.679133 Hex of detail: 000000fe004231313658414230312e34200a
5364 01:58:00.682488 ASCII string: B116XAB01.4
5365 01:58:00.682615 Checksum
5366 01:58:00.685635 Checksum: 0xae (valid)
5367 01:58:00.692445 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5368 01:58:00.692674 DSI data_rate: 457800000 bps
5369 01:58:00.700011 anx7625_parse_edid: set default k value to 0x3d for panel
5370 01:58:00.703604 anx7625_parse_edid: pixelclock(76300).
5371 01:58:00.706532 hactive(1366), hsync(32), hfp(48), hbp(154)
5372 01:58:00.709799 vactive(768), vsync(6), vfp(4), vbp(16)
5373 01:58:00.713251 anx7625_dsi_config: config dsi.
5374 01:58:00.721277 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5375 01:58:00.742349 anx7625_dsi_config: success to config DSI
5376 01:58:00.745669 anx7625_dp_start: MIPI phy setup OK.
5377 01:58:00.748961 [SSUSB] Setting up USB HOST controller...
5378 01:58:00.752530 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5379 01:58:00.755524 [SSUSB] phy power-on done.
5380 01:58:00.759224 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5381 01:58:00.762558 in-header: 03 fc 01 00 00 00 00 00
5382 01:58:00.762656 in-data:
5383 01:58:00.769436 handle_proto3_response: EC response with error code: 1
5384 01:58:00.769538 SPM: pcm index = 1
5385 01:58:00.772623 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5386 01:58:00.776096 CBFS @ 21000 size 3d4000
5387 01:58:00.782755 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5388 01:58:00.786050 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5389 01:58:00.789582 CBFS: Found @ offset 1e7c0 size 1026
5390 01:58:00.795702 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5391 01:58:00.799099 SPM: binary array size = 2988
5392 01:58:00.802425 SPM: version = pcm_allinone_v1.17.2_20180829
5393 01:58:00.805751 SPM binary loaded in 32 msecs
5394 01:58:00.813886 spm_kick_im_to_fetch: ptr = 000000004021eec2
5395 01:58:00.817351 spm_kick_im_to_fetch: len = 2988
5396 01:58:00.817444 SPM: spm_kick_pcm_to_run
5397 01:58:00.820700 SPM: spm_kick_pcm_to_run done
5398 01:58:00.823626 SPM: spm_init done in 52 msecs
5399 01:58:00.826984 Root Device init finished in 495435 usecs
5400 01:58:00.830495 CPU_CLUSTER: 0 init ...
5401 01:58:00.840489 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5402 01:58:00.843517 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5403 01:58:00.846837 CBFS @ 21000 size 3d4000
5404 01:58:00.850213 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5405 01:58:00.853551 CBFS: Locating 'sspm.bin'
5406 01:58:00.857060 CBFS: Found @ offset 208c0 size 41cb
5407 01:58:00.866822 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5408 01:58:00.874780 CPU_CLUSTER: 0 init finished in 42801 usecs
5409 01:58:00.874887 Devices initialized
5410 01:58:00.878117 Show all devs... After init.
5411 01:58:00.881599 Root Device: enabled 1
5412 01:58:00.881691 CPU_CLUSTER: 0: enabled 1
5413 01:58:00.885090 CPU: 00: enabled 1
5414 01:58:00.888258 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5415 01:58:00.891629 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5416 01:58:00.895046 ELOG: NV offset 0x558000 size 0x1000
5417 01:58:00.902644 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5418 01:58:00.909267 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5419 01:58:00.912536 ELOG: Event(17) added with size 13 at 2024-06-21 01:58:01 UTC
5420 01:58:00.915960 out: cmd=0x121: 03 db 21 01 00 00 00 00
5421 01:58:00.918978 in-header: 03 17 00 00 2c 00 00 00
5422 01:58:00.932322 in-data: 83 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 e9 92 01 00 06 80 00 00 49 0e 03 00 06 80 00 00 43 29 06 00 06 80 00 00 ea 89 07 00
5423 01:58:00.935846 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5424 01:58:00.939126 in-header: 03 19 00 00 08 00 00 00
5425 01:58:00.942486 in-data: a2 e0 47 00 13 00 00 00
5426 01:58:00.945783 Chrome EC: UHEPI supported
5427 01:58:00.952278 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5428 01:58:00.955655 in-header: 03 e1 00 00 08 00 00 00
5429 01:58:00.958790 in-data: 84 20 60 10 00 00 00 00
5430 01:58:00.962450 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5431 01:58:00.968613 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5432 01:58:00.972141 in-header: 03 e1 00 00 08 00 00 00
5433 01:58:00.975567 in-data: 84 20 60 10 00 00 00 00
5434 01:58:00.982375 ELOG: Event(A1) added with size 10 at 2024-06-21 01:58:01 UTC
5435 01:58:00.988685 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5436 01:58:00.992072 ELOG: Event(A0) added with size 9 at 2024-06-21 01:58:01 UTC
5437 01:58:00.998793 elog_add_boot_reason: Logged dev mode boot
5438 01:58:00.998883 Finalize devices...
5439 01:58:01.002225 Devices finalized
5440 01:58:01.005030 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5441 01:58:01.011934 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5442 01:58:01.015215 ELOG: Event(91) added with size 10 at 2024-06-21 01:58:01 UTC
5443 01:58:01.018735 Writing coreboot table at 0xffeda000
5444 01:58:01.025212 0. 0000000000114000-000000000011efff: RAMSTAGE
5445 01:58:01.028573 1. 0000000040000000-000000004023cfff: RAMSTAGE
5446 01:58:01.031520 2. 000000004023d000-00000000545fffff: RAM
5447 01:58:01.035019 3. 0000000054600000-000000005465ffff: BL31
5448 01:58:01.038557 4. 0000000054660000-00000000ffed9fff: RAM
5449 01:58:01.045294 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5450 01:58:01.048232 6. 0000000100000000-000000013fffffff: RAM
5451 01:58:01.051761 Passing 5 GPIOs to payload:
5452 01:58:01.055196 NAME | PORT | POLARITY | VALUE
5453 01:58:01.058171 write protect | 0x00000096 | low | high
5454 01:58:01.064830 EC in RW | 0x000000b1 | high | undefined
5455 01:58:01.068344 EC interrupt | 0x00000097 | low | undefined
5456 01:58:01.074903 TPM interrupt | 0x00000099 | high | undefined
5457 01:58:01.078101 speaker enable | 0x000000af | high | undefined
5458 01:58:01.081357 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5459 01:58:01.084983 in-header: 03 f7 00 00 02 00 00 00
5460 01:58:01.088288 in-data: 04 00
5461 01:58:01.088392 Board ID: 4
5462 01:58:01.091620 ADC[3]: Raw value=215504 ID=1
5463 01:58:01.091725 RAM code: 1
5464 01:58:01.091830 SKU ID: 16
5465 01:58:01.098216 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5466 01:58:01.098301 CBFS @ 21000 size 3d4000
5467 01:58:01.104831 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5468 01:58:01.111268 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 77fe
5469 01:58:01.114665 coreboot table: 940 bytes.
5470 01:58:01.117900 IMD ROOT 0. 00000000fffff000 00001000
5471 01:58:01.121638 IMD SMALL 1. 00000000ffffe000 00001000
5472 01:58:01.124814 CONSOLE 2. 00000000fffde000 00020000
5473 01:58:01.127843 FMAP 3. 00000000fffdd000 0000047c
5474 01:58:01.131005 TIME STAMP 4. 00000000fffdc000 00000910
5475 01:58:01.134524 RAMOOPS 5. 00000000ffedc000 00100000
5476 01:58:01.138090 COREBOOT 6. 00000000ffeda000 00002000
5477 01:58:01.140999 IMD small region:
5478 01:58:01.144520 IMD ROOT 0. 00000000ffffec00 00000400
5479 01:58:01.147816 VBOOT WORK 1. 00000000ffffeb00 00000100
5480 01:58:01.151194 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5481 01:58:01.154620 VPD 3. 00000000ffffea60 0000006c
5482 01:58:01.161143 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5483 01:58:01.168091 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5484 01:58:01.170864 in-header: 03 e1 00 00 08 00 00 00
5485 01:58:01.174351 in-data: 84 20 60 10 00 00 00 00
5486 01:58:01.177721 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5487 01:58:01.181173 CBFS @ 21000 size 3d4000
5488 01:58:01.184398 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5489 01:58:01.187443 CBFS: Locating 'fallback/payload'
5490 01:58:01.196595 CBFS: Found @ offset dc040 size 439a0
5491 01:58:01.284294 read SPI 0xfd078 0x439a0: 84378 us, 3281 KB/s, 26.248 Mbps
5492 01:58:01.287901 Checking segment from ROM address 0x0000000040003a00
5493 01:58:01.294351 Checking segment from ROM address 0x0000000040003a1c
5494 01:58:01.297606 Loading segment from ROM address 0x0000000040003a00
5495 01:58:01.301172 code (compression=0)
5496 01:58:01.311071 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5497 01:58:01.317613 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5498 01:58:01.321145 it's not compressed!
5499 01:58:01.324158 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5500 01:58:01.330944 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5501 01:58:01.338802 Loading segment from ROM address 0x0000000040003a1c
5502 01:58:01.342063 Entry Point 0x0000000080000000
5503 01:58:01.342160 Loaded segments
5504 01:58:01.348568 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5505 01:58:01.352007 Jumping to boot code at 0000000080000000(00000000ffeda000)
5506 01:58:01.361703 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5507 01:58:01.365117 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5508 01:58:01.368650 CBFS @ 21000 size 3d4000
5509 01:58:01.375018 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5510 01:58:01.378521 CBFS: Locating 'fallback/bl31'
5511 01:58:01.381845 CBFS: Found @ offset 36dc0 size 5820
5512 01:58:01.392581 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5513 01:58:01.396095 Checking segment from ROM address 0x0000000040003a00
5514 01:58:01.402390 Checking segment from ROM address 0x0000000040003a1c
5515 01:58:01.405641 Loading segment from ROM address 0x0000000040003a00
5516 01:58:01.408965 code (compression=1)
5517 01:58:01.416100 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5518 01:58:01.425656 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5519 01:58:01.425755 using LZMA
5520 01:58:01.434493 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5521 01:58:01.441337 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5522 01:58:01.444444 Loading segment from ROM address 0x0000000040003a1c
5523 01:58:01.447733 Entry Point 0x0000000054601000
5524 01:58:01.447824 Loaded segments
5525 01:58:01.450921 NOTICE: MT8183 bl31_setup
5526 01:58:01.458261 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5527 01:58:01.461589 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5528 01:58:01.465058 INFO: [DEVAPC] dump DEVAPC registers:
5529 01:58:01.474807 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5530 01:58:01.481728 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5531 01:58:01.491588 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5532 01:58:01.498180 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5533 01:58:01.507880 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5534 01:58:01.514617 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5535 01:58:01.524445 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5536 01:58:01.531044 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5537 01:58:01.540774 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5538 01:58:01.547407 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5539 01:58:01.557603 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5540 01:58:01.564232 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5541 01:58:01.570674 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5542 01:58:01.580492 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5543 01:58:01.587351 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5544 01:58:01.593616 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5545 01:58:01.600417 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5546 01:58:01.610290 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5547 01:58:01.617291 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5548 01:58:01.623838 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5549 01:58:01.630466 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5550 01:58:01.637032 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5551 01:58:01.640934 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5552 01:58:01.643829 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5553 01:58:01.647270 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5554 01:58:01.650237 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5555 01:58:01.653977 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5556 01:58:01.660615 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5557 01:58:01.667019 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5558 01:58:01.667110 WARNING: region 0:
5559 01:58:01.670158 WARNING: apc:0x168, sa:0x0, ea:0xfff
5560 01:58:01.673858 WARNING: region 1:
5561 01:58:01.676933 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5562 01:58:01.677024 WARNING: region 2:
5563 01:58:01.680414 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5564 01:58:01.683780 WARNING: region 3:
5565 01:58:01.687273 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5566 01:58:01.690234 WARNING: region 4:
5567 01:58:01.693640 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5568 01:58:01.693761 WARNING: region 5:
5569 01:58:01.696993 WARNING: apc:0x0, sa:0x0, ea:0x0
5570 01:58:01.700477 WARNING: region 6:
5571 01:58:01.703997 WARNING: apc:0x0, sa:0x0, ea:0x0
5572 01:58:01.704087 WARNING: region 7:
5573 01:58:01.706982 WARNING: apc:0x0, sa:0x0, ea:0x0
5574 01:58:01.713861 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5575 01:58:01.716864 INFO: SPM: enable SPMC mode
5576 01:58:01.720255 NOTICE: spm_boot_init() start
5577 01:58:01.723557 NOTICE: spm_boot_init() end
5578 01:58:01.726838 INFO: BL31: Initializing runtime services
5579 01:58:01.733466 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5580 01:58:01.736903 INFO: BL31: Preparing for EL3 exit to normal world
5581 01:58:01.740037 INFO: Entry point address = 0x80000000
5582 01:58:01.743374 INFO: SPSR = 0x8
5583 01:58:01.764814
5584 01:58:01.764928
5585 01:58:01.765015
5586 01:58:01.765080 Starting depthcharge on Juniper...
5587 01:58:01.765572 end: 2.2.3 depthcharge-start (duration 00:00:25) [common]
5588 01:58:01.765674 start: 2.2.4 bootloader-commands (timeout 00:04:26) [common]
5589 01:58:01.765768 Setting prompt string to ['jacuzzi:']
5590 01:58:01.765851 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:26)
5591 01:58:01.768260
5592 01:58:01.771575 vboot_handoff: creating legacy vboot_handoff structure
5593 01:58:01.771662
5594 01:58:01.775021 ec_init(0): CrosEC protocol v3 supported (544, 544)
5595 01:58:01.775135
5596 01:58:01.778390 Wipe memory regions:
5597 01:58:01.778493
5598 01:58:01.781259 [0x00000040000000, 0x00000054600000)
5599 01:58:01.824208
5600 01:58:01.824304 [0x00000054660000, 0x00000080000000)
5601 01:58:01.915823
5602 01:58:01.915928 [0x000000811994a0, 0x000000ffeda000)
5603 01:58:02.175079
5604 01:58:02.175200 [0x00000100000000, 0x00000140000000)
5605 01:58:02.307187
5606 01:58:02.310541 Initializing XHCI USB controller at 0x11200000.
5607 01:58:02.333542
5608 01:58:02.336978 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5609 01:58:02.337065
5610 01:58:02.337133
5611 01:58:02.337414 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5613 01:58:02.437741 jacuzzi: tftpboot 192.168.201.1 14479198/tftp-deploy-3w3zgrbh/kernel/image.itb 14479198/tftp-deploy-3w3zgrbh/kernel/cmdline
5614 01:58:02.437972 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5615 01:58:02.438070 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:25)
5616 01:58:02.442427 tftpboot 192.168.201.1 14479198/tftp-deploy-3w3zgrbh/kernel/image.itbtp-deploy-3w3zgrbh/kernel/cmdline
5617 01:58:02.442519
5618 01:58:02.442606 Waiting for link
5619 01:58:02.847560
5620 01:58:02.847700 R8152: Initializing
5621 01:58:02.847771
5622 01:58:02.851073 Version 9 (ocp_data = 6010)
5623 01:58:02.851161
5624 01:58:02.854489 R8152: Done initializing
5625 01:58:02.854576
5626 01:58:02.854644 Adding net device
5627 01:58:03.239813
5628 01:58:03.239942 done.
5629 01:58:03.240012
5630 01:58:03.240075 MAC: 00:e0:4c:68:0b:b9
5631 01:58:03.240136
5632 01:58:03.243224 Sending DHCP discover... done.
5633 01:58:03.243312
5634 01:58:03.246591 Waiting for reply... done.
5635 01:58:03.246678
5636 01:58:03.250758 Sending DHCP request... done.
5637 01:58:03.250845
5638 01:58:03.256487 Waiting for reply... done.
5639 01:58:03.256574
5640 01:58:03.256641 My ip is 192.168.201.13
5641 01:58:03.256704
5642 01:58:03.259573 The DHCP server ip is 192.168.201.1
5643 01:58:03.259661
5644 01:58:03.266456 TFTP server IP predefined by user: 192.168.201.1
5645 01:58:03.266544
5646 01:58:03.273440 Bootfile predefined by user: 14479198/tftp-deploy-3w3zgrbh/kernel/image.itb
5647 01:58:03.273528
5648 01:58:03.273597 Sending tftp read request... done.
5649 01:58:03.276354
5650 01:58:03.279741 Waiting for the transfer...
5651 01:58:03.279829
5652 01:58:03.527492 00000000 ################################################################
5653 01:58:03.527632
5654 01:58:03.770593 00080000 ################################################################
5655 01:58:03.770722
5656 01:58:04.015805 00100000 ################################################################
5657 01:58:04.015944
5658 01:58:04.258636 00180000 ################################################################
5659 01:58:04.258767
5660 01:58:04.515595 00200000 ################################################################
5661 01:58:04.515755
5662 01:58:04.760798 00280000 ################################################################
5663 01:58:04.760934
5664 01:58:05.017758 00300000 ################################################################
5665 01:58:05.017891
5666 01:58:05.268571 00380000 ################################################################
5667 01:58:05.268728
5668 01:58:05.540182 00400000 ################################################################
5669 01:58:05.540330
5670 01:58:05.802487 00480000 ################################################################
5671 01:58:05.802622
5672 01:58:06.046868 00500000 ################################################################
5673 01:58:06.047000
5674 01:58:06.320226 00580000 ################################################################
5675 01:58:06.320346
5676 01:58:06.584830 00600000 ################################################################
5677 01:58:06.584962
5678 01:58:06.850383 00680000 ################################################################
5679 01:58:06.850528
5680 01:58:07.096570 00700000 ################################################################
5681 01:58:07.096707
5682 01:58:07.338940 00780000 ################################################################
5683 01:58:07.339077
5684 01:58:07.584234 00800000 ################################################################
5685 01:58:07.584387
5686 01:58:07.839823 00880000 ################################################################
5687 01:58:07.839981
5688 01:58:08.096876 00900000 ################################################################
5689 01:58:08.097031
5690 01:58:08.356273 00980000 ################################################################
5691 01:58:08.356424
5692 01:58:08.617314 00a00000 ################################################################
5693 01:58:08.617477
5694 01:58:08.877001 00a80000 ################################################################
5695 01:58:08.877127
5696 01:58:09.139008 00b00000 ################################################################
5697 01:58:09.139160
5698 01:58:09.382091 00b80000 ################################################################
5699 01:58:09.382215
5700 01:58:09.629133 00c00000 ################################################################
5701 01:58:09.629290
5702 01:58:09.883588 00c80000 ################################################################
5703 01:58:09.883742
5704 01:58:10.122940 00d00000 ################################################################
5705 01:58:10.123076
5706 01:58:10.367173 00d80000 ################################################################
5707 01:58:10.367299
5708 01:58:10.613439 00e00000 ################################################################
5709 01:58:10.613588
5710 01:58:10.858724 00e80000 ################################################################
5711 01:58:10.858846
5712 01:58:11.108524 00f00000 ################################################################
5713 01:58:11.108670
5714 01:58:11.354085 00f80000 ################################################################
5715 01:58:11.354223
5716 01:58:11.600173 01000000 ################################################################
5717 01:58:11.600300
5718 01:58:11.841110 01080000 ################################################################
5719 01:58:11.841243
5720 01:58:12.089248 01100000 ################################################################
5721 01:58:12.089373
5722 01:58:12.332001 01180000 ################################################################
5723 01:58:12.332158
5724 01:58:12.574514 01200000 ################################################################
5725 01:58:12.574659
5726 01:58:12.817476 01280000 ################################################################
5727 01:58:12.817640
5728 01:58:13.071008 01300000 ################################################################
5729 01:58:13.071138
5730 01:58:13.439534 01380000 ################################################################
5731 01:58:13.439681
5732 01:58:13.611152 01400000 ################################################################
5733 01:58:13.611274
5734 01:58:13.866501 01480000 ################################################################
5735 01:58:13.866639
5736 01:58:14.126639 01500000 ################################################################
5737 01:58:14.126765
5738 01:58:14.378422 01580000 ################################################################
5739 01:58:14.378567
5740 01:58:14.625273 01600000 ################################################################
5741 01:58:14.625403
5742 01:58:14.877354 01680000 ################################################################
5743 01:58:14.877474
5744 01:58:15.148969 01700000 ################################################################
5745 01:58:15.149095
5746 01:58:15.410717 01780000 ################################################################
5747 01:58:15.410838
5748 01:58:15.676578 01800000 ################################################################
5749 01:58:15.676733
5750 01:58:15.930892 01880000 ################################################################
5751 01:58:15.931012
5752 01:58:16.202484 01900000 ################################################################
5753 01:58:16.202606
5754 01:58:16.466218 01980000 ################################################################
5755 01:58:16.466345
5756 01:58:16.735212 01a00000 ################################################################
5757 01:58:16.735336
5758 01:58:16.988791 01a80000 ################################################################
5759 01:58:16.988917
5760 01:58:17.246007 01b00000 ################################################################
5761 01:58:17.246129
5762 01:58:17.512516 01b80000 ################################################################
5763 01:58:17.512642
5764 01:58:17.781946 01c00000 ################################################################
5765 01:58:17.782070
5766 01:58:18.054965 01c80000 ################################################################
5767 01:58:18.055130
5768 01:58:18.318068 01d00000 ################################################################
5769 01:58:18.318194
5770 01:58:18.601749 01d80000 ################################################################
5771 01:58:18.601890
5772 01:58:18.843351 01e00000 ########################################################## done.
5773 01:58:18.843469
5774 01:58:18.847166 The bootfile was 31927554 bytes long.
5775 01:58:18.847253
5776 01:58:18.850283 Sending tftp read request... done.
5777 01:58:18.850379
5778 01:58:18.853445 Waiting for the transfer...
5779 01:58:18.853547
5780 01:58:18.853626 00000000 # done.
5781 01:58:18.853702
5782 01:58:18.863641 Command line loaded dynamically from TFTP file: 14479198/tftp-deploy-3w3zgrbh/kernel/cmdline
5783 01:58:18.863765
5784 01:58:18.890472 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14479198/extract-nfsrootfs-vfnpth8r,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5785 01:58:18.890785
5786 01:58:18.890988 Loading FIT.
5787 01:58:18.891178
5788 01:58:18.894058 Image ramdisk-1 has 18742923 bytes.
5789 01:58:18.894392
5790 01:58:18.896857 Image fdt-1 has 57695 bytes.
5791 01:58:18.897192
5792 01:58:18.900376 Image kernel-1 has 13124896 bytes.
5793 01:58:18.900769
5794 01:58:18.907476 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5795 01:58:18.907959
5796 01:58:18.920294 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5797 01:58:18.920704
5798 01:58:18.923989 Choosing best match conf-1 for compat google,juniper-sku16.
5799 01:58:18.929420
5800 01:58:18.933964 Connected to device vid:did:rid of 1ae0:0028:00
5801 01:58:18.942038
5802 01:58:18.945304 tpm_get_response: command 0x17b, return code 0x0
5803 01:58:18.945698
5804 01:58:18.948708 tpm_cleanup: add release locality here.
5805 01:58:18.949107
5806 01:58:18.952081 Shutting down all USB controllers.
5807 01:58:18.952475
5808 01:58:18.955166 Removing current net device
5809 01:58:18.955561
5810 01:58:18.958992 Exiting depthcharge with code 4 at timestamp: 34474185
5811 01:58:18.959386
5812 01:58:18.961802 LZMA decompressing kernel-1 to 0x80193568
5813 01:58:18.962200
5814 01:58:18.968469 LZMA decompressing kernel-1 to 0x40000000
5815 01:58:20.831897
5816 01:58:20.832053 jumping to kernel
5817 01:58:20.832922 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
5818 01:58:20.833043 start: 2.2.5 auto-login-action (timeout 00:04:07) [common]
5819 01:58:20.833128 Setting prompt string to ['Linux version [0-9]']
5820 01:58:20.833207 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5821 01:58:20.833283 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5822 01:58:20.907278
5823 01:58:20.910404 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5824 01:58:20.913991 start: 2.2.5.1 login-action (timeout 00:04:07) [common]
5825 01:58:20.914097 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5826 01:58:20.914175 Setting prompt string to []
5827 01:58:20.914256 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5828 01:58:20.914336 Using line separator: #'\n'#
5829 01:58:20.914398 No login prompt set.
5830 01:58:20.914463 Parsing kernel messages
5831 01:58:20.914520 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5832 01:58:20.914633 [login-action] Waiting for messages, (timeout 00:04:07)
5833 01:58:20.914704 Waiting using forced prompt support (timeout 00:02:03)
5834 01:58:20.933707 [ 0.000000] Linux version 6.1.94-cip23 (KernelCI@build-j239242-arm64-gcc-10-defconfig-arm64-chromebook-c5lwc) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Fri Jun 21 00:04:56 UTC 2024
5835 01:58:20.937286 [ 0.000000] random: crng init done
5836 01:58:20.944268 [ 0.000000] Machine model: Google juniper sku16 board
5837 01:58:20.944356 [ 0.000000] efi: UEFI not found.
5838 01:58:20.953718 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5839 01:58:20.960691 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5840 01:58:20.970587 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5841 01:58:20.973684 [ 0.000000] printk: bootconsole [mtk8250] enabled
5842 01:58:20.982439 [ 0.000000] NUMA: No NUMA configuration found
5843 01:58:20.988622 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5844 01:58:20.995502 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5845 01:58:20.995672 [ 0.000000] Zone ranges:
5846 01:58:21.001674 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5847 01:58:21.004969 [ 0.000000] DMA32 empty
5848 01:58:21.011911 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5849 01:58:21.015216 [ 0.000000] Movable zone start for each node
5850 01:58:21.018646 [ 0.000000] Early memory node ranges
5851 01:58:21.025359 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5852 01:58:21.031756 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5853 01:58:21.038185 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5854 01:58:21.045062 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5855 01:58:21.051404 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5856 01:58:21.058502 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5857 01:58:21.074841 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5858 01:58:21.081242 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5859 01:58:21.087956 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5860 01:58:21.091217 [ 0.000000] psci: probing for conduit method from DT.
5861 01:58:21.097934 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5862 01:58:21.101340 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5863 01:58:21.107990 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5864 01:58:21.111206 [ 0.000000] psci: SMC Calling Convention v1.1
5865 01:58:21.117966 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5866 01:58:21.120894 [ 0.000000] Detected VIPT I-cache on CPU0
5867 01:58:21.127758 [ 0.000000] CPU features: detected: GIC system register CPU interface
5868 01:58:21.134358 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5869 01:58:21.140868 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5870 01:58:21.147526 [ 0.000000] CPU features: detected: ARM erratum 845719
5871 01:58:21.151052 [ 0.000000] alternatives: applying boot alternatives
5872 01:58:21.154459 [ 0.000000] Fallback order for Node 0: 0
5873 01:58:21.161270 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5874 01:58:21.164617 [ 0.000000] Policy zone: Normal
5875 01:58:21.191099 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14479198/extract-nfsrootfs-vfnpth8r,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5876 01:58:21.204223 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5877 01:58:21.214401 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5878 01:58:21.220911 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5879 01:58:21.227558 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5880 01:58:21.230930 <6>[ 0.000000] software IO TLB: area num 8.
5881 01:58:21.257859 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5882 01:58:21.315855 <6>[ 0.000000] Memory: 3896768K/4191232K available (18112K kernel code, 4120K rwdata, 22648K rodata, 8512K init, 616K bss, 261696K reserved, 32768K cma-reserved)
5883 01:58:21.322867 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5884 01:58:21.329034 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5885 01:58:21.332204 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5886 01:58:21.339107 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5887 01:58:21.345610 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5888 01:58:21.348936 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5889 01:58:21.359041 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5890 01:58:21.365877 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5891 01:58:21.368924 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5892 01:58:21.381334 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5893 01:58:21.387477 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5894 01:58:21.391067 <6>[ 0.000000] GICv3: 640 SPIs implemented
5895 01:58:21.394610 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5896 01:58:21.400975 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5897 01:58:21.404426 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5898 01:58:21.410788 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5899 01:58:21.424632 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5900 01:58:21.434341 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5901 01:58:21.440882 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5902 01:58:21.452562 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5903 01:58:21.466023 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5904 01:58:21.472732 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5905 01:58:21.479442 <6>[ 0.009471] Console: colour dummy device 80x25
5906 01:58:21.482905 <6>[ 0.014518] printk: console [tty1] enabled
5907 01:58:21.492798 <6>[ 0.018908] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5908 01:58:21.499649 <6>[ 0.029373] pid_max: default: 32768 minimum: 301
5909 01:58:21.503285 <6>[ 0.034254] LSM: Security Framework initializing
5910 01:58:21.513252 <6>[ 0.039170] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5911 01:58:21.519497 <6>[ 0.046794] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5912 01:58:21.526441 <4>[ 0.055656] cacheinfo: Unable to detect cache hierarchy for CPU 0
5913 01:58:21.536295 <6>[ 0.062286] cblist_init_generic: Setting adjustable number of callback queues.
5914 01:58:21.542462 <6>[ 0.069732] cblist_init_generic: Setting shift to 3 and lim to 1.
5915 01:58:21.549297 <6>[ 0.076083] cblist_init_generic: Setting adjustable number of callback queues.
5916 01:58:21.556232 <6>[ 0.083529] cblist_init_generic: Setting shift to 3 and lim to 1.
5917 01:58:21.559247 <6>[ 0.089927] rcu: Hierarchical SRCU implementation.
5918 01:58:21.565650 <6>[ 0.094953] rcu: Max phase no-delay instances is 1000.
5919 01:58:21.572901 <6>[ 0.102876] EFI services will not be available.
5920 01:58:21.576436 <6>[ 0.107826] smp: Bringing up secondary CPUs ...
5921 01:58:21.586684 <6>[ 0.113072] Detected VIPT I-cache on CPU1
5922 01:58:21.593530 <4>[ 0.113119] cacheinfo: Unable to detect cache hierarchy for CPU 1
5923 01:58:21.600413 <6>[ 0.113127] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5924 01:58:21.606461 <6>[ 0.113157] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5925 01:58:21.609737 <6>[ 0.113641] Detected VIPT I-cache on CPU2
5926 01:58:21.616799 <4>[ 0.113674] cacheinfo: Unable to detect cache hierarchy for CPU 2
5927 01:58:21.623175 <6>[ 0.113678] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5928 01:58:21.630175 <6>[ 0.113692] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5929 01:58:21.633063 <6>[ 0.114137] Detected VIPT I-cache on CPU3
5930 01:58:21.639865 <4>[ 0.114167] cacheinfo: Unable to detect cache hierarchy for CPU 3
5931 01:58:21.649600 <6>[ 0.114172] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5932 01:58:21.656415 <6>[ 0.114183] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5933 01:58:21.659777 <6>[ 0.114758] CPU features: detected: Spectre-v2
5934 01:58:21.662729 <6>[ 0.114768] CPU features: detected: Spectre-BHB
5935 01:58:21.669651 <6>[ 0.114772] CPU features: detected: ARM erratum 858921
5936 01:58:21.672975 <6>[ 0.114777] Detected VIPT I-cache on CPU4
5937 01:58:21.679796 <4>[ 0.114825] cacheinfo: Unable to detect cache hierarchy for CPU 4
5938 01:58:21.686666 <6>[ 0.114833] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5939 01:58:21.693031 <6>[ 0.114841] arch_timer: Enabling local workaround for ARM erratum 858921
5940 01:58:21.699796 <6>[ 0.114852] arch_timer: CPU4: Trapping CNTVCT access
5941 01:58:21.706066 <6>[ 0.114859] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5942 01:58:21.709563 <6>[ 0.115344] Detected VIPT I-cache on CPU5
5943 01:58:21.716259 <4>[ 0.115384] cacheinfo: Unable to detect cache hierarchy for CPU 5
5944 01:58:21.722881 <6>[ 0.115390] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5945 01:58:21.729608 <6>[ 0.115397] arch_timer: Enabling local workaround for ARM erratum 858921
5946 01:58:21.736144 <6>[ 0.115403] arch_timer: CPU5: Trapping CNTVCT access
5947 01:58:21.742789 <6>[ 0.115408] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5948 01:58:21.746479 <6>[ 0.115844] Detected VIPT I-cache on CPU6
5949 01:58:21.753091 <4>[ 0.115891] cacheinfo: Unable to detect cache hierarchy for CPU 6
5950 01:58:21.759680 <6>[ 0.115897] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5951 01:58:21.769199 <6>[ 0.115905] arch_timer: Enabling local workaround for ARM erratum 858921
5952 01:58:21.772513 <6>[ 0.115911] arch_timer: CPU6: Trapping CNTVCT access
5953 01:58:21.779347 <6>[ 0.115916] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5954 01:58:21.782409 <6>[ 0.116445] Detected VIPT I-cache on CPU7
5955 01:58:21.789415 <4>[ 0.116487] cacheinfo: Unable to detect cache hierarchy for CPU 7
5956 01:58:21.795773 <6>[ 0.116494] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5957 01:58:21.807282 <6>[ 0.116501] arch_timer: Enabling local workaround for ARM erratum 858921
5958 01:58:21.809049 <6>[ 0.116507] arch_timer: CPU7: Trapping CNTVCT access
5959 01:58:21.815417 <6>[ 0.116512] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5960 01:58:21.822522 <6>[ 0.116560] smp: Brought up 1 node, 8 CPUs
5961 01:58:21.825435 <6>[ 0.355472] SMP: Total of 8 processors activated.
5962 01:58:21.833853 <6>[ 0.360407] CPU features: detected: 32-bit EL0 Support
5963 01:58:21.835343 <6>[ 0.365787] CPU features: detected: 32-bit EL1 Support
5964 01:58:21.842371 <6>[ 0.371155] CPU features: detected: CRC32 instructions
5965 01:58:21.845807 <6>[ 0.376581] CPU: All CPU(s) started at EL2
5966 01:58:21.852299 <6>[ 0.380918] alternatives: applying system-wide alternatives
5967 01:58:21.859204 <6>[ 0.389032] devtmpfs: initialized
5968 01:58:21.871573 <6>[ 0.397998] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5969 01:58:21.881101 <6>[ 0.407946] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5970 01:58:21.887833 <6>[ 0.415676] pinctrl core: initialized pinctrl subsystem
5971 01:58:21.891278 <6>[ 0.422780] DMI not present or invalid.
5972 01:58:21.898124 <6>[ 0.427147] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5973 01:58:21.907800 <6>[ 0.434054] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5974 01:58:21.914227 <6>[ 0.441582] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5975 01:58:21.924085 <6>[ 0.449831] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5976 01:58:21.927487 <6>[ 0.458008] audit: initializing netlink subsys (disabled)
5977 01:58:21.937507 <5>[ 0.463712] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
5978 01:58:21.944433 <6>[ 0.464680] thermal_sys: Registered thermal governor 'step_wise'
5979 01:58:21.951164 <6>[ 0.471678] thermal_sys: Registered thermal governor 'power_allocator'
5980 01:58:21.953909 <6>[ 0.477976] cpuidle: using governor menu
5981 01:58:21.960718 <6>[ 0.488940] NET: Registered PF_QIPCRTR protocol family
5982 01:58:21.967462 <6>[ 0.494437] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5983 01:58:21.970996 <6>[ 0.501533] ASID allocator initialised with 32768 entries
5984 01:58:21.978588 <6>[ 0.508297] Serial: AMBA PL011 UART driver
5985 01:58:21.988620 <4>[ 0.518674] Trying to register duplicate clock ID: 113
5986 01:58:22.048669 <6>[ 0.574767] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5987 01:58:22.063015 <6>[ 0.589089] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5988 01:58:22.066445 <6>[ 0.598831] KASLR enabled
5989 01:58:22.080755 <6>[ 0.606849] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5990 01:58:22.084229 <6>[ 0.613851] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5991 01:58:22.094041 <6>[ 0.620328] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5992 01:58:22.101609 <6>[ 0.627318] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5993 01:58:22.107399 <6>[ 0.633792] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5994 01:58:22.113587 <6>[ 0.640781] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5995 01:58:22.120393 <6>[ 0.647255] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5996 01:58:22.127484 <6>[ 0.654244] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5997 01:58:22.130309 <6>[ 0.661807] ACPI: Interpreter disabled.
5998 01:58:22.140070 <6>[ 0.669775] iommu: Default domain type: Translated
5999 01:58:22.146961 <6>[ 0.674883] iommu: DMA domain TLB invalidation policy: strict mode
6000 01:58:22.149855 <5>[ 0.681514] SCSI subsystem initialized
6001 01:58:22.156745 <6>[ 0.685931] usbcore: registered new interface driver usbfs
6002 01:58:22.163186 <6>[ 0.691659] usbcore: registered new interface driver hub
6003 01:58:22.166673 <6>[ 0.697200] usbcore: registered new device driver usb
6004 01:58:22.173816 <6>[ 0.703498] pps_core: LinuxPPS API ver. 1 registered
6005 01:58:22.183598 <6>[ 0.708683] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6006 01:58:22.187044 <6>[ 0.718008] PTP clock support registered
6007 01:58:22.190406 <6>[ 0.722259] EDAC MC: Ver: 3.0.0
6008 01:58:22.198264 <6>[ 0.727880] FPGA manager framework
6009 01:58:22.201625 <6>[ 0.731563] Advanced Linux Sound Architecture Driver Initialized.
6010 01:58:22.205135 <6>[ 0.738316] vgaarb: loaded
6011 01:58:22.211673 <6>[ 0.741446] clocksource: Switched to clocksource arch_sys_counter
6012 01:58:22.218292 <5>[ 0.747876] VFS: Disk quotas dquot_6.6.0
6013 01:58:22.225280 <6>[ 0.752051] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6014 01:58:22.228463 <6>[ 0.759225] pnp: PnP ACPI: disabled
6015 01:58:22.236445 <6>[ 0.766100] NET: Registered PF_INET protocol family
6016 01:58:22.242946 <6>[ 0.771324] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6017 01:58:22.254795 <6>[ 0.781225] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6018 01:58:22.261536 <6>[ 0.789978] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6019 01:58:22.271265 <6>[ 0.797929] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6020 01:58:22.277989 <6>[ 0.806164] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6021 01:58:22.284956 <6>[ 0.814265] TCP: Hash tables configured (established 32768 bind 32768)
6022 01:58:22.295050 <6>[ 0.821091] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6023 01:58:22.301436 <6>[ 0.828065] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6024 01:58:22.308096 <6>[ 0.835545] NET: Registered PF_UNIX/PF_LOCAL protocol family
6025 01:58:22.311699 <6>[ 0.841671] RPC: Registered named UNIX socket transport module.
6026 01:58:22.317936 <6>[ 0.847815] RPC: Registered udp transport module.
6027 01:58:22.321299 <6>[ 0.852740] RPC: Registered tcp transport module.
6028 01:58:22.328027 <6>[ 0.857664] RPC: Registered tcp NFSv4.1 backchannel transport module.
6029 01:58:22.334990 <6>[ 0.864316] PCI: CLS 0 bytes, default 64
6030 01:58:22.337852 <6>[ 0.868600] Unpacking initramfs...
6031 01:58:22.363371 <6>[ 0.889570] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6032 01:58:22.373470 <6>[ 0.898347] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6033 01:58:22.376347 <6>[ 0.907269] kvm [1]: IPA Size Limit: 40 bits
6034 01:58:22.383562 <6>[ 0.913635] kvm [1]: vgic-v2@c420000
6035 01:58:22.387034 <6>[ 0.917470] kvm [1]: GIC system register CPU interface enabled
6036 01:58:22.393999 <6>[ 0.923656] kvm [1]: vgic interrupt IRQ18
6037 01:58:22.396922 <6>[ 0.928023] kvm [1]: Hyp mode initialized successfully
6038 01:58:22.404826 <5>[ 0.934386] Initialise system trusted keyrings
6039 01:58:22.411647 <6>[ 0.939235] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6040 01:58:22.419822 <6>[ 0.949219] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6041 01:58:22.426343 <5>[ 0.955681] NFS: Registering the id_resolver key type
6042 01:58:22.429815 <5>[ 0.960994] Key type id_resolver registered
6043 01:58:22.436216 <5>[ 0.965409] Key type id_legacy registered
6044 01:58:22.443227 <6>[ 0.969723] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6045 01:58:22.449582 <6>[ 0.976646] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6046 01:58:22.456191 <6>[ 0.984396] 9p: Installing v9fs 9p2000 file system support
6047 01:58:22.484898 <5>[ 1.013500] Key type asymmetric registered
6048 01:58:22.487346 <5>[ 1.017845] Asymmetric key parser 'x509' registered
6049 01:58:22.497781 <6>[ 1.022999] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6050 01:58:22.501542 <6>[ 1.030621] io scheduler mq-deadline registered
6051 01:58:22.504149 <6>[ 1.035379] io scheduler kyber registered
6052 01:58:22.526636 <6>[ 1.056104] EINJ: ACPI disabled.
6053 01:58:22.533265 <4>[ 1.059860] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6054 01:58:22.571145 <6>[ 1.100391] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6055 01:58:22.579318 <6>[ 1.108869] printk: console [ttyS0] disabled
6056 01:58:22.607447 <6>[ 1.133526] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6057 01:58:22.613718 <6>[ 1.143000] printk: console [ttyS0] enabled
6058 01:58:22.617177 <6>[ 1.143000] printk: console [ttyS0] enabled
6059 01:58:22.623861 <6>[ 1.151921] printk: bootconsole [mtk8250] disabled
6060 01:58:22.627352 <6>[ 1.151921] printk: bootconsole [mtk8250] disabled
6061 01:58:22.637173 <3>[ 1.162457] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6062 01:58:22.643877 <3>[ 1.170841] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6063 01:58:22.673270 <6>[ 1.199245] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6064 01:58:22.679738 <6>[ 1.208898] serial serial0: tty port ttyS1 registered
6065 01:58:22.686586 <6>[ 1.215472] SuperH (H)SCI(F) driver initialized
6066 01:58:22.689380 <6>[ 1.220938] msm_serial: driver initialized
6067 01:58:22.704998 <6>[ 1.231276] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6068 01:58:22.715092 <6>[ 1.239874] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6069 01:58:22.721339 <6>[ 1.248450] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6070 01:58:22.731181 <6>[ 1.257029] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6071 01:58:22.740976 <6>[ 1.265686] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6072 01:58:22.748080 <6>[ 1.274350] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6073 01:58:22.757724 <6>[ 1.283087] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6074 01:58:22.764582 <6>[ 1.291827] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6075 01:58:22.774503 <6>[ 1.300394] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6076 01:58:22.784356 <6>[ 1.309196] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6077 01:58:22.792101 <4>[ 1.321572] cacheinfo: Unable to detect cache hierarchy for CPU 0
6078 01:58:22.801295 <6>[ 1.330924] loop: module loaded
6079 01:58:22.813335 <6>[ 1.342820] vsim1: Bringing 1800000uV into 2700000-2700000uV
6080 01:58:22.831047 <6>[ 1.360736] megasas: 07.719.03.00-rc1
6081 01:58:22.840007 <6>[ 1.369518] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6082 01:58:22.851788 <6>[ 1.380817] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6083 01:58:22.868090 <6>[ 1.397651] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6084 01:58:22.924961 <6>[ 1.447942] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6085 01:58:22.957838 <6>[ 1.487336] Freeing initrd memory: 18300K
6086 01:58:22.972989 <4>[ 1.499192] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6087 01:58:22.979763 <4>[ 1.508421] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.94-cip23 #1
6088 01:58:22.986611 <4>[ 1.515120] Hardware name: Google juniper sku16 board (DT)
6089 01:58:22.989798 <4>[ 1.520859] Call trace:
6090 01:58:22.994027 <4>[ 1.523559] dump_backtrace.part.0+0xe0/0xf0
6091 01:58:22.996329 <4>[ 1.528097] show_stack+0x18/0x30
6092 01:58:22.999732 <4>[ 1.531669] dump_stack_lvl+0x68/0x84
6093 01:58:23.006651 <4>[ 1.535591] dump_stack+0x18/0x34
6094 01:58:23.009563 <4>[ 1.539161] sysfs_warn_dup+0x64/0x80
6095 01:58:23.013018 <4>[ 1.543083] sysfs_do_create_link_sd+0xf0/0x100
6096 01:58:23.016458 <4>[ 1.547868] sysfs_create_link+0x20/0x40
6097 01:58:23.022641 <4>[ 1.552044] bus_add_device+0x68/0x10c
6098 01:58:23.026256 <4>[ 1.556051] device_add+0x364/0x7cc
6099 01:58:23.029247 <4>[ 1.559793] of_device_add+0x44/0x60
6100 01:58:23.035859 <4>[ 1.563628] of_platform_device_create_pdata+0x90/0x120
6101 01:58:23.039329 <4>[ 1.569109] of_platform_bus_create+0x170/0x370
6102 01:58:23.042684 <4>[ 1.573894] of_platform_populate+0x50/0xfc
6103 01:58:23.049345 <4>[ 1.578330] parse_mtd_partitions+0x1dc/0x510
6104 01:58:23.052661 <4>[ 1.582944] mtd_device_parse_register+0xf0/0x2e4
6105 01:58:23.056169 <4>[ 1.587903] spi_nor_probe+0x21c/0x2f0
6106 01:58:23.062434 <4>[ 1.591909] spi_mem_probe+0x6c/0xb0
6107 01:58:23.065786 <4>[ 1.595741] spi_probe+0x84/0xe4
6108 01:58:23.069161 <4>[ 1.599223] really_probe+0xbc/0x2e0
6109 01:58:23.072266 <4>[ 1.603053] __driver_probe_device+0x78/0x11c
6110 01:58:23.078856 <4>[ 1.607665] driver_probe_device+0xd8/0x160
6111 01:58:23.082097 <4>[ 1.612103] __device_attach_driver+0xb8/0x134
6112 01:58:23.085964 <4>[ 1.616802] bus_for_each_drv+0x78/0xd0
6113 01:58:23.089278 <4>[ 1.620893] __device_attach+0xa8/0x1c0
6114 01:58:23.095666 <4>[ 1.624983] device_initial_probe+0x14/0x20
6115 01:58:23.099019 <4>[ 1.629422] bus_probe_device+0x9c/0xa4
6116 01:58:23.102200 <4>[ 1.633512] device_add+0x3d0/0x7cc
6117 01:58:23.105427 <4>[ 1.637254] __spi_add_device+0x78/0x120
6118 01:58:23.111698 <4>[ 1.641432] spi_add_device+0x40/0x7c
6119 01:58:23.115213 <4>[ 1.645350] spi_register_controller+0x610/0xad0
6120 01:58:23.122203 <4>[ 1.650223] devm_spi_register_controller+0x4c/0xa4
6121 01:58:23.125580 <4>[ 1.655356] mtk_spi_probe+0x3f8/0x650
6122 01:58:23.128525 <4>[ 1.659360] platform_probe+0x68/0xe0
6123 01:58:23.132032 <4>[ 1.663279] really_probe+0xbc/0x2e0
6124 01:58:23.135607 <4>[ 1.667109] __driver_probe_device+0x78/0x11c
6125 01:58:23.141740 <4>[ 1.671720] driver_probe_device+0xd8/0x160
6126 01:58:23.145397 <4>[ 1.676158] __driver_attach+0x94/0x19c
6127 01:58:23.148831 <4>[ 1.680249] bus_for_each_dev+0x70/0xd0
6128 01:58:23.152289 <4>[ 1.684339] driver_attach+0x24/0x30
6129 01:58:23.158922 <4>[ 1.688168] bus_add_driver+0x154/0x20c
6130 01:58:23.162270 <4>[ 1.692259] driver_register+0x78/0x130
6131 01:58:23.165130 <4>[ 1.696350] __platform_driver_register+0x28/0x34
6132 01:58:23.172346 <4>[ 1.701309] mtk_spi_driver_init+0x1c/0x28
6133 01:58:23.175690 <4>[ 1.705663] do_one_initcall+0x50/0x1d0
6134 01:58:23.178649 <4>[ 1.709753] kernel_init_freeable+0x21c/0x288
6135 01:58:23.182093 <4>[ 1.714367] kernel_init+0x24/0x12c
6136 01:58:23.188764 <4>[ 1.718112] ret_from_fork+0x10/0x20
6137 01:58:23.197912 <6>[ 1.727016] tun: Universal TUN/TAP device driver, 1.6
6138 01:58:23.200775 <6>[ 1.733294] thunder_xcv, ver 1.0
6139 01:58:23.204178 <6>[ 1.736813] thunder_bgx, ver 1.0
6140 01:58:23.207816 <6>[ 1.740319] nicpf, ver 1.0
6141 01:58:23.218574 <6>[ 1.744684] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6142 01:58:23.222008 <6>[ 1.752171] hns3: Copyright (c) 2017 Huawei Corporation.
6143 01:58:23.225433 <6>[ 1.757769] hclge is initializing
6144 01:58:23.231948 <6>[ 1.761352] e1000: Intel(R) PRO/1000 Network Driver
6145 01:58:23.238665 <6>[ 1.766491] e1000: Copyright (c) 1999-2006 Intel Corporation.
6146 01:58:23.241915 <6>[ 1.772512] e1000e: Intel(R) PRO/1000 Network Driver
6147 01:58:23.249356 <6>[ 1.777733] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6148 01:58:23.255408 <6>[ 1.783927] igb: Intel(R) Gigabit Ethernet Network Driver
6149 01:58:23.262244 <6>[ 1.789585] igb: Copyright (c) 2007-2014 Intel Corporation.
6150 01:58:23.269163 <6>[ 1.795429] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6151 01:58:23.272398 <6>[ 1.801953] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6152 01:58:23.279367 <6>[ 1.808503] sky2: driver version 1.30
6153 01:58:23.285864 <6>[ 1.813767] usbcore: registered new device driver r8152-cfgselector
6154 01:58:23.292697 <6>[ 1.820311] usbcore: registered new interface driver r8152
6155 01:58:23.296283 <6>[ 1.826144] VFIO - User Level meta-driver version: 0.3
6156 01:58:23.304820 <6>[ 1.833986] mtu3 11201000.usb: uwk - reg:0x420, version:101
6157 01:58:23.311537 <4>[ 1.839856] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6158 01:58:23.317968 <6>[ 1.847140] mtu3 11201000.usb: dr_mode: 1, drd: auto
6159 01:58:23.324640 <6>[ 1.852367] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6160 01:58:23.328141 <6>[ 1.858552] mtu3 11201000.usb: usb3-drd: 0
6161 01:58:23.338105 <6>[ 1.864116] mtu3 11201000.usb: xHCI platform device register success...
6162 01:58:23.344850 <4>[ 1.872742] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6163 01:58:23.351249 <6>[ 1.880704] xhci-mtk 11200000.usb: xHCI Host Controller
6164 01:58:23.358208 <6>[ 1.886211] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6165 01:58:23.364893 <6>[ 1.893930] xhci-mtk 11200000.usb: USB3 root hub has no ports
6166 01:58:23.374627 <6>[ 1.899959] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6167 01:58:23.381534 <6>[ 1.909384] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6168 01:58:23.387677 <6>[ 1.915466] xhci-mtk 11200000.usb: xHCI Host Controller
6169 01:58:23.394939 <6>[ 1.920955] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6170 01:58:23.401095 <6>[ 1.928612] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6171 01:58:23.404649 <6>[ 1.935429] hub 1-0:1.0: USB hub found
6172 01:58:23.408129 <6>[ 1.939460] hub 1-0:1.0: 1 port detected
6173 01:58:23.418784 <6>[ 1.944817] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6174 01:58:23.422072 <6>[ 1.953427] hub 2-0:1.0: USB hub found
6175 01:58:23.428609 <3>[ 1.957461] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6176 01:58:23.436086 <6>[ 1.965344] usbcore: registered new interface driver usb-storage
6177 01:58:23.442448 <6>[ 1.971950] usbcore: registered new device driver onboard-usb-hub
6178 01:58:23.459733 <4>[ 1.985561] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6179 01:58:23.468692 <6>[ 1.997838] mt6397-rtc mt6358-rtc: registered as rtc0
6180 01:58:23.478793 <6>[ 2.003318] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-21T01:58:23 UTC (1718935103)
6181 01:58:23.482112 <6>[ 2.013202] i2c_dev: i2c /dev entries driver
6182 01:58:23.493506 <6>[ 2.019629] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6183 01:58:23.503417 <6>[ 2.027950] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6184 01:58:23.506997 <6>[ 2.036856] i2c 4-0058: Fixed dependency cycle(s) with /panel
6185 01:58:23.516651 <6>[ 2.042887] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6186 01:58:23.533327 <6>[ 2.062358] cpu cpu0: EM: created perf domain
6187 01:58:23.543145 <6>[ 2.067871] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6188 01:58:23.549645 <6>[ 2.079151] cpu cpu4: EM: created perf domain
6189 01:58:23.557098 <6>[ 2.086228] sdhci: Secure Digital Host Controller Interface driver
6190 01:58:23.563491 <6>[ 2.092685] sdhci: Copyright(c) Pierre Ossman
6191 01:58:23.570003 <6>[ 2.098091] Synopsys Designware Multimedia Card Interface Driver
6192 01:58:23.576991 <6>[ 2.098629] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6193 01:58:23.580100 <6>[ 2.105141] sdhci-pltfm: SDHCI platform and OF driver helper
6194 01:58:23.588126 <6>[ 2.117683] ledtrig-cpu: registered to indicate activity on CPUs
6195 01:58:23.596330 <6>[ 2.125363] usbcore: registered new interface driver usbhid
6196 01:58:23.599776 <6>[ 2.131203] usbhid: USB HID core driver
6197 01:58:23.610198 <6>[ 2.135519] spi_master spi2: will run message pump with realtime priority
6198 01:58:23.614004 <4>[ 2.135739] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6199 01:58:23.621207 <4>[ 2.149850] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6200 01:58:23.634277 <6>[ 2.154727] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6201 01:58:23.653158 <6>[ 2.172670] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6202 01:58:23.660104 <4>[ 2.181594] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6203 01:58:23.667228 <6>[ 2.194053] cros-ec-spi spi2.0: Chrome EC device registered
6204 01:58:23.673516 <4>[ 2.201818] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6205 01:58:23.686437 <4>[ 2.212673] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6206 01:58:23.693688 <4>[ 2.221387] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6207 01:58:23.705120 <6>[ 2.230949] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6208 01:58:23.711873 <6>[ 2.241223] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6209 01:58:23.720982 <6>[ 2.250356] mmc0: new HS400 MMC card at address 0001
6210 01:58:23.727806 <6>[ 2.256746] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6211 01:58:23.736767 <6>[ 2.266418] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6212 01:58:23.746667 <6>[ 2.275895] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6213 01:58:23.753653 <6>[ 2.283044] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6214 01:58:23.760117 <6>[ 2.289355] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6215 01:58:23.770406 <6>[ 2.290990] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6216 01:58:23.786300 <6>[ 2.308891] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6217 01:58:23.796322 <6>[ 2.309170] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6218 01:58:23.805743 <6>[ 2.332138] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6219 01:58:23.812604 <6>[ 2.333414] NET: Registered PF_PACKET protocol family
6220 01:58:23.816302 <6>[ 2.347737] 9pnet: Installing 9P2000 support
6221 01:58:23.822437 <5>[ 2.352372] Key type dns_resolver registered
6222 01:58:23.826251 <6>[ 2.357387] registered taskstats version 1
6223 01:58:23.832572 <5>[ 2.361756] Loading compiled-in X.509 certificates
6224 01:58:23.839381 <6>[ 2.365543] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6225 01:58:23.880322 <3>[ 2.406791] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6226 01:58:23.912348 <6>[ 2.435561] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6227 01:58:23.923432 <6>[ 2.449886] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6228 01:58:23.933294 <6>[ 2.458465] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6229 01:58:23.940208 <6>[ 2.467187] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6230 01:58:23.950013 <6>[ 2.475885] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6231 01:58:23.959676 <6>[ 2.484536] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6232 01:58:23.966823 <6>[ 2.493081] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6233 01:58:23.976249 <6>[ 2.501661] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6234 01:58:23.982967 <6>[ 2.511322] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6235 01:58:23.989728 <6>[ 2.518861] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6236 01:58:23.996384 <6>[ 2.526165] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6237 01:58:24.007139 <6>[ 2.533488] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6238 01:58:24.013569 <6>[ 2.541009] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6239 01:58:24.016927 <6>[ 2.548546] hub 1-1:1.0: USB hub found
6240 01:58:24.023363 <6>[ 2.552972] hub 1-1:1.0: 3 ports detected
6241 01:58:24.030431 <6>[ 2.558085] panfrost 13040000.gpu: clock rate = 511999970
6242 01:58:24.040053 <6>[ 2.563779] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6243 01:58:24.046826 <6>[ 2.573918] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6244 01:58:24.056812 <6>[ 2.581930] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6245 01:58:24.066516 <6>[ 2.590364] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6246 01:58:24.073276 <6>[ 2.602440] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6247 01:58:24.088032 <6>[ 2.614419] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6248 01:58:24.098023 <6>[ 2.623708] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6249 01:58:24.107904 <6>[ 2.632879] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6250 01:58:24.117836 <6>[ 2.642007] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6251 01:58:24.124654 <6>[ 2.651133] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6252 01:58:24.134546 <6>[ 2.660434] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6253 01:58:24.144220 <6>[ 2.669734] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6254 01:58:24.154225 <6>[ 2.679207] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6255 01:58:24.164134 <6>[ 2.688680] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6256 01:58:24.173747 <6>[ 2.697806] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6257 01:58:24.244023 <6>[ 2.770521] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6258 01:58:24.254051 <6>[ 2.779423] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6259 01:58:24.264755 <6>[ 2.791177] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6260 01:58:24.335230 <6>[ 2.861483] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6261 01:58:24.961561 <6>[ 3.045715] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6262 01:58:24.971466 <4>[ 3.149546] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6263 01:58:24.977581 <4>[ 3.149555] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6264 01:58:24.984555 <6>[ 3.186506] r8152 1-1.2:1.0 eth0: v1.12.13
6265 01:58:24.990948 <6>[ 3.265477] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6266 01:58:24.997444 <6>[ 3.471197] Console: switching to colour frame buffer device 170x48
6267 01:58:25.004383 <6>[ 3.531829] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6268 01:58:25.025786 <6>[ 3.549268] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6269 01:58:25.045360 <6>[ 3.568706] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6270 01:58:25.055067 <6>[ 3.581285] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6271 01:58:25.062035 <6>[ 3.589515] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6272 01:58:25.075398 <6>[ 3.597589] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6273 01:58:25.093780 <6>[ 3.616681] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6274 01:58:26.258513 <6>[ 4.788512] r8152 1-1.2:1.0 eth0: carrier on
6275 01:58:28.655865 <5>[ 4.809483] Sending DHCP requests .., OK
6276 01:58:28.662725 <6>[ 7.189792] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6277 01:58:28.665953 <6>[ 7.198247] IP-Config: Complete:
6278 01:58:28.678786 <6>[ 7.201815] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6279 01:58:28.689110 <6>[ 7.212714] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6280 01:58:28.700950 <6>[ 7.226997] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6281 01:58:28.708841 <6>[ 7.227008] nameserver0=192.168.201.1
6282 01:58:28.716761 <6>[ 7.246781] clk: Disabling unused clocks
6283 01:58:28.721752 <6>[ 7.254730] ALSA device list:
6284 01:58:28.731037 <6>[ 7.260768] No soundcards found.
6285 01:58:28.740061 <6>[ 7.269757] Freeing unused kernel memory: 8512K
6286 01:58:28.747407 <6>[ 7.276836] Run /init as init process
6287 01:58:28.758446 Loading, please wait...
6288 01:58:28.788937 Starting systemd-udevd version 252.22-1~deb12u1
6289 01:58:29.096529 <3>[ 7.626093] mtk-scp 10500000.scp: invalid resource
6290 01:58:29.106343 <6>[ 7.632477] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6291 01:58:29.119857 <6>[ 7.649757] remoteproc remoteproc0: scp is available
6292 01:58:29.126795 <3>[ 7.652614] thermal_sys: Failed to find 'trips' node
6293 01:58:29.133540 <4>[ 7.655129] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6294 01:58:29.140138 <3>[ 7.660223] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6295 01:58:29.149986 <3>[ 7.660242] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6296 01:58:29.156484 <4>[ 7.660247] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6297 01:58:29.166988 <6>[ 7.662954] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6298 01:58:29.170382 <3>[ 7.663002] thermal_sys: Failed to find 'trips' node
6299 01:58:29.180240 <3>[ 7.663006] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6300 01:58:29.187095 <3>[ 7.663011] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6301 01:58:29.196962 <4>[ 7.663014] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6302 01:58:29.206807 <6>[ 7.665499] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6303 01:58:29.213344 <6>[ 7.668928] remoteproc remoteproc0: powering up scp
6304 01:58:29.223539 <4>[ 7.694754] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6305 01:58:29.233315 <4>[ 7.701540] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6306 01:58:29.243329 <3>[ 7.701948] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6307 01:58:29.249923 <3>[ 7.701969] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6308 01:58:29.259897 <3>[ 7.701979] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6309 01:58:29.266708 <3>[ 7.707710] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6310 01:58:29.273655 <3>[ 7.714136] remoteproc remoteproc0: request_firmware failed: -2
6311 01:58:29.283599 <3>[ 7.722616] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6312 01:58:29.293510 <6>[ 7.754064] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6313 01:58:29.300561 <4>[ 7.758156] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6314 01:58:29.307022 <4>[ 7.758311] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6315 01:58:29.316992 <3>[ 7.759671] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6316 01:58:29.326702 <3>[ 7.768442] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6317 01:58:29.336689 <6>[ 7.774797] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6318 01:58:29.347019 <3>[ 7.776744] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6319 01:58:29.353197 <3>[ 7.785184] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6320 01:58:29.363755 <6>[ 7.786510] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6321 01:58:29.370330 <3>[ 7.794167] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6322 01:58:29.385377 <3>[ 7.802327] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6323 01:58:29.388839 <6>[ 7.805922] Bluetooth: Core ver 2.22
6324 01:58:29.395761 <6>[ 7.806134] NET: Registered PF_BLUETOOTH protocol family
6325 01:58:29.402084 <6>[ 7.806136] Bluetooth: HCI device and connection manager initialized
6326 01:58:29.405620 <6>[ 7.806149] Bluetooth: HCI socket layer initialized
6327 01:58:29.413101 <6>[ 7.806154] Bluetooth: L2CAP socket layer initialized
6328 01:58:29.419397 <6>[ 7.806171] Bluetooth: SCO socket layer initialized
6329 01:58:29.426197 <3>[ 7.814944] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6330 01:58:29.439497 <3>[ 7.815560] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6331 01:58:29.445811 <3>[ 7.816932] elan_i2c 2-0015: Error applying setting, reverse things back
6332 01:58:29.452772 <6>[ 7.835190] mc: Linux media interface: v0.10
6333 01:58:29.459473 <5>[ 7.852681] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6334 01:58:29.466107 <6>[ 7.877357] cs_system_cfg: CoreSight Configuration manager initialised
6335 01:58:29.472517 <6>[ 7.889080] videodev: Linux video capture interface: v2.00
6336 01:58:29.479349 <5>[ 7.893010] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6337 01:58:29.489229 <6>[ 7.897598] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6338 01:58:29.495590 <6>[ 7.909197] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6339 01:58:29.503143 <5>[ 7.920244] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6340 01:58:29.513843 <6>[ 7.923491] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6341 01:58:29.523566 <4>[ 7.928983] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6342 01:58:29.530442 <6>[ 7.940927] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6343 01:58:29.533802 <6>[ 7.942596] cfg80211: failed to load regulatory.db
6344 01:58:29.543467 Begin: Loading essential drivers<6>[ 7.942890] Bluetooth: HCI UART driver ver 2.3
6345 01:58:29.543560 ... done.
6346 01:58:29.553346 Begin: Running /scri<6>[ 7.948165] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6347 01:58:29.556871 pts/init-premount ... done.
6348 01:58:29.563288 Beg<6>[ 7.948240] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6349 01:58:29.570166 in: Mounting root file system ..<6>[ 7.953243] Bluetooth: HCI UART protocol H4 registered
6350 01:58:29.583115 . Begin: Running /scripts/nfs-to<6>[ 7.961841] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6351 01:58:29.583205 p ... done.
6352 01:58:29.596625 Begin: Running /scr<3>[ 7.962240] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6353 01:58:29.606448 ipts/nfs-premount ... Waiting up<6>[ 7.962681] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6354 01:58:29.616265 to 60 secs for any ethernet to <6>[ 7.962751] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6355 01:58:29.623797 <3>[ 7.963181] debugfs: File 'Playback' in directory 'dapm' already present!
6356 01:58:29.630600 become available<3>[ 7.963192] debugfs: File 'Capture' in directory 'dapm' already present!
6357 01:58:29.630687
6358 01:58:29.640511 Device /sys/cl<6>[ 7.963400] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6359 01:58:29.643847 ass/net/eth0 found
6360 01:58:29.643936 done.
6361 01:58:29.653957 Begin: Waiting up to <6>[ 7.963769] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6362 01:58:29.667338 180 secs for any network device <6>[ 7.964851] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6363 01:58:29.667432 to become available ... done.
6364 01:58:29.673638 <6>[ 7.974565] Bluetooth: HCI UART protocol LL registered
6365 01:58:29.684551 <6>[ 7.981288] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6366 01:58:29.690972 <6>[ 7.985740] Bluetooth: HCI UART protocol Three-wire (H5) registered
6367 01:58:29.705621 <6>[ 7.990482] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6368 01:58:29.712648 <6>[ 7.990833] usbcore: registered new interface driver uvcvideo
6369 01:58:29.723854 <6>[ 7.993855] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6370 01:58:29.730281 <6>[ 8.000921] Bluetooth: HCI UART protocol Broadcom registered
6371 01:58:29.740748 <6>[ 8.006443] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6372 01:58:29.747730 <6>[ 8.013186] Bluetooth: HCI UART protocol QCA registered
6373 01:58:29.755103 <6>[ 8.014166] Bluetooth: hci0: setting up ROME/QCA6390
6374 01:58:29.765057 IP-Config: eth0 hardware address<6>[ 8.043440] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6375 01:58:29.771375 <6>[ 8.047960] Bluetooth: HCI UART protocol Marvell registered
6376 01:58:29.781374 00:e0:4c:68:0b:b9 mtu 1500 DHCP<6>[ 8.056840] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6377 01:58:29.781498
6378 01:58:29.791340 IP-Config: eth<4>[ 8.142865] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6379 01:58:29.797907 <4>[ 8.142865] Fallback method does not support PEC.
6380 01:58:29.801132 0 complete (dhcp from 192.168.201.1):
6381 01:58:29.814521 address:<6>[ 8.149898] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6382 01:58:29.824350 192.168.201.13 broadcast: 192.168.201.255 ne<3>[ 8.159487] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6383 01:58:29.827807 tmask: 255.255.255.0
6384 01:58:29.834147 gatewa<3>[ 8.282267] Bluetooth: hci0: Frame reassembly failed (-84)
6385 01:58:29.844477 y: 192.168.201.1 dns0 : 1<3>[ 8.289516] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6386 01:58:29.857605 92.168.201.1 dns1 : 0.0.0.0<6>[ 8.313243] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6387 01:58:29.857694
6388 01:58:29.864030 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-0
6389 01:58:29.870670 domain : lava-rack
6390 01:58:29.874138 rootserver: 192.168.201.1 rootpath:
6391 01:58:29.874223 filename :
6392 01:58:29.986381 done.
6393 01:58:29.989817 Begin: Running /scripts/nfs-bottom ... done.
6394 01:58:30.011807 Begin: Running /scripts/init-bottom ... done.
6395 01:58:30.024311 <6>[ 8.554109] Bluetooth: hci0: QCA Product ID :0x00000008
6396 01:58:30.034282 <6>[ 8.564218] Bluetooth: hci0: QCA SOC Version :0x00000044
6397 01:58:30.043305 <6>[ 8.572931] Bluetooth: hci0: QCA ROM Version :0x00000302
6398 01:58:30.052001 <6>[ 8.581768] Bluetooth: hci0: QCA Patch Version:0x00000111
6399 01:58:30.061500 <6>[ 8.590966] Bluetooth: hci0: QCA controller version 0x00440302
6400 01:58:30.074270 <6>[ 8.600809] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6401 01:58:30.084868 <4>[ 8.611316] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6402 01:58:30.097472 <3>[ 8.623737] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6403 01:58:30.105111 <3>[ 8.634701] Bluetooth: hci0: QCA Failed to download patch (-2)
6404 01:58:30.389402 <6>[ 8.915664] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6405 01:58:30.467223 <4>[ 8.996685] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6406 01:58:30.489711 <4>[ 9.016000] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6407 01:58:30.505017 <4>[ 9.031623] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6408 01:58:30.515769 <4>[ 9.045271] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6409 01:58:31.361158 <6>[ 9.891012] NET: Registered PF_INET6 protocol family
6410 01:58:31.373957 <6>[ 9.903758] Segment Routing with IPv6
6411 01:58:31.380746 <6>[ 9.909549] In-situ OAM (IOAM) with IPv6
6412 01:58:31.547150 <30>[ 10.049922] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6413 01:58:31.568487 <30>[ 10.097887] systemd[1]: Detected architecture arm64.
6414 01:58:31.577685
6415 01:58:31.581012 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6416 01:58:31.581098
6417 01:58:31.604653 <30>[ 10.134030] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6418 01:58:32.631871 <30>[ 11.158403] systemd[1]: Queued start job for default target graphical.target.
6419 01:58:32.669074 <30>[ 11.195081] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6420 01:58:32.681240 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6421 01:58:32.701349 <30>[ 11.227751] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6422 01:58:32.715265 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6423 01:58:32.733692 <30>[ 11.260046] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6424 01:58:32.747924 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6425 01:58:32.768680 <30>[ 11.295202] systemd[1]: Created slice user.slice - User and Session Slice.
6426 01:58:32.781427 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6427 01:58:32.802819 <30>[ 11.326043] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6428 01:58:32.816263 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6429 01:58:32.838950 <30>[ 11.361859] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6430 01:58:32.851467 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6431 01:58:32.877375 <30>[ 11.393850] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6432 01:58:32.897186 <30>[ 11.423278] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6433 01:58:32.904815 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6434 01:58:32.923217 <30>[ 11.449672] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6435 01:58:32.936203 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6436 01:58:32.955430 <30>[ 11.481724] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6437 01:58:32.969801 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6438 01:58:32.983939 <30>[ 11.513714] systemd[1]: Reached target paths.target - Path Units.
6439 01:58:32.999424 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6440 01:58:33.015150 <30>[ 11.541633] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6441 01:58:33.027975 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6442 01:58:33.040107 <30>[ 11.569605] systemd[1]: Reached target slices.target - Slice Units.
6443 01:58:33.054506 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6444 01:58:33.067969 <30>[ 11.597653] systemd[1]: Reached target swap.target - Swaps.
6445 01:58:33.078504 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6446 01:58:33.099269 <30>[ 11.625700] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6447 01:58:33.112570 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6448 01:58:33.131635 <30>[ 11.658072] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6449 01:58:33.145360 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6450 01:58:33.165832 <30>[ 11.692238] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6451 01:58:33.179364 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6452 01:58:33.196814 <30>[ 11.723129] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6453 01:58:33.211142 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6454 01:58:33.227862 <30>[ 11.754393] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6455 01:58:33.240439 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6456 01:58:33.261447 <30>[ 11.787323] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6457 01:58:33.274727 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6458 01:58:33.293971 <30>[ 11.820213] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6459 01:58:33.307752 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6460 01:58:33.323692 <30>[ 11.850237] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6461 01:58:33.336746 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6462 01:58:33.380022 <30>[ 11.906262] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6463 01:58:33.391009 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6464 01:58:33.412423 <30>[ 11.938481] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6465 01:58:33.425534 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6466 01:58:33.446847 <30>[ 11.973361] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6467 01:58:33.460011 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6468 01:58:33.482635 <30>[ 12.002087] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6469 01:58:33.524716 <30>[ 12.050725] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6470 01:58:33.537592 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6471 01:58:33.561777 <30>[ 12.088127] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6472 01:58:33.573420 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6473 01:58:33.595158 <30>[ 12.121330] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6474 01:58:33.605682 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6475 01:58:33.627770 <30>[ 12.154103] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6476 01:58:33.642383 Starting [0;1;39mmodprobe@drm.service<6>[ 12.169216] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6477 01:58:33.646127 [0m - Load Kernel Module drm...
6478 01:58:33.684759 <30>[ 12.210702] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6479 01:58:33.696859 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6480 01:58:33.722033 <30>[ 12.248414] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6481 01:58:33.732942 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6482 01:58:33.758872 <6>[ 12.288317] fuse: init (API version 7.37)
6483 01:58:33.776127 <30>[ 12.302446] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6484 01:58:33.788820 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6485 01:58:33.819297 <30>[ 12.345348] systemd[1]: Starting systemd-journald.service - Journal Service...
6486 01:58:33.829347 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6487 01:58:33.854441 <30>[ 12.380836] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6488 01:58:33.865285 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6489 01:58:33.890824 <30>[ 12.414030] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6490 01:58:33.901752 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6491 01:58:33.923642 <30>[ 12.449624] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6492 01:58:33.935292 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6493 01:58:33.965470 <30>[ 12.491868] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6494 01:58:33.975743 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6495 01:58:33.985971 <3>[ 12.511937] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6496 01:58:34.000426 <30>[ 12.525857] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6497 01:58:34.006720 <3>[ 12.526854] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6498 01:58:34.018521 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6499 01:58:34.025043 <3>[ 12.551674] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6500 01:58:34.037025 <30>[ 12.562277] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6501 01:58:34.043832 <3>[ 12.566311] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6502 01:58:34.062188 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue <3>[ 12.586565] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6503 01:58:34.062286 File System.
6504 01:58:34.077347 <3>[ 12.603210] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6505 01:58:34.085030 <30>[ 12.612639] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6506 01:58:34.094879 <3>[ 12.618147] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6507 01:58:34.113771 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug <3>[ 12.638973] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6508 01:58:34.113875 File System.
6509 01:58:34.135463 <30>[ 12.661997] systemd[1]: Started systemd-journald.service - Journal Service.
6510 01:58:34.145706 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6511 01:58:34.169545 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6512 01:58:34.190434 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6513 01:58:34.210120 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6514 01:58:34.231240 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6515 01:58:34.249967 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6516 01:58:34.270263 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6517 01:58:34.290749 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6518 01:58:34.308824 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6519 01:58:34.329212 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6520 01:58:34.349137 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6521 01:58:34.370274 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6522 01:58:34.420417 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6523 01:58:34.453713 Mountin<4>[ 12.970471] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6524 01:58:34.460488 g [0;1;39msys-k<3>[ 12.988890] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6525 01:58:34.467151 ernel-config…ernel Configuration File System...
6526 01:58:34.489091 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6527 01:58:34.515316 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6528 01:58:34.545393 Starting [0;1;39msystemd-sysctl.se…c<46>[ 13.071170] systemd-journald[316]: Received client request to flush runtime journal.
6529 01:58:34.551990 e[0m - Apply Kernel Variables...
6530 01:58:34.578429 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6531 01:58:34.611762 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6532 01:58:34.628235 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6533 01:58:34.648663 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6534 01:58:34.669819 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6535 01:58:34.690102 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6536 01:58:35.355015 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6537 01:58:35.400741 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6538 01:58:36.036114 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6539 01:58:36.070240 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6540 01:58:36.092360 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6541 01:58:36.111578 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6542 01:58:36.152443 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6543 01:58:36.177002 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6544 01:58:36.416733 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6545 01:58:36.476285 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6546 01:58:36.493831 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6547 01:58:36.557166 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6548 01:58:36.755509 <4>[ 15.283844] power_supply_show_property: 4 callbacks suppressed
6549 01:58:36.765321 <3>[ 15.283859] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6550 01:58:36.775409 <3>[ 15.286817] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6551 01:58:36.800458 [[0;32m OK [<3>[ 15.326372] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6552 01:58:36.806936 0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6553 01:58:36.820037 <3>[ 15.345785] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6554 01:58:36.836317 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m<3>[ 15.362046] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6555 01:58:36.839780 - Bluetooth Support.
6556 01:58:36.852472 <3>[ 15.378744] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6557 01:58:36.870426 <3>[ 15.396024] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6558 01:58:36.884929 <3>[ 15.410842] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6559 01:58:36.899447 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0..<3>[ 15.425880] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6560 01:58:36.902744 .
6561 01:58:36.916174 <3>[ 15.442198] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6562 01:58:36.946572 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6563 01:58:36.980475 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6564 01:58:37.103622 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6565 01:58:37.135716 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6566 01:58:37.196976 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6567 01:58:37.226345 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6568 01:58:37.250885 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6569 01:58:37.283461 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6570 01:58:37.310387 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6571 01:58:37.330770 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6572 01:58:37.352272 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6573 01:58:37.372345 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6574 01:58:37.396395 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6575 01:58:37.420840 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6576 01:58:37.439839 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6577 01:58:37.460529 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6578 01:58:37.482709 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6579 01:58:37.505872 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6580 01:58:37.528552 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6581 01:58:37.549617 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6582 01:58:37.567980 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6583 01:58:37.586718 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6584 01:58:37.606717 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6585 01:58:37.623844 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6586 01:58:37.639643 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6587 01:58:37.658481 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6588 01:58:37.675747 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6589 01:58:37.692232 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6590 01:58:37.760626 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6591 01:58:37.785332 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6592 01:58:37.814753 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6593 01:58:37.865638 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6594 01:58:37.888734 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6595 01:58:37.909530 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6596 01:58:37.928285 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6597 01:58:38.074029 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6598 01:58:38.128981 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6599 01:58:38.184076 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6600 01:58:38.200343 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6601 01:58:38.220965 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6602 01:58:38.254830 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6603 01:58:38.278897 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6604 01:58:38.300122 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6605 01:58:38.328727 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6606 01:58:38.384985 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6607 01:58:38.436628 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6608 01:58:38.530940
6609 01:58:38.534541 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6610 01:58:38.534636
6611 01:58:38.537961 debian-bookworm-arm64 login: root (automatic login)
6612 01:58:38.538051
6613 01:58:38.833728 Linux debian-bookworm-arm64 6.1.94-cip23 #1 SMP PREEMPT Fri Jun 21 00:04:56 UTC 2024 aarch64
6614 01:58:38.833857
6615 01:58:38.840526 The programs included with the Debian GNU/Linux system are free software;
6616 01:58:38.846859 the exact distribution terms for each program are described in the
6617 01:58:38.850191 individual files in /usr/share/doc/*/copyright.
6618 01:58:38.850303
6619 01:58:38.856950 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6620 01:58:38.860452 permitted by applicable law.
6621 01:58:40.019686 Matched prompt #10: / #
6623 01:58:40.019949 Setting prompt string to ['/ #']
6624 01:58:40.020045 end: 2.2.5.1 login-action (duration 00:00:19) [common]
6626 01:58:40.020243 end: 2.2.5 auto-login-action (duration 00:00:19) [common]
6627 01:58:40.020333 start: 2.2.6 expect-shell-connection (timeout 00:03:48) [common]
6628 01:58:40.020407 Setting prompt string to ['/ #']
6629 01:58:40.020470 Forcing a shell prompt, looking for ['/ #']
6631 01:58:40.070791 / #
6632 01:58:40.071303 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6633 01:58:40.071604 Waiting using forced prompt support (timeout 00:02:30)
6634 01:58:40.076873
6635 01:58:40.077597 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6636 01:58:40.078159 start: 2.2.7 export-device-env (timeout 00:03:48) [common]
6638 01:58:40.179260 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14479198/extract-nfsrootfs-vfnpth8r'
6639 01:58:40.185160 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14479198/extract-nfsrootfs-vfnpth8r'
6641 01:58:40.286597 / # export NFS_SERVER_IP='192.168.201.1'
6642 01:58:40.292252 export NFS_SERVER_IP='192.168.201.1'
6643 01:58:40.293170 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6644 01:58:40.293852 end: 2.2 depthcharge-retry (duration 00:01:12) [common]
6645 01:58:40.294481 end: 2 depthcharge-action (duration 00:01:12) [common]
6646 01:58:40.295022 start: 3 lava-test-retry (timeout 00:08:05) [common]
6647 01:58:40.295447 start: 3.1 lava-test-shell (timeout 00:08:05) [common]
6648 01:58:40.295784 Using namespace: common
6650 01:58:40.396710 / # #
6651 01:58:40.397320 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6652 01:58:40.402440 #
6653 01:58:40.403164 Using /lava-14479198
6655 01:58:40.504100 / # export SHELL=/bin/bash
6656 01:58:40.510371 export SHELL=/bin/bash
6658 01:58:40.611646 / # . /lava-14479198/environment
6659 01:58:40.617132 . /lava-14479198/environment
6661 01:58:40.723954 / # /lava-14479198/bin/lava-test-runner /lava-14479198/0
6662 01:58:40.724562 Test shell timeout: 10s (minimum of the action and connection timeout)
6663 01:58:40.729901 /lava-14479198/bin/lava-test-runner /lava-14479198/0
6664 01:58:40.963519 + export TESTRUN_ID=0_timesync-off
6665 01:58:40.966847 + TESTRUN_ID=0_timesync-off
6666 01:58:40.970173 + cd /lava-14479198/0/tests/0_timesync-off
6667 01:58:40.973566 ++ cat uuid
6668 01:58:40.976595 + UUID=14479198_1.6.2.3.1
6669 01:58:40.976672 + set +x
6670 01:58:40.980491 Received signal: <STARTRUN> 0_timesync-off 14479198_1.6.2.3.1
6671 01:58:40.980580 Starting test lava.0_timesync-off (14479198_1.6.2.3.1)
6672 01:58:40.980676 Skipping test definition patterns.
6673 01:58:40.983527 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14479198_1.6.2.3.1>
6674 01:58:40.983608 + systemctl stop systemd-timesyncd
6675 01:58:41.053728 + set +x
6676 01:58:41.057289 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14479198_1.6.2.3.1>
6677 01:58:41.057595 Received signal: <ENDRUN> 0_timesync-off 14479198_1.6.2.3.1
6678 01:58:41.057766 Ending use of test pattern.
6679 01:58:41.057922 Ending test lava.0_timesync-off (14479198_1.6.2.3.1), duration 0.08
6681 01:58:41.122890 + export TESTRUN_ID=1_kselftest-rtc
6682 01:58:41.125721 + TESTRUN_ID=1_kselftest-rtc
6683 01:58:41.129507 + cd /lava-14479198/0/tests/1_kselftest-rtc
6684 01:58:41.132812 ++ cat uuid
6685 01:58:41.135981 + UUID=14479198_1.6.2.3.5
6686 01:58:41.136080 + set +x
6687 01:58:41.142512 <LAVA_SIGNAL_STARTRUN 1_kselftest-rtc 14479198_1.6.2.3.5>
6688 01:58:41.142821 Received signal: <STARTRUN> 1_kselftest-rtc 14479198_1.6.2.3.5
6689 01:58:41.142943 Starting test lava.1_kselftest-rtc (14479198_1.6.2.3.5)
6690 01:58:41.143072 Skipping test definition patterns.
6691 01:58:41.146022 + cd ./automated/linux/kselftest/
6692 01:58:41.169507 + ./kselftest.sh -c rtc -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1
6693 01:58:41.211283 INFO: install_deps skipped
6694 01:58:41.718760 --2024-06-21 01:58:41-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
6695 01:58:41.729286 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6696 01:58:41.859002 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6697 01:58:41.988448 HTTP request sent, awaiting response... 200 OK
6698 01:58:41.991700 Length: 1642760 (1.6M) [application/octet-stream]
6699 01:58:41.995158 Saving to: 'kselftest_armhf.tar.gz'
6700 01:58:41.995554
6701 01:58:41.995868
6702 01:58:42.247832 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6703 01:58:42.513572 kselftest_armhf.tar 2%[ ] 46.39K 179KB/s
6704 01:58:42.809170 kselftest_armhf.tar 13%[=> ] 219.84K 419KB/s
6705 01:58:42.943160 kselftest_armhf.tar 43%[=======> ] 692.62K 844KB/s
6706 01:58:42.949572 kselftest_armhf.tar 100%[===================>] 1.57M 1.64MB/s in 1.0s
6707 01:58:42.949685
6708 01:58:43.093832 2024-06-21 01:58:42 (1.64 MB/s) - 'kselftest_armhf.tar.gz' saved [1642760/1642760]
6709 01:58:43.093954
6710 01:58:47.036758 skiplist:
6711 01:58:47.040165 ========================================
6712 01:58:47.042994 ========================================
6713 01:58:47.083048 rtc:rtctest
6714 01:58:47.099834 ============== Tests to run ===============
6715 01:58:47.099979 rtc:rtctest
6716 01:58:47.103021 ===========End Tests to run ===============
6717 01:58:47.106650 shardfile-rtc pass
6718 01:58:47.199548 <12>[ 25.728962] kselftest: Running tests in rtc
6719 01:58:47.208596 TAP version 13
6720 01:58:47.222547 1..1
6721 01:58:47.251688 # selftests: rtc: rtctest
6722 01:58:47.706064 # TAP version 13
6723 01:58:47.706200 # 1..8
6724 01:58:47.709506 # # Starting 8 tests from 2 test cases.
6725 01:58:47.712654 # # RUN rtc.date_read ...
6726 01:58:47.719297 # # rtctest.c:49:date_read:Current RTC date/time is 21/06/2024 01:58:47.
6727 01:58:47.722289 # # OK rtc.date_read
6728 01:58:47.725559 # ok 1 rtc.date_read
6729 01:58:47.728985 # # RUN rtc.date_read_loop ...
6730 01:58:47.738768 # # rtctest.c:88:date_read_loop:Continuously reading RTC time for 30s (with 11ms breaks after every read).
6731 01:58:59.450192 <6>[ 37.982636] vaux18: disabling
6732 01:58:59.454156 <6>[ 37.986139] vio28: disabling
6733 01:59:17.984742 # # rtctest.c:115:date_read_loop:Performed 2682 RTC time reads.
6734 01:59:17.988014 # # OK rtc.date_read_loop
6735 01:59:17.991304 # ok 2 rtc.date_read_loop
6736 01:59:17.994273 # # RUN rtc.uie_read ...
6737 01:59:20.969395 # # OK rtc.uie_read
6738 01:59:20.972622 # ok 3 rtc.uie_read
6739 01:59:20.975688 # # RUN rtc.uie_select ...
6740 01:59:24.151276 # # OK rtc.uie_select
6741 01:59:24.151425 # ok 4 rtc.uie_select
6742 01:59:24.151530 # # RUN rtc.alarm_alm_set ...
6743 01:59:24.151631 # # rtctest.c:202:alarm_alm_set:Alarm time now set to 01:59:27.
6744 01:59:24.151726 # # rtctest.c:207:alarm_alm_set:Expected -1 (-1) != rc (-1)
6745 01:59:24.151820 # # alarm_alm_set: Test terminated by assertion
6746 01:59:24.151916 # # FAIL rtc.alarm_alm_set
6747 01:59:24.152010 # not ok 5 rtc.alarm_alm_set
6748 01:59:24.152100 # # RUN rtc.alarm_wkalm_set ...
6749 01:59:24.152189 # # rtctest.c:258:alarm_wkalm_set:Alarm time now set to 21/06/2024 01:59:27.
6750 01:59:26.971634 # # OK rtc.alarm_wkalm_set
6751 01:59:26.971781 # ok 6 rtc.alarm_wkalm_set
6752 01:59:26.978593 # # RUN rtc.alarm_alm_set_minute ...
6753 01:59:26.984868 # # rtctest.c:304:alarm_alm_set_minute:Alarm time now set to 02:00:00.
6754 01:59:26.988192 # # rtctest.c:309:alarm_alm_set_minute:Expected -1 (-1) != rc (-1)
6755 01:59:26.995197 # # alarm_alm_set_minute: Test terminated by assertion
6756 01:59:26.998123 # # FAIL rtc.alarm_alm_set_minute
6757 01:59:27.001675 # not ok 7 rtc.alarm_alm_set_minute
6758 01:59:27.004594 # # RUN rtc.alarm_wkalm_set_minute ...
6759 01:59:27.014888 # # rtctest.c:360:alarm_wkalm_set_minute:Alarm time now set to 21/06/2024 02:00:00.
6760 01:59:59.973156 # # OK rtc.alarm_wkalm_set_minute
6761 01:59:59.976413 # ok 8 rtc.alarm_wkalm_set_minute
6762 01:59:59.979779 # # FAILED: 6 / 8 tests passed.
6763 01:59:59.983263 # # Totals: pass:6 fail:2 xfail:0 xpass:0 skip:0 error:0
6764 01:59:59.986089 not ok 1 selftests: rtc: rtctest # exit=1
6765 02:00:01.510978 rtc_rtctest_rtc_date_read pass
6766 02:00:01.514238 rtc_rtctest_rtc_date_read_loop pass
6767 02:00:01.517650 rtc_rtctest_rtc_uie_read pass
6768 02:00:01.520833 rtc_rtctest_rtc_uie_select pass
6769 02:00:01.524055 rtc_rtctest_rtc_alarm_alm_set fail
6770 02:00:01.527490 rtc_rtctest_rtc_alarm_wkalm_set pass
6771 02:00:01.531019 rtc_rtctest_rtc_alarm_alm_set_minute fail
6772 02:00:01.534525 rtc_rtctest_rtc_alarm_wkalm_set_minute pass
6773 02:00:01.537333 rtc_rtctest fail
6774 02:00:01.600700 + ../../utils/send-to-lava.sh ./output/result.txt
6775 02:00:01.654001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-rtc RESULT=pass>
6776 02:00:01.654321 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-rtc RESULT=pass
6778 02:00:01.692576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_date_read RESULT=pass>
6779 02:00:01.692873 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_date_read RESULT=pass
6781 02:00:01.734302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_date_read_loop RESULT=pass>
6782 02:00:01.734578 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_date_read_loop RESULT=pass
6784 02:00:01.769326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_uie_read RESULT=pass>
6785 02:00:01.769589 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_uie_read RESULT=pass
6787 02:00:01.808022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_uie_select RESULT=pass>
6788 02:00:01.808300 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_uie_select RESULT=pass
6790 02:00:01.856078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set RESULT=fail>
6791 02:00:01.856366 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set RESULT=fail
6793 02:00:01.895536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set RESULT=pass>
6794 02:00:01.895807 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set RESULT=pass
6796 02:00:01.933105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set_minute RESULT=fail>
6797 02:00:01.933371 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set_minute RESULT=fail
6799 02:00:01.977958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set_minute RESULT=pass>
6800 02:00:01.978229 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set_minute RESULT=pass
6802 02:00:02.018391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest RESULT=fail>
6803 02:00:02.018484 + set +x
6804 02:00:02.018721 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest RESULT=fail
6806 02:00:02.025089 <LAVA_SIGNAL_ENDRUN 1_kselftest-rtc 14479198_1.6.2.3.5>
6807 02:00:02.025343 Received signal: <ENDRUN> 1_kselftest-rtc 14479198_1.6.2.3.5
6808 02:00:02.025422 Ending use of test pattern.
6809 02:00:02.025486 Ending test lava.1_kselftest-rtc (14479198_1.6.2.3.5), duration 80.88
6811 02:00:02.028552 <LAVA_TEST_RUNNER EXIT>
6812 02:00:02.028804 ok: lava_test_shell seems to have completed
6813 02:00:02.028949 rtc_rtctest: fail
rtc_rtctest_rtc_alarm_alm_set: fail
rtc_rtctest_rtc_alarm_alm_set_minute: fail
rtc_rtctest_rtc_alarm_wkalm_set: pass
rtc_rtctest_rtc_alarm_wkalm_set_minute: pass
rtc_rtctest_rtc_date_read: pass
rtc_rtctest_rtc_date_read_loop: pass
rtc_rtctest_rtc_uie_read: pass
rtc_rtctest_rtc_uie_select: pass
shardfile-rtc: pass
6814 02:00:02.029050 end: 3.1 lava-test-shell (duration 00:01:22) [common]
6815 02:00:02.029137 end: 3 lava-test-retry (duration 00:01:22) [common]
6816 02:00:02.029225 start: 4 finalize (timeout 00:06:44) [common]
6817 02:00:02.029317 start: 4.1 power-off (timeout 00:00:30) [common]
6818 02:00:02.029466 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
6819 02:00:04.106671 >> Command sent successfully.
6820 02:00:04.110018 Returned 0 in 2 seconds
6821 02:00:04.210370 end: 4.1 power-off (duration 00:00:02) [common]
6823 02:00:04.210826 start: 4.2 read-feedback (timeout 00:06:41) [common]
6824 02:00:04.211147 Listened to connection for namespace 'common' for up to 1s
6825 02:00:05.212097 Finalising connection for namespace 'common'
6826 02:00:05.212277 Disconnecting from shell: Finalise
6827 02:00:05.212366 / #
6828 02:00:05.312656 end: 4.2 read-feedback (duration 00:00:01) [common]
6829 02:00:05.312826 end: 4 finalize (duration 00:00:03) [common]
6830 02:00:05.312949 Cleaning after the job
6831 02:00:05.313057 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/ramdisk
6832 02:00:05.315347 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/kernel
6833 02:00:05.326791 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/dtb
6834 02:00:05.326977 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/nfsrootfs
6835 02:00:05.395800 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479198/tftp-deploy-3w3zgrbh/modules
6836 02:00:05.401848 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14479198
6837 02:00:05.994572 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14479198
6838 02:00:05.994762 Job finished correctly