Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 45
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 90
1 01:53:09.897029 lava-dispatcher, installed at version: 2024.03
2 01:53:09.897233 start: 0 validate
3 01:53:09.897416 Start time: 2024-06-21 01:53:09.897409+00:00 (UTC)
4 01:53:09.897536 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:53:09.897695 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:53:10.166581 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:53:10.167296 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 01:53:10.420801 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:53:10.421526 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 01:53:10.690395 Using caching service: 'http://localhost/cache/?uri=%s'
11 01:53:10.691113 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:53:11.201919 Using caching service: 'http://localhost/cache/?uri=%s'
13 01:53:11.202680 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 01:53:11.471977 validate duration: 1.57
16 01:53:11.473380 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:53:11.473959 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:53:11.474435 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:53:11.475037 Not decompressing ramdisk as can be used compressed.
20 01:53:11.475603 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 01:53:11.475985 saving as /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/ramdisk/initrd.cpio.gz
22 01:53:11.476353 total size: 5628169 (5 MB)
23 01:53:11.481628 progress 0 % (0 MB)
24 01:53:11.490720 progress 5 % (0 MB)
25 01:53:11.496927 progress 10 % (0 MB)
26 01:53:11.500980 progress 15 % (0 MB)
27 01:53:11.504726 progress 20 % (1 MB)
28 01:53:11.507836 progress 25 % (1 MB)
29 01:53:11.510720 progress 30 % (1 MB)
30 01:53:11.513469 progress 35 % (1 MB)
31 01:53:11.515619 progress 40 % (2 MB)
32 01:53:11.518069 progress 45 % (2 MB)
33 01:53:11.519973 progress 50 % (2 MB)
34 01:53:11.522088 progress 55 % (2 MB)
35 01:53:11.524049 progress 60 % (3 MB)
36 01:53:11.525791 progress 65 % (3 MB)
37 01:53:11.527739 progress 70 % (3 MB)
38 01:53:11.529273 progress 75 % (4 MB)
39 01:53:11.530994 progress 80 % (4 MB)
40 01:53:11.532532 progress 85 % (4 MB)
41 01:53:11.534130 progress 90 % (4 MB)
42 01:53:11.535676 progress 95 % (5 MB)
43 01:53:11.537078 progress 100 % (5 MB)
44 01:53:11.537299 5 MB downloaded in 0.06 s (88.03 MB/s)
45 01:53:11.537474 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:53:11.537715 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:53:11.537813 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:53:11.537895 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:53:11.538024 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 01:53:11.538091 saving as /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/kernel/Image
52 01:53:11.538150 total size: 54813184 (52 MB)
53 01:53:11.538210 No compression specified
54 01:53:11.539296 progress 0 % (0 MB)
55 01:53:11.553098 progress 5 % (2 MB)
56 01:53:11.566995 progress 10 % (5 MB)
57 01:53:11.580705 progress 15 % (7 MB)
58 01:53:11.594646 progress 20 % (10 MB)
59 01:53:11.608665 progress 25 % (13 MB)
60 01:53:11.622532 progress 30 % (15 MB)
61 01:53:11.636504 progress 35 % (18 MB)
62 01:53:11.650740 progress 40 % (20 MB)
63 01:53:11.664664 progress 45 % (23 MB)
64 01:53:11.678716 progress 50 % (26 MB)
65 01:53:11.692854 progress 55 % (28 MB)
66 01:53:11.706765 progress 60 % (31 MB)
67 01:53:11.720896 progress 65 % (34 MB)
68 01:53:11.734747 progress 70 % (36 MB)
69 01:53:11.748711 progress 75 % (39 MB)
70 01:53:11.762811 progress 80 % (41 MB)
71 01:53:11.776574 progress 85 % (44 MB)
72 01:53:11.790533 progress 90 % (47 MB)
73 01:53:11.804357 progress 95 % (49 MB)
74 01:53:11.817890 progress 100 % (52 MB)
75 01:53:11.818121 52 MB downloaded in 0.28 s (186.71 MB/s)
76 01:53:11.818270 end: 1.2.1 http-download (duration 00:00:00) [common]
78 01:53:11.818499 end: 1.2 download-retry (duration 00:00:00) [common]
79 01:53:11.818585 start: 1.3 download-retry (timeout 00:10:00) [common]
80 01:53:11.818667 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 01:53:11.818801 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 01:53:11.818869 saving as /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 01:53:11.818929 total size: 57695 (0 MB)
84 01:53:11.818989 No compression specified
85 01:53:11.820091 progress 56 % (0 MB)
86 01:53:11.820367 progress 100 % (0 MB)
87 01:53:11.820570 0 MB downloaded in 0.00 s (33.59 MB/s)
88 01:53:11.820691 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:53:11.820911 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:53:11.820995 start: 1.4 download-retry (timeout 00:10:00) [common]
92 01:53:11.821076 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 01:53:11.821184 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 01:53:11.821252 saving as /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/nfsrootfs/full.rootfs.tar
95 01:53:11.821318 total size: 120894716 (115 MB)
96 01:53:11.821379 Using unxz to decompress xz
97 01:53:11.825309 progress 0 % (0 MB)
98 01:53:12.166458 progress 5 % (5 MB)
99 01:53:12.517240 progress 10 % (11 MB)
100 01:53:12.864100 progress 15 % (17 MB)
101 01:53:13.187141 progress 20 % (23 MB)
102 01:53:13.476774 progress 25 % (28 MB)
103 01:53:13.831774 progress 30 % (34 MB)
104 01:53:14.170005 progress 35 % (40 MB)
105 01:53:14.336158 progress 40 % (46 MB)
106 01:53:14.512510 progress 45 % (51 MB)
107 01:53:14.828700 progress 50 % (57 MB)
108 01:53:15.209360 progress 55 % (63 MB)
109 01:53:15.564502 progress 60 % (69 MB)
110 01:53:15.904157 progress 65 % (74 MB)
111 01:53:16.252761 progress 70 % (80 MB)
112 01:53:16.604372 progress 75 % (86 MB)
113 01:53:16.942452 progress 80 % (92 MB)
114 01:53:17.277211 progress 85 % (98 MB)
115 01:53:17.628975 progress 90 % (103 MB)
116 01:53:17.953461 progress 95 % (109 MB)
117 01:53:18.304267 progress 100 % (115 MB)
118 01:53:18.309580 115 MB downloaded in 6.49 s (17.77 MB/s)
119 01:53:18.309869 end: 1.4.1 http-download (duration 00:00:06) [common]
121 01:53:18.310208 end: 1.4 download-retry (duration 00:00:06) [common]
122 01:53:18.310328 start: 1.5 download-retry (timeout 00:09:53) [common]
123 01:53:18.310442 start: 1.5.1 http-download (timeout 00:09:53) [common]
124 01:53:18.310623 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 01:53:18.310718 saving as /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/modules/modules.tar
126 01:53:18.310807 total size: 8618924 (8 MB)
127 01:53:18.310897 Using unxz to decompress xz
128 01:53:18.315273 progress 0 % (0 MB)
129 01:53:18.334887 progress 5 % (0 MB)
130 01:53:18.359161 progress 10 % (0 MB)
131 01:53:18.384387 progress 15 % (1 MB)
132 01:53:18.408729 progress 20 % (1 MB)
133 01:53:18.433786 progress 25 % (2 MB)
134 01:53:18.458478 progress 30 % (2 MB)
135 01:53:18.483501 progress 35 % (2 MB)
136 01:53:18.507450 progress 40 % (3 MB)
137 01:53:18.531572 progress 45 % (3 MB)
138 01:53:18.555360 progress 50 % (4 MB)
139 01:53:18.579738 progress 55 % (4 MB)
140 01:53:18.604112 progress 60 % (4 MB)
141 01:53:18.627615 progress 65 % (5 MB)
142 01:53:18.655356 progress 70 % (5 MB)
143 01:53:18.680067 progress 75 % (6 MB)
144 01:53:18.703232 progress 80 % (6 MB)
145 01:53:18.726670 progress 85 % (7 MB)
146 01:53:18.750046 progress 90 % (7 MB)
147 01:53:18.777980 progress 95 % (7 MB)
148 01:53:18.807939 progress 100 % (8 MB)
149 01:53:18.812528 8 MB downloaded in 0.50 s (16.38 MB/s)
150 01:53:18.812780 end: 1.5.1 http-download (duration 00:00:01) [common]
152 01:53:18.813044 end: 1.5 download-retry (duration 00:00:01) [common]
153 01:53:18.813139 start: 1.6 prepare-tftp-overlay (timeout 00:09:53) [common]
154 01:53:18.813233 start: 1.6.1 extract-nfsrootfs (timeout 00:09:53) [common]
155 01:53:22.407372 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14479143/extract-nfsrootfs-sovqjz2d
156 01:53:22.407577 end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
157 01:53:22.407676 start: 1.6.2 lava-overlay (timeout 00:09:49) [common]
158 01:53:22.407842 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg
159 01:53:22.407969 makedir: /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin
160 01:53:22.408065 makedir: /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/tests
161 01:53:22.408159 makedir: /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/results
162 01:53:22.408254 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-add-keys
163 01:53:22.408390 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-add-sources
164 01:53:22.408514 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-background-process-start
165 01:53:22.408644 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-background-process-stop
166 01:53:22.408782 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-common-functions
167 01:53:22.408903 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-echo-ipv4
168 01:53:22.409026 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-install-packages
169 01:53:22.409146 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-installed-packages
170 01:53:22.409526 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-os-build
171 01:53:22.409654 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-probe-channel
172 01:53:22.409775 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-probe-ip
173 01:53:22.409894 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-target-ip
174 01:53:22.410014 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-target-mac
175 01:53:22.410133 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-target-storage
176 01:53:22.410253 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-test-case
177 01:53:22.410373 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-test-event
178 01:53:22.410490 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-test-feedback
179 01:53:22.410608 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-test-raise
180 01:53:22.410725 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-test-reference
181 01:53:22.410844 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-test-runner
182 01:53:22.410961 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-test-set
183 01:53:22.411081 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-test-shell
184 01:53:22.411200 Updating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-add-keys (debian)
185 01:53:22.411343 Updating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-add-sources (debian)
186 01:53:22.411475 Updating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-install-packages (debian)
187 01:53:22.411605 Updating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-installed-packages (debian)
188 01:53:22.411734 Updating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/bin/lava-os-build (debian)
189 01:53:22.411847 Creating /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/environment
190 01:53:22.411941 LAVA metadata
191 01:53:22.412004 - LAVA_JOB_ID=14479143
192 01:53:22.412064 - LAVA_DISPATCHER_IP=192.168.201.1
193 01:53:22.412158 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:49) [common]
194 01:53:22.412221 skipped lava-vland-overlay
195 01:53:22.412291 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 01:53:22.412367 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
197 01:53:22.412424 skipped lava-multinode-overlay
198 01:53:22.412492 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 01:53:22.412566 start: 1.6.2.3 test-definition (timeout 00:09:49) [common]
200 01:53:22.412647 Loading test definitions
201 01:53:22.412731 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:49) [common]
202 01:53:22.412800 Using /lava-14479143 at stage 0
203 01:53:22.413063 uuid=14479143_1.6.2.3.1 testdef=None
204 01:53:22.413147 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 01:53:22.413228 start: 1.6.2.3.2 test-overlay (timeout 00:09:49) [common]
206 01:53:22.413721 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 01:53:22.413936 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:49) [common]
209 01:53:22.414467 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 01:53:22.414687 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
212 01:53:22.415198 runner path: /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/0/tests/0_timesync-off test_uuid 14479143_1.6.2.3.1
213 01:53:22.415350 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 01:53:22.415564 start: 1.6.2.3.5 git-repo-action (timeout 00:09:49) [common]
216 01:53:22.415632 Using /lava-14479143 at stage 0
217 01:53:22.415726 Fetching tests from https://github.com/kernelci/test-definitions.git
218 01:53:22.415809 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/0/tests/1_kselftest-tpm2'
219 01:53:24.621813 Running '/usr/bin/git checkout kernelci.org
220 01:53:24.768551 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/kselftest.yaml
221 01:53:24.769311 uuid=14479143_1.6.2.3.5 testdef=None
222 01:53:24.769481 end: 1.6.2.3.5 git-repo-action (duration 00:00:02) [common]
224 01:53:24.769728 start: 1.6.2.3.6 test-overlay (timeout 00:09:47) [common]
225 01:53:24.770520 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 01:53:24.770752 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:47) [common]
228 01:53:24.771712 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 01:53:24.771946 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:47) [common]
231 01:53:24.772851 runner path: /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/0/tests/1_kselftest-tpm2 test_uuid 14479143_1.6.2.3.5
232 01:53:24.772942 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 01:53:24.773005 BRANCH='cip'
234 01:53:24.773063 SKIPFILE='/dev/null'
235 01:53:24.773121 SKIP_INSTALL='True'
236 01:53:24.773175 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
237 01:53:24.773233 TST_CASENAME=''
238 01:53:24.773321 TST_CMDFILES='tpm2'
239 01:53:24.773472 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 01:53:24.773672 Creating lava-test-runner.conf files
242 01:53:24.773733 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14479143/lava-overlay-oei0uyvg/lava-14479143/0 for stage 0
243 01:53:24.773822 - 0_timesync-off
244 01:53:24.773890 - 1_kselftest-tpm2
245 01:53:24.773981 end: 1.6.2.3 test-definition (duration 00:00:02) [common]
246 01:53:24.774064 start: 1.6.2.4 compress-overlay (timeout 00:09:47) [common]
247 01:53:32.247060 end: 1.6.2.4 compress-overlay (duration 00:00:07) [common]
248 01:53:32.247218 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
249 01:53:32.247306 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 01:53:32.247404 end: 1.6.2 lava-overlay (duration 00:00:10) [common]
251 01:53:32.247491 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
252 01:53:32.411995 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 01:53:32.412375 start: 1.6.4 extract-modules (timeout 00:09:39) [common]
254 01:53:32.412481 extracting modules file /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14479143/extract-nfsrootfs-sovqjz2d
255 01:53:32.629470 extracting modules file /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14479143/extract-overlay-ramdisk-4fkhlp98/ramdisk
256 01:53:32.846389 end: 1.6.4 extract-modules (duration 00:00:00) [common]
257 01:53:32.846553 start: 1.6.5 apply-overlay-tftp (timeout 00:09:39) [common]
258 01:53:32.846644 [common] Applying overlay to NFS
259 01:53:32.846712 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14479143/compress-overlay-1f364rq8/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14479143/extract-nfsrootfs-sovqjz2d
260 01:53:33.758678 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 01:53:33.758850 start: 1.6.6 configure-preseed-file (timeout 00:09:38) [common]
262 01:53:33.758942 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 01:53:33.759034 start: 1.6.7 compress-ramdisk (timeout 00:09:38) [common]
264 01:53:33.759115 Building ramdisk /var/lib/lava/dispatcher/tmp/14479143/extract-overlay-ramdisk-4fkhlp98/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14479143/extract-overlay-ramdisk-4fkhlp98/ramdisk
265 01:53:34.101561 >> 130487 blocks
266 01:53:36.111433 rename /var/lib/lava/dispatcher/tmp/14479143/extract-overlay-ramdisk-4fkhlp98/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/ramdisk/ramdisk.cpio.gz
267 01:53:36.111879 end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
268 01:53:36.112001 start: 1.6.8 prepare-kernel (timeout 00:09:35) [common]
269 01:53:36.112103 start: 1.6.8.1 prepare-fit (timeout 00:09:35) [common]
270 01:53:36.112207 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/kernel/Image']
271 01:53:49.221890 Returned 0 in 13 seconds
272 01:53:49.322957 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/kernel/image.itb
273 01:53:49.730711 output: FIT description: Kernel Image image with one or more FDT blobs
274 01:53:49.731086 output: Created: Fri Jun 21 02:53:49 2024
275 01:53:49.731161 output: Image 0 (kernel-1)
276 01:53:49.731226 output: Description:
277 01:53:49.731288 output: Created: Fri Jun 21 02:53:49 2024
278 01:53:49.731352 output: Type: Kernel Image
279 01:53:49.731411 output: Compression: lzma compressed
280 01:53:49.731470 output: Data Size: 13124896 Bytes = 12817.28 KiB = 12.52 MiB
281 01:53:49.731526 output: Architecture: AArch64
282 01:53:49.731583 output: OS: Linux
283 01:53:49.731638 output: Load Address: 0x00000000
284 01:53:49.731692 output: Entry Point: 0x00000000
285 01:53:49.731747 output: Hash algo: crc32
286 01:53:49.731799 output: Hash value: ab2f7826
287 01:53:49.731853 output: Image 1 (fdt-1)
288 01:53:49.731907 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 01:53:49.731961 output: Created: Fri Jun 21 02:53:49 2024
290 01:53:49.732013 output: Type: Flat Device Tree
291 01:53:49.732065 output: Compression: uncompressed
292 01:53:49.732117 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 01:53:49.732169 output: Architecture: AArch64
294 01:53:49.732221 output: Hash algo: crc32
295 01:53:49.732272 output: Hash value: a9713552
296 01:53:49.732323 output: Image 2 (ramdisk-1)
297 01:53:49.732374 output: Description: unavailable
298 01:53:49.732426 output: Created: Fri Jun 21 02:53:49 2024
299 01:53:49.732478 output: Type: RAMDisk Image
300 01:53:49.732529 output: Compression: Unknown Compression
301 01:53:49.732581 output: Data Size: 18737920 Bytes = 18298.75 KiB = 17.87 MiB
302 01:53:49.732633 output: Architecture: AArch64
303 01:53:49.732684 output: OS: Linux
304 01:53:49.732735 output: Load Address: unavailable
305 01:53:49.732787 output: Entry Point: unavailable
306 01:53:49.732838 output: Hash algo: crc32
307 01:53:49.732889 output: Hash value: a8bc2c53
308 01:53:49.732941 output: Default Configuration: 'conf-1'
309 01:53:49.732992 output: Configuration 0 (conf-1)
310 01:53:49.733044 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 01:53:49.733095 output: Kernel: kernel-1
312 01:53:49.733146 output: Init Ramdisk: ramdisk-1
313 01:53:49.733197 output: FDT: fdt-1
314 01:53:49.733248 output: Loadables: kernel-1
315 01:53:49.733344 output:
316 01:53:49.733545 end: 1.6.8.1 prepare-fit (duration 00:00:14) [common]
317 01:53:49.733645 end: 1.6.8 prepare-kernel (duration 00:00:14) [common]
318 01:53:49.733751 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
319 01:53:49.733841 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:22) [common]
320 01:53:49.733917 No LXC device requested
321 01:53:49.733994 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 01:53:49.734082 start: 1.8 deploy-device-env (timeout 00:09:22) [common]
323 01:53:49.734158 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 01:53:49.734225 Checking files for TFTP limit of 4294967296 bytes.
325 01:53:49.734720 end: 1 tftp-deploy (duration 00:00:38) [common]
326 01:53:49.734826 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 01:53:49.734913 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 01:53:49.735037 substitutions:
329 01:53:49.735104 - {DTB}: 14479143/tftp-deploy-bp6c410g/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 01:53:49.735166 - {INITRD}: 14479143/tftp-deploy-bp6c410g/ramdisk/ramdisk.cpio.gz
331 01:53:49.735224 - {KERNEL}: 14479143/tftp-deploy-bp6c410g/kernel/Image
332 01:53:49.735280 - {LAVA_MAC}: None
333 01:53:49.735335 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14479143/extract-nfsrootfs-sovqjz2d
334 01:53:49.735390 - {NFS_SERVER_IP}: 192.168.201.1
335 01:53:49.735444 - {PRESEED_CONFIG}: None
336 01:53:49.735497 - {PRESEED_LOCAL}: None
337 01:53:49.735550 - {RAMDISK}: 14479143/tftp-deploy-bp6c410g/ramdisk/ramdisk.cpio.gz
338 01:53:49.735605 - {ROOT_PART}: None
339 01:53:49.735660 - {ROOT}: None
340 01:53:49.735716 - {SERVER_IP}: 192.168.201.1
341 01:53:49.735769 - {TEE}: None
342 01:53:49.735822 Parsed boot commands:
343 01:53:49.735874 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 01:53:49.736043 Parsed boot commands: tftpboot 192.168.201.1 14479143/tftp-deploy-bp6c410g/kernel/image.itb 14479143/tftp-deploy-bp6c410g/kernel/cmdline
345 01:53:49.736131 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 01:53:49.736215 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 01:53:49.736304 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 01:53:49.736385 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 01:53:49.736456 Not connected, no need to disconnect.
350 01:53:49.736527 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 01:53:49.736607 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 01:53:49.736674 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
353 01:53:49.740458 Setting prompt string to ['lava-test: # ']
354 01:53:49.740823 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 01:53:49.740930 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 01:53:49.741029 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 01:53:49.741116 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 01:53:49.741345 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-3']
359 01:54:13.058862 Returned 0 in 23 seconds
360 01:54:13.159985 end: 2.2.2.1 pdu-reboot (duration 00:00:23) [common]
362 01:54:13.161888 end: 2.2.2 reset-device (duration 00:00:23) [common]
363 01:54:13.162425 start: 2.2.3 depthcharge-start (timeout 00:04:37) [common]
364 01:54:13.162904 Setting prompt string to 'Starting depthcharge on Juniper...'
365 01:54:13.163293 Changing prompt to 'Starting depthcharge on Juniper...'
366 01:54:13.163684 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
367 01:54:13.165882 [Enter `^Ec?' for help]
368 01:54:13.166328 [DL] 00000000 00000000 010701
369 01:54:13.166704
370 01:54:13.167079
371 01:54:13.167438 F0: 102B 0000
372 01:54:13.167798
373 01:54:13.168114 F3: 1006 0033 [0200]
374 01:54:13.168444
375 01:54:13.168762 F3: 4001 00E0 [0200]
376 01:54:13.169073
377 01:54:13.169402 F3: 0000 0000
378 01:54:13.169713
379 01:54:13.170016 V0: 0000 0000 [0001]
380 01:54:13.170321
381 01:54:13.170623 00: 1027 0002
382 01:54:13.170950
383 01:54:13.171252 01: 0000 0000
384 01:54:13.171561
385 01:54:13.171875 BP: 0C00 0251 [0000]
386 01:54:13.172176
387 01:54:13.172472 G0: 1182 0000
388 01:54:13.172772
389 01:54:13.173074 EC: 0004 0000 [0001]
390 01:54:13.173395
391 01:54:13.173695 S7: 0000 0000 [0000]
392 01:54:13.173994
393 01:54:13.174294 CC: 0000 0000 [0001]
394 01:54:13.174593
395 01:54:13.174892 T0: 0000 00DB [000F]
396 01:54:13.175195
397 01:54:13.175494 Jump to BL
398 01:54:13.175796
399 01:54:13.176094
400 01:54:13.176390
401 01:54:13.176713 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
402 01:54:13.177126 ARM64: Exception handlers installed.
403 01:54:13.177553 ARM64: Testing exception
404 01:54:13.177946 ARM64: Done test exception
405 01:54:13.178335 WDT: Last reset was cold boot
406 01:54:13.178720 SPI0(PAD0) initialized at 992727 Hz
407 01:54:13.179102 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
408 01:54:13.179585 Manufacturer: ef
409 01:54:13.180064 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
410 01:54:13.180548 Probing TPM: . done!
411 01:54:13.180962 TPM ready after 0 ms
412 01:54:13.181457 Connected to device vid:did:rid of 1ae0:0028:00
413 01:54:13.181944 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
414 01:54:13.182339 Initialized TPM device CR50 revision 0
415 01:54:13.182797 tlcl_send_startup: Startup return code is 0
416 01:54:13.183275 TPM: setup succeeded
417 01:54:13.183670 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
418 01:54:13.184057 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
419 01:54:13.184442 in-header: 03 19 00 00 08 00 00 00
420 01:54:13.184826 in-data: a2 e0 47 00 13 00 00 00
421 01:54:13.185204 Chrome EC: UHEPI supported
422 01:54:13.185621 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
423 01:54:13.186110 in-header: 03 a1 00 00 08 00 00 00
424 01:54:13.186500 in-data: 84 60 60 10 00 00 00 00
425 01:54:13.187019 Phase 1
426 01:54:13.187509 FMAP: area GBB found @ 3f5000 (12032 bytes)
427 01:54:13.187909 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
428 01:54:13.188300 VB2:vb2_check_recovery() Recovery was requested manually
429 01:54:13.188690 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
430 01:54:13.189079 Recovery requested (1009000e)
431 01:54:13.189518 tlcl_extend: response is 0
432 01:54:13.189907 tlcl_extend: response is 0
433 01:54:13.190391
434 01:54:13.190873
435 01:54:13.191262 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
436 01:54:13.191621 ARM64: Exception handlers installed.
437 01:54:13.191899 ARM64: Testing exception
438 01:54:13.192176 ARM64: Done test exception
439 01:54:13.192453 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x2000
440 01:54:13.192729 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
441 01:54:13.193006 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
442 01:54:13.193369 [RTC]rtc_get_frequency_meter,134: input=0xf, output=864
443 01:54:13.193717 [RTC]rtc_get_frequency_meter,134: input=0x7, output=733
444 01:54:13.194060 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
445 01:54:13.194335 [RTC]rtc_get_frequency_meter,134: input=0x9, output=766
446 01:54:13.194610 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
447 01:54:13.194882 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
448 01:54:13.195158 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
449 01:54:13.195502 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b
450 01:54:13.195843 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
451 01:54:13.196183 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
452 01:54:13.196524 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
453 01:54:13.196731 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
454 01:54:13.196940 in-header: 03 19 00 00 08 00 00 00
455 01:54:13.197198 in-data: a2 e0 47 00 13 00 00 00
456 01:54:13.197475 Chrome EC: UHEPI supported
457 01:54:13.197715 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
458 01:54:13.197926 in-header: 03 a1 00 00 08 00 00 00
459 01:54:13.198135 in-data: 84 60 60 10 00 00 00 00
460 01:54:13.198393 Skip loading cached calibration data
461 01:54:13.198653 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
462 01:54:13.198860 in-header: 03 a1 00 00 08 00 00 00
463 01:54:13.199067 in-data: 84 60 60 10 00 00 00 00
464 01:54:13.199272 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
465 01:54:13.199531 in-header: 03 a1 00 00 08 00 00 00
466 01:54:13.199789 in-data: 84 60 60 10 00 00 00 00
467 01:54:13.199992 ADC[3]: Raw value=1038187 ID=8
468 01:54:13.200199 Manufacturer: ef
469 01:54:13.200457 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
470 01:54:13.200716 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
471 01:54:13.200976 CBFS @ 21000 size 3d4000
472 01:54:13.201233 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
473 01:54:13.201509 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
474 01:54:13.201718 CBFS: Found @ offset 3c880 size 4b
475 01:54:13.201927 DRAM-K: Full Calibration
476 01:54:13.202135 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
477 01:54:13.202342 CBFS @ 21000 size 3d4000
478 01:54:13.202549 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
479 01:54:13.202757 CBFS: Locating 'fallback/dram'
480 01:54:13.202963 CBFS: Found @ offset 24b00 size 12268
481 01:54:13.203170 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
482 01:54:13.203396 ddr_geometry: 1, config: 0x0
483 01:54:13.203618 header.status = 0x0
484 01:54:13.203812 header.magic = 0x44524d4b (expected: 0x44524d4b)
485 01:54:13.204003 header.version = 0x5 (expected: 0x5)
486 01:54:13.204435 header.size = 0x8f0 (expected: 0x8f0)
487 01:54:13.204632 header.config = 0x0
488 01:54:13.204819 header.flags = 0x0
489 01:54:13.205004 header.checksum = 0x0
490 01:54:13.205192 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
491 01:54:13.205402 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
492 01:54:13.205591 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
493 01:54:13.205776 ddr_geometry:1
494 01:54:13.205960 [EMI] new MDL number = 1
495 01:54:13.206143 dram_cbt_mode_extern: 0
496 01:54:13.206325 dram_cbt_mode [RK0]: 0, [RK1]: 0
497 01:54:13.206529 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
498 01:54:13.206667
499 01:54:13.206774
500 01:54:13.206875 [Bianco] ETT version 0.0.0.1
501 01:54:13.206975 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
502 01:54:13.207075
503 01:54:13.207174 vSetVcoreByFreq with vcore:762500, freq=1600
504 01:54:13.207278
505 01:54:13.207377 [DramcInit]
506 01:54:13.207477 AutoRefreshCKEOff AutoREF OFF
507 01:54:13.207575 DDRPhyPLLSetting-CKEOFF
508 01:54:13.207674 DDRPhyPLLSetting-CKEON
509 01:54:13.207773
510 01:54:13.207871 Enable WDQS
511 01:54:13.207970 [ModeRegInit_LP4] CH0 RK0
512 01:54:13.208069 Write Rank0 MR13 =0x18
513 01:54:13.208167 Write Rank0 MR12 =0x5d
514 01:54:13.208266 Write Rank0 MR1 =0x56
515 01:54:13.208366 Write Rank0 MR2 =0x1a
516 01:54:13.208502 Write Rank0 MR11 =0x0
517 01:54:13.208604 Write Rank0 MR22 =0x38
518 01:54:13.208704 Write Rank0 MR14 =0x5d
519 01:54:13.208802 Write Rank0 MR3 =0x30
520 01:54:13.208900 Write Rank0 MR13 =0x58
521 01:54:13.208998 Write Rank0 MR12 =0x5d
522 01:54:13.209097 Write Rank0 MR1 =0x56
523 01:54:13.209195 Write Rank0 MR2 =0x2d
524 01:54:13.209315 Write Rank0 MR11 =0x23
525 01:54:13.209417 Write Rank0 MR22 =0x34
526 01:54:13.209516 Write Rank0 MR14 =0x10
527 01:54:13.209614 Write Rank0 MR3 =0x30
528 01:54:13.209712 Write Rank0 MR13 =0xd8
529 01:54:13.209818 [ModeRegInit_LP4] CH0 RK1
530 01:54:13.209960 Write Rank1 MR13 =0x18
531 01:54:13.210099 Write Rank1 MR12 =0x5d
532 01:54:13.210235 Write Rank1 MR1 =0x56
533 01:54:13.210372 Write Rank1 MR2 =0x1a
534 01:54:13.210509 Write Rank1 MR11 =0x0
535 01:54:13.210679 Write Rank1 MR22 =0x38
536 01:54:13.210850 Write Rank1 MR14 =0x5d
537 01:54:13.211020 Write Rank1 MR3 =0x30
538 01:54:13.211191 Write Rank1 MR13 =0x58
539 01:54:13.211325 Write Rank1 MR12 =0x5d
540 01:54:13.211503 Write Rank1 MR1 =0x56
541 01:54:13.211650 Write Rank1 MR2 =0x2d
542 01:54:13.211796 Write Rank1 MR11 =0x23
543 01:54:13.211917 Write Rank1 MR22 =0x34
544 01:54:13.212034 Write Rank1 MR14 =0x10
545 01:54:13.212150 Write Rank1 MR3 =0x30
546 01:54:13.212295 Write Rank1 MR13 =0xd8
547 01:54:13.212442 [ModeRegInit_LP4] CH1 RK0
548 01:54:13.212558 Write Rank0 MR13 =0x18
549 01:54:13.212705 Write Rank0 MR12 =0x5d
550 01:54:13.212852 Write Rank0 MR1 =0x56
551 01:54:13.212998 Write Rank0 MR2 =0x1a
552 01:54:13.213144 Write Rank0 MR11 =0x0
553 01:54:13.213299 Write Rank0 MR22 =0x38
554 01:54:13.213448 Write Rank0 MR14 =0x5d
555 01:54:13.213595 Write Rank0 MR3 =0x30
556 01:54:13.213741 Write Rank0 MR13 =0x58
557 01:54:13.213892 Write Rank0 MR12 =0x5d
558 01:54:13.214039 Write Rank0 MR1 =0x56
559 01:54:13.214186 Write Rank0 MR2 =0x2d
560 01:54:13.214332 Write Rank0 MR11 =0x23
561 01:54:13.214478 Write Rank0 MR22 =0x34
562 01:54:13.214624 Write Rank0 MR14 =0x10
563 01:54:13.214770 Write Rank0 MR3 =0x30
564 01:54:13.214916 Write Rank0 MR13 =0xd8
565 01:54:13.215062 [ModeRegInit_LP4] CH1 RK1
566 01:54:13.215208 Write Rank1 MR13 =0x18
567 01:54:13.215354 Write Rank1 MR12 =0x5d
568 01:54:13.215521 Write Rank1 MR1 =0x56
569 01:54:13.215678 Write Rank1 MR2 =0x1a
570 01:54:13.215814 Write Rank1 MR11 =0x0
571 01:54:13.215948 Write Rank1 MR22 =0x38
572 01:54:13.216082 Write Rank1 MR14 =0x5d
573 01:54:13.216214 Write Rank1 MR3 =0x30
574 01:54:13.216346 Write Rank1 MR13 =0x58
575 01:54:13.216490 Write Rank1 MR12 =0x5d
576 01:54:13.216606 Write Rank1 MR1 =0x56
577 01:54:13.216721 Write Rank1 MR2 =0x2d
578 01:54:13.216836 Write Rank1 MR11 =0x23
579 01:54:13.216952 Write Rank1 MR22 =0x34
580 01:54:13.217067 Write Rank1 MR14 =0x10
581 01:54:13.217183 Write Rank1 MR3 =0x30
582 01:54:13.217302 Write Rank1 MR13 =0xd8
583 01:54:13.217382 match AC timing 3
584 01:54:13.217458 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
585 01:54:13.217536 [MiockJmeterHQA]
586 01:54:13.217612 vSetVcoreByFreq with vcore:762500, freq=1600
587 01:54:13.217687
588 01:54:13.217761 MIOCK jitter meter ch=0
589 01:54:13.217837
590 01:54:13.217911 1T = (99-17) = 82 dly cells
591 01:54:13.217988 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
592 01:54:13.218063 vSetVcoreByFreq with vcore:725000, freq=1200
593 01:54:13.218137
594 01:54:13.218211 MIOCK jitter meter ch=0
595 01:54:13.218286
596 01:54:13.218359 1T = (94-16) = 78 dly cells
597 01:54:13.218435 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
598 01:54:13.218510 vSetVcoreByFreq with vcore:725000, freq=800
599 01:54:13.218585
600 01:54:13.218660 MIOCK jitter meter ch=0
601 01:54:13.218734
602 01:54:13.218808 1T = (94-16) = 78 dly cells
603 01:54:13.218884 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
604 01:54:13.218959 vSetVcoreByFreq with vcore:762500, freq=1600
605 01:54:13.219034 vSetVcoreByFreq with vcore:762500, freq=1600
606 01:54:13.219109
607 01:54:13.219183 K DRVP
608 01:54:13.219257 1. OCD DRVP=0 CALOUT=0
609 01:54:13.219334 1. OCD DRVP=1 CALOUT=0
610 01:54:13.219410 1. OCD DRVP=2 CALOUT=0
611 01:54:13.219486 1. OCD DRVP=3 CALOUT=0
612 01:54:13.219562 1. OCD DRVP=4 CALOUT=0
613 01:54:13.219638 1. OCD DRVP=5 CALOUT=0
614 01:54:13.219713 1. OCD DRVP=6 CALOUT=0
615 01:54:13.219790 1. OCD DRVP=7 CALOUT=0
616 01:54:13.219864 1. OCD DRVP=8 CALOUT=0
617 01:54:13.219940 1. OCD DRVP=9 CALOUT=1
618 01:54:13.220016
619 01:54:13.220090 1. OCD DRVP calibration OK! DRVP=9
620 01:54:13.220166
621 01:54:13.220240
622 01:54:13.220314
623 01:54:13.220387 K ODTN
624 01:54:13.220461 3. OCD ODTN=0 ,CALOUT=1
625 01:54:13.220541 3. OCD ODTN=1 ,CALOUT=1
626 01:54:13.220617 3. OCD ODTN=2 ,CALOUT=1
627 01:54:13.220693 3. OCD ODTN=3 ,CALOUT=1
628 01:54:13.220769 3. OCD ODTN=4 ,CALOUT=1
629 01:54:13.220845 3. OCD ODTN=5 ,CALOUT=1
630 01:54:13.220925 3. OCD ODTN=6 ,CALOUT=1
631 01:54:13.221001 3. OCD ODTN=7 ,CALOUT=0
632 01:54:13.221076
633 01:54:13.221151 3. OCD ODTN calibration OK! ODTN=7
634 01:54:13.221227
635 01:54:13.221310 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
636 01:54:13.221385 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
637 01:54:13.221460 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
638 01:54:13.221541
639 01:54:13.221607 K DRVP
640 01:54:13.221672 1. OCD DRVP=0 CALOUT=0
641 01:54:13.221740 1. OCD DRVP=1 CALOUT=0
642 01:54:13.221808 1. OCD DRVP=2 CALOUT=0
643 01:54:13.221875 1. OCD DRVP=3 CALOUT=0
644 01:54:13.221943 1. OCD DRVP=4 CALOUT=0
645 01:54:13.222011 1. OCD DRVP=5 CALOUT=0
646 01:54:13.222079 1. OCD DRVP=6 CALOUT=0
647 01:54:13.222146 1. OCD DRVP=7 CALOUT=0
648 01:54:13.222213 1. OCD DRVP=8 CALOUT=0
649 01:54:13.222281 1. OCD DRVP=9 CALOUT=0
650 01:54:13.222547 1. OCD DRVP=10 CALOUT=1
651 01:54:13.222627
652 01:54:13.222696 1. OCD DRVP calibration OK! DRVP=10
653 01:54:13.222764
654 01:54:13.222832
655 01:54:13.222898
656 01:54:13.222964 K ODTN
657 01:54:13.223030 3. OCD ODTN=0 ,CALOUT=1
658 01:54:13.223098 3. OCD ODTN=1 ,CALOUT=1
659 01:54:13.223166 3. OCD ODTN=2 ,CALOUT=1
660 01:54:13.223233 3. OCD ODTN=3 ,CALOUT=1
661 01:54:13.223301 3. OCD ODTN=4 ,CALOUT=1
662 01:54:13.223369 3. OCD ODTN=5 ,CALOUT=1
663 01:54:13.223436 3. OCD ODTN=6 ,CALOUT=1
664 01:54:13.223504 3. OCD ODTN=7 ,CALOUT=1
665 01:54:13.223573 3. OCD ODTN=8 ,CALOUT=1
666 01:54:13.223640 3. OCD ODTN=9 ,CALOUT=1
667 01:54:13.223707 3. OCD ODTN=10 ,CALOUT=1
668 01:54:13.223774 3. OCD ODTN=11 ,CALOUT=1
669 01:54:13.223841 3. OCD ODTN=12 ,CALOUT=1
670 01:54:13.223909 3. OCD ODTN=13 ,CALOUT=1
671 01:54:13.223976 3. OCD ODTN=14 ,CALOUT=0
672 01:54:13.224043
673 01:54:13.224109 3. OCD ODTN calibration OK! ODTN=14
674 01:54:13.224176
675 01:54:13.224243 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14
676 01:54:13.224310 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14
677 01:54:13.224378 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)
678 01:54:13.224445
679 01:54:13.224511 [DramcInit]
680 01:54:13.224577 AutoRefreshCKEOff AutoREF OFF
681 01:54:13.224643 DDRPhyPLLSetting-CKEOFF
682 01:54:13.224709 DDRPhyPLLSetting-CKEON
683 01:54:13.224775
684 01:54:13.224841 Enable WDQS
685 01:54:13.224907 ==
686 01:54:13.224974 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
687 01:54:13.225041 fsp= 1, odt_onoff= 1, Byte mode= 0
688 01:54:13.225108 ==
689 01:54:13.225175 [Duty_Offset_Calibration]
690 01:54:13.225240
691 01:54:13.225319 ===========================
692 01:54:13.225388 B0:0 B1:1 CA:1
693 01:54:13.225454 ==
694 01:54:13.225520 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
695 01:54:13.225588 fsp= 1, odt_onoff= 1, Byte mode= 0
696 01:54:13.225656 ==
697 01:54:13.225722 [Duty_Offset_Calibration]
698 01:54:13.225788
699 01:54:13.225855 ===========================
700 01:54:13.225922 B0:1 B1:1 CA:0
701 01:54:13.225988 [ModeRegInit_LP4] CH0 RK0
702 01:54:13.226054 Write Rank0 MR13 =0x18
703 01:54:13.226121 Write Rank0 MR12 =0x5d
704 01:54:13.226187 Write Rank0 MR1 =0x56
705 01:54:13.226253 Write Rank0 MR2 =0x1a
706 01:54:13.226320 Write Rank0 MR11 =0x0
707 01:54:13.226386 Write Rank0 MR22 =0x38
708 01:54:13.226464 Write Rank0 MR14 =0x5d
709 01:54:13.226523 Write Rank0 MR3 =0x30
710 01:54:13.226582 Write Rank0 MR13 =0x58
711 01:54:13.226642 Write Rank0 MR12 =0x5d
712 01:54:13.226702 Write Rank0 MR1 =0x56
713 01:54:13.226761 Write Rank0 MR2 =0x2d
714 01:54:13.226820 Write Rank0 MR11 =0x23
715 01:54:13.226880 Write Rank0 MR22 =0x34
716 01:54:13.226939 Write Rank0 MR14 =0x10
717 01:54:13.226998 Write Rank0 MR3 =0x30
718 01:54:13.227058 Write Rank0 MR13 =0xd8
719 01:54:13.227117 [ModeRegInit_LP4] CH0 RK1
720 01:54:13.227177 Write Rank1 MR13 =0x18
721 01:54:13.227236 Write Rank1 MR12 =0x5d
722 01:54:13.227299 Write Rank1 MR1 =0x56
723 01:54:13.227358 Write Rank1 MR2 =0x1a
724 01:54:13.227418 Write Rank1 MR11 =0x0
725 01:54:13.227478 Write Rank1 MR22 =0x38
726 01:54:13.227538 Write Rank1 MR14 =0x5d
727 01:54:13.227597 Write Rank1 MR3 =0x30
728 01:54:13.227657 Write Rank1 MR13 =0x58
729 01:54:13.227717 Write Rank1 MR12 =0x5d
730 01:54:13.227776 Write Rank1 MR1 =0x56
731 01:54:13.227836 Write Rank1 MR2 =0x2d
732 01:54:13.227895 Write Rank1 MR11 =0x23
733 01:54:13.227954 Write Rank1 MR22 =0x34
734 01:54:13.228014 Write Rank1 MR14 =0x10
735 01:54:13.228074 Write Rank1 MR3 =0x30
736 01:54:13.228133 Write Rank1 MR13 =0xd8
737 01:54:13.228192 [ModeRegInit_LP4] CH1 RK0
738 01:54:13.228252 Write Rank0 MR13 =0x18
739 01:54:13.228312 Write Rank0 MR12 =0x5d
740 01:54:13.228371 Write Rank0 MR1 =0x56
741 01:54:13.228430 Write Rank0 MR2 =0x1a
742 01:54:13.228490 Write Rank0 MR11 =0x0
743 01:54:13.228550 Write Rank0 MR22 =0x38
744 01:54:13.228609 Write Rank0 MR14 =0x5d
745 01:54:13.228669 Write Rank0 MR3 =0x30
746 01:54:13.228728 Write Rank0 MR13 =0x58
747 01:54:13.228787 Write Rank0 MR12 =0x5d
748 01:54:13.228847 Write Rank0 MR1 =0x56
749 01:54:13.228906 Write Rank0 MR2 =0x2d
750 01:54:13.228966 Write Rank0 MR11 =0x23
751 01:54:13.229026 Write Rank0 MR22 =0x34
752 01:54:13.229085 Write Rank0 MR14 =0x10
753 01:54:13.229144 Write Rank0 MR3 =0x30
754 01:54:13.229203 Write Rank0 MR13 =0xd8
755 01:54:13.229272 [ModeRegInit_LP4] CH1 RK1
756 01:54:13.229335 Write Rank1 MR13 =0x18
757 01:54:13.229394 Write Rank1 MR12 =0x5d
758 01:54:13.229454 Write Rank1 MR1 =0x56
759 01:54:13.229513 Write Rank1 MR2 =0x1a
760 01:54:13.229573 Write Rank1 MR11 =0x0
761 01:54:13.229632 Write Rank1 MR22 =0x38
762 01:54:13.229692 Write Rank1 MR14 =0x5d
763 01:54:13.229752 Write Rank1 MR3 =0x30
764 01:54:13.229811 Write Rank1 MR13 =0x58
765 01:54:13.229870 Write Rank1 MR12 =0x5d
766 01:54:13.229929 Write Rank1 MR1 =0x56
767 01:54:13.229988 Write Rank1 MR2 =0x2d
768 01:54:13.230048 Write Rank1 MR11 =0x23
769 01:54:13.230107 Write Rank1 MR22 =0x34
770 01:54:13.230166 Write Rank1 MR14 =0x10
771 01:54:13.230225 Write Rank1 MR3 =0x30
772 01:54:13.230285 Write Rank1 MR13 =0xd8
773 01:54:13.230344 match AC timing 3
774 01:54:13.230405 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
775 01:54:13.230466 DramC Write-DBI off
776 01:54:13.230526 DramC Read-DBI off
777 01:54:13.230586 Write Rank0 MR13 =0x59
778 01:54:13.230645 ==
779 01:54:13.230705 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
780 01:54:13.230766 fsp= 1, odt_onoff= 1, Byte mode= 0
781 01:54:13.230826 ==
782 01:54:13.230886 === u2Vref_new: 0x56 --> 0x2d
783 01:54:13.230946 === u2Vref_new: 0x58 --> 0x38
784 01:54:13.231006 === u2Vref_new: 0x5a --> 0x39
785 01:54:13.231066 === u2Vref_new: 0x5c --> 0x3c
786 01:54:13.231126 === u2Vref_new: 0x5e --> 0x3d
787 01:54:13.231186 === u2Vref_new: 0x60 --> 0xa0
788 01:54:13.231246
789 01:54:13.231305 CBT Vref found, early break!
790 01:54:13.231365 [CA 0] Center 33 (4~63) winsize 60
791 01:54:13.231425 [CA 1] Center 34 (5~63) winsize 59
792 01:54:13.231494 [CA 2] Center 29 (1~57) winsize 57
793 01:54:13.231549 [CA 3] Center 24 (-3~51) winsize 55
794 01:54:13.231603 [CA 4] Center 24 (-3~52) winsize 56
795 01:54:13.231658 [CA 5] Center 30 (2~58) winsize 57
796 01:54:13.231712
797 01:54:13.231766 [CATrainingPosCal] consider 1 rank data
798 01:54:13.231821 u2DelayCellTimex100 = 762/100 ps
799 01:54:13.231875 CA0 delay=33 (4~63),Diff = 9 PI (11 cell)
800 01:54:13.231929 CA1 delay=34 (5~63),Diff = 10 PI (12 cell)
801 01:54:13.231983 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
802 01:54:13.232038 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
803 01:54:13.232092 CA4 delay=24 (-3~52),Diff = 0 PI (0 cell)
804 01:54:13.232146 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
805 01:54:13.232201
806 01:54:13.232255 CA PerBit enable=1, Macro0, CA PI delay=24
807 01:54:13.232309 === u2Vref_new: 0x56 --> 0x2d
808 01:54:13.232363
809 01:54:13.232417 Vref(ca) range 1: 22
810 01:54:13.232471
811 01:54:13.232525 CS Dly= 10 (41-0-32)
812 01:54:13.232579 Write Rank0 MR13 =0xd8
813 01:54:13.232633 Write Rank0 MR13 =0xd8
814 01:54:13.232687 Write Rank0 MR12 =0x56
815 01:54:13.232948 Write Rank1 MR13 =0x59
816 01:54:13.233008 ==
817 01:54:13.233064 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
818 01:54:13.233119 fsp= 1, odt_onoff= 1, Byte mode= 0
819 01:54:13.233174 ==
820 01:54:13.233230 === u2Vref_new: 0x56 --> 0x2d
821 01:54:13.233295 === u2Vref_new: 0x58 --> 0x38
822 01:54:13.233351 === u2Vref_new: 0x5a --> 0x39
823 01:54:13.233406 === u2Vref_new: 0x5c --> 0x3c
824 01:54:13.233461 === u2Vref_new: 0x5e --> 0x3d
825 01:54:13.233516 === u2Vref_new: 0x60 --> 0xa0
826 01:54:13.233571 [CA 0] Center 34 (5~63) winsize 59
827 01:54:13.233625 [CA 1] Center 34 (6~63) winsize 58
828 01:54:13.233680 [CA 2] Center 29 (0~58) winsize 59
829 01:54:13.233735 [CA 3] Center 23 (-4~51) winsize 56
830 01:54:13.233789 [CA 4] Center 24 (-3~52) winsize 56
831 01:54:13.233845 [CA 5] Center 30 (1~59) winsize 59
832 01:54:13.233899
833 01:54:13.233953 [CATrainingPosCal] consider 2 rank data
834 01:54:13.234008 u2DelayCellTimex100 = 762/100 ps
835 01:54:13.234063 CA0 delay=34 (5~63),Diff = 10 PI (12 cell)
836 01:54:13.234118 CA1 delay=34 (6~63),Diff = 10 PI (12 cell)
837 01:54:13.234173 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
838 01:54:13.234227 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
839 01:54:13.234282 CA4 delay=24 (-3~52),Diff = 0 PI (0 cell)
840 01:54:13.234337 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
841 01:54:13.234391
842 01:54:13.234445 CA PerBit enable=1, Macro0, CA PI delay=24
843 01:54:13.234500 === u2Vref_new: 0x56 --> 0x2d
844 01:54:13.234554
845 01:54:13.234608 Vref(ca) range 1: 22
846 01:54:13.234663
847 01:54:13.234716 CS Dly= 11 (42-0-32)
848 01:54:13.234770 Write Rank1 MR13 =0xd8
849 01:54:13.234825 Write Rank1 MR13 =0xd8
850 01:54:13.234879 Write Rank1 MR12 =0x56
851 01:54:13.234933 [RankSwap] Rank num 2, (Multi 1), Rank 0
852 01:54:13.234988 Write Rank0 MR2 =0xad
853 01:54:13.235042 [Write Leveling]
854 01:54:13.235096 delay byte0 byte1 byte2 byte3
855 01:54:13.235151
856 01:54:13.235206 10 0 0
857 01:54:13.235262 11 0 0
858 01:54:13.235317 12 0 0
859 01:54:13.235373 13 0 0
860 01:54:13.235427 14 0 0
861 01:54:13.235482 15 0 0
862 01:54:13.235537 16 0 0
863 01:54:13.235592 17 0 0
864 01:54:13.235647 18 0 0
865 01:54:13.235701 19 0 0
866 01:54:13.235756 20 0 0
867 01:54:13.235811 21 0 0
868 01:54:13.235866 22 0 0
869 01:54:13.235921 23 0 0
870 01:54:13.235976 24 0 0
871 01:54:13.236031 25 0 0
872 01:54:13.236086 26 0 0
873 01:54:13.236141 27 0 0
874 01:54:13.236196 28 0 ff
875 01:54:13.236251 29 0 ff
876 01:54:13.236306 30 0 ff
877 01:54:13.236361 31 0 ff
878 01:54:13.236416 32 0 ff
879 01:54:13.236484 33 0 ff
880 01:54:13.236537 34 ff ff
881 01:54:13.236591 35 ff ff
882 01:54:13.236644 36 ff ff
883 01:54:13.236698 37 ff ff
884 01:54:13.236752 38 ff ff
885 01:54:13.236806 39 ff ff
886 01:54:13.236860 40 ff ff
887 01:54:13.236914 pass bytecount = 0xff (0xff: all bytes pass)
888 01:54:13.236968
889 01:54:13.237021 DQS0 dly: 34
890 01:54:13.237074 DQS1 dly: 28
891 01:54:13.237126 Write Rank0 MR2 =0x2d
892 01:54:13.237180 [RankSwap] Rank num 2, (Multi 1), Rank 0
893 01:54:13.237233 Write Rank0 MR1 =0xd6
894 01:54:13.237334 [Gating]
895 01:54:13.237388 ==
896 01:54:13.237441 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
897 01:54:13.237494 fsp= 1, odt_onoff= 1, Byte mode= 0
898 01:54:13.237547 ==
899 01:54:13.237601 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
900 01:54:13.237656 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
901 01:54:13.237711 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
902 01:54:13.237765 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
903 01:54:13.237820 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
904 01:54:13.237875 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
905 01:54:13.237929 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
906 01:54:13.237983 3 1 28 |302 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
907 01:54:13.238037 3 2 0 |707 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
908 01:54:13.238091 3 2 4 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
909 01:54:13.238146 3 2 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
910 01:54:13.238201 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
911 01:54:13.238255 3 2 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
912 01:54:13.238313 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
913 01:54:13.238368 3 2 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
914 01:54:13.238422 3 2 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
915 01:54:13.238476 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
916 01:54:13.238530 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
917 01:54:13.238584 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
918 01:54:13.238638 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
919 01:54:13.238693 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
920 01:54:13.238746 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
921 01:54:13.238800 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
922 01:54:13.238854 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
923 01:54:13.238908 3 4 0 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
924 01:54:13.238962 3 4 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
925 01:54:13.239016 3 4 8 |3d3d 2a2a |(11 11)(11 11) |(1 1)(1 1)| 0
926 01:54:13.239071 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
927 01:54:13.239125 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 01:54:13.239179 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 01:54:13.239233 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 01:54:13.239287 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 01:54:13.239341 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 01:54:13.239395 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 01:54:13.239449 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 01:54:13.239503 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
935 01:54:13.239557 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
936 01:54:13.239611 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
937 01:54:13.239666 [Byte 0] Lead/lag falling Transition (3, 5, 20)
938 01:54:13.239719 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
939 01:54:13.239773 [Byte 1] Lead/lag falling Transition (3, 5, 24)
940 01:54:13.239826 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
941 01:54:13.240072 [Byte 0] Lead/lag Transition tap number (3)
942 01:54:13.240131 3 6 0 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
943 01:54:13.240187 [Byte 1] Lead/lag Transition tap number (3)
944 01:54:13.240241 3 6 4 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
945 01:54:13.240296 [Byte 0]First pass (3, 6, 4)
946 01:54:13.240350 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
947 01:54:13.240405 [Byte 1]First pass (3, 6, 8)
948 01:54:13.240458 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 01:54:13.240513 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
950 01:54:13.240567 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 01:54:13.240622 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 01:54:13.240676 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 01:54:13.240729 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 01:54:13.240784 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
955 01:54:13.240838 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
956 01:54:13.240892 All bytes gating window > 1UI, Early break!
957 01:54:13.240946
958 01:54:13.241003 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
959 01:54:13.241093
960 01:54:13.241184 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
961 01:54:13.241308
962 01:54:13.241398
963 01:54:13.241471
964 01:54:13.241562 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
965 01:54:13.241654
966 01:54:13.241745 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
967 01:54:13.241837
968 01:54:13.241932
969 01:54:13.242023 Write Rank0 MR1 =0x56
970 01:54:13.242114
971 01:54:13.242205 best RODT dly(2T, 0.5T) = (2, 2)
972 01:54:13.242297
973 01:54:13.242389 best RODT dly(2T, 0.5T) = (2, 2)
974 01:54:13.242480 ==
975 01:54:13.242573 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
976 01:54:13.242664 fsp= 1, odt_onoff= 1, Byte mode= 0
977 01:54:13.242757 ==
978 01:54:13.242849 Start DQ dly to find pass range UseTestEngine =0
979 01:54:13.242941 x-axis: bit #, y-axis: DQ dly (-127~63)
980 01:54:13.243034 RX Vref Scan = 0
981 01:54:13.243125 -26, [0] xxxxxxxx xxxxxxxx [MSB]
982 01:54:13.243220 -25, [0] xxxxxxxx xxxxxxxx [MSB]
983 01:54:13.243314 -24, [0] xxxxxxxx xxxxxxxx [MSB]
984 01:54:13.243408 -23, [0] xxxxxxxx xxxxxxxx [MSB]
985 01:54:13.243502 -22, [0] xxxxxxxx xxxxxxxx [MSB]
986 01:54:13.243596 -21, [0] xxxxxxxx xxxxxxxx [MSB]
987 01:54:13.243689 -20, [0] xxxxxxxx xxxxxxxx [MSB]
988 01:54:13.243783 -19, [0] xxxxxxxx xxxxxxxx [MSB]
989 01:54:13.243876 -18, [0] xxxxxxxx xxxxxxxx [MSB]
990 01:54:13.243970 -17, [0] xxxxxxxx xxxxxxxx [MSB]
991 01:54:13.244064 -16, [0] xxxxxxxx xxxxxxxx [MSB]
992 01:54:13.244158 -15, [0] xxxxxxxx xxxxxxxx [MSB]
993 01:54:13.244252 -14, [0] xxxxxxxx xxxxxxxx [MSB]
994 01:54:13.244345 -13, [0] xxxxxxxx xxxxxxxx [MSB]
995 01:54:13.244438 -12, [0] xxxxxxxx xxxxxxxx [MSB]
996 01:54:13.244532 -11, [0] xxxxxxxx xxxxxxxx [MSB]
997 01:54:13.244625 -10, [0] xxxxxxxx xxxxxxxx [MSB]
998 01:54:13.244718 -9, [0] xxxxxxxx xxxxxxxx [MSB]
999 01:54:13.244811 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1000 01:54:13.244904 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1001 01:54:13.244997 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1002 01:54:13.245090 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1003 01:54:13.245184 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1004 01:54:13.245344 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1005 01:54:13.245443 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1006 01:54:13.245538 -1, [0] xxxxxxxx xxxxxxxx [MSB]
1007 01:54:13.245636 0, [0] xxxoxoxx xxxxxxxx [MSB]
1008 01:54:13.245731 1, [0] xxxoxoxx xxxoxxxx [MSB]
1009 01:54:13.245826 2, [0] xxxoxoxx xxxoxxxx [MSB]
1010 01:54:13.245921 3, [0] xxxoxooo oxxoxoox [MSB]
1011 01:54:13.246017 4, [0] xxxoxooo oxxoxoox [MSB]
1012 01:54:13.246113 5, [0] xxxoxooo ooxooooo [MSB]
1013 01:54:13.246208 6, [0] xxxoxooo ooxooooo [MSB]
1014 01:54:13.246303 7, [0] xxoooooo ooxooooo [MSB]
1015 01:54:13.246397 8, [0] xooooooo oooooooo [MSB]
1016 01:54:13.246490 9, [0] xooooooo oooooooo [MSB]
1017 01:54:13.246584 10, [0] xooooooo oooooooo [MSB]
1018 01:54:13.246678 32, [0] oooxoooo oooooooo [MSB]
1019 01:54:13.246772 33, [0] oooxoooo oooooxoo [MSB]
1020 01:54:13.246865 34, [0] oooxoxxo oooooxxo [MSB]
1021 01:54:13.246959 35, [0] oooxoxxx xooooxxo [MSB]
1022 01:54:13.247052 36, [0] oooxoxxx xooxxxxx [MSB]
1023 01:54:13.247145 37, [0] oooxoxxx xxoxxxxx [MSB]
1024 01:54:13.247239 38, [0] oooxoxxx xxoxxxxx [MSB]
1025 01:54:13.247343 39, [0] oooxoxxx xxoxxxxx [MSB]
1026 01:54:13.247442 40, [0] oooxxxxx xxoxxxxx [MSB]
1027 01:54:13.247537 41, [0] xoxxxxxx xxoxxxxx [MSB]
1028 01:54:13.247632 42, [0] xxxxxxxx xxxxxxxx [MSB]
1029 01:54:13.247726 iDelay=42, Bit 0, Center 25 (11 ~ 40) 30
1030 01:54:13.247817 iDelay=42, Bit 1, Center 24 (8 ~ 41) 34
1031 01:54:13.247909 iDelay=42, Bit 2, Center 23 (7 ~ 40) 34
1032 01:54:13.248001 iDelay=42, Bit 3, Center 15 (0 ~ 31) 32
1033 01:54:13.248092 iDelay=42, Bit 4, Center 23 (7 ~ 39) 33
1034 01:54:13.248184 iDelay=42, Bit 5, Center 16 (0 ~ 33) 34
1035 01:54:13.248275 iDelay=42, Bit 6, Center 18 (3 ~ 33) 31
1036 01:54:13.248366 iDelay=42, Bit 7, Center 18 (3 ~ 34) 32
1037 01:54:13.248457 iDelay=42, Bit 8, Center 18 (3 ~ 34) 32
1038 01:54:13.248547 iDelay=42, Bit 9, Center 20 (5 ~ 36) 32
1039 01:54:13.248637 iDelay=42, Bit 10, Center 24 (8 ~ 41) 34
1040 01:54:13.248728 iDelay=42, Bit 11, Center 18 (1 ~ 35) 35
1041 01:54:13.248818 iDelay=42, Bit 12, Center 20 (5 ~ 35) 31
1042 01:54:13.248909 iDelay=42, Bit 13, Center 17 (3 ~ 32) 30
1043 01:54:13.248999 iDelay=42, Bit 14, Center 18 (3 ~ 33) 31
1044 01:54:13.249089 iDelay=42, Bit 15, Center 20 (5 ~ 35) 31
1045 01:54:13.249179 ==
1046 01:54:13.249304 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1047 01:54:13.249411 fsp= 1, odt_onoff= 1, Byte mode= 0
1048 01:54:13.249507 ==
1049 01:54:13.249599 DQS Delay:
1050 01:54:13.249689 DQS0 = 0, DQS1 = 0
1051 01:54:13.249781 DQM Delay:
1052 01:54:13.249872 DQM0 = 20, DQM1 = 19
1053 01:54:13.249963 DQ Delay:
1054 01:54:13.250053 DQ0 =25, DQ1 =24, DQ2 =23, DQ3 =15
1055 01:54:13.250144 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
1056 01:54:13.250234 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =18
1057 01:54:13.250324 DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20
1058 01:54:13.250415
1059 01:54:13.250504
1060 01:54:13.250594 DramC Write-DBI off
1061 01:54:13.250684 ==
1062 01:54:13.250775 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1063 01:54:13.250865 fsp= 1, odt_onoff= 1, Byte mode= 0
1064 01:54:13.250956 ==
1065 01:54:13.251046 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1066 01:54:13.251136
1067 01:54:13.251226 Begin, DQ Scan Range 924~1180
1068 01:54:13.251316
1069 01:54:13.251406
1070 01:54:13.251496 TX Vref Scan disable
1071 01:54:13.251587 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1072 01:54:13.251680 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1073 01:54:13.251968 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1074 01:54:13.252062 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1075 01:54:13.252157 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1076 01:54:13.252251 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1077 01:54:13.252345 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1078 01:54:13.252439 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1079 01:54:13.252532 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1080 01:54:13.252625 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1081 01:54:13.252718 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1082 01:54:13.252811 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1083 01:54:13.252904 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1084 01:54:13.252997 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1085 01:54:13.253089 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1086 01:54:13.253183 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1087 01:54:13.253312 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1088 01:54:13.253421 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1089 01:54:13.253515 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1090 01:54:13.253608 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1091 01:54:13.253701 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1092 01:54:13.253794 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1093 01:54:13.253886 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1094 01:54:13.253979 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1095 01:54:13.254071 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1096 01:54:13.254163 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1097 01:54:13.254256 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1098 01:54:13.254348 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1099 01:54:13.254440 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1100 01:54:13.254533 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1101 01:54:13.254625 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1102 01:54:13.254717 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1103 01:54:13.254810 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1104 01:54:13.254902 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1105 01:54:13.254994 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1106 01:54:13.255087 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1107 01:54:13.255179 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1108 01:54:13.255271 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1109 01:54:13.255363 962 |3 6 2|[0] xxxxxxxx xxxoxxxx [MSB]
1110 01:54:13.255456 963 |3 6 3|[0] xxxxxxxx oxxoxoxx [MSB]
1111 01:54:13.255549 964 |3 6 4|[0] xxxxxxxx oxxoxoxx [MSB]
1112 01:54:13.255641 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1113 01:54:13.255734 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1114 01:54:13.255826 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1115 01:54:13.255919 968 |3 6 8|[0] xxxxxxxx ooxooooo [MSB]
1116 01:54:13.256011 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
1117 01:54:13.256104 970 |3 6 10|[0] xxxoxoxx oooooooo [MSB]
1118 01:54:13.256196 971 |3 6 11|[0] xxxoxoox oooooooo [MSB]
1119 01:54:13.256288 972 |3 6 12|[0] xxxoxoox oooooooo [MSB]
1120 01:54:13.256380 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1121 01:54:13.256473 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1122 01:54:13.256565 975 |3 6 15|[0] xxxooooo oooooooo [MSB]
1123 01:54:13.256658 976 |3 6 16|[0] xooooooo oooooooo [MSB]
1124 01:54:13.256750 986 |3 6 26|[0] oooooooo oooooxoo [MSB]
1125 01:54:13.256842 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1126 01:54:13.256934 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1127 01:54:13.257027 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1128 01:54:13.257119 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1129 01:54:13.257211 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1130 01:54:13.257351 992 |3 6 32|[0] oooxoooo xxxxxxxx [MSB]
1131 01:54:13.257444 993 |3 6 33|[0] oooxoxoo xxxxxxxx [MSB]
1132 01:54:13.257537 994 |3 6 34|[0] oooxoxxo xxxxxxxx [MSB]
1133 01:54:13.257629 995 |3 6 35|[0] xxxxxxxx xxxxxxxx [MSB]
1134 01:54:13.257722 Byte0, DQ PI dly=982, DQM PI dly= 982
1135 01:54:13.257812 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1136 01:54:13.257903
1137 01:54:13.257993 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1138 01:54:13.258084
1139 01:54:13.258173 Byte1, DQ PI dly=975, DQM PI dly= 975
1140 01:54:13.258263 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1141 01:54:13.258354
1142 01:54:13.258444 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1143 01:54:13.258534
1144 01:54:13.258623 ==
1145 01:54:13.258713 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1146 01:54:13.258803 fsp= 1, odt_onoff= 1, Byte mode= 0
1147 01:54:13.258894 ==
1148 01:54:13.258984 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1149 01:54:13.259074
1150 01:54:13.259163 Begin, DQ Scan Range 951~1015
1151 01:54:13.259254 Write Rank0 MR14 =0x0
1152 01:54:13.259344
1153 01:54:13.259433 CH=0, VrefRange= 0, VrefLevel = 0
1154 01:54:13.259523 TX Bit0 (978~996) 19 987, Bit8 (966~984) 19 975,
1155 01:54:13.259614 TX Bit1 (977~994) 18 985, Bit9 (967~984) 18 975,
1156 01:54:13.259705 TX Bit2 (978~994) 17 986, Bit10 (970~989) 20 979,
1157 01:54:13.259796 TX Bit3 (971~988) 18 979, Bit11 (966~983) 18 974,
1158 01:54:13.259887 TX Bit4 (976~995) 20 985, Bit12 (967~984) 18 975,
1159 01:54:13.259977 TX Bit5 (973~990) 18 981, Bit13 (967~982) 16 974,
1160 01:54:13.260067 TX Bit6 (975~990) 16 982, Bit14 (968~984) 17 976,
1161 01:54:13.260158 TX Bit7 (978~991) 14 984, Bit15 (969~985) 17 977,
1162 01:54:13.260248
1163 01:54:13.260337 Write Rank0 MR14 =0x2
1164 01:54:13.260432
1165 01:54:13.260519 CH=0, VrefRange= 0, VrefLevel = 2
1166 01:54:13.260602 TX Bit0 (978~996) 19 987, Bit8 (965~983) 19 974,
1167 01:54:13.260685 TX Bit1 (978~995) 18 986, Bit9 (967~984) 18 975,
1168 01:54:13.260768 TX Bit2 (978~994) 17 986, Bit10 (970~989) 20 979,
1169 01:54:13.260851 TX Bit3 (971~989) 19 980, Bit11 (965~983) 19 974,
1170 01:54:13.260933 TX Bit4 (976~995) 20 985, Bit12 (967~984) 18 975,
1171 01:54:13.261016 TX Bit5 (973~990) 18 981, Bit13 (967~983) 17 975,
1172 01:54:13.261098 TX Bit6 (974~991) 18 982, Bit14 (968~984) 17 976,
1173 01:54:13.261180 TX Bit7 (977~992) 16 984, Bit15 (969~986) 18 977,
1174 01:54:13.261266
1175 01:54:13.261360 Write Rank0 MR14 =0x4
1176 01:54:13.261442
1177 01:54:13.261523 CH=0, VrefRange= 0, VrefLevel = 4
1178 01:54:13.261605 TX Bit0 (978~997) 20 987, Bit8 (965~984) 20 974,
1179 01:54:13.261688 TX Bit1 (977~995) 19 986, Bit9 (967~984) 18 975,
1180 01:54:13.261970 TX Bit2 (977~994) 18 985, Bit10 (970~989) 20 979,
1181 01:54:13.262057 TX Bit3 (971~990) 20 980, Bit11 (964~984) 21 974,
1182 01:54:13.262140 TX Bit4 (976~996) 21 986, Bit12 (967~985) 19 976,
1183 01:54:13.262222 TX Bit5 (972~990) 19 981, Bit13 (965~983) 19 974,
1184 01:54:13.262304 TX Bit6 (974~991) 18 982, Bit14 (967~985) 19 976,
1185 01:54:13.262387 TX Bit7 (977~992) 16 984, Bit15 (969~986) 18 977,
1186 01:54:13.262468
1187 01:54:13.262549 Write Rank0 MR14 =0x6
1188 01:54:13.262629
1189 01:54:13.262710 CH=0, VrefRange= 0, VrefLevel = 6
1190 01:54:13.262791 TX Bit0 (977~997) 21 987, Bit8 (965~984) 20 974,
1191 01:54:13.262873 TX Bit1 (977~996) 20 986, Bit9 (966~985) 20 975,
1192 01:54:13.262955 TX Bit2 (977~995) 19 986, Bit10 (970~990) 21 980,
1193 01:54:13.263037 TX Bit3 (970~990) 21 980, Bit11 (964~984) 21 974,
1194 01:54:13.263119 TX Bit4 (976~996) 21 986, Bit12 (967~984) 18 975,
1195 01:54:13.263200 TX Bit5 (972~991) 20 981, Bit13 (966~983) 18 974,
1196 01:54:13.263287 TX Bit6 (973~991) 19 982, Bit14 (967~985) 19 976,
1197 01:54:13.263382 TX Bit7 (977~993) 17 985, Bit15 (969~987) 19 978,
1198 01:54:13.263467
1199 01:54:13.263548 Write Rank0 MR14 =0x8
1200 01:54:13.263629
1201 01:54:13.263710 CH=0, VrefRange= 0, VrefLevel = 8
1202 01:54:13.263792 TX Bit0 (977~998) 22 987, Bit8 (964~985) 22 974,
1203 01:54:13.263874 TX Bit1 (977~996) 20 986, Bit9 (966~985) 20 975,
1204 01:54:13.263957 TX Bit2 (976~996) 21 986, Bit10 (969~990) 22 979,
1205 01:54:13.264039 TX Bit3 (970~990) 21 980, Bit11 (963~985) 23 974,
1206 01:54:13.264122 TX Bit4 (976~996) 21 986, Bit12 (966~985) 20 975,
1207 01:54:13.264204 TX Bit5 (971~991) 21 981, Bit13 (965~984) 20 974,
1208 01:54:13.264286 TX Bit6 (973~991) 19 982, Bit14 (967~986) 20 976,
1209 01:54:13.264368 TX Bit7 (976~993) 18 984, Bit15 (969~988) 20 978,
1210 01:54:13.264449
1211 01:54:13.264530 Write Rank0 MR14 =0xa
1212 01:54:13.264610
1213 01:54:13.264691 CH=0, VrefRange= 0, VrefLevel = 10
1214 01:54:13.264773 TX Bit0 (978~998) 21 988, Bit8 (965~985) 21 975,
1215 01:54:13.264855 TX Bit1 (977~997) 21 987, Bit9 (966~985) 20 975,
1216 01:54:13.264937 TX Bit2 (976~996) 21 986, Bit10 (969~990) 22 979,
1217 01:54:13.265020 TX Bit3 (970~991) 22 980, Bit11 (963~985) 23 974,
1218 01:54:13.265102 TX Bit4 (975~997) 23 986, Bit12 (966~986) 21 976,
1219 01:54:13.265184 TX Bit5 (971~991) 21 981, Bit13 (965~984) 20 974,
1220 01:54:13.265297 TX Bit6 (972~992) 21 982, Bit14 (967~986) 20 976,
1221 01:54:13.265369 TX Bit7 (976~994) 19 985, Bit15 (968~989) 22 978,
1222 01:54:13.265422
1223 01:54:13.265474 Write Rank0 MR14 =0xc
1224 01:54:13.265527
1225 01:54:13.265579 CH=0, VrefRange= 0, VrefLevel = 12
1226 01:54:13.265631 TX Bit0 (977~998) 22 987, Bit8 (963~986) 24 974,
1227 01:54:13.265684 TX Bit1 (976~997) 22 986, Bit9 (965~986) 22 975,
1228 01:54:13.265736 TX Bit2 (976~997) 22 986, Bit10 (969~990) 22 979,
1229 01:54:13.265789 TX Bit3 (970~991) 22 980, Bit11 (963~985) 23 974,
1230 01:54:13.265841 TX Bit4 (975~998) 24 986, Bit12 (966~987) 22 976,
1231 01:54:13.265894 TX Bit5 (971~992) 22 981, Bit13 (963~985) 23 974,
1232 01:54:13.265946 TX Bit6 (972~992) 21 982, Bit14 (966~987) 22 976,
1233 01:54:13.265999 TX Bit7 (976~994) 19 985, Bit15 (968~989) 22 978,
1234 01:54:13.266051
1235 01:54:13.266103 Write Rank0 MR14 =0xe
1236 01:54:13.266155
1237 01:54:13.266207 CH=0, VrefRange= 0, VrefLevel = 14
1238 01:54:13.266259 TX Bit0 (977~999) 23 988, Bit8 (963~986) 24 974,
1239 01:54:13.266310 TX Bit1 (977~997) 21 987, Bit9 (965~987) 23 976,
1240 01:54:13.266362 TX Bit2 (976~997) 22 986, Bit10 (969~991) 23 980,
1241 01:54:13.266415 TX Bit3 (969~991) 23 980, Bit11 (962~986) 25 974,
1242 01:54:13.266467 TX Bit4 (975~998) 24 986, Bit12 (964~987) 24 975,
1243 01:54:13.266519 TX Bit5 (971~992) 22 981, Bit13 (964~985) 22 974,
1244 01:54:13.266571 TX Bit6 (971~993) 23 982, Bit14 (966~988) 23 977,
1245 01:54:13.266623 TX Bit7 (975~995) 21 985, Bit15 (968~989) 22 978,
1246 01:54:13.266675
1247 01:54:13.266726 Write Rank0 MR14 =0x10
1248 01:54:13.266778
1249 01:54:13.266830 CH=0, VrefRange= 0, VrefLevel = 16
1250 01:54:13.266882 TX Bit0 (976~999) 24 987, Bit8 (962~986) 25 974,
1251 01:54:13.266935 TX Bit1 (976~998) 23 987, Bit9 (964~987) 24 975,
1252 01:54:13.266987 TX Bit2 (976~998) 23 987, Bit10 (969~991) 23 980,
1253 01:54:13.267040 TX Bit3 (969~991) 23 980, Bit11 (962~987) 26 974,
1254 01:54:13.267092 TX Bit4 (974~999) 26 986, Bit12 (964~988) 25 976,
1255 01:54:13.267144 TX Bit5 (970~992) 23 981, Bit13 (964~986) 23 975,
1256 01:54:13.267196 TX Bit6 (971~993) 23 982, Bit14 (965~989) 25 977,
1257 01:54:13.267248 TX Bit7 (975~995) 21 985, Bit15 (968~989) 22 978,
1258 01:54:13.267301
1259 01:54:13.267353 Write Rank0 MR14 =0x12
1260 01:54:13.267405
1261 01:54:13.267456 CH=0, VrefRange= 0, VrefLevel = 18
1262 01:54:13.267508 TX Bit0 (977~999) 23 988, Bit8 (963~987) 25 975,
1263 01:54:13.267560 TX Bit1 (976~998) 23 987, Bit9 (964~988) 25 976,
1264 01:54:13.267613 TX Bit2 (975~998) 24 986, Bit10 (969~991) 23 980,
1265 01:54:13.267665 TX Bit3 (969~992) 24 980, Bit11 (962~988) 27 975,
1266 01:54:13.267717 TX Bit4 (974~999) 26 986, Bit12 (964~988) 25 976,
1267 01:54:13.267770 TX Bit5 (970~993) 24 981, Bit13 (964~986) 23 975,
1268 01:54:13.267822 TX Bit6 (971~994) 24 982, Bit14 (964~989) 26 976,
1269 01:54:13.267874 TX Bit7 (974~996) 23 985, Bit15 (968~990) 23 979,
1270 01:54:13.267926
1271 01:54:13.267978 Write Rank0 MR14 =0x14
1272 01:54:13.268030
1273 01:54:13.268082 CH=0, VrefRange= 0, VrefLevel = 20
1274 01:54:13.268134 TX Bit0 (976~999) 24 987, Bit8 (962~988) 27 975,
1275 01:54:13.268187 TX Bit1 (975~999) 25 987, Bit9 (963~988) 26 975,
1276 01:54:13.268239 TX Bit2 (975~998) 24 986, Bit10 (969~992) 24 980,
1277 01:54:13.268291 TX Bit3 (969~992) 24 980, Bit11 (962~988) 27 975,
1278 01:54:13.268344 TX Bit4 (974~999) 26 986, Bit12 (964~989) 26 976,
1279 01:54:13.268587 TX Bit5 (970~993) 24 981, Bit13 (962~987) 26 974,
1280 01:54:13.268648 TX Bit6 (970~994) 25 982, Bit14 (964~989) 26 976,
1281 01:54:13.268703 TX Bit7 (974~997) 24 985, Bit15 (967~990) 24 978,
1282 01:54:13.268756
1283 01:54:13.268809 Write Rank0 MR14 =0x16
1284 01:54:13.268861
1285 01:54:13.268914 CH=0, VrefRange= 0, VrefLevel = 22
1286 01:54:13.268967 TX Bit0 (976~1000) 25 988, Bit8 (962~987) 26 974,
1287 01:54:13.269020 TX Bit1 (975~999) 25 987, Bit9 (963~989) 27 976,
1288 01:54:13.269072 TX Bit2 (975~999) 25 987, Bit10 (968~991) 24 979,
1289 01:54:13.269125 TX Bit3 (969~992) 24 980, Bit11 (962~988) 27 975,
1290 01:54:13.269178 TX Bit4 (974~999) 26 986, Bit12 (963~989) 27 976,
1291 01:54:13.269231 TX Bit5 (970~994) 25 982, Bit13 (962~988) 27 975,
1292 01:54:13.269294 TX Bit6 (970~995) 26 982, Bit14 (964~989) 26 976,
1293 01:54:13.269348 TX Bit7 (974~997) 24 985, Bit15 (967~990) 24 978,
1294 01:54:13.269401
1295 01:54:13.269453 Write Rank0 MR14 =0x18
1296 01:54:13.269505
1297 01:54:13.269557 CH=0, VrefRange= 0, VrefLevel = 24
1298 01:54:13.269610 TX Bit0 (976~1000) 25 988, Bit8 (962~987) 26 974,
1299 01:54:13.269662 TX Bit1 (975~999) 25 987, Bit9 (963~989) 27 976,
1300 01:54:13.269714 TX Bit2 (975~999) 25 987, Bit10 (968~991) 24 979,
1301 01:54:13.269766 TX Bit3 (969~992) 24 980, Bit11 (962~988) 27 975,
1302 01:54:13.269819 TX Bit4 (974~999) 26 986, Bit12 (963~989) 27 976,
1303 01:54:13.269871 TX Bit5 (970~994) 25 982, Bit13 (962~988) 27 975,
1304 01:54:13.269923 TX Bit6 (970~995) 26 982, Bit14 (964~989) 26 976,
1305 01:54:13.269975 TX Bit7 (974~997) 24 985, Bit15 (967~990) 24 978,
1306 01:54:13.270028
1307 01:54:13.270079 Write Rank0 MR14 =0x1a
1308 01:54:13.270131
1309 01:54:13.270183 CH=0, VrefRange= 0, VrefLevel = 26
1310 01:54:13.270235 TX Bit0 (976~1000) 25 988, Bit8 (962~987) 26 974,
1311 01:54:13.270287 TX Bit1 (975~999) 25 987, Bit9 (963~989) 27 976,
1312 01:54:13.270340 TX Bit2 (975~999) 25 987, Bit10 (968~991) 24 979,
1313 01:54:13.270392 TX Bit3 (969~992) 24 980, Bit11 (962~988) 27 975,
1314 01:54:13.270445 TX Bit4 (974~999) 26 986, Bit12 (963~989) 27 976,
1315 01:54:13.270498 TX Bit5 (970~994) 25 982, Bit13 (962~988) 27 975,
1316 01:54:13.270551 TX Bit6 (970~995) 26 982, Bit14 (964~989) 26 976,
1317 01:54:13.270604 TX Bit7 (974~997) 24 985, Bit15 (967~990) 24 978,
1318 01:54:13.270656
1319 01:54:13.270709 Write Rank0 MR14 =0x1c
1320 01:54:13.270760
1321 01:54:13.270812 CH=0, VrefRange= 0, VrefLevel = 28
1322 01:54:13.270864 TX Bit0 (976~1000) 25 988, Bit8 (962~987) 26 974,
1323 01:54:13.270917 TX Bit1 (975~999) 25 987, Bit9 (963~989) 27 976,
1324 01:54:13.270969 TX Bit2 (975~999) 25 987, Bit10 (968~991) 24 979,
1325 01:54:13.271022 TX Bit3 (969~992) 24 980, Bit11 (962~988) 27 975,
1326 01:54:13.271074 TX Bit4 (974~999) 26 986, Bit12 (963~989) 27 976,
1327 01:54:13.271126 TX Bit5 (970~994) 25 982, Bit13 (962~988) 27 975,
1328 01:54:13.271179 TX Bit6 (970~995) 26 982, Bit14 (964~989) 26 976,
1329 01:54:13.271231 TX Bit7 (974~997) 24 985, Bit15 (967~990) 24 978,
1330 01:54:13.271283
1331 01:54:13.271335 Write Rank0 MR14 =0x1e
1332 01:54:13.271387
1333 01:54:13.271439 CH=0, VrefRange= 0, VrefLevel = 30
1334 01:54:13.271491 TX Bit0 (976~1000) 25 988, Bit8 (962~987) 26 974,
1335 01:54:13.271543 TX Bit1 (975~999) 25 987, Bit9 (963~989) 27 976,
1336 01:54:13.271595 TX Bit2 (975~999) 25 987, Bit10 (968~991) 24 979,
1337 01:54:13.271648 TX Bit3 (969~992) 24 980, Bit11 (962~988) 27 975,
1338 01:54:13.271701 TX Bit4 (974~999) 26 986, Bit12 (963~989) 27 976,
1339 01:54:13.271753 TX Bit5 (970~994) 25 982, Bit13 (962~988) 27 975,
1340 01:54:13.271806 TX Bit6 (970~995) 26 982, Bit14 (964~989) 26 976,
1341 01:54:13.271859 TX Bit7 (974~997) 24 985, Bit15 (967~990) 24 978,
1342 01:54:13.271910
1343 01:54:13.271962
1344 01:54:13.272013 TX Vref found, early break! 376< 387
1345 01:54:13.272065 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1346 01:54:13.272118 u1DelayCellOfst[0]=10 cells (8 PI)
1347 01:54:13.272169 u1DelayCellOfst[1]=8 cells (7 PI)
1348 01:54:13.272222 u1DelayCellOfst[2]=8 cells (7 PI)
1349 01:54:13.272274 u1DelayCellOfst[3]=0 cells (0 PI)
1350 01:54:13.272326 u1DelayCellOfst[4]=7 cells (6 PI)
1351 01:54:13.272377 u1DelayCellOfst[5]=2 cells (2 PI)
1352 01:54:13.272429 u1DelayCellOfst[6]=2 cells (2 PI)
1353 01:54:13.272482 u1DelayCellOfst[7]=6 cells (5 PI)
1354 01:54:13.272534 Byte0, DQ PI dly=980, DQM PI dly= 984
1355 01:54:13.272586 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1356 01:54:13.272639
1357 01:54:13.272691 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1358 01:54:13.272743
1359 01:54:13.272795 u1DelayCellOfst[8]=0 cells (0 PI)
1360 01:54:13.272847 u1DelayCellOfst[9]=2 cells (2 PI)
1361 01:54:13.272898 u1DelayCellOfst[10]=6 cells (5 PI)
1362 01:54:13.272950 u1DelayCellOfst[11]=1 cells (1 PI)
1363 01:54:13.273002 u1DelayCellOfst[12]=2 cells (2 PI)
1364 01:54:13.273053 u1DelayCellOfst[13]=1 cells (1 PI)
1365 01:54:13.273105 u1DelayCellOfst[14]=2 cells (2 PI)
1366 01:54:13.273157 u1DelayCellOfst[15]=5 cells (4 PI)
1367 01:54:13.273209 Byte1, DQ PI dly=974, DQM PI dly= 976
1368 01:54:13.273268 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
1369 01:54:13.273323
1370 01:54:13.273374 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
1371 01:54:13.273427
1372 01:54:13.273478 Write Rank0 MR14 =0x16
1373 01:54:13.273529
1374 01:54:13.273580 Final TX Range 0 Vref 22
1375 01:54:13.273632
1376 01:54:13.273683 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1377 01:54:13.273735
1378 01:54:13.273787 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1379 01:54:13.273839 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1380 01:54:13.273891 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1381 01:54:13.273943 Write Rank0 MR3 =0xb0
1382 01:54:13.273995 DramC Write-DBI on
1383 01:54:13.274047 ==
1384 01:54:13.274098 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1385 01:54:13.274150 fsp= 1, odt_onoff= 1, Byte mode= 0
1386 01:54:13.274202 ==
1387 01:54:13.274254 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1388 01:54:13.274306
1389 01:54:13.274549 Begin, DQ Scan Range 696~760
1390 01:54:13.274607
1391 01:54:13.274660
1392 01:54:13.274712 TX Vref Scan disable
1393 01:54:13.274764 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1394 01:54:13.274818 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1395 01:54:13.274872 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1396 01:54:13.274925 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1397 01:54:13.274978 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1398 01:54:13.275031 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1399 01:54:13.275083 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1400 01:54:13.275137 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1401 01:54:13.275190 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1402 01:54:13.275243 705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]
1403 01:54:13.275296 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1404 01:54:13.275348 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1405 01:54:13.275401 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1406 01:54:13.275454 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1407 01:54:13.275507 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1408 01:54:13.275559 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1409 01:54:13.275612 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1410 01:54:13.275665 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1411 01:54:13.275717 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1412 01:54:13.275770 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1413 01:54:13.275824 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1414 01:54:13.275876 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1415 01:54:13.275929 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1416 01:54:13.275982 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1417 01:54:13.276034 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1418 01:54:13.276087 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1419 01:54:13.276139 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1420 01:54:13.276193 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1421 01:54:13.276246 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1422 01:54:13.276298 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1423 01:54:13.276351 Byte0, DQ PI dly=729, DQM PI dly= 729
1424 01:54:13.276402 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
1425 01:54:13.276455
1426 01:54:13.276506 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
1427 01:54:13.276558
1428 01:54:13.276610 Byte1, DQ PI dly=719, DQM PI dly= 719
1429 01:54:13.276661 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 15)
1430 01:54:13.276713
1431 01:54:13.276764 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 15)
1432 01:54:13.276816
1433 01:54:13.276867 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1434 01:54:13.276920 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1435 01:54:13.276972 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1436 01:54:13.277024 Write Rank0 MR3 =0x30
1437 01:54:13.277077 DramC Write-DBI off
1438 01:54:13.277129
1439 01:54:13.277180 [DATLAT]
1440 01:54:13.277231 Freq=1600, CH0 RK0, use_rxtx_scan=0
1441 01:54:13.277294
1442 01:54:13.277346 DATLAT Default: 0xf
1443 01:54:13.277397 7, 0xFFFF, sum=0
1444 01:54:13.277450 8, 0xFFFF, sum=0
1445 01:54:13.277503 9, 0xFFFF, sum=0
1446 01:54:13.277556 10, 0xFFFF, sum=0
1447 01:54:13.277608 11, 0xFFFF, sum=0
1448 01:54:13.277660 12, 0xFFFF, sum=0
1449 01:54:13.277712 13, 0xFFFF, sum=0
1450 01:54:13.277764 14, 0x0, sum=1
1451 01:54:13.277815 15, 0x0, sum=2
1452 01:54:13.277867 16, 0x0, sum=3
1453 01:54:13.277920 17, 0x0, sum=4
1454 01:54:13.277973 pattern=2 first_step=14 total pass=5 best_step=16
1455 01:54:13.278025 ==
1456 01:54:13.278077 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1457 01:54:13.278130 fsp= 1, odt_onoff= 1, Byte mode= 0
1458 01:54:13.278182 ==
1459 01:54:13.278233 Start DQ dly to find pass range UseTestEngine =1
1460 01:54:13.278285 x-axis: bit #, y-axis: DQ dly (-127~63)
1461 01:54:13.278337 RX Vref Scan = 1
1462 01:54:13.278389
1463 01:54:13.278440 RX Vref found, early break!
1464 01:54:13.278492
1465 01:54:13.278543 Final RX Vref 13, apply to both rank0 and 1
1466 01:54:13.278595 ==
1467 01:54:13.278647 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1468 01:54:13.278699 fsp= 1, odt_onoff= 1, Byte mode= 0
1469 01:54:13.278752 ==
1470 01:54:13.278803 DQS Delay:
1471 01:54:13.278854 DQS0 = 0, DQS1 = 0
1472 01:54:13.278905 DQM Delay:
1473 01:54:13.278957 DQM0 = 20, DQM1 = 19
1474 01:54:13.279008 DQ Delay:
1475 01:54:13.279060 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15
1476 01:54:13.279111 DQ4 =22, DQ5 =16, DQ6 =18, DQ7 =19
1477 01:54:13.279163 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =16
1478 01:54:13.279215 DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20
1479 01:54:13.279267
1480 01:54:13.279318
1481 01:54:13.279370
1482 01:54:13.279421 [DramC_TX_OE_Calibration] TA2
1483 01:54:13.279473 Original DQ_B0 (3 6) =30, OEN = 27
1484 01:54:13.279525 Original DQ_B1 (3 6) =30, OEN = 27
1485 01:54:13.279577 23, 0x0, End_B0=23 End_B1=23
1486 01:54:13.279630 24, 0x0, End_B0=24 End_B1=24
1487 01:54:13.279683 25, 0x0, End_B0=25 End_B1=25
1488 01:54:13.279736 26, 0x0, End_B0=26 End_B1=26
1489 01:54:13.279789 27, 0x0, End_B0=27 End_B1=27
1490 01:54:13.279841 28, 0x0, End_B0=28 End_B1=28
1491 01:54:13.279894 29, 0x0, End_B0=29 End_B1=29
1492 01:54:13.279947 30, 0x0, End_B0=30 End_B1=30
1493 01:54:13.279999 31, 0xFFFF, End_B0=30 End_B1=30
1494 01:54:13.280052 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1495 01:54:13.280105 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1496 01:54:13.280157
1497 01:54:13.280208
1498 01:54:13.280259 Write Rank0 MR23 =0x3f
1499 01:54:13.280311 [DQSOSC]
1500 01:54:13.280362 [DQSOSCAuto] RK0, (LSB)MR18= 0xad, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
1501 01:54:13.280415 CH0_RK0: MR19=0x3, MR18=0xAD, DQSOSC=334, MR23=63, INC=22, DEC=33
1502 01:54:13.280467 Write Rank0 MR23 =0x3f
1503 01:54:13.280518 [DQSOSC]
1504 01:54:13.280569 [DQSOSCAuto] RK0, (LSB)MR18= 0xaa, (MSB)MR19= 0x3, tDQSOscB0 = 335 ps tDQSOscB1 = 0 ps
1505 01:54:13.280621 CH0 RK0: MR19=3, MR18=AA
1506 01:54:13.280673 [RankSwap] Rank num 2, (Multi 1), Rank 1
1507 01:54:13.280725 Write Rank0 MR2 =0xad
1508 01:54:13.280777 [Write Leveling]
1509 01:54:13.280829 delay byte0 byte1 byte2 byte3
1510 01:54:13.280880
1511 01:54:13.280932 10 0 0
1512 01:54:13.280984 11 0 0
1513 01:54:13.281037 12 0 0
1514 01:54:13.281088 13 0 0
1515 01:54:13.281141 14 0 0
1516 01:54:13.281193 15 0 0
1517 01:54:13.281246 16 0 0
1518 01:54:13.281345 17 0 0
1519 01:54:13.281398 18 0 0
1520 01:54:13.281450 19 0 0
1521 01:54:13.281502 20 0 0
1522 01:54:13.281554 21 0 0
1523 01:54:13.281608 22 0 0
1524 01:54:13.281660 23 0 0
1525 01:54:13.281712 24 0 0
1526 01:54:13.281765 25 0 0
1527 01:54:13.281817 26 0 0
1528 01:54:13.281869 27 0 0
1529 01:54:13.281921 28 0 0
1530 01:54:13.281974 29 0 0
1531 01:54:13.282026 30 0 ff
1532 01:54:13.282079 31 0 ff
1533 01:54:13.282323 32 0 ff
1534 01:54:13.282382 33 0 ff
1535 01:54:13.282436 34 ff ff
1536 01:54:13.282489 35 ff ff
1537 01:54:13.282541 36 ff ff
1538 01:54:13.282594 37 ff ff
1539 01:54:13.282647 38 ff ff
1540 01:54:13.282699 39 ff ff
1541 01:54:13.282752 40 ff ff
1542 01:54:13.282804 pass bytecount = 0xff (0xff: all bytes pass)
1543 01:54:13.282856
1544 01:54:13.282907 DQS0 dly: 34
1545 01:54:13.282959 DQS1 dly: 30
1546 01:54:13.283011 Write Rank0 MR2 =0x2d
1547 01:54:13.283063 [RankSwap] Rank num 2, (Multi 1), Rank 0
1548 01:54:13.283114 Write Rank1 MR1 =0xd6
1549 01:54:13.283166 [Gating]
1550 01:54:13.283236 ==
1551 01:54:13.283289 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1552 01:54:13.283342 fsp= 1, odt_onoff= 1, Byte mode= 0
1553 01:54:13.283394 ==
1554 01:54:13.283446 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1555 01:54:13.283499 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1556 01:54:13.283551 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1557 01:54:13.283604 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1558 01:54:13.283656 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1559 01:54:13.283709 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1560 01:54:13.283762 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1561 01:54:13.283815 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1562 01:54:13.283867 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1563 01:54:13.283920 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1564 01:54:13.283973 3 2 8 |2c2c 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1565 01:54:13.284027 3 2 12 |201 2c2c |(11 11)(11 11) |(0 0)(0 0)| 0
1566 01:54:13.284080 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1567 01:54:13.284133 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1568 01:54:13.284186 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1569 01:54:13.284238 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1570 01:54:13.284291 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1571 01:54:13.284343 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1572 01:54:13.284395 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1573 01:54:13.284448 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1574 01:54:13.284501 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1575 01:54:13.284553 [Byte 1] Lead/lag falling Transition (3, 3, 16)
1576 01:54:13.284605 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1577 01:54:13.284658 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1578 01:54:13.284711 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1579 01:54:13.284764 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1580 01:54:13.284816 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1581 01:54:13.284869 3 4 8 |1110 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1582 01:54:13.284921 3 4 12 |707 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1583 01:54:13.284975 3 4 16 |3d3d 1514 |(11 11)(11 11) |(1 1)(1 1)| 0
1584 01:54:13.285028 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1585 01:54:13.285081 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1586 01:54:13.285134 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1587 01:54:13.285187 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1588 01:54:13.285240 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1589 01:54:13.285332 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1590 01:54:13.285386 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1591 01:54:13.285439 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1592 01:54:13.285492 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1593 01:54:13.285545 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1594 01:54:13.285597 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1595 01:54:13.285651 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1596 01:54:13.285703 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1597 01:54:13.285755 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1598 01:54:13.285807 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1599 01:54:13.285862 [Byte 0] Lead/lag Transition tap number (2)
1600 01:54:13.285914 3 6 8 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1601 01:54:13.285967 [Byte 1] Lead/lag Transition tap number (3)
1602 01:54:13.286019 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
1603 01:54:13.286072 [Byte 0]First pass (3, 6, 12)
1604 01:54:13.286124 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1605 01:54:13.286177 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1606 01:54:13.286230 [Byte 1]First pass (3, 6, 20)
1607 01:54:13.286282 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1608 01:54:13.286334 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1609 01:54:13.286387 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1610 01:54:13.286439 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1611 01:54:13.286492 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1612 01:54:13.286545 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1613 01:54:13.286598 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1614 01:54:13.286651 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1615 01:54:13.286703 All bytes gating window > 1UI, Early break!
1616 01:54:13.286755
1617 01:54:13.286807 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1618 01:54:13.286859
1619 01:54:13.286911 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)
1620 01:54:13.286962
1621 01:54:13.287014
1622 01:54:13.287065
1623 01:54:13.287116 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1624 01:54:13.287182
1625 01:54:13.287264 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1626 01:54:13.287344
1627 01:54:13.287430
1628 01:54:13.287486 Write Rank1 MR1 =0x56
1629 01:54:13.287539
1630 01:54:13.287590 best RODT dly(2T, 0.5T) = (2, 3)
1631 01:54:13.287642
1632 01:54:13.287693 best RODT dly(2T, 0.5T) = (2, 3)
1633 01:54:13.287745 ==
1634 01:54:13.287796 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1635 01:54:13.287849 fsp= 1, odt_onoff= 1, Byte mode= 0
1636 01:54:13.287901 ==
1637 01:54:13.287952 Start DQ dly to find pass range UseTestEngine =0
1638 01:54:13.288004 x-axis: bit #, y-axis: DQ dly (-127~63)
1639 01:54:13.288057 RX Vref Scan = 0
1640 01:54:13.288110 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1641 01:54:13.288163 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1642 01:54:13.288215 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1643 01:54:13.288269 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1644 01:54:13.288515 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1645 01:54:13.288577 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1646 01:54:13.288631 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1647 01:54:13.288684 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1648 01:54:13.288737 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1649 01:54:13.288790 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1650 01:54:13.288842 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1651 01:54:13.288895 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1652 01:54:13.288948 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1653 01:54:13.289000 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1654 01:54:13.289053 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1655 01:54:13.289105 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1656 01:54:13.289159 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1657 01:54:13.289211 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1658 01:54:13.289327 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1659 01:54:13.289383 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1660 01:54:13.289436 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1661 01:54:13.289489 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1662 01:54:13.289541 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1663 01:54:13.289594 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1664 01:54:13.289647 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1665 01:54:13.289700 -1, [0] xxxoxxxx xxxxxxxx [MSB]
1666 01:54:13.289752 0, [0] xxxoxxxx oxxoxoxx [MSB]
1667 01:54:13.289805 1, [0] xxxoxoxo ooxoooox [MSB]
1668 01:54:13.289858 2, [0] xxxoxooo ooxoooox [MSB]
1669 01:54:13.289911 3, [0] xxxoxooo ooxoooox [MSB]
1670 01:54:13.289963 4, [0] xxxoxooo ooxooooo [MSB]
1671 01:54:13.290015 5, [0] xxxoxooo oooooooo [MSB]
1672 01:54:13.290067 6, [0] xxxooooo oooooooo [MSB]
1673 01:54:13.290120 7, [0] xooooooo oooooooo [MSB]
1674 01:54:13.290172 8, [0] xooooooo oooooooo [MSB]
1675 01:54:13.290225 34, [0] oooooooo oooooooo [MSB]
1676 01:54:13.290277 35, [0] oooxoooo oooooooo [MSB]
1677 01:54:13.290330 36, [0] oooxoooo oooxoxxo [MSB]
1678 01:54:13.290384 37, [0] oooxoxxx xooxoxxo [MSB]
1679 01:54:13.290437 38, [0] oooxoxxx xxoxxxxo [MSB]
1680 01:54:13.290489 39, [0] oooxoxxx xxoxxxxx [MSB]
1681 01:54:13.290541 40, [0] oooxoxxx xxoxxxxx [MSB]
1682 01:54:13.290594 41, [0] oooxoxxx xxoxxxxx [MSB]
1683 01:54:13.290647 42, [0] oooxxxxx xxoxxxxx [MSB]
1684 01:54:13.290699 43, [0] xoxxxxxx xxxxxxxx [MSB]
1685 01:54:13.290751 44, [0] xxxxxxxx xxxxxxxx [MSB]
1686 01:54:13.290804 iDelay=44, Bit 0, Center 25 (9 ~ 42) 34
1687 01:54:13.290856 iDelay=44, Bit 1, Center 25 (7 ~ 43) 37
1688 01:54:13.290908 iDelay=44, Bit 2, Center 24 (7 ~ 42) 36
1689 01:54:13.290960 iDelay=44, Bit 3, Center 16 (-1 ~ 34) 36
1690 01:54:13.291011 iDelay=44, Bit 4, Center 23 (6 ~ 41) 36
1691 01:54:13.291063 iDelay=44, Bit 5, Center 18 (1 ~ 36) 36
1692 01:54:13.291115 iDelay=44, Bit 6, Center 19 (2 ~ 36) 35
1693 01:54:13.291167 iDelay=44, Bit 7, Center 18 (1 ~ 36) 36
1694 01:54:13.291218 iDelay=44, Bit 8, Center 18 (0 ~ 36) 37
1695 01:54:13.291270 iDelay=44, Bit 9, Center 19 (1 ~ 37) 37
1696 01:54:13.291322 iDelay=44, Bit 10, Center 23 (5 ~ 42) 38
1697 01:54:13.291373 iDelay=44, Bit 11, Center 17 (0 ~ 35) 36
1698 01:54:13.291424 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
1699 01:54:13.291475 iDelay=44, Bit 13, Center 17 (0 ~ 35) 36
1700 01:54:13.291527 iDelay=44, Bit 14, Center 18 (1 ~ 35) 35
1701 01:54:13.291578 iDelay=44, Bit 15, Center 21 (4 ~ 38) 35
1702 01:54:13.291630 ==
1703 01:54:13.291682 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1704 01:54:13.291734 fsp= 1, odt_onoff= 1, Byte mode= 0
1705 01:54:13.291786 ==
1706 01:54:13.291837 DQS Delay:
1707 01:54:13.291888 DQS0 = 0, DQS1 = 0
1708 01:54:13.291940 DQM Delay:
1709 01:54:13.291991 DQM0 = 21, DQM1 = 19
1710 01:54:13.292041 DQ Delay:
1711 01:54:13.292093 DQ0 =25, DQ1 =25, DQ2 =24, DQ3 =16
1712 01:54:13.292145 DQ4 =23, DQ5 =18, DQ6 =19, DQ7 =18
1713 01:54:13.292196 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17
1714 01:54:13.292247 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =21
1715 01:54:13.292299
1716 01:54:13.292350
1717 01:54:13.292401 DramC Write-DBI off
1718 01:54:13.292453 ==
1719 01:54:13.292505 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1720 01:54:13.292556 fsp= 1, odt_onoff= 1, Byte mode= 0
1721 01:54:13.292608 ==
1722 01:54:13.292660 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1723 01:54:13.292712
1724 01:54:13.292763 Begin, DQ Scan Range 926~1182
1725 01:54:13.292815
1726 01:54:13.292866
1727 01:54:13.292917 TX Vref Scan disable
1728 01:54:13.292968 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1729 01:54:13.293021 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1730 01:54:13.293073 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1731 01:54:13.293126 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1732 01:54:13.293197 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1733 01:54:13.293316 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1734 01:54:13.293370 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1735 01:54:13.293423 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1736 01:54:13.293476 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1737 01:54:13.293529 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1738 01:54:13.293582 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1739 01:54:13.293634 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1740 01:54:13.293687 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1741 01:54:13.293740 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1742 01:54:13.293792 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1743 01:54:13.293845 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1744 01:54:13.293897 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1745 01:54:13.293950 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1746 01:54:13.294002 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1747 01:54:13.294054 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1748 01:54:13.294107 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1749 01:54:13.294160 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1750 01:54:13.294212 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1751 01:54:13.294265 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1752 01:54:13.294318 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1753 01:54:13.294370 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1754 01:54:13.294423 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1755 01:54:13.294476 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1756 01:54:13.294529 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1757 01:54:13.294582 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1758 01:54:13.294635 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1759 01:54:13.294687 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1760 01:54:13.294739 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1761 01:54:13.294792 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1762 01:54:13.294844 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1763 01:54:13.294897 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1764 01:54:13.295142 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1765 01:54:13.295201 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1766 01:54:13.295255 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1767 01:54:13.295308 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1768 01:54:13.295361 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1769 01:54:13.295415 967 |3 6 7|[0] xxxxxxxx oxxoxoxx [MSB]
1770 01:54:13.295468 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1771 01:54:13.295521 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1772 01:54:13.295574 970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]
1773 01:54:13.295627 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1774 01:54:13.295680 972 |3 6 12|[0] xxxoxoxx ooxooooo [MSB]
1775 01:54:13.295733 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1776 01:54:13.295786 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1777 01:54:13.295838 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1778 01:54:13.295891 976 |3 6 16|[0] xxxoxooo oooooooo [MSB]
1779 01:54:13.295944 977 |3 6 17|[0] xoxooooo oooooooo [MSB]
1780 01:54:13.295998 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1781 01:54:13.296050 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1782 01:54:13.296103 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1783 01:54:13.296156 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1784 01:54:13.296209 994 |3 6 34|[0] oooooxoo xxxxxxxx [MSB]
1785 01:54:13.296261 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1786 01:54:13.296314 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1787 01:54:13.296367 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1788 01:54:13.296420 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1789 01:54:13.296473 Byte0, DQ PI dly=984, DQM PI dly= 984
1790 01:54:13.296525 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1791 01:54:13.296577
1792 01:54:13.296628 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1793 01:54:13.296681
1794 01:54:13.296733 Byte1, DQ PI dly=979, DQM PI dly= 979
1795 01:54:13.296784 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1796 01:54:13.296836
1797 01:54:13.296887 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1798 01:54:13.296939
1799 01:54:13.296990 ==
1800 01:54:13.297041 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1801 01:54:13.297094 fsp= 1, odt_onoff= 1, Byte mode= 0
1802 01:54:13.297146 ==
1803 01:54:13.297198 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1804 01:54:13.297249
1805 01:54:13.297368 Begin, DQ Scan Range 955~1019
1806 01:54:13.297449 Write Rank1 MR14 =0x0
1807 01:54:13.297530
1808 01:54:13.297613 CH=0, VrefRange= 0, VrefLevel = 0
1809 01:54:13.297676 TX Bit0 (979~998) 20 988, Bit8 (969~986) 18 977,
1810 01:54:13.297729 TX Bit1 (978~997) 20 987, Bit9 (970~988) 19 979,
1811 01:54:13.297782 TX Bit2 (978~996) 19 987, Bit10 (975~991) 17 983,
1812 01:54:13.297835 TX Bit3 (974~991) 18 982, Bit11 (968~987) 20 977,
1813 01:54:13.297887 TX Bit4 (979~996) 18 987, Bit12 (969~988) 20 978,
1814 01:54:13.297939 TX Bit5 (976~990) 15 983, Bit13 (969~986) 18 977,
1815 01:54:13.297991 TX Bit6 (976~992) 17 984, Bit14 (969~987) 19 978,
1816 01:54:13.298043 TX Bit7 (977~993) 17 985, Bit15 (974~989) 16 981,
1817 01:54:13.298095
1818 01:54:13.298146 Write Rank1 MR14 =0x2
1819 01:54:13.298198
1820 01:54:13.298249 CH=0, VrefRange= 0, VrefLevel = 2
1821 01:54:13.298300 TX Bit0 (979~998) 20 988, Bit8 (969~987) 19 978,
1822 01:54:13.298353 TX Bit1 (978~997) 20 987, Bit9 (969~988) 20 978,
1823 01:54:13.298405 TX Bit2 (978~996) 19 987, Bit10 (975~991) 17 983,
1824 01:54:13.298457 TX Bit3 (973~991) 19 982, Bit11 (968~987) 20 977,
1825 01:54:13.298509 TX Bit4 (978~997) 20 987, Bit12 (969~988) 20 978,
1826 01:54:13.298562 TX Bit5 (976~991) 16 983, Bit13 (969~987) 19 978,
1827 01:54:13.298614 TX Bit6 (976~992) 17 984, Bit14 (969~987) 19 978,
1828 01:54:13.298665 TX Bit7 (977~993) 17 985, Bit15 (973~990) 18 981,
1829 01:54:13.298717
1830 01:54:13.298768 Write Rank1 MR14 =0x4
1831 01:54:13.298821
1832 01:54:13.298872 CH=0, VrefRange= 0, VrefLevel = 4
1833 01:54:13.298924 TX Bit0 (979~998) 20 988, Bit8 (968~988) 21 978,
1834 01:54:13.298976 TX Bit1 (978~998) 21 988, Bit9 (970~988) 19 979,
1835 01:54:13.299028 TX Bit2 (978~997) 20 987, Bit10 (975~991) 17 983,
1836 01:54:13.299080 TX Bit3 (972~991) 20 981, Bit11 (968~988) 21 978,
1837 01:54:13.299132 TX Bit4 (978~998) 21 988, Bit12 (969~989) 21 979,
1838 01:54:13.299184 TX Bit5 (975~991) 17 983, Bit13 (968~987) 20 977,
1839 01:54:13.299236 TX Bit6 (976~992) 17 984, Bit14 (969~988) 20 978,
1840 01:54:13.299287 TX Bit7 (978~994) 17 986, Bit15 (973~990) 18 981,
1841 01:54:13.299339
1842 01:54:13.299389 Write Rank1 MR14 =0x6
1843 01:54:13.299440
1844 01:54:13.299491 CH=0, VrefRange= 0, VrefLevel = 6
1845 01:54:13.299543 TX Bit0 (979~999) 21 989, Bit8 (968~988) 21 978,
1846 01:54:13.299594 TX Bit1 (978~998) 21 988, Bit9 (969~989) 21 979,
1847 01:54:13.299646 TX Bit2 (978~997) 20 987, Bit10 (974~992) 19 983,
1848 01:54:13.299698 TX Bit3 (972~992) 21 982, Bit11 (968~988) 21 978,
1849 01:54:13.299750 TX Bit4 (978~998) 21 988, Bit12 (968~989) 22 978,
1850 01:54:13.299802 TX Bit5 (975~991) 17 983, Bit13 (968~987) 20 977,
1851 01:54:13.299854 TX Bit6 (975~993) 19 984, Bit14 (969~989) 21 979,
1852 01:54:13.299905 TX Bit7 (977~995) 19 986, Bit15 (972~990) 19 981,
1853 01:54:13.299957
1854 01:54:13.300008 Write Rank1 MR14 =0x8
1855 01:54:13.300059
1856 01:54:13.300109 CH=0, VrefRange= 0, VrefLevel = 8
1857 01:54:13.300161 TX Bit0 (978~999) 22 988, Bit8 (968~989) 22 978,
1858 01:54:13.300212 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
1859 01:54:13.300264 TX Bit2 (978~998) 21 988, Bit10 (973~992) 20 982,
1860 01:54:13.300316 TX Bit3 (971~992) 22 981, Bit11 (968~989) 22 978,
1861 01:54:13.300368 TX Bit4 (978~998) 21 988, Bit12 (969~990) 22 979,
1862 01:54:13.300420 TX Bit5 (975~991) 17 983, Bit13 (968~988) 21 978,
1863 01:54:13.300472 TX Bit6 (975~993) 19 984, Bit14 (969~989) 21 979,
1864 01:54:13.300524 TX Bit7 (977~995) 19 986, Bit15 (972~990) 19 981,
1865 01:54:13.300575
1866 01:54:13.300626 Write Rank1 MR14 =0xa
1867 01:54:13.300677
1868 01:54:13.300730 CH=0, VrefRange= 0, VrefLevel = 10
1869 01:54:13.300781 TX Bit0 (978~999) 22 988, Bit8 (968~989) 22 978,
1870 01:54:13.300834 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
1871 01:54:13.301077 TX Bit2 (978~998) 21 988, Bit10 (974~992) 19 983,
1872 01:54:13.301135 TX Bit3 (971~993) 23 982, Bit11 (968~989) 22 978,
1873 01:54:13.301189 TX Bit4 (977~999) 23 988, Bit12 (968~990) 23 979,
1874 01:54:13.301241 TX Bit5 (974~992) 19 983, Bit13 (968~989) 22 978,
1875 01:54:13.301330 TX Bit6 (974~993) 20 983, Bit14 (969~990) 22 979,
1876 01:54:13.301398 TX Bit7 (977~996) 20 986, Bit15 (972~991) 20 981,
1877 01:54:13.301450
1878 01:54:13.301502 Write Rank1 MR14 =0xc
1879 01:54:13.301553
1880 01:54:13.301605 CH=0, VrefRange= 0, VrefLevel = 12
1881 01:54:13.301658 TX Bit0 (978~1000) 23 989, Bit8 (968~989) 22 978,
1882 01:54:13.301710 TX Bit1 (978~999) 22 988, Bit9 (969~990) 22 979,
1883 01:54:13.301762 TX Bit2 (978~999) 22 988, Bit10 (973~993) 21 983,
1884 01:54:13.301815 TX Bit3 (970~993) 24 981, Bit11 (967~990) 24 978,
1885 01:54:13.301867 TX Bit4 (978~999) 22 988, Bit12 (968~990) 23 979,
1886 01:54:13.301919 TX Bit5 (974~992) 19 983, Bit13 (968~989) 22 978,
1887 01:54:13.301971 TX Bit6 (974~994) 21 984, Bit14 (968~990) 23 979,
1888 01:54:13.302024 TX Bit7 (976~996) 21 986, Bit15 (971~991) 21 981,
1889 01:54:13.302075
1890 01:54:13.302126 Write Rank1 MR14 =0xe
1891 01:54:13.302178
1892 01:54:13.302229 CH=0, VrefRange= 0, VrefLevel = 14
1893 01:54:13.302281 TX Bit0 (978~1000) 23 989, Bit8 (968~990) 23 979,
1894 01:54:13.302333 TX Bit1 (977~999) 23 988, Bit9 (968~990) 23 979,
1895 01:54:13.302385 TX Bit2 (977~999) 23 988, Bit10 (973~993) 21 983,
1896 01:54:13.302438 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
1897 01:54:13.302490 TX Bit4 (978~999) 22 988, Bit12 (968~990) 23 979,
1898 01:54:13.302541 TX Bit5 (972~992) 21 982, Bit13 (967~989) 23 978,
1899 01:54:13.302593 TX Bit6 (974~995) 22 984, Bit14 (968~990) 23 979,
1900 01:54:13.302645 TX Bit7 (976~997) 22 986, Bit15 (970~992) 23 981,
1901 01:54:13.302698
1902 01:54:13.302748 Write Rank1 MR14 =0x10
1903 01:54:13.302800
1904 01:54:13.302851 CH=0, VrefRange= 0, VrefLevel = 16
1905 01:54:13.302904 TX Bit0 (978~1000) 23 989, Bit8 (968~990) 23 979,
1906 01:54:13.302957 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
1907 01:54:13.303009 TX Bit2 (977~999) 23 988, Bit10 (973~993) 21 983,
1908 01:54:13.303061 TX Bit3 (970~994) 25 982, Bit11 (966~990) 25 978,
1909 01:54:13.303113 TX Bit4 (977~999) 23 988, Bit12 (968~991) 24 979,
1910 01:54:13.303165 TX Bit5 (973~993) 21 983, Bit13 (967~990) 24 978,
1911 01:54:13.303218 TX Bit6 (973~995) 23 984, Bit14 (968~990) 23 979,
1912 01:54:13.303269 TX Bit7 (976~998) 23 987, Bit15 (970~992) 23 981,
1913 01:54:13.303321
1914 01:54:13.303372 Write Rank1 MR14 =0x12
1915 01:54:13.303424
1916 01:54:13.303484 CH=0, VrefRange= 0, VrefLevel = 18
1917 01:54:13.303539 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1918 01:54:13.303591 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
1919 01:54:13.303643 TX Bit2 (977~999) 23 988, Bit10 (972~994) 23 983,
1920 01:54:13.303695 TX Bit3 (970~995) 26 982, Bit11 (967~990) 24 978,
1921 01:54:13.303746 TX Bit4 (977~1000) 24 988, Bit12 (968~991) 24 979,
1922 01:54:13.303798 TX Bit5 (972~993) 22 982, Bit13 (967~990) 24 978,
1923 01:54:13.303851 TX Bit6 (972~996) 25 984, Bit14 (968~991) 24 979,
1924 01:54:13.303903 TX Bit7 (976~998) 23 987, Bit15 (971~992) 22 981,
1925 01:54:13.303954
1926 01:54:13.304006 Write Rank1 MR14 =0x14
1927 01:54:13.304057
1928 01:54:13.304108 CH=0, VrefRange= 0, VrefLevel = 20
1929 01:54:13.304160 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1930 01:54:13.304213 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1931 01:54:13.304266 TX Bit2 (977~999) 23 988, Bit10 (971~995) 25 983,
1932 01:54:13.304318 TX Bit3 (970~995) 26 982, Bit11 (967~991) 25 979,
1933 01:54:13.304371 TX Bit4 (977~1000) 24 988, Bit12 (967~991) 25 979,
1934 01:54:13.304423 TX Bit5 (972~994) 23 983, Bit13 (966~990) 25 978,
1935 01:54:13.304476 TX Bit6 (972~997) 26 984, Bit14 (968~991) 24 979,
1936 01:54:13.304528 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1937 01:54:13.304580
1938 01:54:13.304631 wait MRW command Rank1 MR14 =0x16 fired (1)
1939 01:54:13.304683 Write Rank1 MR14 =0x16
1940 01:54:13.304735
1941 01:54:13.304787 CH=0, VrefRange= 0, VrefLevel = 22
1942 01:54:13.304839 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
1943 01:54:13.304891 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1944 01:54:13.304943 TX Bit2 (977~1000) 24 988, Bit10 (971~994) 24 982,
1945 01:54:13.304996 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
1946 01:54:13.305047 TX Bit4 (977~1000) 24 988, Bit12 (967~991) 25 979,
1947 01:54:13.305099 TX Bit5 (971~995) 25 983, Bit13 (966~990) 25 978,
1948 01:54:13.305151 TX Bit6 (972~998) 27 985, Bit14 (968~991) 24 979,
1949 01:54:13.305204 TX Bit7 (975~999) 25 987, Bit15 (969~992) 24 980,
1950 01:54:13.305260
1951 01:54:13.305348 Write Rank1 MR14 =0x18
1952 01:54:13.305400
1953 01:54:13.305451 CH=0, VrefRange= 0, VrefLevel = 24
1954 01:54:13.305503 TX Bit0 (977~1002) 26 989, Bit8 (967~991) 25 979,
1955 01:54:13.305556 TX Bit1 (977~1000) 24 988, Bit9 (967~991) 25 979,
1956 01:54:13.305608 TX Bit2 (977~1000) 24 988, Bit10 (971~994) 24 982,
1957 01:54:13.305660 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
1958 01:54:13.305712 TX Bit4 (976~1000) 25 988, Bit12 (967~991) 25 979,
1959 01:54:13.305764 TX Bit5 (971~995) 25 983, Bit13 (966~990) 25 978,
1960 01:54:13.305816 TX Bit6 (971~997) 27 984, Bit14 (967~991) 25 979,
1961 01:54:13.305869 TX Bit7 (975~999) 25 987, Bit15 (969~992) 24 980,
1962 01:54:13.305921
1963 01:54:13.305972 Write Rank1 MR14 =0x1a
1964 01:54:13.306023
1965 01:54:13.306074 CH=0, VrefRange= 0, VrefLevel = 26
1966 01:54:13.306126 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
1967 01:54:13.306179 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1968 01:54:13.306230 TX Bit2 (976~1000) 25 988, Bit10 (970~994) 25 982,
1969 01:54:13.306283 TX Bit3 (970~993) 24 981, Bit11 (967~990) 24 978,
1970 01:54:13.306335 TX Bit4 (976~1000) 25 988, Bit12 (967~991) 25 979,
1971 01:54:13.306579 TX Bit5 (971~995) 25 983, Bit13 (966~990) 25 978,
1972 01:54:13.306640 TX Bit6 (971~997) 27 984, Bit14 (967~991) 25 979,
1973 01:54:13.306696 TX Bit7 (973~999) 27 986, Bit15 (969~992) 24 980,
1974 01:54:13.306758
1975 01:54:13.306811 Write Rank1 MR14 =0x1c
1976 01:54:13.306863
1977 01:54:13.306915 CH=0, VrefRange= 0, VrefLevel = 28
1978 01:54:13.664883 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
1979 01:54:13.665435 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1980 01:54:13.665796 TX Bit2 (976~1000) 25 988, Bit10 (970~994) 25 982,
1981 01:54:13.666123 TX Bit3 (970~993) 24 981, Bit11 (967~990) 24 978,
1982 01:54:13.666438 TX Bit4 (976~1000) 25 988, Bit12 (967~991) 25 979,
1983 01:54:13.666746 TX Bit5 (971~995) 25 983, Bit13 (966~990) 25 978,
1984 01:54:13.667049 TX Bit6 (971~997) 27 984, Bit14 (967~991) 25 979,
1985 01:54:13.667346 TX Bit7 (973~999) 27 986, Bit15 (969~992) 24 980,
1986 01:54:13.667643
1987 01:54:13.667934 Write Rank1 MR14 =0x1e
1988 01:54:13.668230
1989 01:54:13.668521 CH=0, VrefRange= 0, VrefLevel = 30
1990 01:54:13.668812 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
1991 01:54:13.669106 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1992 01:54:13.669472 TX Bit2 (976~1000) 25 988, Bit10 (970~994) 25 982,
1993 01:54:13.669775 TX Bit3 (970~993) 24 981, Bit11 (967~990) 24 978,
1994 01:54:13.670065 TX Bit4 (976~1000) 25 988, Bit12 (967~991) 25 979,
1995 01:54:13.670358 TX Bit5 (971~995) 25 983, Bit13 (966~990) 25 978,
1996 01:54:13.670648 TX Bit6 (971~997) 27 984, Bit14 (967~991) 25 979,
1997 01:54:13.670913 TX Bit7 (973~999) 27 986, Bit15 (969~992) 24 980,
1998 01:54:13.671176
1999 01:54:13.671440
2000 01:54:13.671699 TX Vref found, early break! 378< 380
2001 01:54:13.671963 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2002 01:54:13.672224 u1DelayCellOfst[0]=10 cells (8 PI)
2003 01:54:13.672487 u1DelayCellOfst[1]=8 cells (7 PI)
2004 01:54:13.672748 u1DelayCellOfst[2]=8 cells (7 PI)
2005 01:54:13.673011 u1DelayCellOfst[3]=0 cells (0 PI)
2006 01:54:13.673293 u1DelayCellOfst[4]=8 cells (7 PI)
2007 01:54:13.673560 u1DelayCellOfst[5]=2 cells (2 PI)
2008 01:54:13.673820 u1DelayCellOfst[6]=3 cells (3 PI)
2009 01:54:13.674079 u1DelayCellOfst[7]=6 cells (5 PI)
2010 01:54:13.674341 Byte0, DQ PI dly=981, DQM PI dly= 985
2011 01:54:13.674603 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2012 01:54:13.674872
2013 01:54:13.675132 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2014 01:54:13.675396
2015 01:54:13.675654 u1DelayCellOfst[8]=0 cells (0 PI)
2016 01:54:13.675930 u1DelayCellOfst[9]=1 cells (1 PI)
2017 01:54:13.676194 u1DelayCellOfst[10]=5 cells (4 PI)
2018 01:54:13.676456 u1DelayCellOfst[11]=0 cells (0 PI)
2019 01:54:13.676716 u1DelayCellOfst[12]=1 cells (1 PI)
2020 01:54:13.676975 u1DelayCellOfst[13]=0 cells (0 PI)
2021 01:54:13.677234 u1DelayCellOfst[14]=1 cells (1 PI)
2022 01:54:13.677515 u1DelayCellOfst[15]=2 cells (2 PI)
2023 01:54:13.677776 Byte1, DQ PI dly=978, DQM PI dly= 980
2024 01:54:13.678037 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2025 01:54:13.678299
2026 01:54:13.678557 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2027 01:54:13.678821
2028 01:54:13.679078 Write Rank1 MR14 =0x1a
2029 01:54:13.679340
2030 01:54:13.679599 Final TX Range 0 Vref 26
2031 01:54:13.679862
2032 01:54:13.680120 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2033 01:54:13.680383
2034 01:54:13.680656 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2035 01:54:13.680924 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2036 01:54:13.681191 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2037 01:54:13.681475 Write Rank1 MR3 =0xb0
2038 01:54:13.681748 DramC Write-DBI on
2039 01:54:13.682010 ==
2040 01:54:13.682271 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2041 01:54:13.682533 fsp= 1, odt_onoff= 1, Byte mode= 0
2042 01:54:13.682796 ==
2043 01:54:13.683057 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2044 01:54:13.683319
2045 01:54:13.683576 Begin, DQ Scan Range 700~764
2046 01:54:13.683838
2047 01:54:13.684097
2048 01:54:13.684353 TX Vref Scan disable
2049 01:54:13.684614 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2050 01:54:13.684879 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2051 01:54:13.685148 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2052 01:54:13.685433 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2053 01:54:13.685702 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2054 01:54:13.685970 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2055 01:54:13.686235 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2056 01:54:13.686502 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2057 01:54:13.686765 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2058 01:54:13.687033 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2059 01:54:13.687301 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2060 01:54:13.687569 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2061 01:54:13.687836 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2062 01:54:13.688101 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2063 01:54:13.688367 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2064 01:54:13.688628 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2065 01:54:13.688893 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2066 01:54:13.689156 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2067 01:54:13.689451 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2068 01:54:13.689719 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2069 01:54:13.689984 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2070 01:54:13.690249 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2071 01:54:13.690514 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2072 01:54:13.690779 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2073 01:54:13.691043 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2074 01:54:13.691308 Byte0, DQ PI dly=729, DQM PI dly= 729
2075 01:54:13.691557 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
2076 01:54:13.691744
2077 01:54:13.691929 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
2078 01:54:13.692116
2079 01:54:13.692301 Byte1, DQ PI dly=722, DQM PI dly= 722
2080 01:54:13.692486 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2081 01:54:13.692674
2082 01:54:13.692858 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2083 01:54:13.693044
2084 01:54:13.693228 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2085 01:54:13.693744 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2086 01:54:13.693956 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2087 01:54:13.694149 Write Rank1 MR3 =0x30
2088 01:54:13.694339 DramC Write-DBI off
2089 01:54:13.694526
2090 01:54:13.694710 [DATLAT]
2091 01:54:13.694907 Freq=1600, CH0 RK1, use_rxtx_scan=0
2092 01:54:13.695100
2093 01:54:13.695285 DATLAT Default: 0x10
2094 01:54:13.695471 7, 0xFFFF, sum=0
2095 01:54:13.695661 8, 0xFFFF, sum=0
2096 01:54:13.695851 9, 0xFFFF, sum=0
2097 01:54:13.696041 10, 0xFFFF, sum=0
2098 01:54:13.696233 11, 0xFFFF, sum=0
2099 01:54:13.696502 12, 0xFFFF, sum=0
2100 01:54:13.696651 13, 0xFFFF, sum=0
2101 01:54:13.696797 14, 0x0, sum=1
2102 01:54:13.696942 15, 0x0, sum=2
2103 01:54:13.697113 16, 0x0, sum=3
2104 01:54:13.697273 17, 0x0, sum=4
2105 01:54:13.697421 pattern=2 first_step=14 total pass=5 best_step=16
2106 01:54:13.697566 ==
2107 01:54:13.697710 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2108 01:54:13.697853 fsp= 1, odt_onoff= 1, Byte mode= 0
2109 01:54:13.697995 ==
2110 01:54:13.698135 Start DQ dly to find pass range UseTestEngine =1
2111 01:54:13.698278 x-axis: bit #, y-axis: DQ dly (-127~63)
2112 01:54:13.698421 RX Vref Scan = 0
2113 01:54:13.698563 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2114 01:54:13.698708 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2115 01:54:13.698854 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2116 01:54:13.698998 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2117 01:54:13.699143 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2118 01:54:13.699286 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2119 01:54:13.699430 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2120 01:54:13.699575 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2121 01:54:13.699720 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2122 01:54:13.699863 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2123 01:54:13.700007 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2124 01:54:13.700150 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2125 01:54:13.700293 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2126 01:54:13.700435 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2127 01:54:13.700579 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2128 01:54:13.700723 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2129 01:54:13.700867 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2130 01:54:13.701012 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2131 01:54:13.701157 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2132 01:54:13.701312 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2133 01:54:13.701469 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2134 01:54:13.701585 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2135 01:54:13.701700 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2136 01:54:13.701814 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2137 01:54:13.701929 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2138 01:54:13.702043 -1, [0] xxxoxxxx xxxxxoxx [MSB]
2139 01:54:13.702158 0, [0] xxxoxxxx oxxxxoxx [MSB]
2140 01:54:13.702275 1, [0] xxxoxoxx ooxoooox [MSB]
2141 01:54:13.702391 2, [0] xxxoxooo ooxoooox [MSB]
2142 01:54:13.702506 3, [0] xxxoxooo ooxooooo [MSB]
2143 01:54:13.702623 4, [0] xxxoxooo ooxooooo [MSB]
2144 01:54:13.702738 5, [0] xxxooooo ooxooooo [MSB]
2145 01:54:13.702860 6, [0] xxxooooo oooooooo [MSB]
2146 01:54:13.702975 7, [0] xooooooo oooooooo [MSB]
2147 01:54:13.703091 8, [0] xooooooo oooooooo [MSB]
2148 01:54:13.703206 34, [0] oooxoooo oooxoooo [MSB]
2149 01:54:13.703321 35, [0] oooxoxoo oooxoxoo [MSB]
2150 01:54:13.703437 36, [0] oooxoxxo oooxoxoo [MSB]
2151 01:54:13.703554 37, [0] oooxoxxx xooxxxxo [MSB]
2152 01:54:13.703669 38, [0] oooxoxxx xooxxxxo [MSB]
2153 01:54:13.703785 39, [0] oooxoxxx xxoxxxxx [MSB]
2154 01:54:13.703902 40, [0] oooxoxxx xxoxxxxx [MSB]
2155 01:54:13.704017 41, [0] oooxxxxx xxoxxxxx [MSB]
2156 01:54:13.704134 42, [0] oooxxxxx xxxxxxxx [MSB]
2157 01:54:13.704251 43, [0] xxxxxxxx xxxxxxxx [MSB]
2158 01:54:13.704366 iDelay=43, Bit 0, Center 25 (9 ~ 42) 34
2159 01:54:13.704481 iDelay=43, Bit 1, Center 24 (7 ~ 42) 36
2160 01:54:13.704595 iDelay=43, Bit 2, Center 24 (7 ~ 42) 36
2161 01:54:13.704708 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
2162 01:54:13.704822 iDelay=43, Bit 4, Center 22 (5 ~ 40) 36
2163 01:54:13.704934 iDelay=43, Bit 5, Center 17 (1 ~ 34) 34
2164 01:54:13.705048 iDelay=43, Bit 6, Center 18 (2 ~ 35) 34
2165 01:54:13.705163 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
2166 01:54:13.705283 iDelay=43, Bit 8, Center 18 (0 ~ 36) 37
2167 01:54:13.705398 iDelay=43, Bit 9, Center 19 (1 ~ 38) 38
2168 01:54:13.705512 iDelay=43, Bit 10, Center 23 (6 ~ 41) 36
2169 01:54:13.705625 iDelay=43, Bit 11, Center 17 (1 ~ 33) 33
2170 01:54:13.705739 iDelay=43, Bit 12, Center 18 (1 ~ 36) 36
2171 01:54:13.705852 iDelay=43, Bit 13, Center 16 (-1 ~ 34) 36
2172 01:54:13.705965 iDelay=43, Bit 14, Center 18 (1 ~ 36) 36
2173 01:54:13.706079 iDelay=43, Bit 15, Center 20 (3 ~ 38) 36
2174 01:54:13.706192 ==
2175 01:54:13.706305 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2176 01:54:13.706419 fsp= 1, odt_onoff= 1, Byte mode= 0
2177 01:54:13.706541 ==
2178 01:54:13.706635 DQS Delay:
2179 01:54:13.706730 DQS0 = 0, DQS1 = 0
2180 01:54:13.706826 DQM Delay:
2181 01:54:13.706921 DQM0 = 20, DQM1 = 18
2182 01:54:13.707016 DQ Delay:
2183 01:54:13.707110 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15
2184 01:54:13.707205 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =19
2185 01:54:13.707299 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17
2186 01:54:13.707394 DQ12 =18, DQ13 =16, DQ14 =18, DQ15 =20
2187 01:54:13.707489
2188 01:54:13.707587
2189 01:54:13.707681
2190 01:54:13.707774 [DramC_TX_OE_Calibration] TA2
2191 01:54:13.707869 Original DQ_B0 (3 6) =30, OEN = 27
2192 01:54:13.707965 Original DQ_B1 (3 6) =30, OEN = 27
2193 01:54:13.708060 23, 0x0, End_B0=23 End_B1=23
2194 01:54:13.708157 24, 0x0, End_B0=24 End_B1=24
2195 01:54:13.708255 25, 0x0, End_B0=25 End_B1=25
2196 01:54:13.708352 26, 0x0, End_B0=26 End_B1=26
2197 01:54:13.708447 27, 0x0, End_B0=27 End_B1=27
2198 01:54:13.708544 28, 0x0, End_B0=28 End_B1=28
2199 01:54:13.708640 29, 0x0, End_B0=29 End_B1=29
2200 01:54:13.708736 30, 0x0, End_B0=30 End_B1=30
2201 01:54:13.708832 31, 0xFFFF, End_B0=30 End_B1=30
2202 01:54:13.708930 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2203 01:54:13.709026 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2204 01:54:13.709121
2205 01:54:13.709215
2206 01:54:13.709328 Write Rank1 MR23 =0x3f
2207 01:54:13.709426 [DQSOSC]
2208 01:54:13.709522 [DQSOSCAuto] RK1, (LSB)MR18= 0x7d, (MSB)MR19= 0x3, tDQSOscB0 = 352 ps tDQSOscB1 = 0 ps
2209 01:54:13.709619 CH0_RK1: MR19=0x3, MR18=0x7D, DQSOSC=352, MR23=63, INC=19, DEC=29
2210 01:54:13.709715 Write Rank1 MR23 =0x3f
2211 01:54:13.709811 [DQSOSC]
2212 01:54:13.709905 [DQSOSCAuto] RK1, (LSB)MR18= 0x7e, (MSB)MR19= 0x3, tDQSOscB0 = 352 ps tDQSOscB1 = 0 ps
2213 01:54:13.710000 CH0 RK1: MR19=3, MR18=7E
2214 01:54:13.710332 [RxdqsGatingPostProcess] freq 1600
2215 01:54:13.710439 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2216 01:54:13.710539 Rank: 0
2217 01:54:13.710636 best DQS0 dly(2T, 0.5T) = (2, 5)
2218 01:54:13.710732 best DQS1 dly(2T, 0.5T) = (2, 5)
2219 01:54:13.710829 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2220 01:54:13.710924 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2221 01:54:13.711020 Rank: 1
2222 01:54:13.711116 best DQS0 dly(2T, 0.5T) = (2, 6)
2223 01:54:13.711211 best DQS1 dly(2T, 0.5T) = (2, 6)
2224 01:54:13.711306 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2225 01:54:13.711401 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2226 01:54:13.711502 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2227 01:54:13.711585 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2228 01:54:13.711668 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2229 01:54:13.711750 Write Rank0 MR13 =0x59
2230 01:54:13.711831 ==
2231 01:54:13.711913 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2232 01:54:13.711995 fsp= 1, odt_onoff= 1, Byte mode= 0
2233 01:54:13.712077 ==
2234 01:54:13.712158 === u2Vref_new: 0x56 --> 0x3a
2235 01:54:13.712241 === u2Vref_new: 0x58 --> 0x58
2236 01:54:13.712323 === u2Vref_new: 0x5a --> 0x5a
2237 01:54:13.712405 === u2Vref_new: 0x5c --> 0x78
2238 01:54:13.712486 === u2Vref_new: 0x5e --> 0x7a
2239 01:54:13.712567 === u2Vref_new: 0x60 --> 0x90
2240 01:54:13.712649 [CA 0] Center 36 (9~63) winsize 55
2241 01:54:13.712731 [CA 1] Center 35 (7~63) winsize 57
2242 01:54:13.712813 [CA 2] Center 33 (4~62) winsize 59
2243 01:54:13.712895 [CA 3] Center 33 (3~63) winsize 61
2244 01:54:13.712976 [CA 4] Center 33 (3~63) winsize 61
2245 01:54:13.713058 [CA 5] Center 25 (-1~52) winsize 54
2246 01:54:13.713140
2247 01:54:13.713221 [CATrainingPosCal] consider 1 rank data
2248 01:54:13.713319 u2DelayCellTimex100 = 762/100 ps
2249 01:54:13.713402 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
2250 01:54:13.713485 CA1 delay=35 (7~63),Diff = 10 PI (12 cell)
2251 01:54:13.713567 CA2 delay=33 (4~62),Diff = 8 PI (10 cell)
2252 01:54:13.713649 CA3 delay=33 (3~63),Diff = 8 PI (10 cell)
2253 01:54:13.713731 CA4 delay=33 (3~63),Diff = 8 PI (10 cell)
2254 01:54:13.713813 CA5 delay=25 (-1~52),Diff = 0 PI (0 cell)
2255 01:54:13.713895
2256 01:54:13.713977 CA PerBit enable=1, Macro0, CA PI delay=25
2257 01:54:13.714059 === u2Vref_new: 0x56 --> 0x3a
2258 01:54:13.714222
2259 01:54:13.714320 Vref(ca) range 1: 22
2260 01:54:13.714404
2261 01:54:13.714487 CS Dly= 10 (41-0-32)
2262 01:54:13.714570 Write Rank0 MR13 =0xd8
2263 01:54:13.714652 Write Rank0 MR13 =0xd8
2264 01:54:13.714734 Write Rank0 MR12 =0x56
2265 01:54:13.714816 Write Rank1 MR13 =0x59
2266 01:54:13.714898 ==
2267 01:54:13.714980 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2268 01:54:13.715082 fsp= 1, odt_onoff= 1, Byte mode= 0
2269 01:54:13.715166 ==
2270 01:54:13.715247 === u2Vref_new: 0x56 --> 0x3a
2271 01:54:13.715329 === u2Vref_new: 0x58 --> 0x58
2272 01:54:13.715410 === u2Vref_new: 0x5a --> 0x5a
2273 01:54:13.715493 === u2Vref_new: 0x5c --> 0x78
2274 01:54:13.715575 === u2Vref_new: 0x5e --> 0x7a
2275 01:54:13.715661 === u2Vref_new: 0x60 --> 0x90
2276 01:54:13.715743 [CA 0] Center 36 (10~63) winsize 54
2277 01:54:13.715826 [CA 1] Center 35 (8~63) winsize 56
2278 01:54:13.715908 [CA 2] Center 33 (4~63) winsize 60
2279 01:54:13.715990 [CA 3] Center 33 (3~63) winsize 61
2280 01:54:13.716072 [CA 4] Center 33 (4~63) winsize 60
2281 01:54:13.716154 [CA 5] Center 26 (-1~53) winsize 55
2282 01:54:13.716235
2283 01:54:13.716317 [CATrainingPosCal] consider 2 rank data
2284 01:54:13.716398 u2DelayCellTimex100 = 762/100 ps
2285 01:54:13.716489 CA0 delay=36 (10~63),Diff = 11 PI (14 cell)
2286 01:54:13.716561 CA1 delay=35 (8~63),Diff = 10 PI (12 cell)
2287 01:54:13.716633 CA2 delay=33 (4~62),Diff = 8 PI (10 cell)
2288 01:54:13.716704 CA3 delay=33 (3~63),Diff = 8 PI (10 cell)
2289 01:54:13.716776 CA4 delay=33 (4~63),Diff = 8 PI (10 cell)
2290 01:54:13.716847 CA5 delay=25 (-1~52),Diff = 0 PI (0 cell)
2291 01:54:13.716919
2292 01:54:13.716989 CA PerBit enable=1, Macro0, CA PI delay=25
2293 01:54:13.717060 === u2Vref_new: 0x58 --> 0x58
2294 01:54:13.717132
2295 01:54:13.717203 Vref(ca) range 1: 24
2296 01:54:13.717281
2297 01:54:13.717354 CS Dly= 12 (43-0-32)
2298 01:54:13.717426 Write Rank1 MR13 =0xd8
2299 01:54:13.717497 Write Rank1 MR13 =0xd8
2300 01:54:13.717569 Write Rank1 MR12 =0x58
2301 01:54:13.717640 [RankSwap] Rank num 2, (Multi 1), Rank 0
2302 01:54:13.717712 Write Rank0 MR2 =0xad
2303 01:54:13.717783 [Write Leveling]
2304 01:54:13.717854 delay byte0 byte1 byte2 byte3
2305 01:54:13.717924
2306 01:54:13.717995 10 0 0
2307 01:54:13.718069 11 0 0
2308 01:54:13.718142 12 0 0
2309 01:54:13.718215 13 0 0
2310 01:54:13.718287 14 0 0
2311 01:54:13.718360 15 0 0
2312 01:54:13.718433 16 0 0
2313 01:54:13.718505 17 0 0
2314 01:54:13.718577 18 0 0
2315 01:54:13.718649 19 0 0
2316 01:54:13.718722 20 0 0
2317 01:54:13.718794 21 0 0
2318 01:54:13.718866 22 0 0
2319 01:54:13.718938 23 0 0
2320 01:54:13.719011 24 0 0
2321 01:54:13.719094 25 0 0
2322 01:54:13.719167 26 0 0
2323 01:54:13.719239 27 0 0
2324 01:54:13.719311 28 0 0
2325 01:54:13.719383 29 0 0
2326 01:54:13.719456 30 0 0
2327 01:54:13.719528 31 0 ff
2328 01:54:13.719600 32 0 ff
2329 01:54:13.719673 33 0 ff
2330 01:54:13.719744 34 0 ff
2331 01:54:13.719817 35 ff ff
2332 01:54:13.719888 36 ff ff
2333 01:54:13.719961 37 ff ff
2334 01:54:13.720032 38 ff ff
2335 01:54:13.720104 39 ff ff
2336 01:54:13.720176 40 ff ff
2337 01:54:13.720249 41 ff ff
2338 01:54:13.720322 pass bytecount = 0xff (0xff: all bytes pass)
2339 01:54:13.720394
2340 01:54:13.720465 DQS0 dly: 35
2341 01:54:13.720536 DQS1 dly: 31
2342 01:54:13.720606 Write Rank0 MR2 =0x2d
2343 01:54:13.720677 [RankSwap] Rank num 2, (Multi 1), Rank 0
2344 01:54:13.720749 Write Rank0 MR1 =0xd6
2345 01:54:13.720820 [Gating]
2346 01:54:13.720891 ==
2347 01:54:13.720962 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2348 01:54:13.721045 fsp= 1, odt_onoff= 1, Byte mode= 0
2349 01:54:13.721171 ==
2350 01:54:13.721293 3 1 0 |3131 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2351 01:54:13.721374 3 1 4 |1211 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2352 01:54:13.721461 3 1 8 |100 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2353 01:54:13.721528 3 1 12 |2726 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2354 01:54:13.721593 3 1 16 |3332 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2355 01:54:13.721658 3 1 20 |d0d 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2356 01:54:13.721723 3 1 24 |2828 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2357 01:54:13.721788 3 1 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2358 01:54:13.721853 3 2 0 |3a3a b0b |(11 11)(11 11) |(1 1)(1 1)| 0
2359 01:54:13.721918 3 2 4 |3b3a 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2360 01:54:13.722182 3 2 8 |2827 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2361 01:54:13.722254 3 2 12 |3737 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2362 01:54:13.722321 3 2 16 |3636 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2363 01:54:13.722386 3 2 20 |3737 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2364 01:54:13.722450 3 2 24 |3635 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2365 01:54:13.722515 3 2 28 |a09 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2366 01:54:13.722579 [Byte 0] Lead/lag falling Transition (3, 2, 28)
2367 01:54:13.722643 3 3 0 |1110 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
2368 01:54:13.722707 3 3 4 |3534 403 |(11 11)(11 11) |(0 1)(1 1)| 0
2369 01:54:13.722770 3 3 8 |3534 201 |(11 11)(11 11) |(0 1)(1 1)| 0
2370 01:54:13.722834 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2371 01:54:13.722897 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2372 01:54:13.722961 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2373 01:54:13.723026 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2374 01:54:13.723090 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2375 01:54:13.723154 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2376 01:54:13.723220 3 4 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2377 01:54:13.723284 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2378 01:54:13.723348 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2379 01:54:13.725950 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2380 01:54:13.729393 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2381 01:54:13.732460 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2382 01:54:13.735834 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2383 01:54:13.742921 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2384 01:54:13.746722 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2385 01:54:13.749654 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2386 01:54:13.756457 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2387 01:54:13.759628 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2388 01:54:13.763125 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2389 01:54:13.769618 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2390 01:54:13.773359 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2391 01:54:13.776435 [Byte 0] Lead/lag Transition tap number (2)
2392 01:54:13.780012 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2393 01:54:13.786560 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2394 01:54:13.790405 3 5 28 |d0c 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2395 01:54:13.793308 [Byte 1] Lead/lag Transition tap number (2)
2396 01:54:13.796904 3 6 0 |4646 403 |(0 0)(11 11) |(0 0)(0 0)| 0
2397 01:54:13.800088 [Byte 0]First pass (3, 6, 0)
2398 01:54:13.803356 3 6 4 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
2399 01:54:13.806688 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2400 01:54:13.810257 [Byte 1]First pass (3, 6, 8)
2401 01:54:13.813752 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2402 01:54:13.819948 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2403 01:54:13.823364 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2404 01:54:13.826461 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2405 01:54:13.830270 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2406 01:54:13.833151 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2407 01:54:13.840238 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2408 01:54:13.843390 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2409 01:54:13.847358 All bytes gating window > 1UI, Early break!
2410 01:54:13.847866
2411 01:54:13.849905 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
2412 01:54:13.850515
2413 01:54:13.853215 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
2414 01:54:13.853674
2415 01:54:13.853996
2416 01:54:13.854327
2417 01:54:13.860190 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
2418 01:54:13.860612
2419 01:54:13.863338 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
2420 01:54:13.863752
2421 01:54:13.864074
2422 01:54:13.864372 Write Rank0 MR1 =0x56
2423 01:54:13.866706
2424 01:54:13.867115 best RODT dly(2T, 0.5T) = (2, 2)
2425 01:54:13.867437
2426 01:54:13.870299 best RODT dly(2T, 0.5T) = (2, 2)
2427 01:54:13.870708 ==
2428 01:54:13.876993 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2429 01:54:13.880248 fsp= 1, odt_onoff= 1, Byte mode= 0
2430 01:54:13.880849 ==
2431 01:54:13.883595 Start DQ dly to find pass range UseTestEngine =0
2432 01:54:13.887081 x-axis: bit #, y-axis: DQ dly (-127~63)
2433 01:54:13.890081 RX Vref Scan = 0
2434 01:54:13.893291 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2435 01:54:13.893928 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2436 01:54:13.896481 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2437 01:54:13.900463 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2438 01:54:13.903679 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2439 01:54:13.907344 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2440 01:54:13.910571 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2441 01:54:13.913606 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2442 01:54:13.917126 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2443 01:54:13.917606 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2444 01:54:13.920310 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2445 01:54:13.924035 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2446 01:54:13.926976 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2447 01:54:13.930509 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2448 01:54:13.933664 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2449 01:54:13.937356 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2450 01:54:13.940285 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2451 01:54:13.940723 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2452 01:54:13.943695 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2453 01:54:13.947500 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2454 01:54:13.950436 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2455 01:54:13.953726 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2456 01:54:13.957378 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2457 01:54:13.960732 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2458 01:54:13.961312 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2459 01:54:13.964897 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2460 01:54:13.967326 0, [0] xxxoxxxx xxxxxxxx [MSB]
2461 01:54:13.970804 1, [0] xxxoxxxx xxxxxxxo [MSB]
2462 01:54:13.973794 2, [0] xxooxxxo xxxxxxxo [MSB]
2463 01:54:13.977122 3, [0] xxooxxxo xxxxxxxo [MSB]
2464 01:54:13.977601 4, [0] xxoooxxo oooxooxo [MSB]
2465 01:54:13.980705 5, [0] xxoooxxo oooooooo [MSB]
2466 01:54:13.984570 6, [0] xooooxxo oooooooo [MSB]
2467 01:54:13.987738 7, [0] xoooooxo oooooooo [MSB]
2468 01:54:13.991118 8, [0] xoooooxo oooooooo [MSB]
2469 01:54:13.994459 32, [0] ooxxoooo oooooooo [MSB]
2470 01:54:13.995006 33, [0] ooxxoooo ooooooox [MSB]
2471 01:54:13.997358 34, [0] ooxxoooo ooooooox [MSB]
2472 01:54:14.000782 35, [0] ooxxxooo ooxoooox [MSB]
2473 01:54:14.003996 36, [0] ooxxxoox xoxoooox [MSB]
2474 01:54:14.007232 37, [0] ooxxxoox xxxoooxx [MSB]
2475 01:54:14.010889 38, [0] ooxxxoox xxxxoxxx [MSB]
2476 01:54:14.011327 39, [0] ooxxxoox xxxxxxxx [MSB]
2477 01:54:14.013914 40, [0] xxxxxoox xxxxxxxx [MSB]
2478 01:54:14.017167 41, [0] xxxxxxxx xxxxxxxx [MSB]
2479 01:54:14.021063 iDelay=41, Bit 0, Center 24 (9 ~ 39) 31
2480 01:54:14.024268 iDelay=41, Bit 1, Center 22 (6 ~ 39) 34
2481 01:54:14.027541 iDelay=41, Bit 2, Center 16 (2 ~ 31) 30
2482 01:54:14.030843 iDelay=41, Bit 3, Center 15 (-1 ~ 31) 33
2483 01:54:14.037815 iDelay=41, Bit 4, Center 19 (4 ~ 34) 31
2484 01:54:14.040605 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2485 01:54:14.044213 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
2486 01:54:14.048020 iDelay=41, Bit 7, Center 18 (2 ~ 35) 34
2487 01:54:14.050720 iDelay=41, Bit 8, Center 19 (4 ~ 35) 32
2488 01:54:14.054135 iDelay=41, Bit 9, Center 20 (4 ~ 36) 33
2489 01:54:14.057704 iDelay=41, Bit 10, Center 19 (4 ~ 34) 31
2490 01:54:14.060873 iDelay=41, Bit 11, Center 21 (5 ~ 37) 33
2491 01:54:14.064533 iDelay=41, Bit 12, Center 21 (4 ~ 38) 35
2492 01:54:14.067560 iDelay=41, Bit 13, Center 20 (4 ~ 37) 34
2493 01:54:14.071302 iDelay=41, Bit 14, Center 20 (5 ~ 36) 32
2494 01:54:14.074533 iDelay=41, Bit 15, Center 16 (1 ~ 32) 32
2495 01:54:14.075064 ==
2496 01:54:14.081011 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2497 01:54:14.084675 fsp= 1, odt_onoff= 1, Byte mode= 0
2498 01:54:14.085210 ==
2499 01:54:14.085698 DQS Delay:
2500 01:54:14.087893 DQS0 = 0, DQS1 = 0
2501 01:54:14.088424 DQM Delay:
2502 01:54:14.091275 DQM0 = 20, DQM1 = 19
2503 01:54:14.091804 DQ Delay:
2504 01:54:14.094728 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2505 01:54:14.097697 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =18
2506 01:54:14.100777 DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =21
2507 01:54:14.104482 DQ12 =21, DQ13 =20, DQ14 =20, DQ15 =16
2508 01:54:14.104993
2509 01:54:14.105380
2510 01:54:14.105695 DramC Write-DBI off
2511 01:54:14.107311 ==
2512 01:54:14.110622 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2513 01:54:14.114589 fsp= 1, odt_onoff= 1, Byte mode= 0
2514 01:54:14.115240 ==
2515 01:54:14.117381 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2516 01:54:14.117801
2517 01:54:14.120843 Begin, DQ Scan Range 927~1183
2518 01:54:14.121291
2519 01:54:14.121648
2520 01:54:14.124192 TX Vref Scan disable
2521 01:54:14.127715 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2522 01:54:14.131098 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2523 01:54:14.134624 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2524 01:54:14.137541 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2525 01:54:14.140706 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2526 01:54:14.143824 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2527 01:54:14.147805 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2528 01:54:14.150757 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2529 01:54:14.154593 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2530 01:54:14.157774 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2531 01:54:14.164307 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2532 01:54:14.167622 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2533 01:54:14.170905 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2534 01:54:14.174066 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2535 01:54:14.177405 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2536 01:54:14.180767 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2537 01:54:14.184118 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2538 01:54:14.187652 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2539 01:54:14.190763 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2540 01:54:14.194162 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2541 01:54:14.197914 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2542 01:54:14.200457 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2543 01:54:14.203815 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2544 01:54:14.207531 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2545 01:54:14.210755 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2546 01:54:14.214506 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2547 01:54:14.220658 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2548 01:54:14.224087 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2549 01:54:14.227177 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2550 01:54:14.230282 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2551 01:54:14.233915 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2552 01:54:14.237060 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2553 01:54:14.240670 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2554 01:54:14.243887 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2555 01:54:14.247675 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2556 01:54:14.250549 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2557 01:54:14.254162 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2558 01:54:14.257496 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2559 01:54:14.260987 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]
2560 01:54:14.264448 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
2561 01:54:14.267378 967 |3 6 7|[0] xxxxxxxx oxxxxxxo [MSB]
2562 01:54:14.270939 968 |3 6 8|[0] xxxxxxxx oooxxxxo [MSB]
2563 01:54:14.274316 969 |3 6 9|[0] xxxxxxxx oooooxoo [MSB]
2564 01:54:14.277523 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
2565 01:54:14.281126 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
2566 01:54:14.284232 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2567 01:54:14.287252 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
2568 01:54:14.294226 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
2569 01:54:14.297455 975 |3 6 15|[0] xxoooxxo oooooooo [MSB]
2570 01:54:14.300730 976 |3 6 16|[0] xooooxxo oooooooo [MSB]
2571 01:54:14.303809 989 |3 6 29|[0] oooooooo ooooooox [MSB]
2572 01:54:14.307633 990 |3 6 30|[0] oooooooo oxooooox [MSB]
2573 01:54:14.310920 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2574 01:54:14.314295 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2575 01:54:14.317355 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2576 01:54:14.324405 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
2577 01:54:14.327562 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
2578 01:54:14.331292 996 |3 6 36|[0] ooxxooox xxxxxxxx [MSB]
2579 01:54:14.334348 997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB]
2580 01:54:14.337510 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
2581 01:54:14.340748 Byte0, DQ PI dly=985, DQM PI dly= 985
2582 01:54:14.344214 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2583 01:54:14.344675
2584 01:54:14.347654 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2585 01:54:14.348200
2586 01:54:14.351050 Byte1, DQ PI dly=978, DQM PI dly= 978
2587 01:54:14.357489 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2588 01:54:14.358035
2589 01:54:14.360761 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2590 01:54:14.361354
2591 01:54:14.361731 ==
2592 01:54:14.367387 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2593 01:54:14.370983 fsp= 1, odt_onoff= 1, Byte mode= 0
2594 01:54:14.371493 ==
2595 01:54:14.373921 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2596 01:54:14.374335
2597 01:54:14.377426 Begin, DQ Scan Range 954~1018
2598 01:54:14.380905 Write Rank0 MR14 =0x0
2599 01:54:14.387670
2600 01:54:14.388123 CH=1, VrefRange= 0, VrefLevel = 0
2601 01:54:14.394317 TX Bit0 (979~997) 19 988, Bit8 (969~985) 17 977,
2602 01:54:14.397816 TX Bit1 (977~995) 19 986, Bit9 (969~985) 17 977,
2603 01:54:14.404282 TX Bit2 (976~991) 16 983, Bit10 (970~985) 16 977,
2604 01:54:14.408128 TX Bit3 (975~990) 16 982, Bit11 (971~988) 18 979,
2605 01:54:14.410941 TX Bit4 (977~992) 16 984, Bit12 (970~988) 19 979,
2606 01:54:14.417920 TX Bit5 (977~997) 21 987, Bit13 (972~988) 17 980,
2607 01:54:14.420907 TX Bit6 (979~997) 19 988, Bit14 (971~986) 16 978,
2608 01:54:14.424238 TX Bit7 (977~991) 15 984, Bit15 (967~985) 19 976,
2609 01:54:14.424699
2610 01:54:14.427658 Write Rank0 MR14 =0x2
2611 01:54:14.436734
2612 01:54:14.437319 CH=1, VrefRange= 0, VrefLevel = 2
2613 01:54:14.443235 TX Bit0 (978~998) 21 988, Bit8 (969~985) 17 977,
2614 01:54:14.447237 TX Bit1 (977~996) 20 986, Bit9 (968~985) 18 976,
2615 01:54:14.453368 TX Bit2 (977~992) 16 984, Bit10 (970~985) 16 977,
2616 01:54:14.456667 TX Bit3 (974~990) 17 982, Bit11 (971~988) 18 979,
2617 01:54:14.460243 TX Bit4 (977~993) 17 985, Bit12 (970~988) 19 979,
2618 01:54:14.466851 TX Bit5 (977~997) 21 987, Bit13 (972~988) 17 980,
2619 01:54:14.470160 TX Bit6 (979~997) 19 988, Bit14 (970~986) 17 978,
2620 01:54:14.473551 TX Bit7 (977~992) 16 984, Bit15 (967~985) 19 976,
2621 01:54:14.474112
2622 01:54:14.477246 Write Rank0 MR14 =0x4
2623 01:54:14.485580
2624 01:54:14.486136 CH=1, VrefRange= 0, VrefLevel = 4
2625 01:54:14.492196 TX Bit0 (978~998) 21 988, Bit8 (968~985) 18 976,
2626 01:54:14.495711 TX Bit1 (977~996) 20 986, Bit9 (969~986) 18 977,
2627 01:54:14.502162 TX Bit2 (976~992) 17 984, Bit10 (969~986) 18 977,
2628 01:54:14.506057 TX Bit3 (975~990) 16 982, Bit11 (971~989) 19 980,
2629 01:54:14.509245 TX Bit4 (977~993) 17 985, Bit12 (970~989) 20 979,
2630 01:54:14.515931 TX Bit5 (977~998) 22 987, Bit13 (971~989) 19 980,
2631 01:54:14.518909 TX Bit6 (979~998) 20 988, Bit14 (970~987) 18 978,
2632 01:54:14.522132 TX Bit7 (977~992) 16 984, Bit15 (967~985) 19 976,
2633 01:54:14.522603
2634 01:54:14.525214 Write Rank0 MR14 =0x6
2635 01:54:14.534304
2636 01:54:14.534866 CH=1, VrefRange= 0, VrefLevel = 6
2637 01:54:14.541506 TX Bit0 (978~998) 21 988, Bit8 (968~986) 19 977,
2638 01:54:14.544366 TX Bit1 (977~997) 21 987, Bit9 (968~986) 19 977,
2639 01:54:14.551926 TX Bit2 (976~992) 17 984, Bit10 (969~987) 19 978,
2640 01:54:14.554169 TX Bit3 (974~991) 18 982, Bit11 (970~989) 20 979,
2641 01:54:14.557762 TX Bit4 (977~994) 18 985, Bit12 (969~990) 22 979,
2642 01:54:14.564397 TX Bit5 (977~998) 22 987, Bit13 (970~989) 20 979,
2643 01:54:14.567875 TX Bit6 (978~998) 21 988, Bit14 (970~987) 18 978,
2644 01:54:14.571181 TX Bit7 (976~992) 17 984, Bit15 (966~986) 21 976,
2645 01:54:14.571741
2646 01:54:14.574126 Write Rank0 MR14 =0x8
2647 01:54:14.583485
2648 01:54:14.584061 CH=1, VrefRange= 0, VrefLevel = 8
2649 01:54:14.590097 TX Bit0 (978~999) 22 988, Bit8 (968~987) 20 977,
2650 01:54:14.593707 TX Bit1 (977~997) 21 987, Bit9 (968~986) 19 977,
2651 01:54:14.600003 TX Bit2 (976~993) 18 984, Bit10 (969~988) 20 978,
2652 01:54:14.603795 TX Bit3 (973~991) 19 982, Bit11 (970~990) 21 980,
2653 01:54:14.606947 TX Bit4 (976~995) 20 985, Bit12 (970~990) 21 980,
2654 01:54:14.613329 TX Bit5 (977~998) 22 987, Bit13 (971~990) 20 980,
2655 01:54:14.616439 TX Bit6 (978~998) 21 988, Bit14 (969~988) 20 978,
2656 01:54:14.619921 TX Bit7 (976~993) 18 984, Bit15 (966~986) 21 976,
2657 01:54:14.620383
2658 01:54:14.623339 Write Rank0 MR14 =0xa
2659 01:54:14.633239
2660 01:54:14.636183 CH=1, VrefRange= 0, VrefLevel = 10
2661 01:54:14.639389 TX Bit0 (977~999) 23 988, Bit8 (968~988) 21 978,
2662 01:54:14.642299 TX Bit1 (976~997) 22 986, Bit9 (968~987) 20 977,
2663 01:54:14.649022 TX Bit2 (975~993) 19 984, Bit10 (969~988) 20 978,
2664 01:54:14.652711 TX Bit3 (973~992) 20 982, Bit11 (970~991) 22 980,
2665 01:54:14.655844 TX Bit4 (976~996) 21 986, Bit12 (969~991) 23 980,
2666 01:54:14.662313 TX Bit5 (977~998) 22 987, Bit13 (970~991) 22 980,
2667 01:54:14.665942 TX Bit6 (978~998) 21 988, Bit14 (969~989) 21 979,
2668 01:54:14.669204 TX Bit7 (976~994) 19 985, Bit15 (966~987) 22 976,
2669 01:54:14.669743
2670 01:54:14.672721 Write Rank0 MR14 =0xc
2671 01:54:14.681688
2672 01:54:14.685103 CH=1, VrefRange= 0, VrefLevel = 12
2673 01:54:14.688631 TX Bit0 (977~999) 23 988, Bit8 (968~988) 21 978,
2674 01:54:14.691917 TX Bit1 (976~998) 23 987, Bit9 (968~988) 21 978,
2675 01:54:14.698252 TX Bit2 (975~993) 19 984, Bit10 (969~989) 21 979,
2676 01:54:14.701313 TX Bit3 (972~992) 21 982, Bit11 (970~991) 22 980,
2677 01:54:14.704886 TX Bit4 (976~997) 22 986, Bit12 (969~991) 23 980,
2678 01:54:14.711643 TX Bit5 (977~999) 23 988, Bit13 (970~991) 22 980,
2679 01:54:14.714961 TX Bit6 (978~999) 22 988, Bit14 (969~990) 22 979,
2680 01:54:14.718104 TX Bit7 (976~994) 19 985, Bit15 (965~987) 23 976,
2681 01:54:14.721173
2682 01:54:14.721657 Write Rank0 MR14 =0xe
2683 01:54:14.731267
2684 01:54:14.734415 CH=1, VrefRange= 0, VrefLevel = 14
2685 01:54:14.737537 TX Bit0 (977~999) 23 988, Bit8 (967~989) 23 978,
2686 01:54:14.741365 TX Bit1 (976~998) 23 987, Bit9 (968~989) 22 978,
2687 01:54:14.747877 TX Bit2 (975~994) 20 984, Bit10 (968~990) 23 979,
2688 01:54:14.751059 TX Bit3 (972~992) 21 982, Bit11 (969~991) 23 980,
2689 01:54:14.754282 TX Bit4 (976~997) 22 986, Bit12 (969~991) 23 980,
2690 01:54:14.761303 TX Bit5 (976~999) 24 987, Bit13 (970~991) 22 980,
2691 01:54:14.763955 TX Bit6 (978~999) 22 988, Bit14 (969~990) 22 979,
2692 01:54:14.767338 TX Bit7 (976~995) 20 985, Bit15 (965~988) 24 976,
2693 01:54:14.767794
2694 01:54:14.771024 Write Rank0 MR14 =0x10
2695 01:54:14.779861
2696 01:54:14.783234 CH=1, VrefRange= 0, VrefLevel = 16
2697 01:54:14.786407 TX Bit0 (977~999) 23 988, Bit8 (967~989) 23 978,
2698 01:54:14.790178 TX Bit1 (976~998) 23 987, Bit9 (967~988) 22 977,
2699 01:54:14.797319 TX Bit2 (974~995) 22 984, Bit10 (968~990) 23 979,
2700 01:54:14.800098 TX Bit3 (971~993) 23 982, Bit11 (969~991) 23 980,
2701 01:54:14.803560 TX Bit4 (976~997) 22 986, Bit12 (969~991) 23 980,
2702 01:54:14.810138 TX Bit5 (976~999) 24 987, Bit13 (969~991) 23 980,
2703 01:54:14.812760 TX Bit6 (977~999) 23 988, Bit14 (968~991) 24 979,
2704 01:54:14.816297 TX Bit7 (975~996) 22 985, Bit15 (965~988) 24 976,
2705 01:54:14.816826
2706 01:54:14.819678 Write Rank0 MR14 =0x12
2707 01:54:14.829743
2708 01:54:14.832862 CH=1, VrefRange= 0, VrefLevel = 18
2709 01:54:14.835949 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
2710 01:54:14.839304 TX Bit1 (976~998) 23 987, Bit9 (967~989) 23 978,
2711 01:54:14.846103 TX Bit2 (974~996) 23 985, Bit10 (968~991) 24 979,
2712 01:54:14.849163 TX Bit3 (971~993) 23 982, Bit11 (969~992) 24 980,
2713 01:54:14.852328 TX Bit4 (975~997) 23 986, Bit12 (968~991) 24 979,
2714 01:54:14.859133 TX Bit5 (976~999) 24 987, Bit13 (969~991) 23 980,
2715 01:54:14.862930 TX Bit6 (977~999) 23 988, Bit14 (969~991) 23 980,
2716 01:54:14.865804 TX Bit7 (975~997) 23 986, Bit15 (964~989) 26 976,
2717 01:54:14.869045
2718 01:54:14.869557 Write Rank0 MR14 =0x14
2719 01:54:14.878735
2720 01:54:14.882775 CH=1, VrefRange= 0, VrefLevel = 20
2721 01:54:14.885313 TX Bit0 (977~1000) 24 988, Bit8 (967~991) 25 979,
2722 01:54:14.889139 TX Bit1 (976~999) 24 987, Bit9 (967~990) 24 978,
2723 01:54:14.895149 TX Bit2 (973~996) 24 984, Bit10 (968~991) 24 979,
2724 01:54:14.898665 TX Bit3 (971~994) 24 982, Bit11 (969~992) 24 980,
2725 01:54:14.901944 TX Bit4 (975~998) 24 986, Bit12 (968~992) 25 980,
2726 01:54:14.909390 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2727 01:54:14.912259 TX Bit6 (977~1000) 24 988, Bit14 (968~991) 24 979,
2728 01:54:14.915817 TX Bit7 (975~997) 23 986, Bit15 (964~989) 26 976,
2729 01:54:14.918716
2730 01:54:14.919311 Write Rank0 MR14 =0x16
2731 01:54:14.928841
2732 01:54:14.932140 CH=1, VrefRange= 0, VrefLevel = 22
2733 01:54:14.935093 TX Bit0 (977~1001) 25 989, Bit8 (966~991) 26 978,
2734 01:54:14.938811 TX Bit1 (976~999) 24 987, Bit9 (966~990) 25 978,
2735 01:54:14.945135 TX Bit2 (973~997) 25 985, Bit10 (968~991) 24 979,
2736 01:54:14.948434 TX Bit3 (971~994) 24 982, Bit11 (968~992) 25 980,
2737 01:54:14.951806 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2738 01:54:14.958787 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2739 01:54:14.961863 TX Bit6 (977~1000) 24 988, Bit14 (968~991) 24 979,
2740 01:54:14.969309 TX Bit7 (974~997) 24 985, Bit15 (963~988) 26 975,
2741 01:54:14.969884
2742 01:54:14.970241 Write Rank0 MR14 =0x18
2743 01:54:14.978367
2744 01:54:14.981654 CH=1, VrefRange= 0, VrefLevel = 24
2745 01:54:14.985028 TX Bit0 (977~1001) 25 989, Bit8 (966~991) 26 978,
2746 01:54:14.988665 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
2747 01:54:14.995000 TX Bit2 (973~996) 24 984, Bit10 (967~991) 25 979,
2748 01:54:14.998574 TX Bit3 (970~994) 25 982, Bit11 (968~992) 25 980,
2749 01:54:15.002364 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2750 01:54:15.008387 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2751 01:54:15.011830 TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979,
2752 01:54:15.015645 TX Bit7 (974~998) 25 986, Bit15 (963~988) 26 975,
2753 01:54:15.016064
2754 01:54:15.018486 Write Rank0 MR14 =0x1a
2755 01:54:15.028051
2756 01:54:15.031345 CH=1, VrefRange= 0, VrefLevel = 26
2757 01:54:15.034472 TX Bit0 (977~1001) 25 989, Bit8 (966~991) 26 978,
2758 01:54:15.037627 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
2759 01:54:15.044622 TX Bit2 (973~996) 24 984, Bit10 (967~991) 25 979,
2760 01:54:15.047859 TX Bit3 (970~994) 25 982, Bit11 (968~992) 25 980,
2761 01:54:15.051392 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2762 01:54:15.057767 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2763 01:54:15.061363 TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979,
2764 01:54:15.067632 TX Bit7 (974~998) 25 986, Bit15 (963~988) 26 975,
2765 01:54:15.068156
2766 01:54:15.068484 Write Rank0 MR14 =0x1c
2767 01:54:15.078115
2768 01:54:15.080750 CH=1, VrefRange= 0, VrefLevel = 28
2769 01:54:15.084190 TX Bit0 (977~1001) 25 989, Bit8 (966~991) 26 978,
2770 01:54:15.087118 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
2771 01:54:15.094386 TX Bit2 (973~996) 24 984, Bit10 (967~991) 25 979,
2772 01:54:15.097824 TX Bit3 (970~994) 25 982, Bit11 (968~992) 25 980,
2773 01:54:15.100674 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2774 01:54:15.107440 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2775 01:54:15.110551 TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979,
2776 01:54:15.117726 TX Bit7 (974~998) 25 986, Bit15 (963~988) 26 975,
2777 01:54:15.118161
2778 01:54:15.118596 Write Rank0 MR14 =0x1e
2779 01:54:15.127037
2780 01:54:15.130847 CH=1, VrefRange= 0, VrefLevel = 30
2781 01:54:15.134088 TX Bit0 (977~1001) 25 989, Bit8 (966~991) 26 978,
2782 01:54:15.137483 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
2783 01:54:15.143823 TX Bit2 (973~996) 24 984, Bit10 (967~991) 25 979,
2784 01:54:15.147195 TX Bit3 (970~994) 25 982, Bit11 (968~992) 25 980,
2785 01:54:15.150350 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2786 01:54:15.157065 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2787 01:54:15.160644 TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979,
2788 01:54:15.164124 TX Bit7 (974~998) 25 986, Bit15 (963~988) 26 975,
2789 01:54:15.167372
2790 01:54:15.167797 Write Rank0 MR14 =0x20
2791 01:54:15.176846
2792 01:54:15.180117 CH=1, VrefRange= 0, VrefLevel = 32
2793 01:54:15.183581 TX Bit0 (977~1001) 25 989, Bit8 (966~991) 26 978,
2794 01:54:15.186767 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
2795 01:54:15.193372 TX Bit2 (973~996) 24 984, Bit10 (967~991) 25 979,
2796 01:54:15.197124 TX Bit3 (970~994) 25 982, Bit11 (968~992) 25 980,
2797 01:54:15.199961 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2798 01:54:15.206861 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2799 01:54:15.209980 TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979,
2800 01:54:15.213334 TX Bit7 (974~998) 25 986, Bit15 (963~988) 26 975,
2801 01:54:15.216755
2802 01:54:15.217311
2803 01:54:15.220192 TX Vref found, early break! 370< 379
2804 01:54:15.223365 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2805 01:54:15.227082 u1DelayCellOfst[0]=8 cells (7 PI)
2806 01:54:15.230216 u1DelayCellOfst[1]=6 cells (5 PI)
2807 01:54:15.233329 u1DelayCellOfst[2]=2 cells (2 PI)
2808 01:54:15.236730 u1DelayCellOfst[3]=0 cells (0 PI)
2809 01:54:15.240014 u1DelayCellOfst[4]=5 cells (4 PI)
2810 01:54:15.240434 u1DelayCellOfst[5]=7 cells (6 PI)
2811 01:54:15.243437 u1DelayCellOfst[6]=8 cells (7 PI)
2812 01:54:15.246477 u1DelayCellOfst[7]=5 cells (4 PI)
2813 01:54:15.250688 Byte0, DQ PI dly=982, DQM PI dly= 985
2814 01:54:15.257106 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
2815 01:54:15.258170
2816 01:54:15.260441 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
2817 01:54:15.260947
2818 01:54:15.263042 u1DelayCellOfst[8]=3 cells (3 PI)
2819 01:54:15.266410 u1DelayCellOfst[9]=3 cells (3 PI)
2820 01:54:15.269935 u1DelayCellOfst[10]=5 cells (4 PI)
2821 01:54:15.273144 u1DelayCellOfst[11]=6 cells (5 PI)
2822 01:54:15.276329 u1DelayCellOfst[12]=6 cells (5 PI)
2823 01:54:15.279834 u1DelayCellOfst[13]=6 cells (5 PI)
2824 01:54:15.283391 u1DelayCellOfst[14]=5 cells (4 PI)
2825 01:54:15.283827 u1DelayCellOfst[15]=0 cells (0 PI)
2826 01:54:15.286716 Byte1, DQ PI dly=975, DQM PI dly= 977
2827 01:54:15.292890 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
2828 01:54:15.293339
2829 01:54:15.296306 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
2830 01:54:15.296722
2831 01:54:15.299636 Write Rank0 MR14 =0x18
2832 01:54:15.300047
2833 01:54:15.300391 Final TX Range 0 Vref 24
2834 01:54:15.303228
2835 01:54:15.306929 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2836 01:54:15.310109
2837 01:54:15.313019 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2838 01:54:15.323124 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2839 01:54:15.329544 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2840 01:54:15.329979 Write Rank0 MR3 =0xb0
2841 01:54:15.332917 DramC Write-DBI on
2842 01:54:15.333369 ==
2843 01:54:15.336495 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2844 01:54:15.340213 fsp= 1, odt_onoff= 1, Byte mode= 0
2845 01:54:15.340721 ==
2846 01:54:15.346894 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2847 01:54:15.347300
2848 01:54:15.349768 Begin, DQ Scan Range 697~761
2849 01:54:15.350197
2850 01:54:15.350523
2851 01:54:15.350829 TX Vref Scan disable
2852 01:54:15.353008 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2853 01:54:15.356350 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2854 01:54:15.360228 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2855 01:54:15.363044 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2856 01:54:15.369772 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2857 01:54:15.373246 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2858 01:54:15.376338 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2859 01:54:15.379922 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2860 01:54:15.383359 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2861 01:54:15.386970 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2862 01:54:15.389552 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
2863 01:54:15.392799 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
2864 01:54:15.396204 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2865 01:54:15.399772 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2866 01:54:15.402778 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2867 01:54:15.406255 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2868 01:54:15.409906 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2869 01:54:15.413349 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2870 01:54:15.416521 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2871 01:54:15.419853 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2872 01:54:15.428637 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2873 01:54:15.431717 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2874 01:54:15.435083 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2875 01:54:15.438176 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2876 01:54:15.441632 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2877 01:54:15.445140 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2878 01:54:15.448374 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2879 01:54:15.451782 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2880 01:54:15.455228 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2881 01:54:15.458503 Byte0, DQ PI dly=730, DQM PI dly= 730
2882 01:54:15.461469 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2883 01:54:15.461921
2884 01:54:15.468768 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2885 01:54:15.469353
2886 01:54:15.471922 Byte1, DQ PI dly=721, DQM PI dly= 721
2887 01:54:15.475380 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
2888 01:54:15.475931
2889 01:54:15.478597 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
2890 01:54:15.479146
2891 01:54:15.485296 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2892 01:54:15.492154 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2893 01:54:15.501576 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2894 01:54:15.502159 Write Rank0 MR3 =0x30
2895 01:54:15.504617 DramC Write-DBI off
2896 01:54:15.505104
2897 01:54:15.505507 [DATLAT]
2898 01:54:15.507934 Freq=1600, CH1 RK0, use_rxtx_scan=0
2899 01:54:15.508383
2900 01:54:15.511316 DATLAT Default: 0xf
2901 01:54:15.511763 7, 0xFFFF, sum=0
2902 01:54:15.515280 8, 0xFFFF, sum=0
2903 01:54:15.515822 9, 0xFFFF, sum=0
2904 01:54:15.517989 10, 0xFFFF, sum=0
2905 01:54:15.518441 11, 0xFFFF, sum=0
2906 01:54:15.521438 12, 0xFFFF, sum=0
2907 01:54:15.521896 13, 0xFFFF, sum=0
2908 01:54:15.522258 14, 0x0, sum=1
2909 01:54:15.524798 15, 0x0, sum=2
2910 01:54:15.525400 16, 0x0, sum=3
2911 01:54:15.527856 17, 0x0, sum=4
2912 01:54:15.531650 pattern=2 first_step=14 total pass=5 best_step=16
2913 01:54:15.532155 ==
2914 01:54:15.537988 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2915 01:54:15.538483 fsp= 1, odt_onoff= 1, Byte mode= 0
2916 01:54:15.541897 ==
2917 01:54:15.544994 Start DQ dly to find pass range UseTestEngine =1
2918 01:54:15.547752 x-axis: bit #, y-axis: DQ dly (-127~63)
2919 01:54:15.548157 RX Vref Scan = 1
2920 01:54:15.671956
2921 01:54:15.672502 RX Vref found, early break!
2922 01:54:15.672861
2923 01:54:15.678519 Final RX Vref 13, apply to both rank0 and 1
2924 01:54:15.679056 ==
2925 01:54:15.682229 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2926 01:54:15.685173 fsp= 1, odt_onoff= 1, Byte mode= 0
2927 01:54:15.685826 ==
2928 01:54:15.686197 DQS Delay:
2929 01:54:15.688994 DQS0 = 0, DQS1 = 0
2930 01:54:15.689588 DQM Delay:
2931 01:54:15.691974 DQM0 = 20, DQM1 = 18
2932 01:54:15.692508 DQ Delay:
2933 01:54:15.695666 DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15
2934 01:54:15.698727 DQ4 =18, DQ5 =24, DQ6 =25, DQ7 =19
2935 01:54:15.702121 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19
2936 01:54:15.705047 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
2937 01:54:15.705535
2938 01:54:15.705887
2939 01:54:15.706211
2940 01:54:15.708800 [DramC_TX_OE_Calibration] TA2
2941 01:54:15.712031 Original DQ_B0 (3 6) =30, OEN = 27
2942 01:54:15.715083 Original DQ_B1 (3 6) =30, OEN = 27
2943 01:54:15.718971 23, 0x0, End_B0=23 End_B1=23
2944 01:54:15.719517 24, 0x0, End_B0=24 End_B1=24
2945 01:54:15.722002 25, 0x0, End_B0=25 End_B1=25
2946 01:54:15.725331 26, 0x0, End_B0=26 End_B1=26
2947 01:54:15.728681 27, 0x0, End_B0=27 End_B1=27
2948 01:54:15.729143 28, 0x0, End_B0=28 End_B1=28
2949 01:54:15.731739 29, 0x0, End_B0=29 End_B1=29
2950 01:54:15.735200 30, 0x0, End_B0=30 End_B1=30
2951 01:54:15.738668 31, 0xFFFF, End_B0=30 End_B1=30
2952 01:54:15.745653 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2953 01:54:15.748558 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2954 01:54:15.749014
2955 01:54:15.749411
2956 01:54:15.752166 Write Rank0 MR23 =0x3f
2957 01:54:15.752721 [DQSOSC]
2958 01:54:15.758539 [DQSOSCAuto] RK0, (LSB)MR18= 0xb9, (MSB)MR19= 0x3, tDQSOscB0 = 330 ps tDQSOscB1 = 0 ps
2959 01:54:15.765068 CH1_RK0: MR19=0x3, MR18=0xB9, DQSOSC=330, MR23=63, INC=22, DEC=33
2960 01:54:15.768407 Write Rank0 MR23 =0x3f
2961 01:54:15.768972 [DQSOSC]
2962 01:54:15.775070 [DQSOSCAuto] RK0, (LSB)MR18= 0xbe, (MSB)MR19= 0x3, tDQSOscB0 = 328 ps tDQSOscB1 = 0 ps
2963 01:54:15.778410 CH1 RK0: MR19=3, MR18=BE
2964 01:54:15.781810 [RankSwap] Rank num 2, (Multi 1), Rank 1
2965 01:54:15.785301 Write Rank0 MR2 =0xad
2966 01:54:15.785865 [Write Leveling]
2967 01:54:15.788766 delay byte0 byte1 byte2 byte3
2968 01:54:15.789354
2969 01:54:15.792216 10 0 0
2970 01:54:15.792778 11 0 0
2971 01:54:15.793150 12 0 0
2972 01:54:15.795791 13 0 0
2973 01:54:15.796353 14 0 0
2974 01:54:15.798838 15 0 0
2975 01:54:15.799400 16 0 0
2976 01:54:15.799770 17 0 0
2977 01:54:15.801892 18 0 0
2978 01:54:15.802355 19 0 0
2979 01:54:15.805565 20 0 0
2980 01:54:15.806027 21 0 0
2981 01:54:15.806394 22 0 0
2982 01:54:15.808558 23 0 0
2983 01:54:15.809021 24 0 0
2984 01:54:15.812103 25 0 0
2985 01:54:15.812609 26 0 0
2986 01:54:15.814921 27 0 0
2987 01:54:15.815344 28 0 0
2988 01:54:15.815678 29 0 0
2989 01:54:15.818363 30 0 0
2990 01:54:15.818784 31 0 0
2991 01:54:15.821774 32 0 ff
2992 01:54:15.822284 33 0 ff
2993 01:54:15.824916 34 ff ff
2994 01:54:15.825399 35 ff ff
2995 01:54:15.825740 36 ff ff
2996 01:54:15.828527 37 ff ff
2997 01:54:15.828944 38 ff ff
2998 01:54:15.831857 39 ff ff
2999 01:54:15.832273 40 ff ff
3000 01:54:15.838455 pass bytecount = 0xff (0xff: all bytes pass)
3001 01:54:15.838957
3002 01:54:15.839283 DQS0 dly: 34
3003 01:54:15.839586 DQS1 dly: 32
3004 01:54:15.841836 Write Rank0 MR2 =0x2d
3005 01:54:15.845361 [RankSwap] Rank num 2, (Multi 1), Rank 0
3006 01:54:15.848730 Write Rank1 MR1 =0xd6
3007 01:54:15.849141 [Gating]
3008 01:54:15.849513 ==
3009 01:54:15.852347 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3010 01:54:15.855222 fsp= 1, odt_onoff= 1, Byte mode= 0
3011 01:54:15.855638 ==
3012 01:54:15.862057 3 1 0 |f0f 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3013 01:54:15.865357 3 1 4 |3030 3534 |(0 0)(11 11) |(0 1)(1 1)| 0
3014 01:54:15.868699 3 1 8 |1817 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3015 01:54:15.875112 3 1 12 |3030 3534 |(0 0)(11 11) |(1 1)(0 1)| 0
3016 01:54:15.878579 3 1 16 |2e2e 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3017 01:54:15.882097 3 1 20 |1817 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3018 01:54:15.885220 3 1 24 |706 3534 |(1 1)(11 11) |(1 1)(0 1)| 0
3019 01:54:15.892021 3 1 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3020 01:54:15.895056 3 2 0 |2e2d 403 |(11 11)(11 11) |(0 0)(1 1)| 0
3021 01:54:15.898348 3 2 4 |302f 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3022 01:54:15.904986 3 2 8 |3838 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3023 01:54:15.908762 3 2 12 |3636 3d3d |(0 0)(11 11) |(1 1)(1 1)| 0
3024 01:54:15.911728 3 2 16 |1d1c 3d3d |(1 1)(11 11) |(1 1)(1 1)| 0
3025 01:54:15.915354 [Byte 0] Lead/lag Transition tap number (1)
3026 01:54:15.921713 3 2 20 |3737 3d3d |(0 0)(11 11) |(0 0)(1 1)| 0
3027 01:54:15.924877 3 2 24 |1a19 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3028 01:54:15.928654 3 2 28 |3535 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3029 01:54:15.931721 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
3030 01:54:15.938185 3 3 4 |3534 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3031 01:54:15.941902 3 3 8 |3534 1716 |(11 11)(11 11) |(0 1)(1 1)| 0
3032 01:54:15.945107 [Byte 1] Lead/lag falling Transition (3, 3, 8)
3033 01:54:15.951810 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3034 01:54:15.954850 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3035 01:54:15.958550 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3036 01:54:15.965639 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3037 01:54:15.968520 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3038 01:54:15.971941 3 4 0 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
3039 01:54:15.975607 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3040 01:54:15.981968 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3041 01:54:15.984982 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3042 01:54:15.988507 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3043 01:54:15.995110 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3044 01:54:15.998692 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3045 01:54:16.001812 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3046 01:54:16.008397 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3047 01:54:16.011627 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3048 01:54:16.015474 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3049 01:54:16.022455 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3050 01:54:16.025084 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3051 01:54:16.028559 [Byte 0] Lead/lag falling Transition (3, 5, 16)
3052 01:54:16.031334 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3053 01:54:16.038725 [Byte 0] Lead/lag Transition tap number (2)
3054 01:54:16.041808 [Byte 1] Lead/lag falling Transition (3, 5, 20)
3055 01:54:16.044893 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3056 01:54:16.048516 [Byte 1] Lead/lag Transition tap number (2)
3057 01:54:16.055142 3 5 28 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
3058 01:54:16.058344 3 6 0 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
3059 01:54:16.061907 [Byte 0]First pass (3, 6, 0)
3060 01:54:16.065067 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3061 01:54:16.068584 [Byte 1]First pass (3, 6, 4)
3062 01:54:16.071657 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3063 01:54:16.074913 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3064 01:54:16.078735 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3065 01:54:16.081650 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3066 01:54:16.087918 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3067 01:54:16.091391 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3068 01:54:16.094851 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3069 01:54:16.098128 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3070 01:54:16.101705 All bytes gating window > 1UI, Early break!
3071 01:54:16.102381
3072 01:54:16.108257 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
3073 01:54:16.108815
3074 01:54:16.111649 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 24)
3075 01:54:16.112108
3076 01:54:16.112465
3077 01:54:16.112797
3078 01:54:16.114521 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
3079 01:54:16.114995
3080 01:54:16.118171 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
3081 01:54:16.118695
3082 01:54:16.119023
3083 01:54:16.121255 Write Rank1 MR1 =0x56
3084 01:54:16.121915
3085 01:54:16.124485 best RODT dly(2T, 0.5T) = (2, 2)
3086 01:54:16.124899
3087 01:54:16.127910 best RODT dly(2T, 0.5T) = (2, 2)
3088 01:54:16.128399 ==
3089 01:54:16.130872 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3090 01:54:16.134318 fsp= 1, odt_onoff= 1, Byte mode= 0
3091 01:54:16.137437 ==
3092 01:54:16.140931 Start DQ dly to find pass range UseTestEngine =0
3093 01:54:16.144315 x-axis: bit #, y-axis: DQ dly (-127~63)
3094 01:54:16.144727 RX Vref Scan = 0
3095 01:54:16.147955 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3096 01:54:16.150889 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3097 01:54:16.154060 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3098 01:54:16.157540 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3099 01:54:16.161066 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3100 01:54:16.164263 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3101 01:54:16.167807 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3102 01:54:16.168391 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3103 01:54:16.170721 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3104 01:54:16.173834 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3105 01:54:16.177715 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3106 01:54:16.180965 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3107 01:54:16.183897 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3108 01:54:16.187263 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3109 01:54:16.190622 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3110 01:54:16.193807 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3111 01:54:16.194265 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3112 01:54:16.197457 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3113 01:54:16.200507 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3114 01:54:16.203615 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3115 01:54:16.207341 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3116 01:54:16.210776 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3117 01:54:16.213820 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3118 01:54:16.214280 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3119 01:54:16.217021 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3120 01:54:16.220599 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3121 01:54:16.224322 0, [0] xxooxxxx xxxxxxxo [MSB]
3122 01:54:16.227169 1, [0] xxooxxxo xxxxxxxo [MSB]
3123 01:54:16.230476 2, [0] xxoooxxo xxxxxxxo [MSB]
3124 01:54:16.230933 3, [0] xxoooxxo ooooxooo [MSB]
3125 01:54:16.233820 4, [0] xxoooxxo ooooxooo [MSB]
3126 01:54:16.237101 5, [0] xoooooxo oooooooo [MSB]
3127 01:54:16.240556 6, [0] xoooooxo oooooooo [MSB]
3128 01:54:16.244197 34, [0] oooxoooo oooooooo [MSB]
3129 01:54:16.247833 35, [0] ooxxoooo ooooooox [MSB]
3130 01:54:16.250658 36, [0] ooxxoooo ooooooox [MSB]
3131 01:54:16.251214 37, [0] ooxxxooo ooxoooox [MSB]
3132 01:54:16.253631 38, [0] ooxxxooo xoxooxox [MSB]
3133 01:54:16.257352 39, [0] ooxxxoox xxxxoxxx [MSB]
3134 01:54:16.260451 40, [0] ooxxxoox xxxxoxxx [MSB]
3135 01:54:16.264046 41, [0] ooxxxoxx xxxxxxxx [MSB]
3136 01:54:16.266895 42, [0] xxxxxxxx xxxxxxxx [MSB]
3137 01:54:16.270181 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
3138 01:54:16.274447 iDelay=42, Bit 1, Center 23 (5 ~ 41) 37
3139 01:54:16.276808 iDelay=42, Bit 2, Center 17 (0 ~ 34) 35
3140 01:54:16.280214 iDelay=42, Bit 3, Center 15 (-2 ~ 33) 36
3141 01:54:16.283555 iDelay=42, Bit 4, Center 19 (2 ~ 36) 35
3142 01:54:16.286939 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3143 01:54:16.290508 iDelay=42, Bit 6, Center 23 (7 ~ 40) 34
3144 01:54:16.293775 iDelay=42, Bit 7, Center 19 (1 ~ 38) 38
3145 01:54:16.297451 iDelay=42, Bit 8, Center 20 (3 ~ 37) 35
3146 01:54:16.300623 iDelay=42, Bit 9, Center 20 (3 ~ 38) 36
3147 01:54:16.303376 iDelay=42, Bit 10, Center 19 (3 ~ 36) 34
3148 01:54:16.307164 iDelay=42, Bit 11, Center 20 (3 ~ 38) 36
3149 01:54:16.313553 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3150 01:54:16.317380 iDelay=42, Bit 13, Center 20 (3 ~ 37) 35
3151 01:54:16.320589 iDelay=42, Bit 14, Center 20 (3 ~ 38) 36
3152 01:54:16.323644 iDelay=42, Bit 15, Center 16 (-1 ~ 34) 36
3153 01:54:16.324197 ==
3154 01:54:16.326916 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3155 01:54:16.329919 fsp= 1, odt_onoff= 1, Byte mode= 0
3156 01:54:16.333448 ==
3157 01:54:16.333897 DQS Delay:
3158 01:54:16.334249 DQS0 = 0, DQS1 = 0
3159 01:54:16.336698 DQM Delay:
3160 01:54:16.337141 DQM0 = 20, DQM1 = 19
3161 01:54:16.340251 DQ Delay:
3162 01:54:16.340795 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
3163 01:54:16.343538 DQ4 =19, DQ5 =23, DQ6 =23, DQ7 =19
3164 01:54:16.346947 DQ8 =20, DQ9 =20, DQ10 =19, DQ11 =20
3165 01:54:16.349848 DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =16
3166 01:54:16.350297
3167 01:54:16.353216
3168 01:54:16.353693 DramC Write-DBI off
3169 01:54:16.354046 ==
3170 01:54:16.359929 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3171 01:54:16.363704 fsp= 1, odt_onoff= 1, Byte mode= 0
3172 01:54:16.364216 ==
3173 01:54:16.366617 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3174 01:54:16.367065
3175 01:54:16.370221 Begin, DQ Scan Range 928~1184
3176 01:54:16.370634
3177 01:54:16.370961
3178 01:54:16.373177 TX Vref Scan disable
3179 01:54:16.376628 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3180 01:54:16.379694 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3181 01:54:16.383637 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3182 01:54:16.386632 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3183 01:54:16.389899 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3184 01:54:16.393023 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3185 01:54:16.396983 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3186 01:54:16.400015 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3187 01:54:16.403467 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3188 01:54:16.406294 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3189 01:54:16.410001 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3190 01:54:16.413005 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3191 01:54:16.416639 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3192 01:54:16.420367 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3193 01:54:16.423203 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3194 01:54:16.429828 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3195 01:54:16.432845 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3196 01:54:16.436539 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3197 01:54:16.439831 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3198 01:54:16.443804 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3199 01:54:16.446452 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3200 01:54:16.449595 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3201 01:54:16.453560 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3202 01:54:16.456519 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3203 01:54:16.459932 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3204 01:54:16.463549 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3205 01:54:16.466579 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3206 01:54:16.469820 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3207 01:54:16.473233 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3208 01:54:16.476791 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3209 01:54:16.479885 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3210 01:54:16.483399 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3211 01:54:16.489940 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3212 01:54:16.493176 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3213 01:54:16.496560 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3214 01:54:16.499666 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3215 01:54:16.503294 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3216 01:54:16.506491 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3217 01:54:16.509640 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3218 01:54:16.513179 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3219 01:54:16.516301 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3220 01:54:16.519837 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
3221 01:54:16.523056 970 |3 6 10|[0] xxxxxxxx oooooxoo [MSB]
3222 01:54:16.526442 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3223 01:54:16.530049 972 |3 6 12|[0] xxxoxxxx oooooooo [MSB]
3224 01:54:16.532807 973 |3 6 13|[0] xxooxxxx oooooooo [MSB]
3225 01:54:16.536230 974 |3 6 14|[0] xxoooxxx oooooooo [MSB]
3226 01:54:16.539791 975 |3 6 15|[0] xxoooxxx oooooooo [MSB]
3227 01:54:16.543023 976 |3 6 16|[0] xoooooxo oooooooo [MSB]
3228 01:54:16.551197 989 |3 6 29|[0] oooooooo ooooooox [MSB]
3229 01:54:16.554013 990 |3 6 30|[0] oooooooo ooooooox [MSB]
3230 01:54:16.557435 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3231 01:54:16.560987 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3232 01:54:16.564262 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3233 01:54:16.567226 994 |3 6 34|[0] ooxxoooo xxxxxxxx [MSB]
3234 01:54:16.570639 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]
3235 01:54:16.574502 996 |3 6 36|[0] ooxxxoox xxxxxxxx [MSB]
3236 01:54:16.577701 997 |3 6 37|[0] ooxxxoox xxxxxxxx [MSB]
3237 01:54:16.580789 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
3238 01:54:16.584026 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3239 01:54:16.587184 Byte0, DQ PI dly=984, DQM PI dly= 984
3240 01:54:16.594424 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
3241 01:54:16.594929
3242 01:54:16.597233 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
3243 01:54:16.597693
3244 01:54:16.600926 Byte1, DQ PI dly=978, DQM PI dly= 978
3245 01:54:16.603669 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3246 01:54:16.604090
3247 01:54:16.610977 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3248 01:54:16.611498
3249 01:54:16.611825 ==
3250 01:54:16.613821 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3251 01:54:16.617509 fsp= 1, odt_onoff= 1, Byte mode= 0
3252 01:54:16.618028 ==
3253 01:54:16.624158 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3254 01:54:16.624674
3255 01:54:16.624999 Begin, DQ Scan Range 954~1018
3256 01:54:16.627478 Write Rank1 MR14 =0x0
3257 01:54:16.636169
3258 01:54:16.636683 CH=1, VrefRange= 0, VrefLevel = 0
3259 01:54:16.642688 TX Bit0 (978~997) 20 987, Bit8 (970~986) 17 978,
3260 01:54:16.646099 TX Bit1 (978~994) 17 986, Bit9 (970~986) 17 978,
3261 01:54:16.652730 TX Bit2 (976~990) 15 983, Bit10 (972~987) 16 979,
3262 01:54:16.655870 TX Bit3 (974~990) 17 982, Bit11 (974~991) 18 982,
3263 01:54:16.659169 TX Bit4 (976~992) 17 984, Bit12 (973~988) 16 980,
3264 01:54:16.665571 TX Bit5 (977~995) 19 986, Bit13 (975~987) 13 981,
3265 01:54:16.669041 TX Bit6 (978~997) 20 987, Bit14 (973~987) 15 980,
3266 01:54:16.672235 TX Bit7 (977~991) 15 984, Bit15 (968~985) 18 976,
3267 01:54:16.675656
3268 01:54:16.676198 Write Rank1 MR14 =0x2
3269 01:54:16.685002
3270 01:54:16.685656 CH=1, VrefRange= 0, VrefLevel = 2
3271 01:54:16.691281 TX Bit0 (978~998) 21 988, Bit8 (971~987) 17 979,
3272 01:54:16.694749 TX Bit1 (978~994) 17 986, Bit9 (970~987) 18 978,
3273 01:54:16.701737 TX Bit2 (975~991) 17 983, Bit10 (972~987) 16 979,
3274 01:54:16.704573 TX Bit3 (973~990) 18 981, Bit11 (973~991) 19 982,
3275 01:54:16.708129 TX Bit4 (976~992) 17 984, Bit12 (972~988) 17 980,
3276 01:54:16.714589 TX Bit5 (978~996) 19 987, Bit13 (975~988) 14 981,
3277 01:54:16.717850 TX Bit6 (978~997) 20 987, Bit14 (973~988) 16 980,
3278 01:54:16.721907 TX Bit7 (977~992) 16 984, Bit15 (968~985) 18 976,
3279 01:54:16.722419
3280 01:54:16.724700 Write Rank1 MR14 =0x4
3281 01:54:16.733545
3282 01:54:16.734005 CH=1, VrefRange= 0, VrefLevel = 4
3283 01:54:16.740542 TX Bit0 (978~998) 21 988, Bit8 (971~988) 18 979,
3284 01:54:16.744433 TX Bit1 (977~995) 19 986, Bit9 (970~987) 18 978,
3285 01:54:16.750619 TX Bit2 (975~991) 17 983, Bit10 (972~988) 17 980,
3286 01:54:16.753601 TX Bit3 (973~991) 19 982, Bit11 (974~991) 18 982,
3287 01:54:16.757167 TX Bit4 (976~992) 17 984, Bit12 (972~989) 18 980,
3288 01:54:16.763900 TX Bit5 (977~996) 20 986, Bit13 (974~988) 15 981,
3289 01:54:16.767127 TX Bit6 (978~998) 21 988, Bit14 (972~988) 17 980,
3290 01:54:16.770257 TX Bit7 (977~992) 16 984, Bit15 (968~985) 18 976,
3291 01:54:16.770665
3292 01:54:16.773626 Write Rank1 MR14 =0x6
3293 01:54:16.782939
3294 01:54:16.783444 CH=1, VrefRange= 0, VrefLevel = 6
3295 01:54:16.789543 TX Bit0 (978~998) 21 988, Bit8 (970~988) 19 979,
3296 01:54:16.792853 TX Bit1 (977~996) 20 986, Bit9 (969~988) 20 978,
3297 01:54:16.799158 TX Bit2 (974~992) 19 983, Bit10 (971~987) 17 979,
3298 01:54:16.802698 TX Bit3 (973~991) 19 982, Bit11 (972~991) 20 981,
3299 01:54:16.805716 TX Bit4 (975~993) 19 984, Bit12 (972~990) 19 981,
3300 01:54:16.812968 TX Bit5 (977~997) 21 987, Bit13 (973~988) 16 980,
3301 01:54:16.815794 TX Bit6 (978~998) 21 988, Bit14 (972~989) 18 980,
3302 01:54:16.819447 TX Bit7 (976~992) 17 984, Bit15 (968~986) 19 977,
3303 01:54:16.819866
3304 01:54:16.822582 Write Rank1 MR14 =0x8
3305 01:54:16.831447
3306 01:54:16.832001 CH=1, VrefRange= 0, VrefLevel = 8
3307 01:54:16.838402 TX Bit0 (977~998) 22 987, Bit8 (970~989) 20 979,
3308 01:54:16.842071 TX Bit1 (977~997) 21 987, Bit9 (969~987) 19 978,
3309 01:54:16.848285 TX Bit2 (974~992) 19 983, Bit10 (971~988) 18 979,
3310 01:54:16.852211 TX Bit3 (972~992) 21 982, Bit11 (972~991) 20 981,
3311 01:54:16.855124 TX Bit4 (975~993) 19 984, Bit12 (971~990) 20 980,
3312 01:54:16.861538 TX Bit5 (977~997) 21 987, Bit13 (972~989) 18 980,
3313 01:54:16.864924 TX Bit6 (977~998) 22 987, Bit14 (971~990) 20 980,
3314 01:54:16.867977 TX Bit7 (976~993) 18 984, Bit15 (968~986) 19 977,
3315 01:54:16.868458
3316 01:54:16.871378 Write Rank1 MR14 =0xa
3317 01:54:16.880921
3318 01:54:16.884078 CH=1, VrefRange= 0, VrefLevel = 10
3319 01:54:16.887462 TX Bit0 (977~999) 23 988, Bit8 (970~990) 21 980,
3320 01:54:16.890914 TX Bit1 (977~997) 21 987, Bit9 (969~989) 21 979,
3321 01:54:16.897065 TX Bit2 (974~992) 19 983, Bit10 (971~988) 18 979,
3322 01:54:16.900848 TX Bit3 (972~992) 21 982, Bit11 (971~992) 22 981,
3323 01:54:16.904110 TX Bit4 (975~994) 20 984, Bit12 (971~991) 21 981,
3324 01:54:16.910966 TX Bit5 (977~997) 21 987, Bit13 (972~990) 19 981,
3325 01:54:16.914471 TX Bit6 (977~998) 22 987, Bit14 (971~991) 21 981,
3326 01:54:16.917670 TX Bit7 (976~993) 18 984, Bit15 (967~986) 20 976,
3327 01:54:16.918230
3328 01:54:16.920515 Write Rank1 MR14 =0xc
3329 01:54:16.929719
3330 01:54:16.933438 CH=1, VrefRange= 0, VrefLevel = 12
3331 01:54:16.936623 TX Bit0 (977~999) 23 988, Bit8 (970~990) 21 980,
3332 01:54:16.940490 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
3333 01:54:16.946521 TX Bit2 (973~993) 21 983, Bit10 (970~990) 21 980,
3334 01:54:16.949751 TX Bit3 (971~992) 22 981, Bit11 (971~992) 22 981,
3335 01:54:16.953059 TX Bit4 (975~994) 20 984, Bit12 (970~991) 22 980,
3336 01:54:16.960113 TX Bit5 (976~998) 23 987, Bit13 (972~991) 20 981,
3337 01:54:16.963802 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
3338 01:54:16.967088 TX Bit7 (976~994) 19 985, Bit15 (967~987) 21 977,
3339 01:54:16.967637
3340 01:54:16.970595 Write Rank1 MR14 =0xe
3341 01:54:16.979070
3342 01:54:16.982375 CH=1, VrefRange= 0, VrefLevel = 14
3343 01:54:16.985634 TX Bit0 (977~999) 23 988, Bit8 (969~991) 23 980,
3344 01:54:16.989355 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
3345 01:54:16.995854 TX Bit2 (972~993) 22 982, Bit10 (969~990) 22 979,
3346 01:54:16.999090 TX Bit3 (970~993) 24 981, Bit11 (971~992) 22 981,
3347 01:54:17.002164 TX Bit4 (974~995) 22 984, Bit12 (970~991) 22 980,
3348 01:54:17.009005 TX Bit5 (977~998) 22 987, Bit13 (971~991) 21 981,
3349 01:54:17.012329 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
3350 01:54:17.016060 TX Bit7 (976~994) 19 985, Bit15 (967~987) 21 977,
3351 01:54:17.016473
3352 01:54:17.019664 Write Rank1 MR14 =0x10
3353 01:54:17.028666
3354 01:54:17.031513 CH=1, VrefRange= 0, VrefLevel = 16
3355 01:54:17.035642 TX Bit0 (977~999) 23 988, Bit8 (969~991) 23 980,
3356 01:54:17.038870 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
3357 01:54:17.045157 TX Bit2 (972~993) 22 982, Bit10 (970~991) 22 980,
3358 01:54:17.048284 TX Bit3 (971~993) 23 982, Bit11 (970~993) 24 981,
3359 01:54:17.051653 TX Bit4 (974~995) 22 984, Bit12 (970~992) 23 981,
3360 01:54:17.058100 TX Bit5 (976~998) 23 987, Bit13 (970~991) 22 980,
3361 01:54:17.061632 TX Bit6 (976~999) 24 987, Bit14 (970~991) 22 980,
3362 01:54:17.064865 TX Bit7 (976~995) 20 985, Bit15 (967~988) 22 977,
3363 01:54:17.065302
3364 01:54:17.068496 Write Rank1 MR14 =0x12
3365 01:54:17.077566
3366 01:54:17.082016 CH=1, VrefRange= 0, VrefLevel = 18
3367 01:54:17.084292 TX Bit0 (977~1000) 24 988, Bit8 (969~991) 23 980,
3368 01:54:17.088055 TX Bit1 (976~998) 23 987, Bit9 (969~991) 23 980,
3369 01:54:17.094111 TX Bit2 (972~994) 23 983, Bit10 (969~991) 23 980,
3370 01:54:17.097939 TX Bit3 (970~994) 25 982, Bit11 (970~993) 24 981,
3371 01:54:17.100978 TX Bit4 (973~996) 24 984, Bit12 (970~992) 23 981,
3372 01:54:17.107537 TX Bit5 (976~999) 24 987, Bit13 (970~991) 22 980,
3373 01:54:17.111786 TX Bit6 (976~999) 24 987, Bit14 (970~992) 23 981,
3374 01:54:17.114364 TX Bit7 (975~995) 21 985, Bit15 (967~988) 22 977,
3375 01:54:17.114788
3376 01:54:17.118137 Write Rank1 MR14 =0x14
3377 01:54:17.127520
3378 01:54:17.130363 CH=1, VrefRange= 0, VrefLevel = 20
3379 01:54:17.134134 TX Bit0 (976~1000) 25 988, Bit8 (969~992) 24 980,
3380 01:54:17.137371 TX Bit1 (976~998) 23 987, Bit9 (969~991) 23 980,
3381 01:54:17.144457 TX Bit2 (972~994) 23 983, Bit10 (969~991) 23 980,
3382 01:54:17.147288 TX Bit3 (969~994) 26 981, Bit11 (970~993) 24 981,
3383 01:54:17.150345 TX Bit4 (973~996) 24 984, Bit12 (970~992) 23 981,
3384 01:54:17.157006 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
3385 01:54:17.160558 TX Bit6 (976~1000) 25 988, Bit14 (970~992) 23 981,
3386 01:54:17.167469 TX Bit7 (975~996) 22 985, Bit15 (967~988) 22 977,
3387 01:54:17.167967
3388 01:54:17.168282 Write Rank1 MR14 =0x16
3389 01:54:17.177243
3390 01:54:17.180307 CH=1, VrefRange= 0, VrefLevel = 22
3391 01:54:17.183719 TX Bit0 (976~1000) 25 988, Bit8 (969~991) 23 980,
3392 01:54:17.186631 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
3393 01:54:17.194220 TX Bit2 (971~995) 25 983, Bit10 (969~991) 23 980,
3394 01:54:17.197137 TX Bit3 (969~994) 26 981, Bit11 (970~993) 24 981,
3395 01:54:17.200174 TX Bit4 (973~997) 25 985, Bit12 (969~992) 24 980,
3396 01:54:17.206648 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
3397 01:54:17.210714 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3398 01:54:17.213743 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3399 01:54:17.216969
3400 01:54:17.217410 Write Rank1 MR14 =0x18
3401 01:54:17.226766
3402 01:54:17.230526 CH=1, VrefRange= 0, VrefLevel = 24
3403 01:54:17.233401 TX Bit0 (976~1000) 25 988, Bit8 (969~991) 23 980,
3404 01:54:17.236877 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
3405 01:54:17.243797 TX Bit2 (971~995) 25 983, Bit10 (969~991) 23 980,
3406 01:54:17.247183 TX Bit3 (969~994) 26 981, Bit11 (970~993) 24 981,
3407 01:54:17.250155 TX Bit4 (973~997) 25 985, Bit12 (969~992) 24 980,
3408 01:54:17.256713 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
3409 01:54:17.260156 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3410 01:54:17.263486 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3411 01:54:17.266519
3412 01:54:17.266966 Write Rank1 MR14 =0x1a
3413 01:54:17.277113
3414 01:54:17.280276 CH=1, VrefRange= 0, VrefLevel = 26
3415 01:54:17.283313 TX Bit0 (976~1000) 25 988, Bit8 (969~991) 23 980,
3416 01:54:17.286392 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
3417 01:54:17.293508 TX Bit2 (971~995) 25 983, Bit10 (969~991) 23 980,
3418 01:54:17.296537 TX Bit3 (969~994) 26 981, Bit11 (970~993) 24 981,
3419 01:54:17.300240 TX Bit4 (973~997) 25 985, Bit12 (969~992) 24 980,
3420 01:54:17.306485 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
3421 01:54:17.310265 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3422 01:54:17.313643 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3423 01:54:17.316579
3424 01:54:17.317023 Write Rank1 MR14 =0x1c
3425 01:54:17.326723
3426 01:54:17.329879 CH=1, VrefRange= 0, VrefLevel = 28
3427 01:54:17.332832 TX Bit0 (976~1000) 25 988, Bit8 (969~991) 23 980,
3428 01:54:17.336167 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
3429 01:54:17.343181 TX Bit2 (971~995) 25 983, Bit10 (969~991) 23 980,
3430 01:54:17.346470 TX Bit3 (969~994) 26 981, Bit11 (970~993) 24 981,
3431 01:54:17.349946 TX Bit4 (973~997) 25 985, Bit12 (969~992) 24 980,
3432 01:54:17.356237 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
3433 01:54:17.359801 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3434 01:54:17.366189 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3435 01:54:17.366737
3436 01:54:17.367092 Write Rank1 MR14 =0x1e
3437 01:54:17.376406
3438 01:54:17.376957 CH=1, VrefRange= 0, VrefLevel = 30
3439 01:54:17.382498 TX Bit0 (976~1000) 25 988, Bit8 (969~991) 23 980,
3440 01:54:17.386283 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
3441 01:54:17.392506 TX Bit2 (971~995) 25 983, Bit10 (969~991) 23 980,
3442 01:54:17.396179 TX Bit3 (969~994) 26 981, Bit11 (970~993) 24 981,
3443 01:54:17.398892 TX Bit4 (973~997) 25 985, Bit12 (969~992) 24 980,
3444 01:54:17.405640 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
3445 01:54:17.409103 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3446 01:54:17.412455 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3447 01:54:17.415758
3448 01:54:17.416161 Write Rank1 MR14 =0x20
3449 01:54:17.425511
3450 01:54:17.428716 CH=1, VrefRange= 0, VrefLevel = 32
3451 01:54:17.432108 TX Bit0 (976~1000) 25 988, Bit8 (969~991) 23 980,
3452 01:54:17.435267 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
3453 01:54:17.442211 TX Bit2 (971~995) 25 983, Bit10 (969~991) 23 980,
3454 01:54:17.445849 TX Bit3 (969~994) 26 981, Bit11 (970~993) 24 981,
3455 01:54:17.448827 TX Bit4 (973~997) 25 985, Bit12 (969~992) 24 980,
3456 01:54:17.455992 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
3457 01:54:17.458940 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3458 01:54:17.465619 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3459 01:54:17.466166
3460 01:54:17.466521
3461 01:54:17.468597 TX Vref found, early break! 361< 366
3462 01:54:17.471932 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3463 01:54:17.475192 u1DelayCellOfst[0]=8 cells (7 PI)
3464 01:54:17.478672 u1DelayCellOfst[1]=7 cells (6 PI)
3465 01:54:17.481723 u1DelayCellOfst[2]=2 cells (2 PI)
3466 01:54:17.485340 u1DelayCellOfst[3]=0 cells (0 PI)
3467 01:54:17.488519 u1DelayCellOfst[4]=5 cells (4 PI)
3468 01:54:17.488928 u1DelayCellOfst[5]=7 cells (6 PI)
3469 01:54:17.492054 u1DelayCellOfst[6]=8 cells (7 PI)
3470 01:54:17.495215 u1DelayCellOfst[7]=6 cells (5 PI)
3471 01:54:17.498333 Byte0, DQ PI dly=981, DQM PI dly= 984
3472 01:54:17.505361 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
3473 01:54:17.505866
3474 01:54:17.508348 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
3475 01:54:17.508762
3476 01:54:17.512002 u1DelayCellOfst[8]=3 cells (3 PI)
3477 01:54:17.515342 u1DelayCellOfst[9]=2 cells (2 PI)
3478 01:54:17.518642 u1DelayCellOfst[10]=3 cells (3 PI)
3479 01:54:17.522132 u1DelayCellOfst[11]=5 cells (4 PI)
3480 01:54:17.525077 u1DelayCellOfst[12]=3 cells (3 PI)
3481 01:54:17.529014 u1DelayCellOfst[13]=5 cells (4 PI)
3482 01:54:17.531927 u1DelayCellOfst[14]=3 cells (3 PI)
3483 01:54:17.532345 u1DelayCellOfst[15]=0 cells (0 PI)
3484 01:54:17.534927 Byte1, DQ PI dly=977, DQM PI dly= 979
3485 01:54:17.542163 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3486 01:54:17.542630
3487 01:54:17.545044 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3488 01:54:17.545502
3489 01:54:17.548188 Write Rank1 MR14 =0x16
3490 01:54:17.548620
3491 01:54:17.548947 Final TX Range 0 Vref 22
3492 01:54:17.551767
3493 01:54:17.555377 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3494 01:54:17.558216
3495 01:54:17.561856 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3496 01:54:17.571580 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3497 01:54:17.578561 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3498 01:54:17.579067 Write Rank1 MR3 =0xb0
3499 01:54:17.582068 DramC Write-DBI on
3500 01:54:17.582477 ==
3501 01:54:17.584936 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3502 01:54:17.588631 fsp= 1, odt_onoff= 1, Byte mode= 0
3503 01:54:17.589045 ==
3504 01:54:17.595220 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3505 01:54:17.595631
3506 01:54:17.595952 Begin, DQ Scan Range 699~763
3507 01:54:17.596253
3508 01:54:17.599008
3509 01:54:17.599415 TX Vref Scan disable
3510 01:54:17.601830 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3511 01:54:17.605145 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3512 01:54:17.608638 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3513 01:54:17.611913 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3514 01:54:17.614871 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3515 01:54:17.618409 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3516 01:54:17.625381 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3517 01:54:17.628726 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3518 01:54:17.631875 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3519 01:54:17.635094 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3520 01:54:17.638871 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3521 01:54:17.641815 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3522 01:54:17.644807 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3523 01:54:17.648476 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3524 01:54:17.651738 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3525 01:54:17.655504 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3526 01:54:17.658343 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3527 01:54:17.661877 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3528 01:54:17.669681 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3529 01:54:17.673101 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3530 01:54:17.676553 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3531 01:54:17.679857 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3532 01:54:17.682887 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3533 01:54:17.686496 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3534 01:54:17.689991 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3535 01:54:17.692787 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3536 01:54:17.696444 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
3537 01:54:17.699719 Byte0, DQ PI dly=730, DQM PI dly= 730
3538 01:54:17.702889 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
3539 01:54:17.703408
3540 01:54:17.709657 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
3541 01:54:17.710148
3542 01:54:17.712693 Byte1, DQ PI dly=723, DQM PI dly= 723
3543 01:54:17.716368 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3544 01:54:17.716787
3545 01:54:17.719703 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3546 01:54:17.720122
3547 01:54:17.726356 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3548 01:54:17.732925 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3549 01:54:17.743014 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3550 01:54:17.743434 Write Rank1 MR3 =0x30
3551 01:54:17.746113 DramC Write-DBI off
3552 01:54:17.746554
3553 01:54:17.746884 [DATLAT]
3554 01:54:17.749442 Freq=1600, CH1 RK1, use_rxtx_scan=0
3555 01:54:17.749858
3556 01:54:17.753087 DATLAT Default: 0x10
3557 01:54:17.753626 7, 0xFFFF, sum=0
3558 01:54:17.756132 8, 0xFFFF, sum=0
3559 01:54:17.756571 9, 0xFFFF, sum=0
3560 01:54:17.759509 10, 0xFFFF, sum=0
3561 01:54:17.760046 11, 0xFFFF, sum=0
3562 01:54:17.762738 12, 0xFFFF, sum=0
3563 01:54:17.763174 13, 0xFFFF, sum=0
3564 01:54:17.763610 14, 0x0, sum=1
3565 01:54:17.765953 15, 0x0, sum=2
3566 01:54:17.766389 16, 0x0, sum=3
3567 01:54:17.769563 17, 0x0, sum=4
3568 01:54:17.773080 pattern=2 first_step=14 total pass=5 best_step=16
3569 01:54:17.773645 ==
3570 01:54:17.779761 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3571 01:54:17.782621 fsp= 1, odt_onoff= 1, Byte mode= 0
3572 01:54:17.783040 ==
3573 01:54:17.786258 Start DQ dly to find pass range UseTestEngine =1
3574 01:54:17.789346 x-axis: bit #, y-axis: DQ dly (-127~63)
3575 01:54:17.789762 RX Vref Scan = 0
3576 01:54:17.792642 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3577 01:54:17.795988 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3578 01:54:17.799823 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3579 01:54:17.803141 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3580 01:54:17.805969 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3581 01:54:17.809409 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3582 01:54:17.812977 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3583 01:54:17.816037 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3584 01:54:17.816475 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3585 01:54:17.819279 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3586 01:54:17.822491 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3587 01:54:17.825885 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3588 01:54:17.828952 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3589 01:54:17.832581 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3590 01:54:17.835912 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3591 01:54:17.839320 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3592 01:54:17.839758 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3593 01:54:17.842709 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3594 01:54:17.845661 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3595 01:54:17.848946 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3596 01:54:17.852085 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3597 01:54:17.855595 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3598 01:54:17.858632 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3599 01:54:17.858945 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3600 01:54:17.862291 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3601 01:54:17.865879 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3602 01:54:17.868748 0, [0] xxooxxxx xxxxxxxo [MSB]
3603 01:54:17.872654 1, [0] xxoooxxx xxxxxxxo [MSB]
3604 01:54:17.875418 2, [0] xxoooxxo oooxxxxo [MSB]
3605 01:54:17.878768 3, [0] xxoooxxo ooooxooo [MSB]
3606 01:54:17.879165 4, [0] xxoooxxo oooooooo [MSB]
3607 01:54:17.882128 5, [0] xoooooxo oooooooo [MSB]
3608 01:54:17.885496 6, [0] xoooooxo oooooooo [MSB]
3609 01:54:17.889359 34, [0] oooxoooo oooooooo [MSB]
3610 01:54:17.892631 35, [0] oooxoooo ooooooox [MSB]
3611 01:54:17.895979 36, [0] ooxxoooo ooooooox [MSB]
3612 01:54:17.899276 37, [0] ooxxxoox ooxooxxx [MSB]
3613 01:54:17.902627 38, [0] ooxxxoox xxxooxxx [MSB]
3614 01:54:17.906382 39, [0] ooxxxoox xxxxoxxx [MSB]
3615 01:54:17.906783 40, [0] ooxxxoox xxxxxxxx [MSB]
3616 01:54:17.909397 41, [0] oxxxxoox xxxxxxxx [MSB]
3617 01:54:17.913004 42, [0] oxxxxxox xxxxxxxx [MSB]
3618 01:54:17.916179 43, [0] xxxxxxxx xxxxxxxx [MSB]
3619 01:54:17.919486 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3620 01:54:17.922987 iDelay=43, Bit 1, Center 22 (5 ~ 40) 36
3621 01:54:17.926421 iDelay=43, Bit 2, Center 17 (0 ~ 35) 36
3622 01:54:17.929819 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
3623 01:54:17.932909 iDelay=43, Bit 4, Center 18 (1 ~ 36) 36
3624 01:54:17.936383 iDelay=43, Bit 5, Center 23 (5 ~ 41) 37
3625 01:54:17.939290 iDelay=43, Bit 6, Center 24 (7 ~ 42) 36
3626 01:54:17.946711 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
3627 01:54:17.949566 iDelay=43, Bit 8, Center 19 (2 ~ 37) 36
3628 01:54:17.952849 iDelay=43, Bit 9, Center 19 (2 ~ 37) 36
3629 01:54:17.956047 iDelay=43, Bit 10, Center 19 (2 ~ 36) 35
3630 01:54:17.959546 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
3631 01:54:17.962856 iDelay=43, Bit 12, Center 21 (4 ~ 39) 36
3632 01:54:17.966439 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
3633 01:54:17.969564 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
3634 01:54:17.972985 iDelay=43, Bit 15, Center 17 (0 ~ 34) 35
3635 01:54:17.973552 ==
3636 01:54:17.979899 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3637 01:54:17.982770 fsp= 1, odt_onoff= 1, Byte mode= 0
3638 01:54:17.983232 ==
3639 01:54:17.983639 DQS Delay:
3640 01:54:17.985951 DQS0 = 0, DQS1 = 0
3641 01:54:17.986363 DQM Delay:
3642 01:54:17.989690 DQM0 = 20, DQM1 = 19
3643 01:54:17.990239 DQ Delay:
3644 01:54:17.992739 DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15
3645 01:54:17.996079 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =19
3646 01:54:17.999584 DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =20
3647 01:54:18.002604 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
3648 01:54:18.003150
3649 01:54:18.003506
3650 01:54:18.003837
3651 01:54:18.006201 [DramC_TX_OE_Calibration] TA2
3652 01:54:18.009073 Original DQ_B0 (3 6) =30, OEN = 27
3653 01:54:18.012985 Original DQ_B1 (3 6) =30, OEN = 27
3654 01:54:18.013532 23, 0x0, End_B0=23 End_B1=23
3655 01:54:18.016646 24, 0x0, End_B0=24 End_B1=24
3656 01:54:18.019756 25, 0x0, End_B0=25 End_B1=25
3657 01:54:18.023039 26, 0x0, End_B0=26 End_B1=26
3658 01:54:18.023457 27, 0x0, End_B0=27 End_B1=27
3659 01:54:18.025700 28, 0x0, End_B0=28 End_B1=28
3660 01:54:18.029712 29, 0x0, End_B0=29 End_B1=29
3661 01:54:18.033092 30, 0x0, End_B0=30 End_B1=30
3662 01:54:18.035998 31, 0xFFFF, End_B0=30 End_B1=30
3663 01:54:18.039045 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3664 01:54:18.045686 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3665 01:54:18.046221
3666 01:54:18.046579
3667 01:54:18.049644 Write Rank1 MR23 =0x3f
3668 01:54:18.050095 [DQSOSC]
3669 01:54:18.056277 [DQSOSCAuto] RK1, (LSB)MR18= 0xb0, (MSB)MR19= 0x3, tDQSOscB0 = 333 ps tDQSOscB1 = 0 ps
3670 01:54:18.062521 CH1_RK1: MR19=0x3, MR18=0xB0, DQSOSC=333, MR23=63, INC=22, DEC=33
3671 01:54:18.062941 Write Rank1 MR23 =0x3f
3672 01:54:18.065748 [DQSOSC]
3673 01:54:18.073054 [DQSOSCAuto] RK1, (LSB)MR18= 0xb2, (MSB)MR19= 0x3, tDQSOscB0 = 332 ps tDQSOscB1 = 0 ps
3674 01:54:18.075900 CH1 RK1: MR19=3, MR18=B2
3675 01:54:18.079390 [RxdqsGatingPostProcess] freq 1600
3676 01:54:18.083254 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3677 01:54:18.086112 Rank: 0
3678 01:54:18.086541 best DQS0 dly(2T, 0.5T) = (2, 5)
3679 01:54:18.089076 best DQS1 dly(2T, 0.5T) = (2, 5)
3680 01:54:18.092421 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3681 01:54:18.096007 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3682 01:54:18.098971 Rank: 1
3683 01:54:18.099401 best DQS0 dly(2T, 0.5T) = (2, 5)
3684 01:54:18.102516 best DQS1 dly(2T, 0.5T) = (2, 5)
3685 01:54:18.105712 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3686 01:54:18.109017 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3687 01:54:18.115746 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3688 01:54:18.119423 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3689 01:54:18.122890 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3690 01:54:18.123442
3691 01:54:18.123883
3692 01:54:18.125929 [Calibration Summary] Freqency 1600
3693 01:54:18.126373 CH 0, Rank 0
3694 01:54:18.129601 All Pass.
3695 01:54:18.130109
3696 01:54:18.130544 CH 0, Rank 1
3697 01:54:18.130954 All Pass.
3698 01:54:18.131354
3699 01:54:18.132796 CH 1, Rank 0
3700 01:54:18.133206 All Pass.
3701 01:54:18.133566
3702 01:54:18.135941 CH 1, Rank 1
3703 01:54:18.136359 All Pass.
3704 01:54:18.136685
3705 01:54:18.142771 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3706 01:54:18.149312 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3707 01:54:18.155833 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3708 01:54:18.159067 Write Rank0 MR3 =0xb0
3709 01:54:18.165528 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3710 01:54:18.172389 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3711 01:54:18.179009 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3712 01:54:18.179516 Write Rank1 MR3 =0xb0
3713 01:54:18.185410 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3714 01:54:18.195762 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3715 01:54:18.202088 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3716 01:54:18.202548 Write Rank0 MR3 =0xb0
3717 01:54:18.208743 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3718 01:54:18.215207 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3719 01:54:18.222214 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3720 01:54:18.225750 Write Rank1 MR3 =0xb0
3721 01:54:18.228891 DramC Write-DBI on
3722 01:54:18.232064 [GetDramInforAfterCalByMRR] Vendor 1.
3723 01:54:18.235168 [GetDramInforAfterCalByMRR] Revision 7.
3724 01:54:18.235626 MR8 12
3725 01:54:18.238868 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3726 01:54:18.242035 MR8 12
3727 01:54:18.245242 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3728 01:54:18.245712 MR8 12
3729 01:54:18.251652 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3730 01:54:18.252066 MR8 12
3731 01:54:18.255113 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3732 01:54:18.265348 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3733 01:54:18.268570 Write Rank0 MR13 =0xd0
3734 01:54:18.268979 Write Rank1 MR13 =0xd0
3735 01:54:18.271393 Write Rank0 MR13 =0xd0
3736 01:54:18.274700 Write Rank1 MR13 =0xd0
3737 01:54:18.275113 Save calibration result to emmc
3738 01:54:18.275437
3739 01:54:18.275737
3740 01:54:18.278393 [DramcModeReg_Check] Freq_1600, FSP_1
3741 01:54:18.281845 FSP_1, CH_0, RK0
3742 01:54:18.284846 Write Rank0 MR13 =0xd8
3743 01:54:18.288826 MR12 = 0x56 (global = 0x56) match
3744 01:54:18.291429 MR14 = 0x16 (global = 0x16) match
3745 01:54:18.291845 FSP_1, CH_0, RK1
3746 01:54:18.295205 Write Rank1 MR13 =0xd8
3747 01:54:18.297832 MR12 = 0x56 (global = 0x56) match
3748 01:54:18.301650 MR14 = 0x1a (global = 0x1a) match
3749 01:54:18.302157 FSP_1, CH_1, RK0
3750 01:54:18.305051 Write Rank0 MR13 =0xd8
3751 01:54:18.308033 MR12 = 0x56 (global = 0x56) match
3752 01:54:18.311363 MR14 = 0x18 (global = 0x18) match
3753 01:54:18.311918 FSP_1, CH_1, RK1
3754 01:54:18.314523 Write Rank1 MR13 =0xd8
3755 01:54:18.317942 MR12 = 0x58 (global = 0x58) match
3756 01:54:18.321281 MR14 = 0x16 (global = 0x16) match
3757 01:54:18.321694
3758 01:54:18.324830 [MEM_TEST] 02: After DFS, before run time config
3759 01:54:18.335070 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3760 01:54:18.335578
3761 01:54:18.335909 [TA2_TEST]
3762 01:54:18.336216 === TA2 HW
3763 01:54:18.338119 TA2 PAT: XTALK
3764 01:54:18.341638 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3765 01:54:18.348637 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3766 01:54:18.351299 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3767 01:54:18.358802 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3768 01:54:18.359352
3769 01:54:18.359715
3770 01:54:18.360047 Settings after calibration
3771 01:54:18.360365
3772 01:54:18.361606 [DramcRunTimeConfig]
3773 01:54:18.364649 TransferPLLToSPMControl - MODE SW PHYPLL
3774 01:54:18.365062 TX_TRACKING: ON
3775 01:54:18.368393 RX_TRACKING: ON
3776 01:54:18.368896 HW_GATING: ON
3777 01:54:18.371736 HW_GATING DBG: OFF
3778 01:54:18.372145 ddr_geometry:1
3779 01:54:18.375032 ddr_geometry:1
3780 01:54:18.375440 ddr_geometry:1
3781 01:54:18.375760 ddr_geometry:1
3782 01:54:18.378578 ddr_geometry:1
3783 01:54:18.379086 ddr_geometry:1
3784 01:54:18.381585 ddr_geometry:1
3785 01:54:18.381993 ddr_geometry:1
3786 01:54:18.384974 High Freq DUMMY_READ_FOR_TRACKING: ON
3787 01:54:18.388136 ZQCS_ENABLE_LP4: OFF
3788 01:54:18.391921 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3789 01:54:18.395160 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3790 01:54:18.395658 SPM_CONTROL_AFTERK: ON
3791 01:54:18.398192 IMPEDANCE_TRACKING: ON
3792 01:54:18.398600 TEMP_SENSOR: ON
3793 01:54:18.401666 PER_BANK_REFRESH: ON
3794 01:54:18.402168 HW_SAVE_FOR_SR: ON
3795 01:54:18.404958 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3796 01:54:18.408559 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3797 01:54:18.411848 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3798 01:54:18.414876 Read ODT Tracking: ON
3799 01:54:18.418323 =========================
3800 01:54:18.418734
3801 01:54:18.419058 [TA2_TEST]
3802 01:54:18.419360 === TA2 HW
3803 01:54:18.424897 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3804 01:54:18.428427 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3805 01:54:18.434933 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3806 01:54:18.438388 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3807 01:54:18.438952
3808 01:54:18.441823 [MEM_TEST] 03: After run time config
3809 01:54:18.453546 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3810 01:54:18.456542 [complex_mem_test] start addr:0x40024000, len:131072
3811 01:54:18.660547 1st complex R/W mem test pass
3812 01:54:18.667421 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3813 01:54:18.670674 sync preloader write leveling
3814 01:54:18.674016 sync preloader cbt_mr12
3815 01:54:18.677221 sync preloader cbt_clk_dly
3816 01:54:18.677864 sync preloader cbt_cmd_dly
3817 01:54:18.680574 sync preloader cbt_cs
3818 01:54:18.683608 sync preloader cbt_ca_perbit_delay
3819 01:54:18.684061 sync preloader clk_delay
3820 01:54:18.686894 sync preloader dqs_delay
3821 01:54:18.690998 sync preloader u1Gating2T_Save
3822 01:54:18.693643 sync preloader u1Gating05T_Save
3823 01:54:18.697090 sync preloader u1Gatingfine_tune_Save
3824 01:54:18.700581 sync preloader u1Gatingucpass_count_Save
3825 01:54:18.703916 sync preloader u1TxWindowPerbitVref_Save
3826 01:54:18.706775 sync preloader u1TxCenter_min_Save
3827 01:54:18.710166 sync preloader u1TxCenter_max_Save
3828 01:54:18.713492 sync preloader u1Txwin_center_Save
3829 01:54:18.716955 sync preloader u1Txfirst_pass_Save
3830 01:54:18.719987 sync preloader u1Txlast_pass_Save
3831 01:54:18.723390 sync preloader u1RxDatlat_Save
3832 01:54:18.726539 sync preloader u1RxWinPerbitVref_Save
3833 01:54:18.729844 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3834 01:54:18.733861 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3835 01:54:18.736907 sync preloader delay_cell_unit
3836 01:54:18.743261 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3837 01:54:18.747048 sync preloader write leveling
3838 01:54:18.747578 sync preloader cbt_mr12
3839 01:54:18.750251 sync preloader cbt_clk_dly
3840 01:54:18.753361 sync preloader cbt_cmd_dly
3841 01:54:18.753960 sync preloader cbt_cs
3842 01:54:18.756621 sync preloader cbt_ca_perbit_delay
3843 01:54:18.759814 sync preloader clk_delay
3844 01:54:18.763033 sync preloader dqs_delay
3845 01:54:18.767002 sync preloader u1Gating2T_Save
3846 01:54:18.767527 sync preloader u1Gating05T_Save
3847 01:54:18.769885 sync preloader u1Gatingfine_tune_Save
3848 01:54:18.773022 sync preloader u1Gatingucpass_count_Save
3849 01:54:18.779618 sync preloader u1TxWindowPerbitVref_Save
3850 01:54:18.783273 sync preloader u1TxCenter_min_Save
3851 01:54:18.783684 sync preloader u1TxCenter_max_Save
3852 01:54:18.786088 sync preloader u1Txwin_center_Save
3853 01:54:18.789671 sync preloader u1Txfirst_pass_Save
3854 01:54:18.792954 sync preloader u1Txlast_pass_Save
3855 01:54:18.796526 sync preloader u1RxDatlat_Save
3856 01:54:18.800073 sync preloader u1RxWinPerbitVref_Save
3857 01:54:18.802906 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3858 01:54:18.809761 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3859 01:54:18.810462 sync preloader delay_cell_unit
3860 01:54:18.816283 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3861 01:54:18.819672 sync preloader write leveling
3862 01:54:18.823270 sync preloader cbt_mr12
3863 01:54:18.826250 sync preloader cbt_clk_dly
3864 01:54:18.826662 sync preloader cbt_cmd_dly
3865 01:54:18.829643 sync preloader cbt_cs
3866 01:54:18.833057 sync preloader cbt_ca_perbit_delay
3867 01:54:18.836433 sync preloader clk_delay
3868 01:54:18.836840 sync preloader dqs_delay
3869 01:54:18.839776 sync preloader u1Gating2T_Save
3870 01:54:18.842893 sync preloader u1Gating05T_Save
3871 01:54:18.845903 sync preloader u1Gatingfine_tune_Save
3872 01:54:18.849671 sync preloader u1Gatingucpass_count_Save
3873 01:54:18.853027 sync preloader u1TxWindowPerbitVref_Save
3874 01:54:18.856061 sync preloader u1TxCenter_min_Save
3875 01:54:18.859856 sync preloader u1TxCenter_max_Save
3876 01:54:18.863101 sync preloader u1Txwin_center_Save
3877 01:54:18.865894 sync preloader u1Txfirst_pass_Save
3878 01:54:18.869764 sync preloader u1Txlast_pass_Save
3879 01:54:18.872771 sync preloader u1RxDatlat_Save
3880 01:54:18.876352 sync preloader u1RxWinPerbitVref_Save
3881 01:54:18.879637 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3882 01:54:18.882805 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3883 01:54:18.886183 sync preloader delay_cell_unit
3884 01:54:18.889446 just_for_test_dump_coreboot_params dump all params
3885 01:54:18.892799 dump source = 0x0
3886 01:54:18.893362 dump params frequency:1600
3887 01:54:18.896291 dump params rank number:2
3888 01:54:18.896734
3889 01:54:18.899422 dump params write leveling
3890 01:54:18.902828 write leveling[0][0][0] = 0x22
3891 01:54:18.906403 write leveling[0][0][1] = 0x1c
3892 01:54:18.906903 write leveling[0][1][0] = 0x22
3893 01:54:18.909214 write leveling[0][1][1] = 0x1e
3894 01:54:18.912895 write leveling[1][0][0] = 0x23
3895 01:54:18.915939 write leveling[1][0][1] = 0x1f
3896 01:54:18.919307 write leveling[1][1][0] = 0x22
3897 01:54:18.923366 write leveling[1][1][1] = 0x20
3898 01:54:18.923876 dump params cbt_cs
3899 01:54:18.926575 cbt_cs[0][0] = 0xa
3900 01:54:18.926979 cbt_cs[0][1] = 0xa
3901 01:54:18.929305 cbt_cs[1][0] = 0xb
3902 01:54:18.929713 cbt_cs[1][1] = 0xb
3903 01:54:18.933011 dump params cbt_mr12
3904 01:54:18.933618 cbt_mr12[0][0] = 0x16
3905 01:54:18.935887 cbt_mr12[0][1] = 0x16
3906 01:54:18.939153 cbt_mr12[1][0] = 0x16
3907 01:54:18.939676 cbt_mr12[1][1] = 0x18
3908 01:54:18.942690 dump params tx window
3909 01:54:18.943095 tx_center_min[0][0][0] = 980
3910 01:54:18.946036 tx_center_max[0][0][0] = 988
3911 01:54:18.949546 tx_center_min[0][0][1] = 974
3912 01:54:18.952751 tx_center_max[0][0][1] = 979
3913 01:54:18.956299 tx_center_min[0][1][0] = 981
3914 01:54:18.956804 tx_center_max[0][1][0] = 989
3915 01:54:18.959860 tx_center_min[0][1][1] = 978
3916 01:54:18.963276 tx_center_max[0][1][1] = 982
3917 01:54:18.966174 tx_center_min[1][0][0] = 982
3918 01:54:18.969715 tx_center_max[1][0][0] = 989
3919 01:54:18.970231 tx_center_min[1][0][1] = 975
3920 01:54:18.972964 tx_center_max[1][0][1] = 980
3921 01:54:18.976121 tx_center_min[1][1][0] = 981
3922 01:54:18.979924 tx_center_max[1][1][0] = 988
3923 01:54:18.983126 tx_center_min[1][1][1] = 977
3924 01:54:18.983585 tx_center_max[1][1][1] = 981
3925 01:54:18.986243 dump params tx window
3926 01:54:18.990087 tx_win_center[0][0][0] = 988
3927 01:54:18.992714 tx_first_pass[0][0][0] = 976
3928 01:54:18.993298 tx_last_pass[0][0][0] = 1000
3929 01:54:18.996455 tx_win_center[0][0][1] = 987
3930 01:54:18.999440 tx_first_pass[0][0][1] = 975
3931 01:54:19.002811 tx_last_pass[0][0][1] = 999
3932 01:54:19.003358 tx_win_center[0][0][2] = 987
3933 01:54:19.006051 tx_first_pass[0][0][2] = 975
3934 01:54:19.009237 tx_last_pass[0][0][2] = 999
3935 01:54:19.012577 tx_win_center[0][0][3] = 980
3936 01:54:19.016191 tx_first_pass[0][0][3] = 969
3937 01:54:19.016736 tx_last_pass[0][0][3] = 992
3938 01:54:19.019150 tx_win_center[0][0][4] = 986
3939 01:54:19.022583 tx_first_pass[0][0][4] = 974
3940 01:54:19.025762 tx_last_pass[0][0][4] = 999
3941 01:54:19.026217 tx_win_center[0][0][5] = 982
3942 01:54:19.029367 tx_first_pass[0][0][5] = 970
3943 01:54:19.033384 tx_last_pass[0][0][5] = 994
3944 01:54:19.035699 tx_win_center[0][0][6] = 982
3945 01:54:19.039322 tx_first_pass[0][0][6] = 970
3946 01:54:19.039783 tx_last_pass[0][0][6] = 995
3947 01:54:19.042296 tx_win_center[0][0][7] = 985
3948 01:54:19.046051 tx_first_pass[0][0][7] = 974
3949 01:54:19.049234 tx_last_pass[0][0][7] = 997
3950 01:54:19.049735 tx_win_center[0][0][8] = 974
3951 01:54:19.052657 tx_first_pass[0][0][8] = 962
3952 01:54:19.055986 tx_last_pass[0][0][8] = 987
3953 01:54:19.059392 tx_win_center[0][0][9] = 976
3954 01:54:19.062717 tx_first_pass[0][0][9] = 963
3955 01:54:19.063273 tx_last_pass[0][0][9] = 989
3956 01:54:19.065777 tx_win_center[0][0][10] = 979
3957 01:54:19.069153 tx_first_pass[0][0][10] = 968
3958 01:54:19.072776 tx_last_pass[0][0][10] = 991
3959 01:54:19.076028 tx_win_center[0][0][11] = 975
3960 01:54:19.076583 tx_first_pass[0][0][11] = 962
3961 01:54:19.079403 tx_last_pass[0][0][11] = 988
3962 01:54:19.082476 tx_win_center[0][0][12] = 976
3963 01:54:19.085709 tx_first_pass[0][0][12] = 963
3964 01:54:19.089168 tx_last_pass[0][0][12] = 989
3965 01:54:19.089774 tx_win_center[0][0][13] = 975
3966 01:54:19.092814 tx_first_pass[0][0][13] = 962
3967 01:54:19.096154 tx_last_pass[0][0][13] = 988
3968 01:54:19.098845 tx_win_center[0][0][14] = 976
3969 01:54:19.102946 tx_first_pass[0][0][14] = 964
3970 01:54:19.103506 tx_last_pass[0][0][14] = 989
3971 01:54:19.105593 tx_win_center[0][0][15] = 978
3972 01:54:19.109191 tx_first_pass[0][0][15] = 967
3973 01:54:19.112408 tx_last_pass[0][0][15] = 990
3974 01:54:19.116218 tx_win_center[0][1][0] = 989
3975 01:54:19.116773 tx_first_pass[0][1][0] = 977
3976 01:54:19.119200 tx_last_pass[0][1][0] = 1002
3977 01:54:19.122441 tx_win_center[0][1][1] = 988
3978 01:54:19.125787 tx_first_pass[0][1][1] = 976
3979 01:54:19.126243 tx_last_pass[0][1][1] = 1000
3980 01:54:19.129320 tx_win_center[0][1][2] = 988
3981 01:54:19.132658 tx_first_pass[0][1][2] = 976
3982 01:54:19.135801 tx_last_pass[0][1][2] = 1000
3983 01:54:19.138949 tx_win_center[0][1][3] = 981
3984 01:54:19.139412 tx_first_pass[0][1][3] = 970
3985 01:54:19.142239 tx_last_pass[0][1][3] = 993
3986 01:54:19.145470 tx_win_center[0][1][4] = 988
3987 01:54:19.149332 tx_first_pass[0][1][4] = 976
3988 01:54:19.152544 tx_last_pass[0][1][4] = 1000
3989 01:54:19.153101 tx_win_center[0][1][5] = 983
3990 01:54:19.156001 tx_first_pass[0][1][5] = 971
3991 01:54:19.158702 tx_last_pass[0][1][5] = 995
3992 01:54:19.162549 tx_win_center[0][1][6] = 984
3993 01:54:19.163110 tx_first_pass[0][1][6] = 971
3994 01:54:19.165540 tx_last_pass[0][1][6] = 997
3995 01:54:19.169052 tx_win_center[0][1][7] = 986
3996 01:54:19.171948 tx_first_pass[0][1][7] = 973
3997 01:54:19.175658 tx_last_pass[0][1][7] = 999
3998 01:54:19.176068 tx_win_center[0][1][8] = 978
3999 01:54:19.178902 tx_first_pass[0][1][8] = 967
4000 01:54:19.182509 tx_last_pass[0][1][8] = 990
4001 01:54:19.185913 tx_win_center[0][1][9] = 979
4002 01:54:19.186455 tx_first_pass[0][1][9] = 968
4003 01:54:19.189115 tx_last_pass[0][1][9] = 991
4004 01:54:19.192469 tx_win_center[0][1][10] = 982
4005 01:54:19.195498 tx_first_pass[0][1][10] = 970
4006 01:54:19.198987 tx_last_pass[0][1][10] = 994
4007 01:54:19.199533 tx_win_center[0][1][11] = 978
4008 01:54:19.202001 tx_first_pass[0][1][11] = 967
4009 01:54:19.205722 tx_last_pass[0][1][11] = 990
4010 01:54:19.208982 tx_win_center[0][1][12] = 979
4011 01:54:19.212189 tx_first_pass[0][1][12] = 967
4012 01:54:19.212734 tx_last_pass[0][1][12] = 991
4013 01:54:19.215613 tx_win_center[0][1][13] = 978
4014 01:54:19.219028 tx_first_pass[0][1][13] = 966
4015 01:54:19.222821 tx_last_pass[0][1][13] = 990
4016 01:54:19.226061 tx_win_center[0][1][14] = 979
4017 01:54:19.226605 tx_first_pass[0][1][14] = 967
4018 01:54:19.229521 tx_last_pass[0][1][14] = 991
4019 01:54:19.232389 tx_win_center[0][1][15] = 980
4020 01:54:19.236108 tx_first_pass[0][1][15] = 969
4021 01:54:19.239188 tx_last_pass[0][1][15] = 992
4022 01:54:19.239735 tx_win_center[1][0][0] = 989
4023 01:54:19.241817 tx_first_pass[1][0][0] = 977
4024 01:54:19.245700 tx_last_pass[1][0][0] = 1001
4025 01:54:19.249419 tx_win_center[1][0][1] = 987
4026 01:54:19.252804 tx_first_pass[1][0][1] = 975
4027 01:54:19.253401 tx_last_pass[1][0][1] = 999
4028 01:54:19.255636 tx_win_center[1][0][2] = 984
4029 01:54:19.258980 tx_first_pass[1][0][2] = 973
4030 01:54:19.262350 tx_last_pass[1][0][2] = 996
4031 01:54:19.262805 tx_win_center[1][0][3] = 982
4032 01:54:19.265343 tx_first_pass[1][0][3] = 970
4033 01:54:19.268894 tx_last_pass[1][0][3] = 994
4034 01:54:19.272192 tx_win_center[1][0][4] = 986
4035 01:54:19.275446 tx_first_pass[1][0][4] = 974
4036 01:54:19.276008 tx_last_pass[1][0][4] = 998
4037 01:54:19.278706 tx_win_center[1][0][5] = 988
4038 01:54:19.281890 tx_first_pass[1][0][5] = 976
4039 01:54:19.285368 tx_last_pass[1][0][5] = 1000
4040 01:54:19.285826 tx_win_center[1][0][6] = 989
4041 01:54:19.288582 tx_first_pass[1][0][6] = 977
4042 01:54:19.292183 tx_last_pass[1][0][6] = 1001
4043 01:54:19.295627 tx_win_center[1][0][7] = 986
4044 01:54:19.298941 tx_first_pass[1][0][7] = 974
4045 01:54:19.299445 tx_last_pass[1][0][7] = 998
4046 01:54:19.301881 tx_win_center[1][0][8] = 978
4047 01:54:19.305715 tx_first_pass[1][0][8] = 966
4048 01:54:19.308896 tx_last_pass[1][0][8] = 991
4049 01:54:19.309428 tx_win_center[1][0][9] = 978
4050 01:54:19.312118 tx_first_pass[1][0][9] = 966
4051 01:54:19.315648 tx_last_pass[1][0][9] = 991
4052 01:54:19.318738 tx_win_center[1][0][10] = 979
4053 01:54:19.321837 tx_first_pass[1][0][10] = 967
4054 01:54:19.322251 tx_last_pass[1][0][10] = 991
4055 01:54:19.325657 tx_win_center[1][0][11] = 980
4056 01:54:19.328609 tx_first_pass[1][0][11] = 968
4057 01:54:19.331960 tx_last_pass[1][0][11] = 992
4058 01:54:19.335172 tx_win_center[1][0][12] = 980
4059 01:54:19.338902 tx_first_pass[1][0][12] = 968
4060 01:54:19.339452 tx_last_pass[1][0][12] = 992
4061 01:54:19.341743 tx_win_center[1][0][13] = 980
4062 01:54:19.344871 tx_first_pass[1][0][13] = 969
4063 01:54:19.348666 tx_last_pass[1][0][13] = 991
4064 01:54:19.349209 tx_win_center[1][0][14] = 979
4065 01:54:19.351742 tx_first_pass[1][0][14] = 968
4066 01:54:19.355669 tx_last_pass[1][0][14] = 991
4067 01:54:19.358823 tx_win_center[1][0][15] = 975
4068 01:54:19.361613 tx_first_pass[1][0][15] = 963
4069 01:54:19.365234 tx_last_pass[1][0][15] = 988
4070 01:54:19.365819 tx_win_center[1][1][0] = 988
4071 01:54:19.368447 tx_first_pass[1][1][0] = 976
4072 01:54:19.371470 tx_last_pass[1][1][0] = 1000
4073 01:54:19.375481 tx_win_center[1][1][1] = 987
4074 01:54:19.376029 tx_first_pass[1][1][1] = 976
4075 01:54:19.378398 tx_last_pass[1][1][1] = 999
4076 01:54:19.381835 tx_win_center[1][1][2] = 983
4077 01:54:19.385320 tx_first_pass[1][1][2] = 971
4078 01:54:19.388725 tx_last_pass[1][1][2] = 995
4079 01:54:19.389302 tx_win_center[1][1][3] = 981
4080 01:54:19.391577 tx_first_pass[1][1][3] = 969
4081 01:54:19.394635 tx_last_pass[1][1][3] = 994
4082 01:54:19.398705 tx_win_center[1][1][4] = 985
4083 01:54:19.399262 tx_first_pass[1][1][4] = 973
4084 01:54:19.401656 tx_last_pass[1][1][4] = 997
4085 01:54:19.405581 tx_win_center[1][1][5] = 987
4086 01:54:19.408647 tx_first_pass[1][1][5] = 976
4087 01:54:19.411733 tx_last_pass[1][1][5] = 999
4088 01:54:19.412244 tx_win_center[1][1][6] = 988
4089 01:54:19.415331 tx_first_pass[1][1][6] = 976
4090 01:54:19.418240 tx_last_pass[1][1][6] = 1000
4091 01:54:19.421914 tx_win_center[1][1][7] = 986
4092 01:54:19.422460 tx_first_pass[1][1][7] = 975
4093 01:54:19.425435 tx_last_pass[1][1][7] = 997
4094 01:54:19.428892 tx_win_center[1][1][8] = 980
4095 01:54:19.431552 tx_first_pass[1][1][8] = 969
4096 01:54:19.434922 tx_last_pass[1][1][8] = 991
4097 01:54:19.435483 tx_win_center[1][1][9] = 979
4098 01:54:19.438710 tx_first_pass[1][1][9] = 968
4099 01:54:19.441777 tx_last_pass[1][1][9] = 991
4100 01:54:19.445109 tx_win_center[1][1][10] = 980
4101 01:54:19.447829 tx_first_pass[1][1][10] = 969
4102 01:54:19.448282 tx_last_pass[1][1][10] = 991
4103 01:54:19.451698 tx_win_center[1][1][11] = 981
4104 01:54:19.454709 tx_first_pass[1][1][11] = 970
4105 01:54:19.458215 tx_last_pass[1][1][11] = 993
4106 01:54:19.461459 tx_win_center[1][1][12] = 980
4107 01:54:19.462000 tx_first_pass[1][1][12] = 969
4108 01:54:19.464829 tx_last_pass[1][1][12] = 992
4109 01:54:19.468643 tx_win_center[1][1][13] = 981
4110 01:54:19.471323 tx_first_pass[1][1][13] = 970
4111 01:54:19.474465 tx_last_pass[1][1][13] = 992
4112 01:54:19.474918 tx_win_center[1][1][14] = 980
4113 01:54:19.478103 tx_first_pass[1][1][14] = 969
4114 01:54:19.481122 tx_last_pass[1][1][14] = 992
4115 01:54:19.484773 tx_win_center[1][1][15] = 977
4116 01:54:19.487628 tx_first_pass[1][1][15] = 966
4117 01:54:19.488082 tx_last_pass[1][1][15] = 989
4118 01:54:19.491128 dump params rx window
4119 01:54:19.494379 rx_firspass[0][0][0] = 9
4120 01:54:19.494831 rx_lastpass[0][0][0] = 42
4121 01:54:19.498147 rx_firspass[0][0][1] = 8
4122 01:54:19.500994 rx_lastpass[0][0][1] = 40
4123 01:54:19.501478 rx_firspass[0][0][2] = 9
4124 01:54:19.504723 rx_lastpass[0][0][2] = 39
4125 01:54:19.508263 rx_firspass[0][0][3] = -1
4126 01:54:19.511084 rx_lastpass[0][0][3] = 31
4127 01:54:19.511537 rx_firspass[0][0][4] = 7
4128 01:54:19.514738 rx_lastpass[0][0][4] = 39
4129 01:54:19.518140 rx_firspass[0][0][5] = 3
4130 01:54:19.518679 rx_lastpass[0][0][5] = 29
4131 01:54:19.520928 rx_firspass[0][0][6] = 2
4132 01:54:19.525105 rx_lastpass[0][0][6] = 32
4133 01:54:19.525699 rx_firspass[0][0][7] = 4
4134 01:54:19.528044 rx_lastpass[0][0][7] = 34
4135 01:54:19.531731 rx_firspass[0][0][8] = 2
4136 01:54:19.534844 rx_lastpass[0][0][8] = 34
4137 01:54:19.535385 rx_firspass[0][0][9] = 5
4138 01:54:19.537867 rx_lastpass[0][0][9] = 35
4139 01:54:19.541224 rx_firspass[0][0][10] = 9
4140 01:54:19.541814 rx_lastpass[0][0][10] = 38
4141 01:54:19.544264 rx_firspass[0][0][11] = 3
4142 01:54:19.548266 rx_lastpass[0][0][11] = 31
4143 01:54:19.551881 rx_firspass[0][0][12] = 5
4144 01:54:19.552426 rx_lastpass[0][0][12] = 34
4145 01:54:19.554907 rx_firspass[0][0][13] = 1
4146 01:54:19.558114 rx_lastpass[0][0][13] = 31
4147 01:54:19.558659 rx_firspass[0][0][14] = 3
4148 01:54:19.561624 rx_lastpass[0][0][14] = 33
4149 01:54:19.564860 rx_firspass[0][0][15] = 4
4150 01:54:19.567999 rx_lastpass[0][0][15] = 35
4151 01:54:19.568547 rx_firspass[0][1][0] = 9
4152 01:54:19.571765 rx_lastpass[0][1][0] = 42
4153 01:54:19.574799 rx_firspass[0][1][1] = 7
4154 01:54:19.575340 rx_lastpass[0][1][1] = 42
4155 01:54:19.577911 rx_firspass[0][1][2] = 7
4156 01:54:19.581427 rx_lastpass[0][1][2] = 42
4157 01:54:19.581970 rx_firspass[0][1][3] = -2
4158 01:54:19.585101 rx_lastpass[0][1][3] = 33
4159 01:54:19.587707 rx_firspass[0][1][4] = 5
4160 01:54:19.591238 rx_lastpass[0][1][4] = 40
4161 01:54:19.591692 rx_firspass[0][1][5] = 1
4162 01:54:19.594640 rx_lastpass[0][1][5] = 34
4163 01:54:19.598262 rx_firspass[0][1][6] = 2
4164 01:54:19.598764 rx_lastpass[0][1][6] = 35
4165 01:54:19.601345 rx_firspass[0][1][7] = 2
4166 01:54:19.604941 rx_lastpass[0][1][7] = 36
4167 01:54:19.605494 rx_firspass[0][1][8] = 0
4168 01:54:19.608224 rx_lastpass[0][1][8] = 36
4169 01:54:19.611241 rx_firspass[0][1][9] = 1
4170 01:54:19.614471 rx_lastpass[0][1][9] = 38
4171 01:54:19.614952 rx_firspass[0][1][10] = 6
4172 01:54:19.618226 rx_lastpass[0][1][10] = 41
4173 01:54:19.621076 rx_firspass[0][1][11] = 1
4174 01:54:19.624588 rx_lastpass[0][1][11] = 33
4175 01:54:19.625198 rx_firspass[0][1][12] = 1
4176 01:54:19.628121 rx_lastpass[0][1][12] = 36
4177 01:54:19.631293 rx_firspass[0][1][13] = -1
4178 01:54:19.631903 rx_lastpass[0][1][13] = 34
4179 01:54:19.634572 rx_firspass[0][1][14] = 1
4180 01:54:19.638105 rx_lastpass[0][1][14] = 36
4181 01:54:19.641466 rx_firspass[0][1][15] = 3
4182 01:54:19.642008 rx_lastpass[0][1][15] = 38
4183 01:54:19.644480 rx_firspass[1][0][0] = 8
4184 01:54:19.648375 rx_lastpass[1][0][0] = 40
4185 01:54:19.649124 rx_firspass[1][0][1] = 7
4186 01:54:19.651186 rx_lastpass[1][0][1] = 38
4187 01:54:19.654327 rx_firspass[1][0][2] = 1
4188 01:54:19.657809 rx_lastpass[1][0][2] = 32
4189 01:54:19.658353 rx_firspass[1][0][3] = 0
4190 01:54:19.661213 rx_lastpass[1][0][3] = 31
4191 01:54:19.664668 rx_firspass[1][0][4] = 3
4192 01:54:19.665204 rx_lastpass[1][0][4] = 33
4193 01:54:19.667850 rx_firspass[1][0][5] = 9
4194 01:54:19.670934 rx_lastpass[1][0][5] = 38
4195 01:54:19.671466 rx_firspass[1][0][6] = 9
4196 01:54:19.674630 rx_lastpass[1][0][6] = 40
4197 01:54:19.677814 rx_firspass[1][0][7] = 5
4198 01:54:19.681575 rx_lastpass[1][0][7] = 33
4199 01:54:19.682118 rx_firspass[1][0][8] = 3
4200 01:54:19.684438 rx_lastpass[1][0][8] = 35
4201 01:54:19.688071 rx_firspass[1][0][9] = 4
4202 01:54:19.688607 rx_lastpass[1][0][9] = 35
4203 01:54:19.691274 rx_firspass[1][0][10] = 2
4204 01:54:19.694007 rx_lastpass[1][0][10] = 34
4205 01:54:19.697591 rx_firspass[1][0][11] = 4
4206 01:54:19.698094 rx_lastpass[1][0][11] = 34
4207 01:54:19.700738 rx_firspass[1][0][12] = 5
4208 01:54:19.703799 rx_lastpass[1][0][12] = 35
4209 01:54:19.704203 rx_firspass[1][0][13] = 6
4210 01:54:19.707909 rx_lastpass[1][0][13] = 32
4211 01:54:19.710719 rx_firspass[1][0][14] = 3
4212 01:54:19.714090 rx_lastpass[1][0][14] = 34
4213 01:54:19.714588 rx_firspass[1][0][15] = 1
4214 01:54:19.717613 rx_lastpass[1][0][15] = 32
4215 01:54:19.720789 rx_firspass[1][1][0] = 7
4216 01:54:19.724576 rx_lastpass[1][1][0] = 42
4217 01:54:19.725093 rx_firspass[1][1][1] = 5
4218 01:54:19.727769 rx_lastpass[1][1][1] = 40
4219 01:54:19.730857 rx_firspass[1][1][2] = 0
4220 01:54:19.731368 rx_lastpass[1][1][2] = 35
4221 01:54:19.734100 rx_firspass[1][1][3] = -2
4222 01:54:19.737598 rx_lastpass[1][1][3] = 33
4223 01:54:19.738119 rx_firspass[1][1][4] = 1
4224 01:54:19.740916 rx_lastpass[1][1][4] = 36
4225 01:54:19.744217 rx_firspass[1][1][5] = 5
4226 01:54:19.744682 rx_lastpass[1][1][5] = 41
4227 01:54:19.747704 rx_firspass[1][1][6] = 7
4228 01:54:19.750705 rx_lastpass[1][1][6] = 42
4229 01:54:19.754233 rx_firspass[1][1][7] = 2
4230 01:54:19.754658 rx_lastpass[1][1][7] = 36
4231 01:54:19.757365 rx_firspass[1][1][8] = 2
4232 01:54:19.761064 rx_lastpass[1][1][8] = 37
4233 01:54:19.761633 rx_firspass[1][1][9] = 2
4234 01:54:19.764735 rx_lastpass[1][1][9] = 37
4235 01:54:19.767655 rx_firspass[1][1][10] = 2
4236 01:54:19.768225 rx_lastpass[1][1][10] = 36
4237 01:54:19.771120 rx_firspass[1][1][11] = 3
4238 01:54:19.774102 rx_lastpass[1][1][11] = 38
4239 01:54:19.777897 rx_firspass[1][1][12] = 4
4240 01:54:19.778447 rx_lastpass[1][1][12] = 39
4241 01:54:19.781051 rx_firspass[1][1][13] = 3
4242 01:54:19.784565 rx_lastpass[1][1][13] = 36
4243 01:54:19.787727 rx_firspass[1][1][14] = 3
4244 01:54:19.788292 rx_lastpass[1][1][14] = 36
4245 01:54:19.791021 rx_firspass[1][1][15] = 0
4246 01:54:19.794073 rx_lastpass[1][1][15] = 34
4247 01:54:19.794559 dump params clk_delay
4248 01:54:19.797174 clk_delay[0] = -1
4249 01:54:19.797682 clk_delay[1] = 0
4250 01:54:19.801042 dump params dqs_delay
4251 01:54:19.801671 dqs_delay[0][0] = 0
4252 01:54:19.804396 dqs_delay[0][1] = 0
4253 01:54:19.807611 dqs_delay[1][0] = -1
4254 01:54:19.808162 dqs_delay[1][1] = 0
4255 01:54:19.810389 dump params delay_cell_unit = 762
4256 01:54:19.814091 dump source = 0x0
4257 01:54:19.814561 dump params frequency:1200
4258 01:54:19.817438 dump params rank number:2
4259 01:54:19.817977
4260 01:54:19.820524 dump params write leveling
4261 01:54:19.823864 write leveling[0][0][0] = 0x0
4262 01:54:19.824311 write leveling[0][0][1] = 0x0
4263 01:54:19.827257 write leveling[0][1][0] = 0x0
4264 01:54:19.830691 write leveling[0][1][1] = 0x0
4265 01:54:19.834123 write leveling[1][0][0] = 0x0
4266 01:54:19.837019 write leveling[1][0][1] = 0x0
4267 01:54:19.837512 write leveling[1][1][0] = 0x0
4268 01:54:19.840590 write leveling[1][1][1] = 0x0
4269 01:54:19.844045 dump params cbt_cs
4270 01:54:19.844735 cbt_cs[0][0] = 0x0
4271 01:54:19.847003 cbt_cs[0][1] = 0x0
4272 01:54:19.847458 cbt_cs[1][0] = 0x0
4273 01:54:19.850107 cbt_cs[1][1] = 0x0
4274 01:54:19.850519 dump params cbt_mr12
4275 01:54:19.853902 cbt_mr12[0][0] = 0x0
4276 01:54:19.857056 cbt_mr12[0][1] = 0x0
4277 01:54:19.857526 cbt_mr12[1][0] = 0x0
4278 01:54:19.860613 cbt_mr12[1][1] = 0x0
4279 01:54:19.861161 dump params tx window
4280 01:54:19.863626 tx_center_min[0][0][0] = 0
4281 01:54:19.867042 tx_center_max[0][0][0] = 0
4282 01:54:19.870127 tx_center_min[0][0][1] = 0
4283 01:54:19.870590 tx_center_max[0][0][1] = 0
4284 01:54:19.873387 tx_center_min[0][1][0] = 0
4285 01:54:19.877220 tx_center_max[0][1][0] = 0
4286 01:54:19.877765 tx_center_min[0][1][1] = 0
4287 01:54:19.880722 tx_center_max[0][1][1] = 0
4288 01:54:19.883854 tx_center_min[1][0][0] = 0
4289 01:54:19.887212 tx_center_max[1][0][0] = 0
4290 01:54:19.887723 tx_center_min[1][0][1] = 0
4291 01:54:19.889968 tx_center_max[1][0][1] = 0
4292 01:54:19.893392 tx_center_min[1][1][0] = 0
4293 01:54:19.897099 tx_center_max[1][1][0] = 0
4294 01:54:19.897553 tx_center_min[1][1][1] = 0
4295 01:54:19.899902 tx_center_max[1][1][1] = 0
4296 01:54:19.903365 dump params tx window
4297 01:54:19.903777 tx_win_center[0][0][0] = 0
4298 01:54:19.906683 tx_first_pass[0][0][0] = 0
4299 01:54:19.910109 tx_last_pass[0][0][0] = 0
4300 01:54:19.913425 tx_win_center[0][0][1] = 0
4301 01:54:19.914060 tx_first_pass[0][0][1] = 0
4302 01:54:19.916794 tx_last_pass[0][0][1] = 0
4303 01:54:19.919896 tx_win_center[0][0][2] = 0
4304 01:54:19.923485 tx_first_pass[0][0][2] = 0
4305 01:54:19.923899 tx_last_pass[0][0][2] = 0
4306 01:54:19.927427 tx_win_center[0][0][3] = 0
4307 01:54:19.930379 tx_first_pass[0][0][3] = 0
4308 01:54:19.930884 tx_last_pass[0][0][3] = 0
4309 01:54:19.933381 tx_win_center[0][0][4] = 0
4310 01:54:19.936730 tx_first_pass[0][0][4] = 0
4311 01:54:19.939951 tx_last_pass[0][0][4] = 0
4312 01:54:19.940368 tx_win_center[0][0][5] = 0
4313 01:54:19.943221 tx_first_pass[0][0][5] = 0
4314 01:54:19.946801 tx_last_pass[0][0][5] = 0
4315 01:54:19.950526 tx_win_center[0][0][6] = 0
4316 01:54:19.950944 tx_first_pass[0][0][6] = 0
4317 01:54:19.952984 tx_last_pass[0][0][6] = 0
4318 01:54:19.956355 tx_win_center[0][0][7] = 0
4319 01:54:19.956772 tx_first_pass[0][0][7] = 0
4320 01:54:19.959824 tx_last_pass[0][0][7] = 0
4321 01:54:19.962977 tx_win_center[0][0][8] = 0
4322 01:54:19.966572 tx_first_pass[0][0][8] = 0
4323 01:54:19.966996 tx_last_pass[0][0][8] = 0
4324 01:54:19.969855 tx_win_center[0][0][9] = 0
4325 01:54:19.973306 tx_first_pass[0][0][9] = 0
4326 01:54:19.976518 tx_last_pass[0][0][9] = 0
4327 01:54:19.977066 tx_win_center[0][0][10] = 0
4328 01:54:19.979615 tx_first_pass[0][0][10] = 0
4329 01:54:19.983363 tx_last_pass[0][0][10] = 0
4330 01:54:19.986890 tx_win_center[0][0][11] = 0
4331 01:54:19.987411 tx_first_pass[0][0][11] = 0
4332 01:54:19.989937 tx_last_pass[0][0][11] = 0
4333 01:54:19.993425 tx_win_center[0][0][12] = 0
4334 01:54:19.996527 tx_first_pass[0][0][12] = 0
4335 01:54:19.997096 tx_last_pass[0][0][12] = 0
4336 01:54:19.999683 tx_win_center[0][0][13] = 0
4337 01:54:20.002806 tx_first_pass[0][0][13] = 0
4338 01:54:20.006654 tx_last_pass[0][0][13] = 0
4339 01:54:20.007071 tx_win_center[0][0][14] = 0
4340 01:54:20.009637 tx_first_pass[0][0][14] = 0
4341 01:54:20.013468 tx_last_pass[0][0][14] = 0
4342 01:54:20.016202 tx_win_center[0][0][15] = 0
4343 01:54:20.016619 tx_first_pass[0][0][15] = 0
4344 01:54:20.019771 tx_last_pass[0][0][15] = 0
4345 01:54:20.023169 tx_win_center[0][1][0] = 0
4346 01:54:20.026173 tx_first_pass[0][1][0] = 0
4347 01:54:20.026585 tx_last_pass[0][1][0] = 0
4348 01:54:20.029850 tx_win_center[0][1][1] = 0
4349 01:54:20.033055 tx_first_pass[0][1][1] = 0
4350 01:54:20.033508 tx_last_pass[0][1][1] = 0
4351 01:54:20.036867 tx_win_center[0][1][2] = 0
4352 01:54:20.039879 tx_first_pass[0][1][2] = 0
4353 01:54:20.042823 tx_last_pass[0][1][2] = 0
4354 01:54:20.043236 tx_win_center[0][1][3] = 0
4355 01:54:20.046295 tx_first_pass[0][1][3] = 0
4356 01:54:20.049874 tx_last_pass[0][1][3] = 0
4357 01:54:20.050286 tx_win_center[0][1][4] = 0
4358 01:54:20.052880 tx_first_pass[0][1][4] = 0
4359 01:54:20.056187 tx_last_pass[0][1][4] = 0
4360 01:54:20.059701 tx_win_center[0][1][5] = 0
4361 01:54:20.060255 tx_first_pass[0][1][5] = 0
4362 01:54:20.063868 tx_last_pass[0][1][5] = 0
4363 01:54:20.066972 tx_win_center[0][1][6] = 0
4364 01:54:20.070064 tx_first_pass[0][1][6] = 0
4365 01:54:20.070590 tx_last_pass[0][1][6] = 0
4366 01:54:20.073388 tx_win_center[0][1][7] = 0
4367 01:54:20.076450 tx_first_pass[0][1][7] = 0
4368 01:54:20.076958 tx_last_pass[0][1][7] = 0
4369 01:54:20.079859 tx_win_center[0][1][8] = 0
4370 01:54:20.082868 tx_first_pass[0][1][8] = 0
4371 01:54:20.086194 tx_last_pass[0][1][8] = 0
4372 01:54:20.086490 tx_win_center[0][1][9] = 0
4373 01:54:20.089818 tx_first_pass[0][1][9] = 0
4374 01:54:20.092861 tx_last_pass[0][1][9] = 0
4375 01:54:20.096456 tx_win_center[0][1][10] = 0
4376 01:54:20.096676 tx_first_pass[0][1][10] = 0
4377 01:54:20.099775 tx_last_pass[0][1][10] = 0
4378 01:54:20.102691 tx_win_center[0][1][11] = 0
4379 01:54:20.106183 tx_first_pass[0][1][11] = 0
4380 01:54:20.106407 tx_last_pass[0][1][11] = 0
4381 01:54:20.109742 tx_win_center[0][1][12] = 0
4382 01:54:20.113106 tx_first_pass[0][1][12] = 0
4383 01:54:20.116414 tx_last_pass[0][1][12] = 0
4384 01:54:20.116827 tx_win_center[0][1][13] = 0
4385 01:54:20.119704 tx_first_pass[0][1][13] = 0
4386 01:54:20.122925 tx_last_pass[0][1][13] = 0
4387 01:54:20.126614 tx_win_center[0][1][14] = 0
4388 01:54:20.127027 tx_first_pass[0][1][14] = 0
4389 01:54:20.129905 tx_last_pass[0][1][14] = 0
4390 01:54:20.133050 tx_win_center[0][1][15] = 0
4391 01:54:20.136422 tx_first_pass[0][1][15] = 0
4392 01:54:20.136833 tx_last_pass[0][1][15] = 0
4393 01:54:20.139827 tx_win_center[1][0][0] = 0
4394 01:54:20.143085 tx_first_pass[1][0][0] = 0
4395 01:54:20.143497 tx_last_pass[1][0][0] = 0
4396 01:54:20.146533 tx_win_center[1][0][1] = 0
4397 01:54:20.149803 tx_first_pass[1][0][1] = 0
4398 01:54:20.153022 tx_last_pass[1][0][1] = 0
4399 01:54:20.153478 tx_win_center[1][0][2] = 0
4400 01:54:20.156373 tx_first_pass[1][0][2] = 0
4401 01:54:20.159670 tx_last_pass[1][0][2] = 0
4402 01:54:20.163028 tx_win_center[1][0][3] = 0
4403 01:54:20.163439 tx_first_pass[1][0][3] = 0
4404 01:54:20.166206 tx_last_pass[1][0][3] = 0
4405 01:54:20.169695 tx_win_center[1][0][4] = 0
4406 01:54:20.170145 tx_first_pass[1][0][4] = 0
4407 01:54:20.173174 tx_last_pass[1][0][4] = 0
4408 01:54:20.176350 tx_win_center[1][0][5] = 0
4409 01:54:20.179721 tx_first_pass[1][0][5] = 0
4410 01:54:20.180226 tx_last_pass[1][0][5] = 0
4411 01:54:20.183329 tx_win_center[1][0][6] = 0
4412 01:54:20.186485 tx_first_pass[1][0][6] = 0
4413 01:54:20.186899 tx_last_pass[1][0][6] = 0
4414 01:54:20.189606 tx_win_center[1][0][7] = 0
4415 01:54:20.193124 tx_first_pass[1][0][7] = 0
4416 01:54:20.196376 tx_last_pass[1][0][7] = 0
4417 01:54:20.196843 tx_win_center[1][0][8] = 0
4418 01:54:20.199520 tx_first_pass[1][0][8] = 0
4419 01:54:20.203044 tx_last_pass[1][0][8] = 0
4420 01:54:20.206295 tx_win_center[1][0][9] = 0
4421 01:54:20.206701 tx_first_pass[1][0][9] = 0
4422 01:54:20.209589 tx_last_pass[1][0][9] = 0
4423 01:54:20.212628 tx_win_center[1][0][10] = 0
4424 01:54:20.215926 tx_first_pass[1][0][10] = 0
4425 01:54:20.216336 tx_last_pass[1][0][10] = 0
4426 01:54:20.219421 tx_win_center[1][0][11] = 0
4427 01:54:20.222915 tx_first_pass[1][0][11] = 0
4428 01:54:20.226563 tx_last_pass[1][0][11] = 0
4429 01:54:20.227071 tx_win_center[1][0][12] = 0
4430 01:54:20.229703 tx_first_pass[1][0][12] = 0
4431 01:54:20.233053 tx_last_pass[1][0][12] = 0
4432 01:54:20.236336 tx_win_center[1][0][13] = 0
4433 01:54:20.236745 tx_first_pass[1][0][13] = 0
4434 01:54:20.239506 tx_last_pass[1][0][13] = 0
4435 01:54:20.242656 tx_win_center[1][0][14] = 0
4436 01:54:20.246229 tx_first_pass[1][0][14] = 0
4437 01:54:20.246639 tx_last_pass[1][0][14] = 0
4438 01:54:20.249453 tx_win_center[1][0][15] = 0
4439 01:54:20.252646 tx_first_pass[1][0][15] = 0
4440 01:54:20.256553 tx_last_pass[1][0][15] = 0
4441 01:54:20.257064 tx_win_center[1][1][0] = 0
4442 01:54:20.259437 tx_first_pass[1][1][0] = 0
4443 01:54:20.262949 tx_last_pass[1][1][0] = 0
4444 01:54:20.263477 tx_win_center[1][1][1] = 0
4445 01:54:20.266171 tx_first_pass[1][1][1] = 0
4446 01:54:20.269732 tx_last_pass[1][1][1] = 0
4447 01:54:20.272856 tx_win_center[1][1][2] = 0
4448 01:54:20.273623 tx_first_pass[1][1][2] = 0
4449 01:54:20.275963 tx_last_pass[1][1][2] = 0
4450 01:54:20.279454 tx_win_center[1][1][3] = 0
4451 01:54:20.282616 tx_first_pass[1][1][3] = 0
4452 01:54:20.283030 tx_last_pass[1][1][3] = 0
4453 01:54:20.285979 tx_win_center[1][1][4] = 0
4454 01:54:20.289450 tx_first_pass[1][1][4] = 0
4455 01:54:20.290131 tx_last_pass[1][1][4] = 0
4456 01:54:20.292849 tx_win_center[1][1][5] = 0
4457 01:54:20.295952 tx_first_pass[1][1][5] = 0
4458 01:54:20.299167 tx_last_pass[1][1][5] = 0
4459 01:54:20.299599 tx_win_center[1][1][6] = 0
4460 01:54:20.302720 tx_first_pass[1][1][6] = 0
4461 01:54:20.305848 tx_last_pass[1][1][6] = 0
4462 01:54:20.309371 tx_win_center[1][1][7] = 0
4463 01:54:20.309900 tx_first_pass[1][1][7] = 0
4464 01:54:20.312408 tx_last_pass[1][1][7] = 0
4465 01:54:20.315747 tx_win_center[1][1][8] = 0
4466 01:54:20.316189 tx_first_pass[1][1][8] = 0
4467 01:54:20.319012 tx_last_pass[1][1][8] = 0
4468 01:54:20.322477 tx_win_center[1][1][9] = 0
4469 01:54:20.325895 tx_first_pass[1][1][9] = 0
4470 01:54:20.326429 tx_last_pass[1][1][9] = 0
4471 01:54:20.329655 tx_win_center[1][1][10] = 0
4472 01:54:20.332536 tx_first_pass[1][1][10] = 0
4473 01:54:20.335597 tx_last_pass[1][1][10] = 0
4474 01:54:20.336136 tx_win_center[1][1][11] = 0
4475 01:54:20.338919 tx_first_pass[1][1][11] = 0
4476 01:54:20.343084 tx_last_pass[1][1][11] = 0
4477 01:54:20.346012 tx_win_center[1][1][12] = 0
4478 01:54:20.346461 tx_first_pass[1][1][12] = 0
4479 01:54:20.349303 tx_last_pass[1][1][12] = 0
4480 01:54:20.352667 tx_win_center[1][1][13] = 0
4481 01:54:20.355708 tx_first_pass[1][1][13] = 0
4482 01:54:20.356235 tx_last_pass[1][1][13] = 0
4483 01:54:20.359207 tx_win_center[1][1][14] = 0
4484 01:54:20.362566 tx_first_pass[1][1][14] = 0
4485 01:54:20.365612 tx_last_pass[1][1][14] = 0
4486 01:54:20.366145 tx_win_center[1][1][15] = 0
4487 01:54:20.369142 tx_first_pass[1][1][15] = 0
4488 01:54:20.372256 tx_last_pass[1][1][15] = 0
4489 01:54:20.375372 dump params rx window
4490 01:54:20.375803 rx_firspass[0][0][0] = 0
4491 01:54:20.378894 rx_lastpass[0][0][0] = 0
4492 01:54:20.382117 rx_firspass[0][0][1] = 0
4493 01:54:20.382564 rx_lastpass[0][0][1] = 0
4494 01:54:20.385329 rx_firspass[0][0][2] = 0
4495 01:54:20.388937 rx_lastpass[0][0][2] = 0
4496 01:54:20.389416 rx_firspass[0][0][3] = 0
4497 01:54:20.392300 rx_lastpass[0][0][3] = 0
4498 01:54:20.395601 rx_firspass[0][0][4] = 0
4499 01:54:20.396136 rx_lastpass[0][0][4] = 0
4500 01:54:20.398519 rx_firspass[0][0][5] = 0
4501 01:54:20.401942 rx_lastpass[0][0][5] = 0
4502 01:54:20.402471 rx_firspass[0][0][6] = 0
4503 01:54:20.405115 rx_lastpass[0][0][6] = 0
4504 01:54:20.409460 rx_firspass[0][0][7] = 0
4505 01:54:20.411921 rx_lastpass[0][0][7] = 0
4506 01:54:20.412399 rx_firspass[0][0][8] = 0
4507 01:54:20.415572 rx_lastpass[0][0][8] = 0
4508 01:54:20.418767 rx_firspass[0][0][9] = 0
4509 01:54:20.419303 rx_lastpass[0][0][9] = 0
4510 01:54:20.422176 rx_firspass[0][0][10] = 0
4511 01:54:20.425339 rx_lastpass[0][0][10] = 0
4512 01:54:20.425768 rx_firspass[0][0][11] = 0
4513 01:54:20.428609 rx_lastpass[0][0][11] = 0
4514 01:54:20.431813 rx_firspass[0][0][12] = 0
4515 01:54:20.435083 rx_lastpass[0][0][12] = 0
4516 01:54:20.435511 rx_firspass[0][0][13] = 0
4517 01:54:20.438537 rx_lastpass[0][0][13] = 0
4518 01:54:20.441978 rx_firspass[0][0][14] = 0
4519 01:54:20.442579 rx_lastpass[0][0][14] = 0
4520 01:54:20.445482 rx_firspass[0][0][15] = 0
4521 01:54:20.448573 rx_lastpass[0][0][15] = 0
4522 01:54:20.451801 rx_firspass[0][1][0] = 0
4523 01:54:20.452331 rx_lastpass[0][1][0] = 0
4524 01:54:20.455240 rx_firspass[0][1][1] = 0
4525 01:54:20.458505 rx_lastpass[0][1][1] = 0
4526 01:54:20.459037 rx_firspass[0][1][2] = 0
4527 01:54:20.462081 rx_lastpass[0][1][2] = 0
4528 01:54:20.465339 rx_firspass[0][1][3] = 0
4529 01:54:20.465866 rx_lastpass[0][1][3] = 0
4530 01:54:20.468491 rx_firspass[0][1][4] = 0
4531 01:54:20.471647 rx_lastpass[0][1][4] = 0
4532 01:54:20.472076 rx_firspass[0][1][5] = 0
4533 01:54:20.475217 rx_lastpass[0][1][5] = 0
4534 01:54:20.478132 rx_firspass[0][1][6] = 0
4535 01:54:20.482162 rx_lastpass[0][1][6] = 0
4536 01:54:20.482678 rx_firspass[0][1][7] = 0
4537 01:54:20.485093 rx_lastpass[0][1][7] = 0
4538 01:54:20.488421 rx_firspass[0][1][8] = 0
4539 01:54:20.488967 rx_lastpass[0][1][8] = 0
4540 01:54:20.491905 rx_firspass[0][1][9] = 0
4541 01:54:20.495331 rx_lastpass[0][1][9] = 0
4542 01:54:20.495848 rx_firspass[0][1][10] = 0
4543 01:54:20.498414 rx_lastpass[0][1][10] = 0
4544 01:54:20.501869 rx_firspass[0][1][11] = 0
4545 01:54:20.502387 rx_lastpass[0][1][11] = 0
4546 01:54:20.504834 rx_firspass[0][1][12] = 0
4547 01:54:20.508397 rx_lastpass[0][1][12] = 0
4548 01:54:20.511367 rx_firspass[0][1][13] = 0
4549 01:54:20.511782 rx_lastpass[0][1][13] = 0
4550 01:54:20.514685 rx_firspass[0][1][14] = 0
4551 01:54:20.519331 rx_lastpass[0][1][14] = 0
4552 01:54:20.519842 rx_firspass[0][1][15] = 0
4553 01:54:20.521621 rx_lastpass[0][1][15] = 0
4554 01:54:20.524857 rx_firspass[1][0][0] = 0
4555 01:54:20.528442 rx_lastpass[1][0][0] = 0
4556 01:54:20.528957 rx_firspass[1][0][1] = 0
4557 01:54:20.532029 rx_lastpass[1][0][1] = 0
4558 01:54:20.535236 rx_firspass[1][0][2] = 0
4559 01:54:20.535821 rx_lastpass[1][0][2] = 0
4560 01:54:20.538148 rx_firspass[1][0][3] = 0
4561 01:54:20.541785 rx_lastpass[1][0][3] = 0
4562 01:54:20.542494 rx_firspass[1][0][4] = 0
4563 01:54:20.545427 rx_lastpass[1][0][4] = 0
4564 01:54:20.548327 rx_firspass[1][0][5] = 0
4565 01:54:20.548779 rx_lastpass[1][0][5] = 0
4566 01:54:20.551742 rx_firspass[1][0][6] = 0
4567 01:54:20.554809 rx_lastpass[1][0][6] = 0
4568 01:54:20.555261 rx_firspass[1][0][7] = 0
4569 01:54:20.559010 rx_lastpass[1][0][7] = 0
4570 01:54:20.561443 rx_firspass[1][0][8] = 0
4571 01:54:20.561897 rx_lastpass[1][0][8] = 0
4572 01:54:20.565188 rx_firspass[1][0][9] = 0
4573 01:54:20.568269 rx_lastpass[1][0][9] = 0
4574 01:54:20.571824 rx_firspass[1][0][10] = 0
4575 01:54:20.572377 rx_lastpass[1][0][10] = 0
4576 01:54:20.575202 rx_firspass[1][0][11] = 0
4577 01:54:20.578683 rx_lastpass[1][0][11] = 0
4578 01:54:20.579242 rx_firspass[1][0][12] = 0
4579 01:54:20.581627 rx_lastpass[1][0][12] = 0
4580 01:54:20.585404 rx_firspass[1][0][13] = 0
4581 01:54:20.588347 rx_lastpass[1][0][13] = 0
4582 01:54:20.588894 rx_firspass[1][0][14] = 0
4583 01:54:20.591491 rx_lastpass[1][0][14] = 0
4584 01:54:20.594760 rx_firspass[1][0][15] = 0
4585 01:54:20.595213 rx_lastpass[1][0][15] = 0
4586 01:54:20.598453 rx_firspass[1][1][0] = 0
4587 01:54:20.601296 rx_lastpass[1][1][0] = 0
4588 01:54:20.601746 rx_firspass[1][1][1] = 0
4589 01:54:20.604817 rx_lastpass[1][1][1] = 0
4590 01:54:20.608365 rx_firspass[1][1][2] = 0
4591 01:54:20.611489 rx_lastpass[1][1][2] = 0
4592 01:54:20.611943 rx_firspass[1][1][3] = 0
4593 01:54:20.615069 rx_lastpass[1][1][3] = 0
4594 01:54:20.618645 rx_firspass[1][1][4] = 0
4595 01:54:20.619202 rx_lastpass[1][1][4] = 0
4596 01:54:20.621395 rx_firspass[1][1][5] = 0
4597 01:54:20.625174 rx_lastpass[1][1][5] = 0
4598 01:54:20.625786 rx_firspass[1][1][6] = 0
4599 01:54:20.628419 rx_lastpass[1][1][6] = 0
4600 01:54:20.631397 rx_firspass[1][1][7] = 0
4601 01:54:20.631853 rx_lastpass[1][1][7] = 0
4602 01:54:20.635500 rx_firspass[1][1][8] = 0
4603 01:54:20.638472 rx_lastpass[1][1][8] = 0
4604 01:54:20.639026 rx_firspass[1][1][9] = 0
4605 01:54:20.641962 rx_lastpass[1][1][9] = 0
4606 01:54:20.644581 rx_firspass[1][1][10] = 0
4607 01:54:20.648088 rx_lastpass[1][1][10] = 0
4608 01:54:20.648562 rx_firspass[1][1][11] = 0
4609 01:54:20.651205 rx_lastpass[1][1][11] = 0
4610 01:54:20.654867 rx_firspass[1][1][12] = 0
4611 01:54:20.655317 rx_lastpass[1][1][12] = 0
4612 01:54:20.658000 rx_firspass[1][1][13] = 0
4613 01:54:20.661635 rx_lastpass[1][1][13] = 0
4614 01:54:20.664713 rx_firspass[1][1][14] = 0
4615 01:54:20.665171 rx_lastpass[1][1][14] = 0
4616 01:54:20.667945 rx_firspass[1][1][15] = 0
4617 01:54:20.671355 rx_lastpass[1][1][15] = 0
4618 01:54:20.671867 dump params clk_delay
4619 01:54:20.674537 clk_delay[0] = 0
4620 01:54:20.674954 clk_delay[1] = 0
4621 01:54:20.678129 dump params dqs_delay
4622 01:54:20.678675 dqs_delay[0][0] = 0
4623 01:54:20.681582 dqs_delay[0][1] = 0
4624 01:54:20.682130 dqs_delay[1][0] = 0
4625 01:54:20.684904 dqs_delay[1][1] = 0
4626 01:54:20.688142 dump params delay_cell_unit = 762
4627 01:54:20.688594 dump source = 0x0
4628 01:54:20.691506 dump params frequency:800
4629 01:54:20.694446 dump params rank number:2
4630 01:54:20.695000
4631 01:54:20.697732 dump params write leveling
4632 01:54:20.698186 write leveling[0][0][0] = 0x0
4633 01:54:20.701345 write leveling[0][0][1] = 0x0
4634 01:54:20.704893 write leveling[0][1][0] = 0x0
4635 01:54:20.708106 write leveling[0][1][1] = 0x0
4636 01:54:20.711319 write leveling[1][0][0] = 0x0
4637 01:54:20.711773 write leveling[1][0][1] = 0x0
4638 01:54:20.714305 write leveling[1][1][0] = 0x0
4639 01:54:20.717839 write leveling[1][1][1] = 0x0
4640 01:54:20.721633 dump params cbt_cs
4641 01:54:20.722151 cbt_cs[0][0] = 0x0
4642 01:54:20.724608 cbt_cs[0][1] = 0x0
4643 01:54:20.725017 cbt_cs[1][0] = 0x0
4644 01:54:20.727760 cbt_cs[1][1] = 0x0
4645 01:54:20.728314 dump params cbt_mr12
4646 01:54:20.731336 cbt_mr12[0][0] = 0x0
4647 01:54:20.731848 cbt_mr12[0][1] = 0x0
4648 01:54:20.734814 cbt_mr12[1][0] = 0x0
4649 01:54:20.735327 cbt_mr12[1][1] = 0x0
4650 01:54:20.738114 dump params tx window
4651 01:54:20.741529 tx_center_min[0][0][0] = 0
4652 01:54:20.744431 tx_center_max[0][0][0] = 0
4653 01:54:20.744944 tx_center_min[0][0][1] = 0
4654 01:54:20.747530 tx_center_max[0][0][1] = 0
4655 01:54:20.750952 tx_center_min[0][1][0] = 0
4656 01:54:20.754338 tx_center_max[0][1][0] = 0
4657 01:54:20.754753 tx_center_min[0][1][1] = 0
4658 01:54:20.758004 tx_center_max[0][1][1] = 0
4659 01:54:20.761205 tx_center_min[1][0][0] = 0
4660 01:54:20.761644 tx_center_max[1][0][0] = 0
4661 01:54:20.764171 tx_center_min[1][0][1] = 0
4662 01:54:20.768028 tx_center_max[1][0][1] = 0
4663 01:54:20.770782 tx_center_min[1][1][0] = 0
4664 01:54:20.771195 tx_center_max[1][1][0] = 0
4665 01:54:20.774687 tx_center_min[1][1][1] = 0
4666 01:54:20.777833 tx_center_max[1][1][1] = 0
4667 01:54:20.780978 dump params tx window
4668 01:54:20.781417 tx_win_center[0][0][0] = 0
4669 01:54:20.784396 tx_first_pass[0][0][0] = 0
4670 01:54:20.787674 tx_last_pass[0][0][0] = 0
4671 01:54:20.788083 tx_win_center[0][0][1] = 0
4672 01:54:20.790847 tx_first_pass[0][0][1] = 0
4673 01:54:20.794379 tx_last_pass[0][0][1] = 0
4674 01:54:20.797804 tx_win_center[0][0][2] = 0
4675 01:54:20.798258 tx_first_pass[0][0][2] = 0
4676 01:54:20.801580 tx_last_pass[0][0][2] = 0
4677 01:54:20.804471 tx_win_center[0][0][3] = 0
4678 01:54:20.807937 tx_first_pass[0][0][3] = 0
4679 01:54:20.808455 tx_last_pass[0][0][3] = 0
4680 01:54:20.811334 tx_win_center[0][0][4] = 0
4681 01:54:20.814439 tx_first_pass[0][0][4] = 0
4682 01:54:20.814849 tx_last_pass[0][0][4] = 0
4683 01:54:20.818218 tx_win_center[0][0][5] = 0
4684 01:54:20.821162 tx_first_pass[0][0][5] = 0
4685 01:54:20.824770 tx_last_pass[0][0][5] = 0
4686 01:54:20.825315 tx_win_center[0][0][6] = 0
4687 01:54:20.827800 tx_first_pass[0][0][6] = 0
4688 01:54:20.831238 tx_last_pass[0][0][6] = 0
4689 01:54:20.831750 tx_win_center[0][0][7] = 0
4690 01:54:20.834802 tx_first_pass[0][0][7] = 0
4691 01:54:20.837929 tx_last_pass[0][0][7] = 0
4692 01:54:20.841336 tx_win_center[0][0][8] = 0
4693 01:54:20.841850 tx_first_pass[0][0][8] = 0
4694 01:54:20.844394 tx_last_pass[0][0][8] = 0
4695 01:54:20.847836 tx_win_center[0][0][9] = 0
4696 01:54:20.850850 tx_first_pass[0][0][9] = 0
4697 01:54:20.851262 tx_last_pass[0][0][9] = 0
4698 01:54:20.854086 tx_win_center[0][0][10] = 0
4699 01:54:20.857609 tx_first_pass[0][0][10] = 0
4700 01:54:20.858021 tx_last_pass[0][0][10] = 0
4701 01:54:20.860771 tx_win_center[0][0][11] = 0
4702 01:54:20.864505 tx_first_pass[0][0][11] = 0
4703 01:54:20.868119 tx_last_pass[0][0][11] = 0
4704 01:54:20.868634 tx_win_center[0][0][12] = 0
4705 01:54:20.870738 tx_first_pass[0][0][12] = 0
4706 01:54:20.874663 tx_last_pass[0][0][12] = 0
4707 01:54:20.877843 tx_win_center[0][0][13] = 0
4708 01:54:20.881109 tx_first_pass[0][0][13] = 0
4709 01:54:20.881693 tx_last_pass[0][0][13] = 0
4710 01:54:20.885113 tx_win_center[0][0][14] = 0
4711 01:54:20.887628 tx_first_pass[0][0][14] = 0
4712 01:54:20.888040 tx_last_pass[0][0][14] = 0
4713 01:54:20.891036 tx_win_center[0][0][15] = 0
4714 01:54:20.893908 tx_first_pass[0][0][15] = 0
4715 01:54:20.897368 tx_last_pass[0][0][15] = 0
4716 01:54:20.897938 tx_win_center[0][1][0] = 0
4717 01:54:20.900775 tx_first_pass[0][1][0] = 0
4718 01:54:20.904353 tx_last_pass[0][1][0] = 0
4719 01:54:20.907840 tx_win_center[0][1][1] = 0
4720 01:54:20.908352 tx_first_pass[0][1][1] = 0
4721 01:54:20.910961 tx_last_pass[0][1][1] = 0
4722 01:54:20.914227 tx_win_center[0][1][2] = 0
4723 01:54:20.917437 tx_first_pass[0][1][2] = 0
4724 01:54:20.917848 tx_last_pass[0][1][2] = 0
4725 01:54:20.920971 tx_win_center[0][1][3] = 0
4726 01:54:20.924086 tx_first_pass[0][1][3] = 0
4727 01:54:20.924501 tx_last_pass[0][1][3] = 0
4728 01:54:20.927596 tx_win_center[0][1][4] = 0
4729 01:54:20.931000 tx_first_pass[0][1][4] = 0
4730 01:54:20.933879 tx_last_pass[0][1][4] = 0
4731 01:54:20.934289 tx_win_center[0][1][5] = 0
4732 01:54:20.937890 tx_first_pass[0][1][5] = 0
4733 01:54:20.940989 tx_last_pass[0][1][5] = 0
4734 01:54:20.944398 tx_win_center[0][1][6] = 0
4735 01:54:20.944808 tx_first_pass[0][1][6] = 0
4736 01:54:20.947590 tx_last_pass[0][1][6] = 0
4737 01:54:20.950615 tx_win_center[0][1][7] = 0
4738 01:54:20.951028 tx_first_pass[0][1][7] = 0
4739 01:54:20.953749 tx_last_pass[0][1][7] = 0
4740 01:54:20.957333 tx_win_center[0][1][8] = 0
4741 01:54:20.960860 tx_first_pass[0][1][8] = 0
4742 01:54:20.961415 tx_last_pass[0][1][8] = 0
4743 01:54:20.963600 tx_win_center[0][1][9] = 0
4744 01:54:20.967358 tx_first_pass[0][1][9] = 0
4745 01:54:20.970559 tx_last_pass[0][1][9] = 0
4746 01:54:20.970975 tx_win_center[0][1][10] = 0
4747 01:54:20.974102 tx_first_pass[0][1][10] = 0
4748 01:54:20.976994 tx_last_pass[0][1][10] = 0
4749 01:54:20.980843 tx_win_center[0][1][11] = 0
4750 01:54:20.981395 tx_first_pass[0][1][11] = 0
4751 01:54:20.983981 tx_last_pass[0][1][11] = 0
4752 01:54:20.986994 tx_win_center[0][1][12] = 0
4753 01:54:20.990564 tx_first_pass[0][1][12] = 0
4754 01:54:20.990976 tx_last_pass[0][1][12] = 0
4755 01:54:20.993625 tx_win_center[0][1][13] = 0
4756 01:54:20.997171 tx_first_pass[0][1][13] = 0
4757 01:54:21.000533 tx_last_pass[0][1][13] = 0
4758 01:54:21.001042 tx_win_center[0][1][14] = 0
4759 01:54:21.003452 tx_first_pass[0][1][14] = 0
4760 01:54:21.006737 tx_last_pass[0][1][14] = 0
4761 01:54:21.010542 tx_win_center[0][1][15] = 0
4762 01:54:21.010955 tx_first_pass[0][1][15] = 0
4763 01:54:21.013825 tx_last_pass[0][1][15] = 0
4764 01:54:21.017203 tx_win_center[1][0][0] = 0
4765 01:54:21.020594 tx_first_pass[1][0][0] = 0
4766 01:54:21.021108 tx_last_pass[1][0][0] = 0
4767 01:54:21.023767 tx_win_center[1][0][1] = 0
4768 01:54:21.026990 tx_first_pass[1][0][1] = 0
4769 01:54:21.027504 tx_last_pass[1][0][1] = 0
4770 01:54:21.030095 tx_win_center[1][0][2] = 0
4771 01:54:21.033808 tx_first_pass[1][0][2] = 0
4772 01:54:21.037789 tx_last_pass[1][0][2] = 0
4773 01:54:21.038303 tx_win_center[1][0][3] = 0
4774 01:54:21.040277 tx_first_pass[1][0][3] = 0
4775 01:54:21.043730 tx_last_pass[1][0][3] = 0
4776 01:54:21.046802 tx_win_center[1][0][4] = 0
4777 01:54:21.047215 tx_first_pass[1][0][4] = 0
4778 01:54:21.050303 tx_last_pass[1][0][4] = 0
4779 01:54:21.053534 tx_win_center[1][0][5] = 0
4780 01:54:21.053962 tx_first_pass[1][0][5] = 0
4781 01:54:21.056874 tx_last_pass[1][0][5] = 0
4782 01:54:21.060343 tx_win_center[1][0][6] = 0
4783 01:54:21.063829 tx_first_pass[1][0][6] = 0
4784 01:54:21.064348 tx_last_pass[1][0][6] = 0
4785 01:54:21.067157 tx_win_center[1][0][7] = 0
4786 01:54:21.070592 tx_first_pass[1][0][7] = 0
4787 01:54:21.073596 tx_last_pass[1][0][7] = 0
4788 01:54:21.074113 tx_win_center[1][0][8] = 0
4789 01:54:21.076848 tx_first_pass[1][0][8] = 0
4790 01:54:21.080668 tx_last_pass[1][0][8] = 0
4791 01:54:21.081190 tx_win_center[1][0][9] = 0
4792 01:54:21.084183 tx_first_pass[1][0][9] = 0
4793 01:54:21.086792 tx_last_pass[1][0][9] = 0
4794 01:54:21.090091 tx_win_center[1][0][10] = 0
4795 01:54:21.090503 tx_first_pass[1][0][10] = 0
4796 01:54:21.093455 tx_last_pass[1][0][10] = 0
4797 01:54:21.096880 tx_win_center[1][0][11] = 0
4798 01:54:21.100216 tx_first_pass[1][0][11] = 0
4799 01:54:21.100771 tx_last_pass[1][0][11] = 0
4800 01:54:21.103577 tx_win_center[1][0][12] = 0
4801 01:54:21.106778 tx_first_pass[1][0][12] = 0
4802 01:54:21.110423 tx_last_pass[1][0][12] = 0
4803 01:54:21.110942 tx_win_center[1][0][13] = 0
4804 01:54:21.113539 tx_first_pass[1][0][13] = 0
4805 01:54:21.116871 tx_last_pass[1][0][13] = 0
4806 01:54:21.120177 tx_win_center[1][0][14] = 0
4807 01:54:21.120709 tx_first_pass[1][0][14] = 0
4808 01:54:21.123256 tx_last_pass[1][0][14] = 0
4809 01:54:21.127057 tx_win_center[1][0][15] = 0
4810 01:54:21.130307 tx_first_pass[1][0][15] = 0
4811 01:54:21.130813 tx_last_pass[1][0][15] = 0
4812 01:54:21.133541 tx_win_center[1][1][0] = 0
4813 01:54:21.136960 tx_first_pass[1][1][0] = 0
4814 01:54:21.140829 tx_last_pass[1][1][0] = 0
4815 01:54:21.141374 tx_win_center[1][1][1] = 0
4816 01:54:21.143617 tx_first_pass[1][1][1] = 0
4817 01:54:21.146694 tx_last_pass[1][1][1] = 0
4818 01:54:21.147132 tx_win_center[1][1][2] = 0
4819 01:54:21.150110 tx_first_pass[1][1][2] = 0
4820 01:54:21.153440 tx_last_pass[1][1][2] = 0
4821 01:54:21.156840 tx_win_center[1][1][3] = 0
4822 01:54:21.157396 tx_first_pass[1][1][3] = 0
4823 01:54:21.159942 tx_last_pass[1][1][3] = 0
4824 01:54:21.163596 tx_win_center[1][1][4] = 0
4825 01:54:21.166898 tx_first_pass[1][1][4] = 0
4826 01:54:21.167405 tx_last_pass[1][1][4] = 0
4827 01:54:21.170005 tx_win_center[1][1][5] = 0
4828 01:54:21.173253 tx_first_pass[1][1][5] = 0
4829 01:54:21.173693 tx_last_pass[1][1][5] = 0
4830 01:54:21.176772 tx_win_center[1][1][6] = 0
4831 01:54:21.180112 tx_first_pass[1][1][6] = 0
4832 01:54:21.183272 tx_last_pass[1][1][6] = 0
4833 01:54:21.183702 tx_win_center[1][1][7] = 0
4834 01:54:21.186952 tx_first_pass[1][1][7] = 0
4835 01:54:21.190103 tx_last_pass[1][1][7] = 0
4836 01:54:21.190613 tx_win_center[1][1][8] = 0
4837 01:54:21.193842 tx_first_pass[1][1][8] = 0
4838 01:54:21.197051 tx_last_pass[1][1][8] = 0
4839 01:54:21.200501 tx_win_center[1][1][9] = 0
4840 01:54:21.201003 tx_first_pass[1][1][9] = 0
4841 01:54:21.203754 tx_last_pass[1][1][9] = 0
4842 01:54:21.206699 tx_win_center[1][1][10] = 0
4843 01:54:21.210275 tx_first_pass[1][1][10] = 0
4844 01:54:21.210785 tx_last_pass[1][1][10] = 0
4845 01:54:21.213746 tx_win_center[1][1][11] = 0
4846 01:54:21.216832 tx_first_pass[1][1][11] = 0
4847 01:54:21.220527 tx_last_pass[1][1][11] = 0
4848 01:54:21.221034 tx_win_center[1][1][12] = 0
4849 01:54:21.223621 tx_first_pass[1][1][12] = 0
4850 01:54:21.227186 tx_last_pass[1][1][12] = 0
4851 01:54:21.230599 tx_win_center[1][1][13] = 0
4852 01:54:21.231108 tx_first_pass[1][1][13] = 0
4853 01:54:21.233339 tx_last_pass[1][1][13] = 0
4854 01:54:21.237236 tx_win_center[1][1][14] = 0
4855 01:54:21.240594 tx_first_pass[1][1][14] = 0
4856 01:54:21.241110 tx_last_pass[1][1][14] = 0
4857 01:54:21.243466 tx_win_center[1][1][15] = 0
4858 01:54:21.247129 tx_first_pass[1][1][15] = 0
4859 01:54:21.250400 tx_last_pass[1][1][15] = 0
4860 01:54:21.250818 dump params rx window
4861 01:54:21.253709 rx_firspass[0][0][0] = 0
4862 01:54:21.256998 rx_lastpass[0][0][0] = 0
4863 01:54:21.257585 rx_firspass[0][0][1] = 0
4864 01:54:21.259950 rx_lastpass[0][0][1] = 0
4865 01:54:21.263664 rx_firspass[0][0][2] = 0
4866 01:54:21.264170 rx_lastpass[0][0][2] = 0
4867 01:54:21.267138 rx_firspass[0][0][3] = 0
4868 01:54:21.270464 rx_lastpass[0][0][3] = 0
4869 01:54:21.270968 rx_firspass[0][0][4] = 0
4870 01:54:21.273702 rx_lastpass[0][0][4] = 0
4871 01:54:21.276771 rx_firspass[0][0][5] = 0
4872 01:54:21.277320 rx_lastpass[0][0][5] = 0
4873 01:54:21.280220 rx_firspass[0][0][6] = 0
4874 01:54:21.283315 rx_lastpass[0][0][6] = 0
4875 01:54:21.283820 rx_firspass[0][0][7] = 0
4876 01:54:21.287112 rx_lastpass[0][0][7] = 0
4877 01:54:21.289928 rx_firspass[0][0][8] = 0
4878 01:54:21.293590 rx_lastpass[0][0][8] = 0
4879 01:54:21.294090 rx_firspass[0][0][9] = 0
4880 01:54:21.296834 rx_lastpass[0][0][9] = 0
4881 01:54:21.300270 rx_firspass[0][0][10] = 0
4882 01:54:21.300773 rx_lastpass[0][0][10] = 0
4883 01:54:21.303500 rx_firspass[0][0][11] = 0
4884 01:54:21.306851 rx_lastpass[0][0][11] = 0
4885 01:54:21.307261 rx_firspass[0][0][12] = 0
4886 01:54:21.310849 rx_lastpass[0][0][12] = 0
4887 01:54:21.313173 rx_firspass[0][0][13] = 0
4888 01:54:21.316666 rx_lastpass[0][0][13] = 0
4889 01:54:21.317105 rx_firspass[0][0][14] = 0
4890 01:54:21.319641 rx_lastpass[0][0][14] = 0
4891 01:54:21.323675 rx_firspass[0][0][15] = 0
4892 01:54:21.324238 rx_lastpass[0][0][15] = 0
4893 01:54:21.327162 rx_firspass[0][1][0] = 0
4894 01:54:21.330215 rx_lastpass[0][1][0] = 0
4895 01:54:21.330625 rx_firspass[0][1][1] = 0
4896 01:54:21.333542 rx_lastpass[0][1][1] = 0
4897 01:54:21.336818 rx_firspass[0][1][2] = 0
4898 01:54:21.340227 rx_lastpass[0][1][2] = 0
4899 01:54:21.340636 rx_firspass[0][1][3] = 0
4900 01:54:21.343543 rx_lastpass[0][1][3] = 0
4901 01:54:21.346836 rx_firspass[0][1][4] = 0
4902 01:54:21.347246 rx_lastpass[0][1][4] = 0
4903 01:54:21.350536 rx_firspass[0][1][5] = 0
4904 01:54:21.353803 rx_lastpass[0][1][5] = 0
4905 01:54:21.354213 rx_firspass[0][1][6] = 0
4906 01:54:21.356320 rx_lastpass[0][1][6] = 0
4907 01:54:21.359882 rx_firspass[0][1][7] = 0
4908 01:54:21.360288 rx_lastpass[0][1][7] = 0
4909 01:54:21.363477 rx_firspass[0][1][8] = 0
4910 01:54:21.366566 rx_lastpass[0][1][8] = 0
4911 01:54:21.367092 rx_firspass[0][1][9] = 0
4912 01:54:21.369755 rx_lastpass[0][1][9] = 0
4913 01:54:21.373027 rx_firspass[0][1][10] = 0
4914 01:54:21.376517 rx_lastpass[0][1][10] = 0
4915 01:54:21.376926 rx_firspass[0][1][11] = 0
4916 01:54:21.380129 rx_lastpass[0][1][11] = 0
4917 01:54:21.383209 rx_firspass[0][1][12] = 0
4918 01:54:21.383619 rx_lastpass[0][1][12] = 0
4919 01:54:21.386554 rx_firspass[0][1][13] = 0
4920 01:54:21.389557 rx_lastpass[0][1][13] = 0
4921 01:54:21.393003 rx_firspass[0][1][14] = 0
4922 01:54:21.393450 rx_lastpass[0][1][14] = 0
4923 01:54:21.396475 rx_firspass[0][1][15] = 0
4924 01:54:21.399968 rx_lastpass[0][1][15] = 0
4925 01:54:21.400500 rx_firspass[1][0][0] = 0
4926 01:54:21.403127 rx_lastpass[1][0][0] = 0
4927 01:54:21.406117 rx_firspass[1][0][1] = 0
4928 01:54:21.406526 rx_lastpass[1][0][1] = 0
4929 01:54:21.409751 rx_firspass[1][0][2] = 0
4930 01:54:21.413640 rx_lastpass[1][0][2] = 0
4931 01:54:21.416314 rx_firspass[1][0][3] = 0
4932 01:54:21.416725 rx_lastpass[1][0][3] = 0
4933 01:54:21.419766 rx_firspass[1][0][4] = 0
4934 01:54:21.422839 rx_lastpass[1][0][4] = 0
4935 01:54:21.423252 rx_firspass[1][0][5] = 0
4936 01:54:21.426160 rx_lastpass[1][0][5] = 0
4937 01:54:21.429443 rx_firspass[1][0][6] = 0
4938 01:54:21.429850 rx_lastpass[1][0][6] = 0
4939 01:54:21.433176 rx_firspass[1][0][7] = 0
4940 01:54:21.436204 rx_lastpass[1][0][7] = 0
4941 01:54:21.436712 rx_firspass[1][0][8] = 0
4942 01:54:21.439638 rx_lastpass[1][0][8] = 0
4943 01:54:21.443138 rx_firspass[1][0][9] = 0
4944 01:54:21.443687 rx_lastpass[1][0][9] = 0
4945 01:54:21.446480 rx_firspass[1][0][10] = 0
4946 01:54:21.449718 rx_lastpass[1][0][10] = 0
4947 01:54:21.452839 rx_firspass[1][0][11] = 0
4948 01:54:21.453391 rx_lastpass[1][0][11] = 0
4949 01:54:21.456139 rx_firspass[1][0][12] = 0
4950 01:54:21.459629 rx_lastpass[1][0][12] = 0
4951 01:54:21.460038 rx_firspass[1][0][13] = 0
4952 01:54:21.462808 rx_lastpass[1][0][13] = 0
4953 01:54:21.466600 rx_firspass[1][0][14] = 0
4954 01:54:21.469429 rx_lastpass[1][0][14] = 0
4955 01:54:21.469854 rx_firspass[1][0][15] = 0
4956 01:54:21.472749 rx_lastpass[1][0][15] = 0
4957 01:54:21.476506 rx_firspass[1][1][0] = 0
4958 01:54:21.477020 rx_lastpass[1][1][0] = 0
4959 01:54:21.479440 rx_firspass[1][1][1] = 0
4960 01:54:21.483256 rx_lastpass[1][1][1] = 0
4961 01:54:21.483881 rx_firspass[1][1][2] = 0
4962 01:54:21.486098 rx_lastpass[1][1][2] = 0
4963 01:54:21.489620 rx_firspass[1][1][3] = 0
4964 01:54:21.490037 rx_lastpass[1][1][3] = 0
4965 01:54:21.493213 rx_firspass[1][1][4] = 0
4966 01:54:21.496237 rx_lastpass[1][1][4] = 0
4967 01:54:21.500382 rx_firspass[1][1][5] = 0
4968 01:54:21.500906 rx_lastpass[1][1][5] = 0
4969 01:54:21.503572 rx_firspass[1][1][6] = 0
4970 01:54:21.506273 rx_lastpass[1][1][6] = 0
4971 01:54:21.506688 rx_firspass[1][1][7] = 0
4972 01:54:21.509742 rx_lastpass[1][1][7] = 0
4973 01:54:21.513057 rx_firspass[1][1][8] = 0
4974 01:54:21.513619 rx_lastpass[1][1][8] = 0
4975 01:54:21.516887 rx_firspass[1][1][9] = 0
4976 01:54:21.520012 rx_lastpass[1][1][9] = 0
4977 01:54:21.520517 rx_firspass[1][1][10] = 0
4978 01:54:21.522712 rx_lastpass[1][1][10] = 0
4979 01:54:21.526340 rx_firspass[1][1][11] = 0
4980 01:54:21.529751 rx_lastpass[1][1][11] = 0
4981 01:54:21.530264 rx_firspass[1][1][12] = 0
4982 01:54:21.533159 rx_lastpass[1][1][12] = 0
4983 01:54:21.536553 rx_firspass[1][1][13] = 0
4984 01:54:21.537059 rx_lastpass[1][1][13] = 0
4985 01:54:21.540110 rx_firspass[1][1][14] = 0
4986 01:54:21.543089 rx_lastpass[1][1][14] = 0
4987 01:54:21.546476 rx_firspass[1][1][15] = 0
4988 01:54:21.546890 rx_lastpass[1][1][15] = 0
4989 01:54:21.549691 dump params clk_delay
4990 01:54:21.550105 clk_delay[0] = 0
4991 01:54:21.552996 clk_delay[1] = 0
4992 01:54:21.553644 dump params dqs_delay
4993 01:54:21.556165 dqs_delay[0][0] = 0
4994 01:54:21.556578 dqs_delay[0][1] = 0
4995 01:54:21.559759 dqs_delay[1][0] = 0
4996 01:54:21.563312 dqs_delay[1][1] = 0
4997 01:54:21.563726 dump params delay_cell_unit = 762
4998 01:54:21.566329 mt_set_emi_preloader end
4999 01:54:21.573023 [mt_mem_init] dram size: 0x100000000, rank number: 2
5000 01:54:21.576566 [complex_mem_test] start addr:0x40000000, len:20480
5001 01:54:21.613094 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5002 01:54:21.619205 [complex_mem_test] start addr:0x80000000, len:20480
5003 01:54:21.655378 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5004 01:54:21.662221 [complex_mem_test] start addr:0xc0000000, len:20480
5005 01:54:21.697399 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5006 01:54:21.703999 [complex_mem_test] start addr:0x56000000, len:8192
5007 01:54:21.720538 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5008 01:54:21.721087 ddr_geometry:1
5009 01:54:21.727188 [complex_mem_test] start addr:0x80000000, len:8192
5010 01:54:21.744361 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5011 01:54:21.747708 dram_init: dram init end (result: 0)
5012 01:54:21.754497 Successfully loaded DRAM blobs and ran DRAM calibration
5013 01:54:21.764421 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5014 01:54:21.764972 CBMEM:
5015 01:54:21.767753 IMD: root @ 00000000fffff000 254 entries.
5016 01:54:21.770598 IMD: root @ 00000000ffffec00 62 entries.
5017 01:54:21.777668 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5018 01:54:21.784398 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5019 01:54:21.787638 in-header: 03 a1 00 00 08 00 00 00
5020 01:54:21.790942 in-data: 84 60 60 10 00 00 00 00
5021 01:54:21.794266 Chrome EC: clear events_b mask to 0x0000000020004000
5022 01:54:21.801545 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5023 01:54:21.805031 in-header: 03 fd 00 00 00 00 00 00
5024 01:54:21.805613 in-data:
5025 01:54:21.811864 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5026 01:54:21.812415 CBFS @ 21000 size 3d4000
5027 01:54:21.818272 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5028 01:54:21.821967 CBFS: Locating 'fallback/ramstage'
5029 01:54:21.824483 CBFS: Found @ offset 10d40 size d563
5030 01:54:21.846645 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5031 01:54:21.858285 Accumulated console time in romstage 12801 ms
5032 01:54:21.858834
5033 01:54:21.859195
5034 01:54:21.868356 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5035 01:54:21.871832 ARM64: Exception handlers installed.
5036 01:54:21.872376 ARM64: Testing exception
5037 01:54:21.875168 ARM64: Done test exception
5038 01:54:21.878598 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5039 01:54:21.881627 Manufacturer: ef
5040 01:54:21.885005 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5041 01:54:21.891558 WARNING: RO_VPD is uninitialized or empty.
5042 01:54:21.894420 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5043 01:54:21.897746 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5044 01:54:21.907885 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5045 01:54:21.911412 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5046 01:54:21.917692 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5047 01:54:21.918262 Enumerating buses...
5048 01:54:21.924930 Show all devs... Before device enumeration.
5049 01:54:21.925528 Root Device: enabled 1
5050 01:54:21.927775 CPU_CLUSTER: 0: enabled 1
5051 01:54:21.928227 CPU: 00: enabled 1
5052 01:54:21.931595 Compare with tree...
5053 01:54:21.934618 Root Device: enabled 1
5054 01:54:21.935074 CPU_CLUSTER: 0: enabled 1
5055 01:54:21.938155 CPU: 00: enabled 1
5056 01:54:21.941533 Root Device scanning...
5057 01:54:21.942122 root_dev_scan_bus for Root Device
5058 01:54:21.944786 CPU_CLUSTER: 0 enabled
5059 01:54:21.947985 root_dev_scan_bus for Root Device done
5060 01:54:21.954837 scan_bus: scanning of bus Root Device took 10689 usecs
5061 01:54:21.955579 done
5062 01:54:21.957645 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5063 01:54:21.961349 Allocating resources...
5064 01:54:21.961948 Reading resources...
5065 01:54:21.964874 Root Device read_resources bus 0 link: 0
5066 01:54:21.971804 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5067 01:54:21.972354 CPU: 00 missing read_resources
5068 01:54:21.978145 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5069 01:54:21.981997 Root Device read_resources bus 0 link: 0 done
5070 01:54:21.984638 Done reading resources.
5071 01:54:21.987498 Show resources in subtree (Root Device)...After reading.
5072 01:54:21.991380 Root Device child on link 0 CPU_CLUSTER: 0
5073 01:54:21.994308 CPU_CLUSTER: 0 child on link 0 CPU: 00
5074 01:54:22.004661 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5075 01:54:22.005302 CPU: 00
5076 01:54:22.008035 Setting resources...
5077 01:54:22.011493 Root Device assign_resources, bus 0 link: 0
5078 01:54:22.014551 CPU_CLUSTER: 0 missing set_resources
5079 01:54:22.017654 Root Device assign_resources, bus 0 link: 0
5080 01:54:22.021157 Done setting resources.
5081 01:54:22.028023 Show resources in subtree (Root Device)...After assigning values.
5082 01:54:22.031185 Root Device child on link 0 CPU_CLUSTER: 0
5083 01:54:22.034522 CPU_CLUSTER: 0 child on link 0 CPU: 00
5084 01:54:22.041320 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5085 01:54:22.044581 CPU: 00
5086 01:54:22.045139 Done allocating resources.
5087 01:54:22.051477 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5088 01:54:22.052023 Enabling resources...
5089 01:54:22.054520 done.
5090 01:54:22.057830 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5091 01:54:22.060779 Initializing devices...
5092 01:54:22.061233 Root Device init ...
5093 01:54:22.064771 mainboard_init: Starting display init.
5094 01:54:22.067791 ADC[4]: Raw value=76494 ID=0
5095 01:54:22.090982 anx7625_power_on_init: Init interface.
5096 01:54:22.093952 anx7625_disable_pd_protocol: Disabled PD feature.
5097 01:54:22.100527 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5098 01:54:22.147434 anx7625_start_dp_work: Secure OCM version=00
5099 01:54:22.150570 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5100 01:54:22.168089 sp_tx_get_edid_block: EDID Block = 1
5101 01:54:22.285390 Extracted contents:
5102 01:54:22.288525 header: 00 ff ff ff ff ff ff 00
5103 01:54:22.292198 serial number: 06 af 5c 14 00 00 00 00 00 1a
5104 01:54:22.295398 version: 01 04
5105 01:54:22.298567 basic params: 95 1a 0e 78 02
5106 01:54:22.301632 chroma info: 99 85 95 55 56 92 28 22 50 54
5107 01:54:22.305474 established: 00 00 00
5108 01:54:22.312061 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5109 01:54:22.315440 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5110 01:54:22.321913 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5111 01:54:22.328441 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5112 01:54:22.335218 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5113 01:54:22.338205 extensions: 00
5114 01:54:22.338663 checksum: ae
5115 01:54:22.339022
5116 01:54:22.341686 Manufacturer: AUO Model 145c Serial Number 0
5117 01:54:22.345379 Made week 0 of 2016
5118 01:54:22.345920 EDID version: 1.4
5119 01:54:22.348721 Digital display
5120 01:54:22.351921 6 bits per primary color channel
5121 01:54:22.352472 DisplayPort interface
5122 01:54:22.354978 Maximum image size: 26 cm x 14 cm
5123 01:54:22.357997 Gamma: 220%
5124 01:54:22.358452 Check DPMS levels
5125 01:54:22.361448 Supported color formats: RGB 4:4:4
5126 01:54:22.365242 First detailed timing is preferred timing
5127 01:54:22.368492 Established timings supported:
5128 01:54:22.371738 Standard timings supported:
5129 01:54:22.372277 Detailed timings
5130 01:54:22.374984 Hex of detail: ce1d56ea50001a3030204600009010000018
5131 01:54:22.382212 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5132 01:54:22.384900 0556 0586 05a6 0640 hborder 0
5133 01:54:22.388430 0300 0304 030a 031a vborder 0
5134 01:54:22.391921 -hsync -vsync
5135 01:54:22.395199 Did detailed timing
5136 01:54:22.398347 Hex of detail: 0000000f0000000000000000000000000020
5137 01:54:22.401429 Manufacturer-specified data, tag 15
5138 01:54:22.404913 Hex of detail: 000000fe0041554f0a202020202020202020
5139 01:54:22.408207 ASCII string: AUO
5140 01:54:22.411400 Hex of detail: 000000fe004231313658414230312e34200a
5141 01:54:22.414644 ASCII string: B116XAB01.4
5142 01:54:22.415060 Checksum
5143 01:54:22.418126 Checksum: 0xae (valid)
5144 01:54:22.424926 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5145 01:54:22.425607 DSI data_rate: 457800000 bps
5146 01:54:22.431777 anx7625_parse_edid: set default k value to 0x3d for panel
5147 01:54:22.435049 anx7625_parse_edid: pixelclock(76300).
5148 01:54:22.438422 hactive(1366), hsync(32), hfp(48), hbp(154)
5149 01:54:22.441909 vactive(768), vsync(6), vfp(4), vbp(16)
5150 01:54:22.445101 anx7625_dsi_config: config dsi.
5151 01:54:22.453346 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5152 01:54:22.474361 anx7625_dsi_config: success to config DSI
5153 01:54:22.477775 anx7625_dp_start: MIPI phy setup OK.
5154 01:54:22.481337 [SSUSB] Setting up USB HOST controller...
5155 01:54:22.484661 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5156 01:54:22.487765 [SSUSB] phy power-on done.
5157 01:54:22.492051 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5158 01:54:22.494842 in-header: 03 fc 01 00 00 00 00 00
5159 01:54:22.495333 in-data:
5160 01:54:22.498253 handle_proto3_response: EC response with error code: 1
5161 01:54:22.501899 SPM: pcm index = 1
5162 01:54:22.505294 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5163 01:54:22.507888 CBFS @ 21000 size 3d4000
5164 01:54:22.515216 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5165 01:54:22.517988 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5166 01:54:22.521365 CBFS: Found @ offset 1e7c0 size 1026
5167 01:54:22.527834 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5168 01:54:22.531323 SPM: binary array size = 2988
5169 01:54:22.534669 SPM: version = pcm_allinone_v1.17.2_20180829
5170 01:54:22.537681 SPM binary loaded in 32 msecs
5171 01:54:22.545653 spm_kick_im_to_fetch: ptr = 000000004021eec2
5172 01:54:22.548444 spm_kick_im_to_fetch: len = 2988
5173 01:54:22.548860 SPM: spm_kick_pcm_to_run
5174 01:54:22.551727 SPM: spm_kick_pcm_to_run done
5175 01:54:22.554979 SPM: spm_init done in 52 msecs
5176 01:54:22.558607 Root Device init finished in 494994 usecs
5177 01:54:22.561915 CPU_CLUSTER: 0 init ...
5178 01:54:22.571861 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5179 01:54:22.575213 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5180 01:54:22.578474 CBFS @ 21000 size 3d4000
5181 01:54:22.582122 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5182 01:54:22.585132 CBFS: Locating 'sspm.bin'
5183 01:54:22.588727 CBFS: Found @ offset 208c0 size 41cb
5184 01:54:22.598593 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5185 01:54:22.606429 CPU_CLUSTER: 0 init finished in 42798 usecs
5186 01:54:22.606907 Devices initialized
5187 01:54:22.609842 Show all devs... After init.
5188 01:54:22.613150 Root Device: enabled 1
5189 01:54:22.613617 CPU_CLUSTER: 0: enabled 1
5190 01:54:22.616522 CPU: 00: enabled 1
5191 01:54:22.619659 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5192 01:54:22.623134 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5193 01:54:22.626165 ELOG: NV offset 0x558000 size 0x1000
5194 01:54:22.633757 read SPI 0x558000 0x1000: 1258 us, 3255 KB/s, 26.040 Mbps
5195 01:54:22.640815 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5196 01:54:22.644048 ELOG: Event(17) added with size 13 at 2024-06-21 01:54:22 UTC
5197 01:54:22.650593 out: cmd=0x121: 03 db 21 01 00 00 00 00
5198 01:54:22.653751 in-header: 03 4a 00 00 2c 00 00 00
5199 01:54:22.663642 in-data: 0d 48 00 00 00 00 00 00 02 10 00 00 06 80 00 00 5f fc 00 00 06 80 00 00 a2 e9 01 00 06 80 00 00 06 33 01 00 06 80 00 00 ba 2b 02 00
5200 01:54:22.667244 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5201 01:54:22.670550 in-header: 03 19 00 00 08 00 00 00
5202 01:54:22.673584 in-data: a2 e0 47 00 13 00 00 00
5203 01:54:22.676838 Chrome EC: UHEPI supported
5204 01:54:22.683648 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5205 01:54:22.687019 in-header: 03 e1 00 00 08 00 00 00
5206 01:54:22.690533 in-data: 84 20 60 10 00 00 00 00
5207 01:54:22.693621 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5208 01:54:22.700442 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5209 01:54:22.704066 in-header: 03 e1 00 00 08 00 00 00
5210 01:54:22.706834 in-data: 84 20 60 10 00 00 00 00
5211 01:54:22.713797 ELOG: Event(A1) added with size 10 at 2024-06-21 01:54:22 UTC
5212 01:54:22.720250 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5213 01:54:22.723937 ELOG: Event(A0) added with size 9 at 2024-06-21 01:54:22 UTC
5214 01:54:22.730184 elog_add_boot_reason: Logged dev mode boot
5215 01:54:22.730728 Finalize devices...
5216 01:54:22.733730 Devices finalized
5217 01:54:22.737189 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5218 01:54:22.743413 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5219 01:54:22.746681 ELOG: Event(91) added with size 10 at 2024-06-21 01:54:22 UTC
5220 01:54:22.749835 Writing coreboot table at 0xffeda000
5221 01:54:22.753374 0. 0000000000114000-000000000011efff: RAMSTAGE
5222 01:54:22.759967 1. 0000000040000000-000000004023cfff: RAMSTAGE
5223 01:54:22.763214 2. 000000004023d000-00000000545fffff: RAM
5224 01:54:22.766564 3. 0000000054600000-000000005465ffff: BL31
5225 01:54:22.769902 4. 0000000054660000-00000000ffed9fff: RAM
5226 01:54:22.776550 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5227 01:54:22.780037 6. 0000000100000000-000000013fffffff: RAM
5228 01:54:22.783348 Passing 5 GPIOs to payload:
5229 01:54:22.786762 NAME | PORT | POLARITY | VALUE
5230 01:54:22.790037 write protect | 0x00000096 | low | high
5231 01:54:22.796482 EC in RW | 0x000000b1 | high | undefined
5232 01:54:22.800028 EC interrupt | 0x00000097 | low | undefined
5233 01:54:22.806523 TPM interrupt | 0x00000099 | high | undefined
5234 01:54:22.809944 speaker enable | 0x000000af | high | undefined
5235 01:54:22.813592 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5236 01:54:22.817197 in-header: 03 f7 00 00 02 00 00 00
5237 01:54:22.819805 in-data: 04 00
5238 01:54:22.820299 Board ID: 4
5239 01:54:22.823182 ADC[3]: Raw value=1034985 ID=8
5240 01:54:22.823723 RAM code: 8
5241 01:54:22.824082 SKU ID: 16
5242 01:54:22.829855 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5243 01:54:22.830271 CBFS @ 21000 size 3d4000
5244 01:54:22.836822 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5245 01:54:22.843841 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 26c5
5246 01:54:22.846856 coreboot table: 940 bytes.
5247 01:54:22.849755 IMD ROOT 0. 00000000fffff000 00001000
5248 01:54:22.853421 IMD SMALL 1. 00000000ffffe000 00001000
5249 01:54:22.857232 CONSOLE 2. 00000000fffde000 00020000
5250 01:54:22.860357 FMAP 3. 00000000fffdd000 0000047c
5251 01:54:22.863236 TIME STAMP 4. 00000000fffdc000 00000910
5252 01:54:22.866590 RAMOOPS 5. 00000000ffedc000 00100000
5253 01:54:22.869900 COREBOOT 6. 00000000ffeda000 00002000
5254 01:54:22.873321 IMD small region:
5255 01:54:22.876343 IMD ROOT 0. 00000000ffffec00 00000400
5256 01:54:22.879804 VBOOT WORK 1. 00000000ffffeb00 00000100
5257 01:54:22.883277 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5258 01:54:22.886154 VPD 3. 00000000ffffea60 0000006c
5259 01:54:22.893158 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5260 01:54:22.899530 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5261 01:54:22.902948 in-header: 03 e1 00 00 08 00 00 00
5262 01:54:22.906031 in-data: 84 20 60 10 00 00 00 00
5263 01:54:22.910590 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5264 01:54:22.913089 CBFS @ 21000 size 3d4000
5265 01:54:22.916117 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5266 01:54:22.919731 CBFS: Locating 'fallback/payload'
5267 01:54:22.928498 CBFS: Found @ offset dc040 size 439a0
5268 01:54:23.016408 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5269 01:54:23.019861 Checking segment from ROM address 0x0000000040003a00
5270 01:54:23.026475 Checking segment from ROM address 0x0000000040003a1c
5271 01:54:23.029635 Loading segment from ROM address 0x0000000040003a00
5272 01:54:23.032949 code (compression=0)
5273 01:54:23.043184 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5274 01:54:23.049675 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5275 01:54:23.052658 it's not compressed!
5276 01:54:23.055719 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5277 01:54:23.062713 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5278 01:54:23.070162 Loading segment from ROM address 0x0000000040003a1c
5279 01:54:23.074186 Entry Point 0x0000000080000000
5280 01:54:23.074729 Loaded segments
5281 01:54:23.080656 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5282 01:54:23.083837 Jumping to boot code at 0000000080000000(00000000ffeda000)
5283 01:54:23.093891 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5284 01:54:23.096940 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5285 01:54:23.100287 CBFS @ 21000 size 3d4000
5286 01:54:23.106958 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5287 01:54:23.110352 CBFS: Locating 'fallback/bl31'
5288 01:54:23.113942 CBFS: Found @ offset 36dc0 size 5820
5289 01:54:23.124433 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5290 01:54:23.127409 Checking segment from ROM address 0x0000000040003a00
5291 01:54:23.134181 Checking segment from ROM address 0x0000000040003a1c
5292 01:54:23.137902 Loading segment from ROM address 0x0000000040003a00
5293 01:54:23.141056 code (compression=1)
5294 01:54:23.147837 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5295 01:54:23.157540 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5296 01:54:23.157956 using LZMA
5297 01:54:23.166112 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5298 01:54:23.173145 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5299 01:54:23.176981 Loading segment from ROM address 0x0000000040003a1c
5300 01:54:23.179893 Entry Point 0x0000000054601000
5301 01:54:23.180454 Loaded segments
5302 01:54:23.183346 NOTICE: MT8183 bl31_setup
5303 01:54:23.190129 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5304 01:54:23.193186 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5305 01:54:23.196444 INFO: [DEVAPC] dump DEVAPC registers:
5306 01:54:23.206132 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5307 01:54:23.213141 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5308 01:54:23.223220 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5309 01:54:23.229814 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5310 01:54:23.239955 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5311 01:54:23.246208 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5312 01:54:23.256462 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5313 01:54:23.263120 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5314 01:54:23.269508 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5315 01:54:23.279873 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5316 01:54:23.286248 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5317 01:54:23.296158 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5318 01:54:23.303184 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5319 01:54:23.312709 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5320 01:54:23.319245 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5321 01:54:23.326332 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5322 01:54:23.332931 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5323 01:54:23.339323 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5324 01:54:23.349355 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5325 01:54:23.355726 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5326 01:54:23.362812 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5327 01:54:23.369405 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5328 01:54:23.372747 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5329 01:54:23.375955 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5330 01:54:23.379279 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5331 01:54:23.382634 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5332 01:54:23.386274 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5333 01:54:23.392502 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5334 01:54:23.399281 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5335 01:54:23.399839 WARNING: region 0:
5336 01:54:23.403058 WARNING: apc:0x168, sa:0x0, ea:0xfff
5337 01:54:23.405737 WARNING: region 1:
5338 01:54:23.409077 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5339 01:54:23.409674 WARNING: region 2:
5340 01:54:23.412545 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5341 01:54:23.416113 WARNING: region 3:
5342 01:54:23.419088 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5343 01:54:23.422756 WARNING: region 4:
5344 01:54:23.425702 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5345 01:54:23.426249 WARNING: region 5:
5346 01:54:23.429438 WARNING: apc:0x0, sa:0x0, ea:0x0
5347 01:54:23.432584 WARNING: region 6:
5348 01:54:23.435887 WARNING: apc:0x0, sa:0x0, ea:0x0
5349 01:54:23.436445 WARNING: region 7:
5350 01:54:23.439588 WARNING: apc:0x0, sa:0x0, ea:0x0
5351 01:54:23.445743 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5352 01:54:23.449447 INFO: SPM: enable SPMC mode
5353 01:54:23.452679 NOTICE: spm_boot_init() start
5354 01:54:23.456222 NOTICE: spm_boot_init() end
5355 01:54:23.459586 INFO: BL31: Initializing runtime services
5356 01:54:23.462597 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5357 01:54:23.469619 INFO: BL31: Preparing for EL3 exit to normal world
5358 01:54:23.472317 INFO: Entry point address = 0x80000000
5359 01:54:23.475433 INFO: SPSR = 0x8
5360 01:54:23.496112
5361 01:54:23.496525
5362 01:54:23.496850
5363 01:54:23.498323 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
5364 01:54:23.498818 start: 2.2.4 bootloader-commands (timeout 00:04:26) [common]
5365 01:54:23.499226 Setting prompt string to ['jacuzzi:']
5366 01:54:23.499629 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:26)
5367 01:54:23.500273 Starting depthcharge on Juniper...
5368 01:54:23.500614
5369 01:54:23.503093 vboot_handoff: creating legacy vboot_handoff structure
5370 01:54:23.503610
5371 01:54:23.506269 ec_init(0): CrosEC protocol v3 supported (544, 544)
5372 01:54:23.509647
5373 01:54:23.510155 Wipe memory regions:
5374 01:54:23.510482
5375 01:54:23.512843 [0x00000040000000, 0x00000054600000)
5376 01:54:23.556159
5377 01:54:23.556707 [0x00000054660000, 0x00000080000000)
5378 01:54:23.647135
5379 01:54:23.647684 [0x000000811994a0, 0x000000ffeda000)
5380 01:54:23.906627
5381 01:54:23.907142 [0x00000100000000, 0x00000140000000)
5382 01:54:24.039182
5383 01:54:24.042553 Initializing XHCI USB controller at 0x11200000.
5384 01:54:24.065296
5385 01:54:24.068408 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5386 01:54:24.068887
5387 01:54:24.069244
5388 01:54:24.070123 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5390 01:54:24.171489 jacuzzi: tftpboot 192.168.201.1 14479143/tftp-deploy-bp6c410g/kernel/image.itb 14479143/tftp-deploy-bp6c410g/kernel/cmdline
5391 01:54:24.172156 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5392 01:54:24.172712 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5393 01:54:24.177049 tftpboot 192.168.201.1 14479143/tftp-deploy-bp6c410g/kernel/image.itp-deploy-bp6c410g/kernel/cmdline
5394 01:54:24.177603
5395 01:54:24.177969 Waiting for link
5396 01:54:24.579514
5397 01:54:24.580069 R8152: Initializing
5398 01:54:24.580439
5399 01:54:24.582328 Version 9 (ocp_data = 6010)
5400 01:54:24.582786
5401 01:54:24.585728 R8152: Done initializing
5402 01:54:24.586215
5403 01:54:24.586572 Adding net device
5404 01:54:24.971126
5405 01:54:24.971638 done.
5406 01:54:24.971969
5407 01:54:24.972273 MAC: 00:e0:4c:71:a7:1f
5408 01:54:24.972648
5409 01:54:24.974603 Sending DHCP discover... done.
5410 01:54:24.975023
5411 01:54:24.977848 Waiting for reply... done.
5412 01:54:24.978377
5413 01:54:24.981333 Sending DHCP request... done.
5414 01:54:24.981747
5415 01:54:24.987474 Waiting for reply... done.
5416 01:54:24.987981
5417 01:54:24.988312 My ip is 192.168.201.23
5418 01:54:24.988637
5419 01:54:24.990389 The DHCP server ip is 192.168.201.1
5420 01:54:24.990809
5421 01:54:24.996699 TFTP server IP predefined by user: 192.168.201.1
5422 01:54:24.997206
5423 01:54:25.003448 Bootfile predefined by user: 14479143/tftp-deploy-bp6c410g/kernel/image.itb
5424 01:54:25.004342
5425 01:54:25.004963 Sending tftp read request... done.
5426 01:54:25.007097
5427 01:54:25.010092 Waiting for the transfer...
5428 01:54:25.010510
5429 01:54:25.401491 00000000 ################################################################
5430 01:54:25.401998
5431 01:54:25.772021 00080000 ################################################################
5432 01:54:25.772160
5433 01:54:26.075286 00100000 ################################################################
5434 01:54:26.075426
5435 01:54:26.376259 00180000 ################################################################
5436 01:54:26.376407
5437 01:54:26.725816 00200000 ################################################################
5438 01:54:26.726322
5439 01:54:27.116661 00280000 ################################################################
5440 01:54:27.117166
5441 01:54:27.519167 00300000 ################################################################
5442 01:54:27.519697
5443 01:54:27.916697 00380000 ################################################################
5444 01:54:27.916899
5445 01:54:28.222975 00400000 ################################################################
5446 01:54:28.223117
5447 01:54:28.528551 00480000 ################################################################
5448 01:54:28.528708
5449 01:54:28.869484 00500000 ################################################################
5450 01:54:28.869626
5451 01:54:29.308943 00580000 ################################################################
5452 01:54:29.309481
5453 01:54:29.727975 00600000 ################################################################
5454 01:54:29.728469
5455 01:54:30.112162 00680000 ################################################################
5456 01:54:30.112702
5457 01:54:30.509612 00700000 ################################################################
5458 01:54:30.510109
5459 01:54:30.811119 00780000 ################################################################
5460 01:54:30.811250
5461 01:54:31.110553 00800000 ################################################################
5462 01:54:31.110689
5463 01:54:31.407437 00880000 ################################################################
5464 01:54:31.407576
5465 01:54:31.705721 00900000 ################################################################
5466 01:54:31.705855
5467 01:54:32.004377 00980000 ################################################################
5468 01:54:32.004512
5469 01:54:32.267783 00a00000 ################################################################
5470 01:54:32.267920
5471 01:54:32.534554 00a80000 ################################################################
5472 01:54:32.534690
5473 01:54:32.816878 00b00000 ################################################################
5474 01:54:32.817018
5475 01:54:33.117526 00b80000 ################################################################
5476 01:54:33.117669
5477 01:54:33.414834 00c00000 ################################################################
5478 01:54:33.414969
5479 01:54:33.693711 00c80000 ################################################################
5480 01:54:33.693847
5481 01:54:33.952446 00d00000 ################################################################
5482 01:54:33.952584
5483 01:54:34.222317 00d80000 ################################################################
5484 01:54:34.222488
5485 01:54:34.499571 00e00000 ################################################################
5486 01:54:34.499750
5487 01:54:34.790005 00e80000 ################################################################
5488 01:54:34.790138
5489 01:54:35.059669 00f00000 ################################################################
5490 01:54:35.059814
5491 01:54:35.355921 00f80000 ################################################################
5492 01:54:35.356059
5493 01:54:35.659083 01000000 ################################################################
5494 01:54:35.659239
5495 01:54:35.961161 01080000 ################################################################
5496 01:54:35.961333
5497 01:54:36.238433 01100000 ################################################################
5498 01:54:36.238574
5499 01:54:36.521483 01180000 ################################################################
5500 01:54:36.521616
5501 01:54:36.806992 01200000 ################################################################
5502 01:54:36.807127
5503 01:54:37.102302 01280000 ################################################################
5504 01:54:37.102435
5505 01:54:37.391067 01300000 ################################################################
5506 01:54:37.391202
5507 01:54:37.687695 01380000 ################################################################
5508 01:54:37.687832
5509 01:54:37.999272 01400000 ################################################################
5510 01:54:37.999822
5511 01:54:38.403428 01480000 ################################################################
5512 01:54:38.403933
5513 01:54:38.798072 01500000 ################################################################
5514 01:54:38.798565
5515 01:54:39.204571 01580000 ################################################################
5516 01:54:39.205104
5517 01:54:39.615616 01600000 ################################################################
5518 01:54:39.616256
5519 01:54:39.989493 01680000 ################################################################
5520 01:54:39.989674
5521 01:54:40.291665 01700000 ################################################################
5522 01:54:40.291804
5523 01:54:40.581981 01780000 ################################################################
5524 01:54:40.582121
5525 01:54:40.867309 01800000 ################################################################
5526 01:54:40.867460
5527 01:54:41.141691 01880000 ################################################################
5528 01:54:41.141828
5529 01:54:41.428132 01900000 ################################################################
5530 01:54:41.428268
5531 01:54:41.716584 01980000 ################################################################
5532 01:54:41.716714
5533 01:54:42.018917 01a00000 ################################################################
5534 01:54:42.019056
5535 01:54:42.316649 01a80000 ################################################################
5536 01:54:42.316784
5537 01:54:42.597200 01b00000 ################################################################
5538 01:54:42.597361
5539 01:54:42.880309 01b80000 ################################################################
5540 01:54:42.880446
5541 01:54:43.163872 01c00000 ################################################################
5542 01:54:43.164016
5543 01:54:43.447697 01c80000 ################################################################
5544 01:54:43.447830
5545 01:54:43.710801 01d00000 ################################################################
5546 01:54:43.710940
5547 01:54:43.967129 01d80000 ################################################################
5548 01:54:43.967269
5549 01:54:44.193708 01e00000 ######################################################### done.
5550 01:54:44.193841
5551 01:54:44.196900 The bootfile was 31922558 bytes long.
5552 01:54:44.196991
5553 01:54:44.200403 Sending tftp read request... done.
5554 01:54:44.200492
5555 01:54:44.200582 Waiting for the transfer...
5556 01:54:44.200666
5557 01:54:44.204202 00000000 # done.
5558 01:54:44.204300
5559 01:54:44.211115 Command line loaded dynamically from TFTP file: 14479143/tftp-deploy-bp6c410g/kernel/cmdline
5560 01:54:44.211295
5561 01:54:44.237368 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14479143/extract-nfsrootfs-sovqjz2d,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5562 01:54:44.237646
5563 01:54:44.237861 Loading FIT.
5564 01:54:44.238054
5565 01:54:44.241021 Image ramdisk-1 has 18737920 bytes.
5566 01:54:44.241328
5567 01:54:44.243655 Image fdt-1 has 57695 bytes.
5568 01:54:44.243948
5569 01:54:44.246992 Image kernel-1 has 13124896 bytes.
5570 01:54:44.247296
5571 01:54:44.257461 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5572 01:54:44.257981
5573 01:54:44.267640 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5574 01:54:44.268213
5575 01:54:44.274301 Choosing best match conf-1 for compat google,juniper-sku16.
5576 01:54:44.277794
5577 01:54:44.282173 Connected to device vid:did:rid of 1ae0:0028:00
5578 01:54:44.289433
5579 01:54:44.292751 tpm_get_response: command 0x17b, return code 0x0
5580 01:54:44.293335
5581 01:54:44.296090 tpm_cleanup: add release locality here.
5582 01:54:44.296647
5583 01:54:44.299462 Shutting down all USB controllers.
5584 01:54:44.300011
5585 01:54:44.302587 Removing current net device
5586 01:54:44.303040
5587 01:54:44.306021 Exiting depthcharge with code 4 at timestamp: 37168684
5588 01:54:44.306588
5589 01:54:44.309429 LZMA decompressing kernel-1 to 0x80193568
5590 01:54:44.309973
5591 01:54:44.316126 LZMA decompressing kernel-1 to 0x40000000
5592 01:54:46.179640
5593 01:54:46.180151 jumping to kernel
5594 01:54:46.182326 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
5595 01:54:46.182911 start: 2.2.5 auto-login-action (timeout 00:04:04) [common]
5596 01:54:46.183322 Setting prompt string to ['Linux version [0-9]']
5597 01:54:46.183744 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5598 01:54:46.184193 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5599 01:54:46.255058
5600 01:54:46.258233 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5601 01:54:46.262153 start: 2.2.5.1 login-action (timeout 00:04:03) [common]
5602 01:54:46.262681 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5603 01:54:46.263078 Setting prompt string to []
5604 01:54:46.263481 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5605 01:54:46.263855 Using line separator: #'\n'#
5606 01:54:46.264177 No login prompt set.
5607 01:54:46.264523 Parsing kernel messages
5608 01:54:46.264913 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5609 01:54:46.265546 [login-action] Waiting for messages, (timeout 00:04:03)
5610 01:54:46.265911 Waiting using forced prompt support (timeout 00:02:02)
5611 01:54:46.281821 [ 0.000000] Linux version 6.1.94-cip23 (KernelCI@build-j239242-arm64-gcc-10-defconfig-arm64-chromebook-c5lwc) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Fri Jun 21 00:04:56 UTC 2024
5612 01:54:46.284965 [ 0.000000] random: crng init done
5613 01:54:46.292114 [ 0.000000] Machine model: Google juniper sku16 board
5614 01:54:46.292663 [ 0.000000] efi: UEFI not found.
5615 01:54:46.301439 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5616 01:54:46.308673 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5617 01:54:46.318080 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5618 01:54:46.321825 [ 0.000000] printk: bootconsole [mtk8250] enabled
5619 01:54:46.330072 [ 0.000000] NUMA: No NUMA configuration found
5620 01:54:46.336372 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5621 01:54:46.343156 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5622 01:54:46.343706 [ 0.000000] Zone ranges:
5623 01:54:46.349986 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5624 01:54:46.353151 [ 0.000000] DMA32 empty
5625 01:54:46.359478 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5626 01:54:46.362798 [ 0.000000] Movable zone start for each node
5627 01:54:46.366293 [ 0.000000] Early memory node ranges
5628 01:54:46.373175 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5629 01:54:46.380286 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5630 01:54:46.386450 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5631 01:54:46.392892 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5632 01:54:46.399861 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5633 01:54:46.406428 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5634 01:54:46.422169 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5635 01:54:46.428948 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5636 01:54:46.435965 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5637 01:54:46.439136 [ 0.000000] psci: probing for conduit method from DT.
5638 01:54:46.445542 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5639 01:54:46.448983 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5640 01:54:46.455835 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5641 01:54:46.458812 [ 0.000000] psci: SMC Calling Convention v1.1
5642 01:54:46.465507 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5643 01:54:46.468850 [ 0.000000] Detected VIPT I-cache on CPU0
5644 01:54:46.475563 [ 0.000000] CPU features: detected: GIC system register CPU interface
5645 01:54:46.482359 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5646 01:54:46.488906 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5647 01:54:46.492809 [ 0.000000] CPU features: detected: ARM erratum 845719
5648 01:54:46.498543 [ 0.000000] alternatives: applying boot alternatives
5649 01:54:46.501835 [ 0.000000] Fallback order for Node 0: 0
5650 01:54:46.508645 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5651 01:54:46.511968 [ 0.000000] Policy zone: Normal
5652 01:54:46.538481 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14479143/extract-nfsrootfs-sovqjz2d,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5653 01:54:46.551744 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5654 01:54:46.562154 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5655 01:54:46.568327 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5656 01:54:46.574827 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5657 01:54:46.578281 <6>[ 0.000000] software IO TLB: area num 8.
5658 01:54:46.605873 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5659 01:54:46.663933 <6>[ 0.000000] Memory: 3896772K/4191232K available (18112K kernel code, 4120K rwdata, 22648K rodata, 8512K init, 616K bss, 261692K reserved, 32768K cma-reserved)
5660 01:54:46.670315 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5661 01:54:46.677854 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5662 01:54:46.680553 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5663 01:54:46.687233 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5664 01:54:46.693726 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5665 01:54:46.697337 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5666 01:54:46.707058 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5667 01:54:46.714160 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5668 01:54:46.716967 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5669 01:54:46.729421 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5670 01:54:46.735447 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5671 01:54:46.738567 <6>[ 0.000000] GICv3: 640 SPIs implemented
5672 01:54:46.742168 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5673 01:54:46.748333 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5674 01:54:46.751756 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5675 01:54:46.758459 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5676 01:54:46.768967 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5677 01:54:46.781910 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5678 01:54:46.788510 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5679 01:54:46.800692 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5680 01:54:46.814083 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5681 01:54:46.820579 <6>[ 0.000001] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5682 01:54:46.827102 <6>[ 0.009471] Console: colour dummy device 80x25
5683 01:54:46.830450 <6>[ 0.014518] printk: console [tty1] enabled
5684 01:54:46.840663 <6>[ 0.018905] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5685 01:54:46.847135 <6>[ 0.029370] pid_max: default: 32768 minimum: 301
5686 01:54:46.850678 <6>[ 0.034252] LSM: Security Framework initializing
5687 01:54:46.860652 <6>[ 0.039167] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5688 01:54:46.867465 <6>[ 0.046791] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5689 01:54:46.873791 <4>[ 0.055653] cacheinfo: Unable to detect cache hierarchy for CPU 0
5690 01:54:46.884077 <6>[ 0.062281] cblist_init_generic: Setting adjustable number of callback queues.
5691 01:54:46.887409 <6>[ 0.069728] cblist_init_generic: Setting shift to 3 and lim to 1.
5692 01:54:46.896858 <6>[ 0.076081] cblist_init_generic: Setting adjustable number of callback queues.
5693 01:54:46.903798 <6>[ 0.083526] cblist_init_generic: Setting shift to 3 and lim to 1.
5694 01:54:46.907126 <6>[ 0.089925] rcu: Hierarchical SRCU implementation.
5695 01:54:46.913208 <6>[ 0.094951] rcu: Max phase no-delay instances is 1000.
5696 01:54:46.920379 <6>[ 0.102869] EFI services will not be available.
5697 01:54:46.924194 <6>[ 0.107820] smp: Bringing up secondary CPUs ...
5698 01:54:46.934183 <6>[ 0.113114] Detected VIPT I-cache on CPU1
5699 01:54:46.940820 <4>[ 0.113160] cacheinfo: Unable to detect cache hierarchy for CPU 1
5700 01:54:46.948554 <6>[ 0.113168] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5701 01:54:46.954567 <6>[ 0.113199] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5702 01:54:46.957514 <6>[ 0.113683] Detected VIPT I-cache on CPU2
5703 01:54:46.964238 <4>[ 0.113716] cacheinfo: Unable to detect cache hierarchy for CPU 2
5704 01:54:46.971086 <6>[ 0.113721] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5705 01:54:46.978031 <6>[ 0.113733] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5706 01:54:46.980842 <6>[ 0.114178] Detected VIPT I-cache on CPU3
5707 01:54:46.987639 <4>[ 0.114209] cacheinfo: Unable to detect cache hierarchy for CPU 3
5708 01:54:46.994302 <6>[ 0.114213] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5709 01:54:47.001073 <6>[ 0.114224] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5710 01:54:47.007340 <6>[ 0.114799] CPU features: detected: Spectre-v2
5711 01:54:47.010898 <6>[ 0.114809] CPU features: detected: Spectre-BHB
5712 01:54:47.017537 <6>[ 0.114814] CPU features: detected: ARM erratum 858921
5713 01:54:47.020789 <6>[ 0.114819] Detected VIPT I-cache on CPU4
5714 01:54:47.027553 <4>[ 0.114867] cacheinfo: Unable to detect cache hierarchy for CPU 4
5715 01:54:47.034159 <6>[ 0.114875] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5716 01:54:47.040720 <6>[ 0.114883] arch_timer: Enabling local workaround for ARM erratum 858921
5717 01:54:47.047139 <6>[ 0.114894] arch_timer: CPU4: Trapping CNTVCT access
5718 01:54:47.053959 <6>[ 0.114902] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5719 01:54:47.057680 <6>[ 0.115386] Detected VIPT I-cache on CPU5
5720 01:54:47.064365 <4>[ 0.115427] cacheinfo: Unable to detect cache hierarchy for CPU 5
5721 01:54:47.070716 <6>[ 0.115432] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5722 01:54:47.077488 <6>[ 0.115439] arch_timer: Enabling local workaround for ARM erratum 858921
5723 01:54:47.084146 <6>[ 0.115445] arch_timer: CPU5: Trapping CNTVCT access
5724 01:54:47.091123 <6>[ 0.115450] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5725 01:54:47.094220 <6>[ 0.115886] Detected VIPT I-cache on CPU6
5726 01:54:47.100693 <4>[ 0.115932] cacheinfo: Unable to detect cache hierarchy for CPU 6
5727 01:54:47.107647 <6>[ 0.115938] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5728 01:54:47.114257 <6>[ 0.115946] arch_timer: Enabling local workaround for ARM erratum 858921
5729 01:54:47.121060 <6>[ 0.115952] arch_timer: CPU6: Trapping CNTVCT access
5730 01:54:47.127902 <6>[ 0.115956] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5731 01:54:47.130978 <6>[ 0.116486] Detected VIPT I-cache on CPU7
5732 01:54:47.137343 <4>[ 0.116530] cacheinfo: Unable to detect cache hierarchy for CPU 7
5733 01:54:47.144466 <6>[ 0.116536] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5734 01:54:47.150644 <6>[ 0.116543] arch_timer: Enabling local workaround for ARM erratum 858921
5735 01:54:47.157455 <6>[ 0.116549] arch_timer: CPU7: Trapping CNTVCT access
5736 01:54:47.163981 <6>[ 0.116555] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5737 01:54:47.167567 <6>[ 0.116605] smp: Brought up 1 node, 8 CPUs
5738 01:54:47.173734 <6>[ 0.355484] SMP: Total of 8 processors activated.
5739 01:54:47.177305 <6>[ 0.360421] CPU features: detected: 32-bit EL0 Support
5740 01:54:47.183965 <6>[ 0.365792] CPU features: detected: 32-bit EL1 Support
5741 01:54:47.190676 <6>[ 0.371158] CPU features: detected: CRC32 instructions
5742 01:54:47.193699 <6>[ 0.376586] CPU: All CPU(s) started at EL2
5743 01:54:47.200518 <6>[ 0.380923] alternatives: applying system-wide alternatives
5744 01:54:47.203859 <6>[ 0.388952] devtmpfs: initialized
5745 01:54:47.219308 <6>[ 0.397913] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5746 01:54:47.229326 <6>[ 0.407862] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5747 01:54:47.232423 <6>[ 0.415591] pinctrl core: initialized pinctrl subsystem
5748 01:54:47.240913 <6>[ 0.422690] DMI not present or invalid.
5749 01:54:47.246935 <6>[ 0.427063] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5750 01:54:47.253361 <6>[ 0.433971] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5751 01:54:47.263446 <6>[ 0.441501] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5752 01:54:47.269988 <6>[ 0.449750] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5753 01:54:47.276900 <6>[ 0.457926] audit: initializing netlink subsys (disabled)
5754 01:54:47.283970 <5>[ 0.463630] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5755 01:54:47.290337 <6>[ 0.464594] thermal_sys: Registered thermal governor 'step_wise'
5756 01:54:47.297077 <6>[ 0.471596] thermal_sys: Registered thermal governor 'power_allocator'
5757 01:54:47.300575 <6>[ 0.477893] cpuidle: using governor menu
5758 01:54:47.307097 <6>[ 0.488854] NET: Registered PF_QIPCRTR protocol family
5759 01:54:47.313587 <6>[ 0.494352] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5760 01:54:47.320432 <6>[ 0.501449] ASID allocator initialised with 32768 entries
5761 01:54:47.323923 <6>[ 0.508203] Serial: AMBA PL011 UART driver
5762 01:54:47.336128 <4>[ 0.518568] Trying to register duplicate clock ID: 113
5763 01:54:47.396084 <6>[ 0.574628] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5764 01:54:47.410057 <6>[ 0.588926] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5765 01:54:47.413338 <6>[ 0.598670] KASLR enabled
5766 01:54:47.427807 <6>[ 0.606703] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5767 01:54:47.434297 <6>[ 0.613706] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5768 01:54:47.440888 <6>[ 0.620183] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5769 01:54:47.447654 <6>[ 0.627173] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5770 01:54:47.454250 <6>[ 0.633647] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5771 01:54:47.461412 <6>[ 0.640637] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5772 01:54:47.468099 <6>[ 0.647111] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5773 01:54:47.474279 <6>[ 0.654100] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5774 01:54:47.477746 <6>[ 0.661668] ACPI: Interpreter disabled.
5775 01:54:47.487503 <6>[ 0.669630] iommu: Default domain type: Translated
5776 01:54:47.494119 <6>[ 0.674737] iommu: DMA domain TLB invalidation policy: strict mode
5777 01:54:47.497847 <5>[ 0.681370] SCSI subsystem initialized
5778 01:54:47.504699 <6>[ 0.685790] usbcore: registered new interface driver usbfs
5779 01:54:47.511246 <6>[ 0.691517] usbcore: registered new interface driver hub
5780 01:54:47.514686 <6>[ 0.697059] usbcore: registered new device driver usb
5781 01:54:47.521495 <6>[ 0.703356] pps_core: LinuxPPS API ver. 1 registered
5782 01:54:47.531080 <6>[ 0.708540] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5783 01:54:47.534688 <6>[ 0.717866] PTP clock support registered
5784 01:54:47.537532 <6>[ 0.722116] EDAC MC: Ver: 3.0.0
5785 01:54:47.545482 <6>[ 0.727737] FPGA manager framework
5786 01:54:47.548625 <6>[ 0.731420] Advanced Linux Sound Architecture Driver Initialized.
5787 01:54:47.552754 <6>[ 0.738174] vgaarb: loaded
5788 01:54:47.559434 <6>[ 0.741302] clocksource: Switched to clocksource arch_sys_counter
5789 01:54:47.566052 <5>[ 0.747731] VFS: Disk quotas dquot_6.6.0
5790 01:54:47.573317 <6>[ 0.751905] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5791 01:54:47.575928 <6>[ 0.759081] pnp: PnP ACPI: disabled
5792 01:54:47.583765 <6>[ 0.765988] NET: Registered PF_INET protocol family
5793 01:54:47.590502 <6>[ 0.771218] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5794 01:54:47.602139 <6>[ 0.781128] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5795 01:54:47.612296 <6>[ 0.789883] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5796 01:54:47.618882 <6>[ 0.797833] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5797 01:54:47.625487 <6>[ 0.806066] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5798 01:54:47.632167 <6>[ 0.814166] TCP: Hash tables configured (established 32768 bind 32768)
5799 01:54:47.642147 <6>[ 0.820992] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5800 01:54:47.649409 <6>[ 0.827966] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5801 01:54:47.655191 <6>[ 0.835446] NET: Registered PF_UNIX/PF_LOCAL protocol family
5802 01:54:47.662277 <6>[ 0.841540] RPC: Registered named UNIX socket transport module.
5803 01:54:47.665277 <6>[ 0.847685] RPC: Registered udp transport module.
5804 01:54:47.668633 <6>[ 0.852609] RPC: Registered tcp transport module.
5805 01:54:47.675590 <6>[ 0.857532] RPC: Registered tcp NFSv4.1 backchannel transport module.
5806 01:54:47.681841 <6>[ 0.864184] PCI: CLS 0 bytes, default 64
5807 01:54:47.685238 <6>[ 0.868469] Unpacking initramfs...
5808 01:54:47.703834 <6>[ 0.881878] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5809 01:54:47.713220 <6>[ 0.890612] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5810 01:54:47.716951 <6>[ 0.899533] kvm [1]: IPA Size Limit: 40 bits
5811 01:54:47.723570 <6>[ 0.905892] kvm [1]: vgic-v2@c420000
5812 01:54:47.727123 <6>[ 0.909728] kvm [1]: GIC system register CPU interface enabled
5813 01:54:47.733896 <6>[ 0.915923] kvm [1]: vgic interrupt IRQ18
5814 01:54:47.737090 <6>[ 0.920309] kvm [1]: Hyp mode initialized successfully
5815 01:54:47.744419 <5>[ 0.926697] Initialise system trusted keyrings
5816 01:54:47.750861 <6>[ 0.931554] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5817 01:54:47.759260 <6>[ 0.941533] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5818 01:54:47.765896 <5>[ 0.947992] NFS: Registering the id_resolver key type
5819 01:54:47.769162 <5>[ 0.953315] Key type id_resolver registered
5820 01:54:47.776011 <5>[ 0.957729] Key type id_legacy registered
5821 01:54:47.782610 <6>[ 0.962031] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5822 01:54:47.789011 <6>[ 0.968953] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5823 01:54:47.796078 <6>[ 0.976713] 9p: Installing v9fs 9p2000 file system support
5824 01:54:47.823340 <5>[ 1.005346] Key type asymmetric registered
5825 01:54:47.826734 <5>[ 1.009693] Asymmetric key parser 'x509' registered
5826 01:54:47.836656 <6>[ 1.014846] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5827 01:54:47.839738 <6>[ 1.022470] io scheduler mq-deadline registered
5828 01:54:47.842893 <6>[ 1.027229] io scheduler kyber registered
5829 01:54:47.865453 <6>[ 1.047952] EINJ: ACPI disabled.
5830 01:54:47.872774 <4>[ 1.051718] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5831 01:54:47.910548 <6>[ 1.092471] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5832 01:54:47.918512 <6>[ 1.100958] printk: console [ttyS0] disabled
5833 01:54:47.946861 <6>[ 1.125609] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5834 01:54:47.953525 <6>[ 1.135085] printk: console [ttyS0] enabled
5835 01:54:47.956601 <6>[ 1.135085] printk: console [ttyS0] enabled
5836 01:54:47.962996 <6>[ 1.144007] printk: bootconsole [mtk8250] disabled
5837 01:54:47.966220 <6>[ 1.144007] printk: bootconsole [mtk8250] disabled
5838 01:54:47.976906 <3>[ 1.154536] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5839 01:54:47.983218 <3>[ 1.162923] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5840 01:54:48.012638 <6>[ 1.191330] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5841 01:54:48.018990 <6>[ 1.200981] serial serial0: tty port ttyS1 registered
5842 01:54:48.025641 <6>[ 1.207553] SuperH (H)SCI(F) driver initialized
5843 01:54:48.029210 <6>[ 1.213020] msm_serial: driver initialized
5844 01:54:48.044491 <6>[ 1.223288] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5845 01:54:48.054065 <6>[ 1.231884] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5846 01:54:48.061100 <6>[ 1.240461] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5847 01:54:48.071051 <6>[ 1.249035] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5848 01:54:48.077593 <6>[ 1.257692] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5849 01:54:48.087555 <6>[ 1.266354] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5850 01:54:48.097799 <6>[ 1.275092] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5851 01:54:48.104281 <6>[ 1.283832] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5852 01:54:48.114115 <6>[ 1.292400] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5853 01:54:48.124228 <6>[ 1.301200] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5854 01:54:48.131634 <4>[ 1.313597] cacheinfo: Unable to detect cache hierarchy for CPU 0
5855 01:54:48.140588 <6>[ 1.322964] loop: module loaded
5856 01:54:48.152754 <6>[ 1.334932] vsim1: Bringing 1800000uV into 2700000-2700000uV
5857 01:54:48.170782 <6>[ 1.352945] megasas: 07.719.03.00-rc1
5858 01:54:48.179288 <6>[ 1.361659] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5859 01:54:48.186303 <6>[ 1.368687] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5860 01:54:48.203626 <6>[ 1.385261] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5861 01:54:48.260117 <6>[ 1.435643] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5862 01:54:48.308192 <6>[ 1.490344] Freeing initrd memory: 18296K
5863 01:54:48.323521 <4>[ 1.502185] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5864 01:54:48.329846 <4>[ 1.511420] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.94-cip23 #1
5865 01:54:48.336623 <4>[ 1.518119] Hardware name: Google juniper sku16 board (DT)
5866 01:54:48.339945 <4>[ 1.523857] Call trace:
5867 01:54:48.343576 <4>[ 1.526558] dump_backtrace.part.0+0xe0/0xf0
5868 01:54:48.346502 <4>[ 1.531094] show_stack+0x18/0x30
5869 01:54:48.349940 <4>[ 1.534666] dump_stack_lvl+0x68/0x84
5870 01:54:48.353584 <4>[ 1.538587] dump_stack+0x18/0x34
5871 01:54:48.360612 <4>[ 1.542157] sysfs_warn_dup+0x64/0x80
5872 01:54:48.363188 <4>[ 1.546079] sysfs_do_create_link_sd+0xf0/0x100
5873 01:54:48.366702 <4>[ 1.550864] sysfs_create_link+0x20/0x40
5874 01:54:48.373610 <4>[ 1.555040] bus_add_device+0x68/0x10c
5875 01:54:48.376614 <4>[ 1.559046] device_add+0x364/0x7cc
5876 01:54:48.380208 <4>[ 1.562789] of_device_add+0x44/0x60
5877 01:54:48.383300 <4>[ 1.566623] of_platform_device_create_pdata+0x90/0x120
5878 01:54:48.390409 <4>[ 1.572105] of_platform_bus_create+0x170/0x370
5879 01:54:48.393581 <4>[ 1.576889] of_platform_populate+0x50/0xfc
5880 01:54:48.400357 <4>[ 1.581326] parse_mtd_partitions+0x1dc/0x510
5881 01:54:48.403663 <4>[ 1.585940] mtd_device_parse_register+0xf0/0x2e4
5882 01:54:48.406716 <4>[ 1.590899] spi_nor_probe+0x21c/0x2f0
5883 01:54:48.410557 <4>[ 1.594905] spi_mem_probe+0x6c/0xb0
5884 01:54:48.413941 <4>[ 1.598737] spi_probe+0x84/0xe4
5885 01:54:48.420419 <4>[ 1.602219] really_probe+0xbc/0x2e0
5886 01:54:48.424571 <4>[ 1.606050] __driver_probe_device+0x78/0x11c
5887 01:54:48.427546 <4>[ 1.610662] driver_probe_device+0xd8/0x160
5888 01:54:48.433477 <4>[ 1.615100] __device_attach_driver+0xb8/0x134
5889 01:54:48.437428 <4>[ 1.619799] bus_for_each_drv+0x78/0xd0
5890 01:54:48.440341 <4>[ 1.623890] __device_attach+0xa8/0x1c0
5891 01:54:48.443509 <4>[ 1.627980] device_initial_probe+0x14/0x20
5892 01:54:48.450635 <4>[ 1.632419] bus_probe_device+0x9c/0xa4
5893 01:54:48.453882 <4>[ 1.636509] device_add+0x3d0/0x7cc
5894 01:54:48.457176 <4>[ 1.640251] __spi_add_device+0x78/0x120
5895 01:54:48.460204 <4>[ 1.644430] spi_add_device+0x40/0x7c
5896 01:54:48.466974 <4>[ 1.648347] spi_register_controller+0x610/0xad0
5897 01:54:48.470121 <4>[ 1.653220] devm_spi_register_controller+0x4c/0xa4
5898 01:54:48.473443 <4>[ 1.658353] mtk_spi_probe+0x3f8/0x650
5899 01:54:48.480276 <4>[ 1.662357] platform_probe+0x68/0xe0
5900 01:54:48.483352 <4>[ 1.666276] really_probe+0xbc/0x2e0
5901 01:54:48.487114 <4>[ 1.670106] __driver_probe_device+0x78/0x11c
5902 01:54:48.490592 <4>[ 1.674717] driver_probe_device+0xd8/0x160
5903 01:54:48.496962 <4>[ 1.679155] __driver_attach+0x94/0x19c
5904 01:54:48.500280 <4>[ 1.683246] bus_for_each_dev+0x70/0xd0
5905 01:54:48.503648 <4>[ 1.687336] driver_attach+0x24/0x30
5906 01:54:48.507177 <4>[ 1.691166] bus_add_driver+0x154/0x20c
5907 01:54:48.510487 <4>[ 1.695256] driver_register+0x78/0x130
5908 01:54:48.516956 <4>[ 1.699347] __platform_driver_register+0x28/0x34
5909 01:54:48.520643 <4>[ 1.704307] mtk_spi_driver_init+0x1c/0x28
5910 01:54:48.527194 <4>[ 1.708661] do_one_initcall+0x50/0x1d0
5911 01:54:48.530235 <4>[ 1.712751] kernel_init_freeable+0x21c/0x288
5912 01:54:48.533692 <4>[ 1.717364] kernel_init+0x24/0x12c
5913 01:54:48.536891 <4>[ 1.721109] ret_from_fork+0x10/0x20
5914 01:54:48.547875 <6>[ 1.730000] tun: Universal TUN/TAP device driver, 1.6
5915 01:54:48.551420 <6>[ 1.736292] thunder_xcv, ver 1.0
5916 01:54:48.554927 <6>[ 1.739810] thunder_bgx, ver 1.0
5917 01:54:48.557645 <6>[ 1.743316] nicpf, ver 1.0
5918 01:54:48.569184 <6>[ 1.747686] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5919 01:54:48.572274 <6>[ 1.755170] hns3: Copyright (c) 2017 Huawei Corporation.
5920 01:54:48.576014 <6>[ 1.760771] hclge is initializing
5921 01:54:48.582278 <6>[ 1.764361] e1000: Intel(R) PRO/1000 Network Driver
5922 01:54:48.589172 <6>[ 1.769495] e1000: Copyright (c) 1999-2006 Intel Corporation.
5923 01:54:48.592444 <6>[ 1.775520] e1000e: Intel(R) PRO/1000 Network Driver
5924 01:54:48.599123 <6>[ 1.780741] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5925 01:54:48.605413 <6>[ 1.786934] igb: Intel(R) Gigabit Ethernet Network Driver
5926 01:54:48.612043 <6>[ 1.792592] igb: Copyright (c) 2007-2014 Intel Corporation.
5927 01:54:48.618843 <6>[ 1.798437] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5928 01:54:48.622121 <6>[ 1.804960] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5929 01:54:48.629135 <6>[ 1.811513] sky2: driver version 1.30
5930 01:54:48.635770 <6>[ 1.816766] usbcore: registered new device driver r8152-cfgselector
5931 01:54:48.642488 <6>[ 1.823314] usbcore: registered new interface driver r8152
5932 01:54:48.645924 <6>[ 1.829149] VFIO - User Level meta-driver version: 0.3
5933 01:54:48.655342 <6>[ 1.836963] mtu3 11201000.usb: uwk - reg:0x420, version:101
5934 01:54:48.661518 <4>[ 1.842834] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5935 01:54:48.668458 <6>[ 1.850103] mtu3 11201000.usb: dr_mode: 1, drd: auto
5936 01:54:48.675207 <6>[ 1.855328] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5937 01:54:48.678286 <6>[ 1.861516] mtu3 11201000.usb: usb3-drd: 0
5938 01:54:48.688442 <6>[ 1.867085] mtu3 11201000.usb: xHCI platform device register success...
5939 01:54:48.694989 <4>[ 1.875723] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5940 01:54:48.701664 <6>[ 1.883655] xhci-mtk 11200000.usb: xHCI Host Controller
5941 01:54:48.708053 <6>[ 1.889162] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5942 01:54:48.715040 <6>[ 1.896881] xhci-mtk 11200000.usb: USB3 root hub has no ports
5943 01:54:48.724921 <6>[ 1.902889] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5944 01:54:48.731676 <6>[ 1.912314] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5945 01:54:48.738399 <6>[ 1.918391] xhci-mtk 11200000.usb: xHCI Host Controller
5946 01:54:48.744659 <6>[ 1.923878] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5947 01:54:48.751690 <6>[ 1.931537] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5948 01:54:48.754700 <6>[ 1.938395] hub 1-0:1.0: USB hub found
5949 01:54:48.757715 <6>[ 1.942424] hub 1-0:1.0: 1 port detected
5950 01:54:48.769077 <6>[ 1.947786] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5951 01:54:48.772838 <6>[ 1.956418] hub 2-0:1.0: USB hub found
5952 01:54:48.782550 <3>[ 1.960445] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5953 01:54:48.788962 <6>[ 1.968335] usbcore: registered new interface driver usb-storage
5954 01:54:48.795749 <6>[ 1.974941] usbcore: registered new device driver onboard-usb-hub
5955 01:54:48.810244 <4>[ 1.989402] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
5956 01:54:48.819600 <6>[ 2.001630] mt6397-rtc mt6358-rtc: registered as rtc0
5957 01:54:48.829959 <6>[ 2.007108] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-21T01:54:48 UTC (1718934888)
5958 01:54:48.832949 <6>[ 2.016994] i2c_dev: i2c /dev entries driver
5959 01:54:48.844484 <6>[ 2.023383] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5960 01:54:48.854594 <6>[ 2.031772] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5961 01:54:48.858025 <6>[ 2.040677] i2c 4-0058: Fixed dependency cycle(s) with /panel
5962 01:54:48.867787 <6>[ 2.046745] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
5963 01:54:48.884523 <6>[ 2.066279] cpu cpu0: EM: created perf domain
5964 01:54:48.893914 <6>[ 2.071765] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
5965 01:54:48.900829 <6>[ 2.083043] cpu cpu4: EM: created perf domain
5966 01:54:48.908083 <6>[ 2.090095] sdhci: Secure Digital Host Controller Interface driver
5967 01:54:48.914800 <6>[ 2.096549] sdhci: Copyright(c) Pierre Ossman
5968 01:54:48.921636 <6>[ 2.101956] Synopsys Designware Multimedia Card Interface Driver
5969 01:54:48.928281 <6>[ 2.102439] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
5970 01:54:48.930969 <6>[ 2.109018] sdhci-pltfm: SDHCI platform and OF driver helper
5971 01:54:48.940809 <6>[ 2.122554] ledtrig-cpu: registered to indicate activity on CPUs
5972 01:54:48.948745 <6>[ 2.130309] usbcore: registered new interface driver usbhid
5973 01:54:48.951152 <6>[ 2.136155] usbhid: USB HID core driver
5974 01:54:48.962446 <6>[ 2.140418] spi_master spi2: will run message pump with realtime priority
5975 01:54:48.965889 <4>[ 2.140423] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
5976 01:54:48.972987 <4>[ 2.154706] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
5977 01:54:48.986768 <6>[ 2.159661] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
5978 01:54:49.005127 <6>[ 2.177255] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
5979 01:54:49.011835 <4>[ 2.185445] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
5980 01:54:49.018785 <6>[ 2.198246] cros-ec-spi spi2.0: Chrome EC device registered
5981 01:54:49.025168 <4>[ 2.206218] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
5982 01:54:49.039373 <4>[ 2.218583] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
5983 01:54:49.046179 <4>[ 2.227647] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
5984 01:54:49.059741 <6>[ 2.238365] mmc1: new ultra high speed SDR104 SDIO card at address 0001
5985 01:54:49.084496 <6>[ 2.266226] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
5986 01:54:49.090603 <6>[ 2.272556] mmc0: new HS400 MMC card at address 0001
5987 01:54:49.097517 <6>[ 2.279715] mmcblk0: mmc0:0001 TB2932 29.2 GiB
5988 01:54:49.108056 <6>[ 2.290095] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
5989 01:54:49.115653 <6>[ 2.297596] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
5990 01:54:49.125638 <6>[ 2.299191] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
5991 01:54:49.129245 <6>[ 2.304263] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
5992 01:54:49.142318 <6>[ 2.305802] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
5993 01:54:49.152198 <6>[ 2.306148] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
5994 01:54:49.162540 <6>[ 2.317064] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5995 01:54:49.169087 <6>[ 2.329774] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
5996 01:54:49.175855 <6>[ 2.340483] NET: Registered PF_PACKET protocol family
5997 01:54:49.182745 <6>[ 2.361311] usb 1-1: new high-speed USB device number 2 using xhci-mtk
5998 01:54:49.185621 <6>[ 2.361578] 9pnet: Installing 9P2000 support
5999 01:54:49.189433 <5>[ 2.373028] Key type dns_resolver registered
6000 01:54:49.196308 <6>[ 2.378208] registered taskstats version 1
6001 01:54:49.199210 <5>[ 2.382578] Loading compiled-in X.509 certificates
6002 01:54:49.242926 <3>[ 2.421265] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6003 01:54:49.272548 <6>[ 2.447919] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6004 01:54:49.282678 <6>[ 2.461317] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6005 01:54:49.292497 <6>[ 2.469879] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6006 01:54:49.299087 <6>[ 2.478405] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6007 01:54:49.309407 <6>[ 2.486926] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6008 01:54:49.315931 <6>[ 2.495446] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6009 01:54:49.325823 <6>[ 2.503966] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6010 01:54:49.332217 <6>[ 2.512484] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6011 01:54:49.339594 <6>[ 2.516210] hub 1-1:1.0: USB hub found
6012 01:54:49.345575 <6>[ 2.521714] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6013 01:54:49.348843 <6>[ 2.525510] hub 1-1:1.0: 3 ports detected
6014 01:54:49.355798 <6>[ 2.532516] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6015 01:54:49.362018 <6>[ 2.543159] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6016 01:54:49.368786 <6>[ 2.550488] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6017 01:54:49.378851 <6>[ 2.557976] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6018 01:54:49.385953 <6>[ 2.566348] panfrost 13040000.gpu: clock rate = 511999970
6019 01:54:49.396065 <6>[ 2.572036] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6020 01:54:49.402277 <6>[ 2.582281] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6021 01:54:49.412681 <6>[ 2.590325] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6022 01:54:49.422331 <6>[ 2.598764] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6023 01:54:49.428892 <6>[ 2.610842] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6024 01:54:49.443454 <6>[ 2.622105] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6025 01:54:49.453926 <6>[ 2.631205] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6026 01:54:49.462988 <6>[ 2.640381] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6027 01:54:49.473165 <6>[ 2.649513] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6028 01:54:49.479728 <6>[ 2.658641] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6029 01:54:49.489676 <6>[ 2.667947] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6030 01:54:49.499904 <6>[ 2.677249] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6031 01:54:49.509842 <6>[ 2.686724] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6032 01:54:49.519452 <6>[ 2.696203] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6033 01:54:49.526196 <6>[ 2.705332] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6034 01:54:49.599667 <6>[ 2.778484] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6035 01:54:49.609932 <6>[ 2.787403] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6036 01:54:49.620906 <6>[ 2.799476] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6037 01:54:49.646600 <6>[ 2.825346] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6038 01:54:50.306780 <6>[ 3.017857] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6039 01:54:50.316690 <4>[ 3.134507] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6040 01:54:50.323344 <4>[ 3.134525] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6041 01:54:50.329873 <6>[ 3.174495] r8152 1-1.2:1.0 eth0: v1.12.13
6042 01:54:50.336643 <6>[ 3.253331] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6043 01:54:50.343128 <6>[ 3.469006] Console: switching to colour frame buffer device 170x48
6044 01:54:50.349781 <6>[ 3.529673] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6045 01:54:50.369901 <6>[ 3.545805] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6046 01:54:50.387017 <6>[ 3.562532] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6047 01:54:50.393729 <6>[ 3.574953] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6048 01:54:50.404807 <6>[ 3.583552] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6049 01:54:50.414437 <6>[ 3.589020] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6050 01:54:50.432924 <6>[ 3.607943] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6051 01:54:51.593821 <6>[ 4.775388] r8152 1-1.2:1.0 eth0: carrier on
6052 01:54:54.427078 <5>[ 4.801337] Sending DHCP requests .., OK
6053 01:54:54.433807 <6>[ 7.613798] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23
6054 01:54:54.437526 <6>[ 7.622235] IP-Config: Complete:
6055 01:54:54.450810 <6>[ 7.625801] device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1
6056 01:54:54.460345 <6>[ 7.636703] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)
6057 01:54:54.472569 <6>[ 7.650977] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6058 01:54:54.481064 <6>[ 7.650988] nameserver0=192.168.201.1
6059 01:54:54.489009 <6>[ 7.670699] clk: Disabling unused clocks
6060 01:54:54.493494 <6>[ 7.678633] ALSA device list:
6061 01:54:54.502387 <6>[ 7.684667] No soundcards found.
6062 01:54:54.511682 <6>[ 7.693632] Freeing unused kernel memory: 8512K
6063 01:54:54.518379 <6>[ 7.700766] Run /init as init process
6064 01:54:54.531609 Loading, please wait...
6065 01:54:54.567424 Starting systemd-udevd version 252.22-1~deb12u1
6066 01:54:54.880640 <3>[ 8.063085] thermal_sys: Failed to find 'trips' node
6067 01:54:54.887491 <3>[ 8.063196] mtk-scp 10500000.scp: invalid resource
6068 01:54:54.894138 <3>[ 8.068350] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6069 01:54:54.900665 <6>[ 8.073469] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6070 01:54:54.910882 <3>[ 8.073702] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6071 01:54:54.917387 <3>[ 8.073708] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6072 01:54:54.927391 <3>[ 8.073711] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6073 01:54:54.934607 <3>[ 8.073715] elan_i2c 2-0015: Error applying setting, reverse things back
6074 01:54:54.945023 <3>[ 8.080706] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6075 01:54:54.952020 <6>[ 8.089261] remoteproc remoteproc0: scp is available
6076 01:54:54.958198 <4>[ 8.098269] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6077 01:54:54.964776 <6>[ 8.098788] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6078 01:54:54.976176 <4>[ 8.105148] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6079 01:54:54.986350 <3>[ 8.106809] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6080 01:54:54.993084 <3>[ 8.106826] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6081 01:54:55.002906 <3>[ 8.106831] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6082 01:54:55.006007 <3>[ 8.124253] thermal_sys: Failed to find 'trips' node
6083 01:54:55.012952 <6>[ 8.132178] remoteproc remoteproc0: powering up scp
6084 01:54:55.019699 <4>[ 8.132211] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6085 01:54:55.029233 <3>[ 8.137434] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6086 01:54:55.036203 <3>[ 8.144967] remoteproc remoteproc0: request_firmware failed: -2
6087 01:54:55.039099 <6>[ 8.155073] Bluetooth: Core ver 2.22
6088 01:54:55.046092 <4>[ 8.155127] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6089 01:54:55.055872 <4>[ 8.155220] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6090 01:54:55.062320 <3>[ 8.163420] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6091 01:54:55.073091 <3>[ 8.172591] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6092 01:54:55.075892 <6>[ 8.173222] NET: Registered PF_BLUETOOTH protocol family
6093 01:54:55.082464 <6>[ 8.173226] Bluetooth: HCI device and connection manager initialized
6094 01:54:55.089182 <6>[ 8.173239] Bluetooth: HCI socket layer initialized
6095 01:54:55.096708 <6>[ 8.173243] Bluetooth: L2CAP socket layer initialized
6096 01:54:55.102487 <6>[ 8.173251] Bluetooth: SCO socket layer initialized
6097 01:54:55.109688 <4>[ 8.180375] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6098 01:54:55.119440 <4>[ 8.182141] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6099 01:54:55.129423 <3>[ 8.188960] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6100 01:54:55.132614 <6>[ 8.195203] mc: Linux media interface: v0.10
6101 01:54:55.146896 <6>[ 8.198429] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6102 01:54:55.153194 <3>[ 8.199312] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6103 01:54:55.166307 <6>[ 8.201242] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6104 01:54:55.173040 <5>[ 8.203490] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6105 01:54:55.184221 <5>[ 8.221573] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6106 01:54:55.189934 <3>[ 8.223149] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6107 01:54:55.199900 <5>[ 8.227444] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6108 01:54:55.210261 <3>[ 8.234324] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6109 01:54:55.222996 <3>[ 8.238683] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6110 01:54:55.229807 <6>[ 8.238706] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6111 01:54:55.239597 <4>[ 8.241625] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6112 01:54:55.246208 <6>[ 8.247615] cs_system_cfg: CoreSight Configuration manager initialised
6113 01:54:55.253138 <6>[ 8.248715] videodev: Linux video capture interface: v2.00
6114 01:54:55.262928 <3>[ 8.250132] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6115 01:54:55.270012 <6>[ 8.258663] cfg80211: failed to load regulatory.db
6116 01:54:55.279402 <6>[ 8.285413] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6117 01:54:55.307314 <6>[ 8.485845] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6118 01:54:55.317216 <3>[ 8.486128] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6119 01:54:55.327192 <6>[ 8.493989] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6120 01:54:55.338236 <3>[ 8.516175] debugfs: File 'Playback' in directory 'dapm' already present!
6121 01:54:55.344720 <6>[ 8.516905] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6122 01:54:55.350893 <3>[ 8.523727] debugfs: File 'Capture' in directory 'dapm' already present!
6123 01:54:55.360927 <6>[ 8.531842] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6124 01:54:55.364281 <6>[ 8.532531] Bluetooth: HCI UART driver ver 2.3
6125 01:54:55.370988 <6>[ 8.532537] Bluetooth: HCI UART protocol H4 registered
6126 01:54:55.374452 <6>[ 8.532581] Bluetooth: HCI UART protocol LL registered
6127 01:54:55.381395 <6>[ 8.532602] Bluetooth: HCI UART protocol Three-wire (H5) registered
6128 01:54:55.388450 <6>[ 8.532990] Bluetooth: HCI UART protocol Broadcom registered
6129 01:54:55.396457 <6>[ 8.533021] Bluetooth: HCI UART protocol QCA registered
6130 01:54:55.403701 <6>[ 8.533036] Bluetooth: HCI UART protocol Marvell registered
6131 01:54:55.411683 <6>[ 8.533910] Bluetooth: hci0: setting up ROME/QCA6390
6132 01:54:55.421328 <6>[ 8.540555] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6133 01:54:55.431697 <6>[ 8.546760] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6134 01:54:55.438263 <6>[ 8.548429] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6135 01:54:55.444452 <6>[ 8.564635] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6136 01:54:55.455053 <6>[ 8.567380] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6137 01:54:55.461418 <6>[ 8.567600] usbcore: registered new interface driver uvcvideo
6138 01:54:55.473315 <6>[ 8.592141] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6139 01:54:55.482337 <6>[ 8.594433] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6140 01:54:55.495036 <6>[ 8.594526] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6141 01:54:55.506264 <6>[ 8.595017] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video2
6142 01:54:55.516697 <6>[ 8.599173] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6143 01:54:55.527644 <6>[ 8.609974] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6144 01:54:55.538175 <6>[ 8.610417] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6145 01:54:55.553517 <6>[ 8.618234] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6146 01:54:55.564087 <6>[ 8.624121] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6147 01:54:55.574986 <4>[ 8.635568] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6148 01:54:55.581253 <4>[ 8.635568] Fallback method does not support PEC.
6149 01:54:55.588496 Begin: Loading essential drivers<3>[ 8.751392] Bluetooth: hci0: Frame reassembly failed (-84)
6150 01:54:55.591961 ... done.
6151 01:54:55.594976 Begin: Running /scripts/init-premount ... done.
6152 01:54:55.601946 Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
6153 01:54:55.611848 Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
6154 01:54:55.612408 Device /sys/class/net/eth0 found
6155 01:54:55.614742 done.
6156 01:54:55.628904 <3>[ 8.807412] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6157 01:54:55.647094 <3>[ 8.825071] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6158 01:54:55.660954 Begin: Waiting up to 180 secs for any network device to become a<6>[ 8.841058] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6159 01:54:55.664246 vailable ... done.
6160 01:54:55.715474 IP-Config: eth0 hardware address 00:e0:4c:71:a7:1f mtu 1500 DHCP
6161 01:54:55.723363 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6162 01:54:55.730183 address: 192.168.201.23 broadcast: 192.168.201.255 netmask: 255.255.255.0
6163 01:54:55.736540 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6164 01:54:55.743140 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-3
6165 01:54:55.750141 domain : lava-rack
6166 01:54:55.753027 rootserver: 192.168.201.1 rootpath:
6167 01:54:55.756344 filename :
6168 01:54:55.847195 <6>[ 9.029929] Bluetooth: hci0: QCA Product ID :0x00000008
6169 01:54:55.855139 <6>[ 9.037644] Bluetooth: hci0: QCA SOC Version :0x00000044
6170 01:54:55.862558 <6>[ 9.045176] Bluetooth: hci0: QCA ROM Version :0x00000302
6171 01:54:55.870289 <6>[ 9.052660] Bluetooth: hci0: QCA Patch Version:0x00000111
6172 01:54:55.877687 <6>[ 9.060112] Bluetooth: hci0: QCA controller version 0x00440302
6173 01:54:55.888579 <6>[ 9.067976] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6174 01:54:55.898856 <4>[ 9.076572] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6175 01:54:55.898940 done.
6176 01:54:55.909327 <3>[ 9.087675] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6177 01:54:55.919344 Begin: Running /scripts/nfs-bott<3>[ 9.097703] Bluetooth: hci0: QCA Failed to download patch (-2)
6178 01:54:55.919768 om ... done.
6179 01:54:55.927093 Begin: Running /scripts/init-bottom ... done.
6180 01:54:56.014877 <6>[ 9.193944] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6181 01:54:56.094478 <4>[ 9.273471] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6182 01:54:56.113319 <4>[ 9.291962] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6183 01:54:56.128169 <4>[ 9.307064] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6184 01:54:56.137931 <4>[ 9.320074] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6185 01:54:57.275877 <6>[ 10.457376] NET: Registered PF_INET6 protocol family
6186 01:54:57.287083 <6>[ 10.469372] Segment Routing with IPv6
6187 01:54:57.290744 <6>[ 10.475031] In-situ OAM (IOAM) with IPv6
6188 01:54:57.472104 <30>[ 10.627717] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6189 01:54:57.493544 <30>[ 10.675490] systemd[1]: Detected architecture arm64.
6190 01:54:57.506030
6191 01:54:57.509085 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6192 01:54:57.509551
6193 01:54:57.535129 <30>[ 10.717428] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6194 01:54:58.701624 <30>[ 11.880182] systemd[1]: Queued start job for default target graphical.target.
6195 01:54:58.739729 <30>[ 11.918888] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6196 01:54:58.753843 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6197 01:54:58.772388 <30>[ 11.951428] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6198 01:54:58.785964 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6199 01:54:58.805374 <30>[ 11.983876] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6200 01:54:58.819441 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6201 01:54:58.836393 <30>[ 12.015046] systemd[1]: Created slice user.slice - User and Session Slice.
6202 01:54:58.848860 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6203 01:54:58.870934 <30>[ 12.045934] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6204 01:54:58.883612 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6205 01:54:58.906682 <30>[ 12.081741] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6206 01:54:58.918628 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6207 01:54:58.945535 <30>[ 12.113683] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6208 01:54:58.964735 <30>[ 12.142848] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6209 01:54:58.972023 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6210 01:54:58.990601 <30>[ 12.169472] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6211 01:54:59.004015 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6212 01:54:59.023340 <30>[ 12.201567] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6213 01:54:59.037135 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6214 01:54:59.051709 <30>[ 12.233591] systemd[1]: Reached target paths.target - Path Units.
6215 01:54:59.066440 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6216 01:54:59.082752 <30>[ 12.261539] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6217 01:54:59.095196 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6218 01:54:59.107938 <30>[ 12.289472] systemd[1]: Reached target slices.target - Slice Units.
6219 01:54:59.122485 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6220 01:54:59.135577 <30>[ 12.317514] systemd[1]: Reached target swap.target - Swaps.
6221 01:54:59.146279 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6222 01:54:59.167205 <30>[ 12.345559] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6223 01:54:59.180631 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6224 01:54:59.199216 <30>[ 12.377978] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6225 01:54:59.212649 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6226 01:54:59.234941 <30>[ 12.413479] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6227 01:54:59.248623 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6228 01:54:59.268746 <30>[ 12.447194] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6229 01:54:59.282641 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6230 01:54:59.299306 <30>[ 12.478221] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6231 01:54:59.311982 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6232 01:54:59.333423 <30>[ 12.512227] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6233 01:54:59.347875 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6234 01:54:59.370111 <30>[ 12.548481] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6235 01:54:59.383328 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6236 01:54:59.399440 <30>[ 12.578065] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6237 01:54:59.412566 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6238 01:54:59.455562 <30>[ 12.633664] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6239 01:54:59.466192 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6240 01:54:59.487879 <30>[ 12.666810] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6241 01:54:59.501063 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6242 01:54:59.523853 <30>[ 12.702265] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6243 01:54:59.535470 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6244 01:54:59.558059 <30>[ 12.730181] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6245 01:54:59.612171 <30>[ 12.790705] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6246 01:54:59.625139 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6247 01:54:59.649155 <30>[ 12.827864] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6248 01:54:59.660380 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6249 01:54:59.688418 <30>[ 12.867036] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6250 01:54:59.701078 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6251 01:54:59.727338 <30>[ 12.905974] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6252 01:54:59.738804 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6253 01:54:59.759430 <6>[ 12.938412] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6254 01:54:59.791404 <30>[ 12.970292] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6255 01:54:59.805224 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6256 01:54:59.829597 <30>[ 13.008360] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6257 01:54:59.842922 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6258 01:54:59.879630 <30>[ 13.058377] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6259 01:54:59.892203 Starting [0;1;39mmodprobe@loop.ser…e<6>[ 13.074508] fuse: init (API version 7.37)
6260 01:54:59.895431 [0m - Load Kernel Module loop...
6261 01:54:59.925086 <30>[ 13.103741] systemd[1]: Starting systemd-journald.service - Journal Service...
6262 01:54:59.934588 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6263 01:54:59.962223 <30>[ 13.140991] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6264 01:54:59.972727 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6265 01:54:59.998578 <30>[ 13.173980] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6266 01:55:00.009019 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6267 01:55:00.071017 <30>[ 13.249963] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6268 01:55:00.082845 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6269 01:55:00.104545 <30>[ 13.282355] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6270 01:55:00.111350 <3>[ 13.286425] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6271 01:55:00.130265 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices..<3>[ 13.307857] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6272 01:55:00.130985 .
6273 01:55:00.147504 <3>[ 13.325683] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6274 01:55:00.161622 <3>[ 13.340274] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6275 01:55:00.168568 <30>[ 13.342169] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6276 01:55:00.179524 <3>[ 13.357283] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6277 01:55:00.194352 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - H<3>[ 13.374192] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6278 01:55:00.198190 uge Pages File System.
6279 01:55:00.212261 <3>[ 13.390127] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6280 01:55:00.219440 <30>[ 13.399320] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6281 01:55:00.229247 <3>[ 13.406216] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6282 01:55:00.242263 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6283 01:55:00.263309 <30>[ 13.442097] systemd[1]: Started systemd-journald.service - Journal Service.
6284 01:55:00.275157 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6285 01:55:00.298300 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6286 01:55:00.316014 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6287 01:55:00.339427 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6288 01:55:00.361965 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6289 01:55:00.382428 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6290 01:55:00.405381 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6291 01:55:00.426094 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6292 01:55:00.450008 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6293 01:55:00.473615 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6294 01:55:00.497110 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6295 01:55:00.520829 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6296 01:55:00.540389 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6297 01:55:00.579136 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6298 01:55:00.600099 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6299 01:55:00.622111 <4>[ 13.794391] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6300 01:55:00.633463 <3>[ 13.812080] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6301 01:55:00.646701 <4>[ 13.828574] power_supply_show_property: 3 callbacks suppressed
6302 01:55:00.656913 <3>[ 13.828584] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6303 01:55:00.667732 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6304 01:55:00.674231 <3>[ 13.853222] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6305 01:55:00.691604 Startin<3>[ 13.870300] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6306 01:55:00.697924 g [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6307 01:55:00.709247 <3>[ 13.888067] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6308 01:55:00.729525 Starting [0;1;39msyste<3>[ 13.906123] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6309 01:55:00.733088 md-sysctl.se…ce[0m - Apply Kernel Variables...
6310 01:55:00.745887 <3>[ 13.924009] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6311 01:55:00.762782 Starting [0;1;39msystemd-sysusers.…r<3>[ 13.939796] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6312 01:55:00.765753 vice[0m - Create System Users...
6313 01:55:00.779041 <3>[ 13.957632] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6314 01:55:00.796163 <3>[ 13.974536] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6315 01:55:00.814342 [[0;32m OK [0m] Finished [0<3>[ 13.991498] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6316 01:55:00.817754 ;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6317 01:55:00.829587 <46>[ 14.007825] systemd-journald[319]: Received client request to flush runtime journal.
6318 01:55:00.839517 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6319 01:55:00.860225 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6320 01:55:00.884536 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6321 01:55:00.908834 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6322 01:55:00.933078 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6323 01:55:00.976233 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6324 01:55:02.279737 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6325 01:55:02.312031 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6326 01:55:02.332172 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6327 01:55:02.351252 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6328 01:55:02.392014 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6329 01:55:02.418138 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6330 01:55:02.682960 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6331 01:55:02.743422 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6332 01:55:02.788637 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6333 01:55:03.040793 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6334 01:55:03.062720 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6335 01:55:03.127477 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6336 01:55:03.165254 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6337 01:55:03.184245 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6338 01:55:03.236159 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6339 01:55:03.351044 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6340 01:55:03.373204 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6341 01:55:03.394679 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6342 01:55:03.440146 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6343 01:55:03.493487 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6344 01:55:03.508575 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6345 01:55:03.571389 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6346 01:55:03.595030 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6347 01:55:03.616726 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6348 01:55:03.670281 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6349 01:55:03.694675 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6350 01:55:03.717472 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6351 01:55:03.741214 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6352 01:55:03.765961 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6353 01:55:03.789438 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6354 01:55:03.814138 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6355 01:55:03.839294 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6356 01:55:03.859423 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6357 01:55:03.876496 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6358 01:55:03.899918 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6359 01:55:03.928247 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6360 01:55:03.947327 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6361 01:55:03.962936 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6362 01:55:03.987974 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6363 01:55:04.007717 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6364 01:55:04.028640 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6365 01:55:04.071656 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6366 01:55:04.092710 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6367 01:55:04.126785 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6368 01:55:04.212768 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6369 01:55:04.238533 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6370 01:55:04.262440 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6371 01:55:04.279336 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6372 01:55:04.421882 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6373 01:55:04.467428 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6374 01:55:04.494233 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6375 01:55:04.512408 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6376 01:55:04.546213 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6377 01:55:04.571056 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6378 01:55:04.593218 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6379 01:55:04.619529 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6380 01:55:04.636262 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6381 01:55:04.678704 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6382 01:55:04.744728 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6383 01:55:04.820907
6384 01:55:04.823779 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6385 01:55:04.824195
6386 01:55:04.827514 debian-bookworm-arm64 login: root (automatic login)
6387 01:55:04.827930
6388 01:55:05.151288 Linux debian-bookworm-arm64 6.1.94-cip23 #1 SMP PREEMPT Fri Jun 21 00:04:56 UTC 2024 aarch64
6389 01:55:05.151505
6390 01:55:05.157839 The programs included with the Debian GNU/Linux system are free software;
6391 01:55:05.164779 the exact distribution terms for each program are described in the
6392 01:55:05.167939 individual files in /usr/share/doc/*/copyright.
6393 01:55:05.168177
6394 01:55:05.175191 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6395 01:55:05.178319 permitted by applicable law.
6396 01:55:06.399985 Matched prompt #10: / #
6398 01:55:06.401242 Setting prompt string to ['/ #']
6399 01:55:06.401722 end: 2.2.5.1 login-action (duration 00:00:20) [common]
6401 01:55:06.402940 end: 2.2.5 auto-login-action (duration 00:00:20) [common]
6402 01:55:06.403475 start: 2.2.6 expect-shell-connection (timeout 00:03:43) [common]
6403 01:55:06.403897 Setting prompt string to ['/ #']
6404 01:55:06.404218 Forcing a shell prompt, looking for ['/ #']
6406 01:55:06.455029 / #
6407 01:55:06.455692 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6408 01:55:06.456211 Waiting using forced prompt support (timeout 00:02:30)
6409 01:55:06.461304
6410 01:55:06.462231 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6411 01:55:06.462770 start: 2.2.7 export-device-env (timeout 00:03:43) [common]
6413 01:55:06.564081 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14479143/extract-nfsrootfs-sovqjz2d'
6414 01:55:06.570111 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14479143/extract-nfsrootfs-sovqjz2d'
6416 01:55:06.671877 / # export NFS_SERVER_IP='192.168.201.1'
6417 01:55:06.678596 export NFS_SERVER_IP='192.168.201.1'
6418 01:55:06.679518 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6419 01:55:06.680050 end: 2.2 depthcharge-retry (duration 00:01:17) [common]
6420 01:55:06.680540 end: 2 depthcharge-action (duration 00:01:17) [common]
6421 01:55:06.681045 start: 3 lava-test-retry (timeout 00:08:05) [common]
6422 01:55:06.681547 start: 3.1 lava-test-shell (timeout 00:08:05) [common]
6423 01:55:06.681966 Using namespace: common
6425 01:55:06.783384 / # #
6426 01:55:06.784022 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6427 01:55:06.789782 #
6428 01:55:06.790655 Using /lava-14479143
6430 01:55:06.891858 / # export SHELL=/bin/bash
6431 01:55:06.898511 export SHELL=/bin/bash
6433 01:55:07.000140 / # . /lava-14479143/environment
6434 01:55:07.006719 . /lava-14479143/environment
6436 01:55:07.114036 / # /lava-14479143/bin/lava-test-runner /lava-14479143/0
6437 01:55:07.114712 Test shell timeout: 10s (minimum of the action and connection timeout)
6438 01:55:07.120932 /lava-14479143/bin/lava-test-runner /lava-14479143/0
6439 01:55:07.407387 + export TESTRUN_ID=0_timesync-off
6440 01:55:07.410673 + TESTRUN_ID=0_timesync-off
6441 01:55:07.413946 + cd /lava-14479143/0/tests/0_timesync-off
6442 01:55:07.417338 ++ cat uuid
6443 01:55:07.422989 + UUID=14479143_1.6.2.3.1
6444 01:55:07.423399 + set +x
6445 01:55:07.429322 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14479143_1.6.2.3.1>
6446 01:55:07.430052 Received signal: <STARTRUN> 0_timesync-off 14479143_1.6.2.3.1
6447 01:55:07.430424 Starting test lava.0_timesync-off (14479143_1.6.2.3.1)
6448 01:55:07.430832 Skipping test definition patterns.
6449 01:55:07.433063 + systemctl stop systemd-timesyncd
6450 01:55:07.517074 + set +x
6451 01:55:07.520314 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14479143_1.6.2.3.1>
6452 01:55:07.521008 Received signal: <ENDRUN> 0_timesync-off 14479143_1.6.2.3.1
6453 01:55:07.521488 Ending use of test pattern.
6454 01:55:07.521831 Ending test lava.0_timesync-off (14479143_1.6.2.3.1), duration 0.09
6456 01:55:07.602007 + export TESTRUN_ID=1_kselftest-tpm2
6457 01:55:07.605363 + TESTRUN_ID=1_kselftest-tpm2
6458 01:55:07.611846 + cd /lava-14479143/0/tests/1_kselftest-tpm2
6459 01:55:07.612404 ++ cat uuid
6460 01:55:07.618570 + UUID=14479143_1.6.2.3.5
6461 01:55:07.619071 + set +x
6462 01:55:07.624787 <LAVA_SIGNAL_STARTRUN 1_kselftest-tpm2 14479143_1.6.2.3.5>
6463 01:55:07.625651 Received signal: <STARTRUN> 1_kselftest-tpm2 14479143_1.6.2.3.5
6464 01:55:07.626151 Starting test lava.1_kselftest-tpm2 (14479143_1.6.2.3.5)
6465 01:55:07.626718 Skipping test definition patterns.
6466 01:55:07.628133 + cd ./automated/linux/kselftest/
6467 01:55:07.654537 + ./kselftest.sh -c tpm2 -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1
6468 01:55:07.699661 INFO: install_deps skipped
6469 01:55:08.208494 --2024-06-21 01:55:08-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
6470 01:55:08.226063 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6471 01:55:08.356620 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6472 01:55:08.489516 HTTP request sent, awaiting response... 200 OK
6473 01:55:08.492911 Length: 1642760 (1.6M) [application/octet-stream]
6474 01:55:08.496097 Saving to: 'kselftest_armhf.tar.gz'
6475 01:55:08.496646
6476 01:55:08.497000
6477 01:55:08.747750 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6478 01:55:09.006695 kselftest_armhf.tar 2%[ ] 46.39K 176KB/s
6479 01:55:09.265799 kselftest_armhf.tar 13%[=> ] 214.67K 406KB/s
6480 01:55:09.485745 kselftest_armhf.tar 55%[==========> ] 893.42K 1.10MB/s
6481 01:55:09.746468 kselftest_armhf.tar 80%[===============> ] 1.27M 1.24MB/s
6482 01:55:10.004869 kselftest_armhf.tar 81%[===============> ] 1.27M 1015KB/s
6483 01:55:10.262726 kselftest_armhf.tar 81%[===============> ] 1.28M 849KB/s
6484 01:55:10.522222 kselftest_armhf.tar 86%[================> ] 1.35M 763KB/s
6485 01:55:10.528471 kselftest_armhf.tar 99%[==================> ] 1.56M 772KB/s
6486 01:55:10.535046 kselftest_armhf.tar 100%[===================>] 1.57M 773KB/s in 2.1s
6487 01:55:10.535594
6488 01:55:10.675713 2024-06-21 01:55:10 (773 KB/s) - 'kselftest_armhf.tar.gz' saved [1642760/1642760]
6489 01:55:10.676357
6490 01:55:16.070805 skiplist:
6491 01:55:16.073914 ========================================
6492 01:55:16.077227 ========================================
6493 01:55:16.129390 tpm2:test_smoke.sh
6494 01:55:16.132529 tpm2:test_space.sh
6495 01:55:16.151173 ============== Tests to run ===============
6496 01:55:16.154695 tpm2:test_smoke.sh
6497 01:55:16.155230 tpm2:test_space.sh
6498 01:55:16.161302 ===========End Tests to run ===============
6499 01:55:16.164646 shardfile-tpm2 pass
6500 01:55:16.294974 <12>[ 29.476463] kselftest: Running tests in tpm2
6501 01:55:16.305039 TAP version 13
6502 01:55:16.320805 1..2
6503 01:55:16.359331 # selftests: tpm2: test_smoke.sh
6504 01:55:18.326982 # test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite) ... ERROR
6505 01:55:18.333464 # test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp) ... ERROR
6506 01:55:18.340285 # Exception ignored in: <function Client.__del__ at 0xffff811eccc0>
6507 01:55:18.343598 # Traceback (most recent call last):
6508 01:55:18.354030 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6509 01:55:18.354579 # if self.tpm:
6510 01:55:18.357121 # ^^^^^^^^
6511 01:55:18.360355 # AttributeError: 'Client' object has no attribute 'tpm'
6512 01:55:18.366847 # test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth) ... ERROR
6513 01:55:18.373533 # Exception ignored in: <function Client.__del__ at 0xffff811eccc0>
6514 01:55:18.377625 # Traceback (most recent call last):
6515 01:55:18.387133 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6516 01:55:18.390799 # if self.tpm:
6517 01:55:18.391389 # ^^^^^^^^
6518 01:55:18.397413 # AttributeError: 'Client' object has no attribute 'tpm'
6519 01:55:18.404010 # test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy) ... ERROR
6520 01:55:18.410551 # Exception ignored in: <function Client.__del__ at 0xffff811eccc0>
6521 01:55:18.411119 # Traceback (most recent call last):
6522 01:55:18.420956 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6523 01:55:18.424177 # if self.tpm:
6524 01:55:18.424867 # ^^^^^^^^
6525 01:55:18.430616 # AttributeError: 'Client' object has no attribute 'tpm'
6526 01:55:18.438072 # test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth) ... ERROR
6527 01:55:18.444257 # Exception ignored in: <function Client.__del__ at 0xffff811eccc0>
6528 01:55:18.447444 # Traceback (most recent call last):
6529 01:55:18.457197 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6530 01:55:18.461166 # if self.tpm:
6531 01:55:18.461787 # ^^^^^^^^
6532 01:55:18.467370 # AttributeError: 'Client' object has no attribute 'tpm'
6533 01:55:18.474434 # test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds) ... ERROR
6534 01:55:18.481185 # Exception ignored in: <function Client.__del__ at 0xffff811eccc0>
6535 01:55:18.481702 # Traceback (most recent call last):
6536 01:55:18.490939 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6537 01:55:18.494680 # if self.tpm:
6538 01:55:18.495277 # ^^^^^^^^
6539 01:55:18.500974 # AttributeError: 'Client' object has no attribute 'tpm'
6540 01:55:18.507835 # test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd) ... ERROR
6541 01:55:18.514257 # Exception ignored in: <function Client.__del__ at 0xffff811eccc0>
6542 01:55:18.517458 # Traceback (most recent call last):
6543 01:55:18.528102 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6544 01:55:18.528624 # if self.tpm:
6545 01:55:18.531160 # ^^^^^^^^
6546 01:55:18.534822 # AttributeError: 'Client' object has no attribute 'tpm'
6547 01:55:18.544843 # test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth) ... ERROR
6548 01:55:18.551058 # Exception ignored in: <function Client.__del__ at 0xffff811eccc0>
6549 01:55:18.554520 # Traceback (most recent call last):
6550 01:55:18.564667 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6551 01:55:18.565217 # if self.tpm:
6552 01:55:18.568162 # ^^^^^^^^
6553 01:55:18.571843 # AttributeError: 'Client' object has no attribute 'tpm'
6554 01:55:18.581299 # test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy) ... ERROR
6555 01:55:18.584536 # Exception ignored in: <function Client.__del__ at 0xffff811eccc0>
6556 01:55:18.588068 # Traceback (most recent call last):
6557 01:55:18.598110 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6558 01:55:18.601596 # if self.tpm:
6559 01:55:18.602061 # ^^^^^^^^
6560 01:55:18.608206 # AttributeError: 'Client' object has no attribute 'tpm'
6561 01:55:18.608643 #
6562 01:55:18.614616 # ======================================================================
6563 01:55:18.621552 # ERROR: test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite)
6564 01:55:18.628545 # ----------------------------------------------------------------------
6565 01:55:18.631276 # Traceback (most recent call last):
6566 01:55:18.641766 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 16, in setUp
6567 01:55:18.648127 # self.root_key = self.client.create_root_key()
6568 01:55:18.652033 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6569 01:55:18.661320 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6570 01:55:18.668013 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6571 01:55:18.672012 # ^^^^^^^^^^^^^^^^^^
6572 01:55:18.681649 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6573 01:55:18.685076 # raise ProtocolError(cc, rc)
6574 01:55:18.691418 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6575 01:55:18.691966 #
6576 01:55:18.698224 # ======================================================================
6577 01:55:18.704792 # ERROR: test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp)
6578 01:55:18.711265 # ----------------------------------------------------------------------
6579 01:55:18.714963 # Traceback (most recent call last):
6580 01:55:18.724599 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6581 01:55:18.727837 # self.client = tpm2.Client()
6582 01:55:18.731054 # ^^^^^^^^^^^^^
6583 01:55:18.741087 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6584 01:55:18.744626 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6585 01:55:18.751261 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6586 01:55:18.754953 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6587 01:55:18.757773 #
6588 01:55:18.761517 # ======================================================================
6589 01:55:18.768423 # ERROR: test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth)
6590 01:55:18.775502 # ----------------------------------------------------------------------
6591 01:55:18.778047 # Traceback (most recent call last):
6592 01:55:18.788410 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6593 01:55:18.793205 # self.client = tpm2.Client()
6594 01:55:18.796724 # ^^^^^^^^^^^^^
6595 01:55:18.804864 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6596 01:55:18.811271 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6597 01:55:18.814143 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6598 01:55:18.820575 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6599 01:55:18.821075 #
6600 01:55:18.827404 # ======================================================================
6601 01:55:18.834053 # ERROR: test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy)
6602 01:55:18.840328 # ----------------------------------------------------------------------
6603 01:55:18.844078 # Traceback (most recent call last):
6604 01:55:18.853999 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6605 01:55:18.857521 # self.client = tpm2.Client()
6606 01:55:18.860533 # ^^^^^^^^^^^^^
6607 01:55:18.870564 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6608 01:55:18.873755 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6609 01:55:18.881039 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6610 01:55:18.884035 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6611 01:55:18.884461 #
6612 01:55:18.890820 # ======================================================================
6613 01:55:18.900750 # ERROR: test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth)
6614 01:55:18.907352 # ----------------------------------------------------------------------
6615 01:55:18.910403 # Traceback (most recent call last):
6616 01:55:18.920847 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6617 01:55:18.923864 # self.client = tpm2.Client()
6618 01:55:18.927804 # ^^^^^^^^^^^^^
6619 01:55:18.937371 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6620 01:55:18.940451 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6621 01:55:18.944024 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6622 01:55:18.950596 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6623 01:55:18.951103 #
6624 01:55:18.956944 # ======================================================================
6625 01:55:18.964385 # ERROR: test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds)
6626 01:55:18.970537 # ----------------------------------------------------------------------
6627 01:55:18.973804 # Traceback (most recent call last):
6628 01:55:18.983669 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6629 01:55:18.987764 # self.client = tpm2.Client()
6630 01:55:18.990386 # ^^^^^^^^^^^^^
6631 01:55:19.000575 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6632 01:55:19.004080 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6633 01:55:19.007437 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6634 01:55:19.014114 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6635 01:55:19.014684 #
6636 01:55:19.020436 # ======================================================================
6637 01:55:19.027114 # ERROR: test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd)
6638 01:55:19.033573 # ----------------------------------------------------------------------
6639 01:55:19.037099 # Traceback (most recent call last):
6640 01:55:19.047609 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6641 01:55:19.050868 # self.client = tpm2.Client()
6642 01:55:19.054025 # ^^^^^^^^^^^^^
6643 01:55:19.064240 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6644 01:55:19.067219 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6645 01:55:19.074333 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6646 01:55:19.077370 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6647 01:55:19.077829 #
6648 01:55:19.083846 # ======================================================================
6649 01:55:19.093753 # ERROR: test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth)
6650 01:55:19.097288 # ----------------------------------------------------------------------
6651 01:55:19.100766 # Traceback (most recent call last):
6652 01:55:19.113882 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6653 01:55:19.114412 # self.client = tpm2.Client()
6654 01:55:19.117708 # ^^^^^^^^^^^^^
6655 01:55:19.127245 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6656 01:55:19.134154 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6657 01:55:19.137505 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6658 01:55:19.144048 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6659 01:55:19.144601 #
6660 01:55:19.150414 # ======================================================================
6661 01:55:19.157459 # ERROR: test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy)
6662 01:55:19.164078 # ----------------------------------------------------------------------
6663 01:55:19.167387 # Traceback (most recent call last):
6664 01:55:19.177177 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6665 01:55:19.180612 # self.client = tpm2.Client()
6666 01:55:19.183941 # ^^^^^^^^^^^^^
6667 01:55:19.193988 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6668 01:55:19.200746 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6669 01:55:19.204109 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6670 01:55:19.210568 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6671 01:55:19.210978 #
6672 01:55:19.217567 # ----------------------------------------------------------------------
6673 01:55:19.218069 # Ran 9 tests in 0.070s
6674 01:55:19.218394 #
6675 01:55:19.220777 # FAILED (errors=9)
6676 01:55:19.224061 # test_async (tpm2_tests.AsyncTest.test_async) ... ok
6677 01:55:19.234303 # test_flush_invalid_context (tpm2_tests.AsyncTest.test_flush_invalid_context) ... ok
6678 01:55:19.234799 #
6679 01:55:19.240838 # ----------------------------------------------------------------------
6680 01:55:19.241406 # Ran 2 tests in 0.035s
6681 01:55:19.241742 #
6682 01:55:19.244361 # OK
6683 01:55:19.247542 ok 1 selftests: tpm2: test_smoke.sh
6684 01:55:19.247992 # selftests: tpm2: test_space.sh
6685 01:55:19.278097 # test_flush_context (tpm2_tests.SpaceTest.test_flush_context) ... ERROR
6686 01:55:19.292061 # test_get_handles (tpm2_tests.SpaceTest.test_get_handles) ... ERROR
6687 01:55:19.307612 # test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc) ... ERROR
6688 01:55:19.324971 # test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces) ... ERROR
6689 01:55:19.328574 #
6690 01:55:19.334709 # ======================================================================
6691 01:55:19.338615 # ERROR: test_flush_context (tpm2_tests.SpaceTest.test_flush_context)
6692 01:55:19.344962 # ----------------------------------------------------------------------
6693 01:55:19.348327 # Traceback (most recent call last):
6694 01:55:19.361682 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 261, in test_flush_context
6695 01:55:19.364927 # root1 = space1.create_root_key()
6696 01:55:19.368165 # ^^^^^^^^^^^^^^^^^^^^^^^^
6697 01:55:19.378537 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6698 01:55:19.385142 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6699 01:55:19.388652 # ^^^^^^^^^^^^^^^^^^
6700 01:55:19.398649 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6701 01:55:19.402163 # raise ProtocolError(cc, rc)
6702 01:55:19.408926 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6703 01:55:19.409653 #
6704 01:55:19.415246 # ======================================================================
6705 01:55:19.418471 # ERROR: test_get_handles (tpm2_tests.SpaceTest.test_get_handles)
6706 01:55:19.424790 # ----------------------------------------------------------------------
6707 01:55:19.428555 # Traceback (most recent call last):
6708 01:55:19.442063 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 271, in test_get_handles
6709 01:55:19.445142 # space1.create_root_key()
6710 01:55:19.455270 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6711 01:55:19.458557 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6712 01:55:19.465569 # ^^^^^^^^^^^^^^^^^^
6713 01:55:19.475641 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6714 01:55:19.478344 # raise ProtocolError(cc, rc)
6715 01:55:19.481904 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6716 01:55:19.485379 #
6717 01:55:19.491701 # ======================================================================
6718 01:55:19.495028 # ERROR: test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc)
6719 01:55:19.501750 # ----------------------------------------------------------------------
6720 01:55:19.504977 # Traceback (most recent call last):
6721 01:55:19.515299 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 290, in test_invalid_cc
6722 01:55:19.521996 # root1 = space1.create_root_key()
6723 01:55:19.525214 # ^^^^^^^^^^^^^^^^^^^^^^^^
6724 01:55:19.535224 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6725 01:55:19.538888 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6726 01:55:19.545804 # ^^^^^^^^^^^^^^^^^^
6727 01:55:19.555927 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6728 01:55:19.559315 # raise ProtocolError(cc, rc)
6729 01:55:19.562373 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6730 01:55:19.565503 #
6731 01:55:19.569021 # ======================================================================
6732 01:55:19.575697 # ERROR: test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces)
6733 01:55:19.581972 # ----------------------------------------------------------------------
6734 01:55:19.585426 # Traceback (most recent call last):
6735 01:55:19.599069 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 247, in test_make_two_spaces
6736 01:55:19.602558 # root1 = space1.create_root_key()
6737 01:55:19.605360 # ^^^^^^^^^^^^^^^^^^^^^^^^
6738 01:55:19.615501 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6739 01:55:19.622185 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6740 01:55:19.625396 # ^^^^^^^^^^^^^^^^^^
6741 01:55:19.635575 # File "/lava-14479143/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6742 01:55:19.639342 # raise ProtocolError(cc, rc)
6743 01:55:19.645883 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6744 01:55:19.646335 #
6745 01:55:19.652669 # ----------------------------------------------------------------------
6746 01:55:19.656547 # Ran 4 tests in 0.072s
6747 01:55:19.657161 #
6748 01:55:19.657628 # FAILED (errors=4)
6749 01:55:19.659071 not ok 2 selftests: tpm2: test_space.sh # exit=1
6750 01:55:20.089189 tpm2_test_smoke_sh pass
6751 01:55:20.092155 tpm2_test_space_sh fail
6752 01:55:20.176188 + ../../utils/send-to-lava.sh ./output/result.txt
6753 01:55:20.253087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-tpm2 RESULT=pass>
6754 01:55:20.254000 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-tpm2 RESULT=pass
6756 01:55:20.311949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass>
6757 01:55:20.312725 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass
6759 01:55:20.377635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_space_sh RESULT=fail>
6760 01:55:20.378388 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_space_sh RESULT=fail
6762 01:55:20.381324 + set +x
6763 01:55:20.384369 <LAVA_SIGNAL_ENDRUN 1_kselftest-tpm2 14479143_1.6.2.3.5>
6764 01:55:20.385034 Received signal: <ENDRUN> 1_kselftest-tpm2 14479143_1.6.2.3.5
6765 01:55:20.385439 Ending use of test pattern.
6766 01:55:20.385754 Ending test lava.1_kselftest-tpm2 (14479143_1.6.2.3.5), duration 12.76
6768 01:55:20.387645 <LAVA_TEST_RUNNER EXIT>
6769 01:55:20.388347 ok: lava_test_shell seems to have completed
6770 01:55:20.389045 shardfile-tpm2: pass
tpm2_test_smoke_sh: pass
tpm2_test_space_sh: fail
6771 01:55:20.389602 end: 3.1 lava-test-shell (duration 00:00:14) [common]
6772 01:55:20.390130 end: 3 lava-test-retry (duration 00:00:14) [common]
6773 01:55:20.390658 start: 4 finalize (timeout 00:07:51) [common]
6774 01:55:20.391191 start: 4.1 power-off (timeout 00:00:30) [common]
6775 01:55:20.392036 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
6776 01:55:21.863784 >> Command sent successfully.
6777 01:55:21.869904 Returned 0 in 1 seconds
6778 01:55:21.970668 end: 4.1 power-off (duration 00:00:02) [common]
6780 01:55:21.972127 start: 4.2 read-feedback (timeout 00:07:50) [common]
6781 01:55:21.973387 Listened to connection for namespace 'common' for up to 1s
6782 01:55:22.973642 Finalising connection for namespace 'common'
6783 01:55:22.974332 Disconnecting from shell: Finalise
6784 01:55:22.974721 / #
6785 01:55:23.075819 end: 4.2 read-feedback (duration 00:00:01) [common]
6786 01:55:23.076561 end: 4 finalize (duration 00:00:03) [common]
6787 01:55:23.077173 Cleaning after the job
6788 01:55:23.077741 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/ramdisk
6789 01:55:23.082016 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/kernel
6790 01:55:23.092320 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/dtb
6791 01:55:23.092494 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/nfsrootfs
6792 01:55:23.154154 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479143/tftp-deploy-bp6c410g/modules
6793 01:55:23.159592 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14479143
6794 01:55:23.698779 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14479143
6795 01:55:23.698963 Job finished correctly