Boot log: mt8183-kukui-jacuzzi-juniper-sku16

    1 02:01:31.894871  lava-dispatcher, installed at version: 2024.03
    2 02:01:31.895082  start: 0 validate
    3 02:01:31.895191  Start time: 2024-06-21 02:01:31.895185+00:00 (UTC)
    4 02:01:31.895315  Using caching service: 'http://localhost/cache/?uri=%s'
    5 02:01:31.895452  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-v4l2%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
    6 02:01:32.159905  Using caching service: 'http://localhost/cache/?uri=%s'
    7 02:01:32.160631  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
    8 02:01:32.415015  Using caching service: 'http://localhost/cache/?uri=%s'
    9 02:01:32.415865  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
   10 02:01:32.670628  Using caching service: 'http://localhost/cache/?uri=%s'
   11 02:01:32.671259  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.94-cip23%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 02:01:32.939878  validate duration: 1.04
   14 02:01:32.940996  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 02:01:32.941735  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 02:01:32.942381  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 02:01:32.943154  Not decompressing ramdisk as can be used compressed.
   18 02:01:32.943627  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-v4l2/20240313.0/arm64/rootfs.cpio.gz
   19 02:01:32.944076  saving as /var/lib/lava/dispatcher/tmp/14479226/tftp-deploy-17j7_ogz/ramdisk/rootfs.cpio.gz
   20 02:01:32.944597  total size: 28105535 (26 MB)
   21 02:01:32.950530  progress   0 % (0 MB)
   22 02:01:32.973277  progress   5 % (1 MB)
   23 02:01:32.984709  progress  10 % (2 MB)
   24 02:01:32.993605  progress  15 % (4 MB)
   25 02:01:33.001062  progress  20 % (5 MB)
   26 02:01:33.008042  progress  25 % (6 MB)
   27 02:01:33.015268  progress  30 % (8 MB)
   28 02:01:33.022374  progress  35 % (9 MB)
   29 02:01:33.029469  progress  40 % (10 MB)
   30 02:01:33.037470  progress  45 % (12 MB)
   31 02:01:33.044945  progress  50 % (13 MB)
   32 02:01:33.052214  progress  55 % (14 MB)
   33 02:01:33.059321  progress  60 % (16 MB)
   34 02:01:33.066474  progress  65 % (17 MB)
   35 02:01:33.073598  progress  70 % (18 MB)
   36 02:01:33.080690  progress  75 % (20 MB)
   37 02:01:33.087758  progress  80 % (21 MB)
   38 02:01:33.095023  progress  85 % (22 MB)
   39 02:01:33.101921  progress  90 % (24 MB)
   40 02:01:33.108973  progress  95 % (25 MB)
   41 02:01:33.116190  progress 100 % (26 MB)
   42 02:01:33.116398  26 MB downloaded in 0.17 s (156.02 MB/s)
   43 02:01:33.116555  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 02:01:33.116773  end: 1.1 download-retry (duration 00:00:00) [common]
   46 02:01:33.116853  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 02:01:33.116937  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 02:01:33.117065  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
   49 02:01:33.117126  saving as /var/lib/lava/dispatcher/tmp/14479226/tftp-deploy-17j7_ogz/kernel/Image
   50 02:01:33.117179  total size: 54813184 (52 MB)
   51 02:01:33.117232  No compression specified
   52 02:01:33.118274  progress   0 % (0 MB)
   53 02:01:33.132104  progress   5 % (2 MB)
   54 02:01:33.146124  progress  10 % (5 MB)
   55 02:01:33.159685  progress  15 % (7 MB)
   56 02:01:33.173441  progress  20 % (10 MB)
   57 02:01:33.187894  progress  25 % (13 MB)
   58 02:01:33.201523  progress  30 % (15 MB)
   59 02:01:33.215370  progress  35 % (18 MB)
   60 02:01:33.229177  progress  40 % (20 MB)
   61 02:01:33.243058  progress  45 % (23 MB)
   62 02:01:33.256925  progress  50 % (26 MB)
   63 02:01:33.270776  progress  55 % (28 MB)
   64 02:01:33.284295  progress  60 % (31 MB)
   65 02:01:33.298013  progress  65 % (34 MB)
   66 02:01:33.311769  progress  70 % (36 MB)
   67 02:01:33.325852  progress  75 % (39 MB)
   68 02:01:33.339688  progress  80 % (41 MB)
   69 02:01:33.353475  progress  85 % (44 MB)
   70 02:01:33.367335  progress  90 % (47 MB)
   71 02:01:33.381018  progress  95 % (49 MB)
   72 02:01:33.394495  progress 100 % (52 MB)
   73 02:01:33.394712  52 MB downloaded in 0.28 s (188.35 MB/s)
   74 02:01:33.394862  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 02:01:33.395071  end: 1.2 download-retry (duration 00:00:00) [common]
   77 02:01:33.395153  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 02:01:33.395229  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 02:01:33.395356  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
   80 02:01:33.395416  saving as /var/lib/lava/dispatcher/tmp/14479226/tftp-deploy-17j7_ogz/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
   81 02:01:33.395469  total size: 57695 (0 MB)
   82 02:01:33.395522  No compression specified
   83 02:01:33.396517  progress  56 % (0 MB)
   84 02:01:33.396776  progress 100 % (0 MB)
   85 02:01:33.396973  0 MB downloaded in 0.00 s (36.65 MB/s)
   86 02:01:33.397085  end: 1.3.1 http-download (duration 00:00:00) [common]
   88 02:01:33.397286  end: 1.3 download-retry (duration 00:00:00) [common]
   89 02:01:33.397362  start: 1.4 download-retry (timeout 00:10:00) [common]
   90 02:01:33.397454  start: 1.4.1 http-download (timeout 00:10:00) [common]
   91 02:01:33.397600  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
   92 02:01:33.397665  saving as /var/lib/lava/dispatcher/tmp/14479226/tftp-deploy-17j7_ogz/modules/modules.tar
   93 02:01:33.397719  total size: 8618924 (8 MB)
   94 02:01:33.397773  Using unxz to decompress xz
   95 02:01:33.399094  progress   0 % (0 MB)
   96 02:01:33.418074  progress   5 % (0 MB)
   97 02:01:33.441573  progress  10 % (0 MB)
   98 02:01:33.465950  progress  15 % (1 MB)
   99 02:01:33.489411  progress  20 % (1 MB)
  100 02:01:33.513306  progress  25 % (2 MB)
  101 02:01:33.536895  progress  30 % (2 MB)
  102 02:01:33.561025  progress  35 % (2 MB)
  103 02:01:33.584509  progress  40 % (3 MB)
  104 02:01:33.608235  progress  45 % (3 MB)
  105 02:01:33.631291  progress  50 % (4 MB)
  106 02:01:33.655065  progress  55 % (4 MB)
  107 02:01:33.678516  progress  60 % (4 MB)
  108 02:01:33.701442  progress  65 % (5 MB)
  109 02:01:33.728620  progress  70 % (5 MB)
  110 02:01:33.752928  progress  75 % (6 MB)
  111 02:01:33.776056  progress  80 % (6 MB)
  112 02:01:33.798725  progress  85 % (7 MB)
  113 02:01:33.821495  progress  90 % (7 MB)
  114 02:01:33.847936  progress  95 % (7 MB)
  115 02:01:33.876236  progress 100 % (8 MB)
  116 02:01:33.880645  8 MB downloaded in 0.48 s (17.02 MB/s)
  117 02:01:33.880800  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 02:01:33.881019  end: 1.4 download-retry (duration 00:00:00) [common]
  120 02:01:33.881107  start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
  121 02:01:33.881199  start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
  122 02:01:33.881270  end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
  123 02:01:33.881348  start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
  124 02:01:33.881524  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr
  125 02:01:33.881641  makedir: /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin
  126 02:01:33.881738  makedir: /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/tests
  127 02:01:33.881824  makedir: /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/results
  128 02:01:33.881919  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-add-keys
  129 02:01:33.882047  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-add-sources
  130 02:01:33.882174  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-background-process-start
  131 02:01:33.882332  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-background-process-stop
  132 02:01:33.882470  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-common-functions
  133 02:01:33.882592  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-echo-ipv4
  134 02:01:33.882703  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-install-packages
  135 02:01:33.882827  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-installed-packages
  136 02:01:33.882946  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-os-build
  137 02:01:33.883056  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-probe-channel
  138 02:01:33.883174  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-probe-ip
  139 02:01:33.883289  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-target-ip
  140 02:01:33.883407  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-target-mac
  141 02:01:33.883523  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-target-storage
  142 02:01:33.883652  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-test-case
  143 02:01:33.883765  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-test-event
  144 02:01:33.883887  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-test-feedback
  145 02:01:33.883996  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-test-raise
  146 02:01:33.884124  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-test-reference
  147 02:01:33.884255  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-test-runner
  148 02:01:33.884378  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-test-set
  149 02:01:33.884502  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-test-shell
  150 02:01:33.884613  Updating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-install-packages (oe)
  151 02:01:33.884765  Updating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/bin/lava-installed-packages (oe)
  152 02:01:33.884877  Creating /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/environment
  153 02:01:33.884976  LAVA metadata
  154 02:01:33.885040  - LAVA_JOB_ID=14479226
  155 02:01:33.885110  - LAVA_DISPATCHER_IP=192.168.201.1
  156 02:01:33.885204  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  157 02:01:33.885262  skipped lava-vland-overlay
  158 02:01:33.885342  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  159 02:01:33.885413  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  160 02:01:33.885478  skipped lava-multinode-overlay
  161 02:01:33.885571  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  162 02:01:33.885687  start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
  163 02:01:33.885765  Loading test definitions
  164 02:01:33.885852  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  165 02:01:33.885915  Using /lava-14479226 at stage 0
  166 02:01:33.886216  uuid=14479226_1.5.2.3.1 testdef=None
  167 02:01:33.886352  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  168 02:01:33.886428  start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
  169 02:01:33.886873  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  171 02:01:33.887095  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  172 02:01:33.887667  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  174 02:01:33.887892  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  175 02:01:33.888447  runner path: /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/0/tests/0_v4l2-compliance-uvc test_uuid 14479226_1.5.2.3.1
  176 02:01:33.888592  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  178 02:01:33.888792  Creating lava-test-runner.conf files
  179 02:01:33.888861  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14479226/lava-overlay-1frtzlwr/lava-14479226/0 for stage 0
  180 02:01:33.888940  - 0_v4l2-compliance-uvc
  181 02:01:33.889036  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  182 02:01:33.889111  start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
  183 02:01:33.895580  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  184 02:01:33.895685  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  185 02:01:33.895762  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  186 02:01:33.895844  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  187 02:01:33.895929  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  188 02:01:34.779953  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  189 02:01:34.780119  start: 1.5.4 extract-modules (timeout 00:09:58) [common]
  190 02:01:34.780205  extracting modules file /var/lib/lava/dispatcher/tmp/14479226/tftp-deploy-17j7_ogz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14479226/extract-overlay-ramdisk-nhem1b8_/ramdisk
  191 02:01:35.008214  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  192 02:01:35.008361  start: 1.5.5 apply-overlay-tftp (timeout 00:09:58) [common]
  193 02:01:35.008451  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14479226/compress-overlay-9u6rkghg/overlay-1.5.2.4.tar.gz to ramdisk
  194 02:01:35.008512  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14479226/compress-overlay-9u6rkghg/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14479226/extract-overlay-ramdisk-nhem1b8_/ramdisk
  195 02:01:35.015091  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  196 02:01:35.015196  start: 1.5.6 configure-preseed-file (timeout 00:09:58) [common]
  197 02:01:35.015278  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  198 02:01:35.015361  start: 1.5.7 compress-ramdisk (timeout 00:09:58) [common]
  199 02:01:35.015430  Building ramdisk /var/lib/lava/dispatcher/tmp/14479226/extract-overlay-ramdisk-nhem1b8_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14479226/extract-overlay-ramdisk-nhem1b8_/ramdisk
  200 02:01:35.691769  >> 276033 blocks

  201 02:01:39.852209  rename /var/lib/lava/dispatcher/tmp/14479226/extract-overlay-ramdisk-nhem1b8_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14479226/tftp-deploy-17j7_ogz/ramdisk/ramdisk.cpio.gz
  202 02:01:39.852390  end: 1.5.7 compress-ramdisk (duration 00:00:05) [common]
  203 02:01:39.852485  start: 1.5.8 prepare-kernel (timeout 00:09:53) [common]
  204 02:01:39.852565  start: 1.5.8.1 prepare-fit (timeout 00:09:53) [common]
  205 02:01:39.852640  Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14479226/tftp-deploy-17j7_ogz/kernel/Image']
  206 02:01:53.162543  Returned 0 in 13 seconds
  207 02:01:53.263423  mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14479226/tftp-deploy-17j7_ogz/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14479226/tftp-deploy-17j7_ogz/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14479226/tftp-deploy-17j7_ogz/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14479226/tftp-deploy-17j7_ogz/kernel/image.itb
  208 02:01:54.026729  output: FIT description: Kernel Image image with one or more FDT blobs
  209 02:01:54.026865  output: Created:         Fri Jun 21 03:01:53 2024
  210 02:01:54.026940  output:  Image 0 (kernel-1)
  211 02:01:54.026998  output:   Description:  
  212 02:01:54.027056  output:   Created:      Fri Jun 21 03:01:53 2024
  213 02:01:54.027128  output:   Type:         Kernel Image
  214 02:01:54.027186  output:   Compression:  lzma compressed
  215 02:01:54.027245  output:   Data Size:    13124896 Bytes = 12817.28 KiB = 12.52 MiB
  216 02:01:54.027312  output:   Architecture: AArch64
  217 02:01:54.027370  output:   OS:           Linux
  218 02:01:54.027427  output:   Load Address: 0x00000000
  219 02:01:54.027497  output:   Entry Point:  0x00000000
  220 02:01:54.027554  output:   Hash algo:    crc32
  221 02:01:54.027610  output:   Hash value:   ab2f7826
  222 02:01:54.027674  output:  Image 1 (fdt-1)
  223 02:01:54.027725  output:   Description:  mt8183-kukui-jacuzzi-juniper-sku16
  224 02:01:54.027773  output:   Created:      Fri Jun 21 03:01:53 2024
  225 02:01:54.027822  output:   Type:         Flat Device Tree
  226 02:01:54.027884  output:   Compression:  uncompressed
  227 02:01:54.027933  output:   Data Size:    57695 Bytes = 56.34 KiB = 0.06 MiB
  228 02:01:54.027981  output:   Architecture: AArch64
  229 02:01:54.028035  output:   Hash algo:    crc32
  230 02:01:54.028085  output:   Hash value:   a9713552
  231 02:01:54.028132  output:  Image 2 (ramdisk-1)
  232 02:01:54.028179  output:   Description:  unavailable
  233 02:01:54.028238  output:   Created:      Fri Jun 21 03:01:53 2024
  234 02:01:54.028288  output:   Type:         RAMDisk Image
  235 02:01:54.028337  output:   Compression:  uncompressed
  236 02:01:54.028384  output:   Data Size:    41226999 Bytes = 40260.74 KiB = 39.32 MiB
  237 02:01:54.028440  output:   Architecture: AArch64
  238 02:01:54.028488  output:   OS:           Linux
  239 02:01:54.028534  output:   Load Address: unavailable
  240 02:01:54.028581  output:   Entry Point:  unavailable
  241 02:01:54.028635  output:   Hash algo:    crc32
  242 02:01:54.028683  output:   Hash value:   ff23c186
  243 02:01:54.028729  output:  Default Configuration: 'conf-1'
  244 02:01:54.028776  output:  Configuration 0 (conf-1)
  245 02:01:54.028836  output:   Description:  mt8183-kukui-jacuzzi-juniper-sku16
  246 02:01:54.028884  output:   Kernel:       kernel-1
  247 02:01:54.028931  output:   Init Ramdisk: ramdisk-1
  248 02:01:54.028979  output:   FDT:          fdt-1
  249 02:01:54.029034  output:   Loadables:    kernel-1
  250 02:01:54.029081  output: 
  251 02:01:54.029225  end: 1.5.8.1 prepare-fit (duration 00:00:14) [common]
  252 02:01:54.029311  end: 1.5.8 prepare-kernel (duration 00:00:14) [common]
  253 02:01:54.029407  end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
  254 02:01:54.029492  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
  255 02:01:54.029558  No LXC device requested
  256 02:01:54.029641  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  257 02:01:54.029719  start: 1.7 deploy-device-env (timeout 00:09:39) [common]
  258 02:01:54.029800  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  259 02:01:54.029861  Checking files for TFTP limit of 4294967296 bytes.
  260 02:01:54.030343  end: 1 tftp-deploy (duration 00:00:21) [common]
  261 02:01:54.030442  start: 2 depthcharge-action (timeout 00:05:00) [common]
  262 02:01:54.030524  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  263 02:01:54.030649  substitutions:
  264 02:01:54.030735  - {DTB}: 14479226/tftp-deploy-17j7_ogz/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
  265 02:01:54.030798  - {INITRD}: 14479226/tftp-deploy-17j7_ogz/ramdisk/ramdisk.cpio.gz
  266 02:01:54.030851  - {KERNEL}: 14479226/tftp-deploy-17j7_ogz/kernel/Image
  267 02:01:54.030901  - {LAVA_MAC}: None
  268 02:01:54.030967  - {PRESEED_CONFIG}: None
  269 02:01:54.031018  - {PRESEED_LOCAL}: None
  270 02:01:54.031066  - {RAMDISK}: 14479226/tftp-deploy-17j7_ogz/ramdisk/ramdisk.cpio.gz
  271 02:01:54.031135  - {ROOT_PART}: None
  272 02:01:54.031185  - {ROOT}: None
  273 02:01:54.031234  - {SERVER_IP}: 192.168.201.1
  274 02:01:54.031281  - {TEE}: None
  275 02:01:54.031338  Parsed boot commands:
  276 02:01:54.031386  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  277 02:01:54.031540  Parsed boot commands: tftpboot 192.168.201.1 14479226/tftp-deploy-17j7_ogz/kernel/image.itb 14479226/tftp-deploy-17j7_ogz/kernel/cmdline 
  278 02:01:54.031620  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  279 02:01:54.031704  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  280 02:01:54.031781  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  281 02:01:54.031856  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  282 02:01:54.031924  Not connected, no need to disconnect.
  283 02:01:54.031990  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  284 02:01:54.032060  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  285 02:01:54.032124  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-5'
  286 02:01:54.035465  Setting prompt string to ['lava-test: # ']
  287 02:01:54.035845  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  288 02:01:54.035955  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  289 02:01:54.036046  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  290 02:01:54.036163  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  291 02:01:54.036365  Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=reboot']
  292 02:02:03.243186  >> Command sent successfully.

  293 02:02:03.258832  Returned 0 in 9 seconds
  294 02:02:03.360038  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  296 02:02:03.361463  end: 2.2.2 reset-device (duration 00:00:09) [common]
  297 02:02:03.361984  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  298 02:02:03.362513  Setting prompt string to 'Starting depthcharge on Juniper...'
  299 02:02:03.362871  Changing prompt to 'Starting depthcharge on Juniper...'
  300 02:02:03.363459  depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
  301 02:02:03.365274  [Enter `^Ec?' for help]

  302 02:02:09.341854  [DL] 00000000 00000000 010701

  303 02:02:09.346775  

  304 02:02:09.347240  

  305 02:02:09.347617  F0: 102B 0000

  306 02:02:09.347978  

  307 02:02:09.348309  F3: 1006 0033 [0200]

  308 02:02:09.350094  

  309 02:02:09.350616  F3: 4001 00E0 [0200]

  310 02:02:09.350977  

  311 02:02:09.351293  F3: 0000 0000

  312 02:02:09.353636  

  313 02:02:09.354072  V0: 0000 0000 [0001]

  314 02:02:09.354485  

  315 02:02:09.354793  00: 1027 0002

  316 02:02:09.355094  

  317 02:02:09.356946  01: 0000 0000

  318 02:02:09.357402  

  319 02:02:09.357709  BP: 0C00 0251 [0000]

  320 02:02:09.357989  

  321 02:02:09.360196  G0: 1182 0000

  322 02:02:09.360698  

  323 02:02:09.361060  EC: 0004 0000 [0001]

  324 02:02:09.361375  

  325 02:02:09.363768  S7: 0000 0000 [0000]

  326 02:02:09.364285  

  327 02:02:09.364602  CC: 0000 0000 [0001]

  328 02:02:09.366921  

  329 02:02:09.367324  T0: 0000 00DB [000F]

  330 02:02:09.367627  

  331 02:02:09.367899  Jump to BL

  332 02:02:09.368164  

  333 02:02:09.402987  


  334 02:02:09.403498  

  335 02:02:09.412746  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...

  336 02:02:09.413273  ARM64: Exception handlers installed.

  337 02:02:09.416272  ARM64: Testing exception

  338 02:02:09.419704  ARM64: Done test exception

  339 02:02:09.423307  WDT: Last reset was cold boot

  340 02:02:09.423756  SPI0(PAD0) initialized at 992727 Hz

  341 02:02:09.429847  FMAP: area RW_NVRAM found @ 554000 (8192 bytes)

  342 02:02:09.430329  Manufacturer: ef

  343 02:02:09.436902  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

  344 02:02:09.449469  Probing TPM: . done!

  345 02:02:09.449919  TPM ready after 0 ms

  346 02:02:09.456252  Connected to device vid:did:rid of 1ae0:0028:00

  347 02:02:09.463296  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66

  348 02:02:09.466398  Initialized TPM device CR50 revision 0

  349 02:02:09.510401  tlcl_send_startup: Startup return code is 0

  350 02:02:09.510981  TPM: setup succeeded

  351 02:02:09.518719  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  352 02:02:09.521965  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

  353 02:02:09.525409  in-header: 03 19 00 00 08 00 00 00 

  354 02:02:09.528505  in-data: a2 e0 47 00 13 00 00 00 

  355 02:02:09.531967  Chrome EC: UHEPI supported

  356 02:02:09.538285  out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00 

  357 02:02:09.541906  in-header: 03 a1 00 00 08 00 00 00 

  358 02:02:09.545011  in-data: 84 60 60 10 00 00 00 00 

  359 02:02:09.545510  Phase 1

  360 02:02:09.548282  FMAP: area GBB found @ 3f5000 (12032 bytes)

  361 02:02:09.555099  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  362 02:02:09.561954  VB2:vb2_check_recovery() Recovery was requested manually

  363 02:02:09.565366  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0

  364 02:02:09.571258  Recovery requested (1009000e)

  365 02:02:09.579865  tlcl_extend: response is 0

  366 02:02:09.585725  tlcl_extend: response is 0

  367 02:02:09.609976  

  368 02:02:09.610056  

  369 02:02:09.617154  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...

  370 02:02:09.620490  ARM64: Exception handlers installed.

  371 02:02:09.623907  ARM64: Testing exception

  372 02:02:09.626879  ARM64: Done test exception

  373 02:02:09.642664  [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xaa70, sec=0x2007

  374 02:02:09.648896  [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2

  375 02:02:09.652309  [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a

  376 02:02:09.660565  [RTC]rtc_get_frequency_meter,134: input=0xf, output=778

  377 02:02:09.667763  [RTC]rtc_get_frequency_meter,134: input=0x17, output=958

  378 02:02:09.674541  [RTC]rtc_get_frequency_meter,134: input=0x13, output=868

  379 02:02:09.681767  [RTC]rtc_get_frequency_meter,134: input=0x11, output=822

  380 02:02:09.689162  [RTC]rtc_get_frequency_meter,134: input=0x10, output=799

  381 02:02:09.695908  [RTC]rtc_get_frequency_meter,134: input=0xf, output=777

  382 02:02:09.702984  [RTC]rtc_get_frequency_meter,134: input=0x10, output=801

  383 02:02:09.706270  [RTC]rtc_osc_init,208: EOSC32 cali val = 0xaa70

  384 02:02:09.712666  [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482

  385 02:02:09.715914  [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1

  386 02:02:09.719710  [RTC]rtc_bbpu_power_on,376: done BBPU=0x9

  387 02:02:09.722630  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

  388 02:02:09.726385  in-header: 03 19 00 00 08 00 00 00 

  389 02:02:09.729655  in-data: a2 e0 47 00 13 00 00 00 

  390 02:02:09.732739  Chrome EC: UHEPI supported

  391 02:02:09.740024  out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00 

  392 02:02:09.743648  in-header: 03 a1 00 00 08 00 00 00 

  393 02:02:09.746727  in-data: 84 60 60 10 00 00 00 00 

  394 02:02:09.750050  Skip loading cached calibration data

  395 02:02:09.756891  out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00 

  396 02:02:09.760021  in-header: 03 a1 00 00 08 00 00 00 

  397 02:02:09.763804  in-data: 84 60 60 10 00 00 00 00 

  398 02:02:09.769984  out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10 

  399 02:02:09.773397  in-header: 03 a1 00 00 08 00 00 00 

  400 02:02:09.776999  in-data: 84 60 60 10 00 00 00 00 

  401 02:02:09.780118  ADC[3]: Raw value=1043152 ID=8

  402 02:02:09.780686  Manufacturer: ef

  403 02:02:09.787015  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

  404 02:02:09.790304  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

  405 02:02:09.793653  CBFS @ 21000 size 3d4000

  406 02:02:09.797010  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

  407 02:02:09.803549  CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'

  408 02:02:09.806854  CBFS: Found @ offset 3c880 size 4b

  409 02:02:09.807261  DRAM-K: Full Calibration

  410 02:02:09.813563  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

  411 02:02:09.814057  CBFS @ 21000 size 3d4000

  412 02:02:09.820173  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

  413 02:02:09.823750  CBFS: Locating 'fallback/dram'

  414 02:02:09.826944  CBFS: Found @ offset 24b00 size 12268

  415 02:02:09.854637  read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps

  416 02:02:09.858206  ddr_geometry: 1, config: 0x0

  417 02:02:09.861736  header.status = 0x0

  418 02:02:09.864960  header.magic = 0x44524d4b (expected: 0x44524d4b)

  419 02:02:09.868032  header.version = 0x5 (expected: 0x5)

  420 02:02:09.871597  header.size = 0x8f0 (expected: 0x8f0)

  421 02:02:09.872132  header.config = 0x0

  422 02:02:09.874677  header.flags = 0x0

  423 02:02:09.875124  header.checksum = 0x0

  424 02:02:09.881450  dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5

  425 02:02:09.887991  Set DRAM voltage: vdram1 = 1125000, vddq = 600000

  426 02:02:09.891740  Get DRAM voltage to vdram1 = 1125000, vddq = 600000

  427 02:02:09.895142  ddr_geometry:1

  428 02:02:09.895568  [EMI] new MDL number = 1

  429 02:02:09.898789  dram_cbt_mode_extern: 0

  430 02:02:09.901744  dram_cbt_mode [RK0]: 0, [RK1]: 0

  431 02:02:09.908147  Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]

  432 02:02:09.908606  

  433 02:02:09.909010  

  434 02:02:09.909323  [Bianco] ETT version 0.0.0.1

  435 02:02:09.915198   dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6

  436 02:02:09.915419  

  437 02:02:09.918272  vSetVcoreByFreq with vcore:762500, freq=1600

  438 02:02:09.918568  

  439 02:02:09.918745  [DramcInit]

  440 02:02:09.921437  AutoRefreshCKEOff AutoREF OFF

  441 02:02:09.925290  DDRPhyPLLSetting-CKEOFF

  442 02:02:09.925489  DDRPhyPLLSetting-CKEON

  443 02:02:09.928303  

  444 02:02:09.928447  Enable WDQS

  445 02:02:09.931679  [ModeRegInit_LP4] CH0 RK0

  446 02:02:09.934887  Write Rank0 MR13 =0x18

  447 02:02:09.934997  Write Rank0 MR12 =0x5d

  448 02:02:09.938057  Write Rank0 MR1 =0x56

  449 02:02:09.941423  Write Rank0 MR2 =0x1a

  450 02:02:09.941532  Write Rank0 MR11 =0x0

  451 02:02:09.944977  Write Rank0 MR22 =0x38

  452 02:02:09.945087  Write Rank0 MR14 =0x5d

  453 02:02:09.948174  Write Rank0 MR3 =0x30

  454 02:02:09.952032  Write Rank0 MR13 =0x58

  455 02:02:09.952592  Write Rank0 MR12 =0x5d

  456 02:02:09.955420  Write Rank0 MR1 =0x56

  457 02:02:09.955914  Write Rank0 MR2 =0x2d

  458 02:02:09.958586  Write Rank0 MR11 =0x23

  459 02:02:09.962298  Write Rank0 MR22 =0x34

  460 02:02:09.962772  Write Rank0 MR14 =0x10

  461 02:02:09.965450  Write Rank0 MR3 =0x30

  462 02:02:09.965833  Write Rank0 MR13 =0xd8

  463 02:02:09.968892  [ModeRegInit_LP4] CH0 RK1

  464 02:02:09.972168  Write Rank1 MR13 =0x18

  465 02:02:09.972485  Write Rank1 MR12 =0x5d

  466 02:02:09.975671  Write Rank1 MR1 =0x56

  467 02:02:09.978690  Write Rank1 MR2 =0x1a

  468 02:02:09.979006  Write Rank1 MR11 =0x0

  469 02:02:09.981977  Write Rank1 MR22 =0x38

  470 02:02:09.982376  Write Rank1 MR14 =0x5d

  471 02:02:09.985594  Write Rank1 MR3 =0x30

  472 02:02:09.989393  Write Rank1 MR13 =0x58

  473 02:02:09.989747  Write Rank1 MR12 =0x5d

  474 02:02:09.992327  Write Rank1 MR1 =0x56

  475 02:02:09.992599  Write Rank1 MR2 =0x2d

  476 02:02:09.995629  Write Rank1 MR11 =0x23

  477 02:02:09.998920  Write Rank1 MR22 =0x34

  478 02:02:09.999191  Write Rank1 MR14 =0x10

  479 02:02:10.002258  Write Rank1 MR3 =0x30

  480 02:02:10.002533  Write Rank1 MR13 =0xd8

  481 02:02:10.005906  [ModeRegInit_LP4] CH1 RK0

  482 02:02:10.009402  Write Rank0 MR13 =0x18

  483 02:02:10.009895  Write Rank0 MR12 =0x5d

  484 02:02:10.012377  Write Rank0 MR1 =0x56

  485 02:02:10.015697  Write Rank0 MR2 =0x1a

  486 02:02:10.016272  Write Rank0 MR11 =0x0

  487 02:02:10.018999  Write Rank0 MR22 =0x38

  488 02:02:10.019422  Write Rank0 MR14 =0x5d

  489 02:02:10.022386  Write Rank0 MR3 =0x30

  490 02:02:10.026011  Write Rank0 MR13 =0x58

  491 02:02:10.026483  Write Rank0 MR12 =0x5d

  492 02:02:10.029018  Write Rank0 MR1 =0x56

  493 02:02:10.029401  Write Rank0 MR2 =0x2d

  494 02:02:10.032411  Write Rank0 MR11 =0x23

  495 02:02:10.035807  Write Rank0 MR22 =0x34

  496 02:02:10.036191  Write Rank0 MR14 =0x10

  497 02:02:10.039353  Write Rank0 MR3 =0x30

  498 02:02:10.039741  Write Rank0 MR13 =0xd8

  499 02:02:10.042480  [ModeRegInit_LP4] CH1 RK1

  500 02:02:10.045769  Write Rank1 MR13 =0x18

  501 02:02:10.046164  Write Rank1 MR12 =0x5d

  502 02:02:10.049672  Write Rank1 MR1 =0x56

  503 02:02:10.052576  Write Rank1 MR2 =0x1a

  504 02:02:10.052994  Write Rank1 MR11 =0x0

  505 02:02:10.055995  Write Rank1 MR22 =0x38

  506 02:02:10.056480  Write Rank1 MR14 =0x5d

  507 02:02:10.059289  Write Rank1 MR3 =0x30

  508 02:02:10.062633  Write Rank1 MR13 =0x58

  509 02:02:10.063018  Write Rank1 MR12 =0x5d

  510 02:02:10.066300  Write Rank1 MR1 =0x56

  511 02:02:10.066694  Write Rank1 MR2 =0x2d

  512 02:02:10.069459  Write Rank1 MR11 =0x23

  513 02:02:10.072978  Write Rank1 MR22 =0x34

  514 02:02:10.073461  Write Rank1 MR14 =0x10

  515 02:02:10.076520  Write Rank1 MR3 =0x30

  516 02:02:10.076989  Write Rank1 MR13 =0xd8

  517 02:02:10.079446  match AC timing 3

  518 02:02:10.089837  [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0

  519 02:02:10.090320  [MiockJmeterHQA]

  520 02:02:10.092704  vSetVcoreByFreq with vcore:762500, freq=1600

  521 02:02:10.197265  

  522 02:02:10.197370  	MIOCK jitter meter	ch=0

  523 02:02:10.197444  

  524 02:02:10.200613  1T = (100-18) = 82 dly cells

  525 02:02:10.207576  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps

  526 02:02:10.210534  vSetVcoreByFreq with vcore:725000, freq=1200

  527 02:02:10.309673  

  528 02:02:10.310380  	MIOCK jitter meter	ch=0

  529 02:02:10.310910  

  530 02:02:10.312621  1T = (95-16) = 79 dly cells

  531 02:02:10.319367  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps

  532 02:02:10.322477  vSetVcoreByFreq with vcore:725000, freq=800

  533 02:02:10.420967  

  534 02:02:10.421476  	MIOCK jitter meter	ch=0

  535 02:02:10.421916  

  536 02:02:10.424046  1T = (95-16) = 79 dly cells

  537 02:02:10.430349  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps

  538 02:02:10.434063  vSetVcoreByFreq with vcore:762500, freq=1600

  539 02:02:10.437359  vSetVcoreByFreq with vcore:762500, freq=1600

  540 02:02:10.437811  

  541 02:02:10.438140  	K DRVP

  542 02:02:10.440728  1. OCD DRVP=0 CALOUT=0

  543 02:02:10.443967  1. OCD DRVP=1 CALOUT=0

  544 02:02:10.444402  1. OCD DRVP=2 CALOUT=0

  545 02:02:10.447211  1. OCD DRVP=3 CALOUT=0

  546 02:02:10.447645  1. OCD DRVP=4 CALOUT=0

  547 02:02:10.450586  1. OCD DRVP=5 CALOUT=0

  548 02:02:10.454049  1. OCD DRVP=6 CALOUT=0

  549 02:02:10.454519  1. OCD DRVP=7 CALOUT=0

  550 02:02:10.457379  1. OCD DRVP=8 CALOUT=1

  551 02:02:10.457810  

  552 02:02:10.461272  1. OCD DRVP calibration OK! DRVP=8

  553 02:02:10.461792  

  554 02:02:10.462124  

  555 02:02:10.462488  

  556 02:02:10.462782  	K ODTN

  557 02:02:10.464160  3. OCD ODTN=0 ,CALOUT=1

  558 02:02:10.467541  3. OCD ODTN=1 ,CALOUT=1

  559 02:02:10.468038  3. OCD ODTN=2 ,CALOUT=1

  560 02:02:10.470858  3. OCD ODTN=3 ,CALOUT=1

  561 02:02:10.471292  3. OCD ODTN=4 ,CALOUT=1

  562 02:02:10.474839  3. OCD ODTN=5 ,CALOUT=1

  563 02:02:10.477996  3. OCD ODTN=6 ,CALOUT=1

  564 02:02:10.478559  3. OCD ODTN=7 ,CALOUT=0

  565 02:02:10.478905  

  566 02:02:10.481044  3. OCD ODTN calibration OK! ODTN=7

  567 02:02:10.481610  

  568 02:02:10.484320  [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7

  569 02:02:10.490929  term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15

  570 02:02:10.494306  term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)

  571 02:02:10.494737  

  572 02:02:10.495064  	K DRVP

  573 02:02:10.498209  1. OCD DRVP=0 CALOUT=0

  574 02:02:10.500858  1. OCD DRVP=1 CALOUT=0

  575 02:02:10.501289  1. OCD DRVP=2 CALOUT=0

  576 02:02:10.504433  1. OCD DRVP=3 CALOUT=0

  577 02:02:10.508070  1. OCD DRVP=4 CALOUT=0

  578 02:02:10.508586  1. OCD DRVP=5 CALOUT=0

  579 02:02:10.511616  1. OCD DRVP=6 CALOUT=0

  580 02:02:10.512131  1. OCD DRVP=7 CALOUT=0

  581 02:02:10.514754  1. OCD DRVP=8 CALOUT=0

  582 02:02:10.518044  1. OCD DRVP=9 CALOUT=0

  583 02:02:10.518636  1. OCD DRVP=10 CALOUT=1

  584 02:02:10.518982  

  585 02:02:10.521195  1. OCD DRVP calibration OK! DRVP=10

  586 02:02:10.521629  

  587 02:02:10.521957  

  588 02:02:10.522302  

  589 02:02:10.524637  	K ODTN

  590 02:02:10.525059  3. OCD ODTN=0 ,CALOUT=1

  591 02:02:10.528104  3. OCD ODTN=1 ,CALOUT=1

  592 02:02:10.532159  3. OCD ODTN=2 ,CALOUT=1

  593 02:02:10.532671  3. OCD ODTN=3 ,CALOUT=1

  594 02:02:10.534867  3. OCD ODTN=4 ,CALOUT=1

  595 02:02:10.535459  3. OCD ODTN=5 ,CALOUT=1

  596 02:02:10.538706  3. OCD ODTN=6 ,CALOUT=1

  597 02:02:10.542155  3. OCD ODTN=7 ,CALOUT=1

  598 02:02:10.542719  3. OCD ODTN=8 ,CALOUT=1

  599 02:02:10.545389  3. OCD ODTN=9 ,CALOUT=1

  600 02:02:10.548638  3. OCD ODTN=10 ,CALOUT=1

  601 02:02:10.549155  3. OCD ODTN=11 ,CALOUT=1

  602 02:02:10.551921  3. OCD ODTN=12 ,CALOUT=1

  603 02:02:10.555292  3. OCD ODTN=13 ,CALOUT=1

  604 02:02:10.555724  3. OCD ODTN=14 ,CALOUT=1

  605 02:02:10.558295  3. OCD ODTN=15 ,CALOUT=0

  606 02:02:10.558731  

  607 02:02:10.561603  3. OCD ODTN calibration OK! ODTN=15

  608 02:02:10.562363  

  609 02:02:10.564620  [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15

  610 02:02:10.568322  term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15

  611 02:02:10.575159  term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)

  612 02:02:10.575688  

  613 02:02:10.576027  [DramcInit]

  614 02:02:10.578331  AutoRefreshCKEOff AutoREF OFF

  615 02:02:10.581915  DDRPhyPLLSetting-CKEOFF

  616 02:02:10.582500  DDRPhyPLLSetting-CKEON

  617 02:02:10.582887  

  618 02:02:10.585058  Enable WDQS

  619 02:02:10.585504  ==

  620 02:02:10.588369  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  621 02:02:10.591865  fsp= 1, odt_onoff= 1, Byte mode= 0

  622 02:02:10.592303  ==

  623 02:02:10.595331  [Duty_Offset_Calibration]

  624 02:02:10.595762  

  625 02:02:10.598538  ===========================

  626 02:02:10.598975  	B0:1	B1:0	CA:0

  627 02:02:10.622069  ==

  628 02:02:10.625245  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

  629 02:02:10.628523  fsp= 1, odt_onoff= 1, Byte mode= 0

  630 02:02:10.628980  ==

  631 02:02:10.631853  [Duty_Offset_Calibration]

  632 02:02:10.632284  

  633 02:02:10.635108  ===========================

  634 02:02:10.635716  	B0:1	B1:0	CA:-1

  635 02:02:10.668895  [ModeRegInit_LP4] CH0 RK0

  636 02:02:10.672181  Write Rank0 MR13 =0x18

  637 02:02:10.672702  Write Rank0 MR12 =0x5d

  638 02:02:10.675284  Write Rank0 MR1 =0x56

  639 02:02:10.678966  Write Rank0 MR2 =0x1a

  640 02:02:10.679431  Write Rank0 MR11 =0x0

  641 02:02:10.682078  Write Rank0 MR22 =0x38

  642 02:02:10.682576  Write Rank0 MR14 =0x5d

  643 02:02:10.685583  Write Rank0 MR3 =0x30

  644 02:02:10.688952  Write Rank0 MR13 =0x58

  645 02:02:10.689481  Write Rank0 MR12 =0x5d

  646 02:02:10.692216  Write Rank0 MR1 =0x56

  647 02:02:10.692663  Write Rank0 MR2 =0x2d

  648 02:02:10.695668  Write Rank0 MR11 =0x23

  649 02:02:10.699150  Write Rank0 MR22 =0x34

  650 02:02:10.699601  Write Rank0 MR14 =0x10

  651 02:02:10.702191  Write Rank0 MR3 =0x30

  652 02:02:10.702685  Write Rank0 MR13 =0xd8

  653 02:02:10.705481  [ModeRegInit_LP4] CH0 RK1

  654 02:02:10.708794  Write Rank1 MR13 =0x18

  655 02:02:10.709241  Write Rank1 MR12 =0x5d

  656 02:02:10.712015  Write Rank1 MR1 =0x56

  657 02:02:10.715607  Write Rank1 MR2 =0x1a

  658 02:02:10.716054  Write Rank1 MR11 =0x0

  659 02:02:10.718994  Write Rank1 MR22 =0x38

  660 02:02:10.719436  Write Rank1 MR14 =0x5d

  661 02:02:10.722503  Write Rank1 MR3 =0x30

  662 02:02:10.726054  Write Rank1 MR13 =0x58

  663 02:02:10.726622  Write Rank1 MR12 =0x5d

  664 02:02:10.729151  Write Rank1 MR1 =0x56

  665 02:02:10.729579  Write Rank1 MR2 =0x2d

  666 02:02:10.732758  Write Rank1 MR11 =0x23

  667 02:02:10.736096  Write Rank1 MR22 =0x34

  668 02:02:10.736545  Write Rank1 MR14 =0x10

  669 02:02:10.739318  Write Rank1 MR3 =0x30

  670 02:02:10.739750  Write Rank1 MR13 =0xd8

  671 02:02:10.742797  [ModeRegInit_LP4] CH1 RK0

  672 02:02:10.745818  Write Rank0 MR13 =0x18

  673 02:02:10.746293  Write Rank0 MR12 =0x5d

  674 02:02:10.749102  Write Rank0 MR1 =0x56

  675 02:02:10.752940  Write Rank0 MR2 =0x1a

  676 02:02:10.753461  Write Rank0 MR11 =0x0

  677 02:02:10.756462  Write Rank0 MR22 =0x38

  678 02:02:10.756971  Write Rank0 MR14 =0x5d

  679 02:02:10.759762  Write Rank0 MR3 =0x30

  680 02:02:10.762718  Write Rank0 MR13 =0x58

  681 02:02:10.763148  Write Rank0 MR12 =0x5d

  682 02:02:10.766168  Write Rank0 MR1 =0x56

  683 02:02:10.766621  Write Rank0 MR2 =0x2d

  684 02:02:10.769747  Write Rank0 MR11 =0x23

  685 02:02:10.773030  Write Rank0 MR22 =0x34

  686 02:02:10.773533  Write Rank0 MR14 =0x10

  687 02:02:10.776288  Write Rank0 MR3 =0x30

  688 02:02:10.776799  Write Rank0 MR13 =0xd8

  689 02:02:10.779332  [ModeRegInit_LP4] CH1 RK1

  690 02:02:10.783142  Write Rank1 MR13 =0x18

  691 02:02:10.783661  Write Rank1 MR12 =0x5d

  692 02:02:10.786347  Write Rank1 MR1 =0x56

  693 02:02:10.789649  Write Rank1 MR2 =0x1a

  694 02:02:10.790076  Write Rank1 MR11 =0x0

  695 02:02:10.793354  Write Rank1 MR22 =0x38

  696 02:02:10.793856  Write Rank1 MR14 =0x5d

  697 02:02:10.796332  Write Rank1 MR3 =0x30

  698 02:02:10.799990  Write Rank1 MR13 =0x58

  699 02:02:10.800435  Write Rank1 MR12 =0x5d

  700 02:02:10.803262  Write Rank1 MR1 =0x56

  701 02:02:10.803690  Write Rank1 MR2 =0x2d

  702 02:02:10.806752  Write Rank1 MR11 =0x23

  703 02:02:10.809889  Write Rank1 MR22 =0x34

  704 02:02:10.810384  Write Rank1 MR14 =0x10

  705 02:02:10.813342  Write Rank1 MR3 =0x30

  706 02:02:10.813859  Write Rank1 MR13 =0xd8

  707 02:02:10.816597  match AC timing 3

  708 02:02:10.826695  [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0

  709 02:02:10.827205  DramC Write-DBI off

  710 02:02:10.830085  DramC Read-DBI off

  711 02:02:10.830703  Write Rank0 MR13 =0x59

  712 02:02:10.831046  ==

  713 02:02:10.836566  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  714 02:02:10.839848  fsp= 1, odt_onoff= 1, Byte mode= 0

  715 02:02:10.840281  ==

  716 02:02:10.843421  === u2Vref_new: 0x56 --> 0x2d

  717 02:02:10.847002  === u2Vref_new: 0x58 --> 0x38

  718 02:02:10.849923  === u2Vref_new: 0x5a --> 0x39

  719 02:02:10.853228  === u2Vref_new: 0x5c --> 0x3c

  720 02:02:10.853656  === u2Vref_new: 0x5e --> 0x3d

  721 02:02:10.857150  === u2Vref_new: 0x60 --> 0xa0

  722 02:02:10.860606  [CA 0] Center 33 (4~63) winsize 60

  723 02:02:10.863723  [CA 1] Center 34 (6~63) winsize 58

  724 02:02:10.867177  [CA 2] Center 27 (-1~56) winsize 58

  725 02:02:10.870484  [CA 3] Center 23 (-4~51) winsize 56

  726 02:02:10.873966  [CA 4] Center 24 (-3~52) winsize 56

  727 02:02:10.876881  [CA 5] Center 28 (-1~58) winsize 60

  728 02:02:10.877395  

  729 02:02:10.880409  [CATrainingPosCal] consider 1 rank data

  730 02:02:10.884012  u2DelayCellTimex100 = 762/100 ps

  731 02:02:10.887437  CA0 delay=33 (4~63),Diff = 10 PI (12 cell)

  732 02:02:10.890583  CA1 delay=34 (6~63),Diff = 11 PI (14 cell)

  733 02:02:10.893757  CA2 delay=27 (-1~56),Diff = 4 PI (5 cell)

  734 02:02:10.900709  CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)

  735 02:02:10.903772  CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)

  736 02:02:10.907310  CA5 delay=28 (-1~58),Diff = 5 PI (6 cell)

  737 02:02:10.907698  

  738 02:02:10.910579  CA PerBit enable=1, Macro0, CA PI delay=23

  739 02:02:10.914362  === u2Vref_new: 0x56 --> 0x2d

  740 02:02:10.914751  

  741 02:02:10.915051  Vref(ca) range 1: 22

  742 02:02:10.915358  

  743 02:02:10.917337  CS Dly= 10 (41-0-32)

  744 02:02:10.920755  Write Rank0 MR13 =0xd8

  745 02:02:10.921143  Write Rank0 MR13 =0xd8

  746 02:02:10.924261  Write Rank0 MR12 =0x56

  747 02:02:10.924646  Write Rank1 MR13 =0x59

  748 02:02:10.927552  ==

  749 02:02:10.930745  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

  750 02:02:10.934155  fsp= 1, odt_onoff= 1, Byte mode= 0

  751 02:02:10.934585  ==

  752 02:02:10.937481  === u2Vref_new: 0x56 --> 0x2d

  753 02:02:10.940893  === u2Vref_new: 0x58 --> 0x38

  754 02:02:10.944411  === u2Vref_new: 0x5a --> 0x39

  755 02:02:10.947573  === u2Vref_new: 0x5c --> 0x3c

  756 02:02:10.948008  === u2Vref_new: 0x5e --> 0x3d

  757 02:02:10.951140  === u2Vref_new: 0x60 --> 0xa0

  758 02:02:10.954975  [CA 0] Center 33 (4~63) winsize 60

  759 02:02:10.957946  [CA 1] Center 34 (5~63) winsize 59

  760 02:02:10.961345  [CA 2] Center 28 (0~56) winsize 57

  761 02:02:10.964942  [CA 3] Center 23 (-4~51) winsize 56

  762 02:02:10.967866  [CA 4] Center 24 (-3~52) winsize 56

  763 02:02:10.971896  [CA 5] Center 29 (0~58) winsize 59

  764 02:02:10.972530  

  765 02:02:10.974599  [CATrainingPosCal] consider 2 rank data

  766 02:02:10.978252  u2DelayCellTimex100 = 762/100 ps

  767 02:02:10.981490  CA0 delay=33 (4~63),Diff = 10 PI (12 cell)

  768 02:02:10.985159  CA1 delay=34 (6~63),Diff = 11 PI (14 cell)

  769 02:02:10.988348  CA2 delay=28 (0~56),Diff = 5 PI (6 cell)

  770 02:02:10.991537  CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)

  771 02:02:10.998483  CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)

  772 02:02:11.002251  CA5 delay=29 (0~58),Diff = 6 PI (7 cell)

  773 02:02:11.002734  

  774 02:02:11.005383  CA PerBit enable=1, Macro0, CA PI delay=23

  775 02:02:11.009035  === u2Vref_new: 0x56 --> 0x2d

  776 02:02:11.009542  

  777 02:02:11.009893  Vref(ca) range 1: 22

  778 02:02:11.010205  

  779 02:02:11.012040  CS Dly= 7 (38-0-32)

  780 02:02:11.012545  Write Rank1 MR13 =0xd8

  781 02:02:11.015090  Write Rank1 MR13 =0xd8

  782 02:02:11.018981  Write Rank1 MR12 =0x56

  783 02:02:11.022393  [RankSwap] Rank num 2, (Multi 1), Rank 0

  784 02:02:11.022905  Write Rank0 MR2 =0xad

  785 02:02:11.025838  [Write Leveling]

  786 02:02:11.028726  delay  byte0  byte1  byte2  byte3

  787 02:02:11.029157  

  788 02:02:11.029574  10    0   0   

  789 02:02:11.032216  11    0   0   

  790 02:02:11.032657  12    0   0   

  791 02:02:11.033000  13    0   0   

  792 02:02:11.035217  14    0   0   

  793 02:02:11.035657  15    0   0   

  794 02:02:11.038268  16    0   0   

  795 02:02:11.038347  17    0   0   

  796 02:02:11.038409  18    0   0   

  797 02:02:11.041865  19    0   0   

  798 02:02:11.041997  20    0   0   

  799 02:02:11.045203  21    0   0   

  800 02:02:11.045281  22    0   0   

  801 02:02:11.045341  23    0   0   

  802 02:02:11.048483  24    0   0   

  803 02:02:11.048560  25    0   0   

  804 02:02:11.051785  26    0   0   

  805 02:02:11.051862  27    0   ff   

  806 02:02:11.055710  28    0   ff   

  807 02:02:11.056144  29    0   ff   

  808 02:02:11.056481  30    0   ff   

  809 02:02:11.059221  31    0   ff   

  810 02:02:11.059658  32    0   ff   

  811 02:02:11.062142  33    ff   ff   

  812 02:02:11.062580  34    ff   ff   

  813 02:02:11.065509  35    ff   ff   

  814 02:02:11.065902  36    ff   ff   

  815 02:02:11.068897  37    ff   ff   

  816 02:02:11.069292  38    ff   ff   

  817 02:02:11.069601  39    ff   ff   

  818 02:02:11.075670  pass bytecount = 0xff (0xff: all bytes pass) 

  819 02:02:11.076063  

  820 02:02:11.076363  DQS0 dly: 33

  821 02:02:11.076638  DQS1 dly: 27

  822 02:02:11.079154  Write Rank0 MR2 =0x2d

  823 02:02:11.082572  [RankSwap] Rank num 2, (Multi 1), Rank 0

  824 02:02:11.085936  Write Rank0 MR1 =0xd6

  825 02:02:11.086353  [Gating]

  826 02:02:11.086656  ==

  827 02:02:11.092682  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  828 02:02:11.093075  fsp= 1, odt_onoff= 1, Byte mode= 0

  829 02:02:11.096152  ==

  830 02:02:11.099693  3 1 0 |3534 3535  |(11 11)(11 11) |(1 1)(1 1)| 0

  831 02:02:11.102767  3 1 4 |3534 807  |(11 11)(11 11) |(1 1)(1 1)| 0

  832 02:02:11.106005  3 1 8 |3534 3535  |(11 11)(11 11) |(0 0)(0 1)| 0

  833 02:02:11.113089  3 1 12 |3534 3535  |(11 11)(11 11) |(0 0)(0 1)| 0

  834 02:02:11.115997  3 1 16 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  835 02:02:11.119659  3 1 20 |3534 3434  |(11 11)(11 11) |(0 0)(0 1)| 0

  836 02:02:11.126758  3 1 24 |3534 201f  |(11 11)(11 11) |(0 0)(1 1)| 0

  837 02:02:11.130012  3 1 28 |1110 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

  838 02:02:11.133525  3 2 0 |403 2625  |(11 11)(11 11) |(1 1)(1 1)| 0

  839 02:02:11.136618  3 2 4 |3d3d 1a1a  |(11 11)(11 11) |(1 1)(1 1)| 0

  840 02:02:11.143015  [Byte 1] Lead/lag Transition tap number (1)

  841 02:02:11.146674  3 2 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(0 0)| 0

  842 02:02:11.150382  3 2 12 |3d3d 3d3c  |(11 11)(11 11) |(1 1)(1 1)| 0

  843 02:02:11.156562  3 2 16 |3d3d 1e1d  |(11 11)(11 11) |(1 1)(1 1)| 0

  844 02:02:11.160065  3 2 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  845 02:02:11.163249  3 2 24 |3d3d 1515  |(11 11)(11 11) |(1 1)(0 0)| 0

  846 02:02:11.166560  3 2 28 |3d3d 2524  |(11 11)(11 11) |(1 1)(1 1)| 0

  847 02:02:11.173830  3 3 0 |3d3d 3b3b  |(11 11)(11 11) |(1 1)(1 1)| 0

  848 02:02:11.176778  3 3 4 |3d3d 201  |(11 11)(11 11) |(1 1)(1 1)| 0

  849 02:02:11.180119  3 3 8 |403 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

  850 02:02:11.183183  [Byte 0] Lead/lag Transition tap number (1)

  851 02:02:11.190088  [Byte 1] Lead/lag falling Transition (3, 3, 8)

  852 02:02:11.193256  3 3 12 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  853 02:02:11.196678  3 3 16 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  854 02:02:11.203259  3 3 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  855 02:02:11.206791  3 3 24 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

  856 02:02:11.210006  3 3 28 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

  857 02:02:11.213490  3 4 0 |e0e 201  |(11 11)(11 11) |(1 1)(1 1)| 0

  858 02:02:11.220295  3 4 4 |3d3d a0a  |(11 11)(11 11) |(1 1)(1 1)| 0

  859 02:02:11.223620  3 4 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  860 02:02:11.227276  3 4 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  861 02:02:11.233580  3 4 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  862 02:02:11.237521  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  863 02:02:11.240358  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  864 02:02:11.243949  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  865 02:02:11.250313  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  866 02:02:11.254057  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  867 02:02:11.256892  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  868 02:02:11.263936  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  869 02:02:11.267014  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  870 02:02:11.270298  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  871 02:02:11.277618  [Byte 0] Lead/lag falling Transition (3, 5, 20)

  872 02:02:11.281246  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

  873 02:02:11.284074  [Byte 0] Lead/lag Transition tap number (2)

  874 02:02:11.287580  [Byte 1] Lead/lag falling Transition (3, 5, 24)

  875 02:02:11.294426  3 5 28 |202 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

  876 02:02:11.297686  [Byte 1] Lead/lag Transition tap number (2)

  877 02:02:11.300725  3 6 0 |4646 605  |(10 10)(11 11) |(0 0)(0 0)| 0

  878 02:02:11.304464  3 6 4 |4646 1616  |(0 0)(1 1) |(0 0)(0 0)| 0

  879 02:02:11.307738  [Byte 0]First pass (3, 6, 4)

  880 02:02:11.310581  3 6 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  881 02:02:11.314260  [Byte 1]First pass (3, 6, 8)

  882 02:02:11.317796  3 6 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  883 02:02:11.321281  3 6 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  884 02:02:11.324213  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  885 02:02:11.331152  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  886 02:02:11.334292  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  887 02:02:11.337439  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  888 02:02:11.341096  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  889 02:02:11.344230  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  890 02:02:11.350783  All bytes gating window > 1UI, Early break!

  891 02:02:11.351223  

  892 02:02:11.354321  best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)

  893 02:02:11.354825  

  894 02:02:11.358070  best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)

  895 02:02:11.358543  

  896 02:02:11.358873  

  897 02:02:11.359178  

  898 02:02:11.361211  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)

  899 02:02:11.361639  

  900 02:02:11.365244  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)

  901 02:02:11.365754  

  902 02:02:11.366089  

  903 02:02:11.367962  Write Rank0 MR1 =0x56

  904 02:02:11.368464  

  905 02:02:11.371368  best RODT dly(2T, 0.5T) = (2, 2)

  906 02:02:11.371799  

  907 02:02:11.374418  best RODT dly(2T, 0.5T) = (2, 2)

  908 02:02:11.374850  ==

  909 02:02:11.378293  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  910 02:02:11.381353  fsp= 1, odt_onoff= 1, Byte mode= 0

  911 02:02:11.384588  ==

  912 02:02:11.387817  Start DQ dly to find pass range UseTestEngine =0

  913 02:02:11.391193  x-axis: bit #, y-axis: DQ dly (-127~63)

  914 02:02:11.391647  RX Vref Scan = 0

  915 02:02:11.394536  -26, [0] xxxxxxxx xxxxxxxx [MSB]

  916 02:02:11.398006  -25, [0] xxxxxxxx xxxxxxxx [MSB]

  917 02:02:11.401234  -24, [0] xxxxxxxx xxxxxxxx [MSB]

  918 02:02:11.404571  -23, [0] xxxxxxxx xxxxxxxx [MSB]

  919 02:02:11.408270  -22, [0] xxxxxxxx xxxxxxxx [MSB]

  920 02:02:11.411641  -21, [0] xxxxxxxx xxxxxxxx [MSB]

  921 02:02:11.412182  -20, [0] xxxxxxxx xxxxxxxx [MSB]

  922 02:02:11.415276  -19, [0] xxxxxxxx xxxxxxxx [MSB]

  923 02:02:11.418166  -18, [0] xxxxxxxx xxxxxxxx [MSB]

  924 02:02:11.421455  -17, [0] xxxxxxxx xxxxxxxx [MSB]

  925 02:02:11.424791  -16, [0] xxxxxxxx xxxxxxxx [MSB]

  926 02:02:11.428203  -15, [0] xxxxxxxx xxxxxxxx [MSB]

  927 02:02:11.431712  -14, [0] xxxxxxxx xxxxxxxx [MSB]

  928 02:02:11.434774  -13, [0] xxxxxxxx xxxxxxxx [MSB]

  929 02:02:11.435198  -12, [0] xxxxxxxx xxxxxxxx [MSB]

  930 02:02:11.438273  -11, [0] xxxxxxxx xxxxxxxx [MSB]

  931 02:02:11.442014  -10, [0] xxxxxxxx xxxxxxxx [MSB]

  932 02:02:11.444917  -9, [0] xxxxxxxx xxxxxxxx [MSB]

  933 02:02:11.448484  -8, [0] xxxxxxxx xxxxxxxx [MSB]

  934 02:02:11.451877  -7, [0] xxxxxxxx xxxxxxxx [MSB]

  935 02:02:11.454960  -6, [0] xxxxxxxx xxxxxxxx [MSB]

  936 02:02:11.455398  -5, [0] xxxxxxxx xxxxxxxx [MSB]

  937 02:02:11.458604  -4, [0] xxxxxxxx xxxxxxxx [MSB]

  938 02:02:11.461820  -3, [0] xxxoxxxx xxxxxxxx [MSB]

  939 02:02:11.465140  -2, [0] xxxoxxxx xxxxxxxx [MSB]

  940 02:02:11.468790  -1, [0] xxxoxoxx xxxxxoxx [MSB]

  941 02:02:11.471912  0, [0] xxxoxoox xxxxxoxx [MSB]

  942 02:02:11.472427  1, [0] xxxoxooo ooxxxoxx [MSB]

  943 02:02:11.475139  2, [0] xxxoxooo ooxoooxx [MSB]

  944 02:02:11.478534  3, [0] xxxoxooo ooxooooo [MSB]

  945 02:02:11.481959  4, [0] xxxoxooo ooxooooo [MSB]

  946 02:02:11.485929  5, [0] xxxoxooo ooxooooo [MSB]

  947 02:02:11.488898  6, [0] xooooooo oooooooo [MSB]

  948 02:02:11.489332  7, [0] xooooooo oooooooo [MSB]

  949 02:02:11.491975  31, [0] oooxoooo oooooooo [MSB]

  950 02:02:11.495496  32, [0] oooxoxoo oooooooo [MSB]

  951 02:02:11.498762  33, [0] oooxoxoo oooooooo [MSB]

  952 02:02:11.502366  34, [0] oooxoxxo ooooooxo [MSB]

  953 02:02:11.505413  35, [0] oooxoxxo xooxooxo [MSB]

  954 02:02:11.505805  36, [0] oooxoxxo xooxooxo [MSB]

  955 02:02:11.508967  37, [0] oooxoxxx xooxxxxo [MSB]

  956 02:02:11.512200  38, [0] oooxoxxx xooxxxxo [MSB]

  957 02:02:11.515532  39, [0] oooxxxxx xxoxxxxx [MSB]

  958 02:02:11.519031  40, [0] oxoxxxxx xxoxxxxx [MSB]

  959 02:02:11.522177  41, [0] oxxxxxxx xxxxxxxx [MSB]

  960 02:02:11.522627  42, [0] xxxxxxxx xxxxxxxx [MSB]

  961 02:02:11.529238  iDelay=42, Bit 0, Center 24 (8 ~ 41) 34

  962 02:02:11.532405  iDelay=42, Bit 1, Center 22 (6 ~ 39) 34

  963 02:02:11.536043  iDelay=42, Bit 2, Center 23 (6 ~ 40) 35

  964 02:02:11.539355  iDelay=42, Bit 3, Center 13 (-3 ~ 30) 34

  965 02:02:11.542636  iDelay=42, Bit 4, Center 22 (6 ~ 38) 33

  966 02:02:11.545744  iDelay=42, Bit 5, Center 15 (-1 ~ 31) 33

  967 02:02:11.549115  iDelay=42, Bit 6, Center 16 (0 ~ 33) 34

  968 02:02:11.552661  iDelay=42, Bit 7, Center 18 (1 ~ 36) 36

  969 02:02:11.556159  iDelay=42, Bit 8, Center 17 (1 ~ 34) 34

  970 02:02:11.559392  iDelay=42, Bit 9, Center 19 (1 ~ 38) 38

  971 02:02:11.562997  iDelay=42, Bit 10, Center 23 (6 ~ 40) 35

  972 02:02:11.566110  iDelay=42, Bit 11, Center 18 (2 ~ 34) 33

  973 02:02:11.569312  iDelay=42, Bit 12, Center 19 (2 ~ 36) 35

  974 02:02:11.572723  iDelay=42, Bit 13, Center 17 (-1 ~ 36) 38

  975 02:02:11.576381  iDelay=42, Bit 14, Center 18 (3 ~ 33) 31

  976 02:02:11.583062  iDelay=42, Bit 15, Center 20 (3 ~ 38) 36

  977 02:02:11.583433  ==

  978 02:02:11.586238  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  979 02:02:11.589641  fsp= 1, odt_onoff= 1, Byte mode= 0

  980 02:02:11.590025  ==

  981 02:02:11.590394  DQS Delay:

  982 02:02:11.593157  DQS0 = 0, DQS1 = 0

  983 02:02:11.593544  DQM Delay:

  984 02:02:11.596502  DQM0 = 19, DQM1 = 18

  985 02:02:11.596887  DQ Delay:

  986 02:02:11.599783  DQ0 =24, DQ1 =22, DQ2 =23, DQ3 =13

  987 02:02:11.603280  DQ4 =22, DQ5 =15, DQ6 =16, DQ7 =18

  988 02:02:11.606914  DQ8 =17, DQ9 =19, DQ10 =23, DQ11 =18

  989 02:02:11.610289  DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20

  990 02:02:11.610763  

  991 02:02:11.611065  

  992 02:02:11.613360  DramC Write-DBI off

  993 02:02:11.613784  ==

  994 02:02:11.616727  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  995 02:02:11.620033  fsp= 1, odt_onoff= 1, Byte mode= 0

  996 02:02:11.620549  ==

  997 02:02:11.623281  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

  998 02:02:11.623802  

  999 02:02:11.626782  Begin, DQ Scan Range 923~1179

 1000 02:02:11.627291  

 1001 02:02:11.627688  

 1002 02:02:11.629997  	TX Vref Scan disable

 1003 02:02:11.633261  923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]

 1004 02:02:11.636722  924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]

 1005 02:02:11.640347  925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]

 1006 02:02:11.643600  926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]

 1007 02:02:11.646815  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 1008 02:02:11.650296  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 1009 02:02:11.653713  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 1010 02:02:11.657565  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 1011 02:02:11.660927  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 1012 02:02:11.663838  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 1013 02:02:11.667175  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1014 02:02:11.674336  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 1015 02:02:11.677282  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 1016 02:02:11.680565  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 1017 02:02:11.684122  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 1018 02:02:11.691842  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 1019 02:02:11.692458  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 1020 02:02:11.693930  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 1021 02:02:11.697196  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 1022 02:02:11.700674  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 1023 02:02:11.704349  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 1024 02:02:11.707210  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 1025 02:02:11.710691  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 1026 02:02:11.714143  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 1027 02:02:11.717838  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 1028 02:02:11.720895  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 1029 02:02:11.724214  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 1030 02:02:11.727450  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 1031 02:02:11.730847  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 1032 02:02:11.734516  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 1033 02:02:11.738044  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1034 02:02:11.744379  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1035 02:02:11.747734  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1036 02:02:11.751245  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1037 02:02:11.754483  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1038 02:02:11.757802  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1039 02:02:11.761375  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1040 02:02:11.764537  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1041 02:02:11.768523  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1042 02:02:11.771662  962 |3 6 2|[0] xxxxxxxx oxxxxxxx [MSB]

 1043 02:02:11.774742  963 |3 6 3|[0] xxxxxxxx oxxoxxxx [MSB]

 1044 02:02:11.778326  964 |3 6 4|[0] xxxxxxxx oxxoxoox [MSB]

 1045 02:02:11.781731  965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]

 1046 02:02:11.784863  966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]

 1047 02:02:11.788382  967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]

 1048 02:02:11.791497  968 |3 6 8|[0] xxxxxxxx oooooooo [MSB]

 1049 02:02:11.794849  969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]

 1050 02:02:11.798153  970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]

 1051 02:02:11.801661  971 |3 6 11|[0] xxxoxoxx oooooooo [MSB]

 1052 02:02:11.805223  972 |3 6 12|[0] xxxoxooo oooooooo [MSB]

 1053 02:02:11.808723  973 |3 6 13|[0] xxxoxooo oooooooo [MSB]

 1054 02:02:11.811906  974 |3 6 14|[0] xxxooooo oooooooo [MSB]

 1055 02:02:11.814909  975 |3 6 15|[0] xxoooooo oooooooo [MSB]

 1056 02:02:11.822894  987 |3 6 27|[0] oooooooo xooooooo [MSB]

 1057 02:02:11.826693  988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]

 1058 02:02:11.829441  989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]

 1059 02:02:11.833244  990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]

 1060 02:02:11.836330  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 1061 02:02:11.839883  992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]

 1062 02:02:11.842880  993 |3 6 33|[0] oooxoxxo xxxxxxxx [MSB]

 1063 02:02:11.846708  994 |3 6 34|[0] oooxoxxo xxxxxxxx [MSB]

 1064 02:02:11.849654  995 |3 6 35|[0] xxxxxxxx xxxxxxxx [MSB]

 1065 02:02:11.853228  Byte0, DQ PI dly=983, DQM PI dly= 983

 1066 02:02:11.856910  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)

 1067 02:02:11.857382  

 1068 02:02:11.863285  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)

 1069 02:02:11.863844  

 1070 02:02:11.866422  Byte1, DQ PI dly=975, DQM PI dly= 975

 1071 02:02:11.870298  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)

 1072 02:02:11.870822  

 1073 02:02:11.873333  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)

 1074 02:02:11.873915  

 1075 02:02:11.874494  ==

 1076 02:02:11.880082  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1077 02:02:11.883499  fsp= 1, odt_onoff= 1, Byte mode= 0

 1078 02:02:11.884045  ==

 1079 02:02:11.887053  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 1080 02:02:11.887640  

 1081 02:02:11.890319  Begin, DQ Scan Range 951~1015

 1082 02:02:11.893218  Write Rank0 MR14 =0x0

 1083 02:02:11.901375  

 1084 02:02:11.901759  	CH=0, VrefRange= 0, VrefLevel = 0

 1085 02:02:11.907642  TX Bit0 (977~994) 18 985,   Bit8 (965~983) 19 974,

 1086 02:02:11.910749  TX Bit1 (977~992) 16 984,   Bit9 (967~984) 18 975,

 1087 02:02:11.917328  TX Bit2 (977~993) 17 985,   Bit10 (970~989) 20 979,

 1088 02:02:11.920815  TX Bit3 (971~988) 18 979,   Bit11 (967~983) 17 975,

 1089 02:02:11.924334  TX Bit4 (976~993) 18 984,   Bit12 (967~985) 19 976,

 1090 02:02:11.930853  TX Bit5 (975~989) 15 982,   Bit13 (967~983) 17 975,

 1091 02:02:11.934471  TX Bit6 (975~990) 16 982,   Bit14 (967~984) 18 975,

 1092 02:02:11.937678  TX Bit7 (975~992) 18 983,   Bit15 (969~988) 20 978,

 1093 02:02:11.938187  

 1094 02:02:11.940723  Write Rank0 MR14 =0x2

 1095 02:02:11.949549  

 1096 02:02:11.950085  	CH=0, VrefRange= 0, VrefLevel = 2

 1097 02:02:11.956164  TX Bit0 (977~995) 19 986,   Bit8 (964~983) 20 973,

 1098 02:02:11.959358  TX Bit1 (976~992) 17 984,   Bit9 (967~985) 19 976,

 1099 02:02:11.966111  TX Bit2 (977~993) 17 985,   Bit10 (969~989) 21 979,

 1100 02:02:11.969571  TX Bit3 (970~989) 20 979,   Bit11 (966~984) 19 975,

 1101 02:02:11.973365  TX Bit4 (976~994) 19 985,   Bit12 (966~985) 20 975,

 1102 02:02:11.980102  TX Bit5 (974~989) 16 981,   Bit13 (967~983) 17 975,

 1103 02:02:11.983339  TX Bit6 (975~990) 16 982,   Bit14 (967~984) 18 975,

 1104 02:02:11.986704  TX Bit7 (975~992) 18 983,   Bit15 (969~988) 20 978,

 1105 02:02:11.987095  

 1106 02:02:11.989660  Write Rank0 MR14 =0x4

 1107 02:02:11.998527  

 1108 02:02:11.998911  	CH=0, VrefRange= 0, VrefLevel = 4

 1109 02:02:12.005353  TX Bit0 (977~996) 20 986,   Bit8 (965~983) 19 974,

 1110 02:02:12.008863  TX Bit1 (977~993) 17 985,   Bit9 (966~986) 21 976,

 1111 02:02:12.015390  TX Bit2 (976~994) 19 985,   Bit10 (969~990) 22 979,

 1112 02:02:12.018887  TX Bit3 (970~989) 20 979,   Bit11 (966~985) 20 975,

 1113 02:02:12.022208  TX Bit4 (976~994) 19 985,   Bit12 (967~986) 20 976,

 1114 02:02:12.028975  TX Bit5 (974~990) 17 982,   Bit13 (967~984) 18 975,

 1115 02:02:12.032100  TX Bit6 (974~991) 18 982,   Bit14 (967~985) 19 976,

 1116 02:02:12.035784  TX Bit7 (975~992) 18 983,   Bit15 (968~989) 22 978,

 1117 02:02:12.036193  

 1118 02:02:12.038956  Write Rank0 MR14 =0x6

 1119 02:02:12.047315  

 1120 02:02:12.047820  	CH=0, VrefRange= 0, VrefLevel = 6

 1121 02:02:12.054626  TX Bit0 (977~996) 20 986,   Bit8 (964~984) 21 974,

 1122 02:02:12.057726  TX Bit1 (977~993) 17 985,   Bit9 (966~986) 21 976,

 1123 02:02:12.061039  TX Bit2 (977~995) 19 986,   Bit10 (969~990) 22 979,

 1124 02:02:12.067881  TX Bit3 (969~990) 22 979,   Bit11 (965~985) 21 975,

 1125 02:02:12.071664  TX Bit4 (976~995) 20 985,   Bit12 (967~987) 21 977,

 1126 02:02:12.077898  TX Bit5 (974~990) 17 982,   Bit13 (966~985) 20 975,

 1127 02:02:12.081101  TX Bit6 (974~991) 18 982,   Bit14 (966~985) 20 975,

 1128 02:02:12.084714  TX Bit7 (975~992) 18 983,   Bit15 (968~989) 22 978,

 1129 02:02:12.085145  

 1130 02:02:12.088060  Write Rank0 MR14 =0x8

 1131 02:02:12.096753  

 1132 02:02:12.097176  	CH=0, VrefRange= 0, VrefLevel = 8

 1133 02:02:12.103369  TX Bit0 (977~997) 21 987,   Bit8 (963~984) 22 973,

 1134 02:02:12.106960  TX Bit1 (976~994) 19 985,   Bit9 (966~987) 22 976,

 1135 02:02:12.113655  TX Bit2 (976~995) 20 985,   Bit10 (969~990) 22 979,

 1136 02:02:12.116977  TX Bit3 (969~990) 22 979,   Bit11 (964~986) 23 975,

 1137 02:02:12.120355  TX Bit4 (976~996) 21 986,   Bit12 (966~987) 22 976,

 1138 02:02:12.127371  TX Bit5 (973~990) 18 981,   Bit13 (965~985) 21 975,

 1139 02:02:12.130545  TX Bit6 (974~991) 18 982,   Bit14 (966~986) 21 976,

 1140 02:02:12.176655  TX Bit7 (974~993) 20 983,   Bit15 (968~989) 22 978,

 1141 02:02:12.177164  

 1142 02:02:12.177500  Write Rank0 MR14 =0xa

 1143 02:02:12.177806  

 1144 02:02:12.178100  	CH=0, VrefRange= 0, VrefLevel = 10

 1145 02:02:12.178767  TX Bit0 (976~997) 22 986,   Bit8 (963~985) 23 974,

 1146 02:02:12.179103  TX Bit1 (976~994) 19 985,   Bit9 (966~988) 23 977,

 1147 02:02:12.179389  TX Bit2 (976~996) 21 986,   Bit10 (969~990) 22 979,

 1148 02:02:12.179666  TX Bit3 (969~990) 22 979,   Bit11 (964~986) 23 975,

 1149 02:02:12.179945  TX Bit4 (975~997) 23 986,   Bit12 (965~988) 24 976,

 1150 02:02:12.180268  TX Bit5 (972~991) 20 981,   Bit13 (965~986) 22 975,

 1151 02:02:12.181346  TX Bit6 (973~991) 19 982,   Bit14 (966~987) 22 976,

 1152 02:02:12.185105  TX Bit7 (974~994) 21 984,   Bit15 (968~989) 22 978,

 1153 02:02:12.185533  

 1154 02:02:12.185859  Write Rank0 MR14 =0xc

 1155 02:02:12.195321  

 1156 02:02:12.198525  	CH=0, VrefRange= 0, VrefLevel = 12

 1157 02:02:12.201960  TX Bit0 (976~997) 22 986,   Bit8 (963~985) 23 974,

 1158 02:02:12.205257  TX Bit1 (976~994) 19 985,   Bit9 (965~988) 24 976,

 1159 02:02:12.212075  TX Bit2 (976~996) 21 986,   Bit10 (969~991) 23 980,

 1160 02:02:12.215365  TX Bit3 (968~990) 23 979,   Bit11 (964~987) 24 975,

 1161 02:02:12.218834  TX Bit4 (975~997) 23 986,   Bit12 (965~988) 24 976,

 1162 02:02:12.225364  TX Bit5 (972~991) 20 981,   Bit13 (964~986) 23 975,

 1163 02:02:12.228728  TX Bit6 (973~992) 20 982,   Bit14 (965~988) 24 976,

 1164 02:02:12.232017  TX Bit7 (973~994) 22 983,   Bit15 (968~989) 22 978,

 1165 02:02:12.232445  

 1166 02:02:12.235419  Write Rank0 MR14 =0xe

 1167 02:02:12.245097  

 1168 02:02:12.247830  	CH=0, VrefRange= 0, VrefLevel = 14

 1169 02:02:12.251641  TX Bit0 (976~998) 23 987,   Bit8 (963~985) 23 974,

 1170 02:02:12.254742  TX Bit1 (976~995) 20 985,   Bit9 (964~988) 25 976,

 1171 02:02:12.261898  TX Bit2 (976~996) 21 986,   Bit10 (968~991) 24 979,

 1172 02:02:12.265582  TX Bit3 (968~991) 24 979,   Bit11 (963~988) 26 975,

 1173 02:02:12.268104  TX Bit4 (975~997) 23 986,   Bit12 (966~989) 24 977,

 1174 02:02:12.275089  TX Bit5 (971~991) 21 981,   Bit13 (963~987) 25 975,

 1175 02:02:12.278286  TX Bit6 (972~992) 21 982,   Bit14 (965~988) 24 976,

 1176 02:02:12.281896  TX Bit7 (973~995) 23 984,   Bit15 (967~990) 24 978,

 1177 02:02:12.282374  

 1178 02:02:12.285355  Write Rank0 MR14 =0x10

 1179 02:02:12.294627  

 1180 02:02:12.297905  	CH=0, VrefRange= 0, VrefLevel = 16

 1181 02:02:12.301343  TX Bit0 (976~998) 23 987,   Bit8 (962~986) 25 974,

 1182 02:02:12.304180  TX Bit1 (976~995) 20 985,   Bit9 (963~989) 27 976,

 1183 02:02:12.311479  TX Bit2 (975~997) 23 986,   Bit10 (968~991) 24 979,

 1184 02:02:12.314280  TX Bit3 (968~991) 24 979,   Bit11 (963~988) 26 975,

 1185 02:02:12.317837  TX Bit4 (974~998) 25 986,   Bit12 (964~989) 26 976,

 1186 02:02:12.324231  TX Bit5 (971~991) 21 981,   Bit13 (964~988) 25 976,

 1187 02:02:12.327713  TX Bit6 (972~993) 22 982,   Bit14 (964~989) 26 976,

 1188 02:02:12.331413  TX Bit7 (973~995) 23 984,   Bit15 (967~990) 24 978,

 1189 02:02:12.331846  

 1190 02:02:12.334454  Write Rank0 MR14 =0x12

 1191 02:02:12.344243  

 1192 02:02:12.345021  	CH=0, VrefRange= 0, VrefLevel = 18

 1193 02:02:12.350772  TX Bit0 (976~999) 24 987,   Bit8 (962~987) 26 974,

 1194 02:02:12.354124  TX Bit1 (975~996) 22 985,   Bit9 (963~989) 27 976,

 1195 02:02:12.360883  TX Bit2 (975~998) 24 986,   Bit10 (968~991) 24 979,

 1196 02:02:12.364118  TX Bit3 (968~991) 24 979,   Bit11 (963~989) 27 976,

 1197 02:02:12.367329  TX Bit4 (974~998) 25 986,   Bit12 (965~989) 25 977,

 1198 02:02:12.374141  TX Bit5 (970~992) 23 981,   Bit13 (963~988) 26 975,

 1199 02:02:12.377630  TX Bit6 (972~993) 22 982,   Bit14 (964~989) 26 976,

 1200 02:02:12.381139  TX Bit7 (972~996) 25 984,   Bit15 (967~990) 24 978,

 1201 02:02:12.381678  

 1202 02:02:12.384409  Write Rank0 MR14 =0x14

 1203 02:02:12.393695  

 1204 02:02:12.397431  	CH=0, VrefRange= 0, VrefLevel = 20

 1205 02:02:12.400229  TX Bit0 (976~999) 24 987,   Bit8 (962~987) 26 974,

 1206 02:02:12.403653  TX Bit1 (975~997) 23 986,   Bit9 (963~988) 26 975,

 1207 02:02:12.410497  TX Bit2 (975~998) 24 986,   Bit10 (968~992) 25 980,

 1208 02:02:12.413772  TX Bit3 (968~991) 24 979,   Bit11 (962~989) 28 975,

 1209 02:02:12.417311  TX Bit4 (974~998) 25 986,   Bit12 (964~989) 26 976,

 1210 02:02:12.424249  TX Bit5 (970~992) 23 981,   Bit13 (963~988) 26 975,

 1211 02:02:12.427590  TX Bit6 (971~993) 23 982,   Bit14 (963~989) 27 976,

 1212 02:02:12.430650  TX Bit7 (971~996) 26 983,   Bit15 (967~991) 25 979,

 1213 02:02:12.431171  

 1214 02:02:12.434081  Write Rank0 MR14 =0x16

 1215 02:02:12.443430  

 1216 02:02:12.446522  	CH=0, VrefRange= 0, VrefLevel = 22

 1217 02:02:12.450298  TX Bit0 (976~999) 24 987,   Bit8 (962~988) 27 975,

 1218 02:02:12.453131  TX Bit1 (975~997) 23 986,   Bit9 (962~989) 28 975,

 1219 02:02:12.460066  TX Bit2 (975~998) 24 986,   Bit10 (968~991) 24 979,

 1220 02:02:12.463829  TX Bit3 (967~991) 25 979,   Bit11 (963~989) 27 976,

 1221 02:02:12.466870  TX Bit4 (974~998) 25 986,   Bit12 (964~989) 26 976,

 1222 02:02:12.473674  TX Bit5 (970~992) 23 981,   Bit13 (963~988) 26 975,

 1223 02:02:12.477096  TX Bit6 (970~994) 25 982,   Bit14 (963~989) 27 976,

 1224 02:02:12.480383  TX Bit7 (971~996) 26 983,   Bit15 (966~991) 26 978,

 1225 02:02:12.480822  

 1226 02:02:12.483594  Write Rank0 MR14 =0x18

 1227 02:02:12.493126  

 1228 02:02:12.496346  	CH=0, VrefRange= 0, VrefLevel = 24

 1229 02:02:12.499490  TX Bit0 (976~999) 24 987,   Bit8 (962~988) 27 975,

 1230 02:02:12.502807  TX Bit1 (974~998) 25 986,   Bit9 (963~988) 26 975,

 1231 02:02:12.510264  TX Bit2 (975~998) 24 986,   Bit10 (967~991) 25 979,

 1232 02:02:12.513287  TX Bit3 (968~992) 25 980,   Bit11 (963~988) 26 975,

 1233 02:02:12.516508  TX Bit4 (974~998) 25 986,   Bit12 (963~989) 27 976,

 1234 02:02:12.523755  TX Bit5 (969~993) 25 981,   Bit13 (963~988) 26 975,

 1235 02:02:12.526724  TX Bit6 (970~995) 26 982,   Bit14 (963~989) 27 976,

 1236 02:02:12.530321  TX Bit7 (972~995) 24 983,   Bit15 (966~990) 25 978,

 1237 02:02:12.530758  

 1238 02:02:12.533322  Write Rank0 MR14 =0x1a

 1239 02:02:12.542813  

 1240 02:02:12.545939  	CH=0, VrefRange= 0, VrefLevel = 26

 1241 02:02:12.549524  TX Bit0 (976~999) 24 987,   Bit8 (962~988) 27 975,

 1242 02:02:12.553035  TX Bit1 (974~998) 25 986,   Bit9 (963~988) 26 975,

 1243 02:02:12.559258  TX Bit2 (975~998) 24 986,   Bit10 (967~991) 25 979,

 1244 02:02:12.562764  TX Bit3 (968~992) 25 980,   Bit11 (963~988) 26 975,

 1245 02:02:12.566301  TX Bit4 (974~998) 25 986,   Bit12 (963~989) 27 976,

 1246 02:02:12.572894  TX Bit5 (969~993) 25 981,   Bit13 (963~988) 26 975,

 1247 02:02:12.576125  TX Bit6 (970~995) 26 982,   Bit14 (963~989) 27 976,

 1248 02:02:12.579581  TX Bit7 (972~995) 24 983,   Bit15 (966~990) 25 978,

 1249 02:02:12.580092  

 1250 02:02:12.583487  Write Rank0 MR14 =0x1c

 1251 02:02:12.592461  

 1252 02:02:12.595763  	CH=0, VrefRange= 0, VrefLevel = 28

 1253 02:02:12.599358  TX Bit0 (976~999) 24 987,   Bit8 (962~988) 27 975,

 1254 02:02:12.602671  TX Bit1 (974~998) 25 986,   Bit9 (963~988) 26 975,

 1255 02:02:12.609035  TX Bit2 (975~998) 24 986,   Bit10 (967~991) 25 979,

 1256 02:02:12.612766  TX Bit3 (968~992) 25 980,   Bit11 (963~988) 26 975,

 1257 02:02:12.615921  TX Bit4 (974~998) 25 986,   Bit12 (963~989) 27 976,

 1258 02:02:12.622826  TX Bit5 (969~993) 25 981,   Bit13 (963~988) 26 975,

 1259 02:02:12.625804  TX Bit6 (970~995) 26 982,   Bit14 (963~989) 27 976,

 1260 02:02:12.629623  TX Bit7 (972~995) 24 983,   Bit15 (966~990) 25 978,

 1261 02:02:12.630141  

 1262 02:02:12.632379  Write Rank0 MR14 =0x1e

 1263 02:02:12.642547  

 1264 02:02:12.645739  	CH=0, VrefRange= 0, VrefLevel = 30

 1265 02:02:12.648730  TX Bit0 (976~999) 24 987,   Bit8 (962~988) 27 975,

 1266 02:02:12.652308  TX Bit1 (974~998) 25 986,   Bit9 (963~988) 26 975,

 1267 02:02:12.655565  TX Bit2 (975~998) 24 986,   Bit10 (967~991) 25 979,

 1268 02:02:12.662080  TX Bit3 (968~992) 25 980,   Bit11 (963~988) 26 975,

 1269 02:02:12.665591  TX Bit4 (974~998) 25 986,   Bit12 (963~989) 27 976,

 1270 02:02:12.672705  TX Bit5 (969~993) 25 981,   Bit13 (963~988) 26 975,

 1271 02:02:12.676232  TX Bit6 (970~995) 26 982,   Bit14 (963~989) 27 976,

 1272 02:02:12.679059  TX Bit7 (972~995) 24 983,   Bit15 (966~990) 25 978,

 1273 02:02:12.679619  

 1274 02:02:12.680270  

 1275 02:02:12.682295  TX Vref found, early break! 378< 386

 1276 02:02:12.689349  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 1277 02:02:12.692495  u1DelayCellOfst[0]=8 cells (7 PI)

 1278 02:02:12.695835  u1DelayCellOfst[1]=7 cells (6 PI)

 1279 02:02:12.696273  u1DelayCellOfst[2]=7 cells (6 PI)

 1280 02:02:12.699458  u1DelayCellOfst[3]=0 cells (0 PI)

 1281 02:02:12.702869  u1DelayCellOfst[4]=7 cells (6 PI)

 1282 02:02:12.705817  u1DelayCellOfst[5]=1 cells (1 PI)

 1283 02:02:12.709120  u1DelayCellOfst[6]=2 cells (2 PI)

 1284 02:02:12.712842  u1DelayCellOfst[7]=3 cells (3 PI)

 1285 02:02:12.716181  Byte0, DQ PI dly=980, DQM PI dly= 983

 1286 02:02:12.719329  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)

 1287 02:02:12.719727  

 1288 02:02:12.725771  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)

 1289 02:02:12.726169  

 1290 02:02:12.729334  u1DelayCellOfst[8]=0 cells (0 PI)

 1291 02:02:12.729735  u1DelayCellOfst[9]=0 cells (0 PI)

 1292 02:02:12.732880  u1DelayCellOfst[10]=5 cells (4 PI)

 1293 02:02:12.736384  u1DelayCellOfst[11]=0 cells (0 PI)

 1294 02:02:12.739390  u1DelayCellOfst[12]=1 cells (1 PI)

 1295 02:02:12.742545  u1DelayCellOfst[13]=0 cells (0 PI)

 1296 02:02:12.745887  u1DelayCellOfst[14]=1 cells (1 PI)

 1297 02:02:12.749647  u1DelayCellOfst[15]=3 cells (3 PI)

 1298 02:02:12.752958  Byte1, DQ PI dly=975, DQM PI dly= 977

 1299 02:02:12.756574  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)

 1300 02:02:12.756969  

 1301 02:02:12.763070  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)

 1302 02:02:12.763464  

 1303 02:02:12.763772  Write Rank0 MR14 =0x18

 1304 02:02:12.764053  

 1305 02:02:12.766359  Final TX Range 0 Vref 24

 1306 02:02:12.766753  

 1307 02:02:12.772836  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 1308 02:02:12.773227  

 1309 02:02:12.779672  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 1310 02:02:12.786018  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 1311 02:02:12.792857  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 1312 02:02:12.796529  Write Rank0 MR3 =0xb0

 1313 02:02:12.796910  DramC Write-DBI on

 1314 02:02:12.797202  ==

 1315 02:02:12.803253  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1316 02:02:12.806946  fsp= 1, odt_onoff= 1, Byte mode= 0

 1317 02:02:12.807414  ==

 1318 02:02:12.810014  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 1319 02:02:12.810551  

 1320 02:02:12.813201  Begin, DQ Scan Range 697~761

 1321 02:02:12.813830  

 1322 02:02:12.814347  

 1323 02:02:12.816644  	TX Vref Scan disable

 1324 02:02:12.819902  697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1325 02:02:12.823767  698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1326 02:02:12.826486  699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1327 02:02:12.829931  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1328 02:02:12.833316  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1329 02:02:12.836828  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1330 02:02:12.840031  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1331 02:02:12.843336  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1332 02:02:12.847205  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1333 02:02:12.850084  706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]

 1334 02:02:12.853626  707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]

 1335 02:02:12.856796  708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]

 1336 02:02:12.860237  709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]

 1337 02:02:12.863813  710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]

 1338 02:02:12.867269  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 1339 02:02:12.870329  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 1340 02:02:12.873514  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 1341 02:02:12.882891  734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]

 1342 02:02:12.886330  735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]

 1343 02:02:12.889349  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 1344 02:02:12.892607  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 1345 02:02:12.896415  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 1346 02:02:12.899518  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 1347 02:02:12.902747  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 1348 02:02:12.906034  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 1349 02:02:12.909641  742 |2 6 38|[0] xxxxxxxx xxxxxxxx [MSB]

 1350 02:02:12.912912  Byte0, DQ PI dly=727, DQM PI dly= 727

 1351 02:02:12.916355  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)

 1352 02:02:12.916862  

 1353 02:02:12.922922  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)

 1354 02:02:12.923347  

 1355 02:02:12.926142  Byte1, DQ PI dly=719, DQM PI dly= 719

 1356 02:02:12.929780  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 15)

 1357 02:02:12.930372  

 1358 02:02:12.933297  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 15)

 1359 02:02:12.933805  

 1360 02:02:12.939627  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 1361 02:02:12.946830  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 1362 02:02:12.953112  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 1363 02:02:12.956561  Write Rank0 MR3 =0x30

 1364 02:02:12.959793  DramC Write-DBI off

 1365 02:02:12.960222  

 1366 02:02:12.960553  [DATLAT]

 1367 02:02:12.963121  Freq=1600, CH0 RK0, use_rxtx_scan=0

 1368 02:02:12.963552  

 1369 02:02:12.963885  DATLAT Default: 0xf

 1370 02:02:12.966820  7, 0xFFFF, sum=0

 1371 02:02:12.967256  8, 0xFFFF, sum=0

 1372 02:02:12.970123  9, 0xFFFF, sum=0

 1373 02:02:12.970731  10, 0xFFFF, sum=0

 1374 02:02:12.973299  11, 0xFFFF, sum=0

 1375 02:02:12.973735  12, 0xFFFF, sum=0

 1376 02:02:12.976738  13, 0xFFFF, sum=0

 1377 02:02:12.977174  14, 0x0, sum=1

 1378 02:02:12.980728  15, 0x0, sum=2

 1379 02:02:12.981278  16, 0x0, sum=3

 1380 02:02:12.981628  17, 0x0, sum=4

 1381 02:02:12.986696  pattern=2 first_step=14 total pass=5 best_step=16

 1382 02:02:12.987137  ==

 1383 02:02:12.990358  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1384 02:02:12.993284  fsp= 1, odt_onoff= 1, Byte mode= 0

 1385 02:02:12.993718  ==

 1386 02:02:12.999998  Start DQ dly to find pass range UseTestEngine =1

 1387 02:02:13.003464  x-axis: bit #, y-axis: DQ dly (-127~63)

 1388 02:02:13.003901  RX Vref Scan = 1

 1389 02:02:13.118931  

 1390 02:02:13.119440  RX Vref found, early break!

 1391 02:02:13.119779  

 1392 02:02:13.122178  Final RX Vref 12, apply to both rank0 and 1

 1393 02:02:13.125447  ==

 1394 02:02:13.128857  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1395 02:02:13.132067  fsp= 1, odt_onoff= 1, Byte mode= 0

 1396 02:02:13.132500  ==

 1397 02:02:13.132825  DQS Delay:

 1398 02:02:13.135516  DQS0 = 0, DQS1 = 0

 1399 02:02:13.135934  DQM Delay:

 1400 02:02:13.138807  DQM0 = 19, DQM1 = 18

 1401 02:02:13.139303  DQ Delay:

 1402 02:02:13.142402  DQ0 =24, DQ1 =23, DQ2 =23, DQ3 =13

 1403 02:02:13.145432  DQ4 =22, DQ5 =14, DQ6 =16, DQ7 =18

 1404 02:02:13.148814  DQ8 =18, DQ9 =19, DQ10 =22, DQ11 =17

 1405 02:02:13.152246  DQ12 =19, DQ13 =16, DQ14 =17, DQ15 =20

 1406 02:02:13.152689  

 1407 02:02:13.153016  

 1408 02:02:13.153314  

 1409 02:02:13.155985  [DramC_TX_OE_Calibration] TA2

 1410 02:02:13.158978  Original DQ_B0 (3 6) =30, OEN = 27

 1411 02:02:13.162195  Original DQ_B1 (3 6) =30, OEN = 27

 1412 02:02:13.162675  23, 0x0, End_B0=23 End_B1=23

 1413 02:02:13.166206  24, 0x0, End_B0=24 End_B1=24

 1414 02:02:13.169765  25, 0x0, End_B0=25 End_B1=25

 1415 02:02:13.172422  26, 0x0, End_B0=26 End_B1=26

 1416 02:02:13.175645  27, 0x0, End_B0=27 End_B1=27

 1417 02:02:13.176075  28, 0x0, End_B0=28 End_B1=28

 1418 02:02:13.179159  29, 0x0, End_B0=29 End_B1=29

 1419 02:02:13.182529  30, 0x0, End_B0=30 End_B1=30

 1420 02:02:13.185830  31, 0xFFFF, End_B0=30 End_B1=30

 1421 02:02:13.188952  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 1422 02:02:13.195730  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 1423 02:02:13.196231  

 1424 02:02:13.196562  

 1425 02:02:13.199110  Write Rank0 MR23 =0x3f

 1426 02:02:13.199534  [DQSOSC]

 1427 02:02:13.206151  [DQSOSCAuto] RK0, (LSB)MR18= 0xa2, (MSB)MR19= 0x3, tDQSOscB0 = 338 ps tDQSOscB1 = 0 ps

 1428 02:02:13.212865  CH0_RK0: MR19=0x3, MR18=0xA2, DQSOSC=338, MR23=63, INC=21, DEC=32

 1429 02:02:13.215995  Write Rank0 MR23 =0x3f

 1430 02:02:13.216580  [DQSOSC]

 1431 02:02:13.222787  [DQSOSCAuto] RK0, (LSB)MR18= 0x9d, (MSB)MR19= 0x3, tDQSOscB0 = 340 ps tDQSOscB1 = 0 ps

 1432 02:02:13.225993  CH0 RK0: MR19=3, MR18=9D

 1433 02:02:13.229294  [RankSwap] Rank num 2, (Multi 1), Rank 1

 1434 02:02:13.229717  Write Rank0 MR2 =0xad

 1435 02:02:13.232707  [Write Leveling]

 1436 02:02:13.236266  delay  byte0  byte1  byte2  byte3

 1437 02:02:13.236691  

 1438 02:02:13.237184  10    0   0   

 1439 02:02:13.239487  11    0   0   

 1440 02:02:13.240088  12    0   0   

 1441 02:02:13.243016  13    0   0   

 1442 02:02:13.243562  14    0   0   

 1443 02:02:13.243936  15    0   0   

 1444 02:02:13.246033  16    0   0   

 1445 02:02:13.246544  17    0   0   

 1446 02:02:13.249451  18    0   0   

 1447 02:02:13.250054  19    0   0   

 1448 02:02:13.250651  20    0   0   

 1449 02:02:13.252840  21    0   0   

 1450 02:02:13.253270  22    0   0   

 1451 02:02:13.256331  23    0   0   

 1452 02:02:13.256760  24    0   0   

 1453 02:02:13.257093  25    0   0   

 1454 02:02:13.259423  26    0   0   

 1455 02:02:13.259851  27    0   0   

 1456 02:02:13.262965  28    0   0   

 1457 02:02:13.263526  29    0   ff   

 1458 02:02:13.266497  30    0   ff   

 1459 02:02:13.266956  31    0   ff   

 1460 02:02:13.267397  32    0   ff   

 1461 02:02:13.269457  33    0   ff   

 1462 02:02:13.269843  34    ff   ff   

 1463 02:02:13.273186  35    ff   ff   

 1464 02:02:13.273579  36    ff   ff   

 1465 02:02:13.276412  37    ff   ff   

 1466 02:02:13.276799  38    ff   ff   

 1467 02:02:13.279547  39    ff   ff   

 1468 02:02:13.279940  40    ff   ff   

 1469 02:02:13.282999  pass bytecount = 0xff (0xff: all bytes pass) 

 1470 02:02:13.283387  

 1471 02:02:13.286304  DQS0 dly: 34

 1472 02:02:13.286690  DQS1 dly: 29

 1473 02:02:13.289554  Write Rank0 MR2 =0x2d

 1474 02:02:13.293186  [RankSwap] Rank num 2, (Multi 1), Rank 0

 1475 02:02:13.293653  Write Rank1 MR1 =0xd6

 1476 02:02:13.296547  [Gating]

 1477 02:02:13.297024  ==

 1478 02:02:13.299657  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1479 02:02:13.302904  fsp= 1, odt_onoff= 1, Byte mode= 0

 1480 02:02:13.303308  ==

 1481 02:02:13.306191  3 1 0 |3534 3535  |(11 11)(0 0) |(0 0)(0 0)| 0

 1482 02:02:13.312993  3 1 4 |3534 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 1483 02:02:13.316293  3 1 8 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1484 02:02:13.320084  3 1 12 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1485 02:02:13.326534  3 1 16 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1486 02:02:13.329836  3 1 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1487 02:02:13.333072  3 1 24 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1488 02:02:13.339545  3 1 28 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1489 02:02:13.343378  3 2 0 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1490 02:02:13.346729  3 2 4 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 1491 02:02:13.353074  3 2 8 |1211 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1492 02:02:13.356416  3 2 12 |3d3d 201  |(11 11)(11 11) |(1 1)(1 1)| 0

 1493 02:02:13.359930  3 2 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1494 02:02:13.363071  3 2 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1495 02:02:13.369495  3 2 24 |3d3d 605  |(11 11)(11 11) |(1 1)(1 1)| 0

 1496 02:02:13.373248  3 2 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1497 02:02:13.376362  3 3 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1498 02:02:13.383255  3 3 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1499 02:02:13.386441  3 3 8 |3d3d 3d3c  |(11 11)(11 11) |(1 1)(1 1)| 0

 1500 02:02:13.389763  3 3 12 |3d3d 1716  |(11 11)(11 11) |(1 1)(1 1)| 0

 1501 02:02:13.393338  3 3 16 |605 201  |(11 11)(11 11) |(1 1)(1 1)| 0

 1502 02:02:13.400047  3 3 20 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1503 02:02:13.403401  [Byte 0] Lead/lag Transition tap number (1)

 1504 02:02:13.406436  [Byte 1] Lead/lag falling Transition (3, 3, 20)

 1505 02:02:13.409861  3 3 24 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1506 02:02:13.416666  3 3 28 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1507 02:02:13.420233  3 4 0 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1508 02:02:13.423484  3 4 4 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 1509 02:02:13.430257  3 4 8 |706 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1510 02:02:13.433467  3 4 12 |3d3d 403  |(11 11)(11 11) |(1 1)(1 1)| 0

 1511 02:02:13.436559  3 4 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1512 02:02:13.440703  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1513 02:02:13.447028  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1514 02:02:13.450563  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1515 02:02:13.453975  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1516 02:02:13.460486  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1517 02:02:13.463874  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1518 02:02:13.467349  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1519 02:02:13.473810  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1520 02:02:13.476998  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1521 02:02:13.480409  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1522 02:02:13.487279  3 5 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1523 02:02:13.490772  [Byte 0] Lead/lag falling Transition (3, 5, 28)

 1524 02:02:13.494325  3 6 0 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 1525 02:02:13.497904  [Byte 1] Lead/lag falling Transition (3, 6, 0)

 1526 02:02:13.504438  3 6 4 |3e3d 3d3d  |(11 11)(11 11) |(1 0)(1 0)| 0

 1527 02:02:13.507262  [Byte 0] Lead/lag Transition tap number (3)

 1528 02:02:13.510926  [Byte 1] Lead/lag Transition tap number (2)

 1529 02:02:13.514358  3 6 8 |202 3d3d  |(11 11)(11 11) |(0 0)(0 0)| 0

 1530 02:02:13.517362  3 6 12 |4646 202  |(10 10)(11 11) |(0 0)(0 0)| 0

 1531 02:02:13.524556  3 6 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1532 02:02:13.525112  [Byte 0]First pass (3, 6, 16)

 1533 02:02:13.527754  [Byte 1]First pass (3, 6, 16)

 1534 02:02:13.531147  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1535 02:02:13.537526  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1536 02:02:13.541450  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1537 02:02:13.544644  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1538 02:02:13.547946  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1539 02:02:13.551178  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1540 02:02:13.557750  3 7 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1541 02:02:13.561741  3 7 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1542 02:02:13.564391  All bytes gating window > 1UI, Early break!

 1543 02:02:13.565011  

 1544 02:02:13.568178  best DQS0 dly(2T, 0.5T, PI) = (3, 6, 2)

 1545 02:02:13.568605  

 1546 02:02:13.571467  best DQS1 dly(2T, 0.5T, PI) = (3, 6, 4)

 1547 02:02:13.572004  

 1548 02:02:13.572341  

 1549 02:02:13.572648  

 1550 02:02:13.574622  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 2)

 1551 02:02:13.575096  

 1552 02:02:13.581115  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 4)

 1553 02:02:13.581564  

 1554 02:02:13.581892  

 1555 02:02:13.582200  Write Rank1 MR1 =0x56

 1556 02:02:13.582555  

 1557 02:02:13.584472  best RODT dly(2T, 0.5T) = (2, 3)

 1558 02:02:13.584899  

 1559 02:02:13.587776  best RODT dly(2T, 0.5T) = (2, 3)

 1560 02:02:13.588200  ==

 1561 02:02:13.594808  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1562 02:02:13.598034  fsp= 1, odt_onoff= 1, Byte mode= 0

 1563 02:02:13.598519  ==

 1564 02:02:13.601660  Start DQ dly to find pass range UseTestEngine =0

 1565 02:02:13.605232  x-axis: bit #, y-axis: DQ dly (-127~63)

 1566 02:02:13.608437  RX Vref Scan = 0

 1567 02:02:13.608881  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 1568 02:02:13.611718  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 1569 02:02:13.614848  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 1570 02:02:13.618324  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 1571 02:02:13.622128  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 1572 02:02:13.625142  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 1573 02:02:13.628383  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 1574 02:02:13.628845  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 1575 02:02:13.631879  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 1576 02:02:13.634799  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 1577 02:02:13.637882  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 1578 02:02:13.641884  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 1579 02:02:13.645154  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 1580 02:02:13.647999  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 1581 02:02:13.651693  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 1582 02:02:13.655124  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 1583 02:02:13.655561  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 1584 02:02:13.658379  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 1585 02:02:13.661639  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 1586 02:02:13.665134  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 1587 02:02:13.668167  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 1588 02:02:13.671717  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 1589 02:02:13.675107  -4, [0] xxxoxxxx xxxxxxxx [MSB]

 1590 02:02:13.675713  -3, [0] xxxoxxxx xxxxxxxx [MSB]

 1591 02:02:13.678751  -2, [0] xxxoxxxo xxxxxxxx [MSB]

 1592 02:02:13.681730  -1, [0] xxxoxoxo xxxxxxxx [MSB]

 1593 02:02:13.685174  0, [0] xxxoxooo ooxoooxx [MSB]

 1594 02:02:13.688284  1, [0] xxxoxooo ooxoooox [MSB]

 1595 02:02:13.691928  2, [0] xxxoxooo ooxooooo [MSB]

 1596 02:02:13.692394  3, [0] xxxoxooo ooxooooo [MSB]

 1597 02:02:13.694958  4, [0] xxxoxooo ooxooooo [MSB]

 1598 02:02:13.698386  5, [0] xooooooo oooooooo [MSB]

 1599 02:02:13.701964  6, [0] xooooooo oooooooo [MSB]

 1600 02:02:13.705450  33, [0] oooxoooo oooooooo [MSB]

 1601 02:02:13.708704  34, [0] oooxoxoo oooooooo [MSB]

 1602 02:02:13.709099  35, [0] oooxoxoo oooxooxo [MSB]

 1603 02:02:13.712238  36, [0] oooxoxxx xooxooxo [MSB]

 1604 02:02:13.715216  37, [0] oooxoxxx xooxoxxo [MSB]

 1605 02:02:13.718660  38, [0] oooxoxxx xxoxxxxo [MSB]

 1606 02:02:13.722086  39, [0] oooxoxxx xxoxxxxo [MSB]

 1607 02:02:13.725843  40, [0] oxoxxxxx xxoxxxxx [MSB]

 1608 02:02:13.726382  41, [0] oxxxxxxx xxoxxxxx [MSB]

 1609 02:02:13.728699  42, [0] xxxxxxxx xxxxxxxx [MSB]

 1610 02:02:13.732022  iDelay=42, Bit 0, Center 24 (7 ~ 41) 35

 1611 02:02:13.735345  iDelay=42, Bit 1, Center 22 (5 ~ 39) 35

 1612 02:02:13.738840  iDelay=42, Bit 2, Center 22 (5 ~ 40) 36

 1613 02:02:13.745713  iDelay=42, Bit 3, Center 14 (-4 ~ 32) 37

 1614 02:02:13.748944  iDelay=42, Bit 4, Center 22 (5 ~ 39) 35

 1615 02:02:13.752346  iDelay=42, Bit 5, Center 16 (-1 ~ 33) 35

 1616 02:02:13.755614  iDelay=42, Bit 6, Center 17 (0 ~ 35) 36

 1617 02:02:13.759021  iDelay=42, Bit 7, Center 16 (-2 ~ 35) 38

 1618 02:02:13.762485  iDelay=42, Bit 8, Center 17 (0 ~ 35) 36

 1619 02:02:13.765779  iDelay=42, Bit 9, Center 18 (0 ~ 37) 38

 1620 02:02:13.769349  iDelay=42, Bit 10, Center 23 (5 ~ 41) 37

 1621 02:02:13.772583  iDelay=42, Bit 11, Center 17 (0 ~ 34) 35

 1622 02:02:13.775785  iDelay=42, Bit 12, Center 18 (0 ~ 37) 38

 1623 02:02:13.779461  iDelay=42, Bit 13, Center 18 (0 ~ 36) 37

 1624 02:02:13.782563  iDelay=42, Bit 14, Center 17 (1 ~ 34) 34

 1625 02:02:13.785860  iDelay=42, Bit 15, Center 20 (2 ~ 39) 38

 1626 02:02:13.786280  ==

 1627 02:02:13.792684  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1628 02:02:13.795958  fsp= 1, odt_onoff= 1, Byte mode= 0

 1629 02:02:13.796494  ==

 1630 02:02:13.796811  DQS Delay:

 1631 02:02:13.799164  DQS0 = 0, DQS1 = 0

 1632 02:02:13.799548  DQM Delay:

 1633 02:02:13.802857  DQM0 = 19, DQM1 = 18

 1634 02:02:13.803242  DQ Delay:

 1635 02:02:13.806334  DQ0 =24, DQ1 =22, DQ2 =22, DQ3 =14

 1636 02:02:13.809721  DQ4 =22, DQ5 =16, DQ6 =17, DQ7 =16

 1637 02:02:13.812650  DQ8 =17, DQ9 =18, DQ10 =23, DQ11 =17

 1638 02:02:13.816167  DQ12 =18, DQ13 =18, DQ14 =17, DQ15 =20

 1639 02:02:13.816717  

 1640 02:02:13.817154  

 1641 02:02:13.817569  DramC Write-DBI off

 1642 02:02:13.817972  ==

 1643 02:02:13.823484  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1644 02:02:13.827070  fsp= 1, odt_onoff= 1, Byte mode= 0

 1645 02:02:13.827676  ==

 1646 02:02:13.829503  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 1647 02:02:13.829889  

 1648 02:02:13.833128  Begin, DQ Scan Range 925~1181

 1649 02:02:13.833596  

 1650 02:02:13.833898  

 1651 02:02:13.836370  	TX Vref Scan disable

 1652 02:02:13.839978  925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]

 1653 02:02:13.843412  926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]

 1654 02:02:13.846691  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 1655 02:02:13.850045  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 1656 02:02:13.853341  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 1657 02:02:13.856641  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 1658 02:02:13.859955  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 1659 02:02:13.863032  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 1660 02:02:13.866681  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1661 02:02:13.870149  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 1662 02:02:13.873853  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 1663 02:02:13.876925  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 1664 02:02:13.880118  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 1665 02:02:13.886803  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 1666 02:02:13.890426  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 1667 02:02:13.893799  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 1668 02:02:13.896981  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 1669 02:02:13.900841  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 1670 02:02:13.903452  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 1671 02:02:13.906811  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 1672 02:02:13.910133  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 1673 02:02:13.914317  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 1674 02:02:13.916916  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 1675 02:02:13.920259  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 1676 02:02:13.923842  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 1677 02:02:13.927039  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 1678 02:02:13.930624  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 1679 02:02:13.933552  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 1680 02:02:13.937321  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1681 02:02:13.940162  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1682 02:02:13.943638  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1683 02:02:13.946858  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1684 02:02:13.953556  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1685 02:02:13.956943  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1686 02:02:13.960586  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1687 02:02:13.963806  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1688 02:02:13.967248  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1689 02:02:13.970357  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 1690 02:02:13.974012  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 1691 02:02:13.976623  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 1692 02:02:13.980192  965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 1693 02:02:13.983373  966 |3 6 6|[0] xxxxxxxx oxxxxxxx [MSB]

 1694 02:02:13.987482  967 |3 6 7|[0] xxxxxxxx ooxoxoox [MSB]

 1695 02:02:13.990632  968 |3 6 8|[0] xxxxxxxx ooxooooo [MSB]

 1696 02:02:13.993750  969 |3 6 9|[0] xxxxxxxx ooxooooo [MSB]

 1697 02:02:13.996943  970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]

 1698 02:02:14.000290  971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]

 1699 02:02:14.003532  972 |3 6 12|[0] xxxoxxox oooooooo [MSB]

 1700 02:02:14.006809  973 |3 6 13|[0] xxxoxoox oooooooo [MSB]

 1701 02:02:14.010431  974 |3 6 14|[0] xxxoxoox oooooooo [MSB]

 1702 02:02:14.013494  975 |3 6 15|[0] xxxoxoox oooooooo [MSB]

 1703 02:02:14.017188  976 |3 6 16|[0] xxxooooo oooooooo [MSB]

 1704 02:02:14.024858  989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]

 1705 02:02:14.028198  990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]

 1706 02:02:14.031728  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 1707 02:02:14.034885  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 1708 02:02:14.038756  993 |3 6 33|[0] oooxoxoo xxxxxxxx [MSB]

 1709 02:02:14.041731  994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]

 1710 02:02:14.044984  995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]

 1711 02:02:14.048789  996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]

 1712 02:02:14.051614  997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1713 02:02:14.054965  Byte0, DQ PI dly=984, DQM PI dly= 984

 1714 02:02:14.058697  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)

 1715 02:02:14.058774  

 1716 02:02:14.065107  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)

 1717 02:02:14.065184  

 1718 02:02:14.068494  Byte1, DQ PI dly=978, DQM PI dly= 978

 1719 02:02:14.071984  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)

 1720 02:02:14.072060  

 1721 02:02:14.075196  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)

 1722 02:02:14.075273  

 1723 02:02:14.075332  ==

 1724 02:02:14.082130  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1725 02:02:14.085342  fsp= 1, odt_onoff= 1, Byte mode= 0

 1726 02:02:14.085419  ==

 1727 02:02:14.088826  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 1728 02:02:14.088903  

 1729 02:02:14.092329  Begin, DQ Scan Range 954~1018

 1730 02:02:14.095596  Write Rank1 MR14 =0x0

 1731 02:02:14.102950  

 1732 02:02:14.103034  	CH=0, VrefRange= 0, VrefLevel = 0

 1733 02:02:14.109600  TX Bit0 (979~997) 19 988,   Bit8 (968~986) 19 977,

 1734 02:02:14.113192  TX Bit1 (978~995) 18 986,   Bit9 (968~987) 20 977,

 1735 02:02:14.119778  TX Bit2 (978~995) 18 986,   Bit10 (974~990) 17 982,

 1736 02:02:14.123517  TX Bit3 (974~990) 17 982,   Bit11 (968~986) 19 977,

 1737 02:02:14.126648  TX Bit4 (977~996) 20 986,   Bit12 (969~988) 20 978,

 1738 02:02:14.133260  TX Bit5 (975~990) 16 982,   Bit13 (969~985) 17 977,

 1739 02:02:14.136507  TX Bit6 (976~991) 16 983,   Bit14 (969~987) 19 978,

 1740 02:02:14.140107  TX Bit7 (977~992) 16 984,   Bit15 (970~990) 21 980,

 1741 02:02:14.140325  

 1742 02:02:14.143098  Write Rank1 MR14 =0x2

 1743 02:02:14.151663  

 1744 02:02:14.151888  	CH=0, VrefRange= 0, VrefLevel = 2

 1745 02:02:14.158373  TX Bit0 (978~997) 20 987,   Bit8 (967~986) 20 976,

 1746 02:02:14.161801  TX Bit1 (978~996) 19 987,   Bit9 (968~988) 21 978,

 1747 02:02:14.168576  TX Bit2 (977~996) 20 986,   Bit10 (973~990) 18 981,

 1748 02:02:14.172052  TX Bit3 (974~990) 17 982,   Bit11 (968~986) 19 977,

 1749 02:02:14.175785  TX Bit4 (977~997) 21 987,   Bit12 (969~988) 20 978,

 1750 02:02:14.182189  TX Bit5 (975~990) 16 982,   Bit13 (968~985) 18 976,

 1751 02:02:14.186112  TX Bit6 (975~991) 17 983,   Bit14 (969~988) 20 978,

 1752 02:02:14.188865  TX Bit7 (977~993) 17 985,   Bit15 (970~990) 21 980,

 1753 02:02:14.189295  

 1754 02:02:14.191875  Write Rank1 MR14 =0x4

 1755 02:02:14.201122  

 1756 02:02:14.201641  	CH=0, VrefRange= 0, VrefLevel = 4

 1757 02:02:14.207493  TX Bit0 (978~998) 21 988,   Bit8 (967~987) 21 977,

 1758 02:02:14.211105  TX Bit1 (977~997) 21 987,   Bit9 (968~988) 21 978,

 1759 02:02:14.217585  TX Bit2 (977~997) 21 987,   Bit10 (973~990) 18 981,

 1760 02:02:14.221269  TX Bit3 (973~990) 18 981,   Bit11 (968~987) 20 977,

 1761 02:02:14.224745  TX Bit4 (977~997) 21 987,   Bit12 (968~989) 22 978,

 1762 02:02:14.231341  TX Bit5 (975~991) 17 983,   Bit13 (968~986) 19 977,

 1763 02:02:14.234528  TX Bit6 (975~992) 18 983,   Bit14 (969~988) 20 978,

 1764 02:02:14.237736  TX Bit7 (977~993) 17 985,   Bit15 (970~990) 21 980,

 1765 02:02:14.238174  

 1766 02:02:14.241208  Write Rank1 MR14 =0x6

 1767 02:02:14.249894  

 1768 02:02:14.250323  	CH=0, VrefRange= 0, VrefLevel = 6

 1769 02:02:14.256046  TX Bit0 (978~998) 21 988,   Bit8 (967~987) 21 977,

 1770 02:02:14.259628  TX Bit1 (977~997) 21 987,   Bit9 (968~989) 22 978,

 1771 02:02:14.266111  TX Bit2 (977~997) 21 987,   Bit10 (973~991) 19 982,

 1772 02:02:14.269712  TX Bit3 (973~991) 19 982,   Bit11 (968~988) 21 978,

 1773 02:02:14.272990  TX Bit4 (977~998) 22 987,   Bit12 (968~989) 22 978,

 1774 02:02:14.280043  TX Bit5 (975~991) 17 983,   Bit13 (968~986) 19 977,

 1775 02:02:14.283263  TX Bit6 (974~992) 19 983,   Bit14 (968~989) 22 978,

 1776 02:02:14.286292  TX Bit7 (977~994) 18 985,   Bit15 (969~990) 22 979,

 1777 02:02:14.286462  

 1778 02:02:14.290002  Write Rank1 MR14 =0x8

 1779 02:02:14.298710  

 1780 02:02:14.299139  	CH=0, VrefRange= 0, VrefLevel = 8

 1781 02:02:14.305419  TX Bit0 (977~998) 22 987,   Bit8 (967~988) 22 977,

 1782 02:02:14.308860  TX Bit1 (977~997) 21 987,   Bit9 (968~989) 22 978,

 1783 02:02:14.312296  TX Bit2 (977~997) 21 987,   Bit10 (972~991) 20 981,

 1784 02:02:14.319014  TX Bit3 (973~991) 19 982,   Bit11 (967~989) 23 978,

 1785 02:02:14.322324  TX Bit4 (976~998) 23 987,   Bit12 (968~989) 22 978,

 1786 02:02:14.329097  TX Bit5 (974~991) 18 982,   Bit13 (968~987) 20 977,

 1787 02:02:14.332348  TX Bit6 (975~992) 18 983,   Bit14 (968~989) 22 978,

 1788 02:02:14.335711  TX Bit7 (977~995) 19 986,   Bit15 (969~990) 22 979,

 1789 02:02:14.336143  

 1790 02:02:14.339308  Write Rank1 MR14 =0xa

 1791 02:02:14.348282  

 1792 02:02:14.348784  	CH=0, VrefRange= 0, VrefLevel = 10

 1793 02:02:14.354750  TX Bit0 (977~999) 23 988,   Bit8 (966~988) 23 977,

 1794 02:02:14.358408  TX Bit1 (977~998) 22 987,   Bit9 (968~989) 22 978,

 1795 02:02:14.364804  TX Bit2 (977~998) 22 987,   Bit10 (972~991) 20 981,

 1796 02:02:14.368628  TX Bit3 (972~991) 20 981,   Bit11 (967~989) 23 978,

 1797 02:02:14.371526  TX Bit4 (977~998) 22 987,   Bit12 (968~989) 22 978,

 1798 02:02:14.378129  TX Bit5 (973~991) 19 982,   Bit13 (968~988) 21 978,

 1799 02:02:14.381553  TX Bit6 (974~993) 20 983,   Bit14 (968~989) 22 978,

 1800 02:02:14.384966  TX Bit7 (976~995) 20 985,   Bit15 (969~991) 23 980,

 1801 02:02:14.385490  

 1802 02:02:14.387995  Write Rank1 MR14 =0xc

 1803 02:02:14.397499  

 1804 02:02:14.398009  	CH=0, VrefRange= 0, VrefLevel = 12

 1805 02:02:14.403872  TX Bit0 (977~999) 23 988,   Bit8 (966~989) 24 977,

 1806 02:02:14.407327  TX Bit1 (977~998) 22 987,   Bit9 (968~989) 22 978,

 1807 02:02:14.413725  TX Bit2 (977~998) 22 987,   Bit10 (971~992) 22 981,

 1808 02:02:14.417301  TX Bit3 (971~992) 22 981,   Bit11 (967~989) 23 978,

 1809 02:02:14.420767  TX Bit4 (976~998) 23 987,   Bit12 (968~990) 23 979,

 1810 02:02:14.427656  TX Bit5 (973~992) 20 982,   Bit13 (968~988) 21 978,

 1811 02:02:14.430788  TX Bit6 (973~993) 21 983,   Bit14 (968~989) 22 978,

 1812 02:02:14.434263  TX Bit7 (976~996) 21 986,   Bit15 (969~991) 23 980,

 1813 02:02:14.434696  

 1814 02:02:14.437342  Write Rank1 MR14 =0xe

 1815 02:02:14.446257  

 1816 02:02:14.449407  	CH=0, VrefRange= 0, VrefLevel = 14

 1817 02:02:14.453273  TX Bit0 (977~999) 23 988,   Bit8 (966~989) 24 977,

 1818 02:02:14.456132  TX Bit1 (976~998) 23 987,   Bit9 (967~990) 24 978,

 1819 02:02:14.463139  TX Bit2 (976~998) 23 987,   Bit10 (971~992) 22 981,

 1820 02:02:14.466676  TX Bit3 (971~992) 22 981,   Bit11 (967~989) 23 978,

 1821 02:02:14.469727  TX Bit4 (976~999) 24 987,   Bit12 (968~990) 23 979,

 1822 02:02:14.476733  TX Bit5 (973~992) 20 982,   Bit13 (968~989) 22 978,

 1823 02:02:14.479946  TX Bit6 (973~994) 22 983,   Bit14 (968~990) 23 979,

 1824 02:02:14.483466  TX Bit7 (976~996) 21 986,   Bit15 (969~991) 23 980,

 1825 02:02:14.483904  

 1826 02:02:14.486472  Write Rank1 MR14 =0x10

 1827 02:02:14.495549  

 1828 02:02:14.499335  	CH=0, VrefRange= 0, VrefLevel = 16

 1829 02:02:14.502319  TX Bit0 (977~1000) 24 988,   Bit8 (965~989) 25 977,

 1830 02:02:14.505594  TX Bit1 (977~998) 22 987,   Bit9 (967~990) 24 978,

 1831 02:02:14.512344  TX Bit2 (976~999) 24 987,   Bit10 (970~993) 24 981,

 1832 02:02:14.515996  TX Bit3 (971~992) 22 981,   Bit11 (967~990) 24 978,

 1833 02:02:14.518949  TX Bit4 (976~999) 24 987,   Bit12 (967~990) 24 978,

 1834 02:02:14.526107  TX Bit5 (972~992) 21 982,   Bit13 (967~989) 23 978,

 1835 02:02:14.529647  TX Bit6 (973~994) 22 983,   Bit14 (967~990) 24 978,

 1836 02:02:14.532512  TX Bit7 (976~997) 22 986,   Bit15 (968~992) 25 980,

 1837 02:02:14.532947  

 1838 02:02:14.535953  Write Rank1 MR14 =0x12

 1839 02:02:14.545270  

 1840 02:02:14.548612  	CH=0, VrefRange= 0, VrefLevel = 18

 1841 02:02:14.551757  TX Bit0 (977~1000) 24 988,   Bit8 (965~990) 26 977,

 1842 02:02:14.555469  TX Bit1 (976~998) 23 987,   Bit9 (967~990) 24 978,

 1843 02:02:14.561635  TX Bit2 (976~999) 24 987,   Bit10 (970~993) 24 981,

 1844 02:02:14.565657  TX Bit3 (970~993) 24 981,   Bit11 (966~990) 25 978,

 1845 02:02:14.569258  TX Bit4 (976~999) 24 987,   Bit12 (967~990) 24 978,

 1846 02:02:14.575839  TX Bit5 (971~993) 23 982,   Bit13 (967~989) 23 978,

 1847 02:02:14.579277  TX Bit6 (972~995) 24 983,   Bit14 (967~990) 24 978,

 1848 02:02:14.582414  TX Bit7 (975~997) 23 986,   Bit15 (968~992) 25 980,

 1849 02:02:14.582856  

 1850 02:02:14.585464  Write Rank1 MR14 =0x14

 1851 02:02:14.594540  

 1852 02:02:14.597951  	CH=0, VrefRange= 0, VrefLevel = 20

 1853 02:02:14.600953  TX Bit0 (977~1000) 24 988,   Bit8 (965~990) 26 977,

 1854 02:02:14.604283  TX Bit1 (976~999) 24 987,   Bit9 (967~990) 24 978,

 1855 02:02:14.611130  TX Bit2 (976~999) 24 987,   Bit10 (970~993) 24 981,

 1856 02:02:14.614378  TX Bit3 (970~993) 24 981,   Bit11 (966~990) 25 978,

 1857 02:02:14.617557  TX Bit4 (975~999) 25 987,   Bit12 (967~991) 25 979,

 1858 02:02:14.624289  TX Bit5 (971~993) 23 982,   Bit13 (967~989) 23 978,

 1859 02:02:14.627687  TX Bit6 (972~995) 24 983,   Bit14 (967~990) 24 978,

 1860 02:02:14.631171  TX Bit7 (976~998) 23 987,   Bit15 (968~992) 25 980,

 1861 02:02:14.631248  

 1862 02:02:14.634600  Write Rank1 MR14 =0x16

 1863 02:02:14.643965  

 1864 02:02:14.647425  	CH=0, VrefRange= 0, VrefLevel = 22

 1865 02:02:14.650675  TX Bit0 (977~1001) 25 989,   Bit8 (965~990) 26 977,

 1866 02:02:14.654108  TX Bit1 (976~999) 24 987,   Bit9 (967~990) 24 978,

 1867 02:02:14.660759  TX Bit2 (976~999) 24 987,   Bit10 (970~994) 25 982,

 1868 02:02:14.664285  TX Bit3 (970~994) 25 982,   Bit11 (966~990) 25 978,

 1869 02:02:14.667432  TX Bit4 (975~1000) 26 987,   Bit12 (967~991) 25 979,

 1870 02:02:14.674041  TX Bit5 (971~994) 24 982,   Bit13 (967~990) 24 978,

 1871 02:02:14.677471  TX Bit6 (971~996) 26 983,   Bit14 (967~991) 25 979,

 1872 02:02:14.681143  TX Bit7 (975~998) 24 986,   Bit15 (968~992) 25 980,

 1873 02:02:14.681220  

 1874 02:02:14.684059  Write Rank1 MR14 =0x18

 1875 02:02:14.693539  

 1876 02:02:14.697594  	CH=0, VrefRange= 0, VrefLevel = 24

 1877 02:02:14.700185  TX Bit0 (977~1001) 25 989,   Bit8 (964~990) 27 977,

 1878 02:02:14.703679  TX Bit1 (976~999) 24 987,   Bit9 (966~990) 25 978,

 1879 02:02:14.710638  TX Bit2 (976~999) 24 987,   Bit10 (969~994) 26 981,

 1880 02:02:14.714265  TX Bit3 (969~994) 26 981,   Bit11 (966~990) 25 978,

 1881 02:02:14.717059  TX Bit4 (976~1000) 25 988,   Bit12 (967~991) 25 979,

 1882 02:02:14.723830  TX Bit5 (970~994) 25 982,   Bit13 (966~990) 25 978,

 1883 02:02:14.727281  TX Bit6 (971~995) 25 983,   Bit14 (966~991) 26 978,

 1884 02:02:14.730564  TX Bit7 (975~998) 24 986,   Bit15 (968~992) 25 980,

 1885 02:02:14.730640  

 1886 02:02:14.734444  Write Rank1 MR14 =0x1a

 1887 02:02:14.743614  

 1888 02:02:14.743705  	CH=0, VrefRange= 0, VrefLevel = 26

 1889 02:02:14.750033  TX Bit0 (977~1001) 25 989,   Bit8 (964~990) 27 977,

 1890 02:02:14.753521  TX Bit1 (976~999) 24 987,   Bit9 (966~990) 25 978,

 1891 02:02:14.760182  TX Bit2 (976~999) 24 987,   Bit10 (969~994) 26 981,

 1892 02:02:14.763443  TX Bit3 (969~994) 26 981,   Bit11 (966~990) 25 978,

 1893 02:02:14.766719  TX Bit4 (976~1000) 25 988,   Bit12 (967~991) 25 979,

 1894 02:02:14.773483  TX Bit5 (970~994) 25 982,   Bit13 (966~990) 25 978,

 1895 02:02:14.777091  TX Bit6 (971~995) 25 983,   Bit14 (966~991) 26 978,

 1896 02:02:14.780508  TX Bit7 (975~998) 24 986,   Bit15 (968~992) 25 980,

 1897 02:02:14.780584  

 1898 02:02:14.783466  Write Rank1 MR14 =0x1c

 1899 02:02:14.793329  

 1900 02:02:14.796587  	CH=0, VrefRange= 0, VrefLevel = 28

 1901 02:02:14.800107  TX Bit0 (977~1001) 25 989,   Bit8 (964~990) 27 977,

 1902 02:02:14.803163  TX Bit1 (976~999) 24 987,   Bit9 (966~990) 25 978,

 1903 02:02:14.810079  TX Bit2 (976~999) 24 987,   Bit10 (969~994) 26 981,

 1904 02:02:14.813555  TX Bit3 (969~994) 26 981,   Bit11 (966~990) 25 978,

 1905 02:02:14.816979  TX Bit4 (976~1000) 25 988,   Bit12 (967~991) 25 979,

 1906 02:02:14.823894  TX Bit5 (970~994) 25 982,   Bit13 (966~990) 25 978,

 1907 02:02:14.826927  TX Bit6 (971~995) 25 983,   Bit14 (966~991) 26 978,

 1908 02:02:14.830256  TX Bit7 (975~998) 24 986,   Bit15 (968~992) 25 980,

 1909 02:02:14.830591  

 1910 02:02:14.833359  Write Rank1 MR14 =0x1e

 1911 02:02:14.842561  

 1912 02:02:14.846531  	CH=0, VrefRange= 0, VrefLevel = 30

 1913 02:02:14.849398  TX Bit0 (977~1001) 25 989,   Bit8 (964~990) 27 977,

 1914 02:02:14.852540  TX Bit1 (976~999) 24 987,   Bit9 (966~990) 25 978,

 1915 02:02:14.859765  TX Bit2 (976~999) 24 987,   Bit10 (969~994) 26 981,

 1916 02:02:14.863022  TX Bit3 (969~994) 26 981,   Bit11 (966~990) 25 978,

 1917 02:02:14.866817  TX Bit4 (976~1000) 25 988,   Bit12 (967~991) 25 979,

 1918 02:02:14.873598  TX Bit5 (970~994) 25 982,   Bit13 (966~990) 25 978,

 1919 02:02:14.876715  TX Bit6 (971~995) 25 983,   Bit14 (966~991) 26 978,

 1920 02:02:14.880309  TX Bit7 (975~998) 24 986,   Bit15 (968~992) 25 980,

 1921 02:02:14.880742  

 1922 02:02:14.883178  Write Rank1 MR14 =0x20

 1923 02:02:14.892867  

 1924 02:02:14.893355  	CH=0, VrefRange= 0, VrefLevel = 32

 1925 02:02:14.899613  TX Bit0 (977~1001) 25 989,   Bit8 (964~990) 27 977,

 1926 02:02:14.902654  TX Bit1 (976~999) 24 987,   Bit9 (966~990) 25 978,

 1927 02:02:14.909758  TX Bit2 (976~999) 24 987,   Bit10 (969~994) 26 981,

 1928 02:02:14.913395  TX Bit3 (969~994) 26 981,   Bit11 (966~990) 25 978,

 1929 02:02:14.916642  TX Bit4 (976~1000) 25 988,   Bit12 (967~991) 25 979,

 1930 02:02:14.923388  TX Bit5 (970~994) 25 982,   Bit13 (966~990) 25 978,

 1931 02:02:14.926668  TX Bit6 (971~995) 25 983,   Bit14 (966~991) 26 978,

 1932 02:02:14.929812  TX Bit7 (975~998) 24 986,   Bit15 (968~992) 25 980,

 1933 02:02:14.930264  

 1934 02:02:14.932737  Write Rank1 MR14 =0x22

 1935 02:02:14.942273  

 1936 02:02:14.945601  	CH=0, VrefRange= 0, VrefLevel = 34

 1937 02:02:14.949234  TX Bit0 (977~1001) 25 989,   Bit8 (964~990) 27 977,

 1938 02:02:14.952553  TX Bit1 (976~999) 24 987,   Bit9 (966~990) 25 978,

 1939 02:02:14.959237  TX Bit2 (976~999) 24 987,   Bit10 (969~994) 26 981,

 1940 02:02:14.962369  TX Bit3 (969~994) 26 981,   Bit11 (966~990) 25 978,

 1941 02:02:14.965923  TX Bit4 (976~1000) 25 988,   Bit12 (967~991) 25 979,

 1942 02:02:14.972743  TX Bit5 (970~994) 25 982,   Bit13 (966~990) 25 978,

 1943 02:02:14.976557  TX Bit6 (971~995) 25 983,   Bit14 (966~991) 26 978,

 1944 02:02:14.979501  TX Bit7 (975~998) 24 986,   Bit15 (968~992) 25 980,

 1945 02:02:14.980018  

 1946 02:02:14.980354  

 1947 02:02:14.982986  TX Vref found, early break! 369< 381

 1948 02:02:14.989196  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 1949 02:02:14.992829  u1DelayCellOfst[0]=10 cells (8 PI)

 1950 02:02:14.996620  u1DelayCellOfst[1]=7 cells (6 PI)

 1951 02:02:14.999737  u1DelayCellOfst[2]=7 cells (6 PI)

 1952 02:02:15.000240  u1DelayCellOfst[3]=0 cells (0 PI)

 1953 02:02:15.002914  u1DelayCellOfst[4]=8 cells (7 PI)

 1954 02:02:15.006129  u1DelayCellOfst[5]=1 cells (1 PI)

 1955 02:02:15.009972  u1DelayCellOfst[6]=2 cells (2 PI)

 1956 02:02:15.012685  u1DelayCellOfst[7]=6 cells (5 PI)

 1957 02:02:15.016035  Byte0, DQ PI dly=981, DQM PI dly= 985

 1958 02:02:15.019275  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)

 1959 02:02:15.019714  

 1960 02:02:15.026343  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)

 1961 02:02:15.026782  

 1962 02:02:15.030035  u1DelayCellOfst[8]=0 cells (0 PI)

 1963 02:02:15.033415  u1DelayCellOfst[9]=1 cells (1 PI)

 1964 02:02:15.033846  u1DelayCellOfst[10]=5 cells (4 PI)

 1965 02:02:15.036248  u1DelayCellOfst[11]=1 cells (1 PI)

 1966 02:02:15.039904  u1DelayCellOfst[12]=2 cells (2 PI)

 1967 02:02:15.042999  u1DelayCellOfst[13]=1 cells (1 PI)

 1968 02:02:15.046639  u1DelayCellOfst[14]=1 cells (1 PI)

 1969 02:02:15.050101  u1DelayCellOfst[15]=3 cells (3 PI)

 1970 02:02:15.052953  Byte1, DQ PI dly=977, DQM PI dly= 979

 1971 02:02:15.056511  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)

 1972 02:02:15.056947  

 1973 02:02:15.063031  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)

 1974 02:02:15.063464  

 1975 02:02:15.063828  Write Rank1 MR14 =0x18

 1976 02:02:15.064151  

 1977 02:02:15.066327  Final TX Range 0 Vref 24

 1978 02:02:15.066704  

 1979 02:02:15.073088  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 1980 02:02:15.073520  

 1981 02:02:15.079982  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 1982 02:02:15.086953  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 1983 02:02:15.093863  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 1984 02:02:15.096840  Write Rank1 MR3 =0xb0

 1985 02:02:15.097270  DramC Write-DBI on

 1986 02:02:15.097605  ==

 1987 02:02:15.103589  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1988 02:02:15.106915  fsp= 1, odt_onoff= 1, Byte mode= 0

 1989 02:02:15.107370  ==

 1990 02:02:15.110649  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 1991 02:02:15.111161  

 1992 02:02:15.113647  Begin, DQ Scan Range 699~763

 1993 02:02:15.114154  

 1994 02:02:15.114544  

 1995 02:02:15.117111  	TX Vref Scan disable

 1996 02:02:15.120503  699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1997 02:02:15.123820  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1998 02:02:15.126859  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1999 02:02:15.130502  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2000 02:02:15.134002  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2001 02:02:15.137185  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2002 02:02:15.140451  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2003 02:02:15.144001  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2004 02:02:15.147317  707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]

 2005 02:02:15.150686  708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]

 2006 02:02:15.154735  709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]

 2007 02:02:15.158355  710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]

 2008 02:02:15.161795  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 2009 02:02:15.165107  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 2010 02:02:15.168440  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 2011 02:02:15.171987  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 2012 02:02:15.175273  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 2013 02:02:15.178504  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 2014 02:02:15.186413  735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]

 2015 02:02:15.189651  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 2016 02:02:15.193157  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 2017 02:02:15.196635  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 2018 02:02:15.200405  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 2019 02:02:15.203244  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 2020 02:02:15.206767  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 2021 02:02:15.210320  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 2022 02:02:15.213844  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 2023 02:02:15.217317  744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]

 2024 02:02:15.220406  Byte0, DQ PI dly=730, DQM PI dly= 730

 2025 02:02:15.224025  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)

 2026 02:02:15.224542  

 2027 02:02:15.230314  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)

 2028 02:02:15.230748  

 2029 02:02:15.233497  Byte1, DQ PI dly=720, DQM PI dly= 720

 2030 02:02:15.237545  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)

 2031 02:02:15.237983  

 2032 02:02:15.241406  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)

 2033 02:02:15.241841  

 2034 02:02:15.249189  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 2035 02:02:15.253230  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2036 02:02:15.260689  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2037 02:02:15.264433  Write Rank1 MR3 =0x30

 2038 02:02:15.264874  DramC Write-DBI off

 2039 02:02:15.267399  

 2040 02:02:15.267831  [DATLAT]

 2041 02:02:15.270988  Freq=1600, CH0 RK1, use_rxtx_scan=0

 2042 02:02:15.271420  

 2043 02:02:15.271749  DATLAT Default: 0x10

 2044 02:02:15.274588  7, 0xFFFF, sum=0

 2045 02:02:15.275031  8, 0xFFFF, sum=0

 2046 02:02:15.277606  9, 0xFFFF, sum=0

 2047 02:02:15.277996  10, 0xFFFF, sum=0

 2048 02:02:15.280569  11, 0xFFFF, sum=0

 2049 02:02:15.280960  12, 0xFFFF, sum=0

 2050 02:02:15.283957  13, 0xFFFF, sum=0

 2051 02:02:15.284355  14, 0x0, sum=1

 2052 02:02:15.287549  15, 0x0, sum=2

 2053 02:02:15.287943  16, 0x0, sum=3

 2054 02:02:15.288243  17, 0x0, sum=4

 2055 02:02:15.294202  pattern=2 first_step=14 total pass=5 best_step=16

 2056 02:02:15.294734  ==

 2057 02:02:15.297643  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2058 02:02:15.301588  fsp= 1, odt_onoff= 1, Byte mode= 0

 2059 02:02:15.301980  ==

 2060 02:02:15.304571  Start DQ dly to find pass range UseTestEngine =1

 2061 02:02:15.308204  x-axis: bit #, y-axis: DQ dly (-127~63)

 2062 02:02:15.311553  RX Vref Scan = 0

 2063 02:02:15.315001  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 2064 02:02:15.318261  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 2065 02:02:15.322314  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 2066 02:02:15.322709  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 2067 02:02:15.327284  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 2068 02:02:15.330636  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 2069 02:02:15.331068  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 2070 02:02:15.333881  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 2071 02:02:15.337386  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 2072 02:02:15.340581  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 2073 02:02:15.343750  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 2074 02:02:15.347267  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 2075 02:02:15.350458  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 2076 02:02:15.353616  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 2077 02:02:15.354099  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 2078 02:02:15.357295  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 2079 02:02:15.360472  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 2080 02:02:15.363762  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 2081 02:02:15.367190  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 2082 02:02:15.370482  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 2083 02:02:15.373837  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 2084 02:02:15.374266  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 2085 02:02:15.377153  -4, [0] xxxoxxxx xxxxxxxx [MSB]

 2086 02:02:15.380670  -3, [0] xxxoxxxx xxxxxxxx [MSB]

 2087 02:02:15.384183  -2, [0] xxxoxoxx xxxxxxxx [MSB]

 2088 02:02:15.387551  -1, [0] xxxoxoxx oxxxxxxx [MSB]

 2089 02:02:15.391035  0, [0] xxxoxoxx oxxoxxxx [MSB]

 2090 02:02:15.391446  1, [0] xxxoxoox oxxoxoxx [MSB]

 2091 02:02:15.394333  2, [0] xxxoxooo ooxoooox [MSB]

 2092 02:02:15.397946  3, [0] xxxoxooo ooxooooo [MSB]

 2093 02:02:15.400638  4, [0] xxxoxooo ooxooooo [MSB]

 2094 02:02:15.403706  5, [0] xxxoxooo ooxooooo [MSB]

 2095 02:02:15.407358  6, [0] xoxooooo oooooooo [MSB]

 2096 02:02:15.410679  32, [0] oooxoooo oooooooo [MSB]

 2097 02:02:15.414265  33, [0] oooxoooo oooooooo [MSB]

 2098 02:02:15.417413  34, [0] oooxoxoo oooooxoo [MSB]

 2099 02:02:15.417583  35, [0] oooxoxox oooxoxxo [MSB]

 2100 02:02:15.420657  36, [0] oooxoxxx xooxoxxo [MSB]

 2101 02:02:15.424424  37, [0] oooxoxxx xxoxoxxo [MSB]

 2102 02:02:15.427354  38, [0] oooxoxxx xxoxxxxo [MSB]

 2103 02:02:15.430806  39, [0] oooxoxxx xxoxxxxx [MSB]

 2104 02:02:15.433912  40, [0] ooxxoxxx xxoxxxxx [MSB]

 2105 02:02:15.437493  41, [0] oxxxxxxx xxxxxxxx [MSB]

 2106 02:02:15.437605  42, [0] xxxxxxxx xxxxxxxx [MSB]

 2107 02:02:15.440690  iDelay=42, Bit 0, Center 24 (7 ~ 41) 35

 2108 02:02:15.447951  iDelay=42, Bit 1, Center 23 (6 ~ 40) 35

 2109 02:02:15.450772  iDelay=42, Bit 2, Center 23 (7 ~ 39) 33

 2110 02:02:15.454086  iDelay=42, Bit 3, Center 13 (-4 ~ 31) 36

 2111 02:02:15.457649  iDelay=42, Bit 4, Center 23 (6 ~ 40) 35

 2112 02:02:15.461046  iDelay=42, Bit 5, Center 15 (-2 ~ 33) 36

 2113 02:02:15.464480  iDelay=42, Bit 6, Center 18 (1 ~ 35) 35

 2114 02:02:15.467995  iDelay=42, Bit 7, Center 18 (2 ~ 34) 33

 2115 02:02:15.471086  iDelay=42, Bit 8, Center 17 (-1 ~ 35) 37

 2116 02:02:15.474588  iDelay=42, Bit 9, Center 19 (2 ~ 36) 35

 2117 02:02:15.478156  iDelay=42, Bit 10, Center 23 (6 ~ 40) 35

 2118 02:02:15.481191  iDelay=42, Bit 11, Center 17 (0 ~ 34) 35

 2119 02:02:15.484745  iDelay=42, Bit 12, Center 19 (2 ~ 37) 36

 2120 02:02:15.488146  iDelay=42, Bit 13, Center 17 (1 ~ 33) 33

 2121 02:02:15.491775  iDelay=42, Bit 14, Center 18 (2 ~ 34) 33

 2122 02:02:15.494927  iDelay=42, Bit 15, Center 20 (3 ~ 38) 36

 2123 02:02:15.498404  ==

 2124 02:02:15.501794  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2125 02:02:15.505209  fsp= 1, odt_onoff= 1, Byte mode= 0

 2126 02:02:15.505712  ==

 2127 02:02:15.506049  DQS Delay:

 2128 02:02:15.508487  DQS0 = 0, DQS1 = 0

 2129 02:02:15.508961  DQM Delay:

 2130 02:02:15.512137  DQM0 = 19, DQM1 = 18

 2131 02:02:15.512565  DQ Delay:

 2132 02:02:15.515657  DQ0 =24, DQ1 =23, DQ2 =23, DQ3 =13

 2133 02:02:15.518923  DQ4 =23, DQ5 =15, DQ6 =18, DQ7 =18

 2134 02:02:15.521832  DQ8 =17, DQ9 =19, DQ10 =23, DQ11 =17

 2135 02:02:15.525535  DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20

 2136 02:02:15.525980  

 2137 02:02:15.526355  

 2138 02:02:15.526666  

 2139 02:02:15.528825  [DramC_TX_OE_Calibration] TA2

 2140 02:02:15.532464  Original DQ_B0 (3 6) =30, OEN = 27

 2141 02:02:15.535719  Original DQ_B1 (3 6) =30, OEN = 27

 2142 02:02:15.536151  23, 0x0, End_B0=23 End_B1=23

 2143 02:02:15.538881  24, 0x0, End_B0=24 End_B1=24

 2144 02:02:15.541966  25, 0x0, End_B0=25 End_B1=25

 2145 02:02:15.545928  26, 0x0, End_B0=26 End_B1=26

 2146 02:02:15.546557  27, 0x0, End_B0=27 End_B1=27

 2147 02:02:15.549198  28, 0x0, End_B0=28 End_B1=28

 2148 02:02:15.552382  29, 0x0, End_B0=29 End_B1=29

 2149 02:02:15.555895  30, 0x0, End_B0=30 End_B1=30

 2150 02:02:15.558778  31, 0xFFFF, End_B0=30 End_B1=30

 2151 02:02:15.562205  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2152 02:02:15.568755  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2153 02:02:15.569185  

 2154 02:02:15.569515  

 2155 02:02:15.572603  Write Rank1 MR23 =0x3f

 2156 02:02:15.573027  [DQSOSC]

 2157 02:02:15.578787  [DQSOSCAuto] RK1, (LSB)MR18= 0x8f, (MSB)MR19= 0x3, tDQSOscB0 = 345 ps tDQSOscB1 = 0 ps

 2158 02:02:15.585919  CH0_RK1: MR19=0x3, MR18=0x8F, DQSOSC=345, MR23=63, INC=20, DEC=31

 2159 02:02:15.589154  Write Rank1 MR23 =0x3f

 2160 02:02:15.589768  [DQSOSC]

 2161 02:02:15.595377  [DQSOSCAuto] RK1, (LSB)MR18= 0x91, (MSB)MR19= 0x3, tDQSOscB0 = 345 ps tDQSOscB1 = 0 ps

 2162 02:02:15.598757  CH0 RK1: MR19=3, MR18=91

 2163 02:02:15.602523  [RxdqsGatingPostProcess] freq 1600

 2164 02:02:15.605598  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 2165 02:02:15.608995  Rank: 0

 2166 02:02:15.609522  best DQS0 dly(2T, 0.5T) = (2, 5)

 2167 02:02:15.612103  best DQS1 dly(2T, 0.5T) = (2, 5)

 2168 02:02:15.615617  best DQS0 P1 dly(2T, 0.5T) = (3, 1)

 2169 02:02:15.618936  best DQS1 P1 dly(2T, 0.5T) = (3, 1)

 2170 02:02:15.619389  Rank: 1

 2171 02:02:15.622289  best DQS0 dly(2T, 0.5T) = (2, 6)

 2172 02:02:15.625446  best DQS1 dly(2T, 0.5T) = (2, 6)

 2173 02:02:15.629143  best DQS0 P1 dly(2T, 0.5T) = (3, 2)

 2174 02:02:15.632375  best DQS1 P1 dly(2T, 0.5T) = (3, 2)

 2175 02:02:15.638991  TX_dly_DQSgated check: min 2  max 3, ChangeDQSINCTL=-1

 2176 02:02:15.642541  DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9

 2177 02:02:15.645883  [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16

 2178 02:02:15.649264  Write Rank0 MR13 =0x59

 2179 02:02:15.649802  ==

 2180 02:02:15.652230  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2181 02:02:15.655853  fsp= 1, odt_onoff= 1, Byte mode= 0

 2182 02:02:15.656250  ==

 2183 02:02:15.659008  === u2Vref_new: 0x56 --> 0x3a

 2184 02:02:15.662159  === u2Vref_new: 0x58 --> 0x58

 2185 02:02:15.666371  === u2Vref_new: 0x5a --> 0x5a

 2186 02:02:15.669053  === u2Vref_new: 0x5c --> 0x78

 2187 02:02:15.672544  === u2Vref_new: 0x5e --> 0x7a

 2188 02:02:15.675620  === u2Vref_new: 0x60 --> 0x90

 2189 02:02:15.676042  

 2190 02:02:15.679178  CBT Vref found, early break!

 2191 02:02:15.682400  [CA 0] Center 37 (11~63) winsize 53

 2192 02:02:15.682947  [CA 1] Center 36 (9~63) winsize 55

 2193 02:02:15.686190  [CA 2] Center 33 (4~63) winsize 60

 2194 02:02:15.689511  [CA 3] Center 34 (5~63) winsize 59

 2195 02:02:15.693045  [CA 4] Center 34 (6~63) winsize 58

 2196 02:02:15.695987  [CA 5] Center 28 (-1~57) winsize 59

 2197 02:02:15.696416  

 2198 02:02:15.699252  [CATrainingPosCal] consider 1 rank data

 2199 02:02:15.702559  u2DelayCellTimex100 = 762/100 ps

 2200 02:02:15.706303  CA0 delay=37 (11~63),Diff = 9 PI (11 cell)

 2201 02:02:15.709529  CA1 delay=36 (9~63),Diff = 8 PI (10 cell)

 2202 02:02:15.713280  CA2 delay=33 (4~63),Diff = 5 PI (6 cell)

 2203 02:02:15.719516  CA3 delay=34 (5~63),Diff = 6 PI (7 cell)

 2204 02:02:15.723065  CA4 delay=34 (6~63),Diff = 6 PI (7 cell)

 2205 02:02:15.726268  CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)

 2206 02:02:15.726665  

 2207 02:02:15.729536  CA PerBit enable=1, Macro0, CA PI delay=28

 2208 02:02:15.732828  === u2Vref_new: 0x56 --> 0x3a

 2209 02:02:15.733264  

 2210 02:02:15.733599  Vref(ca) range 1: 22

 2211 02:02:15.733911  

 2212 02:02:15.736549  CS Dly= 12 (43-0-32)

 2213 02:02:15.739602  Write Rank0 MR13 =0xd8

 2214 02:02:15.740035  Write Rank0 MR13 =0xd8

 2215 02:02:15.742929  Write Rank0 MR12 =0x56

 2216 02:02:15.743362  Write Rank1 MR13 =0x59

 2217 02:02:15.746591  ==

 2218 02:02:15.750185  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 2219 02:02:15.753124  fsp= 1, odt_onoff= 1, Byte mode= 0

 2220 02:02:15.753564  ==

 2221 02:02:15.756708  === u2Vref_new: 0x56 --> 0x3a

 2222 02:02:15.759677  === u2Vref_new: 0x58 --> 0x58

 2223 02:02:15.763323  === u2Vref_new: 0x5a --> 0x5a

 2224 02:02:15.766757  === u2Vref_new: 0x5c --> 0x78

 2225 02:02:15.767188  === u2Vref_new: 0x5e --> 0x7a

 2226 02:02:15.770527  

 2227 02:02:15.770962  CBT Vref found, early break!

 2228 02:02:15.773656  [CA 0] Center 37 (11~63) winsize 53

 2229 02:02:15.777103  [CA 1] Center 35 (8~63) winsize 56

 2230 02:02:15.780092  [CA 2] Center 33 (4~63) winsize 60

 2231 02:02:15.783915  [CA 3] Center 34 (5~63) winsize 59

 2232 02:02:15.787128  [CA 4] Center 35 (7~63) winsize 57

 2233 02:02:15.790246  [CA 5] Center 27 (-2~57) winsize 60

 2234 02:02:15.790898  

 2235 02:02:15.793744  [CATrainingPosCal] consider 2 rank data

 2236 02:02:15.797224  u2DelayCellTimex100 = 762/100 ps

 2237 02:02:15.800609  CA0 delay=37 (11~63),Diff = 9 PI (11 cell)

 2238 02:02:15.803629  CA1 delay=36 (9~63),Diff = 8 PI (10 cell)

 2239 02:02:15.807097  CA2 delay=33 (4~63),Diff = 5 PI (6 cell)

 2240 02:02:15.810487  CA3 delay=34 (5~63),Diff = 6 PI (7 cell)

 2241 02:02:15.813442  CA4 delay=35 (7~63),Diff = 7 PI (8 cell)

 2242 02:02:15.816829  CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)

 2243 02:02:15.820472  

 2244 02:02:15.823859  CA PerBit enable=1, Macro0, CA PI delay=28

 2245 02:02:15.824285  === u2Vref_new: 0x56 --> 0x3a

 2246 02:02:15.824619  

 2247 02:02:15.827413  Vref(ca) range 1: 22

 2248 02:02:15.827838  

 2249 02:02:15.830710  CS Dly= 12 (43-0-32)

 2250 02:02:15.831206  Write Rank1 MR13 =0xd8

 2251 02:02:15.834263  Write Rank1 MR13 =0xd8

 2252 02:02:15.837482  Write Rank1 MR12 =0x56

 2253 02:02:15.840878  [RankSwap] Rank num 2, (Multi 1), Rank 0

 2254 02:02:15.841345  Write Rank0 MR2 =0xad

 2255 02:02:15.844152  [Write Leveling]

 2256 02:02:15.847341  delay  byte0  byte1  byte2  byte3

 2257 02:02:15.847726  

 2258 02:02:15.848109  10    0   0   

 2259 02:02:15.848397  11    0   0   

 2260 02:02:15.851068  12    0   0   

 2261 02:02:15.851472  13    0   0   

 2262 02:02:15.854098  14    0   0   

 2263 02:02:15.854549  15    0   0   

 2264 02:02:15.854860  16    0   0   

 2265 02:02:15.857600  17    0   0   

 2266 02:02:15.857999  18    0   0   

 2267 02:02:15.860701  19    0   0   

 2268 02:02:15.861287  20    0   0   

 2269 02:02:15.864170  21    0   0   

 2270 02:02:15.864604  22    0   0   

 2271 02:02:15.864946  23    0   0   

 2272 02:02:15.867460  24    0   0   

 2273 02:02:15.867858  25    0   0   

 2274 02:02:15.871350  26    0   0   

 2275 02:02:15.871747  27    0   0   

 2276 02:02:15.872057  28    0   0   

 2277 02:02:15.874248  29    0   0   

 2278 02:02:15.874669  30    0   0   

 2279 02:02:15.878034  31    0   0   

 2280 02:02:15.878479  32    0   0   

 2281 02:02:15.878795  33    0   ff   

 2282 02:02:15.881238  34    0   ff   

 2283 02:02:15.881639  35    ff   ff   

 2284 02:02:15.884457  36    0   ff   

 2285 02:02:15.884856  37    ff   ff   

 2286 02:02:15.887676  38    ff   ff   

 2287 02:02:15.888075  39    ff   ff   

 2288 02:02:15.891474  40    ff   ff   

 2289 02:02:15.891873  41    ff   ff   

 2290 02:02:15.894672  42    ff   ff   

 2291 02:02:15.895073  43    ff   ff   

 2292 02:02:15.897678  pass bytecount = 0xff (0xff: all bytes pass) 

 2293 02:02:15.898070  

 2294 02:02:15.901116  DQS0 dly: 37

 2295 02:02:15.901559  DQS1 dly: 33

 2296 02:02:15.904676  Write Rank0 MR2 =0x2d

 2297 02:02:15.908339  [RankSwap] Rank num 2, (Multi 1), Rank 0

 2298 02:02:15.908731  Write Rank0 MR1 =0xd6

 2299 02:02:15.911534  [Gating]

 2300 02:02:15.911920  ==

 2301 02:02:15.914867  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2302 02:02:15.918051  fsp= 1, odt_onoff= 1, Byte mode= 0

 2303 02:02:15.918469  ==

 2304 02:02:15.921253  3 1 0 |3534 2c2b  |(11 11)(11 11) |(1 1)(1 0)| 0

 2305 02:02:15.927960  3 1 4 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

 2306 02:02:15.931299  3 1 8 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

 2307 02:02:15.934361  3 1 12 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

 2308 02:02:15.941210  3 1 16 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

 2309 02:02:15.944632  3 1 20 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

 2310 02:02:15.948294  3 1 24 |3534 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

 2311 02:02:15.954732  3 1 28 |3534 2c2b  |(11 11)(11 11) |(1 1)(1 0)| 0

 2312 02:02:15.957874  3 2 0 |3d3d 2c2b  |(11 11)(11 11) |(1 1)(1 0)| 0

 2313 02:02:15.961342  3 2 4 |3d3d 2121  |(11 11)(11 11) |(1 1)(0 0)| 0

 2314 02:02:15.964802  3 2 8 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2315 02:02:15.971612  3 2 12 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2316 02:02:15.975062  3 2 16 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2317 02:02:15.978654  3 2 20 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2318 02:02:15.985020  3 2 24 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2319 02:02:15.988370  3 2 28 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2320 02:02:15.991980  3 3 0 |3d3d 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 2321 02:02:15.995678  3 3 4 |605 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 2322 02:02:16.001700  3 3 8 |3534 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2323 02:02:16.004938  [Byte 0] Lead/lag Transition tap number (1)

 2324 02:02:16.008490  3 3 12 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 2325 02:02:16.014899  3 3 16 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 2326 02:02:16.018176  3 3 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 2327 02:02:16.021917  3 3 24 |3534 3534  |(11 11)(11 11) |(0 1)(0 0)| 0

 2328 02:02:16.028450  3 3 28 |3534 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2329 02:02:16.031431  3 4 0 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2330 02:02:16.035167  3 4 4 |3d3d 1918  |(11 11)(11 11) |(1 1)(1 1)| 0

 2331 02:02:16.038496  3 4 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2332 02:02:16.045153  3 4 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2333 02:02:16.049219  3 4 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2334 02:02:16.051893  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2335 02:02:16.058930  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2336 02:02:16.061834  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2337 02:02:16.065058  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2338 02:02:16.072304  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2339 02:02:16.075453  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2340 02:02:16.078722  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2341 02:02:16.082061  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2342 02:02:16.088843  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2343 02:02:16.092184  [Byte 0] Lead/lag falling Transition (3, 5, 20)

 2344 02:02:16.095525  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 2345 02:02:16.098971  [Byte 0] Lead/lag Transition tap number (2)

 2346 02:02:16.105715  [Byte 1] Lead/lag falling Transition (3, 5, 24)

 2347 02:02:16.108893  3 5 28 |1010 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 2348 02:02:16.112599  3 6 0 |404 3e3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 2349 02:02:16.115603  [Byte 1] Lead/lag Transition tap number (3)

 2350 02:02:16.122098  3 6 4 |4646 4646  |(0 0)(10 10) |(0 0)(0 0)| 0

 2351 02:02:16.122522  [Byte 0]First pass (3, 6, 4)

 2352 02:02:16.128767  3 6 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2353 02:02:16.129163  [Byte 1]First pass (3, 6, 8)

 2354 02:02:16.135517  3 6 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2355 02:02:16.138981  3 6 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2356 02:02:16.142775  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2357 02:02:16.145949  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2358 02:02:16.148900  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2359 02:02:16.156267  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2360 02:02:16.159129  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2361 02:02:16.162460  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2362 02:02:16.166108  All bytes gating window > 1UI, Early break!

 2363 02:02:16.166572  

 2364 02:02:16.169402  best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)

 2365 02:02:16.169827  

 2366 02:02:16.172632  best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)

 2367 02:02:16.173139  

 2368 02:02:16.175994  

 2369 02:02:16.176412  

 2370 02:02:16.179423  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)

 2371 02:02:16.179850  

 2372 02:02:16.182943  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)

 2373 02:02:16.183369  

 2374 02:02:16.183704  

 2375 02:02:16.185905  Write Rank0 MR1 =0x56

 2376 02:02:16.186360  

 2377 02:02:16.189802  best RODT dly(2T, 0.5T) = (2, 2)

 2378 02:02:16.190261  

 2379 02:02:16.190605  best RODT dly(2T, 0.5T) = (2, 2)

 2380 02:02:16.192900  ==

 2381 02:02:16.195981  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2382 02:02:16.199471  fsp= 1, odt_onoff= 1, Byte mode= 0

 2383 02:02:16.199902  ==

 2384 02:02:16.203163  Start DQ dly to find pass range UseTestEngine =0

 2385 02:02:16.206553  x-axis: bit #, y-axis: DQ dly (-127~63)

 2386 02:02:16.209311  RX Vref Scan = 0

 2387 02:02:16.213244  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 2388 02:02:16.216291  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 2389 02:02:16.216814  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 2390 02:02:16.219576  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 2391 02:02:16.222685  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 2392 02:02:16.226087  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 2393 02:02:16.229363  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 2394 02:02:16.232746  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 2395 02:02:16.236261  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 2396 02:02:16.239317  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 2397 02:02:16.239707  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 2398 02:02:16.243050  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 2399 02:02:16.246329  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 2400 02:02:16.249704  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 2401 02:02:16.252747  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 2402 02:02:16.256401  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 2403 02:02:16.260146  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 2404 02:02:16.263235  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 2405 02:02:16.263697  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 2406 02:02:16.266506  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 2407 02:02:16.269825  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 2408 02:02:16.273503  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 2409 02:02:16.276173  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 2410 02:02:16.280414  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 2411 02:02:16.283009  -2, [0] xxxxxxxx xxxxxxxo [MSB]

 2412 02:02:16.283439  -1, [0] xxxxxxxx xxxxxxxo [MSB]

 2413 02:02:16.286860  0, [0] xxxoxxxx xxxxxxxo [MSB]

 2414 02:02:16.290010  1, [0] xxooxxxx xxoxxxxo [MSB]

 2415 02:02:16.293382  2, [0] xxooxxxx oxoxxxxo [MSB]

 2416 02:02:16.296245  3, [0] xxoooxxo oooxxxxo [MSB]

 2417 02:02:16.299867  4, [0] xxoooxxo ooooxooo [MSB]

 2418 02:02:16.300308  5, [0] xooooxxo oooooooo [MSB]

 2419 02:02:16.302818  6, [0] xooooooo oooooooo [MSB]

 2420 02:02:16.306521  31, [0] oooooooo oooooooo [MSB]

 2421 02:02:16.309485  32, [0] oooxoooo oooooooo [MSB]

 2422 02:02:16.313025  33, [0] ooxxoooo ooooooox [MSB]

 2423 02:02:16.316645  34, [0] ooxxoooo oxooooox [MSB]

 2424 02:02:16.319957  35, [0] ooxxoooo oxxxooox [MSB]

 2425 02:02:16.320465  36, [0] ooxxoooo xxxxooxx [MSB]

 2426 02:02:16.323192  37, [0] ooxxxoox xxxxoxxx [MSB]

 2427 02:02:16.326336  38, [0] ooxxxoox xxxxoxxx [MSB]

 2428 02:02:16.329872  39, [0] ooxxxoox xxxxxxxx [MSB]

 2429 02:02:16.333091  40, [0] ooxxxoox xxxxxxxx [MSB]

 2430 02:02:16.336763  41, [0] oxxxxoxx xxxxxxxx [MSB]

 2431 02:02:16.337198  42, [0] xxxxxxxx xxxxxxxx [MSB]

 2432 02:02:16.343101  iDelay=42, Bit 0, Center 24 (7 ~ 41) 35

 2433 02:02:16.346921  iDelay=42, Bit 1, Center 22 (5 ~ 40) 36

 2434 02:02:16.349848  iDelay=42, Bit 2, Center 16 (1 ~ 32) 32

 2435 02:02:16.353700  iDelay=42, Bit 3, Center 15 (0 ~ 31) 32

 2436 02:02:16.356907  iDelay=42, Bit 4, Center 19 (3 ~ 36) 34

 2437 02:02:16.359789  iDelay=42, Bit 5, Center 23 (6 ~ 41) 36

 2438 02:02:16.363183  iDelay=42, Bit 6, Center 23 (6 ~ 40) 35

 2439 02:02:16.366763  iDelay=42, Bit 7, Center 19 (3 ~ 36) 34

 2440 02:02:16.369604  iDelay=42, Bit 8, Center 18 (2 ~ 35) 34

 2441 02:02:16.373109  iDelay=42, Bit 9, Center 18 (3 ~ 33) 31

 2442 02:02:16.376054  iDelay=42, Bit 10, Center 17 (1 ~ 34) 34

 2443 02:02:16.379495  iDelay=42, Bit 11, Center 19 (4 ~ 34) 31

 2444 02:02:16.383082  iDelay=42, Bit 12, Center 21 (5 ~ 38) 34

 2445 02:02:16.386180  iDelay=42, Bit 13, Center 20 (4 ~ 36) 33

 2446 02:02:16.393309  iDelay=42, Bit 14, Center 19 (4 ~ 35) 32

 2447 02:02:16.396173  iDelay=42, Bit 15, Center 15 (-2 ~ 32) 35

 2448 02:02:16.396637  ==

 2449 02:02:16.399827  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2450 02:02:16.402833  fsp= 1, odt_onoff= 1, Byte mode= 0

 2451 02:02:16.403401  ==

 2452 02:02:16.406041  DQS Delay:

 2453 02:02:16.406670  DQS0 = 0, DQS1 = 0

 2454 02:02:16.407104  DQM Delay:

 2455 02:02:16.409523  DQM0 = 20, DQM1 = 18

 2456 02:02:16.410149  DQ Delay:

 2457 02:02:16.413197  DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15

 2458 02:02:16.416253  DQ4 =19, DQ5 =23, DQ6 =23, DQ7 =19

 2459 02:02:16.419737  DQ8 =18, DQ9 =18, DQ10 =17, DQ11 =19

 2460 02:02:16.423557  DQ12 =21, DQ13 =20, DQ14 =19, DQ15 =15

 2461 02:02:16.424069  

 2462 02:02:16.424481  

 2463 02:02:16.426184  DramC Write-DBI off

 2464 02:02:16.426702  ==

 2465 02:02:16.429916  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2466 02:02:16.432955  fsp= 1, odt_onoff= 1, Byte mode= 0

 2467 02:02:16.433522  ==

 2468 02:02:16.439968  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 2469 02:02:16.440436  

 2470 02:02:16.440794  Begin, DQ Scan Range 929~1185

 2471 02:02:16.443138  

 2472 02:02:16.443588  

 2473 02:02:16.443985  	TX Vref Scan disable

 2474 02:02:16.446309  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 2475 02:02:16.449512  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 2476 02:02:16.453113  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 2477 02:02:16.456360  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 2478 02:02:16.459925  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 2479 02:02:16.466302  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 2480 02:02:16.469838  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 2481 02:02:16.473060  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 2482 02:02:16.476545  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 2483 02:02:16.479542  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 2484 02:02:16.482990  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 2485 02:02:16.486114  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 2486 02:02:16.489841  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 2487 02:02:16.493002  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 2488 02:02:16.496445  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 2489 02:02:16.500236  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 2490 02:02:16.503765  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 2491 02:02:16.506678  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 2492 02:02:16.509848  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 2493 02:02:16.513151  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 2494 02:02:16.516703  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 2495 02:02:16.519636  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 2496 02:02:16.526392  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 2497 02:02:16.529680  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 2498 02:02:16.533543  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 2499 02:02:16.536352  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 2500 02:02:16.540070  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 2501 02:02:16.543096  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 2502 02:02:16.547186  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 2503 02:02:16.550094  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2504 02:02:16.553583  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2505 02:02:16.556351  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2506 02:02:16.559733  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2507 02:02:16.563322  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2508 02:02:16.566272  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 2509 02:02:16.569599  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 2510 02:02:16.572597  965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 2511 02:02:16.575871  966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 2512 02:02:16.579680  967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]

 2513 02:02:16.582662  968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]

 2514 02:02:16.586267  969 |3 6 9|[0] xxxxxxxx xxxxxxxo [MSB]

 2515 02:02:16.589581  970 |3 6 10|[0] xxxxxxxx oooxxxxo [MSB]

 2516 02:02:16.592782  971 |3 6 11|[0] xxxxxxxx oooxxxoo [MSB]

 2517 02:02:16.596279  972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]

 2518 02:02:16.603170  973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]

 2519 02:02:16.606071  974 |3 6 14|[0] xxxoxxxx oooooooo [MSB]

 2520 02:02:16.609508  975 |3 6 15|[0] xxooxxxx oooooooo [MSB]

 2521 02:02:16.612867  976 |3 6 16|[0] xxoooxxo oooooooo [MSB]

 2522 02:02:16.616157  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 2523 02:02:16.623319  993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]

 2524 02:02:16.626225  994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]

 2525 02:02:16.629633  995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]

 2526 02:02:16.632933  996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]

 2527 02:02:16.636306  997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]

 2528 02:02:16.639736  998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]

 2529 02:02:16.643374  999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]

 2530 02:02:16.646481  Byte0, DQ PI dly=985, DQM PI dly= 985

 2531 02:02:16.650183  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)

 2532 02:02:16.650416  

 2533 02:02:16.653182  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)

 2534 02:02:16.656585  

 2535 02:02:16.659975  Byte1, DQ PI dly=980, DQM PI dly= 980

 2536 02:02:16.663141  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)

 2537 02:02:16.663375  

 2538 02:02:16.666468  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)

 2539 02:02:16.666693  

 2540 02:02:16.666866  ==

 2541 02:02:16.673417  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2542 02:02:16.676954  fsp= 1, odt_onoff= 1, Byte mode= 0

 2543 02:02:16.677316  ==

 2544 02:02:16.680189  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 2545 02:02:16.680625  

 2546 02:02:16.683814  Begin, DQ Scan Range 956~1020

 2547 02:02:16.686917  Write Rank0 MR14 =0x0

 2548 02:02:16.693412  

 2549 02:02:16.693846  	CH=1, VrefRange= 0, VrefLevel = 0

 2550 02:02:16.700348  TX Bit0 (981~997) 17 989,   Bit8 (971~990) 20 980,

 2551 02:02:16.703339  TX Bit1 (978~995) 18 986,   Bit9 (971~989) 19 980,

 2552 02:02:16.710089  TX Bit2 (977~991) 15 984,   Bit10 (974~989) 16 981,

 2553 02:02:16.713528  TX Bit3 (976~990) 15 983,   Bit11 (975~991) 17 983,

 2554 02:02:16.716696  TX Bit4 (977~992) 16 984,   Bit12 (975~992) 18 983,

 2555 02:02:16.723490  TX Bit5 (979~997) 19 988,   Bit13 (976~991) 16 983,

 2556 02:02:16.726753  TX Bit6 (979~997) 19 988,   Bit14 (975~989) 15 982,

 2557 02:02:16.730369  TX Bit7 (978~992) 15 985,   Bit15 (970~987) 18 978,

 2558 02:02:16.730805  

 2559 02:02:16.733195  Write Rank0 MR14 =0x2

 2560 02:02:16.742366  

 2561 02:02:16.742826  	CH=1, VrefRange= 0, VrefLevel = 2

 2562 02:02:16.748734  TX Bit0 (979~998) 20 988,   Bit8 (971~991) 21 981,

 2563 02:02:16.751626  TX Bit1 (978~996) 19 987,   Bit9 (971~989) 19 980,

 2564 02:02:16.758415  TX Bit2 (976~991) 16 983,   Bit10 (974~990) 17 982,

 2565 02:02:16.761773  TX Bit3 (975~990) 16 982,   Bit11 (975~991) 17 983,

 2566 02:02:16.765365  TX Bit4 (977~993) 17 985,   Bit12 (975~992) 18 983,

 2567 02:02:16.771894  TX Bit5 (978~998) 21 988,   Bit13 (976~991) 16 983,

 2568 02:02:16.775111  TX Bit6 (979~998) 20 988,   Bit14 (974~990) 17 982,

 2569 02:02:16.778604  TX Bit7 (977~992) 16 984,   Bit15 (970~987) 18 978,

 2570 02:02:16.779009  

 2571 02:02:16.781777  Write Rank0 MR14 =0x4

 2572 02:02:16.790399  

 2573 02:02:16.790906  	CH=1, VrefRange= 0, VrefLevel = 4

 2574 02:02:16.797214  TX Bit0 (979~998) 20 988,   Bit8 (970~991) 22 980,

 2575 02:02:16.800616  TX Bit1 (978~997) 20 987,   Bit9 (970~990) 21 980,

 2576 02:02:16.807231  TX Bit2 (976~991) 16 983,   Bit10 (973~990) 18 981,

 2577 02:02:16.810943  TX Bit3 (975~991) 17 983,   Bit11 (974~992) 19 983,

 2578 02:02:16.814091  TX Bit4 (977~993) 17 985,   Bit12 (975~992) 18 983,

 2579 02:02:16.820752  TX Bit5 (978~998) 21 988,   Bit13 (975~991) 17 983,

 2580 02:02:16.823976  TX Bit6 (978~998) 21 988,   Bit14 (974~991) 18 982,

 2581 02:02:16.827557  TX Bit7 (977~993) 17 985,   Bit15 (969~988) 20 978,

 2582 02:02:16.827954  

 2583 02:02:16.830568  Write Rank0 MR14 =0x6

 2584 02:02:16.839252  

 2585 02:02:16.839645  	CH=1, VrefRange= 0, VrefLevel = 6

 2586 02:02:16.845903  TX Bit0 (979~998) 20 988,   Bit8 (970~991) 22 980,

 2587 02:02:16.849327  TX Bit1 (977~997) 21 987,   Bit9 (971~991) 21 981,

 2588 02:02:16.855888  TX Bit2 (976~991) 16 983,   Bit10 (973~991) 19 982,

 2589 02:02:16.859199  TX Bit3 (975~991) 17 983,   Bit11 (974~992) 19 983,

 2590 02:02:16.862544  TX Bit4 (976~994) 19 985,   Bit12 (974~992) 19 983,

 2591 02:02:16.869062  TX Bit5 (978~998) 21 988,   Bit13 (975~992) 18 983,

 2592 02:02:16.872397  TX Bit6 (978~998) 21 988,   Bit14 (974~991) 18 982,

 2593 02:02:16.876025  TX Bit7 (977~993) 17 985,   Bit15 (969~989) 21 979,

 2594 02:02:16.876415  

 2595 02:02:16.879141  Write Rank0 MR14 =0x8

 2596 02:02:16.887911  

 2597 02:02:16.888297  	CH=1, VrefRange= 0, VrefLevel = 8

 2598 02:02:16.894390  TX Bit0 (979~998) 20 988,   Bit8 (970~991) 22 980,

 2599 02:02:16.898018  TX Bit1 (977~997) 21 987,   Bit9 (971~991) 21 981,

 2600 02:02:16.904516  TX Bit2 (976~992) 17 984,   Bit10 (972~991) 20 981,

 2601 02:02:16.908089  TX Bit3 (974~991) 18 982,   Bit11 (973~992) 20 982,

 2602 02:02:16.911244  TX Bit4 (976~995) 20 985,   Bit12 (973~993) 21 983,

 2603 02:02:16.917661  TX Bit5 (977~998) 22 987,   Bit13 (975~992) 18 983,

 2604 02:02:16.921242  TX Bit6 (978~998) 21 988,   Bit14 (973~991) 19 982,

 2605 02:02:16.924251  TX Bit7 (977~994) 18 985,   Bit15 (969~989) 21 979,

 2606 02:02:16.924758  

 2607 02:02:16.927971  Write Rank0 MR14 =0xa

 2608 02:02:16.936321  

 2609 02:02:16.939915  	CH=1, VrefRange= 0, VrefLevel = 10

 2610 02:02:16.943032  TX Bit0 (978~998) 21 988,   Bit8 (970~992) 23 981,

 2611 02:02:16.946493  TX Bit1 (977~997) 21 987,   Bit9 (970~991) 22 980,

 2612 02:02:16.950068  TX Bit2 (976~992) 17 984,   Bit10 (971~992) 22 981,

 2613 02:02:16.956366  TX Bit3 (974~992) 19 983,   Bit11 (973~992) 20 982,

 2614 02:02:16.959781  TX Bit4 (976~995) 20 985,   Bit12 (973~993) 21 983,

 2615 02:02:16.966667  TX Bit5 (978~998) 21 988,   Bit13 (974~992) 19 983,

 2616 02:02:16.970472  TX Bit6 (978~998) 21 988,   Bit14 (972~992) 21 982,

 2617 02:02:16.973687  TX Bit7 (977~994) 18 985,   Bit15 (969~990) 22 979,

 2618 02:02:16.974092  

 2619 02:02:16.976730  Write Rank0 MR14 =0xc

 2620 02:02:16.985226  

 2621 02:02:16.985763  	CH=1, VrefRange= 0, VrefLevel = 12

 2622 02:02:16.991868  TX Bit0 (978~999) 22 988,   Bit8 (970~992) 23 981,

 2623 02:02:16.995274  TX Bit1 (977~998) 22 987,   Bit9 (970~991) 22 980,

 2624 02:02:17.001932  TX Bit2 (976~993) 18 984,   Bit10 (971~992) 22 981,

 2625 02:02:17.005377  TX Bit3 (974~992) 19 983,   Bit11 (972~992) 21 982,

 2626 02:02:17.008763  TX Bit4 (976~996) 21 986,   Bit12 (973~993) 21 983,

 2627 02:02:17.015116  TX Bit5 (977~999) 23 988,   Bit13 (974~992) 19 983,

 2628 02:02:17.018529  TX Bit6 (977~999) 23 988,   Bit14 (972~992) 21 982,

 2629 02:02:17.022002  TX Bit7 (977~995) 19 986,   Bit15 (969~990) 22 979,

 2630 02:02:17.022483  

 2631 02:02:17.025266  Write Rank0 MR14 =0xe

 2632 02:02:17.034051  

 2633 02:02:17.037165  	CH=1, VrefRange= 0, VrefLevel = 14

 2634 02:02:17.040620  TX Bit0 (978~999) 22 988,   Bit8 (970~992) 23 981,

 2635 02:02:17.043841  TX Bit1 (977~998) 22 987,   Bit9 (970~992) 23 981,

 2636 02:02:17.050690  TX Bit2 (976~993) 18 984,   Bit10 (971~992) 22 981,

 2637 02:02:17.054286  TX Bit3 (973~993) 21 983,   Bit11 (972~992) 21 982,

 2638 02:02:17.057968  TX Bit4 (976~997) 22 986,   Bit12 (973~993) 21 983,

 2639 02:02:17.064333  TX Bit5 (977~999) 23 988,   Bit13 (973~993) 21 983,

 2640 02:02:17.067711  TX Bit6 (977~999) 23 988,   Bit14 (972~992) 21 982,

 2641 02:02:17.071186  TX Bit7 (976~996) 21 986,   Bit15 (969~991) 23 980,

 2642 02:02:17.071659  

 2643 02:02:17.074281  Write Rank0 MR14 =0x10

 2644 02:02:17.082949  

 2645 02:02:17.083352  	CH=1, VrefRange= 0, VrefLevel = 16

 2646 02:02:17.089685  TX Bit0 (977~999) 23 988,   Bit8 (970~992) 23 981,

 2647 02:02:17.092730  TX Bit1 (976~998) 23 987,   Bit9 (970~992) 23 981,

 2648 02:02:17.099443  TX Bit2 (975~994) 20 984,   Bit10 (970~992) 23 981,

 2649 02:02:17.102882  TX Bit3 (973~993) 21 983,   Bit11 (971~993) 23 982,

 2650 02:02:17.106358  TX Bit4 (976~997) 22 986,   Bit12 (972~994) 23 983,

 2651 02:02:17.113082  TX Bit5 (977~999) 23 988,   Bit13 (973~993) 21 983,

 2652 02:02:17.116169  TX Bit6 (977~999) 23 988,   Bit14 (971~992) 22 981,

 2653 02:02:17.119379  TX Bit7 (976~997) 22 986,   Bit15 (969~991) 23 980,

 2654 02:02:17.119831  

 2655 02:02:17.122989  Write Rank0 MR14 =0x12

 2656 02:02:17.131841  

 2657 02:02:17.132358  	CH=1, VrefRange= 0, VrefLevel = 18

 2658 02:02:17.138556  TX Bit0 (977~1000) 24 988,   Bit8 (970~992) 23 981,

 2659 02:02:17.141875  TX Bit1 (976~998) 23 987,   Bit9 (970~992) 23 981,

 2660 02:02:17.148647  TX Bit2 (975~994) 20 984,   Bit10 (970~993) 24 981,

 2661 02:02:17.152287  TX Bit3 (972~994) 23 983,   Bit11 (971~993) 23 982,

 2662 02:02:17.155383  TX Bit4 (975~997) 23 986,   Bit12 (972~994) 23 983,

 2663 02:02:17.162096  TX Bit5 (977~999) 23 988,   Bit13 (972~993) 22 982,

 2664 02:02:17.165847  TX Bit6 (977~1000) 24 988,   Bit14 (971~993) 23 982,

 2665 02:02:17.168981  TX Bit7 (976~997) 22 986,   Bit15 (969~991) 23 980,

 2666 02:02:17.169390  

 2667 02:02:17.172188  Write Rank0 MR14 =0x14

 2668 02:02:17.181888  

 2669 02:02:17.184935  	CH=1, VrefRange= 0, VrefLevel = 20

 2670 02:02:17.188112  TX Bit0 (977~1000) 24 988,   Bit8 (969~993) 25 981,

 2671 02:02:17.191326  TX Bit1 (976~998) 23 987,   Bit9 (970~992) 23 981,

 2672 02:02:17.198040  TX Bit2 (974~995) 22 984,   Bit10 (971~993) 23 982,

 2673 02:02:17.201574  TX Bit3 (972~994) 23 983,   Bit11 (971~994) 24 982,

 2674 02:02:17.204665  TX Bit4 (975~998) 24 986,   Bit12 (972~994) 23 983,

 2675 02:02:17.211485  TX Bit5 (977~1000) 24 988,   Bit13 (972~993) 22 982,

 2676 02:02:17.214633  TX Bit6 (977~1000) 24 988,   Bit14 (971~993) 23 982,

 2677 02:02:17.217855  TX Bit7 (976~997) 22 986,   Bit15 (968~992) 25 980,

 2678 02:02:17.221215  

 2679 02:02:17.221657  Write Rank0 MR14 =0x16

 2680 02:02:17.230720  

 2681 02:02:17.234261  	CH=1, VrefRange= 0, VrefLevel = 22

 2682 02:02:17.237483  TX Bit0 (977~1000) 24 988,   Bit8 (969~992) 24 980,

 2683 02:02:17.240864  TX Bit1 (976~998) 23 987,   Bit9 (969~992) 24 980,

 2684 02:02:17.247486  TX Bit2 (974~996) 23 985,   Bit10 (970~993) 24 981,

 2685 02:02:17.250799  TX Bit3 (971~995) 25 983,   Bit11 (970~994) 25 982,

 2686 02:02:17.253871  TX Bit4 (975~998) 24 986,   Bit12 (971~995) 25 983,

 2687 02:02:17.260855  TX Bit5 (976~1000) 25 988,   Bit13 (971~994) 24 982,

 2688 02:02:17.263825  TX Bit6 (977~1000) 24 988,   Bit14 (970~993) 24 981,

 2689 02:02:17.267131  TX Bit7 (976~997) 22 986,   Bit15 (968~992) 25 980,

 2690 02:02:17.270797  

 2691 02:02:17.271241  Write Rank0 MR14 =0x18

 2692 02:02:17.279825  

 2693 02:02:17.283365  	CH=1, VrefRange= 0, VrefLevel = 24

 2694 02:02:17.286471  TX Bit0 (977~1000) 24 988,   Bit8 (969~992) 24 980,

 2695 02:02:17.289737  TX Bit1 (976~999) 24 987,   Bit9 (969~992) 24 980,

 2696 02:02:17.296735  TX Bit2 (974~996) 23 985,   Bit10 (970~993) 24 981,

 2697 02:02:17.299773  TX Bit3 (971~995) 25 983,   Bit11 (970~994) 25 982,

 2698 02:02:17.303334  TX Bit4 (975~998) 24 986,   Bit12 (971~995) 25 983,

 2699 02:02:17.310153  TX Bit5 (976~999) 24 987,   Bit13 (971~994) 24 982,

 2700 02:02:17.313538  TX Bit6 (976~1000) 25 988,   Bit14 (970~993) 24 981,

 2701 02:02:17.316549  TX Bit7 (976~998) 23 987,   Bit15 (968~992) 25 980,

 2702 02:02:17.316945  

 2703 02:02:17.320122  Write Rank0 MR14 =0x1a

 2704 02:02:17.329511  

 2705 02:02:17.332600  	CH=1, VrefRange= 0, VrefLevel = 26

 2706 02:02:17.335733  TX Bit0 (977~1001) 25 989,   Bit8 (969~992) 24 980,

 2707 02:02:17.339170  TX Bit1 (976~999) 24 987,   Bit9 (969~992) 24 980,

 2708 02:02:17.346163  TX Bit2 (974~997) 24 985,   Bit10 (970~993) 24 981,

 2709 02:02:17.349522  TX Bit3 (970~995) 26 982,   Bit11 (970~994) 25 982,

 2710 02:02:17.352658  TX Bit4 (975~998) 24 986,   Bit12 (971~994) 24 982,

 2711 02:02:17.359485  TX Bit5 (976~999) 24 987,   Bit13 (970~993) 24 981,

 2712 02:02:17.362492  TX Bit6 (976~1000) 25 988,   Bit14 (970~992) 23 981,

 2713 02:02:17.366570  TX Bit7 (975~998) 24 986,   Bit15 (968~992) 25 980,

 2714 02:02:17.367115  

 2715 02:02:17.369166  Write Rank0 MR14 =0x1c

 2716 02:02:17.378804  

 2717 02:02:17.382005  	CH=1, VrefRange= 0, VrefLevel = 28

 2718 02:02:17.385178  TX Bit0 (977~1001) 25 989,   Bit8 (969~992) 24 980,

 2719 02:02:17.388529  TX Bit1 (976~999) 24 987,   Bit9 (969~992) 24 980,

 2720 02:02:17.395113  TX Bit2 (974~997) 24 985,   Bit10 (970~993) 24 981,

 2721 02:02:17.398593  TX Bit3 (970~995) 26 982,   Bit11 (970~994) 25 982,

 2722 02:02:17.402297  TX Bit4 (975~998) 24 986,   Bit12 (971~994) 24 982,

 2723 02:02:17.408341  TX Bit5 (976~999) 24 987,   Bit13 (970~993) 24 981,

 2724 02:02:17.411885  TX Bit6 (976~1000) 25 988,   Bit14 (970~992) 23 981,

 2725 02:02:17.414999  TX Bit7 (975~998) 24 986,   Bit15 (968~992) 25 980,

 2726 02:02:17.418337  

 2727 02:02:17.418787  Write Rank0 MR14 =0x1e

 2728 02:02:17.427911  

 2729 02:02:17.430892  	CH=1, VrefRange= 0, VrefLevel = 30

 2730 02:02:17.434500  TX Bit0 (977~1001) 25 989,   Bit8 (969~992) 24 980,

 2731 02:02:17.437973  TX Bit1 (976~999) 24 987,   Bit9 (969~992) 24 980,

 2732 02:02:17.444600  TX Bit2 (974~997) 24 985,   Bit10 (970~993) 24 981,

 2733 02:02:17.447511  TX Bit3 (970~995) 26 982,   Bit11 (970~994) 25 982,

 2734 02:02:17.450581  TX Bit4 (975~998) 24 986,   Bit12 (971~994) 24 982,

 2735 02:02:17.457431  TX Bit5 (976~999) 24 987,   Bit13 (970~993) 24 981,

 2736 02:02:17.460479  TX Bit6 (976~1000) 25 988,   Bit14 (970~992) 23 981,

 2737 02:02:17.463844  TX Bit7 (975~998) 24 986,   Bit15 (968~992) 25 980,

 2738 02:02:17.467008  

 2739 02:02:17.467083  Write Rank0 MR14 =0x20

 2740 02:02:17.476624  

 2741 02:02:17.480038  	CH=1, VrefRange= 0, VrefLevel = 32

 2742 02:02:17.483254  TX Bit0 (977~1001) 25 989,   Bit8 (969~992) 24 980,

 2743 02:02:17.486612  TX Bit1 (976~999) 24 987,   Bit9 (969~992) 24 980,

 2744 02:02:17.493243  TX Bit2 (974~997) 24 985,   Bit10 (970~993) 24 981,

 2745 02:02:17.496732  TX Bit3 (970~995) 26 982,   Bit11 (970~994) 25 982,

 2746 02:02:17.499876  TX Bit4 (975~998) 24 986,   Bit12 (971~994) 24 982,

 2747 02:02:17.506795  TX Bit5 (976~999) 24 987,   Bit13 (970~993) 24 981,

 2748 02:02:17.510000  TX Bit6 (976~1000) 25 988,   Bit14 (970~992) 23 981,

 2749 02:02:17.513632  TX Bit7 (975~998) 24 986,   Bit15 (968~992) 25 980,

 2750 02:02:17.516539  

 2751 02:02:17.516614  Write Rank0 MR14 =0x22

 2752 02:02:17.525831  

 2753 02:02:17.529088  	CH=1, VrefRange= 0, VrefLevel = 34

 2754 02:02:17.532449  TX Bit0 (977~1001) 25 989,   Bit8 (969~992) 24 980,

 2755 02:02:17.535823  TX Bit1 (976~999) 24 987,   Bit9 (969~992) 24 980,

 2756 02:02:17.542258  TX Bit2 (974~997) 24 985,   Bit10 (970~993) 24 981,

 2757 02:02:17.545926  TX Bit3 (970~995) 26 982,   Bit11 (970~994) 25 982,

 2758 02:02:17.549414  TX Bit4 (975~998) 24 986,   Bit12 (971~994) 24 982,

 2759 02:02:17.555619  TX Bit5 (976~999) 24 987,   Bit13 (970~993) 24 981,

 2760 02:02:17.559653  TX Bit6 (976~1000) 25 988,   Bit14 (970~992) 23 981,

 2761 02:02:17.562352  TX Bit7 (975~998) 24 986,   Bit15 (968~992) 25 980,

 2762 02:02:17.565810  

 2763 02:02:17.565886  

 2764 02:02:17.569212  TX Vref found, early break! 360< 369

 2765 02:02:17.572720  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 2766 02:02:17.575863  u1DelayCellOfst[0]=8 cells (7 PI)

 2767 02:02:17.579330  u1DelayCellOfst[1]=6 cells (5 PI)

 2768 02:02:17.582580  u1DelayCellOfst[2]=3 cells (3 PI)

 2769 02:02:17.585820  u1DelayCellOfst[3]=0 cells (0 PI)

 2770 02:02:17.585896  u1DelayCellOfst[4]=5 cells (4 PI)

 2771 02:02:17.589233  u1DelayCellOfst[5]=6 cells (5 PI)

 2772 02:02:17.592345  u1DelayCellOfst[6]=7 cells (6 PI)

 2773 02:02:17.595863  u1DelayCellOfst[7]=5 cells (4 PI)

 2774 02:02:17.599467  Byte0, DQ PI dly=982, DQM PI dly= 985

 2775 02:02:17.602616  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)

 2776 02:02:17.605916  

 2777 02:02:17.609262  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)

 2778 02:02:17.609339  

 2779 02:02:17.612690  u1DelayCellOfst[8]=0 cells (0 PI)

 2780 02:02:17.615849  u1DelayCellOfst[9]=0 cells (0 PI)

 2781 02:02:17.619278  u1DelayCellOfst[10]=1 cells (1 PI)

 2782 02:02:17.622528  u1DelayCellOfst[11]=2 cells (2 PI)

 2783 02:02:17.622604  u1DelayCellOfst[12]=2 cells (2 PI)

 2784 02:02:17.626055  u1DelayCellOfst[13]=1 cells (1 PI)

 2785 02:02:17.629185  u1DelayCellOfst[14]=1 cells (1 PI)

 2786 02:02:17.632476  u1DelayCellOfst[15]=0 cells (0 PI)

 2787 02:02:17.635990  Byte1, DQ PI dly=980, DQM PI dly= 981

 2788 02:02:17.642534  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)

 2789 02:02:17.642611  

 2790 02:02:17.645871  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)

 2791 02:02:17.645949  

 2792 02:02:17.649348  Write Rank0 MR14 =0x1a

 2793 02:02:17.649430  

 2794 02:02:17.649493  Final TX Range 0 Vref 26

 2795 02:02:17.649552  

 2796 02:02:17.656026  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 2797 02:02:17.656103  

 2798 02:02:17.662598  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 2799 02:02:17.669584  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2800 02:02:17.676269  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2801 02:02:17.679990  Write Rank0 MR3 =0xb0

 2802 02:02:17.682940  DramC Write-DBI on

 2803 02:02:17.683043  ==

 2804 02:02:17.686413  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2805 02:02:17.689482  fsp= 1, odt_onoff= 1, Byte mode= 0

 2806 02:02:17.689559  ==

 2807 02:02:17.692821  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 2808 02:02:17.692897  

 2809 02:02:17.696487  Begin, DQ Scan Range 701~765

 2810 02:02:17.696564  

 2811 02:02:17.696623  

 2812 02:02:17.699340  	TX Vref Scan disable

 2813 02:02:17.702900  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 2814 02:02:17.706435  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2815 02:02:17.709812  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2816 02:02:17.713032  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2817 02:02:17.716264  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2818 02:02:17.720092  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2819 02:02:17.723135  707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 2820 02:02:17.726343  708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 2821 02:02:17.730353  709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 2822 02:02:17.733654  710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 2823 02:02:17.736518  711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]

 2824 02:02:17.739959  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 2825 02:02:17.743112  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 2826 02:02:17.746657  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 2827 02:02:17.753615  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 2828 02:02:17.756672  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 2829 02:02:17.760185  717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]

 2830 02:02:17.767457  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 2831 02:02:17.770672  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 2832 02:02:17.773906  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 2833 02:02:17.777018  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 2834 02:02:17.780527  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 2835 02:02:17.784037  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 2836 02:02:17.786814  744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]

 2837 02:02:17.790322  Byte0, DQ PI dly=730, DQM PI dly= 730

 2838 02:02:17.793753  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)

 2839 02:02:17.794307  

 2840 02:02:17.800874  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)

 2841 02:02:17.801394  

 2842 02:02:17.803861  Byte1, DQ PI dly=724, DQM PI dly= 724

 2843 02:02:17.807072  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)

 2844 02:02:17.807503  

 2845 02:02:17.810359  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)

 2846 02:02:17.810871  

 2847 02:02:17.816879  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 2848 02:02:17.823823  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2849 02:02:17.830560  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2850 02:02:17.833585  Write Rank0 MR3 =0x30

 2851 02:02:17.836851  DramC Write-DBI off

 2852 02:02:17.837284  

 2853 02:02:17.837617  [DATLAT]

 2854 02:02:17.840432  Freq=1600, CH1 RK0, use_rxtx_scan=0

 2855 02:02:17.840865  

 2856 02:02:17.841202  DATLAT Default: 0xf

 2857 02:02:17.843555  7, 0xFFFF, sum=0

 2858 02:02:17.844041  8, 0xFFFF, sum=0

 2859 02:02:17.847003  9, 0xFFFF, sum=0

 2860 02:02:17.847443  10, 0xFFFF, sum=0

 2861 02:02:17.850601  11, 0xFFFF, sum=0

 2862 02:02:17.851043  12, 0xFFFF, sum=0

 2863 02:02:17.853593  13, 0xFFFF, sum=0

 2864 02:02:17.854029  14, 0x0, sum=1

 2865 02:02:17.856998  15, 0x0, sum=2

 2866 02:02:17.857391  16, 0x0, sum=3

 2867 02:02:17.857701  17, 0x0, sum=4

 2868 02:02:17.864470  pattern=2 first_step=14 total pass=5 best_step=16

 2869 02:02:17.864942  ==

 2870 02:02:17.867108  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2871 02:02:17.870590  fsp= 1, odt_onoff= 1, Byte mode= 0

 2872 02:02:17.870983  ==

 2873 02:02:17.877039  Start DQ dly to find pass range UseTestEngine =1

 2874 02:02:17.880894  x-axis: bit #, y-axis: DQ dly (-127~63)

 2875 02:02:17.881364  RX Vref Scan = 1

 2876 02:02:17.996343  

 2877 02:02:17.996846  RX Vref found, early break!

 2878 02:02:17.997191  

 2879 02:02:17.999718  Final RX Vref 12, apply to both rank0 and 1

 2880 02:02:18.002984  ==

 2881 02:02:18.006091  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2882 02:02:18.009690  fsp= 1, odt_onoff= 1, Byte mode= 0

 2883 02:02:18.010174  ==

 2884 02:02:18.010576  DQS Delay:

 2885 02:02:18.012806  DQS0 = 0, DQS1 = 0

 2886 02:02:18.013238  DQM Delay:

 2887 02:02:18.016083  DQM0 = 20, DQM1 = 18

 2888 02:02:18.016529  DQ Delay:

 2889 02:02:18.019962  DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15

 2890 02:02:18.022888  DQ4 =19, DQ5 =24, DQ6 =24, DQ7 =19

 2891 02:02:18.026314  DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19

 2892 02:02:18.029460  DQ12 =21, DQ13 =19, DQ14 =20, DQ15 =15

 2893 02:02:18.029889  

 2894 02:02:18.030258  

 2895 02:02:18.030579  

 2896 02:02:18.032826  [DramC_TX_OE_Calibration] TA2

 2897 02:02:18.036409  Original DQ_B0 (3 6) =30, OEN = 27

 2898 02:02:18.039435  Original DQ_B1 (3 6) =30, OEN = 27

 2899 02:02:18.043287  23, 0x0, End_B0=23 End_B1=23

 2900 02:02:18.043727  24, 0x0, End_B0=24 End_B1=24

 2901 02:02:18.046534  25, 0x0, End_B0=25 End_B1=25

 2902 02:02:18.049536  26, 0x0, End_B0=26 End_B1=26

 2903 02:02:18.052965  27, 0x0, End_B0=27 End_B1=27

 2904 02:02:18.053454  28, 0x0, End_B0=28 End_B1=28

 2905 02:02:18.056364  29, 0x0, End_B0=29 End_B1=29

 2906 02:02:18.059968  30, 0x0, End_B0=30 End_B1=30

 2907 02:02:18.063229  31, 0xFFFF, End_B0=30 End_B1=30

 2908 02:02:18.066402  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2909 02:02:18.072922  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2910 02:02:18.073336  

 2911 02:02:18.073638  

 2912 02:02:18.076272  Write Rank0 MR23 =0x3f

 2913 02:02:18.076662  [DQSOSC]

 2914 02:02:18.083036  [DQSOSCAuto] RK0, (LSB)MR18= 0xa2, (MSB)MR19= 0x3, tDQSOscB0 = 338 ps tDQSOscB1 = 0 ps

 2915 02:02:18.089553  CH1_RK0: MR19=0x3, MR18=0xA2, DQSOSC=338, MR23=63, INC=21, DEC=32

 2916 02:02:18.093107  Write Rank0 MR23 =0x3f

 2917 02:02:18.093496  [DQSOSC]

 2918 02:02:18.099868  [DQSOSCAuto] RK0, (LSB)MR18= 0xa3, (MSB)MR19= 0x3, tDQSOscB0 = 338 ps tDQSOscB1 = 0 ps

 2919 02:02:18.102769  CH1 RK0: MR19=3, MR18=A3

 2920 02:02:18.106093  [RankSwap] Rank num 2, (Multi 1), Rank 1

 2921 02:02:18.109487  Write Rank0 MR2 =0xad

 2922 02:02:18.109876  [Write Leveling]

 2923 02:02:18.112631  delay  byte0  byte1  byte2  byte3

 2924 02:02:18.113069  

 2925 02:02:18.113374  10    0   0   

 2926 02:02:18.116134  11    0   0   

 2927 02:02:18.116537  12    0   0   

 2928 02:02:18.119730  13    0   0   

 2929 02:02:18.120129  14    0   0   

 2930 02:02:18.123087  15    0   0   

 2931 02:02:18.123484  16    0   0   

 2932 02:02:18.123794  17    0   0   

 2933 02:02:18.126027  18    0   0   

 2934 02:02:18.126519  19    0   0   

 2935 02:02:18.129467  20    0   0   

 2936 02:02:18.129864  21    0   0   

 2937 02:02:18.130171  22    0   0   

 2938 02:02:18.132743  23    0   0   

 2939 02:02:18.133279  24    0   0   

 2940 02:02:18.136231  25    0   0   

 2941 02:02:18.136632  26    0   0   

 2942 02:02:18.136944  27    0   0   

 2943 02:02:18.139521  28    0   0   

 2944 02:02:18.139948  29    0   0   

 2945 02:02:18.142699  30    0   0   

 2946 02:02:18.143224  31    0   ff   

 2947 02:02:18.146093  32    0   ff   

 2948 02:02:18.146636  33    0   ff   

 2949 02:02:18.147036  34    0   ff   

 2950 02:02:18.149598  35    0   ff   

 2951 02:02:18.150135  36    0   ff   

 2952 02:02:18.152809  37    ff   ff   

 2953 02:02:18.153203  38    ff   ff   

 2954 02:02:18.156161  39    ff   ff   

 2955 02:02:18.156707  40    ff   ff   

 2956 02:02:18.159548  41    ff   ff   

 2957 02:02:18.160019  42    ff   ff   

 2958 02:02:18.162646  43    ff   ff   

 2959 02:02:18.166144  pass bytecount = 0xff (0xff: all bytes pass) 

 2960 02:02:18.166570  

 2961 02:02:18.166872  DQS0 dly: 37

 2962 02:02:18.169297  DQS1 dly: 31

 2963 02:02:18.169903  Write Rank0 MR2 =0x2d

 2964 02:02:18.172969  [RankSwap] Rank num 2, (Multi 1), Rank 0

 2965 02:02:18.176293  Write Rank1 MR1 =0xd6

 2966 02:02:18.176683  [Gating]

 2967 02:02:18.177095  ==

 2968 02:02:18.182999  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 2969 02:02:18.186320  fsp= 1, odt_onoff= 1, Byte mode= 0

 2970 02:02:18.186731  ==

 2971 02:02:18.189410  3 1 0 |3534 2c2b  |(11 11)(11 11) |(1 1)(0 0)| 0

 2972 02:02:18.192693  3 1 4 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

 2973 02:02:18.199367  3 1 8 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

 2974 02:02:18.202930  3 1 12 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

 2975 02:02:18.206060  3 1 16 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

 2976 02:02:18.213027  3 1 20 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

 2977 02:02:18.216282  3 1 24 |3534 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

 2978 02:02:18.219542  3 1 28 |3534 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

 2979 02:02:18.226257  3 2 0 |201 2c2b  |(11 11)(11 11) |(1 1)(1 0)| 0

 2980 02:02:18.229603  3 2 4 |3d3d 303  |(11 11)(11 11) |(1 1)(0 0)| 0

 2981 02:02:18.233196  3 2 8 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2982 02:02:18.235984  3 2 12 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2983 02:02:18.242841  3 2 16 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2984 02:02:18.246312  3 2 20 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2985 02:02:18.249454  3 2 24 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2986 02:02:18.256300  3 2 28 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2987 02:02:18.259683  3 3 0 |3d3d 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 2988 02:02:18.263130  3 3 4 |3d3d 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 2989 02:02:18.266269  3 3 8 |e0e 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 2990 02:02:18.272821  [Byte 0] Lead/lag Transition tap number (1)

 2991 02:02:18.276182  3 3 12 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 2992 02:02:18.279696  3 3 16 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 2993 02:02:18.286504  3 3 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 2994 02:02:18.289877  3 3 24 |3534 3534  |(11 11)(11 11) |(0 1)(0 0)| 0

 2995 02:02:18.292998  3 3 28 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2996 02:02:18.296573  3 4 0 |403 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2997 02:02:18.303550  3 4 4 |3d3d 201  |(11 11)(11 11) |(1 1)(1 1)| 0

 2998 02:02:18.306380  3 4 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2999 02:02:18.309768  3 4 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3000 02:02:18.316436  3 4 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3001 02:02:18.319906  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3002 02:02:18.323166  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3003 02:02:18.329677  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3004 02:02:18.333021  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3005 02:02:18.336351  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3006 02:02:18.339913  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3007 02:02:18.346301  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3008 02:02:18.349970  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3009 02:02:18.352977  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3010 02:02:18.359706  [Byte 0] Lead/lag falling Transition (3, 5, 20)

 3011 02:02:18.363011  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 3012 02:02:18.366575  [Byte 0] Lead/lag Transition tap number (2)

 3013 02:02:18.369655  [Byte 1] Lead/lag falling Transition (3, 5, 24)

 3014 02:02:18.376736  3 5 28 |3e3d 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 3015 02:02:18.379879  [Byte 1] Lead/lag Transition tap number (2)

 3016 02:02:18.383299  3 6 0 |202 3e3d  |(11 11)(11 11) |(0 0)(0 0)| 0

 3017 02:02:18.386714  3 6 4 |4646 202  |(0 0)(11 11) |(0 0)(0 0)| 0

 3018 02:02:18.389575  [Byte 0]First pass (3, 6, 4)

 3019 02:02:18.392970  3 6 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3020 02:02:18.396732  [Byte 1]First pass (3, 6, 8)

 3021 02:02:18.399875  3 6 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3022 02:02:18.406508  3 6 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3023 02:02:18.409713  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3024 02:02:18.413263  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3025 02:02:18.416470  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3026 02:02:18.419916  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3027 02:02:18.426549  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3028 02:02:18.429951  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3029 02:02:18.433502  All bytes gating window > 1UI, Early break!

 3030 02:02:18.433894  

 3031 02:02:18.436293  best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)

 3032 02:02:18.436684  

 3033 02:02:18.439781  best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)

 3034 02:02:18.440355  

 3035 02:02:18.440815  

 3036 02:02:18.441230  

 3037 02:02:18.443352  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)

 3038 02:02:18.446838  

 3039 02:02:18.450331  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)

 3040 02:02:18.450720  

 3041 02:02:18.451021  

 3042 02:02:18.451294  Write Rank1 MR1 =0x56

 3043 02:02:18.451608  

 3044 02:02:18.453253  best RODT dly(2T, 0.5T) = (2, 2)

 3045 02:02:18.453715  

 3046 02:02:18.456725  best RODT dly(2T, 0.5T) = (2, 2)

 3047 02:02:18.457116  ==

 3048 02:02:18.463695  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3049 02:02:18.466900  fsp= 1, odt_onoff= 1, Byte mode= 0

 3050 02:02:18.467482  ==

 3051 02:02:18.470032  Start DQ dly to find pass range UseTestEngine =0

 3052 02:02:18.473182  x-axis: bit #, y-axis: DQ dly (-127~63)

 3053 02:02:18.476715  RX Vref Scan = 0

 3054 02:02:18.479918  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 3055 02:02:18.480430  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 3056 02:02:18.483157  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 3057 02:02:18.487160  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 3058 02:02:18.489888  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 3059 02:02:18.493396  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 3060 02:02:18.496509  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 3061 02:02:18.500013  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 3062 02:02:18.503399  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 3063 02:02:18.503797  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 3064 02:02:18.506550  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 3065 02:02:18.509889  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 3066 02:02:18.513097  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 3067 02:02:18.516316  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 3068 02:02:18.519718  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 3069 02:02:18.522930  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 3070 02:02:18.526030  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 3071 02:02:18.526113  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 3072 02:02:18.529493  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 3073 02:02:18.532977  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 3074 02:02:18.536200  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 3075 02:02:18.539928  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 3076 02:02:18.543507  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 3077 02:02:18.543612  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 3078 02:02:18.546932  -2, [0] xxxoxxxx xxxxxxxo [MSB]

 3079 02:02:18.550358  -1, [0] xxxoxxxx xxxxxxxo [MSB]

 3080 02:02:18.553776  0, [0] xxooxxxx xxxxxxxo [MSB]

 3081 02:02:18.556708  1, [0] xxooxxxo oxoxxxxo [MSB]

 3082 02:02:18.560321  2, [0] xxoooxxo oooxxxxo [MSB]

 3083 02:02:18.560847  3, [0] xxoooxxo ooooxxoo [MSB]

 3084 02:02:18.563562  4, [0] xxoooxxo ooooxxoo [MSB]

 3085 02:02:18.566983  5, [0] xooooxxo oooooooo [MSB]

 3086 02:02:18.570498  6, [0] xooooooo oooooooo [MSB]

 3087 02:02:18.573640  33, [0] oooxoooo oooooooo [MSB]

 3088 02:02:18.577422  34, [0] oooxoooo ooooooox [MSB]

 3089 02:02:18.580462  35, [0] ooxxoooo ooooooox [MSB]

 3090 02:02:18.580863  36, [0] ooxxoooo oxooooox [MSB]

 3091 02:02:18.583905  37, [0] ooxxoooo xxxxooox [MSB]

 3092 02:02:18.586946  38, [0] ooxxoooo xxxxooox [MSB]

 3093 02:02:18.590726  39, [0] ooxxxoox xxxxooxx [MSB]

 3094 02:02:18.594259  40, [0] ooxxxoox xxxxoxxx [MSB]

 3095 02:02:18.597276  41, [0] ooxxxoox xxxxxxxx [MSB]

 3096 02:02:18.597671  42, [0] ooxxxxox xxxxxxxx [MSB]

 3097 02:02:18.600463  43, [0] oxxxxxxx xxxxxxxx [MSB]

 3098 02:02:18.603875  44, [0] xxxxxxxx xxxxxxxx [MSB]

 3099 02:02:18.606710  iDelay=44, Bit 0, Center 25 (7 ~ 43) 37

 3100 02:02:18.610476  iDelay=44, Bit 1, Center 23 (5 ~ 42) 38

 3101 02:02:18.613895  iDelay=44, Bit 2, Center 17 (0 ~ 34) 35

 3102 02:02:18.620243  iDelay=44, Bit 3, Center 15 (-2 ~ 32) 35

 3103 02:02:18.623432  iDelay=44, Bit 4, Center 20 (2 ~ 38) 37

 3104 02:02:18.626316  iDelay=44, Bit 5, Center 23 (6 ~ 41) 36

 3105 02:02:18.629898  iDelay=44, Bit 6, Center 24 (6 ~ 42) 37

 3106 02:02:18.633015  iDelay=44, Bit 7, Center 19 (1 ~ 38) 38

 3107 02:02:18.636355  iDelay=44, Bit 8, Center 18 (1 ~ 36) 36

 3108 02:02:18.639725  iDelay=44, Bit 9, Center 18 (2 ~ 35) 34

 3109 02:02:18.642922  iDelay=44, Bit 10, Center 18 (1 ~ 36) 36

 3110 02:02:18.646653  iDelay=44, Bit 11, Center 19 (3 ~ 36) 34

 3111 02:02:18.649695  iDelay=44, Bit 12, Center 22 (5 ~ 40) 36

 3112 02:02:18.652936  iDelay=44, Bit 13, Center 22 (5 ~ 39) 35

 3113 02:02:18.656664  iDelay=44, Bit 14, Center 20 (3 ~ 38) 36

 3114 02:02:18.659765  iDelay=44, Bit 15, Center 15 (-2 ~ 33) 36

 3115 02:02:18.663221  ==

 3116 02:02:18.666404  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3117 02:02:18.669557  fsp= 1, odt_onoff= 1, Byte mode= 0

 3118 02:02:18.669634  ==

 3119 02:02:18.669693  DQS Delay:

 3120 02:02:18.672878  DQS0 = 0, DQS1 = 0

 3121 02:02:18.672953  DQM Delay:

 3122 02:02:18.676349  DQM0 = 20, DQM1 = 19

 3123 02:02:18.676426  DQ Delay:

 3124 02:02:18.679626  DQ0 =25, DQ1 =23, DQ2 =17, DQ3 =15

 3125 02:02:18.683311  DQ4 =20, DQ5 =23, DQ6 =24, DQ7 =19

 3126 02:02:18.686405  DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19

 3127 02:02:18.689970  DQ12 =22, DQ13 =22, DQ14 =20, DQ15 =15

 3128 02:02:18.690084  

 3129 02:02:18.690181  

 3130 02:02:18.693043  DramC Write-DBI off

 3131 02:02:18.693131  ==

 3132 02:02:18.696722  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3133 02:02:18.700204  fsp= 1, odt_onoff= 1, Byte mode= 0

 3134 02:02:18.700307  ==

 3135 02:02:18.703101  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 3136 02:02:18.707071  

 3137 02:02:18.707461  Begin, DQ Scan Range 927~1183

 3138 02:02:18.707762  

 3139 02:02:18.708039  

 3140 02:02:18.710068  	TX Vref Scan disable

 3141 02:02:18.713293  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 3142 02:02:18.716958  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 3143 02:02:18.720252  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 3144 02:02:18.723479  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 3145 02:02:18.726894  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 3146 02:02:18.730416  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 3147 02:02:18.733313  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 3148 02:02:18.739974  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 3149 02:02:18.743352  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 3150 02:02:18.746724  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 3151 02:02:18.750326  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 3152 02:02:18.753489  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 3153 02:02:18.756585  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 3154 02:02:18.759691  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 3155 02:02:18.763053  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 3156 02:02:18.766639  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 3157 02:02:18.770050  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 3158 02:02:18.773126  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 3159 02:02:18.777036  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 3160 02:02:18.780094  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 3161 02:02:18.783773  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 3162 02:02:18.786781  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 3163 02:02:18.790069  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 3164 02:02:18.793457  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 3165 02:02:18.800387  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 3166 02:02:18.803894  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 3167 02:02:18.806906  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 3168 02:02:18.810527  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 3169 02:02:18.814288  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 3170 02:02:18.816955  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 3171 02:02:18.820384  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 3172 02:02:18.823510  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 3173 02:02:18.826783  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 3174 02:02:18.830157  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 3175 02:02:18.833390  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 3176 02:02:18.836871  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 3177 02:02:18.840372  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 3178 02:02:18.843501  964 |3 6 4|[0] xxxxxxxx xxxxxxxo [MSB]

 3179 02:02:18.847180  965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]

 3180 02:02:18.850143  966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]

 3181 02:02:18.853471  967 |3 6 7|[0] xxxxxxxx ooxxxxxo [MSB]

 3182 02:02:18.856790  968 |3 6 8|[0] xxxxxxxx oooxxxxo [MSB]

 3183 02:02:18.860541  969 |3 6 9|[0] xxxxxxxx ooooxooo [MSB]

 3184 02:02:18.864153  970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]

 3185 02:02:18.867147  971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]

 3186 02:02:18.870646  972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]

 3187 02:02:18.877093  973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]

 3188 02:02:18.880430  974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]

 3189 02:02:18.883865  975 |3 6 15|[0] xxoooxxx oooooooo [MSB]

 3190 02:02:18.887044  976 |3 6 16|[0] xooooxxo oooooooo [MSB]

 3191 02:02:18.890175  989 |3 6 29|[0] oooooooo ooooooox [MSB]

 3192 02:02:18.893494  990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]

 3193 02:02:18.897146  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 3194 02:02:18.903768  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 3195 02:02:18.906848  993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]

 3196 02:02:18.910672  994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]

 3197 02:02:18.913826  995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]

 3198 02:02:18.917293  996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]

 3199 02:02:18.920258  997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]

 3200 02:02:18.923976  998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]

 3201 02:02:18.927015  Byte0, DQ PI dly=986, DQM PI dly= 986

 3202 02:02:18.930394  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)

 3203 02:02:18.930833  

 3204 02:02:18.933844  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)

 3205 02:02:18.937093  

 3206 02:02:18.940412  Byte1, DQ PI dly=977, DQM PI dly= 977

 3207 02:02:18.943761  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)

 3208 02:02:18.944196  

 3209 02:02:18.946985  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)

 3210 02:02:18.947423  

 3211 02:02:18.947758  ==

 3212 02:02:18.953878  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3213 02:02:18.957097  fsp= 1, odt_onoff= 1, Byte mode= 0

 3214 02:02:18.957530  ==

 3215 02:02:18.960588  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 3216 02:02:18.961019  

 3217 02:02:18.964199  Begin, DQ Scan Range 953~1017

 3218 02:02:18.967215  Write Rank1 MR14 =0x0

 3219 02:02:18.974556  

 3220 02:02:18.975085  	CH=1, VrefRange= 0, VrefLevel = 0

 3221 02:02:18.981490  TX Bit0 (978~998) 21 988,   Bit8 (969~986) 18 977,

 3222 02:02:18.984733  TX Bit1 (977~997) 21 987,   Bit9 (969~986) 18 977,

 3223 02:02:18.991081  TX Bit2 (976~992) 17 984,   Bit10 (970~985) 16 977,

 3224 02:02:18.994652  TX Bit3 (975~991) 17 983,   Bit11 (971~988) 18 979,

 3225 02:02:18.998302  TX Bit4 (976~994) 19 985,   Bit12 (971~990) 20 980,

 3226 02:02:19.004918  TX Bit5 (978~998) 21 988,   Bit13 (971~986) 16 978,

 3227 02:02:19.008024  TX Bit6 (978~998) 21 988,   Bit14 (971~987) 17 979,

 3228 02:02:19.011127  TX Bit7 (977~994) 18 985,   Bit15 (967~985) 19 976,

 3229 02:02:19.011565  

 3230 02:02:19.014499  Write Rank1 MR14 =0x2

 3231 02:02:19.023613  

 3232 02:02:19.024043  	CH=1, VrefRange= 0, VrefLevel = 2

 3233 02:02:19.030530  TX Bit0 (978~998) 21 988,   Bit8 (969~986) 18 977,

 3234 02:02:19.033725  TX Bit1 (977~997) 21 987,   Bit9 (969~986) 18 977,

 3235 02:02:19.040275  TX Bit2 (975~992) 18 983,   Bit10 (970~986) 17 978,

 3236 02:02:19.043982  TX Bit3 (975~991) 17 983,   Bit11 (971~989) 19 980,

 3237 02:02:19.047242  TX Bit4 (977~994) 18 985,   Bit12 (971~990) 20 980,

 3238 02:02:19.053776  TX Bit5 (978~998) 21 988,   Bit13 (971~986) 16 978,

 3239 02:02:19.057139  TX Bit6 (978~998) 21 988,   Bit14 (970~987) 18 978,

 3240 02:02:19.060684  TX Bit7 (977~995) 19 986,   Bit15 (966~985) 20 975,

 3241 02:02:19.061195  

 3242 02:02:19.063809  Write Rank1 MR14 =0x4

 3243 02:02:19.072995  

 3244 02:02:19.073498  	CH=1, VrefRange= 0, VrefLevel = 4

 3245 02:02:19.079630  TX Bit0 (978~998) 21 988,   Bit8 (969~987) 19 978,

 3246 02:02:19.083022  TX Bit1 (977~997) 21 987,   Bit9 (969~987) 19 978,

 3247 02:02:19.089697  TX Bit2 (975~993) 19 984,   Bit10 (970~986) 17 978,

 3248 02:02:19.093230  TX Bit3 (974~991) 18 982,   Bit11 (970~989) 20 979,

 3249 02:02:19.096220  TX Bit4 (976~995) 20 985,   Bit12 (971~991) 21 981,

 3250 02:02:19.102816  TX Bit5 (977~998) 22 987,   Bit13 (970~987) 18 978,

 3251 02:02:19.106538  TX Bit6 (977~998) 22 987,   Bit14 (970~988) 19 979,

 3252 02:02:19.110066  TX Bit7 (977~995) 19 986,   Bit15 (966~986) 21 976,

 3253 02:02:19.110629  

 3254 02:02:19.113096  Write Rank1 MR14 =0x6

 3255 02:02:19.122330  

 3256 02:02:19.122834  	CH=1, VrefRange= 0, VrefLevel = 6

 3257 02:02:19.128721  TX Bit0 (977~999) 23 988,   Bit8 (968~988) 21 978,

 3258 02:02:19.132364  TX Bit1 (977~998) 22 987,   Bit9 (969~987) 19 978,

 3259 02:02:19.139149  TX Bit2 (975~993) 19 984,   Bit10 (970~987) 18 978,

 3260 02:02:19.142494  TX Bit3 (974~992) 19 983,   Bit11 (970~990) 21 980,

 3261 02:02:19.145820  TX Bit4 (976~996) 21 986,   Bit12 (971~991) 21 981,

 3262 02:02:19.152300  TX Bit5 (977~998) 22 987,   Bit13 (970~988) 19 979,

 3263 02:02:19.155906  TX Bit6 (977~999) 23 988,   Bit14 (970~989) 20 979,

 3264 02:02:19.158874  TX Bit7 (977~996) 20 986,   Bit15 (965~986) 22 975,

 3265 02:02:19.159304  

 3266 02:02:19.162271  Write Rank1 MR14 =0x8

 3267 02:02:19.171458  

 3268 02:02:19.171886  	CH=1, VrefRange= 0, VrefLevel = 8

 3269 02:02:19.178056  TX Bit0 (977~999) 23 988,   Bit8 (968~989) 22 978,

 3270 02:02:19.181750  TX Bit1 (977~998) 22 987,   Bit9 (968~988) 21 978,

 3271 02:02:19.188416  TX Bit2 (975~994) 20 984,   Bit10 (969~987) 19 978,

 3272 02:02:19.191802  TX Bit3 (974~992) 19 983,   Bit11 (970~990) 21 980,

 3273 02:02:19.195050  TX Bit4 (976~996) 21 986,   Bit12 (970~991) 22 980,

 3274 02:02:19.201912  TX Bit5 (977~999) 23 988,   Bit13 (970~989) 20 979,

 3275 02:02:19.204943  TX Bit6 (977~999) 23 988,   Bit14 (970~990) 21 980,

 3276 02:02:19.208630  TX Bit7 (976~996) 21 986,   Bit15 (965~986) 22 975,

 3277 02:02:19.209175  

 3278 02:02:19.211426  Write Rank1 MR14 =0xa

 3279 02:02:19.221132  

 3280 02:02:19.223918  	CH=1, VrefRange= 0, VrefLevel = 10

 3281 02:02:19.227150  TX Bit0 (977~999) 23 988,   Bit8 (968~989) 22 978,

 3282 02:02:19.230925  TX Bit1 (976~998) 23 987,   Bit9 (968~989) 22 978,

 3283 02:02:19.237770  TX Bit2 (974~994) 21 984,   Bit10 (969~988) 20 978,

 3284 02:02:19.240651  TX Bit3 (973~993) 21 983,   Bit11 (970~991) 22 980,

 3285 02:02:19.243973  TX Bit4 (976~996) 21 986,   Bit12 (970~991) 22 980,

 3286 02:02:19.250675  TX Bit5 (977~999) 23 988,   Bit13 (970~990) 21 980,

 3287 02:02:19.254208  TX Bit6 (977~999) 23 988,   Bit14 (969~990) 22 979,

 3288 02:02:19.257265  TX Bit7 (976~997) 22 986,   Bit15 (965~987) 23 976,

 3289 02:02:19.257699  

 3290 02:02:19.260557  Write Rank1 MR14 =0xc

 3291 02:02:19.270170  

 3292 02:02:19.270631  	CH=1, VrefRange= 0, VrefLevel = 12

 3293 02:02:19.276690  TX Bit0 (977~999) 23 988,   Bit8 (968~990) 23 979,

 3294 02:02:19.280351  TX Bit1 (976~998) 23 987,   Bit9 (968~989) 22 978,

 3295 02:02:19.286515  TX Bit2 (973~995) 23 984,   Bit10 (969~989) 21 979,

 3296 02:02:19.290293  TX Bit3 (973~994) 22 983,   Bit11 (970~991) 22 980,

 3297 02:02:19.293315  TX Bit4 (975~997) 23 986,   Bit12 (970~991) 22 980,

 3298 02:02:19.300540  TX Bit5 (977~999) 23 988,   Bit13 (970~990) 21 980,

 3299 02:02:19.303702  TX Bit6 (977~999) 23 988,   Bit14 (969~990) 22 979,

 3300 02:02:19.306808  TX Bit7 (976~997) 22 986,   Bit15 (964~987) 24 975,

 3301 02:02:19.307238  

 3302 02:02:19.310147  Write Rank1 MR14 =0xe

 3303 02:02:19.319286  

 3304 02:02:19.322799  	CH=1, VrefRange= 0, VrefLevel = 14

 3305 02:02:19.326251  TX Bit0 (977~1000) 24 988,   Bit8 (967~990) 24 978,

 3306 02:02:19.329472  TX Bit1 (976~998) 23 987,   Bit9 (967~990) 24 978,

 3307 02:02:19.336148  TX Bit2 (973~995) 23 984,   Bit10 (968~989) 22 978,

 3308 02:02:19.339641  TX Bit3 (973~994) 22 983,   Bit11 (970~991) 22 980,

 3309 02:02:19.343172  TX Bit4 (975~997) 23 986,   Bit12 (970~992) 23 981,

 3310 02:02:19.349418  TX Bit5 (977~999) 23 988,   Bit13 (969~990) 22 979,

 3311 02:02:19.352627  TX Bit6 (977~1000) 24 988,   Bit14 (969~991) 23 980,

 3312 02:02:19.356271  TX Bit7 (976~997) 22 986,   Bit15 (964~988) 25 976,

 3313 02:02:19.356566  

 3314 02:02:19.359139  Write Rank1 MR14 =0x10

 3315 02:02:19.368985  

 3316 02:02:19.369205  	CH=1, VrefRange= 0, VrefLevel = 16

 3317 02:02:19.375817  TX Bit0 (977~1000) 24 988,   Bit8 (967~990) 24 978,

 3318 02:02:19.379546  TX Bit1 (976~999) 24 987,   Bit9 (967~990) 24 978,

 3319 02:02:19.385655  TX Bit2 (973~996) 24 984,   Bit10 (968~990) 23 979,

 3320 02:02:19.389473  TX Bit3 (972~995) 24 983,   Bit11 (969~991) 23 980,

 3321 02:02:19.392594  TX Bit4 (975~997) 23 986,   Bit12 (970~992) 23 981,

 3322 02:02:19.399406  TX Bit5 (976~1000) 25 988,   Bit13 (969~991) 23 980,

 3323 02:02:19.402454  TX Bit6 (977~1000) 24 988,   Bit14 (969~991) 23 980,

 3324 02:02:19.406317  TX Bit7 (976~997) 22 986,   Bit15 (964~989) 26 976,

 3325 02:02:19.409492  

 3326 02:02:19.409841  Write Rank1 MR14 =0x12

 3327 02:02:19.419148  

 3328 02:02:19.422496  	CH=1, VrefRange= 0, VrefLevel = 18

 3329 02:02:19.425979  TX Bit0 (977~1001) 25 989,   Bit8 (967~991) 25 979,

 3330 02:02:19.429117  TX Bit1 (975~999) 25 987,   Bit9 (967~990) 24 978,

 3331 02:02:19.436229  TX Bit2 (973~997) 25 985,   Bit10 (968~990) 23 979,

 3332 02:02:19.439099  TX Bit3 (972~996) 25 984,   Bit11 (969~992) 24 980,

 3333 02:02:19.442867  TX Bit4 (975~997) 23 986,   Bit12 (970~992) 23 981,

 3334 02:02:19.449482  TX Bit5 (977~1000) 24 988,   Bit13 (969~991) 23 980,

 3335 02:02:19.452693  TX Bit6 (977~1000) 24 988,   Bit14 (969~991) 23 980,

 3336 02:02:19.456170  TX Bit7 (976~998) 23 987,   Bit15 (963~989) 27 976,

 3337 02:02:19.459176  

 3338 02:02:19.459530  Write Rank1 MR14 =0x14

 3339 02:02:19.469493  

 3340 02:02:19.473135  	CH=1, VrefRange= 0, VrefLevel = 20

 3341 02:02:19.476320  TX Bit0 (976~1001) 26 988,   Bit8 (966~991) 26 978,

 3342 02:02:19.479644  TX Bit1 (975~999) 25 987,   Bit9 (966~991) 26 978,

 3343 02:02:19.485726  TX Bit2 (973~997) 25 985,   Bit10 (968~991) 24 979,

 3344 02:02:19.489200  TX Bit3 (971~996) 26 983,   Bit11 (969~992) 24 980,

 3345 02:02:19.492581  TX Bit4 (974~998) 25 986,   Bit12 (970~992) 23 981,

 3346 02:02:19.499331  TX Bit5 (976~1000) 25 988,   Bit13 (969~991) 23 980,

 3347 02:02:19.502474  TX Bit6 (976~1001) 26 988,   Bit14 (968~991) 24 979,

 3348 02:02:19.506492  TX Bit7 (975~998) 24 986,   Bit15 (963~989) 27 976,

 3349 02:02:19.509230  

 3350 02:02:19.509658  Write Rank1 MR14 =0x16

 3351 02:02:19.519385  

 3352 02:02:19.522671  	CH=1, VrefRange= 0, VrefLevel = 22

 3353 02:02:19.525821  TX Bit0 (976~1002) 27 989,   Bit8 (966~991) 26 978,

 3354 02:02:19.529744  TX Bit1 (976~999) 24 987,   Bit9 (966~991) 26 978,

 3355 02:02:19.536014  TX Bit2 (973~997) 25 985,   Bit10 (967~991) 25 979,

 3356 02:02:19.539655  TX Bit3 (971~997) 27 984,   Bit11 (969~992) 24 980,

 3357 02:02:19.543120  TX Bit4 (974~998) 25 986,   Bit12 (970~992) 23 981,

 3358 02:02:19.549355  TX Bit5 (976~1000) 25 988,   Bit13 (969~991) 23 980,

 3359 02:02:19.552789  TX Bit6 (976~1001) 26 988,   Bit14 (968~991) 24 979,

 3360 02:02:19.556257  TX Bit7 (975~998) 24 986,   Bit15 (963~990) 28 976,

 3361 02:02:19.559529  

 3362 02:02:19.560037  Write Rank1 MR14 =0x18

 3363 02:02:19.570449  

 3364 02:02:19.572895  	CH=1, VrefRange= 0, VrefLevel = 24

 3365 02:02:19.576886  TX Bit0 (976~1002) 27 989,   Bit8 (965~991) 27 978,

 3366 02:02:19.579978  TX Bit1 (975~999) 25 987,   Bit9 (966~991) 26 978,

 3367 02:02:19.586781  TX Bit2 (971~997) 27 984,   Bit10 (967~991) 25 979,

 3368 02:02:19.589962  TX Bit3 (970~997) 28 983,   Bit11 (968~992) 25 980,

 3369 02:02:19.593768  TX Bit4 (974~998) 25 986,   Bit12 (969~992) 24 980,

 3370 02:02:19.599853  TX Bit5 (976~1001) 26 988,   Bit13 (969~992) 24 980,

 3371 02:02:19.603037  TX Bit6 (976~1001) 26 988,   Bit14 (967~992) 26 979,

 3372 02:02:19.606504  TX Bit7 (975~998) 24 986,   Bit15 (963~990) 28 976,

 3373 02:02:19.609830  

 3374 02:02:19.610375  Write Rank1 MR14 =0x1a

 3375 02:02:19.620007  

 3376 02:02:19.623157  	CH=1, VrefRange= 0, VrefLevel = 26

 3377 02:02:19.626579  TX Bit0 (976~1002) 27 989,   Bit8 (966~991) 26 978,

 3378 02:02:19.629976  TX Bit1 (975~999) 25 987,   Bit9 (966~991) 26 978,

 3379 02:02:19.636519  TX Bit2 (971~997) 27 984,   Bit10 (967~991) 25 979,

 3380 02:02:19.639999  TX Bit3 (970~997) 28 983,   Bit11 (968~992) 25 980,

 3381 02:02:19.643364  TX Bit4 (973~998) 26 985,   Bit12 (969~992) 24 980,

 3382 02:02:19.650129  TX Bit5 (976~1001) 26 988,   Bit13 (968~992) 25 980,

 3383 02:02:19.653578  TX Bit6 (976~1002) 27 989,   Bit14 (968~991) 24 979,

 3384 02:02:19.656711  TX Bit7 (974~998) 25 986,   Bit15 (963~990) 28 976,

 3385 02:02:19.657229  

 3386 02:02:19.660314  Write Rank1 MR14 =0x1c

 3387 02:02:19.670570  

 3388 02:02:19.671085  	CH=1, VrefRange= 0, VrefLevel = 28

 3389 02:02:19.676774  TX Bit0 (976~1002) 27 989,   Bit8 (966~991) 26 978,

 3390 02:02:19.680120  TX Bit1 (975~999) 25 987,   Bit9 (966~991) 26 978,

 3391 02:02:19.686792  TX Bit2 (971~997) 27 984,   Bit10 (967~991) 25 979,

 3392 02:02:19.690140  TX Bit3 (970~997) 28 983,   Bit11 (968~992) 25 980,

 3393 02:02:19.693682  TX Bit4 (973~998) 26 985,   Bit12 (969~992) 24 980,

 3394 02:02:19.699897  TX Bit5 (976~1001) 26 988,   Bit13 (968~992) 25 980,

 3395 02:02:19.703567  TX Bit6 (976~1002) 27 989,   Bit14 (968~991) 24 979,

 3396 02:02:19.706927  TX Bit7 (974~998) 25 986,   Bit15 (963~990) 28 976,

 3397 02:02:19.710536  

 3398 02:02:19.713105  wait MRW command Rank1 MR14 =0x1e fired (1)

 3399 02:02:19.713542  Write Rank1 MR14 =0x1e

 3400 02:02:19.724462  

 3401 02:02:19.727150  	CH=1, VrefRange= 0, VrefLevel = 30

 3402 02:02:19.730797  TX Bit0 (976~1002) 27 989,   Bit8 (966~991) 26 978,

 3403 02:02:19.733933  TX Bit1 (975~999) 25 987,   Bit9 (966~991) 26 978,

 3404 02:02:19.740780  TX Bit2 (971~997) 27 984,   Bit10 (967~991) 25 979,

 3405 02:02:19.743885  TX Bit3 (970~997) 28 983,   Bit11 (968~992) 25 980,

 3406 02:02:19.747011  TX Bit4 (973~998) 26 985,   Bit12 (969~992) 24 980,

 3407 02:02:19.753671  TX Bit5 (976~1001) 26 988,   Bit13 (968~992) 25 980,

 3408 02:02:19.756999  TX Bit6 (976~1002) 27 989,   Bit14 (968~991) 24 979,

 3409 02:02:19.760448  TX Bit7 (974~998) 25 986,   Bit15 (963~990) 28 976,

 3410 02:02:19.763802  

 3411 02:02:19.764354  Write Rank1 MR14 =0x20

 3412 02:02:19.773512  

 3413 02:02:19.777211  	CH=1, VrefRange= 0, VrefLevel = 32

 3414 02:02:19.780252  TX Bit0 (976~1002) 27 989,   Bit8 (966~991) 26 978,

 3415 02:02:19.783801  TX Bit1 (975~999) 25 987,   Bit9 (966~991) 26 978,

 3416 02:02:19.790167  TX Bit2 (971~997) 27 984,   Bit10 (967~991) 25 979,

 3417 02:02:19.793733  TX Bit3 (970~997) 28 983,   Bit11 (968~992) 25 980,

 3418 02:02:19.797454  TX Bit4 (973~998) 26 985,   Bit12 (969~992) 24 980,

 3419 02:02:19.804058  TX Bit5 (976~1001) 26 988,   Bit13 (968~992) 25 980,

 3420 02:02:19.807433  TX Bit6 (976~1002) 27 989,   Bit14 (968~991) 24 979,

 3421 02:02:19.810198  TX Bit7 (974~998) 25 986,   Bit15 (963~990) 28 976,

 3422 02:02:19.813707  

 3423 02:02:19.814133  

 3424 02:02:19.817035  TX Vref found, early break! 391< 393

 3425 02:02:19.820632  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 3426 02:02:19.824033  u1DelayCellOfst[0]=7 cells (6 PI)

 3427 02:02:19.826956  u1DelayCellOfst[1]=5 cells (4 PI)

 3428 02:02:19.830927  u1DelayCellOfst[2]=1 cells (1 PI)

 3429 02:02:19.833930  u1DelayCellOfst[3]=0 cells (0 PI)

 3430 02:02:19.834436  u1DelayCellOfst[4]=2 cells (2 PI)

 3431 02:02:19.837803  u1DelayCellOfst[5]=6 cells (5 PI)

 3432 02:02:19.840599  u1DelayCellOfst[6]=7 cells (6 PI)

 3433 02:02:19.844720  u1DelayCellOfst[7]=3 cells (3 PI)

 3434 02:02:19.847155  Byte0, DQ PI dly=983, DQM PI dly= 986

 3435 02:02:19.850757  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)

 3436 02:02:19.853972  

 3437 02:02:19.857506  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)

 3438 02:02:19.858015  

 3439 02:02:19.860764  u1DelayCellOfst[8]=2 cells (2 PI)

 3440 02:02:19.863907  u1DelayCellOfst[9]=2 cells (2 PI)

 3441 02:02:19.867562  u1DelayCellOfst[10]=3 cells (3 PI)

 3442 02:02:19.870973  u1DelayCellOfst[11]=5 cells (4 PI)

 3443 02:02:19.871499  u1DelayCellOfst[12]=5 cells (4 PI)

 3444 02:02:19.873912  u1DelayCellOfst[13]=5 cells (4 PI)

 3445 02:02:19.877591  u1DelayCellOfst[14]=3 cells (3 PI)

 3446 02:02:19.880618  u1DelayCellOfst[15]=0 cells (0 PI)

 3447 02:02:19.884008  Byte1, DQ PI dly=976, DQM PI dly= 978

 3448 02:02:19.890653  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)

 3449 02:02:19.891159  

 3450 02:02:19.893997  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)

 3451 02:02:19.894534  

 3452 02:02:19.897323  Write Rank1 MR14 =0x1a

 3453 02:02:19.897754  

 3454 02:02:19.898082  Final TX Range 0 Vref 26

 3455 02:02:19.898454  

 3456 02:02:19.904262  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 3457 02:02:19.904780  

 3458 02:02:19.910804  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3459 02:02:19.917510  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3460 02:02:19.924546  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3461 02:02:19.927316  Write Rank1 MR3 =0xb0

 3462 02:02:19.930880  DramC Write-DBI on

 3463 02:02:19.931385  ==

 3464 02:02:19.934098  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3465 02:02:19.937529  fsp= 1, odt_onoff= 1, Byte mode= 0

 3466 02:02:19.937966  ==

 3467 02:02:19.940568  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 3468 02:02:19.943862  

 3469 02:02:19.944292  Begin, DQ Scan Range 698~762

 3470 02:02:19.944626  

 3471 02:02:19.944929  

 3472 02:02:19.947154  	TX Vref Scan disable

 3473 02:02:19.950375  698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 3474 02:02:19.954125  699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 3475 02:02:19.957207  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 3476 02:02:19.960584  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 3477 02:02:19.963819  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 3478 02:02:19.967556  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 3479 02:02:19.970797  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 3480 02:02:19.974075  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 3481 02:02:19.977397  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 3482 02:02:19.980607  707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]

 3483 02:02:19.983836  708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]

 3484 02:02:19.987315  709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]

 3485 02:02:19.994159  710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]

 3486 02:02:19.997556  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 3487 02:02:20.000925  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 3488 02:02:20.003898  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 3489 02:02:20.007269  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 3490 02:02:20.010571  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 3491 02:02:20.014231  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 3492 02:02:20.021342  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 3493 02:02:20.024869  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 3494 02:02:20.028240  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 3495 02:02:20.031533  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 3496 02:02:20.034645  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 3497 02:02:20.037923  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 3498 02:02:20.041067  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 3499 02:02:20.044391  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 3500 02:02:20.048032  744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]

 3501 02:02:20.051317  745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]

 3502 02:02:20.054671  Byte0, DQ PI dly=730, DQM PI dly= 730

 3503 02:02:20.058101  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)

 3504 02:02:20.061303  

 3505 02:02:20.064645  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)

 3506 02:02:20.065038  

 3507 02:02:20.067969  Byte1, DQ PI dly=721, DQM PI dly= 721

 3508 02:02:20.071138  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)

 3509 02:02:20.071529  

 3510 02:02:20.077939  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)

 3511 02:02:20.078376  

 3512 02:02:20.084542  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 3513 02:02:20.091042  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3514 02:02:20.098285  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3515 02:02:20.098705  Write Rank1 MR3 =0x30

 3516 02:02:20.101158  DramC Write-DBI off

 3517 02:02:20.101584  

 3518 02:02:20.101909  [DATLAT]

 3519 02:02:20.104816  Freq=1600, CH1 RK1, use_rxtx_scan=0

 3520 02:02:20.105443  

 3521 02:02:20.108334  DATLAT Default: 0x10

 3522 02:02:20.108721  7, 0xFFFF, sum=0

 3523 02:02:20.111271  8, 0xFFFF, sum=0

 3524 02:02:20.111688  9, 0xFFFF, sum=0

 3525 02:02:20.114670  10, 0xFFFF, sum=0

 3526 02:02:20.115065  11, 0xFFFF, sum=0

 3527 02:02:20.118060  12, 0xFFFF, sum=0

 3528 02:02:20.118645  13, 0xFFFF, sum=0

 3529 02:02:20.119227  14, 0x0, sum=1

 3530 02:02:20.121242  15, 0x0, sum=2

 3531 02:02:20.121710  16, 0x0, sum=3

 3532 02:02:20.124707  17, 0x0, sum=4

 3533 02:02:20.128301  pattern=2 first_step=14 total pass=5 best_step=16

 3534 02:02:20.128851  ==

 3535 02:02:20.134775  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3536 02:02:20.138015  fsp= 1, odt_onoff= 1, Byte mode= 0

 3537 02:02:20.138538  ==

 3538 02:02:20.141475  Start DQ dly to find pass range UseTestEngine =1

 3539 02:02:20.144873  x-axis: bit #, y-axis: DQ dly (-127~63)

 3540 02:02:20.145417  RX Vref Scan = 0

 3541 02:02:20.147782  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 3542 02:02:20.151191  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 3543 02:02:20.154505  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 3544 02:02:20.157673  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 3545 02:02:20.161046  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 3546 02:02:20.164528  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 3547 02:02:20.167952  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 3548 02:02:20.168032  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 3549 02:02:20.171357  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 3550 02:02:20.174658  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 3551 02:02:20.177829  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 3552 02:02:20.181045  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 3553 02:02:20.184358  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 3554 02:02:20.188144  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 3555 02:02:20.191521  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 3556 02:02:20.191916  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 3557 02:02:20.195035  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 3558 02:02:20.198030  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 3559 02:02:20.201788  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 3560 02:02:20.204883  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 3561 02:02:20.208015  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 3562 02:02:20.211479  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 3563 02:02:20.211873  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 3564 02:02:20.215255  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 3565 02:02:20.218522  -2, [0] xxxoxxxx xxxxxxxo [MSB]

 3566 02:02:20.221553  -1, [0] xxxoxxxx xxxxxxxo [MSB]

 3567 02:02:20.225306  0, [0] xxooxxxx xxxxxxxo [MSB]

 3568 02:02:20.228376  1, [0] xxooxxxx oooxxxxo [MSB]

 3569 02:02:20.228795  2, [0] xxooxxxx ooooxxxo [MSB]

 3570 02:02:20.231925  3, [0] xxoooxxo ooooxxoo [MSB]

 3571 02:02:20.235131  4, [0] xxoooxxo ooooxooo [MSB]

 3572 02:02:20.238426  5, [0] xxoooxxo oooooooo [MSB]

 3573 02:02:20.241884  6, [0] xooooxxo oooooooo [MSB]

 3574 02:02:20.245180  7, [0] ooooooxo oooooooo [MSB]

 3575 02:02:20.248339  33, [0] oooxoooo ooooooox [MSB]

 3576 02:02:20.252130  34, [0] oooxoooo ooooooox [MSB]

 3577 02:02:20.255162  35, [0] ooxxoooo ooooooox [MSB]

 3578 02:02:20.258629  36, [0] ooxxoooo ooxoooox [MSB]

 3579 02:02:20.259026  37, [0] ooxxoooo xxxxooox [MSB]

 3580 02:02:20.261831  38, [0] ooxxxooo xxxxooxx [MSB]

 3581 02:02:20.264937  39, [0] ooxxxoox xxxxoxxx [MSB]

 3582 02:02:20.268640  40, [0] ooxxxoox xxxxxxxx [MSB]

 3583 02:02:20.271592  41, [0] ooxxxxox xxxxxxxx [MSB]

 3584 02:02:20.275095  42, [0] oxxxxxox xxxxxxxx [MSB]

 3585 02:02:20.278283  43, [0] xxxxxxxx xxxxxxxx [MSB]

 3586 02:02:20.282109  iDelay=43, Bit 0, Center 24 (7 ~ 42) 36

 3587 02:02:20.285055  iDelay=43, Bit 1, Center 23 (6 ~ 41) 36

 3588 02:02:20.288344  iDelay=43, Bit 2, Center 17 (0 ~ 34) 35

 3589 02:02:20.291638  iDelay=43, Bit 3, Center 15 (-2 ~ 32) 35

 3590 02:02:20.295098  iDelay=43, Bit 4, Center 20 (3 ~ 37) 35

 3591 02:02:20.298358  iDelay=43, Bit 5, Center 23 (7 ~ 40) 34

 3592 02:02:20.301635  iDelay=43, Bit 6, Center 25 (8 ~ 42) 35

 3593 02:02:20.305316  iDelay=43, Bit 7, Center 20 (3 ~ 38) 36

 3594 02:02:20.308715  iDelay=43, Bit 8, Center 18 (1 ~ 36) 36

 3595 02:02:20.311644  iDelay=43, Bit 9, Center 18 (1 ~ 36) 36

 3596 02:02:20.314933  iDelay=43, Bit 10, Center 18 (1 ~ 35) 35

 3597 02:02:20.318091  iDelay=43, Bit 11, Center 19 (2 ~ 36) 35

 3598 02:02:20.321682  iDelay=43, Bit 12, Center 22 (5 ~ 39) 35

 3599 02:02:20.328114  iDelay=43, Bit 13, Center 21 (4 ~ 38) 35

 3600 02:02:20.331675  iDelay=43, Bit 14, Center 20 (3 ~ 37) 35

 3601 02:02:20.335081  iDelay=43, Bit 15, Center 15 (-2 ~ 32) 35

 3602 02:02:20.335467  ==

 3603 02:02:20.338525  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3604 02:02:20.341700  fsp= 1, odt_onoff= 1, Byte mode= 0

 3605 02:02:20.342088  ==

 3606 02:02:20.345262  DQS Delay:

 3607 02:02:20.345733  DQS0 = 0, DQS1 = 0

 3608 02:02:20.348439  DQM Delay:

 3609 02:02:20.348950  DQM0 = 20, DQM1 = 18

 3610 02:02:20.349285  DQ Delay:

 3611 02:02:20.351902  DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15

 3612 02:02:20.355096  DQ4 =20, DQ5 =23, DQ6 =25, DQ7 =20

 3613 02:02:20.358390  DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19

 3614 02:02:20.362078  DQ12 =22, DQ13 =21, DQ14 =20, DQ15 =15

 3615 02:02:20.362639  

 3616 02:02:20.362976  

 3617 02:02:20.363280  

 3618 02:02:20.365225  [DramC_TX_OE_Calibration] TA2

 3619 02:02:20.368791  Original DQ_B0 (3 6) =30, OEN = 27

 3620 02:02:20.371914  Original DQ_B1 (3 6) =30, OEN = 27

 3621 02:02:20.375275  23, 0x0, End_B0=23 End_B1=23

 3622 02:02:20.378497  24, 0x0, End_B0=24 End_B1=24

 3623 02:02:20.378936  25, 0x0, End_B0=25 End_B1=25

 3624 02:02:20.381897  26, 0x0, End_B0=26 End_B1=26

 3625 02:02:20.385179  27, 0x0, End_B0=27 End_B1=27

 3626 02:02:20.388419  28, 0x0, End_B0=28 End_B1=28

 3627 02:02:20.388857  29, 0x0, End_B0=29 End_B1=29

 3628 02:02:20.391760  30, 0x0, End_B0=30 End_B1=30

 3629 02:02:20.394910  31, 0xFFFF, End_B0=30 End_B1=30

 3630 02:02:20.401617  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3631 02:02:20.404974  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3632 02:02:20.405420  

 3633 02:02:20.408313  

 3634 02:02:20.408743  Write Rank1 MR23 =0x3f

 3635 02:02:20.409077  [DQSOSC]

 3636 02:02:20.418294  [DQSOSCAuto] RK1, (LSB)MR18= 0xaa, (MSB)MR19= 0x3, tDQSOscB0 = 335 ps tDQSOscB1 = 0 ps

 3637 02:02:20.421779  CH1_RK1: MR19=0x3, MR18=0xAA, DQSOSC=335, MR23=63, INC=21, DEC=32

 3638 02:02:20.425118  Write Rank1 MR23 =0x3f

 3639 02:02:20.425652  [DQSOSC]

 3640 02:02:20.434715  [DQSOSCAuto] RK1, (LSB)MR18= 0xa9, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps

 3641 02:02:20.435154  CH1 RK1: MR19=3, MR18=A9

 3642 02:02:20.438304  [RxdqsGatingPostProcess] freq 1600

 3643 02:02:20.445006  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 3644 02:02:20.445441  Rank: 0

 3645 02:02:20.448280  best DQS0 dly(2T, 0.5T) = (2, 5)

 3646 02:02:20.451763  best DQS1 dly(2T, 0.5T) = (2, 5)

 3647 02:02:20.454955  best DQS0 P1 dly(2T, 0.5T) = (3, 1)

 3648 02:02:20.458327  best DQS1 P1 dly(2T, 0.5T) = (3, 1)

 3649 02:02:20.458760  Rank: 1

 3650 02:02:20.461724  best DQS0 dly(2T, 0.5T) = (2, 5)

 3651 02:02:20.465069  best DQS1 dly(2T, 0.5T) = (2, 5)

 3652 02:02:20.468737  best DQS0 P1 dly(2T, 0.5T) = (3, 1)

 3653 02:02:20.472036  best DQS1 P1 dly(2T, 0.5T) = (3, 1)

 3654 02:02:20.475009  TX_dly_DQSgated check: min 2  max 3, ChangeDQSINCTL=-1

 3655 02:02:20.478519  DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9

 3656 02:02:20.484778  [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16

 3657 02:02:20.485209  

 3658 02:02:20.485539  

 3659 02:02:20.488100  [Calibration Summary] Freqency 1600

 3660 02:02:20.488533  CH 0, Rank 0

 3661 02:02:20.488865  All Pass.

 3662 02:02:20.489168  

 3663 02:02:20.491621  CH 0, Rank 1

 3664 02:02:20.492047  All Pass.

 3665 02:02:20.492375  

 3666 02:02:20.492680  CH 1, Rank 0

 3667 02:02:20.494771  All Pass.

 3668 02:02:20.495228  

 3669 02:02:20.495652  CH 1, Rank 1

 3670 02:02:20.495974  All Pass.

 3671 02:02:20.496266  

 3672 02:02:20.501363  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3673 02:02:20.508615  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3674 02:02:20.518827  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3675 02:02:20.519298  Write Rank0 MR3 =0xb0

 3676 02:02:20.525342  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3677 02:02:20.532104  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3678 02:02:20.538365  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3679 02:02:20.541805  Write Rank1 MR3 =0xb0

 3680 02:02:20.548044  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3681 02:02:20.554932  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3682 02:02:20.561597  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3683 02:02:20.565432  Write Rank0 MR3 =0xb0

 3684 02:02:20.571589  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3685 02:02:20.578680  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3686 02:02:20.584949  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3687 02:02:20.585380  Write Rank1 MR3 =0xb0

 3688 02:02:20.588373  DramC Write-DBI on

 3689 02:02:20.591571  [GetDramInforAfterCalByMRR] Vendor 1.

 3690 02:02:20.595219  [GetDramInforAfterCalByMRR] Revision 7.

 3691 02:02:20.595806  MR8 12

 3692 02:02:20.602272  CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.

 3693 02:02:20.602722  MR8 12

 3694 02:02:20.605131  CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.

 3695 02:02:20.605561  MR8 12

 3696 02:02:20.611761  CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.

 3697 02:02:20.612161  MR8 12

 3698 02:02:20.618262  CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.

 3699 02:02:20.625241  [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0

 3700 02:02:20.628311  Write Rank0 MR13 =0xd0

 3701 02:02:20.628703  Write Rank1 MR13 =0xd0

 3702 02:02:20.631901  Write Rank0 MR13 =0xd0

 3703 02:02:20.635339  Write Rank1 MR13 =0xd0

 3704 02:02:20.638388  Save calibration result to emmc

 3705 02:02:20.638795  

 3706 02:02:20.639096  

 3707 02:02:20.642046  [DramcModeReg_Check] Freq_1600, FSP_1

 3708 02:02:20.642470  FSP_1, CH_0, RK0

 3709 02:02:20.645211  Write Rank0 MR13 =0xd8

 3710 02:02:20.648999  		MR12 = 0x56 (global = 0x56)	match

 3711 02:02:20.652079  		MR14 = 0x18 (global = 0x18)	match

 3712 02:02:20.652466  FSP_1, CH_0, RK1

 3713 02:02:20.655309  Write Rank1 MR13 =0xd8

 3714 02:02:20.658347  		MR12 = 0x56 (global = 0x56)	match

 3715 02:02:20.661717  		MR14 = 0x18 (global = 0x18)	match

 3716 02:02:20.662108  FSP_1, CH_1, RK0

 3717 02:02:20.665244  Write Rank0 MR13 =0xd8

 3718 02:02:20.668485  		MR12 = 0x56 (global = 0x56)	match

 3719 02:02:20.672057  		MR14 = 0x1a (global = 0x1a)	match

 3720 02:02:20.672446  FSP_1, CH_1, RK1

 3721 02:02:20.675226  Write Rank1 MR13 =0xd8

 3722 02:02:20.678574  		MR12 = 0x56 (global = 0x56)	match

 3723 02:02:20.681793  		MR14 = 0x1a (global = 0x1a)	match

 3724 02:02:20.682331  

 3725 02:02:20.684985  [MEM_TEST] 02: After DFS, before run time config

 3726 02:02:20.696446  [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)

 3727 02:02:20.696906  

 3728 02:02:20.697208  [TA2_TEST]

 3729 02:02:20.697485  === TA2 HW

 3730 02:02:20.699431  TA2 PAT: XTALK

 3731 02:02:20.702753  HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0

 3732 02:02:20.709439  HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0

 3733 02:02:20.712560  HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0

 3734 02:02:20.716023  HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0

 3735 02:02:20.719224  

 3736 02:02:20.719610  

 3737 02:02:20.719956  Settings after calibration

 3738 02:02:20.720244  

 3739 02:02:20.722888  [DramcRunTimeConfig]

 3740 02:02:20.726011  TransferPLLToSPMControl - MODE SW PHYPLL

 3741 02:02:20.726431  TX_TRACKING: ON

 3742 02:02:20.729573  RX_TRACKING: ON

 3743 02:02:20.729959  HW_GATING: ON

 3744 02:02:20.732864  HW_GATING DBG: OFF

 3745 02:02:20.733250  ddr_geometry:1

 3746 02:02:20.736016  ddr_geometry:1

 3747 02:02:20.736401  ddr_geometry:1

 3748 02:02:20.736702  ddr_geometry:1

 3749 02:02:20.739565  ddr_geometry:1

 3750 02:02:20.739965  ddr_geometry:1

 3751 02:02:20.743255  ddr_geometry:1

 3752 02:02:20.743725  ddr_geometry:1

 3753 02:02:20.746351  High Freq DUMMY_READ_FOR_TRACKING: ON

 3754 02:02:20.749598  ZQCS_ENABLE_LP4: OFF

 3755 02:02:20.750062  LOWPOWER_GOLDEN_SETTINGS(DCM): ON

 3756 02:02:20.753203  DUMMY_READ_FOR_DQS_GATING_RETRY: OFF

 3757 02:02:20.756157  SPM_CONTROL_AFTERK: ON

 3758 02:02:20.759232  IMPEDANCE_TRACKING: ON

 3759 02:02:20.759649  TEMP_SENSOR: ON

 3760 02:02:20.762646  PER_BANK_REFRESH: ON

 3761 02:02:20.763033  HW_SAVE_FOR_SR: ON

 3762 02:02:20.766140  SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON

 3763 02:02:20.769175  CLK_FREE_FUN_FOR_DRAMC_PSEL: ON

 3764 02:02:20.772617  PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON

 3765 02:02:20.776165  Read ODT Tracking: ON

 3766 02:02:20.779421  =========================

 3767 02:02:20.779498  

 3768 02:02:20.779556  [TA2_TEST]

 3769 02:02:20.779610  === TA2 HW

 3770 02:02:20.785640  HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0

 3771 02:02:20.789041  HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0

 3772 02:02:20.795625  HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0

 3773 02:02:20.798718  HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0

 3774 02:02:20.798786  

 3775 02:02:20.802012  [MEM_TEST] 03: After run time config

 3776 02:02:20.813233  [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)

 3777 02:02:20.816637  [complex_mem_test] start addr:0x40024000, len:131072

 3778 02:02:21.020964  1st complex R/W mem test pass

 3779 02:02:21.027361  save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0 

 3780 02:02:21.030628  sync preloader write leveling

 3781 02:02:21.034009  sync preloader cbt_mr12

 3782 02:02:21.037589  sync preloader cbt_clk_dly

 3783 02:02:21.037685  sync preloader cbt_cmd_dly

 3784 02:02:21.040646  sync preloader cbt_cs

 3785 02:02:21.044061  sync preloader cbt_ca_perbit_delay

 3786 02:02:21.044155  sync preloader clk_delay

 3787 02:02:21.047663  sync preloader dqs_delay

 3788 02:02:21.050656  sync preloader u1Gating2T_Save

 3789 02:02:21.054054  sync preloader u1Gating05T_Save

 3790 02:02:21.057397  sync preloader u1Gatingfine_tune_Save

 3791 02:02:21.060730  sync preloader u1Gatingucpass_count_Save

 3792 02:02:21.064041  sync preloader u1TxWindowPerbitVref_Save

 3793 02:02:21.067478  sync preloader u1TxCenter_min_Save

 3794 02:02:21.070601  sync preloader u1TxCenter_max_Save

 3795 02:02:21.073999  sync preloader u1Txwin_center_Save

 3796 02:02:21.077362  sync preloader u1Txfirst_pass_Save

 3797 02:02:21.080940  sync preloader u1Txlast_pass_Save

 3798 02:02:21.081041  sync preloader u1RxDatlat_Save

 3799 02:02:21.083974  sync preloader u1RxWinPerbitVref_Save

 3800 02:02:21.090795  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 3801 02:02:21.093987  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 3802 02:02:21.097282  sync preloader delay_cell_unit

 3803 02:02:21.104201  save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1 

 3804 02:02:21.107421  sync preloader write leveling

 3805 02:02:21.107497  sync preloader cbt_mr12

 3806 02:02:21.110848  sync preloader cbt_clk_dly

 3807 02:02:21.114247  sync preloader cbt_cmd_dly

 3808 02:02:21.114324  sync preloader cbt_cs

 3809 02:02:21.117375  sync preloader cbt_ca_perbit_delay

 3810 02:02:21.120651  sync preloader clk_delay

 3811 02:02:21.123915  sync preloader dqs_delay

 3812 02:02:21.123990  sync preloader u1Gating2T_Save

 3813 02:02:21.127384  sync preloader u1Gating05T_Save

 3814 02:02:21.130859  sync preloader u1Gatingfine_tune_Save

 3815 02:02:21.134081  sync preloader u1Gatingucpass_count_Save

 3816 02:02:21.137295  sync preloader u1TxWindowPerbitVref_Save

 3817 02:02:21.140688  sync preloader u1TxCenter_min_Save

 3818 02:02:21.144414  sync preloader u1TxCenter_max_Save

 3819 02:02:21.147550  sync preloader u1Txwin_center_Save

 3820 02:02:21.150773  sync preloader u1Txfirst_pass_Save

 3821 02:02:21.154103  sync preloader u1Txlast_pass_Save

 3822 02:02:21.157702  sync preloader u1RxDatlat_Save

 3823 02:02:21.160933  sync preloader u1RxWinPerbitVref_Save

 3824 02:02:21.163977  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 3825 02:02:21.167651  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 3826 02:02:21.170783  sync preloader delay_cell_unit

 3827 02:02:21.177293  save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2 

 3828 02:02:21.180887  sync preloader write leveling

 3829 02:02:21.183983  sync preloader cbt_mr12

 3830 02:02:21.184087  sync preloader cbt_clk_dly

 3831 02:02:21.187764  sync preloader cbt_cmd_dly

 3832 02:02:21.190842  sync preloader cbt_cs

 3833 02:02:21.193919  sync preloader cbt_ca_perbit_delay

 3834 02:02:21.194011  sync preloader clk_delay

 3835 02:02:21.197302  sync preloader dqs_delay

 3836 02:02:21.200816  sync preloader u1Gating2T_Save

 3837 02:02:21.203989  sync preloader u1Gating05T_Save

 3838 02:02:21.207398  sync preloader u1Gatingfine_tune_Save

 3839 02:02:21.210620  sync preloader u1Gatingucpass_count_Save

 3840 02:02:21.214237  sync preloader u1TxWindowPerbitVref_Save

 3841 02:02:21.217540  sync preloader u1TxCenter_min_Save

 3842 02:02:21.220838  sync preloader u1TxCenter_max_Save

 3843 02:02:21.224392  sync preloader u1Txwin_center_Save

 3844 02:02:21.227194  sync preloader u1Txfirst_pass_Save

 3845 02:02:21.227270  sync preloader u1Txlast_pass_Save

 3846 02:02:21.230744  sync preloader u1RxDatlat_Save

 3847 02:02:21.234030  sync preloader u1RxWinPerbitVref_Save

 3848 02:02:21.240909  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 3849 02:02:21.244181  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 3850 02:02:21.247471  sync preloader delay_cell_unit

 3851 02:02:21.250963  just_for_test_dump_coreboot_params dump all params

 3852 02:02:21.251040  dump source = 0x0

 3853 02:02:21.254077  dump params frequency:1600

 3854 02:02:21.257418  dump params rank number:2

 3855 02:02:21.257494  

 3856 02:02:21.260906   dump params write leveling

 3857 02:02:21.260982  write leveling[0][0][0] = 0x21

 3858 02:02:21.264558  write leveling[0][0][1] = 0x1b

 3859 02:02:21.267564  write leveling[0][1][0] = 0x22

 3860 02:02:21.270957  write leveling[0][1][1] = 0x1d

 3861 02:02:21.274176  write leveling[1][0][0] = 0x25

 3862 02:02:21.277378  write leveling[1][0][1] = 0x21

 3863 02:02:21.277453  write leveling[1][1][0] = 0x25

 3864 02:02:21.280974  write leveling[1][1][1] = 0x1f

 3865 02:02:21.284047  dump params cbt_cs

 3866 02:02:21.284123  cbt_cs[0][0] = 0x8

 3867 02:02:21.287676  cbt_cs[0][1] = 0x8

 3868 02:02:21.287752  cbt_cs[1][0] = 0xc

 3869 02:02:21.291167  cbt_cs[1][1] = 0xc

 3870 02:02:21.291242  dump params cbt_mr12

 3871 02:02:21.294448  cbt_mr12[0][0] = 0x16

 3872 02:02:21.297848  cbt_mr12[0][1] = 0x16

 3873 02:02:21.297929  cbt_mr12[1][0] = 0x16

 3874 02:02:21.301431  cbt_mr12[1][1] = 0x16

 3875 02:02:21.301842  dump params tx window

 3876 02:02:21.304643  tx_center_min[0][0][0] = 980

 3877 02:02:21.307889  tx_center_max[0][0][0] =  987

 3878 02:02:21.311388  tx_center_min[0][0][1] = 975

 3879 02:02:21.311779  tx_center_max[0][0][1] =  979

 3880 02:02:21.314780  tx_center_min[0][1][0] = 981

 3881 02:02:21.317974  tx_center_max[0][1][0] =  989

 3882 02:02:21.321577  tx_center_min[0][1][1] = 977

 3883 02:02:21.324519  tx_center_max[0][1][1] =  981

 3884 02:02:21.324915  tx_center_min[1][0][0] = 982

 3885 02:02:21.328287  tx_center_max[1][0][0] =  989

 3886 02:02:21.331497  tx_center_min[1][0][1] = 980

 3887 02:02:21.334983  tx_center_max[1][0][1] =  982

 3888 02:02:21.338247  tx_center_min[1][1][0] = 983

 3889 02:02:21.338640  tx_center_max[1][1][0] =  989

 3890 02:02:21.341310  tx_center_min[1][1][1] = 976

 3891 02:02:21.344689  tx_center_max[1][1][1] =  980

 3892 02:02:21.348189  dump params tx window

 3893 02:02:21.348577  tx_win_center[0][0][0] = 987

 3894 02:02:21.351220  tx_first_pass[0][0][0] =  976

 3895 02:02:21.354957  tx_last_pass[0][0][0] =	999

 3896 02:02:21.358047  tx_win_center[0][0][1] = 986

 3897 02:02:21.358481  tx_first_pass[0][0][1] =  974

 3898 02:02:21.361587  tx_last_pass[0][0][1] =	998

 3899 02:02:21.365122  tx_win_center[0][0][2] = 986

 3900 02:02:21.368061  tx_first_pass[0][0][2] =  975

 3901 02:02:21.368453  tx_last_pass[0][0][2] =	998

 3902 02:02:21.371360  tx_win_center[0][0][3] = 980

 3903 02:02:21.374649  tx_first_pass[0][0][3] =  968

 3904 02:02:21.378258  tx_last_pass[0][0][3] =	992

 3905 02:02:21.381326  tx_win_center[0][0][4] = 986

 3906 02:02:21.381713  tx_first_pass[0][0][4] =  974

 3907 02:02:21.384926  tx_last_pass[0][0][4] =	998

 3908 02:02:21.387994  tx_win_center[0][0][5] = 981

 3909 02:02:21.391275  tx_first_pass[0][0][5] =  969

 3910 02:02:21.391677  tx_last_pass[0][0][5] =	993

 3911 02:02:21.394651  tx_win_center[0][0][6] = 982

 3912 02:02:21.397996  tx_first_pass[0][0][6] =  970

 3913 02:02:21.401733  tx_last_pass[0][0][6] =	995

 3914 02:02:21.404916  tx_win_center[0][0][7] = 983

 3915 02:02:21.405308  tx_first_pass[0][0][7] =  972

 3916 02:02:21.408097  tx_last_pass[0][0][7] =	995

 3917 02:02:21.411413  tx_win_center[0][0][8] = 975

 3918 02:02:21.414662  tx_first_pass[0][0][8] =  962

 3919 02:02:21.415051  tx_last_pass[0][0][8] =	988

 3920 02:02:21.417897  tx_win_center[0][0][9] = 975

 3921 02:02:21.421199  tx_first_pass[0][0][9] =  963

 3922 02:02:21.424811  tx_last_pass[0][0][9] =	988

 3923 02:02:21.427925  tx_win_center[0][0][10] = 979

 3924 02:02:21.428313  tx_first_pass[0][0][10] =  967

 3925 02:02:21.431213  tx_last_pass[0][0][10] =	991

 3926 02:02:21.434485  tx_win_center[0][0][11] = 975

 3927 02:02:21.438442  tx_first_pass[0][0][11] =  963

 3928 02:02:21.441470  tx_last_pass[0][0][11] =	988

 3929 02:02:21.441937  tx_win_center[0][0][12] = 976

 3930 02:02:21.444654  tx_first_pass[0][0][12] =  963

 3931 02:02:21.447740  tx_last_pass[0][0][12] =	989

 3932 02:02:21.451447  tx_win_center[0][0][13] = 975

 3933 02:02:21.454362  tx_first_pass[0][0][13] =  963

 3934 02:02:21.454755  tx_last_pass[0][0][13] =	988

 3935 02:02:21.457741  tx_win_center[0][0][14] = 976

 3936 02:02:21.460921  tx_first_pass[0][0][14] =  963

 3937 02:02:21.464237  tx_last_pass[0][0][14] =	989

 3938 02:02:21.467931  tx_win_center[0][0][15] = 978

 3939 02:02:21.471043  tx_first_pass[0][0][15] =  966

 3940 02:02:21.471481  tx_last_pass[0][0][15] =	990

 3941 02:02:21.474808  tx_win_center[0][1][0] = 989

 3942 02:02:21.477948  tx_first_pass[0][1][0] =  977

 3943 02:02:21.481203  tx_last_pass[0][1][0] =	1001

 3944 02:02:21.481708  tx_win_center[0][1][1] = 987

 3945 02:02:21.484335  tx_first_pass[0][1][1] =  976

 3946 02:02:21.487462  tx_last_pass[0][1][1] =	999

 3947 02:02:21.491179  tx_win_center[0][1][2] = 987

 3948 02:02:21.494466  tx_first_pass[0][1][2] =  976

 3949 02:02:21.494978  tx_last_pass[0][1][2] =	999

 3950 02:02:21.497715  tx_win_center[0][1][3] = 981

 3951 02:02:21.501034  tx_first_pass[0][1][3] =  969

 3952 02:02:21.504595  tx_last_pass[0][1][3] =	994

 3953 02:02:21.505099  tx_win_center[0][1][4] = 988

 3954 02:02:21.507819  tx_first_pass[0][1][4] =  976

 3955 02:02:21.511158  tx_last_pass[0][1][4] =	1000

 3956 02:02:21.514446  tx_win_center[0][1][5] = 982

 3957 02:02:21.518176  tx_first_pass[0][1][5] =  970

 3958 02:02:21.518695  tx_last_pass[0][1][5] =	994

 3959 02:02:21.520903  tx_win_center[0][1][6] = 983

 3960 02:02:21.524424  tx_first_pass[0][1][6] =  971

 3961 02:02:21.527823  tx_last_pass[0][1][6] =	995

 3962 02:02:21.528253  tx_win_center[0][1][7] = 986

 3963 02:02:21.530742  tx_first_pass[0][1][7] =  975

 3964 02:02:21.534512  tx_last_pass[0][1][7] =	998

 3965 02:02:21.538058  tx_win_center[0][1][8] = 977

 3966 02:02:21.541184  tx_first_pass[0][1][8] =  964

 3967 02:02:21.541702  tx_last_pass[0][1][8] =	990

 3968 02:02:21.544779  tx_win_center[0][1][9] = 978

 3969 02:02:21.548145  tx_first_pass[0][1][9] =  966

 3970 02:02:21.550990  tx_last_pass[0][1][9] =	990

 3971 02:02:21.551426  tx_win_center[0][1][10] = 981

 3972 02:02:21.554610  tx_first_pass[0][1][10] =  969

 3973 02:02:21.557633  tx_last_pass[0][1][10] =	994

 3974 02:02:21.561288  tx_win_center[0][1][11] = 978

 3975 02:02:21.564239  tx_first_pass[0][1][11] =  966

 3976 02:02:21.564677  tx_last_pass[0][1][11] =	990

 3977 02:02:21.567767  tx_win_center[0][1][12] = 979

 3978 02:02:21.571616  tx_first_pass[0][1][12] =  967

 3979 02:02:21.574414  tx_last_pass[0][1][12] =	991

 3980 02:02:21.578021  tx_win_center[0][1][13] = 978

 3981 02:02:21.578590  tx_first_pass[0][1][13] =  966

 3982 02:02:21.581365  tx_last_pass[0][1][13] =	990

 3983 02:02:21.584546  tx_win_center[0][1][14] = 978

 3984 02:02:21.587755  tx_first_pass[0][1][14] =  966

 3985 02:02:21.591366  tx_last_pass[0][1][14] =	991

 3986 02:02:21.591796  tx_win_center[0][1][15] = 980

 3987 02:02:21.594255  tx_first_pass[0][1][15] =  968

 3988 02:02:21.598118  tx_last_pass[0][1][15] =	992

 3989 02:02:21.601358  tx_win_center[1][0][0] = 989

 3990 02:02:21.604621  tx_first_pass[1][0][0] =  977

 3991 02:02:21.605063  tx_last_pass[1][0][0] =	1001

 3992 02:02:21.607991  tx_win_center[1][0][1] = 987

 3993 02:02:21.611183  tx_first_pass[1][0][1] =  976

 3994 02:02:21.614618  tx_last_pass[1][0][1] =	999

 3995 02:02:21.615068  tx_win_center[1][0][2] = 985

 3996 02:02:21.617724  tx_first_pass[1][0][2] =  974

 3997 02:02:21.621401  tx_last_pass[1][0][2] =	997

 3998 02:02:21.624940  tx_win_center[1][0][3] = 982

 3999 02:02:21.628216  tx_first_pass[1][0][3] =  970

 4000 02:02:21.628879  tx_last_pass[1][0][3] =	995

 4001 02:02:21.631172  tx_win_center[1][0][4] = 986

 4002 02:02:21.634878  tx_first_pass[1][0][4] =  975

 4003 02:02:21.638328  tx_last_pass[1][0][4] =	998

 4004 02:02:21.638909  tx_win_center[1][0][5] = 987

 4005 02:02:21.641173  tx_first_pass[1][0][5] =  976

 4006 02:02:21.644564  tx_last_pass[1][0][5] =	999

 4007 02:02:21.647857  tx_win_center[1][0][6] = 988

 4008 02:02:21.651311  tx_first_pass[1][0][6] =  976

 4009 02:02:21.651900  tx_last_pass[1][0][6] =	1000

 4010 02:02:21.654990  tx_win_center[1][0][7] = 986

 4011 02:02:21.657742  tx_first_pass[1][0][7] =  975

 4012 02:02:21.661231  tx_last_pass[1][0][7] =	998

 4013 02:02:21.661664  tx_win_center[1][0][8] = 980

 4014 02:02:21.664758  tx_first_pass[1][0][8] =  969

 4015 02:02:21.668024  tx_last_pass[1][0][8] =	992

 4016 02:02:21.671517  tx_win_center[1][0][9] = 980

 4017 02:02:21.674770  tx_first_pass[1][0][9] =  969

 4018 02:02:21.675295  tx_last_pass[1][0][9] =	992

 4019 02:02:21.678254  tx_win_center[1][0][10] = 981

 4020 02:02:21.681446  tx_first_pass[1][0][10] =  970

 4021 02:02:21.684345  tx_last_pass[1][0][10] =	993

 4022 02:02:21.687929  tx_win_center[1][0][11] = 982

 4023 02:02:21.688359  tx_first_pass[1][0][11] =  970

 4024 02:02:21.691044  tx_last_pass[1][0][11] =	994

 4025 02:02:21.694360  tx_win_center[1][0][12] = 982

 4026 02:02:21.698100  tx_first_pass[1][0][12] =  971

 4027 02:02:21.701175  tx_last_pass[1][0][12] =	994

 4028 02:02:21.701650  tx_win_center[1][0][13] = 981

 4029 02:02:21.704305  tx_first_pass[1][0][13] =  970

 4030 02:02:21.708082  tx_last_pass[1][0][13] =	993

 4031 02:02:21.711261  tx_win_center[1][0][14] = 981

 4032 02:02:21.715005  tx_first_pass[1][0][14] =  970

 4033 02:02:21.715480  tx_last_pass[1][0][14] =	992

 4034 02:02:21.718179  tx_win_center[1][0][15] = 980

 4035 02:02:21.721406  tx_first_pass[1][0][15] =  968

 4036 02:02:21.724629  tx_last_pass[1][0][15] =	992

 4037 02:02:21.728096  tx_win_center[1][1][0] = 989

 4038 02:02:21.728528  tx_first_pass[1][1][0] =  976

 4039 02:02:21.731460  tx_last_pass[1][1][0] =	1002

 4040 02:02:21.734709  tx_win_center[1][1][1] = 987

 4041 02:02:21.738007  tx_first_pass[1][1][1] =  975

 4042 02:02:21.738573  tx_last_pass[1][1][1] =	999

 4043 02:02:21.741355  tx_win_center[1][1][2] = 984

 4044 02:02:21.744348  tx_first_pass[1][1][2] =  971

 4045 02:02:21.747895  tx_last_pass[1][1][2] =	997

 4046 02:02:21.750976  tx_win_center[1][1][3] = 983

 4047 02:02:21.751454  tx_first_pass[1][1][3] =  970

 4048 02:02:21.754483  tx_last_pass[1][1][3] =	997

 4049 02:02:21.757998  tx_win_center[1][1][4] = 985

 4050 02:02:21.761055  tx_first_pass[1][1][4] =  973

 4051 02:02:21.761565  tx_last_pass[1][1][4] =	998

 4052 02:02:21.764321  tx_win_center[1][1][5] = 988

 4053 02:02:21.767793  tx_first_pass[1][1][5] =  976

 4054 02:02:21.771299  tx_last_pass[1][1][5] =	1001

 4055 02:02:21.774800  tx_win_center[1][1][6] = 989

 4056 02:02:21.775352  tx_first_pass[1][1][6] =  976

 4057 02:02:21.777866  tx_last_pass[1][1][6] =	1002

 4058 02:02:21.781217  tx_win_center[1][1][7] = 986

 4059 02:02:21.784492  tx_first_pass[1][1][7] =  974

 4060 02:02:21.784887  tx_last_pass[1][1][7] =	998

 4061 02:02:21.788175  tx_win_center[1][1][8] = 978

 4062 02:02:21.791160  tx_first_pass[1][1][8] =  966

 4063 02:02:21.794347  tx_last_pass[1][1][8] =	991

 4064 02:02:21.797944  tx_win_center[1][1][9] = 978

 4065 02:02:21.798365  tx_first_pass[1][1][9] =  966

 4066 02:02:21.801255  tx_last_pass[1][1][9] =	991

 4067 02:02:21.804414  tx_win_center[1][1][10] = 979

 4068 02:02:21.808233  tx_first_pass[1][1][10] =  967

 4069 02:02:21.811336  tx_last_pass[1][1][10] =	991

 4070 02:02:21.811764  tx_win_center[1][1][11] = 980

 4071 02:02:21.814353  tx_first_pass[1][1][11] =  968

 4072 02:02:21.818067  tx_last_pass[1][1][11] =	992

 4073 02:02:21.821679  tx_win_center[1][1][12] = 980

 4074 02:02:21.824945  tx_first_pass[1][1][12] =  969

 4075 02:02:21.825451  tx_last_pass[1][1][12] =	992

 4076 02:02:21.828193  tx_win_center[1][1][13] = 980

 4077 02:02:21.831371  tx_first_pass[1][1][13] =  968

 4078 02:02:21.834710  tx_last_pass[1][1][13] =	992

 4079 02:02:21.835315  tx_win_center[1][1][14] = 979

 4080 02:02:21.838281  tx_first_pass[1][1][14] =  968

 4081 02:02:21.841252  tx_last_pass[1][1][14] =	991

 4082 02:02:21.844664  tx_win_center[1][1][15] = 976

 4083 02:02:21.848005  tx_first_pass[1][1][15] =  963

 4084 02:02:21.848444  tx_last_pass[1][1][15] =	990

 4085 02:02:21.851585  dump params rx window

 4086 02:02:21.854574  rx_firspass[0][0][0] = 8

 4087 02:02:21.855002  rx_lastpass[0][0][0] =  40

 4088 02:02:21.857953  rx_firspass[0][0][1] = 6

 4089 02:02:21.861252  rx_lastpass[0][0][1] =  39

 4090 02:02:21.865129  rx_firspass[0][0][2] = 8

 4091 02:02:21.865517  rx_lastpass[0][0][2] =  38

 4092 02:02:21.868033  rx_firspass[0][0][3] = -4

 4093 02:02:21.871812  rx_lastpass[0][0][3] =  29

 4094 02:02:21.872199  rx_firspass[0][0][4] = 6

 4095 02:02:21.874766  rx_lastpass[0][0][4] =  38

 4096 02:02:21.877991  rx_firspass[0][0][5] = 0

 4097 02:02:21.878491  rx_lastpass[0][0][5] =  30

 4098 02:02:21.881644  rx_firspass[0][0][6] = 1

 4099 02:02:21.884882  rx_lastpass[0][0][6] =  32

 4100 02:02:21.888267  rx_firspass[0][0][7] = 3

 4101 02:02:21.888733  rx_lastpass[0][0][7] =  32

 4102 02:02:21.891562  rx_firspass[0][0][8] = 0

 4103 02:02:21.895359  rx_lastpass[0][0][8] =  34

 4104 02:02:21.895775  rx_firspass[0][0][9] = 4

 4105 02:02:21.897903  rx_lastpass[0][0][9] =  34

 4106 02:02:21.901356  rx_firspass[0][0][10] = 6

 4107 02:02:21.901742  rx_lastpass[0][0][10] =  38

 4108 02:02:21.904901  rx_firspass[0][0][11] = 0

 4109 02:02:21.908217  rx_lastpass[0][0][11] =  34

 4110 02:02:21.911705  rx_firspass[0][0][12] = 2

 4111 02:02:21.912133  rx_lastpass[0][0][12] =  36

 4112 02:02:21.914943  rx_firspass[0][0][13] = 2

 4113 02:02:21.918448  rx_lastpass[0][0][13] =  30

 4114 02:02:21.919069  rx_firspass[0][0][14] = -1

 4115 02:02:21.921697  rx_lastpass[0][0][14] =  35

 4116 02:02:21.925388  rx_firspass[0][0][15] = 3

 4117 02:02:21.928552  rx_lastpass[0][0][15] =  36

 4118 02:02:21.928979  rx_firspass[0][1][0] = 7

 4119 02:02:21.932034  rx_lastpass[0][1][0] =  41

 4120 02:02:21.934882  rx_firspass[0][1][1] = 6

 4121 02:02:21.935353  rx_lastpass[0][1][1] =  40

 4122 02:02:21.938324  rx_firspass[0][1][2] = 7

 4123 02:02:21.941658  rx_lastpass[0][1][2] =  39

 4124 02:02:21.945229  rx_firspass[0][1][3] = -4

 4125 02:02:21.945689  rx_lastpass[0][1][3] =  31

 4126 02:02:21.948628  rx_firspass[0][1][4] = 6

 4127 02:02:21.951834  rx_lastpass[0][1][4] =  40

 4128 02:02:21.952295  rx_firspass[0][1][5] = -2

 4129 02:02:21.955119  rx_lastpass[0][1][5] =  33

 4130 02:02:21.958263  rx_firspass[0][1][6] = 1

 4131 02:02:21.958693  rx_lastpass[0][1][6] =  35

 4132 02:02:21.961894  rx_firspass[0][1][7] = 2

 4133 02:02:21.965054  rx_lastpass[0][1][7] =  34

 4134 02:02:21.968295  rx_firspass[0][1][8] = -1

 4135 02:02:21.968867  rx_lastpass[0][1][8] =  35

 4136 02:02:21.971814  rx_firspass[0][1][9] = 2

 4137 02:02:21.974905  rx_lastpass[0][1][9] =  36

 4138 02:02:21.975355  rx_firspass[0][1][10] = 6

 4139 02:02:21.978414  rx_lastpass[0][1][10] =  40

 4140 02:02:21.981906  rx_firspass[0][1][11] = 0

 4141 02:02:21.985290  rx_lastpass[0][1][11] =  34

 4142 02:02:21.985732  rx_firspass[0][1][12] = 2

 4143 02:02:21.988406  rx_lastpass[0][1][12] =  37

 4144 02:02:21.991876  rx_firspass[0][1][13] = 1

 4145 02:02:21.992306  rx_lastpass[0][1][13] =  33

 4146 02:02:21.994949  rx_firspass[0][1][14] = 2

 4147 02:02:21.998599  rx_lastpass[0][1][14] =  34

 4148 02:02:22.002241  rx_firspass[0][1][15] = 3

 4149 02:02:22.002761  rx_lastpass[0][1][15] =  38

 4150 02:02:22.005380  rx_firspass[1][0][0] = 7

 4151 02:02:22.008779  rx_lastpass[1][0][0] =  40

 4152 02:02:22.009288  rx_firspass[1][0][1] = 6

 4153 02:02:22.012280  rx_lastpass[1][0][1] =  40

 4154 02:02:22.015001  rx_firspass[1][0][2] = 0

 4155 02:02:22.018592  rx_lastpass[1][0][2] =  34

 4156 02:02:22.019021  rx_firspass[1][0][3] = -2

 4157 02:02:22.021769  rx_lastpass[1][0][3] =  33

 4158 02:02:22.025134  rx_firspass[1][0][4] = 4

 4159 02:02:22.025567  rx_lastpass[1][0][4] =  34

 4160 02:02:22.028252  rx_firspass[1][0][5] = 7

 4161 02:02:22.031523  rx_lastpass[1][0][5] =  40

 4162 02:02:22.031955  rx_firspass[1][0][6] = 9

 4163 02:02:22.034839  rx_lastpass[1][0][6] =  40

 4164 02:02:22.038333  rx_firspass[1][0][7] = 4

 4165 02:02:22.041780  rx_lastpass[1][0][7] =  35

 4166 02:02:22.042344  rx_firspass[1][0][8] = 1

 4167 02:02:22.045161  rx_lastpass[1][0][8] =  35

 4168 02:02:22.048377  rx_firspass[1][0][9] = 0

 4169 02:02:22.048767  rx_lastpass[1][0][9] =  35

 4170 02:02:22.051742  rx_firspass[1][0][10] = 2

 4171 02:02:22.055332  rx_lastpass[1][0][10] =  33

 4172 02:02:22.055718  rx_firspass[1][0][11] = 2

 4173 02:02:22.058762  rx_lastpass[1][0][11] =  36

 4174 02:02:22.061891  rx_firspass[1][0][12] = 4

 4175 02:02:22.064987  rx_lastpass[1][0][12] =  37

 4176 02:02:22.065376  rx_firspass[1][0][13] = 3

 4177 02:02:22.068376  rx_lastpass[1][0][13] =  35

 4178 02:02:22.071842  rx_firspass[1][0][14] = 3

 4179 02:02:22.075333  rx_lastpass[1][0][14] =  35

 4180 02:02:22.075812  rx_firspass[1][0][15] = -1

 4181 02:02:22.078299  rx_lastpass[1][0][15] =  31

 4182 02:02:22.081794  rx_firspass[1][1][0] = 7

 4183 02:02:22.082192  rx_lastpass[1][1][0] =  42

 4184 02:02:22.085545  rx_firspass[1][1][1] = 6

 4185 02:02:22.088768  rx_lastpass[1][1][1] =  41

 4186 02:02:22.089157  rx_firspass[1][1][2] = 0

 4187 02:02:22.092098  rx_lastpass[1][1][2] =  34

 4188 02:02:22.095354  rx_firspass[1][1][3] = -2

 4189 02:02:22.099280  rx_lastpass[1][1][3] =  32

 4190 02:02:22.099793  rx_firspass[1][1][4] = 3

 4191 02:02:22.101996  rx_lastpass[1][1][4] =  37

 4192 02:02:22.105292  rx_firspass[1][1][5] = 7

 4193 02:02:22.105720  rx_lastpass[1][1][5] =  40

 4194 02:02:22.108779  rx_firspass[1][1][6] = 8

 4195 02:02:22.112349  rx_lastpass[1][1][6] =  42

 4196 02:02:22.112853  rx_firspass[1][1][7] = 3

 4197 02:02:22.115224  rx_lastpass[1][1][7] =  38

 4198 02:02:22.118573  rx_firspass[1][1][8] = 1

 4199 02:02:22.122258  rx_lastpass[1][1][8] =  36

 4200 02:02:22.122693  rx_firspass[1][1][9] = 1

 4201 02:02:22.125279  rx_lastpass[1][1][9] =  36

 4202 02:02:22.129085  rx_firspass[1][1][10] = 1

 4203 02:02:22.129517  rx_lastpass[1][1][10] =  35

 4204 02:02:22.132280  rx_firspass[1][1][11] = 2

 4205 02:02:22.135839  rx_lastpass[1][1][11] =  36

 4206 02:02:22.138576  rx_firspass[1][1][12] = 5

 4207 02:02:22.139003  rx_lastpass[1][1][12] =  39

 4208 02:02:22.142022  rx_firspass[1][1][13] = 4

 4209 02:02:22.145315  rx_lastpass[1][1][13] =  38

 4210 02:02:22.145741  rx_firspass[1][1][14] = 3

 4211 02:02:22.148779  rx_lastpass[1][1][14] =  37

 4212 02:02:22.152042  rx_firspass[1][1][15] = -2

 4213 02:02:22.155844  rx_lastpass[1][1][15] =  32

 4214 02:02:22.156392  dump params clk_delay

 4215 02:02:22.158768  clk_delay[0] = 0

 4216 02:02:22.159197  clk_delay[1] = 0

 4217 02:02:22.161841  dump params dqs_delay

 4218 02:02:22.162331  dqs_delay[0][0] = -1

 4219 02:02:22.165287  dqs_delay[0][1] = 2

 4220 02:02:22.165715  dqs_delay[1][0] = 0

 4221 02:02:22.168413  dqs_delay[1][1] = 0

 4222 02:02:22.171478  dump params delay_cell_unit = 762

 4223 02:02:22.171575  dump source = 0x0

 4224 02:02:22.175017  dump params frequency:1200

 4225 02:02:22.178468  dump params rank number:2

 4226 02:02:22.178543  

 4227 02:02:22.181506   dump params write leveling

 4228 02:02:22.181581  write leveling[0][0][0] = 0x0

 4229 02:02:22.184883  write leveling[0][0][1] = 0x0

 4230 02:02:22.188695  write leveling[0][1][0] = 0x0

 4231 02:02:22.191473  write leveling[0][1][1] = 0x0

 4232 02:02:22.195042  write leveling[1][0][0] = 0x0

 4233 02:02:22.195129  write leveling[1][0][1] = 0x0

 4234 02:02:22.198555  write leveling[1][1][0] = 0x0

 4235 02:02:22.202012  write leveling[1][1][1] = 0x0

 4236 02:02:22.202106  dump params cbt_cs

 4237 02:02:22.205517  cbt_cs[0][0] = 0x0

 4238 02:02:22.208607  cbt_cs[0][1] = 0x0

 4239 02:02:22.208682  cbt_cs[1][0] = 0x0

 4240 02:02:22.211700  cbt_cs[1][1] = 0x0

 4241 02:02:22.211777  dump params cbt_mr12

 4242 02:02:22.214993  cbt_mr12[0][0] = 0x0

 4243 02:02:22.215069  cbt_mr12[0][1] = 0x0

 4244 02:02:22.218686  cbt_mr12[1][0] = 0x0

 4245 02:02:22.218763  cbt_mr12[1][1] = 0x0

 4246 02:02:22.221706  dump params tx window

 4247 02:02:22.225023  tx_center_min[0][0][0] = 0

 4248 02:02:22.225110  tx_center_max[0][0][0] =  0

 4249 02:02:22.228603  tx_center_min[0][0][1] = 0

 4250 02:02:22.232078  tx_center_max[0][0][1] =  0

 4251 02:02:22.235613  tx_center_min[0][1][0] = 0

 4252 02:02:22.236001  tx_center_max[0][1][0] =  0

 4253 02:02:22.238930  tx_center_min[0][1][1] = 0

 4254 02:02:22.242194  tx_center_max[0][1][1] =  0

 4255 02:02:22.245427  tx_center_min[1][0][0] = 0

 4256 02:02:22.245813  tx_center_max[1][0][0] =  0

 4257 02:02:22.248795  tx_center_min[1][0][1] = 0

 4258 02:02:22.251864  tx_center_max[1][0][1] =  0

 4259 02:02:22.255495  tx_center_min[1][1][0] = 0

 4260 02:02:22.255942  tx_center_max[1][1][0] =  0

 4261 02:02:22.258638  tx_center_min[1][1][1] = 0

 4262 02:02:22.261992  tx_center_max[1][1][1] =  0

 4263 02:02:22.262515  dump params tx window

 4264 02:02:22.265599  tx_win_center[0][0][0] = 0

 4265 02:02:22.269016  tx_first_pass[0][0][0] =  0

 4266 02:02:22.272262  tx_last_pass[0][0][0] =	0

 4267 02:02:22.272648  tx_win_center[0][0][1] = 0

 4268 02:02:22.275674  tx_first_pass[0][0][1] =  0

 4269 02:02:22.279064  tx_last_pass[0][0][1] =	0

 4270 02:02:22.279451  tx_win_center[0][0][2] = 0

 4271 02:02:22.282200  tx_first_pass[0][0][2] =  0

 4272 02:02:22.285508  tx_last_pass[0][0][2] =	0

 4273 02:02:22.288696  tx_win_center[0][0][3] = 0

 4274 02:02:22.289083  tx_first_pass[0][0][3] =  0

 4275 02:02:22.292220  tx_last_pass[0][0][3] =	0

 4276 02:02:22.295732  tx_win_center[0][0][4] = 0

 4277 02:02:22.296120  tx_first_pass[0][0][4] =  0

 4278 02:02:22.298921  tx_last_pass[0][0][4] =	0

 4279 02:02:22.302509  tx_win_center[0][0][5] = 0

 4280 02:02:22.305969  tx_first_pass[0][0][5] =  0

 4281 02:02:22.306386  tx_last_pass[0][0][5] =	0

 4282 02:02:22.309302  tx_win_center[0][0][6] = 0

 4283 02:02:22.312379  tx_first_pass[0][0][6] =  0

 4284 02:02:22.312767  tx_last_pass[0][0][6] =	0

 4285 02:02:22.315770  tx_win_center[0][0][7] = 0

 4286 02:02:22.319126  tx_first_pass[0][0][7] =  0

 4287 02:02:22.322872  tx_last_pass[0][0][7] =	0

 4288 02:02:22.323259  tx_win_center[0][0][8] = 0

 4289 02:02:22.325611  tx_first_pass[0][0][8] =  0

 4290 02:02:22.329123  tx_last_pass[0][0][8] =	0

 4291 02:02:22.332666  tx_win_center[0][0][9] = 0

 4292 02:02:22.333135  tx_first_pass[0][0][9] =  0

 4293 02:02:22.335642  tx_last_pass[0][0][9] =	0

 4294 02:02:22.338962  tx_win_center[0][0][10] = 0

 4295 02:02:22.342285  tx_first_pass[0][0][10] =  0

 4296 02:02:22.342680  tx_last_pass[0][0][10] =	0

 4297 02:02:22.345550  tx_win_center[0][0][11] = 0

 4298 02:02:22.348980  tx_first_pass[0][0][11] =  0

 4299 02:02:22.349372  tx_last_pass[0][0][11] =	0

 4300 02:02:22.352627  tx_win_center[0][0][12] = 0

 4301 02:02:22.355716  tx_first_pass[0][0][12] =  0

 4302 02:02:22.358785  tx_last_pass[0][0][12] =	0

 4303 02:02:22.358860  tx_win_center[0][0][13] = 0

 4304 02:02:22.361980  tx_first_pass[0][0][13] =  0

 4305 02:02:22.365402  tx_last_pass[0][0][13] =	0

 4306 02:02:22.369190  tx_win_center[0][0][14] = 0

 4307 02:02:22.372449  tx_first_pass[0][0][14] =  0

 4308 02:02:22.372586  tx_last_pass[0][0][14] =	0

 4309 02:02:22.375691  tx_win_center[0][0][15] = 0

 4310 02:02:22.378847  tx_first_pass[0][0][15] =  0

 4311 02:02:22.378991  tx_last_pass[0][0][15] =	0

 4312 02:02:22.382143  tx_win_center[0][1][0] = 0

 4313 02:02:22.385556  tx_first_pass[0][1][0] =  0

 4314 02:02:22.388762  tx_last_pass[0][1][0] =	0

 4315 02:02:22.388882  tx_win_center[0][1][1] = 0

 4316 02:02:22.392352  tx_first_pass[0][1][1] =  0

 4317 02:02:22.395538  tx_last_pass[0][1][1] =	0

 4318 02:02:22.398651  tx_win_center[0][1][2] = 0

 4319 02:02:22.398815  tx_first_pass[0][1][2] =  0

 4320 02:02:22.402103  tx_last_pass[0][1][2] =	0

 4321 02:02:22.405319  tx_win_center[0][1][3] = 0

 4322 02:02:22.405458  tx_first_pass[0][1][3] =  0

 4323 02:02:22.408632  tx_last_pass[0][1][3] =	0

 4324 02:02:22.412026  tx_win_center[0][1][4] = 0

 4325 02:02:22.415463  tx_first_pass[0][1][4] =  0

 4326 02:02:22.415650  tx_last_pass[0][1][4] =	0

 4327 02:02:22.418847  tx_win_center[0][1][5] = 0

 4328 02:02:22.422130  tx_first_pass[0][1][5] =  0

 4329 02:02:22.425538  tx_last_pass[0][1][5] =	0

 4330 02:02:22.425812  tx_win_center[0][1][6] = 0

 4331 02:02:22.428966  tx_first_pass[0][1][6] =  0

 4332 02:02:22.431772  tx_last_pass[0][1][6] =	0

 4333 02:02:22.431847  tx_win_center[0][1][7] = 0

 4334 02:02:22.435398  tx_first_pass[0][1][7] =  0

 4335 02:02:22.438564  tx_last_pass[0][1][7] =	0

 4336 02:02:22.442092  tx_win_center[0][1][8] = 0

 4337 02:02:22.442168  tx_first_pass[0][1][8] =  0

 4338 02:02:22.445464  tx_last_pass[0][1][8] =	0

 4339 02:02:22.448780  tx_win_center[0][1][9] = 0

 4340 02:02:22.448861  tx_first_pass[0][1][9] =  0

 4341 02:02:22.452033  tx_last_pass[0][1][9] =	0

 4342 02:02:22.455635  tx_win_center[0][1][10] = 0

 4343 02:02:22.459071  tx_first_pass[0][1][10] =  0

 4344 02:02:22.459230  tx_last_pass[0][1][10] =	0

 4345 02:02:22.462518  tx_win_center[0][1][11] = 0

 4346 02:02:22.465979  tx_first_pass[0][1][11] =  0

 4347 02:02:22.469066  tx_last_pass[0][1][11] =	0

 4348 02:02:22.469241  tx_win_center[0][1][12] = 0

 4349 02:02:22.472368  tx_first_pass[0][1][12] =  0

 4350 02:02:22.476082  tx_last_pass[0][1][12] =	0

 4351 02:02:22.479129  tx_win_center[0][1][13] = 0

 4352 02:02:22.479350  tx_first_pass[0][1][13] =  0

 4353 02:02:22.482799  tx_last_pass[0][1][13] =	0

 4354 02:02:22.485851  tx_win_center[0][1][14] = 0

 4355 02:02:22.489205  tx_first_pass[0][1][14] =  0

 4356 02:02:22.489509  tx_last_pass[0][1][14] =	0

 4357 02:02:22.492425  tx_win_center[0][1][15] = 0

 4358 02:02:22.495967  tx_first_pass[0][1][15] =  0

 4359 02:02:22.499369  tx_last_pass[0][1][15] =	0

 4360 02:02:22.499804  tx_win_center[1][0][0] = 0

 4361 02:02:22.502756  tx_first_pass[1][0][0] =  0

 4362 02:02:22.506086  tx_last_pass[1][0][0] =	0

 4363 02:02:22.509467  tx_win_center[1][0][1] = 0

 4364 02:02:22.510148  tx_first_pass[1][0][1] =  0

 4365 02:02:22.512645  tx_last_pass[1][0][1] =	0

 4366 02:02:22.516360  tx_win_center[1][0][2] = 0

 4367 02:02:22.516861  tx_first_pass[1][0][2] =  0

 4368 02:02:22.519240  tx_last_pass[1][0][2] =	0

 4369 02:02:22.522457  tx_win_center[1][0][3] = 0

 4370 02:02:22.525962  tx_first_pass[1][0][3] =  0

 4371 02:02:22.526435  tx_last_pass[1][0][3] =	0

 4372 02:02:22.529806  tx_win_center[1][0][4] = 0

 4373 02:02:22.532930  tx_first_pass[1][0][4] =  0

 4374 02:02:22.533355  tx_last_pass[1][0][4] =	0

 4375 02:02:22.536249  tx_win_center[1][0][5] = 0

 4376 02:02:22.539547  tx_first_pass[1][0][5] =  0

 4377 02:02:22.542829  tx_last_pass[1][0][5] =	0

 4378 02:02:22.543256  tx_win_center[1][0][6] = 0

 4379 02:02:22.546051  tx_first_pass[1][0][6] =  0

 4380 02:02:22.549829  tx_last_pass[1][0][6] =	0

 4381 02:02:22.550419  tx_win_center[1][0][7] = 0

 4382 02:02:22.553300  tx_first_pass[1][0][7] =  0

 4383 02:02:22.557035  tx_last_pass[1][0][7] =	0

 4384 02:02:22.559873  tx_win_center[1][0][8] = 0

 4385 02:02:22.560461  tx_first_pass[1][0][8] =  0

 4386 02:02:22.563358  tx_last_pass[1][0][8] =	0

 4387 02:02:22.566479  tx_win_center[1][0][9] = 0

 4388 02:02:22.569456  tx_first_pass[1][0][9] =  0

 4389 02:02:22.569531  tx_last_pass[1][0][9] =	0

 4390 02:02:22.572365  tx_win_center[1][0][10] = 0

 4391 02:02:22.575848  tx_first_pass[1][0][10] =  0

 4392 02:02:22.575923  tx_last_pass[1][0][10] =	0

 4393 02:02:22.579718  tx_win_center[1][0][11] = 0

 4394 02:02:22.582629  tx_first_pass[1][0][11] =  0

 4395 02:02:22.586110  tx_last_pass[1][0][11] =	0

 4396 02:02:22.586185  tx_win_center[1][0][12] = 0

 4397 02:02:22.589657  tx_first_pass[1][0][12] =  0

 4398 02:02:22.593145  tx_last_pass[1][0][12] =	0

 4399 02:02:22.596585  tx_win_center[1][0][13] = 0

 4400 02:02:22.596733  tx_first_pass[1][0][13] =  0

 4401 02:02:22.599456  tx_last_pass[1][0][13] =	0

 4402 02:02:22.602481  tx_win_center[1][0][14] = 0

 4403 02:02:22.606136  tx_first_pass[1][0][14] =  0

 4404 02:02:22.606249  tx_last_pass[1][0][14] =	0

 4405 02:02:22.609461  tx_win_center[1][0][15] = 0

 4406 02:02:22.612485  tx_first_pass[1][0][15] =  0

 4407 02:02:22.615971  tx_last_pass[1][0][15] =	0

 4408 02:02:22.616146  tx_win_center[1][1][0] = 0

 4409 02:02:22.619864  tx_first_pass[1][1][0] =  0

 4410 02:02:22.623105  tx_last_pass[1][1][0] =	0

 4411 02:02:22.626151  tx_win_center[1][1][1] = 0

 4412 02:02:22.626324  tx_first_pass[1][1][1] =  0

 4413 02:02:22.629873  tx_last_pass[1][1][1] =	0

 4414 02:02:22.633159  tx_win_center[1][1][2] = 0

 4415 02:02:22.636352  tx_first_pass[1][1][2] =  0

 4416 02:02:22.636650  tx_last_pass[1][1][2] =	0

 4417 02:02:22.639810  tx_win_center[1][1][3] = 0

 4418 02:02:22.642995  tx_first_pass[1][1][3] =  0

 4419 02:02:22.643271  tx_last_pass[1][1][3] =	0

 4420 02:02:22.646270  tx_win_center[1][1][4] = 0

 4421 02:02:22.649684  tx_first_pass[1][1][4] =  0

 4422 02:02:22.653293  tx_last_pass[1][1][4] =	0

 4423 02:02:22.653723  tx_win_center[1][1][5] = 0

 4424 02:02:22.656577  tx_first_pass[1][1][5] =  0

 4425 02:02:22.659830  tx_last_pass[1][1][5] =	0

 4426 02:02:22.660259  tx_win_center[1][1][6] = 0

 4427 02:02:22.663122  tx_first_pass[1][1][6] =  0

 4428 02:02:22.666477  tx_last_pass[1][1][6] =	0

 4429 02:02:22.669686  tx_win_center[1][1][7] = 0

 4430 02:02:22.670116  tx_first_pass[1][1][7] =  0

 4431 02:02:22.672837  tx_last_pass[1][1][7] =	0

 4432 02:02:22.676691  tx_win_center[1][1][8] = 0

 4433 02:02:22.680052  tx_first_pass[1][1][8] =  0

 4434 02:02:22.680483  tx_last_pass[1][1][8] =	0

 4435 02:02:22.683394  tx_win_center[1][1][9] = 0

 4436 02:02:22.686541  tx_first_pass[1][1][9] =  0

 4437 02:02:22.686976  tx_last_pass[1][1][9] =	0

 4438 02:02:22.689687  tx_win_center[1][1][10] = 0

 4439 02:02:22.693202  tx_first_pass[1][1][10] =  0

 4440 02:02:22.696737  tx_last_pass[1][1][10] =	0

 4441 02:02:22.697166  tx_win_center[1][1][11] = 0

 4442 02:02:22.699976  tx_first_pass[1][1][11] =  0

 4443 02:02:22.703453  tx_last_pass[1][1][11] =	0

 4444 02:02:22.706707  tx_win_center[1][1][12] = 0

 4445 02:02:22.707141  tx_first_pass[1][1][12] =  0

 4446 02:02:22.709989  tx_last_pass[1][1][12] =	0

 4447 02:02:22.713130  tx_win_center[1][1][13] = 0

 4448 02:02:22.716880  tx_first_pass[1][1][13] =  0

 4449 02:02:22.717305  tx_last_pass[1][1][13] =	0

 4450 02:02:22.720243  tx_win_center[1][1][14] = 0

 4451 02:02:22.723989  tx_first_pass[1][1][14] =  0

 4452 02:02:22.726810  tx_last_pass[1][1][14] =	0

 4453 02:02:22.727244  tx_win_center[1][1][15] = 0

 4454 02:02:22.730010  tx_first_pass[1][1][15] =  0

 4455 02:02:22.733402  tx_last_pass[1][1][15] =	0

 4456 02:02:22.733832  dump params rx window

 4457 02:02:22.737190  rx_firspass[0][0][0] = 0

 4458 02:02:22.740311  rx_lastpass[0][0][0] =  0

 4459 02:02:22.740815  rx_firspass[0][0][1] = 0

 4460 02:02:22.743368  rx_lastpass[0][0][1] =  0

 4461 02:02:22.746929  rx_firspass[0][0][2] = 0

 4462 02:02:22.750421  rx_lastpass[0][0][2] =  0

 4463 02:02:22.750920  rx_firspass[0][0][3] = 0

 4464 02:02:22.753758  rx_lastpass[0][0][3] =  0

 4465 02:02:22.756631  rx_firspass[0][0][4] = 0

 4466 02:02:22.757058  rx_lastpass[0][0][4] =  0

 4467 02:02:22.760331  rx_firspass[0][0][5] = 0

 4468 02:02:22.763474  rx_lastpass[0][0][5] =  0

 4469 02:02:22.763981  rx_firspass[0][0][6] = 0

 4470 02:02:22.766805  rx_lastpass[0][0][6] =  0

 4471 02:02:22.770268  rx_firspass[0][0][7] = 0

 4472 02:02:22.770772  rx_lastpass[0][0][7] =  0

 4473 02:02:22.773515  rx_firspass[0][0][8] = 0

 4474 02:02:22.776710  rx_lastpass[0][0][8] =  0

 4475 02:02:22.777141  rx_firspass[0][0][9] = 0

 4476 02:02:22.779882  rx_lastpass[0][0][9] =  0

 4477 02:02:22.783424  rx_firspass[0][0][10] = 0

 4478 02:02:22.786810  rx_lastpass[0][0][10] =  0

 4479 02:02:22.787238  rx_firspass[0][0][11] = 0

 4480 02:02:22.790359  rx_lastpass[0][0][11] =  0

 4481 02:02:22.793334  rx_firspass[0][0][12] = 0

 4482 02:02:22.793835  rx_lastpass[0][0][12] =  0

 4483 02:02:22.796860  rx_firspass[0][0][13] = 0

 4484 02:02:22.800267  rx_lastpass[0][0][13] =  0

 4485 02:02:22.800846  rx_firspass[0][0][14] = 0

 4486 02:02:22.803643  rx_lastpass[0][0][14] =  0

 4487 02:02:22.806632  rx_firspass[0][0][15] = 0

 4488 02:02:22.810132  rx_lastpass[0][0][15] =  0

 4489 02:02:22.810664  rx_firspass[0][1][0] = 0

 4490 02:02:22.813865  rx_lastpass[0][1][0] =  0

 4491 02:02:22.817211  rx_firspass[0][1][1] = 0

 4492 02:02:22.817665  rx_lastpass[0][1][1] =  0

 4493 02:02:22.820230  rx_firspass[0][1][2] = 0

 4494 02:02:22.823587  rx_lastpass[0][1][2] =  0

 4495 02:02:22.824019  rx_firspass[0][1][3] = 0

 4496 02:02:22.827099  rx_lastpass[0][1][3] =  0

 4497 02:02:22.830274  rx_firspass[0][1][4] = 0

 4498 02:02:22.830706  rx_lastpass[0][1][4] =  0

 4499 02:02:22.833859  rx_firspass[0][1][5] = 0

 4500 02:02:22.836989  rx_lastpass[0][1][5] =  0

 4501 02:02:22.837420  rx_firspass[0][1][6] = 0

 4502 02:02:22.840311  rx_lastpass[0][1][6] =  0

 4503 02:02:22.843542  rx_firspass[0][1][7] = 0

 4504 02:02:22.846785  rx_lastpass[0][1][7] =  0

 4505 02:02:22.847213  rx_firspass[0][1][8] = 0

 4506 02:02:22.850428  rx_lastpass[0][1][8] =  0

 4507 02:02:22.853957  rx_firspass[0][1][9] = 0

 4508 02:02:22.854521  rx_lastpass[0][1][9] =  0

 4509 02:02:22.857449  rx_firspass[0][1][10] = 0

 4510 02:02:22.861286  rx_lastpass[0][1][10] =  0

 4511 02:02:22.861834  rx_firspass[0][1][11] = 0

 4512 02:02:22.863627  rx_lastpass[0][1][11] =  0

 4513 02:02:22.867154  rx_firspass[0][1][12] = 0

 4514 02:02:22.867583  rx_lastpass[0][1][12] =  0

 4515 02:02:22.870278  rx_firspass[0][1][13] = 0

 4516 02:02:22.873811  rx_lastpass[0][1][13] =  0

 4517 02:02:22.876951  rx_firspass[0][1][14] = 0

 4518 02:02:22.877378  rx_lastpass[0][1][14] =  0

 4519 02:02:22.880206  rx_firspass[0][1][15] = 0

 4520 02:02:22.883800  rx_lastpass[0][1][15] =  0

 4521 02:02:22.884230  rx_firspass[1][0][0] = 0

 4522 02:02:22.886883  rx_lastpass[1][0][0] =  0

 4523 02:02:22.890186  rx_firspass[1][0][1] = 0

 4524 02:02:22.893793  rx_lastpass[1][0][1] =  0

 4525 02:02:22.894256  rx_firspass[1][0][2] = 0

 4526 02:02:22.897213  rx_lastpass[1][0][2] =  0

 4527 02:02:22.900695  rx_firspass[1][0][3] = 0

 4528 02:02:22.901122  rx_lastpass[1][0][3] =  0

 4529 02:02:22.904092  rx_firspass[1][0][4] = 0

 4530 02:02:22.907018  rx_lastpass[1][0][4] =  0

 4531 02:02:22.907444  rx_firspass[1][0][5] = 0

 4532 02:02:22.910261  rx_lastpass[1][0][5] =  0

 4533 02:02:22.914019  rx_firspass[1][0][6] = 0

 4534 02:02:22.914786  rx_lastpass[1][0][6] =  0

 4535 02:02:22.917201  rx_firspass[1][0][7] = 0

 4536 02:02:22.920449  rx_lastpass[1][0][7] =  0

 4537 02:02:22.920884  rx_firspass[1][0][8] = 0

 4538 02:02:22.923852  rx_lastpass[1][0][8] =  0

 4539 02:02:22.926974  rx_firspass[1][0][9] = 0

 4540 02:02:22.927477  rx_lastpass[1][0][9] =  0

 4541 02:02:22.930286  rx_firspass[1][0][10] = 0

 4542 02:02:22.933751  rx_lastpass[1][0][10] =  0

 4543 02:02:22.937126  rx_firspass[1][0][11] = 0

 4544 02:02:22.937605  rx_lastpass[1][0][11] =  0

 4545 02:02:22.940588  rx_firspass[1][0][12] = 0

 4546 02:02:22.943891  rx_lastpass[1][0][12] =  0

 4547 02:02:22.944339  rx_firspass[1][0][13] = 0

 4548 02:02:22.947056  rx_lastpass[1][0][13] =  0

 4549 02:02:22.950750  rx_firspass[1][0][14] = 0

 4550 02:02:22.951181  rx_lastpass[1][0][14] =  0

 4551 02:02:22.953965  rx_firspass[1][0][15] = 0

 4552 02:02:22.957473  rx_lastpass[1][0][15] =  0

 4553 02:02:22.960757  rx_firspass[1][1][0] = 0

 4554 02:02:22.960832  rx_lastpass[1][1][0] =  0

 4555 02:02:22.963448  rx_firspass[1][1][1] = 0

 4556 02:02:22.966686  rx_lastpass[1][1][1] =  0

 4557 02:02:22.966761  rx_firspass[1][1][2] = 0

 4558 02:02:22.970301  rx_lastpass[1][1][2] =  0

 4559 02:02:22.973835  rx_firspass[1][1][3] = 0

 4560 02:02:22.973910  rx_lastpass[1][1][3] =  0

 4561 02:02:22.976946  rx_firspass[1][1][4] = 0

 4562 02:02:22.980447  rx_lastpass[1][1][4] =  0

 4563 02:02:22.980534  rx_firspass[1][1][5] = 0

 4564 02:02:22.983782  rx_lastpass[1][1][5] =  0

 4565 02:02:22.986964  rx_firspass[1][1][6] = 0

 4566 02:02:22.987058  rx_lastpass[1][1][6] =  0

 4567 02:02:22.990012  rx_firspass[1][1][7] = 0

 4568 02:02:22.993986  rx_lastpass[1][1][7] =  0

 4569 02:02:22.996952  rx_firspass[1][1][8] = 0

 4570 02:02:22.997067  rx_lastpass[1][1][8] =  0

 4571 02:02:23.000451  rx_firspass[1][1][9] = 0

 4572 02:02:23.003516  rx_lastpass[1][1][9] =  0

 4573 02:02:23.003641  rx_firspass[1][1][10] = 0

 4574 02:02:23.007114  rx_lastpass[1][1][10] =  0

 4575 02:02:23.010688  rx_firspass[1][1][11] = 0

 4576 02:02:23.011076  rx_lastpass[1][1][11] =  0

 4577 02:02:23.014249  rx_firspass[1][1][12] = 0

 4578 02:02:23.017238  rx_lastpass[1][1][12] =  0

 4579 02:02:23.020705  rx_firspass[1][1][13] = 0

 4580 02:02:23.021091  rx_lastpass[1][1][13] =  0

 4581 02:02:23.023893  rx_firspass[1][1][14] = 0

 4582 02:02:23.027303  rx_lastpass[1][1][14] =  0

 4583 02:02:23.027690  rx_firspass[1][1][15] = 0

 4584 02:02:23.030633  rx_lastpass[1][1][15] =  0

 4585 02:02:23.033867  dump params clk_delay

 4586 02:02:23.034281  clk_delay[0] = 0

 4587 02:02:23.037520  clk_delay[1] = 0

 4588 02:02:23.038028  dump params dqs_delay

 4589 02:02:23.040560  dqs_delay[0][0] = 0

 4590 02:02:23.040946  dqs_delay[0][1] = 0

 4591 02:02:23.044079  dqs_delay[1][0] = 0

 4592 02:02:23.044488  dqs_delay[1][1] = 0

 4593 02:02:23.047617  dump params delay_cell_unit = 762

 4594 02:02:23.051042  dump source = 0x0

 4595 02:02:23.051429  dump params frequency:800

 4596 02:02:23.054040  dump params rank number:2

 4597 02:02:23.054454  

 4598 02:02:23.057343   dump params write leveling

 4599 02:02:23.060713  write leveling[0][0][0] = 0x0

 4600 02:02:23.064457  write leveling[0][0][1] = 0x0

 4601 02:02:23.065011  write leveling[0][1][0] = 0x0

 4602 02:02:23.067994  write leveling[0][1][1] = 0x0

 4603 02:02:23.070947  write leveling[1][0][0] = 0x0

 4604 02:02:23.074382  write leveling[1][0][1] = 0x0

 4605 02:02:23.077900  write leveling[1][1][0] = 0x0

 4606 02:02:23.078323  write leveling[1][1][1] = 0x0

 4607 02:02:23.081124  dump params cbt_cs

 4608 02:02:23.081508  cbt_cs[0][0] = 0x0

 4609 02:02:23.084908  cbt_cs[0][1] = 0x0

 4610 02:02:23.085295  cbt_cs[1][0] = 0x0

 4611 02:02:23.087730  cbt_cs[1][1] = 0x0

 4612 02:02:23.088117  dump params cbt_mr12

 4613 02:02:23.091021  cbt_mr12[0][0] = 0x0

 4614 02:02:23.094683  cbt_mr12[0][1] = 0x0

 4615 02:02:23.095069  cbt_mr12[1][0] = 0x0

 4616 02:02:23.098091  cbt_mr12[1][1] = 0x0

 4617 02:02:23.098529  dump params tx window

 4618 02:02:23.101286  tx_center_min[0][0][0] = 0

 4619 02:02:23.104904  tx_center_max[0][0][0] =  0

 4620 02:02:23.105348  tx_center_min[0][0][1] = 0

 4621 02:02:23.107992  tx_center_max[0][0][1] =  0

 4622 02:02:23.111686  tx_center_min[0][1][0] = 0

 4623 02:02:23.114690  tx_center_max[0][1][0] =  0

 4624 02:02:23.115173  tx_center_min[0][1][1] = 0

 4625 02:02:23.117943  tx_center_max[0][1][1] =  0

 4626 02:02:23.120911  tx_center_min[1][0][0] = 0

 4627 02:02:23.124339  tx_center_max[1][0][0] =  0

 4628 02:02:23.124790  tx_center_min[1][0][1] = 0

 4629 02:02:23.127994  tx_center_max[1][0][1] =  0

 4630 02:02:23.130952  tx_center_min[1][1][0] = 0

 4631 02:02:23.134608  tx_center_max[1][1][0] =  0

 4632 02:02:23.135037  tx_center_min[1][1][1] = 0

 4633 02:02:23.137715  tx_center_max[1][1][1] =  0

 4634 02:02:23.141278  dump params tx window

 4635 02:02:23.141709  tx_win_center[0][0][0] = 0

 4636 02:02:23.144403  tx_first_pass[0][0][0] =  0

 4637 02:02:23.147968  tx_last_pass[0][0][0] =	0

 4638 02:02:23.150965  tx_win_center[0][0][1] = 0

 4639 02:02:23.151396  tx_first_pass[0][0][1] =  0

 4640 02:02:23.154663  tx_last_pass[0][0][1] =	0

 4641 02:02:23.158186  tx_win_center[0][0][2] = 0

 4642 02:02:23.158757  tx_first_pass[0][0][2] =  0

 4643 02:02:23.161917  tx_last_pass[0][0][2] =	0

 4644 02:02:23.164531  tx_win_center[0][0][3] = 0

 4645 02:02:23.167935  tx_first_pass[0][0][3] =  0

 4646 02:02:23.168380  tx_last_pass[0][0][3] =	0

 4647 02:02:23.171618  tx_win_center[0][0][4] = 0

 4648 02:02:23.174659  tx_first_pass[0][0][4] =  0

 4649 02:02:23.175090  tx_last_pass[0][0][4] =	0

 4650 02:02:23.178305  tx_win_center[0][0][5] = 0

 4651 02:02:23.181172  tx_first_pass[0][0][5] =  0

 4652 02:02:23.185046  tx_last_pass[0][0][5] =	0

 4653 02:02:23.185507  tx_win_center[0][0][6] = 0

 4654 02:02:23.188148  tx_first_pass[0][0][6] =  0

 4655 02:02:23.191413  tx_last_pass[0][0][6] =	0

 4656 02:02:23.194521  tx_win_center[0][0][7] = 0

 4657 02:02:23.194976  tx_first_pass[0][0][7] =  0

 4658 02:02:23.198006  tx_last_pass[0][0][7] =	0

 4659 02:02:23.201258  tx_win_center[0][0][8] = 0

 4660 02:02:23.201687  tx_first_pass[0][0][8] =  0

 4661 02:02:23.205028  tx_last_pass[0][0][8] =	0

 4662 02:02:23.207762  tx_win_center[0][0][9] = 0

 4663 02:02:23.211706  tx_first_pass[0][0][9] =  0

 4664 02:02:23.212214  tx_last_pass[0][0][9] =	0

 4665 02:02:23.214540  tx_win_center[0][0][10] = 0

 4666 02:02:23.217884  tx_first_pass[0][0][10] =  0

 4667 02:02:23.221268  tx_last_pass[0][0][10] =	0

 4668 02:02:23.221766  tx_win_center[0][0][11] = 0

 4669 02:02:23.224630  tx_first_pass[0][0][11] =  0

 4670 02:02:23.228206  tx_last_pass[0][0][11] =	0

 4671 02:02:23.231002  tx_win_center[0][0][12] = 0

 4672 02:02:23.231455  tx_first_pass[0][0][12] =  0

 4673 02:02:23.234325  tx_last_pass[0][0][12] =	0

 4674 02:02:23.237892  tx_win_center[0][0][13] = 0

 4675 02:02:23.241179  tx_first_pass[0][0][13] =  0

 4676 02:02:23.241782  tx_last_pass[0][0][13] =	0

 4677 02:02:23.244636  tx_win_center[0][0][14] = 0

 4678 02:02:23.247996  tx_first_pass[0][0][14] =  0

 4679 02:02:23.251139  tx_last_pass[0][0][14] =	0

 4680 02:02:23.251567  tx_win_center[0][0][15] = 0

 4681 02:02:23.254528  tx_first_pass[0][0][15] =  0

 4682 02:02:23.257794  tx_last_pass[0][0][15] =	0

 4683 02:02:23.261691  tx_win_center[0][1][0] = 0

 4684 02:02:23.262118  tx_first_pass[0][1][0] =  0

 4685 02:02:23.264641  tx_last_pass[0][1][0] =	0

 4686 02:02:23.268069  tx_win_center[0][1][1] = 0

 4687 02:02:23.268653  tx_first_pass[0][1][1] =  0

 4688 02:02:23.271320  tx_last_pass[0][1][1] =	0

 4689 02:02:23.274870  tx_win_center[0][1][2] = 0

 4690 02:02:23.277967  tx_first_pass[0][1][2] =  0

 4691 02:02:23.278397  tx_last_pass[0][1][2] =	0

 4692 02:02:23.281477  tx_win_center[0][1][3] = 0

 4693 02:02:23.284617  tx_first_pass[0][1][3] =  0

 4694 02:02:23.285005  tx_last_pass[0][1][3] =	0

 4695 02:02:23.288009  tx_win_center[0][1][4] = 0

 4696 02:02:23.291332  tx_first_pass[0][1][4] =  0

 4697 02:02:23.294771  tx_last_pass[0][1][4] =	0

 4698 02:02:23.295160  tx_win_center[0][1][5] = 0

 4699 02:02:23.297894  tx_first_pass[0][1][5] =  0

 4700 02:02:23.301485  tx_last_pass[0][1][5] =	0

 4701 02:02:23.304803  tx_win_center[0][1][6] = 0

 4702 02:02:23.305267  tx_first_pass[0][1][6] =  0

 4703 02:02:23.307919  tx_last_pass[0][1][6] =	0

 4704 02:02:23.311698  tx_win_center[0][1][7] = 0

 4705 02:02:23.312205  tx_first_pass[0][1][7] =  0

 4706 02:02:23.314897  tx_last_pass[0][1][7] =	0

 4707 02:02:23.318724  tx_win_center[0][1][8] = 0

 4708 02:02:23.321553  tx_first_pass[0][1][8] =  0

 4709 02:02:23.322071  tx_last_pass[0][1][8] =	0

 4710 02:02:23.324683  tx_win_center[0][1][9] = 0

 4711 02:02:23.328670  tx_first_pass[0][1][9] =  0

 4712 02:02:23.329141  tx_last_pass[0][1][9] =	0

 4713 02:02:23.331591  tx_win_center[0][1][10] = 0

 4714 02:02:23.335016  tx_first_pass[0][1][10] =  0

 4715 02:02:23.338326  tx_last_pass[0][1][10] =	0

 4716 02:02:23.338796  tx_win_center[0][1][11] = 0

 4717 02:02:23.341352  tx_first_pass[0][1][11] =  0

 4718 02:02:23.344658  tx_last_pass[0][1][11] =	0

 4719 02:02:23.347967  tx_win_center[0][1][12] = 0

 4720 02:02:23.351545  tx_first_pass[0][1][12] =  0

 4721 02:02:23.351938  tx_last_pass[0][1][12] =	0

 4722 02:02:23.354713  tx_win_center[0][1][13] = 0

 4723 02:02:23.358167  tx_first_pass[0][1][13] =  0

 4724 02:02:23.358595  tx_last_pass[0][1][13] =	0

 4725 02:02:23.361422  tx_win_center[0][1][14] = 0

 4726 02:02:23.365154  tx_first_pass[0][1][14] =  0

 4727 02:02:23.368585  tx_last_pass[0][1][14] =	0

 4728 02:02:23.369112  tx_win_center[0][1][15] = 0

 4729 02:02:23.371714  tx_first_pass[0][1][15] =  0

 4730 02:02:23.375763  tx_last_pass[0][1][15] =	0

 4731 02:02:23.378061  tx_win_center[1][0][0] = 0

 4732 02:02:23.378527  tx_first_pass[1][0][0] =  0

 4733 02:02:23.381669  tx_last_pass[1][0][0] =	0

 4734 02:02:23.384775  tx_win_center[1][0][1] = 0

 4735 02:02:23.388506  tx_first_pass[1][0][1] =  0

 4736 02:02:23.388938  tx_last_pass[1][0][1] =	0

 4737 02:02:23.391282  tx_win_center[1][0][2] = 0

 4738 02:02:23.394647  tx_first_pass[1][0][2] =  0

 4739 02:02:23.395086  tx_last_pass[1][0][2] =	0

 4740 02:02:23.398328  tx_win_center[1][0][3] = 0

 4741 02:02:23.401714  tx_first_pass[1][0][3] =  0

 4742 02:02:23.404849  tx_last_pass[1][0][3] =	0

 4743 02:02:23.405281  tx_win_center[1][0][4] = 0

 4744 02:02:23.408498  tx_first_pass[1][0][4] =  0

 4745 02:02:23.411698  tx_last_pass[1][0][4] =	0

 4746 02:02:23.414784  tx_win_center[1][0][5] = 0

 4747 02:02:23.415216  tx_first_pass[1][0][5] =  0

 4748 02:02:23.418403  tx_last_pass[1][0][5] =	0

 4749 02:02:23.421507  tx_win_center[1][0][6] = 0

 4750 02:02:23.421982  tx_first_pass[1][0][6] =  0

 4751 02:02:23.424809  tx_last_pass[1][0][6] =	0

 4752 02:02:23.428558  tx_win_center[1][0][7] = 0

 4753 02:02:23.431639  tx_first_pass[1][0][7] =  0

 4754 02:02:23.432077  tx_last_pass[1][0][7] =	0

 4755 02:02:23.434743  tx_win_center[1][0][8] = 0

 4756 02:02:23.438544  tx_first_pass[1][0][8] =  0

 4757 02:02:23.441822  tx_last_pass[1][0][8] =	0

 4758 02:02:23.442306  tx_win_center[1][0][9] = 0

 4759 02:02:23.445111  tx_first_pass[1][0][9] =  0

 4760 02:02:23.448034  tx_last_pass[1][0][9] =	0

 4761 02:02:23.448468  tx_win_center[1][0][10] = 0

 4762 02:02:23.451402  tx_first_pass[1][0][10] =  0

 4763 02:02:23.454870  tx_last_pass[1][0][10] =	0

 4764 02:02:23.457982  tx_win_center[1][0][11] = 0

 4765 02:02:23.458462  tx_first_pass[1][0][11] =  0

 4766 02:02:23.461704  tx_last_pass[1][0][11] =	0

 4767 02:02:23.465038  tx_win_center[1][0][12] = 0

 4768 02:02:23.468441  tx_first_pass[1][0][12] =  0

 4769 02:02:23.468949  tx_last_pass[1][0][12] =	0

 4770 02:02:23.471406  tx_win_center[1][0][13] = 0

 4771 02:02:23.474930  tx_first_pass[1][0][13] =  0

 4772 02:02:23.478255  tx_last_pass[1][0][13] =	0

 4773 02:02:23.478636  tx_win_center[1][0][14] = 0

 4774 02:02:23.481937  tx_first_pass[1][0][14] =  0

 4775 02:02:23.485055  tx_last_pass[1][0][14] =	0

 4776 02:02:23.488664  tx_win_center[1][0][15] = 0

 4777 02:02:23.489168  tx_first_pass[1][0][15] =  0

 4778 02:02:23.491743  tx_last_pass[1][0][15] =	0

 4779 02:02:23.494917  tx_win_center[1][1][0] = 0

 4780 02:02:23.498830  tx_first_pass[1][1][0] =  0

 4781 02:02:23.499260  tx_last_pass[1][1][0] =	0

 4782 02:02:23.501744  tx_win_center[1][1][1] = 0

 4783 02:02:23.504909  tx_first_pass[1][1][1] =  0

 4784 02:02:23.508152  tx_last_pass[1][1][1] =	0

 4785 02:02:23.508584  tx_win_center[1][1][2] = 0

 4786 02:02:23.511738  tx_first_pass[1][1][2] =  0

 4787 02:02:23.515335  tx_last_pass[1][1][2] =	0

 4788 02:02:23.515765  tx_win_center[1][1][3] = 0

 4789 02:02:23.518325  tx_first_pass[1][1][3] =  0

 4790 02:02:23.521796  tx_last_pass[1][1][3] =	0

 4791 02:02:23.525109  tx_win_center[1][1][4] = 0

 4792 02:02:23.525536  tx_first_pass[1][1][4] =  0

 4793 02:02:23.528310  tx_last_pass[1][1][4] =	0

 4794 02:02:23.531988  tx_win_center[1][1][5] = 0

 4795 02:02:23.532496  tx_first_pass[1][1][5] =  0

 4796 02:02:23.535358  tx_last_pass[1][1][5] =	0

 4797 02:02:23.538447  tx_win_center[1][1][6] = 0

 4798 02:02:23.541750  tx_first_pass[1][1][6] =  0

 4799 02:02:23.542315  tx_last_pass[1][1][6] =	0

 4800 02:02:23.545091  tx_win_center[1][1][7] = 0

 4801 02:02:23.548500  tx_first_pass[1][1][7] =  0

 4802 02:02:23.549045  tx_last_pass[1][1][7] =	0

 4803 02:02:23.552131  tx_win_center[1][1][8] = 0

 4804 02:02:23.555720  tx_first_pass[1][1][8] =  0

 4805 02:02:23.558890  tx_last_pass[1][1][8] =	0

 4806 02:02:23.559402  tx_win_center[1][1][9] = 0

 4807 02:02:23.562011  tx_first_pass[1][1][9] =  0

 4808 02:02:23.565498  tx_last_pass[1][1][9] =	0

 4809 02:02:23.568858  tx_win_center[1][1][10] = 0

 4810 02:02:23.569367  tx_first_pass[1][1][10] =  0

 4811 02:02:23.572368  tx_last_pass[1][1][10] =	0

 4812 02:02:23.575177  tx_win_center[1][1][11] = 0

 4813 02:02:23.578659  tx_first_pass[1][1][11] =  0

 4814 02:02:23.579166  tx_last_pass[1][1][11] =	0

 4815 02:02:23.581615  tx_win_center[1][1][12] = 0

 4816 02:02:23.585460  tx_first_pass[1][1][12] =  0

 4817 02:02:23.588337  tx_last_pass[1][1][12] =	0

 4818 02:02:23.588774  tx_win_center[1][1][13] = 0

 4819 02:02:23.591596  tx_first_pass[1][1][13] =  0

 4820 02:02:23.594872  tx_last_pass[1][1][13] =	0

 4821 02:02:23.598321  tx_win_center[1][1][14] = 0

 4822 02:02:23.598753  tx_first_pass[1][1][14] =  0

 4823 02:02:23.602204  tx_last_pass[1][1][14] =	0

 4824 02:02:23.605177  tx_win_center[1][1][15] = 0

 4825 02:02:23.608332  tx_first_pass[1][1][15] =  0

 4826 02:02:23.608761  tx_last_pass[1][1][15] =	0

 4827 02:02:23.611852  dump params rx window

 4828 02:02:23.615063  rx_firspass[0][0][0] = 0

 4829 02:02:23.615570  rx_lastpass[0][0][0] =  0

 4830 02:02:23.618649  rx_firspass[0][0][1] = 0

 4831 02:02:23.622103  rx_lastpass[0][0][1] =  0

 4832 02:02:23.622700  rx_firspass[0][0][2] = 0

 4833 02:02:23.625454  rx_lastpass[0][0][2] =  0

 4834 02:02:23.628485  rx_firspass[0][0][3] = 0

 4835 02:02:23.629001  rx_lastpass[0][0][3] =  0

 4836 02:02:23.631528  rx_firspass[0][0][4] = 0

 4837 02:02:23.634825  rx_lastpass[0][0][4] =  0

 4838 02:02:23.635254  rx_firspass[0][0][5] = 0

 4839 02:02:23.638163  rx_lastpass[0][0][5] =  0

 4840 02:02:23.641388  rx_firspass[0][0][6] = 0

 4841 02:02:23.644578  rx_lastpass[0][0][6] =  0

 4842 02:02:23.645007  rx_firspass[0][0][7] = 0

 4843 02:02:23.648485  rx_lastpass[0][0][7] =  0

 4844 02:02:23.651352  rx_firspass[0][0][8] = 0

 4845 02:02:23.651782  rx_lastpass[0][0][8] =  0

 4846 02:02:23.654787  rx_firspass[0][0][9] = 0

 4847 02:02:23.658260  rx_lastpass[0][0][9] =  0

 4848 02:02:23.658690  rx_firspass[0][0][10] = 0

 4849 02:02:23.661481  rx_lastpass[0][0][10] =  0

 4850 02:02:23.664913  rx_firspass[0][0][11] = 0

 4851 02:02:23.668242  rx_lastpass[0][0][11] =  0

 4852 02:02:23.668670  rx_firspass[0][0][12] = 0

 4853 02:02:23.671516  rx_lastpass[0][0][12] =  0

 4854 02:02:23.675115  rx_firspass[0][0][13] = 0

 4855 02:02:23.675543  rx_lastpass[0][0][13] =  0

 4856 02:02:23.678359  rx_firspass[0][0][14] = 0

 4857 02:02:23.681906  rx_lastpass[0][0][14] =  0

 4858 02:02:23.682373  rx_firspass[0][0][15] = 0

 4859 02:02:23.684924  rx_lastpass[0][0][15] =  0

 4860 02:02:23.688228  rx_firspass[0][1][0] = 0

 4861 02:02:23.692129  rx_lastpass[0][1][0] =  0

 4862 02:02:23.692556  rx_firspass[0][1][1] = 0

 4863 02:02:23.694891  rx_lastpass[0][1][1] =  0

 4864 02:02:23.698165  rx_firspass[0][1][2] = 0

 4865 02:02:23.698624  rx_lastpass[0][1][2] =  0

 4866 02:02:23.701746  rx_firspass[0][1][3] = 0

 4867 02:02:23.704986  rx_lastpass[0][1][3] =  0

 4868 02:02:23.705415  rx_firspass[0][1][4] = 0

 4869 02:02:23.708119  rx_lastpass[0][1][4] =  0

 4870 02:02:23.711705  rx_firspass[0][1][5] = 0

 4871 02:02:23.712371  rx_lastpass[0][1][5] =  0

 4872 02:02:23.715368  rx_firspass[0][1][6] = 0

 4873 02:02:23.718568  rx_lastpass[0][1][6] =  0

 4874 02:02:23.719365  rx_firspass[0][1][7] = 0

 4875 02:02:23.721839  rx_lastpass[0][1][7] =  0

 4876 02:02:23.725643  rx_firspass[0][1][8] = 0

 4877 02:02:23.726161  rx_lastpass[0][1][8] =  0

 4878 02:02:23.728744  rx_firspass[0][1][9] = 0

 4879 02:02:23.731659  rx_lastpass[0][1][9] =  0

 4880 02:02:23.735406  rx_firspass[0][1][10] = 0

 4881 02:02:23.735926  rx_lastpass[0][1][10] =  0

 4882 02:02:23.738359  rx_firspass[0][1][11] = 0

 4883 02:02:23.741527  rx_lastpass[0][1][11] =  0

 4884 02:02:23.741959  rx_firspass[0][1][12] = 0

 4885 02:02:23.745231  rx_lastpass[0][1][12] =  0

 4886 02:02:23.748636  rx_firspass[0][1][13] = 0

 4887 02:02:23.752080  rx_lastpass[0][1][13] =  0

 4888 02:02:23.752518  rx_firspass[0][1][14] = 0

 4889 02:02:23.755357  rx_lastpass[0][1][14] =  0

 4890 02:02:23.758202  rx_firspass[0][1][15] = 0

 4891 02:02:23.758662  rx_lastpass[0][1][15] =  0

 4892 02:02:23.761925  rx_firspass[1][0][0] = 0

 4893 02:02:23.765293  rx_lastpass[1][0][0] =  0

 4894 02:02:23.765811  rx_firspass[1][0][1] = 0

 4895 02:02:23.768958  rx_lastpass[1][0][1] =  0

 4896 02:02:23.771845  rx_firspass[1][0][2] = 0

 4897 02:02:23.772282  rx_lastpass[1][0][2] =  0

 4898 02:02:23.774935  rx_firspass[1][0][3] = 0

 4899 02:02:23.778475  rx_lastpass[1][0][3] =  0

 4900 02:02:23.781730  rx_firspass[1][0][4] = 0

 4901 02:02:23.782270  rx_lastpass[1][0][4] =  0

 4902 02:02:23.785329  rx_firspass[1][0][5] = 0

 4903 02:02:23.788450  rx_lastpass[1][0][5] =  0

 4904 02:02:23.788886  rx_firspass[1][0][6] = 0

 4905 02:02:23.791954  rx_lastpass[1][0][6] =  0

 4906 02:02:23.794975  rx_firspass[1][0][7] = 0

 4907 02:02:23.795423  rx_lastpass[1][0][7] =  0

 4908 02:02:23.798375  rx_firspass[1][0][8] = 0

 4909 02:02:23.802002  rx_lastpass[1][0][8] =  0

 4910 02:02:23.802611  rx_firspass[1][0][9] = 0

 4911 02:02:23.805679  rx_lastpass[1][0][9] =  0

 4912 02:02:23.808211  rx_firspass[1][0][10] = 0

 4913 02:02:23.811893  rx_lastpass[1][0][10] =  0

 4914 02:02:23.812325  rx_firspass[1][0][11] = 0

 4915 02:02:23.815608  rx_lastpass[1][0][11] =  0

 4916 02:02:23.818690  rx_firspass[1][0][12] = 0

 4917 02:02:23.819201  rx_lastpass[1][0][12] =  0

 4918 02:02:23.821681  rx_firspass[1][0][13] = 0

 4919 02:02:23.825056  rx_lastpass[1][0][13] =  0

 4920 02:02:23.825487  rx_firspass[1][0][14] = 0

 4921 02:02:23.828826  rx_lastpass[1][0][14] =  0

 4922 02:02:23.831766  rx_firspass[1][0][15] = 0

 4923 02:02:23.835394  rx_lastpass[1][0][15] =  0

 4924 02:02:23.835904  rx_firspass[1][1][0] = 0

 4925 02:02:23.838602  rx_lastpass[1][1][0] =  0

 4926 02:02:23.841764  rx_firspass[1][1][1] = 0

 4927 02:02:23.842189  rx_lastpass[1][1][1] =  0

 4928 02:02:23.845388  rx_firspass[1][1][2] = 0

 4929 02:02:23.848491  rx_lastpass[1][1][2] =  0

 4930 02:02:23.849176  rx_firspass[1][1][3] = 0

 4931 02:02:23.851818  rx_lastpass[1][1][3] =  0

 4932 02:02:23.855602  rx_firspass[1][1][4] = 0

 4933 02:02:23.856112  rx_lastpass[1][1][4] =  0

 4934 02:02:23.858818  rx_firspass[1][1][5] = 0

 4935 02:02:23.862395  rx_lastpass[1][1][5] =  0

 4936 02:02:23.862906  rx_firspass[1][1][6] = 0

 4937 02:02:23.865374  rx_lastpass[1][1][6] =  0

 4938 02:02:23.868953  rx_firspass[1][1][7] = 0

 4939 02:02:23.871953  rx_lastpass[1][1][7] =  0

 4940 02:02:23.872437  rx_firspass[1][1][8] = 0

 4941 02:02:23.875407  rx_lastpass[1][1][8] =  0

 4942 02:02:23.878948  rx_firspass[1][1][9] = 0

 4943 02:02:23.879459  rx_lastpass[1][1][9] =  0

 4944 02:02:23.881976  rx_firspass[1][1][10] = 0

 4945 02:02:23.885298  rx_lastpass[1][1][10] =  0

 4946 02:02:23.885723  rx_firspass[1][1][11] = 0

 4947 02:02:23.888916  rx_lastpass[1][1][11] =  0

 4948 02:02:23.892008  rx_firspass[1][1][12] = 0

 4949 02:02:23.892439  rx_lastpass[1][1][12] =  0

 4950 02:02:23.895137  rx_firspass[1][1][13] = 0

 4951 02:02:23.898440  rx_lastpass[1][1][13] =  0

 4952 02:02:23.902043  rx_firspass[1][1][14] = 0

 4953 02:02:23.902644  rx_lastpass[1][1][14] =  0

 4954 02:02:23.905548  rx_firspass[1][1][15] = 0

 4955 02:02:23.908675  rx_lastpass[1][1][15] =  0

 4956 02:02:23.909102  dump params clk_delay

 4957 02:02:23.911882  clk_delay[0] = 0

 4958 02:02:23.912310  clk_delay[1] = 0

 4959 02:02:23.915876  dump params dqs_delay

 4960 02:02:23.916387  dqs_delay[0][0] = 0

 4961 02:02:23.918646  dqs_delay[0][1] = 0

 4962 02:02:23.919078  dqs_delay[1][0] = 0

 4963 02:02:23.921950  dqs_delay[1][1] = 0

 4964 02:02:23.925356  dump params delay_cell_unit = 762

 4965 02:02:23.929246  mt_set_emi_preloader end

 4966 02:02:23.932049  [mt_mem_init] dram size: 0x100000000, rank number: 2 

 4967 02:02:23.935669  [complex_mem_test] start addr:0x40000000, len:20480

 4968 02:02:23.973606  [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0

 4969 02:02:23.980062  [complex_mem_test] start addr:0x80000000, len:20480

 4970 02:02:24.016008  [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0

 4971 02:02:24.022254  [complex_mem_test] start addr:0xc0000000, len:20480

 4972 02:02:24.057988  [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0

 4973 02:02:24.065000  [complex_mem_test] start addr:0x56000000, len:8192

 4974 02:02:24.081592  [MEM] 1st complex R/W mem test pass (start addr:0x56000000)

 4975 02:02:24.082107  ddr_geometry:1

 4976 02:02:24.087630  [complex_mem_test] start addr:0x80000000, len:8192

 4977 02:02:24.105482  [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)

 4978 02:02:24.108722  dram_init: dram init end (result: 0)

 4979 02:02:24.115333  Successfully loaded DRAM blobs and ran DRAM calibration

 4980 02:02:24.125552  Mapping address range [0000000040000000:0000000140000000) as     cacheable | read-write | non-secure | normal

 4981 02:02:24.126065  CBMEM:

 4982 02:02:24.128801  IMD: root @ 00000000fffff000 254 entries.

 4983 02:02:24.131743  IMD: root @ 00000000ffffec00 62 entries.

 4984 02:02:24.138414  VBOOT: copying vboot_working_data (256 bytes) to CBMEM...

 4985 02:02:24.144850  out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00 

 4986 02:02:24.148050  in-header: 03 a1 00 00 08 00 00 00 

 4987 02:02:24.151506  in-data: 84 60 60 10 00 00 00 00 

 4988 02:02:24.155016  Chrome EC: clear events_b mask to 0x0000000020004000

 4989 02:02:24.162255  out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00 

 4990 02:02:24.165847  in-header: 03 fd 00 00 00 00 00 00 

 4991 02:02:24.166398  in-data: 

 4992 02:02:24.171955  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 4993 02:02:24.172538  CBFS @ 21000 size 3d4000

 4994 02:02:24.178801  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 4995 02:02:24.182109  CBFS: Locating 'fallback/ramstage'

 4996 02:02:24.185444  CBFS: Found @ offset 10d40 size d563

 4997 02:02:24.207118  read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps

 4998 02:02:24.218955  Accumulated console time in romstage 12909 ms

 4999 02:02:24.219388  

 5000 02:02:24.219714  

 5001 02:02:24.229174  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...

 5002 02:02:24.232727  ARM64: Exception handlers installed.

 5003 02:02:24.233157  ARM64: Testing exception

 5004 02:02:24.235874  ARM64: Done test exception

 5005 02:02:24.239110  FMAP: area RO_VPD found @ 3f8000 (32768 bytes)

 5006 02:02:24.242604  Manufacturer: ef

 5007 02:02:24.245974  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

 5008 02:02:24.252624  WARNING: RO_VPD is uninitialized or empty.

 5009 02:02:24.255715  FMAP: area RW_VPD found @ 550000 (16384 bytes)

 5010 02:02:24.259187  FMAP: area RW_VPD found @ 550000 (16384 bytes)

 5011 02:02:24.269167  read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps

 5012 02:02:24.272055  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

 5013 02:02:24.278797  BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0

 5014 02:02:24.279230  Enumerating buses...

 5015 02:02:24.285471  Show all devs... Before device enumeration.

 5016 02:02:24.285977  Root Device: enabled 1

 5017 02:02:24.288819  CPU_CLUSTER: 0: enabled 1

 5018 02:02:24.289245  CPU: 00: enabled 1

 5019 02:02:24.292651  Compare with tree...

 5020 02:02:24.295325  Root Device: enabled 1

 5021 02:02:24.295757   CPU_CLUSTER: 0: enabled 1

 5022 02:02:24.298747    CPU: 00: enabled 1

 5023 02:02:24.302321  Root Device scanning...

 5024 02:02:24.302755  root_dev_scan_bus for Root Device

 5025 02:02:24.305602  CPU_CLUSTER: 0 enabled

 5026 02:02:24.309410  root_dev_scan_bus for Root Device done

 5027 02:02:24.312335  scan_bus: scanning of bus Root Device took 10689 usecs

 5028 02:02:24.315663  done

 5029 02:02:24.318714  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0

 5030 02:02:24.322389  Allocating resources...

 5031 02:02:24.323101  Reading resources...

 5032 02:02:24.325712  Root Device read_resources bus 0 link: 0

 5033 02:02:24.328848  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 5034 02:02:24.332674  CPU: 00 missing read_resources

 5035 02:02:24.339091  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 5036 02:02:24.342327  Root Device read_resources bus 0 link: 0 done

 5037 02:02:24.342748  Done reading resources.

 5038 02:02:24.349087  Show resources in subtree (Root Device)...After reading.

 5039 02:02:24.352617   Root Device child on link 0 CPU_CLUSTER: 0

 5040 02:02:24.355966    CPU_CLUSTER: 0 child on link 0 CPU: 00

 5041 02:02:24.365431    CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0

 5042 02:02:24.365824     CPU: 00

 5043 02:02:24.368834  Setting resources...

 5044 02:02:24.372386  Root Device assign_resources, bus 0 link: 0

 5045 02:02:24.375538  CPU_CLUSTER: 0 missing set_resources

 5046 02:02:24.379111  Root Device assign_resources, bus 0 link: 0

 5047 02:02:24.382252  Done setting resources.

 5048 02:02:24.385479  Show resources in subtree (Root Device)...After assigning values.

 5049 02:02:24.392187   Root Device child on link 0 CPU_CLUSTER: 0

 5050 02:02:24.395720    CPU_CLUSTER: 0 child on link 0 CPU: 00

 5051 02:02:24.402309    CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0

 5052 02:02:24.405400     CPU: 00

 5053 02:02:24.405845  Done allocating resources.

 5054 02:02:24.412311  BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0

 5055 02:02:24.412717  Enabling resources...

 5056 02:02:24.415513  done.

 5057 02:02:24.419202  BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0

 5058 02:02:24.422276  Initializing devices...

 5059 02:02:24.422736  Root Device init ...

 5060 02:02:24.425734  mainboard_init: Starting display init.

 5061 02:02:24.428732  ADC[4]: Raw value=77032 ID=0

 5062 02:02:24.451819  anx7625_power_on_init: Init interface.

 5063 02:02:24.454823  anx7625_disable_pd_protocol: Disabled PD feature.

 5064 02:02:24.461660  anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.

 5065 02:02:24.518802  anx7625_start_dp_work: Secure OCM version=00

 5066 02:02:24.522034  anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91

 5067 02:02:24.538851  sp_tx_get_edid_block: EDID Block = 1

 5068 02:02:24.656065  Extracted contents:

 5069 02:02:24.659307  header:          00 ff ff ff ff ff ff 00

 5070 02:02:24.662629  serial number:   06 af 5c 14 00 00 00 00 00 1a

 5071 02:02:24.665962  version:         01 04

 5072 02:02:24.669182  basic params:    95 1a 0e 78 02

 5073 02:02:24.673059  chroma info:     99 85 95 55 56 92 28 22 50 54

 5074 02:02:24.676538  established:     00 00 00

 5075 02:02:24.682571  standard:        01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01

 5076 02:02:24.686402  descriptor 1:    ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18

 5077 02:02:24.692900  descriptor 2:    00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20

 5078 02:02:24.699286  descriptor 3:    00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20

 5079 02:02:24.706020  descriptor 4:    00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a

 5080 02:02:24.709489  extensions:      00

 5081 02:02:24.709912  checksum:        ae

 5082 02:02:24.710293  

 5083 02:02:24.712824  Manufacturer: AUO Model 145c Serial Number 0

 5084 02:02:24.716051  Made week 0 of 2016

 5085 02:02:24.716477  EDID version: 1.4

 5086 02:02:24.719367  Digital display

 5087 02:02:24.722676  6 bits per primary color channel

 5088 02:02:24.723099  DisplayPort interface

 5089 02:02:24.726483  Maximum image size: 26 cm x 14 cm

 5090 02:02:24.729510  Gamma: 220%

 5091 02:02:24.729895  Check DPMS levels

 5092 02:02:24.733412  Supported color formats: RGB 4:4:4

 5093 02:02:24.735962  First detailed timing is preferred timing

 5094 02:02:24.739400  Established timings supported:

 5095 02:02:24.742977  Standard timings supported:

 5096 02:02:24.743539  Detailed timings

 5097 02:02:24.746270  Hex of detail: ce1d56ea50001a3030204600009010000018

 5098 02:02:24.752951  Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm

 5099 02:02:24.756030                 0556 0586 05a6 0640 hborder 0

 5100 02:02:24.759565                 0300 0304 030a 031a vborder 0

 5101 02:02:24.763400                 -hsync -vsync 

 5102 02:02:24.766501  Did detailed timing

 5103 02:02:24.769528  Hex of detail: 0000000f0000000000000000000000000020

 5104 02:02:24.772805  Manufacturer-specified data, tag 15

 5105 02:02:24.776141  Hex of detail: 000000fe0041554f0a202020202020202020

 5106 02:02:24.779540  ASCII string: AUO

 5107 02:02:24.783264  Hex of detail: 000000fe004231313658414230312e34200a

 5108 02:02:24.786390  ASCII string: B116XAB01.4 

 5109 02:02:24.786855  Checksum

 5110 02:02:24.789838  Checksum: 0xae (valid)

 5111 02:02:24.792717  get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz

 5112 02:02:24.795968  DSI data_rate: 457800000 bps

 5113 02:02:24.803107  anx7625_parse_edid: set default k value to 0x3d for panel

 5114 02:02:24.806410  anx7625_parse_edid: pixelclock(76300).

 5115 02:02:24.809637   hactive(1366), hsync(32), hfp(48), hbp(154)

 5116 02:02:24.812924   vactive(768), vsync(6), vfp(4), vbp(16)

 5117 02:02:24.816819  anx7625_dsi_config: config dsi.

 5118 02:02:24.824355  anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).

 5119 02:02:24.845541  anx7625_dsi_config: success to config DSI

 5120 02:02:24.848956  anx7625_dp_start: MIPI phy setup OK.

 5121 02:02:24.851878  [SSUSB] Setting up USB HOST controller...

 5122 02:02:24.855343  [SSUSB] u3phy_ports_enable u2p:1, u3p:0

 5123 02:02:24.858691  [SSUSB] phy power-on done.

 5124 02:02:24.862692  out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00 

 5125 02:02:24.866144  in-header: 03 fc 01 00 00 00 00 00 

 5126 02:02:24.866642  in-data: 

 5127 02:02:24.869107  handle_proto3_response: EC response with error code: 1

 5128 02:02:24.872538  SPM: pcm index = 1

 5129 02:02:24.876024  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5130 02:02:24.879611  CBFS @ 21000 size 3d4000

 5131 02:02:24.886047  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5132 02:02:24.889378  CBFS: Locating 'pcm_allinone_lp4_3200.bin'

 5133 02:02:24.892949  CBFS: Found @ offset 1e7c0 size 1026

 5134 02:02:24.899317  read SPI 0x3f808 0x1026: 1273 us, 3247 KB/s, 25.976 Mbps

 5135 02:02:24.902818  SPM: binary array size = 2988

 5136 02:02:24.905776  SPM: version = pcm_allinone_v1.17.2_20180829

 5137 02:02:24.909061  SPM binary loaded in 32 msecs

 5138 02:02:24.916852  spm_kick_im_to_fetch: ptr = 000000004021eec2

 5139 02:02:24.920188  spm_kick_im_to_fetch: len = 2988

 5140 02:02:24.920654  SPM: spm_kick_pcm_to_run

 5141 02:02:24.923669  SPM: spm_kick_pcm_to_run done

 5142 02:02:24.926827  SPM: spm_init done in 52 msecs

 5143 02:02:24.929954  Root Device init finished in 505264 usecs

 5144 02:02:24.933512  CPU_CLUSTER: 0 init ...

 5145 02:02:24.940148  Mapping address range [0000000000200000:0000000000280000) as     cacheable | read-write |     secure | device

 5146 02:02:24.946835  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5147 02:02:24.947261  CBFS @ 21000 size 3d4000

 5148 02:02:24.953746  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5149 02:02:24.956861  CBFS: Locating 'sspm.bin'

 5150 02:02:24.959971  CBFS: Found @ offset 208c0 size 41cb

 5151 02:02:24.969420  read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps

 5152 02:02:24.977578  CPU_CLUSTER: 0 init finished in 42805 usecs

 5153 02:02:24.978035  Devices initialized

 5154 02:02:24.981245  Show all devs... After init.

 5155 02:02:24.984223  Root Device: enabled 1

 5156 02:02:24.984626  CPU_CLUSTER: 0: enabled 1

 5157 02:02:24.987632  CPU: 00: enabled 1

 5158 02:02:24.991005  BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0

 5159 02:02:24.994189  FMAP: area RW_ELOG found @ 558000 (4096 bytes)

 5160 02:02:24.997768  ELOG: NV offset 0x558000 size 0x1000

 5161 02:02:25.005730  read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps

 5162 02:02:25.011679  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 5163 02:02:25.015088  ELOG: Event(17) added with size 13 at 2024-06-21 02:02:25 UTC

 5164 02:02:25.018496  out: cmd=0x121: 03 db 21 01 00 00 00 00 

 5165 02:02:25.022194  in-header: 03 f7 00 00 2c 00 00 00 

 5166 02:02:25.035933  in-data: df 49 00 00 00 00 00 00 02 10 00 00 06 80 00 00 f2 0f 03 00 06 80 00 00 0f 4b 04 00 06 80 00 00 3b 04 01 00 06 80 00 00 eb fa 01 00 

 5167 02:02:25.039816  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

 5168 02:02:25.042310  in-header: 03 19 00 00 08 00 00 00 

 5169 02:02:25.045937  in-data: a2 e0 47 00 13 00 00 00 

 5170 02:02:25.048909  Chrome EC: UHEPI supported

 5171 02:02:25.055711  out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00 

 5172 02:02:25.058915  in-header: 03 e1 00 00 08 00 00 00 

 5173 02:02:25.062300  in-data: 84 20 60 10 00 00 00 00 

 5174 02:02:25.066162  FMAP: area RW_NVRAM found @ 554000 (8192 bytes)

 5175 02:02:25.072521  out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00 

 5176 02:02:25.075781  in-header: 03 e1 00 00 08 00 00 00 

 5177 02:02:25.079007  in-data: 84 20 60 10 00 00 00 00 

 5178 02:02:25.085509  ELOG: Event(A1) added with size 10 at 2024-06-21 02:02:25 UTC

 5179 02:02:25.092186  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02

 5180 02:02:25.095344  ELOG: Event(A0) added with size 9 at 2024-06-21 02:02:25 UTC

 5181 02:02:25.098564  elog_add_boot_reason: Logged dev mode boot

 5182 02:02:25.102083  Finalize devices...

 5183 02:02:25.105324  Devices finalized

 5184 02:02:25.108515  BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0

 5185 02:02:25.112102  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 5186 02:02:25.118892  ELOG: Event(91) added with size 10 at 2024-06-21 02:02:25 UTC

 5187 02:02:25.121887  Writing coreboot table at 0xffeda000

 5188 02:02:25.125245   0. 0000000000114000-000000000011efff: RAMSTAGE

 5189 02:02:25.131934   1. 0000000040000000-000000004023cfff: RAMSTAGE

 5190 02:02:25.135145   2. 000000004023d000-00000000545fffff: RAM

 5191 02:02:25.138463   3. 0000000054600000-000000005465ffff: BL31

 5192 02:02:25.142271   4. 0000000054660000-00000000ffed9fff: RAM

 5193 02:02:25.148663   5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES

 5194 02:02:25.151889   6. 0000000100000000-000000013fffffff: RAM

 5195 02:02:25.152285  Passing 5 GPIOs to payload:

 5196 02:02:25.158923              NAME |       PORT | POLARITY |     VALUE

 5197 02:02:25.162096     write protect | 0x00000096 |      low |       low

 5198 02:02:25.168565          EC in RW | 0x000000b1 |     high | undefined

 5199 02:02:25.172083      EC interrupt | 0x00000097 |      low | undefined

 5200 02:02:25.175218     TPM interrupt | 0x00000099 |     high | undefined

 5201 02:02:25.181891    speaker enable | 0x000000af |     high | undefined

 5202 02:02:25.185333  out: cmd=0x6: 03 f7 06 00 00 00 00 00 

 5203 02:02:25.188650  in-header: 03 f7 00 00 02 00 00 00 

 5204 02:02:25.189225  in-data: 04 00 

 5205 02:02:25.192298  Board ID: 4

 5206 02:02:25.195352  ADC[3]: Raw value=1041012 ID=8

 5207 02:02:25.195784  RAM code: 8

 5208 02:02:25.196116  SKU ID: 16

 5209 02:02:25.201784  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5210 02:02:25.202336  CBFS @ 21000 size 3d4000

 5211 02:02:25.208522  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5212 02:02:25.215377  Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 7f41

 5213 02:02:25.215811  coreboot table: 940 bytes.

 5214 02:02:25.218458  IMD ROOT    0. 00000000fffff000 00001000

 5215 02:02:25.225302  IMD SMALL   1. 00000000ffffe000 00001000

 5216 02:02:25.228399  CONSOLE     2. 00000000fffde000 00020000

 5217 02:02:25.231633  FMAP        3. 00000000fffdd000 0000047c

 5218 02:02:25.235230  TIME STAMP  4. 00000000fffdc000 00000910

 5219 02:02:25.238498  RAMOOPS     5. 00000000ffedc000 00100000

 5220 02:02:25.241632  COREBOOT    6. 00000000ffeda000 00002000

 5221 02:02:25.245338  IMD small region:

 5222 02:02:25.248399    IMD ROOT    0. 00000000ffffec00 00000400

 5223 02:02:25.251575    VBOOT WORK  1. 00000000ffffeb00 00000100

 5224 02:02:25.254855    EC HOSTEVENT 2. 00000000ffffeae0 00000008

 5225 02:02:25.258281    VPD         3. 00000000ffffea60 0000006c

 5226 02:02:25.261453  BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0

 5227 02:02:25.268266  out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00 

 5228 02:02:25.271746  in-header: 03 e1 00 00 08 00 00 00 

 5229 02:02:25.274863  in-data: 84 20 60 10 00 00 00 00 

 5230 02:02:25.281698  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5231 02:02:25.281907  CBFS @ 21000 size 3d4000

 5232 02:02:25.288327  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5233 02:02:25.291362  CBFS: Locating 'fallback/payload'

 5234 02:02:25.299737  CBFS: Found @ offset dc040 size 439a0

 5235 02:02:25.387709  read SPI 0xfd078 0x439a0: 84380 us, 3281 KB/s, 26.248 Mbps

 5236 02:02:25.391190  Checking segment from ROM address 0x0000000040003a00

 5237 02:02:25.397600  Checking segment from ROM address 0x0000000040003a1c

 5238 02:02:25.400763  Loading segment from ROM address 0x0000000040003a00

 5239 02:02:25.404153    code (compression=0)

 5240 02:02:25.410909    New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968

 5241 02:02:25.420891  Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968

 5242 02:02:25.424438  it's not compressed!

 5243 02:02:25.427631  [ 0x80000000, 80043968, 0x811994a0) <- 40003a38

 5244 02:02:25.434023  Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38

 5245 02:02:25.442401  Loading segment from ROM address 0x0000000040003a1c

 5246 02:02:25.445107    Entry Point 0x0000000080000000

 5247 02:02:25.445540  Loaded segments

 5248 02:02:25.451547  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0

 5249 02:02:25.454951  Jumping to boot code at 0000000080000000(00000000ffeda000)

 5250 02:02:25.465089  CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes

 5251 02:02:25.468200  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5252 02:02:25.471706  CBFS @ 21000 size 3d4000

 5253 02:02:25.478574  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5254 02:02:25.481746  CBFS: Locating 'fallback/bl31'

 5255 02:02:25.485001  CBFS: Found @ offset 36dc0 size 5820

 5256 02:02:25.495501  read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps

 5257 02:02:25.499043  Checking segment from ROM address 0x0000000040003a00

 5258 02:02:25.505568  Checking segment from ROM address 0x0000000040003a1c

 5259 02:02:25.508995  Loading segment from ROM address 0x0000000040003a00

 5260 02:02:25.512543    code (compression=1)

 5261 02:02:25.519184    New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8

 5262 02:02:25.529408  Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8

 5263 02:02:25.529799  using LZMA

 5264 02:02:25.537411  [ 0x54600000, 5460f420, 0x54629000) <- 40003a38

 5265 02:02:25.544078  Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0

 5266 02:02:25.547421  Loading segment from ROM address 0x0000000040003a1c

 5267 02:02:25.551015    Entry Point 0x0000000054601000

 5268 02:02:25.551463  Loaded segments

 5269 02:02:25.553866  NOTICE:  MT8183 bl31_setup

 5270 02:02:25.561396  NOTICE:  BL31: v2.1(debug):v2.1-806-g3addeb68c

 5271 02:02:25.564256  NOTICE:  BL31: Built : Sun Jan 30 03:25:20 UTC 2022

 5272 02:02:25.567676  INFO:    [DEVAPC] dump DEVAPC registers:

 5273 02:02:25.578496  INFO:    [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0

 5274 02:02:25.585041  INFO:    [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0

 5275 02:02:25.591174  INFO:    [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0

 5276 02:02:25.601347  INFO:    [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0

 5277 02:02:25.611086  INFO:    [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0

 5278 02:02:25.618106  INFO:    [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0

 5279 02:02:25.627705  INFO:    [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0

 5280 02:02:25.634462  INFO:    [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0

 5281 02:02:25.641220  INFO:    [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0

 5282 02:02:25.651103  INFO:    [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0

 5283 02:02:25.657614  INFO:    [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0

 5284 02:02:25.668105  INFO:    [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0

 5285 02:02:25.674665  INFO:    [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0

 5286 02:02:25.681169  INFO:    [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0

 5287 02:02:25.691166  INFO:    [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0

 5288 02:02:25.698112  INFO:    [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0

 5289 02:02:25.704293  INFO:    [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0

 5290 02:02:25.711446  INFO:    [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0

 5291 02:02:25.717839  INFO:    [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0

 5292 02:02:25.728112  INFO:    [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0

 5293 02:02:25.734384  INFO:    [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0

 5294 02:02:25.740889  INFO:    [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0

 5295 02:02:25.744478  INFO:    [DEVAPC] MAS_DOM_0 = 0x1

 5296 02:02:25.747809  INFO:    [DEVAPC] MAS_DOM_1 = 0x200

 5297 02:02:25.750832  INFO:    [DEVAPC] MAS_DOM_2 = 0x0

 5298 02:02:25.754137  INFO:    [DEVAPC] MAS_DOM_3 = 0x2000

 5299 02:02:25.757532  INFO:    [DEVAPC] MAS_SEC_0 = 0x8000000

 5300 02:02:25.764469  INFO:    [DEVAPC]  (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0

 5301 02:02:25.767838  INFO:    [DEVAPC]  (MM)MAS_DOMAIN_REMAP_0 = 0x24

 5302 02:02:25.771106  WARNING: region 0:

 5303 02:02:25.774802  WARNING: 	apc:0x168, sa:0x0, ea:0xfff

 5304 02:02:25.774878  WARNING: region 1:

 5305 02:02:25.777555  WARNING: 	apc:0x140, sa:0x1000, ea:0x128f

 5306 02:02:25.781153  WARNING: region 2:

 5307 02:02:25.784301  WARNING: 	apc:0x168, sa:0x1290, ea:0x1fff

 5308 02:02:25.787407  WARNING: region 3:

 5309 02:02:25.790770  WARNING: 	apc:0x168, sa:0x2000, ea:0xbfff

 5310 02:02:25.790878  WARNING: region 4:

 5311 02:02:25.794169  WARNING: 	apc:0x168, sa:0xc000, ea:0x1ffff

 5312 02:02:25.797404  WARNING: region 5:

 5313 02:02:25.800711  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5314 02:02:25.800814  WARNING: region 6:

 5315 02:02:25.804240  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5316 02:02:25.808286  WARNING: region 7:

 5317 02:02:25.811528  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5318 02:02:25.817671  INFO:    GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3

 5319 02:02:25.821477  INFO:    SPM: enable SPMC mode

 5320 02:02:25.824547  NOTICE:  spm_boot_init() start

 5321 02:02:25.825034  NOTICE:  spm_boot_init() end

 5322 02:02:25.831323  INFO:    BL31: Initializing runtime services

 5323 02:02:25.834566  INFO:    BL31: cortex_a53: CPU workaround for 855873 was applied

 5324 02:02:25.841823  INFO:    BL31: Preparing for EL3 exit to normal world

 5325 02:02:25.844449  INFO:    Entry point address = 0x80000000

 5326 02:02:25.844880  INFO:    SPSR = 0x8

 5327 02:02:25.867645  

 5328 02:02:25.868141  

 5329 02:02:25.868470  

 5330 02:02:25.868815  Starting depthcharge on Juniper...

 5331 02:02:25.870694  end: 2.2.3 depthcharge-start (duration 00:00:23) [common]
 5332 02:02:25.871307  start: 2.2.4 bootloader-commands (timeout 00:04:28) [common]
 5333 02:02:25.871739  Setting prompt string to ['jacuzzi:']
 5334 02:02:25.872136  bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:28)
 5335 02:02:25.872793  

 5336 02:02:25.874450  vboot_handoff: creating legacy vboot_handoff structure

 5337 02:02:25.874877  

 5338 02:02:25.877972  ec_init(0): CrosEC protocol v3 supported (544, 544)

 5339 02:02:25.878448  

 5340 02:02:25.881035  Wipe memory regions:

 5341 02:02:25.881463  

 5342 02:02:25.884937  	[0x00000040000000, 0x00000054600000)

 5343 02:02:25.926954  

 5344 02:02:25.927443  	[0x00000054660000, 0x00000080000000)

 5345 02:02:26.018900  

 5346 02:02:26.019424  	[0x000000811994a0, 0x000000ffeda000)

 5347 02:02:26.278508  

 5348 02:02:26.278977  	[0x00000100000000, 0x00000140000000)

 5349 02:02:26.411234  

 5350 02:02:26.414735  Initializing XHCI USB controller at 0x11200000.

 5351 02:02:26.437564  

 5352 02:02:26.440548  [firmware-jacuzzi-12573.B-collabora] Jun  8 2022 08:18:54

 5353 02:02:26.440937  

 5354 02:02:26.441238  


 5355 02:02:26.441914  Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5357 02:02:26.543213  jacuzzi: tftpboot 192.168.201.1 14479226/tftp-deploy-17j7_ogz/kernel/image.itb 14479226/tftp-deploy-17j7_ogz/kernel/cmdline 

 5358 02:02:26.543889  Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5359 02:02:26.544436  bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:27)
 5360 02:02:26.548721  tftpboot 192.168.201.1 14479226/tftp-deploy-17j7_ogz/kernel/image.itp-deploy-17j7_ogz/kernel/cmdline 

 5361 02:02:26.549293  

 5362 02:02:26.549689  Waiting for link

 5363 02:02:26.951573  

 5364 02:02:26.952074  R8152: Initializing

 5365 02:02:26.952411  

 5366 02:02:26.954947  Version 9 (ocp_data = 6010)

 5367 02:02:26.955334  

 5368 02:02:26.958111  R8152: Done initializing

 5369 02:02:26.958582  

 5370 02:02:26.958917  Adding net device

 5371 02:02:27.343519  

 5372 02:02:27.344018  done.

 5373 02:02:27.344350  

 5374 02:02:27.344655  MAC: 00:e0:4c:68:03:2b

 5375 02:02:27.344946  

 5376 02:02:27.346765  Sending DHCP discover... done.

 5377 02:02:27.347201  

 5378 02:02:27.349791  Waiting for reply... done.

 5379 02:02:27.350260  

 5380 02:02:27.353507  Sending DHCP request... done.

 5381 02:02:27.353936  

 5382 02:02:27.356778  Waiting for reply... done.

 5383 02:02:27.357206  

 5384 02:02:27.357540  My ip is 192.168.201.17

 5385 02:02:27.357850  

 5386 02:02:27.360221  The DHCP server ip is 192.168.201.1

 5387 02:02:27.360652  

 5388 02:02:27.363468  TFTP server IP predefined by user: 192.168.201.1

 5389 02:02:27.363901  

 5390 02:02:27.370341  Bootfile predefined by user: 14479226/tftp-deploy-17j7_ogz/kernel/image.itb

 5391 02:02:27.370785  

 5392 02:02:27.373388  Sending tftp read request... done.

 5393 02:02:27.373817  

 5394 02:02:27.383378  Waiting for the transfer... 

 5395 02:02:27.383810  

 5396 02:02:27.652399  00000000 ################################################################

 5397 02:02:27.652528  

 5398 02:02:27.910580  00080000 ################################################################

 5399 02:02:27.910707  

 5400 02:02:28.166118  00100000 ################################################################

 5401 02:02:28.166306  

 5402 02:02:28.453626  00180000 ################################################################

 5403 02:02:28.453756  

 5404 02:02:28.731392  00200000 ################################################################

 5405 02:02:28.731525  

 5406 02:02:29.049603  00280000 ################################################################

 5407 02:02:29.049717  

 5408 02:02:29.339368  00300000 ################################################################

 5409 02:02:29.339495  

 5410 02:02:29.647815  00380000 ################################################################

 5411 02:02:29.647945  

 5412 02:02:29.913581  00400000 ################################################################

 5413 02:02:29.913704  

 5414 02:02:30.207707  00480000 ################################################################

 5415 02:02:30.207836  

 5416 02:02:30.500260  00500000 ################################################################

 5417 02:02:30.500386  

 5418 02:02:30.762083  00580000 ################################################################

 5419 02:02:30.762207  

 5420 02:02:31.021763  00600000 ################################################################

 5421 02:02:31.021891  

 5422 02:02:31.287725  00680000 ################################################################

 5423 02:02:31.287849  

 5424 02:02:31.580337  00700000 ################################################################

 5425 02:02:31.580493  

 5426 02:02:31.882898  00780000 ################################################################

 5427 02:02:31.883029  

 5428 02:02:32.184519  00800000 ################################################################

 5429 02:02:32.184669  

 5430 02:02:32.452374  00880000 ################################################################

 5431 02:02:32.452496  

 5432 02:02:32.724489  00900000 ################################################################

 5433 02:02:32.724630  

 5434 02:02:32.996707  00980000 ################################################################

 5435 02:02:32.996847  

 5436 02:02:33.282192  00a00000 ################################################################

 5437 02:02:33.282352  

 5438 02:02:33.577537  00a80000 ################################################################

 5439 02:02:33.577661  

 5440 02:02:33.852816  00b00000 ################################################################

 5441 02:02:33.852937  

 5442 02:02:34.161834  00b80000 ################################################################

 5443 02:02:34.161951  

 5444 02:02:34.458650  00c00000 ################################################################

 5445 02:02:34.458777  

 5446 02:02:34.776607  00c80000 ################################################################

 5447 02:02:34.776731  

 5448 02:02:35.058780  00d00000 ################################################################

 5449 02:02:35.058904  

 5450 02:02:35.354685  00d80000 ################################################################

 5451 02:02:35.354812  

 5452 02:02:35.643016  00e00000 ################################################################

 5453 02:02:35.643143  

 5454 02:02:35.909889  00e80000 ################################################################

 5455 02:02:35.910009  

 5456 02:02:36.180928  00f00000 ################################################################

 5457 02:02:36.181049  

 5458 02:02:36.434195  00f80000 ################################################################

 5459 02:02:36.434355  

 5460 02:02:36.691147  01000000 ################################################################

 5461 02:02:36.691277  

 5462 02:02:36.965765  01080000 ################################################################

 5463 02:02:36.965888  

 5464 02:02:37.241216  01100000 ################################################################

 5465 02:02:37.241336  

 5466 02:02:37.496079  01180000 ################################################################

 5467 02:02:37.496202  

 5468 02:02:37.767385  01200000 ################################################################

 5469 02:02:37.767531  

 5470 02:02:38.026023  01280000 ################################################################

 5471 02:02:38.026183  

 5472 02:02:38.303368  01300000 ################################################################

 5473 02:02:38.303490  

 5474 02:02:38.564139  01380000 ################################################################

 5475 02:02:38.564265  

 5476 02:02:38.825121  01400000 ################################################################

 5477 02:02:38.825254  

 5478 02:02:39.074094  01480000 ################################################################

 5479 02:02:39.074262  

 5480 02:02:39.322630  01500000 ################################################################

 5481 02:02:39.322758  

 5482 02:02:39.600855  01580000 ################################################################

 5483 02:02:39.600980  

 5484 02:02:39.857957  01600000 ################################################################

 5485 02:02:39.858108  

 5486 02:02:40.114258  01680000 ################################################################

 5487 02:02:40.114391  

 5488 02:02:40.382757  01700000 ################################################################

 5489 02:02:40.382882  

 5490 02:02:40.638438  01780000 ################################################################

 5491 02:02:40.638561  

 5492 02:02:40.905481  01800000 ################################################################

 5493 02:02:40.905619  

 5494 02:02:41.213487  01880000 ################################################################

 5495 02:02:41.213617  

 5496 02:02:41.492594  01900000 ################################################################

 5497 02:02:41.492726  

 5498 02:02:41.773637  01980000 ################################################################

 5499 02:02:41.773766  

 5500 02:02:42.070567  01a00000 ################################################################

 5501 02:02:42.070692  

 5502 02:02:42.384761  01a80000 ################################################################

 5503 02:02:42.384874  

 5504 02:02:42.678045  01b00000 ################################################################

 5505 02:02:42.678170  

 5506 02:02:42.941480  01b80000 ################################################################

 5507 02:02:42.941605  

 5508 02:02:43.217183  01c00000 ################################################################

 5509 02:02:43.217308  

 5510 02:02:43.472702  01c80000 ################################################################

 5511 02:02:43.472823  

 5512 02:02:43.722362  01d00000 ################################################################

 5513 02:02:43.722477  

 5514 02:02:43.978673  01d80000 ################################################################

 5515 02:02:43.978796  

 5516 02:02:44.261685  01e00000 ################################################################

 5517 02:02:44.261835  

 5518 02:02:44.554339  01e80000 ################################################################

 5519 02:02:44.554464  

 5520 02:02:44.832592  01f00000 ################################################################

 5521 02:02:44.832709  

 5522 02:02:45.105740  01f80000 ################################################################

 5523 02:02:45.105866  

 5524 02:02:45.373913  02000000 ################################################################

 5525 02:02:45.374040  

 5526 02:02:45.664779  02080000 ################################################################

 5527 02:02:45.664907  

 5528 02:02:45.962362  02100000 ################################################################

 5529 02:02:45.962489  

 5530 02:02:46.258716  02180000 ################################################################

 5531 02:02:46.258842  

 5532 02:02:46.509781  02200000 ################################################################

 5533 02:02:46.509903  

 5534 02:02:46.764662  02280000 ################################################################

 5535 02:02:46.764796  

 5536 02:02:47.020066  02300000 ################################################################

 5537 02:02:47.020186  

 5538 02:02:47.291648  02380000 ################################################################

 5539 02:02:47.291773  

 5540 02:02:47.554785  02400000 ################################################################

 5541 02:02:47.554923  

 5542 02:02:47.819876  02480000 ################################################################

 5543 02:02:47.820000  

 5544 02:02:48.080429  02500000 ################################################################

 5545 02:02:48.080556  

 5546 02:02:48.337743  02580000 ################################################################

 5547 02:02:48.337866  

 5548 02:02:48.600532  02600000 ################################################################

 5549 02:02:48.600657  

 5550 02:02:48.854737  02680000 ################################################################

 5551 02:02:48.854864  

 5552 02:02:49.110569  02700000 ################################################################

 5553 02:02:49.110692  

 5554 02:02:49.378057  02780000 ################################################################

 5555 02:02:49.378182  

 5556 02:02:49.682972  02800000 ################################################################

 5557 02:02:49.683100  

 5558 02:02:49.964734  02880000 ################################################################

 5559 02:02:49.964867  

 5560 02:02:50.219717  02900000 ################################################################

 5561 02:02:50.219843  

 5562 02:02:50.483666  02980000 ################################################################

 5563 02:02:50.483796  

 5564 02:02:50.751982  02a00000 ################################################################

 5565 02:02:50.752108  

 5566 02:02:51.009467  02a80000 ################################################################

 5567 02:02:51.009591  

 5568 02:02:51.276449  02b00000 ################################################################

 5569 02:02:51.276599  

 5570 02:02:51.574330  02b80000 ################################################################

 5571 02:02:51.574450  

 5572 02:02:51.887672  02c00000 ################################################################

 5573 02:02:51.887799  

 5574 02:02:52.172168  02c80000 ################################################################

 5575 02:02:52.172297  

 5576 02:02:52.428954  02d00000 ################################################################

 5577 02:02:52.429080  

 5578 02:02:52.697070  02d80000 ################################################################

 5579 02:02:52.697198  

 5580 02:02:53.009848  02e00000 ################################################################

 5581 02:02:53.010000  

 5582 02:02:53.298321  02e80000 ################################################################

 5583 02:02:53.298459  

 5584 02:02:53.562132  02f00000 ################################################################

 5585 02:02:53.562313  

 5586 02:02:53.830079  02f80000 ################################################################

 5587 02:02:53.830203  

 5588 02:02:54.114575  03000000 ################################################################

 5589 02:02:54.114699  

 5590 02:02:54.396374  03080000 ################################################################

 5591 02:02:54.396495  

 5592 02:02:54.662248  03100000 ################################################################

 5593 02:02:54.662398  

 5594 02:02:54.951547  03180000 ################################################################

 5595 02:02:54.951687  

 5596 02:02:55.203227  03200000 ################################################################

 5597 02:02:55.203355  

 5598 02:02:55.455694  03280000 ################################################################

 5599 02:02:55.455849  

 5600 02:02:55.715463  03300000 ################################################################

 5601 02:02:55.715587  

 5602 02:02:55.939084  03380000 ################################################### done.

 5603 02:02:55.939202  

 5604 02:02:55.942198  The bootfile was 54411630 bytes long.

 5605 02:02:55.942359  

 5606 02:02:55.945863  Sending tftp read request... done.

 5607 02:02:55.945989  

 5608 02:02:55.946079  Waiting for the transfer... 

 5609 02:02:55.946180  

 5610 02:02:55.949120  00000000 # done.

 5611 02:02:55.949209  

 5612 02:02:55.955464  Command line loaded dynamically from TFTP file: 14479226/tftp-deploy-17j7_ogz/kernel/cmdline

 5613 02:02:55.955625  

 5614 02:02:55.972756  The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 5615 02:02:55.972980  

 5616 02:02:55.975954  Loading FIT.

 5617 02:02:55.976159  

 5618 02:02:55.979149  Image ramdisk-1 has 41226999 bytes.

 5619 02:02:55.979314  

 5620 02:02:55.979437  Image fdt-1 has 57695 bytes.

 5621 02:02:55.982120  

 5622 02:02:55.982337  Image kernel-1 has 13124896 bytes.

 5623 02:02:55.982487  

 5624 02:02:55.992990  Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper

 5625 02:02:55.993349  

 5626 02:02:56.006040  Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183

 5627 02:02:56.006600  

 5628 02:02:56.009452  Choosing best match conf-1 for compat google,juniper-sku16.

 5629 02:02:56.014934  

 5630 02:02:56.019590  Connected to device vid:did:rid of 1ae0:0028:00

 5631 02:02:56.027339  

 5632 02:02:56.030722  tpm_get_response: command 0x17b, return code 0x0

 5633 02:02:56.031235  

 5634 02:02:56.033790  tpm_cleanup: add release locality here.

 5635 02:02:56.034254  

 5636 02:02:56.037468  Shutting down all USB controllers.

 5637 02:02:56.037977  

 5638 02:02:56.040488  Removing current net device

 5639 02:02:56.040918  

 5640 02:02:56.044241  Exiting depthcharge with code 4 at timestamp: 46663794

 5641 02:02:56.044673  

 5642 02:02:56.047760  LZMA decompressing kernel-1 to 0x80193568

 5643 02:02:56.048280  

 5644 02:02:56.050786  LZMA decompressing kernel-1 to 0x40000000

 5645 02:02:57.918349  

 5646 02:02:57.918861  jumping to kernel

 5647 02:02:57.920883  end: 2.2.4 bootloader-commands (duration 00:00:32) [common]
 5648 02:02:57.921389  start: 2.2.5 auto-login-action (timeout 00:03:56) [common]
 5649 02:02:57.921759  Setting prompt string to ['Linux version [0-9]']
 5650 02:02:57.922104  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5651 02:02:57.922488  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 5652 02:02:57.993517  

 5653 02:02:57.996905  [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]

 5654 02:02:58.000685  start: 2.2.5.1 login-action (timeout 00:03:56) [common]
 5655 02:02:58.001199  The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
 5656 02:02:58.001582  Setting prompt string to []
 5657 02:02:58.001985  Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
 5658 02:02:58.002430  Using line separator: #'\n'#
 5659 02:02:58.002953  No login prompt set.
 5660 02:02:58.003313  Parsing kernel messages
 5661 02:02:58.003625  ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
 5662 02:02:58.004144  [login-action] Waiting for messages, (timeout 00:03:56)
 5663 02:02:58.004493  Waiting using forced prompt support (timeout 00:01:58)
 5664 02:02:58.020302  [    0.000000] Linux version 6.1.94-cip23 (KernelCI@build-j239242-arm64-gcc-10-defconfig-arm64-chromebook-c5lwc) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Fri Jun 21 00:04:56 UTC 2024

 5665 02:02:58.023543  [    0.000000] random: crng init done

 5666 02:02:58.030119  [    0.000000] Machine model: Google juniper sku16 board

 5667 02:02:58.030673  [    0.000000] efi: UEFI not found.

 5668 02:02:58.039988  [    0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB

 5669 02:02:58.047224  [    0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool

 5670 02:02:58.056785  [    0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')

 5671 02:02:58.060051  [    0.000000] printk: bootconsole [mtk8250] enabled

 5672 02:02:58.068532  [    0.000000] NUMA: No NUMA configuration found

 5673 02:02:58.075124  [    0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]

 5674 02:02:58.082073  [    0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]

 5675 02:02:58.082636  [    0.000000] Zone ranges:

 5676 02:02:58.088723  [    0.000000]   DMA      [mem 0x0000000040000000-0x00000000ffffffff]

 5677 02:02:58.091673  [    0.000000]   DMA32    empty

 5678 02:02:58.099166  [    0.000000]   Normal   [mem 0x0000000100000000-0x000000013fffffff]

 5679 02:02:58.101896  [    0.000000] Movable zone start for each node

 5680 02:02:58.105106  [    0.000000] Early memory node ranges

 5681 02:02:58.111953  [    0.000000]   node   0: [mem 0x0000000040000000-0x000000004fffffff]

 5682 02:02:58.118609  [    0.000000]   node   0: [mem 0x0000000050000000-0x00000000528fffff]

 5683 02:02:58.125253  [    0.000000]   node   0: [mem 0x0000000052900000-0x00000000545fffff]

 5684 02:02:58.131869  [    0.000000]   node   0: [mem 0x0000000054700000-0x00000000ffdfffff]

 5685 02:02:58.138270  [    0.000000]   node   0: [mem 0x0000000100000000-0x000000013fffffff]

 5686 02:02:58.144648  [    0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]

 5687 02:02:58.161158  [    0.000000] On node 0, zone DMA: 256 pages in unavailable ranges

 5688 02:02:58.167637  [    0.000000] On node 0, zone Normal: 512 pages in unavailable ranges

 5689 02:02:58.174079  [    0.000000] cma: Reserved 32 MiB at 0x00000000fde00000

 5690 02:02:58.177689  [    0.000000] psci: probing for conduit method from DT.

 5691 02:02:58.184879  [    0.000000] psci: PSCIv1.1 detected in firmware.

 5692 02:02:58.187647  [    0.000000] psci: Using standard PSCI v0.2 function IDs

 5693 02:02:58.194095  [    0.000000] psci: MIGRATE_INFO_TYPE not supported.

 5694 02:02:58.197505  [    0.000000] psci: SMC Calling Convention v1.1

 5695 02:02:58.204129  [    0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016

 5696 02:02:58.207575  [    0.000000] Detected VIPT I-cache on CPU0

 5697 02:02:58.214458  [    0.000000] CPU features: detected: GIC system register CPU interface

 5698 02:02:58.221404  [    0.000000] CPU features: kernel page table isolation forced ON by KASLR

 5699 02:02:58.227734  [    0.000000] CPU features: detected: Kernel page table isolation (KPTI)

 5700 02:02:58.230903  [    0.000000] CPU features: detected: ARM erratum 845719

 5701 02:02:58.237517  [    0.000000] alternatives: applying boot alternatives

 5702 02:02:58.240883  [    0.000000] Fallback order for Node 0: 0 

 5703 02:02:58.247499  [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 1031424

 5704 02:02:58.250519  [    0.000000] Policy zone: Normal

 5705 02:02:58.270917  [    0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 5706 02:02:58.281076  <5>[    0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.

 5707 02:02:58.290824  <6>[    0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)

 5708 02:02:58.297988  <6>[    0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)

 5709 02:02:58.304267  <6>[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off

 5710 02:02:58.310959  <6>[    0.000000] software IO TLB: area num 8.

 5711 02:02:58.335145  <6>[    0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)

 5712 02:02:58.393154  <6>[    0.000000] Memory: 3874816K/4191232K available (18112K kernel code, 4120K rwdata, 22648K rodata, 8512K init, 616K bss, 283648K reserved, 32768K cma-reserved)

 5713 02:02:58.399757  <6>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1

 5714 02:02:58.406752  <6>[    0.000000] rcu: Preemptible hierarchical RCU implementation.

 5715 02:02:58.409620  <6>[    0.000000] rcu: 	RCU event tracing is enabled.

 5716 02:02:58.416343  <6>[    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.

 5717 02:02:58.422980  <6>[    0.000000] 	Trampoline variant of Tasks RCU enabled.

 5718 02:02:58.426345  <6>[    0.000000] 	Tracing variant of Tasks RCU enabled.

 5719 02:02:58.436283  <6>[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.

 5720 02:02:58.443086  <6>[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8

 5721 02:02:58.446073  <6>[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0

 5722 02:02:58.458254  <6>[    0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem

 5723 02:02:58.464833  <6>[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode

 5724 02:02:58.467955  <6>[    0.000000] GICv3: 640 SPIs implemented

 5725 02:02:58.471338  <6>[    0.000000] GICv3: 0 Extended SPIs implemented

 5726 02:02:58.478500  <6>[    0.000000] Root IRQ handler: gic_handle_irq

 5727 02:02:58.481434  <6>[    0.000000] GICv3: GICv3 features: 16 PPIs

 5728 02:02:58.488692  <6>[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000

 5729 02:02:58.498421  <6>[    0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }

 5730 02:02:58.511494  <6>[    0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }

 5731 02:02:58.518101  <6>[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.

 5732 02:02:58.530093  <6>[    0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).

 5733 02:02:58.543911  <6>[    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns

 5734 02:02:58.550167  <6>[    0.000001] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns

 5735 02:02:58.556939  <6>[    0.009478] Console: colour dummy device 80x25

 5736 02:02:58.560313  <6>[    0.014520] printk: console [tty1] enabled

 5737 02:02:58.570138  <6>[    0.018911] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)

 5738 02:02:58.576573  <6>[    0.029375] pid_max: default: 32768 minimum: 301

 5739 02:02:58.580045  <6>[    0.034258] LSM: Security Framework initializing

 5740 02:02:58.590653  <6>[    0.039174] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)

 5741 02:02:58.596856  <6>[    0.046797] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)

 5742 02:02:58.603733  <4>[    0.055659] cacheinfo: Unable to detect cache hierarchy for CPU 0

 5743 02:02:58.613738  <6>[    0.062286] cblist_init_generic: Setting adjustable number of callback queues.

 5744 02:02:58.616976  <6>[    0.069732] cblist_init_generic: Setting shift to 3 and lim to 1.

 5745 02:02:58.626834  <6>[    0.076085] cblist_init_generic: Setting adjustable number of callback queues.

 5746 02:02:58.633309  <6>[    0.083530] cblist_init_generic: Setting shift to 3 and lim to 1.

 5747 02:02:58.636741  <6>[    0.089929] rcu: Hierarchical SRCU implementation.

 5748 02:02:58.642907  <6>[    0.094956] rcu: 	Max phase no-delay instances is 1000.

 5749 02:02:58.649770  <6>[    0.102890] EFI services will not be available.

 5750 02:02:58.653118  <6>[    0.107841] smp: Bringing up secondary CPUs ...

 5751 02:02:58.663715  <6>[    0.113125] Detected VIPT I-cache on CPU1

 5752 02:02:58.670459  <4>[    0.113171] cacheinfo: Unable to detect cache hierarchy for CPU 1

 5753 02:02:58.676969  <6>[    0.113178] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000

 5754 02:02:58.683767  <6>[    0.113211] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]

 5755 02:02:58.687396  <6>[    0.113793] Detected VIPT I-cache on CPU2

 5756 02:02:58.694016  <4>[    0.113825] cacheinfo: Unable to detect cache hierarchy for CPU 2

 5757 02:02:58.700767  <6>[    0.113831] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000

 5758 02:02:58.707256  <6>[    0.113843] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]

 5759 02:02:58.710428  <6>[    0.114289] Detected VIPT I-cache on CPU3

 5760 02:02:58.717287  <4>[    0.114320] cacheinfo: Unable to detect cache hierarchy for CPU 3

 5761 02:02:58.724035  <6>[    0.114324] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000

 5762 02:02:58.730310  <6>[    0.114335] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]

 5763 02:02:58.737034  <6>[    0.114910] CPU features: detected: Spectre-v2

 5764 02:02:58.740454  <6>[    0.114920] CPU features: detected: Spectre-BHB

 5765 02:02:58.747058  <6>[    0.114924] CPU features: detected: ARM erratum 858921

 5766 02:02:58.750949  <6>[    0.114929] Detected VIPT I-cache on CPU4

 5767 02:02:58.756865  <4>[    0.114976] cacheinfo: Unable to detect cache hierarchy for CPU 4

 5768 02:02:58.763749  <6>[    0.114983] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000

 5769 02:02:58.770486  <6>[    0.114992] arch_timer: Enabling local workaround for ARM erratum 858921

 5770 02:02:58.776853  <6>[    0.115002] arch_timer: CPU4: Trapping CNTVCT access

 5771 02:02:58.783735  <6>[    0.115010] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]

 5772 02:02:58.787291  <6>[    0.115497] Detected VIPT I-cache on CPU5

 5773 02:02:58.793378  <4>[    0.115537] cacheinfo: Unable to detect cache hierarchy for CPU 5

 5774 02:02:58.800583  <6>[    0.115542] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000

 5775 02:02:58.806919  <6>[    0.115549] arch_timer: Enabling local workaround for ARM erratum 858921

 5776 02:02:58.813666  <6>[    0.115555] arch_timer: CPU5: Trapping CNTVCT access

 5777 02:02:58.820185  <6>[    0.115560] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]

 5778 02:02:58.823444  <6>[    0.115997] Detected VIPT I-cache on CPU6

 5779 02:02:58.830176  <4>[    0.116042] cacheinfo: Unable to detect cache hierarchy for CPU 6

 5780 02:02:58.836464  <6>[    0.116048] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000

 5781 02:02:58.843280  <6>[    0.116056] arch_timer: Enabling local workaround for ARM erratum 858921

 5782 02:02:58.850109  <6>[    0.116062] arch_timer: CPU6: Trapping CNTVCT access

 5783 02:02:58.856476  <6>[    0.116067] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]

 5784 02:02:58.859884  <6>[    0.116597] Detected VIPT I-cache on CPU7

 5785 02:02:58.866389  <4>[    0.116640] cacheinfo: Unable to detect cache hierarchy for CPU 7

 5786 02:02:58.872983  <6>[    0.116646] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000

 5787 02:02:58.879950  <6>[    0.116653] arch_timer: Enabling local workaround for ARM erratum 858921

 5788 02:02:58.886568  <6>[    0.116659] arch_timer: CPU7: Trapping CNTVCT access

 5789 02:02:58.893570  <6>[    0.116665] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]

 5790 02:02:58.896749  <6>[    0.116713] smp: Brought up 1 node, 8 CPUs

 5791 02:02:58.903581  <6>[    0.355591] SMP: Total of 8 processors activated.

 5792 02:02:58.906637  <6>[    0.360529] CPU features: detected: 32-bit EL0 Support

 5793 02:02:58.913240  <6>[    0.365899] CPU features: detected: 32-bit EL1 Support

 5794 02:02:58.920138  <6>[    0.371265] CPU features: detected: CRC32 instructions

 5795 02:02:58.923290  <6>[    0.376693] CPU: All CPU(s) started at EL2

 5796 02:02:58.930141  <6>[    0.381036] alternatives: applying system-wide alternatives

 5797 02:02:58.933358  <6>[    0.389047] devtmpfs: initialized

 5798 02:02:58.948884  <6>[    0.397978] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns

 5799 02:02:58.958909  <6>[    0.407928] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)

 5800 02:02:58.962101  <6>[    0.415657] pinctrl core: initialized pinctrl subsystem

 5801 02:02:58.970124  <6>[    0.422755] DMI not present or invalid.

 5802 02:02:58.976704  <6>[    0.427123] NET: Registered PF_NETLINK/PF_ROUTE protocol family

 5803 02:02:58.983381  <6>[    0.434011] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations

 5804 02:02:58.993361  <6>[    0.441523] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations

 5805 02:02:59.000285  <6>[    0.449694] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations

 5806 02:02:59.006989  <6>[    0.457841] audit: initializing netlink subsys (disabled)

 5807 02:02:59.013466  <5>[    0.463524] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1

 5808 02:02:59.020251  <6>[    0.464514] thermal_sys: Registered thermal governor 'step_wise'

 5809 02:02:59.026844  <6>[    0.471475] thermal_sys: Registered thermal governor 'power_allocator'

 5810 02:02:59.030059  <6>[    0.477725] cpuidle: using governor menu

 5811 02:02:59.036791  <6>[    0.488676] NET: Registered PF_QIPCRTR protocol family

 5812 02:02:59.043504  <6>[    0.494174] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.

 5813 02:02:59.049912  <6>[    0.501269] ASID allocator initialised with 32768 entries

 5814 02:02:59.053025  <6>[    0.508021] Serial: AMBA PL011 UART driver

 5815 02:02:59.065147  <4>[    0.518403] Trying to register duplicate clock ID: 113

 5816 02:02:59.124837  <6>[    0.574657] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5817 02:02:59.139936  <6>[    0.588977] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5818 02:02:59.142937  <6>[    0.598717] KASLR enabled

 5819 02:02:59.157899  <6>[    0.606770] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages

 5820 02:02:59.164067  <6>[    0.613772] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page

 5821 02:02:59.171073  <6>[    0.620249] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages

 5822 02:02:59.177456  <6>[    0.627241] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page

 5823 02:02:59.184732  <6>[    0.633715] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages

 5824 02:02:59.191014  <6>[    0.640704] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page

 5825 02:02:59.197390  <6>[    0.647178] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages

 5826 02:02:59.203889  <6>[    0.654167] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page

 5827 02:02:59.207119  <6>[    0.661826] ACPI: Interpreter disabled.

 5828 02:02:59.216764  <6>[    0.669799] iommu: Default domain type: Translated 

 5829 02:02:59.223694  <6>[    0.674909] iommu: DMA domain TLB invalidation policy: strict mode 

 5830 02:02:59.227168  <5>[    0.681541] SCSI subsystem initialized

 5831 02:02:59.233434  <6>[    0.685959] usbcore: registered new interface driver usbfs

 5832 02:02:59.240185  <6>[    0.691684] usbcore: registered new interface driver hub

 5833 02:02:59.243687  <6>[    0.697224] usbcore: registered new device driver usb

 5834 02:02:59.250471  <6>[    0.703526] pps_core: LinuxPPS API ver. 1 registered

 5835 02:02:59.260459  <6>[    0.708711] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>

 5836 02:02:59.263745  <6>[    0.718035] PTP clock support registered

 5837 02:02:59.267046  <6>[    0.722287] EDAC MC: Ver: 3.0.0

 5838 02:02:59.274866  <6>[    0.727932] FPGA manager framework

 5839 02:02:59.278460  <6>[    0.731611] Advanced Linux Sound Architecture Driver Initialized.

 5840 02:02:59.282087  <6>[    0.738359] vgaarb: loaded

 5841 02:02:59.288620  <6>[    0.741473] clocksource: Switched to clocksource arch_sys_counter

 5842 02:02:59.295301  <5>[    0.747909] VFS: Disk quotas dquot_6.6.0

 5843 02:02:59.302132  <6>[    0.752085] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)

 5844 02:02:59.305316  <6>[    0.759257] pnp: PnP ACPI: disabled

 5845 02:02:59.313221  <6>[    0.766156] NET: Registered PF_INET protocol family

 5846 02:02:59.319866  <6>[    0.771379] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)

 5847 02:02:59.331979  <6>[    0.781267] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)

 5848 02:02:59.338282  <6>[    0.790021] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)

 5849 02:02:59.348281  <6>[    0.797972] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)

 5850 02:02:59.354736  <6>[    0.806205] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)

 5851 02:02:59.361951  <6>[    0.814304] TCP: Hash tables configured (established 32768 bind 32768)

 5852 02:02:59.371480  <6>[    0.821134] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)

 5853 02:02:59.378167  <6>[    0.828108] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)

 5854 02:02:59.385328  <6>[    0.835594] NET: Registered PF_UNIX/PF_LOCAL protocol family

 5855 02:02:59.388467  <6>[    0.841688] RPC: Registered named UNIX socket transport module.

 5856 02:02:59.394968  <6>[    0.847832] RPC: Registered udp transport module.

 5857 02:02:59.398305  <6>[    0.852757] RPC: Registered tcp transport module.

 5858 02:02:59.404985  <6>[    0.857681] RPC: Registered tcp NFSv4.1 backchannel transport module.

 5859 02:02:59.411820  <6>[    0.864335] PCI: CLS 0 bytes, default 64

 5860 02:02:59.414597  <6>[    0.868623] Unpacking initramfs...

 5861 02:02:59.428629  <6>[    0.878041] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available

 5862 02:02:59.438703  <6>[    0.886671] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available

 5863 02:02:59.441737  <6>[    0.895521] kvm [1]: IPA Size Limit: 40 bits

 5864 02:02:59.448750  <6>[    0.901855] kvm [1]: vgic-v2@c420000

 5865 02:02:59.452029  <6>[    0.905674] kvm [1]: GIC system register CPU interface enabled

 5866 02:02:59.459195  <6>[    0.911848] kvm [1]: vgic interrupt IRQ18

 5867 02:02:59.462777  <6>[    0.916208] kvm [1]: Hyp mode initialized successfully

 5868 02:02:59.469450  <5>[    0.922460] Initialise system trusted keyrings

 5869 02:02:59.476173  <6>[    0.927299] workingset: timestamp_bits=42 max_order=20 bucket_order=0

 5870 02:02:59.484252  <6>[    0.937265] squashfs: version 4.0 (2009/01/31) Phillip Lougher

 5871 02:02:59.490858  <5>[    0.943728] NFS: Registering the id_resolver key type

 5872 02:02:59.494507  <5>[    0.949032] Key type id_resolver registered

 5873 02:02:59.501129  <5>[    0.953445] Key type id_legacy registered

 5874 02:02:59.507531  <6>[    0.957752] nfs4filelayout_init: NFSv4 File Layout Driver Registering...

 5875 02:02:59.514129  <6>[    0.964673] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...

 5876 02:02:59.521052  <6>[    0.972439] 9p: Installing v9fs 9p2000 file system support

 5877 02:02:59.548889  <5>[    1.001603] Key type asymmetric registered

 5878 02:02:59.552163  <5>[    1.005950] Asymmetric key parser 'x509' registered

 5879 02:02:59.561793  <6>[    1.011107] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)

 5880 02:02:59.565342  <6>[    1.018728] io scheduler mq-deadline registered

 5881 02:02:59.568488  <6>[    1.023489] io scheduler kyber registered

 5882 02:02:59.591196  <6>[    1.044191] EINJ: ACPI disabled.

 5883 02:02:59.597696  <4>[    1.047956] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17

 5884 02:02:59.635982  <6>[    1.088562] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled

 5885 02:02:59.643754  <6>[    1.097012] printk: console [ttyS0] disabled

 5886 02:02:59.671934  <6>[    1.121665] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2

 5887 02:02:59.678374  <6>[    1.131143] printk: console [ttyS0] enabled

 5888 02:02:59.681874  <6>[    1.131143] printk: console [ttyS0] enabled

 5889 02:02:59.688379  <6>[    1.140060] printk: bootconsole [mtk8250] disabled

 5890 02:02:59.692012  <6>[    1.140060] printk: bootconsole [mtk8250] disabled

 5891 02:02:59.701756  <3>[    1.150597] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47

 5892 02:02:59.708513  <3>[    1.158980] mt6577-uart 11003000.serial: Error applying setting, reverse things back

 5893 02:02:59.737678  <6>[    1.187392] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2

 5894 02:02:59.744309  <6>[    1.197048] serial serial0: tty port ttyS1 registered

 5895 02:02:59.751248  <6>[    1.203629] SuperH (H)SCI(F) driver initialized

 5896 02:02:59.754140  <6>[    1.209118] msm_serial: driver initialized

 5897 02:02:59.769552  <6>[    1.219459] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000

 5898 02:02:59.779464  <6>[    1.228059] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000

 5899 02:02:59.786477  <6>[    1.236632] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000

 5900 02:02:59.796625  <6>[    1.245199] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000

 5901 02:02:59.803105  <6>[    1.253854] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000

 5902 02:02:59.813089  <6>[    1.262516] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000

 5903 02:02:59.823049  <6>[    1.271251] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000

 5904 02:02:59.829398  <6>[    1.279986] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000

 5905 02:02:59.839974  <6>[    1.288548] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000

 5906 02:02:59.846392  <6>[    1.297345] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000

 5907 02:02:59.856583  <4>[    1.309746] cacheinfo: Unable to detect cache hierarchy for CPU 0

 5908 02:02:59.865999  <6>[    1.319105] loop: module loaded

 5909 02:02:59.878062  <6>[    1.331069] vsim1: Bringing 1800000uV into 2700000-2700000uV

 5910 02:02:59.895794  <6>[    1.348945] megasas: 07.719.03.00-rc1

 5911 02:02:59.904720  <6>[    1.357750] spi-nor spi1.0: w25q64dw (8192 Kbytes)

 5912 02:02:59.916089  <6>[    1.368867] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2

 5913 02:02:59.932765  <6>[    1.385619] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)

 5914 02:02:59.989080  <6>[    1.435767] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b8

 5915 02:03:00.720033  <6>[    2.172124] Freeing initrd memory: 40256K

 5916 02:03:00.733315  <4>[    2.182170] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'

 5917 02:03:00.739786  <4>[    2.191408] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.94-cip23 #1

 5918 02:03:00.746317  <4>[    2.198106] Hardware name: Google juniper sku16 board (DT)

 5919 02:03:00.750070  <4>[    2.203846] Call trace:

 5920 02:03:00.753426  <4>[    2.206546]  dump_backtrace.part.0+0xe0/0xf0

 5921 02:03:00.756414  <4>[    2.211083]  show_stack+0x18/0x30

 5922 02:03:00.759690  <4>[    2.214656]  dump_stack_lvl+0x68/0x84

 5923 02:03:00.763352  <4>[    2.218577]  dump_stack+0x18/0x34

 5924 02:03:00.769557  <4>[    2.222148]  sysfs_warn_dup+0x64/0x80

 5925 02:03:00.773005  <4>[    2.226069]  sysfs_do_create_link_sd+0xf0/0x100

 5926 02:03:00.776621  <4>[    2.230854]  sysfs_create_link+0x20/0x40

 5927 02:03:00.783377  <4>[    2.235030]  bus_add_device+0x68/0x10c

 5928 02:03:00.786399  <4>[    2.239037]  device_add+0x364/0x7cc

 5929 02:03:00.789889  <4>[    2.242780]  of_device_add+0x44/0x60

 5930 02:03:00.793051  <4>[    2.246614]  of_platform_device_create_pdata+0x90/0x120

 5931 02:03:00.799857  <4>[    2.252095]  of_platform_bus_create+0x170/0x370

 5932 02:03:00.803020  <4>[    2.256880]  of_platform_populate+0x50/0xfc

 5933 02:03:00.809777  <4>[    2.261317]  parse_mtd_partitions+0x1dc/0x510

 5934 02:03:00.813734  <4>[    2.265930]  mtd_device_parse_register+0xf0/0x2e4

 5935 02:03:00.816645  <4>[    2.270888]  spi_nor_probe+0x21c/0x2f0

 5936 02:03:00.819935  <4>[    2.274894]  spi_mem_probe+0x6c/0xb0

 5937 02:03:00.823145  <4>[    2.278727]  spi_probe+0x84/0xe4

 5938 02:03:00.830247  <4>[    2.282208]  really_probe+0xbc/0x2e0

 5939 02:03:00.833125  <4>[    2.286039]  __driver_probe_device+0x78/0x11c

 5940 02:03:00.836774  <4>[    2.290651]  driver_probe_device+0xd8/0x160

 5941 02:03:00.843418  <4>[    2.295089]  __device_attach_driver+0xb8/0x134

 5942 02:03:00.846911  <4>[    2.299788]  bus_for_each_drv+0x78/0xd0

 5943 02:03:00.849884  <4>[    2.303878]  __device_attach+0xa8/0x1c0

 5944 02:03:00.856523  <4>[    2.307969]  device_initial_probe+0x14/0x20

 5945 02:03:00.859826  <4>[    2.312407]  bus_probe_device+0x9c/0xa4

 5946 02:03:00.862905  <4>[    2.316498]  device_add+0x3d0/0x7cc

 5947 02:03:00.866268  <4>[    2.320240]  __spi_add_device+0x78/0x120

 5948 02:03:00.869667  <4>[    2.324418]  spi_add_device+0x40/0x7c

 5949 02:03:00.876397  <4>[    2.328336]  spi_register_controller+0x610/0xad0

 5950 02:03:00.879717  <4>[    2.333209]  devm_spi_register_controller+0x4c/0xa4

 5951 02:03:00.886314  <4>[    2.338342]  mtk_spi_probe+0x3f8/0x650

 5952 02:03:00.889966  <4>[    2.342347]  platform_probe+0x68/0xe0

 5953 02:03:00.893145  <4>[    2.346266]  really_probe+0xbc/0x2e0

 5954 02:03:00.897073  <4>[    2.350096]  __driver_probe_device+0x78/0x11c

 5955 02:03:00.902977  <4>[    2.354708]  driver_probe_device+0xd8/0x160

 5956 02:03:00.906649  <4>[    2.359145]  __driver_attach+0x94/0x19c

 5957 02:03:00.910057  <4>[    2.363236]  bus_for_each_dev+0x70/0xd0

 5958 02:03:00.913509  <4>[    2.367326]  driver_attach+0x24/0x30

 5959 02:03:00.917119  <4>[    2.371156]  bus_add_driver+0x154/0x20c

 5960 02:03:00.923230  <4>[    2.375246]  driver_register+0x78/0x130

 5961 02:03:00.926858  <4>[    2.379337]  __platform_driver_register+0x28/0x34

 5962 02:03:00.929699  <4>[    2.384296]  mtk_spi_driver_init+0x1c/0x28

 5963 02:03:00.936998  <4>[    2.388650]  do_one_initcall+0x50/0x1d0

 5964 02:03:00.940099  <4>[    2.392740]  kernel_init_freeable+0x21c/0x288

 5965 02:03:00.943182  <4>[    2.397353]  kernel_init+0x24/0x12c

 5966 02:03:00.947057  <4>[    2.401098]  ret_from_fork+0x10/0x20

 5967 02:03:00.957188  <6>[    2.409868] tun: Universal TUN/TAP device driver, 1.6

 5968 02:03:00.960724  <6>[    2.416170] thunder_xcv, ver 1.0

 5969 02:03:00.963746  <6>[    2.419682] thunder_bgx, ver 1.0

 5970 02:03:00.967269  <6>[    2.423187] nicpf, ver 1.0

 5971 02:03:00.978526  <6>[    2.427549] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version

 5972 02:03:00.981669  <6>[    2.435038] hns3: Copyright (c) 2017 Huawei Corporation.

 5973 02:03:00.985273  <6>[    2.440639] hclge is initializing

 5974 02:03:00.991673  <6>[    2.444224] e1000: Intel(R) PRO/1000 Network Driver

 5975 02:03:00.998394  <6>[    2.449360] e1000: Copyright (c) 1999-2006 Intel Corporation.

 5976 02:03:01.001682  <6>[    2.455386] e1000e: Intel(R) PRO/1000 Network Driver

 5977 02:03:01.008358  <6>[    2.460607] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.

 5978 02:03:01.015223  <6>[    2.466800] igb: Intel(R) Gigabit Ethernet Network Driver

 5979 02:03:01.022319  <6>[    2.472457] igb: Copyright (c) 2007-2014 Intel Corporation.

 5980 02:03:01.028587  <6>[    2.478303] igbvf: Intel(R) Gigabit Virtual Function Network Driver

 5981 02:03:01.034976  <6>[    2.484826] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.

 5982 02:03:01.038270  <6>[    2.491378] sky2: driver version 1.30

 5983 02:03:01.045128  <6>[    2.496628] usbcore: registered new device driver r8152-cfgselector

 5984 02:03:01.051726  <6>[    2.503174] usbcore: registered new interface driver r8152

 5985 02:03:01.057939  <6>[    2.508994] VFIO - User Level meta-driver version: 0.3

 5986 02:03:01.064958  <6>[    2.516768] mtu3 11201000.usb: uwk - reg:0x420, version:101

 5987 02:03:01.071634  <4>[    2.522641] mtu3 11201000.usb: supply vbus not found, using dummy regulator

 5988 02:03:01.078565  <6>[    2.529928] mtu3 11201000.usb: dr_mode: 1, drd: auto

 5989 02:03:01.084914  <6>[    2.535156] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0

 5990 02:03:01.088183  <6>[    2.541335] mtu3 11201000.usb: usb3-drd: 0

 5991 02:03:01.094722  <6>[    2.546875] mtu3 11201000.usb: xHCI platform device register success...

 5992 02:03:01.106708  <4>[    2.555483] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator

 5993 02:03:01.109856  <6>[    2.563391] xhci-mtk 11200000.usb: xHCI Host Controller

 5994 02:03:01.119652  <6>[    2.568895] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1

 5995 02:03:01.126572  <6>[    2.576614] xhci-mtk 11200000.usb: USB3 root hub has no ports

 5996 02:03:01.132990  <6>[    2.582622] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010

 5997 02:03:01.139975  <6>[    2.592043] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000

 5998 02:03:01.146582  <6>[    2.598122] xhci-mtk 11200000.usb: xHCI Host Controller

 5999 02:03:01.153143  <6>[    2.603610] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2

 6000 02:03:01.159797  <6>[    2.611271] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed

 6001 02:03:01.163354  <6>[    2.618082] hub 1-0:1.0: USB hub found

 6002 02:03:01.169503  <6>[    2.622110] hub 1-0:1.0: 1 port detected

 6003 02:03:01.179554  <6>[    2.627429] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.

 6004 02:03:01.182816  <6>[    2.636038] hub 2-0:1.0: USB hub found

 6005 02:03:01.189293  <3>[    2.640064] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)

 6006 02:03:01.196266  <6>[    2.647948] usbcore: registered new interface driver usb-storage

 6007 02:03:01.202894  <6>[    2.654547] usbcore: registered new device driver onboard-usb-hub

 6008 02:03:01.219785  <4>[    2.669570] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator

 6009 02:03:01.228864  <6>[    2.681803] mt6397-rtc mt6358-rtc: registered as rtc0

 6010 02:03:01.239035  <6>[    2.687278] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-21T02:03:01 UTC (1718935381)

 6011 02:03:01.241942  <6>[    2.697160] i2c_dev: i2c /dev entries driver

 6012 02:03:01.253779  <6>[    2.703553] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 6013 02:03:01.263649  <6>[    2.711876] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 6014 02:03:01.267147  <6>[    2.720785] i2c 4-0058: Fixed dependency cycle(s) with /panel

 6015 02:03:01.277096  <6>[    2.726816] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000

 6016 02:03:01.293381  <6>[    2.746278] cpu cpu0: EM: created perf domain

 6017 02:03:01.303522  <6>[    2.751741] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz

 6018 02:03:01.310001  <6>[    2.763018] cpu cpu4: EM: created perf domain

 6019 02:03:01.316730  <6>[    2.769700] sdhci: Secure Digital Host Controller Interface driver

 6020 02:03:01.323195  <6>[    2.776146] sdhci: Copyright(c) Pierre Ossman

 6021 02:03:01.330006  <6>[    2.781558] Synopsys Designware Multimedia Card Interface Driver

 6022 02:03:01.336560  <6>[    2.782095] mtk-msdc 11240000.mmc: allocated mmc-pwrseq

 6023 02:03:01.339790  <6>[    2.788623] sdhci-pltfm: SDHCI platform and OF driver helper

 6024 02:03:01.348130  <6>[    2.801206] ledtrig-cpu: registered to indicate activity on CPUs

 6025 02:03:01.355964  <6>[    2.808909] usbcore: registered new interface driver usbhid

 6026 02:03:01.359215  <6>[    2.814749] usbhid: USB HID core driver

 6027 02:03:01.369931  <6>[    2.819041] spi_master spi2: will run message pump with realtime priority

 6028 02:03:01.373815  <4>[    2.819205] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator

 6029 02:03:01.381053  <4>[    2.833394] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator

 6030 02:03:01.396048  <6>[    2.842572] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0

 6031 02:03:01.417003  <6>[    2.859991] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1

 6032 02:03:01.423944  <4>[    2.867001] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)

 6033 02:03:01.430652  <6>[    2.881500] cros-ec-spi spi2.0: Chrome EC device registered

 6034 02:03:01.437709  <4>[    2.887980] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)

 6035 02:03:01.449449  <4>[    2.898535] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)

 6036 02:03:01.456164  <4>[    2.907228] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)

 6037 02:03:01.466904  <6>[    2.916393] mmc1: new ultra high speed SDR104 SDIO card at address 0001

 6038 02:03:01.494868  <6>[    2.947354] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14

 6039 02:03:01.502384  <6>[    2.954988] mmc0: new HS400 MMC card at address 0001

 6040 02:03:01.509509  <6>[    2.962335] mmcblk0: mmc0:0001 TB2932 29.2 GiB 

 6041 02:03:01.521452  <6>[    2.973704]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12

 6042 02:03:01.530319  <6>[    2.982447] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB 

 6043 02:03:01.543559  <6>[    2.985620] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2

 6044 02:03:01.546599  <6>[    2.989513] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB 

 6045 02:03:01.556404  <6>[    2.994514] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound

 6046 02:03:01.566456  <6>[    2.998398] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6047 02:03:01.573301  <6>[    2.999615] NET: Registered PF_PACKET protocol family

 6048 02:03:01.576479  <6>[    2.999717] 9pnet: Installing 9P2000 support

 6049 02:03:01.579917  <5>[    2.999762] Key type dns_resolver registered

 6050 02:03:01.589720  <6>[    2.999875] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c

 6051 02:03:01.596585  <6>[    3.006576] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)

 6052 02:03:01.603115  <6>[    3.014215] registered taskstats version 1

 6053 02:03:01.609950  <6>[    3.049624] usb 1-1: new high-speed USB device number 2 using xhci-mtk

 6054 02:03:01.613098  <5>[    3.055491] Loading compiled-in X.509 certificates

 6055 02:03:01.660021  <3>[    3.109268] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517

 6056 02:03:01.691347  <6>[    3.137210] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6057 02:03:01.702516  <6>[    3.151619] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)

 6058 02:03:01.712840  <6>[    3.160369] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)

 6059 02:03:01.719234  <6>[    3.168955] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)

 6060 02:03:01.729393  <6>[    3.177480] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)

 6061 02:03:01.736058  <6>[    3.186002] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)

 6062 02:03:01.745896  <6>[    3.194524] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)

 6063 02:03:01.755982  <6>[    3.203043] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)

 6064 02:03:01.759092  <6>[    3.208673] hub 1-1:1.0: USB hub found

 6065 02:03:01.765863  <6>[    3.212334] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0

 6066 02:03:01.768951  <6>[    3.215995] hub 1-1:1.0: 3 ports detected

 6067 02:03:01.775649  <6>[    3.223086] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0

 6068 02:03:01.781998  <6>[    3.233729] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0

 6069 02:03:01.789236  <6>[    3.241034] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0

 6070 02:03:01.796351  <6>[    3.248470] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0

 6071 02:03:01.804447  <6>[    3.256750] panfrost 13040000.gpu: clock rate = 511999970

 6072 02:03:01.814547  <6>[    3.262445] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet

 6073 02:03:01.824242  <6>[    3.272783] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0

 6074 02:03:01.830975  <6>[    3.280792] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400

 6075 02:03:01.844119  <6>[    3.289228] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7

 6076 02:03:01.850595  <6>[    3.301306] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1

 6077 02:03:01.862373  <6>[    3.311402] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0

 6078 02:03:01.871981  <6>[    3.320515] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)

 6079 02:03:01.882043  <6>[    3.329666] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)

 6080 02:03:01.891913  <6>[    3.338798] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)

 6081 02:03:01.898664  <6>[    3.347927] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)

 6082 02:03:01.908776  <6>[    3.357228] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)

 6083 02:03:01.918788  <6>[    3.366531] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)

 6084 02:03:01.928679  <6>[    3.376005] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)

 6085 02:03:01.938613  <6>[    3.385480] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)

 6086 02:03:01.945610  <6>[    3.394608] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)

 6087 02:03:02.019164  <6>[    3.468385] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)

 6088 02:03:02.029360  <6>[    3.477286] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing

 6089 02:03:02.040581  <6>[    3.489311] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1

 6090 02:03:02.068742  <6>[    3.517491] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk

 6091 02:03:02.726395  <6>[    3.701735] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk

 6092 02:03:02.736549  <4>[    3.805162] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2

 6093 02:03:02.742931  <4>[    3.805180] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)

 6094 02:03:02.749574  <6>[    3.842499] r8152 1-1.2:1.0 eth0: v1.12.13

 6095 02:03:02.756352  <6>[    3.921506] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk

 6096 02:03:02.762778  <6>[    4.159044] Console: switching to colour frame buffer device 170x48

 6097 02:03:02.769410  <6>[    4.219703] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device

 6098 02:03:02.789607  <6>[    4.235709] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6099 02:03:02.807327  <6>[    4.252963] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6100 02:03:02.813980  <6>[    4.265605] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4

 6101 02:03:02.825351  <6>[    4.273919] input: volume-buttons as /devices/platform/volume-buttons/input/input5

 6102 02:03:02.835024  <6>[    4.281510] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6103 02:03:02.853949  <6>[    4.299861] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6104 02:03:04.049788  <6>[    5.502944] r8152 1-1.2:1.0 eth0: carrier on

 6105 02:03:06.557602  <5>[    5.529513] Sending DHCP requests .., OK

 6106 02:03:06.563830  <6>[    8.013960] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.17

 6107 02:03:06.567125  <6>[    8.022394] IP-Config: Complete:

 6108 02:03:06.580679  <6>[    8.025965]      device=eth0, hwaddr=00:e0:4c:68:03:2b, ipaddr=192.168.201.17, mask=255.255.255.0, gw=192.168.201.1

 6109 02:03:06.590540  <6>[    8.036906]      host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5, domain=lava-rack, nis-domain=(none)

 6110 02:03:06.601880  <6>[    8.051191]      bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=

 6111 02:03:06.610845  <6>[    8.051202]      nameserver0=192.168.201.1

 6112 02:03:06.618703  <6>[    8.071000] clk: Disabling unused clocks

 6113 02:03:06.623150  <6>[    8.078942] ALSA device list:

 6114 02:03:06.632316  <6>[    8.084984]   No soundcards found.

 6115 02:03:06.641695  <6>[    8.094114] Freeing unused kernel memory: 8512K

 6116 02:03:06.648713  <6>[    8.101258] Run /init as init process

 6117 02:03:06.681489  <6>[    8.133903] NET: Registered PF_INET6 protocol family

 6118 02:03:06.689551  <6>[    8.141624] Segment Routing with IPv6

 6119 02:03:06.692284  <6>[    8.146319] In-situ OAM (IOAM) with IPv6

 6120 02:03:06.736818  <30>[    8.162459] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)

 6121 02:03:06.748847  <30>[    8.201171] systemd[1]: Detected architecture arm64.

 6122 02:03:06.754062  

 6123 02:03:06.757295  Welcome to Debian GNU/Linux 12 (bookworm)!

 6124 02:03:06.757727  


 6125 02:03:06.773586  <30>[    8.226133] systemd[1]: Hostname set to <debian-bookworm-arm64>.

 6126 02:03:06.933123  <30>[    8.382183] systemd[1]: Queued start job for default target graphical.target.

 6127 02:03:06.958200  <30>[    8.407183] systemd[1]: Created slice system-getty.slice - Slice /system/getty.

 6128 02:03:06.967835  [  OK  ] Created slice system-getty.slice - Slice /system/getty.


 6129 02:03:06.985651  <30>[    8.434462] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.

 6130 02:03:06.995912  [  OK  ] Created slice system-modpr…lice - Slice /system/modprobe.


 6131 02:03:07.013635  <30>[    8.462776] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.

 6132 02:03:07.025256  [  OK  ] Created slice system-seria… - Slice /system/serial-getty.


 6133 02:03:07.041044  <30>[    8.490408] systemd[1]: Created slice user.slice - User and Session Slice.

 6134 02:03:07.051250  [  OK  ] Created slice user.slice - User and Session Slice.


 6135 02:03:07.071422  <30>[    8.517909] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.

 6136 02:03:07.082992  [  OK  ] Started systemd-ask-passwo…quests to Console Directory Watch.


 6137 02:03:07.103595  <30>[    8.549817] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.

 6138 02:03:07.115096  [  OK  ] Started systemd-ask-passwo… Requests to Wall Directory Watch.


 6139 02:03:07.142495  <30>[    8.581740] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).

 6140 02:03:07.160782  <30>[    8.609846] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...

 6141 02:03:07.167565           Expecting device dev-ttyS0.device - /dev/ttyS0...


 6142 02:03:07.188214  <30>[    8.637653] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.

 6143 02:03:07.200447  [  OK  ] Reached target cryptsetup.…get - Local Encrypted Volumes.


 6144 02:03:07.215981  <30>[    8.665703] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.

 6145 02:03:07.230205  [  OK  ] Reached target integrityse…Local Integrity Protected Volumes.


 6146 02:03:07.244743  <30>[    8.697761] systemd[1]: Reached target paths.target - Path Units.

 6147 02:03:07.259542  [  OK  ] Reached target paths.target - Path Units.


 6148 02:03:07.276338  <30>[    8.725692] systemd[1]: Reached target remote-fs.target - Remote File Systems.

 6149 02:03:07.288721  [  OK  ] Reached target remote-fs.target - Remote File Systems.


 6150 02:03:07.305238  <30>[    8.757817] systemd[1]: Reached target slices.target - Slice Units.

 6151 02:03:07.319992  [  OK  ] Reached target slices.target - Slice Units.


 6152 02:03:07.333016  <30>[    8.785712] systemd[1]: Reached target swap.target - Swaps.

 6153 02:03:07.343906  [  OK  ] Reached target swap.target - Swaps.


 6154 02:03:07.364303  <30>[    8.813713] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.

 6155 02:03:07.377853  [  OK  ] Reached target veritysetup… - Local Verity Protected Volumes.


 6156 02:03:07.396969  <30>[    8.846071] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.

 6157 02:03:07.410747  [  OK  ] Listening on systemd-initc… initctl Compatibility Named Pipe.


 6158 02:03:07.430549  <30>[    8.879270] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.

 6159 02:03:07.444326  [  OK  ] Listening on systemd-journ…socket - Journal Audit Socket.


 6160 02:03:07.461469  <30>[    8.910485] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).

 6161 02:03:07.475545  [  OK  ] Listening on systemd-journ…t - Journal Socket (/dev/log).


 6162 02:03:07.493624  <30>[    8.942407] systemd[1]: Listening on systemd-journald.socket - Journal Socket.

 6163 02:03:07.505692  [  OK  ] Listening on systemd-journald.socket - Journal Socket.


 6164 02:03:07.525465  <30>[    8.974465] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.

 6165 02:03:07.539194  [  OK  ] Listening on systemd-netwo… - Network Service Netlink Socket.


 6166 02:03:07.557153  <30>[    9.006358] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.

 6167 02:03:07.570874  [  OK  ] Listening on systemd-udevd….socket - udev Control Socket.


 6168 02:03:07.588750  <30>[    9.038103] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.

 6169 02:03:07.602083  [  OK  ] Listening on systemd-udevd…l.socket - udev Kernel Socket.


 6170 02:03:07.641272  <30>[    9.090271] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...

 6171 02:03:07.651663           Mounting dev-hugepages.mount - Huge Pages File System...


 6172 02:03:07.664323  <30>[    9.113234] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...

 6173 02:03:07.677204           Mounting dev-mqueue.mount…POSIX Message Queue File System...


 6174 02:03:07.702113  <30>[    9.151454] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...

 6175 02:03:07.715465           Mounting sys-kernel-debug.… - Kernel Debug File System...


 6176 02:03:07.740549  <30>[    9.182893] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).

 6177 02:03:07.785050  <30>[    9.234367] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...

 6178 02:03:07.799323           Starting kmod-static-nodes…ate List of Static Device Nodes...


 6179 02:03:07.822822  <30>[    9.271835] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...

 6180 02:03:07.834983           Starting modprobe@configfs…m - Load Kernel Module configfs...


 6181 02:03:07.877542  <30>[    9.326349] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...

 6182 02:03:07.894352           Startin<6>[    9.340359] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com

 6183 02:03:07.897525  g modprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...


 6184 02:03:07.926509  <30>[    9.375886] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...

 6185 02:03:07.939997           Starting modprobe@drm.service - Load Kernel Module drm...


 6186 02:03:07.985062  <30>[    9.434209] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...

 6187 02:03:07.997825           Starting modprobe@efi_psto…- Load Kernel Module efi_pstore...


 6188 02:03:08.022271  <30>[    9.471254] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...

 6189 02:03:08.035435           Starting modprobe@loop.ser…e - Load Kernel Module loop...


 6190 02:03:08.062140  <30>[    9.511333] systemd[1]: Starting systemd-journald.service - Journal Service...

 6191 02:03:08.075138           Starting systemd-journald.service - Journal Service...


 6192 02:03:08.117020  <30>[    9.566290] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...

 6193 02:03:08.128038           Starting systemd-modules-l…rvice - Load Kernel Modules...


 6194 02:03:08.153875  <30>[    9.598479] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...

 6195 02:03:08.165841           Starting systemd-network-g… units from Kernel command line...


 6196 02:03:08.190332  <30>[    9.639376] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...

 6197 02:03:08.204639           Starting systemd-remount-f…nt Root and Kernel File Systems...


 6198 02:03:08.237072  <30>[    9.686136] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...

 6199 02:03:08.249003           Starting systemd-udev-trig…[0m - Coldplug All udev Devices...


 6200 02:03:08.268467  <30>[    9.717719] systemd[1]: Started systemd-journald.service - Journal Service.

 6201 02:03:08.278432  [  OK  ] Started systemd-journald.service - Journal Service.


 6202 02:03:08.298668  [  OK  ] Mounted dev-hugepages.mount - Huge Pages File System.


 6203 02:03:08.317264  [  OK  ] Mounted dev-mqueue.mount[…- POSIX Message Queue File System.


 6204 02:03:08.337510  [  OK  ] Mounted sys-kernel-debug.m…nt - Kernel Debug File System.


 6205 02:03:08.357964  [  OK  ] Finished kmod-static-nodes…reate List of Static Device Nodes.


 6206 02:03:08.379799  [  OK  ] Finished modprobe@configfs…[0m - Load Kernel Module configfs.


 6207 02:03:08.399166  [  OK  ] Finished modprobe@dm_mod.s…e - Load Kernel Module dm_mod.


 6208 02:03:08.419719  [  OK  ] Finished modprobe@drm.service - Load Kernel Module drm.


 6209 02:03:08.439441  [  OK  ] Finished modprobe@efi_psto…m - Load Kernel Module efi_pstore.


 6210 02:03:08.459236  [  OK  ] Finished modprobe@loop.service - Load Kernel Module loop.


 6211 02:03:08.478686  [  OK  ] Finished systemd-modules-l…service - Load Kernel Modules.


 6212 02:03:08.498034  [  OK  ] Finished systemd-network-g…rk units from Kernel command line.


 6213 02:03:08.523556  [  OK  ] Reached target network-pre…get - Preparation for Network.


 6214 02:03:08.565556           Mounting sys-kernel-config…ernel Configuration File System...


 6215 02:03:08.593132           Starting systemd-sysctl.se…ce - Apply Kernel Variables...


 6216 02:03:08.622573  [FAILED] Failed to start systemd-re…ount Root and Kernel File Systems.


 6217 02:03:08.629306  See 'systemctl status systemd-remount-fs.service' for details.


 6218 02:03:08.641474  [  OK  ] Finished systemd-udev-trig…e - Coldplug All udev Devices.


 6219 02:03:08.666188  [  OK  ] Mounted sys-kernel-config.… Kernel Configuration File System.


 6220 02:03:08.685754  [  OK  ] Finished systemd-sysctl.service - Apply Kernel Variables.


 6221 02:03:08.733888           Starting systemd-journal-f…h Journal to Persistent Storage...


 6222 02:03:08.751010  <46>[   10.200527] systemd-journald[199]: Received client request to flush runtime journal.

 6223 02:03:08.764394           Starting systemd-random-se…ice - Load/Save Random Seed...


 6224 02:03:08.786451           Starting systemd-sysusers.…rvice - Create System Users...


 6225 02:03:08.809883  [  OK  ] Finished systemd-journal-f…ush Journal to Persistent Storage.


 6226 02:03:08.831305  [  OK  ] Finished systemd-random-se…rvice - Load/Save Random Seed.


 6227 02:03:08.850074  [  OK  ] Finished systemd-sysusers.service - Create System Users.


 6228 02:03:08.894414           Starting systemd-tmpfiles-…ate Static Device Nodes in /dev...


 6229 02:03:08.924105  [  OK  ] Finished systemd-tmpfiles-…reate Static Device Nodes in /dev.


 6230 02:03:08.942073  [  OK  ] Reached target local-fs-pr…reparation for Local File Systems.


 6231 02:03:08.964898  [  OK  ] Reached target local-fs.target - Local File Systems.


 6232 02:03:09.010074           Starting systemd-tmpfiles-… Volatile Files and Directories...


 6233 02:03:09.034072           Starting systemd-udevd.ser…ger for Device Events and Files...


 6234 02:03:09.057772  [  OK  ] Finished systemd-tmpfiles-…te Volatile Files and Directories.


 6235 02:03:09.105368           Starting systemd-timesyncd… - Network Time Synchronization...


 6236 02:03:09.123947           Starting systemd-update-ut…rd System Boot/Shutdown in UTMP...


 6237 02:03:09.145925  [  OK  ] Started systemd-udevd.serv…nager for Device Events and Files.


 6238 02:03:09.182389  [  OK  ] Finished systemd-update-ut…cord System Boot/Shutdown in UTMP.


 6239 02:03:09.207055  [  OK  ] Started systemd-timesyncd.…0m - Network Time Synchronization.


 6240 02:03:09.230840  [  OK  ] Found device dev-ttyS0.device - /dev/ttyS0.


 6241 02:03:09.301373  <6>[   10.750401] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)

 6242 02:03:09.315877  <4>[   10.764886] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW

 6243 02:03:09.330688  <6>[   10.779642] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20

 6244 02:03:09.351309  <6>[   10.796821] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6245 02:03:09.367106  <3>[   10.812213] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015

 6246 02:03:09.369651  <3>[   10.812547] mtk-scp 10500000.scp: invalid resource

 6247 02:03:09.376998  <3>[   10.822239] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22

 6248 02:03:09.387013  <3>[   10.822246] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7  on device pinctrl_paris

 6249 02:03:09.393750  <3>[   10.822254] elan_i2c 2-0015: Error applying setting, reverse things back

 6250 02:03:09.404173  <3>[   10.823739] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6251 02:03:09.409887  <6>[   10.827474] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000

 6252 02:03:09.419670  <3>[   10.834263] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6253 02:03:09.426623  <6>[   10.851123] remoteproc remoteproc0: scp is available

 6254 02:03:09.433251  <4>[   10.851192] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator

 6255 02:03:09.443148  <3>[   10.852064] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6256 02:03:09.449730  <4>[   10.860785] elants_i2c 0-0010: supply vccio not found, using dummy regulator

 6257 02:03:09.460015  <4>[   10.860821] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2

 6258 02:03:09.466249  <6>[   10.860829] remoteproc remoteproc0: powering up scp

 6259 02:03:09.473569  <4>[   10.860845] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2

 6260 02:03:09.480065  <3>[   10.860848] remoteproc remoteproc0: request_firmware failed: -2

 6261 02:03:09.489639  <3>[   10.890156] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6262 02:03:09.493426  <6>[   10.928342] mc: Linux media interface: v0.10

 6263 02:03:09.503655  <3>[   10.931819] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6264 02:03:09.519920  <3>[   10.969002] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6265 02:03:09.529815  <3>[   10.978332] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6266 02:03:09.539920  <3>[   10.987620] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6267 02:03:09.550060  <3>[   10.990187] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!

 6268 02:03:09.560214  <3>[   10.996210] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6269 02:03:09.566409  <6>[   11.010265] videodev: Linux video capture interface: v2.00

 6270 02:03:09.572907  <6>[   11.024680]  cs_system_cfg: CoreSight Configuration manager initialised

 6271 02:03:09.589764  <3>[   11.035559] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'

 6272 02:03:09.596673  <5>[   11.040796] cfg80211: Loading compiled-in X.509 certificates for regulatory database

 6273 02:03:09.606953  <6>[   11.045292] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered

 6274 02:03:09.613677  <3>[   11.048319] debugfs: File 'Playback' in directory 'dapm' already present!

 6275 02:03:09.619826  <6>[   11.049061] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized

 6276 02:03:09.630083  <6>[   11.049428] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized

 6277 02:03:09.636952  <6>[   11.049785] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized

 6278 02:03:09.643325  <6>[   11.055464] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized

 6279 02:03:09.653159  <3>[   11.063545] debugfs: File 'Capture' in directory 'dapm' already present!

 6280 02:03:09.662853  <6>[   11.067079] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7

 6281 02:03:09.670325  <6>[   11.071281] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized

 6282 02:03:09.676256  <5>[   11.079321] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'

 6283 02:03:09.682988  <6>[   11.086270] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized

 6284 02:03:09.696865  <6>[   11.094645] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6

 6285 02:03:09.703969  <5>[   11.094864] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'

 6286 02:03:09.714003  <4>[   11.094955] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2

 6287 02:03:09.717036  <6>[   11.094964] cfg80211: failed to load regulatory.db

 6288 02:03:09.727763  <6>[   11.109886] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized

 6289 02:03:09.730730  <6>[   11.120901] Bluetooth: Core ver 2.22

 6290 02:03:09.738044  <6>[   11.127864] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized

 6291 02:03:09.744544  <3>[   11.130335] thermal_sys: Failed to find 'trips' node

 6292 02:03:09.750909  <3>[   11.130343] thermal_sys: Failed to find trip points for thermal-sensor1 id=0

 6293 02:03:09.761151  <3>[   11.130350] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22

 6294 02:03:09.767915  <4>[   11.130354] generic-adc-thermal: probe of thermal-sensor1 failed with error -22

 6295 02:03:09.775148  <3>[   11.132934] thermal_sys: Failed to find 'trips' node

 6296 02:03:09.781581  <3>[   11.132941] thermal_sys: Failed to find trip points for thermal-sensor2 id=0

 6297 02:03:09.791448  <3>[   11.132948] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22

 6298 02:03:09.797766  <4>[   11.132952] generic-adc-thermal: probe of thermal-sensor2 failed with error -22

 6299 02:03:09.804466  <6>[   11.136755] NET: Registered PF_BLUETOOTH protocol family

 6300 02:03:09.811376  <6>[   11.143627] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)

 6301 02:03:09.818538  <6>[   11.153283] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0

 6302 02:03:09.825343  <6>[   11.153294] Bluetooth: HCI device and connection manager initialized

 6303 02:03:09.828533  <6>[   11.153315] Bluetooth: HCI socket layer initialized

 6304 02:03:09.835619  <6>[   11.153321] Bluetooth: L2CAP socket layer initialized

 6305 02:03:09.842501  <6>[   11.153389] Bluetooth: SCO socket layer initialized

 6306 02:03:09.856053  <6>[   11.179052] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8

 6307 02:03:09.862504  <6>[   11.184464] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0

 6308 02:03:09.869329  <6>[   11.185217] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video2

 6309 02:03:09.875967  <6>[   11.188553] usbcore: registered new interface driver uvcvideo

 6310 02:03:09.882608  <6>[   11.196353] Bluetooth: HCI UART driver ver 2.3

 6311 02:03:09.892703  <6>[   11.196426] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)

 6312 02:03:09.902238  <6>[   11.232990] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000

 6313 02:03:09.908928  <6>[   11.240258] Bluetooth: HCI UART protocol H4 registered

 6314 02:03:09.915588  <6>[   11.240316] Bluetooth: HCI UART protocol LL registered

 6315 02:03:09.922204  <6>[   11.248699] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0

 6316 02:03:09.929077  <6>[   11.256264] Bluetooth: HCI UART protocol Three-wire (H5) registered

 6317 02:03:09.942252  <6>[   11.261896] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77

 6318 02:03:09.949328  <6>[   11.268599] Bluetooth: HCI UART protocol Broadcom registered

 6319 02:03:09.959129  <4>[   11.401830] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.

 6320 02:03:09.963173  <4>[   11.401830] Fallback method does not support PEC.

 6321 02:03:09.966916  <6>[   11.406178] Bluetooth: HCI UART protocol QCA registered

 6322 02:03:09.973629  <6>[   11.406195] Bluetooth: HCI UART protocol Marvell registered

 6323 02:03:09.983762  <6>[   11.407947] Bluetooth: hci0: setting up ROME/QCA6390

 6324 02:03:09.994924  <3>[   11.422716] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6325 02:03:10.026242  <6>[   11.473984] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91

 6326 02:03:10.075729  [  OK  ] Created slice system-syste…- Slic<3>[   11.524823] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6327 02:03:10.079098  e /system/systemd-backlight.


 6328 02:03:10.089727  <3>[   11.538565] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6329 02:03:10.096112  <3>[   11.539347] power_supply sbs-12-000b: driver failed to report `technology' property: -6

 6330 02:03:10.118699  [  OK  ] Reached target time-set.target - System Time Se<3>[   11.565709] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6331 02:03:10.119221  t.


 6332 02:03:10.129650  <3>[   11.576407] power_supply sbs-12-000b: driver failed to report `capacity_level' property: -6

 6333 02:03:10.136343  <3>[   11.583173] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6334 02:03:10.151360  [  OK  ] Listening on systemd-rfkil…l Switch Status /dev/rfkill Watch.


 6335 02:03:10.157793  <3>[   11.606938] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6336 02:03:10.177679  <3>[   11.626233] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6337 02:03:10.192771  <3>[   11.641628] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6338 02:03:10.196918  <3>[   11.648546] Bluetooth: hci0: Frame reassembly failed (-84)

 6339 02:03:10.212770           Starting systemd-backlight…ess of backlight:backlight_lcd0...


 6340 02:03:10.241027           Starting systemd-networkd.…ice - Network Configuration...


 6341 02:03:10.261448  [  OK  ] Finished systemd-backlight…tness of backlight:backlight_lcd0.


 6342 02:03:10.307842  [  OK  ] Started systemd-networkd.service - Network Configuration.


 6343 02:03:10.325708  [  OK  ] Reached target bluetooth.target - Bluetooth Support.


 6344 02:03:10.337865  [  OK  ] Reached target network.target - Network.


 6345 02:03:10.357859  [  OK  ] Reached target sound.target - Sound Card.


 6346 02:03:10.378310  [  OK  ] Reached target sysinit.target - System Initialization.


 6347 02:03:10.396027  [  OK  ] Started fstrim.timer - Discard unused blocks once a week.


 6348 02:03:10.411535  [  OK  ] Started systemd-tmpfiles-c… Cleanup of Temporary Directories.


 6349 02:03:10.427534  [  OK  ] Reached target timers.target - Timer Units.


 6350 02:03:10.445415  [  OK  ] Listening on dbus.socket[…- D-Bus System Message Bus Socket.


 6351 02:03:10.460806  [  OK  ] Reached target sockets.target - Socket Units.


 6352 02:03:10.481907  [  OK  ] Reached targ<6>[   11.930422] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1

 6353 02:03:10.488706  <6>[   11.931918] Bluetooth: hci0: QCA Product ID   :0x00000008

 6354 02:03:10.491764  et basic.target - Basic System.


 6355 02:03:10.501082  <6>[   11.954054] Bluetooth: hci0: QCA SOC Version  :0x00000044

 6356 02:03:10.510707  <6>[   11.963584] Bluetooth: hci0: QCA ROM Version  :0x00000302

 6357 02:03:10.520085  <6>[   11.973087] Bluetooth: hci0: QCA Patch Version:0x00000111

 6358 02:03:10.529127  <6>[   11.982010] Bluetooth: hci0: QCA controller version 0x00440302

 6359 02:03:10.541296  <6>[   11.990704] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin

 6360 02:03:10.551098  <4>[   11.999788] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2

 6361 02:03:10.561704  <3>[   12.011119] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)

 6362 02:03:10.568791  <4>[   12.013748] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)

 6363 02:03:10.575004  <3>[   12.019401] Bluetooth: hci0: QCA Failed to download patch (-2)

 6364 02:03:10.586965  <4>[   12.036430] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)

 6365 02:03:10.599846  <4>[   12.049550] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)

 6366 02:03:10.608134  <4>[   12.060798] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)

 6367 02:03:10.624792           Starting dbus.service - D-Bus System Message Bus...


 6368 02:03:10.659736           Starting systemd-logind.se…ice - User Login Management...


 6369 02:03:10.718146           Starting systemd-rfkill.se…Load/Save RF Kill Switch Status...


 6370 02:03:10.737406           Starting systemd-user-sess…vice - Permit User Sessions...


 6371 02:03:10.756068  [  OK  ] Started dbus.service - D-Bus System Message Bus.


 6372 02:03:10.786183  [  OK  ] Started systemd-rfkill.ser…- Load/Save RF Kill Switch Status.


 6373 02:03:10.806058  [  OK  ] Finished systemd-user-sess…ervice - Permit User Sessions.


 6374 02:03:10.867679  [  OK  ] Started getty@tty1.service - Getty on tty1.


 6375 02:03:10.908498  [  OK  ] Started serial-getty@ttyS0…rvice - Serial Getty on ttyS0.


 6376 02:03:10.928785  [  OK  ] Reached target getty.target - Login Prompts.


 6377 02:03:10.946472  [  OK  ] Started systemd-logind.service - User Login Management.


 6378 02:03:10.968333  [  OK  ] Reached target multi-user.target - Multi-User System.


 6379 02:03:10.986849  [  OK  ] Reached target graphical.target - Graphical Interface.


 6380 02:03:11.032335           Starting systemd-update-ut… Record Runlevel Change in UTMP...


 6381 02:03:11.062277  [  OK  ] Finished systemd-update-ut… - Record Runlevel Change in UTMP.


 6382 02:03:11.129884  


 6383 02:03:11.133300  Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0

 6384 02:03:11.133386  

 6385 02:03:11.136391  debian-bookworm-arm64 login: root (automatic login)

 6386 02:03:11.136468  


 6387 02:03:11.161666  Linux debian-bookworm-arm64 6.1.94-cip23 #1 SMP PREEMPT Fri Jun 21 00:04:56 UTC 2024 aarch64

 6388 02:03:11.161762  

 6389 02:03:11.168441  The programs included with the Debian GNU/Linux system are free software;

 6390 02:03:11.174770  the exact distribution terms for each program are described in the

 6391 02:03:11.178030  individual files in /usr/share/doc/*/copyright.

 6392 02:03:11.178105  

 6393 02:03:11.184965  Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent

 6394 02:03:11.188205  permitted by applicable law.

 6395 02:03:11.188585  Matched prompt #10: / #
 6397 02:03:11.188773  Setting prompt string to ['/ #']
 6398 02:03:11.188860  end: 2.2.5.1 login-action (duration 00:00:13) [common]
 6400 02:03:11.189037  end: 2.2.5 auto-login-action (duration 00:00:13) [common]
 6401 02:03:11.189117  start: 2.2.6 expect-shell-connection (timeout 00:03:43) [common]
 6402 02:03:11.189185  Setting prompt string to ['/ #']
 6403 02:03:11.189240  Forcing a shell prompt, looking for ['/ #']
 6405 02:03:11.239466  / # 

 6406 02:03:11.239674  expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
 6407 02:03:11.239790  Waiting using forced prompt support (timeout 00:02:30)
 6408 02:03:11.244606  

 6409 02:03:11.244873  end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
 6410 02:03:11.244965  start: 2.2.7 export-device-env (timeout 00:03:43) [common]
 6411 02:03:11.245048  end: 2.2.7 export-device-env (duration 00:00:00) [common]
 6412 02:03:11.245127  end: 2.2 depthcharge-retry (duration 00:01:17) [common]
 6413 02:03:11.245210  end: 2 depthcharge-action (duration 00:01:17) [common]
 6414 02:03:11.245291  start: 3 lava-test-retry (timeout 00:08:22) [common]
 6415 02:03:11.245369  start: 3.1 lava-test-shell (timeout 00:08:22) [common]
 6416 02:03:11.245471  Using namespace: common
 6418 02:03:11.345804  / # #

 6419 02:03:11.346010  lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
 6420 02:03:11.350912  #

 6421 02:03:11.351167  Using /lava-14479226
 6423 02:03:11.451511  / # export SHELL=/bin/sh

 6424 02:03:11.456604  export SHELL=/bin/sh

 6426 02:03:11.557146  / # . /lava-14479226/environment

 6427 02:03:11.562156  . /lava-14479226/environment

 6429 02:03:11.662755  / # /lava-14479226/bin/lava-test-runner /lava-14479226/0

 6430 02:03:11.662965  Test shell timeout: 10s (minimum of the action and connection timeout)
 6431 02:03:11.667979  /lava-14479226/bin/lava-test-runner /lava-14479226/0

 6432 02:03:11.694663  + export TESTRUN_ID=0_v4l2-compliance-uvc

 6433 02:03:11.697962  + cd /lava-14479226/0/tests/0_v4l2-compliance-uvc

 6434 02:03:11.698045  + cat uuid

 6435 02:03:11.701254  + UUID=14479226_1.5.2.3.1

 6436 02:03:11.701331  + set +x

 6437 02:03:11.707915  <LAVA_SIGNAL_STARTRUN 0_v4l2-compliance-uvc 14479226_1.5.2.3.1>

 6438 02:03:11.708172  Received signal: <STARTRUN> 0_v4l2-compliance-uvc 14479226_1.5.2.3.1
 6439 02:03:11.708241  Starting test lava.0_v4l2-compliance-uvc (14479226_1.5.2.3.1)
 6440 02:03:11.708319  Skipping test definition patterns.
 6441 02:03:11.711245  + /usr/bin/v4l2-parser.sh -d uvcvideo

 6442 02:03:11.717717  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=device-presence RESULT=pass>

 6443 02:03:11.717795  device: /dev/video0

 6444 02:03:11.718022  Received signal: <TESTCASE> TEST_CASE_ID=device-presence RESULT=pass
 6446 02:03:18.691684  v4l2-compliance 1.27.0-1, 64 bits, 64-bit time_t

 6447 02:03:18.708719  v4l2-compliance SHA: a18611d8960f 2024-03-08 13:09:54

 6448 02:03:18.719209  

 6449 02:03:18.735113  Compliance test for uvcvideo device /dev/video0:

 6450 02:03:18.744711  

 6451 02:03:18.759021  Driver Info:

 6452 02:03:18.773842  	Driver name      : uvcvideo

 6453 02:03:18.791596  	Card type        : HD WebCam: HD WebCam

 6454 02:03:18.805910  	Bus info         : usb-11200000.usb-1.3

 6455 02:03:18.818798  	Driver version   : 6.1.94

 6456 02:03:18.832896  	Capabilities     : 0x84a00001

 6457 02:03:18.855217  		Metadata Capture

 6458 02:03:18.871787  		Streaming

 6459 02:03:18.886360  		Extended Pix Format

 6460 02:03:18.901057  		Device Capabilities

 6461 02:03:18.916455  	Device Caps      : 0x04200001

 6462 02:03:18.934933  		Streaming

 6463 02:03:18.948713  		Extended Pix Format

 6464 02:03:18.963144  Media Driver Info:

 6465 02:03:18.978319  	Driver name      : uvcvideo

 6466 02:03:18.994115  	Model            : HD WebCam: HD WebCam

 6467 02:03:19.004756  	Serial           : 

 6468 02:03:19.021862  	Bus info         : usb-11200000.usb-1.3

 6469 02:03:19.036938  	Media version    : 6.1.94

 6470 02:03:19.052130  	Hardware revision: 0x00003269 (12905)

 6471 02:03:19.066158  	Driver version   : 6.1.94

 6472 02:03:19.081042  Interface Info:

 6473 02:03:19.102092  <LAVA_SIGNAL_TESTSET START Interface-Info>

 6474 02:03:19.102656  	ID               : 0x03000002

 6475 02:03:19.103306  Received signal: <TESTSET> START Interface-Info
 6476 02:03:19.103672  Starting test_set Interface-Info
 6477 02:03:19.118897  	Type             : V4L Video

 6478 02:03:19.134572  Entity Info:

 6479 02:03:19.147184  <LAVA_SIGNAL_TESTSET STOP>

 6480 02:03:19.148061  Received signal: <TESTSET> STOP
 6481 02:03:19.148655  Closing test_set Interface-Info
 6482 02:03:19.158630  <LAVA_SIGNAL_TESTSET START Entity-Info>

 6483 02:03:19.159595  Received signal: <TESTSET> START Entity-Info
 6484 02:03:19.159980  Starting test_set Entity-Info
 6485 02:03:19.161856  	ID               : 0x00000001 (1)

 6486 02:03:19.176800  	Name             : HD WebCam: HD WebCam

 6487 02:03:19.187955  	Function         : V4L2 I/O

 6488 02:03:19.200772  	Flags            : default

 6489 02:03:19.214679  	Pad 0x01000007   : 0: Sink

 6490 02:03:19.238127  	  Link 0x02000013: from remote pad 0x100000a of entity 'Extension 4' (Video Pixel Formatter): Data, Enabled, Immutable

 6491 02:03:19.242418  

 6492 02:03:19.256071  Required ioctls:

 6493 02:03:19.264800  <LAVA_SIGNAL_TESTSET STOP>

 6494 02:03:19.265568  Received signal: <TESTSET> STOP
 6495 02:03:19.265923  Closing test_set Entity-Info
 6496 02:03:19.276311  <LAVA_SIGNAL_TESTSET START Required-ioctls>

 6497 02:03:19.277078  Received signal: <TESTSET> START Required-ioctls
 6498 02:03:19.277438  Starting test_set Required-ioctls
 6499 02:03:19.279516  	test MC information (see 'Media Driver Info' above): OK

 6500 02:03:19.309099  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MC-information-see-Media-Driver-Info-above RESULT=pass>

 6501 02:03:19.309877  Received signal: <TESTCASE> TEST_CASE_ID=MC-information-see-Media-Driver-Info-above RESULT=pass
 6503 02:03:19.311755  	test VIDIOC_QUERYCAP: OK

 6504 02:03:19.336445  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass>

 6505 02:03:19.337216  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass
 6507 02:03:19.339760  	test invalid ioctls: OK

 6508 02:03:19.366957  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-ioctls RESULT=pass>

 6509 02:03:19.367468  

 6510 02:03:19.368051  Received signal: <TESTCASE> TEST_CASE_ID=invalid-ioctls RESULT=pass
 6512 02:03:19.381033  Allow for multiple opens:

 6513 02:03:19.391517  <LAVA_SIGNAL_TESTSET STOP>

 6514 02:03:19.392276  Received signal: <TESTSET> STOP
 6515 02:03:19.392643  Closing test_set Required-ioctls
 6516 02:03:19.402157  <LAVA_SIGNAL_TESTSET START Allow-for-multiple-opens>

 6517 02:03:19.402979  Received signal: <TESTSET> START Allow-for-multiple-opens
 6518 02:03:19.403344  Starting test_set Allow-for-multiple-opens
 6519 02:03:19.405862  	test second /dev/video0 open: OK

 6520 02:03:19.431908  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=second-/dev/video0-open RESULT=pass>

 6521 02:03:19.432676  Received signal: <TESTCASE> TEST_CASE_ID=second-/dev/video0-open RESULT=pass
 6523 02:03:19.434924  	test VIDIOC_QUERYCAP: OK

 6524 02:03:19.457959  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass>

 6525 02:03:19.458769  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass
 6527 02:03:19.461075  	test VIDIOC_G/S_PRIORITY: OK

 6528 02:03:19.489750  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_PRIORITY RESULT=pass>

 6529 02:03:19.490554  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_PRIORITY RESULT=pass
 6531 02:03:19.493111  	test for unlimited opens: OK

 6532 02:03:19.519967  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=for-unlimited-opens RESULT=pass>

 6533 02:03:19.520482  

 6534 02:03:19.521071  Received signal: <TESTCASE> TEST_CASE_ID=for-unlimited-opens RESULT=pass
 6536 02:03:19.536419  Debug ioctls:

 6537 02:03:19.545862  <LAVA_SIGNAL_TESTSET STOP>

 6538 02:03:19.546659  Received signal: <TESTSET> STOP
 6539 02:03:19.547019  Closing test_set Allow-for-multiple-opens
 6540 02:03:19.557343  <LAVA_SIGNAL_TESTSET START Debug-ioctls>

 6541 02:03:19.558104  Received signal: <TESTSET> START Debug-ioctls
 6542 02:03:19.558522  Starting test_set Debug-ioctls
 6543 02:03:19.560541  	test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)

 6544 02:03:19.587123  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_DBG_G/S_REGISTER RESULT=pass>

 6545 02:03:19.587885  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_DBG_G/S_REGISTER RESULT=pass
 6547 02:03:19.593421  	test VIDIOC_LOG_STATUS: OK (Not Supported)

 6548 02:03:19.615627  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_LOG_STATUS RESULT=pass>

 6549 02:03:19.616172  

 6550 02:03:19.616751  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_LOG_STATUS RESULT=pass
 6552 02:03:19.630317  Input ioctls:

 6553 02:03:19.640758  <LAVA_SIGNAL_TESTSET STOP>

 6554 02:03:19.641516  Received signal: <TESTSET> STOP
 6555 02:03:19.641862  Closing test_set Debug-ioctls
 6556 02:03:19.650958  <LAVA_SIGNAL_TESTSET START Input-ioctls>

 6557 02:03:19.651723  Received signal: <TESTSET> START Input-ioctls
 6558 02:03:19.652095  Starting test_set Input-ioctls
 6559 02:03:19.654206  	test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)

 6560 02:03:19.685340  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS RESULT=pass>

 6561 02:03:19.686103  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS RESULT=pass
 6563 02:03:19.688757  	test VIDIOC_G/S_FREQUENCY: OK (Not Supported)

 6564 02:03:19.711616  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass>

 6565 02:03:19.712391  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass
 6567 02:03:19.718184  	test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)

 6568 02:03:19.743205  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_S_HW_FREQ_SEEK RESULT=pass>

 6569 02:03:19.743974  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_S_HW_FREQ_SEEK RESULT=pass
 6571 02:03:19.749948  	test VIDIOC_ENUMAUDIO: OK (Not Supported)

 6572 02:03:19.775754  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUMAUDIO RESULT=pass>

 6573 02:03:19.776526  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUMAUDIO RESULT=pass
 6575 02:03:19.779212  	test VIDIOC_G/S/ENUMINPUT: OK

 6576 02:03:19.804367  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/ENUMINPUT RESULT=pass>

 6577 02:03:19.805179  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/ENUMINPUT RESULT=pass
 6579 02:03:19.811085  	test VIDIOC_G/S_AUDIO: OK (Not Supported)

 6580 02:03:19.835140  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_AUDIO RESULT=pass>

 6581 02:03:19.835905  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_AUDIO RESULT=pass
 6583 02:03:19.838147  	Inputs: 1 Audio Inputs: 0 Tuners: 0

 6584 02:03:19.852410  

 6585 02:03:19.874907  	test VIDIOC_G/S_MODULATOR: OK (Not Supported)

 6586 02:03:19.898113  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_MODULATOR RESULT=pass>

 6587 02:03:19.898919  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_MODULATOR RESULT=pass
 6589 02:03:19.904684  	test VIDIOC_G/S_FREQUENCY: OK (Not Supported)

 6590 02:03:19.927311  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass>

 6591 02:03:19.928071  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass
 6593 02:03:19.933924  	test VIDIOC_ENUMAUDOUT: OK (Not Supported)

 6594 02:03:19.958108  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUMAUDOUT RESULT=pass>

 6595 02:03:19.958902  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUMAUDOUT RESULT=pass
 6597 02:03:19.965000  	test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)

 6598 02:03:19.989584  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/ENUMOUTPUT RESULT=pass>

 6599 02:03:19.990336  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/ENUMOUTPUT RESULT=pass
 6601 02:03:19.995686  	test VIDIOC_G/S_AUDOUT: OK (Not Supported)

 6602 02:03:20.022125  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_AUDOUT RESULT=pass>

 6603 02:03:20.022683  

 6604 02:03:20.023269  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_AUDOUT RESULT=pass
 6606 02:03:20.045840  	test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)

 6607 02:03:20.074869  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_STD RESULT=pass>

 6608 02:03:20.075632  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_STD RESULT=pass
 6610 02:03:20.081539  	test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)

 6611 02:03:20.110189  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS RESULT=pass>

 6612 02:03:20.110952  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS RESULT=pass
 6614 02:03:20.113674  	test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)

 6615 02:03:20.138862  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_DV_TIMINGS_CAP RESULT=pass>

 6616 02:03:20.139628  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_DV_TIMINGS_CAP RESULT=pass
 6618 02:03:20.141914  	test VIDIOC_G/S_EDID: OK (Not Supported)

 6619 02:03:20.169791  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_EDID RESULT=pass>

 6620 02:03:20.170345  

 6621 02:03:20.170933  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_EDID RESULT=pass
 6623 02:03:20.182282  Control ioctls (Input 0):

 6624 02:03:20.191119  <LAVA_SIGNAL_TESTSET STOP>

 6625 02:03:20.191874  Received signal: <TESTSET> STOP
 6626 02:03:20.192218  Closing test_set Input-ioctls
 6627 02:03:20.201960  <LAVA_SIGNAL_TESTSET START Control-ioctls-Input-0>

 6628 02:03:20.202773  Received signal: <TESTSET> START Control-ioctls-Input-0
 6629 02:03:20.203134  Starting test_set Control-ioctls-Input-0
 6630 02:03:20.205438  	test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK

 6631 02:03:20.238474  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERY_EXT_CTRL/QUERYMENU RESULT=pass>

 6632 02:03:20.239006  	test VIDIOC_QUERYCTRL: OK

 6633 02:03:20.239593  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERY_EXT_CTRL/QUERYMENU RESULT=pass
 6635 02:03:20.266715  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCTRL RESULT=pass>

 6636 02:03:20.267453  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCTRL RESULT=pass
 6638 02:03:20.269622  	test VIDIOC_G/S_CTRL: OK

 6639 02:03:20.296840  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_CTRL RESULT=pass>

 6640 02:03:20.297610  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_CTRL RESULT=pass
 6642 02:03:20.299778  	test VIDIOC_G/S/TRY_EXT_CTRLS: OK

 6643 02:03:20.329176  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/TRY_EXT_CTRLS RESULT=pass>

 6644 02:03:20.329802  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/TRY_EXT_CTRLS RESULT=pass
 6646 02:03:20.335952  	test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK

 6647 02:03:20.363877  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT RESULT=pass>

 6648 02:03:20.364620  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT RESULT=pass
 6650 02:03:20.367217  	test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)

 6651 02:03:20.392087  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_JPEGCOMP RESULT=pass>

 6652 02:03:20.392911  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_JPEGCOMP RESULT=pass
 6654 02:03:20.395589  	Standard Controls: 15 Private Controls: 0

 6655 02:03:20.405732  

 6656 02:03:20.422125  Format ioctls (Input 0):

 6657 02:03:20.431406  <LAVA_SIGNAL_TESTSET STOP>

 6658 02:03:20.432165  Received signal: <TESTSET> STOP
 6659 02:03:20.432507  Closing test_set Control-ioctls-Input-0
 6660 02:03:20.441902  <LAVA_SIGNAL_TESTSET START Format-ioctls-Input-0>

 6661 02:03:20.442716  Received signal: <TESTSET> START Format-ioctls-Input-0
 6662 02:03:20.443077  Starting test_set Format-ioctls-Input-0
 6663 02:03:20.445253  	test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK

 6664 02:03:20.476267  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS RESULT=pass>

 6665 02:03:20.477074  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS RESULT=pass
 6667 02:03:20.479573  	test VIDIOC_G/S_PARM: OK

 6668 02:03:20.503818  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_PARM RESULT=pass>

 6669 02:03:20.504580  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_PARM RESULT=pass
 6671 02:03:20.506662  	test VIDIOC_G_FBUF: OK (Not Supported)

 6672 02:03:20.535716  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_FBUF RESULT=pass>

 6673 02:03:20.536474  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_FBUF RESULT=pass
 6675 02:03:20.538416  	test VIDIOC_G_FMT: OK

 6676 02:03:20.565639  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_FMT RESULT=pass>

 6677 02:03:20.566385  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_FMT RESULT=pass
 6679 02:03:20.568693  	test VIDIOC_TRY_FMT: OK

 6680 02:03:20.594834  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_FMT RESULT=pass>

 6681 02:03:20.595603  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_FMT RESULT=pass
 6683 02:03:20.601492  		warn: v4l2-test-formats.cpp(1046): Could not set fmt2

 6684 02:03:20.608554  	test VIDIOC_S_FMT: OK

 6685 02:03:20.639973  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_S_FMT RESULT=pass>

 6686 02:03:20.640737  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_S_FMT RESULT=pass
 6688 02:03:20.643745  	test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)

 6689 02:03:20.678723  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_SLICED_VBI_CAP RESULT=pass>

 6690 02:03:20.679481  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_SLICED_VBI_CAP RESULT=pass
 6692 02:03:20.682074  	test Cropping: OK (Not Supported)

 6693 02:03:20.707730  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Cropping RESULT=pass>

 6694 02:03:20.708495  Received signal: <TESTCASE> TEST_CASE_ID=Cropping RESULT=pass
 6696 02:03:20.710692  	test Composing: OK (Not Supported)

 6697 02:03:20.739811  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Composing RESULT=pass>

 6698 02:03:20.740569  Received signal: <TESTCASE> TEST_CASE_ID=Composing RESULT=pass
 6700 02:03:20.742876  	test Scaling: OK (Not Supported)

 6701 02:03:20.771690  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Scaling RESULT=pass>

 6702 02:03:20.772202  

 6703 02:03:20.772778  Received signal: <TESTCASE> TEST_CASE_ID=Scaling RESULT=pass
 6705 02:03:20.786822  Codec ioctls (Input 0):

 6706 02:03:20.795860  <LAVA_SIGNAL_TESTSET STOP>

 6707 02:03:20.796644  Received signal: <TESTSET> STOP
 6708 02:03:20.796994  Closing test_set Format-ioctls-Input-0
 6709 02:03:20.806442  <LAVA_SIGNAL_TESTSET START Codec-ioctls-Input-0>

 6710 02:03:20.807355  Received signal: <TESTSET> START Codec-ioctls-Input-0
 6711 02:03:20.807729  Starting test_set Codec-ioctls-Input-0
 6712 02:03:20.809670  	test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)

 6713 02:03:20.837349  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_ENCODER_CMD RESULT=pass>

 6714 02:03:20.838060  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_ENCODER_CMD RESULT=pass
 6716 02:03:20.844222  	test VIDIOC_G_ENC_INDEX: OK (Not Supported)

 6717 02:03:20.868289  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_ENC_INDEX RESULT=pass>

 6718 02:03:20.869092  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_ENC_INDEX RESULT=pass
 6720 02:03:20.875092  	test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)

 6721 02:03:20.900947  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_DECODER_CMD RESULT=pass>

 6722 02:03:20.901334  

 6723 02:03:20.901860  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_DECODER_CMD RESULT=pass
 6725 02:03:20.917056  Buffer ioctls (Input 0):

 6726 02:03:20.926875  <LAVA_SIGNAL_TESTSET STOP>

 6727 02:03:20.927558  Received signal: <TESTSET> STOP
 6728 02:03:20.928008  Closing test_set Codec-ioctls-Input-0
 6729 02:03:20.937984  <LAVA_SIGNAL_TESTSET START Buffer-ioctls-Input-0>

 6730 02:03:20.938773  Received signal: <TESTSET> START Buffer-ioctls-Input-0
 6731 02:03:20.939126  Starting test_set Buffer-ioctls-Input-0
 6732 02:03:20.941311  	test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK

 6733 02:03:20.974316  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF RESULT=pass>

 6734 02:03:20.975051  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF RESULT=pass
 6736 02:03:20.977779  	test CREATE_BUFS maximum buffers: OK

 6737 02:03:21.002055  Received signal: <TESTCASE> TEST_CASE_ID=CREATE_BUFS-maximum-buffers RESULT=pass
 6739 02:03:21.004978  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CREATE_BUFS-maximum-buffers RESULT=pass>

 6740 02:03:21.005365  	test VIDIOC_EXPBUF: OK

 6741 02:03:21.033323  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_EXPBUF RESULT=pass>

 6742 02:03:21.034008  Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_EXPBUF RESULT=pass
 6744 02:03:21.036393  	test Requests: OK (Not Supported)

 6745 02:03:21.064023  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Requests RESULT=pass>

 6746 02:03:21.064456  

 6747 02:03:21.065045  Received signal: <TESTCASE> TEST_CASE_ID=Requests RESULT=pass
 6749 02:03:21.078671  Test input 0:

 6750 02:03:21.090601  

 6751 02:03:21.104542  Streaming ioctls:

 6752 02:03:21.113219  <LAVA_SIGNAL_TESTSET STOP>

 6753 02:03:21.113851  Received signal: <TESTSET> STOP
 6754 02:03:21.114320  Closing test_set Buffer-ioctls-Input-0
 6755 02:03:21.125462  <LAVA_SIGNAL_TESTSET START Streaming-ioctls_Test-input-0>

 6756 02:03:21.126090  Received signal: <TESTSET> START Streaming-ioctls_Test-input-0
 6757 02:03:21.126504  Starting test_set Streaming-ioctls_Test-input-0
 6758 02:03:21.128653  	test read/write: OK (Not Supported)

 6759 02:03:21.156946  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=read/write RESULT=pass>

 6760 02:03:21.157571  Received signal: <TESTCASE> TEST_CASE_ID=read/write RESULT=pass
 6762 02:03:21.160133  	test blocking wait: OK

 6763 02:03:21.188066  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blocking-wait RESULT=pass>

 6764 02:03:21.188687  Received signal: <TESTCASE> TEST_CASE_ID=blocking-wait RESULT=pass
 6766 02:03:21.195142  		fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL

 6767 02:03:21.203210  	test MMAP (no poll): FAIL

 6768 02:03:21.235637  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-no-poll RESULT=fail>

 6769 02:03:21.236260  Received signal: <TESTCASE> TEST_CASE_ID=MMAP-no-poll RESULT=fail
 6771 02:03:21.242263  		fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL

 6772 02:03:21.248796  	test MMAP (select): FAIL

 6773 02:03:21.277824  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-select RESULT=fail>

 6774 02:03:21.278476  Received signal: <TESTCASE> TEST_CASE_ID=MMAP-select RESULT=fail
 6776 02:03:21.284440  		fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL

 6777 02:03:21.292443  	test MMAP (epoll): FAIL

 6778 02:03:21.322075  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-epoll RESULT=fail>

 6779 02:03:21.322519  

 6780 02:03:21.323055  Received signal: <TESTCASE> TEST_CASE_ID=MMAP-epoll RESULT=fail
 6782 02:03:21.554483  	                                                  

 6783 02:03:21.565587  	test USERPTR (no poll): OK

 6784 02:03:21.596005  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=USERPTR-no-poll RESULT=pass>

 6785 02:03:21.596402  

 6786 02:03:21.596980  Received signal: <TESTCASE> TEST_CASE_ID=USERPTR-no-poll RESULT=pass
 6788 02:03:21.823779  	                                                  

 6789 02:03:21.834390  	test USERPTR (select): OK

 6790 02:03:21.867914  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=USERPTR-select RESULT=pass>

 6791 02:03:21.868165  Received signal: <TESTCASE> TEST_CASE_ID=USERPTR-select RESULT=pass
 6793 02:03:21.874576  	test DMABUF: Cannot test, specify --expbuf-device

 6794 02:03:21.881274  

 6795 02:03:21.901261  Total for uvcvideo device /dev/video0: 54, Succeeded: 51, Failed: 3, Warnings: 1

 6796 02:03:21.905912  <LAVA_TEST_RUNNER EXIT>

 6797 02:03:21.906153  ok: lava_test_shell seems to have completed
 6798 02:03:21.906226  Marking unfinished test run as failed
 6800 02:03:21.907085  CREATE_BUFS-maximum-buffers:
  result: pass
  set: Buffer-ioctls-Input-0
Composing:
  result: pass
  set: Format-ioctls-Input-0
Cropping:
  result: pass
  set: Format-ioctls-Input-0
MC-information-see-Media-Driver-Info-above:
  result: pass
  set: Required-ioctls
MMAP-epoll:
  result: fail
  set: Streaming-ioctls_Test-input-0
MMAP-no-poll:
  result: fail
  set: Streaming-ioctls_Test-input-0
MMAP-select:
  result: fail
  set: Streaming-ioctls_Test-input-0
Requests:
  result: pass
  set: Buffer-ioctls-Input-0
Scaling:
  result: pass
  set: Format-ioctls-Input-0
USERPTR-no-poll:
  result: pass
  set: Streaming-ioctls_Test-input-0
USERPTR-select:
  result: pass
  set: Streaming-ioctls_Test-input-0
VIDIOC_DBG_G/S_REGISTER:
  result: pass
  set: Debug-ioctls
VIDIOC_DV_TIMINGS_CAP:
  result: pass
  set: Input-ioctls
VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS:
  result: pass
  set: Input-ioctls
VIDIOC_ENUM/G/S/QUERY_STD:
  result: pass
  set: Input-ioctls
VIDIOC_ENUMAUDIO:
  result: pass
  set: Input-ioctls
VIDIOC_ENUMAUDOUT:
  result: pass
  set: Input-ioctls
VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS:
  result: pass
  set: Format-ioctls-Input-0
VIDIOC_EXPBUF:
  result: pass
  set: Buffer-ioctls-Input-0
VIDIOC_G/S/ENUMINPUT:
  result: pass
  set: Input-ioctls
VIDIOC_G/S/ENUMOUTPUT:
  result: pass
  set: Input-ioctls
VIDIOC_G/S/TRY_EXT_CTRLS:
  result: pass
  set: Control-ioctls-Input-0
VIDIOC_G/S_AUDIO:
  result: pass
  set: Input-ioctls
VIDIOC_G/S_AUDOUT:
  result: pass
  set: Input-ioctls
VIDIOC_G/S_CTRL:
  result: pass
  set: Control-ioctls-Input-0
VIDIOC_G/S_EDID:
  result: pass
  set: Input-ioctls
VIDIOC_G/S_FREQUENCY:
  result: pass
  set: Input-ioctls
VIDIOC_G/S_JPEGCOMP:
  result: pass
  set: Control-ioctls-Input-0
VIDIOC_G/S_MODULATOR:
  result: pass
  set: Input-ioctls
VIDIOC_G/S_PARM:
  result: pass
  set: Format-ioctls-Input-0
VIDIOC_G/S_PRIORITY:
  result: pass
  set: Allow-for-multiple-opens
VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS:
  result: pass
  set: Input-ioctls
VIDIOC_G_ENC_INDEX:
  result: pass
  set: Codec-ioctls-Input-0
VIDIOC_G_FBUF:
  result: pass
  set: Format-ioctls-Input-0
VIDIOC_G_FMT:
  result: pass
  set: Format-ioctls-Input-0
VIDIOC_G_SLICED_VBI_CAP:
  result: pass
  set: Format-ioctls-Input-0
VIDIOC_LOG_STATUS:
  result: pass
  set: Debug-ioctls
VIDIOC_QUERYCAP:
  result: pass
  set: Allow-for-multiple-opens
VIDIOC_QUERYCTRL:
  result: pass
  set: Control-ioctls-Input-0
VIDIOC_QUERY_EXT_CTRL/QUERYMENU:
  result: pass
  set: Control-ioctls-Input-0
VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF:
  result: pass
  set: Buffer-ioctls-Input-0
VIDIOC_S_FMT:
  result: pass
  set: Format-ioctls-Input-0
VIDIOC_S_HW_FREQ_SEEK:
  result: pass
  set: Input-ioctls
VIDIOC_TRY_DECODER_CMD:
  result: pass
  set: Codec-ioctls-Input-0
VIDIOC_TRY_ENCODER_CMD:
  result: pass
  set: Codec-ioctls-Input-0
VIDIOC_TRY_FMT:
  result: pass
  set: Format-ioctls-Input-0
VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT:
  result: pass
  set: Control-ioctls-Input-0
blocking-wait:
  result: pass
  set: Streaming-ioctls_Test-input-0
device-presence: pass
for-unlimited-opens:
  result: pass
  set: Allow-for-multiple-opens
invalid-ioctls:
  result: pass
  set: Required-ioctls
read/write:
  result: pass
  set: Streaming-ioctls_Test-input-0
second-/dev/video0-open:
  result: pass
  set: Allow-for-multiple-opens

 6801 02:03:21.907209  end: 3.1 lava-test-shell (duration 00:00:11) [common]
 6802 02:03:21.907287  end: 3 lava-test-retry (duration 00:00:11) [common]
 6803 02:03:21.907366  start: 4 finalize (timeout 00:08:11) [common]
 6804 02:03:21.907447  start: 4.1 power-off (timeout 00:00:30) [common]
 6805 02:03:21.907587  Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=off']
 6806 02:03:23.985569  >> Command sent successfully.

 6807 02:03:23.992633  Returned 0 in 2 seconds
 6808 02:03:24.093441  end: 4.1 power-off (duration 00:00:02) [common]
 6810 02:03:24.094968  start: 4.2 read-feedback (timeout 00:08:09) [common]
 6811 02:03:24.096170  Listened to connection for namespace 'common' for up to 1s
 6812 02:03:25.096849  Finalising connection for namespace 'common'
 6813 02:03:25.097515  Disconnecting from shell: Finalise
 6814 02:03:25.097932  / # 
 6815 02:03:25.198785  end: 4.2 read-feedback (duration 00:00:01) [common]
 6816 02:03:25.199514  end: 4 finalize (duration 00:00:03) [common]
 6817 02:03:25.200165  Cleaning after the job
 6818 02:03:25.200825  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479226/tftp-deploy-17j7_ogz/ramdisk
 6819 02:03:25.224158  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479226/tftp-deploy-17j7_ogz/kernel
 6820 02:03:25.254591  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479226/tftp-deploy-17j7_ogz/dtb
 6821 02:03:25.254855  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14479226/tftp-deploy-17j7_ogz/modules
 6822 02:03:25.262166  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14479226
 6823 02:03:25.322929  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14479226
 6824 02:03:25.323088  Job finished correctly