Trying 0.0.0.0...
Connected to 0.
Escape character is '^]'.

U-Boot SPL 2019.04-release-R11 (Dec 19 2019 - 09:03:27 +0000)
Initializing DDR....using raw memory timing
Failsafe SPI boot
Trying to boot from SPI


U-Boot 2019.04-release-R11 (Dec 19 2019 - 09:03:27 +0000), Build: 493

SoC:  LS1028A Rev1.0 (0x870b0110)
Clock Configuration:
       CPU0(A72):1300 MHz  CPU1(A72):1300 MHz  
       Bus:      400  MHz  DDR:      1600 MT/s
Reset Configuration Word (RCW):
       00000000: 34004010 00000030 00000000 00000000
       00000010: 00000000 008f0000 0030c000 00000000
       00000020: 06200000 00002580 00000000 00019016
       00000030: 00000000 00000048 00000000 00000000
       00000040: 00000000 00000000 00000000 00000000
       00000050: 00000000 00000000 00000000 00000000
       00000060: 00000103 00000000 100e7026 00000000
       00000070: bb580000 00020000
Model: Kontron SMARC-sAL28 Board
       Hardware Variant: Single PHY (3)
       RCW: sl28-3-11_q.bin
DRAM:  Detected UDIMM Fixed DDR on board
3.9 GiB
DDR    3.9 GiB (DDR3, 32-bit, CL=11, ECC on)
Using SERDES1 Protocol: 47960 (0xbb58)
PCIe0: pcie@3400000 Root Complex: no link
PCIe1: pcie@3500000 Root Complex: no link
CPLD:  v18
Waking secondary cores to start from fbd41000
All (2) cores are up.
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
In:    serial
Out:   serial
Err:   serial
VPD:   Using device 0x50 on I2C Bus 2
Net:   eth0: enetc-0, eth1: enetc-2, eth2: felix_ethsw, eth3: port@0, eth4: port@1, eth5: port@2, eth6: port@3, eth7: port@4
Warning: port@5 (eth8) using random MAC address - 7a:41:35:8c:90:44
, eth8: port@5
[FAILSAFE] =>  