Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 33
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 86
1 13:09:52.156239 lava-dispatcher, installed at version: 2024.05
2 13:09:52.156472 start: 0 validate
3 13:09:52.156602 Start time: 2024-07-18 13:09:52.156596+00:00 (UTC)
4 13:09:52.156744 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:09:52.156910 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 13:09:52.434542 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:09:52.435212 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 13:09:52.688959 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:09:52.689717 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 13:09:52.951531 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:09:52.952159 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
12 13:09:53.220050 validate duration: 1.06
14 13:09:53.221186 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:09:53.221661 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:09:53.222063 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:09:53.222746 Not decompressing ramdisk as can be used compressed.
18 13:09:53.223140 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 13:09:53.223501 saving as /var/lib/lava/dispatcher/tmp/14879008/tftp-deploy-nkov5d4y/ramdisk/rootfs.cpio.gz
20 13:09:53.223847 total size: 8181887 (7 MB)
21 13:09:53.228328 progress 0 % (0 MB)
22 13:09:53.240042 progress 5 % (0 MB)
23 13:09:53.248631 progress 10 % (0 MB)
24 13:09:53.254907 progress 15 % (1 MB)
25 13:09:53.259460 progress 20 % (1 MB)
26 13:09:53.263481 progress 25 % (1 MB)
27 13:09:53.266929 progress 30 % (2 MB)
28 13:09:53.270260 progress 35 % (2 MB)
29 13:09:53.272988 progress 40 % (3 MB)
30 13:09:53.275888 progress 45 % (3 MB)
31 13:09:53.278320 progress 50 % (3 MB)
32 13:09:53.280865 progress 55 % (4 MB)
33 13:09:53.283044 progress 60 % (4 MB)
34 13:09:53.285395 progress 65 % (5 MB)
35 13:09:53.287660 progress 70 % (5 MB)
36 13:09:53.289984 progress 75 % (5 MB)
37 13:09:53.292156 progress 80 % (6 MB)
38 13:09:53.294466 progress 85 % (6 MB)
39 13:09:53.296634 progress 90 % (7 MB)
40 13:09:53.298942 progress 95 % (7 MB)
41 13:09:53.301089 progress 100 % (7 MB)
42 13:09:53.301330 7 MB downloaded in 0.08 s (100.68 MB/s)
43 13:09:53.301496 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:09:53.301741 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:09:53.301830 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:09:53.301915 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:09:53.302062 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
49 13:09:53.302134 saving as /var/lib/lava/dispatcher/tmp/14879008/tftp-deploy-nkov5d4y/kernel/Image
50 13:09:53.302192 total size: 54813184 (52 MB)
51 13:09:53.302252 No compression specified
52 13:09:53.303364 progress 0 % (0 MB)
53 13:09:53.318105 progress 5 % (2 MB)
54 13:09:53.332769 progress 10 % (5 MB)
55 13:09:53.347264 progress 15 % (7 MB)
56 13:09:53.362196 progress 20 % (10 MB)
57 13:09:53.377048 progress 25 % (13 MB)
58 13:09:53.391866 progress 30 % (15 MB)
59 13:09:53.406638 progress 35 % (18 MB)
60 13:09:53.421298 progress 40 % (20 MB)
61 13:09:53.435837 progress 45 % (23 MB)
62 13:09:53.450627 progress 50 % (26 MB)
63 13:09:53.465403 progress 55 % (28 MB)
64 13:09:53.479923 progress 60 % (31 MB)
65 13:09:53.494735 progress 65 % (34 MB)
66 13:09:53.509431 progress 70 % (36 MB)
67 13:09:53.524156 progress 75 % (39 MB)
68 13:09:53.538900 progress 80 % (41 MB)
69 13:09:53.553434 progress 85 % (44 MB)
70 13:09:53.568131 progress 90 % (47 MB)
71 13:09:53.582974 progress 95 % (49 MB)
72 13:09:53.597322 progress 100 % (52 MB)
73 13:09:53.597554 52 MB downloaded in 0.30 s (176.99 MB/s)
74 13:09:53.597716 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:09:53.597950 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:09:53.598076 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:09:53.598167 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:09:53.598311 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 13:09:53.598379 saving as /var/lib/lava/dispatcher/tmp/14879008/tftp-deploy-nkov5d4y/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 13:09:53.598440 total size: 57695 (0 MB)
82 13:09:53.598499 No compression specified
83 13:09:53.599608 progress 56 % (0 MB)
84 13:09:53.599891 progress 100 % (0 MB)
85 13:09:53.600098 0 MB downloaded in 0.00 s (33.24 MB/s)
86 13:09:53.600221 end: 1.3.1 http-download (duration 00:00:00) [common]
88 13:09:53.600446 end: 1.3 download-retry (duration 00:00:00) [common]
89 13:09:53.600541 start: 1.4 download-retry (timeout 00:10:00) [common]
90 13:09:53.600625 start: 1.4.1 http-download (timeout 00:10:00) [common]
91 13:09:53.600742 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
92 13:09:53.600810 saving as /var/lib/lava/dispatcher/tmp/14879008/tftp-deploy-nkov5d4y/modules/modules.tar
93 13:09:53.600869 total size: 8611320 (8 MB)
94 13:09:53.600929 Using unxz to decompress xz
95 13:09:53.602384 progress 0 % (0 MB)
96 13:09:53.624535 progress 5 % (0 MB)
97 13:09:53.650981 progress 10 % (0 MB)
98 13:09:53.676812 progress 15 % (1 MB)
99 13:09:53.702984 progress 20 % (1 MB)
100 13:09:53.728291 progress 25 % (2 MB)
101 13:09:53.753719 progress 30 % (2 MB)
102 13:09:53.777955 progress 35 % (2 MB)
103 13:09:53.806134 progress 40 % (3 MB)
104 13:09:53.832146 progress 45 % (3 MB)
105 13:09:53.857864 progress 50 % (4 MB)
106 13:09:53.884140 progress 55 % (4 MB)
107 13:09:53.909792 progress 60 % (4 MB)
108 13:09:53.934662 progress 65 % (5 MB)
109 13:09:53.961706 progress 70 % (5 MB)
110 13:09:53.990610 progress 75 % (6 MB)
111 13:09:54.019694 progress 80 % (6 MB)
112 13:09:54.045051 progress 85 % (7 MB)
113 13:09:54.069876 progress 90 % (7 MB)
114 13:09:54.094804 progress 95 % (7 MB)
115 13:09:54.119333 progress 100 % (8 MB)
116 13:09:54.125360 8 MB downloaded in 0.52 s (15.66 MB/s)
117 13:09:54.125532 end: 1.4.1 http-download (duration 00:00:01) [common]
119 13:09:54.125769 end: 1.4 download-retry (duration 00:00:01) [common]
120 13:09:54.125857 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 13:09:54.125944 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 13:09:54.126022 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 13:09:54.126102 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 13:09:54.126301 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1
125 13:09:54.126432 makedir: /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin
126 13:09:54.126533 makedir: /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/tests
127 13:09:54.126630 makedir: /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/results
128 13:09:54.126721 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-add-keys
129 13:09:54.126860 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-add-sources
130 13:09:54.126990 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-background-process-start
131 13:09:54.127118 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-background-process-stop
132 13:09:54.127271 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-common-functions
133 13:09:54.127407 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-echo-ipv4
134 13:09:54.127534 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-install-packages
135 13:09:54.127656 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-installed-packages
136 13:09:54.127796 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-os-build
137 13:09:54.127920 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-probe-channel
138 13:09:54.128046 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-probe-ip
139 13:09:54.128173 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-target-ip
140 13:09:54.128294 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-target-mac
141 13:09:54.128447 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-target-storage
142 13:09:54.128588 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-test-case
143 13:09:54.128716 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-test-event
144 13:09:54.128838 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-test-feedback
145 13:09:54.128970 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-test-raise
146 13:09:54.129094 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-test-reference
147 13:09:54.129216 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-test-runner
148 13:09:54.129339 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-test-set
149 13:09:54.129469 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-test-shell
150 13:09:54.129595 Updating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-install-packages (oe)
151 13:09:54.129750 Updating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/bin/lava-installed-packages (oe)
152 13:09:54.129871 Creating /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/environment
153 13:09:54.129970 LAVA metadata
154 13:09:54.130042 - LAVA_JOB_ID=14879008
155 13:09:54.130103 - LAVA_DISPATCHER_IP=192.168.201.1
156 13:09:54.130201 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 13:09:54.130262 skipped lava-vland-overlay
158 13:09:54.130335 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 13:09:54.130412 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 13:09:54.130474 skipped lava-multinode-overlay
161 13:09:54.130545 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 13:09:54.130621 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 13:09:54.130691 Loading test definitions
164 13:09:54.130774 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 13:09:54.130845 Using /lava-14879008 at stage 0
166 13:09:54.131176 uuid=14879008_1.5.2.3.1 testdef=None
167 13:09:54.131267 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 13:09:54.131357 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 13:09:54.131864 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 13:09:54.132088 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 13:09:54.132975 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 13:09:54.133228 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 13:09:54.133873 runner path: /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/0/tests/0_dmesg test_uuid 14879008_1.5.2.3.1
176 13:09:54.134033 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 13:09:54.134248 Creating lava-test-runner.conf files
179 13:09:54.134316 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14879008/lava-overlay-_d_a77j1/lava-14879008/0 for stage 0
180 13:09:54.134405 - 0_dmesg
181 13:09:54.134502 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 13:09:54.134585 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 13:09:54.142098 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 13:09:54.142207 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 13:09:54.142300 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 13:09:54.142387 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 13:09:54.142472 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 13:09:54.376677 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
189 13:09:54.376837 start: 1.5.4 extract-modules (timeout 00:09:59) [common]
190 13:09:54.376920 extracting modules file /var/lib/lava/dispatcher/tmp/14879008/tftp-deploy-nkov5d4y/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14879008/extract-overlay-ramdisk-dd5koo8k/ramdisk
191 13:09:54.613445 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 13:09:54.613598 start: 1.5.5 apply-overlay-tftp (timeout 00:09:59) [common]
193 13:09:54.613692 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14879008/compress-overlay-_3fh4ot0/overlay-1.5.2.4.tar.gz to ramdisk
194 13:09:54.613760 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14879008/compress-overlay-_3fh4ot0/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14879008/extract-overlay-ramdisk-dd5koo8k/ramdisk
195 13:09:54.620749 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 13:09:54.620854 start: 1.5.6 configure-preseed-file (timeout 00:09:59) [common]
197 13:09:54.620945 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 13:09:54.621030 start: 1.5.7 compress-ramdisk (timeout 00:09:59) [common]
199 13:09:54.621103 Building ramdisk /var/lib/lava/dispatcher/tmp/14879008/extract-overlay-ramdisk-dd5koo8k/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14879008/extract-overlay-ramdisk-dd5koo8k/ramdisk
200 13:09:54.956120 >> 144748 blocks
201 13:09:57.519057 rename /var/lib/lava/dispatcher/tmp/14879008/extract-overlay-ramdisk-dd5koo8k/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14879008/tftp-deploy-nkov5d4y/ramdisk/ramdisk.cpio.gz
202 13:09:57.519289 end: 1.5.7 compress-ramdisk (duration 00:00:03) [common]
203 13:09:57.519399 start: 1.5.8 prepare-kernel (timeout 00:09:56) [common]
204 13:09:57.519486 start: 1.5.8.1 prepare-fit (timeout 00:09:56) [common]
205 13:09:57.519572 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14879008/tftp-deploy-nkov5d4y/kernel/Image']
206 13:10:11.813229 Returned 0 in 14 seconds
207 13:10:11.813411 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14879008/tftp-deploy-nkov5d4y/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14879008/tftp-deploy-nkov5d4y/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14879008/tftp-deploy-nkov5d4y/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14879008/tftp-deploy-nkov5d4y/kernel/image.itb
208 13:10:12.237777 output: FIT description: Kernel Image image with one or more FDT blobs
209 13:10:12.237919 output: Created: Thu Jul 18 14:10:12 2024
210 13:10:12.237988 output: Image 0 (kernel-1)
211 13:10:12.238050 output: Description:
212 13:10:12.238109 output: Created: Thu Jul 18 14:10:12 2024
213 13:10:12.238167 output: Type: Kernel Image
214 13:10:12.238222 output: Compression: lzma compressed
215 13:10:12.238281 output: Data Size: 13114469 Bytes = 12807.10 KiB = 12.51 MiB
216 13:10:12.238338 output: Architecture: AArch64
217 13:10:12.238392 output: OS: Linux
218 13:10:12.238445 output: Load Address: 0x00000000
219 13:10:12.238499 output: Entry Point: 0x00000000
220 13:10:12.238554 output: Hash algo: crc32
221 13:10:12.238608 output: Hash value: a47b020b
222 13:10:12.238662 output: Image 1 (fdt-1)
223 13:10:12.238716 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 13:10:12.238771 output: Created: Thu Jul 18 14:10:12 2024
225 13:10:12.238825 output: Type: Flat Device Tree
226 13:10:12.238879 output: Compression: uncompressed
227 13:10:12.238933 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 13:10:12.238987 output: Architecture: AArch64
229 13:10:12.239042 output: Hash algo: crc32
230 13:10:12.239095 output: Hash value: a9713552
231 13:10:12.239148 output: Image 2 (ramdisk-1)
232 13:10:12.239201 output: Description: unavailable
233 13:10:12.239254 output: Created: Thu Jul 18 14:10:12 2024
234 13:10:12.239307 output: Type: RAMDisk Image
235 13:10:12.239360 output: Compression: uncompressed
236 13:10:12.239413 output: Data Size: 21360856 Bytes = 20860.21 KiB = 20.37 MiB
237 13:10:12.239467 output: Architecture: AArch64
238 13:10:12.239521 output: OS: Linux
239 13:10:12.239574 output: Load Address: unavailable
240 13:10:12.239628 output: Entry Point: unavailable
241 13:10:12.239680 output: Hash algo: crc32
242 13:10:12.239734 output: Hash value: 93c758d2
243 13:10:12.239787 output: Default Configuration: 'conf-1'
244 13:10:12.239841 output: Configuration 0 (conf-1)
245 13:10:12.239896 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 13:10:12.239949 output: Kernel: kernel-1
247 13:10:12.240001 output: Init Ramdisk: ramdisk-1
248 13:10:12.240090 output: FDT: fdt-1
249 13:10:12.240190 output: Loadables: kernel-1
250 13:10:12.240255 output:
251 13:10:12.240369 end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
252 13:10:12.240461 end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
253 13:10:12.240553 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
254 13:10:12.240636 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:41) [common]
255 13:10:12.240704 No LXC device requested
256 13:10:12.240783 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 13:10:12.240863 start: 1.7 deploy-device-env (timeout 00:09:41) [common]
258 13:10:12.240939 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 13:10:12.241000 Checking files for TFTP limit of 4294967296 bytes.
260 13:10:12.241405 end: 1 tftp-deploy (duration 00:00:19) [common]
261 13:10:12.241503 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 13:10:12.241591 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 13:10:12.241688 substitutions:
264 13:10:12.241755 - {DTB}: 14879008/tftp-deploy-nkov5d4y/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 13:10:12.241817 - {INITRD}: 14879008/tftp-deploy-nkov5d4y/ramdisk/ramdisk.cpio.gz
266 13:10:12.241877 - {KERNEL}: 14879008/tftp-deploy-nkov5d4y/kernel/Image
267 13:10:12.241934 - {LAVA_MAC}: None
268 13:10:12.241993 - {PRESEED_CONFIG}: None
269 13:10:12.242049 - {PRESEED_LOCAL}: None
270 13:10:12.242104 - {RAMDISK}: 14879008/tftp-deploy-nkov5d4y/ramdisk/ramdisk.cpio.gz
271 13:10:12.242169 - {ROOT_PART}: None
272 13:10:12.242226 - {ROOT}: None
273 13:10:12.242280 - {SERVER_IP}: 192.168.201.1
274 13:10:12.242334 - {TEE}: None
275 13:10:12.242389 Parsed boot commands:
276 13:10:12.242443 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 13:10:12.242597 Parsed boot commands: tftpboot 192.168.201.1 14879008/tftp-deploy-nkov5d4y/kernel/image.itb 14879008/tftp-deploy-nkov5d4y/kernel/cmdline
278 13:10:12.242685 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 13:10:12.242768 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 13:10:12.242848 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 13:10:12.242926 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 13:10:12.242988 Not connected, no need to disconnect.
283 13:10:12.243060 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 13:10:12.243136 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 13:10:12.243197 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
286 13:10:12.246252 Setting prompt string to ['lava-test: # ']
287 13:10:12.246582 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 13:10:12.246685 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 13:10:12.246784 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 13:10:12.246872 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 13:10:12.247075 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=reboot']
292 13:10:21.373492 >> Command sent successfully.
293 13:10:21.376802 Returned 0 in 9 seconds
294 13:10:21.376964 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
296 13:10:21.377192 end: 2.2.2 reset-device (duration 00:00:09) [common]
297 13:10:21.377290 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
298 13:10:21.377369 Setting prompt string to 'Starting depthcharge on Juniper...'
299 13:10:21.377433 Changing prompt to 'Starting depthcharge on Juniper...'
300 13:10:21.377505 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
301 13:10:21.377877 [Enter `^Ec?' for help]
302 13:10:30.692800 [DL] 00000000 00000000 010701
303 13:10:30.698009
304 13:10:30.698117
305 13:10:30.698186 F0: 102B 0000
306 13:10:30.698255
307 13:10:30.698316 F3: 1006 0033 [0200]
308 13:10:30.700850
309 13:10:30.700937 F3: 4001 00E0 [0200]
310 13:10:30.701004
311 13:10:30.701065 F3: 0000 0000
312 13:10:30.704187
313 13:10:30.704273 V0: 0000 0000 [0001]
314 13:10:30.704340
315 13:10:30.704401 00: 1027 0002
316 13:10:30.704473
317 13:10:30.707535 01: 0000 0000
318 13:10:30.707622
319 13:10:30.707688 BP: 0C00 0251 [0000]
320 13:10:30.707748
321 13:10:30.711120 G0: 1182 0000
322 13:10:30.711205
323 13:10:30.711271 EC: 0004 0000 [0001]
324 13:10:30.711332
325 13:10:30.714625 S7: 0000 0000 [0000]
326 13:10:30.714711
327 13:10:30.717438 CC: 0000 0000 [0001]
328 13:10:30.717524
329 13:10:30.717590 T0: 0000 00DB [000F]
330 13:10:30.717652
331 13:10:30.717711 Jump to BL
332 13:10:30.717769
333 13:10:30.753681
334 13:10:30.753843
335 13:10:30.760331 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
336 13:10:30.763671 ARM64: Exception handlers installed.
337 13:10:30.766970 ARM64: Testing exception
338 13:10:30.770061 ARM64: Done test exception
339 13:10:30.774908 WDT: Last reset was cold boot
340 13:10:30.775030 SPI0(PAD0) initialized at 992727 Hz
341 13:10:30.781508 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
342 13:10:30.781635 Manufacturer: ef
343 13:10:30.788477 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
344 13:10:30.800199 Probing TPM: . done!
345 13:10:30.800356 TPM ready after 0 ms
346 13:10:30.807304 Connected to device vid:did:rid of 1ae0:0028:00
347 13:10:30.813619 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
348 13:10:30.817586 Initialized TPM device CR50 revision 0
349 13:10:30.861508 tlcl_send_startup: Startup return code is 0
350 13:10:30.861675 TPM: setup succeeded
351 13:10:30.870693 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
352 13:10:30.873972 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
353 13:10:30.877775 in-header: 03 19 00 00 08 00 00 00
354 13:10:30.880626 in-data: a2 e0 47 00 13 00 00 00
355 13:10:30.884279 Chrome EC: UHEPI supported
356 13:10:30.890724 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
357 13:10:30.894260 in-header: 03 a1 00 00 08 00 00 00
358 13:10:30.897257 in-data: 84 60 60 10 00 00 00 00
359 13:10:30.897350 Phase 1
360 13:10:30.900734 FMAP: area GBB found @ 3f5000 (12032 bytes)
361 13:10:30.907729 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
362 13:10:30.914311 VB2:vb2_check_recovery() Recovery was requested manually
363 13:10:30.917477 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
364 13:10:30.923649 Recovery requested (1009000e)
365 13:10:30.932345 tlcl_extend: response is 0
366 13:10:30.937638 tlcl_extend: response is 0
367 13:10:30.962623
368 13:10:30.962786
369 13:10:30.969136 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
370 13:10:30.972860 ARM64: Exception handlers installed.
371 13:10:30.976144 ARM64: Testing exception
372 13:10:30.979248 ARM64: Done test exception
373 13:10:30.995050 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2024
374 13:10:31.001659 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
375 13:10:31.004750 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
376 13:10:31.012960 [RTC]rtc_get_frequency_meter,134: input=0xf, output=915
377 13:10:31.019958 [RTC]rtc_get_frequency_meter,134: input=0x7, output=780
378 13:10:31.026764 [RTC]rtc_get_frequency_meter,134: input=0xb, output=847
379 13:10:31.033773 [RTC]rtc_get_frequency_meter,134: input=0x9, output=814
380 13:10:31.040746 [RTC]rtc_get_frequency_meter,134: input=0x8, output=796
381 13:10:31.044115 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
382 13:10:31.050842 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
383 13:10:31.054144 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
384 13:10:31.057303 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
385 13:10:31.060907 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
386 13:10:31.064113 in-header: 03 19 00 00 08 00 00 00
387 13:10:31.067245 in-data: a2 e0 47 00 13 00 00 00
388 13:10:31.070916 Chrome EC: UHEPI supported
389 13:10:31.077729 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
390 13:10:31.080879 in-header: 03 a1 00 00 08 00 00 00
391 13:10:31.084272 in-data: 84 60 60 10 00 00 00 00
392 13:10:31.087442 Skip loading cached calibration data
393 13:10:31.094341 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
394 13:10:31.097875 in-header: 03 a1 00 00 08 00 00 00
395 13:10:31.101186 in-data: 84 60 60 10 00 00 00 00
396 13:10:31.107500 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
397 13:10:31.111152 in-header: 03 a1 00 00 08 00 00 00
398 13:10:31.114230 in-data: 84 60 60 10 00 00 00 00
399 13:10:31.117680 ADC[3]: Raw value=216571 ID=1
400 13:10:31.117770 Manufacturer: ef
401 13:10:31.124738 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
402 13:10:31.127873 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
403 13:10:31.130786 CBFS @ 21000 size 3d4000
404 13:10:31.134636 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
405 13:10:31.141447 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
406 13:10:31.144585 CBFS: Found @ offset 3c700 size 44
407 13:10:31.144675 DRAM-K: Full Calibration
408 13:10:31.151085 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
409 13:10:31.151180 CBFS @ 21000 size 3d4000
410 13:10:31.157682 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
411 13:10:31.161323 CBFS: Locating 'fallback/dram'
412 13:10:31.164030 CBFS: Found @ offset 24b00 size 12268
413 13:10:31.192043 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
414 13:10:31.194993 ddr_geometry: 1, config: 0x0
415 13:10:31.198326 header.status = 0x0
416 13:10:31.201633 header.magic = 0x44524d4b (expected: 0x44524d4b)
417 13:10:31.205417 header.version = 0x5 (expected: 0x5)
418 13:10:31.208572 header.size = 0x8f0 (expected: 0x8f0)
419 13:10:31.208659 header.config = 0x0
420 13:10:31.211985 header.flags = 0x0
421 13:10:31.214959 header.checksum = 0x0
422 13:10:31.221553 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
423 13:10:31.225124 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
424 13:10:31.228404 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
425 13:10:31.231820 ddr_geometry:1
426 13:10:31.234994 [EMI] new MDL number = 1
427 13:10:31.235110 dram_cbt_mode_extern: 0
428 13:10:31.238602 dram_cbt_mode [RK0]: 0, [RK1]: 0
429 13:10:31.244942 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
430 13:10:31.245042
431 13:10:31.245109
432 13:10:31.248252 [Bianco] ETT version 0.0.0.1
433 13:10:31.252101 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
434 13:10:31.252193
435 13:10:31.255047 vSetVcoreByFreq with vcore:762500, freq=1600
436 13:10:31.255134
437 13:10:31.258577 [DramcInit]
438 13:10:31.258664 AutoRefreshCKEOff AutoREF OFF
439 13:10:31.261900 DDRPhyPLLSetting-CKEOFF
440 13:10:31.265039 DDRPhyPLLSetting-CKEON
441 13:10:31.265128
442 13:10:31.265196 Enable WDQS
443 13:10:31.268818 [ModeRegInit_LP4] CH0 RK0
444 13:10:31.272475 Write Rank0 MR13 =0x18
445 13:10:31.272568 Write Rank0 MR12 =0x5d
446 13:10:31.275742 Write Rank0 MR1 =0x56
447 13:10:31.279084 Write Rank0 MR2 =0x1a
448 13:10:31.279177 Write Rank0 MR11 =0x0
449 13:10:31.282390 Write Rank0 MR22 =0x38
450 13:10:31.282477 Write Rank0 MR14 =0x5d
451 13:10:31.285869 Write Rank0 MR3 =0x30
452 13:10:31.289214 Write Rank0 MR13 =0x58
453 13:10:31.289303 Write Rank0 MR12 =0x5d
454 13:10:31.292339 Write Rank0 MR1 =0x56
455 13:10:31.292463 Write Rank0 MR2 =0x2d
456 13:10:31.295930 Write Rank0 MR11 =0x23
457 13:10:31.299266 Write Rank0 MR22 =0x34
458 13:10:31.299356 Write Rank0 MR14 =0x10
459 13:10:31.302427 Write Rank0 MR3 =0x30
460 13:10:31.305778 Write Rank0 MR13 =0xd8
461 13:10:31.305867 [ModeRegInit_LP4] CH0 RK1
462 13:10:31.308951 Write Rank1 MR13 =0x18
463 13:10:31.309038 Write Rank1 MR12 =0x5d
464 13:10:31.312470 Write Rank1 MR1 =0x56
465 13:10:31.315903 Write Rank1 MR2 =0x1a
466 13:10:31.315990 Write Rank1 MR11 =0x0
467 13:10:31.318984 Write Rank1 MR22 =0x38
468 13:10:31.319071 Write Rank1 MR14 =0x5d
469 13:10:31.322546 Write Rank1 MR3 =0x30
470 13:10:31.325761 Write Rank1 MR13 =0x58
471 13:10:31.325848 Write Rank1 MR12 =0x5d
472 13:10:31.329328 Write Rank1 MR1 =0x56
473 13:10:31.329417 Write Rank1 MR2 =0x2d
474 13:10:31.332445 Write Rank1 MR11 =0x23
475 13:10:31.336205 Write Rank1 MR22 =0x34
476 13:10:31.336292 Write Rank1 MR14 =0x10
477 13:10:31.339569 Write Rank1 MR3 =0x30
478 13:10:31.342715 Write Rank1 MR13 =0xd8
479 13:10:31.342801 [ModeRegInit_LP4] CH1 RK0
480 13:10:31.346024 Write Rank0 MR13 =0x18
481 13:10:31.346109 Write Rank0 MR12 =0x5d
482 13:10:31.349157 Write Rank0 MR1 =0x56
483 13:10:31.352828 Write Rank0 MR2 =0x1a
484 13:10:31.352917 Write Rank0 MR11 =0x0
485 13:10:31.355966 Write Rank0 MR22 =0x38
486 13:10:31.356051 Write Rank0 MR14 =0x5d
487 13:10:31.359221 Write Rank0 MR3 =0x30
488 13:10:31.362534 Write Rank0 MR13 =0x58
489 13:10:31.362621 Write Rank0 MR12 =0x5d
490 13:10:31.366139 Write Rank0 MR1 =0x56
491 13:10:31.366227 Write Rank0 MR2 =0x2d
492 13:10:31.369262 Write Rank0 MR11 =0x23
493 13:10:31.373405 Write Rank0 MR22 =0x34
494 13:10:31.373527 Write Rank0 MR14 =0x10
495 13:10:31.376220 Write Rank0 MR3 =0x30
496 13:10:31.379233 Write Rank0 MR13 =0xd8
497 13:10:31.379320 [ModeRegInit_LP4] CH1 RK1
498 13:10:31.382745 Write Rank1 MR13 =0x18
499 13:10:31.385868 Write Rank1 MR12 =0x5d
500 13:10:31.385958 Write Rank1 MR1 =0x56
501 13:10:31.389578 Write Rank1 MR2 =0x1a
502 13:10:31.389668 Write Rank1 MR11 =0x0
503 13:10:31.392817 Write Rank1 MR22 =0x38
504 13:10:31.396289 Write Rank1 MR14 =0x5d
505 13:10:31.396407 Write Rank1 MR3 =0x30
506 13:10:31.399132 Write Rank1 MR13 =0x58
507 13:10:31.399223 Write Rank1 MR12 =0x5d
508 13:10:31.402801 Write Rank1 MR1 =0x56
509 13:10:31.406575 Write Rank1 MR2 =0x2d
510 13:10:31.406666 Write Rank1 MR11 =0x23
511 13:10:31.409268 Write Rank1 MR22 =0x34
512 13:10:31.409355 Write Rank1 MR14 =0x10
513 13:10:31.413000 Write Rank1 MR3 =0x30
514 13:10:31.416211 Write Rank1 MR13 =0xd8
515 13:10:31.416298 match AC timing 3
516 13:10:31.426381 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
517 13:10:31.426489 [MiockJmeterHQA]
518 13:10:31.432751 vSetVcoreByFreq with vcore:762500, freq=1600
519 13:10:31.537330
520 13:10:31.537473 MIOCK jitter meter ch=0
521 13:10:31.537544
522 13:10:31.540382 1T = (102-17) = 85 dly cells
523 13:10:31.547300 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
524 13:10:31.550102 vSetVcoreByFreq with vcore:725000, freq=1200
525 13:10:31.650244
526 13:10:31.650389 MIOCK jitter meter ch=0
527 13:10:31.650458
528 13:10:31.654226 1T = (97-16) = 81 dly cells
529 13:10:31.660756 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps
530 13:10:31.663608 vSetVcoreByFreq with vcore:725000, freq=800
531 13:10:31.763838
532 13:10:31.763979 MIOCK jitter meter ch=0
533 13:10:31.764048
534 13:10:31.767325 1T = (97-16) = 81 dly cells
535 13:10:31.773692 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps
536 13:10:31.777213 vSetVcoreByFreq with vcore:762500, freq=1600
537 13:10:31.780466 vSetVcoreByFreq with vcore:762500, freq=1600
538 13:10:31.780556
539 13:10:31.780623 K DRVP
540 13:10:31.783597 1. OCD DRVP=0 CALOUT=0
541 13:10:31.786927 1. OCD DRVP=1 CALOUT=0
542 13:10:31.787017 1. OCD DRVP=2 CALOUT=0
543 13:10:31.790728 1. OCD DRVP=3 CALOUT=0
544 13:10:31.790821 1. OCD DRVP=4 CALOUT=0
545 13:10:31.793776 1. OCD DRVP=5 CALOUT=0
546 13:10:31.797313 1. OCD DRVP=6 CALOUT=0
547 13:10:31.797404 1. OCD DRVP=7 CALOUT=0
548 13:10:31.800532 1. OCD DRVP=8 CALOUT=0
549 13:10:31.804147 1. OCD DRVP=9 CALOUT=1
550 13:10:31.804236
551 13:10:31.807391 1. OCD DRVP calibration OK! DRVP=9
552 13:10:31.807480
553 13:10:31.807547
554 13:10:31.807609
555 13:10:31.807667 K ODTN
556 13:10:31.810616 3. OCD ODTN=0 ,CALOUT=1
557 13:10:31.810703 3. OCD ODTN=1 ,CALOUT=1
558 13:10:31.813860 3. OCD ODTN=2 ,CALOUT=1
559 13:10:31.816944 3. OCD ODTN=3 ,CALOUT=1
560 13:10:31.817034 3. OCD ODTN=4 ,CALOUT=1
561 13:10:31.820659 3. OCD ODTN=5 ,CALOUT=1
562 13:10:31.820750 3. OCD ODTN=6 ,CALOUT=1
563 13:10:31.823815 3. OCD ODTN=7 ,CALOUT=0
564 13:10:31.823901
565 13:10:31.826898 3. OCD ODTN calibration OK! ODTN=7
566 13:10:31.826986
567 13:10:31.830413 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
568 13:10:31.833781 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
569 13:10:31.840723 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
570 13:10:31.840827
571 13:10:31.840893 K DRVP
572 13:10:31.843705 1. OCD DRVP=0 CALOUT=0
573 13:10:31.843793 1. OCD DRVP=1 CALOUT=0
574 13:10:31.846816 1. OCD DRVP=2 CALOUT=0
575 13:10:31.850620 1. OCD DRVP=3 CALOUT=0
576 13:10:31.850710 1. OCD DRVP=4 CALOUT=0
577 13:10:31.853458 1. OCD DRVP=5 CALOUT=0
578 13:10:31.856993 1. OCD DRVP=6 CALOUT=0
579 13:10:31.857082 1. OCD DRVP=7 CALOUT=0
580 13:10:31.860473 1. OCD DRVP=8 CALOUT=0
581 13:10:31.860564 1. OCD DRVP=9 CALOUT=0
582 13:10:31.863837 1. OCD DRVP=10 CALOUT=0
583 13:10:31.866987 1. OCD DRVP=11 CALOUT=1
584 13:10:31.867076
585 13:10:31.870692 1. OCD DRVP calibration OK! DRVP=11
586 13:10:31.870780
587 13:10:31.870846
588 13:10:31.870906
589 13:10:31.870964 K ODTN
590 13:10:31.873722 3. OCD ODTN=0 ,CALOUT=1
591 13:10:31.873811 3. OCD ODTN=1 ,CALOUT=1
592 13:10:31.877095 3. OCD ODTN=2 ,CALOUT=1
593 13:10:31.880166 3. OCD ODTN=3 ,CALOUT=1
594 13:10:31.880254 3. OCD ODTN=4 ,CALOUT=1
595 13:10:31.883443 3. OCD ODTN=5 ,CALOUT=1
596 13:10:31.886902 3. OCD ODTN=6 ,CALOUT=1
597 13:10:31.886992 3. OCD ODTN=7 ,CALOUT=1
598 13:10:31.890148 3. OCD ODTN=8 ,CALOUT=1
599 13:10:31.893899 3. OCD ODTN=9 ,CALOUT=1
600 13:10:31.893991 3. OCD ODTN=10 ,CALOUT=1
601 13:10:31.897007 3. OCD ODTN=11 ,CALOUT=1
602 13:10:31.900080 3. OCD ODTN=12 ,CALOUT=1
603 13:10:31.900199 3. OCD ODTN=13 ,CALOUT=1
604 13:10:31.903887 3. OCD ODTN=14 ,CALOUT=1
605 13:10:31.907092 3. OCD ODTN=15 ,CALOUT=0
606 13:10:31.907204
607 13:10:31.910400 3. OCD ODTN calibration OK! ODTN=15
608 13:10:31.910507
609 13:10:31.914025 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
610 13:10:31.917275 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
611 13:10:31.924044 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
612 13:10:31.924142
613 13:10:31.924210 [DramcInit]
614 13:10:31.927136 AutoRefreshCKEOff AutoREF OFF
615 13:10:31.927222 DDRPhyPLLSetting-CKEOFF
616 13:10:31.930251 DDRPhyPLLSetting-CKEON
617 13:10:31.930337
618 13:10:31.930403 Enable WDQS
619 13:10:31.933741 ==
620 13:10:31.937201 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
621 13:10:31.940296 fsp= 1, odt_onoff= 1, Byte mode= 0
622 13:10:31.940384 ==
623 13:10:31.944028 [Duty_Offset_Calibration]
624 13:10:31.944131
625 13:10:31.944199 ===========================
626 13:10:31.946957 B0:1 B1:1 CA:1
627 13:10:31.966541 ==
628 13:10:31.969908 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
629 13:10:31.973386 fsp= 1, odt_onoff= 1, Byte mode= 0
630 13:10:31.973480 ==
631 13:10:31.977202 [Duty_Offset_Calibration]
632 13:10:31.977291
633 13:10:31.979713 ===========================
634 13:10:31.979798 B0:1 B1:0 CA:2
635 13:10:32.013320 [ModeRegInit_LP4] CH0 RK0
636 13:10:32.016592 Write Rank0 MR13 =0x18
637 13:10:32.016687 Write Rank0 MR12 =0x5d
638 13:10:32.019794 Write Rank0 MR1 =0x56
639 13:10:32.023179 Write Rank0 MR2 =0x1a
640 13:10:32.023267 Write Rank0 MR11 =0x0
641 13:10:32.026485 Write Rank0 MR22 =0x38
642 13:10:32.026572 Write Rank0 MR14 =0x5d
643 13:10:32.029738 Write Rank0 MR3 =0x30
644 13:10:32.033238 Write Rank0 MR13 =0x58
645 13:10:32.033326 Write Rank0 MR12 =0x5d
646 13:10:32.036478 Write Rank0 MR1 =0x56
647 13:10:32.036565 Write Rank0 MR2 =0x2d
648 13:10:32.039836 Write Rank0 MR11 =0x23
649 13:10:32.042998 Write Rank0 MR22 =0x34
650 13:10:32.043085 Write Rank0 MR14 =0x10
651 13:10:32.046635 Write Rank0 MR3 =0x30
652 13:10:32.049663 Write Rank0 MR13 =0xd8
653 13:10:32.049751 [ModeRegInit_LP4] CH0 RK1
654 13:10:32.053203 Write Rank1 MR13 =0x18
655 13:10:32.053291 Write Rank1 MR12 =0x5d
656 13:10:32.056394 Write Rank1 MR1 =0x56
657 13:10:32.059597 Write Rank1 MR2 =0x1a
658 13:10:32.059686 Write Rank1 MR11 =0x0
659 13:10:32.063200 Write Rank1 MR22 =0x38
660 13:10:32.066399 Write Rank1 MR14 =0x5d
661 13:10:32.066488 Write Rank1 MR3 =0x30
662 13:10:32.069500 Write Rank1 MR13 =0x58
663 13:10:32.069586 Write Rank1 MR12 =0x5d
664 13:10:32.073091 Write Rank1 MR1 =0x56
665 13:10:32.076601 Write Rank1 MR2 =0x2d
666 13:10:32.076693 Write Rank1 MR11 =0x23
667 13:10:32.079583 Write Rank1 MR22 =0x34
668 13:10:32.079670 Write Rank1 MR14 =0x10
669 13:10:32.083213 Write Rank1 MR3 =0x30
670 13:10:32.086302 Write Rank1 MR13 =0xd8
671 13:10:32.086393 [ModeRegInit_LP4] CH1 RK0
672 13:10:32.089454 Write Rank0 MR13 =0x18
673 13:10:32.092928 Write Rank0 MR12 =0x5d
674 13:10:32.093027 Write Rank0 MR1 =0x56
675 13:10:32.096476 Write Rank0 MR2 =0x1a
676 13:10:32.096565 Write Rank0 MR11 =0x0
677 13:10:32.099777 Write Rank0 MR22 =0x38
678 13:10:32.103340 Write Rank0 MR14 =0x5d
679 13:10:32.103429 Write Rank0 MR3 =0x30
680 13:10:32.106284 Write Rank0 MR13 =0x58
681 13:10:32.106372 Write Rank0 MR12 =0x5d
682 13:10:32.109926 Write Rank0 MR1 =0x56
683 13:10:32.112960 Write Rank0 MR2 =0x2d
684 13:10:32.113048 Write Rank0 MR11 =0x23
685 13:10:32.116303 Write Rank0 MR22 =0x34
686 13:10:32.116389 Write Rank0 MR14 =0x10
687 13:10:32.119960 Write Rank0 MR3 =0x30
688 13:10:32.123226 Write Rank0 MR13 =0xd8
689 13:10:32.123315 [ModeRegInit_LP4] CH1 RK1
690 13:10:32.126579 Write Rank1 MR13 =0x18
691 13:10:32.129786 Write Rank1 MR12 =0x5d
692 13:10:32.129875 Write Rank1 MR1 =0x56
693 13:10:32.133305 Write Rank1 MR2 =0x1a
694 13:10:32.133393 Write Rank1 MR11 =0x0
695 13:10:32.136414 Write Rank1 MR22 =0x38
696 13:10:32.139686 Write Rank1 MR14 =0x5d
697 13:10:32.139772 Write Rank1 MR3 =0x30
698 13:10:32.143570 Write Rank1 MR13 =0x58
699 13:10:32.143656 Write Rank1 MR12 =0x5d
700 13:10:32.146834 Write Rank1 MR1 =0x56
701 13:10:32.149999 Write Rank1 MR2 =0x2d
702 13:10:32.150087 Write Rank1 MR11 =0x23
703 13:10:32.153071 Write Rank1 MR22 =0x34
704 13:10:32.153156 Write Rank1 MR14 =0x10
705 13:10:32.156757 Write Rank1 MR3 =0x30
706 13:10:32.159796 Write Rank1 MR13 =0xd8
707 13:10:32.159882 match AC timing 3
708 13:10:32.169703 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
709 13:10:32.173464 DramC Write-DBI off
710 13:10:32.173560 DramC Read-DBI off
711 13:10:32.176738 Write Rank0 MR13 =0x59
712 13:10:32.176824 ==
713 13:10:32.179626 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
714 13:10:32.182978 fsp= 1, odt_onoff= 1, Byte mode= 0
715 13:10:32.183066 ==
716 13:10:32.186529 === u2Vref_new: 0x56 --> 0x2d
717 13:10:32.190171 === u2Vref_new: 0x58 --> 0x38
718 13:10:32.193402 === u2Vref_new: 0x5a --> 0x39
719 13:10:32.196554 === u2Vref_new: 0x5c --> 0x3c
720 13:10:32.200202 === u2Vref_new: 0x5e --> 0x3d
721 13:10:32.203227 === u2Vref_new: 0x60 --> 0xa0
722 13:10:32.206785 [CA 0] Center 34 (6~63) winsize 58
723 13:10:32.210103 [CA 1] Center 36 (9~63) winsize 55
724 13:10:32.213410 [CA 2] Center 29 (0~59) winsize 60
725 13:10:32.216845 [CA 3] Center 25 (-2~52) winsize 55
726 13:10:32.219978 [CA 4] Center 25 (-3~54) winsize 58
727 13:10:32.220066 [CA 5] Center 30 (0~60) winsize 61
728 13:10:32.223417
729 13:10:32.226776 [CATrainingPosCal] consider 1 rank data
730 13:10:32.226869 u2DelayCellTimex100 = 735/100 ps
731 13:10:32.233558 CA0 delay=34 (6~63),Diff = 9 PI (11 cell)
732 13:10:32.236852 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
733 13:10:32.239935 CA2 delay=29 (0~59),Diff = 4 PI (5 cell)
734 13:10:32.243179 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
735 13:10:32.246519 CA4 delay=25 (-3~54),Diff = 0 PI (0 cell)
736 13:10:32.250139 CA5 delay=30 (0~60),Diff = 5 PI (6 cell)
737 13:10:32.250226
738 13:10:32.253250 CA PerBit enable=1, Macro0, CA PI delay=25
739 13:10:32.256494 === u2Vref_new: 0x60 --> 0xa0
740 13:10:32.256582
741 13:10:32.260737 Vref(ca) range 1: 32
742 13:10:32.260825
743 13:10:32.260891 CS Dly= 9 (40-0-32)
744 13:10:32.263166 Write Rank0 MR13 =0xd8
745 13:10:32.266777 Write Rank0 MR13 =0xd8
746 13:10:32.266864 Write Rank0 MR12 =0x60
747 13:10:32.270004 Write Rank1 MR13 =0x59
748 13:10:32.270089 ==
749 13:10:32.273831 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
750 13:10:32.276653 fsp= 1, odt_onoff= 1, Byte mode= 0
751 13:10:32.276743 ==
752 13:10:32.280018 === u2Vref_new: 0x56 --> 0x2d
753 13:10:32.283295 === u2Vref_new: 0x58 --> 0x38
754 13:10:32.286907 === u2Vref_new: 0x5a --> 0x39
755 13:10:32.290465 === u2Vref_new: 0x5c --> 0x3c
756 13:10:32.293434 === u2Vref_new: 0x5e --> 0x3d
757 13:10:32.296810 === u2Vref_new: 0x60 --> 0xa0
758 13:10:32.300130 [CA 0] Center 35 (8~63) winsize 56
759 13:10:32.303364 [CA 1] Center 36 (9~63) winsize 55
760 13:10:32.307262 [CA 2] Center 31 (3~60) winsize 58
761 13:10:32.310276 [CA 3] Center 26 (-2~54) winsize 57
762 13:10:32.313443 [CA 4] Center 26 (-2~55) winsize 58
763 13:10:32.316872 [CA 5] Center 32 (3~61) winsize 59
764 13:10:32.316962
765 13:10:32.320161 [CATrainingPosCal] consider 2 rank data
766 13:10:32.323808 u2DelayCellTimex100 = 735/100 ps
767 13:10:32.327504 CA0 delay=35 (8~63),Diff = 10 PI (13 cell)
768 13:10:32.330142 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
769 13:10:32.333654 CA2 delay=31 (3~59),Diff = 6 PI (7 cell)
770 13:10:32.337325 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
771 13:10:32.340390 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
772 13:10:32.343594 CA5 delay=31 (3~60),Diff = 6 PI (7 cell)
773 13:10:32.343683
774 13:10:32.346701 CA PerBit enable=1, Macro0, CA PI delay=25
775 13:10:32.350686 === u2Vref_new: 0x60 --> 0xa0
776 13:10:32.350775
777 13:10:32.353789 Vref(ca) range 1: 32
778 13:10:32.353874
779 13:10:32.353940 CS Dly= 8 (39-0-32)
780 13:10:32.357032 Write Rank1 MR13 =0xd8
781 13:10:32.360716 Write Rank1 MR13 =0xd8
782 13:10:32.360803 Write Rank1 MR12 =0x60
783 13:10:32.363809 [RankSwap] Rank num 2, (Multi 1), Rank 0
784 13:10:32.367068 Write Rank0 MR2 =0xad
785 13:10:32.367156 [Write Leveling]
786 13:10:32.370148 delay byte0 byte1 byte2 byte3
787 13:10:32.370235
788 13:10:32.373724 10 0 0
789 13:10:32.373814 11 0 0
790 13:10:32.376746 12 0 0
791 13:10:32.376834 13 0 0
792 13:10:32.376915 14 0 0
793 13:10:32.380279 15 0 0
794 13:10:32.380365 16 0 0
795 13:10:32.383533 17 0 0
796 13:10:32.383621 18 0 0
797 13:10:32.387214 19 0 0
798 13:10:32.387302 20 0 0
799 13:10:32.387370 21 0 0
800 13:10:32.390498 22 0 0
801 13:10:32.390586 23 0 ff
802 13:10:32.393725 24 0 ff
803 13:10:32.393811 25 0 ff
804 13:10:32.396776 26 0 ff
805 13:10:32.396863 27 0 ff
806 13:10:32.396931 28 0 ff
807 13:10:32.400148 29 0 ff
808 13:10:32.400235 30 0 ff
809 13:10:32.403534 31 0 ff
810 13:10:32.403622 32 0 ff
811 13:10:32.406726 33 ff ff
812 13:10:32.406813 34 ff ff
813 13:10:32.410338 35 ff ff
814 13:10:32.410426 36 ff ff
815 13:10:32.410493 37 ff ff
816 13:10:32.413786 38 ff ff
817 13:10:32.413872 39 ff ff
818 13:10:32.420399 pass bytecount = 0xff (0xff: all bytes pass)
819 13:10:32.420499
820 13:10:32.420566 DQS0 dly: 33
821 13:10:32.420626 DQS1 dly: 23
822 13:10:32.423397 Write Rank0 MR2 =0x2d
823 13:10:32.427332 [RankSwap] Rank num 2, (Multi 1), Rank 0
824 13:10:32.430248 Write Rank0 MR1 =0xd6
825 13:10:32.430336 [Gating]
826 13:10:32.430402 ==
827 13:10:32.436821 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
828 13:10:32.440099 fsp= 1, odt_onoff= 1, Byte mode= 0
829 13:10:32.440187 ==
830 13:10:32.443452 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
831 13:10:32.446790 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
832 13:10:32.450524 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
833 13:10:32.457061 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
834 13:10:32.460096 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
835 13:10:32.463815 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
836 13:10:32.470849 3 1 24 |404 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
837 13:10:32.473800 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
838 13:10:32.476950 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
839 13:10:32.483563 3 2 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
840 13:10:32.487215 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
841 13:10:32.490452 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
842 13:10:32.493594 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
843 13:10:32.500582 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
844 13:10:32.503647 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
845 13:10:32.506876 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
846 13:10:32.513557 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
847 13:10:32.516927 3 3 4 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
848 13:10:32.520475 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
849 13:10:32.527187 [Byte 1] Lead/lag falling Transition (3, 3, 8)
850 13:10:32.530276 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
851 13:10:32.533495 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
852 13:10:32.536898 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
853 13:10:32.543697 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
854 13:10:32.546864 3 3 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
855 13:10:32.550505 3 4 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
856 13:10:32.557110 3 4 4 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
857 13:10:32.560552 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
858 13:10:32.563514 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 13:10:32.570223 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 13:10:32.574093 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 13:10:32.577261 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 13:10:32.583670 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 13:10:32.587077 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 13:10:32.590580 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 13:10:32.594168 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 13:10:32.600752 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 13:10:32.604012 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 13:10:32.607257 [Byte 0] Lead/lag falling Transition (3, 5, 16)
869 13:10:32.613999 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
870 13:10:32.617299 [Byte 0] Lead/lag Transition tap number (2)
871 13:10:32.620480 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
872 13:10:32.624357 [Byte 1] Lead/lag falling Transition (3, 5, 24)
873 13:10:32.630541 3 5 28 |404 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
874 13:10:32.634177 3 6 0 |4646 1e1e |(0 0)(11 11) |(0 0)(1 0)| 0
875 13:10:32.637602 [Byte 0]First pass (3, 6, 0)
876 13:10:32.640719 [Byte 1] Lead/lag Transition tap number (3)
877 13:10:32.644039 3 6 4 |4646 1212 |(0 0)(11 11) |(0 0)(0 0)| 0
878 13:10:32.647398 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
879 13:10:32.651297 [Byte 1]First pass (3, 6, 8)
880 13:10:32.654411 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 13:10:32.657710 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 13:10:32.664074 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 13:10:32.667593 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 13:10:32.670702 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 13:10:32.674149 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 13:10:32.677285 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 13:10:32.683930 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 13:10:32.687154 All bytes gating window > 1UI, Early break!
889 13:10:32.687277
890 13:10:32.690966 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
891 13:10:32.691059
892 13:10:32.693931 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
893 13:10:32.694025
894 13:10:32.694091
895 13:10:32.694151
896 13:10:32.697194 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
897 13:10:32.697281
898 13:10:32.703725 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
899 13:10:32.703827
900 13:10:32.703892
901 13:10:32.703965 Write Rank0 MR1 =0x56
902 13:10:32.704117
903 13:10:32.707442 best RODT dly(2T, 0.5T) = (2, 2)
904 13:10:32.707556
905 13:10:32.710806 best RODT dly(2T, 0.5T) = (2, 2)
906 13:10:32.710905 ==
907 13:10:32.717230 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
908 13:10:32.720951 fsp= 1, odt_onoff= 1, Byte mode= 0
909 13:10:32.721042 ==
910 13:10:32.723889 Start DQ dly to find pass range UseTestEngine =0
911 13:10:32.727177 x-axis: bit #, y-axis: DQ dly (-127~63)
912 13:10:32.730337 RX Vref Scan = 0
913 13:10:32.730424 -26, [0] xxxxxxxx xxxxxxxx [MSB]
914 13:10:32.733936 -25, [0] xxxxxxxx xxxxxxxx [MSB]
915 13:10:32.737564 -24, [0] xxxxxxxx xxxxxxxx [MSB]
916 13:10:32.740728 -23, [0] xxxxxxxx xxxxxxxx [MSB]
917 13:10:32.744017 -22, [0] xxxxxxxx xxxxxxxx [MSB]
918 13:10:32.747506 -21, [0] xxxxxxxx xxxxxxxx [MSB]
919 13:10:32.750536 -20, [0] xxxxxxxx xxxxxxxx [MSB]
920 13:10:32.754252 -19, [0] xxxxxxxx xxxxxxxx [MSB]
921 13:10:32.754344 -18, [0] xxxxxxxx xxxxxxxx [MSB]
922 13:10:32.757478 -17, [0] xxxxxxxx xxxxxxxx [MSB]
923 13:10:32.760414 -16, [0] xxxxxxxx xxxxxxxx [MSB]
924 13:10:32.763997 -15, [0] xxxxxxxx xxxxxxxx [MSB]
925 13:10:32.767196 -14, [0] xxxxxxxx xxxxxxxx [MSB]
926 13:10:32.770450 -13, [0] xxxxxxxx xxxxxxxx [MSB]
927 13:10:32.774165 -12, [0] xxxxxxxx xxxxxxxx [MSB]
928 13:10:32.777182 -11, [0] xxxxxxxx xxxxxxxx [MSB]
929 13:10:32.780691 -10, [0] xxxxxxxx xxxxxxxx [MSB]
930 13:10:32.780779 -9, [0] xxxxxxxx xxxxxxxx [MSB]
931 13:10:32.784049 -8, [0] xxxxxxxx xxxxxxxx [MSB]
932 13:10:32.787405 -7, [0] xxxxxxxx xxxxxxxx [MSB]
933 13:10:32.791095 -6, [0] xxxxxxxx xxxxxxxx [MSB]
934 13:10:32.793867 -5, [0] xxxxxxxx xxxxxxxx [MSB]
935 13:10:32.797517 -4, [0] xxxxxxxx xxxxxxxx [MSB]
936 13:10:32.797608 -3, [0] xxxxxxxx xxxxxxxx [MSB]
937 13:10:32.800644 -2, [0] xxxoxxxx oxxxxxxx [MSB]
938 13:10:32.804215 -1, [0] xxxoxxxx oxxxxxxx [MSB]
939 13:10:32.807192 0, [0] xxxoxoxx ooxoxxxx [MSB]
940 13:10:32.810768 1, [0] xxxoxoox ooxoooxx [MSB]
941 13:10:32.814558 2, [0] xxxoxoox ooxoooxx [MSB]
942 13:10:32.814648 3, [0] xxxoxoox ooxoooxx [MSB]
943 13:10:32.817580 4, [0] xxxoxoox ooxoooox [MSB]
944 13:10:32.820784 5, [0] xooooooo ooxooooo [MSB]
945 13:10:32.824272 6, [0] xooooooo ooxooooo [MSB]
946 13:10:32.827438 7, [0] oooooooo ooxooooo [MSB]
947 13:10:32.830955 32, [0] oooxoooo oooooooo [MSB]
948 13:10:32.831048 33, [0] oooxoooo xooooooo [MSB]
949 13:10:32.834272 34, [0] oooxoooo xooooooo [MSB]
950 13:10:32.837414 35, [0] oooxoooo xooooooo [MSB]
951 13:10:32.841027 36, [0] oooxoxox xooxoooo [MSB]
952 13:10:32.844061 37, [0] oooxoxxx xxoxxooo [MSB]
953 13:10:32.847770 38, [0] oooxoxxx xxoxxoxo [MSB]
954 13:10:32.851103 39, [0] oooxxxxx xxoxxxxo [MSB]
955 13:10:32.851194 40, [0] xooxxxxx xxoxxxxo [MSB]
956 13:10:32.854375 41, [0] xxxxxxxx xxoxxxxo [MSB]
957 13:10:32.857540 42, [0] xxxxxxxx xxoxxxxx [MSB]
958 13:10:32.860835 43, [0] xxxxxxxx xxoxxxxx [MSB]
959 13:10:32.864262 44, [0] xxxxxxxx xxxxxxxx [MSB]
960 13:10:32.867771 iDelay=44, Bit 0, Center 23 (7 ~ 39) 33
961 13:10:32.871453 iDelay=44, Bit 1, Center 22 (5 ~ 40) 36
962 13:10:32.874363 iDelay=44, Bit 2, Center 22 (5 ~ 40) 36
963 13:10:32.877918 iDelay=44, Bit 3, Center 14 (-2 ~ 31) 34
964 13:10:32.881132 iDelay=44, Bit 4, Center 21 (5 ~ 38) 34
965 13:10:32.884729 iDelay=44, Bit 5, Center 17 (0 ~ 35) 36
966 13:10:32.887733 iDelay=44, Bit 6, Center 18 (1 ~ 36) 36
967 13:10:32.890934 iDelay=44, Bit 7, Center 20 (5 ~ 35) 31
968 13:10:32.894672 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
969 13:10:32.898073 iDelay=44, Bit 9, Center 18 (0 ~ 36) 37
970 13:10:32.904397 iDelay=44, Bit 10, Center 25 (8 ~ 43) 36
971 13:10:32.908081 iDelay=44, Bit 11, Center 17 (0 ~ 35) 36
972 13:10:32.911150 iDelay=44, Bit 12, Center 18 (1 ~ 36) 36
973 13:10:32.914885 iDelay=44, Bit 13, Center 19 (1 ~ 38) 38
974 13:10:32.917900 iDelay=44, Bit 14, Center 20 (4 ~ 37) 34
975 13:10:32.921244 iDelay=44, Bit 15, Center 23 (5 ~ 41) 37
976 13:10:32.921330 ==
977 13:10:32.927993 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
978 13:10:32.928085 fsp= 1, odt_onoff= 1, Byte mode= 0
979 13:10:32.931792 ==
980 13:10:32.931881 DQS Delay:
981 13:10:32.931948 DQS0 = 0, DQS1 = 0
982 13:10:32.934652 DQM Delay:
983 13:10:32.934738 DQM0 = 19, DQM1 = 19
984 13:10:32.937995 DQ Delay:
985 13:10:32.938085 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =14
986 13:10:32.941236 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
987 13:10:32.944930 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =17
988 13:10:32.948258 DQ12 =18, DQ13 =19, DQ14 =20, DQ15 =23
989 13:10:32.948346
990 13:10:32.948413
991 13:10:32.951616 DramC Write-DBI off
992 13:10:32.951702 ==
993 13:10:32.958026 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
994 13:10:32.961542 fsp= 1, odt_onoff= 1, Byte mode= 0
995 13:10:32.961633 ==
996 13:10:32.965055 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
997 13:10:32.965142
998 13:10:32.967884 Begin, DQ Scan Range 919~1175
999 13:10:32.967970
1000 13:10:32.968036
1001 13:10:32.968097 TX Vref Scan disable
1002 13:10:32.971479 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1003 13:10:32.977940 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1004 13:10:32.981459 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1005 13:10:32.984716 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1006 13:10:32.988022 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1007 13:10:32.991310 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1008 13:10:32.994873 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1009 13:10:32.997983 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1010 13:10:33.001412 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1011 13:10:33.004531 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1012 13:10:33.008117 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1013 13:10:33.011202 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1014 13:10:33.014985 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1015 13:10:33.018088 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1016 13:10:33.021653 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1017 13:10:33.024950 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1018 13:10:33.028101 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1019 13:10:33.031740 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1020 13:10:33.038079 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1021 13:10:33.041761 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1022 13:10:33.045029 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1023 13:10:33.048181 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1024 13:10:33.051424 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1025 13:10:33.055207 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1026 13:10:33.058464 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1027 13:10:33.061528 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1028 13:10:33.064880 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1029 13:10:33.068646 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1030 13:10:33.071619 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1031 13:10:33.075389 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1032 13:10:33.078398 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1033 13:10:33.081562 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1034 13:10:33.085047 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1035 13:10:33.088363 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1036 13:10:33.091985 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1037 13:10:33.095305 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1038 13:10:33.101666 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1039 13:10:33.105013 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1040 13:10:33.108587 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1041 13:10:33.111955 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1042 13:10:33.115450 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1043 13:10:33.118884 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1044 13:10:33.122017 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1045 13:10:33.125612 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1046 13:10:33.128743 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1047 13:10:33.131945 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1048 13:10:33.135079 965 |3 6 5|[0] xxxxxxxx oxxoxxxx [MSB]
1049 13:10:33.138774 966 |3 6 6|[0] xxxxxxxx oxxoxxxx [MSB]
1050 13:10:33.141966 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1051 13:10:33.145098 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1052 13:10:33.149051 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1053 13:10:33.152187 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1054 13:10:33.155107 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1055 13:10:33.158588 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1056 13:10:33.161708 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1057 13:10:33.165069 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1058 13:10:33.168406 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1059 13:10:33.175307 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1060 13:10:33.178433 977 |3 6 17|[0] xoxooooo oooooooo [MSB]
1061 13:10:33.182176 984 |3 6 24|[0] oooooooo xooooooo [MSB]
1062 13:10:33.185433 985 |3 6 25|[0] oooooooo xooxoooo [MSB]
1063 13:10:33.188590 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1064 13:10:33.191680 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1065 13:10:33.195423 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1066 13:10:33.198275 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1067 13:10:33.202251 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1068 13:10:33.205237 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1069 13:10:33.208644 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1070 13:10:33.211742 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1071 13:10:33.218532 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1072 13:10:33.222162 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1073 13:10:33.224888 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1074 13:10:33.228425 997 |3 6 37|[0] oooxoxxx xxxxxxxx [MSB]
1075 13:10:33.231695 998 |3 6 38|[0] oooxxxxx xxxxxxxx [MSB]
1076 13:10:33.235334 999 |3 6 39|[0] oxoxxxxx xxxxxxxx [MSB]
1077 13:10:33.238451 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1078 13:10:33.242109 Byte0, DQ PI dly=986, DQM PI dly= 986
1079 13:10:33.245258 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1080 13:10:33.245347
1081 13:10:33.251668 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1082 13:10:33.251764
1083 13:10:33.255308 Byte1, DQ PI dly=975, DQM PI dly= 975
1084 13:10:33.258595 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1085 13:10:33.258685
1086 13:10:33.261985 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1087 13:10:33.262080
1088 13:10:33.262156 ==
1089 13:10:33.268748 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1090 13:10:33.271789 fsp= 1, odt_onoff= 1, Byte mode= 0
1091 13:10:33.271879 ==
1092 13:10:33.275446 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1093 13:10:33.275536
1094 13:10:33.278427 Begin, DQ Scan Range 951~1015
1095 13:10:33.281619 Write Rank0 MR14 =0x0
1096 13:10:33.289401
1097 13:10:33.289506 CH=0, VrefRange= 0, VrefLevel = 0
1098 13:10:33.295973 TX Bit0 (980~994) 15 987, Bit8 (967~977) 11 972,
1099 13:10:33.299394 TX Bit1 (978~993) 16 985, Bit9 (968~982) 15 975,
1100 13:10:33.306125 TX Bit2 (980~994) 15 987, Bit10 (974~985) 12 979,
1101 13:10:33.309183 TX Bit3 (976~987) 12 981, Bit11 (967~980) 14 973,
1102 13:10:33.312537 TX Bit4 (979~992) 14 985, Bit12 (969~982) 14 975,
1103 13:10:33.319494 TX Bit5 (977~991) 15 984, Bit13 (969~983) 15 976,
1104 13:10:33.322746 TX Bit6 (978~991) 14 984, Bit14 (968~983) 16 975,
1105 13:10:33.325784 TX Bit7 (979~992) 14 985, Bit15 (973~984) 12 978,
1106 13:10:33.325878
1107 13:10:33.329131 Write Rank0 MR14 =0x2
1108 13:10:33.338138
1109 13:10:33.338250 CH=0, VrefRange= 0, VrefLevel = 2
1110 13:10:33.345003 TX Bit0 (980~995) 16 987, Bit8 (967~977) 11 972,
1111 13:10:33.348117 TX Bit1 (978~993) 16 985, Bit9 (968~983) 16 975,
1112 13:10:33.354754 TX Bit2 (979~995) 17 987, Bit10 (973~986) 14 979,
1113 13:10:33.358084 TX Bit3 (975~988) 14 981, Bit11 (967~981) 15 974,
1114 13:10:33.361996 TX Bit4 (978~993) 16 985, Bit12 (969~983) 15 976,
1115 13:10:33.367928 TX Bit5 (977~992) 16 984, Bit13 (968~983) 16 975,
1116 13:10:33.371252 TX Bit6 (977~992) 16 984, Bit14 (968~984) 17 976,
1117 13:10:33.374953 TX Bit7 (978~993) 16 985, Bit15 (973~985) 13 979,
1118 13:10:33.375050
1119 13:10:33.378488 Write Rank0 MR14 =0x4
1120 13:10:33.387097
1121 13:10:33.387211 CH=0, VrefRange= 0, VrefLevel = 4
1122 13:10:33.393943 TX Bit0 (979~996) 18 987, Bit8 (966~979) 14 972,
1123 13:10:33.397139 TX Bit1 (978~994) 17 986, Bit9 (968~983) 16 975,
1124 13:10:33.403733 TX Bit2 (979~995) 17 987, Bit10 (973~986) 14 979,
1125 13:10:33.407387 TX Bit3 (975~989) 15 982, Bit11 (967~982) 16 974,
1126 13:10:33.410578 TX Bit4 (978~993) 16 985, Bit12 (969~983) 15 976,
1127 13:10:33.417039 TX Bit5 (977~992) 16 984, Bit13 (968~983) 16 975,
1128 13:10:33.420672 TX Bit6 (977~992) 16 984, Bit14 (968~984) 17 976,
1129 13:10:33.423691 TX Bit7 (979~993) 15 986, Bit15 (972~986) 15 979,
1130 13:10:33.423781
1131 13:10:33.427182 Write Rank0 MR14 =0x6
1132 13:10:33.435943
1133 13:10:33.436056 CH=0, VrefRange= 0, VrefLevel = 6
1134 13:10:33.442954 TX Bit0 (979~996) 18 987, Bit8 (965~979) 15 972,
1135 13:10:33.445936 TX Bit1 (978~994) 17 986, Bit9 (967~984) 18 975,
1136 13:10:33.453184 TX Bit2 (980~996) 17 988, Bit10 (973~988) 16 980,
1137 13:10:33.456356 TX Bit3 (974~990) 17 982, Bit11 (967~982) 16 974,
1138 13:10:33.459627 TX Bit4 (978~994) 17 986, Bit12 (968~983) 16 975,
1139 13:10:33.466299 TX Bit5 (976~993) 18 984, Bit13 (968~984) 17 976,
1140 13:10:33.518132 TX Bit6 (977~993) 17 985, Bit14 (968~985) 18 976,
1141 13:10:33.518276 TX Bit7 (978~994) 17 986, Bit15 (972~986) 15 979,
1142 13:10:33.518346
1143 13:10:33.518408 Write Rank0 MR14 =0x8
1144 13:10:33.518469
1145 13:10:33.518719 CH=0, VrefRange= 0, VrefLevel = 8
1146 13:10:33.518786 TX Bit0 (978~998) 21 988, Bit8 (966~981) 16 973,
1147 13:10:33.518846 TX Bit1 (977~995) 19 986, Bit9 (967~984) 18 975,
1148 13:10:33.519178 TX Bit2 (979~997) 19 988, Bit10 (972~989) 18 980,
1149 13:10:33.519449 TX Bit3 (974~991) 18 982, Bit11 (966~983) 18 974,
1150 13:10:33.519523 TX Bit4 (978~994) 17 986, Bit12 (968~984) 17 976,
1151 13:10:33.519598 TX Bit5 (976~993) 18 984, Bit13 (968~984) 17 976,
1152 13:10:33.519668 TX Bit6 (977~993) 17 985, Bit14 (967~985) 19 976,
1153 13:10:33.548774 TX Bit7 (978~994) 17 986, Bit15 (971~987) 17 979,
1154 13:10:33.548917
1155 13:10:33.549177 Write Rank0 MR14 =0xa
1156 13:10:33.549246
1157 13:10:33.549307 CH=0, VrefRange= 0, VrefLevel = 10
1158 13:10:33.549553 TX Bit0 (978~998) 21 988, Bit8 (965~981) 17 973,
1159 13:10:33.549803 TX Bit1 (978~996) 19 987, Bit9 (967~984) 18 975,
1160 13:10:33.552651 TX Bit2 (979~998) 20 988, Bit10 (971~989) 19 980,
1161 13:10:33.555640 TX Bit3 (974~991) 18 982, Bit11 (966~983) 18 974,
1162 13:10:33.559125 TX Bit4 (978~995) 18 986, Bit12 (968~984) 17 976,
1163 13:10:33.562290 TX Bit5 (976~994) 19 985, Bit13 (967~984) 18 975,
1164 13:10:33.568825 TX Bit6 (976~994) 19 985, Bit14 (967~986) 20 976,
1165 13:10:33.572536 TX Bit7 (978~995) 18 986, Bit15 (971~988) 18 979,
1166 13:10:33.572652
1167 13:10:33.575614 Write Rank0 MR14 =0xc
1168 13:10:33.584139
1169 13:10:33.587997 CH=0, VrefRange= 0, VrefLevel = 12
1170 13:10:33.590928 TX Bit0 (978~999) 22 988, Bit8 (965~982) 18 973,
1171 13:10:33.594176 TX Bit1 (977~996) 20 986, Bit9 (967~985) 19 976,
1172 13:10:33.600989 TX Bit2 (978~998) 21 988, Bit10 (971~990) 20 980,
1173 13:10:33.604216 TX Bit3 (974~991) 18 982, Bit11 (966~983) 18 974,
1174 13:10:33.607432 TX Bit4 (977~996) 20 986, Bit12 (968~985) 18 976,
1175 13:10:33.614479 TX Bit5 (976~994) 19 985, Bit13 (967~985) 19 976,
1176 13:10:33.617591 TX Bit6 (977~994) 18 985, Bit14 (967~986) 20 976,
1177 13:10:33.621185 TX Bit7 (978~995) 18 986, Bit15 (971~989) 19 980,
1178 13:10:33.621276
1179 13:10:33.624432 Write Rank0 MR14 =0xe
1180 13:10:33.634166
1181 13:10:33.637366 CH=0, VrefRange= 0, VrefLevel = 14
1182 13:10:33.640617 TX Bit0 (978~999) 22 988, Bit8 (965~982) 18 973,
1183 13:10:33.644297 TX Bit1 (977~998) 22 987, Bit9 (966~985) 20 975,
1184 13:10:33.650678 TX Bit2 (977~999) 23 988, Bit10 (971~990) 20 980,
1185 13:10:33.654149 TX Bit3 (973~992) 20 982, Bit11 (966~984) 19 975,
1186 13:10:33.657354 TX Bit4 (977~997) 21 987, Bit12 (967~985) 19 976,
1187 13:10:33.664497 TX Bit5 (975~994) 20 984, Bit13 (967~985) 19 976,
1188 13:10:33.667329 TX Bit6 (976~995) 20 985, Bit14 (967~986) 20 976,
1189 13:10:33.670663 TX Bit7 (977~996) 20 986, Bit15 (970~990) 21 980,
1190 13:10:33.670756
1191 13:10:33.674180 Write Rank0 MR14 =0x10
1192 13:10:33.683480
1193 13:10:33.683600 CH=0, VrefRange= 0, VrefLevel = 16
1194 13:10:33.690449 TX Bit0 (978~999) 22 988, Bit8 (964~983) 20 973,
1195 13:10:33.693715 TX Bit1 (977~998) 22 987, Bit9 (966~986) 21 976,
1196 13:10:33.700151 TX Bit2 (977~999) 23 988, Bit10 (970~991) 22 980,
1197 13:10:33.703695 TX Bit3 (973~992) 20 982, Bit11 (965~984) 20 974,
1198 13:10:33.706975 TX Bit4 (977~997) 21 987, Bit12 (967~986) 20 976,
1199 13:10:33.713656 TX Bit5 (975~995) 21 985, Bit13 (967~986) 20 976,
1200 13:10:33.716852 TX Bit6 (976~995) 20 985, Bit14 (967~987) 21 977,
1201 13:10:33.720398 TX Bit7 (977~997) 21 987, Bit15 (970~990) 21 980,
1202 13:10:33.720525
1203 13:10:33.723889 Write Rank0 MR14 =0x12
1204 13:10:33.733396
1205 13:10:33.737045 CH=0, VrefRange= 0, VrefLevel = 18
1206 13:10:33.740201 TX Bit0 (977~1000) 24 988, Bit8 (964~983) 20 973,
1207 13:10:33.743411 TX Bit1 (977~999) 23 988, Bit9 (966~986) 21 976,
1208 13:10:33.750461 TX Bit2 (978~999) 22 988, Bit10 (969~991) 23 980,
1209 13:10:33.753429 TX Bit3 (972~993) 22 982, Bit11 (965~985) 21 975,
1210 13:10:33.757026 TX Bit4 (977~998) 22 987, Bit12 (967~986) 20 976,
1211 13:10:33.763251 TX Bit5 (975~995) 21 985, Bit13 (967~986) 20 976,
1212 13:10:33.766589 TX Bit6 (976~996) 21 986, Bit14 (966~988) 23 977,
1213 13:10:33.770366 TX Bit7 (977~998) 22 987, Bit15 (969~990) 22 979,
1214 13:10:33.770462
1215 13:10:33.773252 Write Rank0 MR14 =0x14
1216 13:10:33.783277
1217 13:10:33.786887 CH=0, VrefRange= 0, VrefLevel = 20
1218 13:10:33.790079 TX Bit0 (978~1000) 23 989, Bit8 (963~984) 22 973,
1219 13:10:33.793019 TX Bit1 (977~999) 23 988, Bit9 (966~986) 21 976,
1220 13:10:33.799997 TX Bit2 (977~1000) 24 988, Bit10 (969~991) 23 980,
1221 13:10:33.803392 TX Bit3 (971~993) 23 982, Bit11 (965~985) 21 975,
1222 13:10:33.806614 TX Bit4 (976~999) 24 987, Bit12 (967~987) 21 977,
1223 13:10:33.813089 TX Bit5 (975~995) 21 985, Bit13 (967~987) 21 977,
1224 13:10:33.816888 TX Bit6 (975~996) 22 985, Bit14 (966~988) 23 977,
1225 13:10:33.820320 TX Bit7 (977~998) 22 987, Bit15 (969~990) 22 979,
1226 13:10:33.823495
1227 13:10:33.823585 Write Rank0 MR14 =0x16
1228 13:10:33.833289
1229 13:10:33.836914 CH=0, VrefRange= 0, VrefLevel = 22
1230 13:10:33.839796 TX Bit0 (978~1000) 23 989, Bit8 (963~984) 22 973,
1231 13:10:33.843269 TX Bit1 (977~999) 23 988, Bit9 (966~987) 22 976,
1232 13:10:33.850180 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1233 13:10:33.853468 TX Bit3 (972~994) 23 983, Bit11 (965~985) 21 975,
1234 13:10:33.856718 TX Bit4 (976~999) 24 987, Bit12 (966~988) 23 977,
1235 13:10:33.863385 TX Bit5 (974~996) 23 985, Bit13 (966~988) 23 977,
1236 13:10:33.866575 TX Bit6 (975~998) 24 986, Bit14 (966~989) 24 977,
1237 13:10:33.869945 TX Bit7 (977~998) 22 987, Bit15 (968~991) 24 979,
1238 13:10:33.870036
1239 13:10:33.873558 Write Rank0 MR14 =0x18
1240 13:10:33.883420
1241 13:10:33.883540 CH=0, VrefRange= 0, VrefLevel = 24
1242 13:10:33.889780 TX Bit0 (977~1000) 24 988, Bit8 (962~985) 24 973,
1243 13:10:33.893492 TX Bit1 (977~1000) 24 988, Bit9 (966~988) 23 977,
1244 13:10:33.900061 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1245 13:10:33.903224 TX Bit3 (971~994) 24 982, Bit11 (964~986) 23 975,
1246 13:10:33.906438 TX Bit4 (976~999) 24 987, Bit12 (967~988) 22 977,
1247 13:10:33.913399 TX Bit5 (974~997) 24 985, Bit13 (966~988) 23 977,
1248 13:10:33.916376 TX Bit6 (975~998) 24 986, Bit14 (966~990) 25 978,
1249 13:10:33.920055 TX Bit7 (977~999) 23 988, Bit15 (968~991) 24 979,
1250 13:10:33.922997
1251 13:10:33.923086 Write Rank0 MR14 =0x1a
1252 13:10:33.933741
1253 13:10:33.936769 CH=0, VrefRange= 0, VrefLevel = 26
1254 13:10:33.940111 TX Bit0 (977~1001) 25 989, Bit8 (961~985) 25 973,
1255 13:10:33.943794 TX Bit1 (976~1000) 25 988, Bit9 (965~989) 25 977,
1256 13:10:33.950445 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1257 13:10:33.953493 TX Bit3 (970~994) 25 982, Bit11 (964~987) 24 975,
1258 13:10:33.957272 TX Bit4 (976~999) 24 987, Bit12 (966~989) 24 977,
1259 13:10:33.963741 TX Bit5 (974~997) 24 985, Bit13 (966~989) 24 977,
1260 13:10:33.967323 TX Bit6 (975~998) 24 986, Bit14 (966~990) 25 978,
1261 13:10:33.970792 TX Bit7 (976~999) 24 987, Bit15 (968~992) 25 980,
1262 13:10:33.970890
1263 13:10:33.973911 Write Rank0 MR14 =0x1c
1264 13:10:33.984045
1265 13:10:33.987472 CH=0, VrefRange= 0, VrefLevel = 28
1266 13:10:33.990317 TX Bit0 (977~1001) 25 989, Bit8 (961~985) 25 973,
1267 13:10:33.994022 TX Bit1 (976~1000) 25 988, Bit9 (965~989) 25 977,
1268 13:10:34.000405 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1269 13:10:34.003827 TX Bit3 (970~994) 25 982, Bit11 (964~987) 24 975,
1270 13:10:34.007468 TX Bit4 (976~999) 24 987, Bit12 (966~989) 24 977,
1271 13:10:34.013956 TX Bit5 (974~997) 24 985, Bit13 (966~989) 24 977,
1272 13:10:34.016956 TX Bit6 (975~998) 24 986, Bit14 (966~990) 25 978,
1273 13:10:34.021024 TX Bit7 (976~999) 24 987, Bit15 (968~992) 25 980,
1274 13:10:34.023836
1275 13:10:34.023924 Write Rank0 MR14 =0x1e
1276 13:10:34.034207
1277 13:10:34.037476 CH=0, VrefRange= 0, VrefLevel = 30
1278 13:10:34.040642 TX Bit0 (977~1001) 25 989, Bit8 (961~985) 25 973,
1279 13:10:34.044272 TX Bit1 (976~1000) 25 988, Bit9 (965~989) 25 977,
1280 13:10:34.050463 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1281 13:10:34.053893 TX Bit3 (970~994) 25 982, Bit11 (964~987) 24 975,
1282 13:10:34.057094 TX Bit4 (976~999) 24 987, Bit12 (966~989) 24 977,
1283 13:10:34.064220 TX Bit5 (974~997) 24 985, Bit13 (966~989) 24 977,
1284 13:10:34.067230 TX Bit6 (975~998) 24 986, Bit14 (966~990) 25 978,
1285 13:10:34.070414 TX Bit7 (976~999) 24 987, Bit15 (968~992) 25 980,
1286 13:10:34.073974
1287 13:10:34.074065 Write Rank0 MR14 =0x20
1288 13:10:34.084469
1289 13:10:34.087635 CH=0, VrefRange= 0, VrefLevel = 32
1290 13:10:34.091131 TX Bit0 (977~1001) 25 989, Bit8 (961~985) 25 973,
1291 13:10:34.094552 TX Bit1 (976~1000) 25 988, Bit9 (965~989) 25 977,
1292 13:10:34.100743 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1293 13:10:34.104067 TX Bit3 (970~994) 25 982, Bit11 (964~987) 24 975,
1294 13:10:34.107660 TX Bit4 (976~999) 24 987, Bit12 (966~989) 24 977,
1295 13:10:34.114283 TX Bit5 (974~997) 24 985, Bit13 (966~989) 24 977,
1296 13:10:34.117977 TX Bit6 (975~998) 24 986, Bit14 (966~990) 25 978,
1297 13:10:34.121217 TX Bit7 (976~999) 24 987, Bit15 (968~992) 25 980,
1298 13:10:34.124378
1299 13:10:34.124476 Write Rank0 MR14 =0x22
1300 13:10:34.134254
1301 13:10:34.137797 CH=0, VrefRange= 0, VrefLevel = 34
1302 13:10:34.141414 TX Bit0 (977~1001) 25 989, Bit8 (961~985) 25 973,
1303 13:10:34.144815 TX Bit1 (976~1000) 25 988, Bit9 (965~989) 25 977,
1304 13:10:34.151306 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1305 13:10:34.154695 TX Bit3 (970~994) 25 982, Bit11 (964~987) 24 975,
1306 13:10:34.157911 TX Bit4 (976~999) 24 987, Bit12 (966~989) 24 977,
1307 13:10:34.164431 TX Bit5 (974~997) 24 985, Bit13 (966~989) 24 977,
1308 13:10:34.168142 TX Bit6 (975~998) 24 986, Bit14 (966~990) 25 978,
1309 13:10:34.171108 TX Bit7 (976~999) 24 987, Bit15 (968~992) 25 980,
1310 13:10:34.171199
1311 13:10:34.174570 Write Rank0 MR14 =0x24
1312 13:10:34.184300
1313 13:10:34.187812 CH=0, VrefRange= 0, VrefLevel = 36
1314 13:10:34.191388 TX Bit0 (977~1001) 25 989, Bit8 (961~985) 25 973,
1315 13:10:34.194359 TX Bit1 (976~1000) 25 988, Bit9 (965~989) 25 977,
1316 13:10:34.201216 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1317 13:10:34.204464 TX Bit3 (970~994) 25 982, Bit11 (964~987) 24 975,
1318 13:10:34.207851 TX Bit4 (976~999) 24 987, Bit12 (966~989) 24 977,
1319 13:10:34.214760 TX Bit5 (974~997) 24 985, Bit13 (966~989) 24 977,
1320 13:10:34.217926 TX Bit6 (975~998) 24 986, Bit14 (966~990) 25 978,
1321 13:10:34.220919 TX Bit7 (976~999) 24 987, Bit15 (968~992) 25 980,
1322 13:10:34.224671
1323 13:10:34.224755
1324 13:10:34.228127 TX Vref found, early break! 368< 371
1325 13:10:34.231433 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1326 13:10:34.234447 u1DelayCellOfst[0]=9 cells (7 PI)
1327 13:10:34.237835 u1DelayCellOfst[1]=7 cells (6 PI)
1328 13:10:34.241517 u1DelayCellOfst[2]=7 cells (6 PI)
1329 13:10:34.244717 u1DelayCellOfst[3]=0 cells (0 PI)
1330 13:10:34.244802 u1DelayCellOfst[4]=6 cells (5 PI)
1331 13:10:34.248130 u1DelayCellOfst[5]=3 cells (3 PI)
1332 13:10:34.251458 u1DelayCellOfst[6]=5 cells (4 PI)
1333 13:10:34.254562 u1DelayCellOfst[7]=6 cells (5 PI)
1334 13:10:34.258093 Byte0, DQ PI dly=982, DQM PI dly= 985
1335 13:10:34.261356 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1336 13:10:34.264483
1337 13:10:34.268250 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1338 13:10:34.268337
1339 13:10:34.271386 u1DelayCellOfst[8]=0 cells (0 PI)
1340 13:10:34.274875 u1DelayCellOfst[9]=5 cells (4 PI)
1341 13:10:34.278120 u1DelayCellOfst[10]=9 cells (7 PI)
1342 13:10:34.281374 u1DelayCellOfst[11]=2 cells (2 PI)
1343 13:10:34.281459 u1DelayCellOfst[12]=5 cells (4 PI)
1344 13:10:34.284827 u1DelayCellOfst[13]=5 cells (4 PI)
1345 13:10:34.288583 u1DelayCellOfst[14]=6 cells (5 PI)
1346 13:10:34.291750 u1DelayCellOfst[15]=9 cells (7 PI)
1347 13:10:34.294835 Byte1, DQ PI dly=973, DQM PI dly= 976
1348 13:10:34.301181 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)
1349 13:10:34.301267
1350 13:10:34.304533 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)
1351 13:10:34.304619
1352 13:10:34.308312 Write Rank0 MR14 =0x1a
1353 13:10:34.308397
1354 13:10:34.308474 Final TX Range 0 Vref 26
1355 13:10:34.308540
1356 13:10:34.314671 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1357 13:10:34.314757
1358 13:10:34.321651 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1359 13:10:34.327965 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1360 13:10:34.335122 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1361 13:10:34.338250 Write Rank0 MR3 =0xb0
1362 13:10:34.341885 DramC Write-DBI on
1363 13:10:34.341969 ==
1364 13:10:34.344658 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1365 13:10:34.348006 fsp= 1, odt_onoff= 1, Byte mode= 0
1366 13:10:34.348091 ==
1367 13:10:34.351661 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1368 13:10:34.351747
1369 13:10:34.354900 Begin, DQ Scan Range 696~760
1370 13:10:34.354985
1371 13:10:34.355051
1372 13:10:34.358066 TX Vref Scan disable
1373 13:10:34.361309 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1374 13:10:34.364531 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1375 13:10:34.368343 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1376 13:10:34.371580 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1377 13:10:34.374960 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1378 13:10:34.378274 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1379 13:10:34.381833 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1380 13:10:34.385049 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1381 13:10:34.388210 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1382 13:10:34.391555 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1383 13:10:34.395199 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1384 13:10:34.398440 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1385 13:10:34.405214 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1386 13:10:34.408404 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1387 13:10:34.411497 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1388 13:10:34.414967 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1389 13:10:34.418531 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1390 13:10:34.421726 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1391 13:10:34.424979 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1392 13:10:34.428203 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1393 13:10:34.431545 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1394 13:10:34.435267 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1395 13:10:34.438550 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1396 13:10:34.441660 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1397 13:10:34.449015 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1398 13:10:34.452565 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1399 13:10:34.455682 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1400 13:10:34.458924 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1401 13:10:34.462702 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1402 13:10:34.465831 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1403 13:10:34.469058 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1404 13:10:34.472668 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1405 13:10:34.476107 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1406 13:10:34.479436 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1407 13:10:34.482712 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1408 13:10:34.486016 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
1409 13:10:34.489061 Byte0, DQ PI dly=732, DQM PI dly= 732
1410 13:10:34.492672 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1411 13:10:34.495958
1412 13:10:34.499170 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1413 13:10:34.499255
1414 13:10:34.502569 Byte1, DQ PI dly=721, DQM PI dly= 721
1415 13:10:34.506000 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
1416 13:10:34.506085
1417 13:10:34.509384 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
1418 13:10:34.509496
1419 13:10:34.516310 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1420 13:10:34.523004 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1421 13:10:34.533232 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1422 13:10:34.533319 Write Rank0 MR3 =0x30
1423 13:10:34.536388 DramC Write-DBI off
1424 13:10:34.536501
1425 13:10:34.536570 [DATLAT]
1426 13:10:34.539566 Freq=1600, CH0 RK0, use_rxtx_scan=0
1427 13:10:34.539651
1428 13:10:34.543109 DATLAT Default: 0xf
1429 13:10:34.543199 7, 0xFFFF, sum=0
1430 13:10:34.546228 8, 0xFFFF, sum=0
1431 13:10:34.546315 9, 0xFFFF, sum=0
1432 13:10:34.546382 10, 0xFFFF, sum=0
1433 13:10:34.549773 11, 0xFFFF, sum=0
1434 13:10:34.549859 12, 0xFFFF, sum=0
1435 13:10:34.553196 13, 0xFFFF, sum=0
1436 13:10:34.553283 14, 0x0, sum=1
1437 13:10:34.556480 15, 0x0, sum=2
1438 13:10:34.556567 16, 0x0, sum=3
1439 13:10:34.559748 17, 0x0, sum=4
1440 13:10:34.563041 pattern=2 first_step=14 total pass=5 best_step=16
1441 13:10:34.563125 ==
1442 13:10:34.566098 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1443 13:10:34.569969 fsp= 1, odt_onoff= 1, Byte mode= 0
1444 13:10:34.570054 ==
1445 13:10:34.576358 Start DQ dly to find pass range UseTestEngine =1
1446 13:10:34.580125 x-axis: bit #, y-axis: DQ dly (-127~63)
1447 13:10:34.580237 RX Vref Scan = 1
1448 13:10:34.696020
1449 13:10:34.696157 RX Vref found, early break!
1450 13:10:34.696226
1451 13:10:34.702297 Final RX Vref 12, apply to both rank0 and 1
1452 13:10:34.702386 ==
1453 13:10:34.705770 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1454 13:10:34.708996 fsp= 1, odt_onoff= 1, Byte mode= 0
1455 13:10:34.709082 ==
1456 13:10:34.709148 DQS Delay:
1457 13:10:34.712260 DQS0 = 0, DQS1 = 0
1458 13:10:34.712345 DQM Delay:
1459 13:10:34.715739 DQM0 = 19, DQM1 = 18
1460 13:10:34.715824 DQ Delay:
1461 13:10:34.719040 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15
1462 13:10:34.722523 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
1463 13:10:34.725389 DQ8 =14, DQ9 =16, DQ10 =26, DQ11 =16
1464 13:10:34.729054 DQ12 =18, DQ13 =18, DQ14 =20, DQ15 =21
1465 13:10:34.729139
1466 13:10:34.729206
1467 13:10:34.729268
1468 13:10:34.732170 [DramC_TX_OE_Calibration] TA2
1469 13:10:34.735666 Original DQ_B0 (3 6) =30, OEN = 27
1470 13:10:34.738933 Original DQ_B1 (3 6) =30, OEN = 27
1471 13:10:34.742143 23, 0x0, End_B0=23 End_B1=23
1472 13:10:34.742230 24, 0x0, End_B0=24 End_B1=24
1473 13:10:34.745469 25, 0x0, End_B0=25 End_B1=25
1474 13:10:34.749219 26, 0x0, End_B0=26 End_B1=26
1475 13:10:34.752388 27, 0x0, End_B0=27 End_B1=27
1476 13:10:34.752504 28, 0x0, End_B0=28 End_B1=28
1477 13:10:34.755438 29, 0x0, End_B0=29 End_B1=29
1478 13:10:34.759242 30, 0x0, End_B0=30 End_B1=30
1479 13:10:34.762495 31, 0xFBFF, End_B0=30 End_B1=30
1480 13:10:34.765617 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1481 13:10:34.772302 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1482 13:10:34.772418
1483 13:10:34.772509
1484 13:10:34.775323 Write Rank0 MR23 =0x3f
1485 13:10:34.775433 [DQSOSC]
1486 13:10:34.785610 [DQSOSCAuto] RK0, (LSB)MR18= 0x1515, (MSB)MR19= 0x303, tDQSOscB0 = 399 ps tDQSOscB1 = 399 ps
1487 13:10:34.789316 CH0_RK0: MR19=0x303, MR18=0x1515, DQSOSC=399, MR23=63, INC=15, DEC=23
1488 13:10:34.792676 Write Rank0 MR23 =0x3f
1489 13:10:34.792767 [DQSOSC]
1490 13:10:34.802845 [DQSOSCAuto] RK0, (LSB)MR18= 0x1212, (MSB)MR19= 0x303, tDQSOscB0 = 400 ps tDQSOscB1 = 400 ps
1491 13:10:34.802942 CH0 RK0: MR19=303, MR18=1212
1492 13:10:34.809060 [RankSwap] Rank num 2, (Multi 1), Rank 1
1493 13:10:34.809147 Write Rank0 MR2 =0xad
1494 13:10:34.812738 [Write Leveling]
1495 13:10:34.812823 delay byte0 byte1 byte2 byte3
1496 13:10:34.816079
1497 13:10:34.816164 10 0 0
1498 13:10:34.816232 11 0 0
1499 13:10:34.819299 12 0 0
1500 13:10:34.819386 13 0 0
1501 13:10:34.822501 14 0 0
1502 13:10:34.822587 15 0 0
1503 13:10:34.822656 16 0 0
1504 13:10:34.825867 17 0 0
1505 13:10:34.825955 18 0 0
1506 13:10:34.829343 19 0 0
1507 13:10:34.829429 20 0 0
1508 13:10:34.829495 21 0 0
1509 13:10:34.832385 22 0 0
1510 13:10:34.832479 23 0 0
1511 13:10:34.835714 24 0 ff
1512 13:10:34.835802 25 0 ff
1513 13:10:34.839463 26 ff ff
1514 13:10:34.839549 27 ff ff
1515 13:10:34.842336 28 ff ff
1516 13:10:34.842422 29 ff ff
1517 13:10:34.845796 30 ff ff
1518 13:10:34.845882 31 ff ff
1519 13:10:34.845948 32 ff ff
1520 13:10:34.852776 pass bytecount = 0xff (0xff: all bytes pass)
1521 13:10:34.852861
1522 13:10:34.852926 DQS0 dly: 26
1523 13:10:34.852985 DQS1 dly: 24
1524 13:10:34.855937 Write Rank0 MR2 =0x2d
1525 13:10:34.858981 [RankSwap] Rank num 2, (Multi 1), Rank 0
1526 13:10:34.862442 Write Rank1 MR1 =0xd6
1527 13:10:34.862526 [Gating]
1528 13:10:34.862591 ==
1529 13:10:34.869317 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1530 13:10:34.869403 fsp= 1, odt_onoff= 1, Byte mode= 0
1531 13:10:34.872423 ==
1532 13:10:34.876001 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1533 13:10:34.879172 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1534 13:10:34.882789 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1535 13:10:34.889211 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1536 13:10:34.892294 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1537 13:10:34.895740 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1538 13:10:34.903008 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1539 13:10:34.905983 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1540 13:10:34.909396 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1541 13:10:34.916187 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1542 13:10:34.919422 3 2 8 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1543 13:10:34.923122 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1544 13:10:34.926461 3 2 16 |3534 403 |(11 11)(11 11) |(0 0)(1 1)| 0
1545 13:10:34.932656 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1546 13:10:34.936179 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1547 13:10:34.939812 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1548 13:10:34.946296 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1549 13:10:34.949409 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1550 13:10:34.952976 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1551 13:10:34.956353 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1552 13:10:34.963345 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1553 13:10:34.966208 3 3 20 |3534 908 |(11 11)(11 11) |(0 0)(1 1)| 0
1554 13:10:34.969747 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1555 13:10:34.976425 [Byte 1] Lead/lag falling Transition (3, 3, 24)
1556 13:10:34.979527 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1557 13:10:34.983364 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1558 13:10:34.989787 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1559 13:10:34.992997 3 4 8 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1560 13:10:34.996332 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1561 13:10:35.000012 3 4 16 |3d3d 1716 |(11 11)(11 11) |(1 1)(1 1)| 0
1562 13:10:35.006834 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1563 13:10:35.010013 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1564 13:10:35.012992 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1565 13:10:35.019709 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1566 13:10:35.023133 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1567 13:10:35.026543 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1568 13:10:35.032861 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1569 13:10:35.036602 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1570 13:10:35.039546 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1571 13:10:35.046622 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1572 13:10:35.049746 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1573 13:10:35.053380 [Byte 0] Lead/lag falling Transition (3, 5, 28)
1574 13:10:35.056602 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1575 13:10:35.063263 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1576 13:10:35.066374 [Byte 0] Lead/lag Transition tap number (3)
1577 13:10:35.069612 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1578 13:10:35.073182 3 6 8 |d0c 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1579 13:10:35.079946 [Byte 1] Lead/lag Transition tap number (2)
1580 13:10:35.083196 3 6 12 |e0e 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1581 13:10:35.086417 3 6 16 |4646 a0a |(0 0)(11 11) |(0 0)(0 0)| 0
1582 13:10:35.090262 [Byte 0]First pass (3, 6, 16)
1583 13:10:35.093363 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1584 13:10:35.096531 [Byte 1]First pass (3, 6, 20)
1585 13:10:35.099921 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1586 13:10:35.103463 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1587 13:10:35.109708 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1588 13:10:35.113489 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1589 13:10:35.116550 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1590 13:10:35.119992 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1591 13:10:35.123377 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1592 13:10:35.130198 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1593 13:10:35.133339 All bytes gating window > 1UI, Early break!
1594 13:10:35.133424
1595 13:10:35.137020 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 2)
1596 13:10:35.137105
1597 13:10:35.140105 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1598 13:10:35.140189
1599 13:10:35.140255
1600 13:10:35.140315
1601 13:10:35.143394 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 2)
1602 13:10:35.143480
1603 13:10:35.146594 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1604 13:10:35.146679
1605 13:10:35.149961
1606 13:10:35.150046 Write Rank1 MR1 =0x56
1607 13:10:35.150113
1608 13:10:35.153101 best RODT dly(2T, 0.5T) = (2, 3)
1609 13:10:35.153185
1610 13:10:35.156349 best RODT dly(2T, 0.5T) = (2, 3)
1611 13:10:35.156468 ==
1612 13:10:35.163312 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1613 13:10:35.163399 fsp= 1, odt_onoff= 1, Byte mode= 0
1614 13:10:35.166369 ==
1615 13:10:35.169966 Start DQ dly to find pass range UseTestEngine =0
1616 13:10:35.173308 x-axis: bit #, y-axis: DQ dly (-127~63)
1617 13:10:35.173395 RX Vref Scan = 0
1618 13:10:35.176630 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1619 13:10:35.179885 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1620 13:10:35.183071 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1621 13:10:35.186430 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1622 13:10:35.189927 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1623 13:10:35.193153 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1624 13:10:35.196353 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1625 13:10:35.196475 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1626 13:10:35.199735 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1627 13:10:35.203438 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1628 13:10:35.206785 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1629 13:10:35.209993 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1630 13:10:35.213443 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1631 13:10:35.216718 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1632 13:10:35.219926 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1633 13:10:35.220013 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1634 13:10:35.223681 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1635 13:10:35.226655 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1636 13:10:35.229985 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1637 13:10:35.233535 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1638 13:10:35.236847 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1639 13:10:35.240120 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1640 13:10:35.240207 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1641 13:10:35.243698 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1642 13:10:35.246766 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1643 13:10:35.250007 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1644 13:10:35.253228 0, [0] xxxoxoxx ooxooxxx [MSB]
1645 13:10:35.256758 1, [0] xxxoxoxx ooxoooxx [MSB]
1646 13:10:35.256847 2, [0] xxxoxooo ooxoooox [MSB]
1647 13:10:35.259941 3, [0] xoxooooo ooxoooox [MSB]
1648 13:10:35.263651 4, [0] xoxooooo ooxoooox [MSB]
1649 13:10:35.266784 5, [0] oooooooo ooxooooo [MSB]
1650 13:10:35.270043 6, [0] oooooooo ooxooooo [MSB]
1651 13:10:35.273422 33, [0] oooooooo xooooooo [MSB]
1652 13:10:35.273524 34, [0] oooooooo xooooooo [MSB]
1653 13:10:35.286321 35, [0] oooxoooo xooooooo [MSB]
1654 13:10:35.286429 36, [0] oooxoooo xooxoooo [MSB]
1655 13:10:35.286499 37, [0] oooxoxoo xxoxoxoo [MSB]
1656 13:10:35.286752 38, [0] oooxoxoo xxoxoxxo [MSB]
1657 13:10:35.290131 39, [0] oooxoxxx xxoxxxxo [MSB]
1658 13:10:35.293732 40, [0] oooxoxxx xxoxxxxo [MSB]
1659 13:10:35.293821 41, [0] oxxxoxxx xxoxxxxx [MSB]
1660 13:10:35.296780 42, [0] oxxxxxxx xxoxxxxx [MSB]
1661 13:10:35.300359 43, [0] xxxxxxxx xxoxxxxx [MSB]
1662 13:10:35.303596 44, [0] xxxxxxxx xxoxxxxx [MSB]
1663 13:10:35.307093 45, [0] xxxxxxxx xxxxxxxx [MSB]
1664 13:10:35.310400 iDelay=45, Bit 0, Center 23 (5 ~ 42) 38
1665 13:10:35.313497 iDelay=45, Bit 1, Center 21 (3 ~ 40) 38
1666 13:10:35.316729 iDelay=45, Bit 2, Center 22 (5 ~ 40) 36
1667 13:10:35.320155 iDelay=45, Bit 3, Center 16 (-2 ~ 34) 37
1668 13:10:35.323374 iDelay=45, Bit 4, Center 22 (3 ~ 41) 39
1669 13:10:35.327035 iDelay=45, Bit 5, Center 18 (0 ~ 36) 37
1670 13:10:35.330110 iDelay=45, Bit 6, Center 20 (2 ~ 38) 37
1671 13:10:35.333299 iDelay=45, Bit 7, Center 20 (2 ~ 38) 37
1672 13:10:35.337282 iDelay=45, Bit 8, Center 15 (-2 ~ 32) 35
1673 13:10:35.340686 iDelay=45, Bit 9, Center 18 (0 ~ 36) 37
1674 13:10:35.346751 iDelay=45, Bit 10, Center 25 (7 ~ 44) 38
1675 13:10:35.350514 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1676 13:10:35.353697 iDelay=45, Bit 12, Center 19 (0 ~ 38) 39
1677 13:10:35.357089 iDelay=45, Bit 13, Center 18 (1 ~ 36) 36
1678 13:10:35.360406 iDelay=45, Bit 14, Center 19 (2 ~ 37) 36
1679 13:10:35.363711 iDelay=45, Bit 15, Center 22 (5 ~ 40) 36
1680 13:10:35.363797 ==
1681 13:10:35.370458 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1682 13:10:35.373544 fsp= 1, odt_onoff= 1, Byte mode= 0
1683 13:10:35.373631 ==
1684 13:10:35.373698 DQS Delay:
1685 13:10:35.373760 DQS0 = 0, DQS1 = 0
1686 13:10:35.376846 DQM Delay:
1687 13:10:35.376939 DQM0 = 20, DQM1 = 19
1688 13:10:35.380442 DQ Delay:
1689 13:10:35.383367 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =16
1690 13:10:35.383513 DQ4 =22, DQ5 =18, DQ6 =20, DQ7 =20
1691 13:10:35.386940 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
1692 13:10:35.390194 DQ12 =19, DQ13 =18, DQ14 =19, DQ15 =22
1693 13:10:35.393650
1694 13:10:35.393784
1695 13:10:35.393896 DramC Write-DBI off
1696 13:10:35.394001 ==
1697 13:10:35.400044 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1698 13:10:35.403420 fsp= 1, odt_onoff= 1, Byte mode= 0
1699 13:10:35.403549 ==
1700 13:10:35.406989 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1701 13:10:35.407150
1702 13:10:35.410734 Begin, DQ Scan Range 920~1176
1703 13:10:35.410888
1704 13:10:35.410986
1705 13:10:35.413874 TX Vref Scan disable
1706 13:10:35.417193 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1707 13:10:35.420408 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1708 13:10:35.423782 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1709 13:10:35.427137 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1710 13:10:35.430258 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1711 13:10:35.433671 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1712 13:10:35.436948 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1713 13:10:35.440215 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1714 13:10:35.444044 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1715 13:10:35.446855 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1716 13:10:35.450587 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1717 13:10:35.453352 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1718 13:10:35.457149 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1719 13:10:35.460429 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1720 13:10:35.463874 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1721 13:10:35.470297 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1722 13:10:35.473424 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1723 13:10:35.476704 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1724 13:10:35.480145 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1725 13:10:35.483570 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1726 13:10:35.487060 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1727 13:10:35.490347 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1728 13:10:35.493604 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1729 13:10:35.496977 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1730 13:10:35.500572 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1731 13:10:35.503684 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1732 13:10:35.506994 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1733 13:10:35.510447 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1734 13:10:35.514259 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1735 13:10:35.517166 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1736 13:10:35.520358 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1737 13:10:35.523984 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1738 13:10:35.527016 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1739 13:10:35.533573 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1740 13:10:35.537291 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1741 13:10:35.540389 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1742 13:10:35.543821 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1743 13:10:35.547363 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1744 13:10:35.550373 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1745 13:10:35.554108 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1746 13:10:35.556962 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1747 13:10:35.560608 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1748 13:10:35.564003 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1749 13:10:35.566956 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1750 13:10:35.570502 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1751 13:10:35.573683 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1752 13:10:35.577070 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1753 13:10:35.580654 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1754 13:10:35.583816 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1755 13:10:35.587114 969 |3 6 9|[0] xxxxxxxx ooxooxxx [MSB]
1756 13:10:35.590442 970 |3 6 10|[0] xxxxxxxx ooxooxox [MSB]
1757 13:10:35.593877 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1758 13:10:35.597068 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1759 13:10:35.600859 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1760 13:10:35.607066 974 |3 6 14|[0] xoxooooo ooxooooo [MSB]
1761 13:10:35.610294 975 |3 6 15|[0] ooxooooo oooooooo [MSB]
1762 13:10:35.613758 987 |3 6 27|[0] oooooooo xooooooo [MSB]
1763 13:10:35.617075 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1764 13:10:35.620369 989 |3 6 29|[0] oooxoooo xxxxxxxx [MSB]
1765 13:10:35.623583 990 |3 6 30|[0] oooxoooo xxxxxxxx [MSB]
1766 13:10:35.626934 991 |3 6 31|[0] oooxoxoo xxxxxxxx [MSB]
1767 13:10:35.630495 992 |3 6 32|[0] xxxxxxxx xxxxxxxx [MSB]
1768 13:10:35.633603 Byte0, DQ PI dly=982, DQM PI dly= 982
1769 13:10:35.640579 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1770 13:10:35.640674
1771 13:10:35.643644 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1772 13:10:35.643730
1773 13:10:35.647015 Byte1, DQ PI dly=979, DQM PI dly= 979
1774 13:10:35.650388 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1775 13:10:35.653741
1776 13:10:35.657390 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1777 13:10:35.657506
1778 13:10:35.657607 ==
1779 13:10:35.660541 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1780 13:10:35.664019 fsp= 1, odt_onoff= 1, Byte mode= 0
1781 13:10:35.664126 ==
1782 13:10:35.670551 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1783 13:10:35.670640
1784 13:10:35.673744 Begin, DQ Scan Range 955~1019
1785 13:10:35.673830 Write Rank1 MR14 =0x0
1786 13:10:35.686317
1787 13:10:35.686444 CH=0, VrefRange= 0, VrefLevel = 0
1788 13:10:35.692813 TX Bit0 (977~991) 15 984, Bit8 (969~982) 14 975,
1789 13:10:35.696160 TX Bit1 (977~988) 12 982, Bit9 (971~984) 14 977,
1790 13:10:35.703020 TX Bit2 (977~989) 13 983, Bit10 (977~984) 8 980,
1791 13:10:35.705960 TX Bit3 (971~983) 13 977, Bit11 (970~983) 14 976,
1792 13:10:35.709715 TX Bit4 (976~988) 13 982, Bit12 (973~984) 12 978,
1793 13:10:35.716572 TX Bit5 (974~985) 12 979, Bit13 (975~982) 8 978,
1794 13:10:35.719272 TX Bit6 (974~987) 14 980, Bit14 (974~984) 11 979,
1795 13:10:35.722846 TX Bit7 (975~989) 15 982, Bit15 (976~989) 14 982,
1796 13:10:35.722960
1797 13:10:35.726079 Write Rank1 MR14 =0x2
1798 13:10:35.733570
1799 13:10:35.733679 CH=0, VrefRange= 0, VrefLevel = 2
1800 13:10:35.740034 TX Bit0 (977~991) 15 984, Bit8 (969~983) 15 976,
1801 13:10:35.743417 TX Bit1 (976~988) 13 982, Bit9 (971~985) 15 978,
1802 13:10:35.750151 TX Bit2 (977~990) 14 983, Bit10 (976~990) 15 983,
1803 13:10:35.754029 TX Bit3 (970~983) 14 976, Bit11 (970~983) 14 976,
1804 13:10:35.756968 TX Bit4 (976~990) 15 983, Bit12 (973~985) 13 979,
1805 13:10:35.763582 TX Bit5 (973~985) 13 979, Bit13 (974~983) 10 978,
1806 13:10:35.767300 TX Bit6 (974~988) 15 981, Bit14 (974~986) 13 980,
1807 13:10:35.770524 TX Bit7 (975~990) 16 982, Bit15 (975~990) 16 982,
1808 13:10:35.770639
1809 13:10:35.773490 Write Rank1 MR14 =0x4
1810 13:10:35.781499
1811 13:10:35.781609 CH=0, VrefRange= 0, VrefLevel = 4
1812 13:10:35.788044 TX Bit0 (977~992) 16 984, Bit8 (969~983) 15 976,
1813 13:10:35.791280 TX Bit1 (976~990) 15 983, Bit9 (970~986) 17 978,
1814 13:10:35.798498 TX Bit2 (977~990) 14 983, Bit10 (976~990) 15 983,
1815 13:10:35.801338 TX Bit3 (970~984) 15 977, Bit11 (969~984) 16 976,
1816 13:10:35.804429 TX Bit4 (975~990) 16 982, Bit12 (972~986) 15 979,
1817 13:10:35.811336 TX Bit5 (972~987) 16 979, Bit13 (974~984) 11 979,
1818 13:10:35.815210 TX Bit6 (974~989) 16 981, Bit14 (973~986) 14 979,
1819 13:10:35.818200 TX Bit7 (975~990) 16 982, Bit15 (976~991) 16 983,
1820 13:10:35.818308
1821 13:10:35.821239 Write Rank1 MR14 =0x6
1822 13:10:35.828979
1823 13:10:35.829067 CH=0, VrefRange= 0, VrefLevel = 6
1824 13:10:35.835876 TX Bit0 (977~992) 16 984, Bit8 (968~984) 17 976,
1825 13:10:35.839503 TX Bit1 (976~990) 15 983, Bit9 (970~986) 17 978,
1826 13:10:35.845591 TX Bit2 (977~991) 15 984, Bit10 (976~991) 16 983,
1827 13:10:35.849154 TX Bit3 (970~984) 15 977, Bit11 (969~984) 16 976,
1828 13:10:35.852421 TX Bit4 (975~991) 17 983, Bit12 (972~986) 15 979,
1829 13:10:35.859489 TX Bit5 (972~987) 16 979, Bit13 (973~984) 12 978,
1830 13:10:35.862616 TX Bit6 (973~990) 18 981, Bit14 (973~988) 16 980,
1831 13:10:35.865719 TX Bit7 (974~991) 18 982, Bit15 (975~991) 17 983,
1832 13:10:35.865808
1833 13:10:35.869176 Write Rank1 MR14 =0x8
1834 13:10:35.877157
1835 13:10:35.877249 CH=0, VrefRange= 0, VrefLevel = 8
1836 13:10:35.883575 TX Bit0 (977~992) 16 984, Bit8 (968~984) 17 976,
1837 13:10:35.887007 TX Bit1 (976~991) 16 983, Bit9 (970~987) 18 978,
1838 13:10:35.893568 TX Bit2 (977~991) 15 984, Bit10 (976~991) 16 983,
1839 13:10:35.896842 TX Bit3 (969~986) 18 977, Bit11 (969~985) 17 977,
1840 13:10:35.900607 TX Bit4 (975~991) 17 983, Bit12 (971~988) 18 979,
1841 13:10:35.907360 TX Bit5 (971~989) 19 980, Bit13 (973~986) 14 979,
1842 13:10:35.910451 TX Bit6 (973~990) 18 981, Bit14 (972~989) 18 980,
1843 13:10:35.913796 TX Bit7 (974~991) 18 982, Bit15 (975~991) 17 983,
1844 13:10:35.913880
1845 13:10:35.916970 Write Rank1 MR14 =0xa
1846 13:10:35.925435
1847 13:10:35.925522 CH=0, VrefRange= 0, VrefLevel = 10
1848 13:10:35.931789 TX Bit0 (976~993) 18 984, Bit8 (968~985) 18 976,
1849 13:10:35.935075 TX Bit1 (975~991) 17 983, Bit9 (969~988) 20 978,
1850 13:10:35.941506 TX Bit2 (976~992) 17 984, Bit10 (975~992) 18 983,
1851 13:10:35.944996 TX Bit3 (969~986) 18 977, Bit11 (968~985) 18 976,
1852 13:10:35.948539 TX Bit4 (974~992) 19 983, Bit12 (970~988) 19 979,
1853 13:10:35.955409 TX Bit5 (971~990) 20 980, Bit13 (972~986) 15 979,
1854 13:10:35.958801 TX Bit6 (972~991) 20 981, Bit14 (971~989) 19 980,
1855 13:10:35.962138 TX Bit7 (974~992) 19 983, Bit15 (975~992) 18 983,
1856 13:10:35.962224
1857 13:10:35.965114 Write Rank1 MR14 =0xc
1858 13:10:35.973354
1859 13:10:35.976535 CH=0, VrefRange= 0, VrefLevel = 12
1860 13:10:35.979925 TX Bit0 (976~993) 18 984, Bit8 (968~985) 18 976,
1861 13:10:35.982904 TX Bit1 (975~992) 18 983, Bit9 (969~988) 20 978,
1862 13:10:35.989824 TX Bit2 (976~992) 17 984, Bit10 (975~992) 18 983,
1863 13:10:35.993101 TX Bit3 (969~987) 19 978, Bit11 (968~986) 19 977,
1864 13:10:35.996347 TX Bit4 (974~992) 19 983, Bit12 (970~989) 20 979,
1865 13:10:36.003155 TX Bit5 (971~990) 20 980, Bit13 (972~987) 16 979,
1866 13:10:36.006571 TX Bit6 (972~991) 20 981, Bit14 (971~990) 20 980,
1867 13:10:36.009827 TX Bit7 (973~992) 20 982, Bit15 (974~992) 19 983,
1868 13:10:36.009913
1869 13:10:36.013341 Write Rank1 MR14 =0xe
1870 13:10:36.021061
1871 13:10:36.024352 CH=0, VrefRange= 0, VrefLevel = 14
1872 13:10:36.027740 TX Bit0 (976~994) 19 985, Bit8 (967~986) 20 976,
1873 13:10:36.031399 TX Bit1 (975~992) 18 983, Bit9 (969~989) 21 979,
1874 13:10:36.038215 TX Bit2 (976~993) 18 984, Bit10 (975~993) 19 984,
1875 13:10:36.041405 TX Bit3 (969~987) 19 978, Bit11 (968~987) 20 977,
1876 13:10:36.044634 TX Bit4 (973~992) 20 982, Bit12 (970~990) 21 980,
1877 13:10:36.051521 TX Bit5 (970~990) 21 980, Bit13 (971~987) 17 979,
1878 13:10:36.054522 TX Bit6 (971~991) 21 981, Bit14 (971~990) 20 980,
1879 13:10:36.057914 TX Bit7 (973~992) 20 982, Bit15 (974~992) 19 983,
1880 13:10:36.058002
1881 13:10:36.061216 Write Rank1 MR14 =0x10
1882 13:10:36.070037
1883 13:10:36.070133 CH=0, VrefRange= 0, VrefLevel = 16
1884 13:10:36.076132 TX Bit0 (976~994) 19 985, Bit8 (967~986) 20 976,
1885 13:10:36.079826 TX Bit1 (974~992) 19 983, Bit9 (969~990) 22 979,
1886 13:10:36.086273 TX Bit2 (976~993) 18 984, Bit10 (975~993) 19 984,
1887 13:10:36.089930 TX Bit3 (968~988) 21 978, Bit11 (968~987) 20 977,
1888 13:10:36.093013 TX Bit4 (973~993) 21 983, Bit12 (970~990) 21 980,
1889 13:10:36.099679 TX Bit5 (970~991) 22 980, Bit13 (971~989) 19 980,
1890 13:10:36.103064 TX Bit6 (971~992) 22 981, Bit14 (970~990) 21 980,
1891 13:10:36.106660 TX Bit7 (973~993) 21 983, Bit15 (974~993) 20 983,
1892 13:10:36.106768
1893 13:10:36.109653 Write Rank1 MR14 =0x12
1894 13:10:36.117783
1895 13:10:36.121463 CH=0, VrefRange= 0, VrefLevel = 18
1896 13:10:36.124704 TX Bit0 (975~995) 21 985, Bit8 (967~987) 21 977,
1897 13:10:36.127768 TX Bit1 (974~993) 20 983, Bit9 (968~990) 23 979,
1898 13:10:36.134874 TX Bit2 (976~993) 18 984, Bit10 (974~994) 21 984,
1899 13:10:36.137954 TX Bit3 (968~988) 21 978, Bit11 (968~989) 22 978,
1900 13:10:36.141407 TX Bit4 (973~993) 21 983, Bit12 (969~990) 22 979,
1901 13:10:36.147752 TX Bit5 (970~991) 22 980, Bit13 (971~989) 19 980,
1902 13:10:36.151251 TX Bit6 (971~992) 22 981, Bit14 (970~991) 22 980,
1903 13:10:36.154726 TX Bit7 (972~993) 22 982, Bit15 (974~993) 20 983,
1904 13:10:36.154832
1905 13:10:36.157809 Write Rank1 MR14 =0x14
1906 13:10:36.166592
1907 13:10:36.169823 CH=0, VrefRange= 0, VrefLevel = 20
1908 13:10:36.173035 TX Bit0 (975~995) 21 985, Bit8 (967~988) 22 977,
1909 13:10:36.176427 TX Bit1 (974~993) 20 983, Bit9 (969~990) 22 979,
1910 13:10:36.183055 TX Bit2 (975~994) 20 984, Bit10 (974~995) 22 984,
1911 13:10:36.186697 TX Bit3 (968~989) 22 978, Bit11 (968~989) 22 978,
1912 13:10:36.189759 TX Bit4 (972~993) 22 982, Bit12 (969~991) 23 980,
1913 13:10:36.196618 TX Bit5 (969~991) 23 980, Bit13 (970~989) 20 979,
1914 13:10:36.199880 TX Bit6 (970~992) 23 981, Bit14 (970~991) 22 980,
1915 13:10:36.203284 TX Bit7 (971~993) 23 982, Bit15 (973~994) 22 983,
1916 13:10:36.203390
1917 13:10:36.206554 Write Rank1 MR14 =0x16
1918 13:10:36.215590
1919 13:10:36.215702 CH=0, VrefRange= 0, VrefLevel = 22
1920 13:10:36.221955 TX Bit0 (975~997) 23 986, Bit8 (967~989) 23 978,
1921 13:10:36.225082 TX Bit1 (973~994) 22 983, Bit9 (968~991) 24 979,
1922 13:10:36.232046 TX Bit2 (975~994) 20 984, Bit10 (973~995) 23 984,
1923 13:10:36.235043 TX Bit3 (968~990) 23 979, Bit11 (967~989) 23 978,
1924 13:10:36.238699 TX Bit4 (972~994) 23 983, Bit12 (969~991) 23 980,
1925 13:10:36.245036 TX Bit5 (969~991) 23 980, Bit13 (969~990) 22 979,
1926 13:10:36.248754 TX Bit6 (970~992) 23 981, Bit14 (969~991) 23 980,
1927 13:10:36.251719 TX Bit7 (971~994) 24 982, Bit15 (973~994) 22 983,
1928 13:10:36.251805
1929 13:10:36.255366 Write Rank1 MR14 =0x18
1930 13:10:36.264231
1931 13:10:36.267451 CH=0, VrefRange= 0, VrefLevel = 24
1932 13:10:36.270706 TX Bit0 (975~997) 23 986, Bit8 (967~990) 24 978,
1933 13:10:36.274197 TX Bit1 (973~994) 22 983, Bit9 (968~991) 24 979,
1934 13:10:36.280811 TX Bit2 (975~995) 21 985, Bit10 (974~996) 23 985,
1935 13:10:36.284113 TX Bit3 (968~990) 23 979, Bit11 (967~990) 24 978,
1936 13:10:36.287592 TX Bit4 (971~994) 24 982, Bit12 (969~992) 24 980,
1937 13:10:36.294487 TX Bit5 (969~992) 24 980, Bit13 (969~990) 22 979,
1938 13:10:36.297661 TX Bit6 (970~993) 24 981, Bit14 (969~992) 24 980,
1939 13:10:36.300769 TX Bit7 (970~994) 25 982, Bit15 (973~995) 23 984,
1940 13:10:36.300858
1941 13:10:36.304305 Write Rank1 MR14 =0x1a
1942 13:10:36.312683
1943 13:10:36.316257 CH=0, VrefRange= 0, VrefLevel = 26
1944 13:10:36.319350 TX Bit0 (974~997) 24 985, Bit8 (966~990) 25 978,
1945 13:10:36.322739 TX Bit1 (972~995) 24 983, Bit9 (968~991) 24 979,
1946 13:10:36.329450 TX Bit2 (975~996) 22 985, Bit10 (973~996) 24 984,
1947 13:10:36.332624 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1948 13:10:36.336389 TX Bit4 (971~995) 25 983, Bit12 (968~992) 25 980,
1949 13:10:36.343105 TX Bit5 (969~992) 24 980, Bit13 (969~990) 22 979,
1950 13:10:36.346674 TX Bit6 (970~994) 25 982, Bit14 (969~992) 24 980,
1951 13:10:36.349622 TX Bit7 (971~995) 25 983, Bit15 (972~995) 24 983,
1952 13:10:36.349709
1953 13:10:36.352922 Write Rank1 MR14 =0x1c
1954 13:10:36.361582
1955 13:10:36.361670 CH=0, VrefRange= 0, VrefLevel = 28
1956 13:10:36.368315 TX Bit0 (974~998) 25 986, Bit8 (966~990) 25 978,
1957 13:10:36.371620 TX Bit1 (972~995) 24 983, Bit9 (968~991) 24 979,
1958 13:10:36.378492 TX Bit2 (974~997) 24 985, Bit10 (973~997) 25 985,
1959 13:10:36.381987 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1960 13:10:36.385006 TX Bit4 (971~995) 25 983, Bit12 (968~992) 25 980,
1961 13:10:36.392267 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
1962 13:10:36.395092 TX Bit6 (970~994) 25 982, Bit14 (968~993) 26 980,
1963 13:10:36.398766 TX Bit7 (970~996) 27 983, Bit15 (971~997) 27 984,
1964 13:10:36.398855
1965 13:10:36.401926 Write Rank1 MR14 =0x1e
1966 13:10:36.410861
1967 13:10:36.410948 CH=0, VrefRange= 0, VrefLevel = 30
1968 13:10:36.417201 TX Bit0 (973~998) 26 985, Bit8 (967~990) 24 978,
1969 13:10:36.421110 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
1970 13:10:36.427496 TX Bit2 (974~997) 24 985, Bit10 (973~997) 25 985,
1971 13:10:36.430763 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1972 13:10:36.433957 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
1973 13:10:36.440512 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
1974 13:10:36.443908 TX Bit6 (969~994) 26 981, Bit14 (968~992) 25 980,
1975 13:10:36.447431 TX Bit7 (970~996) 27 983, Bit15 (971~996) 26 983,
1976 13:10:36.447519
1977 13:10:36.450558 Write Rank1 MR14 =0x20
1978 13:10:36.459559
1979 13:10:36.459647 CH=0, VrefRange= 0, VrefLevel = 32
1980 13:10:36.466533 TX Bit0 (973~998) 26 985, Bit8 (967~990) 24 978,
1981 13:10:36.469839 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
1982 13:10:36.476360 TX Bit2 (974~997) 24 985, Bit10 (973~997) 25 985,
1983 13:10:36.479778 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1984 13:10:36.483364 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
1985 13:10:36.489805 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
1986 13:10:36.493104 TX Bit6 (969~994) 26 981, Bit14 (968~992) 25 980,
1987 13:10:36.496390 TX Bit7 (970~996) 27 983, Bit15 (971~996) 26 983,
1988 13:10:36.496501
1989 13:10:36.499802 Write Rank1 MR14 =0x22
1990 13:10:36.508540
1991 13:10:36.511798 CH=0, VrefRange= 0, VrefLevel = 34
1992 13:10:36.515082 TX Bit0 (973~998) 26 985, Bit8 (967~990) 24 978,
1993 13:10:36.518383 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
1994 13:10:36.525138 TX Bit2 (974~997) 24 985, Bit10 (973~997) 25 985,
1995 13:10:36.528431 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1996 13:10:36.531729 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
1997 13:10:36.538864 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
1998 13:10:36.541835 TX Bit6 (969~994) 26 981, Bit14 (968~992) 25 980,
1999 13:10:36.545573 TX Bit7 (970~996) 27 983, Bit15 (971~996) 26 983,
2000 13:10:36.545658
2001 13:10:36.548605 Write Rank1 MR14 =0x24
2002 13:10:36.557267
2003 13:10:36.560528 CH=0, VrefRange= 0, VrefLevel = 36
2004 13:10:36.563977 TX Bit0 (973~998) 26 985, Bit8 (967~990) 24 978,
2005 13:10:36.567737 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
2006 13:10:36.573991 TX Bit2 (974~997) 24 985, Bit10 (973~997) 25 985,
2007 13:10:36.577318 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
2008 13:10:36.581000 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
2009 13:10:36.587741 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
2010 13:10:36.591116 TX Bit6 (969~994) 26 981, Bit14 (968~992) 25 980,
2011 13:10:36.594345 TX Bit7 (970~996) 27 983, Bit15 (971~996) 26 983,
2012 13:10:36.594431
2013 13:10:36.597698 Write Rank1 MR14 =0x26
2014 13:10:36.606009
2015 13:10:36.609494 CH=0, VrefRange= 0, VrefLevel = 38
2016 13:10:36.612910 TX Bit0 (973~998) 26 985, Bit8 (967~990) 24 978,
2017 13:10:36.616075 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
2018 13:10:36.622738 TX Bit2 (974~997) 24 985, Bit10 (973~997) 25 985,
2019 13:10:36.625897 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
2020 13:10:36.629799 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
2021 13:10:36.636156 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
2022 13:10:36.639668 TX Bit6 (969~994) 26 981, Bit14 (968~992) 25 980,
2023 13:10:36.642906 TX Bit7 (970~996) 27 983, Bit15 (971~996) 26 983,
2024 13:10:36.642991
2025 13:10:36.646194
2026 13:10:36.646277 TX Vref found, early break! 378< 380
2027 13:10:36.653072 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2028 13:10:36.656254 u1DelayCellOfst[0]=7 cells (6 PI)
2029 13:10:36.659374 u1DelayCellOfst[1]=6 cells (5 PI)
2030 13:10:36.662962 u1DelayCellOfst[2]=7 cells (6 PI)
2031 13:10:36.666238 u1DelayCellOfst[3]=0 cells (0 PI)
2032 13:10:36.666322 u1DelayCellOfst[4]=5 cells (4 PI)
2033 13:10:36.669611 u1DelayCellOfst[5]=2 cells (2 PI)
2034 13:10:36.672765 u1DelayCellOfst[6]=2 cells (2 PI)
2035 13:10:36.676270 u1DelayCellOfst[7]=5 cells (4 PI)
2036 13:10:36.679574 Byte0, DQ PI dly=979, DQM PI dly= 982
2037 13:10:36.682678 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2038 13:10:36.686191
2039 13:10:36.689396 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2040 13:10:36.689481
2041 13:10:36.693393 u1DelayCellOfst[8]=0 cells (0 PI)
2042 13:10:36.696480 u1DelayCellOfst[9]=1 cells (1 PI)
2043 13:10:36.699535 u1DelayCellOfst[10]=9 cells (7 PI)
2044 13:10:36.699662 u1DelayCellOfst[11]=0 cells (0 PI)
2045 13:10:36.702897 u1DelayCellOfst[12]=2 cells (2 PI)
2046 13:10:36.706310 u1DelayCellOfst[13]=2 cells (2 PI)
2047 13:10:36.709913 u1DelayCellOfst[14]=2 cells (2 PI)
2048 13:10:36.712940 u1DelayCellOfst[15]=6 cells (5 PI)
2049 13:10:36.716723 Byte1, DQ PI dly=978, DQM PI dly= 981
2050 13:10:36.722941 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2051 13:10:36.723065
2052 13:10:36.725952 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2053 13:10:36.726080
2054 13:10:36.729464 Write Rank1 MR14 =0x1e
2055 13:10:36.729548
2056 13:10:36.729613 Final TX Range 0 Vref 30
2057 13:10:36.729675
2058 13:10:36.736108 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2059 13:10:36.736194
2060 13:10:36.743228 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2061 13:10:36.749621 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2062 13:10:36.756443 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2063 13:10:36.759607 Write Rank1 MR3 =0xb0
2064 13:10:36.759691 DramC Write-DBI on
2065 13:10:36.763336 ==
2066 13:10:36.766388 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2067 13:10:36.769742 fsp= 1, odt_onoff= 1, Byte mode= 0
2068 13:10:36.769856 ==
2069 13:10:36.773133 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2070 13:10:36.773216
2071 13:10:36.776404 Begin, DQ Scan Range 701~765
2072 13:10:36.776510
2073 13:10:36.776576
2074 13:10:36.779735 TX Vref Scan disable
2075 13:10:36.783028 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2076 13:10:36.786436 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2077 13:10:36.789584 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2078 13:10:36.793472 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2079 13:10:36.796888 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2080 13:10:36.799833 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2081 13:10:36.803487 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2082 13:10:36.806635 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2083 13:10:36.809871 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2084 13:10:36.813072 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2085 13:10:36.816621 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2086 13:10:36.819659 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2087 13:10:36.823275 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2088 13:10:36.826762 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2089 13:10:36.836586 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2090 13:10:36.839745 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2091 13:10:36.843025 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2092 13:10:36.846321 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2093 13:10:36.849925 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2094 13:10:36.853247 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2095 13:10:36.856665 742 |2 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
2096 13:10:36.859824 Byte0, DQ PI dly=728, DQM PI dly= 728
2097 13:10:36.863407 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2098 13:10:36.863493
2099 13:10:36.870024 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2100 13:10:36.870120
2101 13:10:36.873052 Byte1, DQ PI dly=723, DQM PI dly= 723
2102 13:10:36.876824 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2103 13:10:36.876912
2104 13:10:36.879966 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2105 13:10:36.880084
2106 13:10:36.886471 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2107 13:10:36.893316 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2108 13:10:36.899910 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2109 13:10:36.903570 Write Rank1 MR3 =0x30
2110 13:10:36.906350 DramC Write-DBI off
2111 13:10:36.906438
2112 13:10:36.906506 [DATLAT]
2113 13:10:36.910080 Freq=1600, CH0 RK1, use_rxtx_scan=0
2114 13:10:36.910188
2115 13:10:36.910266 DATLAT Default: 0x10
2116 13:10:36.913577 7, 0xFFFF, sum=0
2117 13:10:36.913658 8, 0xFFFF, sum=0
2118 13:10:36.916970 9, 0xFFFF, sum=0
2119 13:10:36.917058 10, 0xFFFF, sum=0
2120 13:10:36.920002 11, 0xFFFF, sum=0
2121 13:10:36.920089 12, 0xFFFF, sum=0
2122 13:10:36.923332 13, 0xFFFF, sum=0
2123 13:10:36.923420 14, 0x0, sum=1
2124 13:10:36.926874 15, 0x0, sum=2
2125 13:10:36.926959 16, 0x0, sum=3
2126 13:10:36.927026 17, 0x0, sum=4
2127 13:10:36.933908 pattern=2 first_step=14 total pass=5 best_step=16
2128 13:10:36.933995 ==
2129 13:10:36.936770 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2130 13:10:36.940479 fsp= 1, odt_onoff= 1, Byte mode= 0
2131 13:10:36.940566 ==
2132 13:10:36.946914 Start DQ dly to find pass range UseTestEngine =1
2133 13:10:36.950303 x-axis: bit #, y-axis: DQ dly (-127~63)
2134 13:10:36.950389 RX Vref Scan = 0
2135 13:10:36.953821 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2136 13:10:36.956996 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2137 13:10:36.960418 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2138 13:10:36.963863 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2139 13:10:36.963950 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2140 13:10:36.967788 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2141 13:10:36.970530 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2142 13:10:36.974003 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2143 13:10:36.977346 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2144 13:10:36.980892 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2145 13:10:36.983974 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2146 13:10:36.987764 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2147 13:10:36.987852 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2148 13:10:36.990833 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2149 13:10:36.994115 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2150 13:10:36.997565 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2151 13:10:37.000929 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2152 13:10:37.004195 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2153 13:10:37.007521 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2154 13:10:37.007607 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2155 13:10:37.010711 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2156 13:10:37.013999 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2157 13:10:37.017664 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2158 13:10:37.020965 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2159 13:10:37.023884 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2160 13:10:37.027344 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2161 13:10:37.027429 0, [0] xxxoxxxx oxxoxxxx [MSB]
2162 13:10:37.031061 1, [0] xxxoxoxx ooxoooxx [MSB]
2163 13:10:37.034235 2, [0] xxxoxoxx ooxoooox [MSB]
2164 13:10:37.037728 3, [0] xxxoxooo ooxoooox [MSB]
2165 13:10:37.040905 4, [0] xxxoxooo ooxoooox [MSB]
2166 13:10:37.040990 5, [0] xoxooooo ooxoooox [MSB]
2167 13:10:37.044160 6, [0] oooooooo ooxooooo [MSB]
2168 13:10:37.049310 33, [0] oooooooo xooooooo [MSB]
2169 13:10:37.052200 34, [0] oooxoooo xooooooo [MSB]
2170 13:10:37.055590 35, [0] oooxoxoo xooxoooo [MSB]
2171 13:10:37.058816 36, [0] oooxoxoo xooxoxoo [MSB]
2172 13:10:37.062358 37, [0] oooxoxoo xxoxoxoo [MSB]
2173 13:10:37.065592 38, [0] oooxoxxo xxoxxxoo [MSB]
2174 13:10:37.065679 39, [0] oxxxoxxx xxoxxxxo [MSB]
2175 13:10:37.068991 40, [0] oxxxxxxx xxoxxxxx [MSB]
2176 13:10:37.072606 41, [0] xxxxxxxx xxoxxxxx [MSB]
2177 13:10:37.075806 42, [0] xxxxxxxx xxoxxxxx [MSB]
2178 13:10:37.078882 43, [0] xxxxxxxx xxoxxxxx [MSB]
2179 13:10:37.082557 44, [0] xxxxxxxx xxxxxxxx [MSB]
2180 13:10:37.085787 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
2181 13:10:37.089052 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2182 13:10:37.092234 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2183 13:10:37.095689 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2184 13:10:37.098962 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
2185 13:10:37.102723 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2186 13:10:37.105700 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2187 13:10:37.109426 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2188 13:10:37.112644 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
2189 13:10:37.115938 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2190 13:10:37.119183 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2191 13:10:37.126023 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2192 13:10:37.129377 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2193 13:10:37.132467 iDelay=44, Bit 13, Center 18 (1 ~ 35) 35
2194 13:10:37.135960 iDelay=44, Bit 14, Center 20 (2 ~ 38) 37
2195 13:10:37.139142 iDelay=44, Bit 15, Center 22 (6 ~ 39) 34
2196 13:10:37.139227 ==
2197 13:10:37.142474 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2198 13:10:37.146042 fsp= 1, odt_onoff= 1, Byte mode= 0
2199 13:10:37.146128 ==
2200 13:10:37.149141 DQS Delay:
2201 13:10:37.149225 DQS0 = 0, DQS1 = 0
2202 13:10:37.152705 DQM Delay:
2203 13:10:37.152788 DQM0 = 20, DQM1 = 19
2204 13:10:37.152854 DQ Delay:
2205 13:10:37.155908 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15
2206 13:10:37.159112 DQ4 =22, DQ5 =17, DQ6 =20, DQ7 =20
2207 13:10:37.162796 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
2208 13:10:37.166034 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
2209 13:10:37.166119
2210 13:10:37.166183
2211 13:10:37.166243
2212 13:10:37.169173 [DramC_TX_OE_Calibration] TA2
2213 13:10:37.172561 Original DQ_B0 (3 6) =30, OEN = 27
2214 13:10:37.176000 Original DQ_B1 (3 6) =30, OEN = 27
2215 13:10:37.179053 23, 0x0, End_B0=23 End_B1=23
2216 13:10:37.182502 24, 0x0, End_B0=24 End_B1=24
2217 13:10:37.182589 25, 0x0, End_B0=25 End_B1=25
2218 13:10:37.185792 26, 0x0, End_B0=26 End_B1=26
2219 13:10:37.189395 27, 0x0, End_B0=27 End_B1=27
2220 13:10:37.192425 28, 0x0, End_B0=28 End_B1=28
2221 13:10:37.196025 29, 0x0, End_B0=29 End_B1=29
2222 13:10:37.196112 30, 0x0, End_B0=30 End_B1=30
2223 13:10:37.199640 31, 0xFFFF, End_B0=30 End_B1=30
2224 13:10:37.206072 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2225 13:10:37.209378 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2226 13:10:37.212765
2227 13:10:37.212848
2228 13:10:37.212912 Write Rank1 MR23 =0x3f
2229 13:10:37.212974 [DQSOSC]
2230 13:10:37.222954 [DQSOSCAuto] RK1, (LSB)MR18= 0xd9d9, (MSB)MR19= 0x202, tDQSOscB0 = 432 ps tDQSOscB1 = 432 ps
2231 13:10:37.229943 CH0_RK1: MR19=0x202, MR18=0xD9D9, DQSOSC=432, MR23=63, INC=13, DEC=19
2232 13:10:37.230028 Write Rank1 MR23 =0x3f
2233 13:10:37.233151 [DQSOSC]
2234 13:10:37.240175 [DQSOSCAuto] RK1, (LSB)MR18= 0xdcdc, (MSB)MR19= 0x202, tDQSOscB0 = 430 ps tDQSOscB1 = 430 ps
2235 13:10:37.242905 CH0 RK1: MR19=202, MR18=DCDC
2236 13:10:37.246110 [RxdqsGatingPostProcess] freq 1600
2237 13:10:37.249733 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2238 13:10:37.252735 Rank: 0
2239 13:10:37.252819 best DQS0 dly(2T, 0.5T) = (2, 5)
2240 13:10:37.256029 best DQS1 dly(2T, 0.5T) = (2, 5)
2241 13:10:37.259632 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2242 13:10:37.262705 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2243 13:10:37.262789 Rank: 1
2244 13:10:37.266078 best DQS0 dly(2T, 0.5T) = (2, 6)
2245 13:10:37.270072 best DQS1 dly(2T, 0.5T) = (2, 6)
2246 13:10:37.273191 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2247 13:10:37.276357 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2248 13:10:37.282964 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2249 13:10:37.286763 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2250 13:10:37.290017 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2251 13:10:37.292959 Write Rank0 MR13 =0x59
2252 13:10:37.293043 ==
2253 13:10:37.296617 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2254 13:10:37.300208 fsp= 1, odt_onoff= 1, Byte mode= 0
2255 13:10:37.300293 ==
2256 13:10:37.303263 === u2Vref_new: 0x56 --> 0x3a
2257 13:10:37.306737 === u2Vref_new: 0x58 --> 0x58
2258 13:10:37.310444 === u2Vref_new: 0x5a --> 0x5a
2259 13:10:37.313467 === u2Vref_new: 0x5c --> 0x78
2260 13:10:37.316487 === u2Vref_new: 0x5e --> 0x7a
2261 13:10:37.320009 === u2Vref_new: 0x60 --> 0x90
2262 13:10:37.323324 [CA 0] Center 38 (13~63) winsize 51
2263 13:10:37.326722 [CA 1] Center 37 (12~63) winsize 52
2264 13:10:37.329845 [CA 2] Center 34 (6~63) winsize 58
2265 13:10:37.329957 [CA 3] Center 35 (7~63) winsize 57
2266 13:10:37.333743 [CA 4] Center 34 (6~63) winsize 58
2267 13:10:37.336636 [CA 5] Center 28 (-1~58) winsize 60
2268 13:10:37.336719
2269 13:10:37.339658 [CATrainingPosCal] consider 1 rank data
2270 13:10:37.343216 u2DelayCellTimex100 = 735/100 ps
2271 13:10:37.350173 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2272 13:10:37.353467 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2273 13:10:37.356629 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2274 13:10:37.359810 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2275 13:10:37.363751 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2276 13:10:37.366552 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2277 13:10:37.366636
2278 13:10:37.370014 CA PerBit enable=1, Macro0, CA PI delay=28
2279 13:10:37.372933 === u2Vref_new: 0x5e --> 0x7a
2280 13:10:37.373018
2281 13:10:37.376562 Vref(ca) range 1: 30
2282 13:10:37.376646
2283 13:10:37.376710 CS Dly= 12 (43-0-32)
2284 13:10:37.383838 Write Rank0 MR13 =0xd8
2285 13:10:37.383940 Write Rank0 MR13 =0xd8
2286 13:10:37.384006 Write Rank0 MR12 =0x5e
2287 13:10:37.386386 Write Rank1 MR13 =0x59
2288 13:10:37.386469 ==
2289 13:10:37.389939 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2290 13:10:37.393541 fsp= 1, odt_onoff= 1, Byte mode= 0
2291 13:10:37.393625 ==
2292 13:10:37.396647 === u2Vref_new: 0x56 --> 0x3a
2293 13:10:37.399675 === u2Vref_new: 0x58 --> 0x58
2294 13:10:37.402927 === u2Vref_new: 0x5a --> 0x5a
2295 13:10:37.406654 === u2Vref_new: 0x5c --> 0x78
2296 13:10:37.409952 === u2Vref_new: 0x5e --> 0x7a
2297 13:10:37.413410 === u2Vref_new: 0x60 --> 0x90
2298 13:10:37.416824 [CA 0] Center 38 (13~63) winsize 51
2299 13:10:37.419994 [CA 1] Center 38 (13~63) winsize 51
2300 13:10:37.423099 [CA 2] Center 35 (7~63) winsize 57
2301 13:10:37.426440 [CA 3] Center 35 (7~63) winsize 57
2302 13:10:37.429758 [CA 4] Center 34 (6~63) winsize 58
2303 13:10:37.433133 [CA 5] Center 27 (-2~57) winsize 60
2304 13:10:37.433217
2305 13:10:37.436394 [CATrainingPosCal] consider 2 rank data
2306 13:10:37.439997 u2DelayCellTimex100 = 735/100 ps
2307 13:10:37.443196 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2308 13:10:37.446450 CA1 delay=38 (13~63),Diff = 10 PI (13 cell)
2309 13:10:37.449838 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2310 13:10:37.453421 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2311 13:10:37.456512 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2312 13:10:37.459861 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2313 13:10:37.459945
2314 13:10:37.463588 CA PerBit enable=1, Macro0, CA PI delay=28
2315 13:10:37.466771 === u2Vref_new: 0x5e --> 0x7a
2316 13:10:37.466855
2317 13:10:37.469853 Vref(ca) range 1: 30
2318 13:10:37.469938
2319 13:10:37.470004 CS Dly= 12 (43-0-32)
2320 13:10:37.473489 Write Rank1 MR13 =0xd8
2321 13:10:37.476603 Write Rank1 MR13 =0xd8
2322 13:10:37.476688 Write Rank1 MR12 =0x5e
2323 13:10:37.480322 [RankSwap] Rank num 2, (Multi 1), Rank 0
2324 13:10:37.483628 Write Rank0 MR2 =0xad
2325 13:10:37.486649 [Write Leveling]
2326 13:10:37.486734 delay byte0 byte1 byte2 byte3
2327 13:10:37.486800
2328 13:10:37.489863 10 0 0
2329 13:10:37.489949 11 0 0
2330 13:10:37.493240 12 0 0
2331 13:10:37.493326 13 0 0
2332 13:10:37.496917 14 0 0
2333 13:10:37.497003 15 0 0
2334 13:10:37.497071 16 0 0
2335 13:10:37.500270 17 0 0
2336 13:10:37.500355 18 0 0
2337 13:10:37.503409 19 0 0
2338 13:10:37.503495 20 0 0
2339 13:10:37.503563 21 0 0
2340 13:10:37.506650 22 0 0
2341 13:10:37.506736 23 0 0
2342 13:10:37.510308 24 0 0
2343 13:10:37.510394 25 0 ff
2344 13:10:37.513514 26 0 ff
2345 13:10:37.513601 27 0 ff
2346 13:10:37.513669 28 0 ff
2347 13:10:37.517101 29 0 ff
2348 13:10:37.517186 30 0 ff
2349 13:10:37.520296 31 0 ff
2350 13:10:37.520383 32 0 ff
2351 13:10:37.523321 33 ff ff
2352 13:10:37.523408 34 ff ff
2353 13:10:37.526954 35 ff ff
2354 13:10:37.527055 36 ff ff
2355 13:10:37.527124 37 ff ff
2356 13:10:37.530112 38 ff ff
2357 13:10:37.530202 39 ff ff
2358 13:10:37.536763 pass bytecount = 0xff (0xff: all bytes pass)
2359 13:10:37.536848
2360 13:10:37.536915 DQS0 dly: 33
2361 13:10:37.536977 DQS1 dly: 25
2362 13:10:37.540608 Write Rank0 MR2 =0x2d
2363 13:10:37.543854 [RankSwap] Rank num 2, (Multi 1), Rank 0
2364 13:10:37.546736 Write Rank0 MR1 =0xd6
2365 13:10:37.546820 [Gating]
2366 13:10:37.546886 ==
2367 13:10:37.550288 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2368 13:10:37.554023 fsp= 1, odt_onoff= 1, Byte mode= 0
2369 13:10:37.554110 ==
2370 13:10:37.560796 3 1 0 |3635 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2371 13:10:37.563617 3 1 4 |3535 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2372 13:10:37.567023 3 1 8 |3535 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2373 13:10:37.573782 3 1 12 |3635 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2374 13:10:37.577294 3 1 16 |3535 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2375 13:10:37.580442 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2376 13:10:37.587036 [Byte 1] Lead/lag falling Transition (3, 1, 20)
2377 13:10:37.590259 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2378 13:10:37.593915 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2379 13:10:37.597191 3 2 0 |1d1c 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2380 13:10:37.603823 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2381 13:10:37.607045 3 2 8 |3535 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2382 13:10:37.610393 3 2 12 |3434 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2383 13:10:37.617199 3 2 16 |201 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2384 13:10:37.620398 3 2 20 |3d3d 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2385 13:10:37.623737 [Byte 1] Lead/lag Transition tap number (9)
2386 13:10:37.627430 3 2 24 |3c3c 201 |(0 0)(11 11) |(1 1)(0 0)| 0
2387 13:10:37.633868 3 2 28 |d0c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2388 13:10:37.636993 3 3 0 |3636 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2389 13:10:37.640326 3 3 4 |3b3a 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2390 13:10:37.647238 3 3 8 |3c3c 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
2391 13:10:37.650788 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2392 13:10:37.653683 3 3 16 |b0a 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2393 13:10:37.656968 3 3 20 |e0e 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2394 13:10:37.663800 [Byte 0] Lead/lag falling Transition (3, 3, 20)
2395 13:10:37.667063 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2396 13:10:37.670719 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2397 13:10:37.677537 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2398 13:10:37.680581 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2399 13:10:37.683896 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2400 13:10:37.690453 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2401 13:10:37.693888 3 4 16 |201 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2402 13:10:37.697149 3 4 20 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2403 13:10:37.700370 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2404 13:10:37.707102 3 4 28 |3d3d e0e |(11 11)(11 11) |(1 1)(1 1)| 0
2405 13:10:37.710670 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2406 13:10:37.714086 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2407 13:10:37.720636 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2408 13:10:37.723730 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2409 13:10:37.727377 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2410 13:10:37.733792 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2411 13:10:37.737418 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2412 13:10:37.740406 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2413 13:10:37.744301 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2414 13:10:37.750457 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2415 13:10:37.753691 [Byte 0] Lead/lag falling Transition (3, 6, 4)
2416 13:10:37.756919 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2417 13:10:37.763836 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2418 13:10:37.767030 [Byte 0] Lead/lag Transition tap number (3)
2419 13:10:37.770197 [Byte 1] Lead/lag falling Transition (3, 6, 12)
2420 13:10:37.773780 3 6 16 |605 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2421 13:10:37.780305 3 6 20 |404 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2422 13:10:37.783407 [Byte 1] Lead/lag Transition tap number (3)
2423 13:10:37.786968 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2424 13:10:37.790199 [Byte 0]First pass (3, 6, 24)
2425 13:10:37.793712 3 6 28 |4646 3a3a |(0 0)(1 1) |(0 0)(0 0)| 0
2426 13:10:37.796683 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2427 13:10:37.799950 [Byte 1]First pass (3, 7, 0)
2428 13:10:37.803785 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2429 13:10:37.806934 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2430 13:10:37.813265 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2431 13:10:37.816948 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2432 13:10:37.820114 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2433 13:10:37.823614 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2434 13:10:37.830213 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2435 13:10:37.833431 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2436 13:10:37.836737 All bytes gating window > 1UI, Early break!
2437 13:10:37.836824
2438 13:10:37.840032 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
2439 13:10:37.840118
2440 13:10:37.843461 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
2441 13:10:37.843547
2442 13:10:37.843613
2443 13:10:37.843677
2444 13:10:37.850011 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
2445 13:10:37.850097
2446 13:10:37.853503 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
2447 13:10:37.853589
2448 13:10:37.853655
2449 13:10:37.853715 Write Rank0 MR1 =0x56
2450 13:10:37.853776
2451 13:10:37.856863 best RODT dly(2T, 0.5T) = (2, 3)
2452 13:10:37.856948
2453 13:10:37.860349 best RODT dly(2T, 0.5T) = (2, 3)
2454 13:10:37.860435 ==
2455 13:10:37.866748 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2456 13:10:37.869993 fsp= 1, odt_onoff= 1, Byte mode= 0
2457 13:10:37.870079 ==
2458 13:10:37.873330 Start DQ dly to find pass range UseTestEngine =0
2459 13:10:37.876360 x-axis: bit #, y-axis: DQ dly (-127~63)
2460 13:10:37.879825 RX Vref Scan = 0
2461 13:10:37.883152 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2462 13:10:37.886923 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2463 13:10:37.887011 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2464 13:10:37.890185 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2465 13:10:37.893379 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2466 13:10:37.896323 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2467 13:10:37.899920 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2468 13:10:37.903656 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2469 13:10:37.907169 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2470 13:10:37.910139 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2471 13:10:37.910226 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2472 13:10:37.913180 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2473 13:10:37.916727 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2474 13:10:37.920080 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2475 13:10:37.923108 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2476 13:10:37.926415 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2477 13:10:37.930094 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2478 13:10:37.933439 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2479 13:10:37.933532 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2480 13:10:37.936530 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2481 13:10:37.939929 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2482 13:10:37.943465 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2483 13:10:37.946624 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2484 13:10:37.949809 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2485 13:10:37.953101 -2, [0] xxxoxxxx ooxxxxxo [MSB]
2486 13:10:37.953203 -1, [0] xxxoxxxx xoxxxxxo [MSB]
2487 13:10:37.956956 0, [0] xxxoxxxx ooxxxxxo [MSB]
2488 13:10:37.959996 1, [0] xxooxxxx ooxxxxxo [MSB]
2489 13:10:37.963020 2, [0] xxooxxxx ooxxxxxo [MSB]
2490 13:10:37.966443 3, [0] xxooxxxo oooxxxxo [MSB]
2491 13:10:37.969815 4, [0] oxooxxxo oooxoxxo [MSB]
2492 13:10:37.969903 6, [0] oooooooo ooooooxo [MSB]
2493 13:10:37.973179 31, [0] oooooooo ooooooox [MSB]
2494 13:10:37.976713 32, [0] oooooooo ooooooox [MSB]
2495 13:10:37.980078 33, [0] oooooooo ooooooox [MSB]
2496 13:10:37.983265 34, [0] oooooooo ooooooox [MSB]
2497 13:10:37.986699 35, [0] oooxoooo xxooooox [MSB]
2498 13:10:37.990176 36, [0] oooxoooo xxooooox [MSB]
2499 13:10:37.990264 37, [0] ooxxoooo xxooooox [MSB]
2500 13:10:37.993377 38, [0] ooxxoooo xxooooox [MSB]
2501 13:10:37.996510 39, [0] ooxxooox xxxoooox [MSB]
2502 13:10:37.999956 40, [0] oxxxxoox xxxoooox [MSB]
2503 13:10:38.002980 41, [0] xxxxxoox xxxxxxox [MSB]
2504 13:10:38.006367 42, [0] xxxxxoxx xxxxxxxx [MSB]
2505 13:10:38.006455 43, [0] xxxxxxxx xxxxxxxx [MSB]
2506 13:10:38.013344 iDelay=43, Bit 0, Center 22 (4 ~ 40) 37
2507 13:10:38.016620 iDelay=43, Bit 1, Center 22 (5 ~ 39) 35
2508 13:10:38.020148 iDelay=43, Bit 2, Center 18 (1 ~ 36) 36
2509 13:10:38.023385 iDelay=43, Bit 3, Center 16 (-2 ~ 34) 37
2510 13:10:38.026552 iDelay=43, Bit 4, Center 22 (5 ~ 39) 35
2511 13:10:38.029990 iDelay=43, Bit 5, Center 23 (5 ~ 42) 38
2512 13:10:38.033323 iDelay=43, Bit 6, Center 23 (5 ~ 41) 37
2513 13:10:38.036718 iDelay=43, Bit 7, Center 20 (3 ~ 38) 36
2514 13:10:38.040231 iDelay=43, Bit 8, Center 17 (0 ~ 34) 35
2515 13:10:38.043558 iDelay=43, Bit 9, Center 16 (-2 ~ 34) 37
2516 13:10:38.046623 iDelay=43, Bit 10, Center 20 (3 ~ 38) 36
2517 13:10:38.049804 iDelay=43, Bit 11, Center 22 (5 ~ 40) 36
2518 13:10:38.053178 iDelay=43, Bit 12, Center 22 (4 ~ 40) 37
2519 13:10:38.056703 iDelay=43, Bit 13, Center 22 (5 ~ 40) 36
2520 13:10:38.063462 iDelay=43, Bit 14, Center 24 (7 ~ 41) 35
2521 13:10:38.066539 iDelay=43, Bit 15, Center 13 (-3 ~ 30) 34
2522 13:10:38.066623 ==
2523 13:10:38.069920 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2524 13:10:38.073245 fsp= 1, odt_onoff= 1, Byte mode= 0
2525 13:10:38.073329 ==
2526 13:10:38.076661 DQS Delay:
2527 13:10:38.076743 DQS0 = 0, DQS1 = 0
2528 13:10:38.076808 DQM Delay:
2529 13:10:38.079671 DQM0 = 20, DQM1 = 19
2530 13:10:38.079752 DQ Delay:
2531 13:10:38.083472 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16
2532 13:10:38.086647 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =20
2533 13:10:38.089573 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
2534 13:10:38.093408 DQ12 =22, DQ13 =22, DQ14 =24, DQ15 =13
2535 13:10:38.093491
2536 13:10:38.093556
2537 13:10:38.096577 DramC Write-DBI off
2538 13:10:38.096659 ==
2539 13:10:38.099914 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2540 13:10:38.103016 fsp= 1, odt_onoff= 1, Byte mode= 0
2541 13:10:38.103100 ==
2542 13:10:38.109615 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2543 13:10:38.109700
2544 13:10:38.113036 Begin, DQ Scan Range 921~1177
2545 13:10:38.113119
2546 13:10:38.113183
2547 13:10:38.113243 TX Vref Scan disable
2548 13:10:38.116136 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2549 13:10:38.119467 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2550 13:10:38.126226 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2551 13:10:38.129316 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2552 13:10:38.132834 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2553 13:10:38.135980 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2554 13:10:38.139903 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2555 13:10:38.142734 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2556 13:10:38.146488 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2557 13:10:38.149847 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2558 13:10:38.153211 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2559 13:10:38.156208 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2560 13:10:38.159446 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2561 13:10:38.162759 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2562 13:10:38.166062 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2563 13:10:38.169229 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2564 13:10:38.172608 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2565 13:10:38.175728 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2566 13:10:38.182395 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2567 13:10:38.185761 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2568 13:10:38.189723 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2569 13:10:38.192855 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2570 13:10:38.195835 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2571 13:10:38.199226 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2572 13:10:38.202614 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2573 13:10:38.205854 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2574 13:10:38.209023 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2575 13:10:38.212565 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2576 13:10:38.216034 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2577 13:10:38.219091 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2578 13:10:38.222500 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2579 13:10:38.225578 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2580 13:10:38.229083 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2581 13:10:38.232478 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2582 13:10:38.239274 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2583 13:10:38.242410 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2584 13:10:38.245669 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2585 13:10:38.249341 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2586 13:10:38.252564 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2587 13:10:38.256195 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2588 13:10:38.259000 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2589 13:10:38.262500 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2590 13:10:38.265589 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2591 13:10:38.269204 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2592 13:10:38.272391 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2593 13:10:38.275626 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2594 13:10:38.278712 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2595 13:10:38.282438 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2596 13:10:38.285566 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2597 13:10:38.289095 970 |3 6 10|[0] xxxxxxxx xxxxxxxo [MSB]
2598 13:10:38.292263 971 |3 6 11|[0] xxxxxxxx xxxxxxxo [MSB]
2599 13:10:38.295477 972 |3 6 12|[0] xxxxxxxx ooxxxxxo [MSB]
2600 13:10:38.299229 973 |3 6 13|[0] xxxxxxxx ooxxxxxo [MSB]
2601 13:10:38.302328 974 |3 6 14|[0] xxxxxxxx oooxoxoo [MSB]
2602 13:10:38.309153 975 |3 6 15|[0] xxxxxxxx oooooxoo [MSB]
2603 13:10:38.312103 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2604 13:10:38.315420 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2605 13:10:38.319022 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2606 13:10:38.322163 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2607 13:10:38.325559 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2608 13:10:38.329196 981 |3 6 21|[0] xooooxoo oooooooo [MSB]
2609 13:10:38.331962 982 |3 6 22|[0] oooooxoo oooooooo [MSB]
2610 13:10:38.335454 987 |3 6 27|[0] oooooooo ooooooox [MSB]
2611 13:10:38.338515 988 |3 6 28|[0] oooooooo ooooooox [MSB]
2612 13:10:38.342112 989 |3 6 29|[0] oooooooo ooooooox [MSB]
2613 13:10:38.345137 990 |3 6 30|[0] oooooooo oxooooox [MSB]
2614 13:10:38.351832 991 |3 6 31|[0] oooooooo xxooooox [MSB]
2615 13:10:38.355236 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2616 13:10:38.358895 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2617 13:10:38.361733 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2618 13:10:38.365555 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2619 13:10:38.368623 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2620 13:10:38.371890 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2621 13:10:38.375114 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
2622 13:10:38.378329 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2623 13:10:38.381954 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2624 13:10:38.385097 1001 |3 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
2625 13:10:38.388320 Byte0, DQ PI dly=990, DQM PI dly= 990
2626 13:10:38.394983 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2627 13:10:38.395077
2628 13:10:38.398864 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2629 13:10:38.398952
2630 13:10:38.401946 Byte1, DQ PI dly=980, DQM PI dly= 980
2631 13:10:38.405003 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2632 13:10:38.405115
2633 13:10:38.411874 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2634 13:10:38.411962
2635 13:10:38.412046 ==
2636 13:10:38.415000 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2637 13:10:38.418649 fsp= 1, odt_onoff= 1, Byte mode= 0
2638 13:10:38.418735 ==
2639 13:10:38.425303 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2640 13:10:38.425390
2641 13:10:38.425475 Begin, DQ Scan Range 956~1020
2642 13:10:38.428376 Write Rank0 MR14 =0x0
2643 13:10:38.437337
2644 13:10:38.437424 CH=1, VrefRange= 0, VrefLevel = 0
2645 13:10:38.443321 TX Bit0 (984~999) 16 991, Bit8 (975~985) 11 980,
2646 13:10:38.447081 TX Bit1 (983~996) 14 989, Bit9 (975~984) 10 979,
2647 13:10:38.453246 TX Bit2 (982~996) 15 989, Bit10 (976~988) 13 982,
2648 13:10:38.456698 TX Bit3 (979~992) 14 985, Bit11 (978~989) 12 983,
2649 13:10:38.460342 TX Bit4 (983~998) 16 990, Bit12 (976~989) 14 982,
2650 13:10:38.467073 TX Bit5 (985~998) 14 991, Bit13 (978~989) 12 983,
2651 13:10:38.470307 TX Bit6 (984~996) 13 990, Bit14 (976~987) 12 981,
2652 13:10:38.473477 TX Bit7 (983~996) 14 989, Bit15 (970~982) 13 976,
2653 13:10:38.476698
2654 13:10:38.476811 Write Rank0 MR14 =0x2
2655 13:10:38.485981
2656 13:10:38.486070 CH=1, VrefRange= 0, VrefLevel = 2
2657 13:10:38.492769 TX Bit0 (984~999) 16 991, Bit8 (975~985) 11 980,
2658 13:10:38.496060 TX Bit1 (983~996) 14 989, Bit9 (975~984) 10 979,
2659 13:10:38.502701 TX Bit2 (982~996) 15 989, Bit10 (976~988) 13 982,
2660 13:10:38.505879 TX Bit3 (979~992) 14 985, Bit11 (978~989) 12 983,
2661 13:10:38.509047 TX Bit4 (983~998) 16 990, Bit12 (976~989) 14 982,
2662 13:10:38.515907 TX Bit5 (985~998) 14 991, Bit13 (978~989) 12 983,
2663 13:10:38.519068 TX Bit6 (984~996) 13 990, Bit14 (976~987) 12 981,
2664 13:10:38.522175 TX Bit7 (983~996) 14 989, Bit15 (970~982) 13 976,
2665 13:10:38.522278
2666 13:10:38.525338 Write Rank0 MR14 =0x4
2667 13:10:38.534570
2668 13:10:38.534647 CH=1, VrefRange= 0, VrefLevel = 4
2669 13:10:38.541205 TX Bit0 (984~1000) 17 992, Bit8 (974~985) 12 979,
2670 13:10:38.544670 TX Bit1 (982~998) 17 990, Bit9 (975~985) 11 980,
2671 13:10:38.551390 TX Bit2 (980~997) 18 988, Bit10 (976~989) 14 982,
2672 13:10:38.554649 TX Bit3 (978~993) 16 985, Bit11 (977~990) 14 983,
2673 13:10:38.557785 TX Bit4 (982~999) 18 990, Bit12 (976~991) 16 983,
2674 13:10:38.564407 TX Bit5 (984~999) 16 991, Bit13 (977~991) 15 984,
2675 13:10:38.568119 TX Bit6 (983~998) 16 990, Bit14 (976~989) 14 982,
2676 13:10:38.571372 TX Bit7 (983~998) 16 990, Bit15 (970~983) 14 976,
2677 13:10:38.574305
2678 13:10:38.574388 Write Rank0 MR14 =0x6
2679 13:10:38.583710
2680 13:10:38.583797 CH=1, VrefRange= 0, VrefLevel = 6
2681 13:10:38.590422 TX Bit0 (983~1001) 19 992, Bit8 (973~986) 14 979,
2682 13:10:38.593615 TX Bit1 (982~998) 17 990, Bit9 (974~985) 12 979,
2683 13:10:38.600329 TX Bit2 (980~998) 19 989, Bit10 (976~990) 15 983,
2684 13:10:38.604082 TX Bit3 (978~994) 17 986, Bit11 (977~991) 15 984,
2685 13:10:38.607033 TX Bit4 (982~999) 18 990, Bit12 (976~991) 16 983,
2686 13:10:38.613934 TX Bit5 (984~999) 16 991, Bit13 (977~991) 15 984,
2687 13:10:38.616995 TX Bit6 (983~999) 17 991, Bit14 (975~991) 17 983,
2688 13:10:38.620846 TX Bit7 (982~998) 17 990, Bit15 (969~984) 16 976,
2689 13:10:38.620931
2690 13:10:38.623457 Write Rank0 MR14 =0x8
2691 13:10:38.633007
2692 13:10:38.633093 CH=1, VrefRange= 0, VrefLevel = 8
2693 13:10:38.639561 TX Bit0 (983~1001) 19 992, Bit8 (973~987) 15 980,
2694 13:10:38.642611 TX Bit1 (981~999) 19 990, Bit9 (973~986) 14 979,
2695 13:10:38.649414 TX Bit2 (979~998) 20 988, Bit10 (975~991) 17 983,
2696 13:10:38.652598 TX Bit3 (978~994) 17 986, Bit11 (976~992) 17 984,
2697 13:10:38.656437 TX Bit4 (981~999) 19 990, Bit12 (976~992) 17 984,
2698 13:10:38.662684 TX Bit5 (984~1000) 17 992, Bit13 (977~992) 16 984,
2699 13:10:38.665903 TX Bit6 (982~999) 18 990, Bit14 (975~991) 17 983,
2700 13:10:38.669460 TX Bit7 (982~999) 18 990, Bit15 (969~984) 16 976,
2701 13:10:38.672628
2702 13:10:38.672712 Write Rank0 MR14 =0xa
2703 13:10:38.682222
2704 13:10:38.685359 CH=1, VrefRange= 0, VrefLevel = 10
2705 13:10:38.689171 TX Bit0 (983~1002) 20 992, Bit8 (973~988) 16 980,
2706 13:10:38.692529 TX Bit1 (981~999) 19 990, Bit9 (973~987) 15 980,
2707 13:10:38.698897 TX Bit2 (979~999) 21 989, Bit10 (975~991) 17 983,
2708 13:10:38.702440 TX Bit3 (978~996) 19 987, Bit11 (975~992) 18 983,
2709 13:10:38.705467 TX Bit4 (981~1000) 20 990, Bit12 (975~992) 18 983,
2710 13:10:38.712430 TX Bit5 (983~1000) 18 991, Bit13 (977~992) 16 984,
2711 13:10:38.715586 TX Bit6 (982~999) 18 990, Bit14 (975~992) 18 983,
2712 13:10:38.721909 TX Bit7 (982~999) 18 990, Bit15 (969~985) 17 977,
2713 13:10:38.722000
2714 13:10:38.722067 Write Rank0 MR14 =0xc
2715 13:10:38.731954
2716 13:10:38.735049 CH=1, VrefRange= 0, VrefLevel = 12
2717 13:10:38.738802 TX Bit0 (982~1002) 21 992, Bit8 (972~989) 18 980,
2718 13:10:38.741975 TX Bit1 (980~1000) 21 990, Bit9 (972~987) 16 979,
2719 13:10:38.748230 TX Bit2 (979~999) 21 989, Bit10 (976~992) 17 984,
2720 13:10:38.751650 TX Bit3 (977~996) 20 986, Bit11 (976~992) 17 984,
2721 13:10:38.754956 TX Bit4 (981~1001) 21 991, Bit12 (975~993) 19 984,
2722 13:10:38.761861 TX Bit5 (983~1001) 19 992, Bit13 (977~992) 16 984,
2723 13:10:38.765153 TX Bit6 (981~1000) 20 990, Bit14 (974~992) 19 983,
2724 13:10:38.771701 TX Bit7 (981~1000) 20 990, Bit15 (969~985) 17 977,
2725 13:10:38.771788
2726 13:10:38.771853 Write Rank0 MR14 =0xe
2727 13:10:38.781562
2728 13:10:38.784729 CH=1, VrefRange= 0, VrefLevel = 14
2729 13:10:38.788469 TX Bit0 (982~1002) 21 992, Bit8 (971~989) 19 980,
2730 13:10:38.791794 TX Bit1 (980~1000) 21 990, Bit9 (972~988) 17 980,
2731 13:10:38.798138 TX Bit2 (978~1000) 23 989, Bit10 (975~992) 18 983,
2732 13:10:38.801987 TX Bit3 (977~997) 21 987, Bit11 (975~992) 18 983,
2733 13:10:38.805136 TX Bit4 (980~1001) 22 990, Bit12 (975~993) 19 984,
2734 13:10:38.812012 TX Bit5 (983~1001) 19 992, Bit13 (976~993) 18 984,
2735 13:10:38.815432 TX Bit6 (981~1001) 21 991, Bit14 (974~992) 19 983,
2736 13:10:38.821392 TX Bit7 (981~1000) 20 990, Bit15 (969~986) 18 977,
2737 13:10:38.821478
2738 13:10:38.821544 Write Rank0 MR14 =0x10
2739 13:10:38.831684
2740 13:10:38.835010 CH=1, VrefRange= 0, VrefLevel = 16
2741 13:10:38.838706 TX Bit0 (981~1003) 23 992, Bit8 (971~991) 21 981,
2742 13:10:38.841589 TX Bit1 (980~1001) 22 990, Bit9 (972~989) 18 980,
2743 13:10:38.848623 TX Bit2 (978~1000) 23 989, Bit10 (974~992) 19 983,
2744 13:10:38.851610 TX Bit3 (977~998) 22 987, Bit11 (975~993) 19 984,
2745 13:10:38.854918 TX Bit4 (980~1002) 23 991, Bit12 (974~993) 20 983,
2746 13:10:38.861733 TX Bit5 (982~1002) 21 992, Bit13 (976~993) 18 984,
2747 13:10:38.864805 TX Bit6 (981~1001) 21 991, Bit14 (974~993) 20 983,
2748 13:10:38.871759 TX Bit7 (980~1000) 21 990, Bit15 (968~986) 19 977,
2749 13:10:38.871846
2750 13:10:38.871913 Write Rank0 MR14 =0x12
2751 13:10:38.881727
2752 13:10:38.885132 CH=1, VrefRange= 0, VrefLevel = 18
2753 13:10:38.888633 TX Bit0 (981~1003) 23 992, Bit8 (971~991) 21 981,
2754 13:10:38.891732 TX Bit1 (979~1001) 23 990, Bit9 (971~989) 19 980,
2755 13:10:38.898545 TX Bit2 (978~1000) 23 989, Bit10 (974~993) 20 983,
2756 13:10:38.901961 TX Bit3 (977~998) 22 987, Bit11 (975~993) 19 984,
2757 13:10:38.905231 TX Bit4 (979~1002) 24 990, Bit12 (974~994) 21 984,
2758 13:10:38.912007 TX Bit5 (982~1002) 21 992, Bit13 (976~994) 19 985,
2759 13:10:38.915443 TX Bit6 (980~1001) 22 990, Bit14 (974~993) 20 983,
2760 13:10:38.921798 TX Bit7 (980~1001) 22 990, Bit15 (968~987) 20 977,
2761 13:10:38.921883
2762 13:10:38.921948 Write Rank0 MR14 =0x14
2763 13:10:38.931919
2764 13:10:38.935170 CH=1, VrefRange= 0, VrefLevel = 20
2765 13:10:38.938845 TX Bit0 (981~1003) 23 992, Bit8 (970~991) 22 980,
2766 13:10:38.941944 TX Bit1 (979~1002) 24 990, Bit9 (970~990) 21 980,
2767 13:10:38.948560 TX Bit2 (977~1001) 25 989, Bit10 (974~993) 20 983,
2768 13:10:38.951764 TX Bit3 (977~998) 22 987, Bit11 (974~994) 21 984,
2769 13:10:38.955355 TX Bit4 (979~1002) 24 990, Bit12 (974~994) 21 984,
2770 13:10:38.961850 TX Bit5 (982~1003) 22 992, Bit13 (976~994) 19 985,
2771 13:10:38.965225 TX Bit6 (980~1002) 23 991, Bit14 (973~993) 21 983,
2772 13:10:38.971820 TX Bit7 (979~1001) 23 990, Bit15 (968~988) 21 978,
2773 13:10:38.971918
2774 13:10:38.971986 Write Rank0 MR14 =0x16
2775 13:10:38.982080
2776 13:10:38.985709 CH=1, VrefRange= 0, VrefLevel = 22
2777 13:10:38.989080 TX Bit0 (981~1005) 25 993, Bit8 (970~992) 23 981,
2778 13:10:38.992319 TX Bit1 (979~1002) 24 990, Bit9 (970~990) 21 980,
2779 13:10:38.999358 TX Bit2 (977~1001) 25 989, Bit10 (973~993) 21 983,
2780 13:10:39.002510 TX Bit3 (977~999) 23 988, Bit11 (974~994) 21 984,
2781 13:10:39.005715 TX Bit4 (979~1003) 25 991, Bit12 (973~995) 23 984,
2782 13:10:39.012116 TX Bit5 (981~1004) 24 992, Bit13 (975~995) 21 985,
2783 13:10:39.015318 TX Bit6 (979~1002) 24 990, Bit14 (973~994) 22 983,
2784 13:10:39.022410 TX Bit7 (979~1002) 24 990, Bit15 (968~988) 21 978,
2785 13:10:39.022496
2786 13:10:39.022563 Write Rank0 MR14 =0x18
2787 13:10:39.032969
2788 13:10:39.035993 CH=1, VrefRange= 0, VrefLevel = 24
2789 13:10:39.039781 TX Bit0 (980~1006) 27 993, Bit8 (970~992) 23 981,
2790 13:10:39.043140 TX Bit1 (978~1002) 25 990, Bit9 (970~991) 22 980,
2791 13:10:39.049798 TX Bit2 (977~1001) 25 989, Bit10 (972~994) 23 983,
2792 13:10:39.052803 TX Bit3 (977~999) 23 988, Bit11 (973~995) 23 984,
2793 13:10:39.056188 TX Bit4 (978~1003) 26 990, Bit12 (974~995) 22 984,
2794 13:10:39.062804 TX Bit5 (981~1004) 24 992, Bit13 (975~995) 21 985,
2795 13:10:39.065894 TX Bit6 (979~1003) 25 991, Bit14 (972~994) 23 983,
2796 13:10:39.072490 TX Bit7 (979~1002) 24 990, Bit15 (967~988) 22 977,
2797 13:10:39.072577
2798 13:10:39.072643 Write Rank0 MR14 =0x1a
2799 13:10:39.083578
2800 13:10:39.087095 CH=1, VrefRange= 0, VrefLevel = 26
2801 13:10:39.090491 TX Bit0 (980~1006) 27 993, Bit8 (970~992) 23 981,
2802 13:10:39.093987 TX Bit1 (978~1003) 26 990, Bit9 (970~991) 22 980,
2803 13:10:39.100094 TX Bit2 (977~1002) 26 989, Bit10 (972~994) 23 983,
2804 13:10:39.103414 TX Bit3 (976~1000) 25 988, Bit11 (973~995) 23 984,
2805 13:10:39.106564 TX Bit4 (978~1004) 27 991, Bit12 (973~996) 24 984,
2806 13:10:39.113831 TX Bit5 (980~1004) 25 992, Bit13 (975~995) 21 985,
2807 13:10:39.117018 TX Bit6 (978~1003) 26 990, Bit14 (972~995) 24 983,
2808 13:10:39.123369 TX Bit7 (979~1002) 24 990, Bit15 (967~990) 24 978,
2809 13:10:39.123455
2810 13:10:39.123521 Write Rank0 MR14 =0x1c
2811 13:10:39.134113
2812 13:10:39.134197 CH=1, VrefRange= 0, VrefLevel = 28
2813 13:10:39.141022 TX Bit0 (979~1006) 28 992, Bit8 (971~992) 22 981,
2814 13:10:39.144104 TX Bit1 (978~1003) 26 990, Bit9 (970~992) 23 981,
2815 13:10:39.151052 TX Bit2 (977~1002) 26 989, Bit10 (971~995) 25 983,
2816 13:10:39.154742 TX Bit3 (976~1000) 25 988, Bit11 (973~996) 24 984,
2817 13:10:39.157409 TX Bit4 (978~1004) 27 991, Bit12 (972~996) 25 984,
2818 13:10:39.164194 TX Bit5 (980~1005) 26 992, Bit13 (975~996) 22 985,
2819 13:10:39.167405 TX Bit6 (979~1003) 25 991, Bit14 (972~995) 24 983,
2820 13:10:39.174150 TX Bit7 (979~1003) 25 991, Bit15 (967~990) 24 978,
2821 13:10:39.174236
2822 13:10:39.174303 Write Rank0 MR14 =0x1e
2823 13:10:39.184751
2824 13:10:39.188335 CH=1, VrefRange= 0, VrefLevel = 30
2825 13:10:39.191476 TX Bit0 (979~1006) 28 992, Bit8 (969~993) 25 981,
2826 13:10:39.194567 TX Bit1 (978~1004) 27 991, Bit9 (970~992) 23 981,
2827 13:10:39.201622 TX Bit2 (977~1001) 25 989, Bit10 (971~995) 25 983,
2828 13:10:39.204965 TX Bit3 (976~1000) 25 988, Bit11 (972~996) 25 984,
2829 13:10:39.208333 TX Bit4 (978~1005) 28 991, Bit12 (972~996) 25 984,
2830 13:10:39.214534 TX Bit5 (980~1006) 27 993, Bit13 (974~996) 23 985,
2831 13:10:39.218086 TX Bit6 (978~1005) 28 991, Bit14 (972~995) 24 983,
2832 13:10:39.224844 TX Bit7 (978~1004) 27 991, Bit15 (967~990) 24 978,
2833 13:10:39.224932
2834 13:10:39.224998 Write Rank0 MR14 =0x20
2835 13:10:39.235431
2836 13:10:39.239055 CH=1, VrefRange= 0, VrefLevel = 32
2837 13:10:39.241984 TX Bit0 (979~1006) 28 992, Bit8 (969~993) 25 981,
2838 13:10:39.245374 TX Bit1 (978~1004) 27 991, Bit9 (970~992) 23 981,
2839 13:10:39.252080 TX Bit2 (977~1001) 25 989, Bit10 (971~995) 25 983,
2840 13:10:39.255300 TX Bit3 (976~1000) 25 988, Bit11 (972~996) 25 984,
2841 13:10:39.259089 TX Bit4 (978~1005) 28 991, Bit12 (972~996) 25 984,
2842 13:10:39.265431 TX Bit5 (980~1006) 27 993, Bit13 (974~996) 23 985,
2843 13:10:39.268811 TX Bit6 (978~1005) 28 991, Bit14 (972~995) 24 983,
2844 13:10:39.275734 TX Bit7 (978~1004) 27 991, Bit15 (967~990) 24 978,
2845 13:10:39.275821
2846 13:10:39.278783 wait MRW command Rank0 MR14 =0x22 fired (1)
2847 13:10:39.282060 Write Rank0 MR14 =0x22
2848 13:10:39.290032
2849 13:10:39.293548 CH=1, VrefRange= 0, VrefLevel = 34
2850 13:10:39.296987 TX Bit0 (979~1006) 28 992, Bit8 (969~993) 25 981,
2851 13:10:39.300184 TX Bit1 (978~1004) 27 991, Bit9 (970~992) 23 981,
2852 13:10:39.307009 TX Bit2 (977~1001) 25 989, Bit10 (971~995) 25 983,
2853 13:10:39.310218 TX Bit3 (976~1000) 25 988, Bit11 (972~996) 25 984,
2854 13:10:39.313066 TX Bit4 (978~1005) 28 991, Bit12 (972~996) 25 984,
2855 13:10:39.320052 TX Bit5 (980~1006) 27 993, Bit13 (974~996) 23 985,
2856 13:10:39.323442 TX Bit6 (978~1005) 28 991, Bit14 (972~995) 24 983,
2857 13:10:39.329712 TX Bit7 (978~1004) 27 991, Bit15 (967~990) 24 978,
2858 13:10:39.329798
2859 13:10:39.329865 Write Rank0 MR14 =0x24
2860 13:10:39.340877
2861 13:10:39.343972 CH=1, VrefRange= 0, VrefLevel = 36
2862 13:10:39.347668 TX Bit0 (979~1006) 28 992, Bit8 (969~993) 25 981,
2863 13:10:39.350817 TX Bit1 (978~1004) 27 991, Bit9 (970~992) 23 981,
2864 13:10:39.357533 TX Bit2 (977~1001) 25 989, Bit10 (971~995) 25 983,
2865 13:10:39.360729 TX Bit3 (976~1000) 25 988, Bit11 (972~996) 25 984,
2866 13:10:39.364524 TX Bit4 (978~1005) 28 991, Bit12 (972~996) 25 984,
2867 13:10:39.370672 TX Bit5 (980~1006) 27 993, Bit13 (974~996) 23 985,
2868 13:10:39.374160 TX Bit6 (978~1005) 28 991, Bit14 (972~995) 24 983,
2869 13:10:39.380614 TX Bit7 (978~1004) 27 991, Bit15 (967~990) 24 978,
2870 13:10:39.380743
2871 13:10:39.380849 Write Rank0 MR14 =0x26
2872 13:10:39.391204
2873 13:10:39.394518 CH=1, VrefRange= 0, VrefLevel = 38
2874 13:10:39.398104 TX Bit0 (979~1006) 28 992, Bit8 (969~993) 25 981,
2875 13:10:39.401486 TX Bit1 (978~1004) 27 991, Bit9 (970~992) 23 981,
2876 13:10:39.407839 TX Bit2 (977~1001) 25 989, Bit10 (971~995) 25 983,
2877 13:10:39.411091 TX Bit3 (976~1000) 25 988, Bit11 (972~996) 25 984,
2878 13:10:39.414663 TX Bit4 (978~1005) 28 991, Bit12 (972~996) 25 984,
2879 13:10:39.420977 TX Bit5 (980~1006) 27 993, Bit13 (974~996) 23 985,
2880 13:10:39.424652 TX Bit6 (978~1005) 28 991, Bit14 (972~995) 24 983,
2881 13:10:39.431031 TX Bit7 (978~1004) 27 991, Bit15 (967~990) 24 978,
2882 13:10:39.431139
2883 13:10:39.431232
2884 13:10:39.434379 TX Vref found, early break! 375< 388
2885 13:10:39.437937 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2886 13:10:39.440836 u1DelayCellOfst[0]=5 cells (4 PI)
2887 13:10:39.444654 u1DelayCellOfst[1]=3 cells (3 PI)
2888 13:10:39.447782 u1DelayCellOfst[2]=1 cells (1 PI)
2889 13:10:39.451124 u1DelayCellOfst[3]=0 cells (0 PI)
2890 13:10:39.454386 u1DelayCellOfst[4]=3 cells (3 PI)
2891 13:10:39.458088 u1DelayCellOfst[5]=6 cells (5 PI)
2892 13:10:39.461295 u1DelayCellOfst[6]=3 cells (3 PI)
2893 13:10:39.461396 u1DelayCellOfst[7]=3 cells (3 PI)
2894 13:10:39.464311 Byte0, DQ PI dly=988, DQM PI dly= 990
2895 13:10:39.471117 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2896 13:10:39.471220
2897 13:10:39.474239 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2898 13:10:39.474338
2899 13:10:39.477997 u1DelayCellOfst[8]=3 cells (3 PI)
2900 13:10:39.481080 u1DelayCellOfst[9]=3 cells (3 PI)
2901 13:10:39.484528 u1DelayCellOfst[10]=6 cells (5 PI)
2902 13:10:39.487950 u1DelayCellOfst[11]=7 cells (6 PI)
2903 13:10:39.490966 u1DelayCellOfst[12]=7 cells (6 PI)
2904 13:10:39.494438 u1DelayCellOfst[13]=9 cells (7 PI)
2905 13:10:39.497874 u1DelayCellOfst[14]=6 cells (5 PI)
2906 13:10:39.500909 u1DelayCellOfst[15]=0 cells (0 PI)
2907 13:10:39.504181 Byte1, DQ PI dly=978, DQM PI dly= 981
2908 13:10:39.507319 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2909 13:10:39.507441
2910 13:10:39.510885 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2911 13:10:39.511002
2912 13:10:39.514306 Write Rank0 MR14 =0x1e
2913 13:10:39.514424
2914 13:10:39.517405 Final TX Range 0 Vref 30
2915 13:10:39.517520
2916 13:10:39.524186 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2917 13:10:39.524348
2918 13:10:39.530916 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2919 13:10:39.537404 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2920 13:10:39.544189 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2921 13:10:39.544342 Write Rank0 MR3 =0xb0
2922 13:10:39.547615 DramC Write-DBI on
2923 13:10:39.547717 ==
2924 13:10:39.554732 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2925 13:10:39.554817 fsp= 1, odt_onoff= 1, Byte mode= 0
2926 13:10:39.557474 ==
2927 13:10:39.560971 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2928 13:10:39.561055
2929 13:10:39.563966 Begin, DQ Scan Range 701~765
2930 13:10:39.564050
2931 13:10:39.564115
2932 13:10:39.564175 TX Vref Scan disable
2933 13:10:39.567406 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2934 13:10:39.571016 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2935 13:10:39.577710 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2936 13:10:39.580354 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2937 13:10:39.584480 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2938 13:10:39.587545 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2939 13:10:39.590702 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2940 13:10:39.593875 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2941 13:10:39.597340 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2942 13:10:39.600726 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2943 13:10:39.603696 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2944 13:10:39.607516 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2945 13:10:39.610847 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2946 13:10:39.614092 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2947 13:10:39.617291 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2948 13:10:39.620221 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2949 13:10:39.624202 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2950 13:10:39.627306 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2951 13:10:39.630498 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2952 13:10:39.634153 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2953 13:10:39.637111 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2954 13:10:39.643868 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2955 13:10:39.647122 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2956 13:10:39.650418 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2957 13:10:39.653722 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2958 13:10:39.660106 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2959 13:10:39.663891 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2960 13:10:39.667016 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2961 13:10:39.670058 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2962 13:10:39.673456 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2963 13:10:39.676624 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2964 13:10:39.680002 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2965 13:10:39.683291 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2966 13:10:39.687011 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2967 13:10:39.690408 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2968 13:10:39.694154 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2969 13:10:39.696774 Byte0, DQ PI dly=736, DQM PI dly= 736
2970 13:10:39.700054 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
2971 13:10:39.703267
2972 13:10:39.707081 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
2973 13:10:39.707176
2974 13:10:39.709932 Byte1, DQ PI dly=725, DQM PI dly= 725
2975 13:10:39.713353 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
2976 13:10:39.713447
2977 13:10:39.720427 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
2978 13:10:39.720537
2979 13:10:39.723763 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2980 13:10:39.733429 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2981 13:10:39.740057 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2982 13:10:39.740142 Write Rank0 MR3 =0x30
2983 13:10:39.743272 DramC Write-DBI off
2984 13:10:39.743356
2985 13:10:39.743422 [DATLAT]
2986 13:10:39.746709 Freq=1600, CH1 RK0, use_rxtx_scan=0
2987 13:10:39.746794
2988 13:10:39.749981 DATLAT Default: 0xf
2989 13:10:39.750064 7, 0xFFFF, sum=0
2990 13:10:39.753334 8, 0xFFFF, sum=0
2991 13:10:39.753419 9, 0xFFFF, sum=0
2992 13:10:39.756675 10, 0xFFFF, sum=0
2993 13:10:39.756768 11, 0xFFFF, sum=0
2994 13:10:39.760069 12, 0xFFFF, sum=0
2995 13:10:39.760169 13, 0xFFFF, sum=0
2996 13:10:39.760248 14, 0x0, sum=1
2997 13:10:39.763522 15, 0x0, sum=2
2998 13:10:39.763621 16, 0x0, sum=3
2999 13:10:39.767080 17, 0x0, sum=4
3000 13:10:39.770114 pattern=2 first_step=14 total pass=5 best_step=16
3001 13:10:39.770233 ==
3002 13:10:39.776878 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3003 13:10:39.780096 fsp= 1, odt_onoff= 1, Byte mode= 0
3004 13:10:39.780299 ==
3005 13:10:39.783412 Start DQ dly to find pass range UseTestEngine =1
3006 13:10:39.787104 x-axis: bit #, y-axis: DQ dly (-127~63)
3007 13:10:39.787331 RX Vref Scan = 1
3008 13:10:39.895863
3009 13:10:39.896102 RX Vref found, early break!
3010 13:10:39.896241
3011 13:10:39.902478 Final RX Vref 11, apply to both rank0 and 1
3012 13:10:39.902715 ==
3013 13:10:39.905795 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3014 13:10:39.909293 fsp= 1, odt_onoff= 1, Byte mode= 0
3015 13:10:39.909477 ==
3016 13:10:39.909629 DQS Delay:
3017 13:10:39.912377 DQS0 = 0, DQS1 = 0
3018 13:10:39.912563 DQM Delay:
3019 13:10:39.915469 DQM0 = 20, DQM1 = 19
3020 13:10:39.915599 DQ Delay:
3021 13:10:39.918776 DQ0 =21, DQ1 =22, DQ2 =18, DQ3 =16
3022 13:10:39.922083 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =21
3023 13:10:39.925804 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3024 13:10:39.928772 DQ12 =22, DQ13 =21, DQ14 =22, DQ15 =13
3025 13:10:39.928858
3026 13:10:39.928925
3027 13:10:39.928986
3028 13:10:39.932393 [DramC_TX_OE_Calibration] TA2
3029 13:10:39.935740 Original DQ_B0 (3 6) =30, OEN = 27
3030 13:10:39.939045 Original DQ_B1 (3 6) =30, OEN = 27
3031 13:10:39.942041 23, 0x0, End_B0=23 End_B1=23
3032 13:10:39.942128 24, 0x0, End_B0=24 End_B1=24
3033 13:10:39.945572 25, 0x0, End_B0=25 End_B1=25
3034 13:10:39.948721 26, 0x0, End_B0=26 End_B1=26
3035 13:10:39.952432 27, 0x0, End_B0=27 End_B1=27
3036 13:10:39.955493 28, 0x0, End_B0=28 End_B1=28
3037 13:10:39.955596 29, 0x0, End_B0=29 End_B1=29
3038 13:10:39.958729 30, 0x0, End_B0=30 End_B1=30
3039 13:10:39.961956 31, 0xFFFF, End_B0=30 End_B1=30
3040 13:10:39.968903 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3041 13:10:39.971845 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3042 13:10:39.971983
3043 13:10:39.972089
3044 13:10:39.975540 Write Rank0 MR23 =0x3f
3045 13:10:39.975695 [DQSOSC]
3046 13:10:39.985293 [DQSOSCAuto] RK0, (LSB)MR18= 0xbebe, (MSB)MR19= 0x202, tDQSOscB0 = 448 ps tDQSOscB1 = 448 ps
3047 13:10:39.992359 CH1_RK0: MR19=0x202, MR18=0xBEBE, DQSOSC=448, MR23=63, INC=12, DEC=18
3048 13:10:39.992651 Write Rank0 MR23 =0x3f
3049 13:10:39.992864 [DQSOSC]
3050 13:10:40.002336 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
3051 13:10:40.005891 CH1 RK0: MR19=202, MR18=C0C0
3052 13:10:40.008873 [RankSwap] Rank num 2, (Multi 1), Rank 1
3053 13:10:40.009239 Write Rank0 MR2 =0xad
3054 13:10:40.012260 [Write Leveling]
3055 13:10:40.015339 delay byte0 byte1 byte2 byte3
3056 13:10:40.015717
3057 13:10:40.016067 10 0 0
3058 13:10:40.018841 11 0 0
3059 13:10:40.019245 12 0 0
3060 13:10:40.019646 13 0 0
3061 13:10:40.022340 14 0 0
3062 13:10:40.022765 15 0 0
3063 13:10:40.025407 16 0 0
3064 13:10:40.025838 17 0 0
3065 13:10:40.026255 18 0 0
3066 13:10:40.028917 19 0 0
3067 13:10:40.029342 20 0 0
3068 13:10:40.031934 21 0 0
3069 13:10:40.032389 22 0 0
3070 13:10:40.035071 23 0 0
3071 13:10:40.035535 24 0 ff
3072 13:10:40.035948 25 0 ff
3073 13:10:40.038636 26 0 ff
3074 13:10:40.039024 27 0 ff
3075 13:10:40.042453 28 0 ff
3076 13:10:40.042792 29 0 ff
3077 13:10:40.045757 30 0 ff
3078 13:10:40.046091 31 0 ff
3079 13:10:40.048933 32 0 ff
3080 13:10:40.049283 33 0 ff
3081 13:10:40.049551 34 ff ff
3082 13:10:40.052180 35 ff ff
3083 13:10:40.052664 36 ff ff
3084 13:10:40.055244 37 ff ff
3085 13:10:40.055614 38 ff ff
3086 13:10:40.058662 39 ff ff
3087 13:10:40.059007 40 ff ff
3088 13:10:40.062367 pass bytecount = 0xff (0xff: all bytes pass)
3089 13:10:40.062693
3090 13:10:40.065743 DQS0 dly: 34
3091 13:10:40.066067 DQS1 dly: 24
3092 13:10:40.069339 Write Rank0 MR2 =0x2d
3093 13:10:40.072350 [RankSwap] Rank num 2, (Multi 1), Rank 0
3094 13:10:40.072716 Write Rank1 MR1 =0xd6
3095 13:10:40.075692 [Gating]
3096 13:10:40.076014 ==
3097 13:10:40.079080 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3098 13:10:40.082167 fsp= 1, odt_onoff= 1, Byte mode= 0
3099 13:10:40.082493 ==
3100 13:10:40.088695 3 1 0 |1616 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3101 13:10:40.092055 3 1 4 |2727 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3102 13:10:40.095513 3 1 8 |3434 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3103 13:10:40.102543 3 1 12 |b0a 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3104 13:10:40.105360 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
3105 13:10:40.109164 3 1 20 |3332 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3106 13:10:40.112330 3 1 24 |606 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3107 13:10:40.118750 3 1 28 |2727 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
3108 13:10:40.122282 3 2 0 |3232 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
3109 13:10:40.125508 3 2 4 |908 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3110 13:10:40.132249 3 2 8 |707 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
3111 13:10:40.135421 3 2 12 |3939 605 |(0 0)(11 11) |(1 1)(0 0)| 0
3112 13:10:40.138894 3 2 16 |3b3b 303 |(0 0)(11 11) |(1 1)(0 0)| 0
3113 13:10:40.142092 [Byte 0] Lead/lag Transition tap number (1)
3114 13:10:40.145654 3 2 20 |3939 3534 |(0 0)(11 11) |(0 0)(0 0)| 0
3115 13:10:40.152025 3 2 24 |1c1c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3116 13:10:40.155381 3 2 28 |2726 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3117 13:10:40.158734 3 3 0 |3a3a 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
3118 13:10:40.165312 3 3 4 |d0d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3119 13:10:40.168744 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3120 13:10:40.172285 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3121 13:10:40.178958 [Byte 0] Lead/lag falling Transition (3, 3, 12)
3122 13:10:40.181906 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3123 13:10:40.185264 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3124 13:10:40.188863 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3125 13:10:40.195648 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3126 13:10:40.198934 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3127 13:10:40.202209 3 4 4 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3128 13:10:40.208966 3 4 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3129 13:10:40.212156 3 4 12 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3130 13:10:40.215533 3 4 16 |3d3d 3b3b |(11 11)(11 11) |(1 1)(1 1)| 0
3131 13:10:40.221969 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3132 13:10:40.225516 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3133 13:10:40.228664 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3134 13:10:40.235029 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3135 13:10:40.238532 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3136 13:10:40.242097 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3137 13:10:40.245134 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3138 13:10:40.251748 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3139 13:10:40.254943 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3140 13:10:40.258424 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3141 13:10:40.264909 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3142 13:10:40.268278 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3143 13:10:40.271529 [Byte 0] Lead/lag Transition tap number (2)
3144 13:10:40.278408 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3145 13:10:40.281609 3 6 4 |3333 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3146 13:10:40.284781 [Byte 1] Lead/lag falling Transition (3, 6, 4)
3147 13:10:40.288066 3 6 8 |4646 3d3d |(0 0)(11 11) |(0 0)(1 0)| 0
3148 13:10:40.291638 [Byte 0]First pass (3, 6, 8)
3149 13:10:40.294902 [Byte 1] Lead/lag Transition tap number (2)
3150 13:10:40.301620 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
3151 13:10:40.304781 3 6 16 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
3152 13:10:40.308276 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3153 13:10:40.311495 [Byte 1]First pass (3, 6, 20)
3154 13:10:40.314799 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3155 13:10:40.318339 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3156 13:10:40.321792 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3157 13:10:40.328079 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3158 13:10:40.331321 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3159 13:10:40.335141 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3160 13:10:40.338269 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3161 13:10:40.341439 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3162 13:10:40.348288 All bytes gating window > 1UI, Early break!
3163 13:10:40.348623
3164 13:10:40.351328 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 28)
3165 13:10:40.351647
3166 13:10:40.354476 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
3167 13:10:40.354783
3168 13:10:40.355088
3169 13:10:40.355376
3170 13:10:40.358120 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
3171 13:10:40.358425
3172 13:10:40.361142 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
3173 13:10:40.364693
3174 13:10:40.365084
3175 13:10:40.365468 Write Rank1 MR1 =0x56
3176 13:10:40.365815
3177 13:10:40.367799 best RODT dly(2T, 0.5T) = (2, 2)
3178 13:10:40.368167
3179 13:10:40.371782 best RODT dly(2T, 0.5T) = (2, 3)
3180 13:10:40.372078 ==
3181 13:10:40.377776 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3182 13:10:40.381647 fsp= 1, odt_onoff= 1, Byte mode= 0
3183 13:10:40.382060 ==
3184 13:10:40.384908 Start DQ dly to find pass range UseTestEngine =0
3185 13:10:40.387884 x-axis: bit #, y-axis: DQ dly (-127~63)
3186 13:10:40.388215 RX Vref Scan = 0
3187 13:10:40.391389 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3188 13:10:40.394614 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3189 13:10:40.398113 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3190 13:10:40.401210 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3191 13:10:40.404831 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3192 13:10:40.407817 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3193 13:10:40.411141 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3194 13:10:40.411442 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3195 13:10:40.414363 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3196 13:10:40.417750 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3197 13:10:40.421387 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3198 13:10:40.424524 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3199 13:10:40.428102 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3200 13:10:40.431336 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3201 13:10:40.434505 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3202 13:10:40.437870 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3203 13:10:40.438210 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3204 13:10:40.441653 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3205 13:10:40.444546 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3206 13:10:40.447797 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3207 13:10:40.451507 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3208 13:10:40.454731 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3209 13:10:40.457804 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3210 13:10:40.458132 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3211 13:10:40.461362 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3212 13:10:40.464407 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3213 13:10:40.467549 0, [0] xxxoxxxx xoxxxxxo [MSB]
3214 13:10:40.471221 1, [0] xxooxxxx ooxxxxxo [MSB]
3215 13:10:40.474749 2, [0] xxooxxxx ooxxxxxo [MSB]
3216 13:10:40.475075 3, [0] xxooxxxo oooxxxxo [MSB]
3217 13:10:40.477531 4, [0] oxoooxxo oooxoxxo [MSB]
3218 13:10:40.480804 5, [0] oooooxoo ooooooxo [MSB]
3219 13:10:40.484141 32, [0] oooooooo ooooooox [MSB]
3220 13:10:40.487522 33, [0] oooooooo ooooooox [MSB]
3221 13:10:40.491037 34, [0] oooooooo ooooooox [MSB]
3222 13:10:40.494514 35, [0] oooxoooo xxooooox [MSB]
3223 13:10:40.494843 36, [0] oooxoooo xxooooox [MSB]
3224 13:10:40.497746 37, [0] ooxxoooo xxooooox [MSB]
3225 13:10:40.501411 38, [0] ooxxoooo xxooooox [MSB]
3226 13:10:40.504067 39, [0] oxxxxoox xxooooox [MSB]
3227 13:10:40.508030 40, [0] oxxxxoox xxxoooox [MSB]
3228 13:10:40.511040 41, [0] oxxxxoox xxxxxxox [MSB]
3229 13:10:40.513891 42, [0] xxxxxxxx xxxxxxxx [MSB]
3230 13:10:40.518033 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
3231 13:10:40.521065 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3232 13:10:40.523835 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
3233 13:10:40.527724 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3234 13:10:40.530507 iDelay=42, Bit 4, Center 21 (4 ~ 38) 35
3235 13:10:40.534441 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
3236 13:10:40.537477 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3237 13:10:40.540855 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3238 13:10:40.543963 iDelay=42, Bit 8, Center 17 (1 ~ 34) 34
3239 13:10:40.547287 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
3240 13:10:40.550440 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3241 13:10:40.557125 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3242 13:10:40.560234 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3243 13:10:40.563596 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
3244 13:10:40.566903 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
3245 13:10:40.570687 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3246 13:10:40.571008 ==
3247 13:10:40.573636 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3248 13:10:40.576927 fsp= 1, odt_onoff= 1, Byte mode= 0
3249 13:10:40.580206 ==
3250 13:10:40.580554 DQS Delay:
3251 13:10:40.580810 DQS0 = 0, DQS1 = 0
3252 13:10:40.583933 DQM Delay:
3253 13:10:40.584253 DQM0 = 20, DQM1 = 19
3254 13:10:40.587187 DQ Delay:
3255 13:10:40.587608 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3256 13:10:40.590189 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
3257 13:10:40.593748 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3258 13:10:40.597052 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =14
3259 13:10:40.597374
3260 13:10:40.600337
3261 13:10:40.600721 DramC Write-DBI off
3262 13:10:40.600975 ==
3263 13:10:40.606916 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3264 13:10:40.610434 fsp= 1, odt_onoff= 1, Byte mode= 0
3265 13:10:40.610758 ==
3266 13:10:40.613445 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3267 13:10:40.613768
3268 13:10:40.616993 Begin, DQ Scan Range 920~1176
3269 13:10:40.617314
3270 13:10:40.617563
3271 13:10:40.620085 TX Vref Scan disable
3272 13:10:40.623459 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
3273 13:10:40.626879 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3274 13:10:40.630126 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3275 13:10:40.633441 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3276 13:10:40.636763 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3277 13:10:40.640392 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3278 13:10:40.643709 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3279 13:10:40.647242 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3280 13:10:40.649989 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3281 13:10:40.653697 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3282 13:10:40.656481 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3283 13:10:40.660349 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3284 13:10:40.663808 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3285 13:10:40.666854 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3286 13:10:40.670275 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3287 13:10:40.676628 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3288 13:10:40.680065 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3289 13:10:40.683262 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3290 13:10:40.686549 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3291 13:10:40.690190 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3292 13:10:40.693448 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3293 13:10:40.696718 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3294 13:10:40.699878 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3295 13:10:40.703441 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3296 13:10:40.706608 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3297 13:10:40.709597 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3298 13:10:40.713372 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3299 13:10:40.716330 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3300 13:10:40.719685 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3301 13:10:40.723255 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3302 13:10:40.726762 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3303 13:10:40.733366 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3304 13:10:40.736494 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3305 13:10:40.739869 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3306 13:10:40.743355 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3307 13:10:40.746269 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3308 13:10:40.749615 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3309 13:10:40.753799 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3310 13:10:40.756201 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3311 13:10:40.759514 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3312 13:10:40.762720 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3313 13:10:40.766279 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3314 13:10:40.769863 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3315 13:10:40.772976 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3316 13:10:40.776265 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3317 13:10:40.779194 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3318 13:10:40.782943 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3319 13:10:40.785688 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3320 13:10:40.789612 968 |3 6 8|[0] xxxxxxxx ooxxxxxo [MSB]
3321 13:10:40.792807 969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]
3322 13:10:40.796240 970 |3 6 10|[0] xxxxxxxx oooxxxxo [MSB]
3323 13:10:40.802737 971 |3 6 11|[0] xxxxxxxx ooooxxoo [MSB]
3324 13:10:40.805822 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3325 13:10:40.809338 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3326 13:10:40.812477 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3327 13:10:40.815976 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3328 13:10:40.819152 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3329 13:10:40.822556 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3330 13:10:40.826105 978 |3 6 18|[0] xooooxxx oooooooo [MSB]
3331 13:10:40.829163 979 |3 6 19|[0] xoooooox oooooooo [MSB]
3332 13:10:40.832527 985 |3 6 25|[0] oooooooo ooooooox [MSB]
3333 13:10:40.836084 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3334 13:10:40.842577 987 |3 6 27|[0] oooooooo ooooooox [MSB]
3335 13:10:40.846033 988 |3 6 28|[0] oooooooo xxxxxoxx [MSB]
3336 13:10:40.849267 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
3337 13:10:40.852503 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3338 13:10:40.855955 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3339 13:10:40.859258 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3340 13:10:40.862609 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3341 13:10:40.865833 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3342 13:10:40.870047 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3343 13:10:40.872610 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3344 13:10:40.875980 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
3345 13:10:40.879342 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3346 13:10:40.882582 999 |3 6 39|[0] ooxxoooo xxxxxxxx [MSB]
3347 13:10:40.886527 1000 |3 6 40|[0] ooxxxoox xxxxxxxx [MSB]
3348 13:10:40.889213 1001 |3 6 41|[0] oxxxxoxx xxxxxxxx [MSB]
3349 13:10:40.892791 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
3350 13:10:40.899214 Byte0, DQ PI dly=988, DQM PI dly= 988
3351 13:10:40.902651 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3352 13:10:40.902984
3353 13:10:40.905908 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3354 13:10:40.906237
3355 13:10:40.909246 Byte1, DQ PI dly=977, DQM PI dly= 977
3356 13:10:40.915795 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3357 13:10:40.916121
3358 13:10:40.918969 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3359 13:10:40.919295
3360 13:10:40.919542 ==
3361 13:10:40.925818 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3362 13:10:40.926145 fsp= 1, odt_onoff= 1, Byte mode= 0
3363 13:10:40.929113 ==
3364 13:10:40.932838 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3365 13:10:40.933164
3366 13:10:40.936108 Begin, DQ Scan Range 953~1017
3367 13:10:40.936505 Write Rank1 MR14 =0x0
3368 13:10:40.945614
3369 13:10:40.945937 CH=1, VrefRange= 0, VrefLevel = 0
3370 13:10:40.952565 TX Bit0 (983~998) 16 990, Bit8 (970~984) 15 977,
3371 13:10:40.955890 TX Bit1 (981~996) 16 988, Bit9 (970~983) 14 976,
3372 13:10:40.962296 TX Bit2 (979~993) 15 986, Bit10 (974~985) 12 979,
3373 13:10:40.965974 TX Bit3 (978~990) 13 984, Bit11 (975~986) 12 980,
3374 13:10:40.969132 TX Bit4 (981~996) 16 988, Bit12 (975~985) 11 980,
3375 13:10:40.975628 TX Bit5 (982~998) 17 990, Bit13 (975~986) 12 980,
3376 13:10:40.979313 TX Bit6 (981~996) 16 988, Bit14 (976~984) 9 980,
3377 13:10:40.982439 TX Bit7 (983~994) 12 988, Bit15 (968~977) 10 972,
3378 13:10:40.982763
3379 13:10:40.985632 Write Rank1 MR14 =0x2
3380 13:10:40.994725
3381 13:10:40.995046 CH=1, VrefRange= 0, VrefLevel = 2
3382 13:10:41.001601 TX Bit0 (982~998) 17 990, Bit8 (970~984) 15 977,
3383 13:10:41.004893 TX Bit1 (980~997) 18 988, Bit9 (970~984) 15 977,
3384 13:10:41.011762 TX Bit2 (979~994) 16 986, Bit10 (974~985) 12 979,
3385 13:10:41.014636 TX Bit3 (978~990) 13 984, Bit11 (974~987) 14 980,
3386 13:10:41.017860 TX Bit4 (980~997) 18 988, Bit12 (975~986) 12 980,
3387 13:10:41.024764 TX Bit5 (982~998) 17 990, Bit13 (975~988) 14 981,
3388 13:10:41.027883 TX Bit6 (981~997) 17 989, Bit14 (975~985) 11 980,
3389 13:10:41.031481 TX Bit7 (983~994) 12 988, Bit15 (969~978) 10 973,
3390 13:10:41.031818
3391 13:10:41.034504 Write Rank1 MR14 =0x4
3392 13:10:41.043671
3393 13:10:41.043993 CH=1, VrefRange= 0, VrefLevel = 4
3394 13:10:41.050718 TX Bit0 (982~998) 17 990, Bit8 (970~984) 15 977,
3395 13:10:41.054403 TX Bit1 (981~998) 18 989, Bit9 (970~984) 15 977,
3396 13:10:41.060445 TX Bit2 (978~995) 18 986, Bit10 (974~986) 13 980,
3397 13:10:41.063807 TX Bit3 (977~991) 15 984, Bit11 (974~987) 14 980,
3398 13:10:41.066982 TX Bit4 (980~997) 18 988, Bit12 (975~986) 12 980,
3399 13:10:41.073802 TX Bit5 (982~998) 17 990, Bit13 (974~988) 15 981,
3400 13:10:41.076976 TX Bit6 (981~998) 18 989, Bit14 (974~985) 12 979,
3401 13:10:41.080314 TX Bit7 (982~995) 14 988, Bit15 (968~979) 12 973,
3402 13:10:41.080885
3403 13:10:41.083264 Write Rank1 MR14 =0x6
3404 13:10:41.093115
3405 13:10:41.093573 CH=1, VrefRange= 0, VrefLevel = 6
3406 13:10:41.099909 TX Bit0 (981~999) 19 990, Bit8 (969~985) 17 977,
3407 13:10:41.103346 TX Bit1 (980~998) 19 989, Bit9 (970~985) 16 977,
3408 13:10:41.109744 TX Bit2 (978~996) 19 987, Bit10 (973~986) 14 979,
3409 13:10:41.113143 TX Bit3 (977~992) 16 984, Bit11 (974~988) 15 981,
3410 13:10:41.116309 TX Bit4 (979~998) 20 988, Bit12 (973~987) 15 980,
3411 13:10:41.123048 TX Bit5 (981~999) 19 990, Bit13 (974~989) 16 981,
3412 13:10:41.126474 TX Bit6 (980~998) 19 989, Bit14 (973~986) 14 979,
3413 13:10:41.130182 TX Bit7 (982~997) 16 989, Bit15 (967~980) 14 973,
3414 13:10:41.130514
3415 13:10:41.132977 Write Rank1 MR14 =0x8
3416 13:10:41.142464
3417 13:10:41.142819 CH=1, VrefRange= 0, VrefLevel = 8
3418 13:10:41.149276 TX Bit0 (980~999) 20 989, Bit8 (969~985) 17 977,
3419 13:10:41.152334 TX Bit1 (980~998) 19 989, Bit9 (970~985) 16 977,
3420 13:10:41.158853 TX Bit2 (978~997) 20 987, Bit10 (972~987) 16 979,
3421 13:10:41.162407 TX Bit3 (977~993) 17 985, Bit11 (973~989) 17 981,
3422 13:10:41.165533 TX Bit4 (979~998) 20 988, Bit12 (974~988) 15 981,
3423 13:10:41.172230 TX Bit5 (981~999) 19 990, Bit13 (973~990) 18 981,
3424 13:10:41.175725 TX Bit6 (980~998) 19 989, Bit14 (973~987) 15 980,
3425 13:10:41.178920 TX Bit7 (982~997) 16 989, Bit15 (968~982) 15 975,
3426 13:10:41.179278
3427 13:10:41.182528 Write Rank1 MR14 =0xa
3428 13:10:41.191508
3429 13:10:41.195056 CH=1, VrefRange= 0, VrefLevel = 10
3430 13:10:41.198601 TX Bit0 (980~1000) 21 990, Bit8 (969~986) 18 977,
3431 13:10:41.202014 TX Bit1 (980~998) 19 989, Bit9 (969~985) 17 977,
3432 13:10:41.208446 TX Bit2 (978~997) 20 987, Bit10 (972~988) 17 980,
3433 13:10:41.211580 TX Bit3 (977~994) 18 985, Bit11 (973~990) 18 981,
3434 13:10:41.215440 TX Bit4 (979~998) 20 988, Bit12 (973~989) 17 981,
3435 13:10:41.221937 TX Bit5 (980~1000) 21 990, Bit13 (972~991) 20 981,
3436 13:10:41.225309 TX Bit6 (979~999) 21 989, Bit14 (972~988) 17 980,
3437 13:10:41.228400 TX Bit7 (981~998) 18 989, Bit15 (967~983) 17 975,
3438 13:10:41.231932
3439 13:10:41.232285 Write Rank1 MR14 =0xc
3440 13:10:41.241469
3441 13:10:41.244911 CH=1, VrefRange= 0, VrefLevel = 12
3442 13:10:41.248087 TX Bit0 (980~1000) 21 990, Bit8 (969~986) 18 977,
3443 13:10:41.251567 TX Bit1 (979~999) 21 989, Bit9 (969~986) 18 977,
3444 13:10:41.257550 TX Bit2 (978~998) 21 988, Bit10 (971~989) 19 980,
3445 13:10:41.261259 TX Bit3 (977~994) 18 985, Bit11 (972~990) 19 981,
3446 13:10:41.264281 TX Bit4 (978~999) 22 988, Bit12 (972~990) 19 981,
3447 13:10:41.271065 TX Bit5 (980~1000) 21 990, Bit13 (972~991) 20 981,
3448 13:10:41.274445 TX Bit6 (979~999) 21 989, Bit14 (971~989) 19 980,
3449 13:10:41.280760 TX Bit7 (980~998) 19 989, Bit15 (967~983) 17 975,
3450 13:10:41.281093
3451 13:10:41.281349 Write Rank1 MR14 =0xe
3452 13:10:41.291119
3453 13:10:41.294708 CH=1, VrefRange= 0, VrefLevel = 14
3454 13:10:41.298061 TX Bit0 (979~1001) 23 990, Bit8 (968~987) 20 977,
3455 13:10:41.301211 TX Bit1 (978~999) 22 988, Bit9 (969~986) 18 977,
3456 13:10:41.307931 TX Bit2 (978~998) 21 988, Bit10 (971~989) 19 980,
3457 13:10:41.311185 TX Bit3 (977~995) 19 986, Bit11 (972~991) 20 981,
3458 13:10:41.314390 TX Bit4 (978~999) 22 988, Bit12 (971~990) 20 980,
3459 13:10:41.321712 TX Bit5 (979~1001) 23 990, Bit13 (972~991) 20 981,
3460 13:10:41.324900 TX Bit6 (979~999) 21 989, Bit14 (971~989) 19 980,
3461 13:10:41.328018 TX Bit7 (980~998) 19 989, Bit15 (966~984) 19 975,
3462 13:10:41.331238
3463 13:10:41.331697 Write Rank1 MR14 =0x10
3464 13:10:41.341279
3465 13:10:41.344486 CH=1, VrefRange= 0, VrefLevel = 16
3466 13:10:41.347832 TX Bit0 (979~1001) 23 990, Bit8 (968~987) 20 977,
3467 13:10:41.351212 TX Bit1 (979~1000) 22 989, Bit9 (969~987) 19 978,
3468 13:10:41.358024 TX Bit2 (977~998) 22 987, Bit10 (971~990) 20 980,
3469 13:10:41.361396 TX Bit3 (976~995) 20 985, Bit11 (971~991) 21 981,
3470 13:10:41.364612 TX Bit4 (978~999) 22 988, Bit12 (971~990) 20 980,
3471 13:10:41.371215 TX Bit5 (979~1001) 23 990, Bit13 (972~991) 20 981,
3472 13:10:41.374343 TX Bit6 (978~1000) 23 989, Bit14 (971~990) 20 980,
3473 13:10:41.381116 TX Bit7 (980~999) 20 989, Bit15 (966~984) 19 975,
3474 13:10:41.381450
3475 13:10:41.381709 Write Rank1 MR14 =0x12
3476 13:10:41.391547
3477 13:10:41.395128 CH=1, VrefRange= 0, VrefLevel = 18
3478 13:10:41.398354 TX Bit0 (979~1002) 24 990, Bit8 (969~988) 20 978,
3479 13:10:41.401313 TX Bit1 (978~1000) 23 989, Bit9 (969~988) 20 978,
3480 13:10:41.408129 TX Bit2 (977~998) 22 987, Bit10 (970~991) 22 980,
3481 13:10:41.411372 TX Bit3 (976~996) 21 986, Bit11 (971~991) 21 981,
3482 13:10:41.414992 TX Bit4 (978~1000) 23 989, Bit12 (971~991) 21 981,
3483 13:10:41.421415 TX Bit5 (979~1002) 24 990, Bit13 (971~992) 22 981,
3484 13:10:41.424773 TX Bit6 (979~1001) 23 990, Bit14 (971~990) 20 980,
3485 13:10:41.431537 TX Bit7 (979~999) 21 989, Bit15 (966~985) 20 975,
3486 13:10:41.431869
3487 13:10:41.432125 Write Rank1 MR14 =0x14
3488 13:10:41.441888
3489 13:10:41.445017 CH=1, VrefRange= 0, VrefLevel = 20
3490 13:10:41.448855 TX Bit0 (979~1002) 24 990, Bit8 (968~988) 21 978,
3491 13:10:41.452087 TX Bit1 (978~1001) 24 989, Bit9 (969~988) 20 978,
3492 13:10:41.458784 TX Bit2 (977~999) 23 988, Bit10 (970~991) 22 980,
3493 13:10:41.461897 TX Bit3 (976~997) 22 986, Bit11 (970~992) 23 981,
3494 13:10:41.465244 TX Bit4 (978~1000) 23 989, Bit12 (971~991) 21 981,
3495 13:10:41.471458 TX Bit5 (979~1002) 24 990, Bit13 (971~992) 22 981,
3496 13:10:41.475233 TX Bit6 (978~1001) 24 989, Bit14 (970~991) 22 980,
3497 13:10:41.482006 TX Bit7 (979~1000) 22 989, Bit15 (966~985) 20 975,
3498 13:10:41.482367
3499 13:10:41.482650 Write Rank1 MR14 =0x16
3500 13:10:41.492511
3501 13:10:41.492968 CH=1, VrefRange= 0, VrefLevel = 22
3502 13:10:41.499363 TX Bit0 (979~1003) 25 991, Bit8 (968~989) 22 978,
3503 13:10:41.503142 TX Bit1 (978~1001) 24 989, Bit9 (968~989) 22 978,
3504 13:10:41.509186 TX Bit2 (977~999) 23 988, Bit10 (970~991) 22 980,
3505 13:10:41.512337 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3506 13:10:41.515468 TX Bit4 (978~1001) 24 989, Bit12 (971~992) 22 981,
3507 13:10:41.522241 TX Bit5 (978~1003) 26 990, Bit13 (970~992) 23 981,
3508 13:10:41.525422 TX Bit6 (978~1001) 24 989, Bit14 (970~991) 22 980,
3509 13:10:41.531970 TX Bit7 (979~1000) 22 989, Bit15 (965~985) 21 975,
3510 13:10:41.532121
3511 13:10:41.532245 Write Rank1 MR14 =0x18
3512 13:10:41.542703
3513 13:10:41.546116 CH=1, VrefRange= 0, VrefLevel = 24
3514 13:10:41.549371 TX Bit0 (978~1003) 26 990, Bit8 (968~990) 23 979,
3515 13:10:41.552409 TX Bit1 (978~1002) 25 990, Bit9 (968~990) 23 979,
3516 13:10:41.559283 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
3517 13:10:41.562606 TX Bit3 (975~998) 24 986, Bit11 (970~992) 23 981,
3518 13:10:41.565848 TX Bit4 (978~1001) 24 989, Bit12 (970~992) 23 981,
3519 13:10:41.572358 TX Bit5 (978~1003) 26 990, Bit13 (971~993) 23 982,
3520 13:10:41.575773 TX Bit6 (978~1002) 25 990, Bit14 (970~992) 23 981,
3521 13:10:41.582453 TX Bit7 (978~1001) 24 989, Bit15 (966~986) 21 976,
3522 13:10:41.582545
3523 13:10:41.582615 Write Rank1 MR14 =0x1a
3524 13:10:41.593574
3525 13:10:41.596671 CH=1, VrefRange= 0, VrefLevel = 26
3526 13:10:41.600249 TX Bit0 (978~1004) 27 991, Bit8 (967~990) 24 978,
3527 13:10:41.603447 TX Bit1 (978~1002) 25 990, Bit9 (967~990) 24 978,
3528 13:10:41.610059 TX Bit2 (977~1000) 24 988, Bit10 (970~992) 23 981,
3529 13:10:41.613614 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3530 13:10:41.617162 TX Bit4 (978~1002) 25 990, Bit12 (970~992) 23 981,
3531 13:10:41.623430 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3532 13:10:41.627130 TX Bit6 (978~1002) 25 990, Bit14 (969~992) 24 980,
3533 13:10:41.633761 TX Bit7 (978~1001) 24 989, Bit15 (964~986) 23 975,
3534 13:10:41.634139
3535 13:10:41.634448 Write Rank1 MR14 =0x1c
3536 13:10:41.644519
3537 13:10:41.647939 CH=1, VrefRange= 0, VrefLevel = 28
3538 13:10:41.651053 TX Bit0 (979~1004) 26 991, Bit8 (967~991) 25 979,
3539 13:10:41.654718 TX Bit1 (977~1002) 26 989, Bit9 (967~990) 24 978,
3540 13:10:41.661143 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
3541 13:10:41.664306 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3542 13:10:41.670805 TX Bit4 (977~1002) 26 989, Bit12 (970~992) 23 981,
3543 13:10:41.674142 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3544 13:10:41.677697 TX Bit6 (978~1003) 26 990, Bit14 (970~992) 23 981,
3545 13:10:41.684057 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3546 13:10:41.684530
3547 13:10:41.684813 Write Rank1 MR14 =0x1e
3548 13:10:41.695622
3549 13:10:41.698828 CH=1, VrefRange= 0, VrefLevel = 30
3550 13:10:41.702299 TX Bit0 (978~1005) 28 991, Bit8 (967~991) 25 979,
3551 13:10:41.705984 TX Bit1 (977~1003) 27 990, Bit9 (968~991) 24 979,
3552 13:10:41.712114 TX Bit2 (976~1001) 26 988, Bit10 (969~993) 25 981,
3553 13:10:41.715698 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3554 13:10:41.718687 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3555 13:10:41.725733 TX Bit5 (978~1005) 28 991, Bit13 (970~993) 24 981,
3556 13:10:41.728671 TX Bit6 (978~1004) 27 991, Bit14 (969~992) 24 980,
3557 13:10:41.735575 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3558 13:10:41.735935
3559 13:10:41.736206 Write Rank1 MR14 =0x20
3560 13:10:41.746931
3561 13:10:41.750068 CH=1, VrefRange= 0, VrefLevel = 32
3562 13:10:41.753347 TX Bit0 (978~1005) 28 991, Bit8 (967~991) 25 979,
3563 13:10:41.756504 TX Bit1 (977~1003) 27 990, Bit9 (968~991) 24 979,
3564 13:10:41.763565 TX Bit2 (976~1001) 26 988, Bit10 (969~993) 25 981,
3565 13:10:41.766779 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3566 13:10:41.770346 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3567 13:10:41.776732 TX Bit5 (978~1005) 28 991, Bit13 (970~993) 24 981,
3568 13:10:41.779761 TX Bit6 (978~1004) 27 991, Bit14 (969~992) 24 980,
3569 13:10:41.786266 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3570 13:10:41.786613
3571 13:10:41.786870 Write Rank1 MR14 =0x22
3572 13:10:41.797134
3573 13:10:41.800658 CH=1, VrefRange= 0, VrefLevel = 34
3574 13:10:41.804210 TX Bit0 (978~1005) 28 991, Bit8 (967~991) 25 979,
3575 13:10:41.807620 TX Bit1 (977~1003) 27 990, Bit9 (968~991) 24 979,
3576 13:10:41.814169 TX Bit2 (976~1001) 26 988, Bit10 (969~993) 25 981,
3577 13:10:41.817332 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3578 13:10:41.820570 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3579 13:10:41.827313 TX Bit5 (978~1005) 28 991, Bit13 (970~993) 24 981,
3580 13:10:41.830945 TX Bit6 (978~1004) 27 991, Bit14 (969~992) 24 980,
3581 13:10:41.837114 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3582 13:10:41.837465
3583 13:10:41.837734 Write Rank1 MR14 =0x24
3584 13:10:41.848391
3585 13:10:41.851753 CH=1, VrefRange= 0, VrefLevel = 36
3586 13:10:41.854923 TX Bit0 (978~1005) 28 991, Bit8 (967~991) 25 979,
3587 13:10:41.858240 TX Bit1 (977~1003) 27 990, Bit9 (968~991) 24 979,
3588 13:10:41.864906 TX Bit2 (976~1001) 26 988, Bit10 (969~993) 25 981,
3589 13:10:41.868341 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3590 13:10:41.871462 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3591 13:10:41.877960 TX Bit5 (978~1005) 28 991, Bit13 (970~993) 24 981,
3592 13:10:41.881329 TX Bit6 (978~1004) 27 991, Bit14 (969~992) 24 980,
3593 13:10:41.887944 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3594 13:10:41.888296
3595 13:10:41.888617 Write Rank1 MR14 =0x26
3596 13:10:41.899040
3597 13:10:41.902189 CH=1, VrefRange= 0, VrefLevel = 38
3598 13:10:41.905789 TX Bit0 (978~1005) 28 991, Bit8 (967~991) 25 979,
3599 13:10:41.908710 TX Bit1 (977~1003) 27 990, Bit9 (968~991) 24 979,
3600 13:10:41.915800 TX Bit2 (976~1001) 26 988, Bit10 (969~993) 25 981,
3601 13:10:41.919180 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3602 13:10:41.922642 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3603 13:10:41.929322 TX Bit5 (978~1005) 28 991, Bit13 (970~993) 24 981,
3604 13:10:41.932438 TX Bit6 (978~1004) 27 991, Bit14 (969~992) 24 980,
3605 13:10:41.938803 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3606 13:10:41.939163
3607 13:10:41.939434
3608 13:10:41.942691 TX Vref found, early break! 380< 386
3609 13:10:41.945436 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3610 13:10:41.948935 u1DelayCellOfst[0]=5 cells (4 PI)
3611 13:10:41.952841 u1DelayCellOfst[1]=3 cells (3 PI)
3612 13:10:41.955856 u1DelayCellOfst[2]=1 cells (1 PI)
3613 13:10:41.959493 u1DelayCellOfst[3]=0 cells (0 PI)
3614 13:10:41.962570 u1DelayCellOfst[4]=3 cells (3 PI)
3615 13:10:41.965885 u1DelayCellOfst[5]=5 cells (4 PI)
3616 13:10:41.966237 u1DelayCellOfst[6]=5 cells (4 PI)
3617 13:10:41.968743 u1DelayCellOfst[7]=3 cells (3 PI)
3618 13:10:41.972554 Byte0, DQ PI dly=987, DQM PI dly= 989
3619 13:10:41.978689 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
3620 13:10:41.979047
3621 13:10:41.982023 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
3622 13:10:41.982376
3623 13:10:41.985337 u1DelayCellOfst[8]=5 cells (4 PI)
3624 13:10:41.988729 u1DelayCellOfst[9]=5 cells (4 PI)
3625 13:10:41.992083 u1DelayCellOfst[10]=7 cells (6 PI)
3626 13:10:41.995458 u1DelayCellOfst[11]=7 cells (6 PI)
3627 13:10:41.998844 u1DelayCellOfst[12]=7 cells (6 PI)
3628 13:10:42.001899 u1DelayCellOfst[13]=7 cells (6 PI)
3629 13:10:42.005406 u1DelayCellOfst[14]=6 cells (5 PI)
3630 13:10:42.008971 u1DelayCellOfst[15]=0 cells (0 PI)
3631 13:10:42.012004 Byte1, DQ PI dly=975, DQM PI dly= 978
3632 13:10:42.015751 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
3633 13:10:42.016106
3634 13:10:42.018897 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
3635 13:10:42.019252
3636 13:10:42.022367 Write Rank1 MR14 =0x1e
3637 13:10:42.022716
3638 13:10:42.025733 Final TX Range 0 Vref 30
3639 13:10:42.026086
3640 13:10:42.032006 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3641 13:10:42.032420
3642 13:10:42.035480 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3643 13:10:42.045426 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3644 13:10:42.052402 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3645 13:10:42.052784 Write Rank1 MR3 =0xb0
3646 13:10:42.055763 DramC Write-DBI on
3647 13:10:42.056120 ==
3648 13:10:42.058784 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3649 13:10:42.061929 fsp= 1, odt_onoff= 1, Byte mode= 0
3650 13:10:42.062295 ==
3651 13:10:42.068626 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3652 13:10:42.068988
3653 13:10:42.071802 Begin, DQ Scan Range 698~762
3654 13:10:42.072288
3655 13:10:42.072753
3656 13:10:42.073172 TX Vref Scan disable
3657 13:10:42.075096 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3658 13:10:42.078943 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3659 13:10:42.082040 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3660 13:10:42.085316 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3661 13:10:42.091804 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3662 13:10:42.095361 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3663 13:10:42.098561 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3664 13:10:42.102047 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3665 13:10:42.105313 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3666 13:10:42.108621 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3667 13:10:42.111973 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3668 13:10:42.115246 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3669 13:10:42.119003 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3670 13:10:42.122241 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3671 13:10:42.125304 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3672 13:10:42.128384 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3673 13:10:42.132110 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3674 13:10:42.135237 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3675 13:10:42.138336 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3676 13:10:42.141732 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3677 13:10:42.145254 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3678 13:10:42.148372 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3679 13:10:42.151837 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3680 13:10:42.158174 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3681 13:10:42.161759 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3682 13:10:42.164881 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3683 13:10:42.168344 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3684 13:10:42.171550 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3685 13:10:42.178332 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3686 13:10:42.181650 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3687 13:10:42.185025 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3688 13:10:42.188327 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3689 13:10:42.191793 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3690 13:10:42.195075 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3691 13:10:42.198386 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3692 13:10:42.201458 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3693 13:10:42.204752 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3694 13:10:42.208317 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3695 13:10:42.211422 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3696 13:10:42.214809 Byte0, DQ PI dly=735, DQM PI dly= 735
3697 13:10:42.218326 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
3698 13:10:42.221577
3699 13:10:42.224722 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
3700 13:10:42.225116
3701 13:10:42.228608 Byte1, DQ PI dly=723, DQM PI dly= 723
3702 13:10:42.231735 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3703 13:10:42.232127
3704 13:10:42.238092 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3705 13:10:42.238486
3706 13:10:42.241299 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3707 13:10:42.251396 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3708 13:10:42.258148 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3709 13:10:42.258572 Write Rank1 MR3 =0x30
3710 13:10:42.262061 DramC Write-DBI off
3711 13:10:42.262447
3712 13:10:42.262746 [DATLAT]
3713 13:10:42.265025 Freq=1600, CH1 RK1, use_rxtx_scan=0
3714 13:10:42.265411
3715 13:10:42.268343 DATLAT Default: 0x10
3716 13:10:42.268760 7, 0xFFFF, sum=0
3717 13:10:42.271374 8, 0xFFFF, sum=0
3718 13:10:42.271766 9, 0xFFFF, sum=0
3719 13:10:42.275454 10, 0xFFFF, sum=0
3720 13:10:42.275845 11, 0xFFFF, sum=0
3721 13:10:42.278390 12, 0xFFFF, sum=0
3722 13:10:42.278779 13, 0xFFFF, sum=0
3723 13:10:42.281313 14, 0x0, sum=1
3724 13:10:42.281705 15, 0x0, sum=2
3725 13:10:42.282011 16, 0x0, sum=3
3726 13:10:42.285083 17, 0x0, sum=4
3727 13:10:42.288370 pattern=2 first_step=14 total pass=5 best_step=16
3728 13:10:42.288804 ==
3729 13:10:42.294759 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3730 13:10:42.298163 fsp= 1, odt_onoff= 1, Byte mode= 0
3731 13:10:42.298551 ==
3732 13:10:42.301269 Start DQ dly to find pass range UseTestEngine =1
3733 13:10:42.304825 x-axis: bit #, y-axis: DQ dly (-127~63)
3734 13:10:42.307948 RX Vref Scan = 0
3735 13:10:42.308337 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3736 13:10:42.311750 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3737 13:10:42.314837 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3738 13:10:42.318413 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3739 13:10:42.321627 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3740 13:10:42.324725 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3741 13:10:42.327901 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3742 13:10:42.331230 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3743 13:10:42.331634 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3744 13:10:42.334946 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3745 13:10:42.338208 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3746 13:10:42.341377 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3747 13:10:42.344507 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3748 13:10:42.347861 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3749 13:10:42.351745 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3750 13:10:42.354559 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3751 13:10:42.357948 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3752 13:10:42.358338 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3753 13:10:42.361219 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3754 13:10:42.364633 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3755 13:10:42.367843 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3756 13:10:42.371154 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3757 13:10:42.375038 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3758 13:10:42.375430 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3759 13:10:42.378095 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3760 13:10:42.381338 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3761 13:10:42.384797 0, [0] xxxoxxxx ooxxxxxo [MSB]
3762 13:10:42.387945 1, [0] xxooxxxx ooxxxxxo [MSB]
3763 13:10:42.390946 2, [0] xxooxxxx ooxxxxxo [MSB]
3764 13:10:42.394480 3, [0] oxooxxxo ooxxxxxo [MSB]
3765 13:10:42.394870 4, [0] oooooxxo ooooooxo [MSB]
3766 13:10:42.400099 32, [0] oooooooo ooooooox [MSB]
3767 13:10:42.402645 33, [0] oooooooo ooooooox [MSB]
3768 13:10:42.406484 34, [0] oooooooo ooooooox [MSB]
3769 13:10:42.409486 35, [0] oooxoooo oxooooox [MSB]
3770 13:10:42.413126 36, [0] oooxoooo xxooooox [MSB]
3771 13:10:42.416234 37, [0] ooxxoooo xxooooox [MSB]
3772 13:10:42.416670 38, [0] ooxxoooo xxooooox [MSB]
3773 13:10:42.419535 39, [0] ooxxooox xxooooox [MSB]
3774 13:10:42.422563 40, [0] oxxxxoox xxxoooox [MSB]
3775 13:10:42.425954 41, [0] xxxxxxox xxxxxxxx [MSB]
3776 13:10:42.429112 42, [0] xxxxxxxx xxxxxxxx [MSB]
3777 13:10:42.432555 iDelay=42, Bit 0, Center 21 (3 ~ 40) 38
3778 13:10:42.436159 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
3779 13:10:42.439086 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
3780 13:10:42.442637 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3781 13:10:42.445819 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3782 13:10:42.449127 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3783 13:10:42.452280 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3784 13:10:42.456030 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3785 13:10:42.462578 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
3786 13:10:42.465789 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3787 13:10:42.469477 iDelay=42, Bit 10, Center 21 (4 ~ 39) 36
3788 13:10:42.472669 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3789 13:10:42.475896 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3790 13:10:42.479135 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
3791 13:10:42.483052 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3792 13:10:42.486317 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3793 13:10:42.486705 ==
3794 13:10:42.492920 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3795 13:10:42.496138 fsp= 1, odt_onoff= 1, Byte mode= 0
3796 13:10:42.496558 ==
3797 13:10:42.496869 DQS Delay:
3798 13:10:42.499477 DQS0 = 0, DQS1 = 0
3799 13:10:42.499863 DQM Delay:
3800 13:10:42.500166 DQM0 = 20, DQM1 = 19
3801 13:10:42.502416 DQ Delay:
3802 13:10:42.505952 DQ0 =21, DQ1 =21, DQ2 =18, DQ3 =16
3803 13:10:42.509113 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3804 13:10:42.512404 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3805 13:10:42.515543 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
3806 13:10:42.515820
3807 13:10:42.516037
3808 13:10:42.516236
3809 13:10:42.518979 [DramC_TX_OE_Calibration] TA2
3810 13:10:42.522201 Original DQ_B0 (3 6) =30, OEN = 27
3811 13:10:42.522541 Original DQ_B1 (3 6) =30, OEN = 27
3812 13:10:42.525745 23, 0x0, End_B0=23 End_B1=23
3813 13:10:42.528934 24, 0x0, End_B0=24 End_B1=24
3814 13:10:42.532381 25, 0x0, End_B0=25 End_B1=25
3815 13:10:42.535914 26, 0x0, End_B0=26 End_B1=26
3816 13:10:42.536335 27, 0x0, End_B0=27 End_B1=27
3817 13:10:42.539233 28, 0x0, End_B0=28 End_B1=28
3818 13:10:42.542136 29, 0x0, End_B0=29 End_B1=29
3819 13:10:42.545829 30, 0x0, End_B0=30 End_B1=30
3820 13:10:42.549194 31, 0xFFFF, End_B0=30 End_B1=30
3821 13:10:42.552528 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3822 13:10:42.558930 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3823 13:10:42.559227
3824 13:10:42.559444
3825 13:10:42.562188 Write Rank1 MR23 =0x3f
3826 13:10:42.562463 [DQSOSC]
3827 13:10:42.568720 [DQSOSCAuto] RK1, (LSB)MR18= 0xcdcd, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
3828 13:10:42.575472 CH1_RK1: MR19=0x202, MR18=0xCDCD, DQSOSC=439, MR23=63, INC=12, DEC=19
3829 13:10:42.579222 Write Rank1 MR23 =0x3f
3830 13:10:42.579429 [DQSOSC]
3831 13:10:42.585517 [DQSOSCAuto] RK1, (LSB)MR18= 0xcece, (MSB)MR19= 0x202, tDQSOscB0 = 438 ps tDQSOscB1 = 438 ps
3832 13:10:42.588884 CH1 RK1: MR19=202, MR18=CECE
3833 13:10:42.592249 [RxdqsGatingPostProcess] freq 1600
3834 13:10:42.599068 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3835 13:10:42.599387 Rank: 0
3836 13:10:42.602106 best DQS0 dly(2T, 0.5T) = (2, 6)
3837 13:10:42.606158 best DQS1 dly(2T, 0.5T) = (2, 6)
3838 13:10:42.608630 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3839 13:10:42.612315 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3840 13:10:42.612585 Rank: 1
3841 13:10:42.615739 best DQS0 dly(2T, 0.5T) = (2, 5)
3842 13:10:42.618887 best DQS1 dly(2T, 0.5T) = (2, 6)
3843 13:10:42.622030 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3844 13:10:42.625520 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3845 13:10:42.628764 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3846 13:10:42.632088 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3847 13:10:42.635537 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3848 13:10:42.639219
3849 13:10:42.639316
3850 13:10:42.642337 [Calibration Summary] Freqency 1600
3851 13:10:42.642425 CH 0, Rank 0
3852 13:10:42.642491 All Pass.
3853 13:10:42.642552
3854 13:10:42.645635 CH 0, Rank 1
3855 13:10:42.645721 All Pass.
3856 13:10:42.645787
3857 13:10:42.645848 CH 1, Rank 0
3858 13:10:42.648911 All Pass.
3859 13:10:42.648996
3860 13:10:42.649063 CH 1, Rank 1
3861 13:10:42.649124 All Pass.
3862 13:10:42.649183
3863 13:10:42.655718 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3864 13:10:42.662063 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3865 13:10:42.672255 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3866 13:10:42.672353 Write Rank0 MR3 =0xb0
3867 13:10:42.678690 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3868 13:10:42.685148 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3869 13:10:42.691912 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3870 13:10:42.695395 Write Rank1 MR3 =0xb0
3871 13:10:42.702099 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3872 13:10:42.708788 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3873 13:10:42.715409 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3874 13:10:42.718696 Write Rank0 MR3 =0xb0
3875 13:10:42.725087 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3876 13:10:42.731889 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3877 13:10:42.738521 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3878 13:10:42.738633 Write Rank1 MR3 =0xb0
3879 13:10:42.742319 DramC Write-DBI on
3880 13:10:42.745097 [GetDramInforAfterCalByMRR] Vendor 6.
3881 13:10:42.748764 [GetDramInforAfterCalByMRR] Revision 505.
3882 13:10:42.748855 MR8 1111
3883 13:10:42.755306 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3884 13:10:42.755402 MR8 1111
3885 13:10:42.758721 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3886 13:10:42.762140 MR8 1111
3887 13:10:42.765123 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3888 13:10:42.765208 MR8 1111
3889 13:10:42.771615 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3890 13:10:42.781655 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3891 13:10:42.781743 Write Rank0 MR13 =0xd0
3892 13:10:42.785019 Write Rank1 MR13 =0xd0
3893 13:10:42.785103 Write Rank0 MR13 =0xd0
3894 13:10:42.788418 Write Rank1 MR13 =0xd0
3895 13:10:42.791889 Save calibration result to emmc
3896 13:10:42.791980
3897 13:10:42.792050
3898 13:10:42.794913 [DramcModeReg_Check] Freq_1600, FSP_1
3899 13:10:42.798268 FSP_1, CH_0, RK0
3900 13:10:42.798370 Write Rank0 MR13 =0xd8
3901 13:10:42.802126 MR12 = 0x60 (global = 0x60) match
3902 13:10:42.805454 MR14 = 0x1a (global = 0x1a) match
3903 13:10:42.805574 FSP_1, CH_0, RK1
3904 13:10:42.808703 Write Rank1 MR13 =0xd8
3905 13:10:42.812018 MR12 = 0x60 (global = 0x60) match
3906 13:10:42.815500 MR14 = 0x1e (global = 0x1e) match
3907 13:10:42.815651 FSP_1, CH_1, RK0
3908 13:10:42.818717 Write Rank0 MR13 =0xd8
3909 13:10:42.822281 MR12 = 0x5e (global = 0x5e) match
3910 13:10:42.825314 MR14 = 0x1e (global = 0x1e) match
3911 13:10:42.828623 FSP_1, CH_1, RK1
3912 13:10:42.828828 Write Rank1 MR13 =0xd8
3913 13:10:42.831837 MR12 = 0x5e (global = 0x5e) match
3914 13:10:42.835444 MR14 = 0x1e (global = 0x1e) match
3915 13:10:42.835768
3916 13:10:42.838768 [MEM_TEST] 02: After DFS, before run time config
3917 13:10:42.851035 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3918 13:10:42.851422
3919 13:10:42.851745 [TA2_TEST]
3920 13:10:42.852026 === TA2 HW
3921 13:10:42.854114 TA2 PAT: XTALK
3922 13:10:42.857758 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3923 13:10:42.864123 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3924 13:10:42.867277 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3925 13:10:42.870505 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3926 13:10:42.873868
3927 13:10:42.874263
3928 13:10:42.874564 Settings after calibration
3929 13:10:42.874843
3930 13:10:42.877539 [DramcRunTimeConfig]
3931 13:10:42.880769 TransferPLLToSPMControl - MODE SW PHYPLL
3932 13:10:42.881154 TX_TRACKING: ON
3933 13:10:42.884099 RX_TRACKING: ON
3934 13:10:42.884687 HW_GATING: ON
3935 13:10:42.887160 HW_GATING DBG: OFF
3936 13:10:42.887543 ddr_geometry:1
3937 13:10:42.891351 ddr_geometry:1
3938 13:10:42.891735 ddr_geometry:1
3939 13:10:42.892034 ddr_geometry:1
3940 13:10:42.894309 ddr_geometry:1
3941 13:10:42.894689 ddr_geometry:1
3942 13:10:42.897605 ddr_geometry:1
3943 13:10:42.897988 ddr_geometry:1
3944 13:10:42.900923 High Freq DUMMY_READ_FOR_TRACKING: ON
3945 13:10:42.904036 ZQCS_ENABLE_LP4: OFF
3946 13:10:42.907572 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3947 13:10:42.910766 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3948 13:10:42.911150 SPM_CONTROL_AFTERK: ON
3949 13:10:42.914131 IMPEDANCE_TRACKING: ON
3950 13:10:42.914516 TEMP_SENSOR: ON
3951 13:10:42.917437 PER_BANK_REFRESH: ON
3952 13:10:42.917821 HW_SAVE_FOR_SR: ON
3953 13:10:42.920822 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3954 13:10:42.924033 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3955 13:10:42.927447 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3956 13:10:42.930760 Read ODT Tracking: ON
3957 13:10:42.934168 =========================
3958 13:10:42.934551
3959 13:10:42.934850 [TA2_TEST]
3960 13:10:42.935129 === TA2 HW
3961 13:10:42.940754 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3962 13:10:42.944026 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3963 13:10:42.950625 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3964 13:10:42.953898 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3965 13:10:42.954288
3966 13:10:42.957229 [MEM_TEST] 03: After run time config
3967 13:10:42.968896 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3968 13:10:42.972136 [complex_mem_test] start addr:0x40024000, len:131072
3969 13:10:43.176281 1st complex R/W mem test pass
3970 13:10:43.182528 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3971 13:10:43.185860 sync preloader write leveling
3972 13:10:43.189527 sync preloader cbt_mr12
3973 13:10:43.192930 sync preloader cbt_clk_dly
3974 13:10:43.193347 sync preloader cbt_cmd_dly
3975 13:10:43.196274 sync preloader cbt_cs
3976 13:10:43.199244 sync preloader cbt_ca_perbit_delay
3977 13:10:43.199691 sync preloader clk_delay
3978 13:10:43.202526 sync preloader dqs_delay
3979 13:10:43.206347 sync preloader u1Gating2T_Save
3980 13:10:43.209177 sync preloader u1Gating05T_Save
3981 13:10:43.212276 sync preloader u1Gatingfine_tune_Save
3982 13:10:43.215689 sync preloader u1Gatingucpass_count_Save
3983 13:10:43.219585 sync preloader u1TxWindowPerbitVref_Save
3984 13:10:43.222388 sync preloader u1TxCenter_min_Save
3985 13:10:43.225842 sync preloader u1TxCenter_max_Save
3986 13:10:43.229160 sync preloader u1Txwin_center_Save
3987 13:10:43.232281 sync preloader u1Txfirst_pass_Save
3988 13:10:43.235829 sync preloader u1Txlast_pass_Save
3989 13:10:43.238979 sync preloader u1RxDatlat_Save
3990 13:10:43.242287 sync preloader u1RxWinPerbitVref_Save
3991 13:10:43.245958 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3992 13:10:43.249249 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3993 13:10:43.252876 sync preloader delay_cell_unit
3994 13:10:43.259237 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3995 13:10:43.262880 sync preloader write leveling
3996 13:10:43.263263 sync preloader cbt_mr12
3997 13:10:43.265908 sync preloader cbt_clk_dly
3998 13:10:43.269225 sync preloader cbt_cmd_dly
3999 13:10:43.269611 sync preloader cbt_cs
4000 13:10:43.272644 sync preloader cbt_ca_perbit_delay
4001 13:10:43.276017 sync preloader clk_delay
4002 13:10:43.279318 sync preloader dqs_delay
4003 13:10:43.279700 sync preloader u1Gating2T_Save
4004 13:10:43.282623 sync preloader u1Gating05T_Save
4005 13:10:43.285868 sync preloader u1Gatingfine_tune_Save
4006 13:10:43.289075 sync preloader u1Gatingucpass_count_Save
4007 13:10:43.292318 sync preloader u1TxWindowPerbitVref_Save
4008 13:10:43.295589 sync preloader u1TxCenter_min_Save
4009 13:10:43.299635 sync preloader u1TxCenter_max_Save
4010 13:10:43.302597 sync preloader u1Txwin_center_Save
4011 13:10:43.305758 sync preloader u1Txfirst_pass_Save
4012 13:10:43.309221 sync preloader u1Txlast_pass_Save
4013 13:10:43.312485 sync preloader u1RxDatlat_Save
4014 13:10:43.315732 sync preloader u1RxWinPerbitVref_Save
4015 13:10:43.318922 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4016 13:10:43.322458 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4017 13:10:43.325499 sync preloader delay_cell_unit
4018 13:10:43.332273 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4019 13:10:43.335652 sync preloader write leveling
4020 13:10:43.339350 sync preloader cbt_mr12
4021 13:10:43.339732 sync preloader cbt_clk_dly
4022 13:10:43.342329 sync preloader cbt_cmd_dly
4023 13:10:43.346199 sync preloader cbt_cs
4024 13:10:43.349330 sync preloader cbt_ca_perbit_delay
4025 13:10:43.349715 sync preloader clk_delay
4026 13:10:43.352834 sync preloader dqs_delay
4027 13:10:43.355774 sync preloader u1Gating2T_Save
4028 13:10:43.359164 sync preloader u1Gating05T_Save
4029 13:10:43.362564 sync preloader u1Gatingfine_tune_Save
4030 13:10:43.365541 sync preloader u1Gatingucpass_count_Save
4031 13:10:43.368899 sync preloader u1TxWindowPerbitVref_Save
4032 13:10:43.372216 sync preloader u1TxCenter_min_Save
4033 13:10:43.375835 sync preloader u1TxCenter_max_Save
4034 13:10:43.378821 sync preloader u1Txwin_center_Save
4035 13:10:43.382284 sync preloader u1Txfirst_pass_Save
4036 13:10:43.385943 sync preloader u1Txlast_pass_Save
4037 13:10:43.386333 sync preloader u1RxDatlat_Save
4038 13:10:43.389296 sync preloader u1RxWinPerbitVref_Save
4039 13:10:43.395495 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4040 13:10:43.399219 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4041 13:10:43.402354 sync preloader delay_cell_unit
4042 13:10:43.405360 just_for_test_dump_coreboot_params dump all params
4043 13:10:43.408725 dump source = 0x0
4044 13:10:43.409118 dump params frequency:1600
4045 13:10:43.412566 dump params rank number:2
4046 13:10:43.412958
4047 13:10:43.415941 dump params write leveling
4048 13:10:43.419122 write leveling[0][0][0] = 0x21
4049 13:10:43.419511 write leveling[0][0][1] = 0x17
4050 13:10:43.422217 write leveling[0][1][0] = 0x1a
4051 13:10:43.425832 write leveling[0][1][1] = 0x18
4052 13:10:43.428748 write leveling[1][0][0] = 0x21
4053 13:10:43.432122 write leveling[1][0][1] = 0x19
4054 13:10:43.435743 write leveling[1][1][0] = 0x22
4055 13:10:43.436133 write leveling[1][1][1] = 0x18
4056 13:10:43.438830 dump params cbt_cs
4057 13:10:43.439217 cbt_cs[0][0] = 0x8
4058 13:10:43.442150 cbt_cs[0][1] = 0x8
4059 13:10:43.442535 cbt_cs[1][0] = 0xc
4060 13:10:43.445401 cbt_cs[1][1] = 0xc
4061 13:10:43.448843 dump params cbt_mr12
4062 13:10:43.449234 cbt_mr12[0][0] = 0x20
4063 13:10:43.452009 cbt_mr12[0][1] = 0x20
4064 13:10:43.452402 cbt_mr12[1][0] = 0x1e
4065 13:10:43.455352 cbt_mr12[1][1] = 0x1e
4066 13:10:43.458921 dump params tx window
4067 13:10:43.459300 tx_center_min[0][0][0] = 982
4068 13:10:43.462409 tx_center_max[0][0][0] = 989
4069 13:10:43.465593 tx_center_min[0][0][1] = 973
4070 13:10:43.469137 tx_center_max[0][0][1] = 980
4071 13:10:43.472200 tx_center_min[0][1][0] = 979
4072 13:10:43.472601 tx_center_max[0][1][0] = 985
4073 13:10:43.475453 tx_center_min[0][1][1] = 978
4074 13:10:43.479060 tx_center_max[0][1][1] = 985
4075 13:10:43.482290 tx_center_min[1][0][0] = 988
4076 13:10:43.482687 tx_center_max[1][0][0] = 993
4077 13:10:43.485590 tx_center_min[1][0][1] = 978
4078 13:10:43.488752 tx_center_max[1][0][1] = 985
4079 13:10:43.492033 tx_center_min[1][1][0] = 987
4080 13:10:43.495288 tx_center_max[1][1][0] = 991
4081 13:10:43.495678 tx_center_min[1][1][1] = 975
4082 13:10:43.498786 tx_center_max[1][1][1] = 981
4083 13:10:43.502047 dump params tx window
4084 13:10:43.505467 tx_win_center[0][0][0] = 989
4085 13:10:43.505850 tx_first_pass[0][0][0] = 977
4086 13:10:43.509096 tx_last_pass[0][0][0] = 1001
4087 13:10:43.511829 tx_win_center[0][0][1] = 988
4088 13:10:43.515543 tx_first_pass[0][0][1] = 976
4089 13:10:43.518745 tx_last_pass[0][0][1] = 1000
4090 13:10:43.519135 tx_win_center[0][0][2] = 988
4091 13:10:43.521793 tx_first_pass[0][0][2] = 977
4092 13:10:43.525156 tx_last_pass[0][0][2] = 1000
4093 13:10:43.528552 tx_win_center[0][0][3] = 982
4094 13:10:43.531832 tx_first_pass[0][0][3] = 970
4095 13:10:43.532217 tx_last_pass[0][0][3] = 994
4096 13:10:43.535061 tx_win_center[0][0][4] = 987
4097 13:10:43.538860 tx_first_pass[0][0][4] = 976
4098 13:10:43.541901 tx_last_pass[0][0][4] = 999
4099 13:10:43.542288 tx_win_center[0][0][5] = 985
4100 13:10:43.545390 tx_first_pass[0][0][5] = 974
4101 13:10:43.548925 tx_last_pass[0][0][5] = 997
4102 13:10:43.551979 tx_win_center[0][0][6] = 986
4103 13:10:43.552404 tx_first_pass[0][0][6] = 975
4104 13:10:43.555210 tx_last_pass[0][0][6] = 998
4105 13:10:43.558933 tx_win_center[0][0][7] = 987
4106 13:10:43.561980 tx_first_pass[0][0][7] = 976
4107 13:10:43.565118 tx_last_pass[0][0][7] = 999
4108 13:10:43.565508 tx_win_center[0][0][8] = 973
4109 13:10:43.568377 tx_first_pass[0][0][8] = 961
4110 13:10:43.571829 tx_last_pass[0][0][8] = 985
4111 13:10:43.575187 tx_win_center[0][0][9] = 977
4112 13:10:43.578296 tx_first_pass[0][0][9] = 965
4113 13:10:43.578704 tx_last_pass[0][0][9] = 989
4114 13:10:43.582073 tx_win_center[0][0][10] = 980
4115 13:10:43.584994 tx_first_pass[0][0][10] = 969
4116 13:10:43.588020 tx_last_pass[0][0][10] = 992
4117 13:10:43.588409 tx_win_center[0][0][11] = 975
4118 13:10:43.591427 tx_first_pass[0][0][11] = 964
4119 13:10:43.595391 tx_last_pass[0][0][11] = 987
4120 13:10:43.598119 tx_win_center[0][0][12] = 977
4121 13:10:43.601743 tx_first_pass[0][0][12] = 966
4122 13:10:43.604792 tx_last_pass[0][0][12] = 989
4123 13:10:43.605181 tx_win_center[0][0][13] = 977
4124 13:10:43.608277 tx_first_pass[0][0][13] = 966
4125 13:10:43.611425 tx_last_pass[0][0][13] = 989
4126 13:10:43.614712 tx_win_center[0][0][14] = 978
4127 13:10:43.618080 tx_first_pass[0][0][14] = 966
4128 13:10:43.618470 tx_last_pass[0][0][14] = 990
4129 13:10:43.621580 tx_win_center[0][0][15] = 980
4130 13:10:43.624517 tx_first_pass[0][0][15] = 968
4131 13:10:43.627837 tx_last_pass[0][0][15] = 992
4132 13:10:43.631684 tx_win_center[0][1][0] = 985
4133 13:10:43.632075 tx_first_pass[0][1][0] = 973
4134 13:10:43.634383 tx_last_pass[0][1][0] = 998
4135 13:10:43.638037 tx_win_center[0][1][1] = 984
4136 13:10:43.641742 tx_first_pass[0][1][1] = 972
4137 13:10:43.642275 tx_last_pass[0][1][1] = 996
4138 13:10:43.644544 tx_win_center[0][1][2] = 985
4139 13:10:43.647670 tx_first_pass[0][1][2] = 974
4140 13:10:43.650896 tx_last_pass[0][1][2] = 997
4141 13:10:43.654595 tx_win_center[0][1][3] = 979
4142 13:10:43.655107 tx_first_pass[0][1][3] = 967
4143 13:10:43.657826 tx_last_pass[0][1][3] = 991
4144 13:10:43.661139 tx_win_center[0][1][4] = 983
4145 13:10:43.664507 tx_first_pass[0][1][4] = 970
4146 13:10:43.664897 tx_last_pass[0][1][4] = 996
4147 13:10:43.667638 tx_win_center[0][1][5] = 981
4148 13:10:43.671594 tx_first_pass[0][1][5] = 969
4149 13:10:43.674893 tx_last_pass[0][1][5] = 993
4150 13:10:43.677697 tx_win_center[0][1][6] = 981
4151 13:10:43.678086 tx_first_pass[0][1][6] = 969
4152 13:10:43.681527 tx_last_pass[0][1][6] = 994
4153 13:10:43.684333 tx_win_center[0][1][7] = 983
4154 13:10:43.688156 tx_first_pass[0][1][7] = 970
4155 13:10:43.688574 tx_last_pass[0][1][7] = 996
4156 13:10:43.691679 tx_win_center[0][1][8] = 978
4157 13:10:43.695050 tx_first_pass[0][1][8] = 967
4158 13:10:43.697982 tx_last_pass[0][1][8] = 990
4159 13:10:43.701520 tx_win_center[0][1][9] = 979
4160 13:10:43.701911 tx_first_pass[0][1][9] = 968
4161 13:10:43.704827 tx_last_pass[0][1][9] = 991
4162 13:10:43.708052 tx_win_center[0][1][10] = 985
4163 13:10:43.711411 tx_first_pass[0][1][10] = 973
4164 13:10:43.711799 tx_last_pass[0][1][10] = 997
4165 13:10:43.714844 tx_win_center[0][1][11] = 978
4166 13:10:43.718029 tx_first_pass[0][1][11] = 967
4167 13:10:43.721403 tx_last_pass[0][1][11] = 990
4168 13:10:43.724767 tx_win_center[0][1][12] = 980
4169 13:10:43.725156 tx_first_pass[0][1][12] = 968
4170 13:10:43.728049 tx_last_pass[0][1][12] = 992
4171 13:10:43.731276 tx_win_center[0][1][13] = 980
4172 13:10:43.734900 tx_first_pass[0][1][13] = 969
4173 13:10:43.737912 tx_last_pass[0][1][13] = 991
4174 13:10:43.738366 tx_win_center[0][1][14] = 980
4175 13:10:43.741466 tx_first_pass[0][1][14] = 968
4176 13:10:43.744447 tx_last_pass[0][1][14] = 992
4177 13:10:43.748023 tx_win_center[0][1][15] = 983
4178 13:10:43.751054 tx_first_pass[0][1][15] = 971
4179 13:10:43.751444 tx_last_pass[0][1][15] = 996
4180 13:10:43.754334 tx_win_center[1][0][0] = 992
4181 13:10:43.758004 tx_first_pass[1][0][0] = 979
4182 13:10:43.761223 tx_last_pass[1][0][0] = 1006
4183 13:10:43.764789 tx_win_center[1][0][1] = 991
4184 13:10:43.765303 tx_first_pass[1][0][1] = 978
4185 13:10:43.768106 tx_last_pass[1][0][1] = 1004
4186 13:10:43.771425 tx_win_center[1][0][2] = 989
4187 13:10:43.774612 tx_first_pass[1][0][2] = 977
4188 13:10:43.778076 tx_last_pass[1][0][2] = 1001
4189 13:10:43.778577 tx_win_center[1][0][3] = 988
4190 13:10:43.781211 tx_first_pass[1][0][3] = 976
4191 13:10:43.784850 tx_last_pass[1][0][3] = 1000
4192 13:10:43.787854 tx_win_center[1][0][4] = 991
4193 13:10:43.788369 tx_first_pass[1][0][4] = 978
4194 13:10:43.791146 tx_last_pass[1][0][4] = 1005
4195 13:10:43.794361 tx_win_center[1][0][5] = 993
4196 13:10:43.797880 tx_first_pass[1][0][5] = 980
4197 13:10:43.801387 tx_last_pass[1][0][5] = 1006
4198 13:10:43.801778 tx_win_center[1][0][6] = 991
4199 13:10:43.804765 tx_first_pass[1][0][6] = 978
4200 13:10:43.807659 tx_last_pass[1][0][6] = 1005
4201 13:10:43.811690 tx_win_center[1][0][7] = 991
4202 13:10:43.814743 tx_first_pass[1][0][7] = 978
4203 13:10:43.815133 tx_last_pass[1][0][7] = 1004
4204 13:10:43.818010 tx_win_center[1][0][8] = 981
4205 13:10:43.821587 tx_first_pass[1][0][8] = 969
4206 13:10:43.824652 tx_last_pass[1][0][8] = 993
4207 13:10:43.825046 tx_win_center[1][0][9] = 981
4208 13:10:43.828106 tx_first_pass[1][0][9] = 970
4209 13:10:43.831261 tx_last_pass[1][0][9] = 992
4210 13:10:43.834519 tx_win_center[1][0][10] = 983
4211 13:10:43.837828 tx_first_pass[1][0][10] = 971
4212 13:10:43.838216 tx_last_pass[1][0][10] = 995
4213 13:10:43.841459 tx_win_center[1][0][11] = 984
4214 13:10:43.844678 tx_first_pass[1][0][11] = 972
4215 13:10:43.847858 tx_last_pass[1][0][11] = 996
4216 13:10:43.851209 tx_win_center[1][0][12] = 984
4217 13:10:43.851600 tx_first_pass[1][0][12] = 972
4218 13:10:43.854224 tx_last_pass[1][0][12] = 996
4219 13:10:43.857546 tx_win_center[1][0][13] = 985
4220 13:10:43.860956 tx_first_pass[1][0][13] = 974
4221 13:10:43.864122 tx_last_pass[1][0][13] = 996
4222 13:10:43.864539 tx_win_center[1][0][14] = 983
4223 13:10:43.868049 tx_first_pass[1][0][14] = 972
4224 13:10:43.871255 tx_last_pass[1][0][14] = 995
4225 13:10:43.874405 tx_win_center[1][0][15] = 978
4226 13:10:43.877480 tx_first_pass[1][0][15] = 967
4227 13:10:43.877869 tx_last_pass[1][0][15] = 990
4228 13:10:43.880839 tx_win_center[1][1][0] = 991
4229 13:10:43.884425 tx_first_pass[1][1][0] = 978
4230 13:10:43.887563 tx_last_pass[1][1][0] = 1005
4231 13:10:43.891091 tx_win_center[1][1][1] = 990
4232 13:10:43.891480 tx_first_pass[1][1][1] = 977
4233 13:10:43.894023 tx_last_pass[1][1][1] = 1003
4234 13:10:43.897429 tx_win_center[1][1][2] = 988
4235 13:10:43.901009 tx_first_pass[1][1][2] = 976
4236 13:10:43.904427 tx_last_pass[1][1][2] = 1001
4237 13:10:43.904856 tx_win_center[1][1][3] = 987
4238 13:10:43.907736 tx_first_pass[1][1][3] = 975
4239 13:10:43.911013 tx_last_pass[1][1][3] = 999
4240 13:10:43.914236 tx_win_center[1][1][4] = 990
4241 13:10:43.914627 tx_first_pass[1][1][4] = 978
4242 13:10:43.917444 tx_last_pass[1][1][4] = 1003
4243 13:10:43.920684 tx_win_center[1][1][5] = 991
4244 13:10:43.924034 tx_first_pass[1][1][5] = 978
4245 13:10:43.927447 tx_last_pass[1][1][5] = 1005
4246 13:10:43.927836 tx_win_center[1][1][6] = 991
4247 13:10:43.930726 tx_first_pass[1][1][6] = 978
4248 13:10:43.934151 tx_last_pass[1][1][6] = 1004
4249 13:10:43.937802 tx_win_center[1][1][7] = 990
4250 13:10:43.941208 tx_first_pass[1][1][7] = 978
4251 13:10:43.941597 tx_last_pass[1][1][7] = 1002
4252 13:10:43.944435 tx_win_center[1][1][8] = 979
4253 13:10:43.947727 tx_first_pass[1][1][8] = 967
4254 13:10:43.950752 tx_last_pass[1][1][8] = 991
4255 13:10:43.951144 tx_win_center[1][1][9] = 979
4256 13:10:43.954114 tx_first_pass[1][1][9] = 968
4257 13:10:43.957440 tx_last_pass[1][1][9] = 991
4258 13:10:43.960911 tx_win_center[1][1][10] = 981
4259 13:10:43.963934 tx_first_pass[1][1][10] = 969
4260 13:10:43.964342 tx_last_pass[1][1][10] = 993
4261 13:10:43.967692 tx_win_center[1][1][11] = 981
4262 13:10:43.970619 tx_first_pass[1][1][11] = 969
4263 13:10:43.973962 tx_last_pass[1][1][11] = 993
4264 13:10:43.977244 tx_win_center[1][1][12] = 981
4265 13:10:43.977633 tx_first_pass[1][1][12] = 970
4266 13:10:43.980592 tx_last_pass[1][1][12] = 993
4267 13:10:43.983818 tx_win_center[1][1][13] = 981
4268 13:10:43.987342 tx_first_pass[1][1][13] = 970
4269 13:10:43.990487 tx_last_pass[1][1][13] = 993
4270 13:10:43.990887 tx_win_center[1][1][14] = 980
4271 13:10:43.994246 tx_first_pass[1][1][14] = 969
4272 13:10:43.997480 tx_last_pass[1][1][14] = 992
4273 13:10:44.000594 tx_win_center[1][1][15] = 975
4274 13:10:44.004069 tx_first_pass[1][1][15] = 964
4275 13:10:44.004490 tx_last_pass[1][1][15] = 987
4276 13:10:44.007392 dump params rx window
4277 13:10:44.010869 rx_firspass[0][0][0] = 4
4278 13:10:44.011258 rx_lastpass[0][0][0] = 38
4279 13:10:44.014177 rx_firspass[0][0][1] = 5
4280 13:10:44.017196 rx_lastpass[0][0][1] = 37
4281 13:10:44.017585 rx_firspass[0][0][2] = 6
4282 13:10:44.020832 rx_lastpass[0][0][2] = 36
4283 13:10:44.024028 rx_firspass[0][0][3] = -2
4284 13:10:44.027142 rx_lastpass[0][0][3] = 31
4285 13:10:44.027532 rx_firspass[0][0][4] = 4
4286 13:10:44.030950 rx_lastpass[0][0][4] = 37
4287 13:10:44.034079 rx_firspass[0][0][5] = 1
4288 13:10:44.034468 rx_lastpass[0][0][5] = 32
4289 13:10:44.037567 rx_firspass[0][0][6] = 3
4290 13:10:44.040478 rx_lastpass[0][0][6] = 34
4291 13:10:44.043889 rx_firspass[0][0][7] = 5
4292 13:10:44.044278 rx_lastpass[0][0][7] = 36
4293 13:10:44.047165 rx_firspass[0][0][8] = -3
4294 13:10:44.050394 rx_lastpass[0][0][8] = 32
4295 13:10:44.050916 rx_firspass[0][0][9] = 0
4296 13:10:44.054207 rx_lastpass[0][0][9] = 32
4297 13:10:44.057740 rx_firspass[0][0][10] = 7
4298 13:10:44.058234 rx_lastpass[0][0][10] = 41
4299 13:10:44.060614 rx_firspass[0][0][11] = 1
4300 13:10:44.064320 rx_lastpass[0][0][11] = 32
4301 13:10:44.067686 rx_firspass[0][0][12] = 2
4302 13:10:44.068072 rx_lastpass[0][0][12] = 37
4303 13:10:44.070596 rx_firspass[0][0][13] = 3
4304 13:10:44.073835 rx_lastpass[0][0][13] = 33
4305 13:10:44.077657 rx_firspass[0][0][14] = 1
4306 13:10:44.078049 rx_lastpass[0][0][14] = 37
4307 13:10:44.080884 rx_firspass[0][0][15] = 5
4308 13:10:44.084030 rx_lastpass[0][0][15] = 37
4309 13:10:44.084418 rx_firspass[0][1][0] = 6
4310 13:10:44.087321 rx_lastpass[0][1][0] = 40
4311 13:10:44.090627 rx_firspass[0][1][1] = 5
4312 13:10:44.093960 rx_lastpass[0][1][1] = 38
4313 13:10:44.094378 rx_firspass[0][1][2] = 6
4314 13:10:44.097302 rx_lastpass[0][1][2] = 38
4315 13:10:44.100594 rx_firspass[0][1][3] = -2
4316 13:10:44.100984 rx_lastpass[0][1][3] = 33
4317 13:10:44.103669 rx_firspass[0][1][4] = 5
4318 13:10:44.107308 rx_lastpass[0][1][4] = 39
4319 13:10:44.107697 rx_firspass[0][1][5] = 1
4320 13:10:44.111084 rx_lastpass[0][1][5] = 34
4321 13:10:44.114116 rx_firspass[0][1][6] = 3
4322 13:10:44.117358 rx_lastpass[0][1][6] = 37
4323 13:10:44.117745 rx_firspass[0][1][7] = 3
4324 13:10:44.120397 rx_lastpass[0][1][7] = 38
4325 13:10:44.124033 rx_firspass[0][1][8] = -2
4326 13:10:44.124541 rx_lastpass[0][1][8] = 32
4327 13:10:44.127318 rx_firspass[0][1][9] = 1
4328 13:10:44.130608 rx_lastpass[0][1][9] = 36
4329 13:10:44.131009 rx_firspass[0][1][10] = 7
4330 13:10:44.134106 rx_lastpass[0][1][10] = 43
4331 13:10:44.137412 rx_firspass[0][1][11] = -2
4332 13:10:44.140596 rx_lastpass[0][1][11] = 34
4333 13:10:44.140985 rx_firspass[0][1][12] = 1
4334 13:10:44.144155 rx_lastpass[0][1][12] = 37
4335 13:10:44.147325 rx_firspass[0][1][13] = 1
4336 13:10:44.150824 rx_lastpass[0][1][13] = 35
4337 13:10:44.151212 rx_firspass[0][1][14] = 2
4338 13:10:44.153796 rx_lastpass[0][1][14] = 38
4339 13:10:44.157155 rx_firspass[0][1][15] = 6
4340 13:10:44.157429 rx_lastpass[0][1][15] = 39
4341 13:10:44.160403 rx_firspass[1][0][0] = 5
4342 13:10:44.163738 rx_lastpass[1][0][0] = 39
4343 13:10:44.167194 rx_firspass[1][0][1] = 5
4344 13:10:44.167402 rx_lastpass[1][0][1] = 38
4345 13:10:44.170248 rx_firspass[1][0][2] = 2
4346 13:10:44.173881 rx_lastpass[1][0][2] = 35
4347 13:10:44.174089 rx_firspass[1][0][3] = 0
4348 13:10:44.176919 rx_lastpass[1][0][3] = 33
4349 13:10:44.180670 rx_firspass[1][0][4] = 5
4350 13:10:44.180933 rx_lastpass[1][0][4] = 38
4351 13:10:44.183907 rx_firspass[1][0][5] = 7
4352 13:10:44.187186 rx_lastpass[1][0][5] = 39
4353 13:10:44.190470 rx_firspass[1][0][6] = 7
4354 13:10:44.190734 rx_lastpass[1][0][6] = 39
4355 13:10:44.193755 rx_firspass[1][0][7] = 5
4356 13:10:44.197137 rx_lastpass[1][0][7] = 38
4357 13:10:44.197392 rx_firspass[1][0][8] = 1
4358 13:10:44.200541 rx_lastpass[1][0][8] = 33
4359 13:10:44.203980 rx_firspass[1][0][9] = 1
4360 13:10:44.204308 rx_lastpass[1][0][9] = 32
4361 13:10:44.207448 rx_firspass[1][0][10] = 5
4362 13:10:44.210619 rx_lastpass[1][0][10] = 35
4363 13:10:44.213880 rx_firspass[1][0][11] = 5
4364 13:10:44.214268 rx_lastpass[1][0][11] = 38
4365 13:10:44.217268 rx_firspass[1][0][12] = 6
4366 13:10:44.220487 rx_lastpass[1][0][12] = 38
4367 13:10:44.223976 rx_firspass[1][0][13] = 6
4368 13:10:44.224543 rx_lastpass[1][0][13] = 37
4369 13:10:44.227259 rx_firspass[1][0][14] = 7
4370 13:10:44.230559 rx_lastpass[1][0][14] = 38
4371 13:10:44.231113 rx_firspass[1][0][15] = -3
4372 13:10:44.233588 rx_lastpass[1][0][15] = 30
4373 13:10:44.237016 rx_firspass[1][1][0] = 3
4374 13:10:44.240367 rx_lastpass[1][1][0] = 40
4375 13:10:44.240782 rx_firspass[1][1][1] = 4
4376 13:10:44.243683 rx_lastpass[1][1][1] = 39
4377 13:10:44.247303 rx_firspass[1][1][2] = 1
4378 13:10:44.247941 rx_lastpass[1][1][2] = 36
4379 13:10:44.250537 rx_firspass[1][1][3] = -2
4380 13:10:44.253893 rx_lastpass[1][1][3] = 34
4381 13:10:44.256912 rx_firspass[1][1][4] = 4
4382 13:10:44.257302 rx_lastpass[1][1][4] = 39
4383 13:10:44.260407 rx_firspass[1][1][5] = 5
4384 13:10:44.263512 rx_lastpass[1][1][5] = 40
4385 13:10:44.263890 rx_firspass[1][1][6] = 5
4386 13:10:44.266854 rx_lastpass[1][1][6] = 41
4387 13:10:44.270530 rx_firspass[1][1][7] = 3
4388 13:10:44.270915 rx_lastpass[1][1][7] = 38
4389 13:10:44.273653 rx_firspass[1][1][8] = 0
4390 13:10:44.277115 rx_lastpass[1][1][8] = 35
4391 13:10:44.280243 rx_firspass[1][1][9] = -1
4392 13:10:44.280739 rx_lastpass[1][1][9] = 34
4393 13:10:44.283484 rx_firspass[1][1][10] = 4
4394 13:10:44.287022 rx_lastpass[1][1][10] = 39
4395 13:10:44.287553 rx_firspass[1][1][11] = 4
4396 13:10:44.290061 rx_lastpass[1][1][11] = 40
4397 13:10:44.293554 rx_firspass[1][1][12] = 4
4398 13:10:44.296549 rx_lastpass[1][1][12] = 40
4399 13:10:44.296945 rx_firspass[1][1][13] = 4
4400 13:10:44.300358 rx_lastpass[1][1][13] = 40
4401 13:10:44.303379 rx_firspass[1][1][14] = 5
4402 13:10:44.306703 rx_lastpass[1][1][14] = 40
4403 13:10:44.307134 rx_firspass[1][1][15] = -3
4404 13:10:44.310043 rx_lastpass[1][1][15] = 31
4405 13:10:44.313106 dump params clk_delay
4406 13:10:44.313494 clk_delay[0] = 1
4407 13:10:44.316288 clk_delay[1] = 0
4408 13:10:44.316734 dump params dqs_delay
4409 13:10:44.320181 dqs_delay[0][0] = -2
4410 13:10:44.320648 dqs_delay[0][1] = 0
4411 13:10:44.322889 dqs_delay[1][0] = 0
4412 13:10:44.323277 dqs_delay[1][1] = 0
4413 13:10:44.326244 dump params delay_cell_unit = 735
4414 13:10:44.329817 dump source = 0x0
4415 13:10:44.333364 dump params frequency:1200
4416 13:10:44.333747 dump params rank number:2
4417 13:10:44.334046
4418 13:10:44.336310 dump params write leveling
4419 13:10:44.339428 write leveling[0][0][0] = 0x0
4420 13:10:44.343117 write leveling[0][0][1] = 0x0
4421 13:10:44.343501 write leveling[0][1][0] = 0x0
4422 13:10:44.346358 write leveling[0][1][1] = 0x0
4423 13:10:44.349773 write leveling[1][0][0] = 0x0
4424 13:10:44.353135 write leveling[1][0][1] = 0x0
4425 13:10:44.356557 write leveling[1][1][0] = 0x0
4426 13:10:44.356943 write leveling[1][1][1] = 0x0
4427 13:10:44.359533 dump params cbt_cs
4428 13:10:44.363033 cbt_cs[0][0] = 0x0
4429 13:10:44.363415 cbt_cs[0][1] = 0x0
4430 13:10:44.366294 cbt_cs[1][0] = 0x0
4431 13:10:44.366680 cbt_cs[1][1] = 0x0
4432 13:10:44.369753 dump params cbt_mr12
4433 13:10:44.370138 cbt_mr12[0][0] = 0x0
4434 13:10:44.372982 cbt_mr12[0][1] = 0x0
4435 13:10:44.373481 cbt_mr12[1][0] = 0x0
4436 13:10:44.376479 cbt_mr12[1][1] = 0x0
4437 13:10:44.379670 dump params tx window
4438 13:10:44.380175 tx_center_min[0][0][0] = 0
4439 13:10:44.382760 tx_center_max[0][0][0] = 0
4440 13:10:44.386442 tx_center_min[0][0][1] = 0
4441 13:10:44.386826 tx_center_max[0][0][1] = 0
4442 13:10:44.389851 tx_center_min[0][1][0] = 0
4443 13:10:44.393054 tx_center_max[0][1][0] = 0
4444 13:10:44.396147 tx_center_min[0][1][1] = 0
4445 13:10:44.396557 tx_center_max[0][1][1] = 0
4446 13:10:44.399707 tx_center_min[1][0][0] = 0
4447 13:10:44.403226 tx_center_max[1][0][0] = 0
4448 13:10:44.406106 tx_center_min[1][0][1] = 0
4449 13:10:44.406491 tx_center_max[1][0][1] = 0
4450 13:10:44.409768 tx_center_min[1][1][0] = 0
4451 13:10:44.412894 tx_center_max[1][1][0] = 0
4452 13:10:44.416230 tx_center_min[1][1][1] = 0
4453 13:10:44.416669 tx_center_max[1][1][1] = 0
4454 13:10:44.419968 dump params tx window
4455 13:10:44.423025 tx_win_center[0][0][0] = 0
4456 13:10:44.423411 tx_first_pass[0][0][0] = 0
4457 13:10:44.426526 tx_last_pass[0][0][0] = 0
4458 13:10:44.429439 tx_win_center[0][0][1] = 0
4459 13:10:44.432685 tx_first_pass[0][0][1] = 0
4460 13:10:44.433075 tx_last_pass[0][0][1] = 0
4461 13:10:44.436523 tx_win_center[0][0][2] = 0
4462 13:10:44.439480 tx_first_pass[0][0][2] = 0
4463 13:10:44.439862 tx_last_pass[0][0][2] = 0
4464 13:10:44.442788 tx_win_center[0][0][3] = 0
4465 13:10:44.446171 tx_first_pass[0][0][3] = 0
4466 13:10:44.449730 tx_last_pass[0][0][3] = 0
4467 13:10:44.450116 tx_win_center[0][0][4] = 0
4468 13:10:44.452976 tx_first_pass[0][0][4] = 0
4469 13:10:44.456094 tx_last_pass[0][0][4] = 0
4470 13:10:44.456621 tx_win_center[0][0][5] = 0
4471 13:10:44.459484 tx_first_pass[0][0][5] = 0
4472 13:10:44.463022 tx_last_pass[0][0][5] = 0
4473 13:10:44.466180 tx_win_center[0][0][6] = 0
4474 13:10:44.466566 tx_first_pass[0][0][6] = 0
4475 13:10:44.469745 tx_last_pass[0][0][6] = 0
4476 13:10:44.472944 tx_win_center[0][0][7] = 0
4477 13:10:44.476421 tx_first_pass[0][0][7] = 0
4478 13:10:44.476971 tx_last_pass[0][0][7] = 0
4479 13:10:44.479586 tx_win_center[0][0][8] = 0
4480 13:10:44.482848 tx_first_pass[0][0][8] = 0
4481 13:10:44.483233 tx_last_pass[0][0][8] = 0
4482 13:10:44.485981 tx_win_center[0][0][9] = 0
4483 13:10:44.489476 tx_first_pass[0][0][9] = 0
4484 13:10:44.492703 tx_last_pass[0][0][9] = 0
4485 13:10:44.493089 tx_win_center[0][0][10] = 0
4486 13:10:44.495979 tx_first_pass[0][0][10] = 0
4487 13:10:44.499248 tx_last_pass[0][0][10] = 0
4488 13:10:44.502539 tx_win_center[0][0][11] = 0
4489 13:10:44.502927 tx_first_pass[0][0][11] = 0
4490 13:10:44.505835 tx_last_pass[0][0][11] = 0
4491 13:10:44.509045 tx_win_center[0][0][12] = 0
4492 13:10:44.512272 tx_first_pass[0][0][12] = 0
4493 13:10:44.512687 tx_last_pass[0][0][12] = 0
4494 13:10:44.515872 tx_win_center[0][0][13] = 0
4495 13:10:44.519378 tx_first_pass[0][0][13] = 0
4496 13:10:44.522681 tx_last_pass[0][0][13] = 0
4497 13:10:44.523202 tx_win_center[0][0][14] = 0
4498 13:10:44.525875 tx_first_pass[0][0][14] = 0
4499 13:10:44.529251 tx_last_pass[0][0][14] = 0
4500 13:10:44.532556 tx_win_center[0][0][15] = 0
4501 13:10:44.533047 tx_first_pass[0][0][15] = 0
4502 13:10:44.535907 tx_last_pass[0][0][15] = 0
4503 13:10:44.539005 tx_win_center[0][1][0] = 0
4504 13:10:44.542526 tx_first_pass[0][1][0] = 0
4505 13:10:44.542907 tx_last_pass[0][1][0] = 0
4506 13:10:44.546135 tx_win_center[0][1][1] = 0
4507 13:10:44.549383 tx_first_pass[0][1][1] = 0
4508 13:10:44.552152 tx_last_pass[0][1][1] = 0
4509 13:10:44.552423 tx_win_center[0][1][2] = 0
4510 13:10:44.555902 tx_first_pass[0][1][2] = 0
4511 13:10:44.559042 tx_last_pass[0][1][2] = 0
4512 13:10:44.559334 tx_win_center[0][1][3] = 0
4513 13:10:44.562175 tx_first_pass[0][1][3] = 0
4514 13:10:44.565587 tx_last_pass[0][1][3] = 0
4515 13:10:44.568776 tx_win_center[0][1][4] = 0
4516 13:10:44.569049 tx_first_pass[0][1][4] = 0
4517 13:10:44.572023 tx_last_pass[0][1][4] = 0
4518 13:10:44.575525 tx_win_center[0][1][5] = 0
4519 13:10:44.579166 tx_first_pass[0][1][5] = 0
4520 13:10:44.579436 tx_last_pass[0][1][5] = 0
4521 13:10:44.582794 tx_win_center[0][1][6] = 0
4522 13:10:44.585862 tx_first_pass[0][1][6] = 0
4523 13:10:44.586132 tx_last_pass[0][1][6] = 0
4524 13:10:44.589042 tx_win_center[0][1][7] = 0
4525 13:10:44.592513 tx_first_pass[0][1][7] = 0
4526 13:10:44.596009 tx_last_pass[0][1][7] = 0
4527 13:10:44.596387 tx_win_center[0][1][8] = 0
4528 13:10:44.598989 tx_first_pass[0][1][8] = 0
4529 13:10:44.602647 tx_last_pass[0][1][8] = 0
4530 13:10:44.605748 tx_win_center[0][1][9] = 0
4531 13:10:44.606129 tx_first_pass[0][1][9] = 0
4532 13:10:44.609043 tx_last_pass[0][1][9] = 0
4533 13:10:44.612341 tx_win_center[0][1][10] = 0
4534 13:10:44.615877 tx_first_pass[0][1][10] = 0
4535 13:10:44.616257 tx_last_pass[0][1][10] = 0
4536 13:10:44.618968 tx_win_center[0][1][11] = 0
4537 13:10:44.622215 tx_first_pass[0][1][11] = 0
4538 13:10:44.622598 tx_last_pass[0][1][11] = 0
4539 13:10:44.625593 tx_win_center[0][1][12] = 0
4540 13:10:44.629138 tx_first_pass[0][1][12] = 0
4541 13:10:44.632323 tx_last_pass[0][1][12] = 0
4542 13:10:44.635793 tx_win_center[0][1][13] = 0
4543 13:10:44.636178 tx_first_pass[0][1][13] = 0
4544 13:10:44.639306 tx_last_pass[0][1][13] = 0
4545 13:10:44.642411 tx_win_center[0][1][14] = 0
4546 13:10:44.645853 tx_first_pass[0][1][14] = 0
4547 13:10:44.646237 tx_last_pass[0][1][14] = 0
4548 13:10:44.648902 tx_win_center[0][1][15] = 0
4549 13:10:44.652363 tx_first_pass[0][1][15] = 0
4550 13:10:44.655614 tx_last_pass[0][1][15] = 0
4551 13:10:44.656000 tx_win_center[1][0][0] = 0
4552 13:10:44.658694 tx_first_pass[1][0][0] = 0
4553 13:10:44.662108 tx_last_pass[1][0][0] = 0
4554 13:10:44.662493 tx_win_center[1][0][1] = 0
4555 13:10:44.665759 tx_first_pass[1][0][1] = 0
4556 13:10:44.669096 tx_last_pass[1][0][1] = 0
4557 13:10:44.672266 tx_win_center[1][0][2] = 0
4558 13:10:44.672684 tx_first_pass[1][0][2] = 0
4559 13:10:44.675508 tx_last_pass[1][0][2] = 0
4560 13:10:44.678965 tx_win_center[1][0][3] = 0
4561 13:10:44.682100 tx_first_pass[1][0][3] = 0
4562 13:10:44.682485 tx_last_pass[1][0][3] = 0
4563 13:10:44.685541 tx_win_center[1][0][4] = 0
4564 13:10:44.688773 tx_first_pass[1][0][4] = 0
4565 13:10:44.689160 tx_last_pass[1][0][4] = 0
4566 13:10:44.692133 tx_win_center[1][0][5] = 0
4567 13:10:44.695308 tx_first_pass[1][0][5] = 0
4568 13:10:44.698653 tx_last_pass[1][0][5] = 0
4569 13:10:44.699036 tx_win_center[1][0][6] = 0
4570 13:10:44.702098 tx_first_pass[1][0][6] = 0
4571 13:10:44.705722 tx_last_pass[1][0][6] = 0
4572 13:10:44.708390 tx_win_center[1][0][7] = 0
4573 13:10:44.708819 tx_first_pass[1][0][7] = 0
4574 13:10:44.712050 tx_last_pass[1][0][7] = 0
4575 13:10:44.715327 tx_win_center[1][0][8] = 0
4576 13:10:44.715853 tx_first_pass[1][0][8] = 0
4577 13:10:44.718706 tx_last_pass[1][0][8] = 0
4578 13:10:44.722201 tx_win_center[1][0][9] = 0
4579 13:10:44.725213 tx_first_pass[1][0][9] = 0
4580 13:10:44.725605 tx_last_pass[1][0][9] = 0
4581 13:10:44.728429 tx_win_center[1][0][10] = 0
4582 13:10:44.732140 tx_first_pass[1][0][10] = 0
4583 13:10:44.735428 tx_last_pass[1][0][10] = 0
4584 13:10:44.735814 tx_win_center[1][0][11] = 0
4585 13:10:44.738853 tx_first_pass[1][0][11] = 0
4586 13:10:44.741737 tx_last_pass[1][0][11] = 0
4587 13:10:44.745083 tx_win_center[1][0][12] = 0
4588 13:10:44.745469 tx_first_pass[1][0][12] = 0
4589 13:10:44.748546 tx_last_pass[1][0][12] = 0
4590 13:10:44.751794 tx_win_center[1][0][13] = 0
4591 13:10:44.755188 tx_first_pass[1][0][13] = 0
4592 13:10:44.755575 tx_last_pass[1][0][13] = 0
4593 13:10:44.758310 tx_win_center[1][0][14] = 0
4594 13:10:44.761880 tx_first_pass[1][0][14] = 0
4595 13:10:44.765297 tx_last_pass[1][0][14] = 0
4596 13:10:44.765682 tx_win_center[1][0][15] = 0
4597 13:10:44.768384 tx_first_pass[1][0][15] = 0
4598 13:10:44.771600 tx_last_pass[1][0][15] = 0
4599 13:10:44.775209 tx_win_center[1][1][0] = 0
4600 13:10:44.775701 tx_first_pass[1][1][0] = 0
4601 13:10:44.778781 tx_last_pass[1][1][0] = 0
4602 13:10:44.781993 tx_win_center[1][1][1] = 0
4603 13:10:44.782378 tx_first_pass[1][1][1] = 0
4604 13:10:44.785264 tx_last_pass[1][1][1] = 0
4605 13:10:44.788328 tx_win_center[1][1][2] = 0
4606 13:10:44.791781 tx_first_pass[1][1][2] = 0
4607 13:10:44.792167 tx_last_pass[1][1][2] = 0
4608 13:10:44.794822 tx_win_center[1][1][3] = 0
4609 13:10:44.798302 tx_first_pass[1][1][3] = 0
4610 13:10:44.801549 tx_last_pass[1][1][3] = 0
4611 13:10:44.801932 tx_win_center[1][1][4] = 0
4612 13:10:44.805550 tx_first_pass[1][1][4] = 0
4613 13:10:44.808364 tx_last_pass[1][1][4] = 0
4614 13:10:44.808821 tx_win_center[1][1][5] = 0
4615 13:10:44.811632 tx_first_pass[1][1][5] = 0
4616 13:10:44.815145 tx_last_pass[1][1][5] = 0
4617 13:10:44.818389 tx_win_center[1][1][6] = 0
4618 13:10:44.818772 tx_first_pass[1][1][6] = 0
4619 13:10:44.821723 tx_last_pass[1][1][6] = 0
4620 13:10:44.825348 tx_win_center[1][1][7] = 0
4621 13:10:44.828388 tx_first_pass[1][1][7] = 0
4622 13:10:44.828823 tx_last_pass[1][1][7] = 0
4623 13:10:44.831605 tx_win_center[1][1][8] = 0
4624 13:10:44.835042 tx_first_pass[1][1][8] = 0
4625 13:10:44.835428 tx_last_pass[1][1][8] = 0
4626 13:10:44.838223 tx_win_center[1][1][9] = 0
4627 13:10:44.841880 tx_first_pass[1][1][9] = 0
4628 13:10:44.845098 tx_last_pass[1][1][9] = 0
4629 13:10:44.845485 tx_win_center[1][1][10] = 0
4630 13:10:44.848571 tx_first_pass[1][1][10] = 0
4631 13:10:44.851651 tx_last_pass[1][1][10] = 0
4632 13:10:44.854838 tx_win_center[1][1][11] = 0
4633 13:10:44.855223 tx_first_pass[1][1][11] = 0
4634 13:10:44.858652 tx_last_pass[1][1][11] = 0
4635 13:10:44.862037 tx_win_center[1][1][12] = 0
4636 13:10:44.865135 tx_first_pass[1][1][12] = 0
4637 13:10:44.865520 tx_last_pass[1][1][12] = 0
4638 13:10:44.868212 tx_win_center[1][1][13] = 0
4639 13:10:44.872126 tx_first_pass[1][1][13] = 0
4640 13:10:44.874979 tx_last_pass[1][1][13] = 0
4641 13:10:44.875367 tx_win_center[1][1][14] = 0
4642 13:10:44.878106 tx_first_pass[1][1][14] = 0
4643 13:10:44.881480 tx_last_pass[1][1][14] = 0
4644 13:10:44.884838 tx_win_center[1][1][15] = 0
4645 13:10:44.885223 tx_first_pass[1][1][15] = 0
4646 13:10:44.887989 tx_last_pass[1][1][15] = 0
4647 13:10:44.891365 dump params rx window
4648 13:10:44.891706 rx_firspass[0][0][0] = 0
4649 13:10:44.894647 rx_lastpass[0][0][0] = 0
4650 13:10:44.898457 rx_firspass[0][0][1] = 0
4651 13:10:44.901627 rx_lastpass[0][0][1] = 0
4652 13:10:44.902007 rx_firspass[0][0][2] = 0
4653 13:10:44.904663 rx_lastpass[0][0][2] = 0
4654 13:10:44.908030 rx_firspass[0][0][3] = 0
4655 13:10:44.908419 rx_lastpass[0][0][3] = 0
4656 13:10:44.911518 rx_firspass[0][0][4] = 0
4657 13:10:44.914687 rx_lastpass[0][0][4] = 0
4658 13:10:44.915068 rx_firspass[0][0][5] = 0
4659 13:10:44.917836 rx_lastpass[0][0][5] = 0
4660 13:10:44.921205 rx_firspass[0][0][6] = 0
4661 13:10:44.921585 rx_lastpass[0][0][6] = 0
4662 13:10:44.924965 rx_firspass[0][0][7] = 0
4663 13:10:44.928144 rx_lastpass[0][0][7] = 0
4664 13:10:44.928566 rx_firspass[0][0][8] = 0
4665 13:10:44.931688 rx_lastpass[0][0][8] = 0
4666 13:10:44.934644 rx_firspass[0][0][9] = 0
4667 13:10:44.935028 rx_lastpass[0][0][9] = 0
4668 13:10:44.938364 rx_firspass[0][0][10] = 0
4669 13:10:44.941749 rx_lastpass[0][0][10] = 0
4670 13:10:44.944909 rx_firspass[0][0][11] = 0
4671 13:10:44.945292 rx_lastpass[0][0][11] = 0
4672 13:10:44.948160 rx_firspass[0][0][12] = 0
4673 13:10:44.951485 rx_lastpass[0][0][12] = 0
4674 13:10:44.951865 rx_firspass[0][0][13] = 0
4675 13:10:44.954789 rx_lastpass[0][0][13] = 0
4676 13:10:44.958021 rx_firspass[0][0][14] = 0
4677 13:10:44.961507 rx_lastpass[0][0][14] = 0
4678 13:10:44.961888 rx_firspass[0][0][15] = 0
4679 13:10:44.964711 rx_lastpass[0][0][15] = 0
4680 13:10:44.968187 rx_firspass[0][1][0] = 0
4681 13:10:44.968610 rx_lastpass[0][1][0] = 0
4682 13:10:44.971430 rx_firspass[0][1][1] = 0
4683 13:10:44.974582 rx_lastpass[0][1][1] = 0
4684 13:10:44.974965 rx_firspass[0][1][2] = 0
4685 13:10:44.977934 rx_lastpass[0][1][2] = 0
4686 13:10:44.981239 rx_firspass[0][1][3] = 0
4687 13:10:44.984570 rx_lastpass[0][1][3] = 0
4688 13:10:44.984958 rx_firspass[0][1][4] = 0
4689 13:10:44.988096 rx_lastpass[0][1][4] = 0
4690 13:10:44.991358 rx_firspass[0][1][5] = 0
4691 13:10:44.991745 rx_lastpass[0][1][5] = 0
4692 13:10:44.994533 rx_firspass[0][1][6] = 0
4693 13:10:44.997765 rx_lastpass[0][1][6] = 0
4694 13:10:44.998190 rx_firspass[0][1][7] = 0
4695 13:10:45.001096 rx_lastpass[0][1][7] = 0
4696 13:10:45.004496 rx_firspass[0][1][8] = 0
4697 13:10:45.004981 rx_lastpass[0][1][8] = 0
4698 13:10:45.007986 rx_firspass[0][1][9] = 0
4699 13:10:45.011218 rx_lastpass[0][1][9] = 0
4700 13:10:45.011736 rx_firspass[0][1][10] = 0
4701 13:10:45.014570 rx_lastpass[0][1][10] = 0
4702 13:10:45.017952 rx_firspass[0][1][11] = 0
4703 13:10:45.021246 rx_lastpass[0][1][11] = 0
4704 13:10:45.021692 rx_firspass[0][1][12] = 0
4705 13:10:45.024831 rx_lastpass[0][1][12] = 0
4706 13:10:45.027698 rx_firspass[0][1][13] = 0
4707 13:10:45.028092 rx_lastpass[0][1][13] = 0
4708 13:10:45.031153 rx_firspass[0][1][14] = 0
4709 13:10:45.034583 rx_lastpass[0][1][14] = 0
4710 13:10:45.038059 rx_firspass[0][1][15] = 0
4711 13:10:45.038440 rx_lastpass[0][1][15] = 0
4712 13:10:45.041318 rx_firspass[1][0][0] = 0
4713 13:10:45.044559 rx_lastpass[1][0][0] = 0
4714 13:10:45.044938 rx_firspass[1][0][1] = 0
4715 13:10:45.047928 rx_lastpass[1][0][1] = 0
4716 13:10:45.051271 rx_firspass[1][0][2] = 0
4717 13:10:45.051653 rx_lastpass[1][0][2] = 0
4718 13:10:45.054489 rx_firspass[1][0][3] = 0
4719 13:10:45.058081 rx_lastpass[1][0][3] = 0
4720 13:10:45.058465 rx_firspass[1][0][4] = 0
4721 13:10:45.061386 rx_lastpass[1][0][4] = 0
4722 13:10:45.064548 rx_firspass[1][0][5] = 0
4723 13:10:45.067790 rx_lastpass[1][0][5] = 0
4724 13:10:45.068179 rx_firspass[1][0][6] = 0
4725 13:10:45.071086 rx_lastpass[1][0][6] = 0
4726 13:10:45.074456 rx_firspass[1][0][7] = 0
4727 13:10:45.074843 rx_lastpass[1][0][7] = 0
4728 13:10:45.077787 rx_firspass[1][0][8] = 0
4729 13:10:45.081100 rx_lastpass[1][0][8] = 0
4730 13:10:45.081490 rx_firspass[1][0][9] = 0
4731 13:10:45.084866 rx_lastpass[1][0][9] = 0
4732 13:10:45.088149 rx_firspass[1][0][10] = 0
4733 13:10:45.088563 rx_lastpass[1][0][10] = 0
4734 13:10:45.091007 rx_firspass[1][0][11] = 0
4735 13:10:45.094342 rx_lastpass[1][0][11] = 0
4736 13:10:45.097774 rx_firspass[1][0][12] = 0
4737 13:10:45.098160 rx_lastpass[1][0][12] = 0
4738 13:10:45.101090 rx_firspass[1][0][13] = 0
4739 13:10:45.104274 rx_lastpass[1][0][13] = 0
4740 13:10:45.104689 rx_firspass[1][0][14] = 0
4741 13:10:45.108110 rx_lastpass[1][0][14] = 0
4742 13:10:45.110889 rx_firspass[1][0][15] = 0
4743 13:10:45.114291 rx_lastpass[1][0][15] = 0
4744 13:10:45.114677 rx_firspass[1][1][0] = 0
4745 13:10:45.117625 rx_lastpass[1][1][0] = 0
4746 13:10:45.120907 rx_firspass[1][1][1] = 0
4747 13:10:45.121295 rx_lastpass[1][1][1] = 0
4748 13:10:45.124361 rx_firspass[1][1][2] = 0
4749 13:10:45.127801 rx_lastpass[1][1][2] = 0
4750 13:10:45.128189 rx_firspass[1][1][3] = 0
4751 13:10:45.131299 rx_lastpass[1][1][3] = 0
4752 13:10:45.134343 rx_firspass[1][1][4] = 0
4753 13:10:45.134727 rx_lastpass[1][1][4] = 0
4754 13:10:45.138155 rx_firspass[1][1][5] = 0
4755 13:10:45.141338 rx_lastpass[1][1][5] = 0
4756 13:10:45.141718 rx_firspass[1][1][6] = 0
4757 13:10:45.144306 rx_lastpass[1][1][6] = 0
4758 13:10:45.147978 rx_firspass[1][1][7] = 0
4759 13:10:45.151094 rx_lastpass[1][1][7] = 0
4760 13:10:45.151472 rx_firspass[1][1][8] = 0
4761 13:10:45.154320 rx_lastpass[1][1][8] = 0
4762 13:10:45.157559 rx_firspass[1][1][9] = 0
4763 13:10:45.157951 rx_lastpass[1][1][9] = 0
4764 13:10:45.161108 rx_firspass[1][1][10] = 0
4765 13:10:45.164281 rx_lastpass[1][1][10] = 0
4766 13:10:45.164699 rx_firspass[1][1][11] = 0
4767 13:10:45.167714 rx_lastpass[1][1][11] = 0
4768 13:10:45.170832 rx_firspass[1][1][12] = 0
4769 13:10:45.174237 rx_lastpass[1][1][12] = 0
4770 13:10:45.174616 rx_firspass[1][1][13] = 0
4771 13:10:45.177456 rx_lastpass[1][1][13] = 0
4772 13:10:45.180733 rx_firspass[1][1][14] = 0
4773 13:10:45.181110 rx_lastpass[1][1][14] = 0
4774 13:10:45.184194 rx_firspass[1][1][15] = 0
4775 13:10:45.187279 rx_lastpass[1][1][15] = 0
4776 13:10:45.187656 dump params clk_delay
4777 13:10:45.190488 clk_delay[0] = 0
4778 13:10:45.190867 clk_delay[1] = 0
4779 13:10:45.194055 dump params dqs_delay
4780 13:10:45.197151 dqs_delay[0][0] = 0
4781 13:10:45.197533 dqs_delay[0][1] = 0
4782 13:10:45.200492 dqs_delay[1][0] = 0
4783 13:10:45.200882 dqs_delay[1][1] = 0
4784 13:10:45.203836 dump params delay_cell_unit = 735
4785 13:10:45.207644 dump source = 0x0
4786 13:10:45.208033 dump params frequency:800
4787 13:10:45.211023 dump params rank number:2
4788 13:10:45.211408
4789 13:10:45.214059 dump params write leveling
4790 13:10:45.217203 write leveling[0][0][0] = 0x0
4791 13:10:45.217592 write leveling[0][0][1] = 0x0
4792 13:10:45.220438 write leveling[0][1][0] = 0x0
4793 13:10:45.224171 write leveling[0][1][1] = 0x0
4794 13:10:45.227468 write leveling[1][0][0] = 0x0
4795 13:10:45.230402 write leveling[1][0][1] = 0x0
4796 13:10:45.230878 write leveling[1][1][0] = 0x0
4797 13:10:45.234309 write leveling[1][1][1] = 0x0
4798 13:10:45.237393 dump params cbt_cs
4799 13:10:45.237781 cbt_cs[0][0] = 0x0
4800 13:10:45.240777 cbt_cs[0][1] = 0x0
4801 13:10:45.241165 cbt_cs[1][0] = 0x0
4802 13:10:45.243711 cbt_cs[1][1] = 0x0
4803 13:10:45.244094 dump params cbt_mr12
4804 13:10:45.247090 cbt_mr12[0][0] = 0x0
4805 13:10:45.250580 cbt_mr12[0][1] = 0x0
4806 13:10:45.250964 cbt_mr12[1][0] = 0x0
4807 13:10:45.254096 cbt_mr12[1][1] = 0x0
4808 13:10:45.254517 dump params tx window
4809 13:10:45.257016 tx_center_min[0][0][0] = 0
4810 13:10:45.260575 tx_center_max[0][0][0] = 0
4811 13:10:45.260958 tx_center_min[0][0][1] = 0
4812 13:10:45.263756 tx_center_max[0][0][1] = 0
4813 13:10:45.267259 tx_center_min[0][1][0] = 0
4814 13:10:45.270670 tx_center_max[0][1][0] = 0
4815 13:10:45.271052 tx_center_min[0][1][1] = 0
4816 13:10:45.273881 tx_center_max[0][1][1] = 0
4817 13:10:45.277407 tx_center_min[1][0][0] = 0
4818 13:10:45.280351 tx_center_max[1][0][0] = 0
4819 13:10:45.280762 tx_center_min[1][0][1] = 0
4820 13:10:45.283982 tx_center_max[1][0][1] = 0
4821 13:10:45.287066 tx_center_min[1][1][0] = 0
4822 13:10:45.290454 tx_center_max[1][1][0] = 0
4823 13:10:45.290895 tx_center_min[1][1][1] = 0
4824 13:10:45.293956 tx_center_max[1][1][1] = 0
4825 13:10:45.296886 dump params tx window
4826 13:10:45.297278 tx_win_center[0][0][0] = 0
4827 13:10:45.300268 tx_first_pass[0][0][0] = 0
4828 13:10:45.303539 tx_last_pass[0][0][0] = 0
4829 13:10:45.307387 tx_win_center[0][0][1] = 0
4830 13:10:45.307777 tx_first_pass[0][0][1] = 0
4831 13:10:45.310655 tx_last_pass[0][0][1] = 0
4832 13:10:45.313448 tx_win_center[0][0][2] = 0
4833 13:10:45.313845 tx_first_pass[0][0][2] = 0
4834 13:10:45.317430 tx_last_pass[0][0][2] = 0
4835 13:10:45.320095 tx_win_center[0][0][3] = 0
4836 13:10:45.323506 tx_first_pass[0][0][3] = 0
4837 13:10:45.323894 tx_last_pass[0][0][3] = 0
4838 13:10:45.327171 tx_win_center[0][0][4] = 0
4839 13:10:45.330184 tx_first_pass[0][0][4] = 0
4840 13:10:45.333439 tx_last_pass[0][0][4] = 0
4841 13:10:45.333835 tx_win_center[0][0][5] = 0
4842 13:10:45.337010 tx_first_pass[0][0][5] = 0
4843 13:10:45.340424 tx_last_pass[0][0][5] = 0
4844 13:10:45.340878 tx_win_center[0][0][6] = 0
4845 13:10:45.343943 tx_first_pass[0][0][6] = 0
4846 13:10:45.347221 tx_last_pass[0][0][6] = 0
4847 13:10:45.350314 tx_win_center[0][0][7] = 0
4848 13:10:45.350730 tx_first_pass[0][0][7] = 0
4849 13:10:45.353264 tx_last_pass[0][0][7] = 0
4850 13:10:45.356746 tx_win_center[0][0][8] = 0
4851 13:10:45.360295 tx_first_pass[0][0][8] = 0
4852 13:10:45.360716 tx_last_pass[0][0][8] = 0
4853 13:10:45.363386 tx_win_center[0][0][9] = 0
4854 13:10:45.366635 tx_first_pass[0][0][9] = 0
4855 13:10:45.367033 tx_last_pass[0][0][9] = 0
4856 13:10:45.370440 tx_win_center[0][0][10] = 0
4857 13:10:45.373522 tx_first_pass[0][0][10] = 0
4858 13:10:45.376962 tx_last_pass[0][0][10] = 0
4859 13:10:45.377358 tx_win_center[0][0][11] = 0
4860 13:10:45.380302 tx_first_pass[0][0][11] = 0
4861 13:10:45.383763 tx_last_pass[0][0][11] = 0
4862 13:10:45.386934 tx_win_center[0][0][12] = 0
4863 13:10:45.387328 tx_first_pass[0][0][12] = 0
4864 13:10:45.390056 tx_last_pass[0][0][12] = 0
4865 13:10:45.393585 tx_win_center[0][0][13] = 0
4866 13:10:45.396996 tx_first_pass[0][0][13] = 0
4867 13:10:45.397399 tx_last_pass[0][0][13] = 0
4868 13:10:45.400281 tx_win_center[0][0][14] = 0
4869 13:10:45.403526 tx_first_pass[0][0][14] = 0
4870 13:10:45.406730 tx_last_pass[0][0][14] = 0
4871 13:10:45.407220 tx_win_center[0][0][15] = 0
4872 13:10:45.410223 tx_first_pass[0][0][15] = 0
4873 13:10:45.413132 tx_last_pass[0][0][15] = 0
4874 13:10:45.416900 tx_win_center[0][1][0] = 0
4875 13:10:45.417297 tx_first_pass[0][1][0] = 0
4876 13:10:45.420200 tx_last_pass[0][1][0] = 0
4877 13:10:45.423576 tx_win_center[0][1][1] = 0
4878 13:10:45.426897 tx_first_pass[0][1][1] = 0
4879 13:10:45.427293 tx_last_pass[0][1][1] = 0
4880 13:10:45.430114 tx_win_center[0][1][2] = 0
4881 13:10:45.433443 tx_first_pass[0][1][2] = 0
4882 13:10:45.436932 tx_last_pass[0][1][2] = 0
4883 13:10:45.437495 tx_win_center[0][1][3] = 0
4884 13:10:45.440178 tx_first_pass[0][1][3] = 0
4885 13:10:45.443369 tx_last_pass[0][1][3] = 0
4886 13:10:45.443799 tx_win_center[0][1][4] = 0
4887 13:10:45.446483 tx_first_pass[0][1][4] = 0
4888 13:10:45.450479 tx_last_pass[0][1][4] = 0
4889 13:10:45.453651 tx_win_center[0][1][5] = 0
4890 13:10:45.454047 tx_first_pass[0][1][5] = 0
4891 13:10:45.456774 tx_last_pass[0][1][5] = 0
4892 13:10:45.460072 tx_win_center[0][1][6] = 0
4893 13:10:45.460502 tx_first_pass[0][1][6] = 0
4894 13:10:45.463535 tx_last_pass[0][1][6] = 0
4895 13:10:45.466538 tx_win_center[0][1][7] = 0
4896 13:10:45.470111 tx_first_pass[0][1][7] = 0
4897 13:10:45.470510 tx_last_pass[0][1][7] = 0
4898 13:10:45.473417 tx_win_center[0][1][8] = 0
4899 13:10:45.476760 tx_first_pass[0][1][8] = 0
4900 13:10:45.479666 tx_last_pass[0][1][8] = 0
4901 13:10:45.480063 tx_win_center[0][1][9] = 0
4902 13:10:45.483480 tx_first_pass[0][1][9] = 0
4903 13:10:45.486804 tx_last_pass[0][1][9] = 0
4904 13:10:45.487198 tx_win_center[0][1][10] = 0
4905 13:10:45.490123 tx_first_pass[0][1][10] = 0
4906 13:10:45.493441 tx_last_pass[0][1][10] = 0
4907 13:10:45.496425 tx_win_center[0][1][11] = 0
4908 13:10:45.499845 tx_first_pass[0][1][11] = 0
4909 13:10:45.500240 tx_last_pass[0][1][11] = 0
4910 13:10:45.503035 tx_win_center[0][1][12] = 0
4911 13:10:45.506435 tx_first_pass[0][1][12] = 0
4912 13:10:45.506830 tx_last_pass[0][1][12] = 0
4913 13:10:45.509996 tx_win_center[0][1][13] = 0
4914 13:10:45.513333 tx_first_pass[0][1][13] = 0
4915 13:10:45.516890 tx_last_pass[0][1][13] = 0
4916 13:10:45.517305 tx_win_center[0][1][14] = 0
4917 13:10:45.519892 tx_first_pass[0][1][14] = 0
4918 13:10:45.523169 tx_last_pass[0][1][14] = 0
4919 13:10:45.526472 tx_win_center[0][1][15] = 0
4920 13:10:45.529647 tx_first_pass[0][1][15] = 0
4921 13:10:45.530043 tx_last_pass[0][1][15] = 0
4922 13:10:45.533691 tx_win_center[1][0][0] = 0
4923 13:10:45.536340 tx_first_pass[1][0][0] = 0
4924 13:10:45.536787 tx_last_pass[1][0][0] = 0
4925 13:10:45.539991 tx_win_center[1][0][1] = 0
4926 13:10:45.543315 tx_first_pass[1][0][1] = 0
4927 13:10:45.546900 tx_last_pass[1][0][1] = 0
4928 13:10:45.547324 tx_win_center[1][0][2] = 0
4929 13:10:45.549651 tx_first_pass[1][0][2] = 0
4930 13:10:45.553566 tx_last_pass[1][0][2] = 0
4931 13:10:45.553963 tx_win_center[1][0][3] = 0
4932 13:10:45.556568 tx_first_pass[1][0][3] = 0
4933 13:10:45.560080 tx_last_pass[1][0][3] = 0
4934 13:10:45.563141 tx_win_center[1][0][4] = 0
4935 13:10:45.563534 tx_first_pass[1][0][4] = 0
4936 13:10:45.566801 tx_last_pass[1][0][4] = 0
4937 13:10:45.570173 tx_win_center[1][0][5] = 0
4938 13:10:45.573251 tx_first_pass[1][0][5] = 0
4939 13:10:45.573649 tx_last_pass[1][0][5] = 0
4940 13:10:45.576950 tx_win_center[1][0][6] = 0
4941 13:10:45.580199 tx_first_pass[1][0][6] = 0
4942 13:10:45.580627 tx_last_pass[1][0][6] = 0
4943 13:10:45.583102 tx_win_center[1][0][7] = 0
4944 13:10:45.586616 tx_first_pass[1][0][7] = 0
4945 13:10:45.589866 tx_last_pass[1][0][7] = 0
4946 13:10:45.590265 tx_win_center[1][0][8] = 0
4947 13:10:45.593343 tx_first_pass[1][0][8] = 0
4948 13:10:45.596394 tx_last_pass[1][0][8] = 0
4949 13:10:45.600208 tx_win_center[1][0][9] = 0
4950 13:10:45.600641 tx_first_pass[1][0][9] = 0
4951 13:10:45.603089 tx_last_pass[1][0][9] = 0
4952 13:10:45.606770 tx_win_center[1][0][10] = 0
4953 13:10:45.607167 tx_first_pass[1][0][10] = 0
4954 13:10:45.609728 tx_last_pass[1][0][10] = 0
4955 13:10:45.612964 tx_win_center[1][0][11] = 0
4956 13:10:45.616222 tx_first_pass[1][0][11] = 0
4957 13:10:45.616669 tx_last_pass[1][0][11] = 0
4958 13:10:45.620202 tx_win_center[1][0][12] = 0
4959 13:10:45.623410 tx_first_pass[1][0][12] = 0
4960 13:10:45.626756 tx_last_pass[1][0][12] = 0
4961 13:10:45.627155 tx_win_center[1][0][13] = 0
4962 13:10:45.630146 tx_first_pass[1][0][13] = 0
4963 13:10:45.632984 tx_last_pass[1][0][13] = 0
4964 13:10:45.636631 tx_win_center[1][0][14] = 0
4965 13:10:45.639743 tx_first_pass[1][0][14] = 0
4966 13:10:45.640125 tx_last_pass[1][0][14] = 0
4967 13:10:45.643087 tx_win_center[1][0][15] = 0
4968 13:10:45.646227 tx_first_pass[1][0][15] = 0
4969 13:10:45.649437 tx_last_pass[1][0][15] = 0
4970 13:10:45.649825 tx_win_center[1][1][0] = 0
4971 13:10:45.652744 tx_first_pass[1][1][0] = 0
4972 13:10:45.656283 tx_last_pass[1][1][0] = 0
4973 13:10:45.656712 tx_win_center[1][1][1] = 0
4974 13:10:45.659473 tx_first_pass[1][1][1] = 0
4975 13:10:45.663094 tx_last_pass[1][1][1] = 0
4976 13:10:45.666529 tx_win_center[1][1][2] = 0
4977 13:10:45.666919 tx_first_pass[1][1][2] = 0
4978 13:10:45.669698 tx_last_pass[1][1][2] = 0
4979 13:10:45.673047 tx_win_center[1][1][3] = 0
4980 13:10:45.673435 tx_first_pass[1][1][3] = 0
4981 13:10:45.676547 tx_last_pass[1][1][3] = 0
4982 13:10:45.679605 tx_win_center[1][1][4] = 0
4983 13:10:45.682854 tx_first_pass[1][1][4] = 0
4984 13:10:45.683242 tx_last_pass[1][1][4] = 0
4985 13:10:45.686199 tx_win_center[1][1][5] = 0
4986 13:10:45.689540 tx_first_pass[1][1][5] = 0
4987 13:10:45.692908 tx_last_pass[1][1][5] = 0
4988 13:10:45.693299 tx_win_center[1][1][6] = 0
4989 13:10:45.696095 tx_first_pass[1][1][6] = 0
4990 13:10:45.699410 tx_last_pass[1][1][6] = 0
4991 13:10:45.699796 tx_win_center[1][1][7] = 0
4992 13:10:45.702962 tx_first_pass[1][1][7] = 0
4993 13:10:45.706100 tx_last_pass[1][1][7] = 0
4994 13:10:45.709555 tx_win_center[1][1][8] = 0
4995 13:10:45.709943 tx_first_pass[1][1][8] = 0
4996 13:10:45.712737 tx_last_pass[1][1][8] = 0
4997 13:10:45.715932 tx_win_center[1][1][9] = 0
4998 13:10:45.719669 tx_first_pass[1][1][9] = 0
4999 13:10:45.720057 tx_last_pass[1][1][9] = 0
5000 13:10:45.722622 tx_win_center[1][1][10] = 0
5001 13:10:45.726056 tx_first_pass[1][1][10] = 0
5002 13:10:45.729445 tx_last_pass[1][1][10] = 0
5003 13:10:45.729832 tx_win_center[1][1][11] = 0
5004 13:10:45.732678 tx_first_pass[1][1][11] = 0
5005 13:10:45.736046 tx_last_pass[1][1][11] = 0
5006 13:10:45.739398 tx_win_center[1][1][12] = 0
5007 13:10:45.739788 tx_first_pass[1][1][12] = 0
5008 13:10:45.742868 tx_last_pass[1][1][12] = 0
5009 13:10:45.745950 tx_win_center[1][1][13] = 0
5010 13:10:45.749353 tx_first_pass[1][1][13] = 0
5011 13:10:45.749739 tx_last_pass[1][1][13] = 0
5012 13:10:45.752499 tx_win_center[1][1][14] = 0
5013 13:10:45.756183 tx_first_pass[1][1][14] = 0
5014 13:10:45.759347 tx_last_pass[1][1][14] = 0
5015 13:10:45.759737 tx_win_center[1][1][15] = 0
5016 13:10:45.762520 tx_first_pass[1][1][15] = 0
5017 13:10:45.766042 tx_last_pass[1][1][15] = 0
5018 13:10:45.766496 dump params rx window
5019 13:10:45.769169 rx_firspass[0][0][0] = 0
5020 13:10:45.772425 rx_lastpass[0][0][0] = 0
5021 13:10:45.772840 rx_firspass[0][0][1] = 0
5022 13:10:45.776233 rx_lastpass[0][0][1] = 0
5023 13:10:45.779238 rx_firspass[0][0][2] = 0
5024 13:10:45.782584 rx_lastpass[0][0][2] = 0
5025 13:10:45.782970 rx_firspass[0][0][3] = 0
5026 13:10:45.785794 rx_lastpass[0][0][3] = 0
5027 13:10:45.789357 rx_firspass[0][0][4] = 0
5028 13:10:45.789744 rx_lastpass[0][0][4] = 0
5029 13:10:45.792553 rx_firspass[0][0][5] = 0
5030 13:10:45.795980 rx_lastpass[0][0][5] = 0
5031 13:10:45.796364 rx_firspass[0][0][6] = 0
5032 13:10:45.799343 rx_lastpass[0][0][6] = 0
5033 13:10:45.802942 rx_firspass[0][0][7] = 0
5034 13:10:45.803337 rx_lastpass[0][0][7] = 0
5035 13:10:45.805881 rx_firspass[0][0][8] = 0
5036 13:10:45.809230 rx_lastpass[0][0][8] = 0
5037 13:10:45.809618 rx_firspass[0][0][9] = 0
5038 13:10:45.812579 rx_lastpass[0][0][9] = 0
5039 13:10:45.815865 rx_firspass[0][0][10] = 0
5040 13:10:45.819283 rx_lastpass[0][0][10] = 0
5041 13:10:45.819674 rx_firspass[0][0][11] = 0
5042 13:10:45.822639 rx_lastpass[0][0][11] = 0
5043 13:10:45.825992 rx_firspass[0][0][12] = 0
5044 13:10:45.826380 rx_lastpass[0][0][12] = 0
5045 13:10:45.829108 rx_firspass[0][0][13] = 0
5046 13:10:45.832509 rx_lastpass[0][0][13] = 0
5047 13:10:45.835831 rx_firspass[0][0][14] = 0
5048 13:10:45.836220 rx_lastpass[0][0][14] = 0
5049 13:10:45.839200 rx_firspass[0][0][15] = 0
5050 13:10:45.843124 rx_lastpass[0][0][15] = 0
5051 13:10:45.843514 rx_firspass[0][1][0] = 0
5052 13:10:45.846248 rx_lastpass[0][1][0] = 0
5053 13:10:45.849550 rx_firspass[0][1][1] = 0
5054 13:10:45.849938 rx_lastpass[0][1][1] = 0
5055 13:10:45.852741 rx_firspass[0][1][2] = 0
5056 13:10:45.856126 rx_lastpass[0][1][2] = 0
5057 13:10:45.856555 rx_firspass[0][1][3] = 0
5058 13:10:45.859730 rx_lastpass[0][1][3] = 0
5059 13:10:45.862815 rx_firspass[0][1][4] = 0
5060 13:10:45.863204 rx_lastpass[0][1][4] = 0
5061 13:10:45.866082 rx_firspass[0][1][5] = 0
5062 13:10:45.869472 rx_lastpass[0][1][5] = 0
5063 13:10:45.872547 rx_firspass[0][1][6] = 0
5064 13:10:45.872938 rx_lastpass[0][1][6] = 0
5065 13:10:45.876003 rx_firspass[0][1][7] = 0
5066 13:10:45.879094 rx_lastpass[0][1][7] = 0
5067 13:10:45.879480 rx_firspass[0][1][8] = 0
5068 13:10:45.882716 rx_lastpass[0][1][8] = 0
5069 13:10:45.886000 rx_firspass[0][1][9] = 0
5070 13:10:45.886388 rx_lastpass[0][1][9] = 0
5071 13:10:45.889312 rx_firspass[0][1][10] = 0
5072 13:10:45.892290 rx_lastpass[0][1][10] = 0
5073 13:10:45.892720 rx_firspass[0][1][11] = 0
5074 13:10:45.895657 rx_lastpass[0][1][11] = 0
5075 13:10:45.899113 rx_firspass[0][1][12] = 0
5076 13:10:45.902293 rx_lastpass[0][1][12] = 0
5077 13:10:45.902692 rx_firspass[0][1][13] = 0
5078 13:10:45.906046 rx_lastpass[0][1][13] = 0
5079 13:10:45.909125 rx_firspass[0][1][14] = 0
5080 13:10:45.912380 rx_lastpass[0][1][14] = 0
5081 13:10:45.912808 rx_firspass[0][1][15] = 0
5082 13:10:45.915664 rx_lastpass[0][1][15] = 0
5083 13:10:45.919071 rx_firspass[1][0][0] = 0
5084 13:10:45.919460 rx_lastpass[1][0][0] = 0
5085 13:10:45.922651 rx_firspass[1][0][1] = 0
5086 13:10:45.926012 rx_lastpass[1][0][1] = 0
5087 13:10:45.926397 rx_firspass[1][0][2] = 0
5088 13:10:45.929240 rx_lastpass[1][0][2] = 0
5089 13:10:45.932798 rx_firspass[1][0][3] = 0
5090 13:10:45.933188 rx_lastpass[1][0][3] = 0
5091 13:10:45.936063 rx_firspass[1][0][4] = 0
5092 13:10:45.939616 rx_lastpass[1][0][4] = 0
5093 13:10:45.940005 rx_firspass[1][0][5] = 0
5094 13:10:45.942806 rx_lastpass[1][0][5] = 0
5095 13:10:45.946078 rx_firspass[1][0][6] = 0
5096 13:10:45.949471 rx_lastpass[1][0][6] = 0
5097 13:10:45.949857 rx_firspass[1][0][7] = 0
5098 13:10:45.952488 rx_lastpass[1][0][7] = 0
5099 13:10:45.955886 rx_firspass[1][0][8] = 0
5100 13:10:45.956276 rx_lastpass[1][0][8] = 0
5101 13:10:45.959248 rx_firspass[1][0][9] = 0
5102 13:10:45.962495 rx_lastpass[1][0][9] = 0
5103 13:10:45.962879 rx_firspass[1][0][10] = 0
5104 13:10:45.965881 rx_lastpass[1][0][10] = 0
5105 13:10:45.969104 rx_firspass[1][0][11] = 0
5106 13:10:45.969491 rx_lastpass[1][0][11] = 0
5107 13:10:45.972736 rx_firspass[1][0][12] = 0
5108 13:10:45.976026 rx_lastpass[1][0][12] = 0
5109 13:10:45.978992 rx_firspass[1][0][13] = 0
5110 13:10:45.979380 rx_lastpass[1][0][13] = 0
5111 13:10:45.982626 rx_firspass[1][0][14] = 0
5112 13:10:45.985885 rx_lastpass[1][0][14] = 0
5113 13:10:45.986274 rx_firspass[1][0][15] = 0
5114 13:10:45.989200 rx_lastpass[1][0][15] = 0
5115 13:10:45.992311 rx_firspass[1][1][0] = 0
5116 13:10:45.995665 rx_lastpass[1][1][0] = 0
5117 13:10:45.996050 rx_firspass[1][1][1] = 0
5118 13:10:45.998908 rx_lastpass[1][1][1] = 0
5119 13:10:46.002142 rx_firspass[1][1][2] = 0
5120 13:10:46.002649 rx_lastpass[1][1][2] = 0
5121 13:10:46.005533 rx_firspass[1][1][3] = 0
5122 13:10:46.008977 rx_lastpass[1][1][3] = 0
5123 13:10:46.009363 rx_firspass[1][1][4] = 0
5124 13:10:46.012069 rx_lastpass[1][1][4] = 0
5125 13:10:46.015477 rx_firspass[1][1][5] = 0
5126 13:10:46.015865 rx_lastpass[1][1][5] = 0
5127 13:10:46.019085 rx_firspass[1][1][6] = 0
5128 13:10:46.022678 rx_lastpass[1][1][6] = 0
5129 13:10:46.023065 rx_firspass[1][1][7] = 0
5130 13:10:46.025938 rx_lastpass[1][1][7] = 0
5131 13:10:46.028808 rx_firspass[1][1][8] = 0
5132 13:10:46.032099 rx_lastpass[1][1][8] = 0
5133 13:10:46.032518 rx_firspass[1][1][9] = 0
5134 13:10:46.035233 rx_lastpass[1][1][9] = 0
5135 13:10:46.038775 rx_firspass[1][1][10] = 0
5136 13:10:46.039162 rx_lastpass[1][1][10] = 0
5137 13:10:46.041867 rx_firspass[1][1][11] = 0
5138 13:10:46.045237 rx_lastpass[1][1][11] = 0
5139 13:10:46.048567 rx_firspass[1][1][12] = 0
5140 13:10:46.048958 rx_lastpass[1][1][12] = 0
5141 13:10:46.052098 rx_firspass[1][1][13] = 0
5142 13:10:46.055460 rx_lastpass[1][1][13] = 0
5143 13:10:46.055846 rx_firspass[1][1][14] = 0
5144 13:10:46.058658 rx_lastpass[1][1][14] = 0
5145 13:10:46.062508 rx_firspass[1][1][15] = 0
5146 13:10:46.062898 rx_lastpass[1][1][15] = 0
5147 13:10:46.065773 dump params clk_delay
5148 13:10:46.069226 clk_delay[0] = 0
5149 13:10:46.069611 clk_delay[1] = 0
5150 13:10:46.072393 dump params dqs_delay
5151 13:10:46.072809 dqs_delay[0][0] = 0
5152 13:10:46.075450 dqs_delay[0][1] = 0
5153 13:10:46.075839 dqs_delay[1][0] = 0
5154 13:10:46.078760 dqs_delay[1][1] = 0
5155 13:10:46.082137 dump params delay_cell_unit = 735
5156 13:10:46.082526 mt_set_emi_preloader end
5157 13:10:46.088488 [mt_mem_init] dram size: 0x100000000, rank number: 2
5158 13:10:46.091766 [complex_mem_test] start addr:0x40000000, len:20480
5159 13:10:46.129110 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5160 13:10:46.135917 [complex_mem_test] start addr:0x80000000, len:20480
5161 13:10:46.171709 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5162 13:10:46.178296 [complex_mem_test] start addr:0xc0000000, len:20480
5163 13:10:46.213636 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5164 13:10:46.220337 [complex_mem_test] start addr:0x56000000, len:8192
5165 13:10:46.237177 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5166 13:10:46.237561 ddr_geometry:1
5167 13:10:46.243615 [complex_mem_test] start addr:0x80000000, len:8192
5168 13:10:46.260977 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5169 13:10:46.264223 dram_init: dram init end (result: 0)
5170 13:10:46.270813 Successfully loaded DRAM blobs and ran DRAM calibration
5171 13:10:46.280791 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5172 13:10:46.281183 CBMEM:
5173 13:10:46.284552 IMD: root @ 00000000fffff000 254 entries.
5174 13:10:46.288561 IMD: root @ 00000000ffffec00 62 entries.
5175 13:10:46.294213 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5176 13:10:46.300970 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5177 13:10:46.303975 in-header: 03 a1 00 00 08 00 00 00
5178 13:10:46.307090 in-data: 84 60 60 10 00 00 00 00
5179 13:10:46.310511 Chrome EC: clear events_b mask to 0x0000000020004000
5180 13:10:46.317941 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5181 13:10:46.321377 in-header: 03 fd 00 00 00 00 00 00
5182 13:10:46.321766 in-data:
5183 13:10:46.327863 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5184 13:10:46.328254 CBFS @ 21000 size 3d4000
5185 13:10:46.335019 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5186 13:10:46.338155 CBFS: Locating 'fallback/ramstage'
5187 13:10:46.341365 CBFS: Found @ offset 10d40 size d563
5188 13:10:46.362894 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5189 13:10:46.374608 Accumulated console time in romstage 13627 ms
5190 13:10:46.375002
5191 13:10:46.375369
5192 13:10:46.385128 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5193 13:10:46.388070 ARM64: Exception handlers installed.
5194 13:10:46.388767 ARM64: Testing exception
5195 13:10:46.391497 ARM64: Done test exception
5196 13:10:46.394439 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5197 13:10:46.398165 Manufacturer: ef
5198 13:10:46.401145 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5199 13:10:46.407713 WARNING: RO_VPD is uninitialized or empty.
5200 13:10:46.411333 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5201 13:10:46.414543 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5202 13:10:46.424882 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5203 13:10:46.427832 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5204 13:10:46.434807 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5205 13:10:46.435233 Enumerating buses...
5206 13:10:46.441337 Show all devs... Before device enumeration.
5207 13:10:46.441729 Root Device: enabled 1
5208 13:10:46.444534 CPU_CLUSTER: 0: enabled 1
5209 13:10:46.444925 CPU: 00: enabled 1
5210 13:10:46.447578 Compare with tree...
5211 13:10:46.451568 Root Device: enabled 1
5212 13:10:46.451959 CPU_CLUSTER: 0: enabled 1
5213 13:10:46.454603 CPU: 00: enabled 1
5214 13:10:46.457966 Root Device scanning...
5215 13:10:46.458355 root_dev_scan_bus for Root Device
5216 13:10:46.461287 CPU_CLUSTER: 0 enabled
5217 13:10:46.464731 root_dev_scan_bus for Root Device done
5218 13:10:46.471356 scan_bus: scanning of bus Root Device took 10689 usecs
5219 13:10:46.471746 done
5220 13:10:46.474636 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5221 13:10:46.477915 Allocating resources...
5222 13:10:46.478301 Reading resources...
5223 13:10:46.481271 Root Device read_resources bus 0 link: 0
5224 13:10:46.488117 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5225 13:10:46.488551 CPU: 00 missing read_resources
5226 13:10:46.494692 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5227 13:10:46.497864 Root Device read_resources bus 0 link: 0 done
5228 13:10:46.500850 Done reading resources.
5229 13:10:46.504666 Show resources in subtree (Root Device)...After reading.
5230 13:10:46.507710 Root Device child on link 0 CPU_CLUSTER: 0
5231 13:10:46.511074 CPU_CLUSTER: 0 child on link 0 CPU: 00
5232 13:10:46.520887 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5233 13:10:46.521280 CPU: 00
5234 13:10:46.524485 Setting resources...
5235 13:10:46.527430 Root Device assign_resources, bus 0 link: 0
5236 13:10:46.530829 CPU_CLUSTER: 0 missing set_resources
5237 13:10:46.534299 Root Device assign_resources, bus 0 link: 0
5238 13:10:46.537373 Done setting resources.
5239 13:10:46.543934 Show resources in subtree (Root Device)...After assigning values.
5240 13:10:46.547332 Root Device child on link 0 CPU_CLUSTER: 0
5241 13:10:46.550753 CPU_CLUSTER: 0 child on link 0 CPU: 00
5242 13:10:46.560719 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5243 13:10:46.561249 CPU: 00
5244 13:10:46.563802 Done allocating resources.
5245 13:10:46.567417 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5246 13:10:46.571007 Enabling resources...
5247 13:10:46.571397 done.
5248 13:10:46.574306 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5249 13:10:46.577592 Initializing devices...
5250 13:10:46.578100 Root Device init ...
5251 13:10:46.580450 mainboard_init: Starting display init.
5252 13:10:46.583676 ADC[4]: Raw value=76102 ID=0
5253 13:10:46.607167 anx7625_power_on_init: Init interface.
5254 13:10:46.610799 anx7625_disable_pd_protocol: Disabled PD feature.
5255 13:10:46.617143 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5256 13:10:46.663748 anx7625_start_dp_work: Secure OCM version=00
5257 13:10:46.667310 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5258 13:10:46.684355 sp_tx_get_edid_block: EDID Block = 1
5259 13:10:46.801321 Extracted contents:
5260 13:10:46.804570 header: 00 ff ff ff ff ff ff 00
5261 13:10:46.807742 serial number: 06 af 5c 14 00 00 00 00 00 1a
5262 13:10:46.811124 version: 01 04
5263 13:10:46.814268 basic params: 95 1a 0e 78 02
5264 13:10:46.818127 chroma info: 99 85 95 55 56 92 28 22 50 54
5265 13:10:46.821205 established: 00 00 00
5266 13:10:46.827588 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5267 13:10:46.830978 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5268 13:10:46.837624 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5269 13:10:46.844678 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5270 13:10:46.850803 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5271 13:10:46.854402 extensions: 00
5272 13:10:46.854504 checksum: ae
5273 13:10:46.854572
5274 13:10:46.857755 Manufacturer: AUO Model 145c Serial Number 0
5275 13:10:46.860914 Made week 0 of 2016
5276 13:10:46.861002 EDID version: 1.4
5277 13:10:46.864436 Digital display
5278 13:10:46.867832 6 bits per primary color channel
5279 13:10:46.867939 DisplayPort interface
5280 13:10:46.871054 Maximum image size: 26 cm x 14 cm
5281 13:10:46.874531 Gamma: 220%
5282 13:10:46.874647 Check DPMS levels
5283 13:10:46.877772 Supported color formats: RGB 4:4:4
5284 13:10:46.880936 First detailed timing is preferred timing
5285 13:10:46.884382 Established timings supported:
5286 13:10:46.887597 Standard timings supported:
5287 13:10:46.887681 Detailed timings
5288 13:10:46.894225 Hex of detail: ce1d56ea50001a3030204600009010000018
5289 13:10:46.897270 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5290 13:10:46.900580 0556 0586 05a6 0640 hborder 0
5291 13:10:46.903962 0300 0304 030a 031a vborder 0
5292 13:10:46.907484 -hsync -vsync
5293 13:10:46.910474 Did detailed timing
5294 13:10:46.914541 Hex of detail: 0000000f0000000000000000000000000020
5295 13:10:46.917437 Manufacturer-specified data, tag 15
5296 13:10:46.924163 Hex of detail: 000000fe0041554f0a202020202020202020
5297 13:10:46.924272 ASCII string: AUO
5298 13:10:46.927398 Hex of detail: 000000fe004231313658414230312e34200a
5299 13:10:46.930492 ASCII string: B116XAB01.4
5300 13:10:46.930628 Checksum
5301 13:10:46.933938 Checksum: 0xae (valid)
5302 13:10:46.940485 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5303 13:10:46.940665 DSI data_rate: 457800000 bps
5304 13:10:46.948622 anx7625_parse_edid: set default k value to 0x3d for panel
5305 13:10:46.951864 anx7625_parse_edid: pixelclock(76300).
5306 13:10:46.955450 hactive(1366), hsync(32), hfp(48), hbp(154)
5307 13:10:46.958503 vactive(768), vsync(6), vfp(4), vbp(16)
5308 13:10:46.961860 anx7625_dsi_config: config dsi.
5309 13:10:46.970048 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5310 13:10:46.991358 anx7625_dsi_config: success to config DSI
5311 13:10:46.994432 anx7625_dp_start: MIPI phy setup OK.
5312 13:10:46.997642 [SSUSB] Setting up USB HOST controller...
5313 13:10:47.001141 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5314 13:10:47.003989 [SSUSB] phy power-on done.
5315 13:10:47.008167 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5316 13:10:47.011339 in-header: 03 fc 01 00 00 00 00 00
5317 13:10:47.011726 in-data:
5318 13:10:47.018013 handle_proto3_response: EC response with error code: 1
5319 13:10:47.018402 SPM: pcm index = 1
5320 13:10:47.021155 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5321 13:10:47.024860 CBFS @ 21000 size 3d4000
5322 13:10:47.031405 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5323 13:10:47.035124 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5324 13:10:47.038246 CBFS: Found @ offset 1e7c0 size 1026
5325 13:10:47.044829 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5326 13:10:47.048308 SPM: binary array size = 2988
5327 13:10:47.051437 SPM: version = pcm_allinone_v1.17.2_20180829
5328 13:10:47.054734 SPM binary loaded in 32 msecs
5329 13:10:47.062443 spm_kick_im_to_fetch: ptr = 000000004021eec2
5330 13:10:47.065697 spm_kick_im_to_fetch: len = 2988
5331 13:10:47.066089 SPM: spm_kick_pcm_to_run
5332 13:10:47.068953 SPM: spm_kick_pcm_to_run done
5333 13:10:47.072340 SPM: spm_init done in 52 msecs
5334 13:10:47.075201 Root Device init finished in 495191 usecs
5335 13:10:47.078927 CPU_CLUSTER: 0 init ...
5336 13:10:47.088865 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5337 13:10:47.092175 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5338 13:10:47.095464 CBFS @ 21000 size 3d4000
5339 13:10:47.098618 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5340 13:10:47.101968 CBFS: Locating 'sspm.bin'
5341 13:10:47.105733 CBFS: Found @ offset 208c0 size 41cb
5342 13:10:47.115664 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5343 13:10:47.123393 CPU_CLUSTER: 0 init finished in 42800 usecs
5344 13:10:47.123941 Devices initialized
5345 13:10:47.126930 Show all devs... After init.
5346 13:10:47.129673 Root Device: enabled 1
5347 13:10:47.130188 CPU_CLUSTER: 0: enabled 1
5348 13:10:47.133802 CPU: 00: enabled 1
5349 13:10:47.137013 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5350 13:10:47.139936 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5351 13:10:47.143134 ELOG: NV offset 0x558000 size 0x1000
5352 13:10:47.150920 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5353 13:10:47.157665 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5354 13:10:47.160786 ELOG: Event(17) added with size 13 at 2024-07-18 13:10:37 UTC
5355 13:10:47.164255 out: cmd=0x121: 03 db 21 01 00 00 00 00
5356 13:10:47.168116 in-header: 03 a6 00 00 2c 00 00 00
5357 13:10:47.180950 in-data: 81 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 5a 52 01 00 06 80 00 00 11 ad 52 00 06 80 00 00 62 27 01 00 06 80 00 00 0e df 01 00
5358 13:10:47.184114 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5359 13:10:47.187568 in-header: 03 19 00 00 08 00 00 00
5360 13:10:47.190814 in-data: a2 e0 47 00 13 00 00 00
5361 13:10:47.194445 Chrome EC: UHEPI supported
5362 13:10:47.200807 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5363 13:10:47.204414 in-header: 03 e1 00 00 08 00 00 00
5364 13:10:47.207628 in-data: 84 20 60 10 00 00 00 00
5365 13:10:47.210817 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5366 13:10:47.217565 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5367 13:10:47.220917 in-header: 03 e1 00 00 08 00 00 00
5368 13:10:47.224046 in-data: 84 20 60 10 00 00 00 00
5369 13:10:47.230627 ELOG: Event(A1) added with size 10 at 2024-07-18 13:10:37 UTC
5370 13:10:47.237301 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5371 13:10:47.240753 ELOG: Event(A0) added with size 9 at 2024-07-18 13:10:37 UTC
5372 13:10:47.247208 elog_add_boot_reason: Logged dev mode boot
5373 13:10:47.247598 Finalize devices...
5374 13:10:47.250355 Devices finalized
5375 13:10:47.253752 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5376 13:10:47.257030 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5377 13:10:47.263831 ELOG: Event(91) added with size 10 at 2024-07-18 13:10:37 UTC
5378 13:10:47.266733 Writing coreboot table at 0xffeda000
5379 13:10:47.270186 0. 0000000000114000-000000000011efff: RAMSTAGE
5380 13:10:47.276865 1. 0000000040000000-000000004023cfff: RAMSTAGE
5381 13:10:47.280180 2. 000000004023d000-00000000545fffff: RAM
5382 13:10:47.283572 3. 0000000054600000-000000005465ffff: BL31
5383 13:10:47.286842 4. 0000000054660000-00000000ffed9fff: RAM
5384 13:10:47.293497 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5385 13:10:47.296955 6. 0000000100000000-000000013fffffff: RAM
5386 13:10:47.300031 Passing 5 GPIOs to payload:
5387 13:10:47.303332 NAME | PORT | POLARITY | VALUE
5388 13:10:47.306666 write protect | 0x00000096 | low | high
5389 13:10:47.313583 EC in RW | 0x000000b1 | high | undefined
5390 13:10:47.316718 EC interrupt | 0x00000097 | low | undefined
5391 13:10:47.323181 TPM interrupt | 0x00000099 | high | undefined
5392 13:10:47.327090 speaker enable | 0x000000af | high | undefined
5393 13:10:47.330371 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5394 13:10:47.333343 in-header: 03 f7 00 00 02 00 00 00
5395 13:10:47.337030 in-data: 04 00
5396 13:10:47.337419 Board ID: 4
5397 13:10:47.340414 ADC[3]: Raw value=215504 ID=1
5398 13:10:47.340872 RAM code: 1
5399 13:10:47.341182 SKU ID: 16
5400 13:10:47.346671 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5401 13:10:47.347078 CBFS @ 21000 size 3d4000
5402 13:10:47.353139 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5403 13:10:47.359856 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum abcc
5404 13:10:47.363498 coreboot table: 940 bytes.
5405 13:10:47.366613 IMD ROOT 0. 00000000fffff000 00001000
5406 13:10:47.370175 IMD SMALL 1. 00000000ffffe000 00001000
5407 13:10:47.373154 CONSOLE 2. 00000000fffde000 00020000
5408 13:10:47.376292 FMAP 3. 00000000fffdd000 0000047c
5409 13:10:47.380202 TIME STAMP 4. 00000000fffdc000 00000910
5410 13:10:47.383171 RAMOOPS 5. 00000000ffedc000 00100000
5411 13:10:47.386600 COREBOOT 6. 00000000ffeda000 00002000
5412 13:10:47.389847 IMD small region:
5413 13:10:47.392944 IMD ROOT 0. 00000000ffffec00 00000400
5414 13:10:47.396637 VBOOT WORK 1. 00000000ffffeb00 00000100
5415 13:10:47.399731 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5416 13:10:47.403090 VPD 3. 00000000ffffea60 0000006c
5417 13:10:47.409718 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5418 13:10:47.416110 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5419 13:10:47.419978 in-header: 03 e1 00 00 08 00 00 00
5420 13:10:47.422695 in-data: 84 20 60 10 00 00 00 00
5421 13:10:47.425925 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5422 13:10:47.429493 CBFS @ 21000 size 3d4000
5423 13:10:47.432620 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5424 13:10:47.435926 CBFS: Locating 'fallback/payload'
5425 13:10:47.444570 CBFS: Found @ offset dc040 size 439a0
5426 13:10:47.532852 read SPI 0xfd078 0x439a0: 84381 us, 3281 KB/s, 26.248 Mbps
5427 13:10:47.536126 Checking segment from ROM address 0x0000000040003a00
5428 13:10:47.543092 Checking segment from ROM address 0x0000000040003a1c
5429 13:10:47.546168 Loading segment from ROM address 0x0000000040003a00
5430 13:10:47.549591 code (compression=0)
5431 13:10:47.559122 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5432 13:10:47.566194 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5433 13:10:47.569420 it's not compressed!
5434 13:10:47.572382 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5435 13:10:47.579406 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5436 13:10:47.586945 Loading segment from ROM address 0x0000000040003a1c
5437 13:10:47.590724 Entry Point 0x0000000080000000
5438 13:10:47.591113 Loaded segments
5439 13:10:47.597382 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5440 13:10:47.600138 Jumping to boot code at 0000000080000000(00000000ffeda000)
5441 13:10:47.610183 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5442 13:10:47.613492 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5443 13:10:47.616914 CBFS @ 21000 size 3d4000
5444 13:10:47.624046 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5445 13:10:47.627035 CBFS: Locating 'fallback/bl31'
5446 13:10:47.630209 CBFS: Found @ offset 36dc0 size 5820
5447 13:10:47.640810 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5448 13:10:47.644232 Checking segment from ROM address 0x0000000040003a00
5449 13:10:47.650675 Checking segment from ROM address 0x0000000040003a1c
5450 13:10:47.654330 Loading segment from ROM address 0x0000000040003a00
5451 13:10:47.657388 code (compression=1)
5452 13:10:47.664040 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5453 13:10:47.673977 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5454 13:10:47.674511 using LZMA
5455 13:10:47.682683 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5456 13:10:47.689350 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5457 13:10:47.692587 Loading segment from ROM address 0x0000000040003a1c
5458 13:10:47.696045 Entry Point 0x0000000054601000
5459 13:10:47.696182 Loaded segments
5460 13:10:47.698892 NOTICE: MT8183 bl31_setup
5461 13:10:47.706025 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5462 13:10:47.709981 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5463 13:10:47.712689 INFO: [DEVAPC] dump DEVAPC registers:
5464 13:10:47.722866 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5465 13:10:47.729668 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5466 13:10:47.739129 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5467 13:10:47.746206 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5468 13:10:47.756257 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5469 13:10:47.762949 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5470 13:10:47.772482 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5471 13:10:47.779721 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5472 13:10:47.786568 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5473 13:10:47.796115 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5474 13:10:47.802872 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5475 13:10:47.812569 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5476 13:10:47.819140 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5477 13:10:47.825815 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5478 13:10:47.836045 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5479 13:10:47.842726 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5480 13:10:47.849219 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5481 13:10:47.855656 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5482 13:10:47.865964 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5483 13:10:47.872639 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5484 13:10:47.879257 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5485 13:10:47.886119 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5486 13:10:47.889003 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5487 13:10:47.892317 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5488 13:10:47.895739 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5489 13:10:47.898923 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5490 13:10:47.902189 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5491 13:10:47.908940 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5492 13:10:47.915539 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5493 13:10:47.915693 WARNING: region 0:
5494 13:10:47.918907 WARNING: apc:0x168, sa:0x0, ea:0xfff
5495 13:10:47.922201 WARNING: region 1:
5496 13:10:47.925629 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5497 13:10:47.925805 WARNING: region 2:
5498 13:10:47.929033 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5499 13:10:47.932388 WARNING: region 3:
5500 13:10:47.935756 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5501 13:10:47.935929 WARNING: region 4:
5502 13:10:47.942246 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5503 13:10:47.942419 WARNING: region 5:
5504 13:10:47.945508 WARNING: apc:0x0, sa:0x0, ea:0x0
5505 13:10:47.948668 WARNING: region 6:
5506 13:10:47.948811 WARNING: apc:0x0, sa:0x0, ea:0x0
5507 13:10:47.952042 WARNING: region 7:
5508 13:10:47.955243 WARNING: apc:0x0, sa:0x0, ea:0x0
5509 13:10:47.962473 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5510 13:10:47.965278 INFO: SPM: enable SPMC mode
5511 13:10:47.968731 NOTICE: spm_boot_init() start
5512 13:10:47.972461 NOTICE: spm_boot_init() end
5513 13:10:47.975259 INFO: BL31: Initializing runtime services
5514 13:10:47.978440 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5515 13:10:47.985328 INFO: BL31: Preparing for EL3 exit to normal world
5516 13:10:47.988947 INFO: Entry point address = 0x80000000
5517 13:10:47.991862 INFO: SPSR = 0x8
5518 13:10:48.012592
5519 13:10:48.012698
5520 13:10:48.012763
5521 13:10:48.013251 end: 2.2.3 depthcharge-start (duration 00:00:27) [common]
5522 13:10:48.013357 start: 2.2.4 bootloader-commands (timeout 00:04:24) [common]
5523 13:10:48.013435 Setting prompt string to ['jacuzzi:']
5524 13:10:48.013507 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:24)
5525 13:10:48.015978 Starting depthcharge on Juniper...
5526 13:10:48.016061
5527 13:10:48.019465 vboot_handoff: creating legacy vboot_handoff structure
5528 13:10:48.019589
5529 13:10:48.022687 ec_init(0): CrosEC protocol v3 supported (544, 544)
5530 13:10:48.022772
5531 13:10:48.025967 Wipe memory regions:
5532 13:10:48.026050
5533 13:10:48.029195 [0x00000040000000, 0x00000054600000)
5534 13:10:48.072199
5535 13:10:48.072332 [0x00000054660000, 0x00000080000000)
5536 13:10:48.163863
5537 13:10:48.164082 [0x000000811994a0, 0x000000ffeda000)
5538 13:10:48.423248
5539 13:10:48.423446 [0x00000100000000, 0x00000140000000)
5540 13:10:48.556001
5541 13:10:48.558947 Initializing XHCI USB controller at 0x11200000.
5542 13:10:48.582402
5543 13:10:48.585894 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5544 13:10:48.585980
5545 13:10:48.586059
5546 13:10:48.586332 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5547 13:10:48.586411 Sending line: 'tftpboot 192.168.201.1 14879008/tftp-deploy-nkov5d4y/kernel/image.itb 14879008/tftp-deploy-nkov5d4y/kernel/cmdline '
5549 13:10:48.687034 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5550 13:10:48.687217 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:24)
5551 13:10:48.691337 jacuzzi: tftpboot 192.168.201.1 14879008/tftp-deploy-nkov5d4y/kernel/image.itbtp-deploy-nkov5d4y/kernel/cmdline
5552 13:10:48.691518
5553 13:10:48.691654 Waiting for link
5554 13:10:49.096329
5555 13:10:49.096589 R8152: Initializing
5556 13:10:49.096766
5557 13:10:49.099781 Version 9 (ocp_data = 6010)
5558 13:10:49.099932
5559 13:10:49.102940 R8152: Done initializing
5560 13:10:49.103111
5561 13:10:49.103233 Adding net device
5562 13:10:49.488258
5563 13:10:49.488604 done.
5564 13:10:49.488877
5565 13:10:49.489130 MAC: 00:e0:4c:68:0b:b9
5566 13:10:49.489393
5567 13:10:49.491694 Sending DHCP discover... done.
5568 13:10:49.491933
5569 13:10:49.495245 Waiting for reply... done.
5570 13:10:49.495564
5571 13:10:49.498247 Sending DHCP request... done.
5572 13:10:49.498421
5573 13:10:49.498550 Waiting for reply... done.
5574 13:10:49.501599
5575 13:10:49.501805 My ip is 192.168.201.13
5576 13:10:49.501959
5577 13:10:49.505059 The DHCP server ip is 192.168.201.1
5578 13:10:49.505266
5579 13:10:49.508050 TFTP server IP predefined by user: 192.168.201.1
5580 13:10:49.508328
5581 13:10:49.514796 Bootfile predefined by user: 14879008/tftp-deploy-nkov5d4y/kernel/image.itb
5582 13:10:49.515078
5583 13:10:49.518177 Sending tftp read request... done.
5584 13:10:49.518496
5585 13:10:49.525406 Waiting for the transfer...
5586 13:10:49.525741
5587 13:10:49.819873 00000000 ################################################################
5588 13:10:49.820002
5589 13:10:50.115072 00080000 ################################################################
5590 13:10:50.115198
5591 13:10:50.371340 00100000 ################################################################
5592 13:10:50.371468
5593 13:10:50.630647 00180000 ################################################################
5594 13:10:50.630794
5595 13:10:50.884418 00200000 ################################################################
5596 13:10:50.884559
5597 13:10:51.136112 00280000 ################################################################
5598 13:10:51.136235
5599 13:10:51.388970 00300000 ################################################################
5600 13:10:51.389087
5601 13:10:51.645366 00380000 ################################################################
5602 13:10:51.645491
5603 13:10:51.914569 00400000 ################################################################
5604 13:10:51.914718
5605 13:10:52.177321 00480000 ################################################################
5606 13:10:52.177461
5607 13:10:52.431983 00500000 ################################################################
5608 13:10:52.432131
5609 13:10:52.685921 00580000 ################################################################
5610 13:10:52.686067
5611 13:10:52.955936 00600000 ################################################################
5612 13:10:52.956058
5613 13:10:53.219263 00680000 ################################################################
5614 13:10:53.219383
5615 13:10:53.496139 00700000 ################################################################
5616 13:10:53.496264
5617 13:10:53.759545 00780000 ################################################################
5618 13:10:53.759663
5619 13:10:54.041028 00800000 ################################################################
5620 13:10:54.041148
5621 13:10:54.298883 00880000 ################################################################
5622 13:10:54.299014
5623 13:10:54.560331 00900000 ################################################################
5624 13:10:54.560461
5625 13:10:54.816963 00980000 ################################################################
5626 13:10:54.817111
5627 13:10:55.069105 00a00000 ################################################################
5628 13:10:55.069252
5629 13:10:55.319467 00a80000 ################################################################
5630 13:10:55.319607
5631 13:10:55.561879 00b00000 ################################################################
5632 13:10:55.562048
5633 13:10:55.802913 00b80000 ################################################################
5634 13:10:55.803052
5635 13:10:56.056652 00c00000 ################################################################
5636 13:10:56.056796
5637 13:10:56.310961 00c80000 ################################################################
5638 13:10:56.311090
5639 13:10:56.565222 00d00000 ################################################################
5640 13:10:56.565343
5641 13:10:56.818555 00d80000 ################################################################
5642 13:10:56.818676
5643 13:10:57.064574 00e00000 ################################################################
5644 13:10:57.064708
5645 13:10:57.312609 00e80000 ################################################################
5646 13:10:57.312733
5647 13:10:57.560148 00f00000 ################################################################
5648 13:10:57.560275
5649 13:10:57.822280 00f80000 ################################################################
5650 13:10:57.822429
5651 13:10:58.081635 01000000 ################################################################
5652 13:10:58.081765
5653 13:10:58.332348 01080000 ################################################################
5654 13:10:58.332483
5655 13:10:58.579834 01100000 ################################################################
5656 13:10:58.579970
5657 13:10:58.834274 01180000 ################################################################
5658 13:10:58.834404
5659 13:10:59.096159 01200000 ################################################################
5660 13:10:59.096321
5661 13:10:59.363565 01280000 ################################################################
5662 13:10:59.363690
5663 13:10:59.634089 01300000 ################################################################
5664 13:10:59.634229
5665 13:10:59.910724 01380000 ################################################################
5666 13:10:59.910849
5667 13:11:00.197352 01400000 ################################################################
5668 13:11:00.197478
5669 13:11:00.464278 01480000 ################################################################
5670 13:11:00.464431
5671 13:11:00.715530 01500000 ################################################################
5672 13:11:00.715688
5673 13:11:00.975569 01580000 ################################################################
5674 13:11:00.975703
5675 13:11:01.209743 01600000 ################################################################
5676 13:11:01.209887
5677 13:11:01.443936 01680000 ################################################################
5678 13:11:01.444074
5679 13:11:01.679508 01700000 ################################################################
5680 13:11:01.679648
5681 13:11:01.923113 01780000 ################################################################
5682 13:11:01.923284
5683 13:11:02.188083 01800000 ################################################################
5684 13:11:02.188247
5685 13:11:02.461004 01880000 ################################################################
5686 13:11:02.461138
5687 13:11:02.730443 01900000 ################################################################
5688 13:11:02.730594
5689 13:11:02.994363 01980000 ################################################################
5690 13:11:02.994510
5691 13:11:03.249926 01a00000 ################################################################
5692 13:11:03.250061
5693 13:11:03.494428 01a80000 ################################################################
5694 13:11:03.494553
5695 13:11:03.741605 01b00000 ################################################################
5696 13:11:03.741762
5697 13:11:03.991339 01b80000 ################################################################
5698 13:11:03.991466
5699 13:11:04.262117 01c00000 ################################################################
5700 13:11:04.262248
5701 13:11:04.508068 01c80000 ################################################################
5702 13:11:04.508190
5703 13:11:04.757948 01d00000 ################################################################
5704 13:11:04.758068
5705 13:11:05.023325 01d80000 ################################################################
5706 13:11:05.023453
5707 13:11:05.268878 01e00000 ################################################################
5708 13:11:05.268998
5709 13:11:05.512787 01e80000 ################################################################
5710 13:11:05.512910
5711 13:11:05.760832 01f00000 ################################################################
5712 13:11:05.760963
5713 13:11:06.008828 01f80000 ################################################################
5714 13:11:06.008947
5715 13:11:06.265631 02000000 ################################################################
5716 13:11:06.265763
5717 13:11:06.481745 02080000 ######################################################## done.
5718 13:11:06.481873
5719 13:11:06.485283 The bootfile was 34535062 bytes long.
5720 13:11:06.485372
5721 13:11:06.488254 Sending tftp read request... done.
5722 13:11:06.488347
5723 13:11:06.488467 Waiting for the transfer...
5724 13:11:06.488548
5725 13:11:06.491750 00000000 # done.
5726 13:11:06.491833
5727 13:11:06.498171 Command line loaded dynamically from TFTP file: 14879008/tftp-deploy-nkov5d4y/kernel/cmdline
5728 13:11:06.498255
5729 13:11:06.515057 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5730 13:11:06.515154
5731 13:11:06.518481 Loading FIT.
5732 13:11:06.518562
5733 13:11:06.521694 Image ramdisk-1 has 21360856 bytes.
5734 13:11:06.521775
5735 13:11:06.521858 Image fdt-1 has 57695 bytes.
5736 13:11:06.521941
5737 13:11:06.525165 Image kernel-1 has 13114469 bytes.
5738 13:11:06.525242
5739 13:11:06.534919 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5740 13:11:06.535005
5741 13:11:06.548037 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5742 13:11:06.548133
5743 13:11:06.551448 Choosing best match conf-1 for compat google,juniper-sku16.
5744 13:11:06.556329
5745 13:11:06.561040 Connected to device vid:did:rid of 1ae0:0028:00
5746 13:11:06.569383
5747 13:11:06.572562 tpm_get_response: command 0x17b, return code 0x0
5748 13:11:06.572650
5749 13:11:06.575877 tpm_cleanup: add release locality here.
5750 13:11:06.575966
5751 13:11:06.578776 Shutting down all USB controllers.
5752 13:11:06.578863
5753 13:11:06.582205 Removing current net device
5754 13:11:06.582305
5755 13:11:06.585692 Exiting depthcharge with code 4 at timestamp: 35854809
5756 13:11:06.585780
5757 13:11:06.588933 LZMA decompressing kernel-1 to 0x80193568
5758 13:11:06.592443
5759 13:11:06.595812 LZMA decompressing kernel-1 to 0x40000000
5760 13:11:08.458225
5761 13:11:08.458683 jumping to kernel
5762 13:11:08.461544 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
5763 13:11:08.462185 start: 2.2.5 auto-login-action (timeout 00:04:04) [common]
5764 13:11:08.462668 Setting prompt string to ['Linux version [0-9]']
5765 13:11:08.463146 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5766 13:11:08.463684 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5767 13:11:08.533652
5768 13:11:08.536199 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5769 13:11:08.540193 start: 2.2.5.1 login-action (timeout 00:04:04) [common]
5770 13:11:08.540687 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5771 13:11:08.541054 Setting prompt string to []
5772 13:11:08.541454 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5773 13:11:08.541793 Using line separator: #'\n'#
5774 13:11:08.542072 No login prompt set.
5775 13:11:08.542362 Parsing kernel messages
5776 13:11:08.542626 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5777 13:11:08.543092 [login-action] Waiting for messages, (timeout 00:04:04)
5778 13:11:08.543384 Waiting using forced prompt support (timeout 00:02:02)
5779 13:11:08.559881 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j272990-arm64-gcc-12-defconfig-arm64-chromebook-fgzcq) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Thu Jul 18 12:53:03 UTC 2024
5780 13:11:08.562810 [ 0.000000] random: crng init done
5781 13:11:08.566322 [ 0.000000] Machine model: Google juniper sku16 board
5782 13:11:08.569572 [ 0.000000] efi: UEFI not found.
5783 13:11:08.579308 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5784 13:11:08.586474 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5785 13:11:08.593180 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5786 13:11:08.599072 [ 0.000000] printk: bootconsole [mtk8250] enabled
5787 13:11:08.607369 [ 0.000000] NUMA: No NUMA configuration found
5788 13:11:08.613943 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5789 13:11:08.620507 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5790 13:11:08.620903 [ 0.000000] Zone ranges:
5791 13:11:08.626925 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5792 13:11:08.630266 [ 0.000000] DMA32 empty
5793 13:11:08.636805 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5794 13:11:08.640181 [ 0.000000] Movable zone start for each node
5795 13:11:08.643399 [ 0.000000] Early memory node ranges
5796 13:11:08.650058 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5797 13:11:08.657202 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5798 13:11:08.663359 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5799 13:11:08.670187 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5800 13:11:08.676878 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5801 13:11:08.683246 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5802 13:11:08.703823 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5803 13:11:08.710339 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5804 13:11:08.716834 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5805 13:11:08.720532 [ 0.000000] psci: probing for conduit method from DT.
5806 13:11:08.727063 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5807 13:11:08.730507 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5808 13:11:08.737038 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5809 13:11:08.740304 [ 0.000000] psci: SMC Calling Convention v1.1
5810 13:11:08.747124 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5811 13:11:08.750186 [ 0.000000] Detected VIPT I-cache on CPU0
5812 13:11:08.756870 [ 0.000000] CPU features: detected: GIC system register CPU interface
5813 13:11:08.763902 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5814 13:11:08.769989 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5815 13:11:08.776633 [ 0.000000] CPU features: detected: ARM erratum 845719
5816 13:11:08.779764 [ 0.000000] alternatives: applying boot alternatives
5817 13:11:08.783571 [ 0.000000] Fallback order for Node 0: 0
5818 13:11:08.790283 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5819 13:11:08.793525 [ 0.000000] Policy zone: Normal
5820 13:11:08.812976 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5821 13:11:08.826603 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5822 13:11:08.833254 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5823 13:11:08.842811 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5824 13:11:08.849569 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5825 13:11:08.852814 <6>[ 0.000000] software IO TLB: area num 8.
5826 13:11:08.878773 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5827 13:11:08.937105 <6>[ 0.000000] Memory: 3894216K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 264248K reserved, 32768K cma-reserved)
5828 13:11:08.943587 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5829 13:11:08.950475 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5830 13:11:08.953423 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5831 13:11:08.959858 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5832 13:11:08.966576 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5833 13:11:08.970045 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5834 13:11:08.979866 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5835 13:11:08.986859 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5836 13:11:08.993340 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5837 13:11:09.003230 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5838 13:11:09.006583 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5839 13:11:09.009824 <6>[ 0.000000] GICv3: 640 SPIs implemented
5840 13:11:09.016411 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5841 13:11:09.019646 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5842 13:11:09.026600 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5843 13:11:09.033023 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5844 13:11:09.043223 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5845 13:11:09.056041 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5846 13:11:09.062925 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5847 13:11:09.074271 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5848 13:11:09.087314 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5849 13:11:09.093851 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5850 13:11:09.100845 <6>[ 0.009474] Console: colour dummy device 80x25
5851 13:11:09.103824 <6>[ 0.014509] printk: console [tty1] enabled
5852 13:11:09.113930 <6>[ 0.018901] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5853 13:11:09.120417 <6>[ 0.029366] pid_max: default: 32768 minimum: 301
5854 13:11:09.123699 <6>[ 0.034246] LSM: Security Framework initializing
5855 13:11:09.133907 <6>[ 0.039160] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5856 13:11:09.140369 <6>[ 0.046783] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5857 13:11:09.146715 <4>[ 0.055661] cacheinfo: Unable to detect cache hierarchy for CPU 0
5858 13:11:09.157206 <6>[ 0.062289] cblist_init_generic: Setting adjustable number of callback queues.
5859 13:11:09.163505 <6>[ 0.069735] cblist_init_generic: Setting shift to 3 and lim to 1.
5860 13:11:09.170193 <6>[ 0.076087] cblist_init_generic: Setting adjustable number of callback queues.
5861 13:11:09.176959 <6>[ 0.083532] cblist_init_generic: Setting shift to 3 and lim to 1.
5862 13:11:09.180155 <6>[ 0.089932] rcu: Hierarchical SRCU implementation.
5863 13:11:09.186766 <6>[ 0.094958] rcu: Max phase no-delay instances is 1000.
5864 13:11:09.193739 <6>[ 0.102882] EFI services will not be available.
5865 13:11:09.197364 <6>[ 0.107834] smp: Bringing up secondary CPUs ...
5866 13:11:09.207696 <6>[ 0.113144] Detected VIPT I-cache on CPU1
5867 13:11:09.214116 <4>[ 0.113191] cacheinfo: Unable to detect cache hierarchy for CPU 1
5868 13:11:09.220744 <6>[ 0.113199] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5869 13:11:09.227785 <6>[ 0.113232] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5870 13:11:09.230856 <6>[ 0.113714] Detected VIPT I-cache on CPU2
5871 13:11:09.237834 <4>[ 0.113747] cacheinfo: Unable to detect cache hierarchy for CPU 2
5872 13:11:09.244261 <6>[ 0.113752] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5873 13:11:09.250902 <6>[ 0.113763] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5874 13:11:09.254547 <6>[ 0.114210] Detected VIPT I-cache on CPU3
5875 13:11:09.260870 <4>[ 0.114240] cacheinfo: Unable to detect cache hierarchy for CPU 3
5876 13:11:09.267644 <6>[ 0.114245] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5877 13:11:09.274305 <6>[ 0.114256] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5878 13:11:09.280668 <6>[ 0.114831] CPU features: detected: Spectre-v2
5879 13:11:09.283993 <6>[ 0.114841] CPU features: detected: Spectre-BHB
5880 13:11:09.290642 <6>[ 0.114844] CPU features: detected: ARM erratum 858921
5881 13:11:09.294516 <6>[ 0.114850] Detected VIPT I-cache on CPU4
5882 13:11:09.301014 <4>[ 0.114898] cacheinfo: Unable to detect cache hierarchy for CPU 4
5883 13:11:09.307764 <6>[ 0.114906] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5884 13:11:09.314250 <6>[ 0.114914] arch_timer: Enabling local workaround for ARM erratum 858921
5885 13:11:09.321156 <6>[ 0.114924] arch_timer: CPU4: Trapping CNTVCT access
5886 13:11:09.327558 <6>[ 0.114932] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5887 13:11:09.330884 <6>[ 0.115417] Detected VIPT I-cache on CPU5
5888 13:11:09.337392 <4>[ 0.115457] cacheinfo: Unable to detect cache hierarchy for CPU 5
5889 13:11:09.344214 <6>[ 0.115462] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5890 13:11:09.350572 <6>[ 0.115469] arch_timer: Enabling local workaround for ARM erratum 858921
5891 13:11:09.357670 <6>[ 0.115475] arch_timer: CPU5: Trapping CNTVCT access
5892 13:11:09.364066 <6>[ 0.115480] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5893 13:11:09.367276 <6>[ 0.115917] Detected VIPT I-cache on CPU6
5894 13:11:09.374116 <4>[ 0.115963] cacheinfo: Unable to detect cache hierarchy for CPU 6
5895 13:11:09.380762 <6>[ 0.115969] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5896 13:11:09.387432 <6>[ 0.115976] arch_timer: Enabling local workaround for ARM erratum 858921
5897 13:11:09.394104 <6>[ 0.115982] arch_timer: CPU6: Trapping CNTVCT access
5898 13:11:09.400568 <6>[ 0.115987] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5899 13:11:09.403807 <6>[ 0.116518] Detected VIPT I-cache on CPU7
5900 13:11:09.410219 <4>[ 0.116561] cacheinfo: Unable to detect cache hierarchy for CPU 7
5901 13:11:09.417151 <6>[ 0.116567] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5902 13:11:09.423813 <6>[ 0.116574] arch_timer: Enabling local workaround for ARM erratum 858921
5903 13:11:09.430705 <6>[ 0.116581] arch_timer: CPU7: Trapping CNTVCT access
5904 13:11:09.437120 <6>[ 0.116586] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5905 13:11:09.440388 <6>[ 0.116660] smp: Brought up 1 node, 8 CPUs
5906 13:11:09.446737 <6>[ 0.355537] SMP: Total of 8 processors activated.
5907 13:11:09.449968 <6>[ 0.360473] CPU features: detected: 32-bit EL0 Support
5908 13:11:09.456777 <6>[ 0.365844] CPU features: detected: 32-bit EL1 Support
5909 13:11:09.463681 <6>[ 0.371211] CPU features: detected: CRC32 instructions
5910 13:11:09.467071 <6>[ 0.376638] CPU: All CPU(s) started at EL2
5911 13:11:09.473367 <6>[ 0.380976] alternatives: applying system-wide alternatives
5912 13:11:09.479975 <6>[ 0.389015] devtmpfs: initialized
5913 13:11:09.492242 <6>[ 0.397975] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5914 13:11:09.502626 <6>[ 0.407923] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5915 13:11:09.505487 <6>[ 0.415648] pinctrl core: initialized pinctrl subsystem
5916 13:11:09.513765 <6>[ 0.422766] DMI not present or invalid.
5917 13:11:09.520205 <6>[ 0.427134] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5918 13:11:09.526802 <6>[ 0.434025] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5919 13:11:09.536746 <6>[ 0.441552] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5920 13:11:09.543578 <6>[ 0.449802] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5921 13:11:09.550120 <6>[ 0.457977] audit: initializing netlink subsys (disabled)
5922 13:11:09.556921 <5>[ 0.463683] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5923 13:11:09.563735 <6>[ 0.464665] thermal_sys: Registered thermal governor 'step_wise'
5924 13:11:09.570100 <6>[ 0.471649] thermal_sys: Registered thermal governor 'power_allocator'
5925 13:11:09.573828 <6>[ 0.477947] cpuidle: using governor menu
5926 13:11:09.580352 <6>[ 0.488912] NET: Registered PF_QIPCRTR protocol family
5927 13:11:09.586876 <6>[ 0.494397] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5928 13:11:09.593540 <6>[ 0.501495] ASID allocator initialised with 32768 entries
5929 13:11:09.600004 <6>[ 0.508275] Serial: AMBA PL011 UART driver
5930 13:11:09.610540 <4>[ 0.519626] Trying to register duplicate clock ID: 113
5931 13:11:09.670642 <6>[ 0.576236] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5932 13:11:09.684844 <6>[ 0.590644] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5933 13:11:09.688194 <6>[ 0.600417] KASLR enabled
5934 13:11:09.702648 <6>[ 0.608366] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5935 13:11:09.709078 <6>[ 0.615371] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5936 13:11:09.715937 <6>[ 0.621848] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5937 13:11:09.722535 <6>[ 0.628840] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5938 13:11:09.728892 <6>[ 0.635314] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5939 13:11:09.736114 <6>[ 0.642303] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5940 13:11:09.742594 <6>[ 0.648777] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5941 13:11:09.749548 <6>[ 0.655768] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5942 13:11:09.752405 <6>[ 0.663305] ACPI: Interpreter disabled.
5943 13:11:09.762093 <6>[ 0.671316] iommu: Default domain type: Translated
5944 13:11:09.769206 <6>[ 0.676480] iommu: DMA domain TLB invalidation policy: strict mode
5945 13:11:09.772419 <5>[ 0.683104] SCSI subsystem initialized
5946 13:11:09.778629 <6>[ 0.687552] usbcore: registered new interface driver usbfs
5947 13:11:09.785925 <6>[ 0.693279] usbcore: registered new interface driver hub
5948 13:11:09.788431 <6>[ 0.698821] usbcore: registered new device driver usb
5949 13:11:09.796122 <6>[ 0.705147] pps_core: LinuxPPS API ver. 1 registered
5950 13:11:09.805965 <6>[ 0.710333] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5951 13:11:09.809255 <6>[ 0.719658] PTP clock support registered
5952 13:11:09.812564 <6>[ 0.723912] EDAC MC: Ver: 3.0.0
5953 13:11:09.820400 <6>[ 0.729576] FPGA manager framework
5954 13:11:09.824048 <6>[ 0.733256] Advanced Linux Sound Architecture Driver Initialized.
5955 13:11:09.827765 <6>[ 0.739999] vgaarb: loaded
5956 13:11:09.834612 <6>[ 0.743121] clocksource: Switched to clocksource arch_sys_counter
5957 13:11:09.841078 <5>[ 0.749555] VFS: Disk quotas dquot_6.6.0
5958 13:11:09.847560 <6>[ 0.753730] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5959 13:11:09.850745 <6>[ 0.760903] pnp: PnP ACPI: disabled
5960 13:11:09.858591 <6>[ 0.767773] NET: Registered PF_INET protocol family
5961 13:11:09.865310 <6>[ 0.772995] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5962 13:11:09.877051 <6>[ 0.782904] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5963 13:11:09.887396 <6>[ 0.791658] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5964 13:11:09.893819 <6>[ 0.799608] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5965 13:11:09.900660 <6>[ 0.807840] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5966 13:11:09.907324 <6>[ 0.815932] TCP: Hash tables configured (established 32768 bind 32768)
5967 13:11:09.917391 <6>[ 0.822762] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5968 13:11:09.923718 <6>[ 0.829736] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5969 13:11:09.930475 <6>[ 0.837216] NET: Registered PF_UNIX/PF_LOCAL protocol family
5970 13:11:09.936538 <6>[ 0.843338] RPC: Registered named UNIX socket transport module.
5971 13:11:09.939905 <6>[ 0.849482] RPC: Registered udp transport module.
5972 13:11:09.946544 <6>[ 0.854407] RPC: Registered tcp transport module.
5973 13:11:09.953217 <6>[ 0.859330] RPC: Registered tcp NFSv4.1 backchannel transport module.
5974 13:11:09.956529 <6>[ 0.865981] PCI: CLS 0 bytes, default 64
5975 13:11:09.960040 <6>[ 0.870241] Unpacking initramfs...
5976 13:11:09.981980 <6>[ 0.887749] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5977 13:11:09.992347 <6>[ 0.896495] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5978 13:11:09.995380 <6>[ 0.905418] kvm [1]: IPA Size Limit: 40 bits
5979 13:11:10.002749 <6>[ 0.911765] kvm [1]: vgic-v2@c420000
5980 13:11:10.005913 <6>[ 0.915596] kvm [1]: GIC system register CPU interface enabled
5981 13:11:10.013097 <6>[ 0.921780] kvm [1]: vgic interrupt IRQ18
5982 13:11:10.016082 <6>[ 0.926159] kvm [1]: Hyp mode initialized successfully
5983 13:11:10.023606 <5>[ 0.932486] Initialise system trusted keyrings
5984 13:11:10.030058 <6>[ 0.937279] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5985 13:11:10.037965 <6>[ 0.947221] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5986 13:11:10.044997 <5>[ 0.953637] NFS: Registering the id_resolver key type
5987 13:11:10.048356 <5>[ 0.958956] Key type id_resolver registered
5988 13:11:10.054621 <5>[ 0.963371] Key type id_legacy registered
5989 13:11:10.061184 <6>[ 0.967673] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5990 13:11:10.067942 <6>[ 0.974597] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5991 13:11:10.074859 <6>[ 0.982352] 9p: Installing v9fs 9p2000 file system support
5992 13:11:10.102072 <5>[ 1.011087] Key type asymmetric registered
5993 13:11:10.105220 <5>[ 1.015433] Asymmetric key parser 'x509' registered
5994 13:11:10.115481 <6>[ 1.020590] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5995 13:11:10.118540 <6>[ 1.028203] io scheduler mq-deadline registered
5996 13:11:10.122350 <6>[ 1.032959] io scheduler kyber registered
5997 13:11:10.144880 <6>[ 1.053735] EINJ: ACPI disabled.
5998 13:11:10.151378 <4>[ 1.057492] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5999 13:11:10.189204 <6>[ 1.098171] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6000 13:11:10.197644 <6>[ 1.106624] printk: console [ttyS0] disabled
6001 13:11:10.225427 <6>[ 1.131278] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6002 13:11:10.232014 <6>[ 1.140752] printk: console [ttyS0] enabled
6003 13:11:10.235313 <6>[ 1.140752] printk: console [ttyS0] enabled
6004 13:11:10.242613 <6>[ 1.149672] printk: bootconsole [mtk8250] disabled
6005 13:11:10.245940 <6>[ 1.149672] printk: bootconsole [mtk8250] disabled
6006 13:11:10.255954 <3>[ 1.160199] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6007 13:11:10.261862 <3>[ 1.168581] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6008 13:11:10.291541 <6>[ 1.196987] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6009 13:11:10.297908 <6>[ 1.206638] serial serial0: tty port ttyS1 registered
6010 13:11:10.304395 <6>[ 1.213185] SuperH (H)SCI(F) driver initialized
6011 13:11:10.308040 <6>[ 1.218655] msm_serial: driver initialized
6012 13:11:10.322991 <6>[ 1.228980] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6013 13:11:10.333270 <6>[ 1.237584] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6014 13:11:10.339943 <6>[ 1.246160] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6015 13:11:10.350083 <6>[ 1.254731] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6016 13:11:10.356624 <6>[ 1.263385] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6017 13:11:10.366712 <6>[ 1.272045] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6018 13:11:10.376294 <6>[ 1.280783] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6019 13:11:10.382936 <6>[ 1.289522] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6020 13:11:10.393108 <6>[ 1.298088] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6021 13:11:10.402985 <6>[ 1.306887] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6022 13:11:10.410233 <4>[ 1.319294] cacheinfo: Unable to detect cache hierarchy for CPU 0
6023 13:11:10.419780 <6>[ 1.328628] loop: module loaded
6024 13:11:10.431255 <6>[ 1.340537] vsim1: Bringing 1800000uV into 2700000-2700000uV
6025 13:11:10.449152 <6>[ 1.358468] megasas: 07.719.03.00-rc1
6026 13:11:10.458356 <6>[ 1.367297] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6027 13:11:10.465518 <6>[ 1.374497] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6028 13:11:10.482298 <6>[ 1.391301] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6029 13:11:10.539344 <6>[ 1.441772] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6030 13:11:10.673708 <6>[ 1.582710] Freeing initrd memory: 20856K
6031 13:11:10.693546 <4>[ 1.598667] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6032 13:11:10.699514 <4>[ 1.607897] CPU: 5 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
6033 13:11:10.706267 <4>[ 1.614597] Hardware name: Google juniper sku16 board (DT)
6034 13:11:10.710074 <4>[ 1.620336] Call trace:
6035 13:11:10.713245 <4>[ 1.623036] dump_backtrace.part.0+0xe0/0xf0
6036 13:11:10.716434 <4>[ 1.627575] show_stack+0x18/0x30
6037 13:11:10.719731 <4>[ 1.631147] dump_stack_lvl+0x64/0x80
6038 13:11:10.723359 <4>[ 1.635066] dump_stack+0x18/0x34
6039 13:11:10.729778 <4>[ 1.638635] sysfs_warn_dup+0x64/0x80
6040 13:11:10.733193 <4>[ 1.642558] sysfs_do_create_link_sd+0xf0/0x100
6041 13:11:10.736719 <4>[ 1.647345] sysfs_create_link+0x20/0x40
6042 13:11:10.743313 <4>[ 1.651525] bus_add_device+0x64/0x120
6043 13:11:10.746408 <4>[ 1.655531] device_add+0x354/0x7ec
6044 13:11:10.749422 <4>[ 1.659277] of_device_add+0x44/0x60
6045 13:11:10.752896 <4>[ 1.663110] of_platform_device_create_pdata+0x90/0x124
6046 13:11:10.759668 <4>[ 1.668592] of_platform_bus_create+0x154/0x380
6047 13:11:10.762901 <4>[ 1.673378] of_platform_populate+0x50/0xfc
6048 13:11:10.769403 <4>[ 1.677817] parse_mtd_partitions+0x1d8/0x4e0
6049 13:11:10.772716 <4>[ 1.682434] mtd_device_parse_register+0xec/0x2e0
6050 13:11:10.776339 <4>[ 1.687394] spi_nor_probe+0x280/0x2f4
6051 13:11:10.780194 <4>[ 1.691399] spi_mem_probe+0x6c/0xc0
6052 13:11:10.786134 <4>[ 1.695232] spi_probe+0x84/0xe4
6053 13:11:10.789886 <4>[ 1.698717] really_probe+0xbc/0x2dc
6054 13:11:10.793260 <4>[ 1.702548] __driver_probe_device+0x78/0x114
6055 13:11:10.796689 <4>[ 1.707160] driver_probe_device+0xd8/0x15c
6056 13:11:10.803420 <4>[ 1.711598] __device_attach_driver+0xb8/0x134
6057 13:11:10.806667 <4>[ 1.716297] bus_for_each_drv+0x7c/0xd4
6058 13:11:10.810016 <4>[ 1.720390] __device_attach+0x9c/0x1a0
6059 13:11:10.816382 <4>[ 1.724480] device_initial_probe+0x14/0x20
6060 13:11:10.819805 <4>[ 1.728917] bus_probe_device+0x98/0xa0
6061 13:11:10.822903 <4>[ 1.733007] device_add+0x3c0/0x7ec
6062 13:11:10.826231 <4>[ 1.736752] __spi_add_device+0x78/0x120
6063 13:11:10.829727 <4>[ 1.740930] spi_add_device+0x44/0x80
6064 13:11:10.836475 <4>[ 1.744846] spi_register_controller+0x704/0xb20
6065 13:11:10.839946 <4>[ 1.749718] devm_spi_register_controller+0x4c/0xac
6066 13:11:10.846396 <4>[ 1.754850] mtk_spi_probe+0x4f4/0x684
6067 13:11:10.849697 <4>[ 1.758855] platform_probe+0x68/0xc0
6068 13:11:10.853085 <4>[ 1.762773] really_probe+0xbc/0x2dc
6069 13:11:10.856351 <4>[ 1.766603] __driver_probe_device+0x78/0x114
6070 13:11:10.862832 <4>[ 1.771214] driver_probe_device+0xd8/0x15c
6071 13:11:10.866140 <4>[ 1.775651] __driver_attach+0x94/0x19c
6072 13:11:10.869540 <4>[ 1.779740] bus_for_each_dev+0x74/0xd0
6073 13:11:10.872631 <4>[ 1.783833] driver_attach+0x24/0x30
6074 13:11:10.876348 <4>[ 1.787663] bus_add_driver+0x154/0x20c
6075 13:11:10.882881 <4>[ 1.791753] driver_register+0x78/0x130
6076 13:11:10.886576 <4>[ 1.795844] __platform_driver_register+0x28/0x34
6077 13:11:10.889435 <4>[ 1.800804] mtk_spi_driver_init+0x1c/0x28
6078 13:11:10.896444 <4>[ 1.805161] do_one_initcall+0x64/0x1dc
6079 13:11:10.899720 <4>[ 1.809252] kernel_init_freeable+0x218/0x284
6080 13:11:10.903118 <4>[ 1.813867] kernel_init+0x24/0x12c
6081 13:11:10.905918 <4>[ 1.817611] ret_from_fork+0x10/0x20
6082 13:11:10.917656 <6>[ 1.826532] tun: Universal TUN/TAP device driver, 1.6
6083 13:11:10.921139 <6>[ 1.832825] thunder_xcv, ver 1.0
6084 13:11:10.924399 <6>[ 1.836344] thunder_bgx, ver 1.0
6085 13:11:10.927630 <6>[ 1.839847] nicpf, ver 1.0
6086 13:11:10.938409 <6>[ 1.844223] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6087 13:11:10.942113 <6>[ 1.851710] hns3: Copyright (c) 2017 Huawei Corporation.
6088 13:11:10.945465 <6>[ 1.857307] hclge is initializing
6089 13:11:10.951523 <6>[ 1.860895] e1000: Intel(R) PRO/1000 Network Driver
6090 13:11:10.958355 <6>[ 1.866031] e1000: Copyright (c) 1999-2006 Intel Corporation.
6091 13:11:10.961626 <6>[ 1.872055] e1000e: Intel(R) PRO/1000 Network Driver
6092 13:11:10.968366 <6>[ 1.877277] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6093 13:11:10.975258 <6>[ 1.883471] igb: Intel(R) Gigabit Ethernet Network Driver
6094 13:11:10.981645 <6>[ 1.889127] igb: Copyright (c) 2007-2014 Intel Corporation.
6095 13:11:10.988383 <6>[ 1.894971] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6096 13:11:10.995341 <6>[ 1.901518] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6097 13:11:10.998760 <6>[ 1.908082] sky2: driver version 1.30
6098 13:11:11.005384 <6>[ 1.913343] usbcore: registered new device driver r8152-cfgselector
6099 13:11:11.011726 <6>[ 1.919889] usbcore: registered new interface driver r8152
6100 13:11:11.018472 <6>[ 1.925724] VFIO - User Level meta-driver version: 0.3
6101 13:11:11.024953 <6>[ 1.933504] mtu3 11201000.usb: uwk - reg:0x420, version:101
6102 13:11:11.031580 <4>[ 1.939381] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6103 13:11:11.038319 <6>[ 1.946655] mtu3 11201000.usb: dr_mode: 1, drd: auto
6104 13:11:11.045115 <6>[ 1.951883] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6105 13:11:11.048412 <6>[ 1.958073] mtu3 11201000.usb: usb3-drd: 0
6106 13:11:11.055173 <6>[ 1.963667] mtu3 11201000.usb: xHCI platform device register success...
6107 13:11:11.066907 <4>[ 1.972363] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6108 13:11:11.073335 <6>[ 1.980306] xhci-mtk 11200000.usb: xHCI Host Controller
6109 13:11:11.080069 <6>[ 1.985839] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6110 13:11:11.086744 <6>[ 1.993561] xhci-mtk 11200000.usb: USB3 root hub has no ports
6111 13:11:11.093042 <6>[ 1.999571] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6112 13:11:11.100219 <6>[ 2.008999] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6113 13:11:11.106889 <6>[ 2.015078] xhci-mtk 11200000.usb: xHCI Host Controller
6114 13:11:11.113494 <6>[ 2.020567] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6115 13:11:11.119924 <6>[ 2.028224] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6116 13:11:11.123460 <6>[ 2.035042] hub 1-0:1.0: USB hub found
6117 13:11:11.130247 <6>[ 2.039069] hub 1-0:1.0: 1 port detected
6118 13:11:11.140166 <6>[ 2.044410] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6119 13:11:11.143561 <6>[ 2.053028] hub 2-0:1.0: USB hub found
6120 13:11:11.149739 <3>[ 2.057054] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6121 13:11:11.156655 <6>[ 2.064932] usbcore: registered new interface driver usb-storage
6122 13:11:11.163294 <6>[ 2.071540] usbcore: registered new device driver onboard-usb-hub
6123 13:11:11.181457 <4>[ 2.087237] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6124 13:11:11.190720 <6>[ 2.099505] mt6397-rtc mt6358-rtc: registered as rtc0
6125 13:11:11.200595 <6>[ 2.104988] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-18T13:11:01 UTC (1721308261)
6126 13:11:11.203865 <6>[ 2.114866] i2c_dev: i2c /dev entries driver
6127 13:11:11.215450 <6>[ 2.121287] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6128 13:11:11.225397 <6>[ 2.129607] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6129 13:11:11.229296 <6>[ 2.138513] i2c 4-0058: Fixed dependency cycle(s) with /panel
6130 13:11:11.238816 <6>[ 2.144544] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6131 13:11:11.255251 <6>[ 2.163990] cpu cpu0: EM: created perf domain
6132 13:11:11.265050 <6>[ 2.169476] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6133 13:11:11.271678 <6>[ 2.180760] cpu cpu4: EM: created perf domain
6134 13:11:11.278832 <6>[ 2.187826] sdhci: Secure Digital Host Controller Interface driver
6135 13:11:11.285864 <6>[ 2.194280] sdhci: Copyright(c) Pierre Ossman
6136 13:11:11.292471 <6>[ 2.199695] Synopsys Designware Multimedia Card Interface Driver
6137 13:11:11.298962 <6>[ 2.200261] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6138 13:11:11.302250 <6>[ 2.206770] sdhci-pltfm: SDHCI platform and OF driver helper
6139 13:11:11.311389 <6>[ 2.220269] ledtrig-cpu: registered to indicate activity on CPUs
6140 13:11:11.319000 <6>[ 2.228004] usbcore: registered new interface driver usbhid
6141 13:11:11.322430 <6>[ 2.233844] usbhid: USB HID core driver
6142 13:11:11.333375 <6>[ 2.238117] spi_master spi2: will run message pump with realtime priority
6143 13:11:11.337076 <4>[ 2.238122] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6144 13:11:11.344136 <4>[ 2.252382] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6145 13:11:11.357483 <6>[ 2.257422] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6146 13:11:11.375697 <6>[ 2.274681] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6147 13:11:11.382208 <4>[ 2.284947] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6148 13:11:11.385511 <6>[ 2.289398] cros-ec-spi spi2.0: Chrome EC device registered
6149 13:11:11.399361 <4>[ 2.305019] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6150 13:11:11.412618 <4>[ 2.317824] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6151 13:11:11.419503 <4>[ 2.326705] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6152 13:11:11.425629 <6>[ 2.333850] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6153 13:11:11.432753 <6>[ 2.341662] mmc0: new HS400 MMC card at address 0001
6154 13:11:11.439896 <6>[ 2.348078] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6155 13:11:11.446267 <6>[ 2.348213] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6156 13:11:11.454052 <6>[ 2.363248] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6157 13:11:11.463960 <6>[ 2.365612] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6158 13:11:11.467948 <6>[ 2.371193] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6159 13:11:11.481268 <6>[ 2.381695] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6160 13:11:11.484360 <6>[ 2.384655] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6161 13:11:11.490949 <6>[ 2.395248] NET: Registered PF_PACKET protocol family
6162 13:11:11.497941 <6>[ 2.400790] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6163 13:11:11.501282 <6>[ 2.404592] 9pnet: Installing 9P2000 support
6164 13:11:11.514265 <6>[ 2.409139] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6165 13:11:11.524377 <6>[ 2.409724] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6166 13:11:11.527634 <5>[ 2.437600] Key type dns_resolver registered
6167 13:11:11.534598 <6>[ 2.442898] registered taskstats version 1
6168 13:11:11.537581 <5>[ 2.447268] Loading compiled-in X.509 certificates
6169 13:11:11.553592 <6>[ 2.459137] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6170 13:11:11.581766 <3>[ 2.487096] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6171 13:11:11.612319 <6>[ 2.514723] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6172 13:11:11.623422 <6>[ 2.529299] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6173 13:11:11.633409 <6>[ 2.537889] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6174 13:11:11.640205 <6>[ 2.546554] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6175 13:11:11.650592 <6>[ 2.555107] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6176 13:11:11.657132 <6>[ 2.563630] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6177 13:11:11.666685 <6>[ 2.572150] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6178 13:11:11.677012 <6>[ 2.580669] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6179 13:11:11.683522 <6>[ 2.589799] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6180 13:11:11.689886 <6>[ 2.597109] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6181 13:11:11.696874 <6>[ 2.604227] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6182 13:11:11.703322 <6>[ 2.611316] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6183 13:11:11.706600 <6>[ 2.614215] hub 1-1:1.0: USB hub found
6184 13:11:11.713189 <6>[ 2.618607] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6185 13:11:11.720018 <6>[ 2.622388] hub 1-1:1.0: 3 ports detected
6186 13:11:11.723111 <6>[ 2.630027] panfrost 13040000.gpu: clock rate = 511999970
6187 13:11:11.732738 <6>[ 2.638650] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6188 13:11:11.742713 <6>[ 2.648557] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6189 13:11:11.749774 <6>[ 2.656572] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6190 13:11:11.763103 <6>[ 2.665007] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6191 13:11:11.769063 <6>[ 2.677086] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6192 13:11:11.781272 <6>[ 2.687125] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6193 13:11:11.791558 <6>[ 2.695768] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6194 13:11:11.801162 <6>[ 2.704921] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6195 13:11:11.807968 <6>[ 2.714052] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6196 13:11:11.817953 <6>[ 2.723181] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6197 13:11:11.827396 <6>[ 2.732484] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6198 13:11:11.837511 <6>[ 2.741785] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6199 13:11:11.847538 <6>[ 2.751263] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6200 13:11:11.857231 <6>[ 2.760740] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6201 13:11:11.864028 <6>[ 2.769869] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6202 13:11:11.937018 <6>[ 2.842911] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6203 13:11:11.947112 <6>[ 2.851799] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6204 13:11:11.958982 <6>[ 2.864730] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6205 13:11:12.025291 <6>[ 2.931158] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6206 13:11:12.639341 <6>[ 3.115573] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6207 13:11:12.649338 <4>[ 3.232760] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6208 13:11:12.656300 <4>[ 3.232777] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6209 13:11:12.662707 <6>[ 3.268336] r8152 1-1.2:1.0 eth0: v1.12.13
6210 13:11:12.669433 <6>[ 3.347146] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6211 13:11:12.675866 <6>[ 3.528623] Console: switching to colour frame buffer device 170x48
6212 13:11:12.683124 <6>[ 3.589283] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6213 13:11:12.702793 <6>[ 3.605244] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6214 13:11:12.720804 <6>[ 3.622938] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6215 13:11:12.727602 <6>[ 3.635065] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6216 13:11:12.737726 <6>[ 3.643443] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6217 13:11:12.747690 <6>[ 3.648164] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6218 13:11:12.765282 <6>[ 3.667791] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6219 13:11:13.964242 <6>[ 4.873251] r8152 1-1.2:1.0 eth0: carrier on
6220 13:11:16.058442 <5>[ 4.903156] Sending DHCP requests .., OK
6221 13:11:16.065106 <6>[ 6.971375] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6222 13:11:16.068353 <6>[ 6.979889] IP-Config: Complete:
6223 13:11:16.081481 <6>[ 6.983462] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6224 13:11:16.091276 <6>[ 6.994360] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6225 13:11:16.102947 <6>[ 7.008727] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6226 13:11:16.111523 <6>[ 7.008738] nameserver0=192.168.201.1
6227 13:11:16.120217 <6>[ 7.029107] clk: Disabling unused clocks
6228 13:11:16.125244 <6>[ 7.037480] ALSA device list:
6229 13:11:16.134642 <6>[ 7.043596] No soundcards found.
6230 13:11:16.144064 <6>[ 7.053022] Freeing unused kernel memory: 8512K
6231 13:11:16.151311 <6>[ 7.060379] Run /init as init process
6232 13:11:16.189003 Starting syslogd: OK
6233 13:11:16.193841 Starting klogd: OK
6234 13:11:16.205365 Running sysctl: OK
6235 13:11:16.214779 Populating /dev using udev: <30>[ 7.123038] udevd[208]: starting version 3.2.9
6236 13:11:16.222794 <27>[ 7.131733] udevd[208]: specified user 'tss' unknown
6237 13:11:16.229860 <27>[ 7.138021] udevd[208]: specified group 'tss' unknown
6238 13:11:16.236594 <30>[ 7.145658] udevd[209]: starting eudev-3.2.9
6239 13:11:16.262477 <27>[ 7.171542] udevd[209]: specified user 'tss' unknown
6240 13:11:16.270468 <27>[ 7.179276] udevd[209]: specified group 'tss' unknown
6241 13:11:16.365891 <3>[ 7.274550] mtk-scp 10500000.scp: invalid resource
6242 13:11:16.376259 <6>[ 7.281740] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6243 13:11:16.383429 <3>[ 7.291924] thermal_sys: Failed to find 'trips' node
6244 13:11:16.390032 <3>[ 7.297882] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6245 13:11:16.400960 <3>[ 7.305849] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6246 13:11:16.410621 <4>[ 7.314912] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6247 13:11:16.414096 <6>[ 7.320270] remoteproc remoteproc0: scp is available
6248 13:11:16.420296 <3>[ 7.324234] thermal_sys: Failed to find 'trips' node
6249 13:11:16.427604 <4>[ 7.327795] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6250 13:11:16.433717 <3>[ 7.332922] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6251 13:11:16.443603 <3>[ 7.332928] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6252 13:11:16.450220 <6>[ 7.341358] remoteproc remoteproc0: powering up scp
6253 13:11:16.457159 <4>[ 7.348653] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6254 13:11:16.466987 <4>[ 7.357566] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6255 13:11:16.473321 <6>[ 7.362091] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6256 13:11:16.480535 <6>[ 7.371067] Bluetooth: Core ver 2.22
6257 13:11:16.489950 <3>[ 7.371121] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6258 13:11:16.500916 <3>[ 7.371127] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6259 13:11:16.512373 <3>[ 7.371132] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6260 13:11:16.518640 <3>[ 7.371137] elan_i2c 2-0015: Error applying setting, reverse things back
6261 13:11:16.525288 <4>[ 7.371671] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6262 13:11:16.532252 <4>[ 7.371794] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6263 13:11:16.542133 <4>[ 7.371817] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6264 13:11:16.552099 <6>[ 7.372327] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6265 13:11:16.562397 <6>[ 7.376249] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6266 13:11:16.575078 <3>[ 7.378372] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6267 13:11:16.581874 <3>[ 7.378934] remoteproc remoteproc0: request_firmware failed: -2
6268 13:11:16.584936 <6>[ 7.404536] mc: Linux media interface: v0.10
6269 13:11:16.592510 <6>[ 7.406318] NET: Registered PF_BLUETOOTH protocol family
6270 13:11:16.602445 <6>[ 7.406490] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6271 13:11:16.608963 <5>[ 7.407844] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6272 13:11:16.618783 <3>[ 7.415841] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6273 13:11:16.625357 <6>[ 7.423869] Bluetooth: HCI device and connection manager initialized
6274 13:11:16.635402 <3>[ 7.431157] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6275 13:11:16.641911 <6>[ 7.434511] cs_system_cfg: CoreSight Configuration manager initialised
6276 13:11:16.648415 <5>[ 7.437393] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6277 13:11:16.658311 <5>[ 7.437812] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6278 13:11:16.668692 <4>[ 7.437866] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6279 13:11:16.672021 <6>[ 7.437872] cfg80211: failed to load regulatory.db
6280 13:11:16.678158 <6>[ 7.438227] Bluetooth: HCI socket layer initialized
6281 13:11:16.684899 <6>[ 7.438386] videodev: Linux video capture interface: v2.00
6282 13:11:16.691556 <6>[ 7.438483] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6283 13:11:16.698317 <6>[ 7.438563] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6284 13:11:16.708188 <6>[ 7.445498] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6285 13:11:16.715069 <3>[ 7.445746] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6286 13:11:16.725539 <3>[ 7.445838] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6287 13:11:16.735394 <3>[ 7.445847] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6288 13:11:16.742140 <3>[ 7.445855] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6289 13:11:16.752626 <3>[ 7.445865] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6290 13:11:16.762655 <3>[ 7.445874] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6291 13:11:16.772191 <3>[ 7.445915] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6292 13:11:16.775629 <6>[ 7.455430] Bluetooth: L2CAP socket layer initialized
6293 13:11:16.786600 <6>[ 7.465533] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6294 13:11:16.793133 <6>[ 7.476296] Bluetooth: SCO socket layer initialized
6295 13:11:16.799747 <6>[ 7.494893] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6296 13:11:16.809873 <6>[ 7.515959] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6297 13:11:16.819488 <6>[ 7.523488] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6298 13:11:16.823026 <6>[ 7.563918] Bluetooth: HCI UART driver ver 2.3
6299 13:11:16.833078 <6>[ 7.580737] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6300 13:11:16.846615 <3>[ 7.581738] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6301 13:11:16.850468 <6>[ 7.581862] Bluetooth: HCI UART protocol H4 registered
6302 13:11:16.857197 <6>[ 7.581983] Bluetooth: HCI UART protocol LL registered
6303 13:11:16.863744 <6>[ 7.582002] Bluetooth: HCI UART protocol Three-wire (H5) registered
6304 13:11:16.867096 <6>[ 7.582469] Bluetooth: HCI UART protocol Broadcom registered
6305 13:11:16.875762 <6>[ 7.582503] Bluetooth: HCI UART protocol QCA registered
6306 13:11:16.882160 <6>[ 7.582515] Bluetooth: HCI UART protocol Marvell registered
6307 13:11:16.888749 <6>[ 7.582690] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6308 13:11:16.895302 <6>[ 7.583813] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6309 13:11:16.905249 <6>[ 7.584178] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6310 13:11:16.912008 <6>[ 7.584471] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6311 13:11:16.918427 <6>[ 7.584758] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6312 13:11:16.928580 <6>[ 7.586612] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6313 13:11:16.935726 <6>[ 7.587873] Bluetooth: hci0: setting up ROME/QCA6390
6314 13:11:16.942115 <3>[ 7.592410] debugfs: File 'Playback' in directory 'dapm' already present!
6315 13:11:16.955417 <6>[ 7.603100] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6316 13:11:16.961985 <3>[ 7.605379] debugfs: File 'Capture' in directory 'dapm' already present!
6317 13:11:16.968384 <6>[ 7.613716] usbcore: registered new interface driver uvcvideo
6318 13:11:16.981572 <6>[ 7.622959] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6319 13:11:16.991649 <6>[ 7.645162] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6320 13:11:17.001889 <4>[ 7.749434] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6321 13:11:17.004852 <4>[ 7.749434] Fallback method does not support PEC.
6322 13:11:17.014841 <6>[ 7.759032] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6323 13:11:17.024675 <3>[ 7.768536] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6324 13:11:17.035095 <6>[ 7.770690] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6325 13:11:17.044625 <3>[ 7.787454] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6326 13:11:17.045039 done
6327 13:11:17.051613 <3>[ 7.802133] Bluetooth: hci0: Frame reassembly failed (-84)
6328 13:11:17.061155 Saving random seed: <6>[ 7.940530] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6329 13:11:17.061557 OK
6330 13:11:17.075650 Starting network: ip: RTNETLINK answers: File exists
6331 13:11:17.078347 FAIL
6332 13:11:17.126658 Starting dropbear sshd: <6>[ 8.035170] NET: Registered PF_INET6 protocol family
6333 13:11:17.144726 <6>[ 8.053154] Segment Routing with IPv6
6334 13:11:17.148103 <6>[ 8.058910] In-situ OAM (IOAM) with IPv6
6335 13:11:17.155457 OK
6336 13:11:17.167252 /bin/sh: can't access tty; job control turned off
6337 13:11:17.168271 Matched prompt #10: / #
6339 13:11:17.169234 Setting prompt string to ['/ #']
6340 13:11:17.169645 end: 2.2.5.1 login-action (duration 00:00:09) [common]
6342 13:11:17.170526 end: 2.2.5 auto-login-action (duration 00:00:09) [common]
6343 13:11:17.170939 start: 2.2.6 expect-shell-connection (timeout 00:03:55) [common]
6344 13:11:17.171246 Setting prompt string to ['/ #']
6345 13:11:17.171523 Forcing a shell prompt, looking for ['/ #']
6346 13:11:17.171801 Sending line: ''
6348 13:11:17.222753 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6349 13:11:17.223099 Waiting using forced prompt support (timeout 00:02:30)
6350 13:11:17.223530 / # <6>[ 8.080522] Bluetooth: hci0: QCA Product ID :0x00000008
6351 13:11:17.223844 <6>[ 8.089233] Bluetooth: hci0: QCA SOC Version :0x00000044
6352 13:11:17.224129 <6>[ 8.098109] Bluetooth: hci0: QCA ROM Version :0x00000302
6353 13:11:17.224405 <6>[ 8.106753] Bluetooth: hci0: QCA Patch Version:0x00000111
6354 13:11:17.224709 <6>[ 8.115141] Bluetooth: hci0: QCA controller version 0x00440302
6355 13:11:17.224979 <6>[ 8.123530] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6356 13:11:17.268790 <4>[ 8.132394] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6357 13:11:17.269203
6358 13:11:17.269511 / # <3>[ 8.143557] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6359 13:11:17.270137 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6360 13:11:17.270554 start: 2.2.7 export-device-env (timeout 00:03:55) [common]
6361 13:11:17.270970 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6362 13:11:17.271360 end: 2.2 depthcharge-retry (duration 00:01:05) [common]
6363 13:11:17.271773 end: 2 depthcharge-action (duration 00:01:05) [common]
6364 13:11:17.272185 start: 3 lava-test-retry (timeout 00:01:00) [common]
6365 13:11:17.272635 start: 3.1 lava-test-shell (timeout 00:01:00) [common]
6366 13:11:17.272985 Using namespace: common
6367 13:11:17.273541 Sending line: '#'
6369 13:11:17.374752 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:01:00)
6370 13:11:17.375289 <3>[ 8.153622] Bluetooth: hci0: QCA Failed to download patch (-2)
6371 13:11:17.379984 #
6372 13:11:17.380846 Using /lava-14879008
6373 13:11:17.381307 Sending line: 'export SHELL=/bin/sh'
6375 13:11:17.488520 / # export SHELL=/bin/sh
6376 13:11:17.489142 Sending line: '. /lava-14879008/environment'
6378 13:11:17.590728 / # <6>[ 8.403302] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6379 13:11:17.591253 . /lava-14879008/environment<4>[ 8.490997] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6380 13:11:17.595726
6381 13:11:17.596415 Sending line: '/lava-14879008/bin/lava-test-runner /lava-14879008/0'
6383 13:11:17.697754 Test shell timeout: 10s (minimum of the action and connection timeout)
6384 13:11:17.699810 / # <4>[ 8.510030] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6385 13:11:17.700350 <4>[ 8.525108] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6386 13:11:17.700784 <4>[ 8.538072] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6387 13:11:17.702874 /lava-14879008/bin/lava-test-runner /lava-14879008/0
6388 13:11:17.744844 + export 'TESTRUN_ID=0_dmesg'
6389 13:11:17.745258 +<8>[ 8.635779] <LAVA_SIGNAL_STARTRUN 0_dmesg 14879008_1.5.2.3.1>
6390 13:11:17.745599 cd /lava-14879008/0/tests/0_dmesg
6391 13:11:17.745902 + cat uuid
6392 13:11:17.746208 + UUID=14879008_1.5.2.3.1
6393 13:11:17.746513 + set +x
6394 13:11:17.747079 Received signal: <STARTRUN> 0_dmesg 14879008_1.5.2.3.1
6395 13:11:17.747403 Starting test lava.0_dmesg (14879008_1.5.2.3.1)
6396 13:11:17.747756 Skipping test definition patterns.
6397 13:11:17.748194 + KERNELCI_LAVA=y /bin/sh /opt/kernelci/dmesg.sh
6398 13:11:17.756222 <8>[ 8.660772] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0>
6399 13:11:17.756941 Received signal: <TESTCASE> TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0
6401 13:11:17.781151 <8>[ 8.686330] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0>
6402 13:11:17.781827 Received signal: <TESTCASE> TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0
6404 13:11:17.806616 <8>[ 8.711950] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0>
6405 13:11:17.807261 Received signal: <TESTCASE> TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0
6407 13:11:17.814476 + <8>[ 8.723033] <LAVA_SIGNAL_ENDRUN 0_dmesg 14879008_1.5.2.3.1>
6408 13:11:17.815109 Received signal: <ENDRUN> 0_dmesg 14879008_1.5.2.3.1
6409 13:11:17.815467 Ending use of test pattern.
6410 13:11:17.815758 Ending test lava.0_dmesg (14879008_1.5.2.3.1), duration 0.07
6412 13:11:17.817833 set +x
6413 13:11:17.821103 <LAVA_TEST_RUNNER EXIT>
6414 13:11:17.821722 ok: lava_test_shell seems to have completed
6415 13:11:17.822208 crit: pass
alert: pass
emerg: pass
6416 13:11:17.822592 end: 3.1 lava-test-shell (duration 00:00:01) [common]
6417 13:11:17.822973 end: 3 lava-test-retry (duration 00:00:01) [common]
6418 13:11:17.823372 start: 4 finalize (timeout 00:08:35) [common]
6419 13:11:17.823791 start: 4.1 power-off (timeout 00:00:30) [common]
6420 13:11:17.824402 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
6421 13:11:19.929499 >> Command sent successfully.
6422 13:11:19.933610 Returned 0 in 2 seconds
6423 13:11:19.933762 end: 4.1 power-off (duration 00:00:02) [common]
6425 13:11:19.933968 start: 4.2 read-feedback (timeout 00:08:33) [common]
6426 13:11:19.934132 Listened to connection for namespace 'common' for up to 1s
6427 13:11:20.935264 Finalising connection for namespace 'common'
6428 13:11:20.935780 Disconnecting from shell: Finalise
6429 13:11:20.936103 / #
6430 13:11:21.036856 end: 4.2 read-feedback (duration 00:00:01) [common]
6431 13:11:21.037535 end: 4 finalize (duration 00:00:03) [common]
6432 13:11:21.038245 Cleaning after the job
6433 13:11:21.038881 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879008/tftp-deploy-nkov5d4y/ramdisk
6434 13:11:21.051059 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879008/tftp-deploy-nkov5d4y/kernel
6435 13:11:21.071208 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879008/tftp-deploy-nkov5d4y/dtb
6436 13:11:21.071584 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879008/tftp-deploy-nkov5d4y/modules
6437 13:11:21.080319 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14879008
6438 13:11:21.126726 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14879008
6439 13:11:21.126897 Job finished correctly