Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 39
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 83
1 13:40:31.395046 lava-dispatcher, installed at version: 2024.05
2 13:40:31.395247 start: 0 validate
3 13:40:31.395359 Start time: 2024-07-18 13:40:31.395354+00:00 (UTC)
4 13:40:31.395498 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:40:31.395644 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-cros-ec%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 13:40:31.661928 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:40:31.662648 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 13:40:31.925649 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:40:31.926429 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 13:40:32.197210 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:40:32.197943 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
12 13:40:32.718156 validate duration: 1.32
14 13:40:32.719406 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:40:32.719994 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:40:32.720541 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:40:32.721328 Not decompressing ramdisk as can be used compressed.
18 13:40:32.721798 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-cros-ec/20240313.0/arm64/rootfs.cpio.gz
19 13:40:32.722142 saving as /var/lib/lava/dispatcher/tmp/14879031/tftp-deploy-lp0pwhql/ramdisk/rootfs.cpio.gz
20 13:40:32.722467 total size: 39026414 (37 MB)
21 13:40:32.727167 progress 0 % (0 MB)
22 13:40:32.757357 progress 5 % (1 MB)
23 13:40:32.771145 progress 10 % (3 MB)
24 13:40:32.781486 progress 15 % (5 MB)
25 13:40:32.791635 progress 20 % (7 MB)
26 13:40:32.801321 progress 25 % (9 MB)
27 13:40:32.811365 progress 30 % (11 MB)
28 13:40:32.820923 progress 35 % (13 MB)
29 13:40:32.830437 progress 40 % (14 MB)
30 13:40:32.839992 progress 45 % (16 MB)
31 13:40:32.849634 progress 50 % (18 MB)
32 13:40:32.859070 progress 55 % (20 MB)
33 13:40:32.868535 progress 60 % (22 MB)
34 13:40:32.878162 progress 65 % (24 MB)
35 13:40:32.887620 progress 70 % (26 MB)
36 13:40:32.897272 progress 75 % (27 MB)
37 13:40:32.906609 progress 80 % (29 MB)
38 13:40:32.916233 progress 85 % (31 MB)
39 13:40:32.925925 progress 90 % (33 MB)
40 13:40:32.935981 progress 95 % (35 MB)
41 13:40:32.946879 progress 100 % (37 MB)
42 13:40:32.947137 37 MB downloaded in 0.22 s (165.65 MB/s)
43 13:40:32.947310 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:40:32.947531 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:40:32.947609 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:40:32.947683 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:40:32.947814 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
49 13:40:32.947875 saving as /var/lib/lava/dispatcher/tmp/14879031/tftp-deploy-lp0pwhql/kernel/Image
50 13:40:32.947928 total size: 54813184 (52 MB)
51 13:40:32.947981 No compression specified
52 13:40:32.949105 progress 0 % (0 MB)
53 13:40:32.963416 progress 5 % (2 MB)
54 13:40:32.977344 progress 10 % (5 MB)
55 13:40:32.991117 progress 15 % (7 MB)
56 13:40:33.004977 progress 20 % (10 MB)
57 13:40:33.019075 progress 25 % (13 MB)
58 13:40:33.032895 progress 30 % (15 MB)
59 13:40:33.047146 progress 35 % (18 MB)
60 13:40:33.061310 progress 40 % (20 MB)
61 13:40:33.075724 progress 45 % (23 MB)
62 13:40:33.090204 progress 50 % (26 MB)
63 13:40:33.104460 progress 55 % (28 MB)
64 13:40:33.118340 progress 60 % (31 MB)
65 13:40:33.132537 progress 65 % (34 MB)
66 13:40:33.146514 progress 70 % (36 MB)
67 13:40:33.159569 progress 75 % (39 MB)
68 13:40:33.172699 progress 80 % (41 MB)
69 13:40:33.186128 progress 85 % (44 MB)
70 13:40:33.199495 progress 90 % (47 MB)
71 13:40:33.212658 progress 95 % (49 MB)
72 13:40:33.225914 progress 100 % (52 MB)
73 13:40:33.226126 52 MB downloaded in 0.28 s (187.90 MB/s)
74 13:40:33.226274 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:40:33.226482 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:40:33.226561 start: 1.3 download-retry (timeout 00:09:59) [common]
78 13:40:33.226635 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 13:40:33.226763 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 13:40:33.226829 saving as /var/lib/lava/dispatcher/tmp/14879031/tftp-deploy-lp0pwhql/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 13:40:33.226882 total size: 57695 (0 MB)
82 13:40:33.226934 No compression specified
83 13:40:33.227941 progress 56 % (0 MB)
84 13:40:33.228193 progress 100 % (0 MB)
85 13:40:33.228377 0 MB downloaded in 0.00 s (36.85 MB/s)
86 13:40:33.228486 end: 1.3.1 http-download (duration 00:00:00) [common]
88 13:40:33.228697 end: 1.3 download-retry (duration 00:00:00) [common]
89 13:40:33.228771 start: 1.4 download-retry (timeout 00:09:59) [common]
90 13:40:33.228844 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 13:40:33.228947 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
92 13:40:33.229008 saving as /var/lib/lava/dispatcher/tmp/14879031/tftp-deploy-lp0pwhql/modules/modules.tar
93 13:40:33.229081 total size: 8611320 (8 MB)
94 13:40:33.229161 Using unxz to decompress xz
95 13:40:33.230510 progress 0 % (0 MB)
96 13:40:33.250555 progress 5 % (0 MB)
97 13:40:33.274176 progress 10 % (0 MB)
98 13:40:33.297440 progress 15 % (1 MB)
99 13:40:33.320794 progress 20 % (1 MB)
100 13:40:33.343598 progress 25 % (2 MB)
101 13:40:33.366123 progress 30 % (2 MB)
102 13:40:33.387887 progress 35 % (2 MB)
103 13:40:33.413655 progress 40 % (3 MB)
104 13:40:33.437106 progress 45 % (3 MB)
105 13:40:33.460186 progress 50 % (4 MB)
106 13:40:33.483966 progress 55 % (4 MB)
107 13:40:33.508162 progress 60 % (4 MB)
108 13:40:33.531804 progress 65 % (5 MB)
109 13:40:33.557909 progress 70 % (5 MB)
110 13:40:33.585566 progress 75 % (6 MB)
111 13:40:33.613206 progress 80 % (6 MB)
112 13:40:33.637376 progress 85 % (7 MB)
113 13:40:33.661117 progress 90 % (7 MB)
114 13:40:33.684868 progress 95 % (7 MB)
115 13:40:33.708223 progress 100 % (8 MB)
116 13:40:33.713798 8 MB downloaded in 0.48 s (16.94 MB/s)
117 13:40:33.713960 end: 1.4.1 http-download (duration 00:00:00) [common]
119 13:40:33.714170 end: 1.4 download-retry (duration 00:00:00) [common]
120 13:40:33.714249 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 13:40:33.714326 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 13:40:33.714395 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 13:40:33.714465 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 13:40:33.714628 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8
125 13:40:33.714745 makedir: /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin
126 13:40:33.714833 makedir: /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/tests
127 13:40:33.714919 makedir: /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/results
128 13:40:33.715003 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-add-keys
129 13:40:33.715132 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-add-sources
130 13:40:33.715249 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-background-process-start
131 13:40:33.715362 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-background-process-stop
132 13:40:33.715484 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-common-functions
133 13:40:33.715597 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-echo-ipv4
134 13:40:33.715708 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-install-packages
135 13:40:33.715818 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-installed-packages
136 13:40:33.715925 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-os-build
137 13:40:33.716035 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-probe-channel
138 13:40:33.716143 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-probe-ip
139 13:40:33.716251 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-target-ip
140 13:40:33.716359 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-target-mac
141 13:40:33.716467 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-target-storage
142 13:40:33.716577 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-test-case
143 13:40:33.716686 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-test-event
144 13:40:33.716793 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-test-feedback
145 13:40:33.716901 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-test-raise
146 13:40:33.717009 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-test-reference
147 13:40:33.717117 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-test-runner
148 13:40:33.717235 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-test-set
149 13:40:33.717387 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-test-shell
150 13:40:33.717496 Updating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-install-packages (oe)
151 13:40:33.717632 Updating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/bin/lava-installed-packages (oe)
152 13:40:33.717746 Creating /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/environment
153 13:40:33.717834 LAVA metadata
154 13:40:33.717898 - LAVA_JOB_ID=14879031
155 13:40:33.717958 - LAVA_DISPATCHER_IP=192.168.201.1
156 13:40:33.718045 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 13:40:33.718103 skipped lava-vland-overlay
158 13:40:33.718169 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 13:40:33.718237 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 13:40:33.718289 skipped lava-multinode-overlay
161 13:40:33.718352 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 13:40:33.718420 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 13:40:33.718484 Loading test definitions
164 13:40:33.718558 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 13:40:33.718614 Using /lava-14879031 at stage 0
166 13:40:33.718896 uuid=14879031_1.5.2.3.1 testdef=None
167 13:40:33.718974 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 13:40:33.719048 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 13:40:33.719459 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 13:40:33.719651 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 13:40:33.720189 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 13:40:33.720398 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 13:40:33.720929 runner path: /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/0/tests/0_cros-ec test_uuid 14879031_1.5.2.3.1
176 13:40:33.721069 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 13:40:33.721298 Creating lava-test-runner.conf files
179 13:40:33.721354 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14879031/lava-overlay-6a410iz8/lava-14879031/0 for stage 0
180 13:40:33.721434 - 0_cros-ec
181 13:40:33.721521 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 13:40:33.721594 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 13:40:33.727656 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 13:40:33.727748 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 13:40:33.727824 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 13:40:33.727899 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 13:40:33.727973 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 13:40:34.800613 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 13:40:34.800757 start: 1.5.4 extract-modules (timeout 00:09:58) [common]
190 13:40:34.800835 extracting modules file /var/lib/lava/dispatcher/tmp/14879031/tftp-deploy-lp0pwhql/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14879031/extract-overlay-ramdisk-enibomtq/ramdisk
191 13:40:35.027434 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 13:40:35.027578 start: 1.5.5 apply-overlay-tftp (timeout 00:09:58) [common]
193 13:40:35.027662 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14879031/compress-overlay-cxeaclzx/overlay-1.5.2.4.tar.gz to ramdisk
194 13:40:35.027722 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14879031/compress-overlay-cxeaclzx/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14879031/extract-overlay-ramdisk-enibomtq/ramdisk
195 13:40:35.034186 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 13:40:35.034279 start: 1.5.6 configure-preseed-file (timeout 00:09:58) [common]
197 13:40:35.034356 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 13:40:35.034430 start: 1.5.7 compress-ramdisk (timeout 00:09:58) [common]
199 13:40:35.034492 Building ramdisk /var/lib/lava/dispatcher/tmp/14879031/extract-overlay-ramdisk-enibomtq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14879031/extract-overlay-ramdisk-enibomtq/ramdisk
200 13:40:35.775681 >> 335502 blocks
201 13:40:41.002709 rename /var/lib/lava/dispatcher/tmp/14879031/extract-overlay-ramdisk-enibomtq/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14879031/tftp-deploy-lp0pwhql/ramdisk/ramdisk.cpio.gz
202 13:40:41.002875 end: 1.5.7 compress-ramdisk (duration 00:00:06) [common]
203 13:40:41.002963 start: 1.5.8 prepare-kernel (timeout 00:09:52) [common]
204 13:40:41.003040 start: 1.5.8.1 prepare-fit (timeout 00:09:52) [common]
205 13:40:41.003115 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14879031/tftp-deploy-lp0pwhql/kernel/Image']
206 13:40:54.441746 Returned 0 in 13 seconds
207 13:40:54.441932 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14879031/tftp-deploy-lp0pwhql/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14879031/tftp-deploy-lp0pwhql/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14879031/tftp-deploy-lp0pwhql/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14879031/tftp-deploy-lp0pwhql/kernel/image.itb
208 13:40:55.187271 output: FIT description: Kernel Image image with one or more FDT blobs
209 13:40:55.187406 output: Created: Thu Jul 18 14:40:55 2024
210 13:40:55.187492 output: Image 0 (kernel-1)
211 13:40:55.187566 output: Description:
212 13:40:55.187636 output: Created: Thu Jul 18 14:40:55 2024
213 13:40:55.187706 output: Type: Kernel Image
214 13:40:55.187774 output: Compression: lzma compressed
215 13:40:55.187844 output: Data Size: 13114469 Bytes = 12807.10 KiB = 12.51 MiB
216 13:40:55.187929 output: Architecture: AArch64
217 13:40:55.188014 output: OS: Linux
218 13:40:55.188098 output: Load Address: 0x00000000
219 13:40:55.188181 output: Entry Point: 0x00000000
220 13:40:55.188265 output: Hash algo: crc32
221 13:40:55.188348 output: Hash value: a47b020b
222 13:40:55.188431 output: Image 1 (fdt-1)
223 13:40:55.188514 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 13:40:55.188597 output: Created: Thu Jul 18 14:40:55 2024
225 13:40:55.188680 output: Type: Flat Device Tree
226 13:40:55.188763 output: Compression: uncompressed
227 13:40:55.188845 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 13:40:55.188928 output: Architecture: AArch64
229 13:40:55.189016 output: Hash algo: crc32
230 13:40:55.189099 output: Hash value: a9713552
231 13:40:55.189182 output: Image 2 (ramdisk-1)
232 13:40:55.189314 output: Description: unavailable
233 13:40:55.189397 output: Created: Thu Jul 18 14:40:55 2024
234 13:40:55.189480 output: Type: RAMDisk Image
235 13:40:55.189562 output: Compression: uncompressed
236 13:40:55.189645 output: Data Size: 52134279 Bytes = 50912.38 KiB = 49.72 MiB
237 13:40:55.189727 output: Architecture: AArch64
238 13:40:55.189809 output: OS: Linux
239 13:40:55.189892 output: Load Address: unavailable
240 13:40:55.189974 output: Entry Point: unavailable
241 13:40:55.190056 output: Hash algo: crc32
242 13:40:55.190138 output: Hash value: 00f33969
243 13:40:55.190220 output: Default Configuration: 'conf-1'
244 13:40:55.190302 output: Configuration 0 (conf-1)
245 13:40:55.190384 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 13:40:55.190467 output: Kernel: kernel-1
247 13:40:55.190549 output: Init Ramdisk: ramdisk-1
248 13:40:55.190632 output: FDT: fdt-1
249 13:40:55.190714 output: Loadables: kernel-1
250 13:40:55.190796 output:
251 13:40:55.190935 end: 1.5.8.1 prepare-fit (duration 00:00:14) [common]
252 13:40:55.191045 end: 1.5.8 prepare-kernel (duration 00:00:14) [common]
253 13:40:55.191156 end: 1.5 prepare-tftp-overlay (duration 00:00:21) [common]
254 13:40:55.191265 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
255 13:40:55.191352 No LXC device requested
256 13:40:55.191462 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 13:40:55.191570 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
258 13:40:55.191675 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 13:40:55.191760 Checking files for TFTP limit of 4294967296 bytes.
260 13:40:55.192268 end: 1 tftp-deploy (duration 00:00:22) [common]
261 13:40:55.192387 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 13:40:55.192501 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 13:40:55.192633 substitutions:
264 13:40:55.192722 - {DTB}: 14879031/tftp-deploy-lp0pwhql/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 13:40:55.192812 - {INITRD}: 14879031/tftp-deploy-lp0pwhql/ramdisk/ramdisk.cpio.gz
266 13:40:55.192900 - {KERNEL}: 14879031/tftp-deploy-lp0pwhql/kernel/Image
267 13:40:55.192987 - {LAVA_MAC}: None
268 13:40:55.193073 - {PRESEED_CONFIG}: None
269 13:40:55.193158 - {PRESEED_LOCAL}: None
270 13:40:55.193249 - {RAMDISK}: 14879031/tftp-deploy-lp0pwhql/ramdisk/ramdisk.cpio.gz
271 13:40:55.193393 - {ROOT_PART}: None
272 13:40:55.193477 - {ROOT}: None
273 13:40:55.193562 - {SERVER_IP}: 192.168.201.1
274 13:40:55.193646 - {TEE}: None
275 13:40:55.193730 Parsed boot commands:
276 13:40:55.193812 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 13:40:55.194003 Parsed boot commands: tftpboot 192.168.201.1 14879031/tftp-deploy-lp0pwhql/kernel/image.itb 14879031/tftp-deploy-lp0pwhql/kernel/cmdline
278 13:40:55.194114 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 13:40:55.194223 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 13:40:55.194332 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 13:40:55.194438 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 13:40:55.194523 Not connected, no need to disconnect.
283 13:40:55.194629 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 13:40:55.194735 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 13:40:55.194820 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-5'
286 13:40:55.197791 Setting prompt string to ['lava-test: # ']
287 13:40:55.198122 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 13:40:55.198249 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 13:40:55.198370 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 13:40:55.198464 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 13:40:55.198753 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=reboot']
292 13:41:04.350838 >> Command sent successfully.
293 13:41:04.354976 Returned 0 in 9 seconds
294 13:41:04.355168 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
296 13:41:04.355432 end: 2.2.2 reset-device (duration 00:00:09) [common]
297 13:41:04.355544 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
298 13:41:04.355655 Setting prompt string to 'Starting depthcharge on Juniper...'
299 13:41:04.355730 Changing prompt to 'Starting depthcharge on Juniper...'
300 13:41:04.355807 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
301 13:41:04.356233 [Enter `^Ec?' for help]
302 13:41:10.760478 [DL] 00000000 00000000 010701
303 13:41:10.764965
304 13:41:10.765514
305 13:41:10.765855 F0: 102B 0000
306 13:41:10.766213
307 13:41:10.766525 F3: 1006 0033 [0200]
308 13:41:10.768716
309 13:41:10.769304 F3: 4001 00E0 [0200]
310 13:41:10.769670
311 13:41:10.769982 F3: 0000 0000
312 13:41:10.771169
313 13:41:10.771588 V0: 0000 0000 [0001]
314 13:41:10.771922
315 13:41:10.772229 00: 1027 0002
316 13:41:10.772552
317 13:41:10.774930 01: 0000 0000
318 13:41:10.775440
319 13:41:10.775772 BP: 0C00 0251 [0000]
320 13:41:10.776078
321 13:41:10.778054 G0: 1182 0000
322 13:41:10.778476
323 13:41:10.778830 EC: 0004 0000 [0001]
324 13:41:10.779139
325 13:41:10.781170 S7: 0000 0000 [0000]
326 13:41:10.781636
327 13:41:10.781965 CC: 0000 0000 [0001]
328 13:41:10.784725
329 13:41:10.785214 T0: 0000 00DB [000F]
330 13:41:10.785604
331 13:41:10.785914 Jump to BL
332 13:41:10.786209
333 13:41:10.820839
334 13:41:10.821384
335 13:41:10.827304 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
336 13:41:10.831151 ARM64: Exception handlers installed.
337 13:41:10.833916 ARM64: Testing exception
338 13:41:10.837336 ARM64: Done test exception
339 13:41:10.841505 WDT: Last reset was cold boot
340 13:41:10.842021 SPI0(PAD0) initialized at 992727 Hz
341 13:41:10.848458 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
342 13:41:10.848973 Manufacturer: ef
343 13:41:10.855085 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
344 13:41:10.867580 Probing TPM: . done!
345 13:41:10.868080 TPM ready after 0 ms
346 13:41:10.874746 Connected to device vid:did:rid of 1ae0:0028:00
347 13:41:10.880865 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
348 13:41:10.884461 Initialized TPM device CR50 revision 0
349 13:41:10.925899 tlcl_send_startup: Startup return code is 0
350 13:41:10.926127 TPM: setup succeeded
351 13:41:10.934098 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
352 13:41:10.937523 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
353 13:41:10.941378 in-header: 03 19 00 00 08 00 00 00
354 13:41:10.944024 in-data: a2 e0 47 00 13 00 00 00
355 13:41:10.947647 Chrome EC: UHEPI supported
356 13:41:10.954785 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
357 13:41:10.957721 in-header: 03 a1 00 00 08 00 00 00
358 13:41:10.961267 in-data: 84 60 60 10 00 00 00 00
359 13:41:10.961502 Phase 1
360 13:41:10.964636 FMAP: area GBB found @ 3f5000 (12032 bytes)
361 13:41:10.971213 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
362 13:41:10.974589 VB2:vb2_check_recovery() Recovery was requested manually
363 13:41:10.981641 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
364 13:41:10.987002 Recovery requested (1009000e)
365 13:41:10.993180 tlcl_extend: response is 0
366 13:41:11.001464 tlcl_extend: response is 0
367 13:41:11.025881
368 13:41:11.026431
369 13:41:11.032770 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
370 13:41:11.036413 ARM64: Exception handlers installed.
371 13:41:11.039286 ARM64: Testing exception
372 13:41:11.042713 ARM64: Done test exception
373 13:41:11.058074 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xaa70, sec=0x201e
374 13:41:11.065261 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
375 13:41:11.068680 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
376 13:41:11.076352 [RTC]rtc_get_frequency_meter,134: input=0xf, output=778
377 13:41:11.083138 [RTC]rtc_get_frequency_meter,134: input=0x17, output=957
378 13:41:11.090639 [RTC]rtc_get_frequency_meter,134: input=0x13, output=867
379 13:41:11.097172 [RTC]rtc_get_frequency_meter,134: input=0x11, output=823
380 13:41:11.104670 [RTC]rtc_get_frequency_meter,134: input=0x10, output=799
381 13:41:11.111115 [RTC]rtc_get_frequency_meter,134: input=0xf, output=777
382 13:41:11.118592 [RTC]rtc_get_frequency_meter,134: input=0x10, output=800
383 13:41:11.121624 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xaa70
384 13:41:11.129053 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
385 13:41:11.131732 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
386 13:41:11.135327 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
387 13:41:11.138574 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
388 13:41:11.141704 in-header: 03 19 00 00 08 00 00 00
389 13:41:11.145177 in-data: a2 e0 47 00 13 00 00 00
390 13:41:11.148894 Chrome EC: UHEPI supported
391 13:41:11.155387 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
392 13:41:11.159188 in-header: 03 a1 00 00 08 00 00 00
393 13:41:11.162968 in-data: 84 60 60 10 00 00 00 00
394 13:41:11.165464 Skip loading cached calibration data
395 13:41:11.172173 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
396 13:41:11.175515 in-header: 03 a1 00 00 08 00 00 00
397 13:41:11.179078 in-data: 84 60 60 10 00 00 00 00
398 13:41:11.185343 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
399 13:41:11.189075 in-header: 03 a1 00 00 08 00 00 00
400 13:41:11.191973 in-data: 84 60 60 10 00 00 00 00
401 13:41:11.196222 ADC[3]: Raw value=1042439 ID=8
402 13:41:11.196708 Manufacturer: ef
403 13:41:11.203048 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
404 13:41:11.205904 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
405 13:41:11.209183 CBFS @ 21000 size 3d4000
406 13:41:11.212331 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
407 13:41:11.218794 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
408 13:41:11.222039 CBFS: Found @ offset 3c880 size 4b
409 13:41:11.222453 DRAM-K: Full Calibration
410 13:41:11.229120 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
411 13:41:11.229644 CBFS @ 21000 size 3d4000
412 13:41:11.235728 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
413 13:41:11.238918 CBFS: Locating 'fallback/dram'
414 13:41:11.242375 CBFS: Found @ offset 24b00 size 12268
415 13:41:11.270455 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
416 13:41:11.273250 ddr_geometry: 1, config: 0x0
417 13:41:11.276615 header.status = 0x0
418 13:41:11.280142 header.magic = 0x44524d4b (expected: 0x44524d4b)
419 13:41:11.283306 header.version = 0x5 (expected: 0x5)
420 13:41:11.286570 header.size = 0x8f0 (expected: 0x8f0)
421 13:41:11.286884 header.config = 0x0
422 13:41:11.289751 header.flags = 0x0
423 13:41:11.290140 header.checksum = 0x0
424 13:41:11.297383 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
425 13:41:11.303608 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
426 13:41:11.306928 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
427 13:41:11.310433 ddr_geometry:1
428 13:41:11.310860 [EMI] new MDL number = 1
429 13:41:11.313800 dram_cbt_mode_extern: 0
430 13:41:11.317721 dram_cbt_mode [RK0]: 0, [RK1]: 0
431 13:41:11.323580 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
432 13:41:11.324013
433 13:41:11.324347
434 13:41:11.324675 [Bianco] ETT version 0.0.0.1
435 13:41:11.330206 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
436 13:41:11.330715
437 13:41:11.333907 vSetVcoreByFreq with vcore:762500, freq=1600
438 13:41:11.334420
439 13:41:11.334799 [DramcInit]
440 13:41:11.337199 AutoRefreshCKEOff AutoREF OFF
441 13:41:11.340555 DDRPhyPLLSetting-CKEOFF
442 13:41:11.340986 DDRPhyPLLSetting-CKEON
443 13:41:11.343850
444 13:41:11.344273 Enable WDQS
445 13:41:11.346996 [ModeRegInit_LP4] CH0 RK0
446 13:41:11.350687 Write Rank0 MR13 =0x18
447 13:41:11.351194 Write Rank0 MR12 =0x5d
448 13:41:11.354014 Write Rank0 MR1 =0x56
449 13:41:11.357495 Write Rank0 MR2 =0x1a
450 13:41:11.357966 Write Rank0 MR11 =0x0
451 13:41:11.360600 Write Rank0 MR22 =0x38
452 13:41:11.361061 Write Rank0 MR14 =0x5d
453 13:41:11.363763 Write Rank0 MR3 =0x30
454 13:41:11.367459 Write Rank0 MR13 =0x58
455 13:41:11.367950 Write Rank0 MR12 =0x5d
456 13:41:11.370764 Write Rank0 MR1 =0x56
457 13:41:11.371153 Write Rank0 MR2 =0x2d
458 13:41:11.374535 Write Rank0 MR11 =0x23
459 13:41:11.377685 Write Rank0 MR22 =0x34
460 13:41:11.378175 Write Rank0 MR14 =0x10
461 13:41:11.380717 Write Rank0 MR3 =0x30
462 13:41:11.381103 Write Rank0 MR13 =0xd8
463 13:41:11.384598 [ModeRegInit_LP4] CH0 RK1
464 13:41:11.387172 Write Rank1 MR13 =0x18
465 13:41:11.387565 Write Rank1 MR12 =0x5d
466 13:41:11.391175 Write Rank1 MR1 =0x56
467 13:41:11.394234 Write Rank1 MR2 =0x1a
468 13:41:11.394705 Write Rank1 MR11 =0x0
469 13:41:11.397654 Write Rank1 MR22 =0x38
470 13:41:11.398145 Write Rank1 MR14 =0x5d
471 13:41:11.401476 Write Rank1 MR3 =0x30
472 13:41:11.404310 Write Rank1 MR13 =0x58
473 13:41:11.404781 Write Rank1 MR12 =0x5d
474 13:41:11.407721 Write Rank1 MR1 =0x56
475 13:41:11.408193 Write Rank1 MR2 =0x2d
476 13:41:11.411493 Write Rank1 MR11 =0x23
477 13:41:11.414745 Write Rank1 MR22 =0x34
478 13:41:11.415249 Write Rank1 MR14 =0x10
479 13:41:11.418136 Write Rank1 MR3 =0x30
480 13:41:11.418598 Write Rank1 MR13 =0xd8
481 13:41:11.421199 [ModeRegInit_LP4] CH1 RK0
482 13:41:11.425148 Write Rank0 MR13 =0x18
483 13:41:11.425656 Write Rank0 MR12 =0x5d
484 13:41:11.427959 Write Rank0 MR1 =0x56
485 13:41:11.431883 Write Rank0 MR2 =0x1a
486 13:41:11.432353 Write Rank0 MR11 =0x0
487 13:41:11.434584 Write Rank0 MR22 =0x38
488 13:41:11.434970 Write Rank0 MR14 =0x5d
489 13:41:11.438376 Write Rank0 MR3 =0x30
490 13:41:11.441989 Write Rank0 MR13 =0x58
491 13:41:11.442474 Write Rank0 MR12 =0x5d
492 13:41:11.445062 Write Rank0 MR1 =0x56
493 13:41:11.445531 Write Rank0 MR2 =0x2d
494 13:41:11.448277 Write Rank0 MR11 =0x23
495 13:41:11.451598 Write Rank0 MR22 =0x34
496 13:41:11.452124 Write Rank0 MR14 =0x10
497 13:41:11.455300 Write Rank0 MR3 =0x30
498 13:41:11.455775 Write Rank0 MR13 =0xd8
499 13:41:11.458283 [ModeRegInit_LP4] CH1 RK1
500 13:41:11.461725 Write Rank1 MR13 =0x18
501 13:41:11.462113 Write Rank1 MR12 =0x5d
502 13:41:11.465175 Write Rank1 MR1 =0x56
503 13:41:11.465689 Write Rank1 MR2 =0x1a
504 13:41:11.468440 Write Rank1 MR11 =0x0
505 13:41:11.472196 Write Rank1 MR22 =0x38
506 13:41:11.472673 Write Rank1 MR14 =0x5d
507 13:41:11.475446 Write Rank1 MR3 =0x30
508 13:41:11.475913 Write Rank1 MR13 =0x58
509 13:41:11.478328 Write Rank1 MR12 =0x5d
510 13:41:11.481541 Write Rank1 MR1 =0x56
511 13:41:11.481933 Write Rank1 MR2 =0x2d
512 13:41:11.484668 Write Rank1 MR11 =0x23
513 13:41:11.488625 Write Rank1 MR22 =0x34
514 13:41:11.489011 Write Rank1 MR14 =0x10
515 13:41:11.491803 Write Rank1 MR3 =0x30
516 13:41:11.492189 Write Rank1 MR13 =0xd8
517 13:41:11.495437 match AC timing 3
518 13:41:11.505917 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
519 13:41:11.506434 [MiockJmeterHQA]
520 13:41:11.508465 vSetVcoreByFreq with vcore:762500, freq=1600
521 13:41:11.613280
522 13:41:11.613796 MIOCK jitter meter ch=0
523 13:41:11.614127
524 13:41:11.616662 1T = (100-18) = 82 dly cells
525 13:41:11.623691 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
526 13:41:11.626654 vSetVcoreByFreq with vcore:725000, freq=1200
527 13:41:11.723811
528 13:41:11.724321 MIOCK jitter meter ch=0
529 13:41:11.724657
530 13:41:11.726879 1T = (94-16) = 78 dly cells
531 13:41:11.733648 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
532 13:41:11.737009 vSetVcoreByFreq with vcore:725000, freq=800
533 13:41:11.834084
534 13:41:11.834643 MIOCK jitter meter ch=0
535 13:41:11.834994
536 13:41:11.837529 1T = (94-16) = 78 dly cells
537 13:41:11.843830 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
538 13:41:11.847934 vSetVcoreByFreq with vcore:762500, freq=1600
539 13:41:11.850947 vSetVcoreByFreq with vcore:762500, freq=1600
540 13:41:11.851375
541 13:41:11.851711 K DRVP
542 13:41:11.854174 1. OCD DRVP=0 CALOUT=0
543 13:41:11.857853 1. OCD DRVP=1 CALOUT=0
544 13:41:11.858375 1. OCD DRVP=2 CALOUT=0
545 13:41:11.860701 1. OCD DRVP=3 CALOUT=0
546 13:41:11.861214 1. OCD DRVP=4 CALOUT=0
547 13:41:11.864574 1. OCD DRVP=5 CALOUT=0
548 13:41:11.867772 1. OCD DRVP=6 CALOUT=0
549 13:41:11.868291 1. OCD DRVP=7 CALOUT=0
550 13:41:11.871121 1. OCD DRVP=8 CALOUT=1
551 13:41:11.871891
552 13:41:11.873988 1. OCD DRVP calibration OK! DRVP=8
553 13:41:11.874421
554 13:41:11.874831
555 13:41:11.875157
556 13:41:11.875459 K ODTN
557 13:41:11.877304 3. OCD ODTN=0 ,CALOUT=1
558 13:41:11.877743 3. OCD ODTN=1 ,CALOUT=1
559 13:41:11.881057 3. OCD ODTN=2 ,CALOUT=1
560 13:41:11.884142 3. OCD ODTN=3 ,CALOUT=1
561 13:41:11.884577 3. OCD ODTN=4 ,CALOUT=1
562 13:41:11.887692 3. OCD ODTN=5 ,CALOUT=1
563 13:41:11.891142 3. OCD ODTN=6 ,CALOUT=1
564 13:41:11.891591 3. OCD ODTN=7 ,CALOUT=0
565 13:41:11.891935
566 13:41:11.894181 3. OCD ODTN calibration OK! ODTN=7
567 13:41:11.894591
568 13:41:11.897941 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
569 13:41:11.904432 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
570 13:41:11.908053 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
571 13:41:11.908646
572 13:41:11.909102 K DRVP
573 13:41:11.911041 1. OCD DRVP=0 CALOUT=0
574 13:41:11.914516 1. OCD DRVP=1 CALOUT=0
575 13:41:11.914908 1. OCD DRVP=2 CALOUT=0
576 13:41:11.917767 1. OCD DRVP=3 CALOUT=0
577 13:41:11.918167 1. OCD DRVP=4 CALOUT=0
578 13:41:11.921373 1. OCD DRVP=5 CALOUT=0
579 13:41:11.924604 1. OCD DRVP=6 CALOUT=0
580 13:41:11.925083 1. OCD DRVP=7 CALOUT=0
581 13:41:11.927766 1. OCD DRVP=8 CALOUT=0
582 13:41:11.931119 1. OCD DRVP=9 CALOUT=1
583 13:41:11.931512
584 13:41:11.934648 1. OCD DRVP calibration OK! DRVP=9
585 13:41:11.935043
586 13:41:11.935472
587 13:41:11.935885
588 13:41:11.936167 K ODTN
589 13:41:11.937827 3. OCD ODTN=0 ,CALOUT=1
590 13:41:11.938255 3. OCD ODTN=1 ,CALOUT=1
591 13:41:11.941359 3. OCD ODTN=2 ,CALOUT=1
592 13:41:11.941756 3. OCD ODTN=3 ,CALOUT=1
593 13:41:11.944713 3. OCD ODTN=4 ,CALOUT=1
594 13:41:11.948296 3. OCD ODTN=5 ,CALOUT=1
595 13:41:11.948763 3. OCD ODTN=6 ,CALOUT=1
596 13:41:11.951097 3. OCD ODTN=7 ,CALOUT=1
597 13:41:11.954418 3. OCD ODTN=8 ,CALOUT=1
598 13:41:11.954808 3. OCD ODTN=9 ,CALOUT=1
599 13:41:11.957958 3. OCD ODTN=10 ,CALOUT=1
600 13:41:11.961378 3. OCD ODTN=11 ,CALOUT=1
601 13:41:11.961902 3. OCD ODTN=12 ,CALOUT=1
602 13:41:11.964785 3. OCD ODTN=13 ,CALOUT=0
603 13:41:11.965492
604 13:41:11.968224 3. OCD ODTN calibration OK! ODTN=13
605 13:41:11.968883
606 13:41:11.971400 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=13
607 13:41:11.974871 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=13
608 13:41:11.981849 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=13 (After Adjust)
609 13:41:11.982310
610 13:41:11.982618 [DramcInit]
611 13:41:11.984797 AutoRefreshCKEOff AutoREF OFF
612 13:41:11.988144 DDRPhyPLLSetting-CKEOFF
613 13:41:11.988530 DDRPhyPLLSetting-CKEON
614 13:41:11.988829
615 13:41:11.991412 Enable WDQS
616 13:41:11.991800 ==
617 13:41:11.995011 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
618 13:41:11.998110 fsp= 1, odt_onoff= 1, Byte mode= 0
619 13:41:11.998499 ==
620 13:41:12.001717 [Duty_Offset_Calibration]
621 13:41:12.002104
622 13:41:12.004910 ===========================
623 13:41:12.005372 B0:1 B1:0 CA:0
624 13:41:12.029059 ==
625 13:41:12.032458 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
626 13:41:12.036360 fsp= 1, odt_onoff= 1, Byte mode= 0
627 13:41:12.036823 ==
628 13:41:12.039289 [Duty_Offset_Calibration]
629 13:41:12.039674
630 13:41:12.042515 ===========================
631 13:41:12.042963 B0:1 B1:0 CA:-1
632 13:41:12.075730 [ModeRegInit_LP4] CH0 RK0
633 13:41:12.079208 Write Rank0 MR13 =0x18
634 13:41:12.079713 Write Rank0 MR12 =0x5d
635 13:41:12.082852 Write Rank0 MR1 =0x56
636 13:41:12.085953 Write Rank0 MR2 =0x1a
637 13:41:12.086383 Write Rank0 MR11 =0x0
638 13:41:12.089329 Write Rank0 MR22 =0x38
639 13:41:12.089835 Write Rank0 MR14 =0x5d
640 13:41:12.092720 Write Rank0 MR3 =0x30
641 13:41:12.095987 Write Rank0 MR13 =0x58
642 13:41:12.096494 Write Rank0 MR12 =0x5d
643 13:41:12.098928 Write Rank0 MR1 =0x56
644 13:41:12.099354 Write Rank0 MR2 =0x2d
645 13:41:12.102389 Write Rank0 MR11 =0x23
646 13:41:12.105896 Write Rank0 MR22 =0x34
647 13:41:12.106401 Write Rank0 MR14 =0x10
648 13:41:12.109836 Write Rank0 MR3 =0x30
649 13:41:12.110343 Write Rank0 MR13 =0xd8
650 13:41:12.113065 [ModeRegInit_LP4] CH0 RK1
651 13:41:12.115826 Write Rank1 MR13 =0x18
652 13:41:12.116330 Write Rank1 MR12 =0x5d
653 13:41:12.119114 Write Rank1 MR1 =0x56
654 13:41:12.122279 Write Rank1 MR2 =0x1a
655 13:41:12.122721 Write Rank1 MR11 =0x0
656 13:41:12.125883 Write Rank1 MR22 =0x38
657 13:41:12.126311 Write Rank1 MR14 =0x5d
658 13:41:12.129853 Write Rank1 MR3 =0x30
659 13:41:12.132986 Write Rank1 MR13 =0x58
660 13:41:12.133691 Write Rank1 MR12 =0x5d
661 13:41:12.136526 Write Rank1 MR1 =0x56
662 13:41:12.137035 Write Rank1 MR2 =0x2d
663 13:41:12.139431 Write Rank1 MR11 =0x23
664 13:41:12.142658 Write Rank1 MR22 =0x34
665 13:41:12.143218 Write Rank1 MR14 =0x10
666 13:41:12.146253 Write Rank1 MR3 =0x30
667 13:41:12.146683 Write Rank1 MR13 =0xd8
668 13:41:12.149271 [ModeRegInit_LP4] CH1 RK0
669 13:41:12.153006 Write Rank0 MR13 =0x18
670 13:41:12.153550 Write Rank0 MR12 =0x5d
671 13:41:12.156497 Write Rank0 MR1 =0x56
672 13:41:12.159712 Write Rank0 MR2 =0x1a
673 13:41:12.160146 Write Rank0 MR11 =0x0
674 13:41:12.163274 Write Rank0 MR22 =0x38
675 13:41:12.163776 Write Rank0 MR14 =0x5d
676 13:41:12.165998 Write Rank0 MR3 =0x30
677 13:41:12.169734 Write Rank0 MR13 =0x58
678 13:41:12.170241 Write Rank0 MR12 =0x5d
679 13:41:12.173390 Write Rank0 MR1 =0x56
680 13:41:12.173905 Write Rank0 MR2 =0x2d
681 13:41:12.176756 Write Rank0 MR11 =0x23
682 13:41:12.180719 Write Rank0 MR22 =0x34
683 13:41:12.181285 Write Rank0 MR14 =0x10
684 13:41:12.183283 Write Rank0 MR3 =0x30
685 13:41:12.183708 Write Rank0 MR13 =0xd8
686 13:41:12.186684 [ModeRegInit_LP4] CH1 RK1
687 13:41:12.189928 Write Rank1 MR13 =0x18
688 13:41:12.190355 Write Rank1 MR12 =0x5d
689 13:41:12.192956 Write Rank1 MR1 =0x56
690 13:41:12.193430 Write Rank1 MR2 =0x1a
691 13:41:12.197326 Write Rank1 MR11 =0x0
692 13:41:12.199700 Write Rank1 MR22 =0x38
693 13:41:12.200085 Write Rank1 MR14 =0x5d
694 13:41:12.203220 Write Rank1 MR3 =0x30
695 13:41:12.206475 Write Rank1 MR13 =0x58
696 13:41:12.206862 Write Rank1 MR12 =0x5d
697 13:41:12.209838 Write Rank1 MR1 =0x56
698 13:41:12.210225 Write Rank1 MR2 =0x2d
699 13:41:12.213484 Write Rank1 MR11 =0x23
700 13:41:12.216766 Write Rank1 MR22 =0x34
701 13:41:12.217150 Write Rank1 MR14 =0x10
702 13:41:12.220207 Write Rank1 MR3 =0x30
703 13:41:12.220652 Write Rank1 MR13 =0xd8
704 13:41:12.223533 match AC timing 3
705 13:41:12.233620 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
706 13:41:12.234089 DramC Write-DBI off
707 13:41:12.237202 DramC Read-DBI off
708 13:41:12.237740 Write Rank0 MR13 =0x59
709 13:41:12.240160 ==
710 13:41:12.243281 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
711 13:41:12.247013 fsp= 1, odt_onoff= 1, Byte mode= 0
712 13:41:12.247401 ==
713 13:41:12.250092 === u2Vref_new: 0x56 --> 0x2d
714 13:41:12.253291 === u2Vref_new: 0x58 --> 0x38
715 13:41:12.256577 === u2Vref_new: 0x5a --> 0x39
716 13:41:12.260577 === u2Vref_new: 0x5c --> 0x3c
717 13:41:12.261050 === u2Vref_new: 0x5e --> 0x3d
718 13:41:12.263826 === u2Vref_new: 0x60 --> 0xa0
719 13:41:12.267343 [CA 0] Center 33 (4~63) winsize 60
720 13:41:12.270727 [CA 1] Center 34 (5~63) winsize 59
721 13:41:12.274140 [CA 2] Center 27 (0~55) winsize 56
722 13:41:12.277328 [CA 3] Center 23 (-4~51) winsize 56
723 13:41:12.280659 [CA 4] Center 24 (-3~52) winsize 56
724 13:41:12.284116 [CA 5] Center 28 (-1~58) winsize 60
725 13:41:12.284573
726 13:41:12.287477 [CATrainingPosCal] consider 1 rank data
727 13:41:12.290800 u2DelayCellTimex100 = 762/100 ps
728 13:41:12.294106 CA0 delay=33 (4~63),Diff = 10 PI (12 cell)
729 13:41:12.297614 CA1 delay=34 (5~63),Diff = 11 PI (14 cell)
730 13:41:12.300749 CA2 delay=27 (0~55),Diff = 4 PI (5 cell)
731 13:41:12.304825 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
732 13:41:12.310938 CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)
733 13:41:12.314284 CA5 delay=28 (-1~58),Diff = 5 PI (6 cell)
734 13:41:12.314711
735 13:41:12.317515 CA PerBit enable=1, Macro0, CA PI delay=23
736 13:41:12.321145 === u2Vref_new: 0x58 --> 0x38
737 13:41:12.321651
738 13:41:12.321952 Vref(ca) range 1: 24
739 13:41:12.322230
740 13:41:12.324239 CS Dly= 10 (41-0-32)
741 13:41:12.327908 Write Rank0 MR13 =0xd8
742 13:41:12.328291 Write Rank0 MR13 =0xd8
743 13:41:12.331386 Write Rank0 MR12 =0x58
744 13:41:12.332048 Write Rank1 MR13 =0x59
745 13:41:12.332594 ==
746 13:41:12.337671 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
747 13:41:12.341011 fsp= 1, odt_onoff= 1, Byte mode= 0
748 13:41:12.341433 ==
749 13:41:12.344695 === u2Vref_new: 0x56 --> 0x2d
750 13:41:12.348449 === u2Vref_new: 0x58 --> 0x38
751 13:41:12.351407 === u2Vref_new: 0x5a --> 0x39
752 13:41:12.351794 === u2Vref_new: 0x5c --> 0x3c
753 13:41:12.354856 === u2Vref_new: 0x5e --> 0x3d
754 13:41:12.358257 === u2Vref_new: 0x60 --> 0xa0
755 13:41:12.361922 [CA 0] Center 34 (5~63) winsize 59
756 13:41:12.365780 [CA 1] Center 34 (5~63) winsize 59
757 13:41:12.368553 [CA 2] Center 28 (0~56) winsize 57
758 13:41:12.372083 [CA 3] Center 23 (-4~51) winsize 56
759 13:41:12.374930 [CA 4] Center 24 (-3~52) winsize 56
760 13:41:12.378897 [CA 5] Center 29 (0~58) winsize 59
761 13:41:12.379360
762 13:41:12.381914 [CATrainingPosCal] consider 2 rank data
763 13:41:12.385522 u2DelayCellTimex100 = 762/100 ps
764 13:41:12.388606 CA0 delay=34 (5~63),Diff = 11 PI (14 cell)
765 13:41:12.391868 CA1 delay=34 (5~63),Diff = 11 PI (14 cell)
766 13:41:12.395507 CA2 delay=27 (0~55),Diff = 4 PI (5 cell)
767 13:41:12.398944 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
768 13:41:12.402116 CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)
769 13:41:12.408814 CA5 delay=29 (0~58),Diff = 6 PI (7 cell)
770 13:41:12.409380
771 13:41:12.412081 CA PerBit enable=1, Macro0, CA PI delay=23
772 13:41:12.412507 === u2Vref_new: 0x56 --> 0x2d
773 13:41:12.415676
774 13:41:12.416209 Vref(ca) range 1: 22
775 13:41:12.416547
776 13:41:12.418976 CS Dly= 7 (38-0-32)
777 13:41:12.419397 Write Rank1 MR13 =0xd8
778 13:41:12.422121 Write Rank1 MR13 =0xd8
779 13:41:12.425654 Write Rank1 MR12 =0x56
780 13:41:12.429167 [RankSwap] Rank num 2, (Multi 1), Rank 0
781 13:41:12.429579 Write Rank0 MR2 =0xad
782 13:41:12.432443 [Write Leveling]
783 13:41:12.436095 delay byte0 byte1 byte2 byte3
784 13:41:12.436557
785 13:41:12.436861 10 0 0
786 13:41:12.437144 11 0 0
787 13:41:12.438832 12 0 0
788 13:41:12.439309 13 0 0
789 13:41:12.442450 14 0 0
790 13:41:12.442859 15 0 0
791 13:41:12.445686 16 0 0
792 13:41:12.446073 17 0 0
793 13:41:12.446382 18 0 0
794 13:41:12.449141 19 0 0
795 13:41:12.449561 20 0 0
796 13:41:12.452643 21 0 0
797 13:41:12.453032 22 0 0
798 13:41:12.453369 23 0 0
799 13:41:12.455596 24 0 0
800 13:41:12.455983 25 0 0
801 13:41:12.458918 26 0 0
802 13:41:12.459305 27 0 ff
803 13:41:12.462854 28 0 ff
804 13:41:12.463324 29 0 ff
805 13:41:12.463628 30 0 ff
806 13:41:12.465608 31 0 ff
807 13:41:12.465995 32 0 ff
808 13:41:12.469146 33 ff ff
809 13:41:12.469570 34 ff ff
810 13:41:12.472768 35 ff ff
811 13:41:12.473151 36 ff ff
812 13:41:12.475700 37 ff ff
813 13:41:12.476117 38 ff ff
814 13:41:12.476422 39 ff ff
815 13:41:12.482505 pass bytecount = 0xff (0xff: all bytes pass)
816 13:41:12.483079
817 13:41:12.483581 DQS0 dly: 33
818 13:41:12.483888 DQS1 dly: 27
819 13:41:12.485847 Write Rank0 MR2 =0x2d
820 13:41:12.489344 [RankSwap] Rank num 2, (Multi 1), Rank 0
821 13:41:12.492672 Write Rank0 MR1 =0xd6
822 13:41:12.493063 [Gating]
823 13:41:12.493382 ==
824 13:41:12.499540 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
825 13:41:12.500057 fsp= 1, odt_onoff= 1, Byte mode= 0
826 13:41:12.502535 ==
827 13:41:12.506012 3 1 0 |3534 3434 |(11 11)(11 11) |(1 1)(1 1)| 0
828 13:41:12.509451 3 1 4 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
829 13:41:12.512546 3 1 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
830 13:41:12.519749 3 1 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
831 13:41:12.522600 3 1 16 |3534 3635 |(11 11)(11 11) |(0 0)(0 1)| 0
832 13:41:12.526413 3 1 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
833 13:41:12.533336 3 1 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
834 13:41:12.536319 3 1 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
835 13:41:12.539734 3 2 0 |3d3d b0a |(11 11)(11 11) |(1 1)(1 1)| 0
836 13:41:12.543571 3 2 4 |3d3d 706 |(11 11)(11 11) |(1 1)(1 1)| 0
837 13:41:12.549709 3 2 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
838 13:41:12.552891 3 2 12 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
839 13:41:12.556827 3 2 16 |3d3d 3b3b |(11 11)(11 11) |(1 1)(1 1)| 0
840 13:41:12.563411 3 2 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
841 13:41:12.566437 3 2 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
842 13:41:12.570177 3 2 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
843 13:41:12.576514 3 3 0 |3d3d 908 |(11 11)(11 11) |(1 1)(1 1)| 0
844 13:41:12.580506 3 3 4 |3d3d 706 |(11 11)(11 11) |(1 1)(1 1)| 0
845 13:41:12.583373 3 3 8 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
846 13:41:12.586557 [Byte 1] Lead/lag falling Transition (3, 3, 8)
847 13:41:12.593744 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
848 13:41:12.596875 [Byte 0] Lead/lag Transition tap number (1)
849 13:41:12.600782 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
850 13:41:12.603784 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
851 13:41:12.610277 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
852 13:41:12.613764 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
853 13:41:12.616982 3 4 0 |1716 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
854 13:41:12.623793 3 4 4 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
855 13:41:12.627385 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
856 13:41:12.630670 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
857 13:41:12.633641 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
858 13:41:12.640304 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 13:41:12.643744 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 13:41:12.647011 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 13:41:12.653969 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 13:41:12.657556 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 13:41:12.660547 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 13:41:12.667698 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 13:41:12.671131 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 13:41:12.673950 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 13:41:12.677331 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 13:41:12.684254 [Byte 0] Lead/lag falling Transition (3, 5, 24)
869 13:41:12.687467 [Byte 1] Lead/lag falling Transition (3, 5, 24)
870 13:41:12.690791 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
871 13:41:12.694387 [Byte 0] Lead/lag Transition tap number (2)
872 13:41:12.701183 [Byte 1] Lead/lag Transition tap number (2)
873 13:41:12.704328 3 6 0 |3838 b0a |(11 11)(11 11) |(0 0)(0 0)| 0
874 13:41:12.707476 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
875 13:41:12.710910 [Byte 0]First pass (3, 6, 4)
876 13:41:12.714239 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
877 13:41:12.717581 [Byte 1]First pass (3, 6, 8)
878 13:41:12.720801 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
879 13:41:12.724672 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 13:41:12.727749 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 13:41:12.734683 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 13:41:12.737724 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 13:41:12.740916 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 13:41:12.744461 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 13:41:12.747632 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 13:41:12.754451 All bytes gating window > 1UI, Early break!
887 13:41:12.754905
888 13:41:12.757672 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 28)
889 13:41:12.758139
890 13:41:12.761327 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
891 13:41:12.761803
892 13:41:12.762106
893 13:41:12.762381
894 13:41:12.764388 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
895 13:41:12.764774
896 13:41:12.768144 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
897 13:41:12.768605
898 13:41:12.768907
899 13:41:12.771312 Write Rank0 MR1 =0x56
900 13:41:12.771694
901 13:41:12.774805 best RODT dly(2T, 0.5T) = (2, 2)
902 13:41:12.775189
903 13:41:12.777835 best RODT dly(2T, 0.5T) = (2, 2)
904 13:41:12.778221 ==
905 13:41:12.781061 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
906 13:41:12.784390 fsp= 1, odt_onoff= 1, Byte mode= 0
907 13:41:12.784773 ==
908 13:41:12.791359 Start DQ dly to find pass range UseTestEngine =0
909 13:41:12.794939 x-axis: bit #, y-axis: DQ dly (-127~63)
910 13:41:12.795481 RX Vref Scan = 0
911 13:41:12.798298 -26, [0] xxxxxxxx xxxxxxxx [MSB]
912 13:41:12.801635 -25, [0] xxxxxxxx xxxxxxxx [MSB]
913 13:41:12.805111 -24, [0] xxxxxxxx xxxxxxxx [MSB]
914 13:41:12.808564 -23, [0] xxxxxxxx xxxxxxxx [MSB]
915 13:41:12.812055 -22, [0] xxxxxxxx xxxxxxxx [MSB]
916 13:41:12.812446 -21, [0] xxxxxxxx xxxxxxxx [MSB]
917 13:41:12.815130 -20, [0] xxxxxxxx xxxxxxxx [MSB]
918 13:41:12.818240 -19, [0] xxxxxxxx xxxxxxxx [MSB]
919 13:41:12.821686 -18, [0] xxxxxxxx xxxxxxxx [MSB]
920 13:41:12.825152 -17, [0] xxxxxxxx xxxxxxxx [MSB]
921 13:41:12.828374 -16, [0] xxxxxxxx xxxxxxxx [MSB]
922 13:41:12.831822 -15, [0] xxxxxxxx xxxxxxxx [MSB]
923 13:41:12.834897 -14, [0] xxxxxxxx xxxxxxxx [MSB]
924 13:41:12.835297 -13, [0] xxxxxxxx xxxxxxxx [MSB]
925 13:41:12.838655 -12, [0] xxxxxxxx xxxxxxxx [MSB]
926 13:41:12.842558 -11, [0] xxxxxxxx xxxxxxxx [MSB]
927 13:41:12.845289 -10, [0] xxxxxxxx xxxxxxxx [MSB]
928 13:41:12.848743 -9, [0] xxxxxxxx xxxxxxxx [MSB]
929 13:41:12.852429 -8, [0] xxxxxxxx xxxxxxxx [MSB]
930 13:41:12.855263 -7, [0] xxxxxxxx xxxxxxxx [MSB]
931 13:41:12.855656 -6, [0] xxxxxxxx xxxxxxxx [MSB]
932 13:41:12.858777 -5, [0] xxxxxxxx xxxxxxxx [MSB]
933 13:41:12.862658 -4, [0] xxxxxxxx xxxxxxxx [MSB]
934 13:41:12.865430 -3, [0] xxxxxxxx xxxxxxxx [MSB]
935 13:41:12.869364 -2, [0] xxxoxxxx xxxxxxxx [MSB]
936 13:41:12.872165 -1, [0] xxxoxxxx xxxxxxxx [MSB]
937 13:41:12.872597 0, [0] xxxoxoox xxxxxoxx [MSB]
938 13:41:12.875857 1, [0] xxxoxooo xxxxxoxx [MSB]
939 13:41:12.878974 2, [0] xxxoxooo ooxxxoxx [MSB]
940 13:41:12.882032 3, [0] xxxoxooo ooxoooxx [MSB]
941 13:41:12.885681 4, [0] xxxoxooo ooxooooo [MSB]
942 13:41:12.889449 5, [0] xxxoxooo ooxooooo [MSB]
943 13:41:12.889973 6, [0] xxoooooo oooooooo [MSB]
944 13:41:12.892439 7, [0] xooooooo oooooooo [MSB]
945 13:41:12.896042 8, [0] xooooooo oooooooo [MSB]
946 13:41:12.899251 30, [0] oooxoooo oooooooo [MSB]
947 13:41:12.902626 31, [0] oooxoooo oooooooo [MSB]
948 13:41:12.905962 32, [0] oooxoxxo oooooooo [MSB]
949 13:41:12.906578 33, [0] oooxoxxo ooooooxo [MSB]
950 13:41:12.909537 34, [0] oooxoxxo ooooooxo [MSB]
951 13:41:12.912869 35, [0] oooxoxxo xooxooxo [MSB]
952 13:41:12.916454 36, [0] oooxoxxx xooxooxo [MSB]
953 13:41:12.919327 37, [0] oooxoxxx xooxxxxo [MSB]
954 13:41:12.922804 38, [0] oooxxxxx xxoxxxxx [MSB]
955 13:41:12.923321 39, [0] oxoxxxxx xxoxxxxx [MSB]
956 13:41:12.926345 40, [0] oxxxxxxx xxoxxxxx [MSB]
957 13:41:12.929289 41, [0] xxxxxxxx xxxxxxxx [MSB]
958 13:41:12.932877 iDelay=41, Bit 0, Center 24 (9 ~ 40) 32
959 13:41:12.936158 iDelay=41, Bit 1, Center 22 (7 ~ 38) 32
960 13:41:12.939665 iDelay=41, Bit 2, Center 22 (6 ~ 39) 34
961 13:41:12.942793 iDelay=41, Bit 3, Center 13 (-2 ~ 29) 32
962 13:41:12.946561 iDelay=41, Bit 4, Center 21 (6 ~ 37) 32
963 13:41:12.952954 iDelay=41, Bit 5, Center 15 (0 ~ 31) 32
964 13:41:12.956208 iDelay=41, Bit 6, Center 15 (0 ~ 31) 32
965 13:41:12.959371 iDelay=41, Bit 7, Center 18 (1 ~ 35) 35
966 13:41:12.962730 iDelay=41, Bit 8, Center 18 (2 ~ 34) 33
967 13:41:12.965894 iDelay=41, Bit 9, Center 19 (2 ~ 37) 36
968 13:41:12.969518 iDelay=41, Bit 10, Center 23 (6 ~ 40) 35
969 13:41:12.973447 iDelay=41, Bit 11, Center 18 (3 ~ 34) 32
970 13:41:12.976394 iDelay=41, Bit 12, Center 19 (3 ~ 36) 34
971 13:41:12.979919 iDelay=41, Bit 13, Center 18 (0 ~ 36) 37
972 13:41:12.983379 iDelay=41, Bit 14, Center 18 (4 ~ 32) 29
973 13:41:12.986493 iDelay=41, Bit 15, Center 20 (4 ~ 37) 34
974 13:41:12.986917 ==
975 13:41:12.992794 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
976 13:41:12.996355 fsp= 1, odt_onoff= 1, Byte mode= 0
977 13:41:12.996783 ==
978 13:41:12.997114 DQS Delay:
979 13:41:12.999938 DQS0 = 0, DQS1 = 0
980 13:41:13.000358 DQM Delay:
981 13:41:13.000689 DQM0 = 18, DQM1 = 19
982 13:41:13.003170 DQ Delay:
983 13:41:13.006690 DQ0 =24, DQ1 =22, DQ2 =22, DQ3 =13
984 13:41:13.010457 DQ4 =21, DQ5 =15, DQ6 =15, DQ7 =18
985 13:41:13.013286 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =18
986 13:41:13.017142 DQ12 =19, DQ13 =18, DQ14 =18, DQ15 =20
987 13:41:13.017693
988 13:41:13.018024
989 13:41:13.018333 DramC Write-DBI off
990 13:41:13.018638 ==
991 13:41:13.023823 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
992 13:41:13.026674 fsp= 1, odt_onoff= 1, Byte mode= 0
993 13:41:13.027098 ==
994 13:41:13.030264 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
995 13:41:13.030770
996 13:41:13.033560 Begin, DQ Scan Range 923~1179
997 13:41:13.034061
998 13:41:13.034391
999 13:41:13.037030 TX Vref Scan disable
1000 13:41:13.040313 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1001 13:41:13.043664 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1002 13:41:13.047269 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1003 13:41:13.050156 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1004 13:41:13.053679 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1005 13:41:13.056894 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1006 13:41:13.060156 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1007 13:41:13.063929 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1008 13:41:13.067063 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1009 13:41:13.070669 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1010 13:41:13.073467 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1011 13:41:13.077044 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1012 13:41:13.080465 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1013 13:41:13.083835 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1014 13:41:13.087201 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1015 13:41:13.090376 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1016 13:41:13.097359 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1017 13:41:13.100544 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1018 13:41:13.103966 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1019 13:41:13.107082 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1020 13:41:13.110527 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1021 13:41:13.113731 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1022 13:41:13.117202 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1023 13:41:13.120635 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1024 13:41:13.124125 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1025 13:41:13.127326 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1026 13:41:13.131477 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1027 13:41:13.134137 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1028 13:41:13.137561 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1029 13:41:13.141270 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1030 13:41:13.144331 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1031 13:41:13.148045 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1032 13:41:13.151176 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1033 13:41:13.154560 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1034 13:41:13.157786 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1035 13:41:13.164127 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1036 13:41:13.167982 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1037 13:41:13.170990 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1038 13:41:13.174486 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1039 13:41:13.178344 962 |3 6 2|[0] xxxxxxxx oxxxxxxx [MSB]
1040 13:41:13.181482 963 |3 6 3|[0] xxxxxxxx oxxoxxxx [MSB]
1041 13:41:13.184681 964 |3 6 4|[0] xxxxxxxx ooxoxoox [MSB]
1042 13:41:13.188247 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1043 13:41:13.191590 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1044 13:41:13.194802 967 |3 6 7|[0] xxxxxxxx ooxooooo [MSB]
1045 13:41:13.198256 968 |3 6 8|[0] xxxxxxxx oooooooo [MSB]
1046 13:41:13.201415 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
1047 13:41:13.205065 970 |3 6 10|[0] xxxoxoxx oooooooo [MSB]
1048 13:41:13.208333 971 |3 6 11|[0] xxxoxooo oooooooo [MSB]
1049 13:41:13.211409 972 |3 6 12|[0] xxxoxooo oooooooo [MSB]
1050 13:41:13.214991 973 |3 6 13|[0] xxxoxooo oooooooo [MSB]
1051 13:41:13.218245 974 |3 6 14|[0] xxxooooo oooooooo [MSB]
1052 13:41:13.225497 988 |3 6 28|[0] oooooooo xooooooo [MSB]
1053 13:41:13.228737 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1054 13:41:13.232604 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1055 13:41:13.235735 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1056 13:41:13.238875 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1057 13:41:13.242319 993 |3 6 33|[0] oooxoxxo xxxxxxxx [MSB]
1058 13:41:13.245894 994 |3 6 34|[0] xoxxxxxx xxxxxxxx [MSB]
1059 13:41:13.249518 995 |3 6 35|[0] xxxxxxxx xxxxxxxx [MSB]
1060 13:41:13.252536 Byte0, DQ PI dly=982, DQM PI dly= 982
1061 13:41:13.255398 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1062 13:41:13.255826
1063 13:41:13.262194 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1064 13:41:13.262638
1065 13:41:13.265782 Byte1, DQ PI dly=976, DQM PI dly= 976
1066 13:41:13.269098 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1067 13:41:13.269851
1068 13:41:13.272519 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1069 13:41:13.272959
1070 13:41:13.273340 ==
1071 13:41:13.279439 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1072 13:41:13.282927 fsp= 1, odt_onoff= 1, Byte mode= 0
1073 13:41:13.283439 ==
1074 13:41:13.285948 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1075 13:41:13.286377
1076 13:41:13.289180 Begin, DQ Scan Range 952~1016
1077 13:41:13.292522 Write Rank0 MR14 =0x0
1078 13:41:13.299270
1079 13:41:13.299693 CH=0, VrefRange= 0, VrefLevel = 0
1080 13:41:13.306169 TX Bit0 (977~994) 18 985, Bit8 (965~983) 19 974,
1081 13:41:13.309831 TX Bit1 (977~992) 16 984, Bit9 (967~985) 19 976,
1082 13:41:13.316540 TX Bit2 (976~993) 18 984, Bit10 (970~989) 20 979,
1083 13:41:13.319777 TX Bit3 (969~988) 20 978, Bit11 (966~984) 19 975,
1084 13:41:13.322822 TX Bit4 (976~993) 18 984, Bit12 (967~985) 19 976,
1085 13:41:13.329747 TX Bit5 (973~988) 16 980, Bit13 (967~983) 17 975,
1086 13:41:13.333080 TX Bit6 (974~990) 17 982, Bit14 (967~984) 18 975,
1087 13:41:13.336487 TX Bit7 (975~991) 17 983, Bit15 (968~988) 21 978,
1088 13:41:13.336998
1089 13:41:13.339681 Write Rank0 MR14 =0x2
1090 13:41:13.348653
1091 13:41:13.349172 CH=0, VrefRange= 0, VrefLevel = 2
1092 13:41:13.355387 TX Bit0 (977~994) 18 985, Bit8 (965~983) 19 974,
1093 13:41:13.358177 TX Bit1 (976~992) 17 984, Bit9 (967~985) 19 976,
1094 13:41:13.361893 TX Bit2 (976~993) 18 984, Bit10 (969~989) 21 979,
1095 13:41:13.368364 TX Bit3 (969~989) 21 979, Bit11 (966~984) 19 975,
1096 13:41:13.371979 TX Bit4 (976~994) 19 985, Bit12 (967~986) 20 976,
1097 13:41:13.378439 TX Bit5 (973~989) 17 981, Bit13 (966~984) 19 975,
1098 13:41:13.381717 TX Bit6 (973~990) 18 981, Bit14 (967~984) 18 975,
1099 13:41:13.385341 TX Bit7 (974~992) 19 983, Bit15 (968~988) 21 978,
1100 13:41:13.385865
1101 13:41:13.388554 Write Rank0 MR14 =0x4
1102 13:41:13.396993
1103 13:41:13.397884 CH=0, VrefRange= 0, VrefLevel = 4
1104 13:41:13.403106 TX Bit0 (977~995) 19 986, Bit8 (965~983) 19 974,
1105 13:41:13.406700 TX Bit1 (976~993) 18 984, Bit9 (966~986) 21 976,
1106 13:41:13.413327 TX Bit2 (976~993) 18 984, Bit10 (969~989) 21 979,
1107 13:41:13.416689 TX Bit3 (969~989) 21 979, Bit11 (965~985) 21 975,
1108 13:41:13.420273 TX Bit4 (975~994) 20 984, Bit12 (966~987) 22 976,
1109 13:41:13.426756 TX Bit5 (972~990) 19 981, Bit13 (966~984) 19 975,
1110 13:41:13.430356 TX Bit6 (973~990) 18 981, Bit14 (967~985) 19 976,
1111 13:41:13.433563 TX Bit7 (974~992) 19 983, Bit15 (968~988) 21 978,
1112 13:41:13.434039
1113 13:41:13.436865 Write Rank0 MR14 =0x6
1114 13:41:13.445837
1115 13:41:13.446341 CH=0, VrefRange= 0, VrefLevel = 6
1116 13:41:13.452481 TX Bit0 (976~996) 21 986, Bit8 (963~984) 22 973,
1117 13:41:13.455584 TX Bit1 (976~993) 18 984, Bit9 (965~987) 23 976,
1118 13:41:13.462101 TX Bit2 (976~994) 19 985, Bit10 (969~989) 21 979,
1119 13:41:13.465960 TX Bit3 (968~989) 22 978, Bit11 (965~986) 22 975,
1120 13:41:13.469285 TX Bit4 (975~995) 21 985, Bit12 (967~987) 21 977,
1121 13:41:13.476076 TX Bit5 (971~990) 20 980, Bit13 (966~985) 20 975,
1122 13:41:13.478882 TX Bit6 (973~991) 19 982, Bit14 (966~986) 21 976,
1123 13:41:13.483008 TX Bit7 (973~992) 20 982, Bit15 (968~989) 22 978,
1124 13:41:13.483517
1125 13:41:13.485757 Write Rank0 MR14 =0x8
1126 13:41:13.494742
1127 13:41:13.495162 CH=0, VrefRange= 0, VrefLevel = 8
1128 13:41:13.501158 TX Bit0 (976~996) 21 986, Bit8 (963~985) 23 974,
1129 13:41:13.504483 TX Bit1 (976~993) 18 984, Bit9 (965~988) 24 976,
1130 13:41:13.507730 TX Bit2 (976~995) 20 985, Bit10 (969~990) 22 979,
1131 13:41:13.514732 TX Bit3 (968~990) 23 979, Bit11 (965~987) 23 976,
1132 13:41:13.518242 TX Bit4 (975~996) 22 985, Bit12 (965~988) 24 976,
1133 13:41:13.525035 TX Bit5 (971~990) 20 980, Bit13 (966~986) 21 976,
1134 13:41:13.528370 TX Bit6 (972~991) 20 981, Bit14 (966~986) 21 976,
1135 13:41:13.531633 TX Bit7 (973~993) 21 983, Bit15 (968~989) 22 978,
1136 13:41:13.532022
1137 13:41:13.534529 Write Rank0 MR14 =0xa
1138 13:41:13.544112
1139 13:41:13.546887 CH=0, VrefRange= 0, VrefLevel = 10
1140 13:41:13.551072 TX Bit0 (976~997) 22 986, Bit8 (963~985) 23 974,
1141 13:41:13.601757 TX Bit1 (976~994) 19 985, Bit9 (965~988) 24 976,
1142 13:41:13.602790 TX Bit2 (975~996) 22 985, Bit10 (969~990) 22 979,
1143 13:41:13.603194 TX Bit3 (968~990) 23 979, Bit11 (964~988) 25 976,
1144 13:41:13.603520 TX Bit4 (974~996) 23 985, Bit12 (966~988) 23 977,
1145 13:41:13.603823 TX Bit5 (971~990) 20 980, Bit13 (965~986) 22 975,
1146 13:41:13.604180 TX Bit6 (972~991) 20 981, Bit14 (966~987) 22 976,
1147 13:41:13.604536 TX Bit7 (973~994) 22 983, Bit15 (967~989) 23 978,
1148 13:41:13.604836
1149 13:41:13.605119 Write Rank0 MR14 =0xc
1150 13:41:13.605465
1151 13:41:13.605747 CH=0, VrefRange= 0, VrefLevel = 12
1152 13:41:13.606025 TX Bit0 (976~997) 22 986, Bit8 (962~986) 25 974,
1153 13:41:13.634210 TX Bit1 (976~994) 19 985, Bit9 (965~988) 24 976,
1154 13:41:13.634788 TX Bit2 (975~995) 21 985, Bit10 (968~991) 24 979,
1155 13:41:13.635572 TX Bit3 (968~990) 23 979, Bit11 (964~987) 24 975,
1156 13:41:13.635947 TX Bit4 (974~997) 24 985, Bit12 (965~988) 24 976,
1157 13:41:13.636363 TX Bit5 (970~991) 22 980, Bit13 (964~987) 24 975,
1158 13:41:13.636784 TX Bit6 (971~992) 22 981, Bit14 (965~988) 24 976,
1159 13:41:13.637181 TX Bit7 (972~994) 23 983, Bit15 (967~989) 23 978,
1160 13:41:13.637958
1161 13:41:13.638300 Write Rank0 MR14 =0xe
1162 13:41:13.642007
1163 13:41:13.645577 CH=0, VrefRange= 0, VrefLevel = 14
1164 13:41:13.648784 TX Bit0 (975~998) 24 986, Bit8 (963~986) 24 974,
1165 13:41:13.652176 TX Bit1 (975~996) 22 985, Bit9 (964~988) 25 976,
1166 13:41:13.658550 TX Bit2 (975~997) 23 986, Bit10 (968~991) 24 979,
1167 13:41:13.661907 TX Bit3 (968~991) 24 979, Bit11 (963~988) 26 975,
1168 13:41:13.665290 TX Bit4 (974~997) 24 985, Bit12 (965~988) 24 976,
1169 13:41:13.671774 TX Bit5 (970~991) 22 980, Bit13 (964~987) 24 975,
1170 13:41:13.675752 TX Bit6 (971~992) 22 981, Bit14 (965~988) 24 976,
1171 13:41:13.679101 TX Bit7 (972~995) 24 983, Bit15 (967~989) 23 978,
1172 13:41:13.679530
1173 13:41:13.682198 Write Rank0 MR14 =0x10
1174 13:41:13.691441
1175 13:41:13.695134 CH=0, VrefRange= 0, VrefLevel = 16
1176 13:41:13.698215 TX Bit0 (975~998) 24 986, Bit8 (962~987) 26 974,
1177 13:41:13.701531 TX Bit1 (975~996) 22 985, Bit9 (964~989) 26 976,
1178 13:41:13.707936 TX Bit2 (975~997) 23 986, Bit10 (968~991) 24 979,
1179 13:41:13.711775 TX Bit3 (967~991) 25 979, Bit11 (963~988) 26 975,
1180 13:41:13.714541 TX Bit4 (974~997) 24 985, Bit12 (965~989) 25 977,
1181 13:41:13.721586 TX Bit5 (970~991) 22 980, Bit13 (963~988) 26 975,
1182 13:41:13.724678 TX Bit6 (970~992) 23 981, Bit14 (964~988) 25 976,
1183 13:41:13.728397 TX Bit7 (971~995) 25 983, Bit15 (967~990) 24 978,
1184 13:41:13.728906
1185 13:41:13.731642 Write Rank0 MR14 =0x12
1186 13:41:13.740853
1187 13:41:13.741391 CH=0, VrefRange= 0, VrefLevel = 18
1188 13:41:13.747217 TX Bit0 (975~998) 24 986, Bit8 (961~988) 28 974,
1189 13:41:13.750655 TX Bit1 (975~997) 23 986, Bit9 (963~988) 26 975,
1190 13:41:13.757417 TX Bit2 (975~997) 23 986, Bit10 (968~991) 24 979,
1191 13:41:13.760860 TX Bit3 (967~991) 25 979, Bit11 (962~988) 27 975,
1192 13:41:13.764219 TX Bit4 (974~998) 25 986, Bit12 (964~989) 26 976,
1193 13:41:13.771415 TX Bit5 (969~992) 24 980, Bit13 (963~988) 26 975,
1194 13:41:13.774407 TX Bit6 (970~993) 24 981, Bit14 (964~989) 26 976,
1195 13:41:13.777328 TX Bit7 (971~996) 26 983, Bit15 (966~990) 25 978,
1196 13:41:13.777760
1197 13:41:13.781417 Write Rank0 MR14 =0x14
1198 13:41:13.790260
1199 13:41:13.793582 CH=0, VrefRange= 0, VrefLevel = 20
1200 13:41:13.796884 TX Bit0 (975~998) 24 986, Bit8 (962~988) 27 975,
1201 13:41:13.799989 TX Bit1 (974~997) 24 985, Bit9 (964~988) 25 976,
1202 13:41:13.806702 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1203 13:41:13.810413 TX Bit3 (967~991) 25 979, Bit11 (963~988) 26 975,
1204 13:41:13.813408 TX Bit4 (973~998) 26 985, Bit12 (964~989) 26 976,
1205 13:41:13.820367 TX Bit5 (969~992) 24 980, Bit13 (962~988) 27 975,
1206 13:41:13.823847 TX Bit6 (970~993) 24 981, Bit14 (963~989) 27 976,
1207 13:41:13.827197 TX Bit7 (970~996) 27 983, Bit15 (966~990) 25 978,
1208 13:41:13.827702
1209 13:41:13.830143 Write Rank0 MR14 =0x16
1210 13:41:13.839597
1211 13:41:13.843157 CH=0, VrefRange= 0, VrefLevel = 22
1212 13:41:13.846373 TX Bit0 (975~999) 25 987, Bit8 (963~988) 26 975,
1213 13:41:13.849793 TX Bit1 (974~997) 24 985, Bit9 (963~988) 26 975,
1214 13:41:13.856387 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1215 13:41:13.859691 TX Bit3 (967~991) 25 979, Bit11 (963~989) 27 976,
1216 13:41:13.863239 TX Bit4 (973~998) 26 985, Bit12 (964~989) 26 976,
1217 13:41:13.869839 TX Bit5 (969~992) 24 980, Bit13 (963~988) 26 975,
1218 13:41:13.873011 TX Bit6 (970~994) 25 982, Bit14 (963~989) 27 976,
1219 13:41:13.876173 TX Bit7 (970~995) 26 982, Bit15 (966~990) 25 978,
1220 13:41:13.876603
1221 13:41:13.879571 Write Rank0 MR14 =0x18
1222 13:41:13.888812
1223 13:41:13.892361 CH=0, VrefRange= 0, VrefLevel = 24
1224 13:41:13.895471 TX Bit0 (975~999) 25 987, Bit8 (963~988) 26 975,
1225 13:41:13.898760 TX Bit1 (974~997) 24 985, Bit9 (963~988) 26 975,
1226 13:41:13.905606 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1227 13:41:13.908935 TX Bit3 (967~991) 25 979, Bit11 (963~989) 27 976,
1228 13:41:13.912835 TX Bit4 (973~998) 26 985, Bit12 (964~989) 26 976,
1229 13:41:13.919079 TX Bit5 (969~992) 24 980, Bit13 (963~988) 26 975,
1230 13:41:13.922805 TX Bit6 (970~994) 25 982, Bit14 (963~989) 27 976,
1231 13:41:13.925682 TX Bit7 (970~995) 26 982, Bit15 (966~990) 25 978,
1232 13:41:13.926109
1233 13:41:13.929297 Write Rank0 MR14 =0x1a
1234 13:41:13.938643
1235 13:41:13.942008 CH=0, VrefRange= 0, VrefLevel = 26
1236 13:41:13.945371 TX Bit0 (975~999) 25 987, Bit8 (963~988) 26 975,
1237 13:41:13.948902 TX Bit1 (974~997) 24 985, Bit9 (963~988) 26 975,
1238 13:41:13.955796 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1239 13:41:13.958904 TX Bit3 (967~991) 25 979, Bit11 (963~989) 27 976,
1240 13:41:13.962164 TX Bit4 (973~998) 26 985, Bit12 (964~989) 26 976,
1241 13:41:13.968879 TX Bit5 (969~992) 24 980, Bit13 (963~988) 26 975,
1242 13:41:13.972281 TX Bit6 (970~994) 25 982, Bit14 (963~989) 27 976,
1243 13:41:13.975897 TX Bit7 (970~995) 26 982, Bit15 (966~990) 25 978,
1244 13:41:13.976406
1245 13:41:13.978698 Write Rank0 MR14 =0x1c
1246 13:41:13.988077
1247 13:41:13.991070 CH=0, VrefRange= 0, VrefLevel = 28
1248 13:41:13.994371 TX Bit0 (975~999) 25 987, Bit8 (963~988) 26 975,
1249 13:41:13.997801 TX Bit1 (974~997) 24 985, Bit9 (963~988) 26 975,
1250 13:41:14.004772 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1251 13:41:14.008428 TX Bit3 (967~991) 25 979, Bit11 (963~989) 27 976,
1252 13:41:14.011483 TX Bit4 (973~998) 26 985, Bit12 (964~989) 26 976,
1253 13:41:14.018680 TX Bit5 (969~992) 24 980, Bit13 (963~988) 26 975,
1254 13:41:14.021517 TX Bit6 (970~994) 25 982, Bit14 (963~989) 27 976,
1255 13:41:14.025040 TX Bit7 (970~995) 26 982, Bit15 (966~990) 25 978,
1256 13:41:14.025599
1257 13:41:14.025935
1258 13:41:14.028799 TX Vref found, early break! 374< 386
1259 13:41:14.034599 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1260 13:41:14.038425 u1DelayCellOfst[0]=10 cells (8 PI)
1261 13:41:14.041802 u1DelayCellOfst[1]=7 cells (6 PI)
1262 13:41:14.044911 u1DelayCellOfst[2]=8 cells (7 PI)
1263 13:41:14.048160 u1DelayCellOfst[3]=0 cells (0 PI)
1264 13:41:14.048588 u1DelayCellOfst[4]=7 cells (6 PI)
1265 13:41:14.051476 u1DelayCellOfst[5]=1 cells (1 PI)
1266 13:41:14.054794 u1DelayCellOfst[6]=3 cells (3 PI)
1267 13:41:14.058272 u1DelayCellOfst[7]=3 cells (3 PI)
1268 13:41:14.061520 Byte0, DQ PI dly=979, DQM PI dly= 983
1269 13:41:14.064701 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1270 13:41:14.065287
1271 13:41:14.071878 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1272 13:41:14.072402
1273 13:41:14.075301 u1DelayCellOfst[8]=0 cells (0 PI)
1274 13:41:14.078464 u1DelayCellOfst[9]=0 cells (0 PI)
1275 13:41:14.081569 u1DelayCellOfst[10]=5 cells (4 PI)
1276 13:41:14.082075 u1DelayCellOfst[11]=1 cells (1 PI)
1277 13:41:14.084870 u1DelayCellOfst[12]=1 cells (1 PI)
1278 13:41:14.088502 u1DelayCellOfst[13]=0 cells (0 PI)
1279 13:41:14.091616 u1DelayCellOfst[14]=1 cells (1 PI)
1280 13:41:14.094951 u1DelayCellOfst[15]=3 cells (3 PI)
1281 13:41:14.098414 Byte1, DQ PI dly=975, DQM PI dly= 977
1282 13:41:14.101931 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1283 13:41:14.102365
1284 13:41:14.108708 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1285 13:41:14.109216
1286 13:41:14.109589 Write Rank0 MR14 =0x16
1287 13:41:14.109900
1288 13:41:14.112406 Final TX Range 0 Vref 22
1289 13:41:14.113050
1290 13:41:14.118773 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1291 13:41:14.119288
1292 13:41:14.125288 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1293 13:41:14.132451 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1294 13:41:14.139173 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1295 13:41:14.142345 Write Rank0 MR3 =0xb0
1296 13:41:14.142849 DramC Write-DBI on
1297 13:41:14.143187 ==
1298 13:41:14.148940 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1299 13:41:14.152396 fsp= 1, odt_onoff= 1, Byte mode= 0
1300 13:41:14.152901 ==
1301 13:41:14.155853 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1302 13:41:14.156361
1303 13:41:14.158967 Begin, DQ Scan Range 697~761
1304 13:41:14.159405
1305 13:41:14.159728
1306 13:41:14.162252 TX Vref Scan disable
1307 13:41:14.165302 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1308 13:41:14.168878 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1309 13:41:14.172425 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1310 13:41:14.175581 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1311 13:41:14.179128 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1312 13:41:14.182120 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1313 13:41:14.185453 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1314 13:41:14.188935 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1315 13:41:14.192152 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1316 13:41:14.195955 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1317 13:41:14.199035 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1318 13:41:14.202545 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1319 13:41:14.205823 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1320 13:41:14.209092 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1321 13:41:14.212137 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1322 13:41:14.215824 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1323 13:41:14.219023 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1324 13:41:14.228395 733 |2 6 29|[0] oooooooo xxxxxxxx [MSB]
1325 13:41:14.231930 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1326 13:41:14.235562 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1327 13:41:14.238809 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1328 13:41:14.242058 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1329 13:41:14.245328 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1330 13:41:14.248486 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1331 13:41:14.252500 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1332 13:41:14.255073 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1333 13:41:14.258452 742 |2 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1334 13:41:14.262472 Byte0, DQ PI dly=727, DQM PI dly= 727
1335 13:41:14.265648 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
1336 13:41:14.266157
1337 13:41:14.272234 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
1338 13:41:14.272723
1339 13:41:14.275504 Byte1, DQ PI dly=719, DQM PI dly= 719
1340 13:41:14.278960 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 15)
1341 13:41:14.279391
1342 13:41:14.282602 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 15)
1343 13:41:14.283109
1344 13:41:14.289215 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1345 13:41:14.295983 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1346 13:41:14.302387 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1347 13:41:14.305945 Write Rank0 MR3 =0x30
1348 13:41:14.309432 DramC Write-DBI off
1349 13:41:14.309933
1350 13:41:14.310262 [DATLAT]
1351 13:41:14.312382 Freq=1600, CH0 RK0, use_rxtx_scan=0
1352 13:41:14.312802
1353 13:41:14.313133 DATLAT Default: 0xf
1354 13:41:14.316242 7, 0xFFFF, sum=0
1355 13:41:14.316746 8, 0xFFFF, sum=0
1356 13:41:14.319541 9, 0xFFFF, sum=0
1357 13:41:14.320056 10, 0xFFFF, sum=0
1358 13:41:14.322458 11, 0xFFFF, sum=0
1359 13:41:14.322886 12, 0xFFFF, sum=0
1360 13:41:14.326199 13, 0xFFFF, sum=0
1361 13:41:14.326626 14, 0x0, sum=1
1362 13:41:14.329436 15, 0x0, sum=2
1363 13:41:14.329938 16, 0x0, sum=3
1364 13:41:14.330275 17, 0x0, sum=4
1365 13:41:14.336061 pattern=2 first_step=14 total pass=5 best_step=16
1366 13:41:14.336549 ==
1367 13:41:14.340545 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1368 13:41:14.342619 fsp= 1, odt_onoff= 1, Byte mode= 0
1369 13:41:14.343046 ==
1370 13:41:14.349445 Start DQ dly to find pass range UseTestEngine =1
1371 13:41:14.353257 x-axis: bit #, y-axis: DQ dly (-127~63)
1372 13:41:14.353784 RX Vref Scan = 1
1373 13:41:14.475925
1374 13:41:14.476521 RX Vref found, early break!
1375 13:41:14.476860
1376 13:41:14.482287 Final RX Vref 13, apply to both rank0 and 1
1377 13:41:14.482800 ==
1378 13:41:14.485600 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1379 13:41:14.489392 fsp= 1, odt_onoff= 1, Byte mode= 0
1380 13:41:14.489895 ==
1381 13:41:14.490224 DQS Delay:
1382 13:41:14.492079 DQS0 = 0, DQS1 = 0
1383 13:41:14.492504 DQM Delay:
1384 13:41:14.496283 DQM0 = 19, DQM1 = 18
1385 13:41:14.496785 DQ Delay:
1386 13:41:14.499188 DQ0 =24, DQ1 =23, DQ2 =23, DQ3 =13
1387 13:41:14.502238 DQ4 =22, DQ5 =15, DQ6 =17, DQ7 =18
1388 13:41:14.506028 DQ8 =17, DQ9 =19, DQ10 =22, DQ11 =17
1389 13:41:14.509066 DQ12 =19, DQ13 =16, DQ14 =17, DQ15 =20
1390 13:41:14.509618
1391 13:41:14.509949
1392 13:41:14.510253
1393 13:41:14.512570 [DramC_TX_OE_Calibration] TA2
1394 13:41:14.515644 Original DQ_B0 (3 6) =30, OEN = 27
1395 13:41:14.519038 Original DQ_B1 (3 6) =30, OEN = 27
1396 13:41:14.519462 23, 0x0, End_B0=23 End_B1=23
1397 13:41:14.522683 24, 0x0, End_B0=24 End_B1=24
1398 13:41:14.526160 25, 0x0, End_B0=25 End_B1=25
1399 13:41:14.529263 26, 0x0, End_B0=26 End_B1=26
1400 13:41:14.532479 27, 0x0, End_B0=27 End_B1=27
1401 13:41:14.532905 28, 0x0, End_B0=28 End_B1=28
1402 13:41:14.535917 29, 0x0, End_B0=29 End_B1=29
1403 13:41:14.539206 30, 0x0, End_B0=30 End_B1=30
1404 13:41:14.542663 31, 0xFFFF, End_B0=30 End_B1=30
1405 13:41:14.546100 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1406 13:41:14.552546 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1407 13:41:14.552971
1408 13:41:14.553340
1409 13:41:14.556787 Write Rank0 MR23 =0x3f
1410 13:41:14.557340 [DQSOSC]
1411 13:41:14.562709 [DQSOSCAuto] RK0, (LSB)MR18= 0x9f, (MSB)MR19= 0x3, tDQSOscB0 = 339 ps tDQSOscB1 = 0 ps
1412 13:41:14.569395 CH0_RK0: MR19=0x3, MR18=0x9F, DQSOSC=339, MR23=63, INC=21, DEC=32
1413 13:41:14.573389 Write Rank0 MR23 =0x3f
1414 13:41:14.573979 [DQSOSC]
1415 13:41:14.579394 [DQSOSCAuto] RK0, (LSB)MR18= 0x9d, (MSB)MR19= 0x3, tDQSOscB0 = 340 ps tDQSOscB1 = 0 ps
1416 13:41:14.582808 CH0 RK0: MR19=3, MR18=9D
1417 13:41:14.586383 [RankSwap] Rank num 2, (Multi 1), Rank 1
1418 13:41:14.586814 Write Rank0 MR2 =0xad
1419 13:41:14.590002 [Write Leveling]
1420 13:41:14.593177 delay byte0 byte1 byte2 byte3
1421 13:41:14.593626
1422 13:41:14.594055 10 0 0
1423 13:41:14.596502 11 0 0
1424 13:41:14.596928 12 0 0
1425 13:41:14.597317 13 0 0
1426 13:41:14.599660 14 0 0
1427 13:41:14.600046 15 0 0
1428 13:41:14.603167 16 0 0
1429 13:41:14.603561 17 0 0
1430 13:41:14.606704 18 0 0
1431 13:41:14.607216 19 0 0
1432 13:41:14.607564 20 0 0
1433 13:41:14.609763 21 0 0
1434 13:41:14.610153 22 0 0
1435 13:41:14.613306 23 0 0
1436 13:41:14.613705 24 0 0
1437 13:41:14.614017 25 0 0
1438 13:41:14.616580 26 0 0
1439 13:41:14.616966 27 0 0
1440 13:41:14.619831 28 0 0
1441 13:41:14.620217 29 0 0
1442 13:41:14.620516 30 0 ff
1443 13:41:14.623246 31 0 ff
1444 13:41:14.623637 32 0 ff
1445 13:41:14.626394 33 0 ff
1446 13:41:14.626781 34 ff ff
1447 13:41:14.629787 35 ff ff
1448 13:41:14.630172 36 ff ff
1449 13:41:14.633435 37 ff ff
1450 13:41:14.633902 38 ff ff
1451 13:41:14.636868 39 ff ff
1452 13:41:14.637281 40 ff ff
1453 13:41:14.639860 pass bytecount = 0xff (0xff: all bytes pass)
1454 13:41:14.640243
1455 13:41:14.643331 DQS0 dly: 34
1456 13:41:14.644037 DQS1 dly: 30
1457 13:41:14.646801 Write Rank0 MR2 =0x2d
1458 13:41:14.650479 [RankSwap] Rank num 2, (Multi 1), Rank 0
1459 13:41:14.653787 wait MRW command Rank1 MR1 =0xd6 fired (1)
1460 13:41:14.654306 Write Rank1 MR1 =0xd6
1461 13:41:14.656799 [Gating]
1462 13:41:14.657283 ==
1463 13:41:14.660245 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1464 13:41:14.664104 fsp= 1, odt_onoff= 1, Byte mode= 0
1465 13:41:14.664610 ==
1466 13:41:14.667437 3 1 0 |3534 1c1b |(11 11)(11 11) |(0 0)(0 0)| 0
1467 13:41:14.673968 3 1 4 |3534 909 |(11 11)(11 11) |(1 1)(0 0)| 0
1468 13:41:14.677548 3 1 8 |3534 3535 |(11 11)(11 11) |(1 1)(1 1)| 0
1469 13:41:14.680596 3 1 12 |3534 706 |(11 11)(11 11) |(1 1)(1 1)| 0
1470 13:41:14.687642 3 1 16 |3534 3535 |(11 11)(11 11) |(0 0)(0 1)| 0
1471 13:41:14.690472 3 1 20 |3534 403 |(11 11)(11 11) |(0 0)(0 1)| 0
1472 13:41:14.693971 3 1 24 |3534 3535 |(11 11)(0 0) |(0 0)(0 1)| 0
1473 13:41:14.697525 3 1 28 |3534 b0b |(11 11)(11 11) |(0 0)(0 1)| 0
1474 13:41:14.704127 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1475 13:41:14.707484 3 2 4 |3534 3434 |(11 11)(11 11) |(0 1)(0 1)| 0
1476 13:41:14.710487 3 2 8 |b0b 3434 |(11 11)(11 11) |(1 1)(0 1)| 0
1477 13:41:14.717593 3 2 12 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1478 13:41:14.721051 3 2 16 |3d3d 909 |(11 11)(11 11) |(1 1)(1 1)| 0
1479 13:41:14.724177 3 2 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1480 13:41:14.728048 3 2 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1481 13:41:14.734498 3 2 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1482 13:41:14.737712 3 3 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1483 13:41:14.741183 3 3 4 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
1484 13:41:14.747594 3 3 8 |3d3d 3c3c |(11 11)(11 11) |(1 1)(1 1)| 0
1485 13:41:14.750931 3 3 12 |3d3d 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
1486 13:41:14.754322 3 3 16 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1487 13:41:14.757938 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1488 13:41:14.764528 [Byte 0] Lead/lag Transition tap number (1)
1489 13:41:14.767682 [Byte 1] Lead/lag falling Transition (3, 3, 20)
1490 13:41:14.771070 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1491 13:41:14.774720 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1492 13:41:14.781447 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1493 13:41:14.784700 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1494 13:41:14.787816 3 4 8 |504 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1495 13:41:14.794742 3 4 12 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1496 13:41:14.798051 3 4 16 |3d3d 201f |(11 11)(11 11) |(1 1)(1 1)| 0
1497 13:41:14.801278 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1498 13:41:14.807926 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1499 13:41:14.811675 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1500 13:41:14.814722 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1501 13:41:14.818220 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1502 13:41:14.825628 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1503 13:41:14.828400 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1504 13:41:14.831830 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1505 13:41:14.838021 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1506 13:41:14.841942 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1507 13:41:14.845852 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1508 13:41:14.851996 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1509 13:41:14.855122 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1510 13:41:14.858594 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1511 13:41:14.861574 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1512 13:41:14.865544 [Byte 0] Lead/lag Transition tap number (2)
1513 13:41:14.871921 [Byte 1] Lead/lag Transition tap number (2)
1514 13:41:14.875424 3 6 8 |202 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1515 13:41:14.878391 3 6 12 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1516 13:41:14.881644 [Byte 0]First pass (3, 6, 12)
1517 13:41:14.885313 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1518 13:41:14.888603 [Byte 1]First pass (3, 6, 16)
1519 13:41:14.892073 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1520 13:41:14.895427 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1521 13:41:14.898682 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1522 13:41:14.905575 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1523 13:41:14.908968 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1524 13:41:14.912131 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1525 13:41:14.915763 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1526 13:41:14.919040 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1527 13:41:14.925569 All bytes gating window > 1UI, Early break!
1528 13:41:14.926079
1529 13:41:14.929037 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1530 13:41:14.929599
1531 13:41:14.932410 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 4)
1532 13:41:14.932829
1533 13:41:14.933160
1534 13:41:14.933501
1535 13:41:14.935699 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1536 13:41:14.936226
1537 13:41:14.938954 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1538 13:41:14.939378
1539 13:41:14.939706
1540 13:41:14.942958 Write Rank1 MR1 =0x56
1541 13:41:14.943457
1542 13:41:14.946126 best RODT dly(2T, 0.5T) = (2, 3)
1543 13:41:14.946632
1544 13:41:14.949352 best RODT dly(2T, 0.5T) = (2, 3)
1545 13:41:14.949777 ==
1546 13:41:14.953000 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1547 13:41:14.955959 fsp= 1, odt_onoff= 1, Byte mode= 0
1548 13:41:14.956459 ==
1549 13:41:14.962542 Start DQ dly to find pass range UseTestEngine =0
1550 13:41:14.965481 x-axis: bit #, y-axis: DQ dly (-127~63)
1551 13:41:14.965907 RX Vref Scan = 0
1552 13:41:14.969496 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1553 13:41:14.973005 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1554 13:41:14.976151 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1555 13:41:14.979239 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1556 13:41:14.982549 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1557 13:41:14.982980 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1558 13:41:14.986192 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1559 13:41:14.989066 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1560 13:41:14.992621 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1561 13:41:14.996039 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1562 13:41:14.999286 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1563 13:41:15.002581 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1564 13:41:15.005843 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1565 13:41:15.006278 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1566 13:41:15.009141 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1567 13:41:15.012988 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1568 13:41:15.016181 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1569 13:41:15.019523 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1570 13:41:15.022709 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1571 13:41:15.026182 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1572 13:41:15.026700 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1573 13:41:15.029961 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1574 13:41:15.033369 -4, [0] xxxoxxxx xxxxxxxx [MSB]
1575 13:41:15.036253 -3, [0] xxxoxxxx xxxxxxxx [MSB]
1576 13:41:15.039872 -2, [0] xxxoxoxx xxxxxxxx [MSB]
1577 13:41:15.043038 -1, [0] xxxoxoxx xxxxxxxx [MSB]
1578 13:41:15.043649 0, [0] xxxoxooo oxxxxxxx [MSB]
1579 13:41:15.046585 1, [0] xxxoxooo ooxoooox [MSB]
1580 13:41:15.050481 2, [0] xxxoxooo ooxooooo [MSB]
1581 13:41:15.053390 3, [0] xxxoxooo ooxooooo [MSB]
1582 13:41:15.056519 4, [0] xxxoxooo ooxooooo [MSB]
1583 13:41:15.059728 5, [0] xooooooo oooooooo [MSB]
1584 13:41:15.060238 33, [0] oooxoooo oooooooo [MSB]
1585 13:41:15.063295 34, [0] oooxoxoo oooooooo [MSB]
1586 13:41:15.067135 35, [0] oooxoxoo oooxooxo [MSB]
1587 13:41:15.070477 36, [0] oooxoxox oooxooxo [MSB]
1588 13:41:15.073529 37, [0] oooxoxxx xooxoxxo [MSB]
1589 13:41:15.076916 38, [0] oooxoxxx xxoxoxxo [MSB]
1590 13:41:15.080020 39, [0] oooxoxxx xxoxxxxo [MSB]
1591 13:41:15.080540 40, [0] oxoxxxxx xxoxxxxx [MSB]
1592 13:41:15.083585 41, [0] oxxxxxxx xxoxxxxx [MSB]
1593 13:41:15.087157 42, [0] xxxxxxxx xxoxxxxx [MSB]
1594 13:41:15.090179 43, [0] xxxxxxxx xxxxxxxx [MSB]
1595 13:41:15.093368 iDelay=43, Bit 0, Center 23 (6 ~ 41) 36
1596 13:41:15.096482 iDelay=43, Bit 1, Center 22 (5 ~ 39) 35
1597 13:41:15.099763 iDelay=43, Bit 2, Center 22 (5 ~ 40) 36
1598 13:41:15.103520 iDelay=43, Bit 3, Center 14 (-4 ~ 32) 37
1599 13:41:15.106609 iDelay=43, Bit 4, Center 22 (5 ~ 39) 35
1600 13:41:15.109912 iDelay=43, Bit 5, Center 15 (-2 ~ 33) 36
1601 13:41:15.113752 iDelay=43, Bit 6, Center 18 (0 ~ 36) 37
1602 13:41:15.117187 iDelay=43, Bit 7, Center 17 (0 ~ 35) 36
1603 13:41:15.120246 iDelay=43, Bit 8, Center 18 (0 ~ 36) 37
1604 13:41:15.126722 iDelay=43, Bit 9, Center 19 (1 ~ 37) 37
1605 13:41:15.130144 iDelay=43, Bit 10, Center 23 (5 ~ 42) 38
1606 13:41:15.133413 iDelay=43, Bit 11, Center 17 (1 ~ 34) 34
1607 13:41:15.137157 iDelay=43, Bit 12, Center 19 (1 ~ 38) 38
1608 13:41:15.140114 iDelay=43, Bit 13, Center 18 (1 ~ 36) 36
1609 13:41:15.143302 iDelay=43, Bit 14, Center 17 (1 ~ 34) 34
1610 13:41:15.146775 iDelay=43, Bit 15, Center 20 (2 ~ 39) 38
1611 13:41:15.147261 ==
1612 13:41:15.153427 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1613 13:41:15.153918 fsp= 1, odt_onoff= 1, Byte mode= 0
1614 13:41:15.157529 ==
1615 13:41:15.158022 DQS Delay:
1616 13:41:15.158353 DQS0 = 0, DQS1 = 0
1617 13:41:15.160324 DQM Delay:
1618 13:41:15.160743 DQM0 = 19, DQM1 = 18
1619 13:41:15.163925 DQ Delay:
1620 13:41:15.164441 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =14
1621 13:41:15.167352 DQ4 =22, DQ5 =15, DQ6 =18, DQ7 =17
1622 13:41:15.170353 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17
1623 13:41:15.174056 DQ12 =19, DQ13 =18, DQ14 =17, DQ15 =20
1624 13:41:15.174564
1625 13:41:15.177135
1626 13:41:15.177678 DramC Write-DBI off
1627 13:41:15.178013 ==
1628 13:41:15.184052 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1629 13:41:15.187222 fsp= 1, odt_onoff= 1, Byte mode= 0
1630 13:41:15.187731 ==
1631 13:41:15.190753 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1632 13:41:15.191178
1633 13:41:15.194602 Begin, DQ Scan Range 926~1182
1634 13:41:15.195108
1635 13:41:15.195439
1636 13:41:15.195746 TX Vref Scan disable
1637 13:41:15.200679 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1638 13:41:15.204553 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1639 13:41:15.207424 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1640 13:41:15.211434 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1641 13:41:15.214537 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1642 13:41:15.217522 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1643 13:41:15.221083 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1644 13:41:15.224013 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1645 13:41:15.227293 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1646 13:41:15.231142 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1647 13:41:15.234494 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1648 13:41:15.237338 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1649 13:41:15.240929 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1650 13:41:15.244645 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1651 13:41:15.247948 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1652 13:41:15.250837 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1653 13:41:15.254373 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1654 13:41:15.257556 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1655 13:41:15.264009 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1656 13:41:15.268042 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1657 13:41:15.270827 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1658 13:41:15.274167 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1659 13:41:15.277582 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1660 13:41:15.281374 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1661 13:41:15.284609 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1662 13:41:15.287833 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1663 13:41:15.291088 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1664 13:41:15.294352 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1665 13:41:15.297772 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1666 13:41:15.301130 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1667 13:41:15.304658 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1668 13:41:15.307480 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1669 13:41:15.311443 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1670 13:41:15.314375 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1671 13:41:15.317948 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1672 13:41:15.321407 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1673 13:41:15.325007 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1674 13:41:15.327935 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1675 13:41:15.331298 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1676 13:41:15.338203 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1677 13:41:15.341359 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1678 13:41:15.344927 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1679 13:41:15.348306 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1680 13:41:15.351315 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1681 13:41:15.355144 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1682 13:41:15.358000 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1683 13:41:15.361292 972 |3 6 12|[0] xxxoxoox ooxooooo [MSB]
1684 13:41:15.364821 973 |3 6 13|[0] xxxoxoox ooxooooo [MSB]
1685 13:41:15.368007 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1686 13:41:15.371499 975 |3 6 15|[0] xxxooooo oooooooo [MSB]
1687 13:41:15.378721 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1688 13:41:15.381960 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1689 13:41:15.384934 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1690 13:41:15.388617 993 |3 6 33|[0] oooxoxoo xxxxxxxx [MSB]
1691 13:41:15.391818 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1692 13:41:15.394968 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1693 13:41:15.398358 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1694 13:41:15.401817 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1695 13:41:15.405415 Byte0, DQ PI dly=984, DQM PI dly= 984
1696 13:41:15.408793 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1697 13:41:15.409279
1698 13:41:15.415834 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1699 13:41:15.416349
1700 13:41:15.418543 Byte1, DQ PI dly=979, DQM PI dly= 979
1701 13:41:15.421829 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1702 13:41:15.422332
1703 13:41:15.425659 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1704 13:41:15.426177
1705 13:41:15.426513 ==
1706 13:41:15.432443 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1707 13:41:15.435497 fsp= 1, odt_onoff= 1, Byte mode= 0
1708 13:41:15.436012 ==
1709 13:41:15.439168 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1710 13:41:15.439682
1711 13:41:15.442656 Begin, DQ Scan Range 955~1019
1712 13:41:15.445296 Write Rank1 MR14 =0x0
1713 13:41:15.452862
1714 13:41:15.453388 CH=0, VrefRange= 0, VrefLevel = 0
1715 13:41:15.459440 TX Bit0 (977~997) 21 987, Bit8 (968~988) 21 978,
1716 13:41:15.462648 TX Bit1 (977~994) 18 985, Bit9 (969~989) 21 979,
1717 13:41:15.466179 TX Bit2 (977~995) 19 986, Bit10 (975~991) 17 983,
1718 13:41:15.472719 TX Bit3 (973~989) 17 981, Bit11 (970~988) 19 979,
1719 13:41:15.476637 TX Bit4 (977~995) 19 986, Bit12 (972~989) 18 980,
1720 13:41:15.483310 TX Bit5 (974~990) 17 982, Bit13 (970~986) 17 978,
1721 13:41:15.486189 TX Bit6 (975~991) 17 983, Bit14 (972~988) 17 980,
1722 13:41:15.489947 TX Bit7 (977~991) 15 984, Bit15 (973~990) 18 981,
1723 13:41:15.490460
1724 13:41:15.492508 Write Rank1 MR14 =0x2
1725 13:41:15.501361
1726 13:41:15.501869 CH=0, VrefRange= 0, VrefLevel = 2
1727 13:41:15.508067 TX Bit0 (977~997) 21 987, Bit8 (968~988) 21 978,
1728 13:41:15.511114 TX Bit1 (977~995) 19 986, Bit9 (969~989) 21 979,
1729 13:41:15.517963 TX Bit2 (977~996) 20 986, Bit10 (975~991) 17 983,
1730 13:41:15.521078 TX Bit3 (973~989) 17 981, Bit11 (969~988) 20 978,
1731 13:41:15.524501 TX Bit4 (977~996) 20 986, Bit12 (970~989) 20 979,
1732 13:41:15.531978 TX Bit5 (974~990) 17 982, Bit13 (970~987) 18 978,
1733 13:41:15.534983 TX Bit6 (974~991) 18 982, Bit14 (972~989) 18 980,
1734 13:41:15.538765 TX Bit7 (977~992) 16 984, Bit15 (972~990) 19 981,
1735 13:41:15.539277
1736 13:41:15.541324 Write Rank1 MR14 =0x4
1737 13:41:15.550003
1738 13:41:15.550511 CH=0, VrefRange= 0, VrefLevel = 4
1739 13:41:15.556805 TX Bit0 (977~997) 21 987, Bit8 (968~989) 22 978,
1740 13:41:15.559952 TX Bit1 (977~995) 19 986, Bit9 (969~989) 21 979,
1741 13:41:15.566874 TX Bit2 (977~996) 20 986, Bit10 (975~992) 18 983,
1742 13:41:15.570122 TX Bit3 (972~990) 19 981, Bit11 (969~989) 21 979,
1743 13:41:15.573439 TX Bit4 (976~997) 22 986, Bit12 (971~989) 19 980,
1744 13:41:15.580338 TX Bit5 (974~990) 17 982, Bit13 (969~988) 20 978,
1745 13:41:15.583396 TX Bit6 (974~991) 18 982, Bit14 (971~989) 19 980,
1746 13:41:15.587148 TX Bit7 (976~993) 18 984, Bit15 (972~991) 20 981,
1747 13:41:15.587574
1748 13:41:15.589796 Write Rank1 MR14 =0x6
1749 13:41:15.598669
1750 13:41:15.599188 CH=0, VrefRange= 0, VrefLevel = 6
1751 13:41:15.605770 TX Bit0 (977~998) 22 987, Bit8 (967~989) 23 978,
1752 13:41:15.608599 TX Bit1 (976~996) 21 986, Bit9 (968~990) 23 979,
1753 13:41:15.612383 TX Bit2 (977~996) 20 986, Bit10 (974~992) 19 983,
1754 13:41:15.618924 TX Bit3 (971~990) 20 980, Bit11 (968~989) 22 978,
1755 13:41:15.621889 TX Bit4 (976~997) 22 986, Bit12 (970~990) 21 980,
1756 13:41:15.628562 TX Bit5 (972~991) 20 981, Bit13 (969~988) 20 978,
1757 13:41:15.632030 TX Bit6 (974~992) 19 983, Bit14 (970~989) 20 979,
1758 13:41:15.635544 TX Bit7 (976~993) 18 984, Bit15 (972~991) 20 981,
1759 13:41:15.636048
1760 13:41:15.638616 Write Rank1 MR14 =0x8
1761 13:41:15.647404
1762 13:41:15.647906 CH=0, VrefRange= 0, VrefLevel = 8
1763 13:41:15.654362 TX Bit0 (977~998) 22 987, Bit8 (967~989) 23 978,
1764 13:41:15.657417 TX Bit1 (977~997) 21 987, Bit9 (969~990) 22 979,
1765 13:41:15.664166 TX Bit2 (977~997) 21 987, Bit10 (974~992) 19 983,
1766 13:41:15.667786 TX Bit3 (970~990) 21 980, Bit11 (968~989) 22 978,
1767 13:41:15.670779 TX Bit4 (976~997) 22 986, Bit12 (969~990) 22 979,
1768 13:41:15.677482 TX Bit5 (972~991) 20 981, Bit13 (968~988) 21 978,
1769 13:41:15.681008 TX Bit6 (973~992) 20 982, Bit14 (969~990) 22 979,
1770 13:41:15.684206 TX Bit7 (976~994) 19 985, Bit15 (972~991) 20 981,
1771 13:41:15.684637
1772 13:41:15.687673 Write Rank1 MR14 =0xa
1773 13:41:15.696060
1774 13:41:15.699358 CH=0, VrefRange= 0, VrefLevel = 10
1775 13:41:15.702868 TX Bit0 (977~998) 22 987, Bit8 (967~989) 23 978,
1776 13:41:15.706289 TX Bit1 (977~997) 21 987, Bit9 (969~990) 22 979,
1777 13:41:15.713118 TX Bit2 (977~997) 21 987, Bit10 (974~993) 20 983,
1778 13:41:15.716306 TX Bit3 (970~990) 21 980, Bit11 (968~990) 23 979,
1779 13:41:15.720339 TX Bit4 (976~998) 23 987, Bit12 (971~990) 20 980,
1780 13:41:15.726659 TX Bit5 (972~991) 20 981, Bit13 (968~989) 22 978,
1781 13:41:15.729376 TX Bit6 (972~993) 22 982, Bit14 (969~990) 22 979,
1782 13:41:15.733133 TX Bit7 (976~994) 19 985, Bit15 (972~992) 21 982,
1783 13:41:15.733814
1784 13:41:15.736114 Write Rank1 MR14 =0xc
1785 13:41:15.745087
1786 13:41:15.748748 CH=0, VrefRange= 0, VrefLevel = 12
1787 13:41:15.751900 TX Bit0 (977~999) 23 988, Bit8 (967~989) 23 978,
1788 13:41:15.755365 TX Bit1 (976~997) 22 986, Bit9 (968~990) 23 979,
1789 13:41:15.761876 TX Bit2 (976~998) 23 987, Bit10 (974~993) 20 983,
1790 13:41:15.765108 TX Bit3 (970~991) 22 980, Bit11 (967~990) 24 978,
1791 13:41:15.768871 TX Bit4 (976~998) 23 987, Bit12 (968~990) 23 979,
1792 13:41:15.775570 TX Bit5 (971~992) 22 981, Bit13 (968~989) 22 978,
1793 13:41:15.778626 TX Bit6 (972~993) 22 982, Bit14 (969~990) 22 979,
1794 13:41:15.782204 TX Bit7 (976~995) 20 985, Bit15 (972~992) 21 982,
1795 13:41:15.782632
1796 13:41:15.785356 Write Rank1 MR14 =0xe
1797 13:41:15.794061
1798 13:41:15.797453 CH=0, VrefRange= 0, VrefLevel = 14
1799 13:41:15.800596 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
1800 13:41:15.804086 TX Bit1 (976~998) 23 987, Bit9 (968~990) 23 979,
1801 13:41:15.810920 TX Bit2 (976~998) 23 987, Bit10 (974~994) 21 984,
1802 13:41:15.814365 TX Bit3 (970~991) 22 980, Bit11 (967~990) 24 978,
1803 13:41:15.818103 TX Bit4 (976~998) 23 987, Bit12 (969~990) 22 979,
1804 13:41:15.824261 TX Bit5 (971~992) 22 981, Bit13 (968~989) 22 978,
1805 13:41:15.827778 TX Bit6 (972~994) 23 983, Bit14 (968~990) 23 979,
1806 13:41:15.831086 TX Bit7 (976~995) 20 985, Bit15 (970~992) 23 981,
1807 13:41:15.831597
1808 13:41:15.833803 Write Rank1 MR14 =0x10
1809 13:41:15.843725
1810 13:41:15.846540 CH=0, VrefRange= 0, VrefLevel = 16
1811 13:41:15.850233 TX Bit0 (976~999) 24 987, Bit8 (967~990) 24 978,
1812 13:41:15.853720 TX Bit1 (976~998) 23 987, Bit9 (968~990) 23 979,
1813 13:41:15.860037 TX Bit2 (976~998) 23 987, Bit10 (973~994) 22 983,
1814 13:41:15.863584 TX Bit3 (969~991) 23 980, Bit11 (967~990) 24 978,
1815 13:41:15.866965 TX Bit4 (975~999) 25 987, Bit12 (968~991) 24 979,
1816 13:41:15.873760 TX Bit5 (971~992) 22 981, Bit13 (968~990) 23 979,
1817 13:41:15.876863 TX Bit6 (971~994) 24 982, Bit14 (968~991) 24 979,
1818 13:41:15.880300 TX Bit7 (975~996) 22 985, Bit15 (971~993) 23 982,
1819 13:41:15.880805
1820 13:41:15.883304 Write Rank1 MR14 =0x12
1821 13:41:15.892733
1822 13:41:15.896293 CH=0, VrefRange= 0, VrefLevel = 18
1823 13:41:15.899022 TX Bit0 (976~1000) 25 988, Bit8 (967~990) 24 978,
1824 13:41:15.903195 TX Bit1 (976~998) 23 987, Bit9 (967~991) 25 979,
1825 13:41:15.909098 TX Bit2 (976~999) 24 987, Bit10 (973~995) 23 984,
1826 13:41:15.913054 TX Bit3 (969~992) 24 980, Bit11 (967~990) 24 978,
1827 13:41:15.915947 TX Bit4 (975~999) 25 987, Bit12 (968~991) 24 979,
1828 13:41:15.923138 TX Bit5 (970~993) 24 981, Bit13 (968~990) 23 979,
1829 13:41:15.926374 TX Bit6 (971~995) 25 983, Bit14 (968~991) 24 979,
1830 13:41:15.929651 TX Bit7 (975~997) 23 986, Bit15 (970~994) 25 982,
1831 13:41:15.930160
1832 13:41:15.932891 Write Rank1 MR14 =0x14
1833 13:41:15.941851
1834 13:41:15.945415 CH=0, VrefRange= 0, VrefLevel = 20
1835 13:41:15.948847 TX Bit0 (976~1000) 25 988, Bit8 (966~990) 25 978,
1836 13:41:15.952755 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
1837 13:41:15.958842 TX Bit2 (976~999) 24 987, Bit10 (973~995) 23 984,
1838 13:41:15.962239 TX Bit3 (969~992) 24 980, Bit11 (967~991) 25 979,
1839 13:41:15.965570 TX Bit4 (975~999) 25 987, Bit12 (968~991) 24 979,
1840 13:41:15.972436 TX Bit5 (970~994) 25 982, Bit13 (967~990) 24 978,
1841 13:41:15.975727 TX Bit6 (971~995) 25 983, Bit14 (967~991) 25 979,
1842 13:41:15.978788 TX Bit7 (974~997) 24 985, Bit15 (968~993) 26 980,
1843 13:41:15.979214
1844 13:41:15.982084 Write Rank1 MR14 =0x16
1845 13:41:15.991432
1846 13:41:15.995172 CH=0, VrefRange= 0, VrefLevel = 22
1847 13:41:15.998037 TX Bit0 (976~1001) 26 988, Bit8 (966~990) 25 978,
1848 13:41:16.001512 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
1849 13:41:16.008099 TX Bit2 (976~999) 24 987, Bit10 (973~996) 24 984,
1850 13:41:16.011740 TX Bit3 (969~993) 25 981, Bit11 (967~991) 25 979,
1851 13:41:16.014869 TX Bit4 (975~999) 25 987, Bit12 (968~991) 24 979,
1852 13:41:16.021571 TX Bit5 (970~994) 25 982, Bit13 (967~990) 24 978,
1853 13:41:16.024704 TX Bit6 (970~995) 26 982, Bit14 (967~991) 25 979,
1854 13:41:16.027953 TX Bit7 (973~997) 25 985, Bit15 (969~993) 25 981,
1855 13:41:16.028378
1856 13:41:16.031672 Write Rank1 MR14 =0x18
1857 13:41:16.041173
1858 13:41:16.044616 CH=0, VrefRange= 0, VrefLevel = 24
1859 13:41:16.047224 TX Bit0 (976~1001) 26 988, Bit8 (966~990) 25 978,
1860 13:41:16.051330 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
1861 13:41:16.057766 TX Bit2 (976~999) 24 987, Bit10 (973~996) 24 984,
1862 13:41:16.061552 TX Bit3 (969~993) 25 981, Bit11 (967~991) 25 979,
1863 13:41:16.064526 TX Bit4 (975~999) 25 987, Bit12 (968~991) 24 979,
1864 13:41:16.071258 TX Bit5 (970~994) 25 982, Bit13 (967~990) 24 978,
1865 13:41:16.074711 TX Bit6 (970~995) 26 982, Bit14 (967~991) 25 979,
1866 13:41:16.077987 TX Bit7 (973~997) 25 985, Bit15 (969~993) 25 981,
1867 13:41:16.078497
1868 13:41:16.081376 Write Rank1 MR14 =0x1a
1869 13:41:16.090408
1870 13:41:16.093618 CH=0, VrefRange= 0, VrefLevel = 26
1871 13:41:16.096975 TX Bit0 (976~1001) 26 988, Bit8 (966~990) 25 978,
1872 13:41:16.101039 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
1873 13:41:16.107212 TX Bit2 (976~999) 24 987, Bit10 (973~996) 24 984,
1874 13:41:16.110144 TX Bit3 (969~993) 25 981, Bit11 (967~991) 25 979,
1875 13:41:16.113468 TX Bit4 (975~999) 25 987, Bit12 (968~991) 24 979,
1876 13:41:16.120443 TX Bit5 (970~994) 25 982, Bit13 (967~990) 24 978,
1877 13:41:16.123517 TX Bit6 (970~995) 26 982, Bit14 (967~991) 25 979,
1878 13:41:16.126798 TX Bit7 (973~997) 25 985, Bit15 (969~993) 25 981,
1879 13:41:16.127230
1880 13:41:16.130330 Write Rank1 MR14 =0x1c
1881 13:41:16.139678
1882 13:41:16.140182 CH=0, VrefRange= 0, VrefLevel = 28
1883 13:41:16.146514 TX Bit0 (976~1001) 26 988, Bit8 (966~990) 25 978,
1884 13:41:16.149834 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
1885 13:41:16.156643 TX Bit2 (976~999) 24 987, Bit10 (973~996) 24 984,
1886 13:41:16.160055 TX Bit3 (969~993) 25 981, Bit11 (967~991) 25 979,
1887 13:41:16.163577 TX Bit4 (975~999) 25 987, Bit12 (968~991) 24 979,
1888 13:41:16.169744 TX Bit5 (970~994) 25 982, Bit13 (967~990) 24 978,
1889 13:41:16.173177 TX Bit6 (970~995) 26 982, Bit14 (967~991) 25 979,
1890 13:41:16.176464 TX Bit7 (973~997) 25 985, Bit15 (969~993) 25 981,
1891 13:41:16.176893
1892 13:41:16.179913 Write Rank1 MR14 =0x1e
1893 13:41:16.189047
1894 13:41:16.192395 CH=0, VrefRange= 0, VrefLevel = 30
1895 13:41:16.195555 TX Bit0 (976~1001) 26 988, Bit8 (966~990) 25 978,
1896 13:41:16.198771 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
1897 13:41:16.205424 TX Bit2 (976~999) 24 987, Bit10 (973~996) 24 984,
1898 13:41:16.208899 TX Bit3 (969~993) 25 981, Bit11 (967~991) 25 979,
1899 13:41:16.212328 TX Bit4 (975~999) 25 987, Bit12 (968~991) 24 979,
1900 13:41:16.218928 TX Bit5 (970~994) 25 982, Bit13 (967~990) 24 978,
1901 13:41:16.222511 TX Bit6 (970~995) 26 982, Bit14 (967~991) 25 979,
1902 13:41:16.225852 TX Bit7 (973~997) 25 985, Bit15 (969~993) 25 981,
1903 13:41:16.226283
1904 13:41:16.226684
1905 13:41:16.229195 TX Vref found, early break! 372< 377
1906 13:41:16.236460 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1907 13:41:16.239982 u1DelayCellOfst[0]=8 cells (7 PI)
1908 13:41:16.242909 u1DelayCellOfst[1]=7 cells (6 PI)
1909 13:41:16.245977 u1DelayCellOfst[2]=7 cells (6 PI)
1910 13:41:16.246475 u1DelayCellOfst[3]=0 cells (0 PI)
1911 13:41:16.249451 u1DelayCellOfst[4]=7 cells (6 PI)
1912 13:41:16.252941 u1DelayCellOfst[5]=1 cells (1 PI)
1913 13:41:16.255860 u1DelayCellOfst[6]=1 cells (1 PI)
1914 13:41:16.259387 u1DelayCellOfst[7]=5 cells (4 PI)
1915 13:41:16.263351 Byte0, DQ PI dly=981, DQM PI dly= 984
1916 13:41:16.266110 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1917 13:41:16.266532
1918 13:41:16.272845 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1919 13:41:16.273011
1920 13:41:16.276315 u1DelayCellOfst[8]=0 cells (0 PI)
1921 13:41:16.276552 u1DelayCellOfst[9]=1 cells (1 PI)
1922 13:41:16.279589 u1DelayCellOfst[10]=7 cells (6 PI)
1923 13:41:16.282948 u1DelayCellOfst[11]=1 cells (1 PI)
1924 13:41:16.286165 u1DelayCellOfst[12]=1 cells (1 PI)
1925 13:41:16.289382 u1DelayCellOfst[13]=0 cells (0 PI)
1926 13:41:16.293320 u1DelayCellOfst[14]=1 cells (1 PI)
1927 13:41:16.296229 u1DelayCellOfst[15]=3 cells (3 PI)
1928 13:41:16.299731 Byte1, DQ PI dly=978, DQM PI dly= 981
1929 13:41:16.303198 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1930 13:41:16.303713
1931 13:41:16.310215 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1932 13:41:16.310748
1933 13:41:16.311094 Write Rank1 MR14 =0x16
1934 13:41:16.311409
1935 13:41:16.313081 Final TX Range 0 Vref 22
1936 13:41:16.313554
1937 13:41:16.319944 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1938 13:41:16.320375
1939 13:41:16.326650 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1940 13:41:16.333551 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1941 13:41:16.340147 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1942 13:41:16.343807 Write Rank1 MR3 =0xb0
1943 13:41:16.344317 DramC Write-DBI on
1944 13:41:16.344652 ==
1945 13:41:16.349922 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1946 13:41:16.353766 fsp= 1, odt_onoff= 1, Byte mode= 0
1947 13:41:16.354194 ==
1948 13:41:16.357378 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1949 13:41:16.357888
1950 13:41:16.360316 Begin, DQ Scan Range 701~765
1951 13:41:16.360743
1952 13:41:16.361073
1953 13:41:16.364075 TX Vref Scan disable
1954 13:41:16.367190 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1955 13:41:16.371056 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1956 13:41:16.374054 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1957 13:41:16.377432 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1958 13:41:16.381326 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1959 13:41:16.384075 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1960 13:41:16.387982 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1961 13:41:16.391039 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1962 13:41:16.394656 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1963 13:41:16.397606 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1964 13:41:16.400862 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1965 13:41:16.404362 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1966 13:41:16.408212 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1967 13:41:16.411849 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1968 13:41:16.419741 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1969 13:41:16.423052 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1970 13:41:16.425630 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1971 13:41:16.429709 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1972 13:41:16.432544 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1973 13:41:16.435975 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1974 13:41:16.439856 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1975 13:41:16.442591 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1976 13:41:16.446190 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1977 13:41:16.449434 Byte0, DQ PI dly=728, DQM PI dly= 728
1978 13:41:16.452627 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
1979 13:41:16.453127
1980 13:41:16.459264 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
1981 13:41:16.459755
1982 13:41:16.462875 Byte1, DQ PI dly=722, DQM PI dly= 722
1983 13:41:16.465812 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
1984 13:41:16.466240
1985 13:41:16.469874 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
1986 13:41:16.470379
1987 13:41:16.476408 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1988 13:41:16.483090 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1989 13:41:16.489894 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1990 13:41:16.493448 Write Rank1 MR3 =0x30
1991 13:41:16.493947 DramC Write-DBI off
1992 13:41:16.496511
1993 13:41:16.497004 [DATLAT]
1994 13:41:16.499578 Freq=1600, CH0 RK1, use_rxtx_scan=0
1995 13:41:16.499996
1996 13:41:16.500342 DATLAT Default: 0x10
1997 13:41:16.503175 7, 0xFFFF, sum=0
1998 13:41:16.503604 8, 0xFFFF, sum=0
1999 13:41:16.506714 9, 0xFFFF, sum=0
2000 13:41:16.507141 10, 0xFFFF, sum=0
2001 13:41:16.509736 11, 0xFFFF, sum=0
2002 13:41:16.510164 12, 0xFFFF, sum=0
2003 13:41:16.513393 13, 0xFFFF, sum=0
2004 13:41:16.513921 14, 0x0, sum=1
2005 13:41:16.516818 15, 0x0, sum=2
2006 13:41:16.517393 16, 0x0, sum=3
2007 13:41:16.517738 17, 0x0, sum=4
2008 13:41:16.523268 pattern=2 first_step=14 total pass=5 best_step=16
2009 13:41:16.523776 ==
2010 13:41:16.526899 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2011 13:41:16.529952 fsp= 1, odt_onoff= 1, Byte mode= 0
2012 13:41:16.530374 ==
2013 13:41:16.537303 Start DQ dly to find pass range UseTestEngine =1
2014 13:41:16.540227 x-axis: bit #, y-axis: DQ dly (-127~63)
2015 13:41:16.540760 RX Vref Scan = 0
2016 13:41:16.543599 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2017 13:41:16.546930 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2018 13:41:16.550352 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2019 13:41:16.553711 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2020 13:41:16.554244 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2021 13:41:16.557060 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2022 13:41:16.560163 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2023 13:41:16.563438 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2024 13:41:16.566797 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2025 13:41:16.570483 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2026 13:41:16.574427 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2027 13:41:16.574954 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2028 13:41:16.578107 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2029 13:41:16.581908 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2030 13:41:16.585323 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2031 13:41:16.588697 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2032 13:41:16.589147 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2033 13:41:16.591858 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2034 13:41:16.595349 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2035 13:41:16.598672 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2036 13:41:16.602471 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2037 13:41:16.605466 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2038 13:41:16.605898 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2039 13:41:16.609085 -3, [0] xxxoxxxx xxxxxxxx [MSB]
2040 13:41:16.612713 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2041 13:41:16.615364 -1, [0] xxxoxoxx xxxxxxxx [MSB]
2042 13:41:16.618874 0, [0] xxxoxoxx oxxoxxxx [MSB]
2043 13:41:16.622245 1, [0] xxxoxoxx oxxoxxxx [MSB]
2044 13:41:16.625332 2, [0] xxxoxoox oxxoxoox [MSB]
2045 13:41:16.625769 3, [0] xxxoxooo ooxooooo [MSB]
2046 13:41:16.629177 4, [0] xxxoxooo ooxooooo [MSB]
2047 13:41:16.632240 5, [0] xxxoxooo ooxooooo [MSB]
2048 13:41:16.636264 6, [0] xoxoxooo oooooooo [MSB]
2049 13:41:16.639010 7, [0] ooxooooo oooooooo [MSB]
2050 13:41:16.642413 32, [0] oooxoooo oooooooo [MSB]
2051 13:41:16.645524 33, [0] oooxoooo oooooooo [MSB]
2052 13:41:16.649181 34, [0] oooxoxoo oooooxoo [MSB]
2053 13:41:16.652572 35, [0] oooxoxox oooxoxxo [MSB]
2054 13:41:16.653001 36, [0] oooxoxxx xooxoxxo [MSB]
2055 13:41:16.655870 37, [0] oooxoxxx xxoxxxxo [MSB]
2056 13:41:16.660337 38, [0] oooxoxxx xxoxxxxx [MSB]
2057 13:41:16.664306 39, [0] oooxoxxx xxoxxxxx [MSB]
2058 13:41:16.664738 40, [0] ooxxoxxx xxxxxxxx [MSB]
2059 13:41:16.668519 41, [0] oxxxxxxx xxxxxxxx [MSB]
2060 13:41:16.672465 42, [0] xxxxxxxx xxxxxxxx [MSB]
2061 13:41:16.675850 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
2062 13:41:16.679690 iDelay=42, Bit 1, Center 23 (6 ~ 40) 35
2063 13:41:16.683042 iDelay=42, Bit 2, Center 23 (8 ~ 39) 32
2064 13:41:16.686380 iDelay=42, Bit 3, Center 14 (-3 ~ 31) 35
2065 13:41:16.689812 iDelay=42, Bit 4, Center 23 (7 ~ 40) 34
2066 13:41:16.692986 iDelay=42, Bit 5, Center 16 (-1 ~ 33) 35
2067 13:41:16.696075 iDelay=42, Bit 6, Center 18 (2 ~ 35) 34
2068 13:41:16.699290 iDelay=42, Bit 7, Center 18 (3 ~ 34) 32
2069 13:41:16.702898 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
2070 13:41:16.706535 iDelay=42, Bit 9, Center 19 (3 ~ 36) 34
2071 13:41:16.709990 iDelay=42, Bit 10, Center 22 (6 ~ 39) 34
2072 13:41:16.712765 iDelay=42, Bit 11, Center 17 (0 ~ 34) 35
2073 13:41:16.716105 iDelay=42, Bit 12, Center 19 (3 ~ 36) 34
2074 13:41:16.719533 iDelay=42, Bit 13, Center 17 (2 ~ 33) 32
2075 13:41:16.726547 iDelay=42, Bit 14, Center 18 (2 ~ 34) 33
2076 13:41:16.729414 iDelay=42, Bit 15, Center 20 (3 ~ 37) 35
2077 13:41:16.729844 ==
2078 13:41:16.732605 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2079 13:41:16.735886 fsp= 1, odt_onoff= 1, Byte mode= 0
2080 13:41:16.736315 ==
2081 13:41:16.739713 DQS Delay:
2082 13:41:16.740139 DQS0 = 0, DQS1 = 0
2083 13:41:16.740471 DQM Delay:
2084 13:41:16.743542 DQM0 = 19, DQM1 = 18
2085 13:41:16.743967 DQ Delay:
2086 13:41:16.747143 DQ0 =24, DQ1 =23, DQ2 =23, DQ3 =14
2087 13:41:16.750245 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
2088 13:41:16.753532 DQ8 =17, DQ9 =19, DQ10 =22, DQ11 =17
2089 13:41:16.756877 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20
2090 13:41:16.757184
2091 13:41:16.757445
2092 13:41:16.757703
2093 13:41:16.760182 [DramC_TX_OE_Calibration] TA2
2094 13:41:16.763663 Original DQ_B0 (3 6) =30, OEN = 27
2095 13:41:16.766768 Original DQ_B1 (3 6) =30, OEN = 27
2096 13:41:16.766956 23, 0x0, End_B0=23 End_B1=23
2097 13:41:16.769911 24, 0x0, End_B0=24 End_B1=24
2098 13:41:16.773754 25, 0x0, End_B0=25 End_B1=25
2099 13:41:16.776950 26, 0x0, End_B0=26 End_B1=26
2100 13:41:16.777090 27, 0x0, End_B0=27 End_B1=27
2101 13:41:16.780012 28, 0x0, End_B0=28 End_B1=28
2102 13:41:16.783375 29, 0x0, End_B0=29 End_B1=29
2103 13:41:16.786734 30, 0x0, End_B0=30 End_B1=30
2104 13:41:16.790455 31, 0xFFFF, End_B0=30 End_B1=30
2105 13:41:16.793494 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2106 13:41:16.800397 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2107 13:41:16.800568
2108 13:41:16.800683
2109 13:41:16.803751 Write Rank1 MR23 =0x3f
2110 13:41:16.803893 [DQSOSC]
2111 13:41:16.810546 [DQSOSCAuto] RK1, (LSB)MR18= 0x8f, (MSB)MR19= 0x3, tDQSOscB0 = 345 ps tDQSOscB1 = 0 ps
2112 13:41:16.816914 CH0_RK1: MR19=0x3, MR18=0x8F, DQSOSC=345, MR23=63, INC=20, DEC=31
2113 13:41:16.816994 Write Rank1 MR23 =0x3f
2114 13:41:16.820394 [DQSOSC]
2115 13:41:16.826958 [DQSOSCAuto] RK1, (LSB)MR18= 0x8d, (MSB)MR19= 0x3, tDQSOscB0 = 346 ps tDQSOscB1 = 0 ps
2116 13:41:16.830646 CH0 RK1: MR19=3, MR18=8D
2117 13:41:16.834248 [RxdqsGatingPostProcess] freq 1600
2118 13:41:16.837360 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2119 13:41:16.837520 Rank: 0
2120 13:41:16.840624 best DQS0 dly(2T, 0.5T) = (2, 5)
2121 13:41:16.843965 best DQS1 dly(2T, 0.5T) = (2, 5)
2122 13:41:16.847235 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2123 13:41:16.850536 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2124 13:41:16.850686 Rank: 1
2125 13:41:16.854054 best DQS0 dly(2T, 0.5T) = (2, 6)
2126 13:41:16.857313 best DQS1 dly(2T, 0.5T) = (2, 6)
2127 13:41:16.860909 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2128 13:41:16.864493 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2129 13:41:16.867834 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2130 13:41:16.871316 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2131 13:41:16.877890 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2132 13:41:16.878322 Write Rank0 MR13 =0x59
2133 13:41:16.881285 ==
2134 13:41:16.884710 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2135 13:41:16.887716 fsp= 1, odt_onoff= 1, Byte mode= 0
2136 13:41:16.888141 ==
2137 13:41:16.891562 === u2Vref_new: 0x56 --> 0x3a
2138 13:41:16.894889 === u2Vref_new: 0x58 --> 0x58
2139 13:41:16.897790 === u2Vref_new: 0x5a --> 0x5a
2140 13:41:16.901146 === u2Vref_new: 0x5c --> 0x78
2141 13:41:16.904423 === u2Vref_new: 0x5e --> 0x7a
2142 13:41:16.904851 === u2Vref_new: 0x60 --> 0x90
2143 13:41:16.908681 [CA 0] Center 37 (11~63) winsize 53
2144 13:41:16.911838 [CA 1] Center 35 (8~63) winsize 56
2145 13:41:16.914630 [CA 2] Center 33 (4~63) winsize 60
2146 13:41:16.918772 [CA 3] Center 33 (4~63) winsize 60
2147 13:41:16.921716 [CA 4] Center 34 (5~63) winsize 59
2148 13:41:16.925104 [CA 5] Center 28 (-1~57) winsize 59
2149 13:41:16.925575
2150 13:41:16.928354 [CATrainingPosCal] consider 1 rank data
2151 13:41:16.932011 u2DelayCellTimex100 = 762/100 ps
2152 13:41:16.935288 CA0 delay=37 (11~63),Diff = 9 PI (11 cell)
2153 13:41:16.938380 CA1 delay=35 (8~63),Diff = 7 PI (8 cell)
2154 13:41:16.941968 CA2 delay=33 (4~63),Diff = 5 PI (6 cell)
2155 13:41:16.945187 CA3 delay=33 (4~63),Diff = 5 PI (6 cell)
2156 13:41:16.952052 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2157 13:41:16.955695 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2158 13:41:16.956200
2159 13:41:16.958229 CA PerBit enable=1, Macro0, CA PI delay=28
2160 13:41:16.962258 === u2Vref_new: 0x58 --> 0x58
2161 13:41:16.962767
2162 13:41:16.963101 Vref(ca) range 1: 24
2163 13:41:16.963410
2164 13:41:16.965462 CS Dly= 13 (44-0-32)
2165 13:41:16.968529 Write Rank0 MR13 =0xd8
2166 13:41:16.969041 Write Rank0 MR13 =0xd8
2167 13:41:16.972316 Write Rank0 MR12 =0x58
2168 13:41:16.972908 Write Rank1 MR13 =0x59
2169 13:41:16.973288 ==
2170 13:41:16.978653 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2171 13:41:16.981803 fsp= 1, odt_onoff= 1, Byte mode= 0
2172 13:41:16.982227 ==
2173 13:41:16.985384 === u2Vref_new: 0x56 --> 0x3a
2174 13:41:16.989295 === u2Vref_new: 0x58 --> 0x58
2175 13:41:16.991832 === u2Vref_new: 0x5a --> 0x5a
2176 13:41:16.995658 === u2Vref_new: 0x5c --> 0x78
2177 13:41:16.996240 === u2Vref_new: 0x5e --> 0x7a
2178 13:41:16.998861 === u2Vref_new: 0x60 --> 0x90
2179 13:41:16.999284
2180 13:41:17.002225 CBT Vref found, early break!
2181 13:41:17.005708 [CA 0] Center 37 (11~63) winsize 53
2182 13:41:17.009190 [CA 1] Center 35 (7~63) winsize 57
2183 13:41:17.012535 [CA 2] Center 33 (4~63) winsize 60
2184 13:41:17.015533 [CA 3] Center 34 (5~63) winsize 59
2185 13:41:17.019197 [CA 4] Center 34 (6~63) winsize 58
2186 13:41:17.022346 [CA 5] Center 27 (-2~56) winsize 59
2187 13:41:17.022771
2188 13:41:17.026008 [CATrainingPosCal] consider 2 rank data
2189 13:41:17.029128 u2DelayCellTimex100 = 762/100 ps
2190 13:41:17.032906 CA0 delay=37 (11~63),Diff = 10 PI (12 cell)
2191 13:41:17.036423 CA1 delay=35 (8~63),Diff = 8 PI (10 cell)
2192 13:41:17.039611 CA2 delay=33 (4~63),Diff = 6 PI (7 cell)
2193 13:41:17.042748 CA3 delay=34 (5~63),Diff = 7 PI (8 cell)
2194 13:41:17.045952 CA4 delay=34 (6~63),Diff = 7 PI (8 cell)
2195 13:41:17.049495 CA5 delay=27 (-1~56),Diff = 0 PI (0 cell)
2196 13:41:17.049996
2197 13:41:17.055987 CA PerBit enable=1, Macro0, CA PI delay=27
2198 13:41:17.056489 === u2Vref_new: 0x56 --> 0x3a
2199 13:41:17.056856
2200 13:41:17.059407 Vref(ca) range 1: 22
2201 13:41:17.059909
2202 13:41:17.062755 CS Dly= 12 (43-0-32)
2203 13:41:17.063255 Write Rank1 MR13 =0xd8
2204 13:41:17.066090 Write Rank1 MR13 =0xd8
2205 13:41:17.069589 Write Rank1 MR12 =0x56
2206 13:41:17.073162 [RankSwap] Rank num 2, (Multi 1), Rank 0
2207 13:41:17.073716 Write Rank0 MR2 =0xad
2208 13:41:17.076552 [Write Leveling]
2209 13:41:17.079817 delay byte0 byte1 byte2 byte3
2210 13:41:17.080317
2211 13:41:17.080648 10 0 0
2212 13:41:17.080965 11 0 0
2213 13:41:17.083053 12 0 0
2214 13:41:17.083480 13 0 0
2215 13:41:17.086259 14 0 0
2216 13:41:17.086689 15 0 0
2217 13:41:17.087024 16 0 0
2218 13:41:17.089659 17 0 0
2219 13:41:17.090177 18 0 0
2220 13:41:17.092750 19 0 0
2221 13:41:17.093183 20 0 0
2222 13:41:17.096300 21 0 0
2223 13:41:17.096819 22 0 0
2224 13:41:17.097165 23 0 0
2225 13:41:17.099578 24 0 0
2226 13:41:17.100142 25 0 0
2227 13:41:17.102955 26 0 0
2228 13:41:17.103467 27 0 0
2229 13:41:17.103809 28 0 0
2230 13:41:17.106072 29 0 0
2231 13:41:17.106538 30 0 0
2232 13:41:17.109858 31 0 0
2233 13:41:17.110375 32 0 ff
2234 13:41:17.113434 33 0 ff
2235 13:41:17.113947 34 0 ff
2236 13:41:17.114288 35 0 ff
2237 13:41:17.116585 36 ff ff
2238 13:41:17.117013 37 ff ff
2239 13:41:17.119923 38 ff ff
2240 13:41:17.120432 39 ff ff
2241 13:41:17.122999 40 ff ff
2242 13:41:17.123429 41 ff ff
2243 13:41:17.126939 42 ff ff
2244 13:41:17.130524 pass bytecount = 0xff (0xff: all bytes pass)
2245 13:41:17.131029
2246 13:41:17.131361 DQS0 dly: 36
2247 13:41:17.133349 DQS1 dly: 32
2248 13:41:17.133852 Write Rank0 MR2 =0x2d
2249 13:41:17.136991 [RankSwap] Rank num 2, (Multi 1), Rank 0
2250 13:41:17.139978 Write Rank0 MR1 =0xd6
2251 13:41:17.140482 [Gating]
2252 13:41:17.140810 ==
2253 13:41:17.146842 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2254 13:41:17.150159 fsp= 1, odt_onoff= 1, Byte mode= 0
2255 13:41:17.150701 ==
2256 13:41:17.153436 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2257 13:41:17.157348 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2258 13:41:17.164057 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2259 13:41:17.166896 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2260 13:41:17.170290 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2261 13:41:17.173861 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2262 13:41:17.180416 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2263 13:41:17.183689 3 1 28 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2264 13:41:17.187157 3 2 0 |201 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2265 13:41:17.193793 3 2 4 |3d3d 302 |(11 11)(11 11) |(1 1)(0 0)| 0
2266 13:41:17.197399 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2267 13:41:17.200312 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2268 13:41:17.203551 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2269 13:41:17.210785 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2270 13:41:17.213762 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2271 13:41:17.216818 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2272 13:41:17.223975 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2273 13:41:17.227271 3 3 4 |e0e 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2274 13:41:17.230821 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2275 13:41:17.233747 [Byte 0] Lead/lag Transition tap number (1)
2276 13:41:17.240816 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2277 13:41:17.244190 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2278 13:41:17.247606 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2279 13:41:17.253885 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2280 13:41:17.257079 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2281 13:41:17.260868 3 4 0 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2282 13:41:17.267425 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2283 13:41:17.270761 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2284 13:41:17.274175 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2285 13:41:17.277690 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2286 13:41:17.284160 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2287 13:41:17.287707 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2288 13:41:17.291072 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2289 13:41:17.297954 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2290 13:41:17.301280 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2291 13:41:17.304387 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2292 13:41:17.308045 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2293 13:41:17.314675 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2294 13:41:17.318014 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2295 13:41:17.321606 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2296 13:41:17.327996 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2297 13:41:17.331757 [Byte 0] Lead/lag Transition tap number (3)
2298 13:41:17.335122 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2299 13:41:17.338131 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2300 13:41:17.345142 3 6 0 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2301 13:41:17.348306 [Byte 1] Lead/lag Transition tap number (3)
2302 13:41:17.351304 3 6 4 |4646 1818 |(0 0)(11 11) |(0 0)(0 0)| 0
2303 13:41:17.354783 [Byte 0]First pass (3, 6, 4)
2304 13:41:17.358083 3 6 8 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
2305 13:41:17.361753 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2306 13:41:17.365290 [Byte 1]First pass (3, 6, 12)
2307 13:41:17.368032 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2308 13:41:17.371631 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2309 13:41:17.378655 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2310 13:41:17.381989 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2311 13:41:17.385038 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2312 13:41:17.388166 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2313 13:41:17.391901 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2314 13:41:17.398746 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2315 13:41:17.401861 All bytes gating window > 1UI, Early break!
2316 13:41:17.402296
2317 13:41:17.405087 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 22)
2318 13:41:17.405549
2319 13:41:17.408543 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
2320 13:41:17.409048
2321 13:41:17.409426
2322 13:41:17.409731
2323 13:41:17.411763 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 22)
2324 13:41:17.412189
2325 13:41:17.418890 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
2326 13:41:17.419313
2327 13:41:17.419642
2328 13:41:17.419948 Write Rank0 MR1 =0x56
2329 13:41:17.420239
2330 13:41:17.421740 best RODT dly(2T, 0.5T) = (2, 2)
2331 13:41:17.422162
2332 13:41:17.425203 best RODT dly(2T, 0.5T) = (2, 2)
2333 13:41:17.425754 ==
2334 13:41:17.432862 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2335 13:41:17.435656 fsp= 1, odt_onoff= 1, Byte mode= 0
2336 13:41:17.436162 ==
2337 13:41:17.438769 Start DQ dly to find pass range UseTestEngine =0
2338 13:41:17.441835 x-axis: bit #, y-axis: DQ dly (-127~63)
2339 13:41:17.445346 RX Vref Scan = 0
2340 13:41:17.445842 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2341 13:41:17.448693 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2342 13:41:17.451756 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2343 13:41:17.455262 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2344 13:41:17.459064 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2345 13:41:17.462222 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2346 13:41:17.465608 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2347 13:41:17.468936 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2348 13:41:17.469489 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2349 13:41:17.472517 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2350 13:41:17.475414 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2351 13:41:17.479149 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2352 13:41:17.482158 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2353 13:41:17.485327 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2354 13:41:17.488213 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2355 13:41:17.491764 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2356 13:41:17.492391 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2357 13:41:17.495207 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2358 13:41:17.499040 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2359 13:41:17.502046 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2360 13:41:17.505317 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2361 13:41:17.508638 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2362 13:41:17.511904 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2363 13:41:17.512331 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2364 13:41:17.515352 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2365 13:41:17.518975 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2366 13:41:17.522462 0, [0] xxxxxxxx xxxxxxxo [MSB]
2367 13:41:17.525671 1, [0] xxxoxxxx xxxxxxxo [MSB]
2368 13:41:17.528914 2, [0] xxxoxxxx xxxxxxxo [MSB]
2369 13:41:17.529483 3, [0] xxoooxxo oxoxxxxo [MSB]
2370 13:41:17.532526 4, [0] xxoooxxo oooxxxxo [MSB]
2371 13:41:17.535815 5, [0] xxoooxxo oooooooo [MSB]
2372 13:41:17.538544 6, [0] oooooxxo oooooooo [MSB]
2373 13:41:17.542250 31, [0] oooxoooo oooooooo [MSB]
2374 13:41:17.545749 32, [0] ooxxoooo ooooooox [MSB]
2375 13:41:17.546383 33, [0] ooxxoooo oxooooox [MSB]
2376 13:41:17.549305 34, [0] ooxxoooo oxxoooox [MSB]
2377 13:41:17.551941 35, [0] ooxxoooo oxxxooxx [MSB]
2378 13:41:17.555450 36, [0] ooxxxoox xxxxooxx [MSB]
2379 13:41:17.558943 37, [0] ooxxxoox xxxxoxxx [MSB]
2380 13:41:17.562227 38, [0] ooxxxoox xxxxoxxx [MSB]
2381 13:41:17.565499 39, [0] ooxxxoox xxxxxxxx [MSB]
2382 13:41:17.565935 40, [0] ooxxxoox xxxxxxxx [MSB]
2383 13:41:17.568945 41, [0] xxxxxxxx xxxxxxxx [MSB]
2384 13:41:17.572421 iDelay=41, Bit 0, Center 23 (6 ~ 40) 35
2385 13:41:17.575929 iDelay=41, Bit 1, Center 23 (6 ~ 40) 35
2386 13:41:17.579227 iDelay=41, Bit 2, Center 17 (3 ~ 31) 29
2387 13:41:17.582477 iDelay=41, Bit 3, Center 15 (1 ~ 30) 30
2388 13:41:17.589097 iDelay=41, Bit 4, Center 19 (3 ~ 35) 33
2389 13:41:17.592373 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2390 13:41:17.595643 iDelay=41, Bit 6, Center 23 (7 ~ 40) 34
2391 13:41:17.598999 iDelay=41, Bit 7, Center 19 (3 ~ 35) 33
2392 13:41:17.602364 iDelay=41, Bit 8, Center 19 (3 ~ 35) 33
2393 13:41:17.605900 iDelay=41, Bit 9, Center 18 (4 ~ 32) 29
2394 13:41:17.609119 iDelay=41, Bit 10, Center 18 (3 ~ 33) 31
2395 13:41:17.612335 iDelay=41, Bit 11, Center 19 (5 ~ 34) 30
2396 13:41:17.615348 iDelay=41, Bit 12, Center 21 (5 ~ 38) 34
2397 13:41:17.618779 iDelay=41, Bit 13, Center 20 (5 ~ 36) 32
2398 13:41:17.622383 iDelay=41, Bit 14, Center 19 (5 ~ 34) 30
2399 13:41:17.625644 iDelay=41, Bit 15, Center 15 (0 ~ 31) 32
2400 13:41:17.626155 ==
2401 13:41:17.632695 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2402 13:41:17.635751 fsp= 1, odt_onoff= 1, Byte mode= 0
2403 13:41:17.636265 ==
2404 13:41:17.636603 DQS Delay:
2405 13:41:17.639200 DQS0 = 0, DQS1 = 0
2406 13:41:17.639710 DQM Delay:
2407 13:41:17.642187 DQM0 = 20, DQM1 = 18
2408 13:41:17.642612 DQ Delay:
2409 13:41:17.645938 DQ0 =23, DQ1 =23, DQ2 =17, DQ3 =15
2410 13:41:17.648839 DQ4 =19, DQ5 =23, DQ6 =23, DQ7 =19
2411 13:41:17.652321 DQ8 =19, DQ9 =18, DQ10 =18, DQ11 =19
2412 13:41:17.655445 DQ12 =21, DQ13 =20, DQ14 =19, DQ15 =15
2413 13:41:17.655914
2414 13:41:17.656266
2415 13:41:17.656636 DramC Write-DBI off
2416 13:41:17.658811 ==
2417 13:41:17.662140 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2418 13:41:17.665531 fsp= 1, odt_onoff= 1, Byte mode= 0
2419 13:41:17.666044 ==
2420 13:41:17.669188 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2421 13:41:17.669651
2422 13:41:17.672248 Begin, DQ Scan Range 928~1184
2423 13:41:17.672749
2424 13:41:17.673078
2425 13:41:17.675677 TX Vref Scan disable
2426 13:41:17.679440 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2427 13:41:17.682118 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2428 13:41:17.685648 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2429 13:41:17.689301 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2430 13:41:17.692657 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2431 13:41:17.695757 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2432 13:41:17.699405 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2433 13:41:17.702469 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2434 13:41:17.705499 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2435 13:41:17.709035 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2436 13:41:17.715376 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2437 13:41:17.719184 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2438 13:41:17.722516 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2439 13:41:17.725726 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2440 13:41:17.728844 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2441 13:41:17.732561 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2442 13:41:17.736207 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2443 13:41:17.739020 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2444 13:41:17.742781 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2445 13:41:17.746151 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2446 13:41:17.749127 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2447 13:41:17.752638 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2448 13:41:17.756247 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2449 13:41:17.759656 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2450 13:41:17.762119 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2451 13:41:17.765940 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2452 13:41:17.768964 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2453 13:41:17.776210 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2454 13:41:17.778868 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2455 13:41:17.782491 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2456 13:41:17.785547 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2457 13:41:17.789374 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2458 13:41:17.792818 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2459 13:41:17.795580 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2460 13:41:17.799493 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2461 13:41:17.802369 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2462 13:41:17.805708 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2463 13:41:17.809044 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2464 13:41:17.812532 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2465 13:41:17.815687 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
2466 13:41:17.819329 968 |3 6 8|[0] xxxxxxxx ooxxxxxo [MSB]
2467 13:41:17.822541 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
2468 13:41:17.825853 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
2469 13:41:17.829156 971 |3 6 11|[0] xxxoxxxx oooooooo [MSB]
2470 13:41:17.832702 972 |3 6 12|[0] xxxoxxxx oooooooo [MSB]
2471 13:41:17.836101 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
2472 13:41:17.839158 974 |3 6 14|[0] xxooxxxx oooooooo [MSB]
2473 13:41:17.842442 975 |3 6 15|[0] xxoooxxo oooooooo [MSB]
2474 13:41:17.845998 976 |3 6 16|[0] xoooooxo oooooooo [MSB]
2475 13:41:17.854672 991 |3 6 31|[0] oooooooo ooooooox [MSB]
2476 13:41:17.858524 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2477 13:41:17.861701 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2478 13:41:17.864803 994 |3 6 34|[0] ooxxoooo xxxxxxxx [MSB]
2479 13:41:17.868304 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]
2480 13:41:17.871384 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
2481 13:41:17.874658 997 |3 6 37|[0] ooxxxoox xxxxxxxx [MSB]
2482 13:41:17.878134 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
2483 13:41:17.881437 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2484 13:41:17.884997 Byte0, DQ PI dly=984, DQM PI dly= 984
2485 13:41:17.888066 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
2486 13:41:17.888512
2487 13:41:17.894540 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
2488 13:41:17.895040
2489 13:41:17.898164 Byte1, DQ PI dly=979, DQM PI dly= 979
2490 13:41:17.901353 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2491 13:41:17.901874
2492 13:41:17.904724 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2493 13:41:17.905160
2494 13:41:17.907836 ==
2495 13:41:17.911789 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2496 13:41:17.914621 fsp= 1, odt_onoff= 1, Byte mode= 0
2497 13:41:17.915059 ==
2498 13:41:17.917915 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2499 13:41:17.918344
2500 13:41:17.921118 Begin, DQ Scan Range 955~1019
2501 13:41:17.925170 Write Rank0 MR14 =0x0
2502 13:41:17.933199
2503 13:41:17.933738 CH=1, VrefRange= 0, VrefLevel = 0
2504 13:41:17.938974 TX Bit0 (979~997) 19 988, Bit8 (970~988) 19 979,
2505 13:41:17.942209 TX Bit1 (977~994) 18 985, Bit9 (970~987) 18 978,
2506 13:41:17.948947 TX Bit2 (976~990) 15 983, Bit10 (971~988) 18 979,
2507 13:41:17.952702 TX Bit3 (975~989) 15 982, Bit11 (971~989) 19 980,
2508 13:41:17.955559 TX Bit4 (977~992) 16 984, Bit12 (972~991) 20 981,
2509 13:41:17.962667 TX Bit5 (978~997) 20 987, Bit13 (973~990) 18 981,
2510 13:41:17.965571 TX Bit6 (978~997) 20 987, Bit14 (971~988) 18 979,
2511 13:41:17.968794 TX Bit7 (977~991) 15 984, Bit15 (969~985) 17 977,
2512 13:41:17.969420
2513 13:41:17.972223 Write Rank0 MR14 =0x2
2514 13:41:17.981031
2515 13:41:17.981566 CH=1, VrefRange= 0, VrefLevel = 2
2516 13:41:17.987192 TX Bit0 (978~997) 20 987, Bit8 (969~989) 21 979,
2517 13:41:17.990597 TX Bit1 (977~995) 19 986, Bit9 (970~988) 19 979,
2518 13:41:17.997431 TX Bit2 (976~990) 15 983, Bit10 (971~988) 18 979,
2519 13:41:18.000925 TX Bit3 (974~990) 17 982, Bit11 (971~990) 20 980,
2520 13:41:18.004080 TX Bit4 (976~992) 17 984, Bit12 (971~991) 21 981,
2521 13:41:18.011065 TX Bit5 (978~997) 20 987, Bit13 (973~990) 18 981,
2522 13:41:18.014510 TX Bit6 (978~997) 20 987, Bit14 (971~989) 19 980,
2523 13:41:18.017665 TX Bit7 (977~991) 15 984, Bit15 (968~986) 19 977,
2524 13:41:18.018101
2525 13:41:18.021034 Write Rank0 MR14 =0x4
2526 13:41:18.029545
2527 13:41:18.030078 CH=1, VrefRange= 0, VrefLevel = 4
2528 13:41:18.035929 TX Bit0 (978~997) 20 987, Bit8 (969~990) 22 979,
2529 13:41:18.039250 TX Bit1 (977~996) 20 986, Bit9 (969~989) 21 979,
2530 13:41:18.045997 TX Bit2 (976~991) 16 983, Bit10 (970~989) 20 979,
2531 13:41:18.049169 TX Bit3 (974~990) 17 982, Bit11 (971~991) 21 981,
2532 13:41:18.052779 TX Bit4 (976~993) 18 984, Bit12 (971~992) 22 981,
2533 13:41:18.059378 TX Bit5 (978~997) 20 987, Bit13 (972~991) 20 981,
2534 13:41:18.062862 TX Bit6 (977~997) 21 987, Bit14 (971~990) 20 980,
2535 13:41:18.065783 TX Bit7 (977~992) 16 984, Bit15 (968~987) 20 977,
2536 13:41:18.066432
2537 13:41:18.069220 Write Rank0 MR14 =0x6
2538 13:41:18.077839
2539 13:41:18.078332 CH=1, VrefRange= 0, VrefLevel = 6
2540 13:41:18.085102 TX Bit0 (978~997) 20 987, Bit8 (969~990) 22 979,
2541 13:41:18.088082 TX Bit1 (977~996) 20 986, Bit9 (969~989) 21 979,
2542 13:41:18.091592 TX Bit2 (975~991) 17 983, Bit10 (970~990) 21 980,
2543 13:41:18.098155 TX Bit3 (973~990) 18 981, Bit11 (971~991) 21 981,
2544 13:41:18.101396 TX Bit4 (976~994) 19 985, Bit12 (971~992) 22 981,
2545 13:41:18.107844 TX Bit5 (977~997) 21 987, Bit13 (971~991) 21 981,
2546 13:41:18.111249 TX Bit6 (977~997) 21 987, Bit14 (971~990) 20 980,
2547 13:41:18.114626 TX Bit7 (977~992) 16 984, Bit15 (968~987) 20 977,
2548 13:41:18.115345
2549 13:41:18.118186 Write Rank0 MR14 =0x8
2550 13:41:18.126821
2551 13:41:18.127333 CH=1, VrefRange= 0, VrefLevel = 8
2552 13:41:18.133521 TX Bit0 (977~998) 22 987, Bit8 (969~991) 23 980,
2553 13:41:18.136513 TX Bit1 (977~997) 21 987, Bit9 (969~990) 22 979,
2554 13:41:18.143284 TX Bit2 (975~991) 17 983, Bit10 (970~990) 21 980,
2555 13:41:18.146872 TX Bit3 (973~991) 19 982, Bit11 (970~991) 22 980,
2556 13:41:18.149932 TX Bit4 (976~994) 19 985, Bit12 (971~992) 22 981,
2557 13:41:18.156821 TX Bit5 (977~998) 22 987, Bit13 (971~991) 21 981,
2558 13:41:18.160340 TX Bit6 (977~998) 22 987, Bit14 (970~991) 22 980,
2559 13:41:18.163252 TX Bit7 (976~993) 18 984, Bit15 (968~987) 20 977,
2560 13:41:18.163761
2561 13:41:18.167196 Write Rank0 MR14 =0xa
2562 13:41:18.175940
2563 13:41:18.179083 CH=1, VrefRange= 0, VrefLevel = 10
2564 13:41:18.182052 TX Bit0 (977~998) 22 987, Bit8 (969~991) 23 980,
2565 13:41:18.185065 TX Bit1 (976~997) 22 986, Bit9 (969~990) 22 979,
2566 13:41:18.192610 TX Bit2 (975~992) 18 983, Bit10 (969~991) 23 980,
2567 13:41:18.195109 TX Bit3 (973~991) 19 982, Bit11 (970~991) 22 980,
2568 13:41:18.198710 TX Bit4 (976~994) 19 985, Bit12 (970~992) 23 981,
2569 13:41:18.205493 TX Bit5 (977~998) 22 987, Bit13 (971~991) 21 981,
2570 13:41:18.208974 TX Bit6 (977~998) 22 987, Bit14 (970~991) 22 980,
2571 13:41:18.212481 TX Bit7 (976~993) 18 984, Bit15 (968~989) 22 978,
2572 13:41:18.212989
2573 13:41:18.215823 Write Rank0 MR14 =0xc
2574 13:41:18.224518
2575 13:41:18.225014 CH=1, VrefRange= 0, VrefLevel = 12
2576 13:41:18.230842 TX Bit0 (977~998) 22 987, Bit8 (968~991) 24 979,
2577 13:41:18.234075 TX Bit1 (976~997) 22 986, Bit9 (969~990) 22 979,
2578 13:41:18.241216 TX Bit2 (975~992) 18 983, Bit10 (970~991) 22 980,
2579 13:41:18.244454 TX Bit3 (972~991) 20 981, Bit11 (970~992) 23 981,
2580 13:41:18.248583 TX Bit4 (975~995) 21 985, Bit12 (970~992) 23 981,
2581 13:41:18.255232 TX Bit5 (977~998) 22 987, Bit13 (970~991) 22 980,
2582 13:41:18.257614 TX Bit6 (977~998) 22 987, Bit14 (970~991) 22 980,
2583 13:41:18.261169 TX Bit7 (976~994) 19 985, Bit15 (967~988) 22 977,
2584 13:41:18.261710
2585 13:41:18.264443 Write Rank0 MR14 =0xe
2586 13:41:18.273417
2587 13:41:18.273933 CH=1, VrefRange= 0, VrefLevel = 14
2588 13:41:18.280086 TX Bit0 (977~998) 22 987, Bit8 (969~991) 23 980,
2589 13:41:18.282973 TX Bit1 (976~997) 22 986, Bit9 (968~991) 24 979,
2590 13:41:18.290051 TX Bit2 (974~993) 20 983, Bit10 (969~991) 23 980,
2591 13:41:18.293381 TX Bit3 (972~992) 21 982, Bit11 (970~992) 23 981,
2592 13:41:18.296802 TX Bit4 (975~996) 22 985, Bit12 (970~993) 24 981,
2593 13:41:18.303201 TX Bit5 (977~998) 22 987, Bit13 (970~992) 23 981,
2594 13:41:18.306239 TX Bit6 (977~998) 22 987, Bit14 (970~991) 22 980,
2595 13:41:18.309501 TX Bit7 (976~995) 20 985, Bit15 (967~990) 24 978,
2596 13:41:18.309932
2597 13:41:18.313362 Write Rank0 MR14 =0x10
2598 13:41:18.322181
2599 13:41:18.325561 CH=1, VrefRange= 0, VrefLevel = 16
2600 13:41:18.328638 TX Bit0 (977~999) 23 988, Bit8 (968~991) 24 979,
2601 13:41:18.332132 TX Bit1 (976~998) 23 987, Bit9 (968~991) 24 979,
2602 13:41:18.338728 TX Bit2 (974~993) 20 983, Bit10 (970~992) 23 981,
2603 13:41:18.342210 TX Bit3 (971~993) 23 982, Bit11 (970~992) 23 981,
2604 13:41:18.345903 TX Bit4 (975~997) 23 986, Bit12 (970~993) 24 981,
2605 13:41:18.352237 TX Bit5 (976~998) 23 987, Bit13 (970~992) 23 981,
2606 13:41:18.355249 TX Bit6 (977~998) 22 987, Bit14 (970~992) 23 981,
2607 13:41:18.358869 TX Bit7 (976~996) 21 986, Bit15 (967~990) 24 978,
2608 13:41:18.359311
2609 13:41:18.362643 Write Rank0 MR14 =0x12
2610 13:41:18.371170
2611 13:41:18.374668 CH=1, VrefRange= 0, VrefLevel = 18
2612 13:41:18.378190 TX Bit0 (977~999) 23 988, Bit8 (968~991) 24 979,
2613 13:41:18.381432 TX Bit1 (976~998) 23 987, Bit9 (968~991) 24 979,
2614 13:41:18.388024 TX Bit2 (974~994) 21 984, Bit10 (969~992) 24 980,
2615 13:41:18.391049 TX Bit3 (971~993) 23 982, Bit11 (969~992) 24 980,
2616 13:41:18.394524 TX Bit4 (975~997) 23 986, Bit12 (970~993) 24 981,
2617 13:41:18.401060 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2618 13:41:18.404508 TX Bit6 (976~999) 24 987, Bit14 (970~992) 23 981,
2619 13:41:18.407578 TX Bit7 (975~996) 22 985, Bit15 (967~991) 25 979,
2620 13:41:18.408189
2621 13:41:18.411015 Write Rank0 MR14 =0x14
2622 13:41:18.420463
2623 13:41:18.423159 CH=1, VrefRange= 0, VrefLevel = 20
2624 13:41:18.426825 TX Bit0 (976~999) 24 987, Bit8 (968~991) 24 979,
2625 13:41:18.430208 TX Bit1 (976~998) 23 987, Bit9 (968~991) 24 979,
2626 13:41:18.437015 TX Bit2 (973~995) 23 984, Bit10 (968~992) 25 980,
2627 13:41:18.440392 TX Bit3 (970~994) 25 982, Bit11 (969~993) 25 981,
2628 13:41:18.444007 TX Bit4 (974~997) 24 985, Bit12 (970~993) 24 981,
2629 13:41:18.450078 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2630 13:41:18.453323 TX Bit6 (976~999) 24 987, Bit14 (969~992) 24 980,
2631 13:41:18.456742 TX Bit7 (975~997) 23 986, Bit15 (966~991) 26 978,
2632 13:41:18.457289
2633 13:41:18.460233 Write Rank0 MR14 =0x16
2634 13:41:18.469043
2635 13:41:18.472378 CH=1, VrefRange= 0, VrefLevel = 22
2636 13:41:18.476327 TX Bit0 (976~999) 24 987, Bit8 (968~992) 25 980,
2637 13:41:18.479129 TX Bit1 (976~998) 23 987, Bit9 (968~991) 24 979,
2638 13:41:18.486044 TX Bit2 (973~996) 24 984, Bit10 (968~992) 25 980,
2639 13:41:18.489563 TX Bit3 (970~994) 25 982, Bit11 (969~992) 24 980,
2640 13:41:18.493022 TX Bit4 (974~997) 24 985, Bit12 (970~993) 24 981,
2641 13:41:18.499113 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2642 13:41:18.502458 TX Bit6 (976~999) 24 987, Bit14 (969~992) 24 980,
2643 13:41:18.505894 TX Bit7 (975~997) 23 986, Bit15 (966~991) 26 978,
2644 13:41:18.508846
2645 13:41:18.512764 wait MRW command Rank0 MR14 =0x18 fired (1)
2646 13:41:18.513323 Write Rank0 MR14 =0x18
2647 13:41:18.522174
2648 13:41:18.525689 CH=1, VrefRange= 0, VrefLevel = 24
2649 13:41:18.529069 TX Bit0 (976~1000) 25 988, Bit8 (967~991) 25 979,
2650 13:41:18.532629 TX Bit1 (975~998) 24 986, Bit9 (967~991) 25 979,
2651 13:41:18.538875 TX Bit2 (973~996) 24 984, Bit10 (968~992) 25 980,
2652 13:41:18.542829 TX Bit3 (970~993) 24 981, Bit11 (969~992) 24 980,
2653 13:41:18.546194 TX Bit4 (974~997) 24 985, Bit12 (969~993) 25 981,
2654 13:41:18.552617 TX Bit5 (976~998) 23 987, Bit13 (970~992) 23 981,
2655 13:41:18.555968 TX Bit6 (976~999) 24 987, Bit14 (969~992) 24 980,
2656 13:41:18.559194 TX Bit7 (974~997) 24 985, Bit15 (966~991) 26 978,
2657 13:41:18.559664
2658 13:41:18.562510 Write Rank0 MR14 =0x1a
2659 13:41:18.571387
2660 13:41:18.574824 CH=1, VrefRange= 0, VrefLevel = 26
2661 13:41:18.577968 TX Bit0 (976~1000) 25 988, Bit8 (967~991) 25 979,
2662 13:41:18.581764 TX Bit1 (975~998) 24 986, Bit9 (967~991) 25 979,
2663 13:41:18.588271 TX Bit2 (973~996) 24 984, Bit10 (968~992) 25 980,
2664 13:41:18.591191 TX Bit3 (970~993) 24 981, Bit11 (969~992) 24 980,
2665 13:41:18.594633 TX Bit4 (974~997) 24 985, Bit12 (969~993) 25 981,
2666 13:41:18.601344 TX Bit5 (976~998) 23 987, Bit13 (970~992) 23 981,
2667 13:41:18.604661 TX Bit6 (976~999) 24 987, Bit14 (969~992) 24 980,
2668 13:41:18.610811 TX Bit7 (974~997) 24 985, Bit15 (966~991) 26 978,
2669 13:41:18.611307
2670 13:41:18.611641 Write Rank0 MR14 =0x1c
2671 13:41:18.621117
2672 13:41:18.624008 CH=1, VrefRange= 0, VrefLevel = 28
2673 13:41:18.627729 TX Bit0 (976~1000) 25 988, Bit8 (967~991) 25 979,
2674 13:41:18.631005 TX Bit1 (975~998) 24 986, Bit9 (967~991) 25 979,
2675 13:41:18.638129 TX Bit2 (973~996) 24 984, Bit10 (968~992) 25 980,
2676 13:41:18.640833 TX Bit3 (970~993) 24 981, Bit11 (969~992) 24 980,
2677 13:41:18.644305 TX Bit4 (974~997) 24 985, Bit12 (969~993) 25 981,
2678 13:41:18.651114 TX Bit5 (976~998) 23 987, Bit13 (970~992) 23 981,
2679 13:41:18.655142 TX Bit6 (976~999) 24 987, Bit14 (969~992) 24 980,
2680 13:41:18.657682 TX Bit7 (974~997) 24 985, Bit15 (966~991) 26 978,
2681 13:41:18.658198
2682 13:41:18.660782 Write Rank0 MR14 =0x1e
2683 13:41:18.669986
2684 13:41:18.673706 CH=1, VrefRange= 0, VrefLevel = 30
2685 13:41:18.676983 TX Bit0 (976~1000) 25 988, Bit8 (967~991) 25 979,
2686 13:41:18.680076 TX Bit1 (975~998) 24 986, Bit9 (967~991) 25 979,
2687 13:41:18.686677 TX Bit2 (973~996) 24 984, Bit10 (968~992) 25 980,
2688 13:41:18.690167 TX Bit3 (970~993) 24 981, Bit11 (969~992) 24 980,
2689 13:41:18.693889 TX Bit4 (974~997) 24 985, Bit12 (969~993) 25 981,
2690 13:41:18.700405 TX Bit5 (976~998) 23 987, Bit13 (970~992) 23 981,
2691 13:41:18.703546 TX Bit6 (976~999) 24 987, Bit14 (969~992) 24 980,
2692 13:41:18.707107 TX Bit7 (974~997) 24 985, Bit15 (966~991) 26 978,
2693 13:41:18.707622
2694 13:41:18.710027 Write Rank0 MR14 =0x20
2695 13:41:18.719146
2696 13:41:18.722714 CH=1, VrefRange= 0, VrefLevel = 32
2697 13:41:18.725676 TX Bit0 (976~1000) 25 988, Bit8 (967~991) 25 979,
2698 13:41:18.729280 TX Bit1 (975~998) 24 986, Bit9 (967~991) 25 979,
2699 13:41:18.735818 TX Bit2 (973~996) 24 984, Bit10 (968~992) 25 980,
2700 13:41:18.739187 TX Bit3 (970~993) 24 981, Bit11 (969~992) 24 980,
2701 13:41:18.742719 TX Bit4 (974~997) 24 985, Bit12 (969~993) 25 981,
2702 13:41:18.749108 TX Bit5 (976~998) 23 987, Bit13 (970~992) 23 981,
2703 13:41:18.752978 TX Bit6 (976~999) 24 987, Bit14 (969~992) 24 980,
2704 13:41:18.755859 TX Bit7 (974~997) 24 985, Bit15 (966~991) 26 978,
2705 13:41:18.756367
2706 13:41:18.759590
2707 13:41:18.760012 TX Vref found, early break! 363< 369
2708 13:41:18.766208 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2709 13:41:18.769344 u1DelayCellOfst[0]=8 cells (7 PI)
2710 13:41:18.772668 u1DelayCellOfst[1]=6 cells (5 PI)
2711 13:41:18.776157 u1DelayCellOfst[2]=3 cells (3 PI)
2712 13:41:18.779333 u1DelayCellOfst[3]=0 cells (0 PI)
2713 13:41:18.779761 u1DelayCellOfst[4]=5 cells (4 PI)
2714 13:41:18.782764 u1DelayCellOfst[5]=7 cells (6 PI)
2715 13:41:18.785949 u1DelayCellOfst[6]=7 cells (6 PI)
2716 13:41:18.789599 u1DelayCellOfst[7]=5 cells (4 PI)
2717 13:41:18.793102 Byte0, DQ PI dly=981, DQM PI dly= 984
2718 13:41:18.795995 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2719 13:41:18.799623
2720 13:41:18.802778 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2721 13:41:18.803212
2722 13:41:18.806459 u1DelayCellOfst[8]=1 cells (1 PI)
2723 13:41:18.809424 u1DelayCellOfst[9]=1 cells (1 PI)
2724 13:41:18.812806 u1DelayCellOfst[10]=2 cells (2 PI)
2725 13:41:18.813367 u1DelayCellOfst[11]=2 cells (2 PI)
2726 13:41:18.815934 u1DelayCellOfst[12]=3 cells (3 PI)
2727 13:41:18.819758 u1DelayCellOfst[13]=3 cells (3 PI)
2728 13:41:18.822855 u1DelayCellOfst[14]=2 cells (2 PI)
2729 13:41:18.826155 u1DelayCellOfst[15]=0 cells (0 PI)
2730 13:41:18.829482 Byte1, DQ PI dly=978, DQM PI dly= 979
2731 13:41:18.832753 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2732 13:41:18.836018
2733 13:41:18.839454 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2734 13:41:18.839967
2735 13:41:18.840301 Write Rank0 MR14 =0x18
2736 13:41:18.843231
2737 13:41:18.843737 Final TX Range 0 Vref 24
2738 13:41:18.844075
2739 13:41:18.849630 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2740 13:41:18.850143
2741 13:41:18.856234 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2742 13:41:18.862843 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2743 13:41:18.869774 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2744 13:41:18.872877 Write Rank0 MR3 =0xb0
2745 13:41:18.873338 DramC Write-DBI on
2746 13:41:18.876581 ==
2747 13:41:18.879559 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2748 13:41:18.882890 fsp= 1, odt_onoff= 1, Byte mode= 0
2749 13:41:18.883404 ==
2750 13:41:18.886125 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2751 13:41:18.886552
2752 13:41:18.889060 Begin, DQ Scan Range 699~763
2753 13:41:18.889351
2754 13:41:18.889502
2755 13:41:18.892478 TX Vref Scan disable
2756 13:41:18.895663 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2757 13:41:18.899505 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2758 13:41:18.902655 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2759 13:41:18.906312 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2760 13:41:18.909387 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2761 13:41:18.912727 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2762 13:41:18.915996 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2763 13:41:18.919360 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2764 13:41:18.922951 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2765 13:41:18.926133 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2766 13:41:18.929124 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2767 13:41:18.932746 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2768 13:41:18.936147 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2769 13:41:18.942633 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2770 13:41:18.945991 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2771 13:41:18.949711 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2772 13:41:18.952984 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2773 13:41:18.956414 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2774 13:41:18.963570 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2775 13:41:18.967044 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2776 13:41:18.970198 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2777 13:41:18.973686 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2778 13:41:18.976909 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2779 13:41:18.980720 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2780 13:41:18.983127 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2781 13:41:18.986990 Byte0, DQ PI dly=729, DQM PI dly= 729
2782 13:41:18.990330 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
2783 13:41:18.990759
2784 13:41:18.996462 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
2785 13:41:18.996895
2786 13:41:19.000091 Byte1, DQ PI dly=722, DQM PI dly= 722
2787 13:41:19.003286 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2788 13:41:19.003722
2789 13:41:19.007087 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2790 13:41:19.007604
2791 13:41:19.014036 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2792 13:41:19.020411 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2793 13:41:19.027410 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2794 13:41:19.029936 Write Rank0 MR3 =0x30
2795 13:41:19.033568 DramC Write-DBI off
2796 13:41:19.034072
2797 13:41:19.034409 [DATLAT]
2798 13:41:19.037210 Freq=1600, CH1 RK0, use_rxtx_scan=0
2799 13:41:19.037779
2800 13:41:19.038118 DATLAT Default: 0xf
2801 13:41:19.040133 7, 0xFFFF, sum=0
2802 13:41:19.040565 8, 0xFFFF, sum=0
2803 13:41:19.043280 9, 0xFFFF, sum=0
2804 13:41:19.043715 10, 0xFFFF, sum=0
2805 13:41:19.046753 11, 0xFFFF, sum=0
2806 13:41:19.047343 12, 0xFFFF, sum=0
2807 13:41:19.050103 13, 0xFFFF, sum=0
2808 13:41:19.050619 14, 0x0, sum=1
2809 13:41:19.053919 15, 0x0, sum=2
2810 13:41:19.054439 16, 0x0, sum=3
2811 13:41:19.054781 17, 0x0, sum=4
2812 13:41:19.060415 pattern=2 first_step=14 total pass=5 best_step=16
2813 13:41:19.060927 ==
2814 13:41:19.063434 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2815 13:41:19.067040 fsp= 1, odt_onoff= 1, Byte mode= 0
2816 13:41:19.067468 ==
2817 13:41:19.074116 Start DQ dly to find pass range UseTestEngine =1
2818 13:41:19.076893 x-axis: bit #, y-axis: DQ dly (-127~63)
2819 13:41:19.077354 RX Vref Scan = 1
2820 13:41:19.199781
2821 13:41:19.200504 RX Vref found, early break!
2822 13:41:19.200856
2823 13:41:19.206491 Final RX Vref 13, apply to both rank0 and 1
2824 13:41:19.207009 ==
2825 13:41:19.209872 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2826 13:41:19.213085 fsp= 1, odt_onoff= 1, Byte mode= 0
2827 13:41:19.213551 ==
2828 13:41:19.213883 DQS Delay:
2829 13:41:19.216952 DQS0 = 0, DQS1 = 0
2830 13:41:19.217431 DQM Delay:
2831 13:41:19.220017 DQM0 = 20, DQM1 = 18
2832 13:41:19.220538 DQ Delay:
2833 13:41:19.223615 DQ0 =23, DQ1 =23, DQ2 =17, DQ3 =15
2834 13:41:19.226372 DQ4 =19, DQ5 =24, DQ6 =24, DQ7 =19
2835 13:41:19.230087 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
2836 13:41:19.233632 DQ12 =21, DQ13 =19, DQ14 =20, DQ15 =15
2837 13:41:19.234090
2838 13:41:19.234423
2839 13:41:19.234790
2840 13:41:19.236637 [DramC_TX_OE_Calibration] TA2
2841 13:41:19.239798 Original DQ_B0 (3 6) =30, OEN = 27
2842 13:41:19.243316 Original DQ_B1 (3 6) =30, OEN = 27
2843 13:41:19.246335 23, 0x0, End_B0=23 End_B1=23
2844 13:41:19.246742 24, 0x0, End_B0=24 End_B1=24
2845 13:41:19.250130 25, 0x0, End_B0=25 End_B1=25
2846 13:41:19.253435 26, 0x0, End_B0=26 End_B1=26
2847 13:41:19.256832 27, 0x0, End_B0=27 End_B1=27
2848 13:41:19.257267 28, 0x0, End_B0=28 End_B1=28
2849 13:41:19.259796 29, 0x0, End_B0=29 End_B1=29
2850 13:41:19.263486 30, 0x0, End_B0=30 End_B1=30
2851 13:41:19.266726 31, 0xFFFF, End_B0=30 End_B1=30
2852 13:41:19.269958 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2853 13:41:19.276900 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2854 13:41:19.277439
2855 13:41:19.277757
2856 13:41:19.279936 Write Rank0 MR23 =0x3f
2857 13:41:19.280411 [DQSOSC]
2858 13:41:19.286571 [DQSOSCAuto] RK0, (LSB)MR18= 0xa3, (MSB)MR19= 0x3, tDQSOscB0 = 338 ps tDQSOscB1 = 0 ps
2859 13:41:19.293191 CH1_RK0: MR19=0x3, MR18=0xA3, DQSOSC=338, MR23=63, INC=21, DEC=32
2860 13:41:19.297260 Write Rank0 MR23 =0x3f
2861 13:41:19.297702 [DQSOSC]
2862 13:41:19.303467 [DQSOSCAuto] RK0, (LSB)MR18= 0x9f, (MSB)MR19= 0x3, tDQSOscB0 = 339 ps tDQSOscB1 = 0 ps
2863 13:41:19.306756 CH1 RK0: MR19=3, MR18=9F
2864 13:41:19.309990 [RankSwap] Rank num 2, (Multi 1), Rank 1
2865 13:41:19.313514 Write Rank0 MR2 =0xad
2866 13:41:19.313941 [Write Leveling]
2867 13:41:19.316765 delay byte0 byte1 byte2 byte3
2868 13:41:19.317189
2869 13:41:19.317559 10 0 0
2870 13:41:19.320320 11 0 0
2871 13:41:19.320834 12 0 0
2872 13:41:19.323393 13 0 0
2873 13:41:19.323845 14 0 0
2874 13:41:19.324187 15 0 0
2875 13:41:19.326697 16 0 0
2876 13:41:19.327147 17 0 0
2877 13:41:19.330059 18 0 0
2878 13:41:19.330505 19 0 0
2879 13:41:19.333515 20 0 0
2880 13:41:19.333963 21 0 0
2881 13:41:19.334410 22 0 0
2882 13:41:19.336591 23 0 0
2883 13:41:19.337049 24 0 0
2884 13:41:19.339910 25 0 0
2885 13:41:19.340352 26 0 0
2886 13:41:19.340796 27 0 0
2887 13:41:19.343923 28 0 0
2888 13:41:19.344450 29 0 0
2889 13:41:19.346831 30 0 0
2890 13:41:19.347361 31 0 ff
2891 13:41:19.349976 32 0 ff
2892 13:41:19.350440 33 0 ff
2893 13:41:19.350883 34 0 ff
2894 13:41:19.353321 35 ff ff
2895 13:41:19.353877 36 0 ff
2896 13:41:19.356567 37 ff ff
2897 13:41:19.356998 38 ff ff
2898 13:41:19.360398 39 ff ff
2899 13:41:19.360927 40 ff ff
2900 13:41:19.363465 41 ff ff
2901 13:41:19.363992 42 ff ff
2902 13:41:19.367111 43 ff ff
2903 13:41:19.369944 pass bytecount = 0xff (0xff: all bytes pass)
2904 13:41:19.370371
2905 13:41:19.370706 DQS0 dly: 37
2906 13:41:19.373178 DQS1 dly: 31
2907 13:41:19.373636 Write Rank0 MR2 =0x2d
2908 13:41:19.376783 [RankSwap] Rank num 2, (Multi 1), Rank 0
2909 13:41:19.380432 Write Rank1 MR1 =0xd6
2910 13:41:19.380940 [Gating]
2911 13:41:19.381315 ==
2912 13:41:19.386782 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2913 13:41:19.389699 fsp= 1, odt_onoff= 1, Byte mode= 0
2914 13:41:19.390132 ==
2915 13:41:19.393432 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2916 13:41:19.396844 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2917 13:41:19.403584 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2918 13:41:19.406888 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2919 13:41:19.410288 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2920 13:41:19.416476 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2921 13:41:19.420076 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2922 13:41:19.423522 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2923 13:41:19.427001 3 2 0 |201 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2924 13:41:19.433182 3 2 4 |3d3d 201 |(11 11)(11 11) |(1 1)(0 0)| 0
2925 13:41:19.436806 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2926 13:41:19.440352 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2927 13:41:19.446637 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2928 13:41:19.450290 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2929 13:41:19.453588 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2930 13:41:19.460333 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2931 13:41:19.463411 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2932 13:41:19.466950 3 3 4 |1918 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2933 13:41:19.473881 3 3 8 |504 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2934 13:41:19.476652 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2935 13:41:19.480185 [Byte 0] Lead/lag Transition tap number (1)
2936 13:41:19.483386 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2937 13:41:19.490016 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2938 13:41:19.493218 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2939 13:41:19.496746 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2940 13:41:19.503403 3 4 0 |505 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2941 13:41:19.506694 3 4 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2942 13:41:19.509907 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2943 13:41:19.513302 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2944 13:41:19.519925 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2945 13:41:19.523678 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2946 13:41:19.526518 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2947 13:41:19.533445 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2948 13:41:19.536906 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2949 13:41:19.540409 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2950 13:41:19.546839 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2951 13:41:19.550186 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2952 13:41:19.553588 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2953 13:41:19.557085 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2954 13:41:19.563379 [Byte 0] Lead/lag falling Transition (3, 5, 20)
2955 13:41:19.566869 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2956 13:41:19.570178 [Byte 0] Lead/lag Transition tap number (2)
2957 13:41:19.573880 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2958 13:41:19.580533 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2959 13:41:19.583976 3 6 0 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2960 13:41:19.586591 [Byte 1] Lead/lag Transition tap number (3)
2961 13:41:19.590288 3 6 4 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
2962 13:41:19.593418 [Byte 0]First pass (3, 6, 4)
2963 13:41:19.596846 3 6 8 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
2964 13:41:19.603698 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2965 13:41:19.604156 [Byte 1]First pass (3, 6, 12)
2966 13:41:19.610360 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2967 13:41:19.613473 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2968 13:41:19.616900 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2969 13:41:19.620327 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2970 13:41:19.626672 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2971 13:41:19.630203 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2972 13:41:19.633309 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2973 13:41:19.637208 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2974 13:41:19.640679 All bytes gating window > 1UI, Early break!
2975 13:41:19.641210
2976 13:41:19.643623 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)
2977 13:41:19.644157
2978 13:41:19.650539 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
2979 13:41:19.651045
2980 13:41:19.651377
2981 13:41:19.651682
2982 13:41:19.653687 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
2983 13:41:19.654112
2984 13:41:19.656962 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
2985 13:41:19.657429
2986 13:41:19.657762
2987 13:41:19.660972 Write Rank1 MR1 =0x56
2988 13:41:19.661533
2989 13:41:19.664073 best RODT dly(2T, 0.5T) = (2, 2)
2990 13:41:19.664495
2991 13:41:19.667186 best RODT dly(2T, 0.5T) = (2, 2)
2992 13:41:19.667610 ==
2993 13:41:19.671220 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2994 13:41:19.673917 fsp= 1, odt_onoff= 1, Byte mode= 0
2995 13:41:19.674422 ==
2996 13:41:19.677592 Start DQ dly to find pass range UseTestEngine =0
2997 13:41:19.680732 x-axis: bit #, y-axis: DQ dly (-127~63)
2998 13:41:19.684260 RX Vref Scan = 0
2999 13:41:19.687480 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3000 13:41:19.690893 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3001 13:41:19.694211 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3002 13:41:19.694717 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3003 13:41:19.697792 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3004 13:41:19.700671 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3005 13:41:19.703969 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3006 13:41:19.707785 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3007 13:41:19.710921 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3008 13:41:19.714157 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3009 13:41:19.717440 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3010 13:41:19.717972 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3011 13:41:19.720683 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3012 13:41:19.724054 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3013 13:41:19.727641 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3014 13:41:19.730650 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3015 13:41:19.734080 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3016 13:41:19.737579 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3017 13:41:19.741143 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3018 13:41:19.741737 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3019 13:41:19.744008 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3020 13:41:19.747410 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3021 13:41:19.750596 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3022 13:41:19.754269 -3, [0] xxxoxxxx xxxxxxxx [MSB]
3023 13:41:19.757358 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3024 13:41:19.761080 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3025 13:41:19.761639 0, [0] xxooxxxx oxoxxxxo [MSB]
3026 13:41:19.764414 1, [0] xxooxxxo oooxxxxo [MSB]
3027 13:41:19.767858 2, [0] xxooxxxo oooxxxxo [MSB]
3028 13:41:19.771037 3, [0] xxoooxxo ooooxxoo [MSB]
3029 13:41:19.774235 4, [0] xxoooxxo ooooxooo [MSB]
3030 13:41:19.774670 5, [0] xxoooxxo oooooooo [MSB]
3031 13:41:19.777782 6, [0] xooooxoo oooooooo [MSB]
3032 13:41:19.781182 33, [0] oooxoooo ooooooox [MSB]
3033 13:41:19.784291 34, [0] oooxoooo ooooooox [MSB]
3034 13:41:19.787658 35, [0] ooxxoooo ooooooox [MSB]
3035 13:41:19.791148 36, [0] ooxxoooo oxooooox [MSB]
3036 13:41:19.794277 37, [0] ooxxoooo oxxxooox [MSB]
3037 13:41:19.794785 38, [0] ooxxoooo xxxxooox [MSB]
3038 13:41:19.798052 39, [0] ooxxxoox xxxxooxx [MSB]
3039 13:41:19.801793 40, [0] ooxxxoox xxxxoxxx [MSB]
3040 13:41:19.804195 41, [0] ooxxxoox xxxxxxxx [MSB]
3041 13:41:19.807424 42, [0] ooxxxxox xxxxxxxx [MSB]
3042 13:41:19.810531 43, [0] oxxxxxxx xxxxxxxx [MSB]
3043 13:41:19.813984 44, [0] xxxxxxxx xxxxxxxx [MSB]
3044 13:41:19.817541 iDelay=44, Bit 0, Center 25 (7 ~ 43) 37
3045 13:41:19.821286 iDelay=44, Bit 1, Center 24 (6 ~ 42) 37
3046 13:41:19.824450 iDelay=44, Bit 2, Center 17 (0 ~ 34) 35
3047 13:41:19.827525 iDelay=44, Bit 3, Center 14 (-3 ~ 32) 36
3048 13:41:19.830774 iDelay=44, Bit 4, Center 20 (3 ~ 38) 36
3049 13:41:19.834038 iDelay=44, Bit 5, Center 24 (7 ~ 41) 35
3050 13:41:19.837330 iDelay=44, Bit 6, Center 24 (6 ~ 42) 37
3051 13:41:19.840844 iDelay=44, Bit 7, Center 19 (1 ~ 38) 38
3052 13:41:19.844259 iDelay=44, Bit 8, Center 18 (0 ~ 37) 38
3053 13:41:19.847608 iDelay=44, Bit 9, Center 18 (1 ~ 35) 35
3054 13:41:19.851055 iDelay=44, Bit 10, Center 18 (0 ~ 36) 37
3055 13:41:19.854635 iDelay=44, Bit 11, Center 19 (3 ~ 36) 34
3056 13:41:19.857957 iDelay=44, Bit 12, Center 22 (5 ~ 40) 36
3057 13:41:19.864633 iDelay=44, Bit 13, Center 21 (4 ~ 39) 36
3058 13:41:19.867512 iDelay=44, Bit 14, Center 20 (3 ~ 38) 36
3059 13:41:19.870512 iDelay=44, Bit 15, Center 15 (-2 ~ 32) 35
3060 13:41:19.870940 ==
3061 13:41:19.874153 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3062 13:41:19.877324 fsp= 1, odt_onoff= 1, Byte mode= 0
3063 13:41:19.877833 ==
3064 13:41:19.880856 DQS Delay:
3065 13:41:19.881395 DQS0 = 0, DQS1 = 0
3066 13:41:19.884237 DQM Delay:
3067 13:41:19.884737 DQM0 = 20, DQM1 = 18
3068 13:41:19.885167 DQ Delay:
3069 13:41:19.887664 DQ0 =25, DQ1 =24, DQ2 =17, DQ3 =14
3070 13:41:19.891060 DQ4 =20, DQ5 =24, DQ6 =24, DQ7 =19
3071 13:41:19.894082 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
3072 13:41:19.897718 DQ12 =22, DQ13 =21, DQ14 =20, DQ15 =15
3073 13:41:19.898246
3074 13:41:19.898689
3075 13:41:19.901172 DramC Write-DBI off
3076 13:41:19.901743 ==
3077 13:41:19.904451 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3078 13:41:19.908121 fsp= 1, odt_onoff= 1, Byte mode= 0
3079 13:41:19.908650 ==
3080 13:41:19.914387 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3081 13:41:19.914912
3082 13:41:19.917331 Begin, DQ Scan Range 927~1183
3083 13:41:19.917760
3084 13:41:19.918091
3085 13:41:19.918398 TX Vref Scan disable
3086 13:41:19.920916 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3087 13:41:19.924689 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3088 13:41:19.928006 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3089 13:41:19.934650 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3090 13:41:19.937639 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3091 13:41:19.941437 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3092 13:41:19.944305 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3093 13:41:19.947505 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3094 13:41:19.951088 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3095 13:41:19.954737 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3096 13:41:19.957881 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3097 13:41:19.961282 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3098 13:41:19.964403 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3099 13:41:19.967986 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3100 13:41:19.970970 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3101 13:41:19.974328 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3102 13:41:19.977761 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3103 13:41:19.981282 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3104 13:41:19.984658 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3105 13:41:19.987592 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3106 13:41:19.994195 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3107 13:41:19.998027 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3108 13:41:20.001582 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3109 13:41:20.004169 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3110 13:41:20.007373 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3111 13:41:20.011232 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3112 13:41:20.014156 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3113 13:41:20.017633 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3114 13:41:20.020941 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3115 13:41:20.024665 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3116 13:41:20.027583 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3117 13:41:20.030916 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3118 13:41:20.033974 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3119 13:41:20.037761 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3120 13:41:20.041152 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3121 13:41:20.044424 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3122 13:41:20.047826 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3123 13:41:20.050779 964 |3 6 4|[0] xxxxxxxx xxxxxxxo [MSB]
3124 13:41:20.054217 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]
3125 13:41:20.057717 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
3126 13:41:20.061320 967 |3 6 7|[0] xxxxxxxx ooxxxxxo [MSB]
3127 13:41:20.067576 968 |3 6 8|[0] xxxxxxxx oooxxxxo [MSB]
3128 13:41:20.071320 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
3129 13:41:20.074192 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
3130 13:41:20.077624 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3131 13:41:20.081474 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3132 13:41:20.084549 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3133 13:41:20.087587 974 |3 6 14|[0] xxoooxxx oooooooo [MSB]
3134 13:41:20.091114 975 |3 6 15|[0] xxoooxxo oooooooo [MSB]
3135 13:41:20.094028 976 |3 6 16|[0] xooooooo oooooooo [MSB]
3136 13:41:20.101471 990 |3 6 30|[0] oooooooo ooooooox [MSB]
3137 13:41:20.104537 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3138 13:41:20.108380 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3139 13:41:20.111369 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3140 13:41:20.115115 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3141 13:41:20.118286 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3142 13:41:20.121359 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3143 13:41:20.124698 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
3144 13:41:20.128245 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
3145 13:41:20.131337 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3146 13:41:20.134682 Byte0, DQ PI dly=986, DQM PI dly= 986
3147 13:41:20.138057 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3148 13:41:20.138487
3149 13:41:20.144543 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3150 13:41:20.145055
3151 13:41:20.148117 Byte1, DQ PI dly=977, DQM PI dly= 977
3152 13:41:20.151319 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3153 13:41:20.151751
3154 13:41:20.154739 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3155 13:41:20.157948
3156 13:41:20.158442 ==
3157 13:41:20.161468 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3158 13:41:20.164343 fsp= 1, odt_onoff= 1, Byte mode= 0
3159 13:41:20.164775 ==
3160 13:41:20.168093 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3161 13:41:20.168615
3162 13:41:20.171402 Begin, DQ Scan Range 953~1017
3163 13:41:20.174431 Write Rank1 MR14 =0x0
3164 13:41:20.183232
3165 13:41:20.183729 CH=1, VrefRange= 0, VrefLevel = 0
3166 13:41:20.189732 TX Bit0 (978~998) 21 988, Bit8 (969~987) 19 978,
3167 13:41:20.193100 TX Bit1 (977~997) 21 987, Bit9 (969~986) 18 977,
3168 13:41:20.200066 TX Bit2 (976~992) 17 984, Bit10 (970~985) 16 977,
3169 13:41:20.202966 TX Bit3 (975~991) 17 983, Bit11 (971~989) 19 980,
3170 13:41:20.206190 TX Bit4 (976~994) 19 985, Bit12 (971~990) 20 980,
3171 13:41:20.212951 TX Bit5 (978~998) 21 988, Bit13 (970~986) 17 978,
3172 13:41:20.216263 TX Bit6 (978~998) 21 988, Bit14 (970~987) 18 978,
3173 13:41:20.219655 TX Bit7 (977~994) 18 985, Bit15 (967~985) 19 976,
3174 13:41:20.220159
3175 13:41:20.222965 Write Rank1 MR14 =0x2
3176 13:41:20.232508
3177 13:41:20.233028 CH=1, VrefRange= 0, VrefLevel = 2
3178 13:41:20.239053 TX Bit0 (978~998) 21 988, Bit8 (969~987) 19 978,
3179 13:41:20.242602 TX Bit1 (977~997) 21 987, Bit9 (969~986) 18 977,
3180 13:41:20.248885 TX Bit2 (975~992) 18 983, Bit10 (970~986) 17 978,
3181 13:41:20.252542 TX Bit3 (974~991) 18 982, Bit11 (970~990) 21 980,
3182 13:41:20.255523 TX Bit4 (976~995) 20 985, Bit12 (971~990) 20 980,
3183 13:41:20.262091 TX Bit5 (978~998) 21 988, Bit13 (971~987) 17 979,
3184 13:41:20.265791 TX Bit6 (977~998) 22 987, Bit14 (970~987) 18 978,
3185 13:41:20.268688 TX Bit7 (977~995) 19 986, Bit15 (966~985) 20 975,
3186 13:41:20.269158
3187 13:41:20.272231 Write Rank1 MR14 =0x4
3188 13:41:20.281283
3189 13:41:20.282086 CH=1, VrefRange= 0, VrefLevel = 4
3190 13:41:20.288064 TX Bit0 (977~998) 22 987, Bit8 (969~988) 20 978,
3191 13:41:20.291566 TX Bit1 (976~997) 22 986, Bit9 (969~987) 19 978,
3192 13:41:20.297691 TX Bit2 (975~993) 19 984, Bit10 (970~986) 17 978,
3193 13:41:20.301191 TX Bit3 (974~991) 18 982, Bit11 (970~990) 21 980,
3194 13:41:20.304704 TX Bit4 (976~995) 20 985, Bit12 (971~991) 21 981,
3195 13:41:20.311047 TX Bit5 (977~998) 22 987, Bit13 (970~988) 19 979,
3196 13:41:20.314608 TX Bit6 (977~998) 22 987, Bit14 (970~988) 19 979,
3197 13:41:20.318025 TX Bit7 (976~996) 21 986, Bit15 (965~985) 21 975,
3198 13:41:20.318456
3199 13:41:20.321100 Write Rank1 MR14 =0x6
3200 13:41:20.330135
3201 13:41:20.330579 CH=1, VrefRange= 0, VrefLevel = 6
3202 13:41:20.337104 TX Bit0 (977~999) 23 988, Bit8 (968~989) 22 978,
3203 13:41:20.340450 TX Bit1 (976~998) 23 987, Bit9 (968~987) 20 977,
3204 13:41:20.347600 TX Bit2 (974~994) 21 984, Bit10 (969~987) 19 978,
3205 13:41:20.350424 TX Bit3 (974~992) 19 983, Bit11 (970~990) 21 980,
3206 13:41:20.353900 TX Bit4 (976~996) 21 986, Bit12 (971~991) 21 981,
3207 13:41:20.360293 TX Bit5 (977~998) 22 987, Bit13 (970~989) 20 979,
3208 13:41:20.363590 TX Bit6 (977~999) 23 988, Bit14 (970~989) 20 979,
3209 13:41:20.366911 TX Bit7 (977~996) 20 986, Bit15 (965~986) 22 975,
3210 13:41:20.367339
3211 13:41:20.370515 Write Rank1 MR14 =0x8
3212 13:41:20.379398
3213 13:41:20.379779 CH=1, VrefRange= 0, VrefLevel = 8
3214 13:41:20.386355 TX Bit0 (977~999) 23 988, Bit8 (968~989) 22 978,
3215 13:41:20.389615 TX Bit1 (976~998) 23 987, Bit9 (968~988) 21 978,
3216 13:41:20.396369 TX Bit2 (974~994) 21 984, Bit10 (969~987) 19 978,
3217 13:41:20.399904 TX Bit3 (973~993) 21 983, Bit11 (970~990) 21 980,
3218 13:41:20.403282 TX Bit4 (976~996) 21 986, Bit12 (970~991) 22 980,
3219 13:41:20.409948 TX Bit5 (977~998) 22 987, Bit13 (970~989) 20 979,
3220 13:41:20.412978 TX Bit6 (977~999) 23 988, Bit14 (969~990) 22 979,
3221 13:41:20.416506 TX Bit7 (976~997) 22 986, Bit15 (965~986) 22 975,
3222 13:41:20.416892
3223 13:41:20.419723 Write Rank1 MR14 =0xa
3224 13:41:20.429169
3225 13:41:20.432582 CH=1, VrefRange= 0, VrefLevel = 10
3226 13:41:20.435930 TX Bit0 (977~999) 23 988, Bit8 (968~990) 23 979,
3227 13:41:20.439199 TX Bit1 (976~998) 23 987, Bit9 (968~989) 22 978,
3228 13:41:20.445984 TX Bit2 (974~995) 22 984, Bit10 (969~988) 20 978,
3229 13:41:20.449315 TX Bit3 (973~994) 22 983, Bit11 (970~991) 22 980,
3230 13:41:20.452342 TX Bit4 (975~997) 23 986, Bit12 (970~991) 22 980,
3231 13:41:20.458930 TX Bit5 (977~999) 23 988, Bit13 (970~990) 21 980,
3232 13:41:20.462164 TX Bit6 (977~999) 23 988, Bit14 (969~990) 22 979,
3233 13:41:20.466068 TX Bit7 (976~997) 22 986, Bit15 (964~987) 24 975,
3234 13:41:20.466579
3235 13:41:20.468877 Write Rank1 MR14 =0xc
3236 13:41:20.478970
3237 13:41:20.482194 CH=1, VrefRange= 0, VrefLevel = 12
3238 13:41:20.485330 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
3239 13:41:20.488913 TX Bit1 (976~998) 23 987, Bit9 (968~990) 23 979,
3240 13:41:20.495094 TX Bit2 (973~995) 23 984, Bit10 (969~989) 21 979,
3241 13:41:20.498614 TX Bit3 (973~994) 22 983, Bit11 (969~991) 23 980,
3242 13:41:20.502163 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3243 13:41:20.508997 TX Bit5 (977~999) 23 988, Bit13 (969~990) 22 979,
3244 13:41:20.512026 TX Bit6 (977~1000) 24 988, Bit14 (969~990) 22 979,
3245 13:41:20.515346 TX Bit7 (976~997) 22 986, Bit15 (964~988) 25 976,
3246 13:41:20.515769
3247 13:41:20.518909 Write Rank1 MR14 =0xe
3248 13:41:20.528518
3249 13:41:20.531673 CH=1, VrefRange= 0, VrefLevel = 14
3250 13:41:20.534741 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
3251 13:41:20.538191 TX Bit1 (976~998) 23 987, Bit9 (967~990) 24 978,
3252 13:41:20.544941 TX Bit2 (974~996) 23 985, Bit10 (968~990) 23 979,
3253 13:41:20.548555 TX Bit3 (972~995) 24 983, Bit11 (969~992) 24 980,
3254 13:41:20.551711 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3255 13:41:20.558290 TX Bit5 (977~999) 23 988, Bit13 (969~991) 23 980,
3256 13:41:20.561632 TX Bit6 (977~1000) 24 988, Bit14 (969~991) 23 980,
3257 13:41:20.564945 TX Bit7 (976~997) 22 986, Bit15 (964~989) 26 976,
3258 13:41:20.568058
3259 13:41:20.568488 Write Rank1 MR14 =0x10
3260 13:41:20.578079
3261 13:41:20.581476 CH=1, VrefRange= 0, VrefLevel = 16
3262 13:41:20.585011 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978,
3263 13:41:20.588513 TX Bit1 (976~998) 23 987, Bit9 (967~990) 24 978,
3264 13:41:20.595091 TX Bit2 (973~997) 25 985, Bit10 (968~990) 23 979,
3265 13:41:20.598249 TX Bit3 (972~996) 25 984, Bit11 (969~992) 24 980,
3266 13:41:20.601944 TX Bit4 (974~997) 24 985, Bit12 (969~992) 24 980,
3267 13:41:20.608296 TX Bit5 (977~1000) 24 988, Bit13 (969~991) 23 980,
3268 13:41:20.612108 TX Bit6 (977~1000) 24 988, Bit14 (968~991) 24 979,
3269 13:41:20.614926 TX Bit7 (975~998) 24 986, Bit15 (963~989) 27 976,
3270 13:41:20.615351
3271 13:41:20.618063 Write Rank1 MR14 =0x12
3272 13:41:20.628138
3273 13:41:20.631929 CH=1, VrefRange= 0, VrefLevel = 18
3274 13:41:20.634399 TX Bit0 (977~1001) 25 989, Bit8 (966~991) 26 978,
3275 13:41:20.638306 TX Bit1 (976~999) 24 987, Bit9 (966~991) 26 978,
3276 13:41:20.644992 TX Bit2 (972~997) 26 984, Bit10 (968~991) 24 979,
3277 13:41:20.648464 TX Bit3 (971~996) 26 983, Bit11 (969~992) 24 980,
3278 13:41:20.651599 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3279 13:41:20.658127 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
3280 13:41:20.661170 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
3281 13:41:20.665188 TX Bit7 (975~998) 24 986, Bit15 (963~990) 28 976,
3282 13:41:20.668371
3283 13:41:20.668868 Write Rank1 MR14 =0x14
3284 13:41:20.678272
3285 13:41:20.681754 CH=1, VrefRange= 0, VrefLevel = 20
3286 13:41:20.685144 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
3287 13:41:20.688514 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
3288 13:41:20.694798 TX Bit2 (972~997) 26 984, Bit10 (967~991) 25 979,
3289 13:41:20.697985 TX Bit3 (971~996) 26 983, Bit11 (968~992) 25 980,
3290 13:41:20.702013 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3291 13:41:20.708502 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
3292 13:41:20.711743 TX Bit6 (976~1001) 26 988, Bit14 (968~992) 25 980,
3293 13:41:20.714705 TX Bit7 (975~998) 24 986, Bit15 (963~990) 28 976,
3294 13:41:20.715205
3295 13:41:20.717983 Write Rank1 MR14 =0x16
3296 13:41:20.728379
3297 13:41:20.731890 CH=1, VrefRange= 0, VrefLevel = 22
3298 13:41:20.735003 TX Bit0 (976~1002) 27 989, Bit8 (965~991) 27 978,
3299 13:41:20.738128 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
3300 13:41:20.745537 TX Bit2 (972~997) 26 984, Bit10 (967~991) 25 979,
3301 13:41:20.748361 TX Bit3 (970~997) 28 983, Bit11 (968~992) 25 980,
3302 13:41:20.751949 TX Bit4 (973~998) 26 985, Bit12 (969~992) 24 980,
3303 13:41:20.757983 TX Bit5 (976~1000) 25 988, Bit13 (968~992) 25 980,
3304 13:41:20.761317 TX Bit6 (976~1001) 26 988, Bit14 (968~992) 25 980,
3305 13:41:20.767767 TX Bit7 (974~998) 25 986, Bit15 (963~990) 28 976,
3306 13:41:20.768191
3307 13:41:20.768518 Write Rank1 MR14 =0x18
3308 13:41:20.778012
3309 13:41:20.781761 CH=1, VrefRange= 0, VrefLevel = 24
3310 13:41:20.784850 TX Bit0 (976~1001) 26 988, Bit8 (965~991) 27 978,
3311 13:41:20.788254 TX Bit1 (975~999) 25 987, Bit9 (965~991) 27 978,
3312 13:41:20.795295 TX Bit2 (971~997) 27 984, Bit10 (967~991) 25 979,
3313 13:41:20.798499 TX Bit3 (970~997) 28 983, Bit11 (968~992) 25 980,
3314 13:41:20.801412 TX Bit4 (973~998) 26 985, Bit12 (969~992) 24 980,
3315 13:41:20.808227 TX Bit5 (976~1001) 26 988, Bit13 (968~992) 25 980,
3316 13:41:20.811588 TX Bit6 (976~1001) 26 988, Bit14 (967~991) 25 979,
3317 13:41:20.814937 TX Bit7 (974~998) 25 986, Bit15 (963~990) 28 976,
3318 13:41:20.815432
3319 13:41:20.818316 Write Rank1 MR14 =0x1a
3320 13:41:20.828456
3321 13:41:20.831790 CH=1, VrefRange= 0, VrefLevel = 26
3322 13:41:20.835020 TX Bit0 (976~1001) 26 988, Bit8 (965~991) 27 978,
3323 13:41:20.838347 TX Bit1 (975~999) 25 987, Bit9 (965~991) 27 978,
3324 13:41:20.845051 TX Bit2 (971~997) 27 984, Bit10 (967~991) 25 979,
3325 13:41:20.848106 TX Bit3 (970~997) 28 983, Bit11 (968~992) 25 980,
3326 13:41:20.851905 TX Bit4 (973~998) 26 985, Bit12 (969~992) 24 980,
3327 13:41:20.859051 TX Bit5 (976~1001) 26 988, Bit13 (968~992) 25 980,
3328 13:41:20.861438 TX Bit6 (976~1001) 26 988, Bit14 (967~991) 25 979,
3329 13:41:20.864892 TX Bit7 (974~998) 25 986, Bit15 (963~990) 28 976,
3330 13:41:20.868603
3331 13:41:20.869099 Write Rank1 MR14 =0x1c
3332 13:41:20.878632
3333 13:41:20.882145 CH=1, VrefRange= 0, VrefLevel = 28
3334 13:41:20.885790 TX Bit0 (976~1001) 26 988, Bit8 (965~991) 27 978,
3335 13:41:20.888466 TX Bit1 (975~999) 25 987, Bit9 (965~991) 27 978,
3336 13:41:20.894931 TX Bit2 (971~997) 27 984, Bit10 (967~991) 25 979,
3337 13:41:20.898470 TX Bit3 (970~997) 28 983, Bit11 (968~992) 25 980,
3338 13:41:20.901824 TX Bit4 (973~998) 26 985, Bit12 (969~992) 24 980,
3339 13:41:20.908345 TX Bit5 (976~1001) 26 988, Bit13 (968~992) 25 980,
3340 13:41:20.912148 TX Bit6 (976~1001) 26 988, Bit14 (967~991) 25 979,
3341 13:41:20.914775 TX Bit7 (974~998) 25 986, Bit15 (963~990) 28 976,
3342 13:41:20.918573
3343 13:41:20.919065 Write Rank1 MR14 =0x1e
3344 13:41:20.928512
3345 13:41:20.931626 CH=1, VrefRange= 0, VrefLevel = 30
3346 13:41:20.934969 TX Bit0 (976~1001) 26 988, Bit8 (965~991) 27 978,
3347 13:41:20.938252 TX Bit1 (975~999) 25 987, Bit9 (965~991) 27 978,
3348 13:41:20.944984 TX Bit2 (971~997) 27 984, Bit10 (967~991) 25 979,
3349 13:41:20.948164 TX Bit3 (970~997) 28 983, Bit11 (968~992) 25 980,
3350 13:41:20.951395 TX Bit4 (973~998) 26 985, Bit12 (969~992) 24 980,
3351 13:41:20.958397 TX Bit5 (976~1001) 26 988, Bit13 (968~992) 25 980,
3352 13:41:20.961834 TX Bit6 (976~1001) 26 988, Bit14 (967~991) 25 979,
3353 13:41:20.964855 TX Bit7 (974~998) 25 986, Bit15 (963~990) 28 976,
3354 13:41:20.968096
3355 13:41:20.968386
3356 13:41:20.971361 TX Vref found, early break! 391< 394
3357 13:41:20.974769 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3358 13:41:20.977951 u1DelayCellOfst[0]=6 cells (5 PI)
3359 13:41:20.981718 u1DelayCellOfst[1]=5 cells (4 PI)
3360 13:41:20.985432 u1DelayCellOfst[2]=1 cells (1 PI)
3361 13:41:20.988219 u1DelayCellOfst[3]=0 cells (0 PI)
3362 13:41:20.988381 u1DelayCellOfst[4]=2 cells (2 PI)
3363 13:41:20.991246 u1DelayCellOfst[5]=6 cells (5 PI)
3364 13:41:20.995504 u1DelayCellOfst[6]=6 cells (5 PI)
3365 13:41:20.998377 u1DelayCellOfst[7]=3 cells (3 PI)
3366 13:41:21.002009 Byte0, DQ PI dly=983, DQM PI dly= 985
3367 13:41:21.008154 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3368 13:41:21.008393
3369 13:41:21.011553 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3370 13:41:21.011822
3371 13:41:21.015120 u1DelayCellOfst[8]=2 cells (2 PI)
3372 13:41:21.018602 u1DelayCellOfst[9]=2 cells (2 PI)
3373 13:41:21.021559 u1DelayCellOfst[10]=3 cells (3 PI)
3374 13:41:21.025554 u1DelayCellOfst[11]=5 cells (4 PI)
3375 13:41:21.026033 u1DelayCellOfst[12]=5 cells (4 PI)
3376 13:41:21.028771 u1DelayCellOfst[13]=5 cells (4 PI)
3377 13:41:21.031665 u1DelayCellOfst[14]=3 cells (3 PI)
3378 13:41:21.035439 u1DelayCellOfst[15]=0 cells (0 PI)
3379 13:41:21.038231 Byte1, DQ PI dly=976, DQM PI dly= 978
3380 13:41:21.045855 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
3381 13:41:21.046361
3382 13:41:21.048522 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
3383 13:41:21.049049
3384 13:41:21.051945 Write Rank1 MR14 =0x18
3385 13:41:21.052467
3386 13:41:21.052798 Final TX Range 0 Vref 24
3387 13:41:21.053102
3388 13:41:21.058403 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3389 13:41:21.058909
3390 13:41:21.065019 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3391 13:41:21.071983 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3392 13:41:21.081879 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3393 13:41:21.082386 Write Rank1 MR3 =0xb0
3394 13:41:21.085271 DramC Write-DBI on
3395 13:41:21.085797 ==
3396 13:41:21.088605 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3397 13:41:21.092057 fsp= 1, odt_onoff= 1, Byte mode= 0
3398 13:41:21.092564 ==
3399 13:41:21.098401 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3400 13:41:21.098827
3401 13:41:21.099161 Begin, DQ Scan Range 698~762
3402 13:41:21.099470
3403 13:41:21.099764
3404 13:41:21.101903 TX Vref Scan disable
3405 13:41:21.104911 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3406 13:41:21.108781 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3407 13:41:21.112359 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3408 13:41:21.115372 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3409 13:41:21.118398 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3410 13:41:21.121833 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3411 13:41:21.125483 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3412 13:41:21.128613 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3413 13:41:21.132318 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3414 13:41:21.138763 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
3415 13:41:21.141929 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
3416 13:41:21.145477 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
3417 13:41:21.148734 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
3418 13:41:21.152075 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3419 13:41:21.155494 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3420 13:41:21.158446 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3421 13:41:21.161853 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3422 13:41:21.165179 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3423 13:41:21.168215 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3424 13:41:21.176688 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3425 13:41:21.179747 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3426 13:41:21.182836 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3427 13:41:21.186196 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3428 13:41:21.189466 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3429 13:41:21.192683 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3430 13:41:21.196019 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3431 13:41:21.199372 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3432 13:41:21.203002 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
3433 13:41:21.206129 Byte0, DQ PI dly=730, DQM PI dly= 730
3434 13:41:21.209553 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
3435 13:41:21.210060
3436 13:41:21.215986 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
3437 13:41:21.216526
3438 13:41:21.219251 Byte1, DQ PI dly=721, DQM PI dly= 721
3439 13:41:21.222601 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
3440 13:41:21.223079
3441 13:41:21.226521 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
3442 13:41:21.227025
3443 13:41:21.232936 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3444 13:41:21.243128 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3445 13:41:21.249481 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3446 13:41:21.249990 Write Rank1 MR3 =0x30
3447 13:41:21.253414 DramC Write-DBI off
3448 13:41:21.253914
3449 13:41:21.254246 [DATLAT]
3450 13:41:21.256506 Freq=1600, CH1 RK1, use_rxtx_scan=0
3451 13:41:21.257008
3452 13:41:21.259694 DATLAT Default: 0x10
3453 13:41:21.260243 7, 0xFFFF, sum=0
3454 13:41:21.262878 8, 0xFFFF, sum=0
3455 13:41:21.263388 9, 0xFFFF, sum=0
3456 13:41:21.266300 10, 0xFFFF, sum=0
3457 13:41:21.266812 11, 0xFFFF, sum=0
3458 13:41:21.267154 12, 0xFFFF, sum=0
3459 13:41:21.269435 13, 0xFFFF, sum=0
3460 13:41:21.270093 14, 0x0, sum=1
3461 13:41:21.273146 15, 0x0, sum=2
3462 13:41:21.273707 16, 0x0, sum=3
3463 13:41:21.276282 17, 0x0, sum=4
3464 13:41:21.279727 pattern=2 first_step=14 total pass=5 best_step=16
3465 13:41:21.280237 ==
3466 13:41:21.286221 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3467 13:41:21.286734 fsp= 1, odt_onoff= 1, Byte mode= 0
3468 13:41:21.289965 ==
3469 13:41:21.292924 Start DQ dly to find pass range UseTestEngine =1
3470 13:41:21.296049 x-axis: bit #, y-axis: DQ dly (-127~63)
3471 13:41:21.296476 RX Vref Scan = 0
3472 13:41:21.299769 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3473 13:41:21.303045 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3474 13:41:21.306585 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3475 13:41:21.310104 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3476 13:41:21.313109 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3477 13:41:21.316295 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3478 13:41:21.316781 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3479 13:41:21.319692 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3480 13:41:21.323019 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3481 13:41:21.327030 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3482 13:41:21.329535 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3483 13:41:21.332948 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3484 13:41:21.336174 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3485 13:41:21.339819 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3486 13:41:21.340335 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3487 13:41:21.343433 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3488 13:41:21.346135 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3489 13:41:21.349861 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3490 13:41:21.353453 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3491 13:41:21.356605 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3492 13:41:21.360098 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3493 13:41:21.363640 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3494 13:41:21.364156 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3495 13:41:21.366630 -3, [0] xxxoxxxx xxxxxxxx [MSB]
3496 13:41:21.369970 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3497 13:41:21.373399 -1, [0] xxooxxxx xxxxxxxo [MSB]
3498 13:41:21.376350 0, [0] xxooxxxx xoxxxxxo [MSB]
3499 13:41:21.380471 1, [0] xxooxxxx oooxxxxo [MSB]
3500 13:41:21.380988 2, [0] xxooxxxx ooooxxxo [MSB]
3501 13:41:21.383371 3, [0] xxoooxxo ooooxxoo [MSB]
3502 13:41:21.386509 4, [0] xxoooxxo ooooxooo [MSB]
3503 13:41:21.389935 5, [0] xxoooxxo oooooooo [MSB]
3504 13:41:21.393198 6, [0] xxoooxxo oooooooo [MSB]
3505 13:41:21.396283 33, [0] oooxoooo ooooooox [MSB]
3506 13:41:21.399840 34, [0] oooxoooo ooooooox [MSB]
3507 13:41:21.402898 35, [0] oooxoooo ooooooox [MSB]
3508 13:41:21.406563 36, [0] ooxxoooo ooxoooox [MSB]
3509 13:41:21.410095 37, [0] ooxxxooo xxxoooxx [MSB]
3510 13:41:21.410606 38, [0] ooxxxoox xxxxooxx [MSB]
3511 13:41:21.413479 39, [0] ooxxxoox xxxxoxxx [MSB]
3512 13:41:21.416561 40, [0] ooxxxoox xxxxxxxx [MSB]
3513 13:41:21.419660 41, [0] ooxxxxox xxxxxxxx [MSB]
3514 13:41:21.422889 42, [0] xxxxxxxx xxxxxxxx [MSB]
3515 13:41:21.426783 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
3516 13:41:21.429952 iDelay=42, Bit 1, Center 24 (7 ~ 41) 35
3517 13:41:21.433303 iDelay=42, Bit 2, Center 17 (-1 ~ 35) 37
3518 13:41:21.436689 iDelay=42, Bit 3, Center 14 (-3 ~ 32) 36
3519 13:41:21.439769 iDelay=42, Bit 4, Center 19 (3 ~ 36) 34
3520 13:41:21.443386 iDelay=42, Bit 5, Center 23 (7 ~ 40) 34
3521 13:41:21.446674 iDelay=42, Bit 6, Center 24 (7 ~ 41) 35
3522 13:41:21.449756 iDelay=42, Bit 7, Center 20 (3 ~ 37) 35
3523 13:41:21.453282 iDelay=42, Bit 8, Center 18 (1 ~ 36) 36
3524 13:41:21.456625 iDelay=42, Bit 9, Center 18 (0 ~ 36) 37
3525 13:41:21.463978 iDelay=42, Bit 10, Center 18 (1 ~ 35) 35
3526 13:41:21.466419 iDelay=42, Bit 11, Center 19 (2 ~ 37) 36
3527 13:41:21.470491 iDelay=42, Bit 12, Center 22 (5 ~ 39) 35
3528 13:41:21.473092 iDelay=42, Bit 13, Center 21 (4 ~ 38) 35
3529 13:41:21.476869 iDelay=42, Bit 14, Center 19 (3 ~ 36) 34
3530 13:41:21.480073 iDelay=42, Bit 15, Center 15 (-2 ~ 32) 35
3531 13:41:21.480503 ==
3532 13:41:21.486338 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3533 13:41:21.489756 fsp= 1, odt_onoff= 1, Byte mode= 0
3534 13:41:21.490186 ==
3535 13:41:21.490523 DQS Delay:
3536 13:41:21.490905 DQS0 = 0, DQS1 = 0
3537 13:41:21.492851 DQM Delay:
3538 13:41:21.493439 DQM0 = 20, DQM1 = 18
3539 13:41:21.496525 DQ Delay:
3540 13:41:21.500645 DQ0 =24, DQ1 =24, DQ2 =17, DQ3 =14
3541 13:41:21.501090 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =20
3542 13:41:21.503041 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
3543 13:41:21.506734 DQ12 =22, DQ13 =21, DQ14 =19, DQ15 =15
3544 13:41:21.509647
3545 13:41:21.510208
3546 13:41:21.510581
3547 13:41:21.510903 [DramC_TX_OE_Calibration] TA2
3548 13:41:21.513508 Original DQ_B0 (3 6) =30, OEN = 27
3549 13:41:21.516292 Original DQ_B1 (3 6) =30, OEN = 27
3550 13:41:21.519759 23, 0x0, End_B0=23 End_B1=23
3551 13:41:21.523207 24, 0x0, End_B0=24 End_B1=24
3552 13:41:21.526393 25, 0x0, End_B0=25 End_B1=25
3553 13:41:21.526980 26, 0x0, End_B0=26 End_B1=26
3554 13:41:21.529822 27, 0x0, End_B0=27 End_B1=27
3555 13:41:21.533061 28, 0x0, End_B0=28 End_B1=28
3556 13:41:21.536654 29, 0x0, End_B0=29 End_B1=29
3557 13:41:21.537053 30, 0x0, End_B0=30 End_B1=30
3558 13:41:21.540094 31, 0xFFFF, End_B0=30 End_B1=30
3559 13:41:21.546368 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3560 13:41:21.553031 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3561 13:41:21.553499
3562 13:41:21.553809
3563 13:41:21.554123 Write Rank1 MR23 =0x3f
3564 13:41:21.556644 [DQSOSC]
3565 13:41:21.563303 [DQSOSCAuto] RK1, (LSB)MR18= 0xa7, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps
3566 13:41:21.569747 CH1_RK1: MR19=0x3, MR18=0xA7, DQSOSC=336, MR23=63, INC=21, DEC=32
3567 13:41:21.570139 Write Rank1 MR23 =0x3f
3568 13:41:21.573904 [DQSOSC]
3569 13:41:21.579935 [DQSOSCAuto] RK1, (LSB)MR18= 0xa4, (MSB)MR19= 0x3, tDQSOscB0 = 337 ps tDQSOscB1 = 0 ps
3570 13:41:21.580461 CH1 RK1: MR19=3, MR18=A4
3571 13:41:21.583323 [RxdqsGatingPostProcess] freq 1600
3572 13:41:21.589832 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3573 13:41:21.590270 Rank: 0
3574 13:41:21.593697 best DQS0 dly(2T, 0.5T) = (2, 5)
3575 13:41:21.596636 best DQS1 dly(2T, 0.5T) = (2, 5)
3576 13:41:21.599942 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3577 13:41:21.603425 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3578 13:41:21.603934 Rank: 1
3579 13:41:21.606668 best DQS0 dly(2T, 0.5T) = (2, 5)
3580 13:41:21.610099 best DQS1 dly(2T, 0.5T) = (2, 5)
3581 13:41:21.613552 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3582 13:41:21.616515 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3583 13:41:21.620070 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3584 13:41:21.623352 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3585 13:41:21.629964 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3586 13:41:21.630408
3587 13:41:21.630741
3588 13:41:21.633632 [Calibration Summary] Freqency 1600
3589 13:41:21.634056 CH 0, Rank 0
3590 13:41:21.634389 All Pass.
3591 13:41:21.636589
3592 13:41:21.637093 CH 0, Rank 1
3593 13:41:21.637501 All Pass.
3594 13:41:21.637816
3595 13:41:21.639933 CH 1, Rank 0
3596 13:41:21.640499 All Pass.
3597 13:41:21.640843
3598 13:41:21.641153 CH 1, Rank 1
3599 13:41:21.643148 All Pass.
3600 13:41:21.643570
3601 13:41:21.650566 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3602 13:41:21.656613 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3603 13:41:21.663255 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3604 13:41:21.663752 Write Rank0 MR3 =0xb0
3605 13:41:21.669873 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3606 13:41:21.677102 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3607 13:41:21.686846 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3608 13:41:21.687359 Write Rank1 MR3 =0xb0
3609 13:41:21.693515 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3610 13:41:21.699832 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3611 13:41:21.707209 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3612 13:41:21.709856 Write Rank0 MR3 =0xb0
3613 13:41:21.716645 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3614 13:41:21.723312 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3615 13:41:21.730169 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3616 13:41:21.733281 Write Rank1 MR3 =0xb0
3617 13:41:21.733717 DramC Write-DBI on
3618 13:41:21.736890 [GetDramInforAfterCalByMRR] Vendor 1.
3619 13:41:21.739859 [GetDramInforAfterCalByMRR] Revision 7.
3620 13:41:21.740289 MR8 12
3621 13:41:21.746651 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3622 13:41:21.747083 MR8 12
3623 13:41:21.749823 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3624 13:41:21.753042 MR8 12
3625 13:41:21.756713 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3626 13:41:21.757261 MR8 12
3627 13:41:21.763413 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3628 13:41:21.769790 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3629 13:41:21.773468 Write Rank0 MR13 =0xd0
3630 13:41:21.776648 Write Rank1 MR13 =0xd0
3631 13:41:21.777077 Write Rank0 MR13 =0xd0
3632 13:41:21.780441 Write Rank1 MR13 =0xd0
3633 13:41:21.783826 Save calibration result to emmc
3634 13:41:21.784329
3635 13:41:21.784666
3636 13:41:21.786768 [DramcModeReg_Check] Freq_1600, FSP_1
3637 13:41:21.787198 FSP_1, CH_0, RK0
3638 13:41:21.790788 Write Rank0 MR13 =0xd8
3639 13:41:21.793527 MR12 = 0x58 (global = 0x58) match
3640 13:41:21.796877 MR14 = 0x16 (global = 0x16) match
3641 13:41:21.797336 FSP_1, CH_0, RK1
3642 13:41:21.800289 Write Rank1 MR13 =0xd8
3643 13:41:21.804175 MR12 = 0x56 (global = 0x56) match
3644 13:41:21.807031 MR14 = 0x16 (global = 0x16) match
3645 13:41:21.807457 FSP_1, CH_1, RK0
3646 13:41:21.810351 Write Rank0 MR13 =0xd8
3647 13:41:21.814226 MR12 = 0x58 (global = 0x58) match
3648 13:41:21.817057 MR14 = 0x18 (global = 0x18) match
3649 13:41:21.817613 FSP_1, CH_1, RK1
3650 13:41:21.820658 Write Rank1 MR13 =0xd8
3651 13:41:21.823759 MR12 = 0x56 (global = 0x56) match
3652 13:41:21.827013 MR14 = 0x18 (global = 0x18) match
3653 13:41:21.827440
3654 13:41:21.830474 [MEM_TEST] 02: After DFS, before run time config
3655 13:41:21.841834 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3656 13:41:21.842347
3657 13:41:21.842716 [TA2_TEST]
3658 13:41:21.843028 === TA2 HW
3659 13:41:21.844951 TA2 PAT: XTALK
3660 13:41:21.848628 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3661 13:41:21.855181 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3662 13:41:21.858453 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3663 13:41:21.861781 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3664 13:41:21.864644
3665 13:41:21.865068
3666 13:41:21.865439 Settings after calibration
3667 13:41:21.865757
3668 13:41:21.868324 [DramcRunTimeConfig]
3669 13:41:21.871604 TransferPLLToSPMControl - MODE SW PHYPLL
3670 13:41:21.872117 TX_TRACKING: ON
3671 13:41:21.875241 RX_TRACKING: ON
3672 13:41:21.875756 HW_GATING: ON
3673 13:41:21.878116 HW_GATING DBG: OFF
3674 13:41:21.878540 ddr_geometry:1
3675 13:41:21.881685 ddr_geometry:1
3676 13:41:21.882186 ddr_geometry:1
3677 13:41:21.882542 ddr_geometry:1
3678 13:41:21.885294 ddr_geometry:1
3679 13:41:21.885806 ddr_geometry:1
3680 13:41:21.888642 ddr_geometry:1
3681 13:41:21.889140 ddr_geometry:1
3682 13:41:21.891760 High Freq DUMMY_READ_FOR_TRACKING: ON
3683 13:41:21.895035 ZQCS_ENABLE_LP4: OFF
3684 13:41:21.898405 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3685 13:41:21.901446 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3686 13:41:21.901873 SPM_CONTROL_AFTERK: ON
3687 13:41:21.905149 IMPEDANCE_TRACKING: ON
3688 13:41:21.905685 TEMP_SENSOR: ON
3689 13:41:21.908798 PER_BANK_REFRESH: ON
3690 13:41:21.909349 HW_SAVE_FOR_SR: ON
3691 13:41:21.911741 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3692 13:41:21.915198 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3693 13:41:21.918368 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3694 13:41:21.921862 Read ODT Tracking: ON
3695 13:41:21.925326 =========================
3696 13:41:21.925882
3697 13:41:21.926223 [TA2_TEST]
3698 13:41:21.926536 === TA2 HW
3699 13:41:21.932002 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3700 13:41:21.935452 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3701 13:41:21.941888 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3702 13:41:21.945460 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3703 13:41:21.945968
3704 13:41:21.948674 [MEM_TEST] 03: After run time config
3705 13:41:21.959548 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3706 13:41:21.962745 [complex_mem_test] start addr:0x40024000, len:131072
3707 13:41:22.167288 1st complex R/W mem test pass
3708 13:41:22.173618 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3709 13:41:22.177322 sync preloader write leveling
3710 13:41:22.180580 sync preloader cbt_mr12
3711 13:41:22.184101 sync preloader cbt_clk_dly
3712 13:41:22.184606 sync preloader cbt_cmd_dly
3713 13:41:22.187232 sync preloader cbt_cs
3714 13:41:22.190585 sync preloader cbt_ca_perbit_delay
3715 13:41:22.191085 sync preloader clk_delay
3716 13:41:22.193829 sync preloader dqs_delay
3717 13:41:22.196974 sync preloader u1Gating2T_Save
3718 13:41:22.200654 sync preloader u1Gating05T_Save
3719 13:41:22.203886 sync preloader u1Gatingfine_tune_Save
3720 13:41:22.207137 sync preloader u1Gatingucpass_count_Save
3721 13:41:22.210473 sync preloader u1TxWindowPerbitVref_Save
3722 13:41:22.213636 sync preloader u1TxCenter_min_Save
3723 13:41:22.217397 sync preloader u1TxCenter_max_Save
3724 13:41:22.220538 sync preloader u1Txwin_center_Save
3725 13:41:22.223642 sync preloader u1Txfirst_pass_Save
3726 13:41:22.226804 sync preloader u1Txlast_pass_Save
3727 13:41:22.227250 sync preloader u1RxDatlat_Save
3728 13:41:22.230207 sync preloader u1RxWinPerbitVref_Save
3729 13:41:22.236937 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3730 13:41:22.240644 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3731 13:41:22.243808 sync preloader delay_cell_unit
3732 13:41:22.250203 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3733 13:41:22.253795 sync preloader write leveling
3734 13:41:22.254460 sync preloader cbt_mr12
3735 13:41:22.257125 sync preloader cbt_clk_dly
3736 13:41:22.260584 sync preloader cbt_cmd_dly
3737 13:41:22.261093 sync preloader cbt_cs
3738 13:41:22.264025 sync preloader cbt_ca_perbit_delay
3739 13:41:22.266903 sync preloader clk_delay
3740 13:41:22.270689 sync preloader dqs_delay
3741 13:41:22.271199 sync preloader u1Gating2T_Save
3742 13:41:22.274111 sync preloader u1Gating05T_Save
3743 13:41:22.277410 sync preloader u1Gatingfine_tune_Save
3744 13:41:22.280498 sync preloader u1Gatingucpass_count_Save
3745 13:41:22.284205 sync preloader u1TxWindowPerbitVref_Save
3746 13:41:22.287489 sync preloader u1TxCenter_min_Save
3747 13:41:22.290990 sync preloader u1TxCenter_max_Save
3748 13:41:22.294133 sync preloader u1Txwin_center_Save
3749 13:41:22.297131 sync preloader u1Txfirst_pass_Save
3750 13:41:22.300979 sync preloader u1Txlast_pass_Save
3751 13:41:22.303898 sync preloader u1RxDatlat_Save
3752 13:41:22.307380 sync preloader u1RxWinPerbitVref_Save
3753 13:41:22.310557 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3754 13:41:22.314042 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3755 13:41:22.317119 sync preloader delay_cell_unit
3756 13:41:22.323708 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3757 13:41:22.326795 sync preloader write leveling
3758 13:41:22.330671 sync preloader cbt_mr12
3759 13:41:22.331177 sync preloader cbt_clk_dly
3760 13:41:22.334164 sync preloader cbt_cmd_dly
3761 13:41:22.337081 sync preloader cbt_cs
3762 13:41:22.340762 sync preloader cbt_ca_perbit_delay
3763 13:41:22.341314 sync preloader clk_delay
3764 13:41:22.343763 sync preloader dqs_delay
3765 13:41:22.347095 sync preloader u1Gating2T_Save
3766 13:41:22.350502 sync preloader u1Gating05T_Save
3767 13:41:22.353863 sync preloader u1Gatingfine_tune_Save
3768 13:41:22.356816 sync preloader u1Gatingucpass_count_Save
3769 13:41:22.360573 sync preloader u1TxWindowPerbitVref_Save
3770 13:41:22.363830 sync preloader u1TxCenter_min_Save
3771 13:41:22.366808 sync preloader u1TxCenter_max_Save
3772 13:41:22.370459 sync preloader u1Txwin_center_Save
3773 13:41:22.373911 sync preloader u1Txfirst_pass_Save
3774 13:41:22.374406 sync preloader u1Txlast_pass_Save
3775 13:41:22.377028 sync preloader u1RxDatlat_Save
3776 13:41:22.380844 sync preloader u1RxWinPerbitVref_Save
3777 13:41:22.383856 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3778 13:41:22.390864 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3779 13:41:22.393925 sync preloader delay_cell_unit
3780 13:41:22.397396 just_for_test_dump_coreboot_params dump all params
3781 13:41:22.397903 dump source = 0x0
3782 13:41:22.400460 dump params frequency:1600
3783 13:41:22.403662 dump params rank number:2
3784 13:41:22.404090
3785 13:41:22.406990 dump params write leveling
3786 13:41:22.407432 write leveling[0][0][0] = 0x21
3787 13:41:22.410672 write leveling[0][0][1] = 0x1b
3788 13:41:22.413718 write leveling[0][1][0] = 0x22
3789 13:41:22.417455 write leveling[0][1][1] = 0x1e
3790 13:41:22.420786 write leveling[1][0][0] = 0x24
3791 13:41:22.423638 write leveling[1][0][1] = 0x20
3792 13:41:22.424064 write leveling[1][1][0] = 0x25
3793 13:41:22.426978 write leveling[1][1][1] = 0x1f
3794 13:41:22.430435 dump params cbt_cs
3795 13:41:22.430860 cbt_cs[0][0] = 0x8
3796 13:41:22.433547 cbt_cs[0][1] = 0x8
3797 13:41:22.433970 cbt_cs[1][0] = 0xc
3798 13:41:22.436954 cbt_cs[1][1] = 0xc
3799 13:41:22.437409 dump params cbt_mr12
3800 13:41:22.440678 cbt_mr12[0][0] = 0x18
3801 13:41:22.443751 cbt_mr12[0][1] = 0x16
3802 13:41:22.444223 cbt_mr12[1][0] = 0x18
3803 13:41:22.446977 cbt_mr12[1][1] = 0x16
3804 13:41:22.447398 dump params tx window
3805 13:41:22.450192 tx_center_min[0][0][0] = 979
3806 13:41:22.453747 tx_center_max[0][0][0] = 987
3807 13:41:22.456980 tx_center_min[0][0][1] = 975
3808 13:41:22.460497 tx_center_max[0][0][1] = 979
3809 13:41:22.460994 tx_center_min[0][1][0] = 981
3810 13:41:22.463848 tx_center_max[0][1][0] = 988
3811 13:41:22.467045 tx_center_min[0][1][1] = 978
3812 13:41:22.470552 tx_center_max[0][1][1] = 984
3813 13:41:22.471057 tx_center_min[1][0][0] = 981
3814 13:41:22.473939 tx_center_max[1][0][0] = 988
3815 13:41:22.477374 tx_center_min[1][0][1] = 978
3816 13:41:22.480938 tx_center_max[1][0][1] = 981
3817 13:41:22.483632 tx_center_min[1][1][0] = 983
3818 13:41:22.484057 tx_center_max[1][1][0] = 988
3819 13:41:22.487567 tx_center_min[1][1][1] = 976
3820 13:41:22.490778 tx_center_max[1][1][1] = 980
3821 13:41:22.493716 dump params tx window
3822 13:41:22.494141 tx_win_center[0][0][0] = 987
3823 13:41:22.497132 tx_first_pass[0][0][0] = 975
3824 13:41:22.500503 tx_last_pass[0][0][0] = 999
3825 13:41:22.503951 tx_win_center[0][0][1] = 985
3826 13:41:22.504374 tx_first_pass[0][0][1] = 974
3827 13:41:22.507039 tx_last_pass[0][0][1] = 997
3828 13:41:22.510905 tx_win_center[0][0][2] = 986
3829 13:41:22.513858 tx_first_pass[0][0][2] = 974
3830 13:41:22.514282 tx_last_pass[0][0][2] = 998
3831 13:41:22.517880 tx_win_center[0][0][3] = 979
3832 13:41:22.520793 tx_first_pass[0][0][3] = 967
3833 13:41:22.523696 tx_last_pass[0][0][3] = 991
3834 13:41:22.527153 tx_win_center[0][0][4] = 985
3835 13:41:22.527574 tx_first_pass[0][0][4] = 973
3836 13:41:22.530448 tx_last_pass[0][0][4] = 998
3837 13:41:22.533962 tx_win_center[0][0][5] = 980
3838 13:41:22.537556 tx_first_pass[0][0][5] = 969
3839 13:41:22.537982 tx_last_pass[0][0][5] = 992
3840 13:41:22.540776 tx_win_center[0][0][6] = 982
3841 13:41:22.544173 tx_first_pass[0][0][6] = 970
3842 13:41:22.547091 tx_last_pass[0][0][6] = 994
3843 13:41:22.550751 tx_win_center[0][0][7] = 982
3844 13:41:22.551263 tx_first_pass[0][0][7] = 970
3845 13:41:22.554138 tx_last_pass[0][0][7] = 995
3846 13:41:22.557439 tx_win_center[0][0][8] = 975
3847 13:41:22.560368 tx_first_pass[0][0][8] = 963
3848 13:41:22.560793 tx_last_pass[0][0][8] = 988
3849 13:41:22.563878 tx_win_center[0][0][9] = 975
3850 13:41:22.567292 tx_first_pass[0][0][9] = 963
3851 13:41:22.570999 tx_last_pass[0][0][9] = 988
3852 13:41:22.574065 tx_win_center[0][0][10] = 979
3853 13:41:22.574493 tx_first_pass[0][0][10] = 968
3854 13:41:22.577382 tx_last_pass[0][0][10] = 991
3855 13:41:22.580452 tx_win_center[0][0][11] = 976
3856 13:41:22.584011 tx_first_pass[0][0][11] = 963
3857 13:41:22.587591 tx_last_pass[0][0][11] = 989
3858 13:41:22.588102 tx_win_center[0][0][12] = 976
3859 13:41:22.591158 tx_first_pass[0][0][12] = 964
3860 13:41:22.593895 tx_last_pass[0][0][12] = 989
3861 13:41:22.597329 tx_win_center[0][0][13] = 975
3862 13:41:22.600781 tx_first_pass[0][0][13] = 963
3863 13:41:22.601396 tx_last_pass[0][0][13] = 988
3864 13:41:22.604188 tx_win_center[0][0][14] = 976
3865 13:41:22.607071 tx_first_pass[0][0][14] = 963
3866 13:41:22.610489 tx_last_pass[0][0][14] = 989
3867 13:41:22.613888 tx_win_center[0][0][15] = 978
3868 13:41:22.614319 tx_first_pass[0][0][15] = 966
3869 13:41:22.617173 tx_last_pass[0][0][15] = 990
3870 13:41:22.620906 tx_win_center[0][1][0] = 988
3871 13:41:22.624187 tx_first_pass[0][1][0] = 976
3872 13:41:22.624615 tx_last_pass[0][1][0] = 1001
3873 13:41:22.627334 tx_win_center[0][1][1] = 987
3874 13:41:22.630404 tx_first_pass[0][1][1] = 976
3875 13:41:22.633981 tx_last_pass[0][1][1] = 999
3876 13:41:22.637564 tx_win_center[0][1][2] = 987
3877 13:41:22.638040 tx_first_pass[0][1][2] = 976
3878 13:41:22.640770 tx_last_pass[0][1][2] = 999
3879 13:41:22.644393 tx_win_center[0][1][3] = 981
3880 13:41:22.647729 tx_first_pass[0][1][3] = 969
3881 13:41:22.648159 tx_last_pass[0][1][3] = 993
3882 13:41:22.650715 tx_win_center[0][1][4] = 987
3883 13:41:22.654177 tx_first_pass[0][1][4] = 975
3884 13:41:22.657304 tx_last_pass[0][1][4] = 999
3885 13:41:22.660987 tx_win_center[0][1][5] = 982
3886 13:41:22.661415 tx_first_pass[0][1][5] = 970
3887 13:41:22.664294 tx_last_pass[0][1][5] = 994
3888 13:41:22.667395 tx_win_center[0][1][6] = 982
3889 13:41:22.670773 tx_first_pass[0][1][6] = 970
3890 13:41:22.671161 tx_last_pass[0][1][6] = 995
3891 13:41:22.673933 tx_win_center[0][1][7] = 985
3892 13:41:22.677686 tx_first_pass[0][1][7] = 973
3893 13:41:22.681180 tx_last_pass[0][1][7] = 997
3894 13:41:22.684310 tx_win_center[0][1][8] = 978
3895 13:41:22.684762 tx_first_pass[0][1][8] = 966
3896 13:41:22.687549 tx_last_pass[0][1][8] = 990
3897 13:41:22.691096 tx_win_center[0][1][9] = 979
3898 13:41:22.694013 tx_first_pass[0][1][9] = 967
3899 13:41:22.694442 tx_last_pass[0][1][9] = 991
3900 13:41:22.697596 tx_win_center[0][1][10] = 984
3901 13:41:22.700893 tx_first_pass[0][1][10] = 973
3902 13:41:22.704382 tx_last_pass[0][1][10] = 996
3903 13:41:22.707800 tx_win_center[0][1][11] = 979
3904 13:41:22.708230 tx_first_pass[0][1][11] = 967
3905 13:41:22.710925 tx_last_pass[0][1][11] = 991
3906 13:41:22.714708 tx_win_center[0][1][12] = 979
3907 13:41:22.717733 tx_first_pass[0][1][12] = 968
3908 13:41:22.721166 tx_last_pass[0][1][12] = 991
3909 13:41:22.721652 tx_win_center[0][1][13] = 978
3910 13:41:22.724689 tx_first_pass[0][1][13] = 967
3911 13:41:22.728012 tx_last_pass[0][1][13] = 990
3912 13:41:22.731237 tx_win_center[0][1][14] = 979
3913 13:41:22.734664 tx_first_pass[0][1][14] = 967
3914 13:41:22.735171 tx_last_pass[0][1][14] = 991
3915 13:41:22.737632 tx_win_center[0][1][15] = 981
3916 13:41:22.741114 tx_first_pass[0][1][15] = 969
3917 13:41:22.744805 tx_last_pass[0][1][15] = 993
3918 13:41:22.748466 tx_win_center[1][0][0] = 988
3919 13:41:22.748963 tx_first_pass[1][0][0] = 976
3920 13:41:22.750971 tx_last_pass[1][0][0] = 1000
3921 13:41:22.754492 tx_win_center[1][0][1] = 986
3922 13:41:22.757633 tx_first_pass[1][0][1] = 975
3923 13:41:22.758262 tx_last_pass[1][0][1] = 998
3924 13:41:22.761606 tx_win_center[1][0][2] = 984
3925 13:41:22.764304 tx_first_pass[1][0][2] = 973
3926 13:41:22.767807 tx_last_pass[1][0][2] = 996
3927 13:41:22.771214 tx_win_center[1][0][3] = 981
3928 13:41:22.771712 tx_first_pass[1][0][3] = 970
3929 13:41:22.774630 tx_last_pass[1][0][3] = 993
3930 13:41:22.777787 tx_win_center[1][0][4] = 985
3931 13:41:22.781119 tx_first_pass[1][0][4] = 974
3932 13:41:22.781679 tx_last_pass[1][0][4] = 997
3933 13:41:22.784631 tx_win_center[1][0][5] = 987
3934 13:41:22.787972 tx_first_pass[1][0][5] = 976
3935 13:41:22.791298 tx_last_pass[1][0][5] = 998
3936 13:41:22.791800 tx_win_center[1][0][6] = 987
3937 13:41:22.794620 tx_first_pass[1][0][6] = 976
3938 13:41:22.798141 tx_last_pass[1][0][6] = 999
3939 13:41:22.801580 tx_win_center[1][0][7] = 985
3940 13:41:22.804627 tx_first_pass[1][0][7] = 974
3941 13:41:22.805147 tx_last_pass[1][0][7] = 997
3942 13:41:22.807989 tx_win_center[1][0][8] = 979
3943 13:41:22.811417 tx_first_pass[1][0][8] = 967
3944 13:41:22.814734 tx_last_pass[1][0][8] = 991
3945 13:41:22.815225 tx_win_center[1][0][9] = 979
3946 13:41:22.817992 tx_first_pass[1][0][9] = 967
3947 13:41:22.821593 tx_last_pass[1][0][9] = 991
3948 13:41:22.825013 tx_win_center[1][0][10] = 980
3949 13:41:22.827959 tx_first_pass[1][0][10] = 968
3950 13:41:22.828455 tx_last_pass[1][0][10] = 992
3951 13:41:22.831334 tx_win_center[1][0][11] = 980
3952 13:41:22.834869 tx_first_pass[1][0][11] = 969
3953 13:41:22.837992 tx_last_pass[1][0][11] = 992
3954 13:41:22.841531 tx_win_center[1][0][12] = 981
3955 13:41:22.841958 tx_first_pass[1][0][12] = 969
3956 13:41:22.844421 tx_last_pass[1][0][12] = 993
3957 13:41:22.847919 tx_win_center[1][0][13] = 981
3958 13:41:22.851068 tx_first_pass[1][0][13] = 970
3959 13:41:22.854730 tx_last_pass[1][0][13] = 992
3960 13:41:22.855161 tx_win_center[1][0][14] = 980
3961 13:41:22.857918 tx_first_pass[1][0][14] = 969
3962 13:41:22.861385 tx_last_pass[1][0][14] = 992
3963 13:41:22.864491 tx_win_center[1][0][15] = 978
3964 13:41:22.868402 tx_first_pass[1][0][15] = 966
3965 13:41:22.868909 tx_last_pass[1][0][15] = 991
3966 13:41:22.871373 tx_win_center[1][1][0] = 988
3967 13:41:22.874465 tx_first_pass[1][1][0] = 976
3968 13:41:22.877834 tx_last_pass[1][1][0] = 1001
3969 13:41:22.881468 tx_win_center[1][1][1] = 987
3970 13:41:22.882057 tx_first_pass[1][1][1] = 975
3971 13:41:22.884297 tx_last_pass[1][1][1] = 999
3972 13:41:22.887799 tx_win_center[1][1][2] = 984
3973 13:41:22.891180 tx_first_pass[1][1][2] = 971
3974 13:41:22.891612 tx_last_pass[1][1][2] = 997
3975 13:41:22.894678 tx_win_center[1][1][3] = 983
3976 13:41:22.897950 tx_first_pass[1][1][3] = 970
3977 13:41:22.901220 tx_last_pass[1][1][3] = 997
3978 13:41:22.904798 tx_win_center[1][1][4] = 985
3979 13:41:22.905270 tx_first_pass[1][1][4] = 973
3980 13:41:22.907828 tx_last_pass[1][1][4] = 998
3981 13:41:22.911436 tx_win_center[1][1][5] = 988
3982 13:41:22.914423 tx_first_pass[1][1][5] = 976
3983 13:41:22.914926 tx_last_pass[1][1][5] = 1001
3984 13:41:22.918168 tx_win_center[1][1][6] = 988
3985 13:41:22.921284 tx_first_pass[1][1][6] = 976
3986 13:41:22.924255 tx_last_pass[1][1][6] = 1001
3987 13:41:22.927702 tx_win_center[1][1][7] = 986
3988 13:41:22.928202 tx_first_pass[1][1][7] = 974
3989 13:41:22.931339 tx_last_pass[1][1][7] = 998
3990 13:41:22.934029 tx_win_center[1][1][8] = 978
3991 13:41:22.937827 tx_first_pass[1][1][8] = 965
3992 13:41:22.941101 tx_last_pass[1][1][8] = 991
3993 13:41:22.941661 tx_win_center[1][1][9] = 978
3994 13:41:22.944455 tx_first_pass[1][1][9] = 965
3995 13:41:22.947514 tx_last_pass[1][1][9] = 991
3996 13:41:22.951037 tx_win_center[1][1][10] = 979
3997 13:41:22.954190 tx_first_pass[1][1][10] = 967
3998 13:41:22.954617 tx_last_pass[1][1][10] = 991
3999 13:41:22.957647 tx_win_center[1][1][11] = 980
4000 13:41:22.960773 tx_first_pass[1][1][11] = 968
4001 13:41:22.963989 tx_last_pass[1][1][11] = 992
4002 13:41:22.967560 tx_win_center[1][1][12] = 980
4003 13:41:22.967983 tx_first_pass[1][1][12] = 969
4004 13:41:22.971310 tx_last_pass[1][1][12] = 992
4005 13:41:22.974041 tx_win_center[1][1][13] = 980
4006 13:41:22.977596 tx_first_pass[1][1][13] = 968
4007 13:41:22.980897 tx_last_pass[1][1][13] = 992
4008 13:41:22.981423 tx_win_center[1][1][14] = 979
4009 13:41:22.984426 tx_first_pass[1][1][14] = 967
4010 13:41:22.987978 tx_last_pass[1][1][14] = 991
4011 13:41:22.990604 tx_win_center[1][1][15] = 976
4012 13:41:22.993972 tx_first_pass[1][1][15] = 963
4013 13:41:22.994488 tx_last_pass[1][1][15] = 990
4014 13:41:22.997117 dump params rx window
4015 13:41:23.000919 rx_firspass[0][0][0] = 9
4016 13:41:23.001371 rx_lastpass[0][0][0] = 40
4017 13:41:23.003959 rx_firspass[0][0][1] = 7
4018 13:41:23.007585 rx_lastpass[0][0][1] = 39
4019 13:41:23.008022 rx_firspass[0][0][2] = 9
4020 13:41:23.010710 rx_lastpass[0][0][2] = 38
4021 13:41:23.014408 rx_firspass[0][0][3] = -3
4022 13:41:23.017393 rx_lastpass[0][0][3] = 28
4023 13:41:23.017820 rx_firspass[0][0][4] = 6
4024 13:41:23.020643 rx_lastpass[0][0][4] = 38
4025 13:41:23.023995 rx_firspass[0][0][5] = 0
4026 13:41:23.024450 rx_lastpass[0][0][5] = 30
4027 13:41:23.027031 rx_firspass[0][0][6] = 2
4028 13:41:23.030583 rx_lastpass[0][0][6] = 32
4029 13:41:23.031008 rx_firspass[0][0][7] = 4
4030 13:41:23.033861 rx_lastpass[0][0][7] = 32
4031 13:41:23.037496 rx_firspass[0][0][8] = 0
4032 13:41:23.040786 rx_lastpass[0][0][8] = 34
4033 13:41:23.041332 rx_firspass[0][0][9] = 4
4034 13:41:23.044025 rx_lastpass[0][0][9] = 34
4035 13:41:23.047014 rx_firspass[0][0][10] = 7
4036 13:41:23.047459 rx_lastpass[0][0][10] = 38
4037 13:41:23.050742 rx_firspass[0][0][11] = 1
4038 13:41:23.054172 rx_lastpass[0][0][11] = 34
4039 13:41:23.057448 rx_firspass[0][0][12] = 2
4040 13:41:23.057961 rx_lastpass[0][0][12] = 36
4041 13:41:23.060449 rx_firspass[0][0][13] = 3
4042 13:41:23.064048 rx_lastpass[0][0][13] = 30
4043 13:41:23.064574 rx_firspass[0][0][14] = 0
4044 13:41:23.067617 rx_lastpass[0][0][14] = 35
4045 13:41:23.070784 rx_firspass[0][0][15] = 3
4046 13:41:23.074486 rx_lastpass[0][0][15] = 36
4047 13:41:23.075004 rx_firspass[0][1][0] = 7
4048 13:41:23.077373 rx_lastpass[0][1][0] = 41
4049 13:41:23.080799 rx_firspass[0][1][1] = 6
4050 13:41:23.081358 rx_lastpass[0][1][1] = 40
4051 13:41:23.083817 rx_firspass[0][1][2] = 8
4052 13:41:23.087691 rx_lastpass[0][1][2] = 39
4053 13:41:23.090904 rx_firspass[0][1][3] = -3
4054 13:41:23.091408 rx_lastpass[0][1][3] = 31
4055 13:41:23.093855 rx_firspass[0][1][4] = 7
4056 13:41:23.097472 rx_lastpass[0][1][4] = 40
4057 13:41:23.097972 rx_firspass[0][1][5] = -1
4058 13:41:23.100856 rx_lastpass[0][1][5] = 33
4059 13:41:23.104130 rx_firspass[0][1][6] = 2
4060 13:41:23.104629 rx_lastpass[0][1][6] = 35
4061 13:41:23.107343 rx_firspass[0][1][7] = 3
4062 13:41:23.110587 rx_lastpass[0][1][7] = 34
4063 13:41:23.113911 rx_firspass[0][1][8] = 0
4064 13:41:23.114418 rx_lastpass[0][1][8] = 35
4065 13:41:23.117815 rx_firspass[0][1][9] = 3
4066 13:41:23.120981 rx_lastpass[0][1][9] = 36
4067 13:41:23.121591 rx_firspass[0][1][10] = 6
4068 13:41:23.124497 rx_lastpass[0][1][10] = 39
4069 13:41:23.127354 rx_firspass[0][1][11] = 0
4070 13:41:23.130822 rx_lastpass[0][1][11] = 34
4071 13:41:23.131325 rx_firspass[0][1][12] = 3
4072 13:41:23.133903 rx_lastpass[0][1][12] = 36
4073 13:41:23.137307 rx_firspass[0][1][13] = 2
4074 13:41:23.137821 rx_lastpass[0][1][13] = 33
4075 13:41:23.140694 rx_firspass[0][1][14] = 2
4076 13:41:23.143975 rx_lastpass[0][1][14] = 34
4077 13:41:23.147186 rx_firspass[0][1][15] = 3
4078 13:41:23.147775 rx_lastpass[0][1][15] = 37
4079 13:41:23.150786 rx_firspass[1][0][0] = 7
4080 13:41:23.154114 rx_lastpass[1][0][0] = 39
4081 13:41:23.154633 rx_firspass[1][0][1] = 7
4082 13:41:23.157389 rx_lastpass[1][0][1] = 39
4083 13:41:23.160874 rx_firspass[1][0][2] = 0
4084 13:41:23.161423 rx_lastpass[1][0][2] = 34
4085 13:41:23.164250 rx_firspass[1][0][3] = -2
4086 13:41:23.168139 rx_lastpass[1][0][3] = 32
4087 13:41:23.170920 rx_firspass[1][0][4] = 4
4088 13:41:23.171344 rx_lastpass[1][0][4] = 34
4089 13:41:23.173997 rx_firspass[1][0][5] = 9
4090 13:41:23.177843 rx_lastpass[1][0][5] = 40
4091 13:41:23.178345 rx_firspass[1][0][6] = 9
4092 13:41:23.181000 rx_lastpass[1][0][6] = 40
4093 13:41:23.184484 rx_firspass[1][0][7] = 4
4094 13:41:23.184984 rx_lastpass[1][0][7] = 35
4095 13:41:23.187626 rx_firspass[1][0][8] = 1
4096 13:41:23.190974 rx_lastpass[1][0][8] = 35
4097 13:41:23.194059 rx_firspass[1][0][9] = 1
4098 13:41:23.194559 rx_lastpass[1][0][9] = 35
4099 13:41:23.197326 rx_firspass[1][0][10] = 2
4100 13:41:23.201020 rx_lastpass[1][0][10] = 33
4101 13:41:23.201563 rx_firspass[1][0][11] = 2
4102 13:41:23.203853 rx_lastpass[1][0][11] = 36
4103 13:41:23.207741 rx_firspass[1][0][12] = 4
4104 13:41:23.210974 rx_lastpass[1][0][12] = 37
4105 13:41:23.211473 rx_firspass[1][0][13] = 3
4106 13:41:23.214222 rx_lastpass[1][0][13] = 35
4107 13:41:23.217276 rx_firspass[1][0][14] = 3
4108 13:41:23.220689 rx_lastpass[1][0][14] = 35
4109 13:41:23.221107 rx_firspass[1][0][15] = -2
4110 13:41:23.224204 rx_lastpass[1][0][15] = 31
4111 13:41:23.227277 rx_firspass[1][1][0] = 7
4112 13:41:23.227696 rx_lastpass[1][1][0] = 41
4113 13:41:23.230825 rx_firspass[1][1][1] = 7
4114 13:41:23.233865 rx_lastpass[1][1][1] = 41
4115 13:41:23.234313 rx_firspass[1][1][2] = -1
4116 13:41:23.237296 rx_lastpass[1][1][2] = 35
4117 13:41:23.240765 rx_firspass[1][1][3] = -3
4118 13:41:23.244280 rx_lastpass[1][1][3] = 32
4119 13:41:23.244800 rx_firspass[1][1][4] = 3
4120 13:41:23.247121 rx_lastpass[1][1][4] = 36
4121 13:41:23.250802 rx_firspass[1][1][5] = 7
4122 13:41:23.251307 rx_lastpass[1][1][5] = 40
4123 13:41:23.254277 rx_firspass[1][1][6] = 7
4124 13:41:23.257622 rx_lastpass[1][1][6] = 41
4125 13:41:23.258051 rx_firspass[1][1][7] = 3
4126 13:41:23.260781 rx_lastpass[1][1][7] = 37
4127 13:41:23.264090 rx_firspass[1][1][8] = 1
4128 13:41:23.267442 rx_lastpass[1][1][8] = 36
4129 13:41:23.267861 rx_firspass[1][1][9] = 0
4130 13:41:23.271328 rx_lastpass[1][1][9] = 36
4131 13:41:23.274529 rx_firspass[1][1][10] = 1
4132 13:41:23.275027 rx_lastpass[1][1][10] = 35
4133 13:41:23.277683 rx_firspass[1][1][11] = 2
4134 13:41:23.281055 rx_lastpass[1][1][11] = 37
4135 13:41:23.284216 rx_firspass[1][1][12] = 5
4136 13:41:23.284716 rx_lastpass[1][1][12] = 39
4137 13:41:23.287623 rx_firspass[1][1][13] = 4
4138 13:41:23.290991 rx_lastpass[1][1][13] = 38
4139 13:41:23.291493 rx_firspass[1][1][14] = 3
4140 13:41:23.294254 rx_lastpass[1][1][14] = 36
4141 13:41:23.297686 rx_firspass[1][1][15] = -2
4142 13:41:23.300668 rx_lastpass[1][1][15] = 32
4143 13:41:23.301089 dump params clk_delay
4144 13:41:23.304098 clk_delay[0] = 0
4145 13:41:23.304515 clk_delay[1] = 0
4146 13:41:23.307892 dump params dqs_delay
4147 13:41:23.308407 dqs_delay[0][0] = 0
4148 13:41:23.311091 dqs_delay[0][1] = 2
4149 13:41:23.311509 dqs_delay[1][0] = 0
4150 13:41:23.314638 dqs_delay[1][1] = 0
4151 13:41:23.317622 dump params delay_cell_unit = 762
4152 13:41:23.318045 dump source = 0x0
4153 13:41:23.321075 dump params frequency:1200
4154 13:41:23.325019 dump params rank number:2
4155 13:41:23.325576
4156 13:41:23.328045 dump params write leveling
4157 13:41:23.328543 write leveling[0][0][0] = 0x0
4158 13:41:23.331270 write leveling[0][0][1] = 0x0
4159 13:41:23.334278 write leveling[0][1][0] = 0x0
4160 13:41:23.338380 write leveling[0][1][1] = 0x0
4161 13:41:23.341069 write leveling[1][0][0] = 0x0
4162 13:41:23.341519 write leveling[1][0][1] = 0x0
4163 13:41:23.344428 write leveling[1][1][0] = 0x0
4164 13:41:23.347737 write leveling[1][1][1] = 0x0
4165 13:41:23.348240 dump params cbt_cs
4166 13:41:23.351331 cbt_cs[0][0] = 0x0
4167 13:41:23.354303 cbt_cs[0][1] = 0x0
4168 13:41:23.354726 cbt_cs[1][0] = 0x0
4169 13:41:23.357852 cbt_cs[1][1] = 0x0
4170 13:41:23.358276 dump params cbt_mr12
4171 13:41:23.361089 cbt_mr12[0][0] = 0x0
4172 13:41:23.361674 cbt_mr12[0][1] = 0x0
4173 13:41:23.364196 cbt_mr12[1][0] = 0x0
4174 13:41:23.364614 cbt_mr12[1][1] = 0x0
4175 13:41:23.367862 dump params tx window
4176 13:41:23.370764 tx_center_min[0][0][0] = 0
4177 13:41:23.371186 tx_center_max[0][0][0] = 0
4178 13:41:23.374261 tx_center_min[0][0][1] = 0
4179 13:41:23.377730 tx_center_max[0][0][1] = 0
4180 13:41:23.381046 tx_center_min[0][1][0] = 0
4181 13:41:23.381660 tx_center_max[0][1][0] = 0
4182 13:41:23.384706 tx_center_min[0][1][1] = 0
4183 13:41:23.387914 tx_center_max[0][1][1] = 0
4184 13:41:23.391003 tx_center_min[1][0][0] = 0
4185 13:41:23.391428 tx_center_max[1][0][0] = 0
4186 13:41:23.394267 tx_center_min[1][0][1] = 0
4187 13:41:23.397874 tx_center_max[1][0][1] = 0
4188 13:41:23.398370 tx_center_min[1][1][0] = 0
4189 13:41:23.401082 tx_center_max[1][1][0] = 0
4190 13:41:23.404715 tx_center_min[1][1][1] = 0
4191 13:41:23.407624 tx_center_max[1][1][1] = 0
4192 13:41:23.408050 dump params tx window
4193 13:41:23.411079 tx_win_center[0][0][0] = 0
4194 13:41:23.414879 tx_first_pass[0][0][0] = 0
4195 13:41:23.415384 tx_last_pass[0][0][0] = 0
4196 13:41:23.417938 tx_win_center[0][0][1] = 0
4197 13:41:23.421376 tx_first_pass[0][0][1] = 0
4198 13:41:23.425061 tx_last_pass[0][0][1] = 0
4199 13:41:23.425616 tx_win_center[0][0][2] = 0
4200 13:41:23.428112 tx_first_pass[0][0][2] = 0
4201 13:41:23.431671 tx_last_pass[0][0][2] = 0
4202 13:41:23.434679 tx_win_center[0][0][3] = 0
4203 13:41:23.435280 tx_first_pass[0][0][3] = 0
4204 13:41:23.437686 tx_last_pass[0][0][3] = 0
4205 13:41:23.441168 tx_win_center[0][0][4] = 0
4206 13:41:23.441614 tx_first_pass[0][0][4] = 0
4207 13:41:23.445367 tx_last_pass[0][0][4] = 0
4208 13:41:23.448126 tx_win_center[0][0][5] = 0
4209 13:41:23.451472 tx_first_pass[0][0][5] = 0
4210 13:41:23.451900 tx_last_pass[0][0][5] = 0
4211 13:41:23.454678 tx_win_center[0][0][6] = 0
4212 13:41:23.457974 tx_first_pass[0][0][6] = 0
4213 13:41:23.458402 tx_last_pass[0][0][6] = 0
4214 13:41:23.461347 tx_win_center[0][0][7] = 0
4215 13:41:23.464697 tx_first_pass[0][0][7] = 0
4216 13:41:23.468665 tx_last_pass[0][0][7] = 0
4217 13:41:23.469166 tx_win_center[0][0][8] = 0
4218 13:41:23.471264 tx_first_pass[0][0][8] = 0
4219 13:41:23.474897 tx_last_pass[0][0][8] = 0
4220 13:41:23.478095 tx_win_center[0][0][9] = 0
4221 13:41:23.478599 tx_first_pass[0][0][9] = 0
4222 13:41:23.481596 tx_last_pass[0][0][9] = 0
4223 13:41:23.484757 tx_win_center[0][0][10] = 0
4224 13:41:23.485293 tx_first_pass[0][0][10] = 0
4225 13:41:23.487972 tx_last_pass[0][0][10] = 0
4226 13:41:23.491164 tx_win_center[0][0][11] = 0
4227 13:41:23.495000 tx_first_pass[0][0][11] = 0
4228 13:41:23.495507 tx_last_pass[0][0][11] = 0
4229 13:41:23.497960 tx_win_center[0][0][12] = 0
4230 13:41:23.501126 tx_first_pass[0][0][12] = 0
4231 13:41:23.504839 tx_last_pass[0][0][12] = 0
4232 13:41:23.505526 tx_win_center[0][0][13] = 0
4233 13:41:23.507865 tx_first_pass[0][0][13] = 0
4234 13:41:23.510896 tx_last_pass[0][0][13] = 0
4235 13:41:23.514769 tx_win_center[0][0][14] = 0
4236 13:41:23.518039 tx_first_pass[0][0][14] = 0
4237 13:41:23.518539 tx_last_pass[0][0][14] = 0
4238 13:41:23.521320 tx_win_center[0][0][15] = 0
4239 13:41:23.524925 tx_first_pass[0][0][15] = 0
4240 13:41:23.525472 tx_last_pass[0][0][15] = 0
4241 13:41:23.528201 tx_win_center[0][1][0] = 0
4242 13:41:23.531358 tx_first_pass[0][1][0] = 0
4243 13:41:23.534627 tx_last_pass[0][1][0] = 0
4244 13:41:23.535156 tx_win_center[0][1][1] = 0
4245 13:41:23.538061 tx_first_pass[0][1][1] = 0
4246 13:41:23.541440 tx_last_pass[0][1][1] = 0
4247 13:41:23.544750 tx_win_center[0][1][2] = 0
4248 13:41:23.545283 tx_first_pass[0][1][2] = 0
4249 13:41:23.548004 tx_last_pass[0][1][2] = 0
4250 13:41:23.550958 tx_win_center[0][1][3] = 0
4251 13:41:23.551387 tx_first_pass[0][1][3] = 0
4252 13:41:23.554744 tx_last_pass[0][1][3] = 0
4253 13:41:23.557954 tx_win_center[0][1][4] = 0
4254 13:41:23.561086 tx_first_pass[0][1][4] = 0
4255 13:41:23.561552 tx_last_pass[0][1][4] = 0
4256 13:41:23.564310 tx_win_center[0][1][5] = 0
4257 13:41:23.568006 tx_first_pass[0][1][5] = 0
4258 13:41:23.571191 tx_last_pass[0][1][5] = 0
4259 13:41:23.571616 tx_win_center[0][1][6] = 0
4260 13:41:23.574397 tx_first_pass[0][1][6] = 0
4261 13:41:23.578012 tx_last_pass[0][1][6] = 0
4262 13:41:23.578438 tx_win_center[0][1][7] = 0
4263 13:41:23.581681 tx_first_pass[0][1][7] = 0
4264 13:41:23.585047 tx_last_pass[0][1][7] = 0
4265 13:41:23.588329 tx_win_center[0][1][8] = 0
4266 13:41:23.588841 tx_first_pass[0][1][8] = 0
4267 13:41:23.591398 tx_last_pass[0][1][8] = 0
4268 13:41:23.594546 tx_win_center[0][1][9] = 0
4269 13:41:23.594971 tx_first_pass[0][1][9] = 0
4270 13:41:23.597772 tx_last_pass[0][1][9] = 0
4271 13:41:23.601381 tx_win_center[0][1][10] = 0
4272 13:41:23.604654 tx_first_pass[0][1][10] = 0
4273 13:41:23.605155 tx_last_pass[0][1][10] = 0
4274 13:41:23.607924 tx_win_center[0][1][11] = 0
4275 13:41:23.611316 tx_first_pass[0][1][11] = 0
4276 13:41:23.614564 tx_last_pass[0][1][11] = 0
4277 13:41:23.615109 tx_win_center[0][1][12] = 0
4278 13:41:23.618031 tx_first_pass[0][1][12] = 0
4279 13:41:23.621018 tx_last_pass[0][1][12] = 0
4280 13:41:23.624703 tx_win_center[0][1][13] = 0
4281 13:41:23.625282 tx_first_pass[0][1][13] = 0
4282 13:41:23.628005 tx_last_pass[0][1][13] = 0
4283 13:41:23.631512 tx_win_center[0][1][14] = 0
4284 13:41:23.634753 tx_first_pass[0][1][14] = 0
4285 13:41:23.635257 tx_last_pass[0][1][14] = 0
4286 13:41:23.638229 tx_win_center[0][1][15] = 0
4287 13:41:23.641117 tx_first_pass[0][1][15] = 0
4288 13:41:23.644951 tx_last_pass[0][1][15] = 0
4289 13:41:23.645524 tx_win_center[1][0][0] = 0
4290 13:41:23.648211 tx_first_pass[1][0][0] = 0
4291 13:41:23.651567 tx_last_pass[1][0][0] = 0
4292 13:41:23.654935 tx_win_center[1][0][1] = 0
4293 13:41:23.655437 tx_first_pass[1][0][1] = 0
4294 13:41:23.658311 tx_last_pass[1][0][1] = 0
4295 13:41:23.661601 tx_win_center[1][0][2] = 0
4296 13:41:23.662097 tx_first_pass[1][0][2] = 0
4297 13:41:23.665085 tx_last_pass[1][0][2] = 0
4298 13:41:23.668038 tx_win_center[1][0][3] = 0
4299 13:41:23.671498 tx_first_pass[1][0][3] = 0
4300 13:41:23.671923 tx_last_pass[1][0][3] = 0
4301 13:41:23.675264 tx_win_center[1][0][4] = 0
4302 13:41:23.678365 tx_first_pass[1][0][4] = 0
4303 13:41:23.678786 tx_last_pass[1][0][4] = 0
4304 13:41:23.681758 tx_win_center[1][0][5] = 0
4305 13:41:23.684721 tx_first_pass[1][0][5] = 0
4306 13:41:23.688138 tx_last_pass[1][0][5] = 0
4307 13:41:23.688558 tx_win_center[1][0][6] = 0
4308 13:41:23.691500 tx_first_pass[1][0][6] = 0
4309 13:41:23.694951 tx_last_pass[1][0][6] = 0
4310 13:41:23.695374 tx_win_center[1][0][7] = 0
4311 13:41:23.698404 tx_first_pass[1][0][7] = 0
4312 13:41:23.701586 tx_last_pass[1][0][7] = 0
4313 13:41:23.705043 tx_win_center[1][0][8] = 0
4314 13:41:23.705639 tx_first_pass[1][0][8] = 0
4315 13:41:23.708236 tx_last_pass[1][0][8] = 0
4316 13:41:23.711497 tx_win_center[1][0][9] = 0
4317 13:41:23.715149 tx_first_pass[1][0][9] = 0
4318 13:41:23.715569 tx_last_pass[1][0][9] = 0
4319 13:41:23.718287 tx_win_center[1][0][10] = 0
4320 13:41:23.721471 tx_first_pass[1][0][10] = 0
4321 13:41:23.721764 tx_last_pass[1][0][10] = 0
4322 13:41:23.725085 tx_win_center[1][0][11] = 0
4323 13:41:23.728538 tx_first_pass[1][0][11] = 0
4324 13:41:23.731363 tx_last_pass[1][0][11] = 0
4325 13:41:23.731664 tx_win_center[1][0][12] = 0
4326 13:41:23.734987 tx_first_pass[1][0][12] = 0
4327 13:41:23.737977 tx_last_pass[1][0][12] = 0
4328 13:41:23.741452 tx_win_center[1][0][13] = 0
4329 13:41:23.744894 tx_first_pass[1][0][13] = 0
4330 13:41:23.745185 tx_last_pass[1][0][13] = 0
4331 13:41:23.748780 tx_win_center[1][0][14] = 0
4332 13:41:23.751642 tx_first_pass[1][0][14] = 0
4333 13:41:23.751934 tx_last_pass[1][0][14] = 0
4334 13:41:23.754898 tx_win_center[1][0][15] = 0
4335 13:41:23.758382 tx_first_pass[1][0][15] = 0
4336 13:41:23.761594 tx_last_pass[1][0][15] = 0
4337 13:41:23.761901 tx_win_center[1][1][0] = 0
4338 13:41:23.764959 tx_first_pass[1][1][0] = 0
4339 13:41:23.768127 tx_last_pass[1][1][0] = 0
4340 13:41:23.771567 tx_win_center[1][1][1] = 0
4341 13:41:23.771857 tx_first_pass[1][1][1] = 0
4342 13:41:23.775183 tx_last_pass[1][1][1] = 0
4343 13:41:23.778245 tx_win_center[1][1][2] = 0
4344 13:41:23.781743 tx_first_pass[1][1][2] = 0
4345 13:41:23.782122 tx_last_pass[1][1][2] = 0
4346 13:41:23.785516 tx_win_center[1][1][3] = 0
4347 13:41:23.788527 tx_first_pass[1][1][3] = 0
4348 13:41:23.788903 tx_last_pass[1][1][3] = 0
4349 13:41:23.791818 tx_win_center[1][1][4] = 0
4350 13:41:23.795016 tx_first_pass[1][1][4] = 0
4351 13:41:23.798937 tx_last_pass[1][1][4] = 0
4352 13:41:23.799374 tx_win_center[1][1][5] = 0
4353 13:41:23.801693 tx_first_pass[1][1][5] = 0
4354 13:41:23.805131 tx_last_pass[1][1][5] = 0
4355 13:41:23.805571 tx_win_center[1][1][6] = 0
4356 13:41:23.808996 tx_first_pass[1][1][6] = 0
4357 13:41:23.812065 tx_last_pass[1][1][6] = 0
4358 13:41:23.815392 tx_win_center[1][1][7] = 0
4359 13:41:23.815798 tx_first_pass[1][1][7] = 0
4360 13:41:23.818431 tx_last_pass[1][1][7] = 0
4361 13:41:23.821732 tx_win_center[1][1][8] = 0
4362 13:41:23.822124 tx_first_pass[1][1][8] = 0
4363 13:41:23.825217 tx_last_pass[1][1][8] = 0
4364 13:41:23.828787 tx_win_center[1][1][9] = 0
4365 13:41:23.832490 tx_first_pass[1][1][9] = 0
4366 13:41:23.833015 tx_last_pass[1][1][9] = 0
4367 13:41:23.835196 tx_win_center[1][1][10] = 0
4368 13:41:23.838684 tx_first_pass[1][1][10] = 0
4369 13:41:23.841919 tx_last_pass[1][1][10] = 0
4370 13:41:23.842320 tx_win_center[1][1][11] = 0
4371 13:41:23.845221 tx_first_pass[1][1][11] = 0
4372 13:41:23.848856 tx_last_pass[1][1][11] = 0
4373 13:41:23.851917 tx_win_center[1][1][12] = 0
4374 13:41:23.852347 tx_first_pass[1][1][12] = 0
4375 13:41:23.855331 tx_last_pass[1][1][12] = 0
4376 13:41:23.858753 tx_win_center[1][1][13] = 0
4377 13:41:23.861871 tx_first_pass[1][1][13] = 0
4378 13:41:23.862308 tx_last_pass[1][1][13] = 0
4379 13:41:23.865407 tx_win_center[1][1][14] = 0
4380 13:41:23.868963 tx_first_pass[1][1][14] = 0
4381 13:41:23.872188 tx_last_pass[1][1][14] = 0
4382 13:41:23.872570 tx_win_center[1][1][15] = 0
4383 13:41:23.875915 tx_first_pass[1][1][15] = 0
4384 13:41:23.879097 tx_last_pass[1][1][15] = 0
4385 13:41:23.879563 dump params rx window
4386 13:41:23.882519 rx_firspass[0][0][0] = 0
4387 13:41:23.885983 rx_lastpass[0][0][0] = 0
4388 13:41:23.886446 rx_firspass[0][0][1] = 0
4389 13:41:23.889138 rx_lastpass[0][0][1] = 0
4390 13:41:23.894172 rx_firspass[0][0][2] = 0
4391 13:41:23.894686 rx_lastpass[0][0][2] = 0
4392 13:41:23.895206 rx_firspass[0][0][3] = 0
4393 13:41:23.898948 rx_lastpass[0][0][3] = 0
4394 13:41:23.901951 rx_firspass[0][0][4] = 0
4395 13:41:23.902253 rx_lastpass[0][0][4] = 0
4396 13:41:23.905175 rx_firspass[0][0][5] = 0
4397 13:41:23.908571 rx_lastpass[0][0][5] = 0
4398 13:41:23.908786 rx_firspass[0][0][6] = 0
4399 13:41:23.912102 rx_lastpass[0][0][6] = 0
4400 13:41:23.916036 rx_firspass[0][0][7] = 0
4401 13:41:23.916267 rx_lastpass[0][0][7] = 0
4402 13:41:23.918413 rx_firspass[0][0][8] = 0
4403 13:41:23.921828 rx_lastpass[0][0][8] = 0
4404 13:41:23.922032 rx_firspass[0][0][9] = 0
4405 13:41:23.925137 rx_lastpass[0][0][9] = 0
4406 13:41:23.928873 rx_firspass[0][0][10] = 0
4407 13:41:23.932716 rx_lastpass[0][0][10] = 0
4408 13:41:23.933096 rx_firspass[0][0][11] = 0
4409 13:41:23.935708 rx_lastpass[0][0][11] = 0
4410 13:41:23.938528 rx_firspass[0][0][12] = 0
4411 13:41:23.938915 rx_lastpass[0][0][12] = 0
4412 13:41:23.941862 rx_firspass[0][0][13] = 0
4413 13:41:23.945437 rx_lastpass[0][0][13] = 0
4414 13:41:23.948929 rx_firspass[0][0][14] = 0
4415 13:41:23.949506 rx_lastpass[0][0][14] = 0
4416 13:41:23.952306 rx_firspass[0][0][15] = 0
4417 13:41:23.955548 rx_lastpass[0][0][15] = 0
4418 13:41:23.956050 rx_firspass[0][1][0] = 0
4419 13:41:23.958717 rx_lastpass[0][1][0] = 0
4420 13:41:23.961961 rx_firspass[0][1][1] = 0
4421 13:41:23.962382 rx_lastpass[0][1][1] = 0
4422 13:41:23.964974 rx_firspass[0][1][2] = 0
4423 13:41:23.968683 rx_lastpass[0][1][2] = 0
4424 13:41:23.969437 rx_firspass[0][1][3] = 0
4425 13:41:23.971893 rx_lastpass[0][1][3] = 0
4426 13:41:23.975044 rx_firspass[0][1][4] = 0
4427 13:41:23.978548 rx_lastpass[0][1][4] = 0
4428 13:41:23.979055 rx_firspass[0][1][5] = 0
4429 13:41:23.982480 rx_lastpass[0][1][5] = 0
4430 13:41:23.985861 rx_firspass[0][1][6] = 0
4431 13:41:23.986367 rx_lastpass[0][1][6] = 0
4432 13:41:23.989126 rx_firspass[0][1][7] = 0
4433 13:41:23.991820 rx_lastpass[0][1][7] = 0
4434 13:41:23.992348 rx_firspass[0][1][8] = 0
4435 13:41:23.995658 rx_lastpass[0][1][8] = 0
4436 13:41:23.998884 rx_firspass[0][1][9] = 0
4437 13:41:23.999391 rx_lastpass[0][1][9] = 0
4438 13:41:24.002025 rx_firspass[0][1][10] = 0
4439 13:41:24.005388 rx_lastpass[0][1][10] = 0
4440 13:41:24.008929 rx_firspass[0][1][11] = 0
4441 13:41:24.009527 rx_lastpass[0][1][11] = 0
4442 13:41:24.012380 rx_firspass[0][1][12] = 0
4443 13:41:24.015320 rx_lastpass[0][1][12] = 0
4444 13:41:24.015819 rx_firspass[0][1][13] = 0
4445 13:41:24.018508 rx_lastpass[0][1][13] = 0
4446 13:41:24.022295 rx_firspass[0][1][14] = 0
4447 13:41:24.022807 rx_lastpass[0][1][14] = 0
4448 13:41:24.025282 rx_firspass[0][1][15] = 0
4449 13:41:24.028858 rx_lastpass[0][1][15] = 0
4450 13:41:24.031970 rx_firspass[1][0][0] = 0
4451 13:41:24.032391 rx_lastpass[1][0][0] = 0
4452 13:41:24.035265 rx_firspass[1][0][1] = 0
4453 13:41:24.038827 rx_lastpass[1][0][1] = 0
4454 13:41:24.039265 rx_firspass[1][0][2] = 0
4455 13:41:24.041911 rx_lastpass[1][0][2] = 0
4456 13:41:24.045331 rx_firspass[1][0][3] = 0
4457 13:41:24.045827 rx_lastpass[1][0][3] = 0
4458 13:41:24.048479 rx_firspass[1][0][4] = 0
4459 13:41:24.051852 rx_lastpass[1][0][4] = 0
4460 13:41:24.052274 rx_firspass[1][0][5] = 0
4461 13:41:24.055599 rx_lastpass[1][0][5] = 0
4462 13:41:24.058635 rx_firspass[1][0][6] = 0
4463 13:41:24.059057 rx_lastpass[1][0][6] = 0
4464 13:41:24.061929 rx_firspass[1][0][7] = 0
4465 13:41:24.065548 rx_lastpass[1][0][7] = 0
4466 13:41:24.069052 rx_firspass[1][0][8] = 0
4467 13:41:24.069608 rx_lastpass[1][0][8] = 0
4468 13:41:24.072183 rx_firspass[1][0][9] = 0
4469 13:41:24.075510 rx_lastpass[1][0][9] = 0
4470 13:41:24.076009 rx_firspass[1][0][10] = 0
4471 13:41:24.079246 rx_lastpass[1][0][10] = 0
4472 13:41:24.082045 rx_firspass[1][0][11] = 0
4473 13:41:24.082465 rx_lastpass[1][0][11] = 0
4474 13:41:24.085328 rx_firspass[1][0][12] = 0
4475 13:41:24.088669 rx_lastpass[1][0][12] = 0
4476 13:41:24.092321 rx_firspass[1][0][13] = 0
4477 13:41:24.092824 rx_lastpass[1][0][13] = 0
4478 13:41:24.095711 rx_firspass[1][0][14] = 0
4479 13:41:24.098872 rx_lastpass[1][0][14] = 0
4480 13:41:24.099374 rx_firspass[1][0][15] = 0
4481 13:41:24.102127 rx_lastpass[1][0][15] = 0
4482 13:41:24.105740 rx_firspass[1][1][0] = 0
4483 13:41:24.106248 rx_lastpass[1][1][0] = 0
4484 13:41:24.108854 rx_firspass[1][1][1] = 0
4485 13:41:24.112143 rx_lastpass[1][1][1] = 0
4486 13:41:24.115746 rx_firspass[1][1][2] = 0
4487 13:41:24.116251 rx_lastpass[1][1][2] = 0
4488 13:41:24.118836 rx_firspass[1][1][3] = 0
4489 13:41:24.122209 rx_lastpass[1][1][3] = 0
4490 13:41:24.122716 rx_firspass[1][1][4] = 0
4491 13:41:24.125331 rx_lastpass[1][1][4] = 0
4492 13:41:24.128721 rx_firspass[1][1][5] = 0
4493 13:41:24.129221 rx_lastpass[1][1][5] = 0
4494 13:41:24.131886 rx_firspass[1][1][6] = 0
4495 13:41:24.135318 rx_lastpass[1][1][6] = 0
4496 13:41:24.135742 rx_firspass[1][1][7] = 0
4497 13:41:24.138853 rx_lastpass[1][1][7] = 0
4498 13:41:24.142160 rx_firspass[1][1][8] = 0
4499 13:41:24.142749 rx_lastpass[1][1][8] = 0
4500 13:41:24.145489 rx_firspass[1][1][9] = 0
4501 13:41:24.149267 rx_lastpass[1][1][9] = 0
4502 13:41:24.149776 rx_firspass[1][1][10] = 0
4503 13:41:24.152131 rx_lastpass[1][1][10] = 0
4504 13:41:24.156236 rx_firspass[1][1][11] = 0
4505 13:41:24.159155 rx_lastpass[1][1][11] = 0
4506 13:41:24.159578 rx_firspass[1][1][12] = 0
4507 13:41:24.162089 rx_lastpass[1][1][12] = 0
4508 13:41:24.165686 rx_firspass[1][1][13] = 0
4509 13:41:24.166109 rx_lastpass[1][1][13] = 0
4510 13:41:24.169113 rx_firspass[1][1][14] = 0
4511 13:41:24.172213 rx_lastpass[1][1][14] = 0
4512 13:41:24.175622 rx_firspass[1][1][15] = 0
4513 13:41:24.176125 rx_lastpass[1][1][15] = 0
4514 13:41:24.179098 dump params clk_delay
4515 13:41:24.179597 clk_delay[0] = 0
4516 13:41:24.182015 clk_delay[1] = 0
4517 13:41:24.182438 dump params dqs_delay
4518 13:41:24.185469 dqs_delay[0][0] = 0
4519 13:41:24.188820 dqs_delay[0][1] = 0
4520 13:41:24.189369 dqs_delay[1][0] = 0
4521 13:41:24.192531 dqs_delay[1][1] = 0
4522 13:41:24.195759 dump params delay_cell_unit = 762
4523 13:41:24.196260 dump source = 0x0
4524 13:41:24.198949 dump params frequency:800
4525 13:41:24.199451 dump params rank number:2
4526 13:41:24.199787
4527 13:41:24.202343 dump params write leveling
4528 13:41:24.205272 write leveling[0][0][0] = 0x0
4529 13:41:24.208919 write leveling[0][0][1] = 0x0
4530 13:41:24.212146 write leveling[0][1][0] = 0x0
4531 13:41:24.212572 write leveling[0][1][1] = 0x0
4532 13:41:24.215746 write leveling[1][0][0] = 0x0
4533 13:41:24.219184 write leveling[1][0][1] = 0x0
4534 13:41:24.222196 write leveling[1][1][0] = 0x0
4535 13:41:24.225595 write leveling[1][1][1] = 0x0
4536 13:41:24.226023 dump params cbt_cs
4537 13:41:24.228686 cbt_cs[0][0] = 0x0
4538 13:41:24.229044 cbt_cs[0][1] = 0x0
4539 13:41:24.232412 cbt_cs[1][0] = 0x0
4540 13:41:24.232919 cbt_cs[1][1] = 0x0
4541 13:41:24.235550 dump params cbt_mr12
4542 13:41:24.235974 cbt_mr12[0][0] = 0x0
4543 13:41:24.238610 cbt_mr12[0][1] = 0x0
4544 13:41:24.239033 cbt_mr12[1][0] = 0x0
4545 13:41:24.241907 cbt_mr12[1][1] = 0x0
4546 13:41:24.245640 dump params tx window
4547 13:41:24.246136 tx_center_min[0][0][0] = 0
4548 13:41:24.249252 tx_center_max[0][0][0] = 0
4549 13:41:24.252092 tx_center_min[0][0][1] = 0
4550 13:41:24.256054 tx_center_max[0][0][1] = 0
4551 13:41:24.256561 tx_center_min[0][1][0] = 0
4552 13:41:24.258755 tx_center_max[0][1][0] = 0
4553 13:41:24.262607 tx_center_min[0][1][1] = 0
4554 13:41:24.265730 tx_center_max[0][1][1] = 0
4555 13:41:24.266239 tx_center_min[1][0][0] = 0
4556 13:41:24.269177 tx_center_max[1][0][0] = 0
4557 13:41:24.272437 tx_center_min[1][0][1] = 0
4558 13:41:24.272945 tx_center_max[1][0][1] = 0
4559 13:41:24.275611 tx_center_min[1][1][0] = 0
4560 13:41:24.279022 tx_center_max[1][1][0] = 0
4561 13:41:24.282516 tx_center_min[1][1][1] = 0
4562 13:41:24.283023 tx_center_max[1][1][1] = 0
4563 13:41:24.285627 dump params tx window
4564 13:41:24.289406 tx_win_center[0][0][0] = 0
4565 13:41:24.289947 tx_first_pass[0][0][0] = 0
4566 13:41:24.292072 tx_last_pass[0][0][0] = 0
4567 13:41:24.295287 tx_win_center[0][0][1] = 0
4568 13:41:24.299073 tx_first_pass[0][0][1] = 0
4569 13:41:24.299498 tx_last_pass[0][0][1] = 0
4570 13:41:24.302228 tx_win_center[0][0][2] = 0
4571 13:41:24.305760 tx_first_pass[0][0][2] = 0
4572 13:41:24.306265 tx_last_pass[0][0][2] = 0
4573 13:41:24.308943 tx_win_center[0][0][3] = 0
4574 13:41:24.312091 tx_first_pass[0][0][3] = 0
4575 13:41:24.315776 tx_last_pass[0][0][3] = 0
4576 13:41:24.316280 tx_win_center[0][0][4] = 0
4577 13:41:24.319014 tx_first_pass[0][0][4] = 0
4578 13:41:24.322058 tx_last_pass[0][0][4] = 0
4579 13:41:24.325915 tx_win_center[0][0][5] = 0
4580 13:41:24.326419 tx_first_pass[0][0][5] = 0
4581 13:41:24.329145 tx_last_pass[0][0][5] = 0
4582 13:41:24.332191 tx_win_center[0][0][6] = 0
4583 13:41:24.332616 tx_first_pass[0][0][6] = 0
4584 13:41:24.335371 tx_last_pass[0][0][6] = 0
4585 13:41:24.339430 tx_win_center[0][0][7] = 0
4586 13:41:24.342572 tx_first_pass[0][0][7] = 0
4587 13:41:24.343056 tx_last_pass[0][0][7] = 0
4588 13:41:24.346145 tx_win_center[0][0][8] = 0
4589 13:41:24.349552 tx_first_pass[0][0][8] = 0
4590 13:41:24.350053 tx_last_pass[0][0][8] = 0
4591 13:41:24.352304 tx_win_center[0][0][9] = 0
4592 13:41:24.355701 tx_first_pass[0][0][9] = 0
4593 13:41:24.358952 tx_last_pass[0][0][9] = 0
4594 13:41:24.359477 tx_win_center[0][0][10] = 0
4595 13:41:24.362398 tx_first_pass[0][0][10] = 0
4596 13:41:24.366134 tx_last_pass[0][0][10] = 0
4597 13:41:24.369204 tx_win_center[0][0][11] = 0
4598 13:41:24.369772 tx_first_pass[0][0][11] = 0
4599 13:41:24.372070 tx_last_pass[0][0][11] = 0
4600 13:41:24.375689 tx_win_center[0][0][12] = 0
4601 13:41:24.379348 tx_first_pass[0][0][12] = 0
4602 13:41:24.379773 tx_last_pass[0][0][12] = 0
4603 13:41:24.382432 tx_win_center[0][0][13] = 0
4604 13:41:24.385971 tx_first_pass[0][0][13] = 0
4605 13:41:24.389000 tx_last_pass[0][0][13] = 0
4606 13:41:24.389548 tx_win_center[0][0][14] = 0
4607 13:41:24.392772 tx_first_pass[0][0][14] = 0
4608 13:41:24.396074 tx_last_pass[0][0][14] = 0
4609 13:41:24.399077 tx_win_center[0][0][15] = 0
4610 13:41:24.399583 tx_first_pass[0][0][15] = 0
4611 13:41:24.402725 tx_last_pass[0][0][15] = 0
4612 13:41:24.405973 tx_win_center[0][1][0] = 0
4613 13:41:24.409197 tx_first_pass[0][1][0] = 0
4614 13:41:24.409677 tx_last_pass[0][1][0] = 0
4615 13:41:24.412564 tx_win_center[0][1][1] = 0
4616 13:41:24.416102 tx_first_pass[0][1][1] = 0
4617 13:41:24.416610 tx_last_pass[0][1][1] = 0
4618 13:41:24.419032 tx_win_center[0][1][2] = 0
4619 13:41:24.423010 tx_first_pass[0][1][2] = 0
4620 13:41:24.425712 tx_last_pass[0][1][2] = 0
4621 13:41:24.426219 tx_win_center[0][1][3] = 0
4622 13:41:24.429203 tx_first_pass[0][1][3] = 0
4623 13:41:24.432270 tx_last_pass[0][1][3] = 0
4624 13:41:24.435505 tx_win_center[0][1][4] = 0
4625 13:41:24.435932 tx_first_pass[0][1][4] = 0
4626 13:41:24.438925 tx_last_pass[0][1][4] = 0
4627 13:41:24.442524 tx_win_center[0][1][5] = 0
4628 13:41:24.442947 tx_first_pass[0][1][5] = 0
4629 13:41:24.445903 tx_last_pass[0][1][5] = 0
4630 13:41:24.449270 tx_win_center[0][1][6] = 0
4631 13:41:24.452306 tx_first_pass[0][1][6] = 0
4632 13:41:24.452801 tx_last_pass[0][1][6] = 0
4633 13:41:24.455813 tx_win_center[0][1][7] = 0
4634 13:41:24.458923 tx_first_pass[0][1][7] = 0
4635 13:41:24.462425 tx_last_pass[0][1][7] = 0
4636 13:41:24.462940 tx_win_center[0][1][8] = 0
4637 13:41:24.465890 tx_first_pass[0][1][8] = 0
4638 13:41:24.468938 tx_last_pass[0][1][8] = 0
4639 13:41:24.469499 tx_win_center[0][1][9] = 0
4640 13:41:24.472214 tx_first_pass[0][1][9] = 0
4641 13:41:24.476106 tx_last_pass[0][1][9] = 0
4642 13:41:24.479218 tx_win_center[0][1][10] = 0
4643 13:41:24.479728 tx_first_pass[0][1][10] = 0
4644 13:41:24.482456 tx_last_pass[0][1][10] = 0
4645 13:41:24.486137 tx_win_center[0][1][11] = 0
4646 13:41:24.488728 tx_first_pass[0][1][11] = 0
4647 13:41:24.489152 tx_last_pass[0][1][11] = 0
4648 13:41:24.492593 tx_win_center[0][1][12] = 0
4649 13:41:24.495660 tx_first_pass[0][1][12] = 0
4650 13:41:24.499100 tx_last_pass[0][1][12] = 0
4651 13:41:24.499609 tx_win_center[0][1][13] = 0
4652 13:41:24.502023 tx_first_pass[0][1][13] = 0
4653 13:41:24.505503 tx_last_pass[0][1][13] = 0
4654 13:41:24.508820 tx_win_center[0][1][14] = 0
4655 13:41:24.509273 tx_first_pass[0][1][14] = 0
4656 13:41:24.512128 tx_last_pass[0][1][14] = 0
4657 13:41:24.515310 tx_win_center[0][1][15] = 0
4658 13:41:24.518936 tx_first_pass[0][1][15] = 0
4659 13:41:24.519442 tx_last_pass[0][1][15] = 0
4660 13:41:24.522128 tx_win_center[1][0][0] = 0
4661 13:41:24.525693 tx_first_pass[1][0][0] = 0
4662 13:41:24.529407 tx_last_pass[1][0][0] = 0
4663 13:41:24.529915 tx_win_center[1][0][1] = 0
4664 13:41:24.532706 tx_first_pass[1][0][1] = 0
4665 13:41:24.535786 tx_last_pass[1][0][1] = 0
4666 13:41:24.536294 tx_win_center[1][0][2] = 0
4667 13:41:24.538964 tx_first_pass[1][0][2] = 0
4668 13:41:24.542094 tx_last_pass[1][0][2] = 0
4669 13:41:24.545802 tx_win_center[1][0][3] = 0
4670 13:41:24.546225 tx_first_pass[1][0][3] = 0
4671 13:41:24.548832 tx_last_pass[1][0][3] = 0
4672 13:41:24.552273 tx_win_center[1][0][4] = 0
4673 13:41:24.555377 tx_first_pass[1][0][4] = 0
4674 13:41:24.555804 tx_last_pass[1][0][4] = 0
4675 13:41:24.558667 tx_win_center[1][0][5] = 0
4676 13:41:24.561991 tx_first_pass[1][0][5] = 0
4677 13:41:24.562417 tx_last_pass[1][0][5] = 0
4678 13:41:24.565500 tx_win_center[1][0][6] = 0
4679 13:41:24.568414 tx_first_pass[1][0][6] = 0
4680 13:41:24.572400 tx_last_pass[1][0][6] = 0
4681 13:41:24.572905 tx_win_center[1][0][7] = 0
4682 13:41:24.575066 tx_first_pass[1][0][7] = 0
4683 13:41:24.578410 tx_last_pass[1][0][7] = 0
4684 13:41:24.581944 tx_win_center[1][0][8] = 0
4685 13:41:24.582477 tx_first_pass[1][0][8] = 0
4686 13:41:24.585323 tx_last_pass[1][0][8] = 0
4687 13:41:24.588768 tx_win_center[1][0][9] = 0
4688 13:41:24.589304 tx_first_pass[1][0][9] = 0
4689 13:41:24.592474 tx_last_pass[1][0][9] = 0
4690 13:41:24.595283 tx_win_center[1][0][10] = 0
4691 13:41:24.598600 tx_first_pass[1][0][10] = 0
4692 13:41:24.599104 tx_last_pass[1][0][10] = 0
4693 13:41:24.602305 tx_win_center[1][0][11] = 0
4694 13:41:24.605309 tx_first_pass[1][0][11] = 0
4695 13:41:24.608357 tx_last_pass[1][0][11] = 0
4696 13:41:24.608789 tx_win_center[1][0][12] = 0
4697 13:41:24.611863 tx_first_pass[1][0][12] = 0
4698 13:41:24.615846 tx_last_pass[1][0][12] = 0
4699 13:41:24.618388 tx_win_center[1][0][13] = 0
4700 13:41:24.618811 tx_first_pass[1][0][13] = 0
4701 13:41:24.622192 tx_last_pass[1][0][13] = 0
4702 13:41:24.625628 tx_win_center[1][0][14] = 0
4703 13:41:24.629349 tx_first_pass[1][0][14] = 0
4704 13:41:24.629856 tx_last_pass[1][0][14] = 0
4705 13:41:24.632309 tx_win_center[1][0][15] = 0
4706 13:41:24.635427 tx_first_pass[1][0][15] = 0
4707 13:41:24.639078 tx_last_pass[1][0][15] = 0
4708 13:41:24.639589 tx_win_center[1][1][0] = 0
4709 13:41:24.642377 tx_first_pass[1][1][0] = 0
4710 13:41:24.645432 tx_last_pass[1][1][0] = 0
4711 13:41:24.648744 tx_win_center[1][1][1] = 0
4712 13:41:24.649170 tx_first_pass[1][1][1] = 0
4713 13:41:24.652151 tx_last_pass[1][1][1] = 0
4714 13:41:24.655346 tx_win_center[1][1][2] = 0
4715 13:41:24.655770 tx_first_pass[1][1][2] = 0
4716 13:41:24.658756 tx_last_pass[1][1][2] = 0
4717 13:41:24.662409 tx_win_center[1][1][3] = 0
4718 13:41:24.665614 tx_first_pass[1][1][3] = 0
4719 13:41:24.666123 tx_last_pass[1][1][3] = 0
4720 13:41:24.668528 tx_win_center[1][1][4] = 0
4721 13:41:24.672498 tx_first_pass[1][1][4] = 0
4722 13:41:24.675601 tx_last_pass[1][1][4] = 0
4723 13:41:24.676024 tx_win_center[1][1][5] = 0
4724 13:41:24.678792 tx_first_pass[1][1][5] = 0
4725 13:41:24.682466 tx_last_pass[1][1][5] = 0
4726 13:41:24.682977 tx_win_center[1][1][6] = 0
4727 13:41:24.685871 tx_first_pass[1][1][6] = 0
4728 13:41:24.688788 tx_last_pass[1][1][6] = 0
4729 13:41:24.692489 tx_win_center[1][1][7] = 0
4730 13:41:24.692996 tx_first_pass[1][1][7] = 0
4731 13:41:24.695593 tx_last_pass[1][1][7] = 0
4732 13:41:24.699025 tx_win_center[1][1][8] = 0
4733 13:41:24.699535 tx_first_pass[1][1][8] = 0
4734 13:41:24.702301 tx_last_pass[1][1][8] = 0
4735 13:41:24.705688 tx_win_center[1][1][9] = 0
4736 13:41:24.709107 tx_first_pass[1][1][9] = 0
4737 13:41:24.709652 tx_last_pass[1][1][9] = 0
4738 13:41:24.712137 tx_win_center[1][1][10] = 0
4739 13:41:24.716250 tx_first_pass[1][1][10] = 0
4740 13:41:24.718927 tx_last_pass[1][1][10] = 0
4741 13:41:24.719355 tx_win_center[1][1][11] = 0
4742 13:41:24.722517 tx_first_pass[1][1][11] = 0
4743 13:41:24.725588 tx_last_pass[1][1][11] = 0
4744 13:41:24.729019 tx_win_center[1][1][12] = 0
4745 13:41:24.729585 tx_first_pass[1][1][12] = 0
4746 13:41:24.732288 tx_last_pass[1][1][12] = 0
4747 13:41:24.735765 tx_win_center[1][1][13] = 0
4748 13:41:24.739159 tx_first_pass[1][1][13] = 0
4749 13:41:24.739669 tx_last_pass[1][1][13] = 0
4750 13:41:24.742691 tx_win_center[1][1][14] = 0
4751 13:41:24.746188 tx_first_pass[1][1][14] = 0
4752 13:41:24.748739 tx_last_pass[1][1][14] = 0
4753 13:41:24.749162 tx_win_center[1][1][15] = 0
4754 13:41:24.752054 tx_first_pass[1][1][15] = 0
4755 13:41:24.755613 tx_last_pass[1][1][15] = 0
4756 13:41:24.756129 dump params rx window
4757 13:41:24.758777 rx_firspass[0][0][0] = 0
4758 13:41:24.762375 rx_lastpass[0][0][0] = 0
4759 13:41:24.762878 rx_firspass[0][0][1] = 0
4760 13:41:24.765883 rx_lastpass[0][0][1] = 0
4761 13:41:24.768979 rx_firspass[0][0][2] = 0
4762 13:41:24.769435 rx_lastpass[0][0][2] = 0
4763 13:41:24.772296 rx_firspass[0][0][3] = 0
4764 13:41:24.775974 rx_lastpass[0][0][3] = 0
4765 13:41:24.779131 rx_firspass[0][0][4] = 0
4766 13:41:24.779554 rx_lastpass[0][0][4] = 0
4767 13:41:24.782445 rx_firspass[0][0][5] = 0
4768 13:41:24.785970 rx_lastpass[0][0][5] = 0
4769 13:41:24.786395 rx_firspass[0][0][6] = 0
4770 13:41:24.789218 rx_lastpass[0][0][6] = 0
4771 13:41:24.792799 rx_firspass[0][0][7] = 0
4772 13:41:24.793357 rx_lastpass[0][0][7] = 0
4773 13:41:24.795775 rx_firspass[0][0][8] = 0
4774 13:41:24.799340 rx_lastpass[0][0][8] = 0
4775 13:41:24.799985 rx_firspass[0][0][9] = 0
4776 13:41:24.802685 rx_lastpass[0][0][9] = 0
4777 13:41:24.805950 rx_firspass[0][0][10] = 0
4778 13:41:24.806456 rx_lastpass[0][0][10] = 0
4779 13:41:24.809304 rx_firspass[0][0][11] = 0
4780 13:41:24.812595 rx_lastpass[0][0][11] = 0
4781 13:41:24.815622 rx_firspass[0][0][12] = 0
4782 13:41:24.816042 rx_lastpass[0][0][12] = 0
4783 13:41:24.819310 rx_firspass[0][0][13] = 0
4784 13:41:24.822571 rx_lastpass[0][0][13] = 0
4785 13:41:24.823084 rx_firspass[0][0][14] = 0
4786 13:41:24.825825 rx_lastpass[0][0][14] = 0
4787 13:41:24.829436 rx_firspass[0][0][15] = 0
4788 13:41:24.832646 rx_lastpass[0][0][15] = 0
4789 13:41:24.833251 rx_firspass[0][1][0] = 0
4790 13:41:24.835832 rx_lastpass[0][1][0] = 0
4791 13:41:24.839507 rx_firspass[0][1][1] = 0
4792 13:41:24.840014 rx_lastpass[0][1][1] = 0
4793 13:41:24.842821 rx_firspass[0][1][2] = 0
4794 13:41:24.846087 rx_lastpass[0][1][2] = 0
4795 13:41:24.846507 rx_firspass[0][1][3] = 0
4796 13:41:24.849176 rx_lastpass[0][1][3] = 0
4797 13:41:24.852405 rx_firspass[0][1][4] = 0
4798 13:41:24.852866 rx_lastpass[0][1][4] = 0
4799 13:41:24.855851 rx_firspass[0][1][5] = 0
4800 13:41:24.859414 rx_lastpass[0][1][5] = 0
4801 13:41:24.860021 rx_firspass[0][1][6] = 0
4802 13:41:24.862467 rx_lastpass[0][1][6] = 0
4803 13:41:24.865577 rx_firspass[0][1][7] = 0
4804 13:41:24.866033 rx_lastpass[0][1][7] = 0
4805 13:41:24.869138 rx_firspass[0][1][8] = 0
4806 13:41:24.872464 rx_lastpass[0][1][8] = 0
4807 13:41:24.875771 rx_firspass[0][1][9] = 0
4808 13:41:24.876335 rx_lastpass[0][1][9] = 0
4809 13:41:24.879078 rx_firspass[0][1][10] = 0
4810 13:41:24.882265 rx_lastpass[0][1][10] = 0
4811 13:41:24.882717 rx_firspass[0][1][11] = 0
4812 13:41:24.885739 rx_lastpass[0][1][11] = 0
4813 13:41:24.889176 rx_firspass[0][1][12] = 0
4814 13:41:24.892474 rx_lastpass[0][1][12] = 0
4815 13:41:24.892896 rx_firspass[0][1][13] = 0
4816 13:41:24.895580 rx_lastpass[0][1][13] = 0
4817 13:41:24.899229 rx_firspass[0][1][14] = 0
4818 13:41:24.899667 rx_lastpass[0][1][14] = 0
4819 13:41:24.902618 rx_firspass[0][1][15] = 0
4820 13:41:24.905586 rx_lastpass[0][1][15] = 0
4821 13:41:24.905967 rx_firspass[1][0][0] = 0
4822 13:41:24.908877 rx_lastpass[1][0][0] = 0
4823 13:41:24.912462 rx_firspass[1][0][1] = 0
4824 13:41:24.915696 rx_lastpass[1][0][1] = 0
4825 13:41:24.916087 rx_firspass[1][0][2] = 0
4826 13:41:24.918802 rx_lastpass[1][0][2] = 0
4827 13:41:24.923044 rx_firspass[1][0][3] = 0
4828 13:41:24.923434 rx_lastpass[1][0][3] = 0
4829 13:41:24.925592 rx_firspass[1][0][4] = 0
4830 13:41:24.929208 rx_lastpass[1][0][4] = 0
4831 13:41:24.929618 rx_firspass[1][0][5] = 0
4832 13:41:24.932122 rx_lastpass[1][0][5] = 0
4833 13:41:24.935960 rx_firspass[1][0][6] = 0
4834 13:41:24.936359 rx_lastpass[1][0][6] = 0
4835 13:41:24.939281 rx_firspass[1][0][7] = 0
4836 13:41:24.942279 rx_lastpass[1][0][7] = 0
4837 13:41:24.942692 rx_firspass[1][0][8] = 0
4838 13:41:24.945937 rx_lastpass[1][0][8] = 0
4839 13:41:24.949389 rx_firspass[1][0][9] = 0
4840 13:41:24.952364 rx_lastpass[1][0][9] = 0
4841 13:41:24.952802 rx_firspass[1][0][10] = 0
4842 13:41:24.956064 rx_lastpass[1][0][10] = 0
4843 13:41:24.959181 rx_firspass[1][0][11] = 0
4844 13:41:24.959702 rx_lastpass[1][0][11] = 0
4845 13:41:24.962426 rx_firspass[1][0][12] = 0
4846 13:41:24.965990 rx_lastpass[1][0][12] = 0
4847 13:41:24.966519 rx_firspass[1][0][13] = 0
4848 13:41:24.969310 rx_lastpass[1][0][13] = 0
4849 13:41:24.972544 rx_firspass[1][0][14] = 0
4850 13:41:24.976045 rx_lastpass[1][0][14] = 0
4851 13:41:24.976485 rx_firspass[1][0][15] = 0
4852 13:41:24.979282 rx_lastpass[1][0][15] = 0
4853 13:41:24.982992 rx_firspass[1][1][0] = 0
4854 13:41:24.983525 rx_lastpass[1][1][0] = 0
4855 13:41:24.986528 rx_firspass[1][1][1] = 0
4856 13:41:24.989593 rx_lastpass[1][1][1] = 0
4857 13:41:24.990023 rx_firspass[1][1][2] = 0
4858 13:41:24.992593 rx_lastpass[1][1][2] = 0
4859 13:41:24.995745 rx_firspass[1][1][3] = 0
4860 13:41:24.996324 rx_lastpass[1][1][3] = 0
4861 13:41:24.999324 rx_firspass[1][1][4] = 0
4862 13:41:25.002840 rx_lastpass[1][1][4] = 0
4863 13:41:25.003264 rx_firspass[1][1][5] = 0
4864 13:41:25.005781 rx_lastpass[1][1][5] = 0
4865 13:41:25.009161 rx_firspass[1][1][6] = 0
4866 13:41:25.012803 rx_lastpass[1][1][6] = 0
4867 13:41:25.013458 rx_firspass[1][1][7] = 0
4868 13:41:25.015780 rx_lastpass[1][1][7] = 0
4869 13:41:25.019133 rx_firspass[1][1][8] = 0
4870 13:41:25.019561 rx_lastpass[1][1][8] = 0
4871 13:41:25.022727 rx_firspass[1][1][9] = 0
4872 13:41:25.025789 rx_lastpass[1][1][9] = 0
4873 13:41:25.026014 rx_firspass[1][1][10] = 0
4874 13:41:25.028859 rx_lastpass[1][1][10] = 0
4875 13:41:25.032050 rx_firspass[1][1][11] = 0
4876 13:41:25.035305 rx_lastpass[1][1][11] = 0
4877 13:41:25.035381 rx_firspass[1][1][12] = 0
4878 13:41:25.038774 rx_lastpass[1][1][12] = 0
4879 13:41:25.042003 rx_firspass[1][1][13] = 0
4880 13:41:25.042079 rx_lastpass[1][1][13] = 0
4881 13:41:25.046086 rx_firspass[1][1][14] = 0
4882 13:41:25.049011 rx_lastpass[1][1][14] = 0
4883 13:41:25.049151 rx_firspass[1][1][15] = 0
4884 13:41:25.052503 rx_lastpass[1][1][15] = 0
4885 13:41:25.055606 dump params clk_delay
4886 13:41:25.055745 clk_delay[0] = 0
4887 13:41:25.059128 clk_delay[1] = 0
4888 13:41:25.059269 dump params dqs_delay
4889 13:41:25.062752 dqs_delay[0][0] = 0
4890 13:41:25.062893 dqs_delay[0][1] = 0
4891 13:41:25.065255 dqs_delay[1][0] = 0
4892 13:41:25.068980 dqs_delay[1][1] = 0
4893 13:41:25.069095 dump params delay_cell_unit = 762
4894 13:41:25.072387 mt_set_emi_preloader end
4895 13:41:25.079082 [mt_mem_init] dram size: 0x100000000, rank number: 2
4896 13:41:25.082463 [complex_mem_test] start addr:0x40000000, len:20480
4897 13:41:25.118816 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
4898 13:41:25.125033 [complex_mem_test] start addr:0x80000000, len:20480
4899 13:41:25.161382 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
4900 13:41:25.167641 [complex_mem_test] start addr:0xc0000000, len:20480
4901 13:41:25.203199 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
4902 13:41:25.209989 [complex_mem_test] start addr:0x56000000, len:8192
4903 13:41:25.226805 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
4904 13:41:25.227319 ddr_geometry:1
4905 13:41:25.233316 [complex_mem_test] start addr:0x80000000, len:8192
4906 13:41:25.250531 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
4907 13:41:25.253492 dram_init: dram init end (result: 0)
4908 13:41:25.260169 Successfully loaded DRAM blobs and ran DRAM calibration
4909 13:41:25.270486 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
4910 13:41:25.270983 CBMEM:
4911 13:41:25.273773 IMD: root @ 00000000fffff000 254 entries.
4912 13:41:25.276903 IMD: root @ 00000000ffffec00 62 entries.
4913 13:41:25.283699 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
4914 13:41:25.290430 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
4915 13:41:25.293760 in-header: 03 a1 00 00 08 00 00 00
4916 13:41:25.297139 in-data: 84 60 60 10 00 00 00 00
4917 13:41:25.300844 Chrome EC: clear events_b mask to 0x0000000020004000
4918 13:41:25.307747 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
4919 13:41:25.311229 in-header: 03 fd 00 00 00 00 00 00
4920 13:41:25.311652 in-data:
4921 13:41:25.317545 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
4922 13:41:25.317973 CBFS @ 21000 size 3d4000
4923 13:41:25.324836 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
4924 13:41:25.328084 CBFS: Locating 'fallback/ramstage'
4925 13:41:25.330908 CBFS: Found @ offset 10d40 size d563
4926 13:41:25.352427 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
4927 13:41:25.364632 Accumulated console time in romstage 12670 ms
4928 13:41:25.365172
4929 13:41:25.365575
4930 13:41:25.375139 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
4931 13:41:25.378452 ARM64: Exception handlers installed.
4932 13:41:25.378879 ARM64: Testing exception
4933 13:41:25.381358 ARM64: Done test exception
4934 13:41:25.384349 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
4935 13:41:25.388059 Manufacturer: ef
4936 13:41:25.390845 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
4937 13:41:25.397867 WARNING: RO_VPD is uninitialized or empty.
4938 13:41:25.401410 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4939 13:41:25.404297 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4940 13:41:25.414509 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
4941 13:41:25.417287 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
4942 13:41:25.424364 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
4943 13:41:25.424877 Enumerating buses...
4944 13:41:25.430724 Show all devs... Before device enumeration.
4945 13:41:25.431235 Root Device: enabled 1
4946 13:41:25.434503 CPU_CLUSTER: 0: enabled 1
4947 13:41:25.434929 CPU: 00: enabled 1
4948 13:41:25.437196 Compare with tree...
4949 13:41:25.441035 Root Device: enabled 1
4950 13:41:25.441594 CPU_CLUSTER: 0: enabled 1
4951 13:41:25.444638 CPU: 00: enabled 1
4952 13:41:25.447374 Root Device scanning...
4953 13:41:25.447804 root_dev_scan_bus for Root Device
4954 13:41:25.451138 CPU_CLUSTER: 0 enabled
4955 13:41:25.453839 root_dev_scan_bus for Root Device done
4956 13:41:25.460618 scan_bus: scanning of bus Root Device took 10689 usecs
4957 13:41:25.461117 done
4958 13:41:25.464329 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
4959 13:41:25.467852 Allocating resources...
4960 13:41:25.468281 Reading resources...
4961 13:41:25.470679 Root Device read_resources bus 0 link: 0
4962 13:41:25.477571 CPU_CLUSTER: 0 read_resources bus 0 link: 0
4963 13:41:25.478086 CPU: 00 missing read_resources
4964 13:41:25.484718 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
4965 13:41:25.487882 Root Device read_resources bus 0 link: 0 done
4966 13:41:25.488400 Done reading resources.
4967 13:41:25.494182 Show resources in subtree (Root Device)...After reading.
4968 13:41:25.497756 Root Device child on link 0 CPU_CLUSTER: 0
4969 13:41:25.501006 CPU_CLUSTER: 0 child on link 0 CPU: 00
4970 13:41:25.510996 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
4971 13:41:25.511496 CPU: 00
4972 13:41:25.514114 Setting resources...
4973 13:41:25.517845 Root Device assign_resources, bus 0 link: 0
4974 13:41:25.520994 CPU_CLUSTER: 0 missing set_resources
4975 13:41:25.524768 Root Device assign_resources, bus 0 link: 0
4976 13:41:25.527693 Done setting resources.
4977 13:41:25.531001 Show resources in subtree (Root Device)...After assigning values.
4978 13:41:25.537883 Root Device child on link 0 CPU_CLUSTER: 0
4979 13:41:25.541388 CPU_CLUSTER: 0 child on link 0 CPU: 00
4980 13:41:25.548138 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
4981 13:41:25.551174 CPU: 00
4982 13:41:25.551707 Done allocating resources.
4983 13:41:25.557775 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
4984 13:41:25.558295 Enabling resources...
4985 13:41:25.561025 done.
4986 13:41:25.564076 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
4987 13:41:25.567628 Initializing devices...
4988 13:41:25.568147 Root Device init ...
4989 13:41:25.571551 mainboard_init: Starting display init.
4990 13:41:25.574241 ADC[4]: Raw value=77032 ID=0
4991 13:41:25.597067 anx7625_power_on_init: Init interface.
4992 13:41:25.600482 anx7625_disable_pd_protocol: Disabled PD feature.
4993 13:41:25.606895 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
4994 13:41:25.663873 anx7625_start_dp_work: Secure OCM version=00
4995 13:41:25.667362 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
4996 13:41:25.684397 sp_tx_get_edid_block: EDID Block = 1
4997 13:41:25.801586 Extracted contents:
4998 13:41:25.805005 header: 00 ff ff ff ff ff ff 00
4999 13:41:25.808508 serial number: 06 af 5c 14 00 00 00 00 00 1a
5000 13:41:25.811403 version: 01 04
5001 13:41:25.815168 basic params: 95 1a 0e 78 02
5002 13:41:25.818094 chroma info: 99 85 95 55 56 92 28 22 50 54
5003 13:41:25.821985 established: 00 00 00
5004 13:41:25.828067 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5005 13:41:25.831698 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5006 13:41:25.838128 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5007 13:41:25.845091 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5008 13:41:25.851318 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5009 13:41:25.854735 extensions: 00
5010 13:41:25.855239 checksum: ae
5011 13:41:25.855575
5012 13:41:25.859016 Manufacturer: AUO Model 145c Serial Number 0
5013 13:41:25.861219 Made week 0 of 2016
5014 13:41:25.861692 EDID version: 1.4
5015 13:41:25.864954 Digital display
5016 13:41:25.868108 6 bits per primary color channel
5017 13:41:25.868553 DisplayPort interface
5018 13:41:25.871421 Maximum image size: 26 cm x 14 cm
5019 13:41:25.875638 Gamma: 220%
5020 13:41:25.876164 Check DPMS levels
5021 13:41:25.878001 Supported color formats: RGB 4:4:4
5022 13:41:25.881087 First detailed timing is preferred timing
5023 13:41:25.884592 Established timings supported:
5024 13:41:25.887761 Standard timings supported:
5025 13:41:25.888199 Detailed timings
5026 13:41:25.894837 Hex of detail: ce1d56ea50001a3030204600009010000018
5027 13:41:25.897588 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5028 13:41:25.901145 0556 0586 05a6 0640 hborder 0
5029 13:41:25.904488 0300 0304 030a 031a vborder 0
5030 13:41:25.907638 -hsync -vsync
5031 13:41:25.911343 Did detailed timing
5032 13:41:25.914363 Hex of detail: 0000000f0000000000000000000000000020
5033 13:41:25.918005 Manufacturer-specified data, tag 15
5034 13:41:25.921511 Hex of detail: 000000fe0041554f0a202020202020202020
5035 13:41:25.924389 ASCII string: AUO
5036 13:41:25.928049 Hex of detail: 000000fe004231313658414230312e34200a
5037 13:41:25.931603 ASCII string: B116XAB01.4
5038 13:41:25.932130 Checksum
5039 13:41:25.934469 Checksum: 0xae (valid)
5040 13:41:25.941134 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5041 13:41:25.941698 DSI data_rate: 457800000 bps
5042 13:41:25.948426 anx7625_parse_edid: set default k value to 0x3d for panel
5043 13:41:25.951929 anx7625_parse_edid: pixelclock(76300).
5044 13:41:25.955436 hactive(1366), hsync(32), hfp(48), hbp(154)
5045 13:41:25.958566 vactive(768), vsync(6), vfp(4), vbp(16)
5046 13:41:25.961957 anx7625_dsi_config: config dsi.
5047 13:41:25.969768 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5048 13:41:25.990882 anx7625_dsi_config: success to config DSI
5049 13:41:25.994085 anx7625_dp_start: MIPI phy setup OK.
5050 13:41:25.997077 [SSUSB] Setting up USB HOST controller...
5051 13:41:26.000690 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5052 13:41:26.001111 [SSUSB] phy power-on done.
5053 13:41:26.008104 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5054 13:41:26.010922 in-header: 03 fc 01 00 00 00 00 00
5055 13:41:26.011397 in-data:
5056 13:41:26.014265 handle_proto3_response: EC response with error code: 1
5057 13:41:26.017797 SPM: pcm index = 1
5058 13:41:26.021212 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5059 13:41:26.024696 CBFS @ 21000 size 3d4000
5060 13:41:26.031621 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5061 13:41:26.034681 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5062 13:41:26.037872 CBFS: Found @ offset 1e7c0 size 1026
5063 13:41:26.044154 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5064 13:41:26.047789 SPM: binary array size = 2988
5065 13:41:26.051031 SPM: version = pcm_allinone_v1.17.2_20180829
5066 13:41:26.054360 SPM binary loaded in 32 msecs
5067 13:41:26.061845 spm_kick_im_to_fetch: ptr = 000000004021eec2
5068 13:41:26.065097 spm_kick_im_to_fetch: len = 2988
5069 13:41:26.065572 SPM: spm_kick_pcm_to_run
5070 13:41:26.068474 SPM: spm_kick_pcm_to_run done
5071 13:41:26.072081 SPM: spm_init done in 52 msecs
5072 13:41:26.075278 Root Device init finished in 505243 usecs
5073 13:41:26.079288 CPU_CLUSTER: 0 init ...
5074 13:41:26.085713 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5075 13:41:26.092816 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5076 13:41:26.093377 CBFS @ 21000 size 3d4000
5077 13:41:26.098830 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5078 13:41:26.102131 CBFS: Locating 'sspm.bin'
5079 13:41:26.105507 CBFS: Found @ offset 208c0 size 41cb
5080 13:41:26.114786 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5081 13:41:26.122697 CPU_CLUSTER: 0 init finished in 42801 usecs
5082 13:41:26.123372 Devices initialized
5083 13:41:26.126189 Show all devs... After init.
5084 13:41:26.129553 Root Device: enabled 1
5085 13:41:26.129976 CPU_CLUSTER: 0: enabled 1
5086 13:41:26.132602 CPU: 00: enabled 1
5087 13:41:26.136283 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5088 13:41:26.139473 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5089 13:41:26.142822 ELOG: NV offset 0x558000 size 0x1000
5090 13:41:26.150259 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5091 13:41:26.156970 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5092 13:41:26.160711 ELOG: Event(17) added with size 13 at 2024-07-18 13:41:26 UTC
5093 13:41:26.163397 out: cmd=0x121: 03 db 21 01 00 00 00 00
5094 13:41:26.167043 in-header: 03 3c 00 00 2c 00 00 00
5095 13:41:26.180419 in-data: dd 48 00 00 00 00 00 00 02 10 00 00 06 80 00 00 18 3b 01 00 06 80 00 00 a6 0c 02 00 06 80 00 00 a4 77 01 00 06 80 00 00 9f 81 02 00
5096 13:41:26.183671 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5097 13:41:26.187439 in-header: 03 19 00 00 08 00 00 00
5098 13:41:26.190751 in-data: a2 e0 47 00 13 00 00 00
5099 13:41:26.193719 Chrome EC: UHEPI supported
5100 13:41:26.200856 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5101 13:41:26.204217 in-header: 03 e1 00 00 08 00 00 00
5102 13:41:26.207469 in-data: 84 20 60 10 00 00 00 00
5103 13:41:26.210686 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5104 13:41:26.217697 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5105 13:41:26.220852 in-header: 03 e1 00 00 08 00 00 00
5106 13:41:26.224072 in-data: 84 20 60 10 00 00 00 00
5107 13:41:26.230316 ELOG: Event(A1) added with size 10 at 2024-07-18 13:41:26 UTC
5108 13:41:26.237441 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5109 13:41:26.240989 ELOG: Event(A0) added with size 9 at 2024-07-18 13:41:26 UTC
5110 13:41:26.244182 elog_add_boot_reason: Logged dev mode boot
5111 13:41:26.247186 Finalize devices...
5112 13:41:26.247609 Devices finalized
5113 13:41:26.253921 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5114 13:41:26.257763 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5115 13:41:26.263867 ELOG: Event(91) added with size 10 at 2024-07-18 13:41:26 UTC
5116 13:41:26.267272 Writing coreboot table at 0xffeda000
5117 13:41:26.270836 0. 0000000000114000-000000000011efff: RAMSTAGE
5118 13:41:26.274209 1. 0000000040000000-000000004023cfff: RAMSTAGE
5119 13:41:26.280798 2. 000000004023d000-00000000545fffff: RAM
5120 13:41:26.284551 3. 0000000054600000-000000005465ffff: BL31
5121 13:41:26.287589 4. 0000000054660000-00000000ffed9fff: RAM
5122 13:41:26.290890 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5123 13:41:26.298009 6. 0000000100000000-000000013fffffff: RAM
5124 13:41:26.298516 Passing 5 GPIOs to payload:
5125 13:41:26.304241 NAME | PORT | POLARITY | VALUE
5126 13:41:26.308141 write protect | 0x00000096 | low | high
5127 13:41:26.311303 EC in RW | 0x000000b1 | high | undefined
5128 13:41:26.318216 EC interrupt | 0x00000097 | low | undefined
5129 13:41:26.321687 TPM interrupt | 0x00000099 | high | undefined
5130 13:41:26.327621 speaker enable | 0x000000af | high | undefined
5131 13:41:26.330934 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5132 13:41:26.334216 in-header: 03 f7 00 00 02 00 00 00
5133 13:41:26.334743 in-data: 04 00
5134 13:41:26.337551 Board ID: 4
5135 13:41:26.338029 ADC[3]: Raw value=1041012 ID=8
5136 13:41:26.340893 RAM code: 8
5137 13:41:26.341460 SKU ID: 16
5138 13:41:26.344124 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5139 13:41:26.347715 CBFS @ 21000 size 3d4000
5140 13:41:26.354306 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5141 13:41:26.360967 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 4619
5142 13:41:26.361525 coreboot table: 940 bytes.
5143 13:41:26.364021 IMD ROOT 0. 00000000fffff000 00001000
5144 13:41:26.367336 IMD SMALL 1. 00000000ffffe000 00001000
5145 13:41:26.374262 CONSOLE 2. 00000000fffde000 00020000
5146 13:41:26.377548 FMAP 3. 00000000fffdd000 0000047c
5147 13:41:26.380715 TIME STAMP 4. 00000000fffdc000 00000910
5148 13:41:26.384230 RAMOOPS 5. 00000000ffedc000 00100000
5149 13:41:26.387887 COREBOOT 6. 00000000ffeda000 00002000
5150 13:41:26.388409 IMD small region:
5151 13:41:26.390522 IMD ROOT 0. 00000000ffffec00 00000400
5152 13:41:26.397637 VBOOT WORK 1. 00000000ffffeb00 00000100
5153 13:41:26.400624 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5154 13:41:26.404651 VPD 3. 00000000ffffea60 0000006c
5155 13:41:26.407967 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5156 13:41:26.414281 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5157 13:41:26.417871 in-header: 03 e1 00 00 08 00 00 00
5158 13:41:26.420857 in-data: 84 20 60 10 00 00 00 00
5159 13:41:26.427901 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5160 13:41:26.428430 CBFS @ 21000 size 3d4000
5161 13:41:26.434589 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5162 13:41:26.437769 CBFS: Locating 'fallback/payload'
5163 13:41:26.444651 CBFS: Found @ offset dc040 size 439a0
5164 13:41:26.532990 read SPI 0xfd078 0x439a0: 84380 us, 3281 KB/s, 26.248 Mbps
5165 13:41:26.536113 Checking segment from ROM address 0x0000000040003a00
5166 13:41:26.542942 Checking segment from ROM address 0x0000000040003a1c
5167 13:41:26.545798 Loading segment from ROM address 0x0000000040003a00
5168 13:41:26.549793 code (compression=0)
5169 13:41:26.559332 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5170 13:41:26.565798 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5171 13:41:26.569506 it's not compressed!
5172 13:41:26.572895 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5173 13:41:26.579378 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5174 13:41:26.586920 Loading segment from ROM address 0x0000000040003a1c
5175 13:41:26.590807 Entry Point 0x0000000080000000
5176 13:41:26.591337 Loaded segments
5177 13:41:26.596736 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5178 13:41:26.600596 Jumping to boot code at 0000000080000000(00000000ffeda000)
5179 13:41:26.610471 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5180 13:41:26.613536 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5181 13:41:26.617091 CBFS @ 21000 size 3d4000
5182 13:41:26.623968 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5183 13:41:26.627192 CBFS: Locating 'fallback/bl31'
5184 13:41:26.629755 CBFS: Found @ offset 36dc0 size 5820
5185 13:41:26.640773 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5186 13:41:26.644296 Checking segment from ROM address 0x0000000040003a00
5187 13:41:26.650729 Checking segment from ROM address 0x0000000040003a1c
5188 13:41:26.654435 Loading segment from ROM address 0x0000000040003a00
5189 13:41:26.657902 code (compression=1)
5190 13:41:26.664186 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5191 13:41:26.674612 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5192 13:41:26.675137 using LZMA
5193 13:41:26.682880 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5194 13:41:26.689203 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5195 13:41:26.692889 Loading segment from ROM address 0x0000000040003a1c
5196 13:41:26.696264 Entry Point 0x0000000054601000
5197 13:41:26.696704 Loaded segments
5198 13:41:26.699278 NOTICE: MT8183 bl31_setup
5199 13:41:26.706481 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5200 13:41:26.709616 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5201 13:41:26.713065 INFO: [DEVAPC] dump DEVAPC registers:
5202 13:41:26.723514 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5203 13:41:26.729556 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5204 13:41:26.740195 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5205 13:41:26.746693 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5206 13:41:26.756542 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5207 13:41:26.763233 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5208 13:41:26.769873 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5209 13:41:26.779831 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5210 13:41:26.786786 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5211 13:41:26.797272 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5212 13:41:26.803465 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5213 13:41:26.813426 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5214 13:41:26.820003 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5215 13:41:26.826716 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5216 13:41:26.833887 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5217 13:41:26.843268 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5218 13:41:26.850209 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5219 13:41:26.857178 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5220 13:41:26.864111 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5221 13:41:26.870120 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5222 13:41:26.880436 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5223 13:41:26.887171 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5224 13:41:26.890515 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5225 13:41:26.893683 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5226 13:41:26.897262 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5227 13:41:26.900522 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5228 13:41:26.903614 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5229 13:41:26.910483 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5230 13:41:26.913417 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5231 13:41:26.917136 WARNING: region 0:
5232 13:41:26.920715 WARNING: apc:0x168, sa:0x0, ea:0xfff
5233 13:41:26.921266 WARNING: region 1:
5234 13:41:26.924033 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5235 13:41:26.927001 WARNING: region 2:
5236 13:41:26.930442 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5237 13:41:26.930955 WARNING: region 3:
5238 13:41:26.937173 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5239 13:41:26.937734 WARNING: region 4:
5240 13:41:26.940892 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5241 13:41:26.944099 WARNING: region 5:
5242 13:41:26.947253 WARNING: apc:0x0, sa:0x0, ea:0x0
5243 13:41:26.947783 WARNING: region 6:
5244 13:41:26.950441 WARNING: apc:0x0, sa:0x0, ea:0x0
5245 13:41:26.953762 WARNING: region 7:
5246 13:41:26.954283 WARNING: apc:0x0, sa:0x0, ea:0x0
5247 13:41:26.963691 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5248 13:41:26.967033 INFO: SPM: enable SPMC mode
5249 13:41:26.967476 NOTICE: spm_boot_init() start
5250 13:41:26.970334 NOTICE: spm_boot_init() end
5251 13:41:26.973913 INFO: BL31: Initializing runtime services
5252 13:41:26.980198 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5253 13:41:26.984120 INFO: BL31: Preparing for EL3 exit to normal world
5254 13:41:26.989825 INFO: Entry point address = 0x80000000
5255 13:41:26.990337 INFO: SPSR = 0x8
5256 13:41:27.012474
5257 13:41:27.012625
5258 13:41:27.012727
5259 13:41:27.013269 end: 2.2.3 depthcharge-start (duration 00:00:23) [common]
5260 13:41:27.013403 start: 2.2.4 bootloader-commands (timeout 00:04:28) [common]
5261 13:41:27.013498 Setting prompt string to ['jacuzzi:']
5262 13:41:27.013601 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:28)
5263 13:41:27.015891 Starting depthcharge on Juniper...
5264 13:41:27.015985
5265 13:41:27.019188 vboot_handoff: creating legacy vboot_handoff structure
5266 13:41:27.019291
5267 13:41:27.022695 ec_init(0): CrosEC protocol v3 supported (544, 544)
5268 13:41:27.022798
5269 13:41:27.026179 Wipe memory regions:
5270 13:41:27.026355
5271 13:41:27.029380 [0x00000040000000, 0x00000054600000)
5272 13:41:27.072731
5273 13:41:27.073289 [0x00000054660000, 0x00000080000000)
5274 13:41:27.163765
5275 13:41:27.164284 [0x000000811994a0, 0x000000ffeda000)
5276 13:41:27.422956
5277 13:41:27.423481 [0x00000100000000, 0x00000140000000)
5278 13:41:27.555280
5279 13:41:27.558181 Initializing XHCI USB controller at 0x11200000.
5280 13:41:27.581479
5281 13:41:27.584919 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5282 13:41:27.585489
5283 13:41:27.585934
5284 13:41:27.586738 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5285 13:41:27.587152 Sending line: 'tftpboot 192.168.201.1 14879031/tftp-deploy-lp0pwhql/kernel/image.itb 14879031/tftp-deploy-lp0pwhql/kernel/cmdline '
5287 13:41:27.688627 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5288 13:41:27.689213 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:28)
5289 13:41:27.693761 jacuzzi: tftpboot 192.168.201.1 14879031/tftp-deploy-lp0pwhql/kernel/image.ittp-deploy-lp0pwhql/kernel/cmdline
5290 13:41:27.694295
5291 13:41:27.694842 Waiting for link
5292 13:41:28.242072
5293 13:41:28.242599 R8152: Initializing
5294 13:41:28.243043
5295 13:41:28.245017 Version 9 (ocp_data = 6010)
5296 13:41:28.245561
5297 13:41:28.248483 R8152: Done initializing
5298 13:41:28.248923
5299 13:41:28.249457 Adding net device
5300 13:41:28.427515
5301 13:41:28.428016 R8152: Initializing
5302 13:41:28.428352
5303 13:41:28.430658 Version 9 (ocp_data = 6010)
5304 13:41:28.431252
5305 13:41:28.433391 R8152: Done initializing
5306 13:41:28.433491
5307 13:41:28.436873 net_add_device: Attemp to include the same device
5308 13:41:28.823305
5309 13:41:28.823847 done.
5310 13:41:28.824298
5311 13:41:28.824717 MAC: 00:e0:4c:68:03:2b
5312 13:41:28.825188
5313 13:41:28.826627 Sending DHCP discover... done.
5314 13:41:28.827066
5315 13:41:28.830232 Waiting for reply... done.
5316 13:41:28.830750
5317 13:41:28.833128 Sending DHCP request... done.
5318 13:41:28.833321
5319 13:41:28.836341 Waiting for reply... done.
5320 13:41:28.836508
5321 13:41:28.836638 My ip is 192.168.201.17
5322 13:41:28.836760
5323 13:41:28.840084 The DHCP server ip is 192.168.201.1
5324 13:41:28.840357
5325 13:41:28.846693 TFTP server IP predefined by user: 192.168.201.1
5326 13:41:28.847097
5327 13:41:28.853555 Bootfile predefined by user: 14879031/tftp-deploy-lp0pwhql/kernel/image.itb
5328 13:41:28.854015
5329 13:41:28.854319 Sending tftp read request... done.
5330 13:41:28.856906
5331 13:41:28.863578 Waiting for the transfer...
5332 13:41:28.864208
5333 13:41:29.159892 00000000 ################################################################
5334 13:41:29.160013
5335 13:41:29.461183 00080000 ################################################################
5336 13:41:29.461345
5337 13:41:29.763328 00100000 ################################################################
5338 13:41:29.763678
5339 13:41:30.162192 00180000 ################################################################
5340 13:41:30.162647
5341 13:41:30.558262 00200000 ################################################################
5342 13:41:30.558738
5343 13:41:30.954592 00280000 ################################################################
5344 13:41:30.955118
5345 13:41:31.340218 00300000 ################################################################
5346 13:41:31.340693
5347 13:41:31.734770 00380000 ################################################################
5348 13:41:31.735272
5349 13:41:32.075961 00400000 ################################################################
5350 13:41:32.076079
5351 13:41:32.375146 00480000 ################################################################
5352 13:41:32.375264
5353 13:41:32.681200 00500000 ################################################################
5354 13:41:32.681364
5355 13:41:32.986127 00580000 ################################################################
5356 13:41:32.986257
5357 13:41:33.293402 00600000 ################################################################
5358 13:41:33.293527
5359 13:41:33.599408 00680000 ################################################################
5360 13:41:33.599534
5361 13:41:33.904158 00700000 ################################################################
5362 13:41:33.904284
5363 13:41:34.203806 00780000 ################################################################
5364 13:41:34.203932
5365 13:41:34.505707 00800000 ################################################################
5366 13:41:34.505836
5367 13:41:34.807294 00880000 ################################################################
5368 13:41:34.807417
5369 13:41:35.104140 00900000 ################################################################
5370 13:41:35.104264
5371 13:41:35.399873 00980000 ################################################################
5372 13:41:35.400001
5373 13:41:35.688955 00a00000 ################################################################
5374 13:41:35.689082
5375 13:41:35.985896 00a80000 ################################################################
5376 13:41:35.986019
5377 13:41:36.277196 00b00000 ################################################################
5378 13:41:36.277325
5379 13:41:36.570278 00b80000 ################################################################
5380 13:41:36.570403
5381 13:41:36.992877 00c00000 ################################################################
5382 13:41:36.993429
5383 13:41:37.405062 00c80000 ################################################################
5384 13:41:37.405558
5385 13:41:37.714992 00d00000 ################################################################
5386 13:41:37.715124
5387 13:41:38.020491 00d80000 ################################################################
5388 13:41:38.020620
5389 13:41:38.324809 00e00000 ################################################################
5390 13:41:38.324934
5391 13:41:38.624179 00e80000 ################################################################
5392 13:41:38.624306
5393 13:41:38.937902 00f00000 ################################################################
5394 13:41:38.938368
5395 13:41:39.340942 00f80000 ################################################################
5396 13:41:39.341425
5397 13:41:39.699187 01000000 ################################################################
5398 13:41:39.699302
5399 13:41:39.974878 01080000 ################################################################
5400 13:41:39.975010
5401 13:41:40.256883 01100000 ################################################################
5402 13:41:40.257015
5403 13:41:40.540386 01180000 ################################################################
5404 13:41:40.540515
5405 13:41:40.815492 01200000 ################################################################
5406 13:41:40.815619
5407 13:41:41.097983 01280000 ################################################################
5408 13:41:41.098124
5409 13:41:41.394379 01300000 ################################################################
5410 13:41:41.394526
5411 13:41:41.694570 01380000 ################################################################
5412 13:41:41.694695
5413 13:41:41.990872 01400000 ################################################################
5414 13:41:41.991001
5415 13:41:42.275422 01480000 ################################################################
5416 13:41:42.275653
5417 13:41:42.657667 01500000 ################################################################
5418 13:41:42.658128
5419 13:41:43.079235 01580000 ################################################################
5420 13:41:43.079775
5421 13:41:43.475130 01600000 ################################################################
5422 13:41:43.475261
5423 13:41:43.780738 01680000 ################################################################
5424 13:41:43.780863
5425 13:41:44.086722 01700000 ################################################################
5426 13:41:44.086853
5427 13:41:44.391136 01780000 ################################################################
5428 13:41:44.391259
5429 13:41:44.694910 01800000 ################################################################
5430 13:41:44.695037
5431 13:41:44.989789 01880000 ################################################################
5432 13:41:44.989916
5433 13:41:45.295950 01900000 ################################################################
5434 13:41:45.296078
5435 13:41:45.602923 01980000 ################################################################
5436 13:41:45.603038
5437 13:41:45.899815 01a00000 ################################################################
5438 13:41:45.899942
5439 13:41:46.197681 01a80000 ################################################################
5440 13:41:46.197804
5441 13:41:46.502225 01b00000 ################################################################
5442 13:41:46.502357
5443 13:41:46.890925 01b80000 ################################################################
5444 13:41:46.891778
5445 13:41:47.323221 01c00000 ################################################################
5446 13:41:47.323680
5447 13:41:47.760659 01c80000 ################################################################
5448 13:41:47.761157
5449 13:41:48.171697 01d00000 ################################################################
5450 13:41:48.171821
5451 13:41:48.473918 01d80000 ################################################################
5452 13:41:48.474039
5453 13:41:48.774596 01e00000 ################################################################
5454 13:41:48.774719
5455 13:41:49.078824 01e80000 ################################################################
5456 13:41:49.078968
5457 13:41:49.382916 01f00000 ################################################################
5458 13:41:49.383043
5459 13:41:49.685393 01f80000 ################################################################
5460 13:41:49.685515
5461 13:41:49.990242 02000000 ################################################################
5462 13:41:49.990367
5463 13:41:50.293219 02080000 ################################################################
5464 13:41:50.293352
5465 13:41:50.603431 02100000 ################################################################
5466 13:41:50.603608
5467 13:41:51.009366 02180000 ################################################################
5468 13:41:51.009843
5469 13:41:51.354010 02200000 ################################################################
5470 13:41:51.354139
5471 13:41:51.655259 02280000 ################################################################
5472 13:41:51.655390
5473 13:41:51.958553 02300000 ################################################################
5474 13:41:51.958676
5475 13:41:52.264733 02380000 ################################################################
5476 13:41:52.264856
5477 13:41:52.570749 02400000 ################################################################
5478 13:41:52.570872
5479 13:41:52.905189 02480000 ################################################################
5480 13:41:52.905719
5481 13:41:53.322133 02500000 ################################################################
5482 13:41:53.322607
5483 13:41:53.676102 02580000 ################################################################
5484 13:41:53.676231
5485 13:41:53.956937 02600000 ################################################################
5486 13:41:53.957063
5487 13:41:54.225975 02680000 ################################################################
5488 13:41:54.226101
5489 13:41:54.525770 02700000 ################################################################
5490 13:41:54.525893
5491 13:41:54.916077 02780000 ################################################################
5492 13:41:54.916544
5493 13:41:55.244914 02800000 ################################################################
5494 13:41:55.245043
5495 13:41:55.504023 02880000 ################################################################
5496 13:41:55.504145
5497 13:41:55.782987 02900000 ################################################################
5498 13:41:55.783112
5499 13:41:56.041911 02980000 ################################################################
5500 13:41:56.042032
5501 13:41:56.319239 02a00000 ################################################################
5502 13:41:56.319366
5503 13:41:56.573653 02a80000 ################################################################
5504 13:41:56.573775
5505 13:41:56.857119 02b00000 ################################################################
5506 13:41:56.857288
5507 13:41:57.113800 02b80000 ################################################################
5508 13:41:57.113921
5509 13:41:57.385193 02c00000 ################################################################
5510 13:41:57.385376
5511 13:41:57.675586 02c80000 ################################################################
5512 13:41:57.675710
5513 13:41:57.977993 02d00000 ################################################################
5514 13:41:57.978118
5515 13:41:58.269679 02d80000 ################################################################
5516 13:41:58.269805
5517 13:41:58.566466 02e00000 ################################################################
5518 13:41:58.566594
5519 13:41:58.935981 02e80000 ################################################################
5520 13:41:58.936453
5521 13:41:59.328088 02f00000 ################################################################
5522 13:41:59.328551
5523 13:41:59.731308 02f80000 ################################################################
5524 13:41:59.731436
5525 13:42:00.022369 03000000 ################################################################
5526 13:42:00.022495
5527 13:42:00.318305 03080000 ################################################################
5528 13:42:00.318428
5529 13:42:00.606953 03100000 ################################################################
5530 13:42:00.607077
5531 13:42:00.949112 03180000 ################################################################
5532 13:42:00.949611
5533 13:42:01.345284 03200000 ################################################################
5534 13:42:01.345759
5535 13:42:01.755462 03280000 ################################################################
5536 13:42:01.755919
5537 13:42:02.119062 03300000 ################################################################
5538 13:42:02.119199
5539 13:42:02.424001 03380000 ################################################################
5540 13:42:02.424128
5541 13:42:02.730545 03400000 ################################################################
5542 13:42:02.730672
5543 13:42:03.036106 03480000 ################################################################
5544 13:42:03.036237
5545 13:42:03.326485 03500000 ################################################################
5546 13:42:03.326610
5547 13:42:03.615571 03580000 ################################################################
5548 13:42:03.615695
5549 13:42:03.913956 03600000 ################################################################
5550 13:42:03.914081
5551 13:42:04.212692 03680000 ################################################################
5552 13:42:04.212814
5553 13:42:04.532083 03700000 ################################################################
5554 13:42:04.532230
5555 13:42:04.905214 03780000 ################################################################
5556 13:42:04.905774
5557 13:42:05.330032 03800000 ################################################################
5558 13:42:05.330633
5559 13:42:05.643464 03880000 ################################################################
5560 13:42:05.643595
5561 13:42:05.932609 03900000 ################################################################
5562 13:42:05.932727
5563 13:42:06.218217 03980000 ################################################################
5564 13:42:06.218343
5565 13:42:06.504657 03a00000 ################################################################
5566 13:42:06.504784
5567 13:42:06.862441 03a80000 ################################################################
5568 13:42:06.862569
5569 13:42:07.167459 03b00000 ################################################################
5570 13:42:07.167587
5571 13:42:07.471648 03b80000 ################################################################
5572 13:42:07.471774
5573 13:42:07.829552 03c00000 ################################################################
5574 13:42:07.830025
5575 13:42:08.256947 03c80000 ################################################################
5576 13:42:08.257459
5577 13:42:08.613111 03d00000 ################################################################
5578 13:42:08.613243
5579 13:42:08.902202 03d80000 ################################################################
5580 13:42:08.902324
5581 13:42:09.074012 03e00000 ##################################### done.
5582 13:42:09.074134
5583 13:42:09.077211 The bootfile was 65308486 bytes long.
5584 13:42:09.077302
5585 13:42:09.080461 Sending tftp read request... done.
5586 13:42:09.080546
5587 13:42:09.083865 Waiting for the transfer...
5588 13:42:09.083956
5589 13:42:09.084024 00000000 # done.
5590 13:42:09.084091
5591 13:42:09.093754 Command line loaded dynamically from TFTP file: 14879031/tftp-deploy-lp0pwhql/kernel/cmdline
5592 13:42:09.093917
5593 13:42:09.110448 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5594 13:42:09.110660
5595 13:42:09.110785 Loading FIT.
5596 13:42:09.110906
5597 13:42:09.114029 Image ramdisk-1 has 52134279 bytes.
5598 13:42:09.114256
5599 13:42:09.117246 Image fdt-1 has 57695 bytes.
5600 13:42:09.117436
5601 13:42:09.120585 Image kernel-1 has 13114469 bytes.
5602 13:42:09.120843
5603 13:42:09.127571 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5604 13:42:09.127926
5605 13:42:09.140832 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5606 13:42:09.141415
5607 13:42:09.147537 Choosing best match conf-1 for compat google,juniper-sku16.
5608 13:42:09.147971
5609 13:42:09.154703 Connected to device vid:did:rid of 1ae0:0028:00
5610 13:42:09.161854
5611 13:42:09.164904 tpm_get_response: command 0x17b, return code 0x0
5612 13:42:09.165382
5613 13:42:09.168602 tpm_cleanup: add release locality here.
5614 13:42:09.169103
5615 13:42:09.172071 Shutting down all USB controllers.
5616 13:42:09.172498
5617 13:42:09.175049 Removing current net device
5618 13:42:09.175477
5619 13:42:09.178622 Exiting depthcharge with code 4 at timestamp: 58380505
5620 13:42:09.179051
5621 13:42:09.182056 LZMA decompressing kernel-1 to 0x80193568
5622 13:42:09.182485
5623 13:42:09.188851 LZMA decompressing kernel-1 to 0x40000000
5624 13:42:11.051004
5625 13:42:11.051633 jumping to kernel
5626 13:42:11.054560 end: 2.2.4 bootloader-commands (duration 00:00:44) [common]
5627 13:42:11.055070 start: 2.2.5 auto-login-action (timeout 00:03:44) [common]
5628 13:42:11.055443 Setting prompt string to ['Linux version [0-9]']
5629 13:42:11.055793 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5630 13:42:11.056143 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5631 13:42:11.126053
5632 13:42:11.128934 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5633 13:42:11.133103 start: 2.2.5.1 login-action (timeout 00:03:44) [common]
5634 13:42:11.133721 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5635 13:42:11.134104 Setting prompt string to []
5636 13:42:11.134508 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5637 13:42:11.134880 Using line separator: #'\n'#
5638 13:42:11.135491 No login prompt set.
5639 13:42:11.136121 Parsing kernel messages
5640 13:42:11.136627 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5641 13:42:11.137582 [login-action] Waiting for messages, (timeout 00:03:44)
5642 13:42:11.137941 Waiting using forced prompt support (timeout 00:01:52)
5643 13:42:11.152424 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j272990-arm64-gcc-12-defconfig-arm64-chromebook-fgzcq) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Thu Jul 18 12:53:03 UTC 2024
5644 13:42:11.155790 [ 0.000000] random: crng init done
5645 13:42:11.159287 [ 0.000000] Machine model: Google juniper sku16 board
5646 13:42:11.162570 [ 0.000000] efi: UEFI not found.
5647 13:42:11.172384 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5648 13:42:11.179008 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5649 13:42:11.185497 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5650 13:42:11.192574 [ 0.000000] printk: bootconsole [mtk8250] enabled
5651 13:42:11.199840 [ 0.000000] NUMA: No NUMA configuration found
5652 13:42:11.206793 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5653 13:42:11.213069 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5654 13:42:11.213636 [ 0.000000] Zone ranges:
5655 13:42:11.220174 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5656 13:42:11.223133 [ 0.000000] DMA32 empty
5657 13:42:11.229962 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5658 13:42:11.233117 [ 0.000000] Movable zone start for each node
5659 13:42:11.236362 [ 0.000000] Early memory node ranges
5660 13:42:11.243219 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5661 13:42:11.249933 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5662 13:42:11.256904 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5663 13:42:11.262904 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5664 13:42:11.269972 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5665 13:42:11.276536 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5666 13:42:11.296873 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5667 13:42:11.303309 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5668 13:42:11.309911 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5669 13:42:11.313315 [ 0.000000] psci: probing for conduit method from DT.
5670 13:42:11.320072 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5671 13:42:11.323009 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5672 13:42:11.329892 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5673 13:42:11.333155 [ 0.000000] psci: SMC Calling Convention v1.1
5674 13:42:11.340047 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5675 13:42:11.343378 [ 0.000000] Detected VIPT I-cache on CPU0
5676 13:42:11.349906 [ 0.000000] CPU features: detected: GIC system register CPU interface
5677 13:42:11.356821 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5678 13:42:11.362933 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5679 13:42:11.366358 [ 0.000000] CPU features: detected: ARM erratum 845719
5680 13:42:11.373117 [ 0.000000] alternatives: applying boot alternatives
5681 13:42:11.376547 [ 0.000000] Fallback order for Node 0: 0
5682 13:42:11.383150 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5683 13:42:11.386547 [ 0.000000] Policy zone: Normal
5684 13:42:11.406464 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5685 13:42:11.416504 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5686 13:42:11.427315 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5687 13:42:11.433465 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5688 13:42:11.440258 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5689 13:42:11.447257 <6>[ 0.000000] software IO TLB: area num 8.
5690 13:42:11.471352 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5691 13:42:11.529806 <6>[ 0.000000] Memory: 3864164K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 294300K reserved, 32768K cma-reserved)
5692 13:42:11.536355 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5693 13:42:11.543048 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5694 13:42:11.546375 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5695 13:42:11.553077 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5696 13:42:11.559671 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5697 13:42:11.562800 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5698 13:42:11.572922 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5699 13:42:11.579806 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5700 13:42:11.582780 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5701 13:42:11.594709 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5702 13:42:11.601638 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5703 13:42:11.604808 <6>[ 0.000000] GICv3: 640 SPIs implemented
5704 13:42:11.608094 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5705 13:42:11.611856 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5706 13:42:11.618398 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5707 13:42:11.624652 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5708 13:42:11.634916 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5709 13:42:11.648288 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5710 13:42:11.655066 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5711 13:42:11.666724 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5712 13:42:11.679951 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5713 13:42:11.686357 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5714 13:42:11.693367 <6>[ 0.009471] Console: colour dummy device 80x25
5715 13:42:11.696445 <6>[ 0.014506] printk: console [tty1] enabled
5716 13:42:11.706633 <6>[ 0.018897] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5717 13:42:11.713622 <6>[ 0.029361] pid_max: default: 32768 minimum: 301
5718 13:42:11.716591 <6>[ 0.034242] LSM: Security Framework initializing
5719 13:42:11.726763 <6>[ 0.039155] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5720 13:42:11.733282 <6>[ 0.046778] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5721 13:42:11.740140 <4>[ 0.055659] cacheinfo: Unable to detect cache hierarchy for CPU 0
5722 13:42:11.749839 <6>[ 0.062283] cblist_init_generic: Setting adjustable number of callback queues.
5723 13:42:11.753588 <6>[ 0.069729] cblist_init_generic: Setting shift to 3 and lim to 1.
5724 13:42:11.763449 <6>[ 0.076082] cblist_init_generic: Setting adjustable number of callback queues.
5725 13:42:11.770188 <6>[ 0.083527] cblist_init_generic: Setting shift to 3 and lim to 1.
5726 13:42:11.773597 <6>[ 0.089926] rcu: Hierarchical SRCU implementation.
5727 13:42:11.779765 <6>[ 0.094952] rcu: Max phase no-delay instances is 1000.
5728 13:42:11.786417 <6>[ 0.102880] EFI services will not be available.
5729 13:42:11.789803 <6>[ 0.107830] smp: Bringing up secondary CPUs ...
5730 13:42:11.800366 <6>[ 0.113089] Detected VIPT I-cache on CPU1
5731 13:42:11.806960 <4>[ 0.113136] cacheinfo: Unable to detect cache hierarchy for CPU 1
5732 13:42:11.813665 <6>[ 0.113143] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5733 13:42:11.820384 <6>[ 0.113176] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5734 13:42:11.823598 <6>[ 0.113658] Detected VIPT I-cache on CPU2
5735 13:42:11.830430 <4>[ 0.113692] cacheinfo: Unable to detect cache hierarchy for CPU 2
5736 13:42:11.836905 <6>[ 0.113696] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5737 13:42:11.843919 <6>[ 0.113708] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5738 13:42:11.847169 <6>[ 0.114154] Detected VIPT I-cache on CPU3
5739 13:42:11.853866 <4>[ 0.114184] cacheinfo: Unable to detect cache hierarchy for CPU 3
5740 13:42:11.860538 <6>[ 0.114189] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5741 13:42:11.867002 <6>[ 0.114200] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5742 13:42:11.873528 <6>[ 0.114775] CPU features: detected: Spectre-v2
5743 13:42:11.877198 <6>[ 0.114785] CPU features: detected: Spectre-BHB
5744 13:42:11.883565 <6>[ 0.114789] CPU features: detected: ARM erratum 858921
5745 13:42:11.886819 <6>[ 0.114794] Detected VIPT I-cache on CPU4
5746 13:42:11.893678 <4>[ 0.114842] cacheinfo: Unable to detect cache hierarchy for CPU 4
5747 13:42:11.900606 <6>[ 0.114849] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5748 13:42:11.906962 <6>[ 0.114858] arch_timer: Enabling local workaround for ARM erratum 858921
5749 13:42:11.913862 <6>[ 0.114868] arch_timer: CPU4: Trapping CNTVCT access
5750 13:42:11.920912 <6>[ 0.114876] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5751 13:42:11.923438 <6>[ 0.115361] Detected VIPT I-cache on CPU5
5752 13:42:11.929911 <4>[ 0.115401] cacheinfo: Unable to detect cache hierarchy for CPU 5
5753 13:42:11.936829 <6>[ 0.115407] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5754 13:42:11.943636 <6>[ 0.115414] arch_timer: Enabling local workaround for ARM erratum 858921
5755 13:42:11.950156 <6>[ 0.115420] arch_timer: CPU5: Trapping CNTVCT access
5756 13:42:11.957085 <6>[ 0.115425] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5757 13:42:11.959893 <6>[ 0.115860] Detected VIPT I-cache on CPU6
5758 13:42:11.966599 <4>[ 0.115906] cacheinfo: Unable to detect cache hierarchy for CPU 6
5759 13:42:11.973368 <6>[ 0.115912] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5760 13:42:11.979939 <6>[ 0.115919] arch_timer: Enabling local workaround for ARM erratum 858921
5761 13:42:11.987018 <6>[ 0.115925] arch_timer: CPU6: Trapping CNTVCT access
5762 13:42:11.993541 <6>[ 0.115931] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5763 13:42:11.997284 <6>[ 0.116461] Detected VIPT I-cache on CPU7
5764 13:42:12.003627 <4>[ 0.116504] cacheinfo: Unable to detect cache hierarchy for CPU 7
5765 13:42:12.010665 <6>[ 0.116510] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5766 13:42:12.017217 <6>[ 0.116517] arch_timer: Enabling local workaround for ARM erratum 858921
5767 13:42:12.023712 <6>[ 0.116523] arch_timer: CPU7: Trapping CNTVCT access
5768 13:42:12.030074 <6>[ 0.116528] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5769 13:42:12.033807 <6>[ 0.116576] smp: Brought up 1 node, 8 CPUs
5770 13:42:12.039906 <6>[ 0.355484] SMP: Total of 8 processors activated.
5771 13:42:12.043646 <6>[ 0.360418] CPU features: detected: 32-bit EL0 Support
5772 13:42:12.050388 <6>[ 0.365797] CPU features: detected: 32-bit EL1 Support
5773 13:42:12.056724 <6>[ 0.371166] CPU features: detected: CRC32 instructions
5774 13:42:12.060103 <6>[ 0.376591] CPU: All CPU(s) started at EL2
5775 13:42:12.066635 <6>[ 0.380929] alternatives: applying system-wide alternatives
5776 13:42:12.069896 <6>[ 0.388948] devtmpfs: initialized
5777 13:42:12.084691 <6>[ 0.397879] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5778 13:42:12.095265 <6>[ 0.407826] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5779 13:42:12.098383 <6>[ 0.415548] pinctrl core: initialized pinctrl subsystem
5780 13:42:12.106400 <6>[ 0.422664] DMI not present or invalid.
5781 13:42:12.113370 <6>[ 0.427033] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5782 13:42:12.119854 <6>[ 0.433934] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5783 13:42:12.130004 <6>[ 0.441464] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5784 13:42:12.136510 <6>[ 0.449714] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5785 13:42:12.143364 <6>[ 0.457891] audit: initializing netlink subsys (disabled)
5786 13:42:12.149912 <5>[ 0.463596] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
5787 13:42:12.156513 <6>[ 0.464578] thermal_sys: Registered thermal governor 'step_wise'
5788 13:42:12.163253 <6>[ 0.471563] thermal_sys: Registered thermal governor 'power_allocator'
5789 13:42:12.166448 <6>[ 0.477861] cpuidle: using governor menu
5790 13:42:12.173126 <6>[ 0.488826] NET: Registered PF_QIPCRTR protocol family
5791 13:42:12.180088 <6>[ 0.494314] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5792 13:42:12.186285 <6>[ 0.501411] ASID allocator initialised with 32768 entries
5793 13:42:12.192726 <6>[ 0.508177] Serial: AMBA PL011 UART driver
5794 13:42:12.203195 <4>[ 0.519525] Trying to register duplicate clock ID: 113
5795 13:42:12.263872 <6>[ 0.576192] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5796 13:42:12.277492 <6>[ 0.590596] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5797 13:42:12.281058 <6>[ 0.600361] KASLR enabled
5798 13:42:12.295458 <6>[ 0.608314] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5799 13:42:12.301909 <6>[ 0.615317] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5800 13:42:12.308914 <6>[ 0.621792] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5801 13:42:12.315390 <6>[ 0.628783] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5802 13:42:12.322455 <6>[ 0.635256] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5803 13:42:12.328689 <6>[ 0.642247] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5804 13:42:12.335877 <6>[ 0.648721] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5805 13:42:12.342033 <6>[ 0.655710] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5806 13:42:12.345728 <6>[ 0.663249] ACPI: Interpreter disabled.
5807 13:42:12.355214 <6>[ 0.671260] iommu: Default domain type: Translated
5808 13:42:12.361835 <6>[ 0.676420] iommu: DMA domain TLB invalidation policy: strict mode
5809 13:42:12.364943 <5>[ 0.683046] SCSI subsystem initialized
5810 13:42:12.371744 <6>[ 0.687491] usbcore: registered new interface driver usbfs
5811 13:42:12.378417 <6>[ 0.693219] usbcore: registered new interface driver hub
5812 13:42:12.381749 <6>[ 0.698761] usbcore: registered new device driver usb
5813 13:42:12.389151 <6>[ 0.705089] pps_core: LinuxPPS API ver. 1 registered
5814 13:42:12.398783 <6>[ 0.710275] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5815 13:42:12.402010 <6>[ 0.719600] PTP clock support registered
5816 13:42:12.405807 <6>[ 0.723852] EDAC MC: Ver: 3.0.0
5817 13:42:12.413588 <6>[ 0.729508] FPGA manager framework
5818 13:42:12.416987 <6>[ 0.733187] Advanced Linux Sound Architecture Driver Initialized.
5819 13:42:12.420505 <6>[ 0.739928] vgaarb: loaded
5820 13:42:12.427483 <6>[ 0.743053] clocksource: Switched to clocksource arch_sys_counter
5821 13:42:12.433813 <5>[ 0.749488] VFS: Disk quotas dquot_6.6.0
5822 13:42:12.440510 <6>[ 0.753662] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5823 13:42:12.443957 <6>[ 0.760836] pnp: PnP ACPI: disabled
5824 13:42:12.451934 <6>[ 0.767736] NET: Registered PF_INET protocol family
5825 13:42:12.458373 <6>[ 0.772965] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5826 13:42:12.470288 <6>[ 0.782874] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5827 13:42:12.479987 <6>[ 0.791627] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5828 13:42:12.486557 <6>[ 0.799578] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5829 13:42:12.493273 <6>[ 0.807810] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5830 13:42:12.499952 <6>[ 0.815902] TCP: Hash tables configured (established 32768 bind 32768)
5831 13:42:12.510488 <6>[ 0.822728] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5832 13:42:12.516927 <6>[ 0.829703] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5833 13:42:12.523856 <6>[ 0.837183] NET: Registered PF_UNIX/PF_LOCAL protocol family
5834 13:42:12.526858 <6>[ 0.843282] RPC: Registered named UNIX socket transport module.
5835 13:42:12.533531 <6>[ 0.849426] RPC: Registered udp transport module.
5836 13:42:12.536967 <6>[ 0.854350] RPC: Registered tcp transport module.
5837 13:42:12.543478 <6>[ 0.859273] RPC: Registered tcp NFSv4.1 backchannel transport module.
5838 13:42:12.549955 <6>[ 0.865926] PCI: CLS 0 bytes, default 64
5839 13:42:12.553618 <6>[ 0.870188] Unpacking initramfs...
5840 13:42:12.575020 <6>[ 0.887672] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5841 13:42:12.584804 <6>[ 0.896390] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5842 13:42:12.588181 <6>[ 0.905299] kvm [1]: IPA Size Limit: 40 bits
5843 13:42:12.595556 <6>[ 0.911655] kvm [1]: vgic-v2@c420000
5844 13:42:12.598769 <6>[ 0.915485] kvm [1]: GIC system register CPU interface enabled
5845 13:42:12.605890 <6>[ 0.921673] kvm [1]: vgic interrupt IRQ18
5846 13:42:12.608688 <6>[ 0.926055] kvm [1]: Hyp mode initialized successfully
5847 13:42:12.616200 <5>[ 0.932391] Initialise system trusted keyrings
5848 13:42:12.622907 <6>[ 0.937178] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5849 13:42:12.631108 <6>[ 0.947116] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5850 13:42:12.637785 <5>[ 0.953557] NFS: Registering the id_resolver key type
5851 13:42:12.641305 <5>[ 0.958873] Key type id_resolver registered
5852 13:42:12.647403 <5>[ 0.963286] Key type id_legacy registered
5853 13:42:12.654737 <6>[ 0.967587] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5854 13:42:12.661088 <6>[ 0.974508] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5855 13:42:12.667746 <6>[ 0.982316] 9p: Installing v9fs 9p2000 file system support
5856 13:42:12.695284 <5>[ 1.011347] Key type asymmetric registered
5857 13:42:12.698677 <5>[ 1.015688] Asymmetric key parser 'x509' registered
5858 13:42:12.709268 <6>[ 1.020836] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5859 13:42:12.711903 <6>[ 1.028450] io scheduler mq-deadline registered
5860 13:42:12.715473 <6>[ 1.033207] io scheduler kyber registered
5861 13:42:12.737612 <6>[ 1.053940] EINJ: ACPI disabled.
5862 13:42:12.744769 <4>[ 1.057689] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5863 13:42:12.782362 <6>[ 1.098485] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5864 13:42:12.790712 <6>[ 1.106960] printk: console [ttyS0] disabled
5865 13:42:12.818613 <6>[ 1.131610] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5866 13:42:12.825577 <6>[ 1.141093] printk: console [ttyS0] enabled
5867 13:42:12.828929 <6>[ 1.141093] printk: console [ttyS0] enabled
5868 13:42:12.835420 <6>[ 1.150010] printk: bootconsole [mtk8250] disabled
5869 13:42:12.838677 <6>[ 1.150010] printk: bootconsole [mtk8250] disabled
5870 13:42:12.848479 <3>[ 1.160534] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5871 13:42:12.854902 <3>[ 1.168916] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5872 13:42:12.884722 <6>[ 1.197322] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5873 13:42:12.891164 <6>[ 1.206980] serial serial0: tty port ttyS1 registered
5874 13:42:12.898127 <6>[ 1.213579] SuperH (H)SCI(F) driver initialized
5875 13:42:12.901186 <6>[ 1.219140] msm_serial: driver initialized
5876 13:42:12.916723 <6>[ 1.229436] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5877 13:42:12.927212 <6>[ 1.238043] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5878 13:42:12.933755 <6>[ 1.246620] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5879 13:42:12.943473 <6>[ 1.255188] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5880 13:42:12.950028 <6>[ 1.263843] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5881 13:42:12.960319 <6>[ 1.272504] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5882 13:42:12.969873 <6>[ 1.281245] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5883 13:42:12.976531 <6>[ 1.289986] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5884 13:42:12.987020 <6>[ 1.298549] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5885 13:42:12.993371 <6>[ 1.307341] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5886 13:42:13.003515 <4>[ 1.319769] cacheinfo: Unable to detect cache hierarchy for CPU 0
5887 13:42:13.012963 <6>[ 1.329129] loop: module loaded
5888 13:42:13.024772 <6>[ 1.341047] vsim1: Bringing 1800000uV into 2700000-2700000uV
5889 13:42:13.042846 <6>[ 1.358949] megasas: 07.719.03.00-rc1
5890 13:42:13.051668 <6>[ 1.367736] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5891 13:42:13.062211 <6>[ 1.378447] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5892 13:42:13.078998 <6>[ 1.395270] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5893 13:42:13.136533 <6>[ 1.445591] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b8
5894 13:42:14.266464 <6>[ 2.582676] Freeing initrd memory: 50908K
5895 13:42:14.281948 <4>[ 2.594786] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5896 13:42:14.288869 <4>[ 2.604036] CPU: 5 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
5897 13:42:14.295536 <4>[ 2.610735] Hardware name: Google juniper sku16 board (DT)
5898 13:42:14.298663 <4>[ 2.616474] Call trace:
5899 13:42:14.302059 <4>[ 2.619175] dump_backtrace.part.0+0xe0/0xf0
5900 13:42:14.305661 <4>[ 2.623713] show_stack+0x18/0x30
5901 13:42:14.308537 <4>[ 2.627287] dump_stack_lvl+0x64/0x80
5902 13:42:14.315484 <4>[ 2.631206] dump_stack+0x18/0x34
5903 13:42:14.318492 <4>[ 2.634775] sysfs_warn_dup+0x64/0x80
5904 13:42:14.321748 <4>[ 2.638697] sysfs_do_create_link_sd+0xf0/0x100
5905 13:42:14.325374 <4>[ 2.643485] sysfs_create_link+0x20/0x40
5906 13:42:14.331759 <4>[ 2.647665] bus_add_device+0x64/0x120
5907 13:42:14.335137 <4>[ 2.651670] device_add+0x354/0x7ec
5908 13:42:14.338321 <4>[ 2.655416] of_device_add+0x44/0x60
5909 13:42:14.344816 <4>[ 2.659250] of_platform_device_create_pdata+0x90/0x124
5910 13:42:14.348378 <4>[ 2.664732] of_platform_bus_create+0x154/0x380
5911 13:42:14.351525 <4>[ 2.669518] of_platform_populate+0x50/0xfc
5912 13:42:14.358101 <4>[ 2.673956] parse_mtd_partitions+0x1d8/0x4e0
5913 13:42:14.361620 <4>[ 2.678572] mtd_device_parse_register+0xec/0x2e0
5914 13:42:14.365152 <4>[ 2.683533] spi_nor_probe+0x280/0x2f4
5915 13:42:14.371604 <4>[ 2.687538] spi_mem_probe+0x6c/0xc0
5916 13:42:14.375307 <4>[ 2.691371] spi_probe+0x84/0xe4
5917 13:42:14.378008 <4>[ 2.694856] really_probe+0xbc/0x2dc
5918 13:42:14.381574 <4>[ 2.698686] __driver_probe_device+0x78/0x114
5919 13:42:14.388160 <4>[ 2.703298] driver_probe_device+0xd8/0x15c
5920 13:42:14.391307 <4>[ 2.707736] __device_attach_driver+0xb8/0x134
5921 13:42:14.394762 <4>[ 2.712433] bus_for_each_drv+0x7c/0xd4
5922 13:42:14.398050 <4>[ 2.716527] __device_attach+0x9c/0x1a0
5923 13:42:14.405043 <4>[ 2.720617] device_initial_probe+0x14/0x20
5924 13:42:14.408434 <4>[ 2.725054] bus_probe_device+0x98/0xa0
5925 13:42:14.411617 <4>[ 2.729144] device_add+0x3c0/0x7ec
5926 13:42:14.414989 <4>[ 2.732889] __spi_add_device+0x78/0x120
5927 13:42:14.421851 <4>[ 2.737067] spi_add_device+0x44/0x80
5928 13:42:14.424855 <4>[ 2.740983] spi_register_controller+0x704/0xb20
5929 13:42:14.431396 <4>[ 2.745855] devm_spi_register_controller+0x4c/0xac
5930 13:42:14.434895 <4>[ 2.750988] mtk_spi_probe+0x4f4/0x684
5931 13:42:14.438386 <4>[ 2.754993] platform_probe+0x68/0xc0
5932 13:42:14.441165 <4>[ 2.758911] really_probe+0xbc/0x2dc
5933 13:42:14.444543 <4>[ 2.762741] __driver_probe_device+0x78/0x114
5934 13:42:14.451338 <4>[ 2.767352] driver_probe_device+0xd8/0x15c
5935 13:42:14.454446 <4>[ 2.771790] __driver_attach+0x94/0x19c
5936 13:42:14.458545 <4>[ 2.775881] bus_for_each_dev+0x74/0xd0
5937 13:42:14.461520 <4>[ 2.779973] driver_attach+0x24/0x30
5938 13:42:14.468149 <4>[ 2.783802] bus_add_driver+0x154/0x20c
5939 13:42:14.471870 <4>[ 2.787892] driver_register+0x78/0x130
5940 13:42:14.474476 <4>[ 2.791982] __platform_driver_register+0x28/0x34
5941 13:42:14.481338 <4>[ 2.796942] mtk_spi_driver_init+0x1c/0x28
5942 13:42:14.484579 <4>[ 2.801298] do_one_initcall+0x64/0x1dc
5943 13:42:14.487621 <4>[ 2.805388] kernel_init_freeable+0x218/0x284
5944 13:42:14.491027 <4>[ 2.810003] kernel_init+0x24/0x12c
5945 13:42:14.497536 <4>[ 2.813749] ret_from_fork+0x10/0x20
5946 13:42:14.506935 <6>[ 2.822633] tun: Universal TUN/TAP device driver, 1.6
5947 13:42:14.509899 <6>[ 2.828943] thunder_xcv, ver 1.0
5948 13:42:14.513338 <6>[ 2.832462] thunder_bgx, ver 1.0
5949 13:42:14.516572 <6>[ 2.835967] nicpf, ver 1.0
5950 13:42:14.527570 <6>[ 2.840344] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5951 13:42:14.530886 <6>[ 2.847828] hns3: Copyright (c) 2017 Huawei Corporation.
5952 13:42:14.537769 <6>[ 2.853426] hclge is initializing
5953 13:42:14.540748 <6>[ 2.857011] e1000: Intel(R) PRO/1000 Network Driver
5954 13:42:14.547927 <6>[ 2.862146] e1000: Copyright (c) 1999-2006 Intel Corporation.
5955 13:42:14.550831 <6>[ 2.868168] e1000e: Intel(R) PRO/1000 Network Driver
5956 13:42:14.557160 <6>[ 2.873389] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5957 13:42:14.563848 <6>[ 2.879585] igb: Intel(R) Gigabit Ethernet Network Driver
5958 13:42:14.570984 <6>[ 2.885242] igb: Copyright (c) 2007-2014 Intel Corporation.
5959 13:42:14.577178 <6>[ 2.891084] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5960 13:42:14.584056 <6>[ 2.897607] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5961 13:42:14.587181 <6>[ 2.904158] sky2: driver version 1.30
5962 13:42:14.593857 <6>[ 2.909423] usbcore: registered new device driver r8152-cfgselector
5963 13:42:14.600584 <6>[ 2.915966] usbcore: registered new interface driver r8152
5964 13:42:14.607424 <6>[ 2.921795] VFIO - User Level meta-driver version: 0.3
5965 13:42:14.613671 <6>[ 2.929572] mtu3 11201000.usb: uwk - reg:0x420, version:101
5966 13:42:14.620807 <4>[ 2.935450] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5967 13:42:14.627049 <6>[ 2.942727] mtu3 11201000.usb: dr_mode: 1, drd: auto
5968 13:42:14.633908 <6>[ 2.947955] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5969 13:42:14.637106 <6>[ 2.954150] mtu3 11201000.usb: usb3-drd: 0
5970 13:42:14.646930 <6>[ 2.959742] mtu3 11201000.usb: xHCI platform device register success...
5971 13:42:14.653471 <4>[ 2.968383] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5972 13:42:14.660562 <6>[ 2.976314] xhci-mtk 11200000.usb: xHCI Host Controller
5973 13:42:14.666560 <6>[ 2.981818] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5974 13:42:14.673492 <6>[ 2.989537] xhci-mtk 11200000.usb: USB3 root hub has no ports
5975 13:42:14.683169 <6>[ 2.995545] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5976 13:42:14.690147 <6>[ 3.004970] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5977 13:42:14.697121 <6>[ 3.011057] xhci-mtk 11200000.usb: xHCI Host Controller
5978 13:42:14.703126 <6>[ 3.016545] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5979 13:42:14.709962 <6>[ 3.024205] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5980 13:42:14.713305 <6>[ 3.031022] hub 1-0:1.0: USB hub found
5981 13:42:14.716797 <6>[ 3.035057] hub 1-0:1.0: 1 port detected
5982 13:42:14.727388 <6>[ 3.040393] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5983 13:42:14.730784 <6>[ 3.049040] hub 2-0:1.0: USB hub found
5984 13:42:14.741177 <3>[ 3.053089] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5985 13:42:14.747638 <6>[ 3.060988] usbcore: registered new interface driver usb-storage
5986 13:42:14.754570 <6>[ 3.067596] usbcore: registered new device driver onboard-usb-hub
5987 13:42:14.766299 <4>[ 3.079177] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
5988 13:42:14.775287 <6>[ 3.091445] mt6397-rtc mt6358-rtc: registered as rtc0
5989 13:42:14.785325 <6>[ 3.096929] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-18T13:42:14 UTC (1721310134)
5990 13:42:14.791763 <6>[ 3.106808] i2c_dev: i2c /dev entries driver
5991 13:42:14.801911 <6>[ 3.113223] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5992 13:42:14.808167 <6>[ 3.121543] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5993 13:42:14.815103 <6>[ 3.130447] i2c 4-0058: Fixed dependency cycle(s) with /panel
5994 13:42:14.821600 <6>[ 3.136479] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
5995 13:42:14.840215 <6>[ 3.155935] cpu cpu0: EM: created perf domain
5996 13:42:14.849886 <6>[ 3.161432] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
5997 13:42:14.856359 <6>[ 3.172708] cpu cpu4: EM: created perf domain
5998 13:42:14.864173 <6>[ 3.179794] sdhci: Secure Digital Host Controller Interface driver
5999 13:42:14.870531 <6>[ 3.186248] sdhci: Copyright(c) Pierre Ossman
6000 13:42:14.877131 <6>[ 3.191668] Synopsys Designware Multimedia Card Interface Driver
6001 13:42:14.883544 <6>[ 3.192233] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6002 13:42:14.886773 <6>[ 3.198739] sdhci-pltfm: SDHCI platform and OF driver helper
6003 13:42:14.895864 <6>[ 3.212145] ledtrig-cpu: registered to indicate activity on CPUs
6004 13:42:14.904365 <6>[ 3.219874] usbcore: registered new interface driver usbhid
6005 13:42:14.907110 <6>[ 3.225713] usbhid: USB HID core driver
6006 13:42:14.917831 <6>[ 3.229980] spi_master spi2: will run message pump with realtime priority
6007 13:42:14.921260 <4>[ 3.229987] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6008 13:42:14.928784 <4>[ 3.244241] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6009 13:42:14.942539 <6>[ 3.249217] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6010 13:42:14.961046 <6>[ 3.267286] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6011 13:42:14.968177 <4>[ 3.275980] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6012 13:42:14.971216 <6>[ 3.282415] cros-ec-spi spi2.0: Chrome EC device registered
6013 13:42:14.985595 <4>[ 3.298368] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6014 13:42:14.997911 <4>[ 3.310855] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6015 13:42:15.004390 <4>[ 3.319737] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6016 13:42:15.011008 <6>[ 3.321740] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6017 13:42:15.017766 <6>[ 3.332288] mmc0: new HS400 MMC card at address 0001
6018 13:42:15.024727 <6>[ 3.332959] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6019 13:42:15.027786 <6>[ 3.345700] mmcblk0: mmc0:0001 TB2932 29.2 GiB
6020 13:42:15.037926 <6>[ 3.348186] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6021 13:42:15.044255 <6>[ 3.356221] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6022 13:42:15.054571 <6>[ 3.363399] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6023 13:42:15.061173 <6>[ 3.367302] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
6024 13:42:15.064336 <6>[ 3.377302] NET: Registered PF_PACKET protocol family
6025 13:42:15.071061 <6>[ 3.382580] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
6026 13:42:15.074074 <6>[ 3.386674] 9pnet: Installing 9P2000 support
6027 13:42:15.081118 <6>[ 3.393246] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
6028 13:42:15.094078 <6>[ 3.395447] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6029 13:42:15.104089 <6>[ 3.395866] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6030 13:42:15.107371 <5>[ 3.396275] Key type dns_resolver registered
6031 13:42:15.113730 <6>[ 3.429775] registered taskstats version 1
6032 13:42:15.117169 <5>[ 3.434147] Loading compiled-in X.509 certificates
6033 13:42:15.142714 <6>[ 3.455190] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6034 13:42:15.162024 <3>[ 3.474670] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6035 13:42:15.187745 <6>[ 3.497160] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6036 13:42:15.198213 <6>[ 3.510449] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6037 13:42:15.208025 <6>[ 3.519030] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6038 13:42:15.214257 <6>[ 3.527574] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6039 13:42:15.224090 <6>[ 3.536096] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6040 13:42:15.231219 <6>[ 3.544614] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6041 13:42:15.241146 <6>[ 3.553134] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6042 13:42:15.247501 <6>[ 3.561652] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6043 13:42:15.254629 <6>[ 3.570831] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6044 13:42:15.262323 <6>[ 3.578340] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6045 13:42:15.269535 <6>[ 3.585642] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6046 13:42:15.280363 <6>[ 3.592929] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6047 13:42:15.286738 <6>[ 3.600421] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6048 13:42:15.293347 <6>[ 3.608850] panfrost 13040000.gpu: clock rate = 511999970
6049 13:42:15.296680 <6>[ 3.611257] hub 1-1:1.0: USB hub found
6050 13:42:15.306495 <6>[ 3.614533] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6051 13:42:15.310742 <6>[ 3.619002] hub 1-1:1.0: 3 ports detected
6052 13:42:15.320202 <6>[ 3.628508] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6053 13:42:15.326695 <6>[ 3.640347] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6054 13:42:15.339964 <6>[ 3.648780] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6055 13:42:15.346206 <6>[ 3.660856] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6056 13:42:15.358474 <6>[ 3.671056] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6057 13:42:15.368072 <6>[ 3.679933] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6058 13:42:15.378033 <6>[ 3.689080] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6059 13:42:15.384727 <6>[ 3.698217] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6060 13:42:15.394622 <6>[ 3.707346] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6061 13:42:15.404849 <6>[ 3.716647] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6062 13:42:15.414865 <6>[ 3.725950] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6063 13:42:15.424648 <6>[ 3.735425] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6064 13:42:15.431438 <6>[ 3.744899] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6065 13:42:15.441275 <6>[ 3.754028] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6066 13:42:15.514168 <6>[ 3.826842] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6067 13:42:15.523673 <6>[ 3.835718] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6068 13:42:15.534316 <6>[ 3.847176] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6069 13:42:15.622172 <6>[ 3.935205] usb 1-1.1: new high-speed USB device number 3 using xhci-mtk
6070 13:42:16.205064 <6>[ 4.041162] hub 1-1.1:1.0: USB hub found
6071 13:42:16.208706 <6>[ 4.041475] hub 1-1.1:1.0: 4 ports detected
6072 13:42:16.214740 <6>[ 4.504558] Console: switching to colour frame buffer device 170x48
6073 13:42:16.224567 <6>[ 4.536585] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6074 13:42:16.244141 <6>[ 4.553137] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6075 13:42:16.260270 <6>[ 4.569614] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6076 13:42:16.266757 <6>[ 4.581859] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6077 13:42:16.278088 <6>[ 4.590291] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6078 13:42:16.287156 <6>[ 4.597214] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6079 13:42:16.307351 <6>[ 4.616750] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6080 13:42:16.314169 <6>[ 4.627118] usb 1-1.2: new high-speed USB device number 4 using xhci-mtk
6081 13:42:16.510606 <6>[ 4.823387] r8152-cfgselector 1-1.2: reset high-speed USB device number 4 using xhci-mtk
6082 13:42:16.650141 <6>[ 4.962822] r8152 1-1.2:1.0: load rtl8153b-2 v1 10/23/19 successfully
6083 13:42:16.698668 <6>[ 5.011265] usb 1-1.1.1: new high-speed USB device number 5 using xhci-mtk
6084 13:42:16.701543 <6>[ 5.019570] r8152 1-1.2:1.0 eth0: v1.12.13
6085 13:42:16.727423 <6>[ 5.036670] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6086 13:42:16.894278 <6>[ 5.207224] usb 1-1.3: new high-speed USB device number 6 using xhci-mtk
6087 13:42:17.029969 <6>[ 5.339700] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6088 13:42:17.082546 <6>[ 5.395460] r8152-cfgselector 1-1.1.1: reset high-speed USB device number 5 using xhci-mtk
6089 13:42:17.214808 <6>[ 5.527695] r8152 1-1.1.1:1.0: load rtl8153b-2 v1 10/23/19 successfully
6090 13:42:17.256384 <6>[ 5.572113] r8152 1-1.1.1:1.0 eth1: v1.12.13
6091 13:42:17.284632 <6>[ 5.593908] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6092 13:42:17.311440 <6>[ 5.620909] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6093 13:42:18.368001 <6>[ 6.683976] r8152 1-1.2:1.0 eth0: carrier on
6094 13:42:20.551280 <5>[ 6.707092] Sending DHCP requests .., OK
6095 13:42:20.563198 <6>[ 8.876180] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.17
6096 13:42:20.573579 <6>[ 8.889387] IP-Config: Complete:
6097 13:42:20.588240 <6>[ 8.897713] device=eth0, hwaddr=00:e0:4c:68:03:2b, ipaddr=192.168.201.17, mask=255.255.255.0, gw=192.168.201.1
6098 13:42:20.600717 <6>[ 8.913416] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5, domain=lava-rack, nis-domain=(none)
6099 13:42:20.614155 <6>[ 8.926650] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6100 13:42:20.621472 <6>[ 8.926658] nameserver0=192.168.201.1
6101 13:42:20.653297 <6>[ 8.969075] clk: Disabling unused clocks
6102 13:42:20.657963 <6>[ 8.977096] ALSA device list:
6103 13:42:20.666599 <6>[ 8.982586] No soundcards found.
6104 13:42:20.674500 <6>[ 8.990722] Freeing unused kernel memory: 8512K
6105 13:42:20.681523 <6>[ 8.997601] Run /init as init process
6106 13:42:20.716684 <6>[ 9.032119] NET: Registered PF_INET6 protocol family
6107 13:42:20.724441 <6>[ 9.040100] Segment Routing with IPv6
6108 13:42:20.727332 <6>[ 9.045115] In-situ OAM (IOAM) with IPv6
6109 13:42:20.772175 <30>[ 9.061728] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6110 13:42:20.781818 <30>[ 9.097619] systemd[1]: Detected architecture arm64.
6111 13:42:20.785172
6112 13:42:20.788309 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6113 13:42:20.788815
6114 13:42:20.807891 <30>[ 9.123832] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6115 13:42:20.965341 <30>[ 9.277897] systemd[1]: Queued start job for default target graphical.target.
6116 13:42:20.992919 <30>[ 9.305202] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6117 13:42:21.002211 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6118 13:42:21.019600 <30>[ 9.332123] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6119 13:42:21.029583 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6120 13:42:21.052716 <30>[ 9.364741] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6121 13:42:21.063878 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6122 13:42:21.083274 <30>[ 9.396045] systemd[1]: Created slice user.slice - User and Session Slice.
6123 13:42:21.093589 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6124 13:42:21.114039 <30>[ 9.423584] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6125 13:42:21.126504 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6126 13:42:21.146149 <30>[ 9.455484] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6127 13:42:21.158159 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6128 13:42:21.184552 <30>[ 9.487368] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6129 13:42:21.203764 <30>[ 9.515990] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6130 13:42:21.210866 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6131 13:42:21.230490 <30>[ 9.543237] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6132 13:42:21.243427 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6133 13:42:21.262660 <30>[ 9.575344] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6134 13:42:21.277181 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6135 13:42:21.291096 <30>[ 9.607359] systemd[1]: Reached target paths.target - Path Units.
6136 13:42:21.306255 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6137 13:42:21.323043 <30>[ 9.635680] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6138 13:42:21.335783 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6139 13:42:21.351305 <30>[ 9.667244] systemd[1]: Reached target slices.target - Slice Units.
6140 13:42:21.366206 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6141 13:42:21.379571 <30>[ 9.695280] systemd[1]: Reached target swap.target - Swaps.
6142 13:42:21.390133 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6143 13:42:21.411560 <30>[ 9.724099] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6144 13:42:21.425458 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6145 13:42:21.442884 <30>[ 9.755792] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6146 13:42:21.457209 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6147 13:42:21.476263 <30>[ 9.788803] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6148 13:42:21.489723 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6149 13:42:21.507099 <30>[ 9.819980] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6150 13:42:21.521811 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6151 13:42:21.539139 <30>[ 9.851884] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6152 13:42:21.552092 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6153 13:42:21.571291 <30>[ 9.884070] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6154 13:42:21.584871 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6155 13:42:21.602845 <30>[ 9.915942] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6156 13:42:21.616316 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6157 13:42:21.635040 <30>[ 9.947726] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6158 13:42:21.648321 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6159 13:42:21.690922 <30>[ 10.003446] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6160 13:42:21.701872 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6161 13:42:21.724504 <30>[ 10.037136] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6162 13:42:21.735736 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6163 13:42:21.755030 <30>[ 10.067606] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6164 13:42:21.767183 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6165 13:42:21.794223 <30>[ 10.100572] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6166 13:42:21.817424 <30>[ 10.130134] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6167 13:42:21.830369 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6168 13:42:21.875225 <30>[ 10.187814] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6169 13:42:21.889169 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6170 13:42:21.912281 <30>[ 10.224851] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6171 13:42:21.929318 Startin<6>[ 10.238876] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6172 13:42:21.932138 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6173 13:42:21.971333 <30>[ 10.284062] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6174 13:42:21.982109 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6175 13:42:22.004062 <30>[ 10.316819] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6176 13:42:22.018961 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6177 13:42:22.059710 <30>[ 10.372267] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6178 13:42:22.071346 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6179 13:42:22.101384 <30>[ 10.413781] systemd[1]: Starting systemd-journald.service - Journal Service...
6180 13:42:22.112177 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6181 13:42:22.130270 <30>[ 10.443238] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6182 13:42:22.141366 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6183 13:42:22.186878 <30>[ 10.496195] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6184 13:42:22.198157 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6185 13:42:22.219873 <30>[ 10.532316] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6186 13:42:22.232653 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6187 13:42:22.254425 <30>[ 10.566948] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6188 13:42:22.266135 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6189 13:42:22.286810 <30>[ 10.599222] systemd[1]: Started systemd-journald.service - Journal Service.
6190 13:42:22.296566 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6191 13:42:22.316971 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6192 13:42:22.335545 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6193 13:42:22.355462 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6194 13:42:22.376467 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6195 13:42:22.397780 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6196 13:42:22.421732 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6197 13:42:22.445602 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6198 13:42:22.465322 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6199 13:42:22.490826 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6200 13:42:22.512728 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6201 13:42:22.536478 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6202 13:42:22.557629 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6203 13:42:22.616229 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6204 13:42:22.645081 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6205 13:42:22.673442 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6206 13:42:22.691765 See 'systemctl status systemd-remount-fs.service' for details.
6207 13:42:22.712662 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6208 13:42:22.732386 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6209 13:42:22.752077 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6210 13:42:22.800089 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6211 13:42:22.817096 <46>[ 11.129818] systemd-journald[202]: Received client request to flush runtime journal.
6212 13:42:22.829003 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6213 13:42:22.853186 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6214 13:42:22.875896 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6215 13:42:22.897805 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6216 13:42:22.922188 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6217 13:42:22.971563 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6218 13:42:23.001986 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6219 13:42:23.023829 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6220 13:42:23.043149 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6221 13:42:23.088049 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6222 13:42:23.116841 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6223 13:42:23.139751 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6224 13:42:23.195745 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6225 13:42:23.218008 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6226 13:42:23.235160 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6227 13:42:23.249436 <6>[ 11.565215] r8152 1-1.1.1:1.0 enx88541f0f7aca: renamed from eth1
6228 13:42:23.264107 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6229 13:42:23.289861 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6230 13:42:23.307311 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6231 13:42:23.438907 <6>[ 11.748283] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6232 13:42:23.455609 <4>[ 11.768139] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6233 13:42:23.467489 <4>[ 11.780302] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6234 13:42:23.478292 <6>[ 11.791017] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6235 13:42:23.488397 <3>[ 11.798343] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6236 13:42:23.492126 <3>[ 11.802915] thermal_sys: Failed to find 'trips' node
6237 13:42:23.501625 <3>[ 11.809069] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6238 13:42:23.508252 <3>[ 11.814466] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6239 13:42:23.518225 <3>[ 11.821095] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6240 13:42:23.528399 <3>[ 11.828708] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6241 13:42:23.534842 <3>[ 11.839386] elan_i2c 2-0015: Error applying setting, reverse things back
6242 13:42:23.544893 <5>[ 11.851593] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6243 13:42:23.551806 <3>[ 11.856984] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6244 13:42:23.561152 <4>[ 11.857006] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6245 13:42:23.564645 <3>[ 11.870681] thermal_sys: Failed to find 'trips' node
6246 13:42:23.574448 <3>[ 11.873810] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6247 13:42:23.578105 <6>[ 11.878172] mc: Linux media interface: v0.10
6248 13:42:23.584359 <3>[ 11.881281] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6249 13:42:23.591876 <5>[ 11.881605] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6250 13:42:23.603197 <6>[ 11.881835] cs_system_cfg: CoreSight Configuration manager initialised
6251 13:42:23.613516 <5>[ 11.882909] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6252 13:42:23.623101 <4>[ 11.882981] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6253 13:42:23.630491 <6>[ 11.882987] cfg80211: failed to load regulatory.db
6254 13:42:23.640822 <3>[ 11.886581] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6255 13:42:23.650518 <3>[ 11.894948] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6256 13:42:23.657192 <4>[ 11.894954] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6257 13:42:23.663973 <6>[ 11.895339] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6258 13:42:23.673608 <4>[ 11.898224] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6259 13:42:23.684488 <6>[ 11.898858] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6260 13:42:23.694451 <3>[ 11.899740] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6261 13:42:23.704608 <6>[ 11.900514] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6262 13:42:23.717603 <3>[ 11.900831] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6263 13:42:23.727445 <6>[ 11.960097] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6264 13:42:23.733870 <3>[ 11.961689] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6265 13:42:23.740943 <6>[ 11.979526] videodev: Linux video capture interface: v2.00
6266 13:42:23.751064 <3>[ 11.986491] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6267 13:42:23.757463 <6>[ 11.986898] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6268 13:42:23.767231 <6>[ 11.987033] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6269 13:42:23.773879 <6>[ 11.987112] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6270 13:42:23.780312 <6>[ 11.997090] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6271 13:42:23.787965 <3>[ 12.000461] mtk-scp 10500000.scp: invalid resource
6272 13:42:23.794647 <6>[ 12.000533] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6273 13:42:23.801111 <6>[ 12.001573] remoteproc remoteproc0: scp is available
6274 13:42:23.807740 <4>[ 12.001696] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6275 13:42:23.814620 <6>[ 12.001704] remoteproc remoteproc0: powering up scp
6276 13:42:23.824723 <4>[ 12.001733] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6277 13:42:23.828024 <3>[ 12.001737] remoteproc remoteproc0: request_firmware failed: -2
6278 13:42:23.837785 <3>[ 12.006331] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6279 13:42:23.841574 <6>[ 12.015579] Bluetooth: Core ver 2.22
6280 13:42:23.852034 <6>[ 12.016760] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6281 13:42:23.858384 <6>[ 12.025692] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6282 13:42:23.868831 <6>[ 12.025800] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6283 13:42:23.878821 <3>[ 12.025806] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6284 13:42:23.885394 <3>[ 12.025861] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6285 13:42:23.892818 <6>[ 12.038594] NET: Registered PF_BLUETOOTH protocol family
6286 13:42:23.902619 <6>[ 12.047627] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6287 13:42:23.909288 <6>[ 12.055981] Bluetooth: HCI device and connection manager initialized
6288 13:42:23.916210 <6>[ 12.057399] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6289 13:42:23.922659 <6>[ 12.071812] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6290 13:42:23.929923 <6>[ 12.078930] Bluetooth: HCI socket layer initialized
6291 13:42:23.943117 <6>[ 12.084088] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6292 13:42:23.949726 <6>[ 12.084379] usbcore: registered new interface driver uvcvideo
6293 13:42:23.956290 <6>[ 12.087008] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6294 13:42:23.962810 <6>[ 12.088199] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video2
6295 13:42:23.970113 <6>[ 12.094762] Bluetooth: L2CAP socket layer initialized
6296 13:42:23.977773 <6>[ 12.094781] Bluetooth: SCO socket layer initialized
6297 13:42:23.988264 <6>[ 12.108449] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6298 13:42:23.994647 <6>[ 12.108952] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6299 13:42:24.008445 <3>[ 12.108956] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6300 13:42:24.015291 <3>[ 12.109605] debugfs: File 'Playback' in directory 'dapm' already present!
6301 13:42:24.025676 <3>[ 12.109609] debugfs: File 'Capture' in directory 'dapm' already present!
6302 13:42:24.035885 <6>[ 12.111736] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6303 13:42:24.045377 <6>[ 12.116155] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6304 13:42:24.052124 <6>[ 12.130817] Bluetooth: HCI UART driver ver 2.3
6305 13:42:24.061864 <6>[ 12.135791] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6306 13:42:24.068403 <6>[ 12.144136] Bluetooth: HCI UART protocol H4 registered
6307 13:42:24.075115 <6>[ 12.144197] Bluetooth: HCI UART protocol LL registered
6308 13:42:24.081783 <6>[ 12.298260] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6309 13:42:24.088668 <6>[ 12.298408] Bluetooth: HCI UART protocol Three-wire (H5) registered
6310 13:42:24.123726 [[0;32m OK [<6>[ 12.436685] Bluetooth: HCI UART protocol Broadcom registered
6311 13:42:24.133668 0m] Created slic<4>[ 12.440125] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6312 13:42:24.137798 <4>[ 12.440125] Fallback method does not support PEC.
6313 13:42:24.144490 e [0;1;39msyste<6>[ 12.443941] Bluetooth: HCI UART protocol QCA registered
6314 13:42:24.151575 m-syste…- Slic<6>[ 12.445136] Bluetooth: hci0: setting up ROME/QCA6390
6315 13:42:24.162705 e /system/system<3>[ 12.461099] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6316 13:42:24.163228 d-backlight.
6317 13:42:24.168911 <6>[ 12.465720] Bluetooth: HCI UART protocol Marvell registered
6318 13:42:24.175476 <3>[ 12.477593] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6319 13:42:24.194670 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m <3>[ 12.507964] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6320 13:42:24.197796 - System Time Set.
6321 13:42:24.211996 <3>[ 12.524815] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6322 13:42:24.229510 <3>[ 12.541587] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6323 13:42:24.241436 <3>[ 12.552214] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6324 13:42:24.249020 <3>[ 12.559260] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6325 13:42:24.256624 <3>[ 12.567141] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6326 13:42:24.266012 <3>[ 12.575728] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6327 13:42:24.292387 Starting [0;1;39msyste<3>[ 12.602381] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6328 13:42:24.295819 md-backlight…ess of backlight:backlight_lcd0...
6329 13:42:24.318035 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6330 13:42:24.331251 <6>[ 12.644016] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6331 13:42:24.343183 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6332 13:42:24.353959 <3>[ 12.669752] Bluetooth: hci0: Frame reassembly failed (-84)
6333 13:42:24.387812 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6334 13:42:24.408580 <4>[ 12.724042] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6335 13:42:24.429869 <4>[ 12.742653] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6336 13:42:24.444588 [[0;32m OK [0m] Reached target [0;1;39mblue<4>[ 12.756874] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6337 13:42:24.458053 tooth.target[0m - Bluetooth Sup<4>[ 12.770896] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6338 13:42:24.458575 port.
6339 13:42:24.475188 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6340 13:42:24.496526 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6341 13:42:24.512371 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6342 13:42:24.532094 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6343 13:42:24.550573 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6344 13:42:24.565321 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6345 13:42:24.583249 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6346 13:42:24.600533 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6347 13:42:24.616370 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6348 13:42:24.623050 <6>[ 12.936693] Bluetooth: hci0: QCA Product ID :0x00000008
6349 13:42:24.630749 <6>[ 12.946696] Bluetooth: hci0: QCA SOC Version :0x00000044
6350 13:42:24.637485 <6>[ 12.946708] Bluetooth: hci0: QCA ROM Version :0x00000302
6351 13:42:24.647090 [[0;32m OK [0m] Reached target [0;1;39mbasi<6>[ 12.946714] Bluetooth: hci0: QCA Patch Version:0x00000111
6352 13:42:24.650698 c.target[0m - Basic System.
6353 13:42:24.660066 <6>[ 12.975422] Bluetooth: hci0: QCA controller version 0x00440302
6354 13:42:24.672196 <6>[ 12.984804] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6355 13:42:24.705947 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6356 13:42:24.732866 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6357 13:42:24.756140 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6358 13:42:24.775634 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6359 13:42:24.813466 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6360 13:42:24.880334 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6361 13:42:24.923152 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6362 13:42:24.941361 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6363 13:42:24.983709 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6364 13:42:25.003071 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6365 13:42:25.022514 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6366 13:42:25.044527 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6367 13:42:25.061668 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6368 13:42:25.079448 <6>[ 13.392157] Bluetooth: hci0: QCA Downloading qca/nvm_00440302_i2s.bin
6369 13:42:25.089400 <4>[ 13.401792] bluetooth hci0: Direct firmware load for qca/nvm_00440302_i2s.bin failed with error -2
6370 13:42:25.102205 <3>[ 13.414381] Bluetooth: hci0: QCA Failed to request file: qca/nvm_00440302_i2s.bin (-2)
6371 13:42:25.109753 <3>[ 13.425800] Bluetooth: hci0: QCA Failed to download NVM (-2)
6372 13:42:25.136439 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6373 13:42:25.174710 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6374 13:42:25.234585
6375 13:42:25.237773 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6376 13:42:25.238202
6377 13:42:25.241170 debian-bookworm-arm64 login: root (automatic login)
6378 13:42:25.241600
6379 13:42:25.266889 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Thu Jul 18 12:53:03 UTC 2024 aarch64
6380 13:42:25.267401
6381 13:42:25.273127 The programs included with the Debian GNU/Linux system are free software;
6382 13:42:25.279842 the exact distribution terms for each program are described in the
6383 13:42:25.283208 individual files in /usr/share/doc/*/copyright.
6384 13:42:25.283743
6385 13:42:25.290175 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6386 13:42:25.293347 permitted by applicable law.
6387 13:42:25.294836 Matched prompt #10: / #
6389 13:42:25.296195 Setting prompt string to ['/ #']
6390 13:42:25.296664 end: 2.2.5.1 login-action (duration 00:00:14) [common]
6392 13:42:25.297748 end: 2.2.5 auto-login-action (duration 00:00:14) [common]
6393 13:42:25.298198 start: 2.2.6 expect-shell-connection (timeout 00:03:30) [common]
6394 13:42:25.298574 Setting prompt string to ['/ #']
6395 13:42:25.298892 Forcing a shell prompt, looking for ['/ #']
6396 13:42:25.299199 Sending line: ''
6398 13:42:25.350509 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6399 13:42:25.350918 Waiting using forced prompt support (timeout 00:02:30)
6400 13:42:25.356362 / #
6401 13:42:25.357271 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6402 13:42:25.357771 start: 2.2.7 export-device-env (timeout 00:03:30) [common]
6403 13:42:25.358238 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6404 13:42:25.358671 end: 2.2 depthcharge-retry (duration 00:01:30) [common]
6405 13:42:25.359126 end: 2 depthcharge-action (duration 00:01:30) [common]
6406 13:42:25.359570 start: 3 lava-test-retry (timeout 00:05:00) [common]
6407 13:42:25.360034 start: 3.1 lava-test-shell (timeout 00:05:00) [common]
6408 13:42:25.360419 Using namespace: common
6409 13:42:25.360758 Sending line: '#'
6411 13:42:25.462241 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:05:00)
6412 13:42:25.468131 / # #
6413 13:42:25.468919 Using /lava-14879031
6414 13:42:25.469315 Sending line: 'export SHELL=/bin/sh'
6416 13:42:25.576453 / # export SHELL=/bin/sh
6417 13:42:25.577140 Sending line: '. /lava-14879031/environment'
6419 13:42:25.684060 / # . /lava-14879031/environment
6420 13:42:25.684813 Sending line: '/lava-14879031/bin/lava-test-runner /lava-14879031/0'
6422 13:42:25.786186 Test shell timeout: 10s (minimum of the action and connection timeout)
6423 13:42:25.791870 / # /lava-14879031/bin/lava-test-runner /lava-14879031/0
6424 13:42:25.816618 + export TESTRUN_ID=0_cros-ec
6425 13:42:25.826578 + cd /lava-14879031<8>[ 14.138957] <LAVA_SIGNAL_STARTRUN 0_cros-ec 14879031_1.5.2.3.1>
6426 13:42:25.827108 /0/tests/0_cros-ec
6427 13:42:25.827741 Received signal: <STARTRUN> 0_cros-ec 14879031_1.5.2.3.1
6428 13:42:25.828096 Starting test lava.0_cros-ec (14879031_1.5.2.3.1)
6429 13:42:25.828511 Skipping test definition patterns.
6430 13:42:25.830439 + cat uuid
6431 13:42:25.830978 + UUID=14879031_1.5.2.3.1
6432 13:42:25.833414 + set +x
6433 13:42:25.836321 + python3 -m cros.runners.lava_runner -v
6434 13:42:26.437653 test_cros_ec_accel_iio_abi (cros.tests.cros_ec_accel.TestCrosECAccel.test_cros_ec_accel_iio_abi)
6435 13:42:26.444396 Checks the cros-ec accelerometer IIO ABI. ... skipped 'No cros-ec-accel found'
6436 13:42:26.444816
6437 13:42:26.450976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_accel_iio_abi RESULT=skip>
6438 13:42:26.451660 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_accel_iio_abi RESULT=skip
6440 13:42:26.464416 test_cros_ec_accel_iio_data_is_valid (cros.tests.cros_ec_accel.TestCrosECAccel.test_cros_ec_accel_iio_data_is_valid)
6441 13:42:26.471151 Validates accelerometer data by computing the magnitude. If the ... skipped 'No accelerometer found'
6442 13:42:26.474682
6443 13:42:26.480786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_accel_iio_data_is_valid RESULT=skip>
6444 13:42:26.481467 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_accel_iio_data_is_valid RESULT=skip
6446 13:42:26.491104 test_cros_ec_gyro_iio_abi (cros.tests.cros_ec_gyro.TestCrosECGyro.test_cros_ec_gyro_iio_abi)
6447 13:42:26.497912 Checks the cros-ec gyroscope IIO ABI. ... skipped 'No cros-ec-gyro found'
6448 13:42:26.498415
6449 13:42:26.504692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_gyro_iio_abi RESULT=skip>
6450 13:42:26.505443 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_gyro_iio_abi RESULT=skip
6452 13:42:26.511081 test_cros_ec_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_abi)
6453 13:42:26.518174 Checks the standard ABI for the main Embedded Controller. ... ok
6454 13:42:26.518675
6455 13:42:26.521360 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_abi RESULT=pass
6457 13:42:26.524186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_abi RESULT=pass>
6458 13:42:26.531360 test_cros_ec_chardev (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_chardev)
6459 13:42:26.534588 Checks the main Embedded controller character device. ... ok
6460 13:42:26.535222
6461 13:42:26.541192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_chardev RESULT=pass>
6462 13:42:26.541997 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_chardev RESULT=pass
6464 13:42:26.551125 test_cros_ec_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_hello)
6465 13:42:26.554243 Checks basic comunication with the main Embedded controller. ... ok
6466 13:42:26.557674
6467 13:42:26.561293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_hello RESULT=pass>
6468 13:42:26.561971 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_hello RESULT=pass
6470 13:42:26.567685 test_cros_fp_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_abi)
6471 13:42:26.577744 Checks the standard ABI for the Fingerprint EC. ... skipped 'MCU cros_fp not supported'
6472 13:42:26.578250
6473 13:42:26.584624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_abi RESULT=skip>
6474 13:42:26.585478 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_abi RESULT=skip
6476 13:42:26.590918 test_cros_fp_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_hello)
6477 13:42:26.597617 Checks basic comunication with the fingerprint controller. ... skipped 'MCU cros_fp not found'
6478 13:42:26.598120
6479 13:42:26.604226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_hello RESULT=skip>
6480 13:42:26.604976 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_hello RESULT=skip
6482 13:42:26.610862 test_cros_fp_reboot (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_reboot)
6483 13:42:26.618125 Test reboot command on Fingerprint MCU. ... skipped 'MCU cros_fp not found'
6484 13:42:26.618650
6485 13:42:26.624344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_reboot RESULT=skip>
6486 13:42:26.625097 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_reboot RESULT=skip
6488 13:42:26.631171 test_cros_pd_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_pd_abi)
6489 13:42:26.638159 Checks the standard ABI for the Power Delivery EC. ... skipped 'MCU cros_pd not supported'
6490 13:42:26.638665
6491 13:42:26.644714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_pd_abi RESULT=skip>
6492 13:42:26.645468 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_pd_abi RESULT=skip
6494 13:42:26.651435 test_cros_pd_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_pd_hello)
6495 13:42:26.661643 Checks basic comunication with the power delivery controller. ... skipped 'MCU cros_pd not found'
6496 13:42:26.662156
6497 13:42:26.668419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_pd_hello RESULT=skip>
6498 13:42:26.669178 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_pd_hello RESULT=skip
6500 13:42:26.674696 test_cros_tp_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_tp_abi)
6501 13:42:26.681659 Checks the standard ABI for the Touchpad EC. ... skipped 'MCU cros_tp not supported'
6502 13:42:26.682171
6503 13:42:26.688189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_tp_abi RESULT=skip>
6504 13:42:26.688943 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_tp_abi RESULT=skip
6506 13:42:26.694705 test_cros_tp_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_tp_hello)
6507 13:42:26.701583 Checks basic comunication with the touchpad controller. ... skipped 'MCU cros_tp not found'
6508 13:42:26.702250
6509 13:42:26.708104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_tp_hello RESULT=skip>
6510 13:42:26.708865 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_tp_hello RESULT=skip
6512 13:42:26.718035 test_cros_ec_pwm_backlight (cros.tests.cros_ec_pwm.TestCrosECPWM.test_cros_ec_pwm_backlight)
6513 13:42:26.728144 Check that the backlight is connected to a pwm of the EC and that ... skipped 'No backlight pwm found'
6514 13:42:26.728649
6515 13:42:26.735056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_pwm_backlight RESULT=skip>
6516 13:42:26.735811 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_pwm_backlight RESULT=skip
6518 13:42:26.741546 test_cros_ec_battery_abi (cros.tests.cros_ec_power.TestCrosECPower.test_cros_ec_battery_abi)
6519 13:42:26.747952 Check the cros battery ABI. ... skipped 'No BAT found'
6520 13:42:26.748465
6521 13:42:26.754722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_battery_abi RESULT=skip>
6522 13:42:26.755504 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_battery_abi RESULT=skip
6524 13:42:26.761654 test_cros_ec_usbpd_charger_abi (cros.tests.cros_ec_power.TestCrosECPower.test_cros_ec_usbpd_charger_abi)
6525 13:42:26.768258 Check the cros USBPD charger ABI. ... skipped 'No CROS_USBPD_CHARGER found'
6526 13:42:26.771487
6527 13:42:26.778216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_usbpd_charger_abi RESULT=skip>
6528 13:42:26.778978 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_usbpd_charger_abi RESULT=skip
6530 13:42:26.785041 test_cros_ec_rtc_abi (cros.tests.cros_ec_rtc.TestCrosECRTC.test_cros_ec_rtc_abi)
6531 13:42:26.791506 Check the cros RTC ABI. ... skipped 'EC_FEATURE_RTC not supported, skipping'
6532 13:42:26.792013
6533 13:42:26.798170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_rtc_abi RESULT=skip>
6534 13:42:26.798932 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_rtc_abi RESULT=skip
6536 13:42:26.808125 test_cros_ec_extcon_usbc_abi (cros.tests.cros_ec_extcon.TestCrosECextcon.test_cros_ec_extcon_usbc_abi)
6537 13:42:26.811092 Checks the cros-ec extcon ABI. ... skipped 'No extcon device found'
6538 13:42:26.814620
6539 13:42:26.821508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_extcon_usbc_abi RESULT=skip>
6540 13:42:26.822018
6541 13:42:26.822599 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_extcon_usbc_abi RESULT=skip
6543 13:42:26.831229 ----------------------------------------------------------<8>[ 15.145277] <LAVA_SIGNAL_ENDRUN 0_cros-ec 14879031_1.5.2.3.1>
6544 13:42:26.831750 ------------
6545 13:42:26.832335 Received signal: <ENDRUN> 0_cros-ec 14879031_1.5.2.3.1
6546 13:42:26.832844 Ending use of test pattern.
6547 13:42:26.833196 Ending test lava.0_cros-ec (14879031_1.5.2.3.1), duration 1.01
6549 13:42:26.834956 Ran 18 tests in 0.361s
6550 13:42:26.835298
6551 13:42:26.835600 OK (skipped=15)
6552 13:42:26.837844 + set +x
6553 13:42:26.838370 <LAVA_TEST_RUNNER EXIT>
6554 13:42:26.838954 ok: lava_test_shell seems to have completed
6555 13:42:26.839854 test_cros_ec_accel_iio_abi: skip
test_cros_ec_accel_iio_data_is_valid: skip
test_cros_ec_gyro_iio_abi: skip
test_cros_ec_abi: pass
test_cros_ec_chardev: pass
test_cros_ec_hello: pass
test_cros_fp_abi: skip
test_cros_fp_hello: skip
test_cros_fp_reboot: skip
test_cros_pd_abi: skip
test_cros_pd_hello: skip
test_cros_tp_abi: skip
test_cros_tp_hello: skip
test_cros_ec_pwm_backlight: skip
test_cros_ec_battery_abi: skip
test_cros_ec_usbpd_charger_abi: skip
test_cros_ec_rtc_abi: skip
test_cros_ec_extcon_usbc_abi: skip
6556 13:42:26.840327 end: 3.1 lava-test-shell (duration 00:00:01) [common]
6557 13:42:26.840787 end: 3 lava-test-retry (duration 00:00:01) [common]
6558 13:42:26.841299 start: 4 finalize (timeout 00:08:06) [common]
6559 13:42:26.841766 start: 4.1 power-off (timeout 00:00:30) [common]
6560 13:42:26.842433 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=off']
6561 13:42:28.952609 >> Command sent successfully.
6562 13:42:28.959734 Returned 0 in 2 seconds
6563 13:42:28.959897 end: 4.1 power-off (duration 00:00:02) [common]
6565 13:42:28.960182 start: 4.2 read-feedback (timeout 00:08:04) [common]
6566 13:42:28.960352 Listened to connection for namespace 'common' for up to 1s
6567 13:42:28.960634 Listened to connection for namespace 'common' for up to 1s
6568 13:42:29.960891 Finalising connection for namespace 'common'
6569 13:42:29.961498 Disconnecting from shell: Finalise
6570 13:42:29.961857 / #
6571 13:42:30.062727 end: 4.2 read-feedback (duration 00:00:01) [common]
6572 13:42:30.063338 end: 4 finalize (duration 00:00:03) [common]
6573 13:42:30.063888 Cleaning after the job
6574 13:42:30.064361 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879031/tftp-deploy-lp0pwhql/ramdisk
6575 13:42:30.073142 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879031/tftp-deploy-lp0pwhql/kernel
6576 13:42:30.087578 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879031/tftp-deploy-lp0pwhql/dtb
6577 13:42:30.087767 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879031/tftp-deploy-lp0pwhql/modules
6578 13:42:30.093377 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14879031
6579 13:42:30.182379 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14879031
6580 13:42:30.182534 Job finished correctly