Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 47
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 85
1 13:52:48.959748 lava-dispatcher, installed at version: 2024.05
2 13:52:48.959934 start: 0 validate
3 13:52:48.960069 Start time: 2024-07-18 13:52:48.960055+00:00 (UTC)
4 13:52:48.960192 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:52:48.960339 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 13:52:49.238776 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:52:49.239407 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 13:52:49.511053 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:52:49.511769 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 13:52:49.776204 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:52:49.776761 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
12 13:52:50.045264 validate duration: 1.09
14 13:52:50.046440 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:52:50.046937 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:52:50.047352 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:52:50.048081 Not decompressing ramdisk as can be used compressed.
18 13:52:50.048529 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 13:52:50.048869 saving as /var/lib/lava/dispatcher/tmp/14879057/tftp-deploy-fat42sxu/ramdisk/rootfs.cpio.gz
20 13:52:50.049229 total size: 47897469 (45 MB)
21 13:52:50.054079 progress 0 % (0 MB)
22 13:52:50.088411 progress 5 % (2 MB)
23 13:52:50.103687 progress 10 % (4 MB)
24 13:52:50.115852 progress 15 % (6 MB)
25 13:52:50.127799 progress 20 % (9 MB)
26 13:52:50.139958 progress 25 % (11 MB)
27 13:52:50.152139 progress 30 % (13 MB)
28 13:52:50.164136 progress 35 % (16 MB)
29 13:52:50.176198 progress 40 % (18 MB)
30 13:52:50.188097 progress 45 % (20 MB)
31 13:52:50.200039 progress 50 % (22 MB)
32 13:52:50.212080 progress 55 % (25 MB)
33 13:52:50.224279 progress 60 % (27 MB)
34 13:52:50.236469 progress 65 % (29 MB)
35 13:52:50.248687 progress 70 % (32 MB)
36 13:52:50.260761 progress 75 % (34 MB)
37 13:52:50.272801 progress 80 % (36 MB)
38 13:52:50.284985 progress 85 % (38 MB)
39 13:52:50.296922 progress 90 % (41 MB)
40 13:52:50.308744 progress 95 % (43 MB)
41 13:52:50.320513 progress 100 % (45 MB)
42 13:52:50.320729 45 MB downloaded in 0.27 s (168.23 MB/s)
43 13:52:50.320884 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:52:50.321100 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:52:50.321226 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:52:50.321302 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:52:50.321425 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
49 13:52:50.321485 saving as /var/lib/lava/dispatcher/tmp/14879057/tftp-deploy-fat42sxu/kernel/Image
50 13:52:50.321539 total size: 54813184 (52 MB)
51 13:52:50.321593 No compression specified
52 13:52:50.322564 progress 0 % (0 MB)
53 13:52:50.336128 progress 5 % (2 MB)
54 13:52:50.349883 progress 10 % (5 MB)
55 13:52:50.363363 progress 15 % (7 MB)
56 13:52:50.377008 progress 20 % (10 MB)
57 13:52:50.390869 progress 25 % (13 MB)
58 13:52:50.404462 progress 30 % (15 MB)
59 13:52:50.418178 progress 35 % (18 MB)
60 13:52:50.431838 progress 40 % (20 MB)
61 13:52:50.445487 progress 45 % (23 MB)
62 13:52:50.459247 progress 50 % (26 MB)
63 13:52:50.473002 progress 55 % (28 MB)
64 13:52:50.486628 progress 60 % (31 MB)
65 13:52:50.500320 progress 65 % (34 MB)
66 13:52:50.513959 progress 70 % (36 MB)
67 13:52:50.527729 progress 75 % (39 MB)
68 13:52:50.541458 progress 80 % (41 MB)
69 13:52:50.555012 progress 85 % (44 MB)
70 13:52:50.568809 progress 90 % (47 MB)
71 13:52:50.582401 progress 95 % (49 MB)
72 13:52:50.595618 progress 100 % (52 MB)
73 13:52:50.595849 52 MB downloaded in 0.27 s (190.57 MB/s)
74 13:52:50.595998 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:52:50.596206 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:52:50.596285 start: 1.3 download-retry (timeout 00:09:59) [common]
78 13:52:50.596360 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 13:52:50.596480 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 13:52:50.596546 saving as /var/lib/lava/dispatcher/tmp/14879057/tftp-deploy-fat42sxu/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 13:52:50.596599 total size: 57695 (0 MB)
82 13:52:50.596651 No compression specified
83 13:52:50.597704 progress 56 % (0 MB)
84 13:52:50.597961 progress 100 % (0 MB)
85 13:52:50.598181 0 MB downloaded in 0.00 s (34.82 MB/s)
86 13:52:50.598295 end: 1.3.1 http-download (duration 00:00:00) [common]
88 13:52:50.598515 end: 1.3 download-retry (duration 00:00:00) [common]
89 13:52:50.598604 start: 1.4 download-retry (timeout 00:09:59) [common]
90 13:52:50.598677 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 13:52:50.598779 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
92 13:52:50.598839 saving as /var/lib/lava/dispatcher/tmp/14879057/tftp-deploy-fat42sxu/modules/modules.tar
93 13:52:50.598891 total size: 8611320 (8 MB)
94 13:52:50.598944 Using unxz to decompress xz
95 13:52:50.600179 progress 0 % (0 MB)
96 13:52:50.620493 progress 5 % (0 MB)
97 13:52:50.644786 progress 10 % (0 MB)
98 13:52:50.668396 progress 15 % (1 MB)
99 13:52:50.692392 progress 20 % (1 MB)
100 13:52:50.715403 progress 25 % (2 MB)
101 13:52:50.738594 progress 30 % (2 MB)
102 13:52:50.760736 progress 35 % (2 MB)
103 13:52:50.786918 progress 40 % (3 MB)
104 13:52:50.811252 progress 45 % (3 MB)
105 13:52:50.834749 progress 50 % (4 MB)
106 13:52:50.859215 progress 55 % (4 MB)
107 13:52:50.882774 progress 60 % (4 MB)
108 13:52:50.905567 progress 65 % (5 MB)
109 13:52:50.930439 progress 70 % (5 MB)
110 13:52:50.957121 progress 75 % (6 MB)
111 13:52:50.984254 progress 80 % (6 MB)
112 13:52:51.007686 progress 85 % (7 MB)
113 13:52:51.030748 progress 90 % (7 MB)
114 13:52:51.054113 progress 95 % (7 MB)
115 13:52:51.076838 progress 100 % (8 MB)
116 13:52:51.082413 8 MB downloaded in 0.48 s (16.98 MB/s)
117 13:52:51.082575 end: 1.4.1 http-download (duration 00:00:00) [common]
119 13:52:51.082791 end: 1.4 download-retry (duration 00:00:00) [common]
120 13:52:51.082899 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 13:52:51.083005 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 13:52:51.083082 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 13:52:51.083163 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 13:52:51.083317 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t
125 13:52:51.083438 makedir: /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin
126 13:52:51.083534 makedir: /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/tests
127 13:52:51.083625 makedir: /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/results
128 13:52:51.083712 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-add-keys
129 13:52:51.083845 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-add-sources
130 13:52:51.083966 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-background-process-start
131 13:52:51.084082 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-background-process-stop
132 13:52:51.084218 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-common-functions
133 13:52:51.084334 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-echo-ipv4
134 13:52:51.084447 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-install-packages
135 13:52:51.084566 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-installed-packages
136 13:52:51.084678 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-os-build
137 13:52:51.084790 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-probe-channel
138 13:52:51.084905 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-probe-ip
139 13:52:51.085018 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-target-ip
140 13:52:51.085128 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-target-mac
141 13:52:51.085291 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-target-storage
142 13:52:51.085409 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-test-case
143 13:52:51.085524 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-test-event
144 13:52:51.085636 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-test-feedback
145 13:52:51.085754 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-test-raise
146 13:52:51.085867 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-test-reference
147 13:52:51.085977 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-test-runner
148 13:52:51.086090 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-test-set
149 13:52:51.086202 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-test-shell
150 13:52:51.086319 Updating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-install-packages (oe)
151 13:52:51.091478 Updating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/bin/lava-installed-packages (oe)
152 13:52:51.091614 Creating /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/environment
153 13:52:51.091706 LAVA metadata
154 13:52:51.091770 - LAVA_JOB_ID=14879057
155 13:52:51.091830 - LAVA_DISPATCHER_IP=192.168.201.1
156 13:52:51.091921 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 13:52:51.091979 skipped lava-vland-overlay
158 13:52:51.092046 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 13:52:51.092115 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 13:52:51.092166 skipped lava-multinode-overlay
161 13:52:51.092230 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 13:52:51.092297 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 13:52:51.092361 Loading test definitions
164 13:52:51.092434 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 13:52:51.092496 Using /lava-14879057 at stage 0
166 13:52:51.092786 uuid=14879057_1.5.2.3.1 testdef=None
167 13:52:51.092865 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 13:52:51.092938 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 13:52:51.093415 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 13:52:51.093610 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 13:52:51.097727 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 13:52:51.097933 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 13:52:51.106076 runner path: /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/0/tests/0_igt-gpu-panfrost test_uuid 14879057_1.5.2.3.1
176 13:52:51.106239 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 13:52:51.106430 Creating lava-test-runner.conf files
179 13:52:51.106486 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14879057/lava-overlay-94fxjm1t/lava-14879057/0 for stage 0
180 13:52:51.106566 - 0_igt-gpu-panfrost
181 13:52:51.106657 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 13:52:51.106731 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 13:52:51.112958 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 13:52:51.113053 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 13:52:51.113134 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 13:52:51.113251 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 13:52:51.113326 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 13:52:52.852344 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:02) [common]
189 13:52:52.852483 start: 1.5.4 extract-modules (timeout 00:09:57) [common]
190 13:52:52.852558 extracting modules file /var/lib/lava/dispatcher/tmp/14879057/tftp-deploy-fat42sxu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14879057/extract-overlay-ramdisk-44dcygdt/ramdisk
191 13:52:53.085318 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 13:52:53.085447 start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
193 13:52:53.085526 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14879057/compress-overlay-c0kk9f_y/overlay-1.5.2.4.tar.gz to ramdisk
194 13:52:53.085585 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14879057/compress-overlay-c0kk9f_y/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14879057/extract-overlay-ramdisk-44dcygdt/ramdisk
195 13:52:53.092190 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 13:52:53.092286 start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
197 13:52:53.092366 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 13:52:53.092442 start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
199 13:52:53.092509 Building ramdisk /var/lib/lava/dispatcher/tmp/14879057/extract-overlay-ramdisk-44dcygdt/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14879057/extract-overlay-ramdisk-44dcygdt/ramdisk
200 13:52:54.460087 >> 465549 blocks
201 13:53:00.929704 rename /var/lib/lava/dispatcher/tmp/14879057/extract-overlay-ramdisk-44dcygdt/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14879057/tftp-deploy-fat42sxu/ramdisk/ramdisk.cpio.gz
202 13:53:00.929873 end: 1.5.7 compress-ramdisk (duration 00:00:08) [common]
203 13:53:00.929961 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
204 13:53:00.930036 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
205 13:53:00.930107 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14879057/tftp-deploy-fat42sxu/kernel/Image']
206 13:53:14.056336 Returned 0 in 13 seconds
207 13:53:14.056505 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14879057/tftp-deploy-fat42sxu/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14879057/tftp-deploy-fat42sxu/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14879057/tftp-deploy-fat42sxu/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14879057/tftp-deploy-fat42sxu/kernel/image.itb
208 13:53:15.255063 output: FIT description: Kernel Image image with one or more FDT blobs
209 13:53:15.255187 output: Created: Thu Jul 18 14:53:14 2024
210 13:53:15.255271 output: Image 0 (kernel-1)
211 13:53:15.255343 output: Description:
212 13:53:15.255412 output: Created: Thu Jul 18 14:53:14 2024
213 13:53:15.255480 output: Type: Kernel Image
214 13:53:15.255546 output: Compression: lzma compressed
215 13:53:15.255614 output: Data Size: 13114469 Bytes = 12807.10 KiB = 12.51 MiB
216 13:53:15.255699 output: Architecture: AArch64
217 13:53:15.255781 output: OS: Linux
218 13:53:15.255864 output: Load Address: 0x00000000
219 13:53:15.255945 output: Entry Point: 0x00000000
220 13:53:15.256027 output: Hash algo: crc32
221 13:53:15.256108 output: Hash value: a47b020b
222 13:53:15.256189 output: Image 1 (fdt-1)
223 13:53:15.256270 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 13:53:15.256351 output: Created: Thu Jul 18 14:53:14 2024
225 13:53:15.256431 output: Type: Flat Device Tree
226 13:53:15.256512 output: Compression: uncompressed
227 13:53:15.256592 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 13:53:15.256673 output: Architecture: AArch64
229 13:53:15.256754 output: Hash algo: crc32
230 13:53:15.256835 output: Hash value: a9713552
231 13:53:15.256916 output: Image 2 (ramdisk-1)
232 13:53:15.256995 output: Description: unavailable
233 13:53:15.257076 output: Created: Thu Jul 18 14:53:14 2024
234 13:53:15.257163 output: Type: RAMDisk Image
235 13:53:15.257245 output: Compression: uncompressed
236 13:53:15.257325 output: Data Size: 60994231 Bytes = 59564.68 KiB = 58.17 MiB
237 13:53:15.257406 output: Architecture: AArch64
238 13:53:15.257486 output: OS: Linux
239 13:53:15.257566 output: Load Address: unavailable
240 13:53:15.257647 output: Entry Point: unavailable
241 13:53:15.257727 output: Hash algo: crc32
242 13:53:15.257806 output: Hash value: 65507576
243 13:53:15.257886 output: Default Configuration: 'conf-1'
244 13:53:15.257966 output: Configuration 0 (conf-1)
245 13:53:15.258050 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 13:53:15.258132 output: Kernel: kernel-1
247 13:53:15.258213 output: Init Ramdisk: ramdisk-1
248 13:53:15.258294 output: FDT: fdt-1
249 13:53:15.258375 output: Loadables: kernel-1
250 13:53:15.258455 output:
251 13:53:15.258596 end: 1.5.8.1 prepare-fit (duration 00:00:14) [common]
252 13:53:15.258702 end: 1.5.8 prepare-kernel (duration 00:00:14) [common]
253 13:53:15.258811 end: 1.5 prepare-tftp-overlay (duration 00:00:24) [common]
254 13:53:15.258918 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
255 13:53:15.259003 No LXC device requested
256 13:53:15.259109 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 13:53:15.259214 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
258 13:53:15.259316 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 13:53:15.259399 Checking files for TFTP limit of 4294967296 bytes.
260 13:53:15.259890 end: 1 tftp-deploy (duration 00:00:25) [common]
261 13:53:15.260006 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 13:53:15.260117 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 13:53:15.260246 substitutions:
264 13:53:15.260332 - {DTB}: 14879057/tftp-deploy-fat42sxu/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 13:53:15.260421 - {INITRD}: 14879057/tftp-deploy-fat42sxu/ramdisk/ramdisk.cpio.gz
266 13:53:15.260507 - {KERNEL}: 14879057/tftp-deploy-fat42sxu/kernel/Image
267 13:53:15.260592 - {LAVA_MAC}: None
268 13:53:15.260677 - {PRESEED_CONFIG}: None
269 13:53:15.260761 - {PRESEED_LOCAL}: None
270 13:53:15.260844 - {RAMDISK}: 14879057/tftp-deploy-fat42sxu/ramdisk/ramdisk.cpio.gz
271 13:53:15.260941 - {ROOT_PART}: None
272 13:53:15.261023 - {ROOT}: None
273 13:53:15.261106 - {SERVER_IP}: 192.168.201.1
274 13:53:15.261206 - {TEE}: None
275 13:53:15.261302 Parsed boot commands:
276 13:53:15.261383 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 13:53:15.261566 Parsed boot commands: tftpboot 192.168.201.1 14879057/tftp-deploy-fat42sxu/kernel/image.itb 14879057/tftp-deploy-fat42sxu/kernel/cmdline
278 13:53:15.261675 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 13:53:15.261781 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 13:53:15.261887 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 13:53:15.261992 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 13:53:15.262076 Not connected, no need to disconnect.
283 13:53:15.262180 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 13:53:15.262283 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 13:53:15.262366 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
286 13:53:15.265200 Setting prompt string to ['lava-test: # ']
287 13:53:15.265533 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 13:53:15.265633 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 13:53:15.265737 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 13:53:15.265827 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 13:53:15.266009 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=reboot']
292 13:53:24.445715 >> Command sent successfully.
293 13:53:24.459399 Returned 0 in 9 seconds
294 13:53:24.460211 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
296 13:53:24.461895 end: 2.2.2 reset-device (duration 00:00:09) [common]
297 13:53:24.462483 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
298 13:53:24.462886 Setting prompt string to 'Starting depthcharge on Juniper...'
299 13:53:24.463341 Changing prompt to 'Starting depthcharge on Juniper...'
300 13:53:24.463824 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
301 13:53:24.465899 [Enter `^Ec?' for help]
302 13:53:31.115331 [DL] 00000000 00000000 010701
303 13:53:31.120224
304 13:53:31.120678
305 13:53:31.121028 F0: 102B 0000
306 13:53:31.121391
307 13:53:31.121692 F3: 1006 0033 [0200]
308 13:53:31.123561
309 13:53:31.123943 F3: 4001 00E0 [0200]
310 13:53:31.124246
311 13:53:31.124534 F3: 0000 0000
312 13:53:31.124924
313 13:53:31.127421 V0: 0000 0000 [0001]
314 13:53:31.127875
315 13:53:31.128175 00: 1027 0002
316 13:53:31.128463
317 13:53:31.130346 01: 0000 0000
318 13:53:31.130810
319 13:53:31.131116 BP: 0C00 0251 [0000]
320 13:53:31.131395
321 13:53:31.133587 G0: 1182 0000
322 13:53:31.133972
323 13:53:31.134272 EC: 0004 0000 [0001]
324 13:53:31.134555
325 13:53:31.137363 S7: 0000 0000 [0000]
326 13:53:31.137744
327 13:53:31.138039 CC: 0000 0000 [0001]
328 13:53:31.138359
329 13:53:31.140184 T0: 0000 00DB [000F]
330 13:53:31.140564
331 13:53:31.140861 Jump to BL
332 13:53:31.141167
333 13:53:31.176199
334 13:53:31.176665
335 13:53:31.182715 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
336 13:53:31.186354 ARM64: Exception handlers installed.
337 13:53:31.189752 ARM64: Testing exception
338 13:53:31.192814 ARM64: Done test exception
339 13:53:31.196764 WDT: Last reset was cold boot
340 13:53:31.197307 SPI0(PAD0) initialized at 992727 Hz
341 13:53:31.203932 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
342 13:53:31.204416 Manufacturer: ef
343 13:53:31.211068 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
344 13:53:31.222726 Probing TPM: . done!
345 13:53:31.223219 TPM ready after 0 ms
346 13:53:31.229764 Connected to device vid:did:rid of 1ae0:0028:00
347 13:53:31.236639 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
348 13:53:31.273503 Initialized TPM device CR50 revision 0
349 13:53:31.286281 tlcl_send_startup: Startup return code is 0
350 13:53:31.286931 TPM: setup succeeded
351 13:53:31.295254 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
352 13:53:31.298503 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
353 13:53:31.302039 in-header: 03 19 00 00 08 00 00 00
354 13:53:31.305249 in-data: a2 e0 47 00 13 00 00 00
355 13:53:31.308727 Chrome EC: UHEPI supported
356 13:53:31.315166 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
357 13:53:31.318802 in-header: 03 a1 00 00 08 00 00 00
358 13:53:31.321659 in-data: 84 60 60 10 00 00 00 00
359 13:53:31.322037 Phase 1
360 13:53:31.325370 FMAP: area GBB found @ 3f5000 (12032 bytes)
361 13:53:31.332259 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
362 13:53:31.338992 VB2:vb2_check_recovery() Recovery was requested manually
363 13:53:31.342067 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
364 13:53:31.348414 Recovery requested (1009000e)
365 13:53:31.357242 tlcl_extend: response is 0
366 13:53:31.361992 tlcl_extend: response is 0
367 13:53:31.387883
368 13:53:31.388396
369 13:53:31.393822 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
370 13:53:31.397354 ARM64: Exception handlers installed.
371 13:53:31.400403 ARM64: Testing exception
372 13:53:31.403813 ARM64: Done test exception
373 13:53:31.419287 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x2000
374 13:53:31.425814 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
375 13:53:31.429458 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
376 13:53:31.437348 [RTC]rtc_get_frequency_meter,134: input=0xf, output=863
377 13:53:31.444480 [RTC]rtc_get_frequency_meter,134: input=0x7, output=733
378 13:53:31.451033 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
379 13:53:31.457767 [RTC]rtc_get_frequency_meter,134: input=0x9, output=765
380 13:53:31.465001 [RTC]rtc_get_frequency_meter,134: input=0xa, output=783
381 13:53:31.472387 [RTC]rtc_get_frequency_meter,134: input=0xa, output=784
382 13:53:31.479058 [RTC]rtc_get_frequency_meter,134: input=0xb, output=800
383 13:53:31.482153 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b
384 13:53:31.489192 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
385 13:53:31.492483 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
386 13:53:31.495836 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
387 13:53:31.499317 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
388 13:53:31.502246 in-header: 03 19 00 00 08 00 00 00
389 13:53:31.505685 in-data: a2 e0 47 00 13 00 00 00
390 13:53:31.508839 Chrome EC: UHEPI supported
391 13:53:31.515785 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
392 13:53:31.519771 in-header: 03 a1 00 00 08 00 00 00
393 13:53:31.522240 in-data: 84 60 60 10 00 00 00 00
394 13:53:31.525961 Skip loading cached calibration data
395 13:53:31.532164 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
396 13:53:31.535690 in-header: 03 a1 00 00 08 00 00 00
397 13:53:31.539210 in-data: 84 60 60 10 00 00 00 00
398 13:53:31.546132 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
399 13:53:31.549582 in-header: 03 a1 00 00 08 00 00 00
400 13:53:31.552943 in-data: 84 60 60 10 00 00 00 00
401 13:53:31.556015 ADC[3]: Raw value=1033918 ID=8
402 13:53:31.556470 Manufacturer: ef
403 13:53:31.562271 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
404 13:53:31.565646 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
405 13:53:31.569337 CBFS @ 21000 size 3d4000
406 13:53:31.572856 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
407 13:53:31.579374 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
408 13:53:31.582947 CBFS: Found @ offset 3c880 size 4b
409 13:53:31.583410 DRAM-K: Full Calibration
410 13:53:31.589287 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
411 13:53:31.589769 CBFS @ 21000 size 3d4000
412 13:53:31.596134 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
413 13:53:31.599392 CBFS: Locating 'fallback/dram'
414 13:53:31.602960 CBFS: Found @ offset 24b00 size 12268
415 13:53:31.630050 read SPI 0x45b44 0x1224c: 22773 us, 3263 KB/s, 26.104 Mbps
416 13:53:31.633790 ddr_geometry: 1, config: 0x0
417 13:53:31.636994 header.status = 0x0
418 13:53:31.640580 header.magic = 0x44524d4b (expected: 0x44524d4b)
419 13:53:31.643790 header.version = 0x5 (expected: 0x5)
420 13:53:31.647239 header.size = 0x8f0 (expected: 0x8f0)
421 13:53:31.647673 header.config = 0x0
422 13:53:31.651264 header.flags = 0x0
423 13:53:31.651740 header.checksum = 0x0
424 13:53:31.657776 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
425 13:53:31.663965 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
426 13:53:31.667738 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
427 13:53:31.670708 ddr_geometry:1
428 13:53:31.671090 [EMI] new MDL number = 1
429 13:53:31.674221 dram_cbt_mode_extern: 0
430 13:53:31.677384 dram_cbt_mode [RK0]: 0, [RK1]: 0
431 13:53:31.684085 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
432 13:53:31.684547
433 13:53:31.684846
434 13:53:31.685122 [Bianco] ETT version 0.0.0.1
435 13:53:31.691147 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
436 13:53:31.691636
437 13:53:31.694456 vSetVcoreByFreq with vcore:762500, freq=1600
438 13:53:31.694956
439 13:53:31.695289 [DramcInit]
440 13:53:31.697855 AutoRefreshCKEOff AutoREF OFF
441 13:53:31.700629 DDRPhyPLLSetting-CKEOFF
442 13:53:31.701049 DDRPhyPLLSetting-CKEON
443 13:53:31.704195
444 13:53:31.704659 Enable WDQS
445 13:53:31.707135 [ModeRegInit_LP4] CH0 RK0
446 13:53:31.710540 Write Rank0 MR13 =0x18
447 13:53:31.710979 Write Rank0 MR12 =0x5d
448 13:53:31.713694 Write Rank0 MR1 =0x56
449 13:53:31.717278 Write Rank0 MR2 =0x1a
450 13:53:31.717784 Write Rank0 MR11 =0x0
451 13:53:31.720776 Write Rank0 MR22 =0x38
452 13:53:31.721282 Write Rank0 MR14 =0x5d
453 13:53:31.724020 Write Rank0 MR3 =0x30
454 13:53:31.727464 Write Rank0 MR13 =0x58
455 13:53:31.728012 Write Rank0 MR12 =0x5d
456 13:53:31.731161 Write Rank0 MR1 =0x56
457 13:53:31.731684 Write Rank0 MR2 =0x2d
458 13:53:31.734420 Write Rank0 MR11 =0x23
459 13:53:31.737237 Write Rank0 MR22 =0x34
460 13:53:31.737738 Write Rank0 MR14 =0x10
461 13:53:31.740985 Write Rank0 MR3 =0x30
462 13:53:31.743984 Write Rank0 MR13 =0xd8
463 13:53:31.744391 [ModeRegInit_LP4] CH0 RK1
464 13:53:31.747236 Write Rank1 MR13 =0x18
465 13:53:31.747628 Write Rank1 MR12 =0x5d
466 13:53:31.750795 Write Rank1 MR1 =0x56
467 13:53:31.754466 Write Rank1 MR2 =0x1a
468 13:53:31.754857 Write Rank1 MR11 =0x0
469 13:53:31.757226 Write Rank1 MR22 =0x38
470 13:53:31.757619 Write Rank1 MR14 =0x5d
471 13:53:31.760702 Write Rank1 MR3 =0x30
472 13:53:31.764348 Write Rank1 MR13 =0x58
473 13:53:31.764844 Write Rank1 MR12 =0x5d
474 13:53:31.767875 Write Rank1 MR1 =0x56
475 13:53:31.768365 Write Rank1 MR2 =0x2d
476 13:53:31.770760 Write Rank1 MR11 =0x23
477 13:53:31.774586 Write Rank1 MR22 =0x34
478 13:53:31.775065 Write Rank1 MR14 =0x10
479 13:53:31.777650 Write Rank1 MR3 =0x30
480 13:53:31.780793 Write Rank1 MR13 =0xd8
481 13:53:31.781257 [ModeRegInit_LP4] CH1 RK0
482 13:53:31.784234 Write Rank0 MR13 =0x18
483 13:53:31.784626 Write Rank0 MR12 =0x5d
484 13:53:31.787789 Write Rank0 MR1 =0x56
485 13:53:31.790891 Write Rank0 MR2 =0x1a
486 13:53:31.791282 Write Rank0 MR11 =0x0
487 13:53:31.794412 Write Rank0 MR22 =0x38
488 13:53:31.794899 Write Rank0 MR14 =0x5d
489 13:53:31.797612 Write Rank0 MR3 =0x30
490 13:53:31.801508 Write Rank0 MR13 =0x58
491 13:53:31.801959 Write Rank0 MR12 =0x5d
492 13:53:31.804490 Write Rank0 MR1 =0x56
493 13:53:31.804952 Write Rank0 MR2 =0x2d
494 13:53:31.807850 Write Rank0 MR11 =0x23
495 13:53:31.811147 Write Rank0 MR22 =0x34
496 13:53:31.811633 Write Rank0 MR14 =0x10
497 13:53:31.814646 Write Rank0 MR3 =0x30
498 13:53:31.818368 Write Rank0 MR13 =0xd8
499 13:53:31.818813 [ModeRegInit_LP4] CH1 RK1
500 13:53:31.821231 Write Rank1 MR13 =0x18
501 13:53:31.821643 Write Rank1 MR12 =0x5d
502 13:53:31.824578 Write Rank1 MR1 =0x56
503 13:53:31.828025 Write Rank1 MR2 =0x1a
504 13:53:31.828417 Write Rank1 MR11 =0x0
505 13:53:31.831287 Write Rank1 MR22 =0x38
506 13:53:31.831679 Write Rank1 MR14 =0x5d
507 13:53:31.834722 Write Rank1 MR3 =0x30
508 13:53:31.838134 Write Rank1 MR13 =0x58
509 13:53:31.838526 Write Rank1 MR12 =0x5d
510 13:53:31.841299 Write Rank1 MR1 =0x56
511 13:53:31.841697 Write Rank1 MR2 =0x2d
512 13:53:31.844584 Write Rank1 MR11 =0x23
513 13:53:31.848397 Write Rank1 MR22 =0x34
514 13:53:31.848764 Write Rank1 MR14 =0x10
515 13:53:31.851202 Write Rank1 MR3 =0x30
516 13:53:31.851742 Write Rank1 MR13 =0xd8
517 13:53:31.854764 match AC timing 3
518 13:53:31.864717 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
519 13:53:31.865106 [MiockJmeterHQA]
520 13:53:31.867995 vSetVcoreByFreq with vcore:762500, freq=1600
521 13:53:31.973269
522 13:53:31.973709 MIOCK jitter meter ch=0
523 13:53:31.974011
524 13:53:31.976640 1T = (100-18) = 82 dly cells
525 13:53:31.983812 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
526 13:53:31.986848 vSetVcoreByFreq with vcore:725000, freq=1200
527 13:53:32.085190
528 13:53:32.085691 MIOCK jitter meter ch=0
529 13:53:32.086020
530 13:53:32.088561 1T = (95-17) = 78 dly cells
531 13:53:32.095189 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
532 13:53:32.098279 vSetVcoreByFreq with vcore:725000, freq=800
533 13:53:32.196624
534 13:53:32.197179 MIOCK jitter meter ch=0
535 13:53:32.197625
536 13:53:32.199951 1T = (95-17) = 78 dly cells
537 13:53:32.206074 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
538 13:53:32.209641 vSetVcoreByFreq with vcore:762500, freq=1600
539 13:53:32.213335 vSetVcoreByFreq with vcore:762500, freq=1600
540 13:53:32.213849
541 13:53:32.214282 K DRVP
542 13:53:32.216753 1. OCD DRVP=0 CALOUT=0
543 13:53:32.219573 1. OCD DRVP=1 CALOUT=0
544 13:53:32.220095 1. OCD DRVP=2 CALOUT=0
545 13:53:32.222880 1. OCD DRVP=3 CALOUT=0
546 13:53:32.223344 1. OCD DRVP=4 CALOUT=0
547 13:53:32.226143 1. OCD DRVP=5 CALOUT=0
548 13:53:32.229544 1. OCD DRVP=6 CALOUT=0
549 13:53:32.230037 1. OCD DRVP=7 CALOUT=0
550 13:53:32.232919 1. OCD DRVP=8 CALOUT=0
551 13:53:32.236312 1. OCD DRVP=9 CALOUT=1
552 13:53:32.236788
553 13:53:32.239805 1. OCD DRVP calibration OK! DRVP=9
554 13:53:32.240293
555 13:53:32.240695
556 13:53:32.241065
557 13:53:32.241462 K ODTN
558 13:53:32.243165 3. OCD ODTN=0 ,CALOUT=1
559 13:53:32.243651 3. OCD ODTN=1 ,CALOUT=1
560 13:53:32.246740 3. OCD ODTN=2 ,CALOUT=1
561 13:53:32.247220 3. OCD ODTN=3 ,CALOUT=1
562 13:53:32.249615 3. OCD ODTN=4 ,CALOUT=1
563 13:53:32.253289 3. OCD ODTN=5 ,CALOUT=1
564 13:53:32.253940 3. OCD ODTN=6 ,CALOUT=1
565 13:53:32.256586 3. OCD ODTN=7 ,CALOUT=0
566 13:53:32.257080
567 13:53:32.260106 3. OCD ODTN calibration OK! ODTN=7
568 13:53:32.260585
569 13:53:32.263131 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
570 13:53:32.266960 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
571 13:53:32.273340 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
572 13:53:32.273837
573 13:53:32.274180 K DRVP
574 13:53:32.276547 1. OCD DRVP=0 CALOUT=0
575 13:53:32.276937 1. OCD DRVP=1 CALOUT=0
576 13:53:32.280284 1. OCD DRVP=2 CALOUT=0
577 13:53:32.283410 1. OCD DRVP=3 CALOUT=0
578 13:53:32.283891 1. OCD DRVP=4 CALOUT=0
579 13:53:32.286469 1. OCD DRVP=5 CALOUT=0
580 13:53:32.286943 1. OCD DRVP=6 CALOUT=0
581 13:53:32.289716 1. OCD DRVP=7 CALOUT=0
582 13:53:32.293685 1. OCD DRVP=8 CALOUT=0
583 13:53:32.294154 1. OCD DRVP=9 CALOUT=0
584 13:53:32.296541 1. OCD DRVP=10 CALOUT=1
585 13:53:32.297014
586 13:53:32.300037 1. OCD DRVP calibration OK! DRVP=10
587 13:53:32.300511
588 13:53:32.300808
589 13:53:32.301084
590 13:53:32.301391 K ODTN
591 13:53:32.303124 3. OCD ODTN=0 ,CALOUT=1
592 13:53:32.306853 3. OCD ODTN=1 ,CALOUT=1
593 13:53:32.307321 3. OCD ODTN=2 ,CALOUT=1
594 13:53:32.310139 3. OCD ODTN=3 ,CALOUT=1
595 13:53:32.313251 3. OCD ODTN=4 ,CALOUT=1
596 13:53:32.313641 3. OCD ODTN=5 ,CALOUT=1
597 13:53:32.316954 3. OCD ODTN=6 ,CALOUT=1
598 13:53:32.317479 3. OCD ODTN=7 ,CALOUT=1
599 13:53:32.320688 3. OCD ODTN=8 ,CALOUT=1
600 13:53:32.323839 3. OCD ODTN=9 ,CALOUT=1
601 13:53:32.324228 3. OCD ODTN=10 ,CALOUT=1
602 13:53:32.326381 3. OCD ODTN=11 ,CALOUT=1
603 13:53:32.330183 3. OCD ODTN=12 ,CALOUT=1
604 13:53:32.330574 3. OCD ODTN=13 ,CALOUT=1
605 13:53:32.333338 3. OCD ODTN=14 ,CALOUT=0
606 13:53:32.333727
607 13:53:32.337005 3. OCD ODTN calibration OK! ODTN=14
608 13:53:32.337437
609 13:53:32.340193 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14
610 13:53:32.343243 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14
611 13:53:32.350114 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)
612 13:53:32.350573
613 13:53:32.350877 [DramcInit]
614 13:53:32.353376 AutoRefreshCKEOff AutoREF OFF
615 13:53:32.357258 DDRPhyPLLSetting-CKEOFF
616 13:53:32.357734 DDRPhyPLLSetting-CKEON
617 13:53:32.360515
618 13:53:32.360898 Enable WDQS
619 13:53:32.361242 ==
620 13:53:32.363588 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
621 13:53:32.366938 fsp= 1, odt_onoff= 1, Byte mode= 0
622 13:53:32.367413 ==
623 13:53:32.370384 [Duty_Offset_Calibration]
624 13:53:32.370851
625 13:53:32.373732 ===========================
626 13:53:32.374161 B0:0 B1:1 CA:1
627 13:53:32.396638 ==
628 13:53:32.400321 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
629 13:53:32.402898 fsp= 1, odt_onoff= 1, Byte mode= 0
630 13:53:32.403366 ==
631 13:53:32.406725 [Duty_Offset_Calibration]
632 13:53:32.407226
633 13:53:32.409789 ===========================
634 13:53:32.410236 B0:1 B1:1 CA:0
635 13:53:32.442593 [ModeRegInit_LP4] CH0 RK0
636 13:53:32.445770 Write Rank0 MR13 =0x18
637 13:53:32.446195 Write Rank0 MR12 =0x5d
638 13:53:32.449038 Write Rank0 MR1 =0x56
639 13:53:32.452086 Write Rank0 MR2 =0x1a
640 13:53:32.452512 Write Rank0 MR11 =0x0
641 13:53:32.455932 Write Rank0 MR22 =0x38
642 13:53:32.456438 Write Rank0 MR14 =0x5d
643 13:53:32.459348 Write Rank0 MR3 =0x30
644 13:53:32.462262 Write Rank0 MR13 =0x58
645 13:53:32.462646 Write Rank0 MR12 =0x5d
646 13:53:32.465722 Write Rank0 MR1 =0x56
647 13:53:32.466143 Write Rank0 MR2 =0x2d
648 13:53:32.468867 Write Rank0 MR11 =0x23
649 13:53:32.472226 Write Rank0 MR22 =0x34
650 13:53:32.472686 Write Rank0 MR14 =0x10
651 13:53:32.475406 Write Rank0 MR3 =0x30
652 13:53:32.478674 Write Rank0 MR13 =0xd8
653 13:53:32.479062 [ModeRegInit_LP4] CH0 RK1
654 13:53:32.482181 Write Rank1 MR13 =0x18
655 13:53:32.482567 Write Rank1 MR12 =0x5d
656 13:53:32.485843 Write Rank1 MR1 =0x56
657 13:53:32.489574 Write Rank1 MR2 =0x1a
658 13:53:32.490033 Write Rank1 MR11 =0x0
659 13:53:32.492359 Write Rank1 MR22 =0x38
660 13:53:32.492817 Write Rank1 MR14 =0x5d
661 13:53:32.495684 Write Rank1 MR3 =0x30
662 13:53:32.499232 Write Rank1 MR13 =0x58
663 13:53:32.499689 Write Rank1 MR12 =0x5d
664 13:53:32.502245 Write Rank1 MR1 =0x56
665 13:53:32.505743 Write Rank1 MR2 =0x2d
666 13:53:32.506127 Write Rank1 MR11 =0x23
667 13:53:32.509399 Write Rank1 MR22 =0x34
668 13:53:32.509861 Write Rank1 MR14 =0x10
669 13:53:32.512817 Write Rank1 MR3 =0x30
670 13:53:32.515842 Write Rank1 MR13 =0xd8
671 13:53:32.516297 [ModeRegInit_LP4] CH1 RK0
672 13:53:32.519008 Write Rank0 MR13 =0x18
673 13:53:32.522666 Write Rank0 MR12 =0x5d
674 13:53:32.523055 Write Rank0 MR1 =0x56
675 13:53:32.525983 Write Rank0 MR2 =0x1a
676 13:53:32.526368 Write Rank0 MR11 =0x0
677 13:53:32.529716 Write Rank0 MR22 =0x38
678 13:53:32.532240 Write Rank0 MR14 =0x5d
679 13:53:32.532626 Write Rank0 MR3 =0x30
680 13:53:32.536011 Write Rank0 MR13 =0x58
681 13:53:32.536470 Write Rank0 MR12 =0x5d
682 13:53:32.538974 Write Rank0 MR1 =0x56
683 13:53:32.542823 Write Rank0 MR2 =0x2d
684 13:53:32.543206 Write Rank0 MR11 =0x23
685 13:53:32.545688 Write Rank0 MR22 =0x34
686 13:53:32.546072 Write Rank0 MR14 =0x10
687 13:53:32.549523 Write Rank0 MR3 =0x30
688 13:53:32.552816 Write Rank0 MR13 =0xd8
689 13:53:32.553359 [ModeRegInit_LP4] CH1 RK1
690 13:53:32.555960 Write Rank1 MR13 =0x18
691 13:53:32.556419 Write Rank1 MR12 =0x5d
692 13:53:32.559775 Write Rank1 MR1 =0x56
693 13:53:32.563632 Write Rank1 MR2 =0x1a
694 13:53:32.564095 Write Rank1 MR11 =0x0
695 13:53:32.566015 Write Rank1 MR22 =0x38
696 13:53:32.566400 Write Rank1 MR14 =0x5d
697 13:53:32.569542 Write Rank1 MR3 =0x30
698 13:53:32.573103 Write Rank1 MR13 =0x58
699 13:53:32.573628 Write Rank1 MR12 =0x5d
700 13:53:32.576516 Write Rank1 MR1 =0x56
701 13:53:32.579702 Write Rank1 MR2 =0x2d
702 13:53:32.580168 Write Rank1 MR11 =0x23
703 13:53:32.582706 Write Rank1 MR22 =0x34
704 13:53:32.583090 Write Rank1 MR14 =0x10
705 13:53:32.586587 Write Rank1 MR3 =0x30
706 13:53:32.589481 Write Rank1 MR13 =0xd8
707 13:53:32.589942 match AC timing 3
708 13:53:32.599494 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
709 13:53:32.600017 DramC Write-DBI off
710 13:53:32.602755 DramC Read-DBI off
711 13:53:32.606135 Write Rank0 MR13 =0x59
712 13:53:32.606646 ==
713 13:53:32.609508 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
714 13:53:32.612989 fsp= 1, odt_onoff= 1, Byte mode= 0
715 13:53:32.613407 ==
716 13:53:32.616433 === u2Vref_new: 0x56 --> 0x2d
717 13:53:32.619379 === u2Vref_new: 0x58 --> 0x38
718 13:53:32.622884 === u2Vref_new: 0x5a --> 0x39
719 13:53:32.626414 === u2Vref_new: 0x5c --> 0x3c
720 13:53:32.629630 === u2Vref_new: 0x5e --> 0x3d
721 13:53:32.633512 === u2Vref_new: 0x60 --> 0xa0
722 13:53:32.633974
723 13:53:32.636923 CBT Vref found, early break!
724 13:53:32.637602 [CA 0] Center 33 (4~63) winsize 60
725 13:53:32.640012 [CA 1] Center 34 (5~63) winsize 59
726 13:53:32.643546 [CA 2] Center 28 (0~57) winsize 58
727 13:53:32.646245 [CA 3] Center 24 (-3~51) winsize 55
728 13:53:32.650080 [CA 4] Center 25 (-2~52) winsize 55
729 13:53:32.653074 [CA 5] Center 30 (2~58) winsize 57
730 13:53:32.653488
731 13:53:32.656865 [CATrainingPosCal] consider 1 rank data
732 13:53:32.660109 u2DelayCellTimex100 = 762/100 ps
733 13:53:32.663376 CA0 delay=33 (4~63),Diff = 9 PI (11 cell)
734 13:53:32.667031 CA1 delay=34 (5~63),Diff = 10 PI (12 cell)
735 13:53:32.670141 CA2 delay=28 (0~57),Diff = 4 PI (5 cell)
736 13:53:32.676627 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
737 13:53:32.680087 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
738 13:53:32.683752 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
739 13:53:32.684221
740 13:53:32.687254 CA PerBit enable=1, Macro0, CA PI delay=24
741 13:53:32.690151 === u2Vref_new: 0x56 --> 0x2d
742 13:53:32.690618
743 13:53:32.690922 Vref(ca) range 1: 22
744 13:53:32.691203
745 13:53:32.693306 CS Dly= 10 (41-0-32)
746 13:53:32.696772 Write Rank0 MR13 =0xd8
747 13:53:32.697193 Write Rank0 MR13 =0xd8
748 13:53:32.700589 Write Rank0 MR12 =0x56
749 13:53:32.701058 Write Rank1 MR13 =0x59
750 13:53:32.703708 ==
751 13:53:32.706922 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
752 13:53:32.710475 fsp= 1, odt_onoff= 1, Byte mode= 0
753 13:53:32.710941 ==
754 13:53:32.713675 === u2Vref_new: 0x56 --> 0x2d
755 13:53:32.716993 === u2Vref_new: 0x58 --> 0x38
756 13:53:32.720398 === u2Vref_new: 0x5a --> 0x39
757 13:53:32.723570 === u2Vref_new: 0x5c --> 0x3c
758 13:53:32.724007 === u2Vref_new: 0x5e --> 0x3d
759 13:53:32.727445 === u2Vref_new: 0x60 --> 0xa0
760 13:53:32.730458 [CA 0] Center 34 (5~63) winsize 59
761 13:53:32.734248 [CA 1] Center 34 (6~63) winsize 58
762 13:53:32.737681 [CA 2] Center 29 (0~58) winsize 59
763 13:53:32.740463 [CA 3] Center 23 (-4~51) winsize 56
764 13:53:32.744071 [CA 4] Center 24 (-3~52) winsize 56
765 13:53:32.747334 [CA 5] Center 30 (1~59) winsize 59
766 13:53:32.747728
767 13:53:32.750582 [CATrainingPosCal] consider 2 rank data
768 13:53:32.753882 u2DelayCellTimex100 = 762/100 ps
769 13:53:32.757764 CA0 delay=34 (5~63),Diff = 10 PI (12 cell)
770 13:53:32.760873 CA1 delay=34 (6~63),Diff = 10 PI (12 cell)
771 13:53:32.763798 CA2 delay=28 (0~57),Diff = 4 PI (5 cell)
772 13:53:32.767325 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
773 13:53:32.774315 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
774 13:53:32.778053 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
775 13:53:32.778524
776 13:53:32.781307 CA PerBit enable=1, Macro0, CA PI delay=24
777 13:53:32.784228 === u2Vref_new: 0x56 --> 0x2d
778 13:53:32.784694
779 13:53:32.784995 Vref(ca) range 1: 22
780 13:53:32.785315
781 13:53:32.787810 CS Dly= 11 (42-0-32)
782 13:53:32.790890 Write Rank1 MR13 =0xd8
783 13:53:32.791357 Write Rank1 MR13 =0xd8
784 13:53:32.794089 Write Rank1 MR12 =0x56
785 13:53:32.797756 [RankSwap] Rank num 2, (Multi 1), Rank 0
786 13:53:32.798143 Write Rank0 MR2 =0xad
787 13:53:32.801055 [Write Leveling]
788 13:53:32.804266 delay byte0 byte1 byte2 byte3
789 13:53:32.804734
790 13:53:32.805033 10 0 0
791 13:53:32.807878 11 0 0
792 13:53:32.808350 12 0 0
793 13:53:32.810746 13 0 0
794 13:53:32.811138 14 0 0
795 13:53:32.811441 15 0 0
796 13:53:32.814314 16 0 0
797 13:53:32.814802 17 0 0
798 13:53:32.818069 18 0 0
799 13:53:32.818585 19 0 0
800 13:53:32.818894 20 0 0
801 13:53:32.821452 21 0 0
802 13:53:32.821972 22 0 0
803 13:53:32.824203 23 0 0
804 13:53:32.824597 24 0 0
805 13:53:32.824902 25 0 0
806 13:53:32.827720 26 0 0
807 13:53:32.828222 27 0 ff
808 13:53:32.831320 28 0 0
809 13:53:32.831798 29 0 ff
810 13:53:32.834218 30 0 ff
811 13:53:32.834610 31 0 ff
812 13:53:32.834915 32 0 ff
813 13:53:32.837871 33 ff ff
814 13:53:32.838517 34 ff ff
815 13:53:32.840857 35 ff ff
816 13:53:32.841374 36 ff ff
817 13:53:32.844500 37 ff ff
818 13:53:32.844973 38 ff ff
819 13:53:32.847789 39 ff ff
820 13:53:32.851043 pass bytecount = 0xff (0xff: all bytes pass)
821 13:53:32.851433
822 13:53:32.851735 DQS0 dly: 33
823 13:53:32.854797 DQS1 dly: 29
824 13:53:32.855183 Write Rank0 MR2 =0x2d
825 13:53:32.857493 [RankSwap] Rank num 2, (Multi 1), Rank 0
826 13:53:32.861161 Write Rank0 MR1 =0xd6
827 13:53:32.861553 [Gating]
828 13:53:32.861853 ==
829 13:53:32.868003 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
830 13:53:32.871237 fsp= 1, odt_onoff= 1, Byte mode= 0
831 13:53:32.871695 ==
832 13:53:32.874217 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
833 13:53:32.877758 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
834 13:53:32.884718 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
835 13:53:32.888257 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
836 13:53:32.891236 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
837 13:53:32.898009 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
838 13:53:32.901390 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
839 13:53:32.904774 3 1 28 |201 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
840 13:53:32.908609 3 2 0 |201 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
841 13:53:32.914792 3 2 4 |3534 909 |(11 11)(11 11) |(0 0)(0 0)| 0
842 13:53:32.918113 3 2 8 |3534 f0f |(11 11)(11 11) |(0 0)(0 0)| 0
843 13:53:32.921488 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
844 13:53:32.928786 3 2 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
845 13:53:32.931709 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
846 13:53:32.935254 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
847 13:53:32.938691 3 2 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
848 13:53:32.945089 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
849 13:53:32.948341 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
850 13:53:32.952200 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
851 13:53:32.957983 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
852 13:53:32.961776 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
853 13:53:32.964555 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
854 13:53:32.971891 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
855 13:53:32.975114 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
856 13:53:32.978348 3 4 0 |707 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
857 13:53:32.984817 3 4 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
858 13:53:32.988525 3 4 8 |3d3d 707 |(11 11)(11 11) |(1 1)(1 1)| 0
859 13:53:32.992169 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 13:53:32.994894 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 13:53:33.001945 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 13:53:33.004787 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 13:53:33.008510 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 13:53:33.015091 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 13:53:33.018697 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 13:53:33.021708 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 13:53:33.024978 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 13:53:33.032158 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 13:53:33.035375 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 13:53:33.038657 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
871 13:53:33.045649 [Byte 0] Lead/lag falling Transition (3, 5, 24)
872 13:53:33.048511 [Byte 1] Lead/lag falling Transition (3, 5, 24)
873 13:53:33.052731 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
874 13:53:33.055302 [Byte 0] Lead/lag Transition tap number (2)
875 13:53:33.061798 [Byte 1] Lead/lag Transition tap number (2)
876 13:53:33.065534 3 6 0 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
877 13:53:33.068834 3 6 4 |4646 b0a |(0 0)(11 11) |(0 0)(0 0)| 0
878 13:53:33.072044 [Byte 0]First pass (3, 6, 4)
879 13:53:33.075545 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 13:53:33.079017 [Byte 1]First pass (3, 6, 8)
881 13:53:33.082573 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 13:53:33.085378 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 13:53:33.089059 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 13:53:33.096109 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 13:53:33.098918 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 13:53:33.102063 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 13:53:33.106006 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 13:53:33.108935 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 13:53:33.115359 All bytes gating window > 1UI, Early break!
890 13:53:33.115788
891 13:53:33.119263 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 28)
892 13:53:33.119826
893 13:53:33.122252 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
894 13:53:33.122815
895 13:53:33.123158
896 13:53:33.123464
897 13:53:33.125525 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
898 13:53:33.125911
899 13:53:33.128796 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
900 13:53:33.129210
901 13:53:33.129552
902 13:53:33.132471 Write Rank0 MR1 =0x56
903 13:53:33.132945
904 13:53:33.135560 best RODT dly(2T, 0.5T) = (2, 2)
905 13:53:33.136068
906 13:53:33.138707 best RODT dly(2T, 0.5T) = (2, 2)
907 13:53:33.139091 ==
908 13:53:33.142362 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
909 13:53:33.145617 fsp= 1, odt_onoff= 1, Byte mode= 0
910 13:53:33.146125 ==
911 13:53:33.152794 Start DQ dly to find pass range UseTestEngine =0
912 13:53:33.156094 x-axis: bit #, y-axis: DQ dly (-127~63)
913 13:53:33.156552 RX Vref Scan = 0
914 13:53:33.159490 -26, [0] xxxxxxxx xxxxxxxx [MSB]
915 13:53:33.162407 -25, [0] xxxxxxxx xxxxxxxx [MSB]
916 13:53:33.165846 -24, [0] xxxxxxxx xxxxxxxx [MSB]
917 13:53:33.169064 -23, [0] xxxxxxxx xxxxxxxx [MSB]
918 13:53:33.172903 -22, [0] xxxxxxxx xxxxxxxx [MSB]
919 13:53:33.173422 -21, [0] xxxxxxxx xxxxxxxx [MSB]
920 13:53:33.176158 -20, [0] xxxxxxxx xxxxxxxx [MSB]
921 13:53:33.179752 -19, [0] xxxxxxxx xxxxxxxx [MSB]
922 13:53:33.182708 -18, [0] xxxxxxxx xxxxxxxx [MSB]
923 13:53:33.185860 -17, [0] xxxxxxxx xxxxxxxx [MSB]
924 13:53:33.189854 -16, [0] xxxxxxxx xxxxxxxx [MSB]
925 13:53:33.192876 -15, [0] xxxxxxxx xxxxxxxx [MSB]
926 13:53:33.196156 -14, [0] xxxxxxxx xxxxxxxx [MSB]
927 13:53:33.196665 -13, [0] xxxxxxxx xxxxxxxx [MSB]
928 13:53:33.199675 -12, [0] xxxxxxxx xxxxxxxx [MSB]
929 13:53:33.203429 -11, [0] xxxxxxxx xxxxxxxx [MSB]
930 13:53:33.206680 -10, [0] xxxxxxxx xxxxxxxx [MSB]
931 13:53:33.209712 -9, [0] xxxxxxxx xxxxxxxx [MSB]
932 13:53:33.213270 -8, [0] xxxxxxxx xxxxxxxx [MSB]
933 13:53:33.216020 -7, [0] xxxxxxxx xxxxxxxx [MSB]
934 13:53:33.219804 -6, [0] xxxxxxxx xxxxxxxx [MSB]
935 13:53:33.220317 -5, [0] xxxxxxxx xxxxxxxx [MSB]
936 13:53:33.222961 -4, [0] xxxxxxxx xxxxxxxx [MSB]
937 13:53:33.226445 -3, [0] xxxxxxxx xxxxxxxx [MSB]
938 13:53:33.229288 -2, [0] xxxxxxxx xxxxxxxx [MSB]
939 13:53:33.233002 -1, [0] xxxoxxxx xxxxxxxx [MSB]
940 13:53:33.236302 0, [0] xxxoxoxx xxxxxxxx [MSB]
941 13:53:33.236813 1, [0] xxxoxoxx xxxoxxxx [MSB]
942 13:53:33.239866 2, [0] xxxoxoxx xxxoxxxx [MSB]
943 13:53:33.243142 3, [0] xxxoxoxo oxxoxoox [MSB]
944 13:53:33.246476 4, [0] xxxoxooo ooxoxoox [MSB]
945 13:53:33.249503 5, [0] xxxoxooo ooxooooo [MSB]
946 13:53:33.252694 6, [0] xxxoxooo ooxooooo [MSB]
947 13:53:33.253085 7, [0] xooooooo ooxooooo [MSB]
948 13:53:33.256334 8, [0] xooooooo oooooooo [MSB]
949 13:53:33.259629 9, [0] xooooooo oooooooo [MSB]
950 13:53:33.262881 10, [0] xooooooo oooooooo [MSB]
951 13:53:33.266182 32, [0] oooxoooo oooooooo [MSB]
952 13:53:33.269333 33, [0] oooxoooo oooooxoo [MSB]
953 13:53:33.269734 34, [0] oooxoxxo oooooxxo [MSB]
954 13:53:33.272815 35, [0] oooxoxxx xooooxxo [MSB]
955 13:53:33.276426 36, [0] oooxoxxx xxoxoxxx [MSB]
956 13:53:33.279927 37, [0] oooxoxxx xxoxxxxx [MSB]
957 13:53:33.282957 38, [0] oooxoxxx xxoxxxxx [MSB]
958 13:53:33.286662 39, [0] oooxoxxx xxoxxxxx [MSB]
959 13:53:33.289536 40, [0] oooxxxxx xxoxxxxx [MSB]
960 13:53:33.289940 41, [0] xoxxxxxx xxoxxxxx [MSB]
961 13:53:33.293212 42, [0] xxxxxxxx xxxxxxxx [MSB]
962 13:53:33.296537 iDelay=42, Bit 0, Center 25 (11 ~ 40) 30
963 13:53:33.300142 iDelay=42, Bit 1, Center 24 (7 ~ 41) 35
964 13:53:33.303272 iDelay=42, Bit 2, Center 23 (7 ~ 40) 34
965 13:53:33.306313 iDelay=42, Bit 3, Center 15 (-1 ~ 31) 33
966 13:53:33.313837 iDelay=42, Bit 4, Center 23 (7 ~ 39) 33
967 13:53:33.316723 iDelay=42, Bit 5, Center 16 (0 ~ 33) 34
968 13:53:33.319808 iDelay=42, Bit 6, Center 18 (4 ~ 33) 30
969 13:53:33.323212 iDelay=42, Bit 7, Center 18 (3 ~ 34) 32
970 13:53:33.326481 iDelay=42, Bit 8, Center 18 (3 ~ 34) 32
971 13:53:33.329836 iDelay=42, Bit 9, Center 19 (4 ~ 35) 32
972 13:53:33.333215 iDelay=42, Bit 10, Center 24 (8 ~ 41) 34
973 13:53:33.336460 iDelay=42, Bit 11, Center 18 (1 ~ 35) 35
974 13:53:33.339546 iDelay=42, Bit 12, Center 20 (5 ~ 36) 32
975 13:53:33.342902 iDelay=42, Bit 13, Center 17 (3 ~ 32) 30
976 13:53:33.346559 iDelay=42, Bit 14, Center 18 (3 ~ 33) 31
977 13:53:33.349897 iDelay=42, Bit 15, Center 20 (5 ~ 35) 31
978 13:53:33.350295 ==
979 13:53:33.356299 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
980 13:53:33.360037 fsp= 1, odt_onoff= 1, Byte mode= 0
981 13:53:33.360503 ==
982 13:53:33.360805 DQS Delay:
983 13:53:33.362978 DQS0 = 0, DQS1 = 0
984 13:53:33.363361 DQM Delay:
985 13:53:33.366802 DQM0 = 20, DQM1 = 19
986 13:53:33.367184 DQ Delay:
987 13:53:33.369790 DQ0 =25, DQ1 =24, DQ2 =23, DQ3 =15
988 13:53:33.373570 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
989 13:53:33.376681 DQ8 =18, DQ9 =19, DQ10 =24, DQ11 =18
990 13:53:33.379916 DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20
991 13:53:33.380300
992 13:53:33.380611
993 13:53:33.380885 DramC Write-DBI off
994 13:53:33.383302 ==
995 13:53:33.386573 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
996 13:53:33.389738 fsp= 1, odt_onoff= 1, Byte mode= 0
997 13:53:33.390127 ==
998 13:53:33.393604 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
999 13:53:33.393992
1000 13:53:33.396614 Begin, DQ Scan Range 925~1181
1001 13:53:33.397001
1002 13:53:33.397348
1003 13:53:33.400163 TX Vref Scan disable
1004 13:53:33.403283 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1005 13:53:33.406521 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1006 13:53:33.409896 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1007 13:53:33.413409 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1008 13:53:33.416790 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1009 13:53:33.420527 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1010 13:53:33.423701 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1011 13:53:33.427121 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1012 13:53:33.430332 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1013 13:53:33.433674 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1014 13:53:33.437367 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1015 13:53:33.440638 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1016 13:53:33.447040 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1017 13:53:33.450650 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1018 13:53:33.453489 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1019 13:53:33.457007 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1020 13:53:33.460255 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1021 13:53:33.463807 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1022 13:53:33.467226 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1023 13:53:33.470290 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1024 13:53:33.473934 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1025 13:53:33.477404 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1026 13:53:33.480919 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1027 13:53:33.484019 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1028 13:53:33.487762 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1029 13:53:33.491364 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1030 13:53:33.494106 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1031 13:53:33.497227 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1032 13:53:33.500841 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1033 13:53:33.504744 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1034 13:53:33.510712 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1035 13:53:33.514180 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1036 13:53:33.517467 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1037 13:53:33.520851 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1038 13:53:33.523931 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1039 13:53:33.527713 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1040 13:53:33.530674 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1041 13:53:33.534146 962 |3 6 2|[0] xxxxxxxx xxxoxxxx [MSB]
1042 13:53:33.537411 963 |3 6 3|[0] xxxxxxxx xxxoxxxx [MSB]
1043 13:53:33.540760 964 |3 6 4|[0] xxxxxxxx oxxoxoxx [MSB]
1044 13:53:33.543962 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1045 13:53:33.547426 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1046 13:53:33.550879 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1047 13:53:33.554534 968 |3 6 8|[0] xxxxxxxx ooxooooo [MSB]
1048 13:53:33.557915 969 |3 6 9|[0] xxxoxxxx oooooooo [MSB]
1049 13:53:33.560779 970 |3 6 10|[0] xxxoxoox oooooooo [MSB]
1050 13:53:33.564091 971 |3 6 11|[0] xxxoxoox oooooooo [MSB]
1051 13:53:33.567719 972 |3 6 12|[0] xxxoxoox oooooooo [MSB]
1052 13:53:33.571506 973 |3 6 13|[0] xxxoooox oooooooo [MSB]
1053 13:53:33.574552 974 |3 6 14|[0] xxxooooo oooooooo [MSB]
1054 13:53:33.577819 975 |3 6 15|[0] xxoooooo oooooooo [MSB]
1055 13:53:33.585718 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1056 13:53:33.589339 988 |3 6 28|[0] oooooooo oxxxxxxx [MSB]
1057 13:53:33.592625 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1058 13:53:33.596193 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1059 13:53:33.599651 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1060 13:53:33.602248 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1061 13:53:33.605732 993 |3 6 33|[0] oxxxxxxx xxxxxxxx [MSB]
1062 13:53:33.609226 994 |3 6 34|[0] xxxxxxxx xxxxxxxx [MSB]
1063 13:53:33.612257 Byte0, DQ PI dly=982, DQM PI dly= 982
1064 13:53:33.616051 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1065 13:53:33.616564
1066 13:53:33.622546 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1067 13:53:33.623048
1068 13:53:33.625796 Byte1, DQ PI dly=975, DQM PI dly= 975
1069 13:53:33.629124 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1070 13:53:33.629603
1071 13:53:33.632956 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1072 13:53:33.633463
1073 13:53:33.633770 ==
1074 13:53:33.639584 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1075 13:53:33.642371 fsp= 1, odt_onoff= 1, Byte mode= 0
1076 13:53:33.642759 ==
1077 13:53:33.645884 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1078 13:53:33.646427
1079 13:53:33.649476 Begin, DQ Scan Range 951~1015
1080 13:53:33.652262 Write Rank0 MR14 =0x0
1081 13:53:33.660095
1082 13:53:33.660598 CH=0, VrefRange= 0, VrefLevel = 0
1083 13:53:33.666579 TX Bit0 (977~994) 18 985, Bit8 (966~984) 19 975,
1084 13:53:33.669865 TX Bit1 (977~993) 17 985, Bit9 (967~984) 18 975,
1085 13:53:33.676627 TX Bit2 (977~992) 16 984, Bit10 (970~989) 20 979,
1086 13:53:33.680325 TX Bit3 (971~986) 16 978, Bit11 (965~984) 20 974,
1087 13:53:33.683731 TX Bit4 (976~993) 18 984, Bit12 (967~984) 18 975,
1088 13:53:33.690582 TX Bit5 (972~987) 16 979, Bit13 (967~983) 17 975,
1089 13:53:33.693775 TX Bit6 (974~988) 15 981, Bit14 (968~984) 17 976,
1090 13:53:33.696788 TX Bit7 (977~991) 15 984, Bit15 (969~986) 18 977,
1091 13:53:33.697332
1092 13:53:33.700390 Write Rank0 MR14 =0x2
1093 13:53:33.709266
1094 13:53:33.709768 CH=0, VrefRange= 0, VrefLevel = 2
1095 13:53:33.715559 TX Bit0 (977~994) 18 985, Bit8 (966~985) 20 975,
1096 13:53:33.718710 TX Bit1 (976~993) 18 984, Bit9 (967~985) 19 976,
1097 13:53:33.725347 TX Bit2 (976~993) 18 984, Bit10 (970~990) 21 980,
1098 13:53:33.729178 TX Bit3 (970~986) 17 978, Bit11 (965~984) 20 974,
1099 13:53:33.731966 TX Bit4 (975~993) 19 984, Bit12 (967~985) 19 976,
1100 13:53:33.739159 TX Bit5 (971~988) 18 979, Bit13 (966~983) 18 974,
1101 13:53:33.742302 TX Bit6 (973~988) 16 980, Bit14 (968~985) 18 976,
1102 13:53:33.745545 TX Bit7 (976~991) 16 983, Bit15 (970~987) 18 978,
1103 13:53:33.745974
1104 13:53:33.748893 Write Rank0 MR14 =0x4
1105 13:53:33.757546
1106 13:53:33.758038 CH=0, VrefRange= 0, VrefLevel = 4
1107 13:53:33.764025 TX Bit0 (977~994) 18 985, Bit8 (966~985) 20 975,
1108 13:53:33.767158 TX Bit1 (977~993) 17 985, Bit9 (967~985) 19 976,
1109 13:53:33.773926 TX Bit2 (976~993) 18 984, Bit10 (970~990) 21 980,
1110 13:53:33.777582 TX Bit3 (970~987) 18 978, Bit11 (965~984) 20 974,
1111 13:53:33.780796 TX Bit4 (975~994) 20 984, Bit12 (966~985) 20 975,
1112 13:53:33.787529 TX Bit5 (971~989) 19 980, Bit13 (966~984) 19 975,
1113 13:53:33.790675 TX Bit6 (972~990) 19 981, Bit14 (967~986) 20 976,
1114 13:53:33.794355 TX Bit7 (976~991) 16 983, Bit15 (969~987) 19 978,
1115 13:53:33.794847
1116 13:53:33.797295 Write Rank0 MR14 =0x6
1117 13:53:33.806125
1118 13:53:33.806618 CH=0, VrefRange= 0, VrefLevel = 6
1119 13:53:33.813074 TX Bit0 (977~995) 19 986, Bit8 (965~985) 21 975,
1120 13:53:33.816516 TX Bit1 (976~994) 19 985, Bit9 (967~986) 20 976,
1121 13:53:33.819551 TX Bit2 (976~994) 19 985, Bit10 (970~990) 21 980,
1122 13:53:33.826210 TX Bit3 (970~987) 18 978, Bit11 (964~985) 22 974,
1123 13:53:33.829658 TX Bit4 (975~994) 20 984, Bit12 (967~986) 20 976,
1124 13:53:33.836793 TX Bit5 (971~990) 20 980, Bit13 (966~984) 19 975,
1125 13:53:33.839788 TX Bit6 (972~990) 19 981, Bit14 (967~986) 20 976,
1126 13:53:33.843354 TX Bit7 (976~992) 17 984, Bit15 (969~989) 21 979,
1127 13:53:33.843786
1128 13:53:33.846854 Write Rank0 MR14 =0x8
1129 13:53:33.855754
1130 13:53:33.856252 CH=0, VrefRange= 0, VrefLevel = 8
1131 13:53:33.861637 TX Bit0 (977~996) 20 986, Bit8 (965~986) 22 975,
1132 13:53:33.865306 TX Bit1 (976~994) 19 985, Bit9 (966~985) 20 975,
1133 13:53:33.871996 TX Bit2 (976~994) 19 985, Bit10 (970~991) 22 980,
1134 13:53:33.875325 TX Bit3 (969~988) 20 978, Bit11 (964~985) 22 974,
1135 13:53:33.879432 TX Bit4 (975~994) 20 984, Bit12 (966~986) 21 976,
1136 13:53:33.885618 TX Bit5 (971~990) 20 980, Bit13 (965~984) 20 974,
1137 13:53:33.888876 TX Bit6 (971~991) 21 981, Bit14 (967~986) 20 976,
1138 13:53:33.891999 TX Bit7 (975~992) 18 983, Bit15 (969~989) 21 979,
1139 13:53:33.892465
1140 13:53:33.895405 Write Rank0 MR14 =0xa
1141 13:53:33.952467
1142 13:53:33.953103 CH=0, VrefRange= 0, VrefLevel = 10
1143 13:53:33.953600 TX Bit0 (977~996) 20 986, Bit8 (964~986) 23 975,
1144 13:53:33.954283 TX Bit1 (976~994) 19 985, Bit9 (966~986) 21 976,
1145 13:53:33.954630 TX Bit2 (975~994) 20 984, Bit10 (969~991) 23 980,
1146 13:53:33.954904 TX Bit3 (969~988) 20 978, Bit11 (963~986) 24 974,
1147 13:53:33.955167 TX Bit4 (974~995) 22 984, Bit12 (966~987) 22 976,
1148 13:53:33.955425 TX Bit5 (970~991) 22 980, Bit13 (964~985) 22 974,
1149 13:53:33.955680 TX Bit6 (971~991) 21 981, Bit14 (966~987) 22 976,
1150 13:53:33.955931 TX Bit7 (975~992) 18 983, Bit15 (969~989) 21 979,
1151 13:53:33.956185
1152 13:53:33.956437 Write Rank0 MR14 =0xc
1153 13:53:33.956685
1154 13:53:33.992542 CH=0, VrefRange= 0, VrefLevel = 12
1155 13:53:33.993026 TX Bit0 (976~996) 21 986, Bit8 (965~987) 23 976,
1156 13:53:33.993372 TX Bit1 (976~995) 20 985, Bit9 (966~987) 22 976,
1157 13:53:33.993653 TX Bit2 (975~994) 20 984, Bit10 (969~991) 23 980,
1158 13:53:33.994236 TX Bit3 (969~990) 22 979, Bit11 (963~986) 24 974,
1159 13:53:33.994523 TX Bit4 (974~995) 22 984, Bit12 (966~987) 22 976,
1160 13:53:33.994782 TX Bit5 (970~991) 22 980, Bit13 (965~985) 21 975,
1161 13:53:33.995038 TX Bit6 (971~992) 22 981, Bit14 (966~988) 23 977,
1162 13:53:33.995290 TX Bit7 (975~993) 19 984, Bit15 (968~989) 22 978,
1163 13:53:33.995539
1164 13:53:33.996098 Write Rank0 MR14 =0xe
1165 13:53:34.002516
1166 13:53:34.006242 CH=0, VrefRange= 0, VrefLevel = 14
1167 13:53:34.009782 TX Bit0 (976~997) 22 986, Bit8 (964~988) 25 976,
1168 13:53:34.013201 TX Bit1 (976~995) 20 985, Bit9 (966~988) 23 977,
1169 13:53:34.019222 TX Bit2 (975~995) 21 985, Bit10 (969~991) 23 980,
1170 13:53:34.022493 TX Bit3 (969~990) 22 979, Bit11 (963~987) 25 975,
1171 13:53:34.025688 TX Bit4 (974~996) 23 985, Bit12 (965~988) 24 976,
1172 13:53:34.032711 TX Bit5 (970~991) 22 980, Bit13 (964~986) 23 975,
1173 13:53:34.035746 TX Bit6 (970~992) 23 981, Bit14 (965~989) 25 977,
1174 13:53:34.039189 TX Bit7 (974~993) 20 983, Bit15 (968~990) 23 979,
1175 13:53:34.039574
1176 13:53:34.042671 Write Rank0 MR14 =0x10
1177 13:53:34.052258
1178 13:53:34.052715 CH=0, VrefRange= 0, VrefLevel = 16
1179 13:53:34.058714 TX Bit0 (976~998) 23 987, Bit8 (963~988) 26 975,
1180 13:53:34.062354 TX Bit1 (976~995) 20 985, Bit9 (965~988) 24 976,
1181 13:53:34.068797 TX Bit2 (975~995) 21 985, Bit10 (969~992) 24 980,
1182 13:53:34.072397 TX Bit3 (968~991) 24 979, Bit11 (962~988) 27 975,
1183 13:53:34.075409 TX Bit4 (973~996) 24 984, Bit12 (965~988) 24 976,
1184 13:53:34.082039 TX Bit5 (969~991) 23 980, Bit13 (963~986) 24 974,
1185 13:53:34.085518 TX Bit6 (970~992) 23 981, Bit14 (965~989) 25 977,
1186 13:53:34.089292 TX Bit7 (974~994) 21 984, Bit15 (968~990) 23 979,
1187 13:53:34.089758
1188 13:53:34.092183 Write Rank0 MR14 =0x12
1189 13:53:34.101484
1190 13:53:34.104885 CH=0, VrefRange= 0, VrefLevel = 18
1191 13:53:34.108282 TX Bit0 (975~998) 24 986, Bit8 (963~988) 26 975,
1192 13:53:34.111586 TX Bit1 (975~996) 22 985, Bit9 (965~989) 25 977,
1193 13:53:34.118666 TX Bit2 (975~996) 22 985, Bit10 (969~992) 24 980,
1194 13:53:34.121801 TX Bit3 (968~991) 24 979, Bit11 (962~988) 27 975,
1195 13:53:34.125354 TX Bit4 (973~997) 25 985, Bit12 (965~989) 25 977,
1196 13:53:34.132526 TX Bit5 (969~992) 24 980, Bit13 (964~987) 24 975,
1197 13:53:34.134924 TX Bit6 (970~992) 23 981, Bit14 (965~989) 25 977,
1198 13:53:34.138576 TX Bit7 (974~994) 21 984, Bit15 (968~990) 23 979,
1199 13:53:34.139050
1200 13:53:34.142162 Write Rank0 MR14 =0x14
1201 13:53:34.151444
1202 13:53:34.154367 CH=0, VrefRange= 0, VrefLevel = 20
1203 13:53:34.158116 TX Bit0 (975~999) 25 987, Bit8 (963~988) 26 975,
1204 13:53:34.161445 TX Bit1 (975~997) 23 986, Bit9 (964~989) 26 976,
1205 13:53:34.168525 TX Bit2 (974~996) 23 985, Bit10 (968~992) 25 980,
1206 13:53:34.171397 TX Bit3 (968~991) 24 979, Bit11 (962~989) 28 975,
1207 13:53:34.174890 TX Bit4 (973~997) 25 985, Bit12 (964~989) 26 976,
1208 13:53:34.181283 TX Bit5 (969~992) 24 980, Bit13 (963~988) 26 975,
1209 13:53:34.185273 TX Bit6 (970~993) 24 981, Bit14 (965~989) 25 977,
1210 13:53:34.188405 TX Bit7 (973~994) 22 983, Bit15 (968~991) 24 979,
1211 13:53:34.188875
1212 13:53:34.191578 Write Rank0 MR14 =0x16
1213 13:53:34.201193
1214 13:53:34.204546 CH=0, VrefRange= 0, VrefLevel = 22
1215 13:53:34.207818 TX Bit0 (975~999) 25 987, Bit8 (962~988) 27 975,
1216 13:53:34.211091 TX Bit1 (974~998) 25 986, Bit9 (965~989) 25 977,
1217 13:53:34.217884 TX Bit2 (974~997) 24 985, Bit10 (969~992) 24 980,
1218 13:53:34.221483 TX Bit3 (968~992) 25 980, Bit11 (962~989) 28 975,
1219 13:53:34.224760 TX Bit4 (973~998) 26 985, Bit12 (963~989) 27 976,
1220 13:53:34.231352 TX Bit5 (969~992) 24 980, Bit13 (963~989) 27 976,
1221 13:53:34.235050 TX Bit6 (969~993) 25 981, Bit14 (964~989) 26 976,
1222 13:53:34.237756 TX Bit7 (972~995) 24 983, Bit15 (968~991) 24 979,
1223 13:53:34.238147
1224 13:53:34.241185 Write Rank0 MR14 =0x18
1225 13:53:34.250729
1226 13:53:34.254209 CH=0, VrefRange= 0, VrefLevel = 24
1227 13:53:34.257257 TX Bit0 (975~999) 25 987, Bit8 (962~987) 26 974,
1228 13:53:34.260492 TX Bit1 (974~998) 25 986, Bit9 (964~989) 26 976,
1229 13:53:34.267122 TX Bit2 (974~997) 24 985, Bit10 (968~992) 25 980,
1230 13:53:34.270415 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1231 13:53:34.273686 TX Bit4 (973~998) 26 985, Bit12 (963~990) 28 976,
1232 13:53:34.280465 TX Bit5 (969~992) 24 980, Bit13 (962~988) 27 975,
1233 13:53:34.284314 TX Bit6 (969~993) 25 981, Bit14 (965~989) 25 977,
1234 13:53:34.287981 TX Bit7 (971~995) 25 983, Bit15 (967~991) 25 979,
1235 13:53:34.288452
1236 13:53:34.290497 Write Rank0 MR14 =0x1a
1237 13:53:34.300692
1238 13:53:34.303803 CH=0, VrefRange= 0, VrefLevel = 26
1239 13:53:34.306820 TX Bit0 (975~999) 25 987, Bit8 (962~987) 26 974,
1240 13:53:34.310921 TX Bit1 (974~998) 25 986, Bit9 (964~989) 26 976,
1241 13:53:34.317266 TX Bit2 (974~997) 24 985, Bit10 (968~992) 25 980,
1242 13:53:34.320608 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1243 13:53:34.323769 TX Bit4 (973~998) 26 985, Bit12 (963~990) 28 976,
1244 13:53:34.330168 TX Bit5 (969~992) 24 980, Bit13 (962~988) 27 975,
1245 13:53:34.333696 TX Bit6 (969~993) 25 981, Bit14 (965~989) 25 977,
1246 13:53:34.337190 TX Bit7 (971~995) 25 983, Bit15 (967~991) 25 979,
1247 13:53:34.337578
1248 13:53:34.340223 Write Rank0 MR14 =0x1c
1249 13:53:34.349786
1250 13:53:34.353490 CH=0, VrefRange= 0, VrefLevel = 28
1251 13:53:34.356502 TX Bit0 (975~999) 25 987, Bit8 (962~987) 26 974,
1252 13:53:34.359990 TX Bit1 (974~998) 25 986, Bit9 (964~989) 26 976,
1253 13:53:34.366527 TX Bit2 (974~997) 24 985, Bit10 (968~992) 25 980,
1254 13:53:34.369920 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1255 13:53:34.373623 TX Bit4 (973~998) 26 985, Bit12 (963~990) 28 976,
1256 13:53:34.380061 TX Bit5 (969~992) 24 980, Bit13 (962~988) 27 975,
1257 13:53:34.383341 TX Bit6 (969~993) 25 981, Bit14 (965~989) 25 977,
1258 13:53:34.387117 TX Bit7 (971~995) 25 983, Bit15 (967~991) 25 979,
1259 13:53:34.387585
1260 13:53:34.389949 Write Rank0 MR14 =0x1e
1261 13:53:34.399518
1262 13:53:34.402786 CH=0, VrefRange= 0, VrefLevel = 30
1263 13:53:34.406230 TX Bit0 (975~999) 25 987, Bit8 (962~987) 26 974,
1264 13:53:34.409432 TX Bit1 (974~998) 25 986, Bit9 (964~989) 26 976,
1265 13:53:34.416163 TX Bit2 (974~997) 24 985, Bit10 (968~992) 25 980,
1266 13:53:34.419809 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1267 13:53:34.422727 TX Bit4 (973~998) 26 985, Bit12 (963~990) 28 976,
1268 13:53:34.429465 TX Bit5 (969~992) 24 980, Bit13 (962~988) 27 975,
1269 13:53:34.432954 TX Bit6 (969~993) 25 981, Bit14 (965~989) 25 977,
1270 13:53:34.436082 TX Bit7 (971~995) 25 983, Bit15 (967~991) 25 979,
1271 13:53:34.436545
1272 13:53:34.436849
1273 13:53:34.439615 TX Vref found, early break! 369< 387
1274 13:53:34.446158 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1275 13:53:34.449826 u1DelayCellOfst[0]=8 cells (7 PI)
1276 13:53:34.453262 u1DelayCellOfst[1]=7 cells (6 PI)
1277 13:53:34.456206 u1DelayCellOfst[2]=6 cells (5 PI)
1278 13:53:34.456586 u1DelayCellOfst[3]=0 cells (0 PI)
1279 13:53:34.459938 u1DelayCellOfst[4]=6 cells (5 PI)
1280 13:53:34.463277 u1DelayCellOfst[5]=0 cells (0 PI)
1281 13:53:34.466596 u1DelayCellOfst[6]=1 cells (1 PI)
1282 13:53:34.470039 u1DelayCellOfst[7]=3 cells (3 PI)
1283 13:53:34.472868 Byte0, DQ PI dly=980, DQM PI dly= 983
1284 13:53:34.476488 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1285 13:53:34.476866
1286 13:53:34.483321 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1287 13:53:34.483699
1288 13:53:34.486256 u1DelayCellOfst[8]=0 cells (0 PI)
1289 13:53:34.489778 u1DelayCellOfst[9]=2 cells (2 PI)
1290 13:53:34.490154 u1DelayCellOfst[10]=7 cells (6 PI)
1291 13:53:34.493395 u1DelayCellOfst[11]=1 cells (1 PI)
1292 13:53:34.496724 u1DelayCellOfst[12]=2 cells (2 PI)
1293 13:53:34.499525 u1DelayCellOfst[13]=1 cells (1 PI)
1294 13:53:34.503270 u1DelayCellOfst[14]=3 cells (3 PI)
1295 13:53:34.506544 u1DelayCellOfst[15]=6 cells (5 PI)
1296 13:53:34.509938 Byte1, DQ PI dly=974, DQM PI dly= 977
1297 13:53:34.512841 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
1298 13:53:34.513277
1299 13:53:34.519881 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
1300 13:53:34.520368
1301 13:53:34.520725 Write Rank0 MR14 =0x18
1302 13:53:34.521007
1303 13:53:34.523070 Final TX Range 0 Vref 24
1304 13:53:34.523450
1305 13:53:34.529670 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1306 13:53:34.530058
1307 13:53:34.537172 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1308 13:53:34.543422 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1309 13:53:34.550304 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1310 13:53:34.553767 Write Rank0 MR3 =0xb0
1311 13:53:34.554153 DramC Write-DBI on
1312 13:53:34.554450 ==
1313 13:53:34.560307 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1314 13:53:34.563235 fsp= 1, odt_onoff= 1, Byte mode= 0
1315 13:53:34.563618 ==
1316 13:53:34.566771 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1317 13:53:34.567188
1318 13:53:34.569919 Begin, DQ Scan Range 697~761
1319 13:53:34.570299
1320 13:53:34.570591
1321 13:53:34.573641 TX Vref Scan disable
1322 13:53:34.577518 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1323 13:53:34.580371 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1324 13:53:34.583736 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1325 13:53:34.587162 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1326 13:53:34.590775 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1327 13:53:34.593859 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1328 13:53:34.597265 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1329 13:53:34.600869 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1330 13:53:34.604194 705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]
1331 13:53:34.607236 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1332 13:53:34.610444 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1333 13:53:34.613963 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1334 13:53:34.617606 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1335 13:53:34.620413 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1336 13:53:34.623449 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1337 13:53:34.627354 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1338 13:53:34.630114 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1339 13:53:34.636910 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1340 13:53:34.640081 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1341 13:53:34.647001 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1342 13:53:34.650208 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1343 13:53:34.654199 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1344 13:53:34.657684 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1345 13:53:34.660248 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1346 13:53:34.663592 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1347 13:53:34.667086 741 |2 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1348 13:53:34.670672 Byte0, DQ PI dly=727, DQM PI dly= 727
1349 13:53:34.674049 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
1350 13:53:34.674440
1351 13:53:34.677323 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
1352 13:53:34.680746
1353 13:53:34.684487 Byte1, DQ PI dly=719, DQM PI dly= 719
1354 13:53:34.687876 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 15)
1355 13:53:34.688348
1356 13:53:34.690282 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 15)
1357 13:53:34.690670
1358 13:53:34.697659 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1359 13:53:34.703993 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1360 13:53:34.711099 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1361 13:53:34.714300 wait MRW command Rank0 MR3 =0x30 fired (1)
1362 13:53:34.717347 Write Rank0 MR3 =0x30
1363 13:53:34.720836 DramC Write-DBI off
1364 13:53:34.721339
1365 13:53:34.721646 [DATLAT]
1366 13:53:34.724181 Freq=1600, CH0 RK0, use_rxtx_scan=0
1367 13:53:34.724649
1368 13:53:34.724951 DATLAT Default: 0xf
1369 13:53:34.727978 7, 0xFFFF, sum=0
1370 13:53:34.728452 8, 0xFFFF, sum=0
1371 13:53:34.730720 9, 0xFFFF, sum=0
1372 13:53:34.731111 10, 0xFFFF, sum=0
1373 13:53:34.734310 11, 0xFFFF, sum=0
1374 13:53:34.734786 12, 0xFFFF, sum=0
1375 13:53:34.737495 13, 0xFFFF, sum=0
1376 13:53:34.737887 14, 0x0, sum=1
1377 13:53:34.740744 15, 0x0, sum=2
1378 13:53:34.741251 16, 0x0, sum=3
1379 13:53:34.741560 17, 0x0, sum=4
1380 13:53:34.747605 pattern=2 first_step=14 total pass=5 best_step=16
1381 13:53:34.747996 ==
1382 13:53:34.750696 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1383 13:53:34.754138 fsp= 1, odt_onoff= 1, Byte mode= 0
1384 13:53:34.754592 ==
1385 13:53:34.760673 Start DQ dly to find pass range UseTestEngine =1
1386 13:53:34.763918 x-axis: bit #, y-axis: DQ dly (-127~63)
1387 13:53:34.764297 RX Vref Scan = 1
1388 13:53:34.887392
1389 13:53:34.887886 RX Vref found, early break!
1390 13:53:34.888219
1391 13:53:34.894120 Final RX Vref 13, apply to both rank0 and 1
1392 13:53:34.894687 ==
1393 13:53:34.896922 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1394 13:53:34.900433 fsp= 1, odt_onoff= 1, Byte mode= 0
1395 13:53:34.900926 ==
1396 13:53:34.901269 DQS Delay:
1397 13:53:34.903879 DQS0 = 0, DQS1 = 0
1398 13:53:34.904336 DQM Delay:
1399 13:53:34.907152 DQM0 = 20, DQM1 = 19
1400 13:53:34.907533 DQ Delay:
1401 13:53:34.910358 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15
1402 13:53:34.913468 DQ4 =22, DQ5 =16, DQ6 =18, DQ7 =19
1403 13:53:34.917665 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =16
1404 13:53:34.920741 DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20
1405 13:53:34.921290
1406 13:53:34.921600
1407 13:53:34.921871
1408 13:53:34.923765 [DramC_TX_OE_Calibration] TA2
1409 13:53:34.927150 Original DQ_B0 (3 6) =30, OEN = 27
1410 13:53:34.931016 Original DQ_B1 (3 6) =30, OEN = 27
1411 13:53:34.934436 23, 0x0, End_B0=23 End_B1=23
1412 13:53:34.934830 24, 0x0, End_B0=24 End_B1=24
1413 13:53:34.938171 25, 0x0, End_B0=25 End_B1=25
1414 13:53:34.940945 26, 0x0, End_B0=26 End_B1=26
1415 13:53:34.944427 27, 0x0, End_B0=27 End_B1=27
1416 13:53:34.944901 28, 0x0, End_B0=28 End_B1=28
1417 13:53:34.947702 29, 0x0, End_B0=29 End_B1=29
1418 13:53:34.951180 30, 0x0, End_B0=30 End_B1=30
1419 13:53:34.954312 31, 0xFFFF, End_B0=30 End_B1=30
1420 13:53:34.957841 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1421 13:53:34.964081 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1422 13:53:34.964538
1423 13:53:34.964842
1424 13:53:34.967818 Write Rank0 MR23 =0x3f
1425 13:53:34.968202 [DQSOSC]
1426 13:53:34.974704 [DQSOSCAuto] RK0, (LSB)MR18= 0xaa, (MSB)MR19= 0x3, tDQSOscB0 = 335 ps tDQSOscB1 = 0 ps
1427 13:53:34.980908 CH0_RK0: MR19=0x3, MR18=0xAA, DQSOSC=335, MR23=63, INC=21, DEC=32
1428 13:53:34.984611 Write Rank0 MR23 =0x3f
1429 13:53:34.985074 [DQSOSC]
1430 13:53:34.991178 [DQSOSCAuto] RK0, (LSB)MR18= 0xad, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
1431 13:53:34.994166 CH0 RK0: MR19=3, MR18=AD
1432 13:53:34.997780 [RankSwap] Rank num 2, (Multi 1), Rank 1
1433 13:53:35.001522 Write Rank0 MR2 =0xad
1434 13:53:35.001927 [Write Leveling]
1435 13:53:35.004624 delay byte0 byte1 byte2 byte3
1436 13:53:35.005088
1437 13:53:35.005486 10 0 0
1438 13:53:35.007864 11 0 0
1439 13:53:35.008507 12 0 0
1440 13:53:35.011063 13 0 0
1441 13:53:35.011537 14 0 0
1442 13:53:35.011843 15 0 0
1443 13:53:35.014406 16 0 0
1444 13:53:35.014858 17 0 0
1445 13:53:35.017658 18 0 0
1446 13:53:35.018050 19 0 0
1447 13:53:35.018357 20 0 0
1448 13:53:35.021241 21 0 0
1449 13:53:35.021745 22 0 0
1450 13:53:35.024910 23 0 0
1451 13:53:35.025364 24 0 0
1452 13:53:35.025678 25 0 0
1453 13:53:35.027736 26 0 0
1454 13:53:35.028128 27 0 0
1455 13:53:35.031148 28 0 0
1456 13:53:35.031647 29 0 0
1457 13:53:35.034607 30 0 ff
1458 13:53:35.035000 31 0 ff
1459 13:53:35.035305 32 0 ff
1460 13:53:35.037952 33 0 ff
1461 13:53:35.038343 34 ff ff
1462 13:53:35.041645 35 ff ff
1463 13:53:35.042124 36 ff ff
1464 13:53:35.044557 37 ff ff
1465 13:53:35.044984 38 ff ff
1466 13:53:35.048194 39 ff ff
1467 13:53:35.048585 40 ff ff
1468 13:53:35.051354 pass bytecount = 0xff (0xff: all bytes pass)
1469 13:53:35.051740
1470 13:53:35.055039 DQS0 dly: 34
1471 13:53:35.055507 DQS1 dly: 30
1472 13:53:35.058049 Write Rank0 MR2 =0x2d
1473 13:53:35.061393 [RankSwap] Rank num 2, (Multi 1), Rank 0
1474 13:53:35.061862 Write Rank1 MR1 =0xd6
1475 13:53:35.064836 [Gating]
1476 13:53:35.065255 ==
1477 13:53:35.068200 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1478 13:53:35.071421 fsp= 1, odt_onoff= 1, Byte mode= 0
1479 13:53:35.071810 ==
1480 13:53:35.077946 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1481 13:53:35.081661 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1482 13:53:35.085253 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1483 13:53:35.088579 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1484 13:53:35.095079 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1485 13:53:35.098740 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1486 13:53:35.101440 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1487 13:53:35.108779 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1488 13:53:35.112162 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1489 13:53:35.114850 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1490 13:53:35.118388 3 2 8 |2c2c 2c2b |(11 10)(11 11) |(1 0)(1 0)| 0
1491 13:53:35.125206 3 2 12 |c0c 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
1492 13:53:35.128208 3 2 16 |3534 303 |(11 11)(11 11) |(0 0)(0 0)| 0
1493 13:53:35.132197 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1494 13:53:35.139299 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1495 13:53:35.142032 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1496 13:53:35.145638 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1497 13:53:35.148754 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1498 13:53:35.155625 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1499 13:53:35.159109 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1500 13:53:35.162030 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1501 13:53:35.168594 [Byte 0] Lead/lag Transition tap number (1)
1502 13:53:35.172164 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1503 13:53:35.175822 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1504 13:53:35.178753 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1505 13:53:35.185177 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1506 13:53:35.189282 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1507 13:53:35.192173 3 4 8 |807 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1508 13:53:35.199329 3 4 12 |3d3c 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1509 13:53:35.202373 3 4 16 |3d3d 1111 |(11 11)(11 11) |(1 1)(1 1)| 0
1510 13:53:35.205495 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1511 13:53:35.211997 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1512 13:53:35.215317 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1513 13:53:35.219005 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1514 13:53:35.225097 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1515 13:53:35.228826 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1516 13:53:35.232092 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1517 13:53:35.235339 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1518 13:53:35.242471 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1519 13:53:35.245529 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1520 13:53:35.248944 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1521 13:53:35.255555 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1522 13:53:35.259080 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1523 13:53:35.262552 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1524 13:53:35.265418 [Byte 0] Lead/lag Transition tap number (2)
1525 13:53:35.272329 [Byte 1] Lead/lag Transition tap number (1)
1526 13:53:35.275861 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1527 13:53:35.279616 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
1528 13:53:35.282232 [Byte 0]First pass (3, 6, 12)
1529 13:53:35.285825 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1530 13:53:35.288965 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1531 13:53:35.292660 [Byte 1]First pass (3, 6, 20)
1532 13:53:35.296032 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1533 13:53:35.302696 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1534 13:53:35.305812 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1535 13:53:35.308930 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1536 13:53:35.312504 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1537 13:53:35.316288 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1538 13:53:35.319215 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1539 13:53:35.325593 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1540 13:53:35.329205 All bytes gating window > 1UI, Early break!
1541 13:53:35.329584
1542 13:53:35.332454 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1543 13:53:35.332907
1544 13:53:35.336440 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)
1545 13:53:35.336899
1546 13:53:35.337229
1547 13:53:35.337503
1548 13:53:35.339423 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1549 13:53:35.339806
1550 13:53:35.345760 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1551 13:53:35.346182
1552 13:53:35.346476
1553 13:53:35.346744 Write Rank1 MR1 =0x56
1554 13:53:35.347003
1555 13:53:35.349242 best RODT dly(2T, 0.5T) = (2, 3)
1556 13:53:35.349622
1557 13:53:35.353278 best RODT dly(2T, 0.5T) = (2, 3)
1558 13:53:35.353736 ==
1559 13:53:35.359512 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1560 13:53:35.362976 fsp= 1, odt_onoff= 1, Byte mode= 0
1561 13:53:35.363437 ==
1562 13:53:35.366086 Start DQ dly to find pass range UseTestEngine =0
1563 13:53:35.369346 x-axis: bit #, y-axis: DQ dly (-127~63)
1564 13:53:35.369743 RX Vref Scan = 0
1565 13:53:35.372646 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1566 13:53:35.376425 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1567 13:53:35.379611 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1568 13:53:35.383017 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1569 13:53:35.385886 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1570 13:53:35.389270 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1571 13:53:35.392748 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1572 13:53:35.393256 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1573 13:53:35.396509 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1574 13:53:35.399487 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1575 13:53:35.402886 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1576 13:53:35.406395 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1577 13:53:35.409651 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1578 13:53:35.412782 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1579 13:53:35.416125 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1580 13:53:35.416538 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1581 13:53:35.419979 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1582 13:53:35.423116 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1583 13:53:35.426475 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1584 13:53:35.429616 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1585 13:53:35.433436 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1586 13:53:35.436568 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1587 13:53:35.437038 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1588 13:53:35.439771 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1589 13:53:35.443462 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1590 13:53:35.446043 -1, [0] xxxoxxxx xxxxxxxx [MSB]
1591 13:53:35.449552 0, [0] xxxoxoxx oxxoxoxx [MSB]
1592 13:53:35.453449 1, [0] xxxoxoxx ooxoooox [MSB]
1593 13:53:35.456798 2, [0] xxxoxooo ooxoooox [MSB]
1594 13:53:35.457286 3, [0] xxxoxooo ooxooooo [MSB]
1595 13:53:35.459458 4, [0] xxxoxooo ooxooooo [MSB]
1596 13:53:35.462810 5, [0] xxxoxooo ooxooooo [MSB]
1597 13:53:35.466497 6, [0] xxxooooo oooooooo [MSB]
1598 13:53:35.469763 7, [0] xooooooo oooooooo [MSB]
1599 13:53:35.470149 8, [0] xooooooo oooooooo [MSB]
1600 13:53:35.473514 34, [0] oooooooo oooooooo [MSB]
1601 13:53:35.476449 35, [0] oooxoooo oooxoxoo [MSB]
1602 13:53:35.479813 36, [0] oooxoooo oooxoxxo [MSB]
1603 13:53:35.482976 37, [0] oooxoxxx xooxoxxo [MSB]
1604 13:53:35.486646 38, [0] oooxoxxx xxoxxxxo [MSB]
1605 13:53:35.489772 39, [0] oooxoxxx xxoxxxxx [MSB]
1606 13:53:35.492746 40, [0] oooxoxxx xxoxxxxx [MSB]
1607 13:53:35.493129 41, [0] oooxoxxx xxoxxxxx [MSB]
1608 13:53:35.496027 42, [0] oooxxxxx xxoxxxxx [MSB]
1609 13:53:35.499825 43, [0] xoxxxxxx xxxxxxxx [MSB]
1610 13:53:35.503013 44, [0] xxxxxxxx xxxxxxxx [MSB]
1611 13:53:35.506351 iDelay=44, Bit 0, Center 25 (9 ~ 42) 34
1612 13:53:35.509897 iDelay=44, Bit 1, Center 25 (7 ~ 43) 37
1613 13:53:35.512893 iDelay=44, Bit 2, Center 24 (7 ~ 42) 36
1614 13:53:35.516040 iDelay=44, Bit 3, Center 16 (-1 ~ 34) 36
1615 13:53:35.519929 iDelay=44, Bit 4, Center 23 (6 ~ 41) 36
1616 13:53:35.523271 iDelay=44, Bit 5, Center 18 (0 ~ 36) 37
1617 13:53:35.526455 iDelay=44, Bit 6, Center 19 (2 ~ 36) 35
1618 13:53:35.529416 iDelay=44, Bit 7, Center 19 (2 ~ 36) 35
1619 13:53:35.533701 iDelay=44, Bit 8, Center 18 (0 ~ 36) 37
1620 13:53:35.536533 iDelay=44, Bit 9, Center 19 (1 ~ 37) 37
1621 13:53:35.543489 iDelay=44, Bit 10, Center 24 (6 ~ 42) 37
1622 13:53:35.546730 iDelay=44, Bit 11, Center 17 (0 ~ 34) 35
1623 13:53:35.549613 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
1624 13:53:35.553359 iDelay=44, Bit 13, Center 17 (0 ~ 34) 35
1625 13:53:35.556874 iDelay=44, Bit 14, Center 18 (1 ~ 35) 35
1626 13:53:35.560470 iDelay=44, Bit 15, Center 20 (3 ~ 38) 36
1627 13:53:35.560936 ==
1628 13:53:35.566398 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1629 13:53:35.566848 fsp= 1, odt_onoff= 1, Byte mode= 0
1630 13:53:35.570073 ==
1631 13:53:35.570447 DQS Delay:
1632 13:53:35.570742 DQS0 = 0, DQS1 = 0
1633 13:53:35.573230 DQM Delay:
1634 13:53:35.573608 DQM0 = 21, DQM1 = 19
1635 13:53:35.577074 DQ Delay:
1636 13:53:35.577588 DQ0 =25, DQ1 =25, DQ2 =24, DQ3 =16
1637 13:53:35.580019 DQ4 =23, DQ5 =18, DQ6 =19, DQ7 =19
1638 13:53:35.583597 DQ8 =18, DQ9 =19, DQ10 =24, DQ11 =17
1639 13:53:35.587146 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20
1640 13:53:35.587606
1641 13:53:35.587899
1642 13:53:35.590745 DramC Write-DBI off
1643 13:53:35.591204 ==
1644 13:53:35.596932 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1645 13:53:35.600457 fsp= 1, odt_onoff= 1, Byte mode= 0
1646 13:53:35.600934 ==
1647 13:53:35.603302 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1648 13:53:35.603723
1649 13:53:35.607154 Begin, DQ Scan Range 926~1182
1650 13:53:35.607607
1651 13:53:35.607900
1652 13:53:35.608169 TX Vref Scan disable
1653 13:53:35.613601 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1654 13:53:35.616849 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1655 13:53:35.620410 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1656 13:53:35.623516 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1657 13:53:35.626868 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1658 13:53:35.629883 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1659 13:53:35.633659 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1660 13:53:35.636888 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1661 13:53:35.640806 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1662 13:53:35.643908 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1663 13:53:35.646817 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1664 13:53:35.650314 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1665 13:53:35.653620 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1666 13:53:35.657341 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1667 13:53:35.660626 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1668 13:53:35.663906 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1669 13:53:35.666980 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1670 13:53:35.670449 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1671 13:53:35.676799 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1672 13:53:35.680613 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1673 13:53:35.684040 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1674 13:53:35.687729 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1675 13:53:35.690500 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1676 13:53:35.694156 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1677 13:53:35.697550 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1678 13:53:35.701048 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1679 13:53:35.704203 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1680 13:53:35.707399 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1681 13:53:35.710869 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1682 13:53:35.714139 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1683 13:53:35.717256 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1684 13:53:35.721170 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1685 13:53:35.723888 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1686 13:53:35.727194 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1687 13:53:35.730676 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1688 13:53:35.733889 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1689 13:53:35.737374 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1690 13:53:35.740565 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1691 13:53:35.747507 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1692 13:53:35.751258 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1693 13:53:35.754218 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1694 13:53:35.757230 967 |3 6 7|[0] xxxxxxxx xxxoxoxx [MSB]
1695 13:53:35.761350 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1696 13:53:35.764297 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1697 13:53:35.767253 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1698 13:53:35.770760 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1699 13:53:35.774230 972 |3 6 12|[0] xxxoxxxx oooooooo [MSB]
1700 13:53:35.777955 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1701 13:53:35.781313 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1702 13:53:35.784957 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1703 13:53:35.787739 976 |3 6 16|[0] xxxoxooo oooooooo [MSB]
1704 13:53:35.791109 977 |3 6 17|[0] xxoooooo oooooooo [MSB]
1705 13:53:35.798250 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1706 13:53:35.801855 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1707 13:53:35.805177 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1708 13:53:35.808349 994 |3 6 34|[0] oooooxoo xxxxxxxx [MSB]
1709 13:53:35.811933 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1710 13:53:35.815327 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1711 13:53:35.818375 997 |3 6 37|[0] xoxxxxxx xxxxxxxx [MSB]
1712 13:53:35.822185 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1713 13:53:35.825537 Byte0, DQ PI dly=985, DQM PI dly= 985
1714 13:53:35.828530 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1715 13:53:35.829044
1716 13:53:35.835256 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1717 13:53:35.835738
1718 13:53:35.838270 Byte1, DQ PI dly=979, DQM PI dly= 979
1719 13:53:35.841525 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1720 13:53:35.841916
1721 13:53:35.845360 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1722 13:53:35.845841
1723 13:53:35.846149 ==
1724 13:53:35.851886 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1725 13:53:35.854945 fsp= 1, odt_onoff= 1, Byte mode= 0
1726 13:53:35.855405 ==
1727 13:53:35.858632 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1728 13:53:35.859131
1729 13:53:35.862002 Begin, DQ Scan Range 955~1019
1730 13:53:35.865507 Write Rank1 MR14 =0x0
1731 13:53:35.872848
1732 13:53:35.873467 CH=0, VrefRange= 0, VrefLevel = 0
1733 13:53:35.879013 TX Bit0 (979~998) 20 988, Bit8 (969~986) 18 977,
1734 13:53:35.882953 TX Bit1 (978~996) 19 987, Bit9 (970~988) 19 979,
1735 13:53:35.887195 TX Bit2 (979~996) 18 987, Bit10 (975~991) 17 983,
1736 13:53:35.893286 TX Bit3 (973~991) 19 982, Bit11 (968~986) 19 977,
1737 13:53:35.896551 TX Bit4 (978~996) 19 987, Bit12 (969~987) 19 978,
1738 13:53:35.903107 TX Bit5 (976~990) 15 983, Bit13 (969~986) 18 977,
1739 13:53:35.906680 TX Bit6 (976~992) 17 984, Bit14 (970~987) 18 978,
1740 13:53:35.909859 TX Bit7 (978~993) 16 985, Bit15 (975~989) 15 982,
1741 13:53:35.910288
1742 13:53:35.913218 Write Rank1 MR14 =0x2
1743 13:53:35.921526
1744 13:53:35.922031 CH=0, VrefRange= 0, VrefLevel = 2
1745 13:53:35.928498 TX Bit0 (979~998) 20 988, Bit8 (969~987) 19 978,
1746 13:53:35.931164 TX Bit1 (978~997) 20 987, Bit9 (969~988) 20 978,
1747 13:53:35.938236 TX Bit2 (978~996) 19 987, Bit10 (975~991) 17 983,
1748 13:53:35.941757 TX Bit3 (973~991) 19 982, Bit11 (968~987) 20 977,
1749 13:53:35.945313 TX Bit4 (978~997) 20 987, Bit12 (969~988) 20 978,
1750 13:53:35.951567 TX Bit5 (976~991) 16 983, Bit13 (968~986) 19 977,
1751 13:53:35.955629 TX Bit6 (976~992) 17 984, Bit14 (969~987) 19 978,
1752 13:53:35.957886 TX Bit7 (977~993) 17 985, Bit15 (973~990) 18 981,
1753 13:53:35.958316
1754 13:53:35.961532 Write Rank1 MR14 =0x4
1755 13:53:35.969971
1756 13:53:35.970404 CH=0, VrefRange= 0, VrefLevel = 4
1757 13:53:35.977300 TX Bit0 (979~998) 20 988, Bit8 (969~987) 19 978,
1758 13:53:35.980232 TX Bit1 (978~998) 21 988, Bit9 (970~989) 20 979,
1759 13:53:35.983628 TX Bit2 (978~997) 20 987, Bit10 (975~991) 17 983,
1760 13:53:35.990626 TX Bit3 (972~991) 20 981, Bit11 (968~988) 21 978,
1761 13:53:35.993781 TX Bit4 (978~998) 21 988, Bit12 (969~989) 21 979,
1762 13:53:36.000297 TX Bit5 (975~991) 17 983, Bit13 (968~987) 20 977,
1763 13:53:36.004126 TX Bit6 (976~992) 17 984, Bit14 (969~988) 20 978,
1764 13:53:36.007334 TX Bit7 (977~994) 18 985, Bit15 (974~990) 17 982,
1765 13:53:36.007786
1766 13:53:36.010179 Write Rank1 MR14 =0x6
1767 13:53:36.019340
1768 13:53:36.019809 CH=0, VrefRange= 0, VrefLevel = 6
1769 13:53:36.025627 TX Bit0 (979~999) 21 989, Bit8 (969~988) 20 978,
1770 13:53:36.029051 TX Bit1 (978~998) 21 988, Bit9 (969~989) 21 979,
1771 13:53:36.035973 TX Bit2 (978~997) 20 987, Bit10 (974~992) 19 983,
1772 13:53:36.039293 TX Bit3 (972~992) 21 982, Bit11 (968~988) 21 978,
1773 13:53:36.042912 TX Bit4 (978~998) 21 988, Bit12 (969~989) 21 979,
1774 13:53:36.049344 TX Bit5 (975~991) 17 983, Bit13 (968~988) 21 978,
1775 13:53:36.052973 TX Bit6 (975~993) 19 984, Bit14 (969~989) 21 979,
1776 13:53:36.056034 TX Bit7 (977~994) 18 985, Bit15 (973~990) 18 981,
1777 13:53:36.056540
1778 13:53:36.059478 Write Rank1 MR14 =0x8
1779 13:53:36.068254
1780 13:53:36.069011 CH=0, VrefRange= 0, VrefLevel = 8
1781 13:53:36.074663 TX Bit0 (978~999) 22 988, Bit8 (968~989) 22 978,
1782 13:53:36.078002 TX Bit1 (978~998) 21 988, Bit9 (969~990) 22 979,
1783 13:53:36.085078 TX Bit2 (978~998) 21 988, Bit10 (974~992) 19 983,
1784 13:53:36.088492 TX Bit3 (971~992) 22 981, Bit11 (968~989) 22 978,
1785 13:53:36.091398 TX Bit4 (978~998) 21 988, Bit12 (968~990) 23 979,
1786 13:53:36.098232 TX Bit5 (975~992) 18 983, Bit13 (968~988) 21 978,
1787 13:53:36.101931 TX Bit6 (975~993) 19 984, Bit14 (969~989) 21 979,
1788 13:53:36.104898 TX Bit7 (977~995) 19 986, Bit15 (972~990) 19 981,
1789 13:53:36.105446
1790 13:53:36.107717 Write Rank1 MR14 =0xa
1791 13:53:36.117174
1792 13:53:36.120486 CH=0, VrefRange= 0, VrefLevel = 10
1793 13:53:36.123502 TX Bit0 (978~999) 22 988, Bit8 (968~989) 22 978,
1794 13:53:36.127110 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
1795 13:53:36.133871 TX Bit2 (977~998) 22 987, Bit10 (973~992) 20 982,
1796 13:53:36.137247 TX Bit3 (971~992) 22 981, Bit11 (967~989) 23 978,
1797 13:53:36.140934 TX Bit4 (978~999) 22 988, Bit12 (968~990) 23 979,
1798 13:53:36.147456 TX Bit5 (974~992) 19 983, Bit13 (968~989) 22 978,
1799 13:53:36.150981 TX Bit6 (974~994) 21 984, Bit14 (968~990) 23 979,
1800 13:53:36.153928 TX Bit7 (976~995) 20 985, Bit15 (971~991) 21 981,
1801 13:53:36.154430
1802 13:53:36.157706 Write Rank1 MR14 =0xc
1803 13:53:36.166407
1804 13:53:36.169717 CH=0, VrefRange= 0, VrefLevel = 12
1805 13:53:36.173532 TX Bit0 (978~1000) 23 989, Bit8 (968~989) 22 978,
1806 13:53:36.176508 TX Bit1 (977~999) 23 988, Bit9 (968~990) 23 979,
1807 13:53:36.183075 TX Bit2 (977~999) 23 988, Bit10 (973~993) 21 983,
1808 13:53:36.185958 TX Bit3 (971~993) 23 982, Bit11 (967~990) 24 978,
1809 13:53:36.189863 TX Bit4 (977~999) 23 988, Bit12 (968~990) 23 979,
1810 13:53:36.196866 TX Bit5 (974~992) 19 983, Bit13 (968~989) 22 978,
1811 13:53:36.200545 TX Bit6 (974~994) 21 984, Bit14 (968~990) 23 979,
1812 13:53:36.203117 TX Bit7 (976~997) 22 986, Bit15 (971~991) 21 981,
1813 13:53:36.203620
1814 13:53:36.206254 Write Rank1 MR14 =0xe
1815 13:53:36.215580
1816 13:53:36.216083 CH=0, VrefRange= 0, VrefLevel = 14
1817 13:53:36.222475 TX Bit0 (978~1000) 23 989, Bit8 (968~990) 23 979,
1818 13:53:36.225543 TX Bit1 (977~999) 23 988, Bit9 (968~990) 23 979,
1819 13:53:36.231903 TX Bit2 (977~999) 23 988, Bit10 (973~993) 21 983,
1820 13:53:36.236031 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
1821 13:53:36.239644 TX Bit4 (977~999) 23 988, Bit12 (968~990) 23 979,
1822 13:53:36.245913 TX Bit5 (973~992) 20 982, Bit13 (967~989) 23 978,
1823 13:53:36.249667 TX Bit6 (973~995) 23 984, Bit14 (968~990) 23 979,
1824 13:53:36.252888 TX Bit7 (976~997) 22 986, Bit15 (971~991) 21 981,
1825 13:53:36.253439
1826 13:53:36.255712 Write Rank1 MR14 =0x10
1827 13:53:36.265027
1828 13:53:36.268403 CH=0, VrefRange= 0, VrefLevel = 16
1829 13:53:36.271393 TX Bit0 (978~1000) 23 989, Bit8 (967~990) 24 978,
1830 13:53:36.274833 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
1831 13:53:36.281980 TX Bit2 (977~999) 23 988, Bit10 (972~994) 23 983,
1832 13:53:36.285121 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
1833 13:53:36.288633 TX Bit4 (977~999) 23 988, Bit12 (968~990) 23 979,
1834 13:53:36.295296 TX Bit5 (972~993) 22 982, Bit13 (967~990) 24 978,
1835 13:53:36.298507 TX Bit6 (973~996) 24 984, Bit14 (968~990) 23 979,
1836 13:53:36.301664 TX Bit7 (976~997) 22 986, Bit15 (971~992) 22 981,
1837 13:53:36.302094
1838 13:53:36.305250 Write Rank1 MR14 =0x12
1839 13:53:36.314592
1840 13:53:36.315095 CH=0, VrefRange= 0, VrefLevel = 18
1841 13:53:36.321427 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1842 13:53:36.324506 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1843 13:53:36.331488 TX Bit2 (977~999) 23 988, Bit10 (972~994) 23 983,
1844 13:53:36.334356 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
1845 13:53:36.338428 TX Bit4 (977~1000) 24 988, Bit12 (967~991) 25 979,
1846 13:53:36.345036 TX Bit5 (972~994) 23 983, Bit13 (967~990) 24 978,
1847 13:53:36.347900 TX Bit6 (972~996) 25 984, Bit14 (968~991) 24 979,
1848 13:53:36.351127 TX Bit7 (976~998) 23 987, Bit15 (969~992) 24 980,
1849 13:53:36.351729
1850 13:53:36.354568 Write Rank1 MR14 =0x14
1851 13:53:36.364222
1852 13:53:36.367122 CH=0, VrefRange= 0, VrefLevel = 20
1853 13:53:36.370804 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978,
1854 13:53:36.374225 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1855 13:53:36.380905 TX Bit2 (977~999) 23 988, Bit10 (972~995) 24 983,
1856 13:53:36.384400 TX Bit3 (970~995) 26 982, Bit11 (967~991) 25 979,
1857 13:53:36.388011 TX Bit4 (976~1000) 25 988, Bit12 (967~991) 25 979,
1858 13:53:36.394160 TX Bit5 (971~994) 24 982, Bit13 (967~990) 24 978,
1859 13:53:36.397637 TX Bit6 (972~997) 26 984, Bit14 (967~991) 25 979,
1860 13:53:36.401415 TX Bit7 (975~998) 24 986, Bit15 (970~992) 23 981,
1861 13:53:36.401927
1862 13:53:36.404416 Write Rank1 MR14 =0x16
1863 13:53:36.413903
1864 13:53:36.417795 CH=0, VrefRange= 0, VrefLevel = 22
1865 13:53:36.420471 TX Bit0 (977~1002) 26 989, Bit8 (967~991) 25 979,
1866 13:53:36.424135 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1867 13:53:36.430347 TX Bit2 (976~1000) 25 988, Bit10 (970~994) 25 982,
1868 13:53:36.433675 TX Bit3 (969~994) 26 981, Bit11 (966~991) 26 978,
1869 13:53:36.437043 TX Bit4 (977~1000) 24 988, Bit12 (967~991) 25 979,
1870 13:53:36.444230 TX Bit5 (971~994) 24 982, Bit13 (966~990) 25 978,
1871 13:53:36.447277 TX Bit6 (971~998) 28 984, Bit14 (967~991) 25 979,
1872 13:53:36.451136 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1873 13:53:36.451524
1874 13:53:36.453834 Write Rank1 MR14 =0x18
1875 13:53:36.463657
1876 13:53:36.466981 CH=0, VrefRange= 0, VrefLevel = 24
1877 13:53:36.470298 TX Bit0 (977~1002) 26 989, Bit8 (967~991) 25 979,
1878 13:53:36.473656 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1879 13:53:36.480504 TX Bit2 (976~1000) 25 988, Bit10 (970~994) 25 982,
1880 13:53:36.483857 TX Bit3 (969~994) 26 981, Bit11 (966~991) 26 978,
1881 13:53:36.487607 TX Bit4 (977~1000) 24 988, Bit12 (967~991) 25 979,
1882 13:53:36.494113 TX Bit5 (971~994) 24 982, Bit13 (966~990) 25 978,
1883 13:53:36.497672 TX Bit6 (971~998) 28 984, Bit14 (967~991) 25 979,
1884 13:53:36.503940 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1885 13:53:36.504394
1886 13:53:36.504696 Write Rank1 MR14 =0x1a
1887 13:53:36.513732
1888 13:53:36.517252 CH=0, VrefRange= 0, VrefLevel = 26
1889 13:53:36.520496 TX Bit0 (977~1002) 26 989, Bit8 (967~991) 25 979,
1890 13:53:36.524156 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1891 13:53:36.530911 TX Bit2 (976~1000) 25 988, Bit10 (970~994) 25 982,
1892 13:53:36.533652 TX Bit3 (969~994) 26 981, Bit11 (966~991) 26 978,
1893 13:53:36.537401 TX Bit4 (977~1000) 24 988, Bit12 (967~991) 25 979,
1894 13:53:36.543953 TX Bit5 (971~994) 24 982, Bit13 (966~990) 25 978,
1895 13:53:36.547349 TX Bit6 (971~998) 28 984, Bit14 (967~991) 25 979,
1896 13:53:36.550796 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1897 13:53:36.553844
1898 13:53:36.554265 Write Rank1 MR14 =0x1c
1899 13:53:36.563819
1900 13:53:36.566976 CH=0, VrefRange= 0, VrefLevel = 28
1901 13:53:36.570155 TX Bit0 (977~1002) 26 989, Bit8 (967~991) 25 979,
1902 13:53:36.573746 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1903 13:53:36.580902 TX Bit2 (976~1000) 25 988, Bit10 (970~994) 25 982,
1904 13:53:36.583823 TX Bit3 (969~994) 26 981, Bit11 (966~991) 26 978,
1905 13:53:36.587375 TX Bit4 (977~1000) 24 988, Bit12 (967~991) 25 979,
1906 13:53:36.593804 TX Bit5 (971~994) 24 982, Bit13 (966~990) 25 978,
1907 13:53:36.597262 TX Bit6 (971~998) 28 984, Bit14 (967~991) 25 979,
1908 13:53:36.600870 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1909 13:53:36.601392
1910 13:53:36.603846 Write Rank1 MR14 =0x1e
1911 13:53:36.613724
1912 13:53:36.614230 CH=0, VrefRange= 0, VrefLevel = 30
1913 13:53:36.620243 TX Bit0 (977~1002) 26 989, Bit8 (967~991) 25 979,
1914 13:53:36.623626 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1915 13:53:36.630445 TX Bit2 (976~1000) 25 988, Bit10 (970~994) 25 982,
1916 13:53:36.633391 TX Bit3 (969~994) 26 981, Bit11 (966~991) 26 978,
1917 13:53:36.637569 TX Bit4 (977~1000) 24 988, Bit12 (967~991) 25 979,
1918 13:53:36.643691 TX Bit5 (971~994) 24 982, Bit13 (966~990) 25 978,
1919 13:53:36.647250 TX Bit6 (971~998) 28 984, Bit14 (967~991) 25 979,
1920 13:53:36.650646 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1921 13:53:36.653838
1922 13:53:36.654341 Write Rank1 MR14 =0x20
1923 13:53:36.663460
1924 13:53:36.666872 CH=0, VrefRange= 0, VrefLevel = 32
1925 13:53:36.670009 TX Bit0 (977~1002) 26 989, Bit8 (967~991) 25 979,
1926 13:53:36.673539 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1927 13:53:36.680352 TX Bit2 (976~1000) 25 988, Bit10 (970~994) 25 982,
1928 13:53:36.683909 TX Bit3 (969~994) 26 981, Bit11 (966~991) 26 978,
1929 13:53:36.686952 TX Bit4 (977~1000) 24 988, Bit12 (967~991) 25 979,
1930 13:53:36.693417 TX Bit5 (971~994) 24 982, Bit13 (966~990) 25 978,
1931 13:53:36.696993 TX Bit6 (971~998) 28 984, Bit14 (967~991) 25 979,
1932 13:53:36.700273 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1933 13:53:36.703372
1934 13:53:36.703795
1935 13:53:36.706809 TX Vref found, early break! 372< 380
1936 13:53:36.710093 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1937 13:53:36.713879 u1DelayCellOfst[0]=10 cells (8 PI)
1938 13:53:36.716543 u1DelayCellOfst[1]=8 cells (7 PI)
1939 13:53:36.720539 u1DelayCellOfst[2]=8 cells (7 PI)
1940 13:53:36.723323 u1DelayCellOfst[3]=0 cells (0 PI)
1941 13:53:36.726721 u1DelayCellOfst[4]=8 cells (7 PI)
1942 13:53:36.727148 u1DelayCellOfst[5]=1 cells (1 PI)
1943 13:53:36.730450 u1DelayCellOfst[6]=3 cells (3 PI)
1944 13:53:36.733810 u1DelayCellOfst[7]=6 cells (5 PI)
1945 13:53:36.736816 Byte0, DQ PI dly=981, DQM PI dly= 985
1946 13:53:36.743551 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1947 13:53:36.744057
1948 13:53:36.747165 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1949 13:53:36.747673
1950 13:53:36.750049 u1DelayCellOfst[8]=1 cells (1 PI)
1951 13:53:36.753487 u1DelayCellOfst[9]=1 cells (1 PI)
1952 13:53:36.756893 u1DelayCellOfst[10]=5 cells (4 PI)
1953 13:53:36.760656 u1DelayCellOfst[11]=0 cells (0 PI)
1954 13:53:36.764148 u1DelayCellOfst[12]=1 cells (1 PI)
1955 13:53:36.764644 u1DelayCellOfst[13]=0 cells (0 PI)
1956 13:53:36.767133 u1DelayCellOfst[14]=1 cells (1 PI)
1957 13:53:36.770223 u1DelayCellOfst[15]=2 cells (2 PI)
1958 13:53:36.773541 Byte1, DQ PI dly=978, DQM PI dly= 980
1959 13:53:36.780516 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1960 13:53:36.781087
1961 13:53:36.783490 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1962 13:53:36.783912
1963 13:53:36.787755 Write Rank1 MR14 =0x16
1964 13:53:36.788214
1965 13:53:36.788510 Final TX Range 0 Vref 22
1966 13:53:36.788785
1967 13:53:36.794026 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1968 13:53:36.794491
1969 13:53:36.800813 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1970 13:53:36.807024 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1971 13:53:36.814039 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1972 13:53:36.817626 Write Rank1 MR3 =0xb0
1973 13:53:36.820620 DramC Write-DBI on
1974 13:53:36.821118 ==
1975 13:53:36.824087 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1976 13:53:36.827194 fsp= 1, odt_onoff= 1, Byte mode= 0
1977 13:53:36.827615 ==
1978 13:53:36.830241 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1979 13:53:36.830659
1980 13:53:36.833701 Begin, DQ Scan Range 700~764
1981 13:53:36.834235
1982 13:53:36.834563
1983 13:53:36.837653 TX Vref Scan disable
1984 13:53:36.840552 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1985 13:53:36.844650 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1986 13:53:36.847567 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1987 13:53:36.851062 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1988 13:53:36.854611 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1989 13:53:36.858156 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1990 13:53:36.860825 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1991 13:53:36.864739 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1992 13:53:36.867863 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1993 13:53:36.870938 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1994 13:53:36.874417 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1995 13:53:36.877314 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1996 13:53:36.881172 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1997 13:53:36.884364 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1998 13:53:36.887706 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1999 13:53:36.893890 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2000 13:53:36.897518 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2001 13:53:36.904680 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2002 13:53:36.907906 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2003 13:53:36.910702 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2004 13:53:36.914385 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2005 13:53:36.917633 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2006 13:53:36.921306 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2007 13:53:36.924728 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2008 13:53:36.927600 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2009 13:53:36.931226 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2010 13:53:36.934110 Byte0, DQ PI dly=730, DQM PI dly= 730
2011 13:53:36.937734 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2012 13:53:36.938209
2013 13:53:36.944294 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2014 13:53:36.944765
2015 13:53:36.947623 Byte1, DQ PI dly=722, DQM PI dly= 722
2016 13:53:36.951588 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2017 13:53:36.952085
2018 13:53:36.954366 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2019 13:53:36.954754
2020 13:53:36.961214 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2021 13:53:36.968335 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2022 13:53:36.974821 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2023 13:53:36.978061 Write Rank1 MR3 =0x30
2024 13:53:36.981259 DramC Write-DBI off
2025 13:53:36.981679
2026 13:53:36.982005 [DATLAT]
2027 13:53:36.984542 Freq=1600, CH0 RK1, use_rxtx_scan=0
2028 13:53:36.985043
2029 13:53:36.985407 DATLAT Default: 0x10
2030 13:53:36.987999 7, 0xFFFF, sum=0
2031 13:53:36.988466 8, 0xFFFF, sum=0
2032 13:53:36.991511 9, 0xFFFF, sum=0
2033 13:53:36.991974 10, 0xFFFF, sum=0
2034 13:53:36.994915 11, 0xFFFF, sum=0
2035 13:53:36.995384 12, 0xFFFF, sum=0
2036 13:53:36.997983 13, 0xFFFF, sum=0
2037 13:53:36.998370 14, 0x0, sum=1
2038 13:53:37.001817 15, 0x0, sum=2
2039 13:53:37.002276 16, 0x0, sum=3
2040 13:53:37.004441 17, 0x0, sum=4
2041 13:53:37.007672 pattern=2 first_step=14 total pass=5 best_step=16
2042 13:53:37.008056 ==
2043 13:53:37.010978 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2044 13:53:37.014282 fsp= 1, odt_onoff= 1, Byte mode= 0
2045 13:53:37.014679 ==
2046 13:53:37.021327 Start DQ dly to find pass range UseTestEngine =1
2047 13:53:37.024825 x-axis: bit #, y-axis: DQ dly (-127~63)
2048 13:53:37.025372 RX Vref Scan = 0
2049 13:53:37.028051 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2050 13:53:37.031160 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2051 13:53:37.035025 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2052 13:53:37.038178 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2053 13:53:37.041186 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2054 13:53:37.041573 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2055 13:53:37.044618 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2056 13:53:37.048169 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2057 13:53:37.051540 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2058 13:53:37.054802 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2059 13:53:37.058077 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2060 13:53:37.061862 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2061 13:53:37.064517 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2062 13:53:37.064965 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2063 13:53:37.068478 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2064 13:53:37.071142 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2065 13:53:37.074640 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2066 13:53:37.078114 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2067 13:53:37.081020 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2068 13:53:37.084691 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2069 13:53:37.084910 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2070 13:53:37.088007 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2071 13:53:37.091096 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2072 13:53:37.094844 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2073 13:53:37.098299 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2074 13:53:37.101342 -1, [0] xxxoxxxx xxxxxoxx [MSB]
2075 13:53:37.101489 0, [0] xxxoxxxx oxxxxoxx [MSB]
2076 13:53:37.104780 1, [0] xxxoxoxx ooxoooox [MSB]
2077 13:53:37.108006 2, [0] xxxoxooo ooxoooox [MSB]
2078 13:53:37.111495 3, [0] xxxoxooo ooxooooo [MSB]
2079 13:53:37.115069 4, [0] xxxoxooo ooxooooo [MSB]
2080 13:53:37.118316 5, [0] xxxooooo ooxooooo [MSB]
2081 13:53:37.118400 6, [0] xxxooooo oooooooo [MSB]
2082 13:53:37.121484 7, [0] xooooooo oooooooo [MSB]
2083 13:53:37.124946 8, [0] xooooooo oooooooo [MSB]
2084 13:53:37.129068 34, [0] oooxoooo oooxoooo [MSB]
2085 13:53:37.132678 35, [0] oooxoxoo oooxoxoo [MSB]
2086 13:53:37.136297 36, [0] oooxoxxo oooxoxoo [MSB]
2087 13:53:37.139022 37, [0] oooxoxxx xooxxxxo [MSB]
2088 13:53:37.142469 38, [0] oooxoxxx xooxxxxo [MSB]
2089 13:53:37.145933 39, [0] oooxoxxx xxoxxxxx [MSB]
2090 13:53:37.146086 40, [0] oooxoxxx xxoxxxxx [MSB]
2091 13:53:37.149497 41, [0] oooxxxxx xxoxxxxx [MSB]
2092 13:53:37.152258 42, [0] oooxxxxx xxxxxxxx [MSB]
2093 13:53:37.155678 43, [0] oxxxxxxx xxxxxxxx [MSB]
2094 13:53:37.159229 44, [0] xxxxxxxx xxxxxxxx [MSB]
2095 13:53:37.162775 iDelay=44, Bit 0, Center 26 (9 ~ 43) 35
2096 13:53:37.166038 iDelay=44, Bit 1, Center 24 (7 ~ 42) 36
2097 13:53:37.168957 iDelay=44, Bit 2, Center 24 (7 ~ 42) 36
2098 13:53:37.172725 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2099 13:53:37.175698 iDelay=44, Bit 4, Center 22 (5 ~ 40) 36
2100 13:53:37.179376 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2101 13:53:37.182710 iDelay=44, Bit 6, Center 18 (2 ~ 35) 34
2102 13:53:37.185993 iDelay=44, Bit 7, Center 19 (2 ~ 36) 35
2103 13:53:37.189776 iDelay=44, Bit 8, Center 18 (0 ~ 36) 37
2104 13:53:37.193332 iDelay=44, Bit 9, Center 19 (1 ~ 38) 38
2105 13:53:37.196945 iDelay=44, Bit 10, Center 23 (6 ~ 41) 36
2106 13:53:37.203251 iDelay=44, Bit 11, Center 17 (1 ~ 33) 33
2107 13:53:37.206347 iDelay=44, Bit 12, Center 18 (1 ~ 36) 36
2108 13:53:37.210150 iDelay=44, Bit 13, Center 16 (-1 ~ 34) 36
2109 13:53:37.213319 iDelay=44, Bit 14, Center 18 (1 ~ 36) 36
2110 13:53:37.216421 iDelay=44, Bit 15, Center 20 (3 ~ 38) 36
2111 13:53:37.216911 ==
2112 13:53:37.219704 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2113 13:53:37.223070 fsp= 1, odt_onoff= 1, Byte mode= 0
2114 13:53:37.226786 ==
2115 13:53:37.227281 DQS Delay:
2116 13:53:37.227608 DQS0 = 0, DQS1 = 0
2117 13:53:37.229731 DQM Delay:
2118 13:53:37.230105 DQM0 = 20, DQM1 = 18
2119 13:53:37.233307 DQ Delay:
2120 13:53:37.233685 DQ0 =26, DQ1 =24, DQ2 =24, DQ3 =15
2121 13:53:37.236176 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =19
2122 13:53:37.239914 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17
2123 13:53:37.243252 DQ12 =18, DQ13 =16, DQ14 =18, DQ15 =20
2124 13:53:37.243681
2125 13:53:37.243979
2126 13:53:37.244247
2127 13:53:37.246927 [DramC_TX_OE_Calibration] TA2
2128 13:53:37.249794 Original DQ_B0 (3 6) =30, OEN = 27
2129 13:53:37.253116 Original DQ_B1 (3 6) =30, OEN = 27
2130 13:53:37.256401 23, 0x0, End_B0=23 End_B1=23
2131 13:53:37.259973 24, 0x0, End_B0=24 End_B1=24
2132 13:53:37.260454 25, 0x0, End_B0=25 End_B1=25
2133 13:53:37.263473 26, 0x0, End_B0=26 End_B1=26
2134 13:53:37.266835 27, 0x0, End_B0=27 End_B1=27
2135 13:53:37.270296 28, 0x0, End_B0=28 End_B1=28
2136 13:53:37.273412 29, 0x0, End_B0=29 End_B1=29
2137 13:53:37.273802 30, 0x0, End_B0=30 End_B1=30
2138 13:53:37.276540 31, 0xFFFE, End_B0=30 End_B1=30
2139 13:53:37.283519 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2140 13:53:37.286718 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2141 13:53:37.290384
2142 13:53:37.290761
2143 13:53:37.291051 Write Rank1 MR23 =0x3f
2144 13:53:37.291463 [DQSOSC]
2145 13:53:37.300386 [DQSOSCAuto] RK1, (LSB)MR18= 0x7a, (MSB)MR19= 0x3, tDQSOscB0 = 353 ps tDQSOscB1 = 0 ps
2146 13:53:37.303534 CH0_RK1: MR19=0x3, MR18=0x7A, DQSOSC=353, MR23=63, INC=19, DEC=29
2147 13:53:37.306748 Write Rank1 MR23 =0x3f
2148 13:53:37.307177 [DQSOSC]
2149 13:53:37.316881 [DQSOSCAuto] RK1, (LSB)MR18= 0x79, (MSB)MR19= 0x3, tDQSOscB0 = 354 ps tDQSOscB1 = 0 ps
2150 13:53:37.317440 CH0 RK1: MR19=3, MR18=79
2151 13:53:37.320617 [RxdqsGatingPostProcess] freq 1600
2152 13:53:37.327656 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2153 13:53:37.328154 Rank: 0
2154 13:53:37.331480 best DQS0 dly(2T, 0.5T) = (2, 5)
2155 13:53:37.333891 best DQS1 dly(2T, 0.5T) = (2, 5)
2156 13:53:37.337517 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2157 13:53:37.340932 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2158 13:53:37.341505 Rank: 1
2159 13:53:37.343854 best DQS0 dly(2T, 0.5T) = (2, 6)
2160 13:53:37.348172 best DQS1 dly(2T, 0.5T) = (2, 6)
2161 13:53:37.350774 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2162 13:53:37.351201 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2163 13:53:37.357365 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2164 13:53:37.360792 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2165 13:53:37.364229 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2166 13:53:37.368052 Write Rank0 MR13 =0x59
2167 13:53:37.368562 ==
2168 13:53:37.374342 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2169 13:53:37.374733 fsp= 1, odt_onoff= 1, Byte mode= 0
2170 13:53:37.377293 ==
2171 13:53:37.377679 === u2Vref_new: 0x56 --> 0x3a
2172 13:53:37.381133 === u2Vref_new: 0x58 --> 0x58
2173 13:53:37.384644 === u2Vref_new: 0x5a --> 0x5a
2174 13:53:37.387772 === u2Vref_new: 0x5c --> 0x78
2175 13:53:37.390709 === u2Vref_new: 0x5e --> 0x7a
2176 13:53:37.394407 === u2Vref_new: 0x60 --> 0x90
2177 13:53:37.397753 [CA 0] Center 36 (9~63) winsize 55
2178 13:53:37.401031 [CA 1] Center 34 (6~63) winsize 58
2179 13:53:37.404551 [CA 2] Center 32 (3~62) winsize 60
2180 13:53:37.407628 [CA 3] Center 32 (3~62) winsize 60
2181 13:53:37.410884 [CA 4] Center 33 (4~63) winsize 60
2182 13:53:37.414629 [CA 5] Center 26 (-1~53) winsize 55
2183 13:53:37.415137
2184 13:53:37.417876 [CATrainingPosCal] consider 1 rank data
2185 13:53:37.421072 u2DelayCellTimex100 = 762/100 ps
2186 13:53:37.424574 CA0 delay=36 (9~63),Diff = 10 PI (12 cell)
2187 13:53:37.427580 CA1 delay=34 (6~63),Diff = 8 PI (10 cell)
2188 13:53:37.431004 CA2 delay=32 (3~62),Diff = 6 PI (7 cell)
2189 13:53:37.433948 CA3 delay=32 (3~62),Diff = 6 PI (7 cell)
2190 13:53:37.437841 CA4 delay=33 (4~63),Diff = 7 PI (8 cell)
2191 13:53:37.441307 CA5 delay=26 (-1~53),Diff = 0 PI (0 cell)
2192 13:53:37.441762
2193 13:53:37.447990 CA PerBit enable=1, Macro0, CA PI delay=26
2194 13:53:37.448489 === u2Vref_new: 0x56 --> 0x3a
2195 13:53:37.448820
2196 13:53:37.451212 Vref(ca) range 1: 22
2197 13:53:37.451632
2198 13:53:37.454632 CS Dly= 10 (41-0-32)
2199 13:53:37.455009 Write Rank0 MR13 =0xd8
2200 13:53:37.457603 Write Rank0 MR13 =0xd8
2201 13:53:37.458072 Write Rank0 MR12 =0x56
2202 13:53:37.461537 Write Rank1 MR13 =0x59
2203 13:53:37.461991 ==
2204 13:53:37.467507 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2205 13:53:37.470896 fsp= 1, odt_onoff= 1, Byte mode= 0
2206 13:53:37.471400 ==
2207 13:53:37.471712 === u2Vref_new: 0x56 --> 0x3a
2208 13:53:37.474445 === u2Vref_new: 0x58 --> 0x58
2209 13:53:37.477665 === u2Vref_new: 0x5a --> 0x5a
2210 13:53:37.481606 === u2Vref_new: 0x5c --> 0x78
2211 13:53:37.485217 === u2Vref_new: 0x5e --> 0x7a
2212 13:53:37.488418 === u2Vref_new: 0x60 --> 0x90
2213 13:53:37.491409 [CA 0] Center 36 (10~63) winsize 54
2214 13:53:37.495043 [CA 1] Center 35 (8~63) winsize 56
2215 13:53:37.498441 [CA 2] Center 33 (3~63) winsize 61
2216 13:53:37.501297 [CA 3] Center 33 (3~63) winsize 61
2217 13:53:37.504836 [CA 4] Center 33 (4~63) winsize 60
2218 13:53:37.508283 [CA 5] Center 25 (-2~53) winsize 56
2219 13:53:37.508758
2220 13:53:37.512015 [CATrainingPosCal] consider 2 rank data
2221 13:53:37.514829 u2DelayCellTimex100 = 762/100 ps
2222 13:53:37.518273 CA0 delay=36 (10~63),Diff = 10 PI (12 cell)
2223 13:53:37.521771 CA1 delay=35 (8~63),Diff = 9 PI (11 cell)
2224 13:53:37.524959 CA2 delay=32 (3~62),Diff = 6 PI (7 cell)
2225 13:53:37.528366 CA3 delay=32 (3~62),Diff = 6 PI (7 cell)
2226 13:53:37.531824 CA4 delay=33 (4~63),Diff = 7 PI (8 cell)
2227 13:53:37.534603 CA5 delay=26 (-1~53),Diff = 0 PI (0 cell)
2228 13:53:37.535033
2229 13:53:37.542050 CA PerBit enable=1, Macro0, CA PI delay=26
2230 13:53:37.542526 === u2Vref_new: 0x56 --> 0x3a
2231 13:53:37.542828
2232 13:53:37.545234 Vref(ca) range 1: 22
2233 13:53:37.545671
2234 13:53:37.548697 CS Dly= 11 (42-0-32)
2235 13:53:37.549231 Write Rank1 MR13 =0xd8
2236 13:53:37.551540 Write Rank1 MR13 =0xd8
2237 13:53:37.551918 Write Rank1 MR12 =0x56
2238 13:53:37.558754 [RankSwap] Rank num 2, (Multi 1), Rank 0
2239 13:53:37.559262 Write Rank0 MR2 =0xad
2240 13:53:37.561586 [Write Leveling]
2241 13:53:37.565226 delay byte0 byte1 byte2 byte3
2242 13:53:37.565732
2243 13:53:37.566069 10 0 0
2244 13:53:37.566388 11 0 0
2245 13:53:37.568120 12 0 0
2246 13:53:37.568583 13 0 0
2247 13:53:37.571698 14 0 0
2248 13:53:37.572321 15 0 0
2249 13:53:37.572672 16 0 0
2250 13:53:37.575307 17 0 0
2251 13:53:37.575782 18 0 0
2252 13:53:37.578286 19 0 0
2253 13:53:37.578717 20 0 0
2254 13:53:37.579052 21 0 0
2255 13:53:37.581741 22 0 0
2256 13:53:37.582130 23 0 0
2257 13:53:37.585014 24 0 0
2258 13:53:37.585615 25 0 0
2259 13:53:37.588582 26 0 0
2260 13:53:37.589049 27 0 0
2261 13:53:37.589453 28 0 0
2262 13:53:37.591772 29 0 0
2263 13:53:37.592388 30 0 0
2264 13:53:37.594778 31 0 ff
2265 13:53:37.595242 32 0 ff
2266 13:53:37.598667 33 0 ff
2267 13:53:37.599133 34 0 ff
2268 13:53:37.599445 35 ff ff
2269 13:53:37.601161 36 ff ff
2270 13:53:37.601567 37 ff ff
2271 13:53:37.605059 38 ff ff
2272 13:53:37.605568 39 ff ff
2273 13:53:37.608265 40 ff ff
2274 13:53:37.608673 41 ff ff
2275 13:53:37.611341 pass bytecount = 0xff (0xff: all bytes pass)
2276 13:53:37.611729
2277 13:53:37.615166 DQS0 dly: 35
2278 13:53:37.615625 DQS1 dly: 31
2279 13:53:37.618213 Write Rank0 MR2 =0x2d
2280 13:53:37.621246 [RankSwap] Rank num 2, (Multi 1), Rank 0
2281 13:53:37.621634 Write Rank0 MR1 =0xd6
2282 13:53:37.625528 [Gating]
2283 13:53:37.625983 ==
2284 13:53:37.627932 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2285 13:53:37.631362 fsp= 1, odt_onoff= 1, Byte mode= 0
2286 13:53:37.631745 ==
2287 13:53:37.637781 3 1 0 |1110 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2288 13:53:37.641553 3 1 4 |c0b 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2289 13:53:37.645079 3 1 8 |3030 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2290 13:53:37.651244 3 1 12 |1918 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2291 13:53:37.654955 3 1 16 |2e2e 3534 |(0 0)(11 11) |(1 0)(0 1)| 0
2292 13:53:37.658653 3 1 20 |3131 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2293 13:53:37.661448 3 1 24 |302f 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2294 13:53:37.668792 3 1 28 |605 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2295 13:53:37.671745 3 2 0 |3534 403 |(11 11)(11 11) |(0 0)(1 1)| 0
2296 13:53:37.674728 3 2 4 |2626 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2297 13:53:37.681528 3 2 8 |3635 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2298 13:53:37.684751 3 2 12 |3737 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2299 13:53:37.688769 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2300 13:53:37.691914 3 2 20 |3838 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2301 13:53:37.698041 3 2 24 |3939 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2302 13:53:37.701580 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2303 13:53:37.705015 3 3 0 |b0a 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
2304 13:53:37.712145 3 3 4 |3534 201 |(11 11)(11 11) |(0 1)(1 1)| 0
2305 13:53:37.715883 3 3 8 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2306 13:53:37.718866 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2307 13:53:37.722066 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2308 13:53:37.728509 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2309 13:53:37.732142 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2310 13:53:37.735674 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2311 13:53:37.742071 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2312 13:53:37.745442 3 4 0 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
2313 13:53:37.749213 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2314 13:53:37.755600 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2315 13:53:37.758990 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2316 13:53:37.762706 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2317 13:53:37.765541 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2318 13:53:37.772408 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2319 13:53:37.775613 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2320 13:53:37.778555 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2321 13:53:37.785279 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2322 13:53:37.789236 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2323 13:53:37.792236 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2324 13:53:37.799104 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2325 13:53:37.802070 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2326 13:53:37.805781 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2327 13:53:37.808730 [Byte 0] Lead/lag Transition tap number (2)
2328 13:53:37.815612 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2329 13:53:37.819051 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2330 13:53:37.822268 3 5 28 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2331 13:53:37.826140 [Byte 1] Lead/lag Transition tap number (2)
2332 13:53:37.832593 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2333 13:53:37.833097 [Byte 0]First pass (3, 6, 0)
2334 13:53:37.835862 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2335 13:53:37.839277 [Byte 1]First pass (3, 6, 4)
2336 13:53:37.842664 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2337 13:53:37.849673 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2338 13:53:37.852330 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2339 13:53:37.856245 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2340 13:53:37.858917 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2341 13:53:37.865883 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2342 13:53:37.868907 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2343 13:53:37.872803 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2344 13:53:37.876173 All bytes gating window > 1UI, Early break!
2345 13:53:37.876635
2346 13:53:37.878802 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
2347 13:53:37.879188
2348 13:53:37.882455 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
2349 13:53:37.882914
2350 13:53:37.883281
2351 13:53:37.883578
2352 13:53:37.889695 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
2353 13:53:37.890087
2354 13:53:37.892794 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
2355 13:53:37.893205
2356 13:53:37.893523
2357 13:53:37.895711 Write Rank0 MR1 =0x56
2358 13:53:37.896096
2359 13:53:37.896396 best RODT dly(2T, 0.5T) = (2, 2)
2360 13:53:37.899244
2361 13:53:37.899626 best RODT dly(2T, 0.5T) = (2, 2)
2362 13:53:37.899925 ==
2363 13:53:37.906293 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2364 13:53:37.909280 fsp= 1, odt_onoff= 1, Byte mode= 0
2365 13:53:37.909672 ==
2366 13:53:37.912419 Start DQ dly to find pass range UseTestEngine =0
2367 13:53:37.915912 x-axis: bit #, y-axis: DQ dly (-127~63)
2368 13:53:37.919756 RX Vref Scan = 0
2369 13:53:37.923182 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2370 13:53:37.926088 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2371 13:53:37.926516 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2372 13:53:37.929370 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2373 13:53:37.933062 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2374 13:53:37.936248 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2375 13:53:37.939405 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2376 13:53:37.943335 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2377 13:53:37.946326 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2378 13:53:37.946722 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2379 13:53:37.949595 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2380 13:53:37.952845 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2381 13:53:37.956468 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2382 13:53:37.960087 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2383 13:53:37.963159 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2384 13:53:37.966324 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2385 13:53:37.969895 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2386 13:53:37.970372 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2387 13:53:37.973098 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2388 13:53:37.976024 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2389 13:53:37.979516 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2390 13:53:37.983254 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2391 13:53:37.986605 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2392 13:53:37.989680 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2393 13:53:37.990146 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2394 13:53:37.993217 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2395 13:53:37.996828 0, [0] xxxoxxxx xxxxxxxx [MSB]
2396 13:53:37.999569 1, [0] xxooxxxx xxxxxxxo [MSB]
2397 13:53:38.003088 2, [0] xxooxxxx xxxxxxxo [MSB]
2398 13:53:38.006670 3, [0] xxooxxxo xxxxxxxo [MSB]
2399 13:53:38.007165 4, [0] xxoooxxo oooxxoxo [MSB]
2400 13:53:38.009600 5, [0] xxoooxxo oooooooo [MSB]
2401 13:53:38.013299 6, [0] xxoooxxo oooooooo [MSB]
2402 13:53:38.016926 7, [0] xoooooxo oooooooo [MSB]
2403 13:53:38.020554 8, [0] xoooooxo oooooooo [MSB]
2404 13:53:38.023361 32, [0] ooxxoooo oooooooo [MSB]
2405 13:53:38.023831 33, [0] ooxxoooo ooooooox [MSB]
2406 13:53:38.026763 34, [0] ooxxoooo ooooooox [MSB]
2407 13:53:38.030255 35, [0] ooxxxooo ooxoooox [MSB]
2408 13:53:38.033177 36, [0] ooxxxoox ooxoooox [MSB]
2409 13:53:38.036661 37, [0] ooxxxoox xxxxoxxx [MSB]
2410 13:53:38.039780 38, [0] ooxxxoox xxxxoxxx [MSB]
2411 13:53:38.043224 39, [0] ooxxxoox xxxxxxxx [MSB]
2412 13:53:38.043689 40, [0] oxxxxoox xxxxxxxx [MSB]
2413 13:53:38.046877 41, [0] xxxxxxxx xxxxxxxx [MSB]
2414 13:53:38.050102 iDelay=41, Bit 0, Center 24 (9 ~ 40) 32
2415 13:53:38.053320 iDelay=41, Bit 1, Center 23 (7 ~ 39) 33
2416 13:53:38.056680 iDelay=41, Bit 2, Center 16 (1 ~ 31) 31
2417 13:53:38.060334 iDelay=41, Bit 3, Center 15 (-1 ~ 31) 33
2418 13:53:38.066928 iDelay=41, Bit 4, Center 19 (4 ~ 34) 31
2419 13:53:38.070265 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2420 13:53:38.073612 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
2421 13:53:38.076532 iDelay=41, Bit 7, Center 19 (3 ~ 35) 33
2422 13:53:38.080182 iDelay=41, Bit 8, Center 20 (4 ~ 36) 33
2423 13:53:38.083733 iDelay=41, Bit 9, Center 20 (4 ~ 36) 33
2424 13:53:38.086729 iDelay=41, Bit 10, Center 19 (4 ~ 34) 31
2425 13:53:38.090326 iDelay=41, Bit 11, Center 20 (5 ~ 36) 32
2426 13:53:38.093248 iDelay=41, Bit 12, Center 21 (5 ~ 38) 34
2427 13:53:38.096764 iDelay=41, Bit 13, Center 20 (4 ~ 36) 33
2428 13:53:38.100390 iDelay=41, Bit 14, Center 20 (5 ~ 36) 32
2429 13:53:38.103202 iDelay=41, Bit 15, Center 16 (1 ~ 32) 32
2430 13:53:38.103666 ==
2431 13:53:38.110025 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2432 13:53:38.113428 fsp= 1, odt_onoff= 1, Byte mode= 0
2433 13:53:38.113813 ==
2434 13:53:38.114111 DQS Delay:
2435 13:53:38.116445 DQS0 = 0, DQS1 = 0
2436 13:53:38.116830 DQM Delay:
2437 13:53:38.119914 DQM0 = 20, DQM1 = 19
2438 13:53:38.120310 DQ Delay:
2439 13:53:38.123409 DQ0 =24, DQ1 =23, DQ2 =16, DQ3 =15
2440 13:53:38.126295 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
2441 13:53:38.129594 DQ8 =20, DQ9 =20, DQ10 =19, DQ11 =20
2442 13:53:38.133337 DQ12 =21, DQ13 =20, DQ14 =20, DQ15 =16
2443 13:53:38.133796
2444 13:53:38.134102
2445 13:53:38.137037 DramC Write-DBI off
2446 13:53:38.137575 ==
2447 13:53:38.139874 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2448 13:53:38.142941 fsp= 1, odt_onoff= 1, Byte mode= 0
2449 13:53:38.143462 ==
2450 13:53:38.146376 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2451 13:53:38.146834
2452 13:53:38.149859 Begin, DQ Scan Range 927~1183
2453 13:53:38.150316
2454 13:53:38.150618
2455 13:53:38.153007 TX Vref Scan disable
2456 13:53:38.156641 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2457 13:53:38.159996 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2458 13:53:38.163384 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2459 13:53:38.166978 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2460 13:53:38.170454 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2461 13:53:38.173124 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2462 13:53:38.176688 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2463 13:53:38.179664 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2464 13:53:38.183512 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2465 13:53:38.186492 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2466 13:53:38.193649 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2467 13:53:38.196628 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2468 13:53:38.199733 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2469 13:53:38.203436 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2470 13:53:38.206681 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2471 13:53:38.209912 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2472 13:53:38.213558 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2473 13:53:38.216569 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2474 13:53:38.219927 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2475 13:53:38.223184 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2476 13:53:38.226641 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2477 13:53:38.229909 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2478 13:53:38.233526 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2479 13:53:38.237106 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2480 13:53:38.239708 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2481 13:53:38.243384 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2482 13:53:38.250571 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2483 13:53:38.253169 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2484 13:53:38.256481 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2485 13:53:38.259769 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2486 13:53:38.263281 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2487 13:53:38.266833 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2488 13:53:38.269513 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2489 13:53:38.273317 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2490 13:53:38.276824 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2491 13:53:38.279662 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2492 13:53:38.283561 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2493 13:53:38.287070 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2494 13:53:38.289715 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]
2495 13:53:38.293515 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
2496 13:53:38.297066 967 |3 6 7|[0] xxxxxxxx ooxxxxxo [MSB]
2497 13:53:38.300381 968 |3 6 8|[0] xxxxxxxx oooxxxxo [MSB]
2498 13:53:38.303042 969 |3 6 9|[0] xxxxxxxx oooxoooo [MSB]
2499 13:53:38.306471 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
2500 13:53:38.310091 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
2501 13:53:38.313219 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2502 13:53:38.317055 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
2503 13:53:38.322953 974 |3 6 14|[0] xxxoxxxx oooooooo [MSB]
2504 13:53:38.326665 975 |3 6 15|[0] xxoooxxo oooooooo [MSB]
2505 13:53:38.330108 976 |3 6 16|[0] xoooooxo oooooooo [MSB]
2506 13:53:38.333445 989 |3 6 29|[0] oooooooo ooooooox [MSB]
2507 13:53:38.336487 990 |3 6 30|[0] oooooooo oxooooox [MSB]
2508 13:53:38.339748 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2509 13:53:38.343339 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2510 13:53:38.350445 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2511 13:53:38.353128 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
2512 13:53:38.356685 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
2513 13:53:38.360312 996 |3 6 36|[0] ooxxooox xxxxxxxx [MSB]
2514 13:53:38.363011 997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB]
2515 13:53:38.366128 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
2516 13:53:38.370061 Byte0, DQ PI dly=985, DQM PI dly= 985
2517 13:53:38.373553 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2518 13:53:38.373952
2519 13:53:38.376561 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2520 13:53:38.379610
2521 13:53:38.383326 Byte1, DQ PI dly=978, DQM PI dly= 978
2522 13:53:38.386745 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2523 13:53:38.387205
2524 13:53:38.390553 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2525 13:53:38.391016
2526 13:53:38.391316 ==
2527 13:53:38.397054 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2528 13:53:38.399887 fsp= 1, odt_onoff= 1, Byte mode= 0
2529 13:53:38.400350 ==
2530 13:53:38.403431 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2531 13:53:38.403892
2532 13:53:38.406440 Begin, DQ Scan Range 954~1018
2533 13:53:38.409492 Write Rank0 MR14 =0x0
2534 13:53:38.417061
2535 13:53:38.417577 CH=1, VrefRange= 0, VrefLevel = 0
2536 13:53:38.424063 TX Bit0 (978~997) 20 987, Bit8 (969~985) 17 977,
2537 13:53:38.427321 TX Bit1 (977~995) 19 986, Bit9 (969~985) 17 977,
2538 13:53:38.433560 TX Bit2 (977~991) 15 984, Bit10 (970~985) 16 977,
2539 13:53:38.436976 TX Bit3 (975~990) 16 982, Bit11 (971~988) 18 979,
2540 13:53:38.440460 TX Bit4 (977~992) 16 984, Bit12 (970~988) 19 979,
2541 13:53:38.446705 TX Bit5 (978~997) 20 987, Bit13 (972~987) 16 979,
2542 13:53:38.450100 TX Bit6 (979~997) 19 988, Bit14 (970~986) 17 978,
2543 13:53:38.453297 TX Bit7 (977~991) 15 984, Bit15 (967~985) 19 976,
2544 13:53:38.453689
2545 13:53:38.456616 Write Rank0 MR14 =0x2
2546 13:53:38.465832
2547 13:53:38.466308 CH=1, VrefRange= 0, VrefLevel = 2
2548 13:53:38.472514 TX Bit0 (978~998) 21 988, Bit8 (968~985) 18 976,
2549 13:53:38.475708 TX Bit1 (977~996) 20 986, Bit9 (969~985) 17 977,
2550 13:53:38.482660 TX Bit2 (977~992) 16 984, Bit10 (969~985) 17 977,
2551 13:53:38.486016 TX Bit3 (974~990) 17 982, Bit11 (971~988) 18 979,
2552 13:53:38.489228 TX Bit4 (977~993) 17 985, Bit12 (970~988) 19 979,
2553 13:53:38.495609 TX Bit5 (977~997) 21 987, Bit13 (972~988) 17 980,
2554 13:53:38.499435 TX Bit6 (979~997) 19 988, Bit14 (970~986) 17 978,
2555 13:53:38.502122 TX Bit7 (977~992) 16 984, Bit15 (967~985) 19 976,
2556 13:53:38.502507
2557 13:53:38.505512 Write Rank0 MR14 =0x4
2558 13:53:38.514602
2559 13:53:38.515056 CH=1, VrefRange= 0, VrefLevel = 4
2560 13:53:38.521841 TX Bit0 (978~998) 21 988, Bit8 (968~985) 18 976,
2561 13:53:38.524910 TX Bit1 (977~996) 20 986, Bit9 (968~986) 19 977,
2562 13:53:38.530989 TX Bit2 (976~992) 17 984, Bit10 (970~986) 17 978,
2563 13:53:38.534428 TX Bit3 (974~991) 18 982, Bit11 (970~989) 20 979,
2564 13:53:38.538335 TX Bit4 (977~993) 17 985, Bit12 (970~989) 20 979,
2565 13:53:38.544771 TX Bit5 (977~997) 21 987, Bit13 (971~989) 19 980,
2566 13:53:38.547942 TX Bit6 (979~997) 19 988, Bit14 (970~987) 18 978,
2567 13:53:38.551226 TX Bit7 (976~992) 17 984, Bit15 (966~985) 20 975,
2568 13:53:38.551726
2569 13:53:38.554600 Write Rank0 MR14 =0x6
2570 13:53:38.563975
2571 13:53:38.564477 CH=1, VrefRange= 0, VrefLevel = 6
2572 13:53:38.570407 TX Bit0 (978~998) 21 988, Bit8 (968~986) 19 977,
2573 13:53:38.573966 TX Bit1 (977~997) 21 987, Bit9 (968~986) 19 977,
2574 13:53:38.579993 TX Bit2 (976~992) 17 984, Bit10 (969~987) 19 978,
2575 13:53:38.583591 TX Bit3 (974~991) 18 982, Bit11 (970~990) 21 980,
2576 13:53:38.587578 TX Bit4 (976~994) 19 985, Bit12 (970~990) 21 980,
2577 13:53:38.593346 TX Bit5 (977~998) 22 987, Bit13 (970~990) 21 980,
2578 13:53:38.596787 TX Bit6 (978~998) 21 988, Bit14 (970~988) 19 979,
2579 13:53:38.600352 TX Bit7 (976~992) 17 984, Bit15 (966~986) 21 976,
2580 13:53:38.600812
2581 13:53:38.603669 Write Rank0 MR14 =0x8
2582 13:53:38.612642
2583 13:53:38.613098 CH=1, VrefRange= 0, VrefLevel = 8
2584 13:53:38.619248 TX Bit0 (978~998) 21 988, Bit8 (968~987) 20 977,
2585 13:53:38.622291 TX Bit1 (977~997) 21 987, Bit9 (968~987) 20 977,
2586 13:53:38.629668 TX Bit2 (976~993) 18 984, Bit10 (969~987) 19 978,
2587 13:53:38.632234 TX Bit3 (973~991) 19 982, Bit11 (970~990) 21 980,
2588 13:53:38.635957 TX Bit4 (976~995) 20 985, Bit12 (969~990) 22 979,
2589 13:53:38.642307 TX Bit5 (977~998) 22 987, Bit13 (970~990) 21 980,
2590 13:53:38.645729 TX Bit6 (978~998) 21 988, Bit14 (970~988) 19 979,
2591 13:53:38.649225 TX Bit7 (976~993) 18 984, Bit15 (966~986) 21 976,
2592 13:53:38.649610
2593 13:53:38.652222 Write Rank0 MR14 =0xa
2594 13:53:38.661682
2595 13:53:38.664794 CH=1, VrefRange= 0, VrefLevel = 10
2596 13:53:38.668148 TX Bit0 (978~999) 22 988, Bit8 (968~988) 21 978,
2597 13:53:38.671877 TX Bit1 (976~997) 22 986, Bit9 (968~987) 20 977,
2598 13:53:38.678059 TX Bit2 (975~993) 19 984, Bit10 (969~988) 20 978,
2599 13:53:38.681203 TX Bit3 (973~992) 20 982, Bit11 (970~991) 22 980,
2600 13:53:38.684656 TX Bit4 (976~995) 20 985, Bit12 (969~991) 23 980,
2601 13:53:38.691564 TX Bit5 (977~998) 22 987, Bit13 (970~991) 22 980,
2602 13:53:38.694255 TX Bit6 (978~998) 21 988, Bit14 (969~989) 21 979,
2603 13:53:38.698048 TX Bit7 (976~994) 19 985, Bit15 (966~986) 21 976,
2604 13:53:38.701113
2605 13:53:38.701532 Write Rank0 MR14 =0xc
2606 13:53:38.710707
2607 13:53:38.713929 CH=1, VrefRange= 0, VrefLevel = 12
2608 13:53:38.717654 TX Bit0 (978~999) 22 988, Bit8 (967~988) 22 977,
2609 13:53:38.720788 TX Bit1 (976~998) 23 987, Bit9 (968~988) 21 978,
2610 13:53:38.727104 TX Bit2 (975~994) 20 984, Bit10 (968~989) 22 978,
2611 13:53:38.730567 TX Bit3 (972~992) 21 982, Bit11 (969~991) 23 980,
2612 13:53:38.734135 TX Bit4 (976~996) 21 986, Bit12 (969~991) 23 980,
2613 13:53:38.740633 TX Bit5 (977~999) 23 988, Bit13 (970~991) 22 980,
2614 13:53:38.743867 TX Bit6 (977~999) 23 988, Bit14 (969~990) 22 979,
2615 13:53:38.747239 TX Bit7 (976~994) 19 985, Bit15 (965~987) 23 976,
2616 13:53:38.747667
2617 13:53:38.750482 Write Rank0 MR14 =0xe
2618 13:53:38.759765
2619 13:53:38.763176 CH=1, VrefRange= 0, VrefLevel = 14
2620 13:53:38.766558 TX Bit0 (977~999) 23 988, Bit8 (968~989) 22 978,
2621 13:53:38.769745 TX Bit1 (976~998) 23 987, Bit9 (968~989) 22 978,
2622 13:53:38.776543 TX Bit2 (975~994) 20 984, Bit10 (968~990) 23 979,
2623 13:53:38.779503 TX Bit3 (971~992) 22 981, Bit11 (970~991) 22 980,
2624 13:53:38.782967 TX Bit4 (976~997) 22 986, Bit12 (969~991) 23 980,
2625 13:53:38.789612 TX Bit5 (976~999) 24 987, Bit13 (969~991) 23 980,
2626 13:53:38.793341 TX Bit6 (978~999) 22 988, Bit14 (969~990) 22 979,
2627 13:53:38.796637 TX Bit7 (976~995) 20 985, Bit15 (965~987) 23 976,
2628 13:53:38.797097
2629 13:53:38.799693 Write Rank0 MR14 =0x10
2630 13:53:38.809442
2631 13:53:38.812527 CH=1, VrefRange= 0, VrefLevel = 16
2632 13:53:38.816271 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
2633 13:53:38.819325 TX Bit1 (976~998) 23 987, Bit9 (967~989) 23 978,
2634 13:53:38.825346 TX Bit2 (974~995) 22 984, Bit10 (968~990) 23 979,
2635 13:53:38.828729 TX Bit3 (971~992) 22 981, Bit11 (969~991) 23 980,
2636 13:53:38.832400 TX Bit4 (976~997) 22 986, Bit12 (969~991) 23 980,
2637 13:53:38.838756 TX Bit5 (976~999) 24 987, Bit13 (970~991) 22 980,
2638 13:53:38.842488 TX Bit6 (977~999) 23 988, Bit14 (969~991) 23 980,
2639 13:53:38.845569 TX Bit7 (975~995) 21 985, Bit15 (965~988) 24 976,
2640 13:53:38.845998
2641 13:53:38.849028 Write Rank0 MR14 =0x12
2642 13:53:38.858586
2643 13:53:38.862021 CH=1, VrefRange= 0, VrefLevel = 18
2644 13:53:38.865095 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
2645 13:53:38.868532 TX Bit1 (976~999) 24 987, Bit9 (967~990) 24 978,
2646 13:53:38.874927 TX Bit2 (974~996) 23 985, Bit10 (969~991) 23 980,
2647 13:53:38.878360 TX Bit3 (971~993) 23 982, Bit11 (969~992) 24 980,
2648 13:53:38.881595 TX Bit4 (975~998) 24 986, Bit12 (968~992) 25 980,
2649 13:53:38.888551 TX Bit5 (977~1000) 24 988, Bit13 (969~991) 23 980,
2650 13:53:38.891626 TX Bit6 (977~1000) 24 988, Bit14 (968~991) 24 979,
2651 13:53:38.894840 TX Bit7 (975~996) 22 985, Bit15 (964~989) 26 976,
2652 13:53:38.898359
2653 13:53:38.898821 Write Rank0 MR14 =0x14
2654 13:53:38.908120
2655 13:53:38.908579 CH=1, VrefRange= 0, VrefLevel = 20
2656 13:53:38.915354 TX Bit0 (977~1001) 25 989, Bit8 (967~991) 25 979,
2657 13:53:38.918697 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
2658 13:53:38.924978 TX Bit2 (974~996) 23 985, Bit10 (967~991) 25 979,
2659 13:53:38.928760 TX Bit3 (971~994) 24 982, Bit11 (969~992) 24 980,
2660 13:53:38.931641 TX Bit4 (975~998) 24 986, Bit12 (968~992) 25 980,
2661 13:53:38.938139 TX Bit5 (976~1000) 25 988, Bit13 (969~992) 24 980,
2662 13:53:38.941959 TX Bit6 (977~1000) 24 988, Bit14 (969~991) 23 980,
2663 13:53:38.944886 TX Bit7 (975~997) 23 986, Bit15 (963~988) 26 975,
2664 13:53:38.947953
2665 13:53:38.948335 Write Rank0 MR14 =0x16
2666 13:53:38.958161
2667 13:53:38.961312 CH=1, VrefRange= 0, VrefLevel = 22
2668 13:53:38.964646 TX Bit0 (977~1001) 25 989, Bit8 (967~991) 25 979,
2669 13:53:38.968485 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
2670 13:53:38.974619 TX Bit2 (973~997) 25 985, Bit10 (968~991) 24 979,
2671 13:53:38.978275 TX Bit3 (971~994) 24 982, Bit11 (969~992) 24 980,
2672 13:53:38.980914 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2673 13:53:38.987508 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2674 13:53:38.991443 TX Bit6 (977~1000) 24 988, Bit14 (968~991) 24 979,
2675 13:53:38.998036 TX Bit7 (974~997) 24 985, Bit15 (963~988) 26 975,
2676 13:53:38.998495
2677 13:53:38.998800 Write Rank0 MR14 =0x18
2678 13:53:39.007793
2679 13:53:39.011231 CH=1, VrefRange= 0, VrefLevel = 24
2680 13:53:39.014082 TX Bit0 (977~1001) 25 989, Bit8 (966~991) 26 978,
2681 13:53:39.017443 TX Bit1 (975~999) 25 987, Bit9 (967~991) 25 979,
2682 13:53:39.024176 TX Bit2 (973~997) 25 985, Bit10 (967~991) 25 979,
2683 13:53:39.027122 TX Bit3 (970~994) 25 982, Bit11 (969~992) 24 980,
2684 13:53:39.030957 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2685 13:53:39.037648 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2686 13:53:39.040578 TX Bit6 (977~1000) 24 988, Bit14 (968~991) 24 979,
2687 13:53:39.047259 TX Bit7 (974~998) 25 986, Bit15 (963~988) 26 975,
2688 13:53:39.047706
2689 13:53:39.048058 Write Rank0 MR14 =0x1a
2690 13:53:39.057957
2691 13:53:39.061290 CH=1, VrefRange= 0, VrefLevel = 26
2692 13:53:39.064228 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
2693 13:53:39.067724 TX Bit1 (975~999) 25 987, Bit9 (966~990) 25 978,
2694 13:53:39.073872 TX Bit2 (972~996) 25 984, Bit10 (967~991) 25 979,
2695 13:53:39.077777 TX Bit3 (970~994) 25 982, Bit11 (968~992) 25 980,
2696 13:53:39.080915 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2697 13:53:39.087604 TX Bit5 (976~1000) 25 988, Bit13 (968~991) 24 979,
2698 13:53:39.090371 TX Bit6 (977~1001) 25 989, Bit14 (968~990) 23 979,
2699 13:53:39.097084 TX Bit7 (974~998) 25 986, Bit15 (963~987) 25 975,
2700 13:53:39.097570
2701 13:53:39.100377 wait MRW command Rank0 MR14 =0x1c fired (1)
2702 13:53:39.100843 Write Rank0 MR14 =0x1c
2703 13:53:39.111284
2704 13:53:39.114766 CH=1, VrefRange= 0, VrefLevel = 28
2705 13:53:39.117721 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
2706 13:53:39.121079 TX Bit1 (975~999) 25 987, Bit9 (966~990) 25 978,
2707 13:53:39.127950 TX Bit2 (972~996) 25 984, Bit10 (967~991) 25 979,
2708 13:53:39.131046 TX Bit3 (970~994) 25 982, Bit11 (968~992) 25 980,
2709 13:53:39.134581 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2710 13:53:39.141008 TX Bit5 (976~1000) 25 988, Bit13 (968~991) 24 979,
2711 13:53:39.144774 TX Bit6 (977~1001) 25 989, Bit14 (968~990) 23 979,
2712 13:53:39.150968 TX Bit7 (974~998) 25 986, Bit15 (963~987) 25 975,
2713 13:53:39.151431
2714 13:53:39.151731 Write Rank0 MR14 =0x1e
2715 13:53:39.161099
2716 13:53:39.163932 CH=1, VrefRange= 0, VrefLevel = 30
2717 13:53:39.168078 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
2718 13:53:39.170754 TX Bit1 (975~999) 25 987, Bit9 (966~990) 25 978,
2719 13:53:39.177585 TX Bit2 (972~996) 25 984, Bit10 (967~991) 25 979,
2720 13:53:39.180483 TX Bit3 (970~994) 25 982, Bit11 (968~992) 25 980,
2721 13:53:39.183882 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2722 13:53:39.190663 TX Bit5 (976~1000) 25 988, Bit13 (968~991) 24 979,
2723 13:53:39.193990 TX Bit6 (977~1001) 25 989, Bit14 (968~990) 23 979,
2724 13:53:39.197594 TX Bit7 (974~998) 25 986, Bit15 (963~987) 25 975,
2725 13:53:39.201206
2726 13:53:39.201702 Write Rank0 MR14 =0x20
2727 13:53:39.210583
2728 13:53:39.214182 CH=1, VrefRange= 0, VrefLevel = 32
2729 13:53:39.216923 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
2730 13:53:39.220357 TX Bit1 (975~999) 25 987, Bit9 (966~990) 25 978,
2731 13:53:39.227025 TX Bit2 (972~996) 25 984, Bit10 (967~991) 25 979,
2732 13:53:39.230338 TX Bit3 (970~994) 25 982, Bit11 (968~992) 25 980,
2733 13:53:39.233477 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2734 13:53:39.240230 TX Bit5 (976~1000) 25 988, Bit13 (968~991) 24 979,
2735 13:53:39.243660 TX Bit6 (977~1001) 25 989, Bit14 (968~990) 23 979,
2736 13:53:39.250768 TX Bit7 (974~998) 25 986, Bit15 (963~987) 25 975,
2737 13:53:39.251267
2738 13:53:39.251609
2739 13:53:39.253587 TX Vref found, early break! 370< 378
2740 13:53:39.256919 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2741 13:53:39.260244 u1DelayCellOfst[0]=7 cells (6 PI)
2742 13:53:39.263288 u1DelayCellOfst[1]=6 cells (5 PI)
2743 13:53:39.266954 u1DelayCellOfst[2]=2 cells (2 PI)
2744 13:53:39.270577 u1DelayCellOfst[3]=0 cells (0 PI)
2745 13:53:39.273516 u1DelayCellOfst[4]=5 cells (4 PI)
2746 13:53:39.273899 u1DelayCellOfst[5]=7 cells (6 PI)
2747 13:53:39.277291 u1DelayCellOfst[6]=8 cells (7 PI)
2748 13:53:39.280165 u1DelayCellOfst[7]=5 cells (4 PI)
2749 13:53:39.283290 Byte0, DQ PI dly=982, DQM PI dly= 985
2750 13:53:39.290283 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
2751 13:53:39.290727
2752 13:53:39.293251 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
2753 13:53:39.293642
2754 13:53:39.296740 u1DelayCellOfst[8]=5 cells (4 PI)
2755 13:53:39.300143 u1DelayCellOfst[9]=3 cells (3 PI)
2756 13:53:39.303239 u1DelayCellOfst[10]=5 cells (4 PI)
2757 13:53:39.306560 u1DelayCellOfst[11]=6 cells (5 PI)
2758 13:53:39.310229 u1DelayCellOfst[12]=6 cells (5 PI)
2759 13:53:39.313328 u1DelayCellOfst[13]=5 cells (4 PI)
2760 13:53:39.316837 u1DelayCellOfst[14]=5 cells (4 PI)
2761 13:53:39.317362 u1DelayCellOfst[15]=0 cells (0 PI)
2762 13:53:39.320283 Byte1, DQ PI dly=975, DQM PI dly= 977
2763 13:53:39.326892 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
2764 13:53:39.327354
2765 13:53:39.329890 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
2766 13:53:39.330349
2767 13:53:39.333096 Write Rank0 MR14 =0x1a
2768 13:53:39.333586
2769 13:53:39.336662 Final TX Range 0 Vref 26
2770 13:53:39.337120
2771 13:53:39.343286 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2772 13:53:39.343746
2773 13:53:39.346528 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2774 13:53:39.356870 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2775 13:53:39.363597 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2776 13:53:39.364071 Write Rank0 MR3 =0xb0
2777 13:53:39.366736 DramC Write-DBI on
2778 13:53:39.367322 ==
2779 13:53:39.369527 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2780 13:53:39.372744 fsp= 1, odt_onoff= 1, Byte mode= 0
2781 13:53:39.376342 ==
2782 13:53:39.379314 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2783 13:53:39.379702
2784 13:53:39.383273 Begin, DQ Scan Range 697~761
2785 13:53:39.383729
2786 13:53:39.384031
2787 13:53:39.384308 TX Vref Scan disable
2788 13:53:39.386306 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2789 13:53:39.389920 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2790 13:53:39.393004 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2791 13:53:39.399814 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2792 13:53:39.402600 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2793 13:53:39.406155 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2794 13:53:39.409618 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2795 13:53:39.413311 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2796 13:53:39.416158 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2797 13:53:39.419846 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2798 13:53:39.423149 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
2799 13:53:39.425973 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
2800 13:53:39.429588 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2801 13:53:39.433192 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2802 13:53:39.436193 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2803 13:53:39.439159 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2804 13:53:39.442745 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2805 13:53:39.446267 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2806 13:53:39.449297 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2807 13:53:39.452735 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2808 13:53:39.461812 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2809 13:53:39.465232 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2810 13:53:39.468307 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2811 13:53:39.472013 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2812 13:53:39.475013 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2813 13:53:39.478014 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2814 13:53:39.481483 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2815 13:53:39.485026 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2816 13:53:39.488632 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2817 13:53:39.491651 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2818 13:53:39.495137 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
2819 13:53:39.497937 Byte0, DQ PI dly=730, DQM PI dly= 730
2820 13:53:39.501499 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2821 13:53:39.504713
2822 13:53:39.508076 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2823 13:53:39.508539
2824 13:53:39.511803 Byte1, DQ PI dly=720, DQM PI dly= 720
2825 13:53:39.514534 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)
2826 13:53:39.514916
2827 13:53:39.518250 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)
2828 13:53:39.521657
2829 13:53:39.525004 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2830 13:53:39.535179 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2831 13:53:39.541316 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2832 13:53:39.541704 Write Rank0 MR3 =0x30
2833 13:53:39.545079 DramC Write-DBI off
2834 13:53:39.545578
2835 13:53:39.545879 [DATLAT]
2836 13:53:39.548418 Freq=1600, CH1 RK0, use_rxtx_scan=0
2837 13:53:39.548872
2838 13:53:39.551907 DATLAT Default: 0xf
2839 13:53:39.552391 7, 0xFFFF, sum=0
2840 13:53:39.555244 8, 0xFFFF, sum=0
2841 13:53:39.555705 9, 0xFFFF, sum=0
2842 13:53:39.558189 10, 0xFFFF, sum=0
2843 13:53:39.558683 11, 0xFFFF, sum=0
2844 13:53:39.561663 12, 0xFFFF, sum=0
2845 13:53:39.562052 13, 0xFFFF, sum=0
2846 13:53:39.562352 14, 0x0, sum=1
2847 13:53:39.565450 15, 0x0, sum=2
2848 13:53:39.565909 16, 0x0, sum=3
2849 13:53:39.568272 17, 0x0, sum=4
2850 13:53:39.572000 pattern=2 first_step=14 total pass=5 best_step=16
2851 13:53:39.572466 ==
2852 13:53:39.578659 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2853 13:53:39.582085 fsp= 1, odt_onoff= 1, Byte mode= 0
2854 13:53:39.582596 ==
2855 13:53:39.584917 Start DQ dly to find pass range UseTestEngine =1
2856 13:53:39.588210 x-axis: bit #, y-axis: DQ dly (-127~63)
2857 13:53:39.588708 RX Vref Scan = 1
2858 13:53:39.712077
2859 13:53:39.712547 RX Vref found, early break!
2860 13:53:39.712881
2861 13:53:39.719046 Final RX Vref 13, apply to both rank0 and 1
2862 13:53:39.719674 ==
2863 13:53:39.722006 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2864 13:53:39.725723 fsp= 1, odt_onoff= 1, Byte mode= 0
2865 13:53:39.726149 ==
2866 13:53:39.726479 DQS Delay:
2867 13:53:39.728700 DQS0 = 0, DQS1 = 0
2868 13:53:39.729120 DQM Delay:
2869 13:53:39.732324 DQM0 = 20, DQM1 = 18
2870 13:53:39.732753 DQ Delay:
2871 13:53:39.735372 DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15
2872 13:53:39.738777 DQ4 =18, DQ5 =24, DQ6 =25, DQ7 =19
2873 13:53:39.741829 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19
2874 13:53:39.745257 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
2875 13:53:39.745641
2876 13:53:39.745934
2877 13:53:39.746205
2878 13:53:39.748694 [DramC_TX_OE_Calibration] TA2
2879 13:53:39.752475 Original DQ_B0 (3 6) =30, OEN = 27
2880 13:53:39.756224 Original DQ_B1 (3 6) =30, OEN = 27
2881 13:53:39.758887 23, 0x0, End_B0=23 End_B1=23
2882 13:53:39.759281 24, 0x0, End_B0=24 End_B1=24
2883 13:53:39.762200 25, 0x0, End_B0=25 End_B1=25
2884 13:53:39.765176 26, 0x0, End_B0=26 End_B1=26
2885 13:53:39.768844 27, 0x0, End_B0=27 End_B1=27
2886 13:53:39.769352 28, 0x0, End_B0=28 End_B1=28
2887 13:53:39.772503 29, 0x0, End_B0=29 End_B1=29
2888 13:53:39.776116 30, 0x0, End_B0=30 End_B1=30
2889 13:53:39.778817 31, 0xFFFF, End_B0=30 End_B1=30
2890 13:53:39.785747 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2891 13:53:39.788769 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2892 13:53:39.789168
2893 13:53:39.789471
2894 13:53:39.792383 Write Rank0 MR23 =0x3f
2895 13:53:39.792845 [DQSOSC]
2896 13:53:39.799088 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0, (MSB)MR19= 0x3, tDQSOscB0 = 328 ps tDQSOscB1 = 0 ps
2897 13:53:39.805302 CH1_RK0: MR19=0x3, MR18=0xC0, DQSOSC=328, MR23=63, INC=22, DEC=34
2898 13:53:39.808935 Write Rank0 MR23 =0x3f
2899 13:53:39.809447 [DQSOSC]
2900 13:53:39.815356 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0, (MSB)MR19= 0x3, tDQSOscB0 = 328 ps tDQSOscB1 = 0 ps
2901 13:53:39.818404 CH1 RK0: MR19=3, MR18=C0
2902 13:53:39.822950 [RankSwap] Rank num 2, (Multi 1), Rank 1
2903 13:53:39.825105 Write Rank0 MR2 =0xad
2904 13:53:39.825574 [Write Leveling]
2905 13:53:39.828851 delay byte0 byte1 byte2 byte3
2906 13:53:39.829352
2907 13:53:39.832238 10 0 0
2908 13:53:39.832731 11 0 0
2909 13:53:39.833068 12 0 0
2910 13:53:39.835242 13 0 0
2911 13:53:39.835735 14 0 0
2912 13:53:39.838783 15 0 0
2913 13:53:39.839207 16 0 0
2914 13:53:39.839551 17 0 0
2915 13:53:39.841820 18 0 0
2916 13:53:39.842206 19 0 0
2917 13:53:39.845079 20 0 0
2918 13:53:39.845448 21 0 0
2919 13:53:39.848494 22 0 0
2920 13:53:39.848987 23 0 0
2921 13:53:39.849473 24 0 0
2922 13:53:39.851894 25 0 0
2923 13:53:39.852276 26 0 0
2924 13:53:39.855544 27 0 0
2925 13:53:39.856004 28 0 0
2926 13:53:39.856309 29 0 0
2927 13:53:39.858378 30 0 0
2928 13:53:39.858767 31 0 0
2929 13:53:39.861780 32 0 ff
2930 13:53:39.862185 33 0 ff
2931 13:53:39.865285 34 0 ff
2932 13:53:39.865750 35 0 ff
2933 13:53:39.866057 36 ff ff
2934 13:53:39.868852 37 ff ff
2935 13:53:39.869363 38 ff ff
2936 13:53:39.872120 39 ff ff
2937 13:53:39.872511 40 ff ff
2938 13:53:39.875677 41 ff ff
2939 13:53:39.876144 42 ff ff
2940 13:53:39.878809 pass bytecount = 0xff (0xff: all bytes pass)
2941 13:53:39.881873
2942 13:53:39.882252 DQS0 dly: 36
2943 13:53:39.882564 DQS1 dly: 32
2944 13:53:39.885237 Write Rank0 MR2 =0x2d
2945 13:53:39.888747 [RankSwap] Rank num 2, (Multi 1), Rank 0
2946 13:53:39.892572 Write Rank1 MR1 =0xd6
2947 13:53:39.893034 [Gating]
2948 13:53:39.893379 ==
2949 13:53:39.895305 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2950 13:53:39.898826 fsp= 1, odt_onoff= 1, Byte mode= 0
2951 13:53:39.899290 ==
2952 13:53:39.905776 3 1 0 |2120 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2953 13:53:39.908852 3 1 4 |2a29 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2954 13:53:39.912423 3 1 8 |2e2d 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2955 13:53:39.918518 3 1 12 |1d1d 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2956 13:53:39.922131 3 1 16 |2f2e 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2957 13:53:39.925598 3 1 20 |2e2e 3534 |(0 0)(11 11) |(1 0)(0 1)| 0
2958 13:53:39.929024 3 1 24 |3130 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2959 13:53:39.935512 3 1 28 |303 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2960 13:53:39.939252 3 2 0 |3939 201 |(11 11)(11 11) |(0 0)(1 1)| 0
2961 13:53:39.941772 3 2 4 |201 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2962 13:53:39.948768 3 2 8 |3737 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2963 13:53:39.952193 3 2 12 |3b3b 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2964 13:53:39.955727 3 2 16 |3a39 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2965 13:53:39.962070 3 2 20 |2120 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2966 13:53:39.965748 3 2 24 |3736 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2967 13:53:39.968366 3 2 28 |3a3a 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2968 13:53:39.974988 [Byte 0] Lead/lag falling Transition (3, 2, 28)
2969 13:53:39.978495 3 3 0 |2c2b 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
2970 13:53:39.981376 3 3 4 |3534 605 |(11 11)(11 11) |(0 1)(1 1)| 0
2971 13:53:39.984767 3 3 8 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2972 13:53:39.992043 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2973 13:53:39.995614 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2974 13:53:39.998486 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2975 13:53:40.005267 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2976 13:53:40.008443 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2977 13:53:40.011934 3 3 28 |504 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2978 13:53:40.018323 3 4 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2979 13:53:40.021868 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2980 13:53:40.024811 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2981 13:53:40.028189 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2982 13:53:40.035167 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2983 13:53:40.038298 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2984 13:53:40.042311 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2985 13:53:40.048663 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2986 13:53:40.051352 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2987 13:53:40.055028 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2988 13:53:40.061717 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2989 13:53:40.065204 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2990 13:53:40.068598 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2991 13:53:40.074998 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2992 13:53:40.078082 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2993 13:53:40.081407 [Byte 0] Lead/lag Transition tap number (2)
2994 13:53:40.084660 [Byte 1] Lead/lag falling Transition (3, 5, 20)
2995 13:53:40.091508 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2996 13:53:40.094755 3 5 28 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2997 13:53:40.097933 [Byte 1] Lead/lag Transition tap number (3)
2998 13:53:40.101740 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2999 13:53:40.105068 [Byte 0]First pass (3, 6, 0)
3000 13:53:40.108056 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3001 13:53:40.111743 [Byte 1]First pass (3, 6, 4)
3002 13:53:40.115362 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3003 13:53:40.117932 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3004 13:53:40.125298 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3005 13:53:40.128043 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3006 13:53:40.131751 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3007 13:53:40.134767 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3008 13:53:40.138420 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3009 13:53:40.145309 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3010 13:53:40.148396 All bytes gating window > 1UI, Early break!
3011 13:53:40.148891
3012 13:53:40.151584 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
3013 13:53:40.152006
3014 13:53:40.155595 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 26)
3015 13:53:40.156091
3016 13:53:40.156417
3017 13:53:40.156718
3018 13:53:40.158070 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
3019 13:53:40.158645
3020 13:53:40.164898 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
3021 13:53:40.165383
3022 13:53:40.165681
3023 13:53:40.165954 Write Rank1 MR1 =0x56
3024 13:53:40.166216
3025 13:53:40.168046 best RODT dly(2T, 0.5T) = (2, 2)
3026 13:53:40.168423
3027 13:53:40.171423 best RODT dly(2T, 0.5T) = (2, 2)
3028 13:53:40.171882 ==
3029 13:53:40.177962 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3030 13:53:40.181212 fsp= 1, odt_onoff= 1, Byte mode= 0
3031 13:53:40.181683 ==
3032 13:53:40.184559 Start DQ dly to find pass range UseTestEngine =0
3033 13:53:40.187910 x-axis: bit #, y-axis: DQ dly (-127~63)
3034 13:53:40.191472 RX Vref Scan = 0
3035 13:53:40.191935 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3036 13:53:40.194688 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3037 13:53:40.197984 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3038 13:53:40.201909 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3039 13:53:40.205233 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3040 13:53:40.208116 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3041 13:53:40.211453 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3042 13:53:40.214934 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3043 13:53:40.218448 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3044 13:53:40.218877 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3045 13:53:40.221863 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3046 13:53:40.224638 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3047 13:53:40.228244 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3048 13:53:40.231708 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3049 13:53:40.234473 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3050 13:53:40.237841 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3051 13:53:40.241266 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3052 13:53:40.241653 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3053 13:53:40.244875 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3054 13:53:40.248106 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3055 13:53:40.251191 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3056 13:53:40.254524 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3057 13:53:40.258039 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3058 13:53:40.261338 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3059 13:53:40.261843 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3060 13:53:40.264724 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3061 13:53:40.268083 0, [0] xxooxxxx xxxxxxxo [MSB]
3062 13:53:40.271290 1, [0] xxooxxxo xxxxxxxo [MSB]
3063 13:53:40.274920 2, [0] xxoooxxo xxxxxxxo [MSB]
3064 13:53:40.278145 3, [0] xxoooxxo ooooxooo [MSB]
3065 13:53:40.278648 4, [0] xxoooxxo ooooxooo [MSB]
3066 13:53:40.281055 5, [0] xoooooxo oooooooo [MSB]
3067 13:53:40.284557 6, [0] xoooooxo oooooooo [MSB]
3068 13:53:40.288205 34, [0] oooxoooo oooooooo [MSB]
3069 13:53:40.291305 35, [0] ooxxoooo ooooooox [MSB]
3070 13:53:40.294821 36, [0] ooxxoooo ooooooox [MSB]
3071 13:53:40.295248 37, [0] ooxxxooo ooxoooox [MSB]
3072 13:53:40.297703 38, [0] ooxxxooo xoxooxox [MSB]
3073 13:53:40.301495 39, [0] ooxxxoox xxxxoxxx [MSB]
3074 13:53:40.304816 40, [0] ooxxxoox xxxxoxxx [MSB]
3075 13:53:40.308201 41, [0] ooxxxoxx xxxxxxxx [MSB]
3076 13:53:40.311907 42, [0] xxxxxxxx xxxxxxxx [MSB]
3077 13:53:40.314628 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
3078 13:53:40.318264 iDelay=42, Bit 1, Center 23 (5 ~ 41) 37
3079 13:53:40.321303 iDelay=42, Bit 2, Center 17 (0 ~ 34) 35
3080 13:53:40.324789 iDelay=42, Bit 3, Center 15 (-2 ~ 33) 36
3081 13:53:40.327977 iDelay=42, Bit 4, Center 19 (2 ~ 36) 35
3082 13:53:40.331404 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3083 13:53:40.334270 iDelay=42, Bit 6, Center 23 (7 ~ 40) 34
3084 13:53:40.337808 iDelay=42, Bit 7, Center 19 (1 ~ 38) 38
3085 13:53:40.341510 iDelay=42, Bit 8, Center 20 (3 ~ 37) 35
3086 13:53:40.344693 iDelay=42, Bit 9, Center 20 (3 ~ 38) 36
3087 13:53:40.350930 iDelay=42, Bit 10, Center 19 (3 ~ 36) 34
3088 13:53:40.354742 iDelay=42, Bit 11, Center 20 (3 ~ 38) 36
3089 13:53:40.358014 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3090 13:53:40.361370 iDelay=42, Bit 13, Center 20 (3 ~ 37) 35
3091 13:53:40.364620 iDelay=42, Bit 14, Center 20 (3 ~ 38) 36
3092 13:53:40.368133 iDelay=42, Bit 15, Center 16 (-1 ~ 34) 36
3093 13:53:40.368636 ==
3094 13:53:40.375095 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3095 13:53:40.375634 fsp= 1, odt_onoff= 1, Byte mode= 0
3096 13:53:40.377866 ==
3097 13:53:40.378286 DQS Delay:
3098 13:53:40.378613 DQS0 = 0, DQS1 = 0
3099 13:53:40.381300 DQM Delay:
3100 13:53:40.381716 DQM0 = 20, DQM1 = 19
3101 13:53:40.384735 DQ Delay:
3102 13:53:40.385109 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
3103 13:53:40.388511 DQ4 =19, DQ5 =23, DQ6 =23, DQ7 =19
3104 13:53:40.391375 DQ8 =20, DQ9 =20, DQ10 =19, DQ11 =20
3105 13:53:40.394657 DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =16
3106 13:53:40.395076
3107 13:53:40.398091
3108 13:53:40.398465 DramC Write-DBI off
3109 13:53:40.398761 ==
3110 13:53:40.404790 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3111 13:53:40.408772 fsp= 1, odt_onoff= 1, Byte mode= 0
3112 13:53:40.409279 ==
3113 13:53:40.411769 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3114 13:53:40.412230
3115 13:53:40.415810 Begin, DQ Scan Range 928~1184
3116 13:53:40.416305
3117 13:53:40.416630
3118 13:53:40.416929 TX Vref Scan disable
3119 13:53:40.418641 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3120 13:53:40.425326 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3121 13:53:40.427807 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3122 13:53:40.431765 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3123 13:53:40.434411 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3124 13:53:40.437975 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3125 13:53:40.441374 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3126 13:53:40.444900 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3127 13:53:40.448474 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3128 13:53:40.451350 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3129 13:53:40.454743 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3130 13:53:40.458441 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3131 13:53:40.461673 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3132 13:53:40.464922 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3133 13:53:40.468303 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3134 13:53:40.471423 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3135 13:53:40.474579 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3136 13:53:40.481331 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3137 13:53:40.484561 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3138 13:53:40.487830 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3139 13:53:40.491733 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3140 13:53:40.494538 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3141 13:53:40.497831 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3142 13:53:40.501751 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3143 13:53:40.504267 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3144 13:53:40.507738 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3145 13:53:40.510997 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3146 13:53:40.514383 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3147 13:53:40.518119 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3148 13:53:40.521283 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3149 13:53:40.524503 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3150 13:53:40.527629 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3151 13:53:40.531729 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3152 13:53:40.534694 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3153 13:53:40.538295 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3154 13:53:40.544839 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3155 13:53:40.548275 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3156 13:53:40.551010 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3157 13:53:40.554634 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3158 13:53:40.557868 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3159 13:53:40.561466 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3160 13:53:40.564818 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
3161 13:53:40.568488 970 |3 6 10|[0] xxxxxxxx oooooxoo [MSB]
3162 13:53:40.571476 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3163 13:53:40.574890 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3164 13:53:40.578034 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3165 13:53:40.581472 974 |3 6 14|[0] xxooxxxx oooooooo [MSB]
3166 13:53:40.584746 975 |3 6 15|[0] xxoooxxx oooooooo [MSB]
3167 13:53:40.588076 976 |3 6 16|[0] xxoooxxx oooooooo [MSB]
3168 13:53:40.592242 977 |3 6 17|[0] xooooooo oooooooo [MSB]
3169 13:53:40.598382 988 |3 6 28|[0] oooooooo ooooooox [MSB]
3170 13:53:40.602332 989 |3 6 29|[0] oooooooo ooooooox [MSB]
3171 13:53:40.605042 990 |3 6 30|[0] oooooooo ooooooox [MSB]
3172 13:53:40.608761 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3173 13:53:40.611909 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3174 13:53:40.615325 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3175 13:53:40.618521 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3176 13:53:40.621916 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
3177 13:53:40.625712 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
3178 13:53:40.629192 997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]
3179 13:53:40.632092 998 |3 6 38|[0] ooxxooox xxxxxxxx [MSB]
3180 13:53:40.635613 999 |3 6 39|[0] oxxxxxxx xxxxxxxx [MSB]
3181 13:53:40.638630 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
3182 13:53:40.642226 Byte0, DQ PI dly=986, DQM PI dly= 986
3183 13:53:40.648761 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3184 13:53:40.649289
3185 13:53:40.651967 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3186 13:53:40.652388
3187 13:53:40.655016 Byte1, DQ PI dly=978, DQM PI dly= 978
3188 13:53:40.658770 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3189 13:53:40.659279
3190 13:53:40.665055 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3191 13:53:40.665476
3192 13:53:40.665770 ==
3193 13:53:40.668298 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3194 13:53:40.671894 fsp= 1, odt_onoff= 1, Byte mode= 0
3195 13:53:40.672356 ==
3196 13:53:40.678736 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3197 13:53:40.679183
3198 13:53:40.679479 Begin, DQ Scan Range 954~1018
3199 13:53:40.681934 Write Rank1 MR14 =0x0
3200 13:53:40.690885
3201 13:53:40.691272 CH=1, VrefRange= 0, VrefLevel = 0
3202 13:53:40.697628 TX Bit0 (980~998) 19 989, Bit8 (971~986) 16 978,
3203 13:53:40.700994 TX Bit1 (979~997) 19 988, Bit9 (970~986) 17 978,
3204 13:53:40.707710 TX Bit2 (976~992) 17 984, Bit10 (972~986) 15 979,
3205 13:53:40.710824 TX Bit3 (975~991) 17 983, Bit11 (974~990) 17 982,
3206 13:53:40.713838 TX Bit4 (978~993) 16 985, Bit12 (972~988) 17 980,
3207 13:53:40.720728 TX Bit5 (978~997) 20 987, Bit13 (975~987) 13 981,
3208 13:53:40.723992 TX Bit6 (979~998) 20 988, Bit14 (973~987) 15 980,
3209 13:53:40.727627 TX Bit7 (978~992) 15 985, Bit15 (968~985) 18 976,
3210 13:53:40.728157
3211 13:53:40.731343 Write Rank1 MR14 =0x2
3212 13:53:40.740687
3213 13:53:40.741225 CH=1, VrefRange= 0, VrefLevel = 2
3214 13:53:40.746967 TX Bit0 (979~999) 21 989, Bit8 (971~987) 17 979,
3215 13:53:40.750566 TX Bit1 (979~997) 19 988, Bit9 (970~987) 18 978,
3216 13:53:40.756899 TX Bit2 (976~992) 17 984, Bit10 (971~987) 17 979,
3217 13:53:40.760561 TX Bit3 (975~991) 17 983, Bit11 (973~991) 19 982,
3218 13:53:40.763231 TX Bit4 (977~994) 18 985, Bit12 (972~988) 17 980,
3219 13:53:40.769958 TX Bit5 (978~997) 20 987, Bit13 (975~987) 13 981,
3220 13:53:40.773745 TX Bit6 (979~998) 20 988, Bit14 (972~988) 17 980,
3221 13:53:40.776928 TX Bit7 (978~993) 16 985, Bit15 (968~985) 18 976,
3222 13:53:40.777505
3223 13:53:40.780328 Write Rank1 MR14 =0x4
3224 13:53:40.789190
3225 13:53:40.789867 CH=1, VrefRange= 0, VrefLevel = 4
3226 13:53:40.795778 TX Bit0 (979~999) 21 989, Bit8 (971~988) 18 979,
3227 13:53:40.799110 TX Bit1 (979~997) 19 988, Bit9 (970~987) 18 978,
3228 13:53:40.805577 TX Bit2 (977~992) 16 984, Bit10 (971~987) 17 979,
3229 13:53:40.809403 TX Bit3 (975~992) 18 983, Bit11 (973~991) 19 982,
3230 13:53:40.812100 TX Bit4 (977~994) 18 985, Bit12 (972~989) 18 980,
3231 13:53:40.819185 TX Bit5 (978~998) 21 988, Bit13 (974~988) 15 981,
3232 13:53:40.822497 TX Bit6 (978~999) 22 988, Bit14 (972~989) 18 980,
3233 13:53:40.826129 TX Bit7 (977~993) 17 985, Bit15 (968~985) 18 976,
3234 13:53:40.826650
3235 13:53:40.828730 Write Rank1 MR14 =0x6
3236 13:53:40.838040
3237 13:53:40.838595 CH=1, VrefRange= 0, VrefLevel = 6
3238 13:53:40.845090 TX Bit0 (979~999) 21 989, Bit8 (970~987) 18 978,
3239 13:53:40.848157 TX Bit1 (978~998) 21 988, Bit9 (970~987) 18 978,
3240 13:53:40.854671 TX Bit2 (976~993) 18 984, Bit10 (972~988) 17 980,
3241 13:53:40.858625 TX Bit3 (975~992) 18 983, Bit11 (973~991) 19 982,
3242 13:53:40.861204 TX Bit4 (976~995) 20 985, Bit12 (971~990) 20 980,
3243 13:53:40.868490 TX Bit5 (978~998) 21 988, Bit13 (973~988) 16 980,
3244 13:53:40.871489 TX Bit6 (978~999) 22 988, Bit14 (972~989) 18 980,
3245 13:53:40.874958 TX Bit7 (977~994) 18 985, Bit15 (968~986) 19 977,
3246 13:53:40.875395
3247 13:53:40.877988 Write Rank1 MR14 =0x8
3248 13:53:40.887599
3249 13:53:40.888105 CH=1, VrefRange= 0, VrefLevel = 8
3250 13:53:40.894375 TX Bit0 (979~999) 21 989, Bit8 (970~989) 20 979,
3251 13:53:40.897029 TX Bit1 (978~998) 21 988, Bit9 (970~988) 19 979,
3252 13:53:40.904042 TX Bit2 (976~993) 18 984, Bit10 (971~989) 19 980,
3253 13:53:40.906927 TX Bit3 (974~992) 19 983, Bit11 (972~992) 21 982,
3254 13:53:40.910167 TX Bit4 (977~996) 20 986, Bit12 (971~990) 20 980,
3255 13:53:40.917364 TX Bit5 (978~998) 21 988, Bit13 (972~989) 18 980,
3256 13:53:40.920713 TX Bit6 (978~999) 22 988, Bit14 (971~990) 20 980,
3257 13:53:40.923813 TX Bit7 (977~994) 18 985, Bit15 (967~986) 20 976,
3258 13:53:40.927135
3259 13:53:40.927523 Write Rank1 MR14 =0xa
3260 13:53:40.936514
3261 13:53:40.940095 CH=1, VrefRange= 0, VrefLevel = 10
3262 13:53:40.943663 TX Bit0 (979~1000) 22 989, Bit8 (970~990) 21 980,
3263 13:53:40.947020 TX Bit1 (978~998) 21 988, Bit9 (969~988) 20 978,
3264 13:53:40.953306 TX Bit2 (975~994) 20 984, Bit10 (970~989) 20 979,
3265 13:53:40.956846 TX Bit3 (974~993) 20 983, Bit11 (971~992) 22 981,
3266 13:53:40.959947 TX Bit4 (976~997) 22 986, Bit12 (971~991) 21 981,
3267 13:53:40.967074 TX Bit5 (977~999) 23 988, Bit13 (972~990) 19 981,
3268 13:53:40.969867 TX Bit6 (978~999) 22 988, Bit14 (971~991) 21 981,
3269 13:53:40.973127 TX Bit7 (977~995) 19 986, Bit15 (967~986) 20 976,
3270 13:53:40.973584
3271 13:53:40.976732 Write Rank1 MR14 =0xc
3272 13:53:40.985985
3273 13:53:40.989377 CH=1, VrefRange= 0, VrefLevel = 12
3274 13:53:40.992693 TX Bit0 (978~1000) 23 989, Bit8 (969~990) 22 979,
3275 13:53:40.996348 TX Bit1 (978~999) 22 988, Bit9 (969~989) 21 979,
3276 13:53:41.003211 TX Bit2 (975~994) 20 984, Bit10 (970~990) 21 980,
3277 13:53:41.006281 TX Bit3 (974~993) 20 983, Bit11 (971~992) 22 981,
3278 13:53:41.009688 TX Bit4 (976~997) 22 986, Bit12 (971~991) 21 981,
3279 13:53:41.016087 TX Bit5 (978~999) 22 988, Bit13 (972~990) 19 981,
3280 13:53:41.019613 TX Bit6 (977~1000) 24 988, Bit14 (970~991) 22 980,
3281 13:53:41.022710 TX Bit7 (977~996) 20 986, Bit15 (967~987) 21 977,
3282 13:53:41.026438
3283 13:53:41.026920 Write Rank1 MR14 =0xe
3284 13:53:41.035386
3285 13:53:41.038720 CH=1, VrefRange= 0, VrefLevel = 14
3286 13:53:41.041954 TX Bit0 (978~1000) 23 989, Bit8 (969~991) 23 980,
3287 13:53:41.045401 TX Bit1 (978~999) 22 988, Bit9 (969~990) 22 979,
3288 13:53:41.052125 TX Bit2 (975~995) 21 985, Bit10 (969~991) 23 980,
3289 13:53:41.055721 TX Bit3 (973~994) 22 983, Bit11 (971~992) 22 981,
3290 13:53:41.058639 TX Bit4 (976~997) 22 986, Bit12 (970~992) 23 981,
3291 13:53:41.065815 TX Bit5 (978~999) 22 988, Bit13 (972~991) 20 981,
3292 13:53:41.068636 TX Bit6 (977~1000) 24 988, Bit14 (970~991) 22 980,
3293 13:53:41.072355 TX Bit7 (976~996) 21 986, Bit15 (967~987) 21 977,
3294 13:53:41.075331
3295 13:53:41.075601 Write Rank1 MR14 =0x10
3296 13:53:41.085249
3297 13:53:41.085695 CH=1, VrefRange= 0, VrefLevel = 16
3298 13:53:41.091683 TX Bit0 (978~1001) 24 989, Bit8 (969~990) 22 979,
3299 13:53:41.095123 TX Bit1 (978~999) 22 988, Bit9 (969~990) 22 979,
3300 13:53:41.102254 TX Bit2 (974~996) 23 985, Bit10 (969~991) 23 980,
3301 13:53:41.105041 TX Bit3 (972~995) 24 983, Bit11 (970~992) 23 981,
3302 13:53:41.108996 TX Bit4 (976~997) 22 986, Bit12 (970~992) 23 981,
3303 13:53:41.115259 TX Bit5 (977~999) 23 988, Bit13 (970~991) 22 980,
3304 13:53:41.118673 TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981,
3305 13:53:41.122266 TX Bit7 (976~997) 22 986, Bit15 (967~987) 21 977,
3306 13:53:41.125242
3307 13:53:41.125652 Write Rank1 MR14 =0x12
3308 13:53:41.135418
3309 13:53:41.138873 CH=1, VrefRange= 0, VrefLevel = 18
3310 13:53:41.142288 TX Bit0 (978~1001) 24 989, Bit8 (969~991) 23 980,
3311 13:53:41.144989 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
3312 13:53:41.151804 TX Bit2 (974~996) 23 985, Bit10 (969~991) 23 980,
3313 13:53:41.155097 TX Bit3 (972~995) 24 983, Bit11 (970~993) 24 981,
3314 13:53:41.158587 TX Bit4 (975~998) 24 986, Bit12 (970~992) 23 981,
3315 13:53:41.165026 TX Bit5 (977~999) 23 988, Bit13 (971~992) 22 981,
3316 13:53:41.168760 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3317 13:53:41.172245 TX Bit7 (976~997) 22 986, Bit15 (967~988) 22 977,
3318 13:53:41.172748
3319 13:53:41.175064 Write Rank1 MR14 =0x14
3320 13:53:41.185258
3321 13:53:41.188815 CH=1, VrefRange= 0, VrefLevel = 20
3322 13:53:41.191399 TX Bit0 (978~1002) 25 990, Bit8 (969~992) 24 980,
3323 13:53:41.194934 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3324 13:53:41.201503 TX Bit2 (974~997) 24 985, Bit10 (968~991) 24 979,
3325 13:53:41.205310 TX Bit3 (972~995) 24 983, Bit11 (970~993) 24 981,
3326 13:53:41.208746 TX Bit4 (975~998) 24 986, Bit12 (970~992) 23 981,
3327 13:53:41.215137 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3328 13:53:41.218692 TX Bit6 (977~1001) 25 989, Bit14 (970~992) 23 981,
3329 13:53:41.225272 TX Bit7 (976~997) 22 986, Bit15 (967~989) 23 978,
3330 13:53:41.225776
3331 13:53:41.226100 Write Rank1 MR14 =0x16
3332 13:53:41.235069
3333 13:53:41.238375 CH=1, VrefRange= 0, VrefLevel = 22
3334 13:53:41.242112 TX Bit0 (977~1002) 26 989, Bit8 (968~991) 24 979,
3335 13:53:41.245406 TX Bit1 (977~1000) 24 988, Bit9 (969~991) 23 980,
3336 13:53:41.252155 TX Bit2 (973~997) 25 985, Bit10 (969~991) 23 980,
3337 13:53:41.255537 TX Bit3 (971~996) 26 983, Bit11 (970~993) 24 981,
3338 13:53:41.258232 TX Bit4 (975~999) 25 987, Bit12 (969~992) 24 980,
3339 13:53:41.265388 TX Bit5 (977~1000) 24 988, Bit13 (970~991) 22 980,
3340 13:53:41.268477 TX Bit6 (977~1001) 25 989, Bit14 (969~991) 23 980,
3341 13:53:41.275352 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3342 13:53:41.275853
3343 13:53:41.278315 wait MRW command Rank1 MR14 =0x18 fired (1)
3344 13:53:41.278737 Write Rank1 MR14 =0x18
3345 13:53:41.289296
3346 13:53:41.292569 CH=1, VrefRange= 0, VrefLevel = 24
3347 13:53:41.296304 TX Bit0 (977~1003) 27 990, Bit8 (968~991) 24 979,
3348 13:53:41.299348 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3349 13:53:41.306523 TX Bit2 (973~997) 25 985, Bit10 (969~990) 22 979,
3350 13:53:41.309845 TX Bit3 (971~996) 26 983, Bit11 (969~992) 24 980,
3351 13:53:41.312600 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
3352 13:53:41.319259 TX Bit5 (977~1001) 25 989, Bit13 (970~991) 22 980,
3353 13:53:41.322651 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
3354 13:53:41.329294 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3355 13:53:41.329797
3356 13:53:41.330316 Write Rank1 MR14 =0x1a
3357 13:53:41.339550
3358 13:53:41.343042 CH=1, VrefRange= 0, VrefLevel = 26
3359 13:53:41.345889 TX Bit0 (977~1003) 27 990, Bit8 (968~991) 24 979,
3360 13:53:41.349509 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3361 13:53:41.356250 TX Bit2 (973~997) 25 985, Bit10 (969~990) 22 979,
3362 13:53:41.359684 TX Bit3 (971~996) 26 983, Bit11 (969~992) 24 980,
3363 13:53:41.362749 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
3364 13:53:41.369639 TX Bit5 (977~1001) 25 989, Bit13 (970~991) 22 980,
3365 13:53:41.373273 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
3366 13:53:41.376010 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3367 13:53:41.379559
3368 13:53:41.379977 Write Rank1 MR14 =0x1c
3369 13:53:41.389787
3370 13:53:41.390203 CH=1, VrefRange= 0, VrefLevel = 28
3371 13:53:41.396143 TX Bit0 (977~1003) 27 990, Bit8 (968~991) 24 979,
3372 13:53:41.399920 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3373 13:53:41.406162 TX Bit2 (973~997) 25 985, Bit10 (969~990) 22 979,
3374 13:53:41.409762 TX Bit3 (971~996) 26 983, Bit11 (969~992) 24 980,
3375 13:53:41.412957 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
3376 13:53:41.419682 TX Bit5 (977~1001) 25 989, Bit13 (970~991) 22 980,
3377 13:53:41.423198 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
3378 13:53:41.429355 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3379 13:53:41.429780
3380 13:53:41.430137 Write Rank1 MR14 =0x1e
3381 13:53:41.439513
3382 13:53:41.443258 CH=1, VrefRange= 0, VrefLevel = 30
3383 13:53:41.446781 TX Bit0 (977~1003) 27 990, Bit8 (968~991) 24 979,
3384 13:53:41.450110 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3385 13:53:41.456124 TX Bit2 (973~997) 25 985, Bit10 (969~990) 22 979,
3386 13:53:41.459875 TX Bit3 (971~996) 26 983, Bit11 (969~992) 24 980,
3387 13:53:41.462845 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
3388 13:53:41.469557 TX Bit5 (977~1001) 25 989, Bit13 (970~991) 22 980,
3389 13:53:41.472794 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
3390 13:53:41.479582 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3391 13:53:41.480076
3392 13:53:41.480408 Write Rank1 MR14 =0x20
3393 13:53:41.490123
3394 13:53:41.493006 CH=1, VrefRange= 0, VrefLevel = 32
3395 13:53:41.496396 TX Bit0 (977~1003) 27 990, Bit8 (968~991) 24 979,
3396 13:53:41.500170 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3397 13:53:41.506835 TX Bit2 (973~997) 25 985, Bit10 (969~990) 22 979,
3398 13:53:41.509971 TX Bit3 (971~996) 26 983, Bit11 (969~992) 24 980,
3399 13:53:41.512828 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
3400 13:53:41.520120 TX Bit5 (977~1001) 25 989, Bit13 (970~991) 22 980,
3401 13:53:41.523227 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
3402 13:53:41.529947 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3403 13:53:41.530500
3404 13:53:41.530844
3405 13:53:41.533458 TX Vref found, early break! 363< 370
3406 13:53:41.536829 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3407 13:53:41.540293 u1DelayCellOfst[0]=8 cells (7 PI)
3408 13:53:41.543184 u1DelayCellOfst[1]=6 cells (5 PI)
3409 13:53:41.546736 u1DelayCellOfst[2]=2 cells (2 PI)
3410 13:53:41.549963 u1DelayCellOfst[3]=0 cells (0 PI)
3411 13:53:41.552888 u1DelayCellOfst[4]=5 cells (4 PI)
3412 13:53:41.553337 u1DelayCellOfst[5]=7 cells (6 PI)
3413 13:53:41.556783 u1DelayCellOfst[6]=7 cells (6 PI)
3414 13:53:41.559613 u1DelayCellOfst[7]=5 cells (4 PI)
3415 13:53:41.562737 Byte0, DQ PI dly=983, DQM PI dly= 986
3416 13:53:41.569701 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3417 13:53:41.570206
3418 13:53:41.572983 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3419 13:53:41.573433
3420 13:53:41.576664 u1DelayCellOfst[8]=2 cells (2 PI)
3421 13:53:41.579747 u1DelayCellOfst[9]=2 cells (2 PI)
3422 13:53:41.582949 u1DelayCellOfst[10]=2 cells (2 PI)
3423 13:53:41.586302 u1DelayCellOfst[11]=3 cells (3 PI)
3424 13:53:41.590088 u1DelayCellOfst[12]=5 cells (4 PI)
3425 13:53:41.590594 u1DelayCellOfst[13]=3 cells (3 PI)
3426 13:53:41.592728 u1DelayCellOfst[14]=3 cells (3 PI)
3427 13:53:41.595850 u1DelayCellOfst[15]=0 cells (0 PI)
3428 13:53:41.599787 Byte1, DQ PI dly=977, DQM PI dly= 979
3429 13:53:41.606053 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3430 13:53:41.606555
3431 13:53:41.609871 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3432 13:53:41.610253
3433 13:53:41.612920 Write Rank1 MR14 =0x18
3434 13:53:41.613348
3435 13:53:41.613646 Final TX Range 0 Vref 24
3436 13:53:41.613918
3437 13:53:41.619916 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3438 13:53:41.620296
3439 13:53:41.626083 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3440 13:53:41.633533 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3441 13:53:41.643297 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3442 13:53:41.643754 Write Rank1 MR3 =0xb0
3443 13:53:41.646589 DramC Write-DBI on
3444 13:53:41.647089 ==
3445 13:53:41.649817 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3446 13:53:41.652662 fsp= 1, odt_onoff= 1, Byte mode= 0
3447 13:53:41.653040 ==
3448 13:53:41.659800 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3449 13:53:41.660300
3450 13:53:41.660627 Begin, DQ Scan Range 699~763
3451 13:53:41.660930
3452 13:53:41.662541
3453 13:53:41.663032 TX Vref Scan disable
3454 13:53:41.666336 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3455 13:53:41.669532 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3456 13:53:41.672904 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3457 13:53:41.676548 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3458 13:53:41.680018 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3459 13:53:41.682668 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3460 13:53:41.685939 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3461 13:53:41.690012 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3462 13:53:41.696209 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3463 13:53:41.699628 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3464 13:53:41.703398 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3465 13:53:41.706393 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3466 13:53:41.709511 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3467 13:53:41.712697 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3468 13:53:41.716446 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3469 13:53:41.719563 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3470 13:53:41.723231 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3471 13:53:41.726533 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3472 13:53:41.729485 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3473 13:53:41.733036 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3474 13:53:41.740775 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3475 13:53:41.744428 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3476 13:53:41.747454 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3477 13:53:41.751100 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3478 13:53:41.753869 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3479 13:53:41.757482 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3480 13:53:41.760809 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3481 13:53:41.764105 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3482 13:53:41.767368 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3483 13:53:41.771165 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
3484 13:53:41.774416 Byte0, DQ PI dly=731, DQM PI dly= 731
3485 13:53:41.777993 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
3486 13:53:41.778509
3487 13:53:41.784309 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
3488 13:53:41.784825
3489 13:53:41.787817 Byte1, DQ PI dly=723, DQM PI dly= 723
3490 13:53:41.791443 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3491 13:53:41.791939
3492 13:53:41.794201 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3493 13:53:41.794628
3494 13:53:41.801303 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3495 13:53:41.807613 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3496 13:53:41.817664 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3497 13:53:41.818158 Write Rank1 MR3 =0x30
3498 13:53:41.820816 DramC Write-DBI off
3499 13:53:41.821271
3500 13:53:41.821603 [DATLAT]
3501 13:53:41.824606 Freq=1600, CH1 RK1, use_rxtx_scan=0
3502 13:53:41.825238
3503 13:53:41.827903 DATLAT Default: 0x10
3504 13:53:41.828316 7, 0xFFFF, sum=0
3505 13:53:41.828647 8, 0xFFFF, sum=0
3506 13:53:41.831071 9, 0xFFFF, sum=0
3507 13:53:41.831501 10, 0xFFFF, sum=0
3508 13:53:41.834155 11, 0xFFFF, sum=0
3509 13:53:41.834593 12, 0xFFFF, sum=0
3510 13:53:41.837708 13, 0xFFFF, sum=0
3511 13:53:41.838098 14, 0x0, sum=1
3512 13:53:41.840808 15, 0x0, sum=2
3513 13:53:41.841253 16, 0x0, sum=3
3514 13:53:41.844397 17, 0x0, sum=4
3515 13:53:41.847605 pattern=2 first_step=14 total pass=5 best_step=16
3516 13:53:41.847996 ==
3517 13:53:41.851169 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3518 13:53:41.854613 fsp= 1, odt_onoff= 1, Byte mode= 0
3519 13:53:41.854989 ==
3520 13:53:41.861448 Start DQ dly to find pass range UseTestEngine =1
3521 13:53:41.864320 x-axis: bit #, y-axis: DQ dly (-127~63)
3522 13:53:41.864703 RX Vref Scan = 0
3523 13:53:41.867625 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3524 13:53:41.871466 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3525 13:53:41.874249 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3526 13:53:41.877764 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3527 13:53:41.881043 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3528 13:53:41.884970 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3529 13:53:41.885511 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3530 13:53:41.887589 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3531 13:53:41.891076 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3532 13:53:41.894533 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3533 13:53:41.897829 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3534 13:53:41.900956 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3535 13:53:41.904300 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3536 13:53:41.907863 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3537 13:53:41.908334 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3538 13:53:41.911111 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3539 13:53:41.914267 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3540 13:53:41.917851 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3541 13:53:41.921047 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3542 13:53:41.924696 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3543 13:53:41.927884 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3544 13:53:41.928286 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3545 13:53:41.931284 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3546 13:53:41.934630 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3547 13:53:41.938052 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3548 13:53:41.941487 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3549 13:53:41.944788 0, [0] xxooxxxx xxxxxxxo [MSB]
3550 13:53:41.948090 1, [0] xxoooxxo xxxxxxxo [MSB]
3551 13:53:41.948482 2, [0] xxoooxxo oooxxxxo [MSB]
3552 13:53:41.951530 3, [0] xxoooxxo ooooxooo [MSB]
3553 13:53:41.954362 4, [0] xxoooxxo oooooooo [MSB]
3554 13:53:41.957725 5, [0] xoooooxo oooooooo [MSB]
3555 13:53:41.961244 6, [0] xoooooxo oooooooo [MSB]
3556 13:53:41.963995 34, [0] oooxoooo oooooooo [MSB]
3557 13:53:41.967719 35, [0] ooxxoooo ooooooox [MSB]
3558 13:53:41.971173 36, [0] ooxxoooo ooooooox [MSB]
3559 13:53:41.974579 37, [0] ooxxxoox ooxooxxx [MSB]
3560 13:53:41.977878 38, [0] ooxxxoox xxxooxxx [MSB]
3561 13:53:41.980967 39, [0] ooxxxoox xxxxoxxx [MSB]
3562 13:53:41.981409 40, [0] ooxxxoox xxxxxxxx [MSB]
3563 13:53:41.984509 41, [0] oxxxxoox xxxxxxxx [MSB]
3564 13:53:41.987723 42, [0] oxxxxxox xxxxxxxx [MSB]
3565 13:53:41.991133 43, [0] xxxxxxxx xxxxxxxx [MSB]
3566 13:53:41.994457 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3567 13:53:41.997408 iDelay=43, Bit 1, Center 22 (5 ~ 40) 36
3568 13:53:42.001115 iDelay=43, Bit 2, Center 17 (0 ~ 34) 35
3569 13:53:42.004160 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
3570 13:53:42.007593 iDelay=43, Bit 4, Center 18 (1 ~ 36) 36
3571 13:53:42.010875 iDelay=43, Bit 5, Center 23 (5 ~ 41) 37
3572 13:53:42.014261 iDelay=43, Bit 6, Center 24 (7 ~ 42) 36
3573 13:53:42.021241 iDelay=43, Bit 7, Center 18 (1 ~ 36) 36
3574 13:53:42.024063 iDelay=43, Bit 8, Center 19 (2 ~ 37) 36
3575 13:53:42.027349 iDelay=43, Bit 9, Center 19 (2 ~ 37) 36
3576 13:53:42.031173 iDelay=43, Bit 10, Center 19 (2 ~ 36) 35
3577 13:53:42.033890 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
3578 13:53:42.037701 iDelay=43, Bit 12, Center 21 (4 ~ 39) 36
3579 13:53:42.040963 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
3580 13:53:42.044457 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
3581 13:53:42.047341 iDelay=43, Bit 15, Center 17 (0 ~ 34) 35
3582 13:53:42.047762 ==
3583 13:53:42.054063 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3584 13:53:42.057688 fsp= 1, odt_onoff= 1, Byte mode= 0
3585 13:53:42.058192 ==
3586 13:53:42.058523 DQS Delay:
3587 13:53:42.060957 DQS0 = 0, DQS1 = 0
3588 13:53:42.061691 DQM Delay:
3589 13:53:42.064720 DQM0 = 20, DQM1 = 19
3590 13:53:42.065169 DQ Delay:
3591 13:53:42.067116 DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15
3592 13:53:42.070929 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =18
3593 13:53:42.074097 DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =20
3594 13:53:42.077620 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
3595 13:53:42.078079
3596 13:53:42.078395
3597 13:53:42.078889
3598 13:53:42.080629 [DramC_TX_OE_Calibration] TA2
3599 13:53:42.083823 Original DQ_B0 (3 6) =30, OEN = 27
3600 13:53:42.084205 Original DQ_B1 (3 6) =30, OEN = 27
3601 13:53:42.087259 23, 0x0, End_B0=23 End_B1=23
3602 13:53:42.090725 24, 0x0, End_B0=24 End_B1=24
3603 13:53:42.094412 25, 0x0, End_B0=25 End_B1=25
3604 13:53:42.097461 26, 0x0, End_B0=26 End_B1=26
3605 13:53:42.097850 27, 0x0, End_B0=27 End_B1=27
3606 13:53:42.100731 28, 0x0, End_B0=28 End_B1=28
3607 13:53:42.104428 29, 0x0, End_B0=29 End_B1=29
3608 13:53:42.107781 30, 0x0, End_B0=30 End_B1=30
3609 13:53:42.110510 31, 0xFFFF, End_B0=30 End_B1=30
3610 13:53:42.114109 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3611 13:53:42.120737 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3612 13:53:42.121267
3613 13:53:42.121793
3614 13:53:42.124517 Write Rank1 MR23 =0x3f
3615 13:53:42.125013 [DQSOSC]
3616 13:53:42.130356 [DQSOSCAuto] RK1, (LSB)MR18= 0xb1, (MSB)MR19= 0x3, tDQSOscB0 = 333 ps tDQSOscB1 = 0 ps
3617 13:53:42.137674 CH1_RK1: MR19=0x3, MR18=0xB1, DQSOSC=333, MR23=63, INC=22, DEC=33
3618 13:53:42.138141 Write Rank1 MR23 =0x3f
3619 13:53:42.141047 [DQSOSC]
3620 13:53:42.147384 [DQSOSCAuto] RK1, (LSB)MR18= 0xb0, (MSB)MR19= 0x3, tDQSOscB0 = 333 ps tDQSOscB1 = 0 ps
3621 13:53:42.150702 CH1 RK1: MR19=3, MR18=B0
3622 13:53:42.153806 [RxdqsGatingPostProcess] freq 1600
3623 13:53:42.157361 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3624 13:53:42.160915 Rank: 0
3625 13:53:42.161469 best DQS0 dly(2T, 0.5T) = (2, 5)
3626 13:53:42.163551 best DQS1 dly(2T, 0.5T) = (2, 5)
3627 13:53:42.166928 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3628 13:53:42.170568 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3629 13:53:42.171035 Rank: 1
3630 13:53:42.173887 best DQS0 dly(2T, 0.5T) = (2, 5)
3631 13:53:42.177652 best DQS1 dly(2T, 0.5T) = (2, 5)
3632 13:53:42.180706 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3633 13:53:42.183624 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3634 13:53:42.190771 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3635 13:53:42.193893 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3636 13:53:42.197018 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3637 13:53:42.197441
3638 13:53:42.197738
3639 13:53:42.200687 [Calibration Summary] Freqency 1600
3640 13:53:42.201181 CH 0, Rank 0
3641 13:53:42.204165 All Pass.
3642 13:53:42.204619
3643 13:53:42.204914 CH 0, Rank 1
3644 13:53:42.205235 All Pass.
3645 13:53:42.205624
3646 13:53:42.207489 CH 1, Rank 0
3647 13:53:42.207965 All Pass.
3648 13:53:42.208267
3649 13:53:42.210578 CH 1, Rank 1
3650 13:53:42.210959 All Pass.
3651 13:53:42.211255
3652 13:53:42.217329 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3653 13:53:42.223768 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3654 13:53:42.230304 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3655 13:53:42.233693 Write Rank0 MR3 =0xb0
3656 13:53:42.240893 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3657 13:53:42.246832 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3658 13:53:42.253590 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3659 13:53:42.254060 Write Rank1 MR3 =0xb0
3660 13:53:42.260665 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3661 13:53:42.267236 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3662 13:53:42.277551 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3663 13:53:42.278060 Write Rank0 MR3 =0xb0
3664 13:53:42.283996 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3665 13:53:42.290692 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3666 13:53:42.296708 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3667 13:53:42.300327 Write Rank1 MR3 =0xb0
3668 13:53:42.300707 DramC Write-DBI on
3669 13:53:42.303154 [GetDramInforAfterCalByMRR] Vendor 1.
3670 13:53:42.310035 [GetDramInforAfterCalByMRR] Revision 7.
3671 13:53:42.310496 MR8 12
3672 13:53:42.313879 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3673 13:53:42.314345 MR8 12
3674 13:53:42.320031 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3675 13:53:42.320470 MR8 12
3676 13:53:42.326788 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3677 13:53:42.327171 MR8 12
3678 13:53:42.330113 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3679 13:53:42.340463 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3680 13:53:42.340926 Write Rank0 MR13 =0xd0
3681 13:53:42.343624 Write Rank1 MR13 =0xd0
3682 13:53:42.346972 Write Rank0 MR13 =0xd0
3683 13:53:42.347448 Write Rank1 MR13 =0xd0
3684 13:53:42.350200 Save calibration result to emmc
3685 13:53:42.350577
3686 13:53:42.350921
3687 13:53:42.353388 [DramcModeReg_Check] Freq_1600, FSP_1
3688 13:53:42.356681 FSP_1, CH_0, RK0
3689 13:53:42.357062 Write Rank0 MR13 =0xd8
3690 13:53:42.360652 MR12 = 0x56 (global = 0x56) match
3691 13:53:42.363378 MR14 = 0x18 (global = 0x18) match
3692 13:53:42.366715 FSP_1, CH_0, RK1
3693 13:53:42.367100 Write Rank1 MR13 =0xd8
3694 13:53:42.370040 MR12 = 0x56 (global = 0x56) match
3695 13:53:42.373299 MR14 = 0x16 (global = 0x16) match
3696 13:53:42.376720 FSP_1, CH_1, RK0
3697 13:53:42.377222 Write Rank0 MR13 =0xd8
3698 13:53:42.379740 MR12 = 0x56 (global = 0x56) match
3699 13:53:42.383432 MR14 = 0x1a (global = 0x1a) match
3700 13:53:42.386626 FSP_1, CH_1, RK1
3701 13:53:42.387093 Write Rank1 MR13 =0xd8
3702 13:53:42.389778 MR12 = 0x56 (global = 0x56) match
3703 13:53:42.393293 MR14 = 0x18 (global = 0x18) match
3704 13:53:42.393674
3705 13:53:42.399989 [MEM_TEST] 02: After DFS, before run time config
3706 13:53:42.409948 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3707 13:53:42.410404
3708 13:53:42.410703 [TA2_TEST]
3709 13:53:42.410977 === TA2 HW
3710 13:53:42.412872 TA2 PAT: XTALK
3711 13:53:42.416534 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3712 13:53:42.422887 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3713 13:53:42.426269 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3714 13:53:42.429712 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3715 13:53:42.432940
3716 13:53:42.433436
3717 13:53:42.433737 Settings after calibration
3718 13:53:42.434013
3719 13:53:42.436215 [DramcRunTimeConfig]
3720 13:53:42.440062 TransferPLLToSPMControl - MODE SW PHYPLL
3721 13:53:42.440534 TX_TRACKING: ON
3722 13:53:42.443176 RX_TRACKING: ON
3723 13:53:42.443659 HW_GATING: ON
3724 13:53:42.446412 HW_GATING DBG: OFF
3725 13:53:42.446789 ddr_geometry:1
3726 13:53:42.450090 ddr_geometry:1
3727 13:53:42.450550 ddr_geometry:1
3728 13:53:42.450848 ddr_geometry:1
3729 13:53:42.453665 ddr_geometry:1
3730 13:53:42.454129 ddr_geometry:1
3731 13:53:42.456521 ddr_geometry:1
3732 13:53:42.456898 ddr_geometry:1
3733 13:53:42.460167 High Freq DUMMY_READ_FOR_TRACKING: ON
3734 13:53:42.463061 ZQCS_ENABLE_LP4: OFF
3735 13:53:42.466253 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3736 13:53:42.466635 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3737 13:53:42.469964 SPM_CONTROL_AFTERK: ON
3738 13:53:42.473787 IMPEDANCE_TRACKING: ON
3739 13:53:42.474250 TEMP_SENSOR: ON
3740 13:53:42.476522 PER_BANK_REFRESH: ON
3741 13:53:42.476983 HW_SAVE_FOR_SR: ON
3742 13:53:42.480043 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3743 13:53:42.483142 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3744 13:53:42.486587 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3745 13:53:42.490008 Read ODT Tracking: ON
3746 13:53:42.492989 =========================
3747 13:53:42.493484
3748 13:53:42.493784 [TA2_TEST]
3749 13:53:42.494057 === TA2 HW
3750 13:53:42.499722 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3751 13:53:42.503566 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3752 13:53:42.510217 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3753 13:53:42.513341 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3754 13:53:42.513719
3755 13:53:42.516094 [MEM_TEST] 03: After run time config
3756 13:53:42.527363 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3757 13:53:42.531111 [complex_mem_test] start addr:0x40024000, len:131072
3758 13:53:42.735317 1st complex R/W mem test pass
3759 13:53:42.741880 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3760 13:53:42.745528 sync preloader write leveling
3761 13:53:42.748813 sync preloader cbt_mr12
3762 13:53:42.749352 sync preloader cbt_clk_dly
3763 13:53:42.752298 sync preloader cbt_cmd_dly
3764 13:53:42.755244 sync preloader cbt_cs
3765 13:53:42.758848 sync preloader cbt_ca_perbit_delay
3766 13:53:42.759344 sync preloader clk_delay
3767 13:53:42.762453 sync preloader dqs_delay
3768 13:53:42.765251 sync preloader u1Gating2T_Save
3769 13:53:42.768735 sync preloader u1Gating05T_Save
3770 13:53:42.772139 sync preloader u1Gatingfine_tune_Save
3771 13:53:42.775377 sync preloader u1Gatingucpass_count_Save
3772 13:53:42.778667 sync preloader u1TxWindowPerbitVref_Save
3773 13:53:42.782081 sync preloader u1TxCenter_min_Save
3774 13:53:42.785488 sync preloader u1TxCenter_max_Save
3775 13:53:42.788678 sync preloader u1Txwin_center_Save
3776 13:53:42.791928 sync preloader u1Txfirst_pass_Save
3777 13:53:42.795464 sync preloader u1Txlast_pass_Save
3778 13:53:42.795978 sync preloader u1RxDatlat_Save
3779 13:53:42.799172 sync preloader u1RxWinPerbitVref_Save
3780 13:53:42.805331 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3781 13:53:42.808499 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3782 13:53:42.812158 sync preloader delay_cell_unit
3783 13:53:42.818290 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3784 13:53:42.821866 sync preloader write leveling
3785 13:53:42.822244 sync preloader cbt_mr12
3786 13:53:42.825730 sync preloader cbt_clk_dly
3787 13:53:42.828554 sync preloader cbt_cmd_dly
3788 13:53:42.828931 sync preloader cbt_cs
3789 13:53:42.831872 sync preloader cbt_ca_perbit_delay
3790 13:53:42.835668 sync preloader clk_delay
3791 13:53:42.838716 sync preloader dqs_delay
3792 13:53:42.839172 sync preloader u1Gating2T_Save
3793 13:53:42.842264 sync preloader u1Gating05T_Save
3794 13:53:42.845504 sync preloader u1Gatingfine_tune_Save
3795 13:53:42.848755 sync preloader u1Gatingucpass_count_Save
3796 13:53:42.852116 sync preloader u1TxWindowPerbitVref_Save
3797 13:53:42.855354 sync preloader u1TxCenter_min_Save
3798 13:53:42.859114 sync preloader u1TxCenter_max_Save
3799 13:53:42.862320 sync preloader u1Txwin_center_Save
3800 13:53:42.865006 sync preloader u1Txfirst_pass_Save
3801 13:53:42.868995 sync preloader u1Txlast_pass_Save
3802 13:53:42.872048 sync preloader u1RxDatlat_Save
3803 13:53:42.875722 sync preloader u1RxWinPerbitVref_Save
3804 13:53:42.878707 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3805 13:53:42.882343 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3806 13:53:42.885788 sync preloader delay_cell_unit
3807 13:53:42.892402 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3808 13:53:42.896040 sync preloader write leveling
3809 13:53:42.899466 sync preloader cbt_mr12
3810 13:53:42.900068 sync preloader cbt_clk_dly
3811 13:53:42.902081 sync preloader cbt_cmd_dly
3812 13:53:42.905316 sync preloader cbt_cs
3813 13:53:42.905923 sync preloader cbt_ca_perbit_delay
3814 13:53:42.908790 sync preloader clk_delay
3815 13:53:42.912096 sync preloader dqs_delay
3816 13:53:42.915405 sync preloader u1Gating2T_Save
3817 13:53:42.918550 sync preloader u1Gating05T_Save
3818 13:53:42.921883 sync preloader u1Gatingfine_tune_Save
3819 13:53:42.925354 sync preloader u1Gatingucpass_count_Save
3820 13:53:42.928667 sync preloader u1TxWindowPerbitVref_Save
3821 13:53:42.931981 sync preloader u1TxCenter_min_Save
3822 13:53:42.935386 sync preloader u1TxCenter_max_Save
3823 13:53:42.938552 sync preloader u1Txwin_center_Save
3824 13:53:42.939013 sync preloader u1Txfirst_pass_Save
3825 13:53:42.942095 sync preloader u1Txlast_pass_Save
3826 13:53:42.945567 sync preloader u1RxDatlat_Save
3827 13:53:42.948523 sync preloader u1RxWinPerbitVref_Save
3828 13:53:42.952330 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3829 13:53:42.958348 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3830 13:53:42.962059 sync preloader delay_cell_unit
3831 13:53:42.965689 just_for_test_dump_coreboot_params dump all params
3832 13:53:42.966154 dump source = 0x0
3833 13:53:42.968440 dump params frequency:1600
3834 13:53:42.972130 dump params rank number:2
3835 13:53:42.972515
3836 13:53:42.975806 dump params write leveling
3837 13:53:42.976263 write leveling[0][0][0] = 0x21
3838 13:53:42.978586 write leveling[0][0][1] = 0x1d
3839 13:53:42.981920 write leveling[0][1][0] = 0x22
3840 13:53:42.985404 write leveling[0][1][1] = 0x1e
3841 13:53:42.988413 write leveling[1][0][0] = 0x23
3842 13:53:42.991937 write leveling[1][0][1] = 0x1f
3843 13:53:42.992417 write leveling[1][1][0] = 0x24
3844 13:53:42.995225 write leveling[1][1][1] = 0x20
3845 13:53:42.998817 dump params cbt_cs
3846 13:53:42.999202 cbt_cs[0][0] = 0xa
3847 13:53:43.001801 cbt_cs[0][1] = 0xa
3848 13:53:43.002184 cbt_cs[1][0] = 0xa
3849 13:53:43.005249 cbt_cs[1][1] = 0xa
3850 13:53:43.005634 dump params cbt_mr12
3851 13:53:43.008903 cbt_mr12[0][0] = 0x16
3852 13:53:43.011839 cbt_mr12[0][1] = 0x16
3853 13:53:43.012297 cbt_mr12[1][0] = 0x16
3854 13:53:43.015352 cbt_mr12[1][1] = 0x16
3855 13:53:43.015807 dump params tx window
3856 13:53:43.018576 tx_center_min[0][0][0] = 980
3857 13:53:43.021975 tx_center_max[0][0][0] = 987
3858 13:53:43.025498 tx_center_min[0][0][1] = 974
3859 13:53:43.028451 tx_center_max[0][0][1] = 980
3860 13:53:43.028915 tx_center_min[0][1][0] = 981
3861 13:53:43.031918 tx_center_max[0][1][0] = 989
3862 13:53:43.035425 tx_center_min[0][1][1] = 978
3863 13:53:43.038860 tx_center_max[0][1][1] = 982
3864 13:53:43.039315 tx_center_min[1][0][0] = 982
3865 13:53:43.041648 tx_center_max[1][0][0] = 989
3866 13:53:43.045068 tx_center_min[1][0][1] = 975
3867 13:53:43.048439 tx_center_max[1][0][1] = 980
3868 13:53:43.051577 tx_center_min[1][1][0] = 983
3869 13:53:43.052086 tx_center_max[1][1][0] = 990
3870 13:53:43.054834 tx_center_min[1][1][1] = 977
3871 13:53:43.058680 tx_center_max[1][1][1] = 981
3872 13:53:43.061959 dump params tx window
3873 13:53:43.062418 tx_win_center[0][0][0] = 987
3874 13:53:43.065349 tx_first_pass[0][0][0] = 975
3875 13:53:43.068637 tx_last_pass[0][0][0] = 999
3876 13:53:43.071693 tx_win_center[0][0][1] = 986
3877 13:53:43.072158 tx_first_pass[0][0][1] = 974
3878 13:53:43.075460 tx_last_pass[0][0][1] = 998
3879 13:53:43.078376 tx_win_center[0][0][2] = 985
3880 13:53:43.081812 tx_first_pass[0][0][2] = 974
3881 13:53:43.085431 tx_last_pass[0][0][2] = 997
3882 13:53:43.085818 tx_win_center[0][0][3] = 980
3883 13:53:43.088351 tx_first_pass[0][0][3] = 968
3884 13:53:43.092052 tx_last_pass[0][0][3] = 992
3885 13:53:43.095228 tx_win_center[0][0][4] = 985
3886 13:53:43.095615 tx_first_pass[0][0][4] = 973
3887 13:53:43.098546 tx_last_pass[0][0][4] = 998
3888 13:53:43.101897 tx_win_center[0][0][5] = 980
3889 13:53:43.105303 tx_first_pass[0][0][5] = 969
3890 13:53:43.105686 tx_last_pass[0][0][5] = 992
3891 13:53:43.108394 tx_win_center[0][0][6] = 981
3892 13:53:43.112178 tx_first_pass[0][0][6] = 969
3893 13:53:43.115782 tx_last_pass[0][0][6] = 993
3894 13:53:43.118502 tx_win_center[0][0][7] = 983
3895 13:53:43.118963 tx_first_pass[0][0][7] = 971
3896 13:53:43.121803 tx_last_pass[0][0][7] = 995
3897 13:53:43.125175 tx_win_center[0][0][8] = 974
3898 13:53:43.128641 tx_first_pass[0][0][8] = 962
3899 13:53:43.129110 tx_last_pass[0][0][8] = 987
3900 13:53:43.131964 tx_win_center[0][0][9] = 976
3901 13:53:43.135043 tx_first_pass[0][0][9] = 964
3902 13:53:43.138668 tx_last_pass[0][0][9] = 989
3903 13:53:43.141948 tx_win_center[0][0][10] = 980
3904 13:53:43.142334 tx_first_pass[0][0][10] = 968
3905 13:53:43.145100 tx_last_pass[0][0][10] = 992
3906 13:53:43.149112 tx_win_center[0][0][11] = 975
3907 13:53:43.151920 tx_first_pass[0][0][11] = 962
3908 13:53:43.155387 tx_last_pass[0][0][11] = 988
3909 13:53:43.155855 tx_win_center[0][0][12] = 976
3910 13:53:43.158124 tx_first_pass[0][0][12] = 963
3911 13:53:43.162058 tx_last_pass[0][0][12] = 990
3912 13:53:43.165049 tx_win_center[0][0][13] = 975
3913 13:53:43.168873 tx_first_pass[0][0][13] = 962
3914 13:53:43.169283 tx_last_pass[0][0][13] = 988
3915 13:53:43.171671 tx_win_center[0][0][14] = 977
3916 13:53:43.174904 tx_first_pass[0][0][14] = 965
3917 13:53:43.178688 tx_last_pass[0][0][14] = 989
3918 13:53:43.181710 tx_win_center[0][0][15] = 979
3919 13:53:43.182099 tx_first_pass[0][0][15] = 967
3920 13:53:43.185044 tx_last_pass[0][0][15] = 991
3921 13:53:43.188422 tx_win_center[0][1][0] = 989
3922 13:53:43.191973 tx_first_pass[0][1][0] = 977
3923 13:53:43.195770 tx_last_pass[0][1][0] = 1002
3924 13:53:43.196232 tx_win_center[0][1][1] = 988
3925 13:53:43.198127 tx_first_pass[0][1][1] = 976
3926 13:53:43.201983 tx_last_pass[0][1][1] = 1000
3927 13:53:43.204716 tx_win_center[0][1][2] = 988
3928 13:53:43.208559 tx_first_pass[0][1][2] = 976
3929 13:53:43.209022 tx_last_pass[0][1][2] = 1000
3930 13:53:43.211741 tx_win_center[0][1][3] = 981
3931 13:53:43.214980 tx_first_pass[0][1][3] = 969
3932 13:53:43.218688 tx_last_pass[0][1][3] = 994
3933 13:53:43.219328 tx_win_center[0][1][4] = 988
3934 13:53:43.221606 tx_first_pass[0][1][4] = 977
3935 13:53:43.225080 tx_last_pass[0][1][4] = 1000
3936 13:53:43.228147 tx_win_center[0][1][5] = 982
3937 13:53:43.232026 tx_first_pass[0][1][5] = 971
3938 13:53:43.232410 tx_last_pass[0][1][5] = 994
3939 13:53:43.235234 tx_win_center[0][1][6] = 984
3940 13:53:43.238305 tx_first_pass[0][1][6] = 971
3941 13:53:43.241530 tx_last_pass[0][1][6] = 998
3942 13:53:43.241909 tx_win_center[0][1][7] = 986
3943 13:53:43.245039 tx_first_pass[0][1][7] = 975
3944 13:53:43.248822 tx_last_pass[0][1][7] = 998
3945 13:53:43.251787 tx_win_center[0][1][8] = 979
3946 13:53:43.255243 tx_first_pass[0][1][8] = 967
3947 13:53:43.255701 tx_last_pass[0][1][8] = 991
3948 13:53:43.258108 tx_win_center[0][1][9] = 979
3949 13:53:43.261456 tx_first_pass[0][1][9] = 968
3950 13:53:43.265115 tx_last_pass[0][1][9] = 991
3951 13:53:43.265609 tx_win_center[0][1][10] = 982
3952 13:53:43.268192 tx_first_pass[0][1][10] = 970
3953 13:53:43.272007 tx_last_pass[0][1][10] = 994
3954 13:53:43.275326 tx_win_center[0][1][11] = 978
3955 13:53:43.278805 tx_first_pass[0][1][11] = 966
3956 13:53:43.279403 tx_last_pass[0][1][11] = 991
3957 13:53:43.281454 tx_win_center[0][1][12] = 979
3958 13:53:43.285018 tx_first_pass[0][1][12] = 967
3959 13:53:43.288772 tx_last_pass[0][1][12] = 991
3960 13:53:43.292079 tx_win_center[0][1][13] = 978
3961 13:53:43.292539 tx_first_pass[0][1][13] = 966
3962 13:53:43.295375 tx_last_pass[0][1][13] = 990
3963 13:53:43.298349 tx_win_center[0][1][14] = 979
3964 13:53:43.301662 tx_first_pass[0][1][14] = 967
3965 13:53:43.305073 tx_last_pass[0][1][14] = 991
3966 13:53:43.305494 tx_win_center[0][1][15] = 980
3967 13:53:43.308059 tx_first_pass[0][1][15] = 969
3968 13:53:43.311478 tx_last_pass[0][1][15] = 992
3969 13:53:43.315422 tx_win_center[1][0][0] = 988
3970 13:53:43.318678 tx_first_pass[1][0][0] = 976
3971 13:53:43.319141 tx_last_pass[1][0][0] = 1001
3972 13:53:43.322021 tx_win_center[1][0][1] = 987
3973 13:53:43.324872 tx_first_pass[1][0][1] = 975
3974 13:53:43.328601 tx_last_pass[1][0][1] = 999
3975 13:53:43.331501 tx_win_center[1][0][2] = 984
3976 13:53:43.331995 tx_first_pass[1][0][2] = 972
3977 13:53:43.335028 tx_last_pass[1][0][2] = 996
3978 13:53:43.338063 tx_win_center[1][0][3] = 982
3979 13:53:43.341512 tx_first_pass[1][0][3] = 970
3980 13:53:43.341893 tx_last_pass[1][0][3] = 994
3981 13:53:43.345242 tx_win_center[1][0][4] = 986
3982 13:53:43.348502 tx_first_pass[1][0][4] = 974
3983 13:53:43.352013 tx_last_pass[1][0][4] = 998
3984 13:53:43.354643 tx_win_center[1][0][5] = 988
3985 13:53:43.355029 tx_first_pass[1][0][5] = 976
3986 13:53:43.358092 tx_last_pass[1][0][5] = 1000
3987 13:53:43.361831 tx_win_center[1][0][6] = 989
3988 13:53:43.364942 tx_first_pass[1][0][6] = 977
3989 13:53:43.365426 tx_last_pass[1][0][6] = 1001
3990 13:53:43.368336 tx_win_center[1][0][7] = 986
3991 13:53:43.371632 tx_first_pass[1][0][7] = 974
3992 13:53:43.375268 tx_last_pass[1][0][7] = 998
3993 13:53:43.378801 tx_win_center[1][0][8] = 979
3994 13:53:43.379258 tx_first_pass[1][0][8] = 967
3995 13:53:43.381589 tx_last_pass[1][0][8] = 991
3996 13:53:43.385048 tx_win_center[1][0][9] = 978
3997 13:53:43.388615 tx_first_pass[1][0][9] = 966
3998 13:53:43.389067 tx_last_pass[1][0][9] = 990
3999 13:53:43.391772 tx_win_center[1][0][10] = 979
4000 13:53:43.395081 tx_first_pass[1][0][10] = 967
4001 13:53:43.398066 tx_last_pass[1][0][10] = 991
4002 13:53:43.401889 tx_win_center[1][0][11] = 980
4003 13:53:43.402403 tx_first_pass[1][0][11] = 968
4004 13:53:43.404697 tx_last_pass[1][0][11] = 992
4005 13:53:43.408362 tx_win_center[1][0][12] = 980
4006 13:53:43.411977 tx_first_pass[1][0][12] = 968
4007 13:53:43.415165 tx_last_pass[1][0][12] = 992
4008 13:53:43.415623 tx_win_center[1][0][13] = 979
4009 13:53:43.418540 tx_first_pass[1][0][13] = 968
4010 13:53:43.421960 tx_last_pass[1][0][13] = 991
4011 13:53:43.424654 tx_win_center[1][0][14] = 979
4012 13:53:43.428234 tx_first_pass[1][0][14] = 968
4013 13:53:43.428617 tx_last_pass[1][0][14] = 990
4014 13:53:43.431495 tx_win_center[1][0][15] = 975
4015 13:53:43.434653 tx_first_pass[1][0][15] = 963
4016 13:53:43.438236 tx_last_pass[1][0][15] = 987
4017 13:53:43.441344 tx_win_center[1][1][0] = 990
4018 13:53:43.441726 tx_first_pass[1][1][0] = 977
4019 13:53:43.444485 tx_last_pass[1][1][0] = 1003
4020 13:53:43.448727 tx_win_center[1][1][1] = 988
4021 13:53:43.451165 tx_first_pass[1][1][1] = 977
4022 13:53:43.454605 tx_last_pass[1][1][1] = 1000
4023 13:53:43.454989 tx_win_center[1][1][2] = 985
4024 13:53:43.457643 tx_first_pass[1][1][2] = 973
4025 13:53:43.461468 tx_last_pass[1][1][2] = 997
4026 13:53:43.464903 tx_win_center[1][1][3] = 983
4027 13:53:43.468512 tx_first_pass[1][1][3] = 971
4028 13:53:43.468983 tx_last_pass[1][1][3] = 996
4029 13:53:43.471174 tx_win_center[1][1][4] = 987
4030 13:53:43.474750 tx_first_pass[1][1][4] = 975
4031 13:53:43.477726 tx_last_pass[1][1][4] = 999
4032 13:53:43.478109 tx_win_center[1][1][5] = 989
4033 13:53:43.481206 tx_first_pass[1][1][5] = 977
4034 13:53:43.484873 tx_last_pass[1][1][5] = 1001
4035 13:53:43.488023 tx_win_center[1][1][6] = 989
4036 13:53:43.491814 tx_first_pass[1][1][6] = 977
4037 13:53:43.492312 tx_last_pass[1][1][6] = 1002
4038 13:53:43.494801 tx_win_center[1][1][7] = 987
4039 13:53:43.497771 tx_first_pass[1][1][7] = 976
4040 13:53:43.501507 tx_last_pass[1][1][7] = 998
4041 13:53:43.501979 tx_win_center[1][1][8] = 979
4042 13:53:43.504904 tx_first_pass[1][1][8] = 968
4043 13:53:43.508002 tx_last_pass[1][1][8] = 991
4044 13:53:43.511353 tx_win_center[1][1][9] = 979
4045 13:53:43.514514 tx_first_pass[1][1][9] = 968
4046 13:53:43.514983 tx_last_pass[1][1][9] = 991
4047 13:53:43.517607 tx_win_center[1][1][10] = 979
4048 13:53:43.521093 tx_first_pass[1][1][10] = 969
4049 13:53:43.524369 tx_last_pass[1][1][10] = 990
4050 13:53:43.527558 tx_win_center[1][1][11] = 980
4051 13:53:43.527955 tx_first_pass[1][1][11] = 969
4052 13:53:43.530787 tx_last_pass[1][1][11] = 992
4053 13:53:43.534453 tx_win_center[1][1][12] = 981
4054 13:53:43.538065 tx_first_pass[1][1][12] = 969
4055 13:53:43.541332 tx_last_pass[1][1][12] = 993
4056 13:53:43.541789 tx_win_center[1][1][13] = 980
4057 13:53:43.544891 tx_first_pass[1][1][13] = 970
4058 13:53:43.548489 tx_last_pass[1][1][13] = 991
4059 13:53:43.551217 tx_win_center[1][1][14] = 980
4060 13:53:43.554830 tx_first_pass[1][1][14] = 969
4061 13:53:43.555216 tx_last_pass[1][1][14] = 992
4062 13:53:43.557930 tx_win_center[1][1][15] = 977
4063 13:53:43.561630 tx_first_pass[1][1][15] = 966
4064 13:53:43.564533 tx_last_pass[1][1][15] = 989
4065 13:53:43.564990 dump params rx window
4066 13:53:43.567895 rx_firspass[0][0][0] = 9
4067 13:53:43.571590 rx_lastpass[0][0][0] = 42
4068 13:53:43.572055 rx_firspass[0][0][1] = 8
4069 13:53:43.574859 rx_lastpass[0][0][1] = 40
4070 13:53:43.578411 rx_firspass[0][0][2] = 9
4071 13:53:43.581333 rx_lastpass[0][0][2] = 39
4072 13:53:43.581793 rx_firspass[0][0][3] = -1
4073 13:53:43.584874 rx_lastpass[0][0][3] = 31
4074 13:53:43.588423 rx_firspass[0][0][4] = 7
4075 13:53:43.588936 rx_lastpass[0][0][4] = 39
4076 13:53:43.591824 rx_firspass[0][0][5] = 3
4077 13:53:43.594795 rx_lastpass[0][0][5] = 29
4078 13:53:43.595293 rx_firspass[0][0][6] = 2
4079 13:53:43.598220 rx_lastpass[0][0][6] = 32
4080 13:53:43.601594 rx_firspass[0][0][7] = 4
4081 13:53:43.604509 rx_lastpass[0][0][7] = 34
4082 13:53:43.604933 rx_firspass[0][0][8] = 3
4083 13:53:43.608212 rx_lastpass[0][0][8] = 34
4084 13:53:43.611652 rx_firspass[0][0][9] = 5
4085 13:53:43.612170 rx_lastpass[0][0][9] = 35
4086 13:53:43.614977 rx_firspass[0][0][10] = 9
4087 13:53:43.617721 rx_lastpass[0][0][10] = 38
4088 13:53:43.618142 rx_firspass[0][0][11] = 3
4089 13:53:43.621048 rx_lastpass[0][0][11] = 31
4090 13:53:43.624452 rx_firspass[0][0][12] = 5
4091 13:53:43.627708 rx_lastpass[0][0][12] = 35
4092 13:53:43.628154 rx_firspass[0][0][13] = 1
4093 13:53:43.631201 rx_lastpass[0][0][13] = 31
4094 13:53:43.634654 rx_firspass[0][0][14] = 3
4095 13:53:43.638384 rx_lastpass[0][0][14] = 33
4096 13:53:43.638896 rx_firspass[0][0][15] = 4
4097 13:53:43.641178 rx_lastpass[0][0][15] = 35
4098 13:53:43.644569 rx_firspass[0][1][0] = 9
4099 13:53:43.644951 rx_lastpass[0][1][0] = 43
4100 13:53:43.647949 rx_firspass[0][1][1] = 7
4101 13:53:43.651444 rx_lastpass[0][1][1] = 42
4102 13:53:43.651824 rx_firspass[0][1][2] = 7
4103 13:53:43.654511 rx_lastpass[0][1][2] = 42
4104 13:53:43.657773 rx_firspass[0][1][3] = -2
4105 13:53:43.661270 rx_lastpass[0][1][3] = 33
4106 13:53:43.661727 rx_firspass[0][1][4] = 5
4107 13:53:43.664374 rx_lastpass[0][1][4] = 40
4108 13:53:43.668362 rx_firspass[0][1][5] = 1
4109 13:53:43.668821 rx_lastpass[0][1][5] = 34
4110 13:53:43.671384 rx_firspass[0][1][6] = 2
4111 13:53:43.674667 rx_lastpass[0][1][6] = 35
4112 13:53:43.677990 rx_firspass[0][1][7] = 2
4113 13:53:43.678444 rx_lastpass[0][1][7] = 36
4114 13:53:43.681516 rx_firspass[0][1][8] = 0
4115 13:53:43.684755 rx_lastpass[0][1][8] = 36
4116 13:53:43.685245 rx_firspass[0][1][9] = 1
4117 13:53:43.687516 rx_lastpass[0][1][9] = 38
4118 13:53:43.691485 rx_firspass[0][1][10] = 6
4119 13:53:43.691946 rx_lastpass[0][1][10] = 41
4120 13:53:43.694410 rx_firspass[0][1][11] = 1
4121 13:53:43.698084 rx_lastpass[0][1][11] = 33
4122 13:53:43.700940 rx_firspass[0][1][12] = 1
4123 13:53:43.701424 rx_lastpass[0][1][12] = 36
4124 13:53:43.704430 rx_firspass[0][1][13] = -1
4125 13:53:43.707624 rx_lastpass[0][1][13] = 34
4126 13:53:43.710895 rx_firspass[0][1][14] = 1
4127 13:53:43.711275 rx_lastpass[0][1][14] = 36
4128 13:53:43.714130 rx_firspass[0][1][15] = 3
4129 13:53:43.717621 rx_lastpass[0][1][15] = 38
4130 13:53:43.718002 rx_firspass[1][0][0] = 8
4131 13:53:43.721312 rx_lastpass[1][0][0] = 40
4132 13:53:43.724759 rx_firspass[1][0][1] = 7
4133 13:53:43.727564 rx_lastpass[1][0][1] = 38
4134 13:53:43.728024 rx_firspass[1][0][2] = 0
4135 13:53:43.730925 rx_lastpass[1][0][2] = 32
4136 13:53:43.734374 rx_firspass[1][0][3] = 0
4137 13:53:43.734761 rx_lastpass[1][0][3] = 31
4138 13:53:43.737713 rx_firspass[1][0][4] = 4
4139 13:53:43.741126 rx_lastpass[1][0][4] = 33
4140 13:53:43.741639 rx_firspass[1][0][5] = 9
4141 13:53:43.744125 rx_lastpass[1][0][5] = 38
4142 13:53:43.748094 rx_firspass[1][0][6] = 10
4143 13:53:43.750965 rx_lastpass[1][0][6] = 40
4144 13:53:43.751352 rx_firspass[1][0][7] = 5
4145 13:53:43.754362 rx_lastpass[1][0][7] = 33
4146 13:53:43.757707 rx_firspass[1][0][8] = 3
4147 13:53:43.758130 rx_lastpass[1][0][8] = 35
4148 13:53:43.760701 rx_firspass[1][0][9] = 4
4149 13:53:43.764251 rx_lastpass[1][0][9] = 35
4150 13:53:43.764660 rx_firspass[1][0][10] = 3
4151 13:53:43.767577 rx_lastpass[1][0][10] = 34
4152 13:53:43.770836 rx_firspass[1][0][11] = 5
4153 13:53:43.774273 rx_lastpass[1][0][11] = 34
4154 13:53:43.774659 rx_firspass[1][0][12] = 5
4155 13:53:43.778072 rx_lastpass[1][0][12] = 35
4156 13:53:43.781535 rx_firspass[1][0][13] = 5
4157 13:53:43.784531 rx_lastpass[1][0][13] = 33
4158 13:53:43.784918 rx_firspass[1][0][14] = 3
4159 13:53:43.787431 rx_lastpass[1][0][14] = 34
4160 13:53:43.790782 rx_firspass[1][0][15] = 0
4161 13:53:43.791166 rx_lastpass[1][0][15] = 32
4162 13:53:43.794728 rx_firspass[1][1][0] = 7
4163 13:53:43.797590 rx_lastpass[1][1][0] = 42
4164 13:53:43.801191 rx_firspass[1][1][1] = 5
4165 13:53:43.801575 rx_lastpass[1][1][1] = 40
4166 13:53:43.803899 rx_firspass[1][1][2] = 0
4167 13:53:43.807474 rx_lastpass[1][1][2] = 34
4168 13:53:43.807858 rx_firspass[1][1][3] = -2
4169 13:53:43.811293 rx_lastpass[1][1][3] = 33
4170 13:53:43.814274 rx_firspass[1][1][4] = 1
4171 13:53:43.817746 rx_lastpass[1][1][4] = 36
4172 13:53:43.818260 rx_firspass[1][1][5] = 5
4173 13:53:43.820835 rx_lastpass[1][1][5] = 41
4174 13:53:43.824609 rx_firspass[1][1][6] = 7
4175 13:53:43.825197 rx_lastpass[1][1][6] = 42
4176 13:53:43.827646 rx_firspass[1][1][7] = 1
4177 13:53:43.830943 rx_lastpass[1][1][7] = 36
4178 13:53:43.831404 rx_firspass[1][1][8] = 2
4179 13:53:43.834112 rx_lastpass[1][1][8] = 37
4180 13:53:43.837527 rx_firspass[1][1][9] = 2
4181 13:53:43.840673 rx_lastpass[1][1][9] = 37
4182 13:53:43.841128 rx_firspass[1][1][10] = 2
4183 13:53:43.844162 rx_lastpass[1][1][10] = 36
4184 13:53:43.847516 rx_firspass[1][1][11] = 3
4185 13:53:43.848015 rx_lastpass[1][1][11] = 38
4186 13:53:43.850958 rx_firspass[1][1][12] = 4
4187 13:53:43.853966 rx_lastpass[1][1][12] = 39
4188 13:53:43.857484 rx_firspass[1][1][13] = 3
4189 13:53:43.857979 rx_lastpass[1][1][13] = 36
4190 13:53:43.860570 rx_firspass[1][1][14] = 3
4191 13:53:43.864256 rx_lastpass[1][1][14] = 36
4192 13:53:43.864753 rx_firspass[1][1][15] = 0
4193 13:53:43.866949 rx_lastpass[1][1][15] = 34
4194 13:53:43.870329 dump params clk_delay
4195 13:53:43.870743 clk_delay[0] = -1
4196 13:53:43.873415 clk_delay[1] = 0
4197 13:53:43.873798 dump params dqs_delay
4198 13:53:43.877069 dqs_delay[0][0] = 0
4199 13:53:43.880368 dqs_delay[0][1] = 0
4200 13:53:43.880852 dqs_delay[1][0] = -1
4201 13:53:43.883786 dqs_delay[1][1] = 0
4202 13:53:43.886980 dump params delay_cell_unit = 762
4203 13:53:43.887364 dump source = 0x0
4204 13:53:43.890468 dump params frequency:1200
4205 13:53:43.890853 dump params rank number:2
4206 13:53:43.893545
4207 13:53:43.893926 dump params write leveling
4208 13:53:43.897021 write leveling[0][0][0] = 0x0
4209 13:53:43.900442 write leveling[0][0][1] = 0x0
4210 13:53:43.903562 write leveling[0][1][0] = 0x0
4211 13:53:43.903949 write leveling[0][1][1] = 0x0
4212 13:53:43.907106 write leveling[1][0][0] = 0x0
4213 13:53:43.910227 write leveling[1][0][1] = 0x0
4214 13:53:43.913842 write leveling[1][1][0] = 0x0
4215 13:53:43.917552 write leveling[1][1][1] = 0x0
4216 13:53:43.918011 dump params cbt_cs
4217 13:53:43.920475 cbt_cs[0][0] = 0x0
4218 13:53:43.920981 cbt_cs[0][1] = 0x0
4219 13:53:43.923941 cbt_cs[1][0] = 0x0
4220 13:53:43.924446 cbt_cs[1][1] = 0x0
4221 13:53:43.927420 dump params cbt_mr12
4222 13:53:43.927877 cbt_mr12[0][0] = 0x0
4223 13:53:43.931003 cbt_mr12[0][1] = 0x0
4224 13:53:43.933715 cbt_mr12[1][0] = 0x0
4225 13:53:43.934101 cbt_mr12[1][1] = 0x0
4226 13:53:43.936635 dump params tx window
4227 13:53:43.937024 tx_center_min[0][0][0] = 0
4228 13:53:43.940170 tx_center_max[0][0][0] = 0
4229 13:53:43.944163 tx_center_min[0][0][1] = 0
4230 13:53:43.946935 tx_center_max[0][0][1] = 0
4231 13:53:43.947356 tx_center_min[0][1][0] = 0
4232 13:53:43.950377 tx_center_max[0][1][0] = 0
4233 13:53:43.953555 tx_center_min[0][1][1] = 0
4234 13:53:43.957340 tx_center_max[0][1][1] = 0
4235 13:53:43.957803 tx_center_min[1][0][0] = 0
4236 13:53:43.960411 tx_center_max[1][0][0] = 0
4237 13:53:43.963547 tx_center_min[1][0][1] = 0
4238 13:53:43.966544 tx_center_max[1][0][1] = 0
4239 13:53:43.966932 tx_center_min[1][1][0] = 0
4240 13:53:43.970301 tx_center_max[1][1][0] = 0
4241 13:53:43.973730 tx_center_min[1][1][1] = 0
4242 13:53:43.976758 tx_center_max[1][1][1] = 0
4243 13:53:43.977282 dump params tx window
4244 13:53:43.979658 tx_win_center[0][0][0] = 0
4245 13:53:43.983206 tx_first_pass[0][0][0] = 0
4246 13:53:43.983597 tx_last_pass[0][0][0] = 0
4247 13:53:43.986468 tx_win_center[0][0][1] = 0
4248 13:53:43.989581 tx_first_pass[0][0][1] = 0
4249 13:53:43.993402 tx_last_pass[0][0][1] = 0
4250 13:53:43.993862 tx_win_center[0][0][2] = 0
4251 13:53:43.996759 tx_first_pass[0][0][2] = 0
4252 13:53:43.999844 tx_last_pass[0][0][2] = 0
4253 13:53:44.000230 tx_win_center[0][0][3] = 0
4254 13:53:44.003274 tx_first_pass[0][0][3] = 0
4255 13:53:44.006809 tx_last_pass[0][0][3] = 0
4256 13:53:44.009913 tx_win_center[0][0][4] = 0
4257 13:53:44.010299 tx_first_pass[0][0][4] = 0
4258 13:53:44.013639 tx_last_pass[0][0][4] = 0
4259 13:53:44.016162 tx_win_center[0][0][5] = 0
4260 13:53:44.019798 tx_first_pass[0][0][5] = 0
4261 13:53:44.020256 tx_last_pass[0][0][5] = 0
4262 13:53:44.023474 tx_win_center[0][0][6] = 0
4263 13:53:44.026924 tx_first_pass[0][0][6] = 0
4264 13:53:44.027381 tx_last_pass[0][0][6] = 0
4265 13:53:44.030039 tx_win_center[0][0][7] = 0
4266 13:53:44.032832 tx_first_pass[0][0][7] = 0
4267 13:53:44.036833 tx_last_pass[0][0][7] = 0
4268 13:53:44.037269 tx_win_center[0][0][8] = 0
4269 13:53:44.040324 tx_first_pass[0][0][8] = 0
4270 13:53:44.043368 tx_last_pass[0][0][8] = 0
4271 13:53:44.046357 tx_win_center[0][0][9] = 0
4272 13:53:44.046816 tx_first_pass[0][0][9] = 0
4273 13:53:44.049678 tx_last_pass[0][0][9] = 0
4274 13:53:44.052744 tx_win_center[0][0][10] = 0
4275 13:53:44.056334 tx_first_pass[0][0][10] = 0
4276 13:53:44.056794 tx_last_pass[0][0][10] = 0
4277 13:53:44.059848 tx_win_center[0][0][11] = 0
4278 13:53:44.062950 tx_first_pass[0][0][11] = 0
4279 13:53:44.066326 tx_last_pass[0][0][11] = 0
4280 13:53:44.066826 tx_win_center[0][0][12] = 0
4281 13:53:44.069768 tx_first_pass[0][0][12] = 0
4282 13:53:44.073288 tx_last_pass[0][0][12] = 0
4283 13:53:44.076463 tx_win_center[0][0][13] = 0
4284 13:53:44.076958 tx_first_pass[0][0][13] = 0
4285 13:53:44.079672 tx_last_pass[0][0][13] = 0
4286 13:53:44.082606 tx_win_center[0][0][14] = 0
4287 13:53:44.086308 tx_first_pass[0][0][14] = 0
4288 13:53:44.086694 tx_last_pass[0][0][14] = 0
4289 13:53:44.089777 tx_win_center[0][0][15] = 0
4290 13:53:44.093009 tx_first_pass[0][0][15] = 0
4291 13:53:44.093520 tx_last_pass[0][0][15] = 0
4292 13:53:44.095911 tx_win_center[0][1][0] = 0
4293 13:53:44.099649 tx_first_pass[0][1][0] = 0
4294 13:53:44.103269 tx_last_pass[0][1][0] = 0
4295 13:53:44.103774 tx_win_center[0][1][1] = 0
4296 13:53:44.106342 tx_first_pass[0][1][1] = 0
4297 13:53:44.109809 tx_last_pass[0][1][1] = 0
4298 13:53:44.112950 tx_win_center[0][1][2] = 0
4299 13:53:44.113444 tx_first_pass[0][1][2] = 0
4300 13:53:44.116660 tx_last_pass[0][1][2] = 0
4301 13:53:44.119869 tx_win_center[0][1][3] = 0
4302 13:53:44.120337 tx_first_pass[0][1][3] = 0
4303 13:53:44.122968 tx_last_pass[0][1][3] = 0
4304 13:53:44.126394 tx_win_center[0][1][4] = 0
4305 13:53:44.129770 tx_first_pass[0][1][4] = 0
4306 13:53:44.130155 tx_last_pass[0][1][4] = 0
4307 13:53:44.132856 tx_win_center[0][1][5] = 0
4308 13:53:44.136334 tx_first_pass[0][1][5] = 0
4309 13:53:44.139543 tx_last_pass[0][1][5] = 0
4310 13:53:44.140010 tx_win_center[0][1][6] = 0
4311 13:53:44.142712 tx_first_pass[0][1][6] = 0
4312 13:53:44.146277 tx_last_pass[0][1][6] = 0
4313 13:53:44.146728 tx_win_center[0][1][7] = 0
4314 13:53:44.149804 tx_first_pass[0][1][7] = 0
4315 13:53:44.152951 tx_last_pass[0][1][7] = 0
4316 13:53:44.156418 tx_win_center[0][1][8] = 0
4317 13:53:44.156872 tx_first_pass[0][1][8] = 0
4318 13:53:44.159641 tx_last_pass[0][1][8] = 0
4319 13:53:44.163010 tx_win_center[0][1][9] = 0
4320 13:53:44.166128 tx_first_pass[0][1][9] = 0
4321 13:53:44.166582 tx_last_pass[0][1][9] = 0
4322 13:53:44.169577 tx_win_center[0][1][10] = 0
4323 13:53:44.173269 tx_first_pass[0][1][10] = 0
4324 13:53:44.173765 tx_last_pass[0][1][10] = 0
4325 13:53:44.176496 tx_win_center[0][1][11] = 0
4326 13:53:44.179939 tx_first_pass[0][1][11] = 0
4327 13:53:44.182800 tx_last_pass[0][1][11] = 0
4328 13:53:44.183299 tx_win_center[0][1][12] = 0
4329 13:53:44.186127 tx_first_pass[0][1][12] = 0
4330 13:53:44.189782 tx_last_pass[0][1][12] = 0
4331 13:53:44.193123 tx_win_center[0][1][13] = 0
4332 13:53:44.193672 tx_first_pass[0][1][13] = 0
4333 13:53:44.196526 tx_last_pass[0][1][13] = 0
4334 13:53:44.199977 tx_win_center[0][1][14] = 0
4335 13:53:44.203197 tx_first_pass[0][1][14] = 0
4336 13:53:44.203691 tx_last_pass[0][1][14] = 0
4337 13:53:44.206203 tx_win_center[0][1][15] = 0
4338 13:53:44.209595 tx_first_pass[0][1][15] = 0
4339 13:53:44.212906 tx_last_pass[0][1][15] = 0
4340 13:53:44.213362 tx_win_center[1][0][0] = 0
4341 13:53:44.216853 tx_first_pass[1][0][0] = 0
4342 13:53:44.219782 tx_last_pass[1][0][0] = 0
4343 13:53:44.223323 tx_win_center[1][0][1] = 0
4344 13:53:44.223708 tx_first_pass[1][0][1] = 0
4345 13:53:44.226170 tx_last_pass[1][0][1] = 0
4346 13:53:44.229945 tx_win_center[1][0][2] = 0
4347 13:53:44.230330 tx_first_pass[1][0][2] = 0
4348 13:53:44.233241 tx_last_pass[1][0][2] = 0
4349 13:53:44.236498 tx_win_center[1][0][3] = 0
4350 13:53:44.239695 tx_first_pass[1][0][3] = 0
4351 13:53:44.240087 tx_last_pass[1][0][3] = 0
4352 13:53:44.243102 tx_win_center[1][0][4] = 0
4353 13:53:44.246624 tx_first_pass[1][0][4] = 0
4354 13:53:44.249741 tx_last_pass[1][0][4] = 0
4355 13:53:44.250125 tx_win_center[1][0][5] = 0
4356 13:53:44.253412 tx_first_pass[1][0][5] = 0
4357 13:53:44.256464 tx_last_pass[1][0][5] = 0
4358 13:53:44.256920 tx_win_center[1][0][6] = 0
4359 13:53:44.259911 tx_first_pass[1][0][6] = 0
4360 13:53:44.263227 tx_last_pass[1][0][6] = 0
4361 13:53:44.266749 tx_win_center[1][0][7] = 0
4362 13:53:44.267207 tx_first_pass[1][0][7] = 0
4363 13:53:44.269687 tx_last_pass[1][0][7] = 0
4364 13:53:44.273525 tx_win_center[1][0][8] = 0
4365 13:53:44.276382 tx_first_pass[1][0][8] = 0
4366 13:53:44.276878 tx_last_pass[1][0][8] = 0
4367 13:53:44.279937 tx_win_center[1][0][9] = 0
4368 13:53:44.282683 tx_first_pass[1][0][9] = 0
4369 13:53:44.283067 tx_last_pass[1][0][9] = 0
4370 13:53:44.286564 tx_win_center[1][0][10] = 0
4371 13:53:44.290113 tx_first_pass[1][0][10] = 0
4372 13:53:44.293065 tx_last_pass[1][0][10] = 0
4373 13:53:44.293603 tx_win_center[1][0][11] = 0
4374 13:53:44.296691 tx_first_pass[1][0][11] = 0
4375 13:53:44.299497 tx_last_pass[1][0][11] = 0
4376 13:53:44.302887 tx_win_center[1][0][12] = 0
4377 13:53:44.303391 tx_first_pass[1][0][12] = 0
4378 13:53:44.306321 tx_last_pass[1][0][12] = 0
4379 13:53:44.309627 tx_win_center[1][0][13] = 0
4380 13:53:44.313101 tx_first_pass[1][0][13] = 0
4381 13:53:44.313574 tx_last_pass[1][0][13] = 0
4382 13:53:44.316083 tx_win_center[1][0][14] = 0
4383 13:53:44.319695 tx_first_pass[1][0][14] = 0
4384 13:53:44.323700 tx_last_pass[1][0][14] = 0
4385 13:53:44.324164 tx_win_center[1][0][15] = 0
4386 13:53:44.326077 tx_first_pass[1][0][15] = 0
4387 13:53:44.329408 tx_last_pass[1][0][15] = 0
4388 13:53:44.333285 tx_win_center[1][1][0] = 0
4389 13:53:44.333745 tx_first_pass[1][1][0] = 0
4390 13:53:44.336443 tx_last_pass[1][1][0] = 0
4391 13:53:44.339636 tx_win_center[1][1][1] = 0
4392 13:53:44.343145 tx_first_pass[1][1][1] = 0
4393 13:53:44.343529 tx_last_pass[1][1][1] = 0
4394 13:53:44.346788 tx_win_center[1][1][2] = 0
4395 13:53:44.349586 tx_first_pass[1][1][2] = 0
4396 13:53:44.350044 tx_last_pass[1][1][2] = 0
4397 13:53:44.353078 tx_win_center[1][1][3] = 0
4398 13:53:44.356618 tx_first_pass[1][1][3] = 0
4399 13:53:44.359877 tx_last_pass[1][1][3] = 0
4400 13:53:44.360259 tx_win_center[1][1][4] = 0
4401 13:53:44.363660 tx_first_pass[1][1][4] = 0
4402 13:53:44.366275 tx_last_pass[1][1][4] = 0
4403 13:53:44.369212 tx_win_center[1][1][5] = 0
4404 13:53:44.369597 tx_first_pass[1][1][5] = 0
4405 13:53:44.372848 tx_last_pass[1][1][5] = 0
4406 13:53:44.376426 tx_win_center[1][1][6] = 0
4407 13:53:44.376885 tx_first_pass[1][1][6] = 0
4408 13:53:44.379313 tx_last_pass[1][1][6] = 0
4409 13:53:44.383130 tx_win_center[1][1][7] = 0
4410 13:53:44.386286 tx_first_pass[1][1][7] = 0
4411 13:53:44.386741 tx_last_pass[1][1][7] = 0
4412 13:53:44.389391 tx_win_center[1][1][8] = 0
4413 13:53:44.392540 tx_first_pass[1][1][8] = 0
4414 13:53:44.396423 tx_last_pass[1][1][8] = 0
4415 13:53:44.396881 tx_win_center[1][1][9] = 0
4416 13:53:44.399845 tx_first_pass[1][1][9] = 0
4417 13:53:44.402681 tx_last_pass[1][1][9] = 0
4418 13:53:44.403169 tx_win_center[1][1][10] = 0
4419 13:53:44.405866 tx_first_pass[1][1][10] = 0
4420 13:53:44.409220 tx_last_pass[1][1][10] = 0
4421 13:53:44.412764 tx_win_center[1][1][11] = 0
4422 13:53:44.413177 tx_first_pass[1][1][11] = 0
4423 13:53:44.416069 tx_last_pass[1][1][11] = 0
4424 13:53:44.419442 tx_win_center[1][1][12] = 0
4425 13:53:44.423189 tx_first_pass[1][1][12] = 0
4426 13:53:44.423650 tx_last_pass[1][1][12] = 0
4427 13:53:44.425720 tx_win_center[1][1][13] = 0
4428 13:53:44.429802 tx_first_pass[1][1][13] = 0
4429 13:53:44.432430 tx_last_pass[1][1][13] = 0
4430 13:53:44.432809 tx_win_center[1][1][14] = 0
4431 13:53:44.435895 tx_first_pass[1][1][14] = 0
4432 13:53:44.439496 tx_last_pass[1][1][14] = 0
4433 13:53:44.442886 tx_win_center[1][1][15] = 0
4434 13:53:44.446146 tx_first_pass[1][1][15] = 0
4435 13:53:44.446533 tx_last_pass[1][1][15] = 0
4436 13:53:44.449214 dump params rx window
4437 13:53:44.449638 rx_firspass[0][0][0] = 0
4438 13:53:44.452753 rx_lastpass[0][0][0] = 0
4439 13:53:44.456012 rx_firspass[0][0][1] = 0
4440 13:53:44.459418 rx_lastpass[0][0][1] = 0
4441 13:53:44.459823 rx_firspass[0][0][2] = 0
4442 13:53:44.462829 rx_lastpass[0][0][2] = 0
4443 13:53:44.466051 rx_firspass[0][0][3] = 0
4444 13:53:44.466658 rx_lastpass[0][0][3] = 0
4445 13:53:44.469274 rx_firspass[0][0][4] = 0
4446 13:53:44.472894 rx_lastpass[0][0][4] = 0
4447 13:53:44.473439 rx_firspass[0][0][5] = 0
4448 13:53:44.475852 rx_lastpass[0][0][5] = 0
4449 13:53:44.479036 rx_firspass[0][0][6] = 0
4450 13:53:44.479532 rx_lastpass[0][0][6] = 0
4451 13:53:44.482847 rx_firspass[0][0][7] = 0
4452 13:53:44.486007 rx_lastpass[0][0][7] = 0
4453 13:53:44.486502 rx_firspass[0][0][8] = 0
4454 13:53:44.489387 rx_lastpass[0][0][8] = 0
4455 13:53:44.492359 rx_firspass[0][0][9] = 0
4456 13:53:44.495969 rx_lastpass[0][0][9] = 0
4457 13:53:44.496477 rx_firspass[0][0][10] = 0
4458 13:53:44.499485 rx_lastpass[0][0][10] = 0
4459 13:53:44.502574 rx_firspass[0][0][11] = 0
4460 13:53:44.503107 rx_lastpass[0][0][11] = 0
4461 13:53:44.506057 rx_firspass[0][0][12] = 0
4462 13:53:44.509494 rx_lastpass[0][0][12] = 0
4463 13:53:44.512540 rx_firspass[0][0][13] = 0
4464 13:53:44.513037 rx_lastpass[0][0][13] = 0
4465 13:53:44.515869 rx_firspass[0][0][14] = 0
4466 13:53:44.519377 rx_lastpass[0][0][14] = 0
4467 13:53:44.519895 rx_firspass[0][0][15] = 0
4468 13:53:44.523116 rx_lastpass[0][0][15] = 0
4469 13:53:44.525715 rx_firspass[0][1][0] = 0
4470 13:53:44.526316 rx_lastpass[0][1][0] = 0
4471 13:53:44.528948 rx_firspass[0][1][1] = 0
4472 13:53:44.532765 rx_lastpass[0][1][1] = 0
4473 13:53:44.533310 rx_firspass[0][1][2] = 0
4474 13:53:44.535726 rx_lastpass[0][1][2] = 0
4475 13:53:44.539112 rx_firspass[0][1][3] = 0
4476 13:53:44.542401 rx_lastpass[0][1][3] = 0
4477 13:53:44.542787 rx_firspass[0][1][4] = 0
4478 13:53:44.546168 rx_lastpass[0][1][4] = 0
4479 13:53:44.549092 rx_firspass[0][1][5] = 0
4480 13:53:44.549607 rx_lastpass[0][1][5] = 0
4481 13:53:44.552761 rx_firspass[0][1][6] = 0
4482 13:53:44.556623 rx_lastpass[0][1][6] = 0
4483 13:53:44.557088 rx_firspass[0][1][7] = 0
4484 13:53:44.558969 rx_lastpass[0][1][7] = 0
4485 13:53:44.562972 rx_firspass[0][1][8] = 0
4486 13:53:44.563428 rx_lastpass[0][1][8] = 0
4487 13:53:44.565717 rx_firspass[0][1][9] = 0
4488 13:53:44.569382 rx_lastpass[0][1][9] = 0
4489 13:53:44.569862 rx_firspass[0][1][10] = 0
4490 13:53:44.573010 rx_lastpass[0][1][10] = 0
4491 13:53:44.575854 rx_firspass[0][1][11] = 0
4492 13:53:44.579416 rx_lastpass[0][1][11] = 0
4493 13:53:44.579801 rx_firspass[0][1][12] = 0
4494 13:53:44.583014 rx_lastpass[0][1][12] = 0
4495 13:53:44.585872 rx_firspass[0][1][13] = 0
4496 13:53:44.586273 rx_lastpass[0][1][13] = 0
4497 13:53:44.588941 rx_firspass[0][1][14] = 0
4498 13:53:44.592693 rx_lastpass[0][1][14] = 0
4499 13:53:44.596118 rx_firspass[0][1][15] = 0
4500 13:53:44.596607 rx_lastpass[0][1][15] = 0
4501 13:53:44.599147 rx_firspass[1][0][0] = 0
4502 13:53:44.602616 rx_lastpass[1][0][0] = 0
4503 13:53:44.603120 rx_firspass[1][0][1] = 0
4504 13:53:44.605869 rx_lastpass[1][0][1] = 0
4505 13:53:44.609244 rx_firspass[1][0][2] = 0
4506 13:53:44.609680 rx_lastpass[1][0][2] = 0
4507 13:53:44.612637 rx_firspass[1][0][3] = 0
4508 13:53:44.616054 rx_lastpass[1][0][3] = 0
4509 13:53:44.616556 rx_firspass[1][0][4] = 0
4510 13:53:44.619266 rx_lastpass[1][0][4] = 0
4511 13:53:44.622321 rx_firspass[1][0][5] = 0
4512 13:53:44.622744 rx_lastpass[1][0][5] = 0
4513 13:53:44.625741 rx_firspass[1][0][6] = 0
4514 13:53:44.629501 rx_lastpass[1][0][6] = 0
4515 13:53:44.632551 rx_firspass[1][0][7] = 0
4516 13:53:44.633006 rx_lastpass[1][0][7] = 0
4517 13:53:44.635585 rx_firspass[1][0][8] = 0
4518 13:53:44.639100 rx_lastpass[1][0][8] = 0
4519 13:53:44.639531 rx_firspass[1][0][9] = 0
4520 13:53:44.642872 rx_lastpass[1][0][9] = 0
4521 13:53:44.645745 rx_firspass[1][0][10] = 0
4522 13:53:44.646279 rx_lastpass[1][0][10] = 0
4523 13:53:44.649561 rx_firspass[1][0][11] = 0
4524 13:53:44.652539 rx_lastpass[1][0][11] = 0
4525 13:53:44.656036 rx_firspass[1][0][12] = 0
4526 13:53:44.656420 rx_lastpass[1][0][12] = 0
4527 13:53:44.659171 rx_firspass[1][0][13] = 0
4528 13:53:44.662641 rx_lastpass[1][0][13] = 0
4529 13:53:44.663042 rx_firspass[1][0][14] = 0
4530 13:53:44.665985 rx_lastpass[1][0][14] = 0
4531 13:53:44.669689 rx_firspass[1][0][15] = 0
4532 13:53:44.672704 rx_lastpass[1][0][15] = 0
4533 13:53:44.673200 rx_firspass[1][1][0] = 0
4534 13:53:44.675878 rx_lastpass[1][1][0] = 0
4535 13:53:44.679368 rx_firspass[1][1][1] = 0
4536 13:53:44.679829 rx_lastpass[1][1][1] = 0
4537 13:53:44.682525 rx_firspass[1][1][2] = 0
4538 13:53:44.686085 rx_lastpass[1][1][2] = 0
4539 13:53:44.686492 rx_firspass[1][1][3] = 0
4540 13:53:44.689474 rx_lastpass[1][1][3] = 0
4541 13:53:44.692830 rx_firspass[1][1][4] = 0
4542 13:53:44.693426 rx_lastpass[1][1][4] = 0
4543 13:53:44.696247 rx_firspass[1][1][5] = 0
4544 13:53:44.700090 rx_lastpass[1][1][5] = 0
4545 13:53:44.700590 rx_firspass[1][1][6] = 0
4546 13:53:44.702544 rx_lastpass[1][1][6] = 0
4547 13:53:44.705970 rx_firspass[1][1][7] = 0
4548 13:53:44.706469 rx_lastpass[1][1][7] = 0
4549 13:53:44.708958 rx_firspass[1][1][8] = 0
4550 13:53:44.713057 rx_lastpass[1][1][8] = 0
4551 13:53:44.715779 rx_firspass[1][1][9] = 0
4552 13:53:44.716203 rx_lastpass[1][1][9] = 0
4553 13:53:44.719396 rx_firspass[1][1][10] = 0
4554 13:53:44.722448 rx_lastpass[1][1][10] = 0
4555 13:53:44.722946 rx_firspass[1][1][11] = 0
4556 13:53:44.725970 rx_lastpass[1][1][11] = 0
4557 13:53:44.729086 rx_firspass[1][1][12] = 0
4558 13:53:44.732718 rx_lastpass[1][1][12] = 0
4559 13:53:44.733284 rx_firspass[1][1][13] = 0
4560 13:53:44.735521 rx_lastpass[1][1][13] = 0
4561 13:53:44.739351 rx_firspass[1][1][14] = 0
4562 13:53:44.739774 rx_lastpass[1][1][14] = 0
4563 13:53:44.742652 rx_firspass[1][1][15] = 0
4564 13:53:44.745379 rx_lastpass[1][1][15] = 0
4565 13:53:44.745828 dump params clk_delay
4566 13:53:44.748808 clk_delay[0] = 0
4567 13:53:44.749228 clk_delay[1] = 0
4568 13:53:44.752422 dump params dqs_delay
4569 13:53:44.752886 dqs_delay[0][0] = 0
4570 13:53:44.755658 dqs_delay[0][1] = 0
4571 13:53:44.758959 dqs_delay[1][0] = 0
4572 13:53:44.759335 dqs_delay[1][1] = 0
4573 13:53:44.762293 dump params delay_cell_unit = 762
4574 13:53:44.762672 dump source = 0x0
4575 13:53:44.765654 dump params frequency:800
4576 13:53:44.769209 dump params rank number:2
4577 13:53:44.769589
4578 13:53:44.772407 dump params write leveling
4579 13:53:44.772933 write leveling[0][0][0] = 0x0
4580 13:53:44.775467 write leveling[0][0][1] = 0x0
4581 13:53:44.779098 write leveling[0][1][0] = 0x0
4582 13:53:44.782706 write leveling[0][1][1] = 0x0
4583 13:53:44.785497 write leveling[1][0][0] = 0x0
4584 13:53:44.785880 write leveling[1][0][1] = 0x0
4585 13:53:44.789224 write leveling[1][1][0] = 0x0
4586 13:53:44.792322 write leveling[1][1][1] = 0x0
4587 13:53:44.795260 dump params cbt_cs
4588 13:53:44.795721 cbt_cs[0][0] = 0x0
4589 13:53:44.798892 cbt_cs[0][1] = 0x0
4590 13:53:44.799369 cbt_cs[1][0] = 0x0
4591 13:53:44.802203 cbt_cs[1][1] = 0x0
4592 13:53:44.802652 dump params cbt_mr12
4593 13:53:44.805514 cbt_mr12[0][0] = 0x0
4594 13:53:44.806053 cbt_mr12[0][1] = 0x0
4595 13:53:44.808921 cbt_mr12[1][0] = 0x0
4596 13:53:44.811942 cbt_mr12[1][1] = 0x0
4597 13:53:44.812322 dump params tx window
4598 13:53:44.815328 tx_center_min[0][0][0] = 0
4599 13:53:44.819053 tx_center_max[0][0][0] = 0
4600 13:53:44.819516 tx_center_min[0][0][1] = 0
4601 13:53:44.822358 tx_center_max[0][0][1] = 0
4602 13:53:44.825441 tx_center_min[0][1][0] = 0
4603 13:53:44.829206 tx_center_max[0][1][0] = 0
4604 13:53:44.829666 tx_center_min[0][1][1] = 0
4605 13:53:44.831962 tx_center_max[0][1][1] = 0
4606 13:53:44.835171 tx_center_min[1][0][0] = 0
4607 13:53:44.838897 tx_center_max[1][0][0] = 0
4608 13:53:44.839410 tx_center_min[1][0][1] = 0
4609 13:53:44.841950 tx_center_max[1][0][1] = 0
4610 13:53:44.845369 tx_center_min[1][1][0] = 0
4611 13:53:44.848564 tx_center_max[1][1][0] = 0
4612 13:53:44.849271 tx_center_min[1][1][1] = 0
4613 13:53:44.852402 tx_center_max[1][1][1] = 0
4614 13:53:44.855393 dump params tx window
4615 13:53:44.855892 tx_win_center[0][0][0] = 0
4616 13:53:44.858636 tx_first_pass[0][0][0] = 0
4617 13:53:44.861851 tx_last_pass[0][0][0] = 0
4618 13:53:44.865307 tx_win_center[0][0][1] = 0
4619 13:53:44.865692 tx_first_pass[0][0][1] = 0
4620 13:53:44.868116 tx_last_pass[0][0][1] = 0
4621 13:53:44.871872 tx_win_center[0][0][2] = 0
4622 13:53:44.872295 tx_first_pass[0][0][2] = 0
4623 13:53:44.875227 tx_last_pass[0][0][2] = 0
4624 13:53:44.878379 tx_win_center[0][0][3] = 0
4625 13:53:44.881867 tx_first_pass[0][0][3] = 0
4626 13:53:44.882250 tx_last_pass[0][0][3] = 0
4627 13:53:44.885183 tx_win_center[0][0][4] = 0
4628 13:53:44.888524 tx_first_pass[0][0][4] = 0
4629 13:53:44.892154 tx_last_pass[0][0][4] = 0
4630 13:53:44.892610 tx_win_center[0][0][5] = 0
4631 13:53:44.895805 tx_first_pass[0][0][5] = 0
4632 13:53:44.898748 tx_last_pass[0][0][5] = 0
4633 13:53:44.899248 tx_win_center[0][0][6] = 0
4634 13:53:44.901732 tx_first_pass[0][0][6] = 0
4635 13:53:44.905175 tx_last_pass[0][0][6] = 0
4636 13:53:44.908860 tx_win_center[0][0][7] = 0
4637 13:53:44.909358 tx_first_pass[0][0][7] = 0
4638 13:53:44.912326 tx_last_pass[0][0][7] = 0
4639 13:53:44.915015 tx_win_center[0][0][8] = 0
4640 13:53:44.915438 tx_first_pass[0][0][8] = 0
4641 13:53:44.918276 tx_last_pass[0][0][8] = 0
4642 13:53:44.921777 tx_win_center[0][0][9] = 0
4643 13:53:44.925168 tx_first_pass[0][0][9] = 0
4644 13:53:44.925639 tx_last_pass[0][0][9] = 0
4645 13:53:44.928608 tx_win_center[0][0][10] = 0
4646 13:53:44.932248 tx_first_pass[0][0][10] = 0
4647 13:53:44.935422 tx_last_pass[0][0][10] = 0
4648 13:53:44.935825 tx_win_center[0][0][11] = 0
4649 13:53:44.938691 tx_first_pass[0][0][11] = 0
4650 13:53:44.941830 tx_last_pass[0][0][11] = 0
4651 13:53:44.945329 tx_win_center[0][0][12] = 0
4652 13:53:44.945841 tx_first_pass[0][0][12] = 0
4653 13:53:44.948547 tx_last_pass[0][0][12] = 0
4654 13:53:44.951963 tx_win_center[0][0][13] = 0
4655 13:53:44.955428 tx_first_pass[0][0][13] = 0
4656 13:53:44.955937 tx_last_pass[0][0][13] = 0
4657 13:53:44.958617 tx_win_center[0][0][14] = 0
4658 13:53:44.962207 tx_first_pass[0][0][14] = 0
4659 13:53:44.965215 tx_last_pass[0][0][14] = 0
4660 13:53:44.965717 tx_win_center[0][0][15] = 0
4661 13:53:44.968328 tx_first_pass[0][0][15] = 0
4662 13:53:44.971692 tx_last_pass[0][0][15] = 0
4663 13:53:44.975239 tx_win_center[0][1][0] = 0
4664 13:53:44.975666 tx_first_pass[0][1][0] = 0
4665 13:53:44.978465 tx_last_pass[0][1][0] = 0
4666 13:53:44.981881 tx_win_center[0][1][1] = 0
4667 13:53:44.984983 tx_first_pass[0][1][1] = 0
4668 13:53:44.985415 tx_last_pass[0][1][1] = 0
4669 13:53:44.988588 tx_win_center[0][1][2] = 0
4670 13:53:44.991770 tx_first_pass[0][1][2] = 0
4671 13:53:44.992236 tx_last_pass[0][1][2] = 0
4672 13:53:44.995323 tx_win_center[0][1][3] = 0
4673 13:53:44.998699 tx_first_pass[0][1][3] = 0
4674 13:53:45.001520 tx_last_pass[0][1][3] = 0
4675 13:53:45.001946 tx_win_center[0][1][4] = 0
4676 13:53:45.005278 tx_first_pass[0][1][4] = 0
4677 13:53:45.008821 tx_last_pass[0][1][4] = 0
4678 13:53:45.009375 tx_win_center[0][1][5] = 0
4679 13:53:45.011437 tx_first_pass[0][1][5] = 0
4680 13:53:45.015154 tx_last_pass[0][1][5] = 0
4681 13:53:45.018220 tx_win_center[0][1][6] = 0
4682 13:53:45.018648 tx_first_pass[0][1][6] = 0
4683 13:53:45.021637 tx_last_pass[0][1][6] = 0
4684 13:53:45.025287 tx_win_center[0][1][7] = 0
4685 13:53:45.028513 tx_first_pass[0][1][7] = 0
4686 13:53:45.029027 tx_last_pass[0][1][7] = 0
4687 13:53:45.031700 tx_win_center[0][1][8] = 0
4688 13:53:45.035062 tx_first_pass[0][1][8] = 0
4689 13:53:45.035448 tx_last_pass[0][1][8] = 0
4690 13:53:45.038848 tx_win_center[0][1][9] = 0
4691 13:53:45.042151 tx_first_pass[0][1][9] = 0
4692 13:53:45.045348 tx_last_pass[0][1][9] = 0
4693 13:53:45.045847 tx_win_center[0][1][10] = 0
4694 13:53:45.048452 tx_first_pass[0][1][10] = 0
4695 13:53:45.051984 tx_last_pass[0][1][10] = 0
4696 13:53:45.055659 tx_win_center[0][1][11] = 0
4697 13:53:45.056168 tx_first_pass[0][1][11] = 0
4698 13:53:45.058355 tx_last_pass[0][1][11] = 0
4699 13:53:45.062158 tx_win_center[0][1][12] = 0
4700 13:53:45.065233 tx_first_pass[0][1][12] = 0
4701 13:53:45.065731 tx_last_pass[0][1][12] = 0
4702 13:53:45.068380 tx_win_center[0][1][13] = 0
4703 13:53:45.072127 tx_first_pass[0][1][13] = 0
4704 13:53:45.075516 tx_last_pass[0][1][13] = 0
4705 13:53:45.075957 tx_win_center[0][1][14] = 0
4706 13:53:45.078314 tx_first_pass[0][1][14] = 0
4707 13:53:45.081674 tx_last_pass[0][1][14] = 0
4708 13:53:45.085808 tx_win_center[0][1][15] = 0
4709 13:53:45.086294 tx_first_pass[0][1][15] = 0
4710 13:53:45.088572 tx_last_pass[0][1][15] = 0
4711 13:53:45.091988 tx_win_center[1][0][0] = 0
4712 13:53:45.095161 tx_first_pass[1][0][0] = 0
4713 13:53:45.095658 tx_last_pass[1][0][0] = 0
4714 13:53:45.098918 tx_win_center[1][0][1] = 0
4715 13:53:45.102038 tx_first_pass[1][0][1] = 0
4716 13:53:45.102642 tx_last_pass[1][0][1] = 0
4717 13:53:45.105592 tx_win_center[1][0][2] = 0
4718 13:53:45.109107 tx_first_pass[1][0][2] = 0
4719 13:53:45.111789 tx_last_pass[1][0][2] = 0
4720 13:53:45.112270 tx_win_center[1][0][3] = 0
4721 13:53:45.115578 tx_first_pass[1][0][3] = 0
4722 13:53:45.119006 tx_last_pass[1][0][3] = 0
4723 13:53:45.119515 tx_win_center[1][0][4] = 0
4724 13:53:45.122272 tx_first_pass[1][0][4] = 0
4725 13:53:45.125254 tx_last_pass[1][0][4] = 0
4726 13:53:45.128654 tx_win_center[1][0][5] = 0
4727 13:53:45.129229 tx_first_pass[1][0][5] = 0
4728 13:53:45.132770 tx_last_pass[1][0][5] = 0
4729 13:53:45.135643 tx_win_center[1][0][6] = 0
4730 13:53:45.138748 tx_first_pass[1][0][6] = 0
4731 13:53:45.139264 tx_last_pass[1][0][6] = 0
4732 13:53:45.142096 tx_win_center[1][0][7] = 0
4733 13:53:45.145373 tx_first_pass[1][0][7] = 0
4734 13:53:45.145876 tx_last_pass[1][0][7] = 0
4735 13:53:45.148802 tx_win_center[1][0][8] = 0
4736 13:53:45.152299 tx_first_pass[1][0][8] = 0
4737 13:53:45.155533 tx_last_pass[1][0][8] = 0
4738 13:53:45.156038 tx_win_center[1][0][9] = 0
4739 13:53:45.158843 tx_first_pass[1][0][9] = 0
4740 13:53:45.162489 tx_last_pass[1][0][9] = 0
4741 13:53:45.162996 tx_win_center[1][0][10] = 0
4742 13:53:45.165797 tx_first_pass[1][0][10] = 0
4743 13:53:45.168738 tx_last_pass[1][0][10] = 0
4744 13:53:45.171930 tx_win_center[1][0][11] = 0
4745 13:53:45.175454 tx_first_pass[1][0][11] = 0
4746 13:53:45.175963 tx_last_pass[1][0][11] = 0
4747 13:53:45.178661 tx_win_center[1][0][12] = 0
4748 13:53:45.182537 tx_first_pass[1][0][12] = 0
4749 13:53:45.185889 tx_last_pass[1][0][12] = 0
4750 13:53:45.186398 tx_win_center[1][0][13] = 0
4751 13:53:45.188261 tx_first_pass[1][0][13] = 0
4752 13:53:45.192477 tx_last_pass[1][0][13] = 0
4753 13:53:45.192987 tx_win_center[1][0][14] = 0
4754 13:53:45.195185 tx_first_pass[1][0][14] = 0
4755 13:53:45.198957 tx_last_pass[1][0][14] = 0
4756 13:53:45.201948 tx_win_center[1][0][15] = 0
4757 13:53:45.202374 tx_first_pass[1][0][15] = 0
4758 13:53:45.205684 tx_last_pass[1][0][15] = 0
4759 13:53:45.208998 tx_win_center[1][1][0] = 0
4760 13:53:45.211873 tx_first_pass[1][1][0] = 0
4761 13:53:45.212416 tx_last_pass[1][1][0] = 0
4762 13:53:45.215482 tx_win_center[1][1][1] = 0
4763 13:53:45.219144 tx_first_pass[1][1][1] = 0
4764 13:53:45.221990 tx_last_pass[1][1][1] = 0
4765 13:53:45.222379 tx_win_center[1][1][2] = 0
4766 13:53:45.225380 tx_first_pass[1][1][2] = 0
4767 13:53:45.228901 tx_last_pass[1][1][2] = 0
4768 13:53:45.229312 tx_win_center[1][1][3] = 0
4769 13:53:45.231882 tx_first_pass[1][1][3] = 0
4770 13:53:45.235338 tx_last_pass[1][1][3] = 0
4771 13:53:45.239012 tx_win_center[1][1][4] = 0
4772 13:53:45.239479 tx_first_pass[1][1][4] = 0
4773 13:53:45.241839 tx_last_pass[1][1][4] = 0
4774 13:53:45.246200 tx_win_center[1][1][5] = 0
4775 13:53:45.248834 tx_first_pass[1][1][5] = 0
4776 13:53:45.249375 tx_last_pass[1][1][5] = 0
4777 13:53:45.252494 tx_win_center[1][1][6] = 0
4778 13:53:45.255398 tx_first_pass[1][1][6] = 0
4779 13:53:45.255905 tx_last_pass[1][1][6] = 0
4780 13:53:45.258587 tx_win_center[1][1][7] = 0
4781 13:53:45.262605 tx_first_pass[1][1][7] = 0
4782 13:53:45.265674 tx_last_pass[1][1][7] = 0
4783 13:53:45.266142 tx_win_center[1][1][8] = 0
4784 13:53:45.269045 tx_first_pass[1][1][8] = 0
4785 13:53:45.272396 tx_last_pass[1][1][8] = 0
4786 13:53:45.272782 tx_win_center[1][1][9] = 0
4787 13:53:45.275369 tx_first_pass[1][1][9] = 0
4788 13:53:45.278909 tx_last_pass[1][1][9] = 0
4789 13:53:45.282238 tx_win_center[1][1][10] = 0
4790 13:53:45.282705 tx_first_pass[1][1][10] = 0
4791 13:53:45.285201 tx_last_pass[1][1][10] = 0
4792 13:53:45.288747 tx_win_center[1][1][11] = 0
4793 13:53:45.292314 tx_first_pass[1][1][11] = 0
4794 13:53:45.292780 tx_last_pass[1][1][11] = 0
4795 13:53:45.295624 tx_win_center[1][1][12] = 0
4796 13:53:45.298684 tx_first_pass[1][1][12] = 0
4797 13:53:45.301854 tx_last_pass[1][1][12] = 0
4798 13:53:45.302359 tx_win_center[1][1][13] = 0
4799 13:53:45.305790 tx_first_pass[1][1][13] = 0
4800 13:53:45.308857 tx_last_pass[1][1][13] = 0
4801 13:53:45.312464 tx_win_center[1][1][14] = 0
4802 13:53:45.313006 tx_first_pass[1][1][14] = 0
4803 13:53:45.315478 tx_last_pass[1][1][14] = 0
4804 13:53:45.318719 tx_win_center[1][1][15] = 0
4805 13:53:45.322317 tx_first_pass[1][1][15] = 0
4806 13:53:45.322758 tx_last_pass[1][1][15] = 0
4807 13:53:45.325210 dump params rx window
4808 13:53:45.329086 rx_firspass[0][0][0] = 0
4809 13:53:45.329633 rx_lastpass[0][0][0] = 0
4810 13:53:45.331719 rx_firspass[0][0][1] = 0
4811 13:53:45.335318 rx_lastpass[0][0][1] = 0
4812 13:53:45.335739 rx_firspass[0][0][2] = 0
4813 13:53:45.338675 rx_lastpass[0][0][2] = 0
4814 13:53:45.341976 rx_firspass[0][0][3] = 0
4815 13:53:45.345604 rx_lastpass[0][0][3] = 0
4816 13:53:45.346100 rx_firspass[0][0][4] = 0
4817 13:53:45.348777 rx_lastpass[0][0][4] = 0
4818 13:53:45.352152 rx_firspass[0][0][5] = 0
4819 13:53:45.352649 rx_lastpass[0][0][5] = 0
4820 13:53:45.355272 rx_firspass[0][0][6] = 0
4821 13:53:45.358919 rx_lastpass[0][0][6] = 0
4822 13:53:45.359415 rx_firspass[0][0][7] = 0
4823 13:53:45.362484 rx_lastpass[0][0][7] = 0
4824 13:53:45.365325 rx_firspass[0][0][8] = 0
4825 13:53:45.365747 rx_lastpass[0][0][8] = 0
4826 13:53:45.368626 rx_firspass[0][0][9] = 0
4827 13:53:45.371828 rx_lastpass[0][0][9] = 0
4828 13:53:45.372388 rx_firspass[0][0][10] = 0
4829 13:53:45.375456 rx_lastpass[0][0][10] = 0
4830 13:53:45.378978 rx_firspass[0][0][11] = 0
4831 13:53:45.382552 rx_lastpass[0][0][11] = 0
4832 13:53:45.383057 rx_firspass[0][0][12] = 0
4833 13:53:45.385723 rx_lastpass[0][0][12] = 0
4834 13:53:45.389235 rx_firspass[0][0][13] = 0
4835 13:53:45.389733 rx_lastpass[0][0][13] = 0
4836 13:53:45.392052 rx_firspass[0][0][14] = 0
4837 13:53:45.395627 rx_lastpass[0][0][14] = 0
4838 13:53:45.399025 rx_firspass[0][0][15] = 0
4839 13:53:45.399526 rx_lastpass[0][0][15] = 0
4840 13:53:45.402066 rx_firspass[0][1][0] = 0
4841 13:53:45.405616 rx_lastpass[0][1][0] = 0
4842 13:53:45.406116 rx_firspass[0][1][1] = 0
4843 13:53:45.409202 rx_lastpass[0][1][1] = 0
4844 13:53:45.412096 rx_firspass[0][1][2] = 0
4845 13:53:45.412521 rx_lastpass[0][1][2] = 0
4846 13:53:45.415618 rx_firspass[0][1][3] = 0
4847 13:53:45.418595 rx_lastpass[0][1][3] = 0
4848 13:53:45.419050 rx_firspass[0][1][4] = 0
4849 13:53:45.421757 rx_lastpass[0][1][4] = 0
4850 13:53:45.425336 rx_firspass[0][1][5] = 0
4851 13:53:45.425837 rx_lastpass[0][1][5] = 0
4852 13:53:45.428717 rx_firspass[0][1][6] = 0
4853 13:53:45.431856 rx_lastpass[0][1][6] = 0
4854 13:53:45.435513 rx_firspass[0][1][7] = 0
4855 13:53:45.435983 rx_lastpass[0][1][7] = 0
4856 13:53:45.439180 rx_firspass[0][1][8] = 0
4857 13:53:45.441743 rx_lastpass[0][1][8] = 0
4858 13:53:45.442130 rx_firspass[0][1][9] = 0
4859 13:53:45.445177 rx_lastpass[0][1][9] = 0
4860 13:53:45.448488 rx_firspass[0][1][10] = 0
4861 13:53:45.448913 rx_lastpass[0][1][10] = 0
4862 13:53:45.452100 rx_firspass[0][1][11] = 0
4863 13:53:45.455268 rx_lastpass[0][1][11] = 0
4864 13:53:45.455764 rx_firspass[0][1][12] = 0
4865 13:53:45.458542 rx_lastpass[0][1][12] = 0
4866 13:53:45.462118 rx_firspass[0][1][13] = 0
4867 13:53:45.465479 rx_lastpass[0][1][13] = 0
4868 13:53:45.465903 rx_firspass[0][1][14] = 0
4869 13:53:45.468795 rx_lastpass[0][1][14] = 0
4870 13:53:45.472008 rx_firspass[0][1][15] = 0
4871 13:53:45.475273 rx_lastpass[0][1][15] = 0
4872 13:53:45.475770 rx_firspass[1][0][0] = 0
4873 13:53:45.478202 rx_lastpass[1][0][0] = 0
4874 13:53:45.482077 rx_firspass[1][0][1] = 0
4875 13:53:45.482576 rx_lastpass[1][0][1] = 0
4876 13:53:45.484805 rx_firspass[1][0][2] = 0
4877 13:53:45.488318 rx_lastpass[1][0][2] = 0
4878 13:53:45.488729 rx_firspass[1][0][3] = 0
4879 13:53:45.491661 rx_lastpass[1][0][3] = 0
4880 13:53:45.494843 rx_firspass[1][0][4] = 0
4881 13:53:45.495231 rx_lastpass[1][0][4] = 0
4882 13:53:45.498425 rx_firspass[1][0][5] = 0
4883 13:53:45.501765 rx_lastpass[1][0][5] = 0
4884 13:53:45.502231 rx_firspass[1][0][6] = 0
4885 13:53:45.505315 rx_lastpass[1][0][6] = 0
4886 13:53:45.508755 rx_firspass[1][0][7] = 0
4887 13:53:45.511860 rx_lastpass[1][0][7] = 0
4888 13:53:45.512322 rx_firspass[1][0][8] = 0
4889 13:53:45.514854 rx_lastpass[1][0][8] = 0
4890 13:53:45.518599 rx_firspass[1][0][9] = 0
4891 13:53:45.519073 rx_lastpass[1][0][9] = 0
4892 13:53:45.521445 rx_firspass[1][0][10] = 0
4893 13:53:45.525058 rx_lastpass[1][0][10] = 0
4894 13:53:45.525569 rx_firspass[1][0][11] = 0
4895 13:53:45.528441 rx_lastpass[1][0][11] = 0
4896 13:53:45.531630 rx_firspass[1][0][12] = 0
4897 13:53:45.535222 rx_lastpass[1][0][12] = 0
4898 13:53:45.535620 rx_firspass[1][0][13] = 0
4899 13:53:45.538420 rx_lastpass[1][0][13] = 0
4900 13:53:45.541573 rx_firspass[1][0][14] = 0
4901 13:53:45.542006 rx_lastpass[1][0][14] = 0
4902 13:53:45.544849 rx_firspass[1][0][15] = 0
4903 13:53:45.547993 rx_lastpass[1][0][15] = 0
4904 13:53:45.551474 rx_firspass[1][1][0] = 0
4905 13:53:45.551930 rx_lastpass[1][1][0] = 0
4906 13:53:45.554874 rx_firspass[1][1][1] = 0
4907 13:53:45.558208 rx_lastpass[1][1][1] = 0
4908 13:53:45.558669 rx_firspass[1][1][2] = 0
4909 13:53:45.561648 rx_lastpass[1][1][2] = 0
4910 13:53:45.564925 rx_firspass[1][1][3] = 0
4911 13:53:45.565346 rx_lastpass[1][1][3] = 0
4912 13:53:45.568188 rx_firspass[1][1][4] = 0
4913 13:53:45.571261 rx_lastpass[1][1][4] = 0
4914 13:53:45.571649 rx_firspass[1][1][5] = 0
4915 13:53:45.574453 rx_lastpass[1][1][5] = 0
4916 13:53:45.578335 rx_firspass[1][1][6] = 0
4917 13:53:45.578794 rx_lastpass[1][1][6] = 0
4918 13:53:45.581639 rx_firspass[1][1][7] = 0
4919 13:53:45.584971 rx_lastpass[1][1][7] = 0
4920 13:53:45.585486 rx_firspass[1][1][8] = 0
4921 13:53:45.588270 rx_lastpass[1][1][8] = 0
4922 13:53:45.591347 rx_firspass[1][1][9] = 0
4923 13:53:45.594631 rx_lastpass[1][1][9] = 0
4924 13:53:45.595020 rx_firspass[1][1][10] = 0
4925 13:53:45.598265 rx_lastpass[1][1][10] = 0
4926 13:53:45.601482 rx_firspass[1][1][11] = 0
4927 13:53:45.601940 rx_lastpass[1][1][11] = 0
4928 13:53:45.604752 rx_firspass[1][1][12] = 0
4929 13:53:45.607758 rx_lastpass[1][1][12] = 0
4930 13:53:45.611118 rx_firspass[1][1][13] = 0
4931 13:53:45.611503 rx_lastpass[1][1][13] = 0
4932 13:53:45.614549 rx_firspass[1][1][14] = 0
4933 13:53:45.618143 rx_lastpass[1][1][14] = 0
4934 13:53:45.618527 rx_firspass[1][1][15] = 0
4935 13:53:45.621668 rx_lastpass[1][1][15] = 0
4936 13:53:45.624681 dump params clk_delay
4937 13:53:45.625159 clk_delay[0] = 0
4938 13:53:45.628409 clk_delay[1] = 0
4939 13:53:45.628872 dump params dqs_delay
4940 13:53:45.631965 dqs_delay[0][0] = 0
4941 13:53:45.632423 dqs_delay[0][1] = 0
4942 13:53:45.634651 dqs_delay[1][0] = 0
4943 13:53:45.635033 dqs_delay[1][1] = 0
4944 13:53:45.638019 dump params delay_cell_unit = 762
4945 13:53:45.641075 mt_set_emi_preloader end
4946 13:53:45.644532 [mt_mem_init] dram size: 0x100000000, rank number: 2
4947 13:53:45.651231 [complex_mem_test] start addr:0x40000000, len:20480
4948 13:53:45.687640 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
4949 13:53:45.693706 [complex_mem_test] start addr:0x80000000, len:20480
4950 13:53:45.729523 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
4951 13:53:45.736323 [complex_mem_test] start addr:0xc0000000, len:20480
4952 13:53:45.771799 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
4953 13:53:45.778926 [complex_mem_test] start addr:0x56000000, len:8192
4954 13:53:45.795543 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
4955 13:53:45.796042 ddr_geometry:1
4956 13:53:45.801912 [complex_mem_test] start addr:0x80000000, len:8192
4957 13:53:45.819404 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
4958 13:53:45.822287 dram_init: dram init end (result: 0)
4959 13:53:45.828859 Successfully loaded DRAM blobs and ran DRAM calibration
4960 13:53:45.839010 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
4961 13:53:45.839514 CBMEM:
4962 13:53:45.842841 IMD: root @ 00000000fffff000 254 entries.
4963 13:53:45.845313 IMD: root @ 00000000ffffec00 62 entries.
4964 13:53:45.852298 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
4965 13:53:45.858927 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
4966 13:53:45.862312 in-header: 03 a1 00 00 08 00 00 00
4967 13:53:45.865789 in-data: 84 60 60 10 00 00 00 00
4968 13:53:45.869107 Chrome EC: clear events_b mask to 0x0000000020004000
4969 13:53:45.876452 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
4970 13:53:45.879496 in-header: 03 fd 00 00 00 00 00 00
4971 13:53:45.879921 in-data:
4972 13:53:45.886335 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
4973 13:53:45.886842 CBFS @ 21000 size 3d4000
4974 13:53:45.892673 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
4975 13:53:45.896428 CBFS: Locating 'fallback/ramstage'
4976 13:53:45.899401 CBFS: Found @ offset 10d40 size d563
4977 13:53:45.921288 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
4978 13:53:45.933057 Accumulated console time in romstage 12845 ms
4979 13:53:45.933612
4980 13:53:45.934048
4981 13:53:45.943019 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
4982 13:53:45.946249 ARM64: Exception handlers installed.
4983 13:53:45.946756 ARM64: Testing exception
4984 13:53:45.949248 ARM64: Done test exception
4985 13:53:45.953008 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
4986 13:53:45.956465 Manufacturer: ef
4987 13:53:45.959473 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
4988 13:53:45.966680 WARNING: RO_VPD is uninitialized or empty.
4989 13:53:45.969479 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4990 13:53:45.972684 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4991 13:53:45.982907 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
4992 13:53:45.985854 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
4993 13:53:45.992782 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
4994 13:53:45.993334 Enumerating buses...
4995 13:53:45.999275 Show all devs... Before device enumeration.
4996 13:53:45.999779 Root Device: enabled 1
4997 13:53:46.003274 CPU_CLUSTER: 0: enabled 1
4998 13:53:46.003779 CPU: 00: enabled 1
4999 13:53:46.006199 Compare with tree...
5000 13:53:46.009214 Root Device: enabled 1
5001 13:53:46.009648 CPU_CLUSTER: 0: enabled 1
5002 13:53:46.012772 CPU: 00: enabled 1
5003 13:53:46.015751 Root Device scanning...
5004 13:53:46.016245 root_dev_scan_bus for Root Device
5005 13:53:46.019062 CPU_CLUSTER: 0 enabled
5006 13:53:46.022461 root_dev_scan_bus for Root Device done
5007 13:53:46.029521 scan_bus: scanning of bus Root Device took 10690 usecs
5008 13:53:46.030022 done
5009 13:53:46.033236 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5010 13:53:46.036069 Allocating resources...
5011 13:53:46.036565 Reading resources...
5012 13:53:46.038924 Root Device read_resources bus 0 link: 0
5013 13:53:46.046113 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5014 13:53:46.046609 CPU: 00 missing read_resources
5015 13:53:46.052332 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5016 13:53:46.056089 Root Device read_resources bus 0 link: 0 done
5017 13:53:46.058985 Done reading resources.
5018 13:53:46.062596 Show resources in subtree (Root Device)...After reading.
5019 13:53:46.065735 Root Device child on link 0 CPU_CLUSTER: 0
5020 13:53:46.069576 CPU_CLUSTER: 0 child on link 0 CPU: 00
5021 13:53:46.079089 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5022 13:53:46.079522 CPU: 00
5023 13:53:46.082537 Setting resources...
5024 13:53:46.085629 Root Device assign_resources, bus 0 link: 0
5025 13:53:46.089406 CPU_CLUSTER: 0 missing set_resources
5026 13:53:46.092232 Root Device assign_resources, bus 0 link: 0
5027 13:53:46.096114 Done setting resources.
5028 13:53:46.102551 Show resources in subtree (Root Device)...After assigning values.
5029 13:53:46.105681 Root Device child on link 0 CPU_CLUSTER: 0
5030 13:53:46.108944 CPU_CLUSTER: 0 child on link 0 CPU: 00
5031 13:53:46.115573 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5032 13:53:46.118806 CPU: 00
5033 13:53:46.122205 Done allocating resources.
5034 13:53:46.125737 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5035 13:53:46.128856 Enabling resources...
5036 13:53:46.129264 done.
5037 13:53:46.132096 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5038 13:53:46.135770 Initializing devices...
5039 13:53:46.136253 Root Device init ...
5040 13:53:46.139342 mainboard_init: Starting display init.
5041 13:53:46.142018 ADC[4]: Raw value=76494 ID=0
5042 13:53:46.165590 anx7625_power_on_init: Init interface.
5043 13:53:46.168798 anx7625_disable_pd_protocol: Disabled PD feature.
5044 13:53:46.175637 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5045 13:53:46.222108 anx7625_start_dp_work: Secure OCM version=00
5046 13:53:46.225298 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5047 13:53:46.242690 sp_tx_get_edid_block: EDID Block = 1
5048 13:53:46.359568 Extracted contents:
5049 13:53:46.362745 header: 00 ff ff ff ff ff ff 00
5050 13:53:46.366320 serial number: 06 af 5c 14 00 00 00 00 00 1a
5051 13:53:46.369571 version: 01 04
5052 13:53:46.373043 basic params: 95 1a 0e 78 02
5053 13:53:46.376846 chroma info: 99 85 95 55 56 92 28 22 50 54
5054 13:53:46.380214 established: 00 00 00
5055 13:53:46.386420 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5056 13:53:46.389602 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5057 13:53:46.396439 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5058 13:53:46.402978 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5059 13:53:46.409927 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5060 13:53:46.413546 extensions: 00
5061 13:53:46.414094 checksum: ae
5062 13:53:46.414613
5063 13:53:46.416371 Manufacturer: AUO Model 145c Serial Number 0
5064 13:53:46.419647 Made week 0 of 2016
5065 13:53:46.420075 EDID version: 1.4
5066 13:53:46.422907 Digital display
5067 13:53:46.426168 6 bits per primary color channel
5068 13:53:46.426555 DisplayPort interface
5069 13:53:46.429338 Maximum image size: 26 cm x 14 cm
5070 13:53:46.432942 Gamma: 220%
5071 13:53:46.433353 Check DPMS levels
5072 13:53:46.436142 Supported color formats: RGB 4:4:4
5073 13:53:46.439593 First detailed timing is preferred timing
5074 13:53:46.442939 Established timings supported:
5075 13:53:46.445977 Standard timings supported:
5076 13:53:46.446359 Detailed timings
5077 13:53:46.452839 Hex of detail: ce1d56ea50001a3030204600009010000018
5078 13:53:46.456454 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5079 13:53:46.459701 0556 0586 05a6 0640 hborder 0
5080 13:53:46.462715 0300 0304 030a 031a vborder 0
5081 13:53:46.466352 -hsync -vsync
5082 13:53:46.469998 Did detailed timing
5083 13:53:46.473362 Hex of detail: 0000000f0000000000000000000000000020
5084 13:53:46.476678 Manufacturer-specified data, tag 15
5085 13:53:46.479562 Hex of detail: 000000fe0041554f0a202020202020202020
5086 13:53:46.483215 ASCII string: AUO
5087 13:53:46.486540 Hex of detail: 000000fe004231313658414230312e34200a
5088 13:53:46.489818 ASCII string: B116XAB01.4
5089 13:53:46.490241 Checksum
5090 13:53:46.493333 Checksum: 0xae (valid)
5091 13:53:46.499665 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5092 13:53:46.500169 DSI data_rate: 457800000 bps
5093 13:53:46.506473 anx7625_parse_edid: set default k value to 0x3d for panel
5094 13:53:46.510407 anx7625_parse_edid: pixelclock(76300).
5095 13:53:46.513133 hactive(1366), hsync(32), hfp(48), hbp(154)
5096 13:53:46.516756 vactive(768), vsync(6), vfp(4), vbp(16)
5097 13:53:46.520188 anx7625_dsi_config: config dsi.
5098 13:53:46.528333 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5099 13:53:46.548985 anx7625_dsi_config: success to config DSI
5100 13:53:46.553072 anx7625_dp_start: MIPI phy setup OK.
5101 13:53:46.556340 [SSUSB] Setting up USB HOST controller...
5102 13:53:46.559081 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5103 13:53:46.559594 [SSUSB] phy power-on done.
5104 13:53:46.566360 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5105 13:53:46.569898 in-header: 03 fc 01 00 00 00 00 00
5106 13:53:46.570395 in-data:
5107 13:53:46.573599 handle_proto3_response: EC response with error code: 1
5108 13:53:46.576088 SPM: pcm index = 1
5109 13:53:46.580201 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5110 13:53:46.583031 CBFS @ 21000 size 3d4000
5111 13:53:46.589866 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5112 13:53:46.592992 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5113 13:53:46.596386 CBFS: Found @ offset 1e7c0 size 1026
5114 13:53:46.603051 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5115 13:53:46.606609 SPM: binary array size = 2988
5116 13:53:46.609612 SPM: version = pcm_allinone_v1.17.2_20180829
5117 13:53:46.612905 SPM binary loaded in 32 msecs
5118 13:53:46.620265 spm_kick_im_to_fetch: ptr = 000000004021eec2
5119 13:53:46.623891 spm_kick_im_to_fetch: len = 2988
5120 13:53:46.624389 SPM: spm_kick_pcm_to_run
5121 13:53:46.626511 SPM: spm_kick_pcm_to_run done
5122 13:53:46.630152 SPM: spm_init done in 52 msecs
5123 13:53:46.634046 Root Device init finished in 494993 usecs
5124 13:53:46.637234 CPU_CLUSTER: 0 init ...
5125 13:53:46.646876 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5126 13:53:46.649893 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5127 13:53:46.653736 CBFS @ 21000 size 3d4000
5128 13:53:46.657181 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5129 13:53:46.660568 CBFS: Locating 'sspm.bin'
5130 13:53:46.663390 CBFS: Found @ offset 208c0 size 41cb
5131 13:53:46.673917 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5132 13:53:46.681821 CPU_CLUSTER: 0 init finished in 42801 usecs
5133 13:53:46.682324 Devices initialized
5134 13:53:46.684450 Show all devs... After init.
5135 13:53:46.687815 Root Device: enabled 1
5136 13:53:46.688243 CPU_CLUSTER: 0: enabled 1
5137 13:53:46.691806 CPU: 00: enabled 1
5138 13:53:46.694703 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5139 13:53:46.697880 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5140 13:53:46.701215 ELOG: NV offset 0x558000 size 0x1000
5141 13:53:46.708557 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5142 13:53:46.715284 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5143 13:53:46.719050 ELOG: Event(17) added with size 13 at 2024-07-18 13:53:46 UTC
5144 13:53:46.725316 out: cmd=0x121: 03 db 21 01 00 00 00 00
5145 13:53:46.729017 in-header: 03 70 00 00 2c 00 00 00
5146 13:53:46.738825 in-data: 3c 48 00 00 00 00 00 00 02 10 00 00 06 80 00 00 dd 0f 01 00 06 80 00 00 9e 38 02 00 06 80 00 00 56 29 01 00 06 80 00 00 73 fa 01 00
5147 13:53:46.742555 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5148 13:53:46.745053 in-header: 03 19 00 00 08 00 00 00
5149 13:53:46.748746 in-data: a2 e0 47 00 13 00 00 00
5150 13:53:46.751998 Chrome EC: UHEPI supported
5151 13:53:46.759024 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5152 13:53:46.761862 in-header: 03 e1 00 00 08 00 00 00
5153 13:53:46.765123 in-data: 84 20 60 10 00 00 00 00
5154 13:53:46.768443 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5155 13:53:46.774820 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5156 13:53:46.778142 in-header: 03 e1 00 00 08 00 00 00
5157 13:53:46.782496 in-data: 84 20 60 10 00 00 00 00
5158 13:53:46.788250 ELOG: Event(A1) added with size 10 at 2024-07-18 13:53:47 UTC
5159 13:53:46.794769 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5160 13:53:46.798204 ELOG: Event(A0) added with size 9 at 2024-07-18 13:53:47 UTC
5161 13:53:46.805027 elog_add_boot_reason: Logged dev mode boot
5162 13:53:46.805529 Finalize devices...
5163 13:53:46.808350 Devices finalized
5164 13:53:46.811848 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5165 13:53:46.818023 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5166 13:53:46.821247 ELOG: Event(91) added with size 10 at 2024-07-18 13:53:47 UTC
5167 13:53:46.824379 Writing coreboot table at 0xffeda000
5168 13:53:46.827887 0. 0000000000114000-000000000011efff: RAMSTAGE
5169 13:53:46.834570 1. 0000000040000000-000000004023cfff: RAMSTAGE
5170 13:53:46.837994 2. 000000004023d000-00000000545fffff: RAM
5171 13:53:46.841762 3. 0000000054600000-000000005465ffff: BL31
5172 13:53:46.845114 4. 0000000054660000-00000000ffed9fff: RAM
5173 13:53:46.851924 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5174 13:53:46.855292 6. 0000000100000000-000000013fffffff: RAM
5175 13:53:46.857808 Passing 5 GPIOs to payload:
5176 13:53:46.861722 NAME | PORT | POLARITY | VALUE
5177 13:53:46.865282 write protect | 0x00000096 | low | high
5178 13:53:46.871746 EC in RW | 0x000000b1 | high | undefined
5179 13:53:46.874798 EC interrupt | 0x00000097 | low | undefined
5180 13:53:46.881524 TPM interrupt | 0x00000099 | high | undefined
5181 13:53:46.885164 speaker enable | 0x000000af | high | undefined
5182 13:53:46.888423 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5183 13:53:46.891241 in-header: 03 f7 00 00 02 00 00 00
5184 13:53:46.894923 in-data: 04 00
5185 13:53:46.895389 Board ID: 4
5186 13:53:46.897934 ADC[3]: Raw value=1034629 ID=8
5187 13:53:46.898329 RAM code: 8
5188 13:53:46.898719 SKU ID: 16
5189 13:53:46.904941 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5190 13:53:46.905483 CBFS @ 21000 size 3d4000
5191 13:53:46.911617 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5192 13:53:46.918025 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 5dbd
5193 13:53:46.921583 coreboot table: 940 bytes.
5194 13:53:46.924807 IMD ROOT 0. 00000000fffff000 00001000
5195 13:53:46.928442 IMD SMALL 1. 00000000ffffe000 00001000
5196 13:53:46.931393 CONSOLE 2. 00000000fffde000 00020000
5197 13:53:46.934919 FMAP 3. 00000000fffdd000 0000047c
5198 13:53:46.938282 TIME STAMP 4. 00000000fffdc000 00000910
5199 13:53:46.941584 RAMOOPS 5. 00000000ffedc000 00100000
5200 13:53:46.944961 COREBOOT 6. 00000000ffeda000 00002000
5201 13:53:46.948255 IMD small region:
5202 13:53:46.951661 IMD ROOT 0. 00000000ffffec00 00000400
5203 13:53:46.954592 VBOOT WORK 1. 00000000ffffeb00 00000100
5204 13:53:46.958057 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5205 13:53:46.961541 VPD 3. 00000000ffffea60 0000006c
5206 13:53:46.967827 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5207 13:53:46.974921 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5208 13:53:46.977847 in-header: 03 e1 00 00 08 00 00 00
5209 13:53:46.981982 in-data: 84 20 60 10 00 00 00 00
5210 13:53:46.984764 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5211 13:53:46.988360 CBFS @ 21000 size 3d4000
5212 13:53:46.991748 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5213 13:53:46.994662 CBFS: Locating 'fallback/payload'
5214 13:53:46.999837 CBFS: Found @ offset dc040 size 439a0
5215 13:53:47.090906 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5216 13:53:47.094331 Checking segment from ROM address 0x0000000040003a00
5217 13:53:47.101429 Checking segment from ROM address 0x0000000040003a1c
5218 13:53:47.104305 Loading segment from ROM address 0x0000000040003a00
5219 13:53:47.107841 code (compression=0)
5220 13:53:47.117702 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5221 13:53:47.123846 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5222 13:53:47.127257 it's not compressed!
5223 13:53:47.130669 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5224 13:53:47.137089 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5225 13:53:47.145370 Loading segment from ROM address 0x0000000040003a1c
5226 13:53:47.148820 Entry Point 0x0000000080000000
5227 13:53:47.149237 Loaded segments
5228 13:53:47.154972 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5229 13:53:47.158419 Jumping to boot code at 0000000080000000(00000000ffeda000)
5230 13:53:47.168162 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5231 13:53:47.171941 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5232 13:53:47.174695 CBFS @ 21000 size 3d4000
5233 13:53:47.182335 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5234 13:53:47.185277 CBFS: Locating 'fallback/bl31'
5235 13:53:47.188848 CBFS: Found @ offset 36dc0 size 5820
5236 13:53:47.199378 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5237 13:53:47.202276 Checking segment from ROM address 0x0000000040003a00
5238 13:53:47.209497 Checking segment from ROM address 0x0000000040003a1c
5239 13:53:47.213171 Loading segment from ROM address 0x0000000040003a00
5240 13:53:47.215907 code (compression=1)
5241 13:53:47.222553 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5242 13:53:47.232181 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5243 13:53:47.232585 using LZMA
5244 13:53:47.240752 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5245 13:53:47.247745 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5246 13:53:47.251055 Loading segment from ROM address 0x0000000040003a1c
5247 13:53:47.254486 Entry Point 0x0000000054601000
5248 13:53:47.254875 Loaded segments
5249 13:53:47.257932 NOTICE: MT8183 bl31_setup
5250 13:53:47.264641 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5251 13:53:47.268046 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5252 13:53:47.271672 INFO: [DEVAPC] dump DEVAPC registers:
5253 13:53:47.281510 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5254 13:53:47.287795 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5255 13:53:47.294924 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5256 13:53:47.304870 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5257 13:53:47.314964 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5258 13:53:47.321818 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5259 13:53:47.328452 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5260 13:53:47.338362 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5261 13:53:47.345042 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5262 13:53:47.355431 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5263 13:53:47.361517 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5264 13:53:47.371871 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5265 13:53:47.378439 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5266 13:53:47.384916 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5267 13:53:47.395488 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5268 13:53:47.401890 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5269 13:53:47.408491 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5270 13:53:47.415285 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5271 13:53:47.421712 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5272 13:53:47.431615 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5273 13:53:47.438284 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5274 13:53:47.444854 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5275 13:53:47.448208 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5276 13:53:47.451802 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5277 13:53:47.454668 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5278 13:53:47.458126 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5279 13:53:47.461503 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5280 13:53:47.468259 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5281 13:53:47.471196 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5282 13:53:47.474479 WARNING: region 0:
5283 13:53:47.478163 WARNING: apc:0x168, sa:0x0, ea:0xfff
5284 13:53:47.478586 WARNING: region 1:
5285 13:53:47.484300 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5286 13:53:47.484676 WARNING: region 2:
5287 13:53:47.487959 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5288 13:53:47.491098 WARNING: region 3:
5289 13:53:47.494670 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5290 13:53:47.495051 WARNING: region 4:
5291 13:53:47.497575 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5292 13:53:47.500769 WARNING: region 5:
5293 13:53:47.504074 WARNING: apc:0x0, sa:0x0, ea:0x0
5294 13:53:47.504469 WARNING: region 6:
5295 13:53:47.508106 WARNING: apc:0x0, sa:0x0, ea:0x0
5296 13:53:47.511020 WARNING: region 7:
5297 13:53:47.514697 WARNING: apc:0x0, sa:0x0, ea:0x0
5298 13:53:47.521448 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5299 13:53:47.524434 INFO: SPM: enable SPMC mode
5300 13:53:47.527920 NOTICE: spm_boot_init() start
5301 13:53:47.528332 NOTICE: spm_boot_init() end
5302 13:53:47.534567 INFO: BL31: Initializing runtime services
5303 13:53:47.537507 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5304 13:53:47.544465 INFO: BL31: Preparing for EL3 exit to normal world
5305 13:53:47.547397 INFO: Entry point address = 0x80000000
5306 13:53:47.547770 INFO: SPSR = 0x8
5307 13:53:47.571593
5308 13:53:47.572078
5309 13:53:47.572399
5310 13:53:47.573818 end: 2.2.3 depthcharge-start (duration 00:00:23) [common]
5311 13:53:47.574355 start: 2.2.4 bootloader-commands (timeout 00:04:28) [common]
5312 13:53:47.574767 Setting prompt string to ['jacuzzi:']
5313 13:53:47.575120 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:28)
5314 13:53:47.575738 Starting depthcharge on Juniper...
5315 13:53:47.576041
5316 13:53:47.578280 vboot_handoff: creating legacy vboot_handoff structure
5317 13:53:47.578657
5318 13:53:47.581784 ec_init(0): CrosEC protocol v3 supported (544, 544)
5319 13:53:47.582236
5320 13:53:47.585068 Wipe memory regions:
5321 13:53:47.585565
5322 13:53:47.587697 [0x00000040000000, 0x00000054600000)
5323 13:53:47.630597
5324 13:53:47.631075 [0x00000054660000, 0x00000080000000)
5325 13:53:47.721983
5326 13:53:47.722475 [0x000000811994a0, 0x000000ffeda000)
5327 13:53:47.982141
5328 13:53:47.982640 [0x00000100000000, 0x00000140000000)
5329 13:53:48.114698
5330 13:53:48.117639 Initializing XHCI USB controller at 0x11200000.
5331 13:53:48.140894
5332 13:53:48.143991 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5333 13:53:48.144414
5334 13:53:48.144739
5335 13:53:48.145442 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5336 13:53:48.145864 Sending line: 'tftpboot 192.168.201.1 14879057/tftp-deploy-fat42sxu/kernel/image.itb 14879057/tftp-deploy-fat42sxu/kernel/cmdline '
5338 13:53:48.247454 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5339 13:53:48.247926 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:27)
5340 13:53:48.252397 jacuzzi: tftpboot 192.168.201.1 14879057/tftp-deploy-fat42sxu/kernel/image.ittp-deploy-fat42sxu/kernel/cmdline
5341 13:53:48.252904
5342 13:53:48.253283 Waiting for link
5343 13:53:48.654699
5344 13:53:48.655192 R8152: Initializing
5345 13:53:48.655525
5346 13:53:48.658373 Version 9 (ocp_data = 6010)
5347 13:53:48.658793
5348 13:53:48.661609 R8152: Done initializing
5349 13:53:48.662001
5350 13:53:48.662295 Adding net device
5351 13:53:49.047082
5352 13:53:49.047708 done.
5353 13:53:49.048143
5354 13:53:49.048458 MAC: 00:e0:4c:71:a7:1f
5355 13:53:49.048758
5356 13:53:49.050049 Sending DHCP discover... done.
5357 13:53:49.050471
5358 13:53:49.053240 Waiting for reply... done.
5359 13:53:49.053829
5360 13:53:49.057078 Sending DHCP request... done.
5361 13:53:49.057809
5362 13:53:49.058173 Waiting for reply... done.
5363 13:53:49.058483
5364 13:53:49.060307 My ip is 192.168.201.23
5365 13:53:49.060801
5366 13:53:49.063717 The DHCP server ip is 192.168.201.1
5367 13:53:49.064218
5368 13:53:49.066741 TFTP server IP predefined by user: 192.168.201.1
5369 13:53:49.067167
5370 13:53:49.073500 Bootfile predefined by user: 14879057/tftp-deploy-fat42sxu/kernel/image.itb
5371 13:53:49.073959
5372 13:53:49.076638 Sending tftp read request... done.
5373 13:53:49.077058
5374 13:53:49.083503 Waiting for the transfer...
5375 13:53:49.083914
5376 13:53:49.393458 00000000 ################################################################
5377 13:53:49.393583
5378 13:53:49.693123 00080000 ################################################################
5379 13:53:49.693293
5380 13:53:49.993989 00100000 ################################################################
5381 13:53:49.994111
5382 13:53:50.293668 00180000 ################################################################
5383 13:53:50.293787
5384 13:53:50.578477 00200000 ################################################################
5385 13:53:50.578588
5386 13:53:50.880456 00280000 ################################################################
5387 13:53:50.880574
5388 13:53:51.181289 00300000 ################################################################
5389 13:53:51.181403
5390 13:53:51.483184 00380000 ################################################################
5391 13:53:51.483298
5392 13:53:51.784377 00400000 ################################################################
5393 13:53:51.784523
5394 13:53:52.085909 00480000 ################################################################
5395 13:53:52.086030
5396 13:53:52.387346 00500000 ################################################################
5397 13:53:52.387483
5398 13:53:52.690982 00580000 ################################################################
5399 13:53:52.691101
5400 13:53:52.991541 00600000 ################################################################
5401 13:53:52.991664
5402 13:53:53.296028 00680000 ################################################################
5403 13:53:53.296148
5404 13:53:53.599510 00700000 ################################################################
5405 13:53:53.599625
5406 13:53:53.903452 00780000 ################################################################
5407 13:53:53.903575
5408 13:53:54.207750 00800000 ################################################################
5409 13:53:54.207878
5410 13:53:54.509696 00880000 ################################################################
5411 13:53:54.509813
5412 13:53:54.789878 00900000 ################################################################
5413 13:53:54.790003
5414 13:53:55.091782 00980000 ################################################################
5415 13:53:55.091906
5416 13:53:55.395705 00a00000 ################################################################
5417 13:53:55.395830
5418 13:53:55.690754 00a80000 ################################################################
5419 13:53:55.690876
5420 13:53:55.994482 00b00000 ################################################################
5421 13:53:55.994631
5422 13:53:56.296910 00b80000 ################################################################
5423 13:53:56.297029
5424 13:53:56.601306 00c00000 ################################################################
5425 13:53:56.601415
5426 13:53:56.905005 00c80000 ################################################################
5427 13:53:56.905128
5428 13:53:57.208940 00d00000 ################################################################
5429 13:53:57.209058
5430 13:53:57.490577 00d80000 ################################################################
5431 13:53:57.490691
5432 13:53:57.751135 00e00000 ################################################################
5433 13:53:57.751264
5434 13:53:58.043293 00e80000 ################################################################
5435 13:53:58.043414
5436 13:53:58.342249 00f00000 ################################################################
5437 13:53:58.342371
5438 13:53:58.645974 00f80000 ################################################################
5439 13:53:58.646081
5440 13:53:58.949713 01000000 ################################################################
5441 13:53:58.949835
5442 13:53:59.281939 01080000 ################################################################
5443 13:53:59.282407
5444 13:53:59.679427 01100000 ################################################################
5445 13:53:59.680042
5446 13:54:00.063649 01180000 ################################################################
5447 13:54:00.064240
5448 13:54:00.458210 01200000 ################################################################
5449 13:54:00.458659
5450 13:54:00.845875 01280000 ################################################################
5451 13:54:00.846335
5452 13:54:01.174620 01300000 ################################################################
5453 13:54:01.174745
5454 13:54:01.472059 01380000 ################################################################
5455 13:54:01.472179
5456 13:54:01.772822 01400000 ################################################################
5457 13:54:01.772945
5458 13:54:02.072831 01480000 ################################################################
5459 13:54:02.072959
5460 13:54:02.376221 01500000 ################################################################
5461 13:54:02.376343
5462 13:54:02.672528 01580000 ################################################################
5463 13:54:02.672644
5464 13:54:02.956588 01600000 ################################################################
5465 13:54:02.956706
5466 13:54:03.251143 01680000 ################################################################
5467 13:54:03.251267
5468 13:54:03.550881 01700000 ################################################################
5469 13:54:03.551015
5470 13:54:03.854342 01780000 ################################################################
5471 13:54:03.854464
5472 13:54:04.154102 01800000 ################################################################
5473 13:54:04.154239
5474 13:54:04.453835 01880000 ################################################################
5475 13:54:04.453969
5476 13:54:04.754592 01900000 ################################################################
5477 13:54:04.754721
5478 13:54:05.052872 01980000 ################################################################
5479 13:54:05.053022
5480 13:54:05.355700 01a00000 ################################################################
5481 13:54:05.355845
5482 13:54:05.659063 01a80000 ################################################################
5483 13:54:05.659201
5484 13:54:05.959960 01b00000 ################################################################
5485 13:54:05.960084
5486 13:54:06.252336 01b80000 ################################################################
5487 13:54:06.252482
5488 13:54:06.538717 01c00000 ################################################################
5489 13:54:06.538831
5490 13:54:06.836858 01c80000 ################################################################
5491 13:54:06.836977
5492 13:54:07.132973 01d00000 ################################################################
5493 13:54:07.133095
5494 13:54:07.431978 01d80000 ################################################################
5495 13:54:07.432099
5496 13:54:07.734554 01e00000 ################################################################
5497 13:54:07.734665
5498 13:54:08.037869 01e80000 ################################################################
5499 13:54:08.037999
5500 13:54:08.341918 01f00000 ################################################################
5501 13:54:08.342038
5502 13:54:08.645434 01f80000 ################################################################
5503 13:54:08.645545
5504 13:54:08.948928 02000000 ################################################################
5505 13:54:08.949049
5506 13:54:09.253403 02080000 ################################################################
5507 13:54:09.253522
5508 13:54:09.555709 02100000 ################################################################
5509 13:54:09.555818
5510 13:54:09.860342 02180000 ################################################################
5511 13:54:09.860465
5512 13:54:10.163664 02200000 ################################################################
5513 13:54:10.163782
5514 13:54:10.468497 02280000 ################################################################
5515 13:54:10.468617
5516 13:54:10.771650 02300000 ################################################################
5517 13:54:10.771776
5518 13:54:11.074762 02380000 ################################################################
5519 13:54:11.074885
5520 13:54:11.378967 02400000 ################################################################
5521 13:54:11.379092
5522 13:54:11.683043 02480000 ################################################################
5523 13:54:11.683160
5524 13:54:11.987980 02500000 ################################################################
5525 13:54:11.988099
5526 13:54:12.292279 02580000 ################################################################
5527 13:54:12.292402
5528 13:54:12.595685 02600000 ################################################################
5529 13:54:12.595794
5530 13:54:12.893508 02680000 ################################################################
5531 13:54:12.893631
5532 13:54:13.154476 02700000 ################################################################
5533 13:54:13.154594
5534 13:54:13.451101 02780000 ################################################################
5535 13:54:13.451219
5536 13:54:13.749786 02800000 ################################################################
5537 13:54:13.749903
5538 13:54:14.048321 02880000 ################################################################
5539 13:54:14.048443
5540 13:54:14.346045 02900000 ################################################################
5541 13:54:14.346185
5542 13:54:14.644588 02980000 ################################################################
5543 13:54:14.644698
5544 13:54:14.925617 02a00000 ################################################################
5545 13:54:14.925740
5546 13:54:15.192301 02a80000 ################################################################
5547 13:54:15.192425
5548 13:54:15.467967 02b00000 ################################################################
5549 13:54:15.468081
5550 13:54:15.764595 02b80000 ################################################################
5551 13:54:15.764710
5552 13:54:16.019388 02c00000 ################################################################
5553 13:54:16.019506
5554 13:54:16.305413 02c80000 ################################################################
5555 13:54:16.305538
5556 13:54:16.604705 02d00000 ################################################################
5557 13:54:16.604814
5558 13:54:16.901401 02d80000 ################################################################
5559 13:54:16.901523
5560 13:54:17.185598 02e00000 ################################################################
5561 13:54:17.185721
5562 13:54:17.467108 02e80000 ################################################################
5563 13:54:17.467231
5564 13:54:17.749811 02f00000 ################################################################
5565 13:54:17.749926
5566 13:54:18.047682 02f80000 ################################################################
5567 13:54:18.047800
5568 13:54:18.334285 03000000 ################################################################
5569 13:54:18.334408
5570 13:54:18.637756 03080000 ################################################################
5571 13:54:18.637868
5572 13:54:18.931171 03100000 ################################################################
5573 13:54:18.931320
5574 13:54:19.234035 03180000 ################################################################
5575 13:54:19.234157
5576 13:54:19.528465 03200000 ################################################################
5577 13:54:19.528589
5578 13:54:19.787507 03280000 ################################################################
5579 13:54:19.787624
5580 13:54:20.041263 03300000 ################################################################
5581 13:54:20.041386
5582 13:54:20.335661 03380000 ################################################################
5583 13:54:20.335780
5584 13:54:20.633614 03400000 ################################################################
5585 13:54:20.633721
5586 13:54:20.924039 03480000 ################################################################
5587 13:54:20.924165
5588 13:54:21.177102 03500000 ################################################################
5589 13:54:21.177230
5590 13:54:21.432416 03580000 ################################################################
5591 13:54:21.432531
5592 13:54:21.690904 03600000 ################################################################
5593 13:54:21.691047
5594 13:54:21.945488 03680000 ################################################################
5595 13:54:21.945602
5596 13:54:22.217251 03700000 ################################################################
5597 13:54:22.217373
5598 13:54:22.493695 03780000 ################################################################
5599 13:54:22.493802
5600 13:54:22.782222 03800000 ################################################################
5601 13:54:22.782335
5602 13:54:23.037315 03880000 ################################################################
5603 13:54:23.037433
5604 13:54:23.330536 03900000 ################################################################
5605 13:54:23.330654
5606 13:54:23.610474 03980000 ################################################################
5607 13:54:23.610592
5608 13:54:23.874565 03a00000 ################################################################
5609 13:54:23.874684
5610 13:54:24.139576 03a80000 ################################################################
5611 13:54:24.139701
5612 13:54:24.392946 03b00000 ################################################################
5613 13:54:24.393060
5614 13:54:24.647737 03b80000 ################################################################
5615 13:54:24.647863
5616 13:54:24.919950 03c00000 ################################################################
5617 13:54:24.920071
5618 13:54:25.201073 03c80000 ################################################################
5619 13:54:25.201241
5620 13:54:25.495785 03d00000 ################################################################
5621 13:54:25.495928
5622 13:54:25.794052 03d80000 ################################################################
5623 13:54:25.794164
5624 13:54:26.076453 03e00000 ################################################################
5625 13:54:26.076586
5626 13:54:26.336482 03e80000 ################################################################
5627 13:54:26.336606
5628 13:54:26.636583 03f00000 ################################################################
5629 13:54:26.636699
5630 13:54:26.921470 03f80000 ################################################################
5631 13:54:26.921588
5632 13:54:27.203717 04000000 ################################################################
5633 13:54:27.203834
5634 13:54:27.470798 04080000 ################################################################
5635 13:54:27.470917
5636 13:54:27.730540 04100000 ################################################################
5637 13:54:27.730651
5638 13:54:28.015787 04180000 ################################################################
5639 13:54:28.015909
5640 13:54:28.265051 04200000 ################################################################
5641 13:54:28.265178
5642 13:54:28.524249 04280000 ################################################################
5643 13:54:28.524395
5644 13:54:28.820411 04300000 ################################################################
5645 13:54:28.820521
5646 13:54:29.124630 04380000 ################################################################
5647 13:54:29.124752
5648 13:54:29.421152 04400000 ################################################################
5649 13:54:29.421273
5650 13:54:29.707013 04480000 ################################################################
5651 13:54:29.707124
5652 13:54:30.000062 04500000 ################################################################
5653 13:54:30.000217
5654 13:54:30.289647 04580000 ################################################################
5655 13:54:30.289765
5656 13:54:30.582984 04600000 ################################################################
5657 13:54:30.583105
5658 13:54:30.719193 04680000 ############################## done.
5659 13:54:30.719307
5660 13:54:30.723522 The bootfile was 74168438 bytes long.
5661 13:54:30.723606
5662 13:54:30.726379 Sending tftp read request... done.
5663 13:54:30.726528
5664 13:54:30.726611 Waiting for the transfer...
5665 13:54:30.726686
5666 13:54:30.729456 00000000 # done.
5667 13:54:30.729571
5668 13:54:30.736507 Command line loaded dynamically from TFTP file: 14879057/tftp-deploy-fat42sxu/kernel/cmdline
5669 13:54:30.736671
5670 13:54:30.753063 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5671 13:54:30.753287
5672 13:54:30.756445 Loading FIT.
5673 13:54:30.756604
5674 13:54:30.759522 Image ramdisk-1 has 60994231 bytes.
5675 13:54:30.759710
5676 13:54:30.759854 Image fdt-1 has 57695 bytes.
5677 13:54:30.759987
5678 13:54:30.762934 Image kernel-1 has 13114469 bytes.
5679 13:54:30.763187
5680 13:54:30.773117 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5681 13:54:30.773427
5682 13:54:30.786807 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5683 13:54:30.787279
5684 13:54:30.790400 Choosing best match conf-1 for compat google,juniper-sku16.
5685 13:54:30.794937
5686 13:54:30.799419 Connected to device vid:did:rid of 1ae0:0028:00
5687 13:54:30.805891
5688 13:54:30.809377 tpm_get_response: command 0x17b, return code 0x0
5689 13:54:30.809768
5690 13:54:30.813043 tpm_cleanup: add release locality here.
5691 13:54:30.813505
5692 13:54:30.816408 Shutting down all USB controllers.
5693 13:54:30.816798
5694 13:54:30.820286 Removing current net device
5695 13:54:30.820866
5696 13:54:30.823210 Exiting depthcharge with code 4 at timestamp: 59669160
5697 13:54:30.823608
5698 13:54:30.826156 LZMA decompressing kernel-1 to 0x80193568
5699 13:54:30.826562
5700 13:54:30.832726 LZMA decompressing kernel-1 to 0x40000000
5701 13:54:32.695542
5702 13:54:32.696039 jumping to kernel
5703 13:54:32.698316 end: 2.2.4 bootloader-commands (duration 00:00:45) [common]
5704 13:54:32.698810 start: 2.2.5 auto-login-action (timeout 00:03:43) [common]
5705 13:54:32.699186 Setting prompt string to ['Linux version [0-9]']
5706 13:54:32.699529 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5707 13:54:32.699876 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5708 13:54:32.770105
5709 13:54:32.773406 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5710 13:54:32.777251 start: 2.2.5.1 login-action (timeout 00:03:42) [common]
5711 13:54:32.777734 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5712 13:54:32.778107 Setting prompt string to []
5713 13:54:32.778514 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5714 13:54:32.778868 Using line separator: #'\n'#
5715 13:54:32.779168 No login prompt set.
5716 13:54:32.779496 Parsing kernel messages
5717 13:54:32.779950 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5718 13:54:32.780502 [login-action] Waiting for messages, (timeout 00:03:42)
5719 13:54:32.780853 Waiting using forced prompt support (timeout 00:01:51)
5720 13:54:32.796736 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j272990-arm64-gcc-12-defconfig-arm64-chromebook-fgzcq) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Thu Jul 18 12:53:03 UTC 2024
5721 13:54:32.800600 [ 0.000000] random: crng init done
5722 13:54:32.804018 [ 0.000000] Machine model: Google juniper sku16 board
5723 13:54:32.807365 [ 0.000000] efi: UEFI not found.
5724 13:54:32.816831 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5725 13:54:32.823459 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5726 13:54:32.829868 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5727 13:54:32.836251 [ 0.000000] printk: bootconsole [mtk8250] enabled
5728 13:54:32.844527 [ 0.000000] NUMA: No NUMA configuration found
5729 13:54:32.850693 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5730 13:54:32.857964 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5731 13:54:32.858456 [ 0.000000] Zone ranges:
5732 13:54:32.864042 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5733 13:54:32.867273 [ 0.000000] DMA32 empty
5734 13:54:32.874541 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5735 13:54:32.877897 [ 0.000000] Movable zone start for each node
5736 13:54:32.881051 [ 0.000000] Early memory node ranges
5737 13:54:32.887967 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5738 13:54:32.894894 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5739 13:54:32.901086 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5740 13:54:32.907528 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5741 13:54:32.914309 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5742 13:54:32.920882 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5743 13:54:32.941180 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5744 13:54:32.947403 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5745 13:54:32.954373 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5746 13:54:32.957789 [ 0.000000] psci: probing for conduit method from DT.
5747 13:54:32.964652 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5748 13:54:32.967490 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5749 13:54:32.973934 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5750 13:54:32.977593 [ 0.000000] psci: SMC Calling Convention v1.1
5751 13:54:32.984371 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5752 13:54:32.987653 [ 0.000000] Detected VIPT I-cache on CPU0
5753 13:54:32.994510 [ 0.000000] CPU features: detected: GIC system register CPU interface
5754 13:54:33.001349 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5755 13:54:33.007370 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5756 13:54:33.011509 [ 0.000000] CPU features: detected: ARM erratum 845719
5757 13:54:33.017490 [ 0.000000] alternatives: applying boot alternatives
5758 13:54:33.020965 [ 0.000000] Fallback order for Node 0: 0
5759 13:54:33.027609 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5760 13:54:33.031014 [ 0.000000] Policy zone: Normal
5761 13:54:33.051215 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5762 13:54:33.061219 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5763 13:54:33.070933 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5764 13:54:33.078395 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5765 13:54:33.087900 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5766 13:54:33.091078 <6>[ 0.000000] software IO TLB: area num 8.
5767 13:54:33.116464 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5768 13:54:33.173770 <6>[ 0.000000] Memory: 3855512K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 302952K reserved, 32768K cma-reserved)
5769 13:54:33.180225 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5770 13:54:33.186699 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5771 13:54:33.190170 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5772 13:54:33.196772 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5773 13:54:33.203657 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5774 13:54:33.206608 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5775 13:54:33.216737 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5776 13:54:33.223662 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5777 13:54:33.226742 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5778 13:54:33.238631 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5779 13:54:33.244910 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5780 13:54:33.248424 <6>[ 0.000000] GICv3: 640 SPIs implemented
5781 13:54:33.251632 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5782 13:54:33.258600 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5783 13:54:33.261956 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5784 13:54:33.268698 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5785 13:54:33.278847 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5786 13:54:33.292035 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5787 13:54:33.298245 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5788 13:54:33.310247 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5789 13:54:33.323435 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5790 13:54:33.330197 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5791 13:54:33.337264 <6>[ 0.009475] Console: colour dummy device 80x25
5792 13:54:33.340721 <6>[ 0.014506] printk: console [tty1] enabled
5793 13:54:33.350456 <6>[ 0.018898] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5794 13:54:33.357389 <6>[ 0.029363] pid_max: default: 32768 minimum: 301
5795 13:54:33.360388 <6>[ 0.034244] LSM: Security Framework initializing
5796 13:54:33.370096 <6>[ 0.039160] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5797 13:54:33.377093 <6>[ 0.046783] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5798 13:54:33.383945 <4>[ 0.055662] cacheinfo: Unable to detect cache hierarchy for CPU 0
5799 13:54:33.394510 <6>[ 0.062289] cblist_init_generic: Setting adjustable number of callback queues.
5800 13:54:33.397841 <6>[ 0.069734] cblist_init_generic: Setting shift to 3 and lim to 1.
5801 13:54:33.407354 <6>[ 0.076087] cblist_init_generic: Setting adjustable number of callback queues.
5802 13:54:33.413952 <6>[ 0.083531] cblist_init_generic: Setting shift to 3 and lim to 1.
5803 13:54:33.417479 <6>[ 0.089931] rcu: Hierarchical SRCU implementation.
5804 13:54:33.424419 <6>[ 0.094956] rcu: Max phase no-delay instances is 1000.
5805 13:54:33.430734 <6>[ 0.102882] EFI services will not be available.
5806 13:54:33.434339 <6>[ 0.107832] smp: Bringing up secondary CPUs ...
5807 13:54:33.444877 <6>[ 0.113060] Detected VIPT I-cache on CPU1
5808 13:54:33.451533 <4>[ 0.113108] cacheinfo: Unable to detect cache hierarchy for CPU 1
5809 13:54:33.458292 <6>[ 0.113116] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5810 13:54:33.464953 <6>[ 0.113148] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5811 13:54:33.468405 <6>[ 0.113628] Detected VIPT I-cache on CPU2
5812 13:54:33.474971 <4>[ 0.113662] cacheinfo: Unable to detect cache hierarchy for CPU 2
5813 13:54:33.481714 <6>[ 0.113666] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5814 13:54:33.488099 <6>[ 0.113679] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5815 13:54:33.491543 <6>[ 0.114125] Detected VIPT I-cache on CPU3
5816 13:54:33.498486 <4>[ 0.114155] cacheinfo: Unable to detect cache hierarchy for CPU 3
5817 13:54:33.504411 <6>[ 0.114159] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5818 13:54:33.511578 <6>[ 0.114171] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5819 13:54:33.518069 <6>[ 0.114746] CPU features: detected: Spectre-v2
5820 13:54:33.521181 <6>[ 0.114756] CPU features: detected: Spectre-BHB
5821 13:54:33.528181 <6>[ 0.114759] CPU features: detected: ARM erratum 858921
5822 13:54:33.531257 <6>[ 0.114765] Detected VIPT I-cache on CPU4
5823 13:54:33.538150 <4>[ 0.114812] cacheinfo: Unable to detect cache hierarchy for CPU 4
5824 13:54:33.544697 <6>[ 0.114820] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5825 13:54:33.551617 <6>[ 0.114828] arch_timer: Enabling local workaround for ARM erratum 858921
5826 13:54:33.558047 <6>[ 0.114839] arch_timer: CPU4: Trapping CNTVCT access
5827 13:54:33.565037 <6>[ 0.114846] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5828 13:54:33.568173 <6>[ 0.115333] Detected VIPT I-cache on CPU5
5829 13:54:33.574614 <4>[ 0.115372] cacheinfo: Unable to detect cache hierarchy for CPU 5
5830 13:54:33.581350 <6>[ 0.115377] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5831 13:54:33.587905 <6>[ 0.115384] arch_timer: Enabling local workaround for ARM erratum 858921
5832 13:54:33.594832 <6>[ 0.115391] arch_timer: CPU5: Trapping CNTVCT access
5833 13:54:33.601453 <6>[ 0.115396] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5834 13:54:33.604326 <6>[ 0.115833] Detected VIPT I-cache on CPU6
5835 13:54:33.610936 <4>[ 0.115878] cacheinfo: Unable to detect cache hierarchy for CPU 6
5836 13:54:33.617939 <6>[ 0.115884] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5837 13:54:33.624442 <6>[ 0.115891] arch_timer: Enabling local workaround for ARM erratum 858921
5838 13:54:33.631093 <6>[ 0.115897] arch_timer: CPU6: Trapping CNTVCT access
5839 13:54:33.637644 <6>[ 0.115902] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5840 13:54:33.641280 <6>[ 0.116433] Detected VIPT I-cache on CPU7
5841 13:54:33.648189 <4>[ 0.116475] cacheinfo: Unable to detect cache hierarchy for CPU 7
5842 13:54:33.654449 <6>[ 0.116481] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5843 13:54:33.661128 <6>[ 0.116488] arch_timer: Enabling local workaround for ARM erratum 858921
5844 13:54:33.668057 <6>[ 0.116495] arch_timer: CPU7: Trapping CNTVCT access
5845 13:54:33.674158 <6>[ 0.116500] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5846 13:54:33.677422 <6>[ 0.116547] smp: Brought up 1 node, 8 CPUs
5847 13:54:33.684648 <6>[ 0.355452] SMP: Total of 8 processors activated.
5848 13:54:33.687592 <6>[ 0.360387] CPU features: detected: 32-bit EL0 Support
5849 13:54:33.694592 <6>[ 0.365766] CPU features: detected: 32-bit EL1 Support
5850 13:54:33.701312 <6>[ 0.371134] CPU features: detected: CRC32 instructions
5851 13:54:33.705214 <6>[ 0.376559] CPU: All CPU(s) started at EL2
5852 13:54:33.711344 <6>[ 0.380897] alternatives: applying system-wide alternatives
5853 13:54:33.714520 <6>[ 0.388940] devtmpfs: initialized
5854 13:54:33.729912 <6>[ 0.397858] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5855 13:54:33.739508 <6>[ 0.407807] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5856 13:54:33.742508 <6>[ 0.415530] pinctrl core: initialized pinctrl subsystem
5857 13:54:33.750937 <6>[ 0.422642] DMI not present or invalid.
5858 13:54:33.757454 <6>[ 0.427010] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5859 13:54:33.764132 <6>[ 0.433910] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5860 13:54:33.774043 <6>[ 0.441438] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5861 13:54:33.780665 <6>[ 0.449688] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5862 13:54:33.787140 <6>[ 0.457863] audit: initializing netlink subsys (disabled)
5863 13:54:33.793805 <5>[ 0.463568] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
5864 13:54:33.800968 <6>[ 0.464561] thermal_sys: Registered thermal governor 'step_wise'
5865 13:54:33.807417 <6>[ 0.471534] thermal_sys: Registered thermal governor 'power_allocator'
5866 13:54:33.810822 <6>[ 0.477834] cpuidle: using governor menu
5867 13:54:33.817107 <6>[ 0.488799] NET: Registered PF_QIPCRTR protocol family
5868 13:54:33.824283 <6>[ 0.494283] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5869 13:54:33.830328 <6>[ 0.501381] ASID allocator initialised with 32768 entries
5870 13:54:33.834023 <6>[ 0.508149] Serial: AMBA PL011 UART driver
5871 13:54:33.847345 <4>[ 0.519495] Trying to register duplicate clock ID: 113
5872 13:54:33.907927 <6>[ 0.576093] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5873 13:54:33.922317 <6>[ 0.590491] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5874 13:54:33.925402 <6>[ 0.600268] KASLR enabled
5875 13:54:33.939818 <6>[ 0.608235] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5876 13:54:33.947103 <6>[ 0.615238] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5877 13:54:33.953362 <6>[ 0.621714] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5878 13:54:33.960146 <6>[ 0.628704] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5879 13:54:33.966568 <6>[ 0.635178] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5880 13:54:33.973212 <6>[ 0.642169] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5881 13:54:33.979618 <6>[ 0.648643] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5882 13:54:33.986428 <6>[ 0.655633] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5883 13:54:33.989923 <6>[ 0.663200] ACPI: Interpreter disabled.
5884 13:54:33.999539 <6>[ 0.671189] iommu: Default domain type: Translated
5885 13:54:34.006627 <6>[ 0.676296] iommu: DMA domain TLB invalidation policy: strict mode
5886 13:54:34.009333 <5>[ 0.682926] SCSI subsystem initialized
5887 13:54:34.016254 <6>[ 0.687336] usbcore: registered new interface driver usbfs
5888 13:54:34.022633 <6>[ 0.693065] usbcore: registered new interface driver hub
5889 13:54:34.025856 <6>[ 0.698606] usbcore: registered new device driver usb
5890 13:54:34.033045 <6>[ 0.704918] pps_core: LinuxPPS API ver. 1 registered
5891 13:54:34.043327 <6>[ 0.710102] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5892 13:54:34.046193 <6>[ 0.719427] PTP clock support registered
5893 13:54:34.049725 <6>[ 0.723680] EDAC MC: Ver: 3.0.0
5894 13:54:34.057516 <6>[ 0.729330] FPGA manager framework
5895 13:54:34.064207 <6>[ 0.733016] Advanced Linux Sound Architecture Driver Initialized.
5896 13:54:34.067713 <6>[ 0.739776] vgaarb: loaded
5897 13:54:34.074117 <6>[ 0.742897] clocksource: Switched to clocksource arch_sys_counter
5898 13:54:34.077317 <5>[ 0.749328] VFS: Disk quotas dquot_6.6.0
5899 13:54:34.084341 <6>[ 0.753503] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5900 13:54:34.087084 <6>[ 0.760678] pnp: PnP ACPI: disabled
5901 13:54:34.096361 <6>[ 0.767569] NET: Registered PF_INET protocol family
5902 13:54:34.102416 <6>[ 0.772801] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5903 13:54:34.113899 <6>[ 0.782712] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5904 13:54:34.121091 <6>[ 0.791466] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5905 13:54:34.131409 <6>[ 0.799416] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5906 13:54:34.137519 <6>[ 0.807648] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5907 13:54:34.144100 <6>[ 0.815742] TCP: Hash tables configured (established 32768 bind 32768)
5908 13:54:34.154348 <6>[ 0.822569] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5909 13:54:34.160992 <6>[ 0.829543] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5910 13:54:34.167624 <6>[ 0.837024] NET: Registered PF_UNIX/PF_LOCAL protocol family
5911 13:54:34.173854 <6>[ 0.843122] RPC: Registered named UNIX socket transport module.
5912 13:54:34.177394 <6>[ 0.849265] RPC: Registered udp transport module.
5913 13:54:34.184360 <6>[ 0.854190] RPC: Registered tcp transport module.
5914 13:54:34.190646 <6>[ 0.859113] RPC: Registered tcp NFSv4.1 backchannel transport module.
5915 13:54:34.193708 <6>[ 0.865764] PCI: CLS 0 bytes, default 64
5916 13:54:34.197116 <6>[ 0.870055] Unpacking initramfs...
5917 13:54:34.210997 <6>[ 0.879599] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5918 13:54:34.221077 <6>[ 0.888222] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5919 13:54:34.224715 <6>[ 0.897076] kvm [1]: IPA Size Limit: 40 bits
5920 13:54:34.231712 <6>[ 0.903401] kvm [1]: vgic-v2@c420000
5921 13:54:34.235208 <6>[ 0.907218] kvm [1]: GIC system register CPU interface enabled
5922 13:54:34.243023 <6>[ 0.914959] kvm [1]: vgic interrupt IRQ18
5923 13:54:34.246421 <6>[ 0.919330] kvm [1]: Hyp mode initialized successfully
5924 13:54:34.253703 <5>[ 0.925685] Initialise system trusted keyrings
5925 13:54:34.260243 <6>[ 0.930534] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5926 13:54:34.268802 <6>[ 0.940462] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5927 13:54:34.275839 <5>[ 0.946930] NFS: Registering the id_resolver key type
5928 13:54:34.278849 <5>[ 0.952235] Key type id_resolver registered
5929 13:54:34.285634 <5>[ 0.956651] Key type id_legacy registered
5930 13:54:34.292105 <6>[ 0.960962] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5931 13:54:34.298594 <6>[ 0.967887] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5932 13:54:34.304953 <6>[ 0.975633] 9p: Installing v9fs 9p2000 file system support
5933 13:54:34.332222 <5>[ 1.004324] Key type asymmetric registered
5934 13:54:34.335978 <5>[ 1.008669] Asymmetric key parser 'x509' registered
5935 13:54:34.346262 <6>[ 1.013831] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5936 13:54:34.349311 <6>[ 1.021447] io scheduler mq-deadline registered
5937 13:54:34.352304 <6>[ 1.026204] io scheduler kyber registered
5938 13:54:34.375187 <6>[ 1.047033] EINJ: ACPI disabled.
5939 13:54:34.381847 <4>[ 1.050785] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5940 13:54:34.420191 <6>[ 1.091761] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5941 13:54:34.428693 <6>[ 1.100296] printk: console [ttyS0] disabled
5942 13:54:34.456401 <6>[ 1.124942] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5943 13:54:34.463236 <6>[ 1.134420] printk: console [ttyS0] enabled
5944 13:54:34.466376 <6>[ 1.134420] printk: console [ttyS0] enabled
5945 13:54:34.473445 <6>[ 1.143341] printk: bootconsole [mtk8250] disabled
5946 13:54:34.476354 <6>[ 1.143341] printk: bootconsole [mtk8250] disabled
5947 13:54:34.486354 <3>[ 1.153878] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5948 13:54:34.492828 <3>[ 1.162259] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5949 13:54:34.522495 <6>[ 1.190683] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5950 13:54:34.528966 <6>[ 1.200351] serial serial0: tty port ttyS1 registered
5951 13:54:34.535663 <6>[ 1.206950] SuperH (H)SCI(F) driver initialized
5952 13:54:34.538594 <6>[ 1.212427] msm_serial: driver initialized
5953 13:54:34.554036 <6>[ 1.222703] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5954 13:54:34.564591 <6>[ 1.231307] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5955 13:54:34.570756 <6>[ 1.239888] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5956 13:54:34.580962 <6>[ 1.248463] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5957 13:54:34.587457 <6>[ 1.257122] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5958 13:54:34.597634 <6>[ 1.265786] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5959 13:54:34.607421 <6>[ 1.274527] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5960 13:54:34.614137 <6>[ 1.283272] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5961 13:54:34.623996 <6>[ 1.291840] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5962 13:54:34.634045 <6>[ 1.300642] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5963 13:54:34.641337 <4>[ 1.313111] cacheinfo: Unable to detect cache hierarchy for CPU 0
5964 13:54:34.650861 <6>[ 1.322443] loop: module loaded
5965 13:54:34.662774 <6>[ 1.334394] vsim1: Bringing 1800000uV into 2700000-2700000uV
5966 13:54:34.680379 <6>[ 1.352418] megasas: 07.719.03.00-rc1
5967 13:54:34.689040 <6>[ 1.361178] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5968 13:54:34.702649 <6>[ 1.374298] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5969 13:54:34.719293 <6>[ 1.391192] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5970 13:54:34.775186 <6>[ 1.439966] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5971 13:54:36.264297 <6>[ 2.936418] Freeing initrd memory: 59560K
5972 13:54:36.279887 <4>[ 2.948562] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5973 13:54:36.287168 <4>[ 2.957812] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
5974 13:54:36.293321 <4>[ 2.964511] Hardware name: Google juniper sku16 board (DT)
5975 13:54:36.297051 <4>[ 2.970250] Call trace:
5976 13:54:36.300239 <4>[ 2.972950] dump_backtrace.part.0+0xe0/0xf0
5977 13:54:36.303447 <4>[ 2.977488] show_stack+0x18/0x30
5978 13:54:36.306586 <4>[ 2.981060] dump_stack_lvl+0x64/0x80
5979 13:54:36.313262 <4>[ 2.984981] dump_stack+0x18/0x34
5980 13:54:36.316498 <4>[ 2.988550] sysfs_warn_dup+0x64/0x80
5981 13:54:36.319794 <4>[ 2.992471] sysfs_do_create_link_sd+0xf0/0x100
5982 13:54:36.323143 <4>[ 2.997258] sysfs_create_link+0x20/0x40
5983 13:54:36.329731 <4>[ 3.001437] bus_add_device+0x64/0x120
5984 13:54:36.332876 <4>[ 3.005443] device_add+0x354/0x7ec
5985 13:54:36.336127 <4>[ 3.009188] of_device_add+0x44/0x60
5986 13:54:36.342830 <4>[ 3.013021] of_platform_device_create_pdata+0x90/0x124
5987 13:54:36.346494 <4>[ 3.018503] of_platform_bus_create+0x154/0x380
5988 13:54:36.350106 <4>[ 3.023289] of_platform_populate+0x50/0xfc
5989 13:54:36.356127 <4>[ 3.027727] parse_mtd_partitions+0x1d8/0x4e0
5990 13:54:36.359636 <4>[ 3.032343] mtd_device_parse_register+0xec/0x2e0
5991 13:54:36.366176 <4>[ 3.037303] spi_nor_probe+0x280/0x2f4
5992 13:54:36.369677 <4>[ 3.041309] spi_mem_probe+0x6c/0xc0
5993 13:54:36.372819 <4>[ 3.045141] spi_probe+0x84/0xe4
5994 13:54:36.376494 <4>[ 3.048626] really_probe+0xbc/0x2dc
5995 13:54:36.379503 <4>[ 3.052457] __driver_probe_device+0x78/0x114
5996 13:54:36.385905 <4>[ 3.057068] driver_probe_device+0xd8/0x15c
5997 13:54:36.389813 <4>[ 3.061505] __device_attach_driver+0xb8/0x134
5998 13:54:36.392679 <4>[ 3.066204] bus_for_each_drv+0x7c/0xd4
5999 13:54:36.395632 <4>[ 3.070297] __device_attach+0x9c/0x1a0
6000 13:54:36.402665 <4>[ 3.074387] device_initial_probe+0x14/0x20
6001 13:54:36.405919 <4>[ 3.078825] bus_probe_device+0x98/0xa0
6002 13:54:36.409177 <4>[ 3.082916] device_add+0x3c0/0x7ec
6003 13:54:36.412456 <4>[ 3.086660] __spi_add_device+0x78/0x120
6004 13:54:36.419170 <4>[ 3.090838] spi_add_device+0x44/0x80
6005 13:54:36.422753 <4>[ 3.094755] spi_register_controller+0x704/0xb20
6006 13:54:36.428782 <4>[ 3.099628] devm_spi_register_controller+0x4c/0xac
6007 13:54:36.432025 <4>[ 3.104760] mtk_spi_probe+0x4f4/0x684
6008 13:54:36.435923 <4>[ 3.108765] platform_probe+0x68/0xc0
6009 13:54:36.438833 <4>[ 3.112683] really_probe+0xbc/0x2dc
6010 13:54:36.446104 <4>[ 3.116514] __driver_probe_device+0x78/0x114
6011 13:54:36.449118 <4>[ 3.121124] driver_probe_device+0xd8/0x15c
6012 13:54:36.452410 <4>[ 3.125562] __driver_attach+0x94/0x19c
6013 13:54:36.455157 <4>[ 3.129653] bus_for_each_dev+0x74/0xd0
6014 13:54:36.461982 <4>[ 3.133745] driver_attach+0x24/0x30
6015 13:54:36.465574 <4>[ 3.137574] bus_add_driver+0x154/0x20c
6016 13:54:36.468848 <4>[ 3.141664] driver_register+0x78/0x130
6017 13:54:36.475274 <4>[ 3.145755] __platform_driver_register+0x28/0x34
6018 13:54:36.478811 <4>[ 3.150715] mtk_spi_driver_init+0x1c/0x28
6019 13:54:36.482427 <4>[ 3.155070] do_one_initcall+0x64/0x1dc
6020 13:54:36.488934 <4>[ 3.159161] kernel_init_freeable+0x218/0x284
6021 13:54:36.492324 <4>[ 3.163777] kernel_init+0x24/0x12c
6022 13:54:36.495379 <4>[ 3.167521] ret_from_fork+0x10/0x20
6023 13:54:36.505199 <6>[ 3.176404] tun: Universal TUN/TAP device driver, 1.6
6024 13:54:36.508062 <6>[ 3.182708] thunder_xcv, ver 1.0
6025 13:54:36.511724 <6>[ 3.186229] thunder_bgx, ver 1.0
6026 13:54:36.514582 <6>[ 3.189733] nicpf, ver 1.0
6027 13:54:36.525459 <6>[ 3.194110] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6028 13:54:36.528560 <6>[ 3.201595] hns3: Copyright (c) 2017 Huawei Corporation.
6029 13:54:36.532299 <6>[ 3.207198] hclge is initializing
6030 13:54:36.538654 <6>[ 3.210778] e1000: Intel(R) PRO/1000 Network Driver
6031 13:54:36.545443 <6>[ 3.215915] e1000: Copyright (c) 1999-2006 Intel Corporation.
6032 13:54:36.548774 <6>[ 3.221936] e1000e: Intel(R) PRO/1000 Network Driver
6033 13:54:36.555521 <6>[ 3.227158] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6034 13:54:36.562259 <6>[ 3.233352] igb: Intel(R) Gigabit Ethernet Network Driver
6035 13:54:36.569294 <6>[ 3.239008] igb: Copyright (c) 2007-2014 Intel Corporation.
6036 13:54:36.575869 <6>[ 3.244852] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6037 13:54:36.582333 <6>[ 3.251376] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6038 13:54:36.586017 <6>[ 3.257945] sky2: driver version 1.30
6039 13:54:36.592462 <6>[ 3.263217] usbcore: registered new device driver r8152-cfgselector
6040 13:54:36.599284 <6>[ 3.269760] usbcore: registered new interface driver r8152
6041 13:54:36.605826 <6>[ 3.275595] VFIO - User Level meta-driver version: 0.3
6042 13:54:36.612550 <6>[ 3.283404] mtu3 11201000.usb: uwk - reg:0x420, version:101
6043 13:54:36.619044 <4>[ 3.289278] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6044 13:54:36.625794 <6>[ 3.296551] mtu3 11201000.usb: dr_mode: 1, drd: auto
6045 13:54:36.632170 <6>[ 3.301776] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6046 13:54:36.635256 <6>[ 3.307966] mtu3 11201000.usb: usb3-drd: 0
6047 13:54:36.642213 <6>[ 3.313534] mtu3 11201000.usb: xHCI platform device register success...
6048 13:54:36.653741 <4>[ 3.322208] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6049 13:54:36.660233 <6>[ 3.330148] xhci-mtk 11200000.usb: xHCI Host Controller
6050 13:54:36.667256 <6>[ 3.335653] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6051 13:54:36.673677 <6>[ 3.343372] xhci-mtk 11200000.usb: USB3 root hub has no ports
6052 13:54:36.683554 <6>[ 3.349381] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6053 13:54:36.687232 <6>[ 3.358808] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6054 13:54:36.693723 <6>[ 3.364874] xhci-mtk 11200000.usb: xHCI Host Controller
6055 13:54:36.700302 <6>[ 3.370361] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6056 13:54:36.706772 <6>[ 3.378018] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6057 13:54:36.713584 <6>[ 3.384833] hub 1-0:1.0: USB hub found
6058 13:54:36.716962 <6>[ 3.388861] hub 1-0:1.0: 1 port detected
6059 13:54:36.727483 <6>[ 3.394206] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6060 13:54:36.730208 <6>[ 3.402837] hub 2-0:1.0: USB hub found
6061 13:54:36.736730 <3>[ 3.406896] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6062 13:54:36.743722 <6>[ 3.414787] usbcore: registered new interface driver usb-storage
6063 13:54:36.749732 <6>[ 3.421394] usbcore: registered new device driver onboard-usb-hub
6064 13:54:36.762782 <4>[ 3.430995] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6065 13:54:36.771612 <6>[ 3.443248] mt6397-rtc mt6358-rtc: registered as rtc0
6066 13:54:36.781623 <6>[ 3.448733] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-18T13:54:37 UTC (1721310877)
6067 13:54:36.785079 <6>[ 3.458608] i2c_dev: i2c /dev entries driver
6068 13:54:36.796514 <6>[ 3.465018] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6069 13:54:36.806474 <6>[ 3.473336] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6070 13:54:36.809997 <6>[ 3.482241] i2c 4-0058: Fixed dependency cycle(s) with /panel
6071 13:54:36.819885 <6>[ 3.488271] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6072 13:54:36.835801 <6>[ 3.507718] cpu cpu0: EM: created perf domain
6073 13:54:36.846193 <6>[ 3.513241] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6074 13:54:36.853291 <6>[ 3.524525] cpu cpu4: EM: created perf domain
6075 13:54:36.860276 <6>[ 3.531711] sdhci: Secure Digital Host Controller Interface driver
6076 13:54:36.866712 <6>[ 3.538167] sdhci: Copyright(c) Pierre Ossman
6077 13:54:36.873529 <6>[ 3.543576] Synopsys Designware Multimedia Card Interface Driver
6078 13:54:36.880532 <6>[ 3.544091] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6079 13:54:36.883401 <6>[ 3.550649] sdhci-pltfm: SDHCI platform and OF driver helper
6080 13:54:36.891482 <6>[ 3.563329] ledtrig-cpu: registered to indicate activity on CPUs
6081 13:54:36.899262 <6>[ 3.571128] usbcore: registered new interface driver usbhid
6082 13:54:36.903032 <6>[ 3.576979] usbhid: USB HID core driver
6083 13:54:36.913878 <6>[ 3.581312] spi_master spi2: will run message pump with realtime priority
6084 13:54:36.921086 <4>[ 3.581652] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6085 13:54:36.927236 <4>[ 3.595631] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6086 13:54:36.937366 <6>[ 3.599522] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6087 13:54:36.956332 <6>[ 3.617999] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6088 13:54:36.963023 <4>[ 3.629493] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6089 13:54:36.969531 <6>[ 3.638927] cros-ec-spi spi2.0: Chrome EC device registered
6090 13:54:36.976532 <4>[ 3.646992] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6091 13:54:36.988928 <4>[ 3.657616] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6092 13:54:36.995747 <4>[ 3.666298] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6093 13:54:37.008032 <6>[ 3.676102] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6094 13:54:37.026328 <6>[ 3.698485] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6095 13:54:37.033807 <6>[ 3.705302] mmc0: new HS400 MMC card at address 0001
6096 13:54:37.040310 <6>[ 3.711965] mmcblk0: mmc0:0001 TB2932 29.2 GiB
6097 13:54:37.057349 <6>[ 3.725405] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6098 13:54:37.063941 <6>[ 3.725661] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6099 13:54:37.073955 <6>[ 3.738064] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6100 13:54:37.080634 <6>[ 3.742998] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
6101 13:54:37.083716 <6>[ 3.752480] NET: Registered PF_PACKET protocol family
6102 13:54:37.090515 <6>[ 3.757559] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
6103 13:54:37.103841 <6>[ 3.762218] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6104 13:54:37.110113 <6>[ 3.767767] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
6105 13:54:37.113778 <6>[ 3.778887] 9pnet: Installing 9P2000 support
6106 13:54:37.123586 <6>[ 3.779160] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6107 13:54:37.126611 <5>[ 3.799837] Key type dns_resolver registered
6108 13:54:37.133406 <6>[ 3.802911] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6109 13:54:37.140013 <6>[ 3.805001] registered taskstats version 1
6110 13:54:37.143527 <5>[ 3.815520] Loading compiled-in X.509 certificates
6111 13:54:37.185387 <3>[ 3.853524] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6112 13:54:37.217936 <6>[ 3.882623] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6113 13:54:37.228439 <6>[ 3.896943] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6114 13:54:37.238621 <6>[ 3.905516] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6115 13:54:37.245174 <6>[ 3.914073] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6116 13:54:37.255291 <6>[ 3.922745] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6117 13:54:37.261981 <6>[ 3.931347] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6118 13:54:37.272088 <6>[ 3.939893] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6119 13:54:37.281833 <6>[ 3.948479] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6120 13:54:37.288459 <6>[ 3.957773] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6121 13:54:37.294691 <6>[ 3.965122] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6122 13:54:37.298179 <6>[ 3.965634] hub 1-1:1.0: USB hub found
6123 13:54:37.305098 <6>[ 3.972283] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6124 13:54:37.308454 <6>[ 3.976039] hub 1-1:1.0: 3 ports detected
6125 13:54:37.314788 <6>[ 3.982759] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6126 13:54:37.325593 <6>[ 3.993782] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6127 13:54:37.332325 <6>[ 4.001919] panfrost 13040000.gpu: clock rate = 511999970
6128 13:54:37.342065 <6>[ 4.007601] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6129 13:54:37.348699 <6>[ 4.017705] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6130 13:54:37.358536 <6>[ 4.025723] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6131 13:54:37.368954 <6>[ 4.034157] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6132 13:54:37.374599 <6>[ 4.046233] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6133 13:54:37.387592 <6>[ 4.056141] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6134 13:54:37.397710 <6>[ 4.065089] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6135 13:54:37.407642 <6>[ 4.074235] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6136 13:54:37.414529 <6>[ 4.083367] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6137 13:54:37.424666 <6>[ 4.092495] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6138 13:54:37.434285 <6>[ 4.101797] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6139 13:54:37.444776 <6>[ 4.111099] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6140 13:54:37.454510 <6>[ 4.120572] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6141 13:54:37.461212 <6>[ 4.130049] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6142 13:54:37.470867 <6>[ 4.139177] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6143 13:54:37.543815 <6>[ 4.212090] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6144 13:54:37.553869 <6>[ 4.220946] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6145 13:54:37.563885 <6>[ 4.232068] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6146 13:54:37.610176 <6>[ 4.278939] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6147 13:54:38.256143 <6>[ 4.475291] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6148 13:54:38.265883 <4>[ 4.592166] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6149 13:54:38.272449 <4>[ 4.592184] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6150 13:54:38.278774 <6>[ 4.641244] r8152 1-1.2:1.0 eth0: v1.12.13
6151 13:54:38.285498 <6>[ 4.722919] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6152 13:54:38.292488 <6>[ 4.907671] Console: switching to colour frame buffer device 170x48
6153 13:54:38.298995 <6>[ 4.968326] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6154 13:54:38.320494 <6>[ 4.985528] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6155 13:54:38.340185 <6>[ 5.004985] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6156 13:54:38.349758 <6>[ 5.017586] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6157 13:54:38.356875 <6>[ 5.025511] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6158 13:54:38.366110 <6>[ 5.032180] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6159 13:54:38.387352 <6>[ 5.052042] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6160 13:54:39.647248 <6>[ 6.319249] r8152 1-1.2:1.0 eth0: carrier on
6161 13:54:42.007323 <5>[ 6.342932] Sending DHCP requests .., OK
6162 13:54:42.013831 <6>[ 8.683248] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23
6163 13:54:42.017554 <6>[ 8.691699] IP-Config: Complete:
6164 13:54:42.030451 <6>[ 8.695269] device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1
6165 13:54:42.037559 <6>[ 8.706171] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)
6166 13:54:42.052180 <6>[ 8.720539] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6167 13:54:42.060564 <6>[ 8.720549] nameserver0=192.168.201.1
6168 13:54:42.068853 <6>[ 8.740437] clk: Disabling unused clocks
6169 13:54:42.073464 <6>[ 8.748478] ALSA device list:
6170 13:54:42.082861 <6>[ 8.754390] No soundcards found.
6171 13:54:42.092396 <6>[ 8.763365] Freeing unused kernel memory: 8512K
6172 13:54:42.099272 <6>[ 8.770471] Run /init as init process
6173 13:54:42.128654 <6>[ 8.800081] NET: Registered PF_INET6 protocol family
6174 13:54:42.136795 <6>[ 8.807807] Segment Routing with IPv6
6175 13:54:42.139687 <6>[ 8.812472] In-situ OAM (IOAM) with IPv6
6176 13:54:42.186781 <30>[ 8.831830] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6177 13:54:42.196388 <30>[ 8.867801] systemd[1]: Detected architecture arm64.
6178 13:54:42.201830
6179 13:54:42.205132 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6180 13:54:42.205672
6181 13:54:42.219887 <30>[ 8.891343] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6182 13:54:42.375090 <30>[ 9.042977] systemd[1]: Queued start job for default target graphical.target.
6183 13:54:42.425062 <30>[ 9.093018] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6184 13:54:42.434588 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6185 13:54:42.452254 <30>[ 9.120213] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6186 13:54:42.462787 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6187 13:54:42.484638 <30>[ 9.152310] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6188 13:54:42.497045 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6189 13:54:42.516760 <30>[ 9.184958] systemd[1]: Created slice user.slice - User and Session Slice.
6190 13:54:42.528201 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6191 13:54:42.550724 <30>[ 9.215547] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6192 13:54:42.563207 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6193 13:54:42.586176 <30>[ 9.251330] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6194 13:54:42.599032 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6195 13:54:42.624602 <30>[ 9.283203] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6196 13:54:42.644415 <30>[ 9.312714] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6197 13:54:42.651896 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6198 13:54:42.671074 <30>[ 9.339100] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6199 13:54:42.684164 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6200 13:54:42.702689 <30>[ 9.371164] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6201 13:54:42.717756 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6202 13:54:42.731883 <30>[ 9.403168] systemd[1]: Reached target paths.target - Path Units.
6203 13:54:42.746860 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6204 13:54:42.762325 <30>[ 9.431104] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6205 13:54:42.776074 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6206 13:54:42.791854 <30>[ 9.463066] systemd[1]: Reached target slices.target - Slice Units.
6207 13:54:42.806505 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6208 13:54:42.819397 <30>[ 9.491124] systemd[1]: Reached target swap.target - Swaps.
6209 13:54:42.830116 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6210 13:54:42.850751 <30>[ 9.519138] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6211 13:54:42.864538 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6212 13:54:42.883369 <30>[ 9.551506] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6213 13:54:42.897297 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6214 13:54:42.916684 <30>[ 9.584904] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6215 13:54:42.930025 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6216 13:54:42.947621 <30>[ 9.615905] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6217 13:54:42.961881 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6218 13:54:42.979304 <30>[ 9.647761] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6219 13:54:42.992198 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6220 13:54:43.011748 <30>[ 9.679855] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6221 13:54:43.025107 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6222 13:54:43.043106 <30>[ 9.711606] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6223 13:54:43.056888 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6224 13:54:43.099230 <30>[ 9.767446] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6225 13:54:43.109772 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6226 13:54:43.120577 <30>[ 9.788704] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6227 13:54:43.131996 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6228 13:54:43.191403 <30>[ 9.859483] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6229 13:54:43.204682 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6230 13:54:43.230372 <30>[ 9.891756] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6231 13:54:43.253604 <30>[ 9.922090] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6232 13:54:43.265770 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6233 13:54:43.286641 <30>[ 9.954879] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6234 13:54:43.300004 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6235 13:54:43.372366 <30>[ 10.040476] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6236 13:54:43.389078 Startin<6>[ 10.054555] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6237 13:54:43.392473 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6238 13:54:43.417477 <30>[ 10.085607] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6239 13:54:43.430361 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6240 13:54:43.452395 <30>[ 10.120594] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6241 13:54:43.464635 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6242 13:54:43.511688 <30>[ 10.179734] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6243 13:54:43.522346 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6244 13:54:43.549589 <30>[ 10.217546] systemd[1]: Starting systemd-journald.service - Journal Service...
6245 13:54:43.559949 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6246 13:54:43.579226 <30>[ 10.247458] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6247 13:54:43.588877 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6248 13:54:43.615595 <30>[ 10.280364] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6249 13:54:43.626539 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6250 13:54:43.667371 <30>[ 10.335560] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6251 13:54:43.680333 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6252 13:54:43.702697 <30>[ 10.371035] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6253 13:54:43.713848 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6254 13:54:43.734356 <30>[ 10.402957] systemd[1]: Started systemd-journald.service - Journal Service.
6255 13:54:43.744602 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6256 13:54:43.765031 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6257 13:54:43.783525 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6258 13:54:43.799332 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6259 13:54:43.816970 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6260 13:54:43.837676 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6261 13:54:43.857752 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6262 13:54:43.877283 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6263 13:54:43.898619 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6264 13:54:43.919761 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6265 13:54:43.943557 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6266 13:54:43.967528 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6267 13:54:43.987922 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6268 13:54:44.031438 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6269 13:54:44.057260 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6270 13:54:44.081078 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6271 13:54:44.099811 See 'systemctl status systemd-remount-fs.service' for details.
6272 13:54:44.121903 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6273 13:54:44.139645 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6274 13:54:44.160387 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6275 13:54:44.199404 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6276 13:54:44.215954 <46>[ 10.883806] systemd-journald[202]: Received client request to flush runtime journal.
6277 13:54:44.227354 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6278 13:54:44.251135 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6279 13:54:44.273348 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6280 13:54:44.293047 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6281 13:54:44.312993 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6282 13:54:44.360051 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6283 13:54:44.391524 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6284 13:54:44.408280 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6285 13:54:44.427399 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6286 13:54:44.467837 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6287 13:54:44.493521 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6288 13:54:44.515576 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6289 13:54:44.556113 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6290 13:54:44.577908 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6291 13:54:44.595626 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6292 13:54:44.629247 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6293 13:54:44.651340 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6294 13:54:44.671379 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6295 13:54:44.692772 <46>[ 11.364303] systemd-journald[202]: Time jumped backwards, rotating.
6296 13:54:44.757490 <6>[ 11.425675] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6297 13:54:44.770074 <4>[ 11.438296] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6298 13:54:44.777235 <3>[ 11.448899] mtk-scp 10500000.scp: invalid resource
6299 13:54:44.784567 <4>[ 11.449371] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6300 13:54:44.794039 <6>[ 11.454596] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6301 13:54:44.804269 <6>[ 11.455093] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6302 13:54:44.813608 <3>[ 11.455165] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6303 13:54:44.820584 <3>[ 11.455170] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6304 13:54:44.830714 <3>[ 11.455174] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6305 13:54:44.840675 <3>[ 11.455178] elan_i2c 2-0015: Error applying setting, reverse things back
6306 13:54:44.850662 <6>[ 11.458366] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6307 13:54:44.860749 <4>[ 11.463552] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6308 13:54:44.864112 <6>[ 11.472210] remoteproc remoteproc0: scp is available
6309 13:54:44.873860 <3>[ 11.537017] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6310 13:54:44.877531 <6>[ 11.540387] mc: Linux media interface: v0.10
6311 13:54:44.887234 <4>[ 11.541620] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6312 13:54:44.893461 <3>[ 11.550094] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6313 13:54:44.900542 <6>[ 11.554622] remoteproc remoteproc0: powering up scp
6314 13:54:44.910330 <3>[ 11.563564] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6315 13:54:44.917187 <4>[ 11.571707] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6316 13:54:44.930074 <3>[ 11.583889] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6317 13:54:44.937073 <3>[ 11.583882] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6318 13:54:44.948940 <3>[ 11.583902] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6319 13:54:44.958457 <3>[ 11.583911] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6320 13:54:44.965473 <3>[ 11.583921] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6321 13:54:44.974971 <3>[ 11.583929] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6322 13:54:44.981459 <6>[ 11.584970] videodev: Linux video capture interface: v2.00
6323 13:54:44.988477 <3>[ 11.585332] remoteproc remoteproc0: request_firmware failed: -2
6324 13:54:44.998684 <3>[ 11.587293] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6325 13:54:45.005047 <5>[ 11.595900] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6326 13:54:45.015352 <6>[ 11.617900] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6327 13:54:45.025933 <5>[ 11.637060] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6328 13:54:45.038291 <6>[ 11.705833] cs_system_cfg: CoreSight Configuration manager initialised
6329 13:54:45.044636 <5>[ 11.706909] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6330 13:54:45.055234 <6>[ 11.709866] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6331 13:54:45.061646 <6>[ 11.723003] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6332 13:54:45.071332 <4>[ 11.723331] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6333 13:54:45.077983 <6>[ 11.731174] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6334 13:54:45.085634 <6>[ 11.738906] cfg80211: failed to load regulatory.db
6335 13:54:45.091937 <6>[ 11.748201] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6336 13:54:45.098244 <6>[ 11.749094] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6337 13:54:45.105974 <6>[ 11.749584] Bluetooth: Core ver 2.22
6338 13:54:45.112272 <6>[ 11.749643] NET: Registered PF_BLUETOOTH protocol family
6339 13:54:45.119374 <6>[ 11.749646] Bluetooth: HCI device and connection manager initialized
6340 13:54:45.122748 <6>[ 11.749665] Bluetooth: HCI socket layer initialized
6341 13:54:45.129013 <6>[ 11.749672] Bluetooth: L2CAP socket layer initialized
6342 13:54:45.136149 <6>[ 11.749687] Bluetooth: SCO socket layer initialized
6343 13:54:45.142504 <6>[ 11.749917] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6344 13:54:45.149049 <6>[ 11.751147] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6345 13:54:45.155481 <6>[ 11.756770] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6346 13:54:45.158910 <6>[ 11.798459] Bluetooth: HCI UART driver ver 2.3
6347 13:54:45.166157 <6>[ 11.800886] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6348 13:54:45.179773 <6>[ 11.801373] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6349 13:54:45.186479 <6>[ 11.803051] usbcore: registered new interface driver uvcvideo
6350 13:54:45.189477 <6>[ 11.805941] Bluetooth: HCI UART protocol H4 registered
6351 13:54:45.200203 <6>[ 11.806824] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6352 13:54:45.209450 <6>[ 11.811206] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6353 13:54:45.219974 <3>[ 11.811467] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6354 13:54:45.231434 <3>[ 11.812334] debugfs: File 'Playback' in directory 'dapm' already present!
6355 13:54:45.237616 <3>[ 11.812342] debugfs: File 'Capture' in directory 'dapm' already present!
6356 13:54:45.247500 <6>[ 11.813766] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6357 13:54:45.254736 <3>[ 11.816502] thermal_sys: Failed to find 'trips' node
6358 13:54:45.261277 <3>[ 11.816513] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6359 13:54:45.271077 <3>[ 11.816522] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6360 13:54:45.280927 <4>[ 11.816526] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6361 13:54:45.284352 <6>[ 11.818658] Bluetooth: HCI UART protocol LL registered
6362 13:54:45.291973 <3>[ 11.819200] thermal_sys: Failed to find 'trips' node
6363 13:54:45.298347 <3>[ 11.819208] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6364 13:54:45.308778 <3>[ 11.819217] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6365 13:54:45.315553 <4>[ 11.819222] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6366 13:54:45.325711 <6>[ 11.825687] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6367 13:54:45.332113 <6>[ 11.831248] Bluetooth: HCI UART protocol Three-wire (H5) registered
6368 13:54:45.342645 <6>[ 11.831577] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6369 13:54:45.353755 <6>[ 11.831588] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6370 13:54:45.367459 <6>[ 11.831913] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6371 13:54:45.377297 <6>[ 11.844223] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6372 13:54:45.384189 <6>[ 11.844971] Bluetooth: HCI UART protocol Broadcom registered
6373 13:54:45.394006 <6>[ 11.856568] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6374 13:54:45.400711 <6>[ 11.862882] Bluetooth: HCI UART protocol QCA registered
6375 13:54:45.407689 <6>[ 11.863992] Bluetooth: hci0: setting up ROME/QCA6390
6376 13:54:45.413817 <6>[ 11.980179] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6377 13:54:45.420730 <6>[ 11.985885] Bluetooth: HCI UART protocol Marvell registered
6378 13:54:45.427039 <3>[ 12.077987] Bluetooth: hci0: Frame reassembly failed (-84)
6379 13:54:45.444415 <4>[ 12.111910] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6380 13:54:45.450489 <4>[ 12.111910] Fallback method does not support PEC.
6381 13:54:45.465677 <3>[ 12.131412] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6382 13:54:45.473038 <3>[ 12.135065] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6383 13:54:45.480419 <3>[ 12.145549] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6384 13:54:45.487922 <3>[ 12.154873] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6385 13:54:45.498674 <3>[ 12.162303] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6386 13:54:45.552991 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/system<3>[ 12.218921] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6387 13:54:45.553618 d-backlight.
6388 13:54:45.567655 <3>[ 12.235855] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6389 13:54:45.585447 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Se<3>[ 12.251535] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6390 13:54:45.585912 t.
6391 13:54:45.600648 <3>[ 12.268659] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6392 13:54:45.616534 <3>[ 12.284209] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6393 13:54:45.624973 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6394 13:54:45.648970 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6395 13:54:45.693870 <6>[ 12.365087] Bluetooth: hci0: QCA Product ID :0x00000008
6396 13:54:45.703288 <6>[ 12.374887] Bluetooth: hci0: QCA SOC Version :0x00000044
6397 13:54:45.713500 [[0;32m OK [0m] Reached target [0;1;39mblue<6>[ 12.384406] Bluetooth: hci0: QCA ROM Version :0x00000302
6398 13:54:45.716794 tooth.target[0m - Bluetooth Support.
6399 13:54:45.723493 <6>[ 12.394699] Bluetooth: hci0: QCA Patch Version:0x00000111
6400 13:54:45.733275 <6>[ 12.404150] Bluetooth: hci0: QCA controller version 0x00440302
6401 13:54:45.746328 [[0;32m OK [<6>[ 12.414386] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6402 13:54:45.759797 0m] Reached target [0;1;39msound.target[0m - S<4>[ 12.426402] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6403 13:54:45.760282 ound Card.
6404 13:54:45.771148 <3>[ 12.439185] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6405 13:54:45.778615 <3>[ 12.449963] Bluetooth: hci0: QCA Failed to download patch (-2)
6406 13:54:45.790094 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6407 13:54:45.806953 <6>[ 12.474871] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6408 13:54:45.820436 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6409 13:54:45.839210 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6410 13:54:45.854920 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6411 13:54:45.872170 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6412 13:54:45.886609 <4>[ 12.555031] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6413 13:54:45.897351 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6414 13:54:45.904106 <4>[ 12.573078] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6415 13:54:45.919320 [[0;32m OK [0m] Listening on [0;1;39msystem<4>[ 12.587180] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6416 13:54:45.929201 d-rfkil…l Switch Status /dev/r<4>[ 12.600498] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6417 13:54:45.931953 fkill Watch.
6418 13:54:45.951205 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6419 13:54:45.985312 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6420 13:54:46.017650 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6421 13:54:46.040217 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6422 13:54:46.060686 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6423 13:54:46.100372 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6424 13:54:46.157259 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6425 13:54:46.196278 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6426 13:54:46.215952 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6427 13:54:46.260624 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6428 13:54:46.280481 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6429 13:54:46.303872 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6430 13:54:46.326033 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6431 13:54:46.344060 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6432 13:54:46.388008 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6433 13:54:46.420227 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6434 13:54:46.468931
6435 13:54:46.472005 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6436 13:54:46.472446
6437 13:54:46.475265 debian-bookworm-arm64 login: root (automatic login)
6438 13:54:46.475704
6439 13:54:46.498358 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Thu Jul 18 12:53:03 UTC 2024 aarch64
6440 13:54:46.498879
6441 13:54:46.505176 The programs included with the Debian GNU/Linux system are free software;
6442 13:54:46.511388 the exact distribution terms for each program are described in the
6443 13:54:46.514980 individual files in /usr/share/doc/*/copyright.
6444 13:54:46.515531
6445 13:54:46.521707 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6446 13:54:46.525079 permitted by applicable law.
6447 13:54:46.526616 Matched prompt #10: / #
6449 13:54:46.527743 Setting prompt string to ['/ #']
6450 13:54:46.528307 end: 2.2.5.1 login-action (duration 00:00:14) [common]
6452 13:54:46.529425 end: 2.2.5 auto-login-action (duration 00:00:14) [common]
6453 13:54:46.529907 start: 2.2.6 expect-shell-connection (timeout 00:03:29) [common]
6454 13:54:46.530262 Setting prompt string to ['/ #']
6455 13:54:46.530612 Forcing a shell prompt, looking for ['/ #']
6456 13:54:46.530971 Sending line: ''
6458 13:54:46.582150 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6459 13:54:46.582581 Waiting using forced prompt support (timeout 00:02:30)
6460 13:54:46.588009 / #
6461 13:54:46.588900 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6462 13:54:46.589488 start: 2.2.7 export-device-env (timeout 00:03:29) [common]
6463 13:54:46.590022 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6464 13:54:46.590615 end: 2.2 depthcharge-retry (duration 00:01:31) [common]
6465 13:54:46.591262 end: 2 depthcharge-action (duration 00:01:31) [common]
6466 13:54:46.591797 start: 3 lava-test-retry (timeout 00:08:03) [common]
6467 13:54:46.592324 start: 3.1 lava-test-shell (timeout 00:08:03) [common]
6468 13:54:46.592772 Using namespace: common
6469 13:54:46.593193 Sending line: '#'
6471 13:54:46.694885 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6472 13:54:46.700079 / # #
6473 13:54:46.700898 Using /lava-14879057
6474 13:54:46.701349 Sending line: 'export SHELL=/bin/sh'
6476 13:54:46.808500 / # export SHELL=/bin/sh
6477 13:54:46.809276 Sending line: '. /lava-14879057/environment'
6479 13:54:46.916999 / # . /lava-14879057/environment
6480 13:54:46.917875 Sending line: '/lava-14879057/bin/lava-test-runner /lava-14879057/0'
6482 13:54:47.019441 Test shell timeout: 10s (minimum of the action and connection timeout)
6483 13:54:47.025247 / # /lava-14879057/bin/lava-test-runner /lava-14879057/0
6484 13:54:47.053517 + export TESTRUN_ID=0_igt-gpu-pa<8>[ 13.723178] <LAVA_SIGNAL_STARTRUN 0_igt-gpu-panfrost 14879057_1.5.2.3.1>
6485 13:54:47.054342 Received signal: <STARTRUN> 0_igt-gpu-panfrost 14879057_1.5.2.3.1
6486 13:54:47.054743 Starting test lava.0_igt-gpu-panfrost (14879057_1.5.2.3.1)
6487 13:54:47.055248 Skipping test definition patterns.
6488 13:54:47.056633 nfrost
6489 13:54:47.060274 + cd /lava-14879057/0/tests/0_igt-gpu-panfrost
6490 13:54:47.060810 + cat uuid
6491 13:54:47.063274 + UUID=14879057_1.5.2.3.1
6492 13:54:47.063717 + set +x
6493 13:54:47.073679 + IGT_FORCE_DRIVER=panfrost /usr/bin/igt-parser.sh panfrost_gem_new panfrost_get_param panfrost_prime panfrost_submit
6494 13:54:47.098351 <8>[ 13.770076] <LAVA_SIGNAL_TESTSET START panfrost_gem_new>
6495 13:54:47.099103 Received signal: <TESTSET> START panfrost_gem_new
6496 13:54:47.099471 Starting test_set panfrost_gem_new
6497 13:54:47.120561 <6>[ 13.791927] Console: switching to colour dummy device 80x25
6498 13:54:47.127073 <14>[ 13.797991] [IGT] panfrost_gem_new: executing
6499 13:54:47.134310 IGT-Version: 1.2<14>[ 13.803151] [IGT] panfrost_gem_new: starting subtest gem-new-4096
6500 13:54:47.143846 8-ga44ebfe (aarc<14>[ 13.811146] [IGT] panfrost_gem_new: finished subtest gem-new-4096, SUCCESS
6501 13:54:47.150346 h64) (Linux: 6.1<14>[ 13.820083] [IGT] panfrost_gem_new: exiting, ret=0
6502 13:54:47.150831 .96-cip24 aarch64)
6503 13:54:47.157204 Using IGT_SRANDOM=1721310887 for randomisation
6504 13:54:47.161007 Opened device: /dev/dri/card0
6505 13:54:47.161574 Starting subtest: gem-new-4096
6506 13:54:47.167260 [1mSubtest gem-new-4096: SUCCESS (0.000s)[0m
6507 13:54:47.202720 <6>[ 13.857632] Console: switching to colour frame buffer device 170x48
6508 13:54:47.219380 <8>[ 13.887572] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-4096 RESULT=pass>
6509 13:54:47.220156 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-4096 RESULT=pass
6511 13:54:47.239946 <6>[ 13.911400] Console: switching to colour dummy device 80x25
6512 13:54:47.246655 <14>[ 13.917396] [IGT] panfrost_gem_new: executing
6513 13:54:47.253880 IGT-Version: 1.2<14>[ 13.922420] [IGT] panfrost_gem_new: starting subtest gem-new-0
6514 13:54:47.260310 <14>[ 13.929826] [IGT] panfrost_gem_new: finished subtest gem-new-0, SUCCESS
6515 13:54:47.266634 8-ga44ebfe (aarc<14>[ 13.937142] [IGT] panfrost_gem_new: exiting, ret=0
6516 13:54:47.269859 h64) (Linux: 6.1.96-cip24 aarch64)
6517 13:54:47.273291 Using IGT_SRANDOM=1721310887 for randomisation
6518 13:54:47.276871 Opened device: /dev/dri/card0
6519 13:54:47.279955 Starting subtest: gem-new-0
6520 13:54:47.283129 [1mSubtest gem-new-0: SUCCESS (0.000s)[0m
6521 13:54:47.319234 <6>[ 13.974110] Console: switching to colour frame buffer device 170x48
6522 13:54:47.333984 <8>[ 14.005190] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-0 RESULT=pass>
6523 13:54:47.334758 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-0 RESULT=pass
6525 13:54:47.358438 <6>[ 14.029940] Console: switching to colour dummy device 80x25
6526 13:54:47.365099 <14>[ 14.035946] [IGT] panfrost_gem_new: executing
6527 13:54:47.371638 IGT-Version: 1.2<14>[ 14.040969] [IGT] panfrost_gem_new: starting subtest gem-new-zeroed
6528 13:54:47.381724 8-ga44ebfe (aarc<14>[ 14.049976] [IGT] panfrost_gem_new: finished subtest gem-new-zeroed, SUCCESS
6529 13:54:47.388069 h64) (Linux: 6.1<14>[ 14.057750] [IGT] panfrost_gem_new: exiting, ret=0
6530 13:54:47.388529 .96-cip24 aarch64)
6531 13:54:47.394595 Using IGT_SRANDOM=1721310887 for randomisation
6532 13:54:47.395206 Opened device: /dev/dri/card0
6533 13:54:47.397866 Starting subtest: gem-new-zeroed
6534 13:54:47.404518 [1mSubtest gem-new-zeroed: SUCCESS (0.001s)[0m
6535 13:54:47.435127 <6>[ 14.090245] Console: switching to colour frame buffer device 170x48
6536 13:54:47.452689 <8>[ 14.120468] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-zeroed RESULT=pass>
6537 13:54:47.453330 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-zeroed RESULT=pass
6539 13:54:47.455536 Received signal: <TESTSET> STOP
6540 13:54:47.455908 Closing test_set panfrost_gem_new
6541 13:54:47.459232 <8>[ 14.129925] <LAVA_SIGNAL_TESTSET STOP>
6542 13:54:47.497732 <8>[ 14.169192] <LAVA_SIGNAL_TESTSET START panfrost_get_param>
6543 13:54:47.498492 Received signal: <TESTSET> START panfrost_get_param
6544 13:54:47.498849 Starting test_set panfrost_get_param
6545 13:54:47.521226 <6>[ 14.192495] Console: switching to colour dummy device 80x25
6546 13:54:47.527982 <14>[ 14.198702] [IGT] panfrost_get_param: executing
6547 13:54:47.534613 IGT-Version: 1.2<14>[ 14.204110] [IGT] panfrost_get_param: starting subtest base-params
6548 13:54:47.544188 8-ga44ebfe (aarc<14>[ 14.212295] [IGT] panfrost_get_param: finished subtest base-params, SUCCESS
6549 13:54:47.550843 h64) (Linux: 6.1<14>[ 14.221459] [IGT] panfrost_get_param: exiting, ret=0
6550 13:54:47.554292 .96-cip24 aarch64)
6551 13:54:47.557258 Using IGT_SRANDOM=1721310887 for randomisation
6552 13:54:47.560961 Opened device: /dev/dri/card0
6553 13:54:47.564079 Starting subtest: base-params
6554 13:54:47.567845 [1mSubtest base-params: SUCCESS (0.000s)[0m
6555 13:54:47.601817 <6>[ 14.256624] Console: switching to colour frame buffer device 170x48
6556 13:54:47.616792 Received signal: <TESTCASE> TEST_CASE_ID=base-params RESULT=pass
6558 13:54:47.619452 <8>[ 14.287997] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=base-params RESULT=pass>
6559 13:54:47.640540 <6>[ 14.311936] Console: switching to colour dummy device 80x25
6560 13:54:47.647604 <14>[ 14.318244] [IGT] panfrost_get_param: executing
6561 13:54:47.653942 IGT-Version: 1.2<14>[ 14.323675] [IGT] panfrost_get_param: starting subtest get-bad-param
6562 13:54:47.663996 8-ga44ebfe (aarc<14>[ 14.331982] [IGT] panfrost_get_param: finished subtest get-bad-param, SUCCESS
6563 13:54:47.670617 h64) (Linux: 6.1<14>[ 14.341161] [IGT] panfrost_get_param: exiting, ret=0
6564 13:54:47.673901 .96-cip24 aarch64)
6565 13:54:47.677577 Using IGT_SRANDOM=1721310887 for randomisation
6566 13:54:47.680323 Opened device: /dev/dri/card0
6567 13:54:47.683528 Starting subtest: get-bad-param
6568 13:54:47.687450 [1mSubtest get-bad-param: SUCCESS (0.000s)[0m
6569 13:54:47.718550 <6>[ 14.373154] Console: switching to colour frame buffer device 170x48
6570 13:54:47.737210 <8>[ 14.404960] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-param RESULT=pass>
6571 13:54:47.737983 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-param RESULT=pass
6573 13:54:47.759071 <6>[ 14.430278] Console: switching to colour dummy device 80x25
6574 13:54:47.765658 <14>[ 14.436517] [IGT] panfrost_get_param: executing
6575 13:54:47.772623 IGT-Version: 1.2<14>[ 14.442100] [IGT] panfrost_get_param: starting subtest get-bad-padding
6576 13:54:47.782606 8-ga44ebfe (aarc<14>[ 14.450514] [IGT] panfrost_get_param: finished subtest get-bad-padding, SUCCESS
6577 13:54:47.788830 h64) (Linux: 6.1<14>[ 14.459942] [IGT] panfrost_get_param: exiting, ret=0
6578 13:54:47.792376 .96-cip24 aarch64)
6579 13:54:47.795943 Using IGT_SRANDOM=1721310887 for randomisation
6580 13:54:47.798778 Opened device: /dev/dri/card0
6581 13:54:47.802083 Starting subtest: get-bad-padding
6582 13:54:47.805834 [1mSubtest get-bad-padding: SUCCESS (0.000s)[0m
6583 13:54:47.834467 <6>[ 14.489493] Console: switching to colour frame buffer device 170x48
6584 13:54:47.853387 <8>[ 14.521152] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-padding RESULT=pass>
6585 13:54:47.854174 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-padding RESULT=pass
6587 13:54:47.859538 <8>[ 14.530823] <LAVA_SIGNAL_TESTSET STOP>
6588 13:54:47.860243 Received signal: <TESTSET> STOP
6589 13:54:47.860591 Closing test_set panfrost_get_param
6590 13:54:47.885653 <8>[ 14.556996] <LAVA_SIGNAL_TESTSET START panfrost_prime>
6591 13:54:47.886620 Received signal: <TESTSET> START panfrost_prime
6592 13:54:47.886992 Starting test_set panfrost_prime
6593 13:54:47.908692 <6>[ 14.580124] Console: switching to colour dummy device 80x25
6594 13:54:47.915442 <14>[ 14.586059] [IGT] panfrost_prime: executing
6595 13:54:47.922142 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.96-cip24 aarch64)
6596 13:54:47.925925 Using IGT_SRANDOM=1721310887 for randomisation
6597 13:54:47.928930 Opened device: /dev/dri/card0
6598 13:54:47.949028 <14>[ 14.620452] [IGT] panfrost_prime: starting subtest gem-prime-import
6599 13:54:47.952226 Starting subtest: gem-prime-import
6600 13:54:47.965818 (panfrost_prime:356) CRITICAL: Test assertion failure functi<14>[ 14.635648] [IGT] panfrost_prime: finished subtest gem-prime-import, FAIL
6601 13:54:47.972551 on igt_has_dumb,<14>[ 14.643548] [IGT] panfrost_prime: exiting, ret=98
6602 13:54:47.975824 file ../tests/panfrost_prime.c:44:
6603 13:54:47.986076 (panfrost_prime:356) CRITICAL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP
6604 13:54:47.992519 (panfrost_prime:356) CRITICAL: Last errno: 9, Bad file descriptor
6605 13:54:47.993025 Stack trace:
6606 13:54:47.996102 #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6607 13:54:47.998871 #1 [<unknown>+0xb7541358]
6608 13:54:48.002663 #2 [<unknown>+0xb7540f2c]
6609 13:54:48.005850 #3 [__libc_init_first+0x80]
6610 13:54:48.006382 #4 [__libc_start_main+0x98]
6611 13:54:48.009096 #5 [<unknown>+0xb7540f70]
6612 13:54:48.012307 Subtest gem-prime-import failed.
6613 13:54:48.015692 **** DEBUG ****
6614 13:54:48.022162 (panfrost_prime:356) CRITICA<6>[ 14.674876] Console: switching to colour frame buffer device 170x48
6615 13:54:48.029450 L: Test assertion failure function igt_has_dumb, file ../tests/panfrost_prime.c:44:
6616 13:54:48.039378 (panfrost_prime:356) CRITIC<8>[ 14.707985] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-prime-import RESULT=fail>
6617 13:54:48.040151 Received signal: <TESTCASE> TEST_CASE_ID=gem-prime-import RESULT=fail
6619 13:54:48.049521 AL: Failed assertion: ret == 0 || errno == EINVA<8>[ 14.719655] <LAVA_SIGNAL_TESTSET STOP>
6620 13:54:48.050285 Received signal: <TESTSET> STOP
6621 13:54:48.050637 Closing test_set panfrost_prime
6622 13:54:48.052410 L || errno == EOPNOTSUPP
6623 13:54:48.055887 (panfrost_prime:356) CRITICAL: Last errno: 9, Bad file descriptor
6624 13:54:48.061820 (panfrost_prime:356) igt_core-INFO: Stack trace:
6625 13:54:48.069004 (panfrost_prime:356) igt_core-INFO: #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6626 13:54:48.079230 (panfrost_prime:356) igt_core-INFO: #1 [<unknown>+0xb75413<8>[ 14.748913] <LAVA_SIGNAL_TESTSET START panfrost_submit>
6627 13:54:48.079747 58]
6628 13:54:48.080335 Received signal: <TESTSET> START panfrost_submit
6629 13:54:48.080674 Starting test_set panfrost_submit
6630 13:54:48.085242 (panfrost_prime:356) igt_core-INFO: #2 [<unknown>+0xb7540f2c]
6631 13:54:48.092464 (panfrost_prime:356) igt_core-INFO: #3 [__libc_init_first+0x80]
6632 13:54:48.094951 (panfrost_prime:356) igt_core-INFO: #4 [__libc_start_main+0x98]
6633 13:54:48.102132 (pan<6>[ 14.773155] Console: switching to colour dummy device 80x25
6634 13:54:48.108700 frost_prime:356)<14>[ 14.779574] [IGT] panfrost_submit: executing
6635 13:54:48.115137 igt_core-INFO: <14>[ 14.785866] [IGT] panfrost_submit: starting subtest pan-submit
6636 13:54:48.125858 #5 [<unknown>+<14>[ 14.794144] [IGT] panfrost_submit: finished subtest pan-submit, SUCCESS
6637 13:54:48.126326 0xb7540f70]
6638 13:54:48.131837 ***<14>[ 14.801538] [IGT] panfrost_submit: exiting, ret=0
6639 13:54:48.132297 * END ****
6640 13:54:48.138574 [1mSubtest gem-prime-import: FAIL (0.008s)[0m
6641 13:54:48.145505 (panfrost_prime:356) drmtest-WARNING: Don't attempt to close standard/invalid file descriptor: -1
6642 13:54:48.151593 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.96-cip24 aarch64)
6643 13:54:48.158333 Using IGT_SRANDOM=1721310888 for randomisation
6644 13:54:48.158840 Opened device: /dev/dri/card0
6645 13:54:48.162020 Starting subtest: pan-submit
6646 13:54:48.168527 [1mSubtest pan-submit: SUCCESS (0.001s)[0m
6647 13:54:48.183604 <6>[ 14.838363] Console: switching to colour frame buffer device 170x48
6648 13:54:48.199317 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit RESULT=pass
6650 13:54:48.202493 <8>[ 14.870677] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit RESULT=pass>
6651 13:54:48.223466 <6>[ 14.894709] Console: switching to colour dummy device 80x25
6652 13:54:48.230114 <14>[ 14.900676] [IGT] panfrost_submit: executing
6653 13:54:48.236941 IGT-Version: 1.2<14>[ 14.905825] [IGT] panfrost_submit: starting subtest pan-submit-error-no-jc
6654 13:54:48.246147 8-ga44ebfe (aarc<14>[ 14.914414] [IGT] panfrost_submit: finished subtest pan-submit-error-no-jc, SUCCESS
6655 13:54:48.253277 h64) (Linux: 6.1<14>[ 14.924166] [IGT] panfrost_submit: exiting, ret=0
6656 13:54:48.256356 .96-cip24 aarch64)
6657 13:54:48.259949 Using IGT_SRANDOM=1721310888 for randomisation
6658 13:54:48.263403 Opened device: /dev/dri/card0
6659 13:54:48.266930 Starting subtest: pan-submit-error-no-jc
6660 13:54:48.273391 [1mSubtest pan-submit-error-no-jc: SUCCESS (0.000s)[0m
6661 13:54:48.300469 <6>[ 14.954839] Console: switching to colour frame buffer device 170x48
6662 13:54:48.318127 <8>[ 14.986341] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass>
6663 13:54:48.318899 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass
6665 13:54:48.342183 <6>[ 15.013655] Console: switching to colour dummy device 80x25
6666 13:54:48.348914 <14>[ 15.019926] [IGT] panfrost_submit: executing
6667 13:54:48.358880 IGT-Version: 1.2<14>[ 15.025219] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-in-syncs
6668 13:54:48.368925 8-ga44ebfe (aarc<14>[ 15.034844] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-in-syncs, SUCCESS
6669 13:54:48.375661 h64) (Linux: 6.1<14>[ 15.045136] [IGT] panfrost_submit: exiting, ret=0
6670 13:54:48.376171 .96-cip24 aarch64)
6671 13:54:48.381985 Using IGT_SRANDOM=1721310888 for randomisation
6672 13:54:48.385674 Opened device: /dev/dri/card0
6673 13:54:48.388471 Starting subtest: pan-submit-error-bad-in-syncs
6674 13:54:48.395558 [1mSubtest pan-submit-error-bad-in-syncs: SUCCESS (0.000s)[0m
6675 13:54:48.416559 <6>[ 15.071586] Console: switching to colour frame buffer device 170x48
6676 13:54:48.434875 <8>[ 15.102618] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass>
6677 13:54:48.435649 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass
6679 13:54:48.457874 <6>[ 15.129145] Console: switching to colour dummy device 80x25
6680 13:54:48.464279 <14>[ 15.135263] [IGT] panfrost_submit: executing
6681 13:54:48.474107 IGT-Version: 1.2<14>[ 15.140229] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-bo-handles
6682 13:54:48.484185 8-ga44ebfe (aarc<14>[ 15.149770] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-bo-handles, SUCCESS
6683 13:54:48.491005 h64) (Linux: 6.1<14>[ 15.160130] [IGT] panfrost_submit: exiting, ret=0
6684 13:54:48.491438 .96-cip24 aarch64)
6685 13:54:48.497592 Using IGT_SRANDOM=1721310888 for randomisation
6686 13:54:48.497975 Opened device: /dev/dri/card0
6687 13:54:48.504331 Starting subtest: pan-submit-error-bad-bo-handles
6688 13:54:48.510472 [1mSubtest pan-submit-error-bad-bo-handles: SUCCESS (0.000s)[0m
6689 13:54:48.532982 <6>[ 15.187447] Console: switching to colour frame buffer device 170x48
6690 13:54:48.551826 <8>[ 15.219942] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass>
6691 13:54:48.552597 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass
6693 13:54:48.577195 <6>[ 15.248533] Console: switching to colour dummy device 80x25
6694 13:54:48.584033 <14>[ 15.254940] [IGT] panfrost_submit: executing
6695 13:54:48.593423 IGT-Version: 1.2<14>[ 15.260143] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-requirements
6696 13:54:48.603831 8-ga44ebfe (aarc<14>[ 15.270074] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-requirements, SUCCESS
6697 13:54:48.609874 h64) (Linux: 6.1<14>[ 15.280562] [IGT] panfrost_submit: exiting, ret=0
6698 13:54:48.613711 .96-cip24 aarch64)
6699 13:54:48.616928 Using IGT_SRANDOM=1721310888 for randomisation
6700 13:54:48.620231 Opened device: /dev/dri/card0
6701 13:54:48.623510 Starting subtest: pan-submit-error-bad-requirements
6702 13:54:48.630087 [1mSubtest pan-submit-error-bad-requirements: SUCCESS (0.000s)[0m
6703 13:54:48.668469 <6>[ 15.320667] Console: switching to colour frame buffer device 170x48
6704 13:54:48.686429 <8>[ 15.354315] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass>
6705 13:54:48.687191 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass
6707 13:54:48.721082 <6>[ 15.392228] Console: switching to colour dummy device 80x25
6708 13:54:48.727111 <14>[ 15.398504] [IGT] panfrost_submit: executing
6709 13:54:48.737484 IGT-Version: 1.2<14>[ 15.404541] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-out-sync
6710 13:54:48.747479 8-ga44ebfe (aarc<14>[ 15.413942] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-out-sync, SUCCESS
6711 13:54:48.754125 h64) (Linux: 6.1<14>[ 15.423811] [IGT] panfrost_submit: exiting, ret=0
6712 13:54:48.754633 .96-cip24 aarch64)
6713 13:54:48.761191 Using IGT_SRANDOM=1721310888 for randomisation
6714 13:54:48.761703 Opened device: /dev/dri/card0
6715 13:54:48.767622 Starting subtest: pan-submit-error-bad-out-sync
6716 13:54:48.770895 [1mSubtest pan-submit-error-bad-out-sync: SUCCESS (0.000s)[0m
6717 13:54:48.801707 <6>[ 15.453903] Console: switching to colour frame buffer device 170x48
6718 13:54:48.818348 <8>[ 15.486289] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass>
6719 13:54:48.819110 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass
6721 13:54:48.852275 <6>[ 15.523248] Console: switching to colour dummy device 80x25
6722 13:54:48.858157 <14>[ 15.529589] [IGT] panfrost_submit: executing
6723 13:54:48.865031 IGT-Version: 1.2<14>[ 15.535506] [IGT] panfrost_submit: starting subtest pan-reset
6724 13:54:48.872252 8-ga44ebfe (aarch64) (Linux: 6.1.96-cip24 aarch64)
6725 13:54:48.875331 Using IGT_SRANDOM=1721310888 for randomisation
6726 13:54:48.878327 Opened device: /dev/dri/card0
6727 13:54:48.878719 Starting subtest: pan-reset
6728 13:54:49.381235 <3>[ 16.043111] panfrost 13040000.gpu: gpu sched timeout, js=1, config=0x7300, status=0x8, head=0x2000000, tail=0x2000040, sched_job=00000000809231f9
6729 13:54:49.391364 [1mSubtest pan-<14>[ 16.058610] [IGT] panfrost_submit: finished subtest pan-reset, SUCCESS
6730 13:54:49.398168 reset: SUCCESS (<14>[ 16.067023] [IGT] panfrost_submit: exiting, ret=0
6731 13:54:49.398659 0.516s)[0m
6732 13:54:49.452794 <6>[ 16.107021] Console: switching to colour frame buffer device 170x48
6733 13:54:49.468894 Received signal: <TESTCASE> TEST_CASE_ID=pan-reset RESULT=pass
6735 13:54:49.471217 <8>[ 16.139764] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-reset RESULT=pass>
6736 13:54:49.492060 <6>[ 16.163442] Console: switching to colour dummy device 80x25
6737 13:54:49.498785 <14>[ 16.169385] [IGT] panfrost_submit: executing
6738 13:54:49.505349 IGT-Version: 1.2<14>[ 16.174523] [IGT] panfrost_submit: starting subtest pan-submit-and-close
6739 13:54:49.515392 8-ga44ebfe (aarc<14>[ 16.183220] [IGT] panfrost_submit: finished subtest pan-submit-and-close, SUCCESS
6740 13:54:49.521872 h64) (Linux: 6.1<14>[ 16.192181] [IGT] panfrost_submit: exiting, ret=0
6741 13:54:49.525490 .96-cip24 aarch64)
6742 13:54:49.528789 Using IGT_SRANDOM=1721310889 for randomisation
6743 13:54:49.532179 Opened device: /dev/dri/card0
6744 13:54:49.535581 Starting subtest: pan-submit-and-close
6745 13:54:49.538233 [1mSubtest pan-submit-and-close: SUCCESS (0.000s)[0m
6746 13:54:49.563052 <6>[ 16.217674] Console: switching to colour frame buffer device 170x48
6747 13:54:49.581700 <8>[ 16.249622] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-and-close RESULT=pass>
6748 13:54:49.582463 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-and-close RESULT=pass
6750 13:54:49.605502 <6>[ 16.276071] Console: switching to colour dummy device 80x25
6751 13:54:49.611084 <14>[ 16.282380] [IGT] panfrost_submit: executing
6752 13:54:49.621212 IGT-Version: 1.2<14>[ 16.287547] [IGT] panfrost_submit: starting subtest pan-unhandled-pagefault
6753 13:54:49.628182 8-ga44ebfe (aarc<3>[ 16.296899] panfrost 13040000.gpu: Unhandled Page fault in AS0 at VA 0x0000DEADBEEF0000
6754 13:54:49.631090 <3>[ 16.296899] Reason: TODO
6755 13:54:49.638078 <3>[ 16.296899] raw fault status: 0x7C1003C0
6756 13:54:49.641361 <3>[ 16.296899] decoded fault status: SLAVE FAULT
6757 13:54:49.647945 <3>[ 16.296899] exception type 0xC0: TRANSLATION_FAULT_0
6758 13:54:49.650911 <3>[ 16.296899] access type 0x3: WRITE
6759 13:54:49.654698 <3>[ 16.296899] source id 0x7C10
6760 13:54:49.664464 h64) (Linux: 6.1<3>[ 16.329521] panfrost 13040000.gpu: js fault, js=1, status=JOB_BUS_FAULT, head=0x2000000, tail=0x2000000
6761 13:54:49.664858 .96-cip24 aarch64)
6762 13:54:49.674670 Using IGT_SR<14>[ 16.342010] [IGT] panfrost_submit: finished subtest pan-unhandled-pagefault, SUCCESS
6763 13:54:49.681059 ANDOM=1721310889<14>[ 16.351689] [IGT] panfrost_submit: exiting, ret=0
6764 13:54:49.684470 for randomisation
6765 13:54:49.684922 Opened device: /dev/dri/card0
6766 13:54:49.691074 Starting subtest: pan-unhandled-pagefault
6767 13:54:49.694188 [1mSubtest pan-unhandled-pagefault: SUCCESS (0.045s)[0m
6768 13:54:49.733925 <6>[ 16.385182] Console: switching to colour frame buffer device 170x48
6769 13:54:49.750814 <8>[ 16.419150] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-unhandled-pagefault RESULT=pass>
6770 13:54:49.751533 Received signal: <TESTCASE> TEST_CASE_ID=pan-unhandled-pagefault RESULT=pass
6772 13:54:49.757559 <8>[ 16.429094] <LAVA_SIGNAL_TESTSET STOP>
6773 13:54:49.758277 Received signal: <TESTSET> STOP
6774 13:54:49.758598 Closing test_set panfrost_submit
6775 13:54:49.764315 <8>[ 16.434483] <LAVA_SIGNAL_ENDRUN 0_igt-gpu-panfrost 14879057_1.5.2.3.1>
6776 13:54:49.764778 + set +x
6777 13:54:49.765322 Received signal: <ENDRUN> 0_igt-gpu-panfrost 14879057_1.5.2.3.1
6778 13:54:49.765683 Ending use of test pattern.
6779 13:54:49.765960 Ending test lava.0_igt-gpu-panfrost (14879057_1.5.2.3.1), duration 2.71
6781 13:54:49.767774 <LAVA_TEST_RUNNER EXIT>
6782 13:54:49.768375 ok: lava_test_shell seems to have completed
6783 13:54:49.769829 gem-new-4096:
set: panfrost_gem_new
result: pass
gem-new-0:
set: panfrost_gem_new
result: pass
gem-new-zeroed:
set: panfrost_gem_new
result: pass
base-params:
set: panfrost_get_param
result: pass
get-bad-param:
set: panfrost_get_param
result: pass
get-bad-padding:
set: panfrost_get_param
result: pass
gem-prime-import:
set: panfrost_prime
result: fail
pan-submit:
set: panfrost_submit
result: pass
pan-submit-error-no-jc:
set: panfrost_submit
result: pass
pan-submit-error-bad-in-syncs:
set: panfrost_submit
result: pass
pan-submit-error-bad-bo-handles:
set: panfrost_submit
result: pass
pan-submit-error-bad-requirements:
set: panfrost_submit
result: pass
pan-submit-error-bad-out-sync:
set: panfrost_submit
result: pass
pan-reset:
set: panfrost_submit
result: pass
pan-submit-and-close:
set: panfrost_submit
result: pass
pan-unhandled-pagefault:
set: panfrost_submit
result: pass
6784 13:54:49.770294 end: 3.1 lava-test-shell (duration 00:00:03) [common]
6785 13:54:49.770676 end: 3 lava-test-retry (duration 00:00:03) [common]
6786 13:54:49.771058 start: 4 finalize (timeout 00:08:00) [common]
6787 13:54:49.771465 start: 4.1 power-off (timeout 00:00:30) [common]
6788 13:54:49.772084 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
6789 13:54:51.866186 >> Command sent successfully.
6790 13:54:51.880300 Returned 0 in 2 seconds
6791 13:54:51.880859 end: 4.1 power-off (duration 00:00:02) [common]
6793 13:54:51.881859 start: 4.2 read-feedback (timeout 00:07:58) [common]
6794 13:54:51.882458 Listened to connection for namespace 'common' for up to 1s
6795 13:54:52.883519 Finalising connection for namespace 'common'
6796 13:54:52.884053 Disconnecting from shell: Finalise
6797 13:54:52.884400 / #
6798 13:54:52.985380 end: 4.2 read-feedback (duration 00:00:01) [common]
6799 13:54:52.985991 end: 4 finalize (duration 00:00:03) [common]
6800 13:54:52.986543 Cleaning after the job
6801 13:54:52.987032 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879057/tftp-deploy-fat42sxu/ramdisk
6802 13:54:52.996509 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879057/tftp-deploy-fat42sxu/kernel
6803 13:54:53.012006 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879057/tftp-deploy-fat42sxu/dtb
6804 13:54:53.012205 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879057/tftp-deploy-fat42sxu/modules
6805 13:54:53.017722 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14879057
6806 13:54:53.124029 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14879057
6807 13:54:53.124192 Job finished correctly