Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 46
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 90
1 13:43:08.961525 lava-dispatcher, installed at version: 2024.05
2 13:43:08.961731 start: 0 validate
3 13:43:08.961854 Start time: 2024-07-18 13:43:08.961845+00:00 (UTC)
4 13:43:08.961980 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:43:08.962117 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 13:43:09.224666 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:43:09.225354 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 13:43:09.486164 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:43:09.486345 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 13:43:09.798223 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:43:09.798409 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 13:43:10.055976 Using caching service: 'http://localhost/cache/?uri=%s'
13 13:43:10.056165 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
14 13:43:10.316003 validate duration: 1.35
16 13:43:10.316421 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 13:43:10.316564 start: 1.1 download-retry (timeout 00:10:00) [common]
18 13:43:10.316672 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 13:43:10.316861 Not decompressing ramdisk as can be used compressed.
20 13:43:10.316970 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 13:43:10.317055 saving as /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/ramdisk/initrd.cpio.gz
22 13:43:10.317168 total size: 5628169 (5 MB)
23 13:43:10.318548 progress 0 % (0 MB)
24 13:43:10.320138 progress 5 % (0 MB)
25 13:43:10.321809 progress 10 % (0 MB)
26 13:43:10.323178 progress 15 % (0 MB)
27 13:43:10.324828 progress 20 % (1 MB)
28 13:43:10.326249 progress 25 % (1 MB)
29 13:43:10.327869 progress 30 % (1 MB)
30 13:43:10.329561 progress 35 % (1 MB)
31 13:43:10.331301 progress 40 % (2 MB)
32 13:43:10.333365 progress 45 % (2 MB)
33 13:43:10.334843 progress 50 % (2 MB)
34 13:43:10.336541 progress 55 % (2 MB)
35 13:43:10.338147 progress 60 % (3 MB)
36 13:43:10.339512 progress 65 % (3 MB)
37 13:43:10.341059 progress 70 % (3 MB)
38 13:43:10.342438 progress 75 % (4 MB)
39 13:43:10.344187 progress 80 % (4 MB)
40 13:43:10.345571 progress 85 % (4 MB)
41 13:43:10.347108 progress 90 % (4 MB)
42 13:43:10.348641 progress 95 % (5 MB)
43 13:43:10.350032 progress 100 % (5 MB)
44 13:43:10.350244 5 MB downloaded in 0.03 s (162.14 MB/s)
45 13:43:10.350390 end: 1.1.1 http-download (duration 00:00:00) [common]
47 13:43:10.350602 end: 1.1 download-retry (duration 00:00:00) [common]
48 13:43:10.350679 start: 1.2 download-retry (timeout 00:10:00) [common]
49 13:43:10.350752 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 13:43:10.350886 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
51 13:43:10.350946 saving as /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/kernel/Image
52 13:43:10.350998 total size: 54813184 (52 MB)
53 13:43:10.351051 No compression specified
54 13:43:10.352027 progress 0 % (0 MB)
55 13:43:10.365891 progress 5 % (2 MB)
56 13:43:10.380831 progress 10 % (5 MB)
57 13:43:10.398806 progress 15 % (7 MB)
58 13:43:10.413993 progress 20 % (10 MB)
59 13:43:10.429882 progress 25 % (13 MB)
60 13:43:10.445548 progress 30 % (15 MB)
61 13:43:10.462024 progress 35 % (18 MB)
62 13:43:10.477795 progress 40 % (20 MB)
63 13:43:10.494885 progress 45 % (23 MB)
64 13:43:10.511752 progress 50 % (26 MB)
65 13:43:10.529231 progress 55 % (28 MB)
66 13:43:10.544913 progress 60 % (31 MB)
67 13:43:10.561170 progress 65 % (34 MB)
68 13:43:10.579588 progress 70 % (36 MB)
69 13:43:10.597219 progress 75 % (39 MB)
70 13:43:10.613987 progress 80 % (41 MB)
71 13:43:10.629265 progress 85 % (44 MB)
72 13:43:10.646255 progress 90 % (47 MB)
73 13:43:10.660168 progress 95 % (49 MB)
74 13:43:10.677518 progress 100 % (52 MB)
75 13:43:10.677836 52 MB downloaded in 0.33 s (159.94 MB/s)
76 13:43:10.677990 end: 1.2.1 http-download (duration 00:00:00) [common]
78 13:43:10.678200 end: 1.2 download-retry (duration 00:00:00) [common]
79 13:43:10.678339 start: 1.3 download-retry (timeout 00:10:00) [common]
80 13:43:10.678440 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 13:43:10.678630 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 13:43:10.678704 saving as /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 13:43:10.678760 total size: 57695 (0 MB)
84 13:43:10.678814 No compression specified
85 13:43:10.680016 progress 56 % (0 MB)
86 13:43:10.680349 progress 100 % (0 MB)
87 13:43:10.680546 0 MB downloaded in 0.00 s (30.86 MB/s)
88 13:43:10.680660 end: 1.3.1 http-download (duration 00:00:00) [common]
90 13:43:10.680918 end: 1.3 download-retry (duration 00:00:00) [common]
91 13:43:10.681009 start: 1.4 download-retry (timeout 00:10:00) [common]
92 13:43:10.681165 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 13:43:10.681282 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 13:43:10.681343 saving as /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/nfsrootfs/full.rootfs.tar
95 13:43:10.681397 total size: 120894716 (115 MB)
96 13:43:10.681453 Using unxz to decompress xz
97 13:43:10.682949 progress 0 % (0 MB)
98 13:43:11.034917 progress 5 % (5 MB)
99 13:43:11.388417 progress 10 % (11 MB)
100 13:43:11.737666 progress 15 % (17 MB)
101 13:43:12.090303 progress 20 % (23 MB)
102 13:43:12.399898 progress 25 % (28 MB)
103 13:43:12.756193 progress 30 % (34 MB)
104 13:43:13.095059 progress 35 % (40 MB)
105 13:43:13.280173 progress 40 % (46 MB)
106 13:43:13.475681 progress 45 % (51 MB)
107 13:43:13.790710 progress 50 % (57 MB)
108 13:43:14.164780 progress 55 % (63 MB)
109 13:43:14.514894 progress 60 % (69 MB)
110 13:43:15.077607 progress 65 % (74 MB)
111 13:43:15.441960 progress 70 % (80 MB)
112 13:43:15.810697 progress 75 % (86 MB)
113 13:43:16.141394 progress 80 % (92 MB)
114 13:43:16.482344 progress 85 % (98 MB)
115 13:43:16.827870 progress 90 % (103 MB)
116 13:43:17.158313 progress 95 % (109 MB)
117 13:43:17.517058 progress 100 % (115 MB)
118 13:43:17.522452 115 MB downloaded in 6.84 s (16.85 MB/s)
119 13:43:17.522605 end: 1.4.1 http-download (duration 00:00:07) [common]
121 13:43:17.522808 end: 1.4 download-retry (duration 00:00:07) [common]
122 13:43:17.522883 start: 1.5 download-retry (timeout 00:09:53) [common]
123 13:43:17.522955 start: 1.5.1 http-download (timeout 00:09:53) [common]
124 13:43:17.523137 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
125 13:43:17.523218 saving as /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/modules/modules.tar
126 13:43:17.523273 total size: 8611320 (8 MB)
127 13:43:17.523328 Using unxz to decompress xz
128 13:43:17.524741 progress 0 % (0 MB)
129 13:43:17.545606 progress 5 % (0 MB)
130 13:43:17.571496 progress 10 % (0 MB)
131 13:43:17.596096 progress 15 % (1 MB)
132 13:43:17.621017 progress 20 % (1 MB)
133 13:43:17.644460 progress 25 % (2 MB)
134 13:43:17.668067 progress 30 % (2 MB)
135 13:43:17.690758 progress 35 % (2 MB)
136 13:43:17.718313 progress 40 % (3 MB)
137 13:43:17.743158 progress 45 % (3 MB)
138 13:43:17.767056 progress 50 % (4 MB)
139 13:43:17.792311 progress 55 % (4 MB)
140 13:43:17.818073 progress 60 % (4 MB)
141 13:43:17.841210 progress 65 % (5 MB)
142 13:43:17.866515 progress 70 % (5 MB)
143 13:43:17.893546 progress 75 % (6 MB)
144 13:43:17.921151 progress 80 % (6 MB)
145 13:43:17.944733 progress 85 % (7 MB)
146 13:43:17.968329 progress 90 % (7 MB)
147 13:43:17.991441 progress 95 % (7 MB)
148 13:43:18.014754 progress 100 % (8 MB)
149 13:43:18.020511 8 MB downloaded in 0.50 s (16.52 MB/s)
150 13:43:18.020734 end: 1.5.1 http-download (duration 00:00:00) [common]
152 13:43:18.021091 end: 1.5 download-retry (duration 00:00:00) [common]
153 13:43:18.021255 start: 1.6 prepare-tftp-overlay (timeout 00:09:52) [common]
154 13:43:18.021381 start: 1.6.1 extract-nfsrootfs (timeout 00:09:52) [common]
155 13:43:21.838136 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14879042/extract-nfsrootfs-_ht9re7n
156 13:43:21.838308 end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
157 13:43:21.838432 start: 1.6.2 lava-overlay (timeout 00:09:48) [common]
158 13:43:21.838581 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g
159 13:43:21.838697 makedir: /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin
160 13:43:21.838787 makedir: /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/tests
161 13:43:21.838875 makedir: /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/results
162 13:43:21.838957 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-add-keys
163 13:43:21.839081 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-add-sources
164 13:43:21.839202 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-background-process-start
165 13:43:21.839317 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-background-process-stop
166 13:43:21.839437 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-common-functions
167 13:43:21.839551 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-echo-ipv4
168 13:43:21.839665 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-install-packages
169 13:43:21.839796 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-installed-packages
170 13:43:21.839908 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-os-build
171 13:43:21.840018 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-probe-channel
172 13:43:21.840128 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-probe-ip
173 13:43:21.840243 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-target-ip
174 13:43:21.840352 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-target-mac
175 13:43:21.840461 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-target-storage
176 13:43:21.840573 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-test-case
177 13:43:21.840683 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-test-event
178 13:43:21.840791 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-test-feedback
179 13:43:21.840900 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-test-raise
180 13:43:21.841012 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-test-reference
181 13:43:21.841122 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-test-runner
182 13:43:21.841270 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-test-set
183 13:43:21.841380 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-test-shell
184 13:43:21.841493 Updating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-add-keys (debian)
185 13:43:21.927739 Updating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-add-sources (debian)
186 13:43:21.927947 Updating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-install-packages (debian)
187 13:43:21.928081 Updating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-installed-packages (debian)
188 13:43:21.928208 Updating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/bin/lava-os-build (debian)
189 13:43:21.928320 Creating /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/environment
190 13:43:21.928411 LAVA metadata
191 13:43:21.928478 - LAVA_JOB_ID=14879042
192 13:43:21.928534 - LAVA_DISPATCHER_IP=192.168.201.1
193 13:43:21.928639 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:48) [common]
194 13:43:21.928696 skipped lava-vland-overlay
195 13:43:21.928763 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 13:43:21.928834 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
197 13:43:21.928895 skipped lava-multinode-overlay
198 13:43:21.928981 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 13:43:21.929051 start: 1.6.2.3 test-definition (timeout 00:09:48) [common]
200 13:43:21.929115 Loading test definitions
201 13:43:21.929223 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:48) [common]
202 13:43:21.929280 Using /lava-14879042 at stage 0
203 13:43:21.929565 uuid=14879042_1.6.2.3.1 testdef=None
204 13:43:21.929645 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 13:43:21.929718 start: 1.6.2.3.2 test-overlay (timeout 00:09:48) [common]
206 13:43:21.930108 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 13:43:21.930299 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:48) [common]
209 13:43:21.930783 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 13:43:21.930987 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
212 13:43:22.139996 runner path: /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/0/tests/0_timesync-off test_uuid 14879042_1.6.2.3.1
213 13:43:22.140178 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 13:43:22.140390 start: 1.6.2.3.5 git-repo-action (timeout 00:09:48) [common]
216 13:43:22.140456 Using /lava-14879042 at stage 0
217 13:43:22.140547 Fetching tests from https://github.com/kernelci/test-definitions.git
218 13:43:22.140623 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/0/tests/1_kselftest-rtc'
219 13:43:25.330374 Running '/usr/bin/git checkout kernelci.org
220 13:43:25.655459 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
221 13:43:25.656093 uuid=14879042_1.6.2.3.5 testdef=None
222 13:43:25.656236 end: 1.6.2.3.5 git-repo-action (duration 00:00:04) [common]
224 13:43:25.656551 start: 1.6.2.3.6 test-overlay (timeout 00:09:45) [common]
225 13:43:25.657710 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 13:43:25.658043 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:45) [common]
228 13:43:25.752510 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 13:43:25.752754 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:45) [common]
231 13:43:25.756258 runner path: /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/0/tests/1_kselftest-rtc test_uuid 14879042_1.6.2.3.5
232 13:43:25.756350 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 13:43:25.756409 BRANCH='cip'
234 13:43:25.756463 SKIPFILE='/dev/null'
235 13:43:25.756514 SKIP_INSTALL='True'
236 13:43:25.756563 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz'
237 13:43:25.756614 TST_CASENAME=''
238 13:43:25.756663 TST_CMDFILES='rtc'
239 13:43:25.756804 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 13:43:25.756989 Creating lava-test-runner.conf files
242 13:43:25.757045 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14879042/lava-overlay-oa50gt_g/lava-14879042/0 for stage 0
243 13:43:25.757127 - 0_timesync-off
244 13:43:25.757199 - 1_kselftest-rtc
245 13:43:25.757287 end: 1.6.2.3 test-definition (duration 00:00:04) [common]
246 13:43:25.757364 start: 1.6.2.4 compress-overlay (timeout 00:09:45) [common]
247 13:43:33.153606 end: 1.6.2.4 compress-overlay (duration 00:00:07) [common]
248 13:43:33.153744 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
249 13:43:33.153848 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 13:43:33.153946 end: 1.6.2 lava-overlay (duration 00:00:11) [common]
251 13:43:33.154040 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
252 13:43:33.319827 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 13:43:33.320007 start: 1.6.4 extract-modules (timeout 00:09:37) [common]
254 13:43:33.320119 extracting modules file /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14879042/extract-nfsrootfs-_ht9re7n
255 13:43:33.575654 extracting modules file /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14879042/extract-overlay-ramdisk-voxq8okz/ramdisk
256 13:43:33.816898 end: 1.6.4 extract-modules (duration 00:00:00) [common]
257 13:43:33.817035 start: 1.6.5 apply-overlay-tftp (timeout 00:09:36) [common]
258 13:43:33.817114 [common] Applying overlay to NFS
259 13:43:33.817287 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14879042/compress-overlay-z07o58m_/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14879042/extract-nfsrootfs-_ht9re7n
260 13:43:34.775012 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 13:43:34.775139 start: 1.6.6 configure-preseed-file (timeout 00:09:36) [common]
262 13:43:34.775226 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 13:43:34.775303 start: 1.6.7 compress-ramdisk (timeout 00:09:36) [common]
264 13:43:34.775370 Building ramdisk /var/lib/lava/dispatcher/tmp/14879042/extract-overlay-ramdisk-voxq8okz/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14879042/extract-overlay-ramdisk-voxq8okz/ramdisk
265 13:43:35.391904 >> 129966 blocks
266 13:43:37.562751 rename /var/lib/lava/dispatcher/tmp/14879042/extract-overlay-ramdisk-voxq8okz/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/ramdisk/ramdisk.cpio.gz
267 13:43:37.562929 end: 1.6.7 compress-ramdisk (duration 00:00:03) [common]
268 13:43:37.563067 start: 1.6.8 prepare-kernel (timeout 00:09:33) [common]
269 13:43:37.563174 start: 1.6.8.1 prepare-fit (timeout 00:09:33) [common]
270 13:43:37.563279 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/kernel/Image']
271 13:43:52.946525 Returned 0 in 15 seconds
272 13:43:52.946697 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/kernel/image.itb
273 13:43:54.332406 output: FIT description: Kernel Image image with one or more FDT blobs
274 13:43:54.332970 output: Created: Thu Jul 18 14:43:53 2024
275 13:43:54.333412 output: Image 0 (kernel-1)
276 13:43:54.333706 output: Description:
277 13:43:54.334054 output: Created: Thu Jul 18 14:43:53 2024
278 13:43:54.334343 output: Type: Kernel Image
279 13:43:54.334618 output: Compression: lzma compressed
280 13:43:54.335043 output: Data Size: 13114469 Bytes = 12807.10 KiB = 12.51 MiB
281 13:43:54.335497 output: Architecture: AArch64
282 13:43:54.335871 output: OS: Linux
283 13:43:54.336277 output: Load Address: 0x00000000
284 13:43:54.336671 output: Entry Point: 0x00000000
285 13:43:54.337060 output: Hash algo: crc32
286 13:43:54.337388 output: Hash value: a47b020b
287 13:43:54.337644 output: Image 1 (fdt-1)
288 13:43:54.337893 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 13:43:54.338144 output: Created: Thu Jul 18 14:43:53 2024
290 13:43:54.338393 output: Type: Flat Device Tree
291 13:43:54.338640 output: Compression: uncompressed
292 13:43:54.338884 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 13:43:54.339134 output: Architecture: AArch64
294 13:43:54.339381 output: Hash algo: crc32
295 13:43:54.339625 output: Hash value: a9713552
296 13:43:54.339868 output: Image 2 (ramdisk-1)
297 13:43:54.340136 output: Description: unavailable
298 13:43:54.340546 output: Created: Thu Jul 18 14:43:53 2024
299 13:43:54.340850 output: Type: RAMDisk Image
300 13:43:54.341334 output: Compression: uncompressed
301 13:43:54.341647 output: Data Size: 18725248 Bytes = 18286.38 KiB = 17.86 MiB
302 13:43:54.341904 output: Architecture: AArch64
303 13:43:54.342205 output: OS: Linux
304 13:43:54.342457 output: Load Address: unavailable
305 13:43:54.342702 output: Entry Point: unavailable
306 13:43:54.342881 output: Hash algo: crc32
307 13:43:54.343101 output: Hash value: 1dcef5d3
308 13:43:54.343543 output: Default Configuration: 'conf-1'
309 13:43:54.343873 output: Configuration 0 (conf-1)
310 13:43:54.344310 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 13:43:54.344648 output: Kernel: kernel-1
312 13:43:54.344985 output: Init Ramdisk: ramdisk-1
313 13:43:54.345299 output: FDT: fdt-1
314 13:43:54.345631 output: Loadables: kernel-1
315 13:43:54.345928 output:
316 13:43:54.346380 end: 1.6.8.1 prepare-fit (duration 00:00:17) [common]
317 13:43:54.346779 end: 1.6.8 prepare-kernel (duration 00:00:17) [common]
318 13:43:54.347163 end: 1.6 prepare-tftp-overlay (duration 00:00:36) [common]
319 13:43:54.347552 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:16) [common]
320 13:43:54.347741 No LXC device requested
321 13:43:54.347946 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 13:43:54.348140 start: 1.8 deploy-device-env (timeout 00:09:16) [common]
323 13:43:54.348326 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 13:43:54.348562 Checking files for TFTP limit of 4294967296 bytes.
325 13:43:54.349672 end: 1 tftp-deploy (duration 00:00:44) [common]
326 13:43:54.349918 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 13:43:54.350147 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 13:43:54.350505 substitutions:
329 13:43:54.350756 - {DTB}: 14879042/tftp-deploy-y21e4bx3/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 13:43:54.351000 - {INITRD}: 14879042/tftp-deploy-y21e4bx3/ramdisk/ramdisk.cpio.gz
331 13:43:54.351224 - {KERNEL}: 14879042/tftp-deploy-y21e4bx3/kernel/Image
332 13:43:54.351439 - {LAVA_MAC}: None
333 13:43:54.351586 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14879042/extract-nfsrootfs-_ht9re7n
334 13:43:54.351727 - {NFS_SERVER_IP}: 192.168.201.1
335 13:43:54.351923 - {PRESEED_CONFIG}: None
336 13:43:54.352161 - {PRESEED_LOCAL}: None
337 13:43:54.352348 - {RAMDISK}: 14879042/tftp-deploy-y21e4bx3/ramdisk/ramdisk.cpio.gz
338 13:43:54.352489 - {ROOT_PART}: None
339 13:43:54.352648 - {ROOT}: None
340 13:43:54.352840 - {SERVER_IP}: 192.168.201.1
341 13:43:54.353010 - {TEE}: None
342 13:43:54.353187 Parsed boot commands:
343 13:43:54.353301 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 13:43:54.353610 Parsed boot commands: tftpboot 192.168.201.1 14879042/tftp-deploy-y21e4bx3/kernel/image.itb 14879042/tftp-deploy-y21e4bx3/kernel/cmdline
345 13:43:54.353796 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 13:43:54.353972 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 13:43:54.354196 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 13:43:54.354412 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 13:43:54.354540 Not connected, no need to disconnect.
350 13:43:54.354778 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 13:43:54.354994 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 13:43:54.355152 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
353 13:43:54.360746 Setting prompt string to ['lava-test: # ']
354 13:43:54.361471 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 13:43:54.361674 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 13:43:54.361847 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 13:43:54.361997 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 13:43:54.362399 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=reboot']
359 13:44:03.503066 >> Command sent successfully.
360 13:44:03.506612 Returned 0 in 9 seconds
361 13:44:03.506757 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
363 13:44:03.506972 end: 2.2.2 reset-device (duration 00:00:09) [common]
364 13:44:03.507053 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
365 13:44:03.507129 Setting prompt string to 'Starting depthcharge on Juniper...'
366 13:44:03.507192 Changing prompt to 'Starting depthcharge on Juniper...'
367 13:44:03.507261 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
368 13:44:03.507598 [Enter `^Ec?' for help]
369 13:44:11.400695 [DL] 00000000 00000000 010701
370 13:44:11.405556
371 13:44:11.405667
372 13:44:11.405728 F0: 102B 0000
373 13:44:11.405787
374 13:44:11.405838 F3: 1006 0033 [0200]
375 13:44:11.408869
376 13:44:11.408935 F3: 4001 00E0 [0200]
377 13:44:11.408987
378 13:44:11.409036 F3: 0000 0000
379 13:44:11.411908
380 13:44:11.412031 V0: 0000 0000 [0001]
381 13:44:11.412131
382 13:44:11.412224 00: 1027 0002
383 13:44:11.412320
384 13:44:11.415704 01: 0000 0000
385 13:44:11.415815
386 13:44:11.415911 BP: 0C00 0251 [0000]
387 13:44:11.416004
388 13:44:11.419256 G0: 1182 0000
389 13:44:11.419360
390 13:44:11.419456 EC: 0004 0000 [0001]
391 13:44:11.419547
392 13:44:11.422271 S7: 0000 0000 [0000]
393 13:44:11.422375
394 13:44:11.422470 CC: 0000 0000 [0001]
395 13:44:11.425873
396 13:44:11.425952 T0: 0000 00DB [000F]
397 13:44:11.426011
398 13:44:11.426063 Jump to BL
399 13:44:11.426114
400 13:44:11.461438
401 13:44:11.461573
402 13:44:11.467984 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
403 13:44:11.471461 ARM64: Exception handlers installed.
404 13:44:11.474842 ARM64: Testing exception
405 13:44:11.478316 ARM64: Done test exception
406 13:44:11.481908 WDT: Last reset was cold boot
407 13:44:11.485235 SPI0(PAD0) initialized at 992727 Hz
408 13:44:11.489885 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
409 13:44:11.489961 Manufacturer: ef
410 13:44:11.496716 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
411 13:44:11.508477 Probing TPM: . done!
412 13:44:11.508592 TPM ready after 0 ms
413 13:44:11.515377 Connected to device vid:did:rid of 1ae0:0028:00
414 13:44:11.521876 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
415 13:44:11.525662 Initialized TPM device CR50 revision 0
416 13:44:11.571632 tlcl_send_startup: Startup return code is 0
417 13:44:11.571751 TPM: setup succeeded
418 13:44:11.580882 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
419 13:44:11.584134 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
420 13:44:11.587644 in-header: 03 19 00 00 08 00 00 00
421 13:44:11.590994 in-data: a2 e0 47 00 13 00 00 00
422 13:44:11.594816 Chrome EC: UHEPI supported
423 13:44:11.601090 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
424 13:44:11.604135 in-header: 03 a1 00 00 08 00 00 00
425 13:44:11.607736 in-data: 84 60 60 10 00 00 00 00
426 13:44:11.607813 Phase 1
427 13:44:11.610769 FMAP: area GBB found @ 3f5000 (12032 bytes)
428 13:44:11.617670 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
429 13:44:11.621244 VB2:vb2_check_recovery() Recovery was requested manually
430 13:44:11.627874 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
431 13:44:11.633438 Recovery requested (1009000e)
432 13:44:11.642030 tlcl_extend: response is 0
433 13:44:11.647481 tlcl_extend: response is 0
434 13:44:11.672558
435 13:44:11.672680
436 13:44:11.679246 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
437 13:44:11.682746 ARM64: Exception handlers installed.
438 13:44:11.686076 ARM64: Testing exception
439 13:44:11.689401 ARM64: Done test exception
440 13:44:11.704758 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x2000
441 13:44:11.711218 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
442 13:44:11.714677 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
443 13:44:11.722852 [RTC]rtc_get_frequency_meter,134: input=0xf, output=864
444 13:44:11.729742 [RTC]rtc_get_frequency_meter,134: input=0x7, output=734
445 13:44:11.737022 [RTC]rtc_get_frequency_meter,134: input=0xb, output=798
446 13:44:11.743759 [RTC]rtc_get_frequency_meter,134: input=0x9, output=767
447 13:44:11.750627 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
448 13:44:11.757037 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
449 13:44:11.764487 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
450 13:44:11.767389 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b
451 13:44:11.774042 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
452 13:44:11.777548 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
453 13:44:11.781128 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
454 13:44:11.784793 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
455 13:44:11.787854 in-header: 03 19 00 00 08 00 00 00
456 13:44:11.791528 in-data: a2 e0 47 00 13 00 00 00
457 13:44:11.794374 Chrome EC: UHEPI supported
458 13:44:11.801317 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
459 13:44:11.804876 in-header: 03 a1 00 00 08 00 00 00
460 13:44:11.807808 in-data: 84 60 60 10 00 00 00 00
461 13:44:11.811419 Skip loading cached calibration data
462 13:44:11.818323 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
463 13:44:11.821509 in-header: 03 a1 00 00 08 00 00 00
464 13:44:11.824590 in-data: 84 60 60 10 00 00 00 00
465 13:44:11.831329 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
466 13:44:11.834514 in-header: 03 a1 00 00 08 00 00 00
467 13:44:11.838095 in-data: 84 60 60 10 00 00 00 00
468 13:44:11.841229 ADC[3]: Raw value=1038187 ID=8
469 13:44:11.841343 Manufacturer: ef
470 13:44:11.848333 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
471 13:44:11.851204 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
472 13:44:11.854993 CBFS @ 21000 size 3d4000
473 13:44:11.857816 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
474 13:44:11.864595 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
475 13:44:11.868571 CBFS: Found @ offset 3c880 size 4b
476 13:44:11.868693 DRAM-K: Full Calibration
477 13:44:11.874954 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
478 13:44:11.875036 CBFS @ 21000 size 3d4000
479 13:44:11.881543 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
480 13:44:11.884971 CBFS: Locating 'fallback/dram'
481 13:44:11.887908 CBFS: Found @ offset 24b00 size 12268
482 13:44:11.915406 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
483 13:44:11.918913 ddr_geometry: 1, config: 0x0
484 13:44:11.922563 header.status = 0x0
485 13:44:11.925671 header.magic = 0x44524d4b (expected: 0x44524d4b)
486 13:44:11.928982 header.version = 0x5 (expected: 0x5)
487 13:44:11.932616 header.size = 0x8f0 (expected: 0x8f0)
488 13:44:11.932728 header.config = 0x0
489 13:44:11.935726 header.flags = 0x0
490 13:44:11.935831 header.checksum = 0x0
491 13:44:11.942304 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
492 13:44:11.949123 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
493 13:44:11.952322 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
494 13:44:11.956048 ddr_geometry:1
495 13:44:11.956177 [EMI] new MDL number = 1
496 13:44:11.959306 dram_cbt_mode_extern: 0
497 13:44:11.962421 dram_cbt_mode [RK0]: 0, [RK1]: 0
498 13:44:11.969714 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
499 13:44:11.969831
500 13:44:11.969929
501 13:44:11.970023 [Bianco] ETT version 0.0.0.1
502 13:44:11.975590 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
503 13:44:11.975743
504 13:44:11.979416 vSetVcoreByFreq with vcore:762500, freq=1600
505 13:44:11.979527
506 13:44:11.979621 [DramcInit]
507 13:44:11.982764 AutoRefreshCKEOff AutoREF OFF
508 13:44:11.985723 DDRPhyPLLSetting-CKEOFF
509 13:44:11.989242 DDRPhyPLLSetting-CKEON
510 13:44:11.989352
511 13:44:11.989450 Enable WDQS
512 13:44:11.993026 [ModeRegInit_LP4] CH0 RK0
513 13:44:11.996521 Write Rank0 MR13 =0x18
514 13:44:11.996632 Write Rank0 MR12 =0x5d
515 13:44:11.999642 Write Rank0 MR1 =0x56
516 13:44:12.003477 Write Rank0 MR2 =0x1a
517 13:44:12.003588 Write Rank0 MR11 =0x0
518 13:44:12.006198 Write Rank0 MR22 =0x38
519 13:44:12.006304 Write Rank0 MR14 =0x5d
520 13:44:12.009891 Write Rank0 MR3 =0x30
521 13:44:12.013404 Write Rank0 MR13 =0x58
522 13:44:12.013518 Write Rank0 MR12 =0x5d
523 13:44:12.016360 Write Rank0 MR1 =0x56
524 13:44:12.016468 Write Rank0 MR2 =0x2d
525 13:44:12.019975 Write Rank0 MR11 =0x23
526 13:44:12.022990 Write Rank0 MR22 =0x34
527 13:44:12.023079 Write Rank0 MR14 =0x10
528 13:44:12.026475 Write Rank0 MR3 =0x30
529 13:44:12.026562 Write Rank0 MR13 =0xd8
530 13:44:12.030322 [ModeRegInit_LP4] CH0 RK1
531 13:44:12.033026 Write Rank1 MR13 =0x18
532 13:44:12.033127 Write Rank1 MR12 =0x5d
533 13:44:12.036761 Write Rank1 MR1 =0x56
534 13:44:12.039767 Write Rank1 MR2 =0x1a
535 13:44:12.039846 Write Rank1 MR11 =0x0
536 13:44:12.043514 Write Rank1 MR22 =0x38
537 13:44:12.043589 Write Rank1 MR14 =0x5d
538 13:44:12.046355 Write Rank1 MR3 =0x30
539 13:44:12.050116 Write Rank1 MR13 =0x58
540 13:44:12.050205 Write Rank1 MR12 =0x5d
541 13:44:12.053015 Write Rank1 MR1 =0x56
542 13:44:12.053107 Write Rank1 MR2 =0x2d
543 13:44:12.056431 Write Rank1 MR11 =0x23
544 13:44:12.059883 Write Rank1 MR22 =0x34
545 13:44:12.059963 Write Rank1 MR14 =0x10
546 13:44:12.063581 Write Rank1 MR3 =0x30
547 13:44:12.063657 Write Rank1 MR13 =0xd8
548 13:44:12.066536 [ModeRegInit_LP4] CH1 RK0
549 13:44:12.069902 Write Rank0 MR13 =0x18
550 13:44:12.069979 Write Rank0 MR12 =0x5d
551 13:44:12.073287 Write Rank0 MR1 =0x56
552 13:44:12.076896 Write Rank0 MR2 =0x1a
553 13:44:12.077010 Write Rank0 MR11 =0x0
554 13:44:12.080545 Write Rank0 MR22 =0x38
555 13:44:12.080652 Write Rank0 MR14 =0x5d
556 13:44:12.083596 Write Rank0 MR3 =0x30
557 13:44:12.087121 Write Rank0 MR13 =0x58
558 13:44:12.087229 Write Rank0 MR12 =0x5d
559 13:44:12.090066 Write Rank0 MR1 =0x56
560 13:44:12.090171 Write Rank0 MR2 =0x2d
561 13:44:12.093420 Write Rank0 MR11 =0x23
562 13:44:12.096812 Write Rank0 MR22 =0x34
563 13:44:12.096902 Write Rank0 MR14 =0x10
564 13:44:12.100660 Write Rank0 MR3 =0x30
565 13:44:12.100739 Write Rank0 MR13 =0xd8
566 13:44:12.103766 [ModeRegInit_LP4] CH1 RK1
567 13:44:12.107358 Write Rank1 MR13 =0x18
568 13:44:12.107446 Write Rank1 MR12 =0x5d
569 13:44:12.110415 Write Rank1 MR1 =0x56
570 13:44:12.113941 Write Rank1 MR2 =0x1a
571 13:44:12.114035 Write Rank1 MR11 =0x0
572 13:44:12.116873 Write Rank1 MR22 =0x38
573 13:44:12.116972 Write Rank1 MR14 =0x5d
574 13:44:12.120410 Write Rank1 MR3 =0x30
575 13:44:12.123771 Write Rank1 MR13 =0x58
576 13:44:12.123908 Write Rank1 MR12 =0x5d
577 13:44:12.127324 Write Rank1 MR1 =0x56
578 13:44:12.127429 Write Rank1 MR2 =0x2d
579 13:44:12.130619 Write Rank1 MR11 =0x23
580 13:44:12.134209 Write Rank1 MR22 =0x34
581 13:44:12.134316 Write Rank1 MR14 =0x10
582 13:44:12.137098 Write Rank1 MR3 =0x30
583 13:44:12.137231 Write Rank1 MR13 =0xd8
584 13:44:12.140596 match AC timing 3
585 13:44:12.150482 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
586 13:44:12.150627 [MiockJmeterHQA]
587 13:44:12.153565 vSetVcoreByFreq with vcore:762500, freq=1600
588 13:44:12.258067
589 13:44:12.258223 MIOCK jitter meter ch=0
590 13:44:12.258324
591 13:44:12.261587 1T = (99-17) = 82 dly cells
592 13:44:12.268225 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
593 13:44:12.271051 vSetVcoreByFreq with vcore:725000, freq=1200
594 13:44:12.368189
595 13:44:12.368364 MIOCK jitter meter ch=0
596 13:44:12.368459
597 13:44:12.371718 1T = (94-16) = 78 dly cells
598 13:44:12.378212 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
599 13:44:12.381686 vSetVcoreByFreq with vcore:725000, freq=800
600 13:44:12.478398
601 13:44:12.478534 MIOCK jitter meter ch=0
602 13:44:12.478633
603 13:44:12.481996 1T = (94-16) = 78 dly cells
604 13:44:12.488548 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
605 13:44:12.491666 vSetVcoreByFreq with vcore:762500, freq=1600
606 13:44:12.495434 vSetVcoreByFreq with vcore:762500, freq=1600
607 13:44:12.495609
608 13:44:12.495751 K DRVP
609 13:44:12.498322 1. OCD DRVP=0 CALOUT=0
610 13:44:12.719256 1. OCD DRVP=1 CALOUT=0
611 13:44:12.719411 1. OCD DRVP=2 CALOUT=0
612 13:44:12.719673 1. OCD DRVP=3 CALOUT=0
613 13:44:12.719754 1. OCD DRVP=4 CALOUT=0
614 13:44:12.719820 1. OCD DRVP=5 CALOUT=0
615 13:44:12.719882 1. OCD DRVP=6 CALOUT=0
616 13:44:12.719951 1. OCD DRVP=7 CALOUT=0
617 13:44:12.720011 1. OCD DRVP=8 CALOUT=0
618 13:44:12.720071 1. OCD DRVP=9 CALOUT=1
619 13:44:12.720139
620 13:44:12.720201 1. OCD DRVP calibration OK! DRVP=9
621 13:44:12.720260
622 13:44:12.720327
623 13:44:12.720385
624 13:44:12.720441 K ODTN
625 13:44:12.720505 3. OCD ODTN=0 ,CALOUT=1
626 13:44:12.720565 3. OCD ODTN=1 ,CALOUT=1
627 13:44:12.720623 3. OCD ODTN=2 ,CALOUT=1
628 13:44:12.720688 3. OCD ODTN=3 ,CALOUT=1
629 13:44:12.720747 3. OCD ODTN=4 ,CALOUT=1
630 13:44:12.720804 3. OCD ODTN=5 ,CALOUT=1
631 13:44:12.720861 3. OCD ODTN=6 ,CALOUT=1
632 13:44:12.720927 3. OCD ODTN=7 ,CALOUT=0
633 13:44:12.720985
634 13:44:12.721041 3. OCD ODTN calibration OK! ODTN=7
635 13:44:12.721108
636 13:44:12.721182 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
637 13:44:12.721241 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
638 13:44:12.721309 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
639 13:44:12.721366
640 13:44:12.721421 K DRVP
641 13:44:12.721543 1. OCD DRVP=0 CALOUT=0
642 13:44:12.721674 1. OCD DRVP=1 CALOUT=0
643 13:44:12.721795 1. OCD DRVP=2 CALOUT=0
644 13:44:12.721923 1. OCD DRVP=3 CALOUT=0
645 13:44:12.722070 1. OCD DRVP=4 CALOUT=0
646 13:44:12.722190 1. OCD DRVP=5 CALOUT=0
647 13:44:12.722322 1. OCD DRVP=6 CALOUT=0
648 13:44:12.722465 1. OCD DRVP=7 CALOUT=0
649 13:44:12.722592 1. OCD DRVP=8 CALOUT=0
650 13:44:12.722706 1. OCD DRVP=9 CALOUT=0
651 13:44:12.722810 1. OCD DRVP=10 CALOUT=1
652 13:44:12.722924
653 13:44:12.723035 1. OCD DRVP calibration OK! DRVP=10
654 13:44:12.723142
655 13:44:12.723251
656 13:44:12.723353
657 13:44:12.723463 K ODTN
658 13:44:12.723567 3. OCD ODTN=0 ,CALOUT=1
659 13:44:12.723681 3. OCD ODTN=1 ,CALOUT=1
660 13:44:12.723793 3. OCD ODTN=2 ,CALOUT=1
661 13:44:12.723929 3. OCD ODTN=3 ,CALOUT=1
662 13:44:12.724043 3. OCD ODTN=4 ,CALOUT=1
663 13:44:12.724149 3. OCD ODTN=5 ,CALOUT=1
664 13:44:12.724264 3. OCD ODTN=6 ,CALOUT=1
665 13:44:12.724368 3. OCD ODTN=7 ,CALOUT=1
666 13:44:12.724479 3. OCD ODTN=8 ,CALOUT=1
667 13:44:12.724591 3. OCD ODTN=9 ,CALOUT=1
668 13:44:12.724675 3. OCD ODTN=10 ,CALOUT=1
669 13:44:12.724788 3. OCD ODTN=11 ,CALOUT=1
670 13:44:12.724857 3. OCD ODTN=12 ,CALOUT=1
671 13:44:12.724909 3. OCD ODTN=13 ,CALOUT=1
672 13:44:12.724967 3. OCD ODTN=14 ,CALOUT=0
673 13:44:12.725019
674 13:44:12.725070 3. OCD ODTN calibration OK! ODTN=14
675 13:44:12.725121
676 13:44:12.725212 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14
677 13:44:12.725279 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14
678 13:44:12.725329 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)
679 13:44:12.725390
680 13:44:12.725440 [DramcInit]
681 13:44:12.725490 AutoRefreshCKEOff AutoREF OFF
682 13:44:12.725548 DDRPhyPLLSetting-CKEOFF
683 13:44:12.725598 DDRPhyPLLSetting-CKEON
684 13:44:12.725647
685 13:44:12.725696 Enable WDQS
686 13:44:12.725753 ==
687 13:44:12.725805 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
688 13:44:12.725855 fsp= 1, odt_onoff= 1, Byte mode= 0
689 13:44:12.725913 ==
690 13:44:12.725965 [Duty_Offset_Calibration]
691 13:44:12.726016
692 13:44:12.726065 ===========================
693 13:44:12.726136 B0:0 B1:1 CA:1
694 13:44:12.726184 ==
695 13:44:12.726253 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
696 13:44:12.726340 fsp= 1, odt_onoff= 1, Byte mode= 0
697 13:44:12.726391 ==
698 13:44:12.726470 [Duty_Offset_Calibration]
699 13:44:12.726555
700 13:44:12.726605 ===========================
701 13:44:12.726656 B0:1 B1:2 CA:0
702 13:44:12.726736 [ModeRegInit_LP4] CH0 RK0
703 13:44:12.727265 Write Rank0 MR13 =0x18
704 13:44:12.727329 Write Rank0 MR12 =0x5d
705 13:44:12.730598 Write Rank0 MR1 =0x56
706 13:44:12.733817 Write Rank0 MR2 =0x1a
707 13:44:12.733944 Write Rank0 MR11 =0x0
708 13:44:12.736897 Write Rank0 MR22 =0x38
709 13:44:12.737037 Write Rank0 MR14 =0x5d
710 13:44:12.740604 Write Rank0 MR3 =0x30
711 13:44:12.743951 Write Rank0 MR13 =0x58
712 13:44:12.744087 Write Rank0 MR12 =0x5d
713 13:44:12.747511 Write Rank0 MR1 =0x56
714 13:44:12.747636 Write Rank0 MR2 =0x2d
715 13:44:12.750660 Write Rank0 MR11 =0x23
716 13:44:12.754151 Write Rank0 MR22 =0x34
717 13:44:12.754268 Write Rank0 MR14 =0x10
718 13:44:12.757403 Write Rank0 MR3 =0x30
719 13:44:12.757502 Write Rank0 MR13 =0xd8
720 13:44:12.761065 [ModeRegInit_LP4] CH0 RK1
721 13:44:12.763944 Write Rank1 MR13 =0x18
722 13:44:12.764055 Write Rank1 MR12 =0x5d
723 13:44:12.767350 Write Rank1 MR1 =0x56
724 13:44:12.770585 Write Rank1 MR2 =0x1a
725 13:44:12.770687 Write Rank1 MR11 =0x0
726 13:44:12.773889 Write Rank1 MR22 =0x38
727 13:44:12.773969 Write Rank1 MR14 =0x5d
728 13:44:12.777475 Write Rank1 MR3 =0x30
729 13:44:12.780500 Write Rank1 MR13 =0x58
730 13:44:12.780568 Write Rank1 MR12 =0x5d
731 13:44:12.784227 Write Rank1 MR1 =0x56
732 13:44:12.784294 Write Rank1 MR2 =0x2d
733 13:44:12.787892 Write Rank1 MR11 =0x23
734 13:44:12.790841 Write Rank1 MR22 =0x34
735 13:44:12.790972 Write Rank1 MR14 =0x10
736 13:44:12.794077 Write Rank1 MR3 =0x30
737 13:44:12.794180 Write Rank1 MR13 =0xd8
738 13:44:12.797693 [ModeRegInit_LP4] CH1 RK0
739 13:44:12.801059 Write Rank0 MR13 =0x18
740 13:44:12.801170 Write Rank0 MR12 =0x5d
741 13:44:12.804093 Write Rank0 MR1 =0x56
742 13:44:12.807830 Write Rank0 MR2 =0x1a
743 13:44:12.807916 Write Rank0 MR11 =0x0
744 13:44:12.810754 Write Rank0 MR22 =0x38
745 13:44:12.810826 Write Rank0 MR14 =0x5d
746 13:44:12.814082 Write Rank0 MR3 =0x30
747 13:44:12.817296 Write Rank0 MR13 =0x58
748 13:44:12.817415 Write Rank0 MR12 =0x5d
749 13:44:12.820530 Write Rank0 MR1 =0x56
750 13:44:12.820634 Write Rank0 MR2 =0x2d
751 13:44:12.824010 Write Rank0 MR11 =0x23
752 13:44:12.827785 Write Rank0 MR22 =0x34
753 13:44:12.827864 Write Rank0 MR14 =0x10
754 13:44:12.830937 Write Rank0 MR3 =0x30
755 13:44:12.833905 Write Rank0 MR13 =0xd8
756 13:44:12.833988 [ModeRegInit_LP4] CH1 RK1
757 13:44:12.837567 Write Rank1 MR13 =0x18
758 13:44:12.837651 Write Rank1 MR12 =0x5d
759 13:44:12.840505 Write Rank1 MR1 =0x56
760 13:44:12.844256 Write Rank1 MR2 =0x1a
761 13:44:12.844343 Write Rank1 MR11 =0x0
762 13:44:12.847391 Write Rank1 MR22 =0x38
763 13:44:12.850516 Write Rank1 MR14 =0x5d
764 13:44:12.850591 Write Rank1 MR3 =0x30
765 13:44:12.854205 Write Rank1 MR13 =0x58
766 13:44:12.854275 Write Rank1 MR12 =0x5d
767 13:44:12.857097 Write Rank1 MR1 =0x56
768 13:44:12.860564 Write Rank1 MR2 =0x2d
769 13:44:12.860648 Write Rank1 MR11 =0x23
770 13:44:12.864199 Write Rank1 MR22 =0x34
771 13:44:12.864315 Write Rank1 MR14 =0x10
772 13:44:12.867291 Write Rank1 MR3 =0x30
773 13:44:12.870758 Write Rank1 MR13 =0xd8
774 13:44:12.870830 match AC timing 3
775 13:44:12.880833 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
776 13:44:12.884366 DramC Write-DBI off
777 13:44:12.884452 DramC Read-DBI off
778 13:44:12.887370 Write Rank0 MR13 =0x59
779 13:44:12.887462 ==
780 13:44:12.890432 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
781 13:44:12.894154 fsp= 1, odt_onoff= 1, Byte mode= 0
782 13:44:12.894236 ==
783 13:44:12.897248 === u2Vref_new: 0x56 --> 0x2d
784 13:44:12.900872 === u2Vref_new: 0x58 --> 0x38
785 13:44:12.904407 === u2Vref_new: 0x5a --> 0x39
786 13:44:12.907418 === u2Vref_new: 0x5c --> 0x3c
787 13:44:12.910918 === u2Vref_new: 0x5e --> 0x3d
788 13:44:12.914390 === u2Vref_new: 0x60 --> 0xa0
789 13:44:12.914502
790 13:44:12.917812 CBT Vref found, early break!
791 13:44:12.920785 [CA 0] Center 33 (4~63) winsize 60
792 13:44:12.920899 [CA 1] Center 34 (5~63) winsize 59
793 13:44:12.924529 [CA 2] Center 29 (1~57) winsize 57
794 13:44:12.927576 [CA 3] Center 24 (-3~51) winsize 55
795 13:44:12.930955 [CA 4] Center 25 (-2~52) winsize 55
796 13:44:12.934426 [CA 5] Center 30 (2~58) winsize 57
797 13:44:12.934524
798 13:44:12.937939 [CATrainingPosCal] consider 1 rank data
799 13:44:12.941070 u2DelayCellTimex100 = 762/100 ps
800 13:44:12.944761 CA0 delay=33 (4~63),Diff = 9 PI (11 cell)
801 13:44:12.947741 CA1 delay=34 (5~63),Diff = 10 PI (12 cell)
802 13:44:12.951397 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
803 13:44:12.957896 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
804 13:44:12.961461 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
805 13:44:12.964461 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
806 13:44:12.964556
807 13:44:12.968011 CA PerBit enable=1, Macro0, CA PI delay=24
808 13:44:12.971099 === u2Vref_new: 0x56 --> 0x2d
809 13:44:12.971177
810 13:44:12.971238 Vref(ca) range 1: 22
811 13:44:12.971304
812 13:44:12.974657 CS Dly= 10 (41-0-32)
813 13:44:12.978011 Write Rank0 MR13 =0xd8
814 13:44:12.978156 Write Rank0 MR13 =0xd8
815 13:44:12.981518 Write Rank0 MR12 =0x56
816 13:44:12.981598 Write Rank1 MR13 =0x59
817 13:44:12.984900 ==
818 13:44:12.987786 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
819 13:44:12.991523 fsp= 1, odt_onoff= 1, Byte mode= 0
820 13:44:12.991625 ==
821 13:44:12.995151 === u2Vref_new: 0x56 --> 0x2d
822 13:44:12.998060 === u2Vref_new: 0x58 --> 0x38
823 13:44:13.001134 === u2Vref_new: 0x5a --> 0x39
824 13:44:13.004938 === u2Vref_new: 0x5c --> 0x3c
825 13:44:13.008281 === u2Vref_new: 0x5e --> 0x3d
826 13:44:13.011241 === u2Vref_new: 0x60 --> 0xa0
827 13:44:13.014787 [CA 0] Center 34 (5~63) winsize 59
828 13:44:13.017953 [CA 1] Center 34 (6~63) winsize 58
829 13:44:13.018042 [CA 2] Center 29 (1~58) winsize 58
830 13:44:13.021555 [CA 3] Center 23 (-4~51) winsize 56
831 13:44:13.025294 [CA 4] Center 24 (-3~52) winsize 56
832 13:44:13.027800 [CA 5] Center 30 (1~59) winsize 59
833 13:44:13.027878
834 13:44:13.031743 [CATrainingPosCal] consider 2 rank data
835 13:44:13.034907 u2DelayCellTimex100 = 762/100 ps
836 13:44:13.038140 CA0 delay=34 (5~63),Diff = 10 PI (12 cell)
837 13:44:13.044971 CA1 delay=34 (6~63),Diff = 10 PI (12 cell)
838 13:44:13.048462 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
839 13:44:13.051494 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
840 13:44:13.054708 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
841 13:44:13.058294 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
842 13:44:13.058460
843 13:44:13.061837 CA PerBit enable=1, Macro0, CA PI delay=24
844 13:44:13.064610 === u2Vref_new: 0x56 --> 0x2d
845 13:44:13.064695
846 13:44:13.068424 Vref(ca) range 1: 22
847 13:44:13.068499
848 13:44:13.068557 CS Dly= 11 (42-0-32)
849 13:44:13.071798 Write Rank1 MR13 =0xd8
850 13:44:13.071873 Write Rank1 MR13 =0xd8
851 13:44:13.074825 Write Rank1 MR12 =0x56
852 13:44:13.078471 [RankSwap] Rank num 2, (Multi 1), Rank 0
853 13:44:13.081832 Write Rank0 MR2 =0xad
854 13:44:13.081950 [Write Leveling]
855 13:44:13.085272 delay byte0 byte1 byte2 byte3
856 13:44:13.085351
857 13:44:13.085410 10 0 0
858 13:44:13.088832 11 0 0
859 13:44:13.088910 12 0 0
860 13:44:13.091534 13 0 0
861 13:44:13.091610 14 0 0
862 13:44:13.094941 15 0 0
863 13:44:13.095018 16 0 0
864 13:44:13.095077 17 0 0
865 13:44:13.098647 18 0 0
866 13:44:13.098723 19 0 0
867 13:44:13.102078 20 0 0
868 13:44:13.102194 21 0 0
869 13:44:13.102296 22 0 0
870 13:44:13.105313 23 0 0
871 13:44:13.105445 24 0 0
872 13:44:13.109049 25 0 ff
873 13:44:13.109177 26 0 ff
874 13:44:13.109255 27 0 ff
875 13:44:13.111993 28 0 ff
876 13:44:13.112070 29 0 ff
877 13:44:13.115280 30 0 ff
878 13:44:13.115361 31 0 ff
879 13:44:13.118276 32 0 ff
880 13:44:13.118354 33 ff ff
881 13:44:13.121932 34 ff ff
882 13:44:13.122009 35 ff ff
883 13:44:13.125017 36 ff ff
884 13:44:13.125118 37 ff ff
885 13:44:13.125231 38 ff ff
886 13:44:13.128537 39 ff ff
887 13:44:13.131704 pass bytecount = 0xff (0xff: all bytes pass)
888 13:44:13.131802
889 13:44:13.135395 DQS0 dly: 33
890 13:44:13.135529 DQS1 dly: 25
891 13:44:13.138352 Write Rank0 MR2 =0x2d
892 13:44:13.141903 [RankSwap] Rank num 2, (Multi 1), Rank 0
893 13:44:13.142002 Write Rank0 MR1 =0xd6
894 13:44:13.142086 [Gating]
895 13:44:13.145384 ==
896 13:44:13.148942 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
897 13:44:13.152241 fsp= 1, odt_onoff= 1, Byte mode= 0
898 13:44:13.152382 ==
899 13:44:13.155543 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
900 13:44:13.161884 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
901 13:44:13.165311 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
902 13:44:13.168791 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
903 13:44:13.175707 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
904 13:44:13.178778 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
905 13:44:13.182453 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
906 13:44:13.185462 3 1 28 |2c2c 2c2b |(11 0)(11 11) |(0 0)(1 0)| 0
907 13:44:13.192288 3 2 0 |605 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
908 13:44:13.195758 3 2 4 |3534 302 |(11 11)(11 11) |(0 0)(0 0)| 0
909 13:44:13.199110 3 2 8 |3534 2d2d |(11 11)(11 11) |(0 0)(0 0)| 0
910 13:44:13.205660 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
911 13:44:13.209565 3 2 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
912 13:44:13.212351 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
913 13:44:13.215856 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
914 13:44:13.222674 3 2 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
915 13:44:13.225413 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
916 13:44:13.228909 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
917 13:44:13.235742 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
918 13:44:13.238957 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
919 13:44:13.242598 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
920 13:44:13.249342 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
921 13:44:13.252323 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
922 13:44:13.255683 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
923 13:44:13.259317 3 4 0 |707 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
924 13:44:13.265667 3 4 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
925 13:44:13.269095 3 4 8 |3d3d 1313 |(11 11)(11 11) |(1 1)(1 1)| 0
926 13:44:13.272325 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
927 13:44:13.279354 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 13:44:13.282906 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 13:44:13.286020 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 13:44:13.292970 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 13:44:13.296248 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 13:44:13.299778 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 13:44:13.302656 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 13:44:13.309594 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
935 13:44:13.313054 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
936 13:44:13.316937 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
937 13:44:13.323255 [Byte 0] Lead/lag falling Transition (3, 5, 20)
938 13:44:13.327160 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
939 13:44:13.329894 [Byte 0] Lead/lag Transition tap number (2)
940 13:44:13.333531 [Byte 1] Lead/lag falling Transition (3, 5, 24)
941 13:44:13.340209 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
942 13:44:13.343056 [Byte 1] Lead/lag Transition tap number (2)
943 13:44:13.346133 3 6 0 |404 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
944 13:44:13.349834 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
945 13:44:13.352844 [Byte 0]First pass (3, 6, 4)
946 13:44:13.356399 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
947 13:44:13.359853 [Byte 1]First pass (3, 6, 8)
948 13:44:13.362784 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 13:44:13.366191 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
950 13:44:13.372925 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 13:44:13.376653 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 13:44:13.379725 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 13:44:13.383088 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 13:44:13.389818 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
955 13:44:13.392890 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
956 13:44:13.396868 All bytes gating window > 1UI, Early break!
957 13:44:13.396944
958 13:44:13.399837 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)
959 13:44:13.399915
960 13:44:13.403089 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
961 13:44:13.403173
962 13:44:13.403232
963 13:44:13.403286
964 13:44:13.406867 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
965 13:44:13.406946
966 13:44:13.413376 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
967 13:44:13.413457
968 13:44:13.413516
969 13:44:13.413568 Write Rank0 MR1 =0x56
970 13:44:13.413619
971 13:44:13.416541 best RODT dly(2T, 0.5T) = (2, 2)
972 13:44:13.416617
973 13:44:13.419982 best RODT dly(2T, 0.5T) = (2, 2)
974 13:44:13.420057 ==
975 13:44:13.426486 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
976 13:44:13.429892 fsp= 1, odt_onoff= 1, Byte mode= 0
977 13:44:13.429983 ==
978 13:44:13.433539 Start DQ dly to find pass range UseTestEngine =0
979 13:44:13.436532 x-axis: bit #, y-axis: DQ dly (-127~63)
980 13:44:13.440208 RX Vref Scan = 0
981 13:44:13.440285 -26, [0] xxxxxxxx xxxxxxxx [MSB]
982 13:44:13.443369 -25, [0] xxxxxxxx xxxxxxxx [MSB]
983 13:44:13.446841 -24, [0] xxxxxxxx xxxxxxxx [MSB]
984 13:44:13.449980 -23, [0] xxxxxxxx xxxxxxxx [MSB]
985 13:44:13.453771 -22, [0] xxxxxxxx xxxxxxxx [MSB]
986 13:44:13.456880 -21, [0] xxxxxxxx xxxxxxxx [MSB]
987 13:44:13.460411 -20, [0] xxxxxxxx xxxxxxxx [MSB]
988 13:44:13.463394 -19, [0] xxxxxxxx xxxxxxxx [MSB]
989 13:44:13.463519 -18, [0] xxxxxxxx xxxxxxxx [MSB]
990 13:44:13.466952 -17, [0] xxxxxxxx xxxxxxxx [MSB]
991 13:44:13.470418 -16, [0] xxxxxxxx xxxxxxxx [MSB]
992 13:44:13.473439 -15, [0] xxxxxxxx xxxxxxxx [MSB]
993 13:44:13.476991 -14, [0] xxxxxxxx xxxxxxxx [MSB]
994 13:44:13.480169 -13, [0] xxxxxxxx xxxxxxxx [MSB]
995 13:44:13.483786 -12, [0] xxxxxxxx xxxxxxxx [MSB]
996 13:44:13.487474 -11, [0] xxxxxxxx xxxxxxxx [MSB]
997 13:44:13.487555 -10, [0] xxxxxxxx xxxxxxxx [MSB]
998 13:44:13.490455 -9, [0] xxxxxxxx xxxxxxxx [MSB]
999 13:44:13.494106 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1000 13:44:13.497005 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1001 13:44:13.500309 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1002 13:44:13.503739 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1003 13:44:13.503865 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1004 13:44:13.507221 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1005 13:44:13.510666 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1006 13:44:13.514119 -1, [0] xxxxxxxx xxxxxxxx [MSB]
1007 13:44:13.517370 0, [0] xxxoxoxx xxxxxxxx [MSB]
1008 13:44:13.520612 1, [0] xxxoxoxx xxxoxxxx [MSB]
1009 13:44:13.523917 2, [0] xxxoxoxx xxxoxxxx [MSB]
1010 13:44:13.523995 3, [0] xxxoxooo oxxoxoox [MSB]
1011 13:44:13.527222 4, [0] xxxoxooo oxxoxoox [MSB]
1012 13:44:13.530615 5, [0] xxxoxooo ooxooooo [MSB]
1013 13:44:13.533805 6, [0] xxxoxooo ooxooooo [MSB]
1014 13:44:13.536915 7, [0] xooooooo ooxooooo [MSB]
1015 13:44:13.537016 8, [0] xooooooo ooxooooo [MSB]
1016 13:44:13.540682 9, [0] xooooooo oooooooo [MSB]
1017 13:44:13.544190 10, [0] xooooooo oooooooo [MSB]
1018 13:44:13.547179 32, [0] oooxoooo oooooooo [MSB]
1019 13:44:13.551157 33, [0] oooxoooo oooooxoo [MSB]
1020 13:44:13.553975 34, [0] oooxoxxo oooooxxo [MSB]
1021 13:44:13.557516 35, [0] oooxoxxx xooooxxo [MSB]
1022 13:44:13.557594 36, [0] oooxoxxx xooxoxxx [MSB]
1023 13:44:13.560652 37, [0] oooxoxxx xxoxxxxx [MSB]
1024 13:44:13.564078 38, [0] oooxoxxx xxoxxxxx [MSB]
1025 13:44:13.567628 39, [0] oooxoxxx xxoxxxxx [MSB]
1026 13:44:13.570636 40, [0] oooxxxxx xxoxxxxx [MSB]
1027 13:44:13.574135 41, [0] xoxxxxxx xxoxxxxx [MSB]
1028 13:44:13.574276 42, [0] xxxxxxxx xxxxxxxx [MSB]
1029 13:44:13.580988 iDelay=42, Bit 0, Center 25 (11 ~ 40) 30
1030 13:44:13.584642 iDelay=42, Bit 1, Center 24 (7 ~ 41) 35
1031 13:44:13.587689 iDelay=42, Bit 2, Center 23 (7 ~ 40) 34
1032 13:44:13.590770 iDelay=42, Bit 3, Center 15 (0 ~ 31) 32
1033 13:44:13.594483 iDelay=42, Bit 4, Center 23 (7 ~ 39) 33
1034 13:44:13.597462 iDelay=42, Bit 5, Center 16 (0 ~ 33) 34
1035 13:44:13.601064 iDelay=42, Bit 6, Center 18 (3 ~ 33) 31
1036 13:44:13.604114 iDelay=42, Bit 7, Center 18 (3 ~ 34) 32
1037 13:44:13.607511 iDelay=42, Bit 8, Center 18 (3 ~ 34) 32
1038 13:44:13.610870 iDelay=42, Bit 9, Center 20 (5 ~ 36) 32
1039 13:44:13.614160 iDelay=42, Bit 10, Center 25 (9 ~ 41) 33
1040 13:44:13.617658 iDelay=42, Bit 11, Center 18 (1 ~ 35) 35
1041 13:44:13.621399 iDelay=42, Bit 12, Center 20 (5 ~ 36) 32
1042 13:44:13.624475 iDelay=42, Bit 13, Center 17 (3 ~ 32) 30
1043 13:44:13.628118 iDelay=42, Bit 14, Center 18 (3 ~ 33) 31
1044 13:44:13.634172 iDelay=42, Bit 15, Center 20 (5 ~ 35) 31
1045 13:44:13.634254 ==
1046 13:44:13.637954 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1047 13:44:13.641057 fsp= 1, odt_onoff= 1, Byte mode= 0
1048 13:44:13.641219 ==
1049 13:44:13.641281 DQS Delay:
1050 13:44:13.644725 DQS0 = 0, DQS1 = 0
1051 13:44:13.644793 DQM Delay:
1052 13:44:13.647722 DQM0 = 20, DQM1 = 19
1053 13:44:13.647797 DQ Delay:
1054 13:44:13.651036 DQ0 =25, DQ1 =24, DQ2 =23, DQ3 =15
1055 13:44:13.654562 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
1056 13:44:13.657944 DQ8 =18, DQ9 =20, DQ10 =25, DQ11 =18
1057 13:44:13.660900 DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20
1058 13:44:13.660964
1059 13:44:13.661018
1060 13:44:13.664596 DramC Write-DBI off
1061 13:44:13.664657 ==
1062 13:44:13.668136 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1063 13:44:13.671577 fsp= 1, odt_onoff= 1, Byte mode= 0
1064 13:44:13.671647 ==
1065 13:44:13.674708 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1066 13:44:13.678132
1067 13:44:13.678249 Begin, DQ Scan Range 921~1177
1068 13:44:13.678309
1069 13:44:13.678395
1070 13:44:13.681212 TX Vref Scan disable
1071 13:44:13.684843 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1072 13:44:13.687924 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1073 13:44:13.691608 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1074 13:44:13.694570 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1075 13:44:13.698271 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1076 13:44:13.701382 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1077 13:44:13.704914 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1078 13:44:13.708005 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1079 13:44:13.711627 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1080 13:44:13.718386 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1081 13:44:13.721371 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1082 13:44:13.724722 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1083 13:44:13.728216 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1084 13:44:13.731907 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1085 13:44:13.735010 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1086 13:44:13.738111 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1087 13:44:13.741794 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1088 13:44:13.744625 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1089 13:44:13.748072 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1090 13:44:13.751265 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1091 13:44:13.755084 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1092 13:44:13.758520 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1093 13:44:13.761904 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1094 13:44:13.764745 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1095 13:44:13.768251 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1096 13:44:13.771591 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1097 13:44:13.778540 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1098 13:44:13.781391 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1099 13:44:13.785055 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1100 13:44:13.788692 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1101 13:44:13.791706 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1102 13:44:13.795376 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1103 13:44:13.798544 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1104 13:44:13.802191 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1105 13:44:13.805374 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1106 13:44:13.808994 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1107 13:44:13.812008 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1108 13:44:13.815588 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1109 13:44:13.818648 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1110 13:44:13.821888 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1111 13:44:13.825281 961 |3 6 1|[0] xxxxxxxx oxxoxoxx [MSB]
1112 13:44:13.828554 962 |3 6 2|[0] xxxxxxxx oxxoooxx [MSB]
1113 13:44:13.831936 963 |3 6 3|[0] xxxxxxxx ooxoooox [MSB]
1114 13:44:13.835439 964 |3 6 4|[0] xxxxxxxx ooxoooox [MSB]
1115 13:44:13.838891 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1116 13:44:13.841940 966 |3 6 6|[0] xxxxxxxx ooxooooo [MSB]
1117 13:44:13.845671 967 |3 6 7|[0] xxxxxxxx oooooooo [MSB]
1118 13:44:13.848720 968 |3 6 8|[0] xxxxxxxx oooooooo [MSB]
1119 13:44:13.852468 969 |3 6 9|[0] xxxoxxxx oooooooo [MSB]
1120 13:44:13.855295 970 |3 6 10|[0] xxxoxoox oooooooo [MSB]
1121 13:44:13.862036 971 |3 6 11|[0] xxxoxoox oooooooo [MSB]
1122 13:44:13.865855 972 |3 6 12|[0] xxxoxoox oooooooo [MSB]
1123 13:44:13.868891 973 |3 6 13|[0] xxxoooox oooooooo [MSB]
1124 13:44:13.871858 974 |3 6 14|[0] xxxooooo oooooooo [MSB]
1125 13:44:13.875205 975 |3 6 15|[0] xxoooooo oooooooo [MSB]
1126 13:44:13.879077 985 |3 6 25|[0] oooooooo oxxxxxxx [MSB]
1127 13:44:13.882151 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1128 13:44:13.885421 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1129 13:44:13.888973 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1130 13:44:13.895575 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1131 13:44:13.899320 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1132 13:44:13.902182 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1133 13:44:13.905336 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1134 13:44:13.908949 993 |3 6 33|[0] oooxoxxo xxxxxxxx [MSB]
1135 13:44:13.912103 994 |3 6 34|[0] xxxxxxxx xxxxxxxx [MSB]
1136 13:44:13.915814 Byte0, DQ PI dly=982, DQM PI dly= 982
1137 13:44:13.918794 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1138 13:44:13.918871
1139 13:44:13.922302 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1140 13:44:13.922377
1141 13:44:13.926001 Byte1, DQ PI dly=973, DQM PI dly= 973
1142 13:44:13.932368 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)
1143 13:44:13.932493
1144 13:44:13.935460 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)
1145 13:44:13.935550
1146 13:44:13.935629 ==
1147 13:44:13.942347 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1148 13:44:13.945640 fsp= 1, odt_onoff= 1, Byte mode= 0
1149 13:44:13.945776 ==
1150 13:44:13.948805 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1151 13:44:13.948926
1152 13:44:13.952564 Begin, DQ Scan Range 949~1013
1153 13:44:13.952665 Write Rank0 MR14 =0x0
1154 13:44:13.962861
1155 13:44:13.962939 CH=0, VrefRange= 0, VrefLevel = 0
1156 13:44:13.969720 TX Bit0 (977~994) 18 985, Bit8 (963~982) 20 972,
1157 13:44:13.972851 TX Bit1 (977~993) 17 985, Bit9 (966~982) 17 974,
1158 13:44:13.979492 TX Bit2 (976~993) 18 984, Bit10 (969~987) 19 978,
1159 13:44:13.982723 TX Bit3 (971~986) 16 978, Bit11 (964~982) 19 973,
1160 13:44:13.986459 TX Bit4 (976~993) 18 984, Bit12 (966~982) 17 974,
1161 13:44:13.992677 TX Bit5 (972~988) 17 980, Bit13 (965~982) 18 973,
1162 13:44:13.996545 TX Bit6 (974~988) 15 981, Bit14 (966~983) 18 974,
1163 13:44:13.999690 TX Bit7 (977~991) 15 984, Bit15 (968~983) 16 975,
1164 13:44:13.999868
1165 13:44:14.002678 Write Rank0 MR14 =0x2
1166 13:44:14.011899
1167 13:44:14.011987 CH=0, VrefRange= 0, VrefLevel = 2
1168 13:44:14.018646 TX Bit0 (977~994) 18 985, Bit8 (963~983) 21 973,
1169 13:44:14.021634 TX Bit1 (977~993) 17 985, Bit9 (966~982) 17 974,
1170 13:44:14.028664 TX Bit2 (976~993) 18 984, Bit10 (968~988) 21 978,
1171 13:44:14.031764 TX Bit3 (970~987) 18 978, Bit11 (963~982) 20 972,
1172 13:44:14.035132 TX Bit4 (975~994) 20 984, Bit12 (965~983) 19 974,
1173 13:44:14.041768 TX Bit5 (972~988) 17 980, Bit13 (964~982) 19 973,
1174 13:44:14.045373 TX Bit6 (973~989) 17 981, Bit14 (965~983) 19 974,
1175 13:44:14.048889 TX Bit7 (977~991) 15 984, Bit15 (968~983) 16 975,
1176 13:44:14.049003
1177 13:44:14.052292 Write Rank0 MR14 =0x4
1178 13:44:14.061287
1179 13:44:14.061389 CH=0, VrefRange= 0, VrefLevel = 4
1180 13:44:14.067840 TX Bit0 (977~995) 19 986, Bit8 (962~983) 22 972,
1181 13:44:14.071533 TX Bit1 (977~994) 18 985, Bit9 (964~982) 19 973,
1182 13:44:14.074411 TX Bit2 (976~993) 18 984, Bit10 (968~988) 21 978,
1183 13:44:14.081083 TX Bit3 (970~987) 18 978, Bit11 (963~982) 20 972,
1184 13:44:14.084746 TX Bit4 (975~994) 20 984, Bit12 (965~983) 19 974,
1185 13:44:14.091376 TX Bit5 (971~989) 19 980, Bit13 (965~982) 18 973,
1186 13:44:14.094510 TX Bit6 (973~990) 18 981, Bit14 (965~983) 19 974,
1187 13:44:14.098064 TX Bit7 (976~991) 16 983, Bit15 (967~983) 17 975,
1188 13:44:14.098150
1189 13:44:14.101297 Write Rank0 MR14 =0x6
1190 13:44:14.110273
1191 13:44:14.110365 CH=0, VrefRange= 0, VrefLevel = 6
1192 13:44:14.116772 TX Bit0 (977~995) 19 986, Bit8 (962~983) 22 972,
1193 13:44:14.120415 TX Bit1 (977~994) 18 985, Bit9 (965~983) 19 974,
1194 13:44:14.124035 TX Bit2 (976~994) 19 985, Bit10 (968~989) 22 978,
1195 13:44:14.130605 TX Bit3 (970~988) 19 979, Bit11 (962~982) 21 972,
1196 13:44:14.133742 TX Bit4 (975~994) 20 984, Bit12 (965~983) 19 974,
1197 13:44:14.140832 TX Bit5 (971~990) 20 980, Bit13 (963~982) 20 972,
1198 13:44:14.143764 TX Bit6 (972~990) 19 981, Bit14 (965~984) 20 974,
1199 13:44:14.147400 TX Bit7 (976~992) 17 984, Bit15 (968~984) 17 976,
1200 13:44:14.147477
1201 13:44:14.150390 Write Rank0 MR14 =0x8
1202 13:44:14.159302
1203 13:44:14.159378 CH=0, VrefRange= 0, VrefLevel = 8
1204 13:44:14.165813 TX Bit0 (977~995) 19 986, Bit8 (962~984) 23 973,
1205 13:44:14.169557 TX Bit1 (977~994) 18 985, Bit9 (965~983) 19 974,
1206 13:44:14.176230 TX Bit2 (976~994) 19 985, Bit10 (968~989) 22 978,
1207 13:44:14.179361 TX Bit3 (969~989) 21 979, Bit11 (962~982) 21 972,
1208 13:44:14.182664 TX Bit4 (975~995) 21 985, Bit12 (964~983) 20 973,
1209 13:44:14.234622 TX Bit5 (971~990) 20 980, Bit13 (963~982) 20 972,
1210 13:44:14.235018 TX Bit6 (972~991) 20 981, Bit14 (965~984) 20 974,
1211 13:44:14.235138 TX Bit7 (976~992) 17 984, Bit15 (967~984) 18 975,
1212 13:44:14.235261
1213 13:44:14.235389 Write Rank0 MR14 =0xa
1214 13:44:14.235492
1215 13:44:14.235806 CH=0, VrefRange= 0, VrefLevel = 10
1216 13:44:14.235965 TX Bit0 (977~996) 20 986, Bit8 (961~984) 24 972,
1217 13:44:14.236085 TX Bit1 (976~995) 20 985, Bit9 (964~984) 21 974,
1218 13:44:14.236216 TX Bit2 (976~994) 19 985, Bit10 (968~989) 22 978,
1219 13:44:14.236775 TX Bit3 (969~989) 21 979, Bit11 (962~983) 22 972,
1220 13:44:14.237572 TX Bit4 (975~995) 21 985, Bit12 (964~984) 21 974,
1221 13:44:14.270703 TX Bit5 (970~991) 22 980, Bit13 (963~983) 21 973,
1222 13:44:14.271018 TX Bit6 (971~991) 21 981, Bit14 (964~985) 22 974,
1223 13:44:14.271110 TX Bit7 (976~993) 18 984, Bit15 (967~985) 19 976,
1224 13:44:14.271192
1225 13:44:14.271275 Write Rank0 MR14 =0xc
1226 13:44:14.271353
1227 13:44:14.271430 CH=0, VrefRange= 0, VrefLevel = 12
1228 13:44:14.271511 TX Bit0 (977~997) 21 987, Bit8 (961~984) 24 972,
1229 13:44:14.271618 TX Bit1 (976~995) 20 985, Bit9 (963~984) 22 973,
1230 13:44:14.274349 TX Bit2 (975~994) 20 984, Bit10 (967~990) 24 978,
1231 13:44:14.277980 TX Bit3 (969~990) 22 979, Bit11 (961~983) 23 972,
1232 13:44:14.281058 TX Bit4 (974~996) 23 985, Bit12 (963~984) 22 973,
1233 13:44:14.288421 TX Bit5 (970~991) 22 980, Bit13 (963~983) 21 973,
1234 13:44:14.291414 TX Bit6 (971~991) 21 981, Bit14 (963~985) 23 974,
1235 13:44:14.294708 TX Bit7 (975~993) 19 984, Bit15 (967~985) 19 976,
1236 13:44:14.298243
1237 13:44:14.298317 Write Rank0 MR14 =0xe
1238 13:44:14.308092
1239 13:44:14.311080 CH=0, VrefRange= 0, VrefLevel = 14
1240 13:44:14.314717 TX Bit0 (976~997) 22 986, Bit8 (961~985) 25 973,
1241 13:44:14.317784 TX Bit1 (975~995) 21 985, Bit9 (963~985) 23 974,
1242 13:44:14.324731 TX Bit2 (976~995) 20 985, Bit10 (967~990) 24 978,
1243 13:44:14.327986 TX Bit3 (969~990) 22 979, Bit11 (961~984) 24 972,
1244 13:44:14.331497 TX Bit4 (974~996) 23 985, Bit12 (963~985) 23 974,
1245 13:44:14.338274 TX Bit5 (970~991) 22 980, Bit13 (962~983) 22 972,
1246 13:44:14.341287 TX Bit6 (970~992) 23 981, Bit14 (963~986) 24 974,
1247 13:44:14.344489 TX Bit7 (975~993) 19 984, Bit15 (967~986) 20 976,
1248 13:44:14.344565
1249 13:44:14.348160 Write Rank0 MR14 =0x10
1250 13:44:14.357843
1251 13:44:14.360979 CH=0, VrefRange= 0, VrefLevel = 16
1252 13:44:14.364662 TX Bit0 (976~998) 23 987, Bit8 (961~985) 25 973,
1253 13:44:14.367803 TX Bit1 (976~996) 21 986, Bit9 (963~985) 23 974,
1254 13:44:14.374420 TX Bit2 (975~995) 21 985, Bit10 (967~990) 24 978,
1255 13:44:14.377760 TX Bit3 (969~991) 23 980, Bit11 (961~984) 24 972,
1256 13:44:14.380951 TX Bit4 (974~997) 24 985, Bit12 (963~985) 23 974,
1257 13:44:14.387594 TX Bit5 (970~992) 23 981, Bit13 (962~984) 23 973,
1258 13:44:14.391280 TX Bit6 (970~992) 23 981, Bit14 (963~986) 24 974,
1259 13:44:14.394381 TX Bit7 (974~993) 20 983, Bit15 (966~986) 21 976,
1260 13:44:14.394456
1261 13:44:14.397813 Write Rank0 MR14 =0x12
1262 13:44:14.407489
1263 13:44:14.411318 CH=0, VrefRange= 0, VrefLevel = 18
1264 13:44:14.414798 TX Bit0 (976~999) 24 987, Bit8 (961~985) 25 973,
1265 13:44:14.417822 TX Bit1 (975~996) 22 985, Bit9 (962~985) 24 973,
1266 13:44:14.424531 TX Bit2 (974~996) 23 985, Bit10 (967~990) 24 978,
1267 13:44:14.428085 TX Bit3 (968~991) 24 979, Bit11 (961~984) 24 972,
1268 13:44:14.431086 TX Bit4 (973~997) 25 985, Bit12 (962~985) 24 973,
1269 13:44:14.437972 TX Bit5 (969~992) 24 980, Bit13 (961~984) 24 972,
1270 13:44:14.441001 TX Bit6 (970~993) 24 981, Bit14 (962~987) 26 974,
1271 13:44:14.444742 TX Bit7 (974~994) 21 984, Bit15 (966~987) 22 976,
1272 13:44:14.444869
1273 13:44:14.447885 Write Rank0 MR14 =0x14
1274 13:44:14.457692
1275 13:44:14.457818 CH=0, VrefRange= 0, VrefLevel = 20
1276 13:44:14.464337 TX Bit0 (976~999) 24 987, Bit8 (961~986) 26 973,
1277 13:44:14.467645 TX Bit1 (975~997) 23 986, Bit9 (962~986) 25 974,
1278 13:44:14.474310 TX Bit2 (974~996) 23 985, Bit10 (966~991) 26 978,
1279 13:44:14.477886 TX Bit3 (968~991) 24 979, Bit11 (961~985) 25 973,
1280 13:44:14.480877 TX Bit4 (973~998) 26 985, Bit12 (962~986) 25 974,
1281 13:44:14.487906 TX Bit5 (969~992) 24 980, Bit13 (961~985) 25 973,
1282 13:44:14.490940 TX Bit6 (970~993) 24 981, Bit14 (961~987) 27 974,
1283 13:44:14.494654 TX Bit7 (973~995) 23 984, Bit15 (965~988) 24 976,
1284 13:44:14.494734
1285 13:44:14.497624 Write Rank0 MR14 =0x16
1286 13:44:14.507623
1287 13:44:14.507706 CH=0, VrefRange= 0, VrefLevel = 22
1288 13:44:14.514310 TX Bit0 (975~999) 25 987, Bit8 (961~985) 25 973,
1289 13:44:14.518020 TX Bit1 (975~998) 24 986, Bit9 (962~987) 26 974,
1290 13:44:14.524757 TX Bit2 (974~997) 24 985, Bit10 (967~990) 24 978,
1291 13:44:14.527838 TX Bit3 (968~992) 25 980, Bit11 (961~985) 25 973,
1292 13:44:14.531727 TX Bit4 (973~998) 26 985, Bit12 (961~986) 26 973,
1293 13:44:14.537668 TX Bit5 (969~993) 25 981, Bit13 (961~985) 25 973,
1294 13:44:14.541087 TX Bit6 (970~993) 24 981, Bit14 (961~986) 26 973,
1295 13:44:14.544526 TX Bit7 (972~996) 25 984, Bit15 (965~989) 25 977,
1296 13:44:14.544602
1297 13:44:14.547891 Write Rank0 MR14 =0x18
1298 13:44:14.557543
1299 13:44:14.560829 CH=0, VrefRange= 0, VrefLevel = 24
1300 13:44:14.564431 TX Bit0 (975~999) 25 987, Bit8 (961~985) 25 973,
1301 13:44:14.567816 TX Bit1 (975~998) 24 986, Bit9 (962~987) 26 974,
1302 13:44:14.574451 TX Bit2 (974~997) 24 985, Bit10 (967~990) 24 978,
1303 13:44:14.577830 TX Bit3 (968~992) 25 980, Bit11 (961~985) 25 973,
1304 13:44:14.581401 TX Bit4 (973~998) 26 985, Bit12 (961~986) 26 973,
1305 13:44:14.588169 TX Bit5 (969~993) 25 981, Bit13 (961~985) 25 973,
1306 13:44:14.591185 TX Bit6 (970~993) 24 981, Bit14 (961~986) 26 973,
1307 13:44:14.594752 TX Bit7 (972~996) 25 984, Bit15 (965~989) 25 977,
1308 13:44:14.594827
1309 13:44:14.597557 Write Rank0 MR14 =0x1a
1310 13:44:14.607583
1311 13:44:14.611293 CH=0, VrefRange= 0, VrefLevel = 26
1312 13:44:14.614625 TX Bit0 (975~999) 25 987, Bit8 (961~985) 25 973,
1313 13:44:14.618006 TX Bit1 (975~998) 24 986, Bit9 (962~987) 26 974,
1314 13:44:14.624782 TX Bit2 (974~997) 24 985, Bit10 (967~990) 24 978,
1315 13:44:14.627918 TX Bit3 (968~992) 25 980, Bit11 (961~985) 25 973,
1316 13:44:14.631107 TX Bit4 (973~998) 26 985, Bit12 (961~986) 26 973,
1317 13:44:14.637621 TX Bit5 (969~993) 25 981, Bit13 (961~985) 25 973,
1318 13:44:14.641429 TX Bit6 (970~993) 24 981, Bit14 (961~986) 26 973,
1319 13:44:14.644380 TX Bit7 (972~996) 25 984, Bit15 (965~989) 25 977,
1320 13:44:14.644488
1321 13:44:14.647838 Write Rank0 MR14 =0x1c
1322 13:44:14.657779
1323 13:44:14.660862 CH=0, VrefRange= 0, VrefLevel = 28
1324 13:44:14.664172 TX Bit0 (975~999) 25 987, Bit8 (961~985) 25 973,
1325 13:44:14.667370 TX Bit1 (975~998) 24 986, Bit9 (962~987) 26 974,
1326 13:44:14.674327 TX Bit2 (974~997) 24 985, Bit10 (967~990) 24 978,
1327 13:44:14.677649 TX Bit3 (968~992) 25 980, Bit11 (961~985) 25 973,
1328 13:44:14.680948 TX Bit4 (973~998) 26 985, Bit12 (961~986) 26 973,
1329 13:44:14.687900 TX Bit5 (969~993) 25 981, Bit13 (961~985) 25 973,
1330 13:44:14.690960 TX Bit6 (970~993) 24 981, Bit14 (961~986) 26 973,
1331 13:44:14.694442 TX Bit7 (972~996) 25 984, Bit15 (965~989) 25 977,
1332 13:44:14.694606
1333 13:44:14.697697 Write Rank0 MR14 =0x1e
1334 13:44:14.707500
1335 13:44:14.711081 CH=0, VrefRange= 0, VrefLevel = 30
1336 13:44:14.714615 TX Bit0 (975~999) 25 987, Bit8 (961~985) 25 973,
1337 13:44:14.717615 TX Bit1 (975~998) 24 986, Bit9 (962~987) 26 974,
1338 13:44:14.724565 TX Bit2 (974~997) 24 985, Bit10 (967~990) 24 978,
1339 13:44:14.727907 TX Bit3 (968~992) 25 980, Bit11 (961~985) 25 973,
1340 13:44:14.731134 TX Bit4 (973~998) 26 985, Bit12 (961~986) 26 973,
1341 13:44:14.738164 TX Bit5 (969~993) 25 981, Bit13 (961~985) 25 973,
1342 13:44:14.741344 TX Bit6 (970~993) 24 981, Bit14 (961~986) 26 973,
1343 13:44:14.744971 TX Bit7 (972~996) 25 984, Bit15 (965~989) 25 977,
1344 13:44:14.745072
1345 13:44:14.745197
1346 13:44:14.748027 TX Vref found, early break! 372< 380
1347 13:44:14.754489 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1348 13:44:14.758116 u1DelayCellOfst[0]=8 cells (7 PI)
1349 13:44:14.761589 u1DelayCellOfst[1]=7 cells (6 PI)
1350 13:44:14.764644 u1DelayCellOfst[2]=6 cells (5 PI)
1351 13:44:14.764726 u1DelayCellOfst[3]=0 cells (0 PI)
1352 13:44:14.768160 u1DelayCellOfst[4]=6 cells (5 PI)
1353 13:44:14.771188 u1DelayCellOfst[5]=1 cells (1 PI)
1354 13:44:14.774695 u1DelayCellOfst[6]=1 cells (1 PI)
1355 13:44:14.777827 u1DelayCellOfst[7]=5 cells (4 PI)
1356 13:44:14.781790 Byte0, DQ PI dly=980, DQM PI dly= 983
1357 13:44:14.785024 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1358 13:44:14.785125
1359 13:44:14.791382 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1360 13:44:14.791481
1361 13:44:14.794632 u1DelayCellOfst[8]=0 cells (0 PI)
1362 13:44:14.797934 u1DelayCellOfst[9]=1 cells (1 PI)
1363 13:44:14.798009 u1DelayCellOfst[10]=6 cells (5 PI)
1364 13:44:14.801554 u1DelayCellOfst[11]=0 cells (0 PI)
1365 13:44:14.804639 u1DelayCellOfst[12]=0 cells (0 PI)
1366 13:44:14.808276 u1DelayCellOfst[13]=0 cells (0 PI)
1367 13:44:14.811902 u1DelayCellOfst[14]=0 cells (0 PI)
1368 13:44:14.815369 u1DelayCellOfst[15]=5 cells (4 PI)
1369 13:44:14.818091 Byte1, DQ PI dly=973, DQM PI dly= 975
1370 13:44:14.821998 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)
1371 13:44:14.822077
1372 13:44:14.828444 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)
1373 13:44:14.828565
1374 13:44:14.828651 Write Rank0 MR14 =0x16
1375 13:44:14.828731
1376 13:44:14.831422 Final TX Range 0 Vref 22
1377 13:44:14.831508
1378 13:44:14.838586 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1379 13:44:14.838662
1380 13:44:14.844867 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1381 13:44:14.851665 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1382 13:44:14.858252 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1383 13:44:14.861882 Write Rank0 MR3 =0xb0
1384 13:44:14.861981 DramC Write-DBI on
1385 13:44:14.862064 ==
1386 13:44:14.868264 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1387 13:44:14.871974 fsp= 1, odt_onoff= 1, Byte mode= 0
1388 13:44:14.872074 ==
1389 13:44:14.874906 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1390 13:44:14.875027
1391 13:44:14.878652 Begin, DQ Scan Range 695~759
1392 13:44:14.878754
1393 13:44:14.878836
1394 13:44:14.882304 TX Vref Scan disable
1395 13:44:14.885461 695 |2 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1396 13:44:14.888515 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1397 13:44:14.891870 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1398 13:44:14.895342 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1399 13:44:14.898563 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1400 13:44:14.901921 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1401 13:44:14.905032 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1402 13:44:14.908831 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1403 13:44:14.911739 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1404 13:44:14.915356 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1405 13:44:14.918987 705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]
1406 13:44:14.921911 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1407 13:44:14.925792 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1408 13:44:14.928805 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1409 13:44:14.931957 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1410 13:44:14.935557 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1411 13:44:14.938714 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1412 13:44:14.942117 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1413 13:44:14.945488 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1414 13:44:14.952419 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1415 13:44:14.955469 731 |2 6 27|[0] oooooooo xxxxxxxx [MSB]
1416 13:44:14.959057 732 |2 6 28|[0] oooooooo xxxxxxxx [MSB]
1417 13:44:14.962668 733 |2 6 29|[0] oooooooo xxxxxxxx [MSB]
1418 13:44:14.969543 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1419 13:44:14.972622 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1420 13:44:14.976134 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1421 13:44:14.979282 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1422 13:44:14.982168 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1423 13:44:14.985905 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1424 13:44:14.988891 740 |2 6 36|[0] xxxxxxxx xxxxxxxx [MSB]
1425 13:44:14.992300 Byte0, DQ PI dly=727, DQM PI dly= 727
1426 13:44:14.995968 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
1427 13:44:14.996090
1428 13:44:14.999717 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
1429 13:44:15.002342
1430 13:44:15.006098 Byte1, DQ PI dly=717, DQM PI dly= 717
1431 13:44:15.009317 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 13)
1432 13:44:15.009392
1433 13:44:15.012731 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 13)
1434 13:44:15.012857
1435 13:44:15.019556 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1436 13:44:15.026428 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1437 13:44:15.032445 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1438 13:44:15.036232 Write Rank0 MR3 =0x30
1439 13:44:15.036331 DramC Write-DBI off
1440 13:44:15.039290
1441 13:44:15.039387 [DATLAT]
1442 13:44:15.042510 Freq=1600, CH0 RK0, use_rxtx_scan=0
1443 13:44:15.042614
1444 13:44:15.042699 DATLAT Default: 0xf
1445 13:44:15.046004 7, 0xFFFF, sum=0
1446 13:44:15.046116 8, 0xFFFF, sum=0
1447 13:44:15.049660 9, 0xFFFF, sum=0
1448 13:44:15.049741 10, 0xFFFF, sum=0
1449 13:44:15.052553 11, 0xFFFF, sum=0
1450 13:44:15.052654 12, 0xFFFF, sum=0
1451 13:44:15.055680 13, 0xFFFF, sum=0
1452 13:44:15.055780 14, 0x0, sum=1
1453 13:44:15.055867 15, 0x0, sum=2
1454 13:44:15.059309 16, 0x0, sum=3
1455 13:44:15.059385 17, 0x0, sum=4
1456 13:44:15.065838 pattern=2 first_step=14 total pass=5 best_step=16
1457 13:44:15.065914 ==
1458 13:44:15.069312 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1459 13:44:15.072742 fsp= 1, odt_onoff= 1, Byte mode= 0
1460 13:44:15.072848 ==
1461 13:44:15.079276 Start DQ dly to find pass range UseTestEngine =1
1462 13:44:15.082827 x-axis: bit #, y-axis: DQ dly (-127~63)
1463 13:44:15.082928 RX Vref Scan = 1
1464 13:44:15.205728
1465 13:44:15.205855 RX Vref found, early break!
1466 13:44:15.205914
1467 13:44:15.212164 Final RX Vref 13, apply to both rank0 and 1
1468 13:44:15.212263 ==
1469 13:44:15.215144 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1470 13:44:15.218884 fsp= 1, odt_onoff= 1, Byte mode= 0
1471 13:44:15.219024 ==
1472 13:44:15.219139 DQS Delay:
1473 13:44:15.221945 DQS0 = 0, DQS1 = 0
1474 13:44:15.222022 DQM Delay:
1475 13:44:15.225109 DQM0 = 20, DQM1 = 19
1476 13:44:15.225212 DQ Delay:
1477 13:44:15.228557 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15
1478 13:44:15.231937 DQ4 =22, DQ5 =16, DQ6 =18, DQ7 =19
1479 13:44:15.235120 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =16
1480 13:44:15.238417 DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20
1481 13:44:15.238492
1482 13:44:15.238549
1483 13:44:15.238601
1484 13:44:15.241888 [DramC_TX_OE_Calibration] TA2
1485 13:44:15.245271 Original DQ_B0 (3 6) =30, OEN = 27
1486 13:44:15.248688 Original DQ_B1 (3 6) =30, OEN = 27
1487 13:44:15.252044 23, 0x0, End_B0=23 End_B1=23
1488 13:44:15.252120 24, 0x0, End_B0=24 End_B1=24
1489 13:44:15.255601 25, 0x0, End_B0=25 End_B1=25
1490 13:44:15.258777 26, 0x0, End_B0=26 End_B1=26
1491 13:44:15.262376 27, 0x0, End_B0=27 End_B1=27
1492 13:44:15.262477 28, 0x0, End_B0=28 End_B1=28
1493 13:44:15.265389 29, 0x0, End_B0=29 End_B1=29
1494 13:44:15.269047 30, 0x0, End_B0=30 End_B1=30
1495 13:44:15.272352 31, 0xFFFF, End_B0=30 End_B1=30
1496 13:44:15.275266 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1497 13:44:15.282461 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1498 13:44:15.282576
1499 13:44:15.282663
1500 13:44:15.285762 Write Rank0 MR23 =0x3f
1501 13:44:15.285857 [DQSOSC]
1502 13:44:15.292335 [DQSOSCAuto] RK0, (LSB)MR18= 0xa9, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps
1503 13:44:15.299089 CH0_RK0: MR19=0x3, MR18=0xA9, DQSOSC=336, MR23=63, INC=21, DEC=32
1504 13:44:15.302073 Write Rank0 MR23 =0x3f
1505 13:44:15.302151 [DQSOSC]
1506 13:44:15.309033 [DQSOSCAuto] RK0, (LSB)MR18= 0xab, (MSB)MR19= 0x3, tDQSOscB0 = 335 ps tDQSOscB1 = 0 ps
1507 13:44:15.312206 CH0 RK0: MR19=3, MR18=AB
1508 13:44:15.315695 [RankSwap] Rank num 2, (Multi 1), Rank 1
1509 13:44:15.318690 Write Rank0 MR2 =0xad
1510 13:44:15.318774 [Write Leveling]
1511 13:44:15.322484 delay byte0 byte1 byte2 byte3
1512 13:44:15.322565
1513 13:44:15.322626 10 0 0
1514 13:44:15.326195 11 0 0
1515 13:44:15.326273 12 0 0
1516 13:44:15.329158 13 0 0
1517 13:44:15.329251 14 0 0
1518 13:44:15.329311 15 0 0
1519 13:44:15.332705 16 0 0
1520 13:44:15.332781 17 0 0
1521 13:44:15.335644 18 0 0
1522 13:44:15.335805 19 0 0
1523 13:44:15.335898 20 0 0
1524 13:44:15.339110 21 0 0
1525 13:44:15.339186 22 0 0
1526 13:44:15.342427 23 0 0
1527 13:44:15.342565 24 0 0
1528 13:44:15.345553 25 0 0
1529 13:44:15.345678 26 0 0
1530 13:44:15.345765 27 0 0
1531 13:44:15.349638 28 0 ff
1532 13:44:15.349740 29 0 ff
1533 13:44:15.352554 30 0 ff
1534 13:44:15.352661 31 0 ff
1535 13:44:15.356243 32 0 ff
1536 13:44:15.356386 33 0 ff
1537 13:44:15.356499 34 ff ff
1538 13:44:15.359304 35 ff ff
1539 13:44:15.359434 36 ff ff
1540 13:44:15.362660 37 ff ff
1541 13:44:15.362771 38 ff ff
1542 13:44:15.365697 39 ff ff
1543 13:44:15.365833 40 ff ff
1544 13:44:15.369396 pass bytecount = 0xff (0xff: all bytes pass)
1545 13:44:15.369529
1546 13:44:15.372515 DQS0 dly: 34
1547 13:44:15.372626 DQS1 dly: 28
1548 13:44:15.376209 Write Rank0 MR2 =0x2d
1549 13:44:15.379109 [RankSwap] Rank num 2, (Multi 1), Rank 0
1550 13:44:15.379214 Write Rank1 MR1 =0xd6
1551 13:44:15.382934 [Gating]
1552 13:44:15.383068 ==
1553 13:44:15.386356 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1554 13:44:15.389354 fsp= 1, odt_onoff= 1, Byte mode= 0
1555 13:44:15.389488 ==
1556 13:44:15.396579 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1557 13:44:15.399277 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1558 13:44:15.402778 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1559 13:44:15.409311 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1560 13:44:15.412786 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1561 13:44:15.415847 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1562 13:44:15.419659 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1563 13:44:15.426058 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1564 13:44:15.429780 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1565 13:44:15.432970 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1566 13:44:15.439850 3 2 8 |302 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1567 13:44:15.443038 3 2 12 |1e1e 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
1568 13:44:15.446551 3 2 16 |3534 909 |(11 11)(11 11) |(0 0)(0 0)| 0
1569 13:44:15.449597 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1570 13:44:15.456203 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1571 13:44:15.459745 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1572 13:44:15.462944 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1573 13:44:15.469963 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1574 13:44:15.473544 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1575 13:44:15.476623 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1576 13:44:15.483254 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1577 13:44:15.486426 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1578 13:44:15.490143 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1579 13:44:15.493038 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1580 13:44:15.500309 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1581 13:44:15.503199 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1582 13:44:15.506445 3 4 8 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1583 13:44:15.513359 3 4 12 |1515 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1584 13:44:15.516741 3 4 16 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
1585 13:44:15.520104 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1586 13:44:15.523657 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1587 13:44:15.530360 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1588 13:44:15.533452 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1589 13:44:15.537034 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1590 13:44:15.543355 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1591 13:44:15.547117 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1592 13:44:15.550087 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1593 13:44:15.556922 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1594 13:44:15.560506 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1595 13:44:15.563734 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1596 13:44:15.567213 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1597 13:44:15.573773 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1598 13:44:15.577250 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1599 13:44:15.580719 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1600 13:44:15.587492 3 6 8 |202 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1601 13:44:15.590371 [Byte 0] Lead/lag Transition tap number (3)
1602 13:44:15.593984 [Byte 1] Lead/lag Transition tap number (3)
1603 13:44:15.597162 3 6 12 |4444 909 |(1 1)(11 11) |(0 0)(0 0)| 0
1604 13:44:15.600750 3 6 16 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
1605 13:44:15.603799 [Byte 0]First pass (3, 6, 16)
1606 13:44:15.607593 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1607 13:44:15.610683 [Byte 1]First pass (3, 6, 20)
1608 13:44:15.614113 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1609 13:44:15.620887 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1610 13:44:15.623734 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1611 13:44:15.627187 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1612 13:44:15.630609 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1613 13:44:15.633921 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1614 13:44:15.640579 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1615 13:44:15.643718 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1616 13:44:15.647353 All bytes gating window > 1UI, Early break!
1617 13:44:15.647467
1618 13:44:15.650566 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
1619 13:44:15.650662
1620 13:44:15.653728 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)
1621 13:44:15.653819
1622 13:44:15.653905
1623 13:44:15.653984
1624 13:44:15.657493 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1625 13:44:15.657581
1626 13:44:15.664190 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1627 13:44:15.664287
1628 13:44:15.664372
1629 13:44:15.664456 Write Rank1 MR1 =0x56
1630 13:44:15.664536
1631 13:44:15.667337 best RODT dly(2T, 0.5T) = (2, 3)
1632 13:44:15.667425
1633 13:44:15.670854 best RODT dly(2T, 0.5T) = (2, 3)
1634 13:44:15.671038 ==
1635 13:44:15.677076 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1636 13:44:15.680883 fsp= 1, odt_onoff= 1, Byte mode= 0
1637 13:44:15.680965 ==
1638 13:44:15.684365 Start DQ dly to find pass range UseTestEngine =0
1639 13:44:15.687612 x-axis: bit #, y-axis: DQ dly (-127~63)
1640 13:44:15.690669 RX Vref Scan = 0
1641 13:44:15.690768 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1642 13:44:15.694468 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1643 13:44:15.697484 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1644 13:44:15.701100 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1645 13:44:15.704234 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1646 13:44:15.707870 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1647 13:44:15.711025 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1648 13:44:15.714104 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1649 13:44:15.714212 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1650 13:44:15.717962 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1651 13:44:15.720883 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1652 13:44:15.724537 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1653 13:44:15.727785 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1654 13:44:15.731299 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1655 13:44:15.734023 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1656 13:44:15.737732 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1657 13:44:15.737897 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1658 13:44:15.741534 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1659 13:44:15.744177 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1660 13:44:15.747568 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1661 13:44:15.751433 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1662 13:44:15.754553 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1663 13:44:15.757568 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1664 13:44:15.757666 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1665 13:44:15.761509 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1666 13:44:15.764439 -1, [0] xxxoxxxx xxxoxxxx [MSB]
1667 13:44:15.767607 0, [0] xxxoxxxx oxxoxoxx [MSB]
1668 13:44:15.771353 1, [0] xxxoxoxo ooxoooox [MSB]
1669 13:44:15.774648 2, [0] xxxoxooo ooxoooox [MSB]
1670 13:44:15.774742 3, [0] xxxoxooo ooxooooo [MSB]
1671 13:44:15.778094 4, [0] xxxoxooo ooxooooo [MSB]
1672 13:44:15.781042 5, [0] xxxoxooo oooooooo [MSB]
1673 13:44:15.784558 6, [0] xoxooooo oooooooo [MSB]
1674 13:44:15.787964 7, [0] xooooooo oooooooo [MSB]
1675 13:44:15.788104 8, [0] xooooooo oooooooo [MSB]
1676 13:44:15.791324 35, [0] oooxoooo oooxoooo [MSB]
1677 13:44:15.794799 36, [0] oooxoxoo oooxoxxo [MSB]
1678 13:44:15.797952 37, [0] oooxoxxx xooxoxxo [MSB]
1679 13:44:15.801403 38, [0] oooxoxxx xooxxxxo [MSB]
1680 13:44:15.805045 39, [0] oooxoxxx xxoxxxxx [MSB]
1681 13:44:15.808008 40, [0] oooxoxxx xxoxxxxx [MSB]
1682 13:44:15.808179 41, [0] oooxoxxx xxoxxxxx [MSB]
1683 13:44:15.811523 42, [0] oooxxxxx xxoxxxxx [MSB]
1684 13:44:15.815064 43, [0] xoxxxxxx xxxxxxxx [MSB]
1685 13:44:15.818188 44, [0] xxxxxxxx xxxxxxxx [MSB]
1686 13:44:15.821897 iDelay=44, Bit 0, Center 25 (9 ~ 42) 34
1687 13:44:15.825174 iDelay=44, Bit 1, Center 24 (6 ~ 43) 38
1688 13:44:15.828044 iDelay=44, Bit 2, Center 24 (7 ~ 42) 36
1689 13:44:15.831835 iDelay=44, Bit 3, Center 16 (-1 ~ 34) 36
1690 13:44:15.834814 iDelay=44, Bit 4, Center 23 (6 ~ 41) 36
1691 13:44:15.838534 iDelay=44, Bit 5, Center 18 (1 ~ 35) 35
1692 13:44:15.841710 iDelay=44, Bit 6, Center 19 (2 ~ 36) 35
1693 13:44:15.845103 iDelay=44, Bit 7, Center 18 (1 ~ 36) 36
1694 13:44:15.848640 iDelay=44, Bit 8, Center 18 (0 ~ 36) 37
1695 13:44:15.855228 iDelay=44, Bit 9, Center 19 (1 ~ 38) 38
1696 13:44:15.858329 iDelay=44, Bit 10, Center 23 (5 ~ 42) 38
1697 13:44:15.861507 iDelay=44, Bit 11, Center 16 (-1 ~ 34) 36
1698 13:44:15.865087 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
1699 13:44:15.868361 iDelay=44, Bit 13, Center 17 (0 ~ 35) 36
1700 13:44:15.872034 iDelay=44, Bit 14, Center 18 (1 ~ 35) 35
1701 13:44:15.875168 iDelay=44, Bit 15, Center 20 (3 ~ 38) 36
1702 13:44:15.875243 ==
1703 13:44:15.881912 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1704 13:44:15.885000 fsp= 1, odt_onoff= 1, Byte mode= 0
1705 13:44:15.885085 ==
1706 13:44:15.885207 DQS Delay:
1707 13:44:15.885265 DQS0 = 0, DQS1 = 0
1708 13:44:15.888817 DQM Delay:
1709 13:44:15.888891 DQM0 = 20, DQM1 = 18
1710 13:44:15.891926 DQ Delay:
1711 13:44:15.895102 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =16
1712 13:44:15.898837 DQ4 =23, DQ5 =18, DQ6 =19, DQ7 =18
1713 13:44:15.898917 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =16
1714 13:44:15.905286 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20
1715 13:44:15.905403
1716 13:44:15.905507
1717 13:44:15.905602 DramC Write-DBI off
1718 13:44:15.905702 ==
1719 13:44:15.911962 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1720 13:44:15.915242 fsp= 1, odt_onoff= 1, Byte mode= 0
1721 13:44:15.915345 ==
1722 13:44:15.918726 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1723 13:44:15.918838
1724 13:44:15.921580 Begin, DQ Scan Range 924~1180
1725 13:44:15.921729
1726 13:44:15.921861
1727 13:44:15.925273 TX Vref Scan disable
1728 13:44:15.928461 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1729 13:44:15.931996 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1730 13:44:15.935389 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1731 13:44:15.939028 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1732 13:44:15.942173 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1733 13:44:15.945554 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1734 13:44:15.948801 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1735 13:44:15.952223 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1736 13:44:15.955460 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1737 13:44:15.958784 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1738 13:44:15.961856 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1739 13:44:15.965336 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1740 13:44:15.968953 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1741 13:44:15.972071 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1742 13:44:15.975251 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1743 13:44:15.979155 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1744 13:44:15.985271 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1745 13:44:15.989069 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1746 13:44:15.991987 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1747 13:44:15.995158 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1748 13:44:15.998654 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1749 13:44:16.002117 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1750 13:44:16.005705 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1751 13:44:16.008860 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1752 13:44:16.012069 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1753 13:44:16.015530 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1754 13:44:16.018961 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1755 13:44:16.022273 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1756 13:44:16.025434 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1757 13:44:16.028727 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1758 13:44:16.032368 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1759 13:44:16.035908 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1760 13:44:16.039030 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1761 13:44:16.045741 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1762 13:44:16.048833 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1763 13:44:16.052321 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1764 13:44:16.055895 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1765 13:44:16.058811 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1766 13:44:16.062257 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1767 13:44:16.065653 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1768 13:44:16.069366 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1769 13:44:16.072589 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1770 13:44:16.075574 966 |3 6 6|[0] xxxxxxxx xxxoxxxx [MSB]
1771 13:44:16.078969 967 |3 6 7|[0] xxxxxxxx oxxoxoxx [MSB]
1772 13:44:16.082048 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1773 13:44:16.085834 969 |3 6 9|[0] xxxxxxxx ooxooooo [MSB]
1774 13:44:16.089035 970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]
1775 13:44:16.092767 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1776 13:44:16.095775 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1777 13:44:16.098985 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1778 13:44:16.102583 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1779 13:44:16.105502 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1780 13:44:16.108845 976 |3 6 16|[0] xxxoxooo oooooooo [MSB]
1781 13:44:16.112756 977 |3 6 17|[0] xxoooooo oooooooo [MSB]
1782 13:44:16.120753 988 |3 6 28|[0] oooooooo oooooxoo [MSB]
1783 13:44:16.123828 989 |3 6 29|[0] oooooooo xooxoxoo [MSB]
1784 13:44:16.127525 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1785 13:44:16.130313 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1786 13:44:16.133778 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1787 13:44:16.137073 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1788 13:44:16.140493 994 |3 6 34|[0] oooooxoo xxxxxxxx [MSB]
1789 13:44:16.143560 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1790 13:44:16.147061 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1791 13:44:16.150884 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1792 13:44:16.153827 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1793 13:44:16.156976 Byte0, DQ PI dly=985, DQM PI dly= 985
1794 13:44:16.160473 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1795 13:44:16.160653
1796 13:44:16.167448 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1797 13:44:16.167640
1798 13:44:16.170565 Byte1, DQ PI dly=978, DQM PI dly= 978
1799 13:44:16.173919 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1800 13:44:16.174069
1801 13:44:16.177171 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1802 13:44:16.177315
1803 13:44:16.180698 ==
1804 13:44:16.184324 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1805 13:44:16.187468 fsp= 1, odt_onoff= 1, Byte mode= 0
1806 13:44:16.187626 ==
1807 13:44:16.190620 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1808 13:44:16.190766
1809 13:44:16.194115 Begin, DQ Scan Range 954~1018
1810 13:44:16.197303 Write Rank1 MR14 =0x0
1811 13:44:16.205482
1812 13:44:16.205633 CH=0, VrefRange= 0, VrefLevel = 0
1813 13:44:16.212132 TX Bit0 (979~998) 20 988, Bit8 (969~984) 16 976,
1814 13:44:16.215701 TX Bit1 (978~996) 19 987, Bit9 (969~984) 16 976,
1815 13:44:16.222346 TX Bit2 (979~995) 17 987, Bit10 (974~989) 16 981,
1816 13:44:16.225321 TX Bit3 (974~991) 18 982, Bit11 (968~984) 17 976,
1817 13:44:16.228953 TX Bit4 (979~997) 19 988, Bit12 (969~984) 16 976,
1818 13:44:16.235593 TX Bit5 (976~990) 15 983, Bit13 (969~983) 15 976,
1819 13:44:16.238838 TX Bit6 (976~992) 17 984, Bit14 (969~984) 16 976,
1820 13:44:16.242343 TX Bit7 (978~993) 16 985, Bit15 (973~987) 15 980,
1821 13:44:16.242474
1822 13:44:16.245352 Write Rank1 MR14 =0x2
1823 13:44:16.254594
1824 13:44:16.254689 CH=0, VrefRange= 0, VrefLevel = 2
1825 13:44:16.261052 TX Bit0 (980~999) 20 989, Bit8 (968~985) 18 976,
1826 13:44:16.264419 TX Bit1 (979~997) 19 988, Bit9 (969~985) 17 977,
1827 13:44:16.267869 TX Bit2 (979~996) 18 987, Bit10 (974~990) 17 982,
1828 13:44:16.274670 TX Bit3 (973~991) 19 982, Bit11 (968~984) 17 976,
1829 13:44:16.278399 TX Bit4 (979~998) 20 988, Bit12 (969~985) 17 977,
1830 13:44:16.284609 TX Bit5 (976~991) 16 983, Bit13 (968~984) 17 976,
1831 13:44:16.287951 TX Bit6 (976~992) 17 984, Bit14 (969~984) 16 976,
1832 13:44:16.291380 TX Bit7 (978~994) 17 986, Bit15 (971~988) 18 979,
1833 13:44:16.291519
1834 13:44:16.294819 Write Rank1 MR14 =0x4
1835 13:44:16.303445
1836 13:44:16.303619 CH=0, VrefRange= 0, VrefLevel = 4
1837 13:44:16.310337 TX Bit0 (979~999) 21 989, Bit8 (968~985) 18 976,
1838 13:44:16.313334 TX Bit1 (978~997) 20 987, Bit9 (969~985) 17 977,
1839 13:44:16.320707 TX Bit2 (978~997) 20 987, Bit10 (973~990) 18 981,
1840 13:44:16.323687 TX Bit3 (973~992) 20 982, Bit11 (968~985) 18 976,
1841 13:44:16.326817 TX Bit4 (978~998) 21 988, Bit12 (969~986) 18 977,
1842 13:44:16.333653 TX Bit5 (976~991) 16 983, Bit13 (968~984) 17 976,
1843 13:44:16.337351 TX Bit6 (975~992) 18 983, Bit14 (969~985) 17 977,
1844 13:44:16.340335 TX Bit7 (977~995) 19 986, Bit15 (971~988) 18 979,
1845 13:44:16.340430
1846 13:44:16.343401 Write Rank1 MR14 =0x6
1847 13:44:16.352618
1848 13:44:16.352743 CH=0, VrefRange= 0, VrefLevel = 6
1849 13:44:16.359062 TX Bit0 (979~999) 21 989, Bit8 (968~985) 18 976,
1850 13:44:16.362610 TX Bit1 (978~998) 21 988, Bit9 (969~986) 18 977,
1851 13:44:16.369534 TX Bit2 (978~997) 20 987, Bit10 (973~990) 18 981,
1852 13:44:16.373072 TX Bit3 (972~992) 21 982, Bit11 (968~985) 18 976,
1853 13:44:16.375836 TX Bit4 (978~998) 21 988, Bit12 (968~986) 19 977,
1854 13:44:16.382788 TX Bit5 (975~991) 17 983, Bit13 (968~984) 17 976,
1855 13:44:16.385947 TX Bit6 (975~993) 19 984, Bit14 (969~986) 18 977,
1856 13:44:16.389616 TX Bit7 (977~995) 19 986, Bit15 (971~989) 19 980,
1857 13:44:16.389713
1858 13:44:16.392787 Write Rank1 MR14 =0x8
1859 13:44:16.401612
1860 13:44:16.401709 CH=0, VrefRange= 0, VrefLevel = 8
1861 13:44:16.408170 TX Bit0 (979~999) 21 989, Bit8 (968~986) 19 977,
1862 13:44:16.411973 TX Bit1 (978~998) 21 988, Bit9 (968~986) 19 977,
1863 13:44:16.418304 TX Bit2 (978~997) 20 987, Bit10 (972~990) 19 981,
1864 13:44:16.421805 TX Bit3 (972~993) 22 982, Bit11 (968~986) 19 977,
1865 13:44:16.424951 TX Bit4 (978~998) 21 988, Bit12 (968~987) 20 977,
1866 13:44:16.431593 TX Bit5 (975~992) 18 983, Bit13 (968~985) 18 976,
1867 13:44:16.435306 TX Bit6 (975~994) 20 984, Bit14 (968~986) 19 977,
1868 13:44:16.438203 TX Bit7 (977~995) 19 986, Bit15 (971~989) 19 980,
1869 13:44:16.438295
1870 13:44:16.442110 Write Rank1 MR14 =0xa
1871 13:44:16.450608
1872 13:44:16.454401 CH=0, VrefRange= 0, VrefLevel = 10
1873 13:44:16.457464 TX Bit0 (979~999) 21 989, Bit8 (968~987) 20 977,
1874 13:44:16.460648 TX Bit1 (978~998) 21 988, Bit9 (968~988) 21 978,
1875 13:44:16.467312 TX Bit2 (978~998) 21 988, Bit10 (972~990) 19 981,
1876 13:44:16.470710 TX Bit3 (971~993) 23 982, Bit11 (967~986) 20 976,
1877 13:44:16.474338 TX Bit4 (977~999) 23 988, Bit12 (968~987) 20 977,
1878 13:44:16.480999 TX Bit5 (975~992) 18 983, Bit13 (967~986) 20 976,
1879 13:44:16.484344 TX Bit6 (974~994) 21 984, Bit14 (968~987) 20 977,
1880 13:44:16.487751 TX Bit7 (977~997) 21 987, Bit15 (970~989) 20 979,
1881 13:44:16.487828
1882 13:44:16.491138 Write Rank1 MR14 =0xc
1883 13:44:16.500226
1884 13:44:16.503395 CH=0, VrefRange= 0, VrefLevel = 12
1885 13:44:16.507137 TX Bit0 (978~1000) 23 989, Bit8 (968~987) 20 977,
1886 13:44:16.510779 TX Bit1 (977~999) 23 988, Bit9 (968~988) 21 978,
1887 13:44:16.517099 TX Bit2 (978~998) 21 988, Bit10 (972~991) 20 981,
1888 13:44:16.520113 TX Bit3 (971~993) 23 982, Bit11 (967~987) 21 977,
1889 13:44:16.523837 TX Bit4 (978~999) 22 988, Bit12 (968~988) 21 978,
1890 13:44:16.530512 TX Bit5 (974~992) 19 983, Bit13 (968~986) 19 977,
1891 13:44:16.533742 TX Bit6 (974~995) 22 984, Bit14 (968~988) 21 978,
1892 13:44:16.537445 TX Bit7 (976~997) 22 986, Bit15 (970~990) 21 980,
1893 13:44:16.537590
1894 13:44:16.540398 Write Rank1 MR14 =0xe
1895 13:44:16.549736
1896 13:44:16.552928 CH=0, VrefRange= 0, VrefLevel = 14
1897 13:44:16.556259 TX Bit0 (978~1000) 23 989, Bit8 (968~988) 21 978,
1898 13:44:16.559922 TX Bit1 (978~999) 22 988, Bit9 (968~988) 21 978,
1899 13:44:16.566139 TX Bit2 (977~998) 22 987, Bit10 (971~991) 21 981,
1900 13:44:16.569854 TX Bit3 (971~994) 24 982, Bit11 (967~988) 22 977,
1901 13:44:16.572933 TX Bit4 (977~1000) 24 988, Bit12 (968~988) 21 978,
1902 13:44:16.579761 TX Bit5 (973~994) 22 983, Bit13 (968~986) 19 977,
1903 13:44:16.583381 TX Bit6 (974~995) 22 984, Bit14 (968~988) 21 978,
1904 13:44:16.586578 TX Bit7 (976~998) 23 987, Bit15 (969~990) 22 979,
1905 13:44:16.586722
1906 13:44:16.589662 Write Rank1 MR14 =0x10
1907 13:44:16.599332
1908 13:44:16.602790 CH=0, VrefRange= 0, VrefLevel = 16
1909 13:44:16.606370 TX Bit0 (978~1001) 24 989, Bit8 (967~988) 22 977,
1910 13:44:16.609439 TX Bit1 (977~999) 23 988, Bit9 (968~989) 22 978,
1911 13:44:16.616343 TX Bit2 (977~999) 23 988, Bit10 (971~991) 21 981,
1912 13:44:16.620048 TX Bit3 (970~994) 25 982, Bit11 (966~988) 23 977,
1913 13:44:16.622788 TX Bit4 (977~1000) 24 988, Bit12 (968~989) 22 978,
1914 13:44:16.629309 TX Bit5 (973~994) 22 983, Bit13 (967~987) 21 977,
1915 13:44:16.633082 TX Bit6 (973~996) 24 984, Bit14 (968~989) 22 978,
1916 13:44:16.636174 TX Bit7 (976~998) 23 987, Bit15 (969~990) 22 979,
1917 13:44:16.636353
1918 13:44:16.639321 Write Rank1 MR14 =0x12
1919 13:44:16.649099
1920 13:44:16.652869 CH=0, VrefRange= 0, VrefLevel = 18
1921 13:44:16.655837 TX Bit0 (978~1001) 24 989, Bit8 (967~989) 23 978,
1922 13:44:16.659320 TX Bit1 (977~999) 23 988, Bit9 (968~989) 22 978,
1923 13:44:16.665787 TX Bit2 (977~999) 23 988, Bit10 (970~992) 23 981,
1924 13:44:16.669657 TX Bit3 (970~995) 26 982, Bit11 (967~988) 22 977,
1925 13:44:16.672772 TX Bit4 (977~1000) 24 988, Bit12 (967~989) 23 978,
1926 13:44:16.679525 TX Bit5 (972~995) 24 983, Bit13 (967~988) 22 977,
1927 13:44:16.682615 TX Bit6 (972~997) 26 984, Bit14 (967~989) 23 978,
1928 13:44:16.686357 TX Bit7 (976~998) 23 987, Bit15 (969~990) 22 979,
1929 13:44:16.686496
1930 13:44:16.689514 Write Rank1 MR14 =0x14
1931 13:44:16.699425
1932 13:44:16.702558 CH=0, VrefRange= 0, VrefLevel = 20
1933 13:44:16.706354 TX Bit0 (978~1002) 25 990, Bit8 (967~989) 23 978,
1934 13:44:16.709073 TX Bit1 (977~1000) 24 988, Bit9 (968~989) 22 978,
1935 13:44:16.715659 TX Bit2 (977~1000) 24 988, Bit10 (970~992) 23 981,
1936 13:44:16.719334 TX Bit3 (970~995) 26 982, Bit11 (967~989) 23 978,
1937 13:44:16.722508 TX Bit4 (977~1000) 24 988, Bit12 (967~989) 23 978,
1938 13:44:16.729081 TX Bit5 (972~995) 24 983, Bit13 (966~988) 23 977,
1939 13:44:16.732624 TX Bit6 (972~997) 26 984, Bit14 (967~989) 23 978,
1940 13:44:16.736180 TX Bit7 (976~998) 23 987, Bit15 (969~990) 22 979,
1941 13:44:16.739467
1942 13:44:16.739542 Write Rank1 MR14 =0x16
1943 13:44:16.749318
1944 13:44:16.752363 CH=0, VrefRange= 0, VrefLevel = 22
1945 13:44:16.756128 TX Bit0 (977~1002) 26 989, Bit8 (966~989) 24 977,
1946 13:44:16.759473 TX Bit1 (977~1000) 24 988, Bit9 (967~990) 24 978,
1947 13:44:16.765946 TX Bit2 (977~1000) 24 988, Bit10 (970~992) 23 981,
1948 13:44:16.769453 TX Bit3 (970~995) 26 982, Bit11 (966~989) 24 977,
1949 13:44:16.772237 TX Bit4 (976~1001) 26 988, Bit12 (967~989) 23 978,
1950 13:44:16.779443 TX Bit5 (972~996) 25 984, Bit13 (966~988) 23 977,
1951 13:44:16.782319 TX Bit6 (972~997) 26 984, Bit14 (967~989) 23 978,
1952 13:44:16.786052 TX Bit7 (975~999) 25 987, Bit15 (969~990) 22 979,
1953 13:44:16.789329
1954 13:44:16.789428 Write Rank1 MR14 =0x18
1955 13:44:16.799542
1956 13:44:16.802854 CH=0, VrefRange= 0, VrefLevel = 24
1957 13:44:16.805848 TX Bit0 (977~1002) 26 989, Bit8 (966~989) 24 977,
1958 13:44:16.809548 TX Bit1 (977~1000) 24 988, Bit9 (968~989) 22 978,
1959 13:44:16.815791 TX Bit2 (977~1000) 24 988, Bit10 (969~991) 23 980,
1960 13:44:16.819475 TX Bit3 (970~995) 26 982, Bit11 (966~989) 24 977,
1961 13:44:16.822930 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1962 13:44:16.829668 TX Bit5 (971~996) 26 983, Bit13 (966~987) 22 976,
1963 13:44:16.832941 TX Bit6 (971~998) 28 984, Bit14 (966~989) 24 977,
1964 13:44:16.836268 TX Bit7 (974~999) 26 986, Bit15 (968~990) 23 979,
1965 13:44:16.839473
1966 13:44:16.839622 Write Rank1 MR14 =0x1a
1967 13:44:16.849395
1968 13:44:16.849518 CH=0, VrefRange= 0, VrefLevel = 26
1969 13:44:16.856098 TX Bit0 (977~1002) 26 989, Bit8 (966~989) 24 977,
1970 13:44:16.859689 TX Bit1 (977~1000) 24 988, Bit9 (968~989) 22 978,
1971 13:44:16.865934 TX Bit2 (977~1000) 24 988, Bit10 (969~991) 23 980,
1972 13:44:16.869658 TX Bit3 (970~995) 26 982, Bit11 (966~989) 24 977,
1973 13:44:16.872705 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1974 13:44:16.879488 TX Bit5 (971~996) 26 983, Bit13 (966~987) 22 976,
1975 13:44:16.882924 TX Bit6 (971~998) 28 984, Bit14 (966~989) 24 977,
1976 13:44:16.886580 TX Bit7 (974~999) 26 986, Bit15 (968~990) 23 979,
1977 13:44:16.886702
1978 13:44:16.889591 Write Rank1 MR14 =0x1c
1979 13:44:16.899501
1980 13:44:16.902556 CH=0, VrefRange= 0, VrefLevel = 28
1981 13:44:16.906323 TX Bit0 (977~1002) 26 989, Bit8 (966~989) 24 977,
1982 13:44:16.909710 TX Bit1 (977~1000) 24 988, Bit9 (968~989) 22 978,
1983 13:44:16.916330 TX Bit2 (977~1000) 24 988, Bit10 (969~991) 23 980,
1984 13:44:16.919423 TX Bit3 (970~995) 26 982, Bit11 (966~989) 24 977,
1985 13:44:16.923210 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1986 13:44:16.929700 TX Bit5 (971~996) 26 983, Bit13 (966~987) 22 976,
1987 13:44:16.933408 TX Bit6 (971~998) 28 984, Bit14 (966~989) 24 977,
1988 13:44:16.936507 TX Bit7 (974~999) 26 986, Bit15 (968~990) 23 979,
1989 13:44:16.936621
1990 13:44:16.939632 Write Rank1 MR14 =0x1e
1991 13:44:16.949725
1992 13:44:16.949906 CH=0, VrefRange= 0, VrefLevel = 30
1993 13:44:16.956103 TX Bit0 (977~1002) 26 989, Bit8 (966~989) 24 977,
1994 13:44:16.959494 TX Bit1 (977~1000) 24 988, Bit9 (968~989) 22 978,
1995 13:44:16.966006 TX Bit2 (977~1000) 24 988, Bit10 (969~991) 23 980,
1996 13:44:16.969777 TX Bit3 (970~995) 26 982, Bit11 (966~989) 24 977,
1997 13:44:16.972829 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1998 13:44:16.979698 TX Bit5 (971~996) 26 983, Bit13 (966~987) 22 976,
1999 13:44:16.982546 TX Bit6 (971~998) 28 984, Bit14 (966~989) 24 977,
2000 13:44:16.986227 TX Bit7 (974~999) 26 986, Bit15 (968~990) 23 979,
2001 13:44:16.986304
2002 13:44:16.989602
2003 13:44:16.992978 TX Vref found, early break! 365< 371
2004 13:44:16.996415 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2005 13:44:16.999594 u1DelayCellOfst[0]=8 cells (7 PI)
2006 13:44:17.002765 u1DelayCellOfst[1]=7 cells (6 PI)
2007 13:44:17.006483 u1DelayCellOfst[2]=7 cells (6 PI)
2008 13:44:17.009635 u1DelayCellOfst[3]=0 cells (0 PI)
2009 13:44:17.009712 u1DelayCellOfst[4]=7 cells (6 PI)
2010 13:44:17.013290 u1DelayCellOfst[5]=1 cells (1 PI)
2011 13:44:17.016242 u1DelayCellOfst[6]=2 cells (2 PI)
2012 13:44:17.019662 u1DelayCellOfst[7]=5 cells (4 PI)
2013 13:44:17.022920 Byte0, DQ PI dly=982, DQM PI dly= 985
2014 13:44:17.026719 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
2015 13:44:17.026818
2016 13:44:17.033321 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
2017 13:44:17.033416
2018 13:44:17.036566 u1DelayCellOfst[8]=1 cells (1 PI)
2019 13:44:17.040041 u1DelayCellOfst[9]=2 cells (2 PI)
2020 13:44:17.043119 u1DelayCellOfst[10]=5 cells (4 PI)
2021 13:44:17.043232 u1DelayCellOfst[11]=1 cells (1 PI)
2022 13:44:17.046876 u1DelayCellOfst[12]=2 cells (2 PI)
2023 13:44:17.049721 u1DelayCellOfst[13]=0 cells (0 PI)
2024 13:44:17.053332 u1DelayCellOfst[14]=1 cells (1 PI)
2025 13:44:17.056394 u1DelayCellOfst[15]=3 cells (3 PI)
2026 13:44:17.060062 Byte1, DQ PI dly=976, DQM PI dly= 978
2027 13:44:17.063294 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2028 13:44:17.066584
2029 13:44:17.070243 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2030 13:44:17.070374
2031 13:44:17.070485 Write Rank1 MR14 =0x18
2032 13:44:17.070587
2033 13:44:17.073661 Final TX Range 0 Vref 24
2034 13:44:17.073754
2035 13:44:17.079835 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2036 13:44:17.079934
2037 13:44:17.086656 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2038 13:44:17.093297 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2039 13:44:17.100346 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2040 13:44:17.103714 Write Rank1 MR3 =0xb0
2041 13:44:17.103873 DramC Write-DBI on
2042 13:44:17.107032 ==
2043 13:44:17.110015 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2044 13:44:17.113728 fsp= 1, odt_onoff= 1, Byte mode= 0
2045 13:44:17.113869 ==
2046 13:44:17.116753 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2047 13:44:17.116886
2048 13:44:17.120409 Begin, DQ Scan Range 698~762
2049 13:44:17.120543
2050 13:44:17.120664
2051 13:44:17.123499 TX Vref Scan disable
2052 13:44:17.126947 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2053 13:44:17.130566 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2054 13:44:17.133633 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2055 13:44:17.136766 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2056 13:44:17.140337 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2057 13:44:17.143844 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2058 13:44:17.147228 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2059 13:44:17.150308 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2060 13:44:17.153887 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2061 13:44:17.157209 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2062 13:44:17.160515 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
2063 13:44:17.163673 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2064 13:44:17.167332 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2065 13:44:17.170285 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2066 13:44:17.173672 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2067 13:44:17.177089 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2068 13:44:17.183861 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2069 13:44:17.187077 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2070 13:44:17.190087 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2071 13:44:17.197291 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
2072 13:44:17.200412 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2073 13:44:17.203459 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2074 13:44:17.207102 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2075 13:44:17.210048 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2076 13:44:17.213522 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2077 13:44:17.217055 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2078 13:44:17.220105 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2079 13:44:17.223573 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2080 13:44:17.226973 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2081 13:44:17.230116 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2082 13:44:17.233585 Byte0, DQ PI dly=730, DQM PI dly= 730
2083 13:44:17.236964 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2084 13:44:17.240566
2085 13:44:17.243746 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2086 13:44:17.243861
2087 13:44:17.246786 Byte1, DQ PI dly=720, DQM PI dly= 720
2088 13:44:17.250235 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)
2089 13:44:17.250336
2090 13:44:17.257043 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)
2091 13:44:17.257155
2092 13:44:17.260573 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2093 13:44:17.270612 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2094 13:44:17.277069 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2095 13:44:17.277201 Write Rank1 MR3 =0x30
2096 13:44:17.280307 DramC Write-DBI off
2097 13:44:17.280407
2098 13:44:17.280485 [DATLAT]
2099 13:44:17.283512 Freq=1600, CH0 RK1, use_rxtx_scan=0
2100 13:44:17.283623
2101 13:44:17.287140 DATLAT Default: 0x10
2102 13:44:17.287252 7, 0xFFFF, sum=0
2103 13:44:17.290107 8, 0xFFFF, sum=0
2104 13:44:17.290218 9, 0xFFFF, sum=0
2105 13:44:17.293564 10, 0xFFFF, sum=0
2106 13:44:17.293676 11, 0xFFFF, sum=0
2107 13:44:17.297238 12, 0xFFFF, sum=0
2108 13:44:17.297392 13, 0xFFFF, sum=0
2109 13:44:17.297544 14, 0x0, sum=1
2110 13:44:17.300332 15, 0x0, sum=2
2111 13:44:17.300501 16, 0x0, sum=3
2112 13:44:17.303834 17, 0x0, sum=4
2113 13:44:17.307233 pattern=2 first_step=14 total pass=5 best_step=16
2114 13:44:17.307379 ==
2115 13:44:17.314177 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2116 13:44:17.316929 fsp= 1, odt_onoff= 1, Byte mode= 0
2117 13:44:17.317089 ==
2118 13:44:17.320385 Start DQ dly to find pass range UseTestEngine =1
2119 13:44:17.323997 x-axis: bit #, y-axis: DQ dly (-127~63)
2120 13:44:17.324220 RX Vref Scan = 0
2121 13:44:17.327093 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2122 13:44:17.330365 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2123 13:44:17.334059 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2124 13:44:17.337122 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2125 13:44:17.340708 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2126 13:44:17.344057 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2127 13:44:17.347547 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2128 13:44:17.347739 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2129 13:44:17.350754 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2130 13:44:17.354282 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2131 13:44:17.357577 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2132 13:44:17.360895 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2133 13:44:17.364004 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2134 13:44:17.367238 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2135 13:44:17.370679 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2136 13:44:17.370782 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2137 13:44:17.373781 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2138 13:44:17.377310 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2139 13:44:17.380868 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2140 13:44:17.384312 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2141 13:44:17.387180 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2142 13:44:17.390805 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2143 13:44:17.390884 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2144 13:44:17.394387 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2145 13:44:17.397601 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2146 13:44:17.400725 -1, [0] xxxoxxxx xxxxxoxx [MSB]
2147 13:44:17.404296 0, [0] xxxoxxxx oxxxxoxx [MSB]
2148 13:44:17.407616 1, [0] xxxoxoxx ooxoooox [MSB]
2149 13:44:17.407696 2, [0] xxxoxooo ooxoooox [MSB]
2150 13:44:17.410859 3, [0] xxxoxooo ooxooooo [MSB]
2151 13:44:17.414289 4, [0] xxxoxooo ooxooooo [MSB]
2152 13:44:17.417829 5, [0] xxxooooo ooxooooo [MSB]
2153 13:44:17.420847 6, [0] xxxooooo oooooooo [MSB]
2154 13:44:17.420923 7, [0] xooooooo oooooooo [MSB]
2155 13:44:17.426411 34, [0] oooxoooo oooxoooo [MSB]
2156 13:44:17.429896 35, [0] oooxoxoo oooxoxoo [MSB]
2157 13:44:17.433008 36, [0] oooxoxxo oooxoxoo [MSB]
2158 13:44:17.436827 37, [0] oooxoxxx xooxxxxo [MSB]
2159 13:44:17.439974 38, [0] oooxoxxx xxoxxxxo [MSB]
2160 13:44:17.443173 39, [0] oooxoxxx xxoxxxxx [MSB]
2161 13:44:17.443287 40, [0] oooxoxxx xxoxxxxx [MSB]
2162 13:44:17.446760 41, [0] oooxxxxx xxoxxxxx [MSB]
2163 13:44:17.450292 42, [0] oooxxxxx xxxxxxxx [MSB]
2164 13:44:17.453600 43, [0] oxxxxxxx xxxxxxxx [MSB]
2165 13:44:17.456515 44, [0] xxxxxxxx xxxxxxxx [MSB]
2166 13:44:17.460341 iDelay=44, Bit 0, Center 25 (8 ~ 43) 36
2167 13:44:17.463294 iDelay=44, Bit 1, Center 24 (7 ~ 42) 36
2168 13:44:17.467067 iDelay=44, Bit 2, Center 24 (7 ~ 42) 36
2169 13:44:17.470232 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2170 13:44:17.473918 iDelay=44, Bit 4, Center 22 (5 ~ 40) 36
2171 13:44:17.476793 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2172 13:44:17.480252 iDelay=44, Bit 6, Center 18 (2 ~ 35) 34
2173 13:44:17.483516 iDelay=44, Bit 7, Center 19 (2 ~ 36) 35
2174 13:44:17.486859 iDelay=44, Bit 8, Center 18 (0 ~ 36) 37
2175 13:44:17.490151 iDelay=44, Bit 9, Center 19 (1 ~ 37) 37
2176 13:44:17.493989 iDelay=44, Bit 10, Center 23 (6 ~ 41) 36
2177 13:44:17.500731 iDelay=44, Bit 11, Center 17 (1 ~ 33) 33
2178 13:44:17.503830 iDelay=44, Bit 12, Center 18 (1 ~ 36) 36
2179 13:44:17.506883 iDelay=44, Bit 13, Center 16 (-1 ~ 34) 36
2180 13:44:17.510455 iDelay=44, Bit 14, Center 18 (1 ~ 36) 36
2181 13:44:17.513366 iDelay=44, Bit 15, Center 20 (3 ~ 38) 36
2182 13:44:17.513555 ==
2183 13:44:17.517293 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2184 13:44:17.520386 fsp= 1, odt_onoff= 1, Byte mode= 0
2185 13:44:17.520522 ==
2186 13:44:17.523723 DQS Delay:
2187 13:44:17.523830 DQS0 = 0, DQS1 = 0
2188 13:44:17.527206 DQM Delay:
2189 13:44:17.527322 DQM0 = 20, DQM1 = 18
2190 13:44:17.527407 DQ Delay:
2191 13:44:17.530776 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15
2192 13:44:17.533588 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =19
2193 13:44:17.536910 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17
2194 13:44:17.540117 DQ12 =18, DQ13 =16, DQ14 =18, DQ15 =20
2195 13:44:17.540196
2196 13:44:17.540256
2197 13:44:17.540312
2198 13:44:17.543930 [DramC_TX_OE_Calibration] TA2
2199 13:44:17.547069 Original DQ_B0 (3 6) =30, OEN = 27
2200 13:44:17.550792 Original DQ_B1 (3 6) =30, OEN = 27
2201 13:44:17.553711 23, 0x0, End_B0=23 End_B1=23
2202 13:44:17.556996 24, 0x0, End_B0=24 End_B1=24
2203 13:44:17.557130 25, 0x0, End_B0=25 End_B1=25
2204 13:44:17.560367 26, 0x0, End_B0=26 End_B1=26
2205 13:44:17.563688 27, 0x0, End_B0=27 End_B1=27
2206 13:44:17.567214 28, 0x0, End_B0=28 End_B1=28
2207 13:44:17.570305 29, 0x0, End_B0=29 End_B1=29
2208 13:44:17.570401 30, 0x0, End_B0=30 End_B1=30
2209 13:44:17.573989 31, 0xFFFF, End_B0=30 End_B1=30
2210 13:44:17.580765 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2211 13:44:17.583750 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2212 13:44:17.583864
2213 13:44:17.587398
2214 13:44:17.587489 Write Rank1 MR23 =0x3f
2215 13:44:17.587576 [DQSOSC]
2216 13:44:17.597198 [DQSOSCAuto] RK1, (LSB)MR18= 0x7b, (MSB)MR19= 0x3, tDQSOscB0 = 353 ps tDQSOscB1 = 0 ps
2217 13:44:17.600588 CH0_RK1: MR19=0x3, MR18=0x7B, DQSOSC=353, MR23=63, INC=19, DEC=29
2218 13:44:17.604386 Write Rank1 MR23 =0x3f
2219 13:44:17.604485 [DQSOSC]
2220 13:44:17.611206 [DQSOSCAuto] RK1, (LSB)MR18= 0x7c, (MSB)MR19= 0x3, tDQSOscB0 = 353 ps tDQSOscB1 = 0 ps
2221 13:44:17.614228 CH0 RK1: MR19=3, MR18=7C
2222 13:44:17.617995 [RxdqsGatingPostProcess] freq 1600
2223 13:44:17.624474 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2224 13:44:17.624555 Rank: 0
2225 13:44:17.627915 best DQS0 dly(2T, 0.5T) = (2, 5)
2226 13:44:17.631289 best DQS1 dly(2T, 0.5T) = (2, 5)
2227 13:44:17.634733 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2228 13:44:17.638324 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2229 13:44:17.638464 Rank: 1
2230 13:44:17.641363 best DQS0 dly(2T, 0.5T) = (2, 6)
2231 13:44:17.641498 best DQS1 dly(2T, 0.5T) = (2, 6)
2232 13:44:17.644684 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2233 13:44:17.648503 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2234 13:44:17.654733 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2235 13:44:17.658456 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2236 13:44:17.661469 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2237 13:44:17.665092 Write Rank0 MR13 =0x59
2238 13:44:17.665200 ==
2239 13:44:17.668045 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2240 13:44:17.671487 fsp= 1, odt_onoff= 1, Byte mode= 0
2241 13:44:17.671636 ==
2242 13:44:17.674644 === u2Vref_new: 0x56 --> 0x3a
2243 13:44:17.678495 === u2Vref_new: 0x58 --> 0x58
2244 13:44:17.681519 === u2Vref_new: 0x5a --> 0x5a
2245 13:44:17.685130 === u2Vref_new: 0x5c --> 0x78
2246 13:44:17.688164 === u2Vref_new: 0x5e --> 0x7a
2247 13:44:17.691688 === u2Vref_new: 0x60 --> 0x90
2248 13:44:17.695487 [CA 0] Center 36 (9~63) winsize 55
2249 13:44:17.698601 [CA 1] Center 34 (6~63) winsize 58
2250 13:44:17.702207 [CA 2] Center 33 (5~62) winsize 58
2251 13:44:17.705045 [CA 3] Center 33 (3~63) winsize 61
2252 13:44:17.708802 [CA 4] Center 33 (3~63) winsize 61
2253 13:44:17.711815 [CA 5] Center 25 (-1~52) winsize 54
2254 13:44:17.712032
2255 13:44:17.715245 [CATrainingPosCal] consider 1 rank data
2256 13:44:17.718877 u2DelayCellTimex100 = 762/100 ps
2257 13:44:17.722020 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
2258 13:44:17.725120 CA1 delay=34 (6~63),Diff = 9 PI (11 cell)
2259 13:44:17.728805 CA2 delay=33 (5~62),Diff = 8 PI (10 cell)
2260 13:44:17.732235 CA3 delay=33 (3~63),Diff = 8 PI (10 cell)
2261 13:44:17.735592 CA4 delay=33 (3~63),Diff = 8 PI (10 cell)
2262 13:44:17.739208 CA5 delay=25 (-1~52),Diff = 0 PI (0 cell)
2263 13:44:17.739738
2264 13:44:17.742460 CA PerBit enable=1, Macro0, CA PI delay=25
2265 13:44:17.745552 === u2Vref_new: 0x56 --> 0x3a
2266 13:44:17.746040
2267 13:44:17.748935 Vref(ca) range 1: 22
2268 13:44:17.749462
2269 13:44:17.749871 CS Dly= 11 (42-0-32)
2270 13:44:17.752422 Write Rank0 MR13 =0xd8
2271 13:44:17.755923 Write Rank0 MR13 =0xd8
2272 13:44:17.756407 Write Rank0 MR12 =0x56
2273 13:44:17.758945 Write Rank1 MR13 =0x59
2274 13:44:17.759430 ==
2275 13:44:17.765657 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2276 13:44:17.766008 fsp= 1, odt_onoff= 1, Byte mode= 0
2277 13:44:17.768713 ==
2278 13:44:17.768970 === u2Vref_new: 0x56 --> 0x3a
2279 13:44:17.771818 === u2Vref_new: 0x58 --> 0x58
2280 13:44:17.775377 === u2Vref_new: 0x5a --> 0x5a
2281 13:44:17.778797 === u2Vref_new: 0x5c --> 0x78
2282 13:44:17.782114 === u2Vref_new: 0x5e --> 0x7a
2283 13:44:17.785439 === u2Vref_new: 0x60 --> 0x90
2284 13:44:17.789329 [CA 0] Center 36 (10~63) winsize 54
2285 13:44:17.792133 [CA 1] Center 35 (8~63) winsize 56
2286 13:44:17.795755 [CA 2] Center 33 (3~63) winsize 61
2287 13:44:17.798980 [CA 3] Center 32 (3~62) winsize 60
2288 13:44:17.801896 [CA 4] Center 34 (5~63) winsize 59
2289 13:44:17.805785 [CA 5] Center 25 (-2~53) winsize 56
2290 13:44:17.805882
2291 13:44:17.808790 [CATrainingPosCal] consider 2 rank data
2292 13:44:17.812322 u2DelayCellTimex100 = 762/100 ps
2293 13:44:17.815276 CA0 delay=36 (10~63),Diff = 11 PI (14 cell)
2294 13:44:17.818843 CA1 delay=35 (8~63),Diff = 10 PI (12 cell)
2295 13:44:17.822226 CA2 delay=33 (5~62),Diff = 8 PI (10 cell)
2296 13:44:17.825690 CA3 delay=32 (3~62),Diff = 7 PI (8 cell)
2297 13:44:17.828792 CA4 delay=34 (5~63),Diff = 9 PI (11 cell)
2298 13:44:17.832449 CA5 delay=25 (-1~52),Diff = 0 PI (0 cell)
2299 13:44:17.832533
2300 13:44:17.838697 CA PerBit enable=1, Macro0, CA PI delay=25
2301 13:44:17.838781 === u2Vref_new: 0x56 --> 0x3a
2302 13:44:17.838846
2303 13:44:17.842034 Vref(ca) range 1: 22
2304 13:44:17.842117
2305 13:44:17.845738 CS Dly= 11 (42-0-32)
2306 13:44:17.845852 Write Rank1 MR13 =0xd8
2307 13:44:17.849191 Write Rank1 MR13 =0xd8
2308 13:44:17.852305 Write Rank1 MR12 =0x56
2309 13:44:17.855305 [RankSwap] Rank num 2, (Multi 1), Rank 0
2310 13:44:17.855397 Write Rank0 MR2 =0xad
2311 13:44:17.858741 [Write Leveling]
2312 13:44:17.862197 delay byte0 byte1 byte2 byte3
2313 13:44:17.862281
2314 13:44:17.862345 10 0 0
2315 13:44:17.862409 11 0 0
2316 13:44:17.865819 12 0 0
2317 13:44:17.865904 13 0 0
2318 13:44:17.868834 14 0 0
2319 13:44:17.868919 15 0 0
2320 13:44:17.872483 16 0 0
2321 13:44:17.872618 17 0 0
2322 13:44:17.872718 18 0 0
2323 13:44:17.875600 19 0 0
2324 13:44:17.875688 20 0 0
2325 13:44:17.878856 21 0 0
2326 13:44:17.878942 22 0 0
2327 13:44:17.879008 23 0 0
2328 13:44:17.882558 24 0 0
2329 13:44:17.882642 25 0 0
2330 13:44:17.885621 26 0 0
2331 13:44:17.885705 27 0 0
2332 13:44:17.885771 28 0 0
2333 13:44:17.889222 29 0 0
2334 13:44:17.889307 30 0 0
2335 13:44:17.892517 31 0 ff
2336 13:44:17.892608 32 0 ff
2337 13:44:17.895575 33 0 ff
2338 13:44:17.895704 34 ff ff
2339 13:44:17.895810 35 ff ff
2340 13:44:17.899265 36 ff ff
2341 13:44:17.899408 37 ff ff
2342 13:44:17.902458 38 ff ff
2343 13:44:17.902552 39 ff ff
2344 13:44:17.906139 40 ff ff
2345 13:44:17.909159 pass bytecount = 0xff (0xff: all bytes pass)
2346 13:44:17.909249
2347 13:44:17.909320 DQS0 dly: 34
2348 13:44:17.912930 DQS1 dly: 31
2349 13:44:17.913043 Write Rank0 MR2 =0x2d
2350 13:44:17.915781 [RankSwap] Rank num 2, (Multi 1), Rank 0
2351 13:44:17.919531 Write Rank0 MR1 =0xd6
2352 13:44:17.919665 [Gating]
2353 13:44:17.919778 ==
2354 13:44:17.926303 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2355 13:44:17.929307 fsp= 1, odt_onoff= 1, Byte mode= 0
2356 13:44:17.929407 ==
2357 13:44:17.932659 3 1 0 |c0b 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
2358 13:44:17.936346 3 1 4 |2423 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2359 13:44:17.943081 3 1 8 |1413 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2360 13:44:17.945893 3 1 12 |f0f 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2361 13:44:17.949504 3 1 16 |302f 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2362 13:44:17.956566 3 1 20 |504 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2363 13:44:17.959504 3 1 24 |2e2d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2364 13:44:17.963129 3 1 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2365 13:44:17.966643 3 2 0 |2928 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2366 13:44:17.973024 3 2 4 |3130 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2367 13:44:17.976577 3 2 8 |3938 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2368 13:44:17.979456 [Byte 0] Lead/lag Transition tap number (1)
2369 13:44:17.983310 3 2 12 |3635 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2370 13:44:17.989711 3 2 16 |3635 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2371 13:44:17.993457 3 2 20 |3635 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2372 13:44:17.996389 3 2 24 |2827 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2373 13:44:18.003120 3 2 28 |807 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2374 13:44:18.006534 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
2375 13:44:18.010202 3 3 4 |3534 908 |(11 11)(11 11) |(0 1)(1 1)| 0
2376 13:44:18.016413 3 3 8 |3534 807 |(11 11)(11 11) |(0 1)(1 1)| 0
2377 13:44:18.019903 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2378 13:44:18.022932 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2379 13:44:18.026476 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2380 13:44:18.033330 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2381 13:44:18.036242 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2382 13:44:18.039909 3 3 28 |b0a 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2383 13:44:18.046602 3 4 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2384 13:44:18.049658 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2385 13:44:18.053390 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2386 13:44:18.056538 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2387 13:44:18.063177 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2388 13:44:18.066728 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2389 13:44:18.069809 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2390 13:44:18.076424 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2391 13:44:18.079534 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2392 13:44:18.083058 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2393 13:44:18.089953 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2394 13:44:18.092955 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2395 13:44:18.096813 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2396 13:44:18.103075 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2397 13:44:18.106576 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2398 13:44:18.110095 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2399 13:44:18.113315 [Byte 0] Lead/lag Transition tap number (3)
2400 13:44:18.119971 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2401 13:44:18.123414 3 5 28 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2402 13:44:18.126414 [Byte 1] Lead/lag Transition tap number (2)
2403 13:44:18.129980 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2404 13:44:18.133011 [Byte 0]First pass (3, 6, 0)
2405 13:44:18.136642 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2406 13:44:18.139738 [Byte 1]First pass (3, 6, 4)
2407 13:44:18.143444 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2408 13:44:18.146937 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2409 13:44:18.153103 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2410 13:44:18.156871 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2411 13:44:18.159982 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2412 13:44:18.163109 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2413 13:44:18.167036 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2414 13:44:18.173533 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2415 13:44:18.176631 All bytes gating window > 1UI, Early break!
2416 13:44:18.176708
2417 13:44:18.180233 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 22)
2418 13:44:18.180336
2419 13:44:18.183868 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
2420 13:44:18.183952
2421 13:44:18.184010
2422 13:44:18.184062
2423 13:44:18.186691 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 22)
2424 13:44:18.186767
2425 13:44:18.190139 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
2426 13:44:18.193363
2427 13:44:18.193437
2428 13:44:18.193495 Write Rank0 MR1 =0x56
2429 13:44:18.193548
2430 13:44:18.197108 best RODT dly(2T, 0.5T) = (2, 2)
2431 13:44:18.197188
2432 13:44:18.200282 best RODT dly(2T, 0.5T) = (2, 2)
2433 13:44:18.200355 ==
2434 13:44:18.207002 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2435 13:44:18.210089 fsp= 1, odt_onoff= 1, Byte mode= 0
2436 13:44:18.210202 ==
2437 13:44:18.213318 Start DQ dly to find pass range UseTestEngine =0
2438 13:44:18.217081 x-axis: bit #, y-axis: DQ dly (-127~63)
2439 13:44:18.217181 RX Vref Scan = 0
2440 13:44:18.220228 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2441 13:44:18.223228 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2442 13:44:18.227058 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2443 13:44:18.229992 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2444 13:44:18.233685 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2445 13:44:18.236707 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2446 13:44:18.240533 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2447 13:44:18.243499 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2448 13:44:18.243576 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2449 13:44:18.246655 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2450 13:44:18.250227 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2451 13:44:18.253865 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2452 13:44:18.257311 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2453 13:44:18.260338 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2454 13:44:18.263408 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2455 13:44:18.267087 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2456 13:44:18.267165 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2457 13:44:18.270632 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2458 13:44:18.273986 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2459 13:44:18.277039 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2460 13:44:18.280372 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2461 13:44:18.283801 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2462 13:44:18.283880 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2463 13:44:18.286865 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2464 13:44:18.290629 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2465 13:44:18.294158 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2466 13:44:18.297005 0, [0] xxxoxxxx xxxxxxxx [MSB]
2467 13:44:18.300424 1, [0] xxxoxxxx xxxxxxxo [MSB]
2468 13:44:18.300504 2, [0] xxooxxxx xxxxxxxo [MSB]
2469 13:44:18.304106 3, [0] xxooxxxo xxxxxxxo [MSB]
2470 13:44:18.307143 4, [0] xxoooxxo oooxxoxo [MSB]
2471 13:44:18.310866 5, [0] xxoooxxo oooooooo [MSB]
2472 13:44:18.314040 6, [0] xooooxxo oooooooo [MSB]
2473 13:44:18.317600 7, [0] xoooooxo oooooooo [MSB]
2474 13:44:18.317695 8, [0] ooooooxo oooooooo [MSB]
2475 13:44:18.320638 32, [0] ooxxoooo oooooooo [MSB]
2476 13:44:18.324242 33, [0] ooxxoooo ooooooox [MSB]
2477 13:44:18.327519 34, [0] ooxxoooo ooooooox [MSB]
2478 13:44:18.330864 35, [0] ooxxxooo ooxoooox [MSB]
2479 13:44:18.334103 36, [0] ooxxxoox xoxoooox [MSB]
2480 13:44:18.334217 37, [0] ooxxxoox xxxxoxxx [MSB]
2481 13:44:18.337726 38, [0] ooxxxoox xxxxoxxx [MSB]
2482 13:44:18.341353 39, [0] ooxxxoox xxxxxxxx [MSB]
2483 13:44:18.344334 40, [0] oxxxxoox xxxxxxxx [MSB]
2484 13:44:18.347385 41, [0] xxxxxxxx xxxxxxxx [MSB]
2485 13:44:18.350977 iDelay=41, Bit 0, Center 24 (8 ~ 40) 33
2486 13:44:18.354040 iDelay=41, Bit 1, Center 22 (6 ~ 39) 34
2487 13:44:18.357865 iDelay=41, Bit 2, Center 16 (2 ~ 31) 30
2488 13:44:18.360879 iDelay=41, Bit 3, Center 15 (0 ~ 31) 32
2489 13:44:18.364403 iDelay=41, Bit 4, Center 19 (4 ~ 34) 31
2490 13:44:18.367879 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2491 13:44:18.370992 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
2492 13:44:18.374092 iDelay=41, Bit 7, Center 19 (3 ~ 35) 33
2493 13:44:18.377771 iDelay=41, Bit 8, Center 19 (4 ~ 35) 32
2494 13:44:18.380898 iDelay=41, Bit 9, Center 20 (4 ~ 36) 33
2495 13:44:18.387644 iDelay=41, Bit 10, Center 19 (4 ~ 34) 31
2496 13:44:18.390969 iDelay=41, Bit 11, Center 20 (5 ~ 36) 32
2497 13:44:18.394634 iDelay=41, Bit 12, Center 21 (5 ~ 38) 34
2498 13:44:18.397999 iDelay=41, Bit 13, Center 20 (4 ~ 36) 33
2499 13:44:18.401081 iDelay=41, Bit 14, Center 20 (5 ~ 36) 32
2500 13:44:18.404482 iDelay=41, Bit 15, Center 16 (1 ~ 32) 32
2501 13:44:18.404600 ==
2502 13:44:18.410857 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2503 13:44:18.410943 fsp= 1, odt_onoff= 1, Byte mode= 0
2504 13:44:18.414564 ==
2505 13:44:18.414639 DQS Delay:
2506 13:44:18.414698 DQS0 = 0, DQS1 = 0
2507 13:44:18.417687 DQM Delay:
2508 13:44:18.417762 DQM0 = 20, DQM1 = 19
2509 13:44:18.420846 DQ Delay:
2510 13:44:18.420922 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2511 13:44:18.424394 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
2512 13:44:18.428094 DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =20
2513 13:44:18.431089 DQ12 =21, DQ13 =20, DQ14 =20, DQ15 =16
2514 13:44:18.431189
2515 13:44:18.434672
2516 13:44:18.434747 DramC Write-DBI off
2517 13:44:18.434804 ==
2518 13:44:18.441081 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2519 13:44:18.444655 fsp= 1, odt_onoff= 1, Byte mode= 0
2520 13:44:18.444754 ==
2521 13:44:18.447949 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2522 13:44:18.448048
2523 13:44:18.451179 Begin, DQ Scan Range 927~1183
2524 13:44:18.451255
2525 13:44:18.451313
2526 13:44:18.454744 TX Vref Scan disable
2527 13:44:18.457778 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2528 13:44:18.461462 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2529 13:44:18.464476 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2530 13:44:18.467507 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2531 13:44:18.471146 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2532 13:44:18.474533 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2533 13:44:18.477694 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2534 13:44:18.481419 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2535 13:44:18.484516 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2536 13:44:18.487559 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2537 13:44:18.491313 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2538 13:44:18.494441 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2539 13:44:18.497993 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2540 13:44:18.501410 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2541 13:44:18.504677 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2542 13:44:18.508160 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2543 13:44:18.511435 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2544 13:44:18.517789 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2545 13:44:18.521162 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2546 13:44:18.524625 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2547 13:44:18.527766 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2548 13:44:18.531309 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2549 13:44:18.534760 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2550 13:44:18.537777 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2551 13:44:18.541361 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2552 13:44:18.544995 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2553 13:44:18.548036 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2554 13:44:18.551794 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2555 13:44:18.554502 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2556 13:44:18.557935 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2557 13:44:18.561576 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2558 13:44:18.564498 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2559 13:44:18.567623 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2560 13:44:18.574338 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2561 13:44:18.577885 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2562 13:44:18.580804 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2563 13:44:18.584243 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2564 13:44:18.587432 964 |3 6 4|[0] xxxxxxxx xxxxxxxo [MSB]
2565 13:44:18.591119 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]
2566 13:44:18.594218 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
2567 13:44:18.597326 967 |3 6 7|[0] xxxxxxxx oxxxxxxo [MSB]
2568 13:44:18.601034 968 |3 6 8|[0] xxxxxxxx oooxxxxo [MSB]
2569 13:44:18.604152 969 |3 6 9|[0] xxxxxxxx oooooxoo [MSB]
2570 13:44:18.607311 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
2571 13:44:18.610878 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
2572 13:44:18.614033 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2573 13:44:18.617750 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
2574 13:44:18.620628 974 |3 6 14|[0] xxoooxxo oooooooo [MSB]
2575 13:44:18.624216 975 |3 6 15|[0] xooooxxo oooooooo [MSB]
2576 13:44:18.627625 976 |3 6 16|[0] xoooooxo oooooooo [MSB]
2577 13:44:18.635246 989 |3 6 29|[0] oooooooo ooooooox [MSB]
2578 13:44:18.638659 990 |3 6 30|[0] oooooooo xxooooox [MSB]
2579 13:44:18.642247 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2580 13:44:18.645418 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2581 13:44:18.648742 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
2582 13:44:18.652609 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
2583 13:44:18.655475 995 |3 6 35|[0] ooxxooox xxxxxxxx [MSB]
2584 13:44:18.658637 996 |3 6 36|[0] ooxxooox xxxxxxxx [MSB]
2585 13:44:18.662092 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
2586 13:44:18.665520 Byte0, DQ PI dly=984, DQM PI dly= 984
2587 13:44:18.668856 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
2588 13:44:18.669029
2589 13:44:18.675617 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
2590 13:44:18.675790
2591 13:44:18.678756 Byte1, DQ PI dly=978, DQM PI dly= 978
2592 13:44:18.682444 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2593 13:44:18.682596
2594 13:44:18.685359 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2595 13:44:18.685456
2596 13:44:18.688816 ==
2597 13:44:18.692362 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2598 13:44:18.695528 fsp= 1, odt_onoff= 1, Byte mode= 0
2599 13:44:18.695637 ==
2600 13:44:18.698686 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2601 13:44:18.698791
2602 13:44:18.701872 Begin, DQ Scan Range 954~1018
2603 13:44:18.705468 Write Rank0 MR14 =0x0
2604 13:44:18.712930
2605 13:44:18.713035 CH=1, VrefRange= 0, VrefLevel = 0
2606 13:44:18.719982 TX Bit0 (978~996) 19 987, Bit8 (969~985) 17 977,
2607 13:44:18.722971 TX Bit1 (977~993) 17 985, Bit9 (969~985) 17 977,
2608 13:44:18.729870 TX Bit2 (976~990) 15 983, Bit10 (970~985) 16 977,
2609 13:44:18.732914 TX Bit3 (974~989) 16 981, Bit11 (971~988) 18 979,
2610 13:44:18.736520 TX Bit4 (977~992) 16 984, Bit12 (970~988) 19 979,
2611 13:44:18.743260 TX Bit5 (977~995) 19 986, Bit13 (971~988) 18 979,
2612 13:44:18.746490 TX Bit6 (978~995) 18 986, Bit14 (970~986) 17 978,
2613 13:44:18.749875 TX Bit7 (976~990) 15 983, Bit15 (967~985) 19 976,
2614 13:44:18.750019
2615 13:44:18.753190 Write Rank0 MR14 =0x2
2616 13:44:18.762109
2617 13:44:18.762270 CH=1, VrefRange= 0, VrefLevel = 2
2618 13:44:18.768431 TX Bit0 (978~996) 19 987, Bit8 (969~985) 17 977,
2619 13:44:18.771776 TX Bit1 (977~994) 18 985, Bit9 (969~985) 17 977,
2620 13:44:18.778411 TX Bit2 (976~991) 16 983, Bit10 (970~985) 16 977,
2621 13:44:18.781371 TX Bit3 (974~990) 17 982, Bit11 (971~989) 19 980,
2622 13:44:18.784537 TX Bit4 (976~992) 17 984, Bit12 (970~989) 20 979,
2623 13:44:18.791285 TX Bit5 (977~996) 20 986, Bit13 (972~988) 17 980,
2624 13:44:18.794804 TX Bit6 (978~996) 19 987, Bit14 (970~986) 17 978,
2625 13:44:18.798152 TX Bit7 (976~991) 16 983, Bit15 (967~985) 19 976,
2626 13:44:18.798361
2627 13:44:18.801481 Write Rank0 MR14 =0x4
2628 13:44:18.810737
2629 13:44:18.810901 CH=1, VrefRange= 0, VrefLevel = 4
2630 13:44:18.816820 TX Bit0 (977~997) 21 987, Bit8 (968~986) 19 977,
2631 13:44:18.820343 TX Bit1 (977~995) 19 986, Bit9 (969~986) 18 977,
2632 13:44:18.826934 TX Bit2 (975~991) 17 983, Bit10 (969~986) 18 977,
2633 13:44:18.830650 TX Bit3 (973~990) 18 981, Bit11 (970~989) 20 979,
2634 13:44:18.833780 TX Bit4 (976~992) 17 984, Bit12 (970~989) 20 979,
2635 13:44:18.840629 TX Bit5 (977~997) 21 987, Bit13 (971~989) 19 980,
2636 13:44:18.843611 TX Bit6 (978~996) 19 987, Bit14 (970~987) 18 978,
2637 13:44:18.847121 TX Bit7 (976~992) 17 984, Bit15 (966~985) 20 975,
2638 13:44:18.847306
2639 13:44:18.850097 Write Rank0 MR14 =0x6
2640 13:44:18.859485
2641 13:44:18.859780 CH=1, VrefRange= 0, VrefLevel = 6
2642 13:44:18.865864 TX Bit0 (977~998) 22 987, Bit8 (968~986) 19 977,
2643 13:44:18.869383 TX Bit1 (977~995) 19 986, Bit9 (968~986) 19 977,
2644 13:44:18.876082 TX Bit2 (975~992) 18 983, Bit10 (970~987) 18 978,
2645 13:44:18.879375 TX Bit3 (972~991) 20 981, Bit11 (970~990) 21 980,
2646 13:44:18.882957 TX Bit4 (976~993) 18 984, Bit12 (969~990) 22 979,
2647 13:44:18.888949 TX Bit5 (977~997) 21 987, Bit13 (971~990) 20 980,
2648 13:44:18.892571 TX Bit6 (977~997) 21 987, Bit14 (970~988) 19 979,
2649 13:44:18.895582 TX Bit7 (976~992) 17 984, Bit15 (966~985) 20 975,
2650 13:44:18.895805
2651 13:44:18.899299 Write Rank0 MR14 =0x8
2652 13:44:18.907879
2653 13:44:18.908032 CH=1, VrefRange= 0, VrefLevel = 8
2654 13:44:18.914674 TX Bit0 (977~998) 22 987, Bit8 (968~986) 19 977,
2655 13:44:18.918090 TX Bit1 (976~996) 21 986, Bit9 (968~987) 20 977,
2656 13:44:18.924773 TX Bit2 (975~992) 18 983, Bit10 (969~988) 20 978,
2657 13:44:18.927871 TX Bit3 (972~991) 20 981, Bit11 (970~990) 21 980,
2658 13:44:18.931510 TX Bit4 (976~993) 18 984, Bit12 (969~990) 22 979,
2659 13:44:18.938307 TX Bit5 (976~997) 22 986, Bit13 (970~990) 21 980,
2660 13:44:18.941410 TX Bit6 (977~997) 21 987, Bit14 (969~989) 21 979,
2661 13:44:18.944469 TX Bit7 (975~992) 18 983, Bit15 (966~986) 21 976,
2662 13:44:18.944666
2663 13:44:18.948309 Write Rank0 MR14 =0xa
2664 13:44:18.956962
2665 13:44:18.960727 CH=1, VrefRange= 0, VrefLevel = 10
2666 13:44:18.963787 TX Bit0 (977~998) 22 987, Bit8 (968~987) 20 977,
2667 13:44:18.967237 TX Bit1 (976~996) 21 986, Bit9 (968~987) 20 977,
2668 13:44:18.973629 TX Bit2 (974~992) 19 983, Bit10 (969~988) 20 978,
2669 13:44:18.976766 TX Bit3 (972~991) 20 981, Bit11 (970~991) 22 980,
2670 13:44:18.980411 TX Bit4 (975~994) 20 984, Bit12 (969~991) 23 980,
2671 13:44:18.987051 TX Bit5 (976~998) 23 987, Bit13 (970~991) 22 980,
2672 13:44:18.990190 TX Bit6 (977~998) 22 987, Bit14 (969~989) 21 979,
2673 13:44:18.993699 TX Bit7 (975~993) 19 984, Bit15 (966~987) 22 976,
2674 13:44:18.993845
2675 13:44:18.996920 Write Rank0 MR14 =0xc
2676 13:44:19.006164
2677 13:44:19.009208 CH=1, VrefRange= 0, VrefLevel = 12
2678 13:44:19.012764 TX Bit0 (977~998) 22 987, Bit8 (968~989) 22 978,
2679 13:44:19.015965 TX Bit1 (976~997) 22 986, Bit9 (968~988) 21 978,
2680 13:44:19.022999 TX Bit2 (974~993) 20 983, Bit10 (969~989) 21 979,
2681 13:44:19.026174 TX Bit3 (971~991) 21 981, Bit11 (969~991) 23 980,
2682 13:44:19.029127 TX Bit4 (975~994) 20 984, Bit12 (969~991) 23 980,
2683 13:44:19.036359 TX Bit5 (976~998) 23 987, Bit13 (970~991) 22 980,
2684 13:44:19.039527 TX Bit6 (977~998) 22 987, Bit14 (969~990) 22 979,
2685 13:44:19.042544 TX Bit7 (975~993) 19 984, Bit15 (966~987) 22 976,
2686 13:44:19.042711
2687 13:44:19.045736 Write Rank0 MR14 =0xe
2688 13:44:19.055019
2689 13:44:19.058476 CH=1, VrefRange= 0, VrefLevel = 14
2690 13:44:19.061788 TX Bit0 (977~998) 22 987, Bit8 (968~989) 22 978,
2691 13:44:19.064967 TX Bit1 (975~997) 23 986, Bit9 (968~988) 21 978,
2692 13:44:19.071580 TX Bit2 (974~993) 20 983, Bit10 (969~990) 22 979,
2693 13:44:19.074963 TX Bit3 (971~992) 22 981, Bit11 (969~991) 23 980,
2694 13:44:19.078432 TX Bit4 (975~995) 21 985, Bit12 (969~991) 23 980,
2695 13:44:19.085038 TX Bit5 (976~998) 23 987, Bit13 (970~991) 22 980,
2696 13:44:19.088224 TX Bit6 (977~998) 22 987, Bit14 (969~990) 22 979,
2697 13:44:19.091745 TX Bit7 (975~993) 19 984, Bit15 (965~988) 24 976,
2698 13:44:19.094549
2699 13:44:19.094740 Write Rank0 MR14 =0x10
2700 13:44:19.104127
2701 13:44:19.107480 CH=1, VrefRange= 0, VrefLevel = 16
2702 13:44:19.110851 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
2703 13:44:19.114365 TX Bit1 (976~997) 22 986, Bit9 (967~989) 23 978,
2704 13:44:19.120936 TX Bit2 (974~994) 21 984, Bit10 (968~990) 23 979,
2705 13:44:19.123870 TX Bit3 (970~992) 23 981, Bit11 (969~991) 23 980,
2706 13:44:19.127398 TX Bit4 (974~996) 23 985, Bit12 (969~991) 23 980,
2707 13:44:19.133992 TX Bit5 (976~998) 23 987, Bit13 (970~991) 22 980,
2708 13:44:19.137651 TX Bit6 (977~999) 23 988, Bit14 (969~991) 23 980,
2709 13:44:19.140673 TX Bit7 (975~994) 20 984, Bit15 (965~988) 24 976,
2710 13:44:19.143926
2711 13:44:19.144119 Write Rank0 MR14 =0x12
2712 13:44:19.153168
2713 13:44:19.157107 CH=1, VrefRange= 0, VrefLevel = 18
2714 13:44:19.160166 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
2715 13:44:19.163184 TX Bit1 (975~998) 24 986, Bit9 (967~989) 23 978,
2716 13:44:19.170215 TX Bit2 (973~994) 22 983, Bit10 (968~991) 24 979,
2717 13:44:19.173247 TX Bit3 (970~992) 23 981, Bit11 (969~991) 23 980,
2718 13:44:19.176926 TX Bit4 (974~997) 24 985, Bit12 (968~991) 24 979,
2719 13:44:19.183483 TX Bit5 (976~998) 23 987, Bit13 (969~991) 23 980,
2720 13:44:19.186885 TX Bit6 (977~998) 22 987, Bit14 (969~991) 23 980,
2721 13:44:19.190291 TX Bit7 (974~995) 22 984, Bit15 (965~988) 24 976,
2722 13:44:19.190484
2723 13:44:19.193496 Write Rank0 MR14 =0x14
2724 13:44:19.202821
2725 13:44:19.206378 CH=1, VrefRange= 0, VrefLevel = 20
2726 13:44:19.209309 TX Bit0 (977~999) 23 988, Bit8 (967~991) 25 979,
2727 13:44:19.212867 TX Bit1 (975~998) 24 986, Bit9 (967~990) 24 978,
2728 13:44:19.219214 TX Bit2 (972~995) 24 983, Bit10 (968~991) 24 979,
2729 13:44:19.222683 TX Bit3 (970~993) 24 981, Bit11 (969~992) 24 980,
2730 13:44:19.226338 TX Bit4 (974~997) 24 985, Bit12 (968~992) 25 980,
2731 13:44:19.232468 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2732 13:44:19.235741 TX Bit6 (976~999) 24 987, Bit14 (969~991) 23 980,
2733 13:44:19.239157 TX Bit7 (974~995) 22 984, Bit15 (964~988) 25 976,
2734 13:44:19.239456
2735 13:44:19.242622 Write Rank0 MR14 =0x16
2736 13:44:19.251818
2737 13:44:19.255708 CH=1, VrefRange= 0, VrefLevel = 22
2738 13:44:19.258997 TX Bit0 (976~1000) 25 988, Bit8 (966~991) 26 978,
2739 13:44:19.261732 TX Bit1 (974~998) 25 986, Bit9 (967~990) 24 978,
2740 13:44:19.268688 TX Bit2 (971~995) 25 983, Bit10 (967~991) 25 979,
2741 13:44:19.272070 TX Bit3 (970~993) 24 981, Bit11 (968~992) 25 980,
2742 13:44:19.275025 TX Bit4 (973~998) 26 985, Bit12 (968~992) 25 980,
2743 13:44:19.281859 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2744 13:44:19.284973 TX Bit6 (976~999) 24 987, Bit14 (968~991) 24 979,
2745 13:44:19.288428 TX Bit7 (973~996) 24 984, Bit15 (963~988) 26 975,
2746 13:44:19.292167
2747 13:44:19.292389 Write Rank0 MR14 =0x18
2748 13:44:19.301711
2749 13:44:19.304706 CH=1, VrefRange= 0, VrefLevel = 24
2750 13:44:19.308309 TX Bit0 (976~1000) 25 988, Bit8 (966~991) 26 978,
2751 13:44:19.311707 TX Bit1 (974~999) 26 986, Bit9 (966~991) 26 978,
2752 13:44:19.317834 TX Bit2 (971~995) 25 983, Bit10 (967~991) 25 979,
2753 13:44:19.321504 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
2754 13:44:19.324560 TX Bit4 (973~997) 25 985, Bit12 (968~992) 25 980,
2755 13:44:19.331549 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2756 13:44:19.334415 TX Bit6 (976~1000) 25 988, Bit14 (967~991) 25 979,
2757 13:44:19.341085 TX Bit7 (973~997) 25 985, Bit15 (963~987) 25 975,
2758 13:44:19.341270
2759 13:44:19.341394 Write Rank0 MR14 =0x1a
2760 13:44:19.351287
2761 13:44:19.354290 CH=1, VrefRange= 0, VrefLevel = 26
2762 13:44:19.357984 TX Bit0 (976~1000) 25 988, Bit8 (966~991) 26 978,
2763 13:44:19.361076 TX Bit1 (974~999) 26 986, Bit9 (966~991) 26 978,
2764 13:44:19.367876 TX Bit2 (971~995) 25 983, Bit10 (967~991) 25 979,
2765 13:44:19.371002 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
2766 13:44:19.374737 TX Bit4 (973~997) 25 985, Bit12 (968~992) 25 980,
2767 13:44:19.381066 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2768 13:44:19.384235 TX Bit6 (976~1000) 25 988, Bit14 (967~991) 25 979,
2769 13:44:19.387334 TX Bit7 (973~997) 25 985, Bit15 (963~987) 25 975,
2770 13:44:19.390476
2771 13:44:19.390633 Write Rank0 MR14 =0x1c
2772 13:44:19.400622
2773 13:44:19.404069 CH=1, VrefRange= 0, VrefLevel = 28
2774 13:44:19.407112 TX Bit0 (976~1000) 25 988, Bit8 (966~991) 26 978,
2775 13:44:19.410846 TX Bit1 (974~999) 26 986, Bit9 (966~991) 26 978,
2776 13:44:19.417079 TX Bit2 (971~995) 25 983, Bit10 (967~991) 25 979,
2777 13:44:19.420477 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
2778 13:44:19.423657 TX Bit4 (973~997) 25 985, Bit12 (968~992) 25 980,
2779 13:44:19.430465 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2780 13:44:19.434102 TX Bit6 (976~1000) 25 988, Bit14 (967~991) 25 979,
2781 13:44:19.437341 TX Bit7 (973~997) 25 985, Bit15 (963~987) 25 975,
2782 13:44:19.440369
2783 13:44:19.440526 Write Rank0 MR14 =0x1e
2784 13:44:19.449757
2785 13:44:19.449929 CH=1, VrefRange= 0, VrefLevel = 30
2786 13:44:19.456397 TX Bit0 (976~1000) 25 988, Bit8 (966~991) 26 978,
2787 13:44:19.459856 TX Bit1 (974~999) 26 986, Bit9 (966~991) 26 978,
2788 13:44:19.466704 TX Bit2 (971~995) 25 983, Bit10 (967~991) 25 979,
2789 13:44:19.469905 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
2790 13:44:19.473122 TX Bit4 (973~997) 25 985, Bit12 (968~992) 25 980,
2791 13:44:19.479727 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2792 13:44:19.483613 TX Bit6 (976~1000) 25 988, Bit14 (967~991) 25 979,
2793 13:44:19.489661 TX Bit7 (973~997) 25 985, Bit15 (963~987) 25 975,
2794 13:44:19.489832
2795 13:44:19.489957
2796 13:44:19.493115 TX Vref found, early break! 376< 380
2797 13:44:19.496414 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2798 13:44:19.499938 u1DelayCellOfst[0]=8 cells (7 PI)
2799 13:44:19.503136 u1DelayCellOfst[1]=6 cells (5 PI)
2800 13:44:19.506747 u1DelayCellOfst[2]=2 cells (2 PI)
2801 13:44:19.509731 u1DelayCellOfst[3]=0 cells (0 PI)
2802 13:44:19.512996 u1DelayCellOfst[4]=5 cells (4 PI)
2803 13:44:19.513220 u1DelayCellOfst[5]=7 cells (6 PI)
2804 13:44:19.516076 u1DelayCellOfst[6]=8 cells (7 PI)
2805 13:44:19.519775 u1DelayCellOfst[7]=5 cells (4 PI)
2806 13:44:19.522866 Byte0, DQ PI dly=981, DQM PI dly= 984
2807 13:44:19.529468 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2808 13:44:19.529625
2809 13:44:19.532972 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2810 13:44:19.533130
2811 13:44:19.536113 u1DelayCellOfst[8]=3 cells (3 PI)
2812 13:44:19.539577 u1DelayCellOfst[9]=3 cells (3 PI)
2813 13:44:19.542885 u1DelayCellOfst[10]=5 cells (4 PI)
2814 13:44:19.546334 u1DelayCellOfst[11]=6 cells (5 PI)
2815 13:44:19.549864 u1DelayCellOfst[12]=6 cells (5 PI)
2816 13:44:19.553349 u1DelayCellOfst[13]=6 cells (5 PI)
2817 13:44:19.553508 u1DelayCellOfst[14]=5 cells (4 PI)
2818 13:44:19.556133 u1DelayCellOfst[15]=0 cells (0 PI)
2819 13:44:19.559940 Byte1, DQ PI dly=975, DQM PI dly= 977
2820 13:44:19.566391 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
2821 13:44:19.566564
2822 13:44:19.569702 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
2823 13:44:19.569921
2824 13:44:19.573190 Write Rank0 MR14 =0x18
2825 13:44:19.573394
2826 13:44:19.573569 Final TX Range 0 Vref 24
2827 13:44:19.573736
2828 13:44:19.579536 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2829 13:44:19.579720
2830 13:44:19.586387 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2831 13:44:19.593011 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2832 13:44:19.602891 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2833 13:44:19.603058 Write Rank0 MR3 =0xb0
2834 13:44:19.606574 DramC Write-DBI on
2835 13:44:19.606732 ==
2836 13:44:19.609617 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2837 13:44:19.613403 fsp= 1, odt_onoff= 1, Byte mode= 0
2838 13:44:19.613589 ==
2839 13:44:19.619783 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2840 13:44:19.620085
2841 13:44:19.620357 Begin, DQ Scan Range 697~761
2842 13:44:19.620638
2843 13:44:19.623488
2844 13:44:19.623703 TX Vref Scan disable
2845 13:44:19.626558 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2846 13:44:19.629576 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2847 13:44:19.633328 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2848 13:44:19.636525 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2849 13:44:19.640011 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2850 13:44:19.643060 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2851 13:44:19.649694 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2852 13:44:19.653186 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2853 13:44:19.656081 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2854 13:44:19.659857 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2855 13:44:19.663171 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
2856 13:44:19.666499 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
2857 13:44:19.669886 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2858 13:44:19.673535 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2859 13:44:19.676231 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2860 13:44:19.679237 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2861 13:44:19.682626 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2862 13:44:19.686446 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2863 13:44:19.689558 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2864 13:44:19.697913 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2865 13:44:19.701281 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2866 13:44:19.704374 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2867 13:44:19.707384 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2868 13:44:19.711295 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2869 13:44:19.714267 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2870 13:44:19.717436 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2871 13:44:19.721324 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2872 13:44:19.724124 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2873 13:44:19.727721 Byte0, DQ PI dly=729, DQM PI dly= 729
2874 13:44:19.730761 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
2875 13:44:19.730835
2876 13:44:19.737454 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
2877 13:44:19.737572
2878 13:44:19.741177 Byte1, DQ PI dly=721, DQM PI dly= 721
2879 13:44:19.744318 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
2880 13:44:19.744412
2881 13:44:19.747987 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
2882 13:44:19.748077
2883 13:44:19.754207 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2884 13:44:19.764566 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2885 13:44:19.771154 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2886 13:44:19.771263 Write Rank0 MR3 =0x30
2887 13:44:19.774349 DramC Write-DBI off
2888 13:44:19.774482
2889 13:44:19.774602 [DATLAT]
2890 13:44:19.777568 Freq=1600, CH1 RK0, use_rxtx_scan=0
2891 13:44:19.777690
2892 13:44:19.780867 DATLAT Default: 0xf
2893 13:44:19.780988 7, 0xFFFF, sum=0
2894 13:44:19.784819 8, 0xFFFF, sum=0
2895 13:44:19.785011 9, 0xFFFF, sum=0
2896 13:44:19.787565 10, 0xFFFF, sum=0
2897 13:44:19.787762 11, 0xFFFF, sum=0
2898 13:44:19.790888 12, 0xFFFF, sum=0
2899 13:44:19.791057 13, 0xFFFF, sum=0
2900 13:44:19.791184 14, 0x0, sum=1
2901 13:44:19.794065 15, 0x0, sum=2
2902 13:44:19.794267 16, 0x0, sum=3
2903 13:44:19.797758 17, 0x0, sum=4
2904 13:44:19.800732 pattern=2 first_step=14 total pass=5 best_step=16
2905 13:44:19.800927 ==
2906 13:44:19.807734 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2907 13:44:19.807963 fsp= 1, odt_onoff= 1, Byte mode= 0
2908 13:44:19.810779 ==
2909 13:44:19.814647 Start DQ dly to find pass range UseTestEngine =1
2910 13:44:19.817635 x-axis: bit #, y-axis: DQ dly (-127~63)
2911 13:44:19.817873 RX Vref Scan = 1
2912 13:44:19.941321
2913 13:44:19.941506 RX Vref found, early break!
2914 13:44:19.941612
2915 13:44:19.948325 Final RX Vref 13, apply to both rank0 and 1
2916 13:44:19.948456 ==
2917 13:44:19.951422 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2918 13:44:19.955136 fsp= 1, odt_onoff= 1, Byte mode= 0
2919 13:44:19.955269 ==
2920 13:44:19.955371 DQS Delay:
2921 13:44:19.958431 DQS0 = 0, DQS1 = 0
2922 13:44:19.958593 DQM Delay:
2923 13:44:19.961426 DQM0 = 20, DQM1 = 18
2924 13:44:19.961578 DQ Delay:
2925 13:44:19.965120 DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15
2926 13:44:19.968159 DQ4 =18, DQ5 =23, DQ6 =25, DQ7 =19
2927 13:44:19.971805 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19
2928 13:44:19.974847 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
2929 13:44:19.974998
2930 13:44:19.975114
2931 13:44:19.975221
2932 13:44:19.978021 [DramC_TX_OE_Calibration] TA2
2933 13:44:19.981531 Original DQ_B0 (3 6) =30, OEN = 27
2934 13:44:19.984618 Original DQ_B1 (3 6) =30, OEN = 27
2935 13:44:19.988382 23, 0x0, End_B0=23 End_B1=23
2936 13:44:19.988557 24, 0x0, End_B0=24 End_B1=24
2937 13:44:19.991459 25, 0x0, End_B0=25 End_B1=25
2938 13:44:19.994990 26, 0x0, End_B0=26 End_B1=26
2939 13:44:19.998430 27, 0x0, End_B0=27 End_B1=27
2940 13:44:19.998623 28, 0x0, End_B0=28 End_B1=28
2941 13:44:20.001631 29, 0x0, End_B0=29 End_B1=29
2942 13:44:20.004732 30, 0x0, End_B0=30 End_B1=30
2943 13:44:20.008157 31, 0xFFFF, End_B0=30 End_B1=30
2944 13:44:20.015007 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2945 13:44:20.017806 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2946 13:44:20.018076
2947 13:44:20.018317
2948 13:44:20.021105 Write Rank0 MR23 =0x3f
2949 13:44:20.021376 [DQSOSC]
2950 13:44:20.027998 [DQSOSCAuto] RK0, (LSB)MR18= 0xba, (MSB)MR19= 0x3, tDQSOscB0 = 330 ps tDQSOscB1 = 0 ps
2951 13:44:20.034665 CH1_RK0: MR19=0x3, MR18=0xBA, DQSOSC=330, MR23=63, INC=22, DEC=33
2952 13:44:20.037665 Write Rank0 MR23 =0x3f
2953 13:44:20.037823 [DQSOSC]
2954 13:44:20.044493 [DQSOSCAuto] RK0, (LSB)MR18= 0xbc, (MSB)MR19= 0x3, tDQSOscB0 = 329 ps tDQSOscB1 = 0 ps
2955 13:44:20.048158 CH1 RK0: MR19=3, MR18=BC
2956 13:44:20.051034 [RankSwap] Rank num 2, (Multi 1), Rank 1
2957 13:44:20.054365 Write Rank0 MR2 =0xad
2958 13:44:20.054516 [Write Leveling]
2959 13:44:20.057767 delay byte0 byte1 byte2 byte3
2960 13:44:20.057919
2961 13:44:20.060963 10 0 0
2962 13:44:20.061118 11 0 0
2963 13:44:20.061254 12 0 0
2964 13:44:20.064663 13 0 0
2965 13:44:20.064818 14 0 0
2966 13:44:20.067699 15 0 0
2967 13:44:20.067854 16 0 0
2968 13:44:20.067974 17 0 0
2969 13:44:20.071542 18 0 0
2970 13:44:20.071696 19 0 0
2971 13:44:20.074434 20 0 0
2972 13:44:20.074588 21 0 0
2973 13:44:20.078044 22 0 0
2974 13:44:20.078198 23 0 0
2975 13:44:20.078318 24 0 0
2976 13:44:20.081096 25 0 0
2977 13:44:20.081291 26 0 0
2978 13:44:20.084850 27 0 0
2979 13:44:20.085004 28 0 0
2980 13:44:20.085123 29 0 0
2981 13:44:20.087945 30 0 0
2982 13:44:20.088098 31 0 0
2983 13:44:20.091543 32 0 ff
2984 13:44:20.091699 33 ff ff
2985 13:44:20.094580 34 0 ff
2986 13:44:20.094735 35 ff ff
2987 13:44:20.098054 36 ff ff
2988 13:44:20.098216 37 ff ff
2989 13:44:20.098337 38 ff ff
2990 13:44:20.101153 39 ff ff
2991 13:44:20.101359 40 ff ff
2992 13:44:20.104937 41 ff ff
2993 13:44:20.107929 pass bytecount = 0xff (0xff: all bytes pass)
2994 13:44:20.108081
2995 13:44:20.108202 DQS0 dly: 35
2996 13:44:20.111320 DQS1 dly: 32
2997 13:44:20.111471 Write Rank0 MR2 =0x2d
2998 13:44:20.118105 [RankSwap] Rank num 2, (Multi 1), Rank 0
2999 13:44:20.118258 Write Rank1 MR1 =0xd6
3000 13:44:20.118378 [Gating]
3001 13:44:20.118488 ==
3002 13:44:20.124485 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3003 13:44:20.128206 fsp= 1, odt_onoff= 1, Byte mode= 0
3004 13:44:20.128366 ==
3005 13:44:20.130887 3 1 0 |2e2e 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3006 13:44:20.137838 3 1 4 |3231 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
3007 13:44:20.140983 3 1 8 |1615 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3008 13:44:20.144838 3 1 12 |2928 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3009 13:44:20.151059 3 1 16 |3130 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3010 13:44:20.154568 3 1 20 |3030 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3011 13:44:20.157679 3 1 24 |3231 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3012 13:44:20.161325 3 1 28 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
3013 13:44:20.167576 3 2 0 |3838 403 |(11 11)(11 11) |(0 0)(1 1)| 0
3014 13:44:20.171266 3 2 4 |3938 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3015 13:44:20.174487 3 2 8 |3635 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3016 13:44:20.181078 3 2 12 |3736 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3017 13:44:20.184078 3 2 16 |1312 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3018 13:44:20.187730 3 2 20 |3838 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3019 13:44:20.194458 3 2 24 |2e2d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3020 13:44:20.197548 3 2 28 |b0a 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3021 13:44:20.201116 [Byte 0] Lead/lag falling Transition (3, 2, 28)
3022 13:44:20.204236 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
3023 13:44:20.210986 3 3 4 |3534 0 |(11 11)(11 11) |(0 1)(1 1)| 0
3024 13:44:20.214452 3 3 8 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3025 13:44:20.217443 [Byte 1] Lead/lag falling Transition (3, 3, 8)
3026 13:44:20.224457 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3027 13:44:20.227847 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3028 13:44:20.231284 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3029 13:44:20.234253 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3030 13:44:20.240797 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3031 13:44:20.244431 3 4 0 |3d3d 808 |(11 11)(11 11) |(1 1)(1 1)| 0
3032 13:44:20.247900 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3033 13:44:20.254070 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3034 13:44:20.257814 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3035 13:44:20.261028 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3036 13:44:20.267918 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3037 13:44:20.270847 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3038 13:44:20.274210 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3039 13:44:20.280979 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3040 13:44:20.283977 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3041 13:44:20.287608 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3042 13:44:20.291093 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3043 13:44:20.297844 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3044 13:44:20.300921 [Byte 0] Lead/lag falling Transition (3, 5, 16)
3045 13:44:20.304507 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3046 13:44:20.311062 [Byte 0] Lead/lag Transition tap number (2)
3047 13:44:20.314092 [Byte 1] Lead/lag falling Transition (3, 5, 20)
3048 13:44:20.317613 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3049 13:44:20.320626 3 5 28 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3050 13:44:20.327395 [Byte 1] Lead/lag Transition tap number (3)
3051 13:44:20.330914 3 6 0 |e0e 404 |(11 11)(11 11) |(0 0)(0 0)| 0
3052 13:44:20.333856 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3053 13:44:20.337510 [Byte 0]First pass (3, 6, 4)
3054 13:44:20.340453 [Byte 1]First pass (3, 6, 4)
3055 13:44:20.344015 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3056 13:44:20.347480 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3057 13:44:20.350616 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3058 13:44:20.354328 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3059 13:44:20.360649 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3060 13:44:20.363817 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3061 13:44:20.367406 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3062 13:44:20.370402 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3063 13:44:20.374179 All bytes gating window > 1UI, Early break!
3064 13:44:20.374409
3065 13:44:20.380713 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
3066 13:44:20.380928
3067 13:44:20.383942 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 26)
3068 13:44:20.384111
3069 13:44:20.384241
3070 13:44:20.384397
3071 13:44:20.386971 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
3072 13:44:20.387173
3073 13:44:20.390654 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
3074 13:44:20.390858
3075 13:44:20.391044
3076 13:44:20.397104 wait MRW command Rank1 MR1 =0x56 fired (1)
3077 13:44:20.397329 Write Rank1 MR1 =0x56
3078 13:44:20.397526
3079 13:44:20.400560 best RODT dly(2T, 0.5T) = (2, 2)
3080 13:44:20.400728
3081 13:44:20.404185 best RODT dly(2T, 0.5T) = (2, 2)
3082 13:44:20.404353 ==
3083 13:44:20.410371 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3084 13:44:20.410540 fsp= 1, odt_onoff= 1, Byte mode= 0
3085 13:44:20.414256 ==
3086 13:44:20.417548 Start DQ dly to find pass range UseTestEngine =0
3087 13:44:20.420423 x-axis: bit #, y-axis: DQ dly (-127~63)
3088 13:44:20.420593 RX Vref Scan = 0
3089 13:44:20.424107 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3090 13:44:20.427163 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3091 13:44:20.430683 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3092 13:44:20.433620 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3093 13:44:20.437390 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3094 13:44:20.440356 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3095 13:44:20.443612 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3096 13:44:20.443849 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3097 13:44:20.447277 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3098 13:44:20.450813 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3099 13:44:20.454119 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3100 13:44:20.457294 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3101 13:44:20.460774 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3102 13:44:20.463829 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3103 13:44:20.467066 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3104 13:44:20.467339 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3105 13:44:20.470618 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3106 13:44:20.474120 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3107 13:44:20.477188 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3108 13:44:20.480590 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3109 13:44:20.484231 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3110 13:44:20.487189 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3111 13:44:20.487414 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3112 13:44:20.490594 -3, [0] xxxoxxxx xxxxxxxx [MSB]
3113 13:44:20.493472 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3114 13:44:20.497228 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3115 13:44:20.500639 0, [0] xxooxxxx xxxxxxxo [MSB]
3116 13:44:20.503706 1, [0] xxoooxxo xxxxxxxo [MSB]
3117 13:44:20.503877 2, [0] xxoooxxo oooxxxxo [MSB]
3118 13:44:20.507472 3, [0] xxoooxxo oooxxooo [MSB]
3119 13:44:20.510630 4, [0] xxoooxxo ooooxooo [MSB]
3120 13:44:20.513857 5, [0] xoooooxo oooooooo [MSB]
3121 13:44:20.517198 6, [0] xoooooxo oooooooo [MSB]
3122 13:44:20.521055 34, [0] oooxoooo oooooooo [MSB]
3123 13:44:20.523937 35, [0] ooxxoooo ooooooox [MSB]
3124 13:44:20.524109 36, [0] ooxxoooo ooooooox [MSB]
3125 13:44:20.527474 37, [0] ooxxoooo ooxoooox [MSB]
3126 13:44:20.530782 38, [0] ooxxxooo xoxooxxx [MSB]
3127 13:44:20.534178 39, [0] ooxxxoox xxxxoxxx [MSB]
3128 13:44:20.537179 40, [0] ooxxxoox xxxxoxxx [MSB]
3129 13:44:20.540704 41, [0] ooxxxoxx xxxxxxxx [MSB]
3130 13:44:20.540989 42, [0] xxxxxxxx xxxxxxxx [MSB]
3131 13:44:20.547459 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
3132 13:44:20.550518 iDelay=42, Bit 1, Center 23 (5 ~ 41) 37
3133 13:44:20.553722 iDelay=42, Bit 2, Center 17 (0 ~ 34) 35
3134 13:44:20.557447 iDelay=42, Bit 3, Center 15 (-3 ~ 33) 37
3135 13:44:20.560640 iDelay=42, Bit 4, Center 19 (1 ~ 37) 37
3136 13:44:20.563715 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3137 13:44:20.566943 iDelay=42, Bit 6, Center 23 (7 ~ 40) 34
3138 13:44:20.570370 iDelay=42, Bit 7, Center 19 (1 ~ 38) 38
3139 13:44:20.574016 iDelay=42, Bit 8, Center 19 (2 ~ 37) 36
3140 13:44:20.577183 iDelay=42, Bit 9, Center 20 (2 ~ 38) 37
3141 13:44:20.580236 iDelay=42, Bit 10, Center 19 (2 ~ 36) 35
3142 13:44:20.583755 iDelay=42, Bit 11, Center 21 (4 ~ 38) 35
3143 13:44:20.587082 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3144 13:44:20.593938 iDelay=42, Bit 13, Center 20 (3 ~ 37) 35
3145 13:44:20.596910 iDelay=42, Bit 14, Center 20 (3 ~ 37) 35
3146 13:44:20.600614 iDelay=42, Bit 15, Center 16 (-1 ~ 34) 36
3147 13:44:20.600811 ==
3148 13:44:20.603478 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3149 13:44:20.606840 fsp= 1, odt_onoff= 1, Byte mode= 0
3150 13:44:20.607069 ==
3151 13:44:20.610168 DQS Delay:
3152 13:44:20.610332 DQS0 = 0, DQS1 = 0
3153 13:44:20.610460 DQM Delay:
3154 13:44:20.613797 DQM0 = 20, DQM1 = 19
3155 13:44:20.614027 DQ Delay:
3156 13:44:20.617183 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
3157 13:44:20.620054 DQ4 =19, DQ5 =23, DQ6 =23, DQ7 =19
3158 13:44:20.623614 DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =21
3159 13:44:20.626904 DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =16
3160 13:44:20.627068
3161 13:44:20.627195
3162 13:44:20.630405 DramC Write-DBI off
3163 13:44:20.630569 ==
3164 13:44:20.633432 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3165 13:44:20.637166 fsp= 1, odt_onoff= 1, Byte mode= 0
3166 13:44:20.637332 ==
3167 13:44:20.643599 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3168 13:44:20.643774
3169 13:44:20.646875 Begin, DQ Scan Range 928~1184
3170 13:44:20.647040
3171 13:44:20.647168
3172 13:44:20.647286 TX Vref Scan disable
3173 13:44:20.650516 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3174 13:44:20.653615 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3175 13:44:20.660527 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3176 13:44:20.663421 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3177 13:44:20.666535 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3178 13:44:20.670160 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3179 13:44:20.673599 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3180 13:44:20.676838 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3181 13:44:20.679984 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3182 13:44:20.683812 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3183 13:44:20.686775 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3184 13:44:20.689885 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3185 13:44:20.693568 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3186 13:44:20.696665 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3187 13:44:20.700050 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3188 13:44:20.703890 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3189 13:44:20.707008 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3190 13:44:20.709896 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3191 13:44:20.713657 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3192 13:44:20.720029 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3193 13:44:20.723440 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3194 13:44:20.726992 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3195 13:44:20.730032 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3196 13:44:20.733660 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3197 13:44:20.736968 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3198 13:44:20.740508 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3199 13:44:20.743395 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3200 13:44:20.746602 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3201 13:44:20.750070 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3202 13:44:20.753204 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3203 13:44:20.756947 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3204 13:44:20.760002 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3205 13:44:20.763606 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3206 13:44:20.766798 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3207 13:44:20.769907 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3208 13:44:20.773520 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3209 13:44:20.776698 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3210 13:44:20.780522 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3211 13:44:20.783719 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3212 13:44:20.789846 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3213 13:44:20.793237 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3214 13:44:20.796795 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
3215 13:44:20.800503 970 |3 6 10|[0] xxxxxxxx oooooxoo [MSB]
3216 13:44:20.803535 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3217 13:44:20.806557 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3218 13:44:20.810057 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
3219 13:44:20.813485 974 |3 6 14|[0] xxooxxxx oooooooo [MSB]
3220 13:44:20.816840 975 |3 6 15|[0] xxoooxxx oooooooo [MSB]
3221 13:44:20.819770 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
3222 13:44:20.826894 988 |3 6 28|[0] oooooooo ooooooox [MSB]
3223 13:44:20.830216 989 |3 6 29|[0] oooooooo ooooooox [MSB]
3224 13:44:20.833410 990 |3 6 30|[0] oooooooo ooooooox [MSB]
3225 13:44:20.836804 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3226 13:44:20.840040 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3227 13:44:20.843383 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3228 13:44:20.847164 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3229 13:44:20.850252 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]
3230 13:44:20.853318 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
3231 13:44:20.856813 997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB]
3232 13:44:20.860014 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
3233 13:44:20.863865 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3234 13:44:20.866633 Byte0, DQ PI dly=985, DQM PI dly= 985
3235 13:44:20.873581 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
3236 13:44:20.873795
3237 13:44:20.876796 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
3238 13:44:20.877051
3239 13:44:20.880489 Byte1, DQ PI dly=978, DQM PI dly= 978
3240 13:44:20.883501 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3241 13:44:20.883710
3242 13:44:20.890447 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3243 13:44:20.890605
3244 13:44:20.890727 ==
3245 13:44:20.893432 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3246 13:44:20.896585 fsp= 1, odt_onoff= 1, Byte mode= 0
3247 13:44:20.896747 ==
3248 13:44:20.903613 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3249 13:44:20.903775
3250 13:44:20.903897 Begin, DQ Scan Range 954~1018
3251 13:44:20.906472 Write Rank1 MR14 =0x0
3252 13:44:20.915436
3253 13:44:20.915650 CH=1, VrefRange= 0, VrefLevel = 0
3254 13:44:20.922144 TX Bit0 (979~998) 20 988, Bit8 (971~987) 17 979,
3255 13:44:20.925507 TX Bit1 (978~995) 18 986, Bit9 (970~986) 17 978,
3256 13:44:20.932315 TX Bit2 (976~991) 16 983, Bit10 (972~987) 16 979,
3257 13:44:20.935205 TX Bit3 (975~990) 16 982, Bit11 (974~991) 18 982,
3258 13:44:20.938794 TX Bit4 (977~992) 16 984, Bit12 (972~988) 17 980,
3259 13:44:20.946070 TX Bit5 (978~996) 19 987, Bit13 (975~987) 13 981,
3260 13:44:20.948781 TX Bit6 (978~997) 20 987, Bit14 (973~987) 15 980,
3261 13:44:20.952393 TX Bit7 (977~992) 16 984, Bit15 (968~985) 18 976,
3262 13:44:20.952600
3263 13:44:20.955692 Write Rank1 MR14 =0x2
3264 13:44:20.964858
3265 13:44:20.965033 CH=1, VrefRange= 0, VrefLevel = 2
3266 13:44:20.970973 TX Bit0 (979~998) 20 988, Bit8 (971~987) 17 979,
3267 13:44:20.974733 TX Bit1 (978~996) 19 987, Bit9 (970~986) 17 978,
3268 13:44:20.981060 TX Bit2 (976~991) 16 983, Bit10 (971~987) 17 979,
3269 13:44:20.984755 TX Bit3 (974~991) 18 982, Bit11 (974~991) 18 982,
3270 13:44:20.987814 TX Bit4 (976~993) 18 984, Bit12 (972~988) 17 980,
3271 13:44:20.994711 TX Bit5 (978~997) 20 987, Bit13 (974~987) 14 980,
3272 13:44:20.997720 TX Bit6 (978~998) 21 988, Bit14 (972~988) 17 980,
3273 13:44:21.001388 TX Bit7 (978~992) 15 985, Bit15 (968~985) 18 976,
3274 13:44:21.001552
3275 13:44:21.004447 Write Rank1 MR14 =0x4
3276 13:44:21.013614
3277 13:44:21.013783 CH=1, VrefRange= 0, VrefLevel = 4
3278 13:44:21.020348 TX Bit0 (978~998) 21 988, Bit8 (970~987) 18 978,
3279 13:44:21.023511 TX Bit1 (978~997) 20 987, Bit9 (970~987) 18 978,
3280 13:44:21.030137 TX Bit2 (975~992) 18 983, Bit10 (971~987) 17 979,
3281 13:44:21.033462 TX Bit3 (974~991) 18 982, Bit11 (974~991) 18 982,
3282 13:44:21.036457 TX Bit4 (976~993) 18 984, Bit12 (972~989) 18 980,
3283 13:44:21.043181 TX Bit5 (978~997) 20 987, Bit13 (974~987) 14 980,
3284 13:44:21.046927 TX Bit6 (978~998) 21 988, Bit14 (972~988) 17 980,
3285 13:44:21.049791 TX Bit7 (977~993) 17 985, Bit15 (968~985) 18 976,
3286 13:44:21.050021
3287 13:44:21.053478 Write Rank1 MR14 =0x6
3288 13:44:21.062653
3289 13:44:21.062813 CH=1, VrefRange= 0, VrefLevel = 6
3290 13:44:21.069289 TX Bit0 (978~999) 22 988, Bit8 (970~988) 19 979,
3291 13:44:21.072495 TX Bit1 (978~997) 20 987, Bit9 (969~988) 20 978,
3292 13:44:21.079299 TX Bit2 (975~992) 18 983, Bit10 (971~987) 17 979,
3293 13:44:21.082489 TX Bit3 (974~991) 18 982, Bit11 (972~991) 20 981,
3294 13:44:21.085615 TX Bit4 (976~994) 19 985, Bit12 (971~990) 20 980,
3295 13:44:21.092319 TX Bit5 (978~997) 20 987, Bit13 (973~988) 16 980,
3296 13:44:21.095459 TX Bit6 (977~998) 22 987, Bit14 (971~989) 19 980,
3297 13:44:21.099104 TX Bit7 (977~993) 17 985, Bit15 (968~986) 19 977,
3298 13:44:21.099303
3299 13:44:21.102736 Write Rank1 MR14 =0x8
3300 13:44:21.111578
3301 13:44:21.111826 CH=1, VrefRange= 0, VrefLevel = 8
3302 13:44:21.118332 TX Bit0 (978~999) 22 988, Bit8 (970~988) 19 979,
3303 13:44:21.121395 TX Bit1 (978~997) 20 987, Bit9 (969~988) 20 978,
3304 13:44:21.128142 TX Bit2 (975~992) 18 983, Bit10 (971~989) 19 980,
3305 13:44:21.131574 TX Bit3 (973~992) 20 982, Bit11 (972~992) 21 982,
3306 13:44:21.134677 TX Bit4 (976~994) 19 985, Bit12 (971~991) 21 981,
3307 13:44:21.141801 TX Bit5 (978~998) 21 988, Bit13 (973~989) 17 981,
3308 13:44:21.144771 TX Bit6 (978~998) 21 988, Bit14 (971~990) 20 980,
3309 13:44:21.148281 TX Bit7 (977~994) 18 985, Bit15 (967~986) 20 976,
3310 13:44:21.148468
3311 13:44:21.152012 Write Rank1 MR14 =0xa
3312 13:44:21.160556
3313 13:44:21.164092 CH=1, VrefRange= 0, VrefLevel = 10
3314 13:44:21.167731 TX Bit0 (978~999) 22 988, Bit8 (970~989) 20 979,
3315 13:44:21.170806 TX Bit1 (977~998) 22 987, Bit9 (969~989) 21 979,
3316 13:44:21.177554 TX Bit2 (975~993) 19 984, Bit10 (970~989) 20 979,
3317 13:44:21.181170 TX Bit3 (973~992) 20 982, Bit11 (972~992) 21 982,
3318 13:44:21.184554 TX Bit4 (976~995) 20 985, Bit12 (971~991) 21 981,
3319 13:44:21.190723 TX Bit5 (978~998) 21 988, Bit13 (972~990) 19 981,
3320 13:44:21.194508 TX Bit6 (978~999) 22 988, Bit14 (971~990) 20 980,
3321 13:44:21.197765 TX Bit7 (976~994) 19 985, Bit15 (967~986) 20 976,
3322 13:44:21.197948
3323 13:44:21.200729 Write Rank1 MR14 =0xc
3324 13:44:21.209944
3325 13:44:21.213529 CH=1, VrefRange= 0, VrefLevel = 12
3326 13:44:21.216582 TX Bit0 (978~999) 22 988, Bit8 (970~989) 20 979,
3327 13:44:21.220381 TX Bit1 (977~998) 22 987, Bit9 (969~989) 21 979,
3328 13:44:21.226729 TX Bit2 (974~993) 20 983, Bit10 (969~989) 21 979,
3329 13:44:21.229960 TX Bit3 (972~993) 22 982, Bit11 (971~992) 22 981,
3330 13:44:21.233502 TX Bit4 (975~996) 22 985, Bit12 (970~991) 22 980,
3331 13:44:21.239754 TX Bit5 (977~998) 22 987, Bit13 (972~991) 20 981,
3332 13:44:21.243349 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
3333 13:44:21.246602 TX Bit7 (976~995) 20 985, Bit15 (967~987) 21 977,
3334 13:44:21.246783
3335 13:44:21.249840 Write Rank1 MR14 =0xe
3336 13:44:21.259576
3337 13:44:21.263275 CH=1, VrefRange= 0, VrefLevel = 14
3338 13:44:21.266397 TX Bit0 (977~1000) 24 988, Bit8 (969~990) 22 979,
3339 13:44:21.269347 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
3340 13:44:21.276025 TX Bit2 (974~994) 21 984, Bit10 (970~991) 22 980,
3341 13:44:21.279558 TX Bit3 (972~993) 22 982, Bit11 (971~992) 22 981,
3342 13:44:21.282585 TX Bit4 (975~996) 22 985, Bit12 (970~992) 23 981,
3343 13:44:21.289283 TX Bit5 (977~998) 22 987, Bit13 (971~991) 21 981,
3344 13:44:21.292845 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
3345 13:44:21.296073 TX Bit7 (976~995) 20 985, Bit15 (967~987) 21 977,
3346 13:44:21.296431
3347 13:44:21.299192 Write Rank1 MR14 =0x10
3348 13:44:21.309001
3349 13:44:21.312159 CH=1, VrefRange= 0, VrefLevel = 16
3350 13:44:21.315764 TX Bit0 (978~1000) 23 989, Bit8 (969~991) 23 980,
3351 13:44:21.318822 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
3352 13:44:21.325544 TX Bit2 (974~994) 21 984, Bit10 (969~991) 23 980,
3353 13:44:21.328780 TX Bit3 (971~994) 24 982, Bit11 (971~993) 23 982,
3354 13:44:21.332389 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3355 13:44:21.339116 TX Bit5 (977~999) 23 988, Bit13 (971~991) 21 981,
3356 13:44:21.342341 TX Bit6 (977~1000) 24 988, Bit14 (970~991) 22 980,
3357 13:44:21.345532 TX Bit7 (976~996) 21 986, Bit15 (967~987) 21 977,
3358 13:44:21.345747
3359 13:44:21.349225 Write Rank1 MR14 =0x12
3360 13:44:21.358147
3361 13:44:21.362076 CH=1, VrefRange= 0, VrefLevel = 18
3362 13:44:21.365354 TX Bit0 (977~1000) 24 988, Bit8 (969~991) 23 980,
3363 13:44:21.368169 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
3364 13:44:21.375481 TX Bit2 (973~995) 23 984, Bit10 (969~991) 23 980,
3365 13:44:21.378587 TX Bit3 (971~994) 24 982, Bit11 (970~993) 24 981,
3366 13:44:21.381880 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3367 13:44:21.388289 TX Bit5 (977~999) 23 988, Bit13 (970~991) 22 980,
3368 13:44:21.391692 TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981,
3369 13:44:21.395531 TX Bit7 (976~997) 22 986, Bit15 (967~988) 22 977,
3370 13:44:21.395664
3371 13:44:21.398531 Write Rank1 MR14 =0x14
3372 13:44:21.408334
3373 13:44:21.411691 CH=1, VrefRange= 0, VrefLevel = 20
3374 13:44:21.414800 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3375 13:44:21.417869 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
3376 13:44:21.424686 TX Bit2 (973~996) 24 984, Bit10 (969~991) 23 980,
3377 13:44:21.428382 TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981,
3378 13:44:21.431524 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3379 13:44:21.438268 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3380 13:44:21.441368 TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981,
3381 13:44:21.447956 TX Bit7 (976~997) 22 986, Bit15 (966~988) 23 977,
3382 13:44:21.448104
3383 13:44:21.448210 Write Rank1 MR14 =0x16
3384 13:44:21.458541
3385 13:44:21.461464 CH=1, VrefRange= 0, VrefLevel = 22
3386 13:44:21.465114 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3387 13:44:21.468122 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
3388 13:44:21.475347 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3389 13:44:21.478392 TX Bit3 (970~995) 26 982, Bit11 (969~993) 25 981,
3390 13:44:21.481560 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3391 13:44:21.488285 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3392 13:44:21.491812 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3393 13:44:21.495219 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3394 13:44:21.495423
3395 13:44:21.498666 Write Rank1 MR14 =0x18
3396 13:44:21.508425
3397 13:44:21.511427 CH=1, VrefRange= 0, VrefLevel = 24
3398 13:44:21.514812 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3399 13:44:21.518057 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
3400 13:44:21.524998 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3401 13:44:21.528196 TX Bit3 (970~995) 26 982, Bit11 (969~993) 25 981,
3402 13:44:21.531840 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3403 13:44:21.538039 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3404 13:44:21.541756 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3405 13:44:21.547971 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3406 13:44:21.548180
3407 13:44:21.548340 Write Rank1 MR14 =0x1a
3408 13:44:21.558459
3409 13:44:21.561654 CH=1, VrefRange= 0, VrefLevel = 26
3410 13:44:21.564922 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3411 13:44:21.568609 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
3412 13:44:21.574870 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3413 13:44:21.578356 TX Bit3 (970~995) 26 982, Bit11 (969~993) 25 981,
3414 13:44:21.581401 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3415 13:44:21.588924 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3416 13:44:21.591554 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3417 13:44:21.595138 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3418 13:44:21.598549
3419 13:44:21.598716 Write Rank1 MR14 =0x1c
3420 13:44:21.607981
3421 13:44:21.611336 CH=1, VrefRange= 0, VrefLevel = 28
3422 13:44:21.615115 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3423 13:44:21.618145 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
3424 13:44:21.624935 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3425 13:44:21.628386 TX Bit3 (970~995) 26 982, Bit11 (969~993) 25 981,
3426 13:44:21.631681 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3427 13:44:21.637989 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3428 13:44:21.641626 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3429 13:44:21.644685 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3430 13:44:21.648309
3431 13:44:21.648471 Write Rank1 MR14 =0x1e
3432 13:44:21.658151
3433 13:44:21.661272 CH=1, VrefRange= 0, VrefLevel = 30
3434 13:44:21.664339 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3435 13:44:21.667948 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
3436 13:44:21.674809 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3437 13:44:21.677847 TX Bit3 (970~995) 26 982, Bit11 (969~993) 25 981,
3438 13:44:21.681715 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3439 13:44:21.687795 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3440 13:44:21.691449 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3441 13:44:21.694684 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3442 13:44:21.698169
3443 13:44:21.698363 Write Rank1 MR14 =0x20
3444 13:44:21.707984
3445 13:44:21.711002 CH=1, VrefRange= 0, VrefLevel = 32
3446 13:44:21.714593 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3447 13:44:21.717922 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
3448 13:44:21.724565 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3449 13:44:21.727889 TX Bit3 (970~995) 26 982, Bit11 (969~993) 25 981,
3450 13:44:21.731510 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3451 13:44:21.738052 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3452 13:44:21.741495 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3453 13:44:21.747807 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3454 13:44:21.748009
3455 13:44:21.748159
3456 13:44:21.751442 TX Vref found, early break! 366< 371
3457 13:44:21.754444 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3458 13:44:21.757576 u1DelayCellOfst[0]=8 cells (7 PI)
3459 13:44:21.761313 u1DelayCellOfst[1]=6 cells (5 PI)
3460 13:44:21.764418 u1DelayCellOfst[2]=2 cells (2 PI)
3461 13:44:21.767759 u1DelayCellOfst[3]=0 cells (0 PI)
3462 13:44:21.771424 u1DelayCellOfst[4]=5 cells (4 PI)
3463 13:44:21.771614 u1DelayCellOfst[5]=7 cells (6 PI)
3464 13:44:21.774507 u1DelayCellOfst[6]=7 cells (6 PI)
3465 13:44:21.778207 u1DelayCellOfst[7]=5 cells (4 PI)
3466 13:44:21.781259 Byte0, DQ PI dly=982, DQM PI dly= 985
3467 13:44:21.788130 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3468 13:44:21.788367
3469 13:44:21.791276 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3470 13:44:21.791476
3471 13:44:21.794143 u1DelayCellOfst[8]=3 cells (3 PI)
3472 13:44:21.797819 u1DelayCellOfst[9]=2 cells (2 PI)
3473 13:44:21.801183 u1DelayCellOfst[10]=3 cells (3 PI)
3474 13:44:21.804599 u1DelayCellOfst[11]=5 cells (4 PI)
3475 13:44:21.807804 u1DelayCellOfst[12]=3 cells (3 PI)
3476 13:44:21.808049 u1DelayCellOfst[13]=5 cells (4 PI)
3477 13:44:21.811356 u1DelayCellOfst[14]=3 cells (3 PI)
3478 13:44:21.814148 u1DelayCellOfst[15]=0 cells (0 PI)
3479 13:44:21.817652 Byte1, DQ PI dly=977, DQM PI dly= 979
3480 13:44:21.824313 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3481 13:44:21.824539
3482 13:44:21.827716 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3483 13:44:21.827989
3484 13:44:21.831445 Write Rank1 MR14 =0x16
3485 13:44:21.831718
3486 13:44:21.831925 Final TX Range 0 Vref 22
3487 13:44:21.832135
3488 13:44:21.837386 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3489 13:44:21.837559
3490 13:44:21.844282 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3491 13:44:21.850801 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3492 13:44:21.861422 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3493 13:44:21.861608 Write Rank1 MR3 =0xb0
3494 13:44:21.864496 DramC Write-DBI on
3495 13:44:21.864653 ==
3496 13:44:21.867634 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3497 13:44:21.871314 fsp= 1, odt_onoff= 1, Byte mode= 0
3498 13:44:21.871472 ==
3499 13:44:21.877762 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3500 13:44:21.877985
3501 13:44:21.878176 Begin, DQ Scan Range 699~763
3502 13:44:21.878342
3503 13:44:21.878498
3504 13:44:21.880903 TX Vref Scan disable
3505 13:44:21.884476 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3506 13:44:21.888025 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3507 13:44:21.891547 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3508 13:44:21.894587 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3509 13:44:21.897652 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3510 13:44:21.901421 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3511 13:44:21.904504 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3512 13:44:21.911056 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3513 13:44:21.914434 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3514 13:44:21.917638 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3515 13:44:21.921172 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3516 13:44:21.924678 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3517 13:44:21.927498 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3518 13:44:21.930874 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3519 13:44:21.934347 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3520 13:44:21.937570 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3521 13:44:21.941133 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3522 13:44:21.944630 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3523 13:44:21.947561 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3524 13:44:21.951303 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3525 13:44:21.958698 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3526 13:44:21.962124 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3527 13:44:21.965387 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3528 13:44:21.968787 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3529 13:44:21.972581 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3530 13:44:21.975667 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3531 13:44:21.979418 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3532 13:44:21.982456 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3533 13:44:21.985444 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3534 13:44:21.989275 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
3535 13:44:21.992059 Byte0, DQ PI dly=731, DQM PI dly= 731
3536 13:44:21.995865 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
3537 13:44:21.996059
3538 13:44:22.002438 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
3539 13:44:22.002705
3540 13:44:22.005482 Byte1, DQ PI dly=723, DQM PI dly= 723
3541 13:44:22.008805 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3542 13:44:22.009123
3543 13:44:22.012512 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3544 13:44:22.012694
3545 13:44:22.018702 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3546 13:44:22.028780 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3547 13:44:22.035743 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3548 13:44:22.036029 Write Rank1 MR3 =0x30
3549 13:44:22.038876 DramC Write-DBI off
3550 13:44:22.039133
3551 13:44:22.039348 [DATLAT]
3552 13:44:22.041889 Freq=1600, CH1 RK1, use_rxtx_scan=0
3553 13:44:22.042076
3554 13:44:22.045213 DATLAT Default: 0x10
3555 13:44:22.045414 7, 0xFFFF, sum=0
3556 13:44:22.049174 8, 0xFFFF, sum=0
3557 13:44:22.049310 9, 0xFFFF, sum=0
3558 13:44:22.051807 10, 0xFFFF, sum=0
3559 13:44:22.051965 11, 0xFFFF, sum=0
3560 13:44:22.055367 12, 0xFFFF, sum=0
3561 13:44:22.055538 13, 0xFFFF, sum=0
3562 13:44:22.055669 14, 0x0, sum=1
3563 13:44:22.058937 15, 0x0, sum=2
3564 13:44:22.059087 16, 0x0, sum=3
3565 13:44:22.061995 17, 0x0, sum=4
3566 13:44:22.065690 pattern=2 first_step=14 total pass=5 best_step=16
3567 13:44:22.065852 ==
3568 13:44:22.072205 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3569 13:44:22.075664 fsp= 1, odt_onoff= 1, Byte mode= 0
3570 13:44:22.075755 ==
3571 13:44:22.078879 Start DQ dly to find pass range UseTestEngine =1
3572 13:44:22.081944 x-axis: bit #, y-axis: DQ dly (-127~63)
3573 13:44:22.082024 RX Vref Scan = 0
3574 13:44:22.085518 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3575 13:44:22.088561 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3576 13:44:22.092196 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3577 13:44:22.095774 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3578 13:44:22.098860 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3579 13:44:22.102580 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3580 13:44:22.102723 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3581 13:44:22.105585 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3582 13:44:22.109369 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3583 13:44:22.112418 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3584 13:44:22.115598 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3585 13:44:22.119146 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3586 13:44:22.122823 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3587 13:44:22.125974 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3588 13:44:22.129006 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3589 13:44:22.129111 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3590 13:44:22.131964 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3591 13:44:22.135791 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3592 13:44:22.139024 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3593 13:44:22.142465 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3594 13:44:22.145685 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3595 13:44:22.149343 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3596 13:44:22.149422 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3597 13:44:22.152379 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3598 13:44:22.155566 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3599 13:44:22.158995 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3600 13:44:22.162576 0, [0] xxooxxxx xxxxxxxo [MSB]
3601 13:44:22.165392 1, [0] xxoooxxo xxxxxxxo [MSB]
3602 13:44:22.165474 2, [0] xxoooxxo oooxxxxo [MSB]
3603 13:44:22.168887 3, [0] xxoooxxo ooooxooo [MSB]
3604 13:44:22.172462 4, [0] xxoooxxo oooooooo [MSB]
3605 13:44:22.175669 5, [0] xoooooxo oooooooo [MSB]
3606 13:44:22.178798 6, [0] xoooooxo oooooooo [MSB]
3607 13:44:22.182343 34, [0] oooxoooo oooooooo [MSB]
3608 13:44:22.185488 35, [0] oooxoooo ooooooox [MSB]
3609 13:44:22.188777 36, [0] ooxxoooo ooooooox [MSB]
3610 13:44:22.192327 37, [0] ooxxxoox ooxooxxx [MSB]
3611 13:44:22.195586 38, [0] ooxxxoox xxxooxxx [MSB]
3612 13:44:22.198543 39, [0] ooxxxoox xxxxoxxx [MSB]
3613 13:44:22.198632 40, [0] ooxxxoox xxxxxxxx [MSB]
3614 13:44:22.202373 41, [0] oxxxxoox xxxxxxxx [MSB]
3615 13:44:22.205394 42, [0] oxxxxxox xxxxxxxx [MSB]
3616 13:44:22.209149 43, [0] xxxxxxxx xxxxxxxx [MSB]
3617 13:44:22.212277 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3618 13:44:22.215397 iDelay=43, Bit 1, Center 22 (5 ~ 40) 36
3619 13:44:22.219113 iDelay=43, Bit 2, Center 17 (0 ~ 35) 36
3620 13:44:22.222154 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
3621 13:44:22.225755 iDelay=43, Bit 4, Center 18 (1 ~ 36) 36
3622 13:44:22.228970 iDelay=43, Bit 5, Center 23 (5 ~ 41) 37
3623 13:44:22.232055 iDelay=43, Bit 6, Center 24 (7 ~ 42) 36
3624 13:44:22.238860 iDelay=43, Bit 7, Center 18 (1 ~ 36) 36
3625 13:44:22.242381 iDelay=43, Bit 8, Center 19 (2 ~ 37) 36
3626 13:44:22.245977 iDelay=43, Bit 9, Center 19 (2 ~ 37) 36
3627 13:44:22.248720 iDelay=43, Bit 10, Center 19 (2 ~ 36) 35
3628 13:44:22.252255 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
3629 13:44:22.255351 iDelay=43, Bit 12, Center 21 (4 ~ 39) 36
3630 13:44:22.259075 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
3631 13:44:22.262196 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
3632 13:44:22.265336 iDelay=43, Bit 15, Center 17 (0 ~ 34) 35
3633 13:44:22.265472 ==
3634 13:44:22.272171 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3635 13:44:22.275896 fsp= 1, odt_onoff= 1, Byte mode= 0
3636 13:44:22.276040 ==
3637 13:44:22.276149 DQS Delay:
3638 13:44:22.279050 DQS0 = 0, DQS1 = 0
3639 13:44:22.279194 DQM Delay:
3640 13:44:22.279330 DQM0 = 20, DQM1 = 19
3641 13:44:22.282258 DQ Delay:
3642 13:44:22.285840 DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15
3643 13:44:22.288857 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =18
3644 13:44:22.292182 DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =20
3645 13:44:22.295710 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
3646 13:44:22.295849
3647 13:44:22.295958
3648 13:44:22.296060
3649 13:44:22.299167 [DramC_TX_OE_Calibration] TA2
3650 13:44:22.299306 Original DQ_B0 (3 6) =30, OEN = 27
3651 13:44:22.302457 Original DQ_B1 (3 6) =30, OEN = 27
3652 13:44:22.306134 23, 0x0, End_B0=23 End_B1=23
3653 13:44:22.309174 24, 0x0, End_B0=24 End_B1=24
3654 13:44:22.312263 25, 0x0, End_B0=25 End_B1=25
3655 13:44:22.312431 26, 0x0, End_B0=26 End_B1=26
3656 13:44:22.316037 27, 0x0, End_B0=27 End_B1=27
3657 13:44:22.319160 28, 0x0, End_B0=28 End_B1=28
3658 13:44:22.322273 29, 0x0, End_B0=29 End_B1=29
3659 13:44:22.325940 30, 0x0, End_B0=30 End_B1=30
3660 13:44:22.326087 31, 0xFFFF, End_B0=30 End_B1=30
3661 13:44:22.332898 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3662 13:44:22.339026 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3663 13:44:22.339168
3664 13:44:22.339275
3665 13:44:22.339373 Write Rank1 MR23 =0x3f
3666 13:44:22.342642 [DQSOSC]
3667 13:44:22.349481 [DQSOSCAuto] RK1, (LSB)MR18= 0xaf, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
3668 13:44:22.355638 CH1_RK1: MR19=0x3, MR18=0xAF, DQSOSC=334, MR23=63, INC=22, DEC=33
3669 13:44:22.355840 Write Rank1 MR23 =0x3f
3670 13:44:22.359401 [DQSOSC]
3671 13:44:22.365760 [DQSOSCAuto] RK1, (LSB)MR18= 0xb4, (MSB)MR19= 0x3, tDQSOscB0 = 332 ps tDQSOscB1 = 0 ps
3672 13:44:22.369122 CH1 RK1: MR19=3, MR18=B4
3673 13:44:22.369367 [RxdqsGatingPostProcess] freq 1600
3674 13:44:22.376180 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3675 13:44:22.376459 Rank: 0
3676 13:44:22.379176 best DQS0 dly(2T, 0.5T) = (2, 5)
3677 13:44:22.382830 best DQS1 dly(2T, 0.5T) = (2, 5)
3678 13:44:22.386270 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3679 13:44:22.389616 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3680 13:44:22.389887 Rank: 1
3681 13:44:22.392841 best DQS0 dly(2T, 0.5T) = (2, 5)
3682 13:44:22.395828 best DQS1 dly(2T, 0.5T) = (2, 5)
3683 13:44:22.399200 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3684 13:44:22.402316 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3685 13:44:22.405788 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3686 13:44:22.409189 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3687 13:44:22.416144 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3688 13:44:22.416324
3689 13:44:22.416474
3690 13:44:22.419252 [Calibration Summary] Freqency 1600
3691 13:44:22.419393 CH 0, Rank 0
3692 13:44:22.422219 All Pass.
3693 13:44:22.422361
3694 13:44:22.422477 CH 0, Rank 1
3695 13:44:22.422631 All Pass.
3696 13:44:22.422809
3697 13:44:22.425916 CH 1, Rank 0
3698 13:44:22.426087 All Pass.
3699 13:44:22.426266
3700 13:44:22.426360 CH 1, Rank 1
3701 13:44:22.429087 All Pass.
3702 13:44:22.429235
3703 13:44:22.435913 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3704 13:44:22.442099 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3705 13:44:22.448763 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3706 13:44:22.448931 Write Rank0 MR3 =0xb0
3707 13:44:22.455401 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3708 13:44:22.462318 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3709 13:44:22.472673 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3710 13:44:22.472829 Write Rank1 MR3 =0xb0
3711 13:44:22.479043 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3712 13:44:22.485624 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3713 13:44:22.492544 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3714 13:44:22.495717 Write Rank0 MR3 =0xb0
3715 13:44:22.502697 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3716 13:44:22.509214 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3717 13:44:22.515728 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3718 13:44:22.518797 Write Rank1 MR3 =0xb0
3719 13:44:22.518947 DramC Write-DBI on
3720 13:44:22.522884 [GetDramInforAfterCalByMRR] Vendor 1.
3721 13:44:22.525916 [GetDramInforAfterCalByMRR] Revision 7.
3722 13:44:22.526038 MR8 12
3723 13:44:22.532189 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3724 13:44:22.532357 MR8 12
3725 13:44:22.539066 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3726 13:44:22.539215 MR8 12
3727 13:44:22.542189 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3728 13:44:22.542274 MR8 12
3729 13:44:22.548911 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3730 13:44:22.559126 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3731 13:44:22.559290 Write Rank0 MR13 =0xd0
3732 13:44:22.562292 Write Rank1 MR13 =0xd0
3733 13:44:22.562379 Write Rank0 MR13 =0xd0
3734 13:44:22.565419 Write Rank1 MR13 =0xd0
3735 13:44:22.569079 Save calibration result to emmc
3736 13:44:22.569182
3737 13:44:22.569243
3738 13:44:22.572208 [DramcModeReg_Check] Freq_1600, FSP_1
3739 13:44:22.575411 FSP_1, CH_0, RK0
3740 13:44:22.575515 Write Rank0 MR13 =0xd8
3741 13:44:22.578985 MR12 = 0x56 (global = 0x56) match
3742 13:44:22.582107 MR14 = 0x16 (global = 0x16) match
3743 13:44:22.585481 FSP_1, CH_0, RK1
3744 13:44:22.585560 Write Rank1 MR13 =0xd8
3745 13:44:22.589004 MR12 = 0x56 (global = 0x56) match
3746 13:44:22.592216 MR14 = 0x18 (global = 0x18) match
3747 13:44:22.595692 FSP_1, CH_1, RK0
3748 13:44:22.595800 Write Rank0 MR13 =0xd8
3749 13:44:22.599012 MR12 = 0x56 (global = 0x56) match
3750 13:44:22.602541 MR14 = 0x18 (global = 0x18) match
3751 13:44:22.605587 FSP_1, CH_1, RK1
3752 13:44:22.605672 Write Rank1 MR13 =0xd8
3753 13:44:22.608962 MR12 = 0x56 (global = 0x56) match
3754 13:44:22.612081 MR14 = 0x16 (global = 0x16) match
3755 13:44:22.612151
3756 13:44:22.615780 [MEM_TEST] 02: After DFS, before run time config
3757 13:44:22.627919 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3758 13:44:22.628081
3759 13:44:22.628174 [TA2_TEST]
3760 13:44:22.628265 === TA2 HW
3761 13:44:22.630903 TA2 PAT: XTALK
3762 13:44:22.634351 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3763 13:44:22.640873 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3764 13:44:22.644562 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3765 13:44:22.647642 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3766 13:44:22.650791
3767 13:44:22.650891
3768 13:44:22.650980 Settings after calibration
3769 13:44:22.651062
3770 13:44:22.654604 [DramcRunTimeConfig]
3771 13:44:22.657531 TransferPLLToSPMControl - MODE SW PHYPLL
3772 13:44:22.657640 TX_TRACKING: ON
3773 13:44:22.660305 RX_TRACKING: ON
3774 13:44:22.660407 HW_GATING: ON
3775 13:44:22.664003 HW_GATING DBG: OFF
3776 13:44:22.664095 ddr_geometry:1
3777 13:44:22.667138 ddr_geometry:1
3778 13:44:22.667236 ddr_geometry:1
3779 13:44:22.670709 ddr_geometry:1
3780 13:44:22.670813 ddr_geometry:1
3781 13:44:22.670890 ddr_geometry:1
3782 13:44:22.673934 ddr_geometry:1
3783 13:44:22.674011 ddr_geometry:1
3784 13:44:22.677609 High Freq DUMMY_READ_FOR_TRACKING: ON
3785 13:44:22.680603 ZQCS_ENABLE_LP4: OFF
3786 13:44:22.684317 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3787 13:44:22.687334 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3788 13:44:22.687436 SPM_CONTROL_AFTERK: ON
3789 13:44:22.691013 IMPEDANCE_TRACKING: ON
3790 13:44:22.691105 TEMP_SENSOR: ON
3791 13:44:22.694022 PER_BANK_REFRESH: ON
3792 13:44:22.696981 HW_SAVE_FOR_SR: ON
3793 13:44:22.700426 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3794 13:44:22.700549 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3795 13:44:22.706822 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3796 13:44:22.706959 Read ODT Tracking: ON
3797 13:44:22.710578 =========================
3798 13:44:22.710697
3799 13:44:22.710799 [TA2_TEST]
3800 13:44:22.710896 === TA2 HW
3801 13:44:22.717079 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3802 13:44:22.720352 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3803 13:44:22.726965 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3804 13:44:22.730456 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3805 13:44:22.730644
3806 13:44:22.733400 [MEM_TEST] 03: After run time config
3807 13:44:22.745588 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3808 13:44:22.748888 [complex_mem_test] start addr:0x40024000, len:131072
3809 13:44:22.953256 1st complex R/W mem test pass
3810 13:44:22.959603 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3811 13:44:22.963043 sync preloader write leveling
3812 13:44:22.966315 sync preloader cbt_mr12
3813 13:44:22.966607 sync preloader cbt_clk_dly
3814 13:44:22.969920 sync preloader cbt_cmd_dly
3815 13:44:22.973116 sync preloader cbt_cs
3816 13:44:22.976484 sync preloader cbt_ca_perbit_delay
3817 13:44:22.976709 sync preloader clk_delay
3818 13:44:22.979955 sync preloader dqs_delay
3819 13:44:22.983226 sync preloader u1Gating2T_Save
3820 13:44:22.986538 sync preloader u1Gating05T_Save
3821 13:44:22.989608 sync preloader u1Gatingfine_tune_Save
3822 13:44:22.993265 sync preloader u1Gatingucpass_count_Save
3823 13:44:22.996701 sync preloader u1TxWindowPerbitVref_Save
3824 13:44:22.999673 sync preloader u1TxCenter_min_Save
3825 13:44:23.003456 sync preloader u1TxCenter_max_Save
3826 13:44:23.006467 sync preloader u1Txwin_center_Save
3827 13:44:23.009958 sync preloader u1Txfirst_pass_Save
3828 13:44:23.013260 sync preloader u1Txlast_pass_Save
3829 13:44:23.013573 sync preloader u1RxDatlat_Save
3830 13:44:23.016344 sync preloader u1RxWinPerbitVref_Save
3831 13:44:23.023548 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3832 13:44:23.026351 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3833 13:44:23.029820 sync preloader delay_cell_unit
3834 13:44:23.036767 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3835 13:44:23.039703 sync preloader write leveling
3836 13:44:23.039827 sync preloader cbt_mr12
3837 13:44:23.043511 sync preloader cbt_clk_dly
3838 13:44:23.046611 sync preloader cbt_cmd_dly
3839 13:44:23.046736 sync preloader cbt_cs
3840 13:44:23.049679 sync preloader cbt_ca_perbit_delay
3841 13:44:23.053353 sync preloader clk_delay
3842 13:44:23.053543 sync preloader dqs_delay
3843 13:44:23.056411 sync preloader u1Gating2T_Save
3844 13:44:23.059884 sync preloader u1Gating05T_Save
3845 13:44:23.063394 sync preloader u1Gatingfine_tune_Save
3846 13:44:23.066472 sync preloader u1Gatingucpass_count_Save
3847 13:44:23.070123 sync preloader u1TxWindowPerbitVref_Save
3848 13:44:23.073499 sync preloader u1TxCenter_min_Save
3849 13:44:23.076471 sync preloader u1TxCenter_max_Save
3850 13:44:23.080252 sync preloader u1Txwin_center_Save
3851 13:44:23.083452 sync preloader u1Txfirst_pass_Save
3852 13:44:23.086943 sync preloader u1Txlast_pass_Save
3853 13:44:23.090502 sync preloader u1RxDatlat_Save
3854 13:44:23.093485 sync preloader u1RxWinPerbitVref_Save
3855 13:44:23.096761 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3856 13:44:23.100356 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3857 13:44:23.103203 sync preloader delay_cell_unit
3858 13:44:23.109878 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3859 13:44:23.113598 sync preloader write leveling
3860 13:44:23.116631 sync preloader cbt_mr12
3861 13:44:23.116745 sync preloader cbt_clk_dly
3862 13:44:23.120275 sync preloader cbt_cmd_dly
3863 13:44:23.123435 sync preloader cbt_cs
3864 13:44:23.123551 sync preloader cbt_ca_perbit_delay
3865 13:44:23.127135 sync preloader clk_delay
3866 13:44:23.130202 sync preloader dqs_delay
3867 13:44:23.133331 sync preloader u1Gating2T_Save
3868 13:44:23.136959 sync preloader u1Gating05T_Save
3869 13:44:23.140188 sync preloader u1Gatingfine_tune_Save
3870 13:44:23.143430 sync preloader u1Gatingucpass_count_Save
3871 13:44:23.146813 sync preloader u1TxWindowPerbitVref_Save
3872 13:44:23.150500 sync preloader u1TxCenter_min_Save
3873 13:44:23.153689 sync preloader u1TxCenter_max_Save
3874 13:44:23.153900 sync preloader u1Txwin_center_Save
3875 13:44:23.156877 sync preloader u1Txfirst_pass_Save
3876 13:44:23.160388 sync preloader u1Txlast_pass_Save
3877 13:44:23.164002 sync preloader u1RxDatlat_Save
3878 13:44:23.166753 sync preloader u1RxWinPerbitVref_Save
3879 13:44:23.170506 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3880 13:44:23.177253 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3881 13:44:23.177420 sync preloader delay_cell_unit
3882 13:44:23.183908 just_for_test_dump_coreboot_params dump all params
3883 13:44:23.184072 dump source = 0x0
3884 13:44:23.186996 dump params frequency:1600
3885 13:44:23.190868 dump params rank number:2
3886 13:44:23.191045
3887 13:44:23.191208 dump params write leveling
3888 13:44:23.193949 write leveling[0][0][0] = 0x21
3889 13:44:23.197364 write leveling[0][0][1] = 0x19
3890 13:44:23.200846 write leveling[0][1][0] = 0x22
3891 13:44:23.203710 write leveling[0][1][1] = 0x1c
3892 13:44:23.207328 write leveling[1][0][0] = 0x22
3893 13:44:23.207493 write leveling[1][0][1] = 0x1f
3894 13:44:23.210347 write leveling[1][1][0] = 0x23
3895 13:44:23.213963 write leveling[1][1][1] = 0x20
3896 13:44:23.216889 dump params cbt_cs
3897 13:44:23.217167 cbt_cs[0][0] = 0xa
3898 13:44:23.220641 cbt_cs[0][1] = 0xa
3899 13:44:23.220865 cbt_cs[1][0] = 0xb
3900 13:44:23.223681 cbt_cs[1][1] = 0xb
3901 13:44:23.223881 dump params cbt_mr12
3902 13:44:23.227374 cbt_mr12[0][0] = 0x16
3903 13:44:23.227582 cbt_mr12[0][1] = 0x16
3904 13:44:23.230358 cbt_mr12[1][0] = 0x16
3905 13:44:23.233609 cbt_mr12[1][1] = 0x16
3906 13:44:23.233744 dump params tx window
3907 13:44:23.237235 tx_center_min[0][0][0] = 980
3908 13:44:23.240236 tx_center_max[0][0][0] = 987
3909 13:44:23.243501 tx_center_min[0][0][1] = 973
3910 13:44:23.243688 tx_center_max[0][0][1] = 978
3911 13:44:23.247093 tx_center_min[0][1][0] = 982
3912 13:44:23.250595 tx_center_max[0][1][0] = 989
3913 13:44:23.253980 tx_center_min[0][1][1] = 976
3914 13:44:23.254165 tx_center_max[0][1][1] = 980
3915 13:44:23.257345 tx_center_min[1][0][0] = 981
3916 13:44:23.260610 tx_center_max[1][0][0] = 988
3917 13:44:23.263839 tx_center_min[1][0][1] = 975
3918 13:44:23.267188 tx_center_max[1][0][1] = 980
3919 13:44:23.267309 tx_center_min[1][1][0] = 982
3920 13:44:23.270575 tx_center_max[1][1][0] = 989
3921 13:44:23.273732 tx_center_min[1][1][1] = 977
3922 13:44:23.276861 tx_center_max[1][1][1] = 981
3923 13:44:23.277054 dump params tx window
3924 13:44:23.280576 tx_win_center[0][0][0] = 987
3925 13:44:23.283692 tx_first_pass[0][0][0] = 975
3926 13:44:23.287266 tx_last_pass[0][0][0] = 999
3927 13:44:23.287386 tx_win_center[0][0][1] = 986
3928 13:44:23.290577 tx_first_pass[0][0][1] = 975
3929 13:44:23.293857 tx_last_pass[0][0][1] = 998
3930 13:44:23.297304 tx_win_center[0][0][2] = 985
3931 13:44:23.300485 tx_first_pass[0][0][2] = 974
3932 13:44:23.300668 tx_last_pass[0][0][2] = 997
3933 13:44:23.304013 tx_win_center[0][0][3] = 980
3934 13:44:23.306989 tx_first_pass[0][0][3] = 968
3935 13:44:23.310667 tx_last_pass[0][0][3] = 992
3936 13:44:23.310808 tx_win_center[0][0][4] = 985
3937 13:44:23.313627 tx_first_pass[0][0][4] = 973
3938 13:44:23.317055 tx_last_pass[0][0][4] = 998
3939 13:44:23.320817 tx_win_center[0][0][5] = 981
3940 13:44:23.323806 tx_first_pass[0][0][5] = 969
3941 13:44:23.323941 tx_last_pass[0][0][5] = 993
3942 13:44:23.327266 tx_win_center[0][0][6] = 981
3943 13:44:23.330895 tx_first_pass[0][0][6] = 970
3944 13:44:23.334025 tx_last_pass[0][0][6] = 993
3945 13:44:23.334257 tx_win_center[0][0][7] = 984
3946 13:44:23.337239 tx_first_pass[0][0][7] = 972
3947 13:44:23.340902 tx_last_pass[0][0][7] = 996
3948 13:44:23.343913 tx_win_center[0][0][8] = 973
3949 13:44:23.344085 tx_first_pass[0][0][8] = 961
3950 13:44:23.347743 tx_last_pass[0][0][8] = 985
3951 13:44:23.350876 tx_win_center[0][0][9] = 974
3952 13:44:23.354362 tx_first_pass[0][0][9] = 962
3953 13:44:23.357405 tx_last_pass[0][0][9] = 987
3954 13:44:23.357570 tx_win_center[0][0][10] = 978
3955 13:44:23.360621 tx_first_pass[0][0][10] = 967
3956 13:44:23.364015 tx_last_pass[0][0][10] = 990
3957 13:44:23.367299 tx_win_center[0][0][11] = 973
3958 13:44:23.371172 tx_first_pass[0][0][11] = 961
3959 13:44:23.371380 tx_last_pass[0][0][11] = 985
3960 13:44:23.374050 tx_win_center[0][0][12] = 973
3961 13:44:23.377645 tx_first_pass[0][0][12] = 961
3962 13:44:23.380733 tx_last_pass[0][0][12] = 986
3963 13:44:23.384423 tx_win_center[0][0][13] = 973
3964 13:44:23.384552 tx_first_pass[0][0][13] = 961
3965 13:44:23.387493 tx_last_pass[0][0][13] = 985
3966 13:44:23.391172 tx_win_center[0][0][14] = 973
3967 13:44:23.394382 tx_first_pass[0][0][14] = 961
3968 13:44:23.397378 tx_last_pass[0][0][14] = 986
3969 13:44:23.397511 tx_win_center[0][0][15] = 977
3970 13:44:23.401117 tx_first_pass[0][0][15] = 965
3971 13:44:23.404063 tx_last_pass[0][0][15] = 989
3972 13:44:23.407641 tx_win_center[0][1][0] = 989
3973 13:44:23.410655 tx_first_pass[0][1][0] = 977
3974 13:44:23.410791 tx_last_pass[0][1][0] = 1002
3975 13:44:23.414378 tx_win_center[0][1][1] = 988
3976 13:44:23.417340 tx_first_pass[0][1][1] = 977
3977 13:44:23.420888 tx_last_pass[0][1][1] = 1000
3978 13:44:23.421019 tx_win_center[0][1][2] = 988
3979 13:44:23.423900 tx_first_pass[0][1][2] = 977
3980 13:44:23.427312 tx_last_pass[0][1][2] = 1000
3981 13:44:23.430580 tx_win_center[0][1][3] = 982
3982 13:44:23.433876 tx_first_pass[0][1][3] = 970
3983 13:44:23.434076 tx_last_pass[0][1][3] = 995
3984 13:44:23.437475 tx_win_center[0][1][4] = 988
3985 13:44:23.440512 tx_first_pass[0][1][4] = 976
3986 13:44:23.444263 tx_last_pass[0][1][4] = 1000
3987 13:44:23.444444 tx_win_center[0][1][5] = 983
3988 13:44:23.447368 tx_first_pass[0][1][5] = 971
3989 13:44:23.450566 tx_last_pass[0][1][5] = 996
3990 13:44:23.454515 tx_win_center[0][1][6] = 984
3991 13:44:23.457394 tx_first_pass[0][1][6] = 971
3992 13:44:23.457614 tx_last_pass[0][1][6] = 998
3993 13:44:23.460542 tx_win_center[0][1][7] = 986
3994 13:44:23.464045 tx_first_pass[0][1][7] = 974
3995 13:44:23.467272 tx_last_pass[0][1][7] = 999
3996 13:44:23.467413 tx_win_center[0][1][8] = 977
3997 13:44:23.470843 tx_first_pass[0][1][8] = 966
3998 13:44:23.474433 tx_last_pass[0][1][8] = 989
3999 13:44:23.477333 tx_win_center[0][1][9] = 978
4000 13:44:23.480740 tx_first_pass[0][1][9] = 968
4001 13:44:23.480867 tx_last_pass[0][1][9] = 989
4002 13:44:23.483810 tx_win_center[0][1][10] = 980
4003 13:44:23.487476 tx_first_pass[0][1][10] = 969
4004 13:44:23.490487 tx_last_pass[0][1][10] = 991
4005 13:44:23.494325 tx_win_center[0][1][11] = 977
4006 13:44:23.494458 tx_first_pass[0][1][11] = 966
4007 13:44:23.497425 tx_last_pass[0][1][11] = 989
4008 13:44:23.500939 tx_win_center[0][1][12] = 978
4009 13:44:23.503861 tx_first_pass[0][1][12] = 967
4010 13:44:23.507310 tx_last_pass[0][1][12] = 990
4011 13:44:23.507526 tx_win_center[0][1][13] = 976
4012 13:44:23.510978 tx_first_pass[0][1][13] = 966
4013 13:44:23.514119 tx_last_pass[0][1][13] = 987
4014 13:44:23.517599 tx_win_center[0][1][14] = 977
4015 13:44:23.520679 tx_first_pass[0][1][14] = 966
4016 13:44:23.520833 tx_last_pass[0][1][14] = 989
4017 13:44:23.523791 tx_win_center[0][1][15] = 979
4018 13:44:23.527356 tx_first_pass[0][1][15] = 968
4019 13:44:23.530921 tx_last_pass[0][1][15] = 990
4020 13:44:23.534181 tx_win_center[1][0][0] = 988
4021 13:44:23.534388 tx_first_pass[1][0][0] = 976
4022 13:44:23.537121 tx_last_pass[1][0][0] = 1000
4023 13:44:23.540653 tx_win_center[1][0][1] = 986
4024 13:44:23.544242 tx_first_pass[1][0][1] = 974
4025 13:44:23.544324 tx_last_pass[1][0][1] = 999
4026 13:44:23.547296 tx_win_center[1][0][2] = 983
4027 13:44:23.550539 tx_first_pass[1][0][2] = 971
4028 13:44:23.554101 tx_last_pass[1][0][2] = 995
4029 13:44:23.557184 tx_win_center[1][0][3] = 981
4030 13:44:23.557285 tx_first_pass[1][0][3] = 969
4031 13:44:23.560373 tx_last_pass[1][0][3] = 993
4032 13:44:23.564112 tx_win_center[1][0][4] = 985
4033 13:44:23.567095 tx_first_pass[1][0][4] = 973
4034 13:44:23.567175 tx_last_pass[1][0][4] = 997
4035 13:44:23.570824 tx_win_center[1][0][5] = 987
4036 13:44:23.573958 tx_first_pass[1][0][5] = 975
4037 13:44:23.577129 tx_last_pass[1][0][5] = 999
4038 13:44:23.580768 tx_win_center[1][0][6] = 988
4039 13:44:23.580873 tx_first_pass[1][0][6] = 976
4040 13:44:23.583927 tx_last_pass[1][0][6] = 1000
4041 13:44:23.587377 tx_win_center[1][0][7] = 985
4042 13:44:23.590924 tx_first_pass[1][0][7] = 973
4043 13:44:23.591049 tx_last_pass[1][0][7] = 997
4044 13:44:23.593957 tx_win_center[1][0][8] = 978
4045 13:44:23.597283 tx_first_pass[1][0][8] = 966
4046 13:44:23.600291 tx_last_pass[1][0][8] = 991
4047 13:44:23.603916 tx_win_center[1][0][9] = 978
4048 13:44:23.603997 tx_first_pass[1][0][9] = 966
4049 13:44:23.606956 tx_last_pass[1][0][9] = 991
4050 13:44:23.610659 tx_win_center[1][0][10] = 979
4051 13:44:23.613692 tx_first_pass[1][0][10] = 967
4052 13:44:23.617050 tx_last_pass[1][0][10] = 991
4053 13:44:23.617124 tx_win_center[1][0][11] = 980
4054 13:44:23.620363 tx_first_pass[1][0][11] = 968
4055 13:44:23.623581 tx_last_pass[1][0][11] = 992
4056 13:44:23.627600 tx_win_center[1][0][12] = 980
4057 13:44:23.630428 tx_first_pass[1][0][12] = 968
4058 13:44:23.630593 tx_last_pass[1][0][12] = 992
4059 13:44:23.633847 tx_win_center[1][0][13] = 980
4060 13:44:23.637349 tx_first_pass[1][0][13] = 969
4061 13:44:23.640380 tx_last_pass[1][0][13] = 991
4062 13:44:23.643977 tx_win_center[1][0][14] = 979
4063 13:44:23.644081 tx_first_pass[1][0][14] = 967
4064 13:44:23.647011 tx_last_pass[1][0][14] = 991
4065 13:44:23.650682 tx_win_center[1][0][15] = 975
4066 13:44:23.653673 tx_first_pass[1][0][15] = 963
4067 13:44:23.657319 tx_last_pass[1][0][15] = 987
4068 13:44:23.657486 tx_win_center[1][1][0] = 989
4069 13:44:23.660458 tx_first_pass[1][1][0] = 977
4070 13:44:23.663501 tx_last_pass[1][1][0] = 1002
4071 13:44:23.667256 tx_win_center[1][1][1] = 987
4072 13:44:23.667353 tx_first_pass[1][1][1] = 976
4073 13:44:23.670236 tx_last_pass[1][1][1] = 999
4074 13:44:23.673751 tx_win_center[1][1][2] = 984
4075 13:44:23.676841 tx_first_pass[1][1][2] = 972
4076 13:44:23.680572 tx_last_pass[1][1][2] = 997
4077 13:44:23.680680 tx_win_center[1][1][3] = 982
4078 13:44:23.683811 tx_first_pass[1][1][3] = 970
4079 13:44:23.687331 tx_last_pass[1][1][3] = 995
4080 13:44:23.690472 tx_win_center[1][1][4] = 986
4081 13:44:23.690637 tx_first_pass[1][1][4] = 974
4082 13:44:23.694182 tx_last_pass[1][1][4] = 998
4083 13:44:23.697241 tx_win_center[1][1][5] = 988
4084 13:44:23.700661 tx_first_pass[1][1][5] = 976
4085 13:44:23.704071 tx_last_pass[1][1][5] = 1000
4086 13:44:23.704213 tx_win_center[1][1][6] = 988
4087 13:44:23.707627 tx_first_pass[1][1][6] = 976
4088 13:44:23.710439 tx_last_pass[1][1][6] = 1001
4089 13:44:23.713720 tx_win_center[1][1][7] = 986
4090 13:44:23.713877 tx_first_pass[1][1][7] = 975
4091 13:44:23.717413 tx_last_pass[1][1][7] = 997
4092 13:44:23.720599 tx_win_center[1][1][8] = 980
4093 13:44:23.723725 tx_first_pass[1][1][8] = 969
4094 13:44:23.727094 tx_last_pass[1][1][8] = 991
4095 13:44:23.727245 tx_win_center[1][1][9] = 979
4096 13:44:23.730749 tx_first_pass[1][1][9] = 968
4097 13:44:23.733839 tx_last_pass[1][1][9] = 991
4098 13:44:23.737620 tx_win_center[1][1][10] = 980
4099 13:44:23.737775 tx_first_pass[1][1][10] = 969
4100 13:44:23.740945 tx_last_pass[1][1][10] = 991
4101 13:44:23.743900 tx_win_center[1][1][11] = 981
4102 13:44:23.747529 tx_first_pass[1][1][11] = 969
4103 13:44:23.750624 tx_last_pass[1][1][11] = 993
4104 13:44:23.750741 tx_win_center[1][1][12] = 980
4105 13:44:23.753741 tx_first_pass[1][1][12] = 969
4106 13:44:23.757258 tx_last_pass[1][1][12] = 992
4107 13:44:23.760416 tx_win_center[1][1][13] = 981
4108 13:44:23.764056 tx_first_pass[1][1][13] = 970
4109 13:44:23.767300 tx_last_pass[1][1][13] = 992
4110 13:44:23.767473 tx_win_center[1][1][14] = 980
4111 13:44:23.770277 tx_first_pass[1][1][14] = 969
4112 13:44:23.774040 tx_last_pass[1][1][14] = 992
4113 13:44:23.776951 tx_win_center[1][1][15] = 977
4114 13:44:23.780603 tx_first_pass[1][1][15] = 966
4115 13:44:23.780719 tx_last_pass[1][1][15] = 989
4116 13:44:23.783687 dump params rx window
4117 13:44:23.786914 rx_firspass[0][0][0] = 9
4118 13:44:23.787063 rx_lastpass[0][0][0] = 42
4119 13:44:23.790622 rx_firspass[0][0][1] = 8
4120 13:44:23.793635 rx_lastpass[0][0][1] = 40
4121 13:44:23.793781 rx_firspass[0][0][2] = 9
4122 13:44:23.797407 rx_lastpass[0][0][2] = 39
4123 13:44:23.800524 rx_firspass[0][0][3] = -1
4124 13:44:23.804193 rx_lastpass[0][0][3] = 31
4125 13:44:23.804308 rx_firspass[0][0][4] = 7
4126 13:44:23.807473 rx_lastpass[0][0][4] = 39
4127 13:44:23.810426 rx_firspass[0][0][5] = 3
4128 13:44:23.810546 rx_lastpass[0][0][5] = 29
4129 13:44:23.813939 rx_firspass[0][0][6] = 2
4130 13:44:23.817377 rx_lastpass[0][0][6] = 32
4131 13:44:23.817499 rx_firspass[0][0][7] = 4
4132 13:44:23.820655 rx_lastpass[0][0][7] = 34
4133 13:44:23.823715 rx_firspass[0][0][8] = 2
4134 13:44:23.827094 rx_lastpass[0][0][8] = 34
4135 13:44:23.827213 rx_firspass[0][0][9] = 5
4136 13:44:23.830481 rx_lastpass[0][0][9] = 35
4137 13:44:23.833958 rx_firspass[0][0][10] = 9
4138 13:44:23.834069 rx_lastpass[0][0][10] = 38
4139 13:44:23.837030 rx_firspass[0][0][11] = 3
4140 13:44:23.840345 rx_lastpass[0][0][11] = 31
4141 13:44:23.840474 rx_firspass[0][0][12] = 5
4142 13:44:23.843735 rx_lastpass[0][0][12] = 34
4143 13:44:23.846984 rx_firspass[0][0][13] = 1
4144 13:44:23.850713 rx_lastpass[0][0][13] = 31
4145 13:44:23.850876 rx_firspass[0][0][14] = 3
4146 13:44:23.854125 rx_lastpass[0][0][14] = 33
4147 13:44:23.857215 rx_firspass[0][0][15] = 4
4148 13:44:23.860421 rx_lastpass[0][0][15] = 35
4149 13:44:23.860570 rx_firspass[0][1][0] = 8
4150 13:44:23.863790 rx_lastpass[0][1][0] = 43
4151 13:44:23.867456 rx_firspass[0][1][1] = 7
4152 13:44:23.867562 rx_lastpass[0][1][1] = 42
4153 13:44:23.870659 rx_firspass[0][1][2] = 7
4154 13:44:23.873717 rx_lastpass[0][1][2] = 42
4155 13:44:23.873821 rx_firspass[0][1][3] = -2
4156 13:44:23.877339 rx_lastpass[0][1][3] = 33
4157 13:44:23.880493 rx_firspass[0][1][4] = 5
4158 13:44:23.883948 rx_lastpass[0][1][4] = 40
4159 13:44:23.884052 rx_firspass[0][1][5] = 1
4160 13:44:23.887141 rx_lastpass[0][1][5] = 34
4161 13:44:23.890753 rx_firspass[0][1][6] = 2
4162 13:44:23.890858 rx_lastpass[0][1][6] = 35
4163 13:44:23.893864 rx_firspass[0][1][7] = 2
4164 13:44:23.897759 rx_lastpass[0][1][7] = 36
4165 13:44:23.897871 rx_firspass[0][1][8] = 0
4166 13:44:23.900823 rx_lastpass[0][1][8] = 36
4167 13:44:23.903789 rx_firspass[0][1][9] = 1
4168 13:44:23.907601 rx_lastpass[0][1][9] = 37
4169 13:44:23.907700 rx_firspass[0][1][10] = 6
4170 13:44:23.910609 rx_lastpass[0][1][10] = 41
4171 13:44:23.914076 rx_firspass[0][1][11] = 1
4172 13:44:23.914181 rx_lastpass[0][1][11] = 33
4173 13:44:23.917363 rx_firspass[0][1][12] = 1
4174 13:44:23.920439 rx_lastpass[0][1][12] = 36
4175 13:44:23.924132 rx_firspass[0][1][13] = -1
4176 13:44:23.924248 rx_lastpass[0][1][13] = 34
4177 13:44:23.927670 rx_firspass[0][1][14] = 1
4178 13:44:23.930680 rx_lastpass[0][1][14] = 36
4179 13:44:23.933608 rx_firspass[0][1][15] = 3
4180 13:44:23.933725 rx_lastpass[0][1][15] = 38
4181 13:44:23.937128 rx_firspass[1][0][0] = 8
4182 13:44:23.940450 rx_lastpass[1][0][0] = 40
4183 13:44:23.940599 rx_firspass[1][0][1] = 6
4184 13:44:23.944108 rx_lastpass[1][0][1] = 38
4185 13:44:23.947008 rx_firspass[1][0][2] = 0
4186 13:44:23.947120 rx_lastpass[1][0][2] = 32
4187 13:44:23.950742 rx_firspass[1][0][3] = 0
4188 13:44:23.954145 rx_lastpass[1][0][3] = 31
4189 13:44:23.956943 rx_firspass[1][0][4] = 4
4190 13:44:23.957054 rx_lastpass[1][0][4] = 33
4191 13:44:23.960612 rx_firspass[1][0][5] = 9
4192 13:44:23.964023 rx_lastpass[1][0][5] = 38
4193 13:44:23.964167 rx_firspass[1][0][6] = 10
4194 13:44:23.967076 rx_lastpass[1][0][6] = 40
4195 13:44:23.970543 rx_firspass[1][0][7] = 5
4196 13:44:23.970731 rx_lastpass[1][0][7] = 33
4197 13:44:23.973696 rx_firspass[1][0][8] = 3
4198 13:44:23.976953 rx_lastpass[1][0][8] = 35
4199 13:44:23.980784 rx_firspass[1][0][9] = 4
4200 13:44:23.980982 rx_lastpass[1][0][9] = 35
4201 13:44:23.983871 rx_firspass[1][0][10] = 2
4202 13:44:23.987342 rx_lastpass[1][0][10] = 34
4203 13:44:23.987518 rx_firspass[1][0][11] = 4
4204 13:44:23.990709 rx_lastpass[1][0][11] = 34
4205 13:44:23.994115 rx_firspass[1][0][12] = 5
4206 13:44:23.997317 rx_lastpass[1][0][12] = 35
4207 13:44:23.997488 rx_firspass[1][0][13] = 5
4208 13:44:24.000395 rx_lastpass[1][0][13] = 32
4209 13:44:24.004205 rx_firspass[1][0][14] = 3
4210 13:44:24.007356 rx_lastpass[1][0][14] = 34
4211 13:44:24.007675 rx_firspass[1][0][15] = 1
4212 13:44:24.010583 rx_lastpass[1][0][15] = 32
4213 13:44:24.014218 rx_firspass[1][1][0] = 7
4214 13:44:24.014517 rx_lastpass[1][1][0] = 42
4215 13:44:24.017309 rx_firspass[1][1][1] = 5
4216 13:44:24.020885 rx_lastpass[1][1][1] = 40
4217 13:44:24.021265 rx_firspass[1][1][2] = 0
4218 13:44:24.024169 rx_lastpass[1][1][2] = 35
4219 13:44:24.027289 rx_firspass[1][1][3] = -2
4220 13:44:24.030953 rx_lastpass[1][1][3] = 33
4221 13:44:24.031338 rx_firspass[1][1][4] = 1
4222 13:44:24.033818 rx_lastpass[1][1][4] = 36
4223 13:44:24.037254 rx_firspass[1][1][5] = 5
4224 13:44:24.037645 rx_lastpass[1][1][5] = 41
4225 13:44:24.040767 rx_firspass[1][1][6] = 7
4226 13:44:24.043853 rx_lastpass[1][1][6] = 42
4227 13:44:24.044259 rx_firspass[1][1][7] = 1
4228 13:44:24.047554 rx_lastpass[1][1][7] = 36
4229 13:44:24.051017 rx_firspass[1][1][8] = 2
4230 13:44:24.054140 rx_lastpass[1][1][8] = 37
4231 13:44:24.054525 rx_firspass[1][1][9] = 2
4232 13:44:24.057699 rx_lastpass[1][1][9] = 37
4233 13:44:24.060640 rx_firspass[1][1][10] = 2
4234 13:44:24.061028 rx_lastpass[1][1][10] = 36
4235 13:44:24.064325 rx_firspass[1][1][11] = 3
4236 13:44:24.067642 rx_lastpass[1][1][11] = 38
4237 13:44:24.070472 rx_firspass[1][1][12] = 4
4238 13:44:24.071099 rx_lastpass[1][1][12] = 39
4239 13:44:24.074317 rx_firspass[1][1][13] = 3
4240 13:44:24.077515 rx_lastpass[1][1][13] = 36
4241 13:44:24.077878 rx_firspass[1][1][14] = 3
4242 13:44:24.080413 rx_lastpass[1][1][14] = 36
4243 13:44:24.084074 rx_firspass[1][1][15] = 0
4244 13:44:24.087166 rx_lastpass[1][1][15] = 34
4245 13:44:24.087518 dump params clk_delay
4246 13:44:24.090645 clk_delay[0] = -1
4247 13:44:24.091032 clk_delay[1] = 0
4248 13:44:24.093811 dump params dqs_delay
4249 13:44:24.094210 dqs_delay[0][0] = 0
4250 13:44:24.097434 dqs_delay[0][1] = -1
4251 13:44:24.100264 dqs_delay[1][0] = -1
4252 13:44:24.100552 dqs_delay[1][1] = 0
4253 13:44:24.104007 dump params delay_cell_unit = 762
4254 13:44:24.104220 dump source = 0x0
4255 13:44:24.107172 dump params frequency:1200
4256 13:44:24.110439 dump params rank number:2
4257 13:44:24.110650
4258 13:44:24.114051 dump params write leveling
4259 13:44:24.114266 write leveling[0][0][0] = 0x0
4260 13:44:24.117026 write leveling[0][0][1] = 0x0
4261 13:44:24.120884 write leveling[0][1][0] = 0x0
4262 13:44:24.123670 write leveling[0][1][1] = 0x0
4263 13:44:24.127245 write leveling[1][0][0] = 0x0
4264 13:44:24.127453 write leveling[1][0][1] = 0x0
4265 13:44:24.130455 write leveling[1][1][0] = 0x0
4266 13:44:24.134158 write leveling[1][1][1] = 0x0
4267 13:44:24.137197 dump params cbt_cs
4268 13:44:24.137410 cbt_cs[0][0] = 0x0
4269 13:44:24.140802 cbt_cs[0][1] = 0x0
4270 13:44:24.141015 cbt_cs[1][0] = 0x0
4271 13:44:24.143752 cbt_cs[1][1] = 0x0
4272 13:44:24.143964 dump params cbt_mr12
4273 13:44:24.147027 cbt_mr12[0][0] = 0x0
4274 13:44:24.147238 cbt_mr12[0][1] = 0x0
4275 13:44:24.150499 cbt_mr12[1][0] = 0x0
4276 13:44:24.153633 cbt_mr12[1][1] = 0x0
4277 13:44:24.153841 dump params tx window
4278 13:44:24.157494 tx_center_min[0][0][0] = 0
4279 13:44:24.160614 tx_center_max[0][0][0] = 0
4280 13:44:24.160841 tx_center_min[0][0][1] = 0
4281 13:44:24.163553 tx_center_max[0][0][1] = 0
4282 13:44:24.166995 tx_center_min[0][1][0] = 0
4283 13:44:24.170304 tx_center_max[0][1][0] = 0
4284 13:44:24.170511 tx_center_min[0][1][1] = 0
4285 13:44:24.173522 tx_center_max[0][1][1] = 0
4286 13:44:24.177060 tx_center_min[1][0][0] = 0
4287 13:44:24.177384 tx_center_max[1][0][0] = 0
4288 13:44:24.180327 tx_center_min[1][0][1] = 0
4289 13:44:24.183504 tx_center_max[1][0][1] = 0
4290 13:44:24.187180 tx_center_min[1][1][0] = 0
4291 13:44:24.187386 tx_center_max[1][1][0] = 0
4292 13:44:24.190327 tx_center_min[1][1][1] = 0
4293 13:44:24.193613 tx_center_max[1][1][1] = 0
4294 13:44:24.193817 dump params tx window
4295 13:44:24.196984 tx_win_center[0][0][0] = 0
4296 13:44:24.200394 tx_first_pass[0][0][0] = 0
4297 13:44:24.203724 tx_last_pass[0][0][0] = 0
4298 13:44:24.204012 tx_win_center[0][0][1] = 0
4299 13:44:24.207238 tx_first_pass[0][0][1] = 0
4300 13:44:24.210283 tx_last_pass[0][0][1] = 0
4301 13:44:24.214081 tx_win_center[0][0][2] = 0
4302 13:44:24.214286 tx_first_pass[0][0][2] = 0
4303 13:44:24.217083 tx_last_pass[0][0][2] = 0
4304 13:44:24.220761 tx_win_center[0][0][3] = 0
4305 13:44:24.220965 tx_first_pass[0][0][3] = 0
4306 13:44:24.223802 tx_last_pass[0][0][3] = 0
4307 13:44:24.226880 tx_win_center[0][0][4] = 0
4308 13:44:24.230368 tx_first_pass[0][0][4] = 0
4309 13:44:24.230640 tx_last_pass[0][0][4] = 0
4310 13:44:24.233474 tx_win_center[0][0][5] = 0
4311 13:44:24.237378 tx_first_pass[0][0][5] = 0
4312 13:44:24.240412 tx_last_pass[0][0][5] = 0
4313 13:44:24.240626 tx_win_center[0][0][6] = 0
4314 13:44:24.244010 tx_first_pass[0][0][6] = 0
4315 13:44:24.247571 tx_last_pass[0][0][6] = 0
4316 13:44:24.247778 tx_win_center[0][0][7] = 0
4317 13:44:24.250519 tx_first_pass[0][0][7] = 0
4318 13:44:24.253566 tx_last_pass[0][0][7] = 0
4319 13:44:24.257154 tx_win_center[0][0][8] = 0
4320 13:44:24.257367 tx_first_pass[0][0][8] = 0
4321 13:44:24.260201 tx_last_pass[0][0][8] = 0
4322 13:44:24.263961 tx_win_center[0][0][9] = 0
4323 13:44:24.264232 tx_first_pass[0][0][9] = 0
4324 13:44:24.267089 tx_last_pass[0][0][9] = 0
4325 13:44:24.270862 tx_win_center[0][0][10] = 0
4326 13:44:24.273853 tx_first_pass[0][0][10] = 0
4327 13:44:24.274061 tx_last_pass[0][0][10] = 0
4328 13:44:24.277455 tx_win_center[0][0][11] = 0
4329 13:44:24.280444 tx_first_pass[0][0][11] = 0
4330 13:44:24.283938 tx_last_pass[0][0][11] = 0
4331 13:44:24.284145 tx_win_center[0][0][12] = 0
4332 13:44:24.287070 tx_first_pass[0][0][12] = 0
4333 13:44:24.290270 tx_last_pass[0][0][12] = 0
4334 13:44:24.293695 tx_win_center[0][0][13] = 0
4335 13:44:24.293904 tx_first_pass[0][0][13] = 0
4336 13:44:24.296862 tx_last_pass[0][0][13] = 0
4337 13:44:24.300374 tx_win_center[0][0][14] = 0
4338 13:44:24.303939 tx_first_pass[0][0][14] = 0
4339 13:44:24.304483 tx_last_pass[0][0][14] = 0
4340 13:44:24.307397 tx_win_center[0][0][15] = 0
4341 13:44:24.310906 tx_first_pass[0][0][15] = 0
4342 13:44:24.314186 tx_last_pass[0][0][15] = 0
4343 13:44:24.314599 tx_win_center[0][1][0] = 0
4344 13:44:24.317532 tx_first_pass[0][1][0] = 0
4345 13:44:24.320536 tx_last_pass[0][1][0] = 0
4346 13:44:24.323623 tx_win_center[0][1][1] = 0
4347 13:44:24.324152 tx_first_pass[0][1][1] = 0
4348 13:44:24.327321 tx_last_pass[0][1][1] = 0
4349 13:44:24.330307 tx_win_center[0][1][2] = 0
4350 13:44:24.333888 tx_first_pass[0][1][2] = 0
4351 13:44:24.334329 tx_last_pass[0][1][2] = 0
4352 13:44:24.337296 tx_win_center[0][1][3] = 0
4353 13:44:24.340891 tx_first_pass[0][1][3] = 0
4354 13:44:24.341431 tx_last_pass[0][1][3] = 0
4355 13:44:24.344204 tx_win_center[0][1][4] = 0
4356 13:44:24.346936 tx_first_pass[0][1][4] = 0
4357 13:44:24.350658 tx_last_pass[0][1][4] = 0
4358 13:44:24.351009 tx_win_center[0][1][5] = 0
4359 13:44:24.353474 tx_first_pass[0][1][5] = 0
4360 13:44:24.357086 tx_last_pass[0][1][5] = 0
4361 13:44:24.357309 tx_win_center[0][1][6] = 0
4362 13:44:24.360485 tx_first_pass[0][1][6] = 0
4363 13:44:24.363923 tx_last_pass[0][1][6] = 0
4364 13:44:24.366958 tx_win_center[0][1][7] = 0
4365 13:44:24.367222 tx_first_pass[0][1][7] = 0
4366 13:44:24.370113 tx_last_pass[0][1][7] = 0
4367 13:44:24.373281 tx_win_center[0][1][8] = 0
4368 13:44:24.377039 tx_first_pass[0][1][8] = 0
4369 13:44:24.377336 tx_last_pass[0][1][8] = 0
4370 13:44:24.380299 tx_win_center[0][1][9] = 0
4371 13:44:24.383823 tx_first_pass[0][1][9] = 0
4372 13:44:24.383989 tx_last_pass[0][1][9] = 0
4373 13:44:24.386713 tx_win_center[0][1][10] = 0
4374 13:44:24.390622 tx_first_pass[0][1][10] = 0
4375 13:44:24.393400 tx_last_pass[0][1][10] = 0
4376 13:44:24.393681 tx_win_center[0][1][11] = 0
4377 13:44:24.396750 tx_first_pass[0][1][11] = 0
4378 13:44:24.400319 tx_last_pass[0][1][11] = 0
4379 13:44:24.403734 tx_win_center[0][1][12] = 0
4380 13:44:24.403907 tx_first_pass[0][1][12] = 0
4381 13:44:24.406635 tx_last_pass[0][1][12] = 0
4382 13:44:24.410077 tx_win_center[0][1][13] = 0
4383 13:44:24.413848 tx_first_pass[0][1][13] = 0
4384 13:44:24.414015 tx_last_pass[0][1][13] = 0
4385 13:44:24.416645 tx_win_center[0][1][14] = 0
4386 13:44:24.420179 tx_first_pass[0][1][14] = 0
4387 13:44:24.423472 tx_last_pass[0][1][14] = 0
4388 13:44:24.423714 tx_win_center[0][1][15] = 0
4389 13:44:24.426884 tx_first_pass[0][1][15] = 0
4390 13:44:24.429990 tx_last_pass[0][1][15] = 0
4391 13:44:24.433782 tx_win_center[1][0][0] = 0
4392 13:44:24.433947 tx_first_pass[1][0][0] = 0
4393 13:44:24.436759 tx_last_pass[1][0][0] = 0
4394 13:44:24.439966 tx_win_center[1][0][1] = 0
4395 13:44:24.443625 tx_first_pass[1][0][1] = 0
4396 13:44:24.443803 tx_last_pass[1][0][1] = 0
4397 13:44:24.446609 tx_win_center[1][0][2] = 0
4398 13:44:24.450281 tx_first_pass[1][0][2] = 0
4399 13:44:24.453349 tx_last_pass[1][0][2] = 0
4400 13:44:24.453567 tx_win_center[1][0][3] = 0
4401 13:44:24.456931 tx_first_pass[1][0][3] = 0
4402 13:44:24.460618 tx_last_pass[1][0][3] = 0
4403 13:44:24.460789 tx_win_center[1][0][4] = 0
4404 13:44:24.463677 tx_first_pass[1][0][4] = 0
4405 13:44:24.466812 tx_last_pass[1][0][4] = 0
4406 13:44:24.470600 tx_win_center[1][0][5] = 0
4407 13:44:24.470766 tx_first_pass[1][0][5] = 0
4408 13:44:24.473721 tx_last_pass[1][0][5] = 0
4409 13:44:24.476850 tx_win_center[1][0][6] = 0
4410 13:44:24.477016 tx_first_pass[1][0][6] = 0
4411 13:44:24.480519 tx_last_pass[1][0][6] = 0
4412 13:44:24.483532 tx_win_center[1][0][7] = 0
4413 13:44:24.486416 tx_first_pass[1][0][7] = 0
4414 13:44:24.486587 tx_last_pass[1][0][7] = 0
4415 13:44:24.490112 tx_win_center[1][0][8] = 0
4416 13:44:24.493333 tx_first_pass[1][0][8] = 0
4417 13:44:24.497003 tx_last_pass[1][0][8] = 0
4418 13:44:24.497181 tx_win_center[1][0][9] = 0
4419 13:44:24.500036 tx_first_pass[1][0][9] = 0
4420 13:44:24.503196 tx_last_pass[1][0][9] = 0
4421 13:44:24.503363 tx_win_center[1][0][10] = 0
4422 13:44:24.506543 tx_first_pass[1][0][10] = 0
4423 13:44:24.510122 tx_last_pass[1][0][10] = 0
4424 13:44:24.513544 tx_win_center[1][0][11] = 0
4425 13:44:24.513709 tx_first_pass[1][0][11] = 0
4426 13:44:24.516755 tx_last_pass[1][0][11] = 0
4427 13:44:24.520348 tx_win_center[1][0][12] = 0
4428 13:44:24.523757 tx_first_pass[1][0][12] = 0
4429 13:44:24.524028 tx_last_pass[1][0][12] = 0
4430 13:44:24.526606 tx_win_center[1][0][13] = 0
4431 13:44:24.530175 tx_first_pass[1][0][13] = 0
4432 13:44:24.533444 tx_last_pass[1][0][13] = 0
4433 13:44:24.533612 tx_win_center[1][0][14] = 0
4434 13:44:24.537193 tx_first_pass[1][0][14] = 0
4435 13:44:24.540189 tx_last_pass[1][0][14] = 0
4436 13:44:24.543894 tx_win_center[1][0][15] = 0
4437 13:44:24.544185 tx_first_pass[1][0][15] = 0
4438 13:44:24.547265 tx_last_pass[1][0][15] = 0
4439 13:44:24.550223 tx_win_center[1][1][0] = 0
4440 13:44:24.553773 tx_first_pass[1][1][0] = 0
4441 13:44:24.553950 tx_last_pass[1][1][0] = 0
4442 13:44:24.557395 tx_win_center[1][1][1] = 0
4443 13:44:24.560419 tx_first_pass[1][1][1] = 0
4444 13:44:24.560588 tx_last_pass[1][1][1] = 0
4445 13:44:24.564001 tx_win_center[1][1][2] = 0
4446 13:44:24.567028 tx_first_pass[1][1][2] = 0
4447 13:44:24.570688 tx_last_pass[1][1][2] = 0
4448 13:44:24.570859 tx_win_center[1][1][3] = 0
4449 13:44:24.573697 tx_first_pass[1][1][3] = 0
4450 13:44:24.576909 tx_last_pass[1][1][3] = 0
4451 13:44:24.579934 tx_win_center[1][1][4] = 0
4452 13:44:24.580106 tx_first_pass[1][1][4] = 0
4453 13:44:24.583765 tx_last_pass[1][1][4] = 0
4454 13:44:24.586699 tx_win_center[1][1][5] = 0
4455 13:44:24.586918 tx_first_pass[1][1][5] = 0
4456 13:44:24.590425 tx_last_pass[1][1][5] = 0
4457 13:44:24.593853 tx_win_center[1][1][6] = 0
4458 13:44:24.597048 tx_first_pass[1][1][6] = 0
4459 13:44:24.597247 tx_last_pass[1][1][6] = 0
4460 13:44:24.600303 tx_win_center[1][1][7] = 0
4461 13:44:24.603910 tx_first_pass[1][1][7] = 0
4462 13:44:24.606800 tx_last_pass[1][1][7] = 0
4463 13:44:24.606985 tx_win_center[1][1][8] = 0
4464 13:44:24.609806 tx_first_pass[1][1][8] = 0
4465 13:44:24.613308 tx_last_pass[1][1][8] = 0
4466 13:44:24.613487 tx_win_center[1][1][9] = 0
4467 13:44:24.616573 tx_first_pass[1][1][9] = 0
4468 13:44:24.620057 tx_last_pass[1][1][9] = 0
4469 13:44:24.623574 tx_win_center[1][1][10] = 0
4470 13:44:24.623722 tx_first_pass[1][1][10] = 0
4471 13:44:24.627256 tx_last_pass[1][1][10] = 0
4472 13:44:24.630278 tx_win_center[1][1][11] = 0
4473 13:44:24.633531 tx_first_pass[1][1][11] = 0
4474 13:44:24.633671 tx_last_pass[1][1][11] = 0
4475 13:44:24.636886 tx_win_center[1][1][12] = 0
4476 13:44:24.640364 tx_first_pass[1][1][12] = 0
4477 13:44:24.643832 tx_last_pass[1][1][12] = 0
4478 13:44:24.644018 tx_win_center[1][1][13] = 0
4479 13:44:24.647133 tx_first_pass[1][1][13] = 0
4480 13:44:24.650407 tx_last_pass[1][1][13] = 0
4481 13:44:24.653988 tx_win_center[1][1][14] = 0
4482 13:44:24.654127 tx_first_pass[1][1][14] = 0
4483 13:44:24.656964 tx_last_pass[1][1][14] = 0
4484 13:44:24.660478 tx_win_center[1][1][15] = 0
4485 13:44:24.663671 tx_first_pass[1][1][15] = 0
4486 13:44:24.663815 tx_last_pass[1][1][15] = 0
4487 13:44:24.667294 dump params rx window
4488 13:44:24.670279 rx_firspass[0][0][0] = 0
4489 13:44:24.670416 rx_lastpass[0][0][0] = 0
4490 13:44:24.673387 rx_firspass[0][0][1] = 0
4491 13:44:24.677096 rx_lastpass[0][0][1] = 0
4492 13:44:24.677255 rx_firspass[0][0][2] = 0
4493 13:44:24.680232 rx_lastpass[0][0][2] = 0
4494 13:44:24.683409 rx_firspass[0][0][3] = 0
4495 13:44:24.683555 rx_lastpass[0][0][3] = 0
4496 13:44:24.687061 rx_firspass[0][0][4] = 0
4497 13:44:24.690222 rx_lastpass[0][0][4] = 0
4498 13:44:24.690367 rx_firspass[0][0][5] = 0
4499 13:44:24.693968 rx_lastpass[0][0][5] = 0
4500 13:44:24.696757 rx_firspass[0][0][6] = 0
4501 13:44:24.700623 rx_lastpass[0][0][6] = 0
4502 13:44:24.700826 rx_firspass[0][0][7] = 0
4503 13:44:24.703832 rx_lastpass[0][0][7] = 0
4504 13:44:24.707455 rx_firspass[0][0][8] = 0
4505 13:44:24.707674 rx_lastpass[0][0][8] = 0
4506 13:44:24.710387 rx_firspass[0][0][9] = 0
4507 13:44:24.713532 rx_lastpass[0][0][9] = 0
4508 13:44:24.713728 rx_firspass[0][0][10] = 0
4509 13:44:24.717021 rx_lastpass[0][0][10] = 0
4510 13:44:24.720529 rx_firspass[0][0][11] = 0
4511 13:44:24.720716 rx_lastpass[0][0][11] = 0
4512 13:44:24.724000 rx_firspass[0][0][12] = 0
4513 13:44:24.727109 rx_lastpass[0][0][12] = 0
4514 13:44:24.730569 rx_firspass[0][0][13] = 0
4515 13:44:24.730751 rx_lastpass[0][0][13] = 0
4516 13:44:24.733794 rx_firspass[0][0][14] = 0
4517 13:44:24.737367 rx_lastpass[0][0][14] = 0
4518 13:44:24.737828 rx_firspass[0][0][15] = 0
4519 13:44:24.740529 rx_lastpass[0][0][15] = 0
4520 13:44:24.743932 rx_firspass[0][1][0] = 0
4521 13:44:24.747253 rx_lastpass[0][1][0] = 0
4522 13:44:24.747732 rx_firspass[0][1][1] = 0
4523 13:44:24.750763 rx_lastpass[0][1][1] = 0
4524 13:44:24.753970 rx_firspass[0][1][2] = 0
4525 13:44:24.754490 rx_lastpass[0][1][2] = 0
4526 13:44:24.757243 rx_firspass[0][1][3] = 0
4527 13:44:24.760250 rx_lastpass[0][1][3] = 0
4528 13:44:24.760731 rx_firspass[0][1][4] = 0
4529 13:44:24.763873 rx_lastpass[0][1][4] = 0
4530 13:44:24.766907 rx_firspass[0][1][5] = 0
4531 13:44:24.767241 rx_lastpass[0][1][5] = 0
4532 13:44:24.770572 rx_firspass[0][1][6] = 0
4533 13:44:24.773776 rx_lastpass[0][1][6] = 0
4534 13:44:24.773995 rx_firspass[0][1][7] = 0
4535 13:44:24.777114 rx_lastpass[0][1][7] = 0
4536 13:44:24.780302 rx_firspass[0][1][8] = 0
4537 13:44:24.780482 rx_lastpass[0][1][8] = 0
4538 13:44:24.783831 rx_firspass[0][1][9] = 0
4539 13:44:24.786795 rx_lastpass[0][1][9] = 0
4540 13:44:24.789986 rx_firspass[0][1][10] = 0
4541 13:44:24.790148 rx_lastpass[0][1][10] = 0
4542 13:44:24.793640 rx_firspass[0][1][11] = 0
4543 13:44:24.796711 rx_lastpass[0][1][11] = 0
4544 13:44:24.796838 rx_firspass[0][1][12] = 0
4545 13:44:24.800262 rx_lastpass[0][1][12] = 0
4546 13:44:24.803341 rx_firspass[0][1][13] = 0
4547 13:44:24.807090 rx_lastpass[0][1][13] = 0
4548 13:44:24.807228 rx_firspass[0][1][14] = 0
4549 13:44:24.810263 rx_lastpass[0][1][14] = 0
4550 13:44:24.813399 rx_firspass[0][1][15] = 0
4551 13:44:24.813537 rx_lastpass[0][1][15] = 0
4552 13:44:24.817298 rx_firspass[1][0][0] = 0
4553 13:44:24.820080 rx_lastpass[1][0][0] = 0
4554 13:44:24.820206 rx_firspass[1][0][1] = 0
4555 13:44:24.824227 rx_lastpass[1][0][1] = 0
4556 13:44:24.827537 rx_firspass[1][0][2] = 0
4557 13:44:24.827996 rx_lastpass[1][0][2] = 0
4558 13:44:24.831167 rx_firspass[1][0][3] = 0
4559 13:44:24.833787 rx_lastpass[1][0][3] = 0
4560 13:44:24.837252 rx_firspass[1][0][4] = 0
4561 13:44:24.837898 rx_lastpass[1][0][4] = 0
4562 13:44:24.840381 rx_firspass[1][0][5] = 0
4563 13:44:24.844132 rx_lastpass[1][0][5] = 0
4564 13:44:24.844578 rx_firspass[1][0][6] = 0
4565 13:44:24.847215 rx_lastpass[1][0][6] = 0
4566 13:44:24.850786 rx_firspass[1][0][7] = 0
4567 13:44:24.851458 rx_lastpass[1][0][7] = 0
4568 13:44:24.853603 rx_firspass[1][0][8] = 0
4569 13:44:24.856803 rx_lastpass[1][0][8] = 0
4570 13:44:24.857527 rx_firspass[1][0][9] = 0
4571 13:44:24.860052 rx_lastpass[1][0][9] = 0
4572 13:44:24.863790 rx_firspass[1][0][10] = 0
4573 13:44:24.867020 rx_lastpass[1][0][10] = 0
4574 13:44:24.867300 rx_firspass[1][0][11] = 0
4575 13:44:24.870045 rx_lastpass[1][0][11] = 0
4576 13:44:24.873365 rx_firspass[1][0][12] = 0
4577 13:44:24.873539 rx_lastpass[1][0][12] = 0
4578 13:44:24.876723 rx_firspass[1][0][13] = 0
4579 13:44:24.879962 rx_lastpass[1][0][13] = 0
4580 13:44:24.883461 rx_firspass[1][0][14] = 0
4581 13:44:24.883580 rx_lastpass[1][0][14] = 0
4582 13:44:24.886429 rx_firspass[1][0][15] = 0
4583 13:44:24.890026 rx_lastpass[1][0][15] = 0
4584 13:44:24.890208 rx_firspass[1][1][0] = 0
4585 13:44:24.893028 rx_lastpass[1][1][0] = 0
4586 13:44:24.896762 rx_firspass[1][1][1] = 0
4587 13:44:24.896886 rx_lastpass[1][1][1] = 0
4588 13:44:24.899920 rx_firspass[1][1][2] = 0
4589 13:44:24.903576 rx_lastpass[1][1][2] = 0
4590 13:44:24.903653 rx_firspass[1][1][3] = 0
4591 13:44:24.906501 rx_lastpass[1][1][3] = 0
4592 13:44:24.910533 rx_firspass[1][1][4] = 0
4593 13:44:24.913571 rx_lastpass[1][1][4] = 0
4594 13:44:24.914081 rx_firspass[1][1][5] = 0
4595 13:44:24.916548 rx_lastpass[1][1][5] = 0
4596 13:44:24.920431 rx_firspass[1][1][6] = 0
4597 13:44:24.920901 rx_lastpass[1][1][6] = 0
4598 13:44:24.923500 rx_firspass[1][1][7] = 0
4599 13:44:24.927193 rx_lastpass[1][1][7] = 0
4600 13:44:24.927541 rx_firspass[1][1][8] = 0
4601 13:44:24.930090 rx_lastpass[1][1][8] = 0
4602 13:44:24.933134 rx_firspass[1][1][9] = 0
4603 13:44:24.933508 rx_lastpass[1][1][9] = 0
4604 13:44:24.936826 rx_firspass[1][1][10] = 0
4605 13:44:24.939869 rx_lastpass[1][1][10] = 0
4606 13:44:24.943467 rx_firspass[1][1][11] = 0
4607 13:44:24.943607 rx_lastpass[1][1][11] = 0
4608 13:44:24.946566 rx_firspass[1][1][12] = 0
4609 13:44:24.950207 rx_lastpass[1][1][12] = 0
4610 13:44:24.950329 rx_firspass[1][1][13] = 0
4611 13:44:24.953179 rx_lastpass[1][1][13] = 0
4612 13:44:24.956451 rx_firspass[1][1][14] = 0
4613 13:44:24.960027 rx_lastpass[1][1][14] = 0
4614 13:44:24.960189 rx_firspass[1][1][15] = 0
4615 13:44:24.963266 rx_lastpass[1][1][15] = 0
4616 13:44:24.966128 dump params clk_delay
4617 13:44:24.966310 clk_delay[0] = 0
4618 13:44:24.969877 clk_delay[1] = 0
4619 13:44:24.969985 dump params dqs_delay
4620 13:44:24.973317 dqs_delay[0][0] = 0
4621 13:44:24.973421 dqs_delay[0][1] = 0
4622 13:44:24.976326 dqs_delay[1][0] = 0
4623 13:44:24.976431 dqs_delay[1][1] = 0
4624 13:44:24.979915 dump params delay_cell_unit = 762
4625 13:44:24.983205 dump source = 0x0
4626 13:44:24.983352 dump params frequency:800
4627 13:44:24.987010 dump params rank number:2
4628 13:44:24.987143
4629 13:44:24.989685 dump params write leveling
4630 13:44:24.993118 write leveling[0][0][0] = 0x0
4631 13:44:24.993317 write leveling[0][0][1] = 0x0
4632 13:44:24.996415 write leveling[0][1][0] = 0x0
4633 13:44:25.000078 write leveling[0][1][1] = 0x0
4634 13:44:25.003134 write leveling[1][0][0] = 0x0
4635 13:44:25.006755 write leveling[1][0][1] = 0x0
4636 13:44:25.006903 write leveling[1][1][0] = 0x0
4637 13:44:25.009844 write leveling[1][1][1] = 0x0
4638 13:44:25.013781 dump params cbt_cs
4639 13:44:25.014253 cbt_cs[0][0] = 0x0
4640 13:44:25.017008 cbt_cs[0][1] = 0x0
4641 13:44:25.017620 cbt_cs[1][0] = 0x0
4642 13:44:25.020203 cbt_cs[1][1] = 0x0
4643 13:44:25.020858 dump params cbt_mr12
4644 13:44:25.023966 cbt_mr12[0][0] = 0x0
4645 13:44:25.027094 cbt_mr12[0][1] = 0x0
4646 13:44:25.027713 cbt_mr12[1][0] = 0x0
4647 13:44:25.030156 cbt_mr12[1][1] = 0x0
4648 13:44:25.030812 dump params tx window
4649 13:44:25.033308 tx_center_min[0][0][0] = 0
4650 13:44:25.036998 tx_center_max[0][0][0] = 0
4651 13:44:25.037612 tx_center_min[0][0][1] = 0
4652 13:44:25.039992 tx_center_max[0][0][1] = 0
4653 13:44:25.043121 tx_center_min[0][1][0] = 0
4654 13:44:25.046716 tx_center_max[0][1][0] = 0
4655 13:44:25.046927 tx_center_min[0][1][1] = 0
4656 13:44:25.049919 tx_center_max[0][1][1] = 0
4657 13:44:25.053311 tx_center_min[1][0][0] = 0
4658 13:44:25.056467 tx_center_max[1][0][0] = 0
4659 13:44:25.056658 tx_center_min[1][0][1] = 0
4660 13:44:25.059951 tx_center_max[1][0][1] = 0
4661 13:44:25.063413 tx_center_min[1][1][0] = 0
4662 13:44:25.066730 tx_center_max[1][1][0] = 0
4663 13:44:25.066837 tx_center_min[1][1][1] = 0
4664 13:44:25.069698 tx_center_max[1][1][1] = 0
4665 13:44:25.072996 dump params tx window
4666 13:44:25.073089 tx_win_center[0][0][0] = 0
4667 13:44:25.076657 tx_first_pass[0][0][0] = 0
4668 13:44:25.079353 tx_last_pass[0][0][0] = 0
4669 13:44:25.082825 tx_win_center[0][0][1] = 0
4670 13:44:25.082959 tx_first_pass[0][0][1] = 0
4671 13:44:25.086316 tx_last_pass[0][0][1] = 0
4672 13:44:25.089185 tx_win_center[0][0][2] = 0
4673 13:44:25.092904 tx_first_pass[0][0][2] = 0
4674 13:44:25.093395 tx_last_pass[0][0][2] = 0
4675 13:44:25.096246 tx_win_center[0][0][3] = 0
4676 13:44:25.099728 tx_first_pass[0][0][3] = 0
4677 13:44:25.100368 tx_last_pass[0][0][3] = 0
4678 13:44:25.103002 tx_win_center[0][0][4] = 0
4679 13:44:25.106435 tx_first_pass[0][0][4] = 0
4680 13:44:25.109615 tx_last_pass[0][0][4] = 0
4681 13:44:25.110140 tx_win_center[0][0][5] = 0
4682 13:44:25.112956 tx_first_pass[0][0][5] = 0
4683 13:44:25.116347 tx_last_pass[0][0][5] = 0
4684 13:44:25.120116 tx_win_center[0][0][6] = 0
4685 13:44:25.120507 tx_first_pass[0][0][6] = 0
4686 13:44:25.123081 tx_last_pass[0][0][6] = 0
4687 13:44:25.126177 tx_win_center[0][0][7] = 0
4688 13:44:25.126459 tx_first_pass[0][0][7] = 0
4689 13:44:25.129823 tx_last_pass[0][0][7] = 0
4690 13:44:25.132791 tx_win_center[0][0][8] = 0
4691 13:44:25.136456 tx_first_pass[0][0][8] = 0
4692 13:44:25.136622 tx_last_pass[0][0][8] = 0
4693 13:44:25.139731 tx_win_center[0][0][9] = 0
4694 13:44:25.142997 tx_first_pass[0][0][9] = 0
4695 13:44:25.143220 tx_last_pass[0][0][9] = 0
4696 13:44:25.146364 tx_win_center[0][0][10] = 0
4697 13:44:25.149482 tx_first_pass[0][0][10] = 0
4698 13:44:25.153191 tx_last_pass[0][0][10] = 0
4699 13:44:25.153366 tx_win_center[0][0][11] = 0
4700 13:44:25.156563 tx_first_pass[0][0][11] = 0
4701 13:44:25.159508 tx_last_pass[0][0][11] = 0
4702 13:44:25.163139 tx_win_center[0][0][12] = 0
4703 13:44:25.163277 tx_first_pass[0][0][12] = 0
4704 13:44:25.166644 tx_last_pass[0][0][12] = 0
4705 13:44:25.170181 tx_win_center[0][0][13] = 0
4706 13:44:25.172739 tx_first_pass[0][0][13] = 0
4707 13:44:25.172919 tx_last_pass[0][0][13] = 0
4708 13:44:25.176177 tx_win_center[0][0][14] = 0
4709 13:44:25.179372 tx_first_pass[0][0][14] = 0
4710 13:44:25.183147 tx_last_pass[0][0][14] = 0
4711 13:44:25.183290 tx_win_center[0][0][15] = 0
4712 13:44:25.186232 tx_first_pass[0][0][15] = 0
4713 13:44:25.189715 tx_last_pass[0][0][15] = 0
4714 13:44:25.193434 tx_win_center[0][1][0] = 0
4715 13:44:25.193572 tx_first_pass[0][1][0] = 0
4716 13:44:25.196362 tx_last_pass[0][1][0] = 0
4717 13:44:25.199974 tx_win_center[0][1][1] = 0
4718 13:44:25.203026 tx_first_pass[0][1][1] = 0
4719 13:44:25.203190 tx_last_pass[0][1][1] = 0
4720 13:44:25.206463 tx_win_center[0][1][2] = 0
4721 13:44:25.210025 tx_first_pass[0][1][2] = 0
4722 13:44:25.210190 tx_last_pass[0][1][2] = 0
4723 13:44:25.213000 tx_win_center[0][1][3] = 0
4724 13:44:25.216517 tx_first_pass[0][1][3] = 0
4725 13:44:25.219951 tx_last_pass[0][1][3] = 0
4726 13:44:25.220149 tx_win_center[0][1][4] = 0
4727 13:44:25.223117 tx_first_pass[0][1][4] = 0
4728 13:44:25.226519 tx_last_pass[0][1][4] = 0
4729 13:44:25.226675 tx_win_center[0][1][5] = 0
4730 13:44:25.229655 tx_first_pass[0][1][5] = 0
4731 13:44:25.233398 tx_last_pass[0][1][5] = 0
4732 13:44:25.236516 tx_win_center[0][1][6] = 0
4733 13:44:25.236661 tx_first_pass[0][1][6] = 0
4734 13:44:25.239581 tx_last_pass[0][1][6] = 0
4735 13:44:25.243471 tx_win_center[0][1][7] = 0
4736 13:44:25.246325 tx_first_pass[0][1][7] = 0
4737 13:44:25.246553 tx_last_pass[0][1][7] = 0
4738 13:44:25.250363 tx_win_center[0][1][8] = 0
4739 13:44:25.253339 tx_first_pass[0][1][8] = 0
4740 13:44:25.253478 tx_last_pass[0][1][8] = 0
4741 13:44:25.256365 tx_win_center[0][1][9] = 0
4742 13:44:25.260043 tx_first_pass[0][1][9] = 0
4743 13:44:25.263157 tx_last_pass[0][1][9] = 0
4744 13:44:25.263295 tx_win_center[0][1][10] = 0
4745 13:44:25.266312 tx_first_pass[0][1][10] = 0
4746 13:44:25.269870 tx_last_pass[0][1][10] = 0
4747 13:44:25.273068 tx_win_center[0][1][11] = 0
4748 13:44:25.273268 tx_first_pass[0][1][11] = 0
4749 13:44:25.276658 tx_last_pass[0][1][11] = 0
4750 13:44:25.279694 tx_win_center[0][1][12] = 0
4751 13:44:25.283199 tx_first_pass[0][1][12] = 0
4752 13:44:25.283338 tx_last_pass[0][1][12] = 0
4753 13:44:25.286833 tx_win_center[0][1][13] = 0
4754 13:44:25.289709 tx_first_pass[0][1][13] = 0
4755 13:44:25.293031 tx_last_pass[0][1][13] = 0
4756 13:44:25.293193 tx_win_center[0][1][14] = 0
4757 13:44:25.296221 tx_first_pass[0][1][14] = 0
4758 13:44:25.299447 tx_last_pass[0][1][14] = 0
4759 13:44:25.303226 tx_win_center[0][1][15] = 0
4760 13:44:25.303350 tx_first_pass[0][1][15] = 0
4761 13:44:25.306344 tx_last_pass[0][1][15] = 0
4762 13:44:25.310265 tx_win_center[1][0][0] = 0
4763 13:44:25.312664 tx_first_pass[1][0][0] = 0
4764 13:44:25.312772 tx_last_pass[1][0][0] = 0
4765 13:44:25.316428 tx_win_center[1][0][1] = 0
4766 13:44:25.319402 tx_first_pass[1][0][1] = 0
4767 13:44:25.319539 tx_last_pass[1][0][1] = 0
4768 13:44:25.322795 tx_win_center[1][0][2] = 0
4769 13:44:25.326084 tx_first_pass[1][0][2] = 0
4770 13:44:25.329429 tx_last_pass[1][0][2] = 0
4771 13:44:25.329537 tx_win_center[1][0][3] = 0
4772 13:44:25.332992 tx_first_pass[1][0][3] = 0
4773 13:44:25.336222 tx_last_pass[1][0][3] = 0
4774 13:44:25.339883 tx_win_center[1][0][4] = 0
4775 13:44:25.340069 tx_first_pass[1][0][4] = 0
4776 13:44:25.343129 tx_last_pass[1][0][4] = 0
4777 13:44:25.346113 tx_win_center[1][0][5] = 0
4778 13:44:25.346210 tx_first_pass[1][0][5] = 0
4779 13:44:25.349852 tx_last_pass[1][0][5] = 0
4780 13:44:25.352987 tx_win_center[1][0][6] = 0
4781 13:44:25.356004 tx_first_pass[1][0][6] = 0
4782 13:44:25.356070 tx_last_pass[1][0][6] = 0
4783 13:44:25.359763 tx_win_center[1][0][7] = 0
4784 13:44:25.362830 tx_first_pass[1][0][7] = 0
4785 13:44:25.362928 tx_last_pass[1][0][7] = 0
4786 13:44:25.366032 tx_win_center[1][0][8] = 0
4787 13:44:25.369597 tx_first_pass[1][0][8] = 0
4788 13:44:25.372823 tx_last_pass[1][0][8] = 0
4789 13:44:25.372916 tx_win_center[1][0][9] = 0
4790 13:44:25.376516 tx_first_pass[1][0][9] = 0
4791 13:44:25.379646 tx_last_pass[1][0][9] = 0
4792 13:44:25.383023 tx_win_center[1][0][10] = 0
4793 13:44:25.383144 tx_first_pass[1][0][10] = 0
4794 13:44:25.386292 tx_last_pass[1][0][10] = 0
4795 13:44:25.389712 tx_win_center[1][0][11] = 0
4796 13:44:25.392893 tx_first_pass[1][0][11] = 0
4797 13:44:25.392962 tx_last_pass[1][0][11] = 0
4798 13:44:25.396165 tx_win_center[1][0][12] = 0
4799 13:44:25.399515 tx_first_pass[1][0][12] = 0
4800 13:44:25.403216 tx_last_pass[1][0][12] = 0
4801 13:44:25.403281 tx_win_center[1][0][13] = 0
4802 13:44:25.406164 tx_first_pass[1][0][13] = 0
4803 13:44:25.409683 tx_last_pass[1][0][13] = 0
4804 13:44:25.412908 tx_win_center[1][0][14] = 0
4805 13:44:25.413013 tx_first_pass[1][0][14] = 0
4806 13:44:25.416486 tx_last_pass[1][0][14] = 0
4807 13:44:25.419768 tx_win_center[1][0][15] = 0
4808 13:44:25.423308 tx_first_pass[1][0][15] = 0
4809 13:44:25.423393 tx_last_pass[1][0][15] = 0
4810 13:44:25.426052 tx_win_center[1][1][0] = 0
4811 13:44:25.429576 tx_first_pass[1][1][0] = 0
4812 13:44:25.429669 tx_last_pass[1][1][0] = 0
4813 13:44:25.432905 tx_win_center[1][1][1] = 0
4814 13:44:25.435933 tx_first_pass[1][1][1] = 0
4815 13:44:25.458903 tx_last_pass[1][1][1] = 0
4816 13:44:25.459078 tx_win_center[1][1][2] = 0
4817 13:44:25.459216 tx_first_pass[1][1][2] = 0
4818 13:44:25.459343 tx_last_pass[1][1][2] = 0
4819 13:44:25.459460 tx_win_center[1][1][3] = 0
4820 13:44:25.459559 tx_first_pass[1][1][3] = 0
4821 13:44:25.459656 tx_last_pass[1][1][3] = 0
4822 13:44:25.459750 tx_win_center[1][1][4] = 0
4823 13:44:25.460052 tx_first_pass[1][1][4] = 0
4824 13:44:25.460157 tx_last_pass[1][1][4] = 0
4825 13:44:25.462682 tx_win_center[1][1][5] = 0
4826 13:44:25.466403 tx_first_pass[1][1][5] = 0
4827 13:44:25.466504 tx_last_pass[1][1][5] = 0
4828 13:44:25.469451 tx_win_center[1][1][6] = 0
4829 13:44:25.473010 tx_first_pass[1][1][6] = 0
4830 13:44:25.476247 tx_last_pass[1][1][6] = 0
4831 13:44:25.476407 tx_win_center[1][1][7] = 0
4832 13:44:25.479304 tx_first_pass[1][1][7] = 0
4833 13:44:25.483142 tx_last_pass[1][1][7] = 0
4834 13:44:25.483428 tx_win_center[1][1][8] = 0
4835 13:44:25.485976 tx_first_pass[1][1][8] = 0
4836 13:44:25.489714 tx_last_pass[1][1][8] = 0
4837 13:44:25.493445 tx_win_center[1][1][9] = 0
4838 13:44:25.493728 tx_first_pass[1][1][9] = 0
4839 13:44:25.496420 tx_last_pass[1][1][9] = 0
4840 13:44:25.499519 tx_win_center[1][1][10] = 0
4841 13:44:25.503068 tx_first_pass[1][1][10] = 0
4842 13:44:25.503259 tx_last_pass[1][1][10] = 0
4843 13:44:25.506242 tx_win_center[1][1][11] = 0
4844 13:44:25.510001 tx_first_pass[1][1][11] = 0
4845 13:44:25.513044 tx_last_pass[1][1][11] = 0
4846 13:44:25.513250 tx_win_center[1][1][12] = 0
4847 13:44:25.516021 tx_first_pass[1][1][12] = 0
4848 13:44:25.519529 tx_last_pass[1][1][12] = 0
4849 13:44:25.522989 tx_win_center[1][1][13] = 0
4850 13:44:25.523233 tx_first_pass[1][1][13] = 0
4851 13:44:25.526267 tx_last_pass[1][1][13] = 0
4852 13:44:25.529832 tx_win_center[1][1][14] = 0
4853 13:44:25.533065 tx_first_pass[1][1][14] = 0
4854 13:44:25.533272 tx_last_pass[1][1][14] = 0
4855 13:44:25.536435 tx_win_center[1][1][15] = 0
4856 13:44:25.539908 tx_first_pass[1][1][15] = 0
4857 13:44:25.542787 tx_last_pass[1][1][15] = 0
4858 13:44:25.543034 dump params rx window
4859 13:44:25.546300 rx_firspass[0][0][0] = 0
4860 13:44:25.546537 rx_lastpass[0][0][0] = 0
4861 13:44:25.549833 rx_firspass[0][0][1] = 0
4862 13:44:25.552628 rx_lastpass[0][0][1] = 0
4863 13:44:25.556318 rx_firspass[0][0][2] = 0
4864 13:44:25.556555 rx_lastpass[0][0][2] = 0
4865 13:44:25.559377 rx_firspass[0][0][3] = 0
4866 13:44:25.563084 rx_lastpass[0][0][3] = 0
4867 13:44:25.563312 rx_firspass[0][0][4] = 0
4868 13:44:25.566197 rx_lastpass[0][0][4] = 0
4869 13:44:25.569904 rx_firspass[0][0][5] = 0
4870 13:44:25.570214 rx_lastpass[0][0][5] = 0
4871 13:44:25.572942 rx_firspass[0][0][6] = 0
4872 13:44:25.576109 rx_lastpass[0][0][6] = 0
4873 13:44:25.576331 rx_firspass[0][0][7] = 0
4874 13:44:25.579895 rx_lastpass[0][0][7] = 0
4875 13:44:25.583011 rx_firspass[0][0][8] = 0
4876 13:44:25.583228 rx_lastpass[0][0][8] = 0
4877 13:44:25.586820 rx_firspass[0][0][9] = 0
4878 13:44:25.589732 rx_lastpass[0][0][9] = 0
4879 13:44:25.590029 rx_firspass[0][0][10] = 0
4880 13:44:25.593433 rx_lastpass[0][0][10] = 0
4881 13:44:25.596288 rx_firspass[0][0][11] = 0
4882 13:44:25.599517 rx_lastpass[0][0][11] = 0
4883 13:44:25.599791 rx_firspass[0][0][12] = 0
4884 13:44:25.603112 rx_lastpass[0][0][12] = 0
4885 13:44:25.606787 rx_firspass[0][0][13] = 0
4886 13:44:25.607009 rx_lastpass[0][0][13] = 0
4887 13:44:25.609845 rx_firspass[0][0][14] = 0
4888 13:44:25.613017 rx_lastpass[0][0][14] = 0
4889 13:44:25.616709 rx_firspass[0][0][15] = 0
4890 13:44:25.617005 rx_lastpass[0][0][15] = 0
4891 13:44:25.619737 rx_firspass[0][1][0] = 0
4892 13:44:25.623166 rx_lastpass[0][1][0] = 0
4893 13:44:25.623494 rx_firspass[0][1][1] = 0
4894 13:44:25.626188 rx_lastpass[0][1][1] = 0
4895 13:44:25.629641 rx_firspass[0][1][2] = 0
4896 13:44:25.629924 rx_lastpass[0][1][2] = 0
4897 13:44:25.632976 rx_firspass[0][1][3] = 0
4898 13:44:25.636275 rx_lastpass[0][1][3] = 0
4899 13:44:25.636485 rx_firspass[0][1][4] = 0
4900 13:44:25.639477 rx_lastpass[0][1][4] = 0
4901 13:44:25.642893 rx_firspass[0][1][5] = 0
4902 13:44:25.646316 rx_lastpass[0][1][5] = 0
4903 13:44:25.646478 rx_firspass[0][1][6] = 0
4904 13:44:25.649781 rx_lastpass[0][1][6] = 0
4905 13:44:25.653031 rx_firspass[0][1][7] = 0
4906 13:44:25.653128 rx_lastpass[0][1][7] = 0
4907 13:44:25.656662 rx_firspass[0][1][8] = 0
4908 13:44:25.659502 rx_lastpass[0][1][8] = 0
4909 13:44:25.659629 rx_firspass[0][1][9] = 0
4910 13:44:25.663152 rx_lastpass[0][1][9] = 0
4911 13:44:25.666102 rx_firspass[0][1][10] = 0
4912 13:44:25.666213 rx_lastpass[0][1][10] = 0
4913 13:44:25.669748 rx_firspass[0][1][11] = 0
4914 13:44:25.672900 rx_lastpass[0][1][11] = 0
4915 13:44:25.676626 rx_firspass[0][1][12] = 0
4916 13:44:25.676751 rx_lastpass[0][1][12] = 0
4917 13:44:25.679640 rx_firspass[0][1][13] = 0
4918 13:44:25.682770 rx_lastpass[0][1][13] = 0
4919 13:44:25.682867 rx_firspass[0][1][14] = 0
4920 13:44:25.686485 rx_lastpass[0][1][14] = 0
4921 13:44:25.689540 rx_firspass[0][1][15] = 0
4922 13:44:25.693295 rx_lastpass[0][1][15] = 0
4923 13:44:25.693416 rx_firspass[1][0][0] = 0
4924 13:44:25.696533 rx_lastpass[1][0][0] = 0
4925 13:44:25.699413 rx_firspass[1][0][1] = 0
4926 13:44:25.699510 rx_lastpass[1][0][1] = 0
4927 13:44:25.703107 rx_firspass[1][0][2] = 0
4928 13:44:25.706108 rx_lastpass[1][0][2] = 0
4929 13:44:25.706205 rx_firspass[1][0][3] = 0
4930 13:44:25.709973 rx_lastpass[1][0][3] = 0
4931 13:44:25.713017 rx_firspass[1][0][4] = 0
4932 13:44:25.713177 rx_lastpass[1][0][4] = 0
4933 13:44:25.716689 rx_firspass[1][0][5] = 0
4934 13:44:25.719529 rx_lastpass[1][0][5] = 0
4935 13:44:25.719649 rx_firspass[1][0][6] = 0
4936 13:44:25.723230 rx_lastpass[1][0][6] = 0
4937 13:44:25.726333 rx_firspass[1][0][7] = 0
4938 13:44:25.726450 rx_lastpass[1][0][7] = 0
4939 13:44:25.730108 rx_firspass[1][0][8] = 0
4940 13:44:25.732967 rx_lastpass[1][0][8] = 0
4941 13:44:25.736678 rx_firspass[1][0][9] = 0
4942 13:44:25.736801 rx_lastpass[1][0][9] = 0
4943 13:44:25.739729 rx_firspass[1][0][10] = 0
4944 13:44:25.743386 rx_lastpass[1][0][10] = 0
4945 13:44:25.743517 rx_firspass[1][0][11] = 0
4946 13:44:25.746428 rx_lastpass[1][0][11] = 0
4947 13:44:25.749784 rx_firspass[1][0][12] = 0
4948 13:44:25.749912 rx_lastpass[1][0][12] = 0
4949 13:44:25.753284 rx_firspass[1][0][13] = 0
4950 13:44:25.756527 rx_lastpass[1][0][13] = 0
4951 13:44:25.759749 rx_firspass[1][0][14] = 0
4952 13:44:25.759879 rx_lastpass[1][0][14] = 0
4953 13:44:25.762793 rx_firspass[1][0][15] = 0
4954 13:44:25.766394 rx_lastpass[1][0][15] = 0
4955 13:44:25.766528 rx_firspass[1][1][0] = 0
4956 13:44:25.770044 rx_lastpass[1][1][0] = 0
4957 13:44:25.772902 rx_firspass[1][1][1] = 0
4958 13:44:25.776626 rx_lastpass[1][1][1] = 0
4959 13:44:25.776770 rx_firspass[1][1][2] = 0
4960 13:44:25.779735 rx_lastpass[1][1][2] = 0
4961 13:44:25.783372 rx_firspass[1][1][3] = 0
4962 13:44:25.783568 rx_lastpass[1][1][3] = 0
4963 13:44:25.786521 rx_firspass[1][1][4] = 0
4964 13:44:25.789695 rx_lastpass[1][1][4] = 0
4965 13:44:25.789954 rx_firspass[1][1][5] = 0
4966 13:44:25.793554 rx_lastpass[1][1][5] = 0
4967 13:44:25.796586 rx_firspass[1][1][6] = 0
4968 13:44:25.796779 rx_lastpass[1][1][6] = 0
4969 13:44:25.800436 rx_firspass[1][1][7] = 0
4970 13:44:25.803433 rx_lastpass[1][1][7] = 0
4971 13:44:25.803666 rx_firspass[1][1][8] = 0
4972 13:44:25.806744 rx_lastpass[1][1][8] = 0
4973 13:44:25.809837 rx_firspass[1][1][9] = 0
4974 13:44:25.810140 rx_lastpass[1][1][9] = 0
4975 13:44:25.812943 rx_firspass[1][1][10] = 0
4976 13:44:25.816702 rx_lastpass[1][1][10] = 0
4977 13:44:25.819767 rx_firspass[1][1][11] = 0
4978 13:44:25.820186 rx_lastpass[1][1][11] = 0
4979 13:44:25.823469 rx_firspass[1][1][12] = 0
4980 13:44:25.826405 rx_lastpass[1][1][12] = 0
4981 13:44:25.826833 rx_firspass[1][1][13] = 0
4982 13:44:25.830312 rx_lastpass[1][1][13] = 0
4983 13:44:25.833217 rx_firspass[1][1][14] = 0
4984 13:44:25.836539 rx_lastpass[1][1][14] = 0
4985 13:44:25.836950 rx_firspass[1][1][15] = 0
4986 13:44:25.839755 rx_lastpass[1][1][15] = 0
4987 13:44:25.842979 dump params clk_delay
4988 13:44:25.843276 clk_delay[0] = 0
4989 13:44:25.846385 clk_delay[1] = 0
4990 13:44:25.846764 dump params dqs_delay
4991 13:44:25.849456 dqs_delay[0][0] = 0
4992 13:44:25.849830 dqs_delay[0][1] = 0
4993 13:44:25.853015 dqs_delay[1][0] = 0
4994 13:44:25.853446 dqs_delay[1][1] = 0
4995 13:44:25.856625 dump params delay_cell_unit = 762
4996 13:44:25.859817 mt_set_emi_preloader end
4997 13:44:25.862887 [mt_mem_init] dram size: 0x100000000, rank number: 2
4998 13:44:25.869544 [complex_mem_test] start addr:0x40000000, len:20480
4999 13:44:25.905331 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5000 13:44:25.911822 [complex_mem_test] start addr:0x80000000, len:20480
5001 13:44:25.947850 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5002 13:44:25.954056 [complex_mem_test] start addr:0xc0000000, len:20480
5003 13:44:25.990103 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5004 13:44:25.996494 [complex_mem_test] start addr:0x56000000, len:8192
5005 13:44:26.013230 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5006 13:44:26.013493 ddr_geometry:1
5007 13:44:26.019773 [complex_mem_test] start addr:0x80000000, len:8192
5008 13:44:26.036967 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5009 13:44:26.040518 dram_init: dram init end (result: 0)
5010 13:44:26.047315 Successfully loaded DRAM blobs and ran DRAM calibration
5011 13:44:26.057576 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5012 13:44:26.058288 CBMEM:
5013 13:44:26.060518 IMD: root @ 00000000fffff000 254 entries.
5014 13:44:26.063490 IMD: root @ 00000000ffffec00 62 entries.
5015 13:44:26.070531 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5016 13:44:26.076895 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5017 13:44:26.080589 in-header: 03 a1 00 00 08 00 00 00
5018 13:44:26.083520 in-data: 84 60 60 10 00 00 00 00
5019 13:44:26.086974 Chrome EC: clear events_b mask to 0x0000000020004000
5020 13:44:26.094048 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5021 13:44:26.097529 in-header: 03 fd 00 00 00 00 00 00
5022 13:44:26.097821 in-data:
5023 13:44:26.104223 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5024 13:44:26.104427 CBFS @ 21000 size 3d4000
5025 13:44:26.110876 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5026 13:44:26.114052 CBFS: Locating 'fallback/ramstage'
5027 13:44:26.117756 CBFS: Found @ offset 10d40 size d563
5028 13:44:26.138847 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5029 13:44:26.151091 Accumulated console time in romstage 12791 ms
5030 13:44:26.151354
5031 13:44:26.151515
5032 13:44:26.160817 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5033 13:44:26.164321 ARM64: Exception handlers installed.
5034 13:44:26.164511 ARM64: Testing exception
5035 13:44:26.167971 ARM64: Done test exception
5036 13:44:26.170939 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5037 13:44:26.174766 Manufacturer: ef
5038 13:44:26.177717 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5039 13:44:26.184937 WARNING: RO_VPD is uninitialized or empty.
5040 13:44:26.187696 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5041 13:44:26.190985 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5042 13:44:26.201067 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5043 13:44:26.203981 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5044 13:44:26.210714 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5045 13:44:26.211012 Enumerating buses...
5046 13:44:26.217421 Show all devs... Before device enumeration.
5047 13:44:26.217630 Root Device: enabled 1
5048 13:44:26.220352 CPU_CLUSTER: 0: enabled 1
5049 13:44:26.220521 CPU: 00: enabled 1
5050 13:44:26.224018 Compare with tree...
5051 13:44:26.227068 Root Device: enabled 1
5052 13:44:26.227216 CPU_CLUSTER: 0: enabled 1
5053 13:44:26.230777 CPU: 00: enabled 1
5054 13:44:26.233830 Root Device scanning...
5055 13:44:26.233923 root_dev_scan_bus for Root Device
5056 13:44:26.237627 CPU_CLUSTER: 0 enabled
5057 13:44:26.240761 root_dev_scan_bus for Root Device done
5058 13:44:26.247341 scan_bus: scanning of bus Root Device took 10689 usecs
5059 13:44:26.247514 done
5060 13:44:26.250309 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5061 13:44:26.254030 Allocating resources...
5062 13:44:26.254118 Reading resources...
5063 13:44:26.257033 Root Device read_resources bus 0 link: 0
5064 13:44:26.263906 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5065 13:44:26.263992 CPU: 00 missing read_resources
5066 13:44:26.270435 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5067 13:44:26.274245 Root Device read_resources bus 0 link: 0 done
5068 13:44:26.277162 Done reading resources.
5069 13:44:26.280253 Show resources in subtree (Root Device)...After reading.
5070 13:44:26.284042 Root Device child on link 0 CPU_CLUSTER: 0
5071 13:44:26.287717 CPU_CLUSTER: 0 child on link 0 CPU: 00
5072 13:44:26.296914 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5073 13:44:26.297033 CPU: 00
5074 13:44:26.300683 Setting resources...
5075 13:44:26.303682 Root Device assign_resources, bus 0 link: 0
5076 13:44:26.307203 CPU_CLUSTER: 0 missing set_resources
5077 13:44:26.310676 Root Device assign_resources, bus 0 link: 0
5078 13:44:26.313505 Done setting resources.
5079 13:44:26.320500 Show resources in subtree (Root Device)...After assigning values.
5080 13:44:26.324011 Root Device child on link 0 CPU_CLUSTER: 0
5081 13:44:26.327171 CPU_CLUSTER: 0 child on link 0 CPU: 00
5082 13:44:26.333559 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5083 13:44:26.337072 CPU: 00
5084 13:44:26.337173 Done allocating resources.
5085 13:44:26.343944 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5086 13:44:26.344120 Enabling resources...
5087 13:44:26.347013 done.
5088 13:44:26.350791 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5089 13:44:26.353833 Initializing devices...
5090 13:44:26.353925 Root Device init ...
5091 13:44:26.357026 mainboard_init: Starting display init.
5092 13:44:26.360463 ADC[4]: Raw value=76494 ID=0
5093 13:44:26.383707 anx7625_power_on_init: Init interface.
5094 13:44:26.386713 anx7625_disable_pd_protocol: Disabled PD feature.
5095 13:44:26.393530 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5096 13:44:26.439808 anx7625_start_dp_work: Secure OCM version=00
5097 13:44:26.443517 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5098 13:44:26.463780 sp_tx_get_edid_block: EDID Block = 1
5099 13:44:26.577764 Extracted contents:
5100 13:44:26.581449 header: 00 ff ff ff ff ff ff 00
5101 13:44:26.584436 serial number: 06 af 5c 14 00 00 00 00 00 1a
5102 13:44:26.587979 version: 01 04
5103 13:44:26.590901 basic params: 95 1a 0e 78 02
5104 13:44:26.594574 chroma info: 99 85 95 55 56 92 28 22 50 54
5105 13:44:26.597664 established: 00 00 00
5106 13:44:26.604492 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5107 13:44:26.607504 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5108 13:44:26.613946 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5109 13:44:26.621085 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5110 13:44:26.627478 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5111 13:44:26.630526 extensions: 00
5112 13:44:26.630667 checksum: ae
5113 13:44:26.630773
5114 13:44:26.634279 Manufacturer: AUO Model 145c Serial Number 0
5115 13:44:26.637185 Made week 0 of 2016
5116 13:44:26.637282 EDID version: 1.4
5117 13:44:26.640926 Digital display
5118 13:44:26.644602 6 bits per primary color channel
5119 13:44:26.644728 DisplayPort interface
5120 13:44:26.647526 Maximum image size: 26 cm x 14 cm
5121 13:44:26.651094 Gamma: 220%
5122 13:44:26.651217 Check DPMS levels
5123 13:44:26.654459 Supported color formats: RGB 4:4:4
5124 13:44:26.657541 First detailed timing is preferred timing
5125 13:44:26.660574 Established timings supported:
5126 13:44:26.664340 Standard timings supported:
5127 13:44:26.664476 Detailed timings
5128 13:44:26.671195 Hex of detail: ce1d56ea50001a3030204600009010000018
5129 13:44:26.674135 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5130 13:44:26.677198 0556 0586 05a6 0640 hborder 0
5131 13:44:26.680772 0300 0304 030a 031a vborder 0
5132 13:44:26.684301 -hsync -vsync
5133 13:44:26.687391 Did detailed timing
5134 13:44:26.690382 Hex of detail: 0000000f0000000000000000000000000020
5135 13:44:26.694184 Manufacturer-specified data, tag 15
5136 13:44:26.697863 Hex of detail: 000000fe0041554f0a202020202020202020
5137 13:44:26.700932 ASCII string: AUO
5138 13:44:26.704067 Hex of detail: 000000fe004231313658414230312e34200a
5139 13:44:26.707964 ASCII string: B116XAB01.4
5140 13:44:26.708364 Checksum
5141 13:44:26.710859 Checksum: 0xae (valid)
5142 13:44:26.717582 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5143 13:44:26.717804 DSI data_rate: 457800000 bps
5144 13:44:26.724773 anx7625_parse_edid: set default k value to 0x3d for panel
5145 13:44:26.727943 anx7625_parse_edid: pixelclock(76300).
5146 13:44:26.730940 hactive(1366), hsync(32), hfp(48), hbp(154)
5147 13:44:26.734560 vactive(768), vsync(6), vfp(4), vbp(16)
5148 13:44:26.737751 anx7625_dsi_config: config dsi.
5149 13:44:26.745858 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5150 13:44:26.767136 anx7625_dsi_config: success to config DSI
5151 13:44:26.770470 anx7625_dp_start: MIPI phy setup OK.
5152 13:44:26.774004 [SSUSB] Setting up USB HOST controller...
5153 13:44:26.777089 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5154 13:44:26.780349 [SSUSB] phy power-on done.
5155 13:44:26.784136 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5156 13:44:26.787745 in-header: 03 fc 01 00 00 00 00 00
5157 13:44:26.787880 in-data:
5158 13:44:26.794088 handle_proto3_response: EC response with error code: 1
5159 13:44:26.794394 SPM: pcm index = 1
5160 13:44:26.797777 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5161 13:44:26.800653 CBFS @ 21000 size 3d4000
5162 13:44:26.807270 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5163 13:44:26.810875 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5164 13:44:26.813936 CBFS: Found @ offset 1e7c0 size 1026
5165 13:44:26.820693 read SPI 0x3f808 0x1026: 1272 us, 3250 KB/s, 26.000 Mbps
5166 13:44:26.823742 SPM: binary array size = 2988
5167 13:44:26.826943 SPM: version = pcm_allinone_v1.17.2_20180829
5168 13:44:26.830651 SPM binary loaded in 32 msecs
5169 13:44:26.838118 spm_kick_im_to_fetch: ptr = 000000004021eec2
5170 13:44:26.841102 spm_kick_im_to_fetch: len = 2988
5171 13:44:26.841262 SPM: spm_kick_pcm_to_run
5172 13:44:26.844880 SPM: spm_kick_pcm_to_run done
5173 13:44:26.847768 SPM: spm_init done in 52 msecs
5174 13:44:26.851561 Root Device init finished in 494990 usecs
5175 13:44:26.855094 CPU_CLUSTER: 0 init ...
5176 13:44:26.865063 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5177 13:44:26.868162 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5178 13:44:26.871727 CBFS @ 21000 size 3d4000
5179 13:44:26.874625 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5180 13:44:26.878225 CBFS: Locating 'sspm.bin'
5181 13:44:26.881111 CBFS: Found @ offset 208c0 size 41cb
5182 13:44:26.891101 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5183 13:44:26.899515 CPU_CLUSTER: 0 init finished in 42802 usecs
5184 13:44:26.899750 Devices initialized
5185 13:44:26.902533 Show all devs... After init.
5186 13:44:26.906039 Root Device: enabled 1
5187 13:44:26.906249 CPU_CLUSTER: 0: enabled 1
5188 13:44:26.909026 CPU: 00: enabled 1
5189 13:44:26.912977 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5190 13:44:26.916127 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5191 13:44:26.919169 ELOG: NV offset 0x558000 size 0x1000
5192 13:44:26.926751 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5193 13:44:26.933691 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5194 13:44:26.936663 ELOG: Event(17) added with size 13 at 2024-07-18 13:44:26 UTC
5195 13:44:26.940493 out: cmd=0x121: 03 db 21 01 00 00 00 00
5196 13:44:26.944020 in-header: 03 5b 00 00 2c 00 00 00
5197 13:44:26.956872 in-data: f7 47 00 00 00 00 00 00 02 10 00 00 06 80 00 00 fb b9 00 00 06 80 00 00 d5 cb 01 00 06 80 00 00 32 02 01 00 06 80 00 00 4b 37 02 00
5198 13:44:26.960311 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5199 13:44:26.963457 in-header: 03 19 00 00 08 00 00 00
5200 13:44:26.967114 in-data: a2 e0 47 00 13 00 00 00
5201 13:44:26.970567 Chrome EC: UHEPI supported
5202 13:44:26.976752 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5203 13:44:26.980700 in-header: 03 e1 00 00 08 00 00 00
5204 13:44:26.983821 in-data: 84 20 60 10 00 00 00 00
5205 13:44:26.986846 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5206 13:44:26.994145 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5207 13:44:26.997223 in-header: 03 e1 00 00 08 00 00 00
5208 13:44:27.000184 in-data: 84 20 60 10 00 00 00 00
5209 13:44:27.006840 ELOG: Event(A1) added with size 10 at 2024-07-18 13:44:26 UTC
5210 13:44:27.013313 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5211 13:44:27.016733 ELOG: Event(A0) added with size 9 at 2024-07-18 13:44:26 UTC
5212 13:44:27.023503 elog_add_boot_reason: Logged dev mode boot
5213 13:44:27.023800 Finalize devices...
5214 13:44:27.027175 Devices finalized
5215 13:44:27.030299 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5216 13:44:27.034207 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5217 13:44:27.040412 ELOG: Event(91) added with size 10 at 2024-07-18 13:44:26 UTC
5218 13:44:27.044012 Writing coreboot table at 0xffeda000
5219 13:44:27.047500 0. 0000000000114000-000000000011efff: RAMSTAGE
5220 13:44:27.053735 1. 0000000040000000-000000004023cfff: RAMSTAGE
5221 13:44:27.056775 2. 000000004023d000-00000000545fffff: RAM
5222 13:44:27.060686 3. 0000000054600000-000000005465ffff: BL31
5223 13:44:27.063763 4. 0000000054660000-00000000ffed9fff: RAM
5224 13:44:27.070574 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5225 13:44:27.073488 6. 0000000100000000-000000013fffffff: RAM
5226 13:44:27.073777 Passing 5 GPIOs to payload:
5227 13:44:27.080362 NAME | PORT | POLARITY | VALUE
5228 13:44:27.083659 write protect | 0x00000096 | low | high
5229 13:44:27.090168 EC in RW | 0x000000b1 | high | undefined
5230 13:44:27.093764 EC interrupt | 0x00000097 | low | undefined
5231 13:44:27.096814 TPM interrupt | 0x00000099 | high | undefined
5232 13:44:27.103562 speaker enable | 0x000000af | high | undefined
5233 13:44:27.106766 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5234 13:44:27.110513 in-header: 03 f7 00 00 02 00 00 00
5235 13:44:27.110792 in-data: 04 00
5236 13:44:27.113598 Board ID: 4
5237 13:44:27.117092 ADC[3]: Raw value=1034629 ID=8
5238 13:44:27.117401 RAM code: 8
5239 13:44:27.117683 SKU ID: 16
5240 13:44:27.120454 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5241 13:44:27.123748 CBFS @ 21000 size 3d4000
5242 13:44:27.130519 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5243 13:44:27.137205 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 5dbd
5244 13:44:27.137484 coreboot table: 940 bytes.
5245 13:44:27.140366 IMD ROOT 0. 00000000fffff000 00001000
5246 13:44:27.143620 IMD SMALL 1. 00000000ffffe000 00001000
5247 13:44:27.150374 CONSOLE 2. 00000000fffde000 00020000
5248 13:44:27.153562 FMAP 3. 00000000fffdd000 0000047c
5249 13:44:27.156981 TIME STAMP 4. 00000000fffdc000 00000910
5250 13:44:27.160760 RAMOOPS 5. 00000000ffedc000 00100000
5251 13:44:27.163988 COREBOOT 6. 00000000ffeda000 00002000
5252 13:44:27.164132 IMD small region:
5253 13:44:27.170112 IMD ROOT 0. 00000000ffffec00 00000400
5254 13:44:27.173253 VBOOT WORK 1. 00000000ffffeb00 00000100
5255 13:44:27.177173 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5256 13:44:27.180145 VPD 3. 00000000ffffea60 0000006c
5257 13:44:27.183327 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5258 13:44:27.190420 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5259 13:44:27.193324 in-header: 03 e1 00 00 08 00 00 00
5260 13:44:27.196662 in-data: 84 20 60 10 00 00 00 00
5261 13:44:27.203265 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5262 13:44:27.203494 CBFS @ 21000 size 3d4000
5263 13:44:27.210423 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5264 13:44:27.213447 CBFS: Locating 'fallback/payload'
5265 13:44:27.220897 CBFS: Found @ offset dc040 size 439a0
5266 13:44:27.308702 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5267 13:44:27.312162 Checking segment from ROM address 0x0000000040003a00
5268 13:44:27.318799 Checking segment from ROM address 0x0000000040003a1c
5269 13:44:27.322175 Loading segment from ROM address 0x0000000040003a00
5270 13:44:27.325723 code (compression=0)
5271 13:44:27.335515 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5272 13:44:27.342120 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5273 13:44:27.345593 it's not compressed!
5274 13:44:27.349112 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5275 13:44:27.355412 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5276 13:44:27.363142 Loading segment from ROM address 0x0000000040003a1c
5277 13:44:27.366750 Entry Point 0x0000000080000000
5278 13:44:27.366987 Loaded segments
5279 13:44:27.373008 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5280 13:44:27.376678 Jumping to boot code at 0000000080000000(00000000ffeda000)
5281 13:44:27.386845 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5282 13:44:27.389911 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5283 13:44:27.393621 CBFS @ 21000 size 3d4000
5284 13:44:27.399760 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5285 13:44:27.403610 CBFS: Locating 'fallback/bl31'
5286 13:44:27.406744 CBFS: Found @ offset 36dc0 size 5820
5287 13:44:27.417262 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5288 13:44:27.420771 Checking segment from ROM address 0x0000000040003a00
5289 13:44:27.427483 Checking segment from ROM address 0x0000000040003a1c
5290 13:44:27.430830 Loading segment from ROM address 0x0000000040003a00
5291 13:44:27.434070 code (compression=1)
5292 13:44:27.440699 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5293 13:44:27.450333 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5294 13:44:27.450467 using LZMA
5295 13:44:27.458817 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5296 13:44:27.465620 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5297 13:44:27.468858 Loading segment from ROM address 0x0000000040003a1c
5298 13:44:27.472945 Entry Point 0x0000000054601000
5299 13:44:27.473440 Loaded segments
5300 13:44:27.475649 NOTICE: MT8183 bl31_setup
5301 13:44:27.482851 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5302 13:44:27.486039 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5303 13:44:27.489554 INFO: [DEVAPC] dump DEVAPC registers:
5304 13:44:27.499356 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5305 13:44:27.506430 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5306 13:44:27.516137 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5307 13:44:27.522295 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5308 13:44:27.532579 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5309 13:44:27.539741 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5310 13:44:27.549328 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5311 13:44:27.555877 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5312 13:44:27.562412 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5313 13:44:27.572657 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5314 13:44:27.579474 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5315 13:44:27.589329 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5316 13:44:27.595878 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5317 13:44:27.602586 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5318 13:44:27.613025 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5319 13:44:27.619363 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5320 13:44:27.626055 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5321 13:44:27.632759 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5322 13:44:27.639442 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5323 13:44:27.649529 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5324 13:44:27.655911 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5325 13:44:27.662586 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5326 13:44:27.666163 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5327 13:44:27.669753 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5328 13:44:27.672853 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5329 13:44:27.676134 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5330 13:44:27.679625 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5331 13:44:27.685543 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5332 13:44:27.689227 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5333 13:44:27.692888 WARNING: region 0:
5334 13:44:27.695975 WARNING: apc:0x168, sa:0x0, ea:0xfff
5335 13:44:27.696070 WARNING: region 1:
5336 13:44:27.702439 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5337 13:44:27.702546 WARNING: region 2:
5338 13:44:27.706433 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5339 13:44:27.709652 WARNING: region 3:
5340 13:44:27.712945 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5341 13:44:27.713036 WARNING: region 4:
5342 13:44:27.715575 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5343 13:44:27.719299 WARNING: region 5:
5344 13:44:27.722605 WARNING: apc:0x0, sa:0x0, ea:0x0
5345 13:44:27.722710 WARNING: region 6:
5346 13:44:27.725576 WARNING: apc:0x0, sa:0x0, ea:0x0
5347 13:44:27.729300 WARNING: region 7:
5348 13:44:27.732275 WARNING: apc:0x0, sa:0x0, ea:0x0
5349 13:44:27.738795 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5350 13:44:27.742714 INFO: SPM: enable SPMC mode
5351 13:44:27.745831 NOTICE: spm_boot_init() start
5352 13:44:27.745928 NOTICE: spm_boot_init() end
5353 13:44:27.752624 INFO: BL31: Initializing runtime services
5354 13:44:27.755910 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5355 13:44:27.762689 INFO: BL31: Preparing for EL3 exit to normal world
5356 13:44:27.765686 INFO: Entry point address = 0x80000000
5357 13:44:27.765789 INFO: SPSR = 0x8
5358 13:44:27.789335
5359 13:44:27.789466
5360 13:44:27.789567
5361 13:44:27.790157 end: 2.2.3 depthcharge-start (duration 00:00:24) [common]
5362 13:44:27.790276 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5363 13:44:27.790392 Setting prompt string to ['jacuzzi:']
5364 13:44:27.790487 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5365 13:44:27.792417 Starting depthcharge on Juniper...
5366 13:44:27.792521
5367 13:44:27.795286 vboot_handoff: creating legacy vboot_handoff structure
5368 13:44:27.795388
5369 13:44:27.799104 ec_init(0): CrosEC protocol v3 supported (544, 544)
5370 13:44:27.799215
5371 13:44:27.802110 Wipe memory regions:
5372 13:44:27.802210
5373 13:44:27.805587 [0x00000040000000, 0x00000054600000)
5374 13:44:27.848206
5375 13:44:27.848345 [0x00000054660000, 0x00000080000000)
5376 13:44:27.940357
5377 13:44:27.940494 [0x000000811994a0, 0x000000ffeda000)
5378 13:44:28.199867
5379 13:44:28.200006 [0x00000100000000, 0x00000140000000)
5380 13:44:28.333291
5381 13:44:28.336451 Initializing XHCI USB controller at 0x11200000.
5382 13:44:28.359371
5383 13:44:28.362329 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5384 13:44:28.362524
5385 13:44:28.362694
5386 13:44:28.363106 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5387 13:44:28.363279 Sending line: 'tftpboot 192.168.201.1 14879042/tftp-deploy-y21e4bx3/kernel/image.itb 14879042/tftp-deploy-y21e4bx3/kernel/cmdline '
5389 13:44:28.464398 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5390 13:44:28.464821 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5391 13:44:28.469868 jacuzzi: tftpboot 192.168.201.1 14879042/tftp-deploy-y21e4bx3/kernel/image.itp-deploy-y21e4bx3/kernel/cmdline
5392 13:44:28.470277
5393 13:44:28.470680 Waiting for link
5394 13:44:28.873384
5395 13:44:28.873591 R8152: Initializing
5396 13:44:28.873764
5397 13:44:28.876280 Version 9 (ocp_data = 6010)
5398 13:44:28.876478
5399 13:44:28.880233 R8152: Done initializing
5400 13:44:28.880375
5401 13:44:28.880544 Adding net device
5402 13:44:29.265851
5403 13:44:29.266290 done.
5404 13:44:29.266692
5405 13:44:29.267065 MAC: 00:e0:4c:71:a7:1f
5406 13:44:29.267440
5407 13:44:29.268918 Sending DHCP discover... done.
5408 13:44:29.269301
5409 13:44:29.272609 Waiting for reply... done.
5410 13:44:29.272816
5411 13:44:29.275724 Sending DHCP request... done.
5412 13:44:29.275961
5413 13:44:29.885736 Waiting for reply... done.
5414 13:44:29.886016
5415 13:44:29.886202 My ip is 192.168.201.23
5416 13:44:29.886371
5417 13:44:29.888647 The DHCP server ip is 192.168.201.1
5418 13:44:29.888956
5419 13:44:29.895767 TFTP server IP predefined by user: 192.168.201.1
5420 13:44:29.896005
5421 13:44:29.902007 Bootfile predefined by user: 14879042/tftp-deploy-y21e4bx3/kernel/image.itb
5422 13:44:29.902192
5423 13:44:29.902335 Sending tftp read request... done.
5424 13:44:29.905392
5425 13:44:29.910356 Waiting for the transfer...
5426 13:44:29.910563
5427 13:44:30.202427 00000000 ################################################################
5428 13:44:30.202753
5429 13:44:30.476791 00080000 ################################################################
5430 13:44:30.476908
5431 13:44:30.746581 00100000 ################################################################
5432 13:44:30.746714
5433 13:44:30.999728 00180000 ################################################################
5434 13:44:30.999856
5435 13:44:31.262348 00200000 ################################################################
5436 13:44:31.262472
5437 13:44:31.517383 00280000 ################################################################
5438 13:44:31.517540
5439 13:44:31.770085 00300000 ################################################################
5440 13:44:31.770308
5441 13:44:32.013701 00380000 ################################################################
5442 13:44:32.013821
5443 13:44:32.264291 00400000 ################################################################
5444 13:44:32.264418
5445 13:44:32.531658 00480000 ################################################################
5446 13:44:32.531836
5447 13:44:32.848148 00500000 ################################################################
5448 13:44:32.848292
5449 13:44:33.059373 00580000 ################################################################
5450 13:44:33.059792
5451 13:44:33.320596 00600000 ################################################################
5452 13:44:33.320753
5453 13:44:33.582680 00680000 ################################################################
5454 13:44:33.582810
5455 13:44:33.830325 00700000 ################################################################
5456 13:44:33.830451
5457 13:44:34.084042 00780000 ################################################################
5458 13:44:34.084164
5459 13:44:34.348962 00800000 ################################################################
5460 13:44:34.349111
5461 13:44:34.606752 00880000 ################################################################
5462 13:44:34.606886
5463 13:44:34.857507 00900000 ################################################################
5464 13:44:34.857634
5465 13:44:35.113546 00980000 ################################################################
5466 13:44:35.113715
5467 13:44:35.377263 00a00000 ################################################################
5468 13:44:35.377438
5469 13:44:35.628357 00a80000 ################################################################
5470 13:44:35.628485
5471 13:44:35.889287 00b00000 ################################################################
5472 13:44:35.889415
5473 13:44:36.148037 00b80000 ################################################################
5474 13:44:36.148185
5475 13:44:36.401013 00c00000 ################################################################
5476 13:44:36.401170
5477 13:44:36.653788 00c80000 ################################################################
5478 13:44:36.653920
5479 13:44:36.908561 00d00000 ################################################################
5480 13:44:36.908706
5481 13:44:37.173216 00d80000 ################################################################
5482 13:44:37.173345
5483 13:44:37.426253 00e00000 ################################################################
5484 13:44:37.426377
5485 13:44:37.692507 00e80000 ################################################################
5486 13:44:37.692654
5487 13:44:37.942739 00f00000 ################################################################
5488 13:44:37.942879
5489 13:44:38.198186 00f80000 ################################################################
5490 13:44:38.198313
5491 13:44:38.459498 01000000 ################################################################
5492 13:44:38.459625
5493 13:44:38.710273 01080000 ################################################################
5494 13:44:38.710431
5495 13:44:38.968514 01100000 ################################################################
5496 13:44:38.968673
5497 13:44:39.244822 01180000 ################################################################
5498 13:44:39.244937
5499 13:44:39.522673 01200000 ################################################################
5500 13:44:39.522821
5501 13:44:39.802739 01280000 ################################################################
5502 13:44:39.802888
5503 13:44:40.072910 01300000 ################################################################
5504 13:44:40.073051
5505 13:44:40.341075 01380000 ################################################################
5506 13:44:40.341260
5507 13:44:40.617087 01400000 ################################################################
5508 13:44:40.617233
5509 13:44:40.883696 01480000 ################################################################
5510 13:44:40.883810
5511 13:44:41.151609 01500000 ################################################################
5512 13:44:41.151742
5513 13:44:41.425671 01580000 ################################################################
5514 13:44:41.425785
5515 13:44:41.703676 01600000 ################################################################
5516 13:44:41.703815
5517 13:44:41.971790 01680000 ################################################################
5518 13:44:41.971898
5519 13:44:42.224932 01700000 ################################################################
5520 13:44:42.225061
5521 13:44:42.486795 01780000 ################################################################
5522 13:44:42.486909
5523 13:44:42.896202 01800000 ################################################################
5524 13:44:42.896384
5525 13:44:43.011464 01880000 ################################################################
5526 13:44:43.011590
5527 13:44:43.260470 01900000 ################################################################
5528 13:44:43.260580
5529 13:44:43.526037 01980000 ################################################################
5530 13:44:43.526178
5531 13:44:43.811307 01a00000 ################################################################
5532 13:44:43.811447
5533 13:44:44.079189 01a80000 ################################################################
5534 13:44:44.079338
5535 13:44:44.357086 01b00000 ################################################################
5536 13:44:44.357252
5537 13:44:44.639982 01b80000 ################################################################
5538 13:44:44.640103
5539 13:44:44.921043 01c00000 ################################################################
5540 13:44:44.921194
5541 13:44:45.196513 01c80000 ################################################################
5542 13:44:45.196660
5543 13:44:45.448666 01d00000 ################################################################
5544 13:44:45.448802
5545 13:44:45.703758 01d80000 ################################################################
5546 13:44:45.703879
5547 13:44:45.948403 01e00000 ###################################################### done.
5548 13:44:45.948551
5549 13:44:45.951676 The bootfile was 31899454 bytes long.
5550 13:44:45.951776
5551 13:44:45.954989 Sending tftp read request... done.
5552 13:44:45.955098
5553 13:44:45.955182 Waiting for the transfer...
5554 13:44:45.955265
5555 13:44:45.958408 00000000 # done.
5556 13:44:45.958485
5557 13:44:45.964762 Command line loaded dynamically from TFTP file: 14879042/tftp-deploy-y21e4bx3/kernel/cmdline
5558 13:44:45.964865
5559 13:44:45.991114 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14879042/extract-nfsrootfs-_ht9re7n,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5560 13:44:45.991235
5561 13:44:45.991295 Loading FIT.
5562 13:44:45.991349
5563 13:44:45.994888 Image ramdisk-1 has 18725248 bytes.
5564 13:44:45.994966
5565 13:44:45.998220 Image fdt-1 has 57695 bytes.
5566 13:44:45.998295
5567 13:44:46.001578 Image kernel-1 has 13114469 bytes.
5568 13:44:46.001653
5569 13:44:46.011684 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5570 13:44:46.011762
5571 13:44:46.021489 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5572 13:44:46.021571
5573 13:44:46.027889 Choosing best match conf-1 for compat google,juniper-sku16.
5574 13:44:46.032215
5575 13:44:46.036650 Connected to device vid:did:rid of 1ae0:0028:00
5576 13:44:46.044644
5577 13:44:46.047707 tpm_get_response: command 0x17b, return code 0x0
5578 13:44:46.047807
5579 13:44:46.051389 tpm_cleanup: add release locality here.
5580 13:44:46.051483
5581 13:44:46.055036 Shutting down all USB controllers.
5582 13:44:46.055125
5583 13:44:46.057822 Removing current net device
5584 13:44:46.057896
5585 13:44:46.061382 Exiting depthcharge with code 4 at timestamp: 34622638
5586 13:44:46.061456
5587 13:44:46.064676 LZMA decompressing kernel-1 to 0x80193568
5588 13:44:46.064751
5589 13:44:46.068207 LZMA decompressing kernel-1 to 0x40000000
5590 13:44:47.933662
5591 13:44:47.933789 jumping to kernel
5592 13:44:47.934241 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
5593 13:44:47.934330 start: 2.2.5 auto-login-action (timeout 00:04:06) [common]
5594 13:44:47.934396 Setting prompt string to ['Linux version [0-9]']
5595 13:44:47.934456 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5596 13:44:47.934519 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5597 13:44:48.008349
5598 13:44:48.011456 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5599 13:44:48.015524 start: 2.2.5.1 login-action (timeout 00:04:06) [common]
5600 13:44:48.015612 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5601 13:44:48.015679 Setting prompt string to []
5602 13:44:48.015749 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5603 13:44:48.015812 Using line separator: #'\n'#
5604 13:44:48.015863 No login prompt set.
5605 13:44:48.015916 Parsing kernel messages
5606 13:44:48.015964 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5607 13:44:48.016058 [login-action] Waiting for messages, (timeout 00:04:06)
5608 13:44:48.016120 Waiting using forced prompt support (timeout 00:02:03)
5609 13:44:48.034840 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j272990-arm64-gcc-12-defconfig-arm64-chromebook-fgzcq) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Thu Jul 18 12:53:03 UTC 2024
5610 13:44:48.037854 [ 0.000000] random: crng init done
5611 13:44:48.041513 [ 0.000000] Machine model: Google juniper sku16 board
5612 13:44:48.044535 [ 0.000000] efi: UEFI not found.
5613 13:44:48.055105 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5614 13:44:48.061238 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5615 13:44:48.068002 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5616 13:44:48.074897 [ 0.000000] printk: bootconsole [mtk8250] enabled
5617 13:44:48.082472 [ 0.000000] NUMA: No NUMA configuration found
5618 13:44:48.088631 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5619 13:44:48.095421 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5620 13:44:48.095509 [ 0.000000] Zone ranges:
5621 13:44:48.101997 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5622 13:44:48.105157 [ 0.000000] DMA32 empty
5623 13:44:48.112297 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5624 13:44:48.115413 [ 0.000000] Movable zone start for each node
5625 13:44:48.118453 [ 0.000000] Early memory node ranges
5626 13:44:48.125271 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5627 13:44:48.132059 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5628 13:44:48.138793 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5629 13:44:48.145559 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5630 13:44:48.152148 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5631 13:44:48.158431 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5632 13:44:48.178571 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5633 13:44:48.185324 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5634 13:44:48.192196 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5635 13:44:48.195384 [ 0.000000] psci: probing for conduit method from DT.
5636 13:44:48.202218 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5637 13:44:48.205272 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5638 13:44:48.211828 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5639 13:44:48.215252 [ 0.000000] psci: SMC Calling Convention v1.1
5640 13:44:48.221722 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5641 13:44:48.225372 [ 0.000000] Detected VIPT I-cache on CPU0
5642 13:44:48.232003 [ 0.000000] CPU features: detected: GIC system register CPU interface
5643 13:44:48.238327 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5644 13:44:48.245499 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5645 13:44:48.248583 [ 0.000000] CPU features: detected: ARM erratum 845719
5646 13:44:48.255253 [ 0.000000] alternatives: applying boot alternatives
5647 13:44:48.258928 [ 0.000000] Fallback order for Node 0: 0
5648 13:44:48.265743 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5649 13:44:48.268879 [ 0.000000] Policy zone: Normal
5650 13:44:48.295332 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14879042/extract-nfsrootfs-_ht9re7n,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5651 13:44:48.322047 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5652 13:44:48.322154 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5653 13:44:48.325415 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5654 13:44:48.331605 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5655 13:44:48.338231 <6>[ 0.000000] software IO TLB: area num 8.
5656 13:44:48.362805 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5657 13:44:48.420520 <6>[ 0.000000] Memory: 3896788K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 261676K reserved, 32768K cma-reserved)
5658 13:44:48.427497 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5659 13:44:48.433903 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5660 13:44:48.437635 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5661 13:44:48.443913 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5662 13:44:48.450674 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5663 13:44:48.454299 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5664 13:44:48.463931 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5665 13:44:48.470746 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5666 13:44:48.474080 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5667 13:44:48.485980 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5668 13:44:48.492715 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5669 13:44:48.495844 <6>[ 0.000000] GICv3: 640 SPIs implemented
5670 13:44:48.498968 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5671 13:44:48.505977 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5672 13:44:48.509063 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5673 13:44:48.516113 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5674 13:44:48.525863 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5675 13:44:48.538944 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5676 13:44:48.545973 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5677 13:44:48.558048 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5678 13:44:48.570784 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5679 13:44:48.577602 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5680 13:44:48.584216 <6>[ 0.009464] Console: colour dummy device 80x25
5681 13:44:48.587893 <6>[ 0.014502] printk: console [tty1] enabled
5682 13:44:48.597742 <6>[ 0.018891] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5683 13:44:48.604772 <6>[ 0.029356] pid_max: default: 32768 minimum: 301
5684 13:44:48.607748 <6>[ 0.034237] LSM: Security Framework initializing
5685 13:44:48.617572 <6>[ 0.039151] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5686 13:44:48.624270 <6>[ 0.046774] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5687 13:44:48.631203 <4>[ 0.055648] cacheinfo: Unable to detect cache hierarchy for CPU 0
5688 13:44:48.641018 <6>[ 0.062274] cblist_init_generic: Setting adjustable number of callback queues.
5689 13:44:48.647587 <6>[ 0.069720] cblist_init_generic: Setting shift to 3 and lim to 1.
5690 13:44:48.654118 <6>[ 0.076073] cblist_init_generic: Setting adjustable number of callback queues.
5691 13:44:48.660890 <6>[ 0.083518] cblist_init_generic: Setting shift to 3 and lim to 1.
5692 13:44:48.663942 <6>[ 0.089918] rcu: Hierarchical SRCU implementation.
5693 13:44:48.670592 <6>[ 0.094944] rcu: Max phase no-delay instances is 1000.
5694 13:44:48.677787 <6>[ 0.102846] EFI services will not be available.
5695 13:44:48.680777 <6>[ 0.107796] smp: Bringing up secondary CPUs ...
5696 13:44:48.691263 <6>[ 0.113070] Detected VIPT I-cache on CPU1
5697 13:44:48.698223 <4>[ 0.113116] cacheinfo: Unable to detect cache hierarchy for CPU 1
5698 13:44:48.704626 <6>[ 0.113124] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5699 13:44:48.711589 <6>[ 0.113156] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5700 13:44:48.714562 <6>[ 0.113638] Detected VIPT I-cache on CPU2
5701 13:44:48.721348 <4>[ 0.113671] cacheinfo: Unable to detect cache hierarchy for CPU 2
5702 13:44:48.728256 <6>[ 0.113675] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5703 13:44:48.734465 <6>[ 0.113687] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5704 13:44:48.738163 <6>[ 0.114134] Detected VIPT I-cache on CPU3
5705 13:44:48.744768 <4>[ 0.114165] cacheinfo: Unable to detect cache hierarchy for CPU 3
5706 13:44:48.751716 <6>[ 0.114169] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5707 13:44:48.761388 <6>[ 0.114181] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5708 13:44:48.764251 <6>[ 0.114755] CPU features: detected: Spectre-v2
5709 13:44:48.767605 <6>[ 0.114765] CPU features: detected: Spectre-BHB
5710 13:44:48.774550 <6>[ 0.114769] CPU features: detected: ARM erratum 858921
5711 13:44:48.778091 <6>[ 0.114775] Detected VIPT I-cache on CPU4
5712 13:44:48.784673 <4>[ 0.114823] cacheinfo: Unable to detect cache hierarchy for CPU 4
5713 13:44:48.791023 <6>[ 0.114831] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5714 13:44:48.797885 <6>[ 0.114838] arch_timer: Enabling local workaround for ARM erratum 858921
5715 13:44:48.804618 <6>[ 0.114849] arch_timer: CPU4: Trapping CNTVCT access
5716 13:44:48.811173 <6>[ 0.114857] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5717 13:44:48.814489 <6>[ 0.115342] Detected VIPT I-cache on CPU5
5718 13:44:48.821101 <4>[ 0.115383] cacheinfo: Unable to detect cache hierarchy for CPU 5
5719 13:44:48.827850 <6>[ 0.115388] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5720 13:44:48.834623 <6>[ 0.115395] arch_timer: Enabling local workaround for ARM erratum 858921
5721 13:44:48.840841 <6>[ 0.115401] arch_timer: CPU5: Trapping CNTVCT access
5722 13:44:48.847601 <6>[ 0.115406] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5723 13:44:48.851291 <6>[ 0.115842] Detected VIPT I-cache on CPU6
5724 13:44:48.857632 <4>[ 0.115887] cacheinfo: Unable to detect cache hierarchy for CPU 6
5725 13:44:48.864200 <6>[ 0.115894] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5726 13:44:48.871190 <6>[ 0.115900] arch_timer: Enabling local workaround for ARM erratum 858921
5727 13:44:48.877914 <6>[ 0.115907] arch_timer: CPU6: Trapping CNTVCT access
5728 13:44:48.884115 <6>[ 0.115912] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5729 13:44:48.887679 <6>[ 0.116442] Detected VIPT I-cache on CPU7
5730 13:44:48.894332 <4>[ 0.116486] cacheinfo: Unable to detect cache hierarchy for CPU 7
5731 13:44:48.900807 <6>[ 0.116493] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5732 13:44:48.907836 <6>[ 0.116500] arch_timer: Enabling local workaround for ARM erratum 858921
5733 13:44:48.914634 <6>[ 0.116506] arch_timer: CPU7: Trapping CNTVCT access
5734 13:44:48.920670 <6>[ 0.116511] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5735 13:44:48.924154 <6>[ 0.116583] smp: Brought up 1 node, 8 CPUs
5736 13:44:48.930848 <6>[ 0.355461] SMP: Total of 8 processors activated.
5737 13:44:48.934234 <6>[ 0.360397] CPU features: detected: 32-bit EL0 Support
5738 13:44:48.940965 <6>[ 0.365767] CPU features: detected: 32-bit EL1 Support
5739 13:44:48.947378 <6>[ 0.371134] CPU features: detected: CRC32 instructions
5740 13:44:48.950768 <6>[ 0.376560] CPU: All CPU(s) started at EL2
5741 13:44:48.957626 <6>[ 0.380898] alternatives: applying system-wide alternatives
5742 13:44:48.960823 <6>[ 0.388954] devtmpfs: initialized
5743 13:44:48.976355 <6>[ 0.397886] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5744 13:44:48.986120 <6>[ 0.407833] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5745 13:44:48.989483 <6>[ 0.415557] pinctrl core: initialized pinctrl subsystem
5746 13:44:48.997963 <6>[ 0.422675] DMI not present or invalid.
5747 13:44:49.004313 <6>[ 0.427044] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5748 13:44:49.010776 <6>[ 0.433947] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5749 13:44:49.020675 <6>[ 0.441458] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5750 13:44:49.027492 <6>[ 0.449631] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5751 13:44:49.034030 <6>[ 0.457776] audit: initializing netlink subsys (disabled)
5752 13:44:49.040850 <5>[ 0.463459] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5753 13:44:49.047756 <6>[ 0.464414] thermal_sys: Registered thermal governor 'step_wise'
5754 13:44:49.054357 <6>[ 0.471411] thermal_sys: Registered thermal governor 'power_allocator'
5755 13:44:49.057383 <6>[ 0.477658] cpuidle: using governor menu
5756 13:44:49.064191 <6>[ 0.488605] NET: Registered PF_QIPCRTR protocol family
5757 13:44:49.070492 <6>[ 0.494096] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5758 13:44:49.077690 <6>[ 0.501188] ASID allocator initialised with 32768 entries
5759 13:44:49.080604 <6>[ 0.507966] Serial: AMBA PL011 UART driver
5760 13:44:49.094144 <4>[ 0.519293] Trying to register duplicate clock ID: 113
5761 13:44:49.153773 <6>[ 0.575768] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5762 13:44:49.168523 <6>[ 0.590156] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5763 13:44:49.171577 <6>[ 0.599930] KASLR enabled
5764 13:44:49.185958 <6>[ 0.607900] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5765 13:44:49.193186 <6>[ 0.614904] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5766 13:44:49.199435 <6>[ 0.621382] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5767 13:44:49.206123 <6>[ 0.628374] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5768 13:44:49.212625 <6>[ 0.634849] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5769 13:44:49.219507 <6>[ 0.641838] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5770 13:44:49.226388 <6>[ 0.648312] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5771 13:44:49.232626 <6>[ 0.655302] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5772 13:44:49.235636 <6>[ 0.662868] ACPI: Interpreter disabled.
5773 13:44:49.245707 <6>[ 0.670839] iommu: Default domain type: Translated
5774 13:44:49.252576 <6>[ 0.675949] iommu: DMA domain TLB invalidation policy: strict mode
5775 13:44:49.255520 <5>[ 0.682583] SCSI subsystem initialized
5776 13:44:49.262427 <6>[ 0.687005] usbcore: registered new interface driver usbfs
5777 13:44:49.268884 <6>[ 0.692731] usbcore: registered new interface driver hub
5778 13:44:49.272428 <6>[ 0.698272] usbcore: registered new device driver usb
5779 13:44:49.279295 <6>[ 0.704569] pps_core: LinuxPPS API ver. 1 registered
5780 13:44:49.289776 <6>[ 0.709754] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5781 13:44:49.293213 <6>[ 0.719079] PTP clock support registered
5782 13:44:49.296153 <6>[ 0.723331] EDAC MC: Ver: 3.0.0
5783 13:44:49.304186 <6>[ 0.728970] FPGA manager framework
5784 13:44:49.307350 <6>[ 0.732656] Advanced Linux Sound Architecture Driver Initialized.
5785 13:44:49.311119 <6>[ 0.739410] vgaarb: loaded
5786 13:44:49.318054 <6>[ 0.742533] clocksource: Switched to clocksource arch_sys_counter
5787 13:44:49.324243 <5>[ 0.748963] VFS: Disk quotas dquot_6.6.0
5788 13:44:49.331039 <6>[ 0.753138] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5789 13:44:49.334602 <6>[ 0.760314] pnp: PnP ACPI: disabled
5790 13:44:49.342447 <6>[ 0.767216] NET: Registered PF_INET protocol family
5791 13:44:49.348997 <6>[ 0.772449] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5792 13:44:49.360765 <6>[ 0.782363] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5793 13:44:49.370464 <6>[ 0.791116] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5794 13:44:49.377454 <6>[ 0.799066] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5795 13:44:49.384056 <6>[ 0.807298] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5796 13:44:49.390648 <6>[ 0.815389] TCP: Hash tables configured (established 32768 bind 32768)
5797 13:44:49.400623 <6>[ 0.822218] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5798 13:44:49.407560 <6>[ 0.829194] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5799 13:44:49.413891 <6>[ 0.836679] NET: Registered PF_UNIX/PF_LOCAL protocol family
5800 13:44:49.420532 <6>[ 0.842815] RPC: Registered named UNIX socket transport module.
5801 13:44:49.424075 <6>[ 0.848960] RPC: Registered udp transport module.
5802 13:44:49.430654 <6>[ 0.853886] RPC: Registered tcp transport module.
5803 13:44:49.437276 <6>[ 0.858809] RPC: Registered tcp NFSv4.1 backchannel transport module.
5804 13:44:49.440438 <6>[ 0.865465] PCI: CLS 0 bytes, default 64
5805 13:44:49.443532 <6>[ 0.869724] Unpacking initramfs...
5806 13:44:49.457980 <6>[ 0.879137] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5807 13:44:49.468027 <6>[ 0.887756] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5808 13:44:49.470794 <6>[ 0.896605] kvm [1]: IPA Size Limit: 40 bits
5809 13:44:49.477527 <6>[ 0.902930] kvm [1]: vgic-v2@c420000
5810 13:44:49.481264 <6>[ 0.906747] kvm [1]: GIC system register CPU interface enabled
5811 13:44:49.487548 <6>[ 0.912923] kvm [1]: vgic interrupt IRQ18
5812 13:44:49.491208 <6>[ 0.917282] kvm [1]: Hyp mode initialized successfully
5813 13:44:49.498817 <5>[ 0.923549] Initialise system trusted keyrings
5814 13:44:49.505684 <6>[ 0.928388] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5815 13:44:49.513346 <6>[ 0.938212] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5816 13:44:49.520057 <5>[ 0.944716] NFS: Registering the id_resolver key type
5817 13:44:49.523070 <5>[ 0.950027] Key type id_resolver registered
5818 13:44:49.529839 <5>[ 0.954441] Key type id_legacy registered
5819 13:44:49.536652 <6>[ 0.958747] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5820 13:44:49.543406 <6>[ 0.965673] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5821 13:44:49.549666 <6>[ 0.973427] 9p: Installing v9fs 9p2000 file system support
5822 13:44:49.577479 <5>[ 1.002429] Key type asymmetric registered
5823 13:44:49.580482 <5>[ 1.006774] Asymmetric key parser 'x509' registered
5824 13:44:49.590581 <6>[ 1.011933] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5825 13:44:49.594001 <6>[ 1.019553] io scheduler mq-deadline registered
5826 13:44:49.597352 <6>[ 1.024313] io scheduler kyber registered
5827 13:44:49.620023 <6>[ 1.045049] EINJ: ACPI disabled.
5828 13:44:49.626950 <4>[ 1.048816] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5829 13:44:49.664803 <6>[ 1.089740] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5830 13:44:49.673087 <6>[ 1.098217] printk: console [ttyS0] disabled
5831 13:44:49.701478 <6>[ 1.122871] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5832 13:44:49.707777 <6>[ 1.132346] printk: console [ttyS0] enabled
5833 13:44:49.711334 <6>[ 1.132346] printk: console [ttyS0] enabled
5834 13:44:49.718335 <6>[ 1.141262] printk: bootconsole [mtk8250] disabled
5835 13:44:49.721536 <6>[ 1.141262] printk: bootconsole [mtk8250] disabled
5836 13:44:49.731297 <3>[ 1.151797] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5837 13:44:49.738027 <3>[ 1.160179] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5838 13:44:49.767093 <6>[ 1.188590] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5839 13:44:49.773995 <6>[ 1.198249] serial serial0: tty port ttyS1 registered
5840 13:44:49.780149 <6>[ 1.204838] SuperH (H)SCI(F) driver initialized
5841 13:44:49.783773 <6>[ 1.210345] msm_serial: driver initialized
5842 13:44:49.799484 <6>[ 1.220739] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5843 13:44:49.809322 <6>[ 1.229347] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5844 13:44:49.815640 <6>[ 1.237926] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5845 13:44:49.825413 <6>[ 1.246496] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5846 13:44:49.832495 <6>[ 1.255151] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5847 13:44:49.842630 <6>[ 1.263815] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5848 13:44:49.851940 <6>[ 1.272556] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5849 13:44:49.858940 <6>[ 1.281300] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5850 13:44:49.868987 <6>[ 1.289867] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5851 13:44:49.879137 <6>[ 1.298666] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5852 13:44:49.886519 <4>[ 1.311066] cacheinfo: Unable to detect cache hierarchy for CPU 0
5853 13:44:49.895425 <6>[ 1.320425] loop: module loaded
5854 13:44:49.907534 <6>[ 1.332344] vsim1: Bringing 1800000uV into 2700000-2700000uV
5855 13:44:49.925075 <6>[ 1.350160] megasas: 07.719.03.00-rc1
5856 13:44:49.933540 <6>[ 1.358888] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5857 13:44:49.941156 <6>[ 1.365930] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5858 13:44:49.957932 <6>[ 1.382815] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5859 13:44:50.014751 <6>[ 1.433179] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5860 13:44:50.062989 <6>[ 1.487660] Freeing initrd memory: 18280K
5861 13:44:50.077547 <4>[ 1.499461] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5862 13:44:50.084687 <4>[ 1.508693] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
5863 13:44:50.091032 <4>[ 1.515391] Hardware name: Google juniper sku16 board (DT)
5864 13:44:50.094543 <4>[ 1.521131] Call trace:
5865 13:44:50.097768 <4>[ 1.523831] dump_backtrace.part.0+0xe0/0xf0
5866 13:44:50.100796 <4>[ 1.528369] show_stack+0x18/0x30
5867 13:44:50.104716 <4>[ 1.531942] dump_stack_lvl+0x64/0x80
5868 13:44:50.110972 <4>[ 1.535861] dump_stack+0x18/0x34
5869 13:44:50.114592 <4>[ 1.539430] sysfs_warn_dup+0x64/0x80
5870 13:44:50.117536 <4>[ 1.543351] sysfs_do_create_link_sd+0xf0/0x100
5871 13:44:50.121215 <4>[ 1.548139] sysfs_create_link+0x20/0x40
5872 13:44:50.127520 <4>[ 1.552319] bus_add_device+0x64/0x120
5873 13:44:50.131344 <4>[ 1.556324] device_add+0x354/0x7ec
5874 13:44:50.134197 <4>[ 1.560070] of_device_add+0x44/0x60
5875 13:44:50.140889 <4>[ 1.563904] of_platform_device_create_pdata+0x90/0x124
5876 13:44:50.144281 <4>[ 1.569386] of_platform_bus_create+0x154/0x380
5877 13:44:50.147621 <4>[ 1.574172] of_platform_populate+0x50/0xfc
5878 13:44:50.154353 <4>[ 1.578611] parse_mtd_partitions+0x1d8/0x4e0
5879 13:44:50.157545 <4>[ 1.583227] mtd_device_parse_register+0xec/0x2e0
5880 13:44:50.160647 <4>[ 1.588189] spi_nor_probe+0x280/0x2f4
5881 13:44:50.164284 <4>[ 1.592194] spi_mem_probe+0x6c/0xc0
5882 13:44:50.171030 <4>[ 1.596027] spi_probe+0x84/0xe4
5883 13:44:50.174613 <4>[ 1.599511] really_probe+0xbc/0x2dc
5884 13:44:50.177800 <4>[ 1.603342] __driver_probe_device+0x78/0x114
5885 13:44:50.180894 <4>[ 1.607954] driver_probe_device+0xd8/0x15c
5886 13:44:50.187677 <4>[ 1.612391] __device_attach_driver+0xb8/0x134
5887 13:44:50.191188 <4>[ 1.617090] bus_for_each_drv+0x7c/0xd4
5888 13:44:50.194917 <4>[ 1.621183] __device_attach+0x9c/0x1a0
5889 13:44:50.201206 <4>[ 1.625273] device_initial_probe+0x14/0x20
5890 13:44:50.204315 <4>[ 1.629710] bus_probe_device+0x98/0xa0
5891 13:44:50.207379 <4>[ 1.633801] device_add+0x3c0/0x7ec
5892 13:44:50.211235 <4>[ 1.637546] __spi_add_device+0x78/0x120
5893 13:44:50.214396 <4>[ 1.641723] spi_add_device+0x44/0x80
5894 13:44:50.221120 <4>[ 1.645640] spi_register_controller+0x704/0xb20
5895 13:44:50.224854 <4>[ 1.650513] devm_spi_register_controller+0x4c/0xac
5896 13:44:50.231149 <4>[ 1.655645] mtk_spi_probe+0x4f4/0x684
5897 13:44:50.234199 <4>[ 1.659650] platform_probe+0x68/0xc0
5898 13:44:50.238073 <4>[ 1.663569] really_probe+0xbc/0x2dc
5899 13:44:50.241146 <4>[ 1.667398] __driver_probe_device+0x78/0x114
5900 13:44:50.247810 <4>[ 1.672009] driver_probe_device+0xd8/0x15c
5901 13:44:50.251237 <4>[ 1.676446] __driver_attach+0x94/0x19c
5902 13:44:50.254559 <4>[ 1.680536] bus_for_each_dev+0x74/0xd0
5903 13:44:50.257634 <4>[ 1.684629] driver_attach+0x24/0x30
5904 13:44:50.260757 <4>[ 1.688458] bus_add_driver+0x154/0x20c
5905 13:44:50.267630 <4>[ 1.692547] driver_register+0x78/0x130
5906 13:44:50.270935 <4>[ 1.696638] __platform_driver_register+0x28/0x34
5907 13:44:50.277780 <4>[ 1.701597] mtk_spi_driver_init+0x1c/0x28
5908 13:44:50.280940 <4>[ 1.705953] do_one_initcall+0x64/0x1dc
5909 13:44:50.284015 <4>[ 1.710044] kernel_init_freeable+0x218/0x284
5910 13:44:50.287842 <4>[ 1.714659] kernel_init+0x24/0x12c
5911 13:44:50.290997 <4>[ 1.718404] ret_from_fork+0x10/0x20
5912 13:44:50.302589 <6>[ 1.727280] tun: Universal TUN/TAP device driver, 1.6
5913 13:44:50.305725 <6>[ 1.733565] thunder_xcv, ver 1.0
5914 13:44:50.309029 <6>[ 1.737082] thunder_bgx, ver 1.0
5915 13:44:50.312638 <6>[ 1.740584] nicpf, ver 1.0
5916 13:44:50.323602 <6>[ 1.744948] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5917 13:44:50.327252 <6>[ 1.752431] hns3: Copyright (c) 2017 Huawei Corporation.
5918 13:44:50.330407 <6>[ 1.758032] hclge is initializing
5919 13:44:50.336767 <6>[ 1.761619] e1000: Intel(R) PRO/1000 Network Driver
5920 13:44:50.343672 <6>[ 1.766754] e1000: Copyright (c) 1999-2006 Intel Corporation.
5921 13:44:50.346871 <6>[ 1.772778] e1000e: Intel(R) PRO/1000 Network Driver
5922 13:44:50.353849 <6>[ 1.777999] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5923 13:44:50.360030 <6>[ 1.784193] igb: Intel(R) Gigabit Ethernet Network Driver
5924 13:44:50.366683 <6>[ 1.789850] igb: Copyright (c) 2007-2014 Intel Corporation.
5925 13:44:50.373332 <6>[ 1.795695] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5926 13:44:50.380017 <6>[ 1.802218] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5927 13:44:50.383359 <6>[ 1.808770] sky2: driver version 1.30
5928 13:44:50.390296 <6>[ 1.814022] usbcore: registered new device driver r8152-cfgselector
5929 13:44:50.396630 <6>[ 1.820567] usbcore: registered new interface driver r8152
5930 13:44:50.403183 <6>[ 1.826401] VFIO - User Level meta-driver version: 0.3
5931 13:44:50.409951 <6>[ 1.834198] mtu3 11201000.usb: uwk - reg:0x420, version:101
5932 13:44:50.417007 <4>[ 1.840072] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5933 13:44:50.423322 <6>[ 1.847354] mtu3 11201000.usb: dr_mode: 1, drd: auto
5934 13:44:50.430249 <6>[ 1.852580] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5935 13:44:50.432968 <6>[ 1.858766] mtu3 11201000.usb: usb3-drd: 0
5936 13:44:50.440006 <6>[ 1.864337] mtu3 11201000.usb: xHCI platform device register success...
5937 13:44:50.451299 <4>[ 1.872978] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5938 13:44:50.458257 <6>[ 1.880940] xhci-mtk 11200000.usb: xHCI Host Controller
5939 13:44:50.464471 <6>[ 1.886447] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5940 13:44:50.471135 <6>[ 1.894187] xhci-mtk 11200000.usb: USB3 root hub has no ports
5941 13:44:50.478054 <6>[ 1.900197] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5942 13:44:50.484478 <6>[ 1.909625] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5943 13:44:50.491694 <6>[ 1.915706] xhci-mtk 11200000.usb: xHCI Host Controller
5944 13:44:50.498345 <6>[ 1.921196] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5945 13:44:50.504729 <6>[ 1.928855] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5946 13:44:50.507878 <6>[ 1.935674] hub 1-0:1.0: USB hub found
5947 13:44:50.515036 <6>[ 1.939703] hub 1-0:1.0: 1 port detected
5948 13:44:50.522037 <6>[ 1.945073] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5949 13:44:50.528800 <6>[ 1.953692] hub 2-0:1.0: USB hub found
5950 13:44:50.535539 <3>[ 1.957720] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5951 13:44:50.542296 <6>[ 1.965610] usbcore: registered new interface driver usb-storage
5952 13:44:50.549121 <6>[ 1.972219] usbcore: registered new device driver onboard-usb-hub
5953 13:44:50.565163 <4>[ 1.986647] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
5954 13:44:50.573773 <6>[ 1.998900] mt6397-rtc mt6358-rtc: registered as rtc0
5955 13:44:50.583659 <6>[ 2.004382] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-18T13:44:50 UTC (1721310290)
5956 13:44:50.587518 <6>[ 2.014259] i2c_dev: i2c /dev entries driver
5957 13:44:50.599278 <6>[ 2.020652] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5958 13:44:50.608909 <6>[ 2.029003] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5959 13:44:50.612371 <6>[ 2.037907] i2c 4-0058: Fixed dependency cycle(s) with /panel
5960 13:44:50.622291 <6>[ 2.043940] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
5961 13:44:50.638338 <6>[ 2.063301] cpu cpu0: EM: created perf domain
5962 13:44:50.648022 <6>[ 2.068816] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
5963 13:44:50.655024 <6>[ 2.080118] cpu cpu4: EM: created perf domain
5964 13:44:50.662325 <6>[ 2.087231] sdhci: Secure Digital Host Controller Interface driver
5965 13:44:50.668596 <6>[ 2.093684] sdhci: Copyright(c) Pierre Ossman
5966 13:44:50.675799 <6>[ 2.099078] Synopsys Designware Multimedia Card Interface Driver
5967 13:44:50.682116 <6>[ 2.099536] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
5968 13:44:50.685310 <6>[ 2.106129] sdhci-pltfm: SDHCI platform and OF driver helper
5969 13:44:50.693334 <6>[ 2.118796] ledtrig-cpu: registered to indicate activity on CPUs
5970 13:44:50.701278 <6>[ 2.126487] usbcore: registered new interface driver usbhid
5971 13:44:50.705004 <6>[ 2.132337] usbhid: USB HID core driver
5972 13:44:50.716208 <6>[ 2.136675] spi_master spi2: will run message pump with realtime priority
5973 13:44:50.719231 <4>[ 2.137018] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
5974 13:44:50.729768 <4>[ 2.150992] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
5975 13:44:50.739905 <6>[ 2.158365] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
5976 13:44:50.758744 <6>[ 2.174286] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
5977 13:44:50.765715 <4>[ 2.186453] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
5978 13:44:50.769068 <6>[ 2.189151] cros-ec-spi spi2.0: Chrome EC device registered
5979 13:44:50.783867 <4>[ 2.205658] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
5980 13:44:50.787517 <6>[ 2.208557] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
5981 13:44:50.797559 <4>[ 2.217326] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
5982 13:44:50.800637 <6>[ 2.219849] mmc0: new HS400 MMC card at address 0001
5983 13:44:50.806867 <4>[ 2.227586] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
5984 13:44:50.813899 <6>[ 2.232868] mmcblk0: mmc0:0001 TB2932 29.2 GiB
5985 13:44:50.826108 <6>[ 2.251018] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
5986 13:44:50.832524 <6>[ 2.254351] mmc1: new ultra high speed SDR104 SDIO card at address 0001
5987 13:44:50.839362 <6>[ 2.258881] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
5988 13:44:50.845925 <6>[ 2.270693] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
5989 13:44:50.856181 <6>[ 2.271425] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
5990 13:44:50.862442 <6>[ 2.277102] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
5991 13:44:50.872525 <6>[ 2.289420] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5992 13:44:50.879601 <6>[ 2.303669] NET: Registered PF_PACKET protocol family
5993 13:44:50.889263 <6>[ 2.306434] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
5994 13:44:50.896037 <6>[ 2.309112] 9pnet: Installing 9P2000 support
5995 13:44:50.905654 <6>[ 2.321446] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
5996 13:44:50.909470 <5>[ 2.325635] Key type dns_resolver registered
5997 13:44:50.915704 <6>[ 2.340745] registered taskstats version 1
5998 13:44:50.919432 <5>[ 2.345127] Loading compiled-in X.509 certificates
5999 13:44:50.937018 <6>[ 2.358573] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6000 13:44:50.967526 <3>[ 2.389243] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6001 13:44:50.998695 <6>[ 2.416783] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6002 13:44:51.008444 <6>[ 2.430459] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6003 13:44:51.018463 <6>[ 2.439043] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6004 13:44:51.025210 <6>[ 2.447573] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6005 13:44:51.035597 <6>[ 2.456096] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6006 13:44:51.041704 <6>[ 2.464618] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6007 13:44:51.051703 <6>[ 2.473137] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6008 13:44:51.061668 <6>[ 2.481658] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6009 13:44:51.068473 <6>[ 2.490911] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6010 13:44:51.074991 <6>[ 2.498457] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6011 13:44:51.081651 <6>[ 2.505756] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6012 13:44:51.088145 <6>[ 2.513046] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6013 13:44:51.094709 <6>[ 2.514141] hub 1-1:1.0: USB hub found
6014 13:44:51.101184 <6>[ 2.520532] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6015 13:44:51.104760 <6>[ 2.524335] hub 1-1:1.0: 3 ports detected
6016 13:44:51.111218 <6>[ 2.532141] panfrost 13040000.gpu: clock rate = 511999970
6017 13:44:51.121268 <6>[ 2.540427] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6018 13:44:51.128141 <6>[ 2.550551] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6019 13:44:51.138138 <6>[ 2.558557] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6020 13:44:51.148375 <6>[ 2.566992] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6021 13:44:51.154674 <6>[ 2.579069] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6022 13:44:51.166436 <6>[ 2.588169] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6023 13:44:51.176328 <6>[ 2.597040] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6024 13:44:51.186476 <6>[ 2.606196] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6025 13:44:51.193186 <6>[ 2.615329] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6026 13:44:51.203223 <6>[ 2.624457] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6027 13:44:51.213121 <6>[ 2.633758] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6028 13:44:51.223037 <6>[ 2.643060] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6029 13:44:51.233091 <6>[ 2.652533] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6030 13:44:51.239709 <6>[ 2.662008] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6031 13:44:51.249756 <6>[ 2.671135] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6032 13:44:51.322503 <6>[ 2.744500] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6033 13:44:51.332834 <6>[ 2.753378] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6034 13:44:51.343130 <6>[ 2.764878] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6035 13:44:51.400586 <6>[ 2.822571] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6036 13:44:52.026018 <6>[ 3.018852] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6037 13:44:52.036317 <4>[ 3.135786] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6038 13:44:52.042272 <4>[ 3.135805] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6039 13:44:52.049002 <6>[ 3.172526] r8152 1-1.2:1.0 eth0: v1.12.13
6040 13:44:52.055851 <6>[ 3.250566] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6041 13:44:52.062381 <6>[ 3.431277] Console: switching to colour frame buffer device 170x48
6042 13:44:52.068851 <6>[ 3.491907] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6043 13:44:52.090644 <6>[ 3.509250] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6044 13:44:52.108103 <6>[ 3.526517] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6045 13:44:52.114564 <6>[ 3.539088] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6046 13:44:52.125694 <6>[ 3.547291] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6047 13:44:52.135712 <6>[ 3.554434] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6048 13:44:52.155227 <6>[ 3.573720] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6049 13:44:53.386620 <6>[ 4.772529] r8152 1-1.2:1.0 eth0: carrier on
6050 13:44:55.997677 <5>[ 4.798554] Sending DHCP requests .., OK
6051 13:44:56.004550 <6>[ 7.426881] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23
6052 13:44:56.007697 <6>[ 7.435319] IP-Config: Complete:
6053 13:44:56.020886 <6>[ 7.438891] device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1
6054 13:44:56.030836 <6>[ 7.449791] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)
6055 13:44:56.042450 <6>[ 7.464152] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6056 13:44:56.051437 <6>[ 7.464162] nameserver0=192.168.201.1
6057 13:44:56.059367 <6>[ 7.484092] clk: Disabling unused clocks
6058 13:44:56.063925 <6>[ 7.492102] ALSA device list:
6059 13:44:56.073301 <6>[ 7.498190] No soundcards found.
6060 13:44:56.082466 <6>[ 7.507064] Freeing unused kernel memory: 8512K
6061 13:44:56.089230 <6>[ 7.514149] Run /init as init process
6062 13:44:56.101028 Loading, please wait...
6063 13:44:56.140279 Starting systemd-udevd version 252.22-1~deb12u1
6064 13:44:56.481469 <6>[ 7.902823] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6065 13:44:56.484578 <3>[ 7.906911] thermal_sys: Failed to find 'trips' node
6066 13:44:56.495079 <4>[ 7.912979] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6067 13:44:56.501118 <3>[ 7.916167] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6068 13:44:56.511142 <3>[ 7.916183] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6069 13:44:56.517752 <4>[ 7.916188] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6070 13:44:56.524792 <3>[ 7.930136] thermal_sys: Failed to find 'trips' node
6071 13:44:56.531773 <4>[ 7.934901] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6072 13:44:56.541628 <3>[ 7.934912] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6073 13:44:56.547893 <3>[ 7.934919] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6074 13:44:56.561343 <3>[ 7.934923] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6075 13:44:56.568218 <3>[ 7.934927] elan_i2c 2-0015: Error applying setting, reverse things back
6076 13:44:56.574453 <3>[ 7.940194] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6077 13:44:56.581358 <3>[ 7.942759] mtk-scp 10500000.scp: invalid resource
6078 13:44:56.587648 <6>[ 7.942814] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6079 13:44:56.590640 <6>[ 7.954706] remoteproc remoteproc0: scp is available
6080 13:44:56.601190 <3>[ 7.954866] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6081 13:44:56.610985 <4>[ 7.962238] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6082 13:44:56.613880 <6>[ 7.967754] mc: Linux media interface: v0.10
6083 13:44:56.624030 <3>[ 7.972308] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6084 13:44:56.630715 <4>[ 7.972325] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6085 13:44:56.637260 <6>[ 7.979010] remoteproc remoteproc0: powering up scp
6086 13:44:56.643823 <4>[ 7.979047] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6087 13:44:56.654508 <4>[ 7.979280] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6088 13:44:56.664333 <3>[ 7.989990] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6089 13:44:56.670852 <3>[ 7.996942] remoteproc remoteproc0: request_firmware failed: -2
6090 13:44:56.680852 <6>[ 8.002221] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6091 13:44:56.687790 <3>[ 8.004323] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6092 13:44:56.697582 <6>[ 8.006230] cs_system_cfg: CoreSight Configuration manager initialised
6093 13:44:56.707900 <6>[ 8.009470] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6094 13:44:56.714357 <6>[ 8.014892] videodev: Linux video capture interface: v2.00
6095 13:44:56.721332 <3>[ 8.017674] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6096 13:44:56.730840 <6>[ 8.020081] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6097 13:44:56.740720 <3>[ 8.022541] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6098 13:44:56.751178 <3>[ 8.030701] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6099 13:44:56.757575 <6>[ 8.043702] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6100 13:44:56.767399 <3>[ 8.045674] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6101 13:44:56.777331 <6>[ 8.054404] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6102 13:44:56.783708 <3>[ 8.061817] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6103 13:44:56.794984 <6>[ 8.067143] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6104 13:44:56.804813 <3>[ 8.075297] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6105 13:44:56.814207 <6>[ 8.082416] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6106 13:44:56.821108 <6>[ 8.086196] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6107 13:44:56.830725 <3>[ 8.093824] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6108 13:44:56.841203 <6>[ 8.100216] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6109 13:44:56.844434 <6>[ 8.128134] Bluetooth: Core ver 2.22
6110 13:44:56.850592 <6>[ 8.140078] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6111 13:44:56.861116 <5>[ 8.142485] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6112 13:44:56.864143 <6>[ 8.143712] NET: Registered PF_BLUETOOTH protocol family
6113 13:44:56.873960 <6>[ 8.145368] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6114 13:44:56.877670 <6>[ 8.146852] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6115 13:44:56.889420 <6>[ 8.148092] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6116 13:44:56.897023 <6>[ 8.150658] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6117 13:44:56.908415 <6>[ 8.155852] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6118 13:44:56.915297 <5>[ 8.157379] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6119 13:44:56.925117 <6>[ 8.157991] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6120 13:44:56.931366 <5>[ 8.159071] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6121 13:44:56.941582 <4>[ 8.159168] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6122 13:44:56.948976 <6>[ 8.159177] cfg80211: failed to load regulatory.db
6123 13:44:56.955276 <6>[ 8.159866] Bluetooth: HCI device and connection manager initialized
6124 13:44:56.969092 <3>[ 8.160231] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6125 13:44:56.975807 <3>[ 8.161098] debugfs: File 'Playback' in directory 'dapm' already present!
6126 13:44:56.982597 <3>[ 8.161106] debugfs: File 'Capture' in directory 'dapm' already present!
6127 13:44:56.995227 <6>[ 8.162499] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6128 13:44:57.005302 <6>[ 8.169542] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6129 13:44:57.012834 <6>[ 8.169704] usbcore: registered new interface driver uvcvideo
6130 13:44:57.022957 <6>[ 8.172384] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6131 13:44:57.029600 <6>[ 8.180841] Bluetooth: HCI socket layer initialized
6132 13:44:57.039894 <6>[ 8.271134] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6133 13:44:57.046391 <6>[ 8.274153] Bluetooth: L2CAP socket layer initialized
6134 13:44:57.053208 <6>[ 8.282061] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6135 13:44:57.059731 <6>[ 8.290030] Bluetooth: SCO socket layer initialized
6136 13:44:57.069976 <6>[ 8.295978] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6137 13:44:57.076352 <6>[ 8.328229] Bluetooth: HCI UART driver ver 2.3
6138 13:44:57.082960 <6>[ 8.478185] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6139 13:44:57.090306 <6>[ 8.484030] Bluetooth: HCI UART protocol H4 registered
6140 13:44:57.094347 <6>[ 8.484080] Bluetooth: HCI UART protocol LL registered
6141 13:44:57.101158 <6>[ 8.484093] Bluetooth: HCI UART protocol Three-wire (H5) registered
6142 13:44:57.108612 <6>[ 8.484420] Bluetooth: HCI UART protocol Broadcom registered
6143 13:44:57.119137 <4>[ 8.508068] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6144 13:44:57.122610 <4>[ 8.508068] Fallback method does not support PEC.
6145 13:44:57.128940 Begin: Loading e<6>[ 8.514334] Bluetooth: HCI UART protocol QCA registered
6146 13:44:57.135755 ssential drivers<6>[ 8.515860] Bluetooth: hci0: setting up ROME/QCA6390
6147 13:44:57.136142 ... done.
6148 13:44:57.145757 Begi<3>[ 8.522082] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6149 13:44:57.152326 n: Running /scri<6>[ 8.525094] Bluetooth: HCI UART protocol Marvell registered
6150 13:44:57.162146 pts/init-premoun<3>[ 8.537633] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6151 13:44:57.162315 t ... done.
6152 13:44:57.168616 Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
6153 13:44:57.178323 Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
6154 13:44:57.182231 Device /sys/class/net/eth0 found
6155 13:44:57.182411 done.
6156 13:44:57.188315 Begin: Waiting up to 180 secs for any network device to become available ... done.
6157 13:44:57.241978 IP-Config: eth0 hardware address 00:e0:4c:71:a7:1f mtu 1500 DHCP
6158 13:44:57.309803 <3>[ 8.729864] Bluetooth: hci0: Frame reassembly failed (-84)
6159 13:44:57.334194 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6160 13:44:57.340799 address: 192.168.201.23 broadcast: 192.168.201.255 netmask: 255.255.255.0
6161 13:44:57.347553 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6162 13:44:57.354114 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-3
6163 13:44:57.361254 domain : lava-rack
6164 13:44:57.364046 rootserver: 192.168.201.1 rootpath:
6165 13:44:57.367787 filename :
6166 13:44:57.367922 done.
6167 13:44:57.377455 Begin: Running /scripts/nfs-bottom ... done.
6168 13:44:57.401294 Begin: Running /scripts/init-bottom ... done.
6169 13:44:57.418781 <6>[ 8.840174] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6170 13:44:57.506500 <4>[ 8.927330] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6171 13:44:57.528382 <4>[ 8.949927] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6172 13:44:57.544947 <4>[ 8.966299] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6173 13:44:57.555886 <4>[ 8.980711] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6174 13:44:57.570632 <6>[ 8.995519] Bluetooth: hci0: QCA Product ID :0x00000008
6175 13:44:57.579245 <6>[ 9.001195] Bluetooth: hci0: QCA SOC Version :0x00000044
6176 13:44:57.586330 <6>[ 9.001200] Bluetooth: hci0: QCA ROM Version :0x00000302
6177 13:44:57.592993 <6>[ 9.001204] Bluetooth: hci0: QCA Patch Version:0x00000111
6178 13:44:57.596007 <6>[ 9.001209] Bluetooth: hci0: QCA controller version 0x00440302
6179 13:44:57.602872 <6>[ 9.009858] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6180 13:44:57.615695 <4>[ 9.021751] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6181 13:44:57.631923 <3>[ 9.034053] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6182 13:44:57.647516 <3>[ 9.071922] Bluetooth: hci0: QCA Failed to download patch (-2)
6183 13:44:58.805032 <6>[ 10.229840] NET: Registered PF_INET6 protocol family
6184 13:44:58.817010 <6>[ 10.242032] Segment Routing with IPv6
6185 13:44:58.825878 <6>[ 10.250474] In-situ OAM (IOAM) with IPv6
6186 13:44:59.007622 <30>[ 10.406096] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6187 13:44:59.028087 <30>[ 10.453190] systemd[1]: Detected architecture arm64.
6188 13:44:59.039951
6189 13:44:59.043166 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6190 13:44:59.043249
6191 13:44:59.082150 <30>[ 10.505911] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6192 13:45:00.120137 <30>[ 11.541582] systemd[1]: Queued start job for default target graphical.target.
6193 13:45:00.166972 <30>[ 11.588297] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6194 13:45:00.180136 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6195 13:45:00.200828 <30>[ 11.621999] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6196 13:45:00.214301 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6197 13:45:00.235985 <30>[ 11.656992] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6198 13:45:00.249683 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6199 13:45:00.267131 <30>[ 11.688189] systemd[1]: Created slice user.slice - User and Session Slice.
6200 13:45:00.278617 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6201 13:45:00.300980 <30>[ 11.719163] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6202 13:45:00.314015 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6203 13:45:00.332610 <30>[ 11.750965] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6204 13:45:00.344828 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6205 13:45:00.371584 <30>[ 11.782922] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6206 13:45:00.390531 <30>[ 11.811845] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6207 13:45:00.397689 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6208 13:45:00.417544 <30>[ 11.838738] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6209 13:45:00.430341 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6210 13:45:00.449496 <30>[ 11.870787] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6211 13:45:00.463914 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6212 13:45:00.478226 <30>[ 11.902821] systemd[1]: Reached target paths.target - Path Units.
6213 13:45:00.492983 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6214 13:45:00.509446 <30>[ 11.930748] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6215 13:45:00.522107 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6216 13:45:00.534598 <30>[ 11.958687] systemd[1]: Reached target slices.target - Slice Units.
6217 13:45:00.548940 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6218 13:45:00.562436 <30>[ 11.986743] systemd[1]: Reached target swap.target - Swaps.
6219 13:45:00.572993 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6220 13:45:00.593723 <30>[ 12.014776] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6221 13:45:00.607135 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6222 13:45:00.625812 <30>[ 12.047191] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6223 13:45:00.639763 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6224 13:45:00.660977 <30>[ 12.082060] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6225 13:45:00.674283 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6226 13:45:00.695812 <30>[ 12.116664] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6227 13:45:00.709711 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6228 13:45:00.726757 <30>[ 12.147504] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6229 13:45:00.738532 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6230 13:45:00.759079 <30>[ 12.180489] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6231 13:45:00.773264 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6232 13:45:00.792876 <30>[ 12.214169] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6233 13:45:00.806070 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6234 13:45:00.826051 <30>[ 12.247359] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6235 13:45:00.839172 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6236 13:45:00.881638 <30>[ 12.302942] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6237 13:45:00.893598 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6238 13:45:00.915341 <30>[ 12.336435] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6239 13:45:00.927032 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6240 13:45:00.950406 <30>[ 12.371754] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6241 13:45:00.963571 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6242 13:45:00.989264 <30>[ 12.403727] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6243 13:45:01.034454 <30>[ 12.455552] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6244 13:45:01.047014 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6245 13:45:01.070456 <30>[ 12.491622] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6246 13:45:01.081718 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6247 13:45:01.105810 <30>[ 12.527155] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6248 13:45:01.119387 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6249 13:45:01.161303 <6>[ 12.582253] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6250 13:45:01.186031 <30>[ 12.607440] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6251 13:45:01.199053 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6252 13:45:01.228902 <30>[ 12.650046] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6253 13:45:01.241198 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6254 13:45:01.282271 <30>[ 12.703266] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6255 13:45:01.294065 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6256 13:45:01.321250 <30>[ 12.742648] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6257 13:45:01.334568 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6258 13:45:01.354300 <6>[ 12.779127] fuse: init (API version 7.37)
6259 13:45:01.369247 <30>[ 12.791028] systemd[1]: Starting systemd-journald.service - Journal Service...
6260 13:45:01.381231 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6261 13:45:01.445977 <30>[ 12.867292] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6262 13:45:01.457713 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6263 13:45:01.484600 <30>[ 12.903022] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6264 13:45:01.495542 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6265 13:45:01.517341 <30>[ 12.938646] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6266 13:45:01.528174 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6267 13:45:01.560362 <3>[ 12.980849] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6268 13:45:01.577960 <3>[ 12.998764] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6269 13:45:01.584857 <30>[ 12.999592] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6270 13:45:01.598169 <3>[ 13.016352] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6271 13:45:01.616972 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices..<3>[ 13.036588] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6272 13:45:01.617092 .
6273 13:45:01.632231 <3>[ 13.053374] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6274 13:45:01.648970 <3>[ 13.070244] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6275 13:45:01.655475 <30>[ 13.071847] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6276 13:45:01.674957 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepag<3>[ 13.095559] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6277 13:45:01.678168 es.mount[0m - Huge Pages File System.
6278 13:45:01.691385 <3>[ 13.112276] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6279 13:45:01.702194 <30>[ 13.121657] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6280 13:45:01.713115 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6281 13:45:01.730142 <30>[ 13.151167] systemd[1]: Started systemd-journald.service - Journal Service.
6282 13:45:01.740933 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6283 13:45:01.761950 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6284 13:45:01.783055 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6285 13:45:01.803774 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6286 13:45:01.823933 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6287 13:45:01.845444 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6288 13:45:01.868578 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6289 13:45:01.892995 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6290 13:45:01.916870 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6291 13:45:01.940117 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6292 13:45:01.959460 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6293 13:45:01.979018 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6294 13:45:02.004862 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6295 13:45:02.058257 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6296 13:45:02.078553 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6297 13:45:02.103563 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6298 13:45:02.118656 <4>[ 13.542760] power_supply_show_property: 2 callbacks suppressed
6299 13:45:02.130037 <3>[ 13.542770] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6300 13:45:02.136364 <3>[ 13.555315] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6301 13:45:02.156382 <4>[ 13.557841] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6302 13:45:02.170112 <3>[ 13.557847] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6303 13:45:02.196585 <3>[ 13.618181] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6304 13:45:02.214888 <3>[ 13.635667] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6305 13:45:02.232211 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed..<3>[ 13.652404] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6306 13:45:02.232679 .
6307 13:45:02.248726 <3>[ 13.669964] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6308 13:45:02.265327 <3>[ 13.685851] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6309 13:45:02.284362 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables..<3>[ 13.704356] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6310 13:45:02.284940 .
6311 13:45:02.299856 <3>[ 13.720647] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6312 13:45:02.317499 Starting [0;1;39msyste<3>[ 13.736792] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6313 13:45:02.320774 md-sysusers.…rvice[0m - Create System Users...
6314 13:45:02.341625 <46>[ 13.762990] systemd-journald[316]: Received client request to flush runtime journal.
6315 13:45:02.351646 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6316 13:45:02.370732 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6317 13:45:02.390608 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6318 13:45:02.412651 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6319 13:45:02.434067 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6320 13:45:03.434421 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6321 13:45:03.486702 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6322 13:45:03.793857 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6323 13:45:03.883343 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6324 13:45:03.902476 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6325 13:45:03.921545 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6326 13:45:03.971064 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6327 13:45:03.997051 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6328 13:45:04.267830 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6329 13:45:04.329599 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6330 13:45:04.390255 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6331 13:45:04.610104 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6332 13:45:04.698333 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6333 13:45:04.713753 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6334 13:45:04.730448 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6335 13:45:04.778030 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6336 13:45:04.820439 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6337 13:45:04.844154 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6338 13:45:04.888410 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6339 13:45:04.914500 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6340 13:45:05.058189 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6341 13:45:05.077622 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6342 13:45:05.100242 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6343 13:45:05.123053 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6344 13:45:05.146893 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6345 13:45:05.171807 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6346 13:45:05.194118 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6347 13:45:05.213926 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6348 13:45:05.232947 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6349 13:45:05.265497 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6350 13:45:05.290883 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6351 13:45:05.324039 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6352 13:45:05.342786 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6353 13:45:05.368445 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6354 13:45:05.388051 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6355 13:45:05.405705 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6356 13:45:05.424281 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6357 13:45:05.444740 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6358 13:45:05.462320 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6359 13:45:05.477817 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6360 13:45:05.496172 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6361 13:45:05.514380 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6362 13:45:05.530758 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6363 13:45:05.570336 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6364 13:45:05.594131 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6365 13:45:05.624515 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6366 13:45:05.707418 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6367 13:45:05.732486 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6368 13:45:05.753314 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6369 13:45:05.772985 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6370 13:45:05.948325 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6371 13:45:05.992447 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6372 13:45:06.018674 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6373 13:45:06.039305 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6374 13:45:06.056489 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6375 13:45:06.093835 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6376 13:45:06.115627 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6377 13:45:06.138465 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6378 13:45:06.161940 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6379 13:45:06.214913 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6380 13:45:06.313636 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6381 13:45:06.398960
6382 13:45:06.402733 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6383 13:45:06.402827
6384 13:45:06.405389 debian-bookworm-arm64 login: root (automatic login)
6385 13:45:06.405474
6386 13:45:06.708185 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Thu Jul 18 12:53:03 UTC 2024 aarch64
6387 13:45:06.708615
6388 13:45:06.714647 The programs included with the Debian GNU/Linux system are free software;
6389 13:45:06.721558 the exact distribution terms for each program are described in the
6390 13:45:06.724805 individual files in /usr/share/doc/*/copyright.
6391 13:45:06.725075
6392 13:45:06.731872 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6393 13:45:06.735026 permitted by applicable law.
6394 13:45:07.870998 Matched prompt #10: / #
6396 13:45:07.871244 Setting prompt string to ['/ #']
6397 13:45:07.871332 end: 2.2.5.1 login-action (duration 00:00:20) [common]
6399 13:45:07.871504 end: 2.2.5 auto-login-action (duration 00:00:20) [common]
6400 13:45:07.871592 start: 2.2.6 expect-shell-connection (timeout 00:03:46) [common]
6401 13:45:07.871654 Setting prompt string to ['/ #']
6402 13:45:07.871707 Forcing a shell prompt, looking for ['/ #']
6403 13:45:07.871760 Sending line: ''
6405 13:45:07.922290 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6406 13:45:07.922607 Waiting using forced prompt support (timeout 00:02:30)
6407 13:45:07.927987 / #
6408 13:45:07.928752 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6409 13:45:07.929201 start: 2.2.7 export-device-env (timeout 00:03:46) [common]
6410 13:45:07.929621 Sending line: "export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14879042/extract-nfsrootfs-_ht9re7n'"
6412 13:45:08.035680 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14879042/extract-nfsrootfs-_ht9re7n'
6413 13:45:08.036052 Sending line: "export NFS_SERVER_IP='192.168.201.1'"
6415 13:45:08.142587 / # export NFS_SERVER_IP='192.168.201.1'
6416 13:45:08.143406 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6417 13:45:08.143870 end: 2.2 depthcharge-retry (duration 00:01:14) [common]
6418 13:45:08.144298 end: 2 depthcharge-action (duration 00:01:14) [common]
6419 13:45:08.144707 start: 3 lava-test-retry (timeout 00:08:02) [common]
6420 13:45:08.145117 start: 3.1 lava-test-shell (timeout 00:08:02) [common]
6421 13:45:08.145538 Using namespace: common
6422 13:45:08.145868 Sending line: '#'
6424 13:45:08.247116 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6425 13:45:08.252756 / # #
6426 13:45:08.253468 Using /lava-14879042
6427 13:45:08.253812 Sending line: 'export SHELL=/bin/bash'
6429 13:45:08.360757 / # export SHELL=/bin/bash
6430 13:45:08.361480 Sending line: '. /lava-14879042/environment'
6432 13:45:08.467632 / # . /lava-14879042/environment
6433 13:45:08.473600 Sending line: '/lava-14879042/bin/lava-test-runner /lava-14879042/0'
6435 13:45:08.574663 Test shell timeout: 10s (minimum of the action and connection timeout)
6436 13:45:08.579881 / # /lava-14879042/bin/lava-test-runner /lava-14879042/0
6437 13:45:08.834096 + export TESTRUN_ID=0_timesync-off
6438 13:45:08.837792 + TESTRUN_ID=0_timesync-off
6439 13:45:08.840908 + cd /lava-14879042/0/tests/0_timesync-off
6440 13:45:08.844078 ++ cat uuid
6441 13:45:08.847428 + UUID=14879042_1.6.2.3.1
6442 13:45:08.847829 + set +x
6443 13:45:08.854113 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14879042_1.6.2.3.1>
6444 13:45:08.854799 Received signal: <STARTRUN> 0_timesync-off 14879042_1.6.2.3.1
6445 13:45:08.855141 Starting test lava.0_timesync-off (14879042_1.6.2.3.1)
6446 13:45:08.855528 Skipping test definition patterns.
6447 13:45:08.857460 + systemctl stop systemd-timesyncd
6448 13:45:08.908283 + set +x
6449 13:45:08.911565 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14879042_1.6.2.3.1>
6450 13:45:08.911811 Received signal: <ENDRUN> 0_timesync-off 14879042_1.6.2.3.1
6451 13:45:08.911887 Ending use of test pattern.
6452 13:45:08.911941 Ending test lava.0_timesync-off (14879042_1.6.2.3.1), duration 0.06
6454 13:45:08.975845 + export TESTRUN_ID=1_kselftest-rtc
6455 13:45:08.978933 + TESTRUN_ID=1_kselftest-rtc
6456 13:45:08.982191 + cd /lava-14879042/0/tests/1_kselftest-rtc
6457 13:45:08.985368 ++ cat uuid
6458 13:45:08.985443 + UUID=14879042_1.6.2.3.5
6459 13:45:08.989051 + set +x
6460 13:45:08.992135 <LAVA_SIGNAL_STARTRUN 1_kselftest-rtc 14879042_1.6.2.3.5>
6461 13:45:08.992380 Received signal: <STARTRUN> 1_kselftest-rtc 14879042_1.6.2.3.5
6462 13:45:08.992445 Starting test lava.1_kselftest-rtc (14879042_1.6.2.3.5)
6463 13:45:08.992516 Skipping test definition patterns.
6464 13:45:08.995630 + cd ./automated/linux/kselftest/
6465 13:45:09.025433 + ./kselftest.sh -c rtc -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1 -E ''
6466 13:45:09.052507 INFO: install_deps skipped
6467 13:45:09.923976 --2024-07-18 13:45:09-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz
6468 13:45:09.945727 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6469 13:45:10.075123 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6470 13:45:10.204907 HTTP request sent, awaiting response... 200 OK
6471 13:45:10.208596 Length: 1919140 (1.8M) [application/octet-stream]
6472 13:45:10.211811 Saving to: 'kselftest_armhf.tar.gz'
6473 13:45:10.212196
6474 13:45:10.212498
6475 13:45:10.463278 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6476 13:45:10.720493 kselftest_armhf.tar 2%[ ] 44.98K 175KB/s
6477 13:45:11.027829 kselftest_armhf.tar 11%[=> ] 214.67K 417KB/s
6478 13:45:11.160491 kselftest_armhf.tar 42%[=======> ] 797.26K 969KB/s
6479 13:45:11.167049 kselftest_armhf.tar 100%[===================>] 1.83M 1.92MB/s in 1.0s
6480 13:45:11.167162
6481 13:45:11.337033 2024-07-18 13:45:11 (1.92 MB/s) - 'kselftest_armhf.tar.gz' saved [1919140/1919140]
6482 13:45:11.337681
6483 13:45:18.245847 skiplist:
6484 13:45:18.249594 ========================================
6485 13:45:18.253007 ========================================
6486 13:45:18.309900 rtc:rtctest
6487 13:45:18.330963 ============== Tests to run ===============
6488 13:45:18.331395 rtc:rtctest
6489 13:45:18.337492 ===========End Tests to run ===============
6490 13:45:18.337883 shardfile-rtc pass
6491 13:45:18.454290 <12>[ 29.878161] kselftest: Running tests in rtc
6492 13:45:18.464996 TAP version 13
6493 13:45:18.480802 1..1
6494 13:45:18.517796 # selftests: rtc: rtctest
6495 13:45:18.993442 # TAP version 13
6496 13:45:18.993685 # 1..8
6497 13:45:18.996523 # # Starting 8 tests from 2 test cases.
6498 13:45:18.999624 # # RUN rtc.date_read ...
6499 13:45:19.006749 # # rtctest.c:49:date_read:Current RTC date/time is 18/07/2024 13:45:18.
6500 13:45:19.009813 # # OK rtc.date_read
6501 13:45:19.012865 # ok 1 rtc.date_read
6502 13:45:19.016447 # # RUN rtc.date_read_loop ...
6503 13:45:19.026592 # # rtctest.c:88:date_read_loop:Continuously reading RTC time for 30s (with 11ms breaks after every read).
6504 13:45:26.560111 <6>[ 37.987138] vaux18: disabling
6505 13:45:26.563474 <6>[ 37.990774] vio28: disabling
6506 13:45:49.117646 # # rtctest.c:115:date_read_loop:Performed 2675 RTC time reads.
6507 13:45:49.120626 # # OK rtc.date_read_loop
6508 13:45:49.124202 # ok 2 rtc.date_read_loop
6509 13:45:49.127152 # # RUN rtc.uie_read ...
6510 13:45:52.099215 # # OK rtc.uie_read
6511 13:45:52.099662 # ok 3 rtc.uie_read
6512 13:45:52.102300 # # RUN rtc.uie_select ...
6513 13:45:55.095970 # # OK rtc.uie_select
6514 13:45:55.099017 # ok 4 rtc.uie_select
6515 13:45:55.102145 # # RUN rtc.alarm_alm_set ...
6516 13:45:55.108765 # # rtctest.c:202:alarm_alm_set:Alarm time now set to 13:45:58.
6517 13:45:55.115530 # # rtctest.c:207:alarm_alm_set:Expected -1 (-1) != rc (-1)
6518 13:45:55.119290 # # alarm_alm_set: Test terminated by assertion
6519 13:45:55.122229 # # FAIL rtc.alarm_alm_set
6520 13:45:55.125515 # not ok 5 rtc.alarm_alm_set
6521 13:45:55.129160 # # RUN rtc.alarm_wkalm_set ...
6522 13:45:55.135291 # # rtctest.c:258:alarm_wkalm_set:Alarm time now set to 18/07/2024 13:45:58.
6523 13:45:58.098892 # # OK rtc.alarm_wkalm_set
6524 13:45:58.099038 # ok 6 rtc.alarm_wkalm_set
6525 13:45:58.105233 # # RUN rtc.alarm_alm_set_minute ...
6526 13:45:58.108990 # # rtctest.c:304:alarm_alm_set_minute:Alarm time now set to 13:46:00.
6527 13:45:58.115237 # # rtctest.c:309:alarm_alm_set_minute:Expected -1 (-1) != rc (-1)
6528 13:45:58.122093 # # alarm_alm_set_minute: Test terminated by assertion
6529 13:45:58.125263 # # FAIL rtc.alarm_alm_set_minute
6530 13:45:58.128885 # not ok 7 rtc.alarm_alm_set_minute
6531 13:45:58.131827 # # RUN rtc.alarm_wkalm_set_minute ...
6532 13:45:58.138373 # # rtctest.c:360:alarm_wkalm_set_minute:Alarm time now set to 18/07/2024 13:46:00.
6533 13:46:00.099291 # # OK rtc.alarm_wkalm_set_minute
6534 13:46:00.102560 # ok 8 rtc.alarm_wkalm_set_minute
6535 13:46:00.105727 # # FAILED: 6 / 8 tests passed.
6536 13:46:00.109170 # # Totals: pass:6 fail:2 xfail:0 xpass:0 skip:0 error:0
6537 13:46:00.112719 not ok 1 selftests: rtc: rtctest # exit=1
6538 13:46:01.709248 rtc_rtctest_rtc_date_read pass
6539 13:46:01.712346 rtc_rtctest_rtc_date_read_loop pass
6540 13:46:01.715315 rtc_rtctest_rtc_uie_read pass
6541 13:46:01.718877 rtc_rtctest_rtc_uie_select pass
6542 13:46:01.721966 rtc_rtctest_rtc_alarm_alm_set fail
6543 13:46:01.725588 rtc_rtctest_rtc_alarm_wkalm_set pass
6544 13:46:01.728926 rtc_rtctest_rtc_alarm_alm_set_minute fail
6545 13:46:01.731933 rtc_rtctest_rtc_alarm_wkalm_set_minute pass
6546 13:46:01.735048 rtc_rtctest fail
6547 13:46:01.799960 + ../../utils/send-to-lava.sh ./output/result.txt
6548 13:46:01.858011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-rtc RESULT=pass>
6549 13:46:01.858286 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-rtc RESULT=pass
6551 13:46:01.896910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_date_read RESULT=pass>
6552 13:46:01.897172 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_date_read RESULT=pass
6554 13:46:01.933211 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_date_read_loop RESULT=pass
6556 13:46:01.936606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_date_read_loop RESULT=pass>
6557 13:46:01.972849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_uie_read RESULT=pass>
6558 13:46:01.973132 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_uie_read RESULT=pass
6560 13:46:02.007455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_uie_select RESULT=pass>
6561 13:46:02.007703 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_uie_select RESULT=pass
6563 13:46:02.050584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set RESULT=fail>
6564 13:46:02.050866 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set RESULT=fail
6566 13:46:02.096783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set RESULT=pass>
6567 13:46:02.097035 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set RESULT=pass
6569 13:46:02.135028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set_minute RESULT=fail>
6570 13:46:02.135272 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set_minute RESULT=fail
6572 13:46:02.184519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set_minute RESULT=pass>
6573 13:46:02.184817 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set_minute RESULT=pass
6575 13:46:02.236613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest RESULT=fail>
6576 13:46:02.236987 + set +x
6577 13:46:02.237546 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest RESULT=fail
6579 13:46:02.243431 <LAVA_SIGNAL_ENDRUN 1_kselftest-rtc 14879042_1.6.2.3.5>
6580 13:46:02.244230 Received signal: <ENDRUN> 1_kselftest-rtc 14879042_1.6.2.3.5
6581 13:46:02.244581 Ending use of test pattern.
6582 13:46:02.244870 Ending test lava.1_kselftest-rtc (14879042_1.6.2.3.5), duration 53.25
6584 13:46:02.246508 ok: lava_test_shell seems to have completed
6585 13:46:02.247623 shardfile-rtc: pass
rtc_rtctest_rtc_date_read: pass
rtc_rtctest_rtc_date_read_loop: pass
rtc_rtctest_rtc_uie_read: pass
rtc_rtctest_rtc_uie_select: pass
rtc_rtctest_rtc_alarm_alm_set: fail
rtc_rtctest_rtc_alarm_wkalm_set: pass
rtc_rtctest_rtc_alarm_alm_set_minute: fail
rtc_rtctest_rtc_alarm_wkalm_set_minute: pass
rtc_rtctest: fail
6586 13:46:02.248095 end: 3.1 lava-test-shell (duration 00:00:54) [common]
6587 13:46:02.248515 end: 3 lava-test-retry (duration 00:00:54) [common]
6588 13:46:02.249358 start: 4 finalize (timeout 00:07:08) [common]
6589 13:46:02.250213 start: 4.1 power-off (timeout 00:00:30) [common]
6590 13:46:02.250992 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
6591 13:46:04.341233 >> Command sent successfully.
6592 13:46:04.344235 Returned 0 in 2 seconds
6593 13:46:04.344374 end: 4.1 power-off (duration 00:00:02) [common]
6595 13:46:04.344580 start: 4.2 read-feedback (timeout 00:07:06) [common]
6597 13:46:04.345044 Listened to connection for namespace 'common' for up to 1s
6598 13:46:05.345983 Finalising connection for namespace 'common'
6599 13:46:05.346553 Disconnecting from shell: Finalise
6600 13:46:05.347030 / #
6601 13:46:05.447986 end: 4.2 read-feedback (duration 00:00:01) [common]
6602 13:46:05.448683 end: 4 finalize (duration 00:00:03) [common]
6603 13:46:05.449417 Cleaning after the job
6604 13:46:05.449919 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/ramdisk
6605 13:46:05.459378 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/kernel
6606 13:46:05.493188 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/dtb
6607 13:46:05.493566 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/nfsrootfs
6608 13:46:05.559230 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879042/tftp-deploy-y21e4bx3/modules
6609 13:46:05.564445 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14879042
6610 13:46:06.123791 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14879042
6611 13:46:06.123954 Job finished correctly