Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 44
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 90
1 13:53:11.442983 lava-dispatcher, installed at version: 2024.05
2 13:53:11.443182 start: 0 validate
3 13:53:11.443302 Start time: 2024-07-18 13:53:11.443296+00:00 (UTC)
4 13:53:11.443429 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:53:11.443572 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 13:53:11.704757 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:53:11.705533 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 13:53:11.968881 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:53:11.969866 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 13:53:12.239283 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:53:12.239923 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 13:53:12.504811 Using caching service: 'http://localhost/cache/?uri=%s'
13 13:53:12.505535 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
14 13:53:12.774345 validate duration: 1.33
16 13:53:12.775538 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 13:53:12.776020 start: 1.1 download-retry (timeout 00:10:00) [common]
18 13:53:12.776437 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 13:53:12.777140 Not decompressing ramdisk as can be used compressed.
20 13:53:12.777616 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 13:53:12.777958 saving as /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/ramdisk/initrd.cpio.gz
22 13:53:12.778290 total size: 5628169 (5 MB)
23 13:53:12.782571 progress 0 % (0 MB)
24 13:53:12.791410 progress 5 % (0 MB)
25 13:53:12.797725 progress 10 % (0 MB)
26 13:53:12.801329 progress 15 % (0 MB)
27 13:53:12.805174 progress 20 % (1 MB)
28 13:53:12.808061 progress 25 % (1 MB)
29 13:53:12.810970 progress 30 % (1 MB)
30 13:53:12.813795 progress 35 % (1 MB)
31 13:53:12.815877 progress 40 % (2 MB)
32 13:53:12.818203 progress 45 % (2 MB)
33 13:53:12.820174 progress 50 % (2 MB)
34 13:53:12.822411 progress 55 % (2 MB)
35 13:53:12.824258 progress 60 % (3 MB)
36 13:53:12.826022 progress 65 % (3 MB)
37 13:53:12.827856 progress 70 % (3 MB)
38 13:53:12.829400 progress 75 % (4 MB)
39 13:53:12.831063 progress 80 % (4 MB)
40 13:53:12.832511 progress 85 % (4 MB)
41 13:53:12.834197 progress 90 % (4 MB)
42 13:53:12.835671 progress 95 % (5 MB)
43 13:53:12.836996 progress 100 % (5 MB)
44 13:53:12.837231 5 MB downloaded in 0.06 s (91.06 MB/s)
45 13:53:12.837383 end: 1.1.1 http-download (duration 00:00:00) [common]
47 13:53:12.837602 end: 1.1 download-retry (duration 00:00:00) [common]
48 13:53:12.837693 start: 1.2 download-retry (timeout 00:10:00) [common]
49 13:53:12.837765 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 13:53:12.837892 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
51 13:53:12.837955 saving as /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/kernel/Image
52 13:53:12.838007 total size: 54813184 (52 MB)
53 13:53:12.838058 No compression specified
54 13:53:12.839023 progress 0 % (0 MB)
55 13:53:12.852256 progress 5 % (2 MB)
56 13:53:12.865637 progress 10 % (5 MB)
57 13:53:12.878554 progress 15 % (7 MB)
58 13:53:12.891693 progress 20 % (10 MB)
59 13:53:12.904630 progress 25 % (13 MB)
60 13:53:12.917564 progress 30 % (15 MB)
61 13:53:12.930754 progress 35 % (18 MB)
62 13:53:12.943773 progress 40 % (20 MB)
63 13:53:12.956786 progress 45 % (23 MB)
64 13:53:12.970022 progress 50 % (26 MB)
65 13:53:12.983336 progress 55 % (28 MB)
66 13:53:12.996396 progress 60 % (31 MB)
67 13:53:13.009810 progress 65 % (34 MB)
68 13:53:13.022840 progress 70 % (36 MB)
69 13:53:13.036019 progress 75 % (39 MB)
70 13:53:13.049373 progress 80 % (41 MB)
71 13:53:13.062357 progress 85 % (44 MB)
72 13:53:13.075518 progress 90 % (47 MB)
73 13:53:13.088739 progress 95 % (49 MB)
74 13:53:13.101542 progress 100 % (52 MB)
75 13:53:13.101753 52 MB downloaded in 0.26 s (198.20 MB/s)
76 13:53:13.101894 end: 1.2.1 http-download (duration 00:00:00) [common]
78 13:53:13.102096 end: 1.2 download-retry (duration 00:00:00) [common]
79 13:53:13.102172 start: 1.3 download-retry (timeout 00:10:00) [common]
80 13:53:13.102244 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 13:53:13.102374 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 13:53:13.102438 saving as /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 13:53:13.102489 total size: 57695 (0 MB)
84 13:53:13.102540 No compression specified
85 13:53:13.103628 progress 56 % (0 MB)
86 13:53:13.103880 progress 100 % (0 MB)
87 13:53:13.104065 0 MB downloaded in 0.00 s (34.97 MB/s)
88 13:53:13.104173 end: 1.3.1 http-download (duration 00:00:00) [common]
90 13:53:13.104369 end: 1.3 download-retry (duration 00:00:00) [common]
91 13:53:13.104441 start: 1.4 download-retry (timeout 00:10:00) [common]
92 13:53:13.104513 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 13:53:13.104613 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 13:53:13.104671 saving as /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/nfsrootfs/full.rootfs.tar
95 13:53:13.104722 total size: 120894716 (115 MB)
96 13:53:13.104775 Using unxz to decompress xz
97 13:53:13.105949 progress 0 % (0 MB)
98 13:53:13.436125 progress 5 % (5 MB)
99 13:53:13.766103 progress 10 % (11 MB)
100 13:53:14.104276 progress 15 % (17 MB)
101 13:53:14.418337 progress 20 % (23 MB)
102 13:53:14.717110 progress 25 % (28 MB)
103 13:53:15.054103 progress 30 % (34 MB)
104 13:53:15.374714 progress 35 % (40 MB)
105 13:53:15.541568 progress 40 % (46 MB)
106 13:53:15.720453 progress 45 % (51 MB)
107 13:53:16.011156 progress 50 % (57 MB)
108 13:53:16.372824 progress 55 % (63 MB)
109 13:53:16.701964 progress 60 % (69 MB)
110 13:53:17.031746 progress 65 % (74 MB)
111 13:53:17.362264 progress 70 % (80 MB)
112 13:53:17.703437 progress 75 % (86 MB)
113 13:53:18.023941 progress 80 % (92 MB)
114 13:53:18.350466 progress 85 % (98 MB)
115 13:53:18.681494 progress 90 % (103 MB)
116 13:53:18.990759 progress 95 % (109 MB)
117 13:53:19.333718 progress 100 % (115 MB)
118 13:53:19.339028 115 MB downloaded in 6.23 s (18.49 MB/s)
119 13:53:19.339180 end: 1.4.1 http-download (duration 00:00:06) [common]
121 13:53:19.339384 end: 1.4 download-retry (duration 00:00:06) [common]
122 13:53:19.339459 start: 1.5 download-retry (timeout 00:09:53) [common]
123 13:53:19.339532 start: 1.5.1 http-download (timeout 00:09:53) [common]
124 13:53:19.339661 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
125 13:53:19.339721 saving as /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/modules/modules.tar
126 13:53:19.339773 total size: 8611320 (8 MB)
127 13:53:19.339827 Using unxz to decompress xz
128 13:53:19.341080 progress 0 % (0 MB)
129 13:53:19.360950 progress 5 % (0 MB)
130 13:53:19.384762 progress 10 % (0 MB)
131 13:53:19.407845 progress 15 % (1 MB)
132 13:53:19.431217 progress 20 % (1 MB)
133 13:53:19.453864 progress 25 % (2 MB)
134 13:53:19.476474 progress 30 % (2 MB)
135 13:53:19.498102 progress 35 % (2 MB)
136 13:53:19.523341 progress 40 % (3 MB)
137 13:53:19.546834 progress 45 % (3 MB)
138 13:53:19.569829 progress 50 % (4 MB)
139 13:53:19.593893 progress 55 % (4 MB)
140 13:53:19.616944 progress 60 % (4 MB)
141 13:53:19.639232 progress 65 % (5 MB)
142 13:53:19.663567 progress 70 % (5 MB)
143 13:53:19.690617 progress 75 % (6 MB)
144 13:53:19.717212 progress 80 % (6 MB)
145 13:53:19.740618 progress 85 % (7 MB)
146 13:53:19.763605 progress 90 % (7 MB)
147 13:53:19.786861 progress 95 % (7 MB)
148 13:53:19.809283 progress 100 % (8 MB)
149 13:53:19.814637 8 MB downloaded in 0.47 s (17.29 MB/s)
150 13:53:19.814789 end: 1.5.1 http-download (duration 00:00:00) [common]
152 13:53:19.814992 end: 1.5 download-retry (duration 00:00:00) [common]
153 13:53:19.815067 start: 1.6 prepare-tftp-overlay (timeout 00:09:53) [common]
154 13:53:19.815140 start: 1.6.1 extract-nfsrootfs (timeout 00:09:53) [common]
155 13:53:23.308135 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14879066/extract-nfsrootfs-xvz4wwgq
156 13:53:23.308325 end: 1.6.1 extract-nfsrootfs (duration 00:00:03) [common]
157 13:53:23.308449 start: 1.6.2 lava-overlay (timeout 00:09:49) [common]
158 13:53:23.308661 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45
159 13:53:23.308826 makedir: /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin
160 13:53:23.308983 makedir: /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/tests
161 13:53:23.309125 makedir: /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/results
162 13:53:23.309259 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-add-keys
163 13:53:23.309451 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-add-sources
164 13:53:23.309622 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-background-process-start
165 13:53:23.309795 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-background-process-stop
166 13:53:23.309965 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-common-functions
167 13:53:23.310089 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-echo-ipv4
168 13:53:23.310207 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-install-packages
169 13:53:23.310335 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-installed-packages
170 13:53:23.310449 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-os-build
171 13:53:23.310562 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-probe-channel
172 13:53:23.310675 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-probe-ip
173 13:53:23.310788 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-target-ip
174 13:53:23.310900 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-target-mac
175 13:53:23.311013 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-target-storage
176 13:53:23.311165 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-test-case
177 13:53:23.311276 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-test-event
178 13:53:23.311385 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-test-feedback
179 13:53:23.311495 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-test-raise
180 13:53:23.311612 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-test-reference
181 13:53:23.311726 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-test-runner
182 13:53:23.311836 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-test-set
183 13:53:23.311946 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-test-shell
184 13:53:23.312059 Updating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-add-keys (debian)
185 13:53:23.312196 Updating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-add-sources (debian)
186 13:53:23.312319 Updating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-install-packages (debian)
187 13:53:23.312440 Updating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-installed-packages (debian)
188 13:53:23.312560 Updating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/bin/lava-os-build (debian)
189 13:53:23.312666 Creating /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/environment
190 13:53:23.312749 LAVA metadata
191 13:53:23.312811 - LAVA_JOB_ID=14879066
192 13:53:23.312866 - LAVA_DISPATCHER_IP=192.168.201.1
193 13:53:23.312954 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:49) [common]
194 13:53:23.313013 skipped lava-vland-overlay
195 13:53:23.313080 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 13:53:23.313150 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
197 13:53:23.313202 skipped lava-multinode-overlay
198 13:53:23.313313 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 13:53:23.313381 start: 1.6.2.3 test-definition (timeout 00:09:49) [common]
200 13:53:23.313443 Loading test definitions
201 13:53:23.313527 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:49) [common]
202 13:53:23.313584 Using /lava-14879066 at stage 0
203 13:53:23.313854 uuid=14879066_1.6.2.3.1 testdef=None
204 13:53:23.313933 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 13:53:23.314005 start: 1.6.2.3.2 test-overlay (timeout 00:09:49) [common]
206 13:53:23.314390 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 13:53:23.314581 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:49) [common]
209 13:53:23.315079 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 13:53:23.315279 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
212 13:53:23.315801 runner path: /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/0/tests/0_timesync-off test_uuid 14879066_1.6.2.3.1
213 13:53:23.315941 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 13:53:23.316136 start: 1.6.2.3.5 git-repo-action (timeout 00:09:49) [common]
216 13:53:23.316198 Using /lava-14879066 at stage 0
217 13:53:23.316282 Fetching tests from https://github.com/kernelci/test-definitions.git
218 13:53:23.316356 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/0/tests/1_kselftest-tpm2'
219 13:53:26.372184 Running '/usr/bin/git checkout kernelci.org
220 13:53:26.519195 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/kselftest.yaml
221 13:53:26.519576 uuid=14879066_1.6.2.3.5 testdef=None
222 13:53:26.519686 end: 1.6.2.3.5 git-repo-action (duration 00:00:03) [common]
224 13:53:26.519904 start: 1.6.2.3.6 test-overlay (timeout 00:09:46) [common]
225 13:53:26.520552 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 13:53:26.520777 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:46) [common]
228 13:53:26.521668 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 13:53:26.521903 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:46) [common]
231 13:53:26.522761 runner path: /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/0/tests/1_kselftest-tpm2 test_uuid 14879066_1.6.2.3.5
232 13:53:26.522848 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 13:53:26.522933 BRANCH='cip'
234 13:53:26.522989 SKIPFILE='/dev/null'
235 13:53:26.523039 SKIP_INSTALL='True'
236 13:53:26.523089 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz'
237 13:53:26.523141 TST_CASENAME=''
238 13:53:26.523190 TST_CMDFILES='tpm2'
239 13:53:26.523320 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 13:53:26.523494 Creating lava-test-runner.conf files
242 13:53:26.523548 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14879066/lava-overlay-kowbhw45/lava-14879066/0 for stage 0
243 13:53:26.523628 - 0_timesync-off
244 13:53:26.523686 - 1_kselftest-tpm2
245 13:53:26.523769 end: 1.6.2.3 test-definition (duration 00:00:03) [common]
246 13:53:26.523844 start: 1.6.2.4 compress-overlay (timeout 00:09:46) [common]
247 13:53:33.672362 end: 1.6.2.4 compress-overlay (duration 00:00:07) [common]
248 13:53:33.672496 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
249 13:53:33.672580 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 13:53:33.672659 end: 1.6.2 lava-overlay (duration 00:00:10) [common]
251 13:53:33.672735 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
252 13:53:33.820339 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 13:53:33.820485 start: 1.6.4 extract-modules (timeout 00:09:39) [common]
254 13:53:33.820558 extracting modules file /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14879066/extract-nfsrootfs-xvz4wwgq
255 13:53:34.039768 extracting modules file /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14879066/extract-overlay-ramdisk-kmu0upol/ramdisk
256 13:53:34.264847 end: 1.6.4 extract-modules (duration 00:00:00) [common]
257 13:53:34.264982 start: 1.6.5 apply-overlay-tftp (timeout 00:09:39) [common]
258 13:53:34.265056 [common] Applying overlay to NFS
259 13:53:34.265114 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14879066/compress-overlay-x8so67pn/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14879066/extract-nfsrootfs-xvz4wwgq
260 13:53:35.089546 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 13:53:35.089683 start: 1.6.6 configure-preseed-file (timeout 00:09:38) [common]
262 13:53:35.089771 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 13:53:35.089849 start: 1.6.7 compress-ramdisk (timeout 00:09:38) [common]
264 13:53:35.089917 Building ramdisk /var/lib/lava/dispatcher/tmp/14879066/extract-overlay-ramdisk-kmu0upol/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14879066/extract-overlay-ramdisk-kmu0upol/ramdisk
265 13:53:35.374124 >> 129966 blocks
266 13:53:37.440638 rename /var/lib/lava/dispatcher/tmp/14879066/extract-overlay-ramdisk-kmu0upol/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/ramdisk/ramdisk.cpio.gz
267 13:53:37.440805 end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
268 13:53:37.440891 start: 1.6.8 prepare-kernel (timeout 00:09:35) [common]
269 13:53:37.440967 start: 1.6.8.1 prepare-fit (timeout 00:09:35) [common]
270 13:53:37.441045 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/kernel/Image']
271 13:53:50.825730 Returned 0 in 13 seconds
272 13:53:50.825899 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/kernel/image.itb
273 13:53:51.185105 output: FIT description: Kernel Image image with one or more FDT blobs
274 13:53:51.185254 output: Created: Thu Jul 18 14:53:51 2024
275 13:53:51.185331 output: Image 0 (kernel-1)
276 13:53:51.185385 output: Description:
277 13:53:51.185437 output: Created: Thu Jul 18 14:53:51 2024
278 13:53:51.185487 output: Type: Kernel Image
279 13:53:51.185537 output: Compression: lzma compressed
280 13:53:51.185589 output: Data Size: 13114469 Bytes = 12807.10 KiB = 12.51 MiB
281 13:53:51.185638 output: Architecture: AArch64
282 13:53:51.185685 output: OS: Linux
283 13:53:51.185733 output: Load Address: 0x00000000
284 13:53:51.185781 output: Entry Point: 0x00000000
285 13:53:51.185828 output: Hash algo: crc32
286 13:53:51.185875 output: Hash value: a47b020b
287 13:53:51.185922 output: Image 1 (fdt-1)
288 13:53:51.185969 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 13:53:51.186016 output: Created: Thu Jul 18 14:53:51 2024
290 13:53:51.186063 output: Type: Flat Device Tree
291 13:53:51.186110 output: Compression: uncompressed
292 13:53:51.186157 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 13:53:51.186205 output: Architecture: AArch64
294 13:53:51.186253 output: Hash algo: crc32
295 13:53:51.186300 output: Hash value: a9713552
296 13:53:51.186347 output: Image 2 (ramdisk-1)
297 13:53:51.186441 output: Description: unavailable
298 13:53:51.186506 output: Created: Thu Jul 18 14:53:51 2024
299 13:53:51.186555 output: Type: RAMDisk Image
300 13:53:51.186602 output: Compression: uncompressed
301 13:53:51.186649 output: Data Size: 18721287 Bytes = 18282.51 KiB = 17.85 MiB
302 13:53:51.186696 output: Architecture: AArch64
303 13:53:51.186743 output: OS: Linux
304 13:53:51.186789 output: Load Address: unavailable
305 13:53:51.186836 output: Entry Point: unavailable
306 13:53:51.186883 output: Hash algo: crc32
307 13:53:51.186931 output: Hash value: dd660115
308 13:53:51.186977 output: Default Configuration: 'conf-1'
309 13:53:51.187024 output: Configuration 0 (conf-1)
310 13:53:51.187069 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 13:53:51.187116 output: Kernel: kernel-1
312 13:53:51.187163 output: Init Ramdisk: ramdisk-1
313 13:53:51.187210 output: FDT: fdt-1
314 13:53:51.187257 output: Loadables: kernel-1
315 13:53:51.187303 output:
316 13:53:51.187399 end: 1.6.8.1 prepare-fit (duration 00:00:14) [common]
317 13:53:51.187471 end: 1.6.8 prepare-kernel (duration 00:00:14) [common]
318 13:53:51.187542 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
319 13:53:51.187616 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:22) [common]
320 13:53:51.187672 No LXC device requested
321 13:53:51.187738 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 13:53:51.187806 start: 1.8 deploy-device-env (timeout 00:09:22) [common]
323 13:53:51.187871 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 13:53:51.187926 Checking files for TFTP limit of 4294967296 bytes.
325 13:53:51.188287 end: 1 tftp-deploy (duration 00:00:38) [common]
326 13:53:51.188377 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 13:53:51.188493 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 13:53:51.188588 substitutions:
329 13:53:51.188647 - {DTB}: 14879066/tftp-deploy-8zxurxoj/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 13:53:51.188702 - {INITRD}: 14879066/tftp-deploy-8zxurxoj/ramdisk/ramdisk.cpio.gz
331 13:53:51.188760 - {KERNEL}: 14879066/tftp-deploy-8zxurxoj/kernel/Image
332 13:53:51.188822 - {LAVA_MAC}: None
333 13:53:51.188873 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14879066/extract-nfsrootfs-xvz4wwgq
334 13:53:51.188923 - {NFS_SERVER_IP}: 192.168.201.1
335 13:53:51.188971 - {PRESEED_CONFIG}: None
336 13:53:51.189023 - {PRESEED_LOCAL}: None
337 13:53:51.189072 - {RAMDISK}: 14879066/tftp-deploy-8zxurxoj/ramdisk/ramdisk.cpio.gz
338 13:53:51.189120 - {ROOT_PART}: None
339 13:53:51.189171 - {ROOT}: None
340 13:53:51.189290 - {SERVER_IP}: 192.168.201.1
341 13:53:51.189359 - {TEE}: None
342 13:53:51.189426 Parsed boot commands:
343 13:53:51.189492 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 13:53:51.189653 Parsed boot commands: tftpboot 192.168.201.1 14879066/tftp-deploy-8zxurxoj/kernel/image.itb 14879066/tftp-deploy-8zxurxoj/kernel/cmdline
345 13:53:51.189742 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 13:53:51.189852 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 13:53:51.189961 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 13:53:51.190122 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 13:53:51.190185 Not connected, no need to disconnect.
350 13:53:51.190272 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 13:53:51.190356 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 13:53:51.190418 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-5'
353 13:53:51.193509 Setting prompt string to ['lava-test: # ']
354 13:53:51.193834 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 13:53:51.193940 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 13:53:51.194042 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 13:53:51.194136 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 13:53:51.194329 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=reboot']
359 13:54:00.330527 >> Command sent successfully.
360 13:54:00.345276 Returned 0 in 9 seconds
361 13:54:00.345940 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
363 13:54:00.347474 end: 2.2.2 reset-device (duration 00:00:09) [common]
364 13:54:00.348063 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
365 13:54:00.348447 Setting prompt string to 'Starting depthcharge on Juniper...'
366 13:54:00.348751 Changing prompt to 'Starting depthcharge on Juniper...'
367 13:54:00.349069 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
368 13:54:00.350821 [Enter `^Ec?' for help]
369 13:54:06.505997 [DL] 00000000 00000000 010701
370 13:54:06.511058
371 13:54:06.511567
372 13:54:06.511914 F0: 102B 0000
373 13:54:06.512266
374 13:54:06.512581 F3: 1006 0033 [0200]
375 13:54:06.514327
376 13:54:06.514763 F3: 4001 00E0 [0200]
377 13:54:06.515122
378 13:54:06.515428 F3: 0000 0000
379 13:54:06.517955
380 13:54:06.518385 V0: 0000 0000 [0001]
381 13:54:06.518718
382 13:54:06.519025 00: 1027 0002
383 13:54:06.519327
384 13:54:06.521273 01: 0000 0000
385 13:54:06.521787
386 13:54:06.522119 BP: 0C00 0251 [0000]
387 13:54:06.522428
388 13:54:06.524255 G0: 1182 0000
389 13:54:06.524678
390 13:54:06.525002 EC: 0004 0000 [0001]
391 13:54:06.525370
392 13:54:06.527531 S7: 0000 0000 [0000]
393 13:54:06.527956
394 13:54:06.531007 CC: 0000 0000 [0001]
395 13:54:06.531436
396 13:54:06.531766 T0: 0000 00DB [000F]
397 13:54:06.532073
398 13:54:06.532359 Jump to BL
399 13:54:06.532642
400 13:54:06.567221
401 13:54:06.567722
402 13:54:06.573922 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
403 13:54:06.577410 ARM64: Exception handlers installed.
404 13:54:06.580750 ARM64: Testing exception
405 13:54:06.584118 ARM64: Done test exception
406 13:54:06.588134 WDT: Last reset was cold boot
407 13:54:06.588634 SPI0(PAD0) initialized at 992727 Hz
408 13:54:06.594621 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
409 13:54:06.595109 Manufacturer: ef
410 13:54:06.601473 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
411 13:54:06.614102 Probing TPM: . done!
412 13:54:06.614598 TPM ready after 0 ms
413 13:54:06.620696 Connected to device vid:did:rid of 1ae0:0028:00
414 13:54:06.627221 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
415 13:54:06.630777 Initialized TPM device CR50 revision 0
416 13:54:06.672377 tlcl_send_startup: Startup return code is 0
417 13:54:06.672878 TPM: setup succeeded
418 13:54:06.680818 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
419 13:54:06.684460 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
420 13:54:06.687659 in-header: 03 19 00 00 08 00 00 00
421 13:54:06.690920 in-data: a2 e0 47 00 13 00 00 00
422 13:54:06.693915 Chrome EC: UHEPI supported
423 13:54:06.701169 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
424 13:54:06.704325 in-header: 03 a1 00 00 08 00 00 00
425 13:54:06.707210 in-data: 84 60 60 10 00 00 00 00
426 13:54:06.707635 Phase 1
427 13:54:06.710499 FMAP: area GBB found @ 3f5000 (12032 bytes)
428 13:54:06.717745 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
429 13:54:06.724354 VB2:vb2_check_recovery() Recovery was requested manually
430 13:54:06.727314 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
431 13:54:06.733294 Recovery requested (1009000e)
432 13:54:06.742479 tlcl_extend: response is 0
433 13:54:06.747681 tlcl_extend: response is 0
434 13:54:06.772752
435 13:54:06.773295
436 13:54:06.779189 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
437 13:54:06.782640 ARM64: Exception handlers installed.
438 13:54:06.786109 ARM64: Testing exception
439 13:54:06.789584 ARM64: Done test exception
440 13:54:06.805003 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xaa70, sec=0x201e
441 13:54:06.811785 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
442 13:54:06.815032 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
443 13:54:06.823596 [RTC]rtc_get_frequency_meter,134: input=0xf, output=778
444 13:54:06.830262 [RTC]rtc_get_frequency_meter,134: input=0x17, output=957
445 13:54:06.837406 [RTC]rtc_get_frequency_meter,134: input=0x13, output=868
446 13:54:06.844158 [RTC]rtc_get_frequency_meter,134: input=0x11, output=822
447 13:54:06.851107 [RTC]rtc_get_frequency_meter,134: input=0x10, output=800
448 13:54:06.858091 [RTC]rtc_get_frequency_meter,134: input=0xf, output=776
449 13:54:06.865144 [RTC]rtc_get_frequency_meter,134: input=0x10, output=799
450 13:54:06.868728 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xaa70
451 13:54:06.875453 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
452 13:54:06.878453 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
453 13:54:06.882243 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
454 13:54:06.885310 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
455 13:54:06.888716 in-header: 03 19 00 00 08 00 00 00
456 13:54:06.892077 in-data: a2 e0 47 00 13 00 00 00
457 13:54:06.895185 Chrome EC: UHEPI supported
458 13:54:06.901868 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
459 13:54:06.905553 in-header: 03 a1 00 00 08 00 00 00
460 13:54:06.908677 in-data: 84 60 60 10 00 00 00 00
461 13:54:06.912436 Skip loading cached calibration data
462 13:54:06.918913 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
463 13:54:06.922484 in-header: 03 a1 00 00 08 00 00 00
464 13:54:06.925820 in-data: 84 60 60 10 00 00 00 00
465 13:54:06.932703 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
466 13:54:06.935772 in-header: 03 a1 00 00 08 00 00 00
467 13:54:06.939107 in-data: 84 60 60 10 00 00 00 00
468 13:54:06.942306 ADC[3]: Raw value=1041012 ID=8
469 13:54:06.942769 Manufacturer: ef
470 13:54:06.949323 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
471 13:54:06.952590 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
472 13:54:06.955909 CBFS @ 21000 size 3d4000
473 13:54:06.958858 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
474 13:54:06.965743 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
475 13:54:06.968899 CBFS: Found @ offset 3c880 size 4b
476 13:54:06.969358 DRAM-K: Full Calibration
477 13:54:06.975570 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
478 13:54:06.976076 CBFS @ 21000 size 3d4000
479 13:54:06.982461 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
480 13:54:06.985935 CBFS: Locating 'fallback/dram'
481 13:54:06.989167 CBFS: Found @ offset 24b00 size 12268
482 13:54:07.016842 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
483 13:54:07.019826 ddr_geometry: 1, config: 0x0
484 13:54:07.023484 header.status = 0x0
485 13:54:07.026489 header.magic = 0x44524d4b (expected: 0x44524d4b)
486 13:54:07.029958 header.version = 0x5 (expected: 0x5)
487 13:54:07.033335 header.size = 0x8f0 (expected: 0x8f0)
488 13:54:07.033846 header.config = 0x0
489 13:54:07.036433 header.flags = 0x0
490 13:54:07.036858 header.checksum = 0x0
491 13:54:07.043213 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
492 13:54:07.049823 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
493 13:54:07.053534 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
494 13:54:07.056941 ddr_geometry:1
495 13:54:07.057493 [EMI] new MDL number = 1
496 13:54:07.060149 dram_cbt_mode_extern: 0
497 13:54:07.063639 dram_cbt_mode [RK0]: 0, [RK1]: 0
498 13:54:07.070333 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
499 13:54:07.070847
500 13:54:07.071378
501 13:54:07.071724 [Bianco] ETT version 0.0.0.1
502 13:54:07.076924 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
503 13:54:07.077401
504 13:54:07.080094 vSetVcoreByFreq with vcore:762500, freq=1600
505 13:54:07.080522
506 13:54:07.080853 [DramcInit]
507 13:54:07.083652 AutoRefreshCKEOff AutoREF OFF
508 13:54:07.086778 DDRPhyPLLSetting-CKEOFF
509 13:54:07.090231 DDRPhyPLLSetting-CKEON
510 13:54:07.090732
511 13:54:07.091075 Enable WDQS
512 13:54:07.093744 [ModeRegInit_LP4] CH0 RK0
513 13:54:07.097509 Write Rank0 MR13 =0x18
514 13:54:07.098025 Write Rank0 MR12 =0x5d
515 13:54:07.100851 Write Rank0 MR1 =0x56
516 13:54:07.103842 Write Rank0 MR2 =0x1a
517 13:54:07.104274 Write Rank0 MR11 =0x0
518 13:54:07.107389 Write Rank0 MR22 =0x38
519 13:54:07.107820 Write Rank0 MR14 =0x5d
520 13:54:07.110651 Write Rank0 MR3 =0x30
521 13:54:07.113906 Write Rank0 MR13 =0x58
522 13:54:07.114334 Write Rank0 MR12 =0x5d
523 13:54:07.117750 Write Rank0 MR1 =0x56
524 13:54:07.118257 Write Rank0 MR2 =0x2d
525 13:54:07.121157 Write Rank0 MR11 =0x23
526 13:54:07.124118 Write Rank0 MR22 =0x34
527 13:54:07.124548 Write Rank0 MR14 =0x10
528 13:54:07.127442 Write Rank0 MR3 =0x30
529 13:54:07.127872 Write Rank0 MR13 =0xd8
530 13:54:07.131271 [ModeRegInit_LP4] CH0 RK1
531 13:54:07.134463 Write Rank1 MR13 =0x18
532 13:54:07.134964 Write Rank1 MR12 =0x5d
533 13:54:07.137511 Write Rank1 MR1 =0x56
534 13:54:07.141279 Write Rank1 MR2 =0x1a
535 13:54:07.141799 Write Rank1 MR11 =0x0
536 13:54:07.144775 Write Rank1 MR22 =0x38
537 13:54:07.145393 Write Rank1 MR14 =0x5d
538 13:54:07.148111 Write Rank1 MR3 =0x30
539 13:54:07.148614 Write Rank1 MR13 =0x58
540 13:54:07.151557 Write Rank1 MR12 =0x5d
541 13:54:07.154536 Write Rank1 MR1 =0x56
542 13:54:07.154967 Write Rank1 MR2 =0x2d
543 13:54:07.157783 Write Rank1 MR11 =0x23
544 13:54:07.161579 Write Rank1 MR22 =0x34
545 13:54:07.162105 Write Rank1 MR14 =0x10
546 13:54:07.164418 Write Rank1 MR3 =0x30
547 13:54:07.164864 Write Rank1 MR13 =0xd8
548 13:54:07.168028 [ModeRegInit_LP4] CH1 RK0
549 13:54:07.171324 Write Rank0 MR13 =0x18
550 13:54:07.171755 Write Rank0 MR12 =0x5d
551 13:54:07.174581 Write Rank0 MR1 =0x56
552 13:54:07.175007 Write Rank0 MR2 =0x1a
553 13:54:07.177907 Write Rank0 MR11 =0x0
554 13:54:07.181681 Write Rank0 MR22 =0x38
555 13:54:07.182165 Write Rank0 MR14 =0x5d
556 13:54:07.184768 Write Rank0 MR3 =0x30
557 13:54:07.185337 Write Rank0 MR13 =0x58
558 13:54:07.188283 Write Rank0 MR12 =0x5d
559 13:54:07.191589 Write Rank0 MR1 =0x56
560 13:54:07.192093 Write Rank0 MR2 =0x2d
561 13:54:07.194583 Write Rank0 MR11 =0x23
562 13:54:07.197934 Write Rank0 MR22 =0x34
563 13:54:07.198362 Write Rank0 MR14 =0x10
564 13:54:07.201894 Write Rank0 MR3 =0x30
565 13:54:07.202393 Write Rank0 MR13 =0xd8
566 13:54:07.205281 [ModeRegInit_LP4] CH1 RK1
567 13:54:07.208483 Write Rank1 MR13 =0x18
568 13:54:07.208998 Write Rank1 MR12 =0x5d
569 13:54:07.211543 Write Rank1 MR1 =0x56
570 13:54:07.211970 Write Rank1 MR2 =0x1a
571 13:54:07.215213 Write Rank1 MR11 =0x0
572 13:54:07.218130 Write Rank1 MR22 =0x38
573 13:54:07.218561 Write Rank1 MR14 =0x5d
574 13:54:07.221501 Write Rank1 MR3 =0x30
575 13:54:07.221929 Write Rank1 MR13 =0x58
576 13:54:07.225451 Write Rank1 MR12 =0x5d
577 13:54:07.228356 Write Rank1 MR1 =0x56
578 13:54:07.228785 Write Rank1 MR2 =0x2d
579 13:54:07.232004 Write Rank1 MR11 =0x23
580 13:54:07.234938 Write Rank1 MR22 =0x34
581 13:54:07.235367 Write Rank1 MR14 =0x10
582 13:54:07.238585 Write Rank1 MR3 =0x30
583 13:54:07.239097 Write Rank1 MR13 =0xd8
584 13:54:07.241971 match AC timing 3
585 13:54:07.252175 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
586 13:54:07.252697 [MiockJmeterHQA]
587 13:54:07.255470 vSetVcoreByFreq with vcore:762500, freq=1600
588 13:54:07.361002
589 13:54:07.361565 MIOCK jitter meter ch=0
590 13:54:07.361906
591 13:54:07.364026 1T = (101-18) = 83 dly cells
592 13:54:07.370698 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 753/100 ps
593 13:54:07.374064 vSetVcoreByFreq with vcore:725000, freq=1200
594 13:54:07.472299
595 13:54:07.472802 MIOCK jitter meter ch=0
596 13:54:07.473132
597 13:54:07.475414 1T = (95-17) = 78 dly cells
598 13:54:07.482327 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
599 13:54:07.485274 vSetVcoreByFreq with vcore:725000, freq=800
600 13:54:07.583470
601 13:54:07.583970 MIOCK jitter meter ch=0
602 13:54:07.584301
603 13:54:07.587046 1T = (95-17) = 78 dly cells
604 13:54:07.593681 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
605 13:54:07.597052 vSetVcoreByFreq with vcore:762500, freq=1600
606 13:54:07.600526 vSetVcoreByFreq with vcore:762500, freq=1600
607 13:54:07.601035
608 13:54:07.601415 K DRVP
609 13:54:07.603525 1. OCD DRVP=0 CALOUT=0
610 13:54:07.606895 1. OCD DRVP=1 CALOUT=0
611 13:54:07.607412 1. OCD DRVP=2 CALOUT=0
612 13:54:07.610509 1. OCD DRVP=3 CALOUT=0
613 13:54:07.611028 1. OCD DRVP=4 CALOUT=0
614 13:54:07.613891 1. OCD DRVP=5 CALOUT=0
615 13:54:07.617155 1. OCD DRVP=6 CALOUT=0
616 13:54:07.617719 1. OCD DRVP=7 CALOUT=0
617 13:54:07.620343 1. OCD DRVP=8 CALOUT=1
618 13:54:07.620779
619 13:54:07.623807 1. OCD DRVP calibration OK! DRVP=8
620 13:54:07.624330
621 13:54:07.624663
622 13:54:07.624965
623 13:54:07.625293 K ODTN
624 13:54:07.627248 3. OCD ODTN=0 ,CALOUT=1
625 13:54:07.630734 3. OCD ODTN=1 ,CALOUT=1
626 13:54:07.631252 3. OCD ODTN=2 ,CALOUT=1
627 13:54:07.633767 3. OCD ODTN=3 ,CALOUT=1
628 13:54:07.634203 3. OCD ODTN=4 ,CALOUT=1
629 13:54:07.636982 3. OCD ODTN=5 ,CALOUT=1
630 13:54:07.640760 3. OCD ODTN=6 ,CALOUT=1
631 13:54:07.641326 3. OCD ODTN=7 ,CALOUT=0
632 13:54:07.641682
633 13:54:07.643828 3. OCD ODTN calibration OK! ODTN=7
634 13:54:07.644267
635 13:54:07.647113 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
636 13:54:07.654285 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
637 13:54:07.657588 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
638 13:54:07.658124
639 13:54:07.658467 K DRVP
640 13:54:07.660595 1. OCD DRVP=0 CALOUT=0
641 13:54:07.664290 1. OCD DRVP=1 CALOUT=0
642 13:54:07.664817 1. OCD DRVP=2 CALOUT=0
643 13:54:07.667620 1. OCD DRVP=3 CALOUT=0
644 13:54:07.668150 1. OCD DRVP=4 CALOUT=0
645 13:54:07.670797 1. OCD DRVP=5 CALOUT=0
646 13:54:07.674283 1. OCD DRVP=6 CALOUT=0
647 13:54:07.674804 1. OCD DRVP=7 CALOUT=0
648 13:54:07.677499 1. OCD DRVP=8 CALOUT=0
649 13:54:07.681120 1. OCD DRVP=9 CALOUT=0
650 13:54:07.681680 1. OCD DRVP=10 CALOUT=1
651 13:54:07.682030
652 13:54:07.684428 1. OCD DRVP calibration OK! DRVP=10
653 13:54:07.684948
654 13:54:07.685326
655 13:54:07.685637
656 13:54:07.687755 K ODTN
657 13:54:07.688198 3. OCD ODTN=0 ,CALOUT=1
658 13:54:07.691224 3. OCD ODTN=1 ,CALOUT=1
659 13:54:07.691730 3. OCD ODTN=2 ,CALOUT=1
660 13:54:07.694642 3. OCD ODTN=3 ,CALOUT=1
661 13:54:07.697939 3. OCD ODTN=4 ,CALOUT=1
662 13:54:07.698453 3. OCD ODTN=5 ,CALOUT=1
663 13:54:07.701018 3. OCD ODTN=6 ,CALOUT=1
664 13:54:07.704563 3. OCD ODTN=7 ,CALOUT=1
665 13:54:07.705006 3. OCD ODTN=8 ,CALOUT=1
666 13:54:07.708146 3. OCD ODTN=9 ,CALOUT=1
667 13:54:07.711488 3. OCD ODTN=10 ,CALOUT=1
668 13:54:07.711999 3. OCD ODTN=11 ,CALOUT=1
669 13:54:07.714674 3. OCD ODTN=12 ,CALOUT=1
670 13:54:07.718156 3. OCD ODTN=13 ,CALOUT=1
671 13:54:07.718670 3. OCD ODTN=14 ,CALOUT=1
672 13:54:07.721260 3. OCD ODTN=15 ,CALOUT=0
673 13:54:07.721718
674 13:54:07.725050 3. OCD ODTN calibration OK! ODTN=15
675 13:54:07.725620
676 13:54:07.728261 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
677 13:54:07.731575 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
678 13:54:07.738145 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
679 13:54:07.738658
680 13:54:07.738994 [DramcInit]
681 13:54:07.741681 AutoRefreshCKEOff AutoREF OFF
682 13:54:07.744899 DDRPhyPLLSetting-CKEOFF
683 13:54:07.745390 DDRPhyPLLSetting-CKEON
684 13:54:07.745804
685 13:54:07.748476 Enable WDQS
686 13:54:07.748980 ==
687 13:54:07.751468 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
688 13:54:07.755204 fsp= 1, odt_onoff= 1, Byte mode= 0
689 13:54:07.755723 ==
690 13:54:07.758359 [Duty_Offset_Calibration]
691 13:54:07.758805
692 13:54:07.761794 ===========================
693 13:54:07.762473 B0:1 B1:0 CA:0
694 13:54:07.783115 ==
695 13:54:07.786403 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
696 13:54:07.789684 fsp= 1, odt_onoff= 1, Byte mode= 0
697 13:54:07.790122 ==
698 13:54:07.793058 [Duty_Offset_Calibration]
699 13:54:07.793760
700 13:54:07.796221 ===========================
701 13:54:07.796655 B0:1 B1:0 CA:-1
702 13:54:07.829445 [ModeRegInit_LP4] CH0 RK0
703 13:54:07.832786 Write Rank0 MR13 =0x18
704 13:54:07.833334 Write Rank0 MR12 =0x5d
705 13:54:07.836270 Write Rank0 MR1 =0x56
706 13:54:07.839452 Write Rank0 MR2 =0x1a
707 13:54:07.839885 Write Rank0 MR11 =0x0
708 13:54:07.842946 Write Rank0 MR22 =0x38
709 13:54:07.843374 Write Rank0 MR14 =0x5d
710 13:54:07.846366 Write Rank0 MR3 =0x30
711 13:54:07.849910 Write Rank0 MR13 =0x58
712 13:54:07.850412 Write Rank0 MR12 =0x5d
713 13:54:07.852950 Write Rank0 MR1 =0x56
714 13:54:07.853490 Write Rank0 MR2 =0x2d
715 13:54:07.856245 Write Rank0 MR11 =0x23
716 13:54:07.859604 Write Rank0 MR22 =0x34
717 13:54:07.860039 Write Rank0 MR14 =0x10
718 13:54:07.863303 Write Rank0 MR3 =0x30
719 13:54:07.866394 Write Rank0 MR13 =0xd8
720 13:54:07.866897 [ModeRegInit_LP4] CH0 RK1
721 13:54:07.869539 Write Rank1 MR13 =0x18
722 13:54:07.870115 Write Rank1 MR12 =0x5d
723 13:54:07.873355 Write Rank1 MR1 =0x56
724 13:54:07.876745 Write Rank1 MR2 =0x1a
725 13:54:07.877286 Write Rank1 MR11 =0x0
726 13:54:07.879635 Write Rank1 MR22 =0x38
727 13:54:07.880065 Write Rank1 MR14 =0x5d
728 13:54:07.883262 Write Rank1 MR3 =0x30
729 13:54:07.886573 Write Rank1 MR13 =0x58
730 13:54:07.887082 Write Rank1 MR12 =0x5d
731 13:54:07.889900 Write Rank1 MR1 =0x56
732 13:54:07.890328 Write Rank1 MR2 =0x2d
733 13:54:07.893560 Write Rank1 MR11 =0x23
734 13:54:07.896754 Write Rank1 MR22 =0x34
735 13:54:07.897274 Write Rank1 MR14 =0x10
736 13:54:07.900213 Write Rank1 MR3 =0x30
737 13:54:07.900714 Write Rank1 MR13 =0xd8
738 13:54:07.903249 [ModeRegInit_LP4] CH1 RK0
739 13:54:07.907009 Write Rank0 MR13 =0x18
740 13:54:07.907512 Write Rank0 MR12 =0x5d
741 13:54:07.910167 Write Rank0 MR1 =0x56
742 13:54:07.913338 Write Rank0 MR2 =0x1a
743 13:54:07.913771 Write Rank0 MR11 =0x0
744 13:54:07.917011 Write Rank0 MR22 =0x38
745 13:54:07.917571 Write Rank0 MR14 =0x5d
746 13:54:07.919936 Write Rank0 MR3 =0x30
747 13:54:07.923541 Write Rank0 MR13 =0x58
748 13:54:07.924079 Write Rank0 MR12 =0x5d
749 13:54:07.926890 Write Rank0 MR1 =0x56
750 13:54:07.927318 Write Rank0 MR2 =0x2d
751 13:54:07.930253 Write Rank0 MR11 =0x23
752 13:54:07.933667 Write Rank0 MR22 =0x34
753 13:54:07.934172 Write Rank0 MR14 =0x10
754 13:54:07.937037 Write Rank0 MR3 =0x30
755 13:54:07.937525 Write Rank0 MR13 =0xd8
756 13:54:07.940469 [ModeRegInit_LP4] CH1 RK1
757 13:54:07.943566 Write Rank1 MR13 =0x18
758 13:54:07.944070 Write Rank1 MR12 =0x5d
759 13:54:07.947132 Write Rank1 MR1 =0x56
760 13:54:07.950512 Write Rank1 MR2 =0x1a
761 13:54:07.951014 Write Rank1 MR11 =0x0
762 13:54:07.953560 Write Rank1 MR22 =0x38
763 13:54:07.953988 Write Rank1 MR14 =0x5d
764 13:54:07.957341 Write Rank1 MR3 =0x30
765 13:54:07.960446 Write Rank1 MR13 =0x58
766 13:54:07.960873 Write Rank1 MR12 =0x5d
767 13:54:07.964072 Write Rank1 MR1 =0x56
768 13:54:07.964574 Write Rank1 MR2 =0x2d
769 13:54:07.966992 Write Rank1 MR11 =0x23
770 13:54:07.970407 Write Rank1 MR22 =0x34
771 13:54:07.970838 Write Rank1 MR14 =0x10
772 13:54:07.973952 Write Rank1 MR3 =0x30
773 13:54:07.974458 Write Rank1 MR13 =0xd8
774 13:54:07.977331 match AC timing 3
775 13:54:07.987527 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
776 13:54:07.988039 DramC Write-DBI off
777 13:54:07.990839 DramC Read-DBI off
778 13:54:07.991341 Write Rank0 MR13 =0x59
779 13:54:07.994192 ==
780 13:54:07.997606 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
781 13:54:08.000889 fsp= 1, odt_onoff= 1, Byte mode= 0
782 13:54:08.001442 ==
783 13:54:08.004106 === u2Vref_new: 0x56 --> 0x2d
784 13:54:08.007714 === u2Vref_new: 0x58 --> 0x38
785 13:54:08.011075 === u2Vref_new: 0x5a --> 0x39
786 13:54:08.013875 === u2Vref_new: 0x5c --> 0x3c
787 13:54:08.017400 === u2Vref_new: 0x5e --> 0x3d
788 13:54:08.017900 === u2Vref_new: 0x60 --> 0xa0
789 13:54:08.021145 [CA 0] Center 33 (4~63) winsize 60
790 13:54:08.024672 [CA 1] Center 34 (6~63) winsize 58
791 13:54:08.028177 [CA 2] Center 27 (-1~55) winsize 57
792 13:54:08.030901 [CA 3] Center 23 (-4~51) winsize 56
793 13:54:08.034623 [CA 4] Center 24 (-3~52) winsize 56
794 13:54:08.038060 [CA 5] Center 28 (-1~58) winsize 60
795 13:54:08.038567
796 13:54:08.041307 [CATrainingPosCal] consider 1 rank data
797 13:54:08.044671 u2DelayCellTimex100 = 753/100 ps
798 13:54:08.047737 CA0 delay=33 (4~63),Diff = 10 PI (12 cell)
799 13:54:08.051426 CA1 delay=34 (6~63),Diff = 11 PI (14 cell)
800 13:54:08.054656 CA2 delay=27 (-1~55),Diff = 4 PI (5 cell)
801 13:54:08.061370 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
802 13:54:08.064444 CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)
803 13:54:08.068219 CA5 delay=28 (-1~58),Diff = 5 PI (6 cell)
804 13:54:08.068786
805 13:54:08.071641 CA PerBit enable=1, Macro0, CA PI delay=23
806 13:54:08.074834 === u2Vref_new: 0x56 --> 0x2d
807 13:54:08.075259
808 13:54:08.075662 Vref(ca) range 1: 22
809 13:54:08.076013
810 13:54:08.077901 CS Dly= 10 (41-0-32)
811 13:54:08.081299 Write Rank0 MR13 =0xd8
812 13:54:08.081726 Write Rank0 MR13 =0xd8
813 13:54:08.084747 Write Rank0 MR12 =0x56
814 13:54:08.085294 Write Rank1 MR13 =0x59
815 13:54:08.088532 ==
816 13:54:08.091851 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
817 13:54:08.095432 fsp= 1, odt_onoff= 1, Byte mode= 0
818 13:54:08.095938 ==
819 13:54:08.098365 === u2Vref_new: 0x56 --> 0x2d
820 13:54:08.101697 === u2Vref_new: 0x58 --> 0x38
821 13:54:08.105007 === u2Vref_new: 0x5a --> 0x39
822 13:54:08.108716 === u2Vref_new: 0x5c --> 0x3c
823 13:54:08.112013 === u2Vref_new: 0x5e --> 0x3d
824 13:54:08.112522 === u2Vref_new: 0x60 --> 0xa0
825 13:54:08.115585 [CA 0] Center 33 (4~63) winsize 60
826 13:54:08.118754 [CA 1] Center 34 (5~63) winsize 59
827 13:54:08.122075 [CA 2] Center 28 (0~56) winsize 57
828 13:54:08.125597 [CA 3] Center 23 (-4~51) winsize 56
829 13:54:08.128855 [CA 4] Center 24 (-3~52) winsize 56
830 13:54:08.132247 [CA 5] Center 29 (0~58) winsize 59
831 13:54:08.132747
832 13:54:08.135544 [CATrainingPosCal] consider 2 rank data
833 13:54:08.138771 u2DelayCellTimex100 = 753/100 ps
834 13:54:08.142134 CA0 delay=33 (4~63),Diff = 10 PI (12 cell)
835 13:54:08.145430 CA1 delay=34 (6~63),Diff = 11 PI (14 cell)
836 13:54:08.149407 CA2 delay=27 (0~55),Diff = 4 PI (5 cell)
837 13:54:08.155824 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
838 13:54:08.159013 CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)
839 13:54:08.162238 CA5 delay=29 (0~58),Diff = 6 PI (7 cell)
840 13:54:08.162685
841 13:54:08.165519 CA PerBit enable=1, Macro0, CA PI delay=23
842 13:54:08.169171 === u2Vref_new: 0x56 --> 0x2d
843 13:54:08.169735
844 13:54:08.170083 Vref(ca) range 1: 22
845 13:54:08.170385
846 13:54:08.172776 CS Dly= 7 (38-0-32)
847 13:54:08.176131 Write Rank1 MR13 =0xd8
848 13:54:08.176628 Write Rank1 MR13 =0xd8
849 13:54:08.179414 Write Rank1 MR12 =0x56
850 13:54:08.182642 [RankSwap] Rank num 2, (Multi 1), Rank 0
851 13:54:08.183185 Write Rank0 MR2 =0xad
852 13:54:08.185878 [Write Leveling]
853 13:54:08.189153 delay byte0 byte1 byte2 byte3
854 13:54:08.189641
855 13:54:08.190050 10 0 0
856 13:54:08.192705 11 0 0
857 13:54:08.193138 12 0 0
858 13:54:08.193546 13 0 0
859 13:54:08.196021 14 0 0
860 13:54:08.196528 15 0 0
861 13:54:08.199231 16 0 0
862 13:54:08.199663 17 0 0
863 13:54:08.202619 18 0 0
864 13:54:08.203093 19 0 0
865 13:54:08.203652 20 0 0
866 13:54:08.206035 21 0 0
867 13:54:08.206469 22 0 0
868 13:54:08.209497 23 0 0
869 13:54:08.209929 24 0 0
870 13:54:08.210262 25 0 0
871 13:54:08.213007 26 0 0
872 13:54:08.213514 27 0 0
873 13:54:08.216005 28 0 ff
874 13:54:08.216393 29 0 ff
875 13:54:08.219385 30 0 ff
876 13:54:08.219775 31 0 ff
877 13:54:08.220079 32 0 ff
878 13:54:08.222683 33 ff ff
879 13:54:08.223074 34 ff ff
880 13:54:08.226133 35 ff ff
881 13:54:08.226520 36 ff ff
882 13:54:08.229422 37 ff ff
883 13:54:08.229898 38 ff ff
884 13:54:08.233051 39 ff ff
885 13:54:08.236344 pass bytecount = 0xff (0xff: all bytes pass)
886 13:54:08.236808
887 13:54:08.237107 DQS0 dly: 33
888 13:54:08.239771 DQS1 dly: 28
889 13:54:08.240238 Write Rank0 MR2 =0x2d
890 13:54:08.243300 [RankSwap] Rank num 2, (Multi 1), Rank 0
891 13:54:08.246275 Write Rank0 MR1 =0xd6
892 13:54:08.246663 [Gating]
893 13:54:08.246955 ==
894 13:54:08.253322 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
895 13:54:08.256485 fsp= 1, odt_onoff= 1, Byte mode= 0
896 13:54:08.256871 ==
897 13:54:08.259613 3 1 0 |3534 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
898 13:54:08.263479 3 1 4 |3534 1312 |(11 11)(11 11) |(0 0)(1 1)| 0
899 13:54:08.270206 3 1 8 |3534 3433 |(11 11)(11 11) |(0 0)(0 1)| 0
900 13:54:08.273343 3 1 12 |3534 b0b |(11 11)(11 11) |(0 0)(0 1)| 0
901 13:54:08.277016 3 1 16 |3534 3535 |(11 11)(11 11) |(0 0)(0 1)| 0
902 13:54:08.280183 3 1 20 |3534 3434 |(11 11)(11 11) |(0 0)(0 1)| 0
903 13:54:08.286829 3 1 24 |3534 3333 |(11 11)(11 11) |(0 1)(1 1)| 0
904 13:54:08.290356 3 1 28 |3534 1515 |(11 11)(11 11) |(0 1)(1 0)| 0
905 13:54:08.294036 3 2 0 |908 1817 |(11 11)(11 11) |(1 1)(1 1)| 0
906 13:54:08.300434 3 2 4 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0
907 13:54:08.303705 3 2 8 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
908 13:54:08.306750 3 2 12 |3d3d 3c3c |(11 11)(11 11) |(1 1)(1 1)| 0
909 13:54:08.310420 3 2 16 |3d3d 3b3a |(11 11)(11 11) |(1 1)(1 1)| 0
910 13:54:08.317121 3 2 20 |3d3d 3c3c |(11 11)(11 11) |(1 1)(1 1)| 0
911 13:54:08.320621 3 2 24 |3d3d 3c3b |(11 11)(11 11) |(1 1)(1 1)| 0
912 13:54:08.323933 [Byte 1] Lead/lag Transition tap number (1)
913 13:54:08.327286 3 2 28 |3d3d 605 |(11 11)(11 11) |(1 1)(0 0)| 0
914 13:54:08.334170 3 3 0 |3d3d 3838 |(11 11)(0 0) |(1 1)(1 1)| 0
915 13:54:08.337645 3 3 4 |3d3d 0 |(11 11)(11 11) |(1 1)(1 1)| 0
916 13:54:08.340781 3 3 8 |202 b0a |(11 11)(11 11) |(1 1)(0 1)| 0
917 13:54:08.344441 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
918 13:54:08.351106 [Byte 0] Lead/lag Transition tap number (1)
919 13:54:08.354251 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
920 13:54:08.358064 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
921 13:54:08.361108 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
922 13:54:08.367903 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
923 13:54:08.371168 3 4 0 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
924 13:54:08.374658 3 4 4 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0
925 13:54:08.381372 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
926 13:54:08.384682 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
927 13:54:08.387640 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 13:54:08.390825 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 13:54:08.397461 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 13:54:08.400820 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 13:54:08.404327 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 13:54:08.410934 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 13:54:08.414486 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 13:54:08.417893 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
935 13:54:08.421078 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
936 13:54:08.427883 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
937 13:54:08.431263 [Byte 0] Lead/lag falling Transition (3, 5, 20)
938 13:54:08.434621 [Byte 1] Lead/lag falling Transition (3, 5, 20)
939 13:54:08.441549 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
940 13:54:08.444664 [Byte 0] Lead/lag Transition tap number (2)
941 13:54:08.448170 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
942 13:54:08.451513 [Byte 1] Lead/lag Transition tap number (3)
943 13:54:08.454923 3 6 0 |1616 202 |(11 11)(11 11) |(0 0)(0 0)| 0
944 13:54:08.461589 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
945 13:54:08.461666 [Byte 0]First pass (3, 6, 4)
946 13:54:08.468289 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
947 13:54:08.468380 [Byte 1]First pass (3, 6, 8)
948 13:54:08.474902 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 13:54:08.478494 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
950 13:54:08.481684 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 13:54:08.485153 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 13:54:08.488435 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 13:54:08.495169 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 13:54:08.498472 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
955 13:54:08.501912 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
956 13:54:08.505504 All bytes gating window > 1UI, Early break!
957 13:54:08.505579
958 13:54:08.508423 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)
959 13:54:08.508514
960 13:54:08.511838 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 26)
961 13:54:08.511915
962 13:54:08.511974
963 13:54:08.515306
964 13:54:08.518564 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
965 13:54:08.518640
966 13:54:08.522039 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
967 13:54:08.522115
968 13:54:08.522174
969 13:54:08.525358 Write Rank0 MR1 =0x56
970 13:54:08.525434
971 13:54:08.528571 best RODT dly(2T, 0.5T) = (2, 2)
972 13:54:08.528647
973 13:54:08.528705 best RODT dly(2T, 0.5T) = (2, 2)
974 13:54:08.532134 ==
975 13:54:08.535318 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
976 13:54:08.538802 fsp= 1, odt_onoff= 1, Byte mode= 0
977 13:54:08.538878 ==
978 13:54:08.542089 Start DQ dly to find pass range UseTestEngine =0
979 13:54:08.545665 x-axis: bit #, y-axis: DQ dly (-127~63)
980 13:54:08.548907 RX Vref Scan = 0
981 13:54:08.552682 -26, [0] xxxxxxxx xxxxxxxx [MSB]
982 13:54:08.555959 -25, [0] xxxxxxxx xxxxxxxx [MSB]
983 13:54:08.556036 -24, [0] xxxxxxxx xxxxxxxx [MSB]
984 13:54:08.559239 -23, [0] xxxxxxxx xxxxxxxx [MSB]
985 13:54:08.562772 -22, [0] xxxxxxxx xxxxxxxx [MSB]
986 13:54:08.566113 -21, [0] xxxxxxxx xxxxxxxx [MSB]
987 13:54:08.569291 -20, [0] xxxxxxxx xxxxxxxx [MSB]
988 13:54:08.573008 -19, [0] xxxxxxxx xxxxxxxx [MSB]
989 13:54:08.576005 -18, [0] xxxxxxxx xxxxxxxx [MSB]
990 13:54:08.576083 -17, [0] xxxxxxxx xxxxxxxx [MSB]
991 13:54:08.579273 -16, [0] xxxxxxxx xxxxxxxx [MSB]
992 13:54:08.582502 -15, [0] xxxxxxxx xxxxxxxx [MSB]
993 13:54:08.586077 -14, [0] xxxxxxxx xxxxxxxx [MSB]
994 13:54:08.589473 -13, [0] xxxxxxxx xxxxxxxx [MSB]
995 13:54:08.592954 -12, [0] xxxxxxxx xxxxxxxx [MSB]
996 13:54:08.596319 -11, [0] xxxxxxxx xxxxxxxx [MSB]
997 13:54:08.599626 -10, [0] xxxxxxxx xxxxxxxx [MSB]
998 13:54:08.599755 -9, [0] xxxxxxxx xxxxxxxx [MSB]
999 13:54:08.603131 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1000 13:54:08.606214 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1001 13:54:08.609450 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1002 13:54:08.613060 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1003 13:54:08.616687 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1004 13:54:08.619527 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1005 13:54:08.619656 -2, [0] xxxoxxxx xxxxxxxx [MSB]
1006 13:54:08.622984 -1, [0] xxxoxoxx xxxxxxxx [MSB]
1007 13:54:08.626337 0, [0] xxxoxoox xxxxxoxx [MSB]
1008 13:54:08.630159 1, [0] xxxoxooo oxxxxoxx [MSB]
1009 13:54:08.633272 2, [0] xxxoxooo ooxxxoxx [MSB]
1010 13:54:08.636694 3, [0] xxxoxooo ooxooooo [MSB]
1011 13:54:08.637083 4, [0] xxxoxooo ooxooooo [MSB]
1012 13:54:08.640042 5, [0] xxxooooo oooooooo [MSB]
1013 13:54:08.643302 6, [0] xxoooooo oooooooo [MSB]
1014 13:54:08.646640 7, [0] xooooooo oooooooo [MSB]
1015 13:54:08.649896 31, [0] oooxoooo oooooooo [MSB]
1016 13:54:08.653756 32, [0] oooxoxoo oooooooo [MSB]
1017 13:54:08.654261 33, [0] oooxoxxo oooooooo [MSB]
1018 13:54:08.656885 34, [0] oooxoxxo ooooooxo [MSB]
1019 13:54:08.660320 35, [0] oooxoxxo xooxooxo [MSB]
1020 13:54:08.663366 36, [0] oooxoxxo xooxooxo [MSB]
1021 13:54:08.666662 37, [0] oooxoxxx xooxoxxo [MSB]
1022 13:54:08.670370 38, [0] oooxoxxx xooxxxxx [MSB]
1023 13:54:08.670795 39, [0] oooxxxxx xxoxxxxx [MSB]
1024 13:54:08.673633 40, [0] oxoxxxxx xxoxxxxx [MSB]
1025 13:54:08.677099 41, [0] oxxxxxxx xxxxxxxx [MSB]
1026 13:54:08.680269 42, [0] xxxxxxxx xxxxxxxx [MSB]
1027 13:54:08.684108 iDelay=42, Bit 0, Center 24 (8 ~ 41) 34
1028 13:54:08.686952 iDelay=42, Bit 1, Center 23 (7 ~ 39) 33
1029 13:54:08.690601 iDelay=42, Bit 2, Center 23 (6 ~ 40) 35
1030 13:54:08.693689 iDelay=42, Bit 3, Center 14 (-2 ~ 30) 33
1031 13:54:08.697311 iDelay=42, Bit 4, Center 21 (5 ~ 38) 34
1032 13:54:08.700662 iDelay=42, Bit 5, Center 15 (-1 ~ 31) 33
1033 13:54:08.704211 iDelay=42, Bit 6, Center 16 (0 ~ 32) 33
1034 13:54:08.707327 iDelay=42, Bit 7, Center 18 (1 ~ 36) 36
1035 13:54:08.711021 iDelay=42, Bit 8, Center 17 (1 ~ 34) 34
1036 13:54:08.717333 iDelay=42, Bit 9, Center 20 (2 ~ 38) 37
1037 13:54:08.720708 iDelay=42, Bit 10, Center 22 (5 ~ 40) 36
1038 13:54:08.724091 iDelay=42, Bit 11, Center 18 (3 ~ 34) 32
1039 13:54:08.727797 iDelay=42, Bit 12, Center 20 (3 ~ 37) 35
1040 13:54:08.731136 iDelay=42, Bit 13, Center 18 (0 ~ 36) 37
1041 13:54:08.734409 iDelay=42, Bit 14, Center 18 (3 ~ 33) 31
1042 13:54:08.737357 iDelay=42, Bit 15, Center 20 (3 ~ 37) 35
1043 13:54:08.737791 ==
1044 13:54:08.744233 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1045 13:54:08.747532 fsp= 1, odt_onoff= 1, Byte mode= 0
1046 13:54:08.747966 ==
1047 13:54:08.748302 DQS Delay:
1048 13:54:08.748606 DQS0 = 0, DQS1 = 0
1049 13:54:08.751061 DQM Delay:
1050 13:54:08.751562 DQM0 = 19, DQM1 = 19
1051 13:54:08.754430 DQ Delay:
1052 13:54:08.754863 DQ0 =24, DQ1 =23, DQ2 =23, DQ3 =14
1053 13:54:08.757581 DQ4 =21, DQ5 =15, DQ6 =16, DQ7 =18
1054 13:54:08.760887 DQ8 =17, DQ9 =20, DQ10 =22, DQ11 =18
1055 13:54:08.764652 DQ12 =20, DQ13 =18, DQ14 =18, DQ15 =20
1056 13:54:08.765149
1057 13:54:08.768205
1058 13:54:08.768705 DramC Write-DBI off
1059 13:54:08.769042 ==
1060 13:54:08.774520 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1061 13:54:08.778103 fsp= 1, odt_onoff= 1, Byte mode= 0
1062 13:54:08.778612 ==
1063 13:54:08.781341 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1064 13:54:08.781844
1065 13:54:08.784693 Begin, DQ Scan Range 924~1180
1066 13:54:08.785123
1067 13:54:08.785493
1068 13:54:08.785796 TX Vref Scan disable
1069 13:54:08.791217 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1070 13:54:08.794723 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1071 13:54:08.798193 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1072 13:54:08.801286 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1073 13:54:08.804822 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1074 13:54:08.808044 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1075 13:54:08.811702 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1076 13:54:08.814749 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1077 13:54:08.818319 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1078 13:54:08.821586 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1079 13:54:08.825049 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1080 13:54:08.828317 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1081 13:54:08.831582 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1082 13:54:08.834724 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1083 13:54:08.838328 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1084 13:54:08.841685 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1085 13:54:08.845263 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1086 13:54:08.848910 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1087 13:54:08.852009 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1088 13:54:08.855365 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1089 13:54:08.862114 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1090 13:54:08.865125 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1091 13:54:08.868621 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1092 13:54:08.871964 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1093 13:54:08.875523 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1094 13:54:08.878788 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1095 13:54:08.881870 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1096 13:54:08.885542 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1097 13:54:08.888935 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1098 13:54:08.892245 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1099 13:54:08.895599 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1100 13:54:08.898914 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1101 13:54:08.902412 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1102 13:54:08.905405 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1103 13:54:08.909312 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1104 13:54:08.912946 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1105 13:54:08.915794 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1106 13:54:08.919375 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1107 13:54:08.922335 962 |3 6 2|[0] xxxxxxxx oxxxxxxx [MSB]
1108 13:54:08.926049 963 |3 6 3|[0] xxxxxxxx ooxoxxxx [MSB]
1109 13:54:08.929477 964 |3 6 4|[0] xxxxxxxx ooxooxox [MSB]
1110 13:54:08.932865 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1111 13:54:08.935963 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1112 13:54:08.939371 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1113 13:54:08.945911 968 |3 6 8|[0] xxxxxxxx oooooooo [MSB]
1114 13:54:08.949721 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
1115 13:54:08.952981 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1116 13:54:08.956133 971 |3 6 11|[0] xxxoxoxx oooooooo [MSB]
1117 13:54:08.959431 972 |3 6 12|[0] xxxoxoox oooooooo [MSB]
1118 13:54:08.962829 973 |3 6 13|[0] xxxoxooo oooooooo [MSB]
1119 13:54:08.966090 974 |3 6 14|[0] xxxooooo oooooooo [MSB]
1120 13:54:08.969736 975 |3 6 15|[0] xxoooooo oooooooo [MSB]
1121 13:54:08.973026 988 |3 6 28|[0] oooooooo xooooxoo [MSB]
1122 13:54:08.976254 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1123 13:54:08.983163 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1124 13:54:08.986518 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1125 13:54:08.989917 992 |3 6 32|[0] oooxoooo xxxxxxxx [MSB]
1126 13:54:08.993376 993 |3 6 33|[0] oooxoxxo xxxxxxxx [MSB]
1127 13:54:08.996607 994 |3 6 34|[0] oooxoxxo xxxxxxxx [MSB]
1128 13:54:08.999661 995 |3 6 35|[0] xxxxxxxx xxxxxxxx [MSB]
1129 13:54:09.003154 Byte0, DQ PI dly=983, DQM PI dly= 983
1130 13:54:09.006358 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
1131 13:54:09.006809
1132 13:54:09.009811 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
1133 13:54:09.010242
1134 13:54:09.013514 Byte1, DQ PI dly=976, DQM PI dly= 976
1135 13:54:09.019878 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1136 13:54:09.020386
1137 13:54:09.023086 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1138 13:54:09.023521
1139 13:54:09.023853 ==
1140 13:54:09.029967 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1141 13:54:09.033377 fsp= 1, odt_onoff= 1, Byte mode= 0
1142 13:54:09.033886 ==
1143 13:54:09.036487 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1144 13:54:09.036913
1145 13:54:09.040375 Begin, DQ Scan Range 952~1016
1146 13:54:09.040908 Write Rank0 MR14 =0x0
1147 13:54:09.050065
1148 13:54:09.050489 CH=0, VrefRange= 0, VrefLevel = 0
1149 13:54:09.056936 TX Bit0 (977~994) 18 985, Bit8 (965~983) 19 974,
1150 13:54:09.059986 TX Bit1 (977~992) 16 984, Bit9 (966~983) 18 974,
1151 13:54:09.063413 TX Bit2 (977~993) 17 985, Bit10 (969~989) 21 979,
1152 13:54:09.070365 TX Bit3 (971~989) 19 980, Bit11 (966~984) 19 975,
1153 13:54:09.073571 TX Bit4 (976~993) 18 984, Bit12 (967~985) 19 976,
1154 13:54:09.080290 TX Bit5 (975~989) 15 982, Bit13 (967~983) 17 975,
1155 13:54:09.083718 TX Bit6 (975~990) 16 982, Bit14 (967~983) 17 975,
1156 13:54:09.086982 TX Bit7 (975~992) 18 983, Bit15 (969~987) 19 978,
1157 13:54:09.087518
1158 13:54:09.089889 Write Rank0 MR14 =0x2
1159 13:54:09.098698
1160 13:54:09.099193 CH=0, VrefRange= 0, VrefLevel = 2
1161 13:54:09.105588 TX Bit0 (977~995) 19 986, Bit8 (965~983) 19 974,
1162 13:54:09.108796 TX Bit1 (977~993) 17 985, Bit9 (966~984) 19 975,
1163 13:54:09.115480 TX Bit2 (977~994) 18 985, Bit10 (969~989) 21 979,
1164 13:54:09.119101 TX Bit3 (970~988) 19 979, Bit11 (966~985) 20 975,
1165 13:54:09.122118 TX Bit4 (976~994) 19 985, Bit12 (967~986) 20 976,
1166 13:54:09.128878 TX Bit5 (974~989) 16 981, Bit13 (967~983) 17 975,
1167 13:54:09.132370 TX Bit6 (975~990) 16 982, Bit14 (967~984) 18 975,
1168 13:54:09.135779 TX Bit7 (975~992) 18 983, Bit15 (968~988) 21 978,
1169 13:54:09.136293
1170 13:54:09.139079 wait MRW command Rank0 MR14 =0x4 fired (1)
1171 13:54:09.142007 Write Rank0 MR14 =0x4
1172 13:54:09.151286
1173 13:54:09.151792 CH=0, VrefRange= 0, VrefLevel = 4
1174 13:54:09.157999 TX Bit0 (977~995) 19 986, Bit8 (964~984) 21 974,
1175 13:54:09.161325 TX Bit1 (977~993) 17 985, Bit9 (966~985) 20 975,
1176 13:54:09.167833 TX Bit2 (976~994) 19 985, Bit10 (969~989) 21 979,
1177 13:54:09.171061 TX Bit3 (970~990) 21 980, Bit11 (965~985) 21 975,
1178 13:54:09.174935 TX Bit4 (976~995) 20 985, Bit12 (966~986) 21 976,
1179 13:54:09.181587 TX Bit5 (974~990) 17 982, Bit13 (967~984) 18 975,
1180 13:54:09.185016 TX Bit6 (974~991) 18 982, Bit14 (966~984) 19 975,
1181 13:54:09.188164 TX Bit7 (975~992) 18 983, Bit15 (968~988) 21 978,
1182 13:54:09.188597
1183 13:54:09.191300 Write Rank0 MR14 =0x6
1184 13:54:09.200086
1185 13:54:09.200610 CH=0, VrefRange= 0, VrefLevel = 6
1186 13:54:09.206722 TX Bit0 (977~996) 20 986, Bit8 (964~984) 21 974,
1187 13:54:09.210137 TX Bit1 (977~993) 17 985, Bit9 (965~986) 22 975,
1188 13:54:09.216833 TX Bit2 (976~995) 20 985, Bit10 (969~990) 22 979,
1189 13:54:09.220403 TX Bit3 (969~990) 22 979, Bit11 (965~986) 22 975,
1190 13:54:09.223421 TX Bit4 (976~995) 20 985, Bit12 (966~987) 22 976,
1191 13:54:09.230493 TX Bit5 (973~990) 18 981, Bit13 (966~984) 19 975,
1192 13:54:09.233723 TX Bit6 (974~991) 18 982, Bit14 (967~985) 19 976,
1193 13:54:09.237085 TX Bit7 (975~993) 19 984, Bit15 (968~988) 21 978,
1194 13:54:09.237634
1195 13:54:09.240340 Write Rank0 MR14 =0x8
1196 13:54:09.249183
1197 13:54:09.249726 CH=0, VrefRange= 0, VrefLevel = 8
1198 13:54:09.255971 TX Bit0 (977~997) 21 987, Bit8 (964~985) 22 974,
1199 13:54:09.259438 TX Bit1 (976~994) 19 985, Bit9 (965~987) 23 976,
1200 13:54:09.262677 TX Bit2 (976~995) 20 985, Bit10 (969~990) 22 979,
1201 13:54:09.269273 TX Bit3 (969~990) 22 979, Bit11 (964~986) 23 975,
1202 13:54:09.272436 TX Bit4 (976~996) 21 986, Bit12 (966~987) 22 976,
1203 13:54:09.279143 TX Bit5 (973~990) 18 981, Bit13 (966~985) 20 975,
1204 13:54:09.282795 TX Bit6 (974~991) 18 982, Bit14 (966~985) 20 975,
1205 13:54:09.285942 TX Bit7 (974~994) 21 984, Bit15 (968~989) 22 978,
1206 13:54:09.286449
1207 13:54:09.289146 Write Rank0 MR14 =0xa
1208 13:54:09.298144
1209 13:54:09.298668 CH=0, VrefRange= 0, VrefLevel = 10
1210 13:54:09.349382 TX Bit0 (977~996) 20 986, Bit8 (963~985) 23 974,
1211 13:54:09.349897 TX Bit1 (976~994) 19 985, Bit9 (965~987) 23 976,
1212 13:54:09.350238 TX Bit2 (976~996) 21 986, Bit10 (969~990) 22 979,
1213 13:54:09.350871 TX Bit3 (969~990) 22 979, Bit11 (964~987) 24 975,
1214 13:54:09.351205 TX Bit4 (975~996) 22 985, Bit12 (966~988) 23 977,
1215 13:54:09.351503 TX Bit5 (973~991) 19 982, Bit13 (966~985) 20 975,
1216 13:54:09.351794 TX Bit6 (974~991) 18 982, Bit14 (966~986) 21 976,
1217 13:54:09.352078 TX Bit7 (974~994) 21 984, Bit15 (968~989) 22 978,
1218 13:54:09.352358
1219 13:54:09.352638 Write Rank0 MR14 =0xc
1220 13:54:09.352914
1221 13:54:09.353189 CH=0, VrefRange= 0, VrefLevel = 12
1222 13:54:09.386435 TX Bit0 (976~997) 22 986, Bit8 (963~986) 24 974,
1223 13:54:09.386975 TX Bit1 (976~995) 20 985, Bit9 (964~988) 25 976,
1224 13:54:09.387660 TX Bit2 (976~997) 22 986, Bit10 (968~990) 23 979,
1225 13:54:09.388001 TX Bit3 (968~991) 24 979, Bit11 (964~988) 25 976,
1226 13:54:09.388306 TX Bit4 (975~997) 23 986, Bit12 (965~988) 24 976,
1227 13:54:09.388595 TX Bit5 (972~991) 20 981, Bit13 (965~986) 22 975,
1228 13:54:09.388881 TX Bit6 (973~992) 20 982, Bit14 (966~987) 22 976,
1229 13:54:09.390290 TX Bit7 (973~994) 22 983, Bit15 (968~989) 22 978,
1230 13:54:09.390723
1231 13:54:09.391053 Write Rank0 MR14 =0xe
1232 13:54:09.396111
1233 13:54:09.399786 CH=0, VrefRange= 0, VrefLevel = 14
1234 13:54:09.404022 TX Bit0 (976~998) 23 987, Bit8 (963~986) 24 974,
1235 13:54:09.406459 TX Bit1 (976~995) 20 985, Bit9 (963~988) 26 975,
1236 13:54:09.412987 TX Bit2 (976~997) 22 986, Bit10 (968~990) 23 979,
1237 13:54:09.416807 TX Bit3 (968~991) 24 979, Bit11 (963~988) 26 975,
1238 13:54:09.419904 TX Bit4 (975~998) 24 986, Bit12 (965~989) 25 977,
1239 13:54:09.426487 TX Bit5 (971~991) 21 981, Bit13 (965~987) 23 976,
1240 13:54:09.430173 TX Bit6 (972~992) 21 982, Bit14 (965~987) 23 976,
1241 13:54:09.433398 TX Bit7 (973~995) 23 984, Bit15 (967~990) 24 978,
1242 13:54:09.433907
1243 13:54:09.436594 Write Rank0 MR14 =0x10
1244 13:54:09.445898
1245 13:54:09.449028 CH=0, VrefRange= 0, VrefLevel = 16
1246 13:54:09.452778 TX Bit0 (976~998) 23 987, Bit8 (962~987) 26 974,
1247 13:54:09.455720 TX Bit1 (975~996) 22 985, Bit9 (963~988) 26 975,
1248 13:54:09.462378 TX Bit2 (975~997) 23 986, Bit10 (968~991) 24 979,
1249 13:54:09.465711 TX Bit3 (968~991) 24 979, Bit11 (963~988) 26 975,
1250 13:54:09.469182 TX Bit4 (975~998) 24 986, Bit12 (964~989) 26 976,
1251 13:54:09.476139 TX Bit5 (971~992) 22 981, Bit13 (965~987) 23 976,
1252 13:54:09.479357 TX Bit6 (971~992) 22 981, Bit14 (963~988) 26 975,
1253 13:54:09.482707 TX Bit7 (972~995) 24 983, Bit15 (967~990) 24 978,
1254 13:54:09.483219
1255 13:54:09.486179 Write Rank0 MR14 =0x12
1256 13:54:09.495089
1257 13:54:09.498483 CH=0, VrefRange= 0, VrefLevel = 18
1258 13:54:09.501987 TX Bit0 (976~998) 23 987, Bit8 (962~988) 27 975,
1259 13:54:09.505047 TX Bit1 (976~997) 22 986, Bit9 (963~989) 27 976,
1260 13:54:09.511805 TX Bit2 (975~997) 23 986, Bit10 (968~991) 24 979,
1261 13:54:09.515471 TX Bit3 (968~991) 24 979, Bit11 (963~988) 26 975,
1262 13:54:09.518718 TX Bit4 (974~998) 25 986, Bit12 (964~989) 26 976,
1263 13:54:09.525000 TX Bit5 (971~992) 22 981, Bit13 (964~988) 25 976,
1264 13:54:09.528594 TX Bit6 (971~993) 23 982, Bit14 (964~988) 25 976,
1265 13:54:09.532144 TX Bit7 (972~996) 25 984, Bit15 (967~990) 24 978,
1266 13:54:09.532657
1267 13:54:09.535564 Write Rank0 MR14 =0x14
1268 13:54:09.544797
1269 13:54:09.548053 CH=0, VrefRange= 0, VrefLevel = 20
1270 13:54:09.551371 TX Bit0 (976~999) 24 987, Bit8 (962~988) 27 975,
1271 13:54:09.554811 TX Bit1 (976~997) 22 986, Bit9 (963~989) 27 976,
1272 13:54:09.561346 TX Bit2 (975~998) 24 986, Bit10 (968~991) 24 979,
1273 13:54:09.564757 TX Bit3 (967~992) 26 979, Bit11 (962~988) 27 975,
1274 13:54:09.567983 TX Bit4 (974~998) 25 986, Bit12 (964~989) 26 976,
1275 13:54:09.575055 TX Bit5 (970~992) 23 981, Bit13 (963~988) 26 975,
1276 13:54:09.578236 TX Bit6 (971~993) 23 982, Bit14 (963~989) 27 976,
1277 13:54:09.581900 TX Bit7 (972~997) 26 984, Bit15 (967~990) 24 978,
1278 13:54:09.582408
1279 13:54:09.584509 Write Rank0 MR14 =0x16
1280 13:54:09.594455
1281 13:54:09.597487 CH=0, VrefRange= 0, VrefLevel = 22
1282 13:54:09.600776 TX Bit0 (975~999) 25 987, Bit8 (962~988) 27 975,
1283 13:54:09.604552 TX Bit1 (975~997) 23 986, Bit9 (963~989) 27 976,
1284 13:54:09.610826 TX Bit2 (975~998) 24 986, Bit10 (967~991) 25 979,
1285 13:54:09.614449 TX Bit3 (967~991) 25 979, Bit11 (962~988) 27 975,
1286 13:54:09.617508 TX Bit4 (974~998) 25 986, Bit12 (963~989) 27 976,
1287 13:54:09.624260 TX Bit5 (970~992) 23 981, Bit13 (964~987) 24 975,
1288 13:54:09.627461 TX Bit6 (971~994) 24 982, Bit14 (963~989) 27 976,
1289 13:54:09.630989 TX Bit7 (971~996) 26 983, Bit15 (967~990) 24 978,
1290 13:54:09.631498
1291 13:54:09.634060 Write Rank0 MR14 =0x18
1292 13:54:09.643859
1293 13:54:09.646911 CH=0, VrefRange= 0, VrefLevel = 24
1294 13:54:09.650468 TX Bit0 (975~999) 25 987, Bit8 (961~987) 27 974,
1295 13:54:09.653812 TX Bit1 (975~998) 24 986, Bit9 (964~988) 25 976,
1296 13:54:09.660570 TX Bit2 (975~998) 24 986, Bit10 (968~991) 24 979,
1297 13:54:09.663884 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1298 13:54:09.666787 TX Bit4 (974~998) 25 986, Bit12 (963~989) 27 976,
1299 13:54:09.673541 TX Bit5 (969~993) 25 981, Bit13 (964~987) 24 975,
1300 13:54:09.677104 TX Bit6 (970~995) 26 982, Bit14 (964~989) 26 976,
1301 13:54:09.680738 TX Bit7 (971~996) 26 983, Bit15 (966~990) 25 978,
1302 13:54:09.681288
1303 13:54:09.683641 Write Rank0 MR14 =0x1a
1304 13:54:09.693164
1305 13:54:09.693754 CH=0, VrefRange= 0, VrefLevel = 26
1306 13:54:09.700009 TX Bit0 (975~999) 25 987, Bit8 (961~987) 27 974,
1307 13:54:09.703033 TX Bit1 (975~998) 24 986, Bit9 (964~988) 25 976,
1308 13:54:09.709929 TX Bit2 (975~998) 24 986, Bit10 (968~991) 24 979,
1309 13:54:09.713356 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1310 13:54:09.716405 TX Bit4 (974~998) 25 986, Bit12 (963~989) 27 976,
1311 13:54:09.723254 TX Bit5 (969~993) 25 981, Bit13 (964~987) 24 975,
1312 13:54:09.726689 TX Bit6 (970~995) 26 982, Bit14 (964~989) 26 976,
1313 13:54:09.730088 TX Bit7 (971~996) 26 983, Bit15 (966~990) 25 978,
1314 13:54:09.730585
1315 13:54:09.733303 Write Rank0 MR14 =0x1c
1316 13:54:09.742870
1317 13:54:09.745788 CH=0, VrefRange= 0, VrefLevel = 28
1318 13:54:09.749295 TX Bit0 (975~999) 25 987, Bit8 (961~987) 27 974,
1319 13:54:09.752462 TX Bit1 (975~998) 24 986, Bit9 (964~988) 25 976,
1320 13:54:09.759281 TX Bit2 (975~998) 24 986, Bit10 (968~991) 24 979,
1321 13:54:09.762688 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1322 13:54:09.766081 TX Bit4 (974~998) 25 986, Bit12 (963~989) 27 976,
1323 13:54:09.772764 TX Bit5 (969~993) 25 981, Bit13 (964~987) 24 975,
1324 13:54:09.775940 TX Bit6 (970~995) 26 982, Bit14 (964~989) 26 976,
1325 13:54:09.779492 TX Bit7 (971~996) 26 983, Bit15 (966~990) 25 978,
1326 13:54:09.779921
1327 13:54:09.782536 Write Rank0 MR14 =0x1e
1328 13:54:09.792410
1329 13:54:09.792911 CH=0, VrefRange= 0, VrefLevel = 30
1330 13:54:09.798849 TX Bit0 (975~999) 25 987, Bit8 (961~987) 27 974,
1331 13:54:09.802015 TX Bit1 (975~998) 24 986, Bit9 (964~988) 25 976,
1332 13:54:09.808837 TX Bit2 (975~998) 24 986, Bit10 (968~991) 24 979,
1333 13:54:09.812067 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1334 13:54:09.815494 TX Bit4 (974~998) 25 986, Bit12 (963~989) 27 976,
1335 13:54:09.822196 TX Bit5 (969~993) 25 981, Bit13 (964~987) 24 975,
1336 13:54:09.825737 TX Bit6 (970~995) 26 982, Bit14 (964~989) 26 976,
1337 13:54:09.828988 TX Bit7 (971~996) 26 983, Bit15 (966~990) 25 978,
1338 13:54:09.829428
1339 13:54:09.829854
1340 13:54:09.832517 TX Vref found, early break! 377< 384
1341 13:54:09.839200 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
1342 13:54:09.842515 u1DelayCellOfst[0]=9 cells (7 PI)
1343 13:54:09.846056 u1DelayCellOfst[1]=7 cells (6 PI)
1344 13:54:09.846539 u1DelayCellOfst[2]=7 cells (6 PI)
1345 13:54:09.849150 u1DelayCellOfst[3]=0 cells (0 PI)
1346 13:54:09.852889 u1DelayCellOfst[4]=7 cells (6 PI)
1347 13:54:09.856082 u1DelayCellOfst[5]=1 cells (1 PI)
1348 13:54:09.859485 u1DelayCellOfst[6]=2 cells (2 PI)
1349 13:54:09.862608 u1DelayCellOfst[7]=3 cells (3 PI)
1350 13:54:09.866016 Byte0, DQ PI dly=980, DQM PI dly= 983
1351 13:54:09.869127 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1352 13:54:09.869685
1353 13:54:09.876038 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1354 13:54:09.876506
1355 13:54:09.879465 u1DelayCellOfst[8]=0 cells (0 PI)
1356 13:54:09.879852 u1DelayCellOfst[9]=2 cells (2 PI)
1357 13:54:09.882992 u1DelayCellOfst[10]=6 cells (5 PI)
1358 13:54:09.886134 u1DelayCellOfst[11]=1 cells (1 PI)
1359 13:54:09.889868 u1DelayCellOfst[12]=2 cells (2 PI)
1360 13:54:09.892792 u1DelayCellOfst[13]=1 cells (1 PI)
1361 13:54:09.896173 u1DelayCellOfst[14]=2 cells (2 PI)
1362 13:54:09.899488 u1DelayCellOfst[15]=5 cells (4 PI)
1363 13:54:09.902887 Byte1, DQ PI dly=974, DQM PI dly= 976
1364 13:54:09.906145 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
1365 13:54:09.906539
1366 13:54:09.913110 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
1367 13:54:09.913614
1368 13:54:09.913917 Write Rank0 MR14 =0x18
1369 13:54:09.914192
1370 13:54:09.916448 Final TX Range 0 Vref 24
1371 13:54:09.916828
1372 13:54:09.922844 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1373 13:54:09.923232
1374 13:54:09.929604 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1375 13:54:09.936310 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1376 13:54:09.943312 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1377 13:54:09.946462 Write Rank0 MR3 =0xb0
1378 13:54:09.946735 DramC Write-DBI on
1379 13:54:09.946980 ==
1380 13:54:09.953395 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1381 13:54:09.956474 fsp= 1, odt_onoff= 1, Byte mode= 0
1382 13:54:09.956756 ==
1383 13:54:09.960342 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1384 13:54:09.960688
1385 13:54:09.963137 Begin, DQ Scan Range 696~760
1386 13:54:09.963406
1387 13:54:09.963615
1388 13:54:09.966657 TX Vref Scan disable
1389 13:54:09.969836 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1390 13:54:09.973501 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1391 13:54:09.976713 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1392 13:54:09.980243 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1393 13:54:09.983389 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1394 13:54:09.986919 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1395 13:54:09.990308 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1396 13:54:09.993725 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1397 13:54:09.996930 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1398 13:54:10.000648 705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]
1399 13:54:10.003954 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1400 13:54:10.007264 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1401 13:54:10.010453 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1402 13:54:10.013778 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1403 13:54:10.017319 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1404 13:54:10.020722 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1405 13:54:10.024069 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1406 13:54:10.027013 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1407 13:54:10.036244 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1408 13:54:10.039653 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1409 13:54:10.042898 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1410 13:54:10.046730 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1411 13:54:10.049958 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1412 13:54:10.053445 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1413 13:54:10.056571 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1414 13:54:10.059921 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1415 13:54:10.063122 742 |2 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1416 13:54:10.066643 Byte0, DQ PI dly=727, DQM PI dly= 727
1417 13:54:10.069965 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
1418 13:54:10.070481
1419 13:54:10.076890 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
1420 13:54:10.077439
1421 13:54:10.080016 Byte1, DQ PI dly=719, DQM PI dly= 719
1422 13:54:10.083420 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 15)
1423 13:54:10.083858
1424 13:54:10.086787 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 15)
1425 13:54:10.087293
1426 13:54:10.093679 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1427 13:54:10.100249 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1428 13:54:10.107300 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1429 13:54:10.110231 Write Rank0 MR3 =0x30
1430 13:54:10.110659 DramC Write-DBI off
1431 13:54:10.113604
1432 13:54:10.114024 [DATLAT]
1433 13:54:10.117296 Freq=1600, CH0 RK0, use_rxtx_scan=0
1434 13:54:10.117797
1435 13:54:10.118127 DATLAT Default: 0xf
1436 13:54:10.120611 7, 0xFFFF, sum=0
1437 13:54:10.121109 8, 0xFFFF, sum=0
1438 13:54:10.123997 9, 0xFFFF, sum=0
1439 13:54:10.124499 10, 0xFFFF, sum=0
1440 13:54:10.127084 11, 0xFFFF, sum=0
1441 13:54:10.127516 12, 0xFFFF, sum=0
1442 13:54:10.130808 13, 0xFFFF, sum=0
1443 13:54:10.131336 14, 0x0, sum=1
1444 13:54:10.131676 15, 0x0, sum=2
1445 13:54:10.133765 16, 0x0, sum=3
1446 13:54:10.134196 17, 0x0, sum=4
1447 13:54:10.140661 pattern=2 first_step=14 total pass=5 best_step=16
1448 13:54:10.141166 ==
1449 13:54:10.144223 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1450 13:54:10.147453 fsp= 1, odt_onoff= 1, Byte mode= 0
1451 13:54:10.147953 ==
1452 13:54:10.150546 Start DQ dly to find pass range UseTestEngine =1
1453 13:54:10.157272 x-axis: bit #, y-axis: DQ dly (-127~63)
1454 13:54:10.157706 RX Vref Scan = 1
1455 13:54:10.272381
1456 13:54:10.272880 RX Vref found, early break!
1457 13:54:10.273218
1458 13:54:10.275669 Final RX Vref 12, apply to both rank0 and 1
1459 13:54:10.278928 ==
1460 13:54:10.282173 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1461 13:54:10.285771 fsp= 1, odt_onoff= 1, Byte mode= 0
1462 13:54:10.286277 ==
1463 13:54:10.286608 DQS Delay:
1464 13:54:10.289071 DQS0 = 0, DQS1 = 0
1465 13:54:10.289628 DQM Delay:
1466 13:54:10.292486 DQM0 = 19, DQM1 = 18
1467 13:54:10.292984 DQ Delay:
1468 13:54:10.295881 DQ0 =24, DQ1 =23, DQ2 =23, DQ3 =13
1469 13:54:10.299272 DQ4 =22, DQ5 =14, DQ6 =17, DQ7 =18
1470 13:54:10.302360 DQ8 =18, DQ9 =19, DQ10 =22, DQ11 =17
1471 13:54:10.306012 DQ12 =19, DQ13 =16, DQ14 =17, DQ15 =20
1472 13:54:10.306640
1473 13:54:10.306979
1474 13:54:10.307286
1475 13:54:10.309103 [DramC_TX_OE_Calibration] TA2
1476 13:54:10.312697 Original DQ_B0 (3 6) =30, OEN = 27
1477 13:54:10.315851 Original DQ_B1 (3 6) =30, OEN = 27
1478 13:54:10.316357 23, 0x0, End_B0=23 End_B1=23
1479 13:54:10.319064 24, 0x0, End_B0=24 End_B1=24
1480 13:54:10.322585 25, 0x0, End_B0=25 End_B1=25
1481 13:54:10.326091 26, 0x0, End_B0=26 End_B1=26
1482 13:54:10.329533 27, 0x0, End_B0=27 End_B1=27
1483 13:54:10.330040 28, 0x0, End_B0=28 End_B1=28
1484 13:54:10.332970 29, 0x0, End_B0=29 End_B1=29
1485 13:54:10.336185 30, 0x0, End_B0=30 End_B1=30
1486 13:54:10.339243 31, 0xFFFF, End_B0=30 End_B1=30
1487 13:54:10.342961 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1488 13:54:10.349676 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1489 13:54:10.350181
1490 13:54:10.350522
1491 13:54:10.352899 Write Rank0 MR23 =0x3f
1492 13:54:10.353373 [DQSOSC]
1493 13:54:10.359584 [DQSOSCAuto] RK0, (LSB)MR18= 0x9c, (MSB)MR19= 0x3, tDQSOscB0 = 340 ps tDQSOscB1 = 0 ps
1494 13:54:10.366130 CH0_RK0: MR19=0x3, MR18=0x9C, DQSOSC=340, MR23=63, INC=21, DEC=31
1495 13:54:10.369660 Write Rank0 MR23 =0x3f
1496 13:54:10.370158 [DQSOSC]
1497 13:54:10.376325 [DQSOSCAuto] RK0, (LSB)MR18= 0x9f, (MSB)MR19= 0x3, tDQSOscB0 = 339 ps tDQSOscB1 = 0 ps
1498 13:54:10.379604 CH0 RK0: MR19=3, MR18=9F
1499 13:54:10.382787 [RankSwap] Rank num 2, (Multi 1), Rank 1
1500 13:54:10.383283 Write Rank0 MR2 =0xad
1501 13:54:10.386452 [Write Leveling]
1502 13:54:10.390167 delay byte0 byte1 byte2 byte3
1503 13:54:10.390674
1504 13:54:10.391007 10 0 0
1505 13:54:10.392769 11 0 0
1506 13:54:10.393202 12 0 0
1507 13:54:10.396511 13 0 0
1508 13:54:10.397030 14 0 0
1509 13:54:10.397468 15 0 0
1510 13:54:10.399587 16 0 0
1511 13:54:10.400020 17 0 0
1512 13:54:10.402737 18 0 0
1513 13:54:10.403170 19 0 0
1514 13:54:10.403512 20 0 0
1515 13:54:10.406391 21 0 0
1516 13:54:10.406899 22 0 0
1517 13:54:10.409688 23 0 0
1518 13:54:10.410123 24 0 0
1519 13:54:10.410551 25 0 0
1520 13:54:10.413045 26 0 0
1521 13:54:10.413612 27 0 0
1522 13:54:10.416255 28 0 0
1523 13:54:10.416762 29 0 0
1524 13:54:10.419597 30 0 ff
1525 13:54:10.420035 31 0 ff
1526 13:54:10.420374 32 0 ff
1527 13:54:10.423299 33 0 ff
1528 13:54:10.423811 34 ff ff
1529 13:54:10.426402 35 ff ff
1530 13:54:10.426841 36 ff ff
1531 13:54:10.429857 37 ff ff
1532 13:54:10.430363 38 ff ff
1533 13:54:10.433430 39 ff ff
1534 13:54:10.433946 40 ff ff
1535 13:54:10.436578 pass bytecount = 0xff (0xff: all bytes pass)
1536 13:54:10.437081
1537 13:54:10.439977 DQS0 dly: 34
1538 13:54:10.440641 DQS1 dly: 30
1539 13:54:10.443272 Write Rank0 MR2 =0x2d
1540 13:54:10.446485 [RankSwap] Rank num 2, (Multi 1), Rank 0
1541 13:54:10.446923 Write Rank1 MR1 =0xd6
1542 13:54:10.450032 [Gating]
1543 13:54:10.450533 ==
1544 13:54:10.453369 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1545 13:54:10.456682 fsp= 1, odt_onoff= 1, Byte mode= 0
1546 13:54:10.457185 ==
1547 13:54:10.459843 3 1 0 |3534 202 |(11 11)(11 11) |(0 0)(1 1)| 0
1548 13:54:10.466515 3 1 4 |3534 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
1549 13:54:10.470191 3 1 8 |3534 504 |(11 11)(11 11) |(1 1)(1 1)| 0
1550 13:54:10.473466 3 1 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1551 13:54:10.480201 3 1 16 |3534 3535 |(11 11)(11 11) |(0 0)(0 1)| 0
1552 13:54:10.483275 3 1 20 |3534 909 |(11 11)(11 11) |(0 0)(0 1)| 0
1553 13:54:10.486683 3 1 24 |3534 3434 |(11 11)(11 11) |(0 0)(0 1)| 0
1554 13:54:10.493632 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1555 13:54:10.497179 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1556 13:54:10.500335 3 2 4 |3534 b0a |(11 11)(11 11) |(0 1)(0 1)| 0
1557 13:54:10.503712 3 2 8 |403 3433 |(11 11)(11 11) |(1 1)(1 1)| 0
1558 13:54:10.510113 3 2 12 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
1559 13:54:10.513355 3 2 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 13:54:10.516692 3 2 20 |3d3d 3131 |(11 11)(11 11) |(1 1)(1 1)| 0
1561 13:54:10.523605 3 2 24 |3d3d 3232 |(11 11)(11 11) |(1 1)(1 1)| 0
1562 13:54:10.526894 [Byte 1] Lead/lag Transition tap number (1)
1563 13:54:10.530421 3 2 28 |3d3d 3d3c |(11 11)(11 11) |(1 1)(0 0)| 0
1564 13:54:10.533832 3 3 0 |3d3d 3d3d |(11 11)(0 0) |(1 1)(0 0)| 0
1565 13:54:10.540382 3 3 4 |3d3d 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
1566 13:54:10.543836 3 3 8 |3d3d 605 |(11 11)(11 11) |(1 1)(1 1)| 0
1567 13:54:10.546996 3 3 12 |3d3d 3b3a |(11 11)(11 11) |(1 1)(1 1)| 0
1568 13:54:10.550587 3 3 16 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1569 13:54:10.557465 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1570 13:54:10.560834 [Byte 0] Lead/lag Transition tap number (1)
1571 13:54:10.563995 [Byte 1] Lead/lag falling Transition (3, 3, 20)
1572 13:54:10.567348 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1573 13:54:10.574134 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1574 13:54:10.577220 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1575 13:54:10.580509 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1576 13:54:10.587615 3 4 8 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1577 13:54:10.590823 3 4 12 |3d3d 201 |(1 11)(11 11) |(1 1)(1 1)| 0
1578 13:54:10.594587 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1579 13:54:10.597743 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1580 13:54:10.604312 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1581 13:54:10.607677 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1582 13:54:10.610841 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1583 13:54:10.617833 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1584 13:54:10.621107 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1585 13:54:10.624456 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1586 13:54:10.627531 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1587 13:54:10.634538 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1588 13:54:10.638068 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1589 13:54:10.641478 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1590 13:54:10.648033 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1591 13:54:10.651346 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1592 13:54:10.655083 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1593 13:54:10.658197 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1594 13:54:10.664979 [Byte 0] Lead/lag Transition tap number (2)
1595 13:54:10.668006 [Byte 1] Lead/lag Transition tap number (2)
1596 13:54:10.671646 3 6 8 |404 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1597 13:54:10.674889 3 6 12 |4646 403 |(0 0)(11 11) |(0 0)(0 0)| 0
1598 13:54:10.678340 [Byte 0]First pass (3, 6, 12)
1599 13:54:10.681774 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1600 13:54:10.684716 [Byte 1]First pass (3, 6, 16)
1601 13:54:10.688350 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1602 13:54:10.691460 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1603 13:54:10.698157 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1604 13:54:10.702164 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1605 13:54:10.705213 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1606 13:54:10.708398 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1607 13:54:10.711822 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1608 13:54:10.718792 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1609 13:54:10.722170 All bytes gating window > 1UI, Early break!
1610 13:54:10.722671
1611 13:54:10.725163 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1612 13:54:10.725705
1613 13:54:10.728316 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 4)
1614 13:54:10.728839
1615 13:54:10.729176
1616 13:54:10.729532
1617 13:54:10.731843 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1618 13:54:10.732351
1619 13:54:10.735025 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1620 13:54:10.735455
1621 13:54:10.738290
1622 13:54:10.738711 Write Rank1 MR1 =0x56
1623 13:54:10.739041
1624 13:54:10.741902 best RODT dly(2T, 0.5T) = (2, 3)
1625 13:54:10.742331
1626 13:54:10.745307 best RODT dly(2T, 0.5T) = (2, 3)
1627 13:54:10.745811 ==
1628 13:54:10.751824 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1629 13:54:10.752272 fsp= 1, odt_onoff= 1, Byte mode= 0
1630 13:54:10.755403 ==
1631 13:54:10.758795 Start DQ dly to find pass range UseTestEngine =0
1632 13:54:10.761789 x-axis: bit #, y-axis: DQ dly (-127~63)
1633 13:54:10.762220 RX Vref Scan = 0
1634 13:54:10.765575 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1635 13:54:10.768877 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1636 13:54:10.772270 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1637 13:54:10.775808 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1638 13:54:10.778937 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1639 13:54:10.782403 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1640 13:54:10.782926 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1641 13:54:10.785749 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1642 13:54:10.788952 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1643 13:54:10.792029 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1644 13:54:10.795781 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1645 13:54:10.799085 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1646 13:54:10.802444 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1647 13:54:10.805736 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1648 13:54:10.806251 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1649 13:54:10.808926 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1650 13:54:10.812624 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1651 13:54:10.815975 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1652 13:54:10.818957 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1653 13:54:10.822886 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1654 13:54:10.825944 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1655 13:54:10.826457 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1656 13:54:10.829181 -4, [0] xxxoxxxx xxxxxxxx [MSB]
1657 13:54:10.832536 -3, [0] xxxoxxxx xxxxxxxx [MSB]
1658 13:54:10.835987 -2, [0] xxxoxxxx xxxxxxxx [MSB]
1659 13:54:10.839702 -1, [0] xxxoxoxx xxxxxxxx [MSB]
1660 13:54:10.842681 0, [0] xxxoxooo oxxxxoxx [MSB]
1661 13:54:10.843200 1, [0] xxxoxooo ooxoooox [MSB]
1662 13:54:10.845981 2, [0] xxxoxooo ooxooooo [MSB]
1663 13:54:10.849108 3, [0] xxxoxooo ooxooooo [MSB]
1664 13:54:10.852461 4, [0] xxxoxooo ooxooooo [MSB]
1665 13:54:10.855813 5, [0] xooooooo oooooooo [MSB]
1666 13:54:10.859300 6, [0] xooooooo oooooooo [MSB]
1667 13:54:10.859740 33, [0] oooxoooo oooooooo [MSB]
1668 13:54:10.862412 34, [0] oooxoxoo oooooooo [MSB]
1669 13:54:10.866102 35, [0] oooxoxoo oooxooxo [MSB]
1670 13:54:10.869353 36, [0] oooxoxxx xooxooxo [MSB]
1671 13:54:10.872616 37, [0] oooxoxxx xooxoxxo [MSB]
1672 13:54:10.875801 38, [0] oooxoxxx xxoxxxxo [MSB]
1673 13:54:10.879218 39, [0] oooxoxxx xxoxxxxo [MSB]
1674 13:54:10.879715 40, [0] oxoxxxxx xxoxxxxx [MSB]
1675 13:54:10.882682 41, [0] oxxxxxxx xxoxxxxx [MSB]
1676 13:54:10.885978 42, [0] xxxxxxxx xxoxxxxx [MSB]
1677 13:54:10.889286 43, [0] xxxxxxxx xxxxxxxx [MSB]
1678 13:54:10.892839 iDelay=43, Bit 0, Center 24 (7 ~ 41) 35
1679 13:54:10.896238 iDelay=43, Bit 1, Center 22 (5 ~ 39) 35
1680 13:54:10.899679 iDelay=43, Bit 2, Center 22 (5 ~ 40) 36
1681 13:54:10.902775 iDelay=43, Bit 3, Center 14 (-4 ~ 32) 37
1682 13:54:10.906503 iDelay=43, Bit 4, Center 22 (5 ~ 39) 35
1683 13:54:10.909574 iDelay=43, Bit 5, Center 16 (-1 ~ 33) 35
1684 13:54:10.912842 iDelay=43, Bit 6, Center 17 (0 ~ 35) 36
1685 13:54:10.916050 iDelay=43, Bit 7, Center 17 (0 ~ 35) 36
1686 13:54:10.919467 iDelay=43, Bit 8, Center 17 (0 ~ 35) 36
1687 13:54:10.925997 iDelay=43, Bit 9, Center 19 (1 ~ 37) 37
1688 13:54:10.929360 iDelay=43, Bit 10, Center 23 (5 ~ 42) 38
1689 13:54:10.932763 iDelay=43, Bit 11, Center 17 (1 ~ 34) 34
1690 13:54:10.936223 iDelay=43, Bit 12, Center 19 (1 ~ 37) 37
1691 13:54:10.939445 iDelay=43, Bit 13, Center 18 (0 ~ 36) 37
1692 13:54:10.942969 iDelay=43, Bit 14, Center 17 (1 ~ 34) 34
1693 13:54:10.945991 iDelay=43, Bit 15, Center 20 (2 ~ 39) 38
1694 13:54:10.946097 ==
1695 13:54:10.952916 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1696 13:54:10.953012 fsp= 1, odt_onoff= 1, Byte mode= 0
1697 13:54:10.956045 ==
1698 13:54:10.956127 DQS Delay:
1699 13:54:10.956189 DQS0 = 0, DQS1 = 0
1700 13:54:10.959585 DQM Delay:
1701 13:54:10.959663 DQM0 = 19, DQM1 = 18
1702 13:54:10.963014 DQ Delay:
1703 13:54:10.963094 DQ0 =24, DQ1 =22, DQ2 =22, DQ3 =14
1704 13:54:10.966396 DQ4 =22, DQ5 =16, DQ6 =17, DQ7 =17
1705 13:54:10.969777 DQ8 =17, DQ9 =19, DQ10 =23, DQ11 =17
1706 13:54:10.973103 DQ12 =19, DQ13 =18, DQ14 =17, DQ15 =20
1707 13:54:10.973187
1708 13:54:10.973254
1709 13:54:10.976396 DramC Write-DBI off
1710 13:54:10.976475 ==
1711 13:54:10.983130 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1712 13:54:10.986374 fsp= 1, odt_onoff= 1, Byte mode= 0
1713 13:54:10.986455 ==
1714 13:54:10.989951 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1715 13:54:10.990061
1716 13:54:10.993074 Begin, DQ Scan Range 926~1182
1717 13:54:10.993164
1718 13:54:10.993231
1719 13:54:10.993320 TX Vref Scan disable
1720 13:54:10.996399 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1721 13:54:11.003362 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1722 13:54:11.006945 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1723 13:54:11.010167 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1724 13:54:11.013370 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1725 13:54:11.016724 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1726 13:54:11.020089 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1727 13:54:11.023552 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1728 13:54:11.026832 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1729 13:54:11.030280 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1730 13:54:11.033484 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1731 13:54:11.037134 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1732 13:54:11.040281 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1733 13:54:11.043764 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1734 13:54:11.046998 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1735 13:54:11.050339 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1736 13:54:11.053592 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1737 13:54:11.057124 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1738 13:54:11.060255 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1739 13:54:11.064059 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1740 13:54:11.070555 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1741 13:54:11.073805 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1742 13:54:11.077122 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1743 13:54:11.080841 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1744 13:54:11.083906 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1745 13:54:11.087561 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1746 13:54:11.091150 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1747 13:54:11.094863 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1748 13:54:11.097565 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1749 13:54:11.100960 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1750 13:54:11.104534 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1751 13:54:11.107527 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1752 13:54:11.111366 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1753 13:54:11.114387 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1754 13:54:11.117779 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1755 13:54:11.121349 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1756 13:54:11.124585 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1757 13:54:11.127626 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1758 13:54:11.131373 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1759 13:54:11.134285 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1760 13:54:11.137930 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1761 13:54:11.141140 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1762 13:54:11.144397 968 |3 6 8|[0] xxxxxxxx ooxooxox [MSB]
1763 13:54:11.147950 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1764 13:54:11.154797 970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]
1765 13:54:11.157679 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1766 13:54:11.161101 972 |3 6 12|[0] xxxxxxxx ooxooooo [MSB]
1767 13:54:11.164560 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1768 13:54:11.168120 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1769 13:54:11.171365 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1770 13:54:11.174722 976 |3 6 16|[0] xxxooooo oooooooo [MSB]
1771 13:54:11.181462 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1772 13:54:11.184762 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1773 13:54:11.188046 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1774 13:54:11.191800 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1775 13:54:11.194979 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1776 13:54:11.198085 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1777 13:54:11.201750 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1778 13:54:11.204896 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1779 13:54:11.208546 Byte0, DQ PI dly=984, DQM PI dly= 984
1780 13:54:11.211533 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1781 13:54:11.211919
1782 13:54:11.215058 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1783 13:54:11.218453
1784 13:54:11.221721 Byte1, DQ PI dly=979, DQM PI dly= 979
1785 13:54:11.225320 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1786 13:54:11.225792
1787 13:54:11.228482 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1788 13:54:11.228987
1789 13:54:11.229319 ==
1790 13:54:11.235518 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1791 13:54:11.238636 fsp= 1, odt_onoff= 1, Byte mode= 0
1792 13:54:11.239024 ==
1793 13:54:11.241898 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1794 13:54:11.242358
1795 13:54:11.245406 Begin, DQ Scan Range 955~1019
1796 13:54:11.248279 Write Rank1 MR14 =0x0
1797 13:54:11.255660
1798 13:54:11.256133 CH=0, VrefRange= 0, VrefLevel = 0
1799 13:54:11.262362 TX Bit0 (978~997) 20 987, Bit8 (968~986) 19 977,
1800 13:54:11.265619 TX Bit1 (978~995) 18 986, Bit9 (970~988) 19 979,
1801 13:54:11.272363 TX Bit2 (978~995) 18 986, Bit10 (974~990) 17 982,
1802 13:54:11.275820 TX Bit3 (974~990) 17 982, Bit11 (969~987) 19 978,
1803 13:54:11.279245 TX Bit4 (977~996) 20 986, Bit12 (970~988) 19 979,
1804 13:54:11.285797 TX Bit5 (975~990) 16 982, Bit13 (970~985) 16 977,
1805 13:54:11.289165 TX Bit6 (976~991) 16 983, Bit14 (970~987) 18 978,
1806 13:54:11.292411 TX Bit7 (977~992) 16 984, Bit15 (974~990) 17 982,
1807 13:54:11.292922
1808 13:54:11.295965 Write Rank1 MR14 =0x2
1809 13:54:11.304646
1810 13:54:11.305147 CH=0, VrefRange= 0, VrefLevel = 2
1811 13:54:11.311102 TX Bit0 (978~998) 21 988, Bit8 (968~987) 20 977,
1812 13:54:11.314513 TX Bit1 (978~996) 19 987, Bit9 (970~988) 19 979,
1813 13:54:11.321180 TX Bit2 (978~996) 19 987, Bit10 (974~990) 17 982,
1814 13:54:11.324322 TX Bit3 (974~990) 17 982, Bit11 (969~987) 19 978,
1815 13:54:11.327659 TX Bit4 (977~997) 21 987, Bit12 (969~989) 21 979,
1816 13:54:11.334499 TX Bit5 (975~990) 16 982, Bit13 (970~986) 17 978,
1817 13:54:11.337817 TX Bit6 (975~991) 17 983, Bit14 (969~988) 20 978,
1818 13:54:11.341169 TX Bit7 (977~993) 17 985, Bit15 (972~990) 19 981,
1819 13:54:11.341628
1820 13:54:11.344236 Write Rank1 MR14 =0x4
1821 13:54:11.353373
1822 13:54:11.353879 CH=0, VrefRange= 0, VrefLevel = 4
1823 13:54:11.359851 TX Bit0 (978~998) 21 988, Bit8 (968~988) 21 978,
1824 13:54:11.363296 TX Bit1 (977~996) 20 986, Bit9 (969~988) 20 978,
1825 13:54:11.369973 TX Bit2 (977~996) 20 986, Bit10 (974~991) 18 982,
1826 13:54:11.373390 TX Bit3 (973~990) 18 981, Bit11 (969~988) 20 978,
1827 13:54:11.376843 TX Bit4 (977~997) 21 987, Bit12 (969~989) 21 979,
1828 13:54:11.383212 TX Bit5 (975~990) 16 982, Bit13 (970~987) 18 978,
1829 13:54:11.386523 TX Bit6 (975~992) 18 983, Bit14 (969~989) 21 979,
1830 13:54:11.390098 TX Bit7 (977~994) 18 985, Bit15 (972~990) 19 981,
1831 13:54:11.390605
1832 13:54:11.393575 Write Rank1 MR14 =0x6
1833 13:54:11.401801
1834 13:54:11.402303 CH=0, VrefRange= 0, VrefLevel = 6
1835 13:54:11.408756 TX Bit0 (978~998) 21 988, Bit8 (968~989) 22 978,
1836 13:54:11.412094 TX Bit1 (977~997) 21 987, Bit9 (970~989) 20 979,
1837 13:54:11.418665 TX Bit2 (977~997) 21 987, Bit10 (973~991) 19 982,
1838 13:54:11.422114 TX Bit3 (973~990) 18 981, Bit11 (969~989) 21 979,
1839 13:54:11.425535 TX Bit4 (977~998) 22 987, Bit12 (969~989) 21 979,
1840 13:54:11.432733 TX Bit5 (974~991) 18 982, Bit13 (969~988) 20 978,
1841 13:54:11.435585 TX Bit6 (975~992) 18 983, Bit14 (969~989) 21 979,
1842 13:54:11.438825 TX Bit7 (977~994) 18 985, Bit15 (972~990) 19 981,
1843 13:54:11.439254
1844 13:54:11.442048 Write Rank1 MR14 =0x8
1845 13:54:11.450567
1846 13:54:11.451074 CH=0, VrefRange= 0, VrefLevel = 8
1847 13:54:11.457368 TX Bit0 (978~998) 21 988, Bit8 (967~989) 23 978,
1848 13:54:11.460523 TX Bit1 (977~997) 21 987, Bit9 (969~989) 21 979,
1849 13:54:11.467654 TX Bit2 (977~997) 21 987, Bit10 (973~991) 19 982,
1850 13:54:11.470909 TX Bit3 (972~991) 20 981, Bit11 (968~989) 22 978,
1851 13:54:11.474098 TX Bit4 (977~998) 22 987, Bit12 (969~989) 21 979,
1852 13:54:11.480646 TX Bit5 (974~991) 18 982, Bit13 (969~988) 20 978,
1853 13:54:11.484319 TX Bit6 (975~992) 18 983, Bit14 (969~989) 21 979,
1854 13:54:11.487135 TX Bit7 (977~995) 19 986, Bit15 (972~991) 20 981,
1855 13:54:11.487561
1856 13:54:11.490846 Write Rank1 MR14 =0xa
1857 13:54:11.499518
1858 13:54:11.500019 CH=0, VrefRange= 0, VrefLevel = 10
1859 13:54:11.506209 TX Bit0 (977~999) 23 988, Bit8 (967~989) 23 978,
1860 13:54:11.509610 TX Bit1 (977~998) 22 987, Bit9 (968~990) 23 979,
1861 13:54:11.516474 TX Bit2 (977~998) 22 987, Bit10 (972~992) 21 982,
1862 13:54:11.519931 TX Bit3 (972~991) 20 981, Bit11 (968~989) 22 978,
1863 13:54:11.523293 TX Bit4 (977~998) 22 987, Bit12 (969~990) 22 979,
1864 13:54:11.529713 TX Bit5 (974~991) 18 982, Bit13 (968~989) 22 978,
1865 13:54:11.533325 TX Bit6 (974~993) 20 983, Bit14 (969~990) 22 979,
1866 13:54:11.536157 TX Bit7 (976~996) 21 986, Bit15 (970~991) 22 980,
1867 13:54:11.536581
1868 13:54:11.539958 Write Rank1 MR14 =0xc
1869 13:54:11.548443
1870 13:54:11.551743 CH=0, VrefRange= 0, VrefLevel = 12
1871 13:54:11.555418 TX Bit0 (977~999) 23 988, Bit8 (967~989) 23 978,
1872 13:54:11.558757 TX Bit1 (977~998) 22 987, Bit9 (968~990) 23 979,
1873 13:54:11.565272 TX Bit2 (977~998) 22 987, Bit10 (973~992) 20 982,
1874 13:54:11.568795 TX Bit3 (972~992) 21 982, Bit11 (968~990) 23 979,
1875 13:54:11.571991 TX Bit4 (976~998) 23 987, Bit12 (968~990) 23 979,
1876 13:54:11.578817 TX Bit5 (973~992) 20 982, Bit13 (969~989) 21 979,
1877 13:54:11.582190 TX Bit6 (974~993) 20 983, Bit14 (968~990) 23 979,
1878 13:54:11.585328 TX Bit7 (976~996) 21 986, Bit15 (970~991) 22 980,
1879 13:54:11.585755
1880 13:54:11.588964 Write Rank1 MR14 =0xe
1881 13:54:11.597793
1882 13:54:11.600758 CH=0, VrefRange= 0, VrefLevel = 14
1883 13:54:11.604656 TX Bit0 (977~999) 23 988, Bit8 (967~989) 23 978,
1884 13:54:11.607629 TX Bit1 (977~998) 22 987, Bit9 (968~990) 23 979,
1885 13:54:11.614483 TX Bit2 (977~998) 22 987, Bit10 (973~992) 20 982,
1886 13:54:11.617981 TX Bit3 (972~992) 21 982, Bit11 (968~990) 23 979,
1887 13:54:11.621316 TX Bit4 (976~998) 23 987, Bit12 (968~990) 23 979,
1888 13:54:11.628305 TX Bit5 (973~992) 20 982, Bit13 (969~989) 21 979,
1889 13:54:11.631544 TX Bit6 (974~993) 20 983, Bit14 (968~990) 23 979,
1890 13:54:11.634765 TX Bit7 (976~996) 21 986, Bit15 (970~991) 22 980,
1891 13:54:11.635272
1892 13:54:11.637750 Write Rank1 MR14 =0x10
1893 13:54:11.647015
1894 13:54:11.650322 CH=0, VrefRange= 0, VrefLevel = 16
1895 13:54:11.653778 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
1896 13:54:11.656920 TX Bit1 (977~998) 22 987, Bit9 (968~990) 23 979,
1897 13:54:11.663785 TX Bit2 (977~999) 23 988, Bit10 (972~992) 21 982,
1898 13:54:11.666873 TX Bit3 (970~992) 23 981, Bit11 (967~990) 24 978,
1899 13:54:11.670452 TX Bit4 (976~999) 24 987, Bit12 (968~990) 23 979,
1900 13:54:11.677145 TX Bit5 (972~992) 21 982, Bit13 (968~989) 22 978,
1901 13:54:11.680667 TX Bit6 (973~995) 23 984, Bit14 (968~990) 23 979,
1902 13:54:11.683633 TX Bit7 (976~997) 22 986, Bit15 (969~992) 24 980,
1903 13:54:11.684226
1904 13:54:11.687059 Write Rank1 MR14 =0x12
1905 13:54:11.696287
1906 13:54:11.699809 CH=0, VrefRange= 0, VrefLevel = 18
1907 13:54:11.702790 TX Bit0 (977~1000) 24 988, Bit8 (966~990) 25 978,
1908 13:54:11.706091 TX Bit1 (976~998) 23 987, Bit9 (968~990) 23 979,
1909 13:54:11.712733 TX Bit2 (976~999) 24 987, Bit10 (972~993) 22 982,
1910 13:54:11.716116 TX Bit3 (970~993) 24 981, Bit11 (967~990) 24 978,
1911 13:54:11.719438 TX Bit4 (976~999) 24 987, Bit12 (968~991) 24 979,
1912 13:54:11.726515 TX Bit5 (972~993) 22 982, Bit13 (968~990) 23 979,
1913 13:54:11.729575 TX Bit6 (972~995) 24 983, Bit14 (968~990) 23 979,
1914 13:54:11.733111 TX Bit7 (975~997) 23 986, Bit15 (969~992) 24 980,
1915 13:54:11.733682
1916 13:54:11.736374 Write Rank1 MR14 =0x14
1917 13:54:11.745966
1918 13:54:11.748913 CH=0, VrefRange= 0, VrefLevel = 20
1919 13:54:11.752345 TX Bit0 (977~1000) 24 988, Bit8 (966~990) 25 978,
1920 13:54:11.755904 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1921 13:54:11.762656 TX Bit2 (976~999) 24 987, Bit10 (972~993) 22 982,
1922 13:54:11.765881 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
1923 13:54:11.769117 TX Bit4 (975~1000) 26 987, Bit12 (968~991) 24 979,
1924 13:54:11.776108 TX Bit5 (971~993) 23 982, Bit13 (968~990) 23 979,
1925 13:54:11.779472 TX Bit6 (972~996) 25 984, Bit14 (968~991) 24 979,
1926 13:54:11.782552 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1927 13:54:11.782984
1928 13:54:11.785734 Write Rank1 MR14 =0x16
1929 13:54:11.795256
1930 13:54:11.795758 CH=0, VrefRange= 0, VrefLevel = 22
1931 13:54:11.802018 TX Bit0 (976~1001) 26 988, Bit8 (966~990) 25 978,
1932 13:54:11.805160 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1933 13:54:11.811754 TX Bit2 (976~1000) 25 988, Bit10 (972~994) 23 983,
1934 13:54:11.815204 TX Bit3 (969~994) 26 981, Bit11 (967~991) 25 979,
1935 13:54:11.818537 TX Bit4 (975~1000) 26 987, Bit12 (968~991) 24 979,
1936 13:54:11.825027 TX Bit5 (971~994) 24 982, Bit13 (968~990) 23 979,
1937 13:54:11.828482 TX Bit6 (971~995) 25 983, Bit14 (968~991) 24 979,
1938 13:54:11.831861 TX Bit7 (975~998) 24 986, Bit15 (969~993) 25 981,
1939 13:54:11.834895
1940 13:54:11.835315 Write Rank1 MR14 =0x18
1941 13:54:11.844785
1942 13:54:11.848157 CH=0, VrefRange= 0, VrefLevel = 24
1943 13:54:11.851653 TX Bit0 (976~1001) 26 988, Bit8 (965~990) 26 977,
1944 13:54:11.854786 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
1945 13:54:11.861620 TX Bit2 (976~999) 24 987, Bit10 (972~994) 23 983,
1946 13:54:11.865030 TX Bit3 (969~994) 26 981, Bit11 (967~990) 24 978,
1947 13:54:11.868487 TX Bit4 (976~1000) 25 988, Bit12 (967~991) 25 979,
1948 13:54:11.874757 TX Bit5 (970~994) 25 982, Bit13 (968~990) 23 979,
1949 13:54:11.878536 TX Bit6 (971~996) 26 983, Bit14 (967~991) 25 979,
1950 13:54:11.881928 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1951 13:54:11.882437
1952 13:54:11.884689 Write Rank1 MR14 =0x1a
1953 13:54:11.894286
1954 13:54:11.894785 CH=0, VrefRange= 0, VrefLevel = 26
1955 13:54:11.901331 TX Bit0 (977~1001) 25 989, Bit8 (966~990) 25 978,
1956 13:54:11.904584 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
1957 13:54:11.911341 TX Bit2 (976~999) 24 987, Bit10 (970~995) 26 982,
1958 13:54:11.914921 TX Bit3 (969~994) 26 981, Bit11 (967~990) 24 978,
1959 13:54:11.918075 TX Bit4 (976~999) 24 987, Bit12 (967~991) 25 979,
1960 13:54:11.924905 TX Bit5 (970~994) 25 982, Bit13 (967~990) 24 978,
1961 13:54:11.928053 TX Bit6 (971~995) 25 983, Bit14 (967~991) 25 979,
1962 13:54:11.931143 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1963 13:54:11.931570
1964 13:54:11.934547 Write Rank1 MR14 =0x1c
1965 13:54:11.943689
1966 13:54:11.947015 CH=0, VrefRange= 0, VrefLevel = 28
1967 13:54:11.950385 TX Bit0 (977~1001) 25 989, Bit8 (966~990) 25 978,
1968 13:54:11.953910 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
1969 13:54:11.960888 TX Bit2 (976~999) 24 987, Bit10 (970~995) 26 982,
1970 13:54:11.963841 TX Bit3 (969~994) 26 981, Bit11 (967~990) 24 978,
1971 13:54:11.967458 TX Bit4 (976~999) 24 987, Bit12 (967~991) 25 979,
1972 13:54:11.973764 TX Bit5 (970~994) 25 982, Bit13 (967~990) 24 978,
1973 13:54:11.977464 TX Bit6 (971~995) 25 983, Bit14 (967~991) 25 979,
1974 13:54:11.980571 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1975 13:54:11.981001
1976 13:54:11.984053 Write Rank1 MR14 =0x1e
1977 13:54:11.993359
1978 13:54:11.996513 CH=0, VrefRange= 0, VrefLevel = 30
1979 13:54:11.999928 TX Bit0 (977~1001) 25 989, Bit8 (966~990) 25 978,
1980 13:54:12.003273 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
1981 13:54:12.010109 TX Bit2 (976~999) 24 987, Bit10 (970~995) 26 982,
1982 13:54:12.013376 TX Bit3 (969~994) 26 981, Bit11 (967~990) 24 978,
1983 13:54:12.016799 TX Bit4 (976~999) 24 987, Bit12 (967~991) 25 979,
1984 13:54:12.023636 TX Bit5 (970~994) 25 982, Bit13 (967~990) 24 978,
1985 13:54:12.026879 TX Bit6 (971~995) 25 983, Bit14 (967~991) 25 979,
1986 13:54:12.030313 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1987 13:54:12.030742
1988 13:54:12.033563 Write Rank1 MR14 =0x20
1989 13:54:12.042504
1990 13:54:12.045836 CH=0, VrefRange= 0, VrefLevel = 32
1991 13:54:12.049067 TX Bit0 (977~1001) 25 989, Bit8 (966~990) 25 978,
1992 13:54:12.052541 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
1993 13:54:12.059092 TX Bit2 (976~999) 24 987, Bit10 (970~995) 26 982,
1994 13:54:12.062438 TX Bit3 (969~994) 26 981, Bit11 (967~990) 24 978,
1995 13:54:12.065937 TX Bit4 (976~999) 24 987, Bit12 (967~991) 25 979,
1996 13:54:12.069959 TX Bit5 (970~994) 25 982, Bit13 (967~990) 24 978,
1997 13:54:12.076401 TX Bit6 (971~995) 25 983, Bit14 (967~991) 25 979,
1998 13:54:12.080059 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1999 13:54:12.080607
2000 13:54:12.081045
2001 13:54:12.083358 TX Vref found, early break! 369< 375
2002 13:54:12.090226 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2003 13:54:12.093531 u1DelayCellOfst[0]=10 cells (8 PI)
2004 13:54:12.093956 u1DelayCellOfst[1]=7 cells (6 PI)
2005 13:54:12.096886 u1DelayCellOfst[2]=7 cells (6 PI)
2006 13:54:12.100438 u1DelayCellOfst[3]=0 cells (0 PI)
2007 13:54:12.103419 u1DelayCellOfst[4]=7 cells (6 PI)
2008 13:54:12.106859 u1DelayCellOfst[5]=1 cells (1 PI)
2009 13:54:12.110114 u1DelayCellOfst[6]=2 cells (2 PI)
2010 13:54:12.113427 u1DelayCellOfst[7]=6 cells (5 PI)
2011 13:54:12.116973 Byte0, DQ PI dly=981, DQM PI dly= 985
2012 13:54:12.120321 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2013 13:54:12.120749
2014 13:54:12.123956 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2015 13:54:12.127187
2016 13:54:12.127690 u1DelayCellOfst[8]=0 cells (0 PI)
2017 13:54:12.130471 u1DelayCellOfst[9]=1 cells (1 PI)
2018 13:54:12.133655 u1DelayCellOfst[10]=5 cells (4 PI)
2019 13:54:12.137265 u1DelayCellOfst[11]=0 cells (0 PI)
2020 13:54:12.140866 u1DelayCellOfst[12]=1 cells (1 PI)
2021 13:54:12.144103 u1DelayCellOfst[13]=0 cells (0 PI)
2022 13:54:12.147318 u1DelayCellOfst[14]=1 cells (1 PI)
2023 13:54:12.150359 u1DelayCellOfst[15]=2 cells (2 PI)
2024 13:54:12.154200 Byte1, DQ PI dly=978, DQM PI dly= 980
2025 13:54:12.157334 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2026 13:54:12.157763
2027 13:54:12.160548 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2028 13:54:12.164293
2029 13:54:12.164793 Write Rank1 MR14 =0x1a
2030 13:54:12.165125
2031 13:54:12.167348 Final TX Range 0 Vref 26
2032 13:54:12.167773
2033 13:54:12.173919 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2034 13:54:12.174345
2035 13:54:12.180715 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2036 13:54:12.187511 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2037 13:54:12.194342 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2038 13:54:12.197728 Write Rank1 MR3 =0xb0
2039 13:54:12.198150 DramC Write-DBI on
2040 13:54:12.198477 ==
2041 13:54:12.204385 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2042 13:54:12.207702 fsp= 1, odt_onoff= 1, Byte mode= 0
2043 13:54:12.208129 ==
2044 13:54:12.210925 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2045 13:54:12.211398
2046 13:54:12.214289 Begin, DQ Scan Range 700~764
2047 13:54:12.214712
2048 13:54:12.215036
2049 13:54:12.215332 TX Vref Scan disable
2050 13:54:12.217645 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2051 13:54:12.224264 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2052 13:54:12.227930 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2053 13:54:12.231177 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2054 13:54:12.234536 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2055 13:54:12.237884 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2056 13:54:12.241199 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2057 13:54:12.244563 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2058 13:54:12.247865 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2059 13:54:12.251324 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2060 13:54:12.254715 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2061 13:54:12.257934 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2062 13:54:12.261488 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2063 13:54:12.264859 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2064 13:54:12.268054 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2065 13:54:12.271171 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2066 13:54:12.279658 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2067 13:54:12.283052 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2068 13:54:12.286381 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2069 13:54:12.289404 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2070 13:54:12.293135 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2071 13:54:12.296118 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2072 13:54:12.299552 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2073 13:54:12.302985 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2074 13:54:12.306329 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2075 13:54:12.309651 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2076 13:54:12.313284 Byte0, DQ PI dly=729, DQM PI dly= 729
2077 13:54:12.316819 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
2078 13:54:12.317366
2079 13:54:12.324173 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
2080 13:54:12.324866
2081 13:54:12.325355 Byte1, DQ PI dly=722, DQM PI dly= 722
2082 13:54:12.331657 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2083 13:54:12.332369
2084 13:54:12.335171 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2085 13:54:12.335650
2086 13:54:12.341837 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2087 13:54:12.348512 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2088 13:54:12.355251 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2089 13:54:12.358410 Write Rank1 MR3 =0x30
2090 13:54:12.358832 DramC Write-DBI off
2091 13:54:12.359163
2092 13:54:12.359465 [DATLAT]
2093 13:54:12.361932 Freq=1600, CH0 RK1, use_rxtx_scan=0
2094 13:54:12.362357
2095 13:54:12.365444 DATLAT Default: 0x10
2096 13:54:12.365948 7, 0xFFFF, sum=0
2097 13:54:12.368655 8, 0xFFFF, sum=0
2098 13:54:12.369201 9, 0xFFFF, sum=0
2099 13:54:12.372090 10, 0xFFFF, sum=0
2100 13:54:12.372596 11, 0xFFFF, sum=0
2101 13:54:12.375553 12, 0xFFFF, sum=0
2102 13:54:12.376090 13, 0xFFFF, sum=0
2103 13:54:12.379046 14, 0x0, sum=1
2104 13:54:12.379558 15, 0x0, sum=2
2105 13:54:12.382361 16, 0x0, sum=3
2106 13:54:12.382790 17, 0x0, sum=4
2107 13:54:12.385502 pattern=2 first_step=14 total pass=5 best_step=16
2108 13:54:12.386005 ==
2109 13:54:12.392058 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2110 13:54:12.395614 fsp= 1, odt_onoff= 1, Byte mode= 0
2111 13:54:12.396043 ==
2112 13:54:12.398801 Start DQ dly to find pass range UseTestEngine =1
2113 13:54:12.402366 x-axis: bit #, y-axis: DQ dly (-127~63)
2114 13:54:12.406060 RX Vref Scan = 0
2115 13:54:12.406565 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2116 13:54:12.410241 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2117 13:54:12.414179 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2118 13:54:12.418221 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2119 13:54:12.418656 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2120 13:54:12.422164 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2121 13:54:12.426130 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2122 13:54:12.426577 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2123 13:54:12.429365 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2124 13:54:12.432708 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2125 13:54:12.436357 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2126 13:54:12.439514 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2127 13:54:12.442813 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2128 13:54:12.446148 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2129 13:54:12.449709 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2130 13:54:12.450159 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2131 13:54:12.453154 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2132 13:54:12.456280 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2133 13:54:12.459809 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2134 13:54:12.462988 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2135 13:54:12.466732 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2136 13:54:12.467169 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2137 13:54:12.470363 -4, [0] xxxoxxxx xxxxxxxx [MSB]
2138 13:54:12.473618 -3, [0] xxxoxxxx xxxxxxxx [MSB]
2139 13:54:12.476794 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2140 13:54:12.480273 -1, [0] xxxoxoxx oxxxxxxx [MSB]
2141 13:54:12.483608 0, [0] xxxoxoxx oxxoxxxx [MSB]
2142 13:54:12.484060 1, [0] xxxoxoox oxxoxoxx [MSB]
2143 13:54:12.486816 2, [0] xxxoxooo oxxoooxx [MSB]
2144 13:54:12.491134 3, [0] xxxoxooo ooxooooo [MSB]
2145 13:54:12.494300 4, [0] xxxoxooo ooxooooo [MSB]
2146 13:54:12.497682 5, [0] xxxoxooo ooxooooo [MSB]
2147 13:54:12.498000 6, [0] xoxooooo oooooooo [MSB]
2148 13:54:12.502533 32, [0] oooxoooo oooooooo [MSB]
2149 13:54:12.505798 33, [0] oooxoooo oooooooo [MSB]
2150 13:54:12.509192 34, [0] oooxoxoo oooooxoo [MSB]
2151 13:54:12.512507 35, [0] oooxoxox oooxoxxo [MSB]
2152 13:54:12.515795 36, [0] oooxoxxx xooxoxxo [MSB]
2153 13:54:12.519275 37, [0] oooxoxxx xxoxoxxo [MSB]
2154 13:54:12.519410 38, [0] oooxoxxx xxoxxxxo [MSB]
2155 13:54:12.522760 39, [0] oooxoxxx xxoxxxxx [MSB]
2156 13:54:12.526056 40, [0] ooxxoxxx xxoxxxxx [MSB]
2157 13:54:12.528916 41, [0] oxxxxxxx xxxxxxxx [MSB]
2158 13:54:12.532562 42, [0] oxxxxxxx xxxxxxxx [MSB]
2159 13:54:12.536077 43, [0] xxxxxxxx xxxxxxxx [MSB]
2160 13:54:12.539815 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
2161 13:54:12.543124 iDelay=43, Bit 1, Center 23 (6 ~ 40) 35
2162 13:54:12.546393 iDelay=43, Bit 2, Center 23 (7 ~ 39) 33
2163 13:54:12.549463 iDelay=43, Bit 3, Center 13 (-4 ~ 31) 36
2164 13:54:12.553024 iDelay=43, Bit 4, Center 23 (6 ~ 40) 35
2165 13:54:12.556259 iDelay=43, Bit 5, Center 16 (-1 ~ 33) 35
2166 13:54:12.559945 iDelay=43, Bit 6, Center 18 (1 ~ 35) 35
2167 13:54:12.563116 iDelay=43, Bit 7, Center 18 (2 ~ 34) 33
2168 13:54:12.566399 iDelay=43, Bit 8, Center 17 (-1 ~ 35) 37
2169 13:54:12.570023 iDelay=43, Bit 9, Center 19 (3 ~ 36) 34
2170 13:54:12.573543 iDelay=43, Bit 10, Center 23 (6 ~ 40) 35
2171 13:54:12.576742 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
2172 13:54:12.580486 iDelay=43, Bit 12, Center 19 (2 ~ 37) 36
2173 13:54:12.586839 iDelay=43, Bit 13, Center 17 (1 ~ 33) 33
2174 13:54:12.590096 iDelay=43, Bit 14, Center 18 (3 ~ 34) 32
2175 13:54:12.593940 iDelay=43, Bit 15, Center 20 (3 ~ 38) 36
2176 13:54:12.594451 ==
2177 13:54:12.596996 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2178 13:54:12.600091 fsp= 1, odt_onoff= 1, Byte mode= 0
2179 13:54:12.600556 ==
2180 13:54:12.603974 DQS Delay:
2181 13:54:12.604478 DQS0 = 0, DQS1 = 0
2182 13:54:12.604811 DQM Delay:
2183 13:54:12.607258 DQM0 = 19, DQM1 = 18
2184 13:54:12.607764 DQ Delay:
2185 13:54:12.610751 DQ0 =24, DQ1 =23, DQ2 =23, DQ3 =13
2186 13:54:12.613660 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
2187 13:54:12.617400 DQ8 =17, DQ9 =19, DQ10 =23, DQ11 =17
2188 13:54:12.620718 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20
2189 13:54:12.621222
2190 13:54:12.621599
2191 13:54:12.621900
2192 13:54:12.623660 [DramC_TX_OE_Calibration] TA2
2193 13:54:12.626911 Original DQ_B0 (3 6) =30, OEN = 27
2194 13:54:12.630473 Original DQ_B1 (3 6) =30, OEN = 27
2195 13:54:12.633706 23, 0x0, End_B0=23 End_B1=23
2196 13:54:12.634141 24, 0x0, End_B0=24 End_B1=24
2197 13:54:12.637520 25, 0x0, End_B0=25 End_B1=25
2198 13:54:12.640783 26, 0x0, End_B0=26 End_B1=26
2199 13:54:12.644189 27, 0x0, End_B0=27 End_B1=27
2200 13:54:12.647601 28, 0x0, End_B0=28 End_B1=28
2201 13:54:12.648114 29, 0x0, End_B0=29 End_B1=29
2202 13:54:12.650830 30, 0x0, End_B0=30 End_B1=30
2203 13:54:12.654179 31, 0xFFFF, End_B0=30 End_B1=30
2204 13:54:12.660867 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2205 13:54:12.664401 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2206 13:54:12.664919
2207 13:54:12.665301
2208 13:54:12.667197 Write Rank1 MR23 =0x3f
2209 13:54:12.667623 [DQSOSC]
2210 13:54:12.674011 [DQSOSCAuto] RK1, (LSB)MR18= 0x8f, (MSB)MR19= 0x3, tDQSOscB0 = 345 ps tDQSOscB1 = 0 ps
2211 13:54:12.680615 CH0_RK1: MR19=0x3, MR18=0x8F, DQSOSC=345, MR23=63, INC=20, DEC=31
2212 13:54:12.683877 Write Rank1 MR23 =0x3f
2213 13:54:12.684303 [DQSOSC]
2214 13:54:12.690753 [DQSOSCAuto] RK1, (LSB)MR18= 0x8b, (MSB)MR19= 0x3, tDQSOscB0 = 347 ps tDQSOscB1 = 0 ps
2215 13:54:12.694049 CH0 RK1: MR19=3, MR18=8B
2216 13:54:12.697480 [RxdqsGatingPostProcess] freq 1600
2217 13:54:12.704072 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2218 13:54:12.704658 Rank: 0
2219 13:54:12.707455 best DQS0 dly(2T, 0.5T) = (2, 5)
2220 13:54:12.710707 best DQS1 dly(2T, 0.5T) = (2, 5)
2221 13:54:12.714007 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2222 13:54:12.714430 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2223 13:54:12.717373 Rank: 1
2224 13:54:12.721404 best DQS0 dly(2T, 0.5T) = (2, 6)
2225 13:54:12.721917 best DQS1 dly(2T, 0.5T) = (2, 6)
2226 13:54:12.724142 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2227 13:54:12.727675 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2228 13:54:12.734427 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2229 13:54:12.738044 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2230 13:54:12.740892 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2231 13:54:12.744449 Write Rank0 MR13 =0x59
2232 13:54:12.745005 ==
2233 13:54:12.747730 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2234 13:54:12.751074 fsp= 1, odt_onoff= 1, Byte mode= 0
2235 13:54:12.751497 ==
2236 13:54:12.754458 === u2Vref_new: 0x56 --> 0x3a
2237 13:54:12.757599 === u2Vref_new: 0x58 --> 0x58
2238 13:54:12.761220 === u2Vref_new: 0x5a --> 0x5a
2239 13:54:12.764307 === u2Vref_new: 0x5c --> 0x78
2240 13:54:12.767681 === u2Vref_new: 0x5e --> 0x7a
2241 13:54:12.771253 === u2Vref_new: 0x60 --> 0x90
2242 13:54:12.774678 [CA 0] Center 37 (11~63) winsize 53
2243 13:54:12.777900 [CA 1] Center 36 (9~63) winsize 55
2244 13:54:12.781395 [CA 2] Center 33 (4~63) winsize 60
2245 13:54:12.784625 [CA 3] Center 34 (5~63) winsize 59
2246 13:54:12.787781 [CA 4] Center 34 (6~63) winsize 58
2247 13:54:12.791325 [CA 5] Center 28 (-1~57) winsize 59
2248 13:54:12.791748
2249 13:54:12.794673 [CATrainingPosCal] consider 1 rank data
2250 13:54:12.798076 u2DelayCellTimex100 = 753/100 ps
2251 13:54:12.801432 CA0 delay=37 (11~63),Diff = 9 PI (11 cell)
2252 13:54:12.805380 CA1 delay=36 (9~63),Diff = 8 PI (10 cell)
2253 13:54:12.807989 CA2 delay=33 (4~63),Diff = 5 PI (6 cell)
2254 13:54:12.811269 CA3 delay=34 (5~63),Diff = 6 PI (7 cell)
2255 13:54:12.814499 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2256 13:54:12.817898 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2257 13:54:12.818317
2258 13:54:12.821761 CA PerBit enable=1, Macro0, CA PI delay=28
2259 13:54:12.824776 === u2Vref_new: 0x56 --> 0x3a
2260 13:54:12.825198
2261 13:54:12.828038 Vref(ca) range 1: 22
2262 13:54:12.828458
2263 13:54:12.828788 CS Dly= 11 (42-0-32)
2264 13:54:12.831611 Write Rank0 MR13 =0xd8
2265 13:54:12.835059 Write Rank0 MR13 =0xd8
2266 13:54:12.835562 Write Rank0 MR12 =0x56
2267 13:54:12.838295 Write Rank1 MR13 =0x59
2268 13:54:12.838826 ==
2269 13:54:12.841541 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2270 13:54:12.845094 fsp= 1, odt_onoff= 1, Byte mode= 0
2271 13:54:12.845654 ==
2272 13:54:12.848516 === u2Vref_new: 0x56 --> 0x3a
2273 13:54:12.851728 === u2Vref_new: 0x58 --> 0x58
2274 13:54:12.855394 === u2Vref_new: 0x5a --> 0x5a
2275 13:54:12.858237 === u2Vref_new: 0x5c --> 0x78
2276 13:54:12.861814 === u2Vref_new: 0x5e --> 0x7a
2277 13:54:12.865145 === u2Vref_new: 0x60 --> 0x90
2278 13:54:12.865694
2279 13:54:12.868655 CBT Vref found, early break!
2280 13:54:12.871823 [CA 0] Center 37 (11~63) winsize 53
2281 13:54:12.875468 [CA 1] Center 35 (8~63) winsize 56
2282 13:54:12.878368 [CA 2] Center 33 (4~63) winsize 60
2283 13:54:12.878814 [CA 3] Center 33 (4~63) winsize 60
2284 13:54:12.882098 [CA 4] Center 35 (7~63) winsize 57
2285 13:54:12.885075 [CA 5] Center 27 (-1~56) winsize 58
2286 13:54:12.885618
2287 13:54:12.888405 [CATrainingPosCal] consider 2 rank data
2288 13:54:12.891881 u2DelayCellTimex100 = 753/100 ps
2289 13:54:12.895005 CA0 delay=37 (11~63),Diff = 10 PI (12 cell)
2290 13:54:12.901937 CA1 delay=36 (9~63),Diff = 9 PI (11 cell)
2291 13:54:12.905093 CA2 delay=33 (4~63),Diff = 6 PI (7 cell)
2292 13:54:12.908847 CA3 delay=34 (5~63),Diff = 7 PI (9 cell)
2293 13:54:12.911871 CA4 delay=35 (7~63),Diff = 8 PI (10 cell)
2294 13:54:12.915585 CA5 delay=27 (-1~56),Diff = 0 PI (0 cell)
2295 13:54:12.916082
2296 13:54:12.918738 CA PerBit enable=1, Macro0, CA PI delay=27
2297 13:54:12.921976 === u2Vref_new: 0x56 --> 0x3a
2298 13:54:12.922406
2299 13:54:12.925468 Vref(ca) range 1: 22
2300 13:54:12.925935
2301 13:54:12.926268 CS Dly= 12 (43-0-32)
2302 13:54:12.929049 Write Rank1 MR13 =0xd8
2303 13:54:12.929601 Write Rank1 MR13 =0xd8
2304 13:54:12.932077 Write Rank1 MR12 =0x56
2305 13:54:12.935547 [RankSwap] Rank num 2, (Multi 1), Rank 0
2306 13:54:12.938668 Write Rank0 MR2 =0xad
2307 13:54:12.939097 [Write Leveling]
2308 13:54:12.942309 delay byte0 byte1 byte2 byte3
2309 13:54:12.942823
2310 13:54:12.945819 10 0 0
2311 13:54:12.946338 11 0 0
2312 13:54:12.946681 12 0 0
2313 13:54:12.948838 13 0 0
2314 13:54:12.949288 14 0 0
2315 13:54:12.952593 15 0 0
2316 13:54:12.953023 16 0 0
2317 13:54:12.953395 17 0 0
2318 13:54:12.955789 18 0 0
2319 13:54:12.956300 19 0 0
2320 13:54:12.958938 20 0 0
2321 13:54:12.959370 21 0 0
2322 13:54:12.959706 22 0 0
2323 13:54:12.962471 23 0 0
2324 13:54:12.962984 24 0 0
2325 13:54:12.965749 25 0 0
2326 13:54:12.966185 26 0 0
2327 13:54:12.968735 27 0 0
2328 13:54:12.969165 28 0 0
2329 13:54:12.969526 29 0 0
2330 13:54:12.972295 30 0 0
2331 13:54:12.972728 31 0 0
2332 13:54:12.975954 32 0 ff
2333 13:54:12.976469 33 0 ff
2334 13:54:12.979058 34 0 ff
2335 13:54:12.979489 35 ff ff
2336 13:54:12.979828 36 0 ff
2337 13:54:12.982238 37 ff ff
2338 13:54:12.982674 38 ff ff
2339 13:54:12.985508 39 ff ff
2340 13:54:12.985943 40 ff ff
2341 13:54:12.988955 41 ff ff
2342 13:54:12.989501 42 ff ff
2343 13:54:12.992482 43 ff ff
2344 13:54:12.995536 pass bytecount = 0xff (0xff: all bytes pass)
2345 13:54:12.995967
2346 13:54:12.996299 DQS0 dly: 37
2347 13:54:12.998907 DQS1 dly: 32
2348 13:54:12.999411 Write Rank0 MR2 =0x2d
2349 13:54:13.002521 [RankSwap] Rank num 2, (Multi 1), Rank 0
2350 13:54:13.005688 Write Rank0 MR1 =0xd6
2351 13:54:13.006195 [Gating]
2352 13:54:13.006525 ==
2353 13:54:13.012473 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2354 13:54:13.015666 fsp= 1, odt_onoff= 1, Byte mode= 0
2355 13:54:13.016176 ==
2356 13:54:13.019064 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2357 13:54:13.022508 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2358 13:54:13.029043 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2359 13:54:13.032617 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2360 13:54:13.035612 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2361 13:54:13.042491 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2362 13:54:13.045805 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2363 13:54:13.049184 3 1 28 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2364 13:54:13.052301 3 2 0 |e0e 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2365 13:54:13.059307 3 2 4 |3d3d 1a19 |(11 11)(11 11) |(1 1)(0 0)| 0
2366 13:54:13.062982 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2367 13:54:13.065950 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2368 13:54:13.072560 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2369 13:54:13.076266 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2370 13:54:13.079443 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2371 13:54:13.086889 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2372 13:54:13.089331 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2373 13:54:13.092929 3 3 4 |201 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2374 13:54:13.096217 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2375 13:54:13.102694 [Byte 0] Lead/lag Transition tap number (1)
2376 13:54:13.106198 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2377 13:54:13.109710 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2378 13:54:13.112883 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2379 13:54:13.119305 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2380 13:54:13.122984 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2381 13:54:13.126216 3 4 0 |2a2a 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2382 13:54:13.132586 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2383 13:54:13.136602 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2384 13:54:13.139506 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2385 13:54:13.146516 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2386 13:54:13.149757 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2387 13:54:13.153058 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2388 13:54:13.160289 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2389 13:54:13.163328 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2390 13:54:13.166637 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2391 13:54:13.169988 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2392 13:54:13.176638 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2393 13:54:13.180078 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2394 13:54:13.183332 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2395 13:54:13.190036 [Byte 0] Lead/lag falling Transition (3, 5, 20)
2396 13:54:13.193223 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2397 13:54:13.196478 [Byte 0] Lead/lag Transition tap number (2)
2398 13:54:13.199958 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2399 13:54:13.206564 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2400 13:54:13.209942 3 6 0 |1414 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2401 13:54:13.213363 [Byte 1] Lead/lag Transition tap number (3)
2402 13:54:13.216739 3 6 4 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
2403 13:54:13.220095 [Byte 0]First pass (3, 6, 4)
2404 13:54:13.223334 3 6 8 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
2405 13:54:13.229803 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2406 13:54:13.230291 [Byte 1]First pass (3, 6, 12)
2407 13:54:13.236592 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2408 13:54:13.239747 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2409 13:54:13.243626 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2410 13:54:13.246667 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2411 13:54:13.249929 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2412 13:54:13.256675 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2413 13:54:13.259935 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2414 13:54:13.263381 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2415 13:54:13.266454 All bytes gating window > 1UI, Early break!
2416 13:54:13.266945
2417 13:54:13.269800 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)
2418 13:54:13.270225
2419 13:54:13.273354 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
2420 13:54:13.276695
2421 13:54:13.277185
2422 13:54:13.277551
2423 13:54:13.279940 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
2424 13:54:13.280452
2425 13:54:13.283531 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
2426 13:54:13.284030
2427 13:54:13.284359
2428 13:54:13.286575 Write Rank0 MR1 =0x56
2429 13:54:13.287000
2430 13:54:13.290147 best RODT dly(2T, 0.5T) = (2, 2)
2431 13:54:13.290652
2432 13:54:13.293476 best RODT dly(2T, 0.5T) = (2, 2)
2433 13:54:13.293981 ==
2434 13:54:13.296713 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2435 13:54:13.300079 fsp= 1, odt_onoff= 1, Byte mode= 0
2436 13:54:13.300584 ==
2437 13:54:13.303032 Start DQ dly to find pass range UseTestEngine =0
2438 13:54:13.309999 x-axis: bit #, y-axis: DQ dly (-127~63)
2439 13:54:13.310499 RX Vref Scan = 0
2440 13:54:13.313298 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2441 13:54:13.316479 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2442 13:54:13.319772 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2443 13:54:13.320210 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2444 13:54:13.323523 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2445 13:54:13.326572 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2446 13:54:13.329932 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2447 13:54:13.333337 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2448 13:54:13.336926 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2449 13:54:13.339962 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2450 13:54:13.343815 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2451 13:54:13.344325 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2452 13:54:13.346980 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2453 13:54:13.350172 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2454 13:54:13.353334 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2455 13:54:13.356814 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2456 13:54:13.360189 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2457 13:54:13.363552 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2458 13:54:13.366850 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2459 13:54:13.367283 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2460 13:54:13.369825 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2461 13:54:13.373265 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2462 13:54:13.376471 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2463 13:54:13.380149 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2464 13:54:13.383598 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2465 13:54:13.387065 -1, [0] xxxxxxxx xxxxxxxo [MSB]
2466 13:54:13.387504 0, [0] xxxoxxxx xxxxxxxo [MSB]
2467 13:54:13.390059 1, [0] xxxoxxxx xxxxxxxo [MSB]
2468 13:54:13.393206 2, [0] xxooxxxo oxoxxxxo [MSB]
2469 13:54:13.396878 3, [0] xxoooxxo ooooxxoo [MSB]
2470 13:54:13.399952 4, [0] xxoooxxo ooooxooo [MSB]
2471 13:54:13.403347 5, [0] xooooxxo oooooooo [MSB]
2472 13:54:13.403784 32, [0] oooxoooo oooooooo [MSB]
2473 13:54:13.406862 33, [0] ooxxoooo ooooooox [MSB]
2474 13:54:13.409982 34, [0] ooxxoooo oxooooox [MSB]
2475 13:54:13.413344 35, [0] ooxxoooo oxxxooox [MSB]
2476 13:54:13.416752 36, [0] ooxxoooo xxxxooxx [MSB]
2477 13:54:13.420023 37, [0] ooxxxoox xxxxoxxx [MSB]
2478 13:54:13.423680 38, [0] ooxxxoox xxxxoxxx [MSB]
2479 13:54:13.424190 39, [0] ooxxxoox xxxxxxxx [MSB]
2480 13:54:13.426587 40, [0] ooxxxoox xxxxxxxx [MSB]
2481 13:54:13.430372 41, [0] ooxxxoxx xxxxxxxx [MSB]
2482 13:54:13.433107 42, [0] xxxxxxxx xxxxxxxx [MSB]
2483 13:54:13.436361 iDelay=42, Bit 0, Center 23 (6 ~ 41) 36
2484 13:54:13.439553 iDelay=42, Bit 1, Center 23 (5 ~ 41) 37
2485 13:54:13.443048 iDelay=42, Bit 2, Center 17 (2 ~ 32) 31
2486 13:54:13.446675 iDelay=42, Bit 3, Center 15 (0 ~ 31) 32
2487 13:54:13.449988 iDelay=42, Bit 4, Center 19 (3 ~ 36) 34
2488 13:54:13.453285 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
2489 13:54:13.456662 iDelay=42, Bit 6, Center 23 (6 ~ 40) 35
2490 13:54:13.459885 iDelay=42, Bit 7, Center 19 (2 ~ 36) 35
2491 13:54:13.466539 iDelay=42, Bit 8, Center 18 (2 ~ 35) 34
2492 13:54:13.469810 iDelay=42, Bit 9, Center 18 (3 ~ 33) 31
2493 13:54:13.473532 iDelay=42, Bit 10, Center 18 (2 ~ 34) 33
2494 13:54:13.476967 iDelay=42, Bit 11, Center 18 (3 ~ 34) 32
2495 13:54:13.480008 iDelay=42, Bit 12, Center 21 (5 ~ 38) 34
2496 13:54:13.483122 iDelay=42, Bit 13, Center 20 (4 ~ 36) 33
2497 13:54:13.486631 iDelay=42, Bit 14, Center 19 (3 ~ 35) 33
2498 13:54:13.489964 iDelay=42, Bit 15, Center 15 (-2 ~ 32) 35
2499 13:54:13.490391 ==
2500 13:54:13.496481 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2501 13:54:13.500142 fsp= 1, odt_onoff= 1, Byte mode= 0
2502 13:54:13.500646 ==
2503 13:54:13.500978 DQS Delay:
2504 13:54:13.503542 DQS0 = 0, DQS1 = 0
2505 13:54:13.503977 DQM Delay:
2506 13:54:13.504311 DQM0 = 20, DQM1 = 18
2507 13:54:13.506675 DQ Delay:
2508 13:54:13.509839 DQ0 =23, DQ1 =23, DQ2 =17, DQ3 =15
2509 13:54:13.513319 DQ4 =19, DQ5 =23, DQ6 =23, DQ7 =19
2510 13:54:13.516320 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =18
2511 13:54:13.519884 DQ12 =21, DQ13 =20, DQ14 =19, DQ15 =15
2512 13:54:13.520381
2513 13:54:13.520708
2514 13:54:13.521013 DramC Write-DBI off
2515 13:54:13.521347 ==
2516 13:54:13.526675 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2517 13:54:13.529954 fsp= 1, odt_onoff= 1, Byte mode= 0
2518 13:54:13.530384 ==
2519 13:54:13.533614 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2520 13:54:13.534196
2521 13:54:13.536903 Begin, DQ Scan Range 928~1184
2522 13:54:13.537429
2523 13:54:13.537762
2524 13:54:13.540110 TX Vref Scan disable
2525 13:54:13.543914 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2526 13:54:13.546847 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2527 13:54:13.549999 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2528 13:54:13.553343 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2529 13:54:13.556675 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2530 13:54:13.560515 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2531 13:54:13.563665 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2532 13:54:13.566510 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2533 13:54:13.569883 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2534 13:54:13.573624 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2535 13:54:13.576830 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2536 13:54:13.580147 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2537 13:54:13.583298 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2538 13:54:13.586912 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2539 13:54:13.590140 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2540 13:54:13.596921 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2541 13:54:13.600460 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2542 13:54:13.603412 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2543 13:54:13.606866 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2544 13:54:13.610143 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2545 13:54:13.613923 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2546 13:54:13.616992 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2547 13:54:13.620560 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2548 13:54:13.623523 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2549 13:54:13.626745 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2550 13:54:13.630056 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2551 13:54:13.633652 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2552 13:54:13.637047 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2553 13:54:13.640268 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2554 13:54:13.643609 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2555 13:54:13.647121 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2556 13:54:13.650386 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2557 13:54:13.656892 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2558 13:54:13.660005 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2559 13:54:13.663799 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2560 13:54:13.667014 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2561 13:54:13.670212 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2562 13:54:13.673511 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2563 13:54:13.677163 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2564 13:54:13.680311 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
2565 13:54:13.683805 968 |3 6 8|[0] xxxxxxxx oxxxxxxo [MSB]
2566 13:54:13.687160 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
2567 13:54:13.690428 970 |3 6 10|[0] xxxxxxxx oooooxoo [MSB]
2568 13:54:13.693950 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
2569 13:54:13.697196 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2570 13:54:13.700502 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
2571 13:54:13.703852 974 |3 6 14|[0] xxxoxxxx oooooooo [MSB]
2572 13:54:13.707034 975 |3 6 15|[0] xxooxxxx oooooooo [MSB]
2573 13:54:13.710203 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
2574 13:54:13.718300 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2575 13:54:13.721560 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2576 13:54:13.725331 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2577 13:54:13.728305 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
2578 13:54:13.731573 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]
2579 13:54:13.734697 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
2580 13:54:13.738092 997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]
2581 13:54:13.741293 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
2582 13:54:13.745001 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2583 13:54:13.748121 Byte0, DQ PI dly=985, DQM PI dly= 985
2584 13:54:13.751295 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2585 13:54:13.751741
2586 13:54:13.758447 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2587 13:54:13.758961
2588 13:54:13.761211 Byte1, DQ PI dly=979, DQM PI dly= 979
2589 13:54:13.764921 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2590 13:54:13.765407
2591 13:54:13.768092 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2592 13:54:13.768610
2593 13:54:13.771230 ==
2594 13:54:13.775021 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2595 13:54:13.778173 fsp= 1, odt_onoff= 1, Byte mode= 0
2596 13:54:13.778687 ==
2597 13:54:13.781221 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2598 13:54:13.781704
2599 13:54:13.784578 Begin, DQ Scan Range 955~1019
2600 13:54:13.787991 Write Rank0 MR14 =0x0
2601 13:54:13.796096
2602 13:54:13.796622 CH=1, VrefRange= 0, VrefLevel = 0
2603 13:54:13.802594 TX Bit0 (980~997) 18 988, Bit8 (970~988) 19 979,
2604 13:54:13.806162 TX Bit1 (978~995) 18 986, Bit9 (970~986) 17 978,
2605 13:54:13.812497 TX Bit2 (977~990) 14 983, Bit10 (971~987) 17 979,
2606 13:54:13.815996 TX Bit3 (975~990) 16 982, Bit11 (972~989) 18 980,
2607 13:54:13.819128 TX Bit4 (977~992) 16 984, Bit12 (972~991) 20 981,
2608 13:54:13.826187 TX Bit5 (979~997) 19 988, Bit13 (973~990) 18 981,
2609 13:54:13.829473 TX Bit6 (980~997) 18 988, Bit14 (972~988) 17 980,
2610 13:54:13.832644 TX Bit7 (978~992) 15 985, Bit15 (968~985) 18 976,
2611 13:54:13.833157
2612 13:54:13.835703 Write Rank0 MR14 =0x2
2613 13:54:13.844719
2614 13:54:13.845273 CH=1, VrefRange= 0, VrefLevel = 2
2615 13:54:13.851663 TX Bit0 (980~998) 19 989, Bit8 (970~988) 19 979,
2616 13:54:13.854512 TX Bit1 (978~996) 19 987, Bit9 (970~988) 19 979,
2617 13:54:13.861189 TX Bit2 (976~991) 16 983, Bit10 (971~988) 18 979,
2618 13:54:13.864607 TX Bit3 (975~990) 16 982, Bit11 (971~990) 20 980,
2619 13:54:13.867721 TX Bit4 (977~993) 17 985, Bit12 (972~991) 20 981,
2620 13:54:13.874380 TX Bit5 (978~998) 21 988, Bit13 (973~990) 18 981,
2621 13:54:13.877925 TX Bit6 (979~998) 20 988, Bit14 (971~989) 19 980,
2622 13:54:13.881298 TX Bit7 (978~992) 15 985, Bit15 (968~986) 19 977,
2623 13:54:13.881813
2624 13:54:13.884344 Write Rank0 MR14 =0x4
2625 13:54:13.893329
2626 13:54:13.893841 CH=1, VrefRange= 0, VrefLevel = 4
2627 13:54:13.899748 TX Bit0 (979~998) 20 988, Bit8 (970~989) 20 979,
2628 13:54:13.903240 TX Bit1 (978~996) 19 987, Bit9 (970~988) 19 979,
2629 13:54:13.910203 TX Bit2 (976~991) 16 983, Bit10 (970~989) 20 979,
2630 13:54:13.913433 TX Bit3 (975~991) 17 983, Bit11 (971~991) 21 981,
2631 13:54:13.916663 TX Bit4 (977~994) 18 985, Bit12 (971~991) 21 981,
2632 13:54:13.923456 TX Bit5 (978~998) 21 988, Bit13 (972~990) 19 981,
2633 13:54:13.927128 TX Bit6 (979~998) 20 988, Bit14 (971~990) 20 980,
2634 13:54:13.930345 TX Bit7 (977~993) 17 985, Bit15 (968~987) 20 977,
2635 13:54:13.930787
2636 13:54:13.933477 Write Rank0 MR14 =0x6
2637 13:54:13.942188
2638 13:54:13.942702 CH=1, VrefRange= 0, VrefLevel = 6
2639 13:54:13.948811 TX Bit0 (979~998) 20 988, Bit8 (969~990) 22 979,
2640 13:54:13.952150 TX Bit1 (977~997) 21 987, Bit9 (969~988) 20 978,
2641 13:54:13.958686 TX Bit2 (976~991) 16 983, Bit10 (970~989) 20 979,
2642 13:54:13.962219 TX Bit3 (975~991) 17 983, Bit11 (971~991) 21 981,
2643 13:54:13.965553 TX Bit4 (977~994) 18 985, Bit12 (971~991) 21 981,
2644 13:54:13.972298 TX Bit5 (978~998) 21 988, Bit13 (971~991) 21 981,
2645 13:54:13.975489 TX Bit6 (978~998) 21 988, Bit14 (971~990) 20 980,
2646 13:54:13.978615 TX Bit7 (977~993) 17 985, Bit15 (968~987) 20 977,
2647 13:54:13.979124
2648 13:54:13.981958 Write Rank0 MR14 =0x8
2649 13:54:13.990926
2650 13:54:13.991419 CH=1, VrefRange= 0, VrefLevel = 8
2651 13:54:13.997406 TX Bit0 (979~998) 20 988, Bit8 (969~990) 22 979,
2652 13:54:14.000836 TX Bit1 (977~997) 21 987, Bit9 (969~989) 21 979,
2653 13:54:14.007283 TX Bit2 (976~992) 17 984, Bit10 (970~990) 21 980,
2654 13:54:14.010556 TX Bit3 (974~991) 18 982, Bit11 (971~991) 21 981,
2655 13:54:14.014165 TX Bit4 (976~995) 20 985, Bit12 (971~992) 22 981,
2656 13:54:14.020670 TX Bit5 (977~998) 22 987, Bit13 (971~991) 21 981,
2657 13:54:14.024164 TX Bit6 (978~998) 21 988, Bit14 (971~990) 20 980,
2658 13:54:14.027459 TX Bit7 (977~994) 18 985, Bit15 (968~987) 20 977,
2659 13:54:14.028010
2660 13:54:14.030581 Write Rank0 MR14 =0xa
2661 13:54:14.039535
2662 13:54:14.042920 CH=1, VrefRange= 0, VrefLevel = 10
2663 13:54:14.046240 TX Bit0 (978~998) 21 988, Bit8 (969~991) 23 980,
2664 13:54:14.049575 TX Bit1 (977~997) 21 987, Bit9 (969~990) 22 979,
2665 13:54:14.056240 TX Bit2 (976~992) 17 984, Bit10 (970~991) 22 980,
2666 13:54:14.059323 TX Bit3 (974~992) 19 983, Bit11 (971~991) 21 981,
2667 13:54:14.062670 TX Bit4 (976~996) 21 986, Bit12 (971~992) 22 981,
2668 13:54:14.069570 TX Bit5 (977~998) 22 987, Bit13 (971~991) 21 981,
2669 13:54:14.072761 TX Bit6 (978~998) 21 988, Bit14 (970~991) 22 980,
2670 13:54:14.076375 TX Bit7 (977~994) 18 985, Bit15 (968~988) 21 978,
2671 13:54:14.076874
2672 13:54:14.079545 Write Rank0 MR14 =0xc
2673 13:54:14.088525
2674 13:54:14.091732 CH=1, VrefRange= 0, VrefLevel = 12
2675 13:54:14.094837 TX Bit0 (978~999) 22 988, Bit8 (969~991) 23 980,
2676 13:54:14.098700 TX Bit1 (977~998) 22 987, Bit9 (968~990) 23 979,
2677 13:54:14.105185 TX Bit2 (976~993) 18 984, Bit10 (969~991) 23 980,
2678 13:54:14.108650 TX Bit3 (973~992) 20 982, Bit11 (970~992) 23 981,
2679 13:54:14.111599 TX Bit4 (976~996) 21 986, Bit12 (971~992) 22 981,
2680 13:54:14.118239 TX Bit5 (977~999) 23 988, Bit13 (971~991) 21 981,
2681 13:54:14.121607 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
2682 13:54:14.125127 TX Bit7 (977~995) 19 986, Bit15 (968~989) 22 978,
2683 13:54:14.125719
2684 13:54:14.128207 Write Rank0 MR14 =0xe
2685 13:54:14.137664
2686 13:54:14.140614 CH=1, VrefRange= 0, VrefLevel = 14
2687 13:54:14.144386 TX Bit0 (978~999) 22 988, Bit8 (969~991) 23 980,
2688 13:54:14.147440 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
2689 13:54:14.154044 TX Bit2 (975~993) 19 984, Bit10 (969~991) 23 980,
2690 13:54:14.157591 TX Bit3 (973~993) 21 983, Bit11 (970~992) 23 981,
2691 13:54:14.160695 TX Bit4 (976~997) 22 986, Bit12 (970~992) 23 981,
2692 13:54:14.167531 TX Bit5 (977~999) 23 988, Bit13 (970~992) 23 981,
2693 13:54:14.171202 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
2694 13:54:14.174170 TX Bit7 (977~995) 19 986, Bit15 (967~990) 24 978,
2695 13:54:14.174592
2696 13:54:14.177642 Write Rank0 MR14 =0x10
2697 13:54:14.186443
2698 13:54:14.189677 CH=1, VrefRange= 0, VrefLevel = 16
2699 13:54:14.193325 TX Bit0 (977~999) 23 988, Bit8 (968~991) 24 979,
2700 13:54:14.196588 TX Bit1 (977~998) 22 987, Bit9 (969~991) 23 980,
2701 13:54:14.203120 TX Bit2 (975~994) 20 984, Bit10 (969~991) 23 980,
2702 13:54:14.206701 TX Bit3 (973~993) 21 983, Bit11 (970~992) 23 981,
2703 13:54:14.209970 TX Bit4 (976~997) 22 986, Bit12 (970~993) 24 981,
2704 13:54:14.216435 TX Bit5 (977~999) 23 988, Bit13 (970~992) 23 981,
2705 13:54:14.219894 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
2706 13:54:14.223498 TX Bit7 (976~996) 21 986, Bit15 (967~990) 24 978,
2707 13:54:14.224016
2708 13:54:14.226227 Write Rank0 MR14 =0x12
2709 13:54:14.235568
2710 13:54:14.236089 CH=1, VrefRange= 0, VrefLevel = 18
2711 13:54:14.242090 TX Bit0 (977~1000) 24 988, Bit8 (968~991) 24 979,
2712 13:54:14.245818 TX Bit1 (976~998) 23 987, Bit9 (968~991) 24 979,
2713 13:54:14.252146 TX Bit2 (975~995) 21 985, Bit10 (969~992) 24 980,
2714 13:54:14.255586 TX Bit3 (972~994) 23 983, Bit11 (970~992) 23 981,
2715 13:54:14.258954 TX Bit4 (976~998) 23 987, Bit12 (970~993) 24 981,
2716 13:54:14.266013 TX Bit5 (977~999) 23 988, Bit13 (970~992) 23 981,
2717 13:54:14.269127 TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981,
2718 13:54:14.272295 TX Bit7 (976~997) 22 986, Bit15 (967~990) 24 978,
2719 13:54:14.275685
2720 13:54:14.276176 Write Rank0 MR14 =0x14
2721 13:54:14.285202
2722 13:54:14.288405 CH=1, VrefRange= 0, VrefLevel = 20
2723 13:54:14.291514 TX Bit0 (977~1000) 24 988, Bit8 (968~992) 25 980,
2724 13:54:14.295133 TX Bit1 (976~998) 23 987, Bit9 (968~991) 24 979,
2725 13:54:14.301645 TX Bit2 (974~995) 22 984, Bit10 (969~992) 24 980,
2726 13:54:14.304909 TX Bit3 (972~994) 23 983, Bit11 (970~992) 23 981,
2727 13:54:14.308359 TX Bit4 (975~998) 24 986, Bit12 (970~993) 24 981,
2728 13:54:14.314982 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
2729 13:54:14.317940 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
2730 13:54:14.324731 TX Bit7 (976~997) 22 986, Bit15 (967~991) 25 979,
2731 13:54:14.325285
2732 13:54:14.325731 Write Rank0 MR14 =0x16
2733 13:54:14.334399
2734 13:54:14.337757 CH=1, VrefRange= 0, VrefLevel = 22
2735 13:54:14.341306 TX Bit0 (977~1000) 24 988, Bit8 (968~991) 24 979,
2736 13:54:14.344307 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
2737 13:54:14.351249 TX Bit2 (974~996) 23 985, Bit10 (968~992) 25 980,
2738 13:54:14.354433 TX Bit3 (972~995) 24 983, Bit11 (969~993) 25 981,
2739 13:54:14.358029 TX Bit4 (975~998) 24 986, Bit12 (970~993) 24 981,
2740 13:54:14.364399 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
2741 13:54:14.367852 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
2742 13:54:14.370953 TX Bit7 (975~998) 24 986, Bit15 (966~991) 26 978,
2743 13:54:14.374256
2744 13:54:14.374673 Write Rank0 MR14 =0x18
2745 13:54:14.383942
2746 13:54:14.387057 CH=1, VrefRange= 0, VrefLevel = 24
2747 13:54:14.390442 TX Bit0 (977~1000) 24 988, Bit8 (968~991) 24 979,
2748 13:54:14.394157 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
2749 13:54:14.400867 TX Bit2 (974~996) 23 985, Bit10 (968~992) 25 980,
2750 13:54:14.403896 TX Bit3 (972~995) 24 983, Bit11 (969~993) 25 981,
2751 13:54:14.407423 TX Bit4 (975~998) 24 986, Bit12 (970~993) 24 981,
2752 13:54:14.413689 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
2753 13:54:14.417307 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
2754 13:54:14.420923 TX Bit7 (975~998) 24 986, Bit15 (966~991) 26 978,
2755 13:54:14.423897
2756 13:54:14.424387 Write Rank0 MR14 =0x1a
2757 13:54:14.433645
2758 13:54:14.434151 CH=1, VrefRange= 0, VrefLevel = 26
2759 13:54:14.440429 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
2760 13:54:14.443612 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
2761 13:54:14.450540 TX Bit2 (973~997) 25 985, Bit10 (968~992) 25 980,
2762 13:54:14.453744 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2763 13:54:14.456820 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2764 13:54:14.463492 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2765 13:54:14.466771 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2766 13:54:14.470344 TX Bit7 (975~998) 24 986, Bit15 (966~991) 26 978,
2767 13:54:14.470788
2768 13:54:14.473394 Write Rank0 MR14 =0x1c
2769 13:54:14.483312
2770 13:54:14.486539 CH=1, VrefRange= 0, VrefLevel = 28
2771 13:54:14.489713 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
2772 13:54:14.492790 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
2773 13:54:14.499497 TX Bit2 (973~997) 25 985, Bit10 (968~992) 25 980,
2774 13:54:14.503008 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2775 13:54:14.506402 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2776 13:54:14.513074 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2777 13:54:14.516332 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2778 13:54:14.519478 TX Bit7 (975~998) 24 986, Bit15 (966~991) 26 978,
2779 13:54:14.522798
2780 13:54:14.523251 Write Rank0 MR14 =0x1e
2781 13:54:14.532495
2782 13:54:14.535564 CH=1, VrefRange= 0, VrefLevel = 30
2783 13:54:14.539175 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
2784 13:54:14.542375 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
2785 13:54:14.549154 TX Bit2 (973~997) 25 985, Bit10 (968~992) 25 980,
2786 13:54:14.552386 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2787 13:54:14.555535 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2788 13:54:14.562291 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2789 13:54:14.565725 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2790 13:54:14.569187 TX Bit7 (975~998) 24 986, Bit15 (966~991) 26 978,
2791 13:54:14.572412
2792 13:54:14.573456 Write Rank0 MR14 =0x20
2793 13:54:14.581749
2794 13:54:14.585139 CH=1, VrefRange= 0, VrefLevel = 32
2795 13:54:14.588471 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
2796 13:54:14.591665 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
2797 13:54:14.598327 TX Bit2 (973~997) 25 985, Bit10 (968~992) 25 980,
2798 13:54:14.601920 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2799 13:54:14.605528 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2800 13:54:14.611881 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2801 13:54:14.615128 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2802 13:54:14.618184 TX Bit7 (975~998) 24 986, Bit15 (966~991) 26 978,
2803 13:54:14.621895
2804 13:54:14.622425
2805 13:54:14.624957 TX Vref found, early break! 370< 374
2806 13:54:14.628559 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2807 13:54:14.632095 u1DelayCellOfst[0]=6 cells (5 PI)
2808 13:54:14.634879 u1DelayCellOfst[1]=5 cells (4 PI)
2809 13:54:14.638445 u1DelayCellOfst[2]=2 cells (2 PI)
2810 13:54:14.641587 u1DelayCellOfst[3]=0 cells (0 PI)
2811 13:54:14.642022 u1DelayCellOfst[4]=3 cells (3 PI)
2812 13:54:14.645314 u1DelayCellOfst[5]=5 cells (4 PI)
2813 13:54:14.648437 u1DelayCellOfst[6]=6 cells (5 PI)
2814 13:54:14.651918 u1DelayCellOfst[7]=3 cells (3 PI)
2815 13:54:14.654863 Byte0, DQ PI dly=983, DQM PI dly= 985
2816 13:54:14.662081 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2817 13:54:14.662594
2818 13:54:14.664997 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2819 13:54:14.665563
2820 13:54:14.668464 u1DelayCellOfst[8]=1 cells (1 PI)
2821 13:54:14.671898 u1DelayCellOfst[9]=1 cells (1 PI)
2822 13:54:14.675394 u1DelayCellOfst[10]=2 cells (2 PI)
2823 13:54:14.678237 u1DelayCellOfst[11]=2 cells (2 PI)
2824 13:54:14.681474 u1DelayCellOfst[12]=3 cells (3 PI)
2825 13:54:14.681988 u1DelayCellOfst[13]=3 cells (3 PI)
2826 13:54:14.685321 u1DelayCellOfst[14]=2 cells (2 PI)
2827 13:54:14.688377 u1DelayCellOfst[15]=0 cells (0 PI)
2828 13:54:14.691567 Byte1, DQ PI dly=978, DQM PI dly= 979
2829 13:54:14.698507 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2830 13:54:14.699027
2831 13:54:14.701905 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2832 13:54:14.702416
2833 13:54:14.704861 Write Rank0 MR14 =0x1a
2834 13:54:14.705307
2835 13:54:14.705651 Final TX Range 0 Vref 26
2836 13:54:14.706044
2837 13:54:14.711473 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2838 13:54:14.711961
2839 13:54:14.718325 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2840 13:54:14.725219 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2841 13:54:14.735212 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2842 13:54:14.735712 Write Rank0 MR3 =0xb0
2843 13:54:14.738858 DramC Write-DBI on
2844 13:54:14.739355 ==
2845 13:54:14.741820 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2846 13:54:14.745540 fsp= 1, odt_onoff= 1, Byte mode= 0
2847 13:54:14.746039 ==
2848 13:54:14.748737 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2849 13:54:14.749282
2850 13:54:14.752062 Begin, DQ Scan Range 699~763
2851 13:54:14.752562
2852 13:54:14.752892
2853 13:54:14.755017 TX Vref Scan disable
2854 13:54:14.758714 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2855 13:54:14.762213 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2856 13:54:14.765164 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2857 13:54:14.768616 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2858 13:54:14.772177 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2859 13:54:14.775596 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2860 13:54:14.778972 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2861 13:54:14.781921 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2862 13:54:14.785595 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2863 13:54:14.788875 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2864 13:54:14.792179 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2865 13:54:14.799041 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2866 13:54:14.802226 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2867 13:54:14.805076 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2868 13:54:14.808516 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2869 13:54:14.812426 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2870 13:54:14.815677 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2871 13:54:14.818944 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2872 13:54:14.821896 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2873 13:54:14.829509 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2874 13:54:14.833049 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2875 13:54:14.836221 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2876 13:54:14.839742 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2877 13:54:14.842804 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2878 13:54:14.846115 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2879 13:54:14.849646 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2880 13:54:14.852971 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2881 13:54:14.856226 Byte0, DQ PI dly=730, DQM PI dly= 730
2882 13:54:14.859773 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2883 13:54:14.860274
2884 13:54:14.866280 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2885 13:54:14.866784
2886 13:54:14.869839 Byte1, DQ PI dly=723, DQM PI dly= 723
2887 13:54:14.872933 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2888 13:54:14.873474
2889 13:54:14.876448 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2890 13:54:14.876945
2891 13:54:14.882868 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2892 13:54:14.889825 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2893 13:54:14.896268 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2894 13:54:14.899633 Write Rank0 MR3 =0x30
2895 13:54:14.903687 DramC Write-DBI off
2896 13:54:14.904186
2897 13:54:14.904511 [DATLAT]
2898 13:54:14.906386 Freq=1600, CH1 RK0, use_rxtx_scan=0
2899 13:54:14.906812
2900 13:54:14.907137 DATLAT Default: 0xf
2901 13:54:14.909868 7, 0xFFFF, sum=0
2902 13:54:14.910296 8, 0xFFFF, sum=0
2903 13:54:14.913529 9, 0xFFFF, sum=0
2904 13:54:14.914041 10, 0xFFFF, sum=0
2905 13:54:14.916677 11, 0xFFFF, sum=0
2906 13:54:14.917180 12, 0xFFFF, sum=0
2907 13:54:14.920145 13, 0xFFFF, sum=0
2908 13:54:14.920670 14, 0x0, sum=1
2909 13:54:14.922965 15, 0x0, sum=2
2910 13:54:14.923389 16, 0x0, sum=3
2911 13:54:14.923721 17, 0x0, sum=4
2912 13:54:14.929719 pattern=2 first_step=14 total pass=5 best_step=16
2913 13:54:14.930145 ==
2914 13:54:14.933292 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2915 13:54:14.936808 fsp= 1, odt_onoff= 1, Byte mode= 0
2916 13:54:14.937279 ==
2917 13:54:14.943130 Start DQ dly to find pass range UseTestEngine =1
2918 13:54:14.946543 x-axis: bit #, y-axis: DQ dly (-127~63)
2919 13:54:14.947044 RX Vref Scan = 1
2920 13:54:15.061986
2921 13:54:15.062518 RX Vref found, early break!
2922 13:54:15.062862
2923 13:54:15.068677 Final RX Vref 12, apply to both rank0 and 1
2924 13:54:15.069167 ==
2925 13:54:15.072116 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2926 13:54:15.075545 fsp= 1, odt_onoff= 1, Byte mode= 0
2927 13:54:15.075992 ==
2928 13:54:15.076389 DQS Delay:
2929 13:54:15.078704 DQS0 = 0, DQS1 = 0
2930 13:54:15.079198 DQM Delay:
2931 13:54:15.081840 DQM0 = 20, DQM1 = 18
2932 13:54:15.082270 DQ Delay:
2933 13:54:15.085588 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
2934 13:54:15.088907 DQ4 =19, DQ5 =24, DQ6 =24, DQ7 =19
2935 13:54:15.092151 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
2936 13:54:15.095195 DQ12 =21, DQ13 =19, DQ14 =20, DQ15 =15
2937 13:54:15.095622
2938 13:54:15.095949
2939 13:54:15.096246
2940 13:54:15.098736 [DramC_TX_OE_Calibration] TA2
2941 13:54:15.102191 Original DQ_B0 (3 6) =30, OEN = 27
2942 13:54:15.105394 Original DQ_B1 (3 6) =30, OEN = 27
2943 13:54:15.109155 23, 0x0, End_B0=23 End_B1=23
2944 13:54:15.109707 24, 0x0, End_B0=24 End_B1=24
2945 13:54:15.111982 25, 0x0, End_B0=25 End_B1=25
2946 13:54:15.115701 26, 0x0, End_B0=26 End_B1=26
2947 13:54:15.118826 27, 0x0, End_B0=27 End_B1=27
2948 13:54:15.119265 28, 0x0, End_B0=28 End_B1=28
2949 13:54:15.122384 29, 0x0, End_B0=29 End_B1=29
2950 13:54:15.125879 30, 0x0, End_B0=30 End_B1=30
2951 13:54:15.129037 31, 0xFFFF, End_B0=30 End_B1=30
2952 13:54:15.132504 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2953 13:54:15.138879 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2954 13:54:15.139397
2955 13:54:15.139728
2956 13:54:15.142470 Write Rank0 MR23 =0x3f
2957 13:54:15.142968 [DQSOSC]
2958 13:54:15.149077 [DQSOSCAuto] RK0, (LSB)MR18= 0xa1, (MSB)MR19= 0x3, tDQSOscB0 = 339 ps tDQSOscB1 = 0 ps
2959 13:54:15.155791 CH1_RK0: MR19=0x3, MR18=0xA1, DQSOSC=339, MR23=63, INC=21, DEC=32
2960 13:54:15.159028 Write Rank0 MR23 =0x3f
2961 13:54:15.159527 [DQSOSC]
2962 13:54:15.165435 [DQSOSCAuto] RK0, (LSB)MR18= 0xa1, (MSB)MR19= 0x3, tDQSOscB0 = 339 ps tDQSOscB1 = 0 ps
2963 13:54:15.168882 CH1 RK0: MR19=3, MR18=A1
2964 13:54:15.172247 [RankSwap] Rank num 2, (Multi 1), Rank 1
2965 13:54:15.175737 Write Rank0 MR2 =0xad
2966 13:54:15.176244 [Write Leveling]
2967 13:54:15.178925 delay byte0 byte1 byte2 byte3
2968 13:54:15.179352
2969 13:54:15.179679 10 0 0
2970 13:54:15.182073 11 0 0
2971 13:54:15.182509 12 0 0
2972 13:54:15.185567 13 0 0
2973 13:54:15.186001 14 0 0
2974 13:54:15.189162 15 0 0
2975 13:54:15.189715 16 0 0
2976 13:54:15.190054 17 0 0
2977 13:54:15.192194 18 0 0
2978 13:54:15.192627 19 0 0
2979 13:54:15.195441 20 0 0
2980 13:54:15.195873 21 0 0
2981 13:54:15.196207 22 0 0
2982 13:54:15.199161 23 0 0
2983 13:54:15.199679 24 0 0
2984 13:54:15.202184 25 0 0
2985 13:54:15.202680 26 0 0
2986 13:54:15.203017 27 0 0
2987 13:54:15.205423 28 0 0
2988 13:54:15.205857 29 0 0
2989 13:54:15.209211 30 0 0
2990 13:54:15.209780 31 0 ff
2991 13:54:15.212323 32 0 ff
2992 13:54:15.212768 33 0 ff
2993 13:54:15.213107 34 0 ff
2994 13:54:15.215736 35 0 ff
2995 13:54:15.216241 36 0 ff
2996 13:54:15.218728 37 0 ff
2997 13:54:15.219164 38 ff ff
2998 13:54:15.222192 39 ff ff
2999 13:54:15.222814 40 ff ff
3000 13:54:15.225564 41 ff ff
3001 13:54:15.225996 42 ff ff
3002 13:54:15.228890 43 ff ff
3003 13:54:15.229453 44 ff ff
3004 13:54:15.232216 pass bytecount = 0xff (0xff: all bytes pass)
3005 13:54:15.232647
3006 13:54:15.235767 DQS0 dly: 38
3007 13:54:15.236262 DQS1 dly: 31
3008 13:54:15.238774 Write Rank0 MR2 =0x2d
3009 13:54:15.242143 [RankSwap] Rank num 2, (Multi 1), Rank 0
3010 13:54:15.242643 Write Rank1 MR1 =0xd6
3011 13:54:15.245332 [Gating]
3012 13:54:15.245761 ==
3013 13:54:15.249093 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3014 13:54:15.251957 fsp= 1, odt_onoff= 1, Byte mode= 0
3015 13:54:15.252387 ==
3016 13:54:15.255582 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3017 13:54:15.262163 3 1 4 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3018 13:54:15.265866 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
3019 13:54:15.268747 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
3020 13:54:15.275742 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
3021 13:54:15.279101 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
3022 13:54:15.282289 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3023 13:54:15.289095 3 1 28 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3024 13:54:15.292128 3 2 0 |201 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3025 13:54:15.295543 3 2 4 |3d3d 1212 |(11 11)(11 11) |(1 1)(0 0)| 0
3026 13:54:15.302501 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3027 13:54:15.305618 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3028 13:54:15.309125 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3029 13:54:15.312100 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3030 13:54:15.318728 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3031 13:54:15.322232 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3032 13:54:15.325838 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3033 13:54:15.332452 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3034 13:54:15.335720 3 3 8 |201 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3035 13:54:15.338839 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3036 13:54:15.342351 [Byte 0] Lead/lag Transition tap number (1)
3037 13:54:15.349271 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3038 13:54:15.352539 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3039 13:54:15.355792 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3040 13:54:15.362515 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3041 13:54:15.365844 3 4 0 |707 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3042 13:54:15.369431 3 4 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3043 13:54:15.372437 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3044 13:54:15.379110 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3045 13:54:15.382471 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3046 13:54:15.385799 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3047 13:54:15.392343 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3048 13:54:15.395789 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3049 13:54:15.399040 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3050 13:54:15.406055 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3051 13:54:15.408928 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3052 13:54:15.412566 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3053 13:54:15.419025 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3054 13:54:15.422490 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3055 13:54:15.425935 [Byte 0] Lead/lag falling Transition (3, 5, 20)
3056 13:54:15.429199 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3057 13:54:15.436014 [Byte 0] Lead/lag Transition tap number (2)
3058 13:54:15.439080 [Byte 1] Lead/lag falling Transition (3, 5, 24)
3059 13:54:15.442469 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3060 13:54:15.445827 3 6 0 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3061 13:54:15.452854 [Byte 1] Lead/lag Transition tap number (3)
3062 13:54:15.455865 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3063 13:54:15.459371 [Byte 0]First pass (3, 6, 4)
3064 13:54:15.462365 3 6 8 |4646 1414 |(0 0)(11 11) |(0 0)(0 0)| 0
3065 13:54:15.465915 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3066 13:54:15.469318 [Byte 1]First pass (3, 6, 12)
3067 13:54:15.472552 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3068 13:54:15.475808 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3069 13:54:15.482644 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3070 13:54:15.485976 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3071 13:54:15.489097 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3072 13:54:15.492295 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3073 13:54:15.495577 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3074 13:54:15.502721 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3075 13:54:15.505944 All bytes gating window > 1UI, Early break!
3076 13:54:15.506447
3077 13:54:15.509109 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)
3078 13:54:15.509651
3079 13:54:15.512677 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
3080 13:54:15.513174
3081 13:54:15.513550
3082 13:54:15.513854
3083 13:54:15.516080 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
3084 13:54:15.516583
3085 13:54:15.519018 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
3086 13:54:15.522544
3087 13:54:15.523085
3088 13:54:15.523423 Write Rank1 MR1 =0x56
3089 13:54:15.523786
3090 13:54:15.525816 best RODT dly(2T, 0.5T) = (2, 2)
3091 13:54:15.526242
3092 13:54:15.529350 best RODT dly(2T, 0.5T) = (2, 2)
3093 13:54:15.529848 ==
3094 13:54:15.535853 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3095 13:54:15.539094 fsp= 1, odt_onoff= 1, Byte mode= 0
3096 13:54:15.539589 ==
3097 13:54:15.542336 Start DQ dly to find pass range UseTestEngine =0
3098 13:54:15.546069 x-axis: bit #, y-axis: DQ dly (-127~63)
3099 13:54:15.546680 RX Vref Scan = 0
3100 13:54:15.549027 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3101 13:54:15.552624 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3102 13:54:15.556153 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3103 13:54:15.559354 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3104 13:54:15.562501 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3105 13:54:15.565858 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3106 13:54:15.569216 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3107 13:54:15.569765 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3108 13:54:15.572557 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3109 13:54:15.576131 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3110 13:54:15.579351 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3111 13:54:15.582492 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3112 13:54:15.586016 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3113 13:54:15.589337 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3114 13:54:15.592405 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3115 13:54:15.595625 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3116 13:54:15.596198 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3117 13:54:15.599162 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3118 13:54:15.602657 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3119 13:54:15.605958 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3120 13:54:15.608929 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3121 13:54:15.612296 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3122 13:54:15.612874 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3123 13:54:15.615925 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3124 13:54:15.619144 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3125 13:54:15.622336 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3126 13:54:15.625674 0, [0] xxooxxxx xxxxxxxo [MSB]
3127 13:54:15.629088 1, [0] xxooxxxo xxoxxxxo [MSB]
3128 13:54:15.632340 2, [0] xxoooxxo oooxxxxo [MSB]
3129 13:54:15.632779 3, [0] xxoooxxo oooxxxxo [MSB]
3130 13:54:15.635759 4, [0] xxoooxxo ooooxxoo [MSB]
3131 13:54:15.638994 5, [0] xxoooxxo ooooxooo [MSB]
3132 13:54:15.642310 6, [0] xoooooxo oooooooo [MSB]
3133 13:54:15.645773 33, [0] oooxoooo oooooooo [MSB]
3134 13:54:15.649295 34, [0] oooxoooo ooooooox [MSB]
3135 13:54:15.649734 35, [0] ooxxoooo ooooooox [MSB]
3136 13:54:15.652583 36, [0] ooxxoooo oxooooox [MSB]
3137 13:54:15.656004 37, [0] ooxxoooo xxxxooox [MSB]
3138 13:54:15.659239 38, [0] ooxxoooo xxxxooox [MSB]
3139 13:54:15.662395 39, [0] ooxxxoox xxxxooxx [MSB]
3140 13:54:15.665789 40, [0] ooxxxoox xxxxoxxx [MSB]
3141 13:54:15.669364 41, [0] ooxxxoox xxxxxxxx [MSB]
3142 13:54:15.669767 42, [0] ooxxxxox xxxxxxxx [MSB]
3143 13:54:15.672925 43, [0] oxxxxxxx xxxxxxxx [MSB]
3144 13:54:15.675876 44, [0] xxxxxxxx xxxxxxxx [MSB]
3145 13:54:15.679126 iDelay=44, Bit 0, Center 25 (7 ~ 43) 37
3146 13:54:15.682770 iDelay=44, Bit 1, Center 24 (6 ~ 42) 37
3147 13:54:15.685876 iDelay=44, Bit 2, Center 17 (0 ~ 34) 35
3148 13:54:15.689314 iDelay=44, Bit 3, Center 15 (-2 ~ 32) 35
3149 13:54:15.692770 iDelay=44, Bit 4, Center 20 (2 ~ 38) 37
3150 13:54:15.695986 iDelay=44, Bit 5, Center 23 (6 ~ 41) 36
3151 13:54:15.702625 iDelay=44, Bit 6, Center 24 (7 ~ 42) 36
3152 13:54:15.705837 iDelay=44, Bit 7, Center 19 (1 ~ 38) 38
3153 13:54:15.709084 iDelay=44, Bit 8, Center 19 (2 ~ 36) 35
3154 13:54:15.712904 iDelay=44, Bit 9, Center 18 (2 ~ 35) 34
3155 13:54:15.715895 iDelay=44, Bit 10, Center 18 (1 ~ 36) 36
3156 13:54:15.719079 iDelay=44, Bit 11, Center 20 (4 ~ 36) 33
3157 13:54:15.722301 iDelay=44, Bit 12, Center 23 (6 ~ 40) 35
3158 13:54:15.725784 iDelay=44, Bit 13, Center 22 (5 ~ 39) 35
3159 13:54:15.729268 iDelay=44, Bit 14, Center 21 (4 ~ 38) 35
3160 13:54:15.732527 iDelay=44, Bit 15, Center 15 (-2 ~ 33) 36
3161 13:54:15.733023 ==
3162 13:54:15.739200 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3163 13:54:15.742543 fsp= 1, odt_onoff= 1, Byte mode= 0
3164 13:54:15.742970 ==
3165 13:54:15.743300 DQS Delay:
3166 13:54:15.745817 DQS0 = 0, DQS1 = 0
3167 13:54:15.746245 DQM Delay:
3168 13:54:15.749465 DQM0 = 20, DQM1 = 19
3169 13:54:15.749890 DQ Delay:
3170 13:54:15.752494 DQ0 =25, DQ1 =24, DQ2 =17, DQ3 =15
3171 13:54:15.755799 DQ4 =20, DQ5 =23, DQ6 =24, DQ7 =19
3172 13:54:15.759075 DQ8 =19, DQ9 =18, DQ10 =18, DQ11 =20
3173 13:54:15.762498 DQ12 =23, DQ13 =22, DQ14 =21, DQ15 =15
3174 13:54:15.762922
3175 13:54:15.763244
3176 13:54:15.763542 DramC Write-DBI off
3177 13:54:15.765729 ==
3178 13:54:15.769326 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3179 13:54:15.772741 fsp= 1, odt_onoff= 1, Byte mode= 0
3180 13:54:15.773313 ==
3181 13:54:15.775886 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3182 13:54:15.776309
3183 13:54:15.779261 Begin, DQ Scan Range 927~1183
3184 13:54:15.779684
3185 13:54:15.780012
3186 13:54:15.782639 TX Vref Scan disable
3187 13:54:15.785927 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3188 13:54:15.789140 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3189 13:54:15.792631 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3190 13:54:15.795816 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3191 13:54:15.799556 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3192 13:54:15.802773 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3193 13:54:15.806021 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3194 13:54:15.809298 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3195 13:54:15.812925 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3196 13:54:15.816094 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3197 13:54:15.819559 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3198 13:54:15.822641 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3199 13:54:15.829387 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3200 13:54:15.832516 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3201 13:54:15.836279 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3202 13:54:15.839254 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3203 13:54:15.842654 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3204 13:54:15.846224 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3205 13:54:15.849604 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3206 13:54:15.852874 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3207 13:54:15.856161 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3208 13:54:15.859250 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3209 13:54:15.862748 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3210 13:54:15.866159 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3211 13:54:15.869733 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3212 13:54:15.872759 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3213 13:54:15.876211 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3214 13:54:15.879403 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3215 13:54:15.886125 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3216 13:54:15.889443 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3217 13:54:15.892676 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3218 13:54:15.895946 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3219 13:54:15.899390 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3220 13:54:15.902798 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3221 13:54:15.905930 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3222 13:54:15.909382 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3223 13:54:15.912706 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3224 13:54:15.916424 964 |3 6 4|[0] xxxxxxxx xxxxxxxo [MSB]
3225 13:54:15.919233 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]
3226 13:54:15.922973 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
3227 13:54:15.926029 967 |3 6 7|[0] xxxxxxxx ooxxxxxo [MSB]
3228 13:54:15.929307 968 |3 6 8|[0] xxxxxxxx oooxxxxo [MSB]
3229 13:54:15.932884 969 |3 6 9|[0] xxxxxxxx ooooxooo [MSB]
3230 13:54:15.936155 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
3231 13:54:15.939678 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3232 13:54:15.942763 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3233 13:54:15.946450 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3234 13:54:15.949683 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3235 13:54:15.953264 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3236 13:54:15.956358 976 |3 6 16|[0] xooooxxx oooooooo [MSB]
3237 13:54:15.963094 977 |3 6 17|[0] oooooxoo oooooooo [MSB]
3238 13:54:15.966365 989 |3 6 29|[0] oooooooo ooooooox [MSB]
3239 13:54:15.969738 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3240 13:54:15.973028 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3241 13:54:15.976107 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3242 13:54:15.979577 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3243 13:54:15.983191 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3244 13:54:15.986425 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3245 13:54:15.993187 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3246 13:54:15.996387 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3247 13:54:15.999658 998 |3 6 38|[0] ooxxoooo xxxxxxxx [MSB]
3248 13:54:16.003031 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3249 13:54:16.006350 Byte0, DQ PI dly=987, DQM PI dly= 987
3250 13:54:16.009749 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
3251 13:54:16.010181
3252 13:54:16.013084 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
3253 13:54:16.013646
3254 13:54:16.016345 Byte1, DQ PI dly=977, DQM PI dly= 977
3255 13:54:16.022759 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3256 13:54:16.023188
3257 13:54:16.026200 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3258 13:54:16.026780
3259 13:54:16.027203 ==
3260 13:54:16.032983 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3261 13:54:16.036417 fsp= 1, odt_onoff= 1, Byte mode= 0
3262 13:54:16.036915 ==
3263 13:54:16.039619 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3264 13:54:16.040048
3265 13:54:16.042768 Begin, DQ Scan Range 953~1017
3266 13:54:16.043200 Write Rank1 MR14 =0x0
3267 13:54:16.053758
3268 13:54:16.054256 CH=1, VrefRange= 0, VrefLevel = 0
3269 13:54:16.060554 TX Bit0 (979~999) 21 989, Bit8 (969~986) 18 977,
3270 13:54:16.063612 TX Bit1 (978~998) 21 988, Bit9 (969~985) 17 977,
3271 13:54:16.070182 TX Bit2 (976~993) 18 984, Bit10 (970~985) 16 977,
3272 13:54:16.073472 TX Bit3 (976~991) 16 983, Bit11 (971~988) 18 979,
3273 13:54:16.076353 TX Bit4 (977~995) 19 986, Bit12 (971~990) 20 980,
3274 13:54:16.083707 TX Bit5 (980~999) 20 989, Bit13 (970~986) 17 978,
3275 13:54:16.086892 TX Bit6 (980~999) 20 989, Bit14 (971~987) 17 979,
3276 13:54:16.090303 TX Bit7 (978~995) 18 986, Bit15 (967~985) 19 976,
3277 13:54:16.090479
3278 13:54:16.093279 Write Rank1 MR14 =0x2
3279 13:54:16.102531
3280 13:54:16.102738 CH=1, VrefRange= 0, VrefLevel = 2
3281 13:54:16.109194 TX Bit0 (979~999) 21 989, Bit8 (969~987) 19 978,
3282 13:54:16.112436 TX Bit1 (977~998) 22 987, Bit9 (969~986) 18 977,
3283 13:54:16.119469 TX Bit2 (976~993) 18 984, Bit10 (970~986) 17 978,
3284 13:54:16.122770 TX Bit3 (975~992) 18 983, Bit11 (971~989) 19 980,
3285 13:54:16.126137 TX Bit4 (977~996) 20 986, Bit12 (971~990) 20 980,
3286 13:54:16.132832 TX Bit5 (979~998) 20 988, Bit13 (970~987) 18 978,
3287 13:54:16.136331 TX Bit6 (980~999) 20 989, Bit14 (970~987) 18 978,
3288 13:54:16.139347 TX Bit7 (978~996) 19 987, Bit15 (966~985) 20 975,
3289 13:54:16.139780
3290 13:54:16.142952 Write Rank1 MR14 =0x4
3291 13:54:16.152227
3292 13:54:16.152729 CH=1, VrefRange= 0, VrefLevel = 4
3293 13:54:16.158706 TX Bit0 (979~999) 21 989, Bit8 (969~987) 19 978,
3294 13:54:16.162116 TX Bit1 (978~998) 21 988, Bit9 (969~987) 19 978,
3295 13:54:16.168924 TX Bit2 (976~994) 19 985, Bit10 (970~986) 17 978,
3296 13:54:16.171876 TX Bit3 (975~992) 18 983, Bit11 (970~990) 21 980,
3297 13:54:16.175346 TX Bit4 (977~996) 20 986, Bit12 (971~991) 21 981,
3298 13:54:16.182148 TX Bit5 (979~999) 21 989, Bit13 (970~988) 19 979,
3299 13:54:16.185397 TX Bit6 (979~999) 21 989, Bit14 (970~988) 19 979,
3300 13:54:16.188907 TX Bit7 (978~997) 20 987, Bit15 (966~986) 21 976,
3301 13:54:16.189444
3302 13:54:16.191989 Write Rank1 MR14 =0x6
3303 13:54:16.201613
3304 13:54:16.202111 CH=1, VrefRange= 0, VrefLevel = 6
3305 13:54:16.207939 TX Bit0 (979~999) 21 989, Bit8 (968~988) 21 978,
3306 13:54:16.211534 TX Bit1 (977~998) 22 987, Bit9 (969~987) 19 978,
3307 13:54:16.217951 TX Bit2 (975~994) 20 984, Bit10 (969~987) 19 978,
3308 13:54:16.221264 TX Bit3 (975~993) 19 984, Bit11 (970~990) 21 980,
3309 13:54:16.224484 TX Bit4 (976~997) 22 986, Bit12 (971~991) 21 981,
3310 13:54:16.231265 TX Bit5 (979~999) 21 989, Bit13 (970~988) 19 979,
3311 13:54:16.234420 TX Bit6 (978~999) 22 988, Bit14 (970~989) 20 979,
3312 13:54:16.238074 TX Bit7 (977~997) 21 987, Bit15 (966~986) 21 976,
3313 13:54:16.238588
3314 13:54:16.241151 Write Rank1 MR14 =0x8
3315 13:54:16.250883
3316 13:54:16.251381 CH=1, VrefRange= 0, VrefLevel = 8
3317 13:54:16.257215 TX Bit0 (979~1000) 22 989, Bit8 (968~988) 21 978,
3318 13:54:16.260463 TX Bit1 (977~998) 22 987, Bit9 (968~988) 21 978,
3319 13:54:16.267371 TX Bit2 (975~995) 21 985, Bit10 (969~987) 19 978,
3320 13:54:16.270356 TX Bit3 (975~994) 20 984, Bit11 (970~990) 21 980,
3321 13:54:16.273821 TX Bit4 (976~997) 22 986, Bit12 (971~991) 21 981,
3322 13:54:16.281057 TX Bit5 (978~999) 22 988, Bit13 (970~989) 20 979,
3323 13:54:16.284272 TX Bit6 (978~1000) 23 989, Bit14 (970~990) 21 980,
3324 13:54:16.287497 TX Bit7 (977~997) 21 987, Bit15 (965~986) 22 975,
3325 13:54:16.290764
3326 13:54:16.291262 Write Rank1 MR14 =0xa
3327 13:54:16.300524
3328 13:54:16.303744 CH=1, VrefRange= 0, VrefLevel = 10
3329 13:54:16.306870 TX Bit0 (978~1000) 23 989, Bit8 (968~990) 23 979,
3330 13:54:16.310313 TX Bit1 (977~999) 23 988, Bit9 (968~988) 21 978,
3331 13:54:16.317315 TX Bit2 (976~996) 21 986, Bit10 (969~988) 20 978,
3332 13:54:16.320439 TX Bit3 (974~995) 22 984, Bit11 (970~991) 22 980,
3333 13:54:16.323863 TX Bit4 (976~997) 22 986, Bit12 (970~991) 22 980,
3334 13:54:16.330279 TX Bit5 (978~1000) 23 989, Bit13 (970~990) 21 980,
3335 13:54:16.333440 TX Bit6 (978~1000) 23 989, Bit14 (970~990) 21 980,
3336 13:54:16.336739 TX Bit7 (977~997) 21 987, Bit15 (965~987) 23 976,
3337 13:54:16.340053
3338 13:54:16.340320 Write Rank1 MR14 =0xc
3339 13:54:16.350198
3340 13:54:16.353279 CH=1, VrefRange= 0, VrefLevel = 12
3341 13:54:16.356773 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
3342 13:54:16.359870 TX Bit1 (977~999) 23 988, Bit9 (968~989) 22 978,
3343 13:54:16.366630 TX Bit2 (975~996) 22 985, Bit10 (968~989) 22 978,
3344 13:54:16.370199 TX Bit3 (974~995) 22 984, Bit11 (969~991) 23 980,
3345 13:54:16.373507 TX Bit4 (976~997) 22 986, Bit12 (970~991) 22 980,
3346 13:54:16.380412 TX Bit5 (978~1000) 23 989, Bit13 (970~990) 21 980,
3347 13:54:16.384032 TX Bit6 (977~1000) 24 988, Bit14 (969~990) 22 979,
3348 13:54:16.386932 TX Bit7 (977~998) 22 987, Bit15 (964~987) 24 975,
3349 13:54:16.387453
3350 13:54:16.390156 Write Rank1 MR14 =0xe
3351 13:54:16.400199
3352 13:54:16.403409 CH=1, VrefRange= 0, VrefLevel = 14
3353 13:54:16.406914 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978,
3354 13:54:16.409981 TX Bit1 (976~999) 24 987, Bit9 (968~990) 23 979,
3355 13:54:16.417081 TX Bit2 (974~997) 24 985, Bit10 (968~990) 23 979,
3356 13:54:16.420012 TX Bit3 (974~996) 23 985, Bit11 (969~991) 23 980,
3357 13:54:16.423640 TX Bit4 (976~998) 23 987, Bit12 (970~992) 23 981,
3358 13:54:16.430295 TX Bit5 (977~1000) 24 988, Bit13 (969~990) 22 979,
3359 13:54:16.433608 TX Bit6 (977~1001) 25 989, Bit14 (969~991) 23 980,
3360 13:54:16.437137 TX Bit7 (977~998) 22 987, Bit15 (964~987) 24 975,
3361 13:54:16.440153
3362 13:54:16.440646 Write Rank1 MR14 =0x10
3363 13:54:16.450331
3364 13:54:16.453446 CH=1, VrefRange= 0, VrefLevel = 16
3365 13:54:16.457044 TX Bit0 (977~1001) 25 989, Bit8 (967~991) 25 979,
3366 13:54:16.460126 TX Bit1 (977~999) 23 988, Bit9 (967~990) 24 978,
3367 13:54:16.466739 TX Bit2 (974~997) 24 985, Bit10 (968~990) 23 979,
3368 13:54:16.470144 TX Bit3 (974~996) 23 985, Bit11 (969~991) 23 980,
3369 13:54:16.473348 TX Bit4 (975~998) 24 986, Bit12 (970~992) 23 981,
3370 13:54:16.480079 TX Bit5 (977~1001) 25 989, Bit13 (969~991) 23 980,
3371 13:54:16.483414 TX Bit6 (977~1001) 25 989, Bit14 (969~991) 23 980,
3372 13:54:16.486666 TX Bit7 (977~998) 22 987, Bit15 (964~988) 25 976,
3373 13:54:16.487091
3374 13:54:16.490195 Write Rank1 MR14 =0x12
3375 13:54:16.500268
3376 13:54:16.503259 CH=1, VrefRange= 0, VrefLevel = 18
3377 13:54:16.507015 TX Bit0 (977~1002) 26 989, Bit8 (967~991) 25 979,
3378 13:54:16.510465 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
3379 13:54:16.516908 TX Bit2 (974~997) 24 985, Bit10 (968~990) 23 979,
3380 13:54:16.520254 TX Bit3 (973~997) 25 985, Bit11 (969~992) 24 980,
3381 13:54:16.523530 TX Bit4 (975~998) 24 986, Bit12 (970~992) 23 981,
3382 13:54:16.530846 TX Bit5 (977~1001) 25 989, Bit13 (969~991) 23 980,
3383 13:54:16.533536 TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979,
3384 13:54:16.540467 TX Bit7 (976~998) 23 987, Bit15 (964~989) 26 976,
3385 13:54:16.540964
3386 13:54:16.541385 Write Rank1 MR14 =0x14
3387 13:54:16.550417
3388 13:54:16.553748 CH=1, VrefRange= 0, VrefLevel = 20
3389 13:54:16.557271 TX Bit0 (977~1002) 26 989, Bit8 (965~991) 27 978,
3390 13:54:16.560551 TX Bit1 (976~1000) 25 988, Bit9 (967~991) 25 979,
3391 13:54:16.566870 TX Bit2 (974~997) 24 985, Bit10 (968~991) 24 979,
3392 13:54:16.570534 TX Bit3 (973~997) 25 985, Bit11 (969~992) 24 980,
3393 13:54:16.574008 TX Bit4 (975~998) 24 986, Bit12 (969~992) 24 980,
3394 13:54:16.580206 TX Bit5 (977~1001) 25 989, Bit13 (969~991) 23 980,
3395 13:54:16.583524 TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979,
3396 13:54:16.590628 TX Bit7 (976~998) 23 987, Bit15 (963~990) 28 976,
3397 13:54:16.591138
3398 13:54:16.591473 Write Rank1 MR14 =0x16
3399 13:54:16.600765
3400 13:54:16.604102 CH=1, VrefRange= 0, VrefLevel = 22
3401 13:54:16.607424 TX Bit0 (977~1002) 26 989, Bit8 (966~991) 26 978,
3402 13:54:16.610656 TX Bit1 (976~1000) 25 988, Bit9 (966~991) 26 978,
3403 13:54:16.617299 TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979,
3404 13:54:16.620675 TX Bit3 (973~997) 25 985, Bit11 (968~992) 25 980,
3405 13:54:16.624282 TX Bit4 (975~999) 25 987, Bit12 (969~992) 24 980,
3406 13:54:16.630673 TX Bit5 (977~1001) 25 989, Bit13 (968~991) 24 979,
3407 13:54:16.634035 TX Bit6 (977~1002) 26 989, Bit14 (968~991) 24 979,
3408 13:54:16.640858 TX Bit7 (976~999) 24 987, Bit15 (963~990) 28 976,
3409 13:54:16.641410
3410 13:54:16.641869 Write Rank1 MR14 =0x18
3411 13:54:16.651281
3412 13:54:16.654566 CH=1, VrefRange= 0, VrefLevel = 24
3413 13:54:16.657860 TX Bit0 (977~1003) 27 990, Bit8 (965~991) 27 978,
3414 13:54:16.661356 TX Bit1 (976~1001) 26 988, Bit9 (966~991) 26 978,
3415 13:54:16.667875 TX Bit2 (973~998) 26 985, Bit10 (967~991) 25 979,
3416 13:54:16.671272 TX Bit3 (972~997) 26 984, Bit11 (968~992) 25 980,
3417 13:54:16.674470 TX Bit4 (975~999) 25 987, Bit12 (969~992) 24 980,
3418 13:54:16.681773 TX Bit5 (976~1002) 27 989, Bit13 (968~992) 25 980,
3419 13:54:16.684797 TX Bit6 (977~1002) 26 989, Bit14 (967~992) 26 979,
3420 13:54:16.688027 TX Bit7 (976~999) 24 987, Bit15 (963~990) 28 976,
3421 13:54:16.691367
3422 13:54:16.691790 Write Rank1 MR14 =0x1a
3423 13:54:16.701864
3424 13:54:16.704672 CH=1, VrefRange= 0, VrefLevel = 26
3425 13:54:16.707937 TX Bit0 (977~1003) 27 990, Bit8 (965~991) 27 978,
3426 13:54:16.711110 TX Bit1 (976~1001) 26 988, Bit9 (966~991) 26 978,
3427 13:54:16.718135 TX Bit2 (973~998) 26 985, Bit10 (967~991) 25 979,
3428 13:54:16.721614 TX Bit3 (972~997) 26 984, Bit11 (968~992) 25 980,
3429 13:54:16.724799 TX Bit4 (975~999) 25 987, Bit12 (969~992) 24 980,
3430 13:54:16.731253 TX Bit5 (976~1002) 27 989, Bit13 (968~992) 25 980,
3431 13:54:16.734654 TX Bit6 (977~1002) 26 989, Bit14 (967~992) 26 979,
3432 13:54:16.741534 TX Bit7 (976~999) 24 987, Bit15 (963~990) 28 976,
3433 13:54:16.742167
3434 13:54:16.742520 Write Rank1 MR14 =0x1c
3435 13:54:16.751722
3436 13:54:16.755179 CH=1, VrefRange= 0, VrefLevel = 28
3437 13:54:16.758511 TX Bit0 (977~1003) 27 990, Bit8 (965~991) 27 978,
3438 13:54:16.761545 TX Bit1 (976~1001) 26 988, Bit9 (966~991) 26 978,
3439 13:54:16.768419 TX Bit2 (973~998) 26 985, Bit10 (967~991) 25 979,
3440 13:54:16.771683 TX Bit3 (972~997) 26 984, Bit11 (968~992) 25 980,
3441 13:54:16.774842 TX Bit4 (975~999) 25 987, Bit12 (969~992) 24 980,
3442 13:54:16.781735 TX Bit5 (976~1002) 27 989, Bit13 (968~992) 25 980,
3443 13:54:16.785047 TX Bit6 (977~1002) 26 989, Bit14 (967~992) 26 979,
3444 13:54:16.788314 TX Bit7 (976~999) 24 987, Bit15 (963~990) 28 976,
3445 13:54:16.791624
3446 13:54:16.792128 Write Rank1 MR14 =0x1e
3447 13:54:16.802021
3448 13:54:16.805216 CH=1, VrefRange= 0, VrefLevel = 30
3449 13:54:16.808562 TX Bit0 (977~1003) 27 990, Bit8 (965~991) 27 978,
3450 13:54:16.812131 TX Bit1 (976~1001) 26 988, Bit9 (966~991) 26 978,
3451 13:54:16.818917 TX Bit2 (973~998) 26 985, Bit10 (967~991) 25 979,
3452 13:54:16.821993 TX Bit3 (972~997) 26 984, Bit11 (968~992) 25 980,
3453 13:54:16.825340 TX Bit4 (975~999) 25 987, Bit12 (969~992) 24 980,
3454 13:54:16.832108 TX Bit5 (976~1002) 27 989, Bit13 (968~992) 25 980,
3455 13:54:16.835567 TX Bit6 (977~1002) 26 989, Bit14 (967~992) 26 979,
3456 13:54:16.839485 TX Bit7 (976~999) 24 987, Bit15 (963~990) 28 976,
3457 13:54:16.839995
3458 13:54:16.842118 Write Rank1 MR14 =0x20
3459 13:54:16.852315
3460 13:54:16.855799 CH=1, VrefRange= 0, VrefLevel = 32
3461 13:54:16.859061 TX Bit0 (977~1003) 27 990, Bit8 (965~991) 27 978,
3462 13:54:16.862313 TX Bit1 (976~1001) 26 988, Bit9 (966~991) 26 978,
3463 13:54:16.869017 TX Bit2 (973~998) 26 985, Bit10 (967~991) 25 979,
3464 13:54:16.872324 TX Bit3 (972~997) 26 984, Bit11 (968~992) 25 980,
3465 13:54:16.875811 TX Bit4 (975~999) 25 987, Bit12 (969~992) 24 980,
3466 13:54:16.882518 TX Bit5 (976~1002) 27 989, Bit13 (968~992) 25 980,
3467 13:54:16.885568 TX Bit6 (977~1002) 26 989, Bit14 (967~992) 26 979,
3468 13:54:16.888948 TX Bit7 (976~999) 24 987, Bit15 (963~990) 28 976,
3469 13:54:16.892386
3470 13:54:16.892882
3471 13:54:16.895621 TX Vref found, early break! 390< 392
3472 13:54:16.899005 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
3473 13:54:16.902343 u1DelayCellOfst[0]=7 cells (6 PI)
3474 13:54:16.905771 u1DelayCellOfst[1]=5 cells (4 PI)
3475 13:54:16.909287 u1DelayCellOfst[2]=1 cells (1 PI)
3476 13:54:16.912161 u1DelayCellOfst[3]=0 cells (0 PI)
3477 13:54:16.915686 u1DelayCellOfst[4]=3 cells (3 PI)
3478 13:54:16.916115 u1DelayCellOfst[5]=6 cells (5 PI)
3479 13:54:16.919420 u1DelayCellOfst[6]=6 cells (5 PI)
3480 13:54:16.922206 u1DelayCellOfst[7]=3 cells (3 PI)
3481 13:54:16.925981 Byte0, DQ PI dly=984, DQM PI dly= 987
3482 13:54:16.932512 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
3483 13:54:16.933026
3484 13:54:16.935487 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
3485 13:54:16.935916
3486 13:54:16.939422 u1DelayCellOfst[8]=2 cells (2 PI)
3487 13:54:16.942456 u1DelayCellOfst[9]=2 cells (2 PI)
3488 13:54:16.945577 u1DelayCellOfst[10]=3 cells (3 PI)
3489 13:54:16.948868 u1DelayCellOfst[11]=5 cells (4 PI)
3490 13:54:16.952467 u1DelayCellOfst[12]=5 cells (4 PI)
3491 13:54:16.953028 u1DelayCellOfst[13]=5 cells (4 PI)
3492 13:54:16.955707 u1DelayCellOfst[14]=3 cells (3 PI)
3493 13:54:16.958936 u1DelayCellOfst[15]=0 cells (0 PI)
3494 13:54:16.962470 Byte1, DQ PI dly=976, DQM PI dly= 978
3495 13:54:16.969124 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
3496 13:54:16.969678
3497 13:54:16.972307 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
3498 13:54:16.972728
3499 13:54:16.975829 Write Rank1 MR14 =0x18
3500 13:54:16.976323
3501 13:54:16.976652 Final TX Range 0 Vref 24
3502 13:54:16.976955
3503 13:54:16.982531 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3504 13:54:16.983039
3505 13:54:16.989393 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3506 13:54:16.995947 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3507 13:54:17.003034 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3508 13:54:17.006132 Write Rank1 MR3 =0xb0
3509 13:54:17.009504 DramC Write-DBI on
3510 13:54:17.010006 ==
3511 13:54:17.013045 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3512 13:54:17.016177 fsp= 1, odt_onoff= 1, Byte mode= 0
3513 13:54:17.016688 ==
3514 13:54:17.019321 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3515 13:54:17.022356
3516 13:54:17.022781 Begin, DQ Scan Range 698~762
3517 13:54:17.023112
3518 13:54:17.023412
3519 13:54:17.026180 TX Vref Scan disable
3520 13:54:17.029466 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3521 13:54:17.032730 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3522 13:54:17.035919 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3523 13:54:17.039319 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3524 13:54:17.042773 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3525 13:54:17.046003 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3526 13:54:17.049268 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3527 13:54:17.052536 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3528 13:54:17.056271 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3529 13:54:17.059182 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
3530 13:54:17.062487 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
3531 13:54:17.069525 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
3532 13:54:17.072534 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
3533 13:54:17.075952 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3534 13:54:17.079558 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3535 13:54:17.082875 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3536 13:54:17.086140 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3537 13:54:17.089600 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3538 13:54:17.092881 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3539 13:54:17.096114 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3540 13:54:17.099267 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3541 13:54:17.106987 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3542 13:54:17.110568 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3543 13:54:17.113548 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3544 13:54:17.116969 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3545 13:54:17.120491 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3546 13:54:17.123572 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3547 13:54:17.127186 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3548 13:54:17.130470 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3549 13:54:17.133687 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3550 13:54:17.137310 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
3551 13:54:17.140455 Byte0, DQ PI dly=731, DQM PI dly= 731
3552 13:54:17.143709 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
3553 13:54:17.144139
3554 13:54:17.150653 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
3555 13:54:17.151162
3556 13:54:17.153592 Byte1, DQ PI dly=721, DQM PI dly= 721
3557 13:54:17.157151 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
3558 13:54:17.157704
3559 13:54:17.160480 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
3560 13:54:17.160910
3561 13:54:17.167278 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3562 13:54:17.174060 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3563 13:54:17.183689 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3564 13:54:17.187176 wait MRW command Rank1 MR3 =0x30 fired (1)
3565 13:54:17.187727 Write Rank1 MR3 =0x30
3566 13:54:17.190849 DramC Write-DBI off
3567 13:54:17.191370
3568 13:54:17.191703 [DATLAT]
3569 13:54:17.193941 Freq=1600, CH1 RK1, use_rxtx_scan=0
3570 13:54:17.194450
3571 13:54:17.197357 DATLAT Default: 0x10
3572 13:54:17.197865 7, 0xFFFF, sum=0
3573 13:54:17.200382 8, 0xFFFF, sum=0
3574 13:54:17.200816 9, 0xFFFF, sum=0
3575 13:54:17.204072 10, 0xFFFF, sum=0
3576 13:54:17.204582 11, 0xFFFF, sum=0
3577 13:54:17.207366 12, 0xFFFF, sum=0
3578 13:54:17.207880 13, 0xFFFF, sum=0
3579 13:54:17.210532 14, 0x0, sum=1
3580 13:54:17.211052 15, 0x0, sum=2
3581 13:54:17.211393 16, 0x0, sum=3
3582 13:54:17.214161 17, 0x0, sum=4
3583 13:54:17.217082 pattern=2 first_step=14 total pass=5 best_step=16
3584 13:54:17.217566 ==
3585 13:54:17.223989 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3586 13:54:17.227071 fsp= 1, odt_onoff= 1, Byte mode= 0
3587 13:54:17.227494 ==
3588 13:54:17.230463 Start DQ dly to find pass range UseTestEngine =1
3589 13:54:17.233776 x-axis: bit #, y-axis: DQ dly (-127~63)
3590 13:54:17.237089 RX Vref Scan = 0
3591 13:54:17.237618 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3592 13:54:17.240470 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3593 13:54:17.243673 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3594 13:54:17.247254 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3595 13:54:17.250392 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3596 13:54:17.253714 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3597 13:54:17.257275 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3598 13:54:17.260407 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3599 13:54:17.260894 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3600 13:54:17.263515 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3601 13:54:17.267484 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3602 13:54:17.270636 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3603 13:54:17.273755 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3604 13:54:17.276914 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3605 13:54:17.280240 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3606 13:54:17.283882 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3607 13:54:17.284397 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3608 13:54:17.287162 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3609 13:54:17.290390 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3610 13:54:17.293555 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3611 13:54:17.296993 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3612 13:54:17.300323 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3613 13:54:17.303935 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3614 13:54:17.304455 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3615 13:54:17.307058 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3616 13:54:17.310205 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3617 13:54:17.313565 0, [0] xxooxxxx xxxxxxxo [MSB]
3618 13:54:17.317201 1, [0] xxooxxxx oooxxxxo [MSB]
3619 13:54:17.320349 2, [0] xxooxxxx oooxxxxo [MSB]
3620 13:54:17.320852 3, [0] xxoooxxo ooooxxxo [MSB]
3621 13:54:17.324129 4, [0] xxoooxxo ooooxooo [MSB]
3622 13:54:17.326833 5, [0] xxoooxxo oooooooo [MSB]
3623 13:54:17.330513 6, [0] xooooxxo oooooooo [MSB]
3624 13:54:17.333718 7, [0] xoooooxo oooooooo [MSB]
3625 13:54:17.336977 33, [0] oooxoooo oooooooo [MSB]
3626 13:54:17.340586 34, [0] oooxoooo ooooooox [MSB]
3627 13:54:17.343754 35, [0] ooxxoooo ooooooox [MSB]
3628 13:54:17.347180 36, [0] ooxxoooo ooooooox [MSB]
3629 13:54:17.350573 37, [0] ooxxoooo xxxxooox [MSB]
3630 13:54:17.351008 38, [0] ooxxxooo xxxxooxx [MSB]
3631 13:54:17.353875 39, [0] ooxxxoox xxxxoxxx [MSB]
3632 13:54:17.357461 40, [0] ooxxxoox xxxxxxxx [MSB]
3633 13:54:17.360536 41, [0] ooxxxxox xxxxxxxx [MSB]
3634 13:54:17.363748 42, [0] oxxxxxox xxxxxxxx [MSB]
3635 13:54:17.367369 43, [0] xxxxxxxx xxxxxxxx [MSB]
3636 13:54:17.370829 iDelay=43, Bit 0, Center 25 (8 ~ 42) 35
3637 13:54:17.373888 iDelay=43, Bit 1, Center 23 (6 ~ 41) 36
3638 13:54:17.377654 iDelay=43, Bit 2, Center 17 (0 ~ 34) 35
3639 13:54:17.380481 iDelay=43, Bit 3, Center 15 (-2 ~ 32) 35
3640 13:54:17.384068 iDelay=43, Bit 4, Center 20 (3 ~ 37) 35
3641 13:54:17.386953 iDelay=43, Bit 5, Center 23 (7 ~ 40) 34
3642 13:54:17.390580 iDelay=43, Bit 6, Center 25 (8 ~ 42) 35
3643 13:54:17.394121 iDelay=43, Bit 7, Center 20 (3 ~ 38) 36
3644 13:54:17.396895 iDelay=43, Bit 8, Center 18 (1 ~ 36) 36
3645 13:54:17.400434 iDelay=43, Bit 9, Center 18 (1 ~ 36) 36
3646 13:54:17.403768 iDelay=43, Bit 10, Center 18 (1 ~ 36) 36
3647 13:54:17.407538 iDelay=43, Bit 11, Center 19 (3 ~ 36) 34
3648 13:54:17.414180 iDelay=43, Bit 12, Center 22 (5 ~ 39) 35
3649 13:54:17.417400 iDelay=43, Bit 13, Center 21 (4 ~ 38) 35
3650 13:54:17.420834 iDelay=43, Bit 14, Center 20 (4 ~ 37) 34
3651 13:54:17.424125 iDelay=43, Bit 15, Center 16 (-1 ~ 33) 35
3652 13:54:17.424627 ==
3653 13:54:17.427217 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3654 13:54:17.430835 fsp= 1, odt_onoff= 1, Byte mode= 0
3655 13:54:17.431337 ==
3656 13:54:17.434319 DQS Delay:
3657 13:54:17.434740 DQS0 = 0, DQS1 = 0
3658 13:54:17.437124 DQM Delay:
3659 13:54:17.437583 DQM0 = 21, DQM1 = 19
3660 13:54:17.437911 DQ Delay:
3661 13:54:17.440433 DQ0 =25, DQ1 =23, DQ2 =17, DQ3 =15
3662 13:54:17.444146 DQ4 =20, DQ5 =23, DQ6 =25, DQ7 =20
3663 13:54:17.447214 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
3664 13:54:17.450797 DQ12 =22, DQ13 =21, DQ14 =20, DQ15 =16
3665 13:54:17.451220
3666 13:54:17.451542
3667 13:54:17.451837
3668 13:54:17.453935 [DramC_TX_OE_Calibration] TA2
3669 13:54:17.457605 Original DQ_B0 (3 6) =30, OEN = 27
3670 13:54:17.460990 Original DQ_B1 (3 6) =30, OEN = 27
3671 13:54:17.464060 23, 0x0, End_B0=23 End_B1=23
3672 13:54:17.467712 24, 0x0, End_B0=24 End_B1=24
3673 13:54:17.468321 25, 0x0, End_B0=25 End_B1=25
3674 13:54:17.471150 26, 0x0, End_B0=26 End_B1=26
3675 13:54:17.474099 27, 0x0, End_B0=27 End_B1=27
3676 13:54:17.477668 28, 0x0, End_B0=28 End_B1=28
3677 13:54:17.480903 29, 0x0, End_B0=29 End_B1=29
3678 13:54:17.481455 30, 0x0, End_B0=30 End_B1=30
3679 13:54:17.484292 31, 0xFFFF, End_B0=30 End_B1=30
3680 13:54:17.490905 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3681 13:54:17.494075 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3682 13:54:17.497429
3683 13:54:17.497848
3684 13:54:17.498229 Write Rank1 MR23 =0x3f
3685 13:54:17.498540 [DQSOSC]
3686 13:54:17.507722 [DQSOSCAuto] RK1, (LSB)MR18= 0xa5, (MSB)MR19= 0x3, tDQSOscB0 = 337 ps tDQSOscB1 = 0 ps
3687 13:54:17.510736 CH1_RK1: MR19=0x3, MR18=0xA5, DQSOSC=337, MR23=63, INC=21, DEC=32
3688 13:54:17.514058 Write Rank1 MR23 =0x3f
3689 13:54:17.514505 [DQSOSC]
3690 13:54:17.524311 [DQSOSCAuto] RK1, (LSB)MR18= 0xa6, (MSB)MR19= 0x3, tDQSOscB0 = 337 ps tDQSOscB1 = 0 ps
3691 13:54:17.524840 CH1 RK1: MR19=3, MR18=A6
3692 13:54:17.527496 [RxdqsGatingPostProcess] freq 1600
3693 13:54:17.534292 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3694 13:54:17.534793 Rank: 0
3695 13:54:17.537440 best DQS0 dly(2T, 0.5T) = (2, 5)
3696 13:54:17.541037 best DQS1 dly(2T, 0.5T) = (2, 5)
3697 13:54:17.544538 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3698 13:54:17.547664 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3699 13:54:17.548170 Rank: 1
3700 13:54:17.551012 best DQS0 dly(2T, 0.5T) = (2, 5)
3701 13:54:17.554035 best DQS1 dly(2T, 0.5T) = (2, 5)
3702 13:54:17.557694 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3703 13:54:17.561019 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3704 13:54:17.564345 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3705 13:54:17.567556 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3706 13:54:17.570961 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3707 13:54:17.574290
3708 13:54:17.574799
3709 13:54:17.577749 [Calibration Summary] Freqency 1600
3710 13:54:17.578171 CH 0, Rank 0
3711 13:54:17.578500 All Pass.
3712 13:54:17.578964
3713 13:54:17.581341 CH 0, Rank 1
3714 13:54:17.581845 All Pass.
3715 13:54:17.582171
3716 13:54:17.582469 CH 1, Rank 0
3717 13:54:17.584641 All Pass.
3718 13:54:17.585170
3719 13:54:17.585548 CH 1, Rank 1
3720 13:54:17.585856 All Pass.
3721 13:54:17.586139
3722 13:54:17.591295 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3723 13:54:17.597422 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3724 13:54:17.607759 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3725 13:54:17.608269 Write Rank0 MR3 =0xb0
3726 13:54:17.614243 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3727 13:54:17.621203 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3728 13:54:17.627920 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3729 13:54:17.631149 Write Rank1 MR3 =0xb0
3730 13:54:17.637400 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3731 13:54:17.644334 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3732 13:54:17.650900 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3733 13:54:17.654133 Write Rank0 MR3 =0xb0
3734 13:54:17.661075 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3735 13:54:17.667942 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3736 13:54:17.674326 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3737 13:54:17.674832 Write Rank1 MR3 =0xb0
3738 13:54:17.677429 DramC Write-DBI on
3739 13:54:17.681185 [GetDramInforAfterCalByMRR] Vendor 1.
3740 13:54:17.684492 [GetDramInforAfterCalByMRR] Revision 7.
3741 13:54:17.684991 MR8 12
3742 13:54:17.691135 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3743 13:54:17.691633 MR8 12
3744 13:54:17.694436 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3745 13:54:17.694936 MR8 12
3746 13:54:17.701275 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3747 13:54:17.701788 MR8 12
3748 13:54:17.707970 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3749 13:54:17.714436 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3750 13:54:17.717717 Write Rank0 MR13 =0xd0
3751 13:54:17.718160 Write Rank1 MR13 =0xd0
3752 13:54:17.720954 Write Rank0 MR13 =0xd0
3753 13:54:17.724406 Write Rank1 MR13 =0xd0
3754 13:54:17.727842 Save calibration result to emmc
3755 13:54:17.728343
3756 13:54:17.728668
3757 13:54:17.731116 [DramcModeReg_Check] Freq_1600, FSP_1
3758 13:54:17.731618 FSP_1, CH_0, RK0
3759 13:54:17.734516 Write Rank0 MR13 =0xd8
3760 13:54:17.737637 MR12 = 0x56 (global = 0x56) match
3761 13:54:17.741127 MR14 = 0x18 (global = 0x18) match
3762 13:54:17.741659 FSP_1, CH_0, RK1
3763 13:54:17.744244 Write Rank1 MR13 =0xd8
3764 13:54:17.747577 MR12 = 0x56 (global = 0x56) match
3765 13:54:17.751144 MR14 = 0x1a (global = 0x1a) match
3766 13:54:17.751648 FSP_1, CH_1, RK0
3767 13:54:17.754423 Write Rank0 MR13 =0xd8
3768 13:54:17.757692 MR12 = 0x56 (global = 0x56) match
3769 13:54:17.761281 MR14 = 0x1a (global = 0x1a) match
3770 13:54:17.761898 FSP_1, CH_1, RK1
3771 13:54:17.764569 Write Rank1 MR13 =0xd8
3772 13:54:17.767918 MR12 = 0x56 (global = 0x56) match
3773 13:54:17.771127 MR14 = 0x18 (global = 0x18) match
3774 13:54:17.771627
3775 13:54:17.774285 [MEM_TEST] 02: After DFS, before run time config
3776 13:54:17.785315 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3777 13:54:17.785913
3778 13:54:17.786249 [TA2_TEST]
3779 13:54:17.786555 === TA2 HW
3780 13:54:17.788565 TA2 PAT: XTALK
3781 13:54:17.791679 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3782 13:54:17.798667 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3783 13:54:17.802072 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3784 13:54:17.805500 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3785 13:54:17.806019
3786 13:54:17.808468
3787 13:54:17.808885 Settings after calibration
3788 13:54:17.809210
3789 13:54:17.811850 [DramcRunTimeConfig]
3790 13:54:17.815130 TransferPLLToSPMControl - MODE SW PHYPLL
3791 13:54:17.815631 TX_TRACKING: ON
3792 13:54:17.818599 RX_TRACKING: ON
3793 13:54:17.819134 HW_GATING: ON
3794 13:54:17.821813 HW_GATING DBG: OFF
3795 13:54:17.822235 ddr_geometry:1
3796 13:54:17.825450 ddr_geometry:1
3797 13:54:17.825947 ddr_geometry:1
3798 13:54:17.826274 ddr_geometry:1
3799 13:54:17.828279 ddr_geometry:1
3800 13:54:17.828698 ddr_geometry:1
3801 13:54:17.832157 ddr_geometry:1
3802 13:54:17.832653 ddr_geometry:1
3803 13:54:17.835366 High Freq DUMMY_READ_FOR_TRACKING: ON
3804 13:54:17.838600 ZQCS_ENABLE_LP4: OFF
3805 13:54:17.841922 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3806 13:54:17.845207 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3807 13:54:17.845663 SPM_CONTROL_AFTERK: ON
3808 13:54:17.848718 IMPEDANCE_TRACKING: ON
3809 13:54:17.849213 TEMP_SENSOR: ON
3810 13:54:17.852053 PER_BANK_REFRESH: ON
3811 13:54:17.852551 HW_SAVE_FOR_SR: ON
3812 13:54:17.855304 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3813 13:54:17.858647 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3814 13:54:17.862098 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3815 13:54:17.865558 Read ODT Tracking: ON
3816 13:54:17.868982 =========================
3817 13:54:17.869539
3818 13:54:17.869877 [TA2_TEST]
3819 13:54:17.870179 === TA2 HW
3820 13:54:17.875520 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3821 13:54:17.878882 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3822 13:54:17.885705 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3823 13:54:17.889040 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3824 13:54:17.889615
3825 13:54:17.891872 [MEM_TEST] 03: After run time config
3826 13:54:17.902697 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3827 13:54:17.906226 [complex_mem_test] start addr:0x40024000, len:131072
3828 13:54:18.110470 1st complex R/W mem test pass
3829 13:54:18.117192 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3830 13:54:18.120515 sync preloader write leveling
3831 13:54:18.123708 sync preloader cbt_mr12
3832 13:54:18.127082 sync preloader cbt_clk_dly
3833 13:54:18.127504 sync preloader cbt_cmd_dly
3834 13:54:18.130485 sync preloader cbt_cs
3835 13:54:18.134046 sync preloader cbt_ca_perbit_delay
3836 13:54:18.134519 sync preloader clk_delay
3837 13:54:18.137209 sync preloader dqs_delay
3838 13:54:18.140261 sync preloader u1Gating2T_Save
3839 13:54:18.143595 sync preloader u1Gating05T_Save
3840 13:54:18.147418 sync preloader u1Gatingfine_tune_Save
3841 13:54:18.150347 sync preloader u1Gatingucpass_count_Save
3842 13:54:18.153796 sync preloader u1TxWindowPerbitVref_Save
3843 13:54:18.157017 sync preloader u1TxCenter_min_Save
3844 13:54:18.160820 sync preloader u1TxCenter_max_Save
3845 13:54:18.163798 sync preloader u1Txwin_center_Save
3846 13:54:18.167327 sync preloader u1Txfirst_pass_Save
3847 13:54:18.170333 sync preloader u1Txlast_pass_Save
3848 13:54:18.170756 sync preloader u1RxDatlat_Save
3849 13:54:18.173816 sync preloader u1RxWinPerbitVref_Save
3850 13:54:18.180392 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3851 13:54:18.183835 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3852 13:54:18.186965 sync preloader delay_cell_unit
3853 13:54:18.193932 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3854 13:54:18.197130 sync preloader write leveling
3855 13:54:18.197607 sync preloader cbt_mr12
3856 13:54:18.200555 sync preloader cbt_clk_dly
3857 13:54:18.204125 sync preloader cbt_cmd_dly
3858 13:54:18.204623 sync preloader cbt_cs
3859 13:54:18.207289 sync preloader cbt_ca_perbit_delay
3860 13:54:18.210468 sync preloader clk_delay
3861 13:54:18.214197 sync preloader dqs_delay
3862 13:54:18.214705 sync preloader u1Gating2T_Save
3863 13:54:18.217365 sync preloader u1Gating05T_Save
3864 13:54:18.220592 sync preloader u1Gatingfine_tune_Save
3865 13:54:18.223956 sync preloader u1Gatingucpass_count_Save
3866 13:54:18.227614 sync preloader u1TxWindowPerbitVref_Save
3867 13:54:18.230676 sync preloader u1TxCenter_min_Save
3868 13:54:18.233962 sync preloader u1TxCenter_max_Save
3869 13:54:18.237057 sync preloader u1Txwin_center_Save
3870 13:54:18.240812 sync preloader u1Txfirst_pass_Save
3871 13:54:18.243917 sync preloader u1Txlast_pass_Save
3872 13:54:18.247169 sync preloader u1RxDatlat_Save
3873 13:54:18.250714 sync preloader u1RxWinPerbitVref_Save
3874 13:54:18.253895 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3875 13:54:18.257316 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3876 13:54:18.260841 sync preloader delay_cell_unit
3877 13:54:18.267680 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3878 13:54:18.270756 sync preloader write leveling
3879 13:54:18.273958 sync preloader cbt_mr12
3880 13:54:18.274380 sync preloader cbt_clk_dly
3881 13:54:18.277600 sync preloader cbt_cmd_dly
3882 13:54:18.280620 sync preloader cbt_cs
3883 13:54:18.281044 sync preloader cbt_ca_perbit_delay
3884 13:54:18.284144 sync preloader clk_delay
3885 13:54:18.287515 sync preloader dqs_delay
3886 13:54:18.291020 sync preloader u1Gating2T_Save
3887 13:54:18.294226 sync preloader u1Gating05T_Save
3888 13:54:18.297506 sync preloader u1Gatingfine_tune_Save
3889 13:54:18.300841 sync preloader u1Gatingucpass_count_Save
3890 13:54:18.304224 sync preloader u1TxWindowPerbitVref_Save
3891 13:54:18.307486 sync preloader u1TxCenter_min_Save
3892 13:54:18.310560 sync preloader u1TxCenter_max_Save
3893 13:54:18.310982 sync preloader u1Txwin_center_Save
3894 13:54:18.313933 sync preloader u1Txfirst_pass_Save
3895 13:54:18.317795 sync preloader u1Txlast_pass_Save
3896 13:54:18.320685 sync preloader u1RxDatlat_Save
3897 13:54:18.324413 sync preloader u1RxWinPerbitVref_Save
3898 13:54:18.327639 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3899 13:54:18.334329 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3900 13:54:18.334975 sync preloader delay_cell_unit
3901 13:54:18.340566 just_for_test_dump_coreboot_params dump all params
3902 13:54:18.341201 dump source = 0x0
3903 13:54:18.343914 dump params frequency:1600
3904 13:54:18.347516 dump params rank number:2
3905 13:54:18.347932
3906 13:54:18.350654 dump params write leveling
3907 13:54:18.351074 write leveling[0][0][0] = 0x21
3908 13:54:18.354029 write leveling[0][0][1] = 0x1c
3909 13:54:18.357278 write leveling[0][1][0] = 0x22
3910 13:54:18.360636 write leveling[0][1][1] = 0x1e
3911 13:54:18.363941 write leveling[1][0][0] = 0x25
3912 13:54:18.364359 write leveling[1][0][1] = 0x20
3913 13:54:18.367265 write leveling[1][1][0] = 0x26
3914 13:54:18.371085 write leveling[1][1][1] = 0x1f
3915 13:54:18.374122 dump params cbt_cs
3916 13:54:18.374636 cbt_cs[0][0] = 0x8
3917 13:54:18.377660 cbt_cs[0][1] = 0x8
3918 13:54:18.378264 cbt_cs[1][0] = 0xb
3919 13:54:18.380638 cbt_cs[1][1] = 0xb
3920 13:54:18.381055 dump params cbt_mr12
3921 13:54:18.384288 cbt_mr12[0][0] = 0x16
3922 13:54:18.384788 cbt_mr12[0][1] = 0x16
3923 13:54:18.387901 cbt_mr12[1][0] = 0x16
3924 13:54:18.391146 cbt_mr12[1][1] = 0x16
3925 13:54:18.391647 dump params tx window
3926 13:54:18.394118 tx_center_min[0][0][0] = 980
3927 13:54:18.397521 tx_center_max[0][0][0] = 987
3928 13:54:18.401049 tx_center_min[0][0][1] = 974
3929 13:54:18.401619 tx_center_max[0][0][1] = 979
3930 13:54:18.404262 tx_center_min[0][1][0] = 981
3931 13:54:18.407668 tx_center_max[0][1][0] = 989
3932 13:54:18.410690 tx_center_min[0][1][1] = 978
3933 13:54:18.413961 tx_center_max[0][1][1] = 982
3934 13:54:18.414383 tx_center_min[1][0][0] = 983
3935 13:54:18.417316 tx_center_max[1][0][0] = 988
3936 13:54:18.420886 tx_center_min[1][0][1] = 978
3937 13:54:18.424412 tx_center_max[1][0][1] = 981
3938 13:54:18.424914 tx_center_min[1][1][0] = 984
3939 13:54:18.427859 tx_center_max[1][1][0] = 990
3940 13:54:18.431079 tx_center_min[1][1][1] = 976
3941 13:54:18.434314 tx_center_max[1][1][1] = 980
3942 13:54:18.434820 dump params tx window
3943 13:54:18.437757 tx_win_center[0][0][0] = 987
3944 13:54:18.441112 tx_first_pass[0][0][0] = 975
3945 13:54:18.444236 tx_last_pass[0][0][0] = 999
3946 13:54:18.447560 tx_win_center[0][0][1] = 986
3947 13:54:18.447984 tx_first_pass[0][0][1] = 975
3948 13:54:18.451117 tx_last_pass[0][0][1] = 998
3949 13:54:18.454455 tx_win_center[0][0][2] = 986
3950 13:54:18.457610 tx_first_pass[0][0][2] = 975
3951 13:54:18.458033 tx_last_pass[0][0][2] = 998
3952 13:54:18.461178 tx_win_center[0][0][3] = 980
3953 13:54:18.464321 tx_first_pass[0][0][3] = 968
3954 13:54:18.467548 tx_last_pass[0][0][3] = 992
3955 13:54:18.467972 tx_win_center[0][0][4] = 986
3956 13:54:18.471239 tx_first_pass[0][0][4] = 974
3957 13:54:18.474432 tx_last_pass[0][0][4] = 998
3958 13:54:18.477805 tx_win_center[0][0][5] = 981
3959 13:54:18.481304 tx_first_pass[0][0][5] = 969
3960 13:54:18.481805 tx_last_pass[0][0][5] = 993
3961 13:54:18.484405 tx_win_center[0][0][6] = 982
3962 13:54:18.488080 tx_first_pass[0][0][6] = 970
3963 13:54:18.491411 tx_last_pass[0][0][6] = 995
3964 13:54:18.491923 tx_win_center[0][0][7] = 983
3965 13:54:18.494355 tx_first_pass[0][0][7] = 971
3966 13:54:18.497998 tx_last_pass[0][0][7] = 996
3967 13:54:18.501351 tx_win_center[0][0][8] = 974
3968 13:54:18.501779 tx_first_pass[0][0][8] = 961
3969 13:54:18.505049 tx_last_pass[0][0][8] = 987
3970 13:54:18.508074 tx_win_center[0][0][9] = 976
3971 13:54:18.511591 tx_first_pass[0][0][9] = 964
3972 13:54:18.514727 tx_last_pass[0][0][9] = 988
3973 13:54:18.515149 tx_win_center[0][0][10] = 979
3974 13:54:18.518047 tx_first_pass[0][0][10] = 968
3975 13:54:18.521570 tx_last_pass[0][0][10] = 991
3976 13:54:18.525134 tx_win_center[0][0][11] = 975
3977 13:54:18.528302 tx_first_pass[0][0][11] = 962
3978 13:54:18.528806 tx_last_pass[0][0][11] = 988
3979 13:54:18.531802 tx_win_center[0][0][12] = 976
3980 13:54:18.534958 tx_first_pass[0][0][12] = 963
3981 13:54:18.538170 tx_last_pass[0][0][12] = 989
3982 13:54:18.541685 tx_win_center[0][0][13] = 975
3983 13:54:18.542201 tx_first_pass[0][0][13] = 964
3984 13:54:18.544936 tx_last_pass[0][0][13] = 987
3985 13:54:18.548527 tx_win_center[0][0][14] = 976
3986 13:54:18.551693 tx_first_pass[0][0][14] = 964
3987 13:54:18.555326 tx_last_pass[0][0][14] = 989
3988 13:54:18.555854 tx_win_center[0][0][15] = 978
3989 13:54:18.558262 tx_first_pass[0][0][15] = 966
3990 13:54:18.561911 tx_last_pass[0][0][15] = 990
3991 13:54:18.564802 tx_win_center[0][1][0] = 989
3992 13:54:18.568236 tx_first_pass[0][1][0] = 977
3993 13:54:18.568657 tx_last_pass[0][1][0] = 1001
3994 13:54:18.571601 tx_win_center[0][1][1] = 987
3995 13:54:18.575319 tx_first_pass[0][1][1] = 976
3996 13:54:18.578306 tx_last_pass[0][1][1] = 999
3997 13:54:18.578808 tx_win_center[0][1][2] = 987
3998 13:54:18.582064 tx_first_pass[0][1][2] = 976
3999 13:54:18.585169 tx_last_pass[0][1][2] = 999
4000 13:54:18.588581 tx_win_center[0][1][3] = 981
4001 13:54:18.591653 tx_first_pass[0][1][3] = 969
4002 13:54:18.592150 tx_last_pass[0][1][3] = 994
4003 13:54:18.595110 tx_win_center[0][1][4] = 987
4004 13:54:18.598072 tx_first_pass[0][1][4] = 976
4005 13:54:18.601354 tx_last_pass[0][1][4] = 999
4006 13:54:18.601780 tx_win_center[0][1][5] = 982
4007 13:54:18.604866 tx_first_pass[0][1][5] = 970
4008 13:54:18.608116 tx_last_pass[0][1][5] = 994
4009 13:54:18.611698 tx_win_center[0][1][6] = 983
4010 13:54:18.614815 tx_first_pass[0][1][6] = 971
4011 13:54:18.615315 tx_last_pass[0][1][6] = 995
4012 13:54:18.618319 tx_win_center[0][1][7] = 986
4013 13:54:18.621350 tx_first_pass[0][1][7] = 975
4014 13:54:18.624628 tx_last_pass[0][1][7] = 998
4015 13:54:18.625086 tx_win_center[0][1][8] = 978
4016 13:54:18.628273 tx_first_pass[0][1][8] = 966
4017 13:54:18.631679 tx_last_pass[0][1][8] = 990
4018 13:54:18.634948 tx_win_center[0][1][9] = 979
4019 13:54:18.635451 tx_first_pass[0][1][9] = 967
4020 13:54:18.638620 tx_last_pass[0][1][9] = 991
4021 13:54:18.641752 tx_win_center[0][1][10] = 982
4022 13:54:18.644980 tx_first_pass[0][1][10] = 970
4023 13:54:18.648324 tx_last_pass[0][1][10] = 995
4024 13:54:18.648824 tx_win_center[0][1][11] = 978
4025 13:54:18.651564 tx_first_pass[0][1][11] = 967
4026 13:54:18.655101 tx_last_pass[0][1][11] = 990
4027 13:54:18.658418 tx_win_center[0][1][12] = 979
4028 13:54:18.661612 tx_first_pass[0][1][12] = 967
4029 13:54:18.662165 tx_last_pass[0][1][12] = 991
4030 13:54:18.664998 tx_win_center[0][1][13] = 978
4031 13:54:18.668594 tx_first_pass[0][1][13] = 967
4032 13:54:18.671644 tx_last_pass[0][1][13] = 990
4033 13:54:18.674843 tx_win_center[0][1][14] = 979
4034 13:54:18.675268 tx_first_pass[0][1][14] = 967
4035 13:54:18.678453 tx_last_pass[0][1][14] = 991
4036 13:54:18.681554 tx_win_center[0][1][15] = 980
4037 13:54:18.684685 tx_first_pass[0][1][15] = 969
4038 13:54:18.688415 tx_last_pass[0][1][15] = 992
4039 13:54:18.688921 tx_win_center[1][0][0] = 988
4040 13:54:18.691666 tx_first_pass[1][0][0] = 976
4041 13:54:18.695014 tx_last_pass[1][0][0] = 1001
4042 13:54:18.698223 tx_win_center[1][0][1] = 987
4043 13:54:18.701539 tx_first_pass[1][0][1] = 976
4044 13:54:18.701963 tx_last_pass[1][0][1] = 999
4045 13:54:18.704908 tx_win_center[1][0][2] = 985
4046 13:54:18.708734 tx_first_pass[1][0][2] = 973
4047 13:54:18.711593 tx_last_pass[1][0][2] = 997
4048 13:54:18.712021 tx_win_center[1][0][3] = 983
4049 13:54:18.714934 tx_first_pass[1][0][3] = 971
4050 13:54:18.718338 tx_last_pass[1][0][3] = 995
4051 13:54:18.721541 tx_win_center[1][0][4] = 986
4052 13:54:18.725085 tx_first_pass[1][0][4] = 975
4053 13:54:18.725551 tx_last_pass[1][0][4] = 998
4054 13:54:18.728588 tx_win_center[1][0][5] = 987
4055 13:54:18.731699 tx_first_pass[1][0][5] = 976
4056 13:54:18.735160 tx_last_pass[1][0][5] = 999
4057 13:54:18.735676 tx_win_center[1][0][6] = 988
4058 13:54:18.738403 tx_first_pass[1][0][6] = 976
4059 13:54:18.741788 tx_last_pass[1][0][6] = 1000
4060 13:54:18.745473 tx_win_center[1][0][7] = 986
4061 13:54:18.745983 tx_first_pass[1][0][7] = 975
4062 13:54:18.748399 tx_last_pass[1][0][7] = 998
4063 13:54:18.751690 tx_win_center[1][0][8] = 979
4064 13:54:18.755609 tx_first_pass[1][0][8] = 967
4065 13:54:18.758525 tx_last_pass[1][0][8] = 991
4066 13:54:18.758949 tx_win_center[1][0][9] = 979
4067 13:54:18.762210 tx_first_pass[1][0][9] = 967
4068 13:54:18.765159 tx_last_pass[1][0][9] = 991
4069 13:54:18.768795 tx_win_center[1][0][10] = 980
4070 13:54:18.769344 tx_first_pass[1][0][10] = 968
4071 13:54:18.772395 tx_last_pass[1][0][10] = 992
4072 13:54:18.775265 tx_win_center[1][0][11] = 980
4073 13:54:18.779092 tx_first_pass[1][0][11] = 969
4074 13:54:18.782033 tx_last_pass[1][0][11] = 992
4075 13:54:18.782461 tx_win_center[1][0][12] = 981
4076 13:54:18.785320 tx_first_pass[1][0][12] = 969
4077 13:54:18.788859 tx_last_pass[1][0][12] = 993
4078 13:54:18.792212 tx_win_center[1][0][13] = 981
4079 13:54:18.795300 tx_first_pass[1][0][13] = 970
4080 13:54:18.795759 tx_last_pass[1][0][13] = 992
4081 13:54:18.798544 tx_win_center[1][0][14] = 980
4082 13:54:18.802028 tx_first_pass[1][0][14] = 969
4083 13:54:18.805509 tx_last_pass[1][0][14] = 992
4084 13:54:18.808879 tx_win_center[1][0][15] = 978
4085 13:54:18.809416 tx_first_pass[1][0][15] = 966
4086 13:54:18.812227 tx_last_pass[1][0][15] = 991
4087 13:54:18.815394 tx_win_center[1][1][0] = 990
4088 13:54:18.818483 tx_first_pass[1][1][0] = 977
4089 13:54:18.821975 tx_last_pass[1][1][0] = 1003
4090 13:54:18.822484 tx_win_center[1][1][1] = 988
4091 13:54:18.825507 tx_first_pass[1][1][1] = 976
4092 13:54:18.828597 tx_last_pass[1][1][1] = 1001
4093 13:54:18.832318 tx_win_center[1][1][2] = 985
4094 13:54:18.835545 tx_first_pass[1][1][2] = 973
4095 13:54:18.836063 tx_last_pass[1][1][2] = 998
4096 13:54:18.838518 tx_win_center[1][1][3] = 984
4097 13:54:18.841860 tx_first_pass[1][1][3] = 972
4098 13:54:18.845291 tx_last_pass[1][1][3] = 997
4099 13:54:18.845714 tx_win_center[1][1][4] = 987
4100 13:54:18.848567 tx_first_pass[1][1][4] = 975
4101 13:54:18.852014 tx_last_pass[1][1][4] = 999
4102 13:54:18.855615 tx_win_center[1][1][5] = 989
4103 13:54:18.858574 tx_first_pass[1][1][5] = 976
4104 13:54:18.859001 tx_last_pass[1][1][5] = 1002
4105 13:54:18.862204 tx_win_center[1][1][6] = 989
4106 13:54:18.865600 tx_first_pass[1][1][6] = 977
4107 13:54:18.869099 tx_last_pass[1][1][6] = 1002
4108 13:54:18.869645 tx_win_center[1][1][7] = 987
4109 13:54:18.872138 tx_first_pass[1][1][7] = 976
4110 13:54:18.875969 tx_last_pass[1][1][7] = 999
4111 13:54:18.878871 tx_win_center[1][1][8] = 978
4112 13:54:18.879298 tx_first_pass[1][1][8] = 965
4113 13:54:18.882359 tx_last_pass[1][1][8] = 991
4114 13:54:18.885603 tx_win_center[1][1][9] = 978
4115 13:54:18.889340 tx_first_pass[1][1][9] = 966
4116 13:54:18.889842 tx_last_pass[1][1][9] = 991
4117 13:54:18.892435 tx_win_center[1][1][10] = 979
4118 13:54:18.895854 tx_first_pass[1][1][10] = 967
4119 13:54:18.898895 tx_last_pass[1][1][10] = 991
4120 13:54:18.902656 tx_win_center[1][1][11] = 980
4121 13:54:18.905809 tx_first_pass[1][1][11] = 968
4122 13:54:18.906231 tx_last_pass[1][1][11] = 992
4123 13:54:18.909013 tx_win_center[1][1][12] = 980
4124 13:54:18.912236 tx_first_pass[1][1][12] = 969
4125 13:54:18.915743 tx_last_pass[1][1][12] = 992
4126 13:54:18.919198 tx_win_center[1][1][13] = 980
4127 13:54:18.919700 tx_first_pass[1][1][13] = 968
4128 13:54:18.922200 tx_last_pass[1][1][13] = 992
4129 13:54:18.925938 tx_win_center[1][1][14] = 979
4130 13:54:18.929317 tx_first_pass[1][1][14] = 967
4131 13:54:18.932077 tx_last_pass[1][1][14] = 992
4132 13:54:18.932503 tx_win_center[1][1][15] = 976
4133 13:54:18.935842 tx_first_pass[1][1][15] = 963
4134 13:54:18.939217 tx_last_pass[1][1][15] = 990
4135 13:54:18.942136 dump params rx window
4136 13:54:18.942557 rx_firspass[0][0][0] = 8
4137 13:54:18.945697 rx_lastpass[0][0][0] = 40
4138 13:54:18.949344 rx_firspass[0][0][1] = 7
4139 13:54:18.949850 rx_lastpass[0][0][1] = 39
4140 13:54:18.952331 rx_firspass[0][0][2] = 8
4141 13:54:18.955726 rx_lastpass[0][0][2] = 38
4142 13:54:18.956227 rx_firspass[0][0][3] = -4
4143 13:54:18.958972 rx_lastpass[0][0][3] = 29
4144 13:54:18.962502 rx_firspass[0][0][4] = 6
4145 13:54:18.965630 rx_lastpass[0][0][4] = 38
4146 13:54:18.966056 rx_firspass[0][0][5] = 0
4147 13:54:18.969361 rx_lastpass[0][0][5] = 30
4148 13:54:18.972554 rx_firspass[0][0][6] = 1
4149 13:54:18.973052 rx_lastpass[0][0][6] = 32
4150 13:54:18.975805 rx_firspass[0][0][7] = 3
4151 13:54:18.978959 rx_lastpass[0][0][7] = 32
4152 13:54:18.979383 rx_firspass[0][0][8] = 0
4153 13:54:18.982483 rx_lastpass[0][0][8] = 34
4154 13:54:18.986124 rx_firspass[0][0][9] = 4
4155 13:54:18.986622 rx_lastpass[0][0][9] = 34
4156 13:54:18.989133 rx_firspass[0][0][10] = 6
4157 13:54:18.992344 rx_lastpass[0][0][10] = 38
4158 13:54:18.996063 rx_firspass[0][0][11] = 1
4159 13:54:18.996570 rx_lastpass[0][0][11] = 34
4160 13:54:18.999201 rx_firspass[0][0][12] = 2
4161 13:54:19.002447 rx_lastpass[0][0][12] = 36
4162 13:54:19.002865 rx_firspass[0][0][13] = 2
4163 13:54:19.006101 rx_lastpass[0][0][13] = 30
4164 13:54:19.009317 rx_firspass[0][0][14] = -1
4165 13:54:19.012537 rx_lastpass[0][0][14] = 36
4166 13:54:19.012955 rx_firspass[0][0][15] = 3
4167 13:54:19.015809 rx_lastpass[0][0][15] = 36
4168 13:54:19.019320 rx_firspass[0][1][0] = 7
4169 13:54:19.022705 rx_lastpass[0][1][0] = 42
4170 13:54:19.023221 rx_firspass[0][1][1] = 6
4171 13:54:19.025973 rx_lastpass[0][1][1] = 40
4172 13:54:19.029118 rx_firspass[0][1][2] = 7
4173 13:54:19.029653 rx_lastpass[0][1][2] = 39
4174 13:54:19.032744 rx_firspass[0][1][3] = -4
4175 13:54:19.036015 rx_lastpass[0][1][3] = 31
4176 13:54:19.036512 rx_firspass[0][1][4] = 6
4177 13:54:19.039564 rx_lastpass[0][1][4] = 40
4178 13:54:19.042487 rx_firspass[0][1][5] = -1
4179 13:54:19.046145 rx_lastpass[0][1][5] = 33
4180 13:54:19.046644 rx_firspass[0][1][6] = 1
4181 13:54:19.049478 rx_lastpass[0][1][6] = 35
4182 13:54:19.052774 rx_firspass[0][1][7] = 2
4183 13:54:19.053192 rx_lastpass[0][1][7] = 34
4184 13:54:19.056156 rx_firspass[0][1][8] = -1
4185 13:54:19.059537 rx_lastpass[0][1][8] = 35
4186 13:54:19.059960 rx_firspass[0][1][9] = 3
4187 13:54:19.062680 rx_lastpass[0][1][9] = 36
4188 13:54:19.065744 rx_firspass[0][1][10] = 6
4189 13:54:19.069269 rx_lastpass[0][1][10] = 40
4190 13:54:19.069688 rx_firspass[0][1][11] = 0
4191 13:54:19.072873 rx_lastpass[0][1][11] = 34
4192 13:54:19.075818 rx_firspass[0][1][12] = 2
4193 13:54:19.079464 rx_lastpass[0][1][12] = 37
4194 13:54:19.079961 rx_firspass[0][1][13] = 1
4195 13:54:19.082524 rx_lastpass[0][1][13] = 33
4196 13:54:19.085836 rx_firspass[0][1][14] = 3
4197 13:54:19.086257 rx_lastpass[0][1][14] = 34
4198 13:54:19.089672 rx_firspass[0][1][15] = 3
4199 13:54:19.092763 rx_lastpass[0][1][15] = 38
4200 13:54:19.096087 rx_firspass[1][0][0] = 7
4201 13:54:19.096585 rx_lastpass[1][0][0] = 40
4202 13:54:19.099181 rx_firspass[1][0][1] = 6
4203 13:54:19.102607 rx_lastpass[1][0][1] = 40
4204 13:54:19.103028 rx_firspass[1][0][2] = 0
4205 13:54:19.106181 rx_lastpass[1][0][2] = 34
4206 13:54:19.109602 rx_firspass[1][0][3] = -2
4207 13:54:19.110103 rx_lastpass[1][0][3] = 33
4208 13:54:19.112651 rx_firspass[1][0][4] = 4
4209 13:54:19.115866 rx_lastpass[1][0][4] = 35
4210 13:54:19.119807 rx_firspass[1][0][5] = 8
4211 13:54:19.120304 rx_lastpass[1][0][5] = 40
4212 13:54:19.122936 rx_firspass[1][0][6] = 9
4213 13:54:19.126289 rx_lastpass[1][0][6] = 40
4214 13:54:19.126793 rx_firspass[1][0][7] = 4
4215 13:54:19.129577 rx_lastpass[1][0][7] = 35
4216 13:54:19.132925 rx_firspass[1][0][8] = 1
4217 13:54:19.133458 rx_lastpass[1][0][8] = 35
4218 13:54:19.136568 rx_firspass[1][0][9] = 0
4219 13:54:19.139676 rx_lastpass[1][0][9] = 35
4220 13:54:19.140096 rx_firspass[1][0][10] = 2
4221 13:54:19.142794 rx_lastpass[1][0][10] = 33
4222 13:54:19.146452 rx_firspass[1][0][11] = 2
4223 13:54:19.149441 rx_lastpass[1][0][11] = 36
4224 13:54:19.149864 rx_firspass[1][0][12] = 4
4225 13:54:19.153036 rx_lastpass[1][0][12] = 37
4226 13:54:19.156233 rx_firspass[1][0][13] = 3
4227 13:54:19.159649 rx_lastpass[1][0][13] = 35
4228 13:54:19.160071 rx_firspass[1][0][14] = 3
4229 13:54:19.163103 rx_lastpass[1][0][14] = 35
4230 13:54:19.166179 rx_firspass[1][0][15] = -1
4231 13:54:19.166605 rx_lastpass[1][0][15] = 31
4232 13:54:19.169316 rx_firspass[1][1][0] = 8
4233 13:54:19.173287 rx_lastpass[1][1][0] = 42
4234 13:54:19.176300 rx_firspass[1][1][1] = 6
4235 13:54:19.176718 rx_lastpass[1][1][1] = 41
4236 13:54:19.179587 rx_firspass[1][1][2] = 0
4237 13:54:19.183123 rx_lastpass[1][1][2] = 34
4238 13:54:19.183645 rx_firspass[1][1][3] = -2
4239 13:54:19.186172 rx_lastpass[1][1][3] = 32
4240 13:54:19.189810 rx_firspass[1][1][4] = 3
4241 13:54:19.190308 rx_lastpass[1][1][4] = 37
4242 13:54:19.192805 rx_firspass[1][1][5] = 7
4243 13:54:19.196370 rx_lastpass[1][1][5] = 40
4244 13:54:19.199497 rx_firspass[1][1][6] = 8
4245 13:54:19.199938 rx_lastpass[1][1][6] = 42
4246 13:54:19.202785 rx_firspass[1][1][7] = 3
4247 13:54:19.206232 rx_lastpass[1][1][7] = 38
4248 13:54:19.206785 rx_firspass[1][1][8] = 1
4249 13:54:19.209393 rx_lastpass[1][1][8] = 36
4250 13:54:19.213142 rx_firspass[1][1][9] = 1
4251 13:54:19.213609 rx_lastpass[1][1][9] = 36
4252 13:54:19.216205 rx_firspass[1][1][10] = 1
4253 13:54:19.219542 rx_lastpass[1][1][10] = 36
4254 13:54:19.223076 rx_firspass[1][1][11] = 3
4255 13:54:19.223780 rx_lastpass[1][1][11] = 36
4256 13:54:19.226226 rx_firspass[1][1][12] = 5
4257 13:54:19.229847 rx_lastpass[1][1][12] = 39
4258 13:54:19.230346 rx_firspass[1][1][13] = 4
4259 13:54:19.233351 rx_lastpass[1][1][13] = 38
4260 13:54:19.236308 rx_firspass[1][1][14] = 4
4261 13:54:19.239888 rx_lastpass[1][1][14] = 37
4262 13:54:19.240395 rx_firspass[1][1][15] = -1
4263 13:54:19.242994 rx_lastpass[1][1][15] = 33
4264 13:54:19.246319 dump params clk_delay
4265 13:54:19.246744 clk_delay[0] = 0
4266 13:54:19.249625 clk_delay[1] = 0
4267 13:54:19.250072 dump params dqs_delay
4268 13:54:19.252892 dqs_delay[0][0] = -1
4269 13:54:19.253347 dqs_delay[0][1] = 0
4270 13:54:19.256113 dqs_delay[1][0] = 0
4271 13:54:19.256539 dqs_delay[1][1] = 0
4272 13:54:19.259592 dump params delay_cell_unit = 753
4273 13:54:19.262980 dump source = 0x0
4274 13:54:19.266162 dump params frequency:1200
4275 13:54:19.266584 dump params rank number:2
4276 13:54:19.266914
4277 13:54:19.269509 dump params write leveling
4278 13:54:19.272932 write leveling[0][0][0] = 0x0
4279 13:54:19.276777 write leveling[0][0][1] = 0x0
4280 13:54:19.277328 write leveling[0][1][0] = 0x0
4281 13:54:19.279489 write leveling[0][1][1] = 0x0
4282 13:54:19.283252 write leveling[1][0][0] = 0x0
4283 13:54:19.286199 write leveling[1][0][1] = 0x0
4284 13:54:19.289642 write leveling[1][1][0] = 0x0
4285 13:54:19.290063 write leveling[1][1][1] = 0x0
4286 13:54:19.293074 dump params cbt_cs
4287 13:54:19.296233 cbt_cs[0][0] = 0x0
4288 13:54:19.296717 cbt_cs[0][1] = 0x0
4289 13:54:19.299576 cbt_cs[1][0] = 0x0
4290 13:54:19.300289 cbt_cs[1][1] = 0x0
4291 13:54:19.302866 dump params cbt_mr12
4292 13:54:19.303288 cbt_mr12[0][0] = 0x0
4293 13:54:19.306880 cbt_mr12[0][1] = 0x0
4294 13:54:19.307480 cbt_mr12[1][0] = 0x0
4295 13:54:19.309779 cbt_mr12[1][1] = 0x0
4296 13:54:19.310257 dump params tx window
4297 13:54:19.312781 tx_center_min[0][0][0] = 0
4298 13:54:19.316251 tx_center_max[0][0][0] = 0
4299 13:54:19.319723 tx_center_min[0][0][1] = 0
4300 13:54:19.320151 tx_center_max[0][0][1] = 0
4301 13:54:19.323024 tx_center_min[0][1][0] = 0
4302 13:54:19.326307 tx_center_max[0][1][0] = 0
4303 13:54:19.329550 tx_center_min[0][1][1] = 0
4304 13:54:19.329975 tx_center_max[0][1][1] = 0
4305 13:54:19.333109 tx_center_min[1][0][0] = 0
4306 13:54:19.336247 tx_center_max[1][0][0] = 0
4307 13:54:19.339765 tx_center_min[1][0][1] = 0
4308 13:54:19.340268 tx_center_max[1][0][1] = 0
4309 13:54:19.342773 tx_center_min[1][1][0] = 0
4310 13:54:19.346165 tx_center_max[1][1][0] = 0
4311 13:54:19.349527 tx_center_min[1][1][1] = 0
4312 13:54:19.349952 tx_center_max[1][1][1] = 0
4313 13:54:19.352788 dump params tx window
4314 13:54:19.356436 tx_win_center[0][0][0] = 0
4315 13:54:19.356858 tx_first_pass[0][0][0] = 0
4316 13:54:19.359607 tx_last_pass[0][0][0] = 0
4317 13:54:19.362923 tx_win_center[0][0][1] = 0
4318 13:54:19.366437 tx_first_pass[0][0][1] = 0
4319 13:54:19.366865 tx_last_pass[0][0][1] = 0
4320 13:54:19.369541 tx_win_center[0][0][2] = 0
4321 13:54:19.372930 tx_first_pass[0][0][2] = 0
4322 13:54:19.373394 tx_last_pass[0][0][2] = 0
4323 13:54:19.376354 tx_win_center[0][0][3] = 0
4324 13:54:19.379966 tx_first_pass[0][0][3] = 0
4325 13:54:19.383127 tx_last_pass[0][0][3] = 0
4326 13:54:19.383624 tx_win_center[0][0][4] = 0
4327 13:54:19.386328 tx_first_pass[0][0][4] = 0
4328 13:54:19.389546 tx_last_pass[0][0][4] = 0
4329 13:54:19.389970 tx_win_center[0][0][5] = 0
4330 13:54:19.393056 tx_first_pass[0][0][5] = 0
4331 13:54:19.396370 tx_last_pass[0][0][5] = 0
4332 13:54:19.399956 tx_win_center[0][0][6] = 0
4333 13:54:19.400472 tx_first_pass[0][0][6] = 0
4334 13:54:19.402983 tx_last_pass[0][0][6] = 0
4335 13:54:19.406406 tx_win_center[0][0][7] = 0
4336 13:54:19.410097 tx_first_pass[0][0][7] = 0
4337 13:54:19.410599 tx_last_pass[0][0][7] = 0
4338 13:54:19.413330 tx_win_center[0][0][8] = 0
4339 13:54:19.416441 tx_first_pass[0][0][8] = 0
4340 13:54:19.416943 tx_last_pass[0][0][8] = 0
4341 13:54:19.419818 tx_win_center[0][0][9] = 0
4342 13:54:19.423346 tx_first_pass[0][0][9] = 0
4343 13:54:19.426453 tx_last_pass[0][0][9] = 0
4344 13:54:19.426879 tx_win_center[0][0][10] = 0
4345 13:54:19.430192 tx_first_pass[0][0][10] = 0
4346 13:54:19.433690 tx_last_pass[0][0][10] = 0
4347 13:54:19.436659 tx_win_center[0][0][11] = 0
4348 13:54:19.437159 tx_first_pass[0][0][11] = 0
4349 13:54:19.439875 tx_last_pass[0][0][11] = 0
4350 13:54:19.443309 tx_win_center[0][0][12] = 0
4351 13:54:19.446651 tx_first_pass[0][0][12] = 0
4352 13:54:19.447075 tx_last_pass[0][0][12] = 0
4353 13:54:19.449832 tx_win_center[0][0][13] = 0
4354 13:54:19.453127 tx_first_pass[0][0][13] = 0
4355 13:54:19.456964 tx_last_pass[0][0][13] = 0
4356 13:54:19.457511 tx_win_center[0][0][14] = 0
4357 13:54:19.459770 tx_first_pass[0][0][14] = 0
4358 13:54:19.463513 tx_last_pass[0][0][14] = 0
4359 13:54:19.464019 tx_win_center[0][0][15] = 0
4360 13:54:19.466547 tx_first_pass[0][0][15] = 0
4361 13:54:19.470176 tx_last_pass[0][0][15] = 0
4362 13:54:19.473535 tx_win_center[0][1][0] = 0
4363 13:54:19.474051 tx_first_pass[0][1][0] = 0
4364 13:54:19.477053 tx_last_pass[0][1][0] = 0
4365 13:54:19.480246 tx_win_center[0][1][1] = 0
4366 13:54:19.483684 tx_first_pass[0][1][1] = 0
4367 13:54:19.484205 tx_last_pass[0][1][1] = 0
4368 13:54:19.486916 tx_win_center[0][1][2] = 0
4369 13:54:19.490122 tx_first_pass[0][1][2] = 0
4370 13:54:19.490541 tx_last_pass[0][1][2] = 0
4371 13:54:19.493550 tx_win_center[0][1][3] = 0
4372 13:54:19.496924 tx_first_pass[0][1][3] = 0
4373 13:54:19.500079 tx_last_pass[0][1][3] = 0
4374 13:54:19.500495 tx_win_center[0][1][4] = 0
4375 13:54:19.503303 tx_first_pass[0][1][4] = 0
4376 13:54:19.506728 tx_last_pass[0][1][4] = 0
4377 13:54:19.510035 tx_win_center[0][1][5] = 0
4378 13:54:19.510453 tx_first_pass[0][1][5] = 0
4379 13:54:19.513459 tx_last_pass[0][1][5] = 0
4380 13:54:19.516872 tx_win_center[0][1][6] = 0
4381 13:54:19.517161 tx_first_pass[0][1][6] = 0
4382 13:54:19.520147 tx_last_pass[0][1][6] = 0
4383 13:54:19.523344 tx_win_center[0][1][7] = 0
4384 13:54:19.526634 tx_first_pass[0][1][7] = 0
4385 13:54:19.527019 tx_last_pass[0][1][7] = 0
4386 13:54:19.529843 tx_win_center[0][1][8] = 0
4387 13:54:19.533825 tx_first_pass[0][1][8] = 0
4388 13:54:19.534322 tx_last_pass[0][1][8] = 0
4389 13:54:19.537208 tx_win_center[0][1][9] = 0
4390 13:54:19.540440 tx_first_pass[0][1][9] = 0
4391 13:54:19.543552 tx_last_pass[0][1][9] = 0
4392 13:54:19.543971 tx_win_center[0][1][10] = 0
4393 13:54:19.546752 tx_first_pass[0][1][10] = 0
4394 13:54:19.550153 tx_last_pass[0][1][10] = 0
4395 13:54:19.553460 tx_win_center[0][1][11] = 0
4396 13:54:19.553909 tx_first_pass[0][1][11] = 0
4397 13:54:19.556803 tx_last_pass[0][1][11] = 0
4398 13:54:19.560176 tx_win_center[0][1][12] = 0
4399 13:54:19.563517 tx_first_pass[0][1][12] = 0
4400 13:54:19.563933 tx_last_pass[0][1][12] = 0
4401 13:54:19.567070 tx_win_center[0][1][13] = 0
4402 13:54:19.570859 tx_first_pass[0][1][13] = 0
4403 13:54:19.573850 tx_last_pass[0][1][13] = 0
4404 13:54:19.574353 tx_win_center[0][1][14] = 0
4405 13:54:19.577321 tx_first_pass[0][1][14] = 0
4406 13:54:19.580573 tx_last_pass[0][1][14] = 0
4407 13:54:19.583589 tx_win_center[0][1][15] = 0
4408 13:54:19.584009 tx_first_pass[0][1][15] = 0
4409 13:54:19.587307 tx_last_pass[0][1][15] = 0
4410 13:54:19.590456 tx_win_center[1][0][0] = 0
4411 13:54:19.593979 tx_first_pass[1][0][0] = 0
4412 13:54:19.594500 tx_last_pass[1][0][0] = 0
4413 13:54:19.597114 tx_win_center[1][0][1] = 0
4414 13:54:19.600743 tx_first_pass[1][0][1] = 0
4415 13:54:19.601327 tx_last_pass[1][0][1] = 0
4416 13:54:19.603861 tx_win_center[1][0][2] = 0
4417 13:54:19.607267 tx_first_pass[1][0][2] = 0
4418 13:54:19.610436 tx_last_pass[1][0][2] = 0
4419 13:54:19.610854 tx_win_center[1][0][3] = 0
4420 13:54:19.613755 tx_first_pass[1][0][3] = 0
4421 13:54:19.617204 tx_last_pass[1][0][3] = 0
4422 13:54:19.617722 tx_win_center[1][0][4] = 0
4423 13:54:19.620853 tx_first_pass[1][0][4] = 0
4424 13:54:19.623681 tx_last_pass[1][0][4] = 0
4425 13:54:19.627174 tx_win_center[1][0][5] = 0
4426 13:54:19.627597 tx_first_pass[1][0][5] = 0
4427 13:54:19.630613 tx_last_pass[1][0][5] = 0
4428 13:54:19.633907 tx_win_center[1][0][6] = 0
4429 13:54:19.637366 tx_first_pass[1][0][6] = 0
4430 13:54:19.637863 tx_last_pass[1][0][6] = 0
4431 13:54:19.640920 tx_win_center[1][0][7] = 0
4432 13:54:19.644040 tx_first_pass[1][0][7] = 0
4433 13:54:19.644535 tx_last_pass[1][0][7] = 0
4434 13:54:19.647499 tx_win_center[1][0][8] = 0
4435 13:54:19.650552 tx_first_pass[1][0][8] = 0
4436 13:54:19.654351 tx_last_pass[1][0][8] = 0
4437 13:54:19.654848 tx_win_center[1][0][9] = 0
4438 13:54:19.657815 tx_first_pass[1][0][9] = 0
4439 13:54:19.661062 tx_last_pass[1][0][9] = 0
4440 13:54:19.661607 tx_win_center[1][0][10] = 0
4441 13:54:19.663985 tx_first_pass[1][0][10] = 0
4442 13:54:19.667307 tx_last_pass[1][0][10] = 0
4443 13:54:19.670681 tx_win_center[1][0][11] = 0
4444 13:54:19.671179 tx_first_pass[1][0][11] = 0
4445 13:54:19.674122 tx_last_pass[1][0][11] = 0
4446 13:54:19.677526 tx_win_center[1][0][12] = 0
4447 13:54:19.680792 tx_first_pass[1][0][12] = 0
4448 13:54:19.681342 tx_last_pass[1][0][12] = 0
4449 13:54:19.683901 tx_win_center[1][0][13] = 0
4450 13:54:19.687668 tx_first_pass[1][0][13] = 0
4451 13:54:19.690613 tx_last_pass[1][0][13] = 0
4452 13:54:19.691122 tx_win_center[1][0][14] = 0
4453 13:54:19.694088 tx_first_pass[1][0][14] = 0
4454 13:54:19.697529 tx_last_pass[1][0][14] = 0
4455 13:54:19.700885 tx_win_center[1][0][15] = 0
4456 13:54:19.701511 tx_first_pass[1][0][15] = 0
4457 13:54:19.704219 tx_last_pass[1][0][15] = 0
4458 13:54:19.707307 tx_win_center[1][1][0] = 0
4459 13:54:19.710770 tx_first_pass[1][1][0] = 0
4460 13:54:19.711271 tx_last_pass[1][1][0] = 0
4461 13:54:19.714048 tx_win_center[1][1][1] = 0
4462 13:54:19.717487 tx_first_pass[1][1][1] = 0
4463 13:54:19.720723 tx_last_pass[1][1][1] = 0
4464 13:54:19.721285 tx_win_center[1][1][2] = 0
4465 13:54:19.724264 tx_first_pass[1][1][2] = 0
4466 13:54:19.727265 tx_last_pass[1][1][2] = 0
4467 13:54:19.727688 tx_win_center[1][1][3] = 0
4468 13:54:19.730695 tx_first_pass[1][1][3] = 0
4469 13:54:19.734138 tx_last_pass[1][1][3] = 0
4470 13:54:19.737528 tx_win_center[1][1][4] = 0
4471 13:54:19.738030 tx_first_pass[1][1][4] = 0
4472 13:54:19.741031 tx_last_pass[1][1][4] = 0
4473 13:54:19.743931 tx_win_center[1][1][5] = 0
4474 13:54:19.747411 tx_first_pass[1][1][5] = 0
4475 13:54:19.747917 tx_last_pass[1][1][5] = 0
4476 13:54:19.750617 tx_win_center[1][1][6] = 0
4477 13:54:19.754058 tx_first_pass[1][1][6] = 0
4478 13:54:19.754487 tx_last_pass[1][1][6] = 0
4479 13:54:19.757904 tx_win_center[1][1][7] = 0
4480 13:54:19.760733 tx_first_pass[1][1][7] = 0
4481 13:54:19.764156 tx_last_pass[1][1][7] = 0
4482 13:54:19.764585 tx_win_center[1][1][8] = 0
4483 13:54:19.767362 tx_first_pass[1][1][8] = 0
4484 13:54:19.770770 tx_last_pass[1][1][8] = 0
4485 13:54:19.771192 tx_win_center[1][1][9] = 0
4486 13:54:19.774149 tx_first_pass[1][1][9] = 0
4487 13:54:19.777573 tx_last_pass[1][1][9] = 0
4488 13:54:19.780743 tx_win_center[1][1][10] = 0
4489 13:54:19.781167 tx_first_pass[1][1][10] = 0
4490 13:54:19.784312 tx_last_pass[1][1][10] = 0
4491 13:54:19.787320 tx_win_center[1][1][11] = 0
4492 13:54:19.791357 tx_first_pass[1][1][11] = 0
4493 13:54:19.791857 tx_last_pass[1][1][11] = 0
4494 13:54:19.794030 tx_win_center[1][1][12] = 0
4495 13:54:19.797905 tx_first_pass[1][1][12] = 0
4496 13:54:19.801075 tx_last_pass[1][1][12] = 0
4497 13:54:19.801687 tx_win_center[1][1][13] = 0
4498 13:54:19.804376 tx_first_pass[1][1][13] = 0
4499 13:54:19.807440 tx_last_pass[1][1][13] = 0
4500 13:54:19.810948 tx_win_center[1][1][14] = 0
4501 13:54:19.811453 tx_first_pass[1][1][14] = 0
4502 13:54:19.814367 tx_last_pass[1][1][14] = 0
4503 13:54:19.817557 tx_win_center[1][1][15] = 0
4504 13:54:19.820772 tx_first_pass[1][1][15] = 0
4505 13:54:19.821307 tx_last_pass[1][1][15] = 0
4506 13:54:19.824455 dump params rx window
4507 13:54:19.827546 rx_firspass[0][0][0] = 0
4508 13:54:19.827971 rx_lastpass[0][0][0] = 0
4509 13:54:19.831363 rx_firspass[0][0][1] = 0
4510 13:54:19.834048 rx_lastpass[0][0][1] = 0
4511 13:54:19.834473 rx_firspass[0][0][2] = 0
4512 13:54:19.837660 rx_lastpass[0][0][2] = 0
4513 13:54:19.841029 rx_firspass[0][0][3] = 0
4514 13:54:19.841583 rx_lastpass[0][0][3] = 0
4515 13:54:19.844215 rx_firspass[0][0][4] = 0
4516 13:54:19.847669 rx_lastpass[0][0][4] = 0
4517 13:54:19.848174 rx_firspass[0][0][5] = 0
4518 13:54:19.850963 rx_lastpass[0][0][5] = 0
4519 13:54:19.854019 rx_firspass[0][0][6] = 0
4520 13:54:19.857569 rx_lastpass[0][0][6] = 0
4521 13:54:19.858073 rx_firspass[0][0][7] = 0
4522 13:54:19.860936 rx_lastpass[0][0][7] = 0
4523 13:54:19.864459 rx_firspass[0][0][8] = 0
4524 13:54:19.864881 rx_lastpass[0][0][8] = 0
4525 13:54:19.867372 rx_firspass[0][0][9] = 0
4526 13:54:19.871015 rx_lastpass[0][0][9] = 0
4527 13:54:19.871552 rx_firspass[0][0][10] = 0
4528 13:54:19.874339 rx_lastpass[0][0][10] = 0
4529 13:54:19.877911 rx_firspass[0][0][11] = 0
4530 13:54:19.878439 rx_lastpass[0][0][11] = 0
4531 13:54:19.881150 rx_firspass[0][0][12] = 0
4532 13:54:19.884319 rx_lastpass[0][0][12] = 0
4533 13:54:19.887584 rx_firspass[0][0][13] = 0
4534 13:54:19.888009 rx_lastpass[0][0][13] = 0
4535 13:54:19.891202 rx_firspass[0][0][14] = 0
4536 13:54:19.894384 rx_lastpass[0][0][14] = 0
4537 13:54:19.894971 rx_firspass[0][0][15] = 0
4538 13:54:19.897932 rx_lastpass[0][0][15] = 0
4539 13:54:19.901083 rx_firspass[0][1][0] = 0
4540 13:54:19.901788 rx_lastpass[0][1][0] = 0
4541 13:54:19.904483 rx_firspass[0][1][1] = 0
4542 13:54:19.907589 rx_lastpass[0][1][1] = 0
4543 13:54:19.911140 rx_firspass[0][1][2] = 0
4544 13:54:19.911636 rx_lastpass[0][1][2] = 0
4545 13:54:19.914519 rx_firspass[0][1][3] = 0
4546 13:54:19.917604 rx_lastpass[0][1][3] = 0
4547 13:54:19.918028 rx_firspass[0][1][4] = 0
4548 13:54:19.921333 rx_lastpass[0][1][4] = 0
4549 13:54:19.924909 rx_firspass[0][1][5] = 0
4550 13:54:19.925450 rx_lastpass[0][1][5] = 0
4551 13:54:19.927835 rx_firspass[0][1][6] = 0
4552 13:54:19.931273 rx_lastpass[0][1][6] = 0
4553 13:54:19.931776 rx_firspass[0][1][7] = 0
4554 13:54:19.934719 rx_lastpass[0][1][7] = 0
4555 13:54:19.937668 rx_firspass[0][1][8] = 0
4556 13:54:19.938087 rx_lastpass[0][1][8] = 0
4557 13:54:19.941035 rx_firspass[0][1][9] = 0
4558 13:54:19.944784 rx_lastpass[0][1][9] = 0
4559 13:54:19.945335 rx_firspass[0][1][10] = 0
4560 13:54:19.948018 rx_lastpass[0][1][10] = 0
4561 13:54:19.951079 rx_firspass[0][1][11] = 0
4562 13:54:19.954513 rx_lastpass[0][1][11] = 0
4563 13:54:19.955008 rx_firspass[0][1][12] = 0
4564 13:54:19.957927 rx_lastpass[0][1][12] = 0
4565 13:54:19.961327 rx_firspass[0][1][13] = 0
4566 13:54:19.961837 rx_lastpass[0][1][13] = 0
4567 13:54:19.964405 rx_firspass[0][1][14] = 0
4568 13:54:19.967837 rx_lastpass[0][1][14] = 0
4569 13:54:19.971499 rx_firspass[0][1][15] = 0
4570 13:54:19.972001 rx_lastpass[0][1][15] = 0
4571 13:54:19.974342 rx_firspass[1][0][0] = 0
4572 13:54:19.977874 rx_lastpass[1][0][0] = 0
4573 13:54:19.978416 rx_firspass[1][0][1] = 0
4574 13:54:19.981298 rx_lastpass[1][0][1] = 0
4575 13:54:19.984497 rx_firspass[1][0][2] = 0
4576 13:54:19.985018 rx_lastpass[1][0][2] = 0
4577 13:54:19.987785 rx_firspass[1][0][3] = 0
4578 13:54:19.991055 rx_lastpass[1][0][3] = 0
4579 13:54:19.991561 rx_firspass[1][0][4] = 0
4580 13:54:19.994382 rx_lastpass[1][0][4] = 0
4581 13:54:19.998273 rx_firspass[1][0][5] = 0
4582 13:54:20.001468 rx_lastpass[1][0][5] = 0
4583 13:54:20.002034 rx_firspass[1][0][6] = 0
4584 13:54:20.004736 rx_lastpass[1][0][6] = 0
4585 13:54:20.008085 rx_firspass[1][0][7] = 0
4586 13:54:20.008503 rx_lastpass[1][0][7] = 0
4587 13:54:20.011307 rx_firspass[1][0][8] = 0
4588 13:54:20.014189 rx_lastpass[1][0][8] = 0
4589 13:54:20.014606 rx_firspass[1][0][9] = 0
4590 13:54:20.017613 rx_lastpass[1][0][9] = 0
4591 13:54:20.020964 rx_firspass[1][0][10] = 0
4592 13:54:20.021519 rx_lastpass[1][0][10] = 0
4593 13:54:20.024750 rx_firspass[1][0][11] = 0
4594 13:54:20.028053 rx_lastpass[1][0][11] = 0
4595 13:54:20.031435 rx_firspass[1][0][12] = 0
4596 13:54:20.031933 rx_lastpass[1][0][12] = 0
4597 13:54:20.034397 rx_firspass[1][0][13] = 0
4598 13:54:20.037908 rx_lastpass[1][0][13] = 0
4599 13:54:20.038327 rx_firspass[1][0][14] = 0
4600 13:54:20.041219 rx_lastpass[1][0][14] = 0
4601 13:54:20.044655 rx_firspass[1][0][15] = 0
4602 13:54:20.047742 rx_lastpass[1][0][15] = 0
4603 13:54:20.048160 rx_firspass[1][1][0] = 0
4604 13:54:20.051249 rx_lastpass[1][1][0] = 0
4605 13:54:20.054759 rx_firspass[1][1][1] = 0
4606 13:54:20.055258 rx_lastpass[1][1][1] = 0
4607 13:54:20.058069 rx_firspass[1][1][2] = 0
4608 13:54:20.061285 rx_lastpass[1][1][2] = 0
4609 13:54:20.061706 rx_firspass[1][1][3] = 0
4610 13:54:20.064645 rx_lastpass[1][1][3] = 0
4611 13:54:20.067950 rx_firspass[1][1][4] = 0
4612 13:54:20.068369 rx_lastpass[1][1][4] = 0
4613 13:54:20.071522 rx_firspass[1][1][5] = 0
4614 13:54:20.074710 rx_lastpass[1][1][5] = 0
4615 13:54:20.075212 rx_firspass[1][1][6] = 0
4616 13:54:20.078308 rx_lastpass[1][1][6] = 0
4617 13:54:20.081446 rx_firspass[1][1][7] = 0
4618 13:54:20.081946 rx_lastpass[1][1][7] = 0
4619 13:54:20.085068 rx_firspass[1][1][8] = 0
4620 13:54:20.088442 rx_lastpass[1][1][8] = 0
4621 13:54:20.088946 rx_firspass[1][1][9] = 0
4622 13:54:20.091529 rx_lastpass[1][1][9] = 0
4623 13:54:20.095119 rx_firspass[1][1][10] = 0
4624 13:54:20.098687 rx_lastpass[1][1][10] = 0
4625 13:54:20.099225 rx_firspass[1][1][11] = 0
4626 13:54:20.101508 rx_lastpass[1][1][11] = 0
4627 13:54:20.104899 rx_firspass[1][1][12] = 0
4628 13:54:20.105437 rx_lastpass[1][1][12] = 0
4629 13:54:20.108125 rx_firspass[1][1][13] = 0
4630 13:54:20.111418 rx_lastpass[1][1][13] = 0
4631 13:54:20.114906 rx_firspass[1][1][14] = 0
4632 13:54:20.115417 rx_lastpass[1][1][14] = 0
4633 13:54:20.118006 rx_firspass[1][1][15] = 0
4634 13:54:20.121708 rx_lastpass[1][1][15] = 0
4635 13:54:20.122222 dump params clk_delay
4636 13:54:20.124787 clk_delay[0] = 0
4637 13:54:20.125345 clk_delay[1] = 0
4638 13:54:20.128051 dump params dqs_delay
4639 13:54:20.128470 dqs_delay[0][0] = 0
4640 13:54:20.131776 dqs_delay[0][1] = 0
4641 13:54:20.132269 dqs_delay[1][0] = 0
4642 13:54:20.134665 dqs_delay[1][1] = 0
4643 13:54:20.138040 dump params delay_cell_unit = 753
4644 13:54:20.138599 dump source = 0x0
4645 13:54:20.141681 dump params frequency:800
4646 13:54:20.144898 dump params rank number:2
4647 13:54:20.145426
4648 13:54:20.148066 dump params write leveling
4649 13:54:20.148497 write leveling[0][0][0] = 0x0
4650 13:54:20.151409 write leveling[0][0][1] = 0x0
4651 13:54:20.154439 write leveling[0][1][0] = 0x0
4652 13:54:20.158142 write leveling[0][1][1] = 0x0
4653 13:54:20.161614 write leveling[1][0][0] = 0x0
4654 13:54:20.162124 write leveling[1][0][1] = 0x0
4655 13:54:20.164799 write leveling[1][1][0] = 0x0
4656 13:54:20.168029 write leveling[1][1][1] = 0x0
4657 13:54:20.171792 dump params cbt_cs
4658 13:54:20.172335 cbt_cs[0][0] = 0x0
4659 13:54:20.174593 cbt_cs[0][1] = 0x0
4660 13:54:20.175098 cbt_cs[1][0] = 0x0
4661 13:54:20.178177 cbt_cs[1][1] = 0x0
4662 13:54:20.178684 dump params cbt_mr12
4663 13:54:20.181455 cbt_mr12[0][0] = 0x0
4664 13:54:20.181959 cbt_mr12[0][1] = 0x0
4665 13:54:20.184750 cbt_mr12[1][0] = 0x0
4666 13:54:20.185297 cbt_mr12[1][1] = 0x0
4667 13:54:20.188165 dump params tx window
4668 13:54:20.191286 tx_center_min[0][0][0] = 0
4669 13:54:20.194871 tx_center_max[0][0][0] = 0
4670 13:54:20.195414 tx_center_min[0][0][1] = 0
4671 13:54:20.198098 tx_center_max[0][0][1] = 0
4672 13:54:20.201435 tx_center_min[0][1][0] = 0
4673 13:54:20.201868 tx_center_max[0][1][0] = 0
4674 13:54:20.204818 tx_center_min[0][1][1] = 0
4675 13:54:20.208115 tx_center_max[0][1][1] = 0
4676 13:54:20.211502 tx_center_min[1][0][0] = 0
4677 13:54:20.212028 tx_center_max[1][0][0] = 0
4678 13:54:20.214795 tx_center_min[1][0][1] = 0
4679 13:54:20.217903 tx_center_max[1][0][1] = 0
4680 13:54:20.221154 tx_center_min[1][1][0] = 0
4681 13:54:20.221691 tx_center_max[1][1][0] = 0
4682 13:54:20.224846 tx_center_min[1][1][1] = 0
4683 13:54:20.227846 tx_center_max[1][1][1] = 0
4684 13:54:20.228316 dump params tx window
4685 13:54:20.231419 tx_win_center[0][0][0] = 0
4686 13:54:20.234633 tx_first_pass[0][0][0] = 0
4687 13:54:20.237990 tx_last_pass[0][0][0] = 0
4688 13:54:20.238512 tx_win_center[0][0][1] = 0
4689 13:54:20.241467 tx_first_pass[0][0][1] = 0
4690 13:54:20.244612 tx_last_pass[0][0][1] = 0
4691 13:54:20.248058 tx_win_center[0][0][2] = 0
4692 13:54:20.248573 tx_first_pass[0][0][2] = 0
4693 13:54:20.251112 tx_last_pass[0][0][2] = 0
4694 13:54:20.254441 tx_win_center[0][0][3] = 0
4695 13:54:20.254870 tx_first_pass[0][0][3] = 0
4696 13:54:20.258207 tx_last_pass[0][0][3] = 0
4697 13:54:20.261617 tx_win_center[0][0][4] = 0
4698 13:54:20.264735 tx_first_pass[0][0][4] = 0
4699 13:54:20.265270 tx_last_pass[0][0][4] = 0
4700 13:54:20.267718 tx_win_center[0][0][5] = 0
4701 13:54:20.271489 tx_first_pass[0][0][5] = 0
4702 13:54:20.272004 tx_last_pass[0][0][5] = 0
4703 13:54:20.274653 tx_win_center[0][0][6] = 0
4704 13:54:20.278084 tx_first_pass[0][0][6] = 0
4705 13:54:20.281346 tx_last_pass[0][0][6] = 0
4706 13:54:20.281862 tx_win_center[0][0][7] = 0
4707 13:54:20.284879 tx_first_pass[0][0][7] = 0
4708 13:54:20.288128 tx_last_pass[0][0][7] = 0
4709 13:54:20.288639 tx_win_center[0][0][8] = 0
4710 13:54:20.291402 tx_first_pass[0][0][8] = 0
4711 13:54:20.295054 tx_last_pass[0][0][8] = 0
4712 13:54:20.298049 tx_win_center[0][0][9] = 0
4713 13:54:20.298475 tx_first_pass[0][0][9] = 0
4714 13:54:20.301216 tx_last_pass[0][0][9] = 0
4715 13:54:20.304786 tx_win_center[0][0][10] = 0
4716 13:54:20.308574 tx_first_pass[0][0][10] = 0
4717 13:54:20.309076 tx_last_pass[0][0][10] = 0
4718 13:54:20.311333 tx_win_center[0][0][11] = 0
4719 13:54:20.315347 tx_first_pass[0][0][11] = 0
4720 13:54:20.318058 tx_last_pass[0][0][11] = 0
4721 13:54:20.318489 tx_win_center[0][0][12] = 0
4722 13:54:20.321400 tx_first_pass[0][0][12] = 0
4723 13:54:20.325033 tx_last_pass[0][0][12] = 0
4724 13:54:20.328264 tx_win_center[0][0][13] = 0
4725 13:54:20.328783 tx_first_pass[0][0][13] = 0
4726 13:54:20.331485 tx_last_pass[0][0][13] = 0
4727 13:54:20.334945 tx_win_center[0][0][14] = 0
4728 13:54:20.338205 tx_first_pass[0][0][14] = 0
4729 13:54:20.338713 tx_last_pass[0][0][14] = 0
4730 13:54:20.341656 tx_win_center[0][0][15] = 0
4731 13:54:20.345030 tx_first_pass[0][0][15] = 0
4732 13:54:20.348297 tx_last_pass[0][0][15] = 0
4733 13:54:20.348727 tx_win_center[0][1][0] = 0
4734 13:54:20.351767 tx_first_pass[0][1][0] = 0
4735 13:54:20.354957 tx_last_pass[0][1][0] = 0
4736 13:54:20.355390 tx_win_center[0][1][1] = 0
4737 13:54:20.358194 tx_first_pass[0][1][1] = 0
4738 13:54:20.361410 tx_last_pass[0][1][1] = 0
4739 13:54:20.365178 tx_win_center[0][1][2] = 0
4740 13:54:20.365726 tx_first_pass[0][1][2] = 0
4741 13:54:20.368537 tx_last_pass[0][1][2] = 0
4742 13:54:20.371802 tx_win_center[0][1][3] = 0
4743 13:54:20.372229 tx_first_pass[0][1][3] = 0
4744 13:54:20.374981 tx_last_pass[0][1][3] = 0
4745 13:54:20.378420 tx_win_center[0][1][4] = 0
4746 13:54:20.381680 tx_first_pass[0][1][4] = 0
4747 13:54:20.382111 tx_last_pass[0][1][4] = 0
4748 13:54:20.385366 tx_win_center[0][1][5] = 0
4749 13:54:20.388722 tx_first_pass[0][1][5] = 0
4750 13:54:20.389270 tx_last_pass[0][1][5] = 0
4751 13:54:20.392038 tx_win_center[0][1][6] = 0
4752 13:54:20.395158 tx_first_pass[0][1][6] = 0
4753 13:54:20.398419 tx_last_pass[0][1][6] = 0
4754 13:54:20.398845 tx_win_center[0][1][7] = 0
4755 13:54:20.401732 tx_first_pass[0][1][7] = 0
4756 13:54:20.405387 tx_last_pass[0][1][7] = 0
4757 13:54:20.408513 tx_win_center[0][1][8] = 0
4758 13:54:20.408937 tx_first_pass[0][1][8] = 0
4759 13:54:20.412144 tx_last_pass[0][1][8] = 0
4760 13:54:20.415341 tx_win_center[0][1][9] = 0
4761 13:54:20.415768 tx_first_pass[0][1][9] = 0
4762 13:54:20.418639 tx_last_pass[0][1][9] = 0
4763 13:54:20.422077 tx_win_center[0][1][10] = 0
4764 13:54:20.425191 tx_first_pass[0][1][10] = 0
4765 13:54:20.425939 tx_last_pass[0][1][10] = 0
4766 13:54:20.428754 tx_win_center[0][1][11] = 0
4767 13:54:20.431908 tx_first_pass[0][1][11] = 0
4768 13:54:20.435555 tx_last_pass[0][1][11] = 0
4769 13:54:20.436049 tx_win_center[0][1][12] = 0
4770 13:54:20.439017 tx_first_pass[0][1][12] = 0
4771 13:54:20.442108 tx_last_pass[0][1][12] = 0
4772 13:54:20.445326 tx_win_center[0][1][13] = 0
4773 13:54:20.445892 tx_first_pass[0][1][13] = 0
4774 13:54:20.448747 tx_last_pass[0][1][13] = 0
4775 13:54:20.451940 tx_win_center[0][1][14] = 0
4776 13:54:20.455474 tx_first_pass[0][1][14] = 0
4777 13:54:20.455954 tx_last_pass[0][1][14] = 0
4778 13:54:20.458779 tx_win_center[0][1][15] = 0
4779 13:54:20.462182 tx_first_pass[0][1][15] = 0
4780 13:54:20.465440 tx_last_pass[0][1][15] = 0
4781 13:54:20.465959 tx_win_center[1][0][0] = 0
4782 13:54:20.468736 tx_first_pass[1][0][0] = 0
4783 13:54:20.472263 tx_last_pass[1][0][0] = 0
4784 13:54:20.472985 tx_win_center[1][0][1] = 0
4785 13:54:20.475435 tx_first_pass[1][0][1] = 0
4786 13:54:20.478795 tx_last_pass[1][0][1] = 0
4787 13:54:20.482198 tx_win_center[1][0][2] = 0
4788 13:54:20.482627 tx_first_pass[1][0][2] = 0
4789 13:54:20.485716 tx_last_pass[1][0][2] = 0
4790 13:54:20.488673 tx_win_center[1][0][3] = 0
4791 13:54:20.492309 tx_first_pass[1][0][3] = 0
4792 13:54:20.492704 tx_last_pass[1][0][3] = 0
4793 13:54:20.496040 tx_win_center[1][0][4] = 0
4794 13:54:20.498898 tx_first_pass[1][0][4] = 0
4795 13:54:20.499289 tx_last_pass[1][0][4] = 0
4796 13:54:20.502052 tx_win_center[1][0][5] = 0
4797 13:54:20.505449 tx_first_pass[1][0][5] = 0
4798 13:54:20.508981 tx_last_pass[1][0][5] = 0
4799 13:54:20.509523 tx_win_center[1][0][6] = 0
4800 13:54:20.512167 tx_first_pass[1][0][6] = 0
4801 13:54:20.516264 tx_last_pass[1][0][6] = 0
4802 13:54:20.516771 tx_win_center[1][0][7] = 0
4803 13:54:20.518883 tx_first_pass[1][0][7] = 0
4804 13:54:20.522512 tx_last_pass[1][0][7] = 0
4805 13:54:20.525616 tx_win_center[1][0][8] = 0
4806 13:54:20.526045 tx_first_pass[1][0][8] = 0
4807 13:54:20.528605 tx_last_pass[1][0][8] = 0
4808 13:54:20.532048 tx_win_center[1][0][9] = 0
4809 13:54:20.535753 tx_first_pass[1][0][9] = 0
4810 13:54:20.536431 tx_last_pass[1][0][9] = 0
4811 13:54:20.539123 tx_win_center[1][0][10] = 0
4812 13:54:20.542596 tx_first_pass[1][0][10] = 0
4813 13:54:20.545681 tx_last_pass[1][0][10] = 0
4814 13:54:20.546187 tx_win_center[1][0][11] = 0
4815 13:54:20.549186 tx_first_pass[1][0][11] = 0
4816 13:54:20.551896 tx_last_pass[1][0][11] = 0
4817 13:54:20.555342 tx_win_center[1][0][12] = 0
4818 13:54:20.555771 tx_first_pass[1][0][12] = 0
4819 13:54:20.558757 tx_last_pass[1][0][12] = 0
4820 13:54:20.562220 tx_win_center[1][0][13] = 0
4821 13:54:20.565493 tx_first_pass[1][0][13] = 0
4822 13:54:20.566003 tx_last_pass[1][0][13] = 0
4823 13:54:20.568590 tx_win_center[1][0][14] = 0
4824 13:54:20.572231 tx_first_pass[1][0][14] = 0
4825 13:54:20.575480 tx_last_pass[1][0][14] = 0
4826 13:54:20.575987 tx_win_center[1][0][15] = 0
4827 13:54:20.578813 tx_first_pass[1][0][15] = 0
4828 13:54:20.582063 tx_last_pass[1][0][15] = 0
4829 13:54:20.585203 tx_win_center[1][1][0] = 0
4830 13:54:20.585661 tx_first_pass[1][1][0] = 0
4831 13:54:20.588379 tx_last_pass[1][1][0] = 0
4832 13:54:20.591995 tx_win_center[1][1][1] = 0
4833 13:54:20.592501 tx_first_pass[1][1][1] = 0
4834 13:54:20.595353 tx_last_pass[1][1][1] = 0
4835 13:54:20.598549 tx_win_center[1][1][2] = 0
4836 13:54:20.601941 tx_first_pass[1][1][2] = 0
4837 13:54:20.602455 tx_last_pass[1][1][2] = 0
4838 13:54:20.605325 tx_win_center[1][1][3] = 0
4839 13:54:20.609055 tx_first_pass[1][1][3] = 0
4840 13:54:20.611951 tx_last_pass[1][1][3] = 0
4841 13:54:20.612511 tx_win_center[1][1][4] = 0
4842 13:54:20.615409 tx_first_pass[1][1][4] = 0
4843 13:54:20.618753 tx_last_pass[1][1][4] = 0
4844 13:54:20.619263 tx_win_center[1][1][5] = 0
4845 13:54:20.621905 tx_first_pass[1][1][5] = 0
4846 13:54:20.625010 tx_last_pass[1][1][5] = 0
4847 13:54:20.628630 tx_win_center[1][1][6] = 0
4848 13:54:20.629188 tx_first_pass[1][1][6] = 0
4849 13:54:20.631939 tx_last_pass[1][1][6] = 0
4850 13:54:20.635363 tx_win_center[1][1][7] = 0
4851 13:54:20.638539 tx_first_pass[1][1][7] = 0
4852 13:54:20.638965 tx_last_pass[1][1][7] = 0
4853 13:54:20.642013 tx_win_center[1][1][8] = 0
4854 13:54:20.645351 tx_first_pass[1][1][8] = 0
4855 13:54:20.645856 tx_last_pass[1][1][8] = 0
4856 13:54:20.648898 tx_win_center[1][1][9] = 0
4857 13:54:20.651681 tx_first_pass[1][1][9] = 0
4858 13:54:20.655218 tx_last_pass[1][1][9] = 0
4859 13:54:20.655646 tx_win_center[1][1][10] = 0
4860 13:54:20.658319 tx_first_pass[1][1][10] = 0
4861 13:54:20.661946 tx_last_pass[1][1][10] = 0
4862 13:54:20.665347 tx_win_center[1][1][11] = 0
4863 13:54:20.665854 tx_first_pass[1][1][11] = 0
4864 13:54:20.668492 tx_last_pass[1][1][11] = 0
4865 13:54:20.672088 tx_win_center[1][1][12] = 0
4866 13:54:20.675235 tx_first_pass[1][1][12] = 0
4867 13:54:20.675747 tx_last_pass[1][1][12] = 0
4868 13:54:20.678802 tx_win_center[1][1][13] = 0
4869 13:54:20.681967 tx_first_pass[1][1][13] = 0
4870 13:54:20.685382 tx_last_pass[1][1][13] = 0
4871 13:54:20.685904 tx_win_center[1][1][14] = 0
4872 13:54:20.688638 tx_first_pass[1][1][14] = 0
4873 13:54:20.692030 tx_last_pass[1][1][14] = 0
4874 13:54:20.695490 tx_win_center[1][1][15] = 0
4875 13:54:20.696020 tx_first_pass[1][1][15] = 0
4876 13:54:20.698782 tx_last_pass[1][1][15] = 0
4877 13:54:20.701942 dump params rx window
4878 13:54:20.702439 rx_firspass[0][0][0] = 0
4879 13:54:20.705067 rx_lastpass[0][0][0] = 0
4880 13:54:20.708749 rx_firspass[0][0][1] = 0
4881 13:54:20.709306 rx_lastpass[0][0][1] = 0
4882 13:54:20.712148 rx_firspass[0][0][2] = 0
4883 13:54:20.715211 rx_lastpass[0][0][2] = 0
4884 13:54:20.715710 rx_firspass[0][0][3] = 0
4885 13:54:20.718939 rx_lastpass[0][0][3] = 0
4886 13:54:20.721686 rx_firspass[0][0][4] = 0
4887 13:54:20.725170 rx_lastpass[0][0][4] = 0
4888 13:54:20.725725 rx_firspass[0][0][5] = 0
4889 13:54:20.728789 rx_lastpass[0][0][5] = 0
4890 13:54:20.732224 rx_firspass[0][0][6] = 0
4891 13:54:20.732757 rx_lastpass[0][0][6] = 0
4892 13:54:20.735262 rx_firspass[0][0][7] = 0
4893 13:54:20.738584 rx_lastpass[0][0][7] = 0
4894 13:54:20.739014 rx_firspass[0][0][8] = 0
4895 13:54:20.742036 rx_lastpass[0][0][8] = 0
4896 13:54:20.745181 rx_firspass[0][0][9] = 0
4897 13:54:20.745655 rx_lastpass[0][0][9] = 0
4898 13:54:20.748968 rx_firspass[0][0][10] = 0
4899 13:54:20.752148 rx_lastpass[0][0][10] = 0
4900 13:54:20.752577 rx_firspass[0][0][11] = 0
4901 13:54:20.755154 rx_lastpass[0][0][11] = 0
4902 13:54:20.758808 rx_firspass[0][0][12] = 0
4903 13:54:20.762253 rx_lastpass[0][0][12] = 0
4904 13:54:20.762761 rx_firspass[0][0][13] = 0
4905 13:54:20.765377 rx_lastpass[0][0][13] = 0
4906 13:54:20.768482 rx_firspass[0][0][14] = 0
4907 13:54:20.768914 rx_lastpass[0][0][14] = 0
4908 13:54:20.772160 rx_firspass[0][0][15] = 0
4909 13:54:20.775484 rx_lastpass[0][0][15] = 0
4910 13:54:20.778924 rx_firspass[0][1][0] = 0
4911 13:54:20.779426 rx_lastpass[0][1][0] = 0
4912 13:54:20.782293 rx_firspass[0][1][1] = 0
4913 13:54:20.785552 rx_lastpass[0][1][1] = 0
4914 13:54:20.786057 rx_firspass[0][1][2] = 0
4915 13:54:20.788771 rx_lastpass[0][1][2] = 0
4916 13:54:20.792163 rx_firspass[0][1][3] = 0
4917 13:54:20.792667 rx_lastpass[0][1][3] = 0
4918 13:54:20.795481 rx_firspass[0][1][4] = 0
4919 13:54:20.798819 rx_lastpass[0][1][4] = 0
4920 13:54:20.799328 rx_firspass[0][1][5] = 0
4921 13:54:20.802190 rx_lastpass[0][1][5] = 0
4922 13:54:20.805279 rx_firspass[0][1][6] = 0
4923 13:54:20.805711 rx_lastpass[0][1][6] = 0
4924 13:54:20.808899 rx_firspass[0][1][7] = 0
4925 13:54:20.812191 rx_lastpass[0][1][7] = 0
4926 13:54:20.812693 rx_firspass[0][1][8] = 0
4927 13:54:20.815289 rx_lastpass[0][1][8] = 0
4928 13:54:20.818443 rx_firspass[0][1][9] = 0
4929 13:54:20.821834 rx_lastpass[0][1][9] = 0
4930 13:54:20.822258 rx_firspass[0][1][10] = 0
4931 13:54:20.825492 rx_lastpass[0][1][10] = 0
4932 13:54:20.828603 rx_firspass[0][1][11] = 0
4933 13:54:20.829060 rx_lastpass[0][1][11] = 0
4934 13:54:20.832079 rx_firspass[0][1][12] = 0
4935 13:54:20.835523 rx_lastpass[0][1][12] = 0
4936 13:54:20.838651 rx_firspass[0][1][13] = 0
4937 13:54:20.839081 rx_lastpass[0][1][13] = 0
4938 13:54:20.842409 rx_firspass[0][1][14] = 0
4939 13:54:20.845365 rx_lastpass[0][1][14] = 0
4940 13:54:20.845787 rx_firspass[0][1][15] = 0
4941 13:54:20.848989 rx_lastpass[0][1][15] = 0
4942 13:54:20.852058 rx_firspass[1][0][0] = 0
4943 13:54:20.852483 rx_lastpass[1][0][0] = 0
4944 13:54:20.855427 rx_firspass[1][0][1] = 0
4945 13:54:20.858890 rx_lastpass[1][0][1] = 0
4946 13:54:20.859397 rx_firspass[1][0][2] = 0
4947 13:54:20.861984 rx_lastpass[1][0][2] = 0
4948 13:54:20.865695 rx_firspass[1][0][3] = 0
4949 13:54:20.868764 rx_lastpass[1][0][3] = 0
4950 13:54:20.869190 rx_firspass[1][0][4] = 0
4951 13:54:20.872260 rx_lastpass[1][0][4] = 0
4952 13:54:20.875480 rx_firspass[1][0][5] = 0
4953 13:54:20.875995 rx_lastpass[1][0][5] = 0
4954 13:54:20.878893 rx_firspass[1][0][6] = 0
4955 13:54:20.882016 rx_lastpass[1][0][6] = 0
4956 13:54:20.882529 rx_firspass[1][0][7] = 0
4957 13:54:20.885484 rx_lastpass[1][0][7] = 0
4958 13:54:20.888983 rx_firspass[1][0][8] = 0
4959 13:54:20.889537 rx_lastpass[1][0][8] = 0
4960 13:54:20.892057 rx_firspass[1][0][9] = 0
4961 13:54:20.895446 rx_lastpass[1][0][9] = 0
4962 13:54:20.895992 rx_firspass[1][0][10] = 0
4963 13:54:20.899083 rx_lastpass[1][0][10] = 0
4964 13:54:20.902309 rx_firspass[1][0][11] = 0
4965 13:54:20.905359 rx_lastpass[1][0][11] = 0
4966 13:54:20.905791 rx_firspass[1][0][12] = 0
4967 13:54:20.908954 rx_lastpass[1][0][12] = 0
4968 13:54:20.912340 rx_firspass[1][0][13] = 0
4969 13:54:20.912844 rx_lastpass[1][0][13] = 0
4970 13:54:20.915217 rx_firspass[1][0][14] = 0
4971 13:54:20.918694 rx_lastpass[1][0][14] = 0
4972 13:54:20.922206 rx_firspass[1][0][15] = 0
4973 13:54:20.922712 rx_lastpass[1][0][15] = 0
4974 13:54:20.925421 rx_firspass[1][1][0] = 0
4975 13:54:20.928866 rx_lastpass[1][1][0] = 0
4976 13:54:20.929481 rx_firspass[1][1][1] = 0
4977 13:54:20.932071 rx_lastpass[1][1][1] = 0
4978 13:54:20.935205 rx_firspass[1][1][2] = 0
4979 13:54:20.935634 rx_lastpass[1][1][2] = 0
4980 13:54:20.938723 rx_firspass[1][1][3] = 0
4981 13:54:20.942126 rx_lastpass[1][1][3] = 0
4982 13:54:20.942635 rx_firspass[1][1][4] = 0
4983 13:54:20.945502 rx_lastpass[1][1][4] = 0
4984 13:54:20.948732 rx_firspass[1][1][5] = 0
4985 13:54:20.951936 rx_lastpass[1][1][5] = 0
4986 13:54:20.952455 rx_firspass[1][1][6] = 0
4987 13:54:20.955250 rx_lastpass[1][1][6] = 0
4988 13:54:20.958980 rx_firspass[1][1][7] = 0
4989 13:54:20.959481 rx_lastpass[1][1][7] = 0
4990 13:54:20.962343 rx_firspass[1][1][8] = 0
4991 13:54:20.965402 rx_lastpass[1][1][8] = 0
4992 13:54:20.965911 rx_firspass[1][1][9] = 0
4993 13:54:20.968754 rx_lastpass[1][1][9] = 0
4994 13:54:20.971995 rx_firspass[1][1][10] = 0
4995 13:54:20.972421 rx_lastpass[1][1][10] = 0
4996 13:54:20.975684 rx_firspass[1][1][11] = 0
4997 13:54:20.979054 rx_lastpass[1][1][11] = 0
4998 13:54:20.982264 rx_firspass[1][1][12] = 0
4999 13:54:20.982789 rx_lastpass[1][1][12] = 0
5000 13:54:20.985682 rx_firspass[1][1][13] = 0
5001 13:54:20.989102 rx_lastpass[1][1][13] = 0
5002 13:54:20.989682 rx_firspass[1][1][14] = 0
5003 13:54:20.992367 rx_lastpass[1][1][14] = 0
5004 13:54:20.995436 rx_firspass[1][1][15] = 0
5005 13:54:20.995865 rx_lastpass[1][1][15] = 0
5006 13:54:20.999127 dump params clk_delay
5007 13:54:21.002206 clk_delay[0] = 0
5008 13:54:21.002710 clk_delay[1] = 0
5009 13:54:21.005453 dump params dqs_delay
5010 13:54:21.005878 dqs_delay[0][0] = 0
5011 13:54:21.009114 dqs_delay[0][1] = 0
5012 13:54:21.009658 dqs_delay[1][0] = 0
5013 13:54:21.012237 dqs_delay[1][1] = 0
5014 13:54:21.015313 dump params delay_cell_unit = 753
5015 13:54:21.015744 mt_set_emi_preloader end
5016 13:54:21.022673 [mt_mem_init] dram size: 0x100000000, rank number: 2
5017 13:54:21.025418 [complex_mem_test] start addr:0x40000000, len:20480
5018 13:54:21.062843 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5019 13:54:21.069436 [complex_mem_test] start addr:0x80000000, len:20480
5020 13:54:21.105432 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5021 13:54:21.111829 [complex_mem_test] start addr:0xc0000000, len:20480
5022 13:54:21.147432 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5023 13:54:21.153689 [complex_mem_test] start addr:0x56000000, len:8192
5024 13:54:21.170610 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5025 13:54:21.171140 ddr_geometry:1
5026 13:54:21.177152 [complex_mem_test] start addr:0x80000000, len:8192
5027 13:54:21.194240 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5028 13:54:21.197497 dram_init: dram init end (result: 0)
5029 13:54:21.204496 Successfully loaded DRAM blobs and ran DRAM calibration
5030 13:54:21.214477 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5031 13:54:21.214982 CBMEM:
5032 13:54:21.217535 IMD: root @ 00000000fffff000 254 entries.
5033 13:54:21.220888 IMD: root @ 00000000ffffec00 62 entries.
5034 13:54:21.228002 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5035 13:54:21.234409 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5036 13:54:21.237903 in-header: 03 a1 00 00 08 00 00 00
5037 13:54:21.241218 in-data: 84 60 60 10 00 00 00 00
5038 13:54:21.244320 Chrome EC: clear events_b mask to 0x0000000020004000
5039 13:54:21.251698 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5040 13:54:21.254710 in-header: 03 fd 00 00 00 00 00 00
5041 13:54:21.255217 in-data:
5042 13:54:21.261470 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5043 13:54:21.261978 CBFS @ 21000 size 3d4000
5044 13:54:21.267923 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5045 13:54:21.271383 CBFS: Locating 'fallback/ramstage'
5046 13:54:21.274967 CBFS: Found @ offset 10d40 size d563
5047 13:54:21.296088 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5048 13:54:21.308560 Accumulated console time in romstage 12853 ms
5049 13:54:21.309062
5050 13:54:21.309467
5051 13:54:21.318267 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5052 13:54:21.321609 ARM64: Exception handlers installed.
5053 13:54:21.322109 ARM64: Testing exception
5054 13:54:21.325015 ARM64: Done test exception
5055 13:54:21.328636 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5056 13:54:21.332457 Manufacturer: ef
5057 13:54:21.334889 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5058 13:54:21.341465 WARNING: RO_VPD is uninitialized or empty.
5059 13:54:21.344920 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5060 13:54:21.347907 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5061 13:54:21.357977 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5062 13:54:21.361417 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5063 13:54:21.367826 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5064 13:54:21.368326 Enumerating buses...
5065 13:54:21.374514 Show all devs... Before device enumeration.
5066 13:54:21.375025 Root Device: enabled 1
5067 13:54:21.377961 CPU_CLUSTER: 0: enabled 1
5068 13:54:21.378468 CPU: 00: enabled 1
5069 13:54:21.381368 Compare with tree...
5070 13:54:21.384658 Root Device: enabled 1
5071 13:54:21.385168 CPU_CLUSTER: 0: enabled 1
5072 13:54:21.387576 CPU: 00: enabled 1
5073 13:54:21.390859 Root Device scanning...
5074 13:54:21.391286 root_dev_scan_bus for Root Device
5075 13:54:21.394411 CPU_CLUSTER: 0 enabled
5076 13:54:21.397871 root_dev_scan_bus for Root Device done
5077 13:54:21.404321 scan_bus: scanning of bus Root Device took 10689 usecs
5078 13:54:21.404868 done
5079 13:54:21.407713 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5080 13:54:21.411285 Allocating resources...
5081 13:54:21.411793 Reading resources...
5082 13:54:21.414353 Root Device read_resources bus 0 link: 0
5083 13:54:21.421365 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5084 13:54:21.421873 CPU: 00 missing read_resources
5085 13:54:21.427937 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5086 13:54:21.430966 Root Device read_resources bus 0 link: 0 done
5087 13:54:21.434466 Done reading resources.
5088 13:54:21.437759 Show resources in subtree (Root Device)...After reading.
5089 13:54:21.441186 Root Device child on link 0 CPU_CLUSTER: 0
5090 13:54:21.444716 CPU_CLUSTER: 0 child on link 0 CPU: 00
5091 13:54:21.454252 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5092 13:54:21.454786 CPU: 00
5093 13:54:21.457701 Setting resources...
5094 13:54:21.460942 Root Device assign_resources, bus 0 link: 0
5095 13:54:21.464644 CPU_CLUSTER: 0 missing set_resources
5096 13:54:21.467864 Root Device assign_resources, bus 0 link: 0
5097 13:54:21.471179 Done setting resources.
5098 13:54:21.477868 Show resources in subtree (Root Device)...After assigning values.
5099 13:54:21.481033 Root Device child on link 0 CPU_CLUSTER: 0
5100 13:54:21.484341 CPU_CLUSTER: 0 child on link 0 CPU: 00
5101 13:54:21.490911 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5102 13:54:21.494544 CPU: 00
5103 13:54:21.495050 Done allocating resources.
5104 13:54:21.501121 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5105 13:54:21.501680 Enabling resources...
5106 13:54:21.504390 done.
5107 13:54:21.507775 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5108 13:54:21.511576 Initializing devices...
5109 13:54:21.512082 Root Device init ...
5110 13:54:21.514600 mainboard_init: Starting display init.
5111 13:54:21.517883 ADC[4]: Raw value=77032 ID=0
5112 13:54:21.540652 anx7625_power_on_init: Init interface.
5113 13:54:21.543892 anx7625_disable_pd_protocol: Disabled PD feature.
5114 13:54:21.550550 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5115 13:54:21.607602 anx7625_start_dp_work: Secure OCM version=00
5116 13:54:21.610989 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5117 13:54:21.627829 sp_tx_get_edid_block: EDID Block = 1
5118 13:54:21.745566 Extracted contents:
5119 13:54:21.748583 header: 00 ff ff ff ff ff ff 00
5120 13:54:21.752204 serial number: 06 af 5c 14 00 00 00 00 00 1a
5121 13:54:21.755018 version: 01 04
5122 13:54:21.758459 basic params: 95 1a 0e 78 02
5123 13:54:21.762039 chroma info: 99 85 95 55 56 92 28 22 50 54
5124 13:54:21.765204 established: 00 00 00
5125 13:54:21.771921 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5126 13:54:21.775092 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5127 13:54:21.782118 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5128 13:54:21.788599 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5129 13:54:21.795478 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5130 13:54:21.798736 extensions: 00
5131 13:54:21.799167 checksum: ae
5132 13:54:21.799495
5133 13:54:21.801848 Manufacturer: AUO Model 145c Serial Number 0
5134 13:54:21.805303 Made week 0 of 2016
5135 13:54:21.805817 EDID version: 1.4
5136 13:54:21.808689 Digital display
5137 13:54:21.812209 6 bits per primary color channel
5138 13:54:21.812718 DisplayPort interface
5139 13:54:21.815539 Maximum image size: 26 cm x 14 cm
5140 13:54:21.816050 Gamma: 220%
5141 13:54:21.818886 Check DPMS levels
5142 13:54:21.822336 Supported color formats: RGB 4:4:4
5143 13:54:21.825548 First detailed timing is preferred timing
5144 13:54:21.829144 Established timings supported:
5145 13:54:21.832070 Standard timings supported:
5146 13:54:21.832498 Detailed timings
5147 13:54:21.835718 Hex of detail: ce1d56ea50001a3030204600009010000018
5148 13:54:21.842179 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5149 13:54:21.845977 0556 0586 05a6 0640 hborder 0
5150 13:54:21.848933 0300 0304 030a 031a vborder 0
5151 13:54:21.852004 -hsync -vsync
5152 13:54:21.855516 Did detailed timing
5153 13:54:21.858885 Hex of detail: 0000000f0000000000000000000000000020
5154 13:54:21.862414 Manufacturer-specified data, tag 15
5155 13:54:21.865527 Hex of detail: 000000fe0041554f0a202020202020202020
5156 13:54:21.868845 ASCII string: AUO
5157 13:54:21.872322 Hex of detail: 000000fe004231313658414230312e34200a
5158 13:54:21.875259 ASCII string: B116XAB01.4
5159 13:54:21.875687 Checksum
5160 13:54:21.879006 Checksum: 0xae (valid)
5161 13:54:21.882202 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5162 13:54:21.885329 DSI data_rate: 457800000 bps
5163 13:54:21.892305 anx7625_parse_edid: set default k value to 0x3d for panel
5164 13:54:21.895703 anx7625_parse_edid: pixelclock(76300).
5165 13:54:21.898750 hactive(1366), hsync(32), hfp(48), hbp(154)
5166 13:54:21.902275 vactive(768), vsync(6), vfp(4), vbp(16)
5167 13:54:21.905551 anx7625_dsi_config: config dsi.
5168 13:54:21.913973 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5169 13:54:21.934563 anx7625_dsi_config: success to config DSI
5170 13:54:21.937953 anx7625_dp_start: MIPI phy setup OK.
5171 13:54:21.940937 [SSUSB] Setting up USB HOST controller...
5172 13:54:21.944744 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5173 13:54:21.947778 [SSUSB] phy power-on done.
5174 13:54:21.951392 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5175 13:54:21.954872 in-header: 03 fc 01 00 00 00 00 00
5176 13:54:21.955296 in-data:
5177 13:54:21.958036 handle_proto3_response: EC response with error code: 1
5178 13:54:21.961587 SPM: pcm index = 1
5179 13:54:21.965183 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5180 13:54:21.968672 CBFS @ 21000 size 3d4000
5181 13:54:21.975212 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5182 13:54:21.978276 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5183 13:54:21.981547 CBFS: Found @ offset 1e7c0 size 1026
5184 13:54:21.988258 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5185 13:54:21.991733 SPM: binary array size = 2988
5186 13:54:21.995350 SPM: version = pcm_allinone_v1.17.2_20180829
5187 13:54:21.998170 SPM binary loaded in 32 msecs
5188 13:54:22.005548 spm_kick_im_to_fetch: ptr = 000000004021eec2
5189 13:54:22.009150 spm_kick_im_to_fetch: len = 2988
5190 13:54:22.009709 SPM: spm_kick_pcm_to_run
5191 13:54:22.012892 SPM: spm_kick_pcm_to_run done
5192 13:54:22.015910 SPM: spm_init done in 52 msecs
5193 13:54:22.019144 Root Device init finished in 505253 usecs
5194 13:54:22.022357 CPU_CLUSTER: 0 init ...
5195 13:54:22.029085 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5196 13:54:22.035938 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5197 13:54:22.036443 CBFS @ 21000 size 3d4000
5198 13:54:22.042605 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5199 13:54:22.045920 CBFS: Locating 'sspm.bin'
5200 13:54:22.049483 CBFS: Found @ offset 208c0 size 41cb
5201 13:54:22.058929 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5202 13:54:22.066866 CPU_CLUSTER: 0 init finished in 42796 usecs
5203 13:54:22.067373 Devices initialized
5204 13:54:22.070049 Show all devs... After init.
5205 13:54:22.073486 Root Device: enabled 1
5206 13:54:22.073994 CPU_CLUSTER: 0: enabled 1
5207 13:54:22.076669 CPU: 00: enabled 1
5208 13:54:22.080221 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5209 13:54:22.083466 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5210 13:54:22.086537 ELOG: NV offset 0x558000 size 0x1000
5211 13:54:22.094228 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5212 13:54:22.101007 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5213 13:54:22.104331 ELOG: Event(17) added with size 13 at 2024-07-18 13:54:22 UTC
5214 13:54:22.107630 out: cmd=0x121: 03 db 21 01 00 00 00 00
5215 13:54:22.111314 in-header: 03 84 00 00 2c 00 00 00
5216 13:54:22.124413 in-data: a0 49 00 00 00 00 00 00 02 10 00 00 06 80 00 00 28 8d 01 00 06 80 00 00 77 d4 03 00 06 80 00 00 4b 31 01 00 06 80 00 00 4d 6a 02 00
5217 13:54:22.127682 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5218 13:54:22.130880 in-header: 03 19 00 00 08 00 00 00
5219 13:54:22.134305 in-data: a2 e0 47 00 13 00 00 00
5220 13:54:22.137572 Chrome EC: UHEPI supported
5221 13:54:22.144293 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5222 13:54:22.147759 in-header: 03 e1 00 00 08 00 00 00
5223 13:54:22.151133 in-data: 84 20 60 10 00 00 00 00
5224 13:54:22.154346 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5225 13:54:22.161083 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5226 13:54:22.164528 in-header: 03 e1 00 00 08 00 00 00
5227 13:54:22.167886 in-data: 84 20 60 10 00 00 00 00
5228 13:54:22.174220 ELOG: Event(A1) added with size 10 at 2024-07-18 13:54:22 UTC
5229 13:54:22.181369 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5230 13:54:22.184652 ELOG: Event(A0) added with size 9 at 2024-07-18 13:54:22 UTC
5231 13:54:22.187875 elog_add_boot_reason: Logged dev mode boot
5232 13:54:22.191306 Finalize devices...
5233 13:54:22.191821 Devices finalized
5234 13:54:22.198138 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5235 13:54:22.201482 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5236 13:54:22.207960 ELOG: Event(91) added with size 10 at 2024-07-18 13:54:22 UTC
5237 13:54:22.211352 Writing coreboot table at 0xffeda000
5238 13:54:22.214393 0. 0000000000114000-000000000011efff: RAMSTAGE
5239 13:54:22.221198 1. 0000000040000000-000000004023cfff: RAMSTAGE
5240 13:54:22.224561 2. 000000004023d000-00000000545fffff: RAM
5241 13:54:22.227794 3. 0000000054600000-000000005465ffff: BL31
5242 13:54:22.231405 4. 0000000054660000-00000000ffed9fff: RAM
5243 13:54:22.238146 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5244 13:54:22.241271 6. 0000000100000000-000000013fffffff: RAM
5245 13:54:22.241817 Passing 5 GPIOs to payload:
5246 13:54:22.248126 NAME | PORT | POLARITY | VALUE
5247 13:54:22.251340 write protect | 0x00000096 | low | high
5248 13:54:22.258151 EC in RW | 0x000000b1 | high | undefined
5249 13:54:22.261431 EC interrupt | 0x00000097 | low | undefined
5250 13:54:22.264905 TPM interrupt | 0x00000099 | high | undefined
5251 13:54:22.271192 speaker enable | 0x000000af | high | undefined
5252 13:54:22.274314 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5253 13:54:22.277815 in-header: 03 f7 00 00 02 00 00 00
5254 13:54:22.278327 in-data: 04 00
5255 13:54:22.281274 Board ID: 4
5256 13:54:22.281786 ADC[3]: Raw value=1041012 ID=8
5257 13:54:22.284783 RAM code: 8
5258 13:54:22.285339 SKU ID: 16
5259 13:54:22.287910 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5260 13:54:22.291568 CBFS @ 21000 size 3d4000
5261 13:54:22.298007 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5262 13:54:22.301588 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 4619
5263 13:54:22.304870 coreboot table: 940 bytes.
5264 13:54:22.307935 IMD ROOT 0. 00000000fffff000 00001000
5265 13:54:22.311514 IMD SMALL 1. 00000000ffffe000 00001000
5266 13:54:22.314874 CONSOLE 2. 00000000fffde000 00020000
5267 13:54:22.318067 FMAP 3. 00000000fffdd000 0000047c
5268 13:54:22.324898 TIME STAMP 4. 00000000fffdc000 00000910
5269 13:54:22.327980 RAMOOPS 5. 00000000ffedc000 00100000
5270 13:54:22.331371 COREBOOT 6. 00000000ffeda000 00002000
5271 13:54:22.331891 IMD small region:
5272 13:54:22.334877 IMD ROOT 0. 00000000ffffec00 00000400
5273 13:54:22.338125 VBOOT WORK 1. 00000000ffffeb00 00000100
5274 13:54:22.345100 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5275 13:54:22.348282 VPD 3. 00000000ffffea60 0000006c
5276 13:54:22.351494 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5277 13:54:22.358084 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5278 13:54:22.361739 in-header: 03 e1 00 00 08 00 00 00
5279 13:54:22.365148 in-data: 84 20 60 10 00 00 00 00
5280 13:54:22.368247 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5281 13:54:22.371603 CBFS @ 21000 size 3d4000
5282 13:54:22.378224 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5283 13:54:22.381328 CBFS: Locating 'fallback/payload'
5284 13:54:22.388234 CBFS: Found @ offset dc040 size 439a0
5285 13:54:22.476645 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5286 13:54:22.479798 Checking segment from ROM address 0x0000000040003a00
5287 13:54:22.486516 Checking segment from ROM address 0x0000000040003a1c
5288 13:54:22.489848 Loading segment from ROM address 0x0000000040003a00
5289 13:54:22.493087 code (compression=0)
5290 13:54:22.499713 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5291 13:54:22.510027 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5292 13:54:22.513054 it's not compressed!
5293 13:54:22.516701 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5294 13:54:22.523153 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5295 13:54:22.530654 Loading segment from ROM address 0x0000000040003a1c
5296 13:54:22.534112 Entry Point 0x0000000080000000
5297 13:54:22.534574 Loaded segments
5298 13:54:22.540638 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5299 13:54:22.544222 Jumping to boot code at 0000000080000000(00000000ffeda000)
5300 13:54:22.554037 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5301 13:54:22.557444 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5302 13:54:22.560867 CBFS @ 21000 size 3d4000
5303 13:54:22.567482 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5304 13:54:22.567986 CBFS: Locating 'fallback/bl31'
5305 13:54:22.570822 CBFS: Found @ offset 36dc0 size 5820
5306 13:54:22.584541 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5307 13:54:22.587976 Checking segment from ROM address 0x0000000040003a00
5308 13:54:22.594695 Checking segment from ROM address 0x0000000040003a1c
5309 13:54:22.598071 Loading segment from ROM address 0x0000000040003a00
5310 13:54:22.601675 code (compression=1)
5311 13:54:22.607773 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5312 13:54:22.618174 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5313 13:54:22.618691 using LZMA
5314 13:54:22.626506 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5315 13:54:22.633446 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5316 13:54:22.636486 Loading segment from ROM address 0x0000000040003a1c
5317 13:54:22.639701 Entry Point 0x0000000054601000
5318 13:54:22.640212 Loaded segments
5319 13:54:22.642794 NOTICE: MT8183 bl31_setup
5320 13:54:22.650556 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5321 13:54:22.653391 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5322 13:54:22.656593 INFO: [DEVAPC] dump DEVAPC registers:
5323 13:54:22.666946 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5324 13:54:22.673385 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5325 13:54:22.683252 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5326 13:54:22.689902 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5327 13:54:22.699957 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5328 13:54:22.706818 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5329 13:54:22.713410 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5330 13:54:22.723231 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5331 13:54:22.730003 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5332 13:54:22.740540 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5333 13:54:22.746898 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5334 13:54:22.756795 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5335 13:54:22.763741 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5336 13:54:22.770218 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5337 13:54:22.780140 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5338 13:54:22.786931 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5339 13:54:22.793373 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5340 13:54:22.800159 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5341 13:54:22.806724 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5342 13:54:22.816731 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5343 13:54:22.823530 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5344 13:54:22.829994 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5345 13:54:22.833407 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5346 13:54:22.836829 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5347 13:54:22.840074 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5348 13:54:22.843964 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5349 13:54:22.846763 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5350 13:54:22.853745 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5351 13:54:22.856893 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5352 13:54:22.860250 WARNING: region 0:
5353 13:54:22.863828 WARNING: apc:0x168, sa:0x0, ea:0xfff
5354 13:54:22.864347 WARNING: region 1:
5355 13:54:22.867637 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5356 13:54:22.870486 WARNING: region 2:
5357 13:54:22.873873 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5358 13:54:22.877388 WARNING: region 3:
5359 13:54:22.880381 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5360 13:54:22.880805 WARNING: region 4:
5361 13:54:22.883969 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5362 13:54:22.887418 WARNING: region 5:
5363 13:54:22.890302 WARNING: apc:0x0, sa:0x0, ea:0x0
5364 13:54:22.890734 WARNING: region 6:
5365 13:54:22.893728 WARNING: apc:0x0, sa:0x0, ea:0x0
5366 13:54:22.897409 WARNING: region 7:
5367 13:54:22.900740 WARNING: apc:0x0, sa:0x0, ea:0x0
5368 13:54:22.907642 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5369 13:54:22.910453 INFO: SPM: enable SPMC mode
5370 13:54:22.910879 NOTICE: spm_boot_init() start
5371 13:54:22.913921 NOTICE: spm_boot_init() end
5372 13:54:22.917138 INFO: BL31: Initializing runtime services
5373 13:54:22.923998 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5374 13:54:22.927222 INFO: BL31: Preparing for EL3 exit to normal world
5375 13:54:22.933850 INFO: Entry point address = 0x80000000
5376 13:54:22.934276 INFO: SPSR = 0x8
5377 13:54:22.956258
5378 13:54:22.956629
5379 13:54:22.956861
5380 13:54:22.958132 end: 2.2.3 depthcharge-start (duration 00:00:23) [common]
5381 13:54:22.958484 start: 2.2.4 bootloader-commands (timeout 00:04:28) [common]
5382 13:54:22.958770 Setting prompt string to ['jacuzzi:']
5383 13:54:22.959017 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:28)
5384 13:54:22.959469 Starting depthcharge on Juniper...
5385 13:54:22.959707
5386 13:54:22.962896 vboot_handoff: creating legacy vboot_handoff structure
5387 13:54:22.963194
5388 13:54:22.966177 ec_init(0): CrosEC protocol v3 supported (544, 544)
5389 13:54:22.966560
5390 13:54:22.970038 Wipe memory regions:
5391 13:54:22.970505
5392 13:54:22.972900 [0x00000040000000, 0x00000054600000)
5393 13:54:23.016007
5394 13:54:23.016507 [0x00000054660000, 0x00000080000000)
5395 13:54:23.107477
5396 13:54:23.108017 [0x000000811994a0, 0x000000ffeda000)
5397 13:54:23.366829
5398 13:54:23.367346 [0x00000100000000, 0x00000140000000)
5399 13:54:23.499726
5400 13:54:23.502733 Initializing XHCI USB controller at 0x11200000.
5401 13:54:23.525718
5402 13:54:23.529153 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5403 13:54:23.529709
5404 13:54:23.530062
5405 13:54:23.530778 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5406 13:54:23.531169 Sending line: 'tftpboot 192.168.201.1 14879066/tftp-deploy-8zxurxoj/kernel/image.itb 14879066/tftp-deploy-8zxurxoj/kernel/cmdline '
5408 13:54:23.632782 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5409 13:54:23.633275 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:28)
5410 13:54:23.637794 jacuzzi: tftpboot 192.168.201.1 14879066/tftp-deploy-8zxurxoj/kernel/image.itp-deploy-8zxurxoj/kernel/cmdline
5411 13:54:23.638315
5412 13:54:23.638650 Waiting for link
5413 13:54:24.186328
5414 13:54:24.186889 R8152: Initializing
5415 13:54:24.187227
5416 13:54:24.189626 Version 9 (ocp_data = 6010)
5417 13:54:24.190143
5418 13:54:24.193117 R8152: Done initializing
5419 13:54:24.193667
5420 13:54:24.194010 Adding net device
5421 13:54:24.371966
5422 13:54:24.372649 R8152: Initializing
5423 13:54:24.373058
5424 13:54:24.374867 Version 9 (ocp_data = 6010)
5425 13:54:24.375290
5426 13:54:24.378513 R8152: Done initializing
5427 13:54:24.379048
5428 13:54:24.381811 net_add_device: Attemp to include the same device
5429 13:54:24.768031
5430 13:54:24.768534 done.
5431 13:54:24.768867
5432 13:54:24.769177 MAC: 00:e0:4c:68:03:2b
5433 13:54:24.769522
5434 13:54:24.771017 Sending DHCP discover... done.
5435 13:54:24.771446
5436 13:54:24.774535 Waiting for reply... done.
5437 13:54:24.775066
5438 13:54:24.777625 Sending DHCP request... done.
5439 13:54:24.777791
5440 13:54:24.781591 Waiting for reply... done.
5441 13:54:24.781859
5442 13:54:24.782022 My ip is 192.168.201.17
5443 13:54:24.782169
5444 13:54:24.784898 The DHCP server ip is 192.168.201.1
5445 13:54:24.785142
5446 13:54:24.791798 TFTP server IP predefined by user: 192.168.201.1
5447 13:54:24.792194
5448 13:54:24.798391 Bootfile predefined by user: 14879066/tftp-deploy-8zxurxoj/kernel/image.itb
5449 13:54:24.798851
5450 13:54:24.799150 Sending tftp read request... done.
5451 13:54:24.801739
5452 13:54:24.808752 Waiting for the transfer...
5453 13:54:24.809283
5454 13:54:25.169384 00000000 ################################################################
5455 13:54:25.169844
5456 13:54:25.555909 00080000 ################################################################
5457 13:54:25.556503
5458 13:54:25.944406 00100000 ################################################################
5459 13:54:25.944861
5460 13:54:26.330931 00180000 ################################################################
5461 13:54:26.331433
5462 13:54:26.737132 00200000 ################################################################
5463 13:54:26.737672
5464 13:54:27.116900 00280000 ################################################################
5465 13:54:27.117542
5466 13:54:27.529289 00300000 ################################################################
5467 13:54:27.529798
5468 13:54:27.922779 00380000 ################################################################
5469 13:54:27.923283
5470 13:54:28.298204 00400000 ################################################################
5471 13:54:28.298736
5472 13:54:28.661862 00480000 ################################################################
5473 13:54:28.661981
5474 13:54:28.933482 00500000 ################################################################
5475 13:54:28.933626
5476 13:54:29.209863 00580000 ################################################################
5477 13:54:29.209987
5478 13:54:29.465753 00600000 ################################################################
5479 13:54:29.465868
5480 13:54:29.742162 00680000 ################################################################
5481 13:54:29.742284
5482 13:54:30.018347 00700000 ################################################################
5483 13:54:30.018468
5484 13:54:30.319575 00780000 ################################################################
5485 13:54:30.319693
5486 13:54:30.620795 00800000 ################################################################
5487 13:54:30.620913
5488 13:54:30.920059 00880000 ################################################################
5489 13:54:30.920180
5490 13:54:31.222997 00900000 ################################################################
5491 13:54:31.223117
5492 13:54:31.521920 00980000 ################################################################
5493 13:54:31.522043
5494 13:54:31.818018 00a00000 ################################################################
5495 13:54:31.818135
5496 13:54:32.106813 00a80000 ################################################################
5497 13:54:32.106960
5498 13:54:32.410771 00b00000 ################################################################
5499 13:54:32.410896
5500 13:54:32.690321 00b80000 ################################################################
5501 13:54:32.690437
5502 13:54:32.968305 00c00000 ################################################################
5503 13:54:32.968433
5504 13:54:33.222697 00c80000 ################################################################
5505 13:54:33.222823
5506 13:54:33.494172 00d00000 ################################################################
5507 13:54:33.494295
5508 13:54:33.761763 00d80000 ################################################################
5509 13:54:33.761903
5510 13:54:34.065162 00e00000 ################################################################
5511 13:54:34.065314
5512 13:54:34.430786 00e80000 ################################################################
5513 13:54:34.431244
5514 13:54:34.808048 00f00000 ################################################################
5515 13:54:34.808559
5516 13:54:35.188753 00f80000 ################################################################
5517 13:54:35.189370
5518 13:54:35.502995 01000000 ################################################################
5519 13:54:35.503119
5520 13:54:35.794236 01080000 ################################################################
5521 13:54:35.794364
5522 13:54:36.086208 01100000 ################################################################
5523 13:54:36.086327
5524 13:54:36.383184 01180000 ################################################################
5525 13:54:36.383310
5526 13:54:36.687318 01200000 ################################################################
5527 13:54:36.687438
5528 13:54:36.946236 01280000 ################################################################
5529 13:54:36.946359
5530 13:54:37.201500 01300000 ################################################################
5531 13:54:37.201619
5532 13:54:37.456295 01380000 ################################################################
5533 13:54:37.456419
5534 13:54:37.711856 01400000 ################################################################
5535 13:54:37.711976
5536 13:54:37.966486 01480000 ################################################################
5537 13:54:37.966613
5538 13:54:38.244440 01500000 ################################################################
5539 13:54:38.244561
5540 13:54:38.540194 01580000 ################################################################
5541 13:54:38.540346
5542 13:54:38.838383 01600000 ################################################################
5543 13:54:38.838503
5544 13:54:39.120342 01680000 ################################################################
5545 13:54:39.120465
5546 13:54:39.381924 01700000 ################################################################
5547 13:54:39.382043
5548 13:54:39.652868 01780000 ################################################################
5549 13:54:39.652987
5550 13:54:39.949044 01800000 ################################################################
5551 13:54:39.949165
5552 13:54:40.311430 01880000 ################################################################
5553 13:54:40.311946
5554 13:54:40.619161 01900000 ################################################################
5555 13:54:40.619289
5556 13:54:40.917367 01980000 ################################################################
5557 13:54:40.917488
5558 13:54:41.218803 01a00000 ################################################################
5559 13:54:41.218923
5560 13:54:41.518477 01a80000 ################################################################
5561 13:54:41.518596
5562 13:54:41.823209 01b00000 ################################################################
5563 13:54:41.823331
5564 13:54:42.152592 01b80000 ################################################################
5565 13:54:42.153049
5566 13:54:42.535429 01c00000 ################################################################
5567 13:54:42.535946
5568 13:54:42.920016 01c80000 ################################################################
5569 13:54:42.920604
5570 13:54:43.318848 01d00000 ################################################################
5571 13:54:43.319334
5572 13:54:43.653096 01d80000 ################################################################
5573 13:54:43.653229
5574 13:54:43.897826 01e00000 ###################################################### done.
5575 13:54:43.897946
5576 13:54:43.901201 The bootfile was 31895494 bytes long.
5577 13:54:43.901632
5578 13:54:43.904750 Sending tftp read request... done.
5579 13:54:43.905139
5580 13:54:43.908006 Waiting for the transfer...
5581 13:54:43.908392
5582 13:54:43.911521 00000000 # done.
5583 13:54:43.911959
5584 13:54:43.918216 Command line loaded dynamically from TFTP file: 14879066/tftp-deploy-8zxurxoj/kernel/cmdline
5585 13:54:43.918639
5586 13:54:43.944979 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14879066/extract-nfsrootfs-xvz4wwgq,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5587 13:54:43.945570
5588 13:54:43.945913 Loading FIT.
5589 13:54:43.946221
5590 13:54:43.947973 Image ramdisk-1 has 18721287 bytes.
5591 13:54:43.948398
5592 13:54:43.951319 Image fdt-1 has 57695 bytes.
5593 13:54:43.951749
5594 13:54:43.954553 Image kernel-1 has 13114469 bytes.
5595 13:54:43.954993
5596 13:54:43.964773 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5597 13:54:43.965364
5598 13:54:43.974987 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5599 13:54:43.975523
5600 13:54:43.981840 Choosing best match conf-1 for compat google,juniper-sku16.
5601 13:54:43.985374
5602 13:54:43.989940 Connected to device vid:did:rid of 1ae0:0028:00
5603 13:54:43.996964
5604 13:54:44.000349 tpm_get_response: command 0x17b, return code 0x0
5605 13:54:44.000858
5606 13:54:44.003659 tpm_cleanup: add release locality here.
5607 13:54:44.004161
5608 13:54:44.006764 Shutting down all USB controllers.
5609 13:54:44.007195
5610 13:54:44.010159 Removing current net device
5611 13:54:44.010603
5612 13:54:44.013489 Exiting depthcharge with code 4 at timestamp: 37469461
5613 13:54:44.013953
5614 13:54:44.017113 LZMA decompressing kernel-1 to 0x80193568
5615 13:54:44.017697
5616 13:54:44.020178 LZMA decompressing kernel-1 to 0x40000000
5617 13:54:45.885939
5618 13:54:45.886437 jumping to kernel
5619 13:54:45.888240 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
5620 13:54:45.888727 start: 2.2.5 auto-login-action (timeout 00:04:05) [common]
5621 13:54:45.889093 Setting prompt string to ['Linux version [0-9]']
5622 13:54:45.889490 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5623 13:54:45.889845 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5624 13:54:45.960913
5625 13:54:45.964185 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5626 13:54:45.967835 start: 2.2.5.1 login-action (timeout 00:04:05) [common]
5627 13:54:45.968393 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5628 13:54:45.968767 Setting prompt string to []
5629 13:54:45.969146 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5630 13:54:45.969547 Using line separator: #'\n'#
5631 13:54:45.969853 No login prompt set.
5632 13:54:45.970163 Parsing kernel messages
5633 13:54:45.970441 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5634 13:54:45.970974 [login-action] Waiting for messages, (timeout 00:04:05)
5635 13:54:45.971298 Waiting using forced prompt support (timeout 00:02:03)
5636 13:54:45.987642 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j272990-arm64-gcc-12-defconfig-arm64-chromebook-fgzcq) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Thu Jul 18 12:53:03 UTC 2024
5637 13:54:45.990805 [ 0.000000] random: crng init done
5638 13:54:45.994066 [ 0.000000] Machine model: Google juniper sku16 board
5639 13:54:45.997727 [ 0.000000] efi: UEFI not found.
5640 13:54:46.007351 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5641 13:54:46.014304 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5642 13:54:46.021081 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5643 13:54:46.027481 [ 0.000000] printk: bootconsole [mtk8250] enabled
5644 13:54:46.035000 [ 0.000000] NUMA: No NUMA configuration found
5645 13:54:46.041319 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5646 13:54:46.047946 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5647 13:54:46.048398 [ 0.000000] Zone ranges:
5648 13:54:46.054706 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5649 13:54:46.057656 [ 0.000000] DMA32 empty
5650 13:54:46.064561 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5651 13:54:46.067990 [ 0.000000] Movable zone start for each node
5652 13:54:46.071321 [ 0.000000] Early memory node ranges
5653 13:54:46.078121 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5654 13:54:46.084871 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5655 13:54:46.091254 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5656 13:54:46.098016 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5657 13:54:46.104880 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5658 13:54:46.111114 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5659 13:54:46.131298 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5660 13:54:46.138093 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5661 13:54:46.144554 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5662 13:54:46.148092 [ 0.000000] psci: probing for conduit method from DT.
5663 13:54:46.154948 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5664 13:54:46.158306 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5665 13:54:46.164748 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5666 13:54:46.167950 [ 0.000000] psci: SMC Calling Convention v1.1
5667 13:54:46.174511 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5668 13:54:46.177775 [ 0.000000] Detected VIPT I-cache on CPU0
5669 13:54:46.184525 [ 0.000000] CPU features: detected: GIC system register CPU interface
5670 13:54:46.191112 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5671 13:54:46.197794 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5672 13:54:46.201146 [ 0.000000] CPU features: detected: ARM erratum 845719
5673 13:54:46.207792 [ 0.000000] alternatives: applying boot alternatives
5674 13:54:46.211263 [ 0.000000] Fallback order for Node 0: 0
5675 13:54:46.217720 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5676 13:54:46.221050 [ 0.000000] Policy zone: Normal
5677 13:54:46.247816 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14879066/extract-nfsrootfs-xvz4wwgq,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5678 13:54:46.261508 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5679 13:54:46.271811 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5680 13:54:46.278117 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5681 13:54:46.284570 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5682 13:54:46.287949 <6>[ 0.000000] software IO TLB: area num 8.
5683 13:54:46.314840 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5684 13:54:46.373003 <6>[ 0.000000] Memory: 3896792K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 261672K reserved, 32768K cma-reserved)
5685 13:54:46.379631 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5686 13:54:46.386346 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5687 13:54:46.389925 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5688 13:54:46.396600 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5689 13:54:46.403039 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5690 13:54:46.406164 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5691 13:54:46.416364 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5692 13:54:46.422824 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5693 13:54:46.426006 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5694 13:54:46.437934 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5695 13:54:46.444603 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5696 13:54:46.448096 <6>[ 0.000000] GICv3: 640 SPIs implemented
5697 13:54:46.451541 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5698 13:54:46.458411 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5699 13:54:46.461561 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5700 13:54:46.468102 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5701 13:54:46.478354 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5702 13:54:46.491354 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5703 13:54:46.498031 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5704 13:54:46.509755 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5705 13:54:46.523008 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5706 13:54:46.530018 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5707 13:54:46.536556 <6>[ 0.009467] Console: colour dummy device 80x25
5708 13:54:46.539892 <6>[ 0.014503] printk: console [tty1] enabled
5709 13:54:46.549953 <6>[ 0.018892] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5710 13:54:46.556877 <6>[ 0.029357] pid_max: default: 32768 minimum: 301
5711 13:54:46.560255 <6>[ 0.034238] LSM: Security Framework initializing
5712 13:54:46.569920 <6>[ 0.039152] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5713 13:54:46.576922 <6>[ 0.046775] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5714 13:54:46.583506 <4>[ 0.055652] cacheinfo: Unable to detect cache hierarchy for CPU 0
5715 13:54:46.593314 <6>[ 0.062278] cblist_init_generic: Setting adjustable number of callback queues.
5716 13:54:46.596809 <6>[ 0.069723] cblist_init_generic: Setting shift to 3 and lim to 1.
5717 13:54:46.606456 <6>[ 0.076076] cblist_init_generic: Setting adjustable number of callback queues.
5718 13:54:46.613411 <6>[ 0.083520] cblist_init_generic: Setting shift to 3 and lim to 1.
5719 13:54:46.616839 <6>[ 0.089920] rcu: Hierarchical SRCU implementation.
5720 13:54:46.623471 <6>[ 0.094946] rcu: Max phase no-delay instances is 1000.
5721 13:54:46.630177 <6>[ 0.102849] EFI services will not be available.
5722 13:54:46.633082 <6>[ 0.107801] smp: Bringing up secondary CPUs ...
5723 13:54:46.643981 <6>[ 0.113054] Detected VIPT I-cache on CPU1
5724 13:54:46.650421 <4>[ 0.113101] cacheinfo: Unable to detect cache hierarchy for CPU 1
5725 13:54:46.657429 <6>[ 0.113109] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5726 13:54:46.664114 <6>[ 0.113140] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5727 13:54:46.667132 <6>[ 0.113623] Detected VIPT I-cache on CPU2
5728 13:54:46.674072 <4>[ 0.113657] cacheinfo: Unable to detect cache hierarchy for CPU 2
5729 13:54:46.680251 <6>[ 0.113662] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5730 13:54:46.687225 <6>[ 0.113673] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5731 13:54:46.690266 <6>[ 0.114119] Detected VIPT I-cache on CPU3
5732 13:54:46.696883 <4>[ 0.114151] cacheinfo: Unable to detect cache hierarchy for CPU 3
5733 13:54:46.703862 <6>[ 0.114155] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5734 13:54:46.710252 <6>[ 0.114166] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5735 13:54:46.717222 <6>[ 0.114740] CPU features: detected: Spectre-v2
5736 13:54:46.720528 <6>[ 0.114750] CPU features: detected: Spectre-BHB
5737 13:54:46.727106 <6>[ 0.114754] CPU features: detected: ARM erratum 858921
5738 13:54:46.730478 <6>[ 0.114759] Detected VIPT I-cache on CPU4
5739 13:54:46.737145 <4>[ 0.114808] cacheinfo: Unable to detect cache hierarchy for CPU 4
5740 13:54:46.744082 <6>[ 0.114816] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5741 13:54:46.750656 <6>[ 0.114824] arch_timer: Enabling local workaround for ARM erratum 858921
5742 13:54:46.757420 <6>[ 0.114835] arch_timer: CPU4: Trapping CNTVCT access
5743 13:54:46.763860 <6>[ 0.114843] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5744 13:54:46.767221 <6>[ 0.115327] Detected VIPT I-cache on CPU5
5745 13:54:46.773773 <4>[ 0.115367] cacheinfo: Unable to detect cache hierarchy for CPU 5
5746 13:54:46.780542 <6>[ 0.115373] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5747 13:54:46.787173 <6>[ 0.115380] arch_timer: Enabling local workaround for ARM erratum 858921
5748 13:54:46.793547 <6>[ 0.115386] arch_timer: CPU5: Trapping CNTVCT access
5749 13:54:46.800212 <6>[ 0.115391] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5750 13:54:46.803978 <6>[ 0.115928] Detected VIPT I-cache on CPU6
5751 13:54:46.810252 <4>[ 0.115974] cacheinfo: Unable to detect cache hierarchy for CPU 6
5752 13:54:46.817395 <6>[ 0.115980] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5753 13:54:46.823945 <6>[ 0.115987] arch_timer: Enabling local workaround for ARM erratum 858921
5754 13:54:46.830223 <6>[ 0.115993] arch_timer: CPU6: Trapping CNTVCT access
5755 13:54:46.837063 <6>[ 0.115998] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5756 13:54:46.840452 <6>[ 0.116528] Detected VIPT I-cache on CPU7
5757 13:54:46.847210 <4>[ 0.116572] cacheinfo: Unable to detect cache hierarchy for CPU 7
5758 13:54:46.853877 <6>[ 0.116578] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5759 13:54:46.860608 <6>[ 0.116585] arch_timer: Enabling local workaround for ARM erratum 858921
5760 13:54:46.867357 <6>[ 0.116592] arch_timer: CPU7: Trapping CNTVCT access
5761 13:54:46.873678 <6>[ 0.116597] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5762 13:54:46.877186 <6>[ 0.116645] smp: Brought up 1 node, 8 CPUs
5763 13:54:46.884057 <6>[ 0.355516] SMP: Total of 8 processors activated.
5764 13:54:46.887340 <6>[ 0.360452] CPU features: detected: 32-bit EL0 Support
5765 13:54:46.893530 <6>[ 0.365823] CPU features: detected: 32-bit EL1 Support
5766 13:54:46.896837 <6>[ 0.371190] CPU features: detected: CRC32 instructions
5767 13:54:46.903848 <6>[ 0.376617] CPU: All CPU(s) started at EL2
5768 13:54:46.910329 <6>[ 0.380955] alternatives: applying system-wide alternatives
5769 13:54:46.914083 <6>[ 0.388986] devtmpfs: initialized
5770 13:54:46.928611 <6>[ 0.397938] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5771 13:54:46.938482 <6>[ 0.407887] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5772 13:54:46.941859 <6>[ 0.415610] pinctrl core: initialized pinctrl subsystem
5773 13:54:46.949898 <6>[ 0.422724] DMI not present or invalid.
5774 13:54:46.956680 <6>[ 0.427094] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5775 13:54:46.963391 <6>[ 0.433998] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5776 13:54:46.973081 <6>[ 0.441527] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5777 13:54:46.980088 <6>[ 0.449776] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5778 13:54:46.986774 <6>[ 0.457953] audit: initializing netlink subsys (disabled)
5779 13:54:46.993265 <5>[ 0.463658] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5780 13:54:46.999960 <6>[ 0.464630] thermal_sys: Registered thermal governor 'step_wise'
5781 13:54:47.006775 <6>[ 0.471624] thermal_sys: Registered thermal governor 'power_allocator'
5782 13:54:47.010034 <6>[ 0.477922] cpuidle: using governor menu
5783 13:54:47.016635 <6>[ 0.488885] NET: Registered PF_QIPCRTR protocol family
5784 13:54:47.023516 <6>[ 0.494381] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5785 13:54:47.030097 <6>[ 0.501479] ASID allocator initialised with 32768 entries
5786 13:54:47.033507 <6>[ 0.508241] Serial: AMBA PL011 UART driver
5787 13:54:47.046762 <4>[ 0.519566] Trying to register duplicate clock ID: 113
5788 13:54:47.106317 <6>[ 0.575954] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5789 13:54:47.120819 <6>[ 0.590327] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5790 13:54:47.124253 <6>[ 0.600101] KASLR enabled
5791 13:54:47.138721 <6>[ 0.608073] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5792 13:54:47.145317 <6>[ 0.615076] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5793 13:54:47.151849 <6>[ 0.621553] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5794 13:54:47.159314 <6>[ 0.628544] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5795 13:54:47.165615 <6>[ 0.635017] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5796 13:54:47.171886 <6>[ 0.642007] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5797 13:54:47.178917 <6>[ 0.648481] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5798 13:54:47.185423 <6>[ 0.655471] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5799 13:54:47.189150 <6>[ 0.663042] ACPI: Interpreter disabled.
5800 13:54:47.198253 <6>[ 0.671011] iommu: Default domain type: Translated
5801 13:54:47.205167 <6>[ 0.676119] iommu: DMA domain TLB invalidation policy: strict mode
5802 13:54:47.207952 <5>[ 0.682750] SCSI subsystem initialized
5803 13:54:47.214633 <6>[ 0.687159] usbcore: registered new interface driver usbfs
5804 13:54:47.221483 <6>[ 0.692886] usbcore: registered new interface driver hub
5805 13:54:47.225180 <6>[ 0.698429] usbcore: registered new device driver usb
5806 13:54:47.232164 <6>[ 0.704733] pps_core: LinuxPPS API ver. 1 registered
5807 13:54:47.242075 <6>[ 0.709918] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5808 13:54:47.245453 <6>[ 0.719243] PTP clock support registered
5809 13:54:47.248242 <6>[ 0.723494] EDAC MC: Ver: 3.0.0
5810 13:54:47.256636 <6>[ 0.729132] FPGA manager framework
5811 13:54:47.259694 <6>[ 0.732817] Advanced Linux Sound Architecture Driver Initialized.
5812 13:54:47.263511 <6>[ 0.739578] vgaarb: loaded
5813 13:54:47.270435 <6>[ 0.742708] clocksource: Switched to clocksource arch_sys_counter
5814 13:54:47.276851 <5>[ 0.749138] VFS: Disk quotas dquot_6.6.0
5815 13:54:47.283530 <6>[ 0.753315] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5816 13:54:47.286727 <6>[ 0.760488] pnp: PnP ACPI: disabled
5817 13:54:47.294450 <6>[ 0.767382] NET: Registered PF_INET protocol family
5818 13:54:47.301133 <6>[ 0.772613] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5819 13:54:47.313159 <6>[ 0.782527] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5820 13:54:47.323089 <6>[ 0.791282] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5821 13:54:47.329535 <6>[ 0.799233] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5822 13:54:47.336340 <6>[ 0.807466] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5823 13:54:47.342938 <6>[ 0.815559] TCP: Hash tables configured (established 32768 bind 32768)
5824 13:54:47.352960 <6>[ 0.822386] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5825 13:54:47.359913 <6>[ 0.829361] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5826 13:54:47.366420 <6>[ 0.836843] NET: Registered PF_UNIX/PF_LOCAL protocol family
5827 13:54:47.369503 <6>[ 0.842937] RPC: Registered named UNIX socket transport module.
5828 13:54:47.376496 <6>[ 0.849081] RPC: Registered udp transport module.
5829 13:54:47.379941 <6>[ 0.854005] RPC: Registered tcp transport module.
5830 13:54:47.386482 <6>[ 0.858927] RPC: Registered tcp NFSv4.1 backchannel transport module.
5831 13:54:47.393080 <6>[ 0.865580] PCI: CLS 0 bytes, default 64
5832 13:54:47.396195 <6>[ 0.869875] Unpacking initramfs...
5833 13:54:47.409783 <6>[ 0.879275] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5834 13:54:47.419800 <6>[ 0.887895] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5835 13:54:47.422905 <6>[ 0.896743] kvm [1]: IPA Size Limit: 40 bits
5836 13:54:47.430192 <6>[ 0.903067] kvm [1]: vgic-v2@c420000
5837 13:54:47.433351 <6>[ 0.906883] kvm [1]: GIC system register CPU interface enabled
5838 13:54:47.440154 <6>[ 0.913061] kvm [1]: vgic interrupt IRQ18
5839 13:54:47.443583 <6>[ 0.917423] kvm [1]: Hyp mode initialized successfully
5840 13:54:47.450772 <5>[ 0.923679] Initialise system trusted keyrings
5841 13:54:47.457402 <6>[ 0.928508] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5842 13:54:47.465800 <6>[ 0.938403] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5843 13:54:47.472043 <5>[ 0.944882] NFS: Registering the id_resolver key type
5844 13:54:47.475617 <5>[ 0.950189] Key type id_resolver registered
5845 13:54:47.482188 <5>[ 0.954604] Key type id_legacy registered
5846 13:54:47.489102 <6>[ 0.958916] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5847 13:54:47.495523 <6>[ 0.965835] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5848 13:54:47.502074 <6>[ 0.973614] 9p: Installing v9fs 9p2000 file system support
5849 13:54:47.530089 <5>[ 1.002872] Key type asymmetric registered
5850 13:54:47.533624 <5>[ 1.007217] Asymmetric key parser 'x509' registered
5851 13:54:47.543776 <6>[ 1.012381] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5852 13:54:47.546697 <6>[ 1.019997] io scheduler mq-deadline registered
5853 13:54:47.549899 <6>[ 1.024756] io scheduler kyber registered
5854 13:54:47.572592 <6>[ 1.045571] EINJ: ACPI disabled.
5855 13:54:47.579366 <4>[ 1.049353] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5856 13:54:47.617613 <6>[ 1.090276] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5857 13:54:47.626421 <6>[ 1.098802] printk: console [ttyS0] disabled
5858 13:54:47.653818 <6>[ 1.123446] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5859 13:54:47.660697 <6>[ 1.132921] printk: console [ttyS0] enabled
5860 13:54:47.663926 <6>[ 1.132921] printk: console [ttyS0] enabled
5861 13:54:47.670432 <6>[ 1.141840] printk: bootconsole [mtk8250] disabled
5862 13:54:47.673685 <6>[ 1.141840] printk: bootconsole [mtk8250] disabled
5863 13:54:47.683631 <3>[ 1.152380] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5864 13:54:47.690619 <3>[ 1.160764] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5865 13:54:47.720000 <6>[ 1.189181] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5866 13:54:47.726186 <6>[ 1.198845] serial serial0: tty port ttyS1 registered
5867 13:54:47.732945 <6>[ 1.205452] SuperH (H)SCI(F) driver initialized
5868 13:54:47.736394 <6>[ 1.210943] msm_serial: driver initialized
5869 13:54:47.751665 <6>[ 1.221280] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5870 13:54:47.761813 <6>[ 1.229871] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5871 13:54:47.768342 <6>[ 1.238446] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5872 13:54:47.778641 <6>[ 1.247016] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5873 13:54:47.785113 <6>[ 1.255670] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5874 13:54:47.794925 <6>[ 1.264333] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5875 13:54:47.805090 <6>[ 1.273071] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5876 13:54:47.811549 <6>[ 1.281814] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5877 13:54:47.821838 <6>[ 1.290379] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5878 13:54:47.828282 <6>[ 1.299179] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5879 13:54:47.838747 <4>[ 1.311616] cacheinfo: Unable to detect cache hierarchy for CPU 0
5880 13:54:47.848061 <6>[ 1.320955] loop: module loaded
5881 13:54:47.860157 <6>[ 1.332929] vsim1: Bringing 1800000uV into 2700000-2700000uV
5882 13:54:47.878081 <6>[ 1.351032] megasas: 07.719.03.00-rc1
5883 13:54:47.887153 <6>[ 1.359830] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5884 13:54:47.897460 <6>[ 1.370075] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5885 13:54:47.914413 <6>[ 1.386941] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5886 13:54:47.971090 <6>[ 1.437315] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b8
5887 13:54:48.015120 <6>[ 1.487841] Freeing initrd memory: 18276K
5888 13:54:48.030187 <4>[ 1.499696] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5889 13:54:48.037096 <4>[ 1.508925] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
5890 13:54:48.043745 <4>[ 1.515623] Hardware name: Google juniper sku16 board (DT)
5891 13:54:48.046792 <4>[ 1.521362] Call trace:
5892 13:54:48.050809 <4>[ 1.524063] dump_backtrace.part.0+0xe0/0xf0
5893 13:54:48.053968 <4>[ 1.528599] show_stack+0x18/0x30
5894 13:54:48.057249 <4>[ 1.532173] dump_stack_lvl+0x64/0x80
5895 13:54:48.060393 <4>[ 1.536092] dump_stack+0x18/0x34
5896 13:54:48.067257 <4>[ 1.539660] sysfs_warn_dup+0x64/0x80
5897 13:54:48.070429 <4>[ 1.543583] sysfs_do_create_link_sd+0xf0/0x100
5898 13:54:48.074122 <4>[ 1.548370] sysfs_create_link+0x20/0x40
5899 13:54:48.077478 <4>[ 1.552550] bus_add_device+0x64/0x120
5900 13:54:48.084083 <4>[ 1.556554] device_add+0x354/0x7ec
5901 13:54:48.087324 <4>[ 1.560300] of_device_add+0x44/0x60
5902 13:54:48.091163 <4>[ 1.564134] of_platform_device_create_pdata+0x90/0x124
5903 13:54:48.096974 <4>[ 1.569616] of_platform_bus_create+0x154/0x380
5904 13:54:48.100260 <4>[ 1.574401] of_platform_populate+0x50/0xfc
5905 13:54:48.106803 <4>[ 1.578840] parse_mtd_partitions+0x1d8/0x4e0
5906 13:54:48.110193 <4>[ 1.583457] mtd_device_parse_register+0xec/0x2e0
5907 13:54:48.113596 <4>[ 1.588418] spi_nor_probe+0x280/0x2f4
5908 13:54:48.117183 <4>[ 1.592422] spi_mem_probe+0x6c/0xc0
5909 13:54:48.120234 <4>[ 1.596254] spi_probe+0x84/0xe4
5910 13:54:48.127213 <4>[ 1.599739] really_probe+0xbc/0x2dc
5911 13:54:48.130442 <4>[ 1.603569] __driver_probe_device+0x78/0x114
5912 13:54:48.133810 <4>[ 1.608179] driver_probe_device+0xd8/0x15c
5913 13:54:48.140359 <4>[ 1.612617] __device_attach_driver+0xb8/0x134
5914 13:54:48.143837 <4>[ 1.617316] bus_for_each_drv+0x7c/0xd4
5915 13:54:48.146946 <4>[ 1.621409] __device_attach+0x9c/0x1a0
5916 13:54:48.153849 <4>[ 1.625499] device_initial_probe+0x14/0x20
5917 13:54:48.157156 <4>[ 1.629938] bus_probe_device+0x98/0xa0
5918 13:54:48.160404 <4>[ 1.634027] device_add+0x3c0/0x7ec
5919 13:54:48.164081 <4>[ 1.637772] __spi_add_device+0x78/0x120
5920 13:54:48.167265 <4>[ 1.641949] spi_add_device+0x44/0x80
5921 13:54:48.173736 <4>[ 1.645866] spi_register_controller+0x704/0xb20
5922 13:54:48.177605 <4>[ 1.650737] devm_spi_register_controller+0x4c/0xac
5923 13:54:48.180689 <4>[ 1.655870] mtk_spi_probe+0x4f4/0x684
5924 13:54:48.187154 <4>[ 1.659875] platform_probe+0x68/0xc0
5925 13:54:48.190342 <4>[ 1.663793] really_probe+0xbc/0x2dc
5926 13:54:48.193948 <4>[ 1.667623] __driver_probe_device+0x78/0x114
5927 13:54:48.197327 <4>[ 1.672234] driver_probe_device+0xd8/0x15c
5928 13:54:48.203913 <4>[ 1.676671] __driver_attach+0x94/0x19c
5929 13:54:48.207824 <4>[ 1.680762] bus_for_each_dev+0x74/0xd0
5930 13:54:48.210926 <4>[ 1.684855] driver_attach+0x24/0x30
5931 13:54:48.214128 <4>[ 1.688685] bus_add_driver+0x154/0x20c
5932 13:54:48.217443 <4>[ 1.692774] driver_register+0x78/0x130
5933 13:54:48.224173 <4>[ 1.696864] __platform_driver_register+0x28/0x34
5934 13:54:48.227338 <4>[ 1.701824] mtk_spi_driver_init+0x1c/0x28
5935 13:54:48.230786 <4>[ 1.706179] do_one_initcall+0x64/0x1dc
5936 13:54:48.237571 <4>[ 1.710270] kernel_init_freeable+0x218/0x284
5937 13:54:48.240797 <4>[ 1.714884] kernel_init+0x24/0x12c
5938 13:54:48.244462 <4>[ 1.718629] ret_from_fork+0x10/0x20
5939 13:54:48.254902 <6>[ 1.727528] tun: Universal TUN/TAP device driver, 1.6
5940 13:54:48.258459 <6>[ 1.733814] thunder_xcv, ver 1.0
5941 13:54:48.261297 <6>[ 1.737331] thunder_bgx, ver 1.0
5942 13:54:48.265010 <6>[ 1.740837] nicpf, ver 1.0
5943 13:54:48.275991 <6>[ 1.745201] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5944 13:54:48.279294 <6>[ 1.752685] hns3: Copyright (c) 2017 Huawei Corporation.
5945 13:54:48.282394 <6>[ 1.758285] hclge is initializing
5946 13:54:48.289470 <6>[ 1.761871] e1000: Intel(R) PRO/1000 Network Driver
5947 13:54:48.295824 <6>[ 1.767005] e1000: Copyright (c) 1999-2006 Intel Corporation.
5948 13:54:48.299182 <6>[ 1.773031] e1000e: Intel(R) PRO/1000 Network Driver
5949 13:54:48.306132 <6>[ 1.778253] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5950 13:54:48.312974 <6>[ 1.784447] igb: Intel(R) Gigabit Ethernet Network Driver
5951 13:54:48.319262 <6>[ 1.790104] igb: Copyright (c) 2007-2014 Intel Corporation.
5952 13:54:48.325825 <6>[ 1.795950] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5953 13:54:48.329138 <6>[ 1.802474] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5954 13:54:48.336206 <6>[ 1.809028] sky2: driver version 1.30
5955 13:54:48.342941 <6>[ 1.814279] usbcore: registered new device driver r8152-cfgselector
5956 13:54:48.349642 <6>[ 1.820825] usbcore: registered new interface driver r8152
5957 13:54:48.353163 <6>[ 1.826654] VFIO - User Level meta-driver version: 0.3
5958 13:54:48.361848 <6>[ 1.834423] mtu3 11201000.usb: uwk - reg:0x420, version:101
5959 13:54:48.368432 <4>[ 1.840297] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5960 13:54:48.375192 <6>[ 1.847569] mtu3 11201000.usb: dr_mode: 1, drd: auto
5961 13:54:48.382129 <6>[ 1.852795] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5962 13:54:48.385649 <6>[ 1.858978] mtu3 11201000.usb: usb3-drd: 0
5963 13:54:48.392195 <6>[ 1.864538] mtu3 11201000.usb: xHCI platform device register success...
5964 13:54:48.403690 <4>[ 1.873208] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5965 13:54:48.410476 <6>[ 1.881174] xhci-mtk 11200000.usb: xHCI Host Controller
5966 13:54:48.417376 <6>[ 1.886683] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5967 13:54:48.424064 <6>[ 1.894411] xhci-mtk 11200000.usb: USB3 root hub has no ports
5968 13:54:48.430645 <6>[ 1.900420] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5969 13:54:48.437474 <6>[ 1.909845] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5970 13:54:48.444175 <6>[ 1.915923] xhci-mtk 11200000.usb: xHCI Host Controller
5971 13:54:48.450918 <6>[ 1.921412] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5972 13:54:48.457219 <6>[ 1.929070] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5973 13:54:48.460901 <6>[ 1.935892] hub 1-0:1.0: USB hub found
5974 13:54:48.467480 <6>[ 1.939922] hub 1-0:1.0: 1 port detected
5975 13:54:48.477828 <6>[ 1.945284] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5976 13:54:48.481055 <6>[ 1.953901] hub 2-0:1.0: USB hub found
5977 13:54:48.487494 <3>[ 1.957932] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5978 13:54:48.494630 <6>[ 1.965817] usbcore: registered new interface driver usb-storage
5979 13:54:48.500935 <6>[ 1.972421] usbcore: registered new device driver onboard-usb-hub
5980 13:54:48.517333 <4>[ 1.986804] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
5981 13:54:48.526662 <6>[ 1.999107] mt6397-rtc mt6358-rtc: registered as rtc0
5982 13:54:48.536277 <6>[ 2.004587] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-18T13:54:48 UTC (1721310888)
5983 13:54:48.539829 <6>[ 2.014466] i2c_dev: i2c /dev entries driver
5984 13:54:48.551445 <6>[ 2.020883] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5985 13:54:48.561457 <6>[ 2.029204] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5986 13:54:48.564858 <6>[ 2.038108] i2c 4-0058: Fixed dependency cycle(s) with /panel
5987 13:54:48.574683 <6>[ 2.044137] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
5988 13:54:48.590882 <6>[ 2.063567] cpu cpu0: EM: created perf domain
5989 13:54:48.600747 <6>[ 2.069087] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
5990 13:54:48.607445 <6>[ 2.080368] cpu cpu4: EM: created perf domain
5991 13:54:48.614529 <6>[ 2.087484] sdhci: Secure Digital Host Controller Interface driver
5992 13:54:48.621160 <6>[ 2.093941] sdhci: Copyright(c) Pierre Ossman
5993 13:54:48.628161 <6>[ 2.099338] Synopsys Designware Multimedia Card Interface Driver
5994 13:54:48.634573 <6>[ 2.099868] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
5995 13:54:48.638323 <6>[ 2.106385] sdhci-pltfm: SDHCI platform and OF driver helper
5996 13:54:48.646725 <6>[ 2.119284] ledtrig-cpu: registered to indicate activity on CPUs
5997 13:54:48.654438 <6>[ 2.127025] usbcore: registered new interface driver usbhid
5998 13:54:48.657648 <6>[ 2.132864] usbhid: USB HID core driver
5999 13:54:48.668143 <6>[ 2.137179] spi_master spi2: will run message pump with realtime priority
6000 13:54:48.675048 <4>[ 2.137335] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6001 13:54:48.681806 <4>[ 2.151468] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6002 13:54:48.695154 <6>[ 2.156644] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6003 13:54:48.708669 <6>[ 2.173556] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6004 13:54:48.715525 <4>[ 2.180945] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6005 13:54:48.722143 <6>[ 2.194620] cros-ec-spi spi2.0: Chrome EC device registered
6006 13:54:48.732516 <4>[ 2.201576] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6007 13:54:48.743703 <4>[ 2.213135] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6008 13:54:48.750467 <4>[ 2.222001] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6009 13:54:48.763097 <6>[ 2.232568] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6010 13:54:48.774791 <6>[ 2.247524] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6011 13:54:48.781482 <6>[ 2.253811] mmc0: new HS400 MMC card at address 0001
6012 13:54:48.787978 <6>[ 2.260250] mmcblk0: mmc0:0001 TB2932 29.2 GiB
6013 13:54:48.799027 <6>[ 2.271918] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6014 13:54:48.807517 <6>[ 2.280278] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
6015 13:54:48.817562 <6>[ 2.280337] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6016 13:54:48.821077 <6>[ 2.295095] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
6017 13:54:48.834431 <6>[ 2.299367] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6018 13:54:48.844485 <6>[ 2.300291] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6019 13:54:48.851018 <6>[ 2.302029] NET: Registered PF_PACKET protocol family
6020 13:54:48.860911 <6>[ 2.312642] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6021 13:54:48.864289 <6>[ 2.323414] 9pnet: Installing 9P2000 support
6022 13:54:48.871350 <6>[ 2.328624] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
6023 13:54:48.877994 <5>[ 2.338540] Key type dns_resolver registered
6024 13:54:48.880840 <6>[ 2.355127] registered taskstats version 1
6025 13:54:48.887516 <5>[ 2.359518] Loading compiled-in X.509 certificates
6026 13:54:48.894484 <6>[ 2.366725] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6027 13:54:48.937425 <3>[ 2.406649] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6028 13:54:48.968937 <6>[ 2.434920] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6029 13:54:48.980030 <6>[ 2.449176] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6030 13:54:48.989896 <6>[ 2.457757] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6031 13:54:48.996412 <6>[ 2.466414] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6032 13:54:49.006545 <6>[ 2.475013] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6033 13:54:49.013036 <6>[ 2.483546] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6034 13:54:49.022639 <6>[ 2.492068] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6035 13:54:49.033012 <6>[ 2.500614] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6036 13:54:49.039519 <6>[ 2.510000] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6037 13:54:49.045934 <6>[ 2.517565] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6038 13:54:49.052590 <6>[ 2.524867] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6039 13:54:49.059648 <6>[ 2.532180] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6040 13:54:49.070414 <6>[ 2.539655] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6041 13:54:49.073497 <6>[ 2.548308] hub 1-1:1.0: USB hub found
6042 13:54:49.080297 <6>[ 2.552442] panfrost 13040000.gpu: clock rate = 511999970
6043 13:54:49.083650 <6>[ 2.558105] hub 1-1:1.0: 3 ports detected
6044 13:54:49.093701 <6>[ 2.558686] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6045 13:54:49.103411 <6>[ 2.573019] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6046 13:54:49.110213 <6>[ 2.581034] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6047 13:54:49.123406 <6>[ 2.589470] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6048 13:54:49.130067 <6>[ 2.601546] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6049 13:54:49.141775 <6>[ 2.611183] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6050 13:54:49.152001 <6>[ 2.620427] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6051 13:54:49.161919 <6>[ 2.629582] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6052 13:54:49.168763 <6>[ 2.638713] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6053 13:54:49.178667 <6>[ 2.647842] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6054 13:54:49.188057 <6>[ 2.657144] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6055 13:54:49.198549 <6>[ 2.666450] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6056 13:54:49.208224 <6>[ 2.675926] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6057 13:54:49.218293 <6>[ 2.685404] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6058 13:54:49.224913 <6>[ 2.694532] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6059 13:54:49.298555 <6>[ 2.767956] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6060 13:54:49.308340 <6>[ 2.776871] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6061 13:54:49.319738 <6>[ 2.789049] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6062 13:54:49.385364 <6>[ 2.854748] usb 1-1.1: new high-speed USB device number 3 using xhci-mtk
6063 13:54:49.486912 <6>[ 2.959546] hub 1-1.1:1.0: USB hub found
6064 13:54:49.490130 <6>[ 2.963774] hub 1-1.1:1.0: 4 ports detected
6065 13:54:50.014777 <6>[ 3.471069] Console: switching to colour frame buffer device 170x48
6066 13:54:50.024880 <6>[ 3.494281] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6067 13:54:50.050110 <6>[ 3.516312] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6068 13:54:50.070013 <6>[ 3.535939] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6069 13:54:50.079766 <6>[ 3.548630] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6070 13:54:50.086375 <6>[ 3.557270] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6071 13:54:50.100018 <6>[ 3.566042] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6072 13:54:50.113681 <6>[ 3.582778] usb 1-1.2: new high-speed USB device number 4 using xhci-mtk
6073 13:54:50.123191 <6>[ 3.586365] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6074 13:54:50.129700 <6>[ 3.601249] Trying to probe devices needed for running init ...
6075 13:54:50.144799 <3>[ 3.614074] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: could not get audiosys reset:-517
6076 13:54:50.160176 <6>[ 3.626326] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6077 13:54:50.297524 <6>[ 3.766922] r8152-cfgselector 1-1.2: reset high-speed USB device number 4 using xhci-mtk
6078 13:54:50.409383 <4>[ 3.878489] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6079 13:54:50.419299 <4>[ 3.887746] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6080 13:54:50.458673 <6>[ 3.931494] r8152 1-1.2:1.0 eth0: v1.12.13
6081 13:54:50.479381 <6>[ 3.945515] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6082 13:54:50.486441 <6>[ 3.956673] usb 1-1.1.1: new high-speed USB device number 5 using xhci-mtk
6083 13:54:50.673509 <6>[ 4.142885] usb 1-1.3: new high-speed USB device number 6 using xhci-mtk
6084 13:54:50.813513 <6>[ 4.279454] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6085 13:54:50.865695 <6>[ 4.335251] r8152-cfgselector 1-1.1.1: reset high-speed USB device number 5 using xhci-mtk
6086 13:54:50.994106 <4>[ 4.464065] r8152 1-1.1.1:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6087 13:54:51.008917 <4>[ 4.478716] r8152 1-1.1.1:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6088 13:54:51.072387 <6>[ 4.544959] r8152 1-1.1.1:1.0 eth1: v1.12.13
6089 13:54:51.101028 <6>[ 4.567232] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6090 13:54:51.128244 <6>[ 4.594430] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6091 13:54:52.117509 <6>[ 5.590148] r8152 1-1.2:1.0 eth0: carrier on
6092 13:54:54.369965 <5>[ 5.610743] Sending DHCP requests .., OK
6093 13:54:54.382620 <6>[ 7.852128] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.17
6094 13:54:54.392379 <6>[ 7.865652] IP-Config: Complete:
6095 13:54:54.407981 <6>[ 7.874289] device=eth0, hwaddr=00:e0:4c:68:03:2b, ipaddr=192.168.201.17, mask=255.255.255.0, gw=192.168.201.1
6096 13:54:54.420778 <6>[ 7.890305] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5, domain=lava-rack, nis-domain=(none)
6097 13:54:54.434347 <6>[ 7.903785] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6098 13:54:54.442192 <6>[ 7.903793] nameserver0=192.168.201.1
6099 13:54:54.471585 <6>[ 7.944159] clk: Disabling unused clocks
6100 13:54:54.478691 <6>[ 7.954395] ALSA device list:
6101 13:54:54.486736 <6>[ 7.959656] No soundcards found.
6102 13:54:54.494756 <6>[ 7.967595] Freeing unused kernel memory: 8512K
6103 13:54:54.502076 <6>[ 7.974486] Run /init as init process
6104 13:54:54.512508 Loading, please wait...
6105 13:54:54.545808 Starting systemd-udevd version 252.22-1~deb12u1
6106 13:54:54.853644 <6>[ 8.322872] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6107 13:54:54.863297 <3>[ 8.332342] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6108 13:54:54.870156 <3>[ 8.333133] thermal_sys: Failed to find 'trips' node
6109 13:54:54.877163 <3>[ 8.342382] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6110 13:54:54.883811 <3>[ 8.347598] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6111 13:54:54.890151 <4>[ 8.351716] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6112 13:54:54.903668 <3>[ 8.354392] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6113 13:54:54.910226 <3>[ 8.361967] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6114 13:54:54.916538 <4>[ 8.362088] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6115 13:54:54.926865 <3>[ 8.368994] elan_i2c 2-0015: Error applying setting, reverse things back
6116 13:54:54.933584 <3>[ 8.375308] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6117 13:54:54.939960 <4>[ 8.380327] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6118 13:54:54.949748 <3>[ 8.388502] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6119 13:54:54.956612 <3>[ 8.399093] thermal_sys: Failed to find 'trips' node
6120 13:54:54.963231 <3>[ 8.403138] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6121 13:54:54.970077 <3>[ 8.411335] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6122 13:54:54.980183 <3>[ 8.411349] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6123 13:54:54.986833 <4>[ 8.411354] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6124 13:54:54.990051 <6>[ 8.417600] mc: Linux media interface: v0.10
6125 13:54:55.000578 <4>[ 8.420262] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6126 13:54:55.011584 <3>[ 8.428529] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6127 13:54:55.021571 <6>[ 8.433819] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6128 13:54:55.031282 <5>[ 8.436531] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6129 13:54:55.038380 <6>[ 8.440111] r8152 1-1.1.1:1.0 enx88541f0f7aca: renamed from eth1
6130 13:54:55.044707 <6>[ 8.440277] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6131 13:54:55.051808 <6>[ 8.440866] cs_system_cfg: CoreSight Configuration manager initialised
6132 13:54:55.062092 <3>[ 8.441299] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6133 13:54:55.072969 <3>[ 8.441308] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6134 13:54:55.079379 <6>[ 8.449288] videodev: Linux video capture interface: v2.00
6135 13:54:55.089277 <6>[ 8.450260] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6136 13:54:55.102319 <3>[ 8.450578] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6137 13:54:55.109189 <5>[ 8.451184] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6138 13:54:55.119337 <5>[ 8.451607] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6139 13:54:55.129446 <3>[ 8.457090] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6140 13:54:55.136042 <3>[ 8.457100] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6141 13:54:55.146133 <6>[ 8.515715] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6142 13:54:55.156127 <3>[ 8.515848] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6143 13:54:55.162877 <6>[ 8.531106] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6144 13:54:55.165777 <3>[ 8.541180] mtk-scp 10500000.scp: invalid resource
6145 13:54:55.175715 <6>[ 8.542364] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6146 13:54:55.182706 <6>[ 8.550666] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6147 13:54:55.192162 <4>[ 8.556455] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6148 13:54:55.198721 <6>[ 8.556981] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6149 13:54:55.205557 <6>[ 8.557578] Bluetooth: Core ver 2.22
6150 13:54:55.212403 <6>[ 8.557618] NET: Registered PF_BLUETOOTH protocol family
6151 13:54:55.218611 <6>[ 8.557620] Bluetooth: HCI device and connection manager initialized
6152 13:54:55.225482 <6>[ 8.557632] Bluetooth: HCI socket layer initialized
6153 13:54:55.228852 <6>[ 8.557636] Bluetooth: L2CAP socket layer initialized
6154 13:54:55.235916 <6>[ 8.557644] Bluetooth: SCO socket layer initialized
6155 13:54:55.245880 <6>[ 8.567316] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6156 13:54:55.249138 <6>[ 8.569422] remoteproc remoteproc0: scp is available
6157 13:54:55.259707 <4>[ 8.569704] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6158 13:54:55.266283 <6>[ 8.569714] remoteproc remoteproc0: powering up scp
6159 13:54:55.276219 <4>[ 8.569745] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6160 13:54:55.282716 <3>[ 8.569752] remoteproc remoteproc0: request_firmware failed: -2
6161 13:54:55.285926 <6>[ 8.586647] cfg80211: failed to load regulatory.db
6162 13:54:55.292883 <6>[ 8.587147] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6163 13:54:55.303954 <6>[ 8.589046] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6164 13:54:55.310739 <6>[ 8.598001] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6165 13:54:55.316843 <6>[ 8.606049] Bluetooth: HCI UART driver ver 2.3
6166 13:54:55.323710 <6>[ 8.614584] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6167 13:54:55.330111 <6>[ 8.615589] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6168 13:54:55.343706 <6>[ 8.621626] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6169 13:54:55.350288 <6>[ 8.621763] usbcore: registered new interface driver uvcvideo
6170 13:54:55.356948 <6>[ 8.623585] Bluetooth: HCI UART protocol H4 registered
6171 13:54:55.363678 <6>[ 8.632594] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6172 13:54:55.373480 Begin: Loading essential drivers<6>[ 8.632598] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6173 13:54:55.377001 ... done.
6174 13:54:55.383602 Begin: Running /scripts/init-pre<6>[ 8.640079] Bluetooth: HCI UART protocol LL registered
6175 13:54:55.386850 mount ... done.
6176 13:54:55.397051 Begin: Mounting root file syste<6>[ 8.652985] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6177 13:54:55.400490 m ... Begin: Running /scripts/nfs-top ... done.
6178 13:54:55.406987 <6>[ 8.653844] Bluetooth: HCI UART protocol Three-wire (H5) registered
6179 13:54:55.407501
6180 13:54:55.423526 Begin: Running /scripts/nfs-premount ... Waitin<3>[ 8.654111] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6181 13:54:55.433067 g up to 60 secs for any ethernet<3>[ 8.654766] debugfs: File 'Playback' in directory 'dapm' already present!
6182 13:54:55.433526 to become available
6183 13:54:55.443286 Device /sy<3>[ 8.654771] debugfs: File 'Capture' in directory 'dapm' already present!
6184 13:54:55.456460 s/class/net/enx88541f0f7aca foun<6>[ 8.657318] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6185 13:54:55.456966 d
6186 13:54:55.457343 done.
6187 13:54:55.463373 Begin: Waiting up to 1<3>[ 8.660271] thermal_sys: Failed to find 'trips' node
6188 13:54:55.473022 80 secs for any network device t<3>[ 8.660280] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6189 13:54:55.476492 o become available ... done.
6190 13:54:55.486217 <3>[ 8.660290] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6191 13:54:55.492978 <4>[ 8.660296] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6192 13:54:55.504941 <6>[ 8.661475] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6193 13:54:55.514674 <6>[ 8.663432] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6194 13:54:55.526803 <6>[ 8.663445] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6195 13:54:55.540545 <6>[ 8.663781] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6196 13:54:55.547049 <6>[ 8.670613] Bluetooth: HCI UART protocol Broadcom registered
6197 13:54:55.558647 <6>[ 8.812068] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6198 13:54:55.565038 <6>[ 8.821538] Bluetooth: HCI UART protocol QCA registered
6199 13:54:55.572722 <6>[ 8.821558] Bluetooth: HCI UART protocol Marvell registered
6200 13:54:55.579808 <6>[ 8.823510] Bluetooth: hci0: setting up ROME/QCA6390
6201 13:54:55.586654 <4>[ 8.832692] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6202 13:54:55.593167 <4>[ 8.832692] Fallback method does not support PEC.
6203 13:54:55.599706 <3>[ 9.049486] Bluetooth: hci0: Frame reassembly failed (-84)
6204 13:54:55.610273 <3>[ 9.053141] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6205 13:54:55.691726 <6>[ 9.157327] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6206 13:54:55.701742 IP-Config: eth0 <3>[ 9.166204] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6207 13:54:55.704870 hardware address 00:e0:4c:68:03:2b mtu 1500 DHCP
6208 13:54:55.737168 IP-Config: enx88541f0f7aca hardware address 88:54:1f:0f:7a:ca mtu 1500 DHCP
6209 13:54:55.745002 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6210 13:54:55.751937 address: 192.168.201.17 broadcast: 192.168.201.255 netmask: 255.255.255.0
6211 13:54:55.758599 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6212 13:54:55.768874 host : mt8183-kukui-<4>[ 9.238553] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6213 13:54:55.771795 jacuzzi-juniper-sku16-cbg-5
6214 13:54:55.778524 domain : lava-rack
6215 13:54:55.788548 rootserver: 19<4>[ 9.257596] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6216 13:54:55.788953 2.168.201.1 rootpath:
6217 13:54:55.792196 filename :
6218 13:54:55.805722 <4>[ 9.274911] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6219 13:54:55.812942 <4>[ 9.285912] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6220 13:54:55.847949 <6>[ 9.320775] Bluetooth: hci0: QCA Product ID :0x00000008
6221 13:54:55.857965 <6>[ 9.330768] Bluetooth: hci0: QCA SOC Version :0x00000044
6222 13:54:55.868029 <6>[ 9.340598] Bluetooth: hci0: QCA ROM Version :0x00000302
6223 13:54:55.876803 <6>[ 9.349571] Bluetooth: hci0: QCA Patch Version:0x00000111
6224 13:54:55.885257 <6>[ 9.358206] Bluetooth: hci0: QCA controller version 0x00440302
6225 13:54:55.897263 <6>[ 9.366952] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6226 13:54:55.907540 <4>[ 9.376055] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6227 13:54:55.917744 <3>[ 9.387316] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6228 13:54:55.924694 <3>[ 9.397463] Bluetooth: hci0: QCA Failed to download patch (-2)
6229 13:54:55.928038 done.
6230 13:54:55.936885 Begin: Running /scripts/nfs-bottom ... done.
6231 13:54:55.948523 Begin: Running /scripts/init-bottom ... done.
6232 13:54:57.334275 <6>[ 10.806676] NET: Registered PF_INET6 protocol family
6233 13:54:57.346329 <6>[ 10.818931] Segment Routing with IPv6
6234 13:54:57.353216 <6>[ 10.825993] In-situ OAM (IOAM) with IPv6
6235 13:54:57.546211 <30>[ 10.992198] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6236 13:54:57.567424 <30>[ 11.040147] systemd[1]: Detected architecture arm64.
6237 13:54:57.582210
6238 13:54:57.585119 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6239 13:54:57.585584
6240 13:54:57.607886 <30>[ 11.080427] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6241 13:54:58.782421 <30>[ 12.251732] systemd[1]: Queued start job for default target graphical.target.
6242 13:54:58.822792 <30>[ 12.292283] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6243 13:54:58.835934 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6244 13:54:58.855623 <30>[ 12.325074] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6245 13:54:58.868947 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6246 13:54:58.888110 <30>[ 12.357307] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6247 13:54:58.902098 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6248 13:54:58.919113 <30>[ 12.388406] systemd[1]: Created slice user.slice - User and Session Slice.
6249 13:54:58.931449 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6250 13:54:58.953365 <30>[ 12.419411] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6251 13:54:58.966335 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6252 13:54:58.988896 <30>[ 12.455191] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6253 13:54:59.001574 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6254 13:54:59.027819 <30>[ 12.487109] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6255 13:54:59.047578 <30>[ 12.516787] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6256 13:54:59.055965 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6257 13:54:59.074016 <30>[ 12.543077] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6258 13:54:59.086538 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6259 13:54:59.105564 <30>[ 12.574958] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6260 13:54:59.119573 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6261 13:54:59.134362 <30>[ 12.607003] systemd[1]: Reached target paths.target - Path Units.
6262 13:54:59.149027 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6263 13:54:59.165650 <30>[ 12.634897] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6264 13:54:59.178064 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6265 13:54:59.190351 <30>[ 12.662882] systemd[1]: Reached target slices.target - Slice Units.
6266 13:54:59.204802 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6267 13:54:59.218491 <30>[ 12.690900] systemd[1]: Reached target swap.target - Swaps.
6268 13:54:59.228858 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6269 13:54:59.249705 <30>[ 12.718972] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6270 13:54:59.263184 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6271 13:54:59.282143 <30>[ 12.751390] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6272 13:54:59.295811 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6273 13:54:59.317433 <30>[ 12.786956] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6274 13:54:59.331273 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6275 13:54:59.351251 <30>[ 12.820659] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6276 13:54:59.365429 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6277 13:54:59.382106 <30>[ 12.851646] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6278 13:54:59.394395 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6279 13:54:59.415766 <30>[ 12.885063] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6280 13:54:59.429549 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6281 13:54:59.448500 <30>[ 12.918124] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6282 13:54:59.461936 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6283 13:54:59.478315 <30>[ 12.947510] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6284 13:54:59.491185 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6285 13:54:59.530611 <30>[ 12.999919] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6286 13:54:59.541006 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6287 13:54:59.562667 <30>[ 13.032120] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6288 13:54:59.575407 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6289 13:54:59.634093 <30>[ 13.103476] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6290 13:54:59.647526 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6291 13:54:59.673280 <30>[ 13.135773] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6292 13:54:59.714324 <30>[ 13.183621] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6293 13:54:59.729544 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6294 13:54:59.753156 <30>[ 13.222345] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6295 13:54:59.767448 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6296 13:54:59.830732 <30>[ 13.300166] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6297 13:54:59.842588 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6298 13:54:59.873875 <30>[ 13.342976] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6299 13:54:59.890622 Starting [0;1;39mmodpr<6>[ 13.357968] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6300 13:54:59.893494 obe@drm.service[0m - Load Kernel Module drm...
6301 13:54:59.919551 <30>[ 13.389004] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6302 13:54:59.934866 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6303 13:54:59.960017 <30>[ 13.429355] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6304 13:54:59.974390 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6305 13:55:00.006208 <6>[ 13.478945] fuse: init (API version 7.37)
6306 13:55:00.023174 <30>[ 13.492550] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6307 13:55:00.037115 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6308 13:55:00.064819 <30>[ 13.534167] systemd[1]: Starting systemd-journald.service - Journal Service...
6309 13:55:00.078574 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6310 13:55:00.126105 <30>[ 13.595493] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6311 13:55:00.137289 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6312 13:55:00.166028 <30>[ 13.631964] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6313 13:55:00.178027 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6314 13:55:00.199969 <30>[ 13.669240] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6315 13:55:00.213248 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6316 13:55:00.233710 <30>[ 13.703134] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6317 13:55:00.245146 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6318 13:55:00.271440 <30>[ 13.740978] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6319 13:55:00.283067 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6320 13:55:00.289722 <3>[ 13.760908] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6321 13:55:00.301561 <30>[ 13.770088] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6322 13:55:00.308038 <3>[ 13.776369] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6323 13:55:00.319815 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6324 13:55:00.326451 <3>[ 13.796635] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6325 13:55:00.342554 <30>[ 13.811550] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6326 13:55:00.349266 <3>[ 13.811699] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6327 13:55:00.368332 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug <3>[ 13.835354] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6328 13:55:00.368780 File System.
6329 13:55:00.382546 <3>[ 13.851682] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6330 13:55:00.398530 <30>[ 13.867838] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6331 13:55:00.408844 <3>[ 13.868031] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6332 13:55:00.427404 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static D<3>[ 13.894857] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6333 13:55:00.427942 evice Nodes.
6334 13:55:00.444288 <30>[ 13.916239] systemd[1]: modprobe@configfs.service: Deactivated successfully.
6335 13:55:00.457048 <30>[ 13.926433] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
6336 13:55:00.468450 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6337 13:55:00.486477 <30>[ 13.955664] systemd[1]: Started systemd-journald.service - Journal Service.
6338 13:55:00.497896 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6339 13:55:00.519148 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6340 13:55:00.544523 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6341 13:55:00.564245 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6342 13:55:00.584330 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6343 13:55:00.604416 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6344 13:55:00.623787 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6345 13:55:00.643283 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6346 13:55:00.663547 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6347 13:55:00.684811 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6348 13:55:00.739600 Mounting [0;1;39msys-fs-fuse-conne…<4>[ 14.211405] power_supply_show_property: 2 callbacks suppressed
6349 13:55:00.750058 [0m - FUSE Contr<3>[ 14.211416] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6350 13:55:00.760175 ol File System..<3>[ 14.224570] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6351 13:55:00.760485 .
6352 13:55:00.779347 <4>[ 14.227793] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6353 13:55:00.793330 <3>[ 14.227799] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6354 13:55:00.818236 Mounting [0;1;39msys-kernel-config…ernel Configuration File System..<3>[ 14.286122] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6355 13:55:00.818745 .
6356 13:55:00.835259 <3>[ 14.304161] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6357 13:55:00.851439 <3>[ 14.320639] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6358 13:55:00.868669 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage..<3>[ 14.336818] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6359 13:55:00.869184 .
6360 13:55:00.884799 <3>[ 14.353691] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6361 13:55:00.902230 Starting [0;1;39msyste<3>[ 14.369517] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6362 13:55:00.905322 md-random-se…ice[0m - Load/Save Random Seed...
6363 13:55:00.919483 <3>[ 14.388441] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6364 13:55:00.935369 <3>[ 14.404360] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6365 13:55:00.957301 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables..<46>[ 14.426263] systemd-journald[316]: Received client request to flush runtime journal.
6366 13:55:00.957737 .
6367 13:55:00.985994 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6368 13:55:01.271652 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6369 13:55:01.291974 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6370 13:55:01.310918 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6371 13:55:01.332920 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6372 13:55:01.733617 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6373 13:55:02.081647 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6374 13:55:02.126413 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6375 13:55:02.410074 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6376 13:55:02.522892 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6377 13:55:02.542725 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6378 13:55:02.561867 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6379 13:55:02.602416 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6380 13:55:02.624977 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6381 13:55:02.938704 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6382 13:55:03.014827 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6383 13:55:03.078762 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6384 13:55:03.345495 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6385 13:55:03.367145 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6386 13:55:03.389772 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6387 13:55:03.405692 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6388 13:55:03.442566 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6389 13:55:03.522557 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6390 13:55:03.547696 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6391 13:55:03.572991 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6392 13:55:03.650589 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6393 13:55:03.698940 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6394 13:55:03.780688 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6395 13:55:03.802647 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6396 13:55:03.823631 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6397 13:55:03.874390 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6398 13:55:03.899671 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6399 13:55:03.923365 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6400 13:55:03.986818 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6401 13:55:04.013951 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6402 13:55:04.032931 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6403 13:55:04.052737 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6404 13:55:04.071371 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6405 13:55:04.090224 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6406 13:55:04.112823 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6407 13:55:04.132370 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6408 13:55:04.150041 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6409 13:55:04.170021 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6410 13:55:04.189634 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6411 13:55:04.205909 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6412 13:55:04.221729 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6413 13:55:04.273576 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6414 13:55:04.290407 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6415 13:55:04.309985 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6416 13:55:04.350810 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6417 13:55:04.372090 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6418 13:55:04.442111 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6419 13:55:04.554054 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6420 13:55:04.583941 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6421 13:55:04.603596 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6422 13:55:04.628296 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6423 13:55:04.718016 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6424 13:55:04.770166 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6425 13:55:04.815145 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6426 13:55:04.838758 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6427 13:55:04.854519 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6428 13:55:04.881219 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6429 13:55:04.909348 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6430 13:55:04.936772 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6431 13:55:04.953770 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6432 13:55:04.997618 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6433 13:55:05.054749 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6434 13:55:05.136851
6435 13:55:05.140371 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6436 13:55:05.140797
6437 13:55:05.143569 debian-bookworm-arm64 login: root (automatic login)
6438 13:55:05.143996
6439 13:55:05.473359 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Thu Jul 18 12:53:03 UTC 2024 aarch64
6440 13:55:05.473485
6441 13:55:05.480043 The programs included with the Debian GNU/Linux system are free software;
6442 13:55:05.486777 the exact distribution terms for each program are described in the
6443 13:55:05.489962 individual files in /usr/share/doc/*/copyright.
6444 13:55:05.490038
6445 13:55:05.496961 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6446 13:55:05.500095 permitted by applicable law.
6447 13:55:06.676716 Matched prompt #10: / #
6449 13:55:06.677868 Setting prompt string to ['/ #']
6450 13:55:06.678314 end: 2.2.5.1 login-action (duration 00:00:21) [common]
6452 13:55:06.679285 end: 2.2.5 auto-login-action (duration 00:00:21) [common]
6453 13:55:06.679740 start: 2.2.6 expect-shell-connection (timeout 00:03:45) [common]
6454 13:55:06.680074 Setting prompt string to ['/ #']
6455 13:55:06.680381 Forcing a shell prompt, looking for ['/ #']
6456 13:55:06.680683 Sending line: ''
6458 13:55:06.731895 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6459 13:55:06.732454 Waiting using forced prompt support (timeout 00:02:30)
6460 13:55:06.737531 / #
6461 13:55:06.738410 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6462 13:55:06.738904 start: 2.2.7 export-device-env (timeout 00:03:44) [common]
6463 13:55:06.739529 Sending line: "export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14879066/extract-nfsrootfs-xvz4wwgq'"
6465 13:55:06.846693 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14879066/extract-nfsrootfs-xvz4wwgq'
6466 13:55:06.847449 Sending line: "export NFS_SERVER_IP='192.168.201.1'"
6468 13:55:06.954593 / # export NFS_SERVER_IP='192.168.201.1'
6469 13:55:06.955476 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6470 13:55:06.956046 end: 2.2 depthcharge-retry (duration 00:01:16) [common]
6471 13:55:06.956594 end: 2 depthcharge-action (duration 00:01:16) [common]
6472 13:55:06.957155 start: 3 lava-test-retry (timeout 00:08:06) [common]
6473 13:55:06.957736 start: 3.1 lava-test-shell (timeout 00:08:06) [common]
6474 13:55:06.958166 Using namespace: common
6475 13:55:06.958591 Sending line: '#'
6477 13:55:07.059764 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6478 13:55:07.065135 / # #
6479 13:55:07.065808 Using /lava-14879066
6480 13:55:07.066049 Sending line: 'export SHELL=/bin/bash'
6482 13:55:07.172919 / # export SHELL=/bin/bash
6483 13:55:07.173715 Sending line: '. /lava-14879066/environment'
6485 13:55:07.280462 / # . /lava-14879066/environment
6486 13:55:07.286975 Sending line: '/lava-14879066/bin/lava-test-runner /lava-14879066/0'
6488 13:55:07.388639 Test shell timeout: 10s (minimum of the action and connection timeout)
6489 13:55:07.394194 / # /lava-14879066/bin/lava-test-runner /lava-14879066/0
6490 13:55:07.672392 + export TESTRUN_ID=0_timesync-off
6491 13:55:07.675496 + TESTRUN_ID=0_timesync-off
6492 13:55:07.678688 + cd /lava-14879066/0/tests/0_timesync-off
6493 13:55:07.681808 ++ cat uuid
6494 13:55:07.687123 + UUID=14879066_1.6.2.3.1
6495 13:55:07.687571 + set +x
6496 13:55:07.694106 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14879066_1.6.2.3.1>
6497 13:55:07.694860 Received signal: <STARTRUN> 0_timesync-off 14879066_1.6.2.3.1
6498 13:55:07.695290 Starting test lava.0_timesync-off (14879066_1.6.2.3.1)
6499 13:55:07.695927 Skipping test definition patterns.
6500 13:55:07.697275 + systemctl stop systemd-timesyncd
6501 13:55:07.772004 + set +x
6502 13:55:07.775319 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14879066_1.6.2.3.1>
6503 13:55:07.776015 Received signal: <ENDRUN> 0_timesync-off 14879066_1.6.2.3.1
6504 13:55:07.776468 Ending use of test pattern.
6505 13:55:07.776855 Ending test lava.0_timesync-off (14879066_1.6.2.3.1), duration 0.08
6507 13:55:07.851998 + export TESTRUN_ID=1_kselftest-tpm2
6508 13:55:07.855606 + TESTRUN_ID=1_kselftest-tpm2
6509 13:55:07.861949 + cd /lava-14879066/0/tests/1_kselftest-tpm2
6510 13:55:07.862397 ++ cat uuid
6511 13:55:07.865705 + UUID=14879066_1.6.2.3.5
6512 13:55:07.866154 + set +x
6513 13:55:07.872172 <LAVA_SIGNAL_STARTRUN 1_kselftest-tpm2 14879066_1.6.2.3.5>
6514 13:55:07.872854 Received signal: <STARTRUN> 1_kselftest-tpm2 14879066_1.6.2.3.5
6515 13:55:07.873214 Starting test lava.1_kselftest-tpm2 (14879066_1.6.2.3.5)
6516 13:55:07.873645 Skipping test definition patterns.
6517 13:55:07.875578 + cd ./automated/linux/kselftest/
6518 13:55:07.902581 + ./kselftest.sh -c tpm2 -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1 -E ''
6519 13:55:07.952140 INFO: install_deps skipped
6520 13:55:08.478408 --2024-07-18 13:55:08-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz
6521 13:55:08.489399 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6522 13:55:08.619102 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6523 13:55:08.751050 HTTP request sent, awaiting response... 200 OK
6524 13:55:08.754294 Length: 1919140 (1.8M) [application/octet-stream]
6525 13:55:08.757674 Saving to: 'kselftest_armhf.tar.gz'
6526 13:55:08.758115
6527 13:55:08.758546
6528 13:55:09.008595 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6529 13:55:09.267494 kselftest_armhf.tar 2%[ ] 44.98K 175KB/s
6530 13:55:09.576053 kselftest_armhf.tar 11%[=> ] 217.50K 421KB/s
6531 13:55:09.766551 kselftest_armhf.tar 44%[=======> ] 836.85K 1014KB/s
6532 13:55:09.772937 kselftest_armhf.tar 100%[===================>] 1.83M 1.80MB/s in 1.0s
6533 13:55:09.773416
6534 13:55:09.941625 2024-07-18 13:55:09 (1.80 MB/s) - 'kselftest_armhf.tar.gz' saved [1919140/1919140]
6535 13:55:09.941751
6536 13:55:17.256733 skiplist:
6537 13:55:17.259923 ========================================
6538 13:55:17.263055 ========================================
6539 13:55:17.322359 tpm2:test_smoke.sh
6540 13:55:17.325628 tpm2:test_space.sh
6541 13:55:17.344030 ============== Tests to run ===============
6542 13:55:17.344469 tpm2:test_smoke.sh
6543 13:55:17.347623 tpm2:test_space.sh
6544 13:55:17.350822 ===========End Tests to run ===============
6545 13:55:17.354312 shardfile-tpm2 pass
6546 13:55:17.479670 <12>[ 30.952127] kselftest: Running tests in tpm2
6547 13:55:17.490888 TAP version 13
6548 13:55:17.509721 1..2
6549 13:55:17.549552 # selftests: tpm2: test_smoke.sh
6550 13:55:19.536390 # test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite) ... ERROR
6551 13:55:19.542991 # test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp) ... ERROR
6552 13:55:19.550093 # Exception ignored in: <function Client.__del__ at 0xffff997cccc0>
6553 13:55:19.553126 # Traceback (most recent call last):
6554 13:55:19.563122 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6555 13:55:19.563625 # if self.tpm:
6556 13:55:19.566493 # ^^^^^^^^
6557 13:55:19.570006 # AttributeError: 'Client' object has no attribute 'tpm'
6558 13:55:19.579910 # test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth) ... ERROR
6559 13:55:19.583135 # Exception ignored in: <function Client.__del__ at 0xffff997cccc0>
6560 13:55:19.586951 # Traceback (most recent call last):
6561 13:55:19.596627 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6562 13:55:19.600114 # if self.tpm:
6563 13:55:19.600630 # ^^^^^^^^
6564 13:55:19.606817 # AttributeError: 'Client' object has no attribute 'tpm'
6565 13:55:19.613495 # test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy) ... ERROR
6566 13:55:19.620330 # Exception ignored in: <function Client.__del__ at 0xffff997cccc0>
6567 13:55:19.623899 # Traceback (most recent call last):
6568 13:55:19.633799 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6569 13:55:19.634337 # if self.tpm:
6570 13:55:19.636851 # ^^^^^^^^
6571 13:55:19.640555 # AttributeError: 'Client' object has no attribute 'tpm'
6572 13:55:19.650372 # test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth) ... ERROR
6573 13:55:19.657007 # Exception ignored in: <function Client.__del__ at 0xffff997cccc0>
6574 13:55:19.660505 # Traceback (most recent call last):
6575 13:55:19.670250 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6576 13:55:19.670759 # if self.tpm:
6577 13:55:19.673853 # ^^^^^^^^
6578 13:55:19.677043 # AttributeError: 'Client' object has no attribute 'tpm'
6579 13:55:19.683858 # test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds) ... ERROR
6580 13:55:19.690335 # Exception ignored in: <function Client.__del__ at 0xffff997cccc0>
6581 13:55:19.693903 # Traceback (most recent call last):
6582 13:55:19.703755 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6583 13:55:19.704262 # if self.tpm:
6584 13:55:19.707440 # ^^^^^^^^
6585 13:55:19.710416 # AttributeError: 'Client' object has no attribute 'tpm'
6586 13:55:19.717299 # test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd) ... ERROR
6587 13:55:19.723877 # Exception ignored in: <function Client.__del__ at 0xffff997cccc0>
6588 13:55:19.727232 # Traceback (most recent call last):
6589 13:55:19.737029 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6590 13:55:19.740771 # if self.tpm:
6591 13:55:19.741308 # ^^^^^^^^
6592 13:55:19.747384 # AttributeError: 'Client' object has no attribute 'tpm'
6593 13:55:19.753805 # test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth) ... ERROR
6594 13:55:19.760609 # Exception ignored in: <function Client.__del__ at 0xffff997cccc0>
6595 13:55:19.763718 # Traceback (most recent call last):
6596 13:55:19.773833 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6597 13:55:19.774329 # if self.tpm:
6598 13:55:19.777212 # ^^^^^^^^
6599 13:55:19.780906 # AttributeError: 'Client' object has no attribute 'tpm'
6600 13:55:19.790683 # test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy) ... ERROR
6601 13:55:19.797522 # Exception ignored in: <function Client.__del__ at 0xffff997cccc0>
6602 13:55:19.801026 # Traceback (most recent call last):
6603 13:55:19.810580 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6604 13:55:19.811074 # if self.tpm:
6605 13:55:19.814332 # ^^^^^^^^
6606 13:55:19.817489 # AttributeError: 'Client' object has no attribute 'tpm'
6607 13:55:19.818002 #
6608 13:55:19.823912 # ======================================================================
6609 13:55:19.834539 # ERROR: test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite)
6610 13:55:19.840803 # ----------------------------------------------------------------------
6611 13:55:19.844033 # Traceback (most recent call last):
6612 13:55:19.853978 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 16, in setUp
6613 13:55:19.857197 # self.root_key = self.client.create_root_key()
6614 13:55:19.864072 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6615 13:55:19.874003 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6616 13:55:19.877176 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6617 13:55:19.884329 # ^^^^^^^^^^^^^^^^^^
6618 13:55:19.894058 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6619 13:55:19.897332 # raise ProtocolError(cc, rc)
6620 13:55:19.904137 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6621 13:55:19.904637 #
6622 13:55:19.911261 # ======================================================================
6623 13:55:19.917488 # ERROR: test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp)
6624 13:55:19.924464 # ----------------------------------------------------------------------
6625 13:55:19.927992 # Traceback (most recent call last):
6626 13:55:19.937682 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6627 13:55:19.941123 # self.client = tpm2.Client()
6628 13:55:19.944357 # ^^^^^^^^^^^^^
6629 13:55:19.954203 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6630 13:55:19.957702 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6631 13:55:19.964482 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6632 13:55:19.967650 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6633 13:55:19.968080 #
6634 13:55:19.974602 # ======================================================================
6635 13:55:19.981212 # ERROR: test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth)
6636 13:55:19.988342 # ----------------------------------------------------------------------
6637 13:55:19.991665 # Traceback (most recent call last):
6638 13:55:20.002875 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6639 13:55:20.006139 # self.client = tpm2.Client()
6640 13:55:20.009472 # ^^^^^^^^^^^^^
6641 13:55:20.020272 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6642 13:55:20.023397 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6643 13:55:20.026955 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6644 13:55:20.033598 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6645 13:55:20.034124 #
6646 13:55:20.040232 # ======================================================================
6647 13:55:20.046690 # ERROR: test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy)
6648 13:55:20.053316 # ----------------------------------------------------------------------
6649 13:55:20.056808 # Traceback (most recent call last):
6650 13:55:20.066739 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6651 13:55:20.070181 # self.client = tpm2.Client()
6652 13:55:20.073686 # ^^^^^^^^^^^^^
6653 13:55:20.083625 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6654 13:55:20.086762 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6655 13:55:20.093422 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6656 13:55:20.097069 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6657 13:55:20.097672 #
6658 13:55:20.103858 # ======================================================================
6659 13:55:20.113595 # ERROR: test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth)
6660 13:55:20.120102 # ----------------------------------------------------------------------
6661 13:55:20.123056 # Traceback (most recent call last):
6662 13:55:20.133043 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6663 13:55:20.136305 # self.client = tpm2.Client()
6664 13:55:20.139703 # ^^^^^^^^^^^^^
6665 13:55:20.149606 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6666 13:55:20.152880 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6667 13:55:20.159796 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6668 13:55:20.163416 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6669 13:55:20.163850 #
6670 13:55:20.169719 # ======================================================================
6671 13:55:20.176554 # ERROR: test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds)
6672 13:55:20.183378 # ----------------------------------------------------------------------
6673 13:55:20.186674 # Traceback (most recent call last):
6674 13:55:20.196640 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6675 13:55:20.200005 # self.client = tpm2.Client()
6676 13:55:20.203461 # ^^^^^^^^^^^^^
6677 13:55:20.213697 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6678 13:55:20.216588 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6679 13:55:20.223403 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6680 13:55:20.226943 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6681 13:55:20.227446 #
6682 13:55:20.233499 # ======================================================================
6683 13:55:20.240432 # ERROR: test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd)
6684 13:55:20.246515 # ----------------------------------------------------------------------
6685 13:55:20.250016 # Traceback (most recent call last):
6686 13:55:20.259944 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6687 13:55:20.263371 # self.client = tpm2.Client()
6688 13:55:20.266804 # ^^^^^^^^^^^^^
6689 13:55:20.276736 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6690 13:55:20.283324 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6691 13:55:20.287251 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6692 13:55:20.293586 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6693 13:55:20.294113 #
6694 13:55:20.300322 # ======================================================================
6695 13:55:20.307252 # ERROR: test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth)
6696 13:55:20.313674 # ----------------------------------------------------------------------
6697 13:55:20.316909 # Traceback (most recent call last):
6698 13:55:20.327156 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6699 13:55:20.330624 # self.client = tpm2.Client()
6700 13:55:20.333909 # ^^^^^^^^^^^^^
6701 13:55:20.343895 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6702 13:55:20.347483 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6703 13:55:20.353762 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6704 13:55:20.357144 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6705 13:55:20.357602 #
6706 13:55:20.363975 # ======================================================================
6707 13:55:20.373718 # ERROR: test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy)
6708 13:55:20.380433 # ----------------------------------------------------------------------
6709 13:55:20.383926 # Traceback (most recent call last):
6710 13:55:20.393908 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6711 13:55:20.397313 # self.client = tpm2.Client()
6712 13:55:20.400971 # ^^^^^^^^^^^^^
6713 13:55:20.410541 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6714 13:55:20.413823 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6715 13:55:20.420945 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6716 13:55:20.424165 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6717 13:55:20.424682 #
6718 13:55:20.430884 # ----------------------------------------------------------------------
6719 13:55:20.434013 # Ran 9 tests in 0.089s
6720 13:55:20.434441 #
6721 13:55:20.434774 # FAILED (errors=9)
6722 13:55:20.440718 # test_async (tpm2_tests.AsyncTest.test_async) ... ok
6723 13:55:20.447481 # test_flush_invalid_context (tpm2_tests.AsyncTest.test_flush_invalid_context) ... ok
6724 13:55:20.447989 #
6725 13:55:20.454018 # ----------------------------------------------------------------------
6726 13:55:20.457223 # Ran 2 tests in 0.059s
6727 13:55:20.457689 #
6728 13:55:20.458019 # OK
6729 13:55:20.460837 ok 1 selftests: tpm2: test_smoke.sh
6730 13:55:20.464249 # selftests: tpm2: test_space.sh
6731 13:55:20.503493 # test_flush_context (tpm2_tests.SpaceTest.test_flush_context) ... ERROR
6732 13:55:20.520882 # test_get_handles (tpm2_tests.SpaceTest.test_get_handles) ... ERROR
6733 13:55:20.540151 # test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc) ... ERROR
6734 13:55:20.562167 # test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces) ... ERROR
6735 13:55:20.565539 #
6736 13:55:20.568897 # ======================================================================
6737 13:55:20.575382 # ERROR: test_flush_context (tpm2_tests.SpaceTest.test_flush_context)
6738 13:55:20.582063 # ----------------------------------------------------------------------
6739 13:55:20.585750 # Traceback (most recent call last):
6740 13:55:20.599197 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 261, in test_flush_context
6741 13:55:20.602512 # root1 = space1.create_root_key()
6742 13:55:20.605852 # ^^^^^^^^^^^^^^^^^^^^^^^^
6743 13:55:20.615744 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6744 13:55:20.619121 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6745 13:55:20.625746 # ^^^^^^^^^^^^^^^^^^
6746 13:55:20.636121 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6747 13:55:20.639293 # raise ProtocolError(cc, rc)
6748 13:55:20.646120 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6749 13:55:20.646624 #
6750 13:55:20.652902 # ======================================================================
6751 13:55:20.656115 # ERROR: test_get_handles (tpm2_tests.SpaceTest.test_get_handles)
6752 13:55:20.662889 # ----------------------------------------------------------------------
6753 13:55:20.666154 # Traceback (most recent call last):
6754 13:55:20.679270 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 271, in test_get_handles
6755 13:55:20.679706 # space1.create_root_key()
6756 13:55:20.692847 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6757 13:55:20.695981 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6758 13:55:20.702784 # ^^^^^^^^^^^^^^^^^^
6759 13:55:20.712579 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6760 13:55:20.713012 # raise ProtocolError(cc, rc)
6761 13:55:20.719580 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6762 13:55:20.720083 #
6763 13:55:20.726255 # ======================================================================
6764 13:55:20.732902 # ERROR: test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc)
6765 13:55:20.739774 # ----------------------------------------------------------------------
6766 13:55:20.743069 # Traceback (most recent call last):
6767 13:55:20.753121 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 290, in test_invalid_cc
6768 13:55:20.756064 # root1 = space1.create_root_key()
6769 13:55:20.759474 # ^^^^^^^^^^^^^^^^^^^^^^^^
6770 13:55:20.769537 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6771 13:55:20.776257 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6772 13:55:20.783162 # ^^^^^^^^^^^^^^^^^^
6773 13:55:20.793015 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6774 13:55:20.796404 # raise ProtocolError(cc, rc)
6775 13:55:20.799862 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6776 13:55:20.800289 #
6777 13:55:20.806388 # ======================================================================
6778 13:55:20.813325 # ERROR: test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces)
6779 13:55:20.820232 # ----------------------------------------------------------------------
6780 13:55:20.823914 # Traceback (most recent call last):
6781 13:55:20.836917 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 247, in test_make_two_spaces
6782 13:55:20.840409 # root1 = space1.create_root_key()
6783 13:55:20.843379 # ^^^^^^^^^^^^^^^^^^^^^^^^
6784 13:55:20.853510 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6785 13:55:20.860534 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6786 13:55:20.863534 # ^^^^^^^^^^^^^^^^^^
6787 13:55:20.873469 # File "/lava-14879066/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6788 13:55:20.876962 # raise ProtocolError(cc, rc)
6789 13:55:20.883764 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6790 13:55:20.884207 #
6791 13:55:20.890124 # ----------------------------------------------------------------------
6792 13:55:20.893627 # Ran 4 tests in 0.103s
6793 13:55:20.894058 #
6794 13:55:20.894402 # FAILED (errors=4)
6795 13:55:20.897136 not ok 2 selftests: tpm2: test_space.sh # exit=1
6796 13:55:21.345017 tpm2_test_smoke_sh pass
6797 13:55:21.348273 tpm2_test_space_sh fail
6798 13:55:21.431280 + ../../utils/send-to-lava.sh ./output/result.txt
6799 13:55:21.510935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-tpm2 RESULT=pass>
6800 13:55:21.511714 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-tpm2 RESULT=pass
6802 13:55:21.561287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass>
6803 13:55:21.561912 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass
6805 13:55:21.608276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_space_sh RESULT=fail>
6806 13:55:21.608621 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_space_sh RESULT=fail
6808 13:55:21.611836 + set +x
6809 13:55:21.614874 <LAVA_SIGNAL_ENDRUN 1_kselftest-tpm2 14879066_1.6.2.3.5>
6810 13:55:21.615174 Received signal: <ENDRUN> 1_kselftest-tpm2 14879066_1.6.2.3.5
6811 13:55:21.615265 Ending use of test pattern.
6812 13:55:21.615357 Ending test lava.1_kselftest-tpm2 (14879066_1.6.2.3.5), duration 13.74
6814 13:55:21.618170 <LAVA_TEST_RUNNER EXIT>
6815 13:55:21.618506 ok: lava_test_shell seems to have completed
6816 13:55:21.618641 shardfile-tpm2: pass
tpm2_test_smoke_sh: pass
tpm2_test_space_sh: fail
6817 13:55:21.618752 end: 3.1 lava-test-shell (duration 00:00:15) [common]
6818 13:55:21.618854 end: 3 lava-test-retry (duration 00:00:15) [common]
6819 13:55:21.618962 start: 4 finalize (timeout 00:07:51) [common]
6820 13:55:21.619060 start: 4.1 power-off (timeout 00:00:30) [common]
6821 13:55:21.619217 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=off']
6822 13:55:23.698604 >> Command sent successfully.
6823 13:55:23.712001 Returned 0 in 2 seconds
6824 13:55:23.712528 end: 4.1 power-off (duration 00:00:02) [common]
6826 13:55:23.713471 start: 4.2 read-feedback (timeout 00:07:49) [common]
6827 13:55:23.714083 Listened to connection for namespace 'common' for up to 1s
6828 13:55:24.715156 Finalising connection for namespace 'common'
6829 13:55:24.715734 Disconnecting from shell: Finalise
6830 13:55:24.716097 / #
6831 13:55:24.816955 end: 4.2 read-feedback (duration 00:00:01) [common]
6832 13:55:24.817574 end: 4 finalize (duration 00:00:03) [common]
6833 13:55:24.818136 Cleaning after the job
6834 13:55:24.818607 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/ramdisk
6835 13:55:24.829134 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/kernel
6836 13:55:24.864098 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/dtb
6837 13:55:24.864407 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/nfsrootfs
6838 13:55:24.934563 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879066/tftp-deploy-8zxurxoj/modules
6839 13:55:24.940258 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14879066
6840 13:55:25.507772 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14879066
6841 13:55:25.507942 Job finished correctly