Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 48
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 90
1 13:24:27.655720 lava-dispatcher, installed at version: 2024.05
2 13:24:27.655932 start: 0 validate
3 13:24:27.656089 Start time: 2024-07-18 13:24:27.656083+00:00 (UTC)
4 13:24:27.656219 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:24:27.656408 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-libcamera%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 13:24:27.923392 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:24:27.923556 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 13:24:28.180545 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:24:28.180779 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 13:24:28.438533 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:24:28.438670 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-libcamera%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 13:24:28.695931 Using caching service: 'http://localhost/cache/?uri=%s'
13 13:24:28.696065 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
14 13:24:28.954528 validate duration: 1.30
16 13:24:28.954807 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 13:24:28.954914 start: 1.1 download-retry (timeout 00:10:00) [common]
18 13:24:28.955006 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 13:24:28.955188 Not decompressing ramdisk as can be used compressed.
20 13:24:28.955289 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-libcamera/20240313.0/arm64/initrd.cpio.gz
21 13:24:28.955364 saving as /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/ramdisk/initrd.cpio.gz
22 13:24:28.955434 total size: 5628151 (5 MB)
23 13:24:28.956519 progress 0 % (0 MB)
24 13:24:28.958728 progress 5 % (0 MB)
25 13:24:28.960655 progress 10 % (0 MB)
26 13:24:28.962540 progress 15 % (0 MB)
27 13:24:28.964544 progress 20 % (1 MB)
28 13:24:28.966350 progress 25 % (1 MB)
29 13:24:28.968357 progress 30 % (1 MB)
30 13:24:28.970415 progress 35 % (1 MB)
31 13:24:28.972232 progress 40 % (2 MB)
32 13:24:28.973707 progress 45 % (2 MB)
33 13:24:28.975059 progress 50 % (2 MB)
34 13:24:28.976563 progress 55 % (2 MB)
35 13:24:28.978068 progress 60 % (3 MB)
36 13:24:28.979369 progress 65 % (3 MB)
37 13:24:28.980899 progress 70 % (3 MB)
38 13:24:28.982270 progress 75 % (4 MB)
39 13:24:28.983750 progress 80 % (4 MB)
40 13:24:28.985118 progress 85 % (4 MB)
41 13:24:28.986689 progress 90 % (4 MB)
42 13:24:28.988178 progress 95 % (5 MB)
43 13:24:28.989502 progress 100 % (5 MB)
44 13:24:28.989702 5 MB downloaded in 0.03 s (156.66 MB/s)
45 13:24:28.989894 end: 1.1.1 http-download (duration 00:00:00) [common]
47 13:24:28.990278 end: 1.1 download-retry (duration 00:00:00) [common]
48 13:24:28.990383 start: 1.2 download-retry (timeout 00:10:00) [common]
49 13:24:28.990485 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 13:24:28.990620 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
51 13:24:28.990687 saving as /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/kernel/Image
52 13:24:28.990741 total size: 54813184 (52 MB)
53 13:24:28.990793 No compression specified
54 13:24:28.991795 progress 0 % (0 MB)
55 13:24:29.005126 progress 5 % (2 MB)
56 13:24:29.018794 progress 10 % (5 MB)
57 13:24:29.032116 progress 15 % (7 MB)
58 13:24:29.045572 progress 20 % (10 MB)
59 13:24:29.059107 progress 25 % (13 MB)
60 13:24:29.072385 progress 30 % (15 MB)
61 13:24:29.085970 progress 35 % (18 MB)
62 13:24:29.099586 progress 40 % (20 MB)
63 13:24:29.112811 progress 45 % (23 MB)
64 13:24:29.126249 progress 50 % (26 MB)
65 13:24:29.139633 progress 55 % (28 MB)
66 13:24:29.152653 progress 60 % (31 MB)
67 13:24:29.165865 progress 65 % (34 MB)
68 13:24:29.179165 progress 70 % (36 MB)
69 13:24:29.192441 progress 75 % (39 MB)
70 13:24:29.205994 progress 80 % (41 MB)
71 13:24:29.219207 progress 85 % (44 MB)
72 13:24:29.232511 progress 90 % (47 MB)
73 13:24:29.245769 progress 95 % (49 MB)
74 13:24:29.258739 progress 100 % (52 MB)
75 13:24:29.258974 52 MB downloaded in 0.27 s (194.89 MB/s)
76 13:24:29.259125 end: 1.2.1 http-download (duration 00:00:00) [common]
78 13:24:29.259336 end: 1.2 download-retry (duration 00:00:00) [common]
79 13:24:29.259417 start: 1.3 download-retry (timeout 00:10:00) [common]
80 13:24:29.259495 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 13:24:29.259622 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 13:24:29.259684 saving as /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 13:24:29.259736 total size: 57695 (0 MB)
84 13:24:29.259788 No compression specified
85 13:24:29.260915 progress 56 % (0 MB)
86 13:24:29.261169 progress 100 % (0 MB)
87 13:24:29.261355 0 MB downloaded in 0.00 s (34.03 MB/s)
88 13:24:29.261465 end: 1.3.1 http-download (duration 00:00:00) [common]
90 13:24:29.261663 end: 1.3 download-retry (duration 00:00:00) [common]
91 13:24:29.261738 start: 1.4 download-retry (timeout 00:10:00) [common]
92 13:24:29.261812 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 13:24:29.261918 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-libcamera/20240313.0/arm64/full.rootfs.tar.xz
94 13:24:29.261977 saving as /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/nfsrootfs/full.rootfs.tar
95 13:24:29.262054 total size: 69067788 (65 MB)
96 13:24:29.262124 Using unxz to decompress xz
97 13:24:29.263298 progress 0 % (0 MB)
98 13:24:29.446551 progress 5 % (3 MB)
99 13:24:29.637482 progress 10 % (6 MB)
100 13:24:29.829278 progress 15 % (9 MB)
101 13:24:29.994329 progress 20 % (13 MB)
102 13:24:30.177052 progress 25 % (16 MB)
103 13:24:30.366130 progress 30 % (19 MB)
104 13:24:30.486634 progress 35 % (23 MB)
105 13:24:30.585595 progress 40 % (26 MB)
106 13:24:30.783148 progress 45 % (29 MB)
107 13:24:30.982173 progress 50 % (32 MB)
108 13:24:31.180905 progress 55 % (36 MB)
109 13:24:31.388859 progress 60 % (39 MB)
110 13:24:31.580872 progress 65 % (42 MB)
111 13:24:31.774685 progress 70 % (46 MB)
112 13:24:31.965283 progress 75 % (49 MB)
113 13:24:32.170328 progress 80 % (52 MB)
114 13:24:32.341086 progress 85 % (56 MB)
115 13:24:32.528516 progress 90 % (59 MB)
116 13:24:32.728390 progress 95 % (62 MB)
117 13:24:32.927869 progress 100 % (65 MB)
118 13:24:32.933783 65 MB downloaded in 3.67 s (17.94 MB/s)
119 13:24:32.933937 end: 1.4.1 http-download (duration 00:00:04) [common]
121 13:24:32.934190 end: 1.4 download-retry (duration 00:00:04) [common]
122 13:24:32.934267 start: 1.5 download-retry (timeout 00:09:56) [common]
123 13:24:32.934339 start: 1.5.1 http-download (timeout 00:09:56) [common]
124 13:24:32.934465 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
125 13:24:32.934525 saving as /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/modules/modules.tar
126 13:24:32.934576 total size: 8611320 (8 MB)
127 13:24:32.934629 Using unxz to decompress xz
128 13:24:32.935900 progress 0 % (0 MB)
129 13:24:32.956689 progress 5 % (0 MB)
130 13:24:32.980519 progress 10 % (0 MB)
131 13:24:33.004036 progress 15 % (1 MB)
132 13:24:33.028331 progress 20 % (1 MB)
133 13:24:33.051445 progress 25 % (2 MB)
134 13:24:33.076178 progress 30 % (2 MB)
135 13:24:33.100633 progress 35 % (2 MB)
136 13:24:33.128186 progress 40 % (3 MB)
137 13:24:33.153075 progress 45 % (3 MB)
138 13:24:33.177928 progress 50 % (4 MB)
139 13:24:33.203350 progress 55 % (4 MB)
140 13:24:33.228022 progress 60 % (4 MB)
141 13:24:33.251883 progress 65 % (5 MB)
142 13:24:33.277985 progress 70 % (5 MB)
143 13:24:33.305256 progress 75 % (6 MB)
144 13:24:33.333148 progress 80 % (6 MB)
145 13:24:33.357426 progress 85 % (7 MB)
146 13:24:33.380847 progress 90 % (7 MB)
147 13:24:33.404318 progress 95 % (7 MB)
148 13:24:33.427685 progress 100 % (8 MB)
149 13:24:33.433412 8 MB downloaded in 0.50 s (16.46 MB/s)
150 13:24:33.433607 end: 1.5.1 http-download (duration 00:00:00) [common]
152 13:24:33.433942 end: 1.5 download-retry (duration 00:00:00) [common]
153 13:24:33.434078 start: 1.6 prepare-tftp-overlay (timeout 00:09:56) [common]
154 13:24:33.434155 start: 1.6.1 extract-nfsrootfs (timeout 00:09:56) [common]
155 13:24:35.166420 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14879025/extract-nfsrootfs-bw5t4k0y
156 13:24:35.166585 end: 1.6.1 extract-nfsrootfs (duration 00:00:02) [common]
157 13:24:35.166670 start: 1.6.2 lava-overlay (timeout 00:09:54) [common]
158 13:24:35.166870 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_
159 13:24:35.167050 makedir: /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin
160 13:24:35.167168 makedir: /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/tests
161 13:24:35.167284 makedir: /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/results
162 13:24:35.167396 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-add-keys
163 13:24:35.167554 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-add-sources
164 13:24:35.167729 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-background-process-start
165 13:24:35.167895 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-background-process-stop
166 13:24:35.168050 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-common-functions
167 13:24:35.168198 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-echo-ipv4
168 13:24:35.168341 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-install-packages
169 13:24:35.168517 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-installed-packages
170 13:24:35.168655 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-os-build
171 13:24:35.168797 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-probe-channel
172 13:24:35.168977 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-probe-ip
173 13:24:35.169132 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-target-ip
174 13:24:35.169263 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-target-mac
175 13:24:35.169384 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-target-storage
176 13:24:35.169532 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-test-case
177 13:24:35.169675 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-test-event
178 13:24:35.169814 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-test-feedback
179 13:24:35.169952 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-test-raise
180 13:24:35.170129 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-test-reference
181 13:24:35.170265 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-test-runner
182 13:24:35.170446 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-test-set
183 13:24:35.170593 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-test-shell
184 13:24:35.170738 Updating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-install-packages (oe)
185 13:24:35.170916 Updating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/bin/lava-installed-packages (oe)
186 13:24:35.171070 Creating /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/environment
187 13:24:35.171190 LAVA metadata
188 13:24:35.171285 - LAVA_JOB_ID=14879025
189 13:24:35.171372 - LAVA_DISPATCHER_IP=192.168.201.1
190 13:24:35.171506 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:54) [common]
191 13:24:35.171591 skipped lava-vland-overlay
192 13:24:35.171692 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
193 13:24:35.171798 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:54) [common]
194 13:24:35.171884 skipped lava-multinode-overlay
195 13:24:35.171990 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
196 13:24:35.172100 start: 1.6.2.3 test-definition (timeout 00:09:54) [common]
197 13:24:35.172200 Loading test definitions
198 13:24:35.172308 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:54) [common]
199 13:24:35.172401 Using /lava-14879025 at stage 0
200 13:24:35.172832 uuid=14879025_1.6.2.3.1 testdef=None
201 13:24:35.172944 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
202 13:24:35.173056 start: 1.6.2.3.2 test-overlay (timeout 00:09:54) [common]
203 13:24:35.173680 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
205 13:24:35.174039 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:54) [common]
206 13:24:35.174856 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
208 13:24:35.175201 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:54) [common]
209 13:24:35.175993 runner path: /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/0/tests/0_lc-compliance test_uuid 14879025_1.6.2.3.1
210 13:24:35.176174 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
212 13:24:35.176487 Creating lava-test-runner.conf files
213 13:24:35.176572 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14879025/lava-overlay-9e5a_eq_/lava-14879025/0 for stage 0
214 13:24:35.176681 - 0_lc-compliance
215 13:24:35.176799 end: 1.6.2.3 test-definition (duration 00:00:00) [common]
216 13:24:35.176901 start: 1.6.2.4 compress-overlay (timeout 00:09:54) [common]
217 13:24:35.182733 end: 1.6.2.4 compress-overlay (duration 00:00:00) [common]
218 13:24:35.182825 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:54) [common]
219 13:24:35.182903 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
220 13:24:35.182984 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
221 13:24:35.183061 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:54) [common]
222 13:24:35.328761 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
223 13:24:35.328913 start: 1.6.4 extract-modules (timeout 00:09:54) [common]
224 13:24:35.329015 extracting modules file /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14879025/extract-nfsrootfs-bw5t4k0y
225 13:24:35.571796 extracting modules file /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14879025/extract-overlay-ramdisk-euhk0ciw/ramdisk
226 13:24:35.826455 end: 1.6.4 extract-modules (duration 00:00:00) [common]
227 13:24:35.826616 start: 1.6.5 apply-overlay-tftp (timeout 00:09:53) [common]
228 13:24:35.826723 [common] Applying overlay to NFS
229 13:24:35.826808 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14879025/compress-overlay-1rxvbvv4/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14879025/extract-nfsrootfs-bw5t4k0y
230 13:24:35.835223 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
231 13:24:35.835348 start: 1.6.6 configure-preseed-file (timeout 00:09:53) [common]
232 13:24:35.835459 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
233 13:24:35.835564 start: 1.6.7 compress-ramdisk (timeout 00:09:53) [common]
234 13:24:35.835657 Building ramdisk /var/lib/lava/dispatcher/tmp/14879025/extract-overlay-ramdisk-euhk0ciw/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14879025/extract-overlay-ramdisk-euhk0ciw/ramdisk
235 13:24:36.117951 >> 129966 blocks
236 13:24:38.201981 rename /var/lib/lava/dispatcher/tmp/14879025/extract-overlay-ramdisk-euhk0ciw/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/ramdisk/ramdisk.cpio.gz
237 13:24:38.202179 end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
238 13:24:38.202265 start: 1.6.8 prepare-kernel (timeout 00:09:51) [common]
239 13:24:38.202342 start: 1.6.8.1 prepare-fit (timeout 00:09:51) [common]
240 13:24:38.202435 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/kernel/Image']
241 13:24:52.482133 Returned 0 in 14 seconds
242 13:24:52.482302 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/kernel/image.itb
243 13:24:52.833186 output: FIT description: Kernel Image image with one or more FDT blobs
244 13:24:52.833314 output: Created: Thu Jul 18 14:24:52 2024
245 13:24:52.833375 output: Image 0 (kernel-1)
246 13:24:52.833429 output: Description:
247 13:24:52.833479 output: Created: Thu Jul 18 14:24:52 2024
248 13:24:52.833531 output: Type: Kernel Image
249 13:24:52.833581 output: Compression: lzma compressed
250 13:24:52.833632 output: Data Size: 13114469 Bytes = 12807.10 KiB = 12.51 MiB
251 13:24:52.833682 output: Architecture: AArch64
252 13:24:52.833731 output: OS: Linux
253 13:24:52.833779 output: Load Address: 0x00000000
254 13:24:52.833827 output: Entry Point: 0x00000000
255 13:24:52.833877 output: Hash algo: crc32
256 13:24:52.833928 output: Hash value: a47b020b
257 13:24:52.833977 output: Image 1 (fdt-1)
258 13:24:52.834038 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
259 13:24:52.834089 output: Created: Thu Jul 18 14:24:52 2024
260 13:24:52.834137 output: Type: Flat Device Tree
261 13:24:52.834185 output: Compression: uncompressed
262 13:24:52.834233 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
263 13:24:52.834282 output: Architecture: AArch64
264 13:24:52.834330 output: Hash algo: crc32
265 13:24:52.834377 output: Hash value: a9713552
266 13:24:52.834425 output: Image 2 (ramdisk-1)
267 13:24:52.834471 output: Description: unavailable
268 13:24:52.834519 output: Created: Thu Jul 18 14:24:52 2024
269 13:24:52.834567 output: Type: RAMDisk Image
270 13:24:52.834614 output: Compression: uncompressed
271 13:24:52.834661 output: Data Size: 18720559 Bytes = 18281.80 KiB = 17.85 MiB
272 13:24:52.834709 output: Architecture: AArch64
273 13:24:52.834756 output: OS: Linux
274 13:24:52.834803 output: Load Address: unavailable
275 13:24:52.834850 output: Entry Point: unavailable
276 13:24:52.834901 output: Hash algo: crc32
277 13:24:52.834953 output: Hash value: e7aca2d7
278 13:24:52.835000 output: Default Configuration: 'conf-1'
279 13:24:52.835048 output: Configuration 0 (conf-1)
280 13:24:52.835095 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
281 13:24:52.835142 output: Kernel: kernel-1
282 13:24:52.835189 output: Init Ramdisk: ramdisk-1
283 13:24:52.835237 output: FDT: fdt-1
284 13:24:52.835284 output: Loadables: kernel-1
285 13:24:52.835331 output:
286 13:24:52.835432 end: 1.6.8.1 prepare-fit (duration 00:00:15) [common]
287 13:24:52.835506 end: 1.6.8 prepare-kernel (duration 00:00:15) [common]
288 13:24:52.835578 end: 1.6 prepare-tftp-overlay (duration 00:00:19) [common]
289 13:24:52.835650 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:36) [common]
290 13:24:52.835708 No LXC device requested
291 13:24:52.835812 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
292 13:24:52.835916 start: 1.8 deploy-device-env (timeout 00:09:36) [common]
293 13:24:52.835982 end: 1.8 deploy-device-env (duration 00:00:00) [common]
294 13:24:52.836036 Checking files for TFTP limit of 4294967296 bytes.
295 13:24:52.836400 end: 1 tftp-deploy (duration 00:00:24) [common]
296 13:24:52.836486 start: 2 depthcharge-action (timeout 00:05:00) [common]
297 13:24:52.836564 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
298 13:24:52.836657 substitutions:
299 13:24:52.836717 - {DTB}: 14879025/tftp-deploy-w3z26uyv/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
300 13:24:52.836772 - {INITRD}: 14879025/tftp-deploy-w3z26uyv/ramdisk/ramdisk.cpio.gz
301 13:24:52.836823 - {KERNEL}: 14879025/tftp-deploy-w3z26uyv/kernel/Image
302 13:24:52.836873 - {LAVA_MAC}: None
303 13:24:52.836923 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14879025/extract-nfsrootfs-bw5t4k0y
304 13:24:52.836972 - {NFS_SERVER_IP}: 192.168.201.1
305 13:24:52.837020 - {PRESEED_CONFIG}: None
306 13:24:52.837076 - {PRESEED_LOCAL}: None
307 13:24:52.837125 - {RAMDISK}: 14879025/tftp-deploy-w3z26uyv/ramdisk/ramdisk.cpio.gz
308 13:24:52.837174 - {ROOT_PART}: None
309 13:24:52.837222 - {ROOT}: None
310 13:24:52.837269 - {SERVER_IP}: 192.168.201.1
311 13:24:52.837316 - {TEE}: None
312 13:24:52.837364 Parsed boot commands:
313 13:24:52.837411 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
314 13:24:52.837544 Parsed boot commands: tftpboot 192.168.201.1 14879025/tftp-deploy-w3z26uyv/kernel/image.itb 14879025/tftp-deploy-w3z26uyv/kernel/cmdline
315 13:24:52.837621 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
316 13:24:52.837693 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
317 13:24:52.837772 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
318 13:24:52.837871 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
319 13:24:52.837951 Not connected, no need to disconnect.
320 13:24:52.838085 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
321 13:24:52.838181 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
322 13:24:52.838260 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-4'
323 13:24:52.841234 Setting prompt string to ['lava-test: # ']
324 13:24:52.841535 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
325 13:24:52.841632 end: 2.2.1 reset-connection (duration 00:00:00) [common]
326 13:24:52.841717 start: 2.2.2 reset-device (timeout 00:05:00) [common]
327 13:24:52.841795 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
328 13:24:52.842070 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=reboot']
329 13:25:02.035881 >> Command sent successfully.
330 13:25:02.050266 Returned 0 in 9 seconds
331 13:25:02.050972 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
333 13:25:02.052237 end: 2.2.2 reset-device (duration 00:00:09) [common]
334 13:25:02.052816 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
335 13:25:02.053232 Setting prompt string to 'Starting depthcharge on Juniper...'
336 13:25:02.053587 Changing prompt to 'Starting depthcharge on Juniper...'
337 13:25:02.053977 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
338 13:25:02.056449 [Enter `^Ec?' for help]
339 13:25:09.068527 [DL] 00000000 00000000 010701
340 13:25:09.073265
341 13:25:09.073403
342 13:25:09.073509 F0: 102B 0000
343 13:25:09.073574
344 13:25:09.073668 F3: 1006 0033 [0200]
345 13:25:09.076540
346 13:25:09.076762 F3: 4001 00E0 [0200]
347 13:25:09.076834
348 13:25:09.076918 F3: 0000 0000
349 13:25:09.079664
350 13:25:09.079790 V0: 0000 0000 [0001]
351 13:25:09.079846
352 13:25:09.079897 00: 1027 0002
353 13:25:09.079956
354 13:25:09.083241 01: 0000 0000
355 13:25:09.083392
356 13:25:09.083475 BP: 0C00 0251 [0000]
357 13:25:09.083528
358 13:25:09.086680 G0: 1182 0000
359 13:25:09.086815
360 13:25:09.086913 EC: 0004 0000 [0001]
361 13:25:09.086979
362 13:25:09.090072 S7: 0000 0000 [0000]
363 13:25:09.090205
364 13:25:09.093477 CC: 0000 0000 [0001]
365 13:25:09.093603
366 13:25:09.093666 T0: 0000 00DB [000F]
367 13:25:09.093718
368 13:25:09.093768 Jump to BL
369 13:25:09.093827
370 13:25:09.129047
371 13:25:09.129217
372 13:25:09.135700 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
373 13:25:09.139073 ARM64: Exception handlers installed.
374 13:25:09.142515 ARM64: Testing exception
375 13:25:09.145967 ARM64: Done test exception
376 13:25:09.149992 WDT: Last reset was cold boot
377 13:25:09.150176 SPI0(PAD0) initialized at 992727 Hz
378 13:25:09.156872 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
379 13:25:09.157037 Manufacturer: ef
380 13:25:09.163707 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
381 13:25:09.175692 Probing TPM: . done!
382 13:25:09.175858 TPM ready after 0 ms
383 13:25:09.182494 Connected to device vid:did:rid of 1ae0:0028:00
384 13:25:09.189439 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
385 13:25:09.223701 Initialized TPM device CR50 revision 0
386 13:25:09.235894 tlcl_send_startup: Startup return code is 0
387 13:25:09.236064 TPM: setup succeeded
388 13:25:09.244488 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
389 13:25:09.247764 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
390 13:25:09.251303 in-header: 03 19 00 00 08 00 00 00
391 13:25:09.254682 in-data: a2 e0 47 00 13 00 00 00
392 13:25:09.258108 Chrome EC: UHEPI supported
393 13:25:09.264529 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
394 13:25:09.267894 in-header: 03 a1 00 00 08 00 00 00
395 13:25:09.271333 in-data: 84 60 60 10 00 00 00 00
396 13:25:09.271465 Phase 1
397 13:25:09.274612 FMAP: area GBB found @ 3f5000 (12032 bytes)
398 13:25:09.281136 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
399 13:25:09.287786 VB2:vb2_check_recovery() Recovery was requested manually
400 13:25:09.291068 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
401 13:25:09.297461 Recovery requested (1009000e)
402 13:25:09.306171 tlcl_extend: response is 0
403 13:25:09.311552 tlcl_extend: response is 0
404 13:25:09.336401
405 13:25:09.336537
406 13:25:09.346773 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
407 13:25:09.349812 ARM64: Exception handlers installed.
408 13:25:09.349971 ARM64: Testing exception
409 13:25:09.352905 ARM64: Done test exception
410 13:25:09.369205 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x9a6d, sec=0x2009
411 13:25:09.375338 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
412 13:25:09.378712 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
413 13:25:09.386988 [RTC]rtc_get_frequency_meter,134: input=0xf, output=823
414 13:25:09.393684 [RTC]rtc_get_frequency_meter,134: input=0x7, output=698
415 13:25:09.401179 [RTC]rtc_get_frequency_meter,134: input=0xb, output=761
416 13:25:09.407628 [RTC]rtc_get_frequency_meter,134: input=0xd, output=791
417 13:25:09.414631 [RTC]rtc_get_frequency_meter,134: input=0xe, output=807
418 13:25:09.421470 [RTC]rtc_get_frequency_meter,134: input=0xd, output=791
419 13:25:09.428436 [RTC]rtc_get_frequency_meter,134: input=0xe, output=808
420 13:25:09.434903 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x9a6d
421 13:25:09.438461 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
422 13:25:09.441901 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
423 13:25:09.448619 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
424 13:25:09.451919 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
425 13:25:09.455286 in-header: 03 19 00 00 08 00 00 00
426 13:25:09.458546 in-data: a2 e0 47 00 13 00 00 00
427 13:25:09.458685 Chrome EC: UHEPI supported
428 13:25:09.465012 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
429 13:25:09.468633 in-header: 03 a1 00 00 08 00 00 00
430 13:25:09.471761 in-data: 84 60 60 10 00 00 00 00
431 13:25:09.475040 Skip loading cached calibration data
432 13:25:09.481064 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
433 13:25:09.484498 in-header: 03 a1 00 00 08 00 00 00
434 13:25:09.487979 in-data: 84 60 60 10 00 00 00 00
435 13:25:09.494150 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
436 13:25:09.497623 in-header: 03 a1 00 00 08 00 00 00
437 13:25:09.500689 in-data: 84 60 60 10 00 00 00 00
438 13:25:09.504116 ADC[3]: Raw value=214540 ID=1
439 13:25:09.504247 Manufacturer: ef
440 13:25:09.511094 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
441 13:25:09.514370 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
442 13:25:09.517654 CBFS @ 21000 size 3d4000
443 13:25:09.524425 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
444 13:25:09.527645 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
445 13:25:09.531024 CBFS: Found @ offset 3c700 size 44
446 13:25:09.534544 DRAM-K: Full Calibration
447 13:25:09.537064 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
448 13:25:09.540394 CBFS @ 21000 size 3d4000
449 13:25:09.544018 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
450 13:25:09.547414 CBFS: Locating 'fallback/dram'
451 13:25:09.550671 CBFS: Found @ offset 24b00 size 12268
452 13:25:09.579730 read SPI 0x45b44 0x1224c: 22775 us, 3263 KB/s, 26.104 Mbps
453 13:25:09.583322 ddr_geometry: 1, config: 0x0
454 13:25:09.586479 header.status = 0x0
455 13:25:09.589884 header.magic = 0x44524d4b (expected: 0x44524d4b)
456 13:25:09.592718 header.version = 0x5 (expected: 0x5)
457 13:25:09.596125 header.size = 0x8f0 (expected: 0x8f0)
458 13:25:09.596245 header.config = 0x0
459 13:25:09.599619 header.flags = 0x0
460 13:25:09.602440 header.checksum = 0x0
461 13:25:09.609394 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
462 13:25:09.612108 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
463 13:25:09.618862 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
464 13:25:09.618937 ddr_geometry:1
465 13:25:09.622303 [EMI] new MDL number = 1
466 13:25:09.622377 dram_cbt_mode_extern: 0
467 13:25:09.625632 dram_cbt_mode [RK0]: 0, [RK1]: 0
468 13:25:09.632415 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
469 13:25:09.632491
470 13:25:09.632550
471 13:25:09.635775 [Bianco] ETT version 0.0.0.1
472 13:25:09.639201 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
473 13:25:09.639299
474 13:25:09.642379 vSetVcoreByFreq with vcore:762500, freq=1600
475 13:25:09.642444
476 13:25:09.645852 [DramcInit]
477 13:25:09.649380 AutoRefreshCKEOff AutoREF OFF
478 13:25:09.649474 DDRPhyPLLSetting-CKEOFF
479 13:25:09.652063 DDRPhyPLLSetting-CKEON
480 13:25:09.652142
481 13:25:09.652203 Enable WDQS
482 13:25:09.656836 [ModeRegInit_LP4] CH0 RK0
483 13:25:09.660275 Write Rank0 MR13 =0x18
484 13:25:09.660361 Write Rank0 MR12 =0x5d
485 13:25:09.663620 Write Rank0 MR1 =0x56
486 13:25:09.666818 Write Rank0 MR2 =0x1a
487 13:25:09.666918 Write Rank0 MR11 =0x0
488 13:25:09.670201 Write Rank0 MR22 =0x38
489 13:25:09.673608 Write Rank0 MR14 =0x5d
490 13:25:09.673711 Write Rank0 MR3 =0x30
491 13:25:09.676981 Write Rank0 MR13 =0x58
492 13:25:09.677092 Write Rank0 MR12 =0x5d
493 13:25:09.680301 Write Rank0 MR1 =0x56
494 13:25:09.683571 Write Rank0 MR2 =0x2d
495 13:25:09.683709 Write Rank0 MR11 =0x23
496 13:25:09.686761 Write Rank0 MR22 =0x34
497 13:25:09.686920 Write Rank0 MR14 =0x10
498 13:25:09.690051 Write Rank0 MR3 =0x30
499 13:25:09.693451 Write Rank0 MR13 =0xd8
500 13:25:09.693633 [ModeRegInit_LP4] CH0 RK1
501 13:25:09.696727 Write Rank1 MR13 =0x18
502 13:25:09.700070 Write Rank1 MR12 =0x5d
503 13:25:09.700302 Write Rank1 MR1 =0x56
504 13:25:09.703651 Write Rank1 MR2 =0x1a
505 13:25:09.703947 Write Rank1 MR11 =0x0
506 13:25:09.706418 Write Rank1 MR22 =0x38
507 13:25:09.709939 Write Rank1 MR14 =0x5d
508 13:25:09.710357 Write Rank1 MR3 =0x30
509 13:25:09.713327 Write Rank1 MR13 =0x58
510 13:25:09.716494 Write Rank1 MR12 =0x5d
511 13:25:09.716852 Write Rank1 MR1 =0x56
512 13:25:09.720305 Write Rank1 MR2 =0x2d
513 13:25:09.720700 Write Rank1 MR11 =0x23
514 13:25:09.723384 Write Rank1 MR22 =0x34
515 13:25:09.726787 Write Rank1 MR14 =0x10
516 13:25:09.727191 Write Rank1 MR3 =0x30
517 13:25:09.729710 Write Rank1 MR13 =0xd8
518 13:25:09.733011 [ModeRegInit_LP4] CH1 RK0
519 13:25:09.733395 Write Rank0 MR13 =0x18
520 13:25:09.736293 Write Rank0 MR12 =0x5d
521 13:25:09.736844 Write Rank0 MR1 =0x56
522 13:25:09.739802 Write Rank0 MR2 =0x1a
523 13:25:09.743084 Write Rank0 MR11 =0x0
524 13:25:09.743477 Write Rank0 MR22 =0x38
525 13:25:09.746452 Write Rank0 MR14 =0x5d
526 13:25:09.749551 Write Rank0 MR3 =0x30
527 13:25:09.750157 Write Rank0 MR13 =0x58
528 13:25:09.753113 Write Rank0 MR12 =0x5d
529 13:25:09.753501 Write Rank0 MR1 =0x56
530 13:25:09.756467 Write Rank0 MR2 =0x2d
531 13:25:09.759858 Write Rank0 MR11 =0x23
532 13:25:09.760469 Write Rank0 MR22 =0x34
533 13:25:09.763074 Write Rank0 MR14 =0x10
534 13:25:09.763472 Write Rank0 MR3 =0x30
535 13:25:09.765775 Write Rank0 MR13 =0xd8
536 13:25:09.769076 [ModeRegInit_LP4] CH1 RK1
537 13:25:09.769345 Write Rank1 MR13 =0x18
538 13:25:09.772344 Write Rank1 MR12 =0x5d
539 13:25:09.775681 Write Rank1 MR1 =0x56
540 13:25:09.775917 Write Rank1 MR2 =0x1a
541 13:25:09.778366 Write Rank1 MR11 =0x0
542 13:25:09.781914 Write Rank1 MR22 =0x38
543 13:25:09.782104 Write Rank1 MR14 =0x5d
544 13:25:09.785421 Write Rank1 MR3 =0x30
545 13:25:09.785585 Write Rank1 MR13 =0x58
546 13:25:09.788682 Write Rank1 MR12 =0x5d
547 13:25:09.792049 Write Rank1 MR1 =0x56
548 13:25:09.792186 Write Rank1 MR2 =0x2d
549 13:25:09.795280 Write Rank1 MR11 =0x23
550 13:25:09.795428 Write Rank1 MR22 =0x34
551 13:25:09.798355 Write Rank1 MR14 =0x10
552 13:25:09.801580 Write Rank1 MR3 =0x30
553 13:25:09.801683 Write Rank1 MR13 =0xd8
554 13:25:09.804899 match AC timing 3
555 13:25:09.814547 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
556 13:25:09.814648 [MiockJmeterHQA]
557 13:25:09.817926 vSetVcoreByFreq with vcore:762500, freq=1600
558 13:25:09.926126
559 13:25:09.926292 MIOCK jitter meter ch=0
560 13:25:09.926376
561 13:25:09.929552 1T = (103-19) = 84 dly cells
562 13:25:09.935712 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 744/100 ps
563 13:25:09.938962 vSetVcoreByFreq with vcore:725000, freq=1200
564 13:25:10.039455
565 13:25:10.039877 MIOCK jitter meter ch=0
566 13:25:10.040177
567 13:25:10.042812 1T = (97-19) = 78 dly cells
568 13:25:10.050058 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
569 13:25:10.053475 vSetVcoreByFreq with vcore:725000, freq=800
570 13:25:10.153254
571 13:25:10.153833 MIOCK jitter meter ch=0
572 13:25:10.154256
573 13:25:10.156511 1T = (97-19) = 78 dly cells
574 13:25:10.163435 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
575 13:25:10.166136 vSetVcoreByFreq with vcore:762500, freq=1600
576 13:25:10.169459 vSetVcoreByFreq with vcore:762500, freq=1600
577 13:25:10.169839
578 13:25:10.170173 K DRVP
579 13:25:10.173268 1. OCD DRVP=0 CALOUT=0
580 13:25:10.176254 1. OCD DRVP=1 CALOUT=0
581 13:25:10.176640 1. OCD DRVP=2 CALOUT=0
582 13:25:10.179311 1. OCD DRVP=3 CALOUT=0
583 13:25:10.182942 1. OCD DRVP=4 CALOUT=0
584 13:25:10.183350 1. OCD DRVP=5 CALOUT=0
585 13:25:10.186150 1. OCD DRVP=6 CALOUT=0
586 13:25:10.186534 1. OCD DRVP=7 CALOUT=0
587 13:25:10.189214 1. OCD DRVP=8 CALOUT=1
588 13:25:10.189601
589 13:25:10.193004 1. OCD DRVP calibration OK! DRVP=8
590 13:25:10.193392
591 13:25:10.193788
592 13:25:10.194234
593 13:25:10.194597 K ODTN
594 13:25:10.195954 3. OCD ODTN=0 ,CALOUT=1
595 13:25:10.199358 3. OCD ODTN=1 ,CALOUT=1
596 13:25:10.199946 3. OCD ODTN=2 ,CALOUT=1
597 13:25:10.202726 3. OCD ODTN=3 ,CALOUT=1
598 13:25:10.205869 3. OCD ODTN=4 ,CALOUT=1
599 13:25:10.206285 3. OCD ODTN=5 ,CALOUT=1
600 13:25:10.209231 3. OCD ODTN=6 ,CALOUT=1
601 13:25:10.212669 3. OCD ODTN=7 ,CALOUT=0
602 13:25:10.213057
603 13:25:10.215328 3. OCD ODTN calibration OK! ODTN=7
604 13:25:10.215713
605 13:25:10.219345 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
606 13:25:10.222142 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
607 13:25:10.229218 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
608 13:25:10.229602
609 13:25:10.229927 K DRVP
610 13:25:10.230287 1. OCD DRVP=0 CALOUT=0
611 13:25:10.232774 1. OCD DRVP=1 CALOUT=0
612 13:25:10.235497 1. OCD DRVP=2 CALOUT=0
613 13:25:10.235884 1. OCD DRVP=3 CALOUT=0
614 13:25:10.238932 1. OCD DRVP=4 CALOUT=0
615 13:25:10.242066 1. OCD DRVP=5 CALOUT=0
616 13:25:10.242460 1. OCD DRVP=6 CALOUT=0
617 13:25:10.245330 1. OCD DRVP=7 CALOUT=0
618 13:25:10.248456 1. OCD DRVP=8 CALOUT=0
619 13:25:10.248846 1. OCD DRVP=9 CALOUT=1
620 13:25:10.249150
621 13:25:10.252069 1. OCD DRVP calibration OK! DRVP=9
622 13:25:10.252462
623 13:25:10.252759
624 13:25:10.253032
625 13:25:10.255437 K ODTN
626 13:25:10.255818 3. OCD ODTN=0 ,CALOUT=1
627 13:25:10.258803 3. OCD ODTN=1 ,CALOUT=1
628 13:25:10.259194 3. OCD ODTN=2 ,CALOUT=1
629 13:25:10.261978 3. OCD ODTN=3 ,CALOUT=1
630 13:25:10.265320 3. OCD ODTN=4 ,CALOUT=1
631 13:25:10.265846 3. OCD ODTN=5 ,CALOUT=1
632 13:25:10.268644 3. OCD ODTN=6 ,CALOUT=1
633 13:25:10.271575 3. OCD ODTN=7 ,CALOUT=1
634 13:25:10.272085 3. OCD ODTN=8 ,CALOUT=1
635 13:25:10.275016 3. OCD ODTN=9 ,CALOUT=1
636 13:25:10.278359 3. OCD ODTN=10 ,CALOUT=1
637 13:25:10.278852 3. OCD ODTN=11 ,CALOUT=1
638 13:25:10.281565 3. OCD ODTN=12 ,CALOUT=1
639 13:25:10.284589 3. OCD ODTN=13 ,CALOUT=1
640 13:25:10.285096 3. OCD ODTN=14 ,CALOUT=0
641 13:25:10.285565
642 13:25:10.288189 3. OCD ODTN calibration OK! ODTN=14
643 13:25:10.291366
644 13:25:10.294638 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=14
645 13:25:10.297869 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=14
646 13:25:10.301751 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=14 (After Adjust)
647 13:25:10.302287
648 13:25:10.304959 [DramcInit]
649 13:25:10.308070 AutoRefreshCKEOff AutoREF OFF
650 13:25:10.308555 DDRPhyPLLSetting-CKEOFF
651 13:25:10.311419 DDRPhyPLLSetting-CKEON
652 13:25:10.311906
653 13:25:10.312356 Enable WDQS
654 13:25:10.312730 ==
655 13:25:10.318419 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
656 13:25:10.321370 fsp= 1, odt_onoff= 1, Byte mode= 0
657 13:25:10.321754 ==
658 13:25:10.324504 [Duty_Offset_Calibration]
659 13:25:10.324909
660 13:25:10.325204 ===========================
661 13:25:10.327639 B0:2 B1:2 CA:1
662 13:25:10.349002 ==
663 13:25:10.351873 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
664 13:25:10.355176 fsp= 1, odt_onoff= 1, Byte mode= 0
665 13:25:10.355561 ==
666 13:25:10.358493 [Duty_Offset_Calibration]
667 13:25:10.358874
668 13:25:10.362294 ===========================
669 13:25:10.362676 B0:0 B1:0 CA:-1
670 13:25:10.394282 [ModeRegInit_LP4] CH0 RK0
671 13:25:10.397915 Write Rank0 MR13 =0x18
672 13:25:10.398368 Write Rank0 MR12 =0x5d
673 13:25:10.401188 Write Rank0 MR1 =0x56
674 13:25:10.404315 Write Rank0 MR2 =0x1a
675 13:25:10.404698 Write Rank0 MR11 =0x0
676 13:25:10.407434 Write Rank0 MR22 =0x38
677 13:25:10.410884 Write Rank0 MR14 =0x5d
678 13:25:10.411314 Write Rank0 MR3 =0x30
679 13:25:10.414242 Write Rank0 MR13 =0x58
680 13:25:10.414626 Write Rank0 MR12 =0x5d
681 13:25:10.417488 Write Rank0 MR1 =0x56
682 13:25:10.420892 Write Rank0 MR2 =0x2d
683 13:25:10.421321 Write Rank0 MR11 =0x23
684 13:25:10.424070 Write Rank0 MR22 =0x34
685 13:25:10.424451 Write Rank0 MR14 =0x10
686 13:25:10.427290 Write Rank0 MR3 =0x30
687 13:25:10.430455 Write Rank0 MR13 =0xd8
688 13:25:10.430802 [ModeRegInit_LP4] CH0 RK1
689 13:25:10.434351 Write Rank1 MR13 =0x18
690 13:25:10.437374 Write Rank1 MR12 =0x5d
691 13:25:10.437768 Write Rank1 MR1 =0x56
692 13:25:10.440682 Write Rank1 MR2 =0x1a
693 13:25:10.441064 Write Rank1 MR11 =0x0
694 13:25:10.444079 Write Rank1 MR22 =0x38
695 13:25:10.446944 Write Rank1 MR14 =0x5d
696 13:25:10.447325 Write Rank1 MR3 =0x30
697 13:25:10.450470 Write Rank1 MR13 =0x58
698 13:25:10.453902 Write Rank1 MR12 =0x5d
699 13:25:10.454337 Write Rank1 MR1 =0x56
700 13:25:10.457482 Write Rank1 MR2 =0x2d
701 13:25:10.457866 Write Rank1 MR11 =0x23
702 13:25:10.460216 Write Rank1 MR22 =0x34
703 13:25:10.463663 Write Rank1 MR14 =0x10
704 13:25:10.464044 Write Rank1 MR3 =0x30
705 13:25:10.467106 Write Rank1 MR13 =0xd8
706 13:25:10.469833 [ModeRegInit_LP4] CH1 RK0
707 13:25:10.470243 Write Rank0 MR13 =0x18
708 13:25:10.473293 Write Rank0 MR12 =0x5d
709 13:25:10.473672 Write Rank0 MR1 =0x56
710 13:25:10.476512 Write Rank0 MR2 =0x1a
711 13:25:10.480269 Write Rank0 MR11 =0x0
712 13:25:10.480690 Write Rank0 MR22 =0x38
713 13:25:10.483017 Write Rank0 MR14 =0x5d
714 13:25:10.486610 Write Rank0 MR3 =0x30
715 13:25:10.486990 Write Rank0 MR13 =0x58
716 13:25:10.489788 Write Rank0 MR12 =0x5d
717 13:25:10.490247 Write Rank0 MR1 =0x56
718 13:25:10.493373 Write Rank0 MR2 =0x2d
719 13:25:10.496632 Write Rank0 MR11 =0x23
720 13:25:10.497023 Write Rank0 MR22 =0x34
721 13:25:10.499961 Write Rank0 MR14 =0x10
722 13:25:10.500352 Write Rank0 MR3 =0x30
723 13:25:10.503210 Write Rank0 MR13 =0xd8
724 13:25:10.506305 [ModeRegInit_LP4] CH1 RK1
725 13:25:10.506697 Write Rank1 MR13 =0x18
726 13:25:10.509463 Write Rank1 MR12 =0x5d
727 13:25:10.512659 Write Rank1 MR1 =0x56
728 13:25:10.513197 Write Rank1 MR2 =0x1a
729 13:25:10.515872 Write Rank1 MR11 =0x0
730 13:25:10.516411 Write Rank1 MR22 =0x38
731 13:25:10.519294 Write Rank1 MR14 =0x5d
732 13:25:10.522688 Write Rank1 MR3 =0x30
733 13:25:10.523163 Write Rank1 MR13 =0x58
734 13:25:10.525947 Write Rank1 MR12 =0x5d
735 13:25:10.529167 Write Rank1 MR1 =0x56
736 13:25:10.529639 Write Rank1 MR2 =0x2d
737 13:25:10.532462 Write Rank1 MR11 =0x23
738 13:25:10.532871 Write Rank1 MR22 =0x34
739 13:25:10.535875 Write Rank1 MR14 =0x10
740 13:25:10.539214 Write Rank1 MR3 =0x30
741 13:25:10.539671 Write Rank1 MR13 =0xd8
742 13:25:10.542204 match AC timing 3
743 13:25:10.552319 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
744 13:25:10.552731 DramC Write-DBI off
745 13:25:10.555818 DramC Read-DBI off
746 13:25:10.556226 Write Rank0 MR13 =0x59
747 13:25:10.558598 ==
748 13:25:10.562184 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
749 13:25:10.565578 fsp= 1, odt_onoff= 1, Byte mode= 0
750 13:25:10.566050 ==
751 13:25:10.569021 === u2Vref_new: 0x56 --> 0x2d
752 13:25:10.571922 === u2Vref_new: 0x58 --> 0x38
753 13:25:10.575466 === u2Vref_new: 0x5a --> 0x39
754 13:25:10.578819 === u2Vref_new: 0x5c --> 0x3c
755 13:25:10.581674 === u2Vref_new: 0x5e --> 0x3d
756 13:25:10.585032 === u2Vref_new: 0x60 --> 0xa0
757 13:25:10.588524 [CA 0] Center 34 (6~63) winsize 58
758 13:25:10.592010 [CA 1] Center 35 (8~63) winsize 56
759 13:25:10.595000 [CA 2] Center 30 (1~59) winsize 59
760 13:25:10.595393 [CA 3] Center 24 (-3~52) winsize 56
761 13:25:10.598808 [CA 4] Center 26 (-2~54) winsize 57
762 13:25:10.602097 [CA 5] Center 31 (2~60) winsize 59
763 13:25:10.602575
764 13:25:10.608660 [CATrainingPosCal] consider 1 rank data
765 13:25:10.609064 u2DelayCellTimex100 = 744/100 ps
766 13:25:10.614930 CA0 delay=34 (6~63),Diff = 10 PI (13 cell)
767 13:25:10.617868 CA1 delay=35 (8~63),Diff = 11 PI (14 cell)
768 13:25:10.621361 CA2 delay=30 (1~59),Diff = 6 PI (7 cell)
769 13:25:10.624801 CA3 delay=24 (-3~52),Diff = 0 PI (0 cell)
770 13:25:10.628292 CA4 delay=26 (-2~54),Diff = 2 PI (2 cell)
771 13:25:10.631218 CA5 delay=31 (2~60),Diff = 7 PI (9 cell)
772 13:25:10.631609
773 13:25:10.634738 CA PerBit enable=1, Macro0, CA PI delay=24
774 13:25:10.637729 === u2Vref_new: 0x5e --> 0x3d
775 13:25:10.638168
776 13:25:10.641474 Vref(ca) range 1: 30
777 13:25:10.641949
778 13:25:10.642385 CS Dly= 7 (38-0-32)
779 13:25:10.644455 Write Rank0 MR13 =0xd8
780 13:25:10.647786 Write Rank0 MR13 =0xd8
781 13:25:10.648308 Write Rank0 MR12 =0x5e
782 13:25:10.650885 Write Rank1 MR13 =0x59
783 13:25:10.651373 ==
784 13:25:10.657675 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
785 13:25:10.658235 fsp= 1, odt_onoff= 1, Byte mode= 0
786 13:25:10.660826 ==
787 13:25:10.661290 === u2Vref_new: 0x56 --> 0x2d
788 13:25:10.664324 === u2Vref_new: 0x58 --> 0x38
789 13:25:10.668018 === u2Vref_new: 0x5a --> 0x39
790 13:25:10.671425 === u2Vref_new: 0x5c --> 0x3c
791 13:25:10.674296 === u2Vref_new: 0x5e --> 0x3d
792 13:25:10.677748 === u2Vref_new: 0x60 --> 0xa0
793 13:25:10.681340 [CA 0] Center 35 (8~63) winsize 56
794 13:25:10.684245 [CA 1] Center 35 (8~63) winsize 56
795 13:25:10.687703 [CA 2] Center 31 (2~60) winsize 59
796 13:25:10.691099 [CA 3] Center 26 (-2~54) winsize 57
797 13:25:10.694494 [CA 4] Center 26 (-2~54) winsize 57
798 13:25:10.697200 [CA 5] Center 32 (3~61) winsize 59
799 13:25:10.697589
800 13:25:10.700701 [CATrainingPosCal] consider 2 rank data
801 13:25:10.704199 u2DelayCellTimex100 = 744/100 ps
802 13:25:10.707604 CA0 delay=35 (8~63),Diff = 10 PI (13 cell)
803 13:25:10.710414 CA1 delay=35 (8~63),Diff = 10 PI (13 cell)
804 13:25:10.713775 CA2 delay=30 (2~59),Diff = 5 PI (6 cell)
805 13:25:10.717234 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
806 13:25:10.724123 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
807 13:25:10.727092 CA5 delay=31 (3~60),Diff = 6 PI (7 cell)
808 13:25:10.727491
809 13:25:10.730254 CA PerBit enable=1, Macro0, CA PI delay=25
810 13:25:10.734045 === u2Vref_new: 0x5e --> 0x3d
811 13:25:10.734434
812 13:25:10.734738 Vref(ca) range 1: 30
813 13:25:10.735018
814 13:25:10.737239 CS Dly= 7 (38-0-32)
815 13:25:10.739957 Write Rank1 MR13 =0xd8
816 13:25:10.740348 Write Rank1 MR13 =0xd8
817 13:25:10.743501 Write Rank1 MR12 =0x5e
818 13:25:10.746885 [RankSwap] Rank num 2, (Multi 1), Rank 0
819 13:25:10.747275 Write Rank0 MR2 =0xad
820 13:25:10.750205 [Write Leveling]
821 13:25:10.753521 delay byte0 byte1 byte2 byte3
822 13:25:10.753932
823 13:25:10.754303 10 0 0
824 13:25:10.756901 11 0 0
825 13:25:10.757293 12 0 0
826 13:25:10.759969 13 0 0
827 13:25:10.760362 14 0 0
828 13:25:10.760670 15 0 0
829 13:25:10.763138 16 0 0
830 13:25:10.763526 17 0 0
831 13:25:10.766152 18 0 0
832 13:25:10.766544 19 0 0
833 13:25:10.769700 20 0 0
834 13:25:10.770235 21 0 0
835 13:25:10.770549 22 0 ff
836 13:25:10.772959 23 0 ff
837 13:25:10.773352 24 0 ff
838 13:25:10.776415 25 0 ff
839 13:25:10.776804 26 0 ff
840 13:25:10.779836 27 0 ff
841 13:25:10.780319 28 0 ff
842 13:25:10.780741 29 0 ff
843 13:25:10.782966 30 0 ff
844 13:25:10.783356 31 ff ff
845 13:25:10.786557 32 ff ff
846 13:25:10.786946 33 ff ff
847 13:25:10.789913 34 ff ff
848 13:25:10.790344 35 ff ff
849 13:25:10.792707 36 ff ff
850 13:25:10.793092 37 ff ff
851 13:25:10.796056 pass bytecount = 0xff (0xff: all bytes pass)
852 13:25:10.796557
853 13:25:10.799542 DQS0 dly: 31
854 13:25:10.799992 DQS1 dly: 22
855 13:25:10.803059 Write Rank0 MR2 =0x2d
856 13:25:10.806644 [RankSwap] Rank num 2, (Multi 1), Rank 0
857 13:25:10.809288 Write Rank0 MR1 =0xd6
858 13:25:10.809679 [Gating]
859 13:25:10.810184 ==
860 13:25:10.812712 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
861 13:25:10.816302 fsp= 1, odt_onoff= 1, Byte mode= 0
862 13:25:10.816698 ==
863 13:25:10.822577 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
864 13:25:10.826272 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
865 13:25:10.829513 3 1 8 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
866 13:25:10.836073 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
867 13:25:10.838925 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
868 13:25:10.842603 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
869 13:25:10.848944 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
870 13:25:10.852356 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
871 13:25:10.855716 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
872 13:25:10.862403 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
873 13:25:10.865652 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
874 13:25:10.868947 3 2 12 |504 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
875 13:25:10.875321 3 2 16 |3d3d 706 |(11 11)(11 11) |(1 1)(0 0)| 0
876 13:25:10.878712 3 2 20 |3d3d 606 |(11 11)(11 11) |(1 1)(0 0)| 0
877 13:25:10.881804 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
878 13:25:10.888798 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
879 13:25:10.891689 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
880 13:25:10.895059 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
881 13:25:10.898044 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
882 13:25:10.905066 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
883 13:25:10.908525 3 3 16 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
884 13:25:10.911397 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
885 13:25:10.918286 [Byte 0] Lead/lag Transition tap number (1)
886 13:25:10.921073 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
887 13:25:10.924608 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
888 13:25:10.931422 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
889 13:25:10.934690 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
890 13:25:10.938117 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
891 13:25:10.944933 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
892 13:25:10.947619 3 4 16 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
893 13:25:10.950851 3 4 20 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
894 13:25:10.954975 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
895 13:25:10.960829 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
896 13:25:10.964583 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
897 13:25:10.967614 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
898 13:25:10.974474 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
899 13:25:10.977303 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
900 13:25:10.980532 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
901 13:25:10.987198 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
902 13:25:10.990820 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
903 13:25:10.993930 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
904 13:25:11.000741 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
905 13:25:11.003985 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
906 13:25:11.006849 [Byte 0] Lead/lag falling Transition (3, 6, 4)
907 13:25:11.013875 [Byte 1] Lead/lag falling Transition (3, 6, 4)
908 13:25:11.016948 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
909 13:25:11.019891 [Byte 0] Lead/lag Transition tap number (2)
910 13:25:11.023563 3 6 12 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
911 13:25:11.030397 [Byte 1] Lead/lag Transition tap number (3)
912 13:25:11.033806 3 6 16 |3232 403 |(1 1)(11 11) |(0 0)(0 0)| 0
913 13:25:11.036624 3 6 20 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
914 13:25:11.039969 [Byte 0]First pass (3, 6, 20)
915 13:25:11.043359 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
916 13:25:11.046778 [Byte 1]First pass (3, 6, 24)
917 13:25:11.049989 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
918 13:25:11.053404 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
919 13:25:11.059730 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
920 13:25:11.063015 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
921 13:25:11.066547 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
922 13:25:11.069529 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
923 13:25:11.073059 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
924 13:25:11.079457 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
925 13:25:11.083279 All bytes gating window > 1UI, Early break!
926 13:25:11.083789
927 13:25:11.085862 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 8)
928 13:25:11.086410
929 13:25:11.089256 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
930 13:25:11.089745
931 13:25:11.090247
932 13:25:11.090692
933 13:25:11.092589 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
934 13:25:11.093070
935 13:25:11.099416 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
936 13:25:11.099952
937 13:25:11.100430
938 13:25:11.100894 Write Rank0 MR1 =0x56
939 13:25:11.101350
940 13:25:11.102319 best RODT dly(2T, 0.5T) = (2, 3)
941 13:25:11.102796
942 13:25:11.106114 best RODT dly(2T, 0.5T) = (2, 3)
943 13:25:11.106679 ==
944 13:25:11.112851 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
945 13:25:11.115750 fsp= 1, odt_onoff= 1, Byte mode= 0
946 13:25:11.116205 ==
947 13:25:11.119017 Start DQ dly to find pass range UseTestEngine =0
948 13:25:11.122597 x-axis: bit #, y-axis: DQ dly (-127~63)
949 13:25:11.125912 RX Vref Scan = 0
950 13:25:11.129377 -26, [0] xxxxxxxx xxxxxxxx [MSB]
951 13:25:11.132363 -25, [0] xxxxxxxx xxxxxxxx [MSB]
952 13:25:11.132759 -24, [0] xxxxxxxx xxxxxxxx [MSB]
953 13:25:11.135547 -23, [0] xxxxxxxx xxxxxxxx [MSB]
954 13:25:11.139010 -22, [0] xxxxxxxx xxxxxxxx [MSB]
955 13:25:11.142119 -21, [0] xxxxxxxx xxxxxxxx [MSB]
956 13:25:11.145512 -20, [0] xxxxxxxx xxxxxxxx [MSB]
957 13:25:11.148923 -19, [0] xxxxxxxx xxxxxxxx [MSB]
958 13:25:11.152372 -18, [0] xxxxxxxx xxxxxxxx [MSB]
959 13:25:11.156058 -17, [0] xxxxxxxx xxxxxxxx [MSB]
960 13:25:11.156456 -16, [0] xxxxxxxx xxxxxxxx [MSB]
961 13:25:11.158482 -15, [0] xxxxxxxx xxxxxxxx [MSB]
962 13:25:11.161869 -14, [0] xxxxxxxx xxxxxxxx [MSB]
963 13:25:11.165394 -13, [0] xxxxxxxx xxxxxxxx [MSB]
964 13:25:11.168814 -12, [0] xxxxxxxx xxxxxxxx [MSB]
965 13:25:11.171555 -11, [0] xxxxxxxx xxxxxxxx [MSB]
966 13:25:11.175567 -10, [0] xxxxxxxx xxxxxxxx [MSB]
967 13:25:11.178319 -9, [0] xxxxxxxx xxxxxxxx [MSB]
968 13:25:11.181658 -8, [0] xxxxxxxx xxxxxxxx [MSB]
969 13:25:11.182089 -7, [0] xxxxxxxx xxxxxxxx [MSB]
970 13:25:11.184912 -6, [0] xxxxxxxx xxxxxxxx [MSB]
971 13:25:11.188390 -5, [0] xxxxxxxx xxxxxxxx [MSB]
972 13:25:11.191462 -4, [0] xxxxxxxx xxxxxxxx [MSB]
973 13:25:11.194973 -3, [0] xxxoxxxx xxxxxxxx [MSB]
974 13:25:11.198091 -2, [0] xxxoxxxx oxxxxxxx [MSB]
975 13:25:11.201625 -1, [0] xxxoxxxx oxxxxxxx [MSB]
976 13:25:11.202047 0, [0] xxxoxxxx ooxoxxxx [MSB]
977 13:25:11.204662 1, [0] xxxoxoox ooxooxxx [MSB]
978 13:25:11.207841 2, [0] xxxoxoox ooxoooxx [MSB]
979 13:25:11.211003 3, [0] xxxoxoox ooxoooox [MSB]
980 13:25:11.214556 4, [0] xoxoxooo ooxoooox [MSB]
981 13:25:11.217644 5, [0] xoxooooo ooxooooo [MSB]
982 13:25:11.220982 6, [0] xooooooo ooxooooo [MSB]
983 13:25:11.221367 7, [0] oooooooo ooxooooo [MSB]
984 13:25:11.224255 33, [0] oooxoooo oooooooo [MSB]
985 13:25:11.227806 34, [0] oooxoxoo oooooooo [MSB]
986 13:25:11.231301 35, [0] oooxoxoo xooxoooo [MSB]
987 13:25:11.234096 36, [0] oooxoxoo xxoxxooo [MSB]
988 13:25:11.237400 37, [0] oooxoxxo xxoxxxoo [MSB]
989 13:25:11.240914 38, [0] oooxoxxx xxoxxxxo [MSB]
990 13:25:11.241321 39, [0] xooxoxxx xxoxxxxo [MSB]
991 13:25:11.244269 40, [0] xxoxoxxx xxoxxxxo [MSB]
992 13:25:11.247440 41, [0] xxxxxxxx xxoxxxxx [MSB]
993 13:25:11.250659 42, [0] xxxxxxxx xxoxxxxx [MSB]
994 13:25:11.254178 43, [0] xxxxxxxx xxxxxxxx [MSB]
995 13:25:11.257378 iDelay=43, Bit 0, Center 22 (7 ~ 38) 32
996 13:25:11.260494 iDelay=43, Bit 1, Center 21 (4 ~ 39) 36
997 13:25:11.264586 iDelay=43, Bit 2, Center 23 (6 ~ 40) 35
998 13:25:11.267715 iDelay=43, Bit 3, Center 14 (-3 ~ 32) 36
999 13:25:11.270525 iDelay=43, Bit 4, Center 22 (5 ~ 40) 36
1000 13:25:11.274157 iDelay=43, Bit 5, Center 17 (1 ~ 33) 33
1001 13:25:11.277347 iDelay=43, Bit 6, Center 18 (1 ~ 36) 36
1002 13:25:11.280115 iDelay=43, Bit 7, Center 20 (4 ~ 37) 34
1003 13:25:11.287133 iDelay=43, Bit 8, Center 16 (-2 ~ 34) 37
1004 13:25:11.290566 iDelay=43, Bit 9, Center 17 (0 ~ 35) 36
1005 13:25:11.293846 iDelay=43, Bit 10, Center 25 (8 ~ 42) 35
1006 13:25:11.297488 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
1007 13:25:11.300589 iDelay=43, Bit 12, Center 18 (1 ~ 35) 35
1008 13:25:11.303797 iDelay=43, Bit 13, Center 19 (2 ~ 36) 35
1009 13:25:11.307260 iDelay=43, Bit 14, Center 20 (3 ~ 37) 35
1010 13:25:11.310060 iDelay=43, Bit 15, Center 22 (5 ~ 40) 36
1011 13:25:11.310444 ==
1012 13:25:11.316798 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1013 13:25:11.320499 fsp= 1, odt_onoff= 1, Byte mode= 0
1014 13:25:11.320886 ==
1015 13:25:11.321187 DQS Delay:
1016 13:25:11.323405 DQS0 = 0, DQS1 = 0
1017 13:25:11.323788 DQM Delay:
1018 13:25:11.326798 DQM0 = 19, DQM1 = 19
1019 13:25:11.327203 DQ Delay:
1020 13:25:11.330155 DQ0 =22, DQ1 =21, DQ2 =23, DQ3 =14
1021 13:25:11.333173 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =20
1022 13:25:11.336496 DQ8 =16, DQ9 =17, DQ10 =25, DQ11 =17
1023 13:25:11.339998 DQ12 =18, DQ13 =19, DQ14 =20, DQ15 =22
1024 13:25:11.340384
1025 13:25:11.340680
1026 13:25:11.340955 DramC Write-DBI off
1027 13:25:11.341223 ==
1028 13:25:11.346996 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1029 13:25:11.349837 fsp= 1, odt_onoff= 1, Byte mode= 0
1030 13:25:11.350266 ==
1031 13:25:11.353303 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1032 13:25:11.353688
1033 13:25:11.356634 Begin, DQ Scan Range 918~1174
1034 13:25:11.357022
1035 13:25:11.357321
1036 13:25:11.360084 TX Vref Scan disable
1037 13:25:11.363530 918 |3 4 22|[0] xxxxxxxx xxxxxxxx [MSB]
1038 13:25:11.366115 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1039 13:25:11.369980 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1040 13:25:11.372879 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1041 13:25:11.376756 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1042 13:25:11.379803 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1043 13:25:11.382691 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1044 13:25:11.386607 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1045 13:25:11.389839 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1046 13:25:11.396079 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1047 13:25:11.399530 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1048 13:25:11.403120 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1049 13:25:11.406422 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1050 13:25:11.409371 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1051 13:25:11.412548 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1052 13:25:11.416454 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1053 13:25:11.419514 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1054 13:25:11.422994 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1055 13:25:11.426192 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1056 13:25:11.429493 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1057 13:25:11.432827 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1058 13:25:11.435962 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1059 13:25:11.439411 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1060 13:25:11.442326 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1061 13:25:11.448978 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1062 13:25:11.452379 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1063 13:25:11.455837 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1064 13:25:11.459305 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1065 13:25:11.462223 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1066 13:25:11.465572 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1067 13:25:11.469090 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1068 13:25:11.472542 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1069 13:25:11.475905 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1070 13:25:11.479358 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1071 13:25:11.482537 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1072 13:25:11.485320 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1073 13:25:11.488640 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1074 13:25:11.491989 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1075 13:25:11.495607 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1076 13:25:11.502180 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1077 13:25:11.505728 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1078 13:25:11.508499 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1079 13:25:11.512248 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1080 13:25:11.515662 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1081 13:25:11.518540 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1082 13:25:11.521892 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1083 13:25:11.525297 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1084 13:25:11.528651 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1085 13:25:11.531754 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1086 13:25:11.535348 967 |3 6 7|[0] xxxxxxxx oxxxxxxx [MSB]
1087 13:25:11.538170 968 |3 6 8|[0] xxxxxxxx oxxooxxx [MSB]
1088 13:25:11.541662 969 |3 6 9|[0] xxxxxxxx ooxoooxx [MSB]
1089 13:25:11.545018 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1090 13:25:11.548476 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1091 13:25:11.551536 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1092 13:25:11.555209 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1093 13:25:11.558050 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1094 13:25:11.564989 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1095 13:25:11.568071 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1096 13:25:11.571615 977 |3 6 17|[0] xxxooooo oooooooo [MSB]
1097 13:25:11.575115 978 |3 6 18|[0] xoxooooo oooooooo [MSB]
1098 13:25:11.578459 979 |3 6 19|[0] xooooooo oooooooo [MSB]
1099 13:25:11.581207 986 |3 6 26|[0] oooooooo xooxoooo [MSB]
1100 13:25:11.584707 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1101 13:25:11.587918 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1102 13:25:11.591253 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1103 13:25:11.594812 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1104 13:25:11.598235 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1105 13:25:11.604428 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1106 13:25:11.607721 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1107 13:25:11.611387 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1108 13:25:11.614708 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1109 13:25:11.618058 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1110 13:25:11.620993 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1111 13:25:11.624348 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1112 13:25:11.627964 Byte0, DQ PI dly=986, DQM PI dly= 986
1113 13:25:11.631114 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1114 13:25:11.631505
1115 13:25:11.637718 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1116 13:25:11.638234
1117 13:25:11.641039 Byte1, DQ PI dly=977, DQM PI dly= 977
1118 13:25:11.644184 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1119 13:25:11.644650
1120 13:25:11.647426 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1121 13:25:11.647815
1122 13:25:11.650875 ==
1123 13:25:11.654228 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1124 13:25:11.657002 fsp= 1, odt_onoff= 1, Byte mode= 0
1125 13:25:11.657419 ==
1126 13:25:11.660430 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1127 13:25:11.660819
1128 13:25:11.663790 Begin, DQ Scan Range 953~1017
1129 13:25:11.667137 Write Rank0 MR14 =0x0
1130 13:25:11.675321
1131 13:25:11.675749 CH=0, VrefRange= 0, VrefLevel = 0
1132 13:25:11.681604 TX Bit0 (983~995) 13 989, Bit8 (970~981) 12 975,
1133 13:25:11.685214 TX Bit1 (982~993) 12 987, Bit9 (972~982) 11 977,
1134 13:25:11.691679 TX Bit2 (982~994) 13 988, Bit10 (975~987) 13 981,
1135 13:25:11.694958 TX Bit3 (976~989) 14 982, Bit11 (971~981) 11 976,
1136 13:25:11.698517 TX Bit4 (982~991) 10 986, Bit12 (973~982) 10 977,
1137 13:25:11.704784 TX Bit5 (978~990) 13 984, Bit13 (973~982) 10 977,
1138 13:25:11.708115 TX Bit6 (979~991) 13 985, Bit14 (973~984) 12 978,
1139 13:25:11.711500 TX Bit7 (981~991) 11 986, Bit15 (974~988) 15 981,
1140 13:25:11.715096
1141 13:25:11.715598 Write Rank0 MR14 =0x2
1142 13:25:11.724296
1143 13:25:11.724682 CH=0, VrefRange= 0, VrefLevel = 2
1144 13:25:11.730282 TX Bit0 (983~996) 14 989, Bit8 (971~981) 11 976,
1145 13:25:11.733606 TX Bit1 (981~994) 14 987, Bit9 (972~983) 12 977,
1146 13:25:11.740040 TX Bit2 (982~995) 14 988, Bit10 (975~988) 14 981,
1147 13:25:11.743555 TX Bit3 (976~990) 15 983, Bit11 (971~981) 11 976,
1148 13:25:11.746720 TX Bit4 (981~992) 12 986, Bit12 (972~983) 12 977,
1149 13:25:11.753115 TX Bit5 (978~990) 13 984, Bit13 (972~982) 11 977,
1150 13:25:11.756958 TX Bit6 (979~992) 14 985, Bit14 (973~985) 13 979,
1151 13:25:11.763223 TX Bit7 (980~992) 13 986, Bit15 (974~989) 16 981,
1152 13:25:11.763658
1153 13:25:11.764007 Write Rank0 MR14 =0x4
1154 13:25:11.772603
1155 13:25:11.773165 CH=0, VrefRange= 0, VrefLevel = 4
1156 13:25:11.779443 TX Bit0 (982~997) 16 989, Bit8 (969~982) 14 975,
1157 13:25:11.782433 TX Bit1 (980~994) 15 987, Bit9 (972~983) 12 977,
1158 13:25:11.789119 TX Bit2 (981~995) 15 988, Bit10 (975~989) 15 982,
1159 13:25:11.792428 TX Bit3 (975~990) 16 982, Bit11 (970~982) 13 976,
1160 13:25:11.795736 TX Bit4 (981~992) 12 986, Bit12 (972~984) 13 978,
1161 13:25:11.802656 TX Bit5 (978~991) 14 984, Bit13 (972~983) 12 977,
1162 13:25:11.805690 TX Bit6 (978~992) 15 985, Bit14 (972~986) 15 979,
1163 13:25:11.811842 TX Bit7 (981~993) 13 987, Bit15 (974~989) 16 981,
1164 13:25:11.812208
1165 13:25:11.812506 Write Rank0 MR14 =0x6
1166 13:25:11.869725
1167 13:25:11.870244 CH=0, VrefRange= 0, VrefLevel = 6
1168 13:25:11.870721 TX Bit0 (982~997) 16 989, Bit8 (969~982) 14 975,
1169 13:25:11.871531 TX Bit1 (980~996) 17 988, Bit9 (971~984) 14 977,
1170 13:25:11.872032 TX Bit2 (981~997) 17 989, Bit10 (975~989) 15 982,
1171 13:25:11.872383 TX Bit3 (975~991) 17 983, Bit11 (970~982) 13 976,
1172 13:25:11.872703 TX Bit4 (980~993) 14 986, Bit12 (971~984) 14 977,
1173 13:25:11.873132 TX Bit5 (977~991) 15 984, Bit13 (972~984) 13 978,
1174 13:25:11.873518 TX Bit6 (978~993) 16 985, Bit14 (972~987) 16 979,
1175 13:25:11.873827 TX Bit7 (980~993) 14 986, Bit15 (974~990) 17 982,
1176 13:25:11.874331
1177 13:25:11.874627 Write Rank0 MR14 =0x8
1178 13:25:11.874935
1179 13:25:11.889493 CH=0, VrefRange= 0, VrefLevel = 8
1180 13:25:11.890094 TX Bit0 (982~998) 17 990, Bit8 (968~982) 15 975,
1181 13:25:11.890883 TX Bit1 (980~996) 17 988, Bit9 (970~984) 15 977,
1182 13:25:11.891255 TX Bit2 (981~997) 17 989, Bit10 (974~990) 17 982,
1183 13:25:11.892899 TX Bit3 (975~991) 17 983, Bit11 (970~983) 14 976,
1184 13:25:11.896115 TX Bit4 (979~994) 16 986, Bit12 (971~985) 15 978,
1185 13:25:11.899531 TX Bit5 (977~992) 16 984, Bit13 (971~984) 14 977,
1186 13:25:11.903044 TX Bit6 (977~993) 17 985, Bit14 (971~988) 18 979,
1187 13:25:11.909661 TX Bit7 (979~994) 16 986, Bit15 (974~990) 17 982,
1188 13:25:11.910092
1189 13:25:11.910401 Write Rank0 MR14 =0xa
1190 13:25:11.919380
1191 13:25:11.922743 CH=0, VrefRange= 0, VrefLevel = 10
1192 13:25:11.926199 TX Bit0 (981~998) 18 989, Bit8 (968~983) 16 975,
1193 13:25:11.929678 TX Bit1 (979~997) 19 988, Bit9 (969~985) 17 977,
1194 13:25:11.935900 TX Bit2 (981~998) 18 989, Bit10 (974~990) 17 982,
1195 13:25:11.939264 TX Bit3 (974~991) 18 982, Bit11 (969~983) 15 976,
1196 13:25:11.942580 TX Bit4 (979~995) 17 987, Bit12 (970~986) 17 978,
1197 13:25:11.948839 TX Bit5 (977~992) 16 984, Bit13 (971~984) 14 977,
1198 13:25:11.952170 TX Bit6 (977~994) 18 985, Bit14 (971~988) 18 979,
1199 13:25:11.959141 TX Bit7 (978~995) 18 986, Bit15 (973~990) 18 981,
1200 13:25:11.959309
1201 13:25:11.959437 Write Rank0 MR14 =0xc
1202 13:25:11.968516
1203 13:25:11.971637 CH=0, VrefRange= 0, VrefLevel = 12
1204 13:25:11.975018 TX Bit0 (981~998) 18 989, Bit8 (967~983) 17 975,
1205 13:25:11.978345 TX Bit1 (978~997) 20 987, Bit9 (969~986) 18 977,
1206 13:25:11.985033 TX Bit2 (980~998) 19 989, Bit10 (974~991) 18 982,
1207 13:25:11.988301 TX Bit3 (974~992) 19 983, Bit11 (968~984) 17 976,
1208 13:25:11.991479 TX Bit4 (978~995) 18 986, Bit12 (970~986) 17 978,
1209 13:25:11.997856 TX Bit5 (976~992) 17 984, Bit13 (970~986) 17 978,
1210 13:25:12.001502 TX Bit6 (977~995) 19 986, Bit14 (971~989) 19 980,
1211 13:25:12.008086 TX Bit7 (978~995) 18 986, Bit15 (973~991) 19 982,
1212 13:25:12.008184
1213 13:25:12.008270 Write Rank0 MR14 =0xe
1214 13:25:12.017647
1215 13:25:12.021075 CH=0, VrefRange= 0, VrefLevel = 14
1216 13:25:12.024259 TX Bit0 (980~999) 20 989, Bit8 (967~984) 18 975,
1217 13:25:12.027524 TX Bit1 (978~998) 21 988, Bit9 (969~987) 19 978,
1218 13:25:12.033876 TX Bit2 (980~999) 20 989, Bit10 (973~991) 19 982,
1219 13:25:12.037392 TX Bit3 (974~992) 19 983, Bit11 (968~984) 17 976,
1220 13:25:12.040935 TX Bit4 (978~996) 19 987, Bit12 (969~988) 20 978,
1221 13:25:12.047035 TX Bit5 (976~993) 18 984, Bit13 (969~986) 18 977,
1222 13:25:12.050262 TX Bit6 (977~996) 20 986, Bit14 (969~989) 21 979,
1223 13:25:12.056830 TX Bit7 (979~996) 18 987, Bit15 (973~991) 19 982,
1224 13:25:12.056907
1225 13:25:12.056966 Write Rank0 MR14 =0x10
1226 13:25:12.067060
1227 13:25:12.070532 CH=0, VrefRange= 0, VrefLevel = 16
1228 13:25:12.073362 TX Bit0 (980~999) 20 989, Bit8 (967~985) 19 976,
1229 13:25:12.076730 TX Bit1 (978~999) 22 988, Bit9 (968~988) 21 978,
1230 13:25:12.083603 TX Bit2 (979~999) 21 989, Bit10 (974~992) 19 983,
1231 13:25:12.086984 TX Bit3 (974~993) 20 983, Bit11 (968~985) 18 976,
1232 13:25:12.090048 TX Bit4 (978~997) 20 987, Bit12 (969~988) 20 978,
1233 13:25:12.096722 TX Bit5 (976~994) 19 985, Bit13 (969~987) 19 978,
1234 13:25:12.099639 TX Bit6 (976~996) 21 986, Bit14 (970~989) 20 979,
1235 13:25:12.106394 TX Bit7 (978~997) 20 987, Bit15 (972~992) 21 982,
1236 13:25:12.106490
1237 13:25:12.106578 Write Rank0 MR14 =0x12
1238 13:25:12.116406
1239 13:25:12.119439 CH=0, VrefRange= 0, VrefLevel = 18
1240 13:25:12.123109 TX Bit0 (980~999) 20 989, Bit8 (967~985) 19 976,
1241 13:25:12.126279 TX Bit1 (977~999) 23 988, Bit9 (968~988) 21 978,
1242 13:25:12.133134 TX Bit2 (978~999) 22 988, Bit10 (974~992) 19 983,
1243 13:25:12.135877 TX Bit3 (973~993) 21 983, Bit11 (967~986) 20 976,
1244 13:25:12.139264 TX Bit4 (977~998) 22 987, Bit12 (968~989) 22 978,
1245 13:25:12.145892 TX Bit5 (976~994) 19 985, Bit13 (969~988) 20 978,
1246 13:25:12.149201 TX Bit6 (976~997) 22 986, Bit14 (969~990) 22 979,
1247 13:25:12.155510 TX Bit7 (978~998) 21 988, Bit15 (972~993) 22 982,
1248 13:25:12.155590
1249 13:25:12.155648 Write Rank0 MR14 =0x14
1250 13:25:12.165635
1251 13:25:12.169035 CH=0, VrefRange= 0, VrefLevel = 20
1252 13:25:12.172519 TX Bit0 (979~1000) 22 989, Bit8 (966~986) 21 976,
1253 13:25:12.175983 TX Bit1 (977~999) 23 988, Bit9 (968~988) 21 978,
1254 13:25:12.182187 TX Bit2 (978~999) 22 988, Bit10 (973~993) 21 983,
1255 13:25:12.185517 TX Bit3 (973~993) 21 983, Bit11 (967~986) 20 976,
1256 13:25:12.188936 TX Bit4 (977~998) 22 987, Bit12 (968~989) 22 978,
1257 13:25:12.195699 TX Bit5 (976~995) 20 985, Bit13 (969~989) 21 979,
1258 13:25:12.198865 TX Bit6 (976~998) 23 987, Bit14 (968~990) 23 979,
1259 13:25:12.205387 TX Bit7 (977~998) 22 987, Bit15 (972~993) 22 982,
1260 13:25:12.205488
1261 13:25:12.205575 Write Rank0 MR14 =0x16
1262 13:25:12.215149
1263 13:25:12.218865 CH=0, VrefRange= 0, VrefLevel = 22
1264 13:25:12.221702 TX Bit0 (978~1000) 23 989, Bit8 (966~987) 22 976,
1265 13:25:12.225569 TX Bit1 (977~999) 23 988, Bit9 (968~989) 22 978,
1266 13:25:12.232038 TX Bit2 (978~1000) 23 989, Bit10 (973~993) 21 983,
1267 13:25:12.235492 TX Bit3 (973~994) 22 983, Bit11 (967~987) 21 977,
1268 13:25:12.238855 TX Bit4 (977~998) 22 987, Bit12 (968~989) 22 978,
1269 13:25:12.245112 TX Bit5 (976~996) 21 986, Bit13 (968~989) 22 978,
1270 13:25:12.248656 TX Bit6 (976~998) 23 987, Bit14 (968~990) 23 979,
1271 13:25:12.255352 TX Bit7 (978~998) 21 988, Bit15 (972~993) 22 982,
1272 13:25:12.255429
1273 13:25:12.255487 Write Rank0 MR14 =0x18
1274 13:25:12.265306
1275 13:25:12.268794 CH=0, VrefRange= 0, VrefLevel = 24
1276 13:25:12.271631 TX Bit0 (978~1001) 24 989, Bit8 (966~988) 23 977,
1277 13:25:12.274958 TX Bit1 (977~1000) 24 988, Bit9 (968~989) 22 978,
1278 13:25:12.281470 TX Bit2 (978~1000) 23 989, Bit10 (972~994) 23 983,
1279 13:25:12.284889 TX Bit3 (973~995) 23 984, Bit11 (966~988) 23 977,
1280 13:25:12.291849 TX Bit4 (977~999) 23 988, Bit12 (967~990) 24 978,
1281 13:25:12.294544 TX Bit5 (975~997) 23 986, Bit13 (968~989) 22 978,
1282 13:25:12.297954 TX Bit6 (975~998) 24 986, Bit14 (968~990) 23 979,
1283 13:25:12.304579 TX Bit7 (977~999) 23 988, Bit15 (972~994) 23 983,
1284 13:25:12.304655
1285 13:25:12.304714 Write Rank0 MR14 =0x1a
1286 13:25:12.315735
1287 13:25:12.318540 CH=0, VrefRange= 0, VrefLevel = 26
1288 13:25:12.321920 TX Bit0 (977~1002) 26 989, Bit8 (966~988) 23 977,
1289 13:25:12.325359 TX Bit1 (977~1000) 24 988, Bit9 (967~989) 23 978,
1290 13:25:12.332124 TX Bit2 (978~1001) 24 989, Bit10 (972~995) 24 983,
1291 13:25:12.334942 TX Bit3 (972~995) 24 983, Bit11 (966~989) 24 977,
1292 13:25:12.338418 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1293 13:25:12.345121 TX Bit5 (975~997) 23 986, Bit13 (967~989) 23 978,
1294 13:25:12.348544 TX Bit6 (975~998) 24 986, Bit14 (968~991) 24 979,
1295 13:25:12.354769 TX Bit7 (977~999) 23 988, Bit15 (971~994) 24 982,
1296 13:25:12.354846
1297 13:25:12.354906 Write Rank0 MR14 =0x1c
1298 13:25:12.365365
1299 13:25:12.369062 CH=0, VrefRange= 0, VrefLevel = 28
1300 13:25:12.372309 TX Bit0 (978~1002) 25 990, Bit8 (965~989) 25 977,
1301 13:25:12.375547 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1302 13:25:12.381924 TX Bit2 (977~1001) 25 989, Bit10 (972~996) 25 984,
1303 13:25:12.385919 TX Bit3 (972~996) 25 984, Bit11 (966~989) 24 977,
1304 13:25:12.388340 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1305 13:25:12.395186 TX Bit5 (975~998) 24 986, Bit13 (967~990) 24 978,
1306 13:25:12.397966 TX Bit6 (975~999) 25 987, Bit14 (967~992) 26 979,
1307 13:25:12.404773 TX Bit7 (976~999) 24 987, Bit15 (970~994) 25 982,
1308 13:25:12.404853
1309 13:25:12.404912 Write Rank0 MR14 =0x1e
1310 13:25:12.415256
1311 13:25:12.418527 CH=0, VrefRange= 0, VrefLevel = 30
1312 13:25:12.421918 TX Bit0 (978~1002) 25 990, Bit8 (965~989) 25 977,
1313 13:25:12.425450 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1314 13:25:12.432080 TX Bit2 (977~1001) 25 989, Bit10 (972~996) 25 984,
1315 13:25:12.434872 TX Bit3 (972~996) 25 984, Bit11 (966~989) 24 977,
1316 13:25:12.438362 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1317 13:25:12.445363 TX Bit5 (975~998) 24 986, Bit13 (967~990) 24 978,
1318 13:25:12.448070 TX Bit6 (975~999) 25 987, Bit14 (967~992) 26 979,
1319 13:25:12.454830 TX Bit7 (976~999) 24 987, Bit15 (970~994) 25 982,
1320 13:25:12.454913
1321 13:25:12.454972 Write Rank0 MR14 =0x20
1322 13:25:12.465195
1323 13:25:12.468635 CH=0, VrefRange= 0, VrefLevel = 32
1324 13:25:12.471964 TX Bit0 (978~1002) 25 990, Bit8 (965~989) 25 977,
1325 13:25:12.475446 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1326 13:25:12.481947 TX Bit2 (977~1001) 25 989, Bit10 (972~996) 25 984,
1327 13:25:12.485088 TX Bit3 (972~996) 25 984, Bit11 (966~989) 24 977,
1328 13:25:12.488626 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1329 13:25:12.495066 TX Bit5 (975~998) 24 986, Bit13 (967~990) 24 978,
1330 13:25:12.498301 TX Bit6 (975~999) 25 987, Bit14 (967~992) 26 979,
1331 13:25:12.504745 TX Bit7 (976~999) 24 987, Bit15 (970~994) 25 982,
1332 13:25:12.504822
1333 13:25:12.504881 Write Rank0 MR14 =0x22
1334 13:25:12.515794
1335 13:25:12.519254 CH=0, VrefRange= 0, VrefLevel = 34
1336 13:25:12.521854 TX Bit0 (978~1002) 25 990, Bit8 (965~989) 25 977,
1337 13:25:12.525391 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1338 13:25:12.531779 TX Bit2 (977~1001) 25 989, Bit10 (972~996) 25 984,
1339 13:25:12.534972 TX Bit3 (972~996) 25 984, Bit11 (966~989) 24 977,
1340 13:25:12.538089 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1341 13:25:12.544704 TX Bit5 (975~998) 24 986, Bit13 (967~990) 24 978,
1342 13:25:12.548263 TX Bit6 (975~999) 25 987, Bit14 (967~992) 26 979,
1343 13:25:12.554384 TX Bit7 (976~999) 24 987, Bit15 (970~994) 25 982,
1344 13:25:12.554462
1345 13:25:12.554522 Write Rank0 MR14 =0x24
1346 13:25:12.564945
1347 13:25:12.568410 CH=0, VrefRange= 0, VrefLevel = 36
1348 13:25:12.571929 TX Bit0 (978~1002) 25 990, Bit8 (965~989) 25 977,
1349 13:25:12.575085 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1350 13:25:12.581905 TX Bit2 (977~1001) 25 989, Bit10 (972~996) 25 984,
1351 13:25:12.584716 TX Bit3 (972~996) 25 984, Bit11 (966~989) 24 977,
1352 13:25:12.588191 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1353 13:25:12.594983 TX Bit5 (975~998) 24 986, Bit13 (967~990) 24 978,
1354 13:25:12.598215 TX Bit6 (975~999) 25 987, Bit14 (967~992) 26 979,
1355 13:25:12.604707 TX Bit7 (976~999) 24 987, Bit15 (970~994) 25 982,
1356 13:25:12.604783
1357 13:25:12.604840
1358 13:25:12.608267 TX Vref found, early break! 361< 374
1359 13:25:12.611118 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
1360 13:25:12.615009 u1DelayCellOfst[0]=7 cells (6 PI)
1361 13:25:12.618353 u1DelayCellOfst[1]=5 cells (4 PI)
1362 13:25:12.620966 u1DelayCellOfst[2]=6 cells (5 PI)
1363 13:25:12.624832 u1DelayCellOfst[3]=0 cells (0 PI)
1364 13:25:12.627476 u1DelayCellOfst[4]=3 cells (3 PI)
1365 13:25:12.631501 u1DelayCellOfst[5]=2 cells (2 PI)
1366 13:25:12.634046 u1DelayCellOfst[6]=3 cells (3 PI)
1367 13:25:12.637480 u1DelayCellOfst[7]=3 cells (3 PI)
1368 13:25:12.640691 Byte0, DQ PI dly=984, DQM PI dly= 987
1369 13:25:12.644031 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1370 13:25:12.644230
1371 13:25:12.647667 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1372 13:25:12.647895
1373 13:25:12.650898 u1DelayCellOfst[8]=0 cells (0 PI)
1374 13:25:12.653876 u1DelayCellOfst[9]=0 cells (0 PI)
1375 13:25:12.657229 u1DelayCellOfst[10]=9 cells (7 PI)
1376 13:25:12.660585 u1DelayCellOfst[11]=0 cells (0 PI)
1377 13:25:12.663938 u1DelayCellOfst[12]=1 cells (1 PI)
1378 13:25:12.667710 u1DelayCellOfst[13]=1 cells (1 PI)
1379 13:25:12.670512 u1DelayCellOfst[14]=2 cells (2 PI)
1380 13:25:12.673761 u1DelayCellOfst[15]=6 cells (5 PI)
1381 13:25:12.677229 Byte1, DQ PI dly=977, DQM PI dly= 980
1382 13:25:12.680365 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1383 13:25:12.680747
1384 13:25:12.683726 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1385 13:25:12.687106
1386 13:25:12.687484 Write Rank0 MR14 =0x1c
1387 13:25:12.687780
1388 13:25:12.690568 Final TX Range 0 Vref 28
1389 13:25:12.690947
1390 13:25:12.696888 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1391 13:25:12.697285
1392 13:25:12.703598 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1393 13:25:12.710331 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1394 13:25:12.716146 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1395 13:25:12.719727 Write Rank0 MR3 =0xb0
1396 13:25:12.719913 DramC Write-DBI on
1397 13:25:12.720041 ==
1398 13:25:12.726038 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1399 13:25:12.729770 fsp= 1, odt_onoff= 1, Byte mode= 0
1400 13:25:12.729938 ==
1401 13:25:12.733023 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1402 13:25:12.733142
1403 13:25:12.736041 Begin, DQ Scan Range 700~764
1404 13:25:12.736165
1405 13:25:12.736237
1406 13:25:12.739408 TX Vref Scan disable
1407 13:25:12.742657 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1408 13:25:12.745750 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1409 13:25:12.749027 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1410 13:25:12.752378 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1411 13:25:12.755918 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1412 13:25:12.759170 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1413 13:25:12.762556 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1414 13:25:12.765984 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1415 13:25:12.769274 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1416 13:25:12.772427 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1417 13:25:12.775444 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1418 13:25:12.778941 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1419 13:25:12.785686 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1420 13:25:12.788761 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1421 13:25:12.792276 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1422 13:25:12.795492 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1423 13:25:12.798955 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1424 13:25:12.802492 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1425 13:25:12.805671 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1426 13:25:12.808487 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1427 13:25:12.815998 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1428 13:25:12.819504 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1429 13:25:12.822348 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1430 13:25:12.825730 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1431 13:25:12.829168 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1432 13:25:12.832323 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1433 13:25:12.835939 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1434 13:25:12.839262 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1435 13:25:12.842466 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1436 13:25:12.845616 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1437 13:25:12.848613 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1438 13:25:12.852486 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
1439 13:25:12.855408 Byte0, DQ PI dly=732, DQM PI dly= 732
1440 13:25:12.861956 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1441 13:25:12.862550
1442 13:25:12.865058 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1443 13:25:12.865573
1444 13:25:12.868482 Byte1, DQ PI dly=722, DQM PI dly= 722
1445 13:25:12.875406 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
1446 13:25:12.875922
1447 13:25:12.878261 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
1448 13:25:12.878754
1449 13:25:12.885152 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1450 13:25:12.891714 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1451 13:25:12.897963 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1452 13:25:12.901582 Write Rank0 MR3 =0x30
1453 13:25:12.902148 DramC Write-DBI off
1454 13:25:12.902616
1455 13:25:12.904724 [DATLAT]
1456 13:25:12.907883 Freq=1600, CH0 RK0, use_rxtx_scan=0
1457 13:25:12.908268
1458 13:25:12.908563 DATLAT Default: 0xf
1459 13:25:12.911679 7, 0xFFFF, sum=0
1460 13:25:12.912082 8, 0xFFFF, sum=0
1461 13:25:12.914761 9, 0xFFFF, sum=0
1462 13:25:12.915165 10, 0xFFFF, sum=0
1463 13:25:12.917860 11, 0xFFFF, sum=0
1464 13:25:12.918310 12, 0xFFFF, sum=0
1465 13:25:12.921010 13, 0xFFFF, sum=0
1466 13:25:12.921414 14, 0x0, sum=1
1467 13:25:12.921816 15, 0x0, sum=2
1468 13:25:12.924447 16, 0x0, sum=3
1469 13:25:12.924849 17, 0x0, sum=4
1470 13:25:12.931440 pattern=2 first_step=14 total pass=5 best_step=16
1471 13:25:12.931840 ==
1472 13:25:12.934632 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1473 13:25:12.937445 fsp= 1, odt_onoff= 1, Byte mode= 0
1474 13:25:12.937839 ==
1475 13:25:12.944317 Start DQ dly to find pass range UseTestEngine =1
1476 13:25:12.947485 x-axis: bit #, y-axis: DQ dly (-127~63)
1477 13:25:12.947899 RX Vref Scan = 1
1478 13:25:13.055333
1479 13:25:13.055753 RX Vref found, early break!
1480 13:25:13.056149
1481 13:25:13.061790 Final RX Vref 11, apply to both rank0 and 1
1482 13:25:13.062270 ==
1483 13:25:13.064818 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1484 13:25:13.067938 fsp= 1, odt_onoff= 1, Byte mode= 0
1485 13:25:13.068342 ==
1486 13:25:13.071568 DQS Delay:
1487 13:25:13.071964 DQS0 = 0, DQS1 = 0
1488 13:25:13.072355 DQM Delay:
1489 13:25:13.074592 DQM0 = 19, DQM1 = 18
1490 13:25:13.074989 DQ Delay:
1491 13:25:13.077740 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15
1492 13:25:13.081573 DQ4 =21, DQ5 =16, DQ6 =19, DQ7 =21
1493 13:25:13.084815 DQ8 =15, DQ9 =17, DQ10 =24, DQ11 =16
1494 13:25:13.087961 DQ12 =18, DQ13 =18, DQ14 =20, DQ15 =22
1495 13:25:13.088351
1496 13:25:13.088742
1497 13:25:13.089110
1498 13:25:13.091250 [DramC_TX_OE_Calibration] TA2
1499 13:25:13.094787 Original DQ_B0 (3 6) =30, OEN = 27
1500 13:25:13.097906 Original DQ_B1 (3 6) =30, OEN = 27
1501 13:25:13.100780 23, 0x0, End_B0=23 End_B1=23
1502 13:25:13.104222 24, 0x0, End_B0=24 End_B1=24
1503 13:25:13.104613 25, 0x0, End_B0=25 End_B1=25
1504 13:25:13.107713 26, 0x0, End_B0=26 End_B1=26
1505 13:25:13.111229 27, 0x0, End_B0=27 End_B1=27
1506 13:25:13.114509 28, 0x0, End_B0=28 End_B1=28
1507 13:25:13.114900 29, 0x0, End_B0=29 End_B1=29
1508 13:25:13.117360 30, 0x0, End_B0=30 End_B1=30
1509 13:25:13.120602 31, 0xFFFF, End_B0=30 End_B1=30
1510 13:25:13.127513 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1511 13:25:13.130873 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1512 13:25:13.131258
1513 13:25:13.134323
1514 13:25:13.134715 Write Rank0 MR23 =0x3f
1515 13:25:13.135011 [DQSOSC]
1516 13:25:13.144318 [DQSOSCAuto] RK0, (LSB)MR18= 0xacac, (MSB)MR19= 0x202, tDQSOscB0 = 460 ps tDQSOscB1 = 460 ps
1517 13:25:13.150634 CH0_RK0: MR19=0x202, MR18=0xACAC, DQSOSC=460, MR23=63, INC=11, DEC=17
1518 13:25:13.151014 Write Rank0 MR23 =0x3f
1519 13:25:13.153865 [DQSOSC]
1520 13:25:13.160540 [DQSOSCAuto] RK0, (LSB)MR18= 0xacac, (MSB)MR19= 0x202, tDQSOscB0 = 460 ps tDQSOscB1 = 460 ps
1521 13:25:13.163992 CH0 RK0: MR19=202, MR18=ACAC
1522 13:25:13.167443 [RankSwap] Rank num 2, (Multi 1), Rank 1
1523 13:25:13.170284 Write Rank0 MR2 =0xad
1524 13:25:13.170663 [Write Leveling]
1525 13:25:13.173520 delay byte0 byte1 byte2 byte3
1526 13:25:13.173902
1527 13:25:13.174256 10 0 0
1528 13:25:13.176787 11 0 0
1529 13:25:13.177176 12 0 0
1530 13:25:13.180189 13 0 0
1531 13:25:13.180579 14 0 0
1532 13:25:13.183228 15 0 0
1533 13:25:13.183617 16 0 0
1534 13:25:13.183921 17 0 0
1535 13:25:13.186909 18 0 0
1536 13:25:13.187303 19 0 0
1537 13:25:13.189834 20 0 0
1538 13:25:13.190287 21 0 0
1539 13:25:13.190597 22 0 0
1540 13:25:13.193618 23 0 ff
1541 13:25:13.194046 24 0 ff
1542 13:25:13.196767 25 0 ff
1543 13:25:13.197165 26 0 ff
1544 13:25:13.200150 27 0 ff
1545 13:25:13.200548 28 0 ff
1546 13:25:13.203210 29 0 ff
1547 13:25:13.203600 30 0 ff
1548 13:25:13.206657 31 ff ff
1549 13:25:13.207079 32 ff ff
1550 13:25:13.207392 33 ff ff
1551 13:25:13.210115 34 ff ff
1552 13:25:13.210507 35 ff ff
1553 13:25:13.212760 36 ff ff
1554 13:25:13.213041 37 ff ff
1555 13:25:13.219491 pass bytecount = 0xff (0xff: all bytes pass)
1556 13:25:13.219741
1557 13:25:13.219904 DQS0 dly: 31
1558 13:25:13.220051 DQS1 dly: 23
1559 13:25:13.222814 Write Rank0 MR2 =0x2d
1560 13:25:13.226218 [RankSwap] Rank num 2, (Multi 1), Rank 0
1561 13:25:13.228982 Write Rank1 MR1 =0xd6
1562 13:25:13.229168 [Gating]
1563 13:25:13.229279 ==
1564 13:25:13.235603 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1565 13:25:13.235781 fsp= 1, odt_onoff= 1, Byte mode= 0
1566 13:25:13.239365 ==
1567 13:25:13.242747 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1568 13:25:13.245955 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1569 13:25:13.248755 3 1 8 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1570 13:25:13.255690 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1571 13:25:13.259104 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1572 13:25:13.261895 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1573 13:25:13.268629 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1574 13:25:13.272243 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1575 13:25:13.275005 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1576 13:25:13.282398 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1577 13:25:13.285090 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
1578 13:25:13.288813 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
1579 13:25:13.295713 3 2 16 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1580 13:25:13.298867 3 2 20 |1c1c 2c2c |(11 11)(11 11) |(1 1)(0 0)| 0
1581 13:25:13.301820 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1582 13:25:13.308092 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1583 13:25:13.312013 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1584 13:25:13.315223 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1585 13:25:13.321984 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1586 13:25:13.325434 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1587 13:25:13.328354 3 3 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1588 13:25:13.335355 3 3 20 |202 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1589 13:25:13.338788 [Byte 1] Lead/lag falling Transition (3, 3, 20)
1590 13:25:13.341495 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1591 13:25:13.345393 [Byte 0] Lead/lag Transition tap number (1)
1592 13:25:13.351370 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1593 13:25:13.355032 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1594 13:25:13.358576 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1595 13:25:13.364730 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1596 13:25:13.368104 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1597 13:25:13.371568 3 4 16 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1598 13:25:13.377856 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1599 13:25:13.381256 3 4 24 |3d3d 706 |(11 11)(11 11) |(1 1)(1 1)| 0
1600 13:25:13.384543 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1601 13:25:13.390847 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1602 13:25:13.394868 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1603 13:25:13.398211 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1604 13:25:13.404383 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1605 13:25:13.407401 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1606 13:25:13.410576 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1607 13:25:13.417715 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1608 13:25:13.421063 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1609 13:25:13.424325 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1610 13:25:13.427179 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1611 13:25:13.434419 [Byte 0] Lead/lag falling Transition (3, 6, 4)
1612 13:25:13.437518 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1613 13:25:13.440769 [Byte 1] Lead/lag falling Transition (3, 6, 8)
1614 13:25:13.446883 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1615 13:25:13.450406 [Byte 0] Lead/lag Transition tap number (3)
1616 13:25:13.453717 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1617 13:25:13.456934 [Byte 1] Lead/lag Transition tap number (3)
1618 13:25:13.463878 3 6 20 |808 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1619 13:25:13.467257 3 6 24 |4646 c0c |(0 0)(11 11) |(0 0)(0 0)| 0
1620 13:25:13.469986 [Byte 0]First pass (3, 6, 24)
1621 13:25:13.473437 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1622 13:25:13.476868 [Byte 1]First pass (3, 6, 28)
1623 13:25:13.480351 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1624 13:25:13.483671 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1625 13:25:13.486453 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1626 13:25:13.493169 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1627 13:25:13.496731 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1628 13:25:13.500361 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1629 13:25:13.502931 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1630 13:25:13.506387 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1631 13:25:13.512648 All bytes gating window > 1UI, Early break!
1632 13:25:13.513033
1633 13:25:13.515993 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
1634 13:25:13.516402
1635 13:25:13.519929 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 14)
1636 13:25:13.520347
1637 13:25:13.520645
1638 13:25:13.520917
1639 13:25:13.523013 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
1640 13:25:13.523397
1641 13:25:13.526518 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
1642 13:25:13.529535
1643 13:25:13.529914
1644 13:25:13.530291 Write Rank1 MR1 =0x56
1645 13:25:13.530692
1646 13:25:13.532729 best RODT dly(2T, 0.5T) = (2, 3)
1647 13:25:13.533109
1648 13:25:13.536401 best RODT dly(2T, 0.5T) = (2, 3)
1649 13:25:13.536786 ==
1650 13:25:13.542674 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1651 13:25:13.545827 fsp= 1, odt_onoff= 1, Byte mode= 0
1652 13:25:13.546261 ==
1653 13:25:13.549228 Start DQ dly to find pass range UseTestEngine =0
1654 13:25:13.552939 x-axis: bit #, y-axis: DQ dly (-127~63)
1655 13:25:13.555946 RX Vref Scan = 0
1656 13:25:13.556324 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1657 13:25:13.558787 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1658 13:25:13.562381 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1659 13:25:13.565412 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1660 13:25:13.568922 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1661 13:25:13.572540 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1662 13:25:13.575592 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1663 13:25:13.578831 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1664 13:25:13.582356 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1665 13:25:13.582755 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1666 13:25:13.585816 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1667 13:25:13.589011 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1668 13:25:13.592456 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1669 13:25:13.595334 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1670 13:25:13.598667 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1671 13:25:13.602364 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1672 13:25:13.605602 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1673 13:25:13.605993 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1674 13:25:13.608971 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1675 13:25:13.611719 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1676 13:25:13.615269 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1677 13:25:13.618448 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1678 13:25:13.622336 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1679 13:25:13.625113 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1680 13:25:13.628303 -2, [0] xxxoxxxx xxxxxxxx [MSB]
1681 13:25:13.628736 -1, [0] xxxoxxxx xxxxxxxx [MSB]
1682 13:25:13.631972 0, [0] xxxoxoox oxxoxxxx [MSB]
1683 13:25:13.635408 1, [0] xxxoxoox oxxoxxxx [MSB]
1684 13:25:13.638306 2, [0] xxxoxooo oxxoxxxx [MSB]
1685 13:25:13.641839 3, [0] xxxooooo ooxooxxx [MSB]
1686 13:25:13.644831 4, [0] xoxooooo ooxoooxx [MSB]
1687 13:25:13.645563 5, [0] ooxooooo ooxoooox [MSB]
1688 13:25:13.648150 6, [0] oooooooo ooxooooo [MSB]
1689 13:25:13.651463 7, [0] oooooooo ooxooooo [MSB]
1690 13:25:13.654773 8, [0] oooooooo ooxooooo [MSB]
1691 13:25:13.657982 9, [0] oooooooo ooxooooo [MSB]
1692 13:25:13.661526 32, [0] oooxoooo oooooooo [MSB]
1693 13:25:13.661914 33, [0] oooxoxoo oooooooo [MSB]
1694 13:25:13.664737 34, [0] oooxoxoo xooooooo [MSB]
1695 13:25:13.668005 35, [0] oooxoxoo xooxoooo [MSB]
1696 13:25:13.671469 36, [0] oooxoxoo xxoxxooo [MSB]
1697 13:25:13.674479 37, [0] oooxoxxx xxoxxoxo [MSB]
1698 13:25:13.677944 38, [0] oooxoxxx xxoxxxxo [MSB]
1699 13:25:13.681280 39, [0] xxoxoxxx xxoxxxxo [MSB]
1700 13:25:13.684824 40, [0] xxxxoxxx xxoxxxxo [MSB]
1701 13:25:13.685216 41, [0] xxxxxxxx xxoxxxxx [MSB]
1702 13:25:13.688358 42, [0] xxxxxxxx xxoxxxxx [MSB]
1703 13:25:13.691533 43, [0] xxxxxxxx xxxxxxxx [MSB]
1704 13:25:13.694690 iDelay=43, Bit 0, Center 21 (5 ~ 38) 34
1705 13:25:13.697765 iDelay=43, Bit 1, Center 21 (4 ~ 38) 35
1706 13:25:13.701208 iDelay=43, Bit 2, Center 22 (6 ~ 39) 34
1707 13:25:13.704381 iDelay=43, Bit 3, Center 14 (-2 ~ 31) 34
1708 13:25:13.707722 iDelay=43, Bit 4, Center 21 (3 ~ 40) 38
1709 13:25:13.714664 iDelay=43, Bit 5, Center 16 (0 ~ 32) 33
1710 13:25:13.717471 iDelay=43, Bit 6, Center 18 (0 ~ 36) 37
1711 13:25:13.720911 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
1712 13:25:13.724139 iDelay=43, Bit 8, Center 16 (0 ~ 33) 34
1713 13:25:13.727346 iDelay=43, Bit 9, Center 19 (3 ~ 35) 33
1714 13:25:13.730772 iDelay=43, Bit 10, Center 26 (10 ~ 42) 33
1715 13:25:13.734082 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
1716 13:25:13.737068 iDelay=43, Bit 12, Center 19 (3 ~ 35) 33
1717 13:25:13.740559 iDelay=43, Bit 13, Center 20 (4 ~ 37) 34
1718 13:25:13.743913 iDelay=43, Bit 14, Center 20 (5 ~ 36) 32
1719 13:25:13.750389 iDelay=43, Bit 15, Center 23 (6 ~ 40) 35
1720 13:25:13.750790 ==
1721 13:25:13.753582 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1722 13:25:13.756555 fsp= 1, odt_onoff= 1, Byte mode= 0
1723 13:25:13.756947 ==
1724 13:25:13.759844 DQS Delay:
1725 13:25:13.760234 DQS0 = 0, DQS1 = 0
1726 13:25:13.760535 DQM Delay:
1727 13:25:13.763161 DQM0 = 19, DQM1 = 20
1728 13:25:13.763547 DQ Delay:
1729 13:25:13.766597 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14
1730 13:25:13.770096 DQ4 =21, DQ5 =16, DQ6 =18, DQ7 =19
1731 13:25:13.773584 DQ8 =16, DQ9 =19, DQ10 =26, DQ11 =17
1732 13:25:13.776432 DQ12 =19, DQ13 =20, DQ14 =20, DQ15 =23
1733 13:25:13.776820
1734 13:25:13.777123
1735 13:25:13.779790 DramC Write-DBI off
1736 13:25:13.780180 ==
1737 13:25:13.783280 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1738 13:25:13.786564 fsp= 1, odt_onoff= 1, Byte mode= 0
1739 13:25:13.786954 ==
1740 13:25:13.793296 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1741 13:25:13.793732
1742 13:25:13.796483 Begin, DQ Scan Range 919~1175
1743 13:25:13.796949
1744 13:25:13.797261
1745 13:25:13.797541 TX Vref Scan disable
1746 13:25:13.799387 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1747 13:25:13.803122 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1748 13:25:13.809805 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1749 13:25:13.813084 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1750 13:25:13.816273 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1751 13:25:13.820013 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1752 13:25:13.822633 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1753 13:25:13.826043 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1754 13:25:13.828911 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1755 13:25:13.832567 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1756 13:25:13.835587 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1757 13:25:13.839301 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1758 13:25:13.842211 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1759 13:25:13.845521 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1760 13:25:13.848994 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1761 13:25:13.852367 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1762 13:25:13.859175 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1763 13:25:13.862345 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1764 13:25:13.865374 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1765 13:25:13.868434 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1766 13:25:13.871779 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1767 13:25:13.875271 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1768 13:25:13.878732 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1769 13:25:13.882189 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1770 13:25:13.884870 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1771 13:25:13.888156 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1772 13:25:13.891390 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1773 13:25:13.894902 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1774 13:25:13.898259 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1775 13:25:13.904705 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1776 13:25:13.907816 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1777 13:25:13.911210 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1778 13:25:13.914384 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1779 13:25:13.917766 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1780 13:25:13.921192 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1781 13:25:13.924333 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1782 13:25:13.927437 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1783 13:25:13.931033 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1784 13:25:13.934024 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1785 13:25:13.937641 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1786 13:25:13.940744 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1787 13:25:13.944590 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1788 13:25:13.947296 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1789 13:25:13.950850 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1790 13:25:13.957088 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1791 13:25:13.960283 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1792 13:25:13.963778 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1793 13:25:13.967136 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1794 13:25:13.970514 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1795 13:25:13.973825 968 |3 6 8|[0] xxxxxxxx oxxxxxxx [MSB]
1796 13:25:13.976948 969 |3 6 9|[0] xxxxxxxx oxxoxxxx [MSB]
1797 13:25:13.980160 970 |3 6 10|[0] xxxxxxxx oxxoxoxx [MSB]
1798 13:25:13.983598 971 |3 6 11|[0] xxxxxxxx ooxoooxx [MSB]
1799 13:25:13.987060 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1800 13:25:13.990408 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1801 13:25:13.993966 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1802 13:25:13.997520 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1803 13:25:14.000136 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1804 13:25:14.003370 977 |3 6 17|[0] xxxoxoox oooooooo [MSB]
1805 13:25:14.006895 978 |3 6 18|[0] xxxoxooo oooooooo [MSB]
1806 13:25:14.009681 979 |3 6 19|[0] xoxooooo oooooooo [MSB]
1807 13:25:14.018190 989 |3 6 29|[0] oooooooo xooxoooo [MSB]
1808 13:25:14.021081 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1809 13:25:14.024383 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1810 13:25:14.027729 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1811 13:25:14.031226 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1812 13:25:14.034471 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1813 13:25:14.037894 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1814 13:25:14.041262 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1815 13:25:14.044392 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
1816 13:25:14.047578 998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]
1817 13:25:14.051002 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1818 13:25:14.054416 Byte0, DQ PI dly=987, DQM PI dly= 987
1819 13:25:14.061178 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
1820 13:25:14.061253
1821 13:25:14.063984 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
1822 13:25:14.064059
1823 13:25:14.067286 Byte1, DQ PI dly=979, DQM PI dly= 979
1824 13:25:14.070677 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1825 13:25:14.070752
1826 13:25:14.077361 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1827 13:25:14.077437
1828 13:25:14.077494 ==
1829 13:25:14.081009 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1830 13:25:14.083890 fsp= 1, odt_onoff= 1, Byte mode= 0
1831 13:25:14.083965 ==
1832 13:25:14.090335 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1833 13:25:14.090410
1834 13:25:14.093565 Begin, DQ Scan Range 955~1019
1835 13:25:14.093639 Write Rank1 MR14 =0x0
1836 13:25:14.102452
1837 13:25:14.102527 CH=0, VrefRange= 0, VrefLevel = 0
1838 13:25:14.108651 TX Bit0 (983~994) 12 988, Bit8 (971~982) 12 976,
1839 13:25:14.112079 TX Bit1 (981~993) 13 987, Bit9 (973~983) 11 978,
1840 13:25:14.118714 TX Bit2 (983~994) 12 988, Bit10 (976~990) 15 983,
1841 13:25:14.122022 TX Bit3 (976~990) 15 983, Bit11 (972~982) 11 977,
1842 13:25:14.125143 TX Bit4 (981~993) 13 987, Bit12 (974~984) 11 979,
1843 13:25:14.131737 TX Bit5 (978~991) 14 984, Bit13 (973~985) 13 979,
1844 13:25:14.135165 TX Bit6 (979~991) 13 985, Bit14 (974~987) 14 980,
1845 13:25:14.142041 TX Bit7 (981~994) 14 987, Bit15 (976~988) 13 982,
1846 13:25:14.142134
1847 13:25:14.142193 Write Rank1 MR14 =0x2
1848 13:25:14.150673
1849 13:25:14.150749 CH=0, VrefRange= 0, VrefLevel = 2
1850 13:25:14.156985 TX Bit0 (983~996) 14 989, Bit8 (970~983) 14 976,
1851 13:25:14.160323 TX Bit1 (981~994) 14 987, Bit9 (973~984) 12 978,
1852 13:25:14.167267 TX Bit2 (983~995) 13 989, Bit10 (976~991) 16 983,
1853 13:25:14.170112 TX Bit3 (976~990) 15 983, Bit11 (972~983) 12 977,
1854 13:25:14.173391 TX Bit4 (981~994) 14 987, Bit12 (973~985) 13 979,
1855 13:25:14.180267 TX Bit5 (978~992) 15 985, Bit13 (973~986) 14 979,
1856 13:25:14.183667 TX Bit6 (978~992) 15 985, Bit14 (973~988) 16 980,
1857 13:25:14.190003 TX Bit7 (980~995) 16 987, Bit15 (976~989) 14 982,
1858 13:25:14.190085
1859 13:25:14.190143 Write Rank1 MR14 =0x4
1860 13:25:14.199406
1861 13:25:14.199482 CH=0, VrefRange= 0, VrefLevel = 4
1862 13:25:14.205992 TX Bit0 (983~996) 14 989, Bit8 (970~983) 14 976,
1863 13:25:14.209619 TX Bit1 (981~995) 15 988, Bit9 (973~984) 12 978,
1864 13:25:14.215834 TX Bit2 (983~997) 15 990, Bit10 (975~991) 17 983,
1865 13:25:14.219150 TX Bit3 (976~991) 16 983, Bit11 (972~983) 12 977,
1866 13:25:14.222372 TX Bit4 (981~995) 15 988, Bit12 (973~986) 14 979,
1867 13:25:14.228930 TX Bit5 (978~992) 15 985, Bit13 (973~987) 15 980,
1868 13:25:14.232556 TX Bit6 (978~993) 16 985, Bit14 (973~989) 17 981,
1869 13:25:14.238892 TX Bit7 (979~995) 17 987, Bit15 (975~989) 15 982,
1870 13:25:14.238968
1871 13:25:14.239027 Write Rank1 MR14 =0x6
1872 13:25:14.247878
1873 13:25:14.247954 CH=0, VrefRange= 0, VrefLevel = 6
1874 13:25:14.254408 TX Bit0 (982~997) 16 989, Bit8 (969~984) 16 976,
1875 13:25:14.257946 TX Bit1 (980~996) 17 988, Bit9 (973~985) 13 979,
1876 13:25:14.264253 TX Bit2 (982~997) 16 989, Bit10 (975~992) 18 983,
1877 13:25:14.267488 TX Bit3 (975~991) 17 983, Bit11 (971~984) 14 977,
1878 13:25:14.270872 TX Bit4 (980~996) 17 988, Bit12 (972~987) 16 979,
1879 13:25:14.277684 TX Bit5 (978~993) 16 985, Bit13 (972~988) 17 980,
1880 13:25:14.281080 TX Bit6 (978~993) 16 985, Bit14 (973~989) 17 981,
1881 13:25:14.287338 TX Bit7 (979~997) 19 988, Bit15 (976~990) 15 983,
1882 13:25:14.287415
1883 13:25:14.287474 Write Rank1 MR14 =0x8
1884 13:25:14.297102
1885 13:25:14.297177 CH=0, VrefRange= 0, VrefLevel = 8
1886 13:25:14.303086 TX Bit0 (982~998) 17 990, Bit8 (968~985) 18 976,
1887 13:25:14.306477 TX Bit1 (980~997) 18 988, Bit9 (973~986) 14 979,
1888 13:25:14.313088 TX Bit2 (982~998) 17 990, Bit10 (975~992) 18 983,
1889 13:25:14.316483 TX Bit3 (976~991) 16 983, Bit11 (971~984) 14 977,
1890 13:25:14.319945 TX Bit4 (979~997) 19 988, Bit12 (972~988) 17 980,
1891 13:25:14.326682 TX Bit5 (977~993) 17 985, Bit13 (972~988) 17 980,
1892 13:25:14.329962 TX Bit6 (977~994) 18 985, Bit14 (973~990) 18 981,
1893 13:25:14.333355 TX Bit7 (978~998) 21 988, Bit15 (975~990) 16 982,
1894 13:25:14.336610
1895 13:25:14.336717 Write Rank1 MR14 =0xa
1896 13:25:14.345873
1897 13:25:14.349122 CH=0, VrefRange= 0, VrefLevel = 10
1898 13:25:14.352353 TX Bit0 (982~998) 17 990, Bit8 (969~986) 18 977,
1899 13:25:14.355313 TX Bit1 (980~998) 19 989, Bit9 (972~988) 17 980,
1900 13:25:14.361973 TX Bit2 (982~999) 18 990, Bit10 (975~993) 19 984,
1901 13:25:14.365377 TX Bit3 (975~991) 17 983, Bit11 (970~985) 16 977,
1902 13:25:14.368711 TX Bit4 (979~998) 20 988, Bit12 (972~988) 17 980,
1903 13:25:14.375731 TX Bit5 (977~994) 18 985, Bit13 (972~989) 18 980,
1904 13:25:14.378679 TX Bit6 (977~995) 19 986, Bit14 (972~990) 19 981,
1905 13:25:14.385227 TX Bit7 (978~998) 21 988, Bit15 (975~990) 16 982,
1906 13:25:14.385304
1907 13:25:14.385371 Write Rank1 MR14 =0xc
1908 13:25:14.394414
1909 13:25:14.397856 CH=0, VrefRange= 0, VrefLevel = 12
1910 13:25:14.401235 TX Bit0 (981~999) 19 990, Bit8 (968~986) 19 977,
1911 13:25:14.404541 TX Bit1 (979~998) 20 988, Bit9 (972~988) 17 980,
1912 13:25:14.411426 TX Bit2 (982~999) 18 990, Bit10 (975~994) 20 984,
1913 13:25:14.414672 TX Bit3 (975~992) 18 983, Bit11 (970~986) 17 978,
1914 13:25:14.417406 TX Bit4 (979~998) 20 988, Bit12 (972~989) 18 980,
1915 13:25:14.424368 TX Bit5 (977~995) 19 986, Bit13 (971~989) 19 980,
1916 13:25:14.427746 TX Bit6 (977~996) 20 986, Bit14 (972~990) 19 981,
1917 13:25:14.433859 TX Bit7 (978~999) 22 988, Bit15 (975~991) 17 983,
1918 13:25:14.433935
1919 13:25:14.433993 Write Rank1 MR14 =0xe
1920 13:25:14.443833
1921 13:25:14.447250 CH=0, VrefRange= 0, VrefLevel = 14
1922 13:25:14.450667 TX Bit0 (982~999) 18 990, Bit8 (968~987) 20 977,
1923 13:25:14.454051 TX Bit1 (979~999) 21 989, Bit9 (972~988) 17 980,
1924 13:25:14.460256 TX Bit2 (981~999) 19 990, Bit10 (975~994) 20 984,
1925 13:25:14.463704 TX Bit3 (975~992) 18 983, Bit11 (969~987) 19 978,
1926 13:25:14.466490 TX Bit4 (978~999) 22 988, Bit12 (972~989) 18 980,
1927 13:25:14.473318 TX Bit5 (976~996) 21 986, Bit13 (971~990) 20 980,
1928 13:25:14.476587 TX Bit6 (977~997) 21 987, Bit14 (971~991) 21 981,
1929 13:25:14.483349 TX Bit7 (978~999) 22 988, Bit15 (975~992) 18 983,
1930 13:25:14.483425
1931 13:25:14.483482 Write Rank1 MR14 =0x10
1932 13:25:14.493216
1933 13:25:14.496320 CH=0, VrefRange= 0, VrefLevel = 16
1934 13:25:14.500032 TX Bit0 (981~999) 19 990, Bit8 (967~988) 22 977,
1935 13:25:14.503072 TX Bit1 (979~999) 21 989, Bit9 (971~989) 19 980,
1936 13:25:14.509371 TX Bit2 (980~1000) 21 990, Bit10 (975~995) 21 985,
1937 13:25:14.512836 TX Bit3 (975~993) 19 984, Bit11 (969~988) 20 978,
1938 13:25:14.515725 TX Bit4 (979~999) 21 989, Bit12 (971~990) 20 980,
1939 13:25:14.523070 TX Bit5 (976~997) 22 986, Bit13 (970~990) 21 980,
1940 13:25:14.525674 TX Bit6 (976~998) 23 987, Bit14 (971~991) 21 981,
1941 13:25:14.532780 TX Bit7 (978~999) 22 988, Bit15 (975~993) 19 984,
1942 13:25:14.532856
1943 13:25:14.532914 Write Rank1 MR14 =0x12
1944 13:25:14.542443
1945 13:25:14.545713 CH=0, VrefRange= 0, VrefLevel = 18
1946 13:25:14.549213 TX Bit0 (980~1000) 21 990, Bit8 (967~989) 23 978,
1947 13:25:14.552023 TX Bit1 (978~1000) 23 989, Bit9 (971~989) 19 980,
1948 13:25:14.558917 TX Bit2 (980~1000) 21 990, Bit10 (974~995) 22 984,
1949 13:25:14.562353 TX Bit3 (975~994) 20 984, Bit11 (968~988) 21 978,
1950 13:25:14.565191 TX Bit4 (978~999) 22 988, Bit12 (970~990) 21 980,
1951 13:25:14.572046 TX Bit5 (976~997) 22 986, Bit13 (970~991) 22 980,
1952 13:25:14.575403 TX Bit6 (976~998) 23 987, Bit14 (970~992) 23 981,
1953 13:25:14.582212 TX Bit7 (978~1000) 23 989, Bit15 (975~993) 19 984,
1954 13:25:14.582325
1955 13:25:14.582414 Write Rank1 MR14 =0x14
1956 13:25:14.592180
1957 13:25:14.595485 CH=0, VrefRange= 0, VrefLevel = 20
1958 13:25:14.598965 TX Bit0 (979~1000) 22 989, Bit8 (967~989) 23 978,
1959 13:25:14.602396 TX Bit1 (978~1000) 23 989, Bit9 (970~990) 21 980,
1960 13:25:14.608632 TX Bit2 (980~1001) 22 990, Bit10 (974~996) 23 985,
1961 13:25:14.612138 TX Bit3 (974~994) 21 984, Bit11 (968~989) 22 978,
1962 13:25:14.615520 TX Bit4 (977~999) 23 988, Bit12 (969~991) 23 980,
1963 13:25:14.622428 TX Bit5 (976~997) 22 986, Bit13 (970~990) 21 980,
1964 13:25:14.625561 TX Bit6 (976~998) 23 987, Bit14 (971~992) 22 981,
1965 13:25:14.631822 TX Bit7 (978~1000) 23 989, Bit15 (974~994) 21 984,
1966 13:25:14.632211
1967 13:25:14.632509 Write Rank1 MR14 =0x16
1968 13:25:14.642200
1969 13:25:14.645519 CH=0, VrefRange= 0, VrefLevel = 22
1970 13:25:14.648903 TX Bit0 (979~1001) 23 990, Bit8 (967~989) 23 978,
1971 13:25:14.652430 TX Bit1 (978~1000) 23 989, Bit9 (969~990) 22 979,
1972 13:25:14.658890 TX Bit2 (979~1001) 23 990, Bit10 (974~996) 23 985,
1973 13:25:14.662746 TX Bit3 (974~995) 22 984, Bit11 (967~989) 23 978,
1974 13:25:14.665648 TX Bit4 (977~1000) 24 988, Bit12 (969~991) 23 980,
1975 13:25:14.672095 TX Bit5 (976~998) 23 987, Bit13 (969~991) 23 980,
1976 13:25:14.675647 TX Bit6 (976~999) 24 987, Bit14 (970~993) 24 981,
1977 13:25:14.681506 TX Bit7 (977~1000) 24 988, Bit15 (973~995) 23 984,
1978 13:25:14.682044
1979 13:25:14.682519 Write Rank1 MR14 =0x18
1980 13:25:14.692290
1981 13:25:14.695749 CH=0, VrefRange= 0, VrefLevel = 24
1982 13:25:14.698495 TX Bit0 (978~1001) 24 989, Bit8 (967~989) 23 978,
1983 13:25:14.701801 TX Bit1 (977~1001) 25 989, Bit9 (969~990) 22 979,
1984 13:25:14.708756 TX Bit2 (978~1001) 24 989, Bit10 (974~996) 23 985,
1985 13:25:14.712169 TX Bit3 (973~996) 24 984, Bit11 (967~990) 24 978,
1986 13:25:14.715564 TX Bit4 (977~1000) 24 988, Bit12 (969~991) 23 980,
1987 13:25:14.721801 TX Bit5 (976~998) 23 987, Bit13 (969~991) 23 980,
1988 13:25:14.725160 TX Bit6 (976~999) 24 987, Bit14 (970~992) 23 981,
1989 13:25:14.731953 TX Bit7 (977~1001) 25 989, Bit15 (973~995) 23 984,
1990 13:25:14.732338
1991 13:25:14.732637 Write Rank1 MR14 =0x1a
1992 13:25:14.742084
1993 13:25:14.745730 CH=0, VrefRange= 0, VrefLevel = 26
1994 13:25:14.748957 TX Bit0 (978~1002) 25 990, Bit8 (966~989) 24 977,
1995 13:25:14.752395 TX Bit1 (977~1001) 25 989, Bit9 (969~990) 22 979,
1996 13:25:14.758638 TX Bit2 (978~1001) 24 989, Bit10 (973~997) 25 985,
1997 13:25:14.761482 TX Bit3 (973~996) 24 984, Bit11 (967~990) 24 978,
1998 13:25:14.768385 TX Bit4 (977~1001) 25 989, Bit12 (968~992) 25 980,
1999 13:25:14.771780 TX Bit5 (975~999) 25 987, Bit13 (968~991) 24 979,
2000 13:25:14.775183 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2001 13:25:14.781270 TX Bit7 (977~1001) 25 989, Bit15 (974~996) 23 985,
2002 13:25:14.781661
2003 13:25:14.781960 Write Rank1 MR14 =0x1c
2004 13:25:14.792198
2005 13:25:14.795478 CH=0, VrefRange= 0, VrefLevel = 28
2006 13:25:14.799064 TX Bit0 (978~1002) 25 990, Bit8 (966~989) 24 977,
2007 13:25:14.802159 TX Bit1 (978~1001) 24 989, Bit9 (968~990) 23 979,
2008 13:25:14.808493 TX Bit2 (978~1002) 25 990, Bit10 (974~997) 24 985,
2009 13:25:14.811687 TX Bit3 (973~997) 25 985, Bit11 (967~990) 24 978,
2010 13:25:14.818663 TX Bit4 (977~1001) 25 989, Bit12 (969~991) 23 980,
2011 13:25:14.821941 TX Bit5 (975~999) 25 987, Bit13 (968~991) 24 979,
2012 13:25:14.824873 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2013 13:25:14.831769 TX Bit7 (977~1001) 25 989, Bit15 (972~996) 25 984,
2014 13:25:14.832185
2015 13:25:14.832487 Write Rank1 MR14 =0x1e
2016 13:25:14.842321
2017 13:25:14.845723 CH=0, VrefRange= 0, VrefLevel = 30
2018 13:25:14.849305 TX Bit0 (978~1002) 25 990, Bit8 (966~989) 24 977,
2019 13:25:14.852057 TX Bit1 (978~1001) 24 989, Bit9 (968~990) 23 979,
2020 13:25:14.858910 TX Bit2 (978~1002) 25 990, Bit10 (974~997) 24 985,
2021 13:25:14.862212 TX Bit3 (973~997) 25 985, Bit11 (967~990) 24 978,
2022 13:25:14.868876 TX Bit4 (977~1001) 25 989, Bit12 (969~991) 23 980,
2023 13:25:14.871701 TX Bit5 (975~999) 25 987, Bit13 (968~991) 24 979,
2024 13:25:14.875009 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2025 13:25:14.882277 TX Bit7 (977~1001) 25 989, Bit15 (972~996) 25 984,
2026 13:25:14.882665
2027 13:25:14.882960 Write Rank1 MR14 =0x20
2028 13:25:14.893031
2029 13:25:14.895639 CH=0, VrefRange= 0, VrefLevel = 32
2030 13:25:14.899100 TX Bit0 (978~1002) 25 990, Bit8 (966~989) 24 977,
2031 13:25:14.902447 TX Bit1 (978~1001) 24 989, Bit9 (968~990) 23 979,
2032 13:25:14.909271 TX Bit2 (978~1002) 25 990, Bit10 (974~997) 24 985,
2033 13:25:14.912400 TX Bit3 (973~997) 25 985, Bit11 (967~990) 24 978,
2034 13:25:14.915417 TX Bit4 (977~1001) 25 989, Bit12 (969~991) 23 980,
2035 13:25:14.922553 TX Bit5 (975~999) 25 987, Bit13 (968~991) 24 979,
2036 13:25:14.925692 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2037 13:25:14.932156 TX Bit7 (977~1001) 25 989, Bit15 (972~996) 25 984,
2038 13:25:14.932550
2039 13:25:14.932853 Write Rank1 MR14 =0x22
2040 13:25:14.942990
2041 13:25:14.946681 CH=0, VrefRange= 0, VrefLevel = 34
2042 13:25:14.949500 TX Bit0 (978~1002) 25 990, Bit8 (966~989) 24 977,
2043 13:25:14.952841 TX Bit1 (978~1001) 24 989, Bit9 (968~990) 23 979,
2044 13:25:14.958977 TX Bit2 (978~1002) 25 990, Bit10 (974~997) 24 985,
2045 13:25:14.962347 TX Bit3 (973~997) 25 985, Bit11 (967~990) 24 978,
2046 13:25:14.965828 TX Bit4 (977~1001) 25 989, Bit12 (969~991) 23 980,
2047 13:25:14.971821 TX Bit5 (975~999) 25 987, Bit13 (968~991) 24 979,
2048 13:25:14.975345 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2049 13:25:14.982256 TX Bit7 (977~1001) 25 989, Bit15 (972~996) 25 984,
2050 13:25:14.982449
2051 13:25:14.982611
2052 13:25:14.985021 TX Vref found, early break! 363< 370
2053 13:25:14.988470 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2054 13:25:14.991662 u1DelayCellOfst[0]=6 cells (5 PI)
2055 13:25:14.995500 u1DelayCellOfst[1]=5 cells (4 PI)
2056 13:25:14.998691 u1DelayCellOfst[2]=6 cells (5 PI)
2057 13:25:15.002101 u1DelayCellOfst[3]=0 cells (0 PI)
2058 13:25:15.004825 u1DelayCellOfst[4]=5 cells (4 PI)
2059 13:25:15.008088 u1DelayCellOfst[5]=2 cells (2 PI)
2060 13:25:15.011606 u1DelayCellOfst[6]=3 cells (3 PI)
2061 13:25:15.015071 u1DelayCellOfst[7]=5 cells (4 PI)
2062 13:25:15.018382 Byte0, DQ PI dly=985, DQM PI dly= 987
2063 13:25:15.021678 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2064 13:25:15.021753
2065 13:25:15.025253 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2066 13:25:15.025429
2067 13:25:15.028027 u1DelayCellOfst[8]=0 cells (0 PI)
2068 13:25:15.031399 u1DelayCellOfst[9]=2 cells (2 PI)
2069 13:25:15.034949 u1DelayCellOfst[10]=10 cells (8 PI)
2070 13:25:15.038353 u1DelayCellOfst[11]=1 cells (1 PI)
2071 13:25:15.041712 u1DelayCellOfst[12]=3 cells (3 PI)
2072 13:25:15.044442 u1DelayCellOfst[13]=2 cells (2 PI)
2073 13:25:15.047825 u1DelayCellOfst[14]=3 cells (3 PI)
2074 13:25:15.051787 u1DelayCellOfst[15]=9 cells (7 PI)
2075 13:25:15.054913 Byte1, DQ PI dly=977, DQM PI dly= 981
2076 13:25:15.058164 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
2077 13:25:15.058245
2078 13:25:15.061262 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
2079 13:25:15.061399
2080 13:25:15.064750 Write Rank1 MR14 =0x1c
2081 13:25:15.064886
2082 13:25:15.068397 Final TX Range 0 Vref 28
2083 13:25:15.068583
2084 13:25:15.074743 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2085 13:25:15.074871
2086 13:25:15.081569 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2087 13:25:15.087864 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2088 13:25:15.094542 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2089 13:25:15.097900 Write Rank1 MR3 =0xb0
2090 13:25:15.098019 DramC Write-DBI on
2091 13:25:15.098083 ==
2092 13:25:15.104183 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2093 13:25:15.107542 fsp= 1, odt_onoff= 1, Byte mode= 0
2094 13:25:15.107625 ==
2095 13:25:15.110836 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2096 13:25:15.110916
2097 13:25:15.114076 Begin, DQ Scan Range 701~765
2098 13:25:15.114156
2099 13:25:15.114215
2100 13:25:15.117245 TX Vref Scan disable
2101 13:25:15.120692 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2102 13:25:15.124154 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2103 13:25:15.127281 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2104 13:25:15.130529 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2105 13:25:15.133982 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2106 13:25:15.137322 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2107 13:25:15.140052 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2108 13:25:15.143430 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2109 13:25:15.146730 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2110 13:25:15.149997 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2111 13:25:15.153468 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2112 13:25:15.156941 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2113 13:25:15.159832 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2114 13:25:15.163190 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2115 13:25:15.170132 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2116 13:25:15.173431 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2117 13:25:15.176496 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2118 13:25:15.179529 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2119 13:25:15.182952 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2120 13:25:15.186552 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2121 13:25:15.193278 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2122 13:25:15.197158 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2123 13:25:15.200455 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2124 13:25:15.203355 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2125 13:25:15.206771 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2126 13:25:15.210140 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2127 13:25:15.213385 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2128 13:25:15.216638 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2129 13:25:15.219806 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2130 13:25:15.223480 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2131 13:25:15.226548 747 |2 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
2132 13:25:15.230106 Byte0, DQ PI dly=733, DQM PI dly= 733
2133 13:25:15.236709 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
2134 13:25:15.236786
2135 13:25:15.240029 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
2136 13:25:15.240128
2137 13:25:15.242833 Byte1, DQ PI dly=724, DQM PI dly= 724
2138 13:25:15.246244 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2139 13:25:15.246320
2140 13:25:15.252981 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2141 13:25:15.253057
2142 13:25:15.259711 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2143 13:25:15.265788 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2144 13:25:15.272730 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2145 13:25:15.276165 Write Rank1 MR3 =0x30
2146 13:25:15.276277 DramC Write-DBI off
2147 13:25:15.276365
2148 13:25:15.276445 [DATLAT]
2149 13:25:15.279649 Freq=1600, CH0 RK1, use_rxtx_scan=0
2150 13:25:15.279762
2151 13:25:15.282311 DATLAT Default: 0x10
2152 13:25:15.285852 7, 0xFFFF, sum=0
2153 13:25:15.285978 8, 0xFFFF, sum=0
2154 13:25:15.286097 9, 0xFFFF, sum=0
2155 13:25:15.289129 10, 0xFFFF, sum=0
2156 13:25:15.289271 11, 0xFFFF, sum=0
2157 13:25:15.292630 12, 0xFFFF, sum=0
2158 13:25:15.292791 13, 0xFFFF, sum=0
2159 13:25:15.295898 14, 0x0, sum=1
2160 13:25:15.296060 15, 0x0, sum=2
2161 13:25:15.299094 16, 0x0, sum=3
2162 13:25:15.299284 17, 0x0, sum=4
2163 13:25:15.302400 pattern=2 first_step=14 total pass=5 best_step=16
2164 13:25:15.305863 ==
2165 13:25:15.308901 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2166 13:25:15.312771 fsp= 1, odt_onoff= 1, Byte mode= 0
2167 13:25:15.313171 ==
2168 13:25:15.315835 Start DQ dly to find pass range UseTestEngine =1
2169 13:25:15.322384 x-axis: bit #, y-axis: DQ dly (-127~63)
2170 13:25:15.322777 RX Vref Scan = 0
2171 13:25:15.325990 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2172 13:25:15.328872 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2173 13:25:15.332720 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2174 13:25:15.333119 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2175 13:25:15.335689 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2176 13:25:15.339376 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2177 13:25:15.342462 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2178 13:25:15.345878 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2179 13:25:15.348950 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2180 13:25:15.352401 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2181 13:25:15.356011 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2182 13:25:15.359078 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2183 13:25:15.359590 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2184 13:25:15.362236 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2185 13:25:15.365598 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2186 13:25:15.369192 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2187 13:25:15.371934 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2188 13:25:15.375342 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2189 13:25:15.378646 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2190 13:25:15.381968 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2191 13:25:15.382407 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2192 13:25:15.385444 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2193 13:25:15.388848 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2194 13:25:15.392175 -3, [0] xxxoxxxx xxxxxxxx [MSB]
2195 13:25:15.395435 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2196 13:25:15.398265 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2197 13:25:15.401797 0, [0] xxxoxoxx oxxoxxxx [MSB]
2198 13:25:15.402546 1, [0] xxxoxoox oxxoxxxx [MSB]
2199 13:25:15.404998 2, [0] xxxoxoox ooxoxxxx [MSB]
2200 13:25:15.408285 3, [0] xoxoxoox ooxoooxx [MSB]
2201 13:25:15.411740 4, [0] ooooxooo ooxoooxx [MSB]
2202 13:25:15.415264 5, [0] oooooooo ooxoooox [MSB]
2203 13:25:15.418099 6, [0] oooooooo ooxooooo [MSB]
2204 13:25:15.418563 7, [0] oooooooo ooxooooo [MSB]
2205 13:25:15.421514 8, [0] oooooooo ooxooooo [MSB]
2206 13:25:15.425986 32, [0] oooxoooo oooooooo [MSB]
2207 13:25:15.429438 33, [0] oooxoxoo oooooooo [MSB]
2208 13:25:15.432951 34, [0] oooxoxoo xooxoooo [MSB]
2209 13:25:15.435999 35, [0] oooxoxoo xooxoooo [MSB]
2210 13:25:15.438998 36, [0] oooxoxxo xxoxoooo [MSB]
2211 13:25:15.442690 37, [0] oooxoxxo xxoxxxoo [MSB]
2212 13:25:15.446135 38, [0] oooxoxxx xxoxxxxo [MSB]
2213 13:25:15.446566 39, [0] xooxxxxx xxoxxxxo [MSB]
2214 13:25:15.449321 40, [0] xxoxxxxx xxoxxxxo [MSB]
2215 13:25:15.452364 41, [0] xxxxxxxx xxoxxxxx [MSB]
2216 13:25:15.455522 42, [0] xxxxxxxx xxoxxxxx [MSB]
2217 13:25:15.458642 43, [0] xxxxxxxx xxxxxxxx [MSB]
2218 13:25:15.462266 iDelay=43, Bit 0, Center 21 (4 ~ 38) 35
2219 13:25:15.465165 iDelay=43, Bit 1, Center 21 (3 ~ 39) 37
2220 13:25:15.468759 iDelay=43, Bit 2, Center 22 (4 ~ 40) 37
2221 13:25:15.472280 iDelay=43, Bit 3, Center 14 (-3 ~ 31) 35
2222 13:25:15.475388 iDelay=43, Bit 4, Center 21 (5 ~ 38) 34
2223 13:25:15.478683 iDelay=43, Bit 5, Center 16 (0 ~ 32) 33
2224 13:25:15.481828 iDelay=43, Bit 6, Center 18 (1 ~ 35) 35
2225 13:25:15.485166 iDelay=43, Bit 7, Center 20 (4 ~ 37) 34
2226 13:25:15.491992 iDelay=43, Bit 8, Center 16 (0 ~ 33) 34
2227 13:25:15.495409 iDelay=43, Bit 9, Center 18 (2 ~ 35) 34
2228 13:25:15.498719 iDelay=43, Bit 10, Center 25 (9 ~ 42) 34
2229 13:25:15.501993 iDelay=43, Bit 11, Center 16 (0 ~ 33) 34
2230 13:25:15.504807 iDelay=43, Bit 12, Center 19 (3 ~ 36) 34
2231 13:25:15.508174 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
2232 13:25:15.511582 iDelay=43, Bit 14, Center 21 (5 ~ 37) 33
2233 13:25:15.514829 iDelay=43, Bit 15, Center 23 (6 ~ 40) 35
2234 13:25:15.515101 ==
2235 13:25:15.521094 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2236 13:25:15.524347 fsp= 1, odt_onoff= 1, Byte mode= 0
2237 13:25:15.524514 ==
2238 13:25:15.524643 DQS Delay:
2239 13:25:15.527721 DQS0 = 0, DQS1 = 0
2240 13:25:15.527860 DQM Delay:
2241 13:25:15.530982 DQM0 = 19, DQM1 = 19
2242 13:25:15.531131 DQ Delay:
2243 13:25:15.534235 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14
2244 13:25:15.537791 DQ4 =21, DQ5 =16, DQ6 =18, DQ7 =20
2245 13:25:15.540554 DQ8 =16, DQ9 =18, DQ10 =25, DQ11 =16
2246 13:25:15.544083 DQ12 =19, DQ13 =19, DQ14 =21, DQ15 =23
2247 13:25:15.544157
2248 13:25:15.544214
2249 13:25:15.544267
2250 13:25:15.547553 [DramC_TX_OE_Calibration] TA2
2251 13:25:15.550267 Original DQ_B0 (3 6) =30, OEN = 27
2252 13:25:15.553658 Original DQ_B1 (3 6) =30, OEN = 27
2253 13:25:15.553737 23, 0x0, End_B0=23 End_B1=23
2254 13:25:15.557569 24, 0x0, End_B0=24 End_B1=24
2255 13:25:15.560619 25, 0x0, End_B0=25 End_B1=25
2256 13:25:15.564021 26, 0x0, End_B0=26 End_B1=26
2257 13:25:15.567236 27, 0x0, End_B0=27 End_B1=27
2258 13:25:15.567328 28, 0x0, End_B0=28 End_B1=28
2259 13:25:15.570528 29, 0x0, End_B0=29 End_B1=29
2260 13:25:15.573823 30, 0x0, End_B0=30 End_B1=30
2261 13:25:15.577293 31, 0xFFFF, End_B0=30 End_B1=30
2262 13:25:15.580060 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2263 13:25:15.587055 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2264 13:25:15.587132
2265 13:25:15.587190
2266 13:25:15.590246 Write Rank1 MR23 =0x3f
2267 13:25:15.590359 [DQSOSC]
2268 13:25:15.600226 [DQSOSCAuto] RK1, (LSB)MR18= 0xb3b3, (MSB)MR19= 0x202, tDQSOscB0 = 455 ps tDQSOscB1 = 455 ps
2269 13:25:15.603121 CH0_RK1: MR19=0x202, MR18=0xB3B3, DQSOSC=455, MR23=63, INC=11, DEC=17
2270 13:25:15.606635 Write Rank1 MR23 =0x3f
2271 13:25:15.606728 [DQSOSC]
2272 13:25:15.616582 [DQSOSCAuto] RK1, (LSB)MR18= 0xb0b0, (MSB)MR19= 0x202, tDQSOscB0 = 457 ps tDQSOscB1 = 457 ps
2273 13:25:15.619922 CH0 RK1: MR19=202, MR18=B0B0
2274 13:25:15.623358 [RxdqsGatingPostProcess] freq 1600
2275 13:25:15.626774 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2276 13:25:15.626871 Rank: 0
2277 13:25:15.629537 best DQS0 dly(2T, 0.5T) = (2, 6)
2278 13:25:15.632919 best DQS1 dly(2T, 0.5T) = (2, 6)
2279 13:25:15.636365 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2280 13:25:15.639840 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2281 13:25:15.639915 Rank: 1
2282 13:25:15.642549 best DQS0 dly(2T, 0.5T) = (2, 6)
2283 13:25:15.645943 best DQS1 dly(2T, 0.5T) = (2, 6)
2284 13:25:15.649392 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2285 13:25:15.652965 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2286 13:25:15.659194 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2287 13:25:15.662331 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2288 13:25:15.665756 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2289 13:25:15.669278 Write Rank0 MR13 =0x59
2290 13:25:15.669370 ==
2291 13:25:15.672629 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2292 13:25:15.675400 fsp= 1, odt_onoff= 1, Byte mode= 0
2293 13:25:15.675475 ==
2294 13:25:15.678892 === u2Vref_new: 0x56 --> 0x3a
2295 13:25:15.682342 === u2Vref_new: 0x58 --> 0x58
2296 13:25:15.685626 === u2Vref_new: 0x5a --> 0x5a
2297 13:25:15.688999 === u2Vref_new: 0x5c --> 0x78
2298 13:25:15.692322 === u2Vref_new: 0x5e --> 0x7a
2299 13:25:15.695611 === u2Vref_new: 0x60 --> 0x90
2300 13:25:15.698846 [CA 0] Center 37 (12~63) winsize 52
2301 13:25:15.702139 [CA 1] Center 37 (11~63) winsize 53
2302 13:25:15.705183 [CA 2] Center 35 (7~63) winsize 57
2303 13:25:15.708782 [CA 3] Center 35 (7~63) winsize 57
2304 13:25:15.712089 [CA 4] Center 34 (5~63) winsize 59
2305 13:25:15.715538 [CA 5] Center 28 (-1~57) winsize 59
2306 13:25:15.715631
2307 13:25:15.718757 [CATrainingPosCal] consider 1 rank data
2308 13:25:15.721700 u2DelayCellTimex100 = 744/100 ps
2309 13:25:15.725656 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2310 13:25:15.728449 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2311 13:25:15.731727 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2312 13:25:15.735363 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2313 13:25:15.738394 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2314 13:25:15.741540 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2315 13:25:15.741630
2316 13:25:15.748728 CA PerBit enable=1, Macro0, CA PI delay=28
2317 13:25:15.748804 === u2Vref_new: 0x5a --> 0x5a
2318 13:25:15.748864
2319 13:25:15.751909 Vref(ca) range 1: 26
2320 13:25:15.751984
2321 13:25:15.755292 CS Dly= 11 (42-0-32)
2322 13:25:15.755367 Write Rank0 MR13 =0xd8
2323 13:25:15.757958 Write Rank0 MR13 =0xd8
2324 13:25:15.761462 Write Rank0 MR12 =0x5a
2325 13:25:15.761563 Write Rank1 MR13 =0x59
2326 13:25:15.761647 ==
2327 13:25:15.768250 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2328 13:25:15.771545 fsp= 1, odt_onoff= 1, Byte mode= 0
2329 13:25:15.771640 ==
2330 13:25:15.774735 === u2Vref_new: 0x56 --> 0x3a
2331 13:25:15.777898 === u2Vref_new: 0x58 --> 0x58
2332 13:25:15.777994 === u2Vref_new: 0x5a --> 0x5a
2333 13:25:15.782148 === u2Vref_new: 0x5c --> 0x78
2334 13:25:15.784928 === u2Vref_new: 0x5e --> 0x7a
2335 13:25:15.788325 === u2Vref_new: 0x60 --> 0x90
2336 13:25:15.791666 [CA 0] Center 37 (11~63) winsize 53
2337 13:25:15.794988 [CA 1] Center 36 (10~63) winsize 54
2338 13:25:15.798326 [CA 2] Center 35 (7~63) winsize 57
2339 13:25:15.801812 [CA 3] Center 34 (6~63) winsize 58
2340 13:25:15.805235 [CA 4] Center 34 (5~63) winsize 59
2341 13:25:15.808712 [CA 5] Center 28 (0~56) winsize 57
2342 13:25:15.808811
2343 13:25:15.811404 [CATrainingPosCal] consider 2 rank data
2344 13:25:15.814790 u2DelayCellTimex100 = 744/100 ps
2345 13:25:15.817994 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2346 13:25:15.821537 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2347 13:25:15.824798 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2348 13:25:15.828033 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2349 13:25:15.834556 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2350 13:25:15.837800 CA5 delay=28 (0~56),Diff = 0 PI (0 cell)
2351 13:25:15.837894
2352 13:25:15.841179 CA PerBit enable=1, Macro0, CA PI delay=28
2353 13:25:15.844241 === u2Vref_new: 0x60 --> 0x90
2354 13:25:15.844333
2355 13:25:15.844416 Vref(ca) range 1: 32
2356 13:25:15.844496
2357 13:25:15.847975 CS Dly= 9 (40-0-32)
2358 13:25:15.851112 Write Rank1 MR13 =0xd8
2359 13:25:15.851207 Write Rank1 MR13 =0xd8
2360 13:25:15.854432 Write Rank1 MR12 =0x60
2361 13:25:15.858023 [RankSwap] Rank num 2, (Multi 1), Rank 0
2362 13:25:15.861193 Write Rank0 MR2 =0xad
2363 13:25:15.861269 [Write Leveling]
2364 13:25:15.864261 delay byte0 byte1 byte2 byte3
2365 13:25:15.864343
2366 13:25:15.864398 10 0 0
2367 13:25:15.867602 11 0 0
2368 13:25:15.867678 12 0 0
2369 13:25:15.871460 13 0 0
2370 13:25:15.871549 14 0 0
2371 13:25:15.871608 15 0 0
2372 13:25:15.874699 16 0 0
2373 13:25:15.874778 17 0 0
2374 13:25:15.877947 18 0 0
2375 13:25:15.878060 19 0 0
2376 13:25:15.881390 20 0 0
2377 13:25:15.881465 21 0 0
2378 13:25:15.881523 22 0 0
2379 13:25:15.884595 23 0 0
2380 13:25:15.884671 24 0 0
2381 13:25:15.888015 25 0 0
2382 13:25:15.888091 26 0 0
2383 13:25:15.888150 27 0 0
2384 13:25:15.890675 28 0 0
2385 13:25:15.890751 29 0 0
2386 13:25:15.894076 30 0 0
2387 13:25:15.894182 31 0 0
2388 13:25:15.897288 32 0 0
2389 13:25:15.897364 33 0 ff
2390 13:25:15.897423 34 0 ff
2391 13:25:15.900774 35 ff ff
2392 13:25:15.900850 36 ff ff
2393 13:25:15.904048 37 ff ff
2394 13:25:15.904125 38 ff ff
2395 13:25:15.907398 39 ff ff
2396 13:25:15.907475 40 ff ff
2397 13:25:15.910915 41 ff ff
2398 13:25:15.914315 pass bytecount = 0xff (0xff: all bytes pass)
2399 13:25:15.914390
2400 13:25:15.914448 DQS0 dly: 35
2401 13:25:15.917024 DQS1 dly: 33
2402 13:25:15.917099 Write Rank0 MR2 =0x2d
2403 13:25:15.920270 [RankSwap] Rank num 2, (Multi 1), Rank 0
2404 13:25:15.923630 Write Rank0 MR1 =0xd6
2405 13:25:15.923706 [Gating]
2406 13:25:15.923764 ==
2407 13:25:15.930528 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2408 13:25:15.933972 fsp= 1, odt_onoff= 1, Byte mode= 0
2409 13:25:15.934082 ==
2410 13:25:15.937114 3 1 0 |2c2b 404 |(11 11)(11 11) |(1 1)(1 1)| 0
2411 13:25:15.940221 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2412 13:25:15.946913 3 1 8 |2c2b 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
2413 13:25:15.950067 3 1 12 |2c2b 3635 |(11 11)(11 11) |(1 1)(0 0)| 0
2414 13:25:15.953846 3 1 16 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2415 13:25:15.960027 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2416 13:25:15.963353 [Byte 0] Lead/lag falling Transition (3, 1, 20)
2417 13:25:15.966665 3 1 24 |2c2b 3736 |(11 11)(11 11) |(1 0)(1 1)| 0
2418 13:25:15.973286 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2419 13:25:15.976624 3 2 0 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
2420 13:25:15.979689 [Byte 1] Lead/lag Transition tap number (1)
2421 13:25:15.986196 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2422 13:25:15.989681 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2423 13:25:15.992893 3 2 12 |2c2b 3434 |(11 11)(11 11) |(1 0)(0 0)| 0
2424 13:25:15.999529 3 2 16 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 0)| 0
2425 13:25:16.002684 3 2 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2426 13:25:16.005658 [Byte 0] Lead/lag Transition tap number (9)
2427 13:25:16.009617 3 2 24 |303 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2428 13:25:16.015751 3 2 28 |3534 b0a |(11 11)(11 11) |(0 0)(1 1)| 0
2429 13:25:16.019202 3 3 0 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
2430 13:25:16.022612 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2431 13:25:16.028660 3 3 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2432 13:25:16.032150 3 3 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2433 13:25:16.035650 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2434 13:25:16.041970 3 3 20 |3534 3c3c |(11 11)(10 10) |(1 1)(1 1)| 0
2435 13:25:16.045338 3 3 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2436 13:25:16.048676 3 3 28 |3534 202 |(11 11)(11 11) |(1 1)(1 1)| 0
2437 13:25:16.055034 3 4 0 |3534 e0e |(11 11)(11 11) |(0 0)(1 1)| 0
2438 13:25:16.058226 [Byte 1] Lead/lag Transition tap number (1)
2439 13:25:16.061871 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2440 13:25:16.065037 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2441 13:25:16.071375 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2442 13:25:16.074667 3 4 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2443 13:25:16.077994 3 4 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2444 13:25:16.084927 3 4 24 |1110 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2445 13:25:16.088347 3 4 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2446 13:25:16.091085 3 5 0 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
2447 13:25:16.097806 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2448 13:25:16.101107 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2449 13:25:16.104328 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2450 13:25:16.111239 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2451 13:25:16.114340 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2452 13:25:16.117337 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2453 13:25:16.123937 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2454 13:25:16.127116 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2455 13:25:16.130590 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2456 13:25:16.137022 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2457 13:25:16.140389 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2458 13:25:16.143904 [Byte 0] Lead/lag falling Transition (3, 6, 12)
2459 13:25:16.150041 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2460 13:25:16.153506 3 6 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2461 13:25:16.156894 [Byte 0] Lead/lag Transition tap number (3)
2462 13:25:16.163028 3 6 24 |202 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2463 13:25:16.166253 [Byte 1] Lead/lag Transition tap number (1)
2464 13:25:16.170051 3 6 28 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2465 13:25:16.173126 [Byte 0]First pass (3, 6, 28)
2466 13:25:16.176265 3 7 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2467 13:25:16.179480 3 7 4 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
2468 13:25:16.183087 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2469 13:25:16.186096 [Byte 1]First pass (3, 7, 8)
2470 13:25:16.192440 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2471 13:25:16.196006 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2472 13:25:16.199372 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2473 13:25:16.202774 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2474 13:25:16.205578 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2475 13:25:16.212414 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2476 13:25:16.215920 4 0 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2477 13:25:16.218642 4 0 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2478 13:25:16.222124 All bytes gating window > 1UI, Early break!
2479 13:25:16.222209
2480 13:25:16.225375 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 18)
2481 13:25:16.225440
2482 13:25:16.232066 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 26)
2483 13:25:16.232136
2484 13:25:16.232192
2485 13:25:16.232262
2486 13:25:16.235348 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
2487 13:25:16.235414
2488 13:25:16.238640 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 26)
2489 13:25:16.238732
2490 13:25:16.238829
2491 13:25:16.241999 Write Rank0 MR1 =0x56
2492 13:25:16.242139
2493 13:25:16.245071 best RODT dly(2T, 0.5T) = (2, 3)
2494 13:25:16.245176
2495 13:25:16.248695 best RODT dly(2T, 0.5T) = (2, 3)
2496 13:25:16.248805 ==
2497 13:25:16.251825 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2498 13:25:16.255255 fsp= 1, odt_onoff= 1, Byte mode= 0
2499 13:25:16.255357 ==
2500 13:25:16.261607 Start DQ dly to find pass range UseTestEngine =0
2501 13:25:16.264677 x-axis: bit #, y-axis: DQ dly (-127~63)
2502 13:25:16.264771 RX Vref Scan = 0
2503 13:25:16.267959 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2504 13:25:16.271313 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2505 13:25:16.274649 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2506 13:25:16.278124 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2507 13:25:16.281482 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2508 13:25:16.284266 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2509 13:25:16.288074 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2510 13:25:16.288178 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2511 13:25:16.291133 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2512 13:25:16.294123 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2513 13:25:16.297807 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2514 13:25:16.300832 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2515 13:25:16.303984 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2516 13:25:16.307511 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2517 13:25:16.310947 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2518 13:25:16.314310 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2519 13:25:16.314385 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2520 13:25:16.317674 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2521 13:25:16.320436 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2522 13:25:16.323889 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2523 13:25:16.327139 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2524 13:25:16.330406 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2525 13:25:16.333758 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2526 13:25:16.337066 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2527 13:25:16.337143 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2528 13:25:16.340542 -1, [0] xxxxxxxx xxxxxxxo [MSB]
2529 13:25:16.343954 0, [0] xxxxxxxx xoxxxxxo [MSB]
2530 13:25:16.346702 1, [0] xxxoxxxx ooxxxxxo [MSB]
2531 13:25:16.349978 2, [0] xxxoxxxx ooxxxxxo [MSB]
2532 13:25:16.353480 3, [0] xxooxxxx ooxxxxxo [MSB]
2533 13:25:16.353557 4, [0] xoooxxxo oooxxxxo [MSB]
2534 13:25:16.356897 5, [0] xooooxxo ooooxooo [MSB]
2535 13:25:16.360013 6, [0] xooooxxo oooooooo [MSB]
2536 13:25:16.363404 7, [0] xooooxxo oooooooo [MSB]
2537 13:25:16.366703 8, [0] xooooooo oooooooo [MSB]
2538 13:25:16.369627 33, [0] oooxoooo ooooooox [MSB]
2539 13:25:16.373320 34, [0] oooxoooo ooooooox [MSB]
2540 13:25:16.373397 35, [0] oooxoooo xoooooox [MSB]
2541 13:25:16.376151 36, [0] oooxoooo xxooooox [MSB]
2542 13:25:16.379928 37, [0] ooxxoooo xxooooox [MSB]
2543 13:25:16.382815 38, [0] ooxxoooo xxooooox [MSB]
2544 13:25:16.385998 39, [0] xxxxxoox xxooxoox [MSB]
2545 13:25:16.390067 40, [0] xxxxxoox xxxoxoox [MSB]
2546 13:25:16.392540 41, [0] xxxxxoxx xxxxxxxx [MSB]
2547 13:25:16.395997 42, [0] xxxxxxxx xxxxxxxx [MSB]
2548 13:25:16.399246 iDelay=42, Bit 0, Center 23 (9 ~ 38) 30
2549 13:25:16.402536 iDelay=42, Bit 1, Center 21 (4 ~ 38) 35
2550 13:25:16.405823 iDelay=42, Bit 2, Center 19 (3 ~ 36) 34
2551 13:25:16.409292 iDelay=42, Bit 3, Center 16 (1 ~ 32) 32
2552 13:25:16.412192 iDelay=42, Bit 4, Center 21 (5 ~ 38) 34
2553 13:25:16.415762 iDelay=42, Bit 5, Center 24 (8 ~ 41) 34
2554 13:25:16.418808 iDelay=42, Bit 6, Center 24 (8 ~ 40) 33
2555 13:25:16.422300 iDelay=42, Bit 7, Center 21 (4 ~ 38) 35
2556 13:25:16.425734 iDelay=42, Bit 8, Center 17 (1 ~ 34) 34
2557 13:25:16.429137 iDelay=42, Bit 9, Center 17 (0 ~ 35) 36
2558 13:25:16.431981 iDelay=42, Bit 10, Center 21 (4 ~ 39) 36
2559 13:25:16.438605 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
2560 13:25:16.442019 iDelay=42, Bit 12, Center 22 (6 ~ 38) 33
2561 13:25:16.445411 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
2562 13:25:16.448163 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
2563 13:25:16.451575 iDelay=42, Bit 15, Center 14 (-4 ~ 32) 37
2564 13:25:16.451650 ==
2565 13:25:16.458436 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2566 13:25:16.458512 fsp= 1, odt_onoff= 1, Byte mode= 0
2567 13:25:16.461994 ==
2568 13:25:16.462110 DQS Delay:
2569 13:25:16.462169 DQS0 = 0, DQS1 = 0
2570 13:25:16.465203 DQM Delay:
2571 13:25:16.465278 DQM0 = 21, DQM1 = 19
2572 13:25:16.468565 DQ Delay:
2573 13:25:16.471353 DQ0 =23, DQ1 =21, DQ2 =19, DQ3 =16
2574 13:25:16.471428 DQ4 =21, DQ5 =24, DQ6 =24, DQ7 =21
2575 13:25:16.474678 DQ8 =17, DQ9 =17, DQ10 =21, DQ11 =22
2576 13:25:16.481590 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
2577 13:25:16.481665
2578 13:25:16.481723
2579 13:25:16.481777 DramC Write-DBI off
2580 13:25:16.481828 ==
2581 13:25:16.488110 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2582 13:25:16.491443 fsp= 1, odt_onoff= 1, Byte mode= 0
2583 13:25:16.491518 ==
2584 13:25:16.494867 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2585 13:25:16.494942
2586 13:25:16.498136 Begin, DQ Scan Range 929~1185
2587 13:25:16.498210
2588 13:25:16.498268
2589 13:25:16.501278 TX Vref Scan disable
2590 13:25:16.504324 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2591 13:25:16.507354 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2592 13:25:16.510789 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2593 13:25:16.514301 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2594 13:25:16.517351 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2595 13:25:16.521022 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2596 13:25:16.524134 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2597 13:25:16.527186 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2598 13:25:16.530519 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2599 13:25:16.536820 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2600 13:25:16.540405 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2601 13:25:16.543473 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2602 13:25:16.546985 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2603 13:25:16.550407 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2604 13:25:16.553183 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2605 13:25:16.556692 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2606 13:25:16.560069 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2607 13:25:16.562832 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2608 13:25:16.566248 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2609 13:25:16.569577 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2610 13:25:16.572896 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2611 13:25:16.576363 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2612 13:25:16.582638 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2613 13:25:16.585996 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2614 13:25:16.589210 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2615 13:25:16.592546 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2616 13:25:16.595949 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2617 13:25:16.599415 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2618 13:25:16.602877 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2619 13:25:16.605502 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2620 13:25:16.609046 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2621 13:25:16.612577 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2622 13:25:16.615283 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2623 13:25:16.619220 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2624 13:25:16.622249 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2625 13:25:16.625119 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2626 13:25:16.632142 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2627 13:25:16.635603 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2628 13:25:16.638409 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2629 13:25:16.641747 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2630 13:25:16.645007 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2631 13:25:16.648058 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2632 13:25:16.651562 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2633 13:25:16.654418 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2634 13:25:16.657989 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2635 13:25:16.661439 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2636 13:25:16.664412 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2637 13:25:16.667649 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2638 13:25:16.671154 977 |3 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2639 13:25:16.674564 978 |3 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2640 13:25:16.681250 979 |3 6 19|[0] xxxxxxxx oxxxxxxo [MSB]
2641 13:25:16.683930 980 |3 6 20|[0] xxxxxxxx ooxxxxxo [MSB]
2642 13:25:16.687416 981 |3 6 21|[0] xxxxxxxx ooxxxxxo [MSB]
2643 13:25:16.690771 982 |3 6 22|[0] xxxxxxxx ooxxxxxo [MSB]
2644 13:25:16.694159 983 |3 6 23|[0] xxxxxxxx oooxxxxo [MSB]
2645 13:25:16.697459 984 |3 6 24|[0] xoxooxoo oooooxoo [MSB]
2646 13:25:16.703535 996 |3 6 36|[0] oooooooo ooooooox [MSB]
2647 13:25:16.706932 997 |3 6 37|[0] oooooooo ooooooox [MSB]
2648 13:25:16.710343 998 |3 6 38|[0] oooooooo ooooooox [MSB]
2649 13:25:16.713848 999 |3 6 39|[0] oooooooo ooooooox [MSB]
2650 13:25:16.717316 1000 |3 6 40|[0] oooooooo oxooooox [MSB]
2651 13:25:16.720021 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2652 13:25:16.723416 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2653 13:25:16.726882 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
2654 13:25:16.729995 1004 |3 6 44|[0] oooxoooo xxxxxxxx [MSB]
2655 13:25:16.733198 1005 |3 6 45|[0] ooxxoooo xxxxxxxx [MSB]
2656 13:25:16.736690 1006 |3 6 46|[0] ooxxxoox xxxxxxxx [MSB]
2657 13:25:16.743351 1007 |3 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2658 13:25:16.746826 Byte0, DQ PI dly=993, DQM PI dly= 993
2659 13:25:16.749927 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 33)
2660 13:25:16.750002
2661 13:25:16.753218 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 33)
2662 13:25:16.753294
2663 13:25:16.756474 Byte1, DQ PI dly=989, DQM PI dly= 989
2664 13:25:16.763002 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2665 13:25:16.763078
2666 13:25:16.766438 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2667 13:25:16.766514
2668 13:25:16.766571 ==
2669 13:25:16.772839 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2670 13:25:16.776002 fsp= 1, odt_onoff= 1, Byte mode= 0
2671 13:25:16.776078 ==
2672 13:25:16.779042 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2673 13:25:16.779117
2674 13:25:16.783045 Begin, DQ Scan Range 965~1029
2675 13:25:16.785832 Write Rank0 MR14 =0x0
2676 13:25:16.791877
2677 13:25:16.791952 CH=1, VrefRange= 0, VrefLevel = 0
2678 13:25:16.798707 TX Bit0 (988~1003) 16 995, Bit8 (983~994) 12 988,
2679 13:25:16.801970 TX Bit1 (985~1001) 17 993, Bit9 (983~993) 11 988,
2680 13:25:16.808546 TX Bit2 (984~998) 15 991, Bit10 (986~998) 13 992,
2681 13:25:16.811949 TX Bit3 (983~994) 12 988, Bit11 (986~997) 12 991,
2682 13:25:16.814833 TX Bit4 (985~1000) 16 992, Bit12 (986~997) 12 991,
2683 13:25:16.821694 TX Bit5 (987~1001) 15 994, Bit13 (987~997) 11 992,
2684 13:25:16.825126 TX Bit6 (986~1001) 16 993, Bit14 (986~994) 9 990,
2685 13:25:16.831317 TX Bit7 (986~999) 14 992, Bit15 (980~989) 10 984,
2686 13:25:16.831399
2687 13:25:16.831475 Write Rank0 MR14 =0x2
2688 13:25:16.840851
2689 13:25:16.840932 CH=1, VrefRange= 0, VrefLevel = 2
2690 13:25:16.847100 TX Bit0 (987~1004) 18 995, Bit8 (984~995) 12 989,
2691 13:25:16.850475 TX Bit1 (985~1003) 19 994, Bit9 (983~994) 12 988,
2692 13:25:16.857125 TX Bit2 (984~999) 16 991, Bit10 (986~999) 14 992,
2693 13:25:16.860323 TX Bit3 (983~996) 14 989, Bit11 (986~998) 13 992,
2694 13:25:16.863253 TX Bit4 (985~1001) 17 993, Bit12 (986~997) 12 991,
2695 13:25:16.869981 TX Bit5 (987~1002) 16 994, Bit13 (986~998) 13 992,
2696 13:25:16.873358 TX Bit6 (986~1002) 17 994, Bit14 (986~995) 10 990,
2697 13:25:16.879605 TX Bit7 (986~999) 14 992, Bit15 (980~991) 12 985,
2698 13:25:16.879684
2699 13:25:16.879762 Write Rank0 MR14 =0x4
2700 13:25:16.889576
2701 13:25:16.889654 CH=1, VrefRange= 0, VrefLevel = 4
2702 13:25:16.895741 TX Bit0 (986~1005) 20 995, Bit8 (983~995) 13 989,
2703 13:25:16.898924 TX Bit1 (985~1003) 19 994, Bit9 (983~994) 12 988,
2704 13:25:16.905418 TX Bit2 (984~1000) 17 992, Bit10 (985~1000) 16 992,
2705 13:25:16.908936 TX Bit3 (983~997) 15 990, Bit11 (986~1000) 15 993,
2706 13:25:16.915051 TX Bit4 (985~1002) 18 993, Bit12 (986~998) 13 992,
2707 13:25:16.918521 TX Bit5 (987~1003) 17 995, Bit13 (986~999) 14 992,
2708 13:25:16.921746 TX Bit6 (985~1003) 19 994, Bit14 (986~996) 11 991,
2709 13:25:16.928765 TX Bit7 (985~1000) 16 992, Bit15 (979~992) 14 985,
2710 13:25:16.928870
2711 13:25:16.928948 Write Rank0 MR14 =0x6
2712 13:25:16.938438
2713 13:25:16.938515 CH=1, VrefRange= 0, VrefLevel = 6
2714 13:25:16.944569 TX Bit0 (986~1005) 20 995, Bit8 (982~996) 15 989,
2715 13:25:16.947921 TX Bit1 (985~1004) 20 994, Bit9 (983~995) 13 989,
2716 13:25:16.954395 TX Bit2 (984~1000) 17 992, Bit10 (985~1000) 16 992,
2717 13:25:16.957610 TX Bit3 (982~997) 16 989, Bit11 (986~1000) 15 993,
2718 13:25:16.964312 TX Bit4 (985~1003) 19 994, Bit12 (985~1000) 16 992,
2719 13:25:16.967666 TX Bit5 (986~1004) 19 995, Bit13 (986~1000) 15 993,
2720 13:25:16.971146 TX Bit6 (985~1004) 20 994, Bit14 (986~997) 12 991,
2721 13:25:16.977399 TX Bit7 (985~1001) 17 993, Bit15 (979~992) 14 985,
2722 13:25:16.977477
2723 13:25:16.980478 Write Rank0 MR14 =0x8
2724 13:25:16.987528
2725 13:25:16.987607 CH=1, VrefRange= 0, VrefLevel = 8
2726 13:25:16.993615 TX Bit0 (985~1005) 21 995, Bit8 (981~997) 17 989,
2727 13:25:16.997022 TX Bit1 (984~1005) 22 994, Bit9 (982~995) 14 988,
2728 13:25:17.003833 TX Bit2 (984~1001) 18 992, Bit10 (984~1001) 18 992,
2729 13:25:17.007416 TX Bit3 (982~998) 17 990, Bit11 (986~1000) 15 993,
2730 13:25:17.013671 TX Bit4 (985~1004) 20 994, Bit12 (985~1000) 16 992,
2731 13:25:17.016992 TX Bit5 (986~1005) 20 995, Bit13 (986~1000) 15 993,
2732 13:25:17.020410 TX Bit6 (985~1004) 20 994, Bit14 (985~998) 14 991,
2733 13:25:17.026733 TX Bit7 (985~1002) 18 993, Bit15 (979~993) 15 986,
2734 13:25:17.026811
2735 13:25:17.029708 Write Rank0 MR14 =0xa
2736 13:25:17.036432
2737 13:25:17.039847 CH=1, VrefRange= 0, VrefLevel = 10
2738 13:25:17.043153 TX Bit0 (986~1006) 21 996, Bit8 (981~997) 17 989,
2739 13:25:17.046695 TX Bit1 (984~1005) 22 994, Bit9 (981~996) 16 988,
2740 13:25:17.053186 TX Bit2 (983~1002) 20 992, Bit10 (984~1001) 18 992,
2741 13:25:17.056637 TX Bit3 (982~998) 17 990, Bit11 (985~1001) 17 993,
2742 13:25:17.063173 TX Bit4 (984~1004) 21 994, Bit12 (985~1001) 17 993,
2743 13:25:17.065908 TX Bit5 (985~1005) 21 995, Bit13 (986~1001) 16 993,
2744 13:25:17.069222 TX Bit6 (985~1005) 21 995, Bit14 (984~999) 16 991,
2745 13:25:17.075972 TX Bit7 (985~1003) 19 994, Bit15 (978~993) 16 985,
2746 13:25:17.076047
2747 13:25:17.079439 Write Rank0 MR14 =0xc
2748 13:25:17.086236
2749 13:25:17.089326 CH=1, VrefRange= 0, VrefLevel = 12
2750 13:25:17.092940 TX Bit0 (985~1006) 22 995, Bit8 (981~998) 18 989,
2751 13:25:17.096013 TX Bit1 (984~1005) 22 994, Bit9 (981~997) 17 989,
2752 13:25:17.102717 TX Bit2 (983~1003) 21 993, Bit10 (985~1001) 17 993,
2753 13:25:17.106188 TX Bit3 (982~999) 18 990, Bit11 (985~1001) 17 993,
2754 13:25:17.112464 TX Bit4 (985~1005) 21 995, Bit12 (985~1001) 17 993,
2755 13:25:17.115693 TX Bit5 (985~1005) 21 995, Bit13 (986~1001) 16 993,
2756 13:25:17.119097 TX Bit6 (985~1005) 21 995, Bit14 (985~1000) 16 992,
2757 13:25:17.125406 TX Bit7 (984~1004) 21 994, Bit15 (978~994) 17 986,
2758 13:25:17.125482
2759 13:25:17.128896 Write Rank0 MR14 =0xe
2760 13:25:17.135799
2761 13:25:17.139122 CH=1, VrefRange= 0, VrefLevel = 14
2762 13:25:17.142498 TX Bit0 (985~1006) 22 995, Bit8 (979~1000) 22 989,
2763 13:25:17.145820 TX Bit1 (984~1006) 23 995, Bit9 (981~998) 18 989,
2764 13:25:17.152220 TX Bit2 (983~1004) 22 993, Bit10 (984~1001) 18 992,
2765 13:25:17.155204 TX Bit3 (981~999) 19 990, Bit11 (985~1001) 17 993,
2766 13:25:17.161880 TX Bit4 (984~1005) 22 994, Bit12 (984~1002) 19 993,
2767 13:25:17.165277 TX Bit5 (985~1005) 21 995, Bit13 (985~1001) 17 993,
2768 13:25:17.171946 TX Bit6 (984~1005) 22 994, Bit14 (984~1001) 18 992,
2769 13:25:17.174873 TX Bit7 (984~1005) 22 994, Bit15 (978~994) 17 986,
2770 13:25:17.174948
2771 13:25:17.177904 Write Rank0 MR14 =0x10
2772 13:25:17.185920
2773 13:25:17.188709 CH=1, VrefRange= 0, VrefLevel = 16
2774 13:25:17.192066 TX Bit0 (985~1007) 23 996, Bit8 (980~1000) 21 990,
2775 13:25:17.195411 TX Bit1 (984~1006) 23 995, Bit9 (981~999) 19 990,
2776 13:25:17.201798 TX Bit2 (983~1005) 23 994, Bit10 (983~1002) 20 992,
2777 13:25:17.205477 TX Bit3 (981~1000) 20 990, Bit11 (984~1002) 19 993,
2778 13:25:17.211945 TX Bit4 (984~1006) 23 995, Bit12 (984~1002) 19 993,
2779 13:25:17.215199 TX Bit5 (985~1006) 22 995, Bit13 (985~1002) 18 993,
2780 13:25:17.221419 TX Bit6 (984~1006) 23 995, Bit14 (983~1001) 19 992,
2781 13:25:17.224754 TX Bit7 (984~1005) 22 994, Bit15 (977~995) 19 986,
2782 13:25:17.224830
2783 13:25:17.228134 Write Rank0 MR14 =0x12
2784 13:25:17.235756
2785 13:25:17.238405 CH=1, VrefRange= 0, VrefLevel = 18
2786 13:25:17.241859 TX Bit0 (985~1007) 23 996, Bit8 (979~1000) 22 989,
2787 13:25:17.245336 TX Bit1 (984~1006) 23 995, Bit9 (979~999) 21 989,
2788 13:25:17.252123 TX Bit2 (983~1005) 23 994, Bit10 (983~1002) 20 992,
2789 13:25:17.255418 TX Bit3 (980~1000) 21 990, Bit11 (984~1002) 19 993,
2790 13:25:17.261630 TX Bit4 (984~1006) 23 995, Bit12 (984~1002) 19 993,
2791 13:25:17.264818 TX Bit5 (985~1006) 22 995, Bit13 (985~1002) 18 993,
2792 13:25:17.271851 TX Bit6 (984~1006) 23 995, Bit14 (984~1001) 18 992,
2793 13:25:17.274895 TX Bit7 (984~1005) 22 994, Bit15 (977~995) 19 986,
2794 13:25:17.274970
2795 13:25:17.277879 Write Rank0 MR14 =0x14
2796 13:25:17.285291
2797 13:25:17.288824 CH=1, VrefRange= 0, VrefLevel = 20
2798 13:25:17.291787 TX Bit0 (985~1007) 23 996, Bit8 (979~1001) 23 990,
2799 13:25:17.295207 TX Bit1 (983~1006) 24 994, Bit9 (979~1000) 22 989,
2800 13:25:17.301734 TX Bit2 (982~1005) 24 993, Bit10 (982~1003) 22 992,
2801 13:25:17.305055 TX Bit3 (980~1001) 22 990, Bit11 (983~1002) 20 992,
2802 13:25:17.311560 TX Bit4 (984~1006) 23 995, Bit12 (983~1003) 21 993,
2803 13:25:17.314590 TX Bit5 (984~1006) 23 995, Bit13 (984~1002) 19 993,
2804 13:25:17.321483 TX Bit6 (984~1006) 23 995, Bit14 (983~1002) 20 992,
2805 13:25:17.324829 TX Bit7 (984~1005) 22 994, Bit15 (977~996) 20 986,
2806 13:25:17.324905
2807 13:25:17.327984 Write Rank0 MR14 =0x16
2808 13:25:17.335289
2809 13:25:17.338800 CH=1, VrefRange= 0, VrefLevel = 22
2810 13:25:17.342214 TX Bit0 (984~1007) 24 995, Bit8 (979~1001) 23 990,
2811 13:25:17.345063 TX Bit1 (984~1007) 24 995, Bit9 (979~1000) 22 989,
2812 13:25:17.351703 TX Bit2 (982~1005) 24 993, Bit10 (983~1003) 21 993,
2813 13:25:17.355007 TX Bit3 (979~1002) 24 990, Bit11 (983~1003) 21 993,
2814 13:25:17.361863 TX Bit4 (983~1006) 24 994, Bit12 (983~1003) 21 993,
2815 13:25:17.364640 TX Bit5 (984~1007) 24 995, Bit13 (984~1003) 20 993,
2816 13:25:17.371404 TX Bit6 (984~1007) 24 995, Bit14 (983~1002) 20 992,
2817 13:25:17.374788 TX Bit7 (984~1006) 23 995, Bit15 (977~997) 21 987,
2818 13:25:17.374865
2819 13:25:17.378163 Write Rank0 MR14 =0x18
2820 13:25:17.385427
2821 13:25:17.388692 CH=1, VrefRange= 0, VrefLevel = 24
2822 13:25:17.392032 TX Bit0 (984~1008) 25 996, Bit8 (978~1001) 24 989,
2823 13:25:17.395311 TX Bit1 (983~1007) 25 995, Bit9 (979~1001) 23 990,
2824 13:25:17.401967 TX Bit2 (982~1006) 25 994, Bit10 (982~1003) 22 992,
2825 13:25:17.405034 TX Bit3 (979~1003) 25 991, Bit11 (982~1003) 22 992,
2826 13:25:17.411861 TX Bit4 (983~1007) 25 995, Bit12 (982~1003) 22 992,
2827 13:25:17.414985 TX Bit5 (984~1007) 24 995, Bit13 (984~1003) 20 993,
2828 13:25:17.421512 TX Bit6 (984~1007) 24 995, Bit14 (983~1002) 20 992,
2829 13:25:17.425203 TX Bit7 (983~1006) 24 994, Bit15 (977~997) 21 987,
2830 13:25:17.425280
2831 13:25:17.428263 Write Rank0 MR14 =0x1a
2832 13:25:17.435943
2833 13:25:17.438976 CH=1, VrefRange= 0, VrefLevel = 26
2834 13:25:17.442100 TX Bit0 (984~1008) 25 996, Bit8 (979~1002) 24 990,
2835 13:25:17.445390 TX Bit1 (983~1007) 25 995, Bit9 (979~1001) 23 990,
2836 13:25:17.452309 TX Bit2 (981~1006) 26 993, Bit10 (981~1004) 24 992,
2837 13:25:17.455775 TX Bit3 (978~1003) 26 990, Bit11 (982~1004) 23 993,
2838 13:25:17.461837 TX Bit4 (983~1007) 25 995, Bit12 (982~1004) 23 993,
2839 13:25:17.465328 TX Bit5 (984~1007) 24 995, Bit13 (984~1004) 21 994,
2840 13:25:17.472178 TX Bit6 (983~1007) 25 995, Bit14 (981~1003) 23 992,
2841 13:25:17.474890 TX Bit7 (983~1006) 24 994, Bit15 (976~998) 23 987,
2842 13:25:17.474966
2843 13:25:17.478155 wait MRW command Rank0 MR14 =0x1c fired (1)
2844 13:25:17.481514 Write Rank0 MR14 =0x1c
2845 13:25:17.489886
2846 13:25:17.493326 CH=1, VrefRange= 0, VrefLevel = 28
2847 13:25:17.496678 TX Bit0 (984~1009) 26 996, Bit8 (979~1001) 23 990,
2848 13:25:17.500037 TX Bit1 (983~1007) 25 995, Bit9 (978~1001) 24 989,
2849 13:25:17.506691 TX Bit2 (981~1006) 26 993, Bit10 (981~1004) 24 992,
2850 13:25:17.509921 TX Bit3 (978~1004) 27 991, Bit11 (981~1005) 25 993,
2851 13:25:17.516392 TX Bit4 (983~1007) 25 995, Bit12 (982~1004) 23 993,
2852 13:25:17.519686 TX Bit5 (984~1007) 24 995, Bit13 (983~1004) 22 993,
2853 13:25:17.525770 TX Bit6 (983~1007) 25 995, Bit14 (981~1003) 23 992,
2854 13:25:17.529765 TX Bit7 (983~1007) 25 995, Bit15 (976~999) 24 987,
2855 13:25:17.529841
2856 13:25:17.532590 Write Rank0 MR14 =0x1e
2857 13:25:17.540165
2858 13:25:17.543782 CH=1, VrefRange= 0, VrefLevel = 30
2859 13:25:17.546596 TX Bit0 (984~1009) 26 996, Bit8 (979~1001) 23 990,
2860 13:25:17.550162 TX Bit1 (983~1007) 25 995, Bit9 (978~1001) 24 989,
2861 13:25:17.556640 TX Bit2 (981~1006) 26 993, Bit10 (981~1004) 24 992,
2862 13:25:17.559975 TX Bit3 (978~1004) 27 991, Bit11 (981~1005) 25 993,
2863 13:25:17.566940 TX Bit4 (983~1007) 25 995, Bit12 (982~1004) 23 993,
2864 13:25:17.570138 TX Bit5 (984~1007) 24 995, Bit13 (983~1004) 22 993,
2865 13:25:17.576353 TX Bit6 (983~1007) 25 995, Bit14 (981~1003) 23 992,
2866 13:25:17.579627 TX Bit7 (983~1007) 25 995, Bit15 (976~999) 24 987,
2867 13:25:17.579703
2868 13:25:17.583064 Write Rank0 MR14 =0x20
2869 13:25:17.590601
2870 13:25:17.593794 CH=1, VrefRange= 0, VrefLevel = 32
2871 13:25:17.597036 TX Bit0 (984~1009) 26 996, Bit8 (979~1001) 23 990,
2872 13:25:17.600400 TX Bit1 (983~1007) 25 995, Bit9 (978~1001) 24 989,
2873 13:25:17.606623 TX Bit2 (981~1006) 26 993, Bit10 (981~1004) 24 992,
2874 13:25:17.610128 TX Bit3 (978~1004) 27 991, Bit11 (981~1005) 25 993,
2875 13:25:17.616942 TX Bit4 (983~1007) 25 995, Bit12 (982~1004) 23 993,
2876 13:25:17.620101 TX Bit5 (984~1007) 24 995, Bit13 (983~1004) 22 993,
2877 13:25:17.626688 TX Bit6 (983~1007) 25 995, Bit14 (981~1003) 23 992,
2878 13:25:17.630470 TX Bit7 (983~1007) 25 995, Bit15 (976~999) 24 987,
2879 13:25:17.630547
2880 13:25:17.633148 Write Rank0 MR14 =0x22
2881 13:25:17.640412
2882 13:25:17.644418 CH=1, VrefRange= 0, VrefLevel = 34
2883 13:25:17.647299 TX Bit0 (984~1009) 26 996, Bit8 (979~1001) 23 990,
2884 13:25:17.650554 TX Bit1 (983~1007) 25 995, Bit9 (978~1001) 24 989,
2885 13:25:17.657060 TX Bit2 (981~1006) 26 993, Bit10 (981~1004) 24 992,
2886 13:25:17.660241 TX Bit3 (978~1004) 27 991, Bit11 (981~1005) 25 993,
2887 13:25:17.666827 TX Bit4 (983~1007) 25 995, Bit12 (982~1004) 23 993,
2888 13:25:17.669829 TX Bit5 (984~1007) 24 995, Bit13 (983~1004) 22 993,
2889 13:25:17.676563 TX Bit6 (983~1007) 25 995, Bit14 (981~1003) 23 992,
2890 13:25:17.680068 TX Bit7 (983~1007) 25 995, Bit15 (976~999) 24 987,
2891 13:25:17.680144
2892 13:25:17.680202
2893 13:25:17.683361 TX Vref found, early break! 367< 371
2894 13:25:17.689447 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2895 13:25:17.689522 u1DelayCellOfst[0]=6 cells (5 PI)
2896 13:25:17.692945 u1DelayCellOfst[1]=5 cells (4 PI)
2897 13:25:17.696284 u1DelayCellOfst[2]=2 cells (2 PI)
2898 13:25:17.699523 u1DelayCellOfst[3]=0 cells (0 PI)
2899 13:25:17.702738 u1DelayCellOfst[4]=5 cells (4 PI)
2900 13:25:17.706262 u1DelayCellOfst[5]=5 cells (4 PI)
2901 13:25:17.709734 u1DelayCellOfst[6]=5 cells (4 PI)
2902 13:25:17.712499 u1DelayCellOfst[7]=5 cells (4 PI)
2903 13:25:17.715879 Byte0, DQ PI dly=991, DQM PI dly= 993
2904 13:25:17.719283 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
2905 13:25:17.719359
2906 13:25:17.725822 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
2907 13:25:17.725898
2908 13:25:17.728898 u1DelayCellOfst[8]=3 cells (3 PI)
2909 13:25:17.732579 u1DelayCellOfst[9]=2 cells (2 PI)
2910 13:25:17.732654 u1DelayCellOfst[10]=6 cells (5 PI)
2911 13:25:17.735738 u1DelayCellOfst[11]=7 cells (6 PI)
2912 13:25:17.739296 u1DelayCellOfst[12]=7 cells (6 PI)
2913 13:25:17.742640 u1DelayCellOfst[13]=7 cells (6 PI)
2914 13:25:17.745353 u1DelayCellOfst[14]=6 cells (5 PI)
2915 13:25:17.748732 u1DelayCellOfst[15]=0 cells (0 PI)
2916 13:25:17.752107 Byte1, DQ PI dly=987, DQM PI dly= 990
2917 13:25:17.758940 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
2918 13:25:17.759017
2919 13:25:17.761950 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
2920 13:25:17.762068
2921 13:25:17.764994 Write Rank0 MR14 =0x1c
2922 13:25:17.765070
2923 13:25:17.765144 Final TX Range 0 Vref 28
2924 13:25:17.765215
2925 13:25:17.771835 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2926 13:25:17.771911
2927 13:25:17.778313 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2928 13:25:17.784894 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2929 13:25:17.795086 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2930 13:25:17.795164 Write Rank0 MR3 =0xb0
2931 13:25:17.798264 DramC Write-DBI on
2932 13:25:17.798341 ==
2933 13:25:17.801743 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2934 13:25:17.804929 fsp= 1, odt_onoff= 1, Byte mode= 0
2935 13:25:17.805006 ==
2936 13:25:17.811003 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2937 13:25:17.811080
2938 13:25:17.811156 Begin, DQ Scan Range 710~774
2939 13:25:17.814513
2940 13:25:17.814590
2941 13:25:17.814667 TX Vref Scan disable
2942 13:25:17.818112 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2943 13:25:17.820924 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2944 13:25:17.824384 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2945 13:25:17.827966 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2946 13:25:17.831299 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2947 13:25:17.838124 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2948 13:25:17.840717 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2949 13:25:17.844583 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2950 13:25:17.847468 718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2951 13:25:17.850844 719 |2 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2952 13:25:17.854236 720 |2 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2953 13:25:17.857737 721 |2 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2954 13:25:17.860566 722 |2 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2955 13:25:17.863960 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2956 13:25:17.867399 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2957 13:25:17.870949 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
2958 13:25:17.873565 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
2959 13:25:17.876911 727 |2 6 23|[0] xxxxxxxx oooooooo [MSB]
2960 13:25:17.886290 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2961 13:25:17.889837 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2962 13:25:17.893136 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2963 13:25:17.896768 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2964 13:25:17.899847 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
2965 13:25:17.902793 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
2966 13:25:17.906040 753 |2 6 49|[0] oooooooo xxxxxxxx [MSB]
2967 13:25:17.909412 754 |2 6 50|[0] xxxxxxxx xxxxxxxx [MSB]
2968 13:25:17.912938 Byte0, DQ PI dly=740, DQM PI dly= 740
2969 13:25:17.915898 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 36)
2970 13:25:17.919476
2971 13:25:17.922841 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 36)
2972 13:25:17.922921
2973 13:25:17.926188 Byte1, DQ PI dly=734, DQM PI dly= 734
2974 13:25:17.928886 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 30)
2975 13:25:17.928963
2976 13:25:17.935734 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 30)
2977 13:25:17.935812
2978 13:25:17.942504 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2979 13:25:17.948970 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2980 13:25:17.955540 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2981 13:25:17.955617 Write Rank0 MR3 =0x30
2982 13:25:17.958975 DramC Write-DBI off
2983 13:25:17.959053
2984 13:25:17.959129 [DATLAT]
2985 13:25:17.961739 Freq=1600, CH1 RK0, use_rxtx_scan=0
2986 13:25:17.961816
2987 13:25:17.965149 DATLAT Default: 0xf
2988 13:25:17.965227 7, 0xFFFF, sum=0
2989 13:25:17.968642 8, 0xFFFF, sum=0
2990 13:25:17.968720 9, 0xFFFF, sum=0
2991 13:25:17.972129 10, 0xFFFF, sum=0
2992 13:25:17.972208 11, 0xFFFF, sum=0
2993 13:25:17.975474 12, 0xFFFF, sum=0
2994 13:25:17.975552 13, 0xFFFF, sum=0
2995 13:25:17.978720 14, 0x0, sum=1
2996 13:25:17.978798 15, 0x0, sum=2
2997 13:25:17.981532 16, 0x0, sum=3
2998 13:25:17.981610 17, 0x0, sum=4
2999 13:25:17.984786 pattern=2 first_step=14 total pass=5 best_step=16
3000 13:25:17.984863 ==
3001 13:25:17.991626 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3002 13:25:17.995053 fsp= 1, odt_onoff= 1, Byte mode= 0
3003 13:25:17.995130 ==
3004 13:25:17.998204 Start DQ dly to find pass range UseTestEngine =1
3005 13:25:18.001411 x-axis: bit #, y-axis: DQ dly (-127~63)
3006 13:25:18.004621 RX Vref Scan = 1
3007 13:25:18.111806
3008 13:25:18.111916 RX Vref found, early break!
3009 13:25:18.111996
3010 13:25:18.117864 Final RX Vref 11, apply to both rank0 and 1
3011 13:25:18.117943 ==
3012 13:25:18.121407 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3013 13:25:18.124271 fsp= 1, odt_onoff= 1, Byte mode= 0
3014 13:25:18.124349 ==
3015 13:25:18.127551 DQS Delay:
3016 13:25:18.127628 DQS0 = 0, DQS1 = 0
3017 13:25:18.127705 DQM Delay:
3018 13:25:18.131424 DQM0 = 20, DQM1 = 19
3019 13:25:18.131501 DQ Delay:
3020 13:25:18.134555 DQ0 =22, DQ1 =20, DQ2 =19, DQ3 =16
3021 13:25:18.137884 DQ4 =20, DQ5 =22, DQ6 =24, DQ7 =21
3022 13:25:18.141324 DQ8 =17, DQ9 =17, DQ10 =21, DQ11 =21
3023 13:25:18.143905 DQ12 =22, DQ13 =21, DQ14 =22, DQ15 =14
3024 13:25:18.143981
3025 13:25:18.144057
3026 13:25:18.144129
3027 13:25:18.147820 [DramC_TX_OE_Calibration] TA2
3028 13:25:18.151075 Original DQ_B0 (3 6) =30, OEN = 27
3029 13:25:18.154230 Original DQ_B1 (3 6) =30, OEN = 27
3030 13:25:18.157496 23, 0x0, End_B0=23 End_B1=23
3031 13:25:18.160661 24, 0x0, End_B0=24 End_B1=24
3032 13:25:18.160739 25, 0x0, End_B0=25 End_B1=25
3033 13:25:18.163698 26, 0x0, End_B0=26 End_B1=26
3034 13:25:18.167220 27, 0x0, End_B0=27 End_B1=27
3035 13:25:18.170641 28, 0x0, End_B0=28 End_B1=28
3036 13:25:18.173958 29, 0x0, End_B0=29 End_B1=29
3037 13:25:18.174059 30, 0x0, End_B0=30 End_B1=30
3038 13:25:18.176815 31, 0xFFFF, End_B0=30 End_B1=30
3039 13:25:18.183282 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3040 13:25:18.190157 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3041 13:25:18.190233
3042 13:25:18.190307
3043 13:25:18.190376 Write Rank0 MR23 =0x3f
3044 13:25:18.193345 [DQSOSC]
3045 13:25:18.200083 [DQSOSCAuto] RK0, (LSB)MR18= 0xabab, (MSB)MR19= 0x202, tDQSOscB0 = 461 ps tDQSOscB1 = 461 ps
3046 13:25:18.206339 CH1_RK0: MR19=0x202, MR18=0xABAB, DQSOSC=461, MR23=63, INC=11, DEC=17
3047 13:25:18.209787 Write Rank0 MR23 =0x3f
3048 13:25:18.209862 [DQSOSC]
3049 13:25:18.216422 [DQSOSCAuto] RK0, (LSB)MR18= 0xadad, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps
3050 13:25:18.219658 CH1 RK0: MR19=202, MR18=ADAD
3051 13:25:18.223077 [RankSwap] Rank num 2, (Multi 1), Rank 1
3052 13:25:18.225901 Write Rank0 MR2 =0xad
3053 13:25:18.225976 [Write Leveling]
3054 13:25:18.229338 delay byte0 byte1 byte2 byte3
3055 13:25:18.229428
3056 13:25:18.232654 10 0 0
3057 13:25:18.232745 11 0 0
3058 13:25:18.232833 12 0 0
3059 13:25:18.235981 13 0 0
3060 13:25:18.236071 14 0 0
3061 13:25:18.239226 15 0 0
3062 13:25:18.239318 16 0 0
3063 13:25:18.242365 17 0 0
3064 13:25:18.242456 18 0 0
3065 13:25:18.242543 19 0 0
3066 13:25:18.245743 20 0 0
3067 13:25:18.245819 21 0 0
3068 13:25:18.249106 22 0 0
3069 13:25:18.249210 23 0 0
3070 13:25:18.252148 24 0 0
3071 13:25:18.252238 25 0 0
3072 13:25:18.252326 26 0 0
3073 13:25:18.256068 27 0 0
3074 13:25:18.256159 28 0 0
3075 13:25:18.258669 29 0 ff
3076 13:25:18.258759 30 0 ff
3077 13:25:18.262162 31 0 ff
3078 13:25:18.262253 32 0 ff
3079 13:25:18.262341 33 0 ff
3080 13:25:18.265398 34 ff ff
3081 13:25:18.265488 35 ff ff
3082 13:25:18.268789 36 ff ff
3083 13:25:18.268879 37 ff ff
3084 13:25:18.272164 38 ff ff
3085 13:25:18.272240 39 ff ff
3086 13:25:18.275340 40 ff ff
3087 13:25:18.278658 pass bytecount = 0xff (0xff: all bytes pass)
3088 13:25:18.278733
3089 13:25:18.278791 DQS0 dly: 34
3090 13:25:18.281929 DQS1 dly: 29
3091 13:25:18.282011 Write Rank0 MR2 =0x2d
3092 13:25:18.285627 [RankSwap] Rank num 2, (Multi 1), Rank 0
3093 13:25:18.288803 Write Rank1 MR1 =0xd6
3094 13:25:18.288878 [Gating]
3095 13:25:18.288935 ==
3096 13:25:18.295074 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3097 13:25:18.298395 fsp= 1, odt_onoff= 1, Byte mode= 0
3098 13:25:18.298471 ==
3099 13:25:18.301561 3 1 0 |2c2b 302f |(11 11)(11 11) |(1 1)(1 1)| 0
3100 13:25:18.308826 3 1 4 |2c2b 2c2c |(11 11)(11 11) |(1 1)(0 0)| 0
3101 13:25:18.311596 3 1 8 |2c2b 3636 |(11 11)(0 0) |(1 1)(1 1)| 0
3102 13:25:18.314992 3 1 12 |2c2b 3636 |(11 11)(0 0) |(0 0)(1 1)| 0
3103 13:25:18.318414 3 1 16 |2c2b 1d1c |(11 11)(11 11) |(1 0)(0 0)| 0
3104 13:25:18.324805 3 1 20 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
3105 13:25:18.328128 3 1 24 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
3106 13:25:18.331568 [Byte 1] Lead/lag Transition tap number (1)
3107 13:25:18.337635 3 1 28 |2c2b 2929 |(11 11)(11 11) |(1 0)(0 0)| 0
3108 13:25:18.341588 3 2 0 |2c2b 3434 |(11 11)(0 0) |(1 0)(0 0)| 0
3109 13:25:18.344422 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
3110 13:25:18.350993 3 2 8 |2c2b 1a1a |(11 11)(11 11) |(1 0)(0 0)| 0
3111 13:25:18.354307 3 2 12 |2c2b 2828 |(11 11)(11 11) |(1 0)(1 1)| 0
3112 13:25:18.357518 3 2 16 |2c2b 3130 |(11 11)(11 11) |(0 0)(0 0)| 0
3113 13:25:18.363990 3 2 20 |303 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
3114 13:25:18.367307 3 2 24 |3534 807 |(11 11)(11 11) |(0 0)(0 1)| 0
3115 13:25:18.370707 3 2 28 |3534 3b3a |(11 11)(11 11) |(0 0)(0 0)| 0
3116 13:25:18.373937 3 3 0 |3534 3838 |(11 11)(0 0) |(0 0)(1 1)| 0
3117 13:25:18.380788 3 3 4 |3534 3d3d |(11 11)(0 0) |(0 0)(1 1)| 0
3118 13:25:18.383474 3 3 8 |3534 2322 |(11 11)(11 11) |(1 1)(1 1)| 0
3119 13:25:18.386923 3 3 12 |3534 3d3d |(11 11)(0 0) |(0 0)(1 1)| 0
3120 13:25:18.393618 3 3 16 |3534 1c1c |(11 11)(11 11) |(1 1)(1 1)| 0
3121 13:25:18.397037 3 3 20 |3534 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3122 13:25:18.399876 [Byte 0] Lead/lag Transition tap number (1)
3123 13:25:18.403335 3 3 24 |3534 e0e |(11 11)(11 11) |(0 0)(1 1)| 0
3124 13:25:18.409984 3 3 28 |3534 2f2e |(11 11)(11 11) |(0 0)(1 1)| 0
3125 13:25:18.413250 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
3126 13:25:18.416816 [Byte 1] Lead/lag Transition tap number (1)
3127 13:25:18.423034 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3128 13:25:18.426516 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3129 13:25:18.429561 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3130 13:25:18.436464 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3131 13:25:18.439747 3 4 20 |505 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3132 13:25:18.443090 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3133 13:25:18.449445 3 4 28 |3d3d 3d3d |(11 11)(10 11) |(1 1)(1 1)| 0
3134 13:25:18.452926 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3135 13:25:18.456109 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3136 13:25:18.462308 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3137 13:25:18.465569 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3138 13:25:18.469250 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3139 13:25:18.475293 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3140 13:25:18.479278 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3141 13:25:18.482012 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3142 13:25:18.485407 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3143 13:25:18.492247 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3144 13:25:18.495567 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3145 13:25:18.499027 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3146 13:25:18.505255 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3147 13:25:18.508736 [Byte 0] Lead/lag Transition tap number (2)
3148 13:25:18.511905 [Byte 1] Lead/lag falling Transition (3, 6, 12)
3149 13:25:18.518772 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3150 13:25:18.521416 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3151 13:25:18.524835 [Byte 1] Lead/lag Transition tap number (3)
3152 13:25:18.528263 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3153 13:25:18.531696 [Byte 0]First pass (3, 6, 24)
3154 13:25:18.534859 3 6 28 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
3155 13:25:18.541202 3 7 0 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
3156 13:25:18.544286 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3157 13:25:18.547742 [Byte 1]First pass (3, 7, 4)
3158 13:25:18.551077 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3159 13:25:18.554256 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3160 13:25:18.557959 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3161 13:25:18.564568 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3162 13:25:18.567615 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3163 13:25:18.570677 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3164 13:25:18.573707 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3165 13:25:18.577222 4 0 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3166 13:25:18.583884 All bytes gating window > 1UI, Early break!
3167 13:25:18.583993
3168 13:25:18.587120 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
3169 13:25:18.587210
3170 13:25:18.590585 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
3171 13:25:18.590656
3172 13:25:18.590720
3173 13:25:18.590774
3174 13:25:18.593308 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
3175 13:25:18.593370
3176 13:25:18.600497 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
3177 13:25:18.600593
3178 13:25:18.600678
3179 13:25:18.600757 Write Rank1 MR1 =0x56
3180 13:25:18.600840
3181 13:25:18.603326 best RODT dly(2T, 0.5T) = (2, 3)
3182 13:25:18.603390
3183 13:25:18.606872 best RODT dly(2T, 0.5T) = (2, 3)
3184 13:25:18.606962 ==
3185 13:25:18.613652 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3186 13:25:18.616347 fsp= 1, odt_onoff= 1, Byte mode= 0
3187 13:25:18.616417 ==
3188 13:25:18.619595 Start DQ dly to find pass range UseTestEngine =0
3189 13:25:18.622985 x-axis: bit #, y-axis: DQ dly (-127~63)
3190 13:25:18.626449 RX Vref Scan = 0
3191 13:25:18.629845 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3192 13:25:18.629942 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3193 13:25:18.632635 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3194 13:25:18.635998 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3195 13:25:18.639433 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3196 13:25:18.642652 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3197 13:25:18.646152 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3198 13:25:18.649592 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3199 13:25:18.652389 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3200 13:25:18.655848 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3201 13:25:18.658968 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3202 13:25:18.659036 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3203 13:25:18.662600 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3204 13:25:18.665841 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3205 13:25:18.669018 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3206 13:25:18.672051 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3207 13:25:18.675811 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3208 13:25:18.678745 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3209 13:25:18.682318 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3210 13:25:18.682396 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3211 13:25:18.685334 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3212 13:25:18.689020 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3213 13:25:18.691627 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3214 13:25:18.695192 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3215 13:25:18.698538 -2, [0] xxxxxxxx xxxxxxxx [MSB]
3216 13:25:18.702019 -1, [0] xxxxxxxx xxxxxxxo [MSB]
3217 13:25:18.705045 0, [0] xxxoxxxx xxxxxxxo [MSB]
3218 13:25:18.705122 1, [0] xxxoxxxx xxxxxxxo [MSB]
3219 13:25:18.708341 2, [0] xxxoxxxx ooxxxxxo [MSB]
3220 13:25:18.711296 3, [0] xxoooxxo ooxxxxxo [MSB]
3221 13:25:18.715130 4, [0] xooooxxo oooxxxxo [MSB]
3222 13:25:18.717849 5, [0] xooooxxo oooxxxxo [MSB]
3223 13:25:18.721256 32, [0] oooooooo ooooooox [MSB]
3224 13:25:18.724701 33, [0] oooxoooo ooooooox [MSB]
3225 13:25:18.724778 34, [0] oooxoooo ooooooox [MSB]
3226 13:25:18.728081 35, [0] ooxxoooo xoooooox [MSB]
3227 13:25:18.731552 36, [0] ooxxoooo xxooooox [MSB]
3228 13:25:18.734359 37, [0] ooxxoooo xxooooox [MSB]
3229 13:25:18.737703 38, [0] xxxxooox xxooooox [MSB]
3230 13:25:18.741180 39, [0] xxxxxoox xxxoxoox [MSB]
3231 13:25:18.744556 40, [0] xxxxxoox xxxoxoox [MSB]
3232 13:25:18.744633 41, [0] xxxxxxxx xxxxxxxx [MSB]
3233 13:25:18.750690 iDelay=41, Bit 0, Center 21 (6 ~ 37) 32
3234 13:25:18.754188 iDelay=41, Bit 1, Center 20 (4 ~ 37) 34
3235 13:25:18.757555 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3236 13:25:18.760990 iDelay=41, Bit 3, Center 16 (0 ~ 32) 33
3237 13:25:18.764288 iDelay=41, Bit 4, Center 20 (3 ~ 38) 36
3238 13:25:18.767489 iDelay=41, Bit 5, Center 23 (6 ~ 40) 35
3239 13:25:18.770918 iDelay=41, Bit 6, Center 23 (6 ~ 40) 35
3240 13:25:18.773569 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
3241 13:25:18.776878 iDelay=41, Bit 8, Center 18 (2 ~ 34) 33
3242 13:25:18.780254 iDelay=41, Bit 9, Center 18 (2 ~ 35) 34
3243 13:25:18.783559 iDelay=41, Bit 10, Center 21 (4 ~ 38) 35
3244 13:25:18.786942 iDelay=41, Bit 11, Center 23 (6 ~ 40) 35
3245 13:25:18.793309 iDelay=41, Bit 12, Center 22 (6 ~ 38) 33
3246 13:25:18.796768 iDelay=41, Bit 13, Center 23 (6 ~ 40) 35
3247 13:25:18.800082 iDelay=41, Bit 14, Center 23 (6 ~ 40) 35
3248 13:25:18.803506 iDelay=41, Bit 15, Center 15 (-1 ~ 31) 33
3249 13:25:18.803595 ==
3250 13:25:18.810126 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3251 13:25:18.810222 fsp= 1, odt_onoff= 1, Byte mode= 0
3252 13:25:18.813338 ==
3253 13:25:18.813406 DQS Delay:
3254 13:25:18.813461 DQS0 = 0, DQS1 = 0
3255 13:25:18.816543 DQM Delay:
3256 13:25:18.816618 DQM0 = 20, DQM1 = 20
3257 13:25:18.819568 DQ Delay:
3258 13:25:18.823072 DQ0 =21, DQ1 =20, DQ2 =18, DQ3 =16
3259 13:25:18.823146 DQ4 =20, DQ5 =23, DQ6 =23, DQ7 =20
3260 13:25:18.826384 DQ8 =18, DQ9 =18, DQ10 =21, DQ11 =23
3261 13:25:18.832705 DQ12 =22, DQ13 =23, DQ14 =23, DQ15 =15
3262 13:25:18.832780
3263 13:25:18.832838
3264 13:25:18.832891 DramC Write-DBI off
3265 13:25:18.832943 ==
3266 13:25:18.839454 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3267 13:25:18.843137 fsp= 1, odt_onoff= 1, Byte mode= 0
3268 13:25:18.843215 ==
3269 13:25:18.845896 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3270 13:25:18.845970
3271 13:25:18.849308 Begin, DQ Scan Range 925~1181
3272 13:25:18.849382
3273 13:25:18.849439
3274 13:25:18.852617 TX Vref Scan disable
3275 13:25:18.856073 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3276 13:25:18.859600 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3277 13:25:18.862387 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3278 13:25:18.865901 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3279 13:25:18.869194 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3280 13:25:18.872386 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3281 13:25:18.875886 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3282 13:25:18.878668 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3283 13:25:18.881961 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3284 13:25:18.885546 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3285 13:25:18.892262 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3286 13:25:18.895578 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3287 13:25:18.898831 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3288 13:25:18.902131 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3289 13:25:18.905805 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3290 13:25:18.908877 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3291 13:25:18.911445 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3292 13:25:18.914890 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3293 13:25:18.918337 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3294 13:25:18.921603 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3295 13:25:18.924952 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3296 13:25:18.928330 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3297 13:25:18.931169 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3298 13:25:18.937843 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3299 13:25:18.941351 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3300 13:25:18.944570 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3301 13:25:18.947611 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3302 13:25:18.950680 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3303 13:25:18.954232 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3304 13:25:18.957198 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3305 13:25:18.960819 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3306 13:25:18.963976 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3307 13:25:18.967030 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3308 13:25:18.970472 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3309 13:25:18.973526 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3310 13:25:18.980337 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3311 13:25:18.983525 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3312 13:25:18.986782 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3313 13:25:18.990153 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3314 13:25:18.993016 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3315 13:25:18.996446 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3316 13:25:18.999684 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3317 13:25:19.003150 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3318 13:25:19.006420 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3319 13:25:19.009613 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3320 13:25:19.012830 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3321 13:25:19.016094 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3322 13:25:19.019478 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3323 13:25:19.022254 973 |3 6 13|[0] xxxxxxxx oxxxxxxo [MSB]
3324 13:25:19.025484 974 |3 6 14|[0] xxxxxxxx ooxxxxxo [MSB]
3325 13:25:19.032361 975 |3 6 15|[0] xxxxxxxx ooxxxxxo [MSB]
3326 13:25:19.035629 976 |3 6 16|[0] xxxxxxxx ooxxxxxo [MSB]
3327 13:25:19.039084 977 |3 6 17|[0] xxxxxxxx ooooxxxo [MSB]
3328 13:25:19.042402 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
3329 13:25:19.045090 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3330 13:25:19.048527 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3331 13:25:19.052003 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3332 13:25:19.055488 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
3333 13:25:19.058751 983 |3 6 23|[0] xxxxxxxo oooooooo [MSB]
3334 13:25:19.065354 992 |3 6 32|[0] oooooooo ooooooox [MSB]
3335 13:25:19.068543 993 |3 6 33|[0] oooooooo oxooooox [MSB]
3336 13:25:19.071513 994 |3 6 34|[0] oooooooo oxooooox [MSB]
3337 13:25:19.074864 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3338 13:25:19.078566 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3339 13:25:19.081485 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3340 13:25:19.084982 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3341 13:25:19.088286 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
3342 13:25:19.091727 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3343 13:25:19.094665 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3344 13:25:19.098393 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
3345 13:25:19.104666 1003 |3 6 43|[0] ooxxoooo xxxxxxxx [MSB]
3346 13:25:19.107779 1004 |3 6 44|[0] oxxxooox xxxxxxxx [MSB]
3347 13:25:19.111056 1005 |3 6 45|[0] xxxxxxxx xxxxxxxx [MSB]
3348 13:25:19.114393 Byte0, DQ PI dly=992, DQM PI dly= 992
3349 13:25:19.117559 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
3350 13:25:19.117634
3351 13:25:19.120735 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
3352 13:25:19.124101
3353 13:25:19.127543 Byte1, DQ PI dly=984, DQM PI dly= 984
3354 13:25:19.130948 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
3355 13:25:19.131024
3356 13:25:19.134254 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
3357 13:25:19.134329
3358 13:25:19.134386 ==
3359 13:25:19.140452 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3360 13:25:19.143920 fsp= 1, odt_onoff= 1, Byte mode= 0
3361 13:25:19.143996 ==
3362 13:25:19.147065 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3363 13:25:19.147140
3364 13:25:19.150377 Begin, DQ Scan Range 960~1024
3365 13:25:19.153844 Write Rank1 MR14 =0x0
3366 13:25:19.160668
3367 13:25:19.160742 CH=1, VrefRange= 0, VrefLevel = 0
3368 13:25:19.167503 TX Bit0 (986~999) 14 992, Bit8 (977~990) 14 983,
3369 13:25:19.170950 TX Bit1 (984~998) 15 991, Bit9 (978~987) 10 982,
3370 13:25:19.177097 TX Bit2 (983~997) 15 990, Bit10 (979~992) 14 985,
3371 13:25:19.180458 TX Bit3 (981~994) 14 987, Bit11 (980~992) 13 986,
3372 13:25:19.183833 TX Bit4 (984~998) 15 991, Bit12 (980~992) 13 986,
3373 13:25:19.190405 TX Bit5 (985~999) 15 992, Bit13 (981~993) 13 987,
3374 13:25:19.193787 TX Bit6 (984~999) 16 991, Bit14 (980~992) 13 986,
3375 13:25:19.200163 TX Bit7 (984~999) 16 991, Bit15 (975~984) 10 979,
3376 13:25:19.200239
3377 13:25:19.200296 Write Rank1 MR14 =0x2
3378 13:25:19.208866
3379 13:25:19.208941 CH=1, VrefRange= 0, VrefLevel = 2
3380 13:25:19.215507 TX Bit0 (985~999) 15 992, Bit8 (977~991) 15 984,
3381 13:25:19.218761 TX Bit1 (984~999) 16 991, Bit9 (977~988) 12 982,
3382 13:25:19.225400 TX Bit2 (983~998) 16 990, Bit10 (979~993) 15 986,
3383 13:25:19.228457 TX Bit3 (981~995) 15 988, Bit11 (980~993) 14 986,
3384 13:25:19.232023 TX Bit4 (984~999) 16 991, Bit12 (979~993) 15 986,
3385 13:25:19.238390 TX Bit5 (985~999) 15 992, Bit13 (980~994) 15 987,
3386 13:25:19.242131 TX Bit6 (984~999) 16 991, Bit14 (979~992) 14 985,
3387 13:25:19.248219 TX Bit7 (984~999) 16 991, Bit15 (973~985) 13 979,
3388 13:25:19.248297
3389 13:25:19.248354 Write Rank1 MR14 =0x4
3390 13:25:19.256940
3391 13:25:19.257015 CH=1, VrefRange= 0, VrefLevel = 4
3392 13:25:19.263973 TX Bit0 (985~1000) 16 992, Bit8 (976~991) 16 983,
3393 13:25:19.267278 TX Bit1 (984~999) 16 991, Bit9 (977~989) 13 983,
3394 13:25:19.273549 TX Bit2 (982~998) 17 990, Bit10 (979~993) 15 986,
3395 13:25:19.276938 TX Bit3 (980~996) 17 988, Bit11 (979~993) 15 986,
3396 13:25:19.280326 TX Bit4 (984~1000) 17 992, Bit12 (979~993) 15 986,
3397 13:25:19.287066 TX Bit5 (985~1000) 16 992, Bit13 (980~994) 15 987,
3398 13:25:19.290315 TX Bit6 (984~1000) 17 992, Bit14 (979~993) 15 986,
3399 13:25:19.296404 TX Bit7 (984~1000) 17 992, Bit15 (973~986) 14 979,
3400 13:25:19.296481
3401 13:25:19.296539 Write Rank1 MR14 =0x6
3402 13:25:19.305871
3403 13:25:19.305946 CH=1, VrefRange= 0, VrefLevel = 6
3404 13:25:19.312741 TX Bit0 (985~1001) 17 993, Bit8 (976~992) 17 984,
3405 13:25:19.316183 TX Bit1 (984~1000) 17 992, Bit9 (976~990) 15 983,
3406 13:25:19.322255 TX Bit2 (982~999) 18 990, Bit10 (978~994) 17 986,
3407 13:25:19.325609 TX Bit3 (979~997) 19 988, Bit11 (979~994) 16 986,
3408 13:25:19.329159 TX Bit4 (984~1000) 17 992, Bit12 (979~994) 16 986,
3409 13:25:19.335634 TX Bit5 (985~1000) 16 992, Bit13 (980~995) 16 987,
3410 13:25:19.338932 TX Bit6 (984~1000) 17 992, Bit14 (979~994) 16 986,
3411 13:25:19.345177 TX Bit7 (984~1000) 17 992, Bit15 (972~987) 16 979,
3412 13:25:19.345252
3413 13:25:19.345310 Write Rank1 MR14 =0x8
3414 13:25:19.355171
3415 13:25:19.355247 CH=1, VrefRange= 0, VrefLevel = 8
3416 13:25:19.361923 TX Bit0 (985~1002) 18 993, Bit8 (975~992) 18 983,
3417 13:25:19.364843 TX Bit1 (984~1000) 17 992, Bit9 (976~990) 15 983,
3418 13:25:19.371391 TX Bit2 (982~999) 18 990, Bit10 (978~995) 18 986,
3419 13:25:19.374851 TX Bit3 (979~997) 19 988, Bit11 (979~995) 17 987,
3420 13:25:19.377992 TX Bit4 (983~1001) 19 992, Bit12 (979~994) 16 986,
3421 13:25:19.384948 TX Bit5 (984~1002) 19 993, Bit13 (979~996) 18 987,
3422 13:25:19.387640 TX Bit6 (984~1002) 19 993, Bit14 (978~994) 17 986,
3423 13:25:19.394106 TX Bit7 (984~1001) 18 992, Bit15 (972~988) 17 980,
3424 13:25:19.394176
3425 13:25:19.394235 Write Rank1 MR14 =0xa
3426 13:25:19.404720
3427 13:25:19.408252 CH=1, VrefRange= 0, VrefLevel = 10
3428 13:25:19.411191 TX Bit0 (985~1003) 19 994, Bit8 (975~992) 18 983,
3429 13:25:19.414469 TX Bit1 (984~1001) 18 992, Bit9 (975~991) 17 983,
3430 13:25:19.421125 TX Bit2 (982~1000) 19 991, Bit10 (978~995) 18 986,
3431 13:25:19.423834 TX Bit3 (979~997) 19 988, Bit11 (978~995) 18 986,
3432 13:25:19.430648 TX Bit4 (983~1002) 20 992, Bit12 (978~995) 18 986,
3433 13:25:19.434090 TX Bit5 (984~1003) 20 993, Bit13 (979~996) 18 987,
3434 13:25:19.437347 TX Bit6 (983~1002) 20 992, Bit14 (979~995) 17 987,
3435 13:25:19.443544 TX Bit7 (984~1002) 19 993, Bit15 (972~989) 18 980,
3436 13:25:19.443619
3437 13:25:19.443677 Write Rank1 MR14 =0xc
3438 13:25:19.454112
3439 13:25:19.457311 CH=1, VrefRange= 0, VrefLevel = 12
3440 13:25:19.460818 TX Bit0 (985~1004) 20 994, Bit8 (976~993) 18 984,
3441 13:25:19.464011 TX Bit1 (983~1002) 20 992, Bit9 (974~991) 18 982,
3442 13:25:19.470209 TX Bit2 (981~1000) 20 990, Bit10 (978~996) 19 987,
3443 13:25:19.473491 TX Bit3 (978~998) 21 988, Bit11 (978~996) 19 987,
3444 13:25:19.480277 TX Bit4 (983~1003) 21 993, Bit12 (978~996) 19 987,
3445 13:25:19.483413 TX Bit5 (984~1004) 21 994, Bit13 (979~997) 19 988,
3446 13:25:19.486518 TX Bit6 (983~1003) 21 993, Bit14 (979~996) 18 987,
3447 13:25:19.493087 TX Bit7 (984~1002) 19 993, Bit15 (971~990) 20 980,
3448 13:25:19.493162
3449 13:25:19.493220 Write Rank1 MR14 =0xe
3450 13:25:19.503663
3451 13:25:19.506932 CH=1, VrefRange= 0, VrefLevel = 14
3452 13:25:19.510318 TX Bit0 (984~1004) 21 994, Bit8 (973~993) 21 983,
3453 13:25:19.513706 TX Bit1 (983~1002) 20 992, Bit9 (974~992) 19 983,
3454 13:25:19.520169 TX Bit2 (982~1001) 20 991, Bit10 (977~996) 20 986,
3455 13:25:19.523747 TX Bit3 (978~999) 22 988, Bit11 (978~996) 19 987,
3456 13:25:19.530206 TX Bit4 (983~1003) 21 993, Bit12 (978~996) 19 987,
3457 13:25:19.533063 TX Bit5 (984~1004) 21 994, Bit13 (979~998) 20 988,
3458 13:25:19.536434 TX Bit6 (983~1003) 21 993, Bit14 (978~996) 19 987,
3459 13:25:19.542998 TX Bit7 (983~1003) 21 993, Bit15 (971~991) 21 981,
3460 13:25:19.543073
3461 13:25:19.543133 Write Rank1 MR14 =0x10
3462 13:25:19.553382
3463 13:25:19.556846 CH=1, VrefRange= 0, VrefLevel = 16
3464 13:25:19.560221 TX Bit0 (984~1005) 22 994, Bit8 (973~994) 22 983,
3465 13:25:19.563617 TX Bit1 (983~1003) 21 993, Bit9 (974~992) 19 983,
3466 13:25:19.569937 TX Bit2 (980~1002) 23 991, Bit10 (977~997) 21 987,
3467 13:25:19.573234 TX Bit3 (978~999) 22 988, Bit11 (978~998) 21 988,
3468 13:25:19.579591 TX Bit4 (982~1004) 23 993, Bit12 (978~997) 20 987,
3469 13:25:19.583332 TX Bit5 (984~1005) 22 994, Bit13 (978~999) 22 988,
3470 13:25:19.586362 TX Bit6 (983~1004) 22 993, Bit14 (978~997) 20 987,
3471 13:25:19.593100 TX Bit7 (983~1004) 22 993, Bit15 (971~991) 21 981,
3472 13:25:19.593176
3473 13:25:19.593234 Write Rank1 MR14 =0x12
3474 13:25:19.603823
3475 13:25:19.606872 CH=1, VrefRange= 0, VrefLevel = 18
3476 13:25:19.609843 TX Bit0 (984~1005) 22 994, Bit8 (973~994) 22 983,
3477 13:25:19.613240 TX Bit1 (982~1004) 23 993, Bit9 (973~992) 20 982,
3478 13:25:19.619999 TX Bit2 (980~1002) 23 991, Bit10 (977~998) 22 987,
3479 13:25:19.623296 TX Bit3 (978~999) 22 988, Bit11 (977~998) 22 987,
3480 13:25:19.629745 TX Bit4 (982~1005) 24 993, Bit12 (978~998) 21 988,
3481 13:25:19.633040 TX Bit5 (984~1005) 22 994, Bit13 (978~999) 22 988,
3482 13:25:19.636725 TX Bit6 (982~1004) 23 993, Bit14 (978~998) 21 988,
3483 13:25:19.643048 TX Bit7 (983~1004) 22 993, Bit15 (971~992) 22 981,
3484 13:25:19.643126
3485 13:25:19.643184 Write Rank1 MR14 =0x14
3486 13:25:19.653255
3487 13:25:19.656849 CH=1, VrefRange= 0, VrefLevel = 20
3488 13:25:19.660226 TX Bit0 (984~1005) 22 994, Bit8 (973~995) 23 984,
3489 13:25:19.662945 TX Bit1 (982~1005) 24 993, Bit9 (973~993) 21 983,
3490 13:25:19.669931 TX Bit2 (980~1003) 24 991, Bit10 (976~999) 24 987,
3491 13:25:19.673365 TX Bit3 (977~1000) 24 988, Bit11 (977~999) 23 988,
3492 13:25:19.679419 TX Bit4 (982~1005) 24 993, Bit12 (977~998) 22 987,
3493 13:25:19.682646 TX Bit5 (984~1005) 22 994, Bit13 (977~999) 23 988,
3494 13:25:19.685925 TX Bit6 (982~1005) 24 993, Bit14 (977~999) 23 988,
3495 13:25:19.692923 TX Bit7 (982~1005) 24 993, Bit15 (971~992) 22 981,
3496 13:25:19.692999
3497 13:25:19.695877 Write Rank1 MR14 =0x16
3498 13:25:19.703278
3499 13:25:19.706788 CH=1, VrefRange= 0, VrefLevel = 22
3500 13:25:19.710298 TX Bit0 (984~1005) 22 994, Bit8 (972~996) 25 984,
3501 13:25:19.713079 TX Bit1 (982~1005) 24 993, Bit9 (972~993) 22 982,
3502 13:25:19.719987 TX Bit2 (980~1004) 25 992, Bit10 (976~999) 24 987,
3503 13:25:19.723266 TX Bit3 (977~1000) 24 988, Bit11 (976~999) 24 987,
3504 13:25:19.729673 TX Bit4 (982~1005) 24 993, Bit12 (977~999) 23 988,
3505 13:25:19.732679 TX Bit5 (983~1005) 23 994, Bit13 (977~1000) 24 988,
3506 13:25:19.736234 TX Bit6 (982~1005) 24 993, Bit14 (977~999) 23 988,
3507 13:25:19.742662 TX Bit7 (982~1005) 24 993, Bit15 (971~992) 22 981,
3508 13:25:19.742739
3509 13:25:19.746585 Write Rank1 MR14 =0x18
3510 13:25:19.753386
3511 13:25:19.757077 CH=1, VrefRange= 0, VrefLevel = 24
3512 13:25:19.759984 TX Bit0 (983~1006) 24 994, Bit8 (972~996) 25 984,
3513 13:25:19.763777 TX Bit1 (982~1005) 24 993, Bit9 (972~994) 23 983,
3514 13:25:19.770258 TX Bit2 (979~1004) 26 991, Bit10 (976~999) 24 987,
3515 13:25:19.772948 TX Bit3 (977~1000) 24 988, Bit11 (976~1000) 25 988,
3516 13:25:19.779698 TX Bit4 (981~1006) 26 993, Bit12 (977~999) 23 988,
3517 13:25:19.783125 TX Bit5 (983~1006) 24 994, Bit13 (977~1000) 24 988,
3518 13:25:19.786553 TX Bit6 (981~1006) 26 993, Bit14 (977~999) 23 988,
3519 13:25:19.793024 TX Bit7 (982~1005) 24 993, Bit15 (970~993) 24 981,
3520 13:25:19.793120
3521 13:25:19.795826 Write Rank1 MR14 =0x1a
3522 13:25:19.804043
3523 13:25:19.807164 CH=1, VrefRange= 0, VrefLevel = 26
3524 13:25:19.810572 TX Bit0 (983~1006) 24 994, Bit8 (972~997) 26 984,
3525 13:25:19.814172 TX Bit1 (981~1006) 26 993, Bit9 (972~994) 23 983,
3526 13:25:19.820224 TX Bit2 (979~1005) 27 992, Bit10 (975~1000) 26 987,
3527 13:25:19.823706 TX Bit3 (977~1002) 26 989, Bit11 (976~1000) 25 988,
3528 13:25:19.830095 TX Bit4 (981~1006) 26 993, Bit12 (976~1000) 25 988,
3529 13:25:19.833401 TX Bit5 (983~1006) 24 994, Bit13 (977~1000) 24 988,
3530 13:25:19.840156 TX Bit6 (981~1006) 26 993, Bit14 (976~1000) 25 988,
3531 13:25:19.843382 TX Bit7 (982~1006) 25 994, Bit15 (970~993) 24 981,
3532 13:25:19.843475
3533 13:25:19.846625 Write Rank1 MR14 =0x1c
3534 13:25:19.854973
3535 13:25:19.855061 CH=1, VrefRange= 0, VrefLevel = 28
3536 13:25:19.861007 TX Bit0 (983~1007) 25 995, Bit8 (972~997) 26 984,
3537 13:25:19.864906 TX Bit1 (981~1006) 26 993, Bit9 (972~994) 23 983,
3538 13:25:19.871220 TX Bit2 (978~1005) 28 991, Bit10 (975~1000) 26 987,
3539 13:25:19.874246 TX Bit3 (977~1002) 26 989, Bit11 (975~1000) 26 987,
3540 13:25:19.880881 TX Bit4 (981~1006) 26 993, Bit12 (976~1000) 25 988,
3541 13:25:19.884082 TX Bit5 (983~1006) 24 994, Bit13 (977~1000) 24 988,
3542 13:25:19.890370 TX Bit6 (981~1006) 26 993, Bit14 (977~1000) 24 988,
3543 13:25:19.893719 TX Bit7 (981~1006) 26 993, Bit15 (970~994) 25 982,
3544 13:25:19.893809
3545 13:25:19.897034 Write Rank1 MR14 =0x1e
3546 13:25:19.905162
3547 13:25:19.908602 CH=1, VrefRange= 0, VrefLevel = 30
3548 13:25:19.911839 TX Bit0 (983~1007) 25 995, Bit8 (972~996) 25 984,
3549 13:25:19.914881 TX Bit1 (982~1006) 25 994, Bit9 (971~995) 25 983,
3550 13:25:19.921547 TX Bit2 (978~1005) 28 991, Bit10 (975~1000) 26 987,
3551 13:25:19.925021 TX Bit3 (977~1002) 26 989, Bit11 (976~1000) 25 988,
3552 13:25:19.931221 TX Bit4 (981~1006) 26 993, Bit12 (975~1000) 26 987,
3553 13:25:19.934613 TX Bit5 (982~1007) 26 994, Bit13 (976~1000) 25 988,
3554 13:25:19.941281 TX Bit6 (981~1006) 26 993, Bit14 (976~1000) 25 988,
3555 13:25:19.944675 TX Bit7 (981~1006) 26 993, Bit15 (970~993) 24 981,
3556 13:25:19.944747
3557 13:25:19.947929 Write Rank1 MR14 =0x20
3558 13:25:19.955683
3559 13:25:19.959513 CH=1, VrefRange= 0, VrefLevel = 32
3560 13:25:19.962806 TX Bit0 (983~1007) 25 995, Bit8 (972~996) 25 984,
3561 13:25:19.965576 TX Bit1 (982~1006) 25 994, Bit9 (971~995) 25 983,
3562 13:25:19.972182 TX Bit2 (978~1005) 28 991, Bit10 (975~1000) 26 987,
3563 13:25:19.975665 TX Bit3 (977~1002) 26 989, Bit11 (976~1000) 25 988,
3564 13:25:19.982533 TX Bit4 (981~1006) 26 993, Bit12 (975~1000) 26 987,
3565 13:25:19.985267 TX Bit5 (982~1007) 26 994, Bit13 (976~1000) 25 988,
3566 13:25:19.991854 TX Bit6 (981~1006) 26 993, Bit14 (976~1000) 25 988,
3567 13:25:19.995366 TX Bit7 (981~1006) 26 993, Bit15 (970~993) 24 981,
3568 13:25:19.995443
3569 13:25:19.998950 Write Rank1 MR14 =0x22
3570 13:25:20.006724
3571 13:25:20.009925 CH=1, VrefRange= 0, VrefLevel = 34
3572 13:25:20.013488 TX Bit0 (983~1007) 25 995, Bit8 (972~996) 25 984,
3573 13:25:20.016846 TX Bit1 (982~1006) 25 994, Bit9 (971~995) 25 983,
3574 13:25:20.023277 TX Bit2 (978~1005) 28 991, Bit10 (975~1000) 26 987,
3575 13:25:20.026248 TX Bit3 (977~1002) 26 989, Bit11 (976~1000) 25 988,
3576 13:25:20.032893 TX Bit4 (981~1006) 26 993, Bit12 (975~1000) 26 987,
3577 13:25:20.036216 TX Bit5 (982~1007) 26 994, Bit13 (976~1000) 25 988,
3578 13:25:20.039804 TX Bit6 (981~1006) 26 993, Bit14 (976~1000) 25 988,
3579 13:25:20.046472 TX Bit7 (981~1006) 26 993, Bit15 (970~993) 24 981,
3580 13:25:20.046551
3581 13:25:20.049782 Write Rank1 MR14 =0x24
3582 13:25:20.057671
3583 13:25:20.060439 CH=1, VrefRange= 0, VrefLevel = 36
3584 13:25:20.063842 TX Bit0 (983~1007) 25 995, Bit8 (972~996) 25 984,
3585 13:25:20.067058 TX Bit1 (982~1006) 25 994, Bit9 (971~995) 25 983,
3586 13:25:20.073721 TX Bit2 (978~1005) 28 991, Bit10 (975~1000) 26 987,
3587 13:25:20.077135 TX Bit3 (977~1002) 26 989, Bit11 (976~1000) 25 988,
3588 13:25:20.084032 TX Bit4 (981~1006) 26 993, Bit12 (975~1000) 26 987,
3589 13:25:20.086936 TX Bit5 (982~1007) 26 994, Bit13 (976~1000) 25 988,
3590 13:25:20.093707 TX Bit6 (981~1006) 26 993, Bit14 (976~1000) 25 988,
3591 13:25:20.097127 TX Bit7 (981~1006) 26 993, Bit15 (970~993) 24 981,
3592 13:25:20.097203
3593 13:25:20.097261
3594 13:25:20.099810 TX Vref found, early break! 385< 388
3595 13:25:20.103135 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
3596 13:25:20.106966 u1DelayCellOfst[0]=7 cells (6 PI)
3597 13:25:20.109691 u1DelayCellOfst[1]=6 cells (5 PI)
3598 13:25:20.112890 u1DelayCellOfst[2]=2 cells (2 PI)
3599 13:25:20.116835 u1DelayCellOfst[3]=0 cells (0 PI)
3600 13:25:20.119785 u1DelayCellOfst[4]=5 cells (4 PI)
3601 13:25:20.122976 u1DelayCellOfst[5]=6 cells (5 PI)
3602 13:25:20.126228 u1DelayCellOfst[6]=5 cells (4 PI)
3603 13:25:20.129770 u1DelayCellOfst[7]=5 cells (4 PI)
3604 13:25:20.132905 Byte0, DQ PI dly=989, DQM PI dly= 992
3605 13:25:20.136122 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3606 13:25:20.136199
3607 13:25:20.142482 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3608 13:25:20.142558
3609 13:25:20.145774 u1DelayCellOfst[8]=3 cells (3 PI)
3610 13:25:20.145849 u1DelayCellOfst[9]=2 cells (2 PI)
3611 13:25:20.149411 u1DelayCellOfst[10]=7 cells (6 PI)
3612 13:25:20.152855 u1DelayCellOfst[11]=9 cells (7 PI)
3613 13:25:20.155947 u1DelayCellOfst[12]=7 cells (6 PI)
3614 13:25:20.159243 u1DelayCellOfst[13]=9 cells (7 PI)
3615 13:25:20.162568 u1DelayCellOfst[14]=9 cells (7 PI)
3616 13:25:20.165907 u1DelayCellOfst[15]=0 cells (0 PI)
3617 13:25:20.169292 Byte1, DQ PI dly=981, DQM PI dly= 984
3618 13:25:20.172593 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
3619 13:25:20.175420
3620 13:25:20.178814 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
3621 13:25:20.178891
3622 13:25:20.178950 Write Rank1 MR14 =0x1e
3623 13:25:20.182158
3624 13:25:20.182233 Final TX Range 0 Vref 30
3625 13:25:20.182292
3626 13:25:20.188355 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3627 13:25:20.188432
3628 13:25:20.195187 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3629 13:25:20.202020 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3630 13:25:20.211228 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3631 13:25:20.211305 Write Rank1 MR3 =0xb0
3632 13:25:20.214657 DramC Write-DBI on
3633 13:25:20.214732 ==
3634 13:25:20.218115 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3635 13:25:20.221503 fsp= 1, odt_onoff= 1, Byte mode= 0
3636 13:25:20.221579 ==
3637 13:25:20.227710 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3638 13:25:20.227805
3639 13:25:20.227865 Begin, DQ Scan Range 704~768
3640 13:25:20.230990
3641 13:25:20.231066
3642 13:25:20.231124 TX Vref Scan disable
3643 13:25:20.234194 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3644 13:25:20.237401 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3645 13:25:20.240964 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3646 13:25:20.244537 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3647 13:25:20.247827 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3648 13:25:20.254348 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3649 13:25:20.257347 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3650 13:25:20.260746 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3651 13:25:20.264166 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3652 13:25:20.267033 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3653 13:25:20.270529 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3654 13:25:20.273939 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3655 13:25:20.276747 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3656 13:25:20.280350 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3657 13:25:20.283479 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3658 13:25:20.286715 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3659 13:25:20.290493 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3660 13:25:20.293292 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3661 13:25:20.296678 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3662 13:25:20.300244 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3663 13:25:20.306376 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3664 13:25:20.313371 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3665 13:25:20.316680 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3666 13:25:20.319625 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3667 13:25:20.322915 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3668 13:25:20.326305 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3669 13:25:20.329655 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3670 13:25:20.333107 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3671 13:25:20.336230 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3672 13:25:20.339451 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3673 13:25:20.342526 752 |2 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
3674 13:25:20.346008 Byte0, DQ PI dly=738, DQM PI dly= 738
3675 13:25:20.352414 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 34)
3676 13:25:20.352490
3677 13:25:20.355935 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 34)
3678 13:25:20.356010
3679 13:25:20.358643 Byte1, DQ PI dly=729, DQM PI dly= 729
3680 13:25:20.362051 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
3681 13:25:20.362153
3682 13:25:20.368958 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
3683 13:25:20.369033
3684 13:25:20.375182 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3685 13:25:20.381983 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3686 13:25:20.388428 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3687 13:25:20.391868 Write Rank1 MR3 =0x30
3688 13:25:20.391944 DramC Write-DBI off
3689 13:25:20.392003
3690 13:25:20.394942 [DATLAT]
3691 13:25:20.395016 Freq=1600, CH1 RK1, use_rxtx_scan=0
3692 13:25:20.397929
3693 13:25:20.398010 DATLAT Default: 0x10
3694 13:25:20.401498 7, 0xFFFF, sum=0
3695 13:25:20.401575 8, 0xFFFF, sum=0
3696 13:25:20.404995 9, 0xFFFF, sum=0
3697 13:25:20.405073 10, 0xFFFF, sum=0
3698 13:25:20.408226 11, 0xFFFF, sum=0
3699 13:25:20.408303 12, 0xFFFF, sum=0
3700 13:25:20.411537 13, 0xFFFF, sum=0
3701 13:25:20.411615 14, 0x0, sum=1
3702 13:25:20.411674 15, 0x0, sum=2
3703 13:25:20.414425 16, 0x0, sum=3
3704 13:25:20.414502 17, 0x0, sum=4
3705 13:25:20.421389 pattern=2 first_step=14 total pass=5 best_step=16
3706 13:25:20.421464 ==
3707 13:25:20.424116 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3708 13:25:20.427707 fsp= 1, odt_onoff= 1, Byte mode= 0
3709 13:25:20.427783 ==
3710 13:25:20.434030 Start DQ dly to find pass range UseTestEngine =1
3711 13:25:20.437309 x-axis: bit #, y-axis: DQ dly (-127~63)
3712 13:25:20.437385 RX Vref Scan = 0
3713 13:25:20.440750 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3714 13:25:20.444127 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3715 13:25:20.447462 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3716 13:25:20.450662 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3717 13:25:20.453717 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3718 13:25:20.453794 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3719 13:25:20.457335 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3720 13:25:20.460120 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3721 13:25:20.463853 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3722 13:25:20.467323 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3723 13:25:20.469896 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3724 13:25:20.473311 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3725 13:25:20.476725 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3726 13:25:20.480037 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3727 13:25:20.483478 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3728 13:25:20.483555 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3729 13:25:20.486829 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3730 13:25:20.490227 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3731 13:25:20.493027 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3732 13:25:20.496393 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3733 13:25:20.499656 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3734 13:25:20.502811 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3735 13:25:20.506320 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3736 13:25:20.506397 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3737 13:25:20.509661 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3738 13:25:20.512689 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3739 13:25:20.516714 0, [0] xxxoxxxx xxxxxxxo [MSB]
3740 13:25:20.519770 1, [0] xxxoxxxx ooxxxxxo [MSB]
3741 13:25:20.523130 2, [0] xoooxxxx ooxxxxxo [MSB]
3742 13:25:20.523524 3, [0] xooooxxx ooxxxxxo [MSB]
3743 13:25:20.526744 4, [0] xooooxxo oooxxxxo [MSB]
3744 13:25:20.529345 5, [0] ooooooxo ooooxxxo [MSB]
3745 13:25:20.532682 6, [0] ooooooxo ooooxooo [MSB]
3746 13:25:20.536480 33, [0] oooxoooo ooooooox [MSB]
3747 13:25:20.539847 34, [0] oooxoooo ooooooox [MSB]
3748 13:25:20.543403 35, [0] oooxoooo xxooooox [MSB]
3749 13:25:20.546895 36, [0] ooxxoooo xxooooox [MSB]
3750 13:25:20.549646 37, [0] ooxxoooo xxooooox [MSB]
3751 13:25:20.552729 38, [0] oxxxooox xxxoooox [MSB]
3752 13:25:20.556171 39, [0] xxxxxoox xxxxxxox [MSB]
3753 13:25:20.556713 40, [0] xxxxxoox xxxxxxxx [MSB]
3754 13:25:20.559764 41, [0] xxxxxxxx xxxxxxxx [MSB]
3755 13:25:20.563121 iDelay=41, Bit 0, Center 21 (5 ~ 38) 34
3756 13:25:20.566383 iDelay=41, Bit 1, Center 19 (2 ~ 37) 36
3757 13:25:20.572657 iDelay=41, Bit 2, Center 18 (2 ~ 35) 34
3758 13:25:20.576203 iDelay=41, Bit 3, Center 15 (-1 ~ 32) 34
3759 13:25:20.579225 iDelay=41, Bit 4, Center 20 (3 ~ 38) 36
3760 13:25:20.582837 iDelay=41, Bit 5, Center 22 (5 ~ 40) 36
3761 13:25:20.585792 iDelay=41, Bit 6, Center 23 (7 ~ 40) 34
3762 13:25:20.589101 iDelay=41, Bit 7, Center 20 (4 ~ 37) 34
3763 13:25:20.592312 iDelay=41, Bit 8, Center 17 (1 ~ 34) 34
3764 13:25:20.595741 iDelay=41, Bit 9, Center 17 (1 ~ 34) 34
3765 13:25:20.599403 iDelay=41, Bit 10, Center 20 (4 ~ 37) 34
3766 13:25:20.602471 iDelay=41, Bit 11, Center 21 (5 ~ 38) 34
3767 13:25:20.606105 iDelay=41, Bit 12, Center 22 (7 ~ 38) 32
3768 13:25:20.608802 iDelay=41, Bit 13, Center 22 (6 ~ 38) 33
3769 13:25:20.615288 iDelay=41, Bit 14, Center 22 (6 ~ 39) 34
3770 13:25:20.619116 iDelay=41, Bit 15, Center 15 (-2 ~ 32) 35
3771 13:25:20.619673 ==
3772 13:25:20.622117 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3773 13:25:20.625421 fsp= 1, odt_onoff= 1, Byte mode= 0
3774 13:25:20.626044 ==
3775 13:25:20.628498 DQS Delay:
3776 13:25:20.629095 DQS0 = 0, DQS1 = 0
3777 13:25:20.631846 DQM Delay:
3778 13:25:20.632237 DQM0 = 19, DQM1 = 19
3779 13:25:20.632537 DQ Delay:
3780 13:25:20.635089 DQ0 =21, DQ1 =19, DQ2 =18, DQ3 =15
3781 13:25:20.638388 DQ4 =20, DQ5 =22, DQ6 =23, DQ7 =20
3782 13:25:20.641596 DQ8 =17, DQ9 =17, DQ10 =20, DQ11 =21
3783 13:25:20.645193 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =15
3784 13:25:20.645585
3785 13:25:20.645882
3786 13:25:20.646283
3787 13:25:20.648231 [DramC_TX_OE_Calibration] TA2
3788 13:25:20.651904 Original DQ_B0 (3 6) =30, OEN = 27
3789 13:25:20.655012 Original DQ_B1 (3 6) =30, OEN = 27
3790 13:25:20.658477 23, 0x0, End_B0=23 End_B1=23
3791 13:25:20.661716 24, 0x0, End_B0=24 End_B1=24
3792 13:25:20.664476 25, 0x0, End_B0=25 End_B1=25
3793 13:25:20.665055 26, 0x0, End_B0=26 End_B1=26
3794 13:25:20.667839 27, 0x0, End_B0=27 End_B1=27
3795 13:25:20.671364 28, 0x0, End_B0=28 End_B1=28
3796 13:25:20.674762 29, 0x0, End_B0=29 End_B1=29
3797 13:25:20.675158 30, 0x0, End_B0=30 End_B1=30
3798 13:25:20.678047 31, 0xFFFF, End_B0=30 End_B1=30
3799 13:25:20.684504 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3800 13:25:20.691243 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3801 13:25:20.691698
3802 13:25:20.692009
3803 13:25:20.692294 Write Rank1 MR23 =0x3f
3804 13:25:20.694511 [DQSOSC]
3805 13:25:20.700626 [DQSOSCAuto] RK1, (LSB)MR18= 0xb1b1, (MSB)MR19= 0x202, tDQSOscB0 = 457 ps tDQSOscB1 = 457 ps
3806 13:25:20.707459 CH1_RK1: MR19=0x202, MR18=0xB1B1, DQSOSC=457, MR23=63, INC=11, DEC=17
3807 13:25:20.710806 Write Rank1 MR23 =0x3f
3808 13:25:20.711196 [DQSOSC]
3809 13:25:20.717045 [DQSOSCAuto] RK1, (LSB)MR18= 0xb0b0, (MSB)MR19= 0x202, tDQSOscB0 = 457 ps tDQSOscB1 = 457 ps
3810 13:25:20.720491 CH1 RK1: MR19=202, MR18=B0B0
3811 13:25:20.723928 [RxdqsGatingPostProcess] freq 1600
3812 13:25:20.730491 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3813 13:25:20.730885 Rank: 0
3814 13:25:20.733637 best DQS0 dly(2T, 0.5T) = (2, 6)
3815 13:25:20.736762 best DQS1 dly(2T, 0.5T) = (2, 6)
3816 13:25:20.740159 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3817 13:25:20.743543 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3818 13:25:20.744133 Rank: 1
3819 13:25:20.746797 best DQS0 dly(2T, 0.5T) = (2, 6)
3820 13:25:20.749947 best DQS1 dly(2T, 0.5T) = (2, 6)
3821 13:25:20.753166 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3822 13:25:20.756536 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3823 13:25:20.759629 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3824 13:25:20.762847 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3825 13:25:20.769681 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3826 13:25:20.770111
3827 13:25:20.770423
3828 13:25:20.772928 [Calibration Summary] Freqency 1600
3829 13:25:20.773318 CH 0, Rank 0
3830 13:25:20.775743 All Pass.
3831 13:25:20.776130
3832 13:25:20.776430 CH 0, Rank 1
3833 13:25:20.776712 All Pass.
3834 13:25:20.776981
3835 13:25:20.779025 CH 1, Rank 0
3836 13:25:20.779415 All Pass.
3837 13:25:20.779717
3838 13:25:20.779991 CH 1, Rank 1
3839 13:25:20.782553 All Pass.
3840 13:25:20.782940
3841 13:25:20.789074 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3842 13:25:20.795634 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3843 13:25:20.802397 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3844 13:25:20.805215 Write Rank0 MR3 =0xb0
3845 13:25:20.811950 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3846 13:25:20.818580 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3847 13:25:20.824847 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3848 13:25:20.825337 Write Rank1 MR3 =0xb0
3849 13:25:20.831706 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3850 13:25:20.841855 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3851 13:25:20.848361 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3852 13:25:20.848972 Write Rank0 MR3 =0xb0
3853 13:25:20.854663 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3854 13:25:20.861378 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3855 13:25:20.870765 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3856 13:25:20.871340 Write Rank1 MR3 =0xb0
3857 13:25:20.874129 DramC Write-DBI on
3858 13:25:20.877272 [GetDramInforAfterCalByMRR] Vendor 6.
3859 13:25:20.881345 [GetDramInforAfterCalByMRR] Revision 505.
3860 13:25:20.881915 MR8 1111
3861 13:25:20.887323 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3862 13:25:20.887731 MR8 1111
3863 13:25:20.890995 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3864 13:25:20.893967 MR8 1111
3865 13:25:20.897532 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3866 13:25:20.898138 MR8 1111
3867 13:25:20.903641 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3868 13:25:20.913958 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3869 13:25:20.914633 Write Rank0 MR13 =0xd0
3870 13:25:20.917078 Write Rank1 MR13 =0xd0
3871 13:25:20.917595 Write Rank0 MR13 =0xd0
3872 13:25:20.919887 Write Rank1 MR13 =0xd0
3873 13:25:20.923659 Save calibration result to emmc
3874 13:25:20.924182
3875 13:25:20.924658
3876 13:25:20.926846 [DramcModeReg_Check] Freq_1600, FSP_1
3877 13:25:20.930399 FSP_1, CH_0, RK0
3878 13:25:20.930905 Write Rank0 MR13 =0xd8
3879 13:25:20.933413 MR12 = 0x5e (global = 0x5e) match
3880 13:25:20.936696 MR14 = 0x1c (global = 0x1c) match
3881 13:25:20.940098 FSP_1, CH_0, RK1
3882 13:25:20.940539 Write Rank1 MR13 =0xd8
3883 13:25:20.942915 MR12 = 0x5e (global = 0x5e) match
3884 13:25:20.946758 MR14 = 0x1c (global = 0x1c) match
3885 13:25:20.950078 FSP_1, CH_1, RK0
3886 13:25:20.950466 Write Rank0 MR13 =0xd8
3887 13:25:20.952838 MR12 = 0x5a (global = 0x5a) match
3888 13:25:20.956350 MR14 = 0x1c (global = 0x1c) match
3889 13:25:20.959644 FSP_1, CH_1, RK1
3890 13:25:20.960032 Write Rank1 MR13 =0xd8
3891 13:25:20.962849 MR12 = 0x60 (global = 0x60) match
3892 13:25:20.966002 MR14 = 0x1e (global = 0x1e) match
3893 13:25:20.966441
3894 13:25:20.972410 [MEM_TEST] 02: After DFS, before run time config
3895 13:25:20.979282 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3896 13:25:20.982578
3897 13:25:20.983089 [TA2_TEST]
3898 13:25:20.983409 === TA2 HW
3899 13:25:20.985749 TA2 PAT: XTALK
3900 13:25:20.989176 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3901 13:25:20.995194 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3902 13:25:20.998957 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3903 13:25:21.002110 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3904 13:25:21.005511
3905 13:25:21.005888
3906 13:25:21.006250 Settings after calibration
3907 13:25:21.006536
3908 13:25:21.008359 [DramcRunTimeConfig]
3909 13:25:21.011912 TransferPLLToSPMControl - MODE SW PHYPLL
3910 13:25:21.014822 TX_TRACKING: ON
3911 13:25:21.015323 RX_TRACKING: ON
3912 13:25:21.015631 HW_GATING: ON
3913 13:25:21.018355 HW_GATING DBG: OFF
3914 13:25:21.018820 ddr_geometry:1
3915 13:25:21.021776 ddr_geometry:1
3916 13:25:21.022350 ddr_geometry:1
3917 13:25:21.025295 ddr_geometry:1
3918 13:25:21.025758 ddr_geometry:1
3919 13:25:21.026273 ddr_geometry:1
3920 13:25:21.028211 ddr_geometry:1
3921 13:25:21.028894 ddr_geometry:1
3922 13:25:21.031264 High Freq DUMMY_READ_FOR_TRACKING: ON
3923 13:25:21.035019 ZQCS_ENABLE_LP4: OFF
3924 13:25:21.038130 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3925 13:25:21.041301 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3926 13:25:21.041586 SPM_CONTROL_AFTERK: ON
3927 13:25:21.044745 IMPEDANCE_TRACKING: ON
3928 13:25:21.045115 TEMP_SENSOR: ON
3929 13:25:21.047898 PER_BANK_REFRESH: ON
3930 13:25:21.051294 HW_SAVE_FOR_SR: ON
3931 13:25:21.054356 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3932 13:25:21.057944 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3933 13:25:21.060721 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3934 13:25:21.060889 Read ODT Tracking: ON
3935 13:25:21.064025 =========================
3936 13:25:21.064191
3937 13:25:21.064321 [TA2_TEST]
3938 13:25:21.067361 === TA2 HW
3939 13:25:21.070706 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3940 13:25:21.076977 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3941 13:25:21.080176 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3942 13:25:21.087052 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3943 13:25:21.087290
3944 13:25:21.090230 [MEM_TEST] 03: After run time config
3945 13:25:21.097408 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3946 13:25:21.103520 [complex_mem_test] start addr:0x40024000, len:131072
3947 13:25:21.307247 1st complex R/W mem test pass
3948 13:25:21.314531 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3949 13:25:21.317141 sync preloader write leveling
3950 13:25:21.320534 sync preloader cbt_mr12
3951 13:25:21.323821 sync preloader cbt_clk_dly
3952 13:25:21.324227 sync preloader cbt_cmd_dly
3953 13:25:21.327433 sync preloader cbt_cs
3954 13:25:21.330178 sync preloader cbt_ca_perbit_delay
3955 13:25:21.333610 sync preloader clk_delay
3956 13:25:21.334151 sync preloader dqs_delay
3957 13:25:21.336948 sync preloader u1Gating2T_Save
3958 13:25:21.340532 sync preloader u1Gating05T_Save
3959 13:25:21.343437 sync preloader u1Gatingfine_tune_Save
3960 13:25:21.346791 sync preloader u1Gatingucpass_count_Save
3961 13:25:21.350061 sync preloader u1TxWindowPerbitVref_Save
3962 13:25:21.353202 sync preloader u1TxCenter_min_Save
3963 13:25:21.356562 sync preloader u1TxCenter_max_Save
3964 13:25:21.360214 sync preloader u1Txwin_center_Save
3965 13:25:21.363104 sync preloader u1Txfirst_pass_Save
3966 13:25:21.366622 sync preloader u1Txlast_pass_Save
3967 13:25:21.369649 sync preloader u1RxDatlat_Save
3968 13:25:21.372814 sync preloader u1RxWinPerbitVref_Save
3969 13:25:21.376128 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3970 13:25:21.379699 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3971 13:25:21.382605 sync preloader delay_cell_unit
3972 13:25:21.389785 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3973 13:25:21.392677 sync preloader write leveling
3974 13:25:21.396534 sync preloader cbt_mr12
3975 13:25:21.397071 sync preloader cbt_clk_dly
3976 13:25:21.399063 sync preloader cbt_cmd_dly
3977 13:25:21.402214 sync preloader cbt_cs
3978 13:25:21.405575 sync preloader cbt_ca_perbit_delay
3979 13:25:21.406151 sync preloader clk_delay
3980 13:25:21.409340 sync preloader dqs_delay
3981 13:25:21.412158 sync preloader u1Gating2T_Save
3982 13:25:21.415593 sync preloader u1Gating05T_Save
3983 13:25:21.419202 sync preloader u1Gatingfine_tune_Save
3984 13:25:21.422116 sync preloader u1Gatingucpass_count_Save
3985 13:25:21.425117 sync preloader u1TxWindowPerbitVref_Save
3986 13:25:21.428627 sync preloader u1TxCenter_min_Save
3987 13:25:21.432268 sync preloader u1TxCenter_max_Save
3988 13:25:21.435353 sync preloader u1Txwin_center_Save
3989 13:25:21.438588 sync preloader u1Txfirst_pass_Save
3990 13:25:21.441485 sync preloader u1Txlast_pass_Save
3991 13:25:21.444844 sync preloader u1RxDatlat_Save
3992 13:25:21.448504 sync preloader u1RxWinPerbitVref_Save
3993 13:25:21.452036 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3994 13:25:21.454849 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3995 13:25:21.458299 sync preloader delay_cell_unit
3996 13:25:21.464501 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3997 13:25:21.468020 sync preloader write leveling
3998 13:25:21.468408 sync preloader cbt_mr12
3999 13:25:21.471380 sync preloader cbt_clk_dly
4000 13:25:21.474877 sync preloader cbt_cmd_dly
4001 13:25:21.478189 sync preloader cbt_cs
4002 13:25:21.478705 sync preloader cbt_ca_perbit_delay
4003 13:25:21.481339 sync preloader clk_delay
4004 13:25:21.484675 sync preloader dqs_delay
4005 13:25:21.487647 sync preloader u1Gating2T_Save
4006 13:25:21.490737 sync preloader u1Gating05T_Save
4007 13:25:21.494213 sync preloader u1Gatingfine_tune_Save
4008 13:25:21.497880 sync preloader u1Gatingucpass_count_Save
4009 13:25:21.500603 sync preloader u1TxWindowPerbitVref_Save
4010 13:25:21.504184 sync preloader u1TxCenter_min_Save
4011 13:25:21.507196 sync preloader u1TxCenter_max_Save
4012 13:25:21.510617 sync preloader u1Txwin_center_Save
4013 13:25:21.514094 sync preloader u1Txfirst_pass_Save
4014 13:25:21.514478 sync preloader u1Txlast_pass_Save
4015 13:25:21.517178 sync preloader u1RxDatlat_Save
4016 13:25:21.520738 sync preloader u1RxWinPerbitVref_Save
4017 13:25:21.527240 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4018 13:25:21.530180 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4019 13:25:21.533574 sync preloader delay_cell_unit
4020 13:25:21.536882 just_for_test_dump_coreboot_params dump all params
4021 13:25:21.540440 dump source = 0x0
4022 13:25:21.540822 dump params frequency:1600
4023 13:25:21.543685 dump params rank number:2
4024 13:25:21.544063
4025 13:25:21.547028 dump params write leveling
4026 13:25:21.550474 write leveling[0][0][0] = 0x1f
4027 13:25:21.553143 write leveling[0][0][1] = 0x16
4028 13:25:21.553522 write leveling[0][1][0] = 0x1f
4029 13:25:21.556757 write leveling[0][1][1] = 0x17
4030 13:25:21.560165 write leveling[1][0][0] = 0x23
4031 13:25:21.562924 write leveling[1][0][1] = 0x21
4032 13:25:21.566425 write leveling[1][1][0] = 0x22
4033 13:25:21.569672 write leveling[1][1][1] = 0x1d
4034 13:25:21.570078 dump params cbt_cs
4035 13:25:21.573236 cbt_cs[0][0] = 0x7
4036 13:25:21.573618 cbt_cs[0][1] = 0x7
4037 13:25:21.576250 cbt_cs[1][0] = 0xa
4038 13:25:21.576324 cbt_cs[1][1] = 0xa
4039 13:25:21.579099 dump params cbt_mr12
4040 13:25:21.579174 cbt_mr12[0][0] = 0x1e
4041 13:25:21.582550 cbt_mr12[0][1] = 0x1e
4042 13:25:21.585834 cbt_mr12[1][0] = 0x1a
4043 13:25:21.585908 cbt_mr12[1][1] = 0x20
4044 13:25:21.589314 dump params tx window
4045 13:25:21.592120 tx_center_min[0][0][0] = 984
4046 13:25:21.592195 tx_center_max[0][0][0] = 990
4047 13:25:21.595519 tx_center_min[0][0][1] = 977
4048 13:25:21.598543 tx_center_max[0][0][1] = 984
4049 13:25:21.601985 tx_center_min[0][1][0] = 985
4050 13:25:21.605446 tx_center_max[0][1][0] = 990
4051 13:25:21.605520 tx_center_min[0][1][1] = 977
4052 13:25:21.608695 tx_center_max[0][1][1] = 985
4053 13:25:21.611952 tx_center_min[1][0][0] = 991
4054 13:25:21.615288 tx_center_max[1][0][0] = 996
4055 13:25:21.618463 tx_center_min[1][0][1] = 987
4056 13:25:21.618538 tx_center_max[1][0][1] = 993
4057 13:25:21.621718 tx_center_min[1][1][0] = 989
4058 13:25:21.625403 tx_center_max[1][1][0] = 995
4059 13:25:21.628160 tx_center_min[1][1][1] = 981
4060 13:25:21.631875 tx_center_max[1][1][1] = 988
4061 13:25:21.631951 dump params tx window
4062 13:25:21.635268 tx_win_center[0][0][0] = 990
4063 13:25:21.638576 tx_first_pass[0][0][0] = 978
4064 13:25:21.641469 tx_last_pass[0][0][0] = 1002
4065 13:25:21.641589 tx_win_center[0][0][1] = 988
4066 13:25:21.644476 tx_first_pass[0][0][1] = 976
4067 13:25:21.648255 tx_last_pass[0][0][1] = 1000
4068 13:25:21.651412 tx_win_center[0][0][2] = 989
4069 13:25:21.654859 tx_first_pass[0][0][2] = 977
4070 13:25:21.654934 tx_last_pass[0][0][2] = 1001
4071 13:25:21.658023 tx_win_center[0][0][3] = 984
4072 13:25:21.660839 tx_first_pass[0][0][3] = 972
4073 13:25:21.664248 tx_last_pass[0][0][3] = 996
4074 13:25:21.667786 tx_win_center[0][0][4] = 987
4075 13:25:21.667863 tx_first_pass[0][0][4] = 976
4076 13:25:21.670694 tx_last_pass[0][0][4] = 999
4077 13:25:21.673905 tx_win_center[0][0][5] = 986
4078 13:25:21.677566 tx_first_pass[0][0][5] = 975
4079 13:25:21.681043 tx_last_pass[0][0][5] = 998
4080 13:25:21.681119 tx_win_center[0][0][6] = 987
4081 13:25:21.683743 tx_first_pass[0][0][6] = 975
4082 13:25:21.687112 tx_last_pass[0][0][6] = 999
4083 13:25:21.690322 tx_win_center[0][0][7] = 987
4084 13:25:21.693669 tx_first_pass[0][0][7] = 976
4085 13:25:21.693744 tx_last_pass[0][0][7] = 999
4086 13:25:21.697259 tx_win_center[0][0][8] = 977
4087 13:25:21.700645 tx_first_pass[0][0][8] = 965
4088 13:25:21.703982 tx_last_pass[0][0][8] = 989
4089 13:25:21.704057 tx_win_center[0][0][9] = 977
4090 13:25:21.706800 tx_first_pass[0][0][9] = 966
4091 13:25:21.710334 tx_last_pass[0][0][9] = 989
4092 13:25:21.713845 tx_win_center[0][0][10] = 984
4093 13:25:21.716684 tx_first_pass[0][0][10] = 972
4094 13:25:21.716805 tx_last_pass[0][0][10] = 996
4095 13:25:21.719965 tx_win_center[0][0][11] = 977
4096 13:25:21.723609 tx_first_pass[0][0][11] = 966
4097 13:25:21.726386 tx_last_pass[0][0][11] = 989
4098 13:25:21.729764 tx_win_center[0][0][12] = 978
4099 13:25:21.733105 tx_first_pass[0][0][12] = 967
4100 13:25:21.733182 tx_last_pass[0][0][12] = 990
4101 13:25:21.736273 tx_win_center[0][0][13] = 978
4102 13:25:21.740256 tx_first_pass[0][0][13] = 967
4103 13:25:21.743088 tx_last_pass[0][0][13] = 990
4104 13:25:21.746300 tx_win_center[0][0][14] = 979
4105 13:25:21.746376 tx_first_pass[0][0][14] = 967
4106 13:25:21.749663 tx_last_pass[0][0][14] = 992
4107 13:25:21.753200 tx_win_center[0][0][15] = 982
4108 13:25:21.756018 tx_first_pass[0][0][15] = 970
4109 13:25:21.759225 tx_last_pass[0][0][15] = 994
4110 13:25:21.759301 tx_win_center[0][1][0] = 990
4111 13:25:21.762889 tx_first_pass[0][1][0] = 978
4112 13:25:21.765902 tx_last_pass[0][1][0] = 1002
4113 13:25:21.769032 tx_win_center[0][1][1] = 989
4114 13:25:21.772611 tx_first_pass[0][1][1] = 978
4115 13:25:21.772716 tx_last_pass[0][1][1] = 1001
4116 13:25:21.775773 tx_win_center[0][1][2] = 990
4117 13:25:21.778817 tx_first_pass[0][1][2] = 978
4118 13:25:21.782436 tx_last_pass[0][1][2] = 1002
4119 13:25:21.785885 tx_win_center[0][1][3] = 985
4120 13:25:21.785998 tx_first_pass[0][1][3] = 973
4121 13:25:21.789024 tx_last_pass[0][1][3] = 997
4122 13:25:21.792360 tx_win_center[0][1][4] = 989
4123 13:25:21.795529 tx_first_pass[0][1][4] = 977
4124 13:25:21.799053 tx_last_pass[0][1][4] = 1001
4125 13:25:21.799128 tx_win_center[0][1][5] = 987
4126 13:25:21.801856 tx_first_pass[0][1][5] = 975
4127 13:25:21.805171 tx_last_pass[0][1][5] = 999
4128 13:25:21.808453 tx_win_center[0][1][6] = 988
4129 13:25:21.811684 tx_first_pass[0][1][6] = 976
4130 13:25:21.811759 tx_last_pass[0][1][6] = 1000
4131 13:25:21.815469 tx_win_center[0][1][7] = 989
4132 13:25:21.818335 tx_first_pass[0][1][7] = 977
4133 13:25:21.821956 tx_last_pass[0][1][7] = 1001
4134 13:25:21.824806 tx_win_center[0][1][8] = 977
4135 13:25:21.824881 tx_first_pass[0][1][8] = 966
4136 13:25:21.828166 tx_last_pass[0][1][8] = 989
4137 13:25:21.831640 tx_win_center[0][1][9] = 979
4138 13:25:21.834492 tx_first_pass[0][1][9] = 968
4139 13:25:21.834563 tx_last_pass[0][1][9] = 990
4140 13:25:21.838310 tx_win_center[0][1][10] = 985
4141 13:25:21.841275 tx_first_pass[0][1][10] = 974
4142 13:25:21.844334 tx_last_pass[0][1][10] = 997
4143 13:25:21.847676 tx_win_center[0][1][11] = 978
4144 13:25:21.851492 tx_first_pass[0][1][11] = 967
4145 13:25:21.851592 tx_last_pass[0][1][11] = 990
4146 13:25:21.854489 tx_win_center[0][1][12] = 980
4147 13:25:21.858041 tx_first_pass[0][1][12] = 969
4148 13:25:21.861170 tx_last_pass[0][1][12] = 991
4149 13:25:21.864499 tx_win_center[0][1][13] = 979
4150 13:25:21.864575 tx_first_pass[0][1][13] = 968
4151 13:25:21.867847 tx_last_pass[0][1][13] = 991
4152 13:25:21.870423 tx_win_center[0][1][14] = 980
4153 13:25:21.873982 tx_first_pass[0][1][14] = 969
4154 13:25:21.877221 tx_last_pass[0][1][14] = 992
4155 13:25:21.880303 tx_win_center[0][1][15] = 984
4156 13:25:21.880378 tx_first_pass[0][1][15] = 972
4157 13:25:21.883818 tx_last_pass[0][1][15] = 996
4158 13:25:21.886966 tx_win_center[1][0][0] = 996
4159 13:25:21.890494 tx_first_pass[1][0][0] = 984
4160 13:25:21.893784 tx_last_pass[1][0][0] = 1009
4161 13:25:21.893883 tx_win_center[1][0][1] = 995
4162 13:25:21.897166 tx_first_pass[1][0][1] = 983
4163 13:25:21.900392 tx_last_pass[1][0][1] = 1007
4164 13:25:21.903190 tx_win_center[1][0][2] = 993
4165 13:25:21.906788 tx_first_pass[1][0][2] = 981
4166 13:25:21.906880 tx_last_pass[1][0][2] = 1006
4167 13:25:21.910423 tx_win_center[1][0][3] = 991
4168 13:25:21.913084 tx_first_pass[1][0][3] = 978
4169 13:25:21.916414 tx_last_pass[1][0][3] = 1004
4170 13:25:21.919854 tx_win_center[1][0][4] = 995
4171 13:25:21.919939 tx_first_pass[1][0][4] = 983
4172 13:25:21.923029 tx_last_pass[1][0][4] = 1007
4173 13:25:21.926581 tx_win_center[1][0][5] = 995
4174 13:25:21.929890 tx_first_pass[1][0][5] = 984
4175 13:25:21.933300 tx_last_pass[1][0][5] = 1007
4176 13:25:21.933386 tx_win_center[1][0][6] = 995
4177 13:25:21.936666 tx_first_pass[1][0][6] = 983
4178 13:25:21.939500 tx_last_pass[1][0][6] = 1007
4179 13:25:21.942832 tx_win_center[1][0][7] = 995
4180 13:25:21.946378 tx_first_pass[1][0][7] = 983
4181 13:25:21.946502 tx_last_pass[1][0][7] = 1007
4182 13:25:21.949865 tx_win_center[1][0][8] = 990
4183 13:25:21.952547 tx_first_pass[1][0][8] = 979
4184 13:25:21.956236 tx_last_pass[1][0][8] = 1001
4185 13:25:21.958873 tx_win_center[1][0][9] = 989
4186 13:25:21.958948 tx_first_pass[1][0][9] = 978
4187 13:25:21.962124 tx_last_pass[1][0][9] = 1001
4188 13:25:21.966167 tx_win_center[1][0][10] = 992
4189 13:25:21.969051 tx_first_pass[1][0][10] = 981
4190 13:25:21.972520 tx_last_pass[1][0][10] = 1004
4191 13:25:21.972595 tx_win_center[1][0][11] = 993
4192 13:25:21.975964 tx_first_pass[1][0][11] = 981
4193 13:25:21.979157 tx_last_pass[1][0][11] = 1005
4194 13:25:21.982487 tx_win_center[1][0][12] = 993
4195 13:25:21.985342 tx_first_pass[1][0][12] = 982
4196 13:25:21.985440 tx_last_pass[1][0][12] = 1004
4197 13:25:21.989165 tx_win_center[1][0][13] = 993
4198 13:25:21.992704 tx_first_pass[1][0][13] = 983
4199 13:25:21.995949 tx_last_pass[1][0][13] = 1004
4200 13:25:21.998754 tx_win_center[1][0][14] = 992
4201 13:25:22.001755 tx_first_pass[1][0][14] = 981
4202 13:25:22.001856 tx_last_pass[1][0][14] = 1003
4203 13:25:22.005073 tx_win_center[1][0][15] = 987
4204 13:25:22.008517 tx_first_pass[1][0][15] = 976
4205 13:25:22.011544 tx_last_pass[1][0][15] = 999
4206 13:25:22.015172 tx_win_center[1][1][0] = 995
4207 13:25:22.015248 tx_first_pass[1][1][0] = 983
4208 13:25:22.018018 tx_last_pass[1][1][0] = 1007
4209 13:25:22.021453 tx_win_center[1][1][1] = 994
4210 13:25:22.024879 tx_first_pass[1][1][1] = 982
4211 13:25:22.028392 tx_last_pass[1][1][1] = 1006
4212 13:25:22.028468 tx_win_center[1][1][2] = 991
4213 13:25:22.031085 tx_first_pass[1][1][2] = 978
4214 13:25:22.034888 tx_last_pass[1][1][2] = 1005
4215 13:25:22.038472 tx_win_center[1][1][3] = 989
4216 13:25:22.041115 tx_first_pass[1][1][3] = 977
4217 13:25:22.041191 tx_last_pass[1][1][3] = 1002
4218 13:25:22.044633 tx_win_center[1][1][4] = 993
4219 13:25:22.048042 tx_first_pass[1][1][4] = 981
4220 13:25:22.050919 tx_last_pass[1][1][4] = 1006
4221 13:25:22.054487 tx_win_center[1][1][5] = 994
4222 13:25:22.054615 tx_first_pass[1][1][5] = 982
4223 13:25:22.057375 tx_last_pass[1][1][5] = 1007
4224 13:25:22.060817 tx_win_center[1][1][6] = 993
4225 13:25:22.064257 tx_first_pass[1][1][6] = 981
4226 13:25:22.067654 tx_last_pass[1][1][6] = 1006
4227 13:25:22.067729 tx_win_center[1][1][7] = 993
4228 13:25:22.070424 tx_first_pass[1][1][7] = 981
4229 13:25:22.074118 tx_last_pass[1][1][7] = 1006
4230 13:25:22.076863 tx_win_center[1][1][8] = 984
4231 13:25:22.080231 tx_first_pass[1][1][8] = 972
4232 13:25:22.080337 tx_last_pass[1][1][8] = 996
4233 13:25:22.083656 tx_win_center[1][1][9] = 983
4234 13:25:22.086885 tx_first_pass[1][1][9] = 971
4235 13:25:22.090017 tx_last_pass[1][1][9] = 995
4236 13:25:22.093624 tx_win_center[1][1][10] = 987
4237 13:25:22.093724 tx_first_pass[1][1][10] = 975
4238 13:25:22.096926 tx_last_pass[1][1][10] = 1000
4239 13:25:22.100005 tx_win_center[1][1][11] = 988
4240 13:25:22.103583 tx_first_pass[1][1][11] = 976
4241 13:25:22.107194 tx_last_pass[1][1][11] = 1000
4242 13:25:22.110661 tx_win_center[1][1][12] = 987
4243 13:25:22.110765 tx_first_pass[1][1][12] = 975
4244 13:25:22.113096 tx_last_pass[1][1][12] = 1000
4245 13:25:22.116213 tx_win_center[1][1][13] = 988
4246 13:25:22.120284 tx_first_pass[1][1][13] = 976
4247 13:25:22.123007 tx_last_pass[1][1][13] = 1000
4248 13:25:22.123107 tx_win_center[1][1][14] = 988
4249 13:25:22.126202 tx_first_pass[1][1][14] = 976
4250 13:25:22.129594 tx_last_pass[1][1][14] = 1000
4251 13:25:22.133198 tx_win_center[1][1][15] = 981
4252 13:25:22.135727 tx_first_pass[1][1][15] = 970
4253 13:25:22.139375 tx_last_pass[1][1][15] = 993
4254 13:25:22.139445 dump params rx window
4255 13:25:22.142673 rx_firspass[0][0][0] = 5
4256 13:25:22.145995 rx_lastpass[0][0][0] = 39
4257 13:25:22.146076 rx_firspass[0][0][1] = 5
4258 13:25:22.149362 rx_lastpass[0][0][1] = 36
4259 13:25:22.152117 rx_firspass[0][0][2] = 6
4260 13:25:22.155738 rx_lastpass[0][0][2] = 37
4261 13:25:22.155831 rx_firspass[0][0][3] = 0
4262 13:25:22.158589 rx_lastpass[0][0][3] = 30
4263 13:25:22.162169 rx_firspass[0][0][4] = 5
4264 13:25:22.162235 rx_lastpass[0][0][4] = 36
4265 13:25:22.165071 rx_firspass[0][0][5] = 1
4266 13:25:22.168611 rx_lastpass[0][0][5] = 33
4267 13:25:22.168676 rx_firspass[0][0][6] = 4
4268 13:25:22.171910 rx_lastpass[0][0][6] = 33
4269 13:25:22.175387 rx_firspass[0][0][7] = 7
4270 13:25:22.178226 rx_lastpass[0][0][7] = 36
4271 13:25:22.178300 rx_firspass[0][0][8] = -1
4272 13:25:22.181618 rx_lastpass[0][0][8] = 31
4273 13:25:22.185254 rx_firspass[0][0][9] = 1
4274 13:25:22.185325 rx_lastpass[0][0][9] = 32
4275 13:25:22.188077 rx_firspass[0][0][10] = 9
4276 13:25:22.191589 rx_lastpass[0][0][10] = 39
4277 13:25:22.195145 rx_firspass[0][0][11] = 1
4278 13:25:22.195211 rx_lastpass[0][0][11] = 30
4279 13:25:22.197938 rx_firspass[0][0][12] = 1
4280 13:25:22.201292 rx_lastpass[0][0][12] = 34
4281 13:25:22.204685 rx_firspass[0][0][13] = 2
4282 13:25:22.204774 rx_lastpass[0][0][13] = 33
4283 13:25:22.207999 rx_firspass[0][0][14] = 3
4284 13:25:22.211382 rx_lastpass[0][0][14] = 36
4285 13:25:22.214781 rx_firspass[0][0][15] = 7
4286 13:25:22.214848 rx_lastpass[0][0][15] = 37
4287 13:25:22.217974 rx_firspass[0][1][0] = 4
4288 13:25:22.221101 rx_lastpass[0][1][0] = 38
4289 13:25:22.221162 rx_firspass[0][1][1] = 3
4290 13:25:22.224397 rx_lastpass[0][1][1] = 39
4291 13:25:22.228111 rx_firspass[0][1][2] = 4
4292 13:25:22.230790 rx_lastpass[0][1][2] = 40
4293 13:25:22.230889 rx_firspass[0][1][3] = -3
4294 13:25:22.233981 rx_lastpass[0][1][3] = 31
4295 13:25:22.237395 rx_firspass[0][1][4] = 5
4296 13:25:22.237465 rx_lastpass[0][1][4] = 38
4297 13:25:22.240440 rx_firspass[0][1][5] = 0
4298 13:25:22.243840 rx_lastpass[0][1][5] = 32
4299 13:25:22.247167 rx_firspass[0][1][6] = 1
4300 13:25:22.247232 rx_lastpass[0][1][6] = 35
4301 13:25:22.250367 rx_firspass[0][1][7] = 4
4302 13:25:22.254268 rx_lastpass[0][1][7] = 37
4303 13:25:22.254331 rx_firspass[0][1][8] = 0
4304 13:25:22.257033 rx_lastpass[0][1][8] = 33
4305 13:25:22.260103 rx_firspass[0][1][9] = 2
4306 13:25:22.263816 rx_lastpass[0][1][9] = 35
4307 13:25:22.263880 rx_firspass[0][1][10] = 9
4308 13:25:22.266793 rx_lastpass[0][1][10] = 42
4309 13:25:22.270536 rx_firspass[0][1][11] = 0
4310 13:25:22.270602 rx_lastpass[0][1][11] = 33
4311 13:25:22.273299 rx_firspass[0][1][12] = 3
4312 13:25:22.277233 rx_lastpass[0][1][12] = 36
4313 13:25:22.280016 rx_firspass[0][1][13] = 3
4314 13:25:22.280082 rx_lastpass[0][1][13] = 36
4315 13:25:22.283352 rx_firspass[0][1][14] = 5
4316 13:25:22.286838 rx_lastpass[0][1][14] = 37
4317 13:25:22.290137 rx_firspass[0][1][15] = 6
4318 13:25:22.290202 rx_lastpass[0][1][15] = 40
4319 13:25:22.293607 rx_firspass[1][0][0] = 5
4320 13:25:22.296830 rx_lastpass[1][0][0] = 39
4321 13:25:22.296919 rx_firspass[1][0][1] = 4
4322 13:25:22.299516 rx_lastpass[1][0][1] = 36
4323 13:25:22.302938 rx_firspass[1][0][2] = 3
4324 13:25:22.306857 rx_lastpass[1][0][2] = 36
4325 13:25:22.307240 rx_firspass[1][0][3] = -1
4326 13:25:22.310178 rx_lastpass[1][0][3] = 33
4327 13:25:22.313200 rx_firspass[1][0][4] = 5
4328 13:25:22.316501 rx_lastpass[1][0][4] = 36
4329 13:25:22.316957 rx_firspass[1][0][5] = 6
4330 13:25:22.319850 rx_lastpass[1][0][5] = 38
4331 13:25:22.323049 rx_firspass[1][0][6] = 10
4332 13:25:22.323123 rx_lastpass[1][0][6] = 39
4333 13:25:22.325841 rx_firspass[1][0][7] = 5
4334 13:25:22.329079 rx_lastpass[1][0][7] = 37
4335 13:25:22.329154 rx_firspass[1][0][8] = 0
4336 13:25:22.332296 rx_lastpass[1][0][8] = 33
4337 13:25:22.335721 rx_firspass[1][0][9] = 2
4338 13:25:22.339551 rx_lastpass[1][0][9] = 31
4339 13:25:22.339631 rx_firspass[1][0][10] = 5
4340 13:25:22.342274 rx_lastpass[1][0][10] = 36
4341 13:25:22.345789 rx_firspass[1][0][11] = 7
4342 13:25:22.349084 rx_lastpass[1][0][11] = 36
4343 13:25:22.349159 rx_firspass[1][0][12] = 5
4344 13:25:22.352347 rx_lastpass[1][0][12] = 38
4345 13:25:22.355627 rx_firspass[1][0][13] = 6
4346 13:25:22.358423 rx_lastpass[1][0][13] = 36
4347 13:25:22.358497 rx_firspass[1][0][14] = 7
4348 13:25:22.361826 rx_lastpass[1][0][14] = 37
4349 13:25:22.365257 rx_firspass[1][0][15] = 0
4350 13:25:22.365332 rx_lastpass[1][0][15] = 29
4351 13:25:22.368586 rx_firspass[1][1][0] = 5
4352 13:25:22.371893 rx_lastpass[1][1][0] = 38
4353 13:25:22.375072 rx_firspass[1][1][1] = 2
4354 13:25:22.375146 rx_lastpass[1][1][1] = 37
4355 13:25:22.378213 rx_firspass[1][1][2] = 2
4356 13:25:22.381345 rx_lastpass[1][1][2] = 35
4357 13:25:22.381420 rx_firspass[1][1][3] = -1
4358 13:25:22.384955 rx_lastpass[1][1][3] = 32
4359 13:25:22.388254 rx_firspass[1][1][4] = 3
4360 13:25:22.391507 rx_lastpass[1][1][4] = 38
4361 13:25:22.391582 rx_firspass[1][1][5] = 5
4362 13:25:22.394792 rx_lastpass[1][1][5] = 40
4363 13:25:22.397908 rx_firspass[1][1][6] = 7
4364 13:25:22.397982 rx_lastpass[1][1][6] = 40
4365 13:25:22.401006 rx_firspass[1][1][7] = 4
4366 13:25:22.404468 rx_lastpass[1][1][7] = 37
4367 13:25:22.407853 rx_firspass[1][1][8] = 1
4368 13:25:22.407927 rx_lastpass[1][1][8] = 34
4369 13:25:22.411372 rx_firspass[1][1][9] = 1
4370 13:25:22.414693 rx_lastpass[1][1][9] = 34
4371 13:25:22.414768 rx_firspass[1][1][10] = 4
4372 13:25:22.418015 rx_lastpass[1][1][10] = 37
4373 13:25:22.421287 rx_firspass[1][1][11] = 5
4374 13:25:22.423916 rx_lastpass[1][1][11] = 38
4375 13:25:22.423990 rx_firspass[1][1][12] = 7
4376 13:25:22.427285 rx_lastpass[1][1][12] = 38
4377 13:25:22.430881 rx_firspass[1][1][13] = 6
4378 13:25:22.434367 rx_lastpass[1][1][13] = 38
4379 13:25:22.434442 rx_firspass[1][1][14] = 6
4380 13:25:22.437589 rx_lastpass[1][1][14] = 39
4381 13:25:22.440399 rx_firspass[1][1][15] = -2
4382 13:25:22.443703 rx_lastpass[1][1][15] = 32
4383 13:25:22.443779 dump params clk_delay
4384 13:25:22.447189 clk_delay[0] = 1
4385 13:25:22.447263 clk_delay[1] = 0
4386 13:25:22.450824 dump params dqs_delay
4387 13:25:22.450899 dqs_delay[0][0] = 0
4388 13:25:22.453937 dqs_delay[0][1] = 0
4389 13:25:22.454039 dqs_delay[1][0] = -1
4390 13:25:22.457091 dqs_delay[1][1] = 0
4391 13:25:22.460189 dump params delay_cell_unit = 744
4392 13:25:22.460263 dump source = 0x0
4393 13:25:22.464006 dump params frequency:1200
4394 13:25:22.467019 dump params rank number:2
4395 13:25:22.467093
4396 13:25:22.470154 dump params write leveling
4397 13:25:22.470229 write leveling[0][0][0] = 0x0
4398 13:25:22.473614 write leveling[0][0][1] = 0x0
4399 13:25:22.477086 write leveling[0][1][0] = 0x0
4400 13:25:22.479907 write leveling[0][1][1] = 0x0
4401 13:25:22.483332 write leveling[1][0][0] = 0x0
4402 13:25:22.486994 write leveling[1][0][1] = 0x0
4403 13:25:22.487381 write leveling[1][1][0] = 0x0
4404 13:25:22.490438 write leveling[1][1][1] = 0x0
4405 13:25:22.493660 dump params cbt_cs
4406 13:25:22.494072 cbt_cs[0][0] = 0x0
4407 13:25:22.496989 cbt_cs[0][1] = 0x0
4408 13:25:22.497372 cbt_cs[1][0] = 0x0
4409 13:25:22.500724 cbt_cs[1][1] = 0x0
4410 13:25:22.501105 dump params cbt_mr12
4411 13:25:22.503609 cbt_mr12[0][0] = 0x0
4412 13:25:22.506489 cbt_mr12[0][1] = 0x0
4413 13:25:22.506891 cbt_mr12[1][0] = 0x0
4414 13:25:22.510100 cbt_mr12[1][1] = 0x0
4415 13:25:22.510497 dump params tx window
4416 13:25:22.512980 tx_center_min[0][0][0] = 0
4417 13:25:22.516788 tx_center_max[0][0][0] = 0
4418 13:25:22.519805 tx_center_min[0][0][1] = 0
4419 13:25:22.520188 tx_center_max[0][0][1] = 0
4420 13:25:22.523058 tx_center_min[0][1][0] = 0
4421 13:25:22.526065 tx_center_max[0][1][0] = 0
4422 13:25:22.529373 tx_center_min[0][1][1] = 0
4423 13:25:22.529752 tx_center_max[0][1][1] = 0
4424 13:25:22.533160 tx_center_min[1][0][0] = 0
4425 13:25:22.536357 tx_center_max[1][0][0] = 0
4426 13:25:22.539617 tx_center_min[1][0][1] = 0
4427 13:25:22.539999 tx_center_max[1][0][1] = 0
4428 13:25:22.542821 tx_center_min[1][1][0] = 0
4429 13:25:22.546255 tx_center_max[1][1][0] = 0
4430 13:25:22.549606 tx_center_min[1][1][1] = 0
4431 13:25:22.550142 tx_center_max[1][1][1] = 0
4432 13:25:22.552572 dump params tx window
4433 13:25:22.555921 tx_win_center[0][0][0] = 0
4434 13:25:22.556303 tx_first_pass[0][0][0] = 0
4435 13:25:22.558755 tx_last_pass[0][0][0] = 0
4436 13:25:22.562377 tx_win_center[0][0][1] = 0
4437 13:25:22.565913 tx_first_pass[0][0][1] = 0
4438 13:25:22.566461 tx_last_pass[0][0][1] = 0
4439 13:25:22.568601 tx_win_center[0][0][2] = 0
4440 13:25:22.572048 tx_first_pass[0][0][2] = 0
4441 13:25:22.572432 tx_last_pass[0][0][2] = 0
4442 13:25:22.575346 tx_win_center[0][0][3] = 0
4443 13:25:22.578854 tx_first_pass[0][0][3] = 0
4444 13:25:22.581824 tx_last_pass[0][0][3] = 0
4445 13:25:22.582327 tx_win_center[0][0][4] = 0
4446 13:25:22.585259 tx_first_pass[0][0][4] = 0
4447 13:25:22.588070 tx_last_pass[0][0][4] = 0
4448 13:25:22.591680 tx_win_center[0][0][5] = 0
4449 13:25:22.592074 tx_first_pass[0][0][5] = 0
4450 13:25:22.594982 tx_last_pass[0][0][5] = 0
4451 13:25:22.598335 tx_win_center[0][0][6] = 0
4452 13:25:22.601807 tx_first_pass[0][0][6] = 0
4453 13:25:22.602335 tx_last_pass[0][0][6] = 0
4454 13:25:22.604692 tx_win_center[0][0][7] = 0
4455 13:25:22.608241 tx_first_pass[0][0][7] = 0
4456 13:25:22.611155 tx_last_pass[0][0][7] = 0
4457 13:25:22.611677 tx_win_center[0][0][8] = 0
4458 13:25:22.614732 tx_first_pass[0][0][8] = 0
4459 13:25:22.618277 tx_last_pass[0][0][8] = 0
4460 13:25:22.618732 tx_win_center[0][0][9] = 0
4461 13:25:22.620929 tx_first_pass[0][0][9] = 0
4462 13:25:22.624763 tx_last_pass[0][0][9] = 0
4463 13:25:22.627915 tx_win_center[0][0][10] = 0
4464 13:25:22.631487 tx_first_pass[0][0][10] = 0
4465 13:25:22.632040 tx_last_pass[0][0][10] = 0
4466 13:25:22.634402 tx_win_center[0][0][11] = 0
4467 13:25:22.637944 tx_first_pass[0][0][11] = 0
4468 13:25:22.641276 tx_last_pass[0][0][11] = 0
4469 13:25:22.641732 tx_win_center[0][0][12] = 0
4470 13:25:22.643986 tx_first_pass[0][0][12] = 0
4471 13:25:22.647293 tx_last_pass[0][0][12] = 0
4472 13:25:22.650907 tx_win_center[0][0][13] = 0
4473 13:25:22.651370 tx_first_pass[0][0][13] = 0
4474 13:25:22.654144 tx_last_pass[0][0][13] = 0
4475 13:25:22.657195 tx_win_center[0][0][14] = 0
4476 13:25:22.660676 tx_first_pass[0][0][14] = 0
4477 13:25:22.661065 tx_last_pass[0][0][14] = 0
4478 13:25:22.663652 tx_win_center[0][0][15] = 0
4479 13:25:22.667153 tx_first_pass[0][0][15] = 0
4480 13:25:22.670715 tx_last_pass[0][0][15] = 0
4481 13:25:22.671106 tx_win_center[0][1][0] = 0
4482 13:25:22.673449 tx_first_pass[0][1][0] = 0
4483 13:25:22.676965 tx_last_pass[0][1][0] = 0
4484 13:25:22.679918 tx_win_center[0][1][1] = 0
4485 13:25:22.680305 tx_first_pass[0][1][1] = 0
4486 13:25:22.683424 tx_last_pass[0][1][1] = 0
4487 13:25:22.686971 tx_win_center[0][1][2] = 0
4488 13:25:22.690310 tx_first_pass[0][1][2] = 0
4489 13:25:22.690720 tx_last_pass[0][1][2] = 0
4490 13:25:22.693726 tx_win_center[0][1][3] = 0
4491 13:25:22.697102 tx_first_pass[0][1][3] = 0
4492 13:25:22.697514 tx_last_pass[0][1][3] = 0
4493 13:25:22.700194 tx_win_center[0][1][4] = 0
4494 13:25:22.703539 tx_first_pass[0][1][4] = 0
4495 13:25:22.706898 tx_last_pass[0][1][4] = 0
4496 13:25:22.707390 tx_win_center[0][1][5] = 0
4497 13:25:22.709695 tx_first_pass[0][1][5] = 0
4498 13:25:22.713116 tx_last_pass[0][1][5] = 0
4499 13:25:22.715984 tx_win_center[0][1][6] = 0
4500 13:25:22.716250 tx_first_pass[0][1][6] = 0
4501 13:25:22.719344 tx_last_pass[0][1][6] = 0
4502 13:25:22.722676 tx_win_center[0][1][7] = 0
4503 13:25:22.726280 tx_first_pass[0][1][7] = 0
4504 13:25:22.726480 tx_last_pass[0][1][7] = 0
4505 13:25:22.729043 tx_win_center[0][1][8] = 0
4506 13:25:22.732522 tx_first_pass[0][1][8] = 0
4507 13:25:22.736057 tx_last_pass[0][1][8] = 0
4508 13:25:22.736225 tx_win_center[0][1][9] = 0
4509 13:25:22.739526 tx_first_pass[0][1][9] = 0
4510 13:25:22.742167 tx_last_pass[0][1][9] = 0
4511 13:25:22.742245 tx_win_center[0][1][10] = 0
4512 13:25:22.745740 tx_first_pass[0][1][10] = 0
4513 13:25:22.748647 tx_last_pass[0][1][10] = 0
4514 13:25:22.752152 tx_win_center[0][1][11] = 0
4515 13:25:22.755471 tx_first_pass[0][1][11] = 0
4516 13:25:22.755547 tx_last_pass[0][1][11] = 0
4517 13:25:22.758978 tx_win_center[0][1][12] = 0
4518 13:25:22.761714 tx_first_pass[0][1][12] = 0
4519 13:25:22.765322 tx_last_pass[0][1][12] = 0
4520 13:25:22.765399 tx_win_center[0][1][13] = 0
4521 13:25:22.768413 tx_first_pass[0][1][13] = 0
4522 13:25:22.771866 tx_last_pass[0][1][13] = 0
4523 13:25:22.775472 tx_win_center[0][1][14] = 0
4524 13:25:22.775555 tx_first_pass[0][1][14] = 0
4525 13:25:22.778621 tx_last_pass[0][1][14] = 0
4526 13:25:22.781787 tx_win_center[0][1][15] = 0
4527 13:25:22.785079 tx_first_pass[0][1][15] = 0
4528 13:25:22.785180 tx_last_pass[0][1][15] = 0
4529 13:25:22.788340 tx_win_center[1][0][0] = 0
4530 13:25:22.791403 tx_first_pass[1][0][0] = 0
4531 13:25:22.794950 tx_last_pass[1][0][0] = 0
4532 13:25:22.795067 tx_win_center[1][0][1] = 0
4533 13:25:22.797965 tx_first_pass[1][0][1] = 0
4534 13:25:22.801690 tx_last_pass[1][0][1] = 0
4535 13:25:22.805345 tx_win_center[1][0][2] = 0
4536 13:25:22.805490 tx_first_pass[1][0][2] = 0
4537 13:25:22.808189 tx_last_pass[1][0][2] = 0
4538 13:25:22.811517 tx_win_center[1][0][3] = 0
4539 13:25:22.814780 tx_first_pass[1][0][3] = 0
4540 13:25:22.814975 tx_last_pass[1][0][3] = 0
4541 13:25:22.817589 tx_win_center[1][0][4] = 0
4542 13:25:22.821172 tx_first_pass[1][0][4] = 0
4543 13:25:22.821247 tx_last_pass[1][0][4] = 0
4544 13:25:22.824537 tx_win_center[1][0][5] = 0
4545 13:25:22.827882 tx_first_pass[1][0][5] = 0
4546 13:25:22.830818 tx_last_pass[1][0][5] = 0
4547 13:25:22.830893 tx_win_center[1][0][6] = 0
4548 13:25:22.834232 tx_first_pass[1][0][6] = 0
4549 13:25:22.837751 tx_last_pass[1][0][6] = 0
4550 13:25:22.840552 tx_win_center[1][0][7] = 0
4551 13:25:22.840650 tx_first_pass[1][0][7] = 0
4552 13:25:22.844095 tx_last_pass[1][0][7] = 0
4553 13:25:22.847723 tx_win_center[1][0][8] = 0
4554 13:25:22.850447 tx_first_pass[1][0][8] = 0
4555 13:25:22.850514 tx_last_pass[1][0][8] = 0
4556 13:25:22.853908 tx_win_center[1][0][9] = 0
4557 13:25:22.856851 tx_first_pass[1][0][9] = 0
4558 13:25:22.856914 tx_last_pass[1][0][9] = 0
4559 13:25:22.860386 tx_win_center[1][0][10] = 0
4560 13:25:22.863742 tx_first_pass[1][0][10] = 0
4561 13:25:22.867328 tx_last_pass[1][0][10] = 0
4562 13:25:22.870125 tx_win_center[1][0][11] = 0
4563 13:25:22.870216 tx_first_pass[1][0][11] = 0
4564 13:25:22.873567 tx_last_pass[1][0][11] = 0
4565 13:25:22.877040 tx_win_center[1][0][12] = 0
4566 13:25:22.879940 tx_first_pass[1][0][12] = 0
4567 13:25:22.880019 tx_last_pass[1][0][12] = 0
4568 13:25:22.883362 tx_win_center[1][0][13] = 0
4569 13:25:22.886829 tx_first_pass[1][0][13] = 0
4570 13:25:22.890410 tx_last_pass[1][0][13] = 0
4571 13:25:22.890485 tx_win_center[1][0][14] = 0
4572 13:25:22.893439 tx_first_pass[1][0][14] = 0
4573 13:25:22.896883 tx_last_pass[1][0][14] = 0
4574 13:25:22.899890 tx_win_center[1][0][15] = 0
4575 13:25:22.899965 tx_first_pass[1][0][15] = 0
4576 13:25:22.903290 tx_last_pass[1][0][15] = 0
4577 13:25:22.906572 tx_win_center[1][1][0] = 0
4578 13:25:22.909668 tx_first_pass[1][1][0] = 0
4579 13:25:22.909744 tx_last_pass[1][1][0] = 0
4580 13:25:22.912670 tx_win_center[1][1][1] = 0
4581 13:25:22.916242 tx_first_pass[1][1][1] = 0
4582 13:25:22.919571 tx_last_pass[1][1][1] = 0
4583 13:25:22.919646 tx_win_center[1][1][2] = 0
4584 13:25:22.922637 tx_first_pass[1][1][2] = 0
4585 13:25:22.925826 tx_last_pass[1][1][2] = 0
4586 13:25:22.928883 tx_win_center[1][1][3] = 0
4587 13:25:22.928972 tx_first_pass[1][1][3] = 0
4588 13:25:22.933172 tx_last_pass[1][1][3] = 0
4589 13:25:22.936131 tx_win_center[1][1][4] = 0
4590 13:25:22.939058 tx_first_pass[1][1][4] = 0
4591 13:25:22.939135 tx_last_pass[1][1][4] = 0
4592 13:25:22.941916 tx_win_center[1][1][5] = 0
4593 13:25:22.945458 tx_first_pass[1][1][5] = 0
4594 13:25:22.945563 tx_last_pass[1][1][5] = 0
4595 13:25:22.948890 tx_win_center[1][1][6] = 0
4596 13:25:22.951810 tx_first_pass[1][1][6] = 0
4597 13:25:22.955060 tx_last_pass[1][1][6] = 0
4598 13:25:22.955136 tx_win_center[1][1][7] = 0
4599 13:25:22.958690 tx_first_pass[1][1][7] = 0
4600 13:25:22.961508 tx_last_pass[1][1][7] = 0
4601 13:25:22.965041 tx_win_center[1][1][8] = 0
4602 13:25:22.965117 tx_first_pass[1][1][8] = 0
4603 13:25:22.968455 tx_last_pass[1][1][8] = 0
4604 13:25:22.971902 tx_win_center[1][1][9] = 0
4605 13:25:22.974790 tx_first_pass[1][1][9] = 0
4606 13:25:22.974885 tx_last_pass[1][1][9] = 0
4607 13:25:22.978274 tx_win_center[1][1][10] = 0
4608 13:25:22.981176 tx_first_pass[1][1][10] = 0
4609 13:25:22.984751 tx_last_pass[1][1][10] = 0
4610 13:25:22.984822 tx_win_center[1][1][11] = 0
4611 13:25:22.988225 tx_first_pass[1][1][11] = 0
4612 13:25:22.990989 tx_last_pass[1][1][11] = 0
4613 13:25:22.994745 tx_win_center[1][1][12] = 0
4614 13:25:22.994825 tx_first_pass[1][1][12] = 0
4615 13:25:22.997919 tx_last_pass[1][1][12] = 0
4616 13:25:23.000901 tx_win_center[1][1][13] = 0
4617 13:25:23.004071 tx_first_pass[1][1][13] = 0
4618 13:25:23.007358 tx_last_pass[1][1][13] = 0
4619 13:25:23.007433 tx_win_center[1][1][14] = 0
4620 13:25:23.010748 tx_first_pass[1][1][14] = 0
4621 13:25:23.014322 tx_last_pass[1][1][14] = 0
4622 13:25:23.017546 tx_win_center[1][1][15] = 0
4623 13:25:23.017615 tx_first_pass[1][1][15] = 0
4624 13:25:23.020737 tx_last_pass[1][1][15] = 0
4625 13:25:23.023908 dump params rx window
4626 13:25:23.023998 rx_firspass[0][0][0] = 0
4627 13:25:23.027282 rx_lastpass[0][0][0] = 0
4628 13:25:23.030376 rx_firspass[0][0][1] = 0
4629 13:25:23.030477 rx_lastpass[0][0][1] = 0
4630 13:25:23.033678 rx_firspass[0][0][2] = 0
4631 13:25:23.036968 rx_lastpass[0][0][2] = 0
4632 13:25:23.040304 rx_firspass[0][0][3] = 0
4633 13:25:23.040379 rx_lastpass[0][0][3] = 0
4634 13:25:23.043917 rx_firspass[0][0][4] = 0
4635 13:25:23.046738 rx_lastpass[0][0][4] = 0
4636 13:25:23.046814 rx_firspass[0][0][5] = 0
4637 13:25:23.050366 rx_lastpass[0][0][5] = 0
4638 13:25:23.053291 rx_firspass[0][0][6] = 0
4639 13:25:23.053385 rx_lastpass[0][0][6] = 0
4640 13:25:23.056577 rx_firspass[0][0][7] = 0
4641 13:25:23.060082 rx_lastpass[0][0][7] = 0
4642 13:25:23.063369 rx_firspass[0][0][8] = 0
4643 13:25:23.063439 rx_lastpass[0][0][8] = 0
4644 13:25:23.066398 rx_firspass[0][0][9] = 0
4645 13:25:23.069831 rx_lastpass[0][0][9] = 0
4646 13:25:23.069924 rx_firspass[0][0][10] = 0
4647 13:25:23.073202 rx_lastpass[0][0][10] = 0
4648 13:25:23.076651 rx_firspass[0][0][11] = 0
4649 13:25:23.079359 rx_lastpass[0][0][11] = 0
4650 13:25:23.079429 rx_firspass[0][0][12] = 0
4651 13:25:23.083049 rx_lastpass[0][0][12] = 0
4652 13:25:23.085829 rx_firspass[0][0][13] = 0
4653 13:25:23.085934 rx_lastpass[0][0][13] = 0
4654 13:25:23.089416 rx_firspass[0][0][14] = 0
4655 13:25:23.092746 rx_lastpass[0][0][14] = 0
4656 13:25:23.096061 rx_firspass[0][0][15] = 0
4657 13:25:23.096154 rx_lastpass[0][0][15] = 0
4658 13:25:23.099457 rx_firspass[0][1][0] = 0
4659 13:25:23.102218 rx_lastpass[0][1][0] = 0
4660 13:25:23.102288 rx_firspass[0][1][1] = 0
4661 13:25:23.105553 rx_lastpass[0][1][1] = 0
4662 13:25:23.109066 rx_firspass[0][1][2] = 0
4663 13:25:23.112503 rx_lastpass[0][1][2] = 0
4664 13:25:23.112599 rx_firspass[0][1][3] = 0
4665 13:25:23.115348 rx_lastpass[0][1][3] = 0
4666 13:25:23.118879 rx_firspass[0][1][4] = 0
4667 13:25:23.118968 rx_lastpass[0][1][4] = 0
4668 13:25:23.121724 rx_firspass[0][1][5] = 0
4669 13:25:23.125048 rx_lastpass[0][1][5] = 0
4670 13:25:23.125155 rx_firspass[0][1][6] = 0
4671 13:25:23.128750 rx_lastpass[0][1][6] = 0
4672 13:25:23.132324 rx_firspass[0][1][7] = 0
4673 13:25:23.134951 rx_lastpass[0][1][7] = 0
4674 13:25:23.135017 rx_firspass[0][1][8] = 0
4675 13:25:23.138241 rx_lastpass[0][1][8] = 0
4676 13:25:23.141615 rx_firspass[0][1][9] = 0
4677 13:25:23.141704 rx_lastpass[0][1][9] = 0
4678 13:25:23.145204 rx_firspass[0][1][10] = 0
4679 13:25:23.148308 rx_lastpass[0][1][10] = 0
4680 13:25:23.148405 rx_firspass[0][1][11] = 0
4681 13:25:23.151236 rx_lastpass[0][1][11] = 0
4682 13:25:23.154767 rx_firspass[0][1][12] = 0
4683 13:25:23.158263 rx_lastpass[0][1][12] = 0
4684 13:25:23.158362 rx_firspass[0][1][13] = 0
4685 13:25:23.161501 rx_lastpass[0][1][13] = 0
4686 13:25:23.164800 rx_firspass[0][1][14] = 0
4687 13:25:23.167984 rx_lastpass[0][1][14] = 0
4688 13:25:23.168077 rx_firspass[0][1][15] = 0
4689 13:25:23.171186 rx_lastpass[0][1][15] = 0
4690 13:25:23.174885 rx_firspass[1][0][0] = 0
4691 13:25:23.174955 rx_lastpass[1][0][0] = 0
4692 13:25:23.178168 rx_firspass[1][0][1] = 0
4693 13:25:23.181334 rx_lastpass[1][0][1] = 0
4694 13:25:23.181403 rx_firspass[1][0][2] = 0
4695 13:25:23.184751 rx_lastpass[1][0][2] = 0
4696 13:25:23.187544 rx_firspass[1][0][3] = 0
4697 13:25:23.190996 rx_lastpass[1][0][3] = 0
4698 13:25:23.191062 rx_firspass[1][0][4] = 0
4699 13:25:23.194496 rx_lastpass[1][0][4] = 0
4700 13:25:23.197185 rx_firspass[1][0][5] = 0
4701 13:25:23.197256 rx_lastpass[1][0][5] = 0
4702 13:25:23.200666 rx_firspass[1][0][6] = 0
4703 13:25:23.204333 rx_lastpass[1][0][6] = 0
4704 13:25:23.204431 rx_firspass[1][0][7] = 0
4705 13:25:23.207117 rx_lastpass[1][0][7] = 0
4706 13:25:23.210453 rx_firspass[1][0][8] = 0
4707 13:25:23.213857 rx_lastpass[1][0][8] = 0
4708 13:25:23.213950 rx_firspass[1][0][9] = 0
4709 13:25:23.217247 rx_lastpass[1][0][9] = 0
4710 13:25:23.220105 rx_firspass[1][0][10] = 0
4711 13:25:23.220194 rx_lastpass[1][0][10] = 0
4712 13:25:23.223671 rx_firspass[1][0][11] = 0
4713 13:25:23.227359 rx_lastpass[1][0][11] = 0
4714 13:25:23.230138 rx_firspass[1][0][12] = 0
4715 13:25:23.230211 rx_lastpass[1][0][12] = 0
4716 13:25:23.233548 rx_firspass[1][0][13] = 0
4717 13:25:23.236764 rx_lastpass[1][0][13] = 0
4718 13:25:23.236844 rx_firspass[1][0][14] = 0
4719 13:25:23.239885 rx_lastpass[1][0][14] = 0
4720 13:25:23.243653 rx_firspass[1][0][15] = 0
4721 13:25:23.246520 rx_lastpass[1][0][15] = 0
4722 13:25:23.246597 rx_firspass[1][1][0] = 0
4723 13:25:23.249907 rx_lastpass[1][1][0] = 0
4724 13:25:23.253085 rx_firspass[1][1][1] = 0
4725 13:25:23.253161 rx_lastpass[1][1][1] = 0
4726 13:25:23.256420 rx_firspass[1][1][2] = 0
4727 13:25:23.259961 rx_lastpass[1][1][2] = 0
4728 13:25:23.260041 rx_firspass[1][1][3] = 0
4729 13:25:23.262914 rx_lastpass[1][1][3] = 0
4730 13:25:23.266135 rx_firspass[1][1][4] = 0
4731 13:25:23.269328 rx_lastpass[1][1][4] = 0
4732 13:25:23.269406 rx_firspass[1][1][5] = 0
4733 13:25:23.272772 rx_lastpass[1][1][5] = 0
4734 13:25:23.276203 rx_firspass[1][1][6] = 0
4735 13:25:23.276300 rx_lastpass[1][1][6] = 0
4736 13:25:23.279611 rx_firspass[1][1][7] = 0
4737 13:25:23.283096 rx_lastpass[1][1][7] = 0
4738 13:25:23.283191 rx_firspass[1][1][8] = 0
4739 13:25:23.285999 rx_lastpass[1][1][8] = 0
4740 13:25:23.289259 rx_firspass[1][1][9] = 0
4741 13:25:23.292578 rx_lastpass[1][1][9] = 0
4742 13:25:23.292655 rx_firspass[1][1][10] = 0
4743 13:25:23.295625 rx_lastpass[1][1][10] = 0
4744 13:25:23.299080 rx_firspass[1][1][11] = 0
4745 13:25:23.299157 rx_lastpass[1][1][11] = 0
4746 13:25:23.302294 rx_firspass[1][1][12] = 0
4747 13:25:23.305708 rx_lastpass[1][1][12] = 0
4748 13:25:23.309154 rx_firspass[1][1][13] = 0
4749 13:25:23.309231 rx_lastpass[1][1][13] = 0
4750 13:25:23.311956 rx_firspass[1][1][14] = 0
4751 13:25:23.315292 rx_lastpass[1][1][14] = 0
4752 13:25:23.315369 rx_firspass[1][1][15] = 0
4753 13:25:23.318793 rx_lastpass[1][1][15] = 0
4754 13:25:23.322232 dump params clk_delay
4755 13:25:23.322299 clk_delay[0] = 0
4756 13:25:23.325053 clk_delay[1] = 0
4757 13:25:23.325145 dump params dqs_delay
4758 13:25:23.328608 dqs_delay[0][0] = 0
4759 13:25:23.328696 dqs_delay[0][1] = 0
4760 13:25:23.332086 dqs_delay[1][0] = 0
4761 13:25:23.334859 dqs_delay[1][1] = 0
4762 13:25:23.334948 dump params delay_cell_unit = 744
4763 13:25:23.338494 dump source = 0x0
4764 13:25:23.341885 dump params frequency:800
4765 13:25:23.341986 dump params rank number:2
4766 13:25:23.342081
4767 13:25:23.345293 dump params write leveling
4768 13:25:23.347926 write leveling[0][0][0] = 0x0
4769 13:25:23.351529 write leveling[0][0][1] = 0x0
4770 13:25:23.355140 write leveling[0][1][0] = 0x0
4771 13:25:23.355234 write leveling[0][1][1] = 0x0
4772 13:25:23.357962 write leveling[1][0][0] = 0x0
4773 13:25:23.361409 write leveling[1][0][1] = 0x0
4774 13:25:23.365031 write leveling[1][1][0] = 0x0
4775 13:25:23.367673 write leveling[1][1][1] = 0x0
4776 13:25:23.367769 dump params cbt_cs
4777 13:25:23.371402 cbt_cs[0][0] = 0x0
4778 13:25:23.371505 cbt_cs[0][1] = 0x0
4779 13:25:23.374502 cbt_cs[1][0] = 0x0
4780 13:25:23.374601 cbt_cs[1][1] = 0x0
4781 13:25:23.377453 dump params cbt_mr12
4782 13:25:23.377527 cbt_mr12[0][0] = 0x0
4783 13:25:23.380864 cbt_mr12[0][1] = 0x0
4784 13:25:23.384470 cbt_mr12[1][0] = 0x0
4785 13:25:23.384560 cbt_mr12[1][1] = 0x0
4786 13:25:23.387608 dump params tx window
4787 13:25:23.390763 tx_center_min[0][0][0] = 0
4788 13:25:23.390914 tx_center_max[0][0][0] = 0
4789 13:25:23.394258 tx_center_min[0][0][1] = 0
4790 13:25:23.397852 tx_center_max[0][0][1] = 0
4791 13:25:23.401027 tx_center_min[0][1][0] = 0
4792 13:25:23.401119 tx_center_max[0][1][0] = 0
4793 13:25:23.404215 tx_center_min[0][1][1] = 0
4794 13:25:23.407247 tx_center_max[0][1][1] = 0
4795 13:25:23.410736 tx_center_min[1][0][0] = 0
4796 13:25:23.410825 tx_center_max[1][0][0] = 0
4797 13:25:23.413900 tx_center_min[1][0][1] = 0
4798 13:25:23.417548 tx_center_max[1][0][1] = 0
4799 13:25:23.420811 tx_center_min[1][1][0] = 0
4800 13:25:23.420910 tx_center_max[1][1][0] = 0
4801 13:25:23.423576 tx_center_min[1][1][1] = 0
4802 13:25:23.427195 tx_center_max[1][1][1] = 0
4803 13:25:23.427368 dump params tx window
4804 13:25:23.430137 tx_win_center[0][0][0] = 0
4805 13:25:23.433819 tx_first_pass[0][0][0] = 0
4806 13:25:23.437167 tx_last_pass[0][0][0] = 0
4807 13:25:23.437242 tx_win_center[0][0][1] = 0
4808 13:25:23.440111 tx_first_pass[0][0][1] = 0
4809 13:25:23.443585 tx_last_pass[0][0][1] = 0
4810 13:25:23.446405 tx_win_center[0][0][2] = 0
4811 13:25:23.446499 tx_first_pass[0][0][2] = 0
4812 13:25:23.450450 tx_last_pass[0][0][2] = 0
4813 13:25:23.453652 tx_win_center[0][0][3] = 0
4814 13:25:23.456329 tx_first_pass[0][0][3] = 0
4815 13:25:23.456428 tx_last_pass[0][0][3] = 0
4816 13:25:23.459970 tx_win_center[0][0][4] = 0
4817 13:25:23.463441 tx_first_pass[0][0][4] = 0
4818 13:25:23.463569 tx_last_pass[0][0][4] = 0
4819 13:25:23.466228 tx_win_center[0][0][5] = 0
4820 13:25:23.469794 tx_first_pass[0][0][5] = 0
4821 13:25:23.472874 tx_last_pass[0][0][5] = 0
4822 13:25:23.472973 tx_win_center[0][0][6] = 0
4823 13:25:23.476402 tx_first_pass[0][0][6] = 0
4824 13:25:23.479754 tx_last_pass[0][0][6] = 0
4825 13:25:23.482994 tx_win_center[0][0][7] = 0
4826 13:25:23.483068 tx_first_pass[0][0][7] = 0
4827 13:25:23.486225 tx_last_pass[0][0][7] = 0
4828 13:25:23.489381 tx_win_center[0][0][8] = 0
4829 13:25:23.492644 tx_first_pass[0][0][8] = 0
4830 13:25:23.492718 tx_last_pass[0][0][8] = 0
4831 13:25:23.495494 tx_win_center[0][0][9] = 0
4832 13:25:23.499156 tx_first_pass[0][0][9] = 0
4833 13:25:23.499236 tx_last_pass[0][0][9] = 0
4834 13:25:23.502265 tx_win_center[0][0][10] = 0
4835 13:25:23.505932 tx_first_pass[0][0][10] = 0
4836 13:25:23.508881 tx_last_pass[0][0][10] = 0
4837 13:25:23.512278 tx_win_center[0][0][11] = 0
4838 13:25:23.512367 tx_first_pass[0][0][11] = 0
4839 13:25:23.515630 tx_last_pass[0][0][11] = 0
4840 13:25:23.519314 tx_win_center[0][0][12] = 0
4841 13:25:23.522711 tx_first_pass[0][0][12] = 0
4842 13:25:23.522801 tx_last_pass[0][0][12] = 0
4843 13:25:23.525747 tx_win_center[0][0][13] = 0
4844 13:25:23.528669 tx_first_pass[0][0][13] = 0
4845 13:25:23.531834 tx_last_pass[0][0][13] = 0
4846 13:25:23.531932 tx_win_center[0][0][14] = 0
4847 13:25:23.535487 tx_first_pass[0][0][14] = 0
4848 13:25:23.538431 tx_last_pass[0][0][14] = 0
4849 13:25:23.541671 tx_win_center[0][0][15] = 0
4850 13:25:23.541767 tx_first_pass[0][0][15] = 0
4851 13:25:23.544895 tx_last_pass[0][0][15] = 0
4852 13:25:23.548458 tx_win_center[0][1][0] = 0
4853 13:25:23.551863 tx_first_pass[0][1][0] = 0
4854 13:25:23.551958 tx_last_pass[0][1][0] = 0
4855 13:25:23.554726 tx_win_center[0][1][1] = 0
4856 13:25:23.557911 tx_first_pass[0][1][1] = 0
4857 13:25:23.561708 tx_last_pass[0][1][1] = 0
4858 13:25:23.561788 tx_win_center[0][1][2] = 0
4859 13:25:23.564285 tx_first_pass[0][1][2] = 0
4860 13:25:23.567772 tx_last_pass[0][1][2] = 0
4861 13:25:23.571364 tx_win_center[0][1][3] = 0
4862 13:25:23.571459 tx_first_pass[0][1][3] = 0
4863 13:25:23.574232 tx_last_pass[0][1][3] = 0
4864 13:25:23.577806 tx_win_center[0][1][4] = 0
4865 13:25:23.580670 tx_first_pass[0][1][4] = 0
4866 13:25:23.580762 tx_last_pass[0][1][4] = 0
4867 13:25:23.584244 tx_win_center[0][1][5] = 0
4868 13:25:23.587732 tx_first_pass[0][1][5] = 0
4869 13:25:23.587797 tx_last_pass[0][1][5] = 0
4870 13:25:23.590984 tx_win_center[0][1][6] = 0
4871 13:25:23.594295 tx_first_pass[0][1][6] = 0
4872 13:25:23.597584 tx_last_pass[0][1][6] = 0
4873 13:25:23.597681 tx_win_center[0][1][7] = 0
4874 13:25:23.600256 tx_first_pass[0][1][7] = 0
4875 13:25:23.603732 tx_last_pass[0][1][7] = 0
4876 13:25:23.607111 tx_win_center[0][1][8] = 0
4877 13:25:23.607204 tx_first_pass[0][1][8] = 0
4878 13:25:23.610672 tx_last_pass[0][1][8] = 0
4879 13:25:23.613766 tx_win_center[0][1][9] = 0
4880 13:25:23.616794 tx_first_pass[0][1][9] = 0
4881 13:25:23.616884 tx_last_pass[0][1][9] = 0
4882 13:25:23.620781 tx_win_center[0][1][10] = 0
4883 13:25:23.623750 tx_first_pass[0][1][10] = 0
4884 13:25:23.627277 tx_last_pass[0][1][10] = 0
4885 13:25:23.627352 tx_win_center[0][1][11] = 0
4886 13:25:23.630138 tx_first_pass[0][1][11] = 0
4887 13:25:23.633553 tx_last_pass[0][1][11] = 0
4888 13:25:23.636390 tx_win_center[0][1][12] = 0
4889 13:25:23.636481 tx_first_pass[0][1][12] = 0
4890 13:25:23.639901 tx_last_pass[0][1][12] = 0
4891 13:25:23.643703 tx_win_center[0][1][13] = 0
4892 13:25:23.646503 tx_first_pass[0][1][13] = 0
4893 13:25:23.646578 tx_last_pass[0][1][13] = 0
4894 13:25:23.649816 tx_win_center[0][1][14] = 0
4895 13:25:23.652780 tx_first_pass[0][1][14] = 0
4896 13:25:23.656179 tx_last_pass[0][1][14] = 0
4897 13:25:23.659764 tx_win_center[0][1][15] = 0
4898 13:25:23.659839 tx_first_pass[0][1][15] = 0
4899 13:25:23.663211 tx_last_pass[0][1][15] = 0
4900 13:25:23.666161 tx_win_center[1][0][0] = 0
4901 13:25:23.669935 tx_first_pass[1][0][0] = 0
4902 13:25:23.670032 tx_last_pass[1][0][0] = 0
4903 13:25:23.672780 tx_win_center[1][0][1] = 0
4904 13:25:23.676004 tx_first_pass[1][0][1] = 0
4905 13:25:23.676079 tx_last_pass[1][0][1] = 0
4906 13:25:23.679868 tx_win_center[1][0][2] = 0
4907 13:25:23.682581 tx_first_pass[1][0][2] = 0
4908 13:25:23.686180 tx_last_pass[1][0][2] = 0
4909 13:25:23.686255 tx_win_center[1][0][3] = 0
4910 13:25:23.689070 tx_first_pass[1][0][3] = 0
4911 13:25:23.692740 tx_last_pass[1][0][3] = 0
4912 13:25:23.695682 tx_win_center[1][0][4] = 0
4913 13:25:23.695782 tx_first_pass[1][0][4] = 0
4914 13:25:23.698920 tx_last_pass[1][0][4] = 0
4915 13:25:23.702315 tx_win_center[1][0][5] = 0
4916 13:25:23.705564 tx_first_pass[1][0][5] = 0
4917 13:25:23.705638 tx_last_pass[1][0][5] = 0
4918 13:25:23.708892 tx_win_center[1][0][6] = 0
4919 13:25:23.712364 tx_first_pass[1][0][6] = 0
4920 13:25:23.712457 tx_last_pass[1][0][6] = 0
4921 13:25:23.715339 tx_win_center[1][0][7] = 0
4922 13:25:23.718696 tx_first_pass[1][0][7] = 0
4923 13:25:23.722031 tx_last_pass[1][0][7] = 0
4924 13:25:23.722121 tx_win_center[1][0][8] = 0
4925 13:25:23.725029 tx_first_pass[1][0][8] = 0
4926 13:25:23.728669 tx_last_pass[1][0][8] = 0
4927 13:25:23.731572 tx_win_center[1][0][9] = 0
4928 13:25:23.731648 tx_first_pass[1][0][9] = 0
4929 13:25:23.735094 tx_last_pass[1][0][9] = 0
4930 13:25:23.738269 tx_win_center[1][0][10] = 0
4931 13:25:23.741914 tx_first_pass[1][0][10] = 0
4932 13:25:23.742039 tx_last_pass[1][0][10] = 0
4933 13:25:23.745483 tx_win_center[1][0][11] = 0
4934 13:25:23.748285 tx_first_pass[1][0][11] = 0
4935 13:25:23.751960 tx_last_pass[1][0][11] = 0
4936 13:25:23.752035 tx_win_center[1][0][12] = 0
4937 13:25:23.754918 tx_first_pass[1][0][12] = 0
4938 13:25:23.757909 tx_last_pass[1][0][12] = 0
4939 13:25:23.762009 tx_win_center[1][0][13] = 0
4940 13:25:23.762114 tx_first_pass[1][0][13] = 0
4941 13:25:23.764447 tx_last_pass[1][0][13] = 0
4942 13:25:23.767748 tx_win_center[1][0][14] = 0
4943 13:25:23.770935 tx_first_pass[1][0][14] = 0
4944 13:25:23.774638 tx_last_pass[1][0][14] = 0
4945 13:25:23.774714 tx_win_center[1][0][15] = 0
4946 13:25:23.778168 tx_first_pass[1][0][15] = 0
4947 13:25:23.781057 tx_last_pass[1][0][15] = 0
4948 13:25:23.784178 tx_win_center[1][1][0] = 0
4949 13:25:23.784254 tx_first_pass[1][1][0] = 0
4950 13:25:23.787321 tx_last_pass[1][1][0] = 0
4951 13:25:23.790772 tx_win_center[1][1][1] = 0
4952 13:25:23.794097 tx_first_pass[1][1][1] = 0
4953 13:25:23.794190 tx_last_pass[1][1][1] = 0
4954 13:25:23.797383 tx_win_center[1][1][2] = 0
4955 13:25:23.800405 tx_first_pass[1][1][2] = 0
4956 13:25:23.800499 tx_last_pass[1][1][2] = 0
4957 13:25:23.803731 tx_win_center[1][1][3] = 0
4958 13:25:23.807229 tx_first_pass[1][1][3] = 0
4959 13:25:23.810238 tx_last_pass[1][1][3] = 0
4960 13:25:23.810362 tx_win_center[1][1][4] = 0
4961 13:25:23.813644 tx_first_pass[1][1][4] = 0
4962 13:25:23.816938 tx_last_pass[1][1][4] = 0
4963 13:25:23.820328 tx_win_center[1][1][5] = 0
4964 13:25:23.820420 tx_first_pass[1][1][5] = 0
4965 13:25:23.823457 tx_last_pass[1][1][5] = 0
4966 13:25:23.827029 tx_win_center[1][1][6] = 0
4967 13:25:23.829919 tx_first_pass[1][1][6] = 0
4968 13:25:23.830003 tx_last_pass[1][1][6] = 0
4969 13:25:23.833326 tx_win_center[1][1][7] = 0
4970 13:25:23.836552 tx_first_pass[1][1][7] = 0
4971 13:25:23.839586 tx_last_pass[1][1][7] = 0
4972 13:25:23.839665 tx_win_center[1][1][8] = 0
4973 13:25:23.843257 tx_first_pass[1][1][8] = 0
4974 13:25:23.846183 tx_last_pass[1][1][8] = 0
4975 13:25:23.846253 tx_win_center[1][1][9] = 0
4976 13:25:23.849345 tx_first_pass[1][1][9] = 0
4977 13:25:23.852656 tx_last_pass[1][1][9] = 0
4978 13:25:23.856145 tx_win_center[1][1][10] = 0
4979 13:25:23.859741 tx_first_pass[1][1][10] = 0
4980 13:25:23.859808 tx_last_pass[1][1][10] = 0
4981 13:25:23.862617 tx_win_center[1][1][11] = 0
4982 13:25:23.865759 tx_first_pass[1][1][11] = 0
4983 13:25:23.869142 tx_last_pass[1][1][11] = 0
4984 13:25:23.869218 tx_win_center[1][1][12] = 0
4985 13:25:23.872826 tx_first_pass[1][1][12] = 0
4986 13:25:23.875915 tx_last_pass[1][1][12] = 0
4987 13:25:23.879114 tx_win_center[1][1][13] = 0
4988 13:25:23.879183 tx_first_pass[1][1][13] = 0
4989 13:25:23.882631 tx_last_pass[1][1][13] = 0
4990 13:25:23.885351 tx_win_center[1][1][14] = 0
4991 13:25:23.888697 tx_first_pass[1][1][14] = 0
4992 13:25:23.888765 tx_last_pass[1][1][14] = 0
4993 13:25:23.892164 tx_win_center[1][1][15] = 0
4994 13:25:23.895682 tx_first_pass[1][1][15] = 0
4995 13:25:23.898608 tx_last_pass[1][1][15] = 0
4996 13:25:23.898684 dump params rx window
4997 13:25:23.901645 rx_firspass[0][0][0] = 0
4998 13:25:23.905282 rx_lastpass[0][0][0] = 0
4999 13:25:23.905360 rx_firspass[0][0][1] = 0
5000 13:25:23.908300 rx_lastpass[0][0][1] = 0
5001 13:25:23.911344 rx_firspass[0][0][2] = 0
5002 13:25:23.914989 rx_lastpass[0][0][2] = 0
5003 13:25:23.915065 rx_firspass[0][0][3] = 0
5004 13:25:23.918081 rx_lastpass[0][0][3] = 0
5005 13:25:23.921347 rx_firspass[0][0][4] = 0
5006 13:25:23.921425 rx_lastpass[0][0][4] = 0
5007 13:25:23.924685 rx_firspass[0][0][5] = 0
5008 13:25:23.928068 rx_lastpass[0][0][5] = 0
5009 13:25:23.928162 rx_firspass[0][0][6] = 0
5010 13:25:23.931501 rx_lastpass[0][0][6] = 0
5011 13:25:23.934442 rx_firspass[0][0][7] = 0
5012 13:25:23.934520 rx_lastpass[0][0][7] = 0
5013 13:25:23.937913 rx_firspass[0][0][8] = 0
5014 13:25:23.941615 rx_lastpass[0][0][8] = 0
5015 13:25:23.944517 rx_firspass[0][0][9] = 0
5016 13:25:23.944593 rx_lastpass[0][0][9] = 0
5017 13:25:23.948112 rx_firspass[0][0][10] = 0
5018 13:25:23.951373 rx_lastpass[0][0][10] = 0
5019 13:25:23.951450 rx_firspass[0][0][11] = 0
5020 13:25:23.954559 rx_lastpass[0][0][11] = 0
5021 13:25:23.957706 rx_firspass[0][0][12] = 0
5022 13:25:23.961114 rx_lastpass[0][0][12] = 0
5023 13:25:23.961198 rx_firspass[0][0][13] = 0
5024 13:25:23.964122 rx_lastpass[0][0][13] = 0
5025 13:25:23.967383 rx_firspass[0][0][14] = 0
5026 13:25:23.970871 rx_lastpass[0][0][14] = 0
5027 13:25:23.970947 rx_firspass[0][0][15] = 0
5028 13:25:23.973733 rx_lastpass[0][0][15] = 0
5029 13:25:23.977314 rx_firspass[0][1][0] = 0
5030 13:25:23.977392 rx_lastpass[0][1][0] = 0
5031 13:25:23.980719 rx_firspass[0][1][1] = 0
5032 13:25:23.984068 rx_lastpass[0][1][1] = 0
5033 13:25:23.984144 rx_firspass[0][1][2] = 0
5034 13:25:23.986777 rx_lastpass[0][1][2] = 0
5035 13:25:23.990144 rx_firspass[0][1][3] = 0
5036 13:25:23.993404 rx_lastpass[0][1][3] = 0
5037 13:25:23.993514 rx_firspass[0][1][4] = 0
5038 13:25:23.997038 rx_lastpass[0][1][4] = 0
5039 13:25:23.999873 rx_firspass[0][1][5] = 0
5040 13:25:23.999949 rx_lastpass[0][1][5] = 0
5041 13:25:24.003482 rx_firspass[0][1][6] = 0
5042 13:25:24.006641 rx_lastpass[0][1][6] = 0
5043 13:25:24.006717 rx_firspass[0][1][7] = 0
5044 13:25:24.009751 rx_lastpass[0][1][7] = 0
5045 13:25:24.012964 rx_firspass[0][1][8] = 0
5046 13:25:24.016288 rx_lastpass[0][1][8] = 0
5047 13:25:24.016363 rx_firspass[0][1][9] = 0
5048 13:25:24.019642 rx_lastpass[0][1][9] = 0
5049 13:25:24.022866 rx_firspass[0][1][10] = 0
5050 13:25:24.022941 rx_lastpass[0][1][10] = 0
5051 13:25:24.025818 rx_firspass[0][1][11] = 0
5052 13:25:24.029496 rx_lastpass[0][1][11] = 0
5053 13:25:24.032522 rx_firspass[0][1][12] = 0
5054 13:25:24.032598 rx_lastpass[0][1][12] = 0
5055 13:25:24.036181 rx_firspass[0][1][13] = 0
5056 13:25:24.038946 rx_lastpass[0][1][13] = 0
5057 13:25:24.039022 rx_firspass[0][1][14] = 0
5058 13:25:24.042478 rx_lastpass[0][1][14] = 0
5059 13:25:24.045966 rx_firspass[0][1][15] = 0
5060 13:25:24.048902 rx_lastpass[0][1][15] = 0
5061 13:25:24.048980 rx_firspass[1][0][0] = 0
5062 13:25:24.052457 rx_lastpass[1][0][0] = 0
5063 13:25:24.055817 rx_firspass[1][0][1] = 0
5064 13:25:24.055907 rx_lastpass[1][0][1] = 0
5065 13:25:24.058750 rx_firspass[1][0][2] = 0
5066 13:25:24.062124 rx_lastpass[1][0][2] = 0
5067 13:25:24.065489 rx_firspass[1][0][3] = 0
5068 13:25:24.065616 rx_lastpass[1][0][3] = 0
5069 13:25:24.068650 rx_firspass[1][0][4] = 0
5070 13:25:24.072110 rx_lastpass[1][0][4] = 0
5071 13:25:24.072187 rx_firspass[1][0][5] = 0
5072 13:25:24.075299 rx_lastpass[1][0][5] = 0
5073 13:25:24.078499 rx_firspass[1][0][6] = 0
5074 13:25:24.078589 rx_lastpass[1][0][6] = 0
5075 13:25:24.081470 rx_firspass[1][0][7] = 0
5076 13:25:24.085429 rx_lastpass[1][0][7] = 0
5077 13:25:24.085504 rx_firspass[1][0][8] = 0
5078 13:25:24.088226 rx_lastpass[1][0][8] = 0
5079 13:25:24.091605 rx_firspass[1][0][9] = 0
5080 13:25:24.094978 rx_lastpass[1][0][9] = 0
5081 13:25:24.095065 rx_firspass[1][0][10] = 0
5082 13:25:24.098190 rx_lastpass[1][0][10] = 0
5083 13:25:24.101774 rx_firspass[1][0][11] = 0
5084 13:25:24.101849 rx_lastpass[1][0][11] = 0
5085 13:25:24.104674 rx_firspass[1][0][12] = 0
5086 13:25:24.108151 rx_lastpass[1][0][12] = 0
5087 13:25:24.111846 rx_firspass[1][0][13] = 0
5088 13:25:24.111960 rx_lastpass[1][0][13] = 0
5089 13:25:24.114383 rx_firspass[1][0][14] = 0
5090 13:25:24.117864 rx_lastpass[1][0][14] = 0
5091 13:25:24.120797 rx_firspass[1][0][15] = 0
5092 13:25:24.120868 rx_lastpass[1][0][15] = 0
5093 13:25:24.124190 rx_firspass[1][1][0] = 0
5094 13:25:24.127656 rx_lastpass[1][1][0] = 0
5095 13:25:24.127725 rx_firspass[1][1][1] = 0
5096 13:25:24.131164 rx_lastpass[1][1][1] = 0
5097 13:25:24.134481 rx_firspass[1][1][2] = 0
5098 13:25:24.134545 rx_lastpass[1][1][2] = 0
5099 13:25:24.137278 rx_firspass[1][1][3] = 0
5100 13:25:24.140697 rx_lastpass[1][1][3] = 0
5101 13:25:24.140792 rx_firspass[1][1][4] = 0
5102 13:25:24.144384 rx_lastpass[1][1][4] = 0
5103 13:25:24.147491 rx_firspass[1][1][5] = 0
5104 13:25:24.150470 rx_lastpass[1][1][5] = 0
5105 13:25:24.150572 rx_firspass[1][1][6] = 0
5106 13:25:24.153864 rx_lastpass[1][1][6] = 0
5107 13:25:24.157528 rx_firspass[1][1][7] = 0
5108 13:25:24.157627 rx_lastpass[1][1][7] = 0
5109 13:25:24.160410 rx_firspass[1][1][8] = 0
5110 13:25:24.164155 rx_lastpass[1][1][8] = 0
5111 13:25:24.164257 rx_firspass[1][1][9] = 0
5112 13:25:24.167135 rx_lastpass[1][1][9] = 0
5113 13:25:24.170587 rx_firspass[1][1][10] = 0
5114 13:25:24.173746 rx_lastpass[1][1][10] = 0
5115 13:25:24.173840 rx_firspass[1][1][11] = 0
5116 13:25:24.177076 rx_lastpass[1][1][11] = 0
5117 13:25:24.180512 rx_firspass[1][1][12] = 0
5118 13:25:24.183264 rx_lastpass[1][1][12] = 0
5119 13:25:24.183354 rx_firspass[1][1][13] = 0
5120 13:25:24.186550 rx_lastpass[1][1][13] = 0
5121 13:25:24.189948 rx_firspass[1][1][14] = 0
5122 13:25:24.190076 rx_lastpass[1][1][14] = 0
5123 13:25:24.193115 rx_firspass[1][1][15] = 0
5124 13:25:24.196326 rx_lastpass[1][1][15] = 0
5125 13:25:24.196401 dump params clk_delay
5126 13:25:24.199894 clk_delay[0] = 0
5127 13:25:24.199969 clk_delay[1] = 0
5128 13:25:24.203331 dump params dqs_delay
5129 13:25:24.206636 dqs_delay[0][0] = 0
5130 13:25:24.206711 dqs_delay[0][1] = 0
5131 13:25:24.209801 dqs_delay[1][0] = 0
5132 13:25:24.209876 dqs_delay[1][1] = 0
5133 13:25:24.213028 dump params delay_cell_unit = 744
5134 13:25:24.216492 mt_set_emi_preloader end
5135 13:25:24.219265 [mt_mem_init] dram size: 0x100000000, rank number: 2
5136 13:25:24.225976 [complex_mem_test] start addr:0x40000000, len:20480
5137 13:25:24.261322 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5138 13:25:24.268197 [complex_mem_test] start addr:0x80000000, len:20480
5139 13:25:24.304111 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5140 13:25:24.310524 [complex_mem_test] start addr:0xc0000000, len:20480
5141 13:25:24.345914 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5142 13:25:24.352988 [complex_mem_test] start addr:0x56000000, len:8192
5143 13:25:24.369484 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5144 13:25:24.372787 ddr_geometry:1
5145 13:25:24.376153 [complex_mem_test] start addr:0x80000000, len:8192
5146 13:25:24.393613 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5147 13:25:24.396220 dram_init: dram init end (result: 0)
5148 13:25:24.403098 Successfully loaded DRAM blobs and ran DRAM calibration
5149 13:25:24.412662 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5150 13:25:24.412787 CBMEM:
5151 13:25:24.415988 IMD: root @ 00000000fffff000 254 entries.
5152 13:25:24.419274 IMD: root @ 00000000ffffec00 62 entries.
5153 13:25:24.426280 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5154 13:25:24.432489 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5155 13:25:24.435895 in-header: 03 a1 00 00 08 00 00 00
5156 13:25:24.439486 in-data: 84 60 60 10 00 00 00 00
5157 13:25:24.442647 Chrome EC: clear events_b mask to 0x0000000020004000
5158 13:25:24.448933 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5159 13:25:24.453095 in-header: 03 fd 00 00 00 00 00 00
5160 13:25:24.456717 in-data:
5161 13:25:24.459616 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5162 13:25:24.462959 CBFS @ 21000 size 3d4000
5163 13:25:24.466423 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5164 13:25:24.469435 CBFS: Locating 'fallback/ramstage'
5165 13:25:24.472980 CBFS: Found @ offset 10d40 size d563
5166 13:25:24.495288 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5167 13:25:24.507177 Accumulated console time in romstage 13451 ms
5168 13:25:24.507256
5169 13:25:24.507314
5170 13:25:24.517070 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5171 13:25:24.520160 ARM64: Exception handlers installed.
5172 13:25:24.520273 ARM64: Testing exception
5173 13:25:24.523782 ARM64: Done test exception
5174 13:25:24.527150 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5175 13:25:24.529923 Manufacturer: ef
5176 13:25:24.536941 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5177 13:25:24.540301 WARNING: RO_VPD is uninitialized or empty.
5178 13:25:24.543574 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5179 13:25:24.546818 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5180 13:25:24.557433 read SPI 0x550600 0x3a00: 4533 us, 3275 KB/s, 26.200 Mbps
5181 13:25:24.560242 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5182 13:25:24.567017 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5183 13:25:24.567094 Enumerating buses...
5184 13:25:24.573169 Show all devs... Before device enumeration.
5185 13:25:24.573244 Root Device: enabled 1
5186 13:25:24.576575 CPU_CLUSTER: 0: enabled 1
5187 13:25:24.576650 CPU: 00: enabled 1
5188 13:25:24.580239 Compare with tree...
5189 13:25:24.583106 Root Device: enabled 1
5190 13:25:24.583181 CPU_CLUSTER: 0: enabled 1
5191 13:25:24.586524 CPU: 00: enabled 1
5192 13:25:24.589845 Root Device scanning...
5193 13:25:24.593051 root_dev_scan_bus for Root Device
5194 13:25:24.593153 CPU_CLUSTER: 0 enabled
5195 13:25:24.596490 root_dev_scan_bus for Root Device done
5196 13:25:24.603136 scan_bus: scanning of bus Root Device took 10690 usecs
5197 13:25:24.603208 done
5198 13:25:24.606299 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5199 13:25:24.609391 Allocating resources...
5200 13:25:24.612771 Reading resources...
5201 13:25:24.616137 Root Device read_resources bus 0 link: 0
5202 13:25:24.619001 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5203 13:25:24.622536 CPU: 00 missing read_resources
5204 13:25:24.626148 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5205 13:25:24.628955 Root Device read_resources bus 0 link: 0 done
5206 13:25:24.632395 Done reading resources.
5207 13:25:24.635851 Show resources in subtree (Root Device)...After reading.
5208 13:25:24.642572 Root Device child on link 0 CPU_CLUSTER: 0
5209 13:25:24.645571 CPU_CLUSTER: 0 child on link 0 CPU: 00
5210 13:25:24.652037 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5211 13:25:24.655532 CPU: 00
5212 13:25:24.655625 Setting resources...
5213 13:25:24.659071 Root Device assign_resources, bus 0 link: 0
5214 13:25:24.661819 CPU_CLUSTER: 0 missing set_resources
5215 13:25:24.668666 Root Device assign_resources, bus 0 link: 0
5216 13:25:24.668738 Done setting resources.
5217 13:25:24.675000 Show resources in subtree (Root Device)...After assigning values.
5218 13:25:24.678257 Root Device child on link 0 CPU_CLUSTER: 0
5219 13:25:24.681468 CPU_CLUSTER: 0 child on link 0 CPU: 00
5220 13:25:24.691584 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5221 13:25:24.691662 CPU: 00
5222 13:25:24.695109 Done allocating resources.
5223 13:25:24.701220 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5224 13:25:24.701291 Enabling resources...
5225 13:25:24.701376 done.
5226 13:25:24.707901 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5227 13:25:24.707977 Initializing devices...
5228 13:25:24.711419 Root Device init ...
5229 13:25:24.714227 mainboard_init: Starting display init.
5230 13:25:24.717934 ADC[4]: Raw value=75908 ID=0
5231 13:25:24.739569 anx7625_power_on_init: Init interface.
5232 13:25:24.743076 anx7625_disable_pd_protocol: Disabled PD feature.
5233 13:25:24.749427 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5234 13:25:24.796484 anx7625_start_dp_work: Secure OCM version=00
5235 13:25:24.799410 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5236 13:25:24.817131 sp_tx_get_edid_block: EDID Block = 1
5237 13:25:24.934357 Extracted contents:
5238 13:25:24.937093 header: 00 ff ff ff ff ff ff 00
5239 13:25:24.940617 serial number: 06 af 5c 14 00 00 00 00 00 1a
5240 13:25:24.943945 version: 01 04
5241 13:25:24.947526 basic params: 95 1a 0e 78 02
5242 13:25:24.950965 chroma info: 99 85 95 55 56 92 28 22 50 54
5243 13:25:24.953560 established: 00 00 00
5244 13:25:24.960419 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5245 13:25:24.966788 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5246 13:25:24.970383 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5247 13:25:24.976660 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5248 13:25:24.983741 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5249 13:25:24.986647 extensions: 00
5250 13:25:24.986727 checksum: ae
5251 13:25:24.986793
5252 13:25:24.993594 Manufacturer: AUO Model 145c Serial Number 0
5253 13:25:24.993754 Made week 0 of 2016
5254 13:25:24.996427 EDID version: 1.4
5255 13:25:24.996531 Digital display
5256 13:25:24.999833 6 bits per primary color channel
5257 13:25:25.003477 DisplayPort interface
5258 13:25:25.003561 Maximum image size: 26 cm x 14 cm
5259 13:25:25.006296 Gamma: 220%
5260 13:25:25.006370 Check DPMS levels
5261 13:25:25.009626 Supported color formats: RGB 4:4:4
5262 13:25:25.013026 First detailed timing is preferred timing
5263 13:25:25.016384 Established timings supported:
5264 13:25:25.019867 Standard timings supported:
5265 13:25:25.019943 Detailed timings
5266 13:25:25.026025 Hex of detail: ce1d56ea50001a3030204600009010000018
5267 13:25:25.030034 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5268 13:25:25.036361 0556 0586 05a6 0640 hborder 0
5269 13:25:25.039480 0300 0304 030a 031a vborder 0
5270 13:25:25.042492 -hsync -vsync
5271 13:25:25.042567 Did detailed timing
5272 13:25:25.048959 Hex of detail: 0000000f0000000000000000000000000020
5273 13:25:25.052687 Manufacturer-specified data, tag 15
5274 13:25:25.055278 Hex of detail: 000000fe0041554f0a202020202020202020
5275 13:25:25.055357 ASCII string: AUO
5276 13:25:25.062594 Hex of detail: 000000fe004231313658414230312e34200a
5277 13:25:25.065592 ASCII string: B116XAB01.4
5278 13:25:25.065689 Checksum
5279 13:25:25.065775 Checksum: 0xae (valid)
5280 13:25:25.072278 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5281 13:25:25.075702 DSI data_rate: 457800000 bps
5282 13:25:25.081988 anx7625_parse_edid: set default k value to 0x3d for panel
5283 13:25:25.084798 anx7625_parse_edid: pixelclock(76300).
5284 13:25:25.088334 hactive(1366), hsync(32), hfp(48), hbp(154)
5285 13:25:25.091842 vactive(768), vsync(6), vfp(4), vbp(16)
5286 13:25:25.095224 anx7625_dsi_config: config dsi.
5287 13:25:25.102151 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5288 13:25:25.123112 anx7625_dsi_config: success to config DSI
5289 13:25:25.126588 anx7625_dp_start: MIPI phy setup OK.
5290 13:25:25.130134 [SSUSB] Setting up USB HOST controller...
5291 13:25:25.133639 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5292 13:25:25.136406 [SSUSB] phy power-on done.
5293 13:25:25.140697 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5294 13:25:25.143554 in-header: 03 fc 01 00 00 00 00 00
5295 13:25:25.143643 in-data:
5296 13:25:25.150237 handle_proto3_response: EC response with error code: 1
5297 13:25:25.150339 SPM: pcm index = 1
5298 13:25:25.153377 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5299 13:25:25.156774 CBFS @ 21000 size 3d4000
5300 13:25:25.163120 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5301 13:25:25.166770 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5302 13:25:25.169800 CBFS: Found @ offset 1e7c0 size 1026
5303 13:25:25.176517 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5304 13:25:25.180203 SPM: binary array size = 2988
5305 13:25:25.183423 SPM: version = pcm_allinone_v1.17.2_20180829
5306 13:25:25.186490 SPM binary loaded in 32 msecs
5307 13:25:25.194153 spm_kick_im_to_fetch: ptr = 000000004021eec2
5308 13:25:25.197751 spm_kick_im_to_fetch: len = 2988
5309 13:25:25.197869 SPM: spm_kick_pcm_to_run
5310 13:25:25.201256 SPM: spm_kick_pcm_to_run done
5311 13:25:25.204040 SPM: spm_init done in 52 msecs
5312 13:25:25.207622 Root Device init finished in 494984 usecs
5313 13:25:25.211140 CPU_CLUSTER: 0 init ...
5314 13:25:25.220772 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5315 13:25:25.224225 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5316 13:25:25.227110 CBFS @ 21000 size 3d4000
5317 13:25:25.230752 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5318 13:25:25.234049 CBFS: Locating 'sspm.bin'
5319 13:25:25.236857 CBFS: Found @ offset 208c0 size 41cb
5320 13:25:25.247409 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5321 13:25:25.255976 CPU_CLUSTER: 0 init finished in 42801 usecs
5322 13:25:25.256068 Devices initialized
5323 13:25:25.258641 Show all devs... After init.
5324 13:25:25.262176 Root Device: enabled 1
5325 13:25:25.262268 CPU_CLUSTER: 0: enabled 1
5326 13:25:25.265353 CPU: 00: enabled 1
5327 13:25:25.268765 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5328 13:25:25.272151 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5329 13:25:25.274968 ELOG: NV offset 0x558000 size 0x1000
5330 13:25:25.283234 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5331 13:25:25.289700 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5332 13:25:25.292644 ELOG: Event(17) added with size 13 at 2024-07-18 13:25:09 UTC
5333 13:25:25.299527 out: cmd=0x121: 03 db 21 01 00 00 00 00
5334 13:25:25.302402 in-header: 03 cc 00 00 2c 00 00 00
5335 13:25:25.312281 in-data: 8b 4a 00 00 00 00 00 00 02 10 00 00 06 80 00 00 2a 0a 03 00 06 80 00 00 d6 f1 03 00 06 80 00 00 63 11 0a 00 06 80 00 00 51 2b 0b 00
5336 13:25:25.315942 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5337 13:25:25.319409 in-header: 03 19 00 00 08 00 00 00
5338 13:25:25.322226 in-data: a2 e0 47 00 13 00 00 00
5339 13:25:25.325479 Chrome EC: UHEPI supported
5340 13:25:25.332040 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5341 13:25:25.335449 in-header: 03 e1 00 00 08 00 00 00
5342 13:25:25.338858 in-data: 84 20 60 10 00 00 00 00
5343 13:25:25.342365 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5344 13:25:25.348589 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5345 13:25:25.352236 in-header: 03 e1 00 00 08 00 00 00
5346 13:25:25.355044 in-data: 84 20 60 10 00 00 00 00
5347 13:25:25.361871 ELOG: Event(A1) added with size 10 at 2024-07-18 13:25:09 UTC
5348 13:25:25.368699 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5349 13:25:25.374879 ELOG: Event(A0) added with size 9 at 2024-07-18 13:25:09 UTC
5350 13:25:25.378374 elog_add_boot_reason: Logged dev mode boot
5351 13:25:25.378499 Finalize devices...
5352 13:25:25.381880 Devices finalized
5353 13:25:25.384656 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5354 13:25:25.391858 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5355 13:25:25.394921 ELOG: Event(91) added with size 10 at 2024-07-18 13:25:09 UTC
5356 13:25:25.398013 Writing coreboot table at 0xffeda000
5357 13:25:25.405009 0. 0000000000114000-000000000011efff: RAMSTAGE
5358 13:25:25.408338 1. 0000000040000000-000000004023cfff: RAMSTAGE
5359 13:25:25.411732 2. 000000004023d000-00000000545fffff: RAM
5360 13:25:25.414309 3. 0000000054600000-000000005465ffff: BL31
5361 13:25:25.420955 4. 0000000054660000-00000000ffed9fff: RAM
5362 13:25:25.424819 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5363 13:25:25.427520 6. 0000000100000000-000000013fffffff: RAM
5364 13:25:25.430893 Passing 5 GPIOs to payload:
5365 13:25:25.437800 NAME | PORT | POLARITY | VALUE
5366 13:25:25.441147 write protect | 0x00000096 | low | high
5367 13:25:25.444338 EC in RW | 0x000000b1 | high | undefined
5368 13:25:25.450918 EC interrupt | 0x00000097 | low | undefined
5369 13:25:25.453787 TPM interrupt | 0x00000099 | high | undefined
5370 13:25:25.460930 speaker enable | 0x000000af | high | undefined
5371 13:25:25.464184 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5372 13:25:25.467071 in-header: 03 f7 00 00 02 00 00 00
5373 13:25:25.467146 in-data: 04 00
5374 13:25:25.467204 Board ID: 4
5375 13:25:25.470609 ADC[3]: Raw value=213471 ID=1
5376 13:25:25.473977 RAM code: 1
5377 13:25:25.474097 SKU ID: 16
5378 13:25:25.476784 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5379 13:25:25.480078 CBFS @ 21000 size 3d4000
5380 13:25:25.486917 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5381 13:25:25.490247 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 3399
5382 13:25:25.493712 coreboot table: 940 bytes.
5383 13:25:25.496678 IMD ROOT 0. 00000000fffff000 00001000
5384 13:25:25.500285 IMD SMALL 1. 00000000ffffe000 00001000
5385 13:25:25.503137 CONSOLE 2. 00000000fffde000 00020000
5386 13:25:25.509700 FMAP 3. 00000000fffdd000 0000047c
5387 13:25:25.512960 TIME STAMP 4. 00000000fffdc000 00000910
5388 13:25:25.516078 RAMOOPS 5. 00000000ffedc000 00100000
5389 13:25:25.519508 COREBOOT 6. 00000000ffeda000 00002000
5390 13:25:25.519579 IMD small region:
5391 13:25:25.526605 IMD ROOT 0. 00000000ffffec00 00000400
5392 13:25:25.529442 VBOOT WORK 1. 00000000ffffeb00 00000100
5393 13:25:25.532982 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5394 13:25:25.536335 VPD 3. 00000000ffffea60 0000006c
5395 13:25:25.539861 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5396 13:25:25.545829 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5397 13:25:25.549842 in-header: 03 e1 00 00 08 00 00 00
5398 13:25:25.552814 in-data: 84 20 60 10 00 00 00 00
5399 13:25:25.559112 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5400 13:25:25.559188 CBFS @ 21000 size 3d4000
5401 13:25:25.565451 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5402 13:25:25.569252 CBFS: Locating 'fallback/payload'
5403 13:25:25.577194 CBFS: Found @ offset dc040 size 439a0
5404 13:25:25.665020 read SPI 0xfd078 0x439a0: 84441 us, 3279 KB/s, 26.232 Mbps
5405 13:25:25.668745 Checking segment from ROM address 0x0000000040003a00
5406 13:25:25.675012 Checking segment from ROM address 0x0000000040003a1c
5407 13:25:25.678157 Loading segment from ROM address 0x0000000040003a00
5408 13:25:25.681925 code (compression=0)
5409 13:25:25.691090 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5410 13:25:25.698148 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5411 13:25:25.700902 it's not compressed!
5412 13:25:25.704409 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5413 13:25:25.710801 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5414 13:25:25.719100 Loading segment from ROM address 0x0000000040003a1c
5415 13:25:25.722530 Entry Point 0x0000000080000000
5416 13:25:25.722606 Loaded segments
5417 13:25:25.729399 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5418 13:25:25.732644 Jumping to boot code at 0000000080000000(00000000ffeda000)
5419 13:25:25.742621 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5420 13:25:25.748968 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5421 13:25:25.749046 CBFS @ 21000 size 3d4000
5422 13:25:25.755309 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5423 13:25:25.758848 CBFS: Locating 'fallback/bl31'
5424 13:25:25.762243 CBFS: Found @ offset 36dc0 size 5820
5425 13:25:25.773287 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5426 13:25:25.776684 Checking segment from ROM address 0x0000000040003a00
5427 13:25:25.782917 Checking segment from ROM address 0x0000000040003a1c
5428 13:25:25.786232 Loading segment from ROM address 0x0000000040003a00
5429 13:25:25.789650 code (compression=1)
5430 13:25:25.799186 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5431 13:25:25.806230 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5432 13:25:25.806333 using LZMA
5433 13:25:25.815310 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5434 13:25:25.822044 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5435 13:25:25.825217 Loading segment from ROM address 0x0000000040003a1c
5436 13:25:25.828658 Entry Point 0x0000000054601000
5437 13:25:25.828733 Loaded segments
5438 13:25:25.831416 NOTICE: MT8183 bl31_setup
5439 13:25:25.839118 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5440 13:25:25.842072 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5441 13:25:25.845259 INFO: [DEVAPC] dump DEVAPC registers:
5442 13:25:25.855304 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5443 13:25:25.861786 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5444 13:25:25.871677 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5445 13:25:25.878112 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5446 13:25:25.888220 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5447 13:25:25.894630 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5448 13:25:25.904763 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5449 13:25:25.910920 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5450 13:25:25.920973 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5451 13:25:25.927356 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5452 13:25:25.937656 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5453 13:25:25.943772 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5454 13:25:25.953661 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5455 13:25:25.960254 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5456 13:25:25.967243 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5457 13:25:25.973737 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5458 13:25:25.983155 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5459 13:25:25.990132 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5460 13:25:25.996417 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5461 13:25:26.003433 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5462 13:25:26.013293 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5463 13:25:26.019614 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5464 13:25:26.022977 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5465 13:25:26.026333 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5466 13:25:26.029134 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5467 13:25:26.032400 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5468 13:25:26.036310 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5469 13:25:26.042727 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5470 13:25:26.045974 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5471 13:25:26.048792 WARNING: region 0:
5472 13:25:26.052333 WARNING: apc:0x168, sa:0x0, ea:0xfff
5473 13:25:26.052408 WARNING: region 1:
5474 13:25:26.055676 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5475 13:25:26.058948 WARNING: region 2:
5476 13:25:26.061996 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5477 13:25:26.065481 WARNING: region 3:
5478 13:25:26.068843 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5479 13:25:26.068912 WARNING: region 4:
5480 13:25:26.072200 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5481 13:25:26.075175 WARNING: region 5:
5482 13:25:26.078511 WARNING: apc:0x0, sa:0x0, ea:0x0
5483 13:25:26.078589 WARNING: region 6:
5484 13:25:26.081567 WARNING: apc:0x0, sa:0x0, ea:0x0
5485 13:25:26.084972 WARNING: region 7:
5486 13:25:26.088447 WARNING: apc:0x0, sa:0x0, ea:0x0
5487 13:25:26.094965 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5488 13:25:26.098088 INFO: SPM: enable SPMC mode
5489 13:25:26.101599 NOTICE: spm_boot_init() start
5490 13:25:26.104451 NOTICE: spm_boot_init() end
5491 13:25:26.107946 INFO: BL31: Initializing runtime services
5492 13:25:26.111387 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5493 13:25:26.118151 INFO: BL31: Preparing for EL3 exit to normal world
5494 13:25:26.121052 INFO: Entry point address = 0x80000000
5495 13:25:26.124413 INFO: SPSR = 0x8
5496 13:25:26.145542
5497 13:25:26.145747
5498 13:25:26.145836
5499 13:25:26.146431 end: 2.2.3 depthcharge-start (duration 00:00:24) [common]
5500 13:25:26.146553 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5501 13:25:26.146652 Setting prompt string to ['jacuzzi:']
5502 13:25:26.146743 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5503 13:25:26.148723 Starting depthcharge on Juniper...
5504 13:25:26.148799
5505 13:25:26.152000 vboot_handoff: creating legacy vboot_handoff structure
5506 13:25:26.152076
5507 13:25:26.155630 ec_init(0): CrosEC protocol v3 supported (544, 544)
5508 13:25:26.158414
5509 13:25:26.158527 Wipe memory regions:
5510 13:25:26.158586
5511 13:25:26.161914 [0x00000040000000, 0x00000054600000)
5512 13:25:26.204629
5513 13:25:26.204743 [0x00000054660000, 0x00000080000000)
5514 13:25:26.296210
5515 13:25:26.296318 [0x000000811994a0, 0x000000ffeda000)
5516 13:25:26.556644
5517 13:25:26.557043 [0x00000100000000, 0x00000140000000)
5518 13:25:26.688284
5519 13:25:26.692040 Initializing XHCI USB controller at 0x11200000.
5520 13:25:26.715097
5521 13:25:26.717972 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5522 13:25:26.718276
5523 13:25:26.718485
5524 13:25:26.719061 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5525 13:25:26.719325 Sending line: 'tftpboot 192.168.201.1 14879025/tftp-deploy-w3z26uyv/kernel/image.itb 14879025/tftp-deploy-w3z26uyv/kernel/cmdline '
5527 13:25:26.820452 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5528 13:25:26.820808 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5529 13:25:26.825383 jacuzzi: tftpboot 192.168.201.1 14879025/tftp-deploy-w3z26uyv/kernel/image.itp-deploy-w3z26uyv/kernel/cmdline
5530 13:25:26.825774
5531 13:25:26.826119 Waiting for link
5532 13:25:27.228945
5533 13:25:27.229082 R8152: Initializing
5534 13:25:27.229175
5535 13:25:27.232380 Version 9 (ocp_data = 6010)
5536 13:25:27.232474
5537 13:25:27.235992 R8152: Done initializing
5538 13:25:27.236137
5539 13:25:27.236312 Adding net device
5540 13:25:27.621375
5541 13:25:27.621489 done.
5542 13:25:27.621547
5543 13:25:27.621601 MAC: 00:e0:4c:72:3d:a6
5544 13:25:27.621653
5545 13:25:27.624638 Sending DHCP discover... done.
5546 13:25:27.624720
5547 13:25:27.628084 Waiting for reply... done.
5548 13:25:27.628166
5549 13:25:27.630957 Sending DHCP request... done.
5550 13:25:27.631035
5551 13:25:27.631093 Waiting for reply... done.
5552 13:25:27.631147
5553 13:25:27.634466 My ip is 192.168.201.20
5554 13:25:27.634542
5555 13:25:27.637589 The DHCP server ip is 192.168.201.1
5556 13:25:27.637667
5557 13:25:27.640848 TFTP server IP predefined by user: 192.168.201.1
5558 13:25:27.640925
5559 13:25:27.647535 Bootfile predefined by user: 14879025/tftp-deploy-w3z26uyv/kernel/image.itb
5560 13:25:27.647625
5561 13:25:27.650714 Sending tftp read request... done.
5562 13:25:27.650790
5563 13:25:27.654222 Waiting for the transfer...
5564 13:25:27.654301
5565 13:25:27.935260 00000000 ################################################################
5566 13:25:27.935393
5567 13:25:28.198598 00080000 ################################################################
5568 13:25:28.198723
5569 13:25:28.456218 00100000 ################################################################
5570 13:25:28.456370
5571 13:25:28.710518 00180000 ################################################################
5572 13:25:28.710636
5573 13:25:28.961417 00200000 ################################################################
5574 13:25:28.961585
5575 13:25:29.213634 00280000 ################################################################
5576 13:25:29.213819
5577 13:25:29.468573 00300000 ################################################################
5578 13:25:29.468730
5579 13:25:29.721608 00380000 ################################################################
5580 13:25:29.721797
5581 13:25:29.974739 00400000 ################################################################
5582 13:25:29.974896
5583 13:25:30.226533 00480000 ################################################################
5584 13:25:30.226704
5585 13:25:30.482205 00500000 ################################################################
5586 13:25:30.482356
5587 13:25:30.743355 00580000 ################################################################
5588 13:25:30.743497
5589 13:25:31.001216 00600000 ################################################################
5590 13:25:31.001376
5591 13:25:31.258054 00680000 ################################################################
5592 13:25:31.258201
5593 13:25:31.518145 00700000 ################################################################
5594 13:25:31.518282
5595 13:25:31.774456 00780000 ################################################################
5596 13:25:31.774622
5597 13:25:32.032475 00800000 ################################################################
5598 13:25:32.032634
5599 13:25:32.291161 00880000 ################################################################
5600 13:25:32.291292
5601 13:25:32.547726 00900000 ################################################################
5602 13:25:32.547857
5603 13:25:32.799341 00980000 ################################################################
5604 13:25:32.799475
5605 13:25:33.052371 00a00000 ################################################################
5606 13:25:33.052498
5607 13:25:33.300938 00a80000 ################################################################
5608 13:25:33.301078
5609 13:25:33.549067 00b00000 ################################################################
5610 13:25:33.549205
5611 13:25:33.803687 00b80000 ################################################################
5612 13:25:33.803808
5613 13:25:34.053406 00c00000 ################################################################
5614 13:25:34.053529
5615 13:25:34.310117 00c80000 ################################################################
5616 13:25:34.310244
5617 13:25:34.558918 00d00000 ################################################################
5618 13:25:34.559035
5619 13:25:34.820656 00d80000 ################################################################
5620 13:25:34.820808
5621 13:25:35.077968 00e00000 ################################################################
5622 13:25:35.078096
5623 13:25:35.333724 00e80000 ################################################################
5624 13:25:35.333844
5625 13:25:35.603021 00f00000 ################################################################
5626 13:25:35.603149
5627 13:25:35.864698 00f80000 ################################################################
5628 13:25:35.864827
5629 13:25:36.115635 01000000 ################################################################
5630 13:25:36.115757
5631 13:25:36.370563 01080000 ################################################################
5632 13:25:36.370732
5633 13:25:36.620631 01100000 ################################################################
5634 13:25:36.620773
5635 13:25:36.860528 01180000 ################################################################
5636 13:25:36.860663
5637 13:25:37.101895 01200000 ################################################################
5638 13:25:37.102041
5639 13:25:37.348632 01280000 ################################################################
5640 13:25:37.348747
5641 13:25:37.591732 01300000 ################################################################
5642 13:25:37.591849
5643 13:25:37.843162 01380000 ################################################################
5644 13:25:37.843325
5645 13:25:38.077381 01400000 ################################################################
5646 13:25:38.077537
5647 13:25:38.326970 01480000 ################################################################
5648 13:25:38.327118
5649 13:25:38.573824 01500000 ################################################################
5650 13:25:38.573974
5651 13:25:38.815101 01580000 ################################################################
5652 13:25:38.815237
5653 13:25:39.054588 01600000 ################################################################
5654 13:25:39.054715
5655 13:25:39.288959 01680000 ################################################################
5656 13:25:39.289110
5657 13:25:39.549548 01700000 ################################################################
5658 13:25:39.549703
5659 13:25:39.801736 01780000 ################################################################
5660 13:25:39.801877
5661 13:25:40.049909 01800000 ################################################################
5662 13:25:40.050063
5663 13:25:40.304905 01880000 ################################################################
5664 13:25:40.305030
5665 13:25:40.565512 01900000 ################################################################
5666 13:25:40.565658
5667 13:25:40.825202 01980000 ################################################################
5668 13:25:40.825352
5669 13:25:41.088456 01a00000 ################################################################
5670 13:25:41.088608
5671 13:25:41.349681 01a80000 ################################################################
5672 13:25:41.349823
5673 13:25:41.618584 01b00000 ################################################################
5674 13:25:41.618708
5675 13:25:41.884830 01b80000 ################################################################
5676 13:25:41.884995
5677 13:25:42.156005 01c00000 ################################################################
5678 13:25:42.156158
5679 13:25:42.433997 01c80000 ################################################################
5680 13:25:42.434163
5681 13:25:42.682611 01d00000 ################################################################
5682 13:25:42.682765
5683 13:25:42.933232 01d80000 ################################################################
5684 13:25:42.933402
5685 13:25:43.148273 01e00000 ###################################################### done.
5686 13:25:43.148431
5687 13:25:43.151602 The bootfile was 31894766 bytes long.
5688 13:25:43.151712
5689 13:25:43.155081 Sending tftp read request... done.
5690 13:25:43.155199
5691 13:25:43.158309 Waiting for the transfer...
5692 13:25:43.158424
5693 13:25:43.158510 00000000 # done.
5694 13:25:43.158596
5695 13:25:43.168026 Command line loaded dynamically from TFTP file: 14879025/tftp-deploy-w3z26uyv/kernel/cmdline
5696 13:25:43.168179
5697 13:25:43.194264 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14879025/extract-nfsrootfs-bw5t4k0y,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5698 13:25:43.194411
5699 13:25:43.194503 Loading FIT.
5700 13:25:43.194586
5701 13:25:43.197182 Image ramdisk-1 has 18720559 bytes.
5702 13:25:43.197279
5703 13:25:43.200971 Image fdt-1 has 57695 bytes.
5704 13:25:43.201088
5705 13:25:43.204289 Image kernel-1 has 13114469 bytes.
5706 13:25:43.204397
5707 13:25:43.210483 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5708 13:25:43.210610
5709 13:25:43.223680 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5710 13:25:43.223821
5711 13:25:43.230251 Choosing best match conf-1 for compat google,juniper-sku16.
5712 13:25:43.230388
5713 13:25:43.238522 Connected to device vid:did:rid of 1ae0:0028:00
5714 13:25:43.246147
5715 13:25:43.249593 tpm_get_response: command 0x17b, return code 0x0
5716 13:25:43.249687
5717 13:25:43.253168 tpm_cleanup: add release locality here.
5718 13:25:43.253249
5719 13:25:43.255852 Shutting down all USB controllers.
5720 13:25:43.255928
5721 13:25:43.259305 Removing current net device
5722 13:25:43.259425
5723 13:25:43.262741 Exiting depthcharge with code 4 at timestamp: 34156655
5724 13:25:43.262830
5725 13:25:43.265943 LZMA decompressing kernel-1 to 0x80193568
5726 13:25:43.266050
5727 13:25:43.272828 LZMA decompressing kernel-1 to 0x40000000
5728 13:25:45.134946
5729 13:25:45.135059 jumping to kernel
5730 13:25:45.135509 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
5731 13:25:45.135631 start: 2.2.5 auto-login-action (timeout 00:04:08) [common]
5732 13:25:45.135742 Setting prompt string to ['Linux version [0-9]']
5733 13:25:45.135831 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5734 13:25:45.135926 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5735 13:25:45.210012
5736 13:25:45.213297 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5737 13:25:45.216818 start: 2.2.5.1 login-action (timeout 00:04:08) [common]
5738 13:25:45.216943 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5739 13:25:45.217038 Setting prompt string to []
5740 13:25:45.217141 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5741 13:25:45.217242 Using line separator: #'\n'#
5742 13:25:45.217325 No login prompt set.
5743 13:25:45.217420 Parsing kernel messages
5744 13:25:45.217508 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5745 13:25:45.217683 [login-action] Waiting for messages, (timeout 00:04:08)
5746 13:25:45.217777 Waiting using forced prompt support (timeout 00:02:04)
5747 13:25:45.236366 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j272990-arm64-gcc-12-defconfig-arm64-chromebook-fgzcq) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Thu Jul 18 12:53:03 UTC 2024
5748 13:25:45.239749 [ 0.000000] random: crng init done
5749 13:25:45.243245 [ 0.000000] Machine model: Google juniper sku16 board
5750 13:25:45.245958 [ 0.000000] efi: UEFI not found.
5751 13:25:45.256187 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5752 13:25:45.262226 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5753 13:25:45.272320 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5754 13:25:45.275695 [ 0.000000] printk: bootconsole [mtk8250] enabled
5755 13:25:45.283791 [ 0.000000] NUMA: No NUMA configuration found
5756 13:25:45.290695 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5757 13:25:45.297069 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5758 13:25:45.297164 [ 0.000000] Zone ranges:
5759 13:25:45.303878 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5760 13:25:45.307324 [ 0.000000] DMA32 empty
5761 13:25:45.313272 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5762 13:25:45.316549 [ 0.000000] Movable zone start for each node
5763 13:25:45.320004 [ 0.000000] Early memory node ranges
5764 13:25:45.326712 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5765 13:25:45.333039 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5766 13:25:45.339730 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5767 13:25:45.346734 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5768 13:25:45.352929 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5769 13:25:45.359444 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5770 13:25:45.380956 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5771 13:25:45.387311 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5772 13:25:45.393401 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5773 13:25:45.397190 [ 0.000000] psci: probing for conduit method from DT.
5774 13:25:45.403399 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5775 13:25:45.406628 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5776 13:25:45.413601 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5777 13:25:45.416851 [ 0.000000] psci: SMC Calling Convention v1.1
5778 13:25:45.423094 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5779 13:25:45.426226 [ 0.000000] Detected VIPT I-cache on CPU0
5780 13:25:45.432893 [ 0.000000] CPU features: detected: GIC system register CPU interface
5781 13:25:45.439825 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5782 13:25:45.445895 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5783 13:25:45.452896 [ 0.000000] CPU features: detected: ARM erratum 845719
5784 13:25:45.456357 [ 0.000000] alternatives: applying boot alternatives
5785 13:25:45.462466 [ 0.000000] Fallback order for Node 0: 0
5786 13:25:45.469225 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5787 13:25:45.472726 [ 0.000000] Policy zone: Normal
5788 13:25:45.499019 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14879025/extract-nfsrootfs-bw5t4k0y,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5789 13:25:45.511754 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5790 13:25:45.518623 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5791 13:25:45.528372 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5792 13:25:45.534595 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5793 13:25:45.537880 <6>[ 0.000000] software IO TLB: area num 8.
5794 13:25:45.564384 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5795 13:25:45.622962 <6>[ 0.000000] Memory: 3896792K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 261672K reserved, 32768K cma-reserved)
5796 13:25:45.629312 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5797 13:25:45.635527 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5798 13:25:45.638953 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5799 13:25:45.645785 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5800 13:25:45.652059 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5801 13:25:45.658483 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5802 13:25:45.665318 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5803 13:25:45.671731 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5804 13:25:45.678461 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5805 13:25:45.688418 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5806 13:25:45.691249 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5807 13:25:45.697881 <6>[ 0.000000] GICv3: 640 SPIs implemented
5808 13:25:45.701123 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5809 13:25:45.704550 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5810 13:25:45.711507 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5811 13:25:45.717737 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5812 13:25:45.731412 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5813 13:25:45.741135 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5814 13:25:45.747354 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5815 13:25:45.759800 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5816 13:25:45.772738 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5817 13:25:45.779165 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5818 13:25:45.786488 <6>[ 0.009461] Console: colour dummy device 80x25
5819 13:25:45.789550 <6>[ 0.014495] printk: console [tty1] enabled
5820 13:25:45.802774 <6>[ 0.018884] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5821 13:25:45.805830 <6>[ 0.029349] pid_max: default: 32768 minimum: 301
5822 13:25:45.812590 <6>[ 0.034229] LSM: Security Framework initializing
5823 13:25:45.819356 <6>[ 0.039144] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5824 13:25:45.825921 <6>[ 0.046767] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5825 13:25:45.832564 <4>[ 0.055643] cacheinfo: Unable to detect cache hierarchy for CPU 0
5826 13:25:45.842188 <6>[ 0.062271] cblist_init_generic: Setting adjustable number of callback queues.
5827 13:25:45.849134 <6>[ 0.069716] cblist_init_generic: Setting shift to 3 and lim to 1.
5828 13:25:45.855367 <6>[ 0.076069] cblist_init_generic: Setting adjustable number of callback queues.
5829 13:25:45.862707 <6>[ 0.083514] cblist_init_generic: Setting shift to 3 and lim to 1.
5830 13:25:45.865774 <6>[ 0.089914] rcu: Hierarchical SRCU implementation.
5831 13:25:45.871852 <6>[ 0.094940] rcu: Max phase no-delay instances is 1000.
5832 13:25:45.879728 <6>[ 0.102854] EFI services will not be available.
5833 13:25:45.883218 <6>[ 0.107805] smp: Bringing up secondary CPUs ...
5834 13:25:45.893212 <6>[ 0.113065] Detected VIPT I-cache on CPU1
5835 13:25:45.900176 <4>[ 0.113112] cacheinfo: Unable to detect cache hierarchy for CPU 1
5836 13:25:45.906871 <6>[ 0.113119] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5837 13:25:45.912854 <6>[ 0.113151] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5838 13:25:45.916162 <6>[ 0.113634] Detected VIPT I-cache on CPU2
5839 13:25:45.923027 <4>[ 0.113668] cacheinfo: Unable to detect cache hierarchy for CPU 2
5840 13:25:45.929656 <6>[ 0.113673] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5841 13:25:45.936269 <6>[ 0.113684] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5842 13:25:45.942786 <6>[ 0.114130] Detected VIPT I-cache on CPU3
5843 13:25:45.949673 <4>[ 0.114161] cacheinfo: Unable to detect cache hierarchy for CPU 3
5844 13:25:45.956005 <6>[ 0.114166] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5845 13:25:45.962399 <6>[ 0.114177] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5846 13:25:45.965758 <6>[ 0.114751] CPU features: detected: Spectre-v2
5847 13:25:45.972307 <6>[ 0.114762] CPU features: detected: Spectre-BHB
5848 13:25:45.975725 <6>[ 0.114765] CPU features: detected: ARM erratum 858921
5849 13:25:45.981963 <6>[ 0.114771] Detected VIPT I-cache on CPU4
5850 13:25:45.985316 <4>[ 0.114820] cacheinfo: Unable to detect cache hierarchy for CPU 4
5851 13:25:45.995050 <6>[ 0.114828] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5852 13:25:46.002068 <6>[ 0.114836] arch_timer: Enabling local workaround for ARM erratum 858921
5853 13:25:46.005469 <6>[ 0.114847] arch_timer: CPU4: Trapping CNTVCT access
5854 13:25:46.011868 <6>[ 0.114855] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5855 13:25:46.018119 <6>[ 0.115339] Detected VIPT I-cache on CPU5
5856 13:25:46.025081 <4>[ 0.115379] cacheinfo: Unable to detect cache hierarchy for CPU 5
5857 13:25:46.031197 <6>[ 0.115385] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5858 13:25:46.037718 <6>[ 0.115392] arch_timer: Enabling local workaround for ARM erratum 858921
5859 13:25:46.044381 <6>[ 0.115398] arch_timer: CPU5: Trapping CNTVCT access
5860 13:25:46.050971 <6>[ 0.115403] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5861 13:25:46.054575 <6>[ 0.115938] Detected VIPT I-cache on CPU6
5862 13:25:46.061072 <4>[ 0.115984] cacheinfo: Unable to detect cache hierarchy for CPU 6
5863 13:25:46.067804 <6>[ 0.115990] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5864 13:25:46.074443 <6>[ 0.115997] arch_timer: Enabling local workaround for ARM erratum 858921
5865 13:25:46.080909 <6>[ 0.116003] arch_timer: CPU6: Trapping CNTVCT access
5866 13:25:46.087518 <6>[ 0.116008] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5867 13:25:46.090334 <6>[ 0.116539] Detected VIPT I-cache on CPU7
5868 13:25:46.097263 <4>[ 0.116580] cacheinfo: Unable to detect cache hierarchy for CPU 7
5869 13:25:46.103573 <6>[ 0.116587] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5870 13:25:46.110458 <6>[ 0.116594] arch_timer: Enabling local workaround for ARM erratum 858921
5871 13:25:46.116743 <6>[ 0.116600] arch_timer: CPU7: Trapping CNTVCT access
5872 13:25:46.123717 <6>[ 0.116605] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5873 13:25:46.126421 <6>[ 0.116652] smp: Brought up 1 node, 8 CPUs
5874 13:25:46.132994 <6>[ 0.355531] SMP: Total of 8 processors activated.
5875 13:25:46.136531 <6>[ 0.360467] CPU features: detected: 32-bit EL0 Support
5876 13:25:46.143505 <6>[ 0.365837] CPU features: detected: 32-bit EL1 Support
5877 13:25:46.149850 <6>[ 0.371203] CPU features: detected: CRC32 instructions
5878 13:25:46.153280 <6>[ 0.376632] CPU: All CPU(s) started at EL2
5879 13:25:46.159603 <6>[ 0.380970] alternatives: applying system-wide alternatives
5880 13:25:46.163004 <6>[ 0.389010] devtmpfs: initialized
5881 13:25:46.181247 <6>[ 0.397957] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5882 13:25:46.188360 <6>[ 0.407906] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5883 13:25:46.191913 <6>[ 0.415629] pinctrl core: initialized pinctrl subsystem
5884 13:25:46.199742 <6>[ 0.422742] DMI not present or invalid.
5885 13:25:46.205994 <6>[ 0.427110] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5886 13:25:46.213168 <6>[ 0.434017] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5887 13:25:46.223033 <6>[ 0.441545] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5888 13:25:46.229233 <6>[ 0.449795] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5889 13:25:46.235883 <6>[ 0.457970] audit: initializing netlink subsys (disabled)
5890 13:25:46.242294 <5>[ 0.463676] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5891 13:25:46.249099 <6>[ 0.464662] thermal_sys: Registered thermal governor 'step_wise'
5892 13:25:46.255418 <6>[ 0.471643] thermal_sys: Registered thermal governor 'power_allocator'
5893 13:25:46.261799 <6>[ 0.477942] cpuidle: using governor menu
5894 13:25:46.265141 <6>[ 0.488906] NET: Registered PF_QIPCRTR protocol family
5895 13:25:46.272053 <6>[ 0.494401] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5896 13:25:46.278580 <6>[ 0.501498] ASID allocator initialised with 32768 entries
5897 13:25:46.285323 <6>[ 0.508261] Serial: AMBA PL011 UART driver
5898 13:25:46.296296 <4>[ 0.519591] Trying to register duplicate clock ID: 113
5899 13:25:46.355978 <6>[ 0.575876] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5900 13:25:46.370590 <6>[ 0.590263] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5901 13:25:46.373901 <6>[ 0.600024] KASLR enabled
5902 13:25:46.388390 <6>[ 0.607992] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5903 13:25:46.394524 <6>[ 0.614995] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5904 13:25:46.401378 <6>[ 0.621471] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5905 13:25:46.408184 <6>[ 0.628461] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5906 13:25:46.414363 <6>[ 0.634935] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5907 13:25:46.421297 <6>[ 0.641925] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5908 13:25:46.427492 <6>[ 0.648399] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5909 13:25:46.434228 <6>[ 0.655388] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5910 13:25:46.437488 <6>[ 0.662953] ACPI: Interpreter disabled.
5911 13:25:46.447723 <6>[ 0.670931] iommu: Default domain type: Translated
5912 13:25:46.454883 <6>[ 0.676039] iommu: DMA domain TLB invalidation policy: strict mode
5913 13:25:46.457608 <5>[ 0.682668] SCSI subsystem initialized
5914 13:25:46.463876 <6>[ 0.687080] usbcore: registered new interface driver usbfs
5915 13:25:46.470764 <6>[ 0.692808] usbcore: registered new interface driver hub
5916 13:25:46.473885 <6>[ 0.698350] usbcore: registered new device driver usb
5917 13:25:46.481679 <6>[ 0.704649] pps_core: LinuxPPS API ver. 1 registered
5918 13:25:46.491315 <6>[ 0.709835] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5919 13:25:46.494916 <6>[ 0.719160] PTP clock support registered
5920 13:25:46.498212 <6>[ 0.723413] EDAC MC: Ver: 3.0.0
5921 13:25:46.506097 <6>[ 0.729041] FPGA manager framework
5922 13:25:46.512267 <6>[ 0.732726] Advanced Linux Sound Architecture Driver Initialized.
5923 13:25:46.515726 <6>[ 0.739487] vgaarb: loaded
5924 13:25:46.521960 <6>[ 0.742615] clocksource: Switched to clocksource arch_sys_counter
5925 13:25:46.525525 <5>[ 0.749047] VFS: Disk quotas dquot_6.6.0
5926 13:25:46.532392 <6>[ 0.753224] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5927 13:25:46.535394 <6>[ 0.760396] pnp: PnP ACPI: disabled
5928 13:25:46.544291 <6>[ 0.767279] NET: Registered PF_INET protocol family
5929 13:25:46.550798 <6>[ 0.772510] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5930 13:25:46.562415 <6>[ 0.782421] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5931 13:25:46.572450 <6>[ 0.791175] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5932 13:25:46.579318 <6>[ 0.799127] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5933 13:25:46.585529 <6>[ 0.807358] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5934 13:25:46.595596 <6>[ 0.815452] TCP: Hash tables configured (established 32768 bind 32768)
5935 13:25:46.602315 <6>[ 0.822279] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5936 13:25:46.608579 <6>[ 0.829251] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5937 13:25:46.615648 <6>[ 0.836733] NET: Registered PF_UNIX/PF_LOCAL protocol family
5938 13:25:46.621864 <6>[ 0.842835] RPC: Registered named UNIX socket transport module.
5939 13:25:46.624928 <6>[ 0.848979] RPC: Registered udp transport module.
5940 13:25:46.632072 <6>[ 0.853904] RPC: Registered tcp transport module.
5941 13:25:46.638375 <6>[ 0.858827] RPC: Registered tcp NFSv4.1 backchannel transport module.
5942 13:25:46.641913 <6>[ 0.865479] PCI: CLS 0 bytes, default 64
5943 13:25:46.644698 <6>[ 0.869772] Unpacking initramfs...
5944 13:25:46.659455 <6>[ 0.879447] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5945 13:25:46.669376 <6>[ 0.888070] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5946 13:25:46.672696 <6>[ 0.896921] kvm [1]: IPA Size Limit: 40 bits
5947 13:25:46.680298 <6>[ 0.903246] kvm [1]: vgic-v2@c420000
5948 13:25:46.683843 <6>[ 0.907063] kvm [1]: GIC system register CPU interface enabled
5949 13:25:46.690027 <6>[ 0.913238] kvm [1]: vgic interrupt IRQ18
5950 13:25:46.693327 <6>[ 0.917597] kvm [1]: Hyp mode initialized successfully
5951 13:25:46.700927 <5>[ 0.923861] Initialise system trusted keyrings
5952 13:25:46.707302 <6>[ 0.928691] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5953 13:25:46.715645 <6>[ 0.938591] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5954 13:25:46.722804 <5>[ 0.945049] NFS: Registering the id_resolver key type
5955 13:25:46.725811 <5>[ 0.950363] Key type id_resolver registered
5956 13:25:46.732187 <5>[ 0.954775] Key type id_legacy registered
5957 13:25:46.738588 <6>[ 0.959080] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5958 13:25:46.745053 <6>[ 0.966003] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5959 13:25:46.751434 <6>[ 0.973797] 9p: Installing v9fs 9p2000 file system support
5960 13:25:46.779366 <5>[ 1.002415] Key type asymmetric registered
5961 13:25:46.782813 <5>[ 1.006760] Asymmetric key parser 'x509' registered
5962 13:25:46.792292 <6>[ 1.011914] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5963 13:25:46.795963 <6>[ 1.019535] io scheduler mq-deadline registered
5964 13:25:46.798815 <6>[ 1.024295] io scheduler kyber registered
5965 13:25:46.821980 <6>[ 1.045010] EINJ: ACPI disabled.
5966 13:25:46.828308 <4>[ 1.048771] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5967 13:25:46.866784 <6>[ 1.089718] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5968 13:25:46.874896 <6>[ 1.098230] printk: console [ttyS0] disabled
5969 13:25:46.903002 <6>[ 1.122884] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5970 13:25:46.909775 <6>[ 1.132360] printk: console [ttyS0] enabled
5971 13:25:46.913112 <6>[ 1.132360] printk: console [ttyS0] enabled
5972 13:25:46.919240 <6>[ 1.141275] printk: bootconsole [mtk8250] disabled
5973 13:25:46.922686 <6>[ 1.141275] printk: bootconsole [mtk8250] disabled
5974 13:25:46.933020 <3>[ 1.151811] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5975 13:25:46.939124 <3>[ 1.160195] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5976 13:25:46.969149 <6>[ 1.188603] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5977 13:25:46.975473 <6>[ 1.198263] serial serial0: tty port ttyS1 registered
5978 13:25:46.982263 <6>[ 1.204871] SuperH (H)SCI(F) driver initialized
5979 13:25:46.985351 <6>[ 1.210384] msm_serial: driver initialized
5980 13:25:47.000851 <6>[ 1.220725] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5981 13:25:47.010841 <6>[ 1.229328] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5982 13:25:47.017479 <6>[ 1.237899] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5983 13:25:47.027284 <6>[ 1.246467] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5984 13:25:47.037264 <6>[ 1.255134] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5985 13:25:47.043555 <6>[ 1.263808] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5986 13:25:47.053945 <6>[ 1.272548] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5987 13:25:47.060386 <6>[ 1.281287] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5988 13:25:47.070553 <6>[ 1.289848] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5989 13:25:47.080270 <6>[ 1.298654] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5990 13:25:47.088004 <4>[ 1.311085] cacheinfo: Unable to detect cache hierarchy for CPU 0
5991 13:25:47.097710 <6>[ 1.320438] loop: module loaded
5992 13:25:47.109738 <6>[ 1.332367] vsim1: Bringing 1800000uV into 2700000-2700000uV
5993 13:25:47.127742 <6>[ 1.350437] megasas: 07.719.03.00-rc1
5994 13:25:47.136476 <6>[ 1.359298] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5995 13:25:47.151192 <6>[ 1.374002] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5996 13:25:47.168212 <6>[ 1.390761] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5997 13:25:47.224583 <6>[ 1.441004] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5998 13:25:47.265352 <6>[ 1.488586] Freeing initrd memory: 18276K
5999 13:25:47.280576 <4>[ 1.500428] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6000 13:25:47.287526 <4>[ 1.509657] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
6001 13:25:47.293727 <4>[ 1.516354] Hardware name: Google juniper sku16 board (DT)
6002 13:25:47.297165 <4>[ 1.522093] Call trace:
6003 13:25:47.300723 <4>[ 1.524793] dump_backtrace.part.0+0xe0/0xf0
6004 13:25:47.304115 <4>[ 1.529332] show_stack+0x18/0x30
6005 13:25:47.306983 <4>[ 1.532905] dump_stack_lvl+0x64/0x80
6006 13:25:47.313745 <4>[ 1.536825] dump_stack+0x18/0x34
6007 13:25:47.317015 <4>[ 1.540394] sysfs_warn_dup+0x64/0x80
6008 13:25:47.320335 <4>[ 1.544315] sysfs_do_create_link_sd+0xf0/0x100
6009 13:25:47.323870 <4>[ 1.549102] sysfs_create_link+0x20/0x40
6010 13:25:47.330073 <4>[ 1.553281] bus_add_device+0x64/0x120
6011 13:25:47.333588 <4>[ 1.557286] device_add+0x354/0x7ec
6012 13:25:47.337211 <4>[ 1.561033] of_device_add+0x44/0x60
6013 13:25:47.343633 <4>[ 1.564868] of_platform_device_create_pdata+0x90/0x124
6014 13:25:47.346911 <4>[ 1.570350] of_platform_bus_create+0x154/0x380
6015 13:25:47.349971 <4>[ 1.575136] of_platform_populate+0x50/0xfc
6016 13:25:47.357017 <4>[ 1.579574] parse_mtd_partitions+0x1d8/0x4e0
6017 13:25:47.360359 <4>[ 1.584190] mtd_device_parse_register+0xec/0x2e0
6018 13:25:47.363894 <4>[ 1.589151] spi_nor_probe+0x280/0x2f4
6019 13:25:47.370355 <4>[ 1.593156] spi_mem_probe+0x6c/0xc0
6020 13:25:47.373462 <4>[ 1.596989] spi_probe+0x84/0xe4
6021 13:25:47.376985 <4>[ 1.600475] really_probe+0xbc/0x2dc
6022 13:25:47.379782 <4>[ 1.604306] __driver_probe_device+0x78/0x114
6023 13:25:47.386696 <4>[ 1.608917] driver_probe_device+0xd8/0x15c
6024 13:25:47.389926 <4>[ 1.613355] __device_attach_driver+0xb8/0x134
6025 13:25:47.393145 <4>[ 1.618054] bus_for_each_drv+0x7c/0xd4
6026 13:25:47.399881 <4>[ 1.622147] __device_attach+0x9c/0x1a0
6027 13:25:47.403036 <4>[ 1.626237] device_initial_probe+0x14/0x20
6028 13:25:47.406546 <4>[ 1.630676] bus_probe_device+0x98/0xa0
6029 13:25:47.409780 <4>[ 1.634766] device_add+0x3c0/0x7ec
6030 13:25:47.416557 <4>[ 1.638510] __spi_add_device+0x78/0x120
6031 13:25:47.419448 <4>[ 1.642688] spi_add_device+0x44/0x80
6032 13:25:47.423469 <4>[ 1.646605] spi_register_controller+0x704/0xb20
6033 13:25:47.429961 <4>[ 1.651477] devm_spi_register_controller+0x4c/0xac
6034 13:25:47.432713 <4>[ 1.656609] mtk_spi_probe+0x4f4/0x684
6035 13:25:47.436076 <4>[ 1.660614] platform_probe+0x68/0xc0
6036 13:25:47.439491 <4>[ 1.664532] really_probe+0xbc/0x2dc
6037 13:25:47.446179 <4>[ 1.668362] __driver_probe_device+0x78/0x114
6038 13:25:47.449364 <4>[ 1.672973] driver_probe_device+0xd8/0x15c
6039 13:25:47.452852 <4>[ 1.677411] __driver_attach+0x94/0x19c
6040 13:25:47.456224 <4>[ 1.681501] bus_for_each_dev+0x74/0xd0
6041 13:25:47.462704 <4>[ 1.685593] driver_attach+0x24/0x30
6042 13:25:47.466274 <4>[ 1.689422] bus_add_driver+0x154/0x20c
6043 13:25:47.469644 <4>[ 1.693511] driver_register+0x78/0x130
6044 13:25:47.476131 <4>[ 1.697602] __platform_driver_register+0x28/0x34
6045 13:25:47.479349 <4>[ 1.702562] mtk_spi_driver_init+0x1c/0x28
6046 13:25:47.482848 <4>[ 1.706917] do_one_initcall+0x64/0x1dc
6047 13:25:47.486395 <4>[ 1.711008] kernel_init_freeable+0x218/0x284
6048 13:25:47.492655 <4>[ 1.715623] kernel_init+0x24/0x12c
6049 13:25:47.496115 <4>[ 1.719369] ret_from_fork+0x10/0x20
6050 13:25:47.505045 <6>[ 1.728223] tun: Universal TUN/TAP device driver, 1.6
6051 13:25:47.508416 <6>[ 1.734508] thunder_xcv, ver 1.0
6052 13:25:47.514967 <6>[ 1.738028] thunder_bgx, ver 1.0
6053 13:25:47.515056 <6>[ 1.741538] nicpf, ver 1.0
6054 13:25:47.525923 <6>[ 1.745907] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6055 13:25:47.529565 <6>[ 1.753392] hns3: Copyright (c) 2017 Huawei Corporation.
6056 13:25:47.535908 <6>[ 1.758990] hclge is initializing
6057 13:25:47.539359 <6>[ 1.762571] e1000: Intel(R) PRO/1000 Network Driver
6058 13:25:47.546326 <6>[ 1.767708] e1000: Copyright (c) 1999-2006 Intel Corporation.
6059 13:25:47.549913 <6>[ 1.773731] e1000e: Intel(R) PRO/1000 Network Driver
6060 13:25:47.555968 <6>[ 1.778953] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6061 13:25:47.562854 <6>[ 1.785148] igb: Intel(R) Gigabit Ethernet Network Driver
6062 13:25:47.569411 <6>[ 1.790804] igb: Copyright (c) 2007-2014 Intel Corporation.
6063 13:25:47.575815 <6>[ 1.796650] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6064 13:25:47.582789 <6>[ 1.803174] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6065 13:25:47.585877 <6>[ 1.809730] sky2: driver version 1.30
6066 13:25:47.592839 <6>[ 1.814993] usbcore: registered new device driver r8152-cfgselector
6067 13:25:47.598954 <6>[ 1.821537] usbcore: registered new interface driver r8152
6068 13:25:47.605886 <6>[ 1.827366] VFIO - User Level meta-driver version: 0.3
6069 13:25:47.612209 <6>[ 1.835188] mtu3 11201000.usb: uwk - reg:0x420, version:101
6070 13:25:47.619179 <4>[ 1.841061] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6071 13:25:47.625370 <6>[ 1.848345] mtu3 11201000.usb: dr_mode: 1, drd: auto
6072 13:25:47.632099 <6>[ 1.853571] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6073 13:25:47.635530 <6>[ 1.859759] mtu3 11201000.usb: usb3-drd: 0
6074 13:25:47.645674 <6>[ 1.865328] mtu3 11201000.usb: xHCI platform device register success...
6075 13:25:47.652082 <4>[ 1.874012] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6076 13:25:47.658917 <6>[ 1.881958] xhci-mtk 11200000.usb: xHCI Host Controller
6077 13:25:47.665343 <6>[ 1.887462] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6078 13:25:47.672173 <6>[ 1.895187] xhci-mtk 11200000.usb: USB3 root hub has no ports
6079 13:25:47.682306 <6>[ 1.901195] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6080 13:25:47.688476 <6>[ 1.910626] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6081 13:25:47.695196 <6>[ 1.916690] xhci-mtk 11200000.usb: xHCI Host Controller
6082 13:25:47.702365 <6>[ 1.922179] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6083 13:25:47.708444 <6>[ 1.929836] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6084 13:25:47.712055 <6>[ 1.936666] hub 1-0:1.0: USB hub found
6085 13:25:47.715444 <6>[ 1.940695] hub 1-0:1.0: 1 port detected
6086 13:25:47.726432 <6>[ 1.946057] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6087 13:25:47.729297 <6>[ 1.954710] hub 2-0:1.0: USB hub found
6088 13:25:47.739436 <3>[ 1.958737] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6089 13:25:47.746382 <6>[ 1.966654] usbcore: registered new interface driver usb-storage
6090 13:25:47.752270 <6>[ 1.973252] usbcore: registered new device driver onboard-usb-hub
6091 13:25:47.763018 <4>[ 1.982716] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6092 13:25:47.771852 <6>[ 1.994965] mt6397-rtc mt6358-rtc: registered as rtc0
6093 13:25:47.781441 <6>[ 2.000448] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-18T13:25:31 UTC (1721309131)
6094 13:25:47.788052 <6>[ 2.010326] i2c_dev: i2c /dev entries driver
6095 13:25:47.797992 <6>[ 2.016732] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6096 13:25:47.804861 <6>[ 2.025049] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6097 13:25:47.810988 <6>[ 2.033951] i2c 4-0058: Fixed dependency cycle(s) with /panel
6098 13:25:47.818028 <6>[ 2.039984] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6099 13:25:47.836543 <6>[ 2.059384] cpu cpu0: EM: created perf domain
6100 13:25:47.846495 <6>[ 2.064909] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6101 13:25:47.853462 <6>[ 2.076194] cpu cpu4: EM: created perf domain
6102 13:25:47.860241 <6>[ 2.082932] sdhci: Secure Digital Host Controller Interface driver
6103 13:25:47.866433 <6>[ 2.089384] sdhci: Copyright(c) Pierre Ossman
6104 13:25:47.873342 <6>[ 2.094784] Synopsys Designware Multimedia Card Interface Driver
6105 13:25:47.879870 <6>[ 2.095329] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6106 13:25:47.883272 <6>[ 2.101838] sdhci-pltfm: SDHCI platform and OF driver helper
6107 13:25:47.892054 <6>[ 2.114857] ledtrig-cpu: registered to indicate activity on CPUs
6108 13:25:47.899754 <6>[ 2.122565] usbcore: registered new interface driver usbhid
6109 13:25:47.905958 <6>[ 2.128405] usbhid: USB HID core driver
6110 13:25:47.912548 <6>[ 2.132698] spi_master spi2: will run message pump with realtime priority
6111 13:25:47.919366 <4>[ 2.132936] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6112 13:25:47.925609 <4>[ 2.147299] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6113 13:25:47.949728 <6>[ 2.166230] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6114 13:25:47.968769 <6>[ 2.181546] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6115 13:25:47.975479 <4>[ 2.192441] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6116 13:25:47.978327 <6>[ 2.196789] cros-ec-spi spi2.0: Chrome EC device registered
6117 13:25:47.992764 <4>[ 2.212558] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6118 13:25:48.000053 <6>[ 2.223357] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6119 13:25:48.010393 <4>[ 2.224592] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6120 13:25:48.013787 <6>[ 2.232335] mmc0: new HS400 MMC card at address 0001
6121 13:25:48.019851 <4>[ 2.238216] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6122 13:25:48.026831 <6>[ 2.243455] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6123 13:25:48.035044 <6>[ 2.258032] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6124 13:25:48.041894 <6>[ 2.259988] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6125 13:25:48.049063 <6>[ 2.272278] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6126 13:25:48.059085 <6>[ 2.275817] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6127 13:25:48.062530 <6>[ 2.279313] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6128 13:25:48.076156 <6>[ 2.290036] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6129 13:25:48.079523 <6>[ 2.293161] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6130 13:25:48.092430 <6>[ 2.294779] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6131 13:25:48.102427 <6>[ 2.295105] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6132 13:25:48.109257 <6>[ 2.304107] NET: Registered PF_PACKET protocol family
6133 13:25:48.111991 <6>[ 2.336546] 9pnet: Installing 9P2000 support
6134 13:25:48.119018 <5>[ 2.341398] Key type dns_resolver registered
6135 13:25:48.121999 <6>[ 2.346899] registered taskstats version 1
6136 13:25:48.129087 <5>[ 2.351267] Loading compiled-in X.509 certificates
6137 13:25:48.135438 <6>[ 2.354714] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6138 13:25:48.175539 <3>[ 2.394952] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6139 13:25:48.207757 <6>[ 2.424005] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6140 13:25:48.218967 <6>[ 2.438306] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6141 13:25:48.228547 <6>[ 2.446882] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6142 13:25:48.235127 <6>[ 2.455532] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6143 13:25:48.245030 <6>[ 2.464188] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6144 13:25:48.255201 <6>[ 2.472791] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6145 13:25:48.261235 <6>[ 2.481333] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6146 13:25:48.271187 <6>[ 2.489898] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6147 13:25:48.277866 <6>[ 2.499074] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6148 13:25:48.284052 <6>[ 2.506401] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6149 13:25:48.290621 <6>[ 2.513690] hub 1-1:1.0: USB hub found
6150 13:25:48.297467 <6>[ 2.513735] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6151 13:25:48.300642 <6>[ 2.518170] hub 1-1:1.0: 3 ports detected
6152 13:25:48.307386 <6>[ 2.525007] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6153 13:25:48.313723 <6>[ 2.536015] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6154 13:25:48.321277 <6>[ 2.544409] panfrost 13040000.gpu: clock rate = 511999970
6155 13:25:48.331451 <6>[ 2.550105] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6156 13:25:48.340935 <6>[ 2.560361] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6157 13:25:48.347884 <6>[ 2.568395] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6158 13:25:48.360767 <6>[ 2.576828] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6159 13:25:48.367663 <6>[ 2.588905] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6160 13:25:48.379123 <6>[ 2.598377] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6161 13:25:48.388485 <6>[ 2.607458] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6162 13:25:48.398332 <6>[ 2.616632] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6163 13:25:48.408341 <6>[ 2.625762] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6164 13:25:48.415109 <6>[ 2.634890] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6165 13:25:48.424557 <6>[ 2.644193] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6166 13:25:48.434865 <6>[ 2.653494] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6167 13:25:48.444342 <6>[ 2.662973] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6168 13:25:48.454409 <6>[ 2.672448] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6169 13:25:48.463722 <6>[ 2.681575] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6170 13:25:48.534343 <6>[ 2.754179] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6171 13:25:48.544488 <6>[ 2.763056] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6172 13:25:48.554958 <6>[ 2.774815] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6173 13:25:48.598932 <6>[ 2.818757] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6174 13:25:49.259923 <6>[ 3.007000] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6175 13:25:49.269621 <4>[ 3.110093] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6176 13:25:49.276155 <4>[ 3.110110] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6177 13:25:49.282901 <6>[ 3.147640] r8152 1-1.2:1.0 eth0: v1.12.13
6178 13:25:49.289388 <6>[ 3.226642] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6179 13:25:49.296290 <6>[ 3.462974] Console: switching to colour frame buffer device 170x48
6180 13:25:49.302579 <6>[ 3.523579] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6181 13:25:49.324179 <6>[ 3.540868] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6182 13:25:49.342024 <6>[ 3.558162] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6183 13:25:49.351455 <6>[ 3.570917] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6184 13:25:49.358452 <6>[ 3.579338] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6185 13:25:49.371509 <6>[ 3.587057] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6186 13:25:49.388820 <6>[ 3.605335] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6187 13:25:50.551953 <6>[ 4.775035] r8152 1-1.2:1.0 eth0: carrier on
6188 13:25:52.907875 <5>[ 4.794650] Sending DHCP requests .., OK
6189 13:25:52.914628 <6>[ 7.134971] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.20
6190 13:25:52.917923 <6>[ 7.143409] IP-Config: Complete:
6191 13:25:52.930505 <6>[ 7.146981] device=eth0, hwaddr=00:e0:4c:72:3d:a6, ipaddr=192.168.201.20, mask=255.255.255.0, gw=192.168.201.1
6192 13:25:52.940824 <6>[ 7.157881] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4, domain=lava-rack, nis-domain=(none)
6193 13:25:52.952442 <6>[ 7.172241] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6194 13:25:52.961152 <6>[ 7.172251] nameserver0=192.168.201.1
6195 13:25:52.969327 <6>[ 7.192171] clk: Disabling unused clocks
6196 13:25:52.974256 <6>[ 7.200182] ALSA device list:
6197 13:25:52.983665 <6>[ 7.206271] No soundcards found.
6198 13:25:52.992707 <6>[ 7.215367] Freeing unused kernel memory: 8512K
6199 13:25:52.999791 <6>[ 7.222545] Run /init as init process
6200 13:25:53.012058 Loading, please wait...
6201 13:25:53.047397 Starting systemd-udevd version 252.22-1~deb12u1
6202 13:25:53.351122 <3>[ 7.573880] mtk-scp 10500000.scp: invalid resource
6203 13:25:53.357915 <3>[ 7.575608] thermal_sys: Failed to find 'trips' node
6204 13:25:53.364481 <6>[ 7.579010] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6205 13:25:53.370474 <3>[ 7.584186] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6206 13:25:53.377338 <4>[ 7.593376] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6207 13:25:53.387181 <3>[ 7.599117] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6208 13:25:53.396904 <3>[ 7.603836] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6209 13:25:53.403620 <3>[ 7.603847] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6210 13:25:53.416771 <3>[ 7.603851] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6211 13:25:53.423137 <3>[ 7.603857] elan_i2c 2-0015: Error applying setting, reverse things back
6212 13:25:53.433369 <4>[ 7.609744] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6213 13:25:53.436209 <6>[ 7.610051] remoteproc remoteproc0: scp is available
6214 13:25:53.446327 <4>[ 7.610136] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6215 13:25:53.449696 <6>[ 7.610142] remoteproc remoteproc0: powering up scp
6216 13:25:53.459395 <4>[ 7.610158] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6217 13:25:53.466304 <3>[ 7.610161] remoteproc remoteproc0: request_firmware failed: -2
6218 13:25:53.475914 <6>[ 7.611174] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6219 13:25:53.482490 <4>[ 7.614821] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6220 13:25:53.489343 <3>[ 7.616593] thermal_sys: Failed to find 'trips' node
6221 13:25:53.495731 <3>[ 7.632555] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6222 13:25:53.502326 <3>[ 7.643373] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6223 13:25:53.512959 <3>[ 7.643386] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6224 13:25:53.519854 <4>[ 7.643391] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6225 13:25:53.529887 <4>[ 7.651395] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6226 13:25:53.539786 <3>[ 7.652370] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6227 13:25:53.542562 <6>[ 7.662086] mc: Linux media interface: v0.10
6228 13:25:53.552565 <6>[ 7.663158] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6229 13:25:53.562952 <3>[ 7.664883] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6230 13:25:53.572603 <6>[ 7.665494] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6231 13:25:53.582927 <3>[ 7.677578] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6232 13:25:53.589488 <6>[ 7.687371] cs_system_cfg: CoreSight Configuration manager initialised
6233 13:25:53.599214 <3>[ 7.688879] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6234 13:25:53.609239 <5>[ 7.689969] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6235 13:25:53.615962 <5>[ 7.698344] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6236 13:25:53.625733 <3>[ 7.703045] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6237 13:25:53.628825 <6>[ 7.707138] videodev: Linux video capture interface: v2.00
6238 13:25:53.642347 <3>[ 7.707425] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6239 13:25:53.652342 <6>[ 7.707466] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6240 13:25:53.658679 <6>[ 7.707554] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6241 13:25:53.665339 <6>[ 7.707611] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6242 13:25:53.674880 <6>[ 7.710653] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6243 13:25:53.681919 <5>[ 7.711073] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6244 13:25:53.691525 <4>[ 7.711136] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6245 13:25:53.697952 <6>[ 7.711142] cfg80211: failed to load regulatory.db
6246 13:25:53.704815 <3>[ 7.715870] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6247 13:25:53.714525 <6>[ 7.717512] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6248 13:25:53.721081 <6>[ 7.731712] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6249 13:25:53.731820 <3>[ 7.732463] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6250 13:25:53.738327 <6>[ 7.740992] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6251 13:25:53.748559 <3>[ 7.748490] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6252 13:25:53.758046 <6>[ 7.758481] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6253 13:25:53.768074 <6>[ 7.774485] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6254 13:25:53.774613 <6>[ 7.782327] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6255 13:25:53.778395 <6>[ 7.838055] Bluetooth: Core ver 2.22
6256 13:25:53.784594 <6>[ 7.839047] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6257 13:25:53.791575 <6>[ 7.844783] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6258 13:25:53.797704 <6>[ 7.852609] NET: Registered PF_BLUETOOTH protocol family
6259 13:25:53.805029 <6>[ 7.858531] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6260 13:25:53.814617 <6>[ 7.859140] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6261 13:25:53.821269 <6>[ 7.870770] Bluetooth: HCI device and connection manager initialized
6262 13:25:53.830587 <6>[ 7.879416] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video1 (81,1)
6263 13:25:53.833970 <6>[ 7.886548] Bluetooth: HCI socket layer initialized
6264 13:25:53.847479 <3>[ 7.886976] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6265 13:25:53.854956 <3>[ 7.887850] debugfs: File 'Playback' in directory 'dapm' already present!
6266 13:25:53.862267 <3>[ 7.887858] debugfs: File 'Capture' in directory 'dapm' already present!
6267 13:25:53.871750 <6>[ 7.889479] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6268 13:25:53.886096 <6>[ 7.895637] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6269 13:25:53.889232 <6>[ 7.902394] Bluetooth: L2CAP socket layer initialized
6270 13:25:53.895993 <6>[ 7.911092] usbcore: registered new interface driver uvcvideo
6271 13:25:53.902196 <6>[ 7.919584] Bluetooth: SCO socket layer initialized
6272 13:25:53.912136 <6>[ 7.951687] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6273 13:25:53.919038 <6>[ 7.996073] Bluetooth: HCI UART driver ver 2.3
6274 13:25:53.925151 <6>[ 8.003892] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6275 13:25:53.932241 <6>[ 8.007623] Bluetooth: HCI UART protocol H4 registered
6276 13:25:53.945302 <6>[ 8.014175] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6277 13:25:53.951790 <6>[ 8.020895] Bluetooth: HCI UART protocol LL registered
6278 13:25:53.958801 <4>[ 8.072228] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6279 13:25:53.965322 <4>[ 8.072228] Fallback method does not support PEC.
6280 13:25:53.971639 <6>[ 8.075781] Bluetooth: HCI UART protocol Three-wire (H5) registered
6281 13:25:53.978529 <3>[ 8.085557] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6282 13:25:53.985309 <6>[ 8.090087] Bluetooth: HCI UART protocol Broadcom registered
6283 13:25:53.995260 <3>[ 8.107032] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6284 13:25:54.001825 <6>[ 8.112264] Bluetooth: HCI UART protocol QCA registered
6285 13:25:54.008450 <6>[ 8.113735] Bluetooth: hci0: setting up ROME/QCA6390
6286 13:25:54.015151 <6>[ 8.175040] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6287 13:25:54.021955 <6>[ 8.178659] Bluetooth: HCI UART protocol Marvell registered
6288 13:25:54.084582 Begin: Loading essential drivers ... done.
6289 13:25:54.088031 Begin: Running /scripts/init-premount ... done.
6290 13:25:54.094699 Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
6291 13:25:54.108251 Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to <3>[ 8.329593] Bluetooth: hci0: Frame reassembly failed (-84)
6292 13:25:54.108353 become available
6293 13:25:54.111386 Device /sys/class/net/eth0 found
6294 13:25:54.114557 done.
6295 13:25:54.121053 Begin: Waiting up to 180 secs for any network device to become available ... done.
6296 13:25:54.159941 IP-Config: eth0 hardware address 00:e0:4c:72:3d:a6 mtu 1500 DHCP
6297 13:25:54.166679 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6298 13:25:54.172816 address: 192.168.201.20 broadcast: 192.168.201.255 netmask: 255.255.255.0
6299 13:25:54.180190 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6300 13:25:54.187012 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-4
6301 13:25:54.193329 domain : lava-rack
6302 13:25:54.196602 rootserver: 192.168.201.1 rootpath:
6303 13:25:54.196679 filename :
6304 13:25:54.223499 done.
6305 13:25:54.230852 Begin: Running /scripts/nfs-bottom ... done.
6306 13:25:54.242532 Begin: Running /scripts/init-bottom ... done.
6307 13:25:54.329011 <6>[ 8.548891] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6308 13:25:54.392468 <6>[ 8.615679] Bluetooth: hci0: QCA Product ID :0x00000008
6309 13:25:54.402576 <6>[ 8.625541] Bluetooth: hci0: QCA SOC Version :0x00000044
6310 13:25:54.415249 <4>[ 8.633236] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6311 13:25:54.418611 <6>[ 8.634918] Bluetooth: hci0: QCA ROM Version :0x00000302
6312 13:25:54.429057 <6>[ 8.634923] Bluetooth: hci0: QCA Patch Version:0x00000111
6313 13:25:54.435269 <6>[ 8.634929] Bluetooth: hci0: QCA controller version 0x00440302
6314 13:25:54.442133 <6>[ 8.634936] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6315 13:25:54.449076 <4>[ 8.649382] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6316 13:25:54.458637 <4>[ 8.652699] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6317 13:25:54.468404 <4>[ 8.660751] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6318 13:25:54.475144 <3>[ 8.663627] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6319 13:25:54.483527 <4>[ 8.671444] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6320 13:25:54.492479 <3>[ 8.677645] Bluetooth: hci0: QCA Failed to download patch (-2)
6321 13:25:55.546353 <6>[ 9.769327] NET: Registered PF_INET6 protocol family
6322 13:25:55.559099 <6>[ 9.782123] Segment Routing with IPv6
6323 13:25:55.567966 <6>[ 9.791068] In-situ OAM (IOAM) with IPv6
6324 13:25:55.748650 <30>[ 9.942254] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6325 13:25:55.768727 <30>[ 9.991488] systemd[1]: Detected architecture arm64.
6326 13:25:55.781453
6327 13:25:55.785105 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6328 13:25:55.785196
6329 13:25:55.808507 <30>[ 10.031543] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6330 13:25:56.785316 <30>[ 11.004998] systemd[1]: Queued start job for default target graphical.target.
6331 13:25:56.829464 <30>[ 11.048854] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6332 13:25:56.842152 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6333 13:25:56.861110 <30>[ 11.080922] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6334 13:25:56.875006 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6335 13:25:56.893924 <30>[ 11.113275] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6336 13:25:56.908540 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6337 13:25:56.928756 <30>[ 11.148263] systemd[1]: Created slice user.slice - User and Session Slice.
6338 13:25:56.940811 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6339 13:25:56.963125 <30>[ 11.179225] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6340 13:25:56.975759 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6341 13:25:56.998888 <30>[ 11.215056] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6342 13:25:57.011044 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6343 13:25:57.037001 <30>[ 11.246986] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6344 13:25:57.057513 <30>[ 11.277333] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6345 13:25:57.069393 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6346 13:25:57.087239 <30>[ 11.306830] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6347 13:25:57.100229 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6348 13:25:57.119415 <30>[ 11.338852] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6349 13:25:57.133870 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6350 13:25:57.148102 <30>[ 11.370879] systemd[1]: Reached target paths.target - Path Units.
6351 13:25:57.162598 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6352 13:25:57.179016 <30>[ 11.398809] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6353 13:25:57.191940 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6354 13:25:57.206895 <30>[ 11.426778] systemd[1]: Reached target slices.target - Slice Units.
6355 13:25:57.218735 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6356 13:25:57.231688 <30>[ 11.454842] systemd[1]: Reached target swap.target - Swaps.
6357 13:25:57.242933 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6358 13:25:57.263068 <30>[ 11.482869] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6359 13:25:57.276918 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6360 13:25:57.295861 <30>[ 11.515250] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6361 13:25:57.309326 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6362 13:25:57.330002 <30>[ 11.549880] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6363 13:25:57.341400 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6364 13:25:57.360443 <30>[ 11.580190] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6365 13:25:57.374980 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6366 13:25:57.392276 <30>[ 11.611535] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6367 13:25:57.404460 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6368 13:25:57.424502 <30>[ 11.644425] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6369 13:25:57.438786 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6370 13:25:57.457766 <30>[ 11.677234] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6371 13:25:57.471369 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6372 13:25:57.487902 <30>[ 11.707419] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6373 13:25:57.500813 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6374 13:25:57.543611 <30>[ 11.762941] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6375 13:25:57.555787 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6376 13:25:57.578626 <30>[ 11.798234] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6377 13:25:57.590665 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6378 13:25:57.631597 <30>[ 11.851161] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6379 13:25:57.645287 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6380 13:25:57.670813 <30>[ 11.883644] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6381 13:25:57.712086 <30>[ 11.931731] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6382 13:25:57.724555 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6383 13:25:57.749677 <30>[ 11.969244] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6384 13:25:57.761493 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6385 13:25:57.785164 <30>[ 12.004944] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6386 13:25:57.796432 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6387 13:25:57.820367 <30>[ 12.040054] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6388 13:25:57.831062 <6>[ 12.049221] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6389 13:25:57.841564 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6390 13:25:57.866262 <30>[ 12.085394] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6391 13:25:57.877943 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6392 13:25:57.898850 <30>[ 12.118543] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6393 13:25:57.910559 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6394 13:25:57.955894 <30>[ 12.175583] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6395 13:25:57.963306 Startin<6>[ 12.186908] fuse: init (API version 7.37)
6396 13:25:57.970116 g [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6397 13:25:57.998134 <30>[ 12.217790] systemd[1]: Starting systemd-journald.service - Journal Service...
6398 13:25:58.008848 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6399 13:25:58.030963 <30>[ 12.250563] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6400 13:25:58.041294 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6401 13:25:58.066397 <30>[ 12.282299] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6402 13:25:58.076305 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6403 13:25:58.123762 <30>[ 12.343532] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6404 13:25:58.136797 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6405 13:25:58.158661 <3>[ 12.377766] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6406 13:25:58.170586 <30>[ 12.389739] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6407 13:25:58.181584 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6408 13:25:58.196063 <3>[ 12.415378] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6409 13:25:58.210348 <30>[ 12.430074] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6410 13:25:58.228165 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File S<3>[ 12.446664] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6411 13:25:58.228295 ystem.
6412 13:25:58.245015 <3>[ 12.464048] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6413 13:25:58.255656 <30>[ 12.473488] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6414 13:25:58.262419 <3>[ 12.480233] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6415 13:25:58.282946 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue <3>[ 12.500561] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6416 13:25:58.283113 File System.
6417 13:25:58.299067 <3>[ 12.518365] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6418 13:25:58.309932 <30>[ 12.528196] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6419 13:25:58.321052 <3>[ 12.538097] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6420 13:25:58.332105 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6421 13:25:58.347971 <30>[ 12.567434] systemd[1]: Started systemd-journald.service - Journal Service.
6422 13:25:58.375582 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6423 13:25:58.395020 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6424 13:25:58.413597 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6425 13:25:58.433552 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6426 13:25:58.454814 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6427 13:25:58.474926 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6428 13:25:58.494275 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6429 13:25:58.514586 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6430 13:25:58.533225 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6431 13:25:58.552677 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6432 13:25:58.572834 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6433 13:25:58.594848 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6434 13:25:58.656088 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6435 13:25:58.677521 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6436 13:25:58.726535 <4>[ 12.939358] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6437 13:25:58.737460 <3>[ 12.957162] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6438 13:25:58.745844 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6439 13:25:58.774275 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6440 13:25:58.801903 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6441 13:25:58.808779 <46>[ 13.028828] systemd-journald[321]: Received client request to flush runtime journal.
6442 13:25:58.825169 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6443 13:25:58.858355 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6444 13:25:58.871880 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6445 13:25:58.892555 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6446 13:25:58.913904 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6447 13:25:59.586210 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6448 13:25:59.606847 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6449 13:25:59.645149 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6450 13:26:00.300846 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6451 13:26:00.345178 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6452 13:26:00.364569 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6453 13:26:00.383951 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6454 13:26:00.428368 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6455 13:26:00.454947 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6456 13:26:00.705654 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6457 13:26:00.783652 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6458 13:26:00.800996 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6459 13:26:00.843875 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6460 13:26:00.981496 <4>[ 15.204010] power_supply_show_property: 4 callbacks suppressed
6461 13:26:00.992671 <3>[ 15.204025] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6462 13:26:01.007335 Starting [0;1;39msystemd-timesyncd… - Network Time S<3>[ 15.227915] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6463 13:26:01.010764 ynchronization...
6464 13:26:01.023443 <3>[ 15.242629] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6465 13:26:01.038540 <3>[ 15.257930] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6466 13:26:01.053330 <3>[ 15.272649] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6467 13:26:01.069605 <3>[ 15.288997] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6468 13:26:01.084142 Startin<3>[ 15.304234] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6469 13:26:01.090943 g [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6470 13:26:01.101536 <3>[ 15.319621] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6471 13:26:01.115640 <3>[ 15.334526] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6472 13:26:01.130770 <3>[ 15.349929] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6473 13:26:01.216487 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6474 13:26:01.340013 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6475 13:26:01.355099 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6476 13:26:01.371445 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6477 13:26:01.388024 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6478 13:26:01.428287 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6479 13:26:01.452625 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6480 13:26:01.479956 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6481 13:26:01.495031 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6482 13:26:01.516011 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6483 13:26:01.560219 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6484 13:26:01.583951 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6485 13:26:01.602285 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6486 13:26:01.674592 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6487 13:26:01.694252 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6488 13:26:01.711961 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6489 13:26:01.729839 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6490 13:26:01.749997 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6491 13:26:01.767246 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6492 13:26:01.783207 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6493 13:26:01.801732 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6494 13:26:01.819397 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6495 13:26:01.835953 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6496 13:26:01.877212 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6497 13:26:01.973268 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6498 13:26:02.064649 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6499 13:26:02.092327 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6500 13:26:02.112922 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6501 13:26:02.268176 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6502 13:26:02.320876 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6503 13:26:02.359313 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6504 13:26:02.376847 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6505 13:26:02.396728 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6506 13:26:02.433271 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6507 13:26:02.464120 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6508 13:26:02.485886 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6509 13:26:02.507917 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6510 13:26:02.550694 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6511 13:26:02.660508 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6512 13:26:02.750832
6513 13:26:02.754070 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6514 13:26:02.754269
6515 13:26:02.757467 debian-bookworm-arm64 login: root (automatic login)
6516 13:26:02.757574
6517 13:26:03.017177 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Thu Jul 18 12:53:03 UTC 2024 aarch64
6518 13:26:03.017348
6519 13:26:03.023699 The programs included with the Debian GNU/Linux system are free software;
6520 13:26:03.030766 the exact distribution terms for each program are described in the
6521 13:26:03.033553 individual files in /usr/share/doc/*/copyright.
6522 13:26:03.033652
6523 13:26:03.040341 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6524 13:26:03.043808 permitted by applicable law.
6525 13:26:03.123109 Matched prompt #10: / #
6527 13:26:03.123347 Setting prompt string to ['/ #']
6528 13:26:03.123436 end: 2.2.5.1 login-action (duration 00:00:18) [common]
6530 13:26:03.123617 end: 2.2.5 auto-login-action (duration 00:00:18) [common]
6531 13:26:03.123703 start: 2.2.6 expect-shell-connection (timeout 00:03:50) [common]
6532 13:26:03.123767 Setting prompt string to ['/ #']
6533 13:26:03.123823 Forcing a shell prompt, looking for ['/ #']
6534 13:26:03.123878 Sending line: ''
6536 13:26:03.174304 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6537 13:26:03.174413 Waiting using forced prompt support (timeout 00:02:30)
6538 13:26:03.179402 / #
6539 13:26:03.179804 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6540 13:26:03.179918 start: 2.2.7 export-device-env (timeout 00:03:50) [common]
6541 13:26:03.180014 Sending line: "export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14879025/extract-nfsrootfs-bw5t4k0y'"
6543 13:26:03.285322 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14879025/extract-nfsrootfs-bw5t4k0y'
6544 13:26:03.285581 Sending line: "export NFS_SERVER_IP='192.168.201.1'"
6546 13:26:03.390444 / # export NFS_SERVER_IP='192.168.201.1'
6547 13:26:03.390730 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6548 13:26:03.390823 end: 2.2 depthcharge-retry (duration 00:01:11) [common]
6549 13:26:03.390913 end: 2 depthcharge-action (duration 00:01:11) [common]
6550 13:26:03.390996 start: 3 lava-test-retry (timeout 00:30:00) [common]
6551 13:26:03.391074 start: 3.1 lava-test-shell (timeout 00:30:00) [common]
6552 13:26:03.391142 Using namespace: common
6553 13:26:03.391209 Sending line: '#'
6555 13:26:03.491694 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:30:00)
6556 13:26:03.496166 / # #
6557 13:26:03.496468 Using /lava-14879025
6558 13:26:03.496531 Sending line: 'export SHELL=/bin/sh'
6560 13:26:03.602707 / # export SHELL=/bin/sh
6561 13:26:03.603003 Sending line: '. /lava-14879025/environment'
6563 13:26:03.708202 / # . /lava-14879025/environment
6564 13:26:03.714216 Sending line: '/lava-14879025/bin/lava-test-runner /lava-14879025/0'
6566 13:26:03.814727 Test shell timeout: 10s (minimum of the action and connection timeout)
6567 13:26:03.819797 / # /lava-14879025/bin/lava-test-runner /lava-14879025/0
6568 13:26:04.020225 + export TESTRUN_ID=0_lc-compliance
6569 13:26:04.026478 + cd /lava-14879025/0/tests/0_lc-compliance
6570 13:26:04.026606 + cat uuid
6571 13:26:04.029757 + UUID=14879025_1.6.2.3.1
6572 13:26:04.029885 + set +x
6573 13:26:04.033347 Received signal: <STARTRUN> 0_lc-compliance 14879025_1.6.2.3.1
6574 13:26:04.033431 Starting test lava.0_lc-compliance (14879025_1.6.2.3.1)
6575 13:26:04.033573 Skipping test definition patterns.
6576 13:26:04.036557 <LAVA_SIGNAL_STARTRUN 0_lc-compliance 14879025_1.6.2.3.1>
6577 13:26:04.036634 + /usr/bin/lc-compliance-parser.sh
6578 13:26:05.706647 [0:00:19.926248136] [432] [1;32m INFO [1;37mCamera [1;34mcamera_manager.cpp:284 [0mlibcamera v0.0.0+1-01935edb
6579 13:26:05.713443 Using camera /base/soc/usb@11201000/usb@11200000/hub@1-1.3:1.0-04f2:b567
6580 13:26:05.765373 [0:00:19.987154551] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6581 13:26:05.776926 [==========] Running 120 tests from 1 test suite.
6582 13:26:05.840841 [0:00:20.064810221] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6583 13:26:05.844155 [----------] Global test environment set-up.
6584 13:26:05.892190 [----------] 120 tests from CaptureTests/SingleStream
6585 13:26:05.906724 [0:00:20.133268052] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6586 13:26:05.947516 [ RUN ] CaptureTests/SingleStream.Capture/Raw_1
6587 13:26:05.971891 [0:00:20.200649322] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6588 13:26:05.995907 <LAVA_SIGNAL_TESTSET START CaptureTests/SingleStream>
6589 13:26:05.996199 Received signal: <TESTSET> START CaptureTests/SingleStream
6590 13:26:05.996272 Starting test_set CaptureTests/SingleStream
6591 13:26:05.999084 Camera needs 4 requests, can't test only 1
6592 13:26:06.057488 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6593 13:26:06.105875
6594 13:26:06.163838 [ SKIPPED ] CaptureTests/SingleStream.Capture/Raw_1 (75 ms)
6595 13:26:06.230334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_1 RESULT=skip>
6596 13:26:06.230631 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_1 RESULT=skip
6598 13:26:06.242353 [ RUN ] CaptureTests/SingleStream.Capture/Raw_2
6599 13:26:06.287099 Camera needs 4 requests, can't test only 2
6600 13:26:06.354026 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6601 13:26:06.409965
6602 13:26:06.472590 [ SKIPPED ] CaptureTests/SingleStream.Capture/Raw_2 (69 ms)
6603 13:26:06.533120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_2 RESULT=skip>
6604 13:26:06.533417 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_2 RESULT=skip
6606 13:26:06.543874 [ RUN ] CaptureTests/SingleStream.Capture/Raw_3
6607 13:26:06.585869 Camera needs 4 requests, can't test only 3
6608 13:26:06.611037 [0:00:20.858812894] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6609 13:26:06.643057 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6610 13:26:06.710179
6611 13:26:06.766727 [ SKIPPED ] CaptureTests/SingleStream.Capture/Raw_3 (66 ms)
6612 13:26:06.842552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_3 RESULT=skip>
6613 13:26:06.842849 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_3 RESULT=skip
6615 13:26:06.854986 [ RUN ] CaptureTests/SingleStream.Capture/Raw_5
6616 13:26:06.902360 [ OK ] CaptureTests/SingleStream.Capture/Raw_5 (499 ms)
6617 13:26:06.971049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_5 RESULT=pass>
6618 13:26:06.971376 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_5 RESULT=pass
6620 13:26:06.984002 [ RUN ] CaptureTests/SingleStream.Capture/Raw_8
6621 13:26:07.123575 [ OK ] CaptureTests/SingleStream.Capture/Raw_8 (733 ms)
6622 13:26:07.190016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_8 RESULT=pass>
6623 13:26:07.190340 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_8 RESULT=pass
6625 13:26:07.201471 [ RUN ] CaptureTests/SingleStream.Capture/Raw_13
6626 13:26:07.222197 [0:00:21.486968095] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6627 13:26:07.896747 [ OK ] CaptureTests/SingleStream.Capture/Raw_13 (793 ms)
6628 13:26:07.941669 [0:00:22.224723555] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6629 13:26:07.961836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_13 RESULT=pass>
6630 13:26:07.962151 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_13 RESULT=pass
6632 13:26:07.972670 [ RUN ] CaptureTests/SingleStream.Capture/Raw_21
6633 13:26:09.336977 [ OK ] CaptureTests/SingleStream.Capture/Raw_21 (1471 ms)
6634 13:26:09.381760 [0:00:23.695702334] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6635 13:26:09.395375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_21 RESULT=pass>
6636 13:26:09.395673 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_21 RESULT=pass
6638 13:26:09.407231 [ RUN ] CaptureTests/SingleStream.Capture/Raw_34
6639 13:26:13.148419 [ OK ] CaptureTests/SingleStream.Capture/Raw_34 (3870 ms)
6640 13:26:13.194105 [0:00:27.567256775] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6641 13:26:13.218930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_34 RESULT=pass>
6642 13:26:13.219237 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_34 RESULT=pass
6644 13:26:13.228837 [ RUN ] CaptureTests/SingleStream.Capture/Raw_55
6645 13:26:19.055272 [ OK ] CaptureTests/SingleStream.Capture/Raw_55 (5954 ms)
6646 13:26:19.100874 [0:00:33.521513448] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6647 13:26:19.122943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_55 RESULT=pass>
6648 13:26:19.123224 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_55 RESULT=pass
6650 13:26:19.134939 [ RUN ] CaptureTests/SingleStream.Capture/Raw_89
6651 13:26:23.404634 <6>[ 37.630253] vaux18: disabling
6652 13:26:23.407876 <6>[ 37.633763] vio28: disabling
6653 13:26:28.352190 [ OK ] CaptureTests/SingleStream.Capture/Raw_89 (9325 ms)
6654 13:26:28.397276 [0:00:42.846050377] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6655 13:26:28.416763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_89 RESULT=pass>
6656 13:26:28.417018 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_89 RESULT=pass
6658 13:26:28.429152 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_1
6659 13:26:28.460936 [0:00:42.909813683] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6660 13:26:28.471129 Camera needs 4 requests, can't test only 1
6661 13:26:28.525320 [0:00:42.974048554] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6662 13:26:28.528035 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6663 13:26:28.577963
6664 13:26:28.588053 [0:00:43.037999608] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6665 13:26:28.637120 [ SKIPPED ] CaptureTests/SingleStream.Capture/StillCapture_1 (62 ms)
6666 13:26:28.704096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_1 RESULT=skip>
6667 13:26:28.704373 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_1 RESULT=skip
6669 13:26:28.715741 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_2
6670 13:26:28.754410 Camera needs 4 requests, can't test only 2
6671 13:26:28.813770 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6672 13:26:28.874470
6673 13:26:28.940030 [ SKIPPED ] CaptureTests/SingleStream.Capture/StillCapture_2 (65 ms)
6674 13:26:29.006379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_2 RESULT=skip>
6675 13:26:29.006686 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_2 RESULT=skip
6677 13:26:29.018268 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_3
6678 13:26:29.058726 Camera needs 4 requests, can't test only 3
6679 13:26:29.116835 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6680 13:26:29.175791
6681 13:26:29.237700 [ SKIPPED ] CaptureTests/SingleStream.Capture/StillCapture_3 (63 ms)
6682 13:26:29.303922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_3 RESULT=skip>
6683 13:26:29.304209 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_3 RESULT=skip
6685 13:26:29.314702 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_5
6686 13:26:30.118400 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_5 (1577 ms)
6687 13:26:30.162902 [0:00:44.614013583] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6688 13:26:30.187544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_5 RESULT=pass>
6689 13:26:30.187857 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_5 RESULT=pass
6691 13:26:30.198787 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_8
6692 13:26:31.339706 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_8 (1222 ms)
6693 13:26:31.383694 [0:00:45.836355961] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6694 13:26:31.416017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_8 RESULT=pass>
6695 13:26:31.416483 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_8 RESULT=pass
6697 13:26:31.429167 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_13
6698 13:26:33.062710 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_13 (1724 ms)
6699 13:26:33.106315 [0:00:47.560217387] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6700 13:26:33.148579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_13 RESULT=pass>
6701 13:26:33.149256 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_13 RESULT=pass
6703 13:26:33.163473 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_21
6704 13:26:35.578489 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_21 (2517 ms)
6705 13:26:35.622305 [0:00:50.078126656] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6706 13:26:35.655611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_21 RESULT=pass>
6707 13:26:35.655942 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_21 RESULT=pass
6709 13:26:35.666982 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_34
6710 13:26:39.389142 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_34 (3812 ms)
6711 13:26:39.434343 [0:00:53.891540767] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6712 13:26:39.469266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_34 RESULT=pass>
6713 13:26:39.470115 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_34 RESULT=pass
6715 13:26:39.483024 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_55
6716 13:26:45.294531 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_55 (5906 ms)
6717 13:26:45.339780 [0:00:59.798163365] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6718 13:26:45.371687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_55 RESULT=pass>
6719 13:26:45.371996 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_55 RESULT=pass
6721 13:26:45.387837 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_89
6722 13:26:54.591026 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_89 (9297 ms)
6723 13:26:54.635896 [0:01:09.095010871] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6724 13:26:54.664200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_89 RESULT=pass>
6725 13:26:54.664525 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_89 RESULT=pass
6727 13:26:54.676266 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_1
6728 13:26:54.698169 [0:01:09.157483527] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6729 13:26:54.722771 Camera needs 4 requests, can't test only 1
6730 13:26:54.760834 [0:01:09.220207425] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6731 13:26:54.786904 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6732 13:26:54.822703 [0:01:09.281735267] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6733 13:26:54.843554
6734 13:26:54.905688 [ SKIPPED ] CaptureTests/SingleStream.Capture/VideoRecording_1 (61 ms)
6735 13:26:54.980466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_1 RESULT=skip>
6736 13:26:54.980794 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_1 RESULT=skip
6738 13:26:54.993852 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_2
6739 13:26:55.036394 Camera needs 4 requests, can't test only 2
6740 13:26:55.088932 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6741 13:26:55.142621
6742 13:26:55.205282 [ SKIPPED ] CaptureTests/SingleStream.Capture/VideoRecording_2 (63 ms)
6743 13:26:55.265585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_2 RESULT=skip>
6744 13:26:55.265907 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_2 RESULT=skip
6746 13:26:55.277673 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_3
6747 13:26:55.315017 Camera needs 4 requests, can't test only 3
6748 13:26:55.371813 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6749 13:26:55.424486
6750 13:26:55.483866 [ SKIPPED ] CaptureTests/SingleStream.Capture/VideoRecording_3 (61 ms)
6751 13:26:55.547029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_3 RESULT=skip>
6752 13:26:55.547311 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_3 RESULT=skip
6754 13:26:55.557806 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_5
6755 13:26:56.357586 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_5 (1580 ms)
6756 13:26:56.402999 [0:01:10.862690360] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6757 13:26:56.428840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_5 RESULT=pass>
6758 13:26:56.429154 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_5 RESULT=pass
6760 13:26:56.440938 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_8
6761 13:26:57.579818 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_8 (1221 ms)
6762 13:26:57.624422 [0:01:12.083833444] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6763 13:26:57.642739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_8 RESULT=pass>
6764 13:26:57.643083 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_8 RESULT=pass
6766 13:26:57.654755 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_13
6767 13:26:59.304222 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_13 (1720 ms)
6768 13:26:59.344808 [0:01:13.804300057] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6769 13:26:59.365335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_13 RESULT=pass>
6770 13:26:59.365652 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_13 RESULT=pass
6772 13:26:59.376232 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_21
6773 13:27:01.818235 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_21 (2514 ms)
6774 13:27:01.858834 [0:01:16.318402142] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6775 13:27:01.879153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_21 RESULT=pass>
6776 13:27:01.879474 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_21 RESULT=pass
6778 13:27:01.890309 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_34
6779 13:27:05.628522 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_34 (3810 ms)
6780 13:27:05.669660 [0:01:20.128933032] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6781 13:27:05.690938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_34 RESULT=pass>
6782 13:27:05.691271 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_34 RESULT=pass
6784 13:27:05.702396 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_55
6785 13:27:11.531150 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_55 (5902 ms)
6786 13:27:11.572525 [0:01:26.031601126] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6787 13:27:11.593183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_55 RESULT=pass>
6788 13:27:11.593509 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_55 RESULT=pass
6790 13:27:11.604165 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_89
6791 13:27:20.826731 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_89 (9295 ms)
6792 13:27:20.869417 [0:01:35.328617546] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6793 13:27:20.885472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_89 RESULT=pass>
6794 13:27:20.885773 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_89 RESULT=pass
6796 13:27:20.896240 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_1
6797 13:27:20.934016 [0:01:35.392984020] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6798 13:27:20.937412 Camera needs 4 requests, can't test only 1
6799 13:27:20.999013 [0:01:35.458176489] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6800 13:27:21.002345 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6801 13:27:21.044214
6802 13:27:21.061631 [0:01:35.520900032] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6803 13:27:21.103351 [ SKIPPED ] CaptureTests/SingleStream.Capture/Viewfinder_1 (64 ms)
6804 13:27:21.163471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_1 RESULT=skip>
6805 13:27:21.163785 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_1 RESULT=skip
6807 13:27:21.174136 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_2
6808 13:27:21.213567 Camera needs 4 requests, can't test only 2
6809 13:27:21.271172 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6810 13:27:21.321661
6811 13:27:21.385152 [ SKIPPED ] CaptureTests/SingleStream.Capture/Viewfinder_2 (65 ms)
6812 13:27:21.444852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_2 RESULT=skip>
6813 13:27:21.445174 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_2 RESULT=skip
6815 13:27:21.457446 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_3
6816 13:27:21.498910 Camera needs 4 requests, can't test only 3
6817 13:27:21.557836 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6818 13:27:21.610019
6819 13:27:21.666996 [ SKIPPED ] CaptureTests/SingleStream.Capture/Viewfinder_3 (63 ms)
6820 13:27:21.727194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_3 RESULT=skip>
6821 13:27:21.727481 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_3 RESULT=skip
6823 13:27:21.736930 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_5
6824 13:27:22.587888 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_5 (1570 ms)
6825 13:27:22.631957 [0:01:37.091050939] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6826 13:27:22.648768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_5 RESULT=pass>
6827 13:27:22.649054 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_5 RESULT=pass
6829 13:27:22.660264 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_8
6830 13:27:23.806646 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_8 (1219 ms)
6831 13:27:23.851010 [0:01:38.310353028] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6832 13:27:23.873597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_8 RESULT=pass>
6833 13:27:23.873885 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_8 RESULT=pass
6835 13:27:23.886240 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_13
6836 13:27:25.526236 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_13 (1719 ms)
6837 13:27:25.570181 [0:01:40.029340448] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6838 13:27:25.588220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_13 RESULT=pass>
6839 13:27:25.588514 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_13 RESULT=pass
6841 13:27:25.598824 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_21
6842 13:27:28.041034 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_21 (2514 ms)
6843 13:27:28.084556 [0:01:42.543833572] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6844 13:27:28.105964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_21 RESULT=pass>
6845 13:27:28.106271 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_21 RESULT=pass
6847 13:27:28.116595 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_34
6848 13:27:31.852652 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_34 (3811 ms)
6849 13:27:31.896661 [0:01:46.355511078] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6850 13:27:31.920526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_34 RESULT=pass>
6851 13:27:31.920797 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_34 RESULT=pass
6853 13:27:31.933435 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_55
6854 13:27:37.755759 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_55 (5903 ms)
6855 13:27:37.802195 [0:01:52.260674297] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6856 13:27:37.828662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_55 RESULT=pass>
6857 13:27:37.829001 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_55 RESULT=pass
6859 13:27:37.840166 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_89
6860 13:27:47.053417 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_89 (9297 ms)
6861 13:27:47.099747 [0:02:01.558227682] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6862 13:27:47.120241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_89 RESULT=pass>
6863 13:27:47.120597 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_89 RESULT=pass
6865 13:27:47.130764 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_1
6866 13:27:47.163182 [0:02:01.621600223] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6867 13:27:47.170273 Camera needs 4 requests, can't test only 1
6868 13:27:47.227695 [0:02:01.686591995] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6869 13:27:47.234422 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6870 13:27:47.293446 [0:02:01.752331536] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6871 13:27:47.293571
6872 13:27:47.362895 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Raw_1 (63 ms)
6873 13:27:47.429209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_1 RESULT=skip>
6874 13:27:47.429511 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_1 RESULT=skip
6876 13:27:47.442099 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_2
6877 13:27:47.483799 Camera needs 4 requests, can't test only 2
6878 13:27:47.540368 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6879 13:27:47.595865
6880 13:27:47.660902 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Raw_2 (65 ms)
6881 13:27:47.725205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_2 RESULT=skip>
6882 13:27:47.725479 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_2 RESULT=skip
6884 13:27:47.739142 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_3
6885 13:27:47.776468 Camera needs 4 requests, can't test only 3
6886 13:27:47.831557 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6887 13:27:47.883978
6888 13:27:47.941522 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Raw_3 (65 ms)
6889 13:27:48.001621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_3 RESULT=skip>
6890 13:27:48.001933 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_3 RESULT=skip
6892 13:27:48.013229 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_5
6893 13:27:50.561281 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_5 (3312 ms)
6894 13:27:50.605717 [0:02:05.064270415] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6895 13:27:50.622099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_5 RESULT=pass>
6896 13:27:50.622368 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_5 RESULT=pass
6898 13:27:50.634094 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_8
6899 13:27:54.120585 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_8 (3559 ms)
6900 13:27:54.165764 [0:02:08.623954412] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6901 13:27:54.194099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_8 RESULT=pass>
6902 13:27:54.194403 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_8 RESULT=pass
6904 13:27:54.204507 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_13
6905 13:27:59.181005 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_13 (5059 ms)
6906 13:27:59.224210 [0:02:13.682970780] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6907 13:27:59.245851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_13 RESULT=pass>
6908 13:27:59.246147 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_13 RESULT=pass
6910 13:27:59.256309 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_21
6911 13:28:06.628235 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_21 (7447 ms)
6912 13:28:06.673996 [0:02:21.132312435] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6913 13:28:06.694705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_21 RESULT=pass>
6914 13:28:06.695012 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_21 RESULT=pass
6916 13:28:06.707476 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_34
6917 13:28:17.967247 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_34 (11338 ms)
6918 13:28:18.012526 [0:02:32.470541992] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6919 13:28:18.033707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_34 RESULT=pass>
6920 13:28:18.034011 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_34 RESULT=pass
6922 13:28:18.044198 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_55
6923 13:28:35.581799 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_55 (17614 ms)
6924 13:28:35.627360 [0:02:50.084931998] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6925 13:28:35.648302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_55 RESULT=pass>
6926 13:28:35.648600 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_55 RESULT=pass
6928 13:28:35.658487 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_89
6929 13:29:03.372680 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_89 (27789 ms)
6930 13:29:03.418675 [0:03:17.875358154] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6931 13:29:03.486834 [0:03:17.943074384] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6932 13:29:03.554681 [0:03:18.011231769] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6933 13:29:03.622125 [0:03:18.079260307] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6934 13:29:03.690821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_89 RESULT=pass>
6935 13:29:03.691134 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_89 RESULT=pass
6937 13:29:03.702677 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_1
6938 13:29:03.743608 Camera needs 4 requests, can't test only 1
6939 13:29:03.802477 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6940 13:29:03.868780
6941 13:29:03.943640 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_1 (67 ms)
6942 13:29:04.021317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_1 RESULT=skip>
6943 13:29:04.022355 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_1 RESULT=skip
6945 13:29:04.032337 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_2
6946 13:29:04.078226 Camera needs 4 requests, can't test only 2
6947 13:29:04.130979 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6948 13:29:04.182927
6949 13:29:04.244762 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_2 (67 ms)
6950 13:29:04.308941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_2 RESULT=skip>
6951 13:29:04.309244 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_2 RESULT=skip
6953 13:29:04.319483 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_3
6954 13:29:04.364280 Camera needs 4 requests, can't test only 3
6955 13:29:04.442411 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6956 13:29:04.504115
6957 13:29:04.582858 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_3 (67 ms)
6958 13:29:04.665306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_3 RESULT=skip>
6959 13:29:04.665966 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_3 RESULT=skip
6961 13:29:04.676977 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_5
6962 13:29:06.891544 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_5 (3309 ms)
6963 13:29:06.933034 [0:03:21.389775846] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6964 13:29:06.963360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_5 RESULT=pass>
6965 13:29:06.963691 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_5 RESULT=pass
6967 13:29:06.974929 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_8
6968 13:29:10.461280 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_8 (3569 ms)
6969 13:29:10.501401 [0:03:24.957998769] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6970 13:29:10.540565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_8 RESULT=pass>
6971 13:29:10.541482 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_8 RESULT=pass
6973 13:29:10.551668 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_13
6974 13:29:15.527165 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_13 (5066 ms)
6975 13:29:15.573493 [0:03:30.029762462] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6976 13:29:15.608621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_13 RESULT=pass>
6977 13:29:15.609260 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_13 RESULT=pass
6979 13:29:15.619381 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_21
6980 13:29:22.985893 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_21 (7457 ms)
6981 13:29:23.029399 [0:03:37.486138693] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6982 13:29:23.054675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_21 RESULT=pass>
6983 13:29:23.054968 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_21 RESULT=pass
6985 13:29:23.063306 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_34
6986 13:29:34.330745 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_34 (11342 ms)
6987 13:29:34.374494 [0:03:48.830795386] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6988 13:29:34.416093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_34 RESULT=pass>
6989 13:29:34.416794 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_34 RESULT=pass
6991 13:29:34.427871 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_55
6992 13:29:51.950475 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_55 (17616 ms)
6993 13:29:51.993346 [0:04:06.449397080] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6994 13:29:52.016925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_55 RESULT=pass>
6995 13:29:52.017189 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_55 RESULT=pass
6997 13:29:52.026636 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_89
6998 13:30:19.744525 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_89 (27791 ms)
6999 13:30:19.785217 [0:04:34.240685466] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7000 13:30:19.817597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_89 RESULT=pass>
7001 13:30:19.817888 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_89 RESULT=pass
7003 13:30:19.832953 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_1
7004 13:30:19.849602 [0:04:34.304949466] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7005 13:30:19.874034 Camera needs 4 requests, can't test only 1
7006 13:30:19.914119 [0:04:34.369288850] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7007 13:30:19.932117 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7008 13:30:19.977208 [0:04:34.432620312] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7009 13:30:19.992057
7010 13:30:20.065527 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_1 (61 ms)
7011 13:30:20.138615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_1 RESULT=skip>
7012 13:30:20.138907 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_1 RESULT=skip
7014 13:30:20.147475 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_2
7015 13:30:20.194991 Camera needs 4 requests, can't test only 2
7016 13:30:20.266177 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7017 13:30:20.326808
7018 13:30:20.399418 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_2 (65 ms)
7019 13:30:20.470881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_2 RESULT=skip>
7020 13:30:20.471194 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_2 RESULT=skip
7022 13:30:20.479620 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_3
7023 13:30:20.521450 Camera needs 4 requests, can't test only 3
7024 13:30:20.579114 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7025 13:30:20.635006
7026 13:30:20.698118 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_3 (63 ms)
7027 13:30:20.770441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_3 RESULT=skip>
7028 13:30:20.770735 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_3 RESULT=skip
7030 13:30:20.778867 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_5
7031 13:30:23.250616 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_5 (3315 ms)
7032 13:30:23.293242 [0:04:37.748065389] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7033 13:30:23.315568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_5 RESULT=pass>
7034 13:30:23.315878 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_5 RESULT=pass
7036 13:30:23.322733 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_8
7037 13:30:26.812650 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_8 (3561 ms)
7038 13:30:26.855258 [0:04:41.310463697] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7039 13:30:26.880160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_8 RESULT=pass>
7040 13:30:26.880425 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_8 RESULT=pass
7042 13:30:26.887921 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_13
7043 13:30:31.874121 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_13 (5061 ms)
7044 13:30:31.919704 [0:04:46.374930236] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7045 13:30:31.935212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_13 RESULT=pass>
7046 13:30:31.935503 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_13 RESULT=pass
7048 13:30:31.943099 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_21
7049 13:30:39.327265 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_21 (7450 ms)
7050 13:30:39.371955 [0:04:53.827036390] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7051 13:30:39.386526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_21 RESULT=pass>
7052 13:30:39.386809 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_21 RESULT=pass
7054 13:30:39.394902 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_34
7055 13:30:50.673044 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_34 (11343 ms)
7056 13:30:50.716336 [0:05:05.170932160] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7057 13:30:50.733188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_34 RESULT=pass>
7058 13:30:50.733474 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_34 RESULT=pass
7060 13:30:50.741695 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_55
7061 13:31:08.292872 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_55 (17619 ms)
7062 13:31:08.335981 [0:05:22.790224084] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7063 13:31:08.354425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_55 RESULT=pass>
7064 13:31:08.354684 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_55 RESULT=pass
7066 13:31:08.362623 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_89
7067 13:31:36.088041 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_89 (27794 ms)
7068 13:31:36.132608 [0:05:50.586663932] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7069 13:31:36.160991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_89 RESULT=pass>
7070 13:31:36.161270 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_89 RESULT=pass
7072 13:31:36.171692 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_1
7073 13:31:36.200881 [0:05:50.654351701] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7074 13:31:36.210906 Camera needs 4 requests, can't test only 1
7075 13:31:36.262474 [0:05:50.715898855] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7076 13:31:36.265947 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7077 13:31:36.319365
7078 13:31:36.328655 [0:05:50.783481163] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7079 13:31:36.380883 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_1 (68 ms)
7080 13:31:36.442398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_1 RESULT=skip>
7081 13:31:36.442688 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_1 RESULT=skip
7083 13:31:36.450278 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_2
7084 13:31:36.487114 Camera needs 4 requests, can't test only 2
7085 13:31:36.540664 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7086 13:31:36.589640
7087 13:31:36.650713 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_2 (63 ms)
7088 13:31:36.712370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_2 RESULT=skip>
7089 13:31:36.712644 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_2 RESULT=skip
7091 13:31:36.720923 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_3
7092 13:31:36.760705 Camera needs 4 requests, can't test only 3
7093 13:31:36.816579 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7094 13:31:36.866897
7095 13:31:36.935166 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_3 (67 ms)
7096 13:31:37.010129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_3 RESULT=skip>
7097 13:31:37.010407 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_3 RESULT=skip
7099 13:31:37.019803 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_5
7100 13:31:39.603223 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_5 (3314 ms)
7101 13:31:39.644881 [0:05:54.098038086] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7102 13:31:39.676824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_5 RESULT=pass>
7103 13:31:39.677713 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_5 RESULT=pass
7105 13:31:39.686229 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_8
7106 13:31:43.170345 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_8 (3566 ms)
7107 13:31:43.211688 [0:05:57.664872163] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7108 13:31:43.239138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_8 RESULT=pass>
7109 13:31:43.239399 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_8 RESULT=pass
7111 13:31:43.249108 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_13
7112 13:31:48.230213 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_13 (5059 ms)
7113 13:31:48.270037 [0:06:02.723703548] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7114 13:31:48.296392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_13 RESULT=pass>
7115 13:31:48.296690 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_13 RESULT=pass
7117 13:31:48.303512 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_21
7118 13:31:55.683500 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_21 (7453 ms)
7119 13:31:55.728069 [0:06:10.181370010] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7120 13:31:55.747445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_21 RESULT=pass>
7121 13:31:55.747778 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_21 RESULT=pass
7123 13:31:55.755506 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_34
7124 13:32:07.022733 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_34 (11336 ms)
7125 13:32:07.064162 [0:06:21.516971703] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7126 13:32:07.090503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_34 RESULT=pass>
7127 13:32:07.090787 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_34 RESULT=pass
7129 13:32:07.099906 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_55
7130 13:32:24.635499 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_55 (17611 ms)
7131 13:32:24.676982 [0:06:39.128983319] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7132 13:32:24.712616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_55 RESULT=pass>
7133 13:32:24.713383 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_55 RESULT=pass
7135 13:32:24.724089 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_89
7136 13:32:52.424459 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_89 (27789 ms)
7137 13:32:52.465772 [0:07:06.917552244] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7138 13:32:52.496096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_89 RESULT=pass>
7139 13:32:52.496386 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_89 RESULT=pass
7141 13:32:52.504432 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_1
7142 13:32:52.945678 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_1 (524 ms)
7143 13:32:53.007881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_1 RESULT=pass>
7144 13:32:53.008179 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_1 RESULT=pass
7146 13:32:53.019562 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_2
7147 13:32:53.210393 [0:07:07.662204321] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7148 13:32:53.792935 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_2 (847 ms)
7149 13:32:53.870226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_2 RESULT=pass>
7150 13:32:53.870503 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_2 RESULT=pass
7152 13:32:53.885100 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_3
7153 13:32:53.957883 [0:07:08.409756244] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7154 13:32:54.636579 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_3 (842 ms)
7155 13:32:54.695970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_3 RESULT=pass>
7156 13:32:54.696266 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_3 RESULT=pass
7158 13:32:54.709009 [0:07:09.156732937] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7159 13:32:54.712504 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_5
7160 13:32:55.583920 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_5 (947 ms)
7161 13:32:55.627912 [0:07:10.079652783] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7162 13:32:55.648942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_5 RESULT=pass>
7163 13:32:55.649232 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_5 RESULT=pass
7165 13:32:55.660414 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_8
7166 13:32:56.802502 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_8 (1219 ms)
7167 13:32:56.847884 [0:07:11.299616321] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7168 13:32:56.874094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_8 RESULT=pass>
7169 13:32:56.874395 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_8 RESULT=pass
7171 13:32:56.885509 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_13
7172 13:32:58.523840 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_13 (1720 ms)
7173 13:32:58.567829 [0:07:13.019238168] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7174 13:32:58.589517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_13 RESULT=pass>
7175 13:32:58.589814 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_13 RESULT=pass
7177 13:32:58.602336 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_21
7178 13:33:01.037823 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_21 (2513 ms)
7179 13:33:01.081761 [0:07:15.533425629] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7180 13:33:01.141586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_21 RESULT=pass>
7181 13:33:01.142253 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_21 RESULT=pass
7183 13:33:01.158003 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_34
7184 13:33:04.848771 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_34 (3810 ms)
7185 13:33:04.892384 [0:07:19.344098322] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7186 13:33:04.916011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_34 RESULT=pass>
7187 13:33:04.916294 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_34 RESULT=pass
7189 13:33:04.928805 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_55
7190 13:33:10.751933 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_55 (5903 ms)
7191 13:33:10.795096 [0:07:25.247022784] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7192 13:33:10.814415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_55 RESULT=pass>
7193 13:33:10.814683 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_55 RESULT=pass
7195 13:33:10.825806 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_89
7196 13:33:20.047429 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_89 (9295 ms)
7197 13:33:20.092629 [0:07:34.543659630] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7198 13:33:20.113395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_89 RESULT=pass>
7199 13:33:20.113674 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_89 RESULT=pass
7201 13:33:20.125884 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_1
7202 13:33:20.575062 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_1 (524 ms)
7203 13:33:20.634883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_1 RESULT=pass>
7204 13:33:20.635192 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_1 RESULT=pass
7206 13:33:20.641919 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_2
7207 13:33:20.838780 [0:07:35.289932400] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7208 13:33:21.423048 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_2 (848 ms)
7209 13:33:21.493237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_2 RESULT=pass>
7210 13:33:21.493546 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_2 RESULT=pass
7212 13:33:21.502792 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_3
7213 13:33:21.586407 [0:07:36.037627323] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7214 13:33:22.271288 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_3 (847 ms)
7215 13:33:22.335485 [0:07:36.786672477] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7216 13:33:22.341701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_3 RESULT=pass>
7217 13:33:22.342014 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_3 RESULT=pass
7219 13:33:22.348206 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_5
7220 13:33:23.219122 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_5 (947 ms)
7221 13:33:23.260124 [0:07:37.711195477] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7222 13:33:23.286575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_5 RESULT=pass>
7223 13:33:23.286880 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_5 RESULT=pass
7225 13:33:23.294792 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_8
7226 13:33:24.437564 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_8 (1218 ms)
7227 13:33:24.479613 [0:07:38.930578323] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7228 13:33:24.503609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_8 RESULT=pass>
7229 13:33:24.503872 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_8 RESULT=pass
7231 13:33:24.512625 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_13
7232 13:33:26.158654 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_13 (1720 ms)
7233 13:33:26.199245 [0:07:40.650400862] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7234 13:33:26.242859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_13 RESULT=pass>
7235 13:33:26.243512 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_13 RESULT=pass
7237 13:33:26.254757 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_21
7238 13:33:28.675207 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_21 (2516 ms)
7239 13:33:28.716150 [0:07:43.167699400] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7240 13:33:28.734621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_21 RESULT=pass>
7241 13:33:28.734917 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_21 RESULT=pass
7243 13:33:28.743750 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_34
7244 13:33:32.487487 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_34 (3812 ms)
7245 13:33:32.529463 [0:07:46.980463400] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7246 13:33:32.554346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_34 RESULT=pass>
7247 13:33:32.554604 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_34 RESULT=pass
7249 13:33:32.562181 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_55
7250 13:33:38.393245 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_55 (5905 ms)
7251 13:33:38.433797 [0:07:52.884636939] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7252 13:33:38.453675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_55 RESULT=pass>
7253 13:33:38.453956 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_55 RESULT=pass
7255 13:33:38.463328 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_89
7256 13:33:47.687541 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_89 (9294 ms)
7257 13:33:47.728562 [0:08:02.179644094] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7258 13:33:47.755483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_89 RESULT=pass>
7259 13:33:47.755763 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_89 RESULT=pass
7261 13:33:47.764670 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_1
7262 13:33:48.211350 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_1 (523 ms)
7263 13:33:48.282649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_1 RESULT=pass>
7264 13:33:48.283030 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_1 RESULT=pass
7266 13:33:48.292104 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_2
7267 13:33:48.474705 [0:08:02.925765786] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7268 13:33:49.060029 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_2 (848 ms)
7269 13:33:49.135549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_2 RESULT=pass>
7270 13:33:49.135844 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_2 RESULT=pass
7272 13:33:49.144840 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_3
7273 13:33:49.221981 [0:08:03.672921632] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7274 13:33:49.906013 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_3 (845 ms)
7275 13:33:49.967661 [0:08:04.418421401] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7276 13:33:49.973945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_3 RESULT=pass>
7277 13:33:49.974252 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_3 RESULT=pass
7279 13:33:49.985922 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_5
7280 13:33:50.851621 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_5 (945 ms)
7281 13:33:50.892951 [0:08:05.343480401] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7282 13:33:50.923983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_5 RESULT=pass>
7283 13:33:50.924240 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_5 RESULT=pass
7285 13:33:50.932542 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_8
7286 13:33:52.070791 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_8 (1218 ms)
7287 13:33:52.112032 [0:08:06.562587632] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7288 13:33:52.136346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_8 RESULT=pass>
7289 13:33:52.136601 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_8 RESULT=pass
7291 13:33:52.144188 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_13
7292 13:33:53.790808 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_13 (1719 ms)
7293 13:33:53.832673 [0:08:08.283000017] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7294 13:33:53.880717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_13 RESULT=pass>
7295 13:33:53.880982 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_13 RESULT=pass
7297 13:33:53.888978 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_21
7298 13:33:56.305864 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_21 (2515 ms)
7299 13:33:56.347072 [0:08:10.797815786] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7300 13:33:56.374403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_21 RESULT=pass>
7301 13:33:56.374660 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_21 RESULT=pass
7303 13:33:56.382610 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_34
7304 13:34:00.117393 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_34 (3811 ms)
7305 13:34:00.158996 [0:08:14.609293864] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7306 13:34:00.187870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_34 RESULT=pass>
7307 13:34:00.188126 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_34 RESULT=pass
7309 13:34:00.197461 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_55
7310 13:34:06.021513 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_55 (5903 ms)
7311 13:34:06.063298 [0:08:20.513622633] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7312 13:34:06.088456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_55 RESULT=pass>
7313 13:34:06.088716 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_55 RESULT=pass
7315 13:34:06.098633 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_89
7316 13:34:15.317998 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_89 (9295 ms)
7317 13:34:15.359765 [0:08:29.809546095] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7318 13:34:15.396805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_89 RESULT=pass>
7319 13:34:15.397129 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_89 RESULT=pass
7321 13:34:15.406671 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_1
7322 13:34:15.842379 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_1 (524 ms)
7323 13:34:15.910102 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_1 RESULT=pass
7325 13:34:15.912763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_1 RESULT=pass>
7326 13:34:15.922290 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_2
7327 13:34:16.104304 [0:08:30.554353326] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7328 13:34:16.688895 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_2 (846 ms)
7329 13:34:16.748819 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_2 RESULT=pass
7331 13:34:16.751308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_2 RESULT=pass>
7332 13:34:16.762753 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_3
7333 13:34:16.853855 [0:08:31.304049557] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7334 13:34:17.535768 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_3 (846 ms)
7335 13:34:17.601976 [0:08:32.051978018] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7336 13:34:17.608955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_3 RESULT=pass>
7337 13:34:17.609221 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_3 RESULT=pass
7339 13:34:17.612335 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_5
7340 13:34:18.485871 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_5 (950 ms)
7341 13:34:18.527061 [0:08:32.976909634] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7342 13:34:18.548315 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_5 RESULT=pass
7344 13:34:18.551320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_5 RESULT=pass>
7345 13:34:18.560577 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_8
7346 13:34:19.708159 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_8 (1222 ms)
7347 13:34:19.749600 [0:08:34.199783249] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7348 13:34:19.773897 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_8 RESULT=pass
7350 13:34:19.776878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_8 RESULT=pass>
7351 13:34:19.786175 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_13
7352 13:34:21.429984 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_13 (1721 ms)
7353 13:34:21.471429 [0:08:35.921108557] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7354 13:34:21.501843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_13 RESULT=pass>
7355 13:34:21.502101 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_13 RESULT=pass
7357 13:34:21.514200 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_21
7358 13:34:23.946672 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_21 (2516 ms)
7359 13:34:23.987117 [0:08:38.437125327] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7360 13:34:24.015076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_21 RESULT=pass>
7361 13:34:24.015372 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_21 RESULT=pass
7363 13:34:24.025675 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_34
7364 13:34:27.757041 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_34 (3810 ms)
7365 13:34:27.797670 [0:08:42.247523250] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7366 13:34:27.828530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_34 RESULT=pass>
7367 13:34:27.828811 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_34 RESULT=pass
7369 13:34:27.837588 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_55
7370 13:34:33.659232 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_55 (5902 ms)
7371 13:34:33.700275 [0:08:48.150162866] [432] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7372 13:34:33.729225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_55 RESULT=pass>
7373 13:34:33.729488 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_55 RESULT=pass
7375 13:34:33.738039 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_89
7376 13:34:42.955461 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_89 (9295 ms)
7377 13:34:43.020436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_89 RESULT=pass>
7378 13:34:43.020714 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_89 RESULT=pass
7380 13:34:43.028339 [----------] 120 tests from CaptureTests/SingleStream (517461 ms total)
7381 13:34:43.080899
7382 13:34:43.144770 [----------] Global test environment tear-down
7383 13:34:43.203471 [==========] 120 tests from 1 test suite ran. (517461 ms total)
7384 13:34:43.263791 <LAVA_SIGNAL_TESTSET STOP>
7385 13:34:43.264062 Received signal: <TESTSET> STOP
7386 13:34:43.264132 Closing test_set CaptureTests/SingleStream
7387 13:34:43.266937 + set +x
7388 13:34:43.270296 <LAVA_SIGNAL_ENDRUN 0_lc-compliance 14879025_1.6.2.3.1>
7389 13:34:43.270534 Received signal: <ENDRUN> 0_lc-compliance 14879025_1.6.2.3.1
7390 13:34:43.270612 Ending use of test pattern.
7391 13:34:43.270677 Ending test lava.0_lc-compliance (14879025_1.6.2.3.1), duration 519.24
7393 13:34:43.273386 <LAVA_TEST_RUNNER EXIT>
7394 13:34:43.273622 ok: lava_test_shell seems to have completed
7395 13:34:43.275512 Capture/Raw_1:
set: CaptureTests/SingleStream
result: skip
Capture/Raw_2:
set: CaptureTests/SingleStream
result: skip
Capture/Raw_3:
set: CaptureTests/SingleStream
result: skip
Capture/Raw_5:
set: CaptureTests/SingleStream
result: pass
Capture/Raw_8:
set: CaptureTests/SingleStream
result: pass
Capture/Raw_13:
set: CaptureTests/SingleStream
result: pass
Capture/Raw_21:
set: CaptureTests/SingleStream
result: pass
Capture/Raw_34:
set: CaptureTests/SingleStream
result: pass
Capture/Raw_55:
set: CaptureTests/SingleStream
result: pass
Capture/Raw_89:
set: CaptureTests/SingleStream
result: pass
Capture/StillCapture_1:
set: CaptureTests/SingleStream
result: skip
Capture/StillCapture_2:
set: CaptureTests/SingleStream
result: skip
Capture/StillCapture_3:
set: CaptureTests/SingleStream
result: skip
Capture/StillCapture_5:
set: CaptureTests/SingleStream
result: pass
Capture/StillCapture_8:
set: CaptureTests/SingleStream
result: pass
Capture/StillCapture_13:
set: CaptureTests/SingleStream
result: pass
Capture/StillCapture_21:
set: CaptureTests/SingleStream
result: pass
Capture/StillCapture_34:
set: CaptureTests/SingleStream
result: pass
Capture/StillCapture_55:
set: CaptureTests/SingleStream
result: pass
Capture/StillCapture_89:
set: CaptureTests/SingleStream
result: pass
Capture/VideoRecording_1:
set: CaptureTests/SingleStream
result: skip
Capture/VideoRecording_2:
set: CaptureTests/SingleStream
result: skip
Capture/VideoRecording_3:
set: CaptureTests/SingleStream
result: skip
Capture/VideoRecording_5:
set: CaptureTests/SingleStream
result: pass
Capture/VideoRecording_8:
set: CaptureTests/SingleStream
result: pass
Capture/VideoRecording_13:
set: CaptureTests/SingleStream
result: pass
Capture/VideoRecording_21:
set: CaptureTests/SingleStream
result: pass
Capture/VideoRecording_34:
set: CaptureTests/SingleStream
result: pass
Capture/VideoRecording_55:
set: CaptureTests/SingleStream
result: pass
Capture/VideoRecording_89:
set: CaptureTests/SingleStream
result: pass
Capture/Viewfinder_1:
set: CaptureTests/SingleStream
result: skip
Capture/Viewfinder_2:
set: CaptureTests/SingleStream
result: skip
Capture/Viewfinder_3:
set: CaptureTests/SingleStream
result: skip
Capture/Viewfinder_5:
set: CaptureTests/SingleStream
result: pass
Capture/Viewfinder_8:
set: CaptureTests/SingleStream
result: pass
Capture/Viewfinder_13:
set: CaptureTests/SingleStream
result: pass
Capture/Viewfinder_21:
set: CaptureTests/SingleStream
result: pass
Capture/Viewfinder_34:
set: CaptureTests/SingleStream
result: pass
Capture/Viewfinder_55:
set: CaptureTests/SingleStream
result: pass
Capture/Viewfinder_89:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/Raw_1:
set: CaptureTests/SingleStream
result: skip
CaptureStartStop/Raw_2:
set: CaptureTests/SingleStream
result: skip
CaptureStartStop/Raw_3:
set: CaptureTests/SingleStream
result: skip
CaptureStartStop/Raw_5:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/Raw_8:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/Raw_13:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/Raw_21:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/Raw_34:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/Raw_55:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/Raw_89:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/StillCapture_1:
set: CaptureTests/SingleStream
result: skip
CaptureStartStop/StillCapture_2:
set: CaptureTests/SingleStream
result: skip
CaptureStartStop/StillCapture_3:
set: CaptureTests/SingleStream
result: skip
CaptureStartStop/StillCapture_5:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/StillCapture_8:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/StillCapture_13:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/StillCapture_21:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/StillCapture_34:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/StillCapture_55:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/StillCapture_89:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/VideoRecording_1:
set: CaptureTests/SingleStream
result: skip
CaptureStartStop/VideoRecording_2:
set: CaptureTests/SingleStream
result: skip
CaptureStartStop/VideoRecording_3:
set: CaptureTests/SingleStream
result: skip
CaptureStartStop/VideoRecording_5:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/VideoRecording_8:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/VideoRecording_13:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/VideoRecording_21:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/VideoRecording_34:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/VideoRecording_55:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/VideoRecording_89:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/Viewfinder_1:
set: CaptureTests/SingleStream
result: skip
CaptureStartStop/Viewfinder_2:
set: CaptureTests/SingleStream
result: skip
CaptureStartStop/Viewfinder_3:
set: CaptureTests/SingleStream
result: skip
CaptureStartStop/Viewfinder_5:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/Viewfinder_8:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/Viewfinder_13:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/Viewfinder_21:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/Viewfinder_34:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/Viewfinder_55:
set: CaptureTests/SingleStream
result: pass
CaptureStartStop/Viewfinder_89:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Raw_1:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Raw_2:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Raw_3:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Raw_5:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Raw_8:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Raw_13:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Raw_21:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Raw_34:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Raw_55:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Raw_89:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/StillCapture_1:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/StillCapture_2:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/StillCapture_3:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/StillCapture_5:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/StillCapture_8:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/StillCapture_13:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/StillCapture_21:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/StillCapture_34:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/StillCapture_55:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/StillCapture_89:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/VideoRecording_1:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/VideoRecording_2:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/VideoRecording_3:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/VideoRecording_5:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/VideoRecording_8:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/VideoRecording_13:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/VideoRecording_21:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/VideoRecording_34:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/VideoRecording_55:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/VideoRecording_89:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Viewfinder_1:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Viewfinder_2:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Viewfinder_3:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Viewfinder_5:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Viewfinder_8:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Viewfinder_13:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Viewfinder_21:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Viewfinder_34:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Viewfinder_55:
set: CaptureTests/SingleStream
result: pass
UnbalancedStop/Viewfinder_89:
set: CaptureTests/SingleStream
result: pass
7396 13:34:43.275710 end: 3.1 lava-test-shell (duration 00:08:40) [common]
7397 13:34:43.275806 end: 3 lava-test-retry (duration 00:08:40) [common]
7398 13:34:43.275934 start: 4 finalize (timeout 00:10:00) [common]
7399 13:34:43.276031 start: 4.1 power-off (timeout 00:00:30) [common]
7400 13:34:43.276168 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=off']
7401 13:34:45.352452 >> Command sent successfully.
7402 13:34:45.369130 Returned 0 in 2 seconds
7403 13:34:45.369687 end: 4.1 power-off (duration 00:00:02) [common]
7405 13:34:45.370828 start: 4.2 read-feedback (timeout 00:09:58) [common]
7406 13:34:45.371428 Listened to connection for namespace 'common' for up to 1s
7407 13:34:46.371963 Finalising connection for namespace 'common'
7408 13:34:46.372102 Disconnecting from shell: Finalise
7409 13:34:46.372173 / #
7410 13:34:46.472405 end: 4.2 read-feedback (duration 00:00:01) [common]
7411 13:34:46.472531 end: 4 finalize (duration 00:00:03) [common]
7412 13:34:46.472630 Cleaning after the job
7413 13:34:46.472729 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/ramdisk
7414 13:34:46.473301 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/kernel
7415 13:34:46.475508 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/dtb
7416 13:34:46.475703 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/nfsrootfs
7417 13:34:46.484883 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879025/tftp-deploy-w3z26uyv/modules
7418 13:34:46.486100 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14879025
7419 13:34:46.728216 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14879025
7420 13:34:46.728396 Job finished correctly