Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 3
- Kernel Errors: 42
- Boot result: FAIL
- Warnings: 1
- Kernel Warnings: 132
1 13:41:12.499905 lava-dispatcher, installed at version: 2024.05
2 13:41:12.500154 start: 0 validate
3 13:41:12.500323 Start time: 2024-07-18 13:41:12.500316+00:00 (UTC)
4 13:41:12.500520 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:41:12.500744 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 13:41:12.761303 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:41:12.761534 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 13:41:13.018773 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:41:13.019040 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 13:41:13.276221 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:41:13.276423 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
12 13:41:13.527201 validate duration: 1.03
14 13:41:13.527565 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:41:13.527690 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:41:13.527781 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:41:13.527976 Not decompressing ramdisk as can be used compressed.
18 13:41:13.528097 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/rootfs.cpio.gz
19 13:41:13.528205 saving as /var/lib/lava/dispatcher/tmp/14879034/tftp-deploy-uolv_d5l/ramdisk/rootfs.cpio.gz
20 13:41:13.528313 total size: 95552279 (91 MB)
21 13:41:13.529832 progress 0 % (0 MB)
22 13:41:13.559684 progress 5 % (4 MB)
23 13:41:13.589631 progress 10 % (9 MB)
24 13:41:13.618051 progress 15 % (13 MB)
25 13:41:13.646884 progress 20 % (18 MB)
26 13:41:13.674810 progress 25 % (22 MB)
27 13:41:13.704223 progress 30 % (27 MB)
28 13:41:13.732574 progress 35 % (31 MB)
29 13:41:13.760415 progress 40 % (36 MB)
30 13:41:13.787227 progress 45 % (41 MB)
31 13:41:13.813979 progress 50 % (45 MB)
32 13:41:13.844039 progress 55 % (50 MB)
33 13:41:13.873452 progress 60 % (54 MB)
34 13:41:13.902627 progress 65 % (59 MB)
35 13:41:13.931376 progress 70 % (63 MB)
36 13:41:13.957935 progress 75 % (68 MB)
37 13:41:13.984659 progress 80 % (72 MB)
38 13:41:14.012350 progress 85 % (77 MB)
39 13:41:14.039796 progress 90 % (82 MB)
40 13:41:14.067181 progress 95 % (86 MB)
41 13:41:14.094636 progress 100 % (91 MB)
42 13:41:14.094803 91 MB downloaded in 0.57 s (160.86 MB/s)
43 13:41:14.094972 end: 1.1.1 http-download (duration 00:00:01) [common]
45 13:41:14.095217 end: 1.1 download-retry (duration 00:00:01) [common]
46 13:41:14.095305 start: 1.2 download-retry (timeout 00:09:59) [common]
47 13:41:14.095389 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 13:41:14.095536 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
49 13:41:14.095610 saving as /var/lib/lava/dispatcher/tmp/14879034/tftp-deploy-uolv_d5l/kernel/Image
50 13:41:14.095669 total size: 54813184 (52 MB)
51 13:41:14.095729 No compression specified
52 13:41:14.096771 progress 0 % (0 MB)
53 13:41:14.112445 progress 5 % (2 MB)
54 13:41:14.128403 progress 10 % (5 MB)
55 13:41:14.143635 progress 15 % (7 MB)
56 13:41:14.158305 progress 20 % (10 MB)
57 13:41:14.172909 progress 25 % (13 MB)
58 13:41:14.187334 progress 30 % (15 MB)
59 13:41:14.201977 progress 35 % (18 MB)
60 13:41:14.216668 progress 40 % (20 MB)
61 13:41:14.231245 progress 45 % (23 MB)
62 13:41:14.245868 progress 50 % (26 MB)
63 13:41:14.260575 progress 55 % (28 MB)
64 13:41:14.275097 progress 60 % (31 MB)
65 13:41:14.289771 progress 65 % (34 MB)
66 13:41:14.304338 progress 70 % (36 MB)
67 13:41:14.319208 progress 75 % (39 MB)
68 13:41:14.333983 progress 80 % (41 MB)
69 13:41:14.348457 progress 85 % (44 MB)
70 13:41:14.363128 progress 90 % (47 MB)
71 13:41:14.377962 progress 95 % (49 MB)
72 13:41:14.392746 progress 100 % (52 MB)
73 13:41:14.393023 52 MB downloaded in 0.30 s (175.80 MB/s)
74 13:41:14.393187 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:41:14.393445 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:41:14.393535 start: 1.3 download-retry (timeout 00:09:59) [common]
78 13:41:14.393619 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 13:41:14.393757 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 13:41:14.393826 saving as /var/lib/lava/dispatcher/tmp/14879034/tftp-deploy-uolv_d5l/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 13:41:14.393906 total size: 57695 (0 MB)
82 13:41:14.393968 No compression specified
83 13:41:14.395100 progress 56 % (0 MB)
84 13:41:14.395379 progress 100 % (0 MB)
85 13:41:14.395609 0 MB downloaded in 0.00 s (32.37 MB/s)
86 13:41:14.395735 end: 1.3.1 http-download (duration 00:00:00) [common]
88 13:41:14.395972 end: 1.3 download-retry (duration 00:00:00) [common]
89 13:41:14.396060 start: 1.4 download-retry (timeout 00:09:59) [common]
90 13:41:14.396143 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 13:41:14.396261 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
92 13:41:14.396330 saving as /var/lib/lava/dispatcher/tmp/14879034/tftp-deploy-uolv_d5l/modules/modules.tar
93 13:41:14.396389 total size: 8611320 (8 MB)
94 13:41:14.396471 Using unxz to decompress xz
95 13:41:14.397957 progress 0 % (0 MB)
96 13:41:14.420321 progress 5 % (0 MB)
97 13:41:14.447159 progress 10 % (0 MB)
98 13:41:14.473727 progress 15 % (1 MB)
99 13:41:14.500591 progress 20 % (1 MB)
100 13:41:14.526586 progress 25 % (2 MB)
101 13:41:14.552714 progress 30 % (2 MB)
102 13:41:14.577625 progress 35 % (2 MB)
103 13:41:14.607182 progress 40 % (3 MB)
104 13:41:14.635456 progress 45 % (3 MB)
105 13:41:14.662021 progress 50 % (4 MB)
106 13:41:14.688596 progress 55 % (4 MB)
107 13:41:14.714939 progress 60 % (4 MB)
108 13:41:14.739838 progress 65 % (5 MB)
109 13:41:14.767132 progress 70 % (5 MB)
110 13:41:14.796393 progress 75 % (6 MB)
111 13:41:14.825827 progress 80 % (6 MB)
112 13:41:14.851372 progress 85 % (7 MB)
113 13:41:14.876507 progress 90 % (7 MB)
114 13:41:14.901856 progress 95 % (7 MB)
115 13:41:14.926543 progress 100 % (8 MB)
116 13:41:14.932487 8 MB downloaded in 0.54 s (15.32 MB/s)
117 13:41:14.932657 end: 1.4.1 http-download (duration 00:00:01) [common]
119 13:41:14.932894 end: 1.4 download-retry (duration 00:00:01) [common]
120 13:41:14.932992 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 13:41:14.933081 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 13:41:14.933159 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 13:41:14.933238 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 13:41:14.933419 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj
125 13:41:14.933569 makedir: /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin
126 13:41:14.933671 makedir: /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/tests
127 13:41:14.933767 makedir: /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/results
128 13:41:14.933858 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-add-keys
129 13:41:14.934021 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-add-sources
130 13:41:14.934174 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-background-process-start
131 13:41:14.934303 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-background-process-stop
132 13:41:14.934442 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-common-functions
133 13:41:14.934606 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-echo-ipv4
134 13:41:14.934771 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-install-packages
135 13:41:14.934935 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-installed-packages
136 13:41:14.935101 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-os-build
137 13:41:14.935256 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-probe-channel
138 13:41:14.935415 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-probe-ip
139 13:41:14.935579 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-target-ip
140 13:41:14.935706 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-target-mac
141 13:41:14.935829 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-target-storage
142 13:41:14.935955 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-test-case
143 13:41:14.936094 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-test-event
144 13:41:14.936250 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-test-feedback
145 13:41:14.936375 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-test-raise
146 13:41:14.936511 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-test-reference
147 13:41:14.936650 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-test-runner
148 13:41:14.936773 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-test-set
149 13:41:14.936896 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-test-shell
150 13:41:14.937027 Updating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-install-packages (oe)
151 13:41:14.937185 Updating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/bin/lava-installed-packages (oe)
152 13:41:14.937306 Creating /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/environment
153 13:41:14.937406 LAVA metadata
154 13:41:14.937483 - LAVA_JOB_ID=14879034
155 13:41:14.937562 - LAVA_DISPATCHER_IP=192.168.201.1
156 13:41:14.937667 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 13:41:14.937728 skipped lava-vland-overlay
158 13:41:14.937800 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 13:41:14.937878 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 13:41:14.937938 skipped lava-multinode-overlay
161 13:41:14.938009 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 13:41:14.938105 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 13:41:14.938179 Loading test definitions
164 13:41:14.938273 start: 1.5.2.3.1 git-repo-action (timeout 00:09:59) [common]
165 13:41:14.938361 Using /lava-14879034 at stage 0
166 13:41:14.938454 Fetching tests from https://github.com/kernelci/kernelci-core
167 13:41:14.938551 Running '/usr/bin/git clone -b kernelci.org --depth=1 https://github.com/kernelci/kernelci-core /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/0/tests/0_sleep'
168 13:41:15.525387 Removing '.git' directory in /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/0/tests/0_sleep
169 13:41:15.526487 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/0/tests/0_sleep/config/lava/sleep/sleep.yaml
170 13:41:15.526826 uuid=14879034_1.5.2.3.1 testdef=None
171 13:41:15.526967 end: 1.5.2.3.1 git-repo-action (duration 00:00:01) [common]
173 13:41:15.527321 start: 1.5.2.3.2 test-overlay (timeout 00:09:58) [common]
174 13:41:15.527904 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
176 13:41:15.528148 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:58) [common]
177 13:41:15.528931 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
179 13:41:15.529190 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
180 13:41:15.529874 runner path: /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/0/tests/0_sleep test_uuid 14879034_1.5.2.3.1
181 13:41:15.529959 sleep_params='mem freeze'
182 13:41:15.530119 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
184 13:41:15.530325 Creating lava-test-runner.conf files
185 13:41:15.530387 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14879034/lava-overlay-r4lfwuoj/lava-14879034/0 for stage 0
186 13:41:15.530477 - 0_sleep
187 13:41:15.530585 end: 1.5.2.3 test-definition (duration 00:00:01) [common]
188 13:41:15.530702 start: 1.5.2.4 compress-overlay (timeout 00:09:58) [common]
189 13:41:15.685048 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
190 13:41:15.685189 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
191 13:41:15.685286 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
192 13:41:15.685374 end: 1.5.2 lava-overlay (duration 00:00:01) [common]
193 13:41:15.685460 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
194 13:41:18.635798 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:03) [common]
195 13:41:18.635957 start: 1.5.4 extract-modules (timeout 00:09:55) [common]
196 13:41:18.636042 extracting modules file /var/lib/lava/dispatcher/tmp/14879034/tftp-deploy-uolv_d5l/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14879034/extract-overlay-ramdisk-hrvhr001/ramdisk
197 13:41:18.918253 end: 1.5.4 extract-modules (duration 00:00:00) [common]
198 13:41:18.918401 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
199 13:41:18.918494 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14879034/compress-overlay-3yys88vo/overlay-1.5.2.4.tar.gz to ramdisk
200 13:41:18.918563 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14879034/compress-overlay-3yys88vo/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14879034/extract-overlay-ramdisk-hrvhr001/ramdisk
201 13:41:19.032025 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
202 13:41:19.032171 start: 1.5.6 configure-preseed-file (timeout 00:09:54) [common]
203 13:41:19.032266 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
204 13:41:19.032353 start: 1.5.7 compress-ramdisk (timeout 00:09:54) [common]
205 13:41:19.032429 Building ramdisk /var/lib/lava/dispatcher/tmp/14879034/extract-overlay-ramdisk-hrvhr001/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14879034/extract-overlay-ramdisk-hrvhr001/ramdisk
206 13:41:20.888985 >> 674905 blocks
207 13:41:33.962065 rename /var/lib/lava/dispatcher/tmp/14879034/extract-overlay-ramdisk-hrvhr001/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14879034/tftp-deploy-uolv_d5l/ramdisk/ramdisk.cpio.gz
208 13:41:33.962285 end: 1.5.7 compress-ramdisk (duration 00:00:15) [common]
209 13:41:33.962424 start: 1.5.8 prepare-kernel (timeout 00:09:40) [common]
210 13:41:33.962548 start: 1.5.8.1 prepare-fit (timeout 00:09:40) [common]
211 13:41:33.962671 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14879034/tftp-deploy-uolv_d5l/kernel/Image']
212 13:41:49.378847 Returned 0 in 15 seconds
213 13:41:49.379013 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14879034/tftp-deploy-uolv_d5l/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14879034/tftp-deploy-uolv_d5l/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14879034/tftp-deploy-uolv_d5l/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14879034/tftp-deploy-uolv_d5l/kernel/image.itb
214 13:41:50.918864 output: FIT description: Kernel Image image with one or more FDT blobs
215 13:41:50.918989 output: Created: Thu Jul 18 14:41:50 2024
216 13:41:50.919057 output: Image 0 (kernel-1)
217 13:41:50.919119 output: Description:
218 13:41:50.919178 output: Created: Thu Jul 18 14:41:50 2024
219 13:41:50.919236 output: Type: Kernel Image
220 13:41:50.919293 output: Compression: lzma compressed
221 13:41:50.919351 output: Data Size: 13114469 Bytes = 12807.10 KiB = 12.51 MiB
222 13:41:50.919407 output: Architecture: AArch64
223 13:41:50.919463 output: OS: Linux
224 13:41:50.919517 output: Load Address: 0x00000000
225 13:41:50.919571 output: Entry Point: 0x00000000
226 13:41:50.919625 output: Hash algo: crc32
227 13:41:50.919680 output: Hash value: a47b020b
228 13:41:50.919734 output: Image 1 (fdt-1)
229 13:41:50.919789 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
230 13:41:50.919844 output: Created: Thu Jul 18 14:41:50 2024
231 13:41:50.919898 output: Type: Flat Device Tree
232 13:41:50.919951 output: Compression: uncompressed
233 13:41:50.920005 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
234 13:41:50.920059 output: Architecture: AArch64
235 13:41:50.920113 output: Hash algo: crc32
236 13:41:50.920166 output: Hash value: a9713552
237 13:41:50.920218 output: Image 2 (ramdisk-1)
238 13:41:50.920271 output: Description: unavailable
239 13:41:50.920324 output: Created: Thu Jul 18 14:41:50 2024
240 13:41:50.920377 output: Type: RAMDisk Image
241 13:41:50.920430 output: Compression: uncompressed
242 13:41:50.920498 output: Data Size: 108983057 Bytes = 106428.77 KiB = 103.93 MiB
243 13:41:50.920553 output: Architecture: AArch64
244 13:41:50.920606 output: OS: Linux
245 13:41:50.920660 output: Load Address: unavailable
246 13:41:50.920714 output: Entry Point: unavailable
247 13:41:50.920768 output: Hash algo: crc32
248 13:41:50.920821 output: Hash value: 2ed3c8ca
249 13:41:50.920876 output: Default Configuration: 'conf-1'
250 13:41:50.920930 output: Configuration 0 (conf-1)
251 13:41:50.920982 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
252 13:41:50.921036 output: Kernel: kernel-1
253 13:41:50.921110 output: Init Ramdisk: ramdisk-1
254 13:41:50.921170 output: FDT: fdt-1
255 13:41:50.921226 output: Loadables: kernel-1
256 13:41:50.921283 output:
257 13:41:50.921397 end: 1.5.8.1 prepare-fit (duration 00:00:17) [common]
258 13:41:50.921484 end: 1.5.8 prepare-kernel (duration 00:00:17) [common]
259 13:41:50.921568 end: 1.5 prepare-tftp-overlay (duration 00:00:36) [common]
260 13:41:50.921651 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:23) [common]
261 13:41:50.921715 No LXC device requested
262 13:41:50.921799 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
263 13:41:50.921883 start: 1.7 deploy-device-env (timeout 00:09:23) [common]
264 13:41:50.921960 end: 1.7 deploy-device-env (duration 00:00:00) [common]
265 13:41:50.922023 Checking files for TFTP limit of 4294967296 bytes.
266 13:41:50.922429 end: 1 tftp-deploy (duration 00:00:37) [common]
267 13:41:50.922528 start: 2 depthcharge-action (timeout 00:05:00) [common]
268 13:41:50.922615 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
269 13:41:50.922713 substitutions:
270 13:41:50.922778 - {DTB}: 14879034/tftp-deploy-uolv_d5l/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
271 13:41:50.922840 - {INITRD}: 14879034/tftp-deploy-uolv_d5l/ramdisk/ramdisk.cpio.gz
272 13:41:50.922899 - {KERNEL}: 14879034/tftp-deploy-uolv_d5l/kernel/Image
273 13:41:50.922957 - {LAVA_MAC}: None
274 13:41:50.923014 - {PRESEED_CONFIG}: None
275 13:41:50.923069 - {PRESEED_LOCAL}: None
276 13:41:50.923123 - {RAMDISK}: 14879034/tftp-deploy-uolv_d5l/ramdisk/ramdisk.cpio.gz
277 13:41:50.923187 - {ROOT_PART}: None
278 13:41:50.923244 - {ROOT}: None
279 13:41:50.923300 - {SERVER_IP}: 192.168.201.1
280 13:41:50.923354 - {TEE}: None
281 13:41:50.923410 Parsed boot commands:
282 13:41:50.923463 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
283 13:41:50.923639 Parsed boot commands: tftpboot 192.168.201.1 14879034/tftp-deploy-uolv_d5l/kernel/image.itb 14879034/tftp-deploy-uolv_d5l/kernel/cmdline
284 13:41:50.923755 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
285 13:41:50.923839 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
286 13:41:50.923920 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
287 13:41:50.924000 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
288 13:41:50.924061 Not connected, no need to disconnect.
289 13:41:50.924135 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
290 13:41:50.924212 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
291 13:41:50.924305 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
292 13:41:50.927562 Setting prompt string to ['lava-test: # ']
293 13:41:50.927909 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
294 13:41:50.928021 end: 2.2.1 reset-connection (duration 00:00:00) [common]
295 13:41:50.928120 start: 2.2.2 reset-device (timeout 00:05:00) [common]
296 13:41:50.928211 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
297 13:41:50.928411 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=reboot']
298 13:42:00.095172 >> Command sent successfully.
299 13:42:00.099807 Returned 0 in 9 seconds
300 13:42:00.099967 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
302 13:42:00.100217 end: 2.2.2 reset-device (duration 00:00:09) [common]
303 13:42:00.100358 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
304 13:42:00.100482 Setting prompt string to 'Starting depthcharge on Juniper...'
305 13:42:00.100561 Changing prompt to 'Starting depthcharge on Juniper...'
306 13:42:00.100656 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
307 13:42:00.101040 [Enter `^Ec?' for help]
308 13:42:06.833705 [DL] 00000000 00000000 010701
309 13:42:06.838258
310 13:42:06.838346
311 13:42:06.838436 F0: 102B 0000
312 13:42:06.838521
313 13:42:06.838600 F3: 1006 0033 [0200]
314 13:42:06.841655
315 13:42:06.841795 F3: 4001 00E0 [0200]
316 13:42:06.841895
317 13:42:06.841987 F3: 0000 0000
318 13:42:06.844896
319 13:42:06.844970 V0: 0000 0000 [0001]
320 13:42:06.845047
321 13:42:06.845147 00: 1027 0002
322 13:42:06.845213
323 13:42:06.848110 01: 0000 0000
324 13:42:06.848192
325 13:42:06.848254 BP: 0C00 0251 [0000]
326 13:42:06.848312
327 13:42:06.851629 G0: 1182 0000
328 13:42:06.851721
329 13:42:06.851807 EC: 0004 0000 [0001]
330 13:42:06.851888
331 13:42:06.855097 S7: 0000 0000 [0000]
332 13:42:06.855184
333 13:42:06.858044 CC: 0000 0000 [0001]
334 13:42:06.858144
335 13:42:06.858231 T0: 0000 00DB [000F]
336 13:42:06.858312
337 13:42:06.858391 Jump to BL
338 13:42:06.858490
339 13:42:06.894110
340 13:42:06.894208
341 13:42:06.900670 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
342 13:42:06.904385 ARM64: Exception handlers installed.
343 13:42:06.907926 ARM64: Testing exception
344 13:42:06.910854 ARM64: Done test exception
345 13:42:06.914971 WDT: Last reset was cold boot
346 13:42:06.915058 SPI0(PAD0) initialized at 992727 Hz
347 13:42:06.921427 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
348 13:42:06.921531 Manufacturer: ef
349 13:42:06.928386 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
350 13:42:06.941088 Probing TPM: . done!
351 13:42:06.941210 TPM ready after 0 ms
352 13:42:06.947902 Connected to device vid:did:rid of 1ae0:0028:00
353 13:42:06.954454 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
354 13:42:06.957808 Initialized TPM device CR50 revision 0
355 13:42:07.002071 tlcl_send_startup: Startup return code is 0
356 13:42:07.002212 TPM: setup succeeded
357 13:42:07.011233 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
358 13:42:07.014697 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
359 13:42:07.018012 in-header: 03 19 00 00 08 00 00 00
360 13:42:07.021489 in-data: a2 e0 47 00 13 00 00 00
361 13:42:07.024942 Chrome EC: UHEPI supported
362 13:42:07.031385 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
363 13:42:07.034927 in-header: 03 a1 00 00 08 00 00 00
364 13:42:07.038302 in-data: 84 60 60 10 00 00 00 00
365 13:42:07.038716 Phase 1
366 13:42:07.041734 FMAP: area GBB found @ 3f5000 (12032 bytes)
367 13:42:07.052373 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
368 13:42:07.054853 VB2:vb2_check_recovery() Recovery was requested manually
369 13:42:07.058187 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
370 13:42:07.064141 Recovery requested (1009000e)
371 13:42:07.073019 tlcl_extend: response is 0
372 13:42:07.078901 tlcl_extend: response is 0
373 13:42:07.103368
374 13:42:07.103749
375 13:42:07.110130 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
376 13:42:07.113255 ARM64: Exception handlers installed.
377 13:42:07.116362 ARM64: Testing exception
378 13:42:07.119887 ARM64: Done test exception
379 13:42:07.135267 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2024
380 13:42:07.142172 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
381 13:42:07.145716 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
382 13:42:07.153915 [RTC]rtc_get_frequency_meter,134: input=0xf, output=912
383 13:42:07.161286 [RTC]rtc_get_frequency_meter,134: input=0x7, output=779
384 13:42:07.167539 [RTC]rtc_get_frequency_meter,134: input=0xb, output=847
385 13:42:07.174519 [RTC]rtc_get_frequency_meter,134: input=0x9, output=814
386 13:42:07.181619 [RTC]rtc_get_frequency_meter,134: input=0x8, output=796
387 13:42:07.184962 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
388 13:42:07.191278 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
389 13:42:07.194274 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
390 13:42:07.197761 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
391 13:42:07.204775 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
392 13:42:07.207512 in-header: 03 19 00 00 08 00 00 00
393 13:42:07.207616 in-data: a2 e0 47 00 13 00 00 00
394 13:42:07.211596 Chrome EC: UHEPI supported
395 13:42:07.217627 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
396 13:42:07.221471 in-header: 03 a1 00 00 08 00 00 00
397 13:42:07.224433 in-data: 84 60 60 10 00 00 00 00
398 13:42:07.227750 Skip loading cached calibration data
399 13:42:07.234370 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
400 13:42:07.237871 in-header: 03 a1 00 00 08 00 00 00
401 13:42:07.241242 in-data: 84 60 60 10 00 00 00 00
402 13:42:07.247967 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
403 13:42:07.251356 in-header: 03 a1 00 00 08 00 00 00
404 13:42:07.254531 in-data: 84 60 60 10 00 00 00 00
405 13:42:07.257726 ADC[3]: Raw value=216571 ID=1
406 13:42:07.257804 Manufacturer: ef
407 13:42:07.264993 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
408 13:42:07.267817 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
409 13:42:07.271117 CBFS @ 21000 size 3d4000
410 13:42:07.274763 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
411 13:42:07.281117 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
412 13:42:07.284466 CBFS: Found @ offset 3c700 size 44
413 13:42:07.284551 DRAM-K: Full Calibration
414 13:42:07.291272 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
415 13:42:07.291379 CBFS @ 21000 size 3d4000
416 13:42:07.297933 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
417 13:42:07.301242 CBFS: Locating 'fallback/dram'
418 13:42:07.304608 CBFS: Found @ offset 24b00 size 12268
419 13:42:07.332406 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
420 13:42:07.336293 ddr_geometry: 1, config: 0x0
421 13:42:07.339321 header.status = 0x0
422 13:42:07.342626 header.magic = 0x44524d4b (expected: 0x44524d4b)
423 13:42:07.346060 header.version = 0x5 (expected: 0x5)
424 13:42:07.349233 header.size = 0x8f0 (expected: 0x8f0)
425 13:42:07.349359 header.config = 0x0
426 13:42:07.352571 header.flags = 0x0
427 13:42:07.352683 header.checksum = 0x0
428 13:42:07.359461 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
429 13:42:07.366229 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
430 13:42:07.369167 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
431 13:42:07.372332 ddr_geometry:1
432 13:42:07.372450 [EMI] new MDL number = 1
433 13:42:07.375785 dram_cbt_mode_extern: 0
434 13:42:07.379039 dram_cbt_mode [RK0]: 0, [RK1]: 0
435 13:42:07.386020 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
436 13:42:07.386106
437 13:42:07.386176
438 13:42:07.389247 [Bianco] ETT version 0.0.0.1
439 13:42:07.392614 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
440 13:42:07.392700
441 13:42:07.396206 vSetVcoreByFreq with vcore:762500, freq=1600
442 13:42:07.396333
443 13:42:07.396446 [DramcInit]
444 13:42:07.399176 AutoRefreshCKEOff AutoREF OFF
445 13:42:07.402864 DDRPhyPLLSetting-CKEOFF
446 13:42:07.406152 DDRPhyPLLSetting-CKEON
447 13:42:07.406262
448 13:42:07.406354 Enable WDQS
449 13:42:07.409710 [ModeRegInit_LP4] CH0 RK0
450 13:42:07.413200 Write Rank0 MR13 =0x18
451 13:42:07.413345 Write Rank0 MR12 =0x5d
452 13:42:07.416343 Write Rank0 MR1 =0x56
453 13:42:07.420121 Write Rank0 MR2 =0x1a
454 13:42:07.420280 Write Rank0 MR11 =0x0
455 13:42:07.423225 Write Rank0 MR22 =0x38
456 13:42:07.423434 Write Rank0 MR14 =0x5d
457 13:42:07.426832 Write Rank0 MR3 =0x30
458 13:42:07.430156 Write Rank0 MR13 =0x58
459 13:42:07.430388 Write Rank0 MR12 =0x5d
460 13:42:07.433199 Write Rank0 MR1 =0x56
461 13:42:07.433535 Write Rank0 MR2 =0x2d
462 13:42:07.436645 Write Rank0 MR11 =0x23
463 13:42:07.440294 Write Rank0 MR22 =0x34
464 13:42:07.440852 Write Rank0 MR14 =0x10
465 13:42:07.443435 Write Rank0 MR3 =0x30
466 13:42:07.446674 Write Rank0 MR13 =0xd8
467 13:42:07.447313 [ModeRegInit_LP4] CH0 RK1
468 13:42:07.449966 Write Rank1 MR13 =0x18
469 13:42:07.450613 Write Rank1 MR12 =0x5d
470 13:42:07.453398 Write Rank1 MR1 =0x56
471 13:42:07.456712 Write Rank1 MR2 =0x1a
472 13:42:07.457277 Write Rank1 MR11 =0x0
473 13:42:07.460038 Write Rank1 MR22 =0x38
474 13:42:07.463430 Write Rank1 MR14 =0x5d
475 13:42:07.464010 Write Rank1 MR3 =0x30
476 13:42:07.466919 Write Rank1 MR13 =0x58
477 13:42:07.467435 Write Rank1 MR12 =0x5d
478 13:42:07.470248 Write Rank1 MR1 =0x56
479 13:42:07.473605 Write Rank1 MR2 =0x2d
480 13:42:07.474134 Write Rank1 MR11 =0x23
481 13:42:07.476789 Write Rank1 MR22 =0x34
482 13:42:07.477149 Write Rank1 MR14 =0x10
483 13:42:07.480010 Write Rank1 MR3 =0x30
484 13:42:07.483537 Write Rank1 MR13 =0xd8
485 13:42:07.483854 [ModeRegInit_LP4] CH1 RK0
486 13:42:07.486797 Write Rank0 MR13 =0x18
487 13:42:07.489987 Write Rank0 MR12 =0x5d
488 13:42:07.490204 Write Rank0 MR1 =0x56
489 13:42:07.493016 Write Rank0 MR2 =0x1a
490 13:42:07.493167 Write Rank0 MR11 =0x0
491 13:42:07.496320 Write Rank0 MR22 =0x38
492 13:42:07.499646 Write Rank0 MR14 =0x5d
493 13:42:07.499773 Write Rank0 MR3 =0x30
494 13:42:07.503219 Write Rank0 MR13 =0x58
495 13:42:07.503319 Write Rank0 MR12 =0x5d
496 13:42:07.506685 Write Rank0 MR1 =0x56
497 13:42:07.510214 Write Rank0 MR2 =0x2d
498 13:42:07.510301 Write Rank0 MR11 =0x23
499 13:42:07.512982 Write Rank0 MR22 =0x34
500 13:42:07.513056 Write Rank0 MR14 =0x10
501 13:42:07.516417 Write Rank0 MR3 =0x30
502 13:42:07.520055 Write Rank0 MR13 =0xd8
503 13:42:07.520135 [ModeRegInit_LP4] CH1 RK1
504 13:42:07.523376 Write Rank1 MR13 =0x18
505 13:42:07.526708 Write Rank1 MR12 =0x5d
506 13:42:07.526786 Write Rank1 MR1 =0x56
507 13:42:07.529967 Write Rank1 MR2 =0x1a
508 13:42:07.530044 Write Rank1 MR11 =0x0
509 13:42:07.533523 Write Rank1 MR22 =0x38
510 13:42:07.536977 Write Rank1 MR14 =0x5d
511 13:42:07.537055 Write Rank1 MR3 =0x30
512 13:42:07.539881 Write Rank1 MR13 =0x58
513 13:42:07.539957 Write Rank1 MR12 =0x5d
514 13:42:07.543556 Write Rank1 MR1 =0x56
515 13:42:07.546847 Write Rank1 MR2 =0x2d
516 13:42:07.546938 Write Rank1 MR11 =0x23
517 13:42:07.549643 Write Rank1 MR22 =0x34
518 13:42:07.549738 Write Rank1 MR14 =0x10
519 13:42:07.553147 Write Rank1 MR3 =0x30
520 13:42:07.556532 Write Rank1 MR13 =0xd8
521 13:42:07.556623 match AC timing 3
522 13:42:07.567105 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
523 13:42:07.567209 [MiockJmeterHQA]
524 13:42:07.573163 vSetVcoreByFreq with vcore:762500, freq=1600
525 13:42:07.677848
526 13:42:07.677973 MIOCK jitter meter ch=0
527 13:42:07.678045
528 13:42:07.681347 1T = (102-17) = 85 dly cells
529 13:42:07.687633 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
530 13:42:07.691060 vSetVcoreByFreq with vcore:725000, freq=1200
531 13:42:07.791056
532 13:42:07.791270 MIOCK jitter meter ch=0
533 13:42:07.791412
534 13:42:07.794813 1T = (97-16) = 81 dly cells
535 13:42:07.801213 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps
536 13:42:07.804625 vSetVcoreByFreq with vcore:725000, freq=800
537 13:42:07.904861
538 13:42:07.905372 MIOCK jitter meter ch=0
539 13:42:07.905778
540 13:42:07.908055 1T = (97-16) = 81 dly cells
541 13:42:07.914921 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps
542 13:42:07.918531 vSetVcoreByFreq with vcore:762500, freq=1600
543 13:42:07.921495 vSetVcoreByFreq with vcore:762500, freq=1600
544 13:42:07.921961
545 13:42:07.922327 K DRVP
546 13:42:07.924839 1. OCD DRVP=0 CALOUT=0
547 13:42:07.928514 1. OCD DRVP=1 CALOUT=0
548 13:42:07.928987 1. OCD DRVP=2 CALOUT=0
549 13:42:07.931856 1. OCD DRVP=3 CALOUT=0
550 13:42:07.932341 1. OCD DRVP=4 CALOUT=0
551 13:42:07.934855 1. OCD DRVP=5 CALOUT=0
552 13:42:07.938287 1. OCD DRVP=6 CALOUT=0
553 13:42:07.938804 1. OCD DRVP=7 CALOUT=0
554 13:42:07.941841 1. OCD DRVP=8 CALOUT=0
555 13:42:07.945260 1. OCD DRVP=9 CALOUT=1
556 13:42:07.945745
557 13:42:07.946316 1. OCD DRVP calibration OK! DRVP=9
558 13:42:07.948224
559 13:42:07.948869
560 13:42:07.949271
561 13:42:07.949739 K ODTN
562 13:42:07.951547 3. OCD ODTN=0 ,CALOUT=1
563 13:42:07.951903 3. OCD ODTN=1 ,CALOUT=1
564 13:42:07.955245 3. OCD ODTN=2 ,CALOUT=1
565 13:42:07.955675 3. OCD ODTN=3 ,CALOUT=1
566 13:42:07.958295 3. OCD ODTN=4 ,CALOUT=1
567 13:42:07.961596 3. OCD ODTN=5 ,CALOUT=1
568 13:42:07.962052 3. OCD ODTN=6 ,CALOUT=1
569 13:42:07.965323 3. OCD ODTN=7 ,CALOUT=0
570 13:42:07.965829
571 13:42:07.968588 3. OCD ODTN calibration OK! ODTN=7
572 13:42:07.969104
573 13:42:07.971794 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
574 13:42:07.974841 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
575 13:42:07.981911 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
576 13:42:07.982397
577 13:42:07.982893 K DRVP
578 13:42:07.985459 1. OCD DRVP=0 CALOUT=0
579 13:42:07.986093 1. OCD DRVP=1 CALOUT=0
580 13:42:07.988899 1. OCD DRVP=2 CALOUT=0
581 13:42:07.991565 1. OCD DRVP=3 CALOUT=0
582 13:42:07.992055 1. OCD DRVP=4 CALOUT=0
583 13:42:07.994886 1. OCD DRVP=5 CALOUT=0
584 13:42:07.995453 1. OCD DRVP=6 CALOUT=0
585 13:42:07.998296 1. OCD DRVP=7 CALOUT=0
586 13:42:08.001919 1. OCD DRVP=8 CALOUT=0
587 13:42:08.002678 1. OCD DRVP=9 CALOUT=0
588 13:42:08.005587 1. OCD DRVP=10 CALOUT=0
589 13:42:08.008177 1. OCD DRVP=11 CALOUT=1
590 13:42:08.008740
591 13:42:08.011419 1. OCD DRVP calibration OK! DRVP=11
592 13:42:08.012114
593 13:42:08.012694
594 13:42:08.013173
595 13:42:08.013593 K ODTN
596 13:42:08.015447 3. OCD ODTN=0 ,CALOUT=1
597 13:42:08.015949 3. OCD ODTN=1 ,CALOUT=1
598 13:42:08.018464 3. OCD ODTN=2 ,CALOUT=1
599 13:42:08.021873 3. OCD ODTN=3 ,CALOUT=1
600 13:42:08.022210 3. OCD ODTN=4 ,CALOUT=1
601 13:42:08.025197 3. OCD ODTN=5 ,CALOUT=1
602 13:42:08.028728 3. OCD ODTN=6 ,CALOUT=1
603 13:42:08.029012 3. OCD ODTN=7 ,CALOUT=1
604 13:42:08.031584 3. OCD ODTN=8 ,CALOUT=1
605 13:42:08.031946 3. OCD ODTN=9 ,CALOUT=1
606 13:42:08.035134 3. OCD ODTN=10 ,CALOUT=1
607 13:42:08.038148 3. OCD ODTN=11 ,CALOUT=1
608 13:42:08.038516 3. OCD ODTN=12 ,CALOUT=1
609 13:42:08.041595 3. OCD ODTN=13 ,CALOUT=1
610 13:42:08.045142 3. OCD ODTN=14 ,CALOUT=1
611 13:42:08.045418 3. OCD ODTN=15 ,CALOUT=0
612 13:42:08.048589
613 13:42:08.049052 3. OCD ODTN calibration OK! ODTN=15
614 13:42:08.051593
615 13:42:08.055040 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
616 13:42:08.058477 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
617 13:42:08.062041 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
618 13:42:08.062431
619 13:42:08.064962 [DramcInit]
620 13:42:08.068427 AutoRefreshCKEOff AutoREF OFF
621 13:42:08.068731 DDRPhyPLLSetting-CKEOFF
622 13:42:08.071575 DDRPhyPLLSetting-CKEON
623 13:42:08.071885
624 13:42:08.072144 Enable WDQS
625 13:42:08.072357 ==
626 13:42:08.078543 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
627 13:42:08.082029 fsp= 1, odt_onoff= 1, Byte mode= 0
628 13:42:08.082358 ==
629 13:42:08.084996 [Duty_Offset_Calibration]
630 13:42:08.085305
631 13:42:08.085611 ===========================
632 13:42:08.088251 B0:1 B1:1 CA:1
633 13:42:08.107019 ==
634 13:42:08.110508 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
635 13:42:08.114113 fsp= 1, odt_onoff= 1, Byte mode= 0
636 13:42:08.114187 ==
637 13:42:08.117306 [Duty_Offset_Calibration]
638 13:42:08.117376
639 13:42:08.120479 ===========================
640 13:42:08.120598 B0:1 B1:0 CA:2
641 13:42:08.153605 [ModeRegInit_LP4] CH0 RK0
642 13:42:08.157077 Write Rank0 MR13 =0x18
643 13:42:08.157194 Write Rank0 MR12 =0x5d
644 13:42:08.160689 Write Rank0 MR1 =0x56
645 13:42:08.164089 Write Rank0 MR2 =0x1a
646 13:42:08.164166 Write Rank0 MR11 =0x0
647 13:42:08.167484 Write Rank0 MR22 =0x38
648 13:42:08.167559 Write Rank0 MR14 =0x5d
649 13:42:08.170619 Write Rank0 MR3 =0x30
650 13:42:08.173982 Write Rank0 MR13 =0x58
651 13:42:08.174071 Write Rank0 MR12 =0x5d
652 13:42:08.177232 Write Rank0 MR1 =0x56
653 13:42:08.177318 Write Rank0 MR2 =0x2d
654 13:42:08.180391 Write Rank0 MR11 =0x23
655 13:42:08.184010 Write Rank0 MR22 =0x34
656 13:42:08.184113 Write Rank0 MR14 =0x10
657 13:42:08.187183 Write Rank0 MR3 =0x30
658 13:42:08.190369 Write Rank0 MR13 =0xd8
659 13:42:08.190474 [ModeRegInit_LP4] CH0 RK1
660 13:42:08.193770 Write Rank1 MR13 =0x18
661 13:42:08.193880 Write Rank1 MR12 =0x5d
662 13:42:08.197675 Write Rank1 MR1 =0x56
663 13:42:08.200294 Write Rank1 MR2 =0x1a
664 13:42:08.200402 Write Rank1 MR11 =0x0
665 13:42:08.203567 Write Rank1 MR22 =0x38
666 13:42:08.203670 Write Rank1 MR14 =0x5d
667 13:42:08.207067 Write Rank1 MR3 =0x30
668 13:42:08.210277 Write Rank1 MR13 =0x58
669 13:42:08.210352 Write Rank1 MR12 =0x5d
670 13:42:08.214023 Write Rank1 MR1 =0x56
671 13:42:08.214122 Write Rank1 MR2 =0x2d
672 13:42:08.217538 Write Rank1 MR11 =0x23
673 13:42:08.220436 Write Rank1 MR22 =0x34
674 13:42:08.220524 Write Rank1 MR14 =0x10
675 13:42:08.223762 Write Rank1 MR3 =0x30
676 13:42:08.227132 Write Rank1 MR13 =0xd8
677 13:42:08.227215 [ModeRegInit_LP4] CH1 RK0
678 13:42:08.230413 Write Rank0 MR13 =0x18
679 13:42:08.230520 Write Rank0 MR12 =0x5d
680 13:42:08.233711 Write Rank0 MR1 =0x56
681 13:42:08.237044 Write Rank0 MR2 =0x1a
682 13:42:08.237143 Write Rank0 MR11 =0x0
683 13:42:08.240416 Write Rank0 MR22 =0x38
684 13:42:08.240508 Write Rank0 MR14 =0x5d
685 13:42:08.243962 Write Rank0 MR3 =0x30
686 13:42:08.247270 Write Rank0 MR13 =0x58
687 13:42:08.247339 Write Rank0 MR12 =0x5d
688 13:42:08.250840 Write Rank0 MR1 =0x56
689 13:42:08.250917 Write Rank0 MR2 =0x2d
690 13:42:08.254173 Write Rank0 MR11 =0x23
691 13:42:08.257649 Write Rank0 MR22 =0x34
692 13:42:08.257719 Write Rank0 MR14 =0x10
693 13:42:08.261088 Write Rank0 MR3 =0x30
694 13:42:08.264126 Write Rank0 MR13 =0xd8
695 13:42:08.264196 [ModeRegInit_LP4] CH1 RK1
696 13:42:08.267547 Write Rank1 MR13 =0x18
697 13:42:08.267616 Write Rank1 MR12 =0x5d
698 13:42:08.271233 Write Rank1 MR1 =0x56
699 13:42:08.274110 Write Rank1 MR2 =0x1a
700 13:42:08.274178 Write Rank1 MR11 =0x0
701 13:42:08.277490 Write Rank1 MR22 =0x38
702 13:42:08.281009 Write Rank1 MR14 =0x5d
703 13:42:08.281091 Write Rank1 MR3 =0x30
704 13:42:08.283930 Write Rank1 MR13 =0x58
705 13:42:08.283999 Write Rank1 MR12 =0x5d
706 13:42:08.287337 Write Rank1 MR1 =0x56
707 13:42:08.291002 Write Rank1 MR2 =0x2d
708 13:42:08.291079 Write Rank1 MR11 =0x23
709 13:42:08.294328 Write Rank1 MR22 =0x34
710 13:42:08.294403 Write Rank1 MR14 =0x10
711 13:42:08.297484 Write Rank1 MR3 =0x30
712 13:42:08.300638 Write Rank1 MR13 =0xd8
713 13:42:08.300715 match AC timing 3
714 13:42:08.310942 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
715 13:42:08.314002 DramC Write-DBI off
716 13:42:08.314090 DramC Read-DBI off
717 13:42:08.317405 Write Rank0 MR13 =0x59
718 13:42:08.317482 ==
719 13:42:08.320660 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
720 13:42:08.324445 fsp= 1, odt_onoff= 1, Byte mode= 0
721 13:42:08.324543 ==
722 13:42:08.327586 === u2Vref_new: 0x56 --> 0x2d
723 13:42:08.330827 === u2Vref_new: 0x58 --> 0x38
724 13:42:08.334288 === u2Vref_new: 0x5a --> 0x39
725 13:42:08.337573 === u2Vref_new: 0x5c --> 0x3c
726 13:42:08.340874 === u2Vref_new: 0x5e --> 0x3d
727 13:42:08.344252 === u2Vref_new: 0x60 --> 0xa0
728 13:42:08.347881 [CA 0] Center 34 (6~63) winsize 58
729 13:42:08.351065 [CA 1] Center 36 (9~63) winsize 55
730 13:42:08.354360 [CA 2] Center 29 (0~59) winsize 60
731 13:42:08.357520 [CA 3] Center 24 (-3~52) winsize 56
732 13:42:08.357608 [CA 4] Center 25 (-3~54) winsize 58
733 13:42:08.360928 [CA 5] Center 29 (0~59) winsize 60
734 13:42:08.361013
735 13:42:08.367432 [CATrainingPosCal] consider 1 rank data
736 13:42:08.367517 u2DelayCellTimex100 = 735/100 ps
737 13:42:08.374446 CA0 delay=34 (6~63),Diff = 10 PI (13 cell)
738 13:42:08.377945 CA1 delay=36 (9~63),Diff = 12 PI (15 cell)
739 13:42:08.381192 CA2 delay=29 (0~59),Diff = 5 PI (6 cell)
740 13:42:08.384262 CA3 delay=24 (-3~52),Diff = 0 PI (0 cell)
741 13:42:08.387900 CA4 delay=25 (-3~54),Diff = 1 PI (1 cell)
742 13:42:08.391245 CA5 delay=29 (0~59),Diff = 5 PI (6 cell)
743 13:42:08.391329
744 13:42:08.394167 CA PerBit enable=1, Macro0, CA PI delay=24
745 13:42:08.398105 === u2Vref_new: 0x5e --> 0x3d
746 13:42:08.398178
747 13:42:08.401100 Vref(ca) range 1: 30
748 13:42:08.401174
749 13:42:08.401235 CS Dly= 9 (40-0-32)
750 13:42:08.404493 Write Rank0 MR13 =0xd8
751 13:42:08.404563 Write Rank0 MR13 =0xd8
752 13:42:08.407724 Write Rank0 MR12 =0x5e
753 13:42:08.411226 Write Rank1 MR13 =0x59
754 13:42:08.411327 ==
755 13:42:08.414336 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
756 13:42:08.417844 fsp= 1, odt_onoff= 1, Byte mode= 0
757 13:42:08.417929 ==
758 13:42:08.420906 === u2Vref_new: 0x56 --> 0x2d
759 13:42:08.424779 === u2Vref_new: 0x58 --> 0x38
760 13:42:08.428023 === u2Vref_new: 0x5a --> 0x39
761 13:42:08.431093 === u2Vref_new: 0x5c --> 0x3c
762 13:42:08.434316 === u2Vref_new: 0x5e --> 0x3d
763 13:42:08.437676 === u2Vref_new: 0x60 --> 0xa0
764 13:42:08.441070 [CA 0] Center 36 (9~63) winsize 55
765 13:42:08.444611 [CA 1] Center 36 (9~63) winsize 55
766 13:42:08.448149 [CA 2] Center 31 (3~60) winsize 58
767 13:42:08.450997 [CA 3] Center 25 (-3~53) winsize 57
768 13:42:08.454768 [CA 4] Center 25 (-3~54) winsize 58
769 13:42:08.454852 [CA 5] Center 31 (2~61) winsize 60
770 13:42:08.458078
771 13:42:08.461334 [CATrainingPosCal] consider 2 rank data
772 13:42:08.461419 u2DelayCellTimex100 = 735/100 ps
773 13:42:08.467847 CA0 delay=36 (9~63),Diff = 12 PI (15 cell)
774 13:42:08.471093 CA1 delay=36 (9~63),Diff = 12 PI (15 cell)
775 13:42:08.474536 CA2 delay=31 (3~59),Diff = 7 PI (9 cell)
776 13:42:08.478160 CA3 delay=24 (-3~52),Diff = 0 PI (0 cell)
777 13:42:08.481050 CA4 delay=25 (-3~54),Diff = 1 PI (1 cell)
778 13:42:08.484507 CA5 delay=30 (2~59),Diff = 6 PI (7 cell)
779 13:42:08.484594
780 13:42:08.488013 CA PerBit enable=1, Macro0, CA PI delay=24
781 13:42:08.491244 === u2Vref_new: 0x5c --> 0x3c
782 13:42:08.491328
783 13:42:08.494995 Vref(ca) range 1: 28
784 13:42:08.495073
785 13:42:08.495136 CS Dly= 7 (38-0-32)
786 13:42:08.497690 Write Rank1 MR13 =0xd8
787 13:42:08.500991 Write Rank1 MR13 =0xd8
788 13:42:08.501073 Write Rank1 MR12 =0x5c
789 13:42:08.504475 [RankSwap] Rank num 2, (Multi 1), Rank 0
790 13:42:08.507896 Write Rank0 MR2 =0xad
791 13:42:08.507974 [Write Leveling]
792 13:42:08.511241 delay byte0 byte1 byte2 byte3
793 13:42:08.511312
794 13:42:08.514635 10 0 0
795 13:42:08.514739 11 0 0
796 13:42:08.517930 12 0 0
797 13:42:08.518012 13 0 0
798 13:42:08.518076 14 0 0
799 13:42:08.521003 15 0 0
800 13:42:08.521074 16 0 0
801 13:42:08.524216 17 0 0
802 13:42:08.524324 18 0 0
803 13:42:08.527987 19 0 0
804 13:42:08.528091 20 0 0
805 13:42:08.528184 21 0 0
806 13:42:08.531357 22 0 0
807 13:42:08.531428 23 0 0
808 13:42:08.534338 24 0 ff
809 13:42:08.534426 25 0 ff
810 13:42:08.534494 26 0 ff
811 13:42:08.537674 27 0 ff
812 13:42:08.537761 28 0 ff
813 13:42:08.540986 29 0 ff
814 13:42:08.541072 30 0 ff
815 13:42:08.544272 31 0 ff
816 13:42:08.544358 32 0 ff
817 13:42:08.547595 33 ff ff
818 13:42:08.547682 34 ff ff
819 13:42:08.550938 35 ff ff
820 13:42:08.551025 36 ff ff
821 13:42:08.551092 37 ff ff
822 13:42:08.554468 38 ff ff
823 13:42:08.554555 39 ff ff
824 13:42:08.561100 pass bytecount = 0xff (0xff: all bytes pass)
825 13:42:08.561186
826 13:42:08.561251 DQS0 dly: 33
827 13:42:08.561313 DQS1 dly: 24
828 13:42:08.564708 Write Rank0 MR2 =0x2d
829 13:42:08.568018 [RankSwap] Rank num 2, (Multi 1), Rank 0
830 13:42:08.571192 Write Rank0 MR1 =0xd6
831 13:42:08.571297 [Gating]
832 13:42:08.571390 ==
833 13:42:08.574153 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
834 13:42:08.577549 fsp= 1, odt_onoff= 1, Byte mode= 0
835 13:42:08.580906 ==
836 13:42:08.584250 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
837 13:42:08.587728 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
838 13:42:08.591224 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
839 13:42:08.597540 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
840 13:42:08.601085 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
841 13:42:08.604447 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
842 13:42:08.610878 3 1 24 |1211 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
843 13:42:08.614216 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
844 13:42:08.617754 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
845 13:42:08.624717 3 2 4 |3534 2f2f |(11 11)(11 11) |(0 0)(1 1)| 0
846 13:42:08.627945 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
847 13:42:08.631225 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
848 13:42:08.637464 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
849 13:42:08.640937 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
850 13:42:08.644359 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
851 13:42:08.647916 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
852 13:42:08.654653 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
853 13:42:08.657747 3 3 4 |3534 1c1c |(11 11)(11 11) |(0 0)(1 1)| 0
854 13:42:08.660970 3 3 8 |3534 1413 |(11 11)(11 11) |(0 0)(1 1)| 0
855 13:42:08.667650 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
856 13:42:08.671483 [Byte 1] Lead/lag falling Transition (3, 3, 12)
857 13:42:08.674879 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
858 13:42:08.678354 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
859 13:42:08.684388 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
860 13:42:08.687947 3 3 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
861 13:42:08.691630 3 4 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
862 13:42:08.698158 3 4 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
863 13:42:08.701203 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 13:42:08.704628 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 13:42:08.711606 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 13:42:08.714993 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 13:42:08.718350 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 13:42:08.724649 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 13:42:08.728041 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 13:42:08.731496 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
871 13:42:08.734976 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
872 13:42:08.741667 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
873 13:42:08.745035 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
874 13:42:08.748630 [Byte 0] Lead/lag falling Transition (3, 5, 16)
875 13:42:08.754873 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
876 13:42:08.758395 [Byte 0] Lead/lag Transition tap number (2)
877 13:42:08.761616 3 5 24 |302f 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
878 13:42:08.765125 [Byte 1] Lead/lag falling Transition (3, 5, 24)
879 13:42:08.771558 3 5 28 |404 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
880 13:42:08.775278 [Byte 1] Lead/lag Transition tap number (2)
881 13:42:08.778510 3 6 0 |4646 3d3d |(0 0)(11 11) |(0 0)(0 0)| 0
882 13:42:08.781598 [Byte 0]First pass (3, 6, 0)
883 13:42:08.785201 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
884 13:42:08.788769 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 13:42:08.791965 [Byte 1]First pass (3, 6, 8)
886 13:42:08.795305 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 13:42:08.798434 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 13:42:08.804805 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 13:42:08.808719 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
890 13:42:08.811729 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
891 13:42:08.815130 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
892 13:42:08.818182 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
893 13:42:08.825091 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
894 13:42:08.828328 All bytes gating window > 1UI, Early break!
895 13:42:08.828431
896 13:42:08.831935 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
897 13:42:08.832009
898 13:42:08.835293 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
899 13:42:08.835363
900 13:42:08.835427
901 13:42:08.835484
902 13:42:08.838809 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
903 13:42:08.838877
904 13:42:08.845189 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
905 13:42:08.845265
906 13:42:08.845331
907 13:42:08.845403 Write Rank0 MR1 =0x56
908 13:42:08.845465
909 13:42:08.848377 best RODT dly(2T, 0.5T) = (2, 2)
910 13:42:08.848475
911 13:42:08.852261 best RODT dly(2T, 0.5T) = (2, 2)
912 13:42:08.852371 ==
913 13:42:08.858325 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
914 13:42:08.861773 fsp= 1, odt_onoff= 1, Byte mode= 0
915 13:42:08.861847 ==
916 13:42:08.865232 Start DQ dly to find pass range UseTestEngine =0
917 13:42:08.868663 x-axis: bit #, y-axis: DQ dly (-127~63)
918 13:42:08.868743 RX Vref Scan = 0
919 13:42:08.871901 -26, [0] xxxxxxxx xxxxxxxx [MSB]
920 13:42:08.875174 -25, [0] xxxxxxxx xxxxxxxx [MSB]
921 13:42:08.878745 -24, [0] xxxxxxxx xxxxxxxx [MSB]
922 13:42:08.882289 -23, [0] xxxxxxxx xxxxxxxx [MSB]
923 13:42:08.885128 -22, [0] xxxxxxxx xxxxxxxx [MSB]
924 13:42:08.888447 -21, [0] xxxxxxxx xxxxxxxx [MSB]
925 13:42:08.892150 -20, [0] xxxxxxxx xxxxxxxx [MSB]
926 13:42:08.895312 -19, [0] xxxxxxxx xxxxxxxx [MSB]
927 13:42:08.895405 -18, [0] xxxxxxxx xxxxxxxx [MSB]
928 13:42:08.898523 -17, [0] xxxxxxxx xxxxxxxx [MSB]
929 13:42:08.902079 -16, [0] xxxxxxxx xxxxxxxx [MSB]
930 13:42:08.905396 -15, [0] xxxxxxxx xxxxxxxx [MSB]
931 13:42:08.908625 -14, [0] xxxxxxxx xxxxxxxx [MSB]
932 13:42:08.912209 -13, [0] xxxxxxxx xxxxxxxx [MSB]
933 13:42:08.915709 -12, [0] xxxxxxxx xxxxxxxx [MSB]
934 13:42:08.915808 -11, [0] xxxxxxxx xxxxxxxx [MSB]
935 13:42:08.918799 -10, [0] xxxxxxxx xxxxxxxx [MSB]
936 13:42:08.922242 -9, [0] xxxxxxxx xxxxxxxx [MSB]
937 13:42:08.925755 -8, [0] xxxxxxxx xxxxxxxx [MSB]
938 13:42:08.928631 -7, [0] xxxxxxxx xxxxxxxx [MSB]
939 13:42:08.932365 -6, [0] xxxxxxxx xxxxxxxx [MSB]
940 13:42:08.935924 -5, [0] xxxxxxxx xxxxxxxx [MSB]
941 13:42:08.936093 -4, [0] xxxxxxxx xxxxxxxx [MSB]
942 13:42:08.939312 -3, [0] xxxxxxxx xxxxxxxx [MSB]
943 13:42:08.942206 -2, [0] xxxoxxxx oxxxxxxx [MSB]
944 13:42:08.945624 -1, [0] xxxoxxxx ooxoxxxx [MSB]
945 13:42:08.949205 0, [0] xxxoxoxx ooxoxxxx [MSB]
946 13:42:08.952882 1, [0] xxxoxoxx ooxoxoxx [MSB]
947 13:42:08.953252 2, [0] xxxoxoox ooxoooxx [MSB]
948 13:42:08.956211 3, [0] xxxoxoox ooxoooxx [MSB]
949 13:42:08.959581 4, [0] xoooxooo ooxooooo [MSB]
950 13:42:08.962486 5, [0] oooooooo ooxooooo [MSB]
951 13:42:08.965942 6, [0] xooooooo ooxooooo [MSB]
952 13:42:08.969409 7, [0] oooooooo ooxooooo [MSB]
953 13:42:08.969761 32, [0] oooxoooo oooooooo [MSB]
954 13:42:08.972424 33, [0] oooxoooo xooooooo [MSB]
955 13:42:08.976095 34, [0] oooxoooo xooooooo [MSB]
956 13:42:08.979500 35, [0] oooxoxoo xooxoooo [MSB]
957 13:42:08.983045 36, [0] oooxoxox xooxoooo [MSB]
958 13:42:08.986083 37, [0] oooxoxxx xxoxoooo [MSB]
959 13:42:08.989249 38, [0] oooxoxxx xxoxxoxo [MSB]
960 13:42:08.989641 39, [0] oooxxxxx xxoxxxxo [MSB]
961 13:42:08.993324 40, [0] xxoxxxxx xxoxxxxo [MSB]
962 13:42:08.996254 41, [0] xxxxxxxx xxoxxxxo [MSB]
963 13:42:08.999930 42, [0] xxxxxxxx xxoxxxxx [MSB]
964 13:42:09.002995 43, [0] xxxxxxxx xxoxxxxx [MSB]
965 13:42:09.006390 44, [0] xxxxxxxx xxxxxxxx [MSB]
966 13:42:09.009575 iDelay=44, Bit 0, Center 23 (7 ~ 39) 33
967 13:42:09.013078 iDelay=44, Bit 1, Center 21 (4 ~ 39) 36
968 13:42:09.016195 iDelay=44, Bit 2, Center 22 (4 ~ 40) 37
969 13:42:09.019518 iDelay=44, Bit 3, Center 14 (-2 ~ 31) 34
970 13:42:09.023238 iDelay=44, Bit 4, Center 21 (5 ~ 38) 34
971 13:42:09.026444 iDelay=44, Bit 5, Center 17 (0 ~ 34) 35
972 13:42:09.029789 iDelay=44, Bit 6, Center 19 (2 ~ 36) 35
973 13:42:09.033426 iDelay=44, Bit 7, Center 19 (4 ~ 35) 32
974 13:42:09.036773 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
975 13:42:09.039935 iDelay=44, Bit 9, Center 17 (-1 ~ 36) 38
976 13:42:09.043366 iDelay=44, Bit 10, Center 25 (8 ~ 43) 36
977 13:42:09.046835 iDelay=44, Bit 11, Center 16 (-1 ~ 34) 36
978 13:42:09.053171 iDelay=44, Bit 12, Center 19 (2 ~ 37) 36
979 13:42:09.056735 iDelay=44, Bit 13, Center 19 (1 ~ 38) 38
980 13:42:09.059544 iDelay=44, Bit 14, Center 20 (4 ~ 37) 34
981 13:42:09.063152 iDelay=44, Bit 15, Center 22 (4 ~ 41) 38
982 13:42:09.063519 ==
983 13:42:09.066809 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
984 13:42:09.070129 fsp= 1, odt_onoff= 1, Byte mode= 0
985 13:42:09.070476 ==
986 13:42:09.073483 DQS Delay:
987 13:42:09.073830 DQS0 = 0, DQS1 = 0
988 13:42:09.076883 DQM Delay:
989 13:42:09.077219 DQM0 = 19, DQM1 = 19
990 13:42:09.077536 DQ Delay:
991 13:42:09.079955 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =14
992 13:42:09.083307 DQ4 =21, DQ5 =17, DQ6 =19, DQ7 =19
993 13:42:09.086821 DQ8 =15, DQ9 =17, DQ10 =25, DQ11 =16
994 13:42:09.089736 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =22
995 13:42:09.090053
996 13:42:09.090334
997 13:42:09.093155 DramC Write-DBI off
998 13:42:09.093629 ==
999 13:42:09.099987 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1000 13:42:09.100392 fsp= 1, odt_onoff= 1, Byte mode= 0
1001 13:42:09.103168 ==
1002 13:42:09.106537 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1003 13:42:09.106941
1004 13:42:09.109983 Begin, DQ Scan Range 920~1176
1005 13:42:09.110412
1006 13:42:09.110716
1007 13:42:09.111009 TX Vref Scan disable
1008 13:42:09.113470 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1009 13:42:09.116434 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1010 13:42:09.123169 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1011 13:42:09.126165 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1012 13:42:09.129662 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1013 13:42:09.133089 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1014 13:42:09.136419 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1015 13:42:09.139893 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1016 13:42:09.143097 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1017 13:42:09.146256 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1018 13:42:09.150029 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1019 13:42:09.153573 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1020 13:42:09.156285 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1021 13:42:09.159742 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1022 13:42:09.163425 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1023 13:42:09.166254 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1024 13:42:09.169741 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1025 13:42:09.173062 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1026 13:42:09.176336 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1027 13:42:09.183084 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1028 13:42:09.186460 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1029 13:42:09.190013 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1030 13:42:09.193401 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1031 13:42:09.196570 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1032 13:42:09.199827 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1033 13:42:09.203239 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1034 13:42:09.206723 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1035 13:42:09.209963 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1036 13:42:09.213332 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1037 13:42:09.216826 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1038 13:42:09.219753 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1039 13:42:09.223216 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1040 13:42:09.226598 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1041 13:42:09.229868 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1042 13:42:09.232828 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1043 13:42:09.236731 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1044 13:42:09.243172 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1045 13:42:09.246324 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1046 13:42:09.249636 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1047 13:42:09.253532 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1048 13:42:09.256367 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1049 13:42:09.259801 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1050 13:42:09.263141 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1051 13:42:09.266388 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1052 13:42:09.269859 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1053 13:42:09.273285 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1054 13:42:09.276750 966 |3 6 6|[0] xxxxxxxx oxxoxxxx [MSB]
1055 13:42:09.279547 967 |3 6 7|[0] xxxxxxxx ooxoxxxx [MSB]
1056 13:42:09.283590 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1057 13:42:09.286653 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1058 13:42:09.289872 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1059 13:42:09.293330 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1060 13:42:09.296270 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1061 13:42:09.299604 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1062 13:42:09.302919 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1063 13:42:09.306444 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1064 13:42:09.309721 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1065 13:42:09.316398 977 |3 6 17|[0] xooooooo oooooooo [MSB]
1066 13:42:09.319765 985 |3 6 25|[0] oooooooo xooooooo [MSB]
1067 13:42:09.323185 986 |3 6 26|[0] oooooooo xooxoooo [MSB]
1068 13:42:09.326158 987 |3 6 27|[0] oooooooo xooxoooo [MSB]
1069 13:42:09.330005 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1070 13:42:09.333613 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1071 13:42:09.336637 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1072 13:42:09.339786 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1073 13:42:09.343018 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1074 13:42:09.346380 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1075 13:42:09.349608 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1076 13:42:09.356103 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1077 13:42:09.359589 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1078 13:42:09.363002 997 |3 6 37|[0] oooxoxxx xxxxxxxx [MSB]
1079 13:42:09.366227 998 |3 6 38|[0] oooxxxxx xxxxxxxx [MSB]
1080 13:42:09.370135 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1081 13:42:09.373277 Byte0, DQ PI dly=986, DQM PI dly= 986
1082 13:42:09.376812 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1083 13:42:09.377202
1084 13:42:09.379592 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1085 13:42:09.380019
1086 13:42:09.383087 Byte1, DQ PI dly=977, DQM PI dly= 977
1087 13:42:09.389952 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1088 13:42:09.390339
1089 13:42:09.392976 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1090 13:42:09.393367
1091 13:42:09.393672 ==
1092 13:42:09.399534 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1093 13:42:09.403150 fsp= 1, odt_onoff= 1, Byte mode= 0
1094 13:42:09.403540 ==
1095 13:42:09.406621 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1096 13:42:09.407010
1097 13:42:09.409821 Begin, DQ Scan Range 953~1017
1098 13:42:09.412351 Write Rank0 MR14 =0x0
1099 13:42:09.419243
1100 13:42:09.419326 CH=0, VrefRange= 0, VrefLevel = 0
1101 13:42:09.426061 TX Bit0 (980~994) 15 987, Bit8 (967~978) 12 972,
1102 13:42:09.429465 TX Bit1 (978~993) 16 985, Bit9 (969~983) 15 976,
1103 13:42:09.436026 TX Bit2 (979~994) 16 986, Bit10 (975~986) 12 980,
1104 13:42:09.439236 TX Bit3 (976~987) 12 981, Bit11 (968~982) 15 975,
1105 13:42:09.442514 TX Bit4 (979~992) 14 985, Bit12 (970~983) 14 976,
1106 13:42:09.449683 TX Bit5 (977~991) 15 984, Bit13 (970~983) 14 976,
1107 13:42:09.453002 TX Bit6 (978~991) 14 984, Bit14 (969~984) 16 976,
1108 13:42:09.456428 TX Bit7 (979~992) 14 985, Bit15 (975~986) 12 980,
1109 13:42:09.456521
1110 13:42:09.459530 Write Rank0 MR14 =0x2
1111 13:42:09.467726
1112 13:42:09.467810 CH=0, VrefRange= 0, VrefLevel = 2
1113 13:42:09.474503 TX Bit0 (979~995) 17 987, Bit8 (967~979) 13 973,
1114 13:42:09.478000 TX Bit1 (978~994) 17 986, Bit9 (969~984) 16 976,
1115 13:42:09.481510 TX Bit2 (979~995) 17 987, Bit10 (974~988) 15 981,
1116 13:42:09.488001 TX Bit3 (975~988) 14 981, Bit11 (968~982) 15 975,
1117 13:42:09.491368 TX Bit4 (978~993) 16 985, Bit12 (970~984) 15 977,
1118 13:42:09.497999 TX Bit5 (977~992) 16 984, Bit13 (969~984) 16 976,
1119 13:42:09.501840 TX Bit6 (978~991) 14 984, Bit14 (969~985) 17 977,
1120 13:42:09.504955 TX Bit7 (979~992) 14 985, Bit15 (974~987) 14 980,
1121 13:42:09.505040
1122 13:42:09.507947 Write Rank0 MR14 =0x4
1123 13:42:09.516381
1124 13:42:09.516473 CH=0, VrefRange= 0, VrefLevel = 4
1125 13:42:09.523214 TX Bit0 (979~995) 17 987, Bit8 (967~980) 14 973,
1126 13:42:09.526675 TX Bit1 (978~994) 17 986, Bit9 (969~984) 16 976,
1127 13:42:09.533473 TX Bit2 (979~996) 18 987, Bit10 (974~989) 16 981,
1128 13:42:09.536701 TX Bit3 (975~990) 16 982, Bit11 (968~983) 16 975,
1129 13:42:09.540309 TX Bit4 (978~993) 16 985, Bit12 (970~984) 15 977,
1130 13:42:09.547122 TX Bit5 (976~992) 17 984, Bit13 (969~984) 16 976,
1131 13:42:09.549912 TX Bit6 (977~992) 16 984, Bit14 (969~986) 18 977,
1132 13:42:09.553924 TX Bit7 (978~993) 16 985, Bit15 (974~987) 14 980,
1133 13:42:09.554009
1134 13:42:09.557068 Write Rank0 MR14 =0x6
1135 13:42:09.565208
1136 13:42:09.565294 CH=0, VrefRange= 0, VrefLevel = 6
1137 13:42:09.571938 TX Bit0 (979~997) 19 988, Bit8 (967~981) 15 974,
1138 13:42:09.575447 TX Bit1 (978~995) 18 986, Bit9 (968~985) 18 976,
1139 13:42:09.582061 TX Bit2 (979~997) 19 988, Bit10 (974~990) 17 982,
1140 13:42:09.585558 TX Bit3 (975~991) 17 983, Bit11 (967~983) 17 975,
1141 13:42:09.589096 TX Bit4 (978~994) 17 986, Bit12 (969~985) 17 977,
1142 13:42:09.595316 TX Bit5 (976~993) 18 984, Bit13 (969~985) 17 977,
1143 13:42:09.598541 TX Bit6 (977~993) 17 985, Bit14 (969~986) 18 977,
1144 13:42:09.602152 TX Bit7 (978~994) 17 986, Bit15 (973~989) 17 981,
1145 13:42:09.602237
1146 13:42:09.605303 Write Rank0 MR14 =0x8
1147 13:42:09.662510
1148 13:42:09.662608 CH=0, VrefRange= 0, VrefLevel = 8
1149 13:42:09.662865 TX Bit0 (978~997) 20 987, Bit8 (966~982) 17 974,
1150 13:42:09.662934 TX Bit1 (977~995) 19 986, Bit9 (968~985) 18 976,
1151 13:42:09.663007 TX Bit2 (978~997) 20 987, Bit10 (974~990) 17 982,
1152 13:42:09.663069 TX Bit3 (974~991) 18 982, Bit11 (967~984) 18 975,
1153 13:42:09.663137 TX Bit4 (978~994) 17 986, Bit12 (969~985) 17 977,
1154 13:42:09.663384 TX Bit5 (976~993) 18 984, Bit13 (969~985) 17 977,
1155 13:42:09.663450 TX Bit6 (977~993) 17 985, Bit14 (968~987) 20 977,
1156 13:42:09.663691 TX Bit7 (978~994) 17 986, Bit15 (973~989) 17 981,
1157 13:42:09.663752
1158 13:42:09.663808 Write Rank0 MR14 =0xa
1159 13:42:09.663864
1160 13:42:09.695864 CH=0, VrefRange= 0, VrefLevel = 10
1161 13:42:09.695950 TX Bit0 (978~998) 21 988, Bit8 (966~983) 18 974,
1162 13:42:09.696205 TX Bit1 (977~996) 20 986, Bit9 (968~986) 19 977,
1163 13:42:09.696276 TX Bit2 (978~998) 21 988, Bit10 (972~990) 19 981,
1164 13:42:09.696487 TX Bit3 (975~991) 17 983, Bit11 (967~984) 18 975,
1165 13:42:09.696552 TX Bit4 (978~995) 18 986, Bit12 (969~985) 17 977,
1166 13:42:09.696794 TX Bit5 (976~994) 19 985, Bit13 (969~986) 18 977,
1167 13:42:09.696857 TX Bit6 (977~994) 18 985, Bit14 (968~987) 20 977,
1168 13:42:09.699913 TX Bit7 (978~994) 17 986, Bit15 (972~990) 19 981,
1169 13:42:09.699998
1170 13:42:09.703408 Write Rank0 MR14 =0xc
1171 13:42:09.712667
1172 13:42:09.716075 CH=0, VrefRange= 0, VrefLevel = 12
1173 13:42:09.719240 TX Bit0 (978~998) 21 988, Bit8 (966~983) 18 974,
1174 13:42:09.722208 TX Bit1 (977~997) 21 987, Bit9 (967~986) 20 976,
1175 13:42:09.729324 TX Bit2 (978~998) 21 988, Bit10 (972~991) 20 981,
1176 13:42:09.732289 TX Bit3 (974~991) 18 982, Bit11 (967~985) 19 976,
1177 13:42:09.735764 TX Bit4 (977~995) 19 986, Bit12 (969~986) 18 977,
1178 13:42:09.742465 TX Bit5 (976~994) 19 985, Bit13 (968~986) 19 977,
1179 13:42:09.745839 TX Bit6 (976~994) 19 985, Bit14 (968~988) 21 978,
1180 13:42:09.749640 TX Bit7 (978~995) 18 986, Bit15 (972~990) 19 981,
1181 13:42:09.749725
1182 13:42:09.753112 Write Rank0 MR14 =0xe
1183 13:42:09.761997
1184 13:42:09.762083 CH=0, VrefRange= 0, VrefLevel = 14
1185 13:42:09.768646 TX Bit0 (978~999) 22 988, Bit8 (966~984) 19 975,
1186 13:42:09.771614 TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977,
1187 13:42:09.775061 TX Bit2 (978~999) 22 988, Bit10 (973~991) 19 982,
1188 13:42:09.782084 TX Bit3 (973~992) 20 982, Bit11 (967~985) 19 976,
1189 13:42:09.785541 TX Bit4 (977~996) 20 986, Bit12 (968~987) 20 977,
1190 13:42:09.792398 TX Bit5 (975~994) 20 984, Bit13 (968~987) 20 977,
1191 13:42:09.795170 TX Bit6 (976~995) 20 985, Bit14 (968~989) 22 978,
1192 13:42:09.798517 TX Bit7 (978~996) 19 987, Bit15 (971~990) 20 980,
1193 13:42:09.798631
1194 13:42:09.805759 wait MRW command Rank0 MR14 =0x10 fired (1)
1195 13:42:09.805873 Write Rank0 MR14 =0x10
1196 13:42:09.814793
1197 13:42:09.818488 CH=0, VrefRange= 0, VrefLevel = 16
1198 13:42:09.821704 TX Bit0 (977~999) 23 988, Bit8 (966~984) 19 975,
1199 13:42:09.824939 TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977,
1200 13:42:09.831795 TX Bit2 (977~999) 23 988, Bit10 (971~991) 21 981,
1201 13:42:09.834799 TX Bit3 (973~992) 20 982, Bit11 (966~985) 20 975,
1202 13:42:09.838208 TX Bit4 (977~997) 21 987, Bit12 (968~987) 20 977,
1203 13:42:09.844850 TX Bit5 (975~995) 21 985, Bit13 (968~988) 21 978,
1204 13:42:09.848193 TX Bit6 (976~996) 21 986, Bit14 (968~990) 23 979,
1205 13:42:09.851550 TX Bit7 (977~996) 20 986, Bit15 (971~991) 21 981,
1206 13:42:09.851650
1207 13:42:09.854866 Write Rank0 MR14 =0x12
1208 13:42:09.864355
1209 13:42:09.867777 CH=0, VrefRange= 0, VrefLevel = 18
1210 13:42:09.871110 TX Bit0 (977~999) 23 988, Bit8 (965~984) 20 974,
1211 13:42:09.874232 TX Bit1 (977~999) 23 988, Bit9 (967~988) 22 977,
1212 13:42:09.881313 TX Bit2 (977~999) 23 988, Bit10 (971~992) 22 981,
1213 13:42:09.884441 TX Bit3 (972~993) 22 982, Bit11 (966~986) 21 976,
1214 13:42:09.887558 TX Bit4 (977~998) 22 987, Bit12 (968~988) 21 978,
1215 13:42:09.894355 TX Bit5 (975~995) 21 985, Bit13 (968~989) 22 978,
1216 13:42:09.897870 TX Bit6 (976~996) 21 986, Bit14 (967~990) 24 978,
1217 13:42:09.901036 TX Bit7 (977~997) 21 987, Bit15 (970~991) 22 980,
1218 13:42:09.901122
1219 13:42:09.904336 Write Rank0 MR14 =0x14
1220 13:42:09.914009
1221 13:42:09.917461 CH=0, VrefRange= 0, VrefLevel = 20
1222 13:42:09.920969 TX Bit0 (977~1000) 24 988, Bit8 (965~985) 21 975,
1223 13:42:09.923703 TX Bit1 (977~999) 23 988, Bit9 (967~989) 23 978,
1224 13:42:09.930747 TX Bit2 (978~1000) 23 989, Bit10 (970~992) 23 981,
1225 13:42:09.934235 TX Bit3 (971~993) 23 982, Bit11 (966~987) 22 976,
1226 13:42:09.937483 TX Bit4 (976~999) 24 987, Bit12 (968~989) 22 978,
1227 13:42:09.944158 TX Bit5 (975~996) 22 985, Bit13 (968~990) 23 979,
1228 13:42:09.947177 TX Bit6 (976~997) 22 986, Bit14 (967~990) 24 978,
1229 13:42:09.950517 TX Bit7 (977~999) 23 988, Bit15 (970~992) 23 981,
1230 13:42:09.953930
1231 13:42:09.954014 Write Rank0 MR14 =0x16
1232 13:42:09.963871
1233 13:42:09.966877 CH=0, VrefRange= 0, VrefLevel = 22
1234 13:42:09.970424 TX Bit0 (977~1000) 24 988, Bit8 (965~985) 21 975,
1235 13:42:09.973862 TX Bit1 (977~999) 23 988, Bit9 (967~989) 23 978,
1236 13:42:09.980470 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1237 13:42:09.983524 TX Bit3 (971~993) 23 982, Bit11 (966~988) 23 977,
1238 13:42:09.987053 TX Bit4 (976~999) 24 987, Bit12 (968~989) 22 978,
1239 13:42:09.993723 TX Bit5 (974~996) 23 985, Bit13 (967~990) 24 978,
1240 13:42:09.997306 TX Bit6 (975~997) 23 986, Bit14 (967~990) 24 978,
1241 13:42:10.000687 TX Bit7 (977~999) 23 988, Bit15 (970~992) 23 981,
1242 13:42:10.003582
1243 13:42:10.003908 Write Rank0 MR14 =0x18
1244 13:42:10.013446
1245 13:42:10.017116 CH=0, VrefRange= 0, VrefLevel = 24
1246 13:42:10.020402 TX Bit0 (977~1000) 24 988, Bit8 (964~986) 23 975,
1247 13:42:10.023992 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1248 13:42:10.030207 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1249 13:42:10.034024 TX Bit3 (971~994) 24 982, Bit11 (966~989) 24 977,
1250 13:42:10.037378 TX Bit4 (976~999) 24 987, Bit12 (968~990) 23 979,
1251 13:42:10.043727 TX Bit5 (974~997) 24 985, Bit13 (967~990) 24 978,
1252 13:42:10.047067 TX Bit6 (975~998) 24 986, Bit14 (967~991) 25 979,
1253 13:42:10.050587 TX Bit7 (977~999) 23 988, Bit15 (969~992) 24 980,
1254 13:42:10.050981
1255 13:42:10.053781 Write Rank0 MR14 =0x1a
1256 13:42:10.063630
1257 13:42:10.067138 CH=0, VrefRange= 0, VrefLevel = 26
1258 13:42:10.070321 TX Bit0 (977~1001) 25 989, Bit8 (963~987) 25 975,
1259 13:42:10.073367 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
1260 13:42:10.080491 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1261 13:42:10.083558 TX Bit3 (971~994) 24 982, Bit11 (965~989) 25 977,
1262 13:42:10.086914 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1263 13:42:10.093448 TX Bit5 (973~998) 26 985, Bit13 (967~990) 24 978,
1264 13:42:10.096784 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1265 13:42:10.103527 TX Bit7 (976~999) 24 987, Bit15 (969~992) 24 980,
1266 13:42:10.103917
1267 13:42:10.106688 wait MRW command Rank0 MR14 =0x1c fired (1)
1268 13:42:10.107078 Write Rank0 MR14 =0x1c
1269 13:42:10.117185
1270 13:42:10.120720 CH=0, VrefRange= 0, VrefLevel = 28
1271 13:42:10.124196 TX Bit0 (977~1001) 25 989, Bit8 (963~987) 25 975,
1272 13:42:10.127064 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
1273 13:42:10.133930 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1274 13:42:10.137372 TX Bit3 (971~994) 24 982, Bit11 (965~989) 25 977,
1275 13:42:10.140398 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1276 13:42:10.147361 TX Bit5 (973~998) 26 985, Bit13 (967~990) 24 978,
1277 13:42:10.150722 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1278 13:42:10.157502 TX Bit7 (976~999) 24 987, Bit15 (969~992) 24 980,
1279 13:42:10.157788
1280 13:42:10.158073 Write Rank0 MR14 =0x1e
1281 13:42:10.167182
1282 13:42:10.170963 CH=0, VrefRange= 0, VrefLevel = 30
1283 13:42:10.174103 TX Bit0 (977~1001) 25 989, Bit8 (963~987) 25 975,
1284 13:42:10.177288 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
1285 13:42:10.183853 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1286 13:42:10.187415 TX Bit3 (971~994) 24 982, Bit11 (965~989) 25 977,
1287 13:42:10.191071 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1288 13:42:10.197389 TX Bit5 (973~998) 26 985, Bit13 (967~990) 24 978,
1289 13:42:10.200532 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1290 13:42:10.207468 TX Bit7 (976~999) 24 987, Bit15 (969~992) 24 980,
1291 13:42:10.207860
1292 13:42:10.208163 Write Rank0 MR14 =0x20
1293 13:42:10.217544
1294 13:42:10.217930 CH=0, VrefRange= 0, VrefLevel = 32
1295 13:42:10.223847 TX Bit0 (977~1001) 25 989, Bit8 (963~987) 25 975,
1296 13:42:10.227374 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
1297 13:42:10.233870 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1298 13:42:10.237405 TX Bit3 (971~994) 24 982, Bit11 (965~989) 25 977,
1299 13:42:10.240390 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1300 13:42:10.247295 TX Bit5 (973~998) 26 985, Bit13 (967~990) 24 978,
1301 13:42:10.250655 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1302 13:42:10.257346 TX Bit7 (976~999) 24 987, Bit15 (969~992) 24 980,
1303 13:42:10.257740
1304 13:42:10.258040 Write Rank0 MR14 =0x22
1305 13:42:10.267727
1306 13:42:10.270586 CH=0, VrefRange= 0, VrefLevel = 34
1307 13:42:10.274107 TX Bit0 (977~1001) 25 989, Bit8 (963~987) 25 975,
1308 13:42:10.277706 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
1309 13:42:10.283990 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1310 13:42:10.287556 TX Bit3 (971~994) 24 982, Bit11 (965~989) 25 977,
1311 13:42:10.290765 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1312 13:42:10.297521 TX Bit5 (973~998) 26 985, Bit13 (967~990) 24 978,
1313 13:42:10.300622 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1314 13:42:10.307516 TX Bit7 (976~999) 24 987, Bit15 (969~992) 24 980,
1315 13:42:10.307925
1316 13:42:10.308232 Write Rank0 MR14 =0x24
1317 13:42:10.317304
1318 13:42:10.320590 CH=0, VrefRange= 0, VrefLevel = 36
1319 13:42:10.323795 TX Bit0 (977~1001) 25 989, Bit8 (963~987) 25 975,
1320 13:42:10.327673 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
1321 13:42:10.333728 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1322 13:42:10.337129 TX Bit3 (971~994) 24 982, Bit11 (965~989) 25 977,
1323 13:42:10.340650 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1324 13:42:10.347759 TX Bit5 (973~998) 26 985, Bit13 (967~990) 24 978,
1325 13:42:10.350776 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1326 13:42:10.354183 TX Bit7 (976~999) 24 987, Bit15 (969~992) 24 980,
1327 13:42:10.357550
1328 13:42:10.357934
1329 13:42:10.361107 TX Vref found, early break! 371< 376
1330 13:42:10.364421 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1331 13:42:10.367648 u1DelayCellOfst[0]=9 cells (7 PI)
1332 13:42:10.371001 u1DelayCellOfst[1]=7 cells (6 PI)
1333 13:42:10.373874 u1DelayCellOfst[2]=9 cells (7 PI)
1334 13:42:10.377400 u1DelayCellOfst[3]=0 cells (0 PI)
1335 13:42:10.377786 u1DelayCellOfst[4]=7 cells (6 PI)
1336 13:42:10.380987 u1DelayCellOfst[5]=3 cells (3 PI)
1337 13:42:10.384244 u1DelayCellOfst[6]=6 cells (5 PI)
1338 13:42:10.387620 u1DelayCellOfst[7]=6 cells (5 PI)
1339 13:42:10.391105 Byte0, DQ PI dly=982, DQM PI dly= 985
1340 13:42:10.397507 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1341 13:42:10.397898
1342 13:42:10.401163 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1343 13:42:10.401553
1344 13:42:10.404051 u1DelayCellOfst[8]=0 cells (0 PI)
1345 13:42:10.407514 u1DelayCellOfst[9]=3 cells (3 PI)
1346 13:42:10.411350 u1DelayCellOfst[10]=9 cells (7 PI)
1347 13:42:10.411738 u1DelayCellOfst[11]=2 cells (2 PI)
1348 13:42:10.414763 u1DelayCellOfst[12]=3 cells (3 PI)
1349 13:42:10.417569 u1DelayCellOfst[13]=3 cells (3 PI)
1350 13:42:10.421440 u1DelayCellOfst[14]=5 cells (4 PI)
1351 13:42:10.424958 u1DelayCellOfst[15]=6 cells (5 PI)
1352 13:42:10.428116 Byte1, DQ PI dly=975, DQM PI dly= 978
1353 13:42:10.434645 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1354 13:42:10.435037
1355 13:42:10.437916 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1356 13:42:10.438415
1357 13:42:10.438727 Write Rank0 MR14 =0x1a
1358 13:42:10.441461
1359 13:42:10.441846 Final TX Range 0 Vref 26
1360 13:42:10.442148
1361 13:42:10.447984 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1362 13:42:10.448375
1363 13:42:10.454467 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1364 13:42:10.461422 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1365 13:42:10.468254 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1366 13:42:10.471615 Write Rank0 MR3 =0xb0
1367 13:42:10.472000 DramC Write-DBI on
1368 13:42:10.474991 ==
1369 13:42:10.478264 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1370 13:42:10.481184 fsp= 1, odt_onoff= 1, Byte mode= 0
1371 13:42:10.481645 ==
1372 13:42:10.484738 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1373 13:42:10.485125
1374 13:42:10.488251 Begin, DQ Scan Range 698~762
1375 13:42:10.488673
1376 13:42:10.488979
1377 13:42:10.491803 TX Vref Scan disable
1378 13:42:10.494522 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1379 13:42:10.498238 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1380 13:42:10.501361 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1381 13:42:10.504672 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1382 13:42:10.508131 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1383 13:42:10.511344 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1384 13:42:10.514898 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1385 13:42:10.518235 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1386 13:42:10.521608 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1387 13:42:10.525401 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1388 13:42:10.527959 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1389 13:42:10.531447 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1390 13:42:10.534770 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1391 13:42:10.538335 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1392 13:42:10.541704 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1393 13:42:10.548102 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1394 13:42:10.551714 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1395 13:42:10.554750 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1396 13:42:10.558100 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1397 13:42:10.561792 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1398 13:42:10.564730 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1399 13:42:10.568220 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1400 13:42:10.575148 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1401 13:42:10.578582 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1402 13:42:10.581885 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1403 13:42:10.585343 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1404 13:42:10.588547 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1405 13:42:10.591716 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1406 13:42:10.595129 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1407 13:42:10.598493 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1408 13:42:10.602008 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1409 13:42:10.605082 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1410 13:42:10.608536 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
1411 13:42:10.612104 Byte0, DQ PI dly=732, DQM PI dly= 732
1412 13:42:10.615089 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1413 13:42:10.615479
1414 13:42:10.621911 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1415 13:42:10.622330
1416 13:42:10.625222 Byte1, DQ PI dly=722, DQM PI dly= 722
1417 13:42:10.628723 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
1418 13:42:10.629122
1419 13:42:10.632176 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
1420 13:42:10.635360
1421 13:42:10.638646 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1422 13:42:10.648735 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1423 13:42:10.655670 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1424 13:42:10.656060 Write Rank0 MR3 =0x30
1425 13:42:10.658799 DramC Write-DBI off
1426 13:42:10.659185
1427 13:42:10.659488 [DATLAT]
1428 13:42:10.662147 Freq=1600, CH0 RK0, use_rxtx_scan=0
1429 13:42:10.662534
1430 13:42:10.665365 DATLAT Default: 0xf
1431 13:42:10.665751 7, 0xFFFF, sum=0
1432 13:42:10.668840 8, 0xFFFF, sum=0
1433 13:42:10.669230 9, 0xFFFF, sum=0
1434 13:42:10.669536 10, 0xFFFF, sum=0
1435 13:42:10.672003 11, 0xFFFF, sum=0
1436 13:42:10.672393 12, 0xFFFF, sum=0
1437 13:42:10.675340 13, 0xFFFF, sum=0
1438 13:42:10.675733 14, 0x0, sum=1
1439 13:42:10.678732 15, 0x0, sum=2
1440 13:42:10.679175 16, 0x0, sum=3
1441 13:42:10.681955 17, 0x0, sum=4
1442 13:42:10.685482 pattern=2 first_step=14 total pass=5 best_step=16
1443 13:42:10.685869 ==
1444 13:42:10.689098 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1445 13:42:10.692338 fsp= 1, odt_onoff= 1, Byte mode= 0
1446 13:42:10.695542 ==
1447 13:42:10.699062 Start DQ dly to find pass range UseTestEngine =1
1448 13:42:10.702390 x-axis: bit #, y-axis: DQ dly (-127~63)
1449 13:42:10.702779 RX Vref Scan = 1
1450 13:42:10.818082
1451 13:42:10.818530 RX Vref found, early break!
1452 13:42:10.819092
1453 13:42:10.824449 Final RX Vref 12, apply to both rank0 and 1
1454 13:42:10.825173 ==
1455 13:42:10.827811 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1456 13:42:10.831582 fsp= 1, odt_onoff= 1, Byte mode= 0
1457 13:42:10.832098 ==
1458 13:42:10.832600 DQS Delay:
1459 13:42:10.834807 DQS0 = 0, DQS1 = 0
1460 13:42:10.835282 DQM Delay:
1461 13:42:10.838222 DQM0 = 19, DQM1 = 18
1462 13:42:10.838656 DQ Delay:
1463 13:42:10.841554 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15
1464 13:42:10.844501 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
1465 13:42:10.847994 DQ8 =14, DQ9 =16, DQ10 =25, DQ11 =16
1466 13:42:10.851366 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1467 13:42:10.851756
1468 13:42:10.852054
1469 13:42:10.852328
1470 13:42:10.854405 [DramC_TX_OE_Calibration] TA2
1471 13:42:10.857990 Original DQ_B0 (3 6) =30, OEN = 27
1472 13:42:10.861515 Original DQ_B1 (3 6) =30, OEN = 27
1473 13:42:10.865064 23, 0x0, End_B0=23 End_B1=23
1474 13:42:10.865460 24, 0x0, End_B0=24 End_B1=24
1475 13:42:10.868165 25, 0x0, End_B0=25 End_B1=25
1476 13:42:10.871082 26, 0x0, End_B0=26 End_B1=26
1477 13:42:10.874643 27, 0x0, End_B0=27 End_B1=27
1478 13:42:10.875038 28, 0x0, End_B0=28 End_B1=28
1479 13:42:10.878040 29, 0x0, End_B0=29 End_B1=29
1480 13:42:10.881508 30, 0x0, End_B0=30 End_B1=30
1481 13:42:10.884980 31, 0xFFFF, End_B0=30 End_B1=30
1482 13:42:10.891265 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1483 13:42:10.894326 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1484 13:42:10.894412
1485 13:42:10.894479
1486 13:42:10.897705 Write Rank0 MR23 =0x3f
1487 13:42:10.897789 [DQSOSC]
1488 13:42:10.907552 [DQSOSCAuto] RK0, (LSB)MR18= 0xf0f, (MSB)MR19= 0x303, tDQSOscB0 = 402 ps tDQSOscB1 = 402 ps
1489 13:42:10.910928 CH0_RK0: MR19=0x303, MR18=0xF0F, DQSOSC=402, MR23=63, INC=15, DEC=22
1490 13:42:10.914380 Write Rank0 MR23 =0x3f
1491 13:42:10.914464 [DQSOSC]
1492 13:42:10.924723 [DQSOSCAuto] RK0, (LSB)MR18= 0x1414, (MSB)MR19= 0x303, tDQSOscB0 = 399 ps tDQSOscB1 = 399 ps
1493 13:42:10.924809 CH0 RK0: MR19=303, MR18=1414
1494 13:42:10.927996 [RankSwap] Rank num 2, (Multi 1), Rank 1
1495 13:42:10.931448 Write Rank0 MR2 =0xad
1496 13:42:10.934911 [Write Leveling]
1497 13:42:10.934996 delay byte0 byte1 byte2 byte3
1498 13:42:10.935062
1499 13:42:10.938288 10 0 0
1500 13:42:10.938401 11 0 0
1501 13:42:10.941138 12 0 0
1502 13:42:10.941224 13 0 0
1503 13:42:10.944909 14 0 0
1504 13:42:10.944994 15 0 0
1505 13:42:10.945062 16 0 0
1506 13:42:10.948199 17 0 0
1507 13:42:10.948285 18 0 0
1508 13:42:10.951639 19 0 0
1509 13:42:10.951725 20 0 0
1510 13:42:10.951792 21 0 0
1511 13:42:10.955230 22 0 0
1512 13:42:10.955315 23 0 0
1513 13:42:10.957991 24 0 ff
1514 13:42:10.958078 25 0 ff
1515 13:42:10.961490 26 ff ff
1516 13:42:10.961578 27 ff ff
1517 13:42:10.961645 28 ff ff
1518 13:42:10.965112 29 ff ff
1519 13:42:10.965199 30 ff ff
1520 13:42:10.968672 31 ff ff
1521 13:42:10.968759 32 ff ff
1522 13:42:10.974678 pass bytecount = 0xff (0xff: all bytes pass)
1523 13:42:10.974764
1524 13:42:10.974830 DQS0 dly: 26
1525 13:42:10.974891 DQS1 dly: 24
1526 13:42:10.978156 Write Rank0 MR2 =0x2d
1527 13:42:10.981717 [RankSwap] Rank num 2, (Multi 1), Rank 0
1528 13:42:10.985239 Write Rank1 MR1 =0xd6
1529 13:42:10.985323 [Gating]
1530 13:42:10.985390 ==
1531 13:42:10.988141 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1532 13:42:10.991576 fsp= 1, odt_onoff= 1, Byte mode= 0
1533 13:42:10.991661 ==
1534 13:42:10.998446 3 1 0 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1535 13:42:11.001903 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1536 13:42:11.005087 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1537 13:42:11.011653 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1538 13:42:11.015089 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1539 13:42:11.018461 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1540 13:42:11.025015 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1541 13:42:11.028395 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1542 13:42:11.031942 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1543 13:42:11.035218 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1544 13:42:11.041959 3 2 8 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1545 13:42:11.045386 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1546 13:42:11.048221 3 2 16 |3534 403 |(11 11)(11 11) |(0 0)(1 1)| 0
1547 13:42:11.054991 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1548 13:42:11.058646 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1549 13:42:11.061932 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1550 13:42:11.068304 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1551 13:42:11.071779 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1552 13:42:11.075167 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1553 13:42:11.078249 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1554 13:42:11.085455 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1555 13:42:11.088385 3 3 20 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
1556 13:42:11.091932 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1557 13:42:11.099055 [Byte 1] Lead/lag falling Transition (3, 3, 24)
1558 13:42:11.102001 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1559 13:42:11.105582 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1560 13:42:11.108846 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1561 13:42:11.115419 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1562 13:42:11.118893 3 4 12 |201f 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1563 13:42:11.121839 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1564 13:42:11.128765 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1565 13:42:11.132404 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1566 13:42:11.135403 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1567 13:42:11.142236 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1568 13:42:11.145495 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1569 13:42:11.148355 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1570 13:42:11.155504 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1571 13:42:11.158546 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1572 13:42:11.162008 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1573 13:42:11.168460 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1574 13:42:11.171819 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1575 13:42:11.175658 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1576 13:42:11.179287 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1577 13:42:11.185637 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1578 13:42:11.189186 [Byte 0] Lead/lag Transition tap number (2)
1579 13:42:11.192223 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1580 13:42:11.195757 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1581 13:42:11.199299 [Byte 1] Lead/lag Transition tap number (2)
1582 13:42:11.205540 3 6 12 |4646 3d3d |(10 10)(11 11) |(0 0)(0 0)| 0
1583 13:42:11.209061 3 6 16 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
1584 13:42:11.211967 [Byte 0]First pass (3, 6, 16)
1585 13:42:11.215480 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1586 13:42:11.218769 [Byte 1]First pass (3, 6, 20)
1587 13:42:11.222465 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1588 13:42:11.225203 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1589 13:42:11.228714 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1590 13:42:11.235492 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1591 13:42:11.238962 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1592 13:42:11.242219 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1593 13:42:11.245122 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1594 13:42:11.251948 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1595 13:42:11.255287 All bytes gating window > 1UI, Early break!
1596 13:42:11.255375
1597 13:42:11.258498 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1598 13:42:11.258587
1599 13:42:11.262357 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1600 13:42:11.262446
1601 13:42:11.262533
1602 13:42:11.262616
1603 13:42:11.265222 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1604 13:42:11.265310
1605 13:42:11.268639 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1606 13:42:11.268728
1607 13:42:11.272178
1608 13:42:11.272265 Write Rank1 MR1 =0x56
1609 13:42:11.272369
1610 13:42:11.275491 best RODT dly(2T, 0.5T) = (2, 3)
1611 13:42:11.275579
1612 13:42:11.278323 best RODT dly(2T, 0.5T) = (2, 3)
1613 13:42:11.278411 ==
1614 13:42:11.285125 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1615 13:42:11.288551 fsp= 1, odt_onoff= 1, Byte mode= 0
1616 13:42:11.288640 ==
1617 13:42:11.291876 Start DQ dly to find pass range UseTestEngine =0
1618 13:42:11.295410 x-axis: bit #, y-axis: DQ dly (-127~63)
1619 13:42:11.295498 RX Vref Scan = 0
1620 13:42:11.299099 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1621 13:42:11.302162 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1622 13:42:11.305387 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1623 13:42:11.308646 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1624 13:42:11.312173 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1625 13:42:11.315724 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1626 13:42:11.318459 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1627 13:42:11.318553 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1628 13:42:11.321966 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1629 13:42:11.325555 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1630 13:42:11.328966 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1631 13:42:11.332387 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1632 13:42:11.335218 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1633 13:42:11.338787 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1634 13:42:11.342214 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1635 13:42:11.342304 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1636 13:42:11.345687 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1637 13:42:11.349244 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1638 13:42:11.352310 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1639 13:42:11.355536 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1640 13:42:11.358605 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1641 13:42:11.362231 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1642 13:42:11.362348 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1643 13:42:11.365406 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1644 13:42:11.368879 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1645 13:42:11.372156 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1646 13:42:11.375470 0, [0] xxxoxoxx ooxoxxxx [MSB]
1647 13:42:11.379114 1, [0] xxxoxoxx ooxoooxx [MSB]
1648 13:42:11.379275 2, [0] xxxoxooo ooxoooox [MSB]
1649 13:42:11.382024 3, [0] xxxoxooo ooxoooox [MSB]
1650 13:42:11.385863 4, [0] xooooooo ooxoooox [MSB]
1651 13:42:11.389141 5, [0] oooooooo ooxooooo [MSB]
1652 13:42:11.392027 33, [0] oooooooo xooooooo [MSB]
1653 13:42:11.395685 34, [0] oooxoooo xooooooo [MSB]
1654 13:42:11.398942 35, [0] oooxoooo xooooooo [MSB]
1655 13:42:11.399032 36, [0] oooxoooo xooxoooo [MSB]
1656 13:42:11.402380 37, [0] oooxoxoo xxoxoxoo [MSB]
1657 13:42:11.405769 38, [0] oooxoxoo xxoxxxxo [MSB]
1658 13:42:11.408839 39, [0] oooxoxxx xxoxxxxo [MSB]
1659 13:42:11.412790 40, [0] oooxoxxx xxoxxxxo [MSB]
1660 13:42:11.415849 41, [0] oxxxoxxx xxoxxxxx [MSB]
1661 13:42:11.415938 42, [0] oxxxxxxx xxoxxxxx [MSB]
1662 13:42:11.418701 43, [0] xxxxxxxx xxoxxxxx [MSB]
1663 13:42:11.422164 44, [0] xxxxxxxx xxoxxxxx [MSB]
1664 13:42:11.425806 45, [0] xxxxxxxx xxxxxxxx [MSB]
1665 13:42:11.429159 iDelay=45, Bit 0, Center 23 (5 ~ 42) 38
1666 13:42:11.432710 iDelay=45, Bit 1, Center 22 (4 ~ 40) 37
1667 13:42:11.435511 iDelay=45, Bit 2, Center 22 (4 ~ 40) 37
1668 13:42:11.439084 iDelay=45, Bit 3, Center 15 (-2 ~ 33) 36
1669 13:42:11.442514 iDelay=45, Bit 4, Center 22 (4 ~ 41) 38
1670 13:42:11.446010 iDelay=45, Bit 5, Center 18 (0 ~ 36) 37
1671 13:42:11.448956 iDelay=45, Bit 6, Center 20 (2 ~ 38) 37
1672 13:42:11.452367 iDelay=45, Bit 7, Center 20 (2 ~ 38) 37
1673 13:42:11.459407 iDelay=45, Bit 8, Center 15 (-2 ~ 32) 35
1674 13:42:11.462623 iDelay=45, Bit 9, Center 18 (0 ~ 36) 37
1675 13:42:11.465988 iDelay=45, Bit 10, Center 25 (6 ~ 44) 39
1676 13:42:11.469442 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1677 13:42:11.472944 iDelay=45, Bit 12, Center 19 (1 ~ 37) 37
1678 13:42:11.475812 iDelay=45, Bit 13, Center 18 (1 ~ 36) 36
1679 13:42:11.479255 iDelay=45, Bit 14, Center 19 (2 ~ 37) 36
1680 13:42:11.482466 iDelay=45, Bit 15, Center 22 (5 ~ 40) 36
1681 13:42:11.482553 ==
1682 13:42:11.489096 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1683 13:42:11.492885 fsp= 1, odt_onoff= 1, Byte mode= 0
1684 13:42:11.492973 ==
1685 13:42:11.493065 DQS Delay:
1686 13:42:11.496018 DQS0 = 0, DQS1 = 0
1687 13:42:11.496106 DQM Delay:
1688 13:42:11.496193 DQM0 = 20, DQM1 = 19
1689 13:42:11.499179 DQ Delay:
1690 13:42:11.502469 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =15
1691 13:42:11.505580 DQ4 =22, DQ5 =18, DQ6 =20, DQ7 =20
1692 13:42:11.509274 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
1693 13:42:11.512700 DQ12 =19, DQ13 =18, DQ14 =19, DQ15 =22
1694 13:42:11.512788
1695 13:42:11.512874
1696 13:42:11.512955 DramC Write-DBI off
1697 13:42:11.513034 ==
1698 13:42:11.519089 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1699 13:42:11.522548 fsp= 1, odt_onoff= 1, Byte mode= 0
1700 13:42:11.522636 ==
1701 13:42:11.526255 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1702 13:42:11.526343
1703 13:42:11.529038 Begin, DQ Scan Range 920~1176
1704 13:42:11.529126
1705 13:42:11.529212
1706 13:42:11.532309 TX Vref Scan disable
1707 13:42:11.535961 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1708 13:42:11.539250 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1709 13:42:11.542942 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1710 13:42:11.545835 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1711 13:42:11.549226 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1712 13:42:11.552574 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1713 13:42:11.556123 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1714 13:42:11.559159 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1715 13:42:11.562517 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1716 13:42:11.566082 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1717 13:42:11.569347 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1718 13:42:11.572680 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1719 13:42:11.576223 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1720 13:42:11.582709 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1721 13:42:11.586084 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1722 13:42:11.589620 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1723 13:42:11.592498 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1724 13:42:11.596244 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1725 13:42:11.599526 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1726 13:42:11.602962 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1727 13:42:11.606441 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1728 13:42:11.609347 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1729 13:42:11.612888 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1730 13:42:11.616412 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1731 13:42:11.619837 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1732 13:42:11.622671 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1733 13:42:11.626405 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1734 13:42:11.629810 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1735 13:42:11.632971 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1736 13:42:11.636333 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1737 13:42:11.643214 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1738 13:42:11.646590 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1739 13:42:11.649671 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1740 13:42:11.653071 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1741 13:42:11.656126 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1742 13:42:11.659822 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1743 13:42:11.663334 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1744 13:42:11.666651 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1745 13:42:11.669585 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1746 13:42:11.673140 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1747 13:42:11.676239 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1748 13:42:11.680164 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1749 13:42:11.683048 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1750 13:42:11.686503 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1751 13:42:11.689568 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1752 13:42:11.693031 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1753 13:42:11.696400 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1754 13:42:11.700076 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1755 13:42:11.703305 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1756 13:42:11.706823 969 |3 6 9|[0] xxxxxxxx ooxoxxxx [MSB]
1757 13:42:11.710099 970 |3 6 10|[0] xxxxxxxx ooxooxox [MSB]
1758 13:42:11.713102 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1759 13:42:11.719934 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1760 13:42:11.723317 973 |3 6 13|[0] xxxxxxxx ooxooooo [MSB]
1761 13:42:11.726633 974 |3 6 14|[0] xoxooooo ooxooooo [MSB]
1762 13:42:11.729667 975 |3 6 15|[0] ooxooooo oooooooo [MSB]
1763 13:42:11.733396 987 |3 6 27|[0] oooooooo xooooooo [MSB]
1764 13:42:11.736741 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1765 13:42:11.739452 989 |3 6 29|[0] oooxoooo xxxxxxxx [MSB]
1766 13:42:11.743438 990 |3 6 30|[0] oooxoooo xxxxxxxx [MSB]
1767 13:42:11.749898 991 |3 6 31|[0] oooxoxoo xxxxxxxx [MSB]
1768 13:42:11.752963 992 |3 6 32|[0] xxoxxxxx xxxxxxxx [MSB]
1769 13:42:11.756279 993 |3 6 33|[0] xxxxxxxx xxxxxxxx [MSB]
1770 13:42:11.759865 Byte0, DQ PI dly=982, DQM PI dly= 982
1771 13:42:11.763374 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1772 13:42:11.763760
1773 13:42:11.766516 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1774 13:42:11.766932
1775 13:42:11.769731 Byte1, DQ PI dly=979, DQM PI dly= 979
1776 13:42:11.776501 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1777 13:42:11.777017
1778 13:42:11.779336 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1779 13:42:11.779727
1780 13:42:11.780043 ==
1781 13:42:11.786637 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1782 13:42:11.790067 fsp= 1, odt_onoff= 1, Byte mode= 0
1783 13:42:11.790481 ==
1784 13:42:11.793006 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1785 13:42:11.793493
1786 13:42:11.796419 Begin, DQ Scan Range 955~1019
1787 13:42:11.797082 Write Rank1 MR14 =0x0
1788 13:42:11.805624
1789 13:42:11.806026 CH=0, VrefRange= 0, VrefLevel = 0
1790 13:42:11.812740 TX Bit0 (977~991) 15 984, Bit8 (969~982) 14 975,
1791 13:42:11.815579 TX Bit1 (976~988) 13 982, Bit9 (971~985) 15 978,
1792 13:42:11.818796 TX Bit2 (978~990) 13 984, Bit10 (977~988) 12 982,
1793 13:42:11.826108 TX Bit3 (971~983) 13 977, Bit11 (970~983) 14 976,
1794 13:42:11.828728 TX Bit4 (976~988) 13 982, Bit12 (973~985) 13 979,
1795 13:42:11.835490 TX Bit5 (974~985) 12 979, Bit13 (975~983) 9 979,
1796 13:42:11.838683 TX Bit6 (975~987) 13 981, Bit14 (974~984) 11 979,
1797 13:42:11.842181 TX Bit7 (975~989) 15 982, Bit15 (976~985) 10 980,
1798 13:42:11.842585
1799 13:42:11.845731 Write Rank1 MR14 =0x2
1800 13:42:11.852954
1801 13:42:11.853423 CH=0, VrefRange= 0, VrefLevel = 2
1802 13:42:11.859287 TX Bit0 (977~991) 15 984, Bit8 (969~983) 15 976,
1803 13:42:11.862566 TX Bit1 (976~989) 14 982, Bit9 (971~985) 15 978,
1804 13:42:11.869490 TX Bit2 (977~990) 14 983, Bit10 (976~990) 15 983,
1805 13:42:11.872908 TX Bit3 (970~983) 14 976, Bit11 (970~983) 14 976,
1806 13:42:11.875974 TX Bit4 (976~989) 14 982, Bit12 (972~985) 14 978,
1807 13:42:11.883077 TX Bit5 (973~986) 14 979, Bit13 (974~983) 10 978,
1808 13:42:11.886116 TX Bit6 (974~988) 15 981, Bit14 (974~985) 12 979,
1809 13:42:11.889527 TX Bit7 (975~990) 16 982, Bit15 (976~990) 15 983,
1810 13:42:11.889974
1811 13:42:11.892808 Write Rank1 MR14 =0x4
1812 13:42:11.900720
1813 13:42:11.901104 CH=0, VrefRange= 0, VrefLevel = 4
1814 13:42:11.907429 TX Bit0 (977~992) 16 984, Bit8 (969~983) 15 976,
1815 13:42:11.910838 TX Bit1 (976~990) 15 983, Bit9 (970~985) 16 977,
1816 13:42:11.914414 TX Bit2 (977~991) 15 984, Bit10 (976~990) 15 983,
1817 13:42:11.920658 TX Bit3 (970~984) 15 977, Bit11 (970~984) 15 977,
1818 13:42:11.923979 TX Bit4 (975~989) 15 982, Bit12 (972~986) 15 979,
1819 13:42:11.931030 TX Bit5 (972~986) 15 979, Bit13 (973~984) 12 978,
1820 13:42:11.934488 TX Bit6 (974~988) 15 981, Bit14 (973~987) 15 980,
1821 13:42:11.937994 TX Bit7 (975~990) 16 982, Bit15 (975~990) 16 982,
1822 13:42:11.938462
1823 13:42:11.940919 Write Rank1 MR14 =0x6
1824 13:42:11.948886
1825 13:42:11.949356 CH=0, VrefRange= 0, VrefLevel = 6
1826 13:42:11.955807 TX Bit0 (977~992) 16 984, Bit8 (968~984) 17 976,
1827 13:42:11.958777 TX Bit1 (976~990) 15 983, Bit9 (970~986) 17 978,
1828 13:42:11.965437 TX Bit2 (977~991) 15 984, Bit10 (976~991) 16 983,
1829 13:42:11.968634 TX Bit3 (969~985) 17 977, Bit11 (969~984) 16 976,
1830 13:42:11.972130 TX Bit4 (975~991) 17 983, Bit12 (971~987) 17 979,
1831 13:42:11.978882 TX Bit5 (972~987) 16 979, Bit13 (973~984) 12 978,
1832 13:42:11.982299 TX Bit6 (974~989) 16 981, Bit14 (972~987) 16 979,
1833 13:42:11.985422 TX Bit7 (975~991) 17 983, Bit15 (975~990) 16 982,
1834 13:42:11.985814
1835 13:42:11.988936 Write Rank1 MR14 =0x8
1836 13:42:11.996518
1837 13:42:11.996904 CH=0, VrefRange= 0, VrefLevel = 8
1838 13:42:12.003277 TX Bit0 (976~993) 18 984, Bit8 (968~984) 17 976,
1839 13:42:12.006393 TX Bit1 (976~991) 16 983, Bit9 (969~987) 19 978,
1840 13:42:12.013219 TX Bit2 (977~992) 16 984, Bit10 (976~991) 16 983,
1841 13:42:12.016375 TX Bit3 (969~985) 17 977, Bit11 (969~985) 17 977,
1842 13:42:12.019596 TX Bit4 (975~991) 17 983, Bit12 (971~987) 17 979,
1843 13:42:12.026107 TX Bit5 (971~989) 19 980, Bit13 (972~985) 14 978,
1844 13:42:12.029651 TX Bit6 (973~990) 18 981, Bit14 (971~988) 18 979,
1845 13:42:12.033075 TX Bit7 (974~991) 18 982, Bit15 (975~991) 17 983,
1846 13:42:12.033161
1847 13:42:12.036102 Write Rank1 MR14 =0xa
1848 13:42:12.044008
1849 13:42:12.047560 CH=0, VrefRange= 0, VrefLevel = 10
1850 13:42:12.050949 TX Bit0 (976~993) 18 984, Bit8 (968~984) 17 976,
1851 13:42:12.054193 TX Bit1 (975~991) 17 983, Bit9 (969~988) 20 978,
1852 13:42:12.060941 TX Bit2 (976~992) 17 984, Bit10 (975~992) 18 983,
1853 13:42:12.064182 TX Bit3 (969~986) 18 977, Bit11 (968~985) 18 976,
1854 13:42:12.067592 TX Bit4 (974~991) 18 982, Bit12 (970~988) 19 979,
1855 13:42:12.074591 TX Bit5 (971~989) 19 980, Bit13 (971~986) 16 978,
1856 13:42:12.077591 TX Bit6 (973~991) 19 982, Bit14 (971~989) 19 980,
1857 13:42:12.080806 TX Bit7 (974~991) 18 982, Bit15 (975~991) 17 983,
1858 13:42:12.080961
1859 13:42:12.084140 Write Rank1 MR14 =0xc
1860 13:42:12.092450
1861 13:42:12.092670 CH=0, VrefRange= 0, VrefLevel = 12
1862 13:42:12.099382 TX Bit0 (976~993) 18 984, Bit8 (968~985) 18 976,
1863 13:42:12.102452 TX Bit1 (975~992) 18 983, Bit9 (969~988) 20 978,
1864 13:42:12.109030 TX Bit2 (976~992) 17 984, Bit10 (976~992) 17 984,
1865 13:42:12.112905 TX Bit3 (969~987) 19 978, Bit11 (969~986) 18 977,
1866 13:42:12.115908 TX Bit4 (974~992) 19 983, Bit12 (970~989) 20 979,
1867 13:42:12.122615 TX Bit5 (970~990) 21 980, Bit13 (971~986) 16 978,
1868 13:42:12.126410 TX Bit6 (972~991) 20 981, Bit14 (971~989) 19 980,
1869 13:42:12.129181 TX Bit7 (973~992) 20 982, Bit15 (974~992) 19 983,
1870 13:42:12.129670
1871 13:42:12.132662 Write Rank1 MR14 =0xe
1872 13:42:12.141037
1873 13:42:12.144085 CH=0, VrefRange= 0, VrefLevel = 14
1874 13:42:12.147382 TX Bit0 (976~994) 19 985, Bit8 (968~985) 18 976,
1875 13:42:12.150675 TX Bit1 (975~992) 18 983, Bit9 (969~989) 21 979,
1876 13:42:12.157912 TX Bit2 (976~993) 18 984, Bit10 (975~993) 19 984,
1877 13:42:12.160993 TX Bit3 (969~987) 19 978, Bit11 (968~986) 19 977,
1878 13:42:12.164418 TX Bit4 (974~992) 19 983, Bit12 (970~990) 21 980,
1879 13:42:12.171129 TX Bit5 (970~990) 21 980, Bit13 (971~987) 17 979,
1880 13:42:12.174243 TX Bit6 (972~991) 20 981, Bit14 (970~990) 21 980,
1881 13:42:12.177666 TX Bit7 (973~992) 20 982, Bit15 (974~992) 19 983,
1882 13:42:12.178062
1883 13:42:12.180825 Write Rank1 MR14 =0x10
1884 13:42:12.189161
1885 13:42:12.192556 CH=0, VrefRange= 0, VrefLevel = 16
1886 13:42:12.195929 TX Bit0 (976~995) 20 985, Bit8 (967~986) 20 976,
1887 13:42:12.199385 TX Bit1 (975~992) 18 983, Bit9 (969~990) 22 979,
1888 13:42:12.206050 TX Bit2 (976~993) 18 984, Bit10 (975~993) 19 984,
1889 13:42:12.209341 TX Bit3 (968~988) 21 978, Bit11 (968~987) 20 977,
1890 13:42:12.212925 TX Bit4 (974~993) 20 983, Bit12 (970~990) 21 980,
1891 13:42:12.219287 TX Bit5 (970~991) 22 980, Bit13 (970~988) 19 979,
1892 13:42:12.222770 TX Bit6 (971~991) 21 981, Bit14 (970~990) 21 980,
1893 13:42:12.226318 TX Bit7 (973~993) 21 983, Bit15 (974~992) 19 983,
1894 13:42:12.226725
1895 13:42:12.229468 Write Rank1 MR14 =0x12
1896 13:42:12.237931
1897 13:42:12.238356 CH=0, VrefRange= 0, VrefLevel = 18
1898 13:42:12.244402 TX Bit0 (975~995) 21 985, Bit8 (967~987) 21 977,
1899 13:42:12.247744 TX Bit1 (974~993) 20 983, Bit9 (969~990) 22 979,
1900 13:42:12.254418 TX Bit2 (976~993) 18 984, Bit10 (975~993) 19 984,
1901 13:42:12.257680 TX Bit3 (968~988) 21 978, Bit11 (968~988) 21 978,
1902 13:42:12.261038 TX Bit4 (973~993) 21 983, Bit12 (969~990) 22 979,
1903 13:42:12.267703 TX Bit5 (970~991) 22 980, Bit13 (970~988) 19 979,
1904 13:42:12.270941 TX Bit6 (971~992) 22 981, Bit14 (969~991) 23 980,
1905 13:42:12.274666 TX Bit7 (972~993) 22 982, Bit15 (974~993) 20 983,
1906 13:42:12.275069
1907 13:42:12.277602 Write Rank1 MR14 =0x14
1908 13:42:12.286174
1909 13:42:12.289750 CH=0, VrefRange= 0, VrefLevel = 20
1910 13:42:12.292759 TX Bit0 (975~995) 21 985, Bit8 (967~988) 22 977,
1911 13:42:12.296495 TX Bit1 (974~993) 20 983, Bit9 (969~990) 22 979,
1912 13:42:12.302827 TX Bit2 (975~994) 20 984, Bit10 (975~994) 20 984,
1913 13:42:12.306807 TX Bit3 (968~989) 22 978, Bit11 (968~989) 22 978,
1914 13:42:12.310093 TX Bit4 (972~993) 22 982, Bit12 (969~991) 23 980,
1915 13:42:12.316288 TX Bit5 (969~991) 23 980, Bit13 (970~989) 20 979,
1916 13:42:12.319648 TX Bit6 (970~992) 23 981, Bit14 (969~991) 23 980,
1917 13:42:12.323386 TX Bit7 (972~993) 22 982, Bit15 (973~994) 22 983,
1918 13:42:12.323795
1919 13:42:12.326169 Write Rank1 MR14 =0x16
1920 13:42:12.334859
1921 13:42:12.335259 CH=0, VrefRange= 0, VrefLevel = 22
1922 13:42:12.341645 TX Bit0 (975~997) 23 986, Bit8 (967~989) 23 978,
1923 13:42:12.345052 TX Bit1 (973~994) 22 983, Bit9 (968~991) 24 979,
1924 13:42:12.351852 TX Bit2 (975~994) 20 984, Bit10 (974~995) 22 984,
1925 13:42:12.354954 TX Bit3 (968~990) 23 979, Bit11 (967~989) 23 978,
1926 13:42:12.358104 TX Bit4 (972~994) 23 983, Bit12 (969~991) 23 980,
1927 13:42:12.364957 TX Bit5 (969~991) 23 980, Bit13 (969~990) 22 979,
1928 13:42:12.368161 TX Bit6 (970~993) 24 981, Bit14 (969~991) 23 980,
1929 13:42:12.371380 TX Bit7 (971~994) 24 982, Bit15 (973~994) 22 983,
1930 13:42:12.374836
1931 13:42:12.375267 Write Rank1 MR14 =0x18
1932 13:42:12.384020
1933 13:42:12.384552 CH=0, VrefRange= 0, VrefLevel = 24
1934 13:42:12.390387 TX Bit0 (975~997) 23 986, Bit8 (967~990) 24 978,
1935 13:42:12.394013 TX Bit1 (973~995) 23 984, Bit9 (968~991) 24 979,
1936 13:42:12.400873 TX Bit2 (975~995) 21 985, Bit10 (973~995) 23 984,
1937 13:42:12.403869 TX Bit3 (968~990) 23 979, Bit11 (967~990) 24 978,
1938 13:42:12.407365 TX Bit4 (971~995) 25 983, Bit12 (969~991) 23 980,
1939 13:42:12.413957 TX Bit5 (969~992) 24 980, Bit13 (969~990) 22 979,
1940 13:42:12.417361 TX Bit6 (970~993) 24 981, Bit14 (969~992) 24 980,
1941 13:42:12.420578 TX Bit7 (971~995) 25 983, Bit15 (972~994) 23 983,
1942 13:42:12.420966
1943 13:42:12.424327 Write Rank1 MR14 =0x1a
1944 13:42:12.433033
1945 13:42:12.435832 CH=0, VrefRange= 0, VrefLevel = 26
1946 13:42:12.439234 TX Bit0 (974~997) 24 985, Bit8 (966~990) 25 978,
1947 13:42:12.442547 TX Bit1 (972~995) 24 983, Bit9 (968~991) 24 979,
1948 13:42:12.449301 TX Bit2 (975~996) 22 985, Bit10 (974~997) 24 985,
1949 13:42:12.452953 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1950 13:42:12.456388 TX Bit4 (971~995) 25 983, Bit12 (968~992) 25 980,
1951 13:42:12.462936 TX Bit5 (969~992) 24 980, Bit13 (969~991) 23 980,
1952 13:42:12.466468 TX Bit6 (970~993) 24 981, Bit14 (969~992) 24 980,
1953 13:42:12.469837 TX Bit7 (970~995) 26 982, Bit15 (971~995) 25 983,
1954 13:42:12.470231
1955 13:42:12.472775 Write Rank1 MR14 =0x1c
1956 13:42:12.481368
1957 13:42:12.485057 CH=0, VrefRange= 0, VrefLevel = 28
1958 13:42:12.488361 TX Bit0 (974~998) 25 986, Bit8 (966~990) 25 978,
1959 13:42:12.491621 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
1960 13:42:12.498087 TX Bit2 (974~996) 23 985, Bit10 (973~997) 25 985,
1961 13:42:12.501126 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1962 13:42:12.504826 TX Bit4 (971~996) 26 983, Bit12 (968~992) 25 980,
1963 13:42:12.511083 TX Bit5 (969~992) 24 980, Bit13 (969~991) 23 980,
1964 13:42:12.514530 TX Bit6 (970~994) 25 982, Bit14 (969~992) 24 980,
1965 13:42:12.518088 TX Bit7 (970~996) 27 983, Bit15 (971~996) 26 983,
1966 13:42:12.521491
1967 13:42:12.521925 Write Rank1 MR14 =0x1e
1968 13:42:12.530774
1969 13:42:12.531205 CH=0, VrefRange= 0, VrefLevel = 30
1970 13:42:12.536986 TX Bit0 (974~998) 25 986, Bit8 (966~990) 25 978,
1971 13:42:12.540343 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
1972 13:42:12.547182 TX Bit2 (974~997) 24 985, Bit10 (972~997) 26 984,
1973 13:42:12.550326 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1974 13:42:12.553870 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
1975 13:42:12.560789 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
1976 13:42:12.563526 TX Bit6 (970~995) 26 982, Bit14 (968~992) 25 980,
1977 13:42:12.567090 TX Bit7 (970~996) 27 983, Bit15 (971~995) 25 983,
1978 13:42:12.570485
1979 13:42:12.570910 Write Rank1 MR14 =0x20
1980 13:42:12.579909
1981 13:42:12.582635 CH=0, VrefRange= 0, VrefLevel = 32
1982 13:42:12.586144 TX Bit0 (974~998) 25 986, Bit8 (966~990) 25 978,
1983 13:42:12.589116 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
1984 13:42:12.596485 TX Bit2 (974~997) 24 985, Bit10 (972~997) 26 984,
1985 13:42:12.599310 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1986 13:42:12.602715 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
1987 13:42:12.609644 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
1988 13:42:12.612788 TX Bit6 (970~995) 26 982, Bit14 (968~992) 25 980,
1989 13:42:12.616266 TX Bit7 (970~996) 27 983, Bit15 (971~995) 25 983,
1990 13:42:12.616571
1991 13:42:12.619430 Write Rank1 MR14 =0x22
1992 13:42:12.628392
1993 13:42:12.628598 CH=0, VrefRange= 0, VrefLevel = 34
1994 13:42:12.634947 TX Bit0 (974~998) 25 986, Bit8 (966~990) 25 978,
1995 13:42:12.638411 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
1996 13:42:12.644815 TX Bit2 (974~997) 24 985, Bit10 (972~997) 26 984,
1997 13:42:12.648345 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1998 13:42:12.651703 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
1999 13:42:12.658151 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
2000 13:42:12.661899 TX Bit6 (970~995) 26 982, Bit14 (968~992) 25 980,
2001 13:42:12.665282 TX Bit7 (970~996) 27 983, Bit15 (971~995) 25 983,
2002 13:42:12.665496
2003 13:42:12.668555 Write Rank1 MR14 =0x24
2004 13:42:12.677127
2005 13:42:12.680562 CH=0, VrefRange= 0, VrefLevel = 36
2006 13:42:12.683604 TX Bit0 (974~998) 25 986, Bit8 (966~990) 25 978,
2007 13:42:12.687043 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
2008 13:42:12.693938 TX Bit2 (974~997) 24 985, Bit10 (972~997) 26 984,
2009 13:42:12.697350 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
2010 13:42:12.700747 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
2011 13:42:12.707046 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
2012 13:42:12.710574 TX Bit6 (970~995) 26 982, Bit14 (968~992) 25 980,
2013 13:42:12.713865 TX Bit7 (970~996) 27 983, Bit15 (971~995) 25 983,
2014 13:42:12.714224
2015 13:42:12.717049 Write Rank1 MR14 =0x26
2016 13:42:12.726226
2017 13:42:12.726552 CH=0, VrefRange= 0, VrefLevel = 38
2018 13:42:12.732543 TX Bit0 (974~998) 25 986, Bit8 (966~990) 25 978,
2019 13:42:12.736209 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
2020 13:42:12.742932 TX Bit2 (974~997) 24 985, Bit10 (972~997) 26 984,
2021 13:42:12.745914 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
2022 13:42:12.749105 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
2023 13:42:12.755991 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
2024 13:42:12.759356 TX Bit6 (970~995) 26 982, Bit14 (968~992) 25 980,
2025 13:42:12.762557 TX Bit7 (970~996) 27 983, Bit15 (971~995) 25 983,
2026 13:42:12.763011
2027 13:42:12.763329
2028 13:42:12.765899 TX Vref found, early break! 373< 380
2029 13:42:12.772838 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2030 13:42:12.775943 u1DelayCellOfst[0]=9 cells (7 PI)
2031 13:42:12.779144 u1DelayCellOfst[1]=6 cells (5 PI)
2032 13:42:12.782655 u1DelayCellOfst[2]=7 cells (6 PI)
2033 13:42:12.786429 u1DelayCellOfst[3]=0 cells (0 PI)
2034 13:42:12.786839 u1DelayCellOfst[4]=5 cells (4 PI)
2035 13:42:12.789673 u1DelayCellOfst[5]=2 cells (2 PI)
2036 13:42:12.792597 u1DelayCellOfst[6]=3 cells (3 PI)
2037 13:42:12.796082 u1DelayCellOfst[7]=5 cells (4 PI)
2038 13:42:12.799421 Byte0, DQ PI dly=979, DQM PI dly= 982
2039 13:42:12.802715 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2040 13:42:12.806093
2041 13:42:12.809722 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2042 13:42:12.810127
2043 13:42:12.812752 u1DelayCellOfst[8]=0 cells (0 PI)
2044 13:42:12.815974 u1DelayCellOfst[9]=1 cells (1 PI)
2045 13:42:12.819563 u1DelayCellOfst[10]=7 cells (6 PI)
2046 13:42:12.819968 u1DelayCellOfst[11]=0 cells (0 PI)
2047 13:42:12.822992 u1DelayCellOfst[12]=2 cells (2 PI)
2048 13:42:12.826570 u1DelayCellOfst[13]=2 cells (2 PI)
2049 13:42:12.829370 u1DelayCellOfst[14]=2 cells (2 PI)
2050 13:42:12.832825 u1DelayCellOfst[15]=6 cells (5 PI)
2051 13:42:12.836147 Byte1, DQ PI dly=978, DQM PI dly= 981
2052 13:42:12.839421 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2053 13:42:12.842985
2054 13:42:12.846100 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2055 13:42:12.846571
2056 13:42:12.846976 Write Rank1 MR14 =0x1e
2057 13:42:12.849932
2058 13:42:12.850336 Final TX Range 0 Vref 30
2059 13:42:12.850736
2060 13:42:12.856106 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2061 13:42:12.856409
2062 13:42:12.863013 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2063 13:42:12.869533 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2064 13:42:12.876093 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2065 13:42:12.879514 Write Rank1 MR3 =0xb0
2066 13:42:12.879646 DramC Write-DBI on
2067 13:42:12.882672 ==
2068 13:42:12.885702 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2069 13:42:12.889322 fsp= 1, odt_onoff= 1, Byte mode= 0
2070 13:42:12.889431 ==
2071 13:42:12.892704 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2072 13:42:12.892789
2073 13:42:12.895688 Begin, DQ Scan Range 701~765
2074 13:42:12.895801
2075 13:42:12.895893
2076 13:42:12.899233 TX Vref Scan disable
2077 13:42:12.902251 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2078 13:42:12.906175 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2079 13:42:12.909249 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2080 13:42:12.912717 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2081 13:42:12.916201 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2082 13:42:12.919148 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2083 13:42:12.922630 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2084 13:42:12.926175 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2085 13:42:12.929615 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2086 13:42:12.932382 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2087 13:42:12.935927 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2088 13:42:12.939396 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2089 13:42:12.942762 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2090 13:42:12.946110 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2091 13:42:12.955559 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2092 13:42:12.959242 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2093 13:42:12.962451 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2094 13:42:12.966093 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2095 13:42:12.968989 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2096 13:42:12.972362 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2097 13:42:12.975786 742 |2 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
2098 13:42:12.979097 Byte0, DQ PI dly=728, DQM PI dly= 728
2099 13:42:12.982498 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2100 13:42:12.982586
2101 13:42:12.989332 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2102 13:42:12.989422
2103 13:42:12.992261 Byte1, DQ PI dly=723, DQM PI dly= 723
2104 13:42:12.995647 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2105 13:42:12.995733
2106 13:42:12.999422 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2107 13:42:12.999497
2108 13:42:13.005734 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2109 13:42:13.012442 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2110 13:42:13.019228 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2111 13:42:13.022575 Write Rank1 MR3 =0x30
2112 13:42:13.026081 DramC Write-DBI off
2113 13:42:13.026154
2114 13:42:13.026216 [DATLAT]
2115 13:42:13.029176 Freq=1600, CH0 RK1, use_rxtx_scan=0
2116 13:42:13.029248
2117 13:42:13.029309 DATLAT Default: 0x10
2118 13:42:13.032511 7, 0xFFFF, sum=0
2119 13:42:13.032578 8, 0xFFFF, sum=0
2120 13:42:13.035597 9, 0xFFFF, sum=0
2121 13:42:13.035666 10, 0xFFFF, sum=0
2122 13:42:13.038902 11, 0xFFFF, sum=0
2123 13:42:13.038969 12, 0xFFFF, sum=0
2124 13:42:13.042384 13, 0xFFFF, sum=0
2125 13:42:13.042454 14, 0x0, sum=1
2126 13:42:13.045923 15, 0x0, sum=2
2127 13:42:13.045991 16, 0x0, sum=3
2128 13:42:13.046049 17, 0x0, sum=4
2129 13:42:13.052544 pattern=2 first_step=14 total pass=5 best_step=16
2130 13:42:13.052621 ==
2131 13:42:13.055993 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2132 13:42:13.059327 fsp= 1, odt_onoff= 1, Byte mode= 0
2133 13:42:13.059404 ==
2134 13:42:13.066087 Start DQ dly to find pass range UseTestEngine =1
2135 13:42:13.069060 x-axis: bit #, y-axis: DQ dly (-127~63)
2136 13:42:13.069134 RX Vref Scan = 0
2137 13:42:13.072443 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2138 13:42:13.075949 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2139 13:42:13.079538 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2140 13:42:13.082779 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2141 13:42:13.086062 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2142 13:42:13.086147 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2143 13:42:13.089575 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2144 13:42:13.092908 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2145 13:42:13.095936 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2146 13:42:13.099394 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2147 13:42:13.103175 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2148 13:42:13.106197 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2149 13:42:13.109312 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2150 13:42:13.109387 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2151 13:42:13.113080 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2152 13:42:13.116376 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2153 13:42:13.119789 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2154 13:42:13.122984 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2155 13:42:13.126204 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2156 13:42:13.129672 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2157 13:42:13.129757 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2158 13:42:13.132959 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2159 13:42:13.136468 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2160 13:42:13.139965 -3, [0] xxxxxxxx oxxxxxxx [MSB]
2161 13:42:13.142999 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2162 13:42:13.146326 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2163 13:42:13.149704 0, [0] xxxoxxxx oxxoxxxx [MSB]
2164 13:42:13.149775 1, [0] xxxoxoxx ooxoooxx [MSB]
2165 13:42:13.153109 2, [0] xxxoxoxx ooxoooxx [MSB]
2166 13:42:13.155979 3, [0] xxxoxooo ooxoooox [MSB]
2167 13:42:13.159889 4, [0] xxxoxooo ooxoooox [MSB]
2168 13:42:13.162804 5, [0] xoxooooo ooxoooox [MSB]
2169 13:42:13.166013 6, [0] oooooooo ooxooooo [MSB]
2170 13:42:13.169553 33, [0] oooooooo xooooooo [MSB]
2171 13:42:13.172673 34, [0] oooxoooo xooooooo [MSB]
2172 13:42:13.176399 35, [0] oooxoxoo xooxoooo [MSB]
2173 13:42:13.179567 36, [0] oooxoxoo xooxoxoo [MSB]
2174 13:42:13.179641 37, [0] oooxoxoo xxoxoxoo [MSB]
2175 13:42:13.182964 38, [0] oooxoxxo xxoxxxoo [MSB]
2176 13:42:13.186289 39, [0] oxxxoxxx xxoxxxxo [MSB]
2177 13:42:13.189629 40, [0] oxxxxxxx xxoxxxxx [MSB]
2178 13:42:13.192989 41, [0] xxxxxxxx xxoxxxxx [MSB]
2179 13:42:13.196403 42, [0] xxxxxxxx xxoxxxxx [MSB]
2180 13:42:13.199373 43, [0] xxxxxxxx xxoxxxxx [MSB]
2181 13:42:13.199445 44, [0] xxxxxxxx xxxxxxxx [MSB]
2182 13:42:13.203015 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
2183 13:42:13.206079 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2184 13:42:13.212917 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2185 13:42:13.216222 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2186 13:42:13.219576 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
2187 13:42:13.223016 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2188 13:42:13.226251 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2189 13:42:13.229462 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2190 13:42:13.233134 iDelay=44, Bit 8, Center 14 (-3 ~ 32) 36
2191 13:42:13.236545 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2192 13:42:13.239732 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2193 13:42:13.242954 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2194 13:42:13.246224 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2195 13:42:13.249329 iDelay=44, Bit 13, Center 18 (1 ~ 35) 35
2196 13:42:13.252873 iDelay=44, Bit 14, Center 20 (3 ~ 38) 36
2197 13:42:13.259571 iDelay=44, Bit 15, Center 22 (6 ~ 39) 34
2198 13:42:13.259647 ==
2199 13:42:13.262842 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2200 13:42:13.266236 fsp= 1, odt_onoff= 1, Byte mode= 0
2201 13:42:13.266313 ==
2202 13:42:13.266377 DQS Delay:
2203 13:42:13.269920 DQS0 = 0, DQS1 = 0
2204 13:42:13.269990 DQM Delay:
2205 13:42:13.273027 DQM0 = 20, DQM1 = 19
2206 13:42:13.273098 DQ Delay:
2207 13:42:13.276269 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15
2208 13:42:13.279428 DQ4 =22, DQ5 =17, DQ6 =20, DQ7 =20
2209 13:42:13.283205 DQ8 =14, DQ9 =18, DQ10 =25, DQ11 =16
2210 13:42:13.286344 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
2211 13:42:13.286417
2212 13:42:13.286478
2213 13:42:13.286535
2214 13:42:13.289473 [DramC_TX_OE_Calibration] TA2
2215 13:42:13.292711 Original DQ_B0 (3 6) =30, OEN = 27
2216 13:42:13.296069 Original DQ_B1 (3 6) =30, OEN = 27
2217 13:42:13.299506 23, 0x0, End_B0=23 End_B1=23
2218 13:42:13.299584 24, 0x0, End_B0=24 End_B1=24
2219 13:42:13.303047 25, 0x0, End_B0=25 End_B1=25
2220 13:42:13.306530 26, 0x0, End_B0=26 End_B1=26
2221 13:42:13.309712 27, 0x0, End_B0=27 End_B1=27
2222 13:42:13.313064 28, 0x0, End_B0=28 End_B1=28
2223 13:42:13.313147 29, 0x0, End_B0=29 End_B1=29
2224 13:42:13.316366 30, 0x0, End_B0=30 End_B1=30
2225 13:42:13.319924 31, 0xFFFF, End_B0=30 End_B1=30
2226 13:42:13.326660 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2227 13:42:13.329396 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2228 13:42:13.329470
2229 13:42:13.329532
2230 13:42:13.332677 Write Rank1 MR23 =0x3f
2231 13:42:13.332754 [DQSOSC]
2232 13:42:13.343118 [DQSOSCAuto] RK1, (LSB)MR18= 0xd7d7, (MSB)MR19= 0x202, tDQSOscB0 = 433 ps tDQSOscB1 = 433 ps
2233 13:42:13.346383 CH0_RK1: MR19=0x202, MR18=0xD7D7, DQSOSC=433, MR23=63, INC=13, DEC=19
2234 13:42:13.349957 Write Rank1 MR23 =0x3f
2235 13:42:13.350041 [DQSOSC]
2236 13:42:13.359305 [DQSOSCAuto] RK1, (LSB)MR18= 0xdada, (MSB)MR19= 0x202, tDQSOscB0 = 431 ps tDQSOscB1 = 431 ps
2237 13:42:13.362766 CH0 RK1: MR19=202, MR18=DADA
2238 13:42:13.366104 [RxdqsGatingPostProcess] freq 1600
2239 13:42:13.369413 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2240 13:42:13.369490 Rank: 0
2241 13:42:13.372829 best DQS0 dly(2T, 0.5T) = (2, 5)
2242 13:42:13.376224 best DQS1 dly(2T, 0.5T) = (2, 5)
2243 13:42:13.379723 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2244 13:42:13.383153 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2245 13:42:13.383238 Rank: 1
2246 13:42:13.386076 best DQS0 dly(2T, 0.5T) = (2, 6)
2247 13:42:13.389353 best DQS1 dly(2T, 0.5T) = (2, 6)
2248 13:42:13.392817 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2249 13:42:13.396075 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2250 13:42:13.399678 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2251 13:42:13.402963 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2252 13:42:13.409474 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2253 13:42:13.412835 Write Rank0 MR13 =0x59
2254 13:42:13.413073 ==
2255 13:42:13.416119 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2256 13:42:13.419464 fsp= 1, odt_onoff= 1, Byte mode= 0
2257 13:42:13.419552 ==
2258 13:42:13.422932 === u2Vref_new: 0x56 --> 0x3a
2259 13:42:13.426447 === u2Vref_new: 0x58 --> 0x58
2260 13:42:13.429651 === u2Vref_new: 0x5a --> 0x5a
2261 13:42:13.433214 === u2Vref_new: 0x5c --> 0x78
2262 13:42:13.436164 === u2Vref_new: 0x5e --> 0x7a
2263 13:42:13.439424 === u2Vref_new: 0x60 --> 0x90
2264 13:42:13.443069 [CA 0] Center 37 (12~63) winsize 52
2265 13:42:13.445993 [CA 1] Center 37 (12~63) winsize 52
2266 13:42:13.446093 [CA 2] Center 34 (6~63) winsize 58
2267 13:42:13.449260 [CA 3] Center 34 (6~63) winsize 58
2268 13:42:13.452566 [CA 4] Center 34 (6~63) winsize 58
2269 13:42:13.456049 [CA 5] Center 29 (-1~59) winsize 61
2270 13:42:13.456161
2271 13:42:13.459707 [CATrainingPosCal] consider 1 rank data
2272 13:42:13.462787 u2DelayCellTimex100 = 735/100 ps
2273 13:42:13.466056 CA0 delay=37 (12~63),Diff = 8 PI (10 cell)
2274 13:42:13.472921 CA1 delay=37 (12~63),Diff = 8 PI (10 cell)
2275 13:42:13.476202 CA2 delay=34 (6~63),Diff = 5 PI (6 cell)
2276 13:42:13.479775 CA3 delay=34 (6~63),Diff = 5 PI (6 cell)
2277 13:42:13.483206 CA4 delay=34 (6~63),Diff = 5 PI (6 cell)
2278 13:42:13.486063 CA5 delay=29 (-1~59),Diff = 0 PI (0 cell)
2279 13:42:13.486225
2280 13:42:13.489354 CA PerBit enable=1, Macro0, CA PI delay=29
2281 13:42:13.492815 === u2Vref_new: 0x60 --> 0x90
2282 13:42:13.492987
2283 13:42:13.496354 Vref(ca) range 1: 32
2284 13:42:13.496679
2285 13:42:13.496853 CS Dly= 11 (42-0-32)
2286 13:42:13.499358 Write Rank0 MR13 =0xd8
2287 13:42:13.499581 Write Rank0 MR13 =0xd8
2288 13:42:13.502917 Write Rank0 MR12 =0x60
2289 13:42:13.506528 Write Rank1 MR13 =0x59
2290 13:42:13.506847 ==
2291 13:42:13.509724 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2292 13:42:13.513503 fsp= 1, odt_onoff= 1, Byte mode= 0
2293 13:42:13.513886 ==
2294 13:42:13.516567 === u2Vref_new: 0x56 --> 0x3a
2295 13:42:13.519787 === u2Vref_new: 0x58 --> 0x58
2296 13:42:13.523119 === u2Vref_new: 0x5a --> 0x5a
2297 13:42:13.526656 === u2Vref_new: 0x5c --> 0x78
2298 13:42:13.529898 === u2Vref_new: 0x5e --> 0x7a
2299 13:42:13.533028 === u2Vref_new: 0x60 --> 0x90
2300 13:42:13.536367 [CA 0] Center 37 (12~63) winsize 52
2301 13:42:13.539951 [CA 1] Center 37 (12~63) winsize 52
2302 13:42:13.543101 [CA 2] Center 35 (7~63) winsize 57
2303 13:42:13.546479 [CA 3] Center 34 (6~63) winsize 58
2304 13:42:13.549729 [CA 4] Center 34 (5~63) winsize 59
2305 13:42:13.553372 [CA 5] Center 27 (-2~57) winsize 60
2306 13:42:13.553847
2307 13:42:13.556552 [CATrainingPosCal] consider 2 rank data
2308 13:42:13.559718 u2DelayCellTimex100 = 735/100 ps
2309 13:42:13.563192 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2310 13:42:13.566649 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2311 13:42:13.570142 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2312 13:42:13.573093 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2313 13:42:13.576270 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2314 13:42:13.579697 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2315 13:42:13.580082
2316 13:42:13.583487 CA PerBit enable=1, Macro0, CA PI delay=28
2317 13:42:13.586630 === u2Vref_new: 0x5c --> 0x78
2318 13:42:13.587016
2319 13:42:13.589971 Vref(ca) range 1: 28
2320 13:42:13.590355
2321 13:42:13.590653 CS Dly= 11 (42-0-32)
2322 13:42:13.593515 Write Rank1 MR13 =0xd8
2323 13:42:13.596821 Write Rank1 MR13 =0xd8
2324 13:42:13.597209 Write Rank1 MR12 =0x5c
2325 13:42:13.600293 [RankSwap] Rank num 2, (Multi 1), Rank 0
2326 13:42:13.603497 Write Rank0 MR2 =0xad
2327 13:42:13.603876 [Write Leveling]
2328 13:42:13.606521 delay byte0 byte1 byte2 byte3
2329 13:42:13.607021
2330 13:42:13.609983 10 0 0
2331 13:42:13.610497 11 0 0
2332 13:42:13.613641 12 0 0
2333 13:42:13.614029 13 0 0
2334 13:42:13.614333 14 0 0
2335 13:42:13.616535 15 0 0
2336 13:42:13.616922 16 0 0
2337 13:42:13.620142 17 0 0
2338 13:42:13.620557 18 0 0
2339 13:42:13.620865 19 0 0
2340 13:42:13.623491 20 0 0
2341 13:42:13.623877 21 0 0
2342 13:42:13.626706 22 0 0
2343 13:42:13.627112 23 0 0
2344 13:42:13.630416 24 0 ff
2345 13:42:13.630809 25 0 ff
2346 13:42:13.631112 26 0 ff
2347 13:42:13.633385 27 0 ff
2348 13:42:13.633778 28 0 ff
2349 13:42:13.636958 29 0 ff
2350 13:42:13.637361 30 0 ff
2351 13:42:13.639843 31 0 ff
2352 13:42:13.640234 32 0 ff
2353 13:42:13.643103 33 ff ff
2354 13:42:13.643504 34 ff ff
2355 13:42:13.643809 35 ff ff
2356 13:42:13.646947 36 ff ff
2357 13:42:13.647341 37 ff ff
2358 13:42:13.650128 38 ff ff
2359 13:42:13.650522 39 ff ff
2360 13:42:13.656697 pass bytecount = 0xff (0xff: all bytes pass)
2361 13:42:13.657220
2362 13:42:13.657552 DQS0 dly: 33
2363 13:42:13.657835 DQS1 dly: 24
2364 13:42:13.659986 Write Rank0 MR2 =0x2d
2365 13:42:13.663325 [RankSwap] Rank num 2, (Multi 1), Rank 0
2366 13:42:13.666783 Write Rank0 MR1 =0xd6
2367 13:42:13.667169 [Gating]
2368 13:42:13.667467 ==
2369 13:42:13.670060 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2370 13:42:13.673019 fsp= 1, odt_onoff= 1, Byte mode= 0
2371 13:42:13.673408 ==
2372 13:42:13.679931 3 1 0 |2625 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2373 13:42:13.682853 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2374 13:42:13.686535 3 1 8 |3535 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2375 13:42:13.692928 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2376 13:42:13.696385 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2377 13:42:13.699739 3 1 20 |3535 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2378 13:42:13.706248 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2379 13:42:13.709790 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2380 13:42:13.713044 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2381 13:42:13.719793 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2382 13:42:13.723133 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2383 13:42:13.726621 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2384 13:42:13.730118 3 2 16 |201 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2385 13:42:13.736746 3 2 20 |2524 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2386 13:42:13.740398 3 2 24 |3d3d 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2387 13:42:13.743680 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2388 13:42:13.749947 3 3 0 |3c3b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2389 13:42:13.753392 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2390 13:42:13.756561 3 3 8 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2391 13:42:13.763749 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2392 13:42:13.766681 3 3 16 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2393 13:42:13.770163 3 3 20 |504 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2394 13:42:13.773601 [Byte 0] Lead/lag falling Transition (3, 3, 20)
2395 13:42:13.780028 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2396 13:42:13.783485 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2397 13:42:13.787218 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2398 13:42:13.793201 [Byte 1] Lead/lag Transition tap number (1)
2399 13:42:13.796711 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2400 13:42:13.799947 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2401 13:42:13.803698 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2402 13:42:13.810459 3 4 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2403 13:42:13.813496 3 4 20 |1515 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2404 13:42:13.816840 3 4 24 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2405 13:42:13.823568 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2406 13:42:13.827116 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2407 13:42:13.830402 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2408 13:42:13.836902 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2409 13:42:13.840289 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2410 13:42:13.843766 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2411 13:42:13.847125 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2412 13:42:13.853925 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2413 13:42:13.856838 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2414 13:42:13.860156 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2415 13:42:13.866920 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2416 13:42:13.870163 [Byte 0] Lead/lag falling Transition (3, 6, 4)
2417 13:42:13.873660 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2418 13:42:13.879927 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2419 13:42:13.883531 [Byte 0] Lead/lag Transition tap number (3)
2420 13:42:13.886898 3 6 16 |403 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2421 13:42:13.890266 [Byte 1] Lead/lag falling Transition (3, 6, 16)
2422 13:42:13.897286 3 6 20 |2020 3d3d |(1 1)(11 11) |(0 0)(1 0)| 0
2423 13:42:13.900273 [Byte 1] Lead/lag Transition tap number (2)
2424 13:42:13.903616 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2425 13:42:13.906854 [Byte 0]First pass (3, 6, 24)
2426 13:42:13.909976 3 6 28 |4646 2424 |(0 0)(11 11) |(0 0)(0 0)| 0
2427 13:42:13.913546 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2428 13:42:13.917024 [Byte 1]First pass (3, 7, 0)
2429 13:42:13.920392 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2430 13:42:13.923193 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2431 13:42:13.929976 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2432 13:42:13.933139 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2433 13:42:13.936942 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2434 13:42:13.939903 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2435 13:42:13.943447 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2436 13:42:13.950063 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2437 13:42:13.953372 All bytes gating window > 1UI, Early break!
2438 13:42:13.953778
2439 13:42:13.956800 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
2440 13:42:13.957199
2441 13:42:13.959472 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
2442 13:42:13.960019
2443 13:42:13.960639
2444 13:42:13.961241
2445 13:42:13.963019 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
2446 13:42:13.966220
2447 13:42:13.969779 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2448 13:42:13.970167
2449 13:42:13.970479
2450 13:42:13.973213 wait MRW command Rank0 MR1 =0x56 fired (1)
2451 13:42:13.976626 Write Rank0 MR1 =0x56
2452 13:42:13.977249
2453 13:42:13.977770 best RODT dly(2T, 0.5T) = (2, 3)
2454 13:42:13.979534
2455 13:42:13.980080 best RODT dly(2T, 0.5T) = (2, 3)
2456 13:42:13.983025 ==
2457 13:42:13.986594 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2458 13:42:13.989566 fsp= 1, odt_onoff= 1, Byte mode= 0
2459 13:42:13.989960 ==
2460 13:42:13.993021 Start DQ dly to find pass range UseTestEngine =0
2461 13:42:13.996288 x-axis: bit #, y-axis: DQ dly (-127~63)
2462 13:42:13.999647 RX Vref Scan = 0
2463 13:42:14.002756 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2464 13:42:14.006599 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2465 13:42:14.009772 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2466 13:42:14.010342 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2467 13:42:14.013200 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2468 13:42:14.016541 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2469 13:42:14.019590 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2470 13:42:14.022715 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2471 13:42:14.026185 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2472 13:42:14.029511 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2473 13:42:14.033018 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2474 13:42:14.033429 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2475 13:42:14.036614 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2476 13:42:14.039798 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2477 13:42:14.042665 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2478 13:42:14.046268 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2479 13:42:14.049285 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2480 13:42:14.052611 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2481 13:42:14.055814 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2482 13:42:14.056212 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2483 13:42:14.059553 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2484 13:42:14.062502 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2485 13:42:14.065816 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2486 13:42:14.069162 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2487 13:42:14.072554 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2488 13:42:14.076185 -1, [0] xxxoxxxx xoxxxxxo [MSB]
2489 13:42:14.076712 0, [0] xxxoxxxx xoxxxxxo [MSB]
2490 13:42:14.078905 1, [0] xxxoxxxx ooxxxxxo [MSB]
2491 13:42:14.082327 2, [0] xxooxxxx oooxxxxo [MSB]
2492 13:42:14.085979 3, [0] xxooxxxx oooxxxxo [MSB]
2493 13:42:14.089216 4, [0] oooooxxo oooxoxxo [MSB]
2494 13:42:14.092745 6, [0] oooooooo ooooooxo [MSB]
2495 13:42:14.095847 31, [0] oooooooo ooooooox [MSB]
2496 13:42:14.096320 32, [0] oooooooo ooooooox [MSB]
2497 13:42:14.099301 33, [0] oooooooo ooooooox [MSB]
2498 13:42:14.102543 34, [0] oooooooo ooooooox [MSB]
2499 13:42:14.105160 35, [0] oooxoooo xxooooox [MSB]
2500 13:42:14.108966 36, [0] oooxoooo xxooooox [MSB]
2501 13:42:14.112100 37, [0] ooxxoooo xxooooox [MSB]
2502 13:42:14.115479 38, [0] ooxxoooo xxooooox [MSB]
2503 13:42:14.115874 39, [0] ooxxooox xxooooox [MSB]
2504 13:42:14.119062 40, [0] oxxxxoox xxxoooox [MSB]
2505 13:42:14.121892 41, [0] oxxxxoox xxxxxxox [MSB]
2506 13:42:14.125407 42, [0] xxxxxxxx xxxxxxxx [MSB]
2507 13:42:14.128610 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
2508 13:42:14.132258 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
2509 13:42:14.135372 iDelay=42, Bit 2, Center 19 (2 ~ 36) 35
2510 13:42:14.138822 iDelay=42, Bit 3, Center 16 (-1 ~ 34) 36
2511 13:42:14.142001 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2512 13:42:14.145238 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
2513 13:42:14.148524 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
2514 13:42:14.155141 iDelay=42, Bit 7, Center 21 (4 ~ 38) 35
2515 13:42:14.158739 iDelay=42, Bit 8, Center 17 (1 ~ 34) 34
2516 13:42:14.161960 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
2517 13:42:14.165091 iDelay=42, Bit 10, Center 20 (2 ~ 39) 38
2518 13:42:14.168607 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
2519 13:42:14.172163 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
2520 13:42:14.175359 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
2521 13:42:14.178568 iDelay=42, Bit 14, Center 24 (7 ~ 41) 35
2522 13:42:14.182146 iDelay=42, Bit 15, Center 13 (-3 ~ 30) 34
2523 13:42:14.182534 ==
2524 13:42:14.188395 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2525 13:42:14.191863 fsp= 1, odt_onoff= 1, Byte mode= 0
2526 13:42:14.192254 ==
2527 13:42:14.192602 DQS Delay:
2528 13:42:14.195326 DQS0 = 0, DQS1 = 0
2529 13:42:14.195716 DQM Delay:
2530 13:42:14.198866 DQM0 = 20, DQM1 = 19
2531 13:42:14.199256 DQ Delay:
2532 13:42:14.201652 DQ0 =22, DQ1 =21, DQ2 =19, DQ3 =16
2533 13:42:14.205028 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =21
2534 13:42:14.208279 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
2535 13:42:14.211612 DQ12 =22, DQ13 =22, DQ14 =24, DQ15 =13
2536 13:42:14.212004
2537 13:42:14.212376
2538 13:42:14.212775 DramC Write-DBI off
2539 13:42:14.212848 ==
2540 13:42:14.218107 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2541 13:42:14.221525 fsp= 1, odt_onoff= 1, Byte mode= 0
2542 13:42:14.221610 ==
2543 13:42:14.224391 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2544 13:42:14.224485
2545 13:42:14.227988 Begin, DQ Scan Range 920~1176
2546 13:42:14.228071
2547 13:42:14.228137
2548 13:42:14.231394 TX Vref Scan disable
2549 13:42:14.234908 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
2550 13:42:14.238169 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2551 13:42:14.241200 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2552 13:42:14.244735 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2553 13:42:14.247897 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2554 13:42:14.251617 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2555 13:42:14.254968 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2556 13:42:14.258976 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2557 13:42:14.261634 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2558 13:42:14.265138 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2559 13:42:14.271754 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2560 13:42:14.274691 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2561 13:42:14.278373 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2562 13:42:14.281614 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2563 13:42:14.284830 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2564 13:42:14.288303 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2565 13:42:14.291894 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2566 13:42:14.295139 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2567 13:42:14.298060 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2568 13:42:14.301309 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2569 13:42:14.304624 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2570 13:42:14.307636 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2571 13:42:14.310932 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2572 13:42:14.314274 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2573 13:42:14.317656 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2574 13:42:14.320919 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2575 13:42:14.327928 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2576 13:42:14.331411 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2577 13:42:14.334502 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2578 13:42:14.337931 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2579 13:42:14.341339 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2580 13:42:14.344428 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2581 13:42:14.347828 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2582 13:42:14.351351 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2583 13:42:14.354869 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2584 13:42:14.357618 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2585 13:42:14.361027 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2586 13:42:14.364386 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2587 13:42:14.367985 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2588 13:42:14.371297 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2589 13:42:14.374594 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2590 13:42:14.377631 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2591 13:42:14.380892 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2592 13:42:14.384314 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2593 13:42:14.390606 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2594 13:42:14.394112 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2595 13:42:14.397491 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2596 13:42:14.401106 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2597 13:42:14.404171 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2598 13:42:14.407421 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2599 13:42:14.410770 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2600 13:42:14.414337 971 |3 6 11|[0] xxxxxxxx oooxxxoo [MSB]
2601 13:42:14.417682 972 |3 6 12|[0] xxxxxxxx oooooxoo [MSB]
2602 13:42:14.420760 973 |3 6 13|[0] xxxxxxxx oooooxoo [MSB]
2603 13:42:14.424337 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
2604 13:42:14.427613 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2605 13:42:14.431086 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2606 13:42:14.434060 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2607 13:42:14.437495 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2608 13:42:14.440776 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2609 13:42:14.443890 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2610 13:42:14.447300 981 |3 6 21|[0] xooooxoo oooooooo [MSB]
2611 13:42:14.454205 982 |3 6 22|[0] oooooxoo oooooooo [MSB]
2612 13:42:14.457660 986 |3 6 26|[0] oooooooo ooooooox [MSB]
2613 13:42:14.461226 987 |3 6 27|[0] oooooooo oxooooox [MSB]
2614 13:42:14.464031 988 |3 6 28|[0] oooooooo oxooooox [MSB]
2615 13:42:14.467467 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
2616 13:42:14.471168 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
2617 13:42:14.474560 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2618 13:42:14.477637 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2619 13:42:14.481129 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2620 13:42:14.484000 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2621 13:42:14.487527 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2622 13:42:14.491032 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2623 13:42:14.494603 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2624 13:42:14.500932 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2625 13:42:14.504047 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2626 13:42:14.507586 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2627 13:42:14.510617 1001 |3 6 41|[0] ooxxoooo xxxxxxxx [MSB]
2628 13:42:14.513975 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2629 13:42:14.517133 Byte0, DQ PI dly=990, DQM PI dly= 990
2630 13:42:14.520360 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2631 13:42:14.520969
2632 13:42:14.527212 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2633 13:42:14.527749
2634 13:42:14.530579 Byte1, DQ PI dly=979, DQM PI dly= 979
2635 13:42:14.533852 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2636 13:42:14.534248
2637 13:42:14.537407 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2638 13:42:14.537961
2639 13:42:14.538409 ==
2640 13:42:14.544044 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2641 13:42:14.547208 fsp= 1, odt_onoff= 1, Byte mode= 0
2642 13:42:14.547719 ==
2643 13:42:14.550231 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2644 13:42:14.550317
2645 13:42:14.553896 Begin, DQ Scan Range 955~1019
2646 13:42:14.556562 Write Rank0 MR14 =0x0
2647 13:42:14.564180
2648 13:42:14.564296 CH=1, VrefRange= 0, VrefLevel = 0
2649 13:42:14.571298 TX Bit0 (984~1000) 17 992, Bit8 (972~984) 13 978,
2650 13:42:14.574638 TX Bit1 (983~996) 14 989, Bit9 (972~983) 12 977,
2651 13:42:14.581207 TX Bit2 (982~995) 14 988, Bit10 (975~986) 12 980,
2652 13:42:14.584403 TX Bit3 (980~992) 13 986, Bit11 (976~986) 11 981,
2653 13:42:14.587983 TX Bit4 (983~997) 15 990, Bit12 (975~986) 12 980,
2654 13:42:14.594390 TX Bit5 (985~997) 13 991, Bit13 (976~987) 12 981,
2655 13:42:14.597809 TX Bit6 (984~997) 14 990, Bit14 (975~986) 12 980,
2656 13:42:14.601188 TX Bit7 (983~995) 13 989, Bit15 (970~980) 11 975,
2657 13:42:14.604090
2658 13:42:14.604174 Write Rank0 MR14 =0x2
2659 13:42:14.613730
2660 13:42:14.613818 CH=1, VrefRange= 0, VrefLevel = 2
2661 13:42:14.620292 TX Bit0 (984~1000) 17 992, Bit8 (971~984) 14 977,
2662 13:42:14.623755 TX Bit1 (983~996) 14 989, Bit9 (971~983) 13 977,
2663 13:42:14.630254 TX Bit2 (981~996) 16 988, Bit10 (975~987) 13 981,
2664 13:42:14.633431 TX Bit3 (979~993) 15 986, Bit11 (975~987) 13 981,
2665 13:42:14.636935 TX Bit4 (982~999) 18 990, Bit12 (975~987) 13 981,
2666 13:42:14.643293 TX Bit5 (984~999) 16 991, Bit13 (976~988) 13 982,
2667 13:42:14.646557 TX Bit6 (983~998) 16 990, Bit14 (975~987) 13 981,
2668 13:42:14.650084 TX Bit7 (983~997) 15 990, Bit15 (969~981) 13 975,
2669 13:42:14.653294
2670 13:42:14.653381 Write Rank0 MR14 =0x4
2671 13:42:14.662728
2672 13:42:14.662815 CH=1, VrefRange= 0, VrefLevel = 4
2673 13:42:14.669330 TX Bit0 (983~1000) 18 991, Bit8 (971~985) 15 978,
2674 13:42:14.672837 TX Bit1 (982~997) 16 989, Bit9 (971~984) 14 977,
2675 13:42:14.679301 TX Bit2 (981~997) 17 989, Bit10 (973~987) 15 980,
2676 13:42:14.683022 TX Bit3 (979~993) 15 986, Bit11 (975~988) 14 981,
2677 13:42:14.685782 TX Bit4 (982~999) 18 990, Bit12 (974~988) 15 981,
2678 13:42:14.692619 TX Bit5 (984~999) 16 991, Bit13 (976~989) 14 982,
2679 13:42:14.696006 TX Bit6 (983~998) 16 990, Bit14 (974~988) 15 981,
2680 13:42:14.698930 TX Bit7 (983~998) 16 990, Bit15 (969~982) 14 975,
2681 13:42:14.702502
2682 13:42:14.702589 Write Rank0 MR14 =0x6
2683 13:42:14.711846
2684 13:42:14.711933 CH=1, VrefRange= 0, VrefLevel = 6
2685 13:42:14.718478 TX Bit0 (984~1001) 18 992, Bit8 (970~985) 16 977,
2686 13:42:14.721908 TX Bit1 (982~998) 17 990, Bit9 (971~984) 14 977,
2687 13:42:14.728606 TX Bit2 (980~998) 19 989, Bit10 (973~988) 16 980,
2688 13:42:14.732283 TX Bit3 (978~994) 17 986, Bit11 (975~989) 15 982,
2689 13:42:14.735000 TX Bit4 (982~999) 18 990, Bit12 (973~989) 17 981,
2690 13:42:14.741949 TX Bit5 (984~999) 16 991, Bit13 (976~989) 14 982,
2691 13:42:14.745080 TX Bit6 (982~999) 18 990, Bit14 (973~989) 17 981,
2692 13:42:14.748701 TX Bit7 (983~998) 16 990, Bit15 (968~983) 16 975,
2693 13:42:14.751991
2694 13:42:14.752075 Write Rank0 MR14 =0x8
2695 13:42:14.761221
2696 13:42:14.761306 CH=1, VrefRange= 0, VrefLevel = 8
2697 13:42:14.768204 TX Bit0 (983~1001) 19 992, Bit8 (971~986) 16 978,
2698 13:42:14.771507 TX Bit1 (981~999) 19 990, Bit9 (970~984) 15 977,
2699 13:42:14.777684 TX Bit2 (980~998) 19 989, Bit10 (974~989) 16 981,
2700 13:42:14.781206 TX Bit3 (978~995) 18 986, Bit11 (975~990) 16 982,
2701 13:42:14.784734 TX Bit4 (982~1000) 19 991, Bit12 (974~990) 17 982,
2702 13:42:14.791236 TX Bit5 (984~1000) 17 992, Bit13 (975~990) 16 982,
2703 13:42:14.794695 TX Bit6 (982~999) 18 990, Bit14 (974~990) 17 982,
2704 13:42:14.798070 TX Bit7 (982~999) 18 990, Bit15 (968~984) 17 976,
2705 13:42:14.800982
2706 13:42:14.801087 Write Rank0 MR14 =0xa
2707 13:42:14.810803
2708 13:42:14.814177 CH=1, VrefRange= 0, VrefLevel = 10
2709 13:42:14.817732 TX Bit0 (983~1001) 19 992, Bit8 (970~986) 17 978,
2710 13:42:14.820472 TX Bit1 (981~999) 19 990, Bit9 (971~985) 15 978,
2711 13:42:14.827169 TX Bit2 (979~999) 21 989, Bit10 (973~989) 17 981,
2712 13:42:14.830513 TX Bit3 (978~996) 19 987, Bit11 (975~991) 17 983,
2713 13:42:14.833889 TX Bit4 (981~1000) 20 990, Bit12 (974~991) 18 982,
2714 13:42:14.840699 TX Bit5 (984~1000) 17 992, Bit13 (975~991) 17 983,
2715 13:42:14.844066 TX Bit6 (982~1000) 19 991, Bit14 (974~991) 18 982,
2716 13:42:14.850363 TX Bit7 (982~999) 18 990, Bit15 (968~984) 17 976,
2717 13:42:14.850453
2718 13:42:14.850526 Write Rank0 MR14 =0xc
2719 13:42:14.860411
2720 13:42:14.863437 CH=1, VrefRange= 0, VrefLevel = 12
2721 13:42:14.866803 TX Bit0 (982~1001) 20 991, Bit8 (971~987) 17 979,
2722 13:42:14.870000 TX Bit1 (981~1000) 20 990, Bit9 (970~985) 16 977,
2723 13:42:14.876660 TX Bit2 (979~999) 21 989, Bit10 (972~990) 19 981,
2724 13:42:14.880142 TX Bit3 (977~997) 21 987, Bit11 (973~991) 19 982,
2725 13:42:14.883267 TX Bit4 (981~1001) 21 991, Bit12 (972~992) 21 982,
2726 13:42:14.889966 TX Bit5 (983~1001) 19 992, Bit13 (975~991) 17 983,
2727 13:42:14.893392 TX Bit6 (981~1000) 20 990, Bit14 (972~991) 20 981,
2728 13:42:14.900062 TX Bit7 (981~1000) 20 990, Bit15 (968~984) 17 976,
2729 13:42:14.900148
2730 13:42:14.900214 Write Rank0 MR14 =0xe
2731 13:42:14.910188
2732 13:42:14.913608 CH=1, VrefRange= 0, VrefLevel = 14
2733 13:42:14.917051 TX Bit0 (982~1002) 21 992, Bit8 (970~987) 18 978,
2734 13:42:14.920300 TX Bit1 (980~1000) 21 990, Bit9 (970~985) 16 977,
2735 13:42:14.926789 TX Bit2 (979~1000) 22 989, Bit10 (972~991) 20 981,
2736 13:42:14.930022 TX Bit3 (977~996) 20 986, Bit11 (972~991) 20 981,
2737 13:42:14.933724 TX Bit4 (980~1001) 22 990, Bit12 (972~992) 21 982,
2738 13:42:14.940345 TX Bit5 (983~1001) 19 992, Bit13 (975~992) 18 983,
2739 13:42:14.943775 TX Bit6 (981~1001) 21 991, Bit14 (972~992) 21 982,
2740 13:42:14.950134 TX Bit7 (981~1000) 20 990, Bit15 (968~985) 18 976,
2741 13:42:14.950289
2742 13:42:14.950410 Write Rank0 MR14 =0x10
2743 13:42:14.960680
2744 13:42:14.964218 CH=1, VrefRange= 0, VrefLevel = 16
2745 13:42:14.967394 TX Bit0 (981~1003) 23 992, Bit8 (970~988) 19 979,
2746 13:42:14.970589 TX Bit1 (979~1000) 22 989, Bit9 (970~986) 17 978,
2747 13:42:14.977591 TX Bit2 (978~1000) 23 989, Bit10 (972~991) 20 981,
2748 13:42:14.980447 TX Bit3 (977~998) 22 987, Bit11 (972~992) 21 982,
2749 13:42:14.983949 TX Bit4 (980~1001) 22 990, Bit12 (972~992) 21 982,
2750 13:42:14.990662 TX Bit5 (983~1001) 19 992, Bit13 (974~992) 19 983,
2751 13:42:14.993915 TX Bit6 (980~1001) 22 990, Bit14 (971~992) 22 981,
2752 13:42:15.000428 TX Bit7 (980~1001) 22 990, Bit15 (967~985) 19 976,
2753 13:42:15.000563
2754 13:42:15.000664 Write Rank0 MR14 =0x12
2755 13:42:15.010898
2756 13:42:15.014210 CH=1, VrefRange= 0, VrefLevel = 18
2757 13:42:15.017295 TX Bit0 (982~1003) 22 992, Bit8 (969~988) 20 978,
2758 13:42:15.020946 TX Bit1 (979~1001) 23 990, Bit9 (970~987) 18 978,
2759 13:42:15.027242 TX Bit2 (978~1000) 23 989, Bit10 (970~991) 22 980,
2760 13:42:15.030624 TX Bit3 (977~999) 23 988, Bit11 (972~992) 21 982,
2761 13:42:15.033940 TX Bit4 (980~1002) 23 991, Bit12 (971~993) 23 982,
2762 13:42:15.041140 TX Bit5 (982~1002) 21 992, Bit13 (974~992) 19 983,
2763 13:42:15.044354 TX Bit6 (980~1002) 23 991, Bit14 (971~993) 23 982,
2764 13:42:15.050641 TX Bit7 (980~1001) 22 990, Bit15 (968~986) 19 977,
2765 13:42:15.050726
2766 13:42:15.050792 Write Rank0 MR14 =0x14
2767 13:42:15.061201
2768 13:42:15.064617 CH=1, VrefRange= 0, VrefLevel = 20
2769 13:42:15.068301 TX Bit0 (981~1004) 24 992, Bit8 (970~988) 19 979,
2770 13:42:15.071616 TX Bit1 (979~1001) 23 990, Bit9 (970~987) 18 978,
2771 13:42:15.077810 TX Bit2 (978~1001) 24 989, Bit10 (971~992) 22 981,
2772 13:42:15.081265 TX Bit3 (977~998) 22 987, Bit11 (972~992) 21 982,
2773 13:42:15.084469 TX Bit4 (979~1002) 24 990, Bit12 (972~993) 22 982,
2774 13:42:15.091864 TX Bit5 (982~1002) 21 992, Bit13 (974~992) 19 983,
2775 13:42:15.094932 TX Bit6 (980~1001) 22 990, Bit14 (971~993) 23 982,
2776 13:42:15.101521 TX Bit7 (980~1001) 22 990, Bit15 (967~986) 20 976,
2777 13:42:15.101980
2778 13:42:15.102282 Write Rank0 MR14 =0x16
2779 13:42:15.112749
2780 13:42:15.115580 CH=1, VrefRange= 0, VrefLevel = 22
2781 13:42:15.119004 TX Bit0 (981~1005) 25 993, Bit8 (969~990) 22 979,
2782 13:42:15.122672 TX Bit1 (979~1002) 24 990, Bit9 (969~989) 21 979,
2783 13:42:15.129019 TX Bit2 (977~1001) 25 989, Bit10 (970~992) 23 981,
2784 13:42:15.132229 TX Bit3 (977~999) 23 988, Bit11 (971~993) 23 982,
2785 13:42:15.135838 TX Bit4 (979~1002) 24 990, Bit12 (971~993) 23 982,
2786 13:42:15.142127 TX Bit5 (982~1003) 22 992, Bit13 (973~993) 21 983,
2787 13:42:15.146615 TX Bit6 (979~1002) 24 990, Bit14 (970~993) 24 981,
2788 13:42:15.152535 TX Bit7 (979~1002) 24 990, Bit15 (967~987) 21 977,
2789 13:42:15.152939
2790 13:42:15.153248 Write Rank0 MR14 =0x18
2791 13:42:15.162961
2792 13:42:15.166110 CH=1, VrefRange= 0, VrefLevel = 24
2793 13:42:15.169277 TX Bit0 (980~1005) 26 992, Bit8 (969~991) 23 980,
2794 13:42:15.172673 TX Bit1 (978~1002) 25 990, Bit9 (969~989) 21 979,
2795 13:42:15.179519 TX Bit2 (977~1002) 26 989, Bit10 (970~992) 23 981,
2796 13:42:15.182491 TX Bit3 (977~999) 23 988, Bit11 (971~993) 23 982,
2797 13:42:15.186074 TX Bit4 (978~1003) 26 990, Bit12 (970~994) 25 982,
2798 13:42:15.192605 TX Bit5 (981~1003) 23 992, Bit13 (972~993) 22 982,
2799 13:42:15.196008 TX Bit6 (979~1003) 25 991, Bit14 (970~993) 24 981,
2800 13:42:15.202383 TX Bit7 (979~1002) 24 990, Bit15 (966~988) 23 977,
2801 13:42:15.202770
2802 13:42:15.203067 Write Rank0 MR14 =0x1a
2803 13:42:15.213641
2804 13:42:15.217049 CH=1, VrefRange= 0, VrefLevel = 26
2805 13:42:15.220636 TX Bit0 (980~1006) 27 993, Bit8 (968~991) 24 979,
2806 13:42:15.223588 TX Bit1 (978~1002) 25 990, Bit9 (969~989) 21 979,
2807 13:42:15.230474 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2808 13:42:15.233806 TX Bit3 (976~1000) 25 988, Bit11 (971~993) 23 982,
2809 13:42:15.236971 TX Bit4 (978~1003) 26 990, Bit12 (970~994) 25 982,
2810 13:42:15.243878 TX Bit5 (981~1004) 24 992, Bit13 (972~993) 22 982,
2811 13:42:15.247072 TX Bit6 (979~1003) 25 991, Bit14 (970~993) 24 981,
2812 13:42:15.253490 TX Bit7 (979~1002) 24 990, Bit15 (966~988) 23 977,
2813 13:42:15.253575
2814 13:42:15.253641 Write Rank0 MR14 =0x1c
2815 13:42:15.263993
2816 13:42:15.264076 CH=1, VrefRange= 0, VrefLevel = 28
2817 13:42:15.271373 TX Bit0 (979~1006) 28 992, Bit8 (968~991) 24 979,
2818 13:42:15.274359 TX Bit1 (978~1003) 26 990, Bit9 (969~990) 22 979,
2819 13:42:15.281666 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2820 13:42:15.284320 TX Bit3 (976~1000) 25 988, Bit11 (970~993) 24 981,
2821 13:42:15.287954 TX Bit4 (979~1004) 26 991, Bit12 (971~994) 24 982,
2822 13:42:15.294429 TX Bit5 (980~1005) 26 992, Bit13 (971~993) 23 982,
2823 13:42:15.297972 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
2824 13:42:15.304195 TX Bit7 (979~1003) 25 991, Bit15 (966~987) 22 976,
2825 13:42:15.304662
2826 13:42:15.304983 Write Rank0 MR14 =0x1e
2827 13:42:15.315113
2828 13:42:15.318856 CH=1, VrefRange= 0, VrefLevel = 30
2829 13:42:15.321822 TX Bit0 (980~1006) 27 993, Bit8 (968~992) 25 980,
2830 13:42:15.325334 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
2831 13:42:15.331548 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2832 13:42:15.335052 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2833 13:42:15.338188 TX Bit4 (979~1004) 26 991, Bit12 (971~993) 23 982,
2834 13:42:15.344642 TX Bit5 (980~1005) 26 992, Bit13 (972~994) 23 983,
2835 13:42:15.348126 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
2836 13:42:15.354642 TX Bit7 (978~1003) 26 990, Bit15 (966~988) 23 977,
2837 13:42:15.354818
2838 13:42:15.354917 Write Rank0 MR14 =0x20
2839 13:42:15.365644
2840 13:42:15.369048 CH=1, VrefRange= 0, VrefLevel = 32
2841 13:42:15.372615 TX Bit0 (980~1006) 27 993, Bit8 (968~991) 24 979,
2842 13:42:15.375946 TX Bit1 (978~1004) 27 991, Bit9 (968~991) 24 979,
2843 13:42:15.382452 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2844 13:42:15.385972 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2845 13:42:15.389462 TX Bit4 (979~1004) 26 991, Bit12 (970~993) 24 981,
2846 13:42:15.395716 TX Bit5 (979~1006) 28 992, Bit13 (971~994) 24 982,
2847 13:42:15.399589 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2848 13:42:15.405427 TX Bit7 (978~1004) 27 991, Bit15 (965~987) 23 976,
2849 13:42:15.405512
2850 13:42:15.405579 Write Rank0 MR14 =0x22
2851 13:42:15.416434
2852 13:42:15.416528 CH=1, VrefRange= 0, VrefLevel = 34
2853 13:42:15.423354 TX Bit0 (980~1006) 27 993, Bit8 (968~991) 24 979,
2854 13:42:15.426367 TX Bit1 (978~1004) 27 991, Bit9 (968~991) 24 979,
2855 13:42:15.432996 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2856 13:42:15.436319 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2857 13:42:15.439953 TX Bit4 (979~1004) 26 991, Bit12 (970~993) 24 981,
2858 13:42:15.446311 TX Bit5 (979~1006) 28 992, Bit13 (971~994) 24 982,
2859 13:42:15.449829 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2860 13:42:15.456659 TX Bit7 (978~1004) 27 991, Bit15 (965~987) 23 976,
2861 13:42:15.456748
2862 13:42:15.456814 Write Rank0 MR14 =0x24
2863 13:42:15.466982
2864 13:42:15.470854 CH=1, VrefRange= 0, VrefLevel = 36
2865 13:42:15.473945 TX Bit0 (980~1006) 27 993, Bit8 (968~991) 24 979,
2866 13:42:15.477476 TX Bit1 (978~1004) 27 991, Bit9 (968~991) 24 979,
2867 13:42:15.484020 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2868 13:42:15.487654 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2869 13:42:15.490932 TX Bit4 (979~1004) 26 991, Bit12 (970~993) 24 981,
2870 13:42:15.497177 TX Bit5 (979~1006) 28 992, Bit13 (971~994) 24 982,
2871 13:42:15.500447 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2872 13:42:15.507041 TX Bit7 (978~1004) 27 991, Bit15 (965~987) 23 976,
2873 13:42:15.507126
2874 13:42:15.507193 Write Rank0 MR14 =0x26
2875 13:42:15.517590
2876 13:42:15.521388 CH=1, VrefRange= 0, VrefLevel = 38
2877 13:42:15.524352 TX Bit0 (980~1006) 27 993, Bit8 (968~991) 24 979,
2878 13:42:15.527728 TX Bit1 (978~1004) 27 991, Bit9 (968~991) 24 979,
2879 13:42:15.534577 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2880 13:42:15.538017 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2881 13:42:15.541258 TX Bit4 (979~1004) 26 991, Bit12 (970~993) 24 981,
2882 13:42:15.547701 TX Bit5 (979~1006) 28 992, Bit13 (971~994) 24 982,
2883 13:42:15.551110 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2884 13:42:15.557894 TX Bit7 (978~1004) 27 991, Bit15 (965~987) 23 976,
2885 13:42:15.558020
2886 13:42:15.558088
2887 13:42:15.560909 TX Vref found, early break! 379< 384
2888 13:42:15.564233 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2889 13:42:15.567631 u1DelayCellOfst[0]=6 cells (5 PI)
2890 13:42:15.570999 u1DelayCellOfst[1]=3 cells (3 PI)
2891 13:42:15.574367 u1DelayCellOfst[2]=1 cells (1 PI)
2892 13:42:15.578062 u1DelayCellOfst[3]=0 cells (0 PI)
2893 13:42:15.580874 u1DelayCellOfst[4]=3 cells (3 PI)
2894 13:42:15.584157 u1DelayCellOfst[5]=5 cells (4 PI)
2895 13:42:15.587450 u1DelayCellOfst[6]=3 cells (3 PI)
2896 13:42:15.587535 u1DelayCellOfst[7]=3 cells (3 PI)
2897 13:42:15.590804 Byte0, DQ PI dly=988, DQM PI dly= 990
2898 13:42:15.597520 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2899 13:42:15.597606
2900 13:42:15.601375 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2901 13:42:15.601460
2902 13:42:15.604678 u1DelayCellOfst[8]=3 cells (3 PI)
2903 13:42:15.607482 u1DelayCellOfst[9]=3 cells (3 PI)
2904 13:42:15.611118 u1DelayCellOfst[10]=6 cells (5 PI)
2905 13:42:15.614540 u1DelayCellOfst[11]=7 cells (6 PI)
2906 13:42:15.617438 u1DelayCellOfst[12]=6 cells (5 PI)
2907 13:42:15.620805 u1DelayCellOfst[13]=7 cells (6 PI)
2908 13:42:15.624062 u1DelayCellOfst[14]=7 cells (6 PI)
2909 13:42:15.627496 u1DelayCellOfst[15]=0 cells (0 PI)
2910 13:42:15.631185 Byte1, DQ PI dly=976, DQM PI dly= 979
2911 13:42:15.633941 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2912 13:42:15.634025
2913 13:42:15.637440 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2914 13:42:15.637550
2915 13:42:15.640961 Write Rank0 MR14 =0x20
2916 13:42:15.641053
2917 13:42:15.643966 Final TX Range 0 Vref 32
2918 13:42:15.644051
2919 13:42:15.650811 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2920 13:42:15.650922
2921 13:42:15.657929 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2922 13:42:15.664356 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2923 13:42:15.670974 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2924 13:42:15.671085 Write Rank0 MR3 =0xb0
2925 13:42:15.674419 DramC Write-DBI on
2926 13:42:15.674530 ==
2927 13:42:15.680665 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2928 13:42:15.680750 fsp= 1, odt_onoff= 1, Byte mode= 0
2929 13:42:15.684242 ==
2930 13:42:15.687099 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2931 13:42:15.687184
2932 13:42:15.690601 Begin, DQ Scan Range 699~763
2933 13:42:15.690685
2934 13:42:15.690751
2935 13:42:15.690811 TX Vref Scan disable
2936 13:42:15.694045 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2937 13:42:15.700439 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2938 13:42:15.703613 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2939 13:42:15.707183 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2940 13:42:15.710505 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2941 13:42:15.714012 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2942 13:42:15.717301 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2943 13:42:15.720508 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2944 13:42:15.723660 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2945 13:42:15.726848 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2946 13:42:15.730489 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2947 13:42:15.733946 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2948 13:42:15.737149 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2949 13:42:15.740154 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2950 13:42:15.743683 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2951 13:42:15.746632 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2952 13:42:15.749999 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2953 13:42:15.753877 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2954 13:42:15.756929 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2955 13:42:15.760031 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2956 13:42:15.763461 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2957 13:42:15.770627 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2958 13:42:15.773462 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2959 13:42:15.776890 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2960 13:42:15.780329 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2961 13:42:15.783749 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2962 13:42:15.790052 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2963 13:42:15.793502 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2964 13:42:15.797031 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2965 13:42:15.800063 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2966 13:42:15.803739 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2967 13:42:15.807181 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2968 13:42:15.810197 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2969 13:42:15.813478 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2970 13:42:15.816956 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2971 13:42:15.820386 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2972 13:42:15.823184 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2973 13:42:15.826910 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2974 13:42:15.830296 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2975 13:42:15.833604 Byte0, DQ PI dly=736, DQM PI dly= 736
2976 13:42:15.840025 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
2977 13:42:15.840110
2978 13:42:15.843532 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
2979 13:42:15.843617
2980 13:42:15.846681 Byte1, DQ PI dly=724, DQM PI dly= 724
2981 13:42:15.849905 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2982 13:42:15.849989
2983 13:42:15.856465 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2984 13:42:15.856549
2985 13:42:15.863145 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2986 13:42:15.869921 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2987 13:42:15.876500 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2988 13:42:15.876585 Write Rank0 MR3 =0x30
2989 13:42:15.879629 DramC Write-DBI off
2990 13:42:15.879716
2991 13:42:15.879781 [DATLAT]
2992 13:42:15.883053 Freq=1600, CH1 RK0, use_rxtx_scan=0
2993 13:42:15.883136
2994 13:42:15.886673 DATLAT Default: 0xf
2995 13:42:15.886755 7, 0xFFFF, sum=0
2996 13:42:15.890101 8, 0xFFFF, sum=0
2997 13:42:15.890186 9, 0xFFFF, sum=0
2998 13:42:15.893230 10, 0xFFFF, sum=0
2999 13:42:15.893321 11, 0xFFFF, sum=0
3000 13:42:15.896524 12, 0xFFFF, sum=0
3001 13:42:15.896623 13, 0xFFFF, sum=0
3002 13:42:15.900205 14, 0x0, sum=1
3003 13:42:15.900304 15, 0x0, sum=2
3004 13:42:15.900382 16, 0x0, sum=3
3005 13:42:15.902994 17, 0x0, sum=4
3006 13:42:15.906577 pattern=2 first_step=14 total pass=5 best_step=16
3007 13:42:15.906668 ==
3008 13:42:15.913518 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3009 13:42:15.916765 fsp= 1, odt_onoff= 1, Byte mode= 0
3010 13:42:15.916886 ==
3011 13:42:15.919929 Start DQ dly to find pass range UseTestEngine =1
3012 13:42:15.923571 x-axis: bit #, y-axis: DQ dly (-127~63)
3013 13:42:15.926495 RX Vref Scan = 1
3014 13:42:16.032518
3015 13:42:16.032651 RX Vref found, early break!
3016 13:42:16.032722
3017 13:42:16.039545 Final RX Vref 11, apply to both rank0 and 1
3018 13:42:16.039629 ==
3019 13:42:16.043045 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3020 13:42:16.045990 fsp= 1, odt_onoff= 1, Byte mode= 0
3021 13:42:16.046068 ==
3022 13:42:16.046132 DQS Delay:
3023 13:42:16.049472 DQS0 = 0, DQS1 = 0
3024 13:42:16.049581 DQM Delay:
3025 13:42:16.052745 DQM0 = 20, DQM1 = 19
3026 13:42:16.052823 DQ Delay:
3027 13:42:16.055659 DQ0 =21, DQ1 =22, DQ2 =18, DQ3 =16
3028 13:42:16.059432 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =20
3029 13:42:16.062555 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3030 13:42:16.065528 DQ12 =22, DQ13 =21, DQ14 =23, DQ15 =13
3031 13:42:16.065618
3032 13:42:16.065689
3033 13:42:16.065765
3034 13:42:16.069492 [DramC_TX_OE_Calibration] TA2
3035 13:42:16.072475 Original DQ_B0 (3 6) =30, OEN = 27
3036 13:42:16.075922 Original DQ_B1 (3 6) =30, OEN = 27
3037 13:42:16.078872 23, 0x0, End_B0=23 End_B1=23
3038 13:42:16.078949 24, 0x0, End_B0=24 End_B1=24
3039 13:42:16.082460 25, 0x0, End_B0=25 End_B1=25
3040 13:42:16.085863 26, 0x0, End_B0=26 End_B1=26
3041 13:42:16.088913 27, 0x0, End_B0=27 End_B1=27
3042 13:42:16.092613 28, 0x0, End_B0=28 End_B1=28
3043 13:42:16.092690 29, 0x0, End_B0=29 End_B1=29
3044 13:42:16.095845 30, 0x0, End_B0=30 End_B1=30
3045 13:42:16.099273 31, 0xFFFF, End_B0=30 End_B1=30
3046 13:42:16.105608 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3047 13:42:16.109191 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3048 13:42:16.109264
3049 13:42:16.109329
3050 13:42:16.112055 Write Rank0 MR23 =0x3f
3051 13:42:16.112121 [DQSOSC]
3052 13:42:16.122698 [DQSOSCAuto] RK0, (LSB)MR18= 0xbebe, (MSB)MR19= 0x202, tDQSOscB0 = 448 ps tDQSOscB1 = 448 ps
3053 13:42:16.129060 CH1_RK0: MR19=0x202, MR18=0xBEBE, DQSOSC=448, MR23=63, INC=12, DEC=18
3054 13:42:16.129163 Write Rank0 MR23 =0x3f
3055 13:42:16.129239 [DQSOSC]
3056 13:42:16.138818 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
3057 13:42:16.142392 CH1 RK0: MR19=202, MR18=C0C0
3058 13:42:16.145957 [RankSwap] Rank num 2, (Multi 1), Rank 1
3059 13:42:16.146048 Write Rank0 MR2 =0xad
3060 13:42:16.148677 [Write Leveling]
3061 13:42:16.152182 delay byte0 byte1 byte2 byte3
3062 13:42:16.152283
3063 13:42:16.152359 10 0 0
3064 13:42:16.155522 11 0 0
3065 13:42:16.155621 12 0 0
3066 13:42:16.155716 13 0 0
3067 13:42:16.158842 14 0 0
3068 13:42:16.158955 15 0 0
3069 13:42:16.162280 16 0 0
3070 13:42:16.162399 17 0 0
3071 13:42:16.165530 18 0 0
3072 13:42:16.165650 19 0 0
3073 13:42:16.165773 20 0 0
3074 13:42:16.168940 21 0 0
3075 13:42:16.169073 22 0 0
3076 13:42:16.172231 23 0 0
3077 13:42:16.172429 24 0 ff
3078 13:42:16.172573 25 0 ff
3079 13:42:16.175175 26 0 ff
3080 13:42:16.175312 27 0 ff
3081 13:42:16.178458 28 0 ff
3082 13:42:16.178527 29 0 ff
3083 13:42:16.181994 30 0 ff
3084 13:42:16.182068 31 0 ff
3085 13:42:16.185327 32 0 ff
3086 13:42:16.185397 33 0 ff
3087 13:42:16.185461 34 0 ff
3088 13:42:16.188558 35 ff ff
3089 13:42:16.188630 36 ff ff
3090 13:42:16.191894 37 ff ff
3091 13:42:16.191964 38 ff ff
3092 13:42:16.195463 39 ff ff
3093 13:42:16.195530 40 ff ff
3094 13:42:16.198796 41 ff ff
3095 13:42:16.202164 pass bytecount = 0xff (0xff: all bytes pass)
3096 13:42:16.202254
3097 13:42:16.202329 DQS0 dly: 35
3098 13:42:16.205076 DQS1 dly: 24
3099 13:42:16.205168 Write Rank0 MR2 =0x2d
3100 13:42:16.208563 [RankSwap] Rank num 2, (Multi 1), Rank 0
3101 13:42:16.211897 Write Rank1 MR1 =0xd6
3102 13:42:16.212009 [Gating]
3103 13:42:16.212097 ==
3104 13:42:16.218531 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3105 13:42:16.222028 fsp= 1, odt_onoff= 1, Byte mode= 0
3106 13:42:16.222148 ==
3107 13:42:16.225397 3 1 0 |3636 2c2b |(0 0)(11 11) |(1 1)(1 1)| 0
3108 13:42:16.229086 3 1 4 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3109 13:42:16.235443 3 1 8 |b0b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3110 13:42:16.238491 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3111 13:42:16.241925 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3112 13:42:16.248952 3 1 20 |3434 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3113 13:42:16.252449 3 1 24 |3433 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3114 13:42:16.255347 3 1 28 |3434 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
3115 13:42:16.262178 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3116 13:42:16.265581 3 2 4 |3434 2c2b |(0 11)(11 11) |(1 1)(1 0)| 0
3117 13:42:16.268616 3 2 8 |2525 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3118 13:42:16.271864 3 2 12 |3d3d 201 |(0 0)(11 11) |(1 1)(0 0)| 0
3119 13:42:16.278636 3 2 16 |3d3d 303 |(11 11)(11 11) |(1 1)(0 0)| 0
3120 13:42:16.282197 [Byte 0] Lead/lag Transition tap number (1)
3121 13:42:16.285573 3 2 20 |b0a 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3122 13:42:16.288840 3 2 24 |3a3a 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3123 13:42:16.295159 3 2 28 |3a39 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3124 13:42:16.298882 3 3 0 |c0c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3125 13:42:16.301807 3 3 4 |a0a 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3126 13:42:16.308957 3 3 8 |808 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3127 13:42:16.311901 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3128 13:42:16.315103 [Byte 0] Lead/lag falling Transition (3, 3, 12)
3129 13:42:16.318757 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3130 13:42:16.325104 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3131 13:42:16.328467 [Byte 1] Lead/lag Transition tap number (1)
3132 13:42:16.331891 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3133 13:42:16.338351 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3134 13:42:16.341707 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3135 13:42:16.345240 3 4 4 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3136 13:42:16.348807 3 4 8 |c0c 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3137 13:42:16.355091 3 4 12 |3d3d 807 |(11 11)(11 11) |(1 1)(1 1)| 0
3138 13:42:16.358767 3 4 16 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3139 13:42:16.361443 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3140 13:42:16.368634 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3141 13:42:16.371431 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3142 13:42:16.375168 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3143 13:42:16.381759 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3144 13:42:16.384646 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3145 13:42:16.388098 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3146 13:42:16.394924 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3147 13:42:16.398139 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3148 13:42:16.401251 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3149 13:42:16.404776 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3150 13:42:16.411291 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3151 13:42:16.414687 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3152 13:42:16.418209 [Byte 0] Lead/lag Transition tap number (3)
3153 13:42:16.424585 3 6 4 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3154 13:42:16.428246 [Byte 1] Lead/lag falling Transition (3, 6, 4)
3155 13:42:16.431117 3 6 8 |1414 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3156 13:42:16.434554 [Byte 1] Lead/lag Transition tap number (2)
3157 13:42:16.441308 3 6 12 |4646 403 |(0 0)(11 11) |(0 0)(0 0)| 0
3158 13:42:16.441382 [Byte 0]First pass (3, 6, 12)
3159 13:42:16.447726 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3160 13:42:16.451274 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3161 13:42:16.454428 [Byte 1]First pass (3, 6, 20)
3162 13:42:16.457841 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3163 13:42:16.461286 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3164 13:42:16.464833 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3165 13:42:16.468182 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3166 13:42:16.474827 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3167 13:42:16.478054 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3168 13:42:16.481414 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3169 13:42:16.484586 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3170 13:42:16.487946 All bytes gating window > 1UI, Early break!
3171 13:42:16.488021
3172 13:42:16.494196 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 30)
3173 13:42:16.494275
3174 13:42:16.497781 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
3175 13:42:16.497851
3176 13:42:16.497910
3177 13:42:16.497968
3178 13:42:16.501235 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
3179 13:42:16.501300
3180 13:42:16.504538 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
3181 13:42:16.504631
3182 13:42:16.504717
3183 13:42:16.507907 Write Rank1 MR1 =0x56
3184 13:42:16.507979
3185 13:42:16.511124 best RODT dly(2T, 0.5T) = (2, 2)
3186 13:42:16.511194
3187 13:42:16.514158 best RODT dly(2T, 0.5T) = (2, 3)
3188 13:42:16.514229 ==
3189 13:42:16.517490 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3190 13:42:16.521009 fsp= 1, odt_onoff= 1, Byte mode= 0
3191 13:42:16.521078 ==
3192 13:42:16.527519 Start DQ dly to find pass range UseTestEngine =0
3193 13:42:16.530879 x-axis: bit #, y-axis: DQ dly (-127~63)
3194 13:42:16.530956 RX Vref Scan = 0
3195 13:42:16.534105 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3196 13:42:16.537540 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3197 13:42:16.541135 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3198 13:42:16.543988 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3199 13:42:16.547292 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3200 13:42:16.551032 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3201 13:42:16.551105 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3202 13:42:16.554250 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3203 13:42:16.557469 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3204 13:42:16.560944 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3205 13:42:16.563985 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3206 13:42:16.567236 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3207 13:42:16.570956 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3208 13:42:16.574377 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3209 13:42:16.574455 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3210 13:42:16.577600 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3211 13:42:16.580978 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3212 13:42:16.583963 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3213 13:42:16.587548 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3214 13:42:16.590969 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3215 13:42:16.594343 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3216 13:42:16.594420 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3217 13:42:16.597340 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3218 13:42:16.600748 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3219 13:42:16.604173 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3220 13:42:16.607585 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3221 13:42:16.610982 0, [0] xxxoxxxx xoxxxxxo [MSB]
3222 13:42:16.613901 1, [0] xxooxxxx ooxxxxxo [MSB]
3223 13:42:16.613984 2, [0] xxooxxxx ooxxxxxo [MSB]
3224 13:42:16.617268 3, [0] xxoooxxo oooxxxxo [MSB]
3225 13:42:16.620931 4, [0] oooooxoo ooooooxo [MSB]
3226 13:42:16.623961 5, [0] oooooooo ooooooxo [MSB]
3227 13:42:16.627381 32, [0] oooooooo ooooooox [MSB]
3228 13:42:16.630728 33, [0] oooooooo ooooooox [MSB]
3229 13:42:16.630818 34, [0] oooooooo ooooooox [MSB]
3230 13:42:16.634236 35, [0] oooxoooo xxooooox [MSB]
3231 13:42:16.637658 36, [0] oooxoooo xxooooox [MSB]
3232 13:42:16.640987 37, [0] ooxxoooo xxooooox [MSB]
3233 13:42:16.644022 38, [0] ooxxoooo xxooooox [MSB]
3234 13:42:16.647515 39, [0] oxxxxoox xxooooox [MSB]
3235 13:42:16.650977 40, [0] oxxxxoox xxxoooox [MSB]
3236 13:42:16.651082 41, [0] oxxxxoox xxxxxxox [MSB]
3237 13:42:16.654125 42, [0] xxxxxxxx xxxxxxxx [MSB]
3238 13:42:16.657513 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
3239 13:42:16.660539 iDelay=42, Bit 1, Center 21 (4 ~ 38) 35
3240 13:42:16.664048 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
3241 13:42:16.670966 iDelay=42, Bit 3, Center 16 (-1 ~ 34) 36
3242 13:42:16.674146 iDelay=42, Bit 4, Center 20 (3 ~ 38) 36
3243 13:42:16.677203 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3244 13:42:16.681103 iDelay=42, Bit 6, Center 22 (4 ~ 41) 38
3245 13:42:16.684367 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3246 13:42:16.687927 iDelay=42, Bit 8, Center 17 (1 ~ 34) 34
3247 13:42:16.690652 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3248 13:42:16.694323 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3249 13:42:16.697452 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3250 13:42:16.700753 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3251 13:42:16.704355 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
3252 13:42:16.707803 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
3253 13:42:16.711172 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3254 13:42:16.713846 ==
3255 13:42:16.717392 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3256 13:42:16.720844 fsp= 1, odt_onoff= 1, Byte mode= 0
3257 13:42:16.720916 ==
3258 13:42:16.720984 DQS Delay:
3259 13:42:16.723754 DQS0 = 0, DQS1 = 0
3260 13:42:16.723822 DQM Delay:
3261 13:42:16.727129 DQM0 = 20, DQM1 = 19
3262 13:42:16.727198 DQ Delay:
3263 13:42:16.730758 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3264 13:42:16.733653 DQ4 =20, DQ5 =23, DQ6 =22, DQ7 =20
3265 13:42:16.737430 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3266 13:42:16.740293 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =14
3267 13:42:16.740406
3268 13:42:16.740497
3269 13:42:16.744136 DramC Write-DBI off
3270 13:42:16.744243 ==
3271 13:42:16.746928 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3272 13:42:16.750506 fsp= 1, odt_onoff= 1, Byte mode= 0
3273 13:42:16.750585 ==
3274 13:42:16.756840 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3275 13:42:16.756914
3276 13:42:16.756989 Begin, DQ Scan Range 920~1176
3277 13:42:16.757061
3278 13:42:16.760233
3279 13:42:16.760317 TX Vref Scan disable
3280 13:42:16.764126 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
3281 13:42:16.767516 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3282 13:42:16.770252 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3283 13:42:16.773608 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3284 13:42:16.777021 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3285 13:42:16.783843 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3286 13:42:16.786708 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3287 13:42:16.790308 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3288 13:42:16.793789 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3289 13:42:16.796716 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3290 13:42:16.800291 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3291 13:42:16.803548 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3292 13:42:16.807016 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3293 13:42:16.810423 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3294 13:42:16.813375 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3295 13:42:16.816758 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3296 13:42:16.820157 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3297 13:42:16.823504 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3298 13:42:16.827160 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3299 13:42:16.829844 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3300 13:42:16.833659 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3301 13:42:16.840087 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3302 13:42:16.843434 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3303 13:42:16.846835 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3304 13:42:16.850359 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3305 13:42:16.853334 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3306 13:42:16.856680 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3307 13:42:16.860359 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3308 13:42:16.863148 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3309 13:42:16.866529 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3310 13:42:16.869722 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3311 13:42:16.873532 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3312 13:42:16.876463 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3313 13:42:16.879998 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3314 13:42:16.883348 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3315 13:42:16.886470 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3316 13:42:16.890357 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3317 13:42:16.896677 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3318 13:42:16.900060 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3319 13:42:16.903297 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3320 13:42:16.906355 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3321 13:42:16.910208 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3322 13:42:16.912882 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3323 13:42:16.916520 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3324 13:42:16.919763 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3325 13:42:16.923201 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3326 13:42:16.926055 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3327 13:42:16.929404 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3328 13:42:16.932888 968 |3 6 8|[0] xxxxxxxx oxxxxxxo [MSB]
3329 13:42:16.936371 969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]
3330 13:42:16.939749 970 |3 6 10|[0] xxxxxxxx ooooxxoo [MSB]
3331 13:42:16.943017 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3332 13:42:16.946284 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3333 13:42:16.949339 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3334 13:42:16.952532 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3335 13:42:16.959368 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3336 13:42:16.962900 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3337 13:42:16.965780 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3338 13:42:16.969426 978 |3 6 18|[0] xxooxxxx oooooooo [MSB]
3339 13:42:16.972889 979 |3 6 19|[0] xooooxxx oooooooo [MSB]
3340 13:42:16.976230 980 |3 6 20|[0] xoooooox oooooooo [MSB]
3341 13:42:16.979400 985 |3 6 25|[0] oooooooo ooooooox [MSB]
3342 13:42:16.982359 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3343 13:42:16.985749 987 |3 6 27|[0] oooooooo oxooooox [MSB]
3344 13:42:16.989124 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
3345 13:42:16.992423 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
3346 13:42:16.996000 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3347 13:42:16.999455 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3348 13:42:17.005724 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3349 13:42:17.009336 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3350 13:42:17.012316 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3351 13:42:17.015649 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3352 13:42:17.019058 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3353 13:42:17.022281 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3354 13:42:17.025871 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3355 13:42:17.029212 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3356 13:42:17.032608 1000 |3 6 40|[0] ooxxooox xxxxxxxx [MSB]
3357 13:42:17.035467 1001 |3 6 41|[0] ooxxooox xxxxxxxx [MSB]
3358 13:42:17.039009 1002 |3 6 42|[0] oxxxxoxx xxxxxxxx [MSB]
3359 13:42:17.042366 1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
3360 13:42:17.045690 Byte0, DQ PI dly=989, DQM PI dly= 989
3361 13:42:17.052505 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3362 13:42:17.052582
3363 13:42:17.055407 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3364 13:42:17.055481
3365 13:42:17.058720 Byte1, DQ PI dly=977, DQM PI dly= 977
3366 13:42:17.062395 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3367 13:42:17.062481
3368 13:42:17.068638 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3369 13:42:17.068713
3370 13:42:17.068791 ==
3371 13:42:17.072191 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3372 13:42:17.075715 fsp= 1, odt_onoff= 1, Byte mode= 0
3373 13:42:17.075791 ==
3374 13:42:17.081981 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3375 13:42:17.082089
3376 13:42:17.085470 Begin, DQ Scan Range 953~1017
3377 13:42:17.085546 Write Rank1 MR14 =0x0
3378 13:42:17.095142
3379 13:42:17.095228 CH=1, VrefRange= 0, VrefLevel = 0
3380 13:42:17.101625 TX Bit0 (983~998) 16 990, Bit8 (970~984) 15 977,
3381 13:42:17.105128 TX Bit1 (983~997) 15 990, Bit9 (970~983) 14 976,
3382 13:42:17.111517 TX Bit2 (980~994) 15 987, Bit10 (973~985) 13 979,
3383 13:42:17.114923 TX Bit3 (978~991) 14 984, Bit11 (974~985) 12 979,
3384 13:42:17.118251 TX Bit4 (982~997) 16 989, Bit12 (974~984) 11 979,
3385 13:42:17.124658 TX Bit5 (983~998) 16 990, Bit13 (974~986) 13 980,
3386 13:42:17.128099 TX Bit6 (982~998) 17 990, Bit14 (973~984) 12 978,
3387 13:42:17.131779 TX Bit7 (984~995) 12 989, Bit15 (968~978) 11 973,
3388 13:42:17.134351
3389 13:42:17.134453 Write Rank1 MR14 =0x2
3390 13:42:17.144028
3391 13:42:17.144141 CH=1, VrefRange= 0, VrefLevel = 2
3392 13:42:17.150659 TX Bit0 (983~999) 17 991, Bit8 (970~984) 15 977,
3393 13:42:17.153876 TX Bit1 (983~998) 16 990, Bit9 (970~984) 15 977,
3394 13:42:17.161217 TX Bit2 (980~995) 16 987, Bit10 (974~985) 12 979,
3395 13:42:17.164416 TX Bit3 (979~992) 14 985, Bit11 (974~986) 13 980,
3396 13:42:17.167479 TX Bit4 (982~997) 16 989, Bit12 (973~985) 13 979,
3397 13:42:17.174620 TX Bit5 (983~999) 17 991, Bit13 (974~986) 13 980,
3398 13:42:17.177499 TX Bit6 (982~998) 17 990, Bit14 (975~985) 11 980,
3399 13:42:17.180920 TX Bit7 (984~996) 13 990, Bit15 (968~978) 11 973,
3400 13:42:17.181008
3401 13:42:17.183918 Write Rank1 MR14 =0x4
3402 13:42:17.193215
3403 13:42:17.193293 CH=1, VrefRange= 0, VrefLevel = 4
3404 13:42:17.200409 TX Bit0 (983~999) 17 991, Bit8 (969~984) 16 976,
3405 13:42:17.203638 TX Bit1 (981~998) 18 989, Bit9 (970~984) 15 977,
3406 13:42:17.209916 TX Bit2 (979~997) 19 988, Bit10 (972~986) 15 979,
3407 13:42:17.213309 TX Bit3 (978~993) 16 985, Bit11 (974~987) 14 980,
3408 13:42:17.216993 TX Bit4 (981~998) 18 989, Bit12 (974~985) 12 979,
3409 13:42:17.223551 TX Bit5 (982~999) 18 990, Bit13 (974~987) 14 980,
3410 13:42:17.226874 TX Bit6 (981~999) 19 990, Bit14 (973~985) 13 979,
3411 13:42:17.229987 TX Bit7 (983~997) 15 990, Bit15 (968~979) 12 973,
3412 13:42:17.230057
3413 13:42:17.233327 Write Rank1 MR14 =0x6
3414 13:42:17.243095
3415 13:42:17.243177 CH=1, VrefRange= 0, VrefLevel = 6
3416 13:42:17.249324 TX Bit0 (983~1000) 18 991, Bit8 (969~985) 17 977,
3417 13:42:17.252859 TX Bit1 (981~999) 19 990, Bit9 (970~984) 15 977,
3418 13:42:17.259732 TX Bit2 (979~997) 19 988, Bit10 (971~986) 16 978,
3419 13:42:17.262759 TX Bit3 (978~993) 16 985, Bit11 (973~988) 16 980,
3420 13:42:17.266094 TX Bit4 (980~998) 19 989, Bit12 (973~986) 14 979,
3421 13:42:17.272840 TX Bit5 (982~1000) 19 991, Bit13 (973~989) 17 981,
3422 13:42:17.276011 TX Bit6 (981~999) 19 990, Bit14 (972~985) 14 978,
3423 13:42:17.282276 TX Bit7 (983~997) 15 990, Bit15 (967~981) 15 974,
3424 13:42:17.282479
3425 13:42:17.282635 Write Rank1 MR14 =0x8
3426 13:42:17.292755
3427 13:42:17.293072 CH=1, VrefRange= 0, VrefLevel = 8
3428 13:42:17.299702 TX Bit0 (982~1000) 19 991, Bit8 (969~985) 17 977,
3429 13:42:17.302518 TX Bit1 (980~999) 20 989, Bit9 (970~985) 16 977,
3430 13:42:17.309454 TX Bit2 (979~998) 20 988, Bit10 (971~986) 16 978,
3431 13:42:17.312948 TX Bit3 (977~994) 18 985, Bit11 (972~988) 17 980,
3432 13:42:17.316366 TX Bit4 (980~999) 20 989, Bit12 (974~987) 14 980,
3433 13:42:17.322737 TX Bit5 (982~1000) 19 991, Bit13 (972~989) 18 980,
3434 13:42:17.326053 TX Bit6 (981~999) 19 990, Bit14 (971~987) 17 979,
3435 13:42:17.329364 TX Bit7 (983~998) 16 990, Bit15 (967~981) 15 974,
3436 13:42:17.329799
3437 13:42:17.332956 Write Rank1 MR14 =0xa
3438 13:42:17.342953
3439 13:42:17.345674 CH=1, VrefRange= 0, VrefLevel = 10
3440 13:42:17.349183 TX Bit0 (982~1001) 20 991, Bit8 (969~985) 17 977,
3441 13:42:17.352318 TX Bit1 (981~999) 19 990, Bit9 (969~985) 17 977,
3442 13:42:17.359525 TX Bit2 (978~998) 21 988, Bit10 (972~987) 16 979,
3443 13:42:17.362166 TX Bit3 (977~994) 18 985, Bit11 (972~990) 19 981,
3444 13:42:17.365586 TX Bit4 (980~999) 20 989, Bit12 (972~988) 17 980,
3445 13:42:17.372254 TX Bit5 (982~1001) 20 991, Bit13 (971~990) 20 980,
3446 13:42:17.375582 TX Bit6 (981~1000) 20 990, Bit14 (971~987) 17 979,
3447 13:42:17.382450 TX Bit7 (982~998) 17 990, Bit15 (966~983) 18 974,
3448 13:42:17.382836
3449 13:42:17.383134 Write Rank1 MR14 =0xc
3450 13:42:17.392548
3451 13:42:17.392930 CH=1, VrefRange= 0, VrefLevel = 12
3452 13:42:17.399057 TX Bit0 (981~1001) 21 991, Bit8 (969~986) 18 977,
3453 13:42:17.402241 TX Bit1 (980~999) 20 989, Bit9 (969~985) 17 977,
3454 13:42:17.409038 TX Bit2 (978~999) 22 988, Bit10 (970~988) 19 979,
3455 13:42:17.412414 TX Bit3 (977~996) 20 986, Bit11 (972~990) 19 981,
3456 13:42:17.415780 TX Bit4 (979~999) 21 989, Bit12 (971~988) 18 979,
3457 13:42:17.422333 TX Bit5 (981~1001) 21 991, Bit13 (972~991) 20 981,
3458 13:42:17.425714 TX Bit6 (980~1000) 21 990, Bit14 (971~988) 18 979,
3459 13:42:17.429385 TX Bit7 (982~999) 18 990, Bit15 (966~984) 19 975,
3460 13:42:17.432654
3461 13:42:17.433107 Write Rank1 MR14 =0xe
3462 13:42:17.442393
3463 13:42:17.445931 CH=1, VrefRange= 0, VrefLevel = 14
3464 13:42:17.449444 TX Bit0 (981~1002) 22 991, Bit8 (968~986) 19 977,
3465 13:42:17.452253 TX Bit1 (980~1000) 21 990, Bit9 (969~986) 18 977,
3466 13:42:17.459537 TX Bit2 (978~999) 22 988, Bit10 (970~989) 20 979,
3467 13:42:17.462765 TX Bit3 (977~997) 21 987, Bit11 (971~990) 20 980,
3468 13:42:17.465548 TX Bit4 (979~1000) 22 989, Bit12 (971~989) 19 980,
3469 13:42:17.472699 TX Bit5 (981~1002) 22 991, Bit13 (972~991) 20 981,
3470 13:42:17.476143 TX Bit6 (980~1000) 21 990, Bit14 (971~989) 19 980,
3471 13:42:17.482443 TX Bit7 (981~1000) 20 990, Bit15 (966~984) 19 975,
3472 13:42:17.482828
3473 13:42:17.483140 Write Rank1 MR14 =0x10
3474 13:42:17.493561
3475 13:42:17.496783 CH=1, VrefRange= 0, VrefLevel = 16
3476 13:42:17.499644 TX Bit0 (980~1003) 24 991, Bit8 (968~987) 20 977,
3477 13:42:17.503012 TX Bit1 (979~1001) 23 990, Bit9 (969~986) 18 977,
3478 13:42:17.509913 TX Bit2 (978~999) 22 988, Bit10 (970~989) 20 979,
3479 13:42:17.513249 TX Bit3 (977~997) 21 987, Bit11 (971~991) 21 981,
3480 13:42:17.516495 TX Bit4 (979~1000) 22 989, Bit12 (970~990) 21 980,
3481 13:42:17.523194 TX Bit5 (980~1002) 23 991, Bit13 (971~991) 21 981,
3482 13:42:17.526674 TX Bit6 (980~1001) 22 990, Bit14 (970~990) 21 980,
3483 13:42:17.533192 TX Bit7 (980~1000) 21 990, Bit15 (965~984) 20 974,
3484 13:42:17.533613
3485 13:42:17.533913 Write Rank1 MR14 =0x12
3486 13:42:17.543485
3487 13:42:17.547102 CH=1, VrefRange= 0, VrefLevel = 18
3488 13:42:17.550507 TX Bit0 (980~1003) 24 991, Bit8 (968~987) 20 977,
3489 13:42:17.553810 TX Bit1 (979~1001) 23 990, Bit9 (968~987) 20 977,
3490 13:42:17.560225 TX Bit2 (978~999) 22 988, Bit10 (970~990) 21 980,
3491 13:42:17.563714 TX Bit3 (977~998) 22 987, Bit11 (970~991) 22 980,
3492 13:42:17.566806 TX Bit4 (979~1001) 23 990, Bit12 (971~991) 21 981,
3493 13:42:17.573729 TX Bit5 (980~1003) 24 991, Bit13 (971~992) 22 981,
3494 13:42:17.576636 TX Bit6 (979~1002) 24 990, Bit14 (970~990) 21 980,
3495 13:42:17.583679 TX Bit7 (980~1000) 21 990, Bit15 (965~985) 21 975,
3496 13:42:17.584092
3497 13:42:17.584423 Write Rank1 MR14 =0x14
3498 13:42:17.594485
3499 13:42:17.597369 CH=1, VrefRange= 0, VrefLevel = 20
3500 13:42:17.600833 TX Bit0 (981~1003) 23 992, Bit8 (968~988) 21 978,
3501 13:42:17.604253 TX Bit1 (978~1002) 25 990, Bit9 (968~988) 21 978,
3502 13:42:17.610791 TX Bit2 (978~1000) 23 989, Bit10 (969~991) 23 980,
3503 13:42:17.614262 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3504 13:42:17.617418 TX Bit4 (978~1002) 25 990, Bit12 (970~991) 22 980,
3505 13:42:17.624314 TX Bit5 (980~1003) 24 991, Bit13 (970~992) 23 981,
3506 13:42:17.627636 TX Bit6 (979~1002) 24 990, Bit14 (970~991) 22 980,
3507 13:42:17.634047 TX Bit7 (980~1001) 22 990, Bit15 (965~985) 21 975,
3508 13:42:17.634481
3509 13:42:17.634808 Write Rank1 MR14 =0x16
3510 13:42:17.644988
3511 13:42:17.648627 CH=1, VrefRange= 0, VrefLevel = 22
3512 13:42:17.651925 TX Bit0 (979~1004) 26 991, Bit8 (967~989) 23 978,
3513 13:42:17.654708 TX Bit1 (979~1002) 24 990, Bit9 (968~988) 21 978,
3514 13:42:17.661687 TX Bit2 (978~1000) 23 989, Bit10 (969~991) 23 980,
3515 13:42:17.665219 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3516 13:42:17.668208 TX Bit4 (978~1002) 25 990, Bit12 (970~991) 22 980,
3517 13:42:17.675269 TX Bit5 (979~1004) 26 991, Bit13 (970~992) 23 981,
3518 13:42:17.678860 TX Bit6 (979~1003) 25 991, Bit14 (970~991) 22 980,
3519 13:42:17.685073 TX Bit7 (980~1001) 22 990, Bit15 (965~985) 21 975,
3520 13:42:17.685468
3521 13:42:17.685780 Write Rank1 MR14 =0x18
3522 13:42:17.696269
3523 13:42:17.699563 CH=1, VrefRange= 0, VrefLevel = 24
3524 13:42:17.702843 TX Bit0 (979~1005) 27 992, Bit8 (967~989) 23 978,
3525 13:42:17.706372 TX Bit1 (978~1003) 26 990, Bit9 (967~989) 23 978,
3526 13:42:17.712638 TX Bit2 (978~1001) 24 989, Bit10 (969~992) 24 980,
3527 13:42:17.715889 TX Bit3 (976~999) 24 987, Bit11 (969~992) 24 980,
3528 13:42:17.719689 TX Bit4 (978~1002) 25 990, Bit12 (970~992) 23 981,
3529 13:42:17.725964 TX Bit5 (979~1005) 27 992, Bit13 (970~992) 23 981,
3530 13:42:17.729428 TX Bit6 (978~1003) 26 990, Bit14 (970~991) 22 980,
3531 13:42:17.736037 TX Bit7 (980~1002) 23 991, Bit15 (964~986) 23 975,
3532 13:42:17.736414
3533 13:42:17.736759 Write Rank1 MR14 =0x1a
3534 13:42:17.747243
3535 13:42:17.750215 CH=1, VrefRange= 0, VrefLevel = 26
3536 13:42:17.753766 TX Bit0 (979~1005) 27 992, Bit8 (967~990) 24 978,
3537 13:42:17.757248 TX Bit1 (978~1003) 26 990, Bit9 (967~990) 24 978,
3538 13:42:17.763528 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3539 13:42:17.766900 TX Bit3 (976~999) 24 987, Bit11 (969~992) 24 980,
3540 13:42:17.770424 TX Bit4 (978~1003) 26 990, Bit12 (970~992) 23 981,
3541 13:42:17.776552 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3542 13:42:17.780056 TX Bit6 (978~1004) 27 991, Bit14 (969~992) 24 980,
3543 13:42:17.786164 TX Bit7 (979~1002) 24 990, Bit15 (964~986) 23 975,
3544 13:42:17.786248
3545 13:42:17.786313 Write Rank1 MR14 =0x1c
3546 13:42:17.797868
3547 13:42:17.801124 CH=1, VrefRange= 0, VrefLevel = 28
3548 13:42:17.804414 TX Bit0 (979~1005) 27 992, Bit8 (967~991) 25 979,
3549 13:42:17.808040 TX Bit1 (978~1004) 27 991, Bit9 (967~990) 24 978,
3550 13:42:17.814160 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3551 13:42:17.817739 TX Bit3 (976~999) 24 987, Bit11 (969~992) 24 980,
3552 13:42:17.821000 TX Bit4 (978~1004) 27 991, Bit12 (970~992) 23 981,
3553 13:42:17.827753 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3554 13:42:17.830984 TX Bit6 (978~1004) 27 991, Bit14 (969~992) 24 980,
3555 13:42:17.837252 TX Bit7 (979~1003) 25 991, Bit15 (963~987) 25 975,
3556 13:42:17.837326
3557 13:42:17.837387 Write Rank1 MR14 =0x1e
3558 13:42:17.849105
3559 13:42:17.851980 CH=1, VrefRange= 0, VrefLevel = 30
3560 13:42:17.855526 TX Bit0 (979~1005) 27 992, Bit8 (967~991) 25 979,
3561 13:42:17.858753 TX Bit1 (978~1004) 27 991, Bit9 (967~990) 24 978,
3562 13:42:17.865713 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3563 13:42:17.868519 TX Bit3 (976~999) 24 987, Bit11 (969~992) 24 980,
3564 13:42:17.872277 TX Bit4 (978~1004) 27 991, Bit12 (970~992) 23 981,
3565 13:42:17.878650 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3566 13:42:17.882108 TX Bit6 (978~1004) 27 991, Bit14 (969~992) 24 980,
3567 13:42:17.888795 TX Bit7 (979~1003) 25 991, Bit15 (963~987) 25 975,
3568 13:42:17.888878
3569 13:42:17.888944 Write Rank1 MR14 =0x20
3570 13:42:17.899774
3571 13:42:17.903190 CH=1, VrefRange= 0, VrefLevel = 32
3572 13:42:17.906847 TX Bit0 (979~1006) 28 992, Bit8 (967~990) 24 978,
3573 13:42:17.909597 TX Bit1 (978~1004) 27 991, Bit9 (967~990) 24 978,
3574 13:42:17.916957 TX Bit2 (977~1002) 26 989, Bit10 (969~992) 24 980,
3575 13:42:17.919991 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3576 13:42:17.923258 TX Bit4 (979~1004) 26 991, Bit12 (969~993) 25 981,
3577 13:42:17.929799 TX Bit5 (980~1005) 26 992, Bit13 (969~992) 24 980,
3578 13:42:17.933347 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3579 13:42:17.939786 TX Bit7 (979~1004) 26 991, Bit15 (962~987) 26 974,
3580 13:42:17.939949
3581 13:42:17.940065 Write Rank1 MR14 =0x22
3582 13:42:17.951240
3583 13:42:17.954605 CH=1, VrefRange= 0, VrefLevel = 34
3584 13:42:17.958070 TX Bit0 (979~1006) 28 992, Bit8 (967~990) 24 978,
3585 13:42:17.961090 TX Bit1 (978~1004) 27 991, Bit9 (967~990) 24 978,
3586 13:42:17.967885 TX Bit2 (977~1002) 26 989, Bit10 (969~992) 24 980,
3587 13:42:17.970790 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3588 13:42:17.974364 TX Bit4 (979~1004) 26 991, Bit12 (969~993) 25 981,
3589 13:42:17.981408 TX Bit5 (980~1005) 26 992, Bit13 (969~992) 24 980,
3590 13:42:17.984334 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3591 13:42:17.990840 TX Bit7 (979~1004) 26 991, Bit15 (962~987) 26 974,
3592 13:42:17.990923
3593 13:42:17.990988 Write Rank1 MR14 =0x24
3594 13:42:18.001841
3595 13:42:18.005320 CH=1, VrefRange= 0, VrefLevel = 36
3596 13:42:18.008756 TX Bit0 (979~1006) 28 992, Bit8 (967~990) 24 978,
3597 13:42:18.012290 TX Bit1 (978~1004) 27 991, Bit9 (967~990) 24 978,
3598 13:42:18.018681 TX Bit2 (977~1002) 26 989, Bit10 (969~992) 24 980,
3599 13:42:18.022103 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3600 13:42:18.025420 TX Bit4 (979~1004) 26 991, Bit12 (969~993) 25 981,
3601 13:42:18.032296 TX Bit5 (980~1005) 26 992, Bit13 (969~992) 24 980,
3602 13:42:18.035173 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3603 13:42:18.041920 TX Bit7 (979~1004) 26 991, Bit15 (962~987) 26 974,
3604 13:42:18.042188
3605 13:42:18.042390 Write Rank1 MR14 =0x26
3606 13:42:18.052966
3607 13:42:18.056054 CH=1, VrefRange= 0, VrefLevel = 38
3608 13:42:18.059477 TX Bit0 (979~1006) 28 992, Bit8 (967~990) 24 978,
3609 13:42:18.063261 TX Bit1 (978~1004) 27 991, Bit9 (967~990) 24 978,
3610 13:42:18.069534 TX Bit2 (977~1002) 26 989, Bit10 (969~992) 24 980,
3611 13:42:18.073019 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3612 13:42:18.076405 TX Bit4 (979~1004) 26 991, Bit12 (969~993) 25 981,
3613 13:42:18.082928 TX Bit5 (980~1005) 26 992, Bit13 (969~992) 24 980,
3614 13:42:18.086361 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3615 13:42:18.092696 TX Bit7 (979~1004) 26 991, Bit15 (962~987) 26 974,
3616 13:42:18.092788
3617 13:42:18.092857
3618 13:42:18.096135 TX Vref found, early break! 385< 387
3619 13:42:18.099573 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3620 13:42:18.102721 u1DelayCellOfst[0]=6 cells (5 PI)
3621 13:42:18.106578 u1DelayCellOfst[1]=5 cells (4 PI)
3622 13:42:18.109469 u1DelayCellOfst[2]=2 cells (2 PI)
3623 13:42:18.113082 u1DelayCellOfst[3]=0 cells (0 PI)
3624 13:42:18.116118 u1DelayCellOfst[4]=5 cells (4 PI)
3625 13:42:18.119614 u1DelayCellOfst[5]=6 cells (5 PI)
3626 13:42:18.123150 u1DelayCellOfst[6]=5 cells (4 PI)
3627 13:42:18.123334 u1DelayCellOfst[7]=5 cells (4 PI)
3628 13:42:18.126412 Byte0, DQ PI dly=987, DQM PI dly= 989
3629 13:42:18.132514 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
3630 13:42:18.132777
3631 13:42:18.136517 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
3632 13:42:18.136874
3633 13:42:18.139327 u1DelayCellOfst[8]=5 cells (4 PI)
3634 13:42:18.142807 u1DelayCellOfst[9]=5 cells (4 PI)
3635 13:42:18.146269 u1DelayCellOfst[10]=7 cells (6 PI)
3636 13:42:18.149760 u1DelayCellOfst[11]=9 cells (7 PI)
3637 13:42:18.152945 u1DelayCellOfst[12]=9 cells (7 PI)
3638 13:42:18.156255 u1DelayCellOfst[13]=7 cells (6 PI)
3639 13:42:18.159501 u1DelayCellOfst[14]=7 cells (6 PI)
3640 13:42:18.162793 u1DelayCellOfst[15]=0 cells (0 PI)
3641 13:42:18.166214 Byte1, DQ PI dly=974, DQM PI dly= 977
3642 13:42:18.169869 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
3643 13:42:18.170322
3644 13:42:18.172870 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
3645 13:42:18.173372
3646 13:42:18.176587 Write Rank1 MR14 =0x20
3647 13:42:18.177236
3648 13:42:18.179975 Final TX Range 0 Vref 32
3649 13:42:18.180427
3650 13:42:18.186182 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3651 13:42:18.186626
3652 13:42:18.192740 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3653 13:42:18.199684 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3654 13:42:18.206482 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3655 13:42:18.206947 Write Rank1 MR3 =0xb0
3656 13:42:18.209485 DramC Write-DBI on
3657 13:42:18.209894 ==
3658 13:42:18.216747 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3659 13:42:18.217239 fsp= 1, odt_onoff= 1, Byte mode= 0
3660 13:42:18.219976 ==
3661 13:42:18.222724 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3662 13:42:18.223135
3663 13:42:18.226265 Begin, DQ Scan Range 697~761
3664 13:42:18.226786
3665 13:42:18.227110
3666 13:42:18.227394 TX Vref Scan disable
3667 13:42:18.229921 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3668 13:42:18.232919 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3669 13:42:18.239284 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3670 13:42:18.242954 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3671 13:42:18.246568 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3672 13:42:18.249315 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3673 13:42:18.252676 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3674 13:42:18.256204 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3675 13:42:18.259404 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3676 13:42:18.262578 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3677 13:42:18.266257 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3678 13:42:18.269503 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3679 13:42:18.272937 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3680 13:42:18.275839 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
3681 13:42:18.279324 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3682 13:42:18.283131 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3683 13:42:18.285903 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3684 13:42:18.289517 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3685 13:42:18.292981 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3686 13:42:18.295996 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3687 13:42:18.299679 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3688 13:42:18.302553 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3689 13:42:18.309385 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3690 13:42:18.312369 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3691 13:42:18.315774 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3692 13:42:18.319290 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3693 13:42:18.322591 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3694 13:42:18.329304 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3695 13:42:18.332506 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3696 13:42:18.335386 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3697 13:42:18.339037 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3698 13:42:18.342604 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3699 13:42:18.345422 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3700 13:42:18.349005 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3701 13:42:18.352158 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3702 13:42:18.355668 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3703 13:42:18.358904 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3704 13:42:18.362383 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3705 13:42:18.365361 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3706 13:42:18.368829 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3707 13:42:18.372558 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3708 13:42:18.375468 Byte0, DQ PI dly=736, DQM PI dly= 736
3709 13:42:18.382077 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
3710 13:42:18.382584
3711 13:42:18.385385 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
3712 13:42:18.385865
3713 13:42:18.388579 Byte1, DQ PI dly=722, DQM PI dly= 722
3714 13:42:18.391733 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
3715 13:42:18.394885
3716 13:42:18.398202 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
3717 13:42:18.398582
3718 13:42:18.405281 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3719 13:42:18.411530 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3720 13:42:18.418406 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3721 13:42:18.421815 Write Rank1 MR3 =0x30
3722 13:42:18.422213 DramC Write-DBI off
3723 13:42:18.422513
3724 13:42:18.422806 [DATLAT]
3725 13:42:18.425533 Freq=1600, CH1 RK1, use_rxtx_scan=0
3726 13:42:18.425930
3727 13:42:18.428768 DATLAT Default: 0x10
3728 13:42:18.432333 7, 0xFFFF, sum=0
3729 13:42:18.432775 8, 0xFFFF, sum=0
3730 13:42:18.433081 9, 0xFFFF, sum=0
3731 13:42:18.435201 10, 0xFFFF, sum=0
3732 13:42:18.435584 11, 0xFFFF, sum=0
3733 13:42:18.438614 12, 0xFFFF, sum=0
3734 13:42:18.439017 13, 0xFFFF, sum=0
3735 13:42:18.441836 14, 0x0, sum=1
3736 13:42:18.442244 15, 0x0, sum=2
3737 13:42:18.445010 16, 0x0, sum=3
3738 13:42:18.445410 17, 0x0, sum=4
3739 13:42:18.448635 pattern=2 first_step=14 total pass=5 best_step=16
3740 13:42:18.451945 ==
3741 13:42:18.455456 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3742 13:42:18.458695 fsp= 1, odt_onoff= 1, Byte mode= 0
3743 13:42:18.459136 ==
3744 13:42:18.461757 Start DQ dly to find pass range UseTestEngine =1
3745 13:42:18.464574 x-axis: bit #, y-axis: DQ dly (-127~63)
3746 13:42:18.468075 RX Vref Scan = 0
3747 13:42:18.471772 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3748 13:42:18.474934 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3749 13:42:18.475018 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3750 13:42:18.478212 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3751 13:42:18.481624 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3752 13:42:18.484937 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3753 13:42:18.488382 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3754 13:42:18.491325 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3755 13:42:18.494846 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3756 13:42:18.498060 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3757 13:42:18.501317 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3758 13:42:18.501430 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3759 13:42:18.504829 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3760 13:42:18.507781 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3761 13:42:18.511392 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3762 13:42:18.514783 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3763 13:42:18.517853 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3764 13:42:18.521159 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3765 13:42:18.524726 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3766 13:42:18.524991 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3767 13:42:18.528093 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3768 13:42:18.531910 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3769 13:42:18.534593 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3770 13:42:18.538014 -3, [0] xxxoxxxx xxxxxxxo [MSB]
3771 13:42:18.541427 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3772 13:42:18.544991 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3773 13:42:18.545347 0, [0] xxooxxxx ooxxxxxo [MSB]
3774 13:42:18.548221 1, [0] xxooxxxx ooxxxxxo [MSB]
3775 13:42:18.551325 2, [0] xxooxxxx ooxxxxxo [MSB]
3776 13:42:18.554549 3, [0] xxooxxxo ooxxxxxo [MSB]
3777 13:42:18.558116 4, [0] oxoooxxo ooooooxo [MSB]
3778 13:42:18.561220 32, [0] oooooooo ooooooox [MSB]
3779 13:42:18.564442 33, [0] oooooooo ooooooox [MSB]
3780 13:42:18.568158 34, [0] oooooooo ooooooox [MSB]
3781 13:42:18.571133 35, [0] oooxoooo oxooooox [MSB]
3782 13:42:18.574512 36, [0] oooxoooo xxooooox [MSB]
3783 13:42:18.577977 37, [0] ooxxoooo xxooooox [MSB]
3784 13:42:18.578524 38, [0] ooxxoooo xxooooox [MSB]
3785 13:42:18.581624 39, [0] ooxxooox xxooooox [MSB]
3786 13:42:18.584567 40, [0] oxxxxoox xxxoooox [MSB]
3787 13:42:18.587970 41, [0] xxxxxxox xxxxxxxx [MSB]
3788 13:42:18.591079 42, [0] xxxxxxxx xxxxxxxx [MSB]
3789 13:42:18.594508 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
3790 13:42:18.598003 iDelay=42, Bit 1, Center 22 (5 ~ 39) 35
3791 13:42:18.601516 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3792 13:42:18.604358 iDelay=42, Bit 3, Center 15 (-3 ~ 34) 38
3793 13:42:18.607483 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3794 13:42:18.610703 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3795 13:42:18.614443 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3796 13:42:18.617432 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3797 13:42:18.620832 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
3798 13:42:18.624316 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3799 13:42:18.630661 iDelay=42, Bit 10, Center 21 (4 ~ 39) 36
3800 13:42:18.633963 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3801 13:42:18.637401 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3802 13:42:18.640784 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
3803 13:42:18.644238 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3804 13:42:18.647694 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3805 13:42:18.647794 ==
3806 13:42:18.654325 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3807 13:42:18.657597 fsp= 1, odt_onoff= 1, Byte mode= 0
3808 13:42:18.657706 ==
3809 13:42:18.657791 DQS Delay:
3810 13:42:18.660519 DQS0 = 0, DQS1 = 0
3811 13:42:18.660628 DQM Delay:
3812 13:42:18.660733 DQM0 = 20, DQM1 = 19
3813 13:42:18.663922 DQ Delay:
3814 13:42:18.667273 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =15
3815 13:42:18.670748 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3816 13:42:18.673882 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3817 13:42:18.677026 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
3818 13:42:18.677111
3819 13:42:18.677177
3820 13:42:18.677235
3821 13:42:18.680620 [DramC_TX_OE_Calibration] TA2
3822 13:42:18.683977 Original DQ_B0 (3 6) =30, OEN = 27
3823 13:42:18.684060 Original DQ_B1 (3 6) =30, OEN = 27
3824 13:42:18.687209 23, 0x0, End_B0=23 End_B1=23
3825 13:42:18.690551 24, 0x0, End_B0=24 End_B1=24
3826 13:42:18.693450 25, 0x0, End_B0=25 End_B1=25
3827 13:42:18.696748 26, 0x0, End_B0=26 End_B1=26
3828 13:42:18.696820 27, 0x0, End_B0=27 End_B1=27
3829 13:42:18.700345 28, 0x0, End_B0=28 End_B1=28
3830 13:42:18.703699 29, 0x0, End_B0=29 End_B1=29
3831 13:42:18.707246 30, 0x0, End_B0=30 End_B1=30
3832 13:42:18.710016 31, 0xFFFF, End_B0=30 End_B1=30
3833 13:42:18.713635 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3834 13:42:18.720539 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3835 13:42:18.720621
3836 13:42:18.720686
3837 13:42:18.723663 Write Rank1 MR23 =0x3f
3838 13:42:18.723730 [DQSOSC]
3839 13:42:18.729950 [DQSOSCAuto] RK1, (LSB)MR18= 0xcfcf, (MSB)MR19= 0x202, tDQSOscB0 = 438 ps tDQSOscB1 = 438 ps
3840 13:42:18.736695 CH1_RK1: MR19=0x202, MR18=0xCFCF, DQSOSC=438, MR23=63, INC=12, DEC=19
3841 13:42:18.740016 Write Rank1 MR23 =0x3f
3842 13:42:18.740089 [DQSOSC]
3843 13:42:18.746797 [DQSOSCAuto] RK1, (LSB)MR18= 0xcbcb, (MSB)MR19= 0x202, tDQSOscB0 = 440 ps tDQSOscB1 = 440 ps
3844 13:42:18.750134 CH1 RK1: MR19=202, MR18=CBCB
3845 13:42:18.753593 [RxdqsGatingPostProcess] freq 1600
3846 13:42:18.760117 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3847 13:42:18.760221 Rank: 0
3848 13:42:18.763190 best DQS0 dly(2T, 0.5T) = (2, 6)
3849 13:42:18.766451 best DQS1 dly(2T, 0.5T) = (2, 6)
3850 13:42:18.770061 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3851 13:42:18.773150 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3852 13:42:18.773223 Rank: 1
3853 13:42:18.776662 best DQS0 dly(2T, 0.5T) = (2, 5)
3854 13:42:18.780117 best DQS1 dly(2T, 0.5T) = (2, 6)
3855 13:42:18.783402 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3856 13:42:18.786498 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3857 13:42:18.789934 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3858 13:42:18.792870 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3859 13:42:18.799758 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3860 13:42:18.799866
3861 13:42:18.799958
3862 13:42:18.803384 [Calibration Summary] Freqency 1600
3863 13:42:18.803481 CH 0, Rank 0
3864 13:42:18.803569 All Pass.
3865 13:42:18.803654
3866 13:42:18.806143 CH 0, Rank 1
3867 13:42:18.806209 All Pass.
3868 13:42:18.806266
3869 13:42:18.806321 CH 1, Rank 0
3870 13:42:18.809687 All Pass.
3871 13:42:18.809751
3872 13:42:18.809805 CH 1, Rank 1
3873 13:42:18.809859 All Pass.
3874 13:42:18.809913
3875 13:42:18.817012 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3876 13:42:18.826491 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3877 13:42:18.832972 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3878 13:42:18.833049 Write Rank0 MR3 =0xb0
3879 13:42:18.839380 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3880 13:42:18.846337 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3881 13:42:18.852835 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3882 13:42:18.856042 Write Rank1 MR3 =0xb0
3883 13:42:18.862826 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3884 13:42:18.869399 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3885 13:42:18.876246 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3886 13:42:18.879163 Write Rank0 MR3 =0xb0
3887 13:42:18.886034 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3888 13:42:18.892964 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3889 13:42:18.899321 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3890 13:42:18.902474 Write Rank1 MR3 =0xb0
3891 13:42:18.902548 DramC Write-DBI on
3892 13:42:18.905718 [GetDramInforAfterCalByMRR] Vendor 6.
3893 13:42:18.909107 [GetDramInforAfterCalByMRR] Revision 505.
3894 13:42:18.912238 MR8 1111
3895 13:42:18.915575 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3896 13:42:18.915653 MR8 1111
3897 13:42:18.922493 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3898 13:42:18.922577 MR8 1111
3899 13:42:18.925472 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3900 13:42:18.929084 MR8 1111
3901 13:42:18.932521 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3902 13:42:18.942360 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3903 13:42:18.942437 Write Rank0 MR13 =0xd0
3904 13:42:18.945665 Write Rank1 MR13 =0xd0
3905 13:42:18.948576 Write Rank0 MR13 =0xd0
3906 13:42:18.948682 Write Rank1 MR13 =0xd0
3907 13:42:18.952145 Save calibration result to emmc
3908 13:42:18.952215
3909 13:42:18.952279
3910 13:42:18.955709 [DramcModeReg_Check] Freq_1600, FSP_1
3911 13:42:18.958641 FSP_1, CH_0, RK0
3912 13:42:18.958711 Write Rank0 MR13 =0xd8
3913 13:42:18.961964 MR12 = 0x5e (global = 0x5e) match
3914 13:42:18.965557 MR14 = 0x1a (global = 0x1a) match
3915 13:42:18.968590 FSP_1, CH_0, RK1
3916 13:42:18.968671 Write Rank1 MR13 =0xd8
3917 13:42:18.971867 MR12 = 0x5c (global = 0x5c) match
3918 13:42:18.975082 MR14 = 0x1e (global = 0x1e) match
3919 13:42:18.978457 FSP_1, CH_1, RK0
3920 13:42:18.978563 Write Rank0 MR13 =0xd8
3921 13:42:18.981665 MR12 = 0x60 (global = 0x60) match
3922 13:42:18.985050 MR14 = 0x20 (global = 0x20) match
3923 13:42:18.988663 FSP_1, CH_1, RK1
3924 13:42:18.988738 Write Rank1 MR13 =0xd8
3925 13:42:18.992195 MR12 = 0x5c (global = 0x5c) match
3926 13:42:18.995555 MR14 = 0x20 (global = 0x20) match
3927 13:42:18.995628
3928 13:42:19.002169 [MEM_TEST] 02: After DFS, before run time config
3929 13:42:19.011851 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3930 13:42:19.011930
3931 13:42:19.011998 [TA2_TEST]
3932 13:42:19.012060 === TA2 HW
3933 13:42:19.015081 TA2 PAT: XTALK
3934 13:42:19.018966 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3935 13:42:19.025399 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3936 13:42:19.028538 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3937 13:42:19.032017 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3938 13:42:19.032125
3939 13:42:19.035529
3940 13:42:19.035601 Settings after calibration
3941 13:42:19.035680
3942 13:42:19.038591 [DramcRunTimeConfig]
3943 13:42:19.042021 TransferPLLToSPMControl - MODE SW PHYPLL
3944 13:42:19.042119 TX_TRACKING: ON
3945 13:42:19.045326 RX_TRACKING: ON
3946 13:42:19.045452 HW_GATING: ON
3947 13:42:19.048835 HW_GATING DBG: OFF
3948 13:42:19.048941 ddr_geometry:1
3949 13:42:19.051850 ddr_geometry:1
3950 13:42:19.051968 ddr_geometry:1
3951 13:42:19.052059 ddr_geometry:1
3952 13:42:19.055094 ddr_geometry:1
3953 13:42:19.055211 ddr_geometry:1
3954 13:42:19.058678 ddr_geometry:1
3955 13:42:19.058808 ddr_geometry:1
3956 13:42:19.061734 High Freq DUMMY_READ_FOR_TRACKING: ON
3957 13:42:19.065450 ZQCS_ENABLE_LP4: OFF
3958 13:42:19.068733 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3959 13:42:19.072066 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3960 13:42:19.072243 SPM_CONTROL_AFTERK: ON
3961 13:42:19.075121 IMPEDANCE_TRACKING: ON
3962 13:42:19.075301 TEMP_SENSOR: ON
3963 13:42:19.078755 PER_BANK_REFRESH: ON
3964 13:42:19.079140 HW_SAVE_FOR_SR: ON
3965 13:42:19.081897 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3966 13:42:19.085366 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3967 13:42:19.088665 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3968 13:42:19.091731 Read ODT Tracking: ON
3969 13:42:19.095399 =========================
3970 13:42:19.095831
3971 13:42:19.096162 [TA2_TEST]
3972 13:42:19.096605 === TA2 HW
3973 13:42:19.101815 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3974 13:42:19.105216 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3975 13:42:19.111944 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3976 13:42:19.114918 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3977 13:42:19.115253
3978 13:42:19.118473 [MEM_TEST] 03: After run time config
3979 13:42:19.130087 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3980 13:42:19.133623 [complex_mem_test] start addr:0x40024000, len:131072
3981 13:42:19.337734 1st complex R/W mem test pass
3982 13:42:19.344639 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3983 13:42:19.347537 sync preloader write leveling
3984 13:42:19.350936 sync preloader cbt_mr12
3985 13:42:19.354043 sync preloader cbt_clk_dly
3986 13:42:19.354497 sync preloader cbt_cmd_dly
3987 13:42:19.357640 sync preloader cbt_cs
3988 13:42:19.360674 sync preloader cbt_ca_perbit_delay
3989 13:42:19.361246 sync preloader clk_delay
3990 13:42:19.364052 sync preloader dqs_delay
3991 13:42:19.367114 sync preloader u1Gating2T_Save
3992 13:42:19.370633 sync preloader u1Gating05T_Save
3993 13:42:19.374379 sync preloader u1Gatingfine_tune_Save
3994 13:42:19.377286 sync preloader u1Gatingucpass_count_Save
3995 13:42:19.380603 sync preloader u1TxWindowPerbitVref_Save
3996 13:42:19.384333 sync preloader u1TxCenter_min_Save
3997 13:42:19.387879 sync preloader u1TxCenter_max_Save
3998 13:42:19.390436 sync preloader u1Txwin_center_Save
3999 13:42:19.393754 sync preloader u1Txfirst_pass_Save
4000 13:42:19.397264 sync preloader u1Txlast_pass_Save
4001 13:42:19.400553 sync preloader u1RxDatlat_Save
4002 13:42:19.400934 sync preloader u1RxWinPerbitVref_Save
4003 13:42:19.407721 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4004 13:42:19.410850 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4005 13:42:19.413689 sync preloader delay_cell_unit
4006 13:42:19.420805 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4007 13:42:19.424046 sync preloader write leveling
4008 13:42:19.424474 sync preloader cbt_mr12
4009 13:42:19.427364 sync preloader cbt_clk_dly
4010 13:42:19.430684 sync preloader cbt_cmd_dly
4011 13:42:19.431120 sync preloader cbt_cs
4012 13:42:19.433807 sync preloader cbt_ca_perbit_delay
4013 13:42:19.437235 sync preloader clk_delay
4014 13:42:19.440904 sync preloader dqs_delay
4015 13:42:19.441347 sync preloader u1Gating2T_Save
4016 13:42:19.443766 sync preloader u1Gating05T_Save
4017 13:42:19.446809 sync preloader u1Gatingfine_tune_Save
4018 13:42:19.450308 sync preloader u1Gatingucpass_count_Save
4019 13:42:19.457242 sync preloader u1TxWindowPerbitVref_Save
4020 13:42:19.457624 sync preloader u1TxCenter_min_Save
4021 13:42:19.460638 sync preloader u1TxCenter_max_Save
4022 13:42:19.464081 sync preloader u1Txwin_center_Save
4023 13:42:19.467122 sync preloader u1Txfirst_pass_Save
4024 13:42:19.470671 sync preloader u1Txlast_pass_Save
4025 13:42:19.473589 sync preloader u1RxDatlat_Save
4026 13:42:19.477477 sync preloader u1RxWinPerbitVref_Save
4027 13:42:19.480361 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4028 13:42:19.486855 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4029 13:42:19.487260 sync preloader delay_cell_unit
4030 13:42:19.493558 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4031 13:42:19.496876 sync preloader write leveling
4032 13:42:19.500023 sync preloader cbt_mr12
4033 13:42:19.503668 sync preloader cbt_clk_dly
4034 13:42:19.504173 sync preloader cbt_cmd_dly
4035 13:42:19.506708 sync preloader cbt_cs
4036 13:42:19.510154 sync preloader cbt_ca_perbit_delay
4037 13:42:19.513456 sync preloader clk_delay
4038 13:42:19.513904 sync preloader dqs_delay
4039 13:42:19.516869 sync preloader u1Gating2T_Save
4040 13:42:19.520246 sync preloader u1Gating05T_Save
4041 13:42:19.523350 sync preloader u1Gatingfine_tune_Save
4042 13:42:19.526548 sync preloader u1Gatingucpass_count_Save
4043 13:42:19.530043 sync preloader u1TxWindowPerbitVref_Save
4044 13:42:19.533425 sync preloader u1TxCenter_min_Save
4045 13:42:19.536685 sync preloader u1TxCenter_max_Save
4046 13:42:19.540355 sync preloader u1Txwin_center_Save
4047 13:42:19.543681 sync preloader u1Txfirst_pass_Save
4048 13:42:19.546546 sync preloader u1Txlast_pass_Save
4049 13:42:19.549982 sync preloader u1RxDatlat_Save
4050 13:42:19.553375 sync preloader u1RxWinPerbitVref_Save
4051 13:42:19.556922 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4052 13:42:19.559912 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4053 13:42:19.563186 sync preloader delay_cell_unit
4054 13:42:19.566988 just_for_test_dump_coreboot_params dump all params
4055 13:42:19.570026 dump source = 0x0
4056 13:42:19.570402 dump params frequency:1600
4057 13:42:19.573511 dump params rank number:2
4058 13:42:19.573932
4059 13:42:19.576799 dump params write leveling
4060 13:42:19.579996 write leveling[0][0][0] = 0x21
4061 13:42:19.583312 write leveling[0][0][1] = 0x18
4062 13:42:19.583827 write leveling[0][1][0] = 0x1a
4063 13:42:19.586534 write leveling[0][1][1] = 0x18
4064 13:42:19.590091 write leveling[1][0][0] = 0x21
4065 13:42:19.593026 write leveling[1][0][1] = 0x18
4066 13:42:19.596126 write leveling[1][1][0] = 0x23
4067 13:42:19.599597 write leveling[1][1][1] = 0x18
4068 13:42:19.599681 dump params cbt_cs
4069 13:42:19.602475 cbt_cs[0][0] = 0x8
4070 13:42:19.602568 cbt_cs[0][1] = 0x8
4071 13:42:19.605953 cbt_cs[1][0] = 0xb
4072 13:42:19.606036 cbt_cs[1][1] = 0xb
4073 13:42:19.609336 dump params cbt_mr12
4074 13:42:19.609420 cbt_mr12[0][0] = 0x1e
4075 13:42:19.612927 cbt_mr12[0][1] = 0x1c
4076 13:42:19.616300 cbt_mr12[1][0] = 0x20
4077 13:42:19.616398 cbt_mr12[1][1] = 0x1c
4078 13:42:19.619624 dump params tx window
4079 13:42:19.622946 tx_center_min[0][0][0] = 982
4080 13:42:19.623055 tx_center_max[0][0][0] = 989
4081 13:42:19.625860 tx_center_min[0][0][1] = 975
4082 13:42:19.629516 tx_center_max[0][0][1] = 982
4083 13:42:19.632881 tx_center_min[0][1][0] = 979
4084 13:42:19.633016 tx_center_max[0][1][0] = 986
4085 13:42:19.636363 tx_center_min[0][1][1] = 978
4086 13:42:19.639575 tx_center_max[0][1][1] = 984
4087 13:42:19.642991 tx_center_min[1][0][0] = 988
4088 13:42:19.646031 tx_center_max[1][0][0] = 993
4089 13:42:19.646216 tx_center_min[1][0][1] = 976
4090 13:42:19.649401 tx_center_max[1][0][1] = 982
4091 13:42:19.652705 tx_center_min[1][1][0] = 987
4092 13:42:19.656185 tx_center_max[1][1][0] = 992
4093 13:42:19.659586 tx_center_min[1][1][1] = 974
4094 13:42:19.660014 tx_center_max[1][1][1] = 981
4095 13:42:19.662858 dump params tx window
4096 13:42:19.665961 tx_win_center[0][0][0] = 989
4097 13:42:19.669490 tx_first_pass[0][0][0] = 977
4098 13:42:19.669973 tx_last_pass[0][0][0] = 1001
4099 13:42:19.672992 tx_win_center[0][0][1] = 988
4100 13:42:19.675835 tx_first_pass[0][0][1] = 976
4101 13:42:19.679385 tx_last_pass[0][0][1] = 1000
4102 13:42:19.679832 tx_win_center[0][0][2] = 989
4103 13:42:19.682539 tx_first_pass[0][0][2] = 977
4104 13:42:19.686068 tx_last_pass[0][0][2] = 1001
4105 13:42:19.689252 tx_win_center[0][0][3] = 982
4106 13:42:19.692564 tx_first_pass[0][0][3] = 971
4107 13:42:19.692944 tx_last_pass[0][0][3] = 994
4108 13:42:19.696078 tx_win_center[0][0][4] = 988
4109 13:42:19.699451 tx_first_pass[0][0][4] = 976
4110 13:42:19.702985 tx_last_pass[0][0][4] = 1000
4111 13:42:19.705918 tx_win_center[0][0][5] = 985
4112 13:42:19.706317 tx_first_pass[0][0][5] = 973
4113 13:42:19.709329 tx_last_pass[0][0][5] = 998
4114 13:42:19.712570 tx_win_center[0][0][6] = 987
4115 13:42:19.716060 tx_first_pass[0][0][6] = 975
4116 13:42:19.716488 tx_last_pass[0][0][6] = 999
4117 13:42:19.719488 tx_win_center[0][0][7] = 987
4118 13:42:19.722626 tx_first_pass[0][0][7] = 976
4119 13:42:19.725915 tx_last_pass[0][0][7] = 999
4120 13:42:19.729525 tx_win_center[0][0][8] = 975
4121 13:42:19.729918 tx_first_pass[0][0][8] = 963
4122 13:42:19.732451 tx_last_pass[0][0][8] = 987
4123 13:42:19.735544 tx_win_center[0][0][9] = 978
4124 13:42:19.739392 tx_first_pass[0][0][9] = 966
4125 13:42:19.739773 tx_last_pass[0][0][9] = 990
4126 13:42:19.742656 tx_win_center[0][0][10] = 982
4127 13:42:19.746009 tx_first_pass[0][0][10] = 970
4128 13:42:19.749487 tx_last_pass[0][0][10] = 994
4129 13:42:19.752406 tx_win_center[0][0][11] = 977
4130 13:42:19.755678 tx_first_pass[0][0][11] = 965
4131 13:42:19.756107 tx_last_pass[0][0][11] = 989
4132 13:42:19.759157 tx_win_center[0][0][12] = 978
4133 13:42:19.762444 tx_first_pass[0][0][12] = 967
4134 13:42:19.765501 tx_last_pass[0][0][12] = 990
4135 13:42:19.765901 tx_win_center[0][0][13] = 978
4136 13:42:19.769365 tx_first_pass[0][0][13] = 967
4137 13:42:19.772643 tx_last_pass[0][0][13] = 990
4138 13:42:19.775820 tx_win_center[0][0][14] = 979
4139 13:42:19.779475 tx_first_pass[0][0][14] = 967
4140 13:42:19.779925 tx_last_pass[0][0][14] = 991
4141 13:42:19.782811 tx_win_center[0][0][15] = 980
4142 13:42:19.785728 tx_first_pass[0][0][15] = 969
4143 13:42:19.789263 tx_last_pass[0][0][15] = 992
4144 13:42:19.792254 tx_win_center[0][1][0] = 986
4145 13:42:19.792737 tx_first_pass[0][1][0] = 974
4146 13:42:19.795986 tx_last_pass[0][1][0] = 998
4147 13:42:19.799474 tx_win_center[0][1][1] = 984
4148 13:42:19.802383 tx_first_pass[0][1][1] = 972
4149 13:42:19.805944 tx_last_pass[0][1][1] = 996
4150 13:42:19.806520 tx_win_center[0][1][2] = 985
4151 13:42:19.809008 tx_first_pass[0][1][2] = 974
4152 13:42:19.812238 tx_last_pass[0][1][2] = 997
4153 13:42:19.815599 tx_win_center[0][1][3] = 979
4154 13:42:19.815772 tx_first_pass[0][1][3] = 967
4155 13:42:19.818994 tx_last_pass[0][1][3] = 991
4156 13:42:19.821925 tx_win_center[0][1][4] = 983
4157 13:42:19.825570 tx_first_pass[0][1][4] = 970
4158 13:42:19.828980 tx_last_pass[0][1][4] = 996
4159 13:42:19.829180 tx_win_center[0][1][5] = 981
4160 13:42:19.831873 tx_first_pass[0][1][5] = 969
4161 13:42:19.835429 tx_last_pass[0][1][5] = 993
4162 13:42:19.838240 tx_win_center[0][1][6] = 982
4163 13:42:19.841979 tx_first_pass[0][1][6] = 970
4164 13:42:19.842070 tx_last_pass[0][1][6] = 995
4165 13:42:19.845018 tx_win_center[0][1][7] = 983
4166 13:42:19.848289 tx_first_pass[0][1][7] = 970
4167 13:42:19.851775 tx_last_pass[0][1][7] = 996
4168 13:42:19.851856 tx_win_center[0][1][8] = 978
4169 13:42:19.855105 tx_first_pass[0][1][8] = 966
4170 13:42:19.858554 tx_last_pass[0][1][8] = 990
4171 13:42:19.861705 tx_win_center[0][1][9] = 979
4172 13:42:19.861782 tx_first_pass[0][1][9] = 968
4173 13:42:19.865255 tx_last_pass[0][1][9] = 991
4174 13:42:19.868532 tx_win_center[0][1][10] = 984
4175 13:42:19.872021 tx_first_pass[0][1][10] = 972
4176 13:42:19.874877 tx_last_pass[0][1][10] = 997
4177 13:42:19.874965 tx_win_center[0][1][11] = 978
4178 13:42:19.878493 tx_first_pass[0][1][11] = 967
4179 13:42:19.881646 tx_last_pass[0][1][11] = 990
4180 13:42:19.885381 tx_win_center[0][1][12] = 980
4181 13:42:19.888528 tx_first_pass[0][1][12] = 968
4182 13:42:19.888696 tx_last_pass[0][1][12] = 992
4183 13:42:19.892428 tx_win_center[0][1][13] = 980
4184 13:42:19.895362 tx_first_pass[0][1][13] = 969
4185 13:42:19.898874 tx_last_pass[0][1][13] = 991
4186 13:42:19.901693 tx_win_center[0][1][14] = 980
4187 13:42:19.901843 tx_first_pass[0][1][14] = 968
4188 13:42:19.905582 tx_last_pass[0][1][14] = 992
4189 13:42:19.908420 tx_win_center[0][1][15] = 983
4190 13:42:19.911870 tx_first_pass[0][1][15] = 971
4191 13:42:19.915300 tx_last_pass[0][1][15] = 995
4192 13:42:19.915522 tx_win_center[1][0][0] = 993
4193 13:42:19.918838 tx_first_pass[1][0][0] = 980
4194 13:42:19.922035 tx_last_pass[1][0][0] = 1006
4195 13:42:19.925580 tx_win_center[1][0][1] = 991
4196 13:42:19.929076 tx_first_pass[1][0][1] = 978
4197 13:42:19.929477 tx_last_pass[1][0][1] = 1004
4198 13:42:19.932048 tx_win_center[1][0][2] = 989
4199 13:42:19.935536 tx_first_pass[1][0][2] = 977
4200 13:42:19.938988 tx_last_pass[1][0][2] = 1002
4201 13:42:19.942373 tx_win_center[1][0][3] = 988
4202 13:42:19.942825 tx_first_pass[1][0][3] = 976
4203 13:42:19.945909 tx_last_pass[1][0][3] = 1000
4204 13:42:19.948920 tx_win_center[1][0][4] = 991
4205 13:42:19.952549 tx_first_pass[1][0][4] = 979
4206 13:42:19.952962 tx_last_pass[1][0][4] = 1004
4207 13:42:19.955178 tx_win_center[1][0][5] = 992
4208 13:42:19.958728 tx_first_pass[1][0][5] = 979
4209 13:42:19.961838 tx_last_pass[1][0][5] = 1006
4210 13:42:19.965541 tx_win_center[1][0][6] = 991
4211 13:42:19.965942 tx_first_pass[1][0][6] = 978
4212 13:42:19.968757 tx_last_pass[1][0][6] = 1005
4213 13:42:19.971907 tx_win_center[1][0][7] = 991
4214 13:42:19.975199 tx_first_pass[1][0][7] = 978
4215 13:42:19.978990 tx_last_pass[1][0][7] = 1004
4216 13:42:19.979389 tx_win_center[1][0][8] = 979
4217 13:42:19.982287 tx_first_pass[1][0][8] = 968
4218 13:42:19.985350 tx_last_pass[1][0][8] = 991
4219 13:42:19.988748 tx_win_center[1][0][9] = 979
4220 13:42:19.989151 tx_first_pass[1][0][9] = 968
4221 13:42:19.992149 tx_last_pass[1][0][9] = 991
4222 13:42:19.995292 tx_win_center[1][0][10] = 981
4223 13:42:19.998718 tx_first_pass[1][0][10] = 970
4224 13:42:20.002115 tx_last_pass[1][0][10] = 993
4225 13:42:20.002493 tx_win_center[1][0][11] = 982
4226 13:42:20.005425 tx_first_pass[1][0][11] = 970
4227 13:42:20.008907 tx_last_pass[1][0][11] = 994
4228 13:42:20.012062 tx_win_center[1][0][12] = 981
4229 13:42:20.015689 tx_first_pass[1][0][12] = 970
4230 13:42:20.016147 tx_last_pass[1][0][12] = 993
4231 13:42:20.018930 tx_win_center[1][0][13] = 982
4232 13:42:20.022401 tx_first_pass[1][0][13] = 971
4233 13:42:20.025164 tx_last_pass[1][0][13] = 994
4234 13:42:20.028687 tx_win_center[1][0][14] = 982
4235 13:42:20.029087 tx_first_pass[1][0][14] = 971
4236 13:42:20.032110 tx_last_pass[1][0][14] = 993
4237 13:42:20.035492 tx_win_center[1][0][15] = 976
4238 13:42:20.038528 tx_first_pass[1][0][15] = 965
4239 13:42:20.041953 tx_last_pass[1][0][15] = 987
4240 13:42:20.042379 tx_win_center[1][1][0] = 992
4241 13:42:20.044762 tx_first_pass[1][1][0] = 979
4242 13:42:20.048281 tx_last_pass[1][1][0] = 1006
4243 13:42:20.051530 tx_win_center[1][1][1] = 991
4244 13:42:20.054892 tx_first_pass[1][1][1] = 978
4245 13:42:20.055292 tx_last_pass[1][1][1] = 1004
4246 13:42:20.058292 tx_win_center[1][1][2] = 989
4247 13:42:20.061759 tx_first_pass[1][1][2] = 977
4248 13:42:20.064884 tx_last_pass[1][1][2] = 1002
4249 13:42:20.068239 tx_win_center[1][1][3] = 987
4250 13:42:20.068783 tx_first_pass[1][1][3] = 975
4251 13:42:20.071502 tx_last_pass[1][1][3] = 999
4252 13:42:20.074662 tx_win_center[1][1][4] = 991
4253 13:42:20.077783 tx_first_pass[1][1][4] = 979
4254 13:42:20.081294 tx_last_pass[1][1][4] = 1004
4255 13:42:20.081693 tx_win_center[1][1][5] = 992
4256 13:42:20.084448 tx_first_pass[1][1][5] = 980
4257 13:42:20.087891 tx_last_pass[1][1][5] = 1005
4258 13:42:20.091238 tx_win_center[1][1][6] = 991
4259 13:42:20.094342 tx_first_pass[1][1][6] = 978
4260 13:42:20.094746 tx_last_pass[1][1][6] = 1005
4261 13:42:20.097673 tx_win_center[1][1][7] = 991
4262 13:42:20.101257 tx_first_pass[1][1][7] = 979
4263 13:42:20.104565 tx_last_pass[1][1][7] = 1004
4264 13:42:20.104966 tx_win_center[1][1][8] = 978
4265 13:42:20.107462 tx_first_pass[1][1][8] = 967
4266 13:42:20.110921 tx_last_pass[1][1][8] = 990
4267 13:42:20.114225 tx_win_center[1][1][9] = 978
4268 13:42:20.117435 tx_first_pass[1][1][9] = 967
4269 13:42:20.117813 tx_last_pass[1][1][9] = 990
4270 13:42:20.120839 tx_win_center[1][1][10] = 980
4271 13:42:20.124258 tx_first_pass[1][1][10] = 969
4272 13:42:20.127568 tx_last_pass[1][1][10] = 992
4273 13:42:20.130995 tx_win_center[1][1][11] = 981
4274 13:42:20.131395 tx_first_pass[1][1][11] = 969
4275 13:42:20.134395 tx_last_pass[1][1][11] = 993
4276 13:42:20.137903 tx_win_center[1][1][12] = 981
4277 13:42:20.140737 tx_first_pass[1][1][12] = 969
4278 13:42:20.144229 tx_last_pass[1][1][12] = 993
4279 13:42:20.144540 tx_win_center[1][1][13] = 980
4280 13:42:20.147590 tx_first_pass[1][1][13] = 969
4281 13:42:20.150552 tx_last_pass[1][1][13] = 992
4282 13:42:20.154154 tx_win_center[1][1][14] = 980
4283 13:42:20.157440 tx_first_pass[1][1][14] = 969
4284 13:42:20.157722 tx_last_pass[1][1][14] = 992
4285 13:42:20.160655 tx_win_center[1][1][15] = 974
4286 13:42:20.164139 tx_first_pass[1][1][15] = 962
4287 13:42:20.167665 tx_last_pass[1][1][15] = 987
4288 13:42:20.167936 dump params rx window
4289 13:42:20.171092 rx_firspass[0][0][0] = 5
4290 13:42:20.173912 rx_lastpass[0][0][0] = 38
4291 13:42:20.177180 rx_firspass[0][0][1] = 5
4292 13:42:20.177485 rx_lastpass[0][0][1] = 36
4293 13:42:20.180492 rx_firspass[0][0][2] = 6
4294 13:42:20.184044 rx_lastpass[0][0][2] = 36
4295 13:42:20.184349 rx_firspass[0][0][3] = -2
4296 13:42:20.187335 rx_lastpass[0][0][3] = 31
4297 13:42:20.190773 rx_firspass[0][0][4] = 5
4298 13:42:20.193786 rx_lastpass[0][0][4] = 37
4299 13:42:20.194067 rx_firspass[0][0][5] = 1
4300 13:42:20.196850 rx_lastpass[0][0][5] = 32
4301 13:42:20.200296 rx_firspass[0][0][6] = 3
4302 13:42:20.200631 rx_lastpass[0][0][6] = 34
4303 13:42:20.203712 rx_firspass[0][0][7] = 4
4304 13:42:20.206766 rx_lastpass[0][0][7] = 36
4305 13:42:20.207029 rx_firspass[0][0][8] = -3
4306 13:42:20.210615 rx_lastpass[0][0][8] = 33
4307 13:42:20.214202 rx_firspass[0][0][9] = 0
4308 13:42:20.216835 rx_lastpass[0][0][9] = 32
4309 13:42:20.217105 rx_firspass[0][0][10] = 8
4310 13:42:20.220133 rx_lastpass[0][0][10] = 41
4311 13:42:20.223474 rx_firspass[0][0][11] = 1
4312 13:42:20.223744 rx_lastpass[0][0][11] = 32
4313 13:42:20.226917 rx_firspass[0][0][12] = 2
4314 13:42:20.230151 rx_lastpass[0][0][12] = 36
4315 13:42:20.233551 rx_firspass[0][0][13] = 3
4316 13:42:20.233930 rx_lastpass[0][0][13] = 33
4317 13:42:20.236780 rx_firspass[0][0][14] = 2
4318 13:42:20.240297 rx_lastpass[0][0][14] = 37
4319 13:42:20.243249 rx_firspass[0][0][15] = 6
4320 13:42:20.243610 rx_lastpass[0][0][15] = 37
4321 13:42:20.246708 rx_firspass[0][1][0] = 6
4322 13:42:20.250112 rx_lastpass[0][1][0] = 40
4323 13:42:20.250381 rx_firspass[0][1][1] = 5
4324 13:42:20.253462 rx_lastpass[0][1][1] = 38
4325 13:42:20.256992 rx_firspass[0][1][2] = 6
4326 13:42:20.257264 rx_lastpass[0][1][2] = 38
4327 13:42:20.260410 rx_firspass[0][1][3] = -2
4328 13:42:20.263292 rx_lastpass[0][1][3] = 33
4329 13:42:20.266996 rx_firspass[0][1][4] = 5
4330 13:42:20.267347 rx_lastpass[0][1][4] = 39
4331 13:42:20.270112 rx_firspass[0][1][5] = 1
4332 13:42:20.273368 rx_lastpass[0][1][5] = 34
4333 13:42:20.273766 rx_firspass[0][1][6] = 3
4334 13:42:20.276703 rx_lastpass[0][1][6] = 37
4335 13:42:20.280221 rx_firspass[0][1][7] = 3
4336 13:42:20.283506 rx_lastpass[0][1][7] = 38
4337 13:42:20.283887 rx_firspass[0][1][8] = -3
4338 13:42:20.286781 rx_lastpass[0][1][8] = 32
4339 13:42:20.290373 rx_firspass[0][1][9] = 1
4340 13:42:20.290754 rx_lastpass[0][1][9] = 36
4341 13:42:20.293745 rx_firspass[0][1][10] = 7
4342 13:42:20.296608 rx_lastpass[0][1][10] = 43
4343 13:42:20.300078 rx_firspass[0][1][11] = -2
4344 13:42:20.300495 rx_lastpass[0][1][11] = 34
4345 13:42:20.303255 rx_firspass[0][1][12] = 1
4346 13:42:20.306658 rx_lastpass[0][1][12] = 37
4347 13:42:20.307039 rx_firspass[0][1][13] = 1
4348 13:42:20.310073 rx_lastpass[0][1][13] = 35
4349 13:42:20.313279 rx_firspass[0][1][14] = 3
4350 13:42:20.316992 rx_lastpass[0][1][14] = 38
4351 13:42:20.317381 rx_firspass[0][1][15] = 6
4352 13:42:20.319919 rx_lastpass[0][1][15] = 39
4353 13:42:20.323477 rx_firspass[1][0][0] = 5
4354 13:42:20.326513 rx_lastpass[1][0][0] = 39
4355 13:42:20.327039 rx_firspass[1][0][1] = 5
4356 13:42:20.329777 rx_lastpass[1][0][1] = 38
4357 13:42:20.333535 rx_firspass[1][0][2] = 2
4358 13:42:20.333915 rx_lastpass[1][0][2] = 36
4359 13:42:20.336327 rx_firspass[1][0][3] = 0
4360 13:42:20.339856 rx_lastpass[1][0][3] = 33
4361 13:42:20.340245 rx_firspass[1][0][4] = 5
4362 13:42:20.343101 rx_lastpass[1][0][4] = 38
4363 13:42:20.346338 rx_firspass[1][0][5] = 7
4364 13:42:20.346840 rx_lastpass[1][0][5] = 39
4365 13:42:20.349886 rx_firspass[1][0][6] = 7
4366 13:42:20.353623 rx_lastpass[1][0][6] = 40
4367 13:42:20.356508 rx_firspass[1][0][7] = 4
4368 13:42:20.357025 rx_lastpass[1][0][7] = 38
4369 13:42:20.359879 rx_firspass[1][0][8] = 1
4370 13:42:20.363310 rx_lastpass[1][0][8] = 33
4371 13:42:20.363688 rx_firspass[1][0][9] = 0
4372 13:42:20.366846 rx_lastpass[1][0][9] = 32
4373 13:42:20.369728 rx_firspass[1][0][10] = 5
4374 13:42:20.372921 rx_lastpass[1][0][10] = 35
4375 13:42:20.373304 rx_firspass[1][0][11] = 5
4376 13:42:20.376562 rx_lastpass[1][0][11] = 38
4377 13:42:20.380021 rx_firspass[1][0][12] = 6
4378 13:42:20.380401 rx_lastpass[1][0][12] = 38
4379 13:42:20.383545 rx_firspass[1][0][13] = 6
4380 13:42:20.386831 rx_lastpass[1][0][13] = 37
4381 13:42:20.389769 rx_firspass[1][0][14] = 7
4382 13:42:20.390155 rx_lastpass[1][0][14] = 38
4383 13:42:20.393305 rx_firspass[1][0][15] = -4
4384 13:42:20.396732 rx_lastpass[1][0][15] = 30
4385 13:42:20.397250 rx_firspass[1][1][0] = 4
4386 13:42:20.399968 rx_lastpass[1][1][0] = 40
4387 13:42:20.403468 rx_firspass[1][1][1] = 5
4388 13:42:20.406499 rx_lastpass[1][1][1] = 39
4389 13:42:20.406934 rx_firspass[1][1][2] = 0
4390 13:42:20.409726 rx_lastpass[1][1][2] = 36
4391 13:42:20.413178 rx_firspass[1][1][3] = -3
4392 13:42:20.413679 rx_lastpass[1][1][3] = 34
4393 13:42:20.416402 rx_firspass[1][1][4] = 4
4394 13:42:20.419579 rx_lastpass[1][1][4] = 39
4395 13:42:20.422965 rx_firspass[1][1][5] = 5
4396 13:42:20.423347 rx_lastpass[1][1][5] = 40
4397 13:42:20.426473 rx_firspass[1][1][6] = 5
4398 13:42:20.429529 rx_lastpass[1][1][6] = 41
4399 13:42:20.430053 rx_firspass[1][1][7] = 3
4400 13:42:20.432859 rx_lastpass[1][1][7] = 38
4401 13:42:20.436138 rx_firspass[1][1][8] = 0
4402 13:42:20.436561 rx_lastpass[1][1][8] = 35
4403 13:42:20.439449 rx_firspass[1][1][9] = -1
4404 13:42:20.443097 rx_lastpass[1][1][9] = 34
4405 13:42:20.446350 rx_firspass[1][1][10] = 4
4406 13:42:20.446730 rx_lastpass[1][1][10] = 39
4407 13:42:20.449824 rx_firspass[1][1][11] = 4
4408 13:42:20.453220 rx_lastpass[1][1][11] = 40
4409 13:42:20.453601 rx_firspass[1][1][12] = 4
4410 13:42:20.456010 rx_lastpass[1][1][12] = 40
4411 13:42:20.459962 rx_firspass[1][1][13] = 4
4412 13:42:20.463019 rx_lastpass[1][1][13] = 40
4413 13:42:20.463402 rx_firspass[1][1][14] = 5
4414 13:42:20.466390 rx_lastpass[1][1][14] = 40
4415 13:42:20.469735 rx_firspass[1][1][15] = -3
4416 13:42:20.473165 rx_lastpass[1][1][15] = 31
4417 13:42:20.473546 dump params clk_delay
4418 13:42:20.476635 clk_delay[0] = 1
4419 13:42:20.477017 clk_delay[1] = 0
4420 13:42:20.479747 dump params dqs_delay
4421 13:42:20.480141 dqs_delay[0][0] = -2
4422 13:42:20.483420 dqs_delay[0][1] = 0
4423 13:42:20.483797 dqs_delay[1][0] = 0
4424 13:42:20.486611 dqs_delay[1][1] = 0
4425 13:42:20.489531 dump params delay_cell_unit = 735
4426 13:42:20.489914 dump source = 0x0
4427 13:42:20.493393 dump params frequency:1200
4428 13:42:20.496200 dump params rank number:2
4429 13:42:20.496613
4430 13:42:20.499672 dump params write leveling
4431 13:42:20.500053 write leveling[0][0][0] = 0x0
4432 13:42:20.503177 write leveling[0][0][1] = 0x0
4433 13:42:20.506647 write leveling[0][1][0] = 0x0
4434 13:42:20.510071 write leveling[0][1][1] = 0x0
4435 13:42:20.510450 write leveling[1][0][0] = 0x0
4436 13:42:20.512936 write leveling[1][0][1] = 0x0
4437 13:42:20.516359 write leveling[1][1][0] = 0x0
4438 13:42:20.519841 write leveling[1][1][1] = 0x0
4439 13:42:20.520236 dump params cbt_cs
4440 13:42:20.523408 cbt_cs[0][0] = 0x0
4441 13:42:20.523859 cbt_cs[0][1] = 0x0
4442 13:42:20.526761 cbt_cs[1][0] = 0x0
4443 13:42:20.527208 cbt_cs[1][1] = 0x0
4444 13:42:20.530237 dump params cbt_mr12
4445 13:42:20.532969 cbt_mr12[0][0] = 0x0
4446 13:42:20.533352 cbt_mr12[0][1] = 0x0
4447 13:42:20.536320 cbt_mr12[1][0] = 0x0
4448 13:42:20.536752 cbt_mr12[1][1] = 0x0
4449 13:42:20.539704 dump params tx window
4450 13:42:20.542978 tx_center_min[0][0][0] = 0
4451 13:42:20.543361 tx_center_max[0][0][0] = 0
4452 13:42:20.546225 tx_center_min[0][0][1] = 0
4453 13:42:20.549470 tx_center_max[0][0][1] = 0
4454 13:42:20.552749 tx_center_min[0][1][0] = 0
4455 13:42:20.553131 tx_center_max[0][1][0] = 0
4456 13:42:20.556404 tx_center_min[0][1][1] = 0
4457 13:42:20.559555 tx_center_max[0][1][1] = 0
4458 13:42:20.562468 tx_center_min[1][0][0] = 0
4459 13:42:20.562852 tx_center_max[1][0][0] = 0
4460 13:42:20.565806 tx_center_min[1][0][1] = 0
4461 13:42:20.569310 tx_center_max[1][0][1] = 0
4462 13:42:20.572986 tx_center_min[1][1][0] = 0
4463 13:42:20.573369 tx_center_max[1][1][0] = 0
4464 13:42:20.576356 tx_center_min[1][1][1] = 0
4465 13:42:20.579338 tx_center_max[1][1][1] = 0
4466 13:42:20.579718 dump params tx window
4467 13:42:20.582673 tx_win_center[0][0][0] = 0
4468 13:42:20.585934 tx_first_pass[0][0][0] = 0
4469 13:42:20.589320 tx_last_pass[0][0][0] = 0
4470 13:42:20.589762 tx_win_center[0][0][1] = 0
4471 13:42:20.592852 tx_first_pass[0][0][1] = 0
4472 13:42:20.596209 tx_last_pass[0][0][1] = 0
4473 13:42:20.599018 tx_win_center[0][0][2] = 0
4474 13:42:20.599479 tx_first_pass[0][0][2] = 0
4475 13:42:20.602580 tx_last_pass[0][0][2] = 0
4476 13:42:20.606073 tx_win_center[0][0][3] = 0
4477 13:42:20.606534 tx_first_pass[0][0][3] = 0
4478 13:42:20.609013 tx_last_pass[0][0][3] = 0
4479 13:42:20.612329 tx_win_center[0][0][4] = 0
4480 13:42:20.615914 tx_first_pass[0][0][4] = 0
4481 13:42:20.616296 tx_last_pass[0][0][4] = 0
4482 13:42:20.619419 tx_win_center[0][0][5] = 0
4483 13:42:20.622259 tx_first_pass[0][0][5] = 0
4484 13:42:20.625649 tx_last_pass[0][0][5] = 0
4485 13:42:20.626034 tx_win_center[0][0][6] = 0
4486 13:42:20.629067 tx_first_pass[0][0][6] = 0
4487 13:42:20.632330 tx_last_pass[0][0][6] = 0
4488 13:42:20.632830 tx_win_center[0][0][7] = 0
4489 13:42:20.635751 tx_first_pass[0][0][7] = 0
4490 13:42:20.639317 tx_last_pass[0][0][7] = 0
4491 13:42:20.642427 tx_win_center[0][0][8] = 0
4492 13:42:20.642808 tx_first_pass[0][0][8] = 0
4493 13:42:20.645982 tx_last_pass[0][0][8] = 0
4494 13:42:20.649243 tx_win_center[0][0][9] = 0
4495 13:42:20.652400 tx_first_pass[0][0][9] = 0
4496 13:42:20.652830 tx_last_pass[0][0][9] = 0
4497 13:42:20.655883 tx_win_center[0][0][10] = 0
4498 13:42:20.659242 tx_first_pass[0][0][10] = 0
4499 13:42:20.659626 tx_last_pass[0][0][10] = 0
4500 13:42:20.662328 tx_win_center[0][0][11] = 0
4501 13:42:20.665523 tx_first_pass[0][0][11] = 0
4502 13:42:20.669438 tx_last_pass[0][0][11] = 0
4503 13:42:20.669820 tx_win_center[0][0][12] = 0
4504 13:42:20.672295 tx_first_pass[0][0][12] = 0
4505 13:42:20.675803 tx_last_pass[0][0][12] = 0
4506 13:42:20.679214 tx_win_center[0][0][13] = 0
4507 13:42:20.682136 tx_first_pass[0][0][13] = 0
4508 13:42:20.682528 tx_last_pass[0][0][13] = 0
4509 13:42:20.685476 tx_win_center[0][0][14] = 0
4510 13:42:20.689223 tx_first_pass[0][0][14] = 0
4511 13:42:20.689604 tx_last_pass[0][0][14] = 0
4512 13:42:20.692435 tx_win_center[0][0][15] = 0
4513 13:42:20.695738 tx_first_pass[0][0][15] = 0
4514 13:42:20.699123 tx_last_pass[0][0][15] = 0
4515 13:42:20.699508 tx_win_center[0][1][0] = 0
4516 13:42:20.702599 tx_first_pass[0][1][0] = 0
4517 13:42:20.706030 tx_last_pass[0][1][0] = 0
4518 13:42:20.708903 tx_win_center[0][1][1] = 0
4519 13:42:20.709291 tx_first_pass[0][1][1] = 0
4520 13:42:20.712200 tx_last_pass[0][1][1] = 0
4521 13:42:20.715738 tx_win_center[0][1][2] = 0
4522 13:42:20.719199 tx_first_pass[0][1][2] = 0
4523 13:42:20.719586 tx_last_pass[0][1][2] = 0
4524 13:42:20.722204 tx_win_center[0][1][3] = 0
4525 13:42:20.725683 tx_first_pass[0][1][3] = 0
4526 13:42:20.726145 tx_last_pass[0][1][3] = 0
4527 13:42:20.729110 tx_win_center[0][1][4] = 0
4528 13:42:20.732137 tx_first_pass[0][1][4] = 0
4529 13:42:20.735650 tx_last_pass[0][1][4] = 0
4530 13:42:20.736037 tx_win_center[0][1][5] = 0
4531 13:42:20.738871 tx_first_pass[0][1][5] = 0
4532 13:42:20.742138 tx_last_pass[0][1][5] = 0
4533 13:42:20.745419 tx_win_center[0][1][6] = 0
4534 13:42:20.745801 tx_first_pass[0][1][6] = 0
4535 13:42:20.748650 tx_last_pass[0][1][6] = 0
4536 13:42:20.752139 tx_win_center[0][1][7] = 0
4537 13:42:20.752548 tx_first_pass[0][1][7] = 0
4538 13:42:20.755576 tx_last_pass[0][1][7] = 0
4539 13:42:20.758976 tx_win_center[0][1][8] = 0
4540 13:42:20.762162 tx_first_pass[0][1][8] = 0
4541 13:42:20.762548 tx_last_pass[0][1][8] = 0
4542 13:42:20.765612 tx_win_center[0][1][9] = 0
4543 13:42:20.768521 tx_first_pass[0][1][9] = 0
4544 13:42:20.771850 tx_last_pass[0][1][9] = 0
4545 13:42:20.772233 tx_win_center[0][1][10] = 0
4546 13:42:20.775171 tx_first_pass[0][1][10] = 0
4547 13:42:20.778616 tx_last_pass[0][1][10] = 0
4548 13:42:20.782151 tx_win_center[0][1][11] = 0
4549 13:42:20.782536 tx_first_pass[0][1][11] = 0
4550 13:42:20.785503 tx_last_pass[0][1][11] = 0
4551 13:42:20.788716 tx_win_center[0][1][12] = 0
4552 13:42:20.792007 tx_first_pass[0][1][12] = 0
4553 13:42:20.792389 tx_last_pass[0][1][12] = 0
4554 13:42:20.794990 tx_win_center[0][1][13] = 0
4555 13:42:20.798588 tx_first_pass[0][1][13] = 0
4556 13:42:20.802185 tx_last_pass[0][1][13] = 0
4557 13:42:20.802566 tx_win_center[0][1][14] = 0
4558 13:42:20.805392 tx_first_pass[0][1][14] = 0
4559 13:42:20.808957 tx_last_pass[0][1][14] = 0
4560 13:42:20.812252 tx_win_center[0][1][15] = 0
4561 13:42:20.812714 tx_first_pass[0][1][15] = 0
4562 13:42:20.815216 tx_last_pass[0][1][15] = 0
4563 13:42:20.818658 tx_win_center[1][0][0] = 0
4564 13:42:20.822094 tx_first_pass[1][0][0] = 0
4565 13:42:20.822478 tx_last_pass[1][0][0] = 0
4566 13:42:20.824996 tx_win_center[1][0][1] = 0
4567 13:42:20.828427 tx_first_pass[1][0][1] = 0
4568 13:42:20.828843 tx_last_pass[1][0][1] = 0
4569 13:42:20.831852 tx_win_center[1][0][2] = 0
4570 13:42:20.835202 tx_first_pass[1][0][2] = 0
4571 13:42:20.838302 tx_last_pass[1][0][2] = 0
4572 13:42:20.838699 tx_win_center[1][0][3] = 0
4573 13:42:20.842118 tx_first_pass[1][0][3] = 0
4574 13:42:20.845479 tx_last_pass[1][0][3] = 0
4575 13:42:20.845865 tx_win_center[1][0][4] = 0
4576 13:42:20.848325 tx_first_pass[1][0][4] = 0
4577 13:42:20.852121 tx_last_pass[1][0][4] = 0
4578 13:42:20.855010 tx_win_center[1][0][5] = 0
4579 13:42:20.855434 tx_first_pass[1][0][5] = 0
4580 13:42:20.858461 tx_last_pass[1][0][5] = 0
4581 13:42:20.861735 tx_win_center[1][0][6] = 0
4582 13:42:20.865411 tx_first_pass[1][0][6] = 0
4583 13:42:20.865794 tx_last_pass[1][0][6] = 0
4584 13:42:20.868255 tx_win_center[1][0][7] = 0
4585 13:42:20.872059 tx_first_pass[1][0][7] = 0
4586 13:42:20.872441 tx_last_pass[1][0][7] = 0
4587 13:42:20.874928 tx_win_center[1][0][8] = 0
4588 13:42:20.878264 tx_first_pass[1][0][8] = 0
4589 13:42:20.881821 tx_last_pass[1][0][8] = 0
4590 13:42:20.882203 tx_win_center[1][0][9] = 0
4591 13:42:20.884977 tx_first_pass[1][0][9] = 0
4592 13:42:20.888639 tx_last_pass[1][0][9] = 0
4593 13:42:20.891899 tx_win_center[1][0][10] = 0
4594 13:42:20.892278 tx_first_pass[1][0][10] = 0
4595 13:42:20.895061 tx_last_pass[1][0][10] = 0
4596 13:42:20.898868 tx_win_center[1][0][11] = 0
4597 13:42:20.901553 tx_first_pass[1][0][11] = 0
4598 13:42:20.901945 tx_last_pass[1][0][11] = 0
4599 13:42:20.904833 tx_win_center[1][0][12] = 0
4600 13:42:20.908324 tx_first_pass[1][0][12] = 0
4601 13:42:20.911385 tx_last_pass[1][0][12] = 0
4602 13:42:20.911766 tx_win_center[1][0][13] = 0
4603 13:42:20.914786 tx_first_pass[1][0][13] = 0
4604 13:42:20.918110 tx_last_pass[1][0][13] = 0
4605 13:42:20.921682 tx_win_center[1][0][14] = 0
4606 13:42:20.922060 tx_first_pass[1][0][14] = 0
4607 13:42:20.924836 tx_last_pass[1][0][14] = 0
4608 13:42:20.928404 tx_win_center[1][0][15] = 0
4609 13:42:20.931613 tx_first_pass[1][0][15] = 0
4610 13:42:20.931997 tx_last_pass[1][0][15] = 0
4611 13:42:20.935424 tx_win_center[1][1][0] = 0
4612 13:42:20.938722 tx_first_pass[1][1][0] = 0
4613 13:42:20.941817 tx_last_pass[1][1][0] = 0
4614 13:42:20.942198 tx_win_center[1][1][1] = 0
4615 13:42:20.945005 tx_first_pass[1][1][1] = 0
4616 13:42:20.948153 tx_last_pass[1][1][1] = 0
4617 13:42:20.948560 tx_win_center[1][1][2] = 0
4618 13:42:20.951400 tx_first_pass[1][1][2] = 0
4619 13:42:20.954817 tx_last_pass[1][1][2] = 0
4620 13:42:20.957957 tx_win_center[1][1][3] = 0
4621 13:42:20.958345 tx_first_pass[1][1][3] = 0
4622 13:42:20.961904 tx_last_pass[1][1][3] = 0
4623 13:42:20.964900 tx_win_center[1][1][4] = 0
4624 13:42:20.968423 tx_first_pass[1][1][4] = 0
4625 13:42:20.968842 tx_last_pass[1][1][4] = 0
4626 13:42:20.971481 tx_win_center[1][1][5] = 0
4627 13:42:20.974931 tx_first_pass[1][1][5] = 0
4628 13:42:20.975315 tx_last_pass[1][1][5] = 0
4629 13:42:20.977951 tx_win_center[1][1][6] = 0
4630 13:42:20.981137 tx_first_pass[1][1][6] = 0
4631 13:42:20.984505 tx_last_pass[1][1][6] = 0
4632 13:42:20.984891 tx_win_center[1][1][7] = 0
4633 13:42:20.988229 tx_first_pass[1][1][7] = 0
4634 13:42:20.991552 tx_last_pass[1][1][7] = 0
4635 13:42:20.994624 tx_win_center[1][1][8] = 0
4636 13:42:20.994973 tx_first_pass[1][1][8] = 0
4637 13:42:20.997903 tx_last_pass[1][1][8] = 0
4638 13:42:21.001353 tx_win_center[1][1][9] = 0
4639 13:42:21.001839 tx_first_pass[1][1][9] = 0
4640 13:42:21.004727 tx_last_pass[1][1][9] = 0
4641 13:42:21.007772 tx_win_center[1][1][10] = 0
4642 13:42:21.011236 tx_first_pass[1][1][10] = 0
4643 13:42:21.011653 tx_last_pass[1][1][10] = 0
4644 13:42:21.014621 tx_win_center[1][1][11] = 0
4645 13:42:21.018191 tx_first_pass[1][1][11] = 0
4646 13:42:21.021162 tx_last_pass[1][1][11] = 0
4647 13:42:21.021542 tx_win_center[1][1][12] = 0
4648 13:42:21.024422 tx_first_pass[1][1][12] = 0
4649 13:42:21.027602 tx_last_pass[1][1][12] = 0
4650 13:42:21.030791 tx_win_center[1][1][13] = 0
4651 13:42:21.030995 tx_first_pass[1][1][13] = 0
4652 13:42:21.034214 tx_last_pass[1][1][13] = 0
4653 13:42:21.037676 tx_win_center[1][1][14] = 0
4654 13:42:21.040973 tx_first_pass[1][1][14] = 0
4655 13:42:21.041113 tx_last_pass[1][1][14] = 0
4656 13:42:21.044401 tx_win_center[1][1][15] = 0
4657 13:42:21.047748 tx_first_pass[1][1][15] = 0
4658 13:42:21.050958 tx_last_pass[1][1][15] = 0
4659 13:42:21.051063 dump params rx window
4660 13:42:21.054021 rx_firspass[0][0][0] = 0
4661 13:42:21.057407 rx_lastpass[0][0][0] = 0
4662 13:42:21.057503 rx_firspass[0][0][1] = 0
4663 13:42:21.060410 rx_lastpass[0][0][1] = 0
4664 13:42:21.063983 rx_firspass[0][0][2] = 0
4665 13:42:21.064067 rx_lastpass[0][0][2] = 0
4666 13:42:21.067404 rx_firspass[0][0][3] = 0
4667 13:42:21.070742 rx_lastpass[0][0][3] = 0
4668 13:42:21.074343 rx_firspass[0][0][4] = 0
4669 13:42:21.074428 rx_lastpass[0][0][4] = 0
4670 13:42:21.077092 rx_firspass[0][0][5] = 0
4671 13:42:21.080769 rx_lastpass[0][0][5] = 0
4672 13:42:21.080853 rx_firspass[0][0][6] = 0
4673 13:42:21.083838 rx_lastpass[0][0][6] = 0
4674 13:42:21.086959 rx_firspass[0][0][7] = 0
4675 13:42:21.087042 rx_lastpass[0][0][7] = 0
4676 13:42:21.090436 rx_firspass[0][0][8] = 0
4677 13:42:21.094061 rx_lastpass[0][0][8] = 0
4678 13:42:21.094145 rx_firspass[0][0][9] = 0
4679 13:42:21.097358 rx_lastpass[0][0][9] = 0
4680 13:42:21.100747 rx_firspass[0][0][10] = 0
4681 13:42:21.103879 rx_lastpass[0][0][10] = 0
4682 13:42:21.103962 rx_firspass[0][0][11] = 0
4683 13:42:21.107346 rx_lastpass[0][0][11] = 0
4684 13:42:21.110270 rx_firspass[0][0][12] = 0
4685 13:42:21.110354 rx_lastpass[0][0][12] = 0
4686 13:42:21.113855 rx_firspass[0][0][13] = 0
4687 13:42:21.117334 rx_lastpass[0][0][13] = 0
4688 13:42:21.117417 rx_firspass[0][0][14] = 0
4689 13:42:21.120785 rx_lastpass[0][0][14] = 0
4690 13:42:21.123610 rx_firspass[0][0][15] = 0
4691 13:42:21.127085 rx_lastpass[0][0][15] = 0
4692 13:42:21.127168 rx_firspass[0][1][0] = 0
4693 13:42:21.130595 rx_lastpass[0][1][0] = 0
4694 13:42:21.133636 rx_firspass[0][1][1] = 0
4695 13:42:21.133720 rx_lastpass[0][1][1] = 0
4696 13:42:21.136997 rx_firspass[0][1][2] = 0
4697 13:42:21.140083 rx_lastpass[0][1][2] = 0
4698 13:42:21.140186 rx_firspass[0][1][3] = 0
4699 13:42:21.143810 rx_lastpass[0][1][3] = 0
4700 13:42:21.147030 rx_firspass[0][1][4] = 0
4701 13:42:21.150494 rx_lastpass[0][1][4] = 0
4702 13:42:21.150578 rx_firspass[0][1][5] = 0
4703 13:42:21.153487 rx_lastpass[0][1][5] = 0
4704 13:42:21.156823 rx_firspass[0][1][6] = 0
4705 13:42:21.156907 rx_lastpass[0][1][6] = 0
4706 13:42:21.160056 rx_firspass[0][1][7] = 0
4707 13:42:21.163587 rx_lastpass[0][1][7] = 0
4708 13:42:21.163671 rx_firspass[0][1][8] = 0
4709 13:42:21.166951 rx_lastpass[0][1][8] = 0
4710 13:42:21.170013 rx_firspass[0][1][9] = 0
4711 13:42:21.170098 rx_lastpass[0][1][9] = 0
4712 13:42:21.173633 rx_firspass[0][1][10] = 0
4713 13:42:21.176654 rx_lastpass[0][1][10] = 0
4714 13:42:21.180090 rx_firspass[0][1][11] = 0
4715 13:42:21.180173 rx_lastpass[0][1][11] = 0
4716 13:42:21.183594 rx_firspass[0][1][12] = 0
4717 13:42:21.186923 rx_lastpass[0][1][12] = 0
4718 13:42:21.187011 rx_firspass[0][1][13] = 0
4719 13:42:21.189801 rx_lastpass[0][1][13] = 0
4720 13:42:21.193156 rx_firspass[0][1][14] = 0
4721 13:42:21.197065 rx_lastpass[0][1][14] = 0
4722 13:42:21.197158 rx_firspass[0][1][15] = 0
4723 13:42:21.199839 rx_lastpass[0][1][15] = 0
4724 13:42:21.203327 rx_firspass[1][0][0] = 0
4725 13:42:21.203417 rx_lastpass[1][0][0] = 0
4726 13:42:21.206718 rx_firspass[1][0][1] = 0
4727 13:42:21.210258 rx_lastpass[1][0][1] = 0
4728 13:42:21.210369 rx_firspass[1][0][2] = 0
4729 13:42:21.212941 rx_lastpass[1][0][2] = 0
4730 13:42:21.216309 rx_firspass[1][0][3] = 0
4731 13:42:21.219950 rx_lastpass[1][0][3] = 0
4732 13:42:21.220123 rx_firspass[1][0][4] = 0
4733 13:42:21.223263 rx_lastpass[1][0][4] = 0
4734 13:42:21.226206 rx_firspass[1][0][5] = 0
4735 13:42:21.226335 rx_lastpass[1][0][5] = 0
4736 13:42:21.229638 rx_firspass[1][0][6] = 0
4737 13:42:21.233326 rx_lastpass[1][0][6] = 0
4738 13:42:21.233449 rx_firspass[1][0][7] = 0
4739 13:42:21.236602 rx_lastpass[1][0][7] = 0
4740 13:42:21.239411 rx_firspass[1][0][8] = 0
4741 13:42:21.239522 rx_lastpass[1][0][8] = 0
4742 13:42:21.242965 rx_firspass[1][0][9] = 0
4743 13:42:21.246434 rx_lastpass[1][0][9] = 0
4744 13:42:21.249757 rx_firspass[1][0][10] = 0
4745 13:42:21.249840 rx_lastpass[1][0][10] = 0
4746 13:42:21.252981 rx_firspass[1][0][11] = 0
4747 13:42:21.256045 rx_lastpass[1][0][11] = 0
4748 13:42:21.256198 rx_firspass[1][0][12] = 0
4749 13:42:21.259481 rx_lastpass[1][0][12] = 0
4750 13:42:21.262913 rx_firspass[1][0][13] = 0
4751 13:42:21.266372 rx_lastpass[1][0][13] = 0
4752 13:42:21.266480 rx_firspass[1][0][14] = 0
4753 13:42:21.269217 rx_lastpass[1][0][14] = 0
4754 13:42:21.272763 rx_firspass[1][0][15] = 0
4755 13:42:21.272919 rx_lastpass[1][0][15] = 0
4756 13:42:21.276082 rx_firspass[1][1][0] = 0
4757 13:42:21.279428 rx_lastpass[1][1][0] = 0
4758 13:42:21.279613 rx_firspass[1][1][1] = 0
4759 13:42:21.283107 rx_lastpass[1][1][1] = 0
4760 13:42:21.285973 rx_firspass[1][1][2] = 0
4761 13:42:21.286083 rx_lastpass[1][1][2] = 0
4762 13:42:21.289876 rx_firspass[1][1][3] = 0
4763 13:42:21.292869 rx_lastpass[1][1][3] = 0
4764 13:42:21.296090 rx_firspass[1][1][4] = 0
4765 13:42:21.296227 rx_lastpass[1][1][4] = 0
4766 13:42:21.299503 rx_firspass[1][1][5] = 0
4767 13:42:21.302839 rx_lastpass[1][1][5] = 0
4768 13:42:21.302937 rx_firspass[1][1][6] = 0
4769 13:42:21.306149 rx_lastpass[1][1][6] = 0
4770 13:42:21.309060 rx_firspass[1][1][7] = 0
4771 13:42:21.309151 rx_lastpass[1][1][7] = 0
4772 13:42:21.312915 rx_firspass[1][1][8] = 0
4773 13:42:21.316204 rx_lastpass[1][1][8] = 0
4774 13:42:21.316322 rx_firspass[1][1][9] = 0
4775 13:42:21.319083 rx_lastpass[1][1][9] = 0
4776 13:42:21.322516 rx_firspass[1][1][10] = 0
4777 13:42:21.326105 rx_lastpass[1][1][10] = 0
4778 13:42:21.326210 rx_firspass[1][1][11] = 0
4779 13:42:21.329547 rx_lastpass[1][1][11] = 0
4780 13:42:21.332391 rx_firspass[1][1][12] = 0
4781 13:42:21.332490 rx_lastpass[1][1][12] = 0
4782 13:42:21.336002 rx_firspass[1][1][13] = 0
4783 13:42:21.339413 rx_lastpass[1][1][13] = 0
4784 13:42:21.339498 rx_firspass[1][1][14] = 0
4785 13:42:21.342933 rx_lastpass[1][1][14] = 0
4786 13:42:21.345816 rx_firspass[1][1][15] = 0
4787 13:42:21.349368 rx_lastpass[1][1][15] = 0
4788 13:42:21.349456 dump params clk_delay
4789 13:42:21.353011 clk_delay[0] = 0
4790 13:42:21.353098 clk_delay[1] = 0
4791 13:42:21.356198 dump params dqs_delay
4792 13:42:21.356282 dqs_delay[0][0] = 0
4793 13:42:21.359269 dqs_delay[0][1] = 0
4794 13:42:21.359353 dqs_delay[1][0] = 0
4795 13:42:21.362920 dqs_delay[1][1] = 0
4796 13:42:21.365953 dump params delay_cell_unit = 735
4797 13:42:21.366039 dump source = 0x0
4798 13:42:21.369555 dump params frequency:800
4799 13:42:21.372760 dump params rank number:2
4800 13:42:21.372844
4801 13:42:21.376032 dump params write leveling
4802 13:42:21.376117 write leveling[0][0][0] = 0x0
4803 13:42:21.379361 write leveling[0][0][1] = 0x0
4804 13:42:21.382372 write leveling[0][1][0] = 0x0
4805 13:42:21.386124 write leveling[0][1][1] = 0x0
4806 13:42:21.389414 write leveling[1][0][0] = 0x0
4807 13:42:21.389506 write leveling[1][0][1] = 0x0
4808 13:42:21.392869 write leveling[1][1][0] = 0x0
4809 13:42:21.395871 write leveling[1][1][1] = 0x0
4810 13:42:21.395958 dump params cbt_cs
4811 13:42:21.399407 cbt_cs[0][0] = 0x0
4812 13:42:21.399495 cbt_cs[0][1] = 0x0
4813 13:42:21.402654 cbt_cs[1][0] = 0x0
4814 13:42:21.406192 cbt_cs[1][1] = 0x0
4815 13:42:21.406284 dump params cbt_mr12
4816 13:42:21.409278 cbt_mr12[0][0] = 0x0
4817 13:42:21.409366 cbt_mr12[0][1] = 0x0
4818 13:42:21.412387 cbt_mr12[1][0] = 0x0
4819 13:42:21.412506 cbt_mr12[1][1] = 0x0
4820 13:42:21.416221 dump params tx window
4821 13:42:21.419306 tx_center_min[0][0][0] = 0
4822 13:42:21.419393 tx_center_max[0][0][0] = 0
4823 13:42:21.422705 tx_center_min[0][0][1] = 0
4824 13:42:21.426096 tx_center_max[0][0][1] = 0
4825 13:42:21.428975 tx_center_min[0][1][0] = 0
4826 13:42:21.429061 tx_center_max[0][1][0] = 0
4827 13:42:21.432367 tx_center_min[0][1][1] = 0
4828 13:42:21.435980 tx_center_max[0][1][1] = 0
4829 13:42:21.439074 tx_center_min[1][0][0] = 0
4830 13:42:21.439158 tx_center_max[1][0][0] = 0
4831 13:42:21.442364 tx_center_min[1][0][1] = 0
4832 13:42:21.445949 tx_center_max[1][0][1] = 0
4833 13:42:21.449434 tx_center_min[1][1][0] = 0
4834 13:42:21.449519 tx_center_max[1][1][0] = 0
4835 13:42:21.452274 tx_center_min[1][1][1] = 0
4836 13:42:21.455973 tx_center_max[1][1][1] = 0
4837 13:42:21.456057 dump params tx window
4838 13:42:21.459290 tx_win_center[0][0][0] = 0
4839 13:42:21.462690 tx_first_pass[0][0][0] = 0
4840 13:42:21.466094 tx_last_pass[0][0][0] = 0
4841 13:42:21.466178 tx_win_center[0][0][1] = 0
4842 13:42:21.469210 tx_first_pass[0][0][1] = 0
4843 13:42:21.472439 tx_last_pass[0][0][1] = 0
4844 13:42:21.472541 tx_win_center[0][0][2] = 0
4845 13:42:21.476290 tx_first_pass[0][0][2] = 0
4846 13:42:21.478872 tx_last_pass[0][0][2] = 0
4847 13:42:21.482605 tx_win_center[0][0][3] = 0
4848 13:42:21.482741 tx_first_pass[0][0][3] = 0
4849 13:42:21.486132 tx_last_pass[0][0][3] = 0
4850 13:42:21.488837 tx_win_center[0][0][4] = 0
4851 13:42:21.492108 tx_first_pass[0][0][4] = 0
4852 13:42:21.492239 tx_last_pass[0][0][4] = 0
4853 13:42:21.495709 tx_win_center[0][0][5] = 0
4854 13:42:21.498866 tx_first_pass[0][0][5] = 0
4855 13:42:21.499016 tx_last_pass[0][0][5] = 0
4856 13:42:21.502263 tx_win_center[0][0][6] = 0
4857 13:42:21.505722 tx_first_pass[0][0][6] = 0
4858 13:42:21.509038 tx_last_pass[0][0][6] = 0
4859 13:42:21.509266 tx_win_center[0][0][7] = 0
4860 13:42:21.512267 tx_first_pass[0][0][7] = 0
4861 13:42:21.516049 tx_last_pass[0][0][7] = 0
4862 13:42:21.519183 tx_win_center[0][0][8] = 0
4863 13:42:21.519478 tx_first_pass[0][0][8] = 0
4864 13:42:21.522628 tx_last_pass[0][0][8] = 0
4865 13:42:21.525963 tx_win_center[0][0][9] = 0
4866 13:42:21.529286 tx_first_pass[0][0][9] = 0
4867 13:42:21.529770 tx_last_pass[0][0][9] = 0
4868 13:42:21.532353 tx_win_center[0][0][10] = 0
4869 13:42:21.535682 tx_first_pass[0][0][10] = 0
4870 13:42:21.536081 tx_last_pass[0][0][10] = 0
4871 13:42:21.539065 tx_win_center[0][0][11] = 0
4872 13:42:21.542734 tx_first_pass[0][0][11] = 0
4873 13:42:21.546051 tx_last_pass[0][0][11] = 0
4874 13:42:21.546437 tx_win_center[0][0][12] = 0
4875 13:42:21.548861 tx_first_pass[0][0][12] = 0
4876 13:42:21.552022 tx_last_pass[0][0][12] = 0
4877 13:42:21.555489 tx_win_center[0][0][13] = 0
4878 13:42:21.555572 tx_first_pass[0][0][13] = 0
4879 13:42:21.558722 tx_last_pass[0][0][13] = 0
4880 13:42:21.562126 tx_win_center[0][0][14] = 0
4881 13:42:21.565435 tx_first_pass[0][0][14] = 0
4882 13:42:21.565519 tx_last_pass[0][0][14] = 0
4883 13:42:21.568891 tx_win_center[0][0][15] = 0
4884 13:42:21.571782 tx_first_pass[0][0][15] = 0
4885 13:42:21.575054 tx_last_pass[0][0][15] = 0
4886 13:42:21.575137 tx_win_center[0][1][0] = 0
4887 13:42:21.578743 tx_first_pass[0][1][0] = 0
4888 13:42:21.582147 tx_last_pass[0][1][0] = 0
4889 13:42:21.585311 tx_win_center[0][1][1] = 0
4890 13:42:21.585395 tx_first_pass[0][1][1] = 0
4891 13:42:21.588427 tx_last_pass[0][1][1] = 0
4892 13:42:21.591949 tx_win_center[0][1][2] = 0
4893 13:42:21.594807 tx_first_pass[0][1][2] = 0
4894 13:42:21.594891 tx_last_pass[0][1][2] = 0
4895 13:42:21.598787 tx_win_center[0][1][3] = 0
4896 13:42:21.601701 tx_first_pass[0][1][3] = 0
4897 13:42:21.601784 tx_last_pass[0][1][3] = 0
4898 13:42:21.605052 tx_win_center[0][1][4] = 0
4899 13:42:21.608791 tx_first_pass[0][1][4] = 0
4900 13:42:21.611591 tx_last_pass[0][1][4] = 0
4901 13:42:21.611674 tx_win_center[0][1][5] = 0
4902 13:42:21.615077 tx_first_pass[0][1][5] = 0
4903 13:42:21.618713 tx_last_pass[0][1][5] = 0
4904 13:42:21.622058 tx_win_center[0][1][6] = 0
4905 13:42:21.622142 tx_first_pass[0][1][6] = 0
4906 13:42:21.625429 tx_last_pass[0][1][6] = 0
4907 13:42:21.628299 tx_win_center[0][1][7] = 0
4908 13:42:21.628382 tx_first_pass[0][1][7] = 0
4909 13:42:21.631705 tx_last_pass[0][1][7] = 0
4910 13:42:21.634902 tx_win_center[0][1][8] = 0
4911 13:42:21.638105 tx_first_pass[0][1][8] = 0
4912 13:42:21.638189 tx_last_pass[0][1][8] = 0
4913 13:42:21.641741 tx_win_center[0][1][9] = 0
4914 13:42:21.644837 tx_first_pass[0][1][9] = 0
4915 13:42:21.648160 tx_last_pass[0][1][9] = 0
4916 13:42:21.648243 tx_win_center[0][1][10] = 0
4917 13:42:21.651345 tx_first_pass[0][1][10] = 0
4918 13:42:21.654692 tx_last_pass[0][1][10] = 0
4919 13:42:21.658188 tx_win_center[0][1][11] = 0
4920 13:42:21.658272 tx_first_pass[0][1][11] = 0
4921 13:42:21.661556 tx_last_pass[0][1][11] = 0
4922 13:42:21.664994 tx_win_center[0][1][12] = 0
4923 13:42:21.668474 tx_first_pass[0][1][12] = 0
4924 13:42:21.668557 tx_last_pass[0][1][12] = 0
4925 13:42:21.671387 tx_win_center[0][1][13] = 0
4926 13:42:21.674983 tx_first_pass[0][1][13] = 0
4927 13:42:21.678247 tx_last_pass[0][1][13] = 0
4928 13:42:21.678330 tx_win_center[0][1][14] = 0
4929 13:42:21.681247 tx_first_pass[0][1][14] = 0
4930 13:42:21.684770 tx_last_pass[0][1][14] = 0
4931 13:42:21.687908 tx_win_center[0][1][15] = 0
4932 13:42:21.687991 tx_first_pass[0][1][15] = 0
4933 13:42:21.691304 tx_last_pass[0][1][15] = 0
4934 13:42:21.694479 tx_win_center[1][0][0] = 0
4935 13:42:21.697874 tx_first_pass[1][0][0] = 0
4936 13:42:21.697958 tx_last_pass[1][0][0] = 0
4937 13:42:21.701301 tx_win_center[1][0][1] = 0
4938 13:42:21.704749 tx_first_pass[1][0][1] = 0
4939 13:42:21.704832 tx_last_pass[1][0][1] = 0
4940 13:42:21.708096 tx_win_center[1][0][2] = 0
4941 13:42:21.711433 tx_first_pass[1][0][2] = 0
4942 13:42:21.714570 tx_last_pass[1][0][2] = 0
4943 13:42:21.714654 tx_win_center[1][0][3] = 0
4944 13:42:21.718110 tx_first_pass[1][0][3] = 0
4945 13:42:21.721448 tx_last_pass[1][0][3] = 0
4946 13:42:21.724723 tx_win_center[1][0][4] = 0
4947 13:42:21.724806 tx_first_pass[1][0][4] = 0
4948 13:42:21.728067 tx_last_pass[1][0][4] = 0
4949 13:42:21.731406 tx_win_center[1][0][5] = 0
4950 13:42:21.731489 tx_first_pass[1][0][5] = 0
4951 13:42:21.734396 tx_last_pass[1][0][5] = 0
4952 13:42:21.737732 tx_win_center[1][0][6] = 0
4953 13:42:21.741168 tx_first_pass[1][0][6] = 0
4954 13:42:21.741251 tx_last_pass[1][0][6] = 0
4955 13:42:21.744684 tx_win_center[1][0][7] = 0
4956 13:42:21.748139 tx_first_pass[1][0][7] = 0
4957 13:42:21.751295 tx_last_pass[1][0][7] = 0
4958 13:42:21.751379 tx_win_center[1][0][8] = 0
4959 13:42:21.754506 tx_first_pass[1][0][8] = 0
4960 13:42:21.757687 tx_last_pass[1][0][8] = 0
4961 13:42:21.757770 tx_win_center[1][0][9] = 0
4962 13:42:21.761323 tx_first_pass[1][0][9] = 0
4963 13:42:21.764321 tx_last_pass[1][0][9] = 0
4964 13:42:21.767676 tx_win_center[1][0][10] = 0
4965 13:42:21.767759 tx_first_pass[1][0][10] = 0
4966 13:42:21.770854 tx_last_pass[1][0][10] = 0
4967 13:42:21.774313 tx_win_center[1][0][11] = 0
4968 13:42:21.777925 tx_first_pass[1][0][11] = 0
4969 13:42:21.778008 tx_last_pass[1][0][11] = 0
4970 13:42:21.780931 tx_win_center[1][0][12] = 0
4971 13:42:21.784299 tx_first_pass[1][0][12] = 0
4972 13:42:21.787331 tx_last_pass[1][0][12] = 0
4973 13:42:21.787415 tx_win_center[1][0][13] = 0
4974 13:42:21.790722 tx_first_pass[1][0][13] = 0
4975 13:42:21.794233 tx_last_pass[1][0][13] = 0
4976 13:42:21.797501 tx_win_center[1][0][14] = 0
4977 13:42:21.800746 tx_first_pass[1][0][14] = 0
4978 13:42:21.800830 tx_last_pass[1][0][14] = 0
4979 13:42:21.804234 tx_win_center[1][0][15] = 0
4980 13:42:21.807331 tx_first_pass[1][0][15] = 0
4981 13:42:21.810727 tx_last_pass[1][0][15] = 0
4982 13:42:21.810811 tx_win_center[1][1][0] = 0
4983 13:42:21.814101 tx_first_pass[1][1][0] = 0
4984 13:42:21.817588 tx_last_pass[1][1][0] = 0
4985 13:42:21.817671 tx_win_center[1][1][1] = 0
4986 13:42:21.820870 tx_first_pass[1][1][1] = 0
4987 13:42:21.824034 tx_last_pass[1][1][1] = 0
4988 13:42:21.827508 tx_win_center[1][1][2] = 0
4989 13:42:21.827591 tx_first_pass[1][1][2] = 0
4990 13:42:21.830810 tx_last_pass[1][1][2] = 0
4991 13:42:21.834087 tx_win_center[1][1][3] = 0
4992 13:42:21.837100 tx_first_pass[1][1][3] = 0
4993 13:42:21.837184 tx_last_pass[1][1][3] = 0
4994 13:42:21.840556 tx_win_center[1][1][4] = 0
4995 13:42:21.844017 tx_first_pass[1][1][4] = 0
4996 13:42:21.844100 tx_last_pass[1][1][4] = 0
4997 13:42:21.847647 tx_win_center[1][1][5] = 0
4998 13:42:21.850388 tx_first_pass[1][1][5] = 0
4999 13:42:21.853862 tx_last_pass[1][1][5] = 0
5000 13:42:21.853946 tx_win_center[1][1][6] = 0
5001 13:42:21.856904 tx_first_pass[1][1][6] = 0
5002 13:42:21.860484 tx_last_pass[1][1][6] = 0
5003 13:42:21.863978 tx_win_center[1][1][7] = 0
5004 13:42:21.864061 tx_first_pass[1][1][7] = 0
5005 13:42:21.866915 tx_last_pass[1][1][7] = 0
5006 13:42:21.870230 tx_win_center[1][1][8] = 0
5007 13:42:21.870313 tx_first_pass[1][1][8] = 0
5008 13:42:21.873940 tx_last_pass[1][1][8] = 0
5009 13:42:21.877043 tx_win_center[1][1][9] = 0
5010 13:42:21.880244 tx_first_pass[1][1][9] = 0
5011 13:42:21.880328 tx_last_pass[1][1][9] = 0
5012 13:42:21.884200 tx_win_center[1][1][10] = 0
5013 13:42:21.886975 tx_first_pass[1][1][10] = 0
5014 13:42:21.890467 tx_last_pass[1][1][10] = 0
5015 13:42:21.890550 tx_win_center[1][1][11] = 0
5016 13:42:21.893357 tx_first_pass[1][1][11] = 0
5017 13:42:21.896921 tx_last_pass[1][1][11] = 0
5018 13:42:21.900199 tx_win_center[1][1][12] = 0
5019 13:42:21.900281 tx_first_pass[1][1][12] = 0
5020 13:42:21.903751 tx_last_pass[1][1][12] = 0
5021 13:42:21.907039 tx_win_center[1][1][13] = 0
5022 13:42:21.910390 tx_first_pass[1][1][13] = 0
5023 13:42:21.910473 tx_last_pass[1][1][13] = 0
5024 13:42:21.913642 tx_win_center[1][1][14] = 0
5025 13:42:21.917203 tx_first_pass[1][1][14] = 0
5026 13:42:21.919966 tx_last_pass[1][1][14] = 0
5027 13:42:21.920049 tx_win_center[1][1][15] = 0
5028 13:42:21.923528 tx_first_pass[1][1][15] = 0
5029 13:42:21.926976 tx_last_pass[1][1][15] = 0
5030 13:42:21.930001 dump params rx window
5031 13:42:21.930084 rx_firspass[0][0][0] = 0
5032 13:42:21.933402 rx_lastpass[0][0][0] = 0
5033 13:42:21.936596 rx_firspass[0][0][1] = 0
5034 13:42:21.936679 rx_lastpass[0][0][1] = 0
5035 13:42:21.940073 rx_firspass[0][0][2] = 0
5036 13:42:21.943599 rx_lastpass[0][0][2] = 0
5037 13:42:21.943681 rx_firspass[0][0][3] = 0
5038 13:42:21.946353 rx_lastpass[0][0][3] = 0
5039 13:42:21.949758 rx_firspass[0][0][4] = 0
5040 13:42:21.949846 rx_lastpass[0][0][4] = 0
5041 13:42:21.953229 rx_firspass[0][0][5] = 0
5042 13:42:21.956215 rx_lastpass[0][0][5] = 0
5043 13:42:21.956298 rx_firspass[0][0][6] = 0
5044 13:42:21.959875 rx_lastpass[0][0][6] = 0
5045 13:42:21.963157 rx_firspass[0][0][7] = 0
5046 13:42:21.966456 rx_lastpass[0][0][7] = 0
5047 13:42:21.966539 rx_firspass[0][0][8] = 0
5048 13:42:21.969956 rx_lastpass[0][0][8] = 0
5049 13:42:21.973323 rx_firspass[0][0][9] = 0
5050 13:42:21.973406 rx_lastpass[0][0][9] = 0
5051 13:42:21.976095 rx_firspass[0][0][10] = 0
5052 13:42:21.979521 rx_lastpass[0][0][10] = 0
5053 13:42:21.979604 rx_firspass[0][0][11] = 0
5054 13:42:21.982949 rx_lastpass[0][0][11] = 0
5055 13:42:21.986512 rx_firspass[0][0][12] = 0
5056 13:42:21.989806 rx_lastpass[0][0][12] = 0
5057 13:42:21.989889 rx_firspass[0][0][13] = 0
5058 13:42:21.992957 rx_lastpass[0][0][13] = 0
5059 13:42:21.996649 rx_firspass[0][0][14] = 0
5060 13:42:21.996747 rx_lastpass[0][0][14] = 0
5061 13:42:21.999403 rx_firspass[0][0][15] = 0
5062 13:42:22.003357 rx_lastpass[0][0][15] = 0
5063 13:42:22.006123 rx_firspass[0][1][0] = 0
5064 13:42:22.006206 rx_lastpass[0][1][0] = 0
5065 13:42:22.009830 rx_firspass[0][1][1] = 0
5066 13:42:22.012965 rx_lastpass[0][1][1] = 0
5067 13:42:22.013048 rx_firspass[0][1][2] = 0
5068 13:42:22.016252 rx_lastpass[0][1][2] = 0
5069 13:42:22.019449 rx_firspass[0][1][3] = 0
5070 13:42:22.019543 rx_lastpass[0][1][3] = 0
5071 13:42:22.023072 rx_firspass[0][1][4] = 0
5072 13:42:22.026316 rx_lastpass[0][1][4] = 0
5073 13:42:22.026400 rx_firspass[0][1][5] = 0
5074 13:42:22.029856 rx_lastpass[0][1][5] = 0
5075 13:42:22.033046 rx_firspass[0][1][6] = 0
5076 13:42:22.033141 rx_lastpass[0][1][6] = 0
5077 13:42:22.036292 rx_firspass[0][1][7] = 0
5078 13:42:22.039669 rx_lastpass[0][1][7] = 0
5079 13:42:22.043043 rx_firspass[0][1][8] = 0
5080 13:42:22.043144 rx_lastpass[0][1][8] = 0
5081 13:42:22.045877 rx_firspass[0][1][9] = 0
5082 13:42:22.049321 rx_lastpass[0][1][9] = 0
5083 13:42:22.049405 rx_firspass[0][1][10] = 0
5084 13:42:22.052784 rx_lastpass[0][1][10] = 0
5085 13:42:22.056326 rx_firspass[0][1][11] = 0
5086 13:42:22.056436 rx_lastpass[0][1][11] = 0
5087 13:42:22.059769 rx_firspass[0][1][12] = 0
5088 13:42:22.062721 rx_lastpass[0][1][12] = 0
5089 13:42:22.065960 rx_firspass[0][1][13] = 0
5090 13:42:22.066043 rx_lastpass[0][1][13] = 0
5091 13:42:22.069162 rx_firspass[0][1][14] = 0
5092 13:42:22.072866 rx_lastpass[0][1][14] = 0
5093 13:42:22.072959 rx_firspass[0][1][15] = 0
5094 13:42:22.076123 rx_lastpass[0][1][15] = 0
5095 13:42:22.079723 rx_firspass[1][0][0] = 0
5096 13:42:22.082539 rx_lastpass[1][0][0] = 0
5097 13:42:22.082622 rx_firspass[1][0][1] = 0
5098 13:42:22.086041 rx_lastpass[1][0][1] = 0
5099 13:42:22.089531 rx_firspass[1][0][2] = 0
5100 13:42:22.089652 rx_lastpass[1][0][2] = 0
5101 13:42:22.092521 rx_firspass[1][0][3] = 0
5102 13:42:22.095923 rx_lastpass[1][0][3] = 0
5103 13:42:22.096007 rx_firspass[1][0][4] = 0
5104 13:42:22.099267 rx_lastpass[1][0][4] = 0
5105 13:42:22.102667 rx_firspass[1][0][5] = 0
5106 13:42:22.102750 rx_lastpass[1][0][5] = 0
5107 13:42:22.106100 rx_firspass[1][0][6] = 0
5108 13:42:22.109524 rx_lastpass[1][0][6] = 0
5109 13:42:22.109606 rx_firspass[1][0][7] = 0
5110 13:42:22.113023 rx_lastpass[1][0][7] = 0
5111 13:42:22.116075 rx_firspass[1][0][8] = 0
5112 13:42:22.119434 rx_lastpass[1][0][8] = 0
5113 13:42:22.119517 rx_firspass[1][0][9] = 0
5114 13:42:22.122705 rx_lastpass[1][0][9] = 0
5115 13:42:22.125967 rx_firspass[1][0][10] = 0
5116 13:42:22.126050 rx_lastpass[1][0][10] = 0
5117 13:42:22.129631 rx_firspass[1][0][11] = 0
5118 13:42:22.132572 rx_lastpass[1][0][11] = 0
5119 13:42:22.132655 rx_firspass[1][0][12] = 0
5120 13:42:22.135972 rx_lastpass[1][0][12] = 0
5121 13:42:22.139527 rx_firspass[1][0][13] = 0
5122 13:42:22.142865 rx_lastpass[1][0][13] = 0
5123 13:42:22.142948 rx_firspass[1][0][14] = 0
5124 13:42:22.146006 rx_lastpass[1][0][14] = 0
5125 13:42:22.149262 rx_firspass[1][0][15] = 0
5126 13:42:22.149346 rx_lastpass[1][0][15] = 0
5127 13:42:22.152886 rx_firspass[1][1][0] = 0
5128 13:42:22.156060 rx_lastpass[1][1][0] = 0
5129 13:42:22.156144 rx_firspass[1][1][1] = 0
5130 13:42:22.159573 rx_lastpass[1][1][1] = 0
5131 13:42:22.162688 rx_firspass[1][1][2] = 0
5132 13:42:22.166125 rx_lastpass[1][1][2] = 0
5133 13:42:22.166209 rx_firspass[1][1][3] = 0
5134 13:42:22.169702 rx_lastpass[1][1][3] = 0
5135 13:42:22.172962 rx_firspass[1][1][4] = 0
5136 13:42:22.173045 rx_lastpass[1][1][4] = 0
5137 13:42:22.176324 rx_firspass[1][1][5] = 0
5138 13:42:22.179270 rx_lastpass[1][1][5] = 0
5139 13:42:22.179353 rx_firspass[1][1][6] = 0
5140 13:42:22.182508 rx_lastpass[1][1][6] = 0
5141 13:42:22.186039 rx_firspass[1][1][7] = 0
5142 13:42:22.186126 rx_lastpass[1][1][7] = 0
5143 13:42:22.189476 rx_firspass[1][1][8] = 0
5144 13:42:22.192924 rx_lastpass[1][1][8] = 0
5145 13:42:22.193008 rx_firspass[1][1][9] = 0
5146 13:42:22.195780 rx_lastpass[1][1][9] = 0
5147 13:42:22.199068 rx_firspass[1][1][10] = 0
5148 13:42:22.202872 rx_lastpass[1][1][10] = 0
5149 13:42:22.202957 rx_firspass[1][1][11] = 0
5150 13:42:22.206109 rx_lastpass[1][1][11] = 0
5151 13:42:22.209573 rx_firspass[1][1][12] = 0
5152 13:42:22.209656 rx_lastpass[1][1][12] = 0
5153 13:42:22.213070 rx_firspass[1][1][13] = 0
5154 13:42:22.216088 rx_lastpass[1][1][13] = 0
5155 13:42:22.216171 rx_firspass[1][1][14] = 0
5156 13:42:22.219337 rx_lastpass[1][1][14] = 0
5157 13:42:22.222699 rx_firspass[1][1][15] = 0
5158 13:42:22.226266 rx_lastpass[1][1][15] = 0
5159 13:42:22.226353 dump params clk_delay
5160 13:42:22.229623 clk_delay[0] = 0
5161 13:42:22.229707 clk_delay[1] = 0
5162 13:42:22.232995 dump params dqs_delay
5163 13:42:22.233078 dqs_delay[0][0] = 0
5164 13:42:22.235701 dqs_delay[0][1] = 0
5165 13:42:22.235794 dqs_delay[1][0] = 0
5166 13:42:22.239363 dqs_delay[1][1] = 0
5167 13:42:22.242370 dump params delay_cell_unit = 735
5168 13:42:22.246053 mt_set_emi_preloader end
5169 13:42:22.248925 [mt_mem_init] dram size: 0x100000000, rank number: 2
5170 13:42:22.252555 [complex_mem_test] start addr:0x40000000, len:20480
5171 13:42:22.290291 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5172 13:42:22.296617 [complex_mem_test] start addr:0x80000000, len:20480
5173 13:42:22.332794 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5174 13:42:22.339120 [complex_mem_test] start addr:0xc0000000, len:20480
5175 13:42:22.375270 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5176 13:42:22.381667 [complex_mem_test] start addr:0x56000000, len:8192
5177 13:42:22.398745 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5178 13:42:22.399130 ddr_geometry:1
5179 13:42:22.405318 [complex_mem_test] start addr:0x80000000, len:8192
5180 13:42:22.422501 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5181 13:42:22.425910 dram_init: dram init end (result: 0)
5182 13:42:22.432363 Successfully loaded DRAM blobs and ran DRAM calibration
5183 13:42:22.442055 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5184 13:42:22.442483 CBMEM:
5185 13:42:22.445771 IMD: root @ 00000000fffff000 254 entries.
5186 13:42:22.448871 IMD: root @ 00000000ffffec00 62 entries.
5187 13:42:22.455282 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5188 13:42:22.461971 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5189 13:42:22.465131 in-header: 03 a1 00 00 08 00 00 00
5190 13:42:22.468772 in-data: 84 60 60 10 00 00 00 00
5191 13:42:22.471968 Chrome EC: clear events_b mask to 0x0000000020004000
5192 13:42:22.479473 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5193 13:42:22.482391 in-header: 03 fd 00 00 00 00 00 00
5194 13:42:22.482775 in-data:
5195 13:42:22.489150 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5196 13:42:22.489538 CBFS @ 21000 size 3d4000
5197 13:42:22.495907 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5198 13:42:22.499012 CBFS: Locating 'fallback/ramstage'
5199 13:42:22.502481 CBFS: Found @ offset 10d40 size d563
5200 13:42:22.524148 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5201 13:42:22.536301 Accumulated console time in romstage 13650 ms
5202 13:42:22.536729
5203 13:42:22.537029
5204 13:42:22.546052 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5205 13:42:22.549794 ARM64: Exception handlers installed.
5206 13:42:22.550178 ARM64: Testing exception
5207 13:42:22.553018 ARM64: Done test exception
5208 13:42:22.555818 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5209 13:42:22.559558 Manufacturer: ef
5210 13:42:22.562455 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5211 13:42:22.569334 WARNING: RO_VPD is uninitialized or empty.
5212 13:42:22.572925 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5213 13:42:22.575755 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5214 13:42:22.585352 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5215 13:42:22.589237 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5216 13:42:22.595519 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5217 13:42:22.595604 Enumerating buses...
5218 13:42:22.601916 Show all devs... Before device enumeration.
5219 13:42:22.602001 Root Device: enabled 1
5220 13:42:22.605393 CPU_CLUSTER: 0: enabled 1
5221 13:42:22.605478 CPU: 00: enabled 1
5222 13:42:22.608777 Compare with tree...
5223 13:42:22.611805 Root Device: enabled 1
5224 13:42:22.611889 CPU_CLUSTER: 0: enabled 1
5225 13:42:22.615305 CPU: 00: enabled 1
5226 13:42:22.618680 Root Device scanning...
5227 13:42:22.621685 root_dev_scan_bus for Root Device
5228 13:42:22.621768 CPU_CLUSTER: 0 enabled
5229 13:42:22.625469 root_dev_scan_bus for Root Device done
5230 13:42:22.632211 scan_bus: scanning of bus Root Device took 10690 usecs
5231 13:42:22.632294 done
5232 13:42:22.635011 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5233 13:42:22.638512 Allocating resources...
5234 13:42:22.638594 Reading resources...
5235 13:42:22.645045 Root Device read_resources bus 0 link: 0
5236 13:42:22.648425 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5237 13:42:22.652016 CPU: 00 missing read_resources
5238 13:42:22.655324 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5239 13:42:22.658232 Root Device read_resources bus 0 link: 0 done
5240 13:42:22.661545 Done reading resources.
5241 13:42:22.665207 Show resources in subtree (Root Device)...After reading.
5242 13:42:22.668203 Root Device child on link 0 CPU_CLUSTER: 0
5243 13:42:22.674818 CPU_CLUSTER: 0 child on link 0 CPU: 00
5244 13:42:22.681973 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5245 13:42:22.682059 CPU: 00
5246 13:42:22.684871 Setting resources...
5247 13:42:22.688218 Root Device assign_resources, bus 0 link: 0
5248 13:42:22.691480 CPU_CLUSTER: 0 missing set_resources
5249 13:42:22.694964 Root Device assign_resources, bus 0 link: 0
5250 13:42:22.697949 Done setting resources.
5251 13:42:22.704820 Show resources in subtree (Root Device)...After assigning values.
5252 13:42:22.708387 Root Device child on link 0 CPU_CLUSTER: 0
5253 13:42:22.711721 CPU_CLUSTER: 0 child on link 0 CPU: 00
5254 13:42:22.721348 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5255 13:42:22.721434 CPU: 00
5256 13:42:22.724939 Done allocating resources.
5257 13:42:22.728137 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5258 13:42:22.731128 Enabling resources...
5259 13:42:22.731212 done.
5260 13:42:22.734692 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5261 13:42:22.737781 Initializing devices...
5262 13:42:22.737865 Root Device init ...
5263 13:42:22.744993 mainboard_init: Starting display init.
5264 13:42:22.745077 ADC[4]: Raw value=76102 ID=0
5265 13:42:22.768547 anx7625_power_on_init: Init interface.
5266 13:42:22.771588 anx7625_disable_pd_protocol: Disabled PD feature.
5267 13:42:22.778488 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5268 13:42:22.825100 anx7625_start_dp_work: Secure OCM version=00
5269 13:42:22.828451 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5270 13:42:22.845581 sp_tx_get_edid_block: EDID Block = 1
5271 13:42:22.963201 Extracted contents:
5272 13:42:22.966222 header: 00 ff ff ff ff ff ff 00
5273 13:42:22.969644 serial number: 06 af 5c 14 00 00 00 00 00 1a
5274 13:42:22.973302 version: 01 04
5275 13:42:22.976205 basic params: 95 1a 0e 78 02
5276 13:42:22.979645 chroma info: 99 85 95 55 56 92 28 22 50 54
5277 13:42:22.983043 established: 00 00 00
5278 13:42:22.989585 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5279 13:42:22.992981 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5280 13:42:22.999537 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5281 13:42:23.006300 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5282 13:42:23.012785 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5283 13:42:23.016076 extensions: 00
5284 13:42:23.016485 checksum: ae
5285 13:42:23.016807
5286 13:42:23.019246 Manufacturer: AUO Model 145c Serial Number 0
5287 13:42:23.022693 Made week 0 of 2016
5288 13:42:23.023071 EDID version: 1.4
5289 13:42:23.026152 Digital display
5290 13:42:23.029723 6 bits per primary color channel
5291 13:42:23.030116 DisplayPort interface
5292 13:42:23.033076 Maximum image size: 26 cm x 14 cm
5293 13:42:23.036435 Gamma: 220%
5294 13:42:23.036862 Check DPMS levels
5295 13:42:23.039749 Supported color formats: RGB 4:4:4
5296 13:42:23.042770 First detailed timing is preferred timing
5297 13:42:23.045996 Established timings supported:
5298 13:42:23.049433 Standard timings supported:
5299 13:42:23.049813 Detailed timings
5300 13:42:23.056345 Hex of detail: ce1d56ea50001a3030204600009010000018
5301 13:42:23.059566 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5302 13:42:23.062828 0556 0586 05a6 0640 hborder 0
5303 13:42:23.065968 0300 0304 030a 031a vborder 0
5304 13:42:23.069489 -hsync -vsync
5305 13:42:23.072906 Did detailed timing
5306 13:42:23.075883 Hex of detail: 0000000f0000000000000000000000000020
5307 13:42:23.079202 Manufacturer-specified data, tag 15
5308 13:42:23.085695 Hex of detail: 000000fe0041554f0a202020202020202020
5309 13:42:23.086101 ASCII string: AUO
5310 13:42:23.089703 Hex of detail: 000000fe004231313658414230312e34200a
5311 13:42:23.092751 ASCII string: B116XAB01.4
5312 13:42:23.093130 Checksum
5313 13:42:23.096192 Checksum: 0xae (valid)
5314 13:42:23.102614 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5315 13:42:23.103000 DSI data_rate: 457800000 bps
5316 13:42:23.109987 anx7625_parse_edid: set default k value to 0x3d for panel
5317 13:42:23.113499 anx7625_parse_edid: pixelclock(76300).
5318 13:42:23.116765 hactive(1366), hsync(32), hfp(48), hbp(154)
5319 13:42:23.119903 vactive(768), vsync(6), vfp(4), vbp(16)
5320 13:42:23.123364 anx7625_dsi_config: config dsi.
5321 13:42:23.131401 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5322 13:42:23.152184 anx7625_dsi_config: success to config DSI
5323 13:42:23.155696 anx7625_dp_start: MIPI phy setup OK.
5324 13:42:23.158989 [SSUSB] Setting up USB HOST controller...
5325 13:42:23.162226 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5326 13:42:23.165394 [SSUSB] phy power-on done.
5327 13:42:23.169316 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5328 13:42:23.173092 in-header: 03 fc 01 00 00 00 00 00
5329 13:42:23.173661 in-data:
5330 13:42:23.179389 handle_proto3_response: EC response with error code: 1
5331 13:42:23.179771 SPM: pcm index = 1
5332 13:42:23.182963 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5333 13:42:23.185893 CBFS @ 21000 size 3d4000
5334 13:42:23.192821 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5335 13:42:23.196162 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5336 13:42:23.199147 CBFS: Found @ offset 1e7c0 size 1026
5337 13:42:23.206286 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5338 13:42:23.209055 SPM: binary array size = 2988
5339 13:42:23.212425 SPM: version = pcm_allinone_v1.17.2_20180829
5340 13:42:23.215823 SPM binary loaded in 32 msecs
5341 13:42:23.223279 spm_kick_im_to_fetch: ptr = 000000004021eec2
5342 13:42:23.226586 spm_kick_im_to_fetch: len = 2988
5343 13:42:23.226788 SPM: spm_kick_pcm_to_run
5344 13:42:23.230191 SPM: spm_kick_pcm_to_run done
5345 13:42:23.233347 SPM: spm_init done in 52 msecs
5346 13:42:23.236611 Root Device init finished in 494975 usecs
5347 13:42:23.239802 CPU_CLUSTER: 0 init ...
5348 13:42:23.249659 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5349 13:42:23.253347 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5350 13:42:23.256118 CBFS @ 21000 size 3d4000
5351 13:42:23.259514 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5352 13:42:23.262925 CBFS: Locating 'sspm.bin'
5353 13:42:23.266505 CBFS: Found @ offset 208c0 size 41cb
5354 13:42:23.276771 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5355 13:42:23.284488 CPU_CLUSTER: 0 init finished in 42803 usecs
5356 13:42:23.284573 Devices initialized
5357 13:42:23.287974 Show all devs... After init.
5358 13:42:23.291127 Root Device: enabled 1
5359 13:42:23.291210 CPU_CLUSTER: 0: enabled 1
5360 13:42:23.294086 CPU: 00: enabled 1
5361 13:42:23.297536 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5362 13:42:23.300846 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5363 13:42:23.304121 ELOG: NV offset 0x558000 size 0x1000
5364 13:42:23.311795 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5365 13:42:23.318757 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5366 13:42:23.322216 ELOG: Event(17) added with size 13 at 2024-07-18 13:42:13 UTC
5367 13:42:23.325038 out: cmd=0x121: 03 db 21 01 00 00 00 00
5368 13:42:23.328379 in-header: 03 f4 00 00 2c 00 00 00
5369 13:42:23.342156 in-data: 92 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 ab f4 01 00 06 80 00 00 ae 62 03 00 06 80 00 00 ed e2 00 00 06 80 00 00 79 da 01 00
5370 13:42:23.345785 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5371 13:42:23.348997 in-header: 03 19 00 00 08 00 00 00
5372 13:42:23.352304 in-data: a2 e0 47 00 13 00 00 00
5373 13:42:23.355678 Chrome EC: UHEPI supported
5374 13:42:23.362354 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5375 13:42:23.365269 in-header: 03 e1 00 00 08 00 00 00
5376 13:42:23.368854 in-data: 84 20 60 10 00 00 00 00
5377 13:42:23.372270 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5378 13:42:23.378843 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5379 13:42:23.381986 in-header: 03 e1 00 00 08 00 00 00
5380 13:42:23.385229 in-data: 84 20 60 10 00 00 00 00
5381 13:42:23.392362 ELOG: Event(A1) added with size 10 at 2024-07-18 13:42:13 UTC
5382 13:42:23.398478 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5383 13:42:23.402056 ELOG: Event(A0) added with size 9 at 2024-07-18 13:42:13 UTC
5384 13:42:23.409012 elog_add_boot_reason: Logged dev mode boot
5385 13:42:23.409542 Finalize devices...
5386 13:42:23.412299 Devices finalized
5387 13:42:23.415272 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5388 13:42:23.418393 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5389 13:42:23.425103 ELOG: Event(91) added with size 10 at 2024-07-18 13:42:13 UTC
5390 13:42:23.428686 Writing coreboot table at 0xffeda000
5391 13:42:23.431966 0. 0000000000114000-000000000011efff: RAMSTAGE
5392 13:42:23.438305 1. 0000000040000000-000000004023cfff: RAMSTAGE
5393 13:42:23.441611 2. 000000004023d000-00000000545fffff: RAM
5394 13:42:23.445330 3. 0000000054600000-000000005465ffff: BL31
5395 13:42:23.448269 4. 0000000054660000-00000000ffed9fff: RAM
5396 13:42:23.455175 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5397 13:42:23.458255 6. 0000000100000000-000000013fffffff: RAM
5398 13:42:23.461644 Passing 5 GPIOs to payload:
5399 13:42:23.465159 NAME | PORT | POLARITY | VALUE
5400 13:42:23.468418 write protect | 0x00000096 | low | high
5401 13:42:23.475167 EC in RW | 0x000000b1 | high | undefined
5402 13:42:23.478057 EC interrupt | 0x00000097 | low | undefined
5403 13:42:23.484687 TPM interrupt | 0x00000099 | high | undefined
5404 13:42:23.488538 speaker enable | 0x000000af | high | undefined
5405 13:42:23.491703 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5406 13:42:23.495061 in-header: 03 f7 00 00 02 00 00 00
5407 13:42:23.498428 in-data: 04 00
5408 13:42:23.498814 Board ID: 4
5409 13:42:23.501463 ADC[3]: Raw value=215504 ID=1
5410 13:42:23.501849 RAM code: 1
5411 13:42:23.502153 SKU ID: 16
5412 13:42:23.508314 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5413 13:42:23.508753 CBFS @ 21000 size 3d4000
5414 13:42:23.514650 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5415 13:42:23.521483 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum abcc
5416 13:42:23.521875 coreboot table: 940 bytes.
5417 13:42:23.528441 IMD ROOT 0. 00000000fffff000 00001000
5418 13:42:23.531678 IMD SMALL 1. 00000000ffffe000 00001000
5419 13:42:23.534656 CONSOLE 2. 00000000fffde000 00020000
5420 13:42:23.538040 FMAP 3. 00000000fffdd000 0000047c
5421 13:42:23.541324 TIME STAMP 4. 00000000fffdc000 00000910
5422 13:42:23.544982 RAMOOPS 5. 00000000ffedc000 00100000
5423 13:42:23.548521 COREBOOT 6. 00000000ffeda000 00002000
5424 13:42:23.551451 IMD small region:
5425 13:42:23.554942 IMD ROOT 0. 00000000ffffec00 00000400
5426 13:42:23.558209 VBOOT WORK 1. 00000000ffffeb00 00000100
5427 13:42:23.561398 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5428 13:42:23.564495 VPD 3. 00000000ffffea60 0000006c
5429 13:42:23.571340 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5430 13:42:23.578273 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5431 13:42:23.581236 in-header: 03 e1 00 00 08 00 00 00
5432 13:42:23.584620 in-data: 84 20 60 10 00 00 00 00
5433 13:42:23.587982 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5434 13:42:23.591325 CBFS @ 21000 size 3d4000
5435 13:42:23.594532 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5436 13:42:23.597815 CBFS: Locating 'fallback/payload'
5437 13:42:23.606368 CBFS: Found @ offset dc040 size 439a0
5438 13:42:23.694502 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5439 13:42:23.697794 Checking segment from ROM address 0x0000000040003a00
5440 13:42:23.704256 Checking segment from ROM address 0x0000000040003a1c
5441 13:42:23.707360 Loading segment from ROM address 0x0000000040003a00
5442 13:42:23.711134 code (compression=0)
5443 13:42:23.721070 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5444 13:42:23.727778 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5445 13:42:23.730564 it's not compressed!
5446 13:42:23.733960 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5447 13:42:23.740408 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5448 13:42:23.748577 Loading segment from ROM address 0x0000000040003a1c
5449 13:42:23.751978 Entry Point 0x0000000080000000
5450 13:42:23.752429 Loaded segments
5451 13:42:23.758541 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5452 13:42:23.761840 Jumping to boot code at 0000000080000000(00000000ffeda000)
5453 13:42:23.771591 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5454 13:42:23.774923 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5455 13:42:23.778138 CBFS @ 21000 size 3d4000
5456 13:42:23.785085 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5457 13:42:23.788326 CBFS: Locating 'fallback/bl31'
5458 13:42:23.791230 CBFS: Found @ offset 36dc0 size 5820
5459 13:42:23.802490 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5460 13:42:23.806053 Checking segment from ROM address 0x0000000040003a00
5461 13:42:23.812348 Checking segment from ROM address 0x0000000040003a1c
5462 13:42:23.815871 Loading segment from ROM address 0x0000000040003a00
5463 13:42:23.819008 code (compression=1)
5464 13:42:23.825753 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5465 13:42:23.835725 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5466 13:42:23.836260 using LZMA
5467 13:42:23.844351 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5468 13:42:23.850786 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5469 13:42:23.854326 Loading segment from ROM address 0x0000000040003a1c
5470 13:42:23.857686 Entry Point 0x0000000054601000
5471 13:42:23.858066 Loaded segments
5472 13:42:23.860768 NOTICE: MT8183 bl31_setup
5473 13:42:23.867992 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5474 13:42:23.871330 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5475 13:42:23.875045 INFO: [DEVAPC] dump DEVAPC registers:
5476 13:42:23.884635 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5477 13:42:23.891390 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5478 13:42:23.901412 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5479 13:42:23.907974 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5480 13:42:23.918090 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5481 13:42:23.924952 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5482 13:42:23.934493 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5483 13:42:23.941320 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5484 13:42:23.947647 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5485 13:42:23.958091 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5486 13:42:23.964510 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5487 13:42:23.974675 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5488 13:42:23.981185 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5489 13:42:23.987719 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5490 13:42:23.997869 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5491 13:42:24.004664 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5492 13:42:24.011077 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5493 13:42:24.018026 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5494 13:42:24.028047 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5495 13:42:24.034399 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5496 13:42:24.040720 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5497 13:42:24.047793 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5498 13:42:24.050871 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5499 13:42:24.054237 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5500 13:42:24.057697 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5501 13:42:24.060920 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5502 13:42:24.063776 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5503 13:42:24.070573 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5504 13:42:24.076984 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5505 13:42:24.077069 WARNING: region 0:
5506 13:42:24.080315 WARNING: apc:0x168, sa:0x0, ea:0xfff
5507 13:42:24.083723 WARNING: region 1:
5508 13:42:24.087041 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5509 13:42:24.087128 WARNING: region 2:
5510 13:42:24.090400 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5511 13:42:24.093517 WARNING: region 3:
5512 13:42:24.096756 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5513 13:42:24.096840 WARNING: region 4:
5514 13:42:24.103936 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5515 13:42:24.104020 WARNING: region 5:
5516 13:42:24.106919 WARNING: apc:0x0, sa:0x0, ea:0x0
5517 13:42:24.110571 WARNING: region 6:
5518 13:42:24.110654 WARNING: apc:0x0, sa:0x0, ea:0x0
5519 13:42:24.113543 WARNING: region 7:
5520 13:42:24.116811 WARNING: apc:0x0, sa:0x0, ea:0x0
5521 13:42:24.123598 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5522 13:42:24.126732 INFO: SPM: enable SPMC mode
5523 13:42:24.130232 NOTICE: spm_boot_init() start
5524 13:42:24.133293 NOTICE: spm_boot_init() end
5525 13:42:24.136640 INFO: BL31: Initializing runtime services
5526 13:42:24.140052 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5527 13:42:24.147101 INFO: BL31: Preparing for EL3 exit to normal world
5528 13:42:24.149983 INFO: Entry point address = 0x80000000
5529 13:42:24.153493 INFO: SPSR = 0x8
5530 13:42:24.174119
5531 13:42:24.174201
5532 13:42:24.174265
5533 13:42:24.174734 end: 2.2.3 depthcharge-start (duration 00:00:24) [common]
5534 13:42:24.174838 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5535 13:42:24.174918 Setting prompt string to ['jacuzzi:']
5536 13:42:24.174989 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5537 13:42:24.177584 Starting depthcharge on Juniper...
5538 13:42:24.177667
5539 13:42:24.181176 vboot_handoff: creating legacy vboot_handoff structure
5540 13:42:24.181259
5541 13:42:24.183966 ec_init(0): CrosEC protocol v3 supported (544, 544)
5542 13:42:24.184049
5543 13:42:24.187482 Wipe memory regions:
5544 13:42:24.187564
5545 13:42:24.190677 [0x00000040000000, 0x00000054600000)
5546 13:42:24.233677
5547 13:42:24.233766 [0x00000054660000, 0x00000080000000)
5548 13:42:24.324990
5549 13:42:24.325102 [0x000000811994a0, 0x000000ffeda000)
5550 13:42:24.585592
5551 13:42:24.586048 [0x00000100000000, 0x00000140000000)
5552 13:42:24.718354
5553 13:42:24.721761 Initializing XHCI USB controller at 0x11200000.
5554 13:42:24.744517
5555 13:42:24.747685 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5556 13:42:24.748076
5557 13:42:24.748382
5558 13:42:24.749064 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5559 13:42:24.749411 Sending line: 'tftpboot 192.168.201.1 14879034/tftp-deploy-uolv_d5l/kernel/image.itb 14879034/tftp-deploy-uolv_d5l/kernel/cmdline '
5561 13:42:24.850585 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5562 13:42:24.850956 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5563 13:42:24.855155 jacuzzi: tftpboot 192.168.201.1 14879034/tftp-deploy-uolv_d5l/kernel/image.ittp-deploy-uolv_d5l/kernel/cmdline
5564 13:42:24.855548
5565 13:42:24.855853 Waiting for link
5566 13:42:25.258018
5567 13:42:25.258556 R8152: Initializing
5568 13:42:25.258868
5569 13:42:25.261415 Version 9 (ocp_data = 6010)
5570 13:42:25.261805
5571 13:42:25.264913 R8152: Done initializing
5572 13:42:25.265298
5573 13:42:25.265600 Adding net device
5574 13:42:25.650547
5575 13:42:25.650978 done.
5576 13:42:25.651285
5577 13:42:25.651570 MAC: 00:e0:4c:68:0b:b9
5578 13:42:25.651843
5579 13:42:25.653683 Sending DHCP discover... done.
5580 13:42:25.654070
5581 13:42:25.657088 Waiting for reply... done.
5582 13:42:25.657539
5583 13:42:25.660076 Sending DHCP request... done.
5584 13:42:25.660240
5585 13:42:25.663515 Waiting for reply... done.
5586 13:42:25.663680
5587 13:42:25.663836 My ip is 192.168.201.13
5588 13:42:25.663967
5589 13:42:25.667048 The DHCP server ip is 192.168.201.1
5590 13:42:25.667248
5591 13:42:25.673262 TFTP server IP predefined by user: 192.168.201.1
5592 13:42:25.673430
5593 13:42:25.680311 Bootfile predefined by user: 14879034/tftp-deploy-uolv_d5l/kernel/image.itb
5594 13:42:25.680496
5595 13:42:25.683188 Sending tftp read request... done.
5596 13:42:25.683386
5597 13:42:25.688185 Waiting for the transfer...
5598 13:42:25.688408
5599 13:42:25.984539 00000000 ################################################################
5600 13:42:25.984701
5601 13:42:26.249055 00080000 ################################################################
5602 13:42:26.249180
5603 13:42:26.527926 00100000 ################################################################
5604 13:42:26.528064
5605 13:42:26.785202 00180000 ################################################################
5606 13:42:26.785329
5607 13:42:27.062845 00200000 ################################################################
5608 13:42:27.062976
5609 13:42:27.339057 00280000 ################################################################
5610 13:42:27.339185
5611 13:42:27.607085 00300000 ################################################################
5612 13:42:27.607241
5613 13:42:27.853007 00380000 ################################################################
5614 13:42:27.853161
5615 13:42:28.103708 00400000 ################################################################
5616 13:42:28.103839
5617 13:42:28.387230 00480000 ################################################################
5618 13:42:28.387370
5619 13:42:28.643544 00500000 ################################################################
5620 13:42:28.643740
5621 13:42:28.901248 00580000 ################################################################
5622 13:42:28.901404
5623 13:42:29.160860 00600000 ################################################################
5624 13:42:29.160977
5625 13:42:29.411357 00680000 ################################################################
5626 13:42:29.411488
5627 13:42:29.696378 00700000 ################################################################
5628 13:42:29.696528
5629 13:42:29.948982 00780000 ################################################################
5630 13:42:29.949122
5631 13:42:30.198874 00800000 ################################################################
5632 13:42:30.198997
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5634 13:42:30.453565
5635 13:42:30.720357 00900000 ################################################################
5636 13:42:30.720555
5637 13:42:30.991787 00980000 ################################################################
5638 13:42:30.991920
5639 13:42:31.239830 00a00000 ################################################################
5640 13:42:31.239980
5641 13:42:31.485942 00a80000 ################################################################
5642 13:42:31.486065
5643 13:42:31.743057 00b00000 ################################################################
5644 13:42:31.743176
5645 13:42:31.993374 00b80000 ################################################################
5646 13:42:31.993504
5647 13:42:32.246537 00c00000 ################################################################
5648 13:42:32.246661
5649 13:42:32.524661 00c80000 ################################################################
5650 13:42:32.524787
5651 13:42:32.794635 00d00000 ################################################################
5652 13:42:32.794803
5653 13:42:33.059857 00d80000 ################################################################
5654 13:42:33.060023
5655 13:42:33.310106 00e00000 ################################################################
5656 13:42:33.310278
5657 13:42:33.577472 00e80000 ################################################################
5658 13:42:33.577594
5659 13:42:33.838580 00f00000 ################################################################
5660 13:42:33.838730
5661 13:42:34.108014 00f80000 ################################################################
5662 13:42:34.108163
5663 13:42:34.378531 01000000 ################################################################
5664 13:42:34.378716
5665 13:42:34.642808 01080000 ################################################################
5666 13:42:34.642987
5667 13:42:34.908109 01100000 ################################################################
5668 13:42:34.908261
5669 13:42:35.179700 01180000 ################################################################
5670 13:42:35.179836
5671 13:42:35.442904 01200000 ################################################################
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5673 13:42:35.712096 01280000 ################################################################
5674 13:42:35.712251
5675 13:42:35.985769 01300000 ################################################################
5676 13:42:35.985899
5677 13:42:36.253534 01380000 ################################################################
5678 13:42:36.253681
5679 13:42:36.519695 01400000 ################################################################
5680 13:42:36.519841
5681 13:42:36.783954 01480000 ################################################################
5682 13:42:36.784102
5683 13:42:37.061567 01500000 ################################################################
5684 13:42:37.061687
5685 13:42:37.324648 01580000 ################################################################
5686 13:42:37.324784
5687 13:42:37.590931 01600000 ################################################################
5688 13:42:37.591082
5689 13:42:37.844249 01680000 ################################################################
5690 13:42:37.844408
5691 13:42:38.101619 01700000 ################################################################
5692 13:42:38.101742
5693 13:42:38.360970 01780000 ################################################################
5694 13:42:38.361126
5695 13:42:38.624385 01800000 ################################################################
5696 13:42:38.624541
5697 13:42:38.885922 01880000 ################################################################
5698 13:42:38.886040
5699 13:42:39.151460 01900000 ################################################################
5700 13:42:39.151614
5701 13:42:39.419541 01980000 ################################################################
5702 13:42:39.419658
5703 13:42:39.684626 01a00000 ################################################################
5704 13:42:39.684750
5705 13:42:39.946298 01a80000 ################################################################
5706 13:42:39.946470
5707 13:42:40.203162 01b00000 ################################################################
5708 13:42:40.203318
5709 13:42:40.484197 01b80000 ################################################################
5710 13:42:40.484360
5711 13:42:40.748771 01c00000 ################################################################
5712 13:42:40.748934
5713 13:42:41.005410 01c80000 ################################################################
5714 13:42:41.005574
5715 13:42:41.264127 01d00000 ################################################################
5716 13:42:41.264281
5717 13:42:41.523983 01d80000 ################################################################
5718 13:42:41.524135
5719 13:42:41.790193 01e00000 ################################################################
5720 13:42:41.790349
5721 13:42:42.052689 01e80000 ################################################################
5722 13:42:42.052849
5723 13:42:42.310991 01f00000 ################################################################
5724 13:42:42.311149
5725 13:42:42.588635 01f80000 ################################################################
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5727 13:42:42.841687 02000000 ################################################################
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5729 13:42:43.097751 02080000 ################################################################
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5731 13:42:43.355252 02100000 ################################################################
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5734 13:42:43.616044
5735 13:42:43.880754 02200000 ################################################################
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5741 13:42:44.771171 02380000 ################################################################
5742 13:42:44.771331
5743 13:42:45.033610 02400000 ################################################################
5744 13:42:45.033774
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5746 13:42:45.299369
5747 13:42:45.569547 02500000 ################################################################
5748 13:42:45.569705
5749 13:42:45.835980 02580000 ################################################################
5750 13:42:45.836111
5751 13:42:46.144710 02600000 ################################################################
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5754 13:42:46.442872
5755 13:42:46.708104 02700000 ################################################################
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5760 13:42:47.246944
5761 13:42:47.511228 02880000 ################################################################
5762 13:42:47.511396
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5764 13:42:47.775144
5765 13:42:48.047848 02980000 ################################################################
5766 13:42:48.047986
5767 13:42:48.316759 02a00000 ################################################################
5768 13:42:48.316913
5769 13:42:48.580544 02a80000 ################################################################
5770 13:42:48.580701
5771 13:42:48.848229 02b00000 ################################################################
5772 13:42:48.848382
5773 13:42:49.154372 02b80000 ################################################################
5774 13:42:49.154547
5775 13:42:49.419850 02c00000 ################################################################
5776 13:42:49.419990
5777 13:42:49.683777 02c80000 ################################################################
5778 13:42:49.683914
5779 13:42:49.957696 02d00000 ################################################################
5780 13:42:49.957834
5781 13:42:50.217250 02d80000 ################################################################
5782 13:42:50.217389
5783 13:42:50.491755 02e00000 ################################################################
5784 13:42:50.491885
5785 13:42:50.752782 02e80000 ################################################################
5786 13:42:50.752938
5787 13:42:51.026105 02f00000 ################################################################
5788 13:42:51.026256
5789 13:42:51.293383 02f80000 ################################################################
5790 13:42:51.293539
5791 13:42:51.554422 03000000 ################################################################
5792 13:42:51.554580
5793 13:42:51.826636 03080000 ################################################################
5794 13:42:51.826767
5795 13:42:52.111798 03100000 ################################################################
5796 13:42:52.111922
5797 13:42:52.396413 03180000 ################################################################
5798 13:42:52.396586
5799 13:42:52.676705 03200000 ################################################################
5800 13:42:52.676888
5801 13:42:52.939110 03280000 ################################################################
5802 13:42:52.939264
5803 13:42:53.205183 03300000 ################################################################
5804 13:42:53.205350
5805 13:42:53.466207 03380000 ################################################################
5806 13:42:53.466337
5807 13:42:53.724846 03400000 ################################################################
5808 13:42:53.725009
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5810 13:42:53.991716
5811 13:42:54.250313 03500000 ################################################################
5812 13:42:54.250482
5813 13:42:54.526227 03580000 ################################################################
5814 13:42:54.526363
5815 13:42:54.785938 03600000 ################################################################
5816 13:42:54.786078
5817 13:42:55.345885 03680000 ################################################################
5818 13:42:55.346060
5819 13:42:55.616055 03700000 ################################################################
5820 13:42:55.616179
5821 13:42:55.878728 03780000 ################################################################
5822 13:42:55.878863
5823 13:42:56.140961 03800000 ################################################################
5824 13:42:56.141123
5825 13:42:56.403841 03880000 ################################################################
5826 13:42:56.404024
5827 13:42:56.684671 03900000 ################################################################
5828 13:42:56.684835
5829 13:42:56.944867 03980000 ################################################################
5830 13:42:56.945035
5831 13:42:57.201334 03a00000 ################################################################
5832 13:42:57.201498
5833 13:42:57.458336 03a80000 ################################################################
5834 13:42:57.458488
5835 13:42:57.715328 03b00000 ################################################################
5836 13:42:57.715493
5837 13:42:57.971558 03b80000 ################################################################
5838 13:42:57.971696
5839 13:42:58.229882 03c00000 ################################################################
5840 13:42:58.230008
5841 13:42:58.493182 03c80000 ################################################################
5842 13:42:58.493319
5843 13:42:58.757101 03d00000 ################################################################
5844 13:42:58.757263
5845 13:42:59.020063 03d80000 ################################################################
5846 13:42:59.020207
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5848 13:42:59.283590
5849 13:42:59.571285 03e80000 ################################################################
5850 13:42:59.571449
5851 13:42:59.853831 03f00000 ################################################################
5852 13:42:59.853994
5853 13:43:00.141029 03f80000 ################################################################
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5855 13:43:00.428890 04000000 ################################################################
5856 13:43:00.429069
5857 13:43:00.707054 04080000 ################################################################
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5860 13:43:00.991779
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5862 13:43:01.267896
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5864 13:43:01.527535
5865 13:43:01.791245 04280000 ################################################################
5866 13:43:01.791422
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5868 13:43:02.045084
5869 13:43:02.301583 04380000 ################################################################
5870 13:43:02.301746
5871 13:43:02.558757 04400000 ################################################################
5872 13:43:02.558928
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5874 13:43:02.813063
5875 13:43:03.073097 04500000 ################################################################
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5877 13:43:03.313019 04580000 ################################################################
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5880 13:43:03.551468
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5887 13:43:04.561743 04800000 ################################################################
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5889 13:43:04.829227 04880000 ################################################################
5890 13:43:04.829386
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5894 13:43:05.369170
5895 13:43:05.635907 04a00000 ################################################################
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5897 13:43:05.898336 04a80000 ################################################################
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5900 13:43:06.160104
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5905 13:43:07.010572 04c80000 ################################################################
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5910 13:43:07.572353
5911 13:43:07.837331 04e00000 ################################################################
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5913 13:43:08.136669 04e80000 ################################################################
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5923 13:43:09.524685 05100000 ################################################################
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5927 13:43:10.104802 05200000 ################################################################
5928 13:43:10.104964
5929 13:43:10.374098 05280000 ################################################################
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5933 13:43:10.980122 05380000 ################################################################
5934 13:43:10.980250
5935 13:43:11.257385 05400000 ################################################################
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5939 13:43:11.841350 05500000 ################################################################
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5945 13:43:12.726267 05680000 ################################################################
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5951 13:43:13.573259 05800000 ################################################################
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5959 13:43:14.725214 05a00000 ################################################################
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5965 13:43:15.572052 05b80000 ################################################################
5966 13:43:15.572199
5967 13:43:15.853174 05c00000 ################################################################
5968 13:43:15.853294
5969 13:43:16.131695 05c80000 ################################################################
5970 13:43:16.131842
5971 13:43:16.404366 05d00000 ################################################################
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5973 13:43:16.671037 05d80000 ################################################################
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5975 13:43:16.949505 05e00000 ################################################################
5976 13:43:16.949634
5977 13:43:17.256468 05e80000 ################################################################
5978 13:43:17.256600
5979 13:43:17.539363 05f00000 ################################################################
5980 13:43:17.539494
5981 13:43:17.816868 05f80000 ################################################################
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5985 13:43:18.368504 06080000 ################################################################
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5988 13:43:18.641419
5989 13:43:18.911045 06180000 ################################################################
5990 13:43:18.911164
5991 13:43:19.186675 06200000 ################################################################
5992 13:43:19.186796
5993 13:43:19.476273 06280000 ################################################################
5994 13:43:19.476399
5995 13:43:19.757164 06300000 ################################################################
5996 13:43:19.757288
5997 13:43:20.043454 06380000 ################################################################
5998 13:43:20.043616
5999 13:43:20.330978 06400000 ################################################################
6000 13:43:20.331107
6001 13:43:20.638676 06480000 ################################################################
6002 13:43:20.638808
6003 13:43:20.932840 06500000 ################################################################
6004 13:43:20.932972
6005 13:43:21.232314 06580000 ################################################################
6006 13:43:21.232474
6007 13:43:21.520967 06600000 ################################################################
6008 13:43:21.521100
6009 13:43:21.805226 06680000 ################################################################
6010 13:43:21.805387
6011 13:43:22.084123 06700000 ################################################################
6012 13:43:22.084251
6013 13:43:22.361074 06780000 ################################################################
6014 13:43:22.361202
6015 13:43:22.634904 06800000 ################################################################
6016 13:43:22.635056
6017 13:43:22.916604 06880000 ################################################################
6018 13:43:22.916739
6019 13:43:23.197722 06900000 ################################################################
6020 13:43:23.197853
6021 13:43:23.473342 06980000 ################################################################
6022 13:43:23.473477
6023 13:43:23.767856 06a00000 ################################################################
6024 13:43:23.768031
6025 13:43:24.050170 06a80000 ################################################################
6026 13:43:24.050306
6027 13:43:24.340903 06b00000 ################################################################
6028 13:43:24.341040
6029 13:43:24.640980 06b80000 ################################################################
6030 13:43:24.641109
6031 13:43:24.944481 06c00000 ################################################################
6032 13:43:24.944612
6033 13:43:25.235223 06c80000 ################################################################
6034 13:43:25.235355
6035 13:43:25.519677 06d00000 ################################################################
6036 13:43:25.519810
6037 13:43:25.819738 06d80000 ################################################################
6038 13:43:25.819872
6039 13:43:26.110491 06e00000 ################################################################
6040 13:43:26.110623
6041 13:43:26.390203 06e80000 ################################################################
6042 13:43:26.390355
6043 13:43:26.664160 06f00000 ################################################################
6044 13:43:26.664289
6045 13:43:26.936830 06f80000 ################################################################
6046 13:43:26.936964
6047 13:43:27.211914 07000000 ################################################################
6048 13:43:27.212048
6049 13:43:27.487242 07080000 ################################################################
6050 13:43:27.487373
6051 13:43:27.767173 07100000 ################################################################
6052 13:43:27.767361
6053 13:43:28.023900 07180000 ################################################################
6054 13:43:28.024044
6055 13:43:28.281745 07200000 ################################################################
6056 13:43:28.281916
6057 13:43:28.537995 07280000 ################################################################
6058 13:43:28.538126
6059 13:43:28.794983 07300000 ################################################################
6060 13:43:28.795107
6061 13:43:29.050544 07380000 ################################################################
6062 13:43:29.050706
6063 13:43:29.305641 07400000 ################################################################ done.
6064 13:43:29.305783
6065 13:43:29.308632 The bootfile was 122157266 bytes long.
6066 13:43:29.308722
6067 13:43:29.312246 Sending tftp read request... done.
6068 13:43:29.312352
6069 13:43:29.312447 Waiting for the transfer...
6070 13:43:29.312555
6071 13:43:29.315869 00000000 # done.
6072 13:43:29.315981
6073 13:43:29.322129 Command line loaded dynamically from TFTP file: 14879034/tftp-deploy-uolv_d5l/kernel/cmdline
6074 13:43:29.322214
6075 13:43:29.338929 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
6076 13:43:29.339022
6077 13:43:29.342183 Loading FIT.
6078 13:43:29.342261
6079 13:43:29.345543 Image ramdisk-1 has 108983057 bytes.
6080 13:43:29.345621
6081 13:43:29.345685 Image fdt-1 has 57695 bytes.
6082 13:43:29.348687
6083 13:43:29.348767 Image kernel-1 has 13114469 bytes.
6084 13:43:29.348830
6085 13:43:29.358601 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
6086 13:43:29.358686
6087 13:43:29.371684 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
6088 13:43:29.371769
6089 13:43:29.375206 Choosing best match conf-1 for compat google,juniper-sku16.
6090 13:43:29.380571
6091 13:43:29.385164 Connected to device vid:did:rid of 1ae0:0028:00
6092 13:43:29.393344
6093 13:43:29.396338 tpm_get_response: command 0x17b, return code 0x0
6094 13:43:29.396439
6095 13:43:29.399951 tpm_cleanup: add release locality here.
6096 13:43:29.400050
6097 13:43:29.402882 Shutting down all USB controllers.
6098 13:43:29.402982
6099 13:43:29.406408 Removing current net device
6100 13:43:29.406481
6101 13:43:29.409914 Exiting depthcharge with code 4 at timestamp: 82537032
6102 13:43:29.409991
6103 13:43:29.413239 LZMA decompressing kernel-1 to 0x80193568
6104 13:43:29.413316
6105 13:43:29.419694 LZMA decompressing kernel-1 to 0x40000000
6106 13:43:31.281539
6107 13:43:31.281659 jumping to kernel
6108 13:43:31.282669 end: 2.2.4 bootloader-commands (duration 00:01:07) [common]
6109 13:43:31.282804 start: 2.2.5 auto-login-action (timeout 00:03:20) [common]
6110 13:43:31.282910 Setting prompt string to ['Linux version [0-9]']
6111 13:43:31.283015 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
6112 13:43:31.283126 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
6113 13:43:31.356830
6114 13:43:31.359798 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
6115 13:43:31.363466 start: 2.2.5.1 login-action (timeout 00:03:20) [common]
6116 13:43:31.363573 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
6117 13:43:31.363648 Setting prompt string to []
6118 13:43:31.363729 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
6119 13:43:31.363802 Using line separator: #'\n'#
6120 13:43:31.363861 No login prompt set.
6121 13:43:31.363924 Parsing kernel messages
6122 13:43:31.363981 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
6123 13:43:31.364088 [login-action] Waiting for messages, (timeout 00:03:20)
6124 13:43:31.364152 Waiting using forced prompt support (timeout 00:01:40)
6125 13:43:31.383131 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j272990-arm64-gcc-12-defconfig-arm64-chromebook-fgzcq) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Thu Jul 18 12:53:03 UTC 2024
6126 13:43:31.386309 [ 0.000000] random: crng init done
6127 13:43:31.389847 [ 0.000000] Machine model: Google juniper sku16 board
6128 13:43:31.392880 [ 0.000000] efi: UEFI not found.
6129 13:43:31.402848 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
6130 13:43:31.409151 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
6131 13:43:31.419215 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
6132 13:43:31.422328 [ 0.000000] printk: bootconsole [mtk8250] enabled
6133 13:43:31.430728 [ 0.000000] NUMA: No NUMA configuration found
6134 13:43:31.437370 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
6135 13:43:31.443853 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
6136 13:43:31.443956 [ 0.000000] Zone ranges:
6137 13:43:31.450960 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
6138 13:43:31.453917 [ 0.000000] DMA32 empty
6139 13:43:31.460472 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
6140 13:43:31.464174 [ 0.000000] Movable zone start for each node
6141 13:43:31.467062 [ 0.000000] Early memory node ranges
6142 13:43:31.474048 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
6143 13:43:31.480380 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
6144 13:43:31.486946 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
6145 13:43:31.493591 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
6146 13:43:31.500021 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
6147 13:43:31.506673 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
6148 13:43:31.527225 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
6149 13:43:31.534035 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
6150 13:43:31.540703 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
6151 13:43:31.543696 [ 0.000000] psci: probing for conduit method from DT.
6152 13:43:31.550592 [ 0.000000] psci: PSCIv1.1 detected in firmware.
6153 13:43:31.553429 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
6154 13:43:31.560427 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
6155 13:43:31.564032 [ 0.000000] psci: SMC Calling Convention v1.1
6156 13:43:31.570284 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
6157 13:43:31.573517 [ 0.000000] Detected VIPT I-cache on CPU0
6158 13:43:31.580316 [ 0.000000] CPU features: detected: GIC system register CPU interface
6159 13:43:31.586913 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
6160 13:43:31.593391 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
6161 13:43:31.600359 [ 0.000000] CPU features: detected: ARM erratum 845719
6162 13:43:31.603472 [ 0.000000] alternatives: applying boot alternatives
6163 13:43:31.606943 [ 0.000000] Fallback order for Node 0: 0
6164 13:43:31.613354 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
6165 13:43:31.616635 [ 0.000000] Policy zone: Normal
6166 13:43:31.636492 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
6167 13:43:31.649981 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
6168 13:43:31.656329 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
6169 13:43:31.666214 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
6170 13:43:31.673425 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
6171 13:43:31.676244 <6>[ 0.000000] software IO TLB: area num 8.
6172 13:43:31.702656 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
6173 13:43:31.760416 <6>[ 0.000000] Memory: 3808648K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 349816K reserved, 32768K cma-reserved)
6174 13:43:31.766944 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
6175 13:43:31.773740 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
6176 13:43:31.777219 <6>[ 0.000000] rcu: RCU event tracing is enabled.
6177 13:43:31.783684 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
6178 13:43:31.790329 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
6179 13:43:31.793426 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
6180 13:43:31.803693 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
6181 13:43:31.810184 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
6182 13:43:31.813711 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
6183 13:43:31.825722 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
6184 13:43:31.832115 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
6185 13:43:31.835357 <6>[ 0.000000] GICv3: 640 SPIs implemented
6186 13:43:31.838821 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
6187 13:43:31.845707 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
6188 13:43:31.848570 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
6189 13:43:31.855316 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
6190 13:43:31.868711 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
6191 13:43:31.878792 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
6192 13:43:31.885199 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
6193 13:43:31.897502 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
6194 13:43:31.910693 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
6195 13:43:31.917386 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
6196 13:43:31.923969 <6>[ 0.009475] Console: colour dummy device 80x25
6197 13:43:31.927499 <6>[ 0.014519] printk: console [tty1] enabled
6198 13:43:31.937280 <6>[ 0.018909] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
6199 13:43:31.944228 <6>[ 0.029374] pid_max: default: 32768 minimum: 301
6200 13:43:31.947350 <6>[ 0.034254] LSM: Security Framework initializing
6201 13:43:31.957039 <6>[ 0.039170] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
6202 13:43:31.964066 <6>[ 0.046793] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
6203 13:43:31.970591 <4>[ 0.055680] cacheinfo: Unable to detect cache hierarchy for CPU 0
6204 13:43:31.980778 <6>[ 0.062307] cblist_init_generic: Setting adjustable number of callback queues.
6205 13:43:31.987233 <6>[ 0.069752] cblist_init_generic: Setting shift to 3 and lim to 1.
6206 13:43:31.993700 <6>[ 0.076105] cblist_init_generic: Setting adjustable number of callback queues.
6207 13:43:32.000331 <6>[ 0.083550] cblist_init_generic: Setting shift to 3 and lim to 1.
6208 13:43:32.003764 <6>[ 0.089949] rcu: Hierarchical SRCU implementation.
6209 13:43:32.010622 <6>[ 0.094975] rcu: Max phase no-delay instances is 1000.
6210 13:43:32.017249 <6>[ 0.102889] EFI services will not be available.
6211 13:43:32.020738 <6>[ 0.107839] smp: Bringing up secondary CPUs ...
6212 13:43:32.031395 <6>[ 0.113147] Detected VIPT I-cache on CPU1
6213 13:43:32.037700 <4>[ 0.113194] cacheinfo: Unable to detect cache hierarchy for CPU 1
6214 13:43:32.044494 <6>[ 0.113201] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
6215 13:43:32.051196 <6>[ 0.113232] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
6216 13:43:32.054520 <6>[ 0.113717] Detected VIPT I-cache on CPU2
6217 13:43:32.060747 <4>[ 0.113751] cacheinfo: Unable to detect cache hierarchy for CPU 2
6218 13:43:32.067825 <6>[ 0.113756] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
6219 13:43:32.074389 <6>[ 0.113768] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
6220 13:43:32.080797 <6>[ 0.114211] Detected VIPT I-cache on CPU3
6221 13:43:32.084318 <4>[ 0.114241] cacheinfo: Unable to detect cache hierarchy for CPU 3
6222 13:43:32.094357 <6>[ 0.114246] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
6223 13:43:32.101000 <6>[ 0.114257] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
6224 13:43:32.104316 <6>[ 0.114832] CPU features: detected: Spectre-v2
6225 13:43:32.107275 <6>[ 0.114842] CPU features: detected: Spectre-BHB
6226 13:43:32.113777 <6>[ 0.114846] CPU features: detected: ARM erratum 858921
6227 13:43:32.117455 <6>[ 0.114851] Detected VIPT I-cache on CPU4
6228 13:43:32.123997 <4>[ 0.114901] cacheinfo: Unable to detect cache hierarchy for CPU 4
6229 13:43:32.130609 <6>[ 0.114908] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
6230 13:43:32.137235 <6>[ 0.114916] arch_timer: Enabling local workaround for ARM erratum 858921
6231 13:43:32.144360 <6>[ 0.114927] arch_timer: CPU4: Trapping CNTVCT access
6232 13:43:32.150750 <6>[ 0.114935] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
6233 13:43:32.153688 <6>[ 0.115419] Detected VIPT I-cache on CPU5
6234 13:43:32.160414 <4>[ 0.115460] cacheinfo: Unable to detect cache hierarchy for CPU 5
6235 13:43:32.167233 <6>[ 0.115465] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
6236 13:43:32.176891 <6>[ 0.115472] arch_timer: Enabling local workaround for ARM erratum 858921
6237 13:43:32.180217 <6>[ 0.115478] arch_timer: CPU5: Trapping CNTVCT access
6238 13:43:32.187083 <6>[ 0.115483] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
6239 13:43:32.190497 <6>[ 0.115919] Detected VIPT I-cache on CPU6
6240 13:43:32.197129 <4>[ 0.115963] cacheinfo: Unable to detect cache hierarchy for CPU 6
6241 13:43:32.206970 <6>[ 0.115969] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6242 13:43:32.213484 <6>[ 0.115976] arch_timer: Enabling local workaround for ARM erratum 858921
6243 13:43:32.216908 <6>[ 0.115982] arch_timer: CPU6: Trapping CNTVCT access
6244 13:43:32.223612 <6>[ 0.115988] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6245 13:43:32.227057 <6>[ 0.116519] Detected VIPT I-cache on CPU7
6246 13:43:32.233785 <4>[ 0.116562] cacheinfo: Unable to detect cache hierarchy for CPU 7
6247 13:43:32.243625 <6>[ 0.116568] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6248 13:43:32.250249 <6>[ 0.116575] arch_timer: Enabling local workaround for ARM erratum 858921
6249 13:43:32.253260 <6>[ 0.116581] arch_timer: CPU7: Trapping CNTVCT access
6250 13:43:32.260379 <6>[ 0.116586] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6251 13:43:32.266564 <6>[ 0.116663] smp: Brought up 1 node, 8 CPUs
6252 13:43:32.270173 <6>[ 0.355537] SMP: Total of 8 processors activated.
6253 13:43:32.276319 <6>[ 0.360474] CPU features: detected: 32-bit EL0 Support
6254 13:43:32.279863 <6>[ 0.365845] CPU features: detected: 32-bit EL1 Support
6255 13:43:32.286577 <6>[ 0.371212] CPU features: detected: CRC32 instructions
6256 13:43:32.289577 <6>[ 0.376636] CPU: All CPU(s) started at EL2
6257 13:43:32.296382 <6>[ 0.380973] alternatives: applying system-wide alternatives
6258 13:43:32.303224 <6>[ 0.388983] devtmpfs: initialized
6259 13:43:32.316149 <6>[ 0.397936] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
6260 13:43:32.325943 <6>[ 0.407883] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6261 13:43:32.328990 <6>[ 0.415606] pinctrl core: initialized pinctrl subsystem
6262 13:43:32.337373 <6>[ 0.422714] DMI not present or invalid.
6263 13:43:32.343816 <6>[ 0.427080] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6264 13:43:32.350374 <6>[ 0.433978] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6265 13:43:32.360347 <6>[ 0.441513] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6266 13:43:32.367337 <6>[ 0.449765] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6267 13:43:32.373826 <6>[ 0.457940] audit: initializing netlink subsys (disabled)
6268 13:43:32.380357 <5>[ 0.463647] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
6269 13:43:32.387438 <6>[ 0.464637] thermal_sys: Registered thermal governor 'step_wise'
6270 13:43:32.393520 <6>[ 0.471615] thermal_sys: Registered thermal governor 'power_allocator'
6271 13:43:32.396936 <6>[ 0.477912] cpuidle: using governor menu
6272 13:43:32.403332 <6>[ 0.488878] NET: Registered PF_QIPCRTR protocol family
6273 13:43:32.410093 <6>[ 0.494366] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6274 13:43:32.416816 <6>[ 0.501466] ASID allocator initialised with 32768 entries
6275 13:43:32.423371 <6>[ 0.508239] Serial: AMBA PL011 UART driver
6276 13:43:32.434196 <4>[ 0.519598] Trying to register duplicate clock ID: 113
6277 13:43:32.494440 <6>[ 0.576235] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6278 13:43:32.508425 <6>[ 0.590645] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6279 13:43:32.511576 <6>[ 0.600415] KASLR enabled
6280 13:43:32.526099 <6>[ 0.608359] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6281 13:43:32.532822 <6>[ 0.615362] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6282 13:43:32.539637 <6>[ 0.621838] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6283 13:43:32.546283 <6>[ 0.628828] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6284 13:43:32.553107 <6>[ 0.635303] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6285 13:43:32.559666 <6>[ 0.642293] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6286 13:43:32.566322 <6>[ 0.648768] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6287 13:43:32.572688 <6>[ 0.655757] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6288 13:43:32.576236 <6>[ 0.663293] ACPI: Interpreter disabled.
6289 13:43:32.586011 <6>[ 0.671304] iommu: Default domain type: Translated
6290 13:43:32.592491 <6>[ 0.676466] iommu: DMA domain TLB invalidation policy: strict mode
6291 13:43:32.596080 <5>[ 0.683091] SCSI subsystem initialized
6292 13:43:32.602532 <6>[ 0.687537] usbcore: registered new interface driver usbfs
6293 13:43:32.608986 <6>[ 0.693265] usbcore: registered new interface driver hub
6294 13:43:32.612344 <6>[ 0.698807] usbcore: registered new device driver usb
6295 13:43:32.619806 <6>[ 0.705132] pps_core: LinuxPPS API ver. 1 registered
6296 13:43:32.629487 <6>[ 0.710317] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6297 13:43:32.632982 <6>[ 0.719641] PTP clock support registered
6298 13:43:32.636408 <6>[ 0.723895] EDAC MC: Ver: 3.0.0
6299 13:43:32.644011 <6>[ 0.729554] FPGA manager framework
6300 13:43:32.647455 <6>[ 0.733235] Advanced Linux Sound Architecture Driver Initialized.
6301 13:43:32.651101 <6>[ 0.739978] vgaarb: loaded
6302 13:43:32.657837 <6>[ 0.743100] clocksource: Switched to clocksource arch_sys_counter
6303 13:43:32.664739 <5>[ 0.749533] VFS: Disk quotas dquot_6.6.0
6304 13:43:32.671347 <6>[ 0.753707] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6305 13:43:32.674595 <6>[ 0.760882] pnp: PnP ACPI: disabled
6306 13:43:32.682129 <6>[ 0.767779] NET: Registered PF_INET protocol family
6307 13:43:32.689218 <6>[ 0.773007] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6308 13:43:32.700839 <6>[ 0.782919] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6309 13:43:32.710612 <6>[ 0.791674] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6310 13:43:32.717751 <6>[ 0.799626] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6311 13:43:32.724126 <6>[ 0.807859] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6312 13:43:32.730661 <6>[ 0.815952] TCP: Hash tables configured (established 32768 bind 32768)
6313 13:43:32.741075 <6>[ 0.822780] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6314 13:43:32.747443 <6>[ 0.829754] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6315 13:43:32.753917 <6>[ 0.837236] NET: Registered PF_UNIX/PF_LOCAL protocol family
6316 13:43:32.760422 <6>[ 0.843335] RPC: Registered named UNIX socket transport module.
6317 13:43:32.763998 <6>[ 0.849478] RPC: Registered udp transport module.
6318 13:43:32.767554 <6>[ 0.854403] RPC: Registered tcp transport module.
6319 13:43:32.774057 <6>[ 0.859325] RPC: Registered tcp NFSv4.1 backchannel transport module.
6320 13:43:32.780465 <6>[ 0.865977] PCI: CLS 0 bytes, default 64
6321 13:43:32.783915 <6>[ 0.870238] Unpacking initramfs...
6322 13:43:32.801476 <6>[ 0.883695] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6323 13:43:32.811583 <6>[ 0.892436] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6324 13:43:32.814844 <6>[ 0.901359] kvm [1]: IPA Size Limit: 40 bits
6325 13:43:32.822385 <6>[ 0.907720] kvm [1]: vgic-v2@c420000
6326 13:43:32.825422 <6>[ 0.911555] kvm [1]: GIC system register CPU interface enabled
6327 13:43:32.832682 <6>[ 0.917744] kvm [1]: vgic interrupt IRQ18
6328 13:43:32.835498 <6>[ 0.922122] kvm [1]: Hyp mode initialized successfully
6329 13:43:32.843170 <5>[ 0.928468] Initialise system trusted keyrings
6330 13:43:32.849868 <6>[ 0.933302] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6331 13:43:32.858378 <6>[ 0.943256] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6332 13:43:32.864686 <5>[ 0.949729] NFS: Registering the id_resolver key type
6333 13:43:32.868050 <5>[ 0.955048] Key type id_resolver registered
6334 13:43:32.874362 <5>[ 0.959463] Key type id_legacy registered
6335 13:43:32.881020 <6>[ 0.963768] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6336 13:43:32.887668 <6>[ 0.970689] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6337 13:43:32.894479 <6>[ 0.978455] 9p: Installing v9fs 9p2000 file system support
6338 13:43:32.922175 <5>[ 1.007673] Key type asymmetric registered
6339 13:43:32.925785 <5>[ 1.012017] Asymmetric key parser 'x509' registered
6340 13:43:32.935602 <6>[ 1.017166] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6341 13:43:32.938495 <6>[ 1.024786] io scheduler mq-deadline registered
6342 13:43:32.942218 <6>[ 1.029543] io scheduler kyber registered
6343 13:43:32.965048 <6>[ 1.050329] EINJ: ACPI disabled.
6344 13:43:32.971488 <4>[ 1.054140] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6345 13:43:33.009506 <6>[ 1.095082] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6346 13:43:33.018505 <6>[ 1.103629] printk: console [ttyS0] disabled
6347 13:43:33.046104 <6>[ 1.128277] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6348 13:43:33.053142 <6>[ 1.137763] printk: console [ttyS0] enabled
6349 13:43:33.056122 <6>[ 1.137763] printk: console [ttyS0] enabled
6350 13:43:33.062617 <6>[ 1.146686] printk: bootconsole [mtk8250] disabled
6351 13:43:33.066175 <6>[ 1.146686] printk: bootconsole [mtk8250] disabled
6352 13:43:33.076162 <3>[ 1.157207] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6353 13:43:33.083040 <3>[ 1.165589] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6354 13:43:33.112202 <6>[ 1.193989] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6355 13:43:33.118648 <6>[ 1.203640] serial serial0: tty port ttyS1 registered
6356 13:43:33.125552 <6>[ 1.210227] SuperH (H)SCI(F) driver initialized
6357 13:43:33.128346 <6>[ 1.215758] msm_serial: driver initialized
6358 13:43:33.143959 <6>[ 1.226075] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6359 13:43:33.153784 <6>[ 1.234680] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6360 13:43:33.160406 <6>[ 1.243259] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6361 13:43:33.170479 <6>[ 1.251829] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6362 13:43:33.180467 <6>[ 1.260489] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6363 13:43:33.187316 <6>[ 1.269153] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6364 13:43:33.196874 <6>[ 1.277893] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6365 13:43:33.203391 <6>[ 1.286635] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6366 13:43:33.213363 <6>[ 1.295200] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6367 13:43:33.223027 <6>[ 1.304001] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6368 13:43:33.231096 <4>[ 1.316476] cacheinfo: Unable to detect cache hierarchy for CPU 0
6369 13:43:33.240235 <6>[ 1.325891] loop: module loaded
6370 13:43:33.252733 <6>[ 1.337822] vsim1: Bringing 1800000uV into 2700000-2700000uV
6371 13:43:33.270651 <6>[ 1.355767] megasas: 07.719.03.00-rc1
6372 13:43:33.278956 <6>[ 1.364516] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6373 13:43:33.293370 <6>[ 1.378496] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6374 13:43:33.309926 <6>[ 1.395313] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6375 13:43:33.367009 <6>[ 1.445652] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6376 13:43:36.296475 <6>[ 4.381640] Freeing initrd memory: 106424K
6377 13:43:36.311710 <4>[ 4.393697] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6378 13:43:36.318292 <4>[ 4.402953] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
6379 13:43:36.324790 <4>[ 4.409653] Hardware name: Google juniper sku16 board (DT)
6380 13:43:36.328339 <4>[ 4.415392] Call trace:
6381 13:43:36.331393 <4>[ 4.418092] dump_backtrace.part.0+0xe0/0xf0
6382 13:43:36.334854 <4>[ 4.422630] show_stack+0x18/0x30
6383 13:43:36.338321 <4>[ 4.426203] dump_stack_lvl+0x64/0x80
6384 13:43:36.344740 <4>[ 4.430123] dump_stack+0x18/0x34
6385 13:43:36.348234 <4>[ 4.433692] sysfs_warn_dup+0x64/0x80
6386 13:43:36.351377 <4>[ 4.437614] sysfs_do_create_link_sd+0xf0/0x100
6387 13:43:36.354823 <4>[ 4.442402] sysfs_create_link+0x20/0x40
6388 13:43:36.361471 <4>[ 4.446581] bus_add_device+0x64/0x120
6389 13:43:36.365118 <4>[ 4.450586] device_add+0x354/0x7ec
6390 13:43:36.368330 <4>[ 4.454332] of_device_add+0x44/0x60
6391 13:43:36.374490 <4>[ 4.458165] of_platform_device_create_pdata+0x90/0x124
6392 13:43:36.378061 <4>[ 4.463648] of_platform_bus_create+0x154/0x380
6393 13:43:36.381988 <4>[ 4.468434] of_platform_populate+0x50/0xfc
6394 13:43:36.388073 <4>[ 4.472872] parse_mtd_partitions+0x1d8/0x4e0
6395 13:43:36.391156 <4>[ 4.477488] mtd_device_parse_register+0xec/0x2e0
6396 13:43:36.394433 <4>[ 4.482448] spi_nor_probe+0x280/0x2f4
6397 13:43:36.401013 <4>[ 4.486453] spi_mem_probe+0x6c/0xc0
6398 13:43:36.404587 <4>[ 4.490285] spi_probe+0x84/0xe4
6399 13:43:36.407910 <4>[ 4.493770] really_probe+0xbc/0x2dc
6400 13:43:36.411054 <4>[ 4.497600] __driver_probe_device+0x78/0x114
6401 13:43:36.418284 <4>[ 4.502212] driver_probe_device+0xd8/0x15c
6402 13:43:36.421482 <4>[ 4.506650] __device_attach_driver+0xb8/0x134
6403 13:43:36.424440 <4>[ 4.511349] bus_for_each_drv+0x7c/0xd4
6404 13:43:36.427950 <4>[ 4.515442] __device_attach+0x9c/0x1a0
6405 13:43:36.434620 <4>[ 4.519532] device_initial_probe+0x14/0x20
6406 13:43:36.438022 <4>[ 4.523971] bus_probe_device+0x98/0xa0
6407 13:43:36.440774 <4>[ 4.528060] device_add+0x3c0/0x7ec
6408 13:43:36.444336 <4>[ 4.531806] __spi_add_device+0x78/0x120
6409 13:43:36.450985 <4>[ 4.535984] spi_add_device+0x44/0x80
6410 13:43:36.454545 <4>[ 4.539902] spi_register_controller+0x704/0xb20
6411 13:43:36.460905 <4>[ 4.544774] devm_spi_register_controller+0x4c/0xac
6412 13:43:36.464018 <4>[ 4.549907] mtk_spi_probe+0x4f4/0x684
6413 13:43:36.467483 <4>[ 4.553912] platform_probe+0x68/0xc0
6414 13:43:36.470919 <4>[ 4.557829] really_probe+0xbc/0x2dc
6415 13:43:36.477294 <4>[ 4.561659] __driver_probe_device+0x78/0x114
6416 13:43:36.480775 <4>[ 4.566270] driver_probe_device+0xd8/0x15c
6417 13:43:36.484001 <4>[ 4.570707] __driver_attach+0x94/0x19c
6418 13:43:36.487319 <4>[ 4.574797] bus_for_each_dev+0x74/0xd0
6419 13:43:36.494247 <4>[ 4.578890] driver_attach+0x24/0x30
6420 13:43:36.497267 <4>[ 4.582719] bus_add_driver+0x154/0x20c
6421 13:43:36.500623 <4>[ 4.586809] driver_register+0x78/0x130
6422 13:43:36.504133 <4>[ 4.590899] __platform_driver_register+0x28/0x34
6423 13:43:36.510614 <4>[ 4.595858] mtk_spi_driver_init+0x1c/0x28
6424 13:43:36.514154 <4>[ 4.600213] do_one_initcall+0x64/0x1dc
6425 13:43:36.517470 <4>[ 4.604305] kernel_init_freeable+0x218/0x284
6426 13:43:36.520746 <4>[ 4.608919] kernel_init+0x24/0x12c
6427 13:43:36.526940 <4>[ 4.612663] ret_from_fork+0x10/0x20
6428 13:43:36.536378 <6>[ 4.621542] tun: Universal TUN/TAP device driver, 1.6
6429 13:43:36.539383 <6>[ 4.627852] thunder_xcv, ver 1.0
6430 13:43:36.546447 <6>[ 4.631363] thunder_bgx, ver 1.0
6431 13:43:36.546599 <6>[ 4.634861] nicpf, ver 1.0
6432 13:43:36.557011 <6>[ 4.639245] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6433 13:43:36.560583 <6>[ 4.646728] hns3: Copyright (c) 2017 Huawei Corporation.
6434 13:43:36.567232 <6>[ 4.652330] hclge is initializing
6435 13:43:36.570723 <6>[ 4.655915] e1000: Intel(R) PRO/1000 Network Driver
6436 13:43:36.577090 <6>[ 4.661050] e1000: Copyright (c) 1999-2006 Intel Corporation.
6437 13:43:36.580444 <6>[ 4.667072] e1000e: Intel(R) PRO/1000 Network Driver
6438 13:43:36.587058 <6>[ 4.672293] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6439 13:43:36.593519 <6>[ 4.678488] igb: Intel(R) Gigabit Ethernet Network Driver
6440 13:43:36.600204 <6>[ 4.684144] igb: Copyright (c) 2007-2014 Intel Corporation.
6441 13:43:36.607230 <6>[ 4.689988] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6442 13:43:36.613728 <6>[ 4.696513] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6443 13:43:36.617226 <6>[ 4.703067] sky2: driver version 1.30
6444 13:43:36.623764 <6>[ 4.708332] usbcore: registered new device driver r8152-cfgselector
6445 13:43:36.630222 <6>[ 4.714876] usbcore: registered new interface driver r8152
6446 13:43:36.636771 <6>[ 4.720711] VFIO - User Level meta-driver version: 0.3
6447 13:43:36.643320 <6>[ 4.728545] mtu3 11201000.usb: uwk - reg:0x420, version:101
6448 13:43:36.650426 <4>[ 4.734417] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6449 13:43:36.656959 <6>[ 4.741688] mtu3 11201000.usb: dr_mode: 1, drd: auto
6450 13:43:36.663404 <6>[ 4.746914] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6451 13:43:36.666992 <6>[ 4.753100] mtu3 11201000.usb: usb3-drd: 0
6452 13:43:36.676725 <6>[ 4.758678] mtu3 11201000.usb: xHCI platform device register success...
6453 13:43:36.682977 <4>[ 4.767334] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6454 13:43:36.690203 <6>[ 4.775283] xhci-mtk 11200000.usb: xHCI Host Controller
6455 13:43:36.696442 <6>[ 4.780787] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6456 13:43:36.702964 <6>[ 4.788505] xhci-mtk 11200000.usb: USB3 root hub has no ports
6457 13:43:36.713201 <6>[ 4.794513] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6458 13:43:36.719655 <6>[ 4.803939] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6459 13:43:36.726353 <6>[ 4.810016] xhci-mtk 11200000.usb: xHCI Host Controller
6460 13:43:36.733041 <6>[ 4.815506] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6461 13:43:36.739516 <6>[ 4.823167] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6462 13:43:36.743371 <6>[ 4.829987] hub 1-0:1.0: USB hub found
6463 13:43:36.746490 <6>[ 4.834016] hub 1-0:1.0: 1 port detected
6464 13:43:36.757603 <6>[ 4.839365] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6465 13:43:36.761169 <6>[ 4.847986] hub 2-0:1.0: USB hub found
6466 13:43:36.767589 <3>[ 4.852015] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6467 13:43:36.774788 <6>[ 4.859906] usbcore: registered new interface driver usb-storage
6468 13:43:36.781010 <6>[ 4.866488] usbcore: registered new device driver onboard-usb-hub
6469 13:43:36.793362 <4>[ 4.875200] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6470 13:43:36.802212 <6>[ 4.887450] mt6397-rtc mt6358-rtc: registered as rtc0
6471 13:43:36.811966 <6>[ 4.892934] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-18T13:43:27 UTC (1721310207)
6472 13:43:36.818579 <6>[ 4.902822] i2c_dev: i2c /dev entries driver
6473 13:43:36.828244 <6>[ 4.909239] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6474 13:43:36.834864 <6>[ 4.917555] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6475 13:43:36.841942 <6>[ 4.926458] i2c 4-0058: Fixed dependency cycle(s) with /panel
6476 13:43:36.848480 <6>[ 4.932495] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6477 13:43:36.866795 <6>[ 4.952045] cpu cpu0: EM: created perf domain
6478 13:43:36.876944 <6>[ 4.957581] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6479 13:43:36.883433 <6>[ 4.968869] cpu cpu4: EM: created perf domain
6480 13:43:36.891014 <6>[ 4.975963] sdhci: Secure Digital Host Controller Interface driver
6481 13:43:36.897467 <6>[ 4.982422] sdhci: Copyright(c) Pierre Ossman
6482 13:43:36.903900 <6>[ 4.987850] Synopsys Designware Multimedia Card Interface Driver
6483 13:43:36.910364 <6>[ 4.988389] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6484 13:43:36.913893 <6>[ 4.994930] sdhci-pltfm: SDHCI platform and OF driver helper
6485 13:43:36.922351 <6>[ 5.007403] ledtrig-cpu: registered to indicate activity on CPUs
6486 13:43:36.930002 <6>[ 5.015142] usbcore: registered new interface driver usbhid
6487 13:43:36.933216 <6>[ 5.020984] usbhid: USB HID core driver
6488 13:43:36.944130 <6>[ 5.025307] spi_master spi2: will run message pump with realtime priority
6489 13:43:36.947568 <4>[ 5.025489] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6490 13:43:36.954904 <4>[ 5.039708] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6491 13:43:36.968149 <6>[ 5.044565] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6492 13:43:36.987334 <6>[ 5.062878] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6493 13:43:36.994287 <4>[ 5.075396] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6494 13:43:36.997109 <6>[ 5.077922] cros-ec-spi spi2.0: Chrome EC device registered
6495 13:43:37.011415 <4>[ 5.093579] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6496 13:43:37.024581 <4>[ 5.106253] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6497 13:43:37.030924 <4>[ 5.114936] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6498 13:43:37.037643 <6>[ 5.115746] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6499 13:43:37.043995 <6>[ 5.124775] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6500 13:43:37.047791 <6>[ 5.128641] mmc0: new HS400 MMC card at address 0001
6501 13:43:37.055169 <6>[ 5.140182] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6502 13:43:37.068133 <6>[ 5.149975] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6503 13:43:37.074694 <6>[ 5.150803] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6504 13:43:37.084907 <6>[ 5.162335] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6505 13:43:37.091290 <6>[ 5.167599] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6506 13:43:37.094836 <6>[ 5.176708] NET: Registered PF_PACKET protocol family
6507 13:43:37.101457 <6>[ 5.182209] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6508 13:43:37.104790 <6>[ 5.186132] 9pnet: Installing 9P2000 support
6509 13:43:37.118082 <6>[ 5.190630] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6510 13:43:37.127662 <6>[ 5.191256] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6511 13:43:37.134564 <6>[ 5.192801] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6512 13:43:37.137876 <5>[ 5.196105] Key type dns_resolver registered
6513 13:43:37.144261 <6>[ 5.229498] registered taskstats version 1
6514 13:43:37.147749 <5>[ 5.233865] Loading compiled-in X.509 certificates
6515 13:43:37.173093 <6>[ 5.255350] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6516 13:43:37.191854 <3>[ 5.273795] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6517 13:43:37.222104 <6>[ 5.301039] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6518 13:43:37.233956 <6>[ 5.315664] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6519 13:43:37.243814 <6>[ 5.324237] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6520 13:43:37.250628 <6>[ 5.332884] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6521 13:43:37.260261 <6>[ 5.341563] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6522 13:43:37.266698 <6>[ 5.350174] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6523 13:43:37.276689 <6>[ 5.358696] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6524 13:43:37.286895 <6>[ 5.367216] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6525 13:43:37.293666 <6>[ 5.376373] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6526 13:43:37.299907 <6>[ 5.383693] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6527 13:43:37.307073 <6>[ 5.390862] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6528 13:43:37.313288 <6>[ 5.397958] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6529 13:43:37.323283 <6>[ 5.405213] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6530 13:43:37.329531 <6>[ 5.413344] panfrost 13040000.gpu: clock rate = 511999970
6531 13:43:37.339600 <6>[ 5.419087] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6532 13:43:37.346076 <6>[ 5.429259] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6533 13:43:37.349583 <6>[ 5.429287] hub 1-1:1.0: USB hub found
6534 13:43:37.359533 <6>[ 5.437264] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6535 13:43:37.363167 <6>[ 5.441644] hub 1-1:1.0: 3 ports detected
6536 13:43:37.376475 <6>[ 5.449681] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6537 13:43:37.382872 <6>[ 5.466029] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6538 13:43:37.393169 <6>[ 5.475059] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6539 13:43:37.402881 <6>[ 5.484390] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6540 13:43:37.413155 <6>[ 5.493552] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6541 13:43:37.422663 <6>[ 5.502683] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6542 13:43:37.429753 <6>[ 5.511811] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6543 13:43:37.439624 <6>[ 5.521112] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6544 13:43:37.449620 <6>[ 5.530413] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6545 13:43:37.459271 <6>[ 5.539890] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6546 13:43:37.469482 <6>[ 5.549365] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6547 13:43:37.476440 <6>[ 5.558491] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6548 13:43:37.549038 <6>[ 5.630683] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6549 13:43:37.558635 <6>[ 5.639541] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6550 13:43:37.569104 <6>[ 5.651123] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6551 13:43:37.661476 <6>[ 5.743297] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6552 13:43:38.251127 <6>[ 5.939434] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6553 13:43:38.261159 <4>[ 6.055441] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6554 13:43:38.267631 <4>[ 6.055475] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6555 13:43:38.274544 <6>[ 6.091956] r8152 1-1.2:1.0 eth0: v1.12.13
6556 13:43:38.281111 <6>[ 6.171132] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6557 13:43:38.287855 <6>[ 6.316740] Console: switching to colour frame buffer device 170x48
6558 13:43:38.294061 <6>[ 6.377380] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6559 13:43:38.316022 <6>[ 6.394396] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6560 13:43:38.334208 <6>[ 6.413062] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6561 13:43:38.341061 <6>[ 6.425616] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6562 13:43:38.352161 <6>[ 6.433813] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6563 13:43:38.361993 <6>[ 6.441491] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6564 13:43:38.381690 <6>[ 6.460503] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6565 13:43:39.611433 <6>[ 7.696449] r8152 1-1.2:1.0 eth0: carrier on
6566 13:43:41.926121 <5>[ 7.727120] Sending DHCP requests .., OK
6567 13:43:41.932564 <6>[ 10.015584] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6568 13:43:41.936126 <6>[ 10.024022] IP-Config: Complete:
6569 13:43:41.949327 <6>[ 10.027589] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6570 13:43:41.959014 <6>[ 10.038489] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6571 13:43:41.971108 <6>[ 10.052854] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6572 13:43:41.979499 <6>[ 10.052865] nameserver0=192.168.201.1
6573 13:43:41.987692 <6>[ 10.072785] clk: Disabling unused clocks
6574 13:43:41.992401 <6>[ 10.080791] ALSA device list:
6575 13:43:42.001872 <6>[ 10.086884] No soundcards found.
6576 13:43:42.010459 <6>[ 10.095939] Freeing unused kernel memory: 8512K
6577 13:43:42.017559 <6>[ 10.103129] Run /init as init process
6578 13:43:42.048157 <6>[ 10.133499] NET: Registered PF_INET6 protocol family
6579 13:43:42.055755 <6>[ 10.141164] Segment Routing with IPv6
6580 13:43:42.059304 <6>[ 10.145869] In-situ OAM (IOAM) with IPv6
6581 13:43:42.105541 <30>[ 10.164285] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6582 13:43:42.118195 <30>[ 10.203170] systemd[1]: Detected architecture arm64.
6583 13:43:42.118345
6584 13:43:42.124492 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6585 13:43:42.124585
6586 13:43:42.138285 <30>[ 10.223644] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6587 13:43:42.290328 <30>[ 10.372366] systemd[1]: Queued start job for default target graphical.target.
6588 13:43:42.326988 <30>[ 10.408842] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6589 13:43:42.337163 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6590 13:43:42.354876 <30>[ 10.436501] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6591 13:43:42.365193 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6592 13:43:42.382446 <30>[ 10.464402] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6593 13:43:42.393955 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6594 13:43:42.414202 <30>[ 10.496240] systemd[1]: Created slice user.slice - User and Session Slice.
6595 13:43:42.424508 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6596 13:43:42.444918 <30>[ 10.523611] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6597 13:43:42.457402 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6598 13:43:42.476814 <30>[ 10.555548] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6599 13:43:42.489387 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6600 13:43:42.515677 <30>[ 10.587405] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6601 13:43:42.533750 <30>[ 10.615676] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6602 13:43:42.541344 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6603 13:43:42.561445 <30>[ 10.643318] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6604 13:43:42.574406 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6605 13:43:42.593287 <30>[ 10.675343] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6606 13:43:42.608193 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6607 13:43:42.622143 <30>[ 10.707376] systemd[1]: Reached target paths.target - Path Units.
6608 13:43:42.636731 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6609 13:43:42.653658 <30>[ 10.735312] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6610 13:43:42.666188 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6611 13:43:42.682744 <30>[ 10.767712] systemd[1]: Reached target slices.target - Slice Units.
6612 13:43:42.697597 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6613 13:43:42.710104 <30>[ 10.795335] systemd[1]: Reached target swap.target - Swaps.
6614 13:43:42.721063 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6615 13:43:42.741383 <30>[ 10.823364] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6616 13:43:42.754938 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6617 13:43:42.773873 <30>[ 10.855844] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6618 13:43:42.788178 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6619 13:43:42.806849 <30>[ 10.888748] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6620 13:43:42.820318 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6621 13:43:42.837994 <30>[ 10.920029] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6622 13:43:42.852277 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6623 13:43:42.869947 <30>[ 10.951909] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6624 13:43:42.882718 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6625 13:43:42.902072 <30>[ 10.983996] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6626 13:43:42.915573 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6627 13:43:42.934128 <30>[ 11.015828] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6628 13:43:42.946952 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6629 13:43:42.997904 <30>[ 11.079730] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6630 13:43:43.009156 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6631 13:43:43.020965 <30>[ 11.102593] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6632 13:43:43.032468 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6633 13:43:43.053153 <30>[ 11.134923] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6634 13:43:43.064153 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6635 13:43:43.088931 <30>[ 11.164080] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6636 13:43:43.111951 <30>[ 11.193571] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6637 13:43:43.124634 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6638 13:43:43.162343 <30>[ 11.244062] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6639 13:43:43.175911 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6640 13:43:43.190672 <30>[ 11.272430] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6641 13:43:43.201734 <6>[ 11.281891] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6642 13:43:43.213046 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6643 13:43:43.235868 <30>[ 11.317570] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6644 13:43:43.249284 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6645 13:43:43.271265 <30>[ 11.352932] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6646 13:43:43.285341 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6647 13:43:43.330160 <30>[ 11.412243] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6648 13:43:43.341574 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6649 13:43:43.367043 <30>[ 11.449096] systemd[1]: Starting systemd-journald.service - Journal Service...
6650 13:43:43.378004 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6651 13:43:43.397688 <30>[ 11.479236] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6652 13:43:43.407259 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6653 13:43:43.433742 <30>[ 11.512034] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6654 13:43:43.444109 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6655 13:43:43.466160 <30>[ 11.547971] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6656 13:43:43.480057 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6657 13:43:43.500430 <30>[ 11.582555] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6658 13:43:43.511619 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6659 13:43:43.533212 <30>[ 11.615061] systemd[1]: Started systemd-journald.service - Journal Service.
6660 13:43:43.543267 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6661 13:43:43.563852 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6662 13:43:43.586817 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6663 13:43:43.606285 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6664 13:43:43.627606 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6665 13:43:43.648372 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6666 13:43:43.668309 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6667 13:43:43.689360 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6668 13:43:43.706641 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6669 13:43:43.726717 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6670 13:43:43.750038 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6671 13:43:43.767346 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6672 13:43:43.788896 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6673 13:43:43.846139 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6674 13:43:43.872117 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6675 13:43:43.895978 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6676 13:43:43.902367 See 'systemctl status systemd-remount-fs.service' for details.
6677 13:43:43.924111 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6678 13:43:43.942404 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6679 13:43:43.962994 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6680 13:43:44.014621 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6681 13:43:44.032049 <46>[ 12.113561] systemd-journald[199]: Received client request to flush runtime journal.
6682 13:43:44.043479 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6683 13:43:44.066410 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6684 13:43:44.089252 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6685 13:43:44.109008 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6686 13:43:44.128811 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6687 13:43:44.166751 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6688 13:43:44.194349 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6689 13:43:44.219086 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6690 13:43:44.238414 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6691 13:43:44.278954 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6692 13:43:44.301522 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6693 13:43:44.329560 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6694 13:43:44.379199 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6695 13:43:44.400690 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6696 13:43:44.418474 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6697 13:43:44.448612 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6698 13:43:44.471731 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6699 13:43:44.486048 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6700 13:43:44.492580 <46>[ 12.576913] systemd-journald[199]: Time jumped backwards, rotating.
6701 13:43:44.586261 <6>[ 12.668222] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6702 13:43:44.602976 <4>[ 12.684875] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6703 13:43:44.620060 <6>[ 12.698253] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6704 13:43:44.622897 <3>[ 12.702182] mtk-scp 10500000.scp: invalid resource
6705 13:43:44.633449 <6>[ 12.714935] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6706 13:43:44.642962 <6>[ 12.717467] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6707 13:43:44.653768 <4>[ 12.735321] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6708 13:43:44.663355 <3>[ 12.735418] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6709 13:43:44.673670 <4>[ 12.742808] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6710 13:43:44.676726 <6>[ 12.742818] remoteproc remoteproc0: scp is available
6711 13:43:44.686902 <4>[ 12.742903] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6712 13:43:44.693397 <6>[ 12.742909] remoteproc remoteproc0: powering up scp
6713 13:43:44.704048 <4>[ 12.742925] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6714 13:43:44.711375 <3>[ 12.742928] remoteproc remoteproc0: request_firmware failed: -2
6715 13:43:44.717593 <6>[ 12.755910] mc: Linux media interface: v0.10
6716 13:43:44.727925 <3>[ 12.768187] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6717 13:43:44.730916 <6>[ 12.797992] videodev: Linux video capture interface: v2.00
6718 13:43:44.741234 <6>[ 12.799912] cs_system_cfg: CoreSight Configuration manager initialised
6719 13:43:44.747385 <3>[ 12.802951] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6720 13:43:44.754411 <6>[ 12.803476] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6721 13:43:44.761749 <6>[ 12.805572] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6722 13:43:44.771150 <5>[ 12.805724] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6723 13:43:44.778322 <6>[ 12.805832] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6724 13:43:44.784767 <6>[ 12.807111] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6725 13:43:44.798274 <3>[ 12.817157] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6726 13:43:44.804866 <6>[ 12.824162] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6727 13:43:44.811766 <3>[ 12.829808] elan_i2c 2-0015: Error applying setting, reverse things back
6728 13:43:44.819199 <5>[ 12.830576] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6729 13:43:44.829140 <5>[ 12.831005] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6730 13:43:44.835487 <4>[ 12.831070] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6731 13:43:44.841882 <6>[ 12.831078] cfg80211: failed to load regulatory.db
6732 13:43:44.852430 <6>[ 12.836696] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6733 13:43:44.863011 <3>[ 12.844757] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6734 13:43:44.869461 <6>[ 12.852414] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6735 13:43:44.879437 <3>[ 12.860246] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6736 13:43:44.885958 <6>[ 12.876056] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6737 13:43:44.895912 <3>[ 12.876846] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6738 13:43:44.902803 <6>[ 12.887913] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6739 13:43:44.912677 <3>[ 12.895745] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6740 13:43:44.926350 <3>[ 12.896234] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6741 13:43:44.933062 <6>[ 12.896328] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6742 13:43:44.942859 <3>[ 12.897845] debugfs: File 'Playback' in directory 'dapm' already present!
6743 13:43:44.949304 <3>[ 12.897862] debugfs: File 'Capture' in directory 'dapm' already present!
6744 13:43:44.959521 <6>[ 12.902292] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6745 13:43:44.966569 <3>[ 12.905598] thermal_sys: Failed to find 'trips' node
6746 13:43:44.976557 <3>[ 12.909467] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6747 13:43:44.979553 <6>[ 12.919306] Bluetooth: Core ver 2.22
6748 13:43:44.986139 <3>[ 12.923126] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6749 13:43:44.995920 <3>[ 12.923140] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6750 13:43:45.003084 <4>[ 12.923144] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6751 13:43:45.009457 <3>[ 12.924463] thermal_sys: Failed to find 'trips' node
6752 13:43:45.015966 <3>[ 12.924469] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6753 13:43:45.025434 <3>[ 12.924475] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6754 13:43:45.035363 <4>[ 12.924478] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6755 13:43:45.042450 <3>[ 12.926677] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6756 13:43:45.052964 <3>[ 12.926686] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6757 13:43:45.062399 <3>[ 12.926691] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6758 13:43:45.072133 <3>[ 12.926742] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6759 13:43:45.078889 <6>[ 12.944190] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6760 13:43:45.085272 <6>[ 12.945179] NET: Registered PF_BLUETOOTH protocol family
6761 13:43:45.092829 <6>[ 12.953978] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6762 13:43:45.096474 <6>[ 12.961145] Bluetooth: HCI device and connection manager initialized
6763 13:43:45.103114 <6>[ 12.969998] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6764 13:43:45.113738 <6>[ 12.970468] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6765 13:43:45.123283 <6>[ 12.971481] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6766 13:43:45.130054 <6>[ 12.971596] usbcore: registered new interface driver uvcvideo
6767 13:43:45.136463 <6>[ 12.977693] Bluetooth: HCI socket layer initialized
6768 13:43:45.143253 <6>[ 12.986862] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6769 13:43:45.150408 <6>[ 12.994099] Bluetooth: L2CAP socket layer initialized
6770 13:43:45.157830 <6>[ 12.994117] Bluetooth: SCO socket layer initialized
6771 13:43:45.164484 <6>[ 13.008722] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6772 13:43:45.175344 <6>[ 13.051857] Bluetooth: HCI UART driver ver 2.3
6773 13:43:45.187484 <6>[ 13.056965] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6774 13:43:45.197317 <6>[ 13.065382] Bluetooth: HCI UART protocol H4 registered
6775 13:43:45.206376 <6>[ 13.065429] Bluetooth: HCI UART protocol LL registered
6776 13:43:45.221582 <6>[ 13.069309] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6777 13:43:45.228492 <6>[ 13.076556] Bluetooth: HCI UART protocol Three-wire (H5) registered
6778 13:43:45.240779 <4>[ 13.174075] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6779 13:43:45.247301 <4>[ 13.174075] Fallback method does not support PEC.
6780 13:43:45.253934 <6>[ 13.175077] Bluetooth: HCI UART protocol Broadcom registered
6781 13:43:45.264078 <3>[ 13.184271] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6782 13:43:45.271358 <6>[ 13.188221] Bluetooth: HCI UART protocol QCA registered
6783 13:43:45.278696 <6>[ 13.189088] Bluetooth: hci0: setting up ROME/QCA6390
6784 13:43:45.289171 <3>[ 13.201003] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6785 13:43:45.296528 <6>[ 13.201870] Bluetooth: HCI UART protocol Marvell registered
6786 13:43:45.307399 <6>[ 13.233411] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6787 13:43:45.317833 <3>[ 13.244840] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6788 13:43:45.324399 <3>[ 13.245212] power_supply sbs-12-000b: driver failed to report `capacity_level' property: -6
6789 13:43:45.333358 <3>[ 13.401812] Bluetooth: hci0: Frame reassembly failed (-84)
6790 13:43:45.381720 <3>[ 13.461905] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6791 13:43:45.437273 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slic<3>[ 13.519321] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6792 13:43:45.440173 e /system/systemd-backlight.
6793 13:43:45.454056 <3>[ 13.535618] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6794 13:43:45.471420 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Se<3>[ 13.552239] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6795 13:43:45.471539 t.
6796 13:43:45.489863 <3>[ 13.571110] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6797 13:43:45.507978 <3>[ 13.589027] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6798 13:43:45.520505 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6799 13:43:45.544327 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6800 13:43:45.561931 <6>[ 13.643612] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6801 13:43:45.592127 <6>[ 13.677336] Bluetooth: hci0: QCA Product ID :0x00000008
6802 13:43:45.602308 [[0;32m OK [0m] Reached target [0;1;39mblue<6>[ 13.686524] Bluetooth: hci0: QCA SOC Version :0x00000044
6803 13:43:45.605692 tooth.target[0m - Bluetooth Support.
6804 13:43:45.612225 <6>[ 13.697099] Bluetooth: hci0: QCA ROM Version :0x00000302
6805 13:43:45.622120 <6>[ 13.706926] Bluetooth: hci0: QCA Patch Version:0x00000111
6806 13:43:45.631265 <6>[ 13.716276] Bluetooth: hci0: QCA controller version 0x00440302
6807 13:43:45.637797 <4>[ 13.722180] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6808 13:43:45.644873 <6>[ 13.722384] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6809 13:43:45.651413 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6810 13:43:45.661647 <4>[ 13.743208] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6811 13:43:45.667995 <4>[ 13.744298] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6812 13:43:45.678260 <3>[ 13.752538] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6813 13:43:45.684736 <4>[ 13.765662] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6814 13:43:45.691231 <3>[ 13.768004] Bluetooth: hci0: QCA Failed to download patch (-2)
6815 13:43:45.697648 <4>[ 13.776797] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6816 13:43:45.716300 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6817 13:43:45.734646 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6818 13:43:45.754510 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6819 13:43:45.773707 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6820 13:43:45.791173 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6821 13:43:45.810804 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6822 13:43:45.830469 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6823 13:43:45.850287 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6824 13:43:45.879293 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6825 13:43:45.907916 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6826 13:43:45.929630 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6827 13:43:45.947513 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6828 13:43:45.977316 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6829 13:43:46.039355 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6830 13:43:46.086938 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6831 13:43:46.106270 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6832 13:43:46.146007 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6833 13:43:46.166720 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6834 13:43:46.186552 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6835 13:43:46.208916 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6836 13:43:46.226815 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6837 13:43:46.271169 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6838 13:43:46.310486 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6839 13:43:46.361371
6840 13:43:46.364324 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6841 13:43:46.364437
6842 13:43:46.367763 debian-bookworm-arm64 login: root (automatic login)
6843 13:43:46.367863
6844 13:43:46.384850 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Thu Jul 18 12:53:03 UTC 2024 aarch64
6845 13:43:46.384965
6846 13:43:46.391328 The programs included with the Debian GNU/Linux system are free software;
6847 13:43:46.398068 the exact distribution terms for each program are described in the
6848 13:43:46.401689 individual files in /usr/share/doc/*/copyright.
6849 13:43:46.401774
6850 13:43:46.408173 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6851 13:43:46.411297 permitted by applicable law.
6852 13:43:46.411725 Matched prompt #10: / #
6854 13:43:46.411941 Setting prompt string to ['/ #']
6855 13:43:46.412042 end: 2.2.5.1 login-action (duration 00:00:15) [common]
6857 13:43:46.412238 end: 2.2.5 auto-login-action (duration 00:00:15) [common]
6858 13:43:46.412335 start: 2.2.6 expect-shell-connection (timeout 00:03:05) [common]
6859 13:43:46.412402 Setting prompt string to ['/ #']
6860 13:43:46.412475 Forcing a shell prompt, looking for ['/ #']
6861 13:43:46.412546 Sending line: ''
6863 13:43:46.462885 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6864 13:43:46.462998 Waiting using forced prompt support (timeout 00:02:30)
6865 13:43:46.467864 / #
6866 13:43:46.468140 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6867 13:43:46.468234 start: 2.2.7 export-device-env (timeout 00:03:04) [common]
6868 13:43:46.468338 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6869 13:43:46.468422 end: 2.2 depthcharge-retry (duration 00:01:56) [common]
6870 13:43:46.468536 end: 2 depthcharge-action (duration 00:01:56) [common]
6871 13:43:46.468632 start: 3 lava-test-retry (timeout 00:05:00) [common]
6872 13:43:46.468719 start: 3.1 lava-test-shell (timeout 00:05:00) [common]
6873 13:43:46.468798 Using namespace: common
6874 13:43:46.468868 Sending line: '#'
6876 13:43:46.569280 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:05:00)
6877 13:43:46.574682 / # #
6878 13:43:46.574992 Using /lava-14879034
6879 13:43:46.575074 Sending line: 'export SHELL=/bin/sh'
6881 13:43:46.680490 / # export SHELL=/bin/sh
6882 13:43:46.680748 Sending line: '. /lava-14879034/environment'
6884 13:43:46.785392 / # . /lava-14879034/environment
6885 13:43:46.785691 Sending line: '/lava-14879034/bin/lava-test-runner /lava-14879034/0'
6887 13:43:46.886185 Test shell timeout: 10s (minimum of the action and connection timeout)
6888 13:43:46.891360 / # /lava-14879034/bin/lava-test-runner /lava-14879034/0
6889 13:43:47.692903 + export TESTRUN_ID=0_sleep
6890 13:43:47.693039 + cd /lava-14879034/0/tests/0_sleep
6891 13:43:47.693108 + cat uuid
6892 13:43:47.693170 + UUID=14879034_1.5.2.3.1
6893 13:43:47.693231 + set +x
6894 13:43:47.693289 <LAVA_SIGNAL_STARTRUN 0_sleep 14879034_1.5.2.3.1>
6895 13:43:47.693346 + ./config/lava/sleep/sleep.sh mem freeze
6896 13:43:47.693402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc-exist RESULT=pass>
6897 13:43:47.693459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc-wakeup-enabled RESULT=pass>
6898 13:43:47.693515 rtcwake: assuming RTC uses UTC ...
6899 13:43:47.693569 rtcwake: wakeup from "mem" using rtc0 at Thu Jul 18 13:43:43 2024
6900 13:43:47.693624 <6>[ 15.045929] PM: suspend entry (deep)
6901 13:43:47.693679 <6>[ 15.049890] Filesystems sync: 0.000 seconds
6902 13:43:47.693734 <6>[ 15.054825] Freezing user space processes
6903 13:43:47.693789 <6>[ 15.060766] Freezing user space processes completed (elapsed 0.001 seconds)
6904 13:43:47.693843 <6>[ 15.068106] OOM killer disabled.
6905 13:43:47.693898 <6>[ 15.071630] Freezing remaining freezable tasks
6906 13:43:47.693952 <6>[ 15.077925] Freezing remaining freezable tasks completed (elapsed 0.001 seconds)
6907 13:43:47.694008 <6>[ 15.085658] printk: Suspending console(s) (use no_console_suspend to debug)
6908 13:43:47.694248 Received signal: <STARTRUN> 0_sleep 14879034_1.5.2.3.1
6909 13:43:47.694310 Starting test lava.0_sleep (14879034_1.5.2.3.1)
6910 13:43:47.694384 Skipping test definition patterns.
6911 13:43:47.694473 Received signal: <TESTCASE> TEST_CASE_ID=rtc-exist RESULT=pass
6913 13:43:47.694656 Received signal: <TESTCASE> TEST_CASE_ID=rtc-wakeup-enabled RESULT=pass
6915 13:43:53.534883 <6>[ 15.220886] Disabling non-boot CPUs ...
6916 13:43:53.537878 <6>[ 15.222650] psci: CPU1 killed (polled 0 ms)
6917 13:43:53.541431 <6>[ 15.224757] psci: CPU2 killed (polled 0 ms)
6918 13:43:53.547928 <6>[ 15.226623] psci: CPU3 killed (polled 0 ms)
6919 13:43:53.551163 <6>[ 15.228603] psci: CPU4 killed (polled 0 ms)
6920 13:43:53.554810 <6>[ 15.230484] psci: CPU5 killed (polled 0 ms)
6921 13:43:53.561313 <6>[ 15.232305] psci: CPU6 killed (polled 0 ms)
6922 13:43:53.565028 <6>[ 15.234096] psci: CPU7 killed (polled 0 ms)
6923 13:43:53.568142 <6>[ 15.234606] Enabling non-boot CPUs ...
6924 13:43:53.575020 <6>[ 15.235091] Detected VIPT I-cache on CPU1
6925 13:43:53.578286 <4>[ 15.235157] cacheinfo: Unable to detect cache hierarchy for CPU 1
6926 13:43:53.588370 <6>[ 15.235171] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
6927 13:43:53.594692 <6>[ 15.235228] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
6928 13:43:53.594919 <6>[ 15.235791] CPU1 is up
6929 13:43:53.601281 <6>[ 15.236146] Detected VIPT I-cache on CPU2
6930 13:43:53.608042 <4>[ 15.236173] cacheinfo: Unable to detect cache hierarchy for CPU 2
6931 13:43:53.614803 <6>[ 15.236180] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
6932 13:43:53.621498 <6>[ 15.236203] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
6933 13:43:53.624331 <6>[ 15.236463] CPU2 is up
6934 13:43:53.627995 <6>[ 15.236746] Detected VIPT I-cache on CPU3
6935 13:43:53.634572 <4>[ 15.236772] cacheinfo: Unable to detect cache hierarchy for CPU 3
6936 13:43:53.641595 <6>[ 15.236779] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
6937 13:43:53.648025 <6>[ 15.236802] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
6938 13:43:53.650990 <6>[ 15.237074] CPU3 is up
6939 13:43:53.654602 <6>[ 15.237485] Detected VIPT I-cache on CPU4
6940 13:43:53.661566 <4>[ 15.237554] cacheinfo: Unable to detect cache hierarchy for CPU 4
6941 13:43:53.668148 <6>[ 15.237567] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
6942 13:43:53.674850 <6>[ 15.237601] arch_timer: CPU4: Trapping CNTVCT access
6943 13:43:53.681314 <6>[ 15.237617] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
6944 13:43:53.684791 <6>[ 15.238179] CPU4 is up
6945 13:43:53.687616 <6>[ 15.238566] Detected VIPT I-cache on CPU5
6946 13:43:53.694628 <4>[ 15.238609] cacheinfo: Unable to detect cache hierarchy for CPU 5
6947 13:43:53.701335 <6>[ 15.238618] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
6948 13:43:53.707636 <6>[ 15.238639] arch_timer: CPU5: Trapping CNTVCT access
6949 13:43:53.714654 <6>[ 15.238649] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
6950 13:43:53.717829 <6>[ 15.239040] CPU5 is up
6951 13:43:53.721431 <6>[ 15.239367] Detected VIPT I-cache on CPU6
6952 13:43:53.728007 <4>[ 15.239410] cacheinfo: Unable to detect cache hierarchy for CPU 6
6953 13:43:53.734611 <6>[ 15.239419] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6954 13:43:53.741194 <6>[ 15.239440] arch_timer: CPU6: Trapping CNTVCT access
6955 13:43:53.747417 <6>[ 15.239450] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6956 13:43:53.747572 <6>[ 15.239863] CPU6 is up
6957 13:43:53.754610 <6>[ 15.240167] Detected VIPT I-cache on CPU7
6958 13:43:53.760598 <4>[ 15.240211] cacheinfo: Unable to detect cache hierarchy for CPU 7
6959 13:43:53.767570 <6>[ 15.240220] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6960 13:43:53.770933 <6>[ 15.240241] arch_timer: CPU7: Trapping CNTVCT access
6961 13:43:53.777415 <6>[ 15.240251] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6962 13:43:53.780935 <6>[ 15.240678] CPU7 is up
6963 13:43:53.787407 <3>[ 15.242171] Failed to prepare clk '(null)': -13
6964 13:43:53.790908 <3>[ 15.242251] Failed to prepare clk '(null)': -13
6965 13:43:53.797447 <4>[ 15.359944] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6966 13:43:53.803759 <4>[ 15.369751] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6967 13:43:53.814072 <4>[ 15.373974] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6968 13:43:53.820055 <4>[ 15.374823] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6969 13:43:53.823289 <6>[ 15.542490] r8152 1-1.2:1.0 eth0: carrier on
6970 13:43:53.844758 <6>[ 16.364015] OOM killer enabled.
6971 13:43:53.848074 <6>[ 16.368010] Restarting tasks ... done.
6972 13:43:53.854676 <5>[ 16.373096] random: crng reseeded on system resumption
6973 13:43:53.858274 <6>[ 16.380084] PM: suspend exit
6974 13:43:53.870156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtcwake-mem-1 RESULT=pass>
6975 13:43:53.870499 Received signal: <TESTCASE> TEST_CASE_ID=rtcwake-mem-1 RESULT=pass
6977 13:43:53.873234 rtcwake: assuming RTC uses UTC ...
6978 13:43:53.879629 rtcwake: wakeup from "mem" using rtc0 at Thu Jul 18 13:43:50 2024
6979 13:43:53.891994 <6>[ 16.411286] PM: suspend entry (deep)
6980 13:43:53.895727 <6>[ 16.416816] Filesystems sync: 0.000 seconds
6981 13:43:53.904136 <6>[ 16.423449] Freezing user space processes
6982 13:43:53.914980 <6>[ 16.430922] Freezing user space processes completed (elapsed 0.001 seconds)
6983 13:43:53.918475 <6>[ 16.439746] OOM killer disabled.
6984 13:43:53.925603 <6>[ 16.444809] Freezing remaining freezable tasks
6985 13:43:54.863607 <6>[ 17.379376] Freezing remaining freezable tasks completed (elapsed 0.928 seconds)
6986 13:43:54.875123 <6>[ 17.390671] printk: Suspending console(s) (use no_console_suspend to debug)
6987 13:44:03.011413 <6>[ 19.552064] Disabling non-boot CPUs ...
6988 13:44:03.012032 <6>[ 19.554220] psci: CPU1 killed (polled 0 ms)
6989 13:44:03.012507 <6>[ 19.556435] psci: CPU2 killed (polled 4 ms)
6990 13:44:03.012915 <6>[ 19.558614] psci: CPU3 killed (polled 0 ms)
6991 13:44:03.013396 <6>[ 19.560012] psci: CPU4 killed (polled 4 ms)
6992 13:44:03.013792 <6>[ 19.561868] psci: CPU5 killed (polled 0 ms)
6993 13:44:03.014173 <6>[ 19.563775] psci: CPU6 killed (polled 0 ms)
6994 13:44:03.014589 <6>[ 19.565583] psci: CPU7 killed (polled 0 ms)
6995 13:44:03.014959 <6>[ 19.566008] Enabling non-boot CPUs ...
6996 13:44:03.015320 <6>[ 19.566509] Detected VIPT I-cache on CPU1
6997 13:44:03.015686 <4>[ 19.566601] cacheinfo: Unable to detect cache hierarchy for CPU 1
6998 13:44:03.015783 <6>[ 19.566622] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
6999 13:44:03.015863 <6>[ 19.566701] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
7000 13:44:03.015941 <6>[ 19.567486] CPU1 is up
7001 13:44:03.016018 <6>[ 19.567851] Detected VIPT I-cache on CPU2
7002 13:44:03.016096 <4>[ 19.567893] cacheinfo: Unable to detect cache hierarchy for CPU 2
7003 13:44:03.016174 <6>[ 19.567903] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
7004 13:44:03.016269 <6>[ 19.567943] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
7005 13:44:03.016365 <6>[ 19.568361] CPU2 is up
7006 13:44:03.016467 <6>[ 19.568754] Detected VIPT I-cache on CPU3
7007 13:44:03.016563 <4>[ 19.568795] cacheinfo: Unable to detect cache hierarchy for CPU 3
7008 13:44:03.016659 <6>[ 19.568807] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
7009 13:44:03.016754 <6>[ 19.568842] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
7010 13:44:03.016849 <6>[ 19.569262] CPU3 is up
7011 13:44:03.016943 <6>[ 19.569795] Detected VIPT I-cache on CPU4
7012 13:44:03.017037 <4>[ 19.569861] cacheinfo: Unable to detect cache hierarchy for CPU 4
7013 13:44:03.017131 <6>[ 19.569879] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
7014 13:44:03.017225 <6>[ 19.569925] arch_timer: CPU4: Trapping CNTVCT access
7015 13:44:03.017319 <6>[ 19.569948] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
7016 13:44:03.017413 <6>[ 19.570675] CPU4 is up
7017 13:44:03.017506 <6>[ 19.571059] Detected VIPT I-cache on CPU5
7018 13:44:03.017600 <4>[ 19.571094] cacheinfo: Unable to detect cache hierarchy for CPU 5
7019 13:44:03.017694 <6>[ 19.571103] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
7020 13:44:03.017789 <6>[ 19.571126] arch_timer: CPU5: Trapping CNTVCT access
7021 13:44:03.017884 <6>[ 19.571136] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
7022 13:44:03.017982 <6>[ 19.571589] CPU5 is up
7023 13:44:03.018078 <6>[ 19.571959] Detected VIPT I-cache on CPU6
7024 13:44:03.018172 <4>[ 19.572009] cacheinfo: Unable to detect cache hierarchy for CPU 6
7025 13:44:03.018266 <6>[ 19.572019] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
7026 13:44:03.018361 <6>[ 19.572041] arch_timer: CPU6: Trapping CNTVCT access
7027 13:44:03.018455 <6>[ 19.572051] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
7028 13:44:03.018549 <6>[ 19.572521] CPU6 is up
7029 13:44:03.018642 <6>[ 19.572858] Detected VIPT I-cache on CPU7
7030 13:44:03.018735 <4>[ 19.572908] cacheinfo: Unable to detect cache hierarchy for CPU 7
7031 13:44:03.018828 <6>[ 19.572917] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
7032 13:44:03.018922 <6>[ 19.572940] arch_timer: CPU7: Trapping CNTVCT access
7033 13:44:03.019015 <6>[ 19.572950] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
7034 13:44:03.019109 <6>[ 19.573446] CPU7 is up
7035 13:44:03.019202 <4>[ 19.695829] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
7036 13:44:03.019296 <4>[ 19.706228] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
7037 13:44:03.019390 <4>[ 19.710728] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
7038 13:44:03.019484 <4>[ 19.711638] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
7039 13:44:03.019578 <6>[ 19.876963] r8152 1-1.2:1.0 eth0: carrier on
7040 13:44:03.019671 <6>[ 20.686167] OOM killer enabled.
7041 13:44:03.019764 <6>[ 20.690158] Restarting tasks ... done.
7042 13:44:03.019857 <5>[ 20.695289] random: crng reseeded on system resumption
7043 13:44:03.019950 <6>[ 20.702115] PM: suspend exit
7044 13:44:03.020043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtcwake-mem-2 RESULT=pass>
7045 13:44:03.020136 rtcwake: assuming RTC uses UTC ...
7046 13:44:03.020229 rtcwake: wakeup from "mem" using rtc0 at Thu Jul 18 13:43:57 2024
7047 13:44:03.020322 <6>[ 20.734397] PM: suspend entry (deep)
7048 13:44:03.020414 <6>[ 20.740170] Filesystems sync: 0.000 seconds
7049 13:44:03.020517 <6>[ 20.747055] Freezing user space processes
7050 13:44:03.020611 <6>[ 20.754747] Freezing user space processes completed (elapsed 0.001 seconds)
7051 13:44:03.020706 <6>[ 20.763910] OOM killer disabled.
7052 13:44:03.020799 <6>[ 20.769327] Freezing remaining freezable tasks
7053 13:44:03.020893 <6>[ 21.692974] Freezing remaining freezable tasks completed (elapsed 0.916 seconds)
7054 13:44:03.020987 <6>[ 21.704634] printk: Suspending console(s) (use no_console_suspend to debug)
7055 13:44:03.021271 Received signal: <TESTCASE> TEST_CASE_ID=rtcwake-mem-2 RESULT=pass
7057 13:44:07.943736 <6>[ 23.849659] Disabling non-boot CPUs ...
7058 13:44:07.943901 <6>[ 23.851767] psci: CPU1 killed (polled 0 ms)
7059 13:44:07.944007 <6>[ 23.853582] psci: CPU2 killed (polled 4 ms)
7060 13:44:07.944105 <6>[ 23.855855] psci: CPU3 killed (polled 0 ms)
7061 13:44:07.944201 <6>[ 23.857734] psci: CPU4 killed (polled 4 ms)
7062 13:44:07.944295 <6>[ 23.859560] psci: CPU5 killed (polled 0 ms)
7063 13:44:07.944389 <6>[ 23.861507] psci: CPU6 killed (polled 0 ms)
7064 13:44:07.944493 <6>[ 23.863292] psci: CPU7 killed (polled 0 ms)
7065 13:44:07.944586 <6>[ 23.863892] Enabling non-boot CPUs ...
7066 13:44:07.944680 <6>[ 23.864413] Detected VIPT I-cache on CPU1
7067 13:44:07.944772 <4>[ 23.864503] cacheinfo: Unable to detect cache hierarchy for CPU 1
7068 13:44:07.944866 <6>[ 23.864524] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
7069 13:44:07.944959 <6>[ 23.864605] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
7070 13:44:07.945053 <6>[ 23.865386] CPU1 is up
7071 13:44:07.945145 <6>[ 23.865754] Detected VIPT I-cache on CPU2
7072 13:44:07.945237 <4>[ 23.865796] cacheinfo: Unable to detect cache hierarchy for CPU 2
7073 13:44:07.945328 <6>[ 23.865806] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
7074 13:44:07.945420 <6>[ 23.865842] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
7075 13:44:07.945511 <6>[ 23.866239] CPU2 is up
7076 13:44:07.945603 <6>[ 23.866558] Detected VIPT I-cache on CPU3
7077 13:44:07.945695 <4>[ 23.866600] cacheinfo: Unable to detect cache hierarchy for CPU 3
7078 13:44:07.945786 <6>[ 23.866611] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
7079 13:44:07.945877 <6>[ 23.866646] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
7080 13:44:07.945968 <6>[ 23.867075] CPU3 is up
7081 13:44:07.946059 <6>[ 23.867598] Detected VIPT I-cache on CPU4
7082 13:44:07.946149 <4>[ 23.867664] cacheinfo: Unable to detect cache hierarchy for CPU 4
7083 13:44:07.946240 <6>[ 23.867682] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
7084 13:44:07.946331 <6>[ 23.867728] arch_timer: CPU4: Trapping CNTVCT access
7085 13:44:07.946420 <6>[ 23.867750] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
7086 13:44:07.946510 <6>[ 23.868466] CPU4 is up
7087 13:44:07.946600 <6>[ 23.868862] Detected VIPT I-cache on CPU5
7088 13:44:07.946691 <4>[ 23.868897] cacheinfo: Unable to detect cache hierarchy for CPU 5
7089 13:44:07.946781 <6>[ 23.868907] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
7090 13:44:07.946873 <6>[ 23.868929] arch_timer: CPU5: Trapping CNTVCT access
7091 13:44:07.946966 <6>[ 23.868939] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
7092 13:44:07.947058 <6>[ 23.869379] CPU5 is up
7093 13:44:07.947149 <6>[ 23.869762] Detected VIPT I-cache on CPU6
7094 13:44:07.947240 <4>[ 23.869798] cacheinfo: Unable to detect cache hierarchy for CPU 6
7095 13:44:07.947331 <6>[ 23.869808] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
7096 13:44:07.947422 <6>[ 23.869830] arch_timer: CPU6: Trapping CNTVCT access
7097 13:44:07.947513 <6>[ 23.869841] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
7098 13:44:07.947604 <6>[ 23.870321] CPU6 is up
7099 13:44:07.947694 <6>[ 23.870662] Detected VIPT I-cache on CPU7
7100 13:44:07.947784 <4>[ 23.870714] cacheinfo: Unable to detect cache hierarchy for CPU 7
7101 13:44:07.947876 <6>[ 23.870724] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
7102 13:44:07.947968 <6>[ 23.870747] arch_timer: CPU7: Trapping CNTVCT access
7103 13:44:07.948059 <6>[ 23.870757] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
7104 13:44:07.948150 <6>[ 23.871244] CPU7 is up
7105 13:44:07.948240 <4>[ 23.989833] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
7106 13:44:07.948332 <4>[ 24.000062] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
7107 13:44:07.948423 <4>[ 24.004543] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
7108 13:44:07.948520 <4>[ 24.005438] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
7109 13:44:07.948611 <6>[ 24.177173] r8152 1-1.2:1.0 eth0: carrier on
7110 13:44:07.948701 <6>[ 25.040254] OOM killer enabled.
7111 13:44:07.948792 <6>[ 25.044251] Restarting tasks ... done.
7112 13:44:07.948882 <5>[ 25.049390] random: crng reseeded on system resumption
7113 13:44:07.948972 <6>[ 25.056209] PM: suspend exit
7114 13:44:07.949062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtcwake-mem-3 RESULT=pass>
7115 13:44:07.949153 rtcwake: assuming RTC uses UTC ...
7116 13:44:07.949243 rtcwake: wakeup from "mem" using rtc0 at Thu Jul 18 13:44:04 2024
7117 13:44:07.949333 <6>[ 25.089452] PM: suspend entry (deep)
7118 13:44:07.949617 Received signal: <TESTCASE> TEST_CASE_ID=rtcwake-mem-3 RESULT=pass
7120 13:44:07.949913 <6>[ 25.095991] Filesystems sync: 0.000 seconds
7121 13:44:07.955701 <6>[ 25.103664] Freezing user space processes
7122 13:44:07.967438 <6>[ 25.111824] Freezing user space processes completed (elapsed 0.001 seconds)
7123 13:44:07.970579 <6>[ 25.121413] OOM killer disabled.
7124 13:44:07.979348 <6>[ 25.127248] Freezing remaining freezable tasks
7125 13:44:08.902839 <6>[ 26.047149] Freezing remaining freezable tasks completed (elapsed 0.912 seconds)
7126 13:44:08.914832 <6>[ 26.058796] printk: Suspending console(s) (use no_console_suspend to debug)
7127 13:44:14.857842 <6>[ 28.198184] Disabling non-boot CPUs ...
7128 13:44:14.858002 <6>[ 28.199536] psci: CPU1 killed (polled 0 ms)
7129 13:44:14.858108 <6>[ 28.201979] psci: CPU2 killed (polled 0 ms)
7130 13:44:14.858207 <6>[ 28.203320] psci: CPU3 killed (polled 4 ms)
7131 13:44:14.858307 <6>[ 28.205407] psci: CPU4 killed (polled 0 ms)
7132 13:44:14.858401 <6>[ 28.207357] psci: CPU5 killed (polled 4 ms)
7133 13:44:14.858489 <6>[ 28.209237] psci: CPU6 killed (polled 0 ms)
7134 13:44:14.858556 <6>[ 28.211103] psci: CPU7 killed (polled 0 ms)
7135 13:44:14.858615 <6>[ 28.211649] Enabling non-boot CPUs ...
7136 13:44:14.858675 <6>[ 28.212150] Detected VIPT I-cache on CPU1
7137 13:44:14.858731 <4>[ 28.212240] cacheinfo: Unable to detect cache hierarchy for CPU 1
7138 13:44:14.858788 <6>[ 28.212261] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
7139 13:44:14.858851 <6>[ 28.212342] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
7140 13:44:14.858908 <6>[ 28.213124] CPU1 is up
7141 13:44:14.858972 <6>[ 28.213490] Detected VIPT I-cache on CPU2
7142 13:44:14.859058 <4>[ 28.213532] cacheinfo: Unable to detect cache hierarchy for CPU 2
7143 13:44:14.859158 <6>[ 28.213542] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
7144 13:44:14.859254 <6>[ 28.213578] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
7145 13:44:14.859344 <6>[ 28.213978] CPU2 is up
7146 13:44:14.859407 <6>[ 28.214294] Detected VIPT I-cache on CPU3
7147 13:44:14.859471 <4>[ 28.214335] cacheinfo: Unable to detect cache hierarchy for CPU 3
7148 13:44:14.859544 <6>[ 28.214347] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
7149 13:44:14.859604 <6>[ 28.214382] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
7150 13:44:14.859659 <6>[ 28.214812] CPU3 is up
7151 13:44:14.859719 <6>[ 28.215334] Detected VIPT I-cache on CPU4
7152 13:44:14.859775 <4>[ 28.215400] cacheinfo: Unable to detect cache hierarchy for CPU 4
7153 13:44:14.859835 <6>[ 28.215418] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
7154 13:44:14.859890 <6>[ 28.215465] arch_timer: CPU4: Trapping CNTVCT access
7155 13:44:14.859946 <6>[ 28.215487] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
7156 13:44:14.860000 <6>[ 28.216206] CPU4 is up
7157 13:44:14.860061 <6>[ 28.216598] Detected VIPT I-cache on CPU5
7158 13:44:14.860120 <4>[ 28.216634] cacheinfo: Unable to detect cache hierarchy for CPU 5
7159 13:44:14.860175 <6>[ 28.216643] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
7160 13:44:14.860229 <6>[ 28.216665] arch_timer: CPU5: Trapping CNTVCT access
7161 13:44:14.860284 <6>[ 28.216676] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
7162 13:44:14.860346 <6>[ 28.217119] CPU5 is up
7163 13:44:14.860403 <6>[ 28.217498] Detected VIPT I-cache on CPU6
7164 13:44:14.860470 <4>[ 28.217548] cacheinfo: Unable to detect cache hierarchy for CPU 6
7165 13:44:14.860548 <6>[ 28.217558] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
7166 13:44:14.860632 <6>[ 28.217580] arch_timer: CPU6: Trapping CNTVCT access
7167 13:44:14.860710 <6>[ 28.217590] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
7168 13:44:14.860784 <6>[ 28.218055] CPU6 is up
7169 13:44:14.860858 <6>[ 28.218398] Detected VIPT I-cache on CPU7
7170 13:44:14.860959 <4>[ 28.218447] cacheinfo: Unable to detect cache hierarchy for CPU 7
7171 13:44:14.861245 <6>[ 28.218457] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
7172 13:44:14.863178 <6>[ 28.218480] arch_timer: CPU7: Trapping CNTVCT access
7173 13:44:14.873673 <6>[ 28.218490] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
7174 13:44:14.873765 <6>[ 28.218991] CPU7 is up
7175 13:44:14.883816 <4>[ 28.336671] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
7176 13:44:14.890427 <4>[ 28.346916] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
7177 13:44:14.896959 <4>[ 28.351147] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
7178 13:44:14.904037 <4>[ 28.352091] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
7179 13:44:14.910544 <6>[ 28.521647] r8152 1-1.2:1.0 eth0: carrier on
7180 13:44:14.914125 <6>[ 29.411072] OOM killer enabled.
7181 13:44:14.920586 <6>[ 29.415067] Restarting tasks ... done.
7182 13:44:14.923832 <5>[ 29.420131] random: crng reseeded on system resumption
7183 13:44:14.928211 <6>[ 29.426770] PM: suspend exit
7184 13:44:14.940412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtcwake-mem-4 RESULT=pass>
7185 13:44:14.940722 Received signal: <TESTCASE> TEST_CASE_ID=rtcwake-mem-4 RESULT=pass
7187 13:44:14.943961 rtcwake: assuming RTC uses UTC ...
7188 13:44:14.950368 rtcwake: wakeup from "mem" using rtc0 at Thu Jul 18 13:44:11 2024
7189 13:44:14.964219 <6>[ 29.459525] PM: suspend entry (deep)
7190 13:44:14.970837 <6>[ 29.465388] Filesystems sync: 0.000 seconds
7191 13:44:14.977603 <6>[ 29.472309] Freezing user space processes
7192 13:44:14.988532 <6>[ 29.480088] Freezing user space processes completed (elapsed 0.001 seconds)
7193 13:44:14.991462 <6>[ 29.489452] OOM killer disabled.
7194 13:44:14.999730 <6>[ 29.494972] Freezing remaining freezable tasks
7195 13:44:15.929600 <6>[ 30.421205] Freezing remaining freezable tasks completed (elapsed 0.919 seconds)
7196 13:44:15.940818 <6>[ 30.432802] printk: Suspending console(s) (use no_console_suspend to debug)
7197 13:48:46.468798 Marking unfinished test run as failed
7200 13:48:46.469138 end: 3.1 lava-test-shell (duration 00:05:00) [common]
7202 13:48:46.469322 lava-test-retry failed: 1 of 1 attempts. 'lava-test-shell timed out after 300 seconds'
7204 13:48:46.469479 end: 3 lava-test-retry (duration 00:05:00) [common]
7206 13:48:46.469705 Cleaning after the job
7207 13:48:46.469803 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879034/tftp-deploy-uolv_d5l/ramdisk
7208 13:48:46.472426 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879034/tftp-deploy-uolv_d5l/kernel
7209 13:48:46.476834 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879034/tftp-deploy-uolv_d5l/dtb
7210 13:48:46.477002 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14879034/tftp-deploy-uolv_d5l/modules
7211 13:48:46.478413 start: 4.1 power-off (timeout 00:00:30) [common]
7212 13:48:46.478572 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
7213 13:48:48.571025 >> Command sent successfully.
7214 13:48:48.574521 Returned 0 in 2 seconds
7215 13:48:48.574663 end: 4.1 power-off (duration 00:00:02) [common]
7217 13:48:48.574882 start: 4.2 read-feedback (timeout 00:04:58) [common]
7218 13:48:48.575030 Listened to connection for namespace 'common' for up to 1s
7219 13:48:49.576073 Finalising connection for namespace 'common'
7220 13:48:49.576213 Disconnecting from shell: Finalise
7221 13:48:49.676752 end: 4.2 read-feedback (duration 00:00:01) [common]
7222 13:48:49.677269 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14879034
7223 13:48:49.863009 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14879034
7224 13:48:49.863177 TestError: A test failed to run, look at the error message.