Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 1
- Kernel Errors: 40
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 87
1 13:07:12.770878 lava-dispatcher, installed at version: 2024.05
2 13:07:12.771125 start: 0 validate
3 13:07:12.771304 Start time: 2024-07-18 13:07:12.771297+00:00 (UTC)
4 13:07:12.771525 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:07:12.771755 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-v4l2%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 13:07:13.041767 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:07:13.042007 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 13:07:13.299152 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:07:13.299421 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 13:07:29.645502 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:07:29.645711 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24-23-g9db533125afb0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
12 13:07:30.159589 validate duration: 17.39
14 13:07:30.159862 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:07:30.159965 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:07:30.160053 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:07:30.160207 Not decompressing ramdisk as can be used compressed.
18 13:07:30.160298 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-v4l2/20240313.0/arm64/rootfs.cpio.gz
19 13:07:30.160398 saving as /var/lib/lava/dispatcher/tmp/14878986/tftp-deploy-j377ujnf/ramdisk/rootfs.cpio.gz
20 13:07:30.160504 total size: 28105535 (26 MB)
21 13:07:32.476698 progress 0 % (0 MB)
22 13:07:32.484700 progress 5 % (1 MB)
23 13:07:32.492488 progress 10 % (2 MB)
24 13:07:32.500271 progress 15 % (4 MB)
25 13:07:32.507983 progress 20 % (5 MB)
26 13:07:32.515801 progress 25 % (6 MB)
27 13:07:32.523622 progress 30 % (8 MB)
28 13:07:32.531391 progress 35 % (9 MB)
29 13:07:32.539302 progress 40 % (10 MB)
30 13:07:32.546881 progress 45 % (12 MB)
31 13:07:32.554686 progress 50 % (13 MB)
32 13:07:32.562359 progress 55 % (14 MB)
33 13:07:32.570098 progress 60 % (16 MB)
34 13:07:32.577736 progress 65 % (17 MB)
35 13:07:32.585339 progress 70 % (18 MB)
36 13:07:32.592951 progress 75 % (20 MB)
37 13:07:32.600575 progress 80 % (21 MB)
38 13:07:32.608163 progress 85 % (22 MB)
39 13:07:32.615686 progress 90 % (24 MB)
40 13:07:32.623224 progress 95 % (25 MB)
41 13:07:32.630724 progress 100 % (26 MB)
42 13:07:32.630985 26 MB downloaded in 2.47 s (10.85 MB/s)
43 13:07:32.631158 end: 1.1.1 http-download (duration 00:00:02) [common]
45 13:07:32.631403 end: 1.1 download-retry (duration 00:00:02) [common]
46 13:07:32.631490 start: 1.2 download-retry (timeout 00:09:58) [common]
47 13:07:32.631574 start: 1.2.1 http-download (timeout 00:09:58) [common]
48 13:07:32.631752 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
49 13:07:32.631823 saving as /var/lib/lava/dispatcher/tmp/14878986/tftp-deploy-j377ujnf/kernel/Image
50 13:07:32.631882 total size: 54813184 (52 MB)
51 13:07:32.631942 No compression specified
52 13:07:32.889677 progress 0 % (0 MB)
53 13:07:32.904475 progress 5 % (2 MB)
54 13:07:32.919518 progress 10 % (5 MB)
55 13:07:32.934418 progress 15 % (7 MB)
56 13:07:32.949222 progress 20 % (10 MB)
57 13:07:32.963949 progress 25 % (13 MB)
58 13:07:32.978879 progress 30 % (15 MB)
59 13:07:32.993598 progress 35 % (18 MB)
60 13:07:33.008231 progress 40 % (20 MB)
61 13:07:33.022875 progress 45 % (23 MB)
62 13:07:33.037660 progress 50 % (26 MB)
63 13:07:33.052379 progress 55 % (28 MB)
64 13:07:33.067043 progress 60 % (31 MB)
65 13:07:33.082018 progress 65 % (34 MB)
66 13:07:33.096489 progress 70 % (36 MB)
67 13:07:33.111128 progress 75 % (39 MB)
68 13:07:33.125865 progress 80 % (41 MB)
69 13:07:33.140583 progress 85 % (44 MB)
70 13:07:33.155281 progress 90 % (47 MB)
71 13:07:33.170112 progress 95 % (49 MB)
72 13:07:33.184744 progress 100 % (52 MB)
73 13:07:33.185044 52 MB downloaded in 0.55 s (94.50 MB/s)
74 13:07:33.185260 end: 1.2.1 http-download (duration 00:00:01) [common]
76 13:07:33.185634 end: 1.2 download-retry (duration 00:00:01) [common]
77 13:07:33.185752 start: 1.3 download-retry (timeout 00:09:57) [common]
78 13:07:33.185865 start: 1.3.1 http-download (timeout 00:09:57) [common]
79 13:07:33.186039 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 13:07:33.186137 saving as /var/lib/lava/dispatcher/tmp/14878986/tftp-deploy-j377ujnf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 13:07:33.186225 total size: 57695 (0 MB)
82 13:07:33.186316 No compression specified
83 13:07:33.187763 progress 56 % (0 MB)
84 13:07:33.188048 progress 100 % (0 MB)
85 13:07:33.188258 0 MB downloaded in 0.00 s (27.12 MB/s)
86 13:07:33.188396 end: 1.3.1 http-download (duration 00:00:00) [common]
88 13:07:33.188634 end: 1.3 download-retry (duration 00:00:00) [common]
89 13:07:33.188717 start: 1.4 download-retry (timeout 00:09:57) [common]
90 13:07:33.188799 start: 1.4.1 http-download (timeout 00:09:57) [common]
91 13:07:33.188922 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24-23-g9db533125afb0/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
92 13:07:33.188989 saving as /var/lib/lava/dispatcher/tmp/14878986/tftp-deploy-j377ujnf/modules/modules.tar
93 13:07:33.189047 total size: 8611320 (8 MB)
94 13:07:33.189106 Using unxz to decompress xz
95 13:07:33.190576 progress 0 % (0 MB)
96 13:07:33.212788 progress 5 % (0 MB)
97 13:07:33.239379 progress 10 % (0 MB)
98 13:07:33.265900 progress 15 % (1 MB)
99 13:07:33.292645 progress 20 % (1 MB)
100 13:07:33.318520 progress 25 % (2 MB)
101 13:07:33.344256 progress 30 % (2 MB)
102 13:07:33.369026 progress 35 % (2 MB)
103 13:07:33.398053 progress 40 % (3 MB)
104 13:07:33.424931 progress 45 % (3 MB)
105 13:07:33.452160 progress 50 % (4 MB)
106 13:07:33.482108 progress 55 % (4 MB)
107 13:07:33.508730 progress 60 % (4 MB)
108 13:07:33.534201 progress 65 % (5 MB)
109 13:07:33.562259 progress 70 % (5 MB)
110 13:07:33.591881 progress 75 % (6 MB)
111 13:07:33.621940 progress 80 % (6 MB)
112 13:07:33.648251 progress 85 % (7 MB)
113 13:07:33.674102 progress 90 % (7 MB)
114 13:07:33.700201 progress 95 % (7 MB)
115 13:07:33.725479 progress 100 % (8 MB)
116 13:07:33.731589 8 MB downloaded in 0.54 s (15.14 MB/s)
117 13:07:33.731789 end: 1.4.1 http-download (duration 00:00:01) [common]
119 13:07:33.732030 end: 1.4 download-retry (duration 00:00:01) [common]
120 13:07:33.732121 start: 1.5 prepare-tftp-overlay (timeout 00:09:56) [common]
121 13:07:33.732207 start: 1.5.1 extract-nfsrootfs (timeout 00:09:56) [common]
122 13:07:33.732284 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 13:07:33.732364 start: 1.5.2 lava-overlay (timeout 00:09:56) [common]
124 13:07:33.732559 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid
125 13:07:33.732693 makedir: /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin
126 13:07:33.732796 makedir: /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/tests
127 13:07:33.732895 makedir: /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/results
128 13:07:33.733011 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-add-keys
129 13:07:33.733156 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-add-sources
130 13:07:33.733290 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-background-process-start
131 13:07:33.733421 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-background-process-stop
132 13:07:33.733594 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-common-functions
133 13:07:33.733732 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-echo-ipv4
134 13:07:33.733876 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-install-packages
135 13:07:33.734007 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-installed-packages
136 13:07:33.734133 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-os-build
137 13:07:33.734259 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-probe-channel
138 13:07:33.734384 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-probe-ip
139 13:07:33.734513 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-target-ip
140 13:07:33.734640 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-target-mac
141 13:07:33.734764 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-target-storage
142 13:07:33.734893 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-test-case
143 13:07:33.735018 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-test-event
144 13:07:33.735143 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-test-feedback
145 13:07:33.735268 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-test-raise
146 13:07:33.735398 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-test-reference
147 13:07:33.735524 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-test-runner
148 13:07:33.735649 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-test-set
149 13:07:33.735773 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-test-shell
150 13:07:33.735902 Updating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-install-packages (oe)
151 13:07:33.736057 Updating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/bin/lava-installed-packages (oe)
152 13:07:33.736181 Creating /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/environment
153 13:07:33.736282 LAVA metadata
154 13:07:33.736354 - LAVA_JOB_ID=14878986
155 13:07:33.736426 - LAVA_DISPATCHER_IP=192.168.201.1
156 13:07:33.736547 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:56) [common]
157 13:07:33.736610 skipped lava-vland-overlay
158 13:07:33.736684 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 13:07:33.736763 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:56) [common]
160 13:07:33.736825 skipped lava-multinode-overlay
161 13:07:33.736896 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 13:07:33.736972 start: 1.5.2.3 test-definition (timeout 00:09:56) [common]
163 13:07:33.737043 Loading test definitions
164 13:07:33.737127 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:56) [common]
165 13:07:33.737192 Using /lava-14878986 at stage 0
166 13:07:33.737520 uuid=14878986_1.5.2.3.1 testdef=None
167 13:07:33.737610 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 13:07:33.737693 start: 1.5.2.3.2 test-overlay (timeout 00:09:56) [common]
169 13:07:33.738169 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 13:07:33.738392 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:56) [common]
172 13:07:33.739060 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 13:07:33.739305 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:56) [common]
175 13:07:33.739910 runner path: /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/0/tests/0_v4l2-compliance-uvc test_uuid 14878986_1.5.2.3.1
176 13:07:33.740068 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 13:07:33.740282 Creating lava-test-runner.conf files
179 13:07:33.740346 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14878986/lava-overlay-uongcuid/lava-14878986/0 for stage 0
180 13:07:33.740435 - 0_v4l2-compliance-uvc
181 13:07:33.740574 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 13:07:33.740688 start: 1.5.2.4 compress-overlay (timeout 00:09:56) [common]
183 13:07:33.747669 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 13:07:33.747800 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:56) [common]
185 13:07:33.747891 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 13:07:33.747980 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 13:07:33.748066 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:56) [common]
188 13:07:34.612950 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 13:07:34.613106 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
190 13:07:34.613203 extracting modules file /var/lib/lava/dispatcher/tmp/14878986/tftp-deploy-j377ujnf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14878986/extract-overlay-ramdisk-w192bd9v/ramdisk
191 13:07:34.872766 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 13:07:34.872954 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
193 13:07:34.873081 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14878986/compress-overlay-f266pl27/overlay-1.5.2.4.tar.gz to ramdisk
194 13:07:34.873180 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14878986/compress-overlay-f266pl27/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14878986/extract-overlay-ramdisk-w192bd9v/ramdisk
195 13:07:34.884321 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 13:07:34.884469 start: 1.5.6 configure-preseed-file (timeout 00:09:55) [common]
197 13:07:34.884565 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 13:07:34.884653 start: 1.5.7 compress-ramdisk (timeout 00:09:55) [common]
199 13:07:34.884727 Building ramdisk /var/lib/lava/dispatcher/tmp/14878986/extract-overlay-ramdisk-w192bd9v/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14878986/extract-overlay-ramdisk-w192bd9v/ramdisk
200 13:07:35.668119 >> 275512 blocks
201 13:07:40.353517 rename /var/lib/lava/dispatcher/tmp/14878986/extract-overlay-ramdisk-w192bd9v/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14878986/tftp-deploy-j377ujnf/ramdisk/ramdisk.cpio.gz
202 13:07:40.353735 end: 1.5.7 compress-ramdisk (duration 00:00:05) [common]
203 13:07:40.353870 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
204 13:07:40.353993 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
205 13:07:40.354116 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14878986/tftp-deploy-j377ujnf/kernel/Image']
206 13:07:55.042152 Returned 0 in 14 seconds
207 13:07:55.042320 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14878986/tftp-deploy-j377ujnf/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14878986/tftp-deploy-j377ujnf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14878986/tftp-deploy-j377ujnf/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14878986/tftp-deploy-j377ujnf/kernel/image.itb
208 13:07:55.731721 output: FIT description: Kernel Image image with one or more FDT blobs
209 13:07:55.731868 output: Created: Thu Jul 18 14:07:55 2024
210 13:07:55.731965 output: Image 0 (kernel-1)
211 13:07:55.732056 output: Description:
212 13:07:55.732143 output: Created: Thu Jul 18 14:07:55 2024
213 13:07:55.732243 output: Type: Kernel Image
214 13:07:55.732341 output: Compression: lzma compressed
215 13:07:55.732430 output: Data Size: 13114469 Bytes = 12807.10 KiB = 12.51 MiB
216 13:07:55.732512 output: Architecture: AArch64
217 13:07:55.732569 output: OS: Linux
218 13:07:55.732623 output: Load Address: 0x00000000
219 13:07:55.732676 output: Entry Point: 0x00000000
220 13:07:55.732728 output: Hash algo: crc32
221 13:07:55.732791 output: Hash value: a47b020b
222 13:07:55.732890 output: Image 1 (fdt-1)
223 13:07:55.732948 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 13:07:55.733002 output: Created: Thu Jul 18 14:07:55 2024
225 13:07:55.733055 output: Type: Flat Device Tree
226 13:07:55.733108 output: Compression: uncompressed
227 13:07:55.733162 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 13:07:55.733216 output: Architecture: AArch64
229 13:07:55.733270 output: Hash algo: crc32
230 13:07:55.733332 output: Hash value: a9713552
231 13:07:55.733430 output: Image 2 (ramdisk-1)
232 13:07:55.733489 output: Description: unavailable
233 13:07:55.733543 output: Created: Thu Jul 18 14:07:55 2024
234 13:07:55.733597 output: Type: RAMDisk Image
235 13:07:55.733650 output: Compression: uncompressed
236 13:07:55.733703 output: Data Size: 41196176 Bytes = 40230.64 KiB = 39.29 MiB
237 13:07:55.733756 output: Architecture: AArch64
238 13:07:55.733808 output: OS: Linux
239 13:07:55.733870 output: Load Address: unavailable
240 13:07:55.733966 output: Entry Point: unavailable
241 13:07:55.734037 output: Hash algo: crc32
242 13:07:55.734092 output: Hash value: 4d574826
243 13:07:55.734144 output: Default Configuration: 'conf-1'
244 13:07:55.734197 output: Configuration 0 (conf-1)
245 13:07:55.734250 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 13:07:55.734302 output: Kernel: kernel-1
247 13:07:55.734393 output: Init Ramdisk: ramdisk-1
248 13:07:55.734450 output: FDT: fdt-1
249 13:07:55.734503 output: Loadables: kernel-1
250 13:07:55.734555 output:
251 13:07:55.734662 end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
252 13:07:55.734743 end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
253 13:07:55.734823 end: 1.5 prepare-tftp-overlay (duration 00:00:22) [common]
254 13:07:55.734904 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
255 13:07:55.734966 No LXC device requested
256 13:07:55.735085 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 13:07:55.735167 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
258 13:07:55.735242 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 13:07:55.735303 Checking files for TFTP limit of 4294967296 bytes.
260 13:07:55.735755 end: 1 tftp-deploy (duration 00:00:26) [common]
261 13:07:55.735853 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 13:07:55.735949 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 13:07:55.736082 substitutions:
264 13:07:55.736184 - {DTB}: 14878986/tftp-deploy-j377ujnf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 13:07:55.736253 - {INITRD}: 14878986/tftp-deploy-j377ujnf/ramdisk/ramdisk.cpio.gz
266 13:07:55.736313 - {KERNEL}: 14878986/tftp-deploy-j377ujnf/kernel/Image
267 13:07:55.736392 - {LAVA_MAC}: None
268 13:07:55.736493 - {PRESEED_CONFIG}: None
269 13:07:55.736591 - {PRESEED_LOCAL}: None
270 13:07:55.736707 - {RAMDISK}: 14878986/tftp-deploy-j377ujnf/ramdisk/ramdisk.cpio.gz
271 13:07:55.736808 - {ROOT_PART}: None
272 13:07:55.736895 - {ROOT}: None
273 13:07:55.736983 - {SERVER_IP}: 192.168.201.1
274 13:07:55.737068 - {TEE}: None
275 13:07:55.737178 Parsed boot commands:
276 13:07:55.737263 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 13:07:55.737463 Parsed boot commands: tftpboot 192.168.201.1 14878986/tftp-deploy-j377ujnf/kernel/image.itb 14878986/tftp-deploy-j377ujnf/kernel/cmdline
278 13:07:55.737579 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 13:07:55.737702 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 13:07:55.737828 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 13:07:55.737937 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 13:07:55.738026 Not connected, no need to disconnect.
283 13:07:55.738129 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 13:07:55.738234 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 13:07:55.738333 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
286 13:07:55.741374 Setting prompt string to ['lava-test: # ']
287 13:07:55.741796 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 13:07:55.741938 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 13:07:55.742067 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 13:07:55.742192 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 13:07:55.742540 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=reboot']
292 13:08:04.869803 >> Command sent successfully.
293 13:08:04.874065 Returned 0 in 9 seconds
294 13:08:04.874236 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
296 13:08:04.874469 end: 2.2.2 reset-device (duration 00:00:09) [common]
297 13:08:04.874564 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
298 13:08:04.874647 Setting prompt string to 'Starting depthcharge on Juniper...'
299 13:08:04.874711 Changing prompt to 'Starting depthcharge on Juniper...'
300 13:08:04.874780 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
301 13:08:04.875140 [Enter `^Ec?' for help]
302 13:08:12.990015 [DL] 00000000 00000000 010701
303 13:08:12.994611
304 13:08:12.994704
305 13:08:12.994771 F0: 102B 0000
306 13:08:12.994838
307 13:08:12.994897 F3: 1006 0033 [0200]
308 13:08:12.997951
309 13:08:12.998035 F3: 4001 00E0 [0200]
310 13:08:12.998102
311 13:08:12.998164 F3: 0000 0000
312 13:08:13.001338
313 13:08:13.001423 V0: 0000 0000 [0001]
314 13:08:13.001489
315 13:08:13.001550 00: 1027 0002
316 13:08:13.001610
317 13:08:13.004609 01: 0000 0000
318 13:08:13.004695
319 13:08:13.004760 BP: 0C00 0251 [0000]
320 13:08:13.004821
321 13:08:13.008131 G0: 1182 0000
322 13:08:13.008215
323 13:08:13.008290 EC: 0004 0000 [0001]
324 13:08:13.008394
325 13:08:13.011357 S7: 0000 0000 [0000]
326 13:08:13.011456
327 13:08:13.011545 CC: 0000 0000 [0001]
328 13:08:13.014653
329 13:08:13.014736 T0: 0000 00DB [000F]
330 13:08:13.014802
331 13:08:13.014862 Jump to BL
332 13:08:13.014924
333 13:08:13.050621
334 13:08:13.050719
335 13:08:13.057190 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
336 13:08:13.060681 ARM64: Exception handlers installed.
337 13:08:13.063983 ARM64: Testing exception
338 13:08:13.067646 ARM64: Done test exception
339 13:08:13.072368 WDT: Last reset was cold boot
340 13:08:13.072485 SPI0(PAD0) initialized at 992727 Hz
341 13:08:13.075349 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
342 13:08:13.078909 Manufacturer: ef
343 13:08:13.085343 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
344 13:08:13.097386 Probing TPM: . done!
345 13:08:13.097473 TPM ready after 0 ms
346 13:08:13.104297 Connected to device vid:did:rid of 1ae0:0028:00
347 13:08:13.110545 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
348 13:08:13.146317 Initialized TPM device CR50 revision 0
349 13:08:13.158348 tlcl_send_startup: Startup return code is 0
350 13:08:13.158472 TPM: setup succeeded
351 13:08:13.167601 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
352 13:08:13.170873 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
353 13:08:13.174505 in-header: 03 19 00 00 08 00 00 00
354 13:08:13.177534 in-data: a2 e0 47 00 13 00 00 00
355 13:08:13.180912 Chrome EC: UHEPI supported
356 13:08:13.187621 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
357 13:08:13.191477 in-header: 03 a1 00 00 08 00 00 00
358 13:08:13.194183 in-data: 84 60 60 10 00 00 00 00
359 13:08:13.194261 Phase 1
360 13:08:13.197521 FMAP: area GBB found @ 3f5000 (12032 bytes)
361 13:08:13.204364 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
362 13:08:13.211348 VB2:vb2_check_recovery() Recovery was requested manually
363 13:08:13.214600 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
364 13:08:13.220338 Recovery requested (1009000e)
365 13:08:13.226577 tlcl_extend: response is 0
366 13:08:13.234778 tlcl_extend: response is 0
367 13:08:13.259089
368 13:08:13.259178
369 13:08:13.266235 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
370 13:08:13.269427 ARM64: Exception handlers installed.
371 13:08:13.272643 ARM64: Testing exception
372 13:08:13.275893 ARM64: Done test exception
373 13:08:13.291736 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2024
374 13:08:13.298557 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
375 13:08:13.301330 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
376 13:08:13.309923 [RTC]rtc_get_frequency_meter,134: input=0xf, output=916
377 13:08:13.317015 [RTC]rtc_get_frequency_meter,134: input=0x7, output=781
378 13:08:13.323760 [RTC]rtc_get_frequency_meter,134: input=0xb, output=849
379 13:08:13.330498 [RTC]rtc_get_frequency_meter,134: input=0x9, output=812
380 13:08:13.337642 [RTC]rtc_get_frequency_meter,134: input=0x8, output=796
381 13:08:13.340745 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
382 13:08:13.347387 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
383 13:08:13.350466 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
384 13:08:13.357448 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
385 13:08:13.360693 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
386 13:08:13.364045 in-header: 03 19 00 00 08 00 00 00
387 13:08:13.364131 in-data: a2 e0 47 00 13 00 00 00
388 13:08:13.367725 Chrome EC: UHEPI supported
389 13:08:13.374062 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
390 13:08:13.377383 in-header: 03 a1 00 00 08 00 00 00
391 13:08:13.380918 in-data: 84 60 60 10 00 00 00 00
392 13:08:13.384236 Skip loading cached calibration data
393 13:08:13.390679 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
394 13:08:13.394144 in-header: 03 a1 00 00 08 00 00 00
395 13:08:13.397628 in-data: 84 60 60 10 00 00 00 00
396 13:08:13.404504 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
397 13:08:13.407708 in-header: 03 a1 00 00 08 00 00 00
398 13:08:13.411270 in-data: 84 60 60 10 00 00 00 00
399 13:08:13.415099 ADC[3]: Raw value=215860 ID=1
400 13:08:13.415183 Manufacturer: ef
401 13:08:13.421038 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
402 13:08:13.424303 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
403 13:08:13.427679 CBFS @ 21000 size 3d4000
404 13:08:13.431054 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
405 13:08:13.437710 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
406 13:08:13.440972 CBFS: Found @ offset 3c700 size 44
407 13:08:13.441057 DRAM-K: Full Calibration
408 13:08:13.447687 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
409 13:08:13.447773 CBFS @ 21000 size 3d4000
410 13:08:13.454463 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
411 13:08:13.457850 CBFS: Locating 'fallback/dram'
412 13:08:13.461242 CBFS: Found @ offset 24b00 size 12268
413 13:08:13.488721 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
414 13:08:13.492167 ddr_geometry: 1, config: 0x0
415 13:08:13.495568 header.status = 0x0
416 13:08:13.498694 header.magic = 0x44524d4b (expected: 0x44524d4b)
417 13:08:13.502035 header.version = 0x5 (expected: 0x5)
418 13:08:13.505419 header.size = 0x8f0 (expected: 0x8f0)
419 13:08:13.505503 header.config = 0x0
420 13:08:13.508835 header.flags = 0x0
421 13:08:13.508919 header.checksum = 0x0
422 13:08:13.515636 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
423 13:08:13.522220 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
424 13:08:13.525863 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
425 13:08:13.528740 ddr_geometry:1
426 13:08:13.528826 [EMI] new MDL number = 1
427 13:08:13.532075 dram_cbt_mode_extern: 0
428 13:08:13.536066 dram_cbt_mode [RK0]: 0, [RK1]: 0
429 13:08:13.542621 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
430 13:08:13.542705
431 13:08:13.542771
432 13:08:13.542831 [Bianco] ETT version 0.0.0.1
433 13:08:13.549235 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
434 13:08:13.549325
435 13:08:13.552425 vSetVcoreByFreq with vcore:762500, freq=1600
436 13:08:13.552525
437 13:08:13.552591 [DramcInit]
438 13:08:13.555688 AutoRefreshCKEOff AutoREF OFF
439 13:08:13.559086 DDRPhyPLLSetting-CKEOFF
440 13:08:13.562872 DDRPhyPLLSetting-CKEON
441 13:08:13.562956
442 13:08:13.563021 Enable WDQS
443 13:08:13.566056 [ModeRegInit_LP4] CH0 RK0
444 13:08:13.569509 Write Rank0 MR13 =0x18
445 13:08:13.569597 Write Rank0 MR12 =0x5d
446 13:08:13.572641 Write Rank0 MR1 =0x56
447 13:08:13.575892 Write Rank0 MR2 =0x1a
448 13:08:13.575983 Write Rank0 MR11 =0x0
449 13:08:13.579251 Write Rank0 MR22 =0x38
450 13:08:13.579336 Write Rank0 MR14 =0x5d
451 13:08:13.582595 Write Rank0 MR3 =0x30
452 13:08:13.585711 Write Rank0 MR13 =0x58
453 13:08:13.585796 Write Rank0 MR12 =0x5d
454 13:08:13.589180 Write Rank0 MR1 =0x56
455 13:08:13.589264 Write Rank0 MR2 =0x2d
456 13:08:13.592727 Write Rank0 MR11 =0x23
457 13:08:13.596113 Write Rank0 MR22 =0x34
458 13:08:13.596229 Write Rank0 MR14 =0x10
459 13:08:13.599934 Write Rank0 MR3 =0x30
460 13:08:13.600023 Write Rank0 MR13 =0xd8
461 13:08:13.603072 [ModeRegInit_LP4] CH0 RK1
462 13:08:13.605909 Write Rank1 MR13 =0x18
463 13:08:13.605993 Write Rank1 MR12 =0x5d
464 13:08:13.609255 Write Rank1 MR1 =0x56
465 13:08:13.613007 Write Rank1 MR2 =0x1a
466 13:08:13.613091 Write Rank1 MR11 =0x0
467 13:08:13.616247 Write Rank1 MR22 =0x38
468 13:08:13.616330 Write Rank1 MR14 =0x5d
469 13:08:13.619542 Write Rank1 MR3 =0x30
470 13:08:13.623082 Write Rank1 MR13 =0x58
471 13:08:13.623166 Write Rank1 MR12 =0x5d
472 13:08:13.626536 Write Rank1 MR1 =0x56
473 13:08:13.626621 Write Rank1 MR2 =0x2d
474 13:08:13.629584 Write Rank1 MR11 =0x23
475 13:08:13.633067 Write Rank1 MR22 =0x34
476 13:08:13.633151 Write Rank1 MR14 =0x10
477 13:08:13.635987 Write Rank1 MR3 =0x30
478 13:08:13.639228 Write Rank1 MR13 =0xd8
479 13:08:13.639343 [ModeRegInit_LP4] CH1 RK0
480 13:08:13.642641 Write Rank0 MR13 =0x18
481 13:08:13.642727 Write Rank0 MR12 =0x5d
482 13:08:13.646125 Write Rank0 MR1 =0x56
483 13:08:13.649384 Write Rank0 MR2 =0x1a
484 13:08:13.649458 Write Rank0 MR11 =0x0
485 13:08:13.653095 Write Rank0 MR22 =0x38
486 13:08:13.653164 Write Rank0 MR14 =0x5d
487 13:08:13.656279 Write Rank0 MR3 =0x30
488 13:08:13.659560 Write Rank0 MR13 =0x58
489 13:08:13.659630 Write Rank0 MR12 =0x5d
490 13:08:13.662961 Write Rank0 MR1 =0x56
491 13:08:13.663045 Write Rank0 MR2 =0x2d
492 13:08:13.666494 Write Rank0 MR11 =0x23
493 13:08:13.669689 Write Rank0 MR22 =0x34
494 13:08:13.669799 Write Rank0 MR14 =0x10
495 13:08:13.673382 Write Rank0 MR3 =0x30
496 13:08:13.676378 Write Rank0 MR13 =0xd8
497 13:08:13.676486 [ModeRegInit_LP4] CH1 RK1
498 13:08:13.679682 Write Rank1 MR13 =0x18
499 13:08:13.679766 Write Rank1 MR12 =0x5d
500 13:08:13.682930 Write Rank1 MR1 =0x56
501 13:08:13.686766 Write Rank1 MR2 =0x1a
502 13:08:13.686851 Write Rank1 MR11 =0x0
503 13:08:13.690256 Write Rank1 MR22 =0x38
504 13:08:13.690344 Write Rank1 MR14 =0x5d
505 13:08:13.692907 Write Rank1 MR3 =0x30
506 13:08:13.696575 Write Rank1 MR13 =0x58
507 13:08:13.696663 Write Rank1 MR12 =0x5d
508 13:08:13.700112 Write Rank1 MR1 =0x56
509 13:08:13.700201 Write Rank1 MR2 =0x2d
510 13:08:13.703229 Write Rank1 MR11 =0x23
511 13:08:13.706665 Write Rank1 MR22 =0x34
512 13:08:13.706750 Write Rank1 MR14 =0x10
513 13:08:13.709981 Write Rank1 MR3 =0x30
514 13:08:13.713395 Write Rank1 MR13 =0xd8
515 13:08:13.713481 match AC timing 3
516 13:08:13.723363 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
517 13:08:13.723444 [MiockJmeterHQA]
518 13:08:13.729748 vSetVcoreByFreq with vcore:762500, freq=1600
519 13:08:13.833645
520 13:08:13.833774 MIOCK jitter meter ch=0
521 13:08:13.833843
522 13:08:13.837003 1T = (102-17) = 85 dly cells
523 13:08:13.844031 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
524 13:08:13.847166 vSetVcoreByFreq with vcore:725000, freq=1200
525 13:08:13.946421
526 13:08:13.946536 MIOCK jitter meter ch=0
527 13:08:13.946606
528 13:08:13.949676 1T = (96-16) = 80 dly cells
529 13:08:13.956852 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
530 13:08:13.959514 vSetVcoreByFreq with vcore:725000, freq=800
531 13:08:14.058722
532 13:08:14.058846 MIOCK jitter meter ch=0
533 13:08:14.058914
534 13:08:14.062110 1T = (96-16) = 80 dly cells
535 13:08:14.068853 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
536 13:08:14.072127 vSetVcoreByFreq with vcore:762500, freq=1600
537 13:08:14.075477 vSetVcoreByFreq with vcore:762500, freq=1600
538 13:08:14.075561
539 13:08:14.075626 K DRVP
540 13:08:14.078658 1. OCD DRVP=0 CALOUT=0
541 13:08:14.082006 1. OCD DRVP=1 CALOUT=0
542 13:08:14.082092 1. OCD DRVP=2 CALOUT=0
543 13:08:14.085505 1. OCD DRVP=3 CALOUT=0
544 13:08:14.085591 1. OCD DRVP=4 CALOUT=0
545 13:08:14.088737 1. OCD DRVP=5 CALOUT=0
546 13:08:14.092010 1. OCD DRVP=6 CALOUT=0
547 13:08:14.092095 1. OCD DRVP=7 CALOUT=0
548 13:08:14.095602 1. OCD DRVP=8 CALOUT=0
549 13:08:14.098587 1. OCD DRVP=9 CALOUT=1
550 13:08:14.098674
551 13:08:14.101935 1. OCD DRVP calibration OK! DRVP=9
552 13:08:14.102021
553 13:08:14.102087
554 13:08:14.102145
555 13:08:14.102203 K ODTN
556 13:08:14.105296 3. OCD ODTN=0 ,CALOUT=1
557 13:08:14.105382 3. OCD ODTN=1 ,CALOUT=1
558 13:08:14.109043 3. OCD ODTN=2 ,CALOUT=1
559 13:08:14.109128 3. OCD ODTN=3 ,CALOUT=1
560 13:08:14.111982 3. OCD ODTN=4 ,CALOUT=1
561 13:08:14.115332 3. OCD ODTN=5 ,CALOUT=1
562 13:08:14.115429 3. OCD ODTN=6 ,CALOUT=1
563 13:08:14.118937 3. OCD ODTN=7 ,CALOUT=0
564 13:08:14.119022
565 13:08:14.121977 3. OCD ODTN calibration OK! ODTN=7
566 13:08:14.122062
567 13:08:14.125606 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
568 13:08:14.128937 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
569 13:08:14.135576 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
570 13:08:14.135663
571 13:08:14.135729 K DRVP
572 13:08:14.139070 1. OCD DRVP=0 CALOUT=0
573 13:08:14.139154 1. OCD DRVP=1 CALOUT=0
574 13:08:14.142181 1. OCD DRVP=2 CALOUT=0
575 13:08:14.145572 1. OCD DRVP=3 CALOUT=0
576 13:08:14.145657 1. OCD DRVP=4 CALOUT=0
577 13:08:14.149108 1. OCD DRVP=5 CALOUT=0
578 13:08:14.149204 1. OCD DRVP=6 CALOUT=0
579 13:08:14.152333 1. OCD DRVP=7 CALOUT=0
580 13:08:14.155747 1. OCD DRVP=8 CALOUT=0
581 13:08:14.155833 1. OCD DRVP=9 CALOUT=0
582 13:08:14.159238 1. OCD DRVP=10 CALOUT=0
583 13:08:14.162414 1. OCD DRVP=11 CALOUT=1
584 13:08:14.162498
585 13:08:14.165784 1. OCD DRVP calibration OK! DRVP=11
586 13:08:14.165870
587 13:08:14.165934
588 13:08:14.166003
589 13:08:14.166069 K ODTN
590 13:08:14.169338 3. OCD ODTN=0 ,CALOUT=1
591 13:08:14.169425 3. OCD ODTN=1 ,CALOUT=1
592 13:08:14.172218 3. OCD ODTN=2 ,CALOUT=1
593 13:08:14.175733 3. OCD ODTN=3 ,CALOUT=1
594 13:08:14.175839 3. OCD ODTN=4 ,CALOUT=1
595 13:08:14.178572 3. OCD ODTN=5 ,CALOUT=1
596 13:08:14.182310 3. OCD ODTN=6 ,CALOUT=1
597 13:08:14.182387 3. OCD ODTN=7 ,CALOUT=1
598 13:08:14.185536 3. OCD ODTN=8 ,CALOUT=1
599 13:08:14.188797 3. OCD ODTN=9 ,CALOUT=1
600 13:08:14.188877 3. OCD ODTN=10 ,CALOUT=1
601 13:08:14.191977 3. OCD ODTN=11 ,CALOUT=1
602 13:08:14.195365 3. OCD ODTN=12 ,CALOUT=1
603 13:08:14.195452 3. OCD ODTN=13 ,CALOUT=1
604 13:08:14.199156 3. OCD ODTN=14 ,CALOUT=1
605 13:08:14.202410 3. OCD ODTN=15 ,CALOUT=0
606 13:08:14.202486
607 13:08:14.205624 3. OCD ODTN calibration OK! ODTN=15
608 13:08:14.205713
609 13:08:14.209096 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
610 13:08:14.212354 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
611 13:08:14.215488 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
612 13:08:14.215563
613 13:08:14.218771 [DramcInit]
614 13:08:14.222379 AutoRefreshCKEOff AutoREF OFF
615 13:08:14.222451 DDRPhyPLLSetting-CKEOFF
616 13:08:14.225587 DDRPhyPLLSetting-CKEON
617 13:08:14.225659
618 13:08:14.225729 Enable WDQS
619 13:08:14.225788 ==
620 13:08:14.232274 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
621 13:08:14.235903 fsp= 1, odt_onoff= 1, Byte mode= 0
622 13:08:14.235986 ==
623 13:08:14.239078 [Duty_Offset_Calibration]
624 13:08:14.239168
625 13:08:14.239232 ===========================
626 13:08:14.242568 B0:1 B1:1 CA:1
627 13:08:14.261672 ==
628 13:08:14.264634 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
629 13:08:14.267950 fsp= 1, odt_onoff= 1, Byte mode= 0
630 13:08:14.268028 ==
631 13:08:14.271703 [Duty_Offset_Calibration]
632 13:08:14.271784
633 13:08:14.275093 ===========================
634 13:08:14.275179 B0:1 B1:0 CA:2
635 13:08:14.308114 [ModeRegInit_LP4] CH0 RK0
636 13:08:14.311559 Write Rank0 MR13 =0x18
637 13:08:14.311640 Write Rank0 MR12 =0x5d
638 13:08:14.314930 Write Rank0 MR1 =0x56
639 13:08:14.317917 Write Rank0 MR2 =0x1a
640 13:08:14.318013 Write Rank0 MR11 =0x0
641 13:08:14.321206 Write Rank0 MR22 =0x38
642 13:08:14.321278 Write Rank0 MR14 =0x5d
643 13:08:14.324330 Write Rank0 MR3 =0x30
644 13:08:14.327785 Write Rank0 MR13 =0x58
645 13:08:14.327861 Write Rank0 MR12 =0x5d
646 13:08:14.331419 Write Rank0 MR1 =0x56
647 13:08:14.334584 Write Rank0 MR2 =0x2d
648 13:08:14.334659 Write Rank0 MR11 =0x23
649 13:08:14.337987 Write Rank0 MR22 =0x34
650 13:08:14.338059 Write Rank0 MR14 =0x10
651 13:08:14.341277 Write Rank0 MR3 =0x30
652 13:08:14.344349 Write Rank0 MR13 =0xd8
653 13:08:14.344428 [ModeRegInit_LP4] CH0 RK1
654 13:08:14.347840 Write Rank1 MR13 =0x18
655 13:08:14.347916 Write Rank1 MR12 =0x5d
656 13:08:14.351156 Write Rank1 MR1 =0x56
657 13:08:14.354618 Write Rank1 MR2 =0x1a
658 13:08:14.354698 Write Rank1 MR11 =0x0
659 13:08:14.357971 Write Rank1 MR22 =0x38
660 13:08:14.361303 Write Rank1 MR14 =0x5d
661 13:08:14.361382 Write Rank1 MR3 =0x30
662 13:08:14.364744 Write Rank1 MR13 =0x58
663 13:08:14.364830 Write Rank1 MR12 =0x5d
664 13:08:14.367962 Write Rank1 MR1 =0x56
665 13:08:14.371282 Write Rank1 MR2 =0x2d
666 13:08:14.371365 Write Rank1 MR11 =0x23
667 13:08:14.374698 Write Rank1 MR22 =0x34
668 13:08:14.374785 Write Rank1 MR14 =0x10
669 13:08:14.377758 Write Rank1 MR3 =0x30
670 13:08:14.381498 Write Rank1 MR13 =0xd8
671 13:08:14.381575 [ModeRegInit_LP4] CH1 RK0
672 13:08:14.384550 Write Rank0 MR13 =0x18
673 13:08:14.387854 Write Rank0 MR12 =0x5d
674 13:08:14.387933 Write Rank0 MR1 =0x56
675 13:08:14.391513 Write Rank0 MR2 =0x1a
676 13:08:14.391624 Write Rank0 MR11 =0x0
677 13:08:14.394874 Write Rank0 MR22 =0x38
678 13:08:14.397856 Write Rank0 MR14 =0x5d
679 13:08:14.397937 Write Rank0 MR3 =0x30
680 13:08:14.401349 Write Rank0 MR13 =0x58
681 13:08:14.401430 Write Rank0 MR12 =0x5d
682 13:08:14.404666 Write Rank0 MR1 =0x56
683 13:08:14.408232 Write Rank0 MR2 =0x2d
684 13:08:14.408315 Write Rank0 MR11 =0x23
685 13:08:14.411988 Write Rank0 MR22 =0x34
686 13:08:14.412064 Write Rank0 MR14 =0x10
687 13:08:14.414666 Write Rank0 MR3 =0x30
688 13:08:14.418344 Write Rank0 MR13 =0xd8
689 13:08:14.418418 [ModeRegInit_LP4] CH1 RK1
690 13:08:14.421440 Write Rank1 MR13 =0x18
691 13:08:14.424768 Write Rank1 MR12 =0x5d
692 13:08:14.424849 Write Rank1 MR1 =0x56
693 13:08:14.427972 Write Rank1 MR2 =0x1a
694 13:08:14.428044 Write Rank1 MR11 =0x0
695 13:08:14.431229 Write Rank1 MR22 =0x38
696 13:08:14.434664 Write Rank1 MR14 =0x5d
697 13:08:14.434744 Write Rank1 MR3 =0x30
698 13:08:14.437975 Write Rank1 MR13 =0x58
699 13:08:14.438058 Write Rank1 MR12 =0x5d
700 13:08:14.441301 Write Rank1 MR1 =0x56
701 13:08:14.444532 Write Rank1 MR2 =0x2d
702 13:08:14.444607 Write Rank1 MR11 =0x23
703 13:08:14.448042 Write Rank1 MR22 =0x34
704 13:08:14.448124 Write Rank1 MR14 =0x10
705 13:08:14.451195 Write Rank1 MR3 =0x30
706 13:08:14.454615 Write Rank1 MR13 =0xd8
707 13:08:14.454696 match AC timing 3
708 13:08:14.464689 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
709 13:08:14.468193 DramC Write-DBI off
710 13:08:14.468271 DramC Read-DBI off
711 13:08:14.471444 Write Rank0 MR13 =0x59
712 13:08:14.471519 ==
713 13:08:14.474849 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
714 13:08:14.478040 fsp= 1, odt_onoff= 1, Byte mode= 0
715 13:08:14.478117 ==
716 13:08:14.481496 === u2Vref_new: 0x56 --> 0x2d
717 13:08:14.485109 === u2Vref_new: 0x58 --> 0x38
718 13:08:14.488304 === u2Vref_new: 0x5a --> 0x39
719 13:08:14.492082 === u2Vref_new: 0x5c --> 0x3c
720 13:08:14.495238 === u2Vref_new: 0x5e --> 0x3d
721 13:08:14.498445 === u2Vref_new: 0x60 --> 0xa0
722 13:08:14.501696 [CA 0] Center 34 (6~63) winsize 58
723 13:08:14.505230 [CA 1] Center 36 (9~63) winsize 55
724 13:08:14.508648 [CA 2] Center 29 (0~58) winsize 59
725 13:08:14.512096 [CA 3] Center 24 (-3~52) winsize 56
726 13:08:14.512177 [CA 4] Center 25 (-3~54) winsize 58
727 13:08:14.515531 [CA 5] Center 29 (0~59) winsize 60
728 13:08:14.515614
729 13:08:14.518718 [CATrainingPosCal] consider 1 rank data
730 13:08:14.522038 u2DelayCellTimex100 = 735/100 ps
731 13:08:14.525351 CA0 delay=34 (6~63),Diff = 10 PI (13 cell)
732 13:08:14.532371 CA1 delay=36 (9~63),Diff = 12 PI (15 cell)
733 13:08:14.535432 CA2 delay=29 (0~58),Diff = 5 PI (6 cell)
734 13:08:14.538574 CA3 delay=24 (-3~52),Diff = 0 PI (0 cell)
735 13:08:14.542004 CA4 delay=25 (-3~54),Diff = 1 PI (1 cell)
736 13:08:14.545853 CA5 delay=29 (0~59),Diff = 5 PI (6 cell)
737 13:08:14.545933
738 13:08:14.548375 CA PerBit enable=1, Macro0, CA PI delay=24
739 13:08:14.552158 === u2Vref_new: 0x5e --> 0x3d
740 13:08:14.552243
741 13:08:14.555277 Vref(ca) range 1: 30
742 13:08:14.555353
743 13:08:14.555434 CS Dly= 9 (40-0-32)
744 13:08:14.558501 Write Rank0 MR13 =0xd8
745 13:08:14.562159 Write Rank0 MR13 =0xd8
746 13:08:14.562252 Write Rank0 MR12 =0x5e
747 13:08:14.565378 Write Rank1 MR13 =0x59
748 13:08:14.565452 ==
749 13:08:14.568687 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
750 13:08:14.572136 fsp= 1, odt_onoff= 1, Byte mode= 0
751 13:08:14.572213 ==
752 13:08:14.575379 === u2Vref_new: 0x56 --> 0x2d
753 13:08:14.578704 === u2Vref_new: 0x58 --> 0x38
754 13:08:14.581993 === u2Vref_new: 0x5a --> 0x39
755 13:08:14.585480 === u2Vref_new: 0x5c --> 0x3c
756 13:08:14.588671 === u2Vref_new: 0x5e --> 0x3d
757 13:08:14.592270 === u2Vref_new: 0x60 --> 0xa0
758 13:08:14.595623 [CA 0] Center 35 (8~63) winsize 56
759 13:08:14.598989 [CA 1] Center 36 (9~63) winsize 55
760 13:08:14.602155 [CA 2] Center 31 (3~60) winsize 58
761 13:08:14.605596 [CA 3] Center 26 (-2~54) winsize 57
762 13:08:14.605675 [CA 4] Center 26 (-2~55) winsize 58
763 13:08:14.608939 [CA 5] Center 32 (3~61) winsize 59
764 13:08:14.609014
765 13:08:14.615588 [CATrainingPosCal] consider 2 rank data
766 13:08:14.615673 u2DelayCellTimex100 = 735/100 ps
767 13:08:14.622146 CA0 delay=35 (8~63),Diff = 10 PI (13 cell)
768 13:08:14.625509 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
769 13:08:14.629234 CA2 delay=30 (3~58),Diff = 5 PI (6 cell)
770 13:08:14.632644 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
771 13:08:14.635917 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
772 13:08:14.639140 CA5 delay=31 (3~59),Diff = 6 PI (7 cell)
773 13:08:14.639263
774 13:08:14.642540 CA PerBit enable=1, Macro0, CA PI delay=25
775 13:08:14.646184 === u2Vref_new: 0x60 --> 0xa0
776 13:08:14.646264
777 13:08:14.648983 Vref(ca) range 1: 32
778 13:08:14.649059
779 13:08:14.649122 CS Dly= 8 (39-0-32)
780 13:08:14.652567 Write Rank1 MR13 =0xd8
781 13:08:14.655858 Write Rank1 MR13 =0xd8
782 13:08:14.655975 Write Rank1 MR12 =0x60
783 13:08:14.659210 [RankSwap] Rank num 2, (Multi 1), Rank 0
784 13:08:14.662419 Write Rank0 MR2 =0xad
785 13:08:14.662502 [Write Leveling]
786 13:08:14.665921 delay byte0 byte1 byte2 byte3
787 13:08:14.666023
788 13:08:14.669381 10 0 0
789 13:08:14.669462 11 0 0
790 13:08:14.669530 12 0 0
791 13:08:14.672787 13 0 0
792 13:08:14.672861 14 0 0
793 13:08:14.675920 15 0 0
794 13:08:14.675994 16 0 0
795 13:08:14.679036 17 0 0
796 13:08:14.679104 18 0 0
797 13:08:14.679163 19 0 0
798 13:08:14.682374 20 0 0
799 13:08:14.682448 21 0 0
800 13:08:14.685658 22 0 0
801 13:08:14.685725 23 0 0
802 13:08:14.685784 24 0 ff
803 13:08:14.688996 25 0 ff
804 13:08:14.689070 26 0 ff
805 13:08:14.692304 27 0 ff
806 13:08:14.692371 28 0 ff
807 13:08:14.695600 29 0 ff
808 13:08:14.695674 30 0 ff
809 13:08:14.699809 31 0 ff
810 13:08:14.699879 32 ff ff
811 13:08:14.699939 33 ff ff
812 13:08:14.702773 34 ff ff
813 13:08:14.702847 35 ff ff
814 13:08:14.706093 36 ff ff
815 13:08:14.706165 37 ff ff
816 13:08:14.709376 38 ff ff
817 13:08:14.712423 pass bytecount = 0xff (0xff: all bytes pass)
818 13:08:14.712529
819 13:08:14.712599 DQS0 dly: 32
820 13:08:14.715763 DQS1 dly: 24
821 13:08:14.715834 Write Rank0 MR2 =0x2d
822 13:08:14.719195 [RankSwap] Rank num 2, (Multi 1), Rank 0
823 13:08:14.722375 Write Rank0 MR1 =0xd6
824 13:08:14.722456 [Gating]
825 13:08:14.722518 ==
826 13:08:14.729070 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
827 13:08:14.732753 fsp= 1, odt_onoff= 1, Byte mode= 0
828 13:08:14.732834 ==
829 13:08:14.735902 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
830 13:08:14.739595 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
831 13:08:14.746121 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
832 13:08:14.749634 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
833 13:08:14.752869 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
834 13:08:14.759402 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
835 13:08:14.762834 3 1 24 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
836 13:08:14.766098 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
837 13:08:14.772971 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
838 13:08:14.775954 3 2 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
839 13:08:14.779414 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
840 13:08:14.786171 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
841 13:08:14.789708 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
842 13:08:14.792844 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
843 13:08:14.796124 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
844 13:08:14.802896 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
845 13:08:14.805808 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
846 13:08:14.809133 3 3 4 |3534 3e3d |(11 11)(11 11) |(0 0)(1 1)| 0
847 13:08:14.816160 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
848 13:08:14.819476 [Byte 1] Lead/lag falling Transition (3, 3, 8)
849 13:08:14.823016 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
850 13:08:14.826314 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
851 13:08:14.833047 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
852 13:08:14.836344 3 3 24 |1110 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
853 13:08:14.839441 3 3 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
854 13:08:14.846393 3 4 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
855 13:08:14.849667 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
856 13:08:14.853263 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
857 13:08:14.859601 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
858 13:08:14.863186 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 13:08:14.866357 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 13:08:14.873031 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 13:08:14.876949 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 13:08:14.879869 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 13:08:14.883059 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 13:08:14.889749 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 13:08:14.893105 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 13:08:14.896568 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 13:08:14.903319 [Byte 0] Lead/lag falling Transition (3, 5, 16)
868 13:08:14.906639 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
869 13:08:14.910162 [Byte 0] Lead/lag Transition tap number (2)
870 13:08:14.913345 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
871 13:08:14.920217 [Byte 1] Lead/lag falling Transition (3, 5, 24)
872 13:08:14.923148 3 5 28 |4646 3d3d |(0 0)(11 11) |(0 0)(1 0)| 0
873 13:08:14.926761 [Byte 0]First pass (3, 5, 28)
874 13:08:14.930015 [Byte 1] Lead/lag Transition tap number (2)
875 13:08:14.933423 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
876 13:08:14.936647 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
877 13:08:14.943665 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
878 13:08:14.943808 [Byte 1]First pass (3, 6, 8)
879 13:08:14.946670 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 13:08:14.953142 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 13:08:14.956764 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 13:08:14.959968 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 13:08:14.963169 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 13:08:14.970009 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 13:08:14.973588 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 13:08:14.976675 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 13:08:14.979738 All bytes gating window > 1UI, Early break!
888 13:08:14.979821
889 13:08:14.983478 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
890 13:08:14.983561
891 13:08:14.986964 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
892 13:08:14.987038
893 13:08:14.987098
894 13:08:14.989896
895 13:08:14.993443 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
896 13:08:14.993532
897 13:08:14.996865 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
898 13:08:14.996947
899 13:08:14.997009
900 13:08:14.999977 Write Rank0 MR1 =0x56
901 13:08:15.000067
902 13:08:15.003281 best RODT dly(2T, 0.5T) = (2, 2)
903 13:08:15.003361
904 13:08:15.003426 best RODT dly(2T, 0.5T) = (2, 2)
905 13:08:15.006686 ==
906 13:08:15.010022 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
907 13:08:15.013475 fsp= 1, odt_onoff= 1, Byte mode= 0
908 13:08:15.013560 ==
909 13:08:15.016635 Start DQ dly to find pass range UseTestEngine =0
910 13:08:15.020283 x-axis: bit #, y-axis: DQ dly (-127~63)
911 13:08:15.023430 RX Vref Scan = 0
912 13:08:15.026860 -26, [0] xxxxxxxx xxxxxxxx [MSB]
913 13:08:15.030197 -25, [0] xxxxxxxx xxxxxxxx [MSB]
914 13:08:15.030295 -24, [0] xxxxxxxx xxxxxxxx [MSB]
915 13:08:15.033688 -23, [0] xxxxxxxx xxxxxxxx [MSB]
916 13:08:15.036694 -22, [0] xxxxxxxx xxxxxxxx [MSB]
917 13:08:15.040271 -21, [0] xxxxxxxx xxxxxxxx [MSB]
918 13:08:15.043576 -20, [0] xxxxxxxx xxxxxxxx [MSB]
919 13:08:15.046924 -19, [0] xxxxxxxx xxxxxxxx [MSB]
920 13:08:15.050229 -18, [0] xxxxxxxx xxxxxxxx [MSB]
921 13:08:15.053571 -17, [0] xxxxxxxx xxxxxxxx [MSB]
922 13:08:15.053648 -16, [0] xxxxxxxx xxxxxxxx [MSB]
923 13:08:15.057286 -15, [0] xxxxxxxx xxxxxxxx [MSB]
924 13:08:15.059980 -14, [0] xxxxxxxx xxxxxxxx [MSB]
925 13:08:15.063966 -13, [0] xxxxxxxx xxxxxxxx [MSB]
926 13:08:15.067359 -12, [0] xxxxxxxx xxxxxxxx [MSB]
927 13:08:15.070240 -11, [0] xxxxxxxx xxxxxxxx [MSB]
928 13:08:15.073622 -10, [0] xxxxxxxx xxxxxxxx [MSB]
929 13:08:15.077329 -9, [0] xxxxxxxx xxxxxxxx [MSB]
930 13:08:15.077402 -8, [0] xxxxxxxx xxxxxxxx [MSB]
931 13:08:15.080479 -7, [0] xxxxxxxx xxxxxxxx [MSB]
932 13:08:15.083682 -6, [0] xxxxxxxx xxxxxxxx [MSB]
933 13:08:15.087251 -5, [0] xxxxxxxx xxxxxxxx [MSB]
934 13:08:15.090428 -4, [0] xxxxxxxx xxxxxxxx [MSB]
935 13:08:15.093866 -3, [0] xxxxxxxx oxxxxxxx [MSB]
936 13:08:15.093959 -2, [0] xxxoxxxx oxxxxxxx [MSB]
937 13:08:15.097138 -1, [0] xxxoxoxx ooxoxxxx [MSB]
938 13:08:15.100417 0, [0] xxxoxoxx ooxoxoxx [MSB]
939 13:08:15.103838 1, [0] xxxoxoox ooxoooxx [MSB]
940 13:08:15.107082 2, [0] xxxoxoox ooxoooxx [MSB]
941 13:08:15.110795 3, [0] xoxoxooo ooxoooox [MSB]
942 13:08:15.110877 4, [0] xoxoxooo ooxoooox [MSB]
943 13:08:15.113746 5, [0] xooooooo ooxooooo [MSB]
944 13:08:15.117255 6, [0] oooooooo ooxooooo [MSB]
945 13:08:15.120597 7, [0] oooooooo ooxooooo [MSB]
946 13:08:15.124106 33, [0] oooxoooo xooooooo [MSB]
947 13:08:15.127455 34, [0] oooxoooo xooooooo [MSB]
948 13:08:15.130601 35, [0] oooxoooo xooooooo [MSB]
949 13:08:15.130687 36, [0] oooxoxoo xooxoooo [MSB]
950 13:08:15.133938 37, [0] oooxoxxx xxoxoooo [MSB]
951 13:08:15.137261 38, [0] oooxoxxx xxoxxoxo [MSB]
952 13:08:15.140619 39, [0] oooxoxxx xxoxxxxo [MSB]
953 13:08:15.144194 40, [0] xooxxxxx xxoxxxxo [MSB]
954 13:08:15.147686 41, [0] xxxxxxxx xxoxxxxo [MSB]
955 13:08:15.147762 42, [0] xxxxxxxx xxoxxxxx [MSB]
956 13:08:15.151048 43, [0] xxxxxxxx xxoxxxxx [MSB]
957 13:08:15.154246 44, [0] xxxxxxxx xxxxxxxx [MSB]
958 13:08:15.157621 iDelay=44, Bit 0, Center 22 (6 ~ 39) 34
959 13:08:15.160817 iDelay=44, Bit 1, Center 21 (3 ~ 40) 38
960 13:08:15.164282 iDelay=44, Bit 2, Center 22 (5 ~ 40) 36
961 13:08:15.167723 iDelay=44, Bit 3, Center 15 (-2 ~ 32) 35
962 13:08:15.170786 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
963 13:08:15.177521 iDelay=44, Bit 5, Center 17 (-1 ~ 35) 37
964 13:08:15.180656 iDelay=44, Bit 6, Center 18 (1 ~ 36) 36
965 13:08:15.184321 iDelay=44, Bit 7, Center 19 (3 ~ 36) 34
966 13:08:15.187452 iDelay=44, Bit 8, Center 14 (-3 ~ 32) 36
967 13:08:15.190541 iDelay=44, Bit 9, Center 17 (-1 ~ 36) 38
968 13:08:15.194026 iDelay=44, Bit 10, Center 25 (8 ~ 43) 36
969 13:08:15.197672 iDelay=44, Bit 11, Center 17 (-1 ~ 35) 37
970 13:08:15.200734 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
971 13:08:15.204116 iDelay=44, Bit 13, Center 19 (0 ~ 38) 39
972 13:08:15.207313 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
973 13:08:15.211006 iDelay=44, Bit 15, Center 23 (5 ~ 41) 37
974 13:08:15.211076 ==
975 13:08:15.217629 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
976 13:08:15.221090 fsp= 1, odt_onoff= 1, Byte mode= 0
977 13:08:15.221176 ==
978 13:08:15.221245 DQS Delay:
979 13:08:15.224105 DQS0 = 0, DQS1 = 0
980 13:08:15.224178 DQM Delay:
981 13:08:15.227436 DQM0 = 19, DQM1 = 19
982 13:08:15.227513 DQ Delay:
983 13:08:15.230686 DQ0 =22, DQ1 =21, DQ2 =22, DQ3 =15
984 13:08:15.234055 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =19
985 13:08:15.237610 DQ8 =14, DQ9 =17, DQ10 =25, DQ11 =17
986 13:08:15.240992 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =23
987 13:08:15.241067
988 13:08:15.241137
989 13:08:15.244311 DramC Write-DBI off
990 13:08:15.244407 ==
991 13:08:15.247547 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
992 13:08:15.250766 fsp= 1, odt_onoff= 1, Byte mode= 0
993 13:08:15.250837 ==
994 13:08:15.254343 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
995 13:08:15.254415
996 13:08:15.257384 Begin, DQ Scan Range 920~1176
997 13:08:15.257486
998 13:08:15.257581
999 13:08:15.260655 TX Vref Scan disable
1000 13:08:15.264084 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1001 13:08:15.267968 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1002 13:08:15.271468 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1003 13:08:15.274170 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1004 13:08:15.277391 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1005 13:08:15.280968 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1006 13:08:15.284269 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1007 13:08:15.287341 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1008 13:08:15.291270 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1009 13:08:15.297581 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1010 13:08:15.301057 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1011 13:08:15.304289 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1012 13:08:15.307583 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1013 13:08:15.310777 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1014 13:08:15.314448 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1015 13:08:15.317752 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1016 13:08:15.321129 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1017 13:08:15.324214 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1018 13:08:15.327495 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1019 13:08:15.330953 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1020 13:08:15.334190 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1021 13:08:15.337478 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1022 13:08:15.340759 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1023 13:08:15.344239 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1024 13:08:15.347740 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1025 13:08:15.350814 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1026 13:08:15.354106 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1027 13:08:15.360806 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1028 13:08:15.364345 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1029 13:08:15.368033 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1030 13:08:15.370820 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1031 13:08:15.374204 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1032 13:08:15.378033 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1033 13:08:15.381022 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1034 13:08:15.384747 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1035 13:08:15.387701 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1036 13:08:15.391666 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1037 13:08:15.395059 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1038 13:08:15.397726 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1039 13:08:15.401204 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1040 13:08:15.404690 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1041 13:08:15.408108 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1042 13:08:15.411365 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1043 13:08:15.414723 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1044 13:08:15.417713 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1045 13:08:15.421241 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1046 13:08:15.424812 966 |3 6 6|[0] xxxxxxxx oxxoxxxx [MSB]
1047 13:08:15.428102 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1048 13:08:15.431439 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1049 13:08:15.434667 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1050 13:08:15.441522 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1051 13:08:15.444570 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1052 13:08:15.448027 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1053 13:08:15.451381 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1054 13:08:15.454652 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1055 13:08:15.458023 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1056 13:08:15.461307 976 |3 6 16|[0] xoxooooo oooooooo [MSB]
1057 13:08:15.464574 985 |3 6 25|[0] oooooooo xooooooo [MSB]
1058 13:08:15.468290 986 |3 6 26|[0] oooooooo xooooooo [MSB]
1059 13:08:15.471155 987 |3 6 27|[0] oooooooo xooxoooo [MSB]
1060 13:08:15.474945 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1061 13:08:15.481726 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1062 13:08:15.485093 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1063 13:08:15.488324 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1064 13:08:15.491957 992 |3 6 32|[0] oooxoooo xxxxxxxx [MSB]
1065 13:08:15.494936 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1066 13:08:15.498455 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1067 13:08:15.501967 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1068 13:08:15.505331 996 |3 6 36|[0] oooxxxxx xxxxxxxx [MSB]
1069 13:08:15.508646 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1070 13:08:15.512322 Byte0, DQ PI dly=984, DQM PI dly= 984
1071 13:08:15.515353 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1072 13:08:15.515441
1073 13:08:15.521927 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1074 13:08:15.522032
1075 13:08:15.525385 Byte1, DQ PI dly=977, DQM PI dly= 977
1076 13:08:15.528634 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1077 13:08:15.528709
1078 13:08:15.531803 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1079 13:08:15.531888
1080 13:08:15.531952 ==
1081 13:08:15.538503 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1082 13:08:15.542061 fsp= 1, odt_onoff= 1, Byte mode= 0
1083 13:08:15.542150 ==
1084 13:08:15.545863 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1085 13:08:15.545948
1086 13:08:15.548692 Begin, DQ Scan Range 953~1017
1087 13:08:15.551827 Write Rank0 MR14 =0x0
1088 13:08:15.558446
1089 13:08:15.558528 CH=0, VrefRange= 0, VrefLevel = 0
1090 13:08:15.565065 TX Bit0 (978~992) 15 985, Bit8 (968~977) 10 972,
1091 13:08:15.568535 TX Bit1 (977~992) 16 984, Bit9 (968~983) 16 975,
1092 13:08:15.575199 TX Bit2 (978~992) 15 985, Bit10 (975~987) 13 981,
1093 13:08:15.578549 TX Bit3 (975~985) 11 980, Bit11 (968~982) 15 975,
1094 13:08:15.581800 TX Bit4 (977~991) 15 984, Bit12 (970~983) 14 976,
1095 13:08:15.588500 TX Bit5 (976~989) 14 982, Bit13 (970~983) 14 976,
1096 13:08:15.591975 TX Bit6 (977~990) 14 983, Bit14 (969~984) 16 976,
1097 13:08:15.595154 TX Bit7 (978~991) 14 984, Bit15 (974~985) 12 979,
1098 13:08:15.595246
1099 13:08:15.598829 Write Rank0 MR14 =0x2
1100 13:08:15.606679
1101 13:08:15.606760 CH=0, VrefRange= 0, VrefLevel = 2
1102 13:08:15.613648 TX Bit0 (978~993) 16 985, Bit8 (967~979) 13 973,
1103 13:08:15.617037 TX Bit1 (977~992) 16 984, Bit9 (969~984) 16 976,
1104 13:08:15.623700 TX Bit2 (978~993) 16 985, Bit10 (975~988) 14 981,
1105 13:08:15.626761 TX Bit3 (974~986) 13 980, Bit11 (968~982) 15 975,
1106 13:08:15.630274 TX Bit4 (977~991) 15 984, Bit12 (970~984) 15 977,
1107 13:08:15.636985 TX Bit5 (976~990) 15 983, Bit13 (969~984) 16 976,
1108 13:08:15.640300 TX Bit6 (977~991) 15 984, Bit14 (969~985) 17 977,
1109 13:08:15.643600 TX Bit7 (977~992) 16 984, Bit15 (974~986) 13 980,
1110 13:08:15.643696
1111 13:08:15.646783 Write Rank0 MR14 =0x4
1112 13:08:15.654909
1113 13:08:15.655015 CH=0, VrefRange= 0, VrefLevel = 4
1114 13:08:15.661876 TX Bit0 (979~993) 15 986, Bit8 (967~980) 14 973,
1115 13:08:15.665226 TX Bit1 (977~993) 17 985, Bit9 (968~984) 17 976,
1116 13:08:15.671838 TX Bit2 (978~993) 16 985, Bit10 (974~989) 16 981,
1117 13:08:15.675109 TX Bit3 (973~987) 15 980, Bit11 (968~983) 16 975,
1118 13:08:15.678363 TX Bit4 (977~992) 16 984, Bit12 (970~984) 15 977,
1119 13:08:15.684801 TX Bit5 (976~991) 16 983, Bit13 (969~984) 16 976,
1120 13:08:15.688529 TX Bit6 (976~991) 16 983, Bit14 (969~985) 17 977,
1121 13:08:15.691900 TX Bit7 (977~992) 16 984, Bit15 (974~988) 15 981,
1122 13:08:15.691978
1123 13:08:15.695226 Write Rank0 MR14 =0x6
1124 13:08:15.703635
1125 13:08:15.703726 CH=0, VrefRange= 0, VrefLevel = 6
1126 13:08:15.710139 TX Bit0 (978~994) 17 986, Bit8 (967~981) 15 974,
1127 13:08:15.713469 TX Bit1 (977~993) 17 985, Bit9 (969~984) 16 976,
1128 13:08:15.720158 TX Bit2 (977~994) 18 985, Bit10 (974~990) 17 982,
1129 13:08:15.723481 TX Bit3 (973~988) 16 980, Bit11 (968~983) 16 975,
1130 13:08:15.726822 TX Bit4 (977~992) 16 984, Bit12 (969~984) 16 976,
1131 13:08:15.733492 TX Bit5 (975~992) 18 983, Bit13 (969~985) 17 977,
1132 13:08:15.736754 TX Bit6 (976~992) 17 984, Bit14 (969~986) 18 977,
1133 13:08:15.740145 TX Bit7 (977~992) 16 984, Bit15 (973~989) 17 981,
1134 13:08:15.740219
1135 13:08:15.743718 Write Rank0 MR14 =0x8
1136 13:08:15.751663
1137 13:08:15.751749 CH=0, VrefRange= 0, VrefLevel = 8
1138 13:08:15.758417 TX Bit0 (978~995) 18 986, Bit8 (966~982) 17 974,
1139 13:08:15.761743 TX Bit1 (976~994) 19 985, Bit9 (968~985) 18 976,
1140 13:08:15.815844 TX Bit2 (977~994) 18 985, Bit10 (974~990) 17 982,
1141 13:08:15.815968 TX Bit3 (973~989) 17 981, Bit11 (968~984) 17 976,
1142 13:08:15.816227 TX Bit4 (977~993) 17 985, Bit12 (969~985) 17 977,
1143 13:08:15.816317 TX Bit5 (975~992) 18 983, Bit13 (969~985) 17 977,
1144 13:08:15.816420 TX Bit6 (976~992) 17 984, Bit14 (968~986) 19 977,
1145 13:08:15.816526 TX Bit7 (977~993) 17 985, Bit15 (973~990) 18 981,
1146 13:08:15.816589
1147 13:08:15.816669 Write Rank0 MR14 =0xa
1148 13:08:15.816729
1149 13:08:15.816785 CH=0, VrefRange= 0, VrefLevel = 10
1150 13:08:15.816855 TX Bit0 (977~995) 19 986, Bit8 (966~982) 17 974,
1151 13:08:15.816927 TX Bit1 (976~994) 19 985, Bit9 (968~986) 19 977,
1152 13:08:15.817627 TX Bit2 (977~995) 19 986, Bit10 (973~990) 18 981,
1153 13:08:15.843143 TX Bit3 (972~989) 18 980, Bit11 (967~984) 18 975,
1154 13:08:15.843445 TX Bit4 (976~993) 18 984, Bit12 (969~986) 18 977,
1155 13:08:15.843552 TX Bit5 (975~992) 18 983, Bit13 (969~986) 18 977,
1156 13:08:15.843621 TX Bit6 (976~993) 18 984, Bit14 (968~987) 20 977,
1157 13:08:15.843695 TX Bit7 (977~993) 17 985, Bit15 (972~990) 19 981,
1158 13:08:15.843788
1159 13:08:15.848192 Write Rank0 MR14 =0xc
1160 13:08:15.848266
1161 13:08:15.851344 CH=0, VrefRange= 0, VrefLevel = 12
1162 13:08:15.854796 TX Bit0 (977~996) 20 986, Bit8 (966~983) 18 974,
1163 13:08:15.861787 TX Bit1 (976~995) 20 985, Bit9 (968~986) 19 977,
1164 13:08:15.864763 TX Bit2 (977~996) 20 986, Bit10 (972~991) 20 981,
1165 13:08:15.868280 TX Bit3 (972~991) 20 981, Bit11 (967~984) 18 975,
1166 13:08:15.874974 TX Bit4 (976~994) 19 985, Bit12 (969~986) 18 977,
1167 13:08:15.878102 TX Bit5 (974~992) 19 983, Bit13 (968~986) 19 977,
1168 13:08:15.881351 TX Bit6 (976~993) 18 984, Bit14 (968~988) 21 978,
1169 13:08:15.888537 TX Bit7 (977~994) 18 985, Bit15 (972~990) 19 981,
1170 13:08:15.888615
1171 13:08:15.888686 Write Rank0 MR14 =0xe
1172 13:08:15.897991
1173 13:08:15.901707 CH=0, VrefRange= 0, VrefLevel = 14
1174 13:08:15.905204 TX Bit0 (977~997) 21 987, Bit8 (965~984) 20 974,
1175 13:08:15.908354 TX Bit1 (976~995) 20 985, Bit9 (968~986) 19 977,
1176 13:08:15.914692 TX Bit2 (976~996) 21 986, Bit10 (972~991) 20 981,
1177 13:08:15.918195 TX Bit3 (971~991) 21 981, Bit11 (967~985) 19 976,
1178 13:08:15.921535 TX Bit4 (976~994) 19 985, Bit12 (969~987) 19 978,
1179 13:08:15.928588 TX Bit5 (974~993) 20 983, Bit13 (968~987) 20 977,
1180 13:08:15.931595 TX Bit6 (975~993) 19 984, Bit14 (968~989) 22 978,
1181 13:08:15.935217 TX Bit7 (976~994) 19 985, Bit15 (971~990) 20 980,
1182 13:08:15.935320
1183 13:08:15.938307 Write Rank0 MR14 =0x10
1184 13:08:15.947605
1185 13:08:15.947691 CH=0, VrefRange= 0, VrefLevel = 16
1186 13:08:15.954340 TX Bit0 (976~998) 23 987, Bit8 (965~984) 20 974,
1187 13:08:15.957552 TX Bit1 (976~996) 21 986, Bit9 (967~987) 21 977,
1188 13:08:15.964386 TX Bit2 (976~997) 22 986, Bit10 (971~991) 21 981,
1189 13:08:15.967627 TX Bit3 (971~991) 21 981, Bit11 (967~985) 19 976,
1190 13:08:15.970894 TX Bit4 (976~995) 20 985, Bit12 (968~988) 21 978,
1191 13:08:15.977838 TX Bit5 (974~993) 20 983, Bit13 (968~988) 21 978,
1192 13:08:15.980939 TX Bit6 (975~994) 20 984, Bit14 (968~990) 23 979,
1193 13:08:15.984295 TX Bit7 (976~995) 20 985, Bit15 (971~991) 21 981,
1194 13:08:15.984398
1195 13:08:15.987732 Write Rank0 MR14 =0x12
1196 13:08:15.997088
1197 13:08:16.000136 CH=0, VrefRange= 0, VrefLevel = 18
1198 13:08:16.003338 TX Bit0 (977~998) 22 987, Bit8 (965~984) 20 974,
1199 13:08:16.006630 TX Bit1 (976~997) 22 986, Bit9 (967~987) 21 977,
1200 13:08:16.013221 TX Bit2 (976~998) 23 987, Bit10 (971~992) 22 981,
1201 13:08:16.016580 TX Bit3 (970~992) 23 981, Bit11 (966~986) 21 976,
1202 13:08:16.019868 TX Bit4 (976~995) 20 985, Bit12 (968~988) 21 978,
1203 13:08:16.026765 TX Bit5 (973~994) 22 983, Bit13 (968~988) 21 978,
1204 13:08:16.029983 TX Bit6 (975~994) 20 984, Bit14 (967~990) 24 978,
1205 13:08:16.033337 TX Bit7 (976~995) 20 985, Bit15 (971~991) 21 981,
1206 13:08:16.033441
1207 13:08:16.036647 Write Rank0 MR14 =0x14
1208 13:08:16.045668
1209 13:08:16.049679 CH=0, VrefRange= 0, VrefLevel = 20
1210 13:08:16.052410 TX Bit0 (976~999) 24 987, Bit8 (965~985) 21 975,
1211 13:08:16.055900 TX Bit1 (976~998) 23 987, Bit9 (967~989) 23 978,
1212 13:08:16.062546 TX Bit2 (976~999) 24 987, Bit10 (970~992) 23 981,
1213 13:08:16.065867 TX Bit3 (970~992) 23 981, Bit11 (966~987) 22 976,
1214 13:08:16.069587 TX Bit4 (975~996) 22 985, Bit12 (968~989) 22 978,
1215 13:08:16.076154 TX Bit5 (973~994) 22 983, Bit13 (968~989) 22 978,
1216 13:08:16.079536 TX Bit6 (974~995) 22 984, Bit14 (967~990) 24 978,
1217 13:08:16.082950 TX Bit7 (976~996) 21 986, Bit15 (970~992) 23 981,
1218 13:08:16.083030
1219 13:08:16.086026 Write Rank0 MR14 =0x16
1220 13:08:16.095391
1221 13:08:16.098713 CH=0, VrefRange= 0, VrefLevel = 22
1222 13:08:16.101831 TX Bit0 (977~999) 23 988, Bit8 (964~985) 22 974,
1223 13:08:16.105211 TX Bit1 (975~998) 24 986, Bit9 (967~989) 23 978,
1224 13:08:16.111882 TX Bit2 (976~999) 24 987, Bit10 (970~993) 24 981,
1225 13:08:16.115304 TX Bit3 (969~992) 24 980, Bit11 (966~987) 22 976,
1226 13:08:16.118965 TX Bit4 (975~997) 23 986, Bit12 (968~990) 23 979,
1227 13:08:16.125364 TX Bit5 (972~994) 23 983, Bit13 (967~990) 24 978,
1228 13:08:16.128634 TX Bit6 (974~995) 22 984, Bit14 (967~990) 24 978,
1229 13:08:16.131879 TX Bit7 (976~997) 22 986, Bit15 (970~992) 23 981,
1230 13:08:16.131957
1231 13:08:16.135717 Write Rank0 MR14 =0x18
1232 13:08:16.144600
1233 13:08:16.148118 CH=0, VrefRange= 0, VrefLevel = 24
1234 13:08:16.151327 TX Bit0 (976~999) 24 987, Bit8 (964~986) 23 975,
1235 13:08:16.154559 TX Bit1 (975~999) 25 987, Bit9 (966~990) 25 978,
1236 13:08:16.161386 TX Bit2 (975~999) 25 987, Bit10 (969~993) 25 981,
1237 13:08:16.164576 TX Bit3 (969~993) 25 981, Bit11 (966~988) 23 977,
1238 13:08:16.168019 TX Bit4 (975~998) 24 986, Bit12 (967~990) 24 978,
1239 13:08:16.174638 TX Bit5 (972~995) 24 983, Bit13 (967~990) 24 978,
1240 13:08:16.178069 TX Bit6 (974~996) 23 985, Bit14 (967~991) 25 979,
1241 13:08:16.181402 TX Bit7 (976~997) 22 986, Bit15 (970~992) 23 981,
1242 13:08:16.181480
1243 13:08:16.184598 Write Rank0 MR14 =0x1a
1244 13:08:16.194000
1245 13:08:16.197356 CH=0, VrefRange= 0, VrefLevel = 26
1246 13:08:16.200693 TX Bit0 (976~999) 24 987, Bit8 (963~987) 25 975,
1247 13:08:16.203970 TX Bit1 (976~999) 24 987, Bit9 (966~990) 25 978,
1248 13:08:16.210740 TX Bit2 (975~999) 25 987, Bit10 (970~993) 24 981,
1249 13:08:16.213965 TX Bit3 (969~993) 25 981, Bit11 (965~988) 24 976,
1250 13:08:16.217355 TX Bit4 (975~998) 24 986, Bit12 (967~990) 24 978,
1251 13:08:16.224043 TX Bit5 (972~995) 24 983, Bit13 (967~990) 24 978,
1252 13:08:16.227456 TX Bit6 (973~996) 24 984, Bit14 (967~991) 25 979,
1253 13:08:16.230489 TX Bit7 (976~998) 23 987, Bit15 (970~992) 23 981,
1254 13:08:16.230571
1255 13:08:16.233713 Write Rank0 MR14 =0x1c
1256 13:08:16.243553
1257 13:08:16.243639 CH=0, VrefRange= 0, VrefLevel = 28
1258 13:08:16.250331 TX Bit0 (976~1000) 25 988, Bit8 (963~987) 25 975,
1259 13:08:16.253488 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1260 13:08:16.260203 TX Bit2 (976~999) 24 987, Bit10 (969~994) 26 981,
1261 13:08:16.263914 TX Bit3 (969~993) 25 981, Bit11 (965~989) 25 977,
1262 13:08:16.267259 TX Bit4 (975~999) 25 987, Bit12 (967~990) 24 978,
1263 13:08:16.273536 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1264 13:08:16.277381 TX Bit6 (973~998) 26 985, Bit14 (967~990) 24 978,
1265 13:08:16.280671 TX Bit7 (975~999) 25 987, Bit15 (969~993) 25 981,
1266 13:08:16.280773
1267 13:08:16.283966 Write Rank0 MR14 =0x1e
1268 13:08:16.293044
1269 13:08:16.296840 CH=0, VrefRange= 0, VrefLevel = 30
1270 13:08:16.300024 TX Bit0 (976~1000) 25 988, Bit8 (963~987) 25 975,
1271 13:08:16.303401 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1272 13:08:16.310094 TX Bit2 (976~999) 24 987, Bit10 (969~994) 26 981,
1273 13:08:16.312819 TX Bit3 (969~993) 25 981, Bit11 (965~989) 25 977,
1274 13:08:16.316303 TX Bit4 (975~999) 25 987, Bit12 (967~990) 24 978,
1275 13:08:16.323029 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1276 13:08:16.326375 TX Bit6 (973~998) 26 985, Bit14 (967~990) 24 978,
1277 13:08:16.329752 TX Bit7 (975~999) 25 987, Bit15 (969~993) 25 981,
1278 13:08:16.333091
1279 13:08:16.333175 Write Rank0 MR14 =0x20
1280 13:08:16.343032
1281 13:08:16.346248 CH=0, VrefRange= 0, VrefLevel = 32
1282 13:08:16.349396 TX Bit0 (976~1000) 25 988, Bit8 (963~987) 25 975,
1283 13:08:16.352539 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1284 13:08:16.359429 TX Bit2 (976~999) 24 987, Bit10 (969~994) 26 981,
1285 13:08:16.362714 TX Bit3 (969~993) 25 981, Bit11 (965~989) 25 977,
1286 13:08:16.366108 TX Bit4 (975~999) 25 987, Bit12 (967~990) 24 978,
1287 13:08:16.372731 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1288 13:08:16.376372 TX Bit6 (973~998) 26 985, Bit14 (967~990) 24 978,
1289 13:08:16.379511 TX Bit7 (975~999) 25 987, Bit15 (969~993) 25 981,
1290 13:08:16.379631
1291 13:08:16.382703 Write Rank0 MR14 =0x22
1292 13:08:16.392181
1293 13:08:16.395505 CH=0, VrefRange= 0, VrefLevel = 34
1294 13:08:16.398877 TX Bit0 (976~1000) 25 988, Bit8 (963~987) 25 975,
1295 13:08:16.402159 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1296 13:08:16.408839 TX Bit2 (976~999) 24 987, Bit10 (969~994) 26 981,
1297 13:08:16.412303 TX Bit3 (969~993) 25 981, Bit11 (965~989) 25 977,
1298 13:08:16.415484 TX Bit4 (975~999) 25 987, Bit12 (967~990) 24 978,
1299 13:08:16.422136 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1300 13:08:16.425418 TX Bit6 (973~998) 26 985, Bit14 (967~990) 24 978,
1301 13:08:16.428883 TX Bit7 (975~999) 25 987, Bit15 (969~993) 25 981,
1302 13:08:16.428967
1303 13:08:16.432146 Write Rank0 MR14 =0x24
1304 13:08:16.441526
1305 13:08:16.445186 CH=0, VrefRange= 0, VrefLevel = 36
1306 13:08:16.448179 TX Bit0 (976~1000) 25 988, Bit8 (963~987) 25 975,
1307 13:08:16.452124 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1308 13:08:16.458217 TX Bit2 (976~999) 24 987, Bit10 (969~994) 26 981,
1309 13:08:16.462195 TX Bit3 (969~993) 25 981, Bit11 (965~989) 25 977,
1310 13:08:16.465296 TX Bit4 (975~999) 25 987, Bit12 (967~990) 24 978,
1311 13:08:16.472184 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1312 13:08:16.475385 TX Bit6 (973~998) 26 985, Bit14 (967~990) 24 978,
1313 13:08:16.478568 TX Bit7 (975~999) 25 987, Bit15 (969~993) 25 981,
1314 13:08:16.478653
1315 13:08:16.478717
1316 13:08:16.481930 TX Vref found, early break! 370< 378
1317 13:08:16.488553 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1318 13:08:16.492029 u1DelayCellOfst[0]=9 cells (7 PI)
1319 13:08:16.495433 u1DelayCellOfst[1]=7 cells (6 PI)
1320 13:08:16.498852 u1DelayCellOfst[2]=7 cells (6 PI)
1321 13:08:16.498936 u1DelayCellOfst[3]=0 cells (0 PI)
1322 13:08:16.502097 u1DelayCellOfst[4]=7 cells (6 PI)
1323 13:08:16.505370 u1DelayCellOfst[5]=2 cells (2 PI)
1324 13:08:16.508696 u1DelayCellOfst[6]=5 cells (4 PI)
1325 13:08:16.512087 u1DelayCellOfst[7]=7 cells (6 PI)
1326 13:08:16.515279 Byte0, DQ PI dly=981, DQM PI dly= 984
1327 13:08:16.518576 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1328 13:08:16.518673
1329 13:08:16.525226 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1330 13:08:16.525330
1331 13:08:16.528694 u1DelayCellOfst[8]=0 cells (0 PI)
1332 13:08:16.532335 u1DelayCellOfst[9]=3 cells (3 PI)
1333 13:08:16.532435 u1DelayCellOfst[10]=7 cells (6 PI)
1334 13:08:16.535514 u1DelayCellOfst[11]=2 cells (2 PI)
1335 13:08:16.538973 u1DelayCellOfst[12]=3 cells (3 PI)
1336 13:08:16.542554 u1DelayCellOfst[13]=3 cells (3 PI)
1337 13:08:16.545950 u1DelayCellOfst[14]=3 cells (3 PI)
1338 13:08:16.549126 u1DelayCellOfst[15]=7 cells (6 PI)
1339 13:08:16.552359 Byte1, DQ PI dly=975, DQM PI dly= 978
1340 13:08:16.555613 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1341 13:08:16.555699
1342 13:08:16.562127 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1343 13:08:16.562234
1344 13:08:16.562334 Write Rank0 MR14 =0x1c
1345 13:08:16.562431
1346 13:08:16.565439 Final TX Range 0 Vref 28
1347 13:08:16.565514
1348 13:08:16.572418 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1349 13:08:16.572532
1350 13:08:16.579194 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1351 13:08:16.585516 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1352 13:08:16.592161 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1353 13:08:16.595462 Write Rank0 MR3 =0xb0
1354 13:08:16.595569 DramC Write-DBI on
1355 13:08:16.598714 ==
1356 13:08:16.602346 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1357 13:08:16.605782 fsp= 1, odt_onoff= 1, Byte mode= 0
1358 13:08:16.605858 ==
1359 13:08:16.609107 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1360 13:08:16.609181
1361 13:08:16.612537 Begin, DQ Scan Range 698~762
1362 13:08:16.612621
1363 13:08:16.612686
1364 13:08:16.615714 TX Vref Scan disable
1365 13:08:16.619257 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1366 13:08:16.622443 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1367 13:08:16.625640 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1368 13:08:16.629033 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1369 13:08:16.632218 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1370 13:08:16.636252 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1371 13:08:16.639437 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1372 13:08:16.642751 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1373 13:08:16.646236 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1374 13:08:16.649299 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1375 13:08:16.652671 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1376 13:08:16.655749 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1377 13:08:16.659277 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1378 13:08:16.662460 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1379 13:08:16.665902 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1380 13:08:16.669288 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1381 13:08:16.672531 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1382 13:08:16.679051 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1383 13:08:16.682932 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1384 13:08:16.686025 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1385 13:08:16.689266 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1386 13:08:16.692564 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1387 13:08:16.699202 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1388 13:08:16.702763 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1389 13:08:16.705907 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1390 13:08:16.709697 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1391 13:08:16.712849 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1392 13:08:16.715880 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1393 13:08:16.719568 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1394 13:08:16.722714 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1395 13:08:16.726000 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1396 13:08:16.729101 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
1397 13:08:16.732511 Byte0, DQ PI dly=731, DQM PI dly= 731
1398 13:08:16.735796 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
1399 13:08:16.735895
1400 13:08:16.742587 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
1401 13:08:16.742666
1402 13:08:16.746315 Byte1, DQ PI dly=721, DQM PI dly= 721
1403 13:08:16.749610 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
1404 13:08:16.749684
1405 13:08:16.752923 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
1406 13:08:16.752993
1407 13:08:16.759741 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1408 13:08:16.766317 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1409 13:08:16.776385 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1410 13:08:16.776495 Write Rank0 MR3 =0x30
1411 13:08:16.779538 DramC Write-DBI off
1412 13:08:16.779635
1413 13:08:16.779729 [DATLAT]
1414 13:08:16.782853 Freq=1600, CH0 RK0, use_rxtx_scan=0
1415 13:08:16.782948
1416 13:08:16.786117 DATLAT Default: 0xf
1417 13:08:16.786190 7, 0xFFFF, sum=0
1418 13:08:16.786251 8, 0xFFFF, sum=0
1419 13:08:16.789569 9, 0xFFFF, sum=0
1420 13:08:16.789667 10, 0xFFFF, sum=0
1421 13:08:16.793231 11, 0xFFFF, sum=0
1422 13:08:16.793309 12, 0xFFFF, sum=0
1423 13:08:16.796311 13, 0xFFFF, sum=0
1424 13:08:16.796416 14, 0x0, sum=1
1425 13:08:16.799309 15, 0x0, sum=2
1426 13:08:16.799408 16, 0x0, sum=3
1427 13:08:16.802468 17, 0x0, sum=4
1428 13:08:16.805862 pattern=2 first_step=14 total pass=5 best_step=16
1429 13:08:16.805965 ==
1430 13:08:16.812581 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1431 13:08:16.812687 fsp= 1, odt_onoff= 1, Byte mode= 0
1432 13:08:16.816087 ==
1433 13:08:16.819248 Start DQ dly to find pass range UseTestEngine =1
1434 13:08:16.822549 x-axis: bit #, y-axis: DQ dly (-127~63)
1435 13:08:16.822647 RX Vref Scan = 1
1436 13:08:16.938755
1437 13:08:16.938912 RX Vref found, early break!
1438 13:08:16.939010
1439 13:08:16.942548 Final RX Vref 12, apply to both rank0 and 1
1440 13:08:16.945457 ==
1441 13:08:16.948650 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1442 13:08:16.952478 fsp= 1, odt_onoff= 1, Byte mode= 0
1443 13:08:16.952583 ==
1444 13:08:16.952651 DQS Delay:
1445 13:08:16.955715 DQS0 = 0, DQS1 = 0
1446 13:08:16.955828 DQM Delay:
1447 13:08:16.958985 DQM0 = 19, DQM1 = 19
1448 13:08:16.959069 DQ Delay:
1449 13:08:16.962201 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15
1450 13:08:16.965886 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
1451 13:08:16.969223 DQ8 =15, DQ9 =17, DQ10 =25, DQ11 =17
1452 13:08:16.972139 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =21
1453 13:08:16.972241
1454 13:08:16.972332
1455 13:08:16.972425
1456 13:08:16.975487 [DramC_TX_OE_Calibration] TA2
1457 13:08:16.978999 Original DQ_B0 (3 6) =30, OEN = 27
1458 13:08:16.982527 Original DQ_B1 (3 6) =30, OEN = 27
1459 13:08:16.985797 23, 0x0, End_B0=23 End_B1=23
1460 13:08:16.985871 24, 0x0, End_B0=24 End_B1=24
1461 13:08:16.988894 25, 0x0, End_B0=25 End_B1=25
1462 13:08:16.992098 26, 0x0, End_B0=26 End_B1=26
1463 13:08:16.995727 27, 0x0, End_B0=27 End_B1=27
1464 13:08:16.995832 28, 0x0, End_B0=28 End_B1=28
1465 13:08:16.998810 29, 0x0, End_B0=29 End_B1=29
1466 13:08:17.002110 30, 0x0, End_B0=30 End_B1=30
1467 13:08:17.005557 31, 0xFFFF, End_B0=30 End_B1=30
1468 13:08:17.009343 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1469 13:08:17.015850 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1470 13:08:17.015952
1471 13:08:17.016045
1472 13:08:17.019137 Write Rank0 MR23 =0x3f
1473 13:08:17.019234 [DQSOSC]
1474 13:08:17.025737 [DQSOSCAuto] RK0, (LSB)MR18= 0x1515, (MSB)MR19= 0x303, tDQSOscB0 = 399 ps tDQSOscB1 = 399 ps
1475 13:08:17.032415 CH0_RK0: MR19=0x303, MR18=0x1515, DQSOSC=399, MR23=63, INC=15, DEC=23
1476 13:08:17.035894 Write Rank0 MR23 =0x3f
1477 13:08:17.036000 [DQSOSC]
1478 13:08:17.045955 [DQSOSCAuto] RK0, (LSB)MR18= 0x1313, (MSB)MR19= 0x303, tDQSOscB0 = 400 ps tDQSOscB1 = 400 ps
1479 13:08:17.046048 CH0 RK0: MR19=303, MR18=1313
1480 13:08:17.049832 [RankSwap] Rank num 2, (Multi 1), Rank 1
1481 13:08:17.052894 Write Rank0 MR2 =0xad
1482 13:08:17.052977 [Write Leveling]
1483 13:08:17.055979 delay byte0 byte1 byte2 byte3
1484 13:08:17.056084
1485 13:08:17.059304 10 0 0
1486 13:08:17.059391 11 0 0
1487 13:08:17.063072 12 0 0
1488 13:08:17.063159 13 0 0
1489 13:08:17.063244 14 0 0
1490 13:08:17.066218 15 0 0
1491 13:08:17.066305 16 0 0
1492 13:08:17.069551 17 0 0
1493 13:08:17.069638 18 0 0
1494 13:08:17.072713 19 0 0
1495 13:08:17.072801 20 0 0
1496 13:08:17.072887 21 0 0
1497 13:08:17.076070 22 0 0
1498 13:08:17.076157 23 0 0
1499 13:08:17.079466 24 0 ff
1500 13:08:17.079589 25 0 ff
1501 13:08:17.083114 26 ff ff
1502 13:08:17.083229 27 ff ff
1503 13:08:17.083340 28 ff ff
1504 13:08:17.086573 29 ff ff
1505 13:08:17.086683 30 ff ff
1506 13:08:17.089792 31 ff ff
1507 13:08:17.089907 32 ff ff
1508 13:08:17.096306 pass bytecount = 0xff (0xff: all bytes pass)
1509 13:08:17.096434
1510 13:08:17.096560 DQS0 dly: 26
1511 13:08:17.096661 DQS1 dly: 24
1512 13:08:17.099445 Write Rank0 MR2 =0x2d
1513 13:08:17.102584 [RankSwap] Rank num 2, (Multi 1), Rank 0
1514 13:08:17.106369 Write Rank1 MR1 =0xd6
1515 13:08:17.106483 [Gating]
1516 13:08:17.106579 ==
1517 13:08:17.109724 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1518 13:08:17.113016 fsp= 1, odt_onoff= 1, Byte mode= 0
1519 13:08:17.113100 ==
1520 13:08:17.119730 3 1 0 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1521 13:08:17.123218 3 1 4 |2c2b 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1522 13:08:17.126250 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1523 13:08:17.133118 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1524 13:08:17.136245 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1525 13:08:17.139832 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1526 13:08:17.146551 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1527 13:08:17.149676 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1528 13:08:17.153111 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1529 13:08:17.156263 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1530 13:08:17.163249 3 2 8 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1531 13:08:17.166358 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1532 13:08:17.169850 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1533 13:08:17.176549 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1534 13:08:17.179713 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1535 13:08:17.183214 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1536 13:08:17.189786 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1537 13:08:17.193227 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1538 13:08:17.196369 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1539 13:08:17.199742 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1540 13:08:17.206537 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1541 13:08:17.210050 3 3 20 |3534 707 |(11 11)(11 11) |(0 0)(1 1)| 0
1542 13:08:17.213656 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1543 13:08:17.219918 [Byte 1] Lead/lag falling Transition (3, 3, 24)
1544 13:08:17.223161 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1545 13:08:17.226463 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1546 13:08:17.233799 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1547 13:08:17.236786 3 4 8 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1548 13:08:17.240041 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1549 13:08:17.243380 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1550 13:08:17.250089 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1551 13:08:17.253650 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1552 13:08:17.257097 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1553 13:08:17.263575 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1554 13:08:17.267163 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1555 13:08:17.270722 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 13:08:17.273646 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1557 13:08:17.280249 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 13:08:17.283817 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 13:08:17.287328 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 13:08:17.293740 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 13:08:17.296916 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 13:08:17.300416 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1563 13:08:17.307076 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1564 13:08:17.310298 [Byte 0] Lead/lag Transition tap number (2)
1565 13:08:17.314010 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1566 13:08:17.317265 3 6 8 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1567 13:08:17.320652 [Byte 1] Lead/lag Transition tap number (2)
1568 13:08:17.327365 3 6 12 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1569 13:08:17.327473 [Byte 0]First pass (3, 6, 12)
1570 13:08:17.334013 3 6 16 |4646 a0a |(0 0)(11 11) |(0 0)(0 0)| 0
1571 13:08:17.337754 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1572 13:08:17.340715 [Byte 1]First pass (3, 6, 20)
1573 13:08:17.343765 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1574 13:08:17.347281 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1575 13:08:17.350540 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1576 13:08:17.353750 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1577 13:08:17.360467 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1578 13:08:17.364035 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1579 13:08:17.367468 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1580 13:08:17.370407 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1581 13:08:17.373852 All bytes gating window > 1UI, Early break!
1582 13:08:17.373968
1583 13:08:17.377427 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1584 13:08:17.380617
1585 13:08:17.383976 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1586 13:08:17.384060
1587 13:08:17.384125
1588 13:08:17.384185
1589 13:08:17.387384 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1590 13:08:17.387468
1591 13:08:17.390828 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1592 13:08:17.390945
1593 13:08:17.391041
1594 13:08:17.394071 Write Rank1 MR1 =0x56
1595 13:08:17.394174
1596 13:08:17.397612 best RODT dly(2T, 0.5T) = (2, 3)
1597 13:08:17.397729
1598 13:08:17.400848 best RODT dly(2T, 0.5T) = (2, 3)
1599 13:08:17.400933 ==
1600 13:08:17.404131 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1601 13:08:17.407339 fsp= 1, odt_onoff= 1, Byte mode= 0
1602 13:08:17.407416 ==
1603 13:08:17.414049 Start DQ dly to find pass range UseTestEngine =0
1604 13:08:17.417832 x-axis: bit #, y-axis: DQ dly (-127~63)
1605 13:08:17.417918 RX Vref Scan = 0
1606 13:08:17.420968 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1607 13:08:17.424169 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1608 13:08:17.427982 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1609 13:08:17.428062 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1610 13:08:17.431350 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1611 13:08:17.434794 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1612 13:08:17.438179 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1613 13:08:17.441183 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1614 13:08:17.444542 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1615 13:08:17.447837 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1616 13:08:17.451020 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1617 13:08:17.451119 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1618 13:08:17.454678 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1619 13:08:17.457868 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1620 13:08:17.460892 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1621 13:08:17.464318 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1622 13:08:17.468105 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1623 13:08:17.470901 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1624 13:08:17.474289 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1625 13:08:17.474366 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1626 13:08:17.477649 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1627 13:08:17.481079 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1628 13:08:17.484857 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1629 13:08:17.487713 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1630 13:08:17.491155 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1631 13:08:17.491234 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1632 13:08:17.494813 0, [0] xxxoxoxx oxxoxxxx [MSB]
1633 13:08:17.498135 1, [0] xxxoxoxx ooxoooxx [MSB]
1634 13:08:17.501250 2, [0] xxxoxooo ooxoooxx [MSB]
1635 13:08:17.504429 3, [0] xxxoxooo ooxoooox [MSB]
1636 13:08:17.508321 4, [0] xoxooooo ooxoooox [MSB]
1637 13:08:17.508397 5, [0] oooooooo ooxooooo [MSB]
1638 13:08:17.511756 6, [0] oooooooo ooxooooo [MSB]
1639 13:08:17.514961 33, [0] oooooooo xooooooo [MSB]
1640 13:08:17.518025 34, [0] oooxoooo xooooooo [MSB]
1641 13:08:17.521511 35, [0] oooxoooo xooooooo [MSB]
1642 13:08:17.524501 36, [0] oooxoooo xooxoooo [MSB]
1643 13:08:17.528320 37, [0] oooxoxoo xxoxoxoo [MSB]
1644 13:08:17.528397 38, [0] oooxoxoo xxoxoxxo [MSB]
1645 13:08:17.531653 39, [0] oooxoxox xxoxxxxo [MSB]
1646 13:08:17.534544 40, [0] oooxoxxx xxoxxxxo [MSB]
1647 13:08:17.538441 41, [0] oxxxoxxx xxoxxxxx [MSB]
1648 13:08:17.541838 42, [0] oxxxxxxx xxoxxxxx [MSB]
1649 13:08:17.545128 43, [0] xxxxxxxx xxoxxxxx [MSB]
1650 13:08:17.545206 44, [0] xxxxxxxx xxoxxxxx [MSB]
1651 13:08:17.548427 45, [0] xxxxxxxx xxxxxxxx [MSB]
1652 13:08:17.551986 iDelay=45, Bit 0, Center 23 (5 ~ 42) 38
1653 13:08:17.555260 iDelay=45, Bit 1, Center 22 (4 ~ 40) 37
1654 13:08:17.558674 iDelay=45, Bit 2, Center 22 (5 ~ 40) 36
1655 13:08:17.565039 iDelay=45, Bit 3, Center 15 (-2 ~ 33) 36
1656 13:08:17.568548 iDelay=45, Bit 4, Center 22 (4 ~ 41) 38
1657 13:08:17.571769 iDelay=45, Bit 5, Center 18 (0 ~ 36) 37
1658 13:08:17.575414 iDelay=45, Bit 6, Center 20 (2 ~ 39) 38
1659 13:08:17.578588 iDelay=45, Bit 7, Center 20 (2 ~ 38) 37
1660 13:08:17.581862 iDelay=45, Bit 8, Center 15 (-2 ~ 32) 35
1661 13:08:17.585184 iDelay=45, Bit 9, Center 18 (1 ~ 36) 36
1662 13:08:17.588717 iDelay=45, Bit 10, Center 25 (7 ~ 44) 38
1663 13:08:17.591776 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1664 13:08:17.595601 iDelay=45, Bit 12, Center 19 (1 ~ 38) 38
1665 13:08:17.598595 iDelay=45, Bit 13, Center 18 (1 ~ 36) 36
1666 13:08:17.601866 iDelay=45, Bit 14, Center 20 (3 ~ 37) 35
1667 13:08:17.605329 iDelay=45, Bit 15, Center 22 (5 ~ 40) 36
1668 13:08:17.608573 ==
1669 13:08:17.611878 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1670 13:08:17.615459 fsp= 1, odt_onoff= 1, Byte mode= 0
1671 13:08:17.615534 ==
1672 13:08:17.615596 DQS Delay:
1673 13:08:17.618611 DQS0 = 0, DQS1 = 0
1674 13:08:17.618680 DQM Delay:
1675 13:08:17.622049 DQM0 = 20, DQM1 = 19
1676 13:08:17.622121 DQ Delay:
1677 13:08:17.625403 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =15
1678 13:08:17.628600 DQ4 =22, DQ5 =18, DQ6 =20, DQ7 =20
1679 13:08:17.631762 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
1680 13:08:17.635147 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1681 13:08:17.635221
1682 13:08:17.635281
1683 13:08:17.638366 DramC Write-DBI off
1684 13:08:17.638435 ==
1685 13:08:17.641823 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1686 13:08:17.644992 fsp= 1, odt_onoff= 1, Byte mode= 0
1687 13:08:17.645106 ==
1688 13:08:17.648311 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1689 13:08:17.648385
1690 13:08:17.651770 Begin, DQ Scan Range 920~1176
1691 13:08:17.651854
1692 13:08:17.651919
1693 13:08:17.655093 TX Vref Scan disable
1694 13:08:17.658695 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1695 13:08:17.661784 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1696 13:08:17.665122 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1697 13:08:17.668673 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1698 13:08:17.671841 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1699 13:08:17.675437 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1700 13:08:17.679135 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1701 13:08:17.682384 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1702 13:08:17.685259 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1703 13:08:17.692059 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1704 13:08:17.695531 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1705 13:08:17.699134 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1706 13:08:17.702060 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1707 13:08:17.705787 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1708 13:08:17.708944 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1709 13:08:17.711969 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1710 13:08:17.715318 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1711 13:08:17.718662 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1712 13:08:17.722650 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1713 13:08:17.725650 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1714 13:08:17.729028 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1715 13:08:17.732165 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1716 13:08:17.735560 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1717 13:08:17.738985 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1718 13:08:17.742408 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1719 13:08:17.745882 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1720 13:08:17.752449 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1721 13:08:17.755420 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1722 13:08:17.758859 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1723 13:08:17.761919 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1724 13:08:17.765147 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1725 13:08:17.768968 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1726 13:08:17.772351 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1727 13:08:17.775818 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1728 13:08:17.779179 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1729 13:08:17.782045 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1730 13:08:17.785703 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1731 13:08:17.788666 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1732 13:08:17.792165 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1733 13:08:17.795566 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1734 13:08:17.798919 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1735 13:08:17.802289 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1736 13:08:17.805537 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1737 13:08:17.808727 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1738 13:08:17.815310 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1739 13:08:17.818468 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1740 13:08:17.822184 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1741 13:08:17.825590 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1742 13:08:17.828642 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1743 13:08:17.832577 969 |3 6 9|[0] xxxxxxxx ooxoxxxx [MSB]
1744 13:08:17.835497 970 |3 6 10|[0] xxxxxxxx ooxooxox [MSB]
1745 13:08:17.838590 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1746 13:08:17.841931 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1747 13:08:17.845298 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1748 13:08:17.848600 974 |3 6 14|[0] xoxooooo ooxooooo [MSB]
1749 13:08:17.852141 975 |3 6 15|[0] xoxooooo oooooooo [MSB]
1750 13:08:17.859021 987 |3 6 27|[0] oooooooo xooooooo [MSB]
1751 13:08:17.862178 988 |3 6 28|[0] oooxoooo xxxxxxxx [MSB]
1752 13:08:17.865439 989 |3 6 29|[0] oooxoooo xxxxxxxx [MSB]
1753 13:08:17.868830 990 |3 6 30|[0] oooxoooo xxxxxxxx [MSB]
1754 13:08:17.872763 991 |3 6 31|[0] oooxoooo xxxxxxxx [MSB]
1755 13:08:17.875582 992 |3 6 32|[0] xxxxxxxx xxxxxxxx [MSB]
1756 13:08:17.878960 Byte0, DQ PI dly=981, DQM PI dly= 981
1757 13:08:17.882903 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1758 13:08:17.882989
1759 13:08:17.885994 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1760 13:08:17.886079
1761 13:08:17.889037 Byte1, DQ PI dly=979, DQM PI dly= 979
1762 13:08:17.895742 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1763 13:08:17.895827
1764 13:08:17.898970 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1765 13:08:17.899083
1766 13:08:17.899180 ==
1767 13:08:17.905785 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1768 13:08:17.909125 fsp= 1, odt_onoff= 1, Byte mode= 0
1769 13:08:17.909224 ==
1770 13:08:17.912445 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1771 13:08:17.912539
1772 13:08:17.915789 Begin, DQ Scan Range 955~1019
1773 13:08:17.915890 Write Rank1 MR14 =0x0
1774 13:08:17.925450
1775 13:08:17.925534 CH=0, VrefRange= 0, VrefLevel = 0
1776 13:08:17.931734 TX Bit0 (977~991) 15 984, Bit8 (969~982) 14 975,
1777 13:08:17.935159 TX Bit1 (977~987) 11 982, Bit9 (971~984) 14 977,
1778 13:08:17.941814 TX Bit2 (977~989) 13 983, Bit10 (976~985) 10 980,
1779 13:08:17.944769 TX Bit3 (971~982) 12 976, Bit11 (970~983) 14 976,
1780 13:08:17.948675 TX Bit4 (976~987) 12 981, Bit12 (973~984) 12 978,
1781 13:08:17.954697 TX Bit5 (973~985) 13 979, Bit13 (974~983) 10 978,
1782 13:08:17.958080 TX Bit6 (974~987) 14 980, Bit14 (974~984) 11 979,
1783 13:08:17.961525 TX Bit7 (975~989) 15 982, Bit15 (976~985) 10 980,
1784 13:08:17.961601
1785 13:08:17.964939 Write Rank1 MR14 =0x2
1786 13:08:17.972721
1787 13:08:17.972796 CH=0, VrefRange= 0, VrefLevel = 2
1788 13:08:17.979579 TX Bit0 (977~991) 15 984, Bit8 (969~983) 15 976,
1789 13:08:17.982397 TX Bit1 (976~989) 14 982, Bit9 (971~985) 15 978,
1790 13:08:17.986262 TX Bit2 (977~990) 14 983, Bit10 (977~990) 14 983,
1791 13:08:17.993182 TX Bit3 (970~983) 14 976, Bit11 (970~983) 14 976,
1792 13:08:17.996368 TX Bit4 (976~990) 15 983, Bit12 (972~985) 14 978,
1793 13:08:18.003097 TX Bit5 (973~986) 14 979, Bit13 (974~983) 10 978,
1794 13:08:18.006320 TX Bit6 (974~987) 14 980, Bit14 (973~985) 13 979,
1795 13:08:18.009498 TX Bit7 (975~990) 16 982, Bit15 (975~990) 16 982,
1796 13:08:18.009573
1797 13:08:18.013051 Write Rank1 MR14 =0x4
1798 13:08:18.020431
1799 13:08:18.020540 CH=0, VrefRange= 0, VrefLevel = 4
1800 13:08:18.027050 TX Bit0 (977~992) 16 984, Bit8 (969~983) 15 976,
1801 13:08:18.030314 TX Bit1 (976~990) 15 983, Bit9 (970~985) 16 977,
1802 13:08:18.037418 TX Bit2 (977~991) 15 984, Bit10 (976~990) 15 983,
1803 13:08:18.040926 TX Bit3 (970~984) 15 977, Bit11 (969~984) 16 976,
1804 13:08:18.044241 TX Bit4 (975~990) 16 982, Bit12 (971~986) 16 978,
1805 13:08:18.051016 TX Bit5 (972~986) 15 979, Bit13 (973~983) 11 978,
1806 13:08:18.054140 TX Bit6 (974~989) 16 981, Bit14 (973~986) 14 979,
1807 13:08:18.057544 TX Bit7 (975~990) 16 982, Bit15 (975~990) 16 982,
1808 13:08:18.057619
1809 13:08:18.060309 Write Rank1 MR14 =0x6
1810 13:08:18.068151
1811 13:08:18.068231 CH=0, VrefRange= 0, VrefLevel = 6
1812 13:08:18.075328 TX Bit0 (977~992) 16 984, Bit8 (968~984) 17 976,
1813 13:08:18.078253 TX Bit1 (976~990) 15 983, Bit9 (969~986) 18 977,
1814 13:08:18.085290 TX Bit2 (977~991) 15 984, Bit10 (976~991) 16 983,
1815 13:08:18.088564 TX Bit3 (970~984) 15 977, Bit11 (969~984) 16 976,
1816 13:08:18.091651 TX Bit4 (975~991) 17 983, Bit12 (971~987) 17 979,
1817 13:08:18.098307 TX Bit5 (972~987) 16 979, Bit13 (973~984) 12 978,
1818 13:08:18.102104 TX Bit6 (973~990) 18 981, Bit14 (973~987) 15 980,
1819 13:08:18.105498 TX Bit7 (974~991) 18 982, Bit15 (975~991) 17 983,
1820 13:08:18.105574
1821 13:08:18.108633 Write Rank1 MR14 =0x8
1822 13:08:18.116145
1823 13:08:18.116231 CH=0, VrefRange= 0, VrefLevel = 8
1824 13:08:18.122714 TX Bit0 (976~992) 17 984, Bit8 (968~984) 17 976,
1825 13:08:18.125940 TX Bit1 (975~991) 17 983, Bit9 (970~987) 18 978,
1826 13:08:18.132777 TX Bit2 (977~991) 15 984, Bit10 (976~991) 16 983,
1827 13:08:18.135928 TX Bit3 (969~985) 17 977, Bit11 (969~984) 16 976,
1828 13:08:18.139246 TX Bit4 (975~991) 17 983, Bit12 (971~987) 17 979,
1829 13:08:18.146137 TX Bit5 (971~989) 19 980, Bit13 (972~984) 13 978,
1830 13:08:18.149343 TX Bit6 (972~990) 19 981, Bit14 (972~988) 17 980,
1831 13:08:18.152722 TX Bit7 (974~991) 18 982, Bit15 (974~991) 18 982,
1832 13:08:18.152808
1833 13:08:18.156114 Write Rank1 MR14 =0xa
1834 13:08:18.164600
1835 13:08:18.164687 CH=0, VrefRange= 0, VrefLevel = 10
1836 13:08:18.171053 TX Bit0 (976~993) 18 984, Bit8 (968~985) 18 976,
1837 13:08:18.174356 TX Bit1 (975~991) 17 983, Bit9 (969~987) 19 978,
1838 13:08:18.180778 TX Bit2 (976~992) 17 984, Bit10 (976~992) 17 984,
1839 13:08:18.183900 TX Bit3 (969~986) 18 977, Bit11 (969~985) 17 977,
1840 13:08:18.187539 TX Bit4 (974~991) 18 982, Bit12 (970~987) 18 978,
1841 13:08:18.194261 TX Bit5 (971~989) 19 980, Bit13 (972~986) 15 979,
1842 13:08:18.197920 TX Bit6 (972~990) 19 981, Bit14 (971~988) 18 979,
1843 13:08:18.200785 TX Bit7 (974~991) 18 982, Bit15 (975~991) 17 983,
1844 13:08:18.200869
1845 13:08:18.204329 Write Rank1 MR14 =0xc
1846 13:08:18.212656
1847 13:08:18.215572 CH=0, VrefRange= 0, VrefLevel = 12
1848 13:08:18.218938 TX Bit0 (976~994) 19 985, Bit8 (968~985) 18 976,
1849 13:08:18.222277 TX Bit1 (975~992) 18 983, Bit9 (969~988) 20 978,
1850 13:08:18.229109 TX Bit2 (976~992) 17 984, Bit10 (975~992) 18 983,
1851 13:08:18.232621 TX Bit3 (969~986) 18 977, Bit11 (968~985) 18 976,
1852 13:08:18.235925 TX Bit4 (974~992) 19 983, Bit12 (970~989) 20 979,
1853 13:08:18.242494 TX Bit5 (971~990) 20 980, Bit13 (972~987) 16 979,
1854 13:08:18.245852 TX Bit6 (972~991) 20 981, Bit14 (971~989) 19 980,
1855 13:08:18.249195 TX Bit7 (974~992) 19 983, Bit15 (974~992) 19 983,
1856 13:08:18.249285
1857 13:08:18.252294 Write Rank1 MR14 =0xe
1858 13:08:18.260579
1859 13:08:18.260659 CH=0, VrefRange= 0, VrefLevel = 14
1860 13:08:18.267088 TX Bit0 (976~994) 19 985, Bit8 (968~985) 18 976,
1861 13:08:18.270637 TX Bit1 (975~992) 18 983, Bit9 (969~989) 21 979,
1862 13:08:18.277616 TX Bit2 (976~993) 18 984, Bit10 (975~992) 18 983,
1863 13:08:18.281001 TX Bit3 (969~987) 19 978, Bit11 (968~986) 19 977,
1864 13:08:18.284241 TX Bit4 (973~992) 20 982, Bit12 (970~990) 21 980,
1865 13:08:18.290677 TX Bit5 (970~990) 21 980, Bit13 (971~987) 17 979,
1866 13:08:18.294063 TX Bit6 (971~991) 21 981, Bit14 (970~990) 21 980,
1867 13:08:18.297736 TX Bit7 (972~992) 21 982, Bit15 (974~992) 19 983,
1868 13:08:18.297812
1869 13:08:18.300447 Write Rank1 MR14 =0x10
1870 13:08:18.309110
1871 13:08:18.312158 CH=0, VrefRange= 0, VrefLevel = 16
1872 13:08:18.316064 TX Bit0 (976~994) 19 985, Bit8 (968~986) 19 977,
1873 13:08:18.319350 TX Bit1 (974~993) 20 983, Bit9 (969~990) 22 979,
1874 13:08:18.325806 TX Bit2 (976~993) 18 984, Bit10 (975~993) 19 984,
1875 13:08:18.329086 TX Bit3 (969~988) 20 978, Bit11 (968~987) 20 977,
1876 13:08:18.332370 TX Bit4 (973~993) 21 983, Bit12 (970~990) 21 980,
1877 13:08:18.339418 TX Bit5 (970~991) 22 980, Bit13 (970~988) 19 979,
1878 13:08:18.342406 TX Bit6 (971~991) 21 981, Bit14 (970~990) 21 980,
1879 13:08:18.345986 TX Bit7 (972~993) 22 982, Bit15 (974~993) 20 983,
1880 13:08:18.346062
1881 13:08:18.348979 Write Rank1 MR14 =0x12
1882 13:08:18.357641
1883 13:08:18.357723 CH=0, VrefRange= 0, VrefLevel = 18
1884 13:08:18.364123 TX Bit0 (975~995) 21 985, Bit8 (967~987) 21 977,
1885 13:08:18.367731 TX Bit1 (974~993) 20 983, Bit9 (969~990) 22 979,
1886 13:08:18.374040 TX Bit2 (976~994) 19 985, Bit10 (974~994) 21 984,
1887 13:08:18.377683 TX Bit3 (968~988) 21 978, Bit11 (968~987) 20 977,
1888 13:08:18.380632 TX Bit4 (973~993) 21 983, Bit12 (969~990) 22 979,
1889 13:08:18.387453 TX Bit5 (970~991) 22 980, Bit13 (970~988) 19 979,
1890 13:08:18.390515 TX Bit6 (971~992) 22 981, Bit14 (970~990) 21 980,
1891 13:08:18.394146 TX Bit7 (972~993) 22 982, Bit15 (973~993) 21 983,
1892 13:08:18.394253
1893 13:08:18.397668 Write Rank1 MR14 =0x14
1894 13:08:18.405684
1895 13:08:18.409032 CH=0, VrefRange= 0, VrefLevel = 20
1896 13:08:18.412516 TX Bit0 (975~995) 21 985, Bit8 (967~988) 22 977,
1897 13:08:18.416165 TX Bit1 (973~993) 21 983, Bit9 (968~990) 23 979,
1898 13:08:18.422703 TX Bit2 (975~994) 20 984, Bit10 (974~994) 21 984,
1899 13:08:18.425667 TX Bit3 (968~989) 22 978, Bit11 (968~988) 21 978,
1900 13:08:18.429060 TX Bit4 (972~993) 22 982, Bit12 (969~991) 23 980,
1901 13:08:18.436013 TX Bit5 (970~991) 22 980, Bit13 (970~989) 20 979,
1902 13:08:18.439056 TX Bit6 (970~992) 23 981, Bit14 (969~991) 23 980,
1903 13:08:18.442615 TX Bit7 (971~994) 24 982, Bit15 (972~994) 23 983,
1904 13:08:18.442690
1905 13:08:18.445943 Write Rank1 MR14 =0x16
1906 13:08:18.454625
1907 13:08:18.458046 CH=0, VrefRange= 0, VrefLevel = 22
1908 13:08:18.461032 TX Bit0 (975~996) 22 985, Bit8 (967~989) 23 978,
1909 13:08:18.464785 TX Bit1 (973~994) 22 983, Bit9 (968~991) 24 979,
1910 13:08:18.471572 TX Bit2 (975~995) 21 985, Bit10 (974~995) 22 984,
1911 13:08:18.474418 TX Bit3 (968~990) 23 979, Bit11 (967~989) 23 978,
1912 13:08:18.478325 TX Bit4 (972~994) 23 983, Bit12 (969~991) 23 980,
1913 13:08:18.484766 TX Bit5 (969~992) 24 980, Bit13 (969~990) 22 979,
1914 13:08:18.488155 TX Bit6 (970~993) 24 981, Bit14 (969~991) 23 980,
1915 13:08:18.491376 TX Bit7 (971~994) 24 982, Bit15 (973~994) 22 983,
1916 13:08:18.491460
1917 13:08:18.494632 Write Rank1 MR14 =0x18
1918 13:08:18.503198
1919 13:08:18.506544 CH=0, VrefRange= 0, VrefLevel = 24
1920 13:08:18.509795 TX Bit0 (974~996) 23 985, Bit8 (967~989) 23 978,
1921 13:08:18.512997 TX Bit1 (973~994) 22 983, Bit9 (968~991) 24 979,
1922 13:08:18.520020 TX Bit2 (975~995) 21 985, Bit10 (973~995) 23 984,
1923 13:08:18.522924 TX Bit3 (967~990) 24 978, Bit11 (967~990) 24 978,
1924 13:08:18.526396 TX Bit4 (971~995) 25 983, Bit12 (968~991) 24 979,
1925 13:08:18.533145 TX Bit5 (969~992) 24 980, Bit13 (969~990) 22 979,
1926 13:08:18.536438 TX Bit6 (970~993) 24 981, Bit14 (969~991) 23 980,
1927 13:08:18.539630 TX Bit7 (971~994) 24 982, Bit15 (972~995) 24 983,
1928 13:08:18.539706
1929 13:08:18.543390 Write Rank1 MR14 =0x1a
1930 13:08:18.551874
1931 13:08:18.551961 CH=0, VrefRange= 0, VrefLevel = 26
1932 13:08:18.558675 TX Bit0 (974~998) 25 986, Bit8 (967~990) 24 978,
1933 13:08:18.562133 TX Bit1 (972~995) 24 983, Bit9 (968~991) 24 979,
1934 13:08:18.568752 TX Bit2 (975~996) 22 985, Bit10 (974~996) 23 985,
1935 13:08:18.572184 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1936 13:08:18.575362 TX Bit4 (971~995) 25 983, Bit12 (968~992) 25 980,
1937 13:08:18.582233 TX Bit5 (969~992) 24 980, Bit13 (969~990) 22 979,
1938 13:08:18.585516 TX Bit6 (970~994) 25 982, Bit14 (969~992) 24 980,
1939 13:08:18.589031 TX Bit7 (970~995) 26 982, Bit15 (972~996) 25 984,
1940 13:08:18.589114
1941 13:08:18.592184 Write Rank1 MR14 =0x1c
1942 13:08:18.601136
1943 13:08:18.604087 CH=0, VrefRange= 0, VrefLevel = 28
1944 13:08:18.607402 TX Bit0 (974~998) 25 986, Bit8 (966~990) 25 978,
1945 13:08:18.610910 TX Bit1 (972~995) 24 983, Bit9 (968~991) 24 979,
1946 13:08:18.617609 TX Bit2 (974~996) 23 985, Bit10 (972~996) 25 984,
1947 13:08:18.620922 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1948 13:08:18.624248 TX Bit4 (971~995) 25 983, Bit12 (968~992) 25 980,
1949 13:08:18.631245 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
1950 13:08:18.634356 TX Bit6 (970~994) 25 982, Bit14 (968~992) 25 980,
1951 13:08:18.637607 TX Bit7 (971~995) 25 983, Bit15 (970~996) 27 983,
1952 13:08:18.637684
1953 13:08:18.640670 Write Rank1 MR14 =0x1e
1954 13:08:18.649714
1955 13:08:18.653071 CH=0, VrefRange= 0, VrefLevel = 30
1956 13:08:18.656481 TX Bit0 (973~998) 26 985, Bit8 (965~990) 26 977,
1957 13:08:18.659691 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
1958 13:08:18.666438 TX Bit2 (974~997) 24 985, Bit10 (972~997) 26 984,
1959 13:08:18.669679 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1960 13:08:18.673276 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
1961 13:08:18.679948 TX Bit5 (968~993) 26 980, Bit13 (969~991) 23 980,
1962 13:08:18.683545 TX Bit6 (969~994) 26 981, Bit14 (968~992) 25 980,
1963 13:08:18.686420 TX Bit7 (970~996) 27 983, Bit15 (971~996) 26 983,
1964 13:08:18.686502
1965 13:08:18.689712 Write Rank1 MR14 =0x20
1966 13:08:18.698757
1967 13:08:18.701939 CH=0, VrefRange= 0, VrefLevel = 32
1968 13:08:18.705548 TX Bit0 (973~998) 26 985, Bit8 (965~990) 26 977,
1969 13:08:18.708785 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
1970 13:08:18.715959 TX Bit2 (974~997) 24 985, Bit10 (972~997) 26 984,
1971 13:08:18.719019 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1972 13:08:18.722054 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
1973 13:08:18.729206 TX Bit5 (968~993) 26 980, Bit13 (969~991) 23 980,
1974 13:08:18.732295 TX Bit6 (969~994) 26 981, Bit14 (968~992) 25 980,
1975 13:08:18.735486 TX Bit7 (970~996) 27 983, Bit15 (971~996) 26 983,
1976 13:08:18.735566
1977 13:08:18.739153 Write Rank1 MR14 =0x22
1978 13:08:18.747788
1979 13:08:18.751373 CH=0, VrefRange= 0, VrefLevel = 34
1980 13:08:18.754173 TX Bit0 (973~998) 26 985, Bit8 (965~990) 26 977,
1981 13:08:18.757453 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
1982 13:08:18.764526 TX Bit2 (974~997) 24 985, Bit10 (972~997) 26 984,
1983 13:08:18.767627 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1984 13:08:18.770855 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
1985 13:08:18.777918 TX Bit5 (968~993) 26 980, Bit13 (969~991) 23 980,
1986 13:08:18.780922 TX Bit6 (969~994) 26 981, Bit14 (968~992) 25 980,
1987 13:08:18.784385 TX Bit7 (970~996) 27 983, Bit15 (971~996) 26 983,
1988 13:08:18.784499
1989 13:08:18.787482 Write Rank1 MR14 =0x24
1990 13:08:18.796501
1991 13:08:18.799705 CH=0, VrefRange= 0, VrefLevel = 36
1992 13:08:18.803493 TX Bit0 (973~998) 26 985, Bit8 (965~990) 26 977,
1993 13:08:18.806464 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
1994 13:08:18.813399 TX Bit2 (974~997) 24 985, Bit10 (972~997) 26 984,
1995 13:08:18.816343 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1996 13:08:18.820218 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
1997 13:08:18.826635 TX Bit5 (968~993) 26 980, Bit13 (969~991) 23 980,
1998 13:08:18.830173 TX Bit6 (969~994) 26 981, Bit14 (968~992) 25 980,
1999 13:08:18.832928 TX Bit7 (970~996) 27 983, Bit15 (971~996) 26 983,
2000 13:08:18.836485
2001 13:08:18.836569 Write Rank1 MR14 =0x26
2002 13:08:18.845112
2003 13:08:18.848792 CH=0, VrefRange= 0, VrefLevel = 38
2004 13:08:18.851785 TX Bit0 (973~998) 26 985, Bit8 (965~990) 26 977,
2005 13:08:18.855232 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
2006 13:08:18.862170 TX Bit2 (974~997) 24 985, Bit10 (972~997) 26 984,
2007 13:08:18.865693 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
2008 13:08:18.869032 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
2009 13:08:18.875486 TX Bit5 (968~993) 26 980, Bit13 (969~991) 23 980,
2010 13:08:18.878889 TX Bit6 (969~994) 26 981, Bit14 (968~992) 25 980,
2011 13:08:18.882513 TX Bit7 (970~996) 27 983, Bit15 (971~996) 26 983,
2012 13:08:18.882598
2013 13:08:18.882665
2014 13:08:18.885440 TX Vref found, early break! 375< 384
2015 13:08:18.892272 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2016 13:08:18.895650 u1DelayCellOfst[0]=7 cells (6 PI)
2017 13:08:18.898846 u1DelayCellOfst[1]=6 cells (5 PI)
2018 13:08:18.902241 u1DelayCellOfst[2]=7 cells (6 PI)
2019 13:08:18.902343 u1DelayCellOfst[3]=0 cells (0 PI)
2020 13:08:18.905791 u1DelayCellOfst[4]=5 cells (4 PI)
2021 13:08:18.908796 u1DelayCellOfst[5]=1 cells (1 PI)
2022 13:08:18.912048 u1DelayCellOfst[6]=2 cells (2 PI)
2023 13:08:18.915493 u1DelayCellOfst[7]=5 cells (4 PI)
2024 13:08:18.919164 Byte0, DQ PI dly=979, DQM PI dly= 982
2025 13:08:18.922065 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2026 13:08:18.922181
2027 13:08:18.929011 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2028 13:08:18.929092
2029 13:08:18.931931 u1DelayCellOfst[8]=0 cells (0 PI)
2030 13:08:18.935378 u1DelayCellOfst[9]=2 cells (2 PI)
2031 13:08:18.938596 u1DelayCellOfst[10]=9 cells (7 PI)
2032 13:08:18.938715 u1DelayCellOfst[11]=1 cells (1 PI)
2033 13:08:18.942378 u1DelayCellOfst[12]=3 cells (3 PI)
2034 13:08:18.945404 u1DelayCellOfst[13]=3 cells (3 PI)
2035 13:08:18.948811 u1DelayCellOfst[14]=3 cells (3 PI)
2036 13:08:18.952163 u1DelayCellOfst[15]=7 cells (6 PI)
2037 13:08:18.955520 Byte1, DQ PI dly=977, DQM PI dly= 980
2038 13:08:18.958607 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
2039 13:08:18.962222
2040 13:08:18.965871 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
2041 13:08:18.965974
2042 13:08:18.966080 Write Rank1 MR14 =0x1e
2043 13:08:18.966176
2044 13:08:18.969161 Final TX Range 0 Vref 30
2045 13:08:18.969242
2046 13:08:18.976144 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2047 13:08:18.976258
2048 13:08:18.982777 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2049 13:08:18.989139 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2050 13:08:18.996079 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2051 13:08:18.999436 Write Rank1 MR3 =0xb0
2052 13:08:18.999595 DramC Write-DBI on
2053 13:08:18.999672 ==
2054 13:08:19.006008 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2055 13:08:19.009627 fsp= 1, odt_onoff= 1, Byte mode= 0
2056 13:08:19.009746 ==
2057 13:08:19.013013 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2058 13:08:19.013106
2059 13:08:19.016284 Begin, DQ Scan Range 700~764
2060 13:08:19.016415
2061 13:08:19.016531
2062 13:08:19.019418 TX Vref Scan disable
2063 13:08:19.022643 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2064 13:08:19.026506 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2065 13:08:19.029726 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2066 13:08:19.032814 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2067 13:08:19.036405 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2068 13:08:19.039622 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2069 13:08:19.042956 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2070 13:08:19.046283 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2071 13:08:19.049596 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2072 13:08:19.053003 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2073 13:08:19.056707 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2074 13:08:19.060283 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2075 13:08:19.062968 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2076 13:08:19.066448 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2077 13:08:19.069838 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2078 13:08:19.079084 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2079 13:08:19.082315 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2080 13:08:19.085810 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2081 13:08:19.089476 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2082 13:08:19.092589 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2083 13:08:19.095787 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2084 13:08:19.099257 742 |2 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
2085 13:08:19.102495 Byte0, DQ PI dly=728, DQM PI dly= 728
2086 13:08:19.106158 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2087 13:08:19.106245
2088 13:08:19.109195 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2089 13:08:19.112545
2090 13:08:19.116109 Byte1, DQ PI dly=723, DQM PI dly= 723
2091 13:08:19.119062 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2092 13:08:19.119168
2093 13:08:19.122840 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2094 13:08:19.122957
2095 13:08:19.129321 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2096 13:08:19.135823 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2097 13:08:19.142717 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2098 13:08:19.146311 Write Rank1 MR3 =0x30
2099 13:08:19.146424 DramC Write-DBI off
2100 13:08:19.146525
2101 13:08:19.149410 [DATLAT]
2102 13:08:19.152833 Freq=1600, CH0 RK1, use_rxtx_scan=0
2103 13:08:19.152940
2104 13:08:19.153045 DATLAT Default: 0x10
2105 13:08:19.156067 7, 0xFFFF, sum=0
2106 13:08:19.156189 8, 0xFFFF, sum=0
2107 13:08:19.159444 9, 0xFFFF, sum=0
2108 13:08:19.159555 10, 0xFFFF, sum=0
2109 13:08:19.162896 11, 0xFFFF, sum=0
2110 13:08:19.163010 12, 0xFFFF, sum=0
2111 13:08:19.166150 13, 0xFFFF, sum=0
2112 13:08:19.166236 14, 0x0, sum=1
2113 13:08:19.169812 15, 0x0, sum=2
2114 13:08:19.169984 16, 0x0, sum=3
2115 13:08:19.170094 17, 0x0, sum=4
2116 13:08:19.176356 pattern=2 first_step=14 total pass=5 best_step=16
2117 13:08:19.176479 ==
2118 13:08:19.179542 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2119 13:08:19.182969 fsp= 1, odt_onoff= 1, Byte mode= 0
2120 13:08:19.183080 ==
2121 13:08:19.189291 Start DQ dly to find pass range UseTestEngine =1
2122 13:08:19.193002 x-axis: bit #, y-axis: DQ dly (-127~63)
2123 13:08:19.193093 RX Vref Scan = 0
2124 13:08:19.196020 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2125 13:08:19.199317 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2126 13:08:19.202673 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2127 13:08:19.206414 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2128 13:08:19.206527 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2129 13:08:19.209724 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2130 13:08:19.212845 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2131 13:08:19.216310 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2132 13:08:19.219842 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2133 13:08:19.223086 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2134 13:08:19.226338 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2135 13:08:19.229627 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2136 13:08:19.229743 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2137 13:08:19.233069 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2138 13:08:19.236259 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2139 13:08:19.239715 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2140 13:08:19.243013 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2141 13:08:19.246840 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2142 13:08:19.249871 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2143 13:08:19.254294 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2144 13:08:19.254380 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2145 13:08:19.257759 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2146 13:08:19.260639 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2147 13:08:19.263944 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2148 13:08:19.264056 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2149 13:08:19.267676 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2150 13:08:19.271011 0, [0] xxxoxxxx oxxoxxxx [MSB]
2151 13:08:19.274341 1, [0] xxxoxoxx ooxooxxx [MSB]
2152 13:08:19.277752 2, [0] xxxoxoxx ooxoooxx [MSB]
2153 13:08:19.280644 3, [0] xxxoxooo ooxoooox [MSB]
2154 13:08:19.280729 4, [0] xxxoxooo ooxoooox [MSB]
2155 13:08:19.283856 5, [0] ooxooooo ooxoooox [MSB]
2156 13:08:19.287241 6, [0] oooooooo ooxooooo [MSB]
2157 13:08:19.291810 33, [0] oooooooo xooooooo [MSB]
2158 13:08:19.294915 34, [0] oooxoooo xooooooo [MSB]
2159 13:08:19.298174 35, [0] oooxoxoo xooxoooo [MSB]
2160 13:08:19.301575 36, [0] oooxoxoo xooxoxoo [MSB]
2161 13:08:19.304944 37, [0] oooxoxoo xxoxoxoo [MSB]
2162 13:08:19.308661 38, [0] oooxoxxo xxoxxxxo [MSB]
2163 13:08:19.308778 39, [0] oxxxoxxx xxoxxxxo [MSB]
2164 13:08:19.312379 40, [0] oxxxxxxx xxoxxxxx [MSB]
2165 13:08:19.315023 41, [0] xxxxxxxx xxoxxxxx [MSB]
2166 13:08:19.318664 42, [0] xxxxxxxx xxoxxxxx [MSB]
2167 13:08:19.322082 43, [0] xxxxxxxx xxoxxxxx [MSB]
2168 13:08:19.325351 44, [0] xxxxxxxx xxxxxxxx [MSB]
2169 13:08:19.328395 iDelay=44, Bit 0, Center 22 (5 ~ 40) 36
2170 13:08:19.332089 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2171 13:08:19.335320 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2172 13:08:19.338298 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2173 13:08:19.341616 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
2174 13:08:19.345426 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2175 13:08:19.348702 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2176 13:08:19.351896 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2177 13:08:19.355644 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
2178 13:08:19.358432 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2179 13:08:19.361878 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2180 13:08:19.368611 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2181 13:08:19.371730 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2182 13:08:19.375219 iDelay=44, Bit 13, Center 18 (2 ~ 35) 34
2183 13:08:19.378389 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
2184 13:08:19.381813 iDelay=44, Bit 15, Center 22 (6 ~ 39) 34
2185 13:08:19.381899 ==
2186 13:08:19.385138 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2187 13:08:19.388484 fsp= 1, odt_onoff= 1, Byte mode= 0
2188 13:08:19.388569 ==
2189 13:08:19.392178 DQS Delay:
2190 13:08:19.392263 DQS0 = 0, DQS1 = 0
2191 13:08:19.395041 DQM Delay:
2192 13:08:19.395125 DQM0 = 19, DQM1 = 19
2193 13:08:19.395192 DQ Delay:
2194 13:08:19.398864 DQ0 =22, DQ1 =21, DQ2 =22, DQ3 =15
2195 13:08:19.401808 DQ4 =22, DQ5 =17, DQ6 =20, DQ7 =20
2196 13:08:19.405558 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
2197 13:08:19.408879 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
2198 13:08:19.408964
2199 13:08:19.409029
2200 13:08:19.409093
2201 13:08:19.411909 [DramC_TX_OE_Calibration] TA2
2202 13:08:19.415529 Original DQ_B0 (3 6) =30, OEN = 27
2203 13:08:19.418642 Original DQ_B1 (3 6) =30, OEN = 27
2204 13:08:19.422012 23, 0x0, End_B0=23 End_B1=23
2205 13:08:19.425227 24, 0x0, End_B0=24 End_B1=24
2206 13:08:19.425314 25, 0x0, End_B0=25 End_B1=25
2207 13:08:19.428660 26, 0x0, End_B0=26 End_B1=26
2208 13:08:19.432019 27, 0x0, End_B0=27 End_B1=27
2209 13:08:19.435161 28, 0x0, End_B0=28 End_B1=28
2210 13:08:19.438604 29, 0x0, End_B0=29 End_B1=29
2211 13:08:19.438718 30, 0x0, End_B0=30 End_B1=30
2212 13:08:19.442005 31, 0xFFFF, End_B0=30 End_B1=30
2213 13:08:19.448777 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2214 13:08:19.452094 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2215 13:08:19.455637
2216 13:08:19.455742
2217 13:08:19.455837 Write Rank1 MR23 =0x3f
2218 13:08:19.455928 [DQSOSC]
2219 13:08:19.465074 [DQSOSCAuto] RK1, (LSB)MR18= 0xd7d7, (MSB)MR19= 0x202, tDQSOscB0 = 433 ps tDQSOscB1 = 433 ps
2220 13:08:19.471919 CH0_RK1: MR19=0x202, MR18=0xD7D7, DQSOSC=433, MR23=63, INC=13, DEC=19
2221 13:08:19.472037 Write Rank1 MR23 =0x3f
2222 13:08:19.475338 [DQSOSC]
2223 13:08:19.482557 [DQSOSCAuto] RK1, (LSB)MR18= 0xdcdc, (MSB)MR19= 0x202, tDQSOscB0 = 430 ps tDQSOscB1 = 430 ps
2224 13:08:19.485278 CH0 RK1: MR19=202, MR18=DCDC
2225 13:08:19.488399 [RxdqsGatingPostProcess] freq 1600
2226 13:08:19.491779 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2227 13:08:19.495665 Rank: 0
2228 13:08:19.498899 best DQS0 dly(2T, 0.5T) = (2, 5)
2229 13:08:19.499007 best DQS1 dly(2T, 0.5T) = (2, 5)
2230 13:08:19.502180 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2231 13:08:19.505276 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2232 13:08:19.508784 Rank: 1
2233 13:08:19.508890 best DQS0 dly(2T, 0.5T) = (2, 6)
2234 13:08:19.512066 best DQS1 dly(2T, 0.5T) = (2, 6)
2235 13:08:19.515534 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2236 13:08:19.519248 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2237 13:08:19.525416 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2238 13:08:19.529053 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2239 13:08:19.532653 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2240 13:08:19.535315 Write Rank0 MR13 =0x59
2241 13:08:19.535400 ==
2242 13:08:19.538902 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2243 13:08:19.542240 fsp= 1, odt_onoff= 1, Byte mode= 0
2244 13:08:19.542325 ==
2245 13:08:19.545575 === u2Vref_new: 0x56 --> 0x3a
2246 13:08:19.548922 === u2Vref_new: 0x58 --> 0x58
2247 13:08:19.552682 === u2Vref_new: 0x5a --> 0x5a
2248 13:08:19.555592 === u2Vref_new: 0x5c --> 0x78
2249 13:08:19.558949 === u2Vref_new: 0x5e --> 0x7a
2250 13:08:19.561957 === u2Vref_new: 0x60 --> 0x90
2251 13:08:19.565354 [CA 0] Center 38 (13~63) winsize 51
2252 13:08:19.569296 [CA 1] Center 37 (12~63) winsize 52
2253 13:08:19.572178 [CA 2] Center 34 (6~63) winsize 58
2254 13:08:19.576071 [CA 3] Center 34 (6~63) winsize 58
2255 13:08:19.579525 [CA 4] Center 34 (6~63) winsize 58
2256 13:08:19.579631 [CA 5] Center 28 (-1~58) winsize 60
2257 13:08:19.582044
2258 13:08:19.585388 [CATrainingPosCal] consider 1 rank data
2259 13:08:19.585464 u2DelayCellTimex100 = 735/100 ps
2260 13:08:19.592303 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2261 13:08:19.595351 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2262 13:08:19.598788 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2263 13:08:19.602284 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2264 13:08:19.605452 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2265 13:08:19.609002 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2266 13:08:19.609084
2267 13:08:19.612356 CA PerBit enable=1, Macro0, CA PI delay=28
2268 13:08:19.615650 === u2Vref_new: 0x5e --> 0x7a
2269 13:08:19.615756
2270 13:08:19.618995 Vref(ca) range 1: 30
2271 13:08:19.619084
2272 13:08:19.619180 CS Dly= 11 (42-0-32)
2273 13:08:19.622601 Write Rank0 MR13 =0xd8
2274 13:08:19.625719 Write Rank0 MR13 =0xd8
2275 13:08:19.625839 Write Rank0 MR12 =0x5e
2276 13:08:19.629044 Write Rank1 MR13 =0x59
2277 13:08:19.629158 ==
2278 13:08:19.632277 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2279 13:08:19.635788 fsp= 1, odt_onoff= 1, Byte mode= 0
2280 13:08:19.635898 ==
2281 13:08:19.639309 === u2Vref_new: 0x56 --> 0x3a
2282 13:08:19.642511 === u2Vref_new: 0x58 --> 0x58
2283 13:08:19.645784 === u2Vref_new: 0x5a --> 0x5a
2284 13:08:19.649171 === u2Vref_new: 0x5c --> 0x78
2285 13:08:19.652374 === u2Vref_new: 0x5e --> 0x7a
2286 13:08:19.655892 === u2Vref_new: 0x60 --> 0x90
2287 13:08:19.659229 [CA 0] Center 37 (12~63) winsize 52
2288 13:08:19.662570 [CA 1] Center 37 (12~63) winsize 52
2289 13:08:19.666084 [CA 2] Center 35 (7~63) winsize 57
2290 13:08:19.669565 [CA 3] Center 34 (6~63) winsize 58
2291 13:08:19.672678 [CA 4] Center 34 (6~63) winsize 58
2292 13:08:19.676020 [CA 5] Center 28 (-2~58) winsize 61
2293 13:08:19.676094
2294 13:08:19.679339 [CATrainingPosCal] consider 2 rank data
2295 13:08:19.683171 u2DelayCellTimex100 = 735/100 ps
2296 13:08:19.686041 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2297 13:08:19.689310 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2298 13:08:19.692804 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2299 13:08:19.696001 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2300 13:08:19.699473 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2301 13:08:19.702496 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2302 13:08:19.702572
2303 13:08:19.705916 CA PerBit enable=1, Macro0, CA PI delay=28
2304 13:08:19.709938 === u2Vref_new: 0x60 --> 0x90
2305 13:08:19.710047
2306 13:08:19.712923 Vref(ca) range 1: 32
2307 13:08:19.713021
2308 13:08:19.713117 CS Dly= 11 (42-0-32)
2309 13:08:19.715921 Write Rank1 MR13 =0xd8
2310 13:08:19.719829 Write Rank1 MR13 =0xd8
2311 13:08:19.719906 Write Rank1 MR12 =0x60
2312 13:08:19.722715 [RankSwap] Rank num 2, (Multi 1), Rank 0
2313 13:08:19.726154 Write Rank0 MR2 =0xad
2314 13:08:19.729450 [Write Leveling]
2315 13:08:19.729541 delay byte0 byte1 byte2 byte3
2316 13:08:19.729608
2317 13:08:19.732776 10 0 0
2318 13:08:19.732881 11 0 0
2319 13:08:19.735734 12 0 0
2320 13:08:19.735839 13 0 0
2321 13:08:19.739172 14 0 0
2322 13:08:19.739254 15 0 0
2323 13:08:19.739317 16 0 0
2324 13:08:19.742597 17 0 0
2325 13:08:19.742669 18 0 0
2326 13:08:19.745968 19 0 0
2327 13:08:19.746045 20 0 0
2328 13:08:19.746107 21 0 0
2329 13:08:19.749510 22 0 0
2330 13:08:19.749590 23 0 0
2331 13:08:19.752942 24 0 ff
2332 13:08:19.753019 25 0 ff
2333 13:08:19.756184 26 0 ff
2334 13:08:19.756290 27 0 ff
2335 13:08:19.756384 28 0 ff
2336 13:08:19.759759 29 0 ff
2337 13:08:19.759866 30 0 ff
2338 13:08:19.762727 31 0 ff
2339 13:08:19.762841 32 0 ff
2340 13:08:19.766226 33 0 ff
2341 13:08:19.766305 34 ff ff
2342 13:08:19.770091 35 ff ff
2343 13:08:19.770195 36 ff ff
2344 13:08:19.770292 37 ff ff
2345 13:08:19.773346 38 ff ff
2346 13:08:19.773462 39 ff ff
2347 13:08:19.776150 40 ff ff
2348 13:08:19.779473 pass bytecount = 0xff (0xff: all bytes pass)
2349 13:08:19.779551
2350 13:08:19.779622 DQS0 dly: 34
2351 13:08:19.783100 DQS1 dly: 24
2352 13:08:19.783173 Write Rank0 MR2 =0x2d
2353 13:08:19.786361 [RankSwap] Rank num 2, (Multi 1), Rank 0
2354 13:08:19.790075 Write Rank0 MR1 =0xd6
2355 13:08:19.790161 [Gating]
2356 13:08:19.790228 ==
2357 13:08:19.796326 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2358 13:08:19.799818 fsp= 1, odt_onoff= 1, Byte mode= 0
2359 13:08:19.799894 ==
2360 13:08:19.803166 3 1 0 |3535 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2361 13:08:19.809471 3 1 4 |3535 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2362 13:08:19.813013 3 1 8 |2121 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2363 13:08:19.816419 3 1 12 |3635 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2364 13:08:19.819582 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2365 13:08:19.826568 3 1 20 |1d1d 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2366 13:08:19.830138 3 1 24 |302f 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2367 13:08:19.833207 3 1 28 |1615 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2368 13:08:19.840165 [Byte 0] Lead/lag falling Transition (3, 1, 28)
2369 13:08:19.843276 3 2 0 |3433 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2370 13:08:19.846517 3 2 4 |707 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2371 13:08:19.849953 3 2 8 |3433 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2372 13:08:19.856617 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2373 13:08:19.859973 3 2 16 |302f 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2374 13:08:19.863344 3 2 20 |3d3c 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2375 13:08:19.870046 3 2 24 |3d3d 201 |(11 11)(11 11) |(1 1)(0 0)| 0
2376 13:08:19.873390 3 2 28 |2828 2727 |(11 11)(11 11) |(1 1)(0 0)| 0
2377 13:08:19.876521 3 3 0 |100f 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2378 13:08:19.883218 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2379 13:08:19.886840 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2380 13:08:19.889814 3 3 12 |3c3b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2381 13:08:19.893224 [Byte 1] Lead/lag Transition tap number (1)
2382 13:08:19.900423 3 3 16 |3737 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2383 13:08:19.903650 3 3 20 |b0a 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2384 13:08:19.906550 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2385 13:08:19.913466 [Byte 0] Lead/lag falling Transition (3, 3, 24)
2386 13:08:19.916727 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2387 13:08:19.919982 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2388 13:08:19.923872 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2389 13:08:19.930041 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2390 13:08:19.933830 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2391 13:08:19.937353 3 4 16 |201 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2392 13:08:19.943502 3 4 20 |3433 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2393 13:08:19.946856 3 4 24 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2394 13:08:19.950338 3 4 28 |3d3d 1817 |(11 11)(11 11) |(1 1)(1 1)| 0
2395 13:08:19.956973 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2396 13:08:19.960209 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2397 13:08:19.963374 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2398 13:08:19.967171 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2399 13:08:19.973884 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2400 13:08:19.977139 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2401 13:08:19.980283 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2402 13:08:19.987033 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2403 13:08:19.990172 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2404 13:08:19.993380 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2405 13:08:19.996992 [Byte 0] Lead/lag falling Transition (3, 6, 4)
2406 13:08:20.004125 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2407 13:08:20.007375 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2408 13:08:20.010301 [Byte 0] Lead/lag Transition tap number (3)
2409 13:08:20.016977 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2410 13:08:20.020474 [Byte 1] Lead/lag falling Transition (3, 6, 16)
2411 13:08:20.023766 3 6 20 |c0c 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2412 13:08:20.027187 [Byte 1] Lead/lag Transition tap number (2)
2413 13:08:20.033883 3 6 24 |4646 b0a |(0 0)(11 11) |(0 0)(0 0)| 0
2414 13:08:20.033969 [Byte 0]First pass (3, 6, 24)
2415 13:08:20.040488 3 6 28 |4646 c0c |(0 0)(11 11) |(0 0)(0 0)| 0
2416 13:08:20.043756 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2417 13:08:20.046946 [Byte 1]First pass (3, 7, 0)
2418 13:08:20.050238 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2419 13:08:20.053618 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2420 13:08:20.057037 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2421 13:08:20.060416 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2422 13:08:20.067410 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2423 13:08:20.070763 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2424 13:08:20.073875 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2425 13:08:20.077064 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2426 13:08:20.080436 All bytes gating window > 1UI, Early break!
2427 13:08:20.080532
2428 13:08:20.083704 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
2429 13:08:20.087044
2430 13:08:20.090562 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
2431 13:08:20.090663
2432 13:08:20.090763
2433 13:08:20.090857
2434 13:08:20.093667 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
2435 13:08:20.093769
2436 13:08:20.097172 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2437 13:08:20.097284
2438 13:08:20.097394
2439 13:08:20.100221 Write Rank0 MR1 =0x56
2440 13:08:20.100344
2441 13:08:20.103672 best RODT dly(2T, 0.5T) = (2, 3)
2442 13:08:20.103845
2443 13:08:20.106916 best RODT dly(2T, 0.5T) = (2, 3)
2444 13:08:20.107081 ==
2445 13:08:20.110371 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2446 13:08:20.113623 fsp= 1, odt_onoff= 1, Byte mode= 0
2447 13:08:20.113811 ==
2448 13:08:20.120605 Start DQ dly to find pass range UseTestEngine =0
2449 13:08:20.123705 x-axis: bit #, y-axis: DQ dly (-127~63)
2450 13:08:20.123922 RX Vref Scan = 0
2451 13:08:20.126992 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2452 13:08:20.130032 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2453 13:08:20.133878 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2454 13:08:20.137384 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2455 13:08:20.140313 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2456 13:08:20.140737 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2457 13:08:20.144362 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2458 13:08:20.147385 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2459 13:08:20.150480 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2460 13:08:20.153993 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2461 13:08:20.157598 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2462 13:08:20.161074 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2463 13:08:20.164049 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2464 13:08:20.167065 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2465 13:08:20.167558 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2466 13:08:20.170679 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2467 13:08:20.173692 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2468 13:08:20.177081 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2469 13:08:20.180724 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2470 13:08:20.183928 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2471 13:08:20.187295 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2472 13:08:20.187744 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2473 13:08:20.190447 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2474 13:08:20.193685 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2475 13:08:20.196946 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2476 13:08:20.200211 -1, [0] xxxoxxxx xoxxxxxo [MSB]
2477 13:08:20.203427 0, [0] xxxoxxxx ooxxxxxo [MSB]
2478 13:08:20.207309 1, [0] xxooxxxx ooxxxxxo [MSB]
2479 13:08:20.207877 2, [0] xxooxxxx ooxxxxxo [MSB]
2480 13:08:20.210030 3, [0] xxooxxxx oooxxxxo [MSB]
2481 13:08:20.213489 4, [0] oooooxxo oooxooxo [MSB]
2482 13:08:20.216688 5, [0] oooooxoo ooooooxo [MSB]
2483 13:08:20.220029 32, [0] oooooooo ooooooox [MSB]
2484 13:08:20.223291 33, [0] oooooooo ooooooox [MSB]
2485 13:08:20.223752 34, [0] oooooooo ooooooox [MSB]
2486 13:08:20.227025 35, [0] oooxoooo ooooooox [MSB]
2487 13:08:20.230249 36, [0] oooxoooo xxooooox [MSB]
2488 13:08:20.233569 37, [0] ooxxoooo xxooooox [MSB]
2489 13:08:20.236795 38, [0] ooxxoooo xxooooox [MSB]
2490 13:08:20.240128 39, [0] ooxxooox xxooooox [MSB]
2491 13:08:20.243525 40, [0] oxxxxoox xxxoooox [MSB]
2492 13:08:20.243928 41, [0] oxxxxoox xxxxxxox [MSB]
2493 13:08:20.246995 42, [0] xxxxxxxx xxxxxxxx [MSB]
2494 13:08:20.250120 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
2495 13:08:20.253507 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
2496 13:08:20.257288 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
2497 13:08:20.263502 iDelay=42, Bit 3, Center 16 (-1 ~ 34) 36
2498 13:08:20.266862 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2499 13:08:20.270182 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
2500 13:08:20.273575 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
2501 13:08:20.276959 iDelay=42, Bit 7, Center 21 (4 ~ 38) 35
2502 13:08:20.280126 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
2503 13:08:20.283714 iDelay=42, Bit 9, Center 16 (-2 ~ 35) 38
2504 13:08:20.286757 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
2505 13:08:20.289902 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
2506 13:08:20.293218 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
2507 13:08:20.296855 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
2508 13:08:20.299801 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
2509 13:08:20.306592 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
2510 13:08:20.306982 ==
2511 13:08:20.310067 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2512 13:08:20.313736 fsp= 1, odt_onoff= 1, Byte mode= 0
2513 13:08:20.314127 ==
2514 13:08:20.314429 DQS Delay:
2515 13:08:20.316876 DQS0 = 0, DQS1 = 0
2516 13:08:20.317262 DQM Delay:
2517 13:08:20.319963 DQM0 = 20, DQM1 = 19
2518 13:08:20.320349 DQ Delay:
2519 13:08:20.323445 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
2520 13:08:20.326636 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =21
2521 13:08:20.330071 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
2522 13:08:20.333423 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =14
2523 13:08:20.333811
2524 13:08:20.334112
2525 13:08:20.336700 DramC Write-DBI off
2526 13:08:20.337087 ==
2527 13:08:20.340237 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2528 13:08:20.343225 fsp= 1, odt_onoff= 1, Byte mode= 0
2529 13:08:20.343614 ==
2530 13:08:20.349758 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2531 13:08:20.350198
2532 13:08:20.350676 Begin, DQ Scan Range 920~1176
2533 13:08:20.352871
2534 13:08:20.353254
2535 13:08:20.353554 TX Vref Scan disable
2536 13:08:20.356275 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
2537 13:08:20.359631 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2538 13:08:20.362961 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2539 13:08:20.366501 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2540 13:08:20.369462 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2541 13:08:20.376509 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2542 13:08:20.379718 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2543 13:08:20.383293 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2544 13:08:20.386326 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2545 13:08:20.389681 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2546 13:08:20.393136 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2547 13:08:20.396019 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2548 13:08:20.399743 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2549 13:08:20.402949 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2550 13:08:20.406310 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2551 13:08:20.409508 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2552 13:08:20.413366 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2553 13:08:20.416928 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2554 13:08:20.419632 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2555 13:08:20.423332 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2556 13:08:20.426888 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2557 13:08:20.433266 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2558 13:08:20.436430 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2559 13:08:20.439400 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2560 13:08:20.442822 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2561 13:08:20.445704 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2562 13:08:20.449655 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2563 13:08:20.452473 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2564 13:08:20.455868 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2565 13:08:20.459658 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2566 13:08:20.462623 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2567 13:08:20.465691 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2568 13:08:20.469416 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2569 13:08:20.472446 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2570 13:08:20.476101 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2571 13:08:20.479362 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2572 13:08:20.482457 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2573 13:08:20.485871 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2574 13:08:20.492223 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2575 13:08:20.495417 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2576 13:08:20.499327 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2577 13:08:20.502098 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2578 13:08:20.505494 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2579 13:08:20.508999 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2580 13:08:20.512163 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2581 13:08:20.515473 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2582 13:08:20.519017 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2583 13:08:20.521984 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2584 13:08:20.525331 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2585 13:08:20.528570 969 |3 6 9|[0] xxxxxxxx oxxxxxxo [MSB]
2586 13:08:20.532018 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2587 13:08:20.535254 971 |3 6 11|[0] xxxxxxxx oooxxxxo [MSB]
2588 13:08:20.538614 972 |3 6 12|[0] xxxxxxxx oooooxoo [MSB]
2589 13:08:20.541835 973 |3 6 13|[0] xxxxxxxx oooooxoo [MSB]
2590 13:08:20.545265 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
2591 13:08:20.551776 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2592 13:08:20.555315 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2593 13:08:20.558483 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2594 13:08:20.561714 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2595 13:08:20.565104 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2596 13:08:20.568422 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2597 13:08:20.571908 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
2598 13:08:20.575175 982 |3 6 22|[0] xooooxoo oooooooo [MSB]
2599 13:08:20.578660 986 |3 6 26|[0] oooooooo ooooooox [MSB]
2600 13:08:20.581836 987 |3 6 27|[0] oooooooo oxooooox [MSB]
2601 13:08:20.585068 988 |3 6 28|[0] oooooooo oxooooox [MSB]
2602 13:08:20.588485 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
2603 13:08:20.591843 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
2604 13:08:20.598031 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2605 13:08:20.601545 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2606 13:08:20.604827 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2607 13:08:20.608226 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2608 13:08:20.611364 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2609 13:08:20.614800 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2610 13:08:20.618039 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2611 13:08:20.621920 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2612 13:08:20.624790 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2613 13:08:20.628069 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2614 13:08:20.631262 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2615 13:08:20.634747 1002 |3 6 42|[0] oxxxooox xxxxxxxx [MSB]
2616 13:08:20.638421 1003 |3 6 43|[0] oxxxxoxx xxxxxxxx [MSB]
2617 13:08:20.641871 1004 |3 6 44|[0] xxxxxxxx xxxxxxxx [MSB]
2618 13:08:20.644461 Byte0, DQ PI dly=991, DQM PI dly= 991
2619 13:08:20.651280 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
2620 13:08:20.651366
2621 13:08:20.654994 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
2622 13:08:20.655079
2623 13:08:20.658104 Byte1, DQ PI dly=979, DQM PI dly= 979
2624 13:08:20.664437 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2625 13:08:20.664531
2626 13:08:20.668069 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2627 13:08:20.668155
2628 13:08:20.668221 ==
2629 13:08:20.671220 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2630 13:08:20.674591 fsp= 1, odt_onoff= 1, Byte mode= 0
2631 13:08:20.678122 ==
2632 13:08:20.681588 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2633 13:08:20.681673
2634 13:08:20.684348 Begin, DQ Scan Range 955~1019
2635 13:08:20.684433 Write Rank0 MR14 =0x0
2636 13:08:20.694168
2637 13:08:20.694252 CH=1, VrefRange= 0, VrefLevel = 0
2638 13:08:20.701179 TX Bit0 (985~1000) 16 992, Bit8 (973~984) 12 978,
2639 13:08:20.704743 TX Bit1 (984~997) 14 990, Bit9 (973~983) 11 978,
2640 13:08:20.711337 TX Bit2 (983~997) 15 990, Bit10 (975~986) 12 980,
2641 13:08:20.714685 TX Bit3 (981~993) 13 987, Bit11 (976~987) 12 981,
2642 13:08:20.717420 TX Bit4 (984~998) 15 991, Bit12 (975~986) 12 980,
2643 13:08:20.724478 TX Bit5 (985~998) 14 991, Bit13 (976~987) 12 981,
2644 13:08:20.727498 TX Bit6 (984~998) 15 991, Bit14 (975~986) 12 980,
2645 13:08:20.730683 TX Bit7 (984~997) 14 990, Bit15 (970~979) 10 974,
2646 13:08:20.730768
2647 13:08:20.734123 Write Rank0 MR14 =0x2
2648 13:08:20.743587
2649 13:08:20.743671 CH=1, VrefRange= 0, VrefLevel = 2
2650 13:08:20.750397 TX Bit0 (984~1001) 18 992, Bit8 (971~984) 14 977,
2651 13:08:20.753531 TX Bit1 (984~998) 15 991, Bit9 (972~983) 12 977,
2652 13:08:20.760224 TX Bit2 (982~998) 17 990, Bit10 (974~987) 14 980,
2653 13:08:20.763545 TX Bit3 (980~994) 15 987, Bit11 (975~987) 13 981,
2654 13:08:20.766953 TX Bit4 (984~999) 16 991, Bit12 (975~987) 13 981,
2655 13:08:20.773257 TX Bit5 (985~999) 15 992, Bit13 (976~987) 12 981,
2656 13:08:20.776781 TX Bit6 (984~999) 16 991, Bit14 (975~987) 13 981,
2657 13:08:20.780397 TX Bit7 (984~998) 15 991, Bit15 (969~980) 12 974,
2658 13:08:20.780500
2659 13:08:20.783755 Write Rank0 MR14 =0x4
2660 13:08:20.792893
2661 13:08:20.792976 CH=1, VrefRange= 0, VrefLevel = 4
2662 13:08:20.799528 TX Bit0 (984~1001) 18 992, Bit8 (971~985) 15 978,
2663 13:08:20.802837 TX Bit1 (983~999) 17 991, Bit9 (971~984) 14 977,
2664 13:08:20.809464 TX Bit2 (982~998) 17 990, Bit10 (974~987) 14 980,
2665 13:08:20.813091 TX Bit3 (979~995) 17 987, Bit11 (975~988) 14 981,
2666 13:08:20.816023 TX Bit4 (983~999) 17 991, Bit12 (975~988) 14 981,
2667 13:08:20.822739 TX Bit5 (985~1000) 16 992, Bit13 (976~988) 13 982,
2668 13:08:20.825992 TX Bit6 (984~999) 16 991, Bit14 (974~987) 14 980,
2669 13:08:20.829503 TX Bit7 (984~998) 15 991, Bit15 (969~981) 13 975,
2670 13:08:20.832904
2671 13:08:20.832998 Write Rank0 MR14 =0x6
2672 13:08:20.842235
2673 13:08:20.842319 CH=1, VrefRange= 0, VrefLevel = 6
2674 13:08:20.849129 TX Bit0 (984~1001) 18 992, Bit8 (970~985) 16 977,
2675 13:08:20.852146 TX Bit1 (983~999) 17 991, Bit9 (971~984) 14 977,
2676 13:08:20.859216 TX Bit2 (981~998) 18 989, Bit10 (973~988) 16 980,
2677 13:08:20.862053 TX Bit3 (979~996) 18 987, Bit11 (975~988) 14 981,
2678 13:08:20.865587 TX Bit4 (983~1000) 18 991, Bit12 (974~989) 16 981,
2679 13:08:20.872194 TX Bit5 (985~1000) 16 992, Bit13 (975~989) 15 982,
2680 13:08:20.875784 TX Bit6 (984~999) 16 991, Bit14 (975~989) 15 982,
2681 13:08:20.879020 TX Bit7 (983~999) 17 991, Bit15 (969~983) 15 976,
2682 13:08:20.882057
2683 13:08:20.882150 Write Rank0 MR14 =0x8
2684 13:08:20.891837
2685 13:08:20.891920 CH=1, VrefRange= 0, VrefLevel = 8
2686 13:08:20.898738 TX Bit0 (984~1003) 20 993, Bit8 (971~985) 15 978,
2687 13:08:20.901856 TX Bit1 (982~999) 18 990, Bit9 (971~984) 14 977,
2688 13:08:20.908815 TX Bit2 (980~999) 20 989, Bit10 (972~989) 18 980,
2689 13:08:20.912161 TX Bit3 (979~997) 19 988, Bit11 (974~990) 17 982,
2690 13:08:20.915756 TX Bit4 (982~1000) 19 991, Bit12 (974~990) 17 982,
2691 13:08:20.922222 TX Bit5 (984~1001) 18 992, Bit13 (975~990) 16 982,
2692 13:08:20.925491 TX Bit6 (983~1000) 18 991, Bit14 (973~990) 18 981,
2693 13:08:20.928784 TX Bit7 (983~999) 17 991, Bit15 (969~983) 15 976,
2694 13:08:20.931924
2695 13:08:20.932040 Write Rank0 MR14 =0xa
2696 13:08:20.941926
2697 13:08:20.945227 CH=1, VrefRange= 0, VrefLevel = 10
2698 13:08:20.948473 TX Bit0 (984~1003) 20 993, Bit8 (970~986) 17 978,
2699 13:08:20.952049 TX Bit1 (982~1000) 19 991, Bit9 (970~985) 16 977,
2700 13:08:20.958506 TX Bit2 (980~999) 20 989, Bit10 (973~989) 17 981,
2701 13:08:20.961858 TX Bit3 (978~997) 20 987, Bit11 (974~990) 17 982,
2702 13:08:20.965435 TX Bit4 (982~1001) 20 991, Bit12 (973~991) 19 982,
2703 13:08:20.971640 TX Bit5 (984~1001) 18 992, Bit13 (975~991) 17 983,
2704 13:08:20.975133 TX Bit6 (983~1001) 19 992, Bit14 (973~991) 19 982,
2705 13:08:20.981762 TX Bit7 (982~1000) 19 991, Bit15 (968~984) 17 976,
2706 13:08:20.981845
2707 13:08:20.981927 Write Rank0 MR14 =0xc
2708 13:08:20.992177
2709 13:08:20.995335 CH=1, VrefRange= 0, VrefLevel = 12
2710 13:08:20.998424 TX Bit0 (984~1003) 20 993, Bit8 (970~986) 17 978,
2711 13:08:21.001724 TX Bit1 (982~1000) 19 991, Bit9 (970~985) 16 977,
2712 13:08:21.008618 TX Bit2 (980~999) 20 989, Bit10 (973~989) 17 981,
2713 13:08:21.011888 TX Bit3 (978~997) 20 987, Bit11 (974~990) 17 982,
2714 13:08:21.015030 TX Bit4 (982~1001) 20 991, Bit12 (973~991) 19 982,
2715 13:08:21.021929 TX Bit5 (984~1001) 18 992, Bit13 (975~991) 17 983,
2716 13:08:21.025118 TX Bit6 (983~1001) 19 992, Bit14 (973~991) 19 982,
2717 13:08:21.031632 TX Bit7 (982~1000) 19 991, Bit15 (968~984) 17 976,
2718 13:08:21.031719
2719 13:08:21.031802 Write Rank0 MR14 =0xe
2720 13:08:21.042431
2721 13:08:21.045770 CH=1, VrefRange= 0, VrefLevel = 14
2722 13:08:21.048625 TX Bit0 (983~1004) 22 993, Bit8 (970~987) 18 978,
2723 13:08:21.052430 TX Bit1 (981~1001) 21 991, Bit9 (970~986) 17 978,
2724 13:08:21.059200 TX Bit2 (979~1000) 22 989, Bit10 (972~991) 20 981,
2725 13:08:21.062863 TX Bit3 (978~998) 21 988, Bit11 (973~991) 19 982,
2726 13:08:21.065915 TX Bit4 (982~1002) 21 992, Bit12 (972~992) 21 982,
2727 13:08:21.072221 TX Bit5 (984~1002) 19 993, Bit13 (975~991) 17 983,
2728 13:08:21.075807 TX Bit6 (982~1002) 21 992, Bit14 (972~992) 21 982,
2729 13:08:21.082151 TX Bit7 (983~1001) 19 992, Bit15 (968~985) 18 976,
2730 13:08:21.082232
2731 13:08:21.082317 Write Rank0 MR14 =0x10
2732 13:08:21.093186
2733 13:08:21.096206 CH=1, VrefRange= 0, VrefLevel = 16
2734 13:08:21.099639 TX Bit0 (983~1005) 23 994, Bit8 (970~988) 19 979,
2735 13:08:21.102775 TX Bit1 (981~1001) 21 991, Bit9 (970~986) 17 978,
2736 13:08:21.109595 TX Bit2 (979~1001) 23 990, Bit10 (971~991) 21 981,
2737 13:08:21.112593 TX Bit3 (978~999) 22 988, Bit11 (974~992) 19 983,
2738 13:08:21.115978 TX Bit4 (981~1002) 22 991, Bit12 (974~992) 19 983,
2739 13:08:21.122626 TX Bit5 (984~1003) 20 993, Bit13 (974~992) 19 983,
2740 13:08:21.125886 TX Bit6 (982~1002) 21 992, Bit14 (972~992) 21 982,
2741 13:08:21.132770 TX Bit7 (982~1001) 20 991, Bit15 (967~985) 19 976,
2742 13:08:21.132848
2743 13:08:21.132930 Write Rank0 MR14 =0x12
2744 13:08:21.143355
2745 13:08:21.146657 CH=1, VrefRange= 0, VrefLevel = 18
2746 13:08:21.150252 TX Bit0 (982~1005) 24 993, Bit8 (969~988) 20 978,
2747 13:08:21.153416 TX Bit1 (980~1002) 23 991, Bit9 (970~987) 18 978,
2748 13:08:21.160338 TX Bit2 (979~1002) 24 990, Bit10 (970~991) 22 980,
2749 13:08:21.163666 TX Bit3 (978~999) 22 988, Bit11 (972~992) 21 982,
2750 13:08:21.167003 TX Bit4 (981~1003) 23 992, Bit12 (972~992) 21 982,
2751 13:08:21.173085 TX Bit5 (983~1003) 21 993, Bit13 (973~992) 20 982,
2752 13:08:21.176375 TX Bit6 (981~1003) 23 992, Bit14 (971~992) 22 981,
2753 13:08:21.183319 TX Bit7 (981~1002) 22 991, Bit15 (967~986) 20 976,
2754 13:08:21.183396
2755 13:08:21.183476 Write Rank0 MR14 =0x14
2756 13:08:21.194226
2757 13:08:21.197437 CH=1, VrefRange= 0, VrefLevel = 20
2758 13:08:21.200536 TX Bit0 (982~1006) 25 994, Bit8 (969~989) 21 979,
2759 13:08:21.203986 TX Bit1 (980~1003) 24 991, Bit9 (969~988) 20 978,
2760 13:08:21.210728 TX Bit2 (978~1002) 25 990, Bit10 (971~992) 22 981,
2761 13:08:21.214150 TX Bit3 (978~999) 22 988, Bit11 (973~992) 20 982,
2762 13:08:21.217523 TX Bit4 (980~1003) 24 991, Bit12 (971~993) 23 982,
2763 13:08:21.224183 TX Bit5 (983~1004) 22 993, Bit13 (973~992) 20 982,
2764 13:08:21.227899 TX Bit6 (981~1003) 23 992, Bit14 (971~993) 23 982,
2765 13:08:21.234123 TX Bit7 (981~1002) 22 991, Bit15 (967~986) 20 976,
2766 13:08:21.234210
2767 13:08:21.234314 Write Rank0 MR14 =0x16
2768 13:08:21.244829
2769 13:08:21.244931 CH=1, VrefRange= 0, VrefLevel = 22
2770 13:08:21.251634 TX Bit0 (982~1006) 25 994, Bit8 (969~990) 22 979,
2771 13:08:21.254652 TX Bit1 (980~1004) 25 992, Bit9 (969~988) 20 978,
2772 13:08:21.261384 TX Bit2 (978~1002) 25 990, Bit10 (970~992) 23 981,
2773 13:08:21.264651 TX Bit3 (977~1000) 24 988, Bit11 (971~992) 22 981,
2774 13:08:21.268190 TX Bit4 (980~1004) 25 992, Bit12 (971~993) 23 982,
2775 13:08:21.274852 TX Bit5 (983~1005) 23 994, Bit13 (972~993) 22 982,
2776 13:08:21.278201 TX Bit6 (981~1004) 24 992, Bit14 (970~993) 24 981,
2777 13:08:21.285199 TX Bit7 (980~1003) 24 991, Bit15 (966~986) 21 976,
2778 13:08:21.285279
2779 13:08:21.285342 Write Rank0 MR14 =0x18
2780 13:08:21.295639
2781 13:08:21.299028 CH=1, VrefRange= 0, VrefLevel = 24
2782 13:08:21.302301 TX Bit0 (981~1006) 26 993, Bit8 (969~991) 23 980,
2783 13:08:21.305551 TX Bit1 (979~1004) 26 991, Bit9 (969~989) 21 979,
2784 13:08:21.312295 TX Bit2 (978~1003) 26 990, Bit10 (970~992) 23 981,
2785 13:08:21.315550 TX Bit3 (977~1000) 24 988, Bit11 (971~993) 23 982,
2786 13:08:21.318762 TX Bit4 (979~1005) 27 992, Bit12 (971~993) 23 982,
2787 13:08:21.325969 TX Bit5 (983~1006) 24 994, Bit13 (972~993) 22 982,
2788 13:08:21.329299 TX Bit6 (980~1004) 25 992, Bit14 (970~993) 24 981,
2789 13:08:21.335515 TX Bit7 (980~1004) 25 992, Bit15 (966~987) 22 976,
2790 13:08:21.335587
2791 13:08:21.335648 Write Rank0 MR14 =0x1a
2792 13:08:21.346482
2793 13:08:21.349799 CH=1, VrefRange= 0, VrefLevel = 26
2794 13:08:21.353389 TX Bit0 (982~1006) 25 994, Bit8 (969~991) 23 980,
2795 13:08:21.356377 TX Bit1 (979~1005) 27 992, Bit9 (969~990) 22 979,
2796 13:08:21.362905 TX Bit2 (978~1004) 27 991, Bit10 (970~993) 24 981,
2797 13:08:21.366464 TX Bit3 (977~1000) 24 988, Bit11 (971~993) 23 982,
2798 13:08:21.369668 TX Bit4 (979~1006) 28 992, Bit12 (970~994) 25 982,
2799 13:08:21.376388 TX Bit5 (982~1006) 25 994, Bit13 (972~993) 22 982,
2800 13:08:21.379964 TX Bit6 (980~1005) 26 992, Bit14 (970~994) 25 982,
2801 13:08:21.386019 TX Bit7 (980~1004) 25 992, Bit15 (966~988) 23 977,
2802 13:08:21.386103
2803 13:08:21.386187 Write Rank0 MR14 =0x1c
2804 13:08:21.397241
2805 13:08:21.400555 CH=1, VrefRange= 0, VrefLevel = 28
2806 13:08:21.403822 TX Bit0 (980~1006) 27 993, Bit8 (968~991) 24 979,
2807 13:08:21.407373 TX Bit1 (979~1005) 27 992, Bit9 (969~990) 22 979,
2808 13:08:21.414121 TX Bit2 (978~1004) 27 991, Bit10 (970~993) 24 981,
2809 13:08:21.417550 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2810 13:08:21.420726 TX Bit4 (979~1006) 28 992, Bit12 (970~994) 25 982,
2811 13:08:21.427644 TX Bit5 (982~1006) 25 994, Bit13 (971~994) 24 982,
2812 13:08:21.430849 TX Bit6 (979~1005) 27 992, Bit14 (970~993) 24 981,
2813 13:08:21.437289 TX Bit7 (979~1004) 26 991, Bit15 (965~988) 24 976,
2814 13:08:21.437366
2815 13:08:21.437447 Write Rank0 MR14 =0x1e
2816 13:08:21.448260
2817 13:08:21.451826 CH=1, VrefRange= 0, VrefLevel = 30
2818 13:08:21.454958 TX Bit0 (980~1007) 28 993, Bit8 (968~992) 25 980,
2819 13:08:21.458374 TX Bit1 (979~1006) 28 992, Bit9 (968~991) 24 979,
2820 13:08:21.465074 TX Bit2 (978~1003) 26 990, Bit10 (970~993) 24 981,
2821 13:08:21.468273 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2822 13:08:21.474822 TX Bit4 (979~1006) 28 992, Bit12 (970~993) 24 981,
2823 13:08:21.478325 TX Bit5 (981~1006) 26 993, Bit13 (971~994) 24 982,
2824 13:08:21.481284 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2825 13:08:21.487792 TX Bit7 (979~1006) 28 992, Bit15 (965~987) 23 976,
2826 13:08:21.487867
2827 13:08:21.487948 Write Rank0 MR14 =0x20
2828 13:08:21.499079
2829 13:08:21.502541 CH=1, VrefRange= 0, VrefLevel = 32
2830 13:08:21.505777 TX Bit0 (980~1007) 28 993, Bit8 (968~992) 25 980,
2831 13:08:21.509586 TX Bit1 (979~1006) 28 992, Bit9 (968~991) 24 979,
2832 13:08:21.516198 TX Bit2 (978~1003) 26 990, Bit10 (970~993) 24 981,
2833 13:08:21.519463 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2834 13:08:21.522622 TX Bit4 (979~1006) 28 992, Bit12 (970~993) 24 981,
2835 13:08:21.529340 TX Bit5 (981~1006) 26 993, Bit13 (971~994) 24 982,
2836 13:08:21.532446 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2837 13:08:21.539369 TX Bit7 (979~1006) 28 992, Bit15 (965~987) 23 976,
2838 13:08:21.539445
2839 13:08:21.539530 Write Rank0 MR14 =0x22
2840 13:08:21.550477
2841 13:08:21.554093 CH=1, VrefRange= 0, VrefLevel = 34
2842 13:08:21.556940 TX Bit0 (980~1007) 28 993, Bit8 (968~992) 25 980,
2843 13:08:21.560632 TX Bit1 (979~1006) 28 992, Bit9 (968~991) 24 979,
2844 13:08:21.566970 TX Bit2 (978~1003) 26 990, Bit10 (970~993) 24 981,
2845 13:08:21.570086 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2846 13:08:21.573649 TX Bit4 (979~1006) 28 992, Bit12 (970~993) 24 981,
2847 13:08:21.579852 TX Bit5 (981~1006) 26 993, Bit13 (971~994) 24 982,
2848 13:08:21.583688 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2849 13:08:21.589939 TX Bit7 (979~1006) 28 992, Bit15 (965~987) 23 976,
2850 13:08:21.590025
2851 13:08:21.590091 Write Rank0 MR14 =0x24
2852 13:08:21.601408
2853 13:08:21.604288 CH=1, VrefRange= 0, VrefLevel = 36
2854 13:08:21.607891 TX Bit0 (980~1007) 28 993, Bit8 (968~992) 25 980,
2855 13:08:21.610725 TX Bit1 (979~1006) 28 992, Bit9 (968~991) 24 979,
2856 13:08:21.617417 TX Bit2 (978~1003) 26 990, Bit10 (970~993) 24 981,
2857 13:08:21.621142 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2858 13:08:21.627485 TX Bit4 (979~1006) 28 992, Bit12 (970~993) 24 981,
2859 13:08:21.631030 TX Bit5 (981~1006) 26 993, Bit13 (971~994) 24 982,
2860 13:08:21.634138 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2861 13:08:21.640540 TX Bit7 (979~1006) 28 992, Bit15 (965~987) 23 976,
2862 13:08:21.640630
2863 13:08:21.640698 Write Rank0 MR14 =0x26
2864 13:08:21.652072
2865 13:08:21.655411 CH=1, VrefRange= 0, VrefLevel = 38
2866 13:08:21.658811 TX Bit0 (980~1007) 28 993, Bit8 (968~992) 25 980,
2867 13:08:21.662084 TX Bit1 (979~1006) 28 992, Bit9 (968~991) 24 979,
2868 13:08:21.668701 TX Bit2 (978~1003) 26 990, Bit10 (970~993) 24 981,
2869 13:08:21.672086 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2870 13:08:21.675518 TX Bit4 (979~1006) 28 992, Bit12 (970~993) 24 981,
2871 13:08:21.681867 TX Bit5 (981~1006) 26 993, Bit13 (971~994) 24 982,
2872 13:08:21.685401 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2873 13:08:21.692060 TX Bit7 (979~1006) 28 992, Bit15 (965~987) 23 976,
2874 13:08:21.692144
2875 13:08:21.692209 Write Rank0 MR14 =0x28
2876 13:08:21.702885
2877 13:08:21.706349 CH=1, VrefRange= 0, VrefLevel = 40
2878 13:08:21.709437 TX Bit0 (980~1007) 28 993, Bit8 (968~992) 25 980,
2879 13:08:21.712731 TX Bit1 (979~1006) 28 992, Bit9 (968~991) 24 979,
2880 13:08:21.719703 TX Bit2 (978~1003) 26 990, Bit10 (970~993) 24 981,
2881 13:08:21.723015 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2882 13:08:21.726325 TX Bit4 (979~1006) 28 992, Bit12 (970~993) 24 981,
2883 13:08:21.732844 TX Bit5 (981~1006) 26 993, Bit13 (971~994) 24 982,
2884 13:08:21.736044 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2885 13:08:21.742721 TX Bit7 (979~1006) 28 992, Bit15 (965~987) 23 976,
2886 13:08:21.742806
2887 13:08:21.742873
2888 13:08:21.746053 TX Vref found, early break! 376< 389
2889 13:08:21.749314 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2890 13:08:21.752753 u1DelayCellOfst[0]=5 cells (4 PI)
2891 13:08:21.756381 u1DelayCellOfst[1]=3 cells (3 PI)
2892 13:08:21.759141 u1DelayCellOfst[2]=1 cells (1 PI)
2893 13:08:21.762932 u1DelayCellOfst[3]=0 cells (0 PI)
2894 13:08:21.766278 u1DelayCellOfst[4]=3 cells (3 PI)
2895 13:08:21.769486 u1DelayCellOfst[5]=5 cells (4 PI)
2896 13:08:21.769557 u1DelayCellOfst[6]=3 cells (3 PI)
2897 13:08:21.772773 u1DelayCellOfst[7]=3 cells (3 PI)
2898 13:08:21.776229 Byte0, DQ PI dly=989, DQM PI dly= 991
2899 13:08:21.782959 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2900 13:08:21.783029
2901 13:08:21.786251 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2902 13:08:21.786317
2903 13:08:21.789228 u1DelayCellOfst[8]=5 cells (4 PI)
2904 13:08:21.792941 u1DelayCellOfst[9]=3 cells (3 PI)
2905 13:08:21.795944 u1DelayCellOfst[10]=6 cells (5 PI)
2906 13:08:21.799252 u1DelayCellOfst[11]=7 cells (6 PI)
2907 13:08:21.803001 u1DelayCellOfst[12]=6 cells (5 PI)
2908 13:08:21.806291 u1DelayCellOfst[13]=7 cells (6 PI)
2909 13:08:21.809412 u1DelayCellOfst[14]=6 cells (5 PI)
2910 13:08:21.809487 u1DelayCellOfst[15]=0 cells (0 PI)
2911 13:08:21.812684 Byte1, DQ PI dly=976, DQM PI dly= 979
2912 13:08:21.819267 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2913 13:08:21.819341
2914 13:08:21.822883 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2915 13:08:21.822957
2916 13:08:21.825993 Write Rank0 MR14 =0x1e
2917 13:08:21.826067
2918 13:08:21.829344 Final TX Range 0 Vref 30
2919 13:08:21.829412
2920 13:08:21.836188 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2921 13:08:21.836258
2922 13:08:21.839450 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2923 13:08:21.849161 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2924 13:08:21.856257 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2925 13:08:21.856337 Write Rank0 MR3 =0xb0
2926 13:08:21.859424 DramC Write-DBI on
2927 13:08:21.859493 ==
2928 13:08:21.862557 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2929 13:08:21.865747 fsp= 1, odt_onoff= 1, Byte mode= 0
2930 13:08:21.865818 ==
2931 13:08:21.872624 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2932 13:08:21.872698
2933 13:08:21.875800 Begin, DQ Scan Range 699~763
2934 13:08:21.875871
2935 13:08:21.875932
2936 13:08:21.875989 TX Vref Scan disable
2937 13:08:21.879215 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2938 13:08:21.883009 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2939 13:08:21.886255 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2940 13:08:21.889149 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2941 13:08:21.895753 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2942 13:08:21.899092 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2943 13:08:21.902590 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2944 13:08:21.906193 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2945 13:08:21.909718 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2946 13:08:21.912626 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2947 13:08:21.916269 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2948 13:08:21.919339 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2949 13:08:21.922482 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2950 13:08:21.925794 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2951 13:08:21.929578 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2952 13:08:21.932542 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2953 13:08:21.935984 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2954 13:08:21.939559 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2955 13:08:21.942406 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2956 13:08:21.945969 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2957 13:08:21.948945 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2958 13:08:21.952356 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2959 13:08:21.955700 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2960 13:08:21.958964 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2961 13:08:21.965585 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2962 13:08:21.969044 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2963 13:08:21.972674 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2964 13:08:21.975418 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2965 13:08:21.979009 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2966 13:08:21.982540 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2967 13:08:21.985683 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2968 13:08:21.992398 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2969 13:08:21.995726 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2970 13:08:21.999018 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2971 13:08:22.002525 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2972 13:08:22.006036 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2973 13:08:22.008982 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2974 13:08:22.012341 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2975 13:08:22.015634 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2976 13:08:22.018925 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2977 13:08:22.022331 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
2978 13:08:22.025402 752 |2 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
2979 13:08:22.028964 Byte0, DQ PI dly=737, DQM PI dly= 737
2980 13:08:22.035517 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
2981 13:08:22.035602
2982 13:08:22.038986 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
2983 13:08:22.039071
2984 13:08:22.042240 Byte1, DQ PI dly=723, DQM PI dly= 723
2985 13:08:22.045787 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2986 13:08:22.045872
2987 13:08:22.052100 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2988 13:08:22.052186
2989 13:08:22.058793 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2990 13:08:22.065486 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2991 13:08:22.072045 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2992 13:08:22.072131 Write Rank0 MR3 =0x30
2993 13:08:22.075485 DramC Write-DBI off
2994 13:08:22.075568
2995 13:08:22.075634 [DATLAT]
2996 13:08:22.078465 Freq=1600, CH1 RK0, use_rxtx_scan=0
2997 13:08:22.078549
2998 13:08:22.081996 DATLAT Default: 0xf
2999 13:08:22.082081 7, 0xFFFF, sum=0
3000 13:08:22.085435 8, 0xFFFF, sum=0
3001 13:08:22.085521 9, 0xFFFF, sum=0
3002 13:08:22.088695 10, 0xFFFF, sum=0
3003 13:08:22.088780 11, 0xFFFF, sum=0
3004 13:08:22.091934 12, 0xFFFF, sum=0
3005 13:08:22.092020 13, 0xFFFF, sum=0
3006 13:08:22.095677 14, 0x0, sum=1
3007 13:08:22.095763 15, 0x0, sum=2
3008 13:08:22.095840 16, 0x0, sum=3
3009 13:08:22.098523 17, 0x0, sum=4
3010 13:08:22.102008 pattern=2 first_step=14 total pass=5 best_step=16
3011 13:08:22.102093 ==
3012 13:08:22.108711 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3013 13:08:22.111993 fsp= 1, odt_onoff= 1, Byte mode= 0
3014 13:08:22.112077 ==
3015 13:08:22.115541 Start DQ dly to find pass range UseTestEngine =1
3016 13:08:22.118591 x-axis: bit #, y-axis: DQ dly (-127~63)
3017 13:08:22.121943 RX Vref Scan = 1
3018 13:08:22.228143
3019 13:08:22.228266 RX Vref found, early break!
3020 13:08:22.228333
3021 13:08:22.234664 Final RX Vref 11, apply to both rank0 and 1
3022 13:08:22.234748 ==
3023 13:08:22.238112 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3024 13:08:22.241374 fsp= 1, odt_onoff= 1, Byte mode= 0
3025 13:08:22.241459 ==
3026 13:08:22.241524 DQS Delay:
3027 13:08:22.244804 DQS0 = 0, DQS1 = 0
3028 13:08:22.244888 DQM Delay:
3029 13:08:22.248217 DQM0 = 20, DQM1 = 19
3030 13:08:22.248301 DQ Delay:
3031 13:08:22.251158 DQ0 =21, DQ1 =22, DQ2 =18, DQ3 =16
3032 13:08:22.254241 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =21
3033 13:08:22.257967 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3034 13:08:22.260934 DQ12 =22, DQ13 =21, DQ14 =23, DQ15 =13
3035 13:08:22.261008
3036 13:08:22.261070
3037 13:08:22.261135
3038 13:08:22.264167 [DramC_TX_OE_Calibration] TA2
3039 13:08:22.267610 Original DQ_B0 (3 6) =30, OEN = 27
3040 13:08:22.271427 Original DQ_B1 (3 6) =30, OEN = 27
3041 13:08:22.274671 23, 0x0, End_B0=23 End_B1=23
3042 13:08:22.274764 24, 0x0, End_B0=24 End_B1=24
3043 13:08:22.278135 25, 0x0, End_B0=25 End_B1=25
3044 13:08:22.281145 26, 0x0, End_B0=26 End_B1=26
3045 13:08:22.284403 27, 0x0, End_B0=27 End_B1=27
3046 13:08:22.284509 28, 0x0, End_B0=28 End_B1=28
3047 13:08:22.287760 29, 0x0, End_B0=29 End_B1=29
3048 13:08:22.291198 30, 0x0, End_B0=30 End_B1=30
3049 13:08:22.294472 31, 0xFFFF, End_B0=30 End_B1=30
3050 13:08:22.300917 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3051 13:08:22.304002 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3052 13:08:22.304120
3053 13:08:22.304220
3054 13:08:22.307356 Write Rank0 MR23 =0x3f
3055 13:08:22.307478 [DQSOSC]
3056 13:08:22.317443 [DQSOSCAuto] RK0, (LSB)MR18= 0xc1c1, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
3057 13:08:22.323988 CH1_RK0: MR19=0x202, MR18=0xC1C1, DQSOSC=446, MR23=63, INC=12, DEC=18
3058 13:08:22.324102 Write Rank0 MR23 =0x3f
3059 13:08:22.324203 [DQSOSC]
3060 13:08:22.334201 [DQSOSCAuto] RK0, (LSB)MR18= 0xc1c1, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
3061 13:08:22.337638 CH1 RK0: MR19=202, MR18=C1C1
3062 13:08:22.341081 [RankSwap] Rank num 2, (Multi 1), Rank 1
3063 13:08:22.341158 Write Rank0 MR2 =0xad
3064 13:08:22.344258 [Write Leveling]
3065 13:08:22.347480 delay byte0 byte1 byte2 byte3
3066 13:08:22.347575
3067 13:08:22.347664 10 0 0
3068 13:08:22.350774 11 0 0
3069 13:08:22.350860 12 0 0
3070 13:08:22.350922 13 0 0
3071 13:08:22.354415 14 0 0
3072 13:08:22.354491 15 0 0
3073 13:08:22.357563 16 0 0
3074 13:08:22.357653 17 0 0
3075 13:08:22.357746 18 0 0
3076 13:08:22.360638 19 0 0
3077 13:08:22.360707 20 0 0
3078 13:08:22.364127 21 0 0
3079 13:08:22.364223 22 0 0
3080 13:08:22.367611 23 0 0
3081 13:08:22.367686 24 0 ff
3082 13:08:22.367750 25 0 ff
3083 13:08:22.370485 26 0 ff
3084 13:08:22.370551 27 0 ff
3085 13:08:22.373850 28 0 ff
3086 13:08:22.373951 29 0 ff
3087 13:08:22.377090 30 0 ff
3088 13:08:22.377160 31 0 ff
3089 13:08:22.380411 32 0 ff
3090 13:08:22.380502 33 0 ff
3091 13:08:22.380561 34 0 ff
3092 13:08:22.383724 35 ff ff
3093 13:08:22.383819 36 ff ff
3094 13:08:22.387223 37 ff ff
3095 13:08:22.387318 38 ff ff
3096 13:08:22.390506 39 ff ff
3097 13:08:22.390578 40 ff ff
3098 13:08:22.393635 41 ff ff
3099 13:08:22.397056 pass bytecount = 0xff (0xff: all bytes pass)
3100 13:08:22.397122
3101 13:08:22.397178 DQS0 dly: 35
3102 13:08:22.400553 DQS1 dly: 24
3103 13:08:22.400653 Write Rank0 MR2 =0x2d
3104 13:08:22.404130 [RankSwap] Rank num 2, (Multi 1), Rank 0
3105 13:08:22.407305 Write Rank1 MR1 =0xd6
3106 13:08:22.407385 [Gating]
3107 13:08:22.407449 ==
3108 13:08:22.413643 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3109 13:08:22.417174 fsp= 1, odt_onoff= 1, Byte mode= 0
3110 13:08:22.417262 ==
3111 13:08:22.420384 3 1 0 |3332 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3112 13:08:22.423710 3 1 4 |3333 2c2b |(0 0)(11 11) |(1 1)(0 0)| 0
3113 13:08:22.430586 3 1 8 |908 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3114 13:08:22.433962 3 1 12 |201 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3115 13:08:22.436964 3 1 16 |2e2d 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
3116 13:08:22.443665 3 1 20 |3535 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3117 13:08:22.447186 3 1 24 |3433 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3118 13:08:22.450603 3 1 28 |1818 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3119 13:08:22.453779 3 2 0 |1918 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3120 13:08:22.460587 3 2 4 |2322 2c2b |(1 11)(11 11) |(1 1)(1 0)| 0
3121 13:08:22.463650 3 2 8 |3c3c 2c2b |(0 0)(11 11) |(1 1)(1 0)| 0
3122 13:08:22.467017 3 2 12 |3939 201 |(11 11)(11 11) |(1 1)(0 0)| 0
3123 13:08:22.470389 [Byte 0] Lead/lag Transition tap number (1)
3124 13:08:22.476934 3 2 16 |0 c0c |(11 11)(11 11) |(0 0)(0 0)| 0
3125 13:08:22.480265 3 2 20 |1d1d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3126 13:08:22.483726 3 2 24 |3938 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3127 13:08:22.490272 3 2 28 |3939 3534 |(10 10)(11 11) |(0 0)(0 0)| 0
3128 13:08:22.493635 3 3 0 |707 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3129 13:08:22.496977 3 3 4 |1010 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3130 13:08:22.500165 3 3 8 |e0e 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3131 13:08:22.507488 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3132 13:08:22.510630 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3133 13:08:22.514041 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3134 13:08:22.520670 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3135 13:08:22.523943 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3136 13:08:22.527048 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3137 13:08:22.533700 3 4 4 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3138 13:08:22.536945 3 4 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3139 13:08:22.540515 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3140 13:08:22.547343 3 4 16 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3141 13:08:22.550581 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3142 13:08:22.553940 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3143 13:08:22.557259 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3144 13:08:22.564108 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3145 13:08:22.567108 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3146 13:08:22.570474 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3147 13:08:22.577124 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3148 13:08:22.580489 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3149 13:08:22.583615 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3150 13:08:22.590404 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3151 13:08:22.593633 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3152 13:08:22.596917 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3153 13:08:22.603680 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3154 13:08:22.607163 [Byte 0] Lead/lag Transition tap number (3)
3155 13:08:22.610432 [Byte 1] Lead/lag falling Transition (3, 6, 0)
3156 13:08:22.613744 3 6 4 |1918 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3157 13:08:22.616970 3 6 8 |4646 3d3d |(0 0)(11 11) |(0 0)(1 0)| 0
3158 13:08:22.620396 [Byte 0]First pass (3, 6, 8)
3159 13:08:22.623768 [Byte 1] Lead/lag Transition tap number (3)
3160 13:08:22.630096 3 6 12 |4646 403 |(0 0)(11 11) |(0 0)(0 0)| 0
3161 13:08:22.633351 3 6 16 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
3162 13:08:22.636803 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3163 13:08:22.640063 [Byte 1]First pass (3, 6, 20)
3164 13:08:22.643415 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3165 13:08:22.646710 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3166 13:08:22.653593 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3167 13:08:22.656686 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3168 13:08:22.659971 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3169 13:08:22.663480 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3170 13:08:22.667294 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3171 13:08:22.673622 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3172 13:08:22.676690 All bytes gating window > 1UI, Early break!
3173 13:08:22.676763
3174 13:08:22.680350 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 30)
3175 13:08:22.680447
3176 13:08:22.683552 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)
3177 13:08:22.683624
3178 13:08:22.683683
3179 13:08:22.683740
3180 13:08:22.686614 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
3181 13:08:22.686697
3182 13:08:22.693242 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
3183 13:08:22.693315
3184 13:08:22.693382
3185 13:08:22.693441 Write Rank1 MR1 =0x56
3186 13:08:22.693501
3187 13:08:22.696843 best RODT dly(2T, 0.5T) = (2, 2)
3188 13:08:22.696913
3189 13:08:22.699988 best RODT dly(2T, 0.5T) = (2, 3)
3190 13:08:22.700059 ==
3191 13:08:22.706634 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3192 13:08:22.709945 fsp= 1, odt_onoff= 1, Byte mode= 0
3193 13:08:22.710030 ==
3194 13:08:22.713287 Start DQ dly to find pass range UseTestEngine =0
3195 13:08:22.716744 x-axis: bit #, y-axis: DQ dly (-127~63)
3196 13:08:22.720096 RX Vref Scan = 0
3197 13:08:22.720183 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3198 13:08:22.723382 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3199 13:08:22.726596 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3200 13:08:22.729952 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3201 13:08:22.733277 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3202 13:08:22.736607 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3203 13:08:22.739663 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3204 13:08:22.742790 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3205 13:08:22.746424 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3206 13:08:22.746510 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3207 13:08:22.749553 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3208 13:08:22.753090 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3209 13:08:22.756245 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3210 13:08:22.759756 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3211 13:08:22.762662 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3212 13:08:22.765992 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3213 13:08:22.769256 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3214 13:08:22.772433 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3215 13:08:22.772535 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3216 13:08:22.775784 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3217 13:08:22.779520 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3218 13:08:22.782664 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3219 13:08:22.785846 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3220 13:08:22.789205 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3221 13:08:22.792386 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3222 13:08:22.792478 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3223 13:08:22.796159 0, [0] xxooxxxx ooxxxxxo [MSB]
3224 13:08:22.799212 1, [0] xxooxxxx ooxxxxxo [MSB]
3225 13:08:22.802822 2, [0] xxooxxxo ooxxxxxo [MSB]
3226 13:08:22.805610 3, [0] xxooxxxo oooxxxxo [MSB]
3227 13:08:22.808793 4, [0] xxoooxxo oooxxxxo [MSB]
3228 13:08:22.812833 32, [0] oooooooo ooooooox [MSB]
3229 13:08:22.812919 33, [0] oooooooo ooooooox [MSB]
3230 13:08:22.815592 34, [0] oooooooo ooooooox [MSB]
3231 13:08:22.819063 35, [0] oooxoooo xxooooox [MSB]
3232 13:08:22.822340 36, [0] oooxoooo xxooooox [MSB]
3233 13:08:22.825679 37, [0] ooxxoooo xxooooox [MSB]
3234 13:08:22.829238 38, [0] ooxxoooo xxooooox [MSB]
3235 13:08:22.832019 39, [0] oxxxxoox xxooooox [MSB]
3236 13:08:22.832104 40, [0] oxxxxoox xxxoooox [MSB]
3237 13:08:22.835326 41, [0] oxxxxoox xxxxxxox [MSB]
3238 13:08:22.839032 42, [0] xxxxxxxx xxxxxxxx [MSB]
3239 13:08:22.842485 iDelay=42, Bit 0, Center 23 (5 ~ 41) 37
3240 13:08:22.845475 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3241 13:08:22.848950 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3242 13:08:22.852009 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3243 13:08:22.855370 iDelay=42, Bit 4, Center 21 (4 ~ 38) 35
3244 13:08:22.862123 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3245 13:08:22.865108 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3246 13:08:22.868703 iDelay=42, Bit 7, Center 20 (2 ~ 38) 37
3247 13:08:22.872033 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
3248 13:08:22.875574 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
3249 13:08:22.878624 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3250 13:08:22.882007 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3251 13:08:22.885376 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3252 13:08:22.888719 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
3253 13:08:22.892140 iDelay=42, Bit 14, Center 23 (5 ~ 41) 37
3254 13:08:22.895035 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3255 13:08:22.895118 ==
3256 13:08:22.901760 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3257 13:08:22.905365 fsp= 1, odt_onoff= 1, Byte mode= 0
3258 13:08:22.905449 ==
3259 13:08:22.905515 DQS Delay:
3260 13:08:22.908487 DQS0 = 0, DQS1 = 0
3261 13:08:22.908563 DQM Delay:
3262 13:08:22.911804 DQM0 = 20, DQM1 = 19
3263 13:08:22.911884 DQ Delay:
3264 13:08:22.914990 DQ0 =23, DQ1 =21, DQ2 =18, DQ3 =16
3265 13:08:22.918522 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
3266 13:08:22.921995 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3267 13:08:22.925468 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =14
3268 13:08:22.925570
3269 13:08:22.925661
3270 13:08:22.925748 DramC Write-DBI off
3271 13:08:22.928728 ==
3272 13:08:22.931917 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3273 13:08:22.935353 fsp= 1, odt_onoff= 1, Byte mode= 0
3274 13:08:22.935425 ==
3275 13:08:22.938540 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3276 13:08:22.938641
3277 13:08:22.941794 Begin, DQ Scan Range 920~1176
3278 13:08:22.941876
3279 13:08:22.941938
3280 13:08:22.945550 TX Vref Scan disable
3281 13:08:22.948773 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
3282 13:08:22.952531 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3283 13:08:22.955512 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3284 13:08:22.958756 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3285 13:08:22.962346 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3286 13:08:22.965158 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3287 13:08:22.968738 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3288 13:08:22.971912 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3289 13:08:22.975553 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3290 13:08:22.978658 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3291 13:08:22.985267 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3292 13:08:22.988639 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3293 13:08:22.992332 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3294 13:08:22.995254 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3295 13:08:22.999008 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3296 13:08:23.001852 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3297 13:08:23.005549 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3298 13:08:23.008736 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3299 13:08:23.011985 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3300 13:08:23.015379 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3301 13:08:23.018677 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3302 13:08:23.021892 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3303 13:08:23.025093 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3304 13:08:23.028451 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3305 13:08:23.031719 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3306 13:08:23.038323 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3307 13:08:23.041515 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3308 13:08:23.045111 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3309 13:08:23.048244 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3310 13:08:23.051724 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3311 13:08:23.055583 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3312 13:08:23.058357 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3313 13:08:23.061687 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3314 13:08:23.064929 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3315 13:08:23.068198 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3316 13:08:23.071556 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3317 13:08:23.074861 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3318 13:08:23.078255 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3319 13:08:23.081444 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3320 13:08:23.084576 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3321 13:08:23.088379 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3322 13:08:23.091778 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3323 13:08:23.098110 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3324 13:08:23.101868 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3325 13:08:23.104801 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3326 13:08:23.107889 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3327 13:08:23.111212 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3328 13:08:23.114958 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3329 13:08:23.117734 968 |3 6 8|[0] xxxxxxxx ooxxxxxo [MSB]
3330 13:08:23.121109 969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]
3331 13:08:23.124635 970 |3 6 10|[0] xxxxxxxx oooooxoo [MSB]
3332 13:08:23.128080 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3333 13:08:23.131675 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3334 13:08:23.134736 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3335 13:08:23.138190 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3336 13:08:23.141449 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3337 13:08:23.144451 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3338 13:08:23.147975 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3339 13:08:23.150916 978 |3 6 18|[0] xxooxxxx oooooooo [MSB]
3340 13:08:23.154717 979 |3 6 19|[0] xooooxox oooooooo [MSB]
3341 13:08:23.161256 980 |3 6 20|[0] xooooxox oooooooo [MSB]
3342 13:08:23.164434 985 |3 6 25|[0] oooooooo ooooooox [MSB]
3343 13:08:23.167667 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3344 13:08:23.171229 987 |3 6 27|[0] oooooooo oxooooox [MSB]
3345 13:08:23.174564 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
3346 13:08:23.177960 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
3347 13:08:23.181184 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3348 13:08:23.184629 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3349 13:08:23.187815 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3350 13:08:23.190968 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3351 13:08:23.194572 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3352 13:08:23.197841 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3353 13:08:23.201302 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3354 13:08:23.204293 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3355 13:08:23.211507 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3356 13:08:23.214637 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3357 13:08:23.217549 1000 |3 6 40|[0] ooxxooox xxxxxxxx [MSB]
3358 13:08:23.220898 1001 |3 6 41|[0] ooxxooox xxxxxxxx [MSB]
3359 13:08:23.224390 1002 |3 6 42|[0] oxxxxoxx xxxxxxxx [MSB]
3360 13:08:23.227541 1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
3361 13:08:23.230985 Byte0, DQ PI dly=989, DQM PI dly= 989
3362 13:08:23.234260 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3363 13:08:23.234345
3364 13:08:23.240839 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3365 13:08:23.240964
3366 13:08:23.244374 Byte1, DQ PI dly=977, DQM PI dly= 977
3367 13:08:23.247617 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3368 13:08:23.247753
3369 13:08:23.250950 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3370 13:08:23.251105
3371 13:08:23.254523 ==
3372 13:08:23.257472 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3373 13:08:23.260736 fsp= 1, odt_onoff= 1, Byte mode= 0
3374 13:08:23.260811 ==
3375 13:08:23.264467 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3376 13:08:23.264543
3377 13:08:23.267761 Begin, DQ Scan Range 953~1017
3378 13:08:23.270706 Write Rank1 MR14 =0x0
3379 13:08:23.279252
3380 13:08:23.279348 CH=1, VrefRange= 0, VrefLevel = 0
3381 13:08:23.285991 TX Bit0 (984~998) 15 991, Bit8 (970~984) 15 977,
3382 13:08:23.289202 TX Bit1 (982~997) 16 989, Bit9 (970~984) 15 977,
3383 13:08:23.295868 TX Bit2 (979~994) 16 986, Bit10 (974~985) 12 979,
3384 13:08:23.299082 TX Bit3 (978~991) 14 984, Bit11 (974~986) 13 980,
3385 13:08:23.302605 TX Bit4 (982~997) 16 989, Bit12 (975~984) 10 979,
3386 13:08:23.308931 TX Bit5 (983~998) 16 990, Bit13 (974~986) 13 980,
3387 13:08:23.312259 TX Bit6 (983~998) 16 990, Bit14 (974~984) 11 979,
3388 13:08:23.315700 TX Bit7 (984~995) 12 989, Bit15 (968~978) 11 973,
3389 13:08:23.315781
3390 13:08:23.319091 Write Rank1 MR14 =0x2
3391 13:08:23.328153
3392 13:08:23.328237 CH=1, VrefRange= 0, VrefLevel = 2
3393 13:08:23.334542 TX Bit0 (983~998) 16 990, Bit8 (970~984) 15 977,
3394 13:08:23.338185 TX Bit1 (982~998) 17 990, Bit9 (970~984) 15 977,
3395 13:08:23.344405 TX Bit2 (980~995) 16 987, Bit10 (973~985) 13 979,
3396 13:08:23.347796 TX Bit3 (978~992) 15 985, Bit11 (974~986) 13 980,
3397 13:08:23.351211 TX Bit4 (981~997) 17 989, Bit12 (974~985) 12 979,
3398 13:08:23.357812 TX Bit5 (983~998) 16 990, Bit13 (974~987) 14 980,
3399 13:08:23.361196 TX Bit6 (983~998) 16 990, Bit14 (975~985) 11 980,
3400 13:08:23.364338 TX Bit7 (984~996) 13 990, Bit15 (968~978) 11 973,
3401 13:08:23.367620
3402 13:08:23.367705 Write Rank1 MR14 =0x4
3403 13:08:23.377384
3404 13:08:23.377469 CH=1, VrefRange= 0, VrefLevel = 4
3405 13:08:23.384236 TX Bit0 (983~999) 17 991, Bit8 (969~984) 16 976,
3406 13:08:23.387782 TX Bit1 (981~998) 18 989, Bit9 (970~984) 15 977,
3407 13:08:23.394253 TX Bit2 (979~997) 19 988, Bit10 (972~985) 14 978,
3408 13:08:23.397376 TX Bit3 (978~992) 15 985, Bit11 (973~987) 15 980,
3409 13:08:23.400708 TX Bit4 (981~998) 18 989, Bit12 (973~985) 13 979,
3410 13:08:23.407349 TX Bit5 (983~999) 17 991, Bit13 (973~988) 16 980,
3411 13:08:23.410683 TX Bit6 (982~998) 17 990, Bit14 (973~985) 13 979,
3412 13:08:23.414209 TX Bit7 (983~997) 15 990, Bit15 (967~979) 13 973,
3413 13:08:23.414294
3414 13:08:23.417193 Write Rank1 MR14 =0x6
3415 13:08:23.426590
3416 13:08:23.426675 CH=1, VrefRange= 0, VrefLevel = 6
3417 13:08:23.433533 TX Bit0 (982~1000) 19 991, Bit8 (969~985) 17 977,
3418 13:08:23.436831 TX Bit1 (981~998) 18 989, Bit9 (970~984) 15 977,
3419 13:08:23.443542 TX Bit2 (979~997) 19 988, Bit10 (972~986) 15 979,
3420 13:08:23.446911 TX Bit3 (978~993) 16 985, Bit11 (973~988) 16 980,
3421 13:08:23.449847 TX Bit4 (980~998) 19 989, Bit12 (973~986) 14 979,
3422 13:08:23.456402 TX Bit5 (982~1000) 19 991, Bit13 (973~989) 17 981,
3423 13:08:23.460205 TX Bit6 (981~999) 19 990, Bit14 (972~986) 15 979,
3424 13:08:23.463054 TX Bit7 (983~997) 15 990, Bit15 (967~981) 15 974,
3425 13:08:23.466879
3426 13:08:23.466963 Write Rank1 MR14 =0x8
3427 13:08:23.476495
3428 13:08:23.476580 CH=1, VrefRange= 0, VrefLevel = 8
3429 13:08:23.483134 TX Bit0 (982~1000) 19 991, Bit8 (969~985) 17 977,
3430 13:08:23.486506 TX Bit1 (980~999) 20 989, Bit9 (969~985) 17 977,
3431 13:08:23.493142 TX Bit2 (979~998) 20 988, Bit10 (972~987) 16 979,
3432 13:08:23.496850 TX Bit3 (977~994) 18 985, Bit11 (972~988) 17 980,
3433 13:08:23.499775 TX Bit4 (980~999) 20 989, Bit12 (972~987) 16 979,
3434 13:08:23.506664 TX Bit5 (982~1000) 19 991, Bit13 (972~989) 18 980,
3435 13:08:23.509570 TX Bit6 (980~999) 20 989, Bit14 (971~987) 17 979,
3436 13:08:23.513306 TX Bit7 (983~998) 16 990, Bit15 (967~981) 15 974,
3437 13:08:23.513393
3438 13:08:23.516319 Write Rank1 MR14 =0xa
3439 13:08:23.526061
3440 13:08:23.529505 CH=1, VrefRange= 0, VrefLevel = 10
3441 13:08:23.532978 TX Bit0 (981~1001) 21 991, Bit8 (969~986) 18 977,
3442 13:08:23.536343 TX Bit1 (980~999) 20 989, Bit9 (969~985) 17 977,
3443 13:08:23.542983 TX Bit2 (978~998) 21 988, Bit10 (971~987) 17 979,
3444 13:08:23.546070 TX Bit3 (977~995) 19 986, Bit11 (971~989) 19 980,
3445 13:08:23.549312 TX Bit4 (980~999) 20 989, Bit12 (972~988) 17 980,
3446 13:08:23.555942 TX Bit5 (981~1001) 21 991, Bit13 (973~990) 18 981,
3447 13:08:23.559929 TX Bit6 (980~1000) 21 990, Bit14 (972~987) 16 979,
3448 13:08:23.565879 TX Bit7 (982~998) 17 990, Bit15 (967~983) 17 975,
3449 13:08:23.565966
3450 13:08:23.566052 Write Rank1 MR14 =0xc
3451 13:08:23.576224
3452 13:08:23.579486 CH=1, VrefRange= 0, VrefLevel = 12
3453 13:08:23.582811 TX Bit0 (981~1001) 21 991, Bit8 (969~986) 18 977,
3454 13:08:23.585789 TX Bit1 (980~1000) 21 990, Bit9 (969~985) 17 977,
3455 13:08:23.592709 TX Bit2 (978~998) 21 988, Bit10 (970~988) 19 979,
3456 13:08:23.596063 TX Bit3 (977~996) 20 986, Bit11 (971~990) 20 980,
3457 13:08:23.599291 TX Bit4 (979~1000) 22 989, Bit12 (972~989) 18 980,
3458 13:08:23.606013 TX Bit5 (981~1001) 21 991, Bit13 (971~990) 20 980,
3459 13:08:23.609668 TX Bit6 (980~1000) 21 990, Bit14 (970~988) 19 979,
3460 13:08:23.615795 TX Bit7 (982~999) 18 990, Bit15 (966~983) 18 974,
3461 13:08:23.615880
3462 13:08:23.615947 Write Rank1 MR14 =0xe
3463 13:08:23.626298
3464 13:08:23.629474 CH=1, VrefRange= 0, VrefLevel = 14
3465 13:08:23.633364 TX Bit0 (981~1002) 22 991, Bit8 (969~986) 18 977,
3466 13:08:23.636412 TX Bit1 (979~1000) 22 989, Bit9 (969~986) 18 977,
3467 13:08:23.643119 TX Bit2 (978~999) 22 988, Bit10 (971~989) 19 980,
3468 13:08:23.646486 TX Bit3 (977~997) 21 987, Bit11 (971~991) 21 981,
3469 13:08:23.649418 TX Bit4 (979~1000) 22 989, Bit12 (971~990) 20 980,
3470 13:08:23.656330 TX Bit5 (981~1001) 21 991, Bit13 (972~991) 20 981,
3471 13:08:23.659520 TX Bit6 (980~1000) 21 990, Bit14 (970~989) 20 979,
3472 13:08:23.666061 TX Bit7 (982~999) 18 990, Bit15 (966~984) 19 975,
3473 13:08:23.666173
3474 13:08:23.666269 Write Rank1 MR14 =0x10
3475 13:08:23.676469
3476 13:08:23.679849 CH=1, VrefRange= 0, VrefLevel = 16
3477 13:08:23.683224 TX Bit0 (981~1002) 22 991, Bit8 (968~987) 20 977,
3478 13:08:23.686541 TX Bit1 (980~1001) 22 990, Bit9 (968~986) 19 977,
3479 13:08:23.693194 TX Bit2 (978~999) 22 988, Bit10 (970~989) 20 979,
3480 13:08:23.696386 TX Bit3 (977~997) 21 987, Bit11 (970~991) 22 980,
3481 13:08:23.700340 TX Bit4 (979~1000) 22 989, Bit12 (970~990) 21 980,
3482 13:08:23.706518 TX Bit5 (981~1002) 22 991, Bit13 (971~991) 21 981,
3483 13:08:23.710460 TX Bit6 (980~1001) 22 990, Bit14 (970~989) 20 979,
3484 13:08:23.716373 TX Bit7 (981~1000) 20 990, Bit15 (966~984) 19 975,
3485 13:08:23.716465
3486 13:08:23.716533 Write Rank1 MR14 =0x12
3487 13:08:23.727004
3488 13:08:23.730504 CH=1, VrefRange= 0, VrefLevel = 18
3489 13:08:23.733952 TX Bit0 (980~1003) 24 991, Bit8 (968~987) 20 977,
3490 13:08:23.737394 TX Bit1 (979~1001) 23 990, Bit9 (968~987) 20 977,
3491 13:08:23.743795 TX Bit2 (978~999) 22 988, Bit10 (970~990) 21 980,
3492 13:08:23.747152 TX Bit3 (976~998) 23 987, Bit11 (970~991) 22 980,
3493 13:08:23.750471 TX Bit4 (978~1001) 24 989, Bit12 (970~990) 21 980,
3494 13:08:23.757032 TX Bit5 (980~1003) 24 991, Bit13 (971~992) 22 981,
3495 13:08:23.760386 TX Bit6 (980~1002) 23 991, Bit14 (970~990) 21 980,
3496 13:08:23.766908 TX Bit7 (980~1000) 21 990, Bit15 (965~984) 20 974,
3497 13:08:23.766994
3498 13:08:23.767059 Write Rank1 MR14 =0x14
3499 13:08:23.777987
3500 13:08:23.781168 CH=1, VrefRange= 0, VrefLevel = 20
3501 13:08:23.784310 TX Bit0 (980~1003) 24 991, Bit8 (968~988) 21 978,
3502 13:08:23.787797 TX Bit1 (978~1002) 25 990, Bit9 (968~988) 21 978,
3503 13:08:23.794358 TX Bit2 (978~1000) 23 989, Bit10 (970~991) 22 980,
3504 13:08:23.797612 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3505 13:08:23.800827 TX Bit4 (978~1001) 24 989, Bit12 (970~991) 22 980,
3506 13:08:23.807530 TX Bit5 (980~1003) 24 991, Bit13 (970~992) 23 981,
3507 13:08:23.810988 TX Bit6 (979~1002) 24 990, Bit14 (970~991) 22 980,
3508 13:08:23.817821 TX Bit7 (980~1001) 22 990, Bit15 (965~985) 21 975,
3509 13:08:23.817907
3510 13:08:23.817973 Write Rank1 MR14 =0x16
3511 13:08:23.828896
3512 13:08:23.832023 CH=1, VrefRange= 0, VrefLevel = 22
3513 13:08:23.835374 TX Bit0 (979~1005) 27 992, Bit8 (968~989) 22 978,
3514 13:08:23.838618 TX Bit1 (979~1002) 24 990, Bit9 (968~989) 22 978,
3515 13:08:23.845159 TX Bit2 (978~1000) 23 989, Bit10 (969~991) 23 980,
3516 13:08:23.848662 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3517 13:08:23.851913 TX Bit4 (978~1002) 25 990, Bit12 (970~991) 22 980,
3518 13:08:23.858675 TX Bit5 (979~1004) 26 991, Bit13 (970~992) 23 981,
3519 13:08:23.862209 TX Bit6 (979~1003) 25 991, Bit14 (970~991) 22 980,
3520 13:08:23.868387 TX Bit7 (979~1001) 23 990, Bit15 (964~985) 22 974,
3521 13:08:23.868484
3522 13:08:23.868551 Write Rank1 MR14 =0x18
3523 13:08:23.880130
3524 13:08:23.883016 CH=1, VrefRange= 0, VrefLevel = 24
3525 13:08:23.886069 TX Bit0 (979~1005) 27 992, Bit8 (967~990) 24 978,
3526 13:08:23.889495 TX Bit1 (978~1003) 26 990, Bit9 (967~988) 22 977,
3527 13:08:23.895894 TX Bit2 (977~1000) 24 988, Bit10 (969~991) 23 980,
3528 13:08:23.899443 TX Bit3 (976~999) 24 987, Bit11 (969~992) 24 980,
3529 13:08:23.902496 TX Bit4 (978~1002) 25 990, Bit12 (970~992) 23 981,
3530 13:08:23.909174 TX Bit5 (979~1004) 26 991, Bit13 (970~992) 23 981,
3531 13:08:23.912407 TX Bit6 (978~1003) 26 990, Bit14 (970~991) 22 980,
3532 13:08:23.919256 TX Bit7 (980~1001) 22 990, Bit15 (964~986) 23 975,
3533 13:08:23.919342
3534 13:08:23.919408 Write Rank1 MR14 =0x1a
3535 13:08:23.930836
3536 13:08:23.930920 CH=1, VrefRange= 0, VrefLevel = 26
3537 13:08:23.937564 TX Bit0 (979~1005) 27 992, Bit8 (967~990) 24 978,
3538 13:08:23.941154 TX Bit1 (978~1003) 26 990, Bit9 (968~989) 22 978,
3539 13:08:23.947478 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3540 13:08:23.950883 TX Bit3 (975~999) 25 987, Bit11 (969~992) 24 980,
3541 13:08:23.954266 TX Bit4 (978~1003) 26 990, Bit12 (970~992) 23 981,
3542 13:08:23.960566 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3543 13:08:23.963959 TX Bit6 (978~1003) 26 990, Bit14 (969~992) 24 980,
3544 13:08:23.970371 TX Bit7 (979~1002) 24 990, Bit15 (964~986) 23 975,
3545 13:08:23.970457
3546 13:08:23.970523 Write Rank1 MR14 =0x1c
3547 13:08:23.981843
3548 13:08:23.985135 CH=1, VrefRange= 0, VrefLevel = 28
3549 13:08:23.988508 TX Bit0 (979~1005) 27 992, Bit8 (967~990) 24 978,
3550 13:08:23.991732 TX Bit1 (978~1004) 27 991, Bit9 (967~990) 24 978,
3551 13:08:23.998129 TX Bit2 (977~1002) 26 989, Bit10 (969~992) 24 980,
3552 13:08:24.001604 TX Bit3 (976~999) 24 987, Bit11 (969~993) 25 981,
3553 13:08:24.004826 TX Bit4 (978~1004) 27 991, Bit12 (970~992) 23 981,
3554 13:08:24.011672 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3555 13:08:24.014705 TX Bit6 (978~1004) 27 991, Bit14 (969~992) 24 980,
3556 13:08:24.021385 TX Bit7 (979~1003) 25 991, Bit15 (963~987) 25 975,
3557 13:08:24.021470
3558 13:08:24.021536 Write Rank1 MR14 =0x1e
3559 13:08:24.032578
3560 13:08:24.035772 CH=1, VrefRange= 0, VrefLevel = 30
3561 13:08:24.039089 TX Bit0 (979~1005) 27 992, Bit8 (966~990) 25 978,
3562 13:08:24.042623 TX Bit1 (978~1004) 27 991, Bit9 (966~990) 25 978,
3563 13:08:24.049064 TX Bit2 (977~1002) 26 989, Bit10 (968~992) 25 980,
3564 13:08:24.052428 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3565 13:08:24.056137 TX Bit4 (978~1004) 27 991, Bit12 (969~992) 24 980,
3566 13:08:24.062454 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3567 13:08:24.065799 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3568 13:08:24.072834 TX Bit7 (979~1003) 25 991, Bit15 (963~987) 25 975,
3569 13:08:24.072956
3570 13:08:24.073025 Write Rank1 MR14 =0x20
3571 13:08:24.083778
3572 13:08:24.083889 CH=1, VrefRange= 0, VrefLevel = 32
3573 13:08:24.090415 TX Bit0 (979~1005) 27 992, Bit8 (966~990) 25 978,
3574 13:08:24.093633 TX Bit1 (978~1004) 27 991, Bit9 (966~990) 25 978,
3575 13:08:24.100832 TX Bit2 (977~1002) 26 989, Bit10 (968~992) 25 980,
3576 13:08:24.103858 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3577 13:08:24.106871 TX Bit4 (978~1004) 27 991, Bit12 (969~992) 24 980,
3578 13:08:24.113927 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3579 13:08:24.116891 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3580 13:08:24.123373 TX Bit7 (979~1003) 25 991, Bit15 (963~987) 25 975,
3581 13:08:24.123459
3582 13:08:24.123524 Write Rank1 MR14 =0x22
3583 13:08:24.135036
3584 13:08:24.138215 CH=1, VrefRange= 0, VrefLevel = 34
3585 13:08:24.141671 TX Bit0 (979~1005) 27 992, Bit8 (966~990) 25 978,
3586 13:08:24.144843 TX Bit1 (978~1004) 27 991, Bit9 (966~990) 25 978,
3587 13:08:24.151568 TX Bit2 (977~1002) 26 989, Bit10 (968~992) 25 980,
3588 13:08:24.155023 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3589 13:08:24.158226 TX Bit4 (978~1004) 27 991, Bit12 (969~992) 24 980,
3590 13:08:24.164835 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3591 13:08:24.168092 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3592 13:08:24.175054 TX Bit7 (979~1003) 25 991, Bit15 (963~987) 25 975,
3593 13:08:24.175140
3594 13:08:24.175205 Write Rank1 MR14 =0x24
3595 13:08:24.185718
3596 13:08:24.189075 CH=1, VrefRange= 0, VrefLevel = 36
3597 13:08:24.192600 TX Bit0 (979~1005) 27 992, Bit8 (966~990) 25 978,
3598 13:08:24.195960 TX Bit1 (978~1004) 27 991, Bit9 (966~990) 25 978,
3599 13:08:24.202271 TX Bit2 (977~1002) 26 989, Bit10 (968~992) 25 980,
3600 13:08:24.205595 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3601 13:08:24.209197 TX Bit4 (978~1004) 27 991, Bit12 (969~992) 24 980,
3602 13:08:24.216145 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3603 13:08:24.219379 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3604 13:08:24.225507 TX Bit7 (979~1003) 25 991, Bit15 (963~987) 25 975,
3605 13:08:24.225592
3606 13:08:24.225658 Write Rank1 MR14 =0x26
3607 13:08:24.236897
3608 13:08:24.240081 CH=1, VrefRange= 0, VrefLevel = 38
3609 13:08:24.243388 TX Bit0 (979~1005) 27 992, Bit8 (966~990) 25 978,
3610 13:08:24.246980 TX Bit1 (978~1004) 27 991, Bit9 (966~990) 25 978,
3611 13:08:24.253450 TX Bit2 (977~1002) 26 989, Bit10 (968~992) 25 980,
3612 13:08:24.256703 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3613 13:08:24.260427 TX Bit4 (978~1004) 27 991, Bit12 (969~992) 24 980,
3614 13:08:24.266383 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3615 13:08:24.269679 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3616 13:08:24.276734 TX Bit7 (979~1003) 25 991, Bit15 (963~987) 25 975,
3617 13:08:24.276819
3618 13:08:24.276884
3619 13:08:24.279960 TX Vref found, early break! 385< 388
3620 13:08:24.283089 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3621 13:08:24.286478 u1DelayCellOfst[0]=6 cells (5 PI)
3622 13:08:24.289755 u1DelayCellOfst[1]=5 cells (4 PI)
3623 13:08:24.293171 u1DelayCellOfst[2]=2 cells (2 PI)
3624 13:08:24.296794 u1DelayCellOfst[3]=0 cells (0 PI)
3625 13:08:24.299793 u1DelayCellOfst[4]=5 cells (4 PI)
3626 13:08:24.303556 u1DelayCellOfst[5]=6 cells (5 PI)
3627 13:08:24.306669 u1DelayCellOfst[6]=5 cells (4 PI)
3628 13:08:24.306754 u1DelayCellOfst[7]=5 cells (4 PI)
3629 13:08:24.310104 Byte0, DQ PI dly=987, DQM PI dly= 989
3630 13:08:24.316873 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
3631 13:08:24.316963
3632 13:08:24.320128 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
3633 13:08:24.320213
3634 13:08:24.323562 u1DelayCellOfst[8]=3 cells (3 PI)
3635 13:08:24.326669 u1DelayCellOfst[9]=3 cells (3 PI)
3636 13:08:24.330252 u1DelayCellOfst[10]=6 cells (5 PI)
3637 13:08:24.333564 u1DelayCellOfst[11]=7 cells (6 PI)
3638 13:08:24.336847 u1DelayCellOfst[12]=6 cells (5 PI)
3639 13:08:24.339845 u1DelayCellOfst[13]=7 cells (6 PI)
3640 13:08:24.343209 u1DelayCellOfst[14]=6 cells (5 PI)
3641 13:08:24.343295 u1DelayCellOfst[15]=0 cells (0 PI)
3642 13:08:24.346769 Byte1, DQ PI dly=975, DQM PI dly= 978
3643 13:08:24.353256 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
3644 13:08:24.353342
3645 13:08:24.356475 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
3646 13:08:24.356563
3647 13:08:24.360374 Write Rank1 MR14 =0x1e
3648 13:08:24.360468
3649 13:08:24.360554 Final TX Range 0 Vref 30
3650 13:08:24.363692
3651 13:08:24.367071 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3652 13:08:24.370072
3653 13:08:24.373840 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3654 13:08:24.383477 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3655 13:08:24.390132 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3656 13:08:24.390220 Write Rank1 MR3 =0xb0
3657 13:08:24.393545 DramC Write-DBI on
3658 13:08:24.393632 ==
3659 13:08:24.396736 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3660 13:08:24.400228 fsp= 1, odt_onoff= 1, Byte mode= 0
3661 13:08:24.400340 ==
3662 13:08:24.406809 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3663 13:08:24.406897
3664 13:08:24.406983 Begin, DQ Scan Range 698~762
3665 13:08:24.407084
3666 13:08:24.410139
3667 13:08:24.410241 TX Vref Scan disable
3668 13:08:24.413455 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3669 13:08:24.416776 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3670 13:08:24.420012 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3671 13:08:24.423863 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3672 13:08:24.426960 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3673 13:08:24.433383 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3674 13:08:24.436593 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3675 13:08:24.440087 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3676 13:08:24.443393 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3677 13:08:24.446675 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3678 13:08:24.450242 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3679 13:08:24.453599 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3680 13:08:24.457190 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3681 13:08:24.460114 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3682 13:08:24.463340 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3683 13:08:24.466838 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3684 13:08:24.470224 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3685 13:08:24.473596 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3686 13:08:24.477154 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3687 13:08:24.480283 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3688 13:08:24.483408 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3689 13:08:24.486512 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3690 13:08:24.489860 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3691 13:08:24.493195 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3692 13:08:24.502155 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3693 13:08:24.505297 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3694 13:08:24.508460 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3695 13:08:24.512077 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3696 13:08:24.515227 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3697 13:08:24.518731 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3698 13:08:24.522139 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3699 13:08:24.525552 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3700 13:08:24.528578 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3701 13:08:24.531904 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3702 13:08:24.535146 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3703 13:08:24.538512 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3704 13:08:24.542038 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3705 13:08:24.545467 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3706 13:08:24.548586 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3707 13:08:24.554912 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3708 13:08:24.558637 Byte0, DQ PI dly=736, DQM PI dly= 736
3709 13:08:24.561883 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
3710 13:08:24.561971
3711 13:08:24.564943 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
3712 13:08:24.565030
3713 13:08:24.568451 Byte1, DQ PI dly=723, DQM PI dly= 723
3714 13:08:24.574885 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3715 13:08:24.574972
3716 13:08:24.578589 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3717 13:08:24.578676
3718 13:08:24.584818 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3719 13:08:24.591465 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3720 13:08:24.598337 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3721 13:08:24.601827 Write Rank1 MR3 =0x30
3722 13:08:24.601912 DramC Write-DBI off
3723 13:08:24.601978
3724 13:08:24.605233 [DATLAT]
3725 13:08:24.605319 Freq=1600, CH1 RK1, use_rxtx_scan=0
3726 13:08:24.608372
3727 13:08:24.608460 DATLAT Default: 0x10
3728 13:08:24.611520 7, 0xFFFF, sum=0
3729 13:08:24.611606 8, 0xFFFF, sum=0
3730 13:08:24.611673 9, 0xFFFF, sum=0
3731 13:08:24.614899 10, 0xFFFF, sum=0
3732 13:08:24.614985 11, 0xFFFF, sum=0
3733 13:08:24.618128 12, 0xFFFF, sum=0
3734 13:08:24.618214 13, 0xFFFF, sum=0
3735 13:08:24.621966 14, 0x0, sum=1
3736 13:08:24.622052 15, 0x0, sum=2
3737 13:08:24.624882 16, 0x0, sum=3
3738 13:08:24.624968 17, 0x0, sum=4
3739 13:08:24.628313 pattern=2 first_step=14 total pass=5 best_step=16
3740 13:08:24.631466 ==
3741 13:08:24.635125 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3742 13:08:24.638512 fsp= 1, odt_onoff= 1, Byte mode= 0
3743 13:08:24.638596 ==
3744 13:08:24.641762 Start DQ dly to find pass range UseTestEngine =1
3745 13:08:24.645197 x-axis: bit #, y-axis: DQ dly (-127~63)
3746 13:08:24.648133 RX Vref Scan = 0
3747 13:08:24.651216 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3748 13:08:24.654884 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3749 13:08:24.658514 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3750 13:08:24.658603 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3751 13:08:24.661704 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3752 13:08:24.664978 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3753 13:08:24.668050 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3754 13:08:24.671179 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3755 13:08:24.674726 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3756 13:08:24.678134 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3757 13:08:24.681189 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3758 13:08:24.684638 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3759 13:08:24.684727 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3760 13:08:24.687790 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3761 13:08:24.691162 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3762 13:08:24.694453 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3763 13:08:24.697778 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3764 13:08:24.701129 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3765 13:08:24.704580 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3766 13:08:24.707573 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3767 13:08:24.707662 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3768 13:08:24.710996 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3769 13:08:24.714279 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3770 13:08:24.717709 -3, [0] xxxoxxxx xxxxxxxo [MSB]
3771 13:08:24.721042 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3772 13:08:24.724161 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3773 13:08:24.727723 0, [0] xxooxxxx xoxxxxxo [MSB]
3774 13:08:24.727813 1, [0] xxooxxxx ooxxxxxo [MSB]
3775 13:08:24.730702 2, [0] xxooxxxx ooxxxxxo [MSB]
3776 13:08:24.734216 3, [0] oxooxxxo oooxxxxo [MSB]
3777 13:08:24.737729 4, [0] oooooxxo oooooxxo [MSB]
3778 13:08:24.740943 32, [0] oooooooo ooooooox [MSB]
3779 13:08:24.744436 33, [0] oooooooo ooooooox [MSB]
3780 13:08:24.747489 34, [0] oooooooo ooooooox [MSB]
3781 13:08:24.750711 35, [0] oooxoooo oxooooox [MSB]
3782 13:08:24.754028 36, [0] oooxoooo xxooooox [MSB]
3783 13:08:24.758055 37, [0] ooxxoooo xxooooox [MSB]
3784 13:08:24.758145 38, [0] ooxxoooo xxooooox [MSB]
3785 13:08:24.760924 39, [0] ooxxooox xxooooox [MSB]
3786 13:08:24.764573 40, [0] oxxxxoox xxxooxox [MSB]
3787 13:08:24.767366 41, [0] xxxxxxox xxxxxxxx [MSB]
3788 13:08:24.771016 42, [0] xxxxxxxx xxxxxxxx [MSB]
3789 13:08:24.774079 iDelay=42, Bit 0, Center 21 (3 ~ 40) 38
3790 13:08:24.777792 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
3791 13:08:24.781176 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3792 13:08:24.784323 iDelay=42, Bit 3, Center 15 (-3 ~ 34) 38
3793 13:08:24.787555 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3794 13:08:24.790842 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3795 13:08:24.794236 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3796 13:08:24.797570 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3797 13:08:24.800817 iDelay=42, Bit 8, Center 18 (1 ~ 35) 35
3798 13:08:24.807515 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3799 13:08:24.810994 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3800 13:08:24.814177 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3801 13:08:24.817437 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3802 13:08:24.820772 iDelay=42, Bit 13, Center 22 (5 ~ 39) 35
3803 13:08:24.824139 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3804 13:08:24.827412 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3805 13:08:24.827523 ==
3806 13:08:24.834736 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3807 13:08:24.837522 fsp= 1, odt_onoff= 1, Byte mode= 0
3808 13:08:24.837610 ==
3809 13:08:24.837695 DQS Delay:
3810 13:08:24.840998 DQS0 = 0, DQS1 = 0
3811 13:08:24.841084 DQM Delay:
3812 13:08:24.841170 DQM0 = 20, DQM1 = 19
3813 13:08:24.844248 DQ Delay:
3814 13:08:24.847344 DQ0 =21, DQ1 =21, DQ2 =18, DQ3 =15
3815 13:08:24.851291 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3816 13:08:24.854477 DQ8 =18, DQ9 =16, DQ10 =21, DQ11 =22
3817 13:08:24.857528 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
3818 13:08:24.857613
3819 13:08:24.857678
3820 13:08:24.857737
3821 13:08:24.860688 [DramC_TX_OE_Calibration] TA2
3822 13:08:24.860773 Original DQ_B0 (3 6) =30, OEN = 27
3823 13:08:24.863980 Original DQ_B1 (3 6) =30, OEN = 27
3824 13:08:24.867820 23, 0x0, End_B0=23 End_B1=23
3825 13:08:24.870878 24, 0x0, End_B0=24 End_B1=24
3826 13:08:24.874117 25, 0x0, End_B0=25 End_B1=25
3827 13:08:24.877326 26, 0x0, End_B0=26 End_B1=26
3828 13:08:24.877412 27, 0x0, End_B0=27 End_B1=27
3829 13:08:24.880484 28, 0x0, End_B0=28 End_B1=28
3830 13:08:24.884494 29, 0x0, End_B0=29 End_B1=29
3831 13:08:24.887176 30, 0x0, End_B0=30 End_B1=30
3832 13:08:24.890742 31, 0xFFFF, End_B0=30 End_B1=30
3833 13:08:24.893805 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3834 13:08:24.900668 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3835 13:08:24.900752
3836 13:08:24.900816
3837 13:08:24.904003 Write Rank1 MR23 =0x3f
3838 13:08:24.904087 [DQSOSC]
3839 13:08:24.910596 [DQSOSCAuto] RK1, (LSB)MR18= 0xcfcf, (MSB)MR19= 0x202, tDQSOscB0 = 438 ps tDQSOscB1 = 438 ps
3840 13:08:24.917173 CH1_RK1: MR19=0x202, MR18=0xCFCF, DQSOSC=438, MR23=63, INC=12, DEC=19
3841 13:08:24.920626 Write Rank1 MR23 =0x3f
3842 13:08:24.920709 [DQSOSC]
3843 13:08:24.927039 [DQSOSCAuto] RK1, (LSB)MR18= 0xcdcd, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
3844 13:08:24.930784 CH1 RK1: MR19=202, MR18=CDCD
3845 13:08:24.934205 [RxdqsGatingPostProcess] freq 1600
3846 13:08:24.940968 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3847 13:08:24.941055 Rank: 0
3848 13:08:24.944160 best DQS0 dly(2T, 0.5T) = (2, 6)
3849 13:08:24.947393 best DQS1 dly(2T, 0.5T) = (2, 6)
3850 13:08:24.950467 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3851 13:08:24.953903 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3852 13:08:24.953987 Rank: 1
3853 13:08:24.957246 best DQS0 dly(2T, 0.5T) = (2, 5)
3854 13:08:24.960887 best DQS1 dly(2T, 0.5T) = (2, 6)
3855 13:08:24.964243 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3856 13:08:24.967061 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3857 13:08:24.970518 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3858 13:08:24.973820 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3859 13:08:24.977277 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3860 13:08:24.980379
3861 13:08:24.980492
3862 13:08:24.983938 [Calibration Summary] Freqency 1600
3863 13:08:24.984021 CH 0, Rank 0
3864 13:08:24.984086 All Pass.
3865 13:08:24.984146
3866 13:08:24.987380 CH 0, Rank 1
3867 13:08:24.987463 All Pass.
3868 13:08:24.987528
3869 13:08:24.987587 CH 1, Rank 0
3870 13:08:24.990838 All Pass.
3871 13:08:24.990920
3872 13:08:24.990984 CH 1, Rank 1
3873 13:08:24.991045 All Pass.
3874 13:08:24.991102
3875 13:08:24.997095 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3876 13:08:25.003967 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3877 13:08:25.010490 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3878 13:08:25.013787 Write Rank0 MR3 =0xb0
3879 13:08:25.020919 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3880 13:08:25.027156 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3881 13:08:25.033886 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3882 13:08:25.037485 Write Rank1 MR3 =0xb0
3883 13:08:25.044098 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3884 13:08:25.050706 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3885 13:08:25.057290 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3886 13:08:25.060433 Write Rank0 MR3 =0xb0
3887 13:08:25.066965 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3888 13:08:25.074055 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3889 13:08:25.080192 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3890 13:08:25.080276 Write Rank1 MR3 =0xb0
3891 13:08:25.083597 DramC Write-DBI on
3892 13:08:25.087162 [GetDramInforAfterCalByMRR] Vendor 6.
3893 13:08:25.090384 [GetDramInforAfterCalByMRR] Revision 505.
3894 13:08:25.090500 MR8 1111
3895 13:08:25.096966 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3896 13:08:25.097051 MR8 1111
3897 13:08:25.100600 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3898 13:08:25.104135 MR8 1111
3899 13:08:25.107401 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3900 13:08:25.107487 MR8 1111
3901 13:08:25.113687 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3902 13:08:25.123805 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3903 13:08:25.123892 Write Rank0 MR13 =0xd0
3904 13:08:25.126898 Write Rank1 MR13 =0xd0
3905 13:08:25.126982 Write Rank0 MR13 =0xd0
3906 13:08:25.130314 Write Rank1 MR13 =0xd0
3907 13:08:25.134119 Save calibration result to emmc
3908 13:08:25.134203
3909 13:08:25.134267
3910 13:08:25.137151 [DramcModeReg_Check] Freq_1600, FSP_1
3911 13:08:25.137234 FSP_1, CH_0, RK0
3912 13:08:25.140296 Write Rank0 MR13 =0xd8
3913 13:08:25.143723 MR12 = 0x5e (global = 0x5e) match
3914 13:08:25.146918 MR14 = 0x1c (global = 0x1c) match
3915 13:08:25.147043 FSP_1, CH_0, RK1
3916 13:08:25.150239 Write Rank1 MR13 =0xd8
3917 13:08:25.153991 MR12 = 0x60 (global = 0x60) match
3918 13:08:25.156934 MR14 = 0x1e (global = 0x1e) match
3919 13:08:25.157023 FSP_1, CH_1, RK0
3920 13:08:25.160428 Write Rank0 MR13 =0xd8
3921 13:08:25.163409 MR12 = 0x5e (global = 0x5e) match
3922 13:08:25.167403 MR14 = 0x1e (global = 0x1e) match
3923 13:08:25.167489 FSP_1, CH_1, RK1
3924 13:08:25.170229 Write Rank1 MR13 =0xd8
3925 13:08:25.173879 MR12 = 0x60 (global = 0x60) match
3926 13:08:25.176861 MR14 = 0x1e (global = 0x1e) match
3927 13:08:25.176946
3928 13:08:25.180264 [MEM_TEST] 02: After DFS, before run time config
3929 13:08:25.191820 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3930 13:08:25.191913
3931 13:08:25.191979 [TA2_TEST]
3932 13:08:25.192040 === TA2 HW
3933 13:08:25.195615 TA2 PAT: XTALK
3934 13:08:25.198892 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3935 13:08:25.205531 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3936 13:08:25.208512 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3937 13:08:25.212181 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3938 13:08:25.215735
3939 13:08:25.215821
3940 13:08:25.215907 Settings after calibration
3941 13:08:25.215988
3942 13:08:25.218696 [DramcRunTimeConfig]
3943 13:08:25.222470 TransferPLLToSPMControl - MODE SW PHYPLL
3944 13:08:25.222556 TX_TRACKING: ON
3945 13:08:25.225304 RX_TRACKING: ON
3946 13:08:25.225390 HW_GATING: ON
3947 13:08:25.228381 HW_GATING DBG: OFF
3948 13:08:25.228475 ddr_geometry:1
3949 13:08:25.232011 ddr_geometry:1
3950 13:08:25.232097 ddr_geometry:1
3951 13:08:25.232182 ddr_geometry:1
3952 13:08:25.235460 ddr_geometry:1
3953 13:08:25.235546 ddr_geometry:1
3954 13:08:25.238795 ddr_geometry:1
3955 13:08:25.238881 ddr_geometry:1
3956 13:08:25.242006 High Freq DUMMY_READ_FOR_TRACKING: ON
3957 13:08:25.245458 ZQCS_ENABLE_LP4: OFF
3958 13:08:25.248774 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3959 13:08:25.252272 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3960 13:08:25.252359 SPM_CONTROL_AFTERK: ON
3961 13:08:25.255358 IMPEDANCE_TRACKING: ON
3962 13:08:25.255443 TEMP_SENSOR: ON
3963 13:08:25.258467 PER_BANK_REFRESH: ON
3964 13:08:25.258554 HW_SAVE_FOR_SR: ON
3965 13:08:25.262047 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3966 13:08:25.265413 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3967 13:08:25.268512 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3968 13:08:25.271781 Read ODT Tracking: ON
3969 13:08:25.275158 =========================
3970 13:08:25.275245
3971 13:08:25.275332 [TA2_TEST]
3972 13:08:25.275412 === TA2 HW
3973 13:08:25.281741 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3974 13:08:25.285221 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3975 13:08:25.292155 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3976 13:08:25.295415 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3977 13:08:25.295499
3978 13:08:25.298432 [MEM_TEST] 03: After run time config
3979 13:08:25.309769 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3980 13:08:25.313175 [complex_mem_test] start addr:0x40024000, len:131072
3981 13:08:25.517406 1st complex R/W mem test pass
3982 13:08:25.524368 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3983 13:08:25.527493 sync preloader write leveling
3984 13:08:25.530767 sync preloader cbt_mr12
3985 13:08:25.534216 sync preloader cbt_clk_dly
3986 13:08:25.534300 sync preloader cbt_cmd_dly
3987 13:08:25.537329 sync preloader cbt_cs
3988 13:08:25.540781 sync preloader cbt_ca_perbit_delay
3989 13:08:25.540883 sync preloader clk_delay
3990 13:08:25.544044 sync preloader dqs_delay
3991 13:08:25.547537 sync preloader u1Gating2T_Save
3992 13:08:25.550903 sync preloader u1Gating05T_Save
3993 13:08:25.554293 sync preloader u1Gatingfine_tune_Save
3994 13:08:25.557580 sync preloader u1Gatingucpass_count_Save
3995 13:08:25.561049 sync preloader u1TxWindowPerbitVref_Save
3996 13:08:25.564189 sync preloader u1TxCenter_min_Save
3997 13:08:25.567517 sync preloader u1TxCenter_max_Save
3998 13:08:25.570654 sync preloader u1Txwin_center_Save
3999 13:08:25.574120 sync preloader u1Txfirst_pass_Save
4000 13:08:25.577620 sync preloader u1Txlast_pass_Save
4001 13:08:25.577708 sync preloader u1RxDatlat_Save
4002 13:08:25.580657 sync preloader u1RxWinPerbitVref_Save
4003 13:08:25.587054 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4004 13:08:25.590882 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4005 13:08:25.594237 sync preloader delay_cell_unit
4006 13:08:25.600450 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4007 13:08:25.603790 sync preloader write leveling
4008 13:08:25.603877 sync preloader cbt_mr12
4009 13:08:25.606997 sync preloader cbt_clk_dly
4010 13:08:25.610386 sync preloader cbt_cmd_dly
4011 13:08:25.610473 sync preloader cbt_cs
4012 13:08:25.613653 sync preloader cbt_ca_perbit_delay
4013 13:08:25.617021 sync preloader clk_delay
4014 13:08:25.620164 sync preloader dqs_delay
4015 13:08:25.623715 sync preloader u1Gating2T_Save
4016 13:08:25.623799 sync preloader u1Gating05T_Save
4017 13:08:25.626794 sync preloader u1Gatingfine_tune_Save
4018 13:08:25.630105 sync preloader u1Gatingucpass_count_Save
4019 13:08:25.637052 sync preloader u1TxWindowPerbitVref_Save
4020 13:08:25.637138 sync preloader u1TxCenter_min_Save
4021 13:08:25.640409 sync preloader u1TxCenter_max_Save
4022 13:08:25.644081 sync preloader u1Txwin_center_Save
4023 13:08:25.646801 sync preloader u1Txfirst_pass_Save
4024 13:08:25.650374 sync preloader u1Txlast_pass_Save
4025 13:08:25.653677 sync preloader u1RxDatlat_Save
4026 13:08:25.656899 sync preloader u1RxWinPerbitVref_Save
4027 13:08:25.660229 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4028 13:08:25.666985 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4029 13:08:25.667072 sync preloader delay_cell_unit
4030 13:08:25.673194 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4031 13:08:25.676705 sync preloader write leveling
4032 13:08:25.679986 sync preloader cbt_mr12
4033 13:08:25.683160 sync preloader cbt_clk_dly
4034 13:08:25.683245 sync preloader cbt_cmd_dly
4035 13:08:25.686524 sync preloader cbt_cs
4036 13:08:25.689916 sync preloader cbt_ca_perbit_delay
4037 13:08:25.693251 sync preloader clk_delay
4038 13:08:25.693335 sync preloader dqs_delay
4039 13:08:25.696542 sync preloader u1Gating2T_Save
4040 13:08:25.699871 sync preloader u1Gating05T_Save
4041 13:08:25.703313 sync preloader u1Gatingfine_tune_Save
4042 13:08:25.706742 sync preloader u1Gatingucpass_count_Save
4043 13:08:25.709842 sync preloader u1TxWindowPerbitVref_Save
4044 13:08:25.713481 sync preloader u1TxCenter_min_Save
4045 13:08:25.716681 sync preloader u1TxCenter_max_Save
4046 13:08:25.719996 sync preloader u1Txwin_center_Save
4047 13:08:25.723114 sync preloader u1Txfirst_pass_Save
4048 13:08:25.726559 sync preloader u1Txlast_pass_Save
4049 13:08:25.729977 sync preloader u1RxDatlat_Save
4050 13:08:25.733350 sync preloader u1RxWinPerbitVref_Save
4051 13:08:25.736844 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4052 13:08:25.740133 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4053 13:08:25.743197 sync preloader delay_cell_unit
4054 13:08:25.746650 just_for_test_dump_coreboot_params dump all params
4055 13:08:25.749854 dump source = 0x0
4056 13:08:25.749965 dump params frequency:1600
4057 13:08:25.753515 dump params rank number:2
4058 13:08:25.753624
4059 13:08:25.756370 dump params write leveling
4060 13:08:25.760027 write leveling[0][0][0] = 0x20
4061 13:08:25.763370 write leveling[0][0][1] = 0x18
4062 13:08:25.763455 write leveling[0][1][0] = 0x1a
4063 13:08:25.766639 write leveling[0][1][1] = 0x18
4064 13:08:25.769981 write leveling[1][0][0] = 0x22
4065 13:08:25.773144 write leveling[1][0][1] = 0x18
4066 13:08:25.776595 write leveling[1][1][0] = 0x23
4067 13:08:25.780103 write leveling[1][1][1] = 0x18
4068 13:08:25.780213 dump params cbt_cs
4069 13:08:25.782896 cbt_cs[0][0] = 0x8
4070 13:08:25.782988 cbt_cs[0][1] = 0x8
4071 13:08:25.786301 cbt_cs[1][0] = 0xb
4072 13:08:25.786389 cbt_cs[1][1] = 0xb
4073 13:08:25.789622 dump params cbt_mr12
4074 13:08:25.789709 cbt_mr12[0][0] = 0x1e
4075 13:08:25.793418 cbt_mr12[0][1] = 0x20
4076 13:08:25.796671 cbt_mr12[1][0] = 0x1e
4077 13:08:25.796759 cbt_mr12[1][1] = 0x20
4078 13:08:25.799883 dump params tx window
4079 13:08:25.802995 tx_center_min[0][0][0] = 981
4080 13:08:25.803082 tx_center_max[0][0][0] = 988
4081 13:08:25.806214 tx_center_min[0][0][1] = 975
4082 13:08:25.809621 tx_center_max[0][0][1] = 981
4083 13:08:25.813027 tx_center_min[0][1][0] = 979
4084 13:08:25.813115 tx_center_max[0][1][0] = 985
4085 13:08:25.816070 tx_center_min[0][1][1] = 977
4086 13:08:25.819809 tx_center_max[0][1][1] = 984
4087 13:08:25.822892 tx_center_min[1][0][0] = 989
4088 13:08:25.826089 tx_center_max[1][0][0] = 993
4089 13:08:25.826176 tx_center_min[1][0][1] = 976
4090 13:08:25.829537 tx_center_max[1][0][1] = 982
4091 13:08:25.832683 tx_center_min[1][1][0] = 987
4092 13:08:25.836381 tx_center_max[1][1][0] = 992
4093 13:08:25.839405 tx_center_min[1][1][1] = 975
4094 13:08:25.839493 tx_center_max[1][1][1] = 981
4095 13:08:25.843084 dump params tx window
4096 13:08:25.845929 tx_win_center[0][0][0] = 988
4097 13:08:25.849716 tx_first_pass[0][0][0] = 976
4098 13:08:25.849804 tx_last_pass[0][0][0] = 1000
4099 13:08:25.853081 tx_win_center[0][0][1] = 987
4100 13:08:25.856076 tx_first_pass[0][0][1] = 975
4101 13:08:25.859164 tx_last_pass[0][0][1] = 999
4102 13:08:25.859257 tx_win_center[0][0][2] = 987
4103 13:08:25.862844 tx_first_pass[0][0][2] = 976
4104 13:08:25.866271 tx_last_pass[0][0][2] = 999
4105 13:08:25.869307 tx_win_center[0][0][3] = 981
4106 13:08:25.872850 tx_first_pass[0][0][3] = 969
4107 13:08:25.872937 tx_last_pass[0][0][3] = 993
4108 13:08:25.876161 tx_win_center[0][0][4] = 987
4109 13:08:25.879351 tx_first_pass[0][0][4] = 975
4110 13:08:25.882669 tx_last_pass[0][0][4] = 999
4111 13:08:25.882776 tx_win_center[0][0][5] = 983
4112 13:08:25.885737 tx_first_pass[0][0][5] = 971
4113 13:08:25.889174 tx_last_pass[0][0][5] = 996
4114 13:08:25.892355 tx_win_center[0][0][6] = 985
4115 13:08:25.896003 tx_first_pass[0][0][6] = 973
4116 13:08:25.896086 tx_last_pass[0][0][6] = 998
4117 13:08:25.899520 tx_win_center[0][0][7] = 987
4118 13:08:25.902718 tx_first_pass[0][0][7] = 975
4119 13:08:25.905907 tx_last_pass[0][0][7] = 999
4120 13:08:25.905982 tx_win_center[0][0][8] = 975
4121 13:08:25.909470 tx_first_pass[0][0][8] = 963
4122 13:08:25.912590 tx_last_pass[0][0][8] = 987
4123 13:08:25.916126 tx_win_center[0][0][9] = 978
4124 13:08:25.919371 tx_first_pass[0][0][9] = 967
4125 13:08:25.919460 tx_last_pass[0][0][9] = 990
4126 13:08:25.922615 tx_win_center[0][0][10] = 981
4127 13:08:25.925795 tx_first_pass[0][0][10] = 969
4128 13:08:25.929175 tx_last_pass[0][0][10] = 994
4129 13:08:25.932219 tx_win_center[0][0][11] = 977
4130 13:08:25.932304 tx_first_pass[0][0][11] = 965
4131 13:08:25.935585 tx_last_pass[0][0][11] = 989
4132 13:08:25.939060 tx_win_center[0][0][12] = 978
4133 13:08:25.942664 tx_first_pass[0][0][12] = 967
4134 13:08:25.945933 tx_last_pass[0][0][12] = 990
4135 13:08:25.946020 tx_win_center[0][0][13] = 978
4136 13:08:25.949062 tx_first_pass[0][0][13] = 967
4137 13:08:25.952371 tx_last_pass[0][0][13] = 990
4138 13:08:25.955829 tx_win_center[0][0][14] = 978
4139 13:08:25.959200 tx_first_pass[0][0][14] = 967
4140 13:08:25.959275 tx_last_pass[0][0][14] = 990
4141 13:08:25.962391 tx_win_center[0][0][15] = 981
4142 13:08:25.965912 tx_first_pass[0][0][15] = 969
4143 13:08:25.969102 tx_last_pass[0][0][15] = 993
4144 13:08:25.972128 tx_win_center[0][1][0] = 985
4145 13:08:25.972204 tx_first_pass[0][1][0] = 973
4146 13:08:25.976040 tx_last_pass[0][1][0] = 998
4147 13:08:25.979126 tx_win_center[0][1][1] = 984
4148 13:08:25.982198 tx_first_pass[0][1][1] = 972
4149 13:08:25.982271 tx_last_pass[0][1][1] = 996
4150 13:08:25.985894 tx_win_center[0][1][2] = 985
4151 13:08:25.988844 tx_first_pass[0][1][2] = 974
4152 13:08:25.992223 tx_last_pass[0][1][2] = 997
4153 13:08:25.996000 tx_win_center[0][1][3] = 979
4154 13:08:25.996074 tx_first_pass[0][1][3] = 967
4155 13:08:25.999467 tx_last_pass[0][1][3] = 991
4156 13:08:26.002580 tx_win_center[0][1][4] = 983
4157 13:08:26.005937 tx_first_pass[0][1][4] = 970
4158 13:08:26.006015 tx_last_pass[0][1][4] = 996
4159 13:08:26.009308 tx_win_center[0][1][5] = 980
4160 13:08:26.012531 tx_first_pass[0][1][5] = 968
4161 13:08:26.015890 tx_last_pass[0][1][5] = 993
4162 13:08:26.019355 tx_win_center[0][1][6] = 981
4163 13:08:26.019436 tx_first_pass[0][1][6] = 969
4164 13:08:26.022621 tx_last_pass[0][1][6] = 994
4165 13:08:26.025913 tx_win_center[0][1][7] = 983
4166 13:08:26.028995 tx_first_pass[0][1][7] = 970
4167 13:08:26.029070 tx_last_pass[0][1][7] = 996
4168 13:08:26.032509 tx_win_center[0][1][8] = 977
4169 13:08:26.035843 tx_first_pass[0][1][8] = 965
4170 13:08:26.039337 tx_last_pass[0][1][8] = 990
4171 13:08:26.042350 tx_win_center[0][1][9] = 979
4172 13:08:26.042427 tx_first_pass[0][1][9] = 968
4173 13:08:26.045869 tx_last_pass[0][1][9] = 991
4174 13:08:26.049096 tx_win_center[0][1][10] = 984
4175 13:08:26.052409 tx_first_pass[0][1][10] = 972
4176 13:08:26.055506 tx_last_pass[0][1][10] = 997
4177 13:08:26.055592 tx_win_center[0][1][11] = 978
4178 13:08:26.059430 tx_first_pass[0][1][11] = 967
4179 13:08:26.062267 tx_last_pass[0][1][11] = 990
4180 13:08:26.065832 tx_win_center[0][1][12] = 980
4181 13:08:26.068997 tx_first_pass[0][1][12] = 968
4182 13:08:26.069082 tx_last_pass[0][1][12] = 992
4183 13:08:26.072338 tx_win_center[0][1][13] = 980
4184 13:08:26.075495 tx_first_pass[0][1][13] = 969
4185 13:08:26.078988 tx_last_pass[0][1][13] = 991
4186 13:08:26.082491 tx_win_center[0][1][14] = 980
4187 13:08:26.082576 tx_first_pass[0][1][14] = 968
4188 13:08:26.085626 tx_last_pass[0][1][14] = 992
4189 13:08:26.088747 tx_win_center[0][1][15] = 983
4190 13:08:26.092342 tx_first_pass[0][1][15] = 971
4191 13:08:26.095540 tx_last_pass[0][1][15] = 996
4192 13:08:26.095625 tx_win_center[1][0][0] = 993
4193 13:08:26.099253 tx_first_pass[1][0][0] = 980
4194 13:08:26.102177 tx_last_pass[1][0][0] = 1007
4195 13:08:26.105469 tx_win_center[1][0][1] = 992
4196 13:08:26.105554 tx_first_pass[1][0][1] = 979
4197 13:08:26.108624 tx_last_pass[1][0][1] = 1006
4198 13:08:26.112147 tx_win_center[1][0][2] = 990
4199 13:08:26.115412 tx_first_pass[1][0][2] = 978
4200 13:08:26.118641 tx_last_pass[1][0][2] = 1003
4201 13:08:26.118727 tx_win_center[1][0][3] = 989
4202 13:08:26.121831 tx_first_pass[1][0][3] = 977
4203 13:08:26.125499 tx_last_pass[1][0][3] = 1001
4204 13:08:26.128411 tx_win_center[1][0][4] = 992
4205 13:08:26.131848 tx_first_pass[1][0][4] = 979
4206 13:08:26.131933 tx_last_pass[1][0][4] = 1006
4207 13:08:26.135345 tx_win_center[1][0][5] = 993
4208 13:08:26.138528 tx_first_pass[1][0][5] = 981
4209 13:08:26.141775 tx_last_pass[1][0][5] = 1006
4210 13:08:26.145113 tx_win_center[1][0][6] = 992
4211 13:08:26.145198 tx_first_pass[1][0][6] = 979
4212 13:08:26.148435 tx_last_pass[1][0][6] = 1006
4213 13:08:26.151819 tx_win_center[1][0][7] = 992
4214 13:08:26.155477 tx_first_pass[1][0][7] = 979
4215 13:08:26.155570 tx_last_pass[1][0][7] = 1006
4216 13:08:26.158805 tx_win_center[1][0][8] = 980
4217 13:08:26.162110 tx_first_pass[1][0][8] = 968
4218 13:08:26.165342 tx_last_pass[1][0][8] = 992
4219 13:08:26.168410 tx_win_center[1][0][9] = 979
4220 13:08:26.168502 tx_first_pass[1][0][9] = 968
4221 13:08:26.171829 tx_last_pass[1][0][9] = 991
4222 13:08:26.175525 tx_win_center[1][0][10] = 981
4223 13:08:26.178610 tx_first_pass[1][0][10] = 970
4224 13:08:26.181811 tx_last_pass[1][0][10] = 993
4225 13:08:26.181896 tx_win_center[1][0][11] = 982
4226 13:08:26.185289 tx_first_pass[1][0][11] = 970
4227 13:08:26.188496 tx_last_pass[1][0][11] = 994
4228 13:08:26.192352 tx_win_center[1][0][12] = 981
4229 13:08:26.195196 tx_first_pass[1][0][12] = 970
4230 13:08:26.195282 tx_last_pass[1][0][12] = 993
4231 13:08:26.198522 tx_win_center[1][0][13] = 982
4232 13:08:26.201745 tx_first_pass[1][0][13] = 971
4233 13:08:26.204937 tx_last_pass[1][0][13] = 994
4234 13:08:26.208329 tx_win_center[1][0][14] = 981
4235 13:08:26.208413 tx_first_pass[1][0][14] = 970
4236 13:08:26.211860 tx_last_pass[1][0][14] = 993
4237 13:08:26.215012 tx_win_center[1][0][15] = 976
4238 13:08:26.218848 tx_first_pass[1][0][15] = 965
4239 13:08:26.221719 tx_last_pass[1][0][15] = 987
4240 13:08:26.221803 tx_win_center[1][1][0] = 992
4241 13:08:26.225279 tx_first_pass[1][1][0] = 979
4242 13:08:26.228791 tx_last_pass[1][1][0] = 1005
4243 13:08:26.231872 tx_win_center[1][1][1] = 991
4244 13:08:26.235263 tx_first_pass[1][1][1] = 978
4245 13:08:26.235349 tx_last_pass[1][1][1] = 1004
4246 13:08:26.238444 tx_win_center[1][1][2] = 989
4247 13:08:26.242083 tx_first_pass[1][1][2] = 977
4248 13:08:26.245285 tx_last_pass[1][1][2] = 1002
4249 13:08:26.245371 tx_win_center[1][1][3] = 987
4250 13:08:26.248708 tx_first_pass[1][1][3] = 975
4251 13:08:26.252007 tx_last_pass[1][1][3] = 999
4252 13:08:26.255153 tx_win_center[1][1][4] = 991
4253 13:08:26.258778 tx_first_pass[1][1][4] = 978
4254 13:08:26.258863 tx_last_pass[1][1][4] = 1004
4255 13:08:26.261935 tx_win_center[1][1][5] = 992
4256 13:08:26.265287 tx_first_pass[1][1][5] = 979
4257 13:08:26.268823 tx_last_pass[1][1][5] = 1005
4258 13:08:26.268908 tx_win_center[1][1][6] = 991
4259 13:08:26.271804 tx_first_pass[1][1][6] = 978
4260 13:08:26.274921 tx_last_pass[1][1][6] = 1005
4261 13:08:26.278643 tx_win_center[1][1][7] = 991
4262 13:08:26.281786 tx_first_pass[1][1][7] = 979
4263 13:08:26.281871 tx_last_pass[1][1][7] = 1003
4264 13:08:26.284943 tx_win_center[1][1][8] = 978
4265 13:08:26.288050 tx_first_pass[1][1][8] = 966
4266 13:08:26.291530 tx_last_pass[1][1][8] = 990
4267 13:08:26.295045 tx_win_center[1][1][9] = 978
4268 13:08:26.295151 tx_first_pass[1][1][9] = 966
4269 13:08:26.298091 tx_last_pass[1][1][9] = 990
4270 13:08:26.301658 tx_win_center[1][1][10] = 980
4271 13:08:26.304629 tx_first_pass[1][1][10] = 968
4272 13:08:26.308368 tx_last_pass[1][1][10] = 992
4273 13:08:26.308446 tx_win_center[1][1][11] = 981
4274 13:08:26.311759 tx_first_pass[1][1][11] = 969
4275 13:08:26.315128 tx_last_pass[1][1][11] = 993
4276 13:08:26.318537 tx_win_center[1][1][12] = 980
4277 13:08:26.321646 tx_first_pass[1][1][12] = 969
4278 13:08:26.321731 tx_last_pass[1][1][12] = 992
4279 13:08:26.324648 tx_win_center[1][1][13] = 981
4280 13:08:26.328614 tx_first_pass[1][1][13] = 970
4281 13:08:26.331741 tx_last_pass[1][1][13] = 993
4282 13:08:26.334734 tx_win_center[1][1][14] = 980
4283 13:08:26.334819 tx_first_pass[1][1][14] = 969
4284 13:08:26.337983 tx_last_pass[1][1][14] = 992
4285 13:08:26.341380 tx_win_center[1][1][15] = 975
4286 13:08:26.345079 tx_first_pass[1][1][15] = 963
4287 13:08:26.348275 tx_last_pass[1][1][15] = 987
4288 13:08:26.348361 dump params rx window
4289 13:08:26.351464 rx_firspass[0][0][0] = 5
4290 13:08:26.354582 rx_lastpass[0][0][0] = 38
4291 13:08:26.354667 rx_firspass[0][0][1] = 5
4292 13:08:26.358620 rx_lastpass[0][0][1] = 36
4293 13:08:26.361510 rx_firspass[0][0][2] = 6
4294 13:08:26.361595 rx_lastpass[0][0][2] = 36
4295 13:08:26.365313 rx_firspass[0][0][3] = -2
4296 13:08:26.368343 rx_lastpass[0][0][3] = 30
4297 13:08:26.368428 rx_firspass[0][0][4] = 5
4298 13:08:26.371670 rx_lastpass[0][0][4] = 36
4299 13:08:26.374962 rx_firspass[0][0][5] = 1
4300 13:08:26.378320 rx_lastpass[0][0][5] = 31
4301 13:08:26.378405 rx_firspass[0][0][6] = 3
4302 13:08:26.381510 rx_lastpass[0][0][6] = 33
4303 13:08:26.385004 rx_firspass[0][0][7] = 5
4304 13:08:26.385089 rx_lastpass[0][0][7] = 36
4305 13:08:26.388068 rx_firspass[0][0][8] = -2
4306 13:08:26.391552 rx_lastpass[0][0][8] = 32
4307 13:08:26.391637 rx_firspass[0][0][9] = 1
4308 13:08:26.394853 rx_lastpass[0][0][9] = 32
4309 13:08:26.397849 rx_firspass[0][0][10] = 9
4310 13:08:26.401257 rx_lastpass[0][0][10] = 41
4311 13:08:26.401344 rx_firspass[0][0][11] = 1
4312 13:08:26.404782 rx_lastpass[0][0][11] = 32
4313 13:08:26.407831 rx_firspass[0][0][12] = 3
4314 13:08:26.411150 rx_lastpass[0][0][12] = 36
4315 13:08:26.411234 rx_firspass[0][0][13] = 3
4316 13:08:26.414357 rx_lastpass[0][0][13] = 33
4317 13:08:26.417582 rx_firspass[0][0][14] = 2
4318 13:08:26.417657 rx_lastpass[0][0][14] = 37
4319 13:08:26.420997 rx_firspass[0][0][15] = 6
4320 13:08:26.424392 rx_lastpass[0][0][15] = 37
4321 13:08:26.427778 rx_firspass[0][1][0] = 5
4322 13:08:26.427858 rx_lastpass[0][1][0] = 40
4323 13:08:26.431007 rx_firspass[0][1][1] = 5
4324 13:08:26.434330 rx_lastpass[0][1][1] = 38
4325 13:08:26.434412 rx_firspass[0][1][2] = 6
4326 13:08:26.437895 rx_lastpass[0][1][2] = 38
4327 13:08:26.441294 rx_firspass[0][1][3] = -2
4328 13:08:26.444271 rx_lastpass[0][1][3] = 33
4329 13:08:26.444377 rx_firspass[0][1][4] = 5
4330 13:08:26.447805 rx_lastpass[0][1][4] = 39
4331 13:08:26.451069 rx_firspass[0][1][5] = 1
4332 13:08:26.451169 rx_lastpass[0][1][5] = 34
4333 13:08:26.454372 rx_firspass[0][1][6] = 3
4334 13:08:26.457623 rx_lastpass[0][1][6] = 37
4335 13:08:26.457712 rx_firspass[0][1][7] = 3
4336 13:08:26.460836 rx_lastpass[0][1][7] = 38
4337 13:08:26.464357 rx_firspass[0][1][8] = -2
4338 13:08:26.467589 rx_lastpass[0][1][8] = 32
4339 13:08:26.467669 rx_firspass[0][1][9] = 1
4340 13:08:26.471458 rx_lastpass[0][1][9] = 36
4341 13:08:26.474550 rx_firspass[0][1][10] = 7
4342 13:08:26.474633 rx_lastpass[0][1][10] = 43
4343 13:08:26.477882 rx_firspass[0][1][11] = -2
4344 13:08:26.481093 rx_lastpass[0][1][11] = 34
4345 13:08:26.484018 rx_firspass[0][1][12] = 1
4346 13:08:26.484128 rx_lastpass[0][1][12] = 37
4347 13:08:26.487745 rx_firspass[0][1][13] = 2
4348 13:08:26.491063 rx_lastpass[0][1][13] = 35
4349 13:08:26.494112 rx_firspass[0][1][14] = 3
4350 13:08:26.494185 rx_lastpass[0][1][14] = 37
4351 13:08:26.497325 rx_firspass[0][1][15] = 6
4352 13:08:26.501053 rx_lastpass[0][1][15] = 39
4353 13:08:26.501125 rx_firspass[1][0][0] = 5
4354 13:08:26.504294 rx_lastpass[1][0][0] = 38
4355 13:08:26.507283 rx_firspass[1][0][1] = 5
4356 13:08:26.510864 rx_lastpass[1][0][1] = 38
4357 13:08:26.510957 rx_firspass[1][0][2] = 2
4358 13:08:26.514292 rx_lastpass[1][0][2] = 35
4359 13:08:26.517621 rx_firspass[1][0][3] = 0
4360 13:08:26.517706 rx_lastpass[1][0][3] = 33
4361 13:08:26.521159 rx_firspass[1][0][4] = 5
4362 13:08:26.524301 rx_lastpass[1][0][4] = 38
4363 13:08:26.524407 rx_firspass[1][0][5] = 7
4364 13:08:26.527700 rx_lastpass[1][0][5] = 39
4365 13:08:26.530655 rx_firspass[1][0][6] = 7
4366 13:08:26.534431 rx_lastpass[1][0][6] = 40
4367 13:08:26.534508 rx_firspass[1][0][7] = 5
4368 13:08:26.537701 rx_lastpass[1][0][7] = 38
4369 13:08:26.540912 rx_firspass[1][0][8] = 1
4370 13:08:26.540988 rx_lastpass[1][0][8] = 33
4371 13:08:26.544296 rx_firspass[1][0][9] = 0
4372 13:08:26.547586 rx_lastpass[1][0][9] = 32
4373 13:08:26.547659 rx_firspass[1][0][10] = 5
4374 13:08:26.550663 rx_lastpass[1][0][10] = 35
4375 13:08:26.554043 rx_firspass[1][0][11] = 6
4376 13:08:26.557745 rx_lastpass[1][0][11] = 38
4377 13:08:26.557816 rx_firspass[1][0][12] = 6
4378 13:08:26.560596 rx_lastpass[1][0][12] = 38
4379 13:08:26.564288 rx_firspass[1][0][13] = 6
4380 13:08:26.564367 rx_lastpass[1][0][13] = 37
4381 13:08:26.567296 rx_firspass[1][0][14] = 7
4382 13:08:26.570634 rx_lastpass[1][0][14] = 38
4383 13:08:26.574181 rx_firspass[1][0][15] = -3
4384 13:08:26.574258 rx_lastpass[1][0][15] = 30
4385 13:08:26.577657 rx_firspass[1][1][0] = 3
4386 13:08:26.580823 rx_lastpass[1][1][0] = 40
4387 13:08:26.580895 rx_firspass[1][1][1] = 4
4388 13:08:26.584244 rx_lastpass[1][1][1] = 39
4389 13:08:26.587466 rx_firspass[1][1][2] = 0
4390 13:08:26.591218 rx_lastpass[1][1][2] = 36
4391 13:08:26.591289 rx_firspass[1][1][3] = -3
4392 13:08:26.594438 rx_lastpass[1][1][3] = 34
4393 13:08:26.597715 rx_firspass[1][1][4] = 4
4394 13:08:26.597786 rx_lastpass[1][1][4] = 39
4395 13:08:26.600755 rx_firspass[1][1][5] = 5
4396 13:08:26.604007 rx_lastpass[1][1][5] = 40
4397 13:08:26.604076 rx_firspass[1][1][6] = 5
4398 13:08:26.607190 rx_lastpass[1][1][6] = 41
4399 13:08:26.610553 rx_firspass[1][1][7] = 3
4400 13:08:26.613817 rx_lastpass[1][1][7] = 38
4401 13:08:26.613891 rx_firspass[1][1][8] = 1
4402 13:08:26.617846 rx_lastpass[1][1][8] = 35
4403 13:08:26.620863 rx_firspass[1][1][9] = -1
4404 13:08:26.620934 rx_lastpass[1][1][9] = 34
4405 13:08:26.623765 rx_firspass[1][1][10] = 3
4406 13:08:26.627410 rx_lastpass[1][1][10] = 39
4407 13:08:26.630610 rx_firspass[1][1][11] = 4
4408 13:08:26.630688 rx_lastpass[1][1][11] = 40
4409 13:08:26.633781 rx_firspass[1][1][12] = 4
4410 13:08:26.637854 rx_lastpass[1][1][12] = 40
4411 13:08:26.637927 rx_firspass[1][1][13] = 5
4412 13:08:26.640596 rx_lastpass[1][1][13] = 39
4413 13:08:26.644297 rx_firspass[1][1][14] = 5
4414 13:08:26.647817 rx_lastpass[1][1][14] = 40
4415 13:08:26.647892 rx_firspass[1][1][15] = -3
4416 13:08:26.650494 rx_lastpass[1][1][15] = 31
4417 13:08:26.654005 dump params clk_delay
4418 13:08:26.654081 clk_delay[0] = 1
4419 13:08:26.657315 clk_delay[1] = 0
4420 13:08:26.657391 dump params dqs_delay
4421 13:08:26.660724 dqs_delay[0][0] = -2
4422 13:08:26.660804 dqs_delay[0][1] = 0
4423 13:08:26.663774 dqs_delay[1][0] = 0
4424 13:08:26.667495 dqs_delay[1][1] = 0
4425 13:08:26.667609 dump params delay_cell_unit = 735
4426 13:08:26.670728 dump source = 0x0
4427 13:08:26.673798 dump params frequency:1200
4428 13:08:26.673874 dump params rank number:2
4429 13:08:26.673946
4430 13:08:26.677159 dump params write leveling
4431 13:08:26.680755 write leveling[0][0][0] = 0x0
4432 13:08:26.683836 write leveling[0][0][1] = 0x0
4433 13:08:26.687398 write leveling[0][1][0] = 0x0
4434 13:08:26.687472 write leveling[0][1][1] = 0x0
4435 13:08:26.690879 write leveling[1][0][0] = 0x0
4436 13:08:26.694001 write leveling[1][0][1] = 0x0
4437 13:08:26.697198 write leveling[1][1][0] = 0x0
4438 13:08:26.700634 write leveling[1][1][1] = 0x0
4439 13:08:26.700710 dump params cbt_cs
4440 13:08:26.703893 cbt_cs[0][0] = 0x0
4441 13:08:26.703964 cbt_cs[0][1] = 0x0
4442 13:08:26.707081 cbt_cs[1][0] = 0x0
4443 13:08:26.707159 cbt_cs[1][1] = 0x0
4444 13:08:26.710274 dump params cbt_mr12
4445 13:08:26.710362 cbt_mr12[0][0] = 0x0
4446 13:08:26.713630 cbt_mr12[0][1] = 0x0
4447 13:08:26.713716 cbt_mr12[1][0] = 0x0
4448 13:08:26.717284 cbt_mr12[1][1] = 0x0
4449 13:08:26.720609 dump params tx window
4450 13:08:26.720705 tx_center_min[0][0][0] = 0
4451 13:08:26.724001 tx_center_max[0][0][0] = 0
4452 13:08:26.727026 tx_center_min[0][0][1] = 0
4453 13:08:26.730687 tx_center_max[0][0][1] = 0
4454 13:08:26.730778 tx_center_min[0][1][0] = 0
4455 13:08:26.733878 tx_center_max[0][1][0] = 0
4456 13:08:26.736855 tx_center_min[0][1][1] = 0
4457 13:08:26.740353 tx_center_max[0][1][1] = 0
4458 13:08:26.740481 tx_center_min[1][0][0] = 0
4459 13:08:26.743666 tx_center_max[1][0][0] = 0
4460 13:08:26.747137 tx_center_min[1][0][1] = 0
4461 13:08:26.747227 tx_center_max[1][0][1] = 0
4462 13:08:26.750210 tx_center_min[1][1][0] = 0
4463 13:08:26.753508 tx_center_max[1][1][0] = 0
4464 13:08:26.757033 tx_center_min[1][1][1] = 0
4465 13:08:26.757116 tx_center_max[1][1][1] = 0
4466 13:08:26.760488 dump params tx window
4467 13:08:26.763596 tx_win_center[0][0][0] = 0
4468 13:08:26.763689 tx_first_pass[0][0][0] = 0
4469 13:08:26.767043 tx_last_pass[0][0][0] = 0
4470 13:08:26.770455 tx_win_center[0][0][1] = 0
4471 13:08:26.773735 tx_first_pass[0][0][1] = 0
4472 13:08:26.773813 tx_last_pass[0][0][1] = 0
4473 13:08:26.777044 tx_win_center[0][0][2] = 0
4474 13:08:26.780307 tx_first_pass[0][0][2] = 0
4475 13:08:26.783662 tx_last_pass[0][0][2] = 0
4476 13:08:26.783737 tx_win_center[0][0][3] = 0
4477 13:08:26.786875 tx_first_pass[0][0][3] = 0
4478 13:08:26.790632 tx_last_pass[0][0][3] = 0
4479 13:08:26.790711 tx_win_center[0][0][4] = 0
4480 13:08:26.793914 tx_first_pass[0][0][4] = 0
4481 13:08:26.797163 tx_last_pass[0][0][4] = 0
4482 13:08:26.800417 tx_win_center[0][0][5] = 0
4483 13:08:26.800507 tx_first_pass[0][0][5] = 0
4484 13:08:26.803527 tx_last_pass[0][0][5] = 0
4485 13:08:26.807064 tx_win_center[0][0][6] = 0
4486 13:08:26.810271 tx_first_pass[0][0][6] = 0
4487 13:08:26.810374 tx_last_pass[0][0][6] = 0
4488 13:08:26.813509 tx_win_center[0][0][7] = 0
4489 13:08:26.816810 tx_first_pass[0][0][7] = 0
4490 13:08:26.816883 tx_last_pass[0][0][7] = 0
4491 13:08:26.820107 tx_win_center[0][0][8] = 0
4492 13:08:26.824022 tx_first_pass[0][0][8] = 0
4493 13:08:26.826781 tx_last_pass[0][0][8] = 0
4494 13:08:26.826886 tx_win_center[0][0][9] = 0
4495 13:08:26.829960 tx_first_pass[0][0][9] = 0
4496 13:08:26.833810 tx_last_pass[0][0][9] = 0
4497 13:08:26.836465 tx_win_center[0][0][10] = 0
4498 13:08:26.836538 tx_first_pass[0][0][10] = 0
4499 13:08:26.840125 tx_last_pass[0][0][10] = 0
4500 13:08:26.843216 tx_win_center[0][0][11] = 0
4501 13:08:26.846765 tx_first_pass[0][0][11] = 0
4502 13:08:26.846840 tx_last_pass[0][0][11] = 0
4503 13:08:26.849871 tx_win_center[0][0][12] = 0
4504 13:08:26.852972 tx_first_pass[0][0][12] = 0
4505 13:08:26.856432 tx_last_pass[0][0][12] = 0
4506 13:08:26.856522 tx_win_center[0][0][13] = 0
4507 13:08:26.859772 tx_first_pass[0][0][13] = 0
4508 13:08:26.863457 tx_last_pass[0][0][13] = 0
4509 13:08:26.866858 tx_win_center[0][0][14] = 0
4510 13:08:26.866935 tx_first_pass[0][0][14] = 0
4511 13:08:26.870384 tx_last_pass[0][0][14] = 0
4512 13:08:26.873417 tx_win_center[0][0][15] = 0
4513 13:08:26.876888 tx_first_pass[0][0][15] = 0
4514 13:08:26.876974 tx_last_pass[0][0][15] = 0
4515 13:08:26.879949 tx_win_center[0][1][0] = 0
4516 13:08:26.883130 tx_first_pass[0][1][0] = 0
4517 13:08:26.886515 tx_last_pass[0][1][0] = 0
4518 13:08:26.886593 tx_win_center[0][1][1] = 0
4519 13:08:26.889748 tx_first_pass[0][1][1] = 0
4520 13:08:26.893480 tx_last_pass[0][1][1] = 0
4521 13:08:26.893560 tx_win_center[0][1][2] = 0
4522 13:08:26.896479 tx_first_pass[0][1][2] = 0
4523 13:08:26.899583 tx_last_pass[0][1][2] = 0
4524 13:08:26.903442 tx_win_center[0][1][3] = 0
4525 13:08:26.903515 tx_first_pass[0][1][3] = 0
4526 13:08:26.906841 tx_last_pass[0][1][3] = 0
4527 13:08:26.909701 tx_win_center[0][1][4] = 0
4528 13:08:26.912976 tx_first_pass[0][1][4] = 0
4529 13:08:26.913056 tx_last_pass[0][1][4] = 0
4530 13:08:26.916532 tx_win_center[0][1][5] = 0
4531 13:08:26.919813 tx_first_pass[0][1][5] = 0
4532 13:08:26.919887 tx_last_pass[0][1][5] = 0
4533 13:08:26.923117 tx_win_center[0][1][6] = 0
4534 13:08:26.926364 tx_first_pass[0][1][6] = 0
4535 13:08:26.929631 tx_last_pass[0][1][6] = 0
4536 13:08:26.929718 tx_win_center[0][1][7] = 0
4537 13:08:26.933171 tx_first_pass[0][1][7] = 0
4538 13:08:26.936545 tx_last_pass[0][1][7] = 0
4539 13:08:26.939653 tx_win_center[0][1][8] = 0
4540 13:08:26.939733 tx_first_pass[0][1][8] = 0
4541 13:08:26.943058 tx_last_pass[0][1][8] = 0
4542 13:08:26.946692 tx_win_center[0][1][9] = 0
4543 13:08:26.946771 tx_first_pass[0][1][9] = 0
4544 13:08:26.949998 tx_last_pass[0][1][9] = 0
4545 13:08:26.953414 tx_win_center[0][1][10] = 0
4546 13:08:26.956241 tx_first_pass[0][1][10] = 0
4547 13:08:26.956320 tx_last_pass[0][1][10] = 0
4548 13:08:26.959680 tx_win_center[0][1][11] = 0
4549 13:08:26.963077 tx_first_pass[0][1][11] = 0
4550 13:08:26.966351 tx_last_pass[0][1][11] = 0
4551 13:08:26.966428 tx_win_center[0][1][12] = 0
4552 13:08:26.969526 tx_first_pass[0][1][12] = 0
4553 13:08:26.972827 tx_last_pass[0][1][12] = 0
4554 13:08:26.976133 tx_win_center[0][1][13] = 0
4555 13:08:26.976210 tx_first_pass[0][1][13] = 0
4556 13:08:26.979434 tx_last_pass[0][1][13] = 0
4557 13:08:26.982660 tx_win_center[0][1][14] = 0
4558 13:08:26.986501 tx_first_pass[0][1][14] = 0
4559 13:08:26.986585 tx_last_pass[0][1][14] = 0
4560 13:08:26.990121 tx_win_center[0][1][15] = 0
4561 13:08:26.992956 tx_first_pass[0][1][15] = 0
4562 13:08:26.996287 tx_last_pass[0][1][15] = 0
4563 13:08:26.996362 tx_win_center[1][0][0] = 0
4564 13:08:26.999650 tx_first_pass[1][0][0] = 0
4565 13:08:27.002765 tx_last_pass[1][0][0] = 0
4566 13:08:27.006151 tx_win_center[1][0][1] = 0
4567 13:08:27.006222 tx_first_pass[1][0][1] = 0
4568 13:08:27.009468 tx_last_pass[1][0][1] = 0
4569 13:08:27.012868 tx_win_center[1][0][2] = 0
4570 13:08:27.016320 tx_first_pass[1][0][2] = 0
4571 13:08:27.016445 tx_last_pass[1][0][2] = 0
4572 13:08:27.019731 tx_win_center[1][0][3] = 0
4573 13:08:27.022653 tx_first_pass[1][0][3] = 0
4574 13:08:27.022745 tx_last_pass[1][0][3] = 0
4575 13:08:27.026318 tx_win_center[1][0][4] = 0
4576 13:08:27.029812 tx_first_pass[1][0][4] = 0
4577 13:08:27.033024 tx_last_pass[1][0][4] = 0
4578 13:08:27.033108 tx_win_center[1][0][5] = 0
4579 13:08:27.036064 tx_first_pass[1][0][5] = 0
4580 13:08:27.039626 tx_last_pass[1][0][5] = 0
4581 13:08:27.039709 tx_win_center[1][0][6] = 0
4582 13:08:27.043143 tx_first_pass[1][0][6] = 0
4583 13:08:27.045993 tx_last_pass[1][0][6] = 0
4584 13:08:27.049461 tx_win_center[1][0][7] = 0
4585 13:08:27.049545 tx_first_pass[1][0][7] = 0
4586 13:08:27.052831 tx_last_pass[1][0][7] = 0
4587 13:08:27.056279 tx_win_center[1][0][8] = 0
4588 13:08:27.059469 tx_first_pass[1][0][8] = 0
4589 13:08:27.059563 tx_last_pass[1][0][8] = 0
4590 13:08:27.062788 tx_win_center[1][0][9] = 0
4591 13:08:27.066127 tx_first_pass[1][0][9] = 0
4592 13:08:27.066210 tx_last_pass[1][0][9] = 0
4593 13:08:27.069103 tx_win_center[1][0][10] = 0
4594 13:08:27.072607 tx_first_pass[1][0][10] = 0
4595 13:08:27.076171 tx_last_pass[1][0][10] = 0
4596 13:08:27.076258 tx_win_center[1][0][11] = 0
4597 13:08:27.079417 tx_first_pass[1][0][11] = 0
4598 13:08:27.082610 tx_last_pass[1][0][11] = 0
4599 13:08:27.085873 tx_win_center[1][0][12] = 0
4600 13:08:27.085968 tx_first_pass[1][0][12] = 0
4601 13:08:27.088985 tx_last_pass[1][0][12] = 0
4602 13:08:27.092931 tx_win_center[1][0][13] = 0
4603 13:08:27.095574 tx_first_pass[1][0][13] = 0
4604 13:08:27.095648 tx_last_pass[1][0][13] = 0
4605 13:08:27.098848 tx_win_center[1][0][14] = 0
4606 13:08:27.102653 tx_first_pass[1][0][14] = 0
4607 13:08:27.105888 tx_last_pass[1][0][14] = 0
4608 13:08:27.105990 tx_win_center[1][0][15] = 0
4609 13:08:27.109356 tx_first_pass[1][0][15] = 0
4610 13:08:27.112773 tx_last_pass[1][0][15] = 0
4611 13:08:27.116046 tx_win_center[1][1][0] = 0
4612 13:08:27.116144 tx_first_pass[1][1][0] = 0
4613 13:08:27.119392 tx_last_pass[1][1][0] = 0
4614 13:08:27.122555 tx_win_center[1][1][1] = 0
4615 13:08:27.125994 tx_first_pass[1][1][1] = 0
4616 13:08:27.126087 tx_last_pass[1][1][1] = 0
4617 13:08:27.129416 tx_win_center[1][1][2] = 0
4618 13:08:27.132805 tx_first_pass[1][1][2] = 0
4619 13:08:27.132889 tx_last_pass[1][1][2] = 0
4620 13:08:27.136362 tx_win_center[1][1][3] = 0
4621 13:08:27.139286 tx_first_pass[1][1][3] = 0
4622 13:08:27.142637 tx_last_pass[1][1][3] = 0
4623 13:08:27.142716 tx_win_center[1][1][4] = 0
4624 13:08:27.145916 tx_first_pass[1][1][4] = 0
4625 13:08:27.149530 tx_last_pass[1][1][4] = 0
4626 13:08:27.149617 tx_win_center[1][1][5] = 0
4627 13:08:27.152747 tx_first_pass[1][1][5] = 0
4628 13:08:27.156373 tx_last_pass[1][1][5] = 0
4629 13:08:27.159291 tx_win_center[1][1][6] = 0
4630 13:08:27.159380 tx_first_pass[1][1][6] = 0
4631 13:08:27.162722 tx_last_pass[1][1][6] = 0
4632 13:08:27.165945 tx_win_center[1][1][7] = 0
4633 13:08:27.169495 tx_first_pass[1][1][7] = 0
4634 13:08:27.169582 tx_last_pass[1][1][7] = 0
4635 13:08:27.172443 tx_win_center[1][1][8] = 0
4636 13:08:27.176388 tx_first_pass[1][1][8] = 0
4637 13:08:27.176510 tx_last_pass[1][1][8] = 0
4638 13:08:27.179104 tx_win_center[1][1][9] = 0
4639 13:08:27.182542 tx_first_pass[1][1][9] = 0
4640 13:08:27.185656 tx_last_pass[1][1][9] = 0
4641 13:08:27.185740 tx_win_center[1][1][10] = 0
4642 13:08:27.189495 tx_first_pass[1][1][10] = 0
4643 13:08:27.192511 tx_last_pass[1][1][10] = 0
4644 13:08:27.195700 tx_win_center[1][1][11] = 0
4645 13:08:27.195783 tx_first_pass[1][1][11] = 0
4646 13:08:27.198977 tx_last_pass[1][1][11] = 0
4647 13:08:27.202398 tx_win_center[1][1][12] = 0
4648 13:08:27.205645 tx_first_pass[1][1][12] = 0
4649 13:08:27.205726 tx_last_pass[1][1][12] = 0
4650 13:08:27.209003 tx_win_center[1][1][13] = 0
4651 13:08:27.212210 tx_first_pass[1][1][13] = 0
4652 13:08:27.216042 tx_last_pass[1][1][13] = 0
4653 13:08:27.216121 tx_win_center[1][1][14] = 0
4654 13:08:27.219261 tx_first_pass[1][1][14] = 0
4655 13:08:27.222728 tx_last_pass[1][1][14] = 0
4656 13:08:27.226108 tx_win_center[1][1][15] = 0
4657 13:08:27.226208 tx_first_pass[1][1][15] = 0
4658 13:08:27.229008 tx_last_pass[1][1][15] = 0
4659 13:08:27.232964 dump params rx window
4660 13:08:27.233050 rx_firspass[0][0][0] = 0
4661 13:08:27.235624 rx_lastpass[0][0][0] = 0
4662 13:08:27.239336 rx_firspass[0][0][1] = 0
4663 13:08:27.242641 rx_lastpass[0][0][1] = 0
4664 13:08:27.242737 rx_firspass[0][0][2] = 0
4665 13:08:27.245658 rx_lastpass[0][0][2] = 0
4666 13:08:27.249260 rx_firspass[0][0][3] = 0
4667 13:08:27.249350 rx_lastpass[0][0][3] = 0
4668 13:08:27.252533 rx_firspass[0][0][4] = 0
4669 13:08:27.255517 rx_lastpass[0][0][4] = 0
4670 13:08:27.255594 rx_firspass[0][0][5] = 0
4671 13:08:27.258856 rx_lastpass[0][0][5] = 0
4672 13:08:27.262461 rx_firspass[0][0][6] = 0
4673 13:08:27.262541 rx_lastpass[0][0][6] = 0
4674 13:08:27.265666 rx_firspass[0][0][7] = 0
4675 13:08:27.269284 rx_lastpass[0][0][7] = 0
4676 13:08:27.269375 rx_firspass[0][0][8] = 0
4677 13:08:27.272190 rx_lastpass[0][0][8] = 0
4678 13:08:27.275755 rx_firspass[0][0][9] = 0
4679 13:08:27.278981 rx_lastpass[0][0][9] = 0
4680 13:08:27.279096 rx_firspass[0][0][10] = 0
4681 13:08:27.282238 rx_lastpass[0][0][10] = 0
4682 13:08:27.285646 rx_firspass[0][0][11] = 0
4683 13:08:27.285749 rx_lastpass[0][0][11] = 0
4684 13:08:27.288943 rx_firspass[0][0][12] = 0
4685 13:08:27.292025 rx_lastpass[0][0][12] = 0
4686 13:08:27.295561 rx_firspass[0][0][13] = 0
4687 13:08:27.295661 rx_lastpass[0][0][13] = 0
4688 13:08:27.299146 rx_firspass[0][0][14] = 0
4689 13:08:27.302373 rx_lastpass[0][0][14] = 0
4690 13:08:27.302449 rx_firspass[0][0][15] = 0
4691 13:08:27.305881 rx_lastpass[0][0][15] = 0
4692 13:08:27.308954 rx_firspass[0][1][0] = 0
4693 13:08:27.309063 rx_lastpass[0][1][0] = 0
4694 13:08:27.312136 rx_firspass[0][1][1] = 0
4695 13:08:27.315765 rx_lastpass[0][1][1] = 0
4696 13:08:27.318965 rx_firspass[0][1][2] = 0
4697 13:08:27.319049 rx_lastpass[0][1][2] = 0
4698 13:08:27.322436 rx_firspass[0][1][3] = 0
4699 13:08:27.325538 rx_lastpass[0][1][3] = 0
4700 13:08:27.325629 rx_firspass[0][1][4] = 0
4701 13:08:27.328526 rx_lastpass[0][1][4] = 0
4702 13:08:27.332387 rx_firspass[0][1][5] = 0
4703 13:08:27.332516 rx_lastpass[0][1][5] = 0
4704 13:08:27.335341 rx_firspass[0][1][6] = 0
4705 13:08:27.338712 rx_lastpass[0][1][6] = 0
4706 13:08:27.338799 rx_firspass[0][1][7] = 0
4707 13:08:27.342019 rx_lastpass[0][1][7] = 0
4708 13:08:27.345412 rx_firspass[0][1][8] = 0
4709 13:08:27.345503 rx_lastpass[0][1][8] = 0
4710 13:08:27.348662 rx_firspass[0][1][9] = 0
4711 13:08:27.352331 rx_lastpass[0][1][9] = 0
4712 13:08:27.355533 rx_firspass[0][1][10] = 0
4713 13:08:27.355618 rx_lastpass[0][1][10] = 0
4714 13:08:27.358642 rx_firspass[0][1][11] = 0
4715 13:08:27.362466 rx_lastpass[0][1][11] = 0
4716 13:08:27.362581 rx_firspass[0][1][12] = 0
4717 13:08:27.365676 rx_lastpass[0][1][12] = 0
4718 13:08:27.368879 rx_firspass[0][1][13] = 0
4719 13:08:27.372160 rx_lastpass[0][1][13] = 0
4720 13:08:27.372262 rx_firspass[0][1][14] = 0
4721 13:08:27.375560 rx_lastpass[0][1][14] = 0
4722 13:08:27.378692 rx_firspass[0][1][15] = 0
4723 13:08:27.378795 rx_lastpass[0][1][15] = 0
4724 13:08:27.381927 rx_firspass[1][0][0] = 0
4725 13:08:27.385517 rx_lastpass[1][0][0] = 0
4726 13:08:27.385598 rx_firspass[1][0][1] = 0
4727 13:08:27.389051 rx_lastpass[1][0][1] = 0
4728 13:08:27.391930 rx_firspass[1][0][2] = 0
4729 13:08:27.392019 rx_lastpass[1][0][2] = 0
4730 13:08:27.395490 rx_firspass[1][0][3] = 0
4731 13:08:27.398610 rx_lastpass[1][0][3] = 0
4732 13:08:27.401885 rx_firspass[1][0][4] = 0
4733 13:08:27.401973 rx_lastpass[1][0][4] = 0
4734 13:08:27.405140 rx_firspass[1][0][5] = 0
4735 13:08:27.408832 rx_lastpass[1][0][5] = 0
4736 13:08:27.408955 rx_firspass[1][0][6] = 0
4737 13:08:27.412088 rx_lastpass[1][0][6] = 0
4738 13:08:27.415114 rx_firspass[1][0][7] = 0
4739 13:08:27.415217 rx_lastpass[1][0][7] = 0
4740 13:08:27.418516 rx_firspass[1][0][8] = 0
4741 13:08:27.421794 rx_lastpass[1][0][8] = 0
4742 13:08:27.421875 rx_firspass[1][0][9] = 0
4743 13:08:27.425070 rx_lastpass[1][0][9] = 0
4744 13:08:27.428583 rx_firspass[1][0][10] = 0
4745 13:08:27.431808 rx_lastpass[1][0][10] = 0
4746 13:08:27.431897 rx_firspass[1][0][11] = 0
4747 13:08:27.435104 rx_lastpass[1][0][11] = 0
4748 13:08:27.438336 rx_firspass[1][0][12] = 0
4749 13:08:27.438411 rx_lastpass[1][0][12] = 0
4750 13:08:27.441676 rx_firspass[1][0][13] = 0
4751 13:08:27.444875 rx_lastpass[1][0][13] = 0
4752 13:08:27.448185 rx_firspass[1][0][14] = 0
4753 13:08:27.448264 rx_lastpass[1][0][14] = 0
4754 13:08:27.451584 rx_firspass[1][0][15] = 0
4755 13:08:27.455558 rx_lastpass[1][0][15] = 0
4756 13:08:27.455636 rx_firspass[1][1][0] = 0
4757 13:08:27.458694 rx_lastpass[1][1][0] = 0
4758 13:08:27.461884 rx_firspass[1][1][1] = 0
4759 13:08:27.461973 rx_lastpass[1][1][1] = 0
4760 13:08:27.464789 rx_firspass[1][1][2] = 0
4761 13:08:27.468574 rx_lastpass[1][1][2] = 0
4762 13:08:27.468660 rx_firspass[1][1][3] = 0
4763 13:08:27.471991 rx_lastpass[1][1][3] = 0
4764 13:08:27.475037 rx_firspass[1][1][4] = 0
4765 13:08:27.478660 rx_lastpass[1][1][4] = 0
4766 13:08:27.478736 rx_firspass[1][1][5] = 0
4767 13:08:27.481845 rx_lastpass[1][1][5] = 0
4768 13:08:27.485138 rx_firspass[1][1][6] = 0
4769 13:08:27.485218 rx_lastpass[1][1][6] = 0
4770 13:08:27.488252 rx_firspass[1][1][7] = 0
4771 13:08:27.491423 rx_lastpass[1][1][7] = 0
4772 13:08:27.491504 rx_firspass[1][1][8] = 0
4773 13:08:27.494926 rx_lastpass[1][1][8] = 0
4774 13:08:27.498496 rx_firspass[1][1][9] = 0
4775 13:08:27.498575 rx_lastpass[1][1][9] = 0
4776 13:08:27.501611 rx_firspass[1][1][10] = 0
4777 13:08:27.505296 rx_lastpass[1][1][10] = 0
4778 13:08:27.508105 rx_firspass[1][1][11] = 0
4779 13:08:27.508215 rx_lastpass[1][1][11] = 0
4780 13:08:27.511490 rx_firspass[1][1][12] = 0
4781 13:08:27.515057 rx_lastpass[1][1][12] = 0
4782 13:08:27.515175 rx_firspass[1][1][13] = 0
4783 13:08:27.518212 rx_lastpass[1][1][13] = 0
4784 13:08:27.521880 rx_firspass[1][1][14] = 0
4785 13:08:27.525092 rx_lastpass[1][1][14] = 0
4786 13:08:27.525176 rx_firspass[1][1][15] = 0
4787 13:08:27.528332 rx_lastpass[1][1][15] = 0
4788 13:08:27.531701 dump params clk_delay
4789 13:08:27.531785 clk_delay[0] = 0
4790 13:08:27.531849 clk_delay[1] = 0
4791 13:08:27.534965 dump params dqs_delay
4792 13:08:27.538410 dqs_delay[0][0] = 0
4793 13:08:27.538512 dqs_delay[0][1] = 0
4794 13:08:27.541770 dqs_delay[1][0] = 0
4795 13:08:27.541873 dqs_delay[1][1] = 0
4796 13:08:27.545298 dump params delay_cell_unit = 735
4797 13:08:27.548833 dump source = 0x0
4798 13:08:27.548916 dump params frequency:800
4799 13:08:27.551623 dump params rank number:2
4800 13:08:27.551707
4801 13:08:27.555083 dump params write leveling
4802 13:08:27.558545 write leveling[0][0][0] = 0x0
4803 13:08:27.558621 write leveling[0][0][1] = 0x0
4804 13:08:27.561660 write leveling[0][1][0] = 0x0
4805 13:08:27.565540 write leveling[0][1][1] = 0x0
4806 13:08:27.568597 write leveling[1][0][0] = 0x0
4807 13:08:27.572133 write leveling[1][0][1] = 0x0
4808 13:08:27.572217 write leveling[1][1][0] = 0x0
4809 13:08:27.575418 write leveling[1][1][1] = 0x0
4810 13:08:27.578478 dump params cbt_cs
4811 13:08:27.578562 cbt_cs[0][0] = 0x0
4812 13:08:27.582171 cbt_cs[0][1] = 0x0
4813 13:08:27.582255 cbt_cs[1][0] = 0x0
4814 13:08:27.585419 cbt_cs[1][1] = 0x0
4815 13:08:27.585504 dump params cbt_mr12
4816 13:08:27.588335 cbt_mr12[0][0] = 0x0
4817 13:08:27.588444 cbt_mr12[0][1] = 0x0
4818 13:08:27.591764 cbt_mr12[1][0] = 0x0
4819 13:08:27.594941 cbt_mr12[1][1] = 0x0
4820 13:08:27.595026 dump params tx window
4821 13:08:27.598616 tx_center_min[0][0][0] = 0
4822 13:08:27.601778 tx_center_max[0][0][0] = 0
4823 13:08:27.601865 tx_center_min[0][0][1] = 0
4824 13:08:27.604950 tx_center_max[0][0][1] = 0
4825 13:08:27.608564 tx_center_min[0][1][0] = 0
4826 13:08:27.611767 tx_center_max[0][1][0] = 0
4827 13:08:27.611854 tx_center_min[0][1][1] = 0
4828 13:08:27.615231 tx_center_max[0][1][1] = 0
4829 13:08:27.618306 tx_center_min[1][0][0] = 0
4830 13:08:27.621607 tx_center_max[1][0][0] = 0
4831 13:08:27.621694 tx_center_min[1][0][1] = 0
4832 13:08:27.625059 tx_center_max[1][0][1] = 0
4833 13:08:27.628297 tx_center_min[1][1][0] = 0
4834 13:08:27.631252 tx_center_max[1][1][0] = 0
4835 13:08:27.631339 tx_center_min[1][1][1] = 0
4836 13:08:27.635098 tx_center_max[1][1][1] = 0
4837 13:08:27.638414 dump params tx window
4838 13:08:27.638500 tx_win_center[0][0][0] = 0
4839 13:08:27.641806 tx_first_pass[0][0][0] = 0
4840 13:08:27.645164 tx_last_pass[0][0][0] = 0
4841 13:08:27.648178 tx_win_center[0][0][1] = 0
4842 13:08:27.648267 tx_first_pass[0][0][1] = 0
4843 13:08:27.651482 tx_last_pass[0][0][1] = 0
4844 13:08:27.654858 tx_win_center[0][0][2] = 0
4845 13:08:27.658141 tx_first_pass[0][0][2] = 0
4846 13:08:27.658227 tx_last_pass[0][0][2] = 0
4847 13:08:27.661374 tx_win_center[0][0][3] = 0
4848 13:08:27.664561 tx_first_pass[0][0][3] = 0
4849 13:08:27.664648 tx_last_pass[0][0][3] = 0
4850 13:08:27.668460 tx_win_center[0][0][4] = 0
4851 13:08:27.671296 tx_first_pass[0][0][4] = 0
4852 13:08:27.674892 tx_last_pass[0][0][4] = 0
4853 13:08:27.674979 tx_win_center[0][0][5] = 0
4854 13:08:27.678352 tx_first_pass[0][0][5] = 0
4855 13:08:27.681158 tx_last_pass[0][0][5] = 0
4856 13:08:27.684895 tx_win_center[0][0][6] = 0
4857 13:08:27.685007 tx_first_pass[0][0][6] = 0
4858 13:08:27.688301 tx_last_pass[0][0][6] = 0
4859 13:08:27.691366 tx_win_center[0][0][7] = 0
4860 13:08:27.691453 tx_first_pass[0][0][7] = 0
4861 13:08:27.694643 tx_last_pass[0][0][7] = 0
4862 13:08:27.698006 tx_win_center[0][0][8] = 0
4863 13:08:27.701254 tx_first_pass[0][0][8] = 0
4864 13:08:27.701338 tx_last_pass[0][0][8] = 0
4865 13:08:27.704312 tx_win_center[0][0][9] = 0
4866 13:08:27.707918 tx_first_pass[0][0][9] = 0
4867 13:08:27.711102 tx_last_pass[0][0][9] = 0
4868 13:08:27.711186 tx_win_center[0][0][10] = 0
4869 13:08:27.714534 tx_first_pass[0][0][10] = 0
4870 13:08:27.717707 tx_last_pass[0][0][10] = 0
4871 13:08:27.721718 tx_win_center[0][0][11] = 0
4872 13:08:27.721801 tx_first_pass[0][0][11] = 0
4873 13:08:27.724821 tx_last_pass[0][0][11] = 0
4874 13:08:27.727820 tx_win_center[0][0][12] = 0
4875 13:08:27.731202 tx_first_pass[0][0][12] = 0
4876 13:08:27.731286 tx_last_pass[0][0][12] = 0
4877 13:08:27.734576 tx_win_center[0][0][13] = 0
4878 13:08:27.737421 tx_first_pass[0][0][13] = 0
4879 13:08:27.741405 tx_last_pass[0][0][13] = 0
4880 13:08:27.741488 tx_win_center[0][0][14] = 0
4881 13:08:27.744550 tx_first_pass[0][0][14] = 0
4882 13:08:27.747777 tx_last_pass[0][0][14] = 0
4883 13:08:27.751366 tx_win_center[0][0][15] = 0
4884 13:08:27.751454 tx_first_pass[0][0][15] = 0
4885 13:08:27.754165 tx_last_pass[0][0][15] = 0
4886 13:08:27.757671 tx_win_center[0][1][0] = 0
4887 13:08:27.760941 tx_first_pass[0][1][0] = 0
4888 13:08:27.761050 tx_last_pass[0][1][0] = 0
4889 13:08:27.764072 tx_win_center[0][1][1] = 0
4890 13:08:27.767432 tx_first_pass[0][1][1] = 0
4891 13:08:27.767552 tx_last_pass[0][1][1] = 0
4892 13:08:27.770819 tx_win_center[0][1][2] = 0
4893 13:08:27.774080 tx_first_pass[0][1][2] = 0
4894 13:08:27.777420 tx_last_pass[0][1][2] = 0
4895 13:08:27.777505 tx_win_center[0][1][3] = 0
4896 13:08:27.781033 tx_first_pass[0][1][3] = 0
4897 13:08:27.784097 tx_last_pass[0][1][3] = 0
4898 13:08:27.787759 tx_win_center[0][1][4] = 0
4899 13:08:27.787843 tx_first_pass[0][1][4] = 0
4900 13:08:27.790929 tx_last_pass[0][1][4] = 0
4901 13:08:27.793906 tx_win_center[0][1][5] = 0
4902 13:08:27.793990 tx_first_pass[0][1][5] = 0
4903 13:08:27.797689 tx_last_pass[0][1][5] = 0
4904 13:08:27.800753 tx_win_center[0][1][6] = 0
4905 13:08:27.803896 tx_first_pass[0][1][6] = 0
4906 13:08:27.803979 tx_last_pass[0][1][6] = 0
4907 13:08:27.807345 tx_win_center[0][1][7] = 0
4908 13:08:27.810786 tx_first_pass[0][1][7] = 0
4909 13:08:27.814134 tx_last_pass[0][1][7] = 0
4910 13:08:27.814217 tx_win_center[0][1][8] = 0
4911 13:08:27.817040 tx_first_pass[0][1][8] = 0
4912 13:08:27.820690 tx_last_pass[0][1][8] = 0
4913 13:08:27.820774 tx_win_center[0][1][9] = 0
4914 13:08:27.823900 tx_first_pass[0][1][9] = 0
4915 13:08:27.827613 tx_last_pass[0][1][9] = 0
4916 13:08:27.830641 tx_win_center[0][1][10] = 0
4917 13:08:27.830725 tx_first_pass[0][1][10] = 0
4918 13:08:27.833962 tx_last_pass[0][1][10] = 0
4919 13:08:27.837193 tx_win_center[0][1][11] = 0
4920 13:08:27.840473 tx_first_pass[0][1][11] = 0
4921 13:08:27.840557 tx_last_pass[0][1][11] = 0
4922 13:08:27.844146 tx_win_center[0][1][12] = 0
4923 13:08:27.846955 tx_first_pass[0][1][12] = 0
4924 13:08:27.850427 tx_last_pass[0][1][12] = 0
4925 13:08:27.850519 tx_win_center[0][1][13] = 0
4926 13:08:27.853774 tx_first_pass[0][1][13] = 0
4927 13:08:27.856973 tx_last_pass[0][1][13] = 0
4928 13:08:27.860540 tx_win_center[0][1][14] = 0
4929 13:08:27.860664 tx_first_pass[0][1][14] = 0
4930 13:08:27.863623 tx_last_pass[0][1][14] = 0
4931 13:08:27.867056 tx_win_center[0][1][15] = 0
4932 13:08:27.870461 tx_first_pass[0][1][15] = 0
4933 13:08:27.870548 tx_last_pass[0][1][15] = 0
4934 13:08:27.873671 tx_win_center[1][0][0] = 0
4935 13:08:27.877075 tx_first_pass[1][0][0] = 0
4936 13:08:27.880458 tx_last_pass[1][0][0] = 0
4937 13:08:27.880548 tx_win_center[1][0][1] = 0
4938 13:08:27.883698 tx_first_pass[1][0][1] = 0
4939 13:08:27.887002 tx_last_pass[1][0][1] = 0
4940 13:08:27.890192 tx_win_center[1][0][2] = 0
4941 13:08:27.890278 tx_first_pass[1][0][2] = 0
4942 13:08:27.893716 tx_last_pass[1][0][2] = 0
4943 13:08:27.897187 tx_win_center[1][0][3] = 0
4944 13:08:27.897276 tx_first_pass[1][0][3] = 0
4945 13:08:27.900589 tx_last_pass[1][0][3] = 0
4946 13:08:27.903545 tx_win_center[1][0][4] = 0
4947 13:08:27.906869 tx_first_pass[1][0][4] = 0
4948 13:08:27.906953 tx_last_pass[1][0][4] = 0
4949 13:08:27.910093 tx_win_center[1][0][5] = 0
4950 13:08:27.913506 tx_first_pass[1][0][5] = 0
4951 13:08:27.913590 tx_last_pass[1][0][5] = 0
4952 13:08:27.917090 tx_win_center[1][0][6] = 0
4953 13:08:27.920118 tx_first_pass[1][0][6] = 0
4954 13:08:27.923578 tx_last_pass[1][0][6] = 0
4955 13:08:27.923661 tx_win_center[1][0][7] = 0
4956 13:08:27.927332 tx_first_pass[1][0][7] = 0
4957 13:08:27.930365 tx_last_pass[1][0][7] = 0
4958 13:08:27.933463 tx_win_center[1][0][8] = 0
4959 13:08:27.933577 tx_first_pass[1][0][8] = 0
4960 13:08:27.937221 tx_last_pass[1][0][8] = 0
4961 13:08:27.940582 tx_win_center[1][0][9] = 0
4962 13:08:27.940685 tx_first_pass[1][0][9] = 0
4963 13:08:27.944005 tx_last_pass[1][0][9] = 0
4964 13:08:27.946846 tx_win_center[1][0][10] = 0
4965 13:08:27.950253 tx_first_pass[1][0][10] = 0
4966 13:08:27.950358 tx_last_pass[1][0][10] = 0
4967 13:08:27.953741 tx_win_center[1][0][11] = 0
4968 13:08:27.957004 tx_first_pass[1][0][11] = 0
4969 13:08:27.960289 tx_last_pass[1][0][11] = 0
4970 13:08:27.960400 tx_win_center[1][0][12] = 0
4971 13:08:27.963652 tx_first_pass[1][0][12] = 0
4972 13:08:27.966872 tx_last_pass[1][0][12] = 0
4973 13:08:27.969956 tx_win_center[1][0][13] = 0
4974 13:08:27.973168 tx_first_pass[1][0][13] = 0
4975 13:08:27.973274 tx_last_pass[1][0][13] = 0
4976 13:08:27.977144 tx_win_center[1][0][14] = 0
4977 13:08:27.980438 tx_first_pass[1][0][14] = 0
4978 13:08:27.980544 tx_last_pass[1][0][14] = 0
4979 13:08:27.983647 tx_win_center[1][0][15] = 0
4980 13:08:27.987198 tx_first_pass[1][0][15] = 0
4981 13:08:27.989881 tx_last_pass[1][0][15] = 0
4982 13:08:27.989968 tx_win_center[1][1][0] = 0
4983 13:08:27.993145 tx_first_pass[1][1][0] = 0
4984 13:08:27.996933 tx_last_pass[1][1][0] = 0
4985 13:08:27.999984 tx_win_center[1][1][1] = 0
4986 13:08:28.000070 tx_first_pass[1][1][1] = 0
4987 13:08:28.003687 tx_last_pass[1][1][1] = 0
4988 13:08:28.007096 tx_win_center[1][1][2] = 0
4989 13:08:28.010354 tx_first_pass[1][1][2] = 0
4990 13:08:28.010443 tx_last_pass[1][1][2] = 0
4991 13:08:28.013615 tx_win_center[1][1][3] = 0
4992 13:08:28.017136 tx_first_pass[1][1][3] = 0
4993 13:08:28.017223 tx_last_pass[1][1][3] = 0
4994 13:08:28.020110 tx_win_center[1][1][4] = 0
4995 13:08:28.023655 tx_first_pass[1][1][4] = 0
4996 13:08:28.026697 tx_last_pass[1][1][4] = 0
4997 13:08:28.026784 tx_win_center[1][1][5] = 0
4998 13:08:28.030397 tx_first_pass[1][1][5] = 0
4999 13:08:28.033803 tx_last_pass[1][1][5] = 0
5000 13:08:28.033889 tx_win_center[1][1][6] = 0
5001 13:08:28.036826 tx_first_pass[1][1][6] = 0
5002 13:08:28.039790 tx_last_pass[1][1][6] = 0
5003 13:08:28.043856 tx_win_center[1][1][7] = 0
5004 13:08:28.043943 tx_first_pass[1][1][7] = 0
5005 13:08:28.046857 tx_last_pass[1][1][7] = 0
5006 13:08:28.050168 tx_win_center[1][1][8] = 0
5007 13:08:28.053576 tx_first_pass[1][1][8] = 0
5008 13:08:28.053664 tx_last_pass[1][1][8] = 0
5009 13:08:28.056974 tx_win_center[1][1][9] = 0
5010 13:08:28.060244 tx_first_pass[1][1][9] = 0
5011 13:08:28.060356 tx_last_pass[1][1][9] = 0
5012 13:08:28.063464 tx_win_center[1][1][10] = 0
5013 13:08:28.067051 tx_first_pass[1][1][10] = 0
5014 13:08:28.069944 tx_last_pass[1][1][10] = 0
5015 13:08:28.070028 tx_win_center[1][1][11] = 0
5016 13:08:28.073345 tx_first_pass[1][1][11] = 0
5017 13:08:28.076488 tx_last_pass[1][1][11] = 0
5018 13:08:28.079846 tx_win_center[1][1][12] = 0
5019 13:08:28.083043 tx_first_pass[1][1][12] = 0
5020 13:08:28.083129 tx_last_pass[1][1][12] = 0
5021 13:08:28.086342 tx_win_center[1][1][13] = 0
5022 13:08:28.089653 tx_first_pass[1][1][13] = 0
5023 13:08:28.089738 tx_last_pass[1][1][13] = 0
5024 13:08:28.093124 tx_win_center[1][1][14] = 0
5025 13:08:28.096417 tx_first_pass[1][1][14] = 0
5026 13:08:28.099751 tx_last_pass[1][1][14] = 0
5027 13:08:28.103206 tx_win_center[1][1][15] = 0
5028 13:08:28.103290 tx_first_pass[1][1][15] = 0
5029 13:08:28.106235 tx_last_pass[1][1][15] = 0
5030 13:08:28.109596 dump params rx window
5031 13:08:28.109680 rx_firspass[0][0][0] = 0
5032 13:08:28.113396 rx_lastpass[0][0][0] = 0
5033 13:08:28.116659 rx_firspass[0][0][1] = 0
5034 13:08:28.116742 rx_lastpass[0][0][1] = 0
5035 13:08:28.119681 rx_firspass[0][0][2] = 0
5036 13:08:28.123163 rx_lastpass[0][0][2] = 0
5037 13:08:28.123247 rx_firspass[0][0][3] = 0
5038 13:08:28.126810 rx_lastpass[0][0][3] = 0
5039 13:08:28.129739 rx_firspass[0][0][4] = 0
5040 13:08:28.129823 rx_lastpass[0][0][4] = 0
5041 13:08:28.133244 rx_firspass[0][0][5] = 0
5042 13:08:28.136818 rx_lastpass[0][0][5] = 0
5043 13:08:28.140086 rx_firspass[0][0][6] = 0
5044 13:08:28.140171 rx_lastpass[0][0][6] = 0
5045 13:08:28.143584 rx_firspass[0][0][7] = 0
5046 13:08:28.146644 rx_lastpass[0][0][7] = 0
5047 13:08:28.146728 rx_firspass[0][0][8] = 0
5048 13:08:28.150001 rx_lastpass[0][0][8] = 0
5049 13:08:28.152938 rx_firspass[0][0][9] = 0
5050 13:08:28.153022 rx_lastpass[0][0][9] = 0
5051 13:08:28.156361 rx_firspass[0][0][10] = 0
5052 13:08:28.159868 rx_lastpass[0][0][10] = 0
5053 13:08:28.159952 rx_firspass[0][0][11] = 0
5054 13:08:28.163474 rx_lastpass[0][0][11] = 0
5055 13:08:28.166500 rx_firspass[0][0][12] = 0
5056 13:08:28.169710 rx_lastpass[0][0][12] = 0
5057 13:08:28.169795 rx_firspass[0][0][13] = 0
5058 13:08:28.172738 rx_lastpass[0][0][13] = 0
5059 13:08:28.176100 rx_firspass[0][0][14] = 0
5060 13:08:28.179795 rx_lastpass[0][0][14] = 0
5061 13:08:28.179910 rx_firspass[0][0][15] = 0
5062 13:08:28.183215 rx_lastpass[0][0][15] = 0
5063 13:08:28.185993 rx_firspass[0][1][0] = 0
5064 13:08:28.186094 rx_lastpass[0][1][0] = 0
5065 13:08:28.189564 rx_firspass[0][1][1] = 0
5066 13:08:28.192878 rx_lastpass[0][1][1] = 0
5067 13:08:28.192968 rx_firspass[0][1][2] = 0
5068 13:08:28.196210 rx_lastpass[0][1][2] = 0
5069 13:08:28.199438 rx_firspass[0][1][3] = 0
5070 13:08:28.199522 rx_lastpass[0][1][3] = 0
5071 13:08:28.202799 rx_firspass[0][1][4] = 0
5072 13:08:28.206284 rx_lastpass[0][1][4] = 0
5073 13:08:28.206368 rx_firspass[0][1][5] = 0
5074 13:08:28.209325 rx_lastpass[0][1][5] = 0
5075 13:08:28.212693 rx_firspass[0][1][6] = 0
5076 13:08:28.215807 rx_lastpass[0][1][6] = 0
5077 13:08:28.215914 rx_firspass[0][1][7] = 0
5078 13:08:28.219334 rx_lastpass[0][1][7] = 0
5079 13:08:28.222853 rx_firspass[0][1][8] = 0
5080 13:08:28.222960 rx_lastpass[0][1][8] = 0
5081 13:08:28.225978 rx_firspass[0][1][9] = 0
5082 13:08:28.229238 rx_lastpass[0][1][9] = 0
5083 13:08:28.229338 rx_firspass[0][1][10] = 0
5084 13:08:28.232878 rx_lastpass[0][1][10] = 0
5085 13:08:28.236128 rx_firspass[0][1][11] = 0
5086 13:08:28.239504 rx_lastpass[0][1][11] = 0
5087 13:08:28.239605 rx_firspass[0][1][12] = 0
5088 13:08:28.242364 rx_lastpass[0][1][12] = 0
5089 13:08:28.245590 rx_firspass[0][1][13] = 0
5090 13:08:28.245675 rx_lastpass[0][1][13] = 0
5091 13:08:28.249561 rx_firspass[0][1][14] = 0
5092 13:08:28.252740 rx_lastpass[0][1][14] = 0
5093 13:08:28.255786 rx_firspass[0][1][15] = 0
5094 13:08:28.255871 rx_lastpass[0][1][15] = 0
5095 13:08:28.258938 rx_firspass[1][0][0] = 0
5096 13:08:28.262444 rx_lastpass[1][0][0] = 0
5097 13:08:28.262529 rx_firspass[1][0][1] = 0
5098 13:08:28.265835 rx_lastpass[1][0][1] = 0
5099 13:08:28.269143 rx_firspass[1][0][2] = 0
5100 13:08:28.269228 rx_lastpass[1][0][2] = 0
5101 13:08:28.272299 rx_firspass[1][0][3] = 0
5102 13:08:28.276081 rx_lastpass[1][0][3] = 0
5103 13:08:28.276166 rx_firspass[1][0][4] = 0
5104 13:08:28.279024 rx_lastpass[1][0][4] = 0
5105 13:08:28.282821 rx_firspass[1][0][5] = 0
5106 13:08:28.282906 rx_lastpass[1][0][5] = 0
5107 13:08:28.285564 rx_firspass[1][0][6] = 0
5108 13:08:28.289351 rx_lastpass[1][0][6] = 0
5109 13:08:28.289436 rx_firspass[1][0][7] = 0
5110 13:08:28.292740 rx_lastpass[1][0][7] = 0
5111 13:08:28.296214 rx_firspass[1][0][8] = 0
5112 13:08:28.299332 rx_lastpass[1][0][8] = 0
5113 13:08:28.299417 rx_firspass[1][0][9] = 0
5114 13:08:28.302500 rx_lastpass[1][0][9] = 0
5115 13:08:28.305661 rx_firspass[1][0][10] = 0
5116 13:08:28.305745 rx_lastpass[1][0][10] = 0
5117 13:08:28.309163 rx_firspass[1][0][11] = 0
5118 13:08:28.312388 rx_lastpass[1][0][11] = 0
5119 13:08:28.312479 rx_firspass[1][0][12] = 0
5120 13:08:28.315795 rx_lastpass[1][0][12] = 0
5121 13:08:28.319111 rx_firspass[1][0][13] = 0
5122 13:08:28.322565 rx_lastpass[1][0][13] = 0
5123 13:08:28.322650 rx_firspass[1][0][14] = 0
5124 13:08:28.325661 rx_lastpass[1][0][14] = 0
5125 13:08:28.329125 rx_firspass[1][0][15] = 0
5126 13:08:28.332431 rx_lastpass[1][0][15] = 0
5127 13:08:28.332524 rx_firspass[1][1][0] = 0
5128 13:08:28.335572 rx_lastpass[1][1][0] = 0
5129 13:08:28.339453 rx_firspass[1][1][1] = 0
5130 13:08:28.339537 rx_lastpass[1][1][1] = 0
5131 13:08:28.342088 rx_firspass[1][1][2] = 0
5132 13:08:28.345584 rx_lastpass[1][1][2] = 0
5133 13:08:28.345670 rx_firspass[1][1][3] = 0
5134 13:08:28.348708 rx_lastpass[1][1][3] = 0
5135 13:08:28.351991 rx_firspass[1][1][4] = 0
5136 13:08:28.352076 rx_lastpass[1][1][4] = 0
5137 13:08:28.355793 rx_firspass[1][1][5] = 0
5138 13:08:28.359047 rx_lastpass[1][1][5] = 0
5139 13:08:28.359132 rx_firspass[1][1][6] = 0
5140 13:08:28.362385 rx_lastpass[1][1][6] = 0
5141 13:08:28.365472 rx_firspass[1][1][7] = 0
5142 13:08:28.368674 rx_lastpass[1][1][7] = 0
5143 13:08:28.368759 rx_firspass[1][1][8] = 0
5144 13:08:28.371954 rx_lastpass[1][1][8] = 0
5145 13:08:28.375310 rx_firspass[1][1][9] = 0
5146 13:08:28.375395 rx_lastpass[1][1][9] = 0
5147 13:08:28.379037 rx_firspass[1][1][10] = 0
5148 13:08:28.382521 rx_lastpass[1][1][10] = 0
5149 13:08:28.382606 rx_firspass[1][1][11] = 0
5150 13:08:28.385570 rx_lastpass[1][1][11] = 0
5151 13:08:28.388858 rx_firspass[1][1][12] = 0
5152 13:08:28.392169 rx_lastpass[1][1][12] = 0
5153 13:08:28.392253 rx_firspass[1][1][13] = 0
5154 13:08:28.395786 rx_lastpass[1][1][13] = 0
5155 13:08:28.398986 rx_firspass[1][1][14] = 0
5156 13:08:28.399071 rx_lastpass[1][1][14] = 0
5157 13:08:28.402180 rx_firspass[1][1][15] = 0
5158 13:08:28.405560 rx_lastpass[1][1][15] = 0
5159 13:08:28.405645 dump params clk_delay
5160 13:08:28.408653 clk_delay[0] = 0
5161 13:08:28.408739 clk_delay[1] = 0
5162 13:08:28.412351 dump params dqs_delay
5163 13:08:28.412435 dqs_delay[0][0] = 0
5164 13:08:28.415629 dqs_delay[0][1] = 0
5165 13:08:28.418722 dqs_delay[1][0] = 0
5166 13:08:28.418807 dqs_delay[1][1] = 0
5167 13:08:28.422162 dump params delay_cell_unit = 735
5168 13:08:28.425436 mt_set_emi_preloader end
5169 13:08:28.428584 [mt_mem_init] dram size: 0x100000000, rank number: 2
5170 13:08:28.432110 [complex_mem_test] start addr:0x40000000, len:20480
5171 13:08:28.470676 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5172 13:08:28.476859 [complex_mem_test] start addr:0x80000000, len:20480
5173 13:08:28.512882 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5174 13:08:28.519459 [complex_mem_test] start addr:0xc0000000, len:20480
5175 13:08:28.555136 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5176 13:08:28.561701 [complex_mem_test] start addr:0x56000000, len:8192
5177 13:08:28.578549 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5178 13:08:28.578673 ddr_geometry:1
5179 13:08:28.584739 [complex_mem_test] start addr:0x80000000, len:8192
5180 13:08:28.602474 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5181 13:08:28.605106 dram_init: dram init end (result: 0)
5182 13:08:28.612256 Successfully loaded DRAM blobs and ran DRAM calibration
5183 13:08:28.622190 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5184 13:08:28.622311 CBMEM:
5185 13:08:28.625296 IMD: root @ 00000000fffff000 254 entries.
5186 13:08:28.629012 IMD: root @ 00000000ffffec00 62 entries.
5187 13:08:28.635324 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5188 13:08:28.641922 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5189 13:08:28.645481 in-header: 03 a1 00 00 08 00 00 00
5190 13:08:28.648637 in-data: 84 60 60 10 00 00 00 00
5191 13:08:28.652229 Chrome EC: clear events_b mask to 0x0000000020004000
5192 13:08:28.659056 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5193 13:08:28.662472 in-header: 03 fd 00 00 00 00 00 00
5194 13:08:28.662589 in-data:
5195 13:08:28.669199 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5196 13:08:28.669315 CBFS @ 21000 size 3d4000
5197 13:08:28.676134 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5198 13:08:28.679329 CBFS: Locating 'fallback/ramstage'
5199 13:08:28.682440 CBFS: Found @ offset 10d40 size d563
5200 13:08:28.703643 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5201 13:08:28.716306 Accumulated console time in romstage 13670 ms
5202 13:08:28.716427
5203 13:08:28.716523
5204 13:08:28.726046 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5205 13:08:28.729580 ARM64: Exception handlers installed.
5206 13:08:28.729687 ARM64: Testing exception
5207 13:08:28.732810 ARM64: Done test exception
5208 13:08:28.735742 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5209 13:08:28.739113 Manufacturer: ef
5210 13:08:28.742577 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5211 13:08:28.749166 WARNING: RO_VPD is uninitialized or empty.
5212 13:08:28.752536 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5213 13:08:28.755771 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5214 13:08:28.765995 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5215 13:08:28.768994 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5216 13:08:28.775595 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5217 13:08:28.775765 Enumerating buses...
5218 13:08:28.782482 Show all devs... Before device enumeration.
5219 13:08:28.782623 Root Device: enabled 1
5220 13:08:28.785476 CPU_CLUSTER: 0: enabled 1
5221 13:08:28.785580 CPU: 00: enabled 1
5222 13:08:28.789400 Compare with tree...
5223 13:08:28.792091 Root Device: enabled 1
5224 13:08:28.792197 CPU_CLUSTER: 0: enabled 1
5225 13:08:28.796163 CPU: 00: enabled 1
5226 13:08:28.798918 Root Device scanning...
5227 13:08:28.799022 root_dev_scan_bus for Root Device
5228 13:08:28.802432 CPU_CLUSTER: 0 enabled
5229 13:08:28.805597 root_dev_scan_bus for Root Device done
5230 13:08:28.812179 scan_bus: scanning of bus Root Device took 10689 usecs
5231 13:08:28.812287 done
5232 13:08:28.815545 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5233 13:08:28.818773 Allocating resources...
5234 13:08:28.818901 Reading resources...
5235 13:08:28.822055 Root Device read_resources bus 0 link: 0
5236 13:08:28.828705 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5237 13:08:28.828885 CPU: 00 missing read_resources
5238 13:08:28.835248 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5239 13:08:28.838614 Root Device read_resources bus 0 link: 0 done
5240 13:08:28.842205 Done reading resources.
5241 13:08:28.845527 Show resources in subtree (Root Device)...After reading.
5242 13:08:28.848853 Root Device child on link 0 CPU_CLUSTER: 0
5243 13:08:28.852177 CPU_CLUSTER: 0 child on link 0 CPU: 00
5244 13:08:28.862103 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5245 13:08:28.862280 CPU: 00
5246 13:08:28.865586 Setting resources...
5247 13:08:28.868657 Root Device assign_resources, bus 0 link: 0
5248 13:08:28.871770 CPU_CLUSTER: 0 missing set_resources
5249 13:08:28.875567 Root Device assign_resources, bus 0 link: 0
5250 13:08:28.879015 Done setting resources.
5251 13:08:28.885588 Show resources in subtree (Root Device)...After assigning values.
5252 13:08:28.888713 Root Device child on link 0 CPU_CLUSTER: 0
5253 13:08:28.892000 CPU_CLUSTER: 0 child on link 0 CPU: 00
5254 13:08:28.902111 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5255 13:08:28.902194 CPU: 00
5256 13:08:28.905370 Done allocating resources.
5257 13:08:28.908816 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5258 13:08:28.912565 Enabling resources...
5259 13:08:28.912649 done.
5260 13:08:28.915330 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5261 13:08:28.918630 Initializing devices...
5262 13:08:28.918716 Root Device init ...
5263 13:08:28.921938 mainboard_init: Starting display init.
5264 13:08:28.925424 ADC[4]: Raw value=76102 ID=0
5265 13:08:28.948483 anx7625_power_on_init: Init interface.
5266 13:08:28.952029 anx7625_disable_pd_protocol: Disabled PD feature.
5267 13:08:28.958156 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5268 13:08:29.005111 anx7625_start_dp_work: Secure OCM version=00
5269 13:08:29.008349 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5270 13:08:29.025398 sp_tx_get_edid_block: EDID Block = 1
5271 13:08:29.142697 Extracted contents:
5272 13:08:29.145995 header: 00 ff ff ff ff ff ff 00
5273 13:08:29.149237 serial number: 06 af 5c 14 00 00 00 00 00 1a
5274 13:08:29.152651 version: 01 04
5275 13:08:29.156350 basic params: 95 1a 0e 78 02
5276 13:08:29.159652 chroma info: 99 85 95 55 56 92 28 22 50 54
5277 13:08:29.162972 established: 00 00 00
5278 13:08:29.169421 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5279 13:08:29.172613 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5280 13:08:29.179556 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5281 13:08:29.186399 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5282 13:08:29.193016 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5283 13:08:29.196153 extensions: 00
5284 13:08:29.196226 checksum: ae
5285 13:08:29.196289
5286 13:08:29.199505 Manufacturer: AUO Model 145c Serial Number 0
5287 13:08:29.203275 Made week 0 of 2016
5288 13:08:29.203353 EDID version: 1.4
5289 13:08:29.206042 Digital display
5290 13:08:29.209675 6 bits per primary color channel
5291 13:08:29.209754 DisplayPort interface
5292 13:08:29.212581 Maximum image size: 26 cm x 14 cm
5293 13:08:29.216033 Gamma: 220%
5294 13:08:29.216117 Check DPMS levels
5295 13:08:29.219739 Supported color formats: RGB 4:4:4
5296 13:08:29.223095 First detailed timing is preferred timing
5297 13:08:29.226440 Established timings supported:
5298 13:08:29.229497 Standard timings supported:
5299 13:08:29.229604 Detailed timings
5300 13:08:29.232674 Hex of detail: ce1d56ea50001a3030204600009010000018
5301 13:08:29.239305 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5302 13:08:29.242806 0556 0586 05a6 0640 hborder 0
5303 13:08:29.246450 0300 0304 030a 031a vborder 0
5304 13:08:29.249533 -hsync -vsync
5305 13:08:29.253010 Did detailed timing
5306 13:08:29.256606 Hex of detail: 0000000f0000000000000000000000000020
5307 13:08:29.259547 Manufacturer-specified data, tag 15
5308 13:08:29.263087 Hex of detail: 000000fe0041554f0a202020202020202020
5309 13:08:29.266359 ASCII string: AUO
5310 13:08:29.269588 Hex of detail: 000000fe004231313658414230312e34200a
5311 13:08:29.273167 ASCII string: B116XAB01.4
5312 13:08:29.273271 Checksum
5313 13:08:29.276533 Checksum: 0xae (valid)
5314 13:08:29.279412 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5315 13:08:29.282837 DSI data_rate: 457800000 bps
5316 13:08:29.289644 anx7625_parse_edid: set default k value to 0x3d for panel
5317 13:08:29.293069 anx7625_parse_edid: pixelclock(76300).
5318 13:08:29.296539 hactive(1366), hsync(32), hfp(48), hbp(154)
5319 13:08:29.299845 vactive(768), vsync(6), vfp(4), vbp(16)
5320 13:08:29.303173 anx7625_dsi_config: config dsi.
5321 13:08:29.311164 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5322 13:08:29.331990 anx7625_dsi_config: success to config DSI
5323 13:08:29.335462 anx7625_dp_start: MIPI phy setup OK.
5324 13:08:29.338495 [SSUSB] Setting up USB HOST controller...
5325 13:08:29.342057 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5326 13:08:29.345339 [SSUSB] phy power-on done.
5327 13:08:29.349082 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5328 13:08:29.352720 in-header: 03 fc 01 00 00 00 00 00
5329 13:08:29.352799 in-data:
5330 13:08:29.359407 handle_proto3_response: EC response with error code: 1
5331 13:08:29.359502 SPM: pcm index = 1
5332 13:08:29.362820 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5333 13:08:29.366353 CBFS @ 21000 size 3d4000
5334 13:08:29.372627 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5335 13:08:29.375975 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5336 13:08:29.379421 CBFS: Found @ offset 1e7c0 size 1026
5337 13:08:29.385964 read SPI 0x3f808 0x1026: 1272 us, 3250 KB/s, 26.000 Mbps
5338 13:08:29.389215 SPM: binary array size = 2988
5339 13:08:29.393188 SPM: version = pcm_allinone_v1.17.2_20180829
5340 13:08:29.396359 SPM binary loaded in 32 msecs
5341 13:08:29.404031 spm_kick_im_to_fetch: ptr = 000000004021eec2
5342 13:08:29.407344 spm_kick_im_to_fetch: len = 2988
5343 13:08:29.407442 SPM: spm_kick_pcm_to_run
5344 13:08:29.410309 SPM: spm_kick_pcm_to_run done
5345 13:08:29.413789 SPM: spm_init done in 52 msecs
5346 13:08:29.417479 Root Device init finished in 495458 usecs
5347 13:08:29.420331 CPU_CLUSTER: 0 init ...
5348 13:08:29.426811 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5349 13:08:29.434189 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5350 13:08:29.437041 CBFS @ 21000 size 3d4000
5351 13:08:29.440690 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5352 13:08:29.443861 CBFS: Locating 'sspm.bin'
5353 13:08:29.446844 CBFS: Found @ offset 208c0 size 41cb
5354 13:08:29.456794 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5355 13:08:29.464460 CPU_CLUSTER: 0 init finished in 42798 usecs
5356 13:08:29.464542 Devices initialized
5357 13:08:29.468225 Show all devs... After init.
5358 13:08:29.471184 Root Device: enabled 1
5359 13:08:29.471270 CPU_CLUSTER: 0: enabled 1
5360 13:08:29.474634 CPU: 00: enabled 1
5361 13:08:29.478056 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5362 13:08:29.481366 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5363 13:08:29.484780 ELOG: NV offset 0x558000 size 0x1000
5364 13:08:29.492004 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5365 13:08:29.498902 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5366 13:08:29.502294 ELOG: Event(17) added with size 13 at 2024-07-18 13:08:19 UTC
5367 13:08:29.505963 out: cmd=0x121: 03 db 21 01 00 00 00 00
5368 13:08:29.508899 in-header: 03 1b 00 00 2c 00 00 00
5369 13:08:29.522630 in-data: af 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 8e 4c 01 00 06 80 00 00 6b 8d 02 00 06 80 00 00 5a 52 01 00 06 80 00 00 11 ad 52 00
5370 13:08:29.526048 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5371 13:08:29.529386 in-header: 03 19 00 00 08 00 00 00
5372 13:08:29.532353 in-data: a2 e0 47 00 13 00 00 00
5373 13:08:29.536165 Chrome EC: UHEPI supported
5374 13:08:29.542419 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5375 13:08:29.545584 in-header: 03 e1 00 00 08 00 00 00
5376 13:08:29.548907 in-data: 84 20 60 10 00 00 00 00
5377 13:08:29.552569 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5378 13:08:29.558932 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5379 13:08:29.562389 in-header: 03 e1 00 00 08 00 00 00
5380 13:08:29.565656 in-data: 84 20 60 10 00 00 00 00
5381 13:08:29.572258 ELOG: Event(A1) added with size 10 at 2024-07-18 13:08:19 UTC
5382 13:08:29.579166 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5383 13:08:29.582126 ELOG: Event(A0) added with size 9 at 2024-07-18 13:08:19 UTC
5384 13:08:29.588911 elog_add_boot_reason: Logged dev mode boot
5385 13:08:29.588995 Finalize devices...
5386 13:08:29.592477 Devices finalized
5387 13:08:29.595784 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5388 13:08:29.598905 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5389 13:08:29.605667 ELOG: Event(91) added with size 10 at 2024-07-18 13:08:19 UTC
5390 13:08:29.612388 ELOG: Event(16) added with size 11 at 2024-07-18 13:08:19 UTC
5391 13:08:29.688696 SF: Successfully erased 4096 bytes @ 0x558000
5392 13:08:29.700923 read SPI 0x558000 0x1000: 1258 us, 3255 KB/s, 26.040 Mbps
5393 13:08:29.704141 Writing coreboot table at 0xffeda000
5394 13:08:29.707411 0. 0000000000114000-000000000011efff: RAMSTAGE
5395 13:08:29.713668 1. 0000000040000000-000000004023cfff: RAMSTAGE
5396 13:08:29.717032 2. 000000004023d000-00000000545fffff: RAM
5397 13:08:29.720182 3. 0000000054600000-000000005465ffff: BL31
5398 13:08:29.723407 4. 0000000054660000-00000000ffed9fff: RAM
5399 13:08:29.730056 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5400 13:08:29.733394 6. 0000000100000000-000000013fffffff: RAM
5401 13:08:29.737023 Passing 5 GPIOs to payload:
5402 13:08:29.740104 NAME | PORT | POLARITY | VALUE
5403 13:08:29.743443 write protect | 0x00000096 | low | high
5404 13:08:29.749993 EC in RW | 0x000000b1 | high | undefined
5405 13:08:29.753413 EC interrupt | 0x00000097 | low | undefined
5406 13:08:29.760100 TPM interrupt | 0x00000099 | high | undefined
5407 13:08:29.763651 speaker enable | 0x000000af | high | undefined
5408 13:08:29.766629 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5409 13:08:29.769839 in-header: 03 f7 00 00 02 00 00 00
5410 13:08:29.773115 in-data: 04 00
5411 13:08:29.773202 Board ID: 4
5412 13:08:29.776474 ADC[3]: Raw value=215504 ID=1
5413 13:08:29.776610 RAM code: 1
5414 13:08:29.776727 SKU ID: 16
5415 13:08:29.782989 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5416 13:08:29.783073 CBFS @ 21000 size 3d4000
5417 13:08:29.789748 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5418 13:08:29.796283 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum abcc
5419 13:08:29.799695 coreboot table: 940 bytes.
5420 13:08:29.802985 IMD ROOT 0. 00000000fffff000 00001000
5421 13:08:29.806401 IMD SMALL 1. 00000000ffffe000 00001000
5422 13:08:29.809635 CONSOLE 2. 00000000fffde000 00020000
5423 13:08:29.813036 FMAP 3. 00000000fffdd000 0000047c
5424 13:08:29.816414 TIME STAMP 4. 00000000fffdc000 00000910
5425 13:08:29.819920 RAMOOPS 5. 00000000ffedc000 00100000
5426 13:08:29.823286 COREBOOT 6. 00000000ffeda000 00002000
5427 13:08:29.826512 IMD small region:
5428 13:08:29.829785 IMD ROOT 0. 00000000ffffec00 00000400
5429 13:08:29.832653 VBOOT WORK 1. 00000000ffffeb00 00000100
5430 13:08:29.836232 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5431 13:08:29.839727 VPD 3. 00000000ffffea60 0000006c
5432 13:08:29.846578 BS: BS_WRITE_TABLES times (ms): entry 81 run 0 exit 0
5433 13:08:29.852886 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5434 13:08:29.856127 in-header: 03 e1 00 00 08 00 00 00
5435 13:08:29.859611 in-data: 84 20 60 10 00 00 00 00
5436 13:08:29.863419 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5437 13:08:29.866331 CBFS @ 21000 size 3d4000
5438 13:08:29.869349 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5439 13:08:29.872417 CBFS: Locating 'fallback/payload'
5440 13:08:29.881478 CBFS: Found @ offset dc040 size 439a0
5441 13:08:29.969481 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5442 13:08:29.972488 Checking segment from ROM address 0x0000000040003a00
5443 13:08:29.979479 Checking segment from ROM address 0x0000000040003a1c
5444 13:08:29.982449 Loading segment from ROM address 0x0000000040003a00
5445 13:08:29.986011 code (compression=0)
5446 13:08:29.996013 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5447 13:08:30.002536 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5448 13:08:30.006016 it's not compressed!
5449 13:08:30.009442 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5450 13:08:30.015479 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5451 13:08:30.023673 Loading segment from ROM address 0x0000000040003a1c
5452 13:08:30.027320 Entry Point 0x0000000080000000
5453 13:08:30.027423 Loaded segments
5454 13:08:30.033914 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5455 13:08:30.037006 Jumping to boot code at 0000000080000000(00000000ffeda000)
5456 13:08:30.046874 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5457 13:08:30.050379 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5458 13:08:30.053697 CBFS @ 21000 size 3d4000
5459 13:08:30.060346 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5460 13:08:30.060462 CBFS: Locating 'fallback/bl31'
5461 13:08:30.064490 CBFS: Found @ offset 36dc0 size 5820
5462 13:08:30.077432 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5463 13:08:30.080941 Checking segment from ROM address 0x0000000040003a00
5464 13:08:30.087626 Checking segment from ROM address 0x0000000040003a1c
5465 13:08:30.091002 Loading segment from ROM address 0x0000000040003a00
5466 13:08:30.094107 code (compression=1)
5467 13:08:30.100827 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5468 13:08:30.110806 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5469 13:08:30.110923 using LZMA
5470 13:08:30.119275 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5471 13:08:30.126201 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5472 13:08:30.129608 Loading segment from ROM address 0x0000000040003a1c
5473 13:08:30.132848 Entry Point 0x0000000054601000
5474 13:08:30.132949 Loaded segments
5475 13:08:30.135976 NOTICE: MT8183 bl31_setup
5476 13:08:30.143072 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5477 13:08:30.146447 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5478 13:08:30.149546 INFO: [DEVAPC] dump DEVAPC registers:
5479 13:08:30.159788 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5480 13:08:30.166580 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5481 13:08:30.176588 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5482 13:08:30.183100 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5483 13:08:30.193010 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5484 13:08:30.199486 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5485 13:08:30.209507 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5486 13:08:30.216514 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5487 13:08:30.222778 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5488 13:08:30.232829 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5489 13:08:30.239501 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5490 13:08:30.249480 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5491 13:08:30.256348 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5492 13:08:30.266191 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5493 13:08:30.272413 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5494 13:08:30.279153 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5495 13:08:30.285873 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5496 13:08:30.292343 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5497 13:08:30.302357 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5498 13:08:30.309133 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5499 13:08:30.315585 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5500 13:08:30.322242 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5501 13:08:30.325469 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5502 13:08:30.329047 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5503 13:08:30.332214 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5504 13:08:30.335403 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5505 13:08:30.339007 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5506 13:08:30.345577 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5507 13:08:30.351854 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5508 13:08:30.351961 WARNING: region 0:
5509 13:08:30.355645 WARNING: apc:0x168, sa:0x0, ea:0xfff
5510 13:08:30.359072 WARNING: region 1:
5511 13:08:30.362334 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5512 13:08:30.362435 WARNING: region 2:
5513 13:08:30.365351 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5514 13:08:30.368416 WARNING: region 3:
5515 13:08:30.371882 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5516 13:08:30.375635 WARNING: region 4:
5517 13:08:30.379057 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5518 13:08:30.379157 WARNING: region 5:
5519 13:08:30.382209 WARNING: apc:0x0, sa:0x0, ea:0x0
5520 13:08:30.385414 WARNING: region 6:
5521 13:08:30.388493 WARNING: apc:0x0, sa:0x0, ea:0x0
5522 13:08:30.388591 WARNING: region 7:
5523 13:08:30.391904 WARNING: apc:0x0, sa:0x0, ea:0x0
5524 13:08:30.398446 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5525 13:08:30.402012 INFO: SPM: enable SPMC mode
5526 13:08:30.405141 NOTICE: spm_boot_init() start
5527 13:08:30.408402 NOTICE: spm_boot_init() end
5528 13:08:30.411661 INFO: BL31: Initializing runtime services
5529 13:08:30.418531 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5530 13:08:30.421914 INFO: BL31: Preparing for EL3 exit to normal world
5531 13:08:30.425382 INFO: Entry point address = 0x80000000
5532 13:08:30.428090 INFO: SPSR = 0x8
5533 13:08:30.449532
5534 13:08:30.449621
5535 13:08:30.449685
5536 13:08:30.450190 end: 2.2.3 depthcharge-start (duration 00:00:26) [common]
5537 13:08:30.450289 start: 2.2.4 bootloader-commands (timeout 00:04:25) [common]
5538 13:08:30.450389 Setting prompt string to ['jacuzzi:']
5539 13:08:30.450463 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:25)
5540 13:08:30.453506 Starting depthcharge on Juniper...
5541 13:08:30.453590
5542 13:08:30.456166 vboot_handoff: creating legacy vboot_handoff structure
5543 13:08:30.456261
5544 13:08:30.459897 ec_init(0): CrosEC protocol v3 supported (544, 544)
5545 13:08:30.459981
5546 13:08:30.463488 Wipe memory regions:
5547 13:08:30.463568
5548 13:08:30.466340 [0x00000040000000, 0x00000054600000)
5549 13:08:30.509194
5550 13:08:30.509296 [0x00000054660000, 0x00000080000000)
5551 13:08:30.600421
5552 13:08:30.600566 [0x000000811994a0, 0x000000ffeda000)
5553 13:08:30.859782
5554 13:08:30.859921 [0x00000100000000, 0x00000140000000)
5555 13:08:30.992658
5556 13:08:30.995768 Initializing XHCI USB controller at 0x11200000.
5557 13:08:31.018740
5558 13:08:31.022149 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5559 13:08:31.022245
5560 13:08:31.022312
5561 13:08:31.022583 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5562 13:08:31.022690 Sending line: 'tftpboot 192.168.201.1 14878986/tftp-deploy-j377ujnf/kernel/image.itb 14878986/tftp-deploy-j377ujnf/kernel/cmdline '
5564 13:08:31.123198 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5565 13:08:31.123314 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:25)
5566 13:08:31.127692 jacuzzi: tftpboot 192.168.201.1 14878986/tftp-deploy-j377ujnf/kernel/image.itp-deploy-j377ujnf/kernel/cmdline
5567 13:08:31.127779
5568 13:08:31.127844 Waiting for link
5569 13:08:31.532265
5570 13:08:31.532400 R8152: Initializing
5571 13:08:31.532479
5572 13:08:31.535556 Version 9 (ocp_data = 6010)
5573 13:08:31.535641
5574 13:08:31.539062 R8152: Done initializing
5575 13:08:31.539147
5576 13:08:31.539212 Adding net device
5577 13:08:31.924664
5578 13:08:31.924794 done.
5579 13:08:31.924863
5580 13:08:31.924925 MAC: 00:e0:4c:68:0b:b9
5581 13:08:31.924985
5582 13:08:31.927967 Sending DHCP discover... done.
5583 13:08:31.928040
5584 13:08:31.931973 Waiting for reply... done.
5585 13:08:31.932060
5586 13:08:31.934441 Sending DHCP request... done.
5587 13:08:31.934541
5588 13:08:31.934632 Waiting for reply... done.
5589 13:08:31.934720
5590 13:08:31.937901 My ip is 192.168.201.13
5591 13:08:31.938000
5592 13:08:31.941727 The DHCP server ip is 192.168.201.1
5593 13:08:31.941805
5594 13:08:31.944425 TFTP server IP predefined by user: 192.168.201.1
5595 13:08:31.944523
5596 13:08:31.951275 Bootfile predefined by user: 14878986/tftp-deploy-j377ujnf/kernel/image.itb
5597 13:08:31.951378
5598 13:08:31.954386 Sending tftp read request... done.
5599 13:08:31.954497
5600 13:08:31.957591 Waiting for the transfer...
5601 13:08:31.960739
5602 13:08:32.203679 00000000 ################################################################
5603 13:08:32.203808
5604 13:08:32.446771 00080000 ################################################################
5605 13:08:32.446907
5606 13:08:32.690952 00100000 ################################################################
5607 13:08:32.691082
5608 13:08:32.950138 00180000 ################################################################
5609 13:08:32.950272
5610 13:08:33.208643 00200000 ################################################################
5611 13:08:33.208776
5612 13:08:33.458998 00280000 ################################################################
5613 13:08:33.459154
5614 13:08:33.722751 00300000 ################################################################
5615 13:08:33.722889
5616 13:08:33.973780 00380000 ################################################################
5617 13:08:33.973928
5618 13:08:34.222538 00400000 ################################################################
5619 13:08:34.222666
5620 13:08:34.475093 00480000 ################################################################
5621 13:08:34.475231
5622 13:08:34.750046 00500000 ################################################################
5623 13:08:34.750182
5624 13:08:35.021151 00580000 ################################################################
5625 13:08:35.021304
5626 13:08:35.291360 00600000 ################################################################
5627 13:08:35.291512
5628 13:08:35.556259 00680000 ################################################################
5629 13:08:35.556390
5630 13:08:35.803574 00700000 ################################################################
5631 13:08:35.803719
5632 13:08:36.060591 00780000 ################################################################
5633 13:08:36.060724
5634 13:08:36.312745 00800000 ################################################################
5635 13:08:36.312869
5636 13:08:36.557350 00880000 ################################################################
5637 13:08:36.557486
5638 13:08:36.803009 00900000 ################################################################
5639 13:08:36.803146
5640 13:08:37.061504 00980000 ################################################################
5641 13:08:37.061636
5642 13:08:37.313824 00a00000 ################################################################
5643 13:08:37.313945
5644 13:08:37.564838 00a80000 ################################################################
5645 13:08:37.564992
5646 13:08:37.812832 00b00000 ################################################################
5647 13:08:37.812989
5648 13:08:38.075862 00b80000 ################################################################
5649 13:08:38.076001
5650 13:08:38.348368 00c00000 ################################################################
5651 13:08:38.348517
5652 13:08:38.623014 00c80000 ################################################################
5653 13:08:38.623157
5654 13:08:38.887098 00d00000 ################################################################
5655 13:08:38.887247
5656 13:08:39.140137 00d80000 ################################################################
5657 13:08:39.140278
5658 13:08:39.384436 00e00000 ################################################################
5659 13:08:39.384602
5660 13:08:39.627897 00e80000 ################################################################
5661 13:08:39.628037
5662 13:08:39.871475 00f00000 ################################################################
5663 13:08:39.871620
5664 13:08:40.118295 00f80000 ################################################################
5665 13:08:40.118433
5666 13:08:40.362944 01000000 ################################################################
5667 13:08:40.363082
5668 13:08:40.614135 01080000 ################################################################
5669 13:08:40.614267
5670 13:08:40.865117 01100000 ################################################################
5671 13:08:40.865254
5672 13:08:41.115183 01180000 ################################################################
5673 13:08:41.115344
5674 13:08:41.372806 01200000 ################################################################
5675 13:08:41.372962
5676 13:08:41.628754 01280000 ################################################################
5677 13:08:41.628892
5678 13:08:41.887343 01300000 ################################################################
5679 13:08:41.887509
5680 13:08:42.138624 01380000 ################################################################
5681 13:08:42.138754
5682 13:08:42.395839 01400000 ################################################################
5683 13:08:42.395974
5684 13:08:42.654161 01480000 ################################################################
5685 13:08:42.654300
5686 13:08:42.905903 01500000 ################################################################
5687 13:08:42.906040
5688 13:08:43.157853 01580000 ################################################################
5689 13:08:43.158018
5690 13:08:43.414236 01600000 ################################################################
5691 13:08:43.414416
5692 13:08:43.684140 01680000 ################################################################
5693 13:08:43.684300
5694 13:08:43.940072 01700000 ################################################################
5695 13:08:43.940237
5696 13:08:44.196829 01780000 ################################################################
5697 13:08:44.196964
5698 13:08:44.449904 01800000 ################################################################
5699 13:08:44.450066
5700 13:08:44.701535 01880000 ################################################################
5701 13:08:44.701703
5702 13:08:44.956086 01900000 ################################################################
5703 13:08:44.956254
5704 13:08:45.211466 01980000 ################################################################
5705 13:08:45.211625
5706 13:08:45.472295 01a00000 ################################################################
5707 13:08:45.472435
5708 13:08:45.728652 01a80000 ################################################################
5709 13:08:45.728788
5710 13:08:45.984227 01b00000 ################################################################
5711 13:08:45.984372
5712 13:08:46.238439 01b80000 ################################################################
5713 13:08:46.238587
5714 13:08:46.492245 01c00000 ################################################################
5715 13:08:46.492381
5716 13:08:46.751132 01c80000 ################################################################
5717 13:08:46.751269
5718 13:08:47.009803 01d00000 ################################################################
5719 13:08:47.009941
5720 13:08:47.265840 01d80000 ################################################################
5721 13:08:47.265984
5722 13:08:47.524217 01e00000 ################################################################
5723 13:08:47.524391
5724 13:08:47.777033 01e80000 ################################################################
5725 13:08:47.777207
5726 13:08:48.029718 01f00000 ################################################################
5727 13:08:48.029881
5728 13:08:48.284992 01f80000 ################################################################
5729 13:08:48.285149
5730 13:08:48.541192 02000000 ################################################################
5731 13:08:48.541344
5732 13:08:48.801391 02080000 ################################################################
5733 13:08:48.801569
5734 13:08:49.057198 02100000 ################################################################
5735 13:08:49.057374
5736 13:08:49.310502 02180000 ################################################################
5737 13:08:49.310673
5738 13:08:49.566062 02200000 ################################################################
5739 13:08:49.566226
5740 13:08:49.831371 02280000 ################################################################
5741 13:08:49.831533
5742 13:08:50.092962 02300000 ################################################################
5743 13:08:50.093133
5744 13:08:50.348048 02380000 ################################################################
5745 13:08:50.348222
5746 13:08:50.613745 02400000 ################################################################
5747 13:08:50.613914
5748 13:08:50.889640 02480000 ################################################################
5749 13:08:50.889786
5750 13:08:51.149608 02500000 ################################################################
5751 13:08:51.149750
5752 13:08:51.409164 02580000 ################################################################
5753 13:08:51.409302
5754 13:08:51.674334 02600000 ################################################################
5755 13:08:51.674478
5756 13:08:51.936597 02680000 ################################################################
5757 13:08:51.936722
5758 13:08:52.193893 02700000 ################################################################
5759 13:08:52.194035
5760 13:08:52.456127 02780000 ################################################################
5761 13:08:52.456263
5762 13:08:52.717024 02800000 ################################################################
5763 13:08:52.717159
5764 13:08:52.973557 02880000 ################################################################
5765 13:08:52.973696
5766 13:08:53.233795 02900000 ################################################################
5767 13:08:53.233930
5768 13:08:53.492340 02980000 ################################################################
5769 13:08:53.492506
5770 13:08:53.753939 02a00000 ################################################################
5771 13:08:53.754070
5772 13:08:54.016358 02a80000 ################################################################
5773 13:08:54.016504
5774 13:08:54.285155 02b00000 ################################################################
5775 13:08:54.285291
5776 13:08:54.557723 02b80000 ################################################################
5777 13:08:54.557866
5778 13:08:54.829208 02c00000 ################################################################
5779 13:08:54.829352
5780 13:08:55.088621 02c80000 ################################################################
5781 13:08:55.088759
5782 13:08:55.347233 02d00000 ################################################################
5783 13:08:55.347373
5784 13:08:55.605832 02d80000 ################################################################
5785 13:08:55.605971
5786 13:08:55.862931 02e00000 ################################################################
5787 13:08:55.863090
5788 13:08:56.117944 02e80000 ################################################################
5789 13:08:56.118079
5790 13:08:56.375149 02f00000 ################################################################
5791 13:08:56.375288
5792 13:08:56.637030 02f80000 ################################################################
5793 13:08:56.637169
5794 13:08:56.896707 03000000 ################################################################
5795 13:08:56.896866
5796 13:08:57.158229 03080000 ################################################################
5797 13:08:57.158395
5798 13:08:57.421694 03100000 ################################################################
5799 13:08:57.421862
5800 13:08:57.684512 03180000 ################################################################
5801 13:08:57.684659
5802 13:08:57.943669 03200000 ################################################################
5803 13:08:57.943806
5804 13:08:58.206322 03280000 ################################################################
5805 13:08:58.206490
5806 13:08:58.469132 03300000 ################################################################
5807 13:08:58.469297
5808 13:08:58.654006 03380000 ############################################## done.
5809 13:08:58.654145
5810 13:08:58.657510 The bootfile was 54370382 bytes long.
5811 13:08:58.657606
5812 13:08:58.660561 Sending tftp read request... done.
5813 13:08:58.660646
5814 13:08:58.660712 Waiting for the transfer...
5815 13:08:58.660773
5816 13:08:58.664067 00000000 # done.
5817 13:08:58.664155
5818 13:08:58.670830 Command line loaded dynamically from TFTP file: 14878986/tftp-deploy-j377ujnf/kernel/cmdline
5819 13:08:58.670917
5820 13:08:58.687587 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5821 13:08:58.687681
5822 13:08:58.690401 Loading FIT.
5823 13:08:58.690486
5824 13:08:58.693797 Image ramdisk-1 has 41196176 bytes.
5825 13:08:58.693883
5826 13:08:58.697098 Image fdt-1 has 57695 bytes.
5827 13:08:58.697183
5828 13:08:58.697249 Image kernel-1 has 13114469 bytes.
5829 13:08:58.700428
5830 13:08:58.707151 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5831 13:08:58.707241
5832 13:08:58.720830 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5833 13:08:58.720921
5834 13:08:58.723575 Choosing best match conf-1 for compat google,juniper-sku16.
5835 13:08:58.729194
5836 13:08:58.733814 Connected to device vid:did:rid of 1ae0:0028:00
5837 13:08:58.741809
5838 13:08:58.745355 tpm_get_response: command 0x17b, return code 0x0
5839 13:08:58.745444
5840 13:08:58.748354 tpm_cleanup: add release locality here.
5841 13:08:58.748475
5842 13:08:58.752071 Shutting down all USB controllers.
5843 13:08:58.752162
5844 13:08:58.755364 Removing current net device
5845 13:08:58.755449
5846 13:08:58.758730 Exiting depthcharge with code 4 at timestamp: 45730289
5847 13:08:58.758855
5848 13:08:58.762372 LZMA decompressing kernel-1 to 0x80193568
5849 13:08:58.762484
5850 13:08:58.765107 LZMA decompressing kernel-1 to 0x40000000
5851 13:09:00.630797
5852 13:09:00.630966 jumping to kernel
5853 13:09:00.632076 end: 2.2.4 bootloader-commands (duration 00:00:30) [common]
5854 13:09:00.632210 start: 2.2.5 auto-login-action (timeout 00:03:55) [common]
5855 13:09:00.632319 Setting prompt string to ['Linux version [0-9]']
5856 13:09:00.632419 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5857 13:09:00.632549 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5858 13:09:00.705715
5859 13:09:00.709042 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5860 13:09:00.712525 start: 2.2.5.1 login-action (timeout 00:03:55) [common]
5861 13:09:00.712651 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5862 13:09:00.712751 Setting prompt string to []
5863 13:09:00.712843 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5864 13:09:00.712921 Using line separator: #'\n'#
5865 13:09:00.713011 No login prompt set.
5866 13:09:00.713106 Parsing kernel messages
5867 13:09:00.713169 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5868 13:09:00.713278 [login-action] Waiting for messages, (timeout 00:03:55)
5869 13:09:00.713345 Waiting using forced prompt support (timeout 00:01:58)
5870 13:09:00.731746 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j272990-arm64-gcc-12-defconfig-arm64-chromebook-fgzcq) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Thu Jul 18 12:53:03 UTC 2024
5871 13:09:00.735046 [ 0.000000] random: crng init done
5872 13:09:00.738517 [ 0.000000] Machine model: Google juniper sku16 board
5873 13:09:00.741726 [ 0.000000] efi: UEFI not found.
5874 13:09:00.751838 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5875 13:09:00.758164 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5876 13:09:00.765428 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5877 13:09:00.771312 [ 0.000000] printk: bootconsole [mtk8250] enabled
5878 13:09:00.779603 [ 0.000000] NUMA: No NUMA configuration found
5879 13:09:00.786683 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5880 13:09:00.792525 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5881 13:09:00.792635 [ 0.000000] Zone ranges:
5882 13:09:00.799499 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5883 13:09:00.802996 [ 0.000000] DMA32 empty
5884 13:09:00.809182 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5885 13:09:00.812771 [ 0.000000] Movable zone start for each node
5886 13:09:00.816315 [ 0.000000] Early memory node ranges
5887 13:09:00.822926 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5888 13:09:00.829199 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5889 13:09:00.835760 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5890 13:09:00.842792 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5891 13:09:00.849282 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5892 13:09:00.856037 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5893 13:09:00.876175 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5894 13:09:00.882600 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5895 13:09:00.889391 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5896 13:09:00.892962 [ 0.000000] psci: probing for conduit method from DT.
5897 13:09:00.899207 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5898 13:09:00.902764 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5899 13:09:00.909116 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5900 13:09:00.912654 [ 0.000000] psci: SMC Calling Convention v1.1
5901 13:09:00.919209 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5902 13:09:00.922768 [ 0.000000] Detected VIPT I-cache on CPU0
5903 13:09:00.928871 [ 0.000000] CPU features: detected: GIC system register CPU interface
5904 13:09:00.935901 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5905 13:09:00.942520 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5906 13:09:00.949015 [ 0.000000] CPU features: detected: ARM erratum 845719
5907 13:09:00.952406 [ 0.000000] alternatives: applying boot alternatives
5908 13:09:00.956083 [ 0.000000] Fallback order for Node 0: 0
5909 13:09:00.962150 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5910 13:09:00.965471 [ 0.000000] Policy zone: Normal
5911 13:09:00.985493 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5912 13:09:00.999040 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5913 13:09:01.005353 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5914 13:09:01.015917 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5915 13:09:01.022440 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5916 13:09:01.025859 <6>[ 0.000000] software IO TLB: area num 8.
5917 13:09:01.051366 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5918 13:09:01.109271 <6>[ 0.000000] Memory: 3874848K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 283616K reserved, 32768K cma-reserved)
5919 13:09:01.115947 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5920 13:09:01.122651 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5921 13:09:01.125889 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5922 13:09:01.132163 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5923 13:09:01.138976 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5924 13:09:01.142417 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5925 13:09:01.152085 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5926 13:09:01.158810 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5927 13:09:01.165417 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5928 13:09:01.175587 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5929 13:09:01.178633 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5930 13:09:01.182044 <6>[ 0.000000] GICv3: 640 SPIs implemented
5931 13:09:01.188594 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5932 13:09:01.192384 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5933 13:09:01.195667 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5934 13:09:01.205816 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5935 13:09:01.215405 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5936 13:09:01.228624 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5937 13:09:01.234987 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5938 13:09:01.246140 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5939 13:09:01.259931 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5940 13:09:01.266154 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5941 13:09:01.273048 <6>[ 0.009476] Console: colour dummy device 80x25
5942 13:09:01.276218 <6>[ 0.014506] printk: console [tty1] enabled
5943 13:09:01.286102 <6>[ 0.018898] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5944 13:09:01.292671 <6>[ 0.029364] pid_max: default: 32768 minimum: 301
5945 13:09:01.296401 <6>[ 0.034245] LSM: Security Framework initializing
5946 13:09:01.305907 <6>[ 0.039160] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5947 13:09:01.312399 <6>[ 0.046782] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5948 13:09:01.319027 <4>[ 0.055659] cacheinfo: Unable to detect cache hierarchy for CPU 0
5949 13:09:01.329187 <6>[ 0.062284] cblist_init_generic: Setting adjustable number of callback queues.
5950 13:09:01.335888 <6>[ 0.069729] cblist_init_generic: Setting shift to 3 and lim to 1.
5951 13:09:01.342453 <6>[ 0.076083] cblist_init_generic: Setting adjustable number of callback queues.
5952 13:09:01.349116 <6>[ 0.083527] cblist_init_generic: Setting shift to 3 and lim to 1.
5953 13:09:01.352433 <6>[ 0.089925] rcu: Hierarchical SRCU implementation.
5954 13:09:01.358795 <6>[ 0.094950] rcu: Max phase no-delay instances is 1000.
5955 13:09:01.366559 <6>[ 0.102866] EFI services will not be available.
5956 13:09:01.369526 <6>[ 0.107817] smp: Bringing up secondary CPUs ...
5957 13:09:01.380306 <6>[ 0.113125] Detected VIPT I-cache on CPU1
5958 13:09:01.386756 <4>[ 0.113173] cacheinfo: Unable to detect cache hierarchy for CPU 1
5959 13:09:01.393429 <6>[ 0.113181] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5960 13:09:01.400415 <6>[ 0.113215] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5961 13:09:01.403616 <6>[ 0.113695] Detected VIPT I-cache on CPU2
5962 13:09:01.410397 <4>[ 0.113729] cacheinfo: Unable to detect cache hierarchy for CPU 2
5963 13:09:01.416636 <6>[ 0.113733] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5964 13:09:01.423337 <6>[ 0.113745] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5965 13:09:01.426998 <6>[ 0.114191] Detected VIPT I-cache on CPU3
5966 13:09:01.433433 <4>[ 0.114221] cacheinfo: Unable to detect cache hierarchy for CPU 3
5967 13:09:01.440066 <6>[ 0.114225] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5968 13:09:01.446521 <6>[ 0.114237] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5969 13:09:01.453513 <6>[ 0.114812] CPU features: detected: Spectre-v2
5970 13:09:01.456902 <6>[ 0.114822] CPU features: detected: Spectre-BHB
5971 13:09:01.463720 <6>[ 0.114826] CPU features: detected: ARM erratum 858921
5972 13:09:01.467075 <6>[ 0.114831] Detected VIPT I-cache on CPU4
5973 13:09:01.473360 <4>[ 0.114878] cacheinfo: Unable to detect cache hierarchy for CPU 4
5974 13:09:01.480432 <6>[ 0.114886] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5975 13:09:01.486488 <6>[ 0.114894] arch_timer: Enabling local workaround for ARM erratum 858921
5976 13:09:01.493560 <6>[ 0.114905] arch_timer: CPU4: Trapping CNTVCT access
5977 13:09:01.500047 <6>[ 0.114912] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5978 13:09:01.503200 <6>[ 0.115398] Detected VIPT I-cache on CPU5
5979 13:09:01.509794 <4>[ 0.115438] cacheinfo: Unable to detect cache hierarchy for CPU 5
5980 13:09:01.516528 <6>[ 0.115443] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5981 13:09:01.523063 <6>[ 0.115450] arch_timer: Enabling local workaround for ARM erratum 858921
5982 13:09:01.529925 <6>[ 0.115457] arch_timer: CPU5: Trapping CNTVCT access
5983 13:09:01.536369 <6>[ 0.115462] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5984 13:09:01.539817 <6>[ 0.115998] Detected VIPT I-cache on CPU6
5985 13:09:01.546249 <4>[ 0.116044] cacheinfo: Unable to detect cache hierarchy for CPU 6
5986 13:09:01.553210 <6>[ 0.116050] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5987 13:09:01.559976 <6>[ 0.116057] arch_timer: Enabling local workaround for ARM erratum 858921
5988 13:09:01.566460 <6>[ 0.116063] arch_timer: CPU6: Trapping CNTVCT access
5989 13:09:01.573028 <6>[ 0.116068] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5990 13:09:01.576149 <6>[ 0.116598] Detected VIPT I-cache on CPU7
5991 13:09:01.582689 <4>[ 0.116641] cacheinfo: Unable to detect cache hierarchy for CPU 7
5992 13:09:01.589187 <6>[ 0.116647] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5993 13:09:01.599592 <6>[ 0.116655] arch_timer: Enabling local workaround for ARM erratum 858921
5994 13:09:01.602786 <6>[ 0.116661] arch_timer: CPU7: Trapping CNTVCT access
5995 13:09:01.608940 <6>[ 0.116666] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5996 13:09:01.612603 <6>[ 0.116713] smp: Brought up 1 node, 8 CPUs
5997 13:09:01.619323 <6>[ 0.355590] SMP: Total of 8 processors activated.
5998 13:09:01.625963 <6>[ 0.360526] CPU features: detected: 32-bit EL0 Support
5999 13:09:01.629008 <6>[ 0.365897] CPU features: detected: 32-bit EL1 Support
6000 13:09:01.635846 <6>[ 0.371263] CPU features: detected: CRC32 instructions
6001 13:09:01.639333 <6>[ 0.376691] CPU: All CPU(s) started at EL2
6002 13:09:01.645749 <6>[ 0.381029] alternatives: applying system-wide alternatives
6003 13:09:01.652379 <6>[ 0.389048] devtmpfs: initialized
6004 13:09:01.664788 <6>[ 0.397968] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
6005 13:09:01.674897 <6>[ 0.407917] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6006 13:09:01.677966 <6>[ 0.415643] pinctrl core: initialized pinctrl subsystem
6007 13:09:01.686616 <6>[ 0.422760] DMI not present or invalid.
6008 13:09:01.693325 <6>[ 0.427132] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6009 13:09:01.699690 <6>[ 0.434028] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6010 13:09:01.709636 <6>[ 0.441556] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6011 13:09:01.715897 <6>[ 0.449807] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6012 13:09:01.722548 <6>[ 0.457984] audit: initializing netlink subsys (disabled)
6013 13:09:01.729644 <5>[ 0.463692] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
6014 13:09:01.735892 <6>[ 0.464664] thermal_sys: Registered thermal governor 'step_wise'
6015 13:09:01.743032 <6>[ 0.471658] thermal_sys: Registered thermal governor 'power_allocator'
6016 13:09:01.746358 <6>[ 0.477958] cpuidle: using governor menu
6017 13:09:01.752923 <6>[ 0.488924] NET: Registered PF_QIPCRTR protocol family
6018 13:09:01.759430 <6>[ 0.494410] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6019 13:09:01.766001 <6>[ 0.501510] ASID allocator initialised with 32768 entries
6020 13:09:01.769607 <6>[ 0.508287] Serial: AMBA PL011 UART driver
6021 13:09:01.783114 <4>[ 0.519658] Trying to register duplicate clock ID: 113
6022 13:09:01.843237 <6>[ 0.576330] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6023 13:09:01.857456 <6>[ 0.590733] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6024 13:09:01.861124 <6>[ 0.600507] KASLR enabled
6025 13:09:01.875539 <6>[ 0.608475] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6026 13:09:01.882194 <6>[ 0.615476] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6027 13:09:01.888411 <6>[ 0.621952] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6028 13:09:01.895306 <6>[ 0.628942] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6029 13:09:01.902086 <6>[ 0.635415] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6030 13:09:01.908646 <6>[ 0.642406] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6031 13:09:01.915214 <6>[ 0.648879] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6032 13:09:01.922217 <6>[ 0.655869] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6033 13:09:01.925408 <6>[ 0.663432] ACPI: Interpreter disabled.
6034 13:09:01.934887 <6>[ 0.671419] iommu: Default domain type: Translated
6035 13:09:01.941369 <6>[ 0.676528] iommu: DMA domain TLB invalidation policy: strict mode
6036 13:09:01.944906 <5>[ 0.683159] SCSI subsystem initialized
6037 13:09:01.951692 <6>[ 0.687572] usbcore: registered new interface driver usbfs
6038 13:09:01.958333 <6>[ 0.693300] usbcore: registered new interface driver hub
6039 13:09:01.961619 <6>[ 0.698842] usbcore: registered new device driver usb
6040 13:09:01.968527 <6>[ 0.705151] pps_core: LinuxPPS API ver. 1 registered
6041 13:09:01.978419 <6>[ 0.710335] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6042 13:09:01.981687 <6>[ 0.719660] PTP clock support registered
6043 13:09:01.985056 <6>[ 0.723914] EDAC MC: Ver: 3.0.0
6044 13:09:01.992877 <6>[ 0.729553] FPGA manager framework
6045 13:09:01.996365 <6>[ 0.733237] Advanced Linux Sound Architecture Driver Initialized.
6046 13:09:02.000169 <6>[ 0.739992] vgaarb: loaded
6047 13:09:02.006817 <6>[ 0.743113] clocksource: Switched to clocksource arch_sys_counter
6048 13:09:02.013638 <5>[ 0.749544] VFS: Disk quotas dquot_6.6.0
6049 13:09:02.020272 <6>[ 0.753719] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6050 13:09:02.023217 <6>[ 0.760894] pnp: PnP ACPI: disabled
6051 13:09:02.031303 <6>[ 0.767781] NET: Registered PF_INET protocol family
6052 13:09:02.037766 <6>[ 0.773015] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6053 13:09:02.049858 <6>[ 0.782929] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6054 13:09:02.059845 <6>[ 0.791682] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6055 13:09:02.066402 <6>[ 0.799632] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6056 13:09:02.073154 <6>[ 0.807866] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6057 13:09:02.079902 <6>[ 0.815959] TCP: Hash tables configured (established 32768 bind 32768)
6058 13:09:02.089594 <6>[ 0.822783] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6059 13:09:02.096909 <6>[ 0.829756] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6060 13:09:02.103233 <6>[ 0.837236] NET: Registered PF_UNIX/PF_LOCAL protocol family
6061 13:09:02.106146 <6>[ 0.843333] RPC: Registered named UNIX socket transport module.
6062 13:09:02.113331 <6>[ 0.849476] RPC: Registered udp transport module.
6063 13:09:02.116753 <6>[ 0.854401] RPC: Registered tcp transport module.
6064 13:09:02.123288 <6>[ 0.859323] RPC: Registered tcp NFSv4.1 backchannel transport module.
6065 13:09:02.129738 <6>[ 0.865974] PCI: CLS 0 bytes, default 64
6066 13:09:02.133040 <6>[ 0.870269] Unpacking initramfs...
6067 13:09:02.154393 <6>[ 0.887338] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6068 13:09:02.164235 <6>[ 0.895965] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6069 13:09:02.167457 <6>[ 0.904818] kvm [1]: IPA Size Limit: 40 bits
6070 13:09:02.174660 <6>[ 0.911143] kvm [1]: vgic-v2@c420000
6071 13:09:02.178106 <6>[ 0.914954] kvm [1]: GIC system register CPU interface enabled
6072 13:09:02.184762 <6>[ 0.921125] kvm [1]: vgic interrupt IRQ18
6073 13:09:02.187973 <6>[ 0.925481] kvm [1]: Hyp mode initialized successfully
6074 13:09:02.195385 <5>[ 0.931789] Initialise system trusted keyrings
6075 13:09:02.201931 <6>[ 0.936655] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6076 13:09:02.210202 <6>[ 0.946605] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6077 13:09:02.216900 <5>[ 0.953072] NFS: Registering the id_resolver key type
6078 13:09:02.220174 <5>[ 0.958390] Key type id_resolver registered
6079 13:09:02.226883 <5>[ 0.962809] Key type id_legacy registered
6080 13:09:02.233225 <6>[ 0.967127] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6081 13:09:02.240396 <6>[ 0.974053] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6082 13:09:02.246901 <6>[ 0.981802] 9p: Installing v9fs 9p2000 file system support
6083 13:09:02.273964 <5>[ 1.010583] Key type asymmetric registered
6084 13:09:02.277307 <5>[ 1.014929] Asymmetric key parser 'x509' registered
6085 13:09:02.287326 <6>[ 1.020086] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6086 13:09:02.290513 <6>[ 1.027707] io scheduler mq-deadline registered
6087 13:09:02.293920 <6>[ 1.032465] io scheduler kyber registered
6088 13:09:02.317047 <6>[ 1.053353] EINJ: ACPI disabled.
6089 13:09:02.323610 <4>[ 1.057118] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6090 13:09:02.360541 <6>[ 1.097125] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6091 13:09:02.368762 <6>[ 1.105437] printk: console [ttyS0] disabled
6092 13:09:02.397007 <6>[ 1.130089] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6093 13:09:02.403709 <6>[ 1.139561] printk: console [ttyS0] enabled
6094 13:09:02.406859 <6>[ 1.139561] printk: console [ttyS0] enabled
6095 13:09:02.413285 <6>[ 1.148484] printk: bootconsole [mtk8250] disabled
6096 13:09:02.416680 <6>[ 1.148484] printk: bootconsole [mtk8250] disabled
6097 13:09:02.426726 <3>[ 1.158977] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6098 13:09:02.433607 <3>[ 1.167358] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6099 13:09:02.462262 <6>[ 1.195746] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6100 13:09:02.469123 <6>[ 1.205382] serial serial0: tty port ttyS1 registered
6101 13:09:02.475727 <6>[ 1.211811] SuperH (H)SCI(F) driver initialized
6102 13:09:02.478883 <6>[ 1.217271] msm_serial: driver initialized
6103 13:09:02.494436 <6>[ 1.227479] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6104 13:09:02.504249 <6>[ 1.236068] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6105 13:09:02.511109 <6>[ 1.244637] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6106 13:09:02.520954 <6>[ 1.253198] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6107 13:09:02.527402 <6>[ 1.261845] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6108 13:09:02.537431 <6>[ 1.270500] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6109 13:09:02.547386 <6>[ 1.279234] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6110 13:09:02.554204 <6>[ 1.287969] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6111 13:09:02.564110 <6>[ 1.296530] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6112 13:09:02.570654 <6>[ 1.305317] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6113 13:09:02.581062 <4>[ 1.317587] cacheinfo: Unable to detect cache hierarchy for CPU 0
6114 13:09:02.590361 <6>[ 1.326868] loop: module loaded
6115 13:09:02.602509 <6>[ 1.338581] vsim1: Bringing 1800000uV into 2700000-2700000uV
6116 13:09:02.619557 <6>[ 1.356050] megasas: 07.719.03.00-rc1
6117 13:09:02.628406 <6>[ 1.364770] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6118 13:09:02.637994 <6>[ 1.374505] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6119 13:09:02.655060 <6>[ 1.391319] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6120 13:09:02.711946 <6>[ 1.441693] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6121 13:09:03.459727 <6>[ 2.196052] Freeing initrd memory: 40224K
6122 13:09:03.475261 <4>[ 2.208044] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6123 13:09:03.481971 <4>[ 2.217298] CPU: 5 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
6124 13:09:03.488226 <4>[ 2.223996] Hardware name: Google juniper sku16 board (DT)
6125 13:09:03.491580 <4>[ 2.229735] Call trace:
6126 13:09:03.494795 <4>[ 2.232435] dump_backtrace.part.0+0xe0/0xf0
6127 13:09:03.498709 <4>[ 2.236971] show_stack+0x18/0x30
6128 13:09:03.501953 <4>[ 2.240544] dump_stack_lvl+0x64/0x80
6129 13:09:03.505088 <4>[ 2.244464] dump_stack+0x18/0x34
6130 13:09:03.511580 <4>[ 2.248032] sysfs_warn_dup+0x64/0x80
6131 13:09:03.515097 <4>[ 2.251954] sysfs_do_create_link_sd+0xf0/0x100
6132 13:09:03.518262 <4>[ 2.256742] sysfs_create_link+0x20/0x40
6133 13:09:03.525085 <4>[ 2.260922] bus_add_device+0x64/0x120
6134 13:09:03.528348 <4>[ 2.264927] device_add+0x354/0x7ec
6135 13:09:03.531553 <4>[ 2.268673] of_device_add+0x44/0x60
6136 13:09:03.534901 <4>[ 2.272507] of_platform_device_create_pdata+0x90/0x124
6137 13:09:03.541386 <4>[ 2.277989] of_platform_bus_create+0x154/0x380
6138 13:09:03.545021 <4>[ 2.282775] of_platform_populate+0x50/0xfc
6139 13:09:03.551507 <4>[ 2.287214] parse_mtd_partitions+0x1d8/0x4e0
6140 13:09:03.554989 <4>[ 2.291830] mtd_device_parse_register+0xec/0x2e0
6141 13:09:03.558374 <4>[ 2.296791] spi_nor_probe+0x280/0x2f4
6142 13:09:03.564860 <4>[ 2.300797] spi_mem_probe+0x6c/0xc0
6143 13:09:03.568297 <4>[ 2.304629] spi_probe+0x84/0xe4
6144 13:09:03.571620 <4>[ 2.308114] really_probe+0xbc/0x2dc
6145 13:09:03.575133 <4>[ 2.311944] __driver_probe_device+0x78/0x114
6146 13:09:03.578580 <4>[ 2.316556] driver_probe_device+0xd8/0x15c
6147 13:09:03.584802 <4>[ 2.320994] __device_attach_driver+0xb8/0x134
6148 13:09:03.588399 <4>[ 2.325692] bus_for_each_drv+0x7c/0xd4
6149 13:09:03.591702 <4>[ 2.329785] __device_attach+0x9c/0x1a0
6150 13:09:03.598171 <4>[ 2.333876] device_initial_probe+0x14/0x20
6151 13:09:03.601579 <4>[ 2.338314] bus_probe_device+0x98/0xa0
6152 13:09:03.604935 <4>[ 2.342404] device_add+0x3c0/0x7ec
6153 13:09:03.608380 <4>[ 2.346149] __spi_add_device+0x78/0x120
6154 13:09:03.611538 <4>[ 2.350326] spi_add_device+0x44/0x80
6155 13:09:03.618491 <4>[ 2.354243] spi_register_controller+0x704/0xb20
6156 13:09:03.621758 <4>[ 2.359115] devm_spi_register_controller+0x4c/0xac
6157 13:09:03.628666 <4>[ 2.364249] mtk_spi_probe+0x4f4/0x684
6158 13:09:03.631820 <4>[ 2.368253] platform_probe+0x68/0xc0
6159 13:09:03.634878 <4>[ 2.372170] really_probe+0xbc/0x2dc
6160 13:09:03.638358 <4>[ 2.376000] __driver_probe_device+0x78/0x114
6161 13:09:03.644824 <4>[ 2.380611] driver_probe_device+0xd8/0x15c
6162 13:09:03.648258 <4>[ 2.385049] __driver_attach+0x94/0x19c
6163 13:09:03.651495 <4>[ 2.389139] bus_for_each_dev+0x74/0xd0
6164 13:09:03.655103 <4>[ 2.393231] driver_attach+0x24/0x30
6165 13:09:03.658213 <4>[ 2.397060] bus_add_driver+0x154/0x20c
6166 13:09:03.664911 <4>[ 2.401149] driver_register+0x78/0x130
6167 13:09:03.668406 <4>[ 2.405240] __platform_driver_register+0x28/0x34
6168 13:09:03.671514 <4>[ 2.410199] mtk_spi_driver_init+0x1c/0x28
6169 13:09:03.678144 <4>[ 2.414556] do_one_initcall+0x64/0x1dc
6170 13:09:03.682039 <4>[ 2.418646] kernel_init_freeable+0x218/0x284
6171 13:09:03.684895 <4>[ 2.423260] kernel_init+0x24/0x12c
6172 13:09:03.688558 <4>[ 2.427005] ret_from_fork+0x10/0x20
6173 13:09:03.699663 <6>[ 2.435925] tun: Universal TUN/TAP device driver, 1.6
6174 13:09:03.703208 <6>[ 2.442218] thunder_xcv, ver 1.0
6175 13:09:03.706392 <6>[ 2.445732] thunder_bgx, ver 1.0
6176 13:09:03.709622 <6>[ 2.449235] nicpf, ver 1.0
6177 13:09:03.720582 <6>[ 2.453611] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6178 13:09:03.724028 <6>[ 2.461096] hns3: Copyright (c) 2017 Huawei Corporation.
6179 13:09:03.730261 <6>[ 2.466693] hclge is initializing
6180 13:09:03.733872 <6>[ 2.470284] e1000: Intel(R) PRO/1000 Network Driver
6181 13:09:03.740246 <6>[ 2.475419] e1000: Copyright (c) 1999-2006 Intel Corporation.
6182 13:09:03.743562 <6>[ 2.481443] e1000e: Intel(R) PRO/1000 Network Driver
6183 13:09:03.750142 <6>[ 2.486663] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6184 13:09:03.756920 <6>[ 2.492857] igb: Intel(R) Gigabit Ethernet Network Driver
6185 13:09:03.763512 <6>[ 2.498512] igb: Copyright (c) 2007-2014 Intel Corporation.
6186 13:09:03.770583 <6>[ 2.504354] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6187 13:09:03.777154 <6>[ 2.510877] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6188 13:09:03.780151 <6>[ 2.517434] sky2: driver version 1.30
6189 13:09:03.786955 <6>[ 2.522691] usbcore: registered new device driver r8152-cfgselector
6190 13:09:03.793210 <6>[ 2.529235] usbcore: registered new interface driver r8152
6191 13:09:03.800328 <6>[ 2.535058] VFIO - User Level meta-driver version: 0.3
6192 13:09:03.806535 <6>[ 2.542868] mtu3 11201000.usb: uwk - reg:0x420, version:101
6193 13:09:03.813547 <4>[ 2.548741] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6194 13:09:03.820101 <6>[ 2.556024] mtu3 11201000.usb: dr_mode: 1, drd: auto
6195 13:09:03.826554 <6>[ 2.561250] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6196 13:09:03.829988 <6>[ 2.567433] mtu3 11201000.usb: usb3-drd: 0
6197 13:09:03.839632 <6>[ 2.572977] mtu3 11201000.usb: xHCI platform device register success...
6198 13:09:03.846379 <4>[ 2.581596] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6199 13:09:03.852918 <6>[ 2.589531] xhci-mtk 11200000.usb: xHCI Host Controller
6200 13:09:03.860013 <6>[ 2.595045] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6201 13:09:03.866227 <6>[ 2.602766] xhci-mtk 11200000.usb: USB3 root hub has no ports
6202 13:09:03.876616 <6>[ 2.608773] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6203 13:09:03.883107 <6>[ 2.618198] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6204 13:09:03.889646 <6>[ 2.624275] xhci-mtk 11200000.usb: xHCI Host Controller
6205 13:09:03.896194 <6>[ 2.629763] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6206 13:09:03.903172 <6>[ 2.637422] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6207 13:09:03.906478 <6>[ 2.644240] hub 1-0:1.0: USB hub found
6208 13:09:03.909551 <6>[ 2.648268] hub 1-0:1.0: 1 port detected
6209 13:09:03.920352 <6>[ 2.653594] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6210 13:09:03.924027 <6>[ 2.662210] hub 2-0:1.0: USB hub found
6211 13:09:03.934289 <3>[ 2.666237] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6212 13:09:03.940133 <6>[ 2.674107] usbcore: registered new interface driver usb-storage
6213 13:09:03.946776 <6>[ 2.680692] usbcore: registered new device driver onboard-usb-hub
6214 13:09:03.962386 <4>[ 2.695209] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6215 13:09:03.970916 <6>[ 2.707432] mt6397-rtc mt6358-rtc: registered as rtc0
6216 13:09:03.981266 <6>[ 2.712913] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-18T13:08:53 UTC (1721308133)
6217 13:09:03.984606 <6>[ 2.722785] i2c_dev: i2c /dev entries driver
6218 13:09:03.996231 <6>[ 2.729228] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6219 13:09:04.005797 <6>[ 2.737557] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6220 13:09:04.009548 <6>[ 2.746464] i2c 4-0058: Fixed dependency cycle(s) with /panel
6221 13:09:04.019229 <6>[ 2.752495] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6222 13:09:04.035457 <6>[ 2.771993] cpu cpu0: EM: created perf domain
6223 13:09:04.045376 <6>[ 2.777516] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6224 13:09:04.052138 <6>[ 2.788820] cpu cpu4: EM: created perf domain
6225 13:09:04.059321 <6>[ 2.795845] sdhci: Secure Digital Host Controller Interface driver
6226 13:09:04.066045 <6>[ 2.802301] sdhci: Copyright(c) Pierre Ossman
6227 13:09:04.072389 <6>[ 2.807673] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6228 13:09:04.079576 <6>[ 2.807755] Synopsys Designware Multimedia Card Interface Driver
6229 13:09:04.085977 <6>[ 2.820230] sdhci-pltfm: SDHCI platform and OF driver helper
6230 13:09:04.092359 <6>[ 2.828084] ledtrig-cpu: registered to indicate activity on CPUs
6231 13:09:04.099415 <6>[ 2.835791] usbcore: registered new interface driver usbhid
6232 13:09:04.102537 <6>[ 2.841632] usbhid: USB HID core driver
6233 13:09:04.113491 <6>[ 2.845899] spi_master spi2: will run message pump with realtime priority
6234 13:09:04.117376 <4>[ 2.845902] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6235 13:09:04.127303 <4>[ 2.860197] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6236 13:09:04.140797 <6>[ 2.864166] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6237 13:09:04.154008 <6>[ 2.882849] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6238 13:09:04.161008 <6>[ 2.897600] cros-ec-spi spi2.0: Chrome EC device registered
6239 13:09:04.174113 <4>[ 2.907151] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6240 13:09:04.177471 <6>[ 2.913112] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6241 13:09:04.185196 <6>[ 2.921366] mmc0: new HS400 MMC card at address 0001
6242 13:09:04.192089 <6>[ 2.928510] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6243 13:09:04.203880 <4>[ 2.936943] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6244 13:09:04.207612 <6>[ 2.941959] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6245 13:09:04.215466 <6>[ 2.952126] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6246 13:09:04.226080 <4>[ 2.958823] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6247 13:09:04.228902 <6>[ 2.959448] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6248 13:09:04.236166 <4>[ 2.972713] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6249 13:09:04.242672 <6>[ 2.973296] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6250 13:09:04.269050 <6>[ 3.002373] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6251 13:09:04.276244 <6>[ 3.003462] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6252 13:09:04.286054 <6>[ 3.016137] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6253 13:09:04.294339 <6>[ 3.030517] NET: Registered PF_PACKET protocol family
6254 13:09:04.307449 <6>[ 3.033413] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6255 13:09:04.310845 <6>[ 3.035960] 9pnet: Installing 9P2000 support
6256 13:09:04.320634 <6>[ 3.048086] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6257 13:09:04.324096 <5>[ 3.052492] Key type dns_resolver registered
6258 13:09:04.334309 <6>[ 3.067252] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6259 13:09:04.337218 <6>[ 3.067810] registered taskstats version 1
6260 13:09:04.340633 <5>[ 3.078544] Loading compiled-in X.509 certificates
6261 13:09:04.388200 <3>[ 3.121298] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6262 13:09:04.417834 <6>[ 3.147720] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6263 13:09:04.428260 <6>[ 3.161401] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6264 13:09:04.438292 <6>[ 3.169992] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6265 13:09:04.444966 <6>[ 3.178528] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6266 13:09:04.454902 <6>[ 3.187052] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6267 13:09:04.461449 <6>[ 3.195576] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6268 13:09:04.471843 <6>[ 3.204098] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6269 13:09:04.478381 <6>[ 3.212617] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6270 13:09:04.485725 <6>[ 3.221834] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6271 13:09:04.492245 <6>[ 3.221920] hub 1-1:1.0: USB hub found
6272 13:09:04.498738 <6>[ 3.229360] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6273 13:09:04.502194 <6>[ 3.232837] hub 1-1:1.0: 3 ports detected
6274 13:09:04.508585 <6>[ 3.239677] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6275 13:09:04.515027 <6>[ 3.250488] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6276 13:09:04.521737 <6>[ 3.257997] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6277 13:09:04.529859 <6>[ 3.266341] panfrost 13040000.gpu: clock rate = 511999970
6278 13:09:04.540115 <6>[ 3.272034] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6279 13:09:04.549966 <6>[ 3.282237] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6280 13:09:04.556127 <6>[ 3.290245] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6281 13:09:04.569431 <6>[ 3.298678] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6282 13:09:04.576348 <6>[ 3.310756] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6283 13:09:04.589135 <6>[ 3.321921] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6284 13:09:04.598919 <6>[ 3.330824] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6285 13:09:04.608881 <6>[ 3.339976] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6286 13:09:04.615350 <6>[ 3.349106] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6287 13:09:04.625286 <6>[ 3.358235] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6288 13:09:04.635528 <6>[ 3.367537] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6289 13:09:04.645397 <6>[ 3.376839] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6290 13:09:04.655593 <6>[ 3.386313] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6291 13:09:04.662562 <6>[ 3.395787] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6292 13:09:04.672239 <6>[ 3.404914] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6293 13:09:04.745616 <6>[ 3.478743] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6294 13:09:04.755507 <6>[ 3.487637] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6295 13:09:04.766399 <6>[ 3.499671] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6296 13:09:04.798106 <6>[ 3.531278] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6297 13:09:05.452171 <6>[ 3.727501] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6298 13:09:05.462479 <4>[ 3.844634] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6299 13:09:05.468820 <4>[ 3.844649] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6300 13:09:05.476057 <6>[ 3.883792] r8152 1-1.2:1.0 eth0: v1.12.13
6301 13:09:05.482040 <6>[ 3.963162] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6302 13:09:05.488805 <6>[ 4.168849] Console: switching to colour frame buffer device 170x48
6303 13:09:05.495572 <6>[ 4.229465] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6304 13:09:05.516419 <6>[ 4.246541] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6305 13:09:05.534208 <6>[ 4.263598] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6306 13:09:05.540628 <6>[ 4.276134] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6307 13:09:05.551026 <6>[ 4.284244] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6308 13:09:05.561053 <6>[ 4.290855] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6309 13:09:05.580834 <6>[ 4.310683] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6310 13:09:06.808871 <6>[ 5.545267] r8152 1-1.2:1.0 eth0: carrier on
6311 13:09:09.571230 <5>[ 5.571288] Sending DHCP requests .., OK
6312 13:09:09.577597 <6>[ 8.311607] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6313 13:09:09.581296 <6>[ 8.320061] IP-Config: Complete:
6314 13:09:09.594423 <6>[ 8.323628] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6315 13:09:09.604250 <6>[ 8.334528] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6316 13:09:09.615991 <6>[ 8.348889] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6317 13:09:09.624529 <6>[ 8.348899] nameserver0=192.168.201.1
6318 13:09:09.632402 <6>[ 8.368798] clk: Disabling unused clocks
6319 13:09:09.637100 <6>[ 8.376838] ALSA device list:
6320 13:09:09.646390 <6>[ 8.382739] No soundcards found.
6321 13:09:09.655282 <6>[ 8.391658] Freeing unused kernel memory: 8512K
6322 13:09:09.662176 <6>[ 8.398738] Run /init as init process
6323 13:09:09.692881 <6>[ 8.429298] NET: Registered PF_INET6 protocol family
6324 13:09:09.700707 <6>[ 8.436763] Segment Routing with IPv6
6325 13:09:09.703941 <6>[ 8.441405] In-situ OAM (IOAM) with IPv6
6326 13:09:09.746169 <30>[ 8.455989] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6327 13:09:09.756180 <30>[ 8.492473] systemd[1]: Detected architecture arm64.
6328 13:09:09.759351
6329 13:09:09.762463 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6330 13:09:09.762548
6331 13:09:09.779072 <30>[ 8.515264] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6332 13:09:09.930947 <30>[ 8.663877] systemd[1]: Queued start job for default target graphical.target.
6333 13:09:09.951683 <30>[ 8.684839] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6334 13:09:09.961815 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6335 13:09:09.979418 <30>[ 8.712268] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6336 13:09:09.988874 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6337 13:09:10.007643 <30>[ 8.740495] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6338 13:09:10.019490 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6339 13:09:10.038901 <30>[ 8.772138] systemd[1]: Created slice user.slice - User and Session Slice.
6340 13:09:10.049576 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6341 13:09:10.070222 <30>[ 8.799652] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6342 13:09:10.081652 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6343 13:09:10.101979 <30>[ 8.831584] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6344 13:09:10.113764 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6345 13:09:10.140206 <30>[ 8.863419] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6346 13:09:10.158896 <30>[ 8.891687] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6347 13:09:10.166420 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6348 13:09:10.186489 <30>[ 8.919307] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6349 13:09:10.199433 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6350 13:09:10.218617 <30>[ 8.951382] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6351 13:09:10.232748 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6352 13:09:10.247196 <30>[ 8.983402] systemd[1]: Reached target paths.target - Path Units.
6353 13:09:10.261735 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6354 13:09:10.278375 <30>[ 9.011316] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6355 13:09:10.290943 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6356 13:09:10.306923 <30>[ 9.043315] systemd[1]: Reached target slices.target - Slice Units.
6357 13:09:10.322427 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6358 13:09:10.335159 <30>[ 9.071332] systemd[1]: Reached target swap.target - Swaps.
6359 13:09:10.345643 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6360 13:09:10.366367 <30>[ 9.099374] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6361 13:09:10.380545 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6362 13:09:10.399024 <30>[ 9.131740] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6363 13:09:10.412845 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6364 13:09:10.432610 <30>[ 9.164872] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6365 13:09:10.445838 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6366 13:09:10.463521 <30>[ 9.196239] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6367 13:09:10.478160 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6368 13:09:10.495210 <30>[ 9.227977] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6369 13:09:10.507703 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6370 13:09:10.527710 <30>[ 9.260156] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6371 13:09:10.541649 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6372 13:09:10.559253 <30>[ 9.292049] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6373 13:09:10.572895 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6374 13:09:10.591623 <30>[ 9.323796] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6375 13:09:10.604146 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6376 13:09:10.654987 <30>[ 9.387708] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6377 13:09:10.665394 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6378 13:09:10.676279 <30>[ 9.408568] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6379 13:09:10.686058 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6380 13:09:10.705439 <30>[ 9.438385] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6381 13:09:10.716243 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6382 13:09:10.742689 <30>[ 9.468606] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6383 13:09:10.784368 <30>[ 9.516614] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6384 13:09:10.795896 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6385 13:09:10.821056 <30>[ 9.553471] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6386 13:09:10.834010 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6387 13:09:10.856086 <30>[ 9.589084] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6388 13:09:10.872867 Startin<6>[ 9.603069] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6389 13:09:10.875873 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6390 13:09:10.922845 <30>[ 9.655788] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6391 13:09:10.935513 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6392 13:09:10.960185 <30>[ 9.693234] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6393 13:09:10.974991 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6394 13:09:10.996330 <30>[ 9.729059] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6395 13:09:11.009969 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6396 13:09:11.036243 <30>[ 9.769056] systemd[1]: Starting systemd-journald.service - Journal Service...
6397 13:09:11.048984 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6398 13:09:11.099430 <30>[ 9.832462] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6399 13:09:11.110208 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6400 13:09:11.135024 <30>[ 9.864262] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6401 13:09:11.147608 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6402 13:09:11.172353 <30>[ 9.905221] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6403 13:09:11.186715 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6404 13:09:11.205722 <30>[ 9.938722] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6405 13:09:11.216735 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6406 13:09:11.238228 <30>[ 9.971143] systemd[1]: Started systemd-journald.service - Journal Service.
6407 13:09:11.248094 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6408 13:09:11.268604 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6409 13:09:11.291273 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6410 13:09:11.311855 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6411 13:09:11.335859 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6412 13:09:11.357081 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6413 13:09:11.376428 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6414 13:09:11.401373 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6415 13:09:11.425444 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6416 13:09:11.449128 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6417 13:09:11.471098 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6418 13:09:11.487427 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6419 13:09:11.509345 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6420 13:09:11.527798 See 'systemctl status systemd-remount-fs.service' for details.
6421 13:09:11.549025 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6422 13:09:11.574050 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6423 13:09:11.651490 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6424 13:09:11.676919 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6425 13:09:11.689782 <46>[ 10.422377] systemd-journald[203]: Received client request to flush runtime journal.
6426 13:09:11.703817 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6427 13:09:11.727628 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6428 13:09:11.751400 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6429 13:09:11.782763 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6430 13:09:11.801048 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6431 13:09:11.824290 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6432 13:09:11.844141 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6433 13:09:11.865364 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6434 13:09:11.915886 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6435 13:09:11.939970 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6436 13:09:11.963302 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6437 13:09:11.983521 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6438 13:09:12.035892 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6439 13:09:12.060941 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6440 13:09:12.084618 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6441 13:09:12.111152 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6442 13:09:12.129977 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6443 13:09:12.147596 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6444 13:09:12.179354 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6445 13:09:12.195410 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6446 13:09:12.214905 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6447 13:09:12.334577 <6>[ 11.067354] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6448 13:09:12.344060 <3>[ 11.080625] thermal_sys: Failed to find 'trips' node
6449 13:09:12.355084 <3>[ 11.087976] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6450 13:09:12.365299 <3>[ 11.088137] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6451 13:09:12.371734 <3>[ 11.098023] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6452 13:09:12.386891 <3>[ 11.098034] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6453 13:09:12.396706 <3>[ 11.098040] elan_i2c 2-0015: Error applying setting, reverse things back
6454 13:09:12.403480 <3>[ 11.129417] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6455 13:09:12.412997 <3>[ 11.136218] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6456 13:09:12.419946 <3>[ 11.146901] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6457 13:09:12.426712 <4>[ 11.153422] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6458 13:09:12.433173 <6>[ 11.155603] mc: Linux media interface: v0.10
6459 13:09:12.439733 <3>[ 11.160589] mtk-scp 10500000.scp: invalid resource
6460 13:09:12.446591 <6>[ 11.160664] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6461 13:09:12.456198 <3>[ 11.161961] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6462 13:09:12.462723 <3>[ 11.189616] thermal_sys: Failed to find 'trips' node
6463 13:09:12.466344 <6>[ 11.191473] videodev: Linux video capture interface: v2.00
6464 13:09:12.472534 <6>[ 11.192272] remoteproc remoteproc0: scp is available
6465 13:09:12.479519 <4>[ 11.192425] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6466 13:09:12.486079 <6>[ 11.192436] remoteproc remoteproc0: powering up scp
6467 13:09:12.495898 <4>[ 11.192472] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6468 13:09:12.502965 <3>[ 11.192478] remoteproc remoteproc0: request_firmware failed: -2
6469 13:09:12.509564 <4>[ 11.199398] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6470 13:09:12.519323 <3>[ 11.202597] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6471 13:09:12.526198 <4>[ 11.210850] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6472 13:09:12.532887 <6>[ 11.210941] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6473 13:09:12.542379 <3>[ 11.213498] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6474 13:09:12.549018 <4>[ 11.213502] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6475 13:09:12.558927 <4>[ 11.215401] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6476 13:09:12.568947 <3>[ 11.229803] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6477 13:09:12.579040 <6>[ 11.260022] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6478 13:09:12.588589 <3>[ 11.267257] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6479 13:09:12.598588 <6>[ 11.286037] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6480 13:09:12.608517 <3>[ 11.291725] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6481 13:09:12.620507 <3>[ 11.291735] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6482 13:09:12.629625 <6>[ 11.304705] Bluetooth: Core ver 2.22
6483 13:09:12.643804 <3>[ 11.309569] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6484 13:09:12.656379 <3>[ 11.310155] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6485 13:09:12.668952 <5>[ 11.336992] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6486 13:09:12.696594 <6>[ 11.429449] NET: Registered PF_BLUETOOTH protocol family
6487 13:09:12.713335 <5>[ 11.445511] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6488 13:09:12.719803 <6>[ 11.446263] Bluetooth: HCI device and connection manager initialized
6489 13:09:12.726868 <5>[ 11.453690] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6490 13:09:12.733623 <6>[ 11.459638] Bluetooth: HCI socket layer initialized
6491 13:09:12.739751 <4>[ 11.468095] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6492 13:09:12.746356 <6>[ 11.473119] Bluetooth: L2CAP socket layer initialized
6493 13:09:12.753064 <3>[ 11.474488] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6494 13:09:12.759842 <6>[ 11.482293] cfg80211: failed to load regulatory.db
6495 13:09:12.766529 <6>[ 11.487297] Bluetooth: SCO socket layer initialized
6496 13:09:12.809120 <6>[ 11.540103] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6497 13:09:12.828313 [[0;32m OK [<3>[ 11.557872] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6498 13:09:12.841181 0m] Created slice [0;1;39msystem-syste…- Slic<6>[ 11.575002] cs_system_cfg: CoreSight Configuration manager initialised
6499 13:09:12.845472 e /system/systemd-backlight.
6500 13:09:12.852164 <3>[ 11.585236] debugfs: File 'Playback' in directory 'dapm' already present!
6501 13:09:12.863425 <3>[ 11.596548] debugfs: File 'Capture' in directory 'dapm' already present!
6502 13:09:12.874236 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6503 13:09:12.935154 <4>[ 11.668009] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6504 13:09:12.941668 <4>[ 11.668009] Fallback method does not support PEC.
6505 13:09:12.954064 <6>[ 11.689807] Bluetooth: HCI UART driver ver 2.3
6506 13:09:12.960528 <3>[ 11.691263] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6507 13:09:12.968533 <6>[ 11.694559] Bluetooth: HCI UART protocol H4 registered
6508 13:09:12.978905 <6>[ 11.705522] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6509 13:09:12.984860 <3>[ 11.709889] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6510 13:09:12.991513 <6>[ 11.720626] Bluetooth: HCI UART protocol LL registered
6511 13:09:13.022168 <6>[ 11.758385] Bluetooth: HCI UART protocol Three-wire (H5) registered
6512 13:09:13.032030 <6>[ 11.758920] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6513 13:09:13.064432 <6>[ 11.800615] Bluetooth: HCI UART protocol Broadcom registered
6514 13:09:13.074777 <6>[ 11.801091] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6515 13:09:13.091483 <6>[ 11.827469] Bluetooth: HCI UART protocol QCA registered
6516 13:09:13.103098 <6>[ 11.838854] Bluetooth: HCI UART protocol Marvell registered
6517 13:09:13.112792 <6>[ 11.839265] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6518 13:09:13.121630 <3>[ 11.842197] thermal_sys: Failed to find 'trips' node
6519 13:09:13.134705 <3>[ 11.842204] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6520 13:09:13.145693 <3>[ 11.842219] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6521 13:09:13.157612 <4>[ 11.842227] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6522 13:09:13.175778 <6>[ 11.908462] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6523 13:09:13.189568 <6>[ 11.922498] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6524 13:09:13.202480 <6>[ 11.935284] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6525 13:09:13.215439 <6>[ 11.948063] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6526 13:09:13.229577 <6>[ 11.962167] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6527 13:09:13.240794 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6528 13:09:13.243924 <6>[ 11.981150] Bluetooth: hci0: setting up ROME/QCA6390
6529 13:09:13.294690 <6>[ 12.030441] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6530 13:09:13.315623 <6>[ 12.048312] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6531 13:09:13.330561 <6>[ 12.063656] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6532 13:09:13.347974 <6>[ 12.077660] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6533 13:09:13.402418 <6>[ 12.135409] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6534 13:09:13.414108 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6535 13:09:13.435599 <6>[ 12.164702] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6536 13:09:13.447451 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6537 13:09:13.470159 [[0;32m OK [0m] Reached targ<6>[ 12.164708] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video2
6538 13:09:13.480056 et [0;1;39msysinit.target[0m - System Initiali<3>[ 12.202096] Bluetooth: hci0: Frame reassembly failed (-84)
6539 13:09:13.480531 zation.
6540 13:09:13.505333 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6541 13:09:13.523858 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6542 13:09:13.533541 <6>[ 12.265916] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6543 13:09:13.545850 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6544 13:09:13.576390 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6545 13:09:13.582998 <6>[ 12.315860] usbcore: registered new interface driver uvcvideo
6546 13:09:13.595029 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6547 13:09:13.604745 <6>[ 12.339912] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6548 13:09:13.617375 [[0;32m OK [<3>[ 12.350032] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6549 13:09:13.625194 0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6550 13:09:13.635114 <3>[ 12.365960] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6551 13:09:13.644798 <6>[ 12.374576] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6552 13:09:13.660409 <3>[ 12.392794] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6553 13:09:13.675399 <3>[ 12.407588] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6554 13:09:13.684619 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6555 13:09:13.702868 <3>[ 12.435147] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6556 13:09:13.718797 Starting [0;1;39msystemd-logind.se…i<3>[ 12.450884] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6557 13:09:13.721916 ce[0m - User Login Management...
6558 13:09:13.735468 <3>[ 12.468096] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6559 13:09:13.754409 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Conf<3>[ 12.485884] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6560 13:09:13.754821 iguration.
6561 13:09:13.762325 <6>[ 12.497888] Bluetooth: hci0: QCA Product ID :0x00000008
6562 13:09:13.771249 <6>[ 12.505539] Bluetooth: hci0: QCA SOC Version :0x00000044
6563 13:09:13.774637 <6>[ 12.505548] Bluetooth: hci0: QCA ROM Version :0x00000302
6564 13:09:13.786496 [[0;32m OK [0m] Started [0;<6>[ 12.505552] Bluetooth: hci0: QCA Patch Version:0x00000111
6565 13:09:13.789404 1;39mdbus.service[0m - D-Bus System Message Bus.
6566 13:09:13.796258 <6>[ 12.530643] Bluetooth: hci0: QCA controller version 0x00440302
6567 13:09:13.806542 <6>[ 12.538940] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6568 13:09:13.816394 <4>[ 12.547752] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6569 13:09:13.826393 <3>[ 12.558877] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6570 13:09:13.833019 <3>[ 12.568761] Bluetooth: hci0: QCA Failed to download patch (-2)
6571 13:09:13.844167 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6572 13:09:13.859533 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6573 13:09:13.882851 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6574 13:09:13.899518 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6575 13:09:13.947655 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6576 13:09:13.970285 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6577 13:09:13.980930 <6>[ 12.713518] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6578 13:09:13.998313 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6579 13:09:14.053504 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6580 13:09:14.069093 <4>[ 12.804644] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6581 13:09:14.097085 <4>[ 12.829222] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6582 13:09:14.113281 [[0;32m OK [<4>[ 12.846533] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6583 13:09:14.126416 0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Get<4>[ 12.859807] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6584 13:09:14.126837 ty on ttyS0.
6585 13:09:14.140045 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6586 13:09:14.156768 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6587 13:09:14.176240 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6588 13:09:14.233041 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6589 13:09:14.255601 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6590 13:09:14.285371 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6591 13:09:14.344294 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6592 13:09:14.386678
6593 13:09:14.390102 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6594 13:09:14.390189
6595 13:09:14.393000 debian-bookworm-arm64 login: root (automatic login)
6596 13:09:14.393085
6597 13:09:14.416684 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Thu Jul 18 12:53:03 UTC 2024 aarch64
6598 13:09:14.416772
6599 13:09:14.423458 The programs included with the Debian GNU/Linux system are free software;
6600 13:09:14.430059 the exact distribution terms for each program are described in the
6601 13:09:14.433176 individual files in /usr/share/doc/*/copyright.
6602 13:09:14.433284
6603 13:09:14.439538 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6604 13:09:14.443015 permitted by applicable law.
6605 13:09:14.443416 Matched prompt #10: / #
6607 13:09:14.443620 Setting prompt string to ['/ #']
6608 13:09:14.443716 end: 2.2.5.1 login-action (duration 00:00:14) [common]
6610 13:09:14.443930 end: 2.2.5 auto-login-action (duration 00:00:14) [common]
6611 13:09:14.444017 start: 2.2.6 expect-shell-connection (timeout 00:03:41) [common]
6612 13:09:14.444123 Setting prompt string to ['/ #']
6613 13:09:14.444236 Forcing a shell prompt, looking for ['/ #']
6614 13:09:14.444337 Sending line: ''
6616 13:09:14.494693 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6617 13:09:14.494769 Waiting using forced prompt support (timeout 00:02:30)
6618 13:09:14.499546 / #
6619 13:09:14.499820 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6620 13:09:14.499916 start: 2.2.7 export-device-env (timeout 00:03:41) [common]
6621 13:09:14.500009 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6622 13:09:14.500098 end: 2.2 depthcharge-retry (duration 00:01:19) [common]
6623 13:09:14.500186 end: 2 depthcharge-action (duration 00:01:19) [common]
6624 13:09:14.500273 start: 3 lava-test-retry (timeout 00:08:16) [common]
6625 13:09:14.500360 start: 3.1 lava-test-shell (timeout 00:08:16) [common]
6626 13:09:14.500432 Using namespace: common
6627 13:09:14.500536 Sending line: '#'
6629 13:09:14.601018 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6630 13:09:14.606064 / # #
6631 13:09:14.606358 Using /lava-14878986
6632 13:09:14.606428 Sending line: 'export SHELL=/bin/sh'
6634 13:09:14.711620 / # export SHELL=/bin/sh
6635 13:09:14.711911 Sending line: '. /lava-14878986/environment'
6637 13:09:14.817146 / # . /lava-14878986/environment
6638 13:09:14.817420 Sending line: '/lava-14878986/bin/lava-test-runner /lava-14878986/0'
6640 13:09:14.917878 Test shell timeout: 10s (minimum of the action and connection timeout)
6641 13:09:14.923041 / # /lava-14878986/bin/lava-test-runner /lava-14878986/0
6642 13:09:14.950807 + export TESTRUN_ID=0_v4l2-compliance-uvc
6643 13:09:14.954022 + cd /lava-14878986/0/tests/0_v4l2-compliance-uvc
6644 13:09:14.954108 + cat uuid
6645 13:09:14.957274 + UUID=14878986_1.5.2.3.1
6646 13:09:14.957359 + set +x
6647 13:09:14.964191 <LAVA_SIGNAL_STARTRUN 0_v4l2-compliance-uvc 14878986_1.5.2.3.1>
6648 13:09:14.964432 Received signal: <STARTRUN> 0_v4l2-compliance-uvc 14878986_1.5.2.3.1
6649 13:09:14.964541 Starting test lava.0_v4l2-compliance-uvc (14878986_1.5.2.3.1)
6650 13:09:14.964661 Skipping test definition patterns.
6651 13:09:14.967397 + /usr/bin/v4l2-parser.sh -d uvcvideo
6652 13:09:14.973695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=device-presence RESULT=pass>
6653 13:09:14.973773 device: /dev/video0
6654 13:09:14.974003 Received signal: <TESTCASE> TEST_CASE_ID=device-presence RESULT=pass
6656 13:09:21.864277 v4l2-compliance 1.27.0-1, 64 bits, 64-bit time_t
6657 13:09:21.877888 v4l2-compliance SHA: a18611d8960f 2024-03-08 13:09:54
6658 13:09:21.890049
6659 13:09:21.909406 Compliance test for uvcvideo device /dev/video0:
6660 13:09:21.919274
6661 13:09:21.935196 Driver Info:
6662 13:09:21.948985 Driver name : uvcvideo
6663 13:09:21.967047 Card type : HD WebCam: HD WebCam
6664 13:09:21.983293 Bus info : usb-11200000.usb-1.3
6665 13:09:21.995548 Driver version : 6.1.96
6666 13:09:22.010155 Capabilities : 0x84a00001
6667 13:09:22.029652 Metadata Capture
6668 13:09:22.043519 Streaming
6669 13:09:22.057544 Extended Pix Format
6670 13:09:22.071166 Device Capabilities
6671 13:09:22.087615 Device Caps : 0x04200001
6672 13:09:22.106248 Streaming
6673 13:09:22.119863 Extended Pix Format
6674 13:09:22.134709 Media Driver Info:
6675 13:09:22.149029 Driver name : uvcvideo
6676 13:09:22.166117 Model : HD WebCam: HD WebCam
6677 13:09:22.177246 Serial :
6678 13:09:22.196158 Bus info : usb-11200000.usb-1.3
6679 13:09:22.206511 Media version : 6.1.96
6680 13:09:22.225025 Hardware revision: 0x00003269 (12905)
6681 13:09:22.235725 Driver version : 6.1.96
6682 13:09:22.250519 Interface Info:
6683 13:09:22.267853 <LAVA_SIGNAL_TESTSET START Interface-Info>
6684 13:09:22.268496 Received signal: <TESTSET> START Interface-Info
6685 13:09:22.268847 Starting test_set Interface-Info
6686 13:09:22.270991 ID : 0x03000002
6687 13:09:22.283294 Type : V4L Video
6688 13:09:22.298573 Entity Info:
6689 13:09:22.310371 <LAVA_SIGNAL_TESTSET STOP>
6690 13:09:22.310629 Received signal: <TESTSET> STOP
6691 13:09:22.310699 Closing test_set Interface-Info
6692 13:09:22.321825 <LAVA_SIGNAL_TESTSET START Entity-Info>
6693 13:09:22.322075 Received signal: <TESTSET> START Entity-Info
6694 13:09:22.322146 Starting test_set Entity-Info
6695 13:09:22.325256 ID : 0x00000001 (1)
6696 13:09:22.341096 Name : HD WebCam: HD WebCam
6697 13:09:22.353275 Function : V4L2 I/O
6698 13:09:22.369630 Flags : default
6699 13:09:22.383001 Pad 0x01000007 : 0: Sink
6700 13:09:22.407619 Link 0x02000013: from remote pad 0x100000a of entity 'Extension 4' (Video Pixel Formatter): Data, Enabled, Immutable
6701 13:09:22.410949
6702 13:09:22.423638 Required ioctls:
6703 13:09:22.432871 <LAVA_SIGNAL_TESTSET STOP>
6704 13:09:22.433119 Received signal: <TESTSET> STOP
6705 13:09:22.433186 Closing test_set Entity-Info
6706 13:09:22.444248 <LAVA_SIGNAL_TESTSET START Required-ioctls>
6707 13:09:22.444474 Received signal: <TESTSET> START Required-ioctls
6708 13:09:22.444545 Starting test_set Required-ioctls
6709 13:09:22.447148 test MC information (see 'Media Driver Info' above): OK
6710 13:09:22.477742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MC-information-see-Media-Driver-Info-above RESULT=pass>
6711 13:09:22.478000 Received signal: <TESTCASE> TEST_CASE_ID=MC-information-see-Media-Driver-Info-above RESULT=pass
6713 13:09:22.481060 test VIDIOC_QUERYCAP: OK
6714 13:09:22.502302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass>
6715 13:09:22.502550 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass
6717 13:09:22.505750 test invalid ioctls: OK
6718 13:09:22.530669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-ioctls RESULT=pass>
6719 13:09:22.530750
6720 13:09:22.530981 Received signal: <TESTCASE> TEST_CASE_ID=invalid-ioctls RESULT=pass
6722 13:09:22.545844 Allow for multiple opens:
6723 13:09:22.556049 <LAVA_SIGNAL_TESTSET STOP>
6724 13:09:22.556286 Received signal: <TESTSET> STOP
6725 13:09:22.556352 Closing test_set Required-ioctls
6726 13:09:22.566228 <LAVA_SIGNAL_TESTSET START Allow-for-multiple-opens>
6727 13:09:22.566484 Received signal: <TESTSET> START Allow-for-multiple-opens
6728 13:09:22.566560 Starting test_set Allow-for-multiple-opens
6729 13:09:22.569461 test second /dev/video0 open: OK
6730 13:09:22.594826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=second-/dev/video0-open RESULT=pass>
6731 13:09:22.595084 Received signal: <TESTCASE> TEST_CASE_ID=second-/dev/video0-open RESULT=pass
6733 13:09:22.598240 test VIDIOC_QUERYCAP: OK
6734 13:09:22.626414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass>
6735 13:09:22.626678 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass
6737 13:09:22.629644 test VIDIOC_G/S_PRIORITY: OK
6738 13:09:22.657862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_PRIORITY RESULT=pass>
6739 13:09:22.658132 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_PRIORITY RESULT=pass
6741 13:09:22.660578 test for unlimited opens: OK
6742 13:09:22.685996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=for-unlimited-opens RESULT=pass>
6743 13:09:22.686086
6744 13:09:22.686340 Received signal: <TESTCASE> TEST_CASE_ID=for-unlimited-opens RESULT=pass
6746 13:09:22.699519 Debug ioctls:
6747 13:09:22.706081 <LAVA_SIGNAL_TESTSET STOP>
6748 13:09:22.706337 Received signal: <TESTSET> STOP
6749 13:09:22.706414 Closing test_set Allow-for-multiple-opens
6750 13:09:22.717143 <LAVA_SIGNAL_TESTSET START Debug-ioctls>
6751 13:09:22.717400 Received signal: <TESTSET> START Debug-ioctls
6752 13:09:22.717477 Starting test_set Debug-ioctls
6753 13:09:22.720402 test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
6754 13:09:22.749305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_DBG_G/S_REGISTER RESULT=pass>
6755 13:09:22.749561 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_DBG_G/S_REGISTER RESULT=pass
6757 13:09:22.756195 test VIDIOC_LOG_STATUS: OK (Not Supported)
6758 13:09:22.780498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_LOG_STATUS RESULT=pass>
6759 13:09:22.780601
6760 13:09:22.780873 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_LOG_STATUS RESULT=pass
6762 13:09:22.797435 Input ioctls:
6763 13:09:22.808362 <LAVA_SIGNAL_TESTSET STOP>
6764 13:09:22.808618 Received signal: <TESTSET> STOP
6765 13:09:22.808695 Closing test_set Debug-ioctls
6766 13:09:22.818919 <LAVA_SIGNAL_TESTSET START Input-ioctls>
6767 13:09:22.819176 Received signal: <TESTSET> START Input-ioctls
6768 13:09:22.819252 Starting test_set Input-ioctls
6769 13:09:22.822312 test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
6770 13:09:22.851441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS RESULT=pass>
6771 13:09:22.851697 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS RESULT=pass
6773 13:09:22.854754 test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
6774 13:09:22.880124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass>
6775 13:09:22.880382 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass
6777 13:09:22.887054 test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
6778 13:09:22.914193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_S_HW_FREQ_SEEK RESULT=pass>
6779 13:09:22.914495 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_S_HW_FREQ_SEEK RESULT=pass
6781 13:09:22.920682 test VIDIOC_ENUMAUDIO: OK (Not Supported)
6782 13:09:22.947438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUMAUDIO RESULT=pass>
6783 13:09:22.948076 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUMAUDIO RESULT=pass
6785 13:09:22.950510 test VIDIOC_G/S/ENUMINPUT: OK
6786 13:09:22.977097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/ENUMINPUT RESULT=pass>
6787 13:09:22.977734 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/ENUMINPUT RESULT=pass
6789 13:09:22.980299 test VIDIOC_G/S_AUDIO: OK (Not Supported)
6790 13:09:23.008200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_AUDIO RESULT=pass>
6791 13:09:23.008865 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_AUDIO RESULT=pass
6793 13:09:23.012012 Inputs: 1 Audio Inputs: 0 Tuners: 0
6794 13:09:23.021327
6795 13:09:23.042790 test VIDIOC_G/S_MODULATOR: OK (Not Supported)
6796 13:09:23.069307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_MODULATOR RESULT=pass>
6797 13:09:23.069948 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_MODULATOR RESULT=pass
6799 13:09:23.076168 test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
6800 13:09:23.100882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass>
6801 13:09:23.101519 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass
6803 13:09:23.103753 test VIDIOC_ENUMAUDOUT: OK (Not Supported)
6804 13:09:23.134877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUMAUDOUT RESULT=pass>
6805 13:09:23.135518 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUMAUDOUT RESULT=pass
6807 13:09:23.141515 test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
6808 13:09:23.164560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/ENUMOUTPUT RESULT=pass>
6809 13:09:23.165381 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/ENUMOUTPUT RESULT=pass
6811 13:09:23.171141 test VIDIOC_G/S_AUDOUT: OK (Not Supported)
6812 13:09:23.194737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_AUDOUT RESULT=pass>
6813 13:09:23.195361 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_AUDOUT RESULT=pass
6815 13:09:23.199024
6816 13:09:23.220882 test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
6817 13:09:23.248205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_STD RESULT=pass>
6818 13:09:23.248855 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_STD RESULT=pass
6820 13:09:23.254184 test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
6821 13:09:23.282035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS RESULT=pass>
6822 13:09:23.282701 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS RESULT=pass
6824 13:09:23.285285 test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
6825 13:09:23.311835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_DV_TIMINGS_CAP RESULT=pass>
6826 13:09:23.312483 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_DV_TIMINGS_CAP RESULT=pass
6828 13:09:23.318675 test VIDIOC_G/S_EDID: OK (Not Supported)
6829 13:09:23.341986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_EDID RESULT=pass>
6830 13:09:23.342384
6831 13:09:23.343061 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_EDID RESULT=pass
6833 13:09:23.356908 Control ioctls (Input 0):
6834 13:09:23.366272 <LAVA_SIGNAL_TESTSET STOP>
6835 13:09:23.367034 Received signal: <TESTSET> STOP
6836 13:09:23.367358 Closing test_set Input-ioctls
6837 13:09:23.377767 <LAVA_SIGNAL_TESTSET START Control-ioctls-Input-0>
6838 13:09:23.378383 Received signal: <TESTSET> START Control-ioctls-Input-0
6839 13:09:23.378731 Starting test_set Control-ioctls-Input-0
6840 13:09:23.380566 test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
6841 13:09:23.407938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERY_EXT_CTRL/QUERYMENU RESULT=pass>
6842 13:09:23.408363 test VIDIOC_QUERYCTRL: OK
6843 13:09:23.408980 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERY_EXT_CTRL/QUERYMENU RESULT=pass
6845 13:09:23.434570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCTRL RESULT=pass>
6846 13:09:23.435242 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCTRL RESULT=pass
6848 13:09:23.438119 test VIDIOC_G/S_CTRL: OK
6849 13:09:23.465664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_CTRL RESULT=pass>
6850 13:09:23.466327 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_CTRL RESULT=pass
6852 13:09:23.468762 test VIDIOC_G/S/TRY_EXT_CTRLS: OK
6853 13:09:23.497923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/TRY_EXT_CTRLS RESULT=pass>
6854 13:09:23.498531 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/TRY_EXT_CTRLS RESULT=pass
6856 13:09:23.504610 test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
6857 13:09:23.534273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT RESULT=pass>
6858 13:09:23.534527 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT RESULT=pass
6860 13:09:23.537401 test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
6861 13:09:23.564055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_JPEGCOMP RESULT=pass>
6862 13:09:23.564344 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_JPEGCOMP RESULT=pass
6864 13:09:23.567330 Standard Controls: 15 Private Controls: 0
6865 13:09:23.578300
6866 13:09:23.592197 Format ioctls (Input 0):
6867 13:09:23.603125 <LAVA_SIGNAL_TESTSET STOP>
6868 13:09:23.603369 Received signal: <TESTSET> STOP
6869 13:09:23.603434 Closing test_set Control-ioctls-Input-0
6870 13:09:23.614224 <LAVA_SIGNAL_TESTSET START Format-ioctls-Input-0>
6871 13:09:23.614470 Received signal: <TESTSET> START Format-ioctls-Input-0
6872 13:09:23.614544 Starting test_set Format-ioctls-Input-0
6873 13:09:23.617321 test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
6874 13:09:23.646442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS RESULT=pass>
6875 13:09:23.646695 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS RESULT=pass
6877 13:09:23.650087 test VIDIOC_G/S_PARM: OK
6878 13:09:23.674167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_PARM RESULT=pass>
6879 13:09:23.674438 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_PARM RESULT=pass
6881 13:09:23.676859 test VIDIOC_G_FBUF: OK (Not Supported)
6882 13:09:23.703723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_FBUF RESULT=pass>
6883 13:09:23.703981 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_FBUF RESULT=pass
6885 13:09:23.706968 test VIDIOC_G_FMT: OK
6886 13:09:23.734392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_FMT RESULT=pass>
6887 13:09:23.734646 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_FMT RESULT=pass
6889 13:09:23.738161 test VIDIOC_TRY_FMT: OK
6890 13:09:23.764838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_FMT RESULT=pass>
6891 13:09:23.765094 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_FMT RESULT=pass
6893 13:09:23.771166 warn: v4l2-test-formats.cpp(1046): Could not set fmt2
6894 13:09:23.780261 test VIDIOC_S_FMT: OK
6895 13:09:23.810022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_S_FMT RESULT=pass>
6896 13:09:23.810281 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_S_FMT RESULT=pass
6898 13:09:23.813209 test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
6899 13:09:23.841131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_SLICED_VBI_CAP RESULT=pass>
6900 13:09:23.841388 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_SLICED_VBI_CAP RESULT=pass
6902 13:09:23.844083 test Cropping: OK (Not Supported)
6903 13:09:23.871359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Cropping RESULT=pass>
6904 13:09:23.871617 Received signal: <TESTCASE> TEST_CASE_ID=Cropping RESULT=pass
6906 13:09:23.874510 test Composing: OK (Not Supported)
6907 13:09:23.900211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Composing RESULT=pass>
6908 13:09:23.900473 Received signal: <TESTCASE> TEST_CASE_ID=Composing RESULT=pass
6910 13:09:23.903350 test Scaling: OK (Not Supported)
6911 13:09:23.934311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Scaling RESULT=pass>
6912 13:09:23.934401
6913 13:09:23.934657 Received signal: <TESTCASE> TEST_CASE_ID=Scaling RESULT=pass
6915 13:09:23.950301 Codec ioctls (Input 0):
6916 13:09:23.959182 <LAVA_SIGNAL_TESTSET STOP>
6917 13:09:23.959436 Received signal: <TESTSET> STOP
6918 13:09:23.959510 Closing test_set Format-ioctls-Input-0
6919 13:09:23.969983 <LAVA_SIGNAL_TESTSET START Codec-ioctls-Input-0>
6920 13:09:23.970240 Received signal: <TESTSET> START Codec-ioctls-Input-0
6921 13:09:23.970314 Starting test_set Codec-ioctls-Input-0
6922 13:09:23.973286 test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
6923 13:09:23.998758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_ENCODER_CMD RESULT=pass>
6924 13:09:23.999014 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_ENCODER_CMD RESULT=pass
6926 13:09:24.005398 test VIDIOC_G_ENC_INDEX: OK (Not Supported)
6927 13:09:24.030751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_ENC_INDEX RESULT=pass>
6928 13:09:24.031008 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_ENC_INDEX RESULT=pass
6930 13:09:24.037112 test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)
6931 13:09:24.062523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_DECODER_CMD RESULT=pass>
6932 13:09:24.062612
6933 13:09:24.062866 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_DECODER_CMD RESULT=pass
6935 13:09:24.077059 Buffer ioctls (Input 0):
6936 13:09:24.086093 <LAVA_SIGNAL_TESTSET STOP>
6937 13:09:24.086349 Received signal: <TESTSET> STOP
6938 13:09:24.086422 Closing test_set Codec-ioctls-Input-0
6939 13:09:24.097134 <LAVA_SIGNAL_TESTSET START Buffer-ioctls-Input-0>
6940 13:09:24.097390 Received signal: <TESTSET> START Buffer-ioctls-Input-0
6941 13:09:24.097465 Starting test_set Buffer-ioctls-Input-0
6942 13:09:24.100318 test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
6943 13:09:24.131516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF RESULT=pass>
6944 13:09:24.131776 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF RESULT=pass
6946 13:09:24.134738 test CREATE_BUFS maximum buffers: OK
6947 13:09:24.161178 Received signal: <TESTCASE> TEST_CASE_ID=CREATE_BUFS-maximum-buffers RESULT=pass
6949 13:09:24.164299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CREATE_BUFS-maximum-buffers RESULT=pass>
6950 13:09:24.164387 test VIDIOC_EXPBUF: OK
6951 13:09:24.190686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_EXPBUF RESULT=pass>
6952 13:09:24.190945 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_EXPBUF RESULT=pass
6954 13:09:24.194273 test Requests: OK (Not Supported)
6955 13:09:24.221753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Requests RESULT=pass>
6956 13:09:24.221842
6957 13:09:24.222095 Received signal: <TESTCASE> TEST_CASE_ID=Requests RESULT=pass
6959 13:09:24.235118 Test input 0:
6960 13:09:24.249534
6961 13:09:24.262995 Streaming ioctls:
6962 13:09:24.272450 <LAVA_SIGNAL_TESTSET STOP>
6963 13:09:24.272713 Received signal: <TESTSET> STOP
6964 13:09:24.272780 Closing test_set Buffer-ioctls-Input-0
6965 13:09:24.283199 <LAVA_SIGNAL_TESTSET START Streaming-ioctls_Test-input-0>
6966 13:09:24.283450 Received signal: <TESTSET> START Streaming-ioctls_Test-input-0
6967 13:09:24.283520 Starting test_set Streaming-ioctls_Test-input-0
6968 13:09:24.286698 test read/write: OK (Not Supported)
6969 13:09:24.315528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=read/write RESULT=pass>
6970 13:09:24.315782 Received signal: <TESTCASE> TEST_CASE_ID=read/write RESULT=pass
6972 13:09:24.318951 test blocking wait: OK
6973 13:09:24.347403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blocking-wait RESULT=pass>
6974 13:09:24.347699 Received signal: <TESTCASE> TEST_CASE_ID=blocking-wait RESULT=pass
6976 13:09:24.353505 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6977 13:09:24.362905 test MMAP (no poll): FAIL
6978 13:09:24.395348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-no-poll RESULT=fail>
6979 13:09:24.395612 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-no-poll RESULT=fail
6981 13:09:24.401575 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6982 13:09:24.410242 test MMAP (select): FAIL
6983 13:09:24.440494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-select RESULT=fail>
6984 13:09:24.441124 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-select RESULT=fail
6986 13:09:24.447099 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6987 13:09:24.454955 test MMAP (epoll): FAIL
6988 13:09:24.483222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-epoll RESULT=fail>
6989 13:09:24.483734
6990 13:09:24.484436 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-epoll RESULT=fail
6992 13:09:24.718262
6993 13:09:24.730204 test USERPTR (no poll): OK
6994 13:09:24.762999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=USERPTR-no-poll RESULT=pass>
6995 13:09:24.763306
6996 13:09:24.763760 Received signal: <TESTCASE> TEST_CASE_ID=USERPTR-no-poll RESULT=pass
6998 13:09:25.013922
6999 13:09:25.024832 test USERPTR (select): OK
7000 13:09:25.053693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=USERPTR-select RESULT=pass>
7001 13:09:25.053947 Received signal: <TESTCASE> TEST_CASE_ID=USERPTR-select RESULT=pass
7003 13:09:25.060285 test DMABUF: Cannot test, specify --expbuf-device
7004 13:09:25.067801
7005 13:09:25.090342 Total for uvcvideo device /dev/video0: 54, Succeeded: 51, Failed: 3, Warnings: 1
7006 13:09:25.096772 <LAVA_TEST_RUNNER EXIT>
7007 13:09:25.097030 ok: lava_test_shell seems to have completed
7008 13:09:25.097107 Marking unfinished test run as failed
7010 13:09:25.098017 device-presence: pass
MC-information-see-Media-Driver-Info-above:
set: Required-ioctls
result: pass
VIDIOC_QUERYCAP:
set: Allow-for-multiple-opens
result: pass
invalid-ioctls:
set: Required-ioctls
result: pass
second-/dev/video0-open:
set: Allow-for-multiple-opens
result: pass
VIDIOC_G/S_PRIORITY:
set: Allow-for-multiple-opens
result: pass
for-unlimited-opens:
set: Allow-for-multiple-opens
result: pass
VIDIOC_DBG_G/S_REGISTER:
set: Debug-ioctls
result: pass
VIDIOC_LOG_STATUS:
set: Debug-ioctls
result: pass
VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS:
set: Input-ioctls
result: pass
VIDIOC_G/S_FREQUENCY:
set: Input-ioctls
result: pass
VIDIOC_S_HW_FREQ_SEEK:
set: Input-ioctls
result: pass
VIDIOC_ENUMAUDIO:
set: Input-ioctls
result: pass
VIDIOC_G/S/ENUMINPUT:
set: Input-ioctls
result: pass
VIDIOC_G/S_AUDIO:
set: Input-ioctls
result: pass
VIDIOC_G/S_MODULATOR:
set: Input-ioctls
result: pass
VIDIOC_ENUMAUDOUT:
set: Input-ioctls
result: pass
VIDIOC_G/S/ENUMOUTPUT:
set: Input-ioctls
result: pass
VIDIOC_G/S_AUDOUT:
set: Input-ioctls
result: pass
VIDIOC_ENUM/G/S/QUERY_STD:
set: Input-ioctls
result: pass
VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS:
set: Input-ioctls
result: pass
VIDIOC_DV_TIMINGS_CAP:
set: Input-ioctls
result: pass
VIDIOC_G/S_EDID:
set: Input-ioctls
result: pass
VIDIOC_QUERY_EXT_CTRL/QUERYMENU:
set: Control-ioctls-Input-0
result: pass
VIDIOC_QUERYCTRL:
set: Control-ioctls-Input-0
result: pass
VIDIOC_G/S_CTRL:
set: Control-ioctls-Input-0
result: pass
VIDIOC_G/S/TRY_EXT_CTRLS:
set: Control-ioctls-Input-0
result: pass
VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT:
set: Control-ioctls-Input-0
result: pass
VIDIOC_G/S_JPEGCOMP:
set: Control-ioctls-Input-0
result: pass
VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS:
set: Format-ioctls-Input-0
result: pass
VIDIOC_G/S_PARM:
set: Format-ioctls-Input-0
result: pass
VIDIOC_G_FBUF:
set: Format-ioctls-Input-0
result: pass
VIDIOC_G_FMT:
set: Format-ioctls-Input-0
result: pass
VIDIOC_TRY_FMT:
set: Format-ioctls-Input-0
result: pass
VIDIOC_S_FMT:
set: Format-ioctls-Input-0
result: pass
VIDIOC_G_SLICED_VBI_CAP:
set: Format-ioctls-Input-0
result: pass
Cropping:
set: Format-ioctls-Input-0
result: pass
Composing:
set: Format-ioctls-Input-0
result: pass
Scaling:
set: Format-ioctls-Input-0
result: pass
VIDIOC_TRY_ENCODER_CMD:
set: Codec-ioctls-Input-0
result: pass
VIDIOC_G_ENC_INDEX:
set: Codec-ioctls-Input-0
result: pass
VIDIOC_TRY_DECODER_CMD:
set: Codec-ioctls-Input-0
result: pass
VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF:
set: Buffer-ioctls-Input-0
result: pass
CREATE_BUFS-maximum-buffers:
set: Buffer-ioctls-Input-0
result: pass
VIDIOC_EXPBUF:
set: Buffer-ioctls-Input-0
result: pass
Requests:
set: Buffer-ioctls-Input-0
result: pass
read/write:
set: Streaming-ioctls_Test-input-0
result: pass
blocking-wait:
set: Streaming-ioctls_Test-input-0
result: pass
MMAP-no-poll:
set: Streaming-ioctls_Test-input-0
result: fail
MMAP-select:
set: Streaming-ioctls_Test-input-0
result: fail
MMAP-epoll:
set: Streaming-ioctls_Test-input-0
result: fail
USERPTR-no-poll:
set: Streaming-ioctls_Test-input-0
result: pass
USERPTR-select:
set: Streaming-ioctls_Test-input-0
result: pass
7011 13:09:25.098158 end: 3.1 lava-test-shell (duration 00:00:11) [common]
7012 13:09:25.098247 end: 3 lava-test-retry (duration 00:00:11) [common]
7013 13:09:25.098334 start: 4 finalize (timeout 00:08:05) [common]
7014 13:09:25.098425 start: 4.1 power-off (timeout 00:00:30) [common]
7015 13:09:25.098569 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
7016 13:09:27.199128 >> Command sent successfully.
7017 13:09:27.214226 Returned 0 in 2 seconds
7018 13:09:27.214798 end: 4.1 power-off (duration 00:00:02) [common]
7020 13:09:27.215729 start: 4.2 read-feedback (timeout 00:08:03) [common]
7021 13:09:27.216317 Listened to connection for namespace 'common' for up to 1s
7022 13:09:28.217196 Finalising connection for namespace 'common'
7023 13:09:28.217765 Disconnecting from shell: Finalise
7024 13:09:28.218130 / #
7025 13:09:28.319111 end: 4.2 read-feedback (duration 00:00:01) [common]
7026 13:09:28.319723 end: 4 finalize (duration 00:00:03) [common]
7027 13:09:28.320264 Cleaning after the job
7028 13:09:28.320822 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14878986/tftp-deploy-j377ujnf/ramdisk
7029 13:09:28.327810 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14878986/tftp-deploy-j377ujnf/kernel
7030 13:09:28.340844 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14878986/tftp-deploy-j377ujnf/dtb
7031 13:09:28.341011 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14878986/tftp-deploy-j377ujnf/modules
7032 13:09:28.346504 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14878986
7033 13:09:28.413695 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14878986
7034 13:09:28.413867 Job finished correctly