Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 34
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 87
1 11:04:50.549988 lava-dispatcher, installed at version: 2024.05
2 11:04:50.550208 start: 0 validate
3 11:04:50.550332 Start time: 2024-07-10 11:04:50.550326+00:00 (UTC)
4 11:04:50.550467 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:04:50.550621 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 11:04:50.837323 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:04:50.838109 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 11:04:51.106090 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:04:51.106276 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 11:04:51.372780 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:04:51.373767 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
12 11:04:51.650423 validate duration: 1.10
14 11:04:51.651787 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:04:51.652416 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:04:51.652998 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:04:51.653727 Not decompressing ramdisk as can be used compressed.
18 11:04:51.654128 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 11:04:51.654491 saving as /var/lib/lava/dispatcher/tmp/14786834/tftp-deploy-fkces6to/ramdisk/rootfs.cpio.gz
20 11:04:51.654838 total size: 8181887 (7 MB)
21 11:04:51.661957 progress 0 % (0 MB)
22 11:04:51.664502 progress 5 % (0 MB)
23 11:04:51.666788 progress 10 % (0 MB)
24 11:04:51.669326 progress 15 % (1 MB)
25 11:04:51.671635 progress 20 % (1 MB)
26 11:04:51.674168 progress 25 % (1 MB)
27 11:04:51.676451 progress 30 % (2 MB)
28 11:04:51.678993 progress 35 % (2 MB)
29 11:04:51.681308 progress 40 % (3 MB)
30 11:04:51.683803 progress 45 % (3 MB)
31 11:04:51.686157 progress 50 % (3 MB)
32 11:04:51.688737 progress 55 % (4 MB)
33 11:04:51.691135 progress 60 % (4 MB)
34 11:04:51.693819 progress 65 % (5 MB)
35 11:04:51.696151 progress 70 % (5 MB)
36 11:04:51.698627 progress 75 % (5 MB)
37 11:04:51.700927 progress 80 % (6 MB)
38 11:04:51.703371 progress 85 % (6 MB)
39 11:04:51.705643 progress 90 % (7 MB)
40 11:04:51.708156 progress 95 % (7 MB)
41 11:04:51.710553 progress 100 % (7 MB)
42 11:04:51.710775 7 MB downloaded in 0.06 s (139.47 MB/s)
43 11:04:51.710950 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:04:51.711216 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:04:51.711307 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:04:51.711462 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:04:51.711653 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
49 11:04:51.711762 saving as /var/lib/lava/dispatcher/tmp/14786834/tftp-deploy-fkces6to/kernel/Image
50 11:04:51.711855 total size: 54813184 (52 MB)
51 11:04:51.711963 No compression specified
52 11:04:51.713213 progress 0 % (0 MB)
53 11:04:51.728643 progress 5 % (2 MB)
54 11:04:51.744150 progress 10 % (5 MB)
55 11:04:51.759756 progress 15 % (7 MB)
56 11:04:51.775404 progress 20 % (10 MB)
57 11:04:51.790871 progress 25 % (13 MB)
58 11:04:51.806197 progress 30 % (15 MB)
59 11:04:51.821958 progress 35 % (18 MB)
60 11:04:51.837611 progress 40 % (20 MB)
61 11:04:51.853357 progress 45 % (23 MB)
62 11:04:51.869531 progress 50 % (26 MB)
63 11:04:51.885457 progress 55 % (28 MB)
64 11:04:51.901094 progress 60 % (31 MB)
65 11:04:51.916869 progress 65 % (34 MB)
66 11:04:51.932264 progress 70 % (36 MB)
67 11:04:51.948025 progress 75 % (39 MB)
68 11:04:51.963855 progress 80 % (41 MB)
69 11:04:51.979593 progress 85 % (44 MB)
70 11:04:51.995591 progress 90 % (47 MB)
71 11:04:52.011528 progress 95 % (49 MB)
72 11:04:52.028343 progress 100 % (52 MB)
73 11:04:52.028643 52 MB downloaded in 0.32 s (165.01 MB/s)
74 11:04:52.028816 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:04:52.029207 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:04:52.029334 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:04:52.029449 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:04:52.029623 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 11:04:52.029721 saving as /var/lib/lava/dispatcher/tmp/14786834/tftp-deploy-fkces6to/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 11:04:52.029811 total size: 57695 (0 MB)
82 11:04:52.029910 No compression specified
83 11:04:52.031530 progress 56 % (0 MB)
84 11:04:52.031842 progress 100 % (0 MB)
85 11:04:52.032099 0 MB downloaded in 0.00 s (24.08 MB/s)
86 11:04:52.032278 end: 1.3.1 http-download (duration 00:00:00) [common]
88 11:04:52.032663 end: 1.3 download-retry (duration 00:00:00) [common]
89 11:04:52.032784 start: 1.4 download-retry (timeout 00:10:00) [common]
90 11:04:52.032893 start: 1.4.1 http-download (timeout 00:10:00) [common]
91 11:04:52.033056 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
92 11:04:52.033151 saving as /var/lib/lava/dispatcher/tmp/14786834/tftp-deploy-fkces6to/modules/modules.tar
93 11:04:52.033251 total size: 8607984 (8 MB)
94 11:04:52.033352 Using unxz to decompress xz
95 11:04:52.035306 progress 0 % (0 MB)
96 11:04:52.058191 progress 5 % (0 MB)
97 11:04:52.085324 progress 10 % (0 MB)
98 11:04:52.112277 progress 15 % (1 MB)
99 11:04:52.138831 progress 20 % (1 MB)
100 11:04:52.164580 progress 25 % (2 MB)
101 11:04:52.190354 progress 30 % (2 MB)
102 11:04:52.214854 progress 35 % (2 MB)
103 11:04:52.243520 progress 40 % (3 MB)
104 11:04:52.269891 progress 45 % (3 MB)
105 11:04:52.296129 progress 50 % (4 MB)
106 11:04:52.322933 progress 55 % (4 MB)
107 11:04:52.349039 progress 60 % (4 MB)
108 11:04:52.374442 progress 65 % (5 MB)
109 11:04:52.401841 progress 70 % (5 MB)
110 11:04:52.431316 progress 75 % (6 MB)
111 11:04:52.461401 progress 80 % (6 MB)
112 11:04:52.487139 progress 85 % (7 MB)
113 11:04:52.512416 progress 90 % (7 MB)
114 11:04:52.537930 progress 95 % (7 MB)
115 11:04:52.562625 progress 100 % (8 MB)
116 11:04:52.568411 8 MB downloaded in 0.54 s (15.34 MB/s)
117 11:04:52.568609 end: 1.4.1 http-download (duration 00:00:01) [common]
119 11:04:52.568876 end: 1.4 download-retry (duration 00:00:01) [common]
120 11:04:52.568983 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 11:04:52.569086 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 11:04:52.569181 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 11:04:52.569281 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 11:04:52.569509 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph
125 11:04:52.569682 makedir: /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin
126 11:04:52.569824 makedir: /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/tests
127 11:04:52.569940 makedir: /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/results
128 11:04:52.570047 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-add-keys
129 11:04:52.570204 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-add-sources
130 11:04:52.570351 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-background-process-start
131 11:04:52.570498 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-background-process-stop
132 11:04:52.570680 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-common-functions
133 11:04:52.570830 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-echo-ipv4
134 11:04:52.571003 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-install-packages
135 11:04:52.571169 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-installed-packages
136 11:04:52.571311 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-os-build
137 11:04:52.571456 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-probe-channel
138 11:04:52.571600 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-probe-ip
139 11:04:52.571741 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-target-ip
140 11:04:52.571885 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-target-mac
141 11:04:52.572050 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-target-storage
142 11:04:52.572197 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-test-case
143 11:04:52.572367 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-test-event
144 11:04:52.572544 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-test-feedback
145 11:04:52.572688 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-test-raise
146 11:04:52.572835 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-test-reference
147 11:04:52.572979 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-test-runner
148 11:04:52.573124 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-test-set
149 11:04:52.573290 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-test-shell
150 11:04:52.573439 Updating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-install-packages (oe)
151 11:04:52.573635 Updating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/bin/lava-installed-packages (oe)
152 11:04:52.573798 Creating /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/environment
153 11:04:52.573915 LAVA metadata
154 11:04:52.573995 - LAVA_JOB_ID=14786834
155 11:04:52.574073 - LAVA_DISPATCHER_IP=192.168.201.1
156 11:04:52.574199 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 11:04:52.574268 skipped lava-vland-overlay
158 11:04:52.574387 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 11:04:52.574514 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 11:04:52.574611 skipped lava-multinode-overlay
161 11:04:52.574730 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 11:04:52.574848 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 11:04:52.574958 Loading test definitions
164 11:04:52.575084 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 11:04:52.575188 Using /lava-14786834 at stage 0
166 11:04:52.575654 uuid=14786834_1.5.2.3.1 testdef=None
167 11:04:52.575780 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 11:04:52.575907 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 11:04:52.576643 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 11:04:52.576919 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 11:04:52.577585 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 11:04:52.577845 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 11:04:52.578492 runner path: /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/0/tests/0_dmesg test_uuid 14786834_1.5.2.3.1
176 11:04:52.578665 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 11:04:52.578897 Creating lava-test-runner.conf files
179 11:04:52.578996 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14786834/lava-overlay-h9orwnph/lava-14786834/0 for stage 0
180 11:04:52.579131 - 0_dmesg
181 11:04:52.579270 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 11:04:52.579394 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 11:04:52.588516 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 11:04:52.588634 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 11:04:52.588743 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 11:04:52.588847 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 11:04:52.588948 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 11:04:52.824269 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
189 11:04:52.824434 start: 1.5.4 extract-modules (timeout 00:09:59) [common]
190 11:04:52.824542 extracting modules file /var/lib/lava/dispatcher/tmp/14786834/tftp-deploy-fkces6to/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14786834/extract-overlay-ramdisk-4nn3io4n/ramdisk
191 11:04:53.065943 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 11:04:53.066092 start: 1.5.5 apply-overlay-tftp (timeout 00:09:59) [common]
193 11:04:53.066181 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14786834/compress-overlay-m2rx42sd/overlay-1.5.2.4.tar.gz to ramdisk
194 11:04:53.066248 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14786834/compress-overlay-m2rx42sd/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14786834/extract-overlay-ramdisk-4nn3io4n/ramdisk
195 11:04:53.074529 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 11:04:53.074648 start: 1.5.6 configure-preseed-file (timeout 00:09:59) [common]
197 11:04:53.074771 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 11:04:53.074887 start: 1.5.7 compress-ramdisk (timeout 00:09:59) [common]
199 11:04:53.074999 Building ramdisk /var/lib/lava/dispatcher/tmp/14786834/extract-overlay-ramdisk-4nn3io4n/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14786834/extract-overlay-ramdisk-4nn3io4n/ramdisk
200 11:04:53.412685 >> 144626 blocks
201 11:04:55.980696 rename /var/lib/lava/dispatcher/tmp/14786834/extract-overlay-ramdisk-4nn3io4n/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14786834/tftp-deploy-fkces6to/ramdisk/ramdisk.cpio.gz
202 11:04:55.980861 end: 1.5.7 compress-ramdisk (duration 00:00:03) [common]
203 11:04:55.980958 start: 1.5.8 prepare-kernel (timeout 00:09:56) [common]
204 11:04:55.981042 start: 1.5.8.1 prepare-fit (timeout 00:09:56) [common]
205 11:04:55.981127 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14786834/tftp-deploy-fkces6to/kernel/Image']
206 11:05:10.781500 Returned 0 in 14 seconds
207 11:05:10.781682 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14786834/tftp-deploy-fkces6to/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14786834/tftp-deploy-fkces6to/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14786834/tftp-deploy-fkces6to/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14786834/tftp-deploy-fkces6to/kernel/image.itb
208 11:05:11.207651 output: FIT description: Kernel Image image with one or more FDT blobs
209 11:05:11.207814 output: Created: Wed Jul 10 12:05:11 2024
210 11:05:11.207921 output: Image 0 (kernel-1)
211 11:05:11.208014 output: Description:
212 11:05:11.208103 output: Created: Wed Jul 10 12:05:11 2024
213 11:05:11.208189 output: Type: Kernel Image
214 11:05:11.208273 output: Compression: lzma compressed
215 11:05:11.208359 output: Data Size: 13116259 Bytes = 12808.85 KiB = 12.51 MiB
216 11:05:11.208448 output: Architecture: AArch64
217 11:05:11.208514 output: OS: Linux
218 11:05:11.208575 output: Load Address: 0x00000000
219 11:05:11.208628 output: Entry Point: 0x00000000
220 11:05:11.208682 output: Hash algo: crc32
221 11:05:11.208734 output: Hash value: 9bb85fb9
222 11:05:11.208794 output: Image 1 (fdt-1)
223 11:05:11.208848 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 11:05:11.208902 output: Created: Wed Jul 10 12:05:11 2024
225 11:05:11.208954 output: Type: Flat Device Tree
226 11:05:11.209006 output: Compression: uncompressed
227 11:05:11.209065 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 11:05:11.209119 output: Architecture: AArch64
229 11:05:11.209171 output: Hash algo: crc32
230 11:05:11.209223 output: Hash value: a9713552
231 11:05:11.209279 output: Image 2 (ramdisk-1)
232 11:05:11.209333 output: Description: unavailable
233 11:05:11.209385 output: Created: Wed Jul 10 12:05:11 2024
234 11:05:11.209438 output: Type: RAMDisk Image
235 11:05:11.209490 output: Compression: uncompressed
236 11:05:11.209560 output: Data Size: 21346891 Bytes = 20846.57 KiB = 20.36 MiB
237 11:05:11.209643 output: Architecture: AArch64
238 11:05:11.209725 output: OS: Linux
239 11:05:11.209811 output: Load Address: unavailable
240 11:05:11.209894 output: Entry Point: unavailable
241 11:05:11.209976 output: Hash algo: crc32
242 11:05:11.210061 output: Hash value: 3351e447
243 11:05:11.210143 output: Default Configuration: 'conf-1'
244 11:05:11.210226 output: Configuration 0 (conf-1)
245 11:05:11.210312 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 11:05:11.210394 output: Kernel: kernel-1
247 11:05:11.210477 output: Init Ramdisk: ramdisk-1
248 11:05:11.210564 output: FDT: fdt-1
249 11:05:11.210646 output: Loadables: kernel-1
250 11:05:11.210728 output:
251 11:05:11.210877 end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
252 11:05:11.210988 end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
253 11:05:11.211099 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
254 11:05:11.211218 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:40) [common]
255 11:05:11.211309 No LXC device requested
256 11:05:11.211419 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 11:05:11.211528 start: 1.7 deploy-device-env (timeout 00:09:40) [common]
258 11:05:11.211631 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 11:05:11.211699 Checking files for TFTP limit of 4294967296 bytes.
260 11:05:11.212102 end: 1 tftp-deploy (duration 00:00:20) [common]
261 11:05:11.212216 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 11:05:11.212331 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 11:05:11.212474 substitutions:
264 11:05:11.212542 - {DTB}: 14786834/tftp-deploy-fkces6to/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 11:05:11.212603 - {INITRD}: 14786834/tftp-deploy-fkces6to/ramdisk/ramdisk.cpio.gz
266 11:05:11.212667 - {KERNEL}: 14786834/tftp-deploy-fkces6to/kernel/Image
267 11:05:11.212723 - {LAVA_MAC}: None
268 11:05:11.212777 - {PRESEED_CONFIG}: None
269 11:05:11.212830 - {PRESEED_LOCAL}: None
270 11:05:11.212883 - {RAMDISK}: 14786834/tftp-deploy-fkces6to/ramdisk/ramdisk.cpio.gz
271 11:05:11.212953 - {ROOT_PART}: None
272 11:05:11.213008 - {ROOT}: None
273 11:05:11.213060 - {SERVER_IP}: 192.168.201.1
274 11:05:11.213112 - {TEE}: None
275 11:05:11.213180 Parsed boot commands:
276 11:05:11.213236 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 11:05:11.213384 Parsed boot commands: tftpboot 192.168.201.1 14786834/tftp-deploy-fkces6to/kernel/image.itb 14786834/tftp-deploy-fkces6to/kernel/cmdline
278 11:05:11.213477 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 11:05:11.213558 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 11:05:11.213637 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 11:05:11.213719 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 11:05:11.213779 Not connected, no need to disconnect.
283 11:05:11.213851 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 11:05:11.213935 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 11:05:11.214024 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
286 11:05:11.217056 Setting prompt string to ['lava-test: # ']
287 11:05:11.217417 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 11:05:11.217548 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 11:05:11.217683 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 11:05:11.217804 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 11:05:11.218140 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=reboot']
292 11:05:20.387886 >> Command sent successfully.
293 11:05:20.391599 Returned 0 in 9 seconds
294 11:05:20.391783 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
296 11:05:20.392115 end: 2.2.2 reset-device (duration 00:00:09) [common]
297 11:05:20.392240 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
298 11:05:20.392346 Setting prompt string to 'Starting depthcharge on Juniper...'
299 11:05:20.392438 Changing prompt to 'Starting depthcharge on Juniper...'
300 11:05:20.392522 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
301 11:05:20.392897 [Enter `^Ec?' for help]
302 11:05:27.175151 [DL] 00000000 00000000 010701
303 11:05:27.179473
304 11:05:27.179877
305 11:05:27.180188 F0: 102B 0000
306 11:05:27.180550
307 11:05:27.180840 F3: 1006 0033 [0200]
308 11:05:27.183003
309 11:05:27.183383 F3: 4001 00E0 [0200]
310 11:05:27.183684
311 11:05:27.183962 F3: 0000 0000
312 11:05:27.184227
313 11:05:27.186511 V0: 0000 0000 [0001]
314 11:05:27.186893
315 11:05:27.187188 00: 1027 0002
316 11:05:27.187473
317 11:05:27.189521 01: 0000 0000
318 11:05:27.189914
319 11:05:27.190214 BP: 0C00 0251 [0000]
320 11:05:27.190493
321 11:05:27.193476 G0: 1182 0000
322 11:05:27.193858
323 11:05:27.194157 EC: 0004 0000 [0001]
324 11:05:27.194434
325 11:05:27.196931 S7: 0000 0000 [0000]
326 11:05:27.197315
327 11:05:27.197624 CC: 0000 0000 [0001]
328 11:05:27.199701
329 11:05:27.200081 T0: 0000 00DB [000F]
330 11:05:27.200382
331 11:05:27.200718 Jump to BL
332 11:05:27.200990
333 11:05:27.235956
334 11:05:27.236501
335 11:05:27.242484 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
336 11:05:27.245625 ARM64: Exception handlers installed.
337 11:05:27.249292 ARM64: Testing exception
338 11:05:27.252678 ARM64: Done test exception
339 11:05:27.256729 WDT: Last reset was cold boot
340 11:05:27.257243 SPI0(PAD0) initialized at 992727 Hz
341 11:05:27.263338 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
342 11:05:27.263779 Manufacturer: ef
343 11:05:27.269841 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
344 11:05:27.282430 Probing TPM: . done!
345 11:05:27.282814 TPM ready after 0 ms
346 11:05:27.289449 Connected to device vid:did:rid of 1ae0:0028:00
347 11:05:27.295776 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
348 11:05:27.331103 Initialized TPM device CR50 revision 0
349 11:05:27.343775 tlcl_send_startup: Startup return code is 0
350 11:05:27.344304 TPM: setup succeeded
351 11:05:27.352559 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
352 11:05:27.356198 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
353 11:05:27.359371 in-header: 03 19 00 00 08 00 00 00
354 11:05:27.363236 in-data: a2 e0 47 00 13 00 00 00
355 11:05:27.366047 Chrome EC: UHEPI supported
356 11:05:27.372545 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
357 11:05:27.375770 in-header: 03 a1 00 00 08 00 00 00
358 11:05:27.379210 in-data: 84 60 60 10 00 00 00 00
359 11:05:27.379661 Phase 1
360 11:05:27.382654 FMAP: area GBB found @ 3f5000 (12032 bytes)
361 11:05:27.388922 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
362 11:05:27.396135 VB2:vb2_check_recovery() Recovery was requested manually
363 11:05:27.399095 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
364 11:05:27.404980 Recovery requested (1009000e)
365 11:05:27.414255 tlcl_extend: response is 0
366 11:05:27.419546 tlcl_extend: response is 0
367 11:05:27.444516
368 11:05:27.445027
369 11:05:27.451303 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
370 11:05:27.454754 ARM64: Exception handlers installed.
371 11:05:27.457977 ARM64: Testing exception
372 11:05:27.461311 ARM64: Done test exception
373 11:05:27.476439 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2017
374 11:05:27.483123 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
375 11:05:27.486656 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
376 11:05:27.495299 [RTC]rtc_get_frequency_meter,134: input=0xf, output=916
377 11:05:27.502149 [RTC]rtc_get_frequency_meter,134: input=0x7, output=781
378 11:05:27.508562 [RTC]rtc_get_frequency_meter,134: input=0xb, output=849
379 11:05:27.515945 [RTC]rtc_get_frequency_meter,134: input=0x9, output=814
380 11:05:27.522916 [RTC]rtc_get_frequency_meter,134: input=0x8, output=796
381 11:05:27.525965 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
382 11:05:27.532915 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
383 11:05:27.535796 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
384 11:05:27.539246 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
385 11:05:27.542932 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
386 11:05:27.546159 in-header: 03 19 00 00 08 00 00 00
387 11:05:27.549540 in-data: a2 e0 47 00 13 00 00 00
388 11:05:27.552749 Chrome EC: UHEPI supported
389 11:05:27.559191 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
390 11:05:27.562518 in-header: 03 a1 00 00 08 00 00 00
391 11:05:27.566387 in-data: 84 60 60 10 00 00 00 00
392 11:05:27.569587 Skip loading cached calibration data
393 11:05:27.576096 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
394 11:05:27.579295 in-header: 03 a1 00 00 08 00 00 00
395 11:05:27.582473 in-data: 84 60 60 10 00 00 00 00
396 11:05:27.589186 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
397 11:05:27.592631 in-header: 03 a1 00 00 08 00 00 00
398 11:05:27.596444 in-data: 84 60 60 10 00 00 00 00
399 11:05:27.599965 ADC[3]: Raw value=216571 ID=1
400 11:05:27.600445 Manufacturer: ef
401 11:05:27.606060 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
402 11:05:27.609513 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
403 11:05:27.612894 CBFS @ 21000 size 3d4000
404 11:05:27.616022 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
405 11:05:27.623033 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
406 11:05:27.626489 CBFS: Found @ offset 3c700 size 44
407 11:05:27.627000 DRAM-K: Full Calibration
408 11:05:27.633227 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
409 11:05:27.633709 CBFS @ 21000 size 3d4000
410 11:05:27.639554 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
411 11:05:27.642720 CBFS: Locating 'fallback/dram'
412 11:05:27.645688 CBFS: Found @ offset 24b00 size 12268
413 11:05:27.673748 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
414 11:05:27.677563 ddr_geometry: 1, config: 0x0
415 11:05:27.680934 header.status = 0x0
416 11:05:27.683729 header.magic = 0x44524d4b (expected: 0x44524d4b)
417 11:05:27.687275 header.version = 0x5 (expected: 0x5)
418 11:05:27.690508 header.size = 0x8f0 (expected: 0x8f0)
419 11:05:27.691025 header.config = 0x0
420 11:05:27.693537 header.flags = 0x0
421 11:05:27.696865 header.checksum = 0x0
422 11:05:27.703806 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
423 11:05:27.706807 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
424 11:05:27.710669 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
425 11:05:27.713889 ddr_geometry:1
426 11:05:27.717464 [EMI] new MDL number = 1
427 11:05:27.717978 dram_cbt_mode_extern: 0
428 11:05:27.720647 dram_cbt_mode [RK0]: 0, [RK1]: 0
429 11:05:27.727389 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
430 11:05:27.727879
431 11:05:27.728211
432 11:05:27.730542 [Bianco] ETT version 0.0.0.1
433 11:05:27.733991 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
434 11:05:27.734498
435 11:05:27.737362 vSetVcoreByFreq with vcore:762500, freq=1600
436 11:05:27.737869
437 11:05:27.740693 [DramcInit]
438 11:05:27.741191 AutoRefreshCKEOff AutoREF OFF
439 11:05:27.743983 DDRPhyPLLSetting-CKEOFF
440 11:05:27.747375 DDRPhyPLLSetting-CKEON
441 11:05:27.747897
442 11:05:27.748229 Enable WDQS
443 11:05:27.751044 [ModeRegInit_LP4] CH0 RK0
444 11:05:27.754411 Write Rank0 MR13 =0x18
445 11:05:27.754836 Write Rank0 MR12 =0x5d
446 11:05:27.757728 Write Rank0 MR1 =0x56
447 11:05:27.761000 Write Rank0 MR2 =0x1a
448 11:05:27.761460 Write Rank0 MR11 =0x0
449 11:05:27.764490 Write Rank0 MR22 =0x38
450 11:05:27.765056 Write Rank0 MR14 =0x5d
451 11:05:27.767842 Write Rank0 MR3 =0x30
452 11:05:27.770746 Write Rank0 MR13 =0x58
453 11:05:27.771241 Write Rank0 MR12 =0x5d
454 11:05:27.774605 Write Rank0 MR1 =0x56
455 11:05:27.775117 Write Rank0 MR2 =0x2d
456 11:05:27.777960 Write Rank0 MR11 =0x23
457 11:05:27.781087 Write Rank0 MR22 =0x34
458 11:05:27.781625 Write Rank0 MR14 =0x10
459 11:05:27.784392 Write Rank0 MR3 =0x30
460 11:05:27.787464 Write Rank0 MR13 =0xd8
461 11:05:27.787892 [ModeRegInit_LP4] CH0 RK1
462 11:05:27.791059 Write Rank1 MR13 =0x18
463 11:05:27.791491 Write Rank1 MR12 =0x5d
464 11:05:27.794728 Write Rank1 MR1 =0x56
465 11:05:27.798073 Write Rank1 MR2 =0x1a
466 11:05:27.798629 Write Rank1 MR11 =0x0
467 11:05:27.801094 Write Rank1 MR22 =0x38
468 11:05:27.804222 Write Rank1 MR14 =0x5d
469 11:05:27.804636 Write Rank1 MR3 =0x30
470 11:05:27.807227 Write Rank1 MR13 =0x58
471 11:05:27.807611 Write Rank1 MR12 =0x5d
472 11:05:27.811563 Write Rank1 MR1 =0x56
473 11:05:27.814533 Write Rank1 MR2 =0x2d
474 11:05:27.815026 Write Rank1 MR11 =0x23
475 11:05:27.817821 Write Rank1 MR22 =0x34
476 11:05:27.818329 Write Rank1 MR14 =0x10
477 11:05:27.821021 Write Rank1 MR3 =0x30
478 11:05:27.824068 Write Rank1 MR13 =0xd8
479 11:05:27.824705 [ModeRegInit_LP4] CH1 RK0
480 11:05:27.827368 Write Rank0 MR13 =0x18
481 11:05:27.830767 Write Rank0 MR12 =0x5d
482 11:05:27.831305 Write Rank0 MR1 =0x56
483 11:05:27.834535 Write Rank0 MR2 =0x1a
484 11:05:27.835071 Write Rank0 MR11 =0x0
485 11:05:27.837980 Write Rank0 MR22 =0x38
486 11:05:27.841225 Write Rank0 MR14 =0x5d
487 11:05:27.841784 Write Rank0 MR3 =0x30
488 11:05:27.844328 Write Rank0 MR13 =0x58
489 11:05:27.844783 Write Rank0 MR12 =0x5d
490 11:05:27.847673 Write Rank0 MR1 =0x56
491 11:05:27.851409 Write Rank0 MR2 =0x2d
492 11:05:27.851894 Write Rank0 MR11 =0x23
493 11:05:27.854192 Write Rank0 MR22 =0x34
494 11:05:27.854704 Write Rank0 MR14 =0x10
495 11:05:27.858066 Write Rank0 MR3 =0x30
496 11:05:27.861249 Write Rank0 MR13 =0xd8
497 11:05:27.861635 [ModeRegInit_LP4] CH1 RK1
498 11:05:27.864618 Write Rank1 MR13 =0x18
499 11:05:27.868040 Write Rank1 MR12 =0x5d
500 11:05:27.868422 Write Rank1 MR1 =0x56
501 11:05:27.871175 Write Rank1 MR2 =0x1a
502 11:05:27.871783 Write Rank1 MR11 =0x0
503 11:05:27.874290 Write Rank1 MR22 =0x38
504 11:05:27.878117 Write Rank1 MR14 =0x5d
505 11:05:27.878543 Write Rank1 MR3 =0x30
506 11:05:27.881321 Write Rank1 MR13 =0x58
507 11:05:27.881720 Write Rank1 MR12 =0x5d
508 11:05:27.884566 Write Rank1 MR1 =0x56
509 11:05:27.888206 Write Rank1 MR2 =0x2d
510 11:05:27.888788 Write Rank1 MR11 =0x23
511 11:05:27.891307 Write Rank1 MR22 =0x34
512 11:05:27.891787 Write Rank1 MR14 =0x10
513 11:05:27.894492 Write Rank1 MR3 =0x30
514 11:05:27.897900 Write Rank1 MR13 =0xd8
515 11:05:27.898367 match AC timing 3
516 11:05:27.907885 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
517 11:05:27.908289 [MiockJmeterHQA]
518 11:05:27.914603 vSetVcoreByFreq with vcore:762500, freq=1600
519 11:05:28.018821
520 11:05:28.018989 MIOCK jitter meter ch=0
521 11:05:28.019115
522 11:05:28.022139 1T = (102-17) = 85 dly cells
523 11:05:28.028634 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
524 11:05:28.032043 vSetVcoreByFreq with vcore:725000, freq=1200
525 11:05:28.132605
526 11:05:28.133040 MIOCK jitter meter ch=0
527 11:05:28.133337
528 11:05:28.135763 1T = (97-16) = 81 dly cells
529 11:05:28.142453 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps
530 11:05:28.146093 vSetVcoreByFreq with vcore:725000, freq=800
531 11:05:28.245700
532 11:05:28.246187 MIOCK jitter meter ch=0
533 11:05:28.246516
534 11:05:28.249370 1T = (97-16) = 81 dly cells
535 11:05:28.255620 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps
536 11:05:28.259230 vSetVcoreByFreq with vcore:762500, freq=1600
537 11:05:28.262588 vSetVcoreByFreq with vcore:762500, freq=1600
538 11:05:28.262972
539 11:05:28.263268 K DRVP
540 11:05:28.265631 1. OCD DRVP=0 CALOUT=0
541 11:05:28.269286 1. OCD DRVP=1 CALOUT=0
542 11:05:28.269670 1. OCD DRVP=2 CALOUT=0
543 11:05:28.272367 1. OCD DRVP=3 CALOUT=0
544 11:05:28.272880 1. OCD DRVP=4 CALOUT=0
545 11:05:28.276382 1. OCD DRVP=5 CALOUT=0
546 11:05:28.279146 1. OCD DRVP=6 CALOUT=0
547 11:05:28.279558 1. OCD DRVP=7 CALOUT=0
548 11:05:28.282396 1. OCD DRVP=8 CALOUT=0
549 11:05:28.285734 1. OCD DRVP=9 CALOUT=1
550 11:05:28.286120
551 11:05:28.286415 1. OCD DRVP calibration OK! DRVP=9
552 11:05:28.289164
553 11:05:28.289543
554 11:05:28.289839
555 11:05:28.290111 K ODTN
556 11:05:28.293308 3. OCD ODTN=0 ,CALOUT=1
557 11:05:28.293767 3. OCD ODTN=1 ,CALOUT=1
558 11:05:28.295824 3. OCD ODTN=2 ,CALOUT=1
559 11:05:28.296285 3. OCD ODTN=3 ,CALOUT=1
560 11:05:28.299245 3. OCD ODTN=4 ,CALOUT=1
561 11:05:28.302582 3. OCD ODTN=5 ,CALOUT=1
562 11:05:28.303047 3. OCD ODTN=6 ,CALOUT=1
563 11:05:28.306143 3. OCD ODTN=7 ,CALOUT=0
564 11:05:28.306606
565 11:05:28.309324 3. OCD ODTN calibration OK! ODTN=7
566 11:05:28.309891
567 11:05:28.312590 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
568 11:05:28.315833 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
569 11:05:28.322664 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
570 11:05:28.323133
571 11:05:28.323428 K DRVP
572 11:05:28.325868 1. OCD DRVP=0 CALOUT=0
573 11:05:28.326339 1. OCD DRVP=1 CALOUT=0
574 11:05:28.329175 1. OCD DRVP=2 CALOUT=0
575 11:05:28.332379 1. OCD DRVP=3 CALOUT=0
576 11:05:28.332801 1. OCD DRVP=4 CALOUT=0
577 11:05:28.336298 1. OCD DRVP=5 CALOUT=0
578 11:05:28.339396 1. OCD DRVP=6 CALOUT=0
579 11:05:28.339826 1. OCD DRVP=7 CALOUT=0
580 11:05:28.342646 1. OCD DRVP=8 CALOUT=0
581 11:05:28.343031 1. OCD DRVP=9 CALOUT=0
582 11:05:28.346191 1. OCD DRVP=10 CALOUT=0
583 11:05:28.349029 1. OCD DRVP=11 CALOUT=1
584 11:05:28.349418
585 11:05:28.352435 1. OCD DRVP calibration OK! DRVP=11
586 11:05:28.352873
587 11:05:28.353165
588 11:05:28.353431
589 11:05:28.353690 K ODTN
590 11:05:28.356605 3. OCD ODTN=0 ,CALOUT=1
591 11:05:28.357070 3. OCD ODTN=1 ,CALOUT=1
592 11:05:28.359248 3. OCD ODTN=2 ,CALOUT=1
593 11:05:28.362871 3. OCD ODTN=3 ,CALOUT=1
594 11:05:28.363337 3. OCD ODTN=4 ,CALOUT=1
595 11:05:28.366044 3. OCD ODTN=5 ,CALOUT=1
596 11:05:28.369685 3. OCD ODTN=6 ,CALOUT=1
597 11:05:28.370152 3. OCD ODTN=7 ,CALOUT=1
598 11:05:28.372802 3. OCD ODTN=8 ,CALOUT=1
599 11:05:28.373189 3. OCD ODTN=9 ,CALOUT=1
600 11:05:28.376358 3. OCD ODTN=10 ,CALOUT=1
601 11:05:28.379241 3. OCD ODTN=11 ,CALOUT=1
602 11:05:28.379630 3. OCD ODTN=12 ,CALOUT=1
603 11:05:28.382749 3. OCD ODTN=13 ,CALOUT=1
604 11:05:28.386465 3. OCD ODTN=14 ,CALOUT=1
605 11:05:28.386935 3. OCD ODTN=15 ,CALOUT=0
606 11:05:28.389629
607 11:05:28.390023 3. OCD ODTN calibration OK! ODTN=15
608 11:05:28.390326
609 11:05:28.396310 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
610 11:05:28.400291 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
611 11:05:28.403495 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
612 11:05:28.403881
613 11:05:28.406546 [DramcInit]
614 11:05:28.409448 AutoRefreshCKEOff AutoREF OFF
615 11:05:28.409838 DDRPhyPLLSetting-CKEOFF
616 11:05:28.412833 DDRPhyPLLSetting-CKEON
617 11:05:28.413218
618 11:05:28.413514 Enable WDQS
619 11:05:28.413790 ==
620 11:05:28.420082 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
621 11:05:28.423122 fsp= 1, odt_onoff= 1, Byte mode= 0
622 11:05:28.423514 ==
623 11:05:28.425857 [Duty_Offset_Calibration]
624 11:05:28.425959
625 11:05:28.426038 ===========================
626 11:05:28.428912 B0:1 B1:1 CA:1
627 11:05:28.447876 ==
628 11:05:28.451468 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
629 11:05:28.454824 fsp= 1, odt_onoff= 1, Byte mode= 0
630 11:05:28.454909 ==
631 11:05:28.458307 [Duty_Offset_Calibration]
632 11:05:28.458451
633 11:05:28.461456 ===========================
634 11:05:28.461545 B0:1 B1:0 CA:2
635 11:05:28.495588 [ModeRegInit_LP4] CH0 RK0
636 11:05:28.498235 Write Rank0 MR13 =0x18
637 11:05:28.498662 Write Rank0 MR12 =0x5d
638 11:05:28.501800 Write Rank0 MR1 =0x56
639 11:05:28.505038 Write Rank0 MR2 =0x1a
640 11:05:28.505543 Write Rank0 MR11 =0x0
641 11:05:28.508162 Write Rank0 MR22 =0x38
642 11:05:28.508633 Write Rank0 MR14 =0x5d
643 11:05:28.511463 Write Rank0 MR3 =0x30
644 11:05:28.515247 Write Rank0 MR13 =0x58
645 11:05:28.515748 Write Rank0 MR12 =0x5d
646 11:05:28.518551 Write Rank0 MR1 =0x56
647 11:05:28.519054 Write Rank0 MR2 =0x2d
648 11:05:28.521635 Write Rank0 MR11 =0x23
649 11:05:28.525350 Write Rank0 MR22 =0x34
650 11:05:28.525851 Write Rank0 MR14 =0x10
651 11:05:28.528872 Write Rank0 MR3 =0x30
652 11:05:28.531889 Write Rank0 MR13 =0xd8
653 11:05:28.532309 [ModeRegInit_LP4] CH0 RK1
654 11:05:28.534860 Write Rank1 MR13 =0x18
655 11:05:28.535280 Write Rank1 MR12 =0x5d
656 11:05:28.538321 Write Rank1 MR1 =0x56
657 11:05:28.541728 Write Rank1 MR2 =0x1a
658 11:05:28.542152 Write Rank1 MR11 =0x0
659 11:05:28.545345 Write Rank1 MR22 =0x38
660 11:05:28.548747 Write Rank1 MR14 =0x5d
661 11:05:28.549244 Write Rank1 MR3 =0x30
662 11:05:28.551990 Write Rank1 MR13 =0x58
663 11:05:28.552521 Write Rank1 MR12 =0x5d
664 11:05:28.555263 Write Rank1 MR1 =0x56
665 11:05:28.558512 Write Rank1 MR2 =0x2d
666 11:05:28.558949 Write Rank1 MR11 =0x23
667 11:05:28.561877 Write Rank1 MR22 =0x34
668 11:05:28.562373 Write Rank1 MR14 =0x10
669 11:05:28.565201 Write Rank1 MR3 =0x30
670 11:05:28.568570 Write Rank1 MR13 =0xd8
671 11:05:28.569171 [ModeRegInit_LP4] CH1 RK0
672 11:05:28.571544 Write Rank0 MR13 =0x18
673 11:05:28.575179 Write Rank0 MR12 =0x5d
674 11:05:28.575555 Write Rank0 MR1 =0x56
675 11:05:28.578513 Write Rank0 MR2 =0x1a
676 11:05:28.578904 Write Rank0 MR11 =0x0
677 11:05:28.581587 Write Rank0 MR22 =0x38
678 11:05:28.585393 Write Rank0 MR14 =0x5d
679 11:05:28.585892 Write Rank0 MR3 =0x30
680 11:05:28.588403 Write Rank0 MR13 =0x58
681 11:05:28.588838 Write Rank0 MR12 =0x5d
682 11:05:28.592433 Write Rank0 MR1 =0x56
683 11:05:28.595691 Write Rank0 MR2 =0x2d
684 11:05:28.596209 Write Rank0 MR11 =0x23
685 11:05:28.598873 Write Rank0 MR22 =0x34
686 11:05:28.599370 Write Rank0 MR14 =0x10
687 11:05:28.602136 Write Rank0 MR3 =0x30
688 11:05:28.605483 Write Rank0 MR13 =0xd8
689 11:05:28.605977 [ModeRegInit_LP4] CH1 RK1
690 11:05:28.609023 Write Rank1 MR13 =0x18
691 11:05:28.611931 Write Rank1 MR12 =0x5d
692 11:05:28.612353 Write Rank1 MR1 =0x56
693 11:05:28.615462 Write Rank1 MR2 =0x1a
694 11:05:28.615962 Write Rank1 MR11 =0x0
695 11:05:28.618378 Write Rank1 MR22 =0x38
696 11:05:28.622225 Write Rank1 MR14 =0x5d
697 11:05:28.622722 Write Rank1 MR3 =0x30
698 11:05:28.625594 Write Rank1 MR13 =0x58
699 11:05:28.626087 Write Rank1 MR12 =0x5d
700 11:05:28.628562 Write Rank1 MR1 =0x56
701 11:05:28.632502 Write Rank1 MR2 =0x2d
702 11:05:28.633006 Write Rank1 MR11 =0x23
703 11:05:28.635830 Write Rank1 MR22 =0x34
704 11:05:28.636327 Write Rank1 MR14 =0x10
705 11:05:28.638780 Write Rank1 MR3 =0x30
706 11:05:28.642035 Write Rank1 MR13 =0xd8
707 11:05:28.642454 match AC timing 3
708 11:05:28.652184 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
709 11:05:28.652694 DramC Write-DBI off
710 11:05:28.655276 DramC Read-DBI off
711 11:05:28.658875 Write Rank0 MR13 =0x59
712 11:05:28.659333 ==
713 11:05:28.662612 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
714 11:05:28.665547 fsp= 1, odt_onoff= 1, Byte mode= 0
715 11:05:28.666008 ==
716 11:05:28.668815 === u2Vref_new: 0x56 --> 0x2d
717 11:05:28.672352 === u2Vref_new: 0x58 --> 0x38
718 11:05:28.676262 === u2Vref_new: 0x5a --> 0x39
719 11:05:28.679030 === u2Vref_new: 0x5c --> 0x3c
720 11:05:28.682333 === u2Vref_new: 0x5e --> 0x3d
721 11:05:28.685877 === u2Vref_new: 0x60 --> 0xa0
722 11:05:28.689021 [CA 0] Center 34 (6~63) winsize 58
723 11:05:28.692354 [CA 1] Center 36 (9~63) winsize 55
724 11:05:28.695723 [CA 2] Center 29 (0~59) winsize 60
725 11:05:28.696189 [CA 3] Center 25 (-2~52) winsize 55
726 11:05:28.698873 [CA 4] Center 25 (-2~53) winsize 56
727 11:05:28.702407 [CA 5] Center 30 (0~60) winsize 61
728 11:05:28.702791
729 11:05:28.705651 [CATrainingPosCal] consider 1 rank data
730 11:05:28.709475 u2DelayCellTimex100 = 735/100 ps
731 11:05:28.712484 CA0 delay=34 (6~63),Diff = 9 PI (11 cell)
732 11:05:28.719226 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
733 11:05:28.722828 CA2 delay=29 (0~59),Diff = 4 PI (5 cell)
734 11:05:28.726096 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
735 11:05:28.729088 CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)
736 11:05:28.732711 CA5 delay=30 (0~60),Diff = 5 PI (6 cell)
737 11:05:28.733175
738 11:05:28.736010 CA PerBit enable=1, Macro0, CA PI delay=25
739 11:05:28.739137 === u2Vref_new: 0x60 --> 0xa0
740 11:05:28.739599
741 11:05:28.743068 Vref(ca) range 1: 32
742 11:05:28.743524
743 11:05:28.743826 CS Dly= 9 (40-0-32)
744 11:05:28.746277 Write Rank0 MR13 =0xd8
745 11:05:28.746755 Write Rank0 MR13 =0xd8
746 11:05:28.749658 Write Rank0 MR12 =0x60
747 11:05:28.752720 Write Rank1 MR13 =0x59
748 11:05:28.753182 ==
749 11:05:28.755848 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
750 11:05:28.759507 fsp= 1, odt_onoff= 1, Byte mode= 0
751 11:05:28.760004 ==
752 11:05:28.762640 === u2Vref_new: 0x56 --> 0x2d
753 11:05:28.766055 === u2Vref_new: 0x58 --> 0x38
754 11:05:28.769473 === u2Vref_new: 0x5a --> 0x39
755 11:05:28.772349 === u2Vref_new: 0x5c --> 0x3c
756 11:05:28.776172 === u2Vref_new: 0x5e --> 0x3d
757 11:05:28.779246 === u2Vref_new: 0x60 --> 0xa0
758 11:05:28.782840 [CA 0] Center 36 (9~63) winsize 55
759 11:05:28.786621 [CA 1] Center 36 (9~63) winsize 55
760 11:05:28.789565 [CA 2] Center 31 (2~60) winsize 59
761 11:05:28.792923 [CA 3] Center 25 (-3~54) winsize 58
762 11:05:28.793421 [CA 4] Center 26 (-2~54) winsize 57
763 11:05:28.795807 [CA 5] Center 31 (2~61) winsize 60
764 11:05:28.796233
765 11:05:28.803302 [CATrainingPosCal] consider 2 rank data
766 11:05:28.803804 u2DelayCellTimex100 = 735/100 ps
767 11:05:28.809296 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
768 11:05:28.812555 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
769 11:05:28.816081 CA2 delay=30 (2~59),Diff = 5 PI (6 cell)
770 11:05:28.819669 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
771 11:05:28.822580 CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)
772 11:05:28.825904 CA5 delay=31 (2~60),Diff = 6 PI (7 cell)
773 11:05:28.826300
774 11:05:28.828988 CA PerBit enable=1, Macro0, CA PI delay=25
775 11:05:28.832604 === u2Vref_new: 0x5c --> 0x3c
776 11:05:28.832983
777 11:05:28.835981 Vref(ca) range 1: 28
778 11:05:28.836432
779 11:05:28.836779 CS Dly= 7 (38-0-32)
780 11:05:28.839384 Write Rank1 MR13 =0xd8
781 11:05:28.842828 Write Rank1 MR13 =0xd8
782 11:05:28.843240 Write Rank1 MR12 =0x5c
783 11:05:28.846136 [RankSwap] Rank num 2, (Multi 1), Rank 0
784 11:05:28.849365 Write Rank0 MR2 =0xad
785 11:05:28.849756 [Write Leveling]
786 11:05:28.852733 delay byte0 byte1 byte2 byte3
787 11:05:28.853110
788 11:05:28.856556 10 0 0
789 11:05:28.856943 11 0 0
790 11:05:28.857247 12 0 0
791 11:05:28.859660 13 0 0
792 11:05:28.860045 14 0 0
793 11:05:28.862968 15 0 0
794 11:05:28.863353 16 0 0
795 11:05:28.866172 17 0 0
796 11:05:28.866558 18 0 0
797 11:05:28.866859 19 0 0
798 11:05:28.869686 20 0 0
799 11:05:28.870070 21 0 0
800 11:05:28.872747 22 0 0
801 11:05:28.873169 23 0 0
802 11:05:28.873486 24 0 ff
803 11:05:28.875874 25 0 ff
804 11:05:28.876257 26 0 ff
805 11:05:28.879412 27 0 ff
806 11:05:28.879798 28 0 ff
807 11:05:28.883224 29 0 ff
808 11:05:28.883692 30 0 ff
809 11:05:28.886400 31 0 ff
810 11:05:28.886786 32 ff ff
811 11:05:28.887088 33 ff ff
812 11:05:28.889703 34 ff ff
813 11:05:28.890089 35 ff ff
814 11:05:28.892780 36 ff ff
815 11:05:28.893163 37 ff ff
816 11:05:28.896089 38 ff ff
817 11:05:28.899495 pass bytecount = 0xff (0xff: all bytes pass)
818 11:05:28.899968
819 11:05:28.900274 DQS0 dly: 32
820 11:05:28.903181 DQS1 dly: 24
821 11:05:28.903568 Write Rank0 MR2 =0x2d
822 11:05:28.906124 [RankSwap] Rank num 2, (Multi 1), Rank 0
823 11:05:28.909435 Write Rank0 MR1 =0xd6
824 11:05:28.909816 [Gating]
825 11:05:28.910116 ==
826 11:05:28.916233 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
827 11:05:28.919421 fsp= 1, odt_onoff= 1, Byte mode= 0
828 11:05:28.919947 ==
829 11:05:28.922666 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
830 11:05:28.926421 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
831 11:05:28.933106 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
832 11:05:28.936492 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
833 11:05:28.939423 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
834 11:05:28.946291 3 1 20 |2c2c 3534 |(0 0)(11 11) |(1 0)(0 1)| 0
835 11:05:28.949706 3 1 24 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
836 11:05:28.952848 3 1 28 |504 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
837 11:05:28.959591 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
838 11:05:28.963063 3 2 4 |3534 707 |(11 11)(11 11) |(0 0)(1 1)| 0
839 11:05:28.966409 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
840 11:05:28.969886 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
841 11:05:28.976505 3 2 16 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
842 11:05:28.979740 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
843 11:05:28.982979 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
844 11:05:28.989483 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
845 11:05:28.993049 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
846 11:05:28.996809 3 3 4 |3534 403 |(11 11)(11 11) |(0 0)(1 1)| 0
847 11:05:29.003423 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
848 11:05:29.006607 [Byte 1] Lead/lag falling Transition (3, 3, 8)
849 11:05:29.010520 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
850 11:05:29.013284 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
851 11:05:29.020225 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
852 11:05:29.023405 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
853 11:05:29.026950 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
854 11:05:29.033387 3 4 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
855 11:05:29.036589 3 4 4 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
856 11:05:29.040047 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
857 11:05:29.043500 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
858 11:05:29.049966 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 11:05:29.053511 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 11:05:29.056644 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 11:05:29.063644 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 11:05:29.066743 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 11:05:29.070222 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 11:05:29.076784 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 11:05:29.080072 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 11:05:29.083713 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 11:05:29.086734 [Byte 0] Lead/lag falling Transition (3, 5, 16)
868 11:05:29.093179 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
869 11:05:29.097127 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
870 11:05:29.100553 [Byte 0] Lead/lag Transition tap number (3)
871 11:05:29.103952 [Byte 1] Lead/lag falling Transition (3, 5, 24)
872 11:05:29.110255 3 5 28 |4646 3d3d |(0 0)(11 11) |(0 0)(1 0)| 0
873 11:05:29.113731 [Byte 0]First pass (3, 5, 28)
874 11:05:29.117161 [Byte 1] Lead/lag Transition tap number (2)
875 11:05:29.120836 3 6 0 |4646 2525 |(0 0)(11 11) |(0 0)(0 0)| 0
876 11:05:29.123766 3 6 4 |4646 808 |(0 0)(11 11) |(0 0)(0 0)| 0
877 11:05:29.126959 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
878 11:05:29.130620 [Byte 1]First pass (3, 6, 8)
879 11:05:29.133867 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 11:05:29.140362 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 11:05:29.144146 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 11:05:29.147005 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 11:05:29.150463 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 11:05:29.154102 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 11:05:29.160440 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 11:05:29.164061 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 11:05:29.166888 All bytes gating window > 1UI, Early break!
888 11:05:29.167309
889 11:05:29.170400 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 22)
890 11:05:29.170821
891 11:05:29.173662 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
892 11:05:29.174087
893 11:05:29.174412
894 11:05:29.174748
895 11:05:29.177119 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 22)
896 11:05:29.177500
897 11:05:29.184014 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
898 11:05:29.184394
899 11:05:29.184771
900 11:05:29.185045 Write Rank0 MR1 =0x56
901 11:05:29.185305
902 11:05:29.187051 best RODT dly(2T, 0.5T) = (2, 2)
903 11:05:29.187429
904 11:05:29.190465 best RODT dly(2T, 0.5T) = (2, 2)
905 11:05:29.190860 ==
906 11:05:29.197544 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
907 11:05:29.200764 fsp= 1, odt_onoff= 1, Byte mode= 0
908 11:05:29.201210 ==
909 11:05:29.204094 Start DQ dly to find pass range UseTestEngine =0
910 11:05:29.207441 x-axis: bit #, y-axis: DQ dly (-127~63)
911 11:05:29.210571 RX Vref Scan = 0
912 11:05:29.211088 -26, [0] xxxxxxxx xxxxxxxx [MSB]
913 11:05:29.214044 -25, [0] xxxxxxxx xxxxxxxx [MSB]
914 11:05:29.217350 -24, [0] xxxxxxxx xxxxxxxx [MSB]
915 11:05:29.220810 -23, [0] xxxxxxxx xxxxxxxx [MSB]
916 11:05:29.223902 -22, [0] xxxxxxxx xxxxxxxx [MSB]
917 11:05:29.227433 -21, [0] xxxxxxxx xxxxxxxx [MSB]
918 11:05:29.230631 -20, [0] xxxxxxxx xxxxxxxx [MSB]
919 11:05:29.234567 -19, [0] xxxxxxxx xxxxxxxx [MSB]
920 11:05:29.234953 -18, [0] xxxxxxxx xxxxxxxx [MSB]
921 11:05:29.237639 -17, [0] xxxxxxxx xxxxxxxx [MSB]
922 11:05:29.240911 -16, [0] xxxxxxxx xxxxxxxx [MSB]
923 11:05:29.243945 -15, [0] xxxxxxxx xxxxxxxx [MSB]
924 11:05:29.247865 -14, [0] xxxxxxxx xxxxxxxx [MSB]
925 11:05:29.250878 -13, [0] xxxxxxxx xxxxxxxx [MSB]
926 11:05:29.254134 -12, [0] xxxxxxxx xxxxxxxx [MSB]
927 11:05:29.257884 -11, [0] xxxxxxxx xxxxxxxx [MSB]
928 11:05:29.258271 -10, [0] xxxxxxxx xxxxxxxx [MSB]
929 11:05:29.261010 -9, [0] xxxxxxxx xxxxxxxx [MSB]
930 11:05:29.264483 -8, [0] xxxxxxxx xxxxxxxx [MSB]
931 11:05:29.267688 -7, [0] xxxxxxxx xxxxxxxx [MSB]
932 11:05:29.270930 -6, [0] xxxxxxxx xxxxxxxx [MSB]
933 11:05:29.274237 -5, [0] xxxxxxxx xxxxxxxx [MSB]
934 11:05:29.277457 -4, [0] xxxxxxxx xxxxxxxx [MSB]
935 11:05:29.277893 -3, [0] xxxxxxxx xxxxxxxx [MSB]
936 11:05:29.281159 -2, [0] xxxoxxxx oxxxxxxx [MSB]
937 11:05:29.284520 -1, [0] xxxoxxxx ooxoxxxx [MSB]
938 11:05:29.287402 0, [0] xxxoxoxx ooxoxxxx [MSB]
939 11:05:29.291105 1, [0] xxxoxoox ooxoooxx [MSB]
940 11:05:29.294370 2, [0] xxxoxoox ooxoooxx [MSB]
941 11:05:29.294755 3, [0] xoxoxooo ooxoooox [MSB]
942 11:05:29.297612 4, [0] xooooooo ooxooooo [MSB]
943 11:05:29.301259 5, [0] xooooooo ooxooooo [MSB]
944 11:05:29.304080 6, [0] oooooooo ooxooooo [MSB]
945 11:05:29.307507 7, [0] oooooooo ooxooooo [MSB]
946 11:05:29.311247 32, [0] oooxoooo oooooooo [MSB]
947 11:05:29.311636 33, [0] oooxoooo xooooooo [MSB]
948 11:05:29.314665 34, [0] oooxoooo xooooooo [MSB]
949 11:05:29.317543 35, [0] oooxoooo xooooooo [MSB]
950 11:05:29.320959 36, [0] oooxoxoo xooxoooo [MSB]
951 11:05:29.324185 37, [0] oooxoxxx xxoxoooo [MSB]
952 11:05:29.327849 38, [0] oooxoxxx xxoxxoxo [MSB]
953 11:05:29.330924 39, [0] oooxoxxx xxoxxxxo [MSB]
954 11:05:29.331308 40, [0] oooxxxxx xxoxxxxo [MSB]
955 11:05:29.334246 41, [0] xxoxxxxx xxoxxxxo [MSB]
956 11:05:29.337566 42, [0] xxxxxxxx xxoxxxxx [MSB]
957 11:05:29.340914 43, [0] xxxxxxxx xxoxxxxx [MSB]
958 11:05:29.344756 44, [0] xxxxxxxx xxxxxxxx [MSB]
959 11:05:29.348141 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
960 11:05:29.351350 iDelay=44, Bit 1, Center 21 (3 ~ 40) 38
961 11:05:29.354808 iDelay=44, Bit 2, Center 22 (4 ~ 41) 38
962 11:05:29.357808 iDelay=44, Bit 3, Center 14 (-2 ~ 31) 34
963 11:05:29.361432 iDelay=44, Bit 4, Center 21 (4 ~ 39) 36
964 11:05:29.364581 iDelay=44, Bit 5, Center 17 (0 ~ 35) 36
965 11:05:29.367675 iDelay=44, Bit 6, Center 18 (1 ~ 36) 36
966 11:05:29.370929 iDelay=44, Bit 7, Center 19 (3 ~ 36) 34
967 11:05:29.374552 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
968 11:05:29.377788 iDelay=44, Bit 9, Center 17 (-1 ~ 36) 38
969 11:05:29.384980 iDelay=44, Bit 10, Center 25 (8 ~ 43) 36
970 11:05:29.388205 iDelay=44, Bit 11, Center 17 (-1 ~ 35) 37
971 11:05:29.391426 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
972 11:05:29.394855 iDelay=44, Bit 13, Center 19 (1 ~ 38) 38
973 11:05:29.398267 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
974 11:05:29.401638 iDelay=44, Bit 15, Center 22 (4 ~ 41) 38
975 11:05:29.402017 ==
976 11:05:29.408224 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
977 11:05:29.408647 fsp= 1, odt_onoff= 1, Byte mode= 0
978 11:05:29.411689 ==
979 11:05:29.412064 DQS Delay:
980 11:05:29.412354 DQS0 = 0, DQS1 = 0
981 11:05:29.414876 DQM Delay:
982 11:05:29.415252 DQM0 = 19, DQM1 = 19
983 11:05:29.418099 DQ Delay:
984 11:05:29.418487 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =14
985 11:05:29.421456 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =19
986 11:05:29.424639 DQ8 =15, DQ9 =17, DQ10 =25, DQ11 =17
987 11:05:29.427831 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =22
988 11:05:29.428206
989 11:05:29.432029
990 11:05:29.432526 DramC Write-DBI off
991 11:05:29.432837 ==
992 11:05:29.438287 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
993 11:05:29.441349 fsp= 1, odt_onoff= 1, Byte mode= 0
994 11:05:29.441726 ==
995 11:05:29.444640 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
996 11:05:29.445063
997 11:05:29.447875 Begin, DQ Scan Range 920~1176
998 11:05:29.448314
999 11:05:29.448713
1000 11:05:29.448989 TX Vref Scan disable
1001 11:05:29.454675 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1002 11:05:29.458028 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1003 11:05:29.461068 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1004 11:05:29.464546 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1005 11:05:29.467940 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1006 11:05:29.471327 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1007 11:05:29.474858 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1008 11:05:29.478168 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1009 11:05:29.481249 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1010 11:05:29.484894 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1011 11:05:29.488192 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1012 11:05:29.491427 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1013 11:05:29.494930 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1014 11:05:29.497886 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1015 11:05:29.501721 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1016 11:05:29.504978 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1017 11:05:29.508179 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1018 11:05:29.514835 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1019 11:05:29.518736 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1020 11:05:29.521548 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1021 11:05:29.524791 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1022 11:05:29.528546 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1023 11:05:29.532106 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1024 11:05:29.535048 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1025 11:05:29.538576 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1026 11:05:29.542123 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1027 11:05:29.545303 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1028 11:05:29.548194 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1029 11:05:29.551602 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1030 11:05:29.555257 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1031 11:05:29.558573 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1032 11:05:29.561735 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1033 11:05:29.565077 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1034 11:05:29.568218 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1035 11:05:29.574820 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1036 11:05:29.578422 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1037 11:05:29.581607 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1038 11:05:29.585051 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1039 11:05:29.588426 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1040 11:05:29.591988 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1041 11:05:29.595141 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1042 11:05:29.598546 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1043 11:05:29.601937 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1044 11:05:29.605461 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1045 11:05:29.609022 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1046 11:05:29.612371 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1047 11:05:29.615677 966 |3 6 6|[0] xxxxxxxx oxxxxxxx [MSB]
1048 11:05:29.618718 967 |3 6 7|[0] xxxxxxxx ooxoxxxx [MSB]
1049 11:05:29.622472 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1050 11:05:29.625914 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1051 11:05:29.629411 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1052 11:05:29.632428 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1053 11:05:29.635728 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1054 11:05:29.639308 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1055 11:05:29.642454 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1056 11:05:29.645932 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1057 11:05:29.648888 976 |3 6 16|[0] xoxooooo oooooooo [MSB]
1058 11:05:29.656584 985 |3 6 25|[0] oooooooo xooooooo [MSB]
1059 11:05:29.660040 986 |3 6 26|[0] oooooooo xooooooo [MSB]
1060 11:05:29.663274 987 |3 6 27|[0] oooooooo xooxoooo [MSB]
1061 11:05:29.666741 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1062 11:05:29.669959 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1063 11:05:29.672914 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1064 11:05:29.676976 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1065 11:05:29.680244 992 |3 6 32|[0] oooxoooo xxxxxxxx [MSB]
1066 11:05:29.683384 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1067 11:05:29.686835 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1068 11:05:29.689835 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1069 11:05:29.693181 996 |3 6 36|[0] oooxxxxx xxxxxxxx [MSB]
1070 11:05:29.697060 997 |3 6 37|[0] oxxxxxxx xxxxxxxx [MSB]
1071 11:05:29.700339 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1072 11:05:29.703473 Byte0, DQ PI dly=985, DQM PI dly= 985
1073 11:05:29.710064 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1074 11:05:29.710463
1075 11:05:29.713292 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1076 11:05:29.713686
1077 11:05:29.716592 Byte1, DQ PI dly=977, DQM PI dly= 977
1078 11:05:29.719919 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1079 11:05:29.720297
1080 11:05:29.727176 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1081 11:05:29.727742
1082 11:05:29.728046 ==
1083 11:05:29.729899 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1084 11:05:29.733531 fsp= 1, odt_onoff= 1, Byte mode= 0
1085 11:05:29.733914 ==
1086 11:05:29.740597 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1087 11:05:29.741058
1088 11:05:29.741468 Begin, DQ Scan Range 953~1017
1089 11:05:29.743501 Write Rank0 MR14 =0x0
1090 11:05:29.751811
1091 11:05:29.752277 CH=0, VrefRange= 0, VrefLevel = 0
1092 11:05:29.758234 TX Bit0 (979~992) 14 985, Bit8 (967~978) 12 972,
1093 11:05:29.761449 TX Bit1 (977~992) 16 984, Bit9 (969~983) 15 976,
1094 11:05:29.768016 TX Bit2 (979~992) 14 985, Bit10 (975~987) 13 981,
1095 11:05:29.771154 TX Bit3 (974~985) 12 979, Bit11 (968~982) 15 975,
1096 11:05:29.774394 TX Bit4 (978~991) 14 984, Bit12 (970~983) 14 976,
1097 11:05:29.781771 TX Bit5 (976~989) 14 982, Bit13 (970~984) 15 977,
1098 11:05:29.785137 TX Bit6 (977~990) 14 983, Bit14 (969~984) 16 976,
1099 11:05:29.788232 TX Bit7 (978~991) 14 984, Bit15 (975~986) 12 980,
1100 11:05:29.788868
1101 11:05:29.791079 Write Rank0 MR14 =0x2
1102 11:05:29.799870
1103 11:05:29.800362 CH=0, VrefRange= 0, VrefLevel = 2
1104 11:05:29.806205 TX Bit0 (978~993) 16 985, Bit8 (967~979) 13 973,
1105 11:05:29.809422 TX Bit1 (977~992) 16 984, Bit9 (969~984) 16 976,
1106 11:05:29.816577 TX Bit2 (978~993) 16 985, Bit10 (975~987) 13 981,
1107 11:05:29.819942 TX Bit3 (974~986) 13 980, Bit11 (968~982) 15 975,
1108 11:05:29.823022 TX Bit4 (977~992) 16 984, Bit12 (970~984) 15 977,
1109 11:05:29.829405 TX Bit5 (976~991) 16 983, Bit13 (969~984) 16 976,
1110 11:05:29.833066 TX Bit6 (976~991) 16 983, Bit14 (969~985) 17 977,
1111 11:05:29.836563 TX Bit7 (977~992) 16 984, Bit15 (974~986) 13 980,
1112 11:05:29.837037
1113 11:05:29.839578 Write Rank0 MR14 =0x4
1114 11:05:29.847756
1115 11:05:29.848348 CH=0, VrefRange= 0, VrefLevel = 4
1116 11:05:29.854391 TX Bit0 (978~993) 16 985, Bit8 (967~979) 13 973,
1117 11:05:29.857828 TX Bit1 (977~993) 17 985, Bit9 (969~984) 16 976,
1118 11:05:29.864513 TX Bit2 (977~993) 17 985, Bit10 (975~989) 15 982,
1119 11:05:29.867786 TX Bit3 (973~987) 15 980, Bit11 (968~983) 16 975,
1120 11:05:29.871203 TX Bit4 (977~992) 16 984, Bit12 (970~984) 15 977,
1121 11:05:29.878339 TX Bit5 (976~991) 16 983, Bit13 (969~984) 16 976,
1122 11:05:29.881206 TX Bit6 (976~991) 16 983, Bit14 (969~985) 17 977,
1123 11:05:29.884992 TX Bit7 (977~992) 16 984, Bit15 (973~988) 16 980,
1124 11:05:29.885372
1125 11:05:29.888248 Write Rank0 MR14 =0x6
1126 11:05:29.896206
1127 11:05:29.896896 CH=0, VrefRange= 0, VrefLevel = 6
1128 11:05:29.903066 TX Bit0 (978~994) 17 986, Bit8 (967~982) 16 974,
1129 11:05:29.906113 TX Bit1 (977~993) 17 985, Bit9 (968~984) 17 976,
1130 11:05:29.910238 TX Bit2 (978~994) 17 986, Bit10 (974~990) 17 982,
1131 11:05:29.916686 TX Bit3 (974~988) 15 981, Bit11 (968~983) 16 975,
1132 11:05:29.919897 TX Bit4 (977~992) 16 984, Bit12 (969~985) 17 977,
1133 11:05:29.926982 TX Bit5 (975~992) 18 983, Bit13 (969~985) 17 977,
1134 11:05:29.929972 TX Bit6 (976~992) 17 984, Bit14 (969~986) 18 977,
1135 11:05:29.932983 TX Bit7 (977~992) 16 984, Bit15 (974~989) 16 981,
1136 11:05:29.933366
1137 11:05:29.936326 Write Rank0 MR14 =0x8
1138 11:05:29.944813
1139 11:05:29.945188 CH=0, VrefRange= 0, VrefLevel = 8
1140 11:05:29.998860 TX Bit0 (978~995) 18 986, Bit8 (967~982) 16 974,
1141 11:05:29.999329 TX Bit1 (976~994) 19 985, Bit9 (968~985) 18 976,
1142 11:05:29.999762 TX Bit2 (977~995) 19 986, Bit10 (974~990) 17 982,
1143 11:05:30.000353 TX Bit3 (972~989) 18 980, Bit11 (967~984) 18 975,
1144 11:05:30.001283 TX Bit4 (977~993) 17 985, Bit12 (969~985) 17 977,
1145 11:05:30.001854 TX Bit5 (975~992) 18 983, Bit13 (969~985) 17 977,
1146 11:05:30.002441 TX Bit6 (976~992) 17 984, Bit14 (968~986) 19 977,
1147 11:05:30.002873 TX Bit7 (977~993) 17 985, Bit15 (973~989) 17 981,
1148 11:05:30.003156
1149 11:05:30.003419 Write Rank0 MR14 =0xa
1150 11:05:30.003784
1151 11:05:30.004049 CH=0, VrefRange= 0, VrefLevel = 10
1152 11:05:30.004522 TX Bit0 (977~995) 19 986, Bit8 (967~983) 17 975,
1153 11:05:30.033695 TX Bit1 (976~994) 19 985, Bit9 (968~985) 18 976,
1154 11:05:30.034527 TX Bit2 (977~995) 19 986, Bit10 (974~990) 17 982,
1155 11:05:30.034866 TX Bit3 (972~990) 19 981, Bit11 (967~984) 18 975,
1156 11:05:30.035229 TX Bit4 (976~993) 18 984, Bit12 (969~986) 18 977,
1157 11:05:30.035521 TX Bit5 (975~992) 18 983, Bit13 (968~986) 19 977,
1158 11:05:30.035832 TX Bit6 (976~992) 17 984, Bit14 (968~987) 20 977,
1159 11:05:30.038286 TX Bit7 (977~993) 17 985, Bit15 (973~990) 18 981,
1160 11:05:30.038755
1161 11:05:30.039054 Write Rank0 MR14 =0xc
1162 11:05:30.042266
1163 11:05:30.042644 CH=0, VrefRange= 0, VrefLevel = 12
1164 11:05:30.049019 TX Bit0 (977~996) 20 986, Bit8 (966~983) 18 974,
1165 11:05:30.052142 TX Bit1 (976~995) 20 985, Bit9 (968~986) 19 977,
1166 11:05:30.059122 TX Bit2 (977~996) 20 986, Bit10 (973~991) 19 982,
1167 11:05:30.063020 TX Bit3 (972~991) 20 981, Bit11 (967~985) 19 976,
1168 11:05:30.066237 TX Bit4 (976~994) 19 985, Bit12 (969~986) 18 977,
1169 11:05:30.072417 TX Bit5 (974~993) 20 983, Bit13 (968~986) 19 977,
1170 11:05:30.075711 TX Bit6 (975~993) 19 984, Bit14 (968~988) 21 978,
1171 11:05:30.079240 TX Bit7 (977~994) 18 985, Bit15 (972~990) 19 981,
1172 11:05:30.079736
1173 11:05:30.082158 Write Rank0 MR14 =0xe
1174 11:05:30.091428
1175 11:05:30.094589 CH=0, VrefRange= 0, VrefLevel = 14
1176 11:05:30.098140 TX Bit0 (977~997) 21 987, Bit8 (966~984) 19 975,
1177 11:05:30.101421 TX Bit1 (976~996) 21 986, Bit9 (967~987) 21 977,
1178 11:05:30.107926 TX Bit2 (976~997) 22 986, Bit10 (972~991) 20 981,
1179 11:05:30.111424 TX Bit3 (971~991) 21 981, Bit11 (967~985) 19 976,
1180 11:05:30.114662 TX Bit4 (976~994) 19 985, Bit12 (968~987) 20 977,
1181 11:05:30.121630 TX Bit5 (974~993) 20 983, Bit13 (968~987) 20 977,
1182 11:05:30.124544 TX Bit6 (975~993) 19 984, Bit14 (968~989) 22 978,
1183 11:05:30.127932 TX Bit7 (977~994) 18 985, Bit15 (972~991) 20 981,
1184 11:05:30.128321
1185 11:05:30.131094 Write Rank0 MR14 =0x10
1186 11:05:30.139947
1187 11:05:30.143763 CH=0, VrefRange= 0, VrefLevel = 16
1188 11:05:30.147134 TX Bit0 (977~998) 22 987, Bit8 (966~984) 19 975,
1189 11:05:30.150326 TX Bit1 (976~996) 21 986, Bit9 (968~987) 20 977,
1190 11:05:30.157198 TX Bit2 (976~997) 22 986, Bit10 (972~992) 21 982,
1191 11:05:30.160570 TX Bit3 (971~991) 21 981, Bit11 (966~986) 21 976,
1192 11:05:30.163472 TX Bit4 (976~995) 20 985, Bit12 (968~987) 20 977,
1193 11:05:30.170311 TX Bit5 (974~993) 20 983, Bit13 (968~988) 21 978,
1194 11:05:30.173541 TX Bit6 (975~994) 20 984, Bit14 (968~990) 23 979,
1195 11:05:30.177096 TX Bit7 (976~995) 20 985, Bit15 (972~991) 20 981,
1196 11:05:30.177485
1197 11:05:30.180334 Write Rank0 MR14 =0x12
1198 11:05:30.189269
1199 11:05:30.192834 CH=0, VrefRange= 0, VrefLevel = 18
1200 11:05:30.196509 TX Bit0 (977~998) 22 987, Bit8 (965~985) 21 975,
1201 11:05:30.199396 TX Bit1 (976~997) 22 986, Bit9 (967~987) 21 977,
1202 11:05:30.206399 TX Bit2 (976~998) 23 987, Bit10 (971~992) 22 981,
1203 11:05:30.209688 TX Bit3 (970~992) 23 981, Bit11 (966~986) 21 976,
1204 11:05:30.212929 TX Bit4 (976~996) 21 986, Bit12 (968~989) 22 978,
1205 11:05:30.219229 TX Bit5 (973~994) 22 983, Bit13 (968~988) 21 978,
1206 11:05:30.222689 TX Bit6 (975~994) 20 984, Bit14 (967~990) 24 978,
1207 11:05:30.225811 TX Bit7 (976~996) 21 986, Bit15 (971~991) 21 981,
1208 11:05:30.226307
1209 11:05:30.229315 Write Rank0 MR14 =0x14
1210 11:05:30.238740
1211 11:05:30.241667 CH=0, VrefRange= 0, VrefLevel = 20
1212 11:05:30.245297 TX Bit0 (977~998) 22 987, Bit8 (965~985) 21 975,
1213 11:05:30.248838 TX Bit1 (976~998) 23 987, Bit9 (967~988) 22 977,
1214 11:05:30.255093 TX Bit2 (976~998) 23 987, Bit10 (971~992) 22 981,
1215 11:05:30.258552 TX Bit3 (970~992) 23 981, Bit11 (966~987) 22 976,
1216 11:05:30.261727 TX Bit4 (975~997) 23 986, Bit12 (968~989) 22 978,
1217 11:05:30.268581 TX Bit5 (973~994) 22 983, Bit13 (967~989) 23 978,
1218 11:05:30.271917 TX Bit6 (975~995) 21 985, Bit14 (967~990) 24 978,
1219 11:05:30.275000 TX Bit7 (976~996) 21 986, Bit15 (970~992) 23 981,
1220 11:05:30.275386
1221 11:05:30.278758 Write Rank0 MR14 =0x16
1222 11:05:30.287657
1223 11:05:30.291138 CH=0, VrefRange= 0, VrefLevel = 22
1224 11:05:30.294550 TX Bit0 (976~999) 24 987, Bit8 (965~986) 22 975,
1225 11:05:30.297946 TX Bit1 (976~998) 23 987, Bit9 (967~990) 24 978,
1226 11:05:30.304761 TX Bit2 (976~999) 24 987, Bit10 (970~993) 24 981,
1227 11:05:30.307773 TX Bit3 (970~992) 23 981, Bit11 (966~987) 22 976,
1228 11:05:30.311242 TX Bit4 (975~997) 23 986, Bit12 (968~990) 23 979,
1229 11:05:30.318063 TX Bit5 (972~995) 24 983, Bit13 (967~990) 24 978,
1230 11:05:30.321527 TX Bit6 (974~995) 22 984, Bit14 (967~991) 25 979,
1231 11:05:30.325043 TX Bit7 (976~997) 22 986, Bit15 (970~992) 23 981,
1232 11:05:30.325519
1233 11:05:30.327981 Write Rank0 MR14 =0x18
1234 11:05:30.337480
1235 11:05:30.337940 CH=0, VrefRange= 0, VrefLevel = 24
1236 11:05:30.344367 TX Bit0 (976~999) 24 987, Bit8 (964~986) 23 975,
1237 11:05:30.347605 TX Bit1 (975~998) 24 986, Bit9 (967~990) 24 978,
1238 11:05:30.354046 TX Bit2 (976~999) 24 987, Bit10 (970~993) 24 981,
1239 11:05:30.357893 TX Bit3 (969~992) 24 980, Bit11 (966~988) 23 977,
1240 11:05:30.361172 TX Bit4 (975~998) 24 986, Bit12 (968~990) 23 979,
1241 11:05:30.368000 TX Bit5 (972~995) 24 983, Bit13 (967~990) 24 978,
1242 11:05:30.370915 TX Bit6 (974~996) 23 985, Bit14 (967~991) 25 979,
1243 11:05:30.374199 TX Bit7 (976~997) 22 986, Bit15 (970~993) 24 981,
1244 11:05:30.374701
1245 11:05:30.377460 Write Rank0 MR14 =0x1a
1246 11:05:30.386724
1247 11:05:30.390051 CH=0, VrefRange= 0, VrefLevel = 26
1248 11:05:30.393112 TX Bit0 (976~999) 24 987, Bit8 (964~986) 23 975,
1249 11:05:30.396928 TX Bit1 (976~999) 24 987, Bit9 (967~990) 24 978,
1250 11:05:30.403357 TX Bit2 (976~999) 24 987, Bit10 (970~993) 24 981,
1251 11:05:30.406514 TX Bit3 (969~993) 25 981, Bit11 (965~989) 25 977,
1252 11:05:30.410335 TX Bit4 (975~998) 24 986, Bit12 (967~990) 24 978,
1253 11:05:30.417062 TX Bit5 (972~996) 25 984, Bit13 (967~990) 24 978,
1254 11:05:30.420082 TX Bit6 (973~997) 25 985, Bit14 (967~991) 25 979,
1255 11:05:30.423699 TX Bit7 (976~998) 23 987, Bit15 (970~993) 24 981,
1256 11:05:30.424083
1257 11:05:30.427055 Write Rank0 MR14 =0x1c
1258 11:05:30.436121
1259 11:05:30.436640 CH=0, VrefRange= 0, VrefLevel = 28
1260 11:05:30.443117 TX Bit0 (976~1000) 25 988, Bit8 (964~988) 25 976,
1261 11:05:30.446652 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1262 11:05:30.453165 TX Bit2 (975~1000) 26 987, Bit10 (969~993) 25 981,
1263 11:05:30.456328 TX Bit3 (969~993) 25 981, Bit11 (965~989) 25 977,
1264 11:05:30.459859 TX Bit4 (974~998) 25 986, Bit12 (967~991) 25 979,
1265 11:05:30.466501 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1266 11:05:30.469998 TX Bit6 (973~997) 25 985, Bit14 (967~991) 25 979,
1267 11:05:30.473249 TX Bit7 (975~999) 25 987, Bit15 (969~993) 25 981,
1268 11:05:30.473724
1269 11:05:30.476377 Write Rank0 MR14 =0x1e
1270 11:05:30.485870
1271 11:05:30.489084 CH=0, VrefRange= 0, VrefLevel = 30
1272 11:05:30.492773 TX Bit0 (976~1000) 25 988, Bit8 (964~988) 25 976,
1273 11:05:30.495764 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1274 11:05:30.502857 TX Bit2 (975~1000) 26 987, Bit10 (969~993) 25 981,
1275 11:05:30.506071 TX Bit3 (969~993) 25 981, Bit11 (965~989) 25 977,
1276 11:05:30.509362 TX Bit4 (974~998) 25 986, Bit12 (967~991) 25 979,
1277 11:05:30.516019 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1278 11:05:30.519429 TX Bit6 (973~997) 25 985, Bit14 (967~991) 25 979,
1279 11:05:30.522836 TX Bit7 (975~999) 25 987, Bit15 (969~993) 25 981,
1280 11:05:30.525918
1281 11:05:30.526401 Write Rank0 MR14 =0x20
1282 11:05:30.535692
1283 11:05:30.539172 CH=0, VrefRange= 0, VrefLevel = 32
1284 11:05:30.542410 TX Bit0 (976~1000) 25 988, Bit8 (964~988) 25 976,
1285 11:05:30.546389 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1286 11:05:30.552148 TX Bit2 (975~1000) 26 987, Bit10 (969~993) 25 981,
1287 11:05:30.556184 TX Bit3 (969~993) 25 981, Bit11 (965~989) 25 977,
1288 11:05:30.559046 TX Bit4 (974~998) 25 986, Bit12 (967~991) 25 979,
1289 11:05:30.565988 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1290 11:05:30.569183 TX Bit6 (973~997) 25 985, Bit14 (967~991) 25 979,
1291 11:05:30.572400 TX Bit7 (975~999) 25 987, Bit15 (969~993) 25 981,
1292 11:05:30.572870
1293 11:05:30.575734 Write Rank0 MR14 =0x22
1294 11:05:30.585740
1295 11:05:30.588948 CH=0, VrefRange= 0, VrefLevel = 34
1296 11:05:30.592029 TX Bit0 (976~1000) 25 988, Bit8 (964~988) 25 976,
1297 11:05:30.595716 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1298 11:05:30.602343 TX Bit2 (975~1000) 26 987, Bit10 (969~993) 25 981,
1299 11:05:30.605117 TX Bit3 (969~993) 25 981, Bit11 (965~989) 25 977,
1300 11:05:30.609184 TX Bit4 (974~998) 25 986, Bit12 (967~991) 25 979,
1301 11:05:30.616352 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1302 11:05:30.619008 TX Bit6 (973~997) 25 985, Bit14 (967~991) 25 979,
1303 11:05:30.622516 TX Bit7 (975~999) 25 987, Bit15 (969~993) 25 981,
1304 11:05:30.623133
1305 11:05:30.625552 Write Rank0 MR14 =0x24
1306 11:05:30.634714
1307 11:05:30.638453 CH=0, VrefRange= 0, VrefLevel = 36
1308 11:05:30.641721 TX Bit0 (976~1000) 25 988, Bit8 (964~988) 25 976,
1309 11:05:30.645356 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1310 11:05:30.651506 TX Bit2 (975~1000) 26 987, Bit10 (969~993) 25 981,
1311 11:05:30.654958 TX Bit3 (969~993) 25 981, Bit11 (965~989) 25 977,
1312 11:05:30.658158 TX Bit4 (974~998) 25 986, Bit12 (967~991) 25 979,
1313 11:05:30.665231 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1314 11:05:30.668582 TX Bit6 (973~997) 25 985, Bit14 (967~991) 25 979,
1315 11:05:30.671466 TX Bit7 (975~999) 25 987, Bit15 (969~993) 25 981,
1316 11:05:30.675061
1317 11:05:30.675560
1318 11:05:30.678199 TX Vref found, early break! 369< 380
1319 11:05:30.681638 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1320 11:05:30.684955 u1DelayCellOfst[0]=9 cells (7 PI)
1321 11:05:30.688493 u1DelayCellOfst[1]=7 cells (6 PI)
1322 11:05:30.692041 u1DelayCellOfst[2]=7 cells (6 PI)
1323 11:05:30.694888 u1DelayCellOfst[3]=0 cells (0 PI)
1324 11:05:30.695317 u1DelayCellOfst[4]=6 cells (5 PI)
1325 11:05:30.698393 u1DelayCellOfst[5]=2 cells (2 PI)
1326 11:05:30.701577 u1DelayCellOfst[6]=5 cells (4 PI)
1327 11:05:30.704730 u1DelayCellOfst[7]=7 cells (6 PI)
1328 11:05:30.708318 Byte0, DQ PI dly=981, DQM PI dly= 984
1329 11:05:30.711892 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1330 11:05:30.715048
1331 11:05:30.718340 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1332 11:05:30.718772
1333 11:05:30.721550 u1DelayCellOfst[8]=0 cells (0 PI)
1334 11:05:30.724911 u1DelayCellOfst[9]=2 cells (2 PI)
1335 11:05:30.728595 u1DelayCellOfst[10]=6 cells (5 PI)
1336 11:05:30.728982 u1DelayCellOfst[11]=1 cells (1 PI)
1337 11:05:30.732115 u1DelayCellOfst[12]=3 cells (3 PI)
1338 11:05:30.735340 u1DelayCellOfst[13]=2 cells (2 PI)
1339 11:05:30.738596 u1DelayCellOfst[14]=3 cells (3 PI)
1340 11:05:30.741538 u1DelayCellOfst[15]=6 cells (5 PI)
1341 11:05:30.745022 Byte1, DQ PI dly=976, DQM PI dly= 978
1342 11:05:30.752007 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1343 11:05:30.752398
1344 11:05:30.755348 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1345 11:05:30.755818
1346 11:05:30.758509 Write Rank0 MR14 =0x1c
1347 11:05:30.758971
1348 11:05:30.759273 Final TX Range 0 Vref 28
1349 11:05:30.759575
1350 11:05:30.765000 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1351 11:05:30.765466
1352 11:05:30.771690 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1353 11:05:30.778525 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1354 11:05:30.785372 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1355 11:05:30.791922 wait MRW command Rank0 MR3 =0xb0 fired (1)
1356 11:05:30.792391 Write Rank0 MR3 =0xb0
1357 11:05:30.795426 DramC Write-DBI on
1358 11:05:30.795886 ==
1359 11:05:30.798521 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1360 11:05:30.801961 fsp= 1, odt_onoff= 1, Byte mode= 0
1361 11:05:30.802363 ==
1362 11:05:30.808551 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1363 11:05:30.809130
1364 11:05:30.809440 Begin, DQ Scan Range 698~762
1365 11:05:30.809720
1366 11:05:30.809990
1367 11:05:30.812169 TX Vref Scan disable
1368 11:05:30.815242 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1369 11:05:30.819087 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1370 11:05:30.822061 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1371 11:05:30.825511 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1372 11:05:30.829025 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1373 11:05:30.832249 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1374 11:05:30.835716 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1375 11:05:30.838619 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1376 11:05:30.841668 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1377 11:05:30.849005 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1378 11:05:30.852027 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1379 11:05:30.856051 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1380 11:05:30.859176 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1381 11:05:30.862124 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1382 11:05:30.865148 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1383 11:05:30.868434 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1384 11:05:30.872125 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1385 11:05:30.875839 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1386 11:05:30.879163 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1387 11:05:30.882507 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1388 11:05:30.885331 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1389 11:05:30.892944 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1390 11:05:30.896384 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1391 11:05:30.899477 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1392 11:05:30.903259 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1393 11:05:30.906704 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1394 11:05:30.909643 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1395 11:05:30.912821 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1396 11:05:30.916363 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1397 11:05:30.919744 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1398 11:05:30.923168 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1399 11:05:30.926094 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
1400 11:05:30.929751 Byte0, DQ PI dly=731, DQM PI dly= 731
1401 11:05:30.933247 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
1402 11:05:30.933634
1403 11:05:30.939898 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
1404 11:05:30.940362
1405 11:05:30.943038 Byte1, DQ PI dly=722, DQM PI dly= 722
1406 11:05:30.946715 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
1407 11:05:30.947204
1408 11:05:30.949552 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
1409 11:05:30.953032
1410 11:05:30.956445 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1411 11:05:30.966483 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1412 11:05:30.972877 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1413 11:05:30.973396 Write Rank0 MR3 =0x30
1414 11:05:30.976583 DramC Write-DBI off
1415 11:05:30.977171
1416 11:05:30.977602 [DATLAT]
1417 11:05:30.979824 Freq=1600, CH0 RK0, use_rxtx_scan=0
1418 11:05:30.980280
1419 11:05:30.983083 DATLAT Default: 0xf
1420 11:05:30.983506 7, 0xFFFF, sum=0
1421 11:05:30.986876 8, 0xFFFF, sum=0
1422 11:05:30.987266 9, 0xFFFF, sum=0
1423 11:05:30.989891 10, 0xFFFF, sum=0
1424 11:05:30.990284 11, 0xFFFF, sum=0
1425 11:05:30.993164 12, 0xFFFF, sum=0
1426 11:05:30.993641 13, 0xFFFF, sum=0
1427 11:05:30.993949 14, 0x0, sum=1
1428 11:05:30.996659 15, 0x0, sum=2
1429 11:05:30.997136 16, 0x0, sum=3
1430 11:05:30.999878 17, 0x0, sum=4
1431 11:05:31.003114 pattern=2 first_step=14 total pass=5 best_step=16
1432 11:05:31.003580 ==
1433 11:05:31.009380 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1434 11:05:31.012850 fsp= 1, odt_onoff= 1, Byte mode= 0
1435 11:05:31.013242 ==
1436 11:05:31.015879 Start DQ dly to find pass range UseTestEngine =1
1437 11:05:31.019263 x-axis: bit #, y-axis: DQ dly (-127~63)
1438 11:05:31.019650 RX Vref Scan = 1
1439 11:05:31.135929
1440 11:05:31.136445 RX Vref found, early break!
1441 11:05:31.136816
1442 11:05:31.142386 Final RX Vref 12, apply to both rank0 and 1
1443 11:05:31.142773 ==
1444 11:05:31.145591 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1445 11:05:31.149538 fsp= 1, odt_onoff= 1, Byte mode= 0
1446 11:05:31.149928 ==
1447 11:05:31.150227 DQS Delay:
1448 11:05:31.152544 DQS0 = 0, DQS1 = 0
1449 11:05:31.152927 DQM Delay:
1450 11:05:31.156239 DQM0 = 19, DQM1 = 18
1451 11:05:31.156747 DQ Delay:
1452 11:05:31.159904 DQ0 =22, DQ1 =20, DQ2 =21, DQ3 =15
1453 11:05:31.163133 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
1454 11:05:31.166452 DQ8 =14, DQ9 =17, DQ10 =25, DQ11 =17
1455 11:05:31.169238 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =21
1456 11:05:31.169621
1457 11:05:31.169918
1458 11:05:31.170284
1459 11:05:31.172838 [DramC_TX_OE_Calibration] TA2
1460 11:05:31.176267 Original DQ_B0 (3 6) =30, OEN = 27
1461 11:05:31.179696 Original DQ_B1 (3 6) =30, OEN = 27
1462 11:05:31.182657 23, 0x0, End_B0=23 End_B1=23
1463 11:05:31.183050 24, 0x0, End_B0=24 End_B1=24
1464 11:05:31.186450 25, 0x0, End_B0=25 End_B1=25
1465 11:05:31.189710 26, 0x0, End_B0=26 End_B1=26
1466 11:05:31.192817 27, 0x0, End_B0=27 End_B1=27
1467 11:05:31.193213 28, 0x0, End_B0=28 End_B1=28
1468 11:05:31.196552 29, 0x0, End_B0=29 End_B1=29
1469 11:05:31.199954 30, 0x0, End_B0=30 End_B1=30
1470 11:05:31.203265 31, 0xFFFF, End_B0=30 End_B1=30
1471 11:05:31.206166 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1472 11:05:31.212850 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1473 11:05:31.213311
1474 11:05:31.213613
1475 11:05:31.216602 Write Rank0 MR23 =0x3f
1476 11:05:31.216988 [DQSOSC]
1477 11:05:31.223230 [DQSOSCAuto] RK0, (LSB)MR18= 0x1111, (MSB)MR19= 0x303, tDQSOscB0 = 401 ps tDQSOscB1 = 401 ps
1478 11:05:31.229672 CH0_RK0: MR19=0x303, MR18=0x1111, DQSOSC=401, MR23=63, INC=15, DEC=22
1479 11:05:31.232933 Write Rank0 MR23 =0x3f
1480 11:05:31.233315 [DQSOSC]
1481 11:05:31.243274 [DQSOSCAuto] RK0, (LSB)MR18= 0x1010, (MSB)MR19= 0x303, tDQSOscB0 = 401 ps tDQSOscB1 = 401 ps
1482 11:05:31.243747 CH0 RK0: MR19=303, MR18=1010
1483 11:05:31.246678 [RankSwap] Rank num 2, (Multi 1), Rank 1
1484 11:05:31.250045 Write Rank0 MR2 =0xad
1485 11:05:31.250512 [Write Leveling]
1486 11:05:31.253058 delay byte0 byte1 byte2 byte3
1487 11:05:31.253441
1488 11:05:31.256736 10 0 0
1489 11:05:31.257214 11 0 0
1490 11:05:31.260594 12 0 0
1491 11:05:31.261208 13 0 0
1492 11:05:31.261550 14 0 0
1493 11:05:31.263530 15 0 0
1494 11:05:31.264002 16 0 0
1495 11:05:31.266893 17 0 0
1496 11:05:31.267376 18 0 0
1497 11:05:31.269967 19 0 0
1498 11:05:31.270358 20 0 0
1499 11:05:31.270662 21 0 0
1500 11:05:31.273162 22 0 0
1501 11:05:31.273551 23 0 ff
1502 11:05:31.276618 24 0 ff
1503 11:05:31.277054 25 0 ff
1504 11:05:31.279984 26 ff ff
1505 11:05:31.280376 27 ff ff
1506 11:05:31.280730 28 ff ff
1507 11:05:31.283097 29 ff ff
1508 11:05:31.283486 30 ff ff
1509 11:05:31.286712 31 ff ff
1510 11:05:31.287107 32 ff ff
1511 11:05:31.293067 pass bytecount = 0xff (0xff: all bytes pass)
1512 11:05:31.293467
1513 11:05:31.293771 DQS0 dly: 26
1514 11:05:31.294049 DQS1 dly: 23
1515 11:05:31.296952 Write Rank0 MR2 =0x2d
1516 11:05:31.300240 [RankSwap] Rank num 2, (Multi 1), Rank 0
1517 11:05:31.303548 Write Rank1 MR1 =0xd6
1518 11:05:31.303925 [Gating]
1519 11:05:31.304217 ==
1520 11:05:31.306775 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1521 11:05:31.310313 fsp= 1, odt_onoff= 1, Byte mode= 0
1522 11:05:31.310790 ==
1523 11:05:31.316787 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1524 11:05:31.320587 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
1525 11:05:31.323256 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1526 11:05:31.330418 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1527 11:05:31.333613 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1528 11:05:31.336767 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1529 11:05:31.343698 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1530 11:05:31.347386 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1531 11:05:31.350260 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1532 11:05:31.353581 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1533 11:05:31.360248 3 2 8 |2c2c 3534 |(11 10)(11 11) |(1 0)(0 1)| 0
1534 11:05:31.363726 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1535 11:05:31.367382 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
1536 11:05:31.373566 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1537 11:05:31.377241 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1538 11:05:31.380838 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1539 11:05:31.386794 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1540 11:05:31.390482 3 3 4 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1541 11:05:31.393760 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1542 11:05:31.397102 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1543 11:05:31.403922 [Byte 0] Lead/lag Transition tap number (1)
1544 11:05:31.406848 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1545 11:05:31.410789 3 3 20 |3534 403 |(11 11)(11 11) |(0 0)(1 1)| 0
1546 11:05:31.417156 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1547 11:05:31.420550 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1548 11:05:31.423730 [Byte 1] Lead/lag falling Transition (3, 3, 28)
1549 11:05:31.427094 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1550 11:05:31.433557 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1551 11:05:31.437060 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1552 11:05:31.440427 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1553 11:05:31.446984 3 4 16 |3d3d e0e |(11 11)(11 11) |(1 1)(1 1)| 0
1554 11:05:31.450058 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1555 11:05:31.453655 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 11:05:31.460090 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1557 11:05:31.463632 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 11:05:31.467369 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 11:05:31.470678 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 11:05:31.476838 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 11:05:31.480902 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 11:05:31.483600 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1563 11:05:31.490342 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1564 11:05:31.493848 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1565 11:05:31.497080 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1566 11:05:31.503967 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1567 11:05:31.507408 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1568 11:05:31.510656 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1569 11:05:31.513956 [Byte 0] Lead/lag Transition tap number (2)
1570 11:05:31.520793 3 6 8 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1571 11:05:31.523917 [Byte 1] Lead/lag Transition tap number (3)
1572 11:05:31.527252 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
1573 11:05:31.530679 [Byte 0]First pass (3, 6, 12)
1574 11:05:31.534236 3 6 16 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
1575 11:05:31.537428 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1576 11:05:31.540559 [Byte 1]First pass (3, 6, 20)
1577 11:05:31.543812 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1578 11:05:31.547644 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1579 11:05:31.554403 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1580 11:05:31.557632 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1581 11:05:31.560809 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1582 11:05:31.564205 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1583 11:05:31.567551 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1584 11:05:31.574147 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1585 11:05:31.577337 All bytes gating window > 1UI, Early break!
1586 11:05:31.577721
1587 11:05:31.580630 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1588 11:05:31.581013
1589 11:05:31.583956 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)
1590 11:05:31.584352
1591 11:05:31.584684
1592 11:05:31.584959
1593 11:05:31.587103 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1594 11:05:31.587481
1595 11:05:31.590554 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1596 11:05:31.590934
1597 11:05:31.594021
1598 11:05:31.594399 Write Rank1 MR1 =0x56
1599 11:05:31.594695
1600 11:05:31.597154 best RODT dly(2T, 0.5T) = (2, 3)
1601 11:05:31.597537
1602 11:05:31.600684 best RODT dly(2T, 0.5T) = (2, 3)
1603 11:05:31.601066 ==
1604 11:05:31.607315 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1605 11:05:31.607700 fsp= 1, odt_onoff= 1, Byte mode= 0
1606 11:05:31.610815 ==
1607 11:05:31.613917 Start DQ dly to find pass range UseTestEngine =0
1608 11:05:31.617187 x-axis: bit #, y-axis: DQ dly (-127~63)
1609 11:05:31.617585 RX Vref Scan = 0
1610 11:05:31.620974 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1611 11:05:31.624199 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1612 11:05:31.626912 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1613 11:05:31.630315 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1614 11:05:31.633921 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1615 11:05:31.637237 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1616 11:05:31.640332 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1617 11:05:31.640510 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1618 11:05:31.643451 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1619 11:05:31.647120 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1620 11:05:31.650877 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1621 11:05:31.653754 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1622 11:05:31.657334 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1623 11:05:31.660697 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1624 11:05:31.663856 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1625 11:05:31.664010 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1626 11:05:31.667277 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1627 11:05:31.670366 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1628 11:05:31.673970 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1629 11:05:31.677236 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1630 11:05:31.680561 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1631 11:05:31.684106 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1632 11:05:31.684564 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1633 11:05:31.687586 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1634 11:05:31.690801 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1635 11:05:31.694430 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1636 11:05:31.697457 0, [0] xxxoxoxx oxxoxxxx [MSB]
1637 11:05:31.701120 1, [0] xxxoxoxx ooxoxoxx [MSB]
1638 11:05:31.701596 2, [0] xxxoxoox ooxoooxx [MSB]
1639 11:05:31.704626 3, [0] xoxooooo ooxoooox [MSB]
1640 11:05:31.707367 4, [0] oooooooo ooxoooox [MSB]
1641 11:05:31.711212 5, [0] oooooooo ooxooooo [MSB]
1642 11:05:31.714219 6, [0] oooooooo ooxooooo [MSB]
1643 11:05:31.718084 33, [0] oooooooo xooooooo [MSB]
1644 11:05:31.718554 34, [0] oooooooo xooooooo [MSB]
1645 11:05:31.721061 35, [0] oooxoooo xooooooo [MSB]
1646 11:05:31.724167 36, [0] oooxoooo xooxoooo [MSB]
1647 11:05:31.727501 37, [0] oooxoxoo xxoxoxoo [MSB]
1648 11:05:31.731155 38, [0] oooxoxoo xxoxxxxo [MSB]
1649 11:05:31.734350 39, [0] oooxoxox xxoxxxxo [MSB]
1650 11:05:31.737702 40, [0] oooxoxxx xxoxxxxo [MSB]
1651 11:05:31.738095 41, [0] oxxxxxxx xxoxxxxx [MSB]
1652 11:05:31.741618 42, [0] oxxxxxxx xxoxxxxx [MSB]
1653 11:05:31.744520 43, [0] xxxxxxxx xxoxxxxx [MSB]
1654 11:05:31.747941 44, [0] xxxxxxxx xxoxxxxx [MSB]
1655 11:05:31.751241 45, [0] xxxxxxxx xxxxxxxx [MSB]
1656 11:05:31.754703 iDelay=45, Bit 0, Center 23 (4 ~ 42) 39
1657 11:05:31.758100 iDelay=45, Bit 1, Center 21 (3 ~ 40) 38
1658 11:05:31.761566 iDelay=45, Bit 2, Center 22 (4 ~ 40) 37
1659 11:05:31.764607 iDelay=45, Bit 3, Center 16 (-2 ~ 34) 37
1660 11:05:31.768150 iDelay=45, Bit 4, Center 21 (3 ~ 40) 38
1661 11:05:31.771339 iDelay=45, Bit 5, Center 18 (0 ~ 36) 37
1662 11:05:31.774779 iDelay=45, Bit 6, Center 20 (2 ~ 39) 38
1663 11:05:31.777959 iDelay=45, Bit 7, Center 20 (3 ~ 38) 36
1664 11:05:31.781773 iDelay=45, Bit 8, Center 15 (-2 ~ 32) 35
1665 11:05:31.784998 iDelay=45, Bit 9, Center 18 (1 ~ 36) 36
1666 11:05:31.791215 iDelay=45, Bit 10, Center 25 (7 ~ 44) 38
1667 11:05:31.794616 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1668 11:05:31.797916 iDelay=45, Bit 12, Center 19 (2 ~ 37) 36
1669 11:05:31.801429 iDelay=45, Bit 13, Center 18 (1 ~ 36) 36
1670 11:05:31.804552 iDelay=45, Bit 14, Center 20 (3 ~ 37) 35
1671 11:05:31.807714 iDelay=45, Bit 15, Center 22 (5 ~ 40) 36
1672 11:05:31.808154 ==
1673 11:05:31.814665 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1674 11:05:31.815177 fsp= 1, odt_onoff= 1, Byte mode= 0
1675 11:05:31.818243 ==
1676 11:05:31.818740 DQS Delay:
1677 11:05:31.819071 DQS0 = 0, DQS1 = 0
1678 11:05:31.821203 DQM Delay:
1679 11:05:31.821628 DQM0 = 20, DQM1 = 19
1680 11:05:31.824558 DQ Delay:
1681 11:05:31.828118 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =16
1682 11:05:31.828738 DQ4 =21, DQ5 =18, DQ6 =20, DQ7 =20
1683 11:05:31.831468 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
1684 11:05:31.834621 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1685 11:05:31.837977
1686 11:05:31.838431
1687 11:05:31.838731 DramC Write-DBI off
1688 11:05:31.839011 ==
1689 11:05:31.844567 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1690 11:05:31.848095 fsp= 1, odt_onoff= 1, Byte mode= 0
1691 11:05:31.848528 ==
1692 11:05:31.851350 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1693 11:05:31.851833
1694 11:05:31.854536 Begin, DQ Scan Range 919~1175
1695 11:05:31.854918
1696 11:05:31.855216
1697 11:05:31.855492 TX Vref Scan disable
1698 11:05:31.861674 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1699 11:05:31.864434 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1700 11:05:31.868254 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1701 11:05:31.871486 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1702 11:05:31.874513 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1703 11:05:31.877736 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1704 11:05:31.881164 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1705 11:05:31.884840 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1706 11:05:31.888342 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1707 11:05:31.891432 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1708 11:05:31.894703 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1709 11:05:31.898450 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1710 11:05:31.901849 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1711 11:05:31.904850 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1712 11:05:31.908238 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1713 11:05:31.911547 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1714 11:05:31.918153 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1715 11:05:31.921065 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1716 11:05:31.924604 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1717 11:05:31.927784 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1718 11:05:31.931549 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1719 11:05:31.934865 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1720 11:05:31.938385 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1721 11:05:31.941370 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1722 11:05:31.944629 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1723 11:05:31.948089 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1724 11:05:31.951727 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1725 11:05:31.954916 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1726 11:05:31.958059 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1727 11:05:31.961679 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1728 11:05:31.964932 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1729 11:05:31.968044 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1730 11:05:31.971712 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1731 11:05:31.977909 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1732 11:05:31.981570 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1733 11:05:31.984630 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1734 11:05:31.988083 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1735 11:05:31.991269 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1736 11:05:31.995206 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1737 11:05:31.998340 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1738 11:05:32.001579 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1739 11:05:32.005027 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1740 11:05:32.008217 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1741 11:05:32.011830 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1742 11:05:32.015443 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1743 11:05:32.018526 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1744 11:05:32.021811 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1745 11:05:32.025155 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1746 11:05:32.028132 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1747 11:05:32.032067 968 |3 6 8|[0] xxxxxxxx ooxooxxx [MSB]
1748 11:05:32.035098 969 |3 6 9|[0] xxxxxxxx ooxooxox [MSB]
1749 11:05:32.038384 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1750 11:05:32.042257 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1751 11:05:32.045395 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1752 11:05:32.048500 973 |3 6 13|[0] xxxxxxxx ooxooooo [MSB]
1753 11:05:32.051956 974 |3 6 14|[0] xoxooooo oooooooo [MSB]
1754 11:05:32.058621 975 |3 6 15|[0] xoxooooo oooooooo [MSB]
1755 11:05:32.061660 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1756 11:05:32.065344 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1757 11:05:32.068085 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1758 11:05:32.071517 989 |3 6 29|[0] oooxoooo xxxxxxxx [MSB]
1759 11:05:32.074737 990 |3 6 30|[0] oooxoooo xxxxxxxx [MSB]
1760 11:05:32.078161 991 |3 6 31|[0] oooxoxoo xxxxxxxx [MSB]
1761 11:05:32.082212 992 |3 6 32|[0] xoxxxxxx xxxxxxxx [MSB]
1762 11:05:32.085372 993 |3 6 33|[0] xxxxxxxx xxxxxxxx [MSB]
1763 11:05:32.088272 Byte0, DQ PI dly=982, DQM PI dly= 982
1764 11:05:32.095295 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1765 11:05:32.095959
1766 11:05:32.098316 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1767 11:05:32.098827
1768 11:05:32.101749 Byte1, DQ PI dly=977, DQM PI dly= 977
1769 11:05:32.105245 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1770 11:05:32.105795
1771 11:05:32.112286 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1772 11:05:32.112794
1773 11:05:32.113167 ==
1774 11:05:32.115426 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1775 11:05:32.118512 fsp= 1, odt_onoff= 1, Byte mode= 0
1776 11:05:32.118939 ==
1777 11:05:32.125195 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1778 11:05:32.125784
1779 11:05:32.128293 Begin, DQ Scan Range 953~1017
1780 11:05:32.128737 Write Rank1 MR14 =0x0
1781 11:05:32.136875
1782 11:05:32.137261 CH=0, VrefRange= 0, VrefLevel = 0
1783 11:05:32.143449 TX Bit0 (977~991) 15 984, Bit8 (968~981) 14 974,
1784 11:05:32.146832 TX Bit1 (976~988) 13 982, Bit9 (969~984) 16 976,
1785 11:05:32.154050 TX Bit2 (977~990) 14 983, Bit10 (976~987) 12 981,
1786 11:05:32.157072 TX Bit3 (971~982) 12 976, Bit11 (970~981) 12 975,
1787 11:05:32.160632 TX Bit4 (976~987) 12 981, Bit12 (971~983) 13 977,
1788 11:05:32.167690 TX Bit5 (973~985) 13 979, Bit13 (974~982) 9 978,
1789 11:05:32.170448 TX Bit6 (975~987) 13 981, Bit14 (972~983) 12 977,
1790 11:05:32.173483 TX Bit7 (975~989) 15 982, Bit15 (975~987) 13 981,
1791 11:05:32.173871
1792 11:05:32.177127 Write Rank1 MR14 =0x2
1793 11:05:32.185118
1794 11:05:32.185663 CH=0, VrefRange= 0, VrefLevel = 2
1795 11:05:32.191830 TX Bit0 (977~991) 15 984, Bit8 (968~981) 14 974,
1796 11:05:32.194826 TX Bit1 (976~988) 13 982, Bit9 (969~984) 16 976,
1797 11:05:32.201883 TX Bit2 (977~990) 14 983, Bit10 (975~988) 14 981,
1798 11:05:32.205300 TX Bit3 (970~983) 14 976, Bit11 (969~982) 14 975,
1799 11:05:32.208029 TX Bit4 (976~989) 14 982, Bit12 (970~984) 15 977,
1800 11:05:32.215185 TX Bit5 (973~986) 14 979, Bit13 (973~982) 10 977,
1801 11:05:32.218270 TX Bit6 (974~988) 15 981, Bit14 (972~985) 14 978,
1802 11:05:32.222081 TX Bit7 (975~990) 16 982, Bit15 (974~988) 15 981,
1803 11:05:32.222609
1804 11:05:32.224699 Write Rank1 MR14 =0x4
1805 11:05:32.233121
1806 11:05:32.233626 CH=0, VrefRange= 0, VrefLevel = 4
1807 11:05:32.239881 TX Bit0 (977~992) 16 984, Bit8 (968~982) 15 975,
1808 11:05:32.243179 TX Bit1 (976~990) 15 983, Bit9 (969~984) 16 976,
1809 11:05:32.250173 TX Bit2 (977~991) 15 984, Bit10 (975~989) 15 982,
1810 11:05:32.253747 TX Bit3 (970~984) 15 977, Bit11 (968~983) 16 975,
1811 11:05:32.256666 TX Bit4 (976~990) 15 983, Bit12 (971~984) 14 977,
1812 11:05:32.263338 TX Bit5 (972~987) 16 979, Bit13 (972~983) 12 977,
1813 11:05:32.266702 TX Bit6 (973~989) 17 981, Bit14 (972~985) 14 978,
1814 11:05:32.270288 TX Bit7 (975~991) 17 983, Bit15 (974~989) 16 981,
1815 11:05:32.270799
1816 11:05:32.273246 Write Rank1 MR14 =0x6
1817 11:05:32.281297
1818 11:05:32.281719 CH=0, VrefRange= 0, VrefLevel = 6
1819 11:05:32.288170 TX Bit0 (977~992) 16 984, Bit8 (968~983) 16 975,
1820 11:05:32.291462 TX Bit1 (976~990) 15 983, Bit9 (968~985) 18 976,
1821 11:05:32.298067 TX Bit2 (977~991) 15 984, Bit10 (975~990) 16 982,
1822 11:05:32.301343 TX Bit3 (970~985) 16 977, Bit11 (968~983) 16 975,
1823 11:05:32.304838 TX Bit4 (975~991) 17 983, Bit12 (970~985) 16 977,
1824 11:05:32.311243 TX Bit5 (971~988) 18 979, Bit13 (971~984) 14 977,
1825 11:05:32.314759 TX Bit6 (973~990) 18 981, Bit14 (971~986) 16 978,
1826 11:05:32.317884 TX Bit7 (975~991) 17 983, Bit15 (974~990) 17 982,
1827 11:05:32.318390
1828 11:05:32.321787 Write Rank1 MR14 =0x8
1829 11:05:32.329903
1830 11:05:32.330401 CH=0, VrefRange= 0, VrefLevel = 8
1831 11:05:32.336379 TX Bit0 (976~993) 18 984, Bit8 (967~983) 17 975,
1832 11:05:32.339247 TX Bit1 (976~991) 16 983, Bit9 (969~985) 17 977,
1833 11:05:32.346560 TX Bit2 (977~991) 15 984, Bit10 (975~990) 16 982,
1834 11:05:32.350154 TX Bit3 (969~985) 17 977, Bit11 (968~984) 17 976,
1835 11:05:32.353074 TX Bit4 (975~991) 17 983, Bit12 (969~986) 18 977,
1836 11:05:32.359435 TX Bit5 (971~988) 18 979, Bit13 (971~984) 14 977,
1837 11:05:32.362643 TX Bit6 (973~990) 18 981, Bit14 (970~987) 18 978,
1838 11:05:32.366364 TX Bit7 (974~991) 18 982, Bit15 (974~990) 17 982,
1839 11:05:32.366868
1840 11:05:32.369991 Write Rank1 MR14 =0xa
1841 11:05:32.377916
1842 11:05:32.381019 CH=0, VrefRange= 0, VrefLevel = 10
1843 11:05:32.384391 TX Bit0 (976~993) 18 984, Bit8 (967~983) 17 975,
1844 11:05:32.387795 TX Bit1 (975~991) 17 983, Bit9 (968~986) 19 977,
1845 11:05:32.394245 TX Bit2 (976~992) 17 984, Bit10 (974~991) 18 982,
1846 11:05:32.397570 TX Bit3 (969~986) 18 977, Bit11 (967~984) 18 975,
1847 11:05:32.401036 TX Bit4 (974~991) 18 982, Bit12 (969~986) 18 977,
1848 11:05:32.407513 TX Bit5 (971~989) 19 980, Bit13 (970~984) 15 977,
1849 11:05:32.411140 TX Bit6 (972~991) 20 981, Bit14 (970~987) 18 978,
1850 11:05:32.414554 TX Bit7 (974~992) 19 983, Bit15 (974~991) 18 982,
1851 11:05:32.415059
1852 11:05:32.417912 Write Rank1 MR14 =0xc
1853 11:05:32.426234
1854 11:05:32.429728 CH=0, VrefRange= 0, VrefLevel = 12
1855 11:05:32.432959 TX Bit0 (976~993) 18 984, Bit8 (967~984) 18 975,
1856 11:05:32.436190 TX Bit1 (975~991) 17 983, Bit9 (968~986) 19 977,
1857 11:05:32.443046 TX Bit2 (976~992) 17 984, Bit10 (974~991) 18 982,
1858 11:05:32.446093 TX Bit3 (969~986) 18 977, Bit11 (968~984) 17 976,
1859 11:05:32.449664 TX Bit4 (974~992) 19 983, Bit12 (969~987) 19 978,
1860 11:05:32.456299 TX Bit5 (970~990) 21 980, Bit13 (970~985) 16 977,
1861 11:05:32.459294 TX Bit6 (972~991) 20 981, Bit14 (970~988) 19 979,
1862 11:05:32.462831 TX Bit7 (973~992) 20 982, Bit15 (972~991) 20 981,
1863 11:05:32.463219
1864 11:05:32.466078 Write Rank1 MR14 =0xe
1865 11:05:32.474996
1866 11:05:32.477800 CH=0, VrefRange= 0, VrefLevel = 14
1867 11:05:32.481159 TX Bit0 (976~994) 19 985, Bit8 (967~984) 18 975,
1868 11:05:32.485141 TX Bit1 (975~992) 18 983, Bit9 (968~987) 20 977,
1869 11:05:32.491213 TX Bit2 (976~993) 18 984, Bit10 (974~991) 18 982,
1870 11:05:32.494628 TX Bit3 (969~987) 19 978, Bit11 (967~985) 19 976,
1871 11:05:32.498196 TX Bit4 (973~992) 20 982, Bit12 (968~987) 20 977,
1872 11:05:32.505093 TX Bit5 (970~990) 21 980, Bit13 (970~986) 17 978,
1873 11:05:32.508432 TX Bit6 (972~991) 20 981, Bit14 (969~989) 21 979,
1874 11:05:32.511401 TX Bit7 (972~992) 21 982, Bit15 (972~991) 20 981,
1875 11:05:32.511791
1876 11:05:32.514969 Write Rank1 MR14 =0x10
1877 11:05:32.523511
1878 11:05:32.523972 CH=0, VrefRange= 0, VrefLevel = 16
1879 11:05:32.529965 TX Bit0 (976~994) 19 985, Bit8 (967~985) 19 976,
1880 11:05:32.533296 TX Bit1 (974~992) 19 983, Bit9 (968~988) 21 978,
1881 11:05:32.539845 TX Bit2 (976~993) 18 984, Bit10 (974~992) 19 983,
1882 11:05:32.543690 TX Bit3 (968~988) 21 978, Bit11 (967~985) 19 976,
1883 11:05:32.546965 TX Bit4 (973~992) 20 982, Bit12 (968~989) 22 978,
1884 11:05:32.553165 TX Bit5 (970~991) 22 980, Bit13 (969~986) 18 977,
1885 11:05:32.556580 TX Bit6 (971~992) 22 981, Bit14 (969~989) 21 979,
1886 11:05:32.560025 TX Bit7 (972~992) 21 982, Bit15 (973~992) 20 982,
1887 11:05:32.560487
1888 11:05:32.563409 Write Rank1 MR14 =0x12
1889 11:05:32.572428
1890 11:05:32.575557 CH=0, VrefRange= 0, VrefLevel = 18
1891 11:05:32.578363 TX Bit0 (975~995) 21 985, Bit8 (966~985) 20 975,
1892 11:05:32.582085 TX Bit1 (974~993) 20 983, Bit9 (967~989) 23 978,
1893 11:05:32.588504 TX Bit2 (976~994) 19 985, Bit10 (973~992) 20 982,
1894 11:05:32.592049 TX Bit3 (968~989) 22 978, Bit11 (967~986) 20 976,
1895 11:05:32.595518 TX Bit4 (972~993) 22 982, Bit12 (968~989) 22 978,
1896 11:05:32.602156 TX Bit5 (970~991) 22 980, Bit13 (969~987) 19 978,
1897 11:05:32.605418 TX Bit6 (971~992) 22 981, Bit14 (969~990) 22 979,
1898 11:05:32.608354 TX Bit7 (972~993) 22 982, Bit15 (972~992) 21 982,
1899 11:05:32.608800
1900 11:05:32.611897 Write Rank1 MR14 =0x14
1901 11:05:32.621155
1902 11:05:32.624500 CH=0, VrefRange= 0, VrefLevel = 20
1903 11:05:32.627659 TX Bit0 (975~996) 22 985, Bit8 (966~986) 21 976,
1904 11:05:32.630826 TX Bit1 (973~993) 21 983, Bit9 (967~990) 24 978,
1905 11:05:32.637870 TX Bit2 (975~994) 20 984, Bit10 (973~993) 21 983,
1906 11:05:32.640920 TX Bit3 (968~988) 21 978, Bit11 (967~987) 21 977,
1907 11:05:32.644580 TX Bit4 (972~993) 22 982, Bit12 (968~990) 23 979,
1908 11:05:32.651480 TX Bit5 (970~991) 22 980, Bit13 (969~988) 20 978,
1909 11:05:32.654827 TX Bit6 (970~992) 23 981, Bit14 (968~990) 23 979,
1910 11:05:32.657540 TX Bit7 (972~994) 23 983, Bit15 (971~992) 22 981,
1911 11:05:32.657968
1912 11:05:32.661329 Write Rank1 MR14 =0x16
1913 11:05:32.670538
1914 11:05:32.673333 CH=0, VrefRange= 0, VrefLevel = 22
1915 11:05:32.677190 TX Bit0 (975~996) 22 985, Bit8 (966~987) 22 976,
1916 11:05:32.680102 TX Bit1 (973~994) 22 983, Bit9 (967~990) 24 978,
1917 11:05:32.686912 TX Bit2 (975~994) 20 984, Bit10 (972~993) 22 982,
1918 11:05:32.689799 TX Bit3 (968~990) 23 979, Bit11 (966~987) 22 976,
1919 11:05:32.693086 TX Bit4 (972~994) 23 983, Bit12 (968~990) 23 979,
1920 11:05:32.700830 TX Bit5 (969~991) 23 980, Bit13 (968~989) 22 978,
1921 11:05:32.704174 TX Bit6 (970~993) 24 981, Bit14 (968~990) 23 979,
1922 11:05:32.706870 TX Bit7 (971~994) 24 982, Bit15 (971~993) 23 982,
1923 11:05:32.707301
1924 11:05:32.710138 Write Rank1 MR14 =0x18
1925 11:05:32.718876
1926 11:05:32.722337 CH=0, VrefRange= 0, VrefLevel = 24
1927 11:05:32.725570 TX Bit0 (975~997) 23 986, Bit8 (966~987) 22 976,
1928 11:05:32.729192 TX Bit1 (973~994) 22 983, Bit9 (967~990) 24 978,
1929 11:05:32.735872 TX Bit2 (975~995) 21 985, Bit10 (972~993) 22 982,
1930 11:05:32.738904 TX Bit3 (968~990) 23 979, Bit11 (966~989) 24 977,
1931 11:05:32.742363 TX Bit4 (971~994) 24 982, Bit12 (968~990) 23 979,
1932 11:05:32.748918 TX Bit5 (969~992) 24 980, Bit13 (968~989) 22 978,
1933 11:05:32.752109 TX Bit6 (970~993) 24 981, Bit14 (968~990) 23 979,
1934 11:05:32.756057 TX Bit7 (971~995) 25 983, Bit15 (971~993) 23 982,
1935 11:05:32.756449
1936 11:05:32.759475 Write Rank1 MR14 =0x1a
1937 11:05:32.768653
1938 11:05:32.771700 CH=0, VrefRange= 0, VrefLevel = 26
1939 11:05:32.774542 TX Bit0 (974~997) 24 985, Bit8 (965~988) 24 976,
1940 11:05:32.778627 TX Bit1 (972~994) 23 983, Bit9 (966~990) 25 978,
1941 11:05:32.785290 TX Bit2 (974~996) 23 985, Bit10 (972~994) 23 983,
1942 11:05:32.788143 TX Bit3 (967~991) 25 979, Bit11 (966~989) 24 977,
1943 11:05:32.791626 TX Bit4 (971~994) 24 982, Bit12 (968~991) 24 979,
1944 11:05:32.798004 TX Bit5 (969~992) 24 980, Bit13 (968~989) 22 978,
1945 11:05:32.802062 TX Bit6 (970~994) 25 982, Bit14 (968~991) 24 979,
1946 11:05:32.804862 TX Bit7 (971~994) 24 982, Bit15 (970~993) 24 981,
1947 11:05:32.805287
1948 11:05:32.808323 Write Rank1 MR14 =0x1c
1949 11:05:32.817804
1950 11:05:32.818304 CH=0, VrefRange= 0, VrefLevel = 28
1951 11:05:32.824989 TX Bit0 (973~998) 26 985, Bit8 (965~988) 24 976,
1952 11:05:32.827544 TX Bit1 (972~996) 25 984, Bit9 (967~990) 24 978,
1953 11:05:32.834427 TX Bit2 (974~996) 23 985, Bit10 (971~994) 24 982,
1954 11:05:32.837510 TX Bit3 (967~991) 25 979, Bit11 (966~989) 24 977,
1955 11:05:32.841035 TX Bit4 (971~996) 26 983, Bit12 (967~991) 25 979,
1956 11:05:32.847696 TX Bit5 (969~992) 24 980, Bit13 (968~990) 23 979,
1957 11:05:32.851443 TX Bit6 (970~994) 25 982, Bit14 (967~991) 25 979,
1958 11:05:32.854493 TX Bit7 (971~996) 26 983, Bit15 (969~994) 26 981,
1959 11:05:32.854917
1960 11:05:32.857350 Write Rank1 MR14 =0x1e
1961 11:05:32.867174
1962 11:05:32.870443 CH=0, VrefRange= 0, VrefLevel = 30
1963 11:05:32.873294 TX Bit0 (973~998) 26 985, Bit8 (965~989) 25 977,
1964 11:05:32.876666 TX Bit1 (972~995) 24 983, Bit9 (967~990) 24 978,
1965 11:05:32.883089 TX Bit2 (974~997) 24 985, Bit10 (970~995) 26 982,
1966 11:05:32.886418 TX Bit3 (967~991) 25 979, Bit11 (966~989) 24 977,
1967 11:05:32.890660 TX Bit4 (970~996) 27 983, Bit12 (967~991) 25 979,
1968 11:05:32.897113 TX Bit5 (968~993) 26 980, Bit13 (968~990) 23 979,
1969 11:05:32.900436 TX Bit6 (969~995) 27 982, Bit14 (967~991) 25 979,
1970 11:05:32.903435 TX Bit7 (970~996) 27 983, Bit15 (969~994) 26 981,
1971 11:05:32.903989
1972 11:05:32.906452 Write Rank1 MR14 =0x20
1973 11:05:32.915197
1974 11:05:32.918887 CH=0, VrefRange= 0, VrefLevel = 32
1975 11:05:32.921966 TX Bit0 (973~998) 26 985, Bit8 (965~989) 25 977,
1976 11:05:32.925358 TX Bit1 (972~995) 24 983, Bit9 (967~990) 24 978,
1977 11:05:32.932232 TX Bit2 (974~997) 24 985, Bit10 (970~995) 26 982,
1978 11:05:32.935446 TX Bit3 (967~991) 25 979, Bit11 (966~989) 24 977,
1979 11:05:32.938788 TX Bit4 (970~996) 27 983, Bit12 (967~991) 25 979,
1980 11:05:32.945437 TX Bit5 (968~993) 26 980, Bit13 (968~990) 23 979,
1981 11:05:32.949014 TX Bit6 (969~995) 27 982, Bit14 (967~991) 25 979,
1982 11:05:32.952427 TX Bit7 (970~996) 27 983, Bit15 (969~994) 26 981,
1983 11:05:32.952522
1984 11:05:32.955556 Write Rank1 MR14 =0x22
1985 11:05:32.964708
1986 11:05:32.964785 CH=0, VrefRange= 0, VrefLevel = 34
1987 11:05:32.971476 TX Bit0 (973~998) 26 985, Bit8 (965~989) 25 977,
1988 11:05:32.974881 TX Bit1 (972~995) 24 983, Bit9 (967~990) 24 978,
1989 11:05:32.981595 TX Bit2 (974~997) 24 985, Bit10 (970~995) 26 982,
1990 11:05:32.985015 TX Bit3 (967~991) 25 979, Bit11 (966~989) 24 977,
1991 11:05:32.988115 TX Bit4 (970~996) 27 983, Bit12 (967~991) 25 979,
1992 11:05:32.994786 TX Bit5 (968~993) 26 980, Bit13 (968~990) 23 979,
1993 11:05:32.998112 TX Bit6 (969~995) 27 982, Bit14 (967~991) 25 979,
1994 11:05:33.001616 TX Bit7 (970~996) 27 983, Bit15 (969~994) 26 981,
1995 11:05:33.001711
1996 11:05:33.004738 Write Rank1 MR14 =0x24
1997 11:05:33.013851
1998 11:05:33.013937 CH=0, VrefRange= 0, VrefLevel = 36
1999 11:05:33.020442 TX Bit0 (973~998) 26 985, Bit8 (965~989) 25 977,
2000 11:05:33.023902 TX Bit1 (972~995) 24 983, Bit9 (967~990) 24 978,
2001 11:05:33.030783 TX Bit2 (974~997) 24 985, Bit10 (970~995) 26 982,
2002 11:05:33.033984 TX Bit3 (967~991) 25 979, Bit11 (966~989) 24 977,
2003 11:05:33.037086 TX Bit4 (970~996) 27 983, Bit12 (967~991) 25 979,
2004 11:05:33.044094 TX Bit5 (968~993) 26 980, Bit13 (968~990) 23 979,
2005 11:05:33.047280 TX Bit6 (969~995) 27 982, Bit14 (967~991) 25 979,
2006 11:05:33.050781 TX Bit7 (970~996) 27 983, Bit15 (969~994) 26 981,
2007 11:05:33.050868
2008 11:05:33.050954
2009 11:05:33.053916 TX Vref found, early break! 379< 383
2010 11:05:33.060707 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2011 11:05:33.063891 u1DelayCellOfst[0]=7 cells (6 PI)
2012 11:05:33.067294 u1DelayCellOfst[1]=5 cells (4 PI)
2013 11:05:33.070839 u1DelayCellOfst[2]=7 cells (6 PI)
2014 11:05:33.070926 u1DelayCellOfst[3]=0 cells (0 PI)
2015 11:05:33.074181 u1DelayCellOfst[4]=5 cells (4 PI)
2016 11:05:33.077487 u1DelayCellOfst[5]=1 cells (1 PI)
2017 11:05:33.080927 u1DelayCellOfst[6]=3 cells (3 PI)
2018 11:05:33.084200 u1DelayCellOfst[7]=5 cells (4 PI)
2019 11:05:33.087401 Byte0, DQ PI dly=979, DQM PI dly= 982
2020 11:05:33.090848 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2021 11:05:33.090997
2022 11:05:33.098118 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2023 11:05:33.098326
2024 11:05:33.100862 u1DelayCellOfst[8]=0 cells (0 PI)
2025 11:05:33.104638 u1DelayCellOfst[9]=1 cells (1 PI)
2026 11:05:33.104820 u1DelayCellOfst[10]=6 cells (5 PI)
2027 11:05:33.107950 u1DelayCellOfst[11]=0 cells (0 PI)
2028 11:05:33.111027 u1DelayCellOfst[12]=2 cells (2 PI)
2029 11:05:33.114412 u1DelayCellOfst[13]=2 cells (2 PI)
2030 11:05:33.118214 u1DelayCellOfst[14]=2 cells (2 PI)
2031 11:05:33.121411 u1DelayCellOfst[15]=5 cells (4 PI)
2032 11:05:33.124366 Byte1, DQ PI dly=977, DQM PI dly= 979
2033 11:05:33.128085 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
2034 11:05:33.128368
2035 11:05:33.134788 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
2036 11:05:33.135122
2037 11:05:33.135379 Write Rank1 MR14 =0x1e
2038 11:05:33.135618
2039 11:05:33.138160 Final TX Range 0 Vref 30
2040 11:05:33.138789
2041 11:05:33.145560 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2042 11:05:33.146195
2043 11:05:33.152348 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2044 11:05:33.158470 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2045 11:05:33.165028 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2046 11:05:33.168156 Write Rank1 MR3 =0xb0
2047 11:05:33.168706 DramC Write-DBI on
2048 11:05:33.169175 ==
2049 11:05:33.174580 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2050 11:05:33.178179 fsp= 1, odt_onoff= 1, Byte mode= 0
2051 11:05:33.178568 ==
2052 11:05:33.181833 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2053 11:05:33.182226
2054 11:05:33.185345 Begin, DQ Scan Range 699~763
2055 11:05:33.185760
2056 11:05:33.186067
2057 11:05:33.188534 TX Vref Scan disable
2058 11:05:33.191801 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2059 11:05:33.195377 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2060 11:05:33.198492 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2061 11:05:33.201994 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2062 11:05:33.205486 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2063 11:05:33.208549 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2064 11:05:33.211705 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2065 11:05:33.214820 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2066 11:05:33.218378 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2067 11:05:33.221522 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2068 11:05:33.225298 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2069 11:05:33.228047 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2070 11:05:33.231612 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2071 11:05:33.234934 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2072 11:05:33.237833 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2073 11:05:33.241746 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2074 11:05:33.251105 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2075 11:05:33.254437 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2076 11:05:33.257585 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2077 11:05:33.260734 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2078 11:05:33.264656 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2079 11:05:33.267746 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2080 11:05:33.270953 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2081 11:05:33.274463 742 |2 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
2082 11:05:33.277526 Byte0, DQ PI dly=728, DQM PI dly= 728
2083 11:05:33.280871 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2084 11:05:33.280971
2085 11:05:33.288008 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2086 11:05:33.288093
2087 11:05:33.291030 Byte1, DQ PI dly=722, DQM PI dly= 722
2088 11:05:33.294404 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2089 11:05:33.294488
2090 11:05:33.297730 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2091 11:05:33.297814
2092 11:05:33.304381 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2093 11:05:33.311460 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2094 11:05:33.317810 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2095 11:05:33.321253 Write Rank1 MR3 =0x30
2096 11:05:33.324378 DramC Write-DBI off
2097 11:05:33.324468
2098 11:05:33.324534 [DATLAT]
2099 11:05:33.327670 Freq=1600, CH0 RK1, use_rxtx_scan=0
2100 11:05:33.327755
2101 11:05:33.330868 DATLAT Default: 0x10
2102 11:05:33.330952 7, 0xFFFF, sum=0
2103 11:05:33.331018 8, 0xFFFF, sum=0
2104 11:05:33.334734 9, 0xFFFF, sum=0
2105 11:05:33.334819 10, 0xFFFF, sum=0
2106 11:05:33.337592 11, 0xFFFF, sum=0
2107 11:05:33.337684 12, 0xFFFF, sum=0
2108 11:05:33.341395 13, 0xFFFF, sum=0
2109 11:05:33.341490 14, 0x0, sum=1
2110 11:05:33.344433 15, 0x0, sum=2
2111 11:05:33.344543 16, 0x0, sum=3
2112 11:05:33.347878 17, 0x0, sum=4
2113 11:05:33.351012 pattern=2 first_step=14 total pass=5 best_step=16
2114 11:05:33.351120 ==
2115 11:05:33.354386 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2116 11:05:33.357857 fsp= 1, odt_onoff= 1, Byte mode= 0
2117 11:05:33.357992 ==
2118 11:05:33.364356 Start DQ dly to find pass range UseTestEngine =1
2119 11:05:33.368008 x-axis: bit #, y-axis: DQ dly (-127~63)
2120 11:05:33.368183 RX Vref Scan = 0
2121 11:05:33.371066 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2122 11:05:33.374282 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2123 11:05:33.377714 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2124 11:05:33.381077 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2125 11:05:33.384696 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2126 11:05:33.387808 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2127 11:05:33.388203 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2128 11:05:33.391467 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2129 11:05:33.395278 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2130 11:05:33.398012 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2131 11:05:33.401636 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2132 11:05:33.405004 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2133 11:05:33.408175 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2134 11:05:33.411400 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2135 11:05:33.411799 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2136 11:05:33.415221 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2137 11:05:33.418630 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2138 11:05:33.422038 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2139 11:05:33.425043 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2140 11:05:33.428213 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2141 11:05:33.431427 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2142 11:05:33.431831 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2143 11:05:33.434788 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2144 11:05:33.439738 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2145 11:05:33.442631 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2146 11:05:33.446044 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2147 11:05:33.446520 0, [0] xxxoxxxx oxxoxxxx [MSB]
2148 11:05:33.449186 1, [0] xxxoxoxx ooxooxxx [MSB]
2149 11:05:33.453432 2, [0] xxxoxoxx ooxoooox [MSB]
2150 11:05:33.456525 3, [0] xxxoxooo ooxoooox [MSB]
2151 11:05:33.459903 4, [0] xxxoxooo ooxoooox [MSB]
2152 11:05:33.460378 5, [0] ooxooooo ooxoooox [MSB]
2153 11:05:33.463119 6, [0] oooooooo ooxooooo [MSB]
2154 11:05:33.467679 33, [0] oooooooo xooooooo [MSB]
2155 11:05:33.471077 34, [0] oooxoooo xooooooo [MSB]
2156 11:05:33.474428 35, [0] oooxoxoo xooxoooo [MSB]
2157 11:05:33.477422 36, [0] oooxoxoo xooxoxoo [MSB]
2158 11:05:33.481132 37, [0] oooxoxoo xxoxoxoo [MSB]
2159 11:05:33.485220 38, [0] oooxoxxo xxoxxxxo [MSB]
2160 11:05:33.485727 39, [0] oxxxoxxx xxoxxxxo [MSB]
2161 11:05:33.487459 40, [0] oxxxxxxx xxoxxxxx [MSB]
2162 11:05:33.490823 41, [0] xxxxxxxx xxoxxxxx [MSB]
2163 11:05:33.493983 42, [0] xxxxxxxx xxoxxxxx [MSB]
2164 11:05:33.497847 43, [0] xxxxxxxx xxoxxxxx [MSB]
2165 11:05:33.501064 44, [0] xxxxxxxx xxxxxxxx [MSB]
2166 11:05:33.504313 iDelay=44, Bit 0, Center 22 (5 ~ 40) 36
2167 11:05:33.507598 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2168 11:05:33.511015 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2169 11:05:33.514311 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2170 11:05:33.517440 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
2171 11:05:33.521201 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2172 11:05:33.524565 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2173 11:05:33.527859 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2174 11:05:33.531167 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
2175 11:05:33.534132 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2176 11:05:33.537726 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2177 11:05:33.544367 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2178 11:05:33.548096 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2179 11:05:33.551495 iDelay=44, Bit 13, Center 18 (2 ~ 35) 34
2180 11:05:33.554513 iDelay=44, Bit 14, Center 19 (2 ~ 37) 36
2181 11:05:33.557809 iDelay=44, Bit 15, Center 22 (6 ~ 39) 34
2182 11:05:33.558284 ==
2183 11:05:33.560681 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2184 11:05:33.564511 fsp= 1, odt_onoff= 1, Byte mode= 0
2185 11:05:33.567674 ==
2186 11:05:33.568056 DQS Delay:
2187 11:05:33.568355 DQS0 = 0, DQS1 = 0
2188 11:05:33.571341 DQM Delay:
2189 11:05:33.571803 DQM0 = 19, DQM1 = 19
2190 11:05:33.572104 DQ Delay:
2191 11:05:33.574418 DQ0 =22, DQ1 =21, DQ2 =22, DQ3 =15
2192 11:05:33.577997 DQ4 =22, DQ5 =17, DQ6 =20, DQ7 =20
2193 11:05:33.581552 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
2194 11:05:33.584829 DQ12 =19, DQ13 =18, DQ14 =19, DQ15 =22
2195 11:05:33.585299
2196 11:05:33.585599
2197 11:05:33.585876
2198 11:05:33.587698 [DramC_TX_OE_Calibration] TA2
2199 11:05:33.591894 Original DQ_B0 (3 6) =30, OEN = 27
2200 11:05:33.594761 Original DQ_B1 (3 6) =30, OEN = 27
2201 11:05:33.597968 23, 0x0, End_B0=23 End_B1=23
2202 11:05:33.602007 24, 0x0, End_B0=24 End_B1=24
2203 11:05:33.602486 25, 0x0, End_B0=25 End_B1=25
2204 11:05:33.604803 26, 0x0, End_B0=26 End_B1=26
2205 11:05:33.608250 27, 0x0, End_B0=27 End_B1=27
2206 11:05:33.611396 28, 0x0, End_B0=28 End_B1=28
2207 11:05:33.615014 29, 0x0, End_B0=29 End_B1=29
2208 11:05:33.615484 30, 0x0, End_B0=30 End_B1=30
2209 11:05:33.618160 31, 0xFFFF, End_B0=30 End_B1=30
2210 11:05:33.625266 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2211 11:05:33.628494 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2212 11:05:33.629007
2213 11:05:33.631533
2214 11:05:33.631955 Write Rank1 MR23 =0x3f
2215 11:05:33.632589 [DQSOSC]
2216 11:05:33.641476 [DQSOSCAuto] RK1, (LSB)MR18= 0xd9d9, (MSB)MR19= 0x202, tDQSOscB0 = 432 ps tDQSOscB1 = 432 ps
2217 11:05:33.648369 CH0_RK1: MR19=0x202, MR18=0xD9D9, DQSOSC=432, MR23=63, INC=13, DEC=19
2218 11:05:33.648964 Write Rank1 MR23 =0x3f
2219 11:05:33.651866 [DQSOSC]
2220 11:05:33.658060 [DQSOSCAuto] RK1, (LSB)MR18= 0xd9d9, (MSB)MR19= 0x202, tDQSOscB0 = 432 ps tDQSOscB1 = 432 ps
2221 11:05:33.661426 CH0 RK1: MR19=202, MR18=D9D9
2222 11:05:33.664912 [RxdqsGatingPostProcess] freq 1600
2223 11:05:33.668357 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2224 11:05:33.671213 Rank: 0
2225 11:05:33.671591 best DQS0 dly(2T, 0.5T) = (2, 5)
2226 11:05:33.674938 best DQS1 dly(2T, 0.5T) = (2, 5)
2227 11:05:33.678334 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2228 11:05:33.681556 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2229 11:05:33.685216 Rank: 1
2230 11:05:33.685594 best DQS0 dly(2T, 0.5T) = (2, 6)
2231 11:05:33.688442 best DQS1 dly(2T, 0.5T) = (2, 6)
2232 11:05:33.691951 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2233 11:05:33.694716 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2234 11:05:33.701330 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2235 11:05:33.704923 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2236 11:05:33.708760 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2237 11:05:33.711638 Write Rank0 MR13 =0x59
2238 11:05:33.712091 ==
2239 11:05:33.714758 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2240 11:05:33.718301 fsp= 1, odt_onoff= 1, Byte mode= 0
2241 11:05:33.718678 ==
2242 11:05:33.721696 === u2Vref_new: 0x56 --> 0x3a
2243 11:05:33.724901 === u2Vref_new: 0x58 --> 0x58
2244 11:05:33.728189 === u2Vref_new: 0x5a --> 0x5a
2245 11:05:33.731297 === u2Vref_new: 0x5c --> 0x78
2246 11:05:33.734948 === u2Vref_new: 0x5e --> 0x7a
2247 11:05:33.737900 === u2Vref_new: 0x60 --> 0x90
2248 11:05:33.741303 [CA 0] Center 38 (14~63) winsize 50
2249 11:05:33.744764 [CA 1] Center 37 (11~63) winsize 53
2250 11:05:33.747982 [CA 2] Center 34 (6~63) winsize 58
2251 11:05:33.751555 [CA 3] Center 35 (7~63) winsize 57
2252 11:05:33.754918 [CA 4] Center 34 (6~63) winsize 58
2253 11:05:33.755316 [CA 5] Center 28 (-2~59) winsize 62
2254 11:05:33.758445
2255 11:05:33.761527 [CATrainingPosCal] consider 1 rank data
2256 11:05:33.761915 u2DelayCellTimex100 = 735/100 ps
2257 11:05:33.768398 CA0 delay=38 (14~63),Diff = 10 PI (13 cell)
2258 11:05:33.771538 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2259 11:05:33.775129 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2260 11:05:33.778735 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2261 11:05:33.781799 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2262 11:05:33.784913 CA5 delay=28 (-2~59),Diff = 0 PI (0 cell)
2263 11:05:33.785302
2264 11:05:33.788841 CA PerBit enable=1, Macro0, CA PI delay=28
2265 11:05:33.792093 === u2Vref_new: 0x5c --> 0x78
2266 11:05:33.792598
2267 11:05:33.795325 Vref(ca) range 1: 28
2268 11:05:33.795697
2269 11:05:33.795991 CS Dly= 10 (41-0-32)
2270 11:05:33.798546 Write Rank0 MR13 =0xd8
2271 11:05:33.802070 Write Rank0 MR13 =0xd8
2272 11:05:33.802447 Write Rank0 MR12 =0x5c
2273 11:05:33.805170 Write Rank1 MR13 =0x59
2274 11:05:33.805542 ==
2275 11:05:33.808527 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2276 11:05:33.811703 fsp= 1, odt_onoff= 1, Byte mode= 0
2277 11:05:33.812124 ==
2278 11:05:33.814984 === u2Vref_new: 0x56 --> 0x3a
2279 11:05:33.818594 === u2Vref_new: 0x58 --> 0x58
2280 11:05:33.821803 === u2Vref_new: 0x5a --> 0x5a
2281 11:05:33.825403 === u2Vref_new: 0x5c --> 0x78
2282 11:05:33.829011 === u2Vref_new: 0x5e --> 0x7a
2283 11:05:33.831913 === u2Vref_new: 0x60 --> 0x90
2284 11:05:33.834944 [CA 0] Center 37 (12~63) winsize 52
2285 11:05:33.838725 [CA 1] Center 37 (12~63) winsize 52
2286 11:05:33.841985 [CA 2] Center 34 (6~63) winsize 58
2287 11:05:33.845807 [CA 3] Center 34 (6~63) winsize 58
2288 11:05:33.848848 [CA 4] Center 34 (6~63) winsize 58
2289 11:05:33.852166 [CA 5] Center 27 (-3~57) winsize 61
2290 11:05:33.852571
2291 11:05:33.855394 [CATrainingPosCal] consider 2 rank data
2292 11:05:33.858820 u2DelayCellTimex100 = 735/100 ps
2293 11:05:33.861853 CA0 delay=38 (14~63),Diff = 11 PI (14 cell)
2294 11:05:33.865401 CA1 delay=37 (12~63),Diff = 10 PI (13 cell)
2295 11:05:33.869012 CA2 delay=34 (6~63),Diff = 7 PI (9 cell)
2296 11:05:33.872236 CA3 delay=35 (7~63),Diff = 8 PI (10 cell)
2297 11:05:33.875729 CA4 delay=34 (6~63),Diff = 7 PI (9 cell)
2298 11:05:33.879042 CA5 delay=27 (-2~57),Diff = 0 PI (0 cell)
2299 11:05:33.879497
2300 11:05:33.882277 CA PerBit enable=1, Macro0, CA PI delay=27
2301 11:05:33.885816 === u2Vref_new: 0x60 --> 0x90
2302 11:05:33.886267
2303 11:05:33.888981 Vref(ca) range 1: 32
2304 11:05:33.889360
2305 11:05:33.889656 CS Dly= 11 (42-0-32)
2306 11:05:33.892389 Write Rank1 MR13 =0xd8
2307 11:05:33.895657 Write Rank1 MR13 =0xd8
2308 11:05:33.896106 Write Rank1 MR12 =0x60
2309 11:05:33.898907 [RankSwap] Rank num 2, (Multi 1), Rank 0
2310 11:05:33.902696 Write Rank0 MR2 =0xad
2311 11:05:33.903154 [Write Leveling]
2312 11:05:33.906008 delay byte0 byte1 byte2 byte3
2313 11:05:33.906463
2314 11:05:33.908952 10 0 0
2315 11:05:33.909333 11 0 0
2316 11:05:33.912527 12 0 0
2317 11:05:33.912992 13 0 0
2318 11:05:33.913297 14 0 0
2319 11:05:33.915705 15 0 0
2320 11:05:33.916084 16 0 0
2321 11:05:33.918893 17 0 0
2322 11:05:33.919271 18 0 0
2323 11:05:33.919562 19 0 0
2324 11:05:33.922519 20 0 0
2325 11:05:33.922988 21 0 0
2326 11:05:33.925747 22 0 0
2327 11:05:33.926126 23 0 0
2328 11:05:33.929157 24 0 ff
2329 11:05:33.929538 25 0 ff
2330 11:05:33.929834 26 0 ff
2331 11:05:33.932395 27 0 ff
2332 11:05:33.932875 28 0 ff
2333 11:05:33.935772 29 0 ff
2334 11:05:33.936154 30 0 ff
2335 11:05:33.938988 31 0 ff
2336 11:05:33.939377 32 0 ff
2337 11:05:33.942653 33 ff ff
2338 11:05:33.943047 34 ff ff
2339 11:05:33.943346 35 ff ff
2340 11:05:33.946057 36 ff ff
2341 11:05:33.946599 37 ff ff
2342 11:05:33.949355 38 ff ff
2343 11:05:33.949734 39 ff ff
2344 11:05:33.956099 pass bytecount = 0xff (0xff: all bytes pass)
2345 11:05:33.956621
2346 11:05:33.956926 DQS0 dly: 33
2347 11:05:33.957247 DQS1 dly: 24
2348 11:05:33.959577 Write Rank0 MR2 =0x2d
2349 11:05:33.962519 [RankSwap] Rank num 2, (Multi 1), Rank 0
2350 11:05:33.966110 Write Rank0 MR1 =0xd6
2351 11:05:33.966509 [Gating]
2352 11:05:33.966802 ==
2353 11:05:33.969000 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2354 11:05:33.972629 fsp= 1, odt_onoff= 1, Byte mode= 0
2355 11:05:33.973034 ==
2356 11:05:33.979484 3 1 0 |3535 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2357 11:05:33.983095 3 1 4 |1918 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2358 11:05:33.986989 3 1 8 |2323 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2359 11:05:33.992990 3 1 12 |3535 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2360 11:05:33.995933 3 1 16 |3635 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2361 11:05:33.999286 3 1 20 |3635 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2362 11:05:34.006199 3 1 24 |1414 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2363 11:05:34.009127 3 1 28 |3535 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2364 11:05:34.012805 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2365 11:05:34.016692 3 2 4 |2626 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2366 11:05:34.023065 3 2 8 |3333 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2367 11:05:34.026525 3 2 12 |3434 2c2b |(1 1)(11 11) |(0 1)(1 0)| 0
2368 11:05:34.029712 3 2 16 |2d2d 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2369 11:05:34.035977 3 2 20 |3e3d 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2370 11:05:34.039763 3 2 24 |3d3c 302 |(11 11)(11 11) |(1 1)(0 0)| 0
2371 11:05:34.043322 3 2 28 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2372 11:05:34.046469 3 3 0 |3c3b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2373 11:05:34.053227 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2374 11:05:34.056390 3 3 8 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2375 11:05:34.059725 3 3 12 |3c3b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2376 11:05:34.066600 3 3 16 |909 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2377 11:05:34.069924 3 3 20 |403 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2378 11:05:34.073392 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2379 11:05:34.076373 [Byte 0] Lead/lag falling Transition (3, 3, 24)
2380 11:05:34.083627 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2381 11:05:34.086589 [Byte 1] Lead/lag Transition tap number (1)
2382 11:05:34.089674 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2383 11:05:34.096382 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2384 11:05:34.099891 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2385 11:05:34.103260 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2386 11:05:34.106486 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2387 11:05:34.113422 3 4 20 |3838 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2388 11:05:34.116839 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2389 11:05:34.120007 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2390 11:05:34.126511 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2391 11:05:34.129635 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2392 11:05:34.133480 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2393 11:05:34.139919 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2394 11:05:34.143354 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2395 11:05:34.146660 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2396 11:05:34.153777 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2397 11:05:34.156611 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2398 11:05:34.159796 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2399 11:05:34.163074 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2400 11:05:34.169858 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2401 11:05:34.173095 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2402 11:05:34.176339 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2403 11:05:34.183475 [Byte 0] Lead/lag Transition tap number (2)
2404 11:05:34.186532 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2405 11:05:34.190113 [Byte 1] Lead/lag falling Transition (3, 6, 16)
2406 11:05:34.193135 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2407 11:05:34.200147 [Byte 1] Lead/lag Transition tap number (2)
2408 11:05:34.203323 3 6 24 |4646 403 |(0 0)(11 11) |(0 0)(0 0)| 0
2409 11:05:34.206388 [Byte 0]First pass (3, 6, 24)
2410 11:05:34.209373 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2411 11:05:34.212443 [Byte 1]First pass (3, 6, 28)
2412 11:05:34.215752 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2413 11:05:34.219479 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2414 11:05:34.222785 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2415 11:05:34.226493 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2416 11:05:34.232607 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2417 11:05:34.236169 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2418 11:05:34.239483 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2419 11:05:34.242736 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2420 11:05:34.246069 All bytes gating window > 1UI, Early break!
2421 11:05:34.246335
2422 11:05:34.252365 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
2423 11:05:34.252581
2424 11:05:34.255681 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
2425 11:05:34.255942
2426 11:05:34.256150
2427 11:05:34.256328
2428 11:05:34.259431 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
2429 11:05:34.259626
2430 11:05:34.262926 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2431 11:05:34.263097
2432 11:05:34.263223
2433 11:05:34.265975 Write Rank0 MR1 =0x56
2434 11:05:34.266137
2435 11:05:34.268934 best RODT dly(2T, 0.5T) = (2, 3)
2436 11:05:34.269097
2437 11:05:34.272762 best RODT dly(2T, 0.5T) = (2, 3)
2438 11:05:34.272926 ==
2439 11:05:34.275882 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2440 11:05:34.279227 fsp= 1, odt_onoff= 1, Byte mode= 0
2441 11:05:34.279400 ==
2442 11:05:34.286069 Start DQ dly to find pass range UseTestEngine =0
2443 11:05:34.289419 x-axis: bit #, y-axis: DQ dly (-127~63)
2444 11:05:34.289724 RX Vref Scan = 0
2445 11:05:34.292591 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2446 11:05:34.295967 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2447 11:05:34.299502 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2448 11:05:34.302671 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2449 11:05:34.306547 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2450 11:05:34.309393 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2451 11:05:34.309861 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2452 11:05:34.312408 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2453 11:05:34.316020 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2454 11:05:34.319105 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2455 11:05:34.322630 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2456 11:05:34.326353 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2457 11:05:34.329135 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2458 11:05:34.332435 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2459 11:05:34.335893 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2460 11:05:34.336280 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2461 11:05:34.339285 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2462 11:05:34.342591 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2463 11:05:34.346293 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2464 11:05:34.349213 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2465 11:05:34.352352 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2466 11:05:34.355698 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2467 11:05:34.356084 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2468 11:05:34.359342 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2469 11:05:34.362406 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2470 11:05:34.365833 -1, [0] xxxoxxxx xoxxxxxo [MSB]
2471 11:05:34.369233 0, [0] xxxoxxxx ooxxxxxo [MSB]
2472 11:05:34.372385 1, [0] xxooxxxx ooxxxxxo [MSB]
2473 11:05:34.375769 2, [0] xxooxxxx ooxxxxxo [MSB]
2474 11:05:34.376173 3, [0] xxooxxxx oooxxxxo [MSB]
2475 11:05:34.378858 4, [0] oxooxxxo oooxxxxo [MSB]
2476 11:05:34.382367 5, [0] oooooxoo ooooooxo [MSB]
2477 11:05:34.386133 32, [0] oooooooo ooooooox [MSB]
2478 11:05:34.389229 33, [0] oooooooo ooooooox [MSB]
2479 11:05:34.392214 34, [0] oooooooo ooooooox [MSB]
2480 11:05:34.392680 35, [0] oooxoooo xxooooox [MSB]
2481 11:05:34.395656 36, [0] oooxoooo xxooooox [MSB]
2482 11:05:34.398749 37, [0] ooxxoooo xxooooox [MSB]
2483 11:05:34.402698 38, [0] ooxxoooo xxooooox [MSB]
2484 11:05:34.405774 39, [0] ooxxooox xxooooox [MSB]
2485 11:05:34.408997 40, [0] oxxxxoox xxxoooox [MSB]
2486 11:05:34.412099 41, [0] oxxxxoox xxxxxxox [MSB]
2487 11:05:34.412608 42, [0] xxxxxxxx xxxxxxxx [MSB]
2488 11:05:34.415891 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
2489 11:05:34.422091 iDelay=42, Bit 1, Center 22 (5 ~ 39) 35
2490 11:05:34.425604 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
2491 11:05:34.429001 iDelay=42, Bit 3, Center 16 (-1 ~ 34) 36
2492 11:05:34.431962 iDelay=42, Bit 4, Center 22 (5 ~ 39) 35
2493 11:05:34.435305 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
2494 11:05:34.438738 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
2495 11:05:34.442435 iDelay=42, Bit 7, Center 21 (4 ~ 38) 35
2496 11:05:34.445357 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
2497 11:05:34.449029 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
2498 11:05:34.452028 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
2499 11:05:34.455601 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
2500 11:05:34.458509 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
2501 11:05:34.462047 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
2502 11:05:34.468729 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
2503 11:05:34.471987 iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36
2504 11:05:34.472610 ==
2505 11:05:34.475421 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2506 11:05:34.478653 fsp= 1, odt_onoff= 1, Byte mode= 0
2507 11:05:34.479039 ==
2508 11:05:34.482015 DQS Delay:
2509 11:05:34.482392 DQS0 = 0, DQS1 = 0
2510 11:05:34.482754 DQM Delay:
2511 11:05:34.485245 DQM0 = 20, DQM1 = 19
2512 11:05:34.485624 DQ Delay:
2513 11:05:34.488933 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16
2514 11:05:34.491993 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =21
2515 11:05:34.495323 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
2516 11:05:34.498390 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =13
2517 11:05:34.498784
2518 11:05:34.499079
2519 11:05:34.502319 DramC Write-DBI off
2520 11:05:34.502785 ==
2521 11:05:34.505397 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2522 11:05:34.508531 fsp= 1, odt_onoff= 1, Byte mode= 0
2523 11:05:34.509037 ==
2524 11:05:34.515291 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2525 11:05:34.515778
2526 11:05:34.518533 Begin, DQ Scan Range 920~1176
2527 11:05:34.519029
2528 11:05:34.519480
2529 11:05:34.519818 TX Vref Scan disable
2530 11:05:34.521954 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
2531 11:05:34.525557 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2532 11:05:34.528687 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2533 11:05:34.535419 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2534 11:05:34.538783 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2535 11:05:34.541915 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2536 11:05:34.545233 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2537 11:05:34.548732 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2538 11:05:34.552097 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2539 11:05:34.555275 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2540 11:05:34.558793 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2541 11:05:34.561896 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2542 11:05:34.565372 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2543 11:05:34.568551 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2544 11:05:34.571716 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2545 11:05:34.574897 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2546 11:05:34.578359 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2547 11:05:34.581757 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2548 11:05:34.585026 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2549 11:05:34.591904 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2550 11:05:34.595144 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2551 11:05:34.598328 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2552 11:05:34.601995 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2553 11:05:34.605068 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2554 11:05:34.608385 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2555 11:05:34.612052 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2556 11:05:34.615181 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2557 11:05:34.618593 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2558 11:05:34.621704 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2559 11:05:34.625269 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2560 11:05:34.628979 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2561 11:05:34.631732 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2562 11:05:34.635655 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2563 11:05:34.638240 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2564 11:05:34.641644 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2565 11:05:34.645102 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2566 11:05:34.648851 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2567 11:05:34.655011 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2568 11:05:34.658530 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2569 11:05:34.661528 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2570 11:05:34.665044 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2571 11:05:34.668263 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2572 11:05:34.671602 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2573 11:05:34.675305 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2574 11:05:34.678302 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2575 11:05:34.681609 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2576 11:05:34.684889 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2577 11:05:34.688753 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2578 11:05:34.691494 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2579 11:05:34.694594 969 |3 6 9|[0] xxxxxxxx xxxxxxxo [MSB]
2580 11:05:34.698160 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2581 11:05:34.701725 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
2582 11:05:34.704792 972 |3 6 12|[0] xxxxxxxx oooxoxoo [MSB]
2583 11:05:34.708307 973 |3 6 13|[0] xxxxxxxx oooooxoo [MSB]
2584 11:05:34.711530 974 |3 6 14|[0] xxxxxxxx oooooxoo [MSB]
2585 11:05:34.714716 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2586 11:05:34.721252 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2587 11:05:34.724909 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2588 11:05:34.728221 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2589 11:05:34.731488 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2590 11:05:34.734641 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2591 11:05:34.738364 981 |3 6 21|[0] xxxxxxxo oooooooo [MSB]
2592 11:05:34.741122 986 |3 6 26|[0] oooooooo ooooooox [MSB]
2593 11:05:34.744750 987 |3 6 27|[0] oooooooo ooooooox [MSB]
2594 11:05:34.748255 988 |3 6 28|[0] oooooooo oxooooox [MSB]
2595 11:05:34.751517 989 |3 6 29|[0] oooooooo xxooooox [MSB]
2596 11:05:34.754898 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
2597 11:05:34.758030 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2598 11:05:34.764639 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2599 11:05:34.768115 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2600 11:05:34.771723 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2601 11:05:34.774929 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2602 11:05:34.777906 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2603 11:05:34.781203 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2604 11:05:34.784724 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2605 11:05:34.787800 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2606 11:05:34.791088 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2607 11:05:34.794388 1001 |3 6 41|[0] ooxxooox xxxxxxxx [MSB]
2608 11:05:34.797594 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2609 11:05:34.800845 Byte0, DQ PI dly=990, DQM PI dly= 990
2610 11:05:34.807647 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2611 11:05:34.808035
2612 11:05:34.811017 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2613 11:05:34.811547
2614 11:05:34.814522 Byte1, DQ PI dly=979, DQM PI dly= 979
2615 11:05:34.817837 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2616 11:05:34.818222
2617 11:05:34.824286 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2618 11:05:34.824710
2619 11:05:34.825009 ==
2620 11:05:34.827354 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2621 11:05:34.831147 fsp= 1, odt_onoff= 1, Byte mode= 0
2622 11:05:34.831535 ==
2623 11:05:34.837539 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2624 11:05:34.837939
2625 11:05:34.838237 Begin, DQ Scan Range 955~1019
2626 11:05:34.840846 Write Rank0 MR14 =0x0
2627 11:05:34.850111
2628 11:05:34.850577 CH=1, VrefRange= 0, VrefLevel = 0
2629 11:05:34.856360 TX Bit0 (984~999) 16 991, Bit8 (973~984) 12 978,
2630 11:05:34.859648 TX Bit1 (983~996) 14 989, Bit9 (974~983) 10 978,
2631 11:05:34.866557 TX Bit2 (981~995) 15 988, Bit10 (975~986) 12 980,
2632 11:05:34.869571 TX Bit3 (979~992) 14 985, Bit11 (976~986) 11 981,
2633 11:05:34.872780 TX Bit4 (983~998) 16 990, Bit12 (975~987) 13 981,
2634 11:05:34.879699 TX Bit5 (985~998) 14 991, Bit13 (977~987) 11 982,
2635 11:05:34.882770 TX Bit6 (984~996) 13 990, Bit14 (975~986) 12 980,
2636 11:05:34.886627 TX Bit7 (983~995) 13 989, Bit15 (969~979) 11 974,
2637 11:05:34.889568
2638 11:05:34.889954 Write Rank0 MR14 =0x2
2639 11:05:34.899209
2640 11:05:34.899670 CH=1, VrefRange= 0, VrefLevel = 2
2641 11:05:34.905743 TX Bit0 (984~1000) 17 992, Bit8 (972~984) 13 978,
2642 11:05:34.908923 TX Bit1 (983~997) 15 990, Bit9 (974~983) 10 978,
2643 11:05:34.915349 TX Bit2 (981~996) 16 988, Bit10 (975~986) 12 980,
2644 11:05:34.918556 TX Bit3 (979~993) 15 986, Bit11 (976~988) 13 982,
2645 11:05:34.922652 TX Bit4 (983~998) 16 990, Bit12 (975~988) 14 981,
2646 11:05:34.929040 TX Bit5 (984~999) 16 991, Bit13 (976~988) 13 982,
2647 11:05:34.932590 TX Bit6 (983~998) 16 990, Bit14 (975~986) 12 980,
2648 11:05:34.935873 TX Bit7 (983~997) 15 990, Bit15 (969~980) 12 974,
2649 11:05:34.936338
2650 11:05:34.938585 Write Rank0 MR14 =0x4
2651 11:05:34.948232
2652 11:05:34.948782 CH=1, VrefRange= 0, VrefLevel = 4
2653 11:05:34.954695 TX Bit0 (983~1000) 18 991, Bit8 (972~985) 14 978,
2654 11:05:34.957932 TX Bit1 (982~998) 17 990, Bit9 (973~984) 12 978,
2655 11:05:34.964557 TX Bit2 (980~997) 18 988, Bit10 (975~988) 14 981,
2656 11:05:34.968429 TX Bit3 (979~993) 15 986, Bit11 (975~989) 15 982,
2657 11:05:34.971575 TX Bit4 (982~999) 18 990, Bit12 (975~989) 15 982,
2658 11:05:34.978230 TX Bit5 (984~999) 16 991, Bit13 (976~989) 14 982,
2659 11:05:34.981237 TX Bit6 (983~999) 17 991, Bit14 (974~987) 14 980,
2660 11:05:34.984593 TX Bit7 (982~998) 17 990, Bit15 (969~981) 13 975,
2661 11:05:34.984984
2662 11:05:34.987805 Write Rank0 MR14 =0x6
2663 11:05:34.997234
2664 11:05:34.997691 CH=1, VrefRange= 0, VrefLevel = 6
2665 11:05:35.004013 TX Bit0 (983~1000) 18 991, Bit8 (972~985) 14 978,
2666 11:05:35.007069 TX Bit1 (982~998) 17 990, Bit9 (972~984) 13 978,
2667 11:05:35.013752 TX Bit2 (980~997) 18 988, Bit10 (975~988) 14 981,
2668 11:05:35.017043 TX Bit3 (978~994) 17 986, Bit11 (975~989) 15 982,
2669 11:05:35.020408 TX Bit4 (982~999) 18 990, Bit12 (974~990) 17 982,
2670 11:05:35.027417 TX Bit5 (984~999) 16 991, Bit13 (976~990) 15 983,
2671 11:05:35.030403 TX Bit6 (982~999) 18 990, Bit14 (974~988) 15 981,
2672 11:05:35.033831 TX Bit7 (982~998) 17 990, Bit15 (969~983) 15 976,
2673 11:05:35.037162
2674 11:05:35.037686 Write Rank0 MR14 =0x8
2675 11:05:35.046172
2676 11:05:35.046673 CH=1, VrefRange= 0, VrefLevel = 8
2677 11:05:35.052938 TX Bit0 (983~1000) 18 991, Bit8 (971~986) 16 978,
2678 11:05:35.055964 TX Bit1 (982~998) 17 990, Bit9 (971~984) 14 977,
2679 11:05:35.063089 TX Bit2 (979~998) 20 988, Bit10 (974~989) 16 981,
2680 11:05:35.066383 TX Bit3 (978~995) 18 986, Bit11 (976~990) 15 983,
2681 11:05:35.070145 TX Bit4 (981~999) 19 990, Bit12 (975~991) 17 983,
2682 11:05:35.076130 TX Bit5 (984~1000) 17 992, Bit13 (976~991) 16 983,
2683 11:05:35.079906 TX Bit6 (982~999) 18 990, Bit14 (973~989) 17 981,
2684 11:05:35.082905 TX Bit7 (982~999) 18 990, Bit15 (968~983) 16 975,
2685 11:05:35.086358
2686 11:05:35.089465 wait MRW command Rank0 MR14 =0xa fired (1)
2687 11:05:35.089971 Write Rank0 MR14 =0xa
2688 11:05:35.099427
2689 11:05:35.099815 CH=1, VrefRange= 0, VrefLevel = 10
2690 11:05:35.105858 TX Bit0 (983~1001) 19 992, Bit8 (971~986) 16 978,
2691 11:05:35.109472 TX Bit1 (981~999) 19 990, Bit9 (971~985) 15 978,
2692 11:05:35.116189 TX Bit2 (979~999) 21 989, Bit10 (974~990) 17 982,
2693 11:05:35.119509 TX Bit3 (978~995) 18 986, Bit11 (974~990) 17 982,
2694 11:05:35.122840 TX Bit4 (981~1000) 20 990, Bit12 (974~991) 18 982,
2695 11:05:35.129316 TX Bit5 (983~1000) 18 991, Bit13 (975~991) 17 983,
2696 11:05:35.132907 TX Bit6 (982~1000) 19 991, Bit14 (973~990) 18 981,
2697 11:05:35.139224 TX Bit7 (982~999) 18 990, Bit15 (968~984) 17 976,
2698 11:05:35.139620
2699 11:05:35.139923 Write Rank0 MR14 =0xc
2700 11:05:35.148773
2701 11:05:35.152352 CH=1, VrefRange= 0, VrefLevel = 12
2702 11:05:35.155671 TX Bit0 (982~1001) 20 991, Bit8 (970~987) 18 978,
2703 11:05:35.158733 TX Bit1 (980~1000) 21 990, Bit9 (971~985) 15 978,
2704 11:05:35.165292 TX Bit2 (979~999) 21 989, Bit10 (973~991) 19 982,
2705 11:05:35.168809 TX Bit3 (977~997) 21 987, Bit11 (975~991) 17 983,
2706 11:05:35.171850 TX Bit4 (981~1000) 20 990, Bit12 (973~992) 20 982,
2707 11:05:35.178823 TX Bit5 (983~1001) 19 992, Bit13 (975~991) 17 983,
2708 11:05:35.182404 TX Bit6 (981~1000) 20 990, Bit14 (972~991) 20 981,
2709 11:05:35.188713 TX Bit7 (982~999) 18 990, Bit15 (968~984) 17 976,
2710 11:05:35.189126
2711 11:05:35.189430 Write Rank0 MR14 =0xe
2712 11:05:35.199117
2713 11:05:35.202329 CH=1, VrefRange= 0, VrefLevel = 14
2714 11:05:35.205482 TX Bit0 (982~1002) 21 992, Bit8 (970~988) 19 979,
2715 11:05:35.208648 TX Bit1 (980~1000) 21 990, Bit9 (970~986) 17 978,
2716 11:05:35.215192 TX Bit2 (978~1000) 23 989, Bit10 (972~991) 20 981,
2717 11:05:35.218735 TX Bit3 (977~997) 21 987, Bit11 (973~991) 19 982,
2718 11:05:35.222192 TX Bit4 (980~1001) 22 990, Bit12 (973~992) 20 982,
2719 11:05:35.228551 TX Bit5 (983~1001) 19 992, Bit13 (975~992) 18 983,
2720 11:05:35.232167 TX Bit6 (981~1001) 21 991, Bit14 (972~991) 20 981,
2721 11:05:35.239178 TX Bit7 (981~1000) 20 990, Bit15 (968~985) 18 976,
2722 11:05:35.239669
2723 11:05:35.239972 Write Rank0 MR14 =0x10
2724 11:05:35.249413
2725 11:05:35.252513 CH=1, VrefRange= 0, VrefLevel = 16
2726 11:05:35.256141 TX Bit0 (982~1003) 22 992, Bit8 (970~988) 19 979,
2727 11:05:35.259077 TX Bit1 (979~1000) 22 989, Bit9 (970~986) 17 978,
2728 11:05:35.265587 TX Bit2 (978~1000) 23 989, Bit10 (972~991) 20 981,
2729 11:05:35.268760 TX Bit3 (977~997) 21 987, Bit11 (973~992) 20 982,
2730 11:05:35.271882 TX Bit4 (980~1001) 22 990, Bit12 (973~992) 20 982,
2731 11:05:35.278615 TX Bit5 (983~1002) 20 992, Bit13 (975~992) 18 983,
2732 11:05:35.282294 TX Bit6 (980~1001) 22 990, Bit14 (972~992) 21 982,
2733 11:05:35.288788 TX Bit7 (980~1000) 21 990, Bit15 (967~985) 19 976,
2734 11:05:35.289175
2735 11:05:35.289474 Write Rank0 MR14 =0x12
2736 11:05:35.299074
2737 11:05:35.299454 CH=1, VrefRange= 0, VrefLevel = 18
2738 11:05:35.305709 TX Bit0 (981~1003) 23 992, Bit8 (969~989) 21 979,
2739 11:05:35.309404 TX Bit1 (979~1001) 23 990, Bit9 (969~987) 19 978,
2740 11:05:35.315951 TX Bit2 (978~1000) 23 989, Bit10 (972~992) 21 982,
2741 11:05:35.319327 TX Bit3 (977~998) 22 987, Bit11 (973~992) 20 982,
2742 11:05:35.322408 TX Bit4 (980~1002) 23 991, Bit12 (972~993) 22 982,
2743 11:05:35.328999 TX Bit5 (982~1002) 21 992, Bit13 (974~992) 19 983,
2744 11:05:35.332366 TX Bit6 (980~1001) 22 990, Bit14 (972~992) 21 982,
2745 11:05:35.339783 TX Bit7 (980~1001) 22 990, Bit15 (967~985) 19 976,
2746 11:05:35.340264
2747 11:05:35.340628 Write Rank0 MR14 =0x14
2748 11:05:35.349983
2749 11:05:35.352907 CH=1, VrefRange= 0, VrefLevel = 20
2750 11:05:35.357139 TX Bit0 (981~1003) 23 992, Bit8 (969~989) 21 979,
2751 11:05:35.360195 TX Bit1 (979~1001) 23 990, Bit9 (969~987) 19 978,
2752 11:05:35.366908 TX Bit2 (978~1000) 23 989, Bit10 (972~992) 21 982,
2753 11:05:35.369435 TX Bit3 (977~998) 22 987, Bit11 (973~992) 20 982,
2754 11:05:35.373204 TX Bit4 (980~1002) 23 991, Bit12 (972~993) 22 982,
2755 11:05:35.379511 TX Bit5 (982~1002) 21 992, Bit13 (974~992) 19 983,
2756 11:05:35.382785 TX Bit6 (980~1001) 22 990, Bit14 (972~992) 21 982,
2757 11:05:35.389389 TX Bit7 (980~1001) 22 990, Bit15 (967~985) 19 976,
2758 11:05:35.389847
2759 11:05:35.390145 Write Rank0 MR14 =0x16
2760 11:05:35.400042
2761 11:05:35.403299 CH=1, VrefRange= 0, VrefLevel = 22
2762 11:05:35.406590 TX Bit0 (981~1004) 24 992, Bit8 (969~990) 22 979,
2763 11:05:35.409976 TX Bit1 (978~1002) 25 990, Bit9 (969~988) 20 978,
2764 11:05:35.416568 TX Bit2 (978~1001) 24 989, Bit10 (971~992) 22 981,
2765 11:05:35.419958 TX Bit3 (977~999) 23 988, Bit11 (972~993) 22 982,
2766 11:05:35.423732 TX Bit4 (979~1002) 24 990, Bit12 (971~993) 23 982,
2767 11:05:35.430012 TX Bit5 (982~1002) 21 992, Bit13 (974~993) 20 983,
2768 11:05:35.433126 TX Bit6 (979~1002) 24 990, Bit14 (971~993) 23 982,
2769 11:05:35.439960 TX Bit7 (979~1001) 23 990, Bit15 (967~986) 20 976,
2770 11:05:35.440428
2771 11:05:35.440767 Write Rank0 MR14 =0x18
2772 11:05:35.451080
2773 11:05:35.454050 CH=1, VrefRange= 0, VrefLevel = 24
2774 11:05:35.457671 TX Bit0 (980~1004) 25 992, Bit8 (969~991) 23 980,
2775 11:05:35.461108 TX Bit1 (978~1002) 25 990, Bit9 (969~989) 21 979,
2776 11:05:35.467632 TX Bit2 (977~1001) 25 989, Bit10 (971~992) 22 981,
2777 11:05:35.471042 TX Bit3 (977~999) 23 988, Bit11 (971~993) 23 982,
2778 11:05:35.474114 TX Bit4 (978~1002) 25 990, Bit12 (971~994) 24 982,
2779 11:05:35.480272 TX Bit5 (981~1004) 24 992, Bit13 (974~993) 20 983,
2780 11:05:35.483898 TX Bit6 (980~1002) 23 991, Bit14 (970~993) 24 981,
2781 11:05:35.490548 TX Bit7 (979~1002) 24 990, Bit15 (966~987) 22 976,
2782 11:05:35.491049
2783 11:05:35.491380 Write Rank0 MR14 =0x1a
2784 11:05:35.501451
2785 11:05:35.504668 CH=1, VrefRange= 0, VrefLevel = 26
2786 11:05:35.508100 TX Bit0 (979~1006) 28 992, Bit8 (969~991) 23 980,
2787 11:05:35.511470 TX Bit1 (978~1003) 26 990, Bit9 (969~990) 22 979,
2788 11:05:35.518300 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2789 11:05:35.521029 TX Bit3 (976~1000) 25 988, Bit11 (971~993) 23 982,
2790 11:05:35.524826 TX Bit4 (978~1003) 26 990, Bit12 (970~994) 25 982,
2791 11:05:35.530868 TX Bit5 (980~1004) 25 992, Bit13 (974~994) 21 984,
2792 11:05:35.534892 TX Bit6 (979~1003) 25 991, Bit14 (970~993) 24 981,
2793 11:05:35.541113 TX Bit7 (979~1002) 24 990, Bit15 (966~987) 22 976,
2794 11:05:35.541608
2795 11:05:35.541942 Write Rank0 MR14 =0x1c
2796 11:05:35.551953
2797 11:05:35.555398 CH=1, VrefRange= 0, VrefLevel = 28
2798 11:05:35.558454 TX Bit0 (979~1006) 28 992, Bit8 (969~991) 23 980,
2799 11:05:35.561883 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
2800 11:05:35.568926 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2801 11:05:35.572557 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2802 11:05:35.576031 TX Bit4 (978~1003) 26 990, Bit12 (970~994) 25 982,
2803 11:05:35.582116 TX Bit5 (980~1004) 25 992, Bit13 (972~994) 23 983,
2804 11:05:35.585428 TX Bit6 (979~1004) 26 991, Bit14 (970~994) 25 982,
2805 11:05:35.592237 TX Bit7 (979~1003) 25 991, Bit15 (966~987) 22 976,
2806 11:05:35.592661
2807 11:05:35.592964 Write Rank0 MR14 =0x1e
2808 11:05:35.602846
2809 11:05:35.606365 CH=1, VrefRange= 0, VrefLevel = 30
2810 11:05:35.609691 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2811 11:05:35.612767 TX Bit1 (978~1003) 26 990, Bit9 (969~990) 22 979,
2812 11:05:35.619729 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2813 11:05:35.623025 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2814 11:05:35.626373 TX Bit4 (979~1004) 26 991, Bit12 (970~994) 25 982,
2815 11:05:35.632556 TX Bit5 (980~1005) 26 992, Bit13 (971~994) 24 982,
2816 11:05:35.636249 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
2817 11:05:35.642471 TX Bit7 (978~1003) 26 990, Bit15 (965~987) 23 976,
2818 11:05:35.642860
2819 11:05:35.643156 Write Rank0 MR14 =0x20
2820 11:05:35.654042
2821 11:05:35.657129 CH=1, VrefRange= 0, VrefLevel = 32
2822 11:05:35.660336 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2823 11:05:35.663882 TX Bit1 (978~1004) 27 991, Bit9 (968~991) 24 979,
2824 11:05:35.670463 TX Bit2 (978~1001) 24 989, Bit10 (970~993) 24 981,
2825 11:05:35.673582 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2826 11:05:35.676733 TX Bit4 (979~1004) 26 991, Bit12 (970~994) 25 982,
2827 11:05:35.683235 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2828 11:05:35.686744 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
2829 11:05:35.693370 TX Bit7 (978~1004) 27 991, Bit15 (965~987) 23 976,
2830 11:05:35.693545
2831 11:05:35.693642 Write Rank0 MR14 =0x22
2832 11:05:35.704730
2833 11:05:35.707407 CH=1, VrefRange= 0, VrefLevel = 34
2834 11:05:35.711153 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2835 11:05:35.714147 TX Bit1 (978~1004) 27 991, Bit9 (968~991) 24 979,
2836 11:05:35.721077 TX Bit2 (978~1001) 24 989, Bit10 (970~993) 24 981,
2837 11:05:35.724537 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2838 11:05:35.727875 TX Bit4 (979~1004) 26 991, Bit12 (970~994) 25 982,
2839 11:05:35.734766 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2840 11:05:35.738890 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
2841 11:05:35.744260 TX Bit7 (978~1004) 27 991, Bit15 (965~987) 23 976,
2842 11:05:35.744713
2843 11:05:35.745012 Write Rank0 MR14 =0x24
2844 11:05:35.755194
2845 11:05:35.758385 CH=1, VrefRange= 0, VrefLevel = 36
2846 11:05:35.761724 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2847 11:05:35.765163 TX Bit1 (978~1004) 27 991, Bit9 (968~991) 24 979,
2848 11:05:35.771955 TX Bit2 (978~1001) 24 989, Bit10 (970~993) 24 981,
2849 11:05:35.775055 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2850 11:05:35.778350 TX Bit4 (979~1004) 26 991, Bit12 (970~994) 25 982,
2851 11:05:35.785026 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2852 11:05:35.788599 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
2853 11:05:35.795481 TX Bit7 (978~1004) 27 991, Bit15 (965~987) 23 976,
2854 11:05:35.796155
2855 11:05:35.796719 Write Rank0 MR14 =0x26
2856 11:05:35.805993
2857 11:05:35.809279 CH=1, VrefRange= 0, VrefLevel = 38
2858 11:05:35.812970 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2859 11:05:35.816127 TX Bit1 (978~1004) 27 991, Bit9 (968~991) 24 979,
2860 11:05:35.822911 TX Bit2 (978~1001) 24 989, Bit10 (970~993) 24 981,
2861 11:05:35.826543 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2862 11:05:35.829524 TX Bit4 (979~1004) 26 991, Bit12 (970~994) 25 982,
2863 11:05:35.836051 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2864 11:05:35.839538 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
2865 11:05:35.845817 TX Bit7 (978~1004) 27 991, Bit15 (965~987) 23 976,
2866 11:05:35.846197
2867 11:05:35.846487
2868 11:05:35.849641 TX Vref found, early break! 379< 383
2869 11:05:35.852578 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2870 11:05:35.855991 u1DelayCellOfst[0]=5 cells (4 PI)
2871 11:05:35.859374 u1DelayCellOfst[1]=3 cells (3 PI)
2872 11:05:35.862485 u1DelayCellOfst[2]=1 cells (1 PI)
2873 11:05:35.865686 u1DelayCellOfst[3]=0 cells (0 PI)
2874 11:05:35.869395 u1DelayCellOfst[4]=3 cells (3 PI)
2875 11:05:35.872738 u1DelayCellOfst[5]=6 cells (5 PI)
2876 11:05:35.873122 u1DelayCellOfst[6]=3 cells (3 PI)
2877 11:05:35.875863 u1DelayCellOfst[7]=3 cells (3 PI)
2878 11:05:35.879272 Byte0, DQ PI dly=988, DQM PI dly= 990
2879 11:05:35.885875 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2880 11:05:35.886316
2881 11:05:35.889045 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2882 11:05:35.889474
2883 11:05:35.892232 u1DelayCellOfst[8]=5 cells (4 PI)
2884 11:05:35.895791 u1DelayCellOfst[9]=3 cells (3 PI)
2885 11:05:35.898881 u1DelayCellOfst[10]=6 cells (5 PI)
2886 11:05:35.902414 u1DelayCellOfst[11]=7 cells (6 PI)
2887 11:05:35.905609 u1DelayCellOfst[12]=7 cells (6 PI)
2888 11:05:35.908974 u1DelayCellOfst[13]=9 cells (7 PI)
2889 11:05:35.912991 u1DelayCellOfst[14]=6 cells (5 PI)
2890 11:05:35.915821 u1DelayCellOfst[15]=0 cells (0 PI)
2891 11:05:35.919399 Byte1, DQ PI dly=976, DQM PI dly= 979
2892 11:05:35.922479 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2893 11:05:35.922861
2894 11:05:35.925913 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2895 11:05:35.926375
2896 11:05:35.929061 Write Rank0 MR14 =0x20
2897 11:05:35.929438
2898 11:05:35.932204 Final TX Range 0 Vref 32
2899 11:05:35.932615
2900 11:05:35.939519 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2901 11:05:35.940062
2902 11:05:35.945624 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2903 11:05:35.952584 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2904 11:05:35.959066 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2905 11:05:35.959533 Write Rank0 MR3 =0xb0
2906 11:05:35.962833 DramC Write-DBI on
2907 11:05:35.963303 ==
2908 11:05:35.965786 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2909 11:05:35.969086 fsp= 1, odt_onoff= 1, Byte mode= 0
2910 11:05:35.969558 ==
2911 11:05:35.975808 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2912 11:05:35.976274
2913 11:05:35.979332 Begin, DQ Scan Range 699~763
2914 11:05:35.979854
2915 11:05:35.980182
2916 11:05:35.980568 TX Vref Scan disable
2917 11:05:35.982270 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2918 11:05:35.985809 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2919 11:05:35.989093 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2920 11:05:35.995747 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2921 11:05:35.999046 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2922 11:05:36.002355 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2923 11:05:36.005623 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2924 11:05:36.009133 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2925 11:05:36.012157 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2926 11:05:36.015436 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2927 11:05:36.019176 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2928 11:05:36.022407 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2929 11:05:36.025099 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2930 11:05:36.028867 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2931 11:05:36.032301 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2932 11:05:36.035830 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2933 11:05:36.038824 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2934 11:05:36.042802 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2935 11:05:36.045288 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2936 11:05:36.048405 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2937 11:05:36.051697 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2938 11:05:36.055025 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2939 11:05:36.061783 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2940 11:05:36.065026 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2941 11:05:36.068497 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2942 11:05:36.072090 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2943 11:05:36.075497 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2944 11:05:36.081945 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2945 11:05:36.085501 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2946 11:05:36.088611 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2947 11:05:36.091833 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2948 11:05:36.095405 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2949 11:05:36.098498 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2950 11:05:36.101993 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2951 11:05:36.105414 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2952 11:05:36.109024 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2953 11:05:36.112171 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2954 11:05:36.115406 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2955 11:05:36.118740 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2956 11:05:36.122039 Byte0, DQ PI dly=736, DQM PI dly= 736
2957 11:05:36.125481 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
2958 11:05:36.128569
2959 11:05:36.131940 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
2960 11:05:36.132329
2961 11:05:36.135635 Byte1, DQ PI dly=724, DQM PI dly= 724
2962 11:05:36.138679 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2963 11:05:36.139102
2964 11:05:36.141922 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2965 11:05:36.145103
2966 11:05:36.149117 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2967 11:05:36.159104 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2968 11:05:36.165309 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2969 11:05:36.165777 Write Rank0 MR3 =0x30
2970 11:05:36.168513 DramC Write-DBI off
2971 11:05:36.168901
2972 11:05:36.169203 [DATLAT]
2973 11:05:36.172123 Freq=1600, CH1 RK0, use_rxtx_scan=0
2974 11:05:36.172549
2975 11:05:36.175315 DATLAT Default: 0xf
2976 11:05:36.175699 7, 0xFFFF, sum=0
2977 11:05:36.178391 8, 0xFFFF, sum=0
2978 11:05:36.178881 9, 0xFFFF, sum=0
2979 11:05:36.182122 10, 0xFFFF, sum=0
2980 11:05:36.182506 11, 0xFFFF, sum=0
2981 11:05:36.185349 12, 0xFFFF, sum=0
2982 11:05:36.185735 13, 0xFFFF, sum=0
2983 11:05:36.186032 14, 0x0, sum=1
2984 11:05:36.188318 15, 0x0, sum=2
2985 11:05:36.188732 16, 0x0, sum=3
2986 11:05:36.191975 17, 0x0, sum=4
2987 11:05:36.195315 pattern=2 first_step=14 total pass=5 best_step=16
2988 11:05:36.195695 ==
2989 11:05:36.201733 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2990 11:05:36.205590 fsp= 1, odt_onoff= 1, Byte mode= 0
2991 11:05:36.206054 ==
2992 11:05:36.208932 Start DQ dly to find pass range UseTestEngine =1
2993 11:05:36.211888 x-axis: bit #, y-axis: DQ dly (-127~63)
2994 11:05:36.212264 RX Vref Scan = 1
2995 11:05:36.320739
2996 11:05:36.321190 RX Vref found, early break!
2997 11:05:36.321487
2998 11:05:36.327420 Final RX Vref 11, apply to both rank0 and 1
2999 11:05:36.327879 ==
3000 11:05:36.331570 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3001 11:05:36.334870 fsp= 1, odt_onoff= 1, Byte mode= 0
3002 11:05:36.335333 ==
3003 11:05:36.335631 DQS Delay:
3004 11:05:36.337650 DQS0 = 0, DQS1 = 0
3005 11:05:36.338029 DQM Delay:
3006 11:05:36.340706 DQM0 = 20, DQM1 = 19
3007 11:05:36.341082 DQ Delay:
3008 11:05:36.344286 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16
3009 11:05:36.347250 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =20
3010 11:05:36.351121 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3011 11:05:36.354021 DQ12 =22, DQ13 =21, DQ14 =23, DQ15 =13
3012 11:05:36.354396
3013 11:05:36.354684
3014 11:05:36.354950
3015 11:05:36.357430 [DramC_TX_OE_Calibration] TA2
3016 11:05:36.361098 Original DQ_B0 (3 6) =30, OEN = 27
3017 11:05:36.364037 Original DQ_B1 (3 6) =30, OEN = 27
3018 11:05:36.367433 23, 0x0, End_B0=23 End_B1=23
3019 11:05:36.367864 24, 0x0, End_B0=24 End_B1=24
3020 11:05:36.371298 25, 0x0, End_B0=25 End_B1=25
3021 11:05:36.374330 26, 0x0, End_B0=26 End_B1=26
3022 11:05:36.377504 27, 0x0, End_B0=27 End_B1=27
3023 11:05:36.380845 28, 0x0, End_B0=28 End_B1=28
3024 11:05:36.381331 29, 0x0, End_B0=29 End_B1=29
3025 11:05:36.384078 30, 0x0, End_B0=30 End_B1=30
3026 11:05:36.387640 31, 0xFFFF, End_B0=30 End_B1=30
3027 11:05:36.393879 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3028 11:05:36.397322 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3029 11:05:36.397791
3030 11:05:36.398092
3031 11:05:36.400788 Write Rank0 MR23 =0x3f
3032 11:05:36.401191 [DQSOSC]
3033 11:05:36.410865 [DQSOSCAuto] RK0, (LSB)MR18= 0xbdbd, (MSB)MR19= 0x202, tDQSOscB0 = 449 ps tDQSOscB1 = 449 ps
3034 11:05:36.414233 CH1_RK0: MR19=0x202, MR18=0xBDBD, DQSOSC=449, MR23=63, INC=12, DEC=18
3035 11:05:36.417033 Write Rank0 MR23 =0x3f
3036 11:05:36.417422 [DQSOSC]
3037 11:05:36.427324 [DQSOSCAuto] RK0, (LSB)MR18= 0xc1c1, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
3038 11:05:36.430898 CH1 RK0: MR19=202, MR18=C1C1
3039 11:05:36.434122 [RankSwap] Rank num 2, (Multi 1), Rank 1
3040 11:05:36.434590 Write Rank0 MR2 =0xad
3041 11:05:36.437300 [Write Leveling]
3042 11:05:36.440537 delay byte0 byte1 byte2 byte3
3043 11:05:36.441025
3044 11:05:36.441336 10 0 0
3045 11:05:36.444131 11 0 0
3046 11:05:36.444659 12 0 0
3047 11:05:36.444971 13 0 0
3048 11:05:36.446749 14 0 0
3049 11:05:36.447140 15 0 0
3050 11:05:36.450394 16 0 0
3051 11:05:36.450785 17 0 0
3052 11:05:36.451090 18 0 0
3053 11:05:36.453879 19 0 0
3054 11:05:36.454352 20 0 0
3055 11:05:36.456769 21 0 0
3056 11:05:36.457250 22 0 0
3057 11:05:36.460378 23 0 ff
3058 11:05:36.460792 24 0 ff
3059 11:05:36.461091 25 0 ff
3060 11:05:36.463925 26 0 ff
3061 11:05:36.464389 27 0 ff
3062 11:05:36.467037 28 0 ff
3063 11:05:36.467504 29 0 ff
3064 11:05:36.471329 30 0 ff
3065 11:05:36.471789 31 0 ff
3066 11:05:36.473597 32 0 ff
3067 11:05:36.474026 33 0 ff
3068 11:05:36.474329 34 0 ff
3069 11:05:36.476566 35 ff ff
3070 11:05:36.476954 36 ff ff
3071 11:05:36.480651 37 ff ff
3072 11:05:36.481139 38 ff ff
3073 11:05:36.483698 39 ff ff
3074 11:05:36.484084 40 ff ff
3075 11:05:36.486857 41 ff ff
3076 11:05:36.490349 pass bytecount = 0xff (0xff: all bytes pass)
3077 11:05:36.490730
3078 11:05:36.491022 DQS0 dly: 35
3079 11:05:36.494049 DQS1 dly: 23
3080 11:05:36.494460 Write Rank0 MR2 =0x2d
3081 11:05:36.496542 [RankSwap] Rank num 2, (Multi 1), Rank 0
3082 11:05:36.499877 Write Rank1 MR1 =0xd6
3083 11:05:36.500254 [Gating]
3084 11:05:36.500578 ==
3085 11:05:36.506571 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3086 11:05:36.510089 fsp= 1, odt_onoff= 1, Byte mode= 0
3087 11:05:36.510467 ==
3088 11:05:36.513410 3 1 0 |3635 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3089 11:05:36.516687 3 1 4 |2524 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3090 11:05:36.523763 3 1 8 |3535 2c2b |(0 0)(11 11) |(1 1)(1 0)| 0
3091 11:05:36.526640 3 1 12 |1f1f 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3092 11:05:36.529977 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3093 11:05:36.536972 3 1 20 |1716 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3094 11:05:36.539897 3 1 24 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3095 11:05:36.543554 [Byte 0] Lead/lag falling Transition (3, 1, 24)
3096 11:05:36.549869 3 1 28 |3534 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
3097 11:05:36.553510 3 2 0 |3434 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3098 11:05:36.556817 3 2 4 |505 2c2b |(1 11)(11 11) |(1 1)(1 0)| 0
3099 11:05:36.559884 3 2 8 |1d1c 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3100 11:05:36.566395 3 2 12 |3c3c 201 |(0 0)(11 11) |(1 1)(0 0)| 0
3101 11:05:36.570239 3 2 16 |3d3d 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
3102 11:05:36.573471 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3103 11:05:36.580172 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3104 11:05:36.583330 3 2 28 |3d3d 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
3105 11:05:36.586529 3 3 0 |3c3c 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
3106 11:05:36.590366 3 3 4 |202 3534 |(1 1)(11 11) |(1 1)(1 1)| 0
3107 11:05:36.596629 3 3 8 |504 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3108 11:05:36.599933 [Byte 0] Lead/lag falling Transition (3, 3, 8)
3109 11:05:36.603148 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3110 11:05:36.606560 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3111 11:05:36.613061 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3112 11:05:36.616380 [Byte 1] Lead/lag Transition tap number (1)
3113 11:05:36.619852 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3114 11:05:36.626544 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3115 11:05:36.629615 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3116 11:05:36.632980 3 4 4 |201 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3117 11:05:36.636717 3 4 8 |2121 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3118 11:05:36.643332 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3119 11:05:36.646538 3 4 16 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3120 11:05:36.649798 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3121 11:05:36.656641 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3122 11:05:36.660046 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3123 11:05:36.663439 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3124 11:05:36.670291 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3125 11:05:36.673060 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3126 11:05:36.676832 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3127 11:05:36.680112 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3128 11:05:36.686419 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3129 11:05:36.690031 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3130 11:05:36.693050 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3131 11:05:36.699383 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3132 11:05:36.703132 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3133 11:05:36.706748 [Byte 0] Lead/lag Transition tap number (3)
3134 11:05:36.709765 3 6 4 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3135 11:05:36.716102 [Byte 1] Lead/lag falling Transition (3, 6, 4)
3136 11:05:36.719767 3 6 8 |2626 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3137 11:05:36.722698 [Byte 1] Lead/lag Transition tap number (2)
3138 11:05:36.726466 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
3139 11:05:36.729421 [Byte 0]First pass (3, 6, 12)
3140 11:05:36.736327 3 6 16 |4646 a0a |(0 0)(11 11) |(0 0)(0 0)| 0
3141 11:05:36.739371 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3142 11:05:36.742839 [Byte 1]First pass (3, 6, 20)
3143 11:05:36.745995 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3144 11:05:36.749406 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3145 11:05:36.752874 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3146 11:05:36.756081 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3147 11:05:36.762838 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3148 11:05:36.765977 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3149 11:05:36.769222 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3150 11:05:36.772603 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3151 11:05:36.776095 All bytes gating window > 1UI, Early break!
3152 11:05:36.776719
3153 11:05:36.782814 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 30)
3154 11:05:36.783374
3155 11:05:36.785903 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
3156 11:05:36.786472
3157 11:05:36.787006
3158 11:05:36.787487
3159 11:05:36.789281 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
3160 11:05:36.789632
3161 11:05:36.792521 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
3162 11:05:36.792998
3163 11:05:36.793362
3164 11:05:36.795570 Write Rank1 MR1 =0x56
3165 11:05:36.795655
3166 11:05:36.799091 best RODT dly(2T, 0.5T) = (2, 2)
3167 11:05:36.799202
3168 11:05:36.801932 best RODT dly(2T, 0.5T) = (2, 3)
3169 11:05:36.802015 ==
3170 11:05:36.805596 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3171 11:05:36.808869 fsp= 1, odt_onoff= 1, Byte mode= 0
3172 11:05:36.808953 ==
3173 11:05:36.815460 Start DQ dly to find pass range UseTestEngine =0
3174 11:05:36.818800 x-axis: bit #, y-axis: DQ dly (-127~63)
3175 11:05:36.818880 RX Vref Scan = 0
3176 11:05:36.822399 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3177 11:05:36.825709 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3178 11:05:36.829067 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3179 11:05:36.832393 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3180 11:05:36.835598 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3181 11:05:36.835675 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3182 11:05:36.838850 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3183 11:05:36.842196 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3184 11:05:36.845520 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3185 11:05:36.848639 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3186 11:05:36.852043 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3187 11:05:36.855870 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3188 11:05:36.859121 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3189 11:05:36.859206 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3190 11:05:36.862272 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3191 11:05:36.865754 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3192 11:05:36.868730 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3193 11:05:36.872362 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3194 11:05:36.875865 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3195 11:05:36.879334 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3196 11:05:36.882153 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3197 11:05:36.882227 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3198 11:05:36.885668 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3199 11:05:36.888806 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3200 11:05:36.891892 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3201 11:05:36.895588 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3202 11:05:36.898687 0, [0] xxooxxxx ooxxxxxo [MSB]
3203 11:05:36.898789 1, [0] xxooxxxx ooxxxxxo [MSB]
3204 11:05:36.902112 2, [0] xxooxxxx ooxxxxxo [MSB]
3205 11:05:36.905484 3, [0] xxoooxxo oooxxxxo [MSB]
3206 11:05:36.908834 4, [0] xxooxxxo oooxxxxo [MSB]
3207 11:05:36.912196 5, [0] oooooxoo ooooooxo [MSB]
3208 11:05:36.915617 32, [0] oooooooo ooooooox [MSB]
3209 11:05:36.918930 33, [0] oooooooo ooooooox [MSB]
3210 11:05:36.919164 34, [0] oooooooo ooooooox [MSB]
3211 11:05:36.922065 35, [0] oooxoooo xxooooox [MSB]
3212 11:05:36.925538 36, [0] oooxoooo xxooooox [MSB]
3213 11:05:36.928594 37, [0] ooxxoooo xxooooox [MSB]
3214 11:05:36.932013 38, [0] ooxxoooo xxooooox [MSB]
3215 11:05:36.935299 39, [0] oxxxxoox xxooooox [MSB]
3216 11:05:36.938434 40, [0] oxxxxoox xxxoooox [MSB]
3217 11:05:36.938640 41, [0] oxxxxoox xxxxxxox [MSB]
3218 11:05:36.942309 42, [0] xxxxxxxx xxxxxxxx [MSB]
3219 11:05:36.945806 iDelay=42, Bit 0, Center 23 (5 ~ 41) 37
3220 11:05:36.949054 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3221 11:05:36.951921 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3222 11:05:36.958737 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3223 11:05:36.962047 iDelay=42, Bit 4, Center 21 (5 ~ 38) 34
3224 11:05:36.965601 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
3225 11:05:36.968617 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3226 11:05:36.972156 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3227 11:05:36.975258 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
3228 11:05:36.978556 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3229 11:05:36.982323 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3230 11:05:36.985440 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3231 11:05:36.989051 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3232 11:05:36.992250 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
3233 11:05:36.995137 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
3234 11:05:37.001795 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3235 11:05:37.002266 ==
3236 11:05:37.005127 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3237 11:05:37.008653 fsp= 1, odt_onoff= 1, Byte mode= 0
3238 11:05:37.009042 ==
3239 11:05:37.009428 DQS Delay:
3240 11:05:37.011633 DQS0 = 0, DQS1 = 0
3241 11:05:37.012086 DQM Delay:
3242 11:05:37.015128 DQM0 = 20, DQM1 = 19
3243 11:05:37.015635 DQ Delay:
3244 11:05:37.018362 DQ0 =23, DQ1 =21, DQ2 =18, DQ3 =16
3245 11:05:37.022033 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
3246 11:05:37.025457 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3247 11:05:37.028316 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =14
3248 11:05:37.028803
3249 11:05:37.029106
3250 11:05:37.031728 DramC Write-DBI off
3251 11:05:37.032107 ==
3252 11:05:37.035717 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3253 11:05:37.038598 fsp= 1, odt_onoff= 1, Byte mode= 0
3254 11:05:37.038983 ==
3255 11:05:37.045183 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3256 11:05:37.045576
3257 11:05:37.045870 Begin, DQ Scan Range 919~1175
3258 11:05:37.046171
3259 11:05:37.048576
3260 11:05:37.049005 TX Vref Scan disable
3261 11:05:37.051825 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
3262 11:05:37.054778 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
3263 11:05:37.058781 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3264 11:05:37.061777 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3265 11:05:37.064950 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3266 11:05:37.071802 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3267 11:05:37.074796 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3268 11:05:37.078628 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3269 11:05:37.081860 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3270 11:05:37.084810 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3271 11:05:37.088414 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3272 11:05:37.091753 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3273 11:05:37.095356 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3274 11:05:37.098176 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3275 11:05:37.101671 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3276 11:05:37.105107 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3277 11:05:37.108271 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3278 11:05:37.111472 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3279 11:05:37.114883 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3280 11:05:37.118400 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3281 11:05:37.121411 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3282 11:05:37.128211 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3283 11:05:37.131562 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3284 11:05:37.134903 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3285 11:05:37.138437 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3286 11:05:37.141776 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3287 11:05:37.144867 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3288 11:05:37.148304 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3289 11:05:37.151667 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3290 11:05:37.154661 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3291 11:05:37.157993 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3292 11:05:37.161770 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3293 11:05:37.164950 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3294 11:05:37.168381 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3295 11:05:37.171553 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3296 11:05:37.174902 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3297 11:05:37.178495 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3298 11:05:37.184708 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3299 11:05:37.187752 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3300 11:05:37.191440 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3301 11:05:37.194613 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3302 11:05:37.198448 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3303 11:05:37.201293 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3304 11:05:37.205060 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3305 11:05:37.208182 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3306 11:05:37.211392 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3307 11:05:37.215125 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3308 11:05:37.218258 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
3309 11:05:37.221837 967 |3 6 7|[0] xxxxxxxx oxxxxxxo [MSB]
3310 11:05:37.224924 968 |3 6 8|[0] xxxxxxxx ooxxxxxo [MSB]
3311 11:05:37.228341 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
3312 11:05:37.231568 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
3313 11:05:37.235256 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3314 11:05:37.238116 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3315 11:05:37.241371 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3316 11:05:37.244844 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3317 11:05:37.247989 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3318 11:05:37.254829 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3319 11:05:37.257919 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3320 11:05:37.261436 978 |3 6 18|[0] xxooxxxx oooooooo [MSB]
3321 11:05:37.264827 979 |3 6 19|[0] xooooxxx oooooooo [MSB]
3322 11:05:37.268063 980 |3 6 20|[0] xoooooox oooooooo [MSB]
3323 11:05:37.271339 984 |3 6 24|[0] oooooooo ooooooox [MSB]
3324 11:05:37.274582 985 |3 6 25|[0] oooooooo ooooooox [MSB]
3325 11:05:37.278026 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
3326 11:05:37.281220 987 |3 6 27|[0] oooooooo xxooooox [MSB]
3327 11:05:37.284307 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
3328 11:05:37.287946 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
3329 11:05:37.291212 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3330 11:05:37.294329 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3331 11:05:37.297944 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3332 11:05:37.304317 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3333 11:05:37.307458 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3334 11:05:37.311009 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3335 11:05:37.314224 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3336 11:05:37.317782 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3337 11:05:37.321148 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3338 11:05:37.324126 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3339 11:05:37.327839 1000 |3 6 40|[0] ooxxooox xxxxxxxx [MSB]
3340 11:05:37.331145 1001 |3 6 41|[0] ooxxxoox xxxxxxxx [MSB]
3341 11:05:37.334668 1002 |3 6 42|[0] oxxxxoxx xxxxxxxx [MSB]
3342 11:05:37.338130 1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
3343 11:05:37.341038 Byte0, DQ PI dly=989, DQM PI dly= 989
3344 11:05:37.348279 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3345 11:05:37.348805
3346 11:05:37.350988 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3347 11:05:37.351539
3348 11:05:37.354257 Byte1, DQ PI dly=975, DQM PI dly= 975
3349 11:05:37.357852 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
3350 11:05:37.358308
3351 11:05:37.364766 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
3352 11:05:37.365224
3353 11:05:37.365517 ==
3354 11:05:37.367904 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3355 11:05:37.371402 fsp= 1, odt_onoff= 1, Byte mode= 0
3356 11:05:37.371863 ==
3357 11:05:37.377698 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3358 11:05:37.378280
3359 11:05:37.378586 Begin, DQ Scan Range 951~1015
3360 11:05:37.381423 Write Rank1 MR14 =0x0
3361 11:05:37.390461
3362 11:05:37.390920 CH=1, VrefRange= 0, VrefLevel = 0
3363 11:05:37.397059 TX Bit0 (983~998) 16 990, Bit8 (969~982) 14 975,
3364 11:05:37.400433 TX Bit1 (982~997) 16 989, Bit9 (969~982) 14 975,
3365 11:05:37.406901 TX Bit2 (980~994) 15 987, Bit10 (972~984) 13 978,
3366 11:05:37.410120 TX Bit3 (979~991) 13 985, Bit11 (972~985) 14 978,
3367 11:05:37.413580 TX Bit4 (982~997) 16 989, Bit12 (973~984) 12 978,
3368 11:05:37.419956 TX Bit5 (983~998) 16 990, Bit13 (972~986) 15 979,
3369 11:05:37.423773 TX Bit6 (983~998) 16 990, Bit14 (972~984) 13 978,
3370 11:05:37.427264 TX Bit7 (984~995) 12 989, Bit15 (968~977) 10 972,
3371 11:05:37.427738
3372 11:05:37.429967 Write Rank1 MR14 =0x2
3373 11:05:37.440063
3374 11:05:37.440444 CH=1, VrefRange= 0, VrefLevel = 2
3375 11:05:37.446497 TX Bit0 (983~999) 17 991, Bit8 (969~983) 15 976,
3376 11:05:37.449848 TX Bit1 (982~998) 17 990, Bit9 (969~983) 15 976,
3377 11:05:37.456815 TX Bit2 (979~995) 17 987, Bit10 (971~984) 14 977,
3378 11:05:37.459797 TX Bit3 (978~992) 15 985, Bit11 (972~985) 14 978,
3379 11:05:37.463000 TX Bit4 (981~998) 18 989, Bit12 (971~984) 14 977,
3380 11:05:37.469810 TX Bit5 (983~999) 17 991, Bit13 (972~986) 15 979,
3381 11:05:37.473081 TX Bit6 (982~998) 17 990, Bit14 (972~984) 13 978,
3382 11:05:37.476491 TX Bit7 (983~996) 14 989, Bit15 (967~977) 11 972,
3383 11:05:37.479804
3384 11:05:37.480258 Write Rank1 MR14 =0x4
3385 11:05:37.489960
3386 11:05:37.490415 CH=1, VrefRange= 0, VrefLevel = 4
3387 11:05:37.496621 TX Bit0 (983~999) 17 991, Bit8 (969~983) 15 976,
3388 11:05:37.499775 TX Bit1 (981~998) 18 989, Bit9 (969~983) 15 976,
3389 11:05:37.506370 TX Bit2 (980~996) 17 988, Bit10 (971~985) 15 978,
3390 11:05:37.509637 TX Bit3 (978~992) 15 985, Bit11 (971~986) 16 978,
3391 11:05:37.513202 TX Bit4 (981~998) 18 989, Bit12 (972~985) 14 978,
3392 11:05:37.520097 TX Bit5 (982~999) 18 990, Bit13 (971~987) 17 979,
3393 11:05:37.522816 TX Bit6 (981~999) 19 990, Bit14 (972~985) 14 978,
3394 11:05:37.526859 TX Bit7 (983~997) 15 990, Bit15 (967~978) 12 972,
3395 11:05:37.527362
3396 11:05:37.529727 Write Rank1 MR14 =0x6
3397 11:05:37.539354
3398 11:05:37.539847 CH=1, VrefRange= 0, VrefLevel = 6
3399 11:05:37.546129 TX Bit0 (983~1000) 18 991, Bit8 (968~984) 17 976,
3400 11:05:37.549084 TX Bit1 (981~999) 19 990, Bit9 (968~984) 17 976,
3401 11:05:37.555697 TX Bit2 (979~997) 19 988, Bit10 (970~985) 16 977,
3402 11:05:37.559579 TX Bit3 (978~993) 16 985, Bit11 (971~987) 17 979,
3403 11:05:37.562982 TX Bit4 (980~998) 19 989, Bit12 (971~986) 16 978,
3404 11:05:37.569274 TX Bit5 (982~1000) 19 991, Bit13 (971~988) 18 979,
3405 11:05:37.572660 TX Bit6 (982~999) 18 990, Bit14 (971~985) 15 978,
3406 11:05:37.579300 TX Bit7 (983~998) 16 990, Bit15 (966~979) 14 972,
3407 11:05:37.579795
3408 11:05:37.580123 Write Rank1 MR14 =0x8
3409 11:05:37.589147
3410 11:05:37.589643 CH=1, VrefRange= 0, VrefLevel = 8
3411 11:05:37.595960 TX Bit0 (982~1000) 19 991, Bit8 (968~984) 17 976,
3412 11:05:37.599561 TX Bit1 (980~999) 20 989, Bit9 (969~984) 16 976,
3413 11:05:37.605675 TX Bit2 (978~997) 20 987, Bit10 (970~986) 17 978,
3414 11:05:37.609327 TX Bit3 (978~994) 17 986, Bit11 (971~987) 17 979,
3415 11:05:37.612516 TX Bit4 (980~999) 20 989, Bit12 (971~987) 17 979,
3416 11:05:37.619264 TX Bit5 (982~1000) 19 991, Bit13 (971~989) 19 980,
3417 11:05:37.623032 TX Bit6 (981~999) 19 990, Bit14 (970~986) 17 978,
3418 11:05:37.625680 TX Bit7 (983~998) 16 990, Bit15 (966~980) 15 973,
3419 11:05:37.626104
3420 11:05:37.629173 Write Rank1 MR14 =0xa
3421 11:05:37.639725
3422 11:05:37.642839 CH=1, VrefRange= 0, VrefLevel = 10
3423 11:05:37.645841 TX Bit0 (982~1001) 20 991, Bit8 (968~985) 18 976,
3424 11:05:37.649440 TX Bit1 (980~999) 20 989, Bit9 (968~984) 17 976,
3425 11:05:37.655942 TX Bit2 (978~998) 21 988, Bit10 (970~987) 18 978,
3426 11:05:37.659524 TX Bit3 (978~995) 18 986, Bit11 (970~989) 20 979,
3427 11:05:37.662574 TX Bit4 (980~999) 20 989, Bit12 (970~987) 18 978,
3428 11:05:37.669254 TX Bit5 (981~1000) 20 990, Bit13 (970~989) 20 979,
3429 11:05:37.672368 TX Bit6 (980~1000) 21 990, Bit14 (970~987) 18 978,
3430 11:05:37.676420 TX Bit7 (982~999) 18 990, Bit15 (965~982) 18 973,
3431 11:05:37.679333
3432 11:05:37.679840 Write Rank1 MR14 =0xc
3433 11:05:37.689320
3434 11:05:37.693233 CH=1, VrefRange= 0, VrefLevel = 12
3435 11:05:37.696608 TX Bit0 (981~1001) 21 991, Bit8 (967~985) 19 976,
3436 11:05:37.700088 TX Bit1 (980~1000) 21 990, Bit9 (968~985) 18 976,
3437 11:05:37.705993 TX Bit2 (978~998) 21 988, Bit10 (970~988) 19 979,
3438 11:05:37.709466 TX Bit3 (977~996) 20 986, Bit11 (970~989) 20 979,
3439 11:05:37.713031 TX Bit4 (979~1000) 22 989, Bit12 (970~988) 19 979,
3440 11:05:37.719588 TX Bit5 (981~1001) 21 991, Bit13 (970~990) 21 980,
3441 11:05:37.723308 TX Bit6 (980~1000) 21 990, Bit14 (970~987) 18 978,
3442 11:05:37.729427 TX Bit7 (981~999) 19 990, Bit15 (965~982) 18 973,
3443 11:05:37.729819
3444 11:05:37.730119 Write Rank1 MR14 =0xe
3445 11:05:37.740318
3446 11:05:37.743293 CH=1, VrefRange= 0, VrefLevel = 14
3447 11:05:37.747025 TX Bit0 (981~1002) 22 991, Bit8 (967~985) 19 976,
3448 11:05:37.749943 TX Bit1 (980~1000) 21 990, Bit9 (968~985) 18 976,
3449 11:05:37.756619 TX Bit2 (978~999) 22 988, Bit10 (970~988) 19 979,
3450 11:05:37.760415 TX Bit3 (977~997) 21 987, Bit11 (970~990) 21 980,
3451 11:05:37.763699 TX Bit4 (979~1000) 22 989, Bit12 (970~988) 19 979,
3452 11:05:37.769992 TX Bit5 (981~1002) 22 991, Bit13 (970~990) 21 980,
3453 11:05:37.773464 TX Bit6 (980~1001) 22 990, Bit14 (970~988) 19 979,
3454 11:05:37.779891 TX Bit7 (981~999) 19 990, Bit15 (964~983) 20 973,
3455 11:05:37.780360
3456 11:05:37.780728 Write Rank1 MR14 =0x10
3457 11:05:37.790981
3458 11:05:37.794324 CH=1, VrefRange= 0, VrefLevel = 16
3459 11:05:37.797279 TX Bit0 (980~1002) 23 991, Bit8 (967~986) 20 976,
3460 11:05:37.800934 TX Bit1 (979~1000) 22 989, Bit9 (968~986) 19 977,
3461 11:05:37.807709 TX Bit2 (978~999) 22 988, Bit10 (970~989) 20 979,
3462 11:05:37.810988 TX Bit3 (977~997) 21 987, Bit11 (970~990) 21 980,
3463 11:05:37.814350 TX Bit4 (979~1000) 22 989, Bit12 (970~990) 21 980,
3464 11:05:37.820737 TX Bit5 (980~1002) 23 991, Bit13 (970~991) 22 980,
3465 11:05:37.823923 TX Bit6 (979~1001) 23 990, Bit14 (970~989) 20 979,
3466 11:05:37.830424 TX Bit7 (981~1000) 20 990, Bit15 (963~983) 21 973,
3467 11:05:37.830932
3468 11:05:37.831270 Write Rank1 MR14 =0x12
3469 11:05:37.841574
3470 11:05:37.844786 CH=1, VrefRange= 0, VrefLevel = 18
3471 11:05:37.848101 TX Bit0 (980~1003) 24 991, Bit8 (967~986) 20 976,
3472 11:05:37.851337 TX Bit1 (978~1001) 24 989, Bit9 (967~986) 20 976,
3473 11:05:37.857923 TX Bit2 (978~999) 22 988, Bit10 (969~990) 22 979,
3474 11:05:37.861376 TX Bit3 (976~998) 23 987, Bit11 (970~991) 22 980,
3475 11:05:37.864580 TX Bit4 (978~1001) 24 989, Bit12 (970~990) 21 980,
3476 11:05:37.871128 TX Bit5 (980~1003) 24 991, Bit13 (970~991) 22 980,
3477 11:05:37.874924 TX Bit6 (979~1001) 23 990, Bit14 (970~989) 20 979,
3478 11:05:37.881680 TX Bit7 (980~1000) 21 990, Bit15 (963~984) 22 973,
3479 11:05:37.882064
3480 11:05:37.882362 Write Rank1 MR14 =0x14
3481 11:05:37.892380
3482 11:05:37.896213 CH=1, VrefRange= 0, VrefLevel = 20
3483 11:05:37.899472 TX Bit0 (980~1004) 25 992, Bit8 (966~987) 22 976,
3484 11:05:37.902746 TX Bit1 (979~1002) 24 990, Bit9 (967~987) 21 977,
3485 11:05:37.908984 TX Bit2 (978~1000) 23 989, Bit10 (969~990) 22 979,
3486 11:05:37.912653 TX Bit3 (977~998) 22 987, Bit11 (970~991) 22 980,
3487 11:05:37.916233 TX Bit4 (979~1001) 23 990, Bit12 (969~990) 22 979,
3488 11:05:37.922553 TX Bit5 (980~1003) 24 991, Bit13 (970~991) 22 980,
3489 11:05:37.926026 TX Bit6 (979~1002) 24 990, Bit14 (969~990) 22 979,
3490 11:05:37.932202 TX Bit7 (980~1001) 22 990, Bit15 (963~984) 22 973,
3491 11:05:37.932624
3492 11:05:37.932924 Write Rank1 MR14 =0x16
3493 11:05:37.944280
3494 11:05:37.944805 CH=1, VrefRange= 0, VrefLevel = 22
3495 11:05:37.951248 TX Bit0 (979~1004) 26 991, Bit8 (966~987) 22 976,
3496 11:05:37.953912 TX Bit1 (978~1002) 25 990, Bit9 (967~987) 21 977,
3497 11:05:37.961095 TX Bit2 (978~1000) 23 989, Bit10 (969~990) 22 979,
3498 11:05:37.963947 TX Bit3 (976~999) 24 987, Bit11 (969~991) 23 980,
3499 11:05:37.967537 TX Bit4 (978~1002) 25 990, Bit12 (969~991) 23 980,
3500 11:05:37.974279 TX Bit5 (979~1004) 26 991, Bit13 (969~992) 24 980,
3501 11:05:37.977419 TX Bit6 (979~1002) 24 990, Bit14 (969~990) 22 979,
3502 11:05:37.983635 TX Bit7 (980~1001) 22 990, Bit15 (962~984) 23 973,
3503 11:05:37.984020
3504 11:05:37.984313 Write Rank1 MR14 =0x18
3505 11:05:37.994884
3506 11:05:37.998412 CH=1, VrefRange= 0, VrefLevel = 24
3507 11:05:38.001796 TX Bit0 (979~1005) 27 992, Bit8 (966~988) 23 977,
3508 11:05:38.005173 TX Bit1 (978~1003) 26 990, Bit9 (967~988) 22 977,
3509 11:05:38.011540 TX Bit2 (977~1000) 24 988, Bit10 (969~991) 23 980,
3510 11:05:38.015223 TX Bit3 (976~999) 24 987, Bit11 (969~992) 24 980,
3511 11:05:38.018518 TX Bit4 (978~1002) 25 990, Bit12 (969~991) 23 980,
3512 11:05:38.025033 TX Bit5 (979~1004) 26 991, Bit13 (970~992) 23 981,
3513 11:05:38.028408 TX Bit6 (979~1003) 25 991, Bit14 (969~991) 23 980,
3514 11:05:38.035172 TX Bit7 (979~1002) 24 990, Bit15 (962~984) 23 973,
3515 11:05:38.035623
3516 11:05:38.035924 Write Rank1 MR14 =0x1a
3517 11:05:38.046698
3518 11:05:38.050132 CH=1, VrefRange= 0, VrefLevel = 26
3519 11:05:38.053054 TX Bit0 (979~1005) 27 992, Bit8 (965~989) 25 977,
3520 11:05:38.056362 TX Bit1 (978~1003) 26 990, Bit9 (965~989) 25 977,
3521 11:05:38.063395 TX Bit2 (977~1001) 25 989, Bit10 (969~991) 23 980,
3522 11:05:38.066604 TX Bit3 (976~999) 24 987, Bit11 (969~992) 24 980,
3523 11:05:38.069563 TX Bit4 (978~1003) 26 990, Bit12 (969~991) 23 980,
3524 11:05:38.076617 TX Bit5 (978~1005) 28 991, Bit13 (969~992) 24 980,
3525 11:05:38.079811 TX Bit6 (978~1004) 27 991, Bit14 (969~991) 23 980,
3526 11:05:38.086405 TX Bit7 (979~1002) 24 990, Bit15 (962~985) 24 973,
3527 11:05:38.086870
3528 11:05:38.087174 Write Rank1 MR14 =0x1c
3529 11:05:38.097991
3530 11:05:38.100900 CH=1, VrefRange= 0, VrefLevel = 28
3531 11:05:38.104248 TX Bit0 (979~1005) 27 992, Bit8 (966~989) 24 977,
3532 11:05:38.107350 TX Bit1 (978~1004) 27 991, Bit9 (965~989) 25 977,
3533 11:05:38.114432 TX Bit2 (977~1001) 25 989, Bit10 (968~991) 24 979,
3534 11:05:38.117822 TX Bit3 (975~999) 25 987, Bit11 (969~992) 24 980,
3535 11:05:38.121144 TX Bit4 (978~1004) 27 991, Bit12 (969~992) 24 980,
3536 11:05:38.127680 TX Bit5 (979~1005) 27 992, Bit13 (969~992) 24 980,
3537 11:05:38.130769 TX Bit6 (978~1004) 27 991, Bit14 (968~991) 24 979,
3538 11:05:38.137338 TX Bit7 (979~1002) 24 990, Bit15 (962~986) 25 974,
3539 11:05:38.137803
3540 11:05:38.138097 Write Rank1 MR14 =0x1e
3541 11:05:38.149336
3542 11:05:38.152285 CH=1, VrefRange= 0, VrefLevel = 30
3543 11:05:38.156116 TX Bit0 (978~1006) 29 992, Bit8 (965~989) 25 977,
3544 11:05:38.158984 TX Bit1 (978~1005) 28 991, Bit9 (965~989) 25 977,
3545 11:05:38.165667 TX Bit2 (977~1002) 26 989, Bit10 (968~991) 24 979,
3546 11:05:38.169257 TX Bit3 (975~999) 25 987, Bit11 (968~992) 25 980,
3547 11:05:38.172647 TX Bit4 (978~1004) 27 991, Bit12 (969~992) 24 980,
3548 11:05:38.178739 TX Bit5 (979~1005) 27 992, Bit13 (969~992) 24 980,
3549 11:05:38.182359 TX Bit6 (978~1005) 28 991, Bit14 (968~991) 24 979,
3550 11:05:38.189011 TX Bit7 (978~1003) 26 990, Bit15 (962~986) 25 974,
3551 11:05:38.189395
3552 11:05:38.189739 Write Rank1 MR14 =0x20
3553 11:05:38.201012
3554 11:05:38.204080 CH=1, VrefRange= 0, VrefLevel = 32
3555 11:05:38.207414 TX Bit0 (978~1006) 29 992, Bit8 (965~989) 25 977,
3556 11:05:38.210613 TX Bit1 (978~1005) 28 991, Bit9 (965~989) 25 977,
3557 11:05:38.217548 TX Bit2 (977~1002) 26 989, Bit10 (968~991) 24 979,
3558 11:05:38.220731 TX Bit3 (975~999) 25 987, Bit11 (968~992) 25 980,
3559 11:05:38.224275 TX Bit4 (978~1004) 27 991, Bit12 (969~992) 24 980,
3560 11:05:38.230734 TX Bit5 (979~1005) 27 992, Bit13 (969~992) 24 980,
3561 11:05:38.233712 TX Bit6 (978~1005) 28 991, Bit14 (968~991) 24 979,
3562 11:05:38.240541 TX Bit7 (978~1003) 26 990, Bit15 (962~986) 25 974,
3563 11:05:38.240994
3564 11:05:38.241298 Write Rank1 MR14 =0x22
3565 11:05:38.252100
3566 11:05:38.252627 CH=1, VrefRange= 0, VrefLevel = 34
3567 11:05:38.258261 TX Bit0 (978~1006) 29 992, Bit8 (965~989) 25 977,
3568 11:05:38.261965 TX Bit1 (978~1005) 28 991, Bit9 (965~989) 25 977,
3569 11:05:38.268696 TX Bit2 (977~1002) 26 989, Bit10 (968~991) 24 979,
3570 11:05:38.272440 TX Bit3 (975~999) 25 987, Bit11 (968~992) 25 980,
3571 11:05:38.275732 TX Bit4 (978~1004) 27 991, Bit12 (969~992) 24 980,
3572 11:05:38.282080 TX Bit5 (979~1005) 27 992, Bit13 (969~992) 24 980,
3573 11:05:38.285483 TX Bit6 (978~1005) 28 991, Bit14 (968~991) 24 979,
3574 11:05:38.291739 TX Bit7 (978~1003) 26 990, Bit15 (962~986) 25 974,
3575 11:05:38.292197
3576 11:05:38.292542 Write Rank1 MR14 =0x24
3577 11:05:38.303091
3578 11:05:38.306237 CH=1, VrefRange= 0, VrefLevel = 36
3579 11:05:38.309679 TX Bit0 (978~1006) 29 992, Bit8 (965~989) 25 977,
3580 11:05:38.312925 TX Bit1 (978~1005) 28 991, Bit9 (965~989) 25 977,
3581 11:05:38.319641 TX Bit2 (977~1002) 26 989, Bit10 (968~991) 24 979,
3582 11:05:38.323031 TX Bit3 (975~999) 25 987, Bit11 (968~992) 25 980,
3583 11:05:38.326477 TX Bit4 (978~1004) 27 991, Bit12 (969~992) 24 980,
3584 11:05:38.332879 TX Bit5 (979~1005) 27 992, Bit13 (969~992) 24 980,
3585 11:05:38.336326 TX Bit6 (978~1005) 28 991, Bit14 (968~991) 24 979,
3586 11:05:38.342529 TX Bit7 (978~1003) 26 990, Bit15 (962~986) 25 974,
3587 11:05:38.342911
3588 11:05:38.343205 Write Rank1 MR14 =0x26
3589 11:05:38.354260
3590 11:05:38.357511 CH=1, VrefRange= 0, VrefLevel = 38
3591 11:05:38.360919 TX Bit0 (978~1006) 29 992, Bit8 (965~989) 25 977,
3592 11:05:38.364561 TX Bit1 (978~1005) 28 991, Bit9 (965~989) 25 977,
3593 11:05:38.371382 TX Bit2 (977~1002) 26 989, Bit10 (968~991) 24 979,
3594 11:05:38.374358 TX Bit3 (975~999) 25 987, Bit11 (968~992) 25 980,
3595 11:05:38.377609 TX Bit4 (978~1004) 27 991, Bit12 (969~992) 24 980,
3596 11:05:38.384142 TX Bit5 (979~1005) 27 992, Bit13 (969~992) 24 980,
3597 11:05:38.387597 TX Bit6 (978~1005) 28 991, Bit14 (968~991) 24 979,
3598 11:05:38.394696 TX Bit7 (978~1003) 26 990, Bit15 (962~986) 25 974,
3599 11:05:38.395080
3600 11:05:38.395372
3601 11:05:38.397930 TX Vref found, early break! 381< 391
3602 11:05:38.401109 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3603 11:05:38.404178 u1DelayCellOfst[0]=6 cells (5 PI)
3604 11:05:38.407482 u1DelayCellOfst[1]=5 cells (4 PI)
3605 11:05:38.411326 u1DelayCellOfst[2]=2 cells (2 PI)
3606 11:05:38.414242 u1DelayCellOfst[3]=0 cells (0 PI)
3607 11:05:38.417254 u1DelayCellOfst[4]=5 cells (4 PI)
3608 11:05:38.420880 u1DelayCellOfst[5]=6 cells (5 PI)
3609 11:05:38.421260 u1DelayCellOfst[6]=5 cells (4 PI)
3610 11:05:38.424968 u1DelayCellOfst[7]=3 cells (3 PI)
3611 11:05:38.427808 Byte0, DQ PI dly=987, DQM PI dly= 989
3612 11:05:38.434703 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
3613 11:05:38.435166
3614 11:05:38.437681 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
3615 11:05:38.438067
3616 11:05:38.441239 u1DelayCellOfst[8]=3 cells (3 PI)
3617 11:05:38.443946 u1DelayCellOfst[9]=3 cells (3 PI)
3618 11:05:38.447648 u1DelayCellOfst[10]=6 cells (5 PI)
3619 11:05:38.451119 u1DelayCellOfst[11]=7 cells (6 PI)
3620 11:05:38.454019 u1DelayCellOfst[12]=7 cells (6 PI)
3621 11:05:38.457355 u1DelayCellOfst[13]=7 cells (6 PI)
3622 11:05:38.460802 u1DelayCellOfst[14]=6 cells (5 PI)
3623 11:05:38.464571 u1DelayCellOfst[15]=0 cells (0 PI)
3624 11:05:38.468273 Byte1, DQ PI dly=974, DQM PI dly= 977
3625 11:05:38.471126 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
3626 11:05:38.471582
3627 11:05:38.474330 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
3628 11:05:38.474804
3629 11:05:38.477475 Write Rank1 MR14 =0x1e
3630 11:05:38.477862
3631 11:05:38.480915 Final TX Range 0 Vref 30
3632 11:05:38.481383
3633 11:05:38.487748 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3634 11:05:38.488216
3635 11:05:38.493912 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3636 11:05:38.501100 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3637 11:05:38.507744 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3638 11:05:38.508213 Write Rank1 MR3 =0xb0
3639 11:05:38.510797 DramC Write-DBI on
3640 11:05:38.511255 ==
3641 11:05:38.517436 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3642 11:05:38.517900 fsp= 1, odt_onoff= 1, Byte mode= 0
3643 11:05:38.520903 ==
3644 11:05:38.523716 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3645 11:05:38.524105
3646 11:05:38.527276 Begin, DQ Scan Range 697~761
3647 11:05:38.527661
3648 11:05:38.527959
3649 11:05:38.528231 TX Vref Scan disable
3650 11:05:38.530484 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3651 11:05:38.534362 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3652 11:05:38.540697 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3653 11:05:38.544095 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3654 11:05:38.547551 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3655 11:05:38.551128 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3656 11:05:38.554219 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3657 11:05:38.557273 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3658 11:05:38.560924 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3659 11:05:38.563632 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3660 11:05:38.567297 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3661 11:05:38.570644 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3662 11:05:38.573956 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3663 11:05:38.577023 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
3664 11:05:38.580618 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3665 11:05:38.584234 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3666 11:05:38.587025 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3667 11:05:38.590354 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3668 11:05:38.593738 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3669 11:05:38.597272 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3670 11:05:38.600797 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3671 11:05:38.604242 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3672 11:05:38.607239 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3673 11:05:38.614112 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3674 11:05:38.617574 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3675 11:05:38.620432 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
3676 11:05:38.623900 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3677 11:05:38.627296 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3678 11:05:38.633646 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3679 11:05:38.637053 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3680 11:05:38.640147 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3681 11:05:38.643530 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3682 11:05:38.646834 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3683 11:05:38.650682 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3684 11:05:38.653648 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3685 11:05:38.656655 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3686 11:05:38.660271 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3687 11:05:38.663937 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3688 11:05:38.667305 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3689 11:05:38.670425 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3690 11:05:38.673569 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3691 11:05:38.676588 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3692 11:05:38.679951 Byte0, DQ PI dly=736, DQM PI dly= 736
3693 11:05:38.687279 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
3694 11:05:38.687780
3695 11:05:38.690353 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
3696 11:05:38.690789
3697 11:05:38.693554 Byte1, DQ PI dly=722, DQM PI dly= 722
3698 11:05:38.697113 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
3699 11:05:38.697704
3700 11:05:38.703480 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
3701 11:05:38.704046
3702 11:05:38.710119 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3703 11:05:38.716507 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3704 11:05:38.723749 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3705 11:05:38.726824 Write Rank1 MR3 =0x30
3706 11:05:38.727330 DramC Write-DBI off
3707 11:05:38.727663
3708 11:05:38.727966 [DATLAT]
3709 11:05:38.730140 Freq=1600, CH1 RK1, use_rxtx_scan=0
3710 11:05:38.730645
3711 11:05:38.733421 DATLAT Default: 0x10
3712 11:05:38.733925 7, 0xFFFF, sum=0
3713 11:05:38.736723 8, 0xFFFF, sum=0
3714 11:05:38.737228 9, 0xFFFF, sum=0
3715 11:05:38.739632 10, 0xFFFF, sum=0
3716 11:05:38.740068 11, 0xFFFF, sum=0
3717 11:05:38.743449 12, 0xFFFF, sum=0
3718 11:05:38.743957 13, 0xFFFF, sum=0
3719 11:05:38.746498 14, 0x0, sum=1
3720 11:05:38.746972 15, 0x0, sum=2
3721 11:05:38.749924 16, 0x0, sum=3
3722 11:05:38.750318 17, 0x0, sum=4
3723 11:05:38.753204 pattern=2 first_step=14 total pass=5 best_step=16
3724 11:05:38.753593 ==
3725 11:05:38.760007 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3726 11:05:38.763100 fsp= 1, odt_onoff= 1, Byte mode= 0
3727 11:05:38.763492 ==
3728 11:05:38.766897 Start DQ dly to find pass range UseTestEngine =1
3729 11:05:38.769960 x-axis: bit #, y-axis: DQ dly (-127~63)
3730 11:05:38.773091 RX Vref Scan = 0
3731 11:05:38.776902 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3732 11:05:38.779757 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3733 11:05:38.780150 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3734 11:05:38.783540 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3735 11:05:38.786549 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3736 11:05:38.790033 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3737 11:05:38.792837 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3738 11:05:38.796590 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3739 11:05:38.799632 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3740 11:05:38.802818 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3741 11:05:38.803211 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3742 11:05:38.806113 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3743 11:05:38.809861 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3744 11:05:38.813005 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3745 11:05:38.816343 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3746 11:05:38.820186 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3747 11:05:38.823168 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3748 11:05:38.826588 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3749 11:05:38.827060 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3750 11:05:38.830269 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3751 11:05:38.833117 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3752 11:05:38.836372 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3753 11:05:38.839961 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3754 11:05:38.843249 -3, [0] xxxoxxxx xxxxxxxo [MSB]
3755 11:05:38.845977 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3756 11:05:38.846372 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3757 11:05:38.849854 0, [0] xxooxxxx ooxxxxxo [MSB]
3758 11:05:38.853031 1, [0] xxooxxxx ooxxxxxo [MSB]
3759 11:05:38.856074 2, [0] xxooxxxx ooxxxxxo [MSB]
3760 11:05:38.859586 3, [0] xxooxxxo ooxxxxxo [MSB]
3761 11:05:38.863031 4, [0] oooooxxo ooooooxo [MSB]
3762 11:05:38.866262 32, [0] oooooooo ooooooox [MSB]
3763 11:05:38.869641 33, [0] oooooooo ooooooox [MSB]
3764 11:05:38.872401 34, [0] oooooooo ooooooox [MSB]
3765 11:05:38.876216 35, [0] oooxoooo oxooooox [MSB]
3766 11:05:38.879438 36, [0] oooxoooo xxooooox [MSB]
3767 11:05:38.879907 37, [0] ooxxoooo xxooooox [MSB]
3768 11:05:38.883222 38, [0] ooxxoooo xxooooox [MSB]
3769 11:05:38.885721 39, [0] ooxxooox xxooooox [MSB]
3770 11:05:38.889127 40, [0] oxxxxoox xxxooxox [MSB]
3771 11:05:38.892500 41, [0] xxxxxxox xxxxxxxx [MSB]
3772 11:05:38.896488 42, [0] xxxxxxxx xxxxxxxx [MSB]
3773 11:05:38.899617 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
3774 11:05:38.903178 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
3775 11:05:38.906225 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3776 11:05:38.909290 iDelay=42, Bit 3, Center 15 (-3 ~ 34) 38
3777 11:05:38.912780 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3778 11:05:38.916490 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3779 11:05:38.919384 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3780 11:05:38.922882 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3781 11:05:38.926266 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
3782 11:05:38.929120 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3783 11:05:38.933091 iDelay=42, Bit 10, Center 21 (4 ~ 39) 36
3784 11:05:38.939556 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3785 11:05:38.943007 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3786 11:05:38.946146 iDelay=42, Bit 13, Center 21 (4 ~ 39) 36
3787 11:05:38.949295 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3788 11:05:38.952854 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3789 11:05:38.953315 ==
3790 11:05:38.959062 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3791 11:05:38.959451 fsp= 1, odt_onoff= 1, Byte mode= 0
3792 11:05:38.962502 ==
3793 11:05:38.962886 DQS Delay:
3794 11:05:38.963181 DQS0 = 0, DQS1 = 0
3795 11:05:38.965603 DQM Delay:
3796 11:05:38.965984 DQM0 = 20, DQM1 = 19
3797 11:05:38.969193 DQ Delay:
3798 11:05:38.972907 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =15
3799 11:05:38.973365 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3800 11:05:38.976265 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3801 11:05:38.979505 DQ12 =22, DQ13 =21, DQ14 =22, DQ15 =14
3802 11:05:38.979960
3803 11:05:38.982814
3804 11:05:38.983265
3805 11:05:38.983560 [DramC_TX_OE_Calibration] TA2
3806 11:05:38.985635 Original DQ_B0 (3 6) =30, OEN = 27
3807 11:05:38.989032 Original DQ_B1 (3 6) =30, OEN = 27
3808 11:05:38.992816 23, 0x0, End_B0=23 End_B1=23
3809 11:05:38.996242 24, 0x0, End_B0=24 End_B1=24
3810 11:05:38.999246 25, 0x0, End_B0=25 End_B1=25
3811 11:05:38.999707 26, 0x0, End_B0=26 End_B1=26
3812 11:05:39.002252 27, 0x0, End_B0=27 End_B1=27
3813 11:05:39.005601 28, 0x0, End_B0=28 End_B1=28
3814 11:05:39.008992 29, 0x0, End_B0=29 End_B1=29
3815 11:05:39.012585 30, 0x0, End_B0=30 End_B1=30
3816 11:05:39.013053 31, 0xFFFF, End_B0=30 End_B1=30
3817 11:05:39.019080 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3818 11:05:39.025676 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3819 11:05:39.026136
3820 11:05:39.026435
3821 11:05:39.026710 Write Rank1 MR23 =0x3f
3822 11:05:39.028595 [DQSOSC]
3823 11:05:39.035781 [DQSOSCAuto] RK1, (LSB)MR18= 0xcbcb, (MSB)MR19= 0x202, tDQSOscB0 = 440 ps tDQSOscB1 = 440 ps
3824 11:05:39.042370 CH1_RK1: MR19=0x202, MR18=0xCBCB, DQSOSC=440, MR23=63, INC=12, DEC=19
3825 11:05:39.045623 Write Rank1 MR23 =0x3f
3826 11:05:39.046081 [DQSOSC]
3827 11:05:39.052115 [DQSOSCAuto] RK1, (LSB)MR18= 0xcdcd, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
3828 11:05:39.055131 CH1 RK1: MR19=202, MR18=CDCD
3829 11:05:39.058658 [RxdqsGatingPostProcess] freq 1600
3830 11:05:39.065397 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3831 11:05:39.065898 Rank: 0
3832 11:05:39.068944 best DQS0 dly(2T, 0.5T) = (2, 6)
3833 11:05:39.072084 best DQS1 dly(2T, 0.5T) = (2, 6)
3834 11:05:39.075681 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3835 11:05:39.079155 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3836 11:05:39.079619 Rank: 1
3837 11:05:39.082142 best DQS0 dly(2T, 0.5T) = (2, 5)
3838 11:05:39.085492 best DQS1 dly(2T, 0.5T) = (2, 6)
3839 11:05:39.088887 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3840 11:05:39.089345 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3841 11:05:39.095918 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3842 11:05:39.098649 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3843 11:05:39.102135 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3844 11:05:39.102595
3845 11:05:39.102893
3846 11:05:39.105640 [Calibration Summary] Freqency 1600
3847 11:05:39.109064 CH 0, Rank 0
3848 11:05:39.109524 All Pass.
3849 11:05:39.109827
3850 11:05:39.110100 CH 0, Rank 1
3851 11:05:39.112057 All Pass.
3852 11:05:39.112571
3853 11:05:39.112880 CH 1, Rank 0
3854 11:05:39.113160 All Pass.
3855 11:05:39.115511
3856 11:05:39.115887 CH 1, Rank 1
3857 11:05:39.116188 All Pass.
3858 11:05:39.116502
3859 11:05:39.122068 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3860 11:05:39.129165 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3861 11:05:39.135519 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3862 11:05:39.139053 Write Rank0 MR3 =0xb0
3863 11:05:39.145595 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3864 11:05:39.152242 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3865 11:05:39.158382 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3866 11:05:39.162050 Write Rank1 MR3 =0xb0
3867 11:05:39.168648 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3868 11:05:39.175500 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3869 11:05:39.182064 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3870 11:05:39.185143 Write Rank0 MR3 =0xb0
3871 11:05:39.188417 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3872 11:05:39.198522 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3873 11:05:39.205285 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3874 11:05:39.205725 Write Rank1 MR3 =0xb0
3875 11:05:39.208497 DramC Write-DBI on
3876 11:05:39.211902 [GetDramInforAfterCalByMRR] Vendor 6.
3877 11:05:39.215469 [GetDramInforAfterCalByMRR] Revision 505.
3878 11:05:39.215947 MR8 1111
3879 11:05:39.221863 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3880 11:05:39.222303 MR8 1111
3881 11:05:39.225264 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3882 11:05:39.228536 MR8 1111
3883 11:05:39.232227 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3884 11:05:39.232748 MR8 1111
3885 11:05:39.238340 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3886 11:05:39.245193 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3887 11:05:39.248491 Write Rank0 MR13 =0xd0
3888 11:05:39.251618 Write Rank1 MR13 =0xd0
3889 11:05:39.252003 Write Rank0 MR13 =0xd0
3890 11:05:39.255052 Write Rank1 MR13 =0xd0
3891 11:05:39.258414 Save calibration result to emmc
3892 11:05:39.258799
3893 11:05:39.259097
3894 11:05:39.261548 [DramcModeReg_Check] Freq_1600, FSP_1
3895 11:05:39.261929 FSP_1, CH_0, RK0
3896 11:05:39.265139 Write Rank0 MR13 =0xd8
3897 11:05:39.268178 MR12 = 0x60 (global = 0x60) match
3898 11:05:39.271897 MR14 = 0x1c (global = 0x1c) match
3899 11:05:39.272367 FSP_1, CH_0, RK1
3900 11:05:39.274876 Write Rank1 MR13 =0xd8
3901 11:05:39.278444 MR12 = 0x5c (global = 0x5c) match
3902 11:05:39.281949 MR14 = 0x1e (global = 0x1e) match
3903 11:05:39.282408 FSP_1, CH_1, RK0
3904 11:05:39.285224 Write Rank0 MR13 =0xd8
3905 11:05:39.288212 MR12 = 0x5c (global = 0x5c) match
3906 11:05:39.291380 MR14 = 0x20 (global = 0x20) match
3907 11:05:39.291759 FSP_1, CH_1, RK1
3908 11:05:39.294908 Write Rank1 MR13 =0xd8
3909 11:05:39.298384 MR12 = 0x60 (global = 0x60) match
3910 11:05:39.301745 MR14 = 0x1e (global = 0x1e) match
3911 11:05:39.302123
3912 11:05:39.305131 [MEM_TEST] 02: After DFS, before run time config
3913 11:05:39.316525 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3914 11:05:39.316915
3915 11:05:39.317209 [TA2_TEST]
3916 11:05:39.317481 === TA2 HW
3917 11:05:39.319739 TA2 PAT: XTALK
3918 11:05:39.323465 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3919 11:05:39.330259 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3920 11:05:39.333001 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3921 11:05:39.336913 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3922 11:05:39.340253
3923 11:05:39.340737
3924 11:05:39.341033 Settings after calibration
3925 11:05:39.341306
3926 11:05:39.343313 [DramcRunTimeConfig]
3927 11:05:39.346424 TransferPLLToSPMControl - MODE SW PHYPLL
3928 11:05:39.346808 TX_TRACKING: ON
3929 11:05:39.350233 RX_TRACKING: ON
3930 11:05:39.350668 HW_GATING: ON
3931 11:05:39.353418 HW_GATING DBG: OFF
3932 11:05:39.353795 ddr_geometry:1
3933 11:05:39.356808 ddr_geometry:1
3934 11:05:39.357441 ddr_geometry:1
3935 11:05:39.357760 ddr_geometry:1
3936 11:05:39.359892 ddr_geometry:1
3937 11:05:39.360268 ddr_geometry:1
3938 11:05:39.363197 ddr_geometry:1
3939 11:05:39.363624 ddr_geometry:1
3940 11:05:39.366373 High Freq DUMMY_READ_FOR_TRACKING: ON
3941 11:05:39.369636 ZQCS_ENABLE_LP4: OFF
3942 11:05:39.373088 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3943 11:05:39.376658 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3944 11:05:39.377240 SPM_CONTROL_AFTERK: ON
3945 11:05:39.379652 IMPEDANCE_TRACKING: ON
3946 11:05:39.380028 TEMP_SENSOR: ON
3947 11:05:39.383164 PER_BANK_REFRESH: ON
3948 11:05:39.383625 HW_SAVE_FOR_SR: ON
3949 11:05:39.386167 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3950 11:05:39.389754 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3951 11:05:39.392989 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3952 11:05:39.396446 Read ODT Tracking: ON
3953 11:05:39.399857 =========================
3954 11:05:39.400234
3955 11:05:39.400576 [TA2_TEST]
3956 11:05:39.400860 === TA2 HW
3957 11:05:39.406172 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3958 11:05:39.409496 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3959 11:05:39.416118 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3960 11:05:39.419678 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3961 11:05:39.420123
3962 11:05:39.422838 [MEM_TEST] 03: After run time config
3963 11:05:39.434454 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3964 11:05:39.437770 [complex_mem_test] start addr:0x40024000, len:131072
3965 11:05:39.642666 1st complex R/W mem test pass
3966 11:05:39.648689 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3967 11:05:39.652102 sync preloader write leveling
3968 11:05:39.655123 sync preloader cbt_mr12
3969 11:05:39.658607 sync preloader cbt_clk_dly
3970 11:05:39.658990 sync preloader cbt_cmd_dly
3971 11:05:39.661856 sync preloader cbt_cs
3972 11:05:39.665077 sync preloader cbt_ca_perbit_delay
3973 11:05:39.665502 sync preloader clk_delay
3974 11:05:39.668229 sync preloader dqs_delay
3975 11:05:39.672035 sync preloader u1Gating2T_Save
3976 11:05:39.675170 sync preloader u1Gating05T_Save
3977 11:05:39.678710 sync preloader u1Gatingfine_tune_Save
3978 11:05:39.681916 sync preloader u1Gatingucpass_count_Save
3979 11:05:39.685157 sync preloader u1TxWindowPerbitVref_Save
3980 11:05:39.688241 sync preloader u1TxCenter_min_Save
3981 11:05:39.691637 sync preloader u1TxCenter_max_Save
3982 11:05:39.695534 sync preloader u1Txwin_center_Save
3983 11:05:39.698251 sync preloader u1Txfirst_pass_Save
3984 11:05:39.701614 sync preloader u1Txlast_pass_Save
3985 11:05:39.704820 sync preloader u1RxDatlat_Save
3986 11:05:39.708083 sync preloader u1RxWinPerbitVref_Save
3987 11:05:39.711507 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3988 11:05:39.715109 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3989 11:05:39.718450 sync preloader delay_cell_unit
3990 11:05:39.725338 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3991 11:05:39.727721 sync preloader write leveling
3992 11:05:39.728140 sync preloader cbt_mr12
3993 11:05:39.731271 sync preloader cbt_clk_dly
3994 11:05:39.735216 sync preloader cbt_cmd_dly
3995 11:05:39.735693 sync preloader cbt_cs
3996 11:05:39.738103 sync preloader cbt_ca_perbit_delay
3997 11:05:39.741189 sync preloader clk_delay
3998 11:05:39.744653 sync preloader dqs_delay
3999 11:05:39.748390 sync preloader u1Gating2T_Save
4000 11:05:39.748834 sync preloader u1Gating05T_Save
4001 11:05:39.751125 sync preloader u1Gatingfine_tune_Save
4002 11:05:39.757734 sync preloader u1Gatingucpass_count_Save
4003 11:05:39.761341 sync preloader u1TxWindowPerbitVref_Save
4004 11:05:39.764670 sync preloader u1TxCenter_min_Save
4005 11:05:39.765113 sync preloader u1TxCenter_max_Save
4006 11:05:39.768076 sync preloader u1Txwin_center_Save
4007 11:05:39.771304 sync preloader u1Txfirst_pass_Save
4008 11:05:39.774629 sync preloader u1Txlast_pass_Save
4009 11:05:39.778034 sync preloader u1RxDatlat_Save
4010 11:05:39.781493 sync preloader u1RxWinPerbitVref_Save
4011 11:05:39.784640 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4012 11:05:39.791344 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4013 11:05:39.791784 sync preloader delay_cell_unit
4014 11:05:39.798223 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4015 11:05:39.801312 sync preloader write leveling
4016 11:05:39.804869 sync preloader cbt_mr12
4017 11:05:39.808430 sync preloader cbt_clk_dly
4018 11:05:39.808832 sync preloader cbt_cmd_dly
4019 11:05:39.811699 sync preloader cbt_cs
4020 11:05:39.814986 sync preloader cbt_ca_perbit_delay
4021 11:05:39.815445 sync preloader clk_delay
4022 11:05:39.817706 sync preloader dqs_delay
4023 11:05:39.821460 sync preloader u1Gating2T_Save
4024 11:05:39.824516 sync preloader u1Gating05T_Save
4025 11:05:39.827624 sync preloader u1Gatingfine_tune_Save
4026 11:05:39.830937 sync preloader u1Gatingucpass_count_Save
4027 11:05:39.834852 sync preloader u1TxWindowPerbitVref_Save
4028 11:05:39.837853 sync preloader u1TxCenter_min_Save
4029 11:05:39.841057 sync preloader u1TxCenter_max_Save
4030 11:05:39.844407 sync preloader u1Txwin_center_Save
4031 11:05:39.847974 sync preloader u1Txfirst_pass_Save
4032 11:05:39.851635 sync preloader u1Txlast_pass_Save
4033 11:05:39.854474 sync preloader u1RxDatlat_Save
4034 11:05:39.858047 sync preloader u1RxWinPerbitVref_Save
4035 11:05:39.861208 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4036 11:05:39.864443 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4037 11:05:39.867598 sync preloader delay_cell_unit
4038 11:05:39.871419 just_for_test_dump_coreboot_params dump all params
4039 11:05:39.874464 dump source = 0x0
4040 11:05:39.874859 dump params frequency:1600
4041 11:05:39.877731 dump params rank number:2
4042 11:05:39.878105
4043 11:05:39.880816 dump params write leveling
4044 11:05:39.884532 write leveling[0][0][0] = 0x20
4045 11:05:39.887663 write leveling[0][0][1] = 0x18
4046 11:05:39.888043 write leveling[0][1][0] = 0x1a
4047 11:05:39.891359 write leveling[0][1][1] = 0x17
4048 11:05:39.894262 write leveling[1][0][0] = 0x21
4049 11:05:39.897600 write leveling[1][0][1] = 0x18
4050 11:05:39.900831 write leveling[1][1][0] = 0x23
4051 11:05:39.904033 write leveling[1][1][1] = 0x17
4052 11:05:39.904411 dump params cbt_cs
4053 11:05:39.907735 cbt_cs[0][0] = 0x8
4054 11:05:39.908286 cbt_cs[0][1] = 0x8
4055 11:05:39.910806 cbt_cs[1][0] = 0xa
4056 11:05:39.911181 cbt_cs[1][1] = 0xa
4057 11:05:39.914452 dump params cbt_mr12
4058 11:05:39.914910 cbt_mr12[0][0] = 0x20
4059 11:05:39.917443 cbt_mr12[0][1] = 0x1c
4060 11:05:39.917820 cbt_mr12[1][0] = 0x1c
4061 11:05:39.921083 cbt_mr12[1][1] = 0x20
4062 11:05:39.924276 dump params tx window
4063 11:05:39.924730 tx_center_min[0][0][0] = 981
4064 11:05:39.927634 tx_center_max[0][0][0] = 988
4065 11:05:39.931040 tx_center_min[0][0][1] = 976
4066 11:05:39.934804 tx_center_max[0][0][1] = 981
4067 11:05:39.937822 tx_center_min[0][1][0] = 979
4068 11:05:39.938282 tx_center_max[0][1][0] = 985
4069 11:05:39.941052 tx_center_min[0][1][1] = 977
4070 11:05:39.944261 tx_center_max[0][1][1] = 982
4071 11:05:39.947777 tx_center_min[1][0][0] = 988
4072 11:05:39.951164 tx_center_max[1][0][0] = 993
4073 11:05:39.951638 tx_center_min[1][0][1] = 976
4074 11:05:39.954147 tx_center_max[1][0][1] = 983
4075 11:05:39.957669 tx_center_min[1][1][0] = 987
4076 11:05:39.960609 tx_center_max[1][1][0] = 992
4077 11:05:39.964154 tx_center_min[1][1][1] = 974
4078 11:05:39.964581 tx_center_max[1][1][1] = 980
4079 11:05:39.967348 dump params tx window
4080 11:05:39.970810 tx_win_center[0][0][0] = 988
4081 11:05:39.974199 tx_first_pass[0][0][0] = 976
4082 11:05:39.974659 tx_last_pass[0][0][0] = 1000
4083 11:05:39.977866 tx_win_center[0][0][1] = 987
4084 11:05:39.981156 tx_first_pass[0][0][1] = 975
4085 11:05:39.984300 tx_last_pass[0][0][1] = 999
4086 11:05:39.984825 tx_win_center[0][0][2] = 987
4087 11:05:39.987768 tx_first_pass[0][0][2] = 975
4088 11:05:39.991005 tx_last_pass[0][0][2] = 1000
4089 11:05:39.994087 tx_win_center[0][0][3] = 981
4090 11:05:39.997329 tx_first_pass[0][0][3] = 969
4091 11:05:39.997718 tx_last_pass[0][0][3] = 993
4092 11:05:40.000710 tx_win_center[0][0][4] = 986
4093 11:05:40.004181 tx_first_pass[0][0][4] = 974
4094 11:05:40.007728 tx_last_pass[0][0][4] = 998
4095 11:05:40.008116 tx_win_center[0][0][5] = 983
4096 11:05:40.010673 tx_first_pass[0][0][5] = 971
4097 11:05:40.014280 tx_last_pass[0][0][5] = 996
4098 11:05:40.017485 tx_win_center[0][0][6] = 985
4099 11:05:40.017902 tx_first_pass[0][0][6] = 973
4100 11:05:40.020922 tx_last_pass[0][0][6] = 997
4101 11:05:40.023959 tx_win_center[0][0][7] = 987
4102 11:05:40.027550 tx_first_pass[0][0][7] = 975
4103 11:05:40.030879 tx_last_pass[0][0][7] = 999
4104 11:05:40.031267 tx_win_center[0][0][8] = 976
4105 11:05:40.034551 tx_first_pass[0][0][8] = 964
4106 11:05:40.037932 tx_last_pass[0][0][8] = 988
4107 11:05:40.041040 tx_win_center[0][0][9] = 978
4108 11:05:40.041425 tx_first_pass[0][0][9] = 967
4109 11:05:40.044243 tx_last_pass[0][0][9] = 990
4110 11:05:40.047554 tx_win_center[0][0][10] = 981
4111 11:05:40.051140 tx_first_pass[0][0][10] = 969
4112 11:05:40.054362 tx_last_pass[0][0][10] = 993
4113 11:05:40.054819 tx_win_center[0][0][11] = 977
4114 11:05:40.057964 tx_first_pass[0][0][11] = 965
4115 11:05:40.060672 tx_last_pass[0][0][11] = 989
4116 11:05:40.064121 tx_win_center[0][0][12] = 979
4117 11:05:40.067824 tx_first_pass[0][0][12] = 967
4118 11:05:40.068210 tx_last_pass[0][0][12] = 991
4119 11:05:40.071106 tx_win_center[0][0][13] = 978
4120 11:05:40.073962 tx_first_pass[0][0][13] = 967
4121 11:05:40.078100 tx_last_pass[0][0][13] = 990
4122 11:05:40.080873 tx_win_center[0][0][14] = 979
4123 11:05:40.081256 tx_first_pass[0][0][14] = 967
4124 11:05:40.084403 tx_last_pass[0][0][14] = 991
4125 11:05:40.087434 tx_win_center[0][0][15] = 981
4126 11:05:40.090860 tx_first_pass[0][0][15] = 969
4127 11:05:40.094154 tx_last_pass[0][0][15] = 993
4128 11:05:40.094542 tx_win_center[0][1][0] = 985
4129 11:05:40.097564 tx_first_pass[0][1][0] = 973
4130 11:05:40.100592 tx_last_pass[0][1][0] = 998
4131 11:05:40.104291 tx_win_center[0][1][1] = 983
4132 11:05:40.107171 tx_first_pass[0][1][1] = 972
4133 11:05:40.107551 tx_last_pass[0][1][1] = 995
4134 11:05:40.111320 tx_win_center[0][1][2] = 985
4135 11:05:40.114351 tx_first_pass[0][1][2] = 974
4136 11:05:40.117414 tx_last_pass[0][1][2] = 997
4137 11:05:40.117807 tx_win_center[0][1][3] = 979
4138 11:05:40.120974 tx_first_pass[0][1][3] = 967
4139 11:05:40.124689 tx_last_pass[0][1][3] = 991
4140 11:05:40.127547 tx_win_center[0][1][4] = 983
4141 11:05:40.130616 tx_first_pass[0][1][4] = 970
4142 11:05:40.130999 tx_last_pass[0][1][4] = 996
4143 11:05:40.134198 tx_win_center[0][1][5] = 980
4144 11:05:40.137720 tx_first_pass[0][1][5] = 968
4145 11:05:40.140404 tx_last_pass[0][1][5] = 993
4146 11:05:40.140835 tx_win_center[0][1][6] = 982
4147 11:05:40.143981 tx_first_pass[0][1][6] = 969
4148 11:05:40.147165 tx_last_pass[0][1][6] = 995
4149 11:05:40.151017 tx_win_center[0][1][7] = 983
4150 11:05:40.153841 tx_first_pass[0][1][7] = 970
4151 11:05:40.154290 tx_last_pass[0][1][7] = 996
4152 11:05:40.157575 tx_win_center[0][1][8] = 977
4153 11:05:40.160651 tx_first_pass[0][1][8] = 965
4154 11:05:40.164660 tx_last_pass[0][1][8] = 989
4155 11:05:40.165206 tx_win_center[0][1][9] = 978
4156 11:05:40.167566 tx_first_pass[0][1][9] = 967
4157 11:05:40.170853 tx_last_pass[0][1][9] = 990
4158 11:05:40.173964 tx_win_center[0][1][10] = 982
4159 11:05:40.177369 tx_first_pass[0][1][10] = 970
4160 11:05:40.177870 tx_last_pass[0][1][10] = 995
4161 11:05:40.180623 tx_win_center[0][1][11] = 977
4162 11:05:40.184216 tx_first_pass[0][1][11] = 966
4163 11:05:40.187371 tx_last_pass[0][1][11] = 989
4164 11:05:40.190656 tx_win_center[0][1][12] = 979
4165 11:05:40.191037 tx_first_pass[0][1][12] = 967
4166 11:05:40.194017 tx_last_pass[0][1][12] = 991
4167 11:05:40.197583 tx_win_center[0][1][13] = 979
4168 11:05:40.200373 tx_first_pass[0][1][13] = 968
4169 11:05:40.204565 tx_last_pass[0][1][13] = 990
4170 11:05:40.205030 tx_win_center[0][1][14] = 979
4171 11:05:40.207502 tx_first_pass[0][1][14] = 967
4172 11:05:40.210684 tx_last_pass[0][1][14] = 991
4173 11:05:40.213908 tx_win_center[0][1][15] = 981
4174 11:05:40.217431 tx_first_pass[0][1][15] = 969
4175 11:05:40.217899 tx_last_pass[0][1][15] = 994
4176 11:05:40.220815 tx_win_center[1][0][0] = 992
4177 11:05:40.223690 tx_first_pass[1][0][0] = 979
4178 11:05:40.227376 tx_last_pass[1][0][0] = 1006
4179 11:05:40.230568 tx_win_center[1][0][1] = 991
4180 11:05:40.231071 tx_first_pass[1][0][1] = 978
4181 11:05:40.234176 tx_last_pass[1][0][1] = 1004
4182 11:05:40.237024 tx_win_center[1][0][2] = 989
4183 11:05:40.240659 tx_first_pass[1][0][2] = 978
4184 11:05:40.241134 tx_last_pass[1][0][2] = 1001
4185 11:05:40.243911 tx_win_center[1][0][3] = 988
4186 11:05:40.247916 tx_first_pass[1][0][3] = 976
4187 11:05:40.250799 tx_last_pass[1][0][3] = 1000
4188 11:05:40.253604 tx_win_center[1][0][4] = 991
4189 11:05:40.253981 tx_first_pass[1][0][4] = 979
4190 11:05:40.257151 tx_last_pass[1][0][4] = 1004
4191 11:05:40.260680 tx_win_center[1][0][5] = 993
4192 11:05:40.263869 tx_first_pass[1][0][5] = 980
4193 11:05:40.267258 tx_last_pass[1][0][5] = 1006
4194 11:05:40.267796 tx_win_center[1][0][6] = 991
4195 11:05:40.270678 tx_first_pass[1][0][6] = 978
4196 11:05:40.273981 tx_last_pass[1][0][6] = 1004
4197 11:05:40.277350 tx_win_center[1][0][7] = 991
4198 11:05:40.277851 tx_first_pass[1][0][7] = 978
4199 11:05:40.280421 tx_last_pass[1][0][7] = 1004
4200 11:05:40.283826 tx_win_center[1][0][8] = 980
4201 11:05:40.286841 tx_first_pass[1][0][8] = 968
4202 11:05:40.290099 tx_last_pass[1][0][8] = 992
4203 11:05:40.290483 tx_win_center[1][0][9] = 979
4204 11:05:40.293505 tx_first_pass[1][0][9] = 968
4205 11:05:40.297040 tx_last_pass[1][0][9] = 991
4206 11:05:40.299741 tx_win_center[1][0][10] = 981
4207 11:05:40.302905 tx_first_pass[1][0][10] = 970
4208 11:05:40.302990 tx_last_pass[1][0][10] = 993
4209 11:05:40.306173 tx_win_center[1][0][11] = 982
4210 11:05:40.310334 tx_first_pass[1][0][11] = 970
4211 11:05:40.313295 tx_last_pass[1][0][11] = 994
4212 11:05:40.316186 tx_win_center[1][0][12] = 982
4213 11:05:40.316269 tx_first_pass[1][0][12] = 970
4214 11:05:40.319911 tx_last_pass[1][0][12] = 994
4215 11:05:40.323092 tx_win_center[1][0][13] = 983
4216 11:05:40.326321 tx_first_pass[1][0][13] = 972
4217 11:05:40.329430 tx_last_pass[1][0][13] = 994
4218 11:05:40.329514 tx_win_center[1][0][14] = 981
4219 11:05:40.333185 tx_first_pass[1][0][14] = 970
4220 11:05:40.336363 tx_last_pass[1][0][14] = 993
4221 11:05:40.339515 tx_win_center[1][0][15] = 976
4222 11:05:40.342922 tx_first_pass[1][0][15] = 965
4223 11:05:40.343006 tx_last_pass[1][0][15] = 987
4224 11:05:40.346044 tx_win_center[1][1][0] = 992
4225 11:05:40.349642 tx_first_pass[1][1][0] = 978
4226 11:05:40.352933 tx_last_pass[1][1][0] = 1006
4227 11:05:40.356115 tx_win_center[1][1][1] = 991
4228 11:05:40.356198 tx_first_pass[1][1][1] = 978
4229 11:05:40.359245 tx_last_pass[1][1][1] = 1005
4230 11:05:40.362754 tx_win_center[1][1][2] = 989
4231 11:05:40.365960 tx_first_pass[1][1][2] = 977
4232 11:05:40.369207 tx_last_pass[1][1][2] = 1002
4233 11:05:40.369290 tx_win_center[1][1][3] = 987
4234 11:05:40.372735 tx_first_pass[1][1][3] = 975
4235 11:05:40.375813 tx_last_pass[1][1][3] = 999
4236 11:05:40.379294 tx_win_center[1][1][4] = 991
4237 11:05:40.382724 tx_first_pass[1][1][4] = 978
4238 11:05:40.382808 tx_last_pass[1][1][4] = 1004
4239 11:05:40.385966 tx_win_center[1][1][5] = 992
4240 11:05:40.389548 tx_first_pass[1][1][5] = 979
4241 11:05:40.392348 tx_last_pass[1][1][5] = 1005
4242 11:05:40.392464 tx_win_center[1][1][6] = 991
4243 11:05:40.395868 tx_first_pass[1][1][6] = 978
4244 11:05:40.399347 tx_last_pass[1][1][6] = 1005
4245 11:05:40.403232 tx_win_center[1][1][7] = 990
4246 11:05:40.405856 tx_first_pass[1][1][7] = 978
4247 11:05:40.405940 tx_last_pass[1][1][7] = 1003
4248 11:05:40.409241 tx_win_center[1][1][8] = 977
4249 11:05:40.412759 tx_first_pass[1][1][8] = 965
4250 11:05:40.415964 tx_last_pass[1][1][8] = 989
4251 11:05:40.416048 tx_win_center[1][1][9] = 977
4252 11:05:40.419391 tx_first_pass[1][1][9] = 965
4253 11:05:40.422472 tx_last_pass[1][1][9] = 989
4254 11:05:40.426420 tx_win_center[1][1][10] = 979
4255 11:05:40.429065 tx_first_pass[1][1][10] = 968
4256 11:05:40.429148 tx_last_pass[1][1][10] = 991
4257 11:05:40.432415 tx_win_center[1][1][11] = 980
4258 11:05:40.436262 tx_first_pass[1][1][11] = 968
4259 11:05:40.439439 tx_last_pass[1][1][11] = 992
4260 11:05:40.442485 tx_win_center[1][1][12] = 980
4261 11:05:40.442569 tx_first_pass[1][1][12] = 969
4262 11:05:40.445705 tx_last_pass[1][1][12] = 992
4263 11:05:40.448962 tx_win_center[1][1][13] = 980
4264 11:05:40.452650 tx_first_pass[1][1][13] = 969
4265 11:05:40.456223 tx_last_pass[1][1][13] = 992
4266 11:05:40.456305 tx_win_center[1][1][14] = 979
4267 11:05:40.459077 tx_first_pass[1][1][14] = 968
4268 11:05:40.462233 tx_last_pass[1][1][14] = 991
4269 11:05:40.465534 tx_win_center[1][1][15] = 974
4270 11:05:40.469587 tx_first_pass[1][1][15] = 962
4271 11:05:40.469670 tx_last_pass[1][1][15] = 986
4272 11:05:40.472773 dump params rx window
4273 11:05:40.476214 rx_firspass[0][0][0] = 5
4274 11:05:40.476366 rx_lastpass[0][0][0] = 38
4275 11:05:40.479329 rx_firspass[0][0][1] = 5
4276 11:05:40.482567 rx_lastpass[0][0][1] = 36
4277 11:05:40.485837 rx_firspass[0][0][2] = 6
4278 11:05:40.485966 rx_lastpass[0][0][2] = 36
4279 11:05:40.489154 rx_firspass[0][0][3] = -2
4280 11:05:40.492418 rx_lastpass[0][0][3] = 30
4281 11:05:40.492577 rx_firspass[0][0][4] = 5
4282 11:05:40.496022 rx_lastpass[0][0][4] = 36
4283 11:05:40.499294 rx_firspass[0][0][5] = 2
4284 11:05:40.499441 rx_lastpass[0][0][5] = 31
4285 11:05:40.502742 rx_firspass[0][0][6] = 3
4286 11:05:40.505996 rx_lastpass[0][0][6] = 33
4287 11:05:40.509599 rx_firspass[0][0][7] = 5
4288 11:05:40.509802 rx_lastpass[0][0][7] = 36
4289 11:05:40.512531 rx_firspass[0][0][8] = -3
4290 11:05:40.516080 rx_lastpass[0][0][8] = 32
4291 11:05:40.516325 rx_firspass[0][0][9] = 1
4292 11:05:40.519331 rx_lastpass[0][0][9] = 32
4293 11:05:40.522722 rx_firspass[0][0][10] = 8
4294 11:05:40.526271 rx_lastpass[0][0][10] = 40
4295 11:05:40.526665 rx_firspass[0][0][11] = 1
4296 11:05:40.529375 rx_lastpass[0][0][11] = 32
4297 11:05:40.532807 rx_firspass[0][0][12] = 2
4298 11:05:40.533187 rx_lastpass[0][0][12] = 36
4299 11:05:40.535982 rx_firspass[0][0][13] = 3
4300 11:05:40.539468 rx_lastpass[0][0][13] = 33
4301 11:05:40.542707 rx_firspass[0][0][14] = 2
4302 11:05:40.543195 rx_lastpass[0][0][14] = 37
4303 11:05:40.546081 rx_firspass[0][0][15] = 6
4304 11:05:40.549274 rx_lastpass[0][0][15] = 37
4305 11:05:40.549649 rx_firspass[0][1][0] = 5
4306 11:05:40.552500 rx_lastpass[0][1][0] = 40
4307 11:05:40.556380 rx_firspass[0][1][1] = 5
4308 11:05:40.559440 rx_lastpass[0][1][1] = 38
4309 11:05:40.559814 rx_firspass[0][1][2] = 6
4310 11:05:40.562589 rx_lastpass[0][1][2] = 38
4311 11:05:40.566427 rx_firspass[0][1][3] = -2
4312 11:05:40.566820 rx_lastpass[0][1][3] = 33
4313 11:05:40.569554 rx_firspass[0][1][4] = 5
4314 11:05:40.573122 rx_lastpass[0][1][4] = 39
4315 11:05:40.573499 rx_firspass[0][1][5] = 1
4316 11:05:40.576275 rx_lastpass[0][1][5] = 34
4317 11:05:40.579654 rx_firspass[0][1][6] = 3
4318 11:05:40.582606 rx_lastpass[0][1][6] = 37
4319 11:05:40.582954 rx_firspass[0][1][7] = 3
4320 11:05:40.585845 rx_lastpass[0][1][7] = 38
4321 11:05:40.589368 rx_firspass[0][1][8] = -2
4322 11:05:40.589772 rx_lastpass[0][1][8] = 32
4323 11:05:40.592533 rx_firspass[0][1][9] = 1
4324 11:05:40.595924 rx_lastpass[0][1][9] = 36
4325 11:05:40.599471 rx_firspass[0][1][10] = 7
4326 11:05:40.599850 rx_lastpass[0][1][10] = 43
4327 11:05:40.602761 rx_firspass[0][1][11] = -2
4328 11:05:40.605694 rx_lastpass[0][1][11] = 34
4329 11:05:40.606083 rx_firspass[0][1][12] = 1
4330 11:05:40.609381 rx_lastpass[0][1][12] = 37
4331 11:05:40.612445 rx_firspass[0][1][13] = 2
4332 11:05:40.616409 rx_lastpass[0][1][13] = 35
4333 11:05:40.616922 rx_firspass[0][1][14] = 2
4334 11:05:40.619252 rx_lastpass[0][1][14] = 37
4335 11:05:40.622563 rx_firspass[0][1][15] = 6
4336 11:05:40.625997 rx_lastpass[0][1][15] = 39
4337 11:05:40.626380 rx_firspass[1][0][0] = 5
4338 11:05:40.628997 rx_lastpass[1][0][0] = 39
4339 11:05:40.632625 rx_firspass[1][0][1] = 5
4340 11:05:40.633011 rx_lastpass[1][0][1] = 38
4341 11:05:40.636232 rx_firspass[1][0][2] = 2
4342 11:05:40.639358 rx_lastpass[1][0][2] = 35
4343 11:05:40.639738 rx_firspass[1][0][3] = 0
4344 11:05:40.642483 rx_lastpass[1][0][3] = 33
4345 11:05:40.645935 rx_firspass[1][0][4] = 5
4346 11:05:40.649179 rx_lastpass[1][0][4] = 38
4347 11:05:40.649566 rx_firspass[1][0][5] = 7
4348 11:05:40.652360 rx_lastpass[1][0][5] = 39
4349 11:05:40.655934 rx_firspass[1][0][6] = 7
4350 11:05:40.656314 rx_lastpass[1][0][6] = 40
4351 11:05:40.659414 rx_firspass[1][0][7] = 5
4352 11:05:40.662531 rx_lastpass[1][0][7] = 38
4353 11:05:40.662922 rx_firspass[1][0][8] = 1
4354 11:05:40.666253 rx_lastpass[1][0][8] = 33
4355 11:05:40.669255 rx_firspass[1][0][9] = 1
4356 11:05:40.672857 rx_lastpass[1][0][9] = 32
4357 11:05:40.673322 rx_firspass[1][0][10] = 5
4358 11:05:40.676184 rx_lastpass[1][0][10] = 35
4359 11:05:40.679427 rx_firspass[1][0][11] = 6
4360 11:05:40.679809 rx_lastpass[1][0][11] = 38
4361 11:05:40.683021 rx_firspass[1][0][12] = 6
4362 11:05:40.686115 rx_lastpass[1][0][12] = 38
4363 11:05:40.689452 rx_firspass[1][0][13] = 6
4364 11:05:40.689839 rx_lastpass[1][0][13] = 37
4365 11:05:40.692650 rx_firspass[1][0][14] = 7
4366 11:05:40.695676 rx_lastpass[1][0][14] = 38
4367 11:05:40.696061 rx_firspass[1][0][15] = -3
4368 11:05:40.699543 rx_lastpass[1][0][15] = 30
4369 11:05:40.702728 rx_firspass[1][1][0] = 4
4370 11:05:40.705935 rx_lastpass[1][1][0] = 40
4371 11:05:40.706323 rx_firspass[1][1][1] = 4
4372 11:05:40.709355 rx_lastpass[1][1][1] = 39
4373 11:05:40.712518 rx_firspass[1][1][2] = 0
4374 11:05:40.712904 rx_lastpass[1][1][2] = 36
4375 11:05:40.715606 rx_firspass[1][1][3] = -3
4376 11:05:40.719234 rx_lastpass[1][1][3] = 34
4377 11:05:40.722590 rx_firspass[1][1][4] = 4
4378 11:05:40.723066 rx_lastpass[1][1][4] = 39
4379 11:05:40.725815 rx_firspass[1][1][5] = 5
4380 11:05:40.729157 rx_lastpass[1][1][5] = 40
4381 11:05:40.729753 rx_firspass[1][1][6] = 5
4382 11:05:40.732327 rx_lastpass[1][1][6] = 41
4383 11:05:40.735954 rx_firspass[1][1][7] = 3
4384 11:05:40.736421 rx_lastpass[1][1][7] = 38
4385 11:05:40.739944 rx_firspass[1][1][8] = 0
4386 11:05:40.742587 rx_lastpass[1][1][8] = 35
4387 11:05:40.745763 rx_firspass[1][1][9] = -1
4388 11:05:40.746227 rx_lastpass[1][1][9] = 34
4389 11:05:40.749010 rx_firspass[1][1][10] = 4
4390 11:05:40.752372 rx_lastpass[1][1][10] = 39
4391 11:05:40.752869 rx_firspass[1][1][11] = 4
4392 11:05:40.755696 rx_lastpass[1][1][11] = 40
4393 11:05:40.759343 rx_firspass[1][1][12] = 4
4394 11:05:40.762487 rx_lastpass[1][1][12] = 40
4395 11:05:40.762952 rx_firspass[1][1][13] = 4
4396 11:05:40.765863 rx_lastpass[1][1][13] = 39
4397 11:05:40.769241 rx_firspass[1][1][14] = 5
4398 11:05:40.772055 rx_lastpass[1][1][14] = 40
4399 11:05:40.772439 rx_firspass[1][1][15] = -3
4400 11:05:40.775695 rx_lastpass[1][1][15] = 31
4401 11:05:40.778946 dump params clk_delay
4402 11:05:40.779336 clk_delay[0] = 1
4403 11:05:40.782272 clk_delay[1] = 0
4404 11:05:40.782740 dump params dqs_delay
4405 11:05:40.786044 dqs_delay[0][0] = -2
4406 11:05:40.786509 dqs_delay[0][1] = 0
4407 11:05:40.789008 dqs_delay[1][0] = 0
4408 11:05:40.789393 dqs_delay[1][1] = 0
4409 11:05:40.792126 dump params delay_cell_unit = 735
4410 11:05:40.796064 dump source = 0x0
4411 11:05:40.798856 dump params frequency:1200
4412 11:05:40.799317 dump params rank number:2
4413 11:05:40.799618
4414 11:05:40.801861 dump params write leveling
4415 11:05:40.805912 write leveling[0][0][0] = 0x0
4416 11:05:40.809014 write leveling[0][0][1] = 0x0
4417 11:05:40.809399 write leveling[0][1][0] = 0x0
4418 11:05:40.812547 write leveling[0][1][1] = 0x0
4419 11:05:40.815845 write leveling[1][0][0] = 0x0
4420 11:05:40.819133 write leveling[1][0][1] = 0x0
4421 11:05:40.822438 write leveling[1][1][0] = 0x0
4422 11:05:40.822940 write leveling[1][1][1] = 0x0
4423 11:05:40.826182 dump params cbt_cs
4424 11:05:40.826686 cbt_cs[0][0] = 0x0
4425 11:05:40.829154 cbt_cs[0][1] = 0x0
4426 11:05:40.829577 cbt_cs[1][0] = 0x0
4427 11:05:40.832120 cbt_cs[1][1] = 0x0
4428 11:05:40.835477 dump params cbt_mr12
4429 11:05:40.835859 cbt_mr12[0][0] = 0x0
4430 11:05:40.839168 cbt_mr12[0][1] = 0x0
4431 11:05:40.839630 cbt_mr12[1][0] = 0x0
4432 11:05:40.842563 cbt_mr12[1][1] = 0x0
4433 11:05:40.843025 dump params tx window
4434 11:05:40.845785 tx_center_min[0][0][0] = 0
4435 11:05:40.849124 tx_center_max[0][0][0] = 0
4436 11:05:40.851986 tx_center_min[0][0][1] = 0
4437 11:05:40.852369 tx_center_max[0][0][1] = 0
4438 11:05:40.855641 tx_center_min[0][1][0] = 0
4439 11:05:40.859369 tx_center_max[0][1][0] = 0
4440 11:05:40.862400 tx_center_min[0][1][1] = 0
4441 11:05:40.862900 tx_center_max[0][1][1] = 0
4442 11:05:40.866018 tx_center_min[1][0][0] = 0
4443 11:05:40.869036 tx_center_max[1][0][0] = 0
4444 11:05:40.872529 tx_center_min[1][0][1] = 0
4445 11:05:40.873031 tx_center_max[1][0][1] = 0
4446 11:05:40.875720 tx_center_min[1][1][0] = 0
4447 11:05:40.879004 tx_center_max[1][1][0] = 0
4448 11:05:40.879424 tx_center_min[1][1][1] = 0
4449 11:05:40.882733 tx_center_max[1][1][1] = 0
4450 11:05:40.886007 dump params tx window
4451 11:05:40.888830 tx_win_center[0][0][0] = 0
4452 11:05:40.889213 tx_first_pass[0][0][0] = 0
4453 11:05:40.892361 tx_last_pass[0][0][0] = 0
4454 11:05:40.895636 tx_win_center[0][0][1] = 0
4455 11:05:40.896019 tx_first_pass[0][0][1] = 0
4456 11:05:40.899087 tx_last_pass[0][0][1] = 0
4457 11:05:40.902151 tx_win_center[0][0][2] = 0
4458 11:05:40.905624 tx_first_pass[0][0][2] = 0
4459 11:05:40.906086 tx_last_pass[0][0][2] = 0
4460 11:05:40.909284 tx_win_center[0][0][3] = 0
4461 11:05:40.912438 tx_first_pass[0][0][3] = 0
4462 11:05:40.915915 tx_last_pass[0][0][3] = 0
4463 11:05:40.916413 tx_win_center[0][0][4] = 0
4464 11:05:40.919174 tx_first_pass[0][0][4] = 0
4465 11:05:40.922228 tx_last_pass[0][0][4] = 0
4466 11:05:40.922735 tx_win_center[0][0][5] = 0
4467 11:05:40.925428 tx_first_pass[0][0][5] = 0
4468 11:05:40.929331 tx_last_pass[0][0][5] = 0
4469 11:05:40.932342 tx_win_center[0][0][6] = 0
4470 11:05:40.932845 tx_first_pass[0][0][6] = 0
4471 11:05:40.936138 tx_last_pass[0][0][6] = 0
4472 11:05:40.939115 tx_win_center[0][0][7] = 0
4473 11:05:40.941847 tx_first_pass[0][0][7] = 0
4474 11:05:40.942285 tx_last_pass[0][0][7] = 0
4475 11:05:40.945485 tx_win_center[0][0][8] = 0
4476 11:05:40.948979 tx_first_pass[0][0][8] = 0
4477 11:05:40.949483 tx_last_pass[0][0][8] = 0
4478 11:05:40.952697 tx_win_center[0][0][9] = 0
4479 11:05:40.955155 tx_first_pass[0][0][9] = 0
4480 11:05:40.959350 tx_last_pass[0][0][9] = 0
4481 11:05:40.959931 tx_win_center[0][0][10] = 0
4482 11:05:40.962868 tx_first_pass[0][0][10] = 0
4483 11:05:40.965510 tx_last_pass[0][0][10] = 0
4484 11:05:40.968796 tx_win_center[0][0][11] = 0
4485 11:05:40.969226 tx_first_pass[0][0][11] = 0
4486 11:05:40.971954 tx_last_pass[0][0][11] = 0
4487 11:05:40.975174 tx_win_center[0][0][12] = 0
4488 11:05:40.979118 tx_first_pass[0][0][12] = 0
4489 11:05:40.979757 tx_last_pass[0][0][12] = 0
4490 11:05:40.982388 tx_win_center[0][0][13] = 0
4491 11:05:40.985438 tx_first_pass[0][0][13] = 0
4492 11:05:40.988918 tx_last_pass[0][0][13] = 0
4493 11:05:40.989426 tx_win_center[0][0][14] = 0
4494 11:05:40.991757 tx_first_pass[0][0][14] = 0
4495 11:05:40.995195 tx_last_pass[0][0][14] = 0
4496 11:05:40.998682 tx_win_center[0][0][15] = 0
4497 11:05:40.999146 tx_first_pass[0][0][15] = 0
4498 11:05:41.001690 tx_last_pass[0][0][15] = 0
4499 11:05:41.005337 tx_win_center[0][1][0] = 0
4500 11:05:41.008547 tx_first_pass[0][1][0] = 0
4501 11:05:41.008964 tx_last_pass[0][1][0] = 0
4502 11:05:41.011892 tx_win_center[0][1][1] = 0
4503 11:05:41.015358 tx_first_pass[0][1][1] = 0
4504 11:05:41.018636 tx_last_pass[0][1][1] = 0
4505 11:05:41.019161 tx_win_center[0][1][2] = 0
4506 11:05:41.022328 tx_first_pass[0][1][2] = 0
4507 11:05:41.024820 tx_last_pass[0][1][2] = 0
4508 11:05:41.025413 tx_win_center[0][1][3] = 0
4509 11:05:41.028723 tx_first_pass[0][1][3] = 0
4510 11:05:41.031742 tx_last_pass[0][1][3] = 0
4511 11:05:41.035651 tx_win_center[0][1][4] = 0
4512 11:05:41.036154 tx_first_pass[0][1][4] = 0
4513 11:05:41.038940 tx_last_pass[0][1][4] = 0
4514 11:05:41.042246 tx_win_center[0][1][5] = 0
4515 11:05:41.045323 tx_first_pass[0][1][5] = 0
4516 11:05:41.045832 tx_last_pass[0][1][5] = 0
4517 11:05:41.048690 tx_win_center[0][1][6] = 0
4518 11:05:41.051898 tx_first_pass[0][1][6] = 0
4519 11:05:41.052402 tx_last_pass[0][1][6] = 0
4520 11:05:41.054858 tx_win_center[0][1][7] = 0
4521 11:05:41.058651 tx_first_pass[0][1][7] = 0
4522 11:05:41.061880 tx_last_pass[0][1][7] = 0
4523 11:05:41.062381 tx_win_center[0][1][8] = 0
4524 11:05:41.065191 tx_first_pass[0][1][8] = 0
4525 11:05:41.068676 tx_last_pass[0][1][8] = 0
4526 11:05:41.069201 tx_win_center[0][1][9] = 0
4527 11:05:41.072134 tx_first_pass[0][1][9] = 0
4528 11:05:41.075708 tx_last_pass[0][1][9] = 0
4529 11:05:41.078116 tx_win_center[0][1][10] = 0
4530 11:05:41.078543 tx_first_pass[0][1][10] = 0
4531 11:05:41.082080 tx_last_pass[0][1][10] = 0
4532 11:05:41.084922 tx_win_center[0][1][11] = 0
4533 11:05:41.088618 tx_first_pass[0][1][11] = 0
4534 11:05:41.089122 tx_last_pass[0][1][11] = 0
4535 11:05:41.092071 tx_win_center[0][1][12] = 0
4536 11:05:41.094680 tx_first_pass[0][1][12] = 0
4537 11:05:41.098515 tx_last_pass[0][1][12] = 0
4538 11:05:41.099025 tx_win_center[0][1][13] = 0
4539 11:05:41.101594 tx_first_pass[0][1][13] = 0
4540 11:05:41.105170 tx_last_pass[0][1][13] = 0
4541 11:05:41.108263 tx_win_center[0][1][14] = 0
4542 11:05:41.111305 tx_first_pass[0][1][14] = 0
4543 11:05:41.111729 tx_last_pass[0][1][14] = 0
4544 11:05:41.115097 tx_win_center[0][1][15] = 0
4545 11:05:41.118393 tx_first_pass[0][1][15] = 0
4546 11:05:41.118896 tx_last_pass[0][1][15] = 0
4547 11:05:41.121605 tx_win_center[1][0][0] = 0
4548 11:05:41.125001 tx_first_pass[1][0][0] = 0
4549 11:05:41.128545 tx_last_pass[1][0][0] = 0
4550 11:05:41.129052 tx_win_center[1][0][1] = 0
4551 11:05:41.131171 tx_first_pass[1][0][1] = 0
4552 11:05:41.134904 tx_last_pass[1][0][1] = 0
4553 11:05:41.138056 tx_win_center[1][0][2] = 0
4554 11:05:41.138571 tx_first_pass[1][0][2] = 0
4555 11:05:41.141910 tx_last_pass[1][0][2] = 0
4556 11:05:41.144944 tx_win_center[1][0][3] = 0
4557 11:05:41.145368 tx_first_pass[1][0][3] = 0
4558 11:05:41.148417 tx_last_pass[1][0][3] = 0
4559 11:05:41.151476 tx_win_center[1][0][4] = 0
4560 11:05:41.154859 tx_first_pass[1][0][4] = 0
4561 11:05:41.155284 tx_last_pass[1][0][4] = 0
4562 11:05:41.158560 tx_win_center[1][0][5] = 0
4563 11:05:41.161351 tx_first_pass[1][0][5] = 0
4564 11:05:41.164997 tx_last_pass[1][0][5] = 0
4565 11:05:41.165464 tx_win_center[1][0][6] = 0
4566 11:05:41.168090 tx_first_pass[1][0][6] = 0
4567 11:05:41.171239 tx_last_pass[1][0][6] = 0
4568 11:05:41.171834 tx_win_center[1][0][7] = 0
4569 11:05:41.174376 tx_first_pass[1][0][7] = 0
4570 11:05:41.177538 tx_last_pass[1][0][7] = 0
4571 11:05:41.181469 tx_win_center[1][0][8] = 0
4572 11:05:41.181934 tx_first_pass[1][0][8] = 0
4573 11:05:41.184992 tx_last_pass[1][0][8] = 0
4574 11:05:41.187742 tx_win_center[1][0][9] = 0
4575 11:05:41.190901 tx_first_pass[1][0][9] = 0
4576 11:05:41.191431 tx_last_pass[1][0][9] = 0
4577 11:05:41.194490 tx_win_center[1][0][10] = 0
4578 11:05:41.198020 tx_first_pass[1][0][10] = 0
4579 11:05:41.201048 tx_last_pass[1][0][10] = 0
4580 11:05:41.201430 tx_win_center[1][0][11] = 0
4581 11:05:41.204927 tx_first_pass[1][0][11] = 0
4582 11:05:41.207739 tx_last_pass[1][0][11] = 0
4583 11:05:41.210671 tx_win_center[1][0][12] = 0
4584 11:05:41.211052 tx_first_pass[1][0][12] = 0
4585 11:05:41.214448 tx_last_pass[1][0][12] = 0
4586 11:05:41.217534 tx_win_center[1][0][13] = 0
4587 11:05:41.221062 tx_first_pass[1][0][13] = 0
4588 11:05:41.221539 tx_last_pass[1][0][13] = 0
4589 11:05:41.224579 tx_win_center[1][0][14] = 0
4590 11:05:41.228127 tx_first_pass[1][0][14] = 0
4591 11:05:41.231257 tx_last_pass[1][0][14] = 0
4592 11:05:41.231639 tx_win_center[1][0][15] = 0
4593 11:05:41.234507 tx_first_pass[1][0][15] = 0
4594 11:05:41.237539 tx_last_pass[1][0][15] = 0
4595 11:05:41.241196 tx_win_center[1][1][0] = 0
4596 11:05:41.241696 tx_first_pass[1][1][0] = 0
4597 11:05:41.244415 tx_last_pass[1][1][0] = 0
4598 11:05:41.247806 tx_win_center[1][1][1] = 0
4599 11:05:41.248302 tx_first_pass[1][1][1] = 0
4600 11:05:41.251533 tx_last_pass[1][1][1] = 0
4601 11:05:41.254558 tx_win_center[1][1][2] = 0
4602 11:05:41.257969 tx_first_pass[1][1][2] = 0
4603 11:05:41.258475 tx_last_pass[1][1][2] = 0
4604 11:05:41.260933 tx_win_center[1][1][3] = 0
4605 11:05:41.264367 tx_first_pass[1][1][3] = 0
4606 11:05:41.264878 tx_last_pass[1][1][3] = 0
4607 11:05:41.267853 tx_win_center[1][1][4] = 0
4608 11:05:41.271072 tx_first_pass[1][1][4] = 0
4609 11:05:41.275002 tx_last_pass[1][1][4] = 0
4610 11:05:41.275510 tx_win_center[1][1][5] = 0
4611 11:05:41.277650 tx_first_pass[1][1][5] = 0
4612 11:05:41.281428 tx_last_pass[1][1][5] = 0
4613 11:05:41.284448 tx_win_center[1][1][6] = 0
4614 11:05:41.284986 tx_first_pass[1][1][6] = 0
4615 11:05:41.287645 tx_last_pass[1][1][6] = 0
4616 11:05:41.290624 tx_win_center[1][1][7] = 0
4617 11:05:41.294610 tx_first_pass[1][1][7] = 0
4618 11:05:41.295042 tx_last_pass[1][1][7] = 0
4619 11:05:41.297348 tx_win_center[1][1][8] = 0
4620 11:05:41.300619 tx_first_pass[1][1][8] = 0
4621 11:05:41.301003 tx_last_pass[1][1][8] = 0
4622 11:05:41.304448 tx_win_center[1][1][9] = 0
4623 11:05:41.307691 tx_first_pass[1][1][9] = 0
4624 11:05:41.310952 tx_last_pass[1][1][9] = 0
4625 11:05:41.311332 tx_win_center[1][1][10] = 0
4626 11:05:41.313796 tx_first_pass[1][1][10] = 0
4627 11:05:41.317079 tx_last_pass[1][1][10] = 0
4628 11:05:41.321112 tx_win_center[1][1][11] = 0
4629 11:05:41.321644 tx_first_pass[1][1][11] = 0
4630 11:05:41.324082 tx_last_pass[1][1][11] = 0
4631 11:05:41.327552 tx_win_center[1][1][12] = 0
4632 11:05:41.331009 tx_first_pass[1][1][12] = 0
4633 11:05:41.331501 tx_last_pass[1][1][12] = 0
4634 11:05:41.333783 tx_win_center[1][1][13] = 0
4635 11:05:41.337366 tx_first_pass[1][1][13] = 0
4636 11:05:41.340610 tx_last_pass[1][1][13] = 0
4637 11:05:41.340993 tx_win_center[1][1][14] = 0
4638 11:05:41.343768 tx_first_pass[1][1][14] = 0
4639 11:05:41.347314 tx_last_pass[1][1][14] = 0
4640 11:05:41.350973 tx_win_center[1][1][15] = 0
4641 11:05:41.351435 tx_first_pass[1][1][15] = 0
4642 11:05:41.354186 tx_last_pass[1][1][15] = 0
4643 11:05:41.357048 dump params rx window
4644 11:05:41.357431 rx_firspass[0][0][0] = 0
4645 11:05:41.360375 rx_lastpass[0][0][0] = 0
4646 11:05:41.363594 rx_firspass[0][0][1] = 0
4647 11:05:41.367172 rx_lastpass[0][0][1] = 0
4648 11:05:41.367639 rx_firspass[0][0][2] = 0
4649 11:05:41.370800 rx_lastpass[0][0][2] = 0
4650 11:05:41.373956 rx_firspass[0][0][3] = 0
4651 11:05:41.374341 rx_lastpass[0][0][3] = 0
4652 11:05:41.377173 rx_firspass[0][0][4] = 0
4653 11:05:41.380555 rx_lastpass[0][0][4] = 0
4654 11:05:41.380942 rx_firspass[0][0][5] = 0
4655 11:05:41.383653 rx_lastpass[0][0][5] = 0
4656 11:05:41.387360 rx_firspass[0][0][6] = 0
4657 11:05:41.387744 rx_lastpass[0][0][6] = 0
4658 11:05:41.390096 rx_firspass[0][0][7] = 0
4659 11:05:41.393405 rx_lastpass[0][0][7] = 0
4660 11:05:41.393789 rx_firspass[0][0][8] = 0
4661 11:05:41.396852 rx_lastpass[0][0][8] = 0
4662 11:05:41.400637 rx_firspass[0][0][9] = 0
4663 11:05:41.403525 rx_lastpass[0][0][9] = 0
4664 11:05:41.403908 rx_firspass[0][0][10] = 0
4665 11:05:41.406868 rx_lastpass[0][0][10] = 0
4666 11:05:41.410460 rx_firspass[0][0][11] = 0
4667 11:05:41.410841 rx_lastpass[0][0][11] = 0
4668 11:05:41.413360 rx_firspass[0][0][12] = 0
4669 11:05:41.417164 rx_lastpass[0][0][12] = 0
4670 11:05:41.417634 rx_firspass[0][0][13] = 0
4671 11:05:41.420987 rx_lastpass[0][0][13] = 0
4672 11:05:41.424253 rx_firspass[0][0][14] = 0
4673 11:05:41.427092 rx_lastpass[0][0][14] = 0
4674 11:05:41.427472 rx_firspass[0][0][15] = 0
4675 11:05:41.430151 rx_lastpass[0][0][15] = 0
4676 11:05:41.433635 rx_firspass[0][1][0] = 0
4677 11:05:41.434018 rx_lastpass[0][1][0] = 0
4678 11:05:41.436843 rx_firspass[0][1][1] = 0
4679 11:05:41.440432 rx_lastpass[0][1][1] = 0
4680 11:05:41.440937 rx_firspass[0][1][2] = 0
4681 11:05:41.443607 rx_lastpass[0][1][2] = 0
4682 11:05:41.446827 rx_firspass[0][1][3] = 0
4683 11:05:41.450096 rx_lastpass[0][1][3] = 0
4684 11:05:41.450564 rx_firspass[0][1][4] = 0
4685 11:05:41.453299 rx_lastpass[0][1][4] = 0
4686 11:05:41.457012 rx_firspass[0][1][5] = 0
4687 11:05:41.457398 rx_lastpass[0][1][5] = 0
4688 11:05:41.460106 rx_firspass[0][1][6] = 0
4689 11:05:41.463123 rx_lastpass[0][1][6] = 0
4690 11:05:41.463512 rx_firspass[0][1][7] = 0
4691 11:05:41.466459 rx_lastpass[0][1][7] = 0
4692 11:05:41.469658 rx_firspass[0][1][8] = 0
4693 11:05:41.470040 rx_lastpass[0][1][8] = 0
4694 11:05:41.473415 rx_firspass[0][1][9] = 0
4695 11:05:41.476943 rx_lastpass[0][1][9] = 0
4696 11:05:41.480327 rx_firspass[0][1][10] = 0
4697 11:05:41.480834 rx_lastpass[0][1][10] = 0
4698 11:05:41.483491 rx_firspass[0][1][11] = 0
4699 11:05:41.486495 rx_lastpass[0][1][11] = 0
4700 11:05:41.486876 rx_firspass[0][1][12] = 0
4701 11:05:41.489905 rx_lastpass[0][1][12] = 0
4702 11:05:41.493206 rx_firspass[0][1][13] = 0
4703 11:05:41.496438 rx_lastpass[0][1][13] = 0
4704 11:05:41.496849 rx_firspass[0][1][14] = 0
4705 11:05:41.500109 rx_lastpass[0][1][14] = 0
4706 11:05:41.503027 rx_firspass[0][1][15] = 0
4707 11:05:41.503421 rx_lastpass[0][1][15] = 0
4708 11:05:41.506379 rx_firspass[1][0][0] = 0
4709 11:05:41.510190 rx_lastpass[1][0][0] = 0
4710 11:05:41.510572 rx_firspass[1][0][1] = 0
4711 11:05:41.513410 rx_lastpass[1][0][1] = 0
4712 11:05:41.516725 rx_firspass[1][0][2] = 0
4713 11:05:41.520235 rx_lastpass[1][0][2] = 0
4714 11:05:41.520735 rx_firspass[1][0][3] = 0
4715 11:05:41.523191 rx_lastpass[1][0][3] = 0
4716 11:05:41.526686 rx_firspass[1][0][4] = 0
4717 11:05:41.527122 rx_lastpass[1][0][4] = 0
4718 11:05:41.529728 rx_firspass[1][0][5] = 0
4719 11:05:41.533049 rx_lastpass[1][0][5] = 0
4720 11:05:41.533434 rx_firspass[1][0][6] = 0
4721 11:05:41.536222 rx_lastpass[1][0][6] = 0
4722 11:05:41.540352 rx_firspass[1][0][7] = 0
4723 11:05:41.540867 rx_lastpass[1][0][7] = 0
4724 11:05:41.542857 rx_firspass[1][0][8] = 0
4725 11:05:41.546621 rx_lastpass[1][0][8] = 0
4726 11:05:41.547085 rx_firspass[1][0][9] = 0
4727 11:05:41.549642 rx_lastpass[1][0][9] = 0
4728 11:05:41.553032 rx_firspass[1][0][10] = 0
4729 11:05:41.555992 rx_lastpass[1][0][10] = 0
4730 11:05:41.556377 rx_firspass[1][0][11] = 0
4731 11:05:41.559566 rx_lastpass[1][0][11] = 0
4732 11:05:41.562749 rx_firspass[1][0][12] = 0
4733 11:05:41.563151 rx_lastpass[1][0][12] = 0
4734 11:05:41.566236 rx_firspass[1][0][13] = 0
4735 11:05:41.569594 rx_lastpass[1][0][13] = 0
4736 11:05:41.573169 rx_firspass[1][0][14] = 0
4737 11:05:41.573556 rx_lastpass[1][0][14] = 0
4738 11:05:41.576321 rx_firspass[1][0][15] = 0
4739 11:05:41.579348 rx_lastpass[1][0][15] = 0
4740 11:05:41.579787 rx_firspass[1][1][0] = 0
4741 11:05:41.583324 rx_lastpass[1][1][0] = 0
4742 11:05:41.586160 rx_firspass[1][1][1] = 0
4743 11:05:41.586544 rx_lastpass[1][1][1] = 0
4744 11:05:41.589500 rx_firspass[1][1][2] = 0
4745 11:05:41.592965 rx_lastpass[1][1][2] = 0
4746 11:05:41.593445 rx_firspass[1][1][3] = 0
4747 11:05:41.596523 rx_lastpass[1][1][3] = 0
4748 11:05:41.599554 rx_firspass[1][1][4] = 0
4749 11:05:41.599996 rx_lastpass[1][1][4] = 0
4750 11:05:41.602852 rx_firspass[1][1][5] = 0
4751 11:05:41.606155 rx_lastpass[1][1][5] = 0
4752 11:05:41.609531 rx_firspass[1][1][6] = 0
4753 11:05:41.609991 rx_lastpass[1][1][6] = 0
4754 11:05:41.613090 rx_firspass[1][1][7] = 0
4755 11:05:41.616394 rx_lastpass[1][1][7] = 0
4756 11:05:41.616827 rx_firspass[1][1][8] = 0
4757 11:05:41.619710 rx_lastpass[1][1][8] = 0
4758 11:05:41.622934 rx_firspass[1][1][9] = 0
4759 11:05:41.623316 rx_lastpass[1][1][9] = 0
4760 11:05:41.626201 rx_firspass[1][1][10] = 0
4761 11:05:41.629536 rx_lastpass[1][1][10] = 0
4762 11:05:41.630029 rx_firspass[1][1][11] = 0
4763 11:05:41.633173 rx_lastpass[1][1][11] = 0
4764 11:05:41.636433 rx_firspass[1][1][12] = 0
4765 11:05:41.639782 rx_lastpass[1][1][12] = 0
4766 11:05:41.640164 rx_firspass[1][1][13] = 0
4767 11:05:41.643086 rx_lastpass[1][1][13] = 0
4768 11:05:41.646686 rx_firspass[1][1][14] = 0
4769 11:05:41.647150 rx_lastpass[1][1][14] = 0
4770 11:05:41.649771 rx_firspass[1][1][15] = 0
4771 11:05:41.653395 rx_lastpass[1][1][15] = 0
4772 11:05:41.656250 dump params clk_delay
4773 11:05:41.656666 clk_delay[0] = 0
4774 11:05:41.656967 clk_delay[1] = 0
4775 11:05:41.659752 dump params dqs_delay
4776 11:05:41.662946 dqs_delay[0][0] = 0
4777 11:05:41.663329 dqs_delay[0][1] = 0
4778 11:05:41.666244 dqs_delay[1][0] = 0
4779 11:05:41.666631 dqs_delay[1][1] = 0
4780 11:05:41.669517 dump params delay_cell_unit = 735
4781 11:05:41.673009 dump source = 0x0
4782 11:05:41.673519 dump params frequency:800
4783 11:05:41.676227 dump params rank number:2
4784 11:05:41.676682
4785 11:05:41.679939 dump params write leveling
4786 11:05:41.682760 write leveling[0][0][0] = 0x0
4787 11:05:41.683286 write leveling[0][0][1] = 0x0
4788 11:05:41.686046 write leveling[0][1][0] = 0x0
4789 11:05:41.689498 write leveling[0][1][1] = 0x0
4790 11:05:41.692840 write leveling[1][0][0] = 0x0
4791 11:05:41.695964 write leveling[1][0][1] = 0x0
4792 11:05:41.696047 write leveling[1][1][0] = 0x0
4793 11:05:41.699244 write leveling[1][1][1] = 0x0
4794 11:05:41.703151 dump params cbt_cs
4795 11:05:41.703258 cbt_cs[0][0] = 0x0
4796 11:05:41.706032 cbt_cs[0][1] = 0x0
4797 11:05:41.706131 cbt_cs[1][0] = 0x0
4798 11:05:41.708992 cbt_cs[1][1] = 0x0
4799 11:05:41.709111 dump params cbt_mr12
4800 11:05:41.712766 cbt_mr12[0][0] = 0x0
4801 11:05:41.716288 cbt_mr12[0][1] = 0x0
4802 11:05:41.716730 cbt_mr12[1][0] = 0x0
4803 11:05:41.719955 cbt_mr12[1][1] = 0x0
4804 11:05:41.720621 dump params tx window
4805 11:05:41.722813 tx_center_min[0][0][0] = 0
4806 11:05:41.726265 tx_center_max[0][0][0] = 0
4807 11:05:41.726648 tx_center_min[0][0][1] = 0
4808 11:05:41.729616 tx_center_max[0][0][1] = 0
4809 11:05:41.733047 tx_center_min[0][1][0] = 0
4810 11:05:41.736398 tx_center_max[0][1][0] = 0
4811 11:05:41.736902 tx_center_min[0][1][1] = 0
4812 11:05:41.739969 tx_center_max[0][1][1] = 0
4813 11:05:41.743348 tx_center_min[1][0][0] = 0
4814 11:05:41.746534 tx_center_max[1][0][0] = 0
4815 11:05:41.747028 tx_center_min[1][0][1] = 0
4816 11:05:41.749870 tx_center_max[1][0][1] = 0
4817 11:05:41.752965 tx_center_min[1][1][0] = 0
4818 11:05:41.756280 tx_center_max[1][1][0] = 0
4819 11:05:41.756787 tx_center_min[1][1][1] = 0
4820 11:05:41.759725 tx_center_max[1][1][1] = 0
4821 11:05:41.762995 dump params tx window
4822 11:05:41.763378 tx_win_center[0][0][0] = 0
4823 11:05:41.766441 tx_first_pass[0][0][0] = 0
4824 11:05:41.769398 tx_last_pass[0][0][0] = 0
4825 11:05:41.772951 tx_win_center[0][0][1] = 0
4826 11:05:41.773337 tx_first_pass[0][0][1] = 0
4827 11:05:41.776530 tx_last_pass[0][0][1] = 0
4828 11:05:41.779526 tx_win_center[0][0][2] = 0
4829 11:05:41.779909 tx_first_pass[0][0][2] = 0
4830 11:05:41.782700 tx_last_pass[0][0][2] = 0
4831 11:05:41.786308 tx_win_center[0][0][3] = 0
4832 11:05:41.789533 tx_first_pass[0][0][3] = 0
4833 11:05:41.789994 tx_last_pass[0][0][3] = 0
4834 11:05:41.792992 tx_win_center[0][0][4] = 0
4835 11:05:41.796631 tx_first_pass[0][0][4] = 0
4836 11:05:41.799708 tx_last_pass[0][0][4] = 0
4837 11:05:41.800186 tx_win_center[0][0][5] = 0
4838 11:05:41.802536 tx_first_pass[0][0][5] = 0
4839 11:05:41.805866 tx_last_pass[0][0][5] = 0
4840 11:05:41.806377 tx_win_center[0][0][6] = 0
4841 11:05:41.809128 tx_first_pass[0][0][6] = 0
4842 11:05:41.812580 tx_last_pass[0][0][6] = 0
4843 11:05:41.816663 tx_win_center[0][0][7] = 0
4844 11:05:41.817114 tx_first_pass[0][0][7] = 0
4845 11:05:41.819935 tx_last_pass[0][0][7] = 0
4846 11:05:41.822859 tx_win_center[0][0][8] = 0
4847 11:05:41.825803 tx_first_pass[0][0][8] = 0
4848 11:05:41.826188 tx_last_pass[0][0][8] = 0
4849 11:05:41.829209 tx_win_center[0][0][9] = 0
4850 11:05:41.832546 tx_first_pass[0][0][9] = 0
4851 11:05:41.832935 tx_last_pass[0][0][9] = 0
4852 11:05:41.835766 tx_win_center[0][0][10] = 0
4853 11:05:41.839630 tx_first_pass[0][0][10] = 0
4854 11:05:41.842680 tx_last_pass[0][0][10] = 0
4855 11:05:41.843155 tx_win_center[0][0][11] = 0
4856 11:05:41.846099 tx_first_pass[0][0][11] = 0
4857 11:05:41.849264 tx_last_pass[0][0][11] = 0
4858 11:05:41.852824 tx_win_center[0][0][12] = 0
4859 11:05:41.853216 tx_first_pass[0][0][12] = 0
4860 11:05:41.856177 tx_last_pass[0][0][12] = 0
4861 11:05:41.859726 tx_win_center[0][0][13] = 0
4862 11:05:41.862504 tx_first_pass[0][0][13] = 0
4863 11:05:41.862887 tx_last_pass[0][0][13] = 0
4864 11:05:41.866431 tx_win_center[0][0][14] = 0
4865 11:05:41.869205 tx_first_pass[0][0][14] = 0
4866 11:05:41.872721 tx_last_pass[0][0][14] = 0
4867 11:05:41.873128 tx_win_center[0][0][15] = 0
4868 11:05:41.876109 tx_first_pass[0][0][15] = 0
4869 11:05:41.879512 tx_last_pass[0][0][15] = 0
4870 11:05:41.882604 tx_win_center[0][1][0] = 0
4871 11:05:41.883193 tx_first_pass[0][1][0] = 0
4872 11:05:41.886104 tx_last_pass[0][1][0] = 0
4873 11:05:41.889611 tx_win_center[0][1][1] = 0
4874 11:05:41.892406 tx_first_pass[0][1][1] = 0
4875 11:05:41.892953 tx_last_pass[0][1][1] = 0
4876 11:05:41.895990 tx_win_center[0][1][2] = 0
4877 11:05:41.899381 tx_first_pass[0][1][2] = 0
4878 11:05:41.899766 tx_last_pass[0][1][2] = 0
4879 11:05:41.902739 tx_win_center[0][1][3] = 0
4880 11:05:41.905865 tx_first_pass[0][1][3] = 0
4881 11:05:41.909528 tx_last_pass[0][1][3] = 0
4882 11:05:41.909918 tx_win_center[0][1][4] = 0
4883 11:05:41.912543 tx_first_pass[0][1][4] = 0
4884 11:05:41.916178 tx_last_pass[0][1][4] = 0
4885 11:05:41.916687 tx_win_center[0][1][5] = 0
4886 11:05:41.919347 tx_first_pass[0][1][5] = 0
4887 11:05:41.922541 tx_last_pass[0][1][5] = 0
4888 11:05:41.925884 tx_win_center[0][1][6] = 0
4889 11:05:41.926277 tx_first_pass[0][1][6] = 0
4890 11:05:41.929244 tx_last_pass[0][1][6] = 0
4891 11:05:41.932424 tx_win_center[0][1][7] = 0
4892 11:05:41.936302 tx_first_pass[0][1][7] = 0
4893 11:05:41.936744 tx_last_pass[0][1][7] = 0
4894 11:05:41.939476 tx_win_center[0][1][8] = 0
4895 11:05:41.942827 tx_first_pass[0][1][8] = 0
4896 11:05:41.943259 tx_last_pass[0][1][8] = 0
4897 11:05:41.945800 tx_win_center[0][1][9] = 0
4898 11:05:41.949150 tx_first_pass[0][1][9] = 0
4899 11:05:41.952618 tx_last_pass[0][1][9] = 0
4900 11:05:41.953147 tx_win_center[0][1][10] = 0
4901 11:05:41.955945 tx_first_pass[0][1][10] = 0
4902 11:05:41.959641 tx_last_pass[0][1][10] = 0
4903 11:05:41.962829 tx_win_center[0][1][11] = 0
4904 11:05:41.963240 tx_first_pass[0][1][11] = 0
4905 11:05:41.966318 tx_last_pass[0][1][11] = 0
4906 11:05:41.969362 tx_win_center[0][1][12] = 0
4907 11:05:41.972434 tx_first_pass[0][1][12] = 0
4908 11:05:41.972874 tx_last_pass[0][1][12] = 0
4909 11:05:41.976021 tx_win_center[0][1][13] = 0
4910 11:05:41.979837 tx_first_pass[0][1][13] = 0
4911 11:05:41.982813 tx_last_pass[0][1][13] = 0
4912 11:05:41.983211 tx_win_center[0][1][14] = 0
4913 11:05:41.985907 tx_first_pass[0][1][14] = 0
4914 11:05:41.989081 tx_last_pass[0][1][14] = 0
4915 11:05:41.992376 tx_win_center[0][1][15] = 0
4916 11:05:41.992890 tx_first_pass[0][1][15] = 0
4917 11:05:41.996024 tx_last_pass[0][1][15] = 0
4918 11:05:41.999303 tx_win_center[1][0][0] = 0
4919 11:05:42.003024 tx_first_pass[1][0][0] = 0
4920 11:05:42.003522 tx_last_pass[1][0][0] = 0
4921 11:05:42.006243 tx_win_center[1][0][1] = 0
4922 11:05:42.009486 tx_first_pass[1][0][1] = 0
4923 11:05:42.012652 tx_last_pass[1][0][1] = 0
4924 11:05:42.013043 tx_win_center[1][0][2] = 0
4925 11:05:42.016050 tx_first_pass[1][0][2] = 0
4926 11:05:42.019159 tx_last_pass[1][0][2] = 0
4927 11:05:42.019623 tx_win_center[1][0][3] = 0
4928 11:05:42.022403 tx_first_pass[1][0][3] = 0
4929 11:05:42.026088 tx_last_pass[1][0][3] = 0
4930 11:05:42.029058 tx_win_center[1][0][4] = 0
4931 11:05:42.029447 tx_first_pass[1][0][4] = 0
4932 11:05:42.032419 tx_last_pass[1][0][4] = 0
4933 11:05:42.035741 tx_win_center[1][0][5] = 0
4934 11:05:42.039070 tx_first_pass[1][0][5] = 0
4935 11:05:42.039455 tx_last_pass[1][0][5] = 0
4936 11:05:42.042793 tx_win_center[1][0][6] = 0
4937 11:05:42.045792 tx_first_pass[1][0][6] = 0
4938 11:05:42.046192 tx_last_pass[1][0][6] = 0
4939 11:05:42.049268 tx_win_center[1][0][7] = 0
4940 11:05:42.052038 tx_first_pass[1][0][7] = 0
4941 11:05:42.055461 tx_last_pass[1][0][7] = 0
4942 11:05:42.055845 tx_win_center[1][0][8] = 0
4943 11:05:42.059381 tx_first_pass[1][0][8] = 0
4944 11:05:42.062126 tx_last_pass[1][0][8] = 0
4945 11:05:42.062536 tx_win_center[1][0][9] = 0
4946 11:05:42.065926 tx_first_pass[1][0][9] = 0
4947 11:05:42.069224 tx_last_pass[1][0][9] = 0
4948 11:05:42.072409 tx_win_center[1][0][10] = 0
4949 11:05:42.072828 tx_first_pass[1][0][10] = 0
4950 11:05:42.075656 tx_last_pass[1][0][10] = 0
4951 11:05:42.079060 tx_win_center[1][0][11] = 0
4952 11:05:42.082488 tx_first_pass[1][0][11] = 0
4953 11:05:42.082971 tx_last_pass[1][0][11] = 0
4954 11:05:42.085473 tx_win_center[1][0][12] = 0
4955 11:05:42.089226 tx_first_pass[1][0][12] = 0
4956 11:05:42.092097 tx_last_pass[1][0][12] = 0
4957 11:05:42.092507 tx_win_center[1][0][13] = 0
4958 11:05:42.095842 tx_first_pass[1][0][13] = 0
4959 11:05:42.099402 tx_last_pass[1][0][13] = 0
4960 11:05:42.102237 tx_win_center[1][0][14] = 0
4961 11:05:42.102682 tx_first_pass[1][0][14] = 0
4962 11:05:42.105675 tx_last_pass[1][0][14] = 0
4963 11:05:42.109476 tx_win_center[1][0][15] = 0
4964 11:05:42.112362 tx_first_pass[1][0][15] = 0
4965 11:05:42.112778 tx_last_pass[1][0][15] = 0
4966 11:05:42.115912 tx_win_center[1][1][0] = 0
4967 11:05:42.119234 tx_first_pass[1][1][0] = 0
4968 11:05:42.122393 tx_last_pass[1][1][0] = 0
4969 11:05:42.122865 tx_win_center[1][1][1] = 0
4970 11:05:42.125322 tx_first_pass[1][1][1] = 0
4971 11:05:42.129308 tx_last_pass[1][1][1] = 0
4972 11:05:42.132558 tx_win_center[1][1][2] = 0
4973 11:05:42.132946 tx_first_pass[1][1][2] = 0
4974 11:05:42.135643 tx_last_pass[1][1][2] = 0
4975 11:05:42.138868 tx_win_center[1][1][3] = 0
4976 11:05:42.139304 tx_first_pass[1][1][3] = 0
4977 11:05:42.141913 tx_last_pass[1][1][3] = 0
4978 11:05:42.145307 tx_win_center[1][1][4] = 0
4979 11:05:42.148960 tx_first_pass[1][1][4] = 0
4980 11:05:42.149341 tx_last_pass[1][1][4] = 0
4981 11:05:42.152233 tx_win_center[1][1][5] = 0
4982 11:05:42.155323 tx_first_pass[1][1][5] = 0
4983 11:05:42.158549 tx_last_pass[1][1][5] = 0
4984 11:05:42.158938 tx_win_center[1][1][6] = 0
4985 11:05:42.161901 tx_first_pass[1][1][6] = 0
4986 11:05:42.165814 tx_last_pass[1][1][6] = 0
4987 11:05:42.166280 tx_win_center[1][1][7] = 0
4988 11:05:42.169126 tx_first_pass[1][1][7] = 0
4989 11:05:42.172185 tx_last_pass[1][1][7] = 0
4990 11:05:42.175411 tx_win_center[1][1][8] = 0
4991 11:05:42.175843 tx_first_pass[1][1][8] = 0
4992 11:05:42.178929 tx_last_pass[1][1][8] = 0
4993 11:05:42.181928 tx_win_center[1][1][9] = 0
4994 11:05:42.185605 tx_first_pass[1][1][9] = 0
4995 11:05:42.186069 tx_last_pass[1][1][9] = 0
4996 11:05:42.188800 tx_win_center[1][1][10] = 0
4997 11:05:42.192250 tx_first_pass[1][1][10] = 0
4998 11:05:42.192668 tx_last_pass[1][1][10] = 0
4999 11:05:42.195380 tx_win_center[1][1][11] = 0
5000 11:05:42.199181 tx_first_pass[1][1][11] = 0
5001 11:05:42.202237 tx_last_pass[1][1][11] = 0
5002 11:05:42.202621 tx_win_center[1][1][12] = 0
5003 11:05:42.205219 tx_first_pass[1][1][12] = 0
5004 11:05:42.209148 tx_last_pass[1][1][12] = 0
5005 11:05:42.212242 tx_win_center[1][1][13] = 0
5006 11:05:42.212685 tx_first_pass[1][1][13] = 0
5007 11:05:42.215448 tx_last_pass[1][1][13] = 0
5008 11:05:42.219088 tx_win_center[1][1][14] = 0
5009 11:05:42.222636 tx_first_pass[1][1][14] = 0
5010 11:05:42.223106 tx_last_pass[1][1][14] = 0
5011 11:05:42.225373 tx_win_center[1][1][15] = 0
5012 11:05:42.229197 tx_first_pass[1][1][15] = 0
5013 11:05:42.232361 tx_last_pass[1][1][15] = 0
5014 11:05:42.232916 dump params rx window
5015 11:05:42.235815 rx_firspass[0][0][0] = 0
5016 11:05:42.239522 rx_lastpass[0][0][0] = 0
5017 11:05:42.239989 rx_firspass[0][0][1] = 0
5018 11:05:42.242474 rx_lastpass[0][0][1] = 0
5019 11:05:42.245682 rx_firspass[0][0][2] = 0
5020 11:05:42.246149 rx_lastpass[0][0][2] = 0
5021 11:05:42.248799 rx_firspass[0][0][3] = 0
5022 11:05:42.252559 rx_lastpass[0][0][3] = 0
5023 11:05:42.253023 rx_firspass[0][0][4] = 0
5024 11:05:42.255788 rx_lastpass[0][0][4] = 0
5025 11:05:42.259015 rx_firspass[0][0][5] = 0
5026 11:05:42.259486 rx_lastpass[0][0][5] = 0
5027 11:05:42.261911 rx_firspass[0][0][6] = 0
5028 11:05:42.265898 rx_lastpass[0][0][6] = 0
5029 11:05:42.269048 rx_firspass[0][0][7] = 0
5030 11:05:42.269510 rx_lastpass[0][0][7] = 0
5031 11:05:42.272088 rx_firspass[0][0][8] = 0
5032 11:05:42.275639 rx_lastpass[0][0][8] = 0
5033 11:05:42.276026 rx_firspass[0][0][9] = 0
5034 11:05:42.278944 rx_lastpass[0][0][9] = 0
5035 11:05:42.282351 rx_firspass[0][0][10] = 0
5036 11:05:42.282822 rx_lastpass[0][0][10] = 0
5037 11:05:42.285779 rx_firspass[0][0][11] = 0
5038 11:05:42.288573 rx_lastpass[0][0][11] = 0
5039 11:05:42.292319 rx_firspass[0][0][12] = 0
5040 11:05:42.292846 rx_lastpass[0][0][12] = 0
5041 11:05:42.295783 rx_firspass[0][0][13] = 0
5042 11:05:42.298752 rx_lastpass[0][0][13] = 0
5043 11:05:42.299135 rx_firspass[0][0][14] = 0
5044 11:05:42.301945 rx_lastpass[0][0][14] = 0
5045 11:05:42.305320 rx_firspass[0][0][15] = 0
5046 11:05:42.308877 rx_lastpass[0][0][15] = 0
5047 11:05:42.309355 rx_firspass[0][1][0] = 0
5048 11:05:42.311878 rx_lastpass[0][1][0] = 0
5049 11:05:42.315566 rx_firspass[0][1][1] = 0
5050 11:05:42.315950 rx_lastpass[0][1][1] = 0
5051 11:05:42.318916 rx_firspass[0][1][2] = 0
5052 11:05:42.322086 rx_lastpass[0][1][2] = 0
5053 11:05:42.322652 rx_firspass[0][1][3] = 0
5054 11:05:42.325314 rx_lastpass[0][1][3] = 0
5055 11:05:42.328385 rx_firspass[0][1][4] = 0
5056 11:05:42.328790 rx_lastpass[0][1][4] = 0
5057 11:05:42.331798 rx_firspass[0][1][5] = 0
5058 11:05:42.335580 rx_lastpass[0][1][5] = 0
5059 11:05:42.335963 rx_firspass[0][1][6] = 0
5060 11:05:42.338385 rx_lastpass[0][1][6] = 0
5061 11:05:42.342184 rx_firspass[0][1][7] = 0
5062 11:05:42.345609 rx_lastpass[0][1][7] = 0
5063 11:05:42.346073 rx_firspass[0][1][8] = 0
5064 11:05:42.348768 rx_lastpass[0][1][8] = 0
5065 11:05:42.351866 rx_firspass[0][1][9] = 0
5066 11:05:42.352256 rx_lastpass[0][1][9] = 0
5067 11:05:42.355382 rx_firspass[0][1][10] = 0
5068 11:05:42.359214 rx_lastpass[0][1][10] = 0
5069 11:05:42.359677 rx_firspass[0][1][11] = 0
5070 11:05:42.361795 rx_lastpass[0][1][11] = 0
5071 11:05:42.365155 rx_firspass[0][1][12] = 0
5072 11:05:42.368296 rx_lastpass[0][1][12] = 0
5073 11:05:42.368800 rx_firspass[0][1][13] = 0
5074 11:05:42.371975 rx_lastpass[0][1][13] = 0
5075 11:05:42.374934 rx_firspass[0][1][14] = 0
5076 11:05:42.375443 rx_lastpass[0][1][14] = 0
5077 11:05:42.378366 rx_firspass[0][1][15] = 0
5078 11:05:42.381638 rx_lastpass[0][1][15] = 0
5079 11:05:42.385386 rx_firspass[1][0][0] = 0
5080 11:05:42.385851 rx_lastpass[1][0][0] = 0
5081 11:05:42.388122 rx_firspass[1][0][1] = 0
5082 11:05:42.391843 rx_lastpass[1][0][1] = 0
5083 11:05:42.392346 rx_firspass[1][0][2] = 0
5084 11:05:42.395436 rx_lastpass[1][0][2] = 0
5085 11:05:42.398556 rx_firspass[1][0][3] = 0
5086 11:05:42.398939 rx_lastpass[1][0][3] = 0
5087 11:05:42.401950 rx_firspass[1][0][4] = 0
5088 11:05:42.405116 rx_lastpass[1][0][4] = 0
5089 11:05:42.405501 rx_firspass[1][0][5] = 0
5090 11:05:42.408367 rx_lastpass[1][0][5] = 0
5091 11:05:42.411441 rx_firspass[1][0][6] = 0
5092 11:05:42.411824 rx_lastpass[1][0][6] = 0
5093 11:05:42.414778 rx_firspass[1][0][7] = 0
5094 11:05:42.418495 rx_lastpass[1][0][7] = 0
5095 11:05:42.421517 rx_firspass[1][0][8] = 0
5096 11:05:42.421901 rx_lastpass[1][0][8] = 0
5097 11:05:42.424769 rx_firspass[1][0][9] = 0
5098 11:05:42.428136 rx_lastpass[1][0][9] = 0
5099 11:05:42.428546 rx_firspass[1][0][10] = 0
5100 11:05:42.431641 rx_lastpass[1][0][10] = 0
5101 11:05:42.435059 rx_firspass[1][0][11] = 0
5102 11:05:42.435524 rx_lastpass[1][0][11] = 0
5103 11:05:42.438440 rx_firspass[1][0][12] = 0
5104 11:05:42.441423 rx_lastpass[1][0][12] = 0
5105 11:05:42.444710 rx_firspass[1][0][13] = 0
5106 11:05:42.445093 rx_lastpass[1][0][13] = 0
5107 11:05:42.447941 rx_firspass[1][0][14] = 0
5108 11:05:42.451744 rx_lastpass[1][0][14] = 0
5109 11:05:42.452209 rx_firspass[1][0][15] = 0
5110 11:05:42.454895 rx_lastpass[1][0][15] = 0
5111 11:05:42.458540 rx_firspass[1][1][0] = 0
5112 11:05:42.461948 rx_lastpass[1][1][0] = 0
5113 11:05:42.462413 rx_firspass[1][1][1] = 0
5114 11:05:42.464783 rx_lastpass[1][1][1] = 0
5115 11:05:42.468322 rx_firspass[1][1][2] = 0
5116 11:05:42.468848 rx_lastpass[1][1][2] = 0
5117 11:05:42.471707 rx_firspass[1][1][3] = 0
5118 11:05:42.475167 rx_lastpass[1][1][3] = 0
5119 11:05:42.475825 rx_firspass[1][1][4] = 0
5120 11:05:42.478369 rx_lastpass[1][1][4] = 0
5121 11:05:42.481375 rx_firspass[1][1][5] = 0
5122 11:05:42.481843 rx_lastpass[1][1][5] = 0
5123 11:05:42.485226 rx_firspass[1][1][6] = 0
5124 11:05:42.488355 rx_lastpass[1][1][6] = 0
5125 11:05:42.488851 rx_firspass[1][1][7] = 0
5126 11:05:42.491346 rx_lastpass[1][1][7] = 0
5127 11:05:42.494333 rx_firspass[1][1][8] = 0
5128 11:05:42.498279 rx_lastpass[1][1][8] = 0
5129 11:05:42.498742 rx_firspass[1][1][9] = 0
5130 11:05:42.501115 rx_lastpass[1][1][9] = 0
5131 11:05:42.504725 rx_firspass[1][1][10] = 0
5132 11:05:42.505198 rx_lastpass[1][1][10] = 0
5133 11:05:42.507784 rx_firspass[1][1][11] = 0
5134 11:05:42.510955 rx_lastpass[1][1][11] = 0
5135 11:05:42.511341 rx_firspass[1][1][12] = 0
5136 11:05:42.514570 rx_lastpass[1][1][12] = 0
5137 11:05:42.517765 rx_firspass[1][1][13] = 0
5138 11:05:42.521115 rx_lastpass[1][1][13] = 0
5139 11:05:42.521501 rx_firspass[1][1][14] = 0
5140 11:05:42.524491 rx_lastpass[1][1][14] = 0
5141 11:05:42.528038 rx_firspass[1][1][15] = 0
5142 11:05:42.528542 rx_lastpass[1][1][15] = 0
5143 11:05:42.531017 dump params clk_delay
5144 11:05:42.534727 clk_delay[0] = 0
5145 11:05:42.535198 clk_delay[1] = 0
5146 11:05:42.537946 dump params dqs_delay
5147 11:05:42.538330 dqs_delay[0][0] = 0
5148 11:05:42.541086 dqs_delay[0][1] = 0
5149 11:05:42.541472 dqs_delay[1][0] = 0
5150 11:05:42.544801 dqs_delay[1][1] = 0
5151 11:05:42.547757 dump params delay_cell_unit = 735
5152 11:05:42.548218 mt_set_emi_preloader end
5153 11:05:42.554796 [mt_mem_init] dram size: 0x100000000, rank number: 2
5154 11:05:42.557711 [complex_mem_test] start addr:0x40000000, len:20480
5155 11:05:42.595247 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5156 11:05:42.601425 [complex_mem_test] start addr:0x80000000, len:20480
5157 11:05:42.637432 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5158 11:05:42.643700 [complex_mem_test] start addr:0xc0000000, len:20480
5159 11:05:42.679334 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5160 11:05:42.686115 [complex_mem_test] start addr:0x56000000, len:8192
5161 11:05:42.702589 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5162 11:05:42.706483 ddr_geometry:1
5163 11:05:42.709622 [complex_mem_test] start addr:0x80000000, len:8192
5164 11:05:42.726767 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5165 11:05:42.729540 dram_init: dram init end (result: 0)
5166 11:05:42.736414 Successfully loaded DRAM blobs and ran DRAM calibration
5167 11:05:42.746834 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5168 11:05:42.747301 CBMEM:
5169 11:05:42.750063 IMD: root @ 00000000fffff000 254 entries.
5170 11:05:42.753644 IMD: root @ 00000000ffffec00 62 entries.
5171 11:05:42.759667 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5172 11:05:42.766192 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5173 11:05:42.769235 in-header: 03 a1 00 00 08 00 00 00
5174 11:05:42.772910 in-data: 84 60 60 10 00 00 00 00
5175 11:05:42.776333 Chrome EC: clear events_b mask to 0x0000000020004000
5176 11:05:42.783671 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5177 11:05:42.786982 in-header: 03 fd 00 00 00 00 00 00
5178 11:05:42.787562 in-data:
5179 11:05:42.793244 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5180 11:05:42.796632 CBFS @ 21000 size 3d4000
5181 11:05:42.800069 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5182 11:05:42.803762 CBFS: Locating 'fallback/ramstage'
5183 11:05:42.807190 CBFS: Found @ offset 10d40 size d563
5184 11:05:42.828746 read SPI 0x31d94 0xd547: 16639 us, 3281 KB/s, 26.248 Mbps
5185 11:05:42.841008 Accumulated console time in romstage 13614 ms
5186 11:05:42.841478
5187 11:05:42.841775
5188 11:05:42.851112 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5189 11:05:42.854319 ARM64: Exception handlers installed.
5190 11:05:42.854786 ARM64: Testing exception
5191 11:05:42.857136 ARM64: Done test exception
5192 11:05:42.860750 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5193 11:05:42.863912 Manufacturer: ef
5194 11:05:42.867145 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5195 11:05:42.874128 WARNING: RO_VPD is uninitialized or empty.
5196 11:05:42.877034 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5197 11:05:42.880550 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5198 11:05:42.890332 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5199 11:05:42.893607 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5200 11:05:42.900282 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5201 11:05:42.900527 Enumerating buses...
5202 11:05:42.906798 Show all devs... Before device enumeration.
5203 11:05:42.907108 Root Device: enabled 1
5204 11:05:42.910113 CPU_CLUSTER: 0: enabled 1
5205 11:05:42.910422 CPU: 00: enabled 1
5206 11:05:42.913262 Compare with tree...
5207 11:05:42.916840 Root Device: enabled 1
5208 11:05:42.917223 CPU_CLUSTER: 0: enabled 1
5209 11:05:42.920066 CPU: 00: enabled 1
5210 11:05:42.923663 Root Device scanning...
5211 11:05:42.924122 root_dev_scan_bus for Root Device
5212 11:05:42.926861 CPU_CLUSTER: 0 enabled
5213 11:05:42.929859 root_dev_scan_bus for Root Device done
5214 11:05:42.936552 scan_bus: scanning of bus Root Device took 10689 usecs
5215 11:05:42.937053 done
5216 11:05:42.940009 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5217 11:05:42.943400 Allocating resources...
5218 11:05:42.943867 Reading resources...
5219 11:05:42.949662 Root Device read_resources bus 0 link: 0
5220 11:05:42.953119 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5221 11:05:42.956536 CPU: 00 missing read_resources
5222 11:05:42.960143 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5223 11:05:42.963452 Root Device read_resources bus 0 link: 0 done
5224 11:05:42.966723 Done reading resources.
5225 11:05:42.969843 Show resources in subtree (Root Device)...After reading.
5226 11:05:42.973076 Root Device child on link 0 CPU_CLUSTER: 0
5227 11:05:42.976715 CPU_CLUSTER: 0 child on link 0 CPU: 00
5228 11:05:42.986561 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5229 11:05:42.987034 CPU: 00
5230 11:05:42.989638 Setting resources...
5231 11:05:42.992977 Root Device assign_resources, bus 0 link: 0
5232 11:05:42.996396 CPU_CLUSTER: 0 missing set_resources
5233 11:05:43.000026 Root Device assign_resources, bus 0 link: 0
5234 11:05:43.003176 Done setting resources.
5235 11:05:43.009564 Show resources in subtree (Root Device)...After assigning values.
5236 11:05:43.013102 Root Device child on link 0 CPU_CLUSTER: 0
5237 11:05:43.016353 CPU_CLUSTER: 0 child on link 0 CPU: 00
5238 11:05:43.026040 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5239 11:05:43.026460 CPU: 00
5240 11:05:43.029458 Done allocating resources.
5241 11:05:43.032972 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5242 11:05:43.036366 Enabling resources...
5243 11:05:43.036792 done.
5244 11:05:43.039627 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5245 11:05:43.043145 Initializing devices...
5246 11:05:43.043614 Root Device init ...
5247 11:05:43.045956 mainboard_init: Starting display init.
5248 11:05:43.049848 ADC[4]: Raw value=75746 ID=0
5249 11:05:43.073100 anx7625_power_on_init: Init interface.
5250 11:05:43.076158 anx7625_disable_pd_protocol: Disabled PD feature.
5251 11:05:43.083148 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5252 11:05:43.129719 anx7625_start_dp_work: Secure OCM version=00
5253 11:05:43.132989 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5254 11:05:43.150612 sp_tx_get_edid_block: EDID Block = 1
5255 11:05:43.267590 Extracted contents:
5256 11:05:43.270823 header: 00 ff ff ff ff ff ff 00
5257 11:05:43.274217 serial number: 06 af 5c 14 00 00 00 00 00 1a
5258 11:05:43.277237 version: 01 04
5259 11:05:43.280763 basic params: 95 1a 0e 78 02
5260 11:05:43.283798 chroma info: 99 85 95 55 56 92 28 22 50 54
5261 11:05:43.287437 established: 00 00 00
5262 11:05:43.293682 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5263 11:05:43.297109 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5264 11:05:43.304036 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5265 11:05:43.310479 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5266 11:05:43.317228 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5267 11:05:43.320590 extensions: 00
5268 11:05:43.321045 checksum: ae
5269 11:05:43.321347
5270 11:05:43.323895 Manufacturer: AUO Model 145c Serial Number 0
5271 11:05:43.326974 Made week 0 of 2016
5272 11:05:43.327361 EDID version: 1.4
5273 11:05:43.330812 Digital display
5274 11:05:43.333991 6 bits per primary color channel
5275 11:05:43.334417 DisplayPort interface
5276 11:05:43.337341 Maximum image size: 26 cm x 14 cm
5277 11:05:43.340844 Gamma: 220%
5278 11:05:43.341301 Check DPMS levels
5279 11:05:43.344031 Supported color formats: RGB 4:4:4
5280 11:05:43.347343 First detailed timing is preferred timing
5281 11:05:43.350566 Established timings supported:
5282 11:05:43.353786 Standard timings supported:
5283 11:05:43.354242 Detailed timings
5284 11:05:43.360650 Hex of detail: ce1d56ea50001a3030204600009010000018
5285 11:05:43.363933 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5286 11:05:43.367301 0556 0586 05a6 0640 hborder 0
5287 11:05:43.370170 0300 0304 030a 031a vborder 0
5288 11:05:43.373809 -hsync -vsync
5289 11:05:43.377405 Did detailed timing
5290 11:05:43.380375 Hex of detail: 0000000f0000000000000000000000000020
5291 11:05:43.383573 Manufacturer-specified data, tag 15
5292 11:05:43.389938 Hex of detail: 000000fe0041554f0a202020202020202020
5293 11:05:43.390388 ASCII string: AUO
5294 11:05:43.393731 Hex of detail: 000000fe004231313658414230312e34200a
5295 11:05:43.396547 ASCII string: B116XAB01.4
5296 11:05:43.396940 Checksum
5297 11:05:43.400002 Checksum: 0xae (valid)
5298 11:05:43.406553 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5299 11:05:43.407010 DSI data_rate: 457800000 bps
5300 11:05:43.414543 anx7625_parse_edid: set default k value to 0x3d for panel
5301 11:05:43.417684 anx7625_parse_edid: pixelclock(76300).
5302 11:05:43.421127 hactive(1366), hsync(32), hfp(48), hbp(154)
5303 11:05:43.424253 vactive(768), vsync(6), vfp(4), vbp(16)
5304 11:05:43.427591 anx7625_dsi_config: config dsi.
5305 11:05:43.435439 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5306 11:05:43.456716 anx7625_dsi_config: success to config DSI
5307 11:05:43.460612 anx7625_dp_start: MIPI phy setup OK.
5308 11:05:43.463785 [SSUSB] Setting up USB HOST controller...
5309 11:05:43.466650 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5310 11:05:43.469772 [SSUSB] phy power-on done.
5311 11:05:43.473669 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5312 11:05:43.477420 in-header: 03 fc 01 00 00 00 00 00
5313 11:05:43.477878 in-data:
5314 11:05:43.483777 handle_proto3_response: EC response with error code: 1
5315 11:05:43.484225 SPM: pcm index = 1
5316 11:05:43.487493 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5317 11:05:43.490568 CBFS @ 21000 size 3d4000
5318 11:05:43.497689 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5319 11:05:43.500626 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5320 11:05:43.503592 CBFS: Found @ offset 1e7c0 size 1026
5321 11:05:43.510209 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5322 11:05:43.513559 SPM: binary array size = 2988
5323 11:05:43.516669 SPM: version = pcm_allinone_v1.17.2_20180829
5324 11:05:43.520077 SPM binary loaded in 32 msecs
5325 11:05:43.527890 spm_kick_im_to_fetch: ptr = 000000004021eec2
5326 11:05:43.531115 spm_kick_im_to_fetch: len = 2988
5327 11:05:43.531644 SPM: spm_kick_pcm_to_run
5328 11:05:43.534627 SPM: spm_kick_pcm_to_run done
5329 11:05:43.538215 SPM: spm_init done in 52 msecs
5330 11:05:43.540976 Root Device init finished in 494982 usecs
5331 11:05:43.544614 CPU_CLUSTER: 0 init ...
5332 11:05:43.554176 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5333 11:05:43.557971 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5334 11:05:43.560650 CBFS @ 21000 size 3d4000
5335 11:05:43.565067 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5336 11:05:43.567790 CBFS: Locating 'sspm.bin'
5337 11:05:43.571143 CBFS: Found @ offset 208c0 size 41cb
5338 11:05:43.581218 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5339 11:05:43.588954 CPU_CLUSTER: 0 init finished in 42801 usecs
5340 11:05:43.589420 Devices initialized
5341 11:05:43.592368 Show all devs... After init.
5342 11:05:43.595608 Root Device: enabled 1
5343 11:05:43.595988 CPU_CLUSTER: 0: enabled 1
5344 11:05:43.598984 CPU: 00: enabled 1
5345 11:05:43.601960 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5346 11:05:43.605298 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5347 11:05:43.608707 ELOG: NV offset 0x558000 size 0x1000
5348 11:05:43.616338 read SPI 0x558000 0x1000: 1258 us, 3255 KB/s, 26.040 Mbps
5349 11:05:43.622856 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5350 11:05:43.626149 ELOG: Event(17) added with size 13 at 2024-07-10 11:05:38 UTC
5351 11:05:43.629505 out: cmd=0x121: 03 db 21 01 00 00 00 00
5352 11:05:43.633125 in-header: 03 07 00 00 2c 00 00 00
5353 11:05:43.646764 in-data: 70 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 c5 ea 01 00 06 80 00 00 0b 0a 63 00 06 80 00 00 79 23 01 00 06 80 00 00 40 df 01 00
5354 11:05:43.649755 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5355 11:05:43.653141 in-header: 03 19 00 00 08 00 00 00
5356 11:05:43.656854 in-data: a2 e0 47 00 13 00 00 00
5357 11:05:43.660171 Chrome EC: UHEPI supported
5358 11:05:43.666644 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5359 11:05:43.670270 in-header: 03 e1 00 00 08 00 00 00
5360 11:05:43.673316 in-data: 84 20 60 10 00 00 00 00
5361 11:05:43.676801 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5362 11:05:43.683150 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5363 11:05:43.686129 in-header: 03 e1 00 00 08 00 00 00
5364 11:05:43.689867 in-data: 84 20 60 10 00 00 00 00
5365 11:05:43.696204 ELOG: Event(A1) added with size 10 at 2024-07-10 11:05:38 UTC
5366 11:05:43.703138 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5367 11:05:43.706160 ELOG: Event(A0) added with size 9 at 2024-07-10 11:05:38 UTC
5368 11:05:43.712922 elog_add_boot_reason: Logged dev mode boot
5369 11:05:43.713309 Finalize devices...
5370 11:05:43.716432 Devices finalized
5371 11:05:43.719455 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5372 11:05:43.723259 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5373 11:05:43.730361 ELOG: Event(91) added with size 10 at 2024-07-10 11:05:38 UTC
5374 11:05:43.733140 Writing coreboot table at 0xffeda000
5375 11:05:43.736295 0. 0000000000114000-000000000011efff: RAMSTAGE
5376 11:05:43.742937 1. 0000000040000000-000000004023cfff: RAMSTAGE
5377 11:05:43.746238 2. 000000004023d000-00000000545fffff: RAM
5378 11:05:43.749786 3. 0000000054600000-000000005465ffff: BL31
5379 11:05:43.753114 4. 0000000054660000-00000000ffed9fff: RAM
5380 11:05:43.759522 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5381 11:05:43.762532 6. 0000000100000000-000000013fffffff: RAM
5382 11:05:43.766026 Passing 5 GPIOs to payload:
5383 11:05:43.769452 NAME | PORT | POLARITY | VALUE
5384 11:05:43.772512 write protect | 0x00000096 | low | high
5385 11:05:43.779716 EC in RW | 0x000000b1 | high | undefined
5386 11:05:43.782810 EC interrupt | 0x00000097 | low | undefined
5387 11:05:43.789311 TPM interrupt | 0x00000099 | high | undefined
5388 11:05:43.792505 speaker enable | 0x000000af | high | undefined
5389 11:05:43.796195 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5390 11:05:43.799440 in-header: 03 f7 00 00 02 00 00 00
5391 11:05:43.799643 in-data: 04 00
5392 11:05:43.802532 Board ID: 4
5393 11:05:43.805645 ADC[3]: Raw value=215504 ID=1
5394 11:05:43.805848 RAM code: 1
5395 11:05:43.806005 SKU ID: 16
5396 11:05:43.812383 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5397 11:05:43.812619 CBFS @ 21000 size 3d4000
5398 11:05:43.819089 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5399 11:05:43.826252 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum c00c
5400 11:05:43.826652 coreboot table: 940 bytes.
5401 11:05:43.832814 IMD ROOT 0. 00000000fffff000 00001000
5402 11:05:43.835971 IMD SMALL 1. 00000000ffffe000 00001000
5403 11:05:43.838992 CONSOLE 2. 00000000fffde000 00020000
5404 11:05:43.843272 FMAP 3. 00000000fffdd000 0000047c
5405 11:05:43.846315 TIME STAMP 4. 00000000fffdc000 00000910
5406 11:05:43.849101 RAMOOPS 5. 00000000ffedc000 00100000
5407 11:05:43.852484 COREBOOT 6. 00000000ffeda000 00002000
5408 11:05:43.856226 IMD small region:
5409 11:05:43.859406 IMD ROOT 0. 00000000ffffec00 00000400
5410 11:05:43.862975 VBOOT WORK 1. 00000000ffffeb00 00000100
5411 11:05:43.865876 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5412 11:05:43.869114 VPD 3. 00000000ffffea60 0000006c
5413 11:05:43.875719 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5414 11:05:43.882601 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5415 11:05:43.885588 in-header: 03 e1 00 00 08 00 00 00
5416 11:05:43.885982 in-data: 84 20 60 10 00 00 00 00
5417 11:05:43.892116 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5418 11:05:43.892634 CBFS @ 21000 size 3d4000
5419 11:05:43.898943 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5420 11:05:43.902090 CBFS: Locating 'fallback/payload'
5421 11:05:43.911042 CBFS: Found @ offset dc040 size 439a0
5422 11:05:43.998336 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5423 11:05:44.001975 Checking segment from ROM address 0x0000000040003a00
5424 11:05:44.008285 Checking segment from ROM address 0x0000000040003a1c
5425 11:05:44.012026 Loading segment from ROM address 0x0000000040003a00
5426 11:05:44.015366 code (compression=0)
5427 11:05:44.025414 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5428 11:05:44.031807 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5429 11:05:44.034893 it's not compressed!
5430 11:05:44.038120 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5431 11:05:44.045113 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5432 11:05:44.052656 Loading segment from ROM address 0x0000000040003a1c
5433 11:05:44.056113 Entry Point 0x0000000080000000
5434 11:05:44.056644 Loaded segments
5435 11:05:44.063070 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5436 11:05:44.066084 Jumping to boot code at 0000000080000000(00000000ffeda000)
5437 11:05:44.076387 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5438 11:05:44.079290 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5439 11:05:44.082733 CBFS @ 21000 size 3d4000
5440 11:05:44.089428 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5441 11:05:44.092682 CBFS: Locating 'fallback/bl31'
5442 11:05:44.095631 CBFS: Found @ offset 36dc0 size 5820
5443 11:05:44.106750 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5444 11:05:44.110029 Checking segment from ROM address 0x0000000040003a00
5445 11:05:44.116704 Checking segment from ROM address 0x0000000040003a1c
5446 11:05:44.119866 Loading segment from ROM address 0x0000000040003a00
5447 11:05:44.122781 code (compression=1)
5448 11:05:44.129762 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5449 11:05:44.139713 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5450 11:05:44.140103 using LZMA
5451 11:05:44.148705 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5452 11:05:44.155048 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5453 11:05:44.158446 Loading segment from ROM address 0x0000000040003a1c
5454 11:05:44.161953 Entry Point 0x0000000054601000
5455 11:05:44.162418 Loaded segments
5456 11:05:44.165002 NOTICE: MT8183 bl31_setup
5457 11:05:44.172826 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5458 11:05:44.175627 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5459 11:05:44.179247 INFO: [DEVAPC] dump DEVAPC registers:
5460 11:05:44.188882 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5461 11:05:44.195449 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5462 11:05:44.205420 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5463 11:05:44.211698 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5464 11:05:44.222199 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5465 11:05:44.228594 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5466 11:05:44.238655 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5467 11:05:44.245683 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5468 11:05:44.252575 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5469 11:05:44.262006 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5470 11:05:44.269102 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5471 11:05:44.278603 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5472 11:05:44.285366 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5473 11:05:44.295585 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5474 11:05:44.301639 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5475 11:05:44.308482 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5476 11:05:44.315339 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5477 11:05:44.321960 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5478 11:05:44.332044 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5479 11:05:44.338523 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5480 11:05:44.345612 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5481 11:05:44.351941 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5482 11:05:44.355538 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5483 11:05:44.358624 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5484 11:05:44.361751 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5485 11:05:44.364963 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5486 11:05:44.368192 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5487 11:05:44.374913 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5488 11:05:44.378262 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5489 11:05:44.382229 WARNING: region 0:
5490 11:05:44.384968 WARNING: apc:0x168, sa:0x0, ea:0xfff
5491 11:05:44.388674 WARNING: region 1:
5492 11:05:44.392364 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5493 11:05:44.392869 WARNING: region 2:
5494 11:05:44.395299 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5495 11:05:44.398619 WARNING: region 3:
5496 11:05:44.401636 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5497 11:05:44.402023 WARNING: region 4:
5498 11:05:44.408268 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5499 11:05:44.408730 WARNING: region 5:
5500 11:05:44.411586 WARNING: apc:0x0, sa:0x0, ea:0x0
5501 11:05:44.415479 WARNING: region 6:
5502 11:05:44.415864 WARNING: apc:0x0, sa:0x0, ea:0x0
5503 11:05:44.418082 WARNING: region 7:
5504 11:05:44.421656 WARNING: apc:0x0, sa:0x0, ea:0x0
5505 11:05:44.428024 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5506 11:05:44.431772 INFO: SPM: enable SPMC mode
5507 11:05:44.435134 NOTICE: spm_boot_init() start
5508 11:05:44.435525 NOTICE: spm_boot_init() end
5509 11:05:44.441575 INFO: BL31: Initializing runtime services
5510 11:05:44.444998 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5511 11:05:44.451403 INFO: BL31: Preparing for EL3 exit to normal world
5512 11:05:44.454606 INFO: Entry point address = 0x80000000
5513 11:05:44.457907 INFO: SPSR = 0x8
5514 11:05:44.478881
5515 11:05:44.479340
5516 11:05:44.479682
5517 11:05:44.481250 end: 2.2.3 depthcharge-start (duration 00:00:24) [common]
5518 11:05:44.481837 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5519 11:05:44.482198 Setting prompt string to ['jacuzzi:']
5520 11:05:44.482525 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5521 11:05:44.483107 Starting depthcharge on Juniper...
5522 11:05:44.483424
5523 11:05:44.485612 vboot_handoff: creating legacy vboot_handoff structure
5524 11:05:44.486006
5525 11:05:44.488896 ec_init(0): CrosEC protocol v3 supported (544, 544)
5526 11:05:44.489366
5527 11:05:44.493075 Wipe memory regions:
5528 11:05:44.493539
5529 11:05:44.495456 [0x00000040000000, 0x00000054600000)
5530 11:05:44.538417
5531 11:05:44.538934 [0x00000054660000, 0x00000080000000)
5532 11:05:44.630161
5533 11:05:44.630677 [0x000000811994a0, 0x000000ffeda000)
5534 11:05:44.889258
5535 11:05:44.889720 [0x00000100000000, 0x00000140000000)
5536 11:05:45.021338
5537 11:05:45.024570 Initializing XHCI USB controller at 0x11200000.
5538 11:05:45.047877
5539 11:05:45.050986 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5540 11:05:45.051071
5541 11:05:45.051137
5542 11:05:45.051403 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5543 11:05:45.051484 Sending line: 'tftpboot 192.168.201.1 14786834/tftp-deploy-fkces6to/kernel/image.itb 14786834/tftp-deploy-fkces6to/kernel/cmdline '
5545 11:05:45.152069 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5546 11:05:45.152219 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5547 11:05:45.156573 jacuzzi: tftpboot 192.168.201.1 14786834/tftp-deploy-fkces6to/kernel/image.ittp-deploy-fkces6to/kernel/cmdline
5548 11:05:45.156659
5549 11:05:45.156725 Waiting for link
5550 11:05:45.562343
5551 11:05:45.562846 R8152: Initializing
5552 11:05:45.563185
5553 11:05:45.565842 Version 9 (ocp_data = 6010)
5554 11:05:45.566350
5555 11:05:45.568967 R8152: Done initializing
5556 11:05:45.569391
5557 11:05:45.569718 Adding net device
5558 11:05:45.955053
5559 11:05:45.955569 done.
5560 11:05:45.955906
5561 11:05:45.956224 MAC: 00:e0:4c:68:0b:b9
5562 11:05:45.956574
5563 11:05:45.957871 Sending DHCP discover... done.
5564 11:05:45.958296
5565 11:05:45.961253 Waiting for reply... done.
5566 11:05:45.961681
5567 11:05:45.964233 Sending DHCP request... done.
5568 11:05:45.964398
5569 11:05:45.967762 Waiting for reply... done.
5570 11:05:45.967927
5571 11:05:45.968056 My ip is 192.168.201.13
5572 11:05:45.968176
5573 11:05:45.970870 The DHCP server ip is 192.168.201.1
5574 11:05:45.971065
5575 11:05:45.977607 TFTP server IP predefined by user: 192.168.201.1
5576 11:05:45.977978
5577 11:05:45.984504 Bootfile predefined by user: 14786834/tftp-deploy-fkces6to/kernel/image.itb
5578 11:05:45.984981
5579 11:05:45.985282 Sending tftp read request... done.
5580 11:05:45.985562
5581 11:05:45.994292 Waiting for the transfer...
5582 11:05:45.994672
5583 11:05:46.329501 00000000 ################################################################
5584 11:05:46.329640
5585 11:05:46.590519 00080000 ################################################################
5586 11:05:46.590652
5587 11:05:46.844153 00100000 ################################################################
5588 11:05:46.844285
5589 11:05:47.098213 00180000 ################################################################
5590 11:05:47.098346
5591 11:05:47.353903 00200000 ################################################################
5592 11:05:47.354036
5593 11:05:47.606578 00280000 ################################################################
5594 11:05:47.606708
5595 11:05:47.864428 00300000 ################################################################
5596 11:05:47.864599
5597 11:05:48.122339 00380000 ################################################################
5598 11:05:48.122471
5599 11:05:48.388323 00400000 ################################################################
5600 11:05:48.388489
5601 11:05:48.641513 00480000 ################################################################
5602 11:05:48.641645
5603 11:05:48.895230 00500000 ################################################################
5604 11:05:48.895360
5605 11:05:49.155715 00580000 ################################################################
5606 11:05:49.155852
5607 11:05:49.455464 00600000 ################################################################
5608 11:05:49.455597
5609 11:05:49.730920 00680000 ################################################################
5610 11:05:49.731053
5611 11:05:50.010640 00700000 ################################################################
5612 11:05:50.010776
5613 11:05:50.290896 00780000 ################################################################
5614 11:05:50.291021
5615 11:05:50.557313 00800000 ################################################################
5616 11:05:50.557470
5617 11:05:50.825424 00880000 ################################################################
5618 11:05:50.825563
5619 11:05:51.088751 00900000 ################################################################
5620 11:05:51.088883
5621 11:05:51.358436 00980000 ################################################################
5622 11:05:51.358570
5623 11:05:51.621496 00a00000 ################################################################
5624 11:05:51.621622
5625 11:05:51.904470 00a80000 ################################################################
5626 11:05:51.904636
5627 11:05:52.195913 00b00000 ################################################################
5628 11:05:52.196050
5629 11:05:52.495691 00b80000 ################################################################
5630 11:05:52.495852
5631 11:05:52.788072 00c00000 ################################################################
5632 11:05:52.788199
5633 11:05:53.085905 00c80000 ################################################################
5634 11:05:53.086035
5635 11:05:53.344876 00d00000 ################################################################
5636 11:05:53.345008
5637 11:05:53.597443 00d80000 ################################################################
5638 11:05:53.597576
5639 11:05:53.852683 00e00000 ################################################################
5640 11:05:53.852812
5641 11:05:54.106813 00e80000 ################################################################
5642 11:05:54.106942
5643 11:05:54.394924 00f00000 ################################################################
5644 11:05:54.395063
5645 11:05:54.692596 00f80000 ################################################################
5646 11:05:54.692722
5647 11:05:54.996320 01000000 ################################################################
5648 11:05:54.996461
5649 11:05:55.270468 01080000 ################################################################
5650 11:05:55.270637
5651 11:05:55.533857 01100000 ################################################################
5652 11:05:55.533982
5653 11:05:55.827555 01180000 ################################################################
5654 11:05:55.827702
5655 11:05:56.105928 01200000 ################################################################
5656 11:05:56.106064
5657 11:05:56.372335 01280000 ################################################################
5658 11:05:56.372502
5659 11:05:56.633337 01300000 ################################################################
5660 11:05:56.633469
5661 11:05:56.894265 01380000 ################################################################
5662 11:05:56.894388
5663 11:05:57.183214 01400000 ################################################################
5664 11:05:57.183350
5665 11:05:57.458726 01480000 ################################################################
5666 11:05:57.458862
5667 11:05:57.724555 01500000 ################################################################
5668 11:05:57.724712
5669 11:05:58.016536 01580000 ################################################################
5670 11:05:58.016663
5671 11:05:58.307038 01600000 ################################################################
5672 11:05:58.307172
5673 11:05:58.595923 01680000 ################################################################
5674 11:05:58.596059
5675 11:05:58.877504 01700000 ################################################################
5676 11:05:58.877635
5677 11:05:59.168925 01780000 ################################################################
5678 11:05:59.169058
5679 11:05:59.427236 01800000 ################################################################
5680 11:05:59.427399
5681 11:05:59.691654 01880000 ################################################################
5682 11:05:59.691781
5683 11:05:59.945403 01900000 ################################################################
5684 11:05:59.945557
5685 11:06:00.199321 01980000 ################################################################
5686 11:06:00.199480
5687 11:06:00.452218 01a00000 ################################################################
5688 11:06:00.452376
5689 11:06:00.706862 01a80000 ################################################################
5690 11:06:00.707018
5691 11:06:00.968316 01b00000 ################################################################
5692 11:06:00.968446
5693 11:06:01.232697 01b80000 ################################################################
5694 11:06:01.232861
5695 11:06:01.495498 01c00000 ################################################################
5696 11:06:01.495633
5697 11:06:01.761092 01c80000 ################################################################
5698 11:06:01.761227
5699 11:06:02.029087 01d00000 ################################################################
5700 11:06:02.029264
5701 11:06:02.319388 01d80000 ################################################################
5702 11:06:02.319521
5703 11:06:02.603999 01e00000 ################################################################
5704 11:06:02.604157
5705 11:06:02.899209 01e80000 ################################################################
5706 11:06:02.899344
5707 11:06:03.165964 01f00000 ################################################################
5708 11:06:03.166098
5709 11:06:03.431829 01f80000 ################################################################
5710 11:06:03.431962
5711 11:06:03.699230 02000000 ################################################################
5712 11:06:03.699388
5713 11:06:03.923765 02080000 ####################################################### done.
5714 11:06:03.923900
5715 11:06:03.926978 The bootfile was 34522886 bytes long.
5716 11:06:03.927063
5717 11:06:03.930331 Sending tftp read request... done.
5718 11:06:03.930417
5719 11:06:03.933666 Waiting for the transfer...
5720 11:06:03.933751
5721 11:06:03.933817 00000000 # done.
5722 11:06:03.933879
5723 11:06:03.943543 Command line loaded dynamically from TFTP file: 14786834/tftp-deploy-fkces6to/kernel/cmdline
5724 11:06:03.943629
5725 11:06:03.960074 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5726 11:06:03.960166
5727 11:06:03.960232 Loading FIT.
5728 11:06:03.960317
5729 11:06:03.963727 Image ramdisk-1 has 21346891 bytes.
5730 11:06:03.963837
5731 11:06:03.967018 Image fdt-1 has 57695 bytes.
5732 11:06:03.967104
5733 11:06:03.970009 Image kernel-1 has 13116259 bytes.
5734 11:06:03.970094
5735 11:06:03.976595 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5736 11:06:03.976680
5737 11:06:03.990013 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5738 11:06:03.990098
5739 11:06:03.996724 Choosing best match conf-1 for compat google,juniper-sku16.
5740 11:06:03.996835
5741 11:06:04.004394 Connected to device vid:did:rid of 1ae0:0028:00
5742 11:06:04.012440
5743 11:06:04.016053 tpm_get_response: command 0x17b, return code 0x0
5744 11:06:04.016137
5745 11:06:04.019053 tpm_cleanup: add release locality here.
5746 11:06:04.019137
5747 11:06:04.022413 Shutting down all USB controllers.
5748 11:06:04.022497
5749 11:06:04.025782 Removing current net device
5750 11:06:04.025874
5751 11:06:04.028877 Exiting depthcharge with code 4 at timestamp: 36816489
5752 11:06:04.028964
5753 11:06:04.032553 LZMA decompressing kernel-1 to 0x80193568
5754 11:06:04.032637
5755 11:06:04.038882 LZMA decompressing kernel-1 to 0x40000000
5756 11:06:05.902685
5757 11:06:05.903262 jumping to kernel
5758 11:06:05.905122 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
5759 11:06:05.905623 start: 2.2.5 auto-login-action (timeout 00:04:05) [common]
5760 11:06:05.905989 Setting prompt string to ['Linux version [0-9]']
5761 11:06:05.906328 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5762 11:06:05.906683 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5763 11:06:05.977789
5764 11:06:05.980664 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5765 11:06:05.984375 start: 2.2.5.1 login-action (timeout 00:04:05) [common]
5766 11:06:05.984845 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5767 11:06:05.985219 Setting prompt string to []
5768 11:06:05.985615 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5769 11:06:05.985976 Using line separator: #'\n'#
5770 11:06:05.986273 No login prompt set.
5771 11:06:05.986581 Parsing kernel messages
5772 11:06:05.987025 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5773 11:06:05.987581 [login-action] Waiting for messages, (timeout 00:04:05)
5774 11:06:05.987900 Waiting using forced prompt support (timeout 00:02:03)
5775 11:06:06.004566 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j261272-arm64-gcc-12-defconfig-arm64-chromebook-bgdbp) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Wed Jul 10 10:43:20 UTC 2024
5776 11:06:06.007126 [ 0.000000] random: crng init done
5777 11:06:06.010754 [ 0.000000] Machine model: Google juniper sku16 board
5778 11:06:06.014177 [ 0.000000] efi: UEFI not found.
5779 11:06:06.023386 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5780 11:06:06.030373 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5781 11:06:06.040369 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5782 11:06:06.043897 [ 0.000000] printk: bootconsole [mtk8250] enabled
5783 11:06:06.051446 [ 0.000000] NUMA: No NUMA configuration found
5784 11:06:06.058301 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5785 11:06:06.065121 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5786 11:06:06.065689 [ 0.000000] Zone ranges:
5787 11:06:06.071420 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5788 11:06:06.074921 [ 0.000000] DMA32 empty
5789 11:06:06.081051 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5790 11:06:06.084640 [ 0.000000] Movable zone start for each node
5791 11:06:06.088074 [ 0.000000] Early memory node ranges
5792 11:06:06.094219 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5793 11:06:06.101355 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5794 11:06:06.107812 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5795 11:06:06.114265 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5796 11:06:06.120753 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5797 11:06:06.127632 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5798 11:06:06.148612 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5799 11:06:06.154893 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5800 11:06:06.161460 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5801 11:06:06.164556 [ 0.000000] psci: probing for conduit method from DT.
5802 11:06:06.171221 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5803 11:06:06.174584 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5804 11:06:06.181362 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5805 11:06:06.185034 [ 0.000000] psci: SMC Calling Convention v1.1
5806 11:06:06.191481 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5807 11:06:06.195095 [ 0.000000] Detected VIPT I-cache on CPU0
5808 11:06:06.201341 [ 0.000000] CPU features: detected: GIC system register CPU interface
5809 11:06:06.207949 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5810 11:06:06.214445 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5811 11:06:06.220849 [ 0.000000] CPU features: detected: ARM erratum 845719
5812 11:06:06.224530 [ 0.000000] alternatives: applying boot alternatives
5813 11:06:06.227768 [ 0.000000] Fallback order for Node 0: 0
5814 11:06:06.234046 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5815 11:06:06.237508 [ 0.000000] Policy zone: Normal
5816 11:06:06.257452 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5817 11:06:06.270572 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5818 11:06:06.277261 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5819 11:06:06.287807 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5820 11:06:06.293819 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5821 11:06:06.297414 <6>[ 0.000000] software IO TLB: area num 8.
5822 11:06:06.323111 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5823 11:06:06.381166 <6>[ 0.000000] Memory: 3894228K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 264236K reserved, 32768K cma-reserved)
5824 11:06:06.388149 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5825 11:06:06.394772 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5826 11:06:06.397867 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5827 11:06:06.404595 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5828 11:06:06.411198 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5829 11:06:06.414584 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5830 11:06:06.424426 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5831 11:06:06.430661 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5832 11:06:06.434141 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5833 11:06:06.446772 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5834 11:06:06.453050 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5835 11:06:06.456608 <6>[ 0.000000] GICv3: 640 SPIs implemented
5836 11:06:06.460216 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5837 11:06:06.463202 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5838 11:06:06.469454 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5839 11:06:06.476232 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5840 11:06:06.486501 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5841 11:06:06.499341 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5842 11:06:06.505993 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5843 11:06:06.518398 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5844 11:06:06.531453 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5845 11:06:06.538214 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5846 11:06:06.545014 <6>[ 0.009476] Console: colour dummy device 80x25
5847 11:06:06.548087 <6>[ 0.014512] printk: console [tty1] enabled
5848 11:06:06.558324 <6>[ 0.018901] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5849 11:06:06.564665 <6>[ 0.029366] pid_max: default: 32768 minimum: 301
5850 11:06:06.568400 <6>[ 0.034247] LSM: Security Framework initializing
5851 11:06:06.578735 <6>[ 0.039161] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5852 11:06:06.584653 <6>[ 0.046783] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5853 11:06:06.591459 <4>[ 0.055654] cacheinfo: Unable to detect cache hierarchy for CPU 0
5854 11:06:06.601277 <6>[ 0.062281] cblist_init_generic: Setting adjustable number of callback queues.
5855 11:06:06.607671 <6>[ 0.069728] cblist_init_generic: Setting shift to 3 and lim to 1.
5856 11:06:06.614230 <6>[ 0.076080] cblist_init_generic: Setting adjustable number of callback queues.
5857 11:06:06.621051 <6>[ 0.083525] cblist_init_generic: Setting shift to 3 and lim to 1.
5858 11:06:06.624228 <6>[ 0.089925] rcu: Hierarchical SRCU implementation.
5859 11:06:06.630892 <6>[ 0.094950] rcu: Max phase no-delay instances is 1000.
5860 11:06:06.638099 <6>[ 0.102865] EFI services will not be available.
5861 11:06:06.641390 <6>[ 0.107814] smp: Bringing up secondary CPUs ...
5862 11:06:06.652424 <6>[ 0.113096] Detected VIPT I-cache on CPU1
5863 11:06:06.658934 <4>[ 0.113143] cacheinfo: Unable to detect cache hierarchy for CPU 1
5864 11:06:06.664990 <6>[ 0.113150] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5865 11:06:06.672514 <6>[ 0.113183] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5866 11:06:06.675558 <6>[ 0.113665] Detected VIPT I-cache on CPU2
5867 11:06:06.681860 <4>[ 0.113699] cacheinfo: Unable to detect cache hierarchy for CPU 2
5868 11:06:06.688712 <6>[ 0.113703] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5869 11:06:06.695526 <6>[ 0.113716] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5870 11:06:06.698865 <6>[ 0.114162] Detected VIPT I-cache on CPU3
5871 11:06:06.705013 <4>[ 0.114193] cacheinfo: Unable to detect cache hierarchy for CPU 3
5872 11:06:06.711876 <6>[ 0.114197] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5873 11:06:06.718436 <6>[ 0.114209] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5874 11:06:06.725280 <6>[ 0.114782] CPU features: detected: Spectre-v2
5875 11:06:06.728378 <6>[ 0.114793] CPU features: detected: Spectre-BHB
5876 11:06:06.735104 <6>[ 0.114796] CPU features: detected: ARM erratum 858921
5877 11:06:06.738507 <6>[ 0.114802] Detected VIPT I-cache on CPU4
5878 11:06:06.745704 <4>[ 0.114849] cacheinfo: Unable to detect cache hierarchy for CPU 4
5879 11:06:06.751829 <6>[ 0.114857] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5880 11:06:06.758409 <6>[ 0.114865] arch_timer: Enabling local workaround for ARM erratum 858921
5881 11:06:06.765088 <6>[ 0.114876] arch_timer: CPU4: Trapping CNTVCT access
5882 11:06:06.771935 <6>[ 0.114883] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5883 11:06:06.775141 <6>[ 0.115369] Detected VIPT I-cache on CPU5
5884 11:06:06.781585 <4>[ 0.115408] cacheinfo: Unable to detect cache hierarchy for CPU 5
5885 11:06:06.788412 <6>[ 0.115414] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5886 11:06:06.795421 <6>[ 0.115421] arch_timer: Enabling local workaround for ARM erratum 858921
5887 11:06:06.801649 <6>[ 0.115427] arch_timer: CPU5: Trapping CNTVCT access
5888 11:06:06.808378 <6>[ 0.115432] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5889 11:06:06.811710 <6>[ 0.115870] Detected VIPT I-cache on CPU6
5890 11:06:06.818112 <4>[ 0.115916] cacheinfo: Unable to detect cache hierarchy for CPU 6
5891 11:06:06.824647 <6>[ 0.115922] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5892 11:06:06.831504 <6>[ 0.115929] arch_timer: Enabling local workaround for ARM erratum 858921
5893 11:06:06.838365 <6>[ 0.115935] arch_timer: CPU6: Trapping CNTVCT access
5894 11:06:06.844928 <6>[ 0.115940] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5895 11:06:06.848010 <6>[ 0.116470] Detected VIPT I-cache on CPU7
5896 11:06:06.854516 <4>[ 0.116513] cacheinfo: Unable to detect cache hierarchy for CPU 7
5897 11:06:06.861199 <6>[ 0.116520] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5898 11:06:06.870985 <6>[ 0.116527] arch_timer: Enabling local workaround for ARM erratum 858921
5899 11:06:06.874396 <6>[ 0.116533] arch_timer: CPU7: Trapping CNTVCT access
5900 11:06:06.880974 <6>[ 0.116538] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5901 11:06:06.884606 <6>[ 0.116600] smp: Brought up 1 node, 8 CPUs
5902 11:06:06.890878 <6>[ 0.355473] SMP: Total of 8 processors activated.
5903 11:06:06.898122 <6>[ 0.360409] CPU features: detected: 32-bit EL0 Support
5904 11:06:06.900922 <6>[ 0.365780] CPU features: detected: 32-bit EL1 Support
5905 11:06:06.907547 <6>[ 0.371147] CPU features: detected: CRC32 instructions
5906 11:06:06.911112 <6>[ 0.376573] CPU: All CPU(s) started at EL2
5907 11:06:06.917700 <6>[ 0.380911] alternatives: applying system-wide alternatives
5908 11:06:06.924064 <6>[ 0.388913] devtmpfs: initialized
5909 11:06:06.936679 <6>[ 0.397843] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5910 11:06:06.946251 <6>[ 0.407792] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5911 11:06:06.949707 <6>[ 0.415515] pinctrl core: initialized pinctrl subsystem
5912 11:06:06.958274 <6>[ 0.422628] DMI not present or invalid.
5913 11:06:06.964657 <6>[ 0.426997] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5914 11:06:06.971223 <6>[ 0.433891] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5915 11:06:06.981065 <6>[ 0.441418] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5916 11:06:06.987675 <6>[ 0.449669] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5917 11:06:06.994894 <6>[ 0.457845] audit: initializing netlink subsys (disabled)
5918 11:06:07.001214 <5>[ 0.463551] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5919 11:06:07.007647 <6>[ 0.464524] thermal_sys: Registered thermal governor 'step_wise'
5920 11:06:07.014197 <6>[ 0.471517] thermal_sys: Registered thermal governor 'power_allocator'
5921 11:06:07.018018 <6>[ 0.477816] cpuidle: using governor menu
5922 11:06:07.024273 <6>[ 0.488780] NET: Registered PF_QIPCRTR protocol family
5923 11:06:07.030868 <6>[ 0.494267] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5924 11:06:07.037281 <6>[ 0.501365] ASID allocator initialised with 32768 entries
5925 11:06:07.044011 <6>[ 0.508133] Serial: AMBA PL011 UART driver
5926 11:06:07.054831 <4>[ 0.519484] Trying to register duplicate clock ID: 113
5927 11:06:07.115244 <6>[ 0.576414] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5928 11:06:07.129852 <6>[ 0.590816] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5929 11:06:07.132718 <6>[ 0.600594] KASLR enabled
5930 11:06:07.147318 <6>[ 0.608552] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5931 11:06:07.153913 <6>[ 0.615555] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5932 11:06:07.161012 <6>[ 0.622032] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5933 11:06:07.167332 <6>[ 0.629022] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5934 11:06:07.173362 <6>[ 0.635496] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5935 11:06:07.180415 <6>[ 0.642486] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5936 11:06:07.187425 <6>[ 0.648959] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5937 11:06:07.193820 <6>[ 0.655950] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5938 11:06:07.197542 <6>[ 0.663512] ACPI: Interpreter disabled.
5939 11:06:07.206655 <6>[ 0.671489] iommu: Default domain type: Translated
5940 11:06:07.213645 <6>[ 0.676597] iommu: DMA domain TLB invalidation policy: strict mode
5941 11:06:07.216958 <5>[ 0.683230] SCSI subsystem initialized
5942 11:06:07.223711 <6>[ 0.687642] usbcore: registered new interface driver usbfs
5943 11:06:07.230052 <6>[ 0.693370] usbcore: registered new interface driver hub
5944 11:06:07.233464 <6>[ 0.698911] usbcore: registered new device driver usb
5945 11:06:07.240563 <6>[ 0.705217] pps_core: LinuxPPS API ver. 1 registered
5946 11:06:07.250752 <6>[ 0.710402] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5947 11:06:07.253768 <6>[ 0.719726] PTP clock support registered
5948 11:06:07.257394 <6>[ 0.723979] EDAC MC: Ver: 3.0.0
5949 11:06:07.265024 <6>[ 0.729626] FPGA manager framework
5950 11:06:07.268239 <6>[ 0.733311] Advanced Linux Sound Architecture Driver Initialized.
5951 11:06:07.272416 <6>[ 0.740070] vgaarb: loaded
5952 11:06:07.278773 <6>[ 0.743190] clocksource: Switched to clocksource arch_sys_counter
5953 11:06:07.285312 <5>[ 0.749624] VFS: Disk quotas dquot_6.6.0
5954 11:06:07.292709 <6>[ 0.753800] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5955 11:06:07.296063 <6>[ 0.760973] pnp: PnP ACPI: disabled
5956 11:06:07.303362 <6>[ 0.767842] NET: Registered PF_INET protocol family
5957 11:06:07.310281 <6>[ 0.773066] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5958 11:06:07.322141 <6>[ 0.782968] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5959 11:06:07.331661 <6>[ 0.791722] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5960 11:06:07.338009 <6>[ 0.799674] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5961 11:06:07.344935 <6>[ 0.807907] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5962 11:06:07.351450 <6>[ 0.816001] TCP: Hash tables configured (established 32768 bind 32768)
5963 11:06:07.361368 <6>[ 0.822829] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5964 11:06:07.368021 <6>[ 0.829805] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5965 11:06:07.374757 <6>[ 0.837286] NET: Registered PF_UNIX/PF_LOCAL protocol family
5966 11:06:07.381161 <6>[ 0.843418] RPC: Registered named UNIX socket transport module.
5967 11:06:07.384618 <6>[ 0.849562] RPC: Registered udp transport module.
5968 11:06:07.391020 <6>[ 0.854488] RPC: Registered tcp transport module.
5969 11:06:07.397715 <6>[ 0.859410] RPC: Registered tcp NFSv4.1 backchannel transport module.
5970 11:06:07.400868 <6>[ 0.866062] PCI: CLS 0 bytes, default 64
5971 11:06:07.404024 <6>[ 0.870347] Unpacking initramfs...
5972 11:06:07.418475 <6>[ 0.879823] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5973 11:06:07.428612 <6>[ 0.888453] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5974 11:06:07.431431 <6>[ 0.897312] kvm [1]: IPA Size Limit: 40 bits
5975 11:06:07.438680 <6>[ 0.903642] kvm [1]: vgic-v2@c420000
5976 11:06:07.442235 <6>[ 0.907457] kvm [1]: GIC system register CPU interface enabled
5977 11:06:07.448725 <6>[ 0.913632] kvm [1]: vgic interrupt IRQ18
5978 11:06:07.452760 <6>[ 0.917999] kvm [1]: Hyp mode initialized successfully
5979 11:06:07.459848 <5>[ 0.924279] Initialise system trusted keyrings
5980 11:06:07.466325 <6>[ 0.929109] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5981 11:06:07.474593 <6>[ 0.938938] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5982 11:06:07.481152 <5>[ 0.945404] NFS: Registering the id_resolver key type
5983 11:06:07.484014 <5>[ 0.950716] Key type id_resolver registered
5984 11:06:07.490714 <5>[ 0.955129] Key type id_legacy registered
5985 11:06:07.497330 <6>[ 0.959441] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5986 11:06:07.504018 <6>[ 0.966363] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5987 11:06:07.510702 <6>[ 0.974129] 9p: Installing v9fs 9p2000 file system support
5988 11:06:07.538784 <5>[ 1.003603] Key type asymmetric registered
5989 11:06:07.542276 <5>[ 1.007947] Asymmetric key parser 'x509' registered
5990 11:06:07.552006 <6>[ 1.013100] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5991 11:06:07.555258 <6>[ 1.020714] io scheduler mq-deadline registered
5992 11:06:07.558626 <6>[ 1.025472] io scheduler kyber registered
5993 11:06:07.581592 <6>[ 1.046261] EINJ: ACPI disabled.
5994 11:06:07.588171 <4>[ 1.050026] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5995 11:06:07.626311 <6>[ 1.090753] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5996 11:06:07.634432 <6>[ 1.099251] printk: console [ttyS0] disabled
5997 11:06:07.662067 <6>[ 1.123898] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5998 11:06:07.668681 <6>[ 1.133380] printk: console [ttyS0] enabled
5999 11:06:07.672132 <6>[ 1.133380] printk: console [ttyS0] enabled
6000 11:06:07.678533 <6>[ 1.142301] printk: bootconsole [mtk8250] disabled
6001 11:06:07.681994 <6>[ 1.142301] printk: bootconsole [mtk8250] disabled
6002 11:06:07.692000 <3>[ 1.152846] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6003 11:06:07.698796 <3>[ 1.161226] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6004 11:06:07.727798 <6>[ 1.189636] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6005 11:06:07.735028 <6>[ 1.199300] serial serial0: tty port ttyS1 registered
6006 11:06:07.741226 <6>[ 1.205870] SuperH (H)SCI(F) driver initialized
6007 11:06:07.744568 <6>[ 1.211358] msm_serial: driver initialized
6008 11:06:07.760469 <6>[ 1.221717] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6009 11:06:07.769907 <6>[ 1.230324] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6010 11:06:07.776274 <6>[ 1.238900] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6011 11:06:07.786401 <6>[ 1.247470] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6012 11:06:07.793253 <6>[ 1.256124] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6013 11:06:07.803236 <6>[ 1.264785] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6014 11:06:07.813013 <6>[ 1.273526] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6015 11:06:07.820192 <6>[ 1.282264] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6016 11:06:07.829622 <6>[ 1.290843] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6017 11:06:07.840019 <6>[ 1.299644] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6018 11:06:07.846733 <4>[ 1.312064] cacheinfo: Unable to detect cache hierarchy for CPU 0
6019 11:06:07.856421 <6>[ 1.321395] loop: module loaded
6020 11:06:07.868066 <6>[ 1.333316] vsim1: Bringing 1800000uV into 2700000-2700000uV
6021 11:06:07.885937 <6>[ 1.351333] megasas: 07.719.03.00-rc1
6022 11:06:07.895020 <6>[ 1.360110] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6023 11:06:07.909359 <6>[ 1.374571] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6024 11:06:07.926416 <6>[ 1.391339] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6025 11:06:07.983576 <6>[ 1.441887] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6026 11:06:08.108922 <6>[ 1.574029] Freeing initrd memory: 20844K
6027 11:06:08.128498 <4>[ 1.589992] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6028 11:06:08.134909 <4>[ 1.599219] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
6029 11:06:08.141347 <4>[ 1.605917] Hardware name: Google juniper sku16 board (DT)
6030 11:06:08.145083 <4>[ 1.611657] Call trace:
6031 11:06:08.148464 <4>[ 1.614358] dump_backtrace.part.0+0xe0/0xf0
6032 11:06:08.151525 <4>[ 1.618896] show_stack+0x18/0x30
6033 11:06:08.154839 <4>[ 1.622470] dump_stack_lvl+0x64/0x80
6034 11:06:08.161476 <4>[ 1.626390] dump_stack+0x18/0x34
6035 11:06:08.164683 <4>[ 1.629958] sysfs_warn_dup+0x64/0x80
6036 11:06:08.168120 <4>[ 1.633881] sysfs_do_create_link_sd+0xf0/0x100
6037 11:06:08.171345 <4>[ 1.638668] sysfs_create_link+0x20/0x40
6038 11:06:08.177920 <4>[ 1.642848] bus_add_device+0x64/0x120
6039 11:06:08.181149 <4>[ 1.646852] device_add+0x354/0x7ec
6040 11:06:08.184752 <4>[ 1.650598] of_device_add+0x44/0x60
6041 11:06:08.191219 <4>[ 1.654431] of_platform_device_create_pdata+0x90/0x124
6042 11:06:08.195075 <4>[ 1.659912] of_platform_bus_create+0x154/0x380
6043 11:06:08.198039 <4>[ 1.664698] of_platform_populate+0x50/0xfc
6044 11:06:08.204569 <4>[ 1.669137] parse_mtd_partitions+0x1d8/0x4e0
6045 11:06:08.208402 <4>[ 1.673753] mtd_device_parse_register+0xec/0x2e0
6046 11:06:08.211466 <4>[ 1.678715] spi_nor_probe+0x280/0x2f4
6047 11:06:08.217974 <4>[ 1.682719] spi_mem_probe+0x6c/0xc0
6048 11:06:08.221562 <4>[ 1.686552] spi_probe+0x84/0xe4
6049 11:06:08.224910 <4>[ 1.690038] really_probe+0xbc/0x2dc
6050 11:06:08.227938 <4>[ 1.693869] __driver_probe_device+0x78/0x114
6051 11:06:08.231591 <4>[ 1.698479] driver_probe_device+0xd8/0x15c
6052 11:06:08.238313 <4>[ 1.702918] __device_attach_driver+0xb8/0x134
6053 11:06:08.241966 <4>[ 1.707615] bus_for_each_drv+0x7c/0xd4
6054 11:06:08.245049 <4>[ 1.711709] __device_attach+0x9c/0x1a0
6055 11:06:08.251596 <4>[ 1.715798] device_initial_probe+0x14/0x20
6056 11:06:08.254872 <4>[ 1.720237] bus_probe_device+0x98/0xa0
6057 11:06:08.258628 <4>[ 1.724327] device_add+0x3c0/0x7ec
6058 11:06:08.261734 <4>[ 1.728071] __spi_add_device+0x78/0x120
6059 11:06:08.265631 <4>[ 1.732249] spi_add_device+0x44/0x80
6060 11:06:08.271888 <4>[ 1.736166] spi_register_controller+0x704/0xb20
6061 11:06:08.275123 <4>[ 1.741039] devm_spi_register_controller+0x4c/0xac
6062 11:06:08.278408 <4>[ 1.746172] mtk_spi_probe+0x4f4/0x684
6063 11:06:08.285375 <4>[ 1.750177] platform_probe+0x68/0xc0
6064 11:06:08.288566 <4>[ 1.754095] really_probe+0xbc/0x2dc
6065 11:06:08.291658 <4>[ 1.757925] __driver_probe_device+0x78/0x114
6066 11:06:08.298954 <4>[ 1.762537] driver_probe_device+0xd8/0x15c
6067 11:06:08.302316 <4>[ 1.766974] __driver_attach+0x94/0x19c
6068 11:06:08.305353 <4>[ 1.771064] bus_for_each_dev+0x74/0xd0
6069 11:06:08.308206 <4>[ 1.775157] driver_attach+0x24/0x30
6070 11:06:08.311515 <4>[ 1.778986] bus_add_driver+0x154/0x20c
6071 11:06:08.318460 <4>[ 1.783076] driver_register+0x78/0x130
6072 11:06:08.322124 <4>[ 1.787166] __platform_driver_register+0x28/0x34
6073 11:06:08.325169 <4>[ 1.792126] mtk_spi_driver_init+0x1c/0x28
6074 11:06:08.331918 <4>[ 1.796481] do_one_initcall+0x64/0x1dc
6075 11:06:08.335203 <4>[ 1.800572] kernel_init_freeable+0x218/0x284
6076 11:06:08.338328 <4>[ 1.805187] kernel_init+0x24/0x12c
6077 11:06:08.342018 <4>[ 1.808931] ret_from_fork+0x10/0x20
6078 11:06:08.353110 <6>[ 1.817792] tun: Universal TUN/TAP device driver, 1.6
6079 11:06:08.356551 <6>[ 1.824104] thunder_xcv, ver 1.0
6080 11:06:08.359719 <6>[ 1.827618] thunder_bgx, ver 1.0
6081 11:06:08.363088 <6>[ 1.831114] nicpf, ver 1.0
6082 11:06:08.374271 <6>[ 1.835503] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6083 11:06:08.377718 <6>[ 1.842986] hns3: Copyright (c) 2017 Huawei Corporation.
6084 11:06:08.380994 <6>[ 1.848582] hclge is initializing
6085 11:06:08.387658 <6>[ 1.852168] e1000: Intel(R) PRO/1000 Network Driver
6086 11:06:08.394460 <6>[ 1.857303] e1000: Copyright (c) 1999-2006 Intel Corporation.
6087 11:06:08.397757 <6>[ 1.863324] e1000e: Intel(R) PRO/1000 Network Driver
6088 11:06:08.404202 <6>[ 1.868546] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6089 11:06:08.411214 <6>[ 1.874742] igb: Intel(R) Gigabit Ethernet Network Driver
6090 11:06:08.417435 <6>[ 1.880398] igb: Copyright (c) 2007-2014 Intel Corporation.
6091 11:06:08.424308 <6>[ 1.886241] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6092 11:06:08.427572 <6>[ 1.892764] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6093 11:06:08.434629 <6>[ 1.899361] sky2: driver version 1.30
6094 11:06:08.441311 <6>[ 1.904630] usbcore: registered new device driver r8152-cfgselector
6095 11:06:08.447734 <6>[ 1.911174] usbcore: registered new interface driver r8152
6096 11:06:08.451187 <6>[ 1.917004] VFIO - User Level meta-driver version: 0.3
6097 11:06:08.460323 <6>[ 1.924834] mtu3 11201000.usb: uwk - reg:0x420, version:101
6098 11:06:08.466835 <4>[ 1.930708] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6099 11:06:08.473596 <6>[ 1.937992] mtu3 11201000.usb: dr_mode: 1, drd: auto
6100 11:06:08.480037 <6>[ 1.943217] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6101 11:06:08.483383 <6>[ 1.949410] mtu3 11201000.usb: usb3-drd: 0
6102 11:06:08.493906 <6>[ 1.954988] mtu3 11201000.usb: xHCI platform device register success...
6103 11:06:08.500511 <4>[ 1.963647] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6104 11:06:08.506822 <6>[ 1.971577] xhci-mtk 11200000.usb: xHCI Host Controller
6105 11:06:08.514192 <6>[ 1.977080] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6106 11:06:08.520392 <6>[ 1.984802] xhci-mtk 11200000.usb: USB3 root hub has no ports
6107 11:06:08.530733 <6>[ 1.990810] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6108 11:06:08.536965 <6>[ 2.000234] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6109 11:06:08.543685 <6>[ 2.006314] xhci-mtk 11200000.usb: xHCI Host Controller
6110 11:06:08.550527 <6>[ 2.011805] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6111 11:06:08.557120 <6>[ 2.019463] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6112 11:06:08.560181 <6>[ 2.026282] hub 1-0:1.0: USB hub found
6113 11:06:08.563701 <6>[ 2.030312] hub 1-0:1.0: 1 port detected
6114 11:06:08.574283 <6>[ 2.035658] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6115 11:06:08.577682 <6>[ 2.044287] hub 2-0:1.0: USB hub found
6116 11:06:08.587592 <3>[ 2.048336] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6117 11:06:08.594262 <6>[ 2.056228] usbcore: registered new interface driver usb-storage
6118 11:06:08.600737 <6>[ 2.062813] usbcore: registered new device driver onboard-usb-hub
6119 11:06:08.611027 <4>[ 2.071291] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6120 11:06:08.618857 <6>[ 2.083533] mt6397-rtc mt6358-rtc: registered as rtc0
6121 11:06:08.628496 <6>[ 2.089011] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-10T11:06:03 UTC (1720609563)
6122 11:06:08.632124 <6>[ 2.098898] i2c_dev: i2c /dev entries driver
6123 11:06:08.643528 <6>[ 2.105315] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6124 11:06:08.653657 <6>[ 2.113631] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6125 11:06:08.657087 <6>[ 2.122535] i2c 4-0058: Fixed dependency cycle(s) with /panel
6126 11:06:08.666790 <6>[ 2.128565] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6127 11:06:08.683113 <6>[ 2.148048] cpu cpu0: EM: created perf domain
6128 11:06:08.693003 <6>[ 2.153567] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6129 11:06:08.699781 <6>[ 2.164858] cpu cpu4: EM: created perf domain
6130 11:06:08.706934 <6>[ 2.171913] sdhci: Secure Digital Host Controller Interface driver
6131 11:06:08.713307 <6>[ 2.178368] sdhci: Copyright(c) Pierre Ossman
6132 11:06:08.720399 <6>[ 2.183806] Synopsys Designware Multimedia Card Interface Driver
6133 11:06:08.726793 <6>[ 2.184358] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6134 11:06:08.730136 <6>[ 2.190905] sdhci-pltfm: SDHCI platform and OF driver helper
6135 11:06:08.738691 <6>[ 2.203479] ledtrig-cpu: registered to indicate activity on CPUs
6136 11:06:08.746224 <6>[ 2.211207] usbcore: registered new interface driver usbhid
6137 11:06:08.749633 <6>[ 2.217043] usbhid: USB HID core driver
6138 11:06:08.759717 <6>[ 2.221353] spi_master spi2: will run message pump with realtime priority
6139 11:06:08.766690 <4>[ 2.221597] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6140 11:06:08.773531 <4>[ 2.235956] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6141 11:06:08.799925 <6>[ 2.258361] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6142 11:06:08.818921 <6>[ 2.273963] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6143 11:06:08.825732 <4>[ 2.282420] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6144 11:06:08.832042 <6>[ 2.296208] cros-ec-spi spi2.0: Chrome EC device registered
6145 11:06:08.845554 <4>[ 2.307326] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6146 11:06:08.848765 <6>[ 2.312057] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6147 11:06:08.858664 <4>[ 2.318707] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6148 11:06:08.861897 <6>[ 2.322169] mmc0: new HS400 MMC card at address 0001
6149 11:06:08.869042 <4>[ 2.329184] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6150 11:06:08.875159 <6>[ 2.334849] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6151 11:06:08.881992 <6>[ 2.343768] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6152 11:06:08.891723 <6>[ 2.356511] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6153 11:06:08.900059 <6>[ 2.365147] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6154 11:06:08.910267 <6>[ 2.370528] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6155 11:06:08.913697 <6>[ 2.371749] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6156 11:06:08.927216 <6>[ 2.384180] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6157 11:06:08.930531 <6>[ 2.385486] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6158 11:06:08.943621 <6>[ 2.387281] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6159 11:06:08.953643 <6>[ 2.387562] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6160 11:06:08.960326 <6>[ 2.397367] NET: Registered PF_PACKET protocol family
6161 11:06:08.963842 <6>[ 2.429297] 9pnet: Installing 9P2000 support
6162 11:06:08.967004 <5>[ 2.434052] Key type dns_resolver registered
6163 11:06:08.974016 <6>[ 2.439156] registered taskstats version 1
6164 11:06:08.977292 <5>[ 2.443535] Loading compiled-in X.509 certificates
6165 11:06:08.997411 <6>[ 2.459333] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6166 11:06:09.027078 <3>[ 2.488741] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6167 11:06:09.059514 <6>[ 2.517728] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6168 11:06:09.070585 <6>[ 2.532076] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6169 11:06:09.080171 <6>[ 2.540647] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6170 11:06:09.087204 <6>[ 2.549176] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6171 11:06:09.097144 <6>[ 2.557974] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6172 11:06:09.103903 <6>[ 2.566511] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6173 11:06:09.113526 <6>[ 2.575031] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6174 11:06:09.123595 <6>[ 2.583553] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6175 11:06:09.130401 <6>[ 2.592730] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6176 11:06:09.137061 <6>[ 2.600097] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6177 11:06:09.143687 <6>[ 2.607250] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6178 11:06:09.146675 <6>[ 2.614109] hub 1-1:1.0: USB hub found
6179 11:06:09.153575 <6>[ 2.614409] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6180 11:06:09.160214 <6>[ 2.618500] hub 1-1:1.0: 3 ports detected
6181 11:06:09.166853 <6>[ 2.625426] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6182 11:06:09.173263 <6>[ 2.637342] panfrost 13040000.gpu: clock rate = 511999970
6183 11:06:09.183186 <6>[ 2.643031] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6184 11:06:09.190010 <6>[ 2.653201] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6185 11:06:09.200040 <6>[ 2.661206] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6186 11:06:09.212850 <6>[ 2.669638] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6187 11:06:09.219644 <6>[ 2.681719] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6188 11:06:09.230049 <6>[ 2.690538] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6189 11:06:09.239361 <6>[ 2.699220] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6190 11:06:09.246497 <6>[ 2.708361] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6191 11:06:09.256225 <6>[ 2.717489] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6192 11:06:09.266206 <6>[ 2.726618] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6193 11:06:09.275784 <6>[ 2.735918] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6194 11:06:09.286138 <6>[ 2.745221] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6195 11:06:09.296124 <6>[ 2.754699] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6196 11:06:09.302539 <6>[ 2.764174] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6197 11:06:09.312752 <6>[ 2.773301] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6198 11:06:09.385420 <6>[ 2.846691] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6199 11:06:09.395125 <6>[ 2.855557] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6200 11:06:09.405845 <6>[ 2.867494] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6201 11:06:09.461967 <6>[ 2.923229] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6202 11:06:10.123385 <6>[ 3.119666] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6203 11:06:10.133268 <4>[ 3.236923] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6204 11:06:10.139732 <4>[ 3.236943] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6205 11:06:10.146321 <6>[ 3.271836] r8152 1-1.2:1.0 eth0: v1.12.13
6206 11:06:10.153014 <6>[ 3.351214] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6207 11:06:10.159660 <6>[ 3.568510] Console: switching to colour frame buffer device 170x48
6208 11:06:10.166184 <6>[ 3.629160] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6209 11:06:10.187816 <6>[ 3.646181] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6210 11:06:10.208000 <6>[ 3.665550] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6211 11:06:10.213853 <6>[ 3.678154] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6212 11:06:10.224832 <6>[ 3.686368] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6213 11:06:10.234640 <6>[ 3.694198] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6214 11:06:10.256407 <6>[ 3.714731] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6215 11:06:11.415538 <6>[ 4.879746] r8152 1-1.2:1.0 eth0: carrier on
6216 11:06:13.862632 <5>[ 4.903211] Sending DHCP requests .., OK
6217 11:06:13.869055 <6>[ 7.331598] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6218 11:06:13.872405 <6>[ 7.340042] IP-Config: Complete:
6219 11:06:13.885646 <6>[ 7.343609] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6220 11:06:13.895554 <6>[ 7.354508] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6221 11:06:13.907326 <6>[ 7.368880] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6222 11:06:13.915978 <6>[ 7.368890] nameserver0=192.168.201.1
6223 11:06:13.923723 <6>[ 7.388829] clk: Disabling unused clocks
6224 11:06:13.928627 <6>[ 7.396823] ALSA device list:
6225 11:06:13.937546 <6>[ 7.402727] No soundcards found.
6226 11:06:13.946675 <6>[ 7.411688] Freeing unused kernel memory: 8512K
6227 11:06:13.953967 <6>[ 7.418842] Run /init as init process
6228 11:06:13.993129 Starting syslogd: OK
6229 11:06:13.996256 Starting klogd: OK
6230 11:06:14.005919 Running sysctl: OK
6231 11:06:14.015855 Populating /dev using udev: <30>[ 7.480712] udevd[206]: starting version 3.2.9
6232 11:06:14.027218 <27>[ 7.492118] udevd[206]: specified user 'tss' unknown
6233 11:06:14.034556 <27>[ 7.499676] udevd[206]: specified group 'tss' unknown
6234 11:06:14.043240 <30>[ 7.508316] udevd[207]: starting eudev-3.2.9
6235 11:06:14.070269 <27>[ 7.535339] udevd[207]: specified user 'tss' unknown
6236 11:06:14.077754 <27>[ 7.542711] udevd[207]: specified group 'tss' unknown
6237 11:06:14.176275 <6>[ 7.637712] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6238 11:06:14.179862 <3>[ 7.644299] thermal_sys: Failed to find 'trips' node
6239 11:06:14.186281 <3>[ 7.647596] mtk-scp 10500000.scp: invalid resource
6240 11:06:14.192950 <3>[ 7.651117] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6241 11:06:14.199579 <6>[ 7.656250] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6242 11:06:14.209492 <3>[ 7.663475] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6243 11:06:14.219539 <3>[ 7.671316] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6244 11:06:14.226029 <6>[ 7.671962] remoteproc remoteproc0: scp is available
6245 11:06:14.233274 <4>[ 7.672032] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6246 11:06:14.240009 <6>[ 7.672038] remoteproc remoteproc0: powering up scp
6247 11:06:14.246511 <4>[ 7.672052] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6248 11:06:14.253259 <3>[ 7.672055] remoteproc remoteproc0: request_firmware failed: -2
6249 11:06:14.260023 <4>[ 7.679384] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6250 11:06:14.269846 <3>[ 7.689546] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6251 11:06:14.276216 <4>[ 7.694856] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6252 11:06:14.282903 <3>[ 7.697241] thermal_sys: Failed to find 'trips' node
6253 11:06:14.289461 <3>[ 7.697252] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6254 11:06:14.299466 <3>[ 7.697260] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6255 11:06:14.306533 <4>[ 7.697264] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6256 11:06:14.316568 <4>[ 7.700612] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6257 11:06:14.326462 <6>[ 7.701269] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6258 11:06:14.336337 <3>[ 7.703231] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6259 11:06:14.349551 <6>[ 7.704578] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6260 11:06:14.360104 <3>[ 7.705132] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6261 11:06:14.366659 <6>[ 7.708560] mc: Linux media interface: v0.10
6262 11:06:14.373122 <4>[ 7.711026] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6263 11:06:14.379596 <3>[ 7.716787] elan_i2c 2-0015: Error applying setting, reverse things back
6264 11:06:14.386528 <5>[ 7.717898] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6265 11:06:14.392898 <5>[ 7.741174] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6266 11:06:14.405666 <3>[ 7.751303] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6267 11:06:14.416336 <5>[ 7.753533] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6268 11:06:14.427616 <6>[ 7.753734] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6269 11:06:14.434462 <3>[ 7.760311] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6270 11:06:14.444409 <4>[ 7.768837] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6271 11:06:14.454351 <3>[ 7.776335] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6272 11:06:14.457590 <6>[ 7.777088] videodev: Linux video capture interface: v2.00
6273 11:06:14.464109 <6>[ 7.777442] cs_system_cfg: CoreSight Configuration manager initialised
6274 11:06:14.471336 <6>[ 7.786321] cfg80211: failed to load regulatory.db
6275 11:06:14.480792 <3>[ 7.796380] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6276 11:06:14.490580 <6>[ 7.796625] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6277 11:06:14.500342 <6>[ 7.796729] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6278 11:06:14.506950 <6>[ 7.796808] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6279 11:06:14.516935 <6>[ 7.796884] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6280 11:06:14.523381 <6>[ 7.796963] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6281 11:06:14.533285 <6>[ 7.797044] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6282 11:06:14.540173 <6>[ 7.807209] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6283 11:06:14.549915 <3>[ 7.818070] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6284 11:06:14.557069 <3>[ 7.818079] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6285 11:06:14.566745 <3>[ 7.818086] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6286 11:06:14.573609 <6>[ 7.830759] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6287 11:06:14.583372 <3>[ 7.835034] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6288 11:06:14.593075 <3>[ 7.835074] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6289 11:06:14.603129 <6>[ 7.846425] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6290 11:06:14.616202 <3>[ 7.850272] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6291 11:06:14.619921 <6>[ 7.888052] Bluetooth: Core ver 2.22
6292 11:06:14.626319 <3>[ 7.890996] debugfs: File 'Playback' in directory 'dapm' already present!
6293 11:06:14.633329 <6>[ 7.897476] NET: Registered PF_BLUETOOTH protocol family
6294 11:06:14.639698 <3>[ 7.905753] debugfs: File 'Capture' in directory 'dapm' already present!
6295 11:06:14.646540 <6>[ 7.905800] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6296 11:06:14.653606 <6>[ 7.914567] Bluetooth: HCI device and connection manager initialized
6297 11:06:14.660602 <6>[ 7.914584] Bluetooth: HCI socket layer initialized
6298 11:06:14.667343 <6>[ 7.916003] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6299 11:06:14.673963 <6>[ 7.916095] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6300 11:06:14.683864 <6>[ 7.917251] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6301 11:06:14.693843 <6>[ 7.917571] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video1 (81,1)
6302 11:06:14.703791 <6>[ 7.924850] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6303 11:06:14.717859 <6>[ 7.925078] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6304 11:06:14.721221 <6>[ 7.928869] Bluetooth: L2CAP socket layer initialized
6305 11:06:14.727475 <6>[ 7.928886] Bluetooth: SCO socket layer initialized
6306 11:06:14.733990 <6>[ 7.935942] usbcore: registered new interface driver uvcvideo
6307 11:06:14.740630 <6>[ 7.970611] Bluetooth: HCI UART driver ver 2.3
6308 11:06:14.750932 <6>[ 7.988872] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6309 11:06:14.756920 <6>[ 7.994825] Bluetooth: HCI UART protocol H4 registered
6310 11:06:14.760633 <6>[ 7.994884] Bluetooth: HCI UART protocol LL registered
6311 11:06:14.770794 <6>[ 8.002764] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6312 11:06:14.777565 <6>[ 8.010740] Bluetooth: HCI UART protocol Three-wire (H5) registered
6313 11:06:14.790581 <6>[ 8.019545] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6314 11:06:14.797185 <6>[ 8.028105] Bluetooth: HCI UART protocol Broadcom registered
6315 11:06:14.803787 <6>[ 8.184772] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6316 11:06:14.810585 <6>[ 8.186716] Bluetooth: HCI UART protocol QCA registered
6317 11:06:14.816919 <6>[ 8.188264] Bluetooth: hci0: setting up ROME/QCA6390
6318 11:06:14.849291 <6>[ 8.314064] Bluetooth: HCI UART protocol Marvell registered
6319 11:06:14.863346 <4>[ 8.324931] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6320 11:06:14.869955 <4>[ 8.324931] Fallback method does not support PEC.
6321 11:06:14.870049 done
6322 11:06:14.880948 <3>[ 8.342292] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6323 11:06:14.884282 Saving random seed: OK
6324 11:06:14.896128 <3>[ 8.357322] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6325 11:06:14.906252 Starting network: ip: RTNETLINK answers: File exists
6326 11:06:14.909820 FAIL
6327 11:06:14.937158 Starting dropbear sshd: <3>[ 8.402259] Bluetooth: hci0: Frame reassembly failed (-84)
6328 11:06:14.955690 <6>[ 8.420245] NET: Registered PF_INET6 protocol family
6329 11:06:14.962614 <6>[ 8.427065] Segment Routing with IPv6
6330 11:06:14.965442 <6>[ 8.431942] In-situ OAM (IOAM) with IPv6
6331 11:06:14.970425 OK
6332 11:06:14.982077 /bin/sh: can't access tty; job control turned off
6333 11:06:14.982446 Matched prompt #10: / #
6335 11:06:14.982652 Setting prompt string to ['/ #']
6336 11:06:14.982746 end: 2.2.5.1 login-action (duration 00:00:09) [common]
6338 11:06:14.982941 end: 2.2.5 auto-login-action (duration 00:00:09) [common]
6339 11:06:14.983030 start: 2.2.6 expect-shell-connection (timeout 00:03:56) [common]
6340 11:06:14.983098 Setting prompt string to ['/ #']
6341 11:06:14.983158 Forcing a shell prompt, looking for ['/ #']
6342 11:06:14.983217 Sending line: ''
6344 11:06:15.033549 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6345 11:06:15.033647 Waiting using forced prompt support (timeout 00:02:30)
6346 11:06:15.038487 / #
6347 11:06:15.038762 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6348 11:06:15.038859 start: 2.2.7 export-device-env (timeout 00:03:56) [common]
6349 11:06:15.038954 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6350 11:06:15.039043 end: 2.2 depthcharge-retry (duration 00:01:04) [common]
6351 11:06:15.039130 end: 2 depthcharge-action (duration 00:01:04) [common]
6352 11:06:15.039218 start: 3 lava-test-retry (timeout 00:01:00) [common]
6353 11:06:15.039306 start: 3.1 lava-test-shell (timeout 00:01:00) [common]
6354 11:06:15.039381 Using namespace: common
6355 11:06:15.039454 Sending line: '#'
6357 11:06:15.139916 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:01:00)
6358 11:06:15.140051 / # <6>[ 8.534417] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6359 11:06:15.145369 #
6360 11:06:15.145633 Using /lava-14786834
6361 11:06:15.145704 Sending line: 'export SHELL=/bin/sh'
6363 11:06:15.246215 / # <4>[ 8.635362] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6364 11:06:15.246294 <4>[ 8.655335] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6365 11:06:15.246359 export SHELL=/bin/sh<4>[ 8.670856] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6366 11:06:15.246420 <6>[ 8.683788] Bluetooth: hci0: QCA Product ID :0x00000008
6367 11:06:15.246480 <4>[ 8.684097] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6368 11:06:15.246539 <6>[ 8.689459] Bluetooth: hci0: QCA SOC Version :0x00000044
6369 11:06:15.246596 <6>[ 8.689464] Bluetooth: hci0: QCA ROM Version :0x00000302
6370 11:06:15.247036 <6>[ 8.701155] Bluetooth: hci0: QCA Patch Version:0x00000111
6371 11:06:15.288638 <6>[ 8.701166] Bluetooth: hci0: QCA controller version 0x00440302
6372 11:06:15.288727
6373 11:06:15.288792 / # <6>[ 8.701174] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6374 11:06:15.288897 <4>[ 8.711484] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6375 11:06:15.289169 Sending line: '. /lava-14786834/environment'
6377 11:06:15.389675 <3>[ 8.759055] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6378 11:06:15.389749 <3>[ 8.769386] Bluetooth: hci0: QCA Failed to download patch (-2)
6379 11:06:15.389879 . /lava-14786834/environment<3>[ 8.841692] Bluetooth: hci0: Frame reassembly failed (-84)
6380 11:06:15.389979 <4>[ 8.841706] Bluetooth: hci0: Received unexpected HCI Event 0x00
6381 11:06:15.390049 <3>[ 8.847463] Bluetooth: hci0: Frame reassembly failed (-84)
6382 11:06:15.432631
6383 11:06:15.432900 Sending line: '/lava-14786834/bin/lava-test-runner /lava-14786834/0'
6385 11:06:15.533360 Test shell timeout: 10s (minimum of the action and connection timeout)
6386 11:06:15.538508 / # /lava-14786834/bin/lava-test-runner /lava-14786834/0
6387 11:06:15.559298 + export 'TESTRUN_ID=0_dmesg'
6388 11:06:15.565849 + c<8>[ 9.030011] <LAVA_SIGNAL_STARTRUN 0_dmesg 14786834_1.5.2.3.1>
6389 11:06:15.566112 Received signal: <STARTRUN> 0_dmesg 14786834_1.5.2.3.1
6390 11:06:15.566183 Starting test lava.0_dmesg (14786834_1.5.2.3.1)
6391 11:06:15.566262 Skipping test definition patterns.
6392 11:06:15.569070 d /lava-14786834/0/tests/0_dmesg
6393 11:06:15.569153 + cat uuid
6394 11:06:15.572346 + UUID=14786834_1.5.2.3.1
6395 11:06:15.572478 + set +x
6396 11:06:15.579141 + KERNELCI_LAVA=y /bin/sh /opt/kernelci/dmesg.sh
6397 11:06:15.593998 <8>[ 9.055315] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0>
6398 11:06:15.594250 Received signal: <TESTCASE> TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0
6400 11:06:15.620105 <8>[ 9.081599] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0>
6401 11:06:15.620359 Received signal: <TESTCASE> TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0
6403 11:06:15.648137 <8>[ 9.109582] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0>
6404 11:06:15.648394 Received signal: <TESTCASE> TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0
6406 11:06:15.657596 + <8>[ 9.122523] <LAVA_SIGNAL_ENDRUN 0_dmesg 14786834_1.5.2.3.1>
6407 11:06:15.657849 Received signal: <ENDRUN> 0_dmesg 14786834_1.5.2.3.1
6408 11:06:15.657932 Ending use of test pattern.
6409 11:06:15.657992 Ending test lava.0_dmesg (14786834_1.5.2.3.1), duration 0.09
6411 11:06:15.661006 set +x
6412 11:06:15.664189 <LAVA_TEST_RUNNER EXIT>
6413 11:06:15.664436 ok: lava_test_shell seems to have completed
6414 11:06:15.664585 crit: pass
alert: pass
emerg: pass
6415 11:06:15.664674 end: 3.1 lava-test-shell (duration 00:00:01) [common]
6416 11:06:15.664757 end: 3 lava-test-retry (duration 00:00:01) [common]
6417 11:06:15.664840 start: 4 finalize (timeout 00:08:36) [common]
6418 11:06:15.664929 start: 4.1 power-off (timeout 00:00:30) [common]
6419 11:06:15.665065 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
6420 11:06:17.745270 >> Command sent successfully.
6421 11:06:17.748754 Returned 0 in 2 seconds
6422 11:06:17.748893 end: 4.1 power-off (duration 00:00:02) [common]
6424 11:06:17.749102 start: 4.2 read-feedback (timeout 00:08:34) [common]
6425 11:06:17.749247 Listened to connection for namespace 'common' for up to 1s
6426 11:06:18.750294 Finalising connection for namespace 'common'
6427 11:06:18.750443 Disconnecting from shell: Finalise
6428 11:06:18.750514 / #
6429 11:06:18.850742 end: 4.2 read-feedback (duration 00:00:01) [common]
6430 11:06:18.850905 end: 4 finalize (duration 00:00:03) [common]
6431 11:06:18.851075 Cleaning after the job
6432 11:06:18.851235 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786834/tftp-deploy-fkces6to/ramdisk
6433 11:06:18.854143 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786834/tftp-deploy-fkces6to/kernel
6434 11:06:18.863257 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786834/tftp-deploy-fkces6to/dtb
6435 11:06:18.863460 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786834/tftp-deploy-fkces6to/modules
6436 11:06:18.870031 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14786834
6437 11:06:18.917054 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14786834
6438 11:06:18.917230 Job finished correctly