Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 42
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 87
1 11:06:40.289029 lava-dispatcher, installed at version: 2024.05
2 11:06:40.289277 start: 0 validate
3 11:06:40.289391 Start time: 2024-07-10 11:06:40.289386+00:00 (UTC)
4 11:06:40.289518 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:06:40.289662 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 11:06:40.562510 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:06:40.563233 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 11:07:08.982291 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:07:08.982475 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 11:07:09.248890 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:07:09.249034 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
12 11:07:09.515775 validate duration: 29.23
14 11:07:09.516032 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:07:09.516129 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:07:09.516208 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:07:09.516352 Not decompressing ramdisk as can be used compressed.
18 11:07:09.516435 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 11:07:09.516494 saving as /var/lib/lava/dispatcher/tmp/14786808/tftp-deploy-08hh4jwk/ramdisk/rootfs.cpio.gz
20 11:07:09.516554 total size: 47897469 (45 MB)
21 11:07:09.782033 progress 0 % (0 MB)
22 11:07:09.794424 progress 5 % (2 MB)
23 11:07:09.806197 progress 10 % (4 MB)
24 11:07:09.817768 progress 15 % (6 MB)
25 11:07:09.829767 progress 20 % (9 MB)
26 11:07:09.841607 progress 25 % (11 MB)
27 11:07:09.853313 progress 30 % (13 MB)
28 11:07:09.865162 progress 35 % (16 MB)
29 11:07:09.877962 progress 40 % (18 MB)
30 11:07:09.889730 progress 45 % (20 MB)
31 11:07:09.901497 progress 50 % (22 MB)
32 11:07:09.913343 progress 55 % (25 MB)
33 11:07:09.925035 progress 60 % (27 MB)
34 11:07:09.936580 progress 65 % (29 MB)
35 11:07:09.948352 progress 70 % (32 MB)
36 11:07:09.960065 progress 75 % (34 MB)
37 11:07:09.971681 progress 80 % (36 MB)
38 11:07:09.983345 progress 85 % (38 MB)
39 11:07:09.995060 progress 90 % (41 MB)
40 11:07:10.006616 progress 95 % (43 MB)
41 11:07:10.018286 progress 100 % (45 MB)
42 11:07:10.018541 45 MB downloaded in 0.50 s (91.00 MB/s)
43 11:07:10.018698 end: 1.1.1 http-download (duration 00:00:01) [common]
45 11:07:10.018915 end: 1.1 download-retry (duration 00:00:01) [common]
46 11:07:10.018995 start: 1.2 download-retry (timeout 00:09:59) [common]
47 11:07:10.019072 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 11:07:10.019198 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
49 11:07:10.019258 saving as /var/lib/lava/dispatcher/tmp/14786808/tftp-deploy-08hh4jwk/kernel/Image
50 11:07:10.019311 total size: 54813184 (52 MB)
51 11:07:10.019364 No compression specified
52 11:07:10.020354 progress 0 % (0 MB)
53 11:07:10.033835 progress 5 % (2 MB)
54 11:07:10.047126 progress 10 % (5 MB)
55 11:07:10.060329 progress 15 % (7 MB)
56 11:07:10.073903 progress 20 % (10 MB)
57 11:07:10.087228 progress 25 % (13 MB)
58 11:07:10.100371 progress 30 % (15 MB)
59 11:07:10.113743 progress 35 % (18 MB)
60 11:07:10.127101 progress 40 % (20 MB)
61 11:07:10.140516 progress 45 % (23 MB)
62 11:07:10.154278 progress 50 % (26 MB)
63 11:07:10.168049 progress 55 % (28 MB)
64 11:07:10.181430 progress 60 % (31 MB)
65 11:07:10.195092 progress 65 % (34 MB)
66 11:07:10.208259 progress 70 % (36 MB)
67 11:07:10.222092 progress 75 % (39 MB)
68 11:07:10.236141 progress 80 % (41 MB)
69 11:07:10.249743 progress 85 % (44 MB)
70 11:07:10.263403 progress 90 % (47 MB)
71 11:07:10.277792 progress 95 % (49 MB)
72 11:07:10.291658 progress 100 % (52 MB)
73 11:07:10.291931 52 MB downloaded in 0.27 s (191.75 MB/s)
74 11:07:10.292108 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:07:10.292347 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:07:10.292429 start: 1.3 download-retry (timeout 00:09:59) [common]
78 11:07:10.292505 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 11:07:10.292636 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 11:07:10.292696 saving as /var/lib/lava/dispatcher/tmp/14786808/tftp-deploy-08hh4jwk/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 11:07:10.292749 total size: 57695 (0 MB)
82 11:07:10.292801 No compression specified
83 11:07:10.293884 progress 56 % (0 MB)
84 11:07:10.294142 progress 100 % (0 MB)
85 11:07:10.294337 0 MB downloaded in 0.00 s (34.70 MB/s)
86 11:07:10.294451 end: 1.3.1 http-download (duration 00:00:00) [common]
88 11:07:10.294653 end: 1.3 download-retry (duration 00:00:00) [common]
89 11:07:10.294729 start: 1.4 download-retry (timeout 00:09:59) [common]
90 11:07:10.294809 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 11:07:10.294917 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
92 11:07:10.294978 saving as /var/lib/lava/dispatcher/tmp/14786808/tftp-deploy-08hh4jwk/modules/modules.tar
93 11:07:10.295030 total size: 8607984 (8 MB)
94 11:07:10.295084 Using unxz to decompress xz
95 11:07:10.296431 progress 0 % (0 MB)
96 11:07:10.317056 progress 5 % (0 MB)
97 11:07:10.341618 progress 10 % (0 MB)
98 11:07:10.366244 progress 15 % (1 MB)
99 11:07:10.390695 progress 20 % (1 MB)
100 11:07:10.414276 progress 25 % (2 MB)
101 11:07:10.437792 progress 30 % (2 MB)
102 11:07:10.460310 progress 35 % (2 MB)
103 11:07:10.486606 progress 40 % (3 MB)
104 11:07:10.510914 progress 45 % (3 MB)
105 11:07:10.535053 progress 50 % (4 MB)
106 11:07:10.559927 progress 55 % (4 MB)
107 11:07:10.586614 progress 60 % (4 MB)
108 11:07:10.612376 progress 65 % (5 MB)
109 11:07:10.640439 progress 70 % (5 MB)
110 11:07:10.669345 progress 75 % (6 MB)
111 11:07:10.699784 progress 80 % (6 MB)
112 11:07:10.725897 progress 85 % (7 MB)
113 11:07:10.750605 progress 90 % (7 MB)
114 11:07:10.774267 progress 95 % (7 MB)
115 11:07:10.797108 progress 100 % (8 MB)
116 11:07:10.802651 8 MB downloaded in 0.51 s (16.17 MB/s)
117 11:07:10.802835 end: 1.4.1 http-download (duration 00:00:01) [common]
119 11:07:10.803048 end: 1.4 download-retry (duration 00:00:01) [common]
120 11:07:10.803129 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 11:07:10.803207 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 11:07:10.803277 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 11:07:10.803348 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 11:07:10.803512 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4
125 11:07:10.803629 makedir: /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin
126 11:07:10.803727 makedir: /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/tests
127 11:07:10.803847 makedir: /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/results
128 11:07:10.803959 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-add-keys
129 11:07:10.804110 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-add-sources
130 11:07:10.804229 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-background-process-start
131 11:07:10.804346 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-background-process-stop
132 11:07:10.804471 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-common-functions
133 11:07:10.804584 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-echo-ipv4
134 11:07:10.804696 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-install-packages
135 11:07:10.804808 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-installed-packages
136 11:07:10.804917 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-os-build
137 11:07:10.805027 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-probe-channel
138 11:07:10.805181 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-probe-ip
139 11:07:10.805292 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-target-ip
140 11:07:10.805428 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-target-mac
141 11:07:10.805538 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-target-storage
142 11:07:10.805650 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-test-case
143 11:07:10.805762 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-test-event
144 11:07:10.805871 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-test-feedback
145 11:07:10.805981 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-test-raise
146 11:07:10.806097 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-test-reference
147 11:07:10.806206 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-test-runner
148 11:07:10.806316 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-test-set
149 11:07:10.806424 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-test-shell
150 11:07:10.806537 Updating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-install-packages (oe)
151 11:07:10.806674 Updating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/bin/lava-installed-packages (oe)
152 11:07:10.806782 Creating /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/environment
153 11:07:10.806871 LAVA metadata
154 11:07:10.806934 - LAVA_JOB_ID=14786808
155 11:07:10.806989 - LAVA_DISPATCHER_IP=192.168.201.1
156 11:07:10.807079 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 11:07:10.807135 skipped lava-vland-overlay
158 11:07:10.807207 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 11:07:10.807296 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 11:07:10.807380 skipped lava-multinode-overlay
161 11:07:10.807481 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 11:07:10.807567 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 11:07:10.807630 Loading test definitions
164 11:07:10.807758 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 11:07:10.807827 Using /lava-14786808 at stage 0
166 11:07:10.808182 uuid=14786808_1.5.2.3.1 testdef=None
167 11:07:10.808265 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 11:07:10.808341 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 11:07:10.808773 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 11:07:10.808968 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 11:07:10.809578 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 11:07:10.809785 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 11:07:10.810373 runner path: /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/0/tests/0_igt-gpu-panfrost test_uuid 14786808_1.5.2.3.1
176 11:07:10.810515 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 11:07:10.810704 Creating lava-test-runner.conf files
179 11:07:10.810760 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14786808/lava-overlay-t7pnmak4/lava-14786808/0 for stage 0
180 11:07:10.810840 - 0_igt-gpu-panfrost
181 11:07:10.810928 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 11:07:10.811003 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 11:07:10.817787 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 11:07:10.817924 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 11:07:10.818009 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 11:07:10.818087 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 11:07:10.818164 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 11:07:12.410843 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:02) [common]
189 11:07:12.410991 start: 1.5.4 extract-modules (timeout 00:09:57) [common]
190 11:07:12.411063 extracting modules file /var/lib/lava/dispatcher/tmp/14786808/tftp-deploy-08hh4jwk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14786808/extract-overlay-ramdisk-slr1riou/ramdisk
191 11:07:12.647896 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 11:07:12.648072 start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
193 11:07:12.648179 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14786808/compress-overlay-gaxnimb0/overlay-1.5.2.4.tar.gz to ramdisk
194 11:07:12.648266 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14786808/compress-overlay-gaxnimb0/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14786808/extract-overlay-ramdisk-slr1riou/ramdisk
195 11:07:12.654932 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 11:07:12.655040 start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
197 11:07:12.655123 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 11:07:12.655201 start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
199 11:07:12.655266 Building ramdisk /var/lib/lava/dispatcher/tmp/14786808/extract-overlay-ramdisk-slr1riou/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14786808/extract-overlay-ramdisk-slr1riou/ramdisk
200 11:07:13.627273 >> 465428 blocks
201 11:07:19.984392 rename /var/lib/lava/dispatcher/tmp/14786808/extract-overlay-ramdisk-slr1riou/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14786808/tftp-deploy-08hh4jwk/ramdisk/ramdisk.cpio.gz
202 11:07:19.984573 end: 1.5.7 compress-ramdisk (duration 00:00:07) [common]
203 11:07:19.984672 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
204 11:07:19.984788 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
205 11:07:19.984901 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14786808/tftp-deploy-08hh4jwk/kernel/Image']
206 11:07:33.600633 Returned 0 in 13 seconds
207 11:07:33.600788 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14786808/tftp-deploy-08hh4jwk/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14786808/tftp-deploy-08hh4jwk/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14786808/tftp-deploy-08hh4jwk/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14786808/tftp-deploy-08hh4jwk/kernel/image.itb
208 11:07:34.402233 output: FIT description: Kernel Image image with one or more FDT blobs
209 11:07:34.402347 output: Created: Wed Jul 10 12:07:34 2024
210 11:07:34.402406 output: Image 0 (kernel-1)
211 11:07:34.402459 output: Description:
212 11:07:34.402509 output: Created: Wed Jul 10 12:07:34 2024
213 11:07:34.402559 output: Type: Kernel Image
214 11:07:34.402607 output: Compression: lzma compressed
215 11:07:34.402658 output: Data Size: 13116259 Bytes = 12808.85 KiB = 12.51 MiB
216 11:07:34.402706 output: Architecture: AArch64
217 11:07:34.402754 output: OS: Linux
218 11:07:34.402801 output: Load Address: 0x00000000
219 11:07:34.402848 output: Entry Point: 0x00000000
220 11:07:34.402895 output: Hash algo: crc32
221 11:07:34.402941 output: Hash value: 9bb85fb9
222 11:07:34.402988 output: Image 1 (fdt-1)
223 11:07:34.403035 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 11:07:34.403083 output: Created: Wed Jul 10 12:07:34 2024
225 11:07:34.403129 output: Type: Flat Device Tree
226 11:07:34.403175 output: Compression: uncompressed
227 11:07:34.403221 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 11:07:34.403268 output: Architecture: AArch64
229 11:07:34.403314 output: Hash algo: crc32
230 11:07:34.403361 output: Hash value: a9713552
231 11:07:34.403414 output: Image 2 (ramdisk-1)
232 11:07:34.403461 output: Description: unavailable
233 11:07:34.403512 output: Created: Wed Jul 10 12:07:34 2024
234 11:07:34.403600 output: Type: RAMDisk Image
235 11:07:34.403691 output: Compression: uncompressed
236 11:07:34.403774 output: Data Size: 60992357 Bytes = 59562.85 KiB = 58.17 MiB
237 11:07:34.403826 output: Architecture: AArch64
238 11:07:34.403874 output: OS: Linux
239 11:07:34.403920 output: Load Address: unavailable
240 11:07:34.403966 output: Entry Point: unavailable
241 11:07:34.404012 output: Hash algo: crc32
242 11:07:34.404059 output: Hash value: e717fc63
243 11:07:34.404104 output: Default Configuration: 'conf-1'
244 11:07:34.404151 output: Configuration 0 (conf-1)
245 11:07:34.404198 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 11:07:34.404244 output: Kernel: kernel-1
247 11:07:34.404290 output: Init Ramdisk: ramdisk-1
248 11:07:34.404337 output: FDT: fdt-1
249 11:07:34.404383 output: Loadables: kernel-1
250 11:07:34.404429 output:
251 11:07:34.404528 end: 1.5.8.1 prepare-fit (duration 00:00:14) [common]
252 11:07:34.404599 end: 1.5.8 prepare-kernel (duration 00:00:14) [common]
253 11:07:34.404672 end: 1.5 prepare-tftp-overlay (duration 00:00:24) [common]
254 11:07:34.404744 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
255 11:07:34.404800 No LXC device requested
256 11:07:34.404867 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 11:07:34.404936 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
258 11:07:34.405003 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 11:07:34.405056 Checking files for TFTP limit of 4294967296 bytes.
260 11:07:34.405424 end: 1 tftp-deploy (duration 00:00:25) [common]
261 11:07:34.405510 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 11:07:34.405585 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 11:07:34.405687 substitutions:
264 11:07:34.405771 - {DTB}: 14786808/tftp-deploy-08hh4jwk/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 11:07:34.405852 - {INITRD}: 14786808/tftp-deploy-08hh4jwk/ramdisk/ramdisk.cpio.gz
266 11:07:34.405934 - {KERNEL}: 14786808/tftp-deploy-08hh4jwk/kernel/Image
267 11:07:34.405989 - {LAVA_MAC}: None
268 11:07:34.406039 - {PRESEED_CONFIG}: None
269 11:07:34.406087 - {PRESEED_LOCAL}: None
270 11:07:34.406135 - {RAMDISK}: 14786808/tftp-deploy-08hh4jwk/ramdisk/ramdisk.cpio.gz
271 11:07:34.406187 - {ROOT_PART}: None
272 11:07:34.406235 - {ROOT}: None
273 11:07:34.406283 - {SERVER_IP}: 192.168.201.1
274 11:07:34.406331 - {TEE}: None
275 11:07:34.406378 Parsed boot commands:
276 11:07:34.406424 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 11:07:34.406565 Parsed boot commands: tftpboot 192.168.201.1 14786808/tftp-deploy-08hh4jwk/kernel/image.itb 14786808/tftp-deploy-08hh4jwk/kernel/cmdline
278 11:07:34.406642 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 11:07:34.406715 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 11:07:34.406785 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 11:07:34.406853 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 11:07:34.406905 Not connected, no need to disconnect.
283 11:07:34.406969 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 11:07:34.407035 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 11:07:34.407088 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-1'
286 11:07:34.410005 Setting prompt string to ['lava-test: # ']
287 11:07:34.410325 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 11:07:34.410428 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 11:07:34.410517 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 11:07:34.410602 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 11:07:34.410869 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-1', '--port=1', '--command=reboot']
292 11:07:43.619369 >> Command sent successfully.
293 11:07:43.633991 Returned 0 in 9 seconds
294 11:07:43.634609 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
296 11:07:43.635651 end: 2.2.2 reset-device (duration 00:00:09) [common]
297 11:07:43.636091 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
298 11:07:43.636452 Setting prompt string to 'Starting depthcharge on Juniper...'
299 11:07:43.636718 Changing prompt to 'Starting depthcharge on Juniper...'
300 11:07:43.636999 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
301 11:07:43.638603 [Enter `^Ec?' for help]
302 11:07:50.170583 [DL] 00000000 00000000 010701
303 11:07:50.176017
304 11:07:50.176465
305 11:07:50.176768 F0: 102B 0000
306 11:07:50.177071
307 11:07:50.177384 F3: 1006 0033 [0200]
308 11:07:50.177656
309 11:07:50.178940 F3: 4001 00E0 [0200]
310 11:07:50.179340
311 11:07:50.179652 F3: 0000 0000
312 11:07:50.179930
313 11:07:50.182535 V0: 0000 0000 [0001]
314 11:07:50.182980
315 11:07:50.183282 00: 1027 0002
316 11:07:50.183568
317 11:07:50.186143 01: 0000 0000
318 11:07:50.186596
319 11:07:50.186899 BP: 0C00 0251 [0000]
320 11:07:50.187177
321 11:07:50.189457 G0: 1182 0000
322 11:07:50.189845
323 11:07:50.190142 EC: 0004 0000 [0001]
324 11:07:50.190418
325 11:07:50.192820 S7: 0000 0000 [0000]
326 11:07:50.193231
327 11:07:50.193533 CC: 0000 0000 [0001]
328 11:07:50.196042
329 11:07:50.196519 T0: 0000 00DB [000F]
330 11:07:50.196961
331 11:07:50.197314 Jump to BL
332 11:07:50.197587
333 11:07:50.231953
334 11:07:50.232433
335 11:07:50.238236 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
336 11:07:50.244952 ARM64: Exception handlers installed.
337 11:07:50.245671 ARM64: Testing exception
338 11:07:50.248093 ARM64: Done test exception
339 11:07:50.252472 WDT: Last reset was cold boot
340 11:07:50.252862 SPI0(PAD0) initialized at 992727 Hz
341 11:07:50.259655 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
342 11:07:50.260085 Manufacturer: ef
343 11:07:50.266061 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
344 11:07:50.278248 Probing TPM: . done!
345 11:07:50.278718 TPM ready after 0 ms
346 11:07:50.285356 Connected to device vid:did:rid of 1ae0:0028:00
347 11:07:50.291670 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
348 11:07:50.295299 Initialized TPM device CR50 revision 0
349 11:07:50.338144 tlcl_send_startup: Startup return code is 0
350 11:07:50.338693 TPM: setup succeeded
351 11:07:50.347148 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
352 11:07:50.351290 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
353 11:07:50.353956 in-header: 03 19 00 00 08 00 00 00
354 11:07:50.357201 in-data: a2 e0 47 00 13 00 00 00
355 11:07:50.360476 Chrome EC: UHEPI supported
356 11:07:50.367119 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
357 11:07:50.370637 in-header: 03 a1 00 00 08 00 00 00
358 11:07:50.374516 in-data: 84 60 60 10 00 00 00 00
359 11:07:50.375002 Phase 1
360 11:07:50.377415 FMAP: area GBB found @ 3f5000 (12032 bytes)
361 11:07:50.384246 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
362 11:07:50.390955 VB2:vb2_check_recovery() Recovery was requested manually
363 11:07:50.394360 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
364 11:07:50.400361 Recovery requested (1009000e)
365 11:07:50.406186 tlcl_extend: response is 0
366 11:07:50.415002 tlcl_extend: response is 0
367 11:07:50.439210
368 11:07:50.439635
369 11:07:50.445783 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
370 11:07:50.449030 ARM64: Exception handlers installed.
371 11:07:50.452101 ARM64: Testing exception
372 11:07:50.455290 ARM64: Done test exception
373 11:07:50.471288 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x826a, sec=0x201b
374 11:07:50.477902 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
375 11:07:50.480999 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
376 11:07:50.489735 [RTC]rtc_get_frequency_meter,134: input=0xf, output=876
377 11:07:50.496959 [RTC]rtc_get_frequency_meter,134: input=0x7, output=743
378 11:07:50.503823 [RTC]rtc_get_frequency_meter,134: input=0xb, output=811
379 11:07:50.510418 [RTC]rtc_get_frequency_meter,134: input=0x9, output=776
380 11:07:50.517154 [RTC]rtc_get_frequency_meter,134: input=0xa, output=793
381 11:07:50.520340 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x826a
382 11:07:50.527293 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
383 11:07:50.530965 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
384 11:07:50.533600 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
385 11:07:50.536987 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
386 11:07:50.541009 in-header: 03 19 00 00 08 00 00 00
387 11:07:50.544348 in-data: a2 e0 47 00 13 00 00 00
388 11:07:50.547279 Chrome EC: UHEPI supported
389 11:07:50.553744 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
390 11:07:50.557606 in-header: 03 a1 00 00 08 00 00 00
391 11:07:50.561086 in-data: 84 60 60 10 00 00 00 00
392 11:07:50.564371 Skip loading cached calibration data
393 11:07:50.570977 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
394 11:07:50.574131 in-header: 03 a1 00 00 08 00 00 00
395 11:07:50.577572 in-data: 84 60 60 10 00 00 00 00
396 11:07:50.584162 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
397 11:07:50.587530 in-header: 03 a1 00 00 08 00 00 00
398 11:07:50.591234 in-data: 84 60 60 10 00 00 00 00
399 11:07:50.594094 ADC[3]: Raw value=216781 ID=1
400 11:07:50.594486 Manufacturer: ef
401 11:07:50.600604 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
402 11:07:50.604440 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
403 11:07:50.607484 CBFS @ 21000 size 3d4000
404 11:07:50.610685 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
405 11:07:50.617768 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
406 11:07:50.620746 CBFS: Found @ offset 3c700 size 44
407 11:07:50.621185 DRAM-K: Full Calibration
408 11:07:50.627923 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
409 11:07:50.628480 CBFS @ 21000 size 3d4000
410 11:07:50.634395 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
411 11:07:50.637676 CBFS: Locating 'fallback/dram'
412 11:07:50.640540 CBFS: Found @ offset 24b00 size 12268
413 11:07:50.668183 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
414 11:07:50.671760 ddr_geometry: 1, config: 0x0
415 11:07:50.674933 header.status = 0x0
416 11:07:50.678252 header.magic = 0x44524d4b (expected: 0x44524d4b)
417 11:07:50.681764 header.version = 0x5 (expected: 0x5)
418 11:07:50.685470 header.size = 0x8f0 (expected: 0x8f0)
419 11:07:50.685959 header.config = 0x0
420 11:07:50.688385 header.flags = 0x0
421 11:07:50.692095 header.checksum = 0x0
422 11:07:50.695252 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
423 11:07:50.701820 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
424 11:07:50.705043 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
425 11:07:50.708640 ddr_geometry:1
426 11:07:50.709031 [EMI] new MDL number = 1
427 11:07:50.712361 dram_cbt_mode_extern: 0
428 11:07:50.715001 dram_cbt_mode [RK0]: 0, [RK1]: 0
429 11:07:50.721749 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
430 11:07:50.722145
431 11:07:50.722533
432 11:07:50.724785 [Bianco] ETT version 0.0.0.1
433 11:07:50.728110 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
434 11:07:50.728602
435 11:07:50.731734 vSetVcoreByFreq with vcore:762500, freq=1600
436 11:07:50.732126
437 11:07:50.734667 [DramcInit]
438 11:07:50.735062 AutoRefreshCKEOff AutoREF OFF
439 11:07:50.737975 DDRPhyPLLSetting-CKEOFF
440 11:07:50.742096 DDRPhyPLLSetting-CKEON
441 11:07:50.742500
442 11:07:50.742882 Enable WDQS
443 11:07:50.745514 [ModeRegInit_LP4] CH0 RK0
444 11:07:50.748648 Write Rank0 MR13 =0x18
445 11:07:50.749041 Write Rank0 MR12 =0x5d
446 11:07:50.752010 Write Rank0 MR1 =0x56
447 11:07:50.755861 Write Rank0 MR2 =0x1a
448 11:07:50.756304 Write Rank0 MR11 =0x0
449 11:07:50.759096 Write Rank0 MR22 =0x38
450 11:07:50.759490 Write Rank0 MR14 =0x5d
451 11:07:50.762333 Write Rank0 MR3 =0x30
452 11:07:50.765657 Write Rank0 MR13 =0x58
453 11:07:50.766040 Write Rank0 MR12 =0x5d
454 11:07:50.768787 Write Rank0 MR1 =0x56
455 11:07:50.769216 Write Rank0 MR2 =0x2d
456 11:07:50.772482 Write Rank0 MR11 =0x23
457 11:07:50.776256 Write Rank0 MR22 =0x34
458 11:07:50.776650 Write Rank0 MR14 =0x10
459 11:07:50.779038 Write Rank0 MR3 =0x30
460 11:07:50.782699 Write Rank0 MR13 =0xd8
461 11:07:50.783088 [ModeRegInit_LP4] CH0 RK1
462 11:07:50.786545 Write Rank1 MR13 =0x18
463 11:07:50.786931 Write Rank1 MR12 =0x5d
464 11:07:50.789310 Write Rank1 MR1 =0x56
465 11:07:50.792078 Write Rank1 MR2 =0x1a
466 11:07:50.792478 Write Rank1 MR11 =0x0
467 11:07:50.795399 Write Rank1 MR22 =0x38
468 11:07:50.795817 Write Rank1 MR14 =0x5d
469 11:07:50.799315 Write Rank1 MR3 =0x30
470 11:07:50.802079 Write Rank1 MR13 =0x58
471 11:07:50.802551 Write Rank1 MR12 =0x5d
472 11:07:50.805812 Write Rank1 MR1 =0x56
473 11:07:50.806243 Write Rank1 MR2 =0x2d
474 11:07:50.809138 Write Rank1 MR11 =0x23
475 11:07:50.812405 Write Rank1 MR22 =0x34
476 11:07:50.812791 Write Rank1 MR14 =0x10
477 11:07:50.815712 Write Rank1 MR3 =0x30
478 11:07:50.819046 Write Rank1 MR13 =0xd8
479 11:07:50.819526 [ModeRegInit_LP4] CH1 RK0
480 11:07:50.822498 Write Rank0 MR13 =0x18
481 11:07:50.825914 Write Rank0 MR12 =0x5d
482 11:07:50.826303 Write Rank0 MR1 =0x56
483 11:07:50.829352 Write Rank0 MR2 =0x1a
484 11:07:50.829731 Write Rank0 MR11 =0x0
485 11:07:50.832753 Write Rank0 MR22 =0x38
486 11:07:50.835619 Write Rank0 MR14 =0x5d
487 11:07:50.836005 Write Rank0 MR3 =0x30
488 11:07:50.839023 Write Rank0 MR13 =0x58
489 11:07:50.839511 Write Rank0 MR12 =0x5d
490 11:07:50.842513 Write Rank0 MR1 =0x56
491 11:07:50.845469 Write Rank0 MR2 =0x2d
492 11:07:50.845960 Write Rank0 MR11 =0x23
493 11:07:50.849104 Write Rank0 MR22 =0x34
494 11:07:50.849531 Write Rank0 MR14 =0x10
495 11:07:50.852354 Write Rank0 MR3 =0x30
496 11:07:50.856244 Write Rank0 MR13 =0xd8
497 11:07:50.856686 [ModeRegInit_LP4] CH1 RK1
498 11:07:50.859262 Write Rank1 MR13 =0x18
499 11:07:50.862255 Write Rank1 MR12 =0x5d
500 11:07:50.862648 Write Rank1 MR1 =0x56
501 11:07:50.866058 Write Rank1 MR2 =0x1a
502 11:07:50.866496 Write Rank1 MR11 =0x0
503 11:07:50.869076 Write Rank1 MR22 =0x38
504 11:07:50.872288 Write Rank1 MR14 =0x5d
505 11:07:50.872678 Write Rank1 MR3 =0x30
506 11:07:50.875620 Write Rank1 MR13 =0x58
507 11:07:50.876006 Write Rank1 MR12 =0x5d
508 11:07:50.879651 Write Rank1 MR1 =0x56
509 11:07:50.882723 Write Rank1 MR2 =0x2d
510 11:07:50.883196 Write Rank1 MR11 =0x23
511 11:07:50.885622 Write Rank1 MR22 =0x34
512 11:07:50.886012 Write Rank1 MR14 =0x10
513 11:07:50.890132 Write Rank1 MR3 =0x30
514 11:07:50.892698 Write Rank1 MR13 =0xd8
515 11:07:50.893206 match AC timing 3
516 11:07:50.902572 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
517 11:07:50.903020 [MiockJmeterHQA]
518 11:07:50.909256 vSetVcoreByFreq with vcore:762500, freq=1600
519 11:07:50.999292
520 11:07:50.999766 MIOCK jitter meter ch=0
521 11:07:51.000101
522 11:07:51.002858 1T = (88-13) = 75 dly cells
523 11:07:51.010128 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 833/100 ps
524 11:07:51.012582 vSetVcoreByFreq with vcore:725000, freq=1200
525 11:07:51.098673
526 11:07:51.099106 MIOCK jitter meter ch=0
527 11:07:51.099413
528 11:07:51.102501 1T = (83-13) = 70 dly cells
529 11:07:51.108599 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 892/100 ps
530 11:07:51.111907 vSetVcoreByFreq with vcore:725000, freq=800
531 11:07:51.198187
532 11:07:51.198620 MIOCK jitter meter ch=0
533 11:07:51.198919
534 11:07:51.200988 1T = (83-13) = 70 dly cells
535 11:07:51.208290 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 892/100 ps
536 11:07:51.211340 vSetVcoreByFreq with vcore:762500, freq=1600
537 11:07:51.215071 vSetVcoreByFreq with vcore:762500, freq=1600
538 11:07:51.215456
539 11:07:51.215754 K DRVP
540 11:07:51.217860 1. OCD DRVP=0 CALOUT=0
541 11:07:51.221634 1. OCD DRVP=1 CALOUT=0
542 11:07:51.222085 1. OCD DRVP=2 CALOUT=0
543 11:07:51.224541 1. OCD DRVP=3 CALOUT=0
544 11:07:51.224932 1. OCD DRVP=4 CALOUT=0
545 11:07:51.228708 1. OCD DRVP=5 CALOUT=0
546 11:07:51.231192 1. OCD DRVP=6 CALOUT=0
547 11:07:51.231586 1. OCD DRVP=7 CALOUT=0
548 11:07:51.234337 1. OCD DRVP=8 CALOUT=0
549 11:07:51.238150 1. OCD DRVP=9 CALOUT=1
550 11:07:51.238592
551 11:07:51.241099 1. OCD DRVP calibration OK! DRVP=9
552 11:07:51.241524
553 11:07:51.241821
554 11:07:51.242098
555 11:07:51.242360 K ODTN
556 11:07:51.244488 3. OCD ODTN=0 ,CALOUT=1
557 11:07:51.244879 3. OCD ODTN=1 ,CALOUT=1
558 11:07:51.247926 3. OCD ODTN=2 ,CALOUT=1
559 11:07:51.248316 3. OCD ODTN=3 ,CALOUT=1
560 11:07:51.251540 3. OCD ODTN=4 ,CALOUT=1
561 11:07:51.255069 3. OCD ODTN=5 ,CALOUT=1
562 11:07:51.255552 3. OCD ODTN=6 ,CALOUT=1
563 11:07:51.258125 3. OCD ODTN=7 ,CALOUT=1
564 11:07:51.261190 3. OCD ODTN=8 ,CALOUT=0
565 11:07:51.261583
566 11:07:51.265027 3. OCD ODTN calibration OK! ODTN=8
567 11:07:51.265520
568 11:07:51.267993 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=8
569 11:07:51.271550 term_option=0, Reg: DRVP=9, DRVN=8, ODTN=15
570 11:07:51.274351 term_option=0, Reg: DRVP=9, DRVN=8, ODTN=15 (After Adjust)
571 11:07:51.280880
572 11:07:51.281325 K DRVP
573 11:07:51.281629 1. OCD DRVP=0 CALOUT=0
574 11:07:51.282194 1. OCD DRVP=1 CALOUT=0
575 11:07:51.284578 1. OCD DRVP=2 CALOUT=0
576 11:07:51.284747 1. OCD DRVP=3 CALOUT=0
577 11:07:51.287839 1. OCD DRVP=4 CALOUT=0
578 11:07:51.291663 1. OCD DRVP=5 CALOUT=0
579 11:07:51.292137 1. OCD DRVP=6 CALOUT=0
580 11:07:51.294682 1. OCD DRVP=7 CALOUT=0
581 11:07:51.295077 1. OCD DRVP=8 CALOUT=0
582 11:07:51.297808 1. OCD DRVP=9 CALOUT=0
583 11:07:51.301229 1. OCD DRVP=10 CALOUT=1
584 11:07:51.301620
585 11:07:51.304707 1. OCD DRVP calibration OK! DRVP=10
586 11:07:51.305098
587 11:07:51.305432
588 11:07:51.305702
589 11:07:51.305964 K ODTN
590 11:07:51.307980 3. OCD ODTN=0 ,CALOUT=1
591 11:07:51.308370 3. OCD ODTN=1 ,CALOUT=1
592 11:07:51.311398 3. OCD ODTN=2 ,CALOUT=1
593 11:07:51.314620 3. OCD ODTN=3 ,CALOUT=1
594 11:07:51.315014 3. OCD ODTN=4 ,CALOUT=1
595 11:07:51.318001 3. OCD ODTN=5 ,CALOUT=1
596 11:07:51.321572 3. OCD ODTN=6 ,CALOUT=1
597 11:07:51.322016 3. OCD ODTN=7 ,CALOUT=1
598 11:07:51.324843 3. OCD ODTN=8 ,CALOUT=1
599 11:07:51.325400 3. OCD ODTN=9 ,CALOUT=1
600 11:07:51.328409 3. OCD ODTN=10 ,CALOUT=1
601 11:07:51.331391 3. OCD ODTN=11 ,CALOUT=1
602 11:07:51.331878 3. OCD ODTN=12 ,CALOUT=1
603 11:07:51.334875 3. OCD ODTN=13 ,CALOUT=1
604 11:07:51.337988 3. OCD ODTN=14 ,CALOUT=1
605 11:07:51.342214 3. OCD ODTN=15 ,CALOUT=0
606 11:07:51.342655
607 11:07:51.344521 3. OCD ODTN calibration OK! ODTN=15
608 11:07:51.344910
609 11:07:51.348195 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
610 11:07:51.351501 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
611 11:07:51.354816 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
612 11:07:51.355278
613 11:07:51.358054 [DramcInit]
614 11:07:51.361724 AutoRefreshCKEOff AutoREF OFF
615 11:07:51.362111 DDRPhyPLLSetting-CKEOFF
616 11:07:51.364742 DDRPhyPLLSetting-CKEON
617 11:07:51.365213
618 11:07:51.365743 Enable WDQS
619 11:07:51.366086 ==
620 11:07:51.371735 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
621 11:07:51.375305 fsp= 1, odt_onoff= 1, Byte mode= 0
622 11:07:51.375701 ==
623 11:07:51.378510 [Duty_Offset_Calibration]
624 11:07:51.378899
625 11:07:51.379286 ===========================
626 11:07:51.381574 B0:0 B1:0 CA:2
627 11:07:51.401812 ==
628 11:07:51.405180 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
629 11:07:51.408159 fsp= 1, odt_onoff= 1, Byte mode= 0
630 11:07:51.408624 ==
631 11:07:51.411506 [Duty_Offset_Calibration]
632 11:07:51.411970
633 11:07:51.414923 ===========================
634 11:07:51.415362 B0:0 B1:1 CA:1
635 11:07:51.447970 [ModeRegInit_LP4] CH0 RK0
636 11:07:51.451341 Write Rank0 MR13 =0x18
637 11:07:51.451733 Write Rank0 MR12 =0x5d
638 11:07:51.454758 Write Rank0 MR1 =0x56
639 11:07:51.458100 Write Rank0 MR2 =0x1a
640 11:07:51.458512 Write Rank0 MR11 =0x0
641 11:07:51.461544 Write Rank0 MR22 =0x38
642 11:07:51.461932 Write Rank0 MR14 =0x5d
643 11:07:51.464963 Write Rank0 MR3 =0x30
644 11:07:51.469209 Write Rank0 MR13 =0x58
645 11:07:51.469663 Write Rank0 MR12 =0x5d
646 11:07:51.472323 Write Rank0 MR1 =0x56
647 11:07:51.472707 Write Rank0 MR2 =0x2d
648 11:07:51.475621 Write Rank0 MR11 =0x23
649 11:07:51.478249 Write Rank0 MR22 =0x34
650 11:07:51.478632 Write Rank0 MR14 =0x10
651 11:07:51.481570 Write Rank0 MR3 =0x30
652 11:07:51.484669 Write Rank0 MR13 =0xd8
653 11:07:51.485056 [ModeRegInit_LP4] CH0 RK1
654 11:07:51.488086 Write Rank1 MR13 =0x18
655 11:07:51.488538 Write Rank1 MR12 =0x5d
656 11:07:51.491271 Write Rank1 MR1 =0x56
657 11:07:51.494662 Write Rank1 MR2 =0x1a
658 11:07:51.495047 Write Rank1 MR11 =0x0
659 11:07:51.498131 Write Rank1 MR22 =0x38
660 11:07:51.498515 Write Rank1 MR14 =0x5d
661 11:07:51.501847 Write Rank1 MR3 =0x30
662 11:07:51.505259 Write Rank1 MR13 =0x58
663 11:07:51.505730 Write Rank1 MR12 =0x5d
664 11:07:51.508554 Write Rank1 MR1 =0x56
665 11:07:51.511422 Write Rank1 MR2 =0x2d
666 11:07:51.511813 Write Rank1 MR11 =0x23
667 11:07:51.515081 Write Rank1 MR22 =0x34
668 11:07:51.515474 Write Rank1 MR14 =0x10
669 11:07:51.517943 Write Rank1 MR3 =0x30
670 11:07:51.521793 Write Rank1 MR13 =0xd8
671 11:07:51.522271 [ModeRegInit_LP4] CH1 RK0
672 11:07:51.524563 Write Rank0 MR13 =0x18
673 11:07:51.528077 Write Rank0 MR12 =0x5d
674 11:07:51.528535 Write Rank0 MR1 =0x56
675 11:07:51.532056 Write Rank0 MR2 =0x1a
676 11:07:51.532530 Write Rank0 MR11 =0x0
677 11:07:51.534606 Write Rank0 MR22 =0x38
678 11:07:51.537975 Write Rank0 MR14 =0x5d
679 11:07:51.538365 Write Rank0 MR3 =0x30
680 11:07:51.541468 Write Rank0 MR13 =0x58
681 11:07:51.541861 Write Rank0 MR12 =0x5d
682 11:07:51.545189 Write Rank0 MR1 =0x56
683 11:07:51.548075 Write Rank0 MR2 =0x2d
684 11:07:51.548534 Write Rank0 MR11 =0x23
685 11:07:51.551564 Write Rank0 MR22 =0x34
686 11:07:51.551958 Write Rank0 MR14 =0x10
687 11:07:51.554715 Write Rank0 MR3 =0x30
688 11:07:51.557781 Write Rank0 MR13 =0xd8
689 11:07:51.558171 [ModeRegInit_LP4] CH1 RK1
690 11:07:51.561374 Write Rank1 MR13 =0x18
691 11:07:51.564671 Write Rank1 MR12 =0x5d
692 11:07:51.565111 Write Rank1 MR1 =0x56
693 11:07:51.568060 Write Rank1 MR2 =0x1a
694 11:07:51.568450 Write Rank1 MR11 =0x0
695 11:07:51.571354 Write Rank1 MR22 =0x38
696 11:07:51.577069 Write Rank1 MR14 =0x5d
697 11:07:51.577504 Write Rank1 MR3 =0x30
698 11:07:51.578243 Write Rank1 MR13 =0x58
699 11:07:51.578578 Write Rank1 MR12 =0x5d
700 11:07:51.581488 Write Rank1 MR1 =0x56
701 11:07:51.585020 Write Rank1 MR2 =0x2d
702 11:07:51.585525 Write Rank1 MR11 =0x23
703 11:07:51.588577 Write Rank1 MR22 =0x34
704 11:07:51.589027 Write Rank1 MR14 =0x10
705 11:07:51.591399 Write Rank1 MR3 =0x30
706 11:07:51.594836 Write Rank1 MR13 =0xd8
707 11:07:51.595224 match AC timing 3
708 11:07:51.604842 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
709 11:07:51.608861 DramC Write-DBI off
710 11:07:51.609345 DramC Read-DBI off
711 11:07:51.611568 Write Rank0 MR13 =0x59
712 11:07:51.611964 ==
713 11:07:51.615003 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
714 11:07:51.618273 fsp= 1, odt_onoff= 1, Byte mode= 0
715 11:07:51.618660 ==
716 11:07:51.621553 === u2Vref_new: 0x56 --> 0x2d
717 11:07:51.625198 === u2Vref_new: 0x58 --> 0x38
718 11:07:51.628312 === u2Vref_new: 0x5a --> 0x39
719 11:07:51.631655 === u2Vref_new: 0x5c --> 0x3c
720 11:07:51.635176 === u2Vref_new: 0x5e --> 0x3d
721 11:07:51.638537 === u2Vref_new: 0x60 --> 0xa0
722 11:07:51.642069 [CA 0] Center 34 (6~63) winsize 58
723 11:07:51.644878 [CA 1] Center 36 (9~63) winsize 55
724 11:07:51.648077 [CA 2] Center 30 (2~59) winsize 58
725 11:07:51.652175 [CA 3] Center 26 (-2~54) winsize 57
726 11:07:51.655256 [CA 4] Center 26 (-2~54) winsize 57
727 11:07:51.655642 [CA 5] Center 31 (1~61) winsize 61
728 11:07:51.659351
729 11:07:51.661924 [CATrainingPosCal] consider 1 rank data
730 11:07:51.662311 u2DelayCellTimex100 = 833/100 ps
731 11:07:51.668621 CA0 delay=34 (6~63),Diff = 8 PI (9 cell)
732 11:07:51.671674 CA1 delay=36 (9~63),Diff = 10 PI (11 cell)
733 11:07:51.674845 CA2 delay=30 (2~59),Diff = 4 PI (4 cell)
734 11:07:51.678470 CA3 delay=26 (-2~54),Diff = 0 PI (0 cell)
735 11:07:51.682034 CA4 delay=26 (-2~54),Diff = 0 PI (0 cell)
736 11:07:51.684881 CA5 delay=31 (1~61),Diff = 5 PI (5 cell)
737 11:07:51.685301
738 11:07:51.688472 CA PerBit enable=1, Macro0, CA PI delay=26
739 11:07:51.692145 === u2Vref_new: 0x60 --> 0xa0
740 11:07:51.692533
741 11:07:51.695050 Vref(ca) range 1: 32
742 11:07:51.695434
743 11:07:51.695735 CS Dly= 10 (41-0-32)
744 11:07:51.698085 Write Rank0 MR13 =0xd8
745 11:07:51.701518 Write Rank0 MR13 =0xd8
746 11:07:51.701902 Write Rank0 MR12 =0x60
747 11:07:51.705178 Write Rank1 MR13 =0x59
748 11:07:51.705568 ==
749 11:07:51.708670 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
750 11:07:51.712066 fsp= 1, odt_onoff= 1, Byte mode= 0
751 11:07:51.712722 ==
752 11:07:51.715695 === u2Vref_new: 0x56 --> 0x2d
753 11:07:51.718342 === u2Vref_new: 0x58 --> 0x38
754 11:07:51.721938 === u2Vref_new: 0x5a --> 0x39
755 11:07:51.724745 === u2Vref_new: 0x5c --> 0x3c
756 11:07:51.728230 === u2Vref_new: 0x5e --> 0x3d
757 11:07:51.731581 === u2Vref_new: 0x60 --> 0xa0
758 11:07:51.734971 [CA 0] Center 36 (10~63) winsize 54
759 11:07:51.738148 [CA 1] Center 36 (10~63) winsize 54
760 11:07:51.741397 [CA 2] Center 31 (2~60) winsize 59
761 11:07:51.745104 [CA 3] Center 26 (-2~54) winsize 57
762 11:07:51.748431 [CA 4] Center 25 (-3~53) winsize 57
763 11:07:51.752100 [CA 5] Center 30 (1~60) winsize 60
764 11:07:51.752198
765 11:07:51.754942 [CATrainingPosCal] consider 2 rank data
766 11:07:51.758283 u2DelayCellTimex100 = 833/100 ps
767 11:07:51.762093 CA0 delay=36 (10~63),Diff = 11 PI (12 cell)
768 11:07:51.765019 CA1 delay=36 (10~63),Diff = 11 PI (12 cell)
769 11:07:51.768560 CA2 delay=30 (2~59),Diff = 5 PI (5 cell)
770 11:07:51.772033 CA3 delay=26 (-2~54),Diff = 1 PI (1 cell)
771 11:07:51.775046 CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)
772 11:07:51.778103 CA5 delay=30 (1~60),Diff = 5 PI (5 cell)
773 11:07:51.778183
774 11:07:51.784781 CA PerBit enable=1, Macro0, CA PI delay=25
775 11:07:51.784865 === u2Vref_new: 0x5c --> 0x3c
776 11:07:51.784924
777 11:07:51.788063 Vref(ca) range 1: 28
778 11:07:51.788140
779 11:07:51.791385 CS Dly= 6 (37-0-32)
780 11:07:51.791461 Write Rank1 MR13 =0xd8
781 11:07:51.794695 Write Rank1 MR13 =0xd8
782 11:07:51.794770 Write Rank1 MR12 =0x5c
783 11:07:51.798118 [RankSwap] Rank num 2, (Multi 1), Rank 0
784 11:07:51.801282 Write Rank0 MR2 =0xad
785 11:07:51.804829 [Write Leveling]
786 11:07:51.804959 delay byte0 byte1 byte2 byte3
787 11:07:51.805045
788 11:07:51.808750 10 0 0
789 11:07:51.808842 11 0 0
790 11:07:51.811414 12 0 0
791 11:07:51.811502 13 0 0
792 11:07:51.814591 14 0 0
793 11:07:51.814689 15 0 0
794 11:07:51.814774 16 0 0
795 11:07:51.818279 17 0 0
796 11:07:51.818356 18 0 0
797 11:07:51.822063 19 0 0
798 11:07:51.822139 20 0 0
799 11:07:51.822198 21 0 0
800 11:07:51.825307 22 0 ff
801 11:07:51.825382 23 0 0
802 11:07:51.828097 24 0 ff
803 11:07:51.828173 25 0 ff
804 11:07:51.831483 26 0 ff
805 11:07:51.831559 27 0 ff
806 11:07:51.834769 28 0 ff
807 11:07:51.834846 29 0 ff
808 11:07:51.834904 30 0 ff
809 11:07:51.838295 31 0 ff
810 11:07:51.838412 32 ff ff
811 11:07:51.841473 33 ff ff
812 11:07:51.841573 34 ff ff
813 11:07:51.844954 35 ff ff
814 11:07:51.845049 36 ff ff
815 11:07:51.848203 37 ff ff
816 11:07:51.848335 38 ff ff
817 11:07:51.851570 pass bytecount = 0xff (0xff: all bytes pass)
818 11:07:51.851695
819 11:07:51.854894 DQS0 dly: 32
820 11:07:51.855027 DQS1 dly: 24
821 11:07:51.858849 Write Rank0 MR2 =0x2d
822 11:07:51.861593 [RankSwap] Rank num 2, (Multi 1), Rank 0
823 11:07:51.861723 Write Rank0 MR1 =0xd6
824 11:07:51.864888 [Gating]
825 11:07:51.865037 ==
826 11:07:51.868583 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
827 11:07:51.871627 fsp= 1, odt_onoff= 1, Byte mode= 0
828 11:07:51.871749 ==
829 11:07:51.878468 3 1 0 |3534 3535 |(11 11)(11 11) |(0 0)(1 1)| 0
830 11:07:51.882211 3 1 4 |3534 1514 |(11 11)(11 11) |(1 1)(0 0)| 0
831 11:07:51.885460 3 1 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
832 11:07:51.888439 3 1 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
833 11:07:51.894869 3 1 16 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
834 11:07:51.899047 3 1 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
835 11:07:51.902127 [Byte 1] Lead/lag Transition tap number (1)
836 11:07:51.908908 3 1 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
837 11:07:51.912625 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
838 11:07:51.915829 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
839 11:07:51.918516 3 2 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
840 11:07:51.925816 3 2 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
841 11:07:51.929391 3 2 12 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
842 11:07:51.931925 3 2 16 |100f dbca |(11 11)(11 11) |(1 1)(1 1)| 0
843 11:07:51.939209 3 2 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(0 0)| 0
844 11:07:51.942270 3 2 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
845 11:07:51.945110 3 2 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
846 11:07:51.952332 3 3 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
847 11:07:51.955661 3 3 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
848 11:07:51.958554 3 3 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
849 11:07:51.962736 3 3 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
850 11:07:51.968501 3 3 16 |202 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
851 11:07:51.972582 3 3 20 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
852 11:07:51.975206 [Byte 0] Lead/lag Transition tap number (1)
853 11:07:51.982252 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
854 11:07:51.985591 [Byte 1] Lead/lag Transition tap number (1)
855 11:07:51.989683 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
856 11:07:51.992348 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
857 11:07:51.999009 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
858 11:07:52.002066 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
859 11:07:52.005465 3 4 12 |201 201 |(11 11)(11 11) |(1 1)(0 1)| 0
860 11:07:52.008623 3 4 16 |1515 abce |(11 11)(11 11) |(1 1)(1 1)| 0
861 11:07:52.015553 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 11:07:52.019013 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 11:07:52.022096 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 11:07:52.028932 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 11:07:52.031846 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 11:07:52.035836 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 11:07:52.042340 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 11:07:52.045176 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 11:07:52.049467 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 11:07:52.055442 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
871 11:07:52.058790 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
872 11:07:52.061960 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
873 11:07:52.065425 [Byte 0] Lead/lag falling Transition (3, 6, 0)
874 11:07:52.072516 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
875 11:07:52.075259 [Byte 1] Lead/lag falling Transition (3, 6, 4)
876 11:07:52.079079 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
877 11:07:52.082279 [Byte 0] Lead/lag Transition tap number (3)
878 11:07:52.088753 3 6 12 |202 403 |(11 11)(11 11) |(0 0)(1 0)| 0
879 11:07:52.091843 [Byte 1] Lead/lag Transition tap number (3)
880 11:07:52.095255 3 6 16 |404 202 |(11 11)(11 11) |(0 0)(0 0)| 0
881 11:07:52.098735 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 11:07:52.102116 [Byte 0]First pass (3, 6, 20)
883 11:07:52.105642 [Byte 1]First pass (3, 6, 20)
884 11:07:52.108938 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 11:07:52.112445 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 11:07:52.115755 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 11:07:52.122998 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 11:07:52.125488 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 11:07:52.128933 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
890 11:07:52.132213 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
891 11:07:52.138916 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
892 11:07:52.142214 All bytes gating window > 1UI, Early break!
893 11:07:52.142631
894 11:07:52.145601 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
895 11:07:52.145984
896 11:07:52.149438 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
897 11:07:52.149864
898 11:07:52.150156
899 11:07:52.150430
900 11:07:52.152321 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
901 11:07:52.152701
902 11:07:52.155698 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
903 11:07:52.156107
904 11:07:52.159447
905 11:07:52.159860 Write Rank0 MR1 =0x56
906 11:07:52.160157
907 11:07:52.162306 best RODT dly(2T, 0.5T) = (2, 3)
908 11:07:52.162711
909 11:07:52.165693 best RODT dly(2T, 0.5T) = (2, 3)
910 11:07:52.166075 ==
911 11:07:52.172401 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
912 11:07:52.172787 fsp= 1, odt_onoff= 1, Byte mode= 0
913 11:07:52.176177 ==
914 11:07:52.179427 Start DQ dly to find pass range UseTestEngine =0
915 11:07:52.183175 x-axis: bit #, y-axis: DQ dly (-127~63)
916 11:07:52.183556 RX Vref Scan = 0
917 11:07:52.185628 -26, [0] xxxxxxxx xxxxxxxx [MSB]
918 11:07:52.188807 -25, [0] xxxxxxxx xxxxxxxx [MSB]
919 11:07:52.192756 -24, [0] xxxxxxxx xxxxxxxx [MSB]
920 11:07:52.196073 -23, [0] xxxxxxxx xxxxxxxx [MSB]
921 11:07:52.199282 -22, [0] xxxxxxxx xxxxxxxx [MSB]
922 11:07:52.202407 -21, [0] xxxxxxxx xxxxxxxx [MSB]
923 11:07:52.206290 -20, [0] xxxxxxxx xxxxxxxx [MSB]
924 11:07:52.206753 -19, [0] xxxxxxxx xxxxxxxx [MSB]
925 11:07:52.209211 -18, [0] xxxxxxxx xxxxxxxx [MSB]
926 11:07:52.213034 -17, [0] xxxxxxxx xxxxxxxx [MSB]
927 11:07:52.216386 -16, [0] xxxxxxxx xxxxxxxx [MSB]
928 11:07:52.219571 -15, [0] xxxxxxxx xxxxxxxx [MSB]
929 11:07:52.223021 -14, [0] xxxxxxxx xxxxxxxx [MSB]
930 11:07:52.226135 -13, [0] xxxxxxxx xxxxxxxx [MSB]
931 11:07:52.226580 -12, [0] xxxxxxxx xxxxxxxx [MSB]
932 11:07:52.229360 -11, [0] xxxxxxxx xxxxxxxx [MSB]
933 11:07:52.232641 -10, [0] xxxxxxxx xxxxxxxx [MSB]
934 11:07:52.236220 -9, [0] xxxxxxxx xxxxxxxx [MSB]
935 11:07:52.239141 -8, [0] xxxxxxxx xxxxxxxx [MSB]
936 11:07:52.243232 -7, [0] xxxxxxxx xxxxxxxx [MSB]
937 11:07:52.245942 -6, [0] xxxxxxxx xxxxxxxx [MSB]
938 11:07:52.246329 -5, [0] xxxxxxxx xxxxxxxx [MSB]
939 11:07:52.249627 -4, [0] xxxxxxxx xxxxxxxx [MSB]
940 11:07:52.252586 -3, [0] xxxxxxxx xxxxxxxx [MSB]
941 11:07:52.256048 -2, [0] xxxxxxxx xxxxxxxx [MSB]
942 11:07:52.259967 -1, [0] xxxxxxxx xxxxxxxx [MSB]
943 11:07:52.263029 0, [0] xxxxxxxx xxxxxxxx [MSB]
944 11:07:52.265936 1, [0] xxxxxxxx oxxxxxxx [MSB]
945 11:07:52.266424 2, [0] xxxxxxxx oxxxxxxx [MSB]
946 11:07:52.269302 3, [0] xxxoxxxx oxxoxxxx [MSB]
947 11:07:52.273605 4, [0] xxxoxoxx ooxoxoxx [MSB]
948 11:07:52.276374 5, [0] xxxoxoxx ooxoooox [MSB]
949 11:07:52.279545 6, [0] xxxoxoxx ooxoooox [MSB]
950 11:07:52.279939 7, [0] xxxoxooo ooxoooox [MSB]
951 11:07:52.282777 8, [0] xoxoxooo ooxooooo [MSB]
952 11:07:52.286922 9, [0] ooxooooo ooxooooo [MSB]
953 11:07:52.289366 10, [0] oooooooo ooxooooo [MSB]
954 11:07:52.292940 31, [0] oooooooo oooooooo [MSB]
955 11:07:52.296109 32, [0] oooxoooo oooooooo [MSB]
956 11:07:52.300166 33, [0] oooxoooo oooooooo [MSB]
957 11:07:52.300626 34, [0] oooxoooo xooooooo [MSB]
958 11:07:52.303102 35, [0] oooxoooo xooxoooo [MSB]
959 11:07:52.307037 36, [0] oooxoxxo xxoxxooo [MSB]
960 11:07:52.310631 37, [0] oooxoxxo xxoxxooo [MSB]
961 11:07:52.312860 38, [0] oxoxoxxo xxoxxxxo [MSB]
962 11:07:52.316347 39, [0] oxoxoxxx xxoxxxxo [MSB]
963 11:07:52.316747 40, [0] xxoxxxxx xxoxxxxo [MSB]
964 11:07:52.319463 41, [0] xxoxxxxx xxoxxxxx [MSB]
965 11:07:52.322965 42, [0] xxxxxxxx xxxxxxxx [MSB]
966 11:07:52.327141 iDelay=42, Bit 0, Center 24 (9 ~ 39) 31
967 11:07:52.329670 iDelay=42, Bit 1, Center 22 (8 ~ 37) 30
968 11:07:52.332927 iDelay=42, Bit 2, Center 25 (10 ~ 41) 32
969 11:07:52.336861 iDelay=42, Bit 3, Center 17 (3 ~ 31) 29
970 11:07:52.340082 iDelay=42, Bit 4, Center 24 (9 ~ 39) 31
971 11:07:52.346355 iDelay=42, Bit 5, Center 19 (4 ~ 35) 32
972 11:07:52.350365 iDelay=42, Bit 6, Center 21 (7 ~ 35) 29
973 11:07:52.353506 iDelay=42, Bit 7, Center 22 (7 ~ 38) 32
974 11:07:52.356518 iDelay=42, Bit 8, Center 17 (1 ~ 33) 33
975 11:07:52.360240 iDelay=42, Bit 9, Center 19 (4 ~ 35) 32
976 11:07:52.363397 iDelay=42, Bit 10, Center 26 (11 ~ 41) 31
977 11:07:52.366371 iDelay=42, Bit 11, Center 18 (3 ~ 34) 32
978 11:07:52.369790 iDelay=42, Bit 12, Center 20 (5 ~ 35) 31
979 11:07:52.372947 iDelay=42, Bit 13, Center 20 (4 ~ 37) 34
980 11:07:52.376611 iDelay=42, Bit 14, Center 21 (5 ~ 37) 33
981 11:07:52.380314 iDelay=42, Bit 15, Center 24 (8 ~ 40) 33
982 11:07:52.380698 ==
983 11:07:52.386826 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
984 11:07:52.389767 fsp= 1, odt_onoff= 1, Byte mode= 0
985 11:07:52.390146 ==
986 11:07:52.390442 DQS Delay:
987 11:07:52.393481 DQS0 = 0, DQS1 = 0
988 11:07:52.393861 DQM Delay:
989 11:07:52.397163 DQM0 = 21, DQM1 = 20
990 11:07:52.397551 DQ Delay:
991 11:07:52.400129 DQ0 =24, DQ1 =22, DQ2 =25, DQ3 =17
992 11:07:52.403562 DQ4 =24, DQ5 =19, DQ6 =21, DQ7 =22
993 11:07:52.407024 DQ8 =17, DQ9 =19, DQ10 =26, DQ11 =18
994 11:07:52.409944 DQ12 =20, DQ13 =20, DQ14 =21, DQ15 =24
995 11:07:52.410330
996 11:07:52.410627
997 11:07:52.410897 DramC Write-DBI off
998 11:07:52.411164 ==
999 11:07:52.416992 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1000 11:07:52.419954 fsp= 1, odt_onoff= 1, Byte mode= 0
1001 11:07:52.420337 ==
1002 11:07:52.423504 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1003 11:07:52.423922
1004 11:07:52.427093 Begin, DQ Scan Range 920~1176
1005 11:07:52.427590
1006 11:07:52.427889
1007 11:07:52.430472 TX Vref Scan disable
1008 11:07:52.433436 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1009 11:07:52.437185 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1010 11:07:52.440360 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1011 11:07:52.443594 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1012 11:07:52.447181 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1013 11:07:52.450130 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1014 11:07:52.453443 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1015 11:07:52.456962 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1016 11:07:52.460326 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1017 11:07:52.463706 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1018 11:07:52.466858 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1019 11:07:52.473113 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1020 11:07:52.476917 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1021 11:07:52.480268 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1022 11:07:52.483525 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1023 11:07:52.486663 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1024 11:07:52.490430 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1025 11:07:52.493153 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1026 11:07:52.496964 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1027 11:07:52.500671 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1028 11:07:52.504176 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1029 11:07:52.506937 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1030 11:07:52.510108 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1031 11:07:52.513446 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1032 11:07:52.516771 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1033 11:07:52.520358 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1034 11:07:52.523337 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1035 11:07:52.526569 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1036 11:07:52.533366 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1037 11:07:52.537111 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1038 11:07:52.540093 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1039 11:07:52.543931 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1040 11:07:52.546942 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1041 11:07:52.550018 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1042 11:07:52.554166 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1043 11:07:52.556702 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1044 11:07:52.560340 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1045 11:07:52.563660 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1046 11:07:52.567531 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1047 11:07:52.570783 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1048 11:07:52.573805 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1049 11:07:52.576816 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1050 11:07:52.581519 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1051 11:07:52.584069 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1052 11:07:52.586748 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1053 11:07:52.590427 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1054 11:07:52.593444 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1055 11:07:52.597392 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1056 11:07:52.601792 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1057 11:07:52.604418 969 |3 6 9|[0] xxxxxxxx oxxoxxxx [MSB]
1058 11:07:52.607488 970 |3 6 10|[0] xxxxxxxx ooxoooxx [MSB]
1059 11:07:52.613533 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1060 11:07:52.617159 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1061 11:07:52.620660 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1062 11:07:52.623531 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1063 11:07:52.626976 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1064 11:07:52.630442 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1065 11:07:52.633719 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1066 11:07:52.637194 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
1067 11:07:52.640393 979 |3 6 19|[0] xxxoooox oooooooo [MSB]
1068 11:07:52.643795 980 |3 6 20|[0] xoxooooo oooooooo [MSB]
1069 11:07:52.647367 988 |3 6 28|[0] oooooooo xooooooo [MSB]
1070 11:07:52.650638 989 |3 6 29|[0] oooooooo xooooooo [MSB]
1071 11:07:52.653731 990 |3 6 30|[0] oooooooo xooxoooo [MSB]
1072 11:07:52.661010 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1073 11:07:52.663975 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1074 11:07:52.668001 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1075 11:07:52.672286 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1076 11:07:52.674873 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1077 11:07:52.677812 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1078 11:07:52.680692 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1079 11:07:52.684302 998 |3 6 38|[0] oooxoxxo xxxxxxxx [MSB]
1080 11:07:52.688003 999 |3 6 39|[0] xxoxxxxx xxxxxxxx [MSB]
1081 11:07:52.690969 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1082 11:07:52.694178 Byte0, DQ PI dly=988, DQM PI dly= 988
1083 11:07:52.697912 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
1084 11:07:52.698299
1085 11:07:52.704160 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
1086 11:07:52.704585
1087 11:07:52.707879 Byte1, DQ PI dly=980, DQM PI dly= 980
1088 11:07:52.710929 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1089 11:07:52.711329
1090 11:07:52.714226 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1091 11:07:52.714738
1092 11:07:52.717453 ==
1093 11:07:52.721566 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1094 11:07:52.724546 fsp= 1, odt_onoff= 1, Byte mode= 0
1095 11:07:52.725044 ==
1096 11:07:52.727940 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1097 11:07:52.728458
1098 11:07:52.731062 Begin, DQ Scan Range 956~1020
1099 11:07:52.734283 Write Rank0 MR14 =0x0
1100 11:07:52.741054
1101 11:07:52.741507 CH=0, VrefRange= 0, VrefLevel = 0
1102 11:07:52.747696 TX Bit0 (985~994) 10 989, Bit8 (971~983) 13 977,
1103 11:07:52.751110 TX Bit1 (982~994) 13 988, Bit9 (973~986) 14 979,
1104 11:07:52.757697 TX Bit2 (985~994) 10 989, Bit10 (979~988) 10 983,
1105 11:07:52.761676 TX Bit3 (979~989) 11 984, Bit11 (973~984) 12 978,
1106 11:07:52.764566 TX Bit4 (981~993) 13 987, Bit12 (973~986) 14 979,
1107 11:07:52.771052 TX Bit5 (981~991) 11 986, Bit13 (973~986) 14 979,
1108 11:07:52.774913 TX Bit6 (980~993) 14 986, Bit14 (974~988) 15 981,
1109 11:07:52.777856 TX Bit7 (982~993) 12 987, Bit15 (979~990) 12 984,
1110 11:07:52.778241
1111 11:07:52.781351 Write Rank0 MR14 =0x2
1112 11:07:52.789520
1113 11:07:52.789943 CH=0, VrefRange= 0, VrefLevel = 2
1114 11:07:52.796234 TX Bit0 (984~995) 12 989, Bit8 (971~984) 14 977,
1115 11:07:52.799331 TX Bit1 (982~995) 14 988, Bit9 (973~987) 15 980,
1116 11:07:52.806559 TX Bit2 (984~994) 11 989, Bit10 (979~989) 11 984,
1117 11:07:52.809037 TX Bit3 (978~990) 13 984, Bit11 (972~985) 14 978,
1118 11:07:52.812749 TX Bit4 (981~993) 13 987, Bit12 (973~987) 15 980,
1119 11:07:52.819836 TX Bit5 (981~992) 12 986, Bit13 (973~986) 14 979,
1120 11:07:52.822379 TX Bit6 (980~993) 14 986, Bit14 (975~988) 14 981,
1121 11:07:52.826145 TX Bit7 (981~994) 14 987, Bit15 (978~990) 13 984,
1122 11:07:52.826533
1123 11:07:52.829000 Write Rank0 MR14 =0x4
1124 11:07:52.837764
1125 11:07:52.838149 CH=0, VrefRange= 0, VrefLevel = 4
1126 11:07:52.844017 TX Bit0 (984~996) 13 990, Bit8 (970~984) 15 977,
1127 11:07:52.847766 TX Bit1 (981~995) 15 988, Bit9 (973~988) 16 980,
1128 11:07:52.854406 TX Bit2 (983~995) 13 989, Bit10 (977~990) 14 983,
1129 11:07:52.857868 TX Bit3 (978~991) 14 984, Bit11 (972~985) 14 978,
1130 11:07:52.861111 TX Bit4 (980~994) 15 987, Bit12 (972~988) 17 980,
1131 11:07:52.867927 TX Bit5 (980~992) 13 986, Bit13 (973~987) 15 980,
1132 11:07:52.871213 TX Bit6 (980~993) 14 986, Bit14 (974~989) 16 981,
1133 11:07:52.874589 TX Bit7 (980~994) 15 987, Bit15 (977~991) 15 984,
1134 11:07:52.874999
1135 11:07:52.878004 Write Rank0 MR14 =0x6
1136 11:07:52.886092
1137 11:07:52.886523 CH=0, VrefRange= 0, VrefLevel = 6
1138 11:07:52.892810 TX Bit0 (983~996) 14 989, Bit8 (970~985) 16 977,
1139 11:07:52.896304 TX Bit1 (980~996) 17 988, Bit9 (972~988) 17 980,
1140 11:07:52.902609 TX Bit2 (982~996) 15 989, Bit10 (977~990) 14 983,
1141 11:07:52.905484 TX Bit3 (978~992) 15 985, Bit11 (971~985) 15 978,
1142 11:07:52.910105 TX Bit4 (980~994) 15 987, Bit12 (972~988) 17 980,
1143 11:07:52.915786 TX Bit5 (980~993) 14 986, Bit13 (972~987) 16 979,
1144 11:07:52.919099 TX Bit6 (979~994) 16 986, Bit14 (973~989) 17 981,
1145 11:07:52.922661 TX Bit7 (980~995) 16 987, Bit15 (978~991) 14 984,
1146 11:07:52.923046
1147 11:07:52.926100 Write Rank0 MR14 =0x8
1148 11:07:52.934745
1149 11:07:52.935277 CH=0, VrefRange= 0, VrefLevel = 8
1150 11:07:52.941196 TX Bit0 (982~997) 16 989, Bit8 (969~986) 18 977,
1151 11:07:52.944855 TX Bit1 (981~997) 17 989, Bit9 (972~988) 17 980,
1152 11:07:52.947913 TX Bit2 (982~996) 15 989, Bit10 (976~991) 16 983,
1153 11:07:53.001906 TX Bit3 (978~992) 15 985, Bit11 (971~987) 17 979,
1154 11:07:53.002692 TX Bit4 (980~995) 16 987, Bit12 (971~988) 18 979,
1155 11:07:53.003034 TX Bit5 (980~993) 14 986, Bit13 (972~987) 16 979,
1156 11:07:53.003323 TX Bit6 (980~994) 15 987, Bit14 (973~990) 18 981,
1157 11:07:53.003598 TX Bit7 (980~995) 16 987, Bit15 (976~992) 17 984,
1158 11:07:53.003862
1159 11:07:53.004119 Write Rank0 MR14 =0xa
1160 11:07:53.004374
1161 11:07:53.004678 CH=0, VrefRange= 0, VrefLevel = 10
1162 11:07:53.004946 TX Bit0 (982~998) 17 990, Bit8 (968~987) 20 977,
1163 11:07:53.005228 TX Bit1 (980~997) 18 988, Bit9 (971~989) 19 980,
1164 11:07:53.005485 TX Bit2 (982~997) 16 989, Bit10 (976~992) 17 984,
1165 11:07:53.005736 TX Bit3 (977~992) 16 984, Bit11 (970~988) 19 979,
1166 11:07:53.051550 TX Bit4 (980~996) 17 988, Bit12 (971~989) 19 980,
1167 11:07:53.052025 TX Bit5 (979~994) 16 986, Bit13 (971~988) 18 979,
1168 11:07:53.052670 TX Bit6 (979~995) 17 987, Bit14 (973~991) 19 982,
1169 11:07:53.053014 TX Bit7 (980~996) 17 988, Bit15 (977~992) 16 984,
1170 11:07:53.053404
1171 11:07:53.053733 Write Rank0 MR14 =0xc
1172 11:07:53.054004
1173 11:07:53.054316 CH=0, VrefRange= 0, VrefLevel = 12
1174 11:07:53.054587 TX Bit0 (982~998) 17 990, Bit8 (968~987) 20 977,
1175 11:07:53.054876 TX Bit1 (980~997) 18 988, Bit9 (971~989) 19 980,
1176 11:07:53.055222 TX Bit2 (982~997) 16 989, Bit10 (976~992) 17 984,
1177 11:07:53.055492 TX Bit3 (977~992) 16 984, Bit11 (970~988) 19 979,
1178 11:07:53.056826 TX Bit4 (980~996) 17 988, Bit12 (971~989) 19 980,
1179 11:07:53.060407 TX Bit5 (979~994) 16 986, Bit13 (971~988) 18 979,
1180 11:07:53.063508 TX Bit6 (979~995) 17 987, Bit14 (973~991) 19 982,
1181 11:07:53.070814 TX Bit7 (980~996) 17 988, Bit15 (977~992) 16 984,
1182 11:07:53.071205
1183 11:07:53.071518 Write Rank0 MR14 =0xe
1184 11:07:53.080825
1185 11:07:53.083486 CH=0, VrefRange= 0, VrefLevel = 14
1186 11:07:53.087160 TX Bit0 (981~999) 19 990, Bit8 (968~988) 21 978,
1187 11:07:53.090478 TX Bit1 (980~999) 20 989, Bit9 (971~989) 19 980,
1188 11:07:53.096884 TX Bit2 (981~998) 18 989, Bit10 (976~993) 18 984,
1189 11:07:53.100564 TX Bit3 (977~993) 17 985, Bit11 (969~988) 20 978,
1190 11:07:53.103639 TX Bit4 (980~997) 18 988, Bit12 (970~989) 20 979,
1191 11:07:53.110904 TX Bit5 (979~994) 16 986, Bit13 (970~989) 20 979,
1192 11:07:53.114294 TX Bit6 (979~996) 18 987, Bit14 (972~991) 20 981,
1193 11:07:53.117527 TX Bit7 (980~997) 18 988, Bit15 (976~994) 19 985,
1194 11:07:53.117920
1195 11:07:53.120419 Write Rank0 MR14 =0x10
1196 11:07:53.130615
1197 11:07:53.131044 CH=0, VrefRange= 0, VrefLevel = 16
1198 11:07:53.136800 TX Bit0 (981~1000) 20 990, Bit8 (968~988) 21 978,
1199 11:07:53.139683 TX Bit1 (980~999) 20 989, Bit9 (970~990) 21 980,
1200 11:07:53.146540 TX Bit2 (981~999) 19 990, Bit10 (975~993) 19 984,
1201 11:07:53.149785 TX Bit3 (978~993) 16 985, Bit11 (969~989) 21 979,
1202 11:07:53.152777 TX Bit4 (980~998) 19 989, Bit12 (970~990) 21 980,
1203 11:07:53.159599 TX Bit5 (979~995) 17 987, Bit13 (970~989) 20 979,
1204 11:07:53.163245 TX Bit6 (979~996) 18 987, Bit14 (972~992) 21 982,
1205 11:07:53.166654 TX Bit7 (979~998) 20 988, Bit15 (975~994) 20 984,
1206 11:07:53.167044
1207 11:07:53.169578 Write Rank0 MR14 =0x12
1208 11:07:53.178832
1209 11:07:53.181992 CH=0, VrefRange= 0, VrefLevel = 18
1210 11:07:53.185722 TX Bit0 (981~1001) 21 991, Bit8 (968~988) 21 978,
1211 11:07:53.188514 TX Bit1 (979~1000) 22 989, Bit9 (969~990) 22 979,
1212 11:07:53.195397 TX Bit2 (980~1000) 21 990, Bit10 (975~994) 20 984,
1213 11:07:53.198520 TX Bit3 (977~993) 17 985, Bit11 (968~989) 22 978,
1214 11:07:53.202683 TX Bit4 (980~998) 19 989, Bit12 (969~990) 22 979,
1215 11:07:53.209082 TX Bit5 (979~995) 17 987, Bit13 (970~990) 21 980,
1216 11:07:53.212337 TX Bit6 (979~997) 19 988, Bit14 (970~992) 23 981,
1217 11:07:53.218766 TX Bit7 (980~998) 19 989, Bit15 (976~994) 19 985,
1218 11:07:53.219150
1219 11:07:53.222021 wait MRW command Rank0 MR14 =0x14 fired (1)
1220 11:07:53.222405 Write Rank0 MR14 =0x14
1221 11:07:53.232358
1222 11:07:53.236035 CH=0, VrefRange= 0, VrefLevel = 20
1223 11:07:53.238458 TX Bit0 (981~1001) 21 991, Bit8 (967~989) 23 978,
1224 11:07:53.241911 TX Bit1 (979~1000) 22 989, Bit9 (969~991) 23 980,
1225 11:07:53.249041 TX Bit2 (980~1000) 21 990, Bit10 (975~995) 21 985,
1226 11:07:53.252344 TX Bit3 (976~994) 19 985, Bit11 (968~989) 22 978,
1227 11:07:53.255199 TX Bit4 (979~999) 21 989, Bit12 (969~991) 23 980,
1228 11:07:53.262008 TX Bit5 (979~996) 18 987, Bit13 (969~990) 22 979,
1229 11:07:53.265468 TX Bit6 (979~997) 19 988, Bit14 (970~992) 23 981,
1230 11:07:53.268760 TX Bit7 (979~999) 21 989, Bit15 (974~995) 22 984,
1231 11:07:53.271976
1232 11:07:53.272360 Write Rank0 MR14 =0x16
1233 11:07:53.282110
1234 11:07:53.285033 CH=0, VrefRange= 0, VrefLevel = 22
1235 11:07:53.288462 TX Bit0 (980~1002) 23 991, Bit8 (967~989) 23 978,
1236 11:07:53.291808 TX Bit1 (979~1001) 23 990, Bit9 (969~991) 23 980,
1237 11:07:53.298701 TX Bit2 (980~1001) 22 990, Bit10 (974~995) 22 984,
1238 11:07:53.301476 TX Bit3 (977~994) 18 985, Bit11 (968~990) 23 979,
1239 11:07:53.305062 TX Bit4 (980~999) 20 989, Bit12 (969~991) 23 980,
1240 11:07:53.311809 TX Bit5 (979~997) 19 988, Bit13 (969~991) 23 980,
1241 11:07:53.314806 TX Bit6 (978~998) 21 988, Bit14 (970~993) 24 981,
1242 11:07:53.321738 TX Bit7 (979~1000) 22 989, Bit15 (975~996) 22 985,
1243 11:07:53.322125
1244 11:07:53.322423 Write Rank0 MR14 =0x18
1245 11:07:53.331686
1246 11:07:53.334573 CH=0, VrefRange= 0, VrefLevel = 24
1247 11:07:53.338811 TX Bit0 (980~1002) 23 991, Bit8 (967~990) 24 978,
1248 11:07:53.341319 TX Bit1 (979~1001) 23 990, Bit9 (968~991) 24 979,
1249 11:07:53.348320 TX Bit2 (980~1001) 22 990, Bit10 (974~996) 23 985,
1250 11:07:53.351570 TX Bit3 (976~995) 20 985, Bit11 (968~990) 23 979,
1251 11:07:53.354868 TX Bit4 (979~1000) 22 989, Bit12 (969~991) 23 980,
1252 11:07:53.361508 TX Bit5 (978~997) 20 987, Bit13 (969~992) 24 980,
1253 11:07:53.364415 TX Bit6 (978~999) 22 988, Bit14 (969~994) 26 981,
1254 11:07:53.371810 TX Bit7 (979~1000) 22 989, Bit15 (974~996) 23 985,
1255 11:07:53.372320
1256 11:07:53.372654 Write Rank0 MR14 =0x1a
1257 11:07:53.382137
1258 11:07:53.384427 CH=0, VrefRange= 0, VrefLevel = 26
1259 11:07:53.387949 TX Bit0 (980~1003) 24 991, Bit8 (967~990) 24 978,
1260 11:07:53.391646 TX Bit1 (979~1001) 23 990, Bit9 (968~991) 24 979,
1261 11:07:53.397795 TX Bit2 (979~1002) 24 990, Bit10 (973~996) 24 984,
1262 11:07:53.401963 TX Bit3 (976~995) 20 985, Bit11 (968~990) 23 979,
1263 11:07:53.404461 TX Bit4 (979~1001) 23 990, Bit12 (968~992) 25 980,
1264 11:07:53.411423 TX Bit5 (978~998) 21 988, Bit13 (969~992) 24 980,
1265 11:07:53.414653 TX Bit6 (978~999) 22 988, Bit14 (969~994) 26 981,
1266 11:07:53.420948 TX Bit7 (979~1001) 23 990, Bit15 (973~996) 24 984,
1267 11:07:53.421336
1268 11:07:53.421622 Write Rank0 MR14 =0x1c
1269 11:07:53.431376
1270 11:07:53.434828 CH=0, VrefRange= 0, VrefLevel = 28
1271 11:07:53.438294 TX Bit0 (980~1003) 24 991, Bit8 (967~990) 24 978,
1272 11:07:53.441417 TX Bit1 (979~1002) 24 990, Bit9 (968~991) 24 979,
1273 11:07:53.448355 TX Bit2 (979~1002) 24 990, Bit10 (973~996) 24 984,
1274 11:07:53.451407 TX Bit3 (976~995) 20 985, Bit11 (968~991) 24 979,
1275 11:07:53.454816 TX Bit4 (979~1001) 23 990, Bit12 (968~993) 26 980,
1276 11:07:53.461357 TX Bit5 (978~998) 21 988, Bit13 (968~992) 25 980,
1277 11:07:53.464483 TX Bit6 (978~1000) 23 989, Bit14 (969~994) 26 981,
1278 11:07:53.472214 TX Bit7 (979~1001) 23 990, Bit15 (974~996) 23 985,
1279 11:07:53.472676
1280 11:07:53.472978 Write Rank0 MR14 =0x1e
1281 11:07:53.482081
1282 11:07:53.484924 CH=0, VrefRange= 0, VrefLevel = 30
1283 11:07:53.488354 TX Bit0 (980~1004) 25 992, Bit8 (967~990) 24 978,
1284 11:07:53.491507 TX Bit1 (979~1002) 24 990, Bit9 (968~991) 24 979,
1285 11:07:53.498147 TX Bit2 (980~1003) 24 991, Bit10 (973~997) 25 985,
1286 11:07:53.501859 TX Bit3 (975~995) 21 985, Bit11 (968~990) 23 979,
1287 11:07:53.504802 TX Bit4 (979~1002) 24 990, Bit12 (968~993) 26 980,
1288 11:07:53.511401 TX Bit5 (978~998) 21 988, Bit13 (968~992) 25 980,
1289 11:07:53.514883 TX Bit6 (978~1000) 23 989, Bit14 (969~994) 26 981,
1290 11:07:53.521611 TX Bit7 (979~1002) 24 990, Bit15 (973~997) 25 985,
1291 11:07:53.522133
1292 11:07:53.522561 Write Rank0 MR14 =0x20
1293 11:07:53.532205
1294 11:07:53.534884 CH=0, VrefRange= 0, VrefLevel = 32
1295 11:07:53.538340 TX Bit0 (980~1004) 25 992, Bit8 (967~990) 24 978,
1296 11:07:53.541949 TX Bit1 (979~1002) 24 990, Bit9 (968~991) 24 979,
1297 11:07:53.548755 TX Bit2 (980~1003) 24 991, Bit10 (973~997) 25 985,
1298 11:07:53.551715 TX Bit3 (975~995) 21 985, Bit11 (968~990) 23 979,
1299 11:07:53.554631 TX Bit4 (979~1002) 24 990, Bit12 (968~993) 26 980,
1300 11:07:53.561828 TX Bit5 (978~998) 21 988, Bit13 (968~992) 25 980,
1301 11:07:53.564911 TX Bit6 (978~1000) 23 989, Bit14 (969~994) 26 981,
1302 11:07:53.571306 TX Bit7 (979~1002) 24 990, Bit15 (973~997) 25 985,
1303 11:07:53.571701
1304 11:07:53.571994 Write Rank0 MR14 =0x22
1305 11:07:53.582048
1306 11:07:53.585087 CH=0, VrefRange= 0, VrefLevel = 34
1307 11:07:53.588090 TX Bit0 (980~1004) 25 992, Bit8 (967~990) 24 978,
1308 11:07:53.592023 TX Bit1 (979~1002) 24 990, Bit9 (968~991) 24 979,
1309 11:07:53.598121 TX Bit2 (980~1003) 24 991, Bit10 (973~997) 25 985,
1310 11:07:53.601638 TX Bit3 (975~995) 21 985, Bit11 (968~990) 23 979,
1311 11:07:53.605055 TX Bit4 (979~1002) 24 990, Bit12 (968~993) 26 980,
1312 11:07:53.611616 TX Bit5 (978~998) 21 988, Bit13 (968~992) 25 980,
1313 11:07:53.614619 TX Bit6 (978~1000) 23 989, Bit14 (969~994) 26 981,
1314 11:07:53.621702 TX Bit7 (979~1002) 24 990, Bit15 (973~997) 25 985,
1315 11:07:53.621946
1316 11:07:53.622102 Write Rank0 MR14 =0x24
1317 11:07:53.631213
1318 11:07:53.631552 CH=0, VrefRange= 0, VrefLevel = 36
1319 11:07:53.637715 TX Bit0 (980~1004) 25 992, Bit8 (967~990) 24 978,
1320 11:07:53.641332 TX Bit1 (979~1002) 24 990, Bit9 (968~991) 24 979,
1321 11:07:53.648027 TX Bit2 (980~1003) 24 991, Bit10 (973~997) 25 985,
1322 11:07:53.651659 TX Bit3 (975~995) 21 985, Bit11 (968~990) 23 979,
1323 11:07:53.654545 TX Bit4 (979~1002) 24 990, Bit12 (968~993) 26 980,
1324 11:07:53.661991 TX Bit5 (978~998) 21 988, Bit13 (968~992) 25 980,
1325 11:07:53.664840 TX Bit6 (978~1000) 23 989, Bit14 (969~994) 26 981,
1326 11:07:53.671539 TX Bit7 (979~1002) 24 990, Bit15 (973~997) 25 985,
1327 11:07:53.671991
1328 11:07:53.672342
1329 11:07:53.674778 TX Vref found, early break! 359< 364
1330 11:07:53.677899 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =833/100 ps
1331 11:07:53.681629 u1DelayCellOfst[0]=8 cells (7 PI)
1332 11:07:53.685521 u1DelayCellOfst[1]=5 cells (5 PI)
1333 11:07:53.687936 u1DelayCellOfst[2]=7 cells (6 PI)
1334 11:07:53.692221 u1DelayCellOfst[3]=0 cells (0 PI)
1335 11:07:53.695231 u1DelayCellOfst[4]=5 cells (5 PI)
1336 11:07:53.695688 u1DelayCellOfst[5]=3 cells (3 PI)
1337 11:07:53.698505 u1DelayCellOfst[6]=4 cells (4 PI)
1338 11:07:53.701683 u1DelayCellOfst[7]=5 cells (5 PI)
1339 11:07:53.705071 Byte0, DQ PI dly=985, DQM PI dly= 988
1340 11:07:53.711314 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1341 11:07:53.711770
1342 11:07:53.714848 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1343 11:07:53.715281
1344 11:07:53.718948 u1DelayCellOfst[8]=0 cells (0 PI)
1345 11:07:53.721955 u1DelayCellOfst[9]=1 cells (1 PI)
1346 11:07:53.725210 u1DelayCellOfst[10]=8 cells (7 PI)
1347 11:07:53.729161 u1DelayCellOfst[11]=1 cells (1 PI)
1348 11:07:53.731551 u1DelayCellOfst[12]=2 cells (2 PI)
1349 11:07:53.732000 u1DelayCellOfst[13]=2 cells (2 PI)
1350 11:07:53.734943 u1DelayCellOfst[14]=3 cells (3 PI)
1351 11:07:53.738468 u1DelayCellOfst[15]=8 cells (7 PI)
1352 11:07:53.741660 Byte1, DQ PI dly=978, DQM PI dly= 981
1353 11:07:53.748209 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1354 11:07:53.748704
1355 11:07:53.751664 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1356 11:07:53.752121
1357 11:07:53.755090 Write Rank0 MR14 =0x1e
1358 11:07:53.755549
1359 11:07:53.756000 Final TX Range 0 Vref 30
1360 11:07:53.756443
1361 11:07:53.762137 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1362 11:07:53.762672
1363 11:07:53.768241 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1364 11:07:53.774936 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1365 11:07:53.784946 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1366 11:07:53.785520 Write Rank0 MR3 =0xb0
1367 11:07:53.788243 DramC Write-DBI on
1368 11:07:53.788720 ==
1369 11:07:53.791768 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1370 11:07:53.794986 fsp= 1, odt_onoff= 1, Byte mode= 0
1371 11:07:53.795486 ==
1372 11:07:53.801933 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1373 11:07:53.802384
1374 11:07:53.802684 Begin, DQ Scan Range 701~765
1375 11:07:53.802964
1376 11:07:53.803228
1377 11:07:53.804916 TX Vref Scan disable
1378 11:07:53.808232 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1379 11:07:53.811993 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1380 11:07:53.815348 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1381 11:07:53.819126 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1382 11:07:53.821576 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1383 11:07:53.824889 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1384 11:07:53.828603 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1385 11:07:53.832301 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1386 11:07:53.835150 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1387 11:07:53.841577 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1388 11:07:53.844773 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1389 11:07:53.849015 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1390 11:07:53.851508 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1391 11:07:53.854745 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1392 11:07:53.858772 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1393 11:07:53.861867 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1394 11:07:53.865333 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1395 11:07:53.868555 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1396 11:07:53.871882 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1397 11:07:53.875569 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
1398 11:07:53.878575 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
1399 11:07:53.881648 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
1400 11:07:53.889388 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1401 11:07:53.893092 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1402 11:07:53.896534 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1403 11:07:53.899613 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1404 11:07:53.903169 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1405 11:07:53.906079 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1406 11:07:53.910005 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1407 11:07:53.913177 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1408 11:07:53.916494 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
1409 11:07:53.919708 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
1410 11:07:53.922883 748 |2 6 44|[0] xxxxxxxx xxxxxxxx [MSB]
1411 11:07:53.927038 Byte0, DQ PI dly=735, DQM PI dly= 735
1412 11:07:53.929789 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
1413 11:07:53.930250
1414 11:07:53.936267 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
1415 11:07:53.936657
1416 11:07:53.939880 Byte1, DQ PI dly=724, DQM PI dly= 724
1417 11:07:53.943000 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
1418 11:07:53.943408
1419 11:07:53.946326 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
1420 11:07:53.949956
1421 11:07:53.953477 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1422 11:07:53.963714 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1423 11:07:53.969975 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1424 11:07:53.970470 Write Rank0 MR3 =0x30
1425 11:07:53.973006 DramC Write-DBI off
1426 11:07:53.973634
1427 11:07:53.974012 [DATLAT]
1428 11:07:53.976325 Freq=1600, CH0 RK0, use_rxtx_scan=0
1429 11:07:53.976755
1430 11:07:53.980109 DATLAT Default: 0xf
1431 11:07:53.980493 7, 0xFFFF, sum=0
1432 11:07:53.982868 8, 0xFFFF, sum=0
1433 11:07:53.983394 9, 0xFFFF, sum=0
1434 11:07:53.986723 10, 0xFFFF, sum=0
1435 11:07:53.987113 11, 0xFFFF, sum=0
1436 11:07:53.989588 12, 0xFFFF, sum=0
1437 11:07:53.989983 13, 0xFFFF, sum=0
1438 11:07:53.990288 14, 0x0, sum=1
1439 11:07:53.993797 15, 0x0, sum=2
1440 11:07:53.994188 16, 0x0, sum=3
1441 11:07:53.996436 17, 0x0, sum=4
1442 11:07:53.999581 pattern=2 first_step=14 total pass=5 best_step=16
1443 11:07:53.999971 ==
1444 11:07:54.006177 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1445 11:07:54.010179 fsp= 1, odt_onoff= 1, Byte mode= 0
1446 11:07:54.010565 ==
1447 11:07:54.013387 Start DQ dly to find pass range UseTestEngine =1
1448 11:07:54.016514 x-axis: bit #, y-axis: DQ dly (-127~63)
1449 11:07:54.016921 RX Vref Scan = 1
1450 11:07:54.132676
1451 11:07:54.133310 RX Vref found, early break!
1452 11:07:54.133650
1453 11:07:54.139126 Final RX Vref 12, apply to both rank0 and 1
1454 11:07:54.139601 ==
1455 11:07:54.142307 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1456 11:07:54.146000 fsp= 1, odt_onoff= 1, Byte mode= 0
1457 11:07:54.146423 ==
1458 11:07:54.146805 DQS Delay:
1459 11:07:54.149288 DQS0 = 0, DQS1 = 0
1460 11:07:54.149674 DQM Delay:
1461 11:07:54.152713 DQM0 = 21, DQM1 = 20
1462 11:07:54.153165 DQ Delay:
1463 11:07:54.155810 DQ0 =23, DQ1 =22, DQ2 =24, DQ3 =17
1464 11:07:54.159276 DQ4 =23, DQ5 =19, DQ6 =20, DQ7 =23
1465 11:07:54.162687 DQ8 =17, DQ9 =18, DQ10 =25, DQ11 =18
1466 11:07:54.165809 DQ12 =20, DQ13 =19, DQ14 =21, DQ15 =22
1467 11:07:54.166253
1468 11:07:54.166599
1469 11:07:54.166877
1470 11:07:54.169064 [DramC_TX_OE_Calibration] TA2
1471 11:07:54.172444 Original DQ_B0 (3 6) =30, OEN = 27
1472 11:07:54.176024 Original DQ_B1 (3 6) =30, OEN = 27
1473 11:07:54.179705 23, 0x0, End_B0=23 End_B1=23
1474 11:07:54.180089 24, 0x0, End_B0=24 End_B1=24
1475 11:07:54.182431 25, 0x0, End_B0=25 End_B1=25
1476 11:07:54.186477 26, 0x0, End_B0=26 End_B1=26
1477 11:07:54.189093 27, 0x0, End_B0=27 End_B1=27
1478 11:07:54.189547 28, 0x0, End_B0=28 End_B1=28
1479 11:07:54.192898 29, 0x0, End_B0=29 End_B1=29
1480 11:07:54.196590 30, 0x0, End_B0=30 End_B1=30
1481 11:07:54.199205 31, 0xFFFF, End_B0=30 End_B1=30
1482 11:07:54.202800 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1483 11:07:54.209645 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1484 11:07:54.210074
1485 11:07:54.210367
1486 11:07:54.212465 Write Rank0 MR23 =0x3f
1487 11:07:54.212884 [DQSOSC]
1488 11:07:54.222787 [DQSOSCAuto] RK0, (LSB)MR18= 0xcccc, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
1489 11:07:54.226179 CH0_RK0: MR19=0x202, MR18=0xCCCC, DQSOSC=439, MR23=63, INC=12, DEC=19
1490 11:07:54.229452 Write Rank0 MR23 =0x3f
1491 11:07:54.229827 [DQSOSC]
1492 11:07:54.239856 [DQSOSCAuto] RK0, (LSB)MR18= 0xcdcd, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
1493 11:07:54.240282 CH0 RK0: MR19=202, MR18=CDCD
1494 11:07:54.246012 [RankSwap] Rank num 2, (Multi 1), Rank 1
1495 11:07:54.246390 Write Rank0 MR2 =0xad
1496 11:07:54.250028 [Write Leveling]
1497 11:07:54.250402 delay byte0 byte1 byte2 byte3
1498 11:07:54.252570
1499 11:07:54.252945 10 0 0
1500 11:07:54.253315 11 0 0
1501 11:07:54.256048 12 0 0
1502 11:07:54.256484 13 0 0
1503 11:07:54.259651 14 0 0
1504 11:07:54.260038 15 0 0
1505 11:07:54.260338 16 0 0
1506 11:07:54.262873 17 0 0
1507 11:07:54.263261 18 0 0
1508 11:07:54.266297 19 0 0
1509 11:07:54.266699 20 0 0
1510 11:07:54.266999 21 0 0
1511 11:07:54.269838 22 0 0
1512 11:07:54.270226 23 0 0
1513 11:07:54.273392 24 0 0
1514 11:07:54.273790 25 0 ff
1515 11:07:54.276218 26 0 ff
1516 11:07:54.276606 27 0 ff
1517 11:07:54.279492 28 0 ff
1518 11:07:54.279879 29 0 ff
1519 11:07:54.280179 30 0 ff
1520 11:07:54.283054 31 0 ff
1521 11:07:54.283458 32 0 ff
1522 11:07:54.285908 33 ff ff
1523 11:07:54.286278 34 ff ff
1524 11:07:54.289273 35 ff ff
1525 11:07:54.289643 36 ff ff
1526 11:07:54.292957 37 ff ff
1527 11:07:54.293383 38 ff ff
1528 11:07:54.296048 39 ff ff
1529 11:07:54.299167 pass bytecount = 0xff (0xff: all bytes pass)
1530 11:07:54.299555
1531 11:07:54.299851 DQS0 dly: 33
1532 11:07:54.302691 DQS1 dly: 25
1533 11:07:54.303087 Write Rank0 MR2 =0x2d
1534 11:07:54.306202 [RankSwap] Rank num 2, (Multi 1), Rank 0
1535 11:07:54.309394 Write Rank1 MR1 =0xd6
1536 11:07:54.309788 [Gating]
1537 11:07:54.310224 ==
1538 11:07:54.316204 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1539 11:07:54.319176 fsp= 1, odt_onoff= 1, Byte mode= 0
1540 11:07:54.319577 ==
1541 11:07:54.322817 3 1 0 |3534 3636 |(11 11)(0 0) |(0 0)(0 0)| 0
1542 11:07:54.325954 3 1 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1543 11:07:54.332424 3 1 8 |3534 3535 |(11 11)(11 11) |(0 0)(0 0)| 0
1544 11:07:54.336147 3 1 12 |3534 3535 |(11 11)(1 1) |(1 1)(1 1)| 0
1545 11:07:54.339488 3 1 16 |3534 2120 |(11 11)(11 11) |(1 1)(1 1)| 0
1546 11:07:54.342557 3 1 20 |3534 3636 |(11 11)(0 0) |(0 0)(1 1)| 0
1547 11:07:54.349762 3 1 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1548 11:07:54.352451 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1549 11:07:54.355782 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1550 11:07:54.363543 3 2 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1551 11:07:54.365683 3 2 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1552 11:07:54.369506 3 2 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1553 11:07:54.375940 3 2 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1554 11:07:54.379363 3 2 20 |3d3d 201 |(11 11)(11 11) |(1 1)(0 1)| 0
1555 11:07:54.382723 3 2 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 11:07:54.385964 3 2 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1557 11:07:54.392519 3 3 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 11:07:54.396407 3 3 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 11:07:54.399300 3 3 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 11:07:54.405992 3 3 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 11:07:54.409534 3 3 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 11:07:54.412869 3 3 20 |504 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1563 11:07:54.419201 3 3 24 |3534 504 |(11 11)(11 11) |(1 1)(1 1)| 0
1564 11:07:54.423088 [Byte 0] Lead/lag Transition tap number (1)
1565 11:07:54.426309 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1566 11:07:54.430137 [Byte 1] Lead/lag Transition tap number (1)
1567 11:07:54.432799 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1568 11:07:54.440028 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1569 11:07:54.442678 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1570 11:07:54.446248 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
1571 11:07:54.452816 3 4 16 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1572 11:07:54.456097 3 4 20 |3d3d b0a |(11 11)(11 11) |(1 1)(1 1)| 0
1573 11:07:54.459265 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1574 11:07:54.465994 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1575 11:07:54.469443 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1576 11:07:54.473157 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1577 11:07:54.476274 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1578 11:07:54.482774 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1579 11:07:54.486457 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1580 11:07:54.489659 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1581 11:07:54.496309 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1582 11:07:54.499504 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1583 11:07:54.502491 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1584 11:07:54.509182 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1585 11:07:54.513371 [Byte 0] Lead/lag falling Transition (3, 6, 4)
1586 11:07:54.516082 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1587 11:07:54.520038 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1588 11:07:54.526724 [Byte 0] Lead/lag Transition tap number (3)
1589 11:07:54.529350 [Byte 1] Lead/lag falling Transition (3, 6, 12)
1590 11:07:54.533643 3 6 16 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1591 11:07:54.536222 [Byte 1] Lead/lag Transition tap number (2)
1592 11:07:54.542951 3 6 20 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1593 11:07:54.543403 [Byte 0]First pass (3, 6, 20)
1594 11:07:54.549437 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1595 11:07:54.549822 [Byte 1]First pass (3, 6, 24)
1596 11:07:54.556061 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1597 11:07:54.559870 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1598 11:07:54.563198 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1599 11:07:54.566030 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1600 11:07:54.569452 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1601 11:07:54.576651 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1602 11:07:54.579391 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1603 11:07:54.583272 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1604 11:07:54.586248 All bytes gating window > 1UI, Early break!
1605 11:07:54.586631
1606 11:07:54.589861 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
1607 11:07:54.590286
1608 11:07:54.592864 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 16)
1609 11:07:54.593351
1610 11:07:54.596059
1611 11:07:54.596437
1612 11:07:54.599564 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
1613 11:07:54.599992
1614 11:07:54.603050 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
1615 11:07:54.603431
1616 11:07:54.603721
1617 11:07:54.606148 Write Rank1 MR1 =0x56
1618 11:07:54.606529
1619 11:07:54.609829 best RODT dly(2T, 0.5T) = (2, 3)
1620 11:07:54.610242
1621 11:07:54.613110 best RODT dly(2T, 0.5T) = (2, 3)
1622 11:07:54.613611 ==
1623 11:07:54.616548 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1624 11:07:54.620431 fsp= 1, odt_onoff= 1, Byte mode= 0
1625 11:07:54.620855 ==
1626 11:07:54.623345 Start DQ dly to find pass range UseTestEngine =0
1627 11:07:54.626440 x-axis: bit #, y-axis: DQ dly (-127~63)
1628 11:07:54.629616 RX Vref Scan = 0
1629 11:07:54.633044 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1630 11:07:54.636560 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1631 11:07:54.639809 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1632 11:07:54.640290 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1633 11:07:54.643276 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1634 11:07:54.646469 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1635 11:07:54.650290 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1636 11:07:54.652883 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1637 11:07:54.656907 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1638 11:07:54.659551 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1639 11:07:54.662860 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1640 11:07:54.666353 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1641 11:07:54.666737 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1642 11:07:54.669621 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1643 11:07:54.673044 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1644 11:07:54.676635 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1645 11:07:54.679622 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1646 11:07:54.683125 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1647 11:07:54.686465 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1648 11:07:54.687044 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1649 11:07:54.689808 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1650 11:07:54.693781 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1651 11:07:54.696427 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1652 11:07:54.700708 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1653 11:07:54.703168 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1654 11:07:54.703561 -1, [0] xxxxxxxx xxxxxxxx [MSB]
1655 11:07:54.706597 0, [0] xxxxxxxx xxxxxxxx [MSB]
1656 11:07:54.710285 1, [0] xxxxxxxx xxxxxxxx [MSB]
1657 11:07:54.713913 2, [0] xxxoxxxx xxxxxxxx [MSB]
1658 11:07:54.716886 3, [0] xxxoxoxx oxxoxxxx [MSB]
1659 11:07:54.719833 4, [0] xxxoxoxx oxxoxxxx [MSB]
1660 11:07:54.720304 5, [0] xxxoxooo ooxoxxxx [MSB]
1661 11:07:54.723247 6, [0] xxxoxooo ooxooxxx [MSB]
1662 11:07:54.726499 7, [0] xoxooooo ooxoooox [MSB]
1663 11:07:54.730160 8, [0] oooooooo ooxoooox [MSB]
1664 11:07:54.733291 9, [0] oooooooo ooxooooo [MSB]
1665 11:07:54.736756 10, [0] oooooooo ooxooooo [MSB]
1666 11:07:54.740032 32, [0] oooooooo oooooooo [MSB]
1667 11:07:54.740473 33, [0] oooxoooo xooooooo [MSB]
1668 11:07:54.743282 34, [0] oooxoooo xooooooo [MSB]
1669 11:07:54.747208 35, [0] oooxoooo xooxoooo [MSB]
1670 11:07:54.749947 36, [0] oooxooxo xxoxxooo [MSB]
1671 11:07:54.753737 37, [0] oooxoxxo xxoxxxoo [MSB]
1672 11:07:54.756816 38, [0] oooxoxxo xxoxxxxo [MSB]
1673 11:07:54.757345 39, [0] oooxoxxx xxoxxxxo [MSB]
1674 11:07:54.760056 40, [0] oxoxxxxx xxoxxxxo [MSB]
1675 11:07:54.763073 41, [0] oxxxxxxx xxoxxxxx [MSB]
1676 11:07:54.766781 42, [0] xxxxxxxx xxoxxxxx [MSB]
1677 11:07:54.769863 43, [0] xxxxxxxx xxoxxxxx [MSB]
1678 11:07:54.773429 44, [0] xxxxxxxx xxxxxxxx [MSB]
1679 11:07:54.776977 iDelay=44, Bit 0, Center 24 (8 ~ 41) 34
1680 11:07:54.779721 iDelay=44, Bit 1, Center 23 (7 ~ 39) 33
1681 11:07:54.783406 iDelay=44, Bit 2, Center 24 (8 ~ 40) 33
1682 11:07:54.786653 iDelay=44, Bit 3, Center 17 (2 ~ 32) 31
1683 11:07:54.789947 iDelay=44, Bit 4, Center 23 (7 ~ 39) 33
1684 11:07:54.793000 iDelay=44, Bit 5, Center 19 (3 ~ 36) 34
1685 11:07:54.796166 iDelay=44, Bit 6, Center 20 (5 ~ 35) 31
1686 11:07:54.799529 iDelay=44, Bit 7, Center 21 (5 ~ 38) 34
1687 11:07:54.802963 iDelay=44, Bit 8, Center 17 (3 ~ 32) 30
1688 11:07:54.806131 iDelay=44, Bit 9, Center 20 (5 ~ 35) 31
1689 11:07:54.813570 iDelay=44, Bit 10, Center 27 (11 ~ 43) 33
1690 11:07:54.816650 iDelay=44, Bit 11, Center 18 (3 ~ 34) 32
1691 11:07:54.819359 iDelay=44, Bit 12, Center 20 (6 ~ 35) 30
1692 11:07:54.823677 iDelay=44, Bit 13, Center 21 (7 ~ 36) 30
1693 11:07:54.826231 iDelay=44, Bit 14, Center 22 (7 ~ 37) 31
1694 11:07:54.829626 iDelay=44, Bit 15, Center 24 (9 ~ 40) 32
1695 11:07:54.830005 ==
1696 11:07:54.836422 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1697 11:07:54.836809 fsp= 1, odt_onoff= 1, Byte mode= 0
1698 11:07:54.839822 ==
1699 11:07:54.840282 DQS Delay:
1700 11:07:54.840581 DQS0 = 0, DQS1 = 0
1701 11:07:54.843761 DQM Delay:
1702 11:07:54.844141 DQM0 = 21, DQM1 = 21
1703 11:07:54.846190 DQ Delay:
1704 11:07:54.846583 DQ0 =24, DQ1 =23, DQ2 =24, DQ3 =17
1705 11:07:54.850060 DQ4 =23, DQ5 =19, DQ6 =20, DQ7 =21
1706 11:07:54.853433 DQ8 =17, DQ9 =20, DQ10 =27, DQ11 =18
1707 11:07:54.856868 DQ12 =20, DQ13 =21, DQ14 =22, DQ15 =24
1708 11:07:54.857301
1709 11:07:54.859721
1710 11:07:54.860098 DramC Write-DBI off
1711 11:07:54.860394 ==
1712 11:07:54.866670 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1713 11:07:54.870281 fsp= 1, odt_onoff= 1, Byte mode= 0
1714 11:07:54.870724 ==
1715 11:07:54.873412 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1716 11:07:54.873794
1717 11:07:54.877183 Begin, DQ Scan Range 921~1177
1718 11:07:54.877570
1719 11:07:54.877864
1720 11:07:54.878135 TX Vref Scan disable
1721 11:07:54.883427 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1722 11:07:54.886511 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1723 11:07:54.889974 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1724 11:07:54.893506 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1725 11:07:54.896866 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1726 11:07:54.900398 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1727 11:07:54.903435 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1728 11:07:54.906573 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1729 11:07:54.910041 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1730 11:07:54.914103 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1731 11:07:54.916681 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1732 11:07:54.920533 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1733 11:07:54.923870 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1734 11:07:54.926673 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1735 11:07:54.930540 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1736 11:07:54.933355 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1737 11:07:54.936570 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1738 11:07:54.940343 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1739 11:07:54.944005 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1740 11:07:54.950231 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1741 11:07:54.953880 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1742 11:07:54.957024 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1743 11:07:54.960367 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1744 11:07:54.964193 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1745 11:07:54.968032 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1746 11:07:54.970336 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1747 11:07:54.974052 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1748 11:07:54.977049 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1749 11:07:54.980537 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1750 11:07:54.983706 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1751 11:07:54.987027 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1752 11:07:54.990684 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1753 11:07:54.993416 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1754 11:07:54.997317 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1755 11:07:55.000848 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1756 11:07:55.003627 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1757 11:07:55.010220 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1758 11:07:55.013674 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1759 11:07:55.017514 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1760 11:07:55.020473 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1761 11:07:55.024028 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1762 11:07:55.027006 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1763 11:07:55.030382 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1764 11:07:55.033535 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1765 11:07:55.037414 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1766 11:07:55.040377 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1767 11:07:55.044470 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1768 11:07:55.046893 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1769 11:07:55.050461 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1770 11:07:55.053597 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
1771 11:07:55.057004 971 |3 6 11|[0] xxxxxxxx oxxoxxxx [MSB]
1772 11:07:55.061067 972 |3 6 12|[0] xxxxxxxx oxxoxxxx [MSB]
1773 11:07:55.064098 973 |3 6 13|[0] xxxxxxxx ooxooxxx [MSB]
1774 11:07:55.066938 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1775 11:07:55.070496 975 |3 6 15|[0] xxxxxxxx ooxoooox [MSB]
1776 11:07:55.074073 976 |3 6 16|[0] xxxxxxxx ooxoooox [MSB]
1777 11:07:55.077238 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1778 11:07:55.084191 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
1779 11:07:55.086762 979 |3 6 19|[0] xxxoxoox oooooooo [MSB]
1780 11:07:55.090863 980 |3 6 20|[0] xxxoooox oooooooo [MSB]
1781 11:07:55.094258 981 |3 6 21|[0] xxxoooox oooooooo [MSB]
1782 11:07:55.097423 982 |3 6 22|[0] xooooooo oooooooo [MSB]
1783 11:07:55.100478 990 |3 6 30|[0] oooooooo xooxoooo [MSB]
1784 11:07:55.103646 991 |3 6 31|[0] oooooooo xooxoooo [MSB]
1785 11:07:55.107292 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1786 11:07:55.110266 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1787 11:07:55.113813 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1788 11:07:55.117099 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1789 11:07:55.120984 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1790 11:07:55.127956 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1791 11:07:55.130683 998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]
1792 11:07:55.133807 999 |3 6 39|[0] oooxoxxo xxxxxxxx [MSB]
1793 11:07:55.137480 1000 |3 6 40|[0] oooxoxxx xxxxxxxx [MSB]
1794 11:07:55.140790 1001 |3 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
1795 11:07:55.144455 Byte0, DQ PI dly=988, DQM PI dly= 988
1796 11:07:55.146973 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
1797 11:07:55.147331
1798 11:07:55.150411 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
1799 11:07:55.153920
1800 11:07:55.157428 Byte1, DQ PI dly=982, DQM PI dly= 982
1801 11:07:55.160669 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1802 11:07:55.161094
1803 11:07:55.164472 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1804 11:07:55.164935
1805 11:07:55.165366 ==
1806 11:07:55.170230 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1807 11:07:55.173417 fsp= 1, odt_onoff= 1, Byte mode= 0
1808 11:07:55.173807 ==
1809 11:07:55.177112 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1810 11:07:55.177580
1811 11:07:55.180406 Begin, DQ Scan Range 958~1022
1812 11:07:55.183671 Write Rank1 MR14 =0x0
1813 11:07:55.190284
1814 11:07:55.190672 CH=0, VrefRange= 0, VrefLevel = 0
1815 11:07:55.197698 TX Bit0 (985~998) 14 991, Bit8 (973~985) 13 979,
1816 11:07:55.200750 TX Bit1 (984~995) 12 989, Bit9 (974~988) 15 981,
1817 11:07:55.207340 TX Bit2 (985~996) 12 990, Bit10 (980~993) 14 986,
1818 11:07:55.211193 TX Bit3 (980~988) 9 984, Bit11 (974~984) 11 979,
1819 11:07:55.213723 TX Bit4 (984~996) 13 990, Bit12 (976~988) 13 982,
1820 11:07:55.220298 TX Bit5 (981~993) 13 987, Bit13 (976~988) 13 982,
1821 11:07:55.223992 TX Bit6 (981~994) 14 987, Bit14 (976~989) 14 982,
1822 11:07:55.227317 TX Bit7 (985~994) 10 989, Bit15 (981~992) 12 986,
1823 11:07:55.227707
1824 11:07:55.230574 Write Rank1 MR14 =0x2
1825 11:07:55.239042
1826 11:07:55.239506 CH=0, VrefRange= 0, VrefLevel = 2
1827 11:07:55.245412 TX Bit0 (985~998) 14 991, Bit8 (973~986) 14 979,
1828 11:07:55.249055 TX Bit1 (984~996) 13 990, Bit9 (975~988) 14 981,
1829 11:07:55.255407 TX Bit2 (985~997) 13 991, Bit10 (980~994) 15 987,
1830 11:07:55.259251 TX Bit3 (979~989) 11 984, Bit11 (974~985) 12 979,
1831 11:07:55.262371 TX Bit4 (983~996) 14 989, Bit12 (976~988) 13 982,
1832 11:07:55.269417 TX Bit5 (980~993) 14 986, Bit13 (975~988) 14 981,
1833 11:07:55.272444 TX Bit6 (982~994) 13 988, Bit14 (976~989) 14 982,
1834 11:07:55.275184 TX Bit7 (984~994) 11 989, Bit15 (980~992) 13 986,
1835 11:07:55.275629
1836 11:07:55.278571 Write Rank1 MR14 =0x4
1837 11:07:55.287093
1838 11:07:55.287471 CH=0, VrefRange= 0, VrefLevel = 4
1839 11:07:55.293752 TX Bit0 (985~999) 15 992, Bit8 (972~986) 15 979,
1840 11:07:55.296953 TX Bit1 (984~997) 14 990, Bit9 (974~989) 16 981,
1841 11:07:55.303773 TX Bit2 (985~998) 14 991, Bit10 (979~994) 16 986,
1842 11:07:55.306851 TX Bit3 (979~991) 13 985, Bit11 (974~986) 13 980,
1843 11:07:55.310362 TX Bit4 (983~997) 15 990, Bit12 (975~988) 14 981,
1844 11:07:55.317593 TX Bit5 (980~994) 15 987, Bit13 (975~989) 15 982,
1845 11:07:55.320215 TX Bit6 (981~995) 15 988, Bit14 (976~991) 16 983,
1846 11:07:55.323501 TX Bit7 (985~995) 11 990, Bit15 (980~993) 14 986,
1847 11:07:55.326661
1848 11:07:55.327037 Write Rank1 MR14 =0x6
1849 11:07:55.335942
1850 11:07:55.336395 CH=0, VrefRange= 0, VrefLevel = 6
1851 11:07:55.342247 TX Bit0 (985~1000) 16 992, Bit8 (972~987) 16 979,
1852 11:07:55.345896 TX Bit1 (983~997) 15 990, Bit9 (974~990) 17 982,
1853 11:07:55.352381 TX Bit2 (985~999) 15 992, Bit10 (979~995) 17 987,
1854 11:07:55.356440 TX Bit3 (979~992) 14 985, Bit11 (973~987) 15 980,
1855 11:07:55.359617 TX Bit4 (982~998) 17 990, Bit12 (975~989) 15 982,
1856 11:07:55.366062 TX Bit5 (980~994) 15 987, Bit13 (975~989) 15 982,
1857 11:07:55.369637 TX Bit6 (980~995) 16 987, Bit14 (975~991) 17 983,
1858 11:07:55.373100 TX Bit7 (984~995) 12 989, Bit15 (979~994) 16 986,
1859 11:07:55.373647
1860 11:07:55.376322 Write Rank1 MR14 =0x8
1861 11:07:55.385204
1862 11:07:55.385740 CH=0, VrefRange= 0, VrefLevel = 8
1863 11:07:55.391696 TX Bit0 (985~1001) 17 993, Bit8 (972~987) 16 979,
1864 11:07:55.394460 TX Bit1 (983~998) 16 990, Bit9 (973~990) 18 981,
1865 11:07:55.401450 TX Bit2 (984~999) 16 991, Bit10 (979~995) 17 987,
1866 11:07:55.404420 TX Bit3 (978~992) 15 985, Bit11 (973~987) 15 980,
1867 11:07:55.407877 TX Bit4 (982~998) 17 990, Bit12 (974~989) 16 981,
1868 11:07:55.415291 TX Bit5 (980~994) 15 987, Bit13 (975~989) 15 982,
1869 11:07:55.418007 TX Bit6 (980~996) 17 988, Bit14 (975~992) 18 983,
1870 11:07:55.421395 TX Bit7 (983~996) 14 989, Bit15 (978~995) 18 986,
1871 11:07:55.421870
1872 11:07:55.424792 Write Rank1 MR14 =0xa
1873 11:07:55.433342
1874 11:07:55.436502 CH=0, VrefRange= 0, VrefLevel = 10
1875 11:07:55.440385 TX Bit0 (984~1000) 17 992, Bit8 (971~988) 18 979,
1876 11:07:55.443288 TX Bit1 (983~999) 17 991, Bit9 (973~990) 18 981,
1877 11:07:55.450023 TX Bit2 (984~1000) 17 992, Bit10 (978~996) 19 987,
1878 11:07:55.453647 TX Bit3 (978~993) 16 985, Bit11 (972~988) 17 980,
1879 11:07:55.456672 TX Bit4 (981~999) 19 990, Bit12 (974~990) 17 982,
1880 11:07:55.463550 TX Bit5 (980~995) 16 987, Bit13 (974~990) 17 982,
1881 11:07:55.467559 TX Bit6 (980~996) 17 988, Bit14 (975~993) 19 984,
1882 11:07:55.470260 TX Bit7 (983~997) 15 990, Bit15 (978~995) 18 986,
1883 11:07:55.470685
1884 11:07:55.473792 Write Rank1 MR14 =0xc
1885 11:07:55.482617
1886 11:07:55.486137 CH=0, VrefRange= 0, VrefLevel = 12
1887 11:07:55.489297 TX Bit0 (983~1002) 20 992, Bit8 (970~988) 19 979,
1888 11:07:55.492822 TX Bit1 (982~1000) 19 991, Bit9 (973~991) 19 982,
1889 11:07:55.499055 TX Bit2 (983~1000) 18 991, Bit10 (978~996) 19 987,
1890 11:07:55.502514 TX Bit3 (978~993) 16 985, Bit11 (972~988) 17 980,
1891 11:07:55.505910 TX Bit4 (981~1000) 20 990, Bit12 (974~990) 17 982,
1892 11:07:55.512625 TX Bit5 (980~995) 16 987, Bit13 (974~991) 18 982,
1893 11:07:55.516344 TX Bit6 (980~997) 18 988, Bit14 (975~993) 19 984,
1894 11:07:55.522305 TX Bit7 (982~998) 17 990, Bit15 (978~995) 18 986,
1895 11:07:55.522829
1896 11:07:55.523163 Write Rank1 MR14 =0xe
1897 11:07:55.531594
1898 11:07:55.534949 CH=0, VrefRange= 0, VrefLevel = 14
1899 11:07:55.538553 TX Bit0 (983~1002) 20 992, Bit8 (970~988) 19 979,
1900 11:07:55.542267 TX Bit1 (983~1000) 18 991, Bit9 (972~991) 20 981,
1901 11:07:55.549077 TX Bit2 (983~1001) 19 992, Bit10 (977~996) 20 986,
1902 11:07:55.551936 TX Bit3 (978~993) 16 985, Bit11 (972~989) 18 980,
1903 11:07:55.555438 TX Bit4 (981~1000) 20 990, Bit12 (973~991) 19 982,
1904 11:07:55.562159 TX Bit5 (979~996) 18 987, Bit13 (974~991) 18 982,
1905 11:07:55.565591 TX Bit6 (979~998) 20 988, Bit14 (974~994) 21 984,
1906 11:07:55.568785 TX Bit7 (983~998) 16 990, Bit15 (978~996) 19 987,
1907 11:07:55.571697
1908 11:07:55.572073 Write Rank1 MR14 =0x10
1909 11:07:55.581465
1910 11:07:55.585595 CH=0, VrefRange= 0, VrefLevel = 16
1911 11:07:55.587924 TX Bit0 (984~1003) 20 993, Bit8 (970~989) 20 979,
1912 11:07:55.591378 TX Bit1 (981~1001) 21 991, Bit9 (973~992) 20 982,
1913 11:07:55.598270 TX Bit2 (982~1001) 20 991, Bit10 (977~996) 20 986,
1914 11:07:55.601884 TX Bit3 (978~994) 17 986, Bit11 (971~989) 19 980,
1915 11:07:55.604591 TX Bit4 (980~1001) 22 990, Bit12 (973~992) 20 982,
1916 11:07:55.611469 TX Bit5 (979~996) 18 987, Bit13 (974~992) 19 983,
1917 11:07:55.615276 TX Bit6 (979~998) 20 988, Bit14 (974~994) 21 984,
1918 11:07:55.621372 TX Bit7 (982~999) 18 990, Bit15 (977~996) 20 986,
1919 11:07:55.621756
1920 11:07:55.622048 Write Rank1 MR14 =0x12
1921 11:07:55.631110
1922 11:07:55.634184 CH=0, VrefRange= 0, VrefLevel = 18
1923 11:07:55.638336 TX Bit0 (983~1003) 21 993, Bit8 (969~990) 22 979,
1924 11:07:55.641305 TX Bit1 (982~1001) 20 991, Bit9 (972~993) 22 982,
1925 11:07:55.647831 TX Bit2 (983~1002) 20 992, Bit10 (976~997) 22 986,
1926 11:07:55.650852 TX Bit3 (978~994) 17 986, Bit11 (971~990) 20 980,
1927 11:07:55.654271 TX Bit4 (980~1002) 23 991, Bit12 (973~992) 20 982,
1928 11:07:55.661265 TX Bit5 (979~997) 19 988, Bit13 (973~993) 21 983,
1929 11:07:55.664571 TX Bit6 (979~999) 21 989, Bit14 (974~995) 22 984,
1930 11:07:55.670843 TX Bit7 (981~1000) 20 990, Bit15 (976~996) 21 986,
1931 11:07:55.671315
1932 11:07:55.671639 Write Rank1 MR14 =0x14
1933 11:07:55.680884
1934 11:07:55.684016 CH=0, VrefRange= 0, VrefLevel = 20
1935 11:07:55.687596 TX Bit0 (983~1004) 22 993, Bit8 (969~990) 22 979,
1936 11:07:55.690630 TX Bit1 (981~1002) 22 991, Bit9 (972~994) 23 983,
1937 11:07:55.697772 TX Bit2 (982~1003) 22 992, Bit10 (976~997) 22 986,
1938 11:07:55.701642 TX Bit3 (978~994) 17 986, Bit11 (971~990) 20 980,
1939 11:07:55.704806 TX Bit4 (980~1002) 23 991, Bit12 (972~993) 22 982,
1940 11:07:55.710807 TX Bit5 (979~997) 19 988, Bit13 (973~994) 22 983,
1941 11:07:55.714557 TX Bit6 (979~999) 21 989, Bit14 (973~995) 23 984,
1942 11:07:55.721077 TX Bit7 (981~1001) 21 991, Bit15 (976~997) 22 986,
1943 11:07:55.721489
1944 11:07:55.721782 Write Rank1 MR14 =0x16
1945 11:07:55.730948
1946 11:07:55.733863 CH=0, VrefRange= 0, VrefLevel = 22
1947 11:07:55.737767 TX Bit0 (982~1004) 23 993, Bit8 (968~991) 24 979,
1948 11:07:55.741363 TX Bit1 (981~1003) 23 992, Bit9 (971~994) 24 982,
1949 11:07:55.747374 TX Bit2 (982~1003) 22 992, Bit10 (976~997) 22 986,
1950 11:07:55.750676 TX Bit3 (978~995) 18 986, Bit11 (970~990) 21 980,
1951 11:07:55.753804 TX Bit4 (980~1003) 24 991, Bit12 (973~994) 22 983,
1952 11:07:55.760513 TX Bit5 (979~998) 20 988, Bit13 (973~994) 22 983,
1953 11:07:55.763957 TX Bit6 (979~1000) 22 989, Bit14 (973~995) 23 984,
1954 11:07:55.770801 TX Bit7 (981~1001) 21 991, Bit15 (976~997) 22 986,
1955 11:07:55.771188
1956 11:07:55.771486 Write Rank1 MR14 =0x18
1957 11:07:55.780957
1958 11:07:55.781414 CH=0, VrefRange= 0, VrefLevel = 24
1959 11:07:55.788317 TX Bit0 (981~1005) 25 993, Bit8 (969~991) 23 980,
1960 11:07:55.790760 TX Bit1 (980~1003) 24 991, Bit9 (972~995) 24 983,
1961 11:07:55.797968 TX Bit2 (981~1004) 24 992, Bit10 (976~998) 23 987,
1962 11:07:55.800986 TX Bit3 (977~995) 19 986, Bit11 (969~991) 23 980,
1963 11:07:55.804513 TX Bit4 (980~1003) 24 991, Bit12 (972~994) 23 983,
1964 11:07:55.811276 TX Bit5 (979~999) 21 989, Bit13 (972~995) 24 983,
1965 11:07:55.814086 TX Bit6 (979~1001) 23 990, Bit14 (973~996) 24 984,
1966 11:07:55.820853 TX Bit7 (980~1001) 22 990, Bit15 (976~997) 22 986,
1967 11:07:55.821253
1968 11:07:55.821545 Write Rank1 MR14 =0x1a
1969 11:07:55.831452
1970 11:07:55.835188 CH=0, VrefRange= 0, VrefLevel = 26
1971 11:07:55.837601 TX Bit0 (981~1006) 26 993, Bit8 (968~992) 25 980,
1972 11:07:55.841317 TX Bit1 (980~1004) 25 992, Bit9 (970~994) 25 982,
1973 11:07:55.848504 TX Bit2 (981~1004) 24 992, Bit10 (975~998) 24 986,
1974 11:07:55.851387 TX Bit3 (977~996) 20 986, Bit11 (969~992) 24 980,
1975 11:07:55.854531 TX Bit4 (980~1004) 25 992, Bit12 (971~995) 25 983,
1976 11:07:55.861368 TX Bit5 (978~999) 22 988, Bit13 (972~995) 24 983,
1977 11:07:55.864438 TX Bit6 (979~1001) 23 990, Bit14 (972~996) 25 984,
1978 11:07:55.871402 TX Bit7 (981~1002) 22 991, Bit15 (976~997) 22 986,
1979 11:07:55.871893
1980 11:07:55.872220 Write Rank1 MR14 =0x1c
1981 11:07:55.881489
1982 11:07:55.885204 CH=0, VrefRange= 0, VrefLevel = 28
1983 11:07:55.888236 TX Bit0 (981~1006) 26 993, Bit8 (968~993) 26 980,
1984 11:07:55.891674 TX Bit1 (980~1004) 25 992, Bit9 (971~994) 24 982,
1985 11:07:55.897907 TX Bit2 (981~1005) 25 993, Bit10 (975~998) 24 986,
1986 11:07:55.902083 TX Bit3 (977~996) 20 986, Bit11 (969~993) 25 981,
1987 11:07:55.904849 TX Bit4 (980~1004) 25 992, Bit12 (971~995) 25 983,
1988 11:07:55.912399 TX Bit5 (978~1000) 23 989, Bit13 (972~995) 24 983,
1989 11:07:55.914785 TX Bit6 (979~1002) 24 990, Bit14 (972~996) 25 984,
1990 11:07:55.921466 TX Bit7 (980~1003) 24 991, Bit15 (975~997) 23 986,
1991 11:07:55.921954
1992 11:07:55.922291 Write Rank1 MR14 =0x1e
1993 11:07:55.931993
1994 11:07:55.934866 CH=0, VrefRange= 0, VrefLevel = 30
1995 11:07:55.938565 TX Bit0 (980~1006) 27 993, Bit8 (968~992) 25 980,
1996 11:07:55.942096 TX Bit1 (980~1004) 25 992, Bit9 (971~994) 24 982,
1997 11:07:55.948738 TX Bit2 (981~1005) 25 993, Bit10 (975~998) 24 986,
1998 11:07:55.952849 TX Bit3 (977~996) 20 986, Bit11 (969~993) 25 981,
1999 11:07:55.957433 TX Bit4 (980~1005) 26 992, Bit12 (971~995) 25 983,
2000 11:07:55.961149 TX Bit5 (978~1001) 24 989, Bit13 (971~994) 24 982,
2001 11:07:55.967821 TX Bit6 (979~1002) 24 990, Bit14 (972~996) 25 984,
2002 11:07:55.970739 TX Bit7 (980~1003) 24 991, Bit15 (975~998) 24 986,
2003 11:07:55.971119
2004 11:07:55.974203 Write Rank1 MR14 =0x20
2005 11:07:55.982672
2006 11:07:55.983127 CH=0, VrefRange= 0, VrefLevel = 32
2007 11:07:55.988629 TX Bit0 (981~1005) 25 993, Bit8 (968~991) 24 979,
2008 11:07:55.991766 TX Bit1 (980~1003) 24 991, Bit9 (972~994) 23 983,
2009 11:07:55.999101 TX Bit2 (981~1005) 25 993, Bit10 (976~998) 23 987,
2010 11:07:56.002424 TX Bit3 (977~997) 21 987, Bit11 (969~993) 25 981,
2011 11:07:56.005062 TX Bit4 (981~1004) 24 992, Bit12 (972~995) 24 983,
2012 11:07:56.012220 TX Bit5 (978~1000) 23 989, Bit13 (970~994) 25 982,
2013 11:07:56.015449 TX Bit6 (979~1001) 23 990, Bit14 (972~996) 25 984,
2014 11:07:56.022304 TX Bit7 (980~1004) 25 992, Bit15 (975~998) 24 986,
2015 11:07:56.022732
2016 11:07:56.023027 Write Rank1 MR14 =0x22
2017 11:07:56.032266
2018 11:07:56.032697 CH=0, VrefRange= 0, VrefLevel = 34
2019 11:07:56.040310 TX Bit0 (981~1005) 25 993, Bit8 (968~991) 24 979,
2020 11:07:56.044640 TX Bit1 (980~1003) 24 991, Bit9 (972~994) 23 983,
2021 11:07:56.048920 TX Bit2 (981~1005) 25 993, Bit10 (976~998) 23 987,
2022 11:07:56.053062 TX Bit3 (977~997) 21 987, Bit11 (969~993) 25 981,
2023 11:07:56.056247 TX Bit4 (981~1004) 24 992, Bit12 (972~995) 24 983,
2024 11:07:56.063469 TX Bit5 (978~1000) 23 989, Bit13 (970~994) 25 982,
2025 11:07:56.066583 TX Bit6 (979~1001) 23 990, Bit14 (972~996) 25 984,
2026 11:07:56.069701 TX Bit7 (980~1004) 25 992, Bit15 (975~998) 24 986,
2027 11:07:56.070132
2028 11:07:56.072717 Write Rank1 MR14 =0x24
2029 11:07:56.081916
2030 11:07:56.085852 CH=0, VrefRange= 0, VrefLevel = 36
2031 11:07:56.089018 TX Bit0 (981~1005) 25 993, Bit8 (968~991) 24 979,
2032 11:07:56.092118 TX Bit1 (980~1003) 24 991, Bit9 (972~994) 23 983,
2033 11:07:56.098936 TX Bit2 (981~1005) 25 993, Bit10 (976~998) 23 987,
2034 11:07:56.102503 TX Bit3 (977~997) 21 987, Bit11 (969~993) 25 981,
2035 11:07:56.106005 TX Bit4 (981~1004) 24 992, Bit12 (972~995) 24 983,
2036 11:07:56.112305 TX Bit5 (978~1000) 23 989, Bit13 (970~994) 25 982,
2037 11:07:56.115420 TX Bit6 (979~1001) 23 990, Bit14 (972~996) 25 984,
2038 11:07:56.120163 TX Bit7 (980~1004) 25 992, Bit15 (975~998) 24 986,
2039 11:07:56.120569
2040 11:07:56.120871
2041 11:07:56.123108 TX Vref found, early break! 356< 363
2042 11:07:56.129978 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =833/100 ps
2043 11:07:56.133296 u1DelayCellOfst[0]=7 cells (6 PI)
2044 11:07:56.135973 u1DelayCellOfst[1]=4 cells (4 PI)
2045 11:07:56.139358 u1DelayCellOfst[2]=7 cells (6 PI)
2046 11:07:56.139549 u1DelayCellOfst[3]=0 cells (0 PI)
2047 11:07:56.142821 u1DelayCellOfst[4]=5 cells (5 PI)
2048 11:07:56.146304 u1DelayCellOfst[5]=2 cells (2 PI)
2049 11:07:56.149757 u1DelayCellOfst[6]=3 cells (3 PI)
2050 11:07:56.152949 u1DelayCellOfst[7]=5 cells (5 PI)
2051 11:07:56.155724 Byte0, DQ PI dly=987, DQM PI dly= 990
2052 11:07:56.159525 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
2053 11:07:56.163259
2054 11:07:56.165903 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
2055 11:07:56.165989
2056 11:07:56.169729 u1DelayCellOfst[8]=0 cells (0 PI)
2057 11:07:56.172761 u1DelayCellOfst[9]=4 cells (4 PI)
2058 11:07:56.176196 u1DelayCellOfst[10]=9 cells (8 PI)
2059 11:07:56.179550 u1DelayCellOfst[11]=2 cells (2 PI)
2060 11:07:56.179675 u1DelayCellOfst[12]=4 cells (4 PI)
2061 11:07:56.182508 u1DelayCellOfst[13]=3 cells (3 PI)
2062 11:07:56.185812 u1DelayCellOfst[14]=5 cells (5 PI)
2063 11:07:56.189321 u1DelayCellOfst[15]=8 cells (7 PI)
2064 11:07:56.192177 Byte1, DQ PI dly=979, DQM PI dly= 983
2065 11:07:56.199424 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2066 11:07:56.199514
2067 11:07:56.202407 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2068 11:07:56.202504
2069 11:07:56.206259 Write Rank1 MR14 =0x20
2070 11:07:56.206427
2071 11:07:56.206514 Final TX Range 0 Vref 32
2072 11:07:56.206594
2073 11:07:56.212283 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2074 11:07:56.212459
2075 11:07:56.219533 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2076 11:07:56.226523 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2077 11:07:56.233055 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2078 11:07:56.236398 Write Rank1 MR3 =0xb0
2079 11:07:56.239143 DramC Write-DBI on
2080 11:07:56.239425 ==
2081 11:07:56.242874 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2082 11:07:56.246458 fsp= 1, odt_onoff= 1, Byte mode= 0
2083 11:07:56.246848 ==
2084 11:07:56.250414 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2085 11:07:56.250883
2086 11:07:56.252851 Begin, DQ Scan Range 703~767
2087 11:07:56.253258
2088 11:07:56.253557
2089 11:07:56.256341 TX Vref Scan disable
2090 11:07:56.259256 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2091 11:07:56.263455 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2092 11:07:56.266544 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2093 11:07:56.269677 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2094 11:07:56.272910 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2095 11:07:56.276315 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2096 11:07:56.280094 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2097 11:07:56.283768 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2098 11:07:56.285906 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2099 11:07:56.289668 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2100 11:07:56.293002 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2101 11:07:56.296147 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2102 11:07:56.299617 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2103 11:07:56.303158 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2104 11:07:56.310297 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2105 11:07:56.313096 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2106 11:07:56.316323 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2107 11:07:56.319904 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2108 11:07:56.323756 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2109 11:07:56.326283 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2110 11:07:56.334058 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2111 11:07:56.337425 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2112 11:07:56.340756 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2113 11:07:56.343873 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2114 11:07:56.347050 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2115 11:07:56.350406 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2116 11:07:56.353406 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2117 11:07:56.357478 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2118 11:07:56.360263 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2119 11:07:56.363633 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
2120 11:07:56.367668 Byte0, DQ PI dly=736, DQM PI dly= 736
2121 11:07:56.370813 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
2122 11:07:56.371277
2123 11:07:56.377268 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
2124 11:07:56.377708
2125 11:07:56.380893 Byte1, DQ PI dly=728, DQM PI dly= 728
2126 11:07:56.383792 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2127 11:07:56.384191
2128 11:07:56.387183 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2129 11:07:56.387650
2130 11:07:56.393705 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2131 11:07:56.401029 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2132 11:07:56.410645 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2133 11:07:56.411034 Write Rank1 MR3 =0x30
2134 11:07:56.414253 DramC Write-DBI off
2135 11:07:56.414711
2136 11:07:56.415007 [DATLAT]
2137 11:07:56.417080 Freq=1600, CH0 RK1, use_rxtx_scan=0
2138 11:07:56.417496
2139 11:07:56.421007 DATLAT Default: 0x10
2140 11:07:56.421423 7, 0xFFFF, sum=0
2141 11:07:56.423738 8, 0xFFFF, sum=0
2142 11:07:56.424124 9, 0xFFFF, sum=0
2143 11:07:56.424424 10, 0xFFFF, sum=0
2144 11:07:56.427460 11, 0xFFFF, sum=0
2145 11:07:56.427924 12, 0xFFFF, sum=0
2146 11:07:56.430473 13, 0xFFFF, sum=0
2147 11:07:56.430863 14, 0x0, sum=1
2148 11:07:56.434563 15, 0x0, sum=2
2149 11:07:56.434954 16, 0x0, sum=3
2150 11:07:56.437477 17, 0x0, sum=4
2151 11:07:56.440466 pattern=2 first_step=14 total pass=5 best_step=16
2152 11:07:56.440848 ==
2153 11:07:56.444189 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2154 11:07:56.447227 fsp= 1, odt_onoff= 1, Byte mode= 0
2155 11:07:56.451494 ==
2156 11:07:56.454230 Start DQ dly to find pass range UseTestEngine =1
2157 11:07:56.458019 x-axis: bit #, y-axis: DQ dly (-127~63)
2158 11:07:56.458492 RX Vref Scan = 0
2159 11:07:56.461006 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2160 11:07:56.464194 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2161 11:07:56.467750 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2162 11:07:56.470854 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2163 11:07:56.474422 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2164 11:07:56.477764 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2165 11:07:56.478231 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2166 11:07:56.480636 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2167 11:07:56.484917 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2168 11:07:56.487944 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2169 11:07:56.491423 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2170 11:07:56.494186 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2171 11:07:56.497827 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2172 11:07:56.501989 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2173 11:07:56.502380 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2174 11:07:56.504773 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2175 11:07:56.507799 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2176 11:07:56.511433 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2177 11:07:56.514881 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2178 11:07:56.517946 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2179 11:07:56.522068 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2180 11:07:56.522547 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2181 11:07:56.524333 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2182 11:07:56.528239 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2183 11:07:56.531236 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2184 11:07:56.534630 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2185 11:07:56.537813 0, [0] xxxxxxxx xxxxxxxx [MSB]
2186 11:07:56.538206 1, [0] xxxoxxxx xxxxxxxx [MSB]
2187 11:07:56.541265 2, [0] xxxoxxxx oxxxxxxx [MSB]
2188 11:07:56.544728 3, [0] xxxoxoxx oxxoxxxx [MSB]
2189 11:07:56.548035 4, [0] xxxoxoox oxxoxxxx [MSB]
2190 11:07:56.551462 5, [0] xxxoxoox ooxoxxxx [MSB]
2191 11:07:56.554434 6, [0] xxxoxoox ooxooxxx [MSB]
2192 11:07:56.554824 7, [0] xoxoxooo ooxooxox [MSB]
2193 11:07:56.558089 8, [0] xoxoxooo ooxoooox [MSB]
2194 11:07:56.561180 9, [0] oooooooo ooxooooo [MSB]
2195 11:07:56.565191 10, [0] oooooooo ooxooooo [MSB]
2196 11:07:56.568113 11, [0] oooooooo ooxooooo [MSB]
2197 11:07:56.571629 33, [0] oooxoooo xooxoooo [MSB]
2198 11:07:56.574933 34, [0] oooxoooo xooxoooo [MSB]
2199 11:07:56.577867 35, [0] oooxoxoo xxoxoxoo [MSB]
2200 11:07:56.581434 36, [0] oooxoxxo xxoxxxoo [MSB]
2201 11:07:56.584913 37, [0] oooxoxxo xxoxxxoo [MSB]
2202 11:07:56.585360 38, [0] oooxxxxx xxoxxxxo [MSB]
2203 11:07:56.587999 39, [0] oooxxxxx xxoxxxxx [MSB]
2204 11:07:56.591732 40, [0] xxxxxxxx xxoxxxxx [MSB]
2205 11:07:56.594386 41, [0] xxxxxxxx xxoxxxxx [MSB]
2206 11:07:56.597909 42, [0] xxxxxxxx xxxxxxxx [MSB]
2207 11:07:56.601573 iDelay=42, Bit 0, Center 24 (9 ~ 39) 31
2208 11:07:56.604470 iDelay=42, Bit 1, Center 23 (7 ~ 39) 33
2209 11:07:56.608364 iDelay=42, Bit 2, Center 24 (9 ~ 39) 31
2210 11:07:56.611310 iDelay=42, Bit 3, Center 16 (1 ~ 32) 32
2211 11:07:56.615220 iDelay=42, Bit 4, Center 23 (9 ~ 37) 29
2212 11:07:56.618898 iDelay=42, Bit 5, Center 18 (3 ~ 34) 32
2213 11:07:56.621344 iDelay=42, Bit 6, Center 19 (4 ~ 35) 32
2214 11:07:56.625029 iDelay=42, Bit 7, Center 22 (7 ~ 37) 31
2215 11:07:56.627997 iDelay=42, Bit 8, Center 17 (2 ~ 32) 31
2216 11:07:56.631657 iDelay=42, Bit 9, Center 19 (5 ~ 34) 30
2217 11:07:56.635024 iDelay=42, Bit 10, Center 26 (12 ~ 41) 30
2218 11:07:56.642240 iDelay=42, Bit 11, Center 17 (3 ~ 32) 30
2219 11:07:56.644690 iDelay=42, Bit 12, Center 20 (6 ~ 35) 30
2220 11:07:56.648279 iDelay=42, Bit 13, Center 21 (8 ~ 34) 27
2221 11:07:56.652415 iDelay=42, Bit 14, Center 22 (7 ~ 37) 31
2222 11:07:56.654940 iDelay=42, Bit 15, Center 23 (9 ~ 38) 30
2223 11:07:56.655583 ==
2224 11:07:56.658075 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2225 11:07:56.661776 fsp= 1, odt_onoff= 1, Byte mode= 0
2226 11:07:56.662165 ==
2227 11:07:56.664751 DQS Delay:
2228 11:07:56.665167 DQS0 = 0, DQS1 = 0
2229 11:07:56.668244 DQM Delay:
2230 11:07:56.668623 DQM0 = 21, DQM1 = 20
2231 11:07:56.668917 DQ Delay:
2232 11:07:56.671496 DQ0 =24, DQ1 =23, DQ2 =24, DQ3 =16
2233 11:07:56.675140 DQ4 =23, DQ5 =18, DQ6 =19, DQ7 =22
2234 11:07:56.678396 DQ8 =17, DQ9 =19, DQ10 =26, DQ11 =17
2235 11:07:56.681224 DQ12 =20, DQ13 =21, DQ14 =22, DQ15 =23
2236 11:07:56.681658
2237 11:07:56.682125
2238 11:07:56.682616
2239 11:07:56.685036 [DramC_TX_OE_Calibration] TA2
2240 11:07:56.688217 Original DQ_B0 (3 6) =30, OEN = 27
2241 11:07:56.691905 Original DQ_B1 (3 6) =30, OEN = 27
2242 11:07:56.695093 23, 0x0, End_B0=23 End_B1=23
2243 11:07:56.698320 24, 0x0, End_B0=24 End_B1=24
2244 11:07:56.698767 25, 0x0, End_B0=25 End_B1=25
2245 11:07:56.701586 26, 0x0, End_B0=26 End_B1=26
2246 11:07:56.705263 27, 0x0, End_B0=27 End_B1=27
2247 11:07:56.708051 28, 0x0, End_B0=28 End_B1=28
2248 11:07:56.711777 29, 0x0, End_B0=29 End_B1=29
2249 11:07:56.712163 30, 0x0, End_B0=30 End_B1=30
2250 11:07:56.715237 31, 0xFBFF, End_B0=30 End_B1=30
2251 11:07:56.721317 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2252 11:07:56.724880 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2253 11:07:56.728097
2254 11:07:56.728515
2255 11:07:56.728924 Write Rank1 MR23 =0x3f
2256 11:07:56.729410 [DQSOSC]
2257 11:07:56.738704 [DQSOSCAuto] RK1, (LSB)MR18= 0xbaba, (MSB)MR19= 0x202, tDQSOscB0 = 451 ps tDQSOscB1 = 451 ps
2258 11:07:56.746063 CH0_RK1: MR19=0x202, MR18=0xBABA, DQSOSC=451, MR23=63, INC=12, DEC=18
2259 11:07:56.746451 Write Rank1 MR23 =0x3f
2260 11:07:56.748210 [DQSOSC]
2261 11:07:56.755153 [DQSOSCAuto] RK1, (LSB)MR18= 0xb7b7, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
2262 11:07:56.758816 CH0 RK1: MR19=202, MR18=B7B7
2263 11:07:56.761692 [RxdqsGatingPostProcess] freq 1600
2264 11:07:56.764754 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2265 11:07:56.769019 Rank: 0
2266 11:07:56.771661 best DQS0 dly(2T, 0.5T) = (2, 6)
2267 11:07:56.772047 best DQS1 dly(2T, 0.5T) = (2, 6)
2268 11:07:56.775059 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2269 11:07:56.778122 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2270 11:07:56.781270 Rank: 1
2271 11:07:56.781789 best DQS0 dly(2T, 0.5T) = (2, 6)
2272 11:07:56.784649 best DQS1 dly(2T, 0.5T) = (2, 6)
2273 11:07:56.788143 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2274 11:07:56.791428 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2275 11:07:56.798008 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2276 11:07:56.801307 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2277 11:07:56.804949 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2278 11:07:56.808499 Write Rank0 MR13 =0x59
2279 11:07:56.808892 ==
2280 11:07:56.811368 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2281 11:07:56.815041 fsp= 1, odt_onoff= 1, Byte mode= 0
2282 11:07:56.815525 ==
2283 11:07:56.818970 === u2Vref_new: 0x56 --> 0x3a
2284 11:07:56.821492 === u2Vref_new: 0x58 --> 0x58
2285 11:07:56.824871 === u2Vref_new: 0x5a --> 0x5a
2286 11:07:56.828409 === u2Vref_new: 0x5c --> 0x78
2287 11:07:56.831689 === u2Vref_new: 0x5e --> 0x7a
2288 11:07:56.835610 === u2Vref_new: 0x60 --> 0x90
2289 11:07:56.838611 [CA 0] Center 38 (14~63) winsize 50
2290 11:07:56.841850 [CA 1] Center 37 (12~63) winsize 52
2291 11:07:56.845310 [CA 2] Center 35 (7~63) winsize 57
2292 11:07:56.848375 [CA 3] Center 35 (7~63) winsize 57
2293 11:07:56.851235 [CA 4] Center 34 (5~63) winsize 59
2294 11:07:56.854662 [CA 5] Center 29 (0~58) winsize 59
2295 11:07:56.855054
2296 11:07:56.857941 [CATrainingPosCal] consider 1 rank data
2297 11:07:56.861444 u2DelayCellTimex100 = 833/100 ps
2298 11:07:56.865043 CA0 delay=38 (14~63),Diff = 9 PI (10 cell)
2299 11:07:56.868098 CA1 delay=37 (12~63),Diff = 8 PI (9 cell)
2300 11:07:56.871479 CA2 delay=35 (7~63),Diff = 6 PI (7 cell)
2301 11:07:56.874944 CA3 delay=35 (7~63),Diff = 6 PI (7 cell)
2302 11:07:56.877692 CA4 delay=34 (5~63),Diff = 5 PI (5 cell)
2303 11:07:56.881027 CA5 delay=29 (0~58),Diff = 0 PI (0 cell)
2304 11:07:56.881433
2305 11:07:56.884512 CA PerBit enable=1, Macro0, CA PI delay=29
2306 11:07:56.887768 === u2Vref_new: 0x60 --> 0x90
2307 11:07:56.888148
2308 11:07:56.891327 Vref(ca) range 1: 32
2309 11:07:56.891699
2310 11:07:56.891986 CS Dly= 11 (42-0-32)
2311 11:07:56.894418 Write Rank0 MR13 =0xd8
2312 11:07:56.898143 Write Rank0 MR13 =0xd8
2313 11:07:56.898520 Write Rank0 MR12 =0x60
2314 11:07:56.901194 Write Rank1 MR13 =0x59
2315 11:07:56.901464 ==
2316 11:07:56.907462 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2317 11:07:56.911271 fsp= 1, odt_onoff= 1, Byte mode= 0
2318 11:07:56.911476 ==
2319 11:07:56.911636 === u2Vref_new: 0x56 --> 0x3a
2320 11:07:56.914665 === u2Vref_new: 0x58 --> 0x58
2321 11:07:56.918378 === u2Vref_new: 0x5a --> 0x5a
2322 11:07:56.921010 === u2Vref_new: 0x5c --> 0x78
2323 11:07:56.924568 === u2Vref_new: 0x5e --> 0x7a
2324 11:07:56.928009 === u2Vref_new: 0x60 --> 0x90
2325 11:07:56.931146 [CA 0] Center 37 (11~63) winsize 53
2326 11:07:56.934557 [CA 1] Center 37 (11~63) winsize 53
2327 11:07:56.937664 [CA 2] Center 34 (5~63) winsize 59
2328 11:07:56.941169 [CA 3] Center 35 (7~63) winsize 57
2329 11:07:56.944476 [CA 4] Center 34 (5~63) winsize 59
2330 11:07:56.947753 [CA 5] Center 27 (-1~56) winsize 58
2331 11:07:56.948070
2332 11:07:56.950839 [CATrainingPosCal] consider 2 rank data
2333 11:07:56.955632 u2DelayCellTimex100 = 833/100 ps
2334 11:07:56.957670 CA0 delay=38 (14~63),Diff = 10 PI (11 cell)
2335 11:07:56.960946 CA1 delay=37 (12~63),Diff = 9 PI (10 cell)
2336 11:07:56.964905 CA2 delay=35 (7~63),Diff = 7 PI (8 cell)
2337 11:07:56.967933 CA3 delay=35 (7~63),Diff = 7 PI (8 cell)
2338 11:07:56.970919 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2339 11:07:56.974520 CA5 delay=28 (0~56),Diff = 0 PI (0 cell)
2340 11:07:56.977677
2341 11:07:56.980875 CA PerBit enable=1, Macro0, CA PI delay=28
2342 11:07:56.984174 === u2Vref_new: 0x60 --> 0x90
2343 11:07:56.984594
2344 11:07:56.984932 Vref(ca) range 1: 32
2345 11:07:56.985276
2346 11:07:56.987225 CS Dly= 11 (42-0-32)
2347 11:07:56.987760 Write Rank1 MR13 =0xd8
2348 11:07:56.990846 Write Rank1 MR13 =0xd8
2349 11:07:56.993988 Write Rank1 MR12 =0x60
2350 11:07:56.997311 [RankSwap] Rank num 2, (Multi 1), Rank 0
2351 11:07:56.997691 Write Rank0 MR2 =0xad
2352 11:07:57.001164 [Write Leveling]
2353 11:07:57.004021 delay byte0 byte1 byte2 byte3
2354 11:07:57.004397
2355 11:07:57.004685 10 0 0
2356 11:07:57.007372 11 0 0
2357 11:07:57.007754 12 0 0
2358 11:07:57.008141 13 0 0
2359 11:07:57.010760 14 0 0
2360 11:07:57.011160 15 0 0
2361 11:07:57.015039 16 0 0
2362 11:07:57.015482 17 0 0
2363 11:07:57.017649 18 0 0
2364 11:07:57.018033 19 0 0
2365 11:07:57.018329 20 0 0
2366 11:07:57.020764 21 0 0
2367 11:07:57.021272 22 0 0
2368 11:07:57.024358 23 0 0
2369 11:07:57.024892 24 0 0
2370 11:07:57.025280 25 0 0
2371 11:07:57.027276 26 0 0
2372 11:07:57.027659 27 0 0
2373 11:07:57.030977 28 0 0
2374 11:07:57.031693 29 0 0
2375 11:07:57.033720 30 0 0
2376 11:07:57.034102 31 0 ff
2377 11:07:57.034400 32 0 ff
2378 11:07:57.037570 33 ff ff
2379 11:07:57.038006 34 ff ff
2380 11:07:57.041086 35 ff ff
2381 11:07:57.041732 36 ff ff
2382 11:07:57.043841 37 ff ff
2383 11:07:57.044307 38 ff ff
2384 11:07:57.047600 39 ff ff
2385 11:07:57.050148 pass bytecount = 0xff (0xff: all bytes pass)
2386 11:07:57.050529
2387 11:07:57.050824 DQS0 dly: 33
2388 11:07:57.053728 DQS1 dly: 31
2389 11:07:57.054107 Write Rank0 MR2 =0x2d
2390 11:07:57.056920 [RankSwap] Rank num 2, (Multi 1), Rank 0
2391 11:07:57.060716 Write Rank0 MR1 =0xd6
2392 11:07:57.061114 [Gating]
2393 11:07:57.061611 ==
2394 11:07:57.066833 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2395 11:07:57.070070 fsp= 1, odt_onoff= 1, Byte mode= 0
2396 11:07:57.070448 ==
2397 11:07:57.074103 3 1 0 |3534 505 |(11 11)(11 11) |(0 0)(0 0)| 0
2398 11:07:57.077571 3 1 4 |3534 1a19 |(11 11)(11 11) |(0 0)(1 1)| 0
2399 11:07:57.084099 3 1 8 |3534 2a2a |(11 11)(1 1) |(0 0)(0 0)| 0
2400 11:07:57.086626 3 1 12 |3534 3232 |(11 11)(11 11) |(0 0)(0 0)| 0
2401 11:07:57.089986 3 1 16 |3534 1d1c |(11 11)(11 11) |(1 1)(1 1)| 0
2402 11:07:57.097283 3 1 20 |3534 1a19 |(11 11)(11 11) |(1 1)(0 0)| 0
2403 11:07:57.099994 3 1 24 |3534 3333 |(11 11)(11 11) |(1 1)(1 1)| 0
2404 11:07:57.103528 3 1 28 |3534 303 |(11 11)(11 11) |(0 1)(1 1)| 0
2405 11:07:57.110001 3 2 0 |3534 3332 |(11 11)(11 11) |(0 1)(1 1)| 0
2406 11:07:57.113295 [Byte 1] Lead/lag falling Transition (3, 2, 0)
2407 11:07:57.116663 3 2 4 |3534 a09 |(11 11)(11 11) |(0 1)(0 1)| 0
2408 11:07:57.120399 3 2 8 |3534 2929 |(11 11)(11 11) |(0 1)(1 0)| 0
2409 11:07:57.127358 3 2 12 |3534 1a1a |(11 11)(11 11) |(0 1)(0 1)| 0
2410 11:07:57.129882 3 2 16 |3534 d0d |(11 11)(11 11) |(0 1)(1 1)| 0
2411 11:07:57.132802 [Byte 1] Lead/lag falling Transition (3, 2, 16)
2412 11:07:57.139431 3 2 20 |201 3333 |(11 11)(11 11) |(0 1)(0 1)| 0
2413 11:07:57.143374 3 2 24 |e0e 2524 |(11 11)(11 11) |(1 1)(0 1)| 0
2414 11:07:57.146222 3 2 28 |3d3d 3232 |(11 11)(10 11) |(1 1)(1 1)| 0
2415 11:07:57.153340 3 3 0 |3d3d 2f2e |(11 11)(11 11) |(1 1)(1 1)| 0
2416 11:07:57.156106 3 3 4 |3d3d 3938 |(11 11)(11 11) |(1 1)(1 1)| 0
2417 11:07:57.159536 3 3 8 |3d3d 1616 |(11 11)(1 1) |(1 1)(1 1)| 0
2418 11:07:57.162724 [Byte 1] Lead/lag Transition tap number (1)
2419 11:07:57.169429 3 3 12 |3d3d 3939 |(11 11)(11 11) |(1 1)(0 0)| 0
2420 11:07:57.173226 3 3 16 |3d3d 3c3c |(11 11)(10 10) |(1 1)(1 1)| 0
2421 11:07:57.176204 3 3 20 |3d3d 3635 |(11 11)(11 11) |(1 1)(0 0)| 0
2422 11:07:57.183641 3 3 24 |0 3535 |(11 11)(11 11) |(1 1)(1 1)| 0
2423 11:07:57.186157 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2424 11:07:57.189410 3 4 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2425 11:07:57.193509 [Byte 0] Lead/lag falling Transition (3, 4, 0)
2426 11:07:57.199390 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2427 11:07:57.202873 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2428 11:07:57.206209 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2429 11:07:57.212947 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2430 11:07:57.216747 3 4 20 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2431 11:07:57.219716 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2432 11:07:57.226734 3 4 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2433 11:07:57.229436 3 5 0 |3d3d 706 |(11 11)(11 11) |(1 1)(1 1)| 0
2434 11:07:57.233164 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2435 11:07:57.236034 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2436 11:07:57.242923 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2437 11:07:57.246873 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2438 11:07:57.249880 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2439 11:07:57.256219 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2440 11:07:57.259645 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2441 11:07:57.262531 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2442 11:07:57.269208 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2443 11:07:57.273292 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2444 11:07:57.276097 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2445 11:07:57.279712 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2446 11:07:57.286578 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2447 11:07:57.289425 [Byte 0] Lead/lag Transition tap number (3)
2448 11:07:57.292823 [Byte 1] Lead/lag falling Transition (3, 6, 16)
2449 11:07:57.299000 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2450 11:07:57.302457 3 6 24 |3636 3d3d |(1 1)(11 11) |(0 0)(1 0)| 0
2451 11:07:57.305745 [Byte 1] Lead/lag Transition tap number (3)
2452 11:07:57.309087 3 6 28 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2453 11:07:57.312287 [Byte 0]First pass (3, 6, 28)
2454 11:07:57.316130 3 7 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2455 11:07:57.319054 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2456 11:07:57.322558 [Byte 1]First pass (3, 7, 4)
2457 11:07:57.326228 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2458 11:07:57.332597 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2459 11:07:57.335616 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2460 11:07:57.339676 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2461 11:07:57.342749 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2462 11:07:57.345628 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2463 11:07:57.353157 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2464 11:07:57.355494 4 0 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2465 11:07:57.359634 All bytes gating window > 1UI, Early break!
2466 11:07:57.360017
2467 11:07:57.362033 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 14)
2468 11:07:57.362490
2469 11:07:57.366200 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 22)
2470 11:07:57.366592
2471 11:07:57.366967
2472 11:07:57.367282
2473 11:07:57.372902 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
2474 11:07:57.373331
2475 11:07:57.375415 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 22)
2476 11:07:57.375795
2477 11:07:57.376164
2478 11:07:57.378951 Write Rank0 MR1 =0x56
2479 11:07:57.379324
2480 11:07:57.382335 best RODT dly(2T, 0.5T) = (2, 3)
2481 11:07:57.382766
2482 11:07:57.383061 best RODT dly(2T, 0.5T) = (2, 3)
2483 11:07:57.386512 ==
2484 11:07:57.388803 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2485 11:07:57.392600 fsp= 1, odt_onoff= 1, Byte mode= 0
2486 11:07:57.392977 ==
2487 11:07:57.395604 Start DQ dly to find pass range UseTestEngine =0
2488 11:07:57.399288 x-axis: bit #, y-axis: DQ dly (-127~63)
2489 11:07:57.402333 RX Vref Scan = 0
2490 11:07:57.405743 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2491 11:07:57.409286 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2492 11:07:57.411957 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2493 11:07:57.412342 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2494 11:07:57.415823 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2495 11:07:57.418783 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2496 11:07:57.422510 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2497 11:07:57.425548 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2498 11:07:57.429204 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2499 11:07:57.432573 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2500 11:07:57.435577 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2501 11:07:57.436038 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2502 11:07:57.438701 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2503 11:07:57.442491 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2504 11:07:57.445292 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2505 11:07:57.448770 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2506 11:07:57.452765 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2507 11:07:57.455362 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2508 11:07:57.459140 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2509 11:07:57.459535 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2510 11:07:57.462537 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2511 11:07:57.465445 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2512 11:07:57.468924 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2513 11:07:57.471915 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2514 11:07:57.475076 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2515 11:07:57.478525 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2516 11:07:57.479042 0, [0] xxxxxxxx xxxxxxxo [MSB]
2517 11:07:57.481807 1, [0] xxxxxxxx xxxxxxxo [MSB]
2518 11:07:57.485925 2, [0] xxxxxxxx xxxxxxxo [MSB]
2519 11:07:57.488283 3, [0] xxxoxxxx ooxxxxxo [MSB]
2520 11:07:57.491476 4, [0] xxxoxxxx ooxxxxxo [MSB]
2521 11:07:57.494987 5, [0] xoooxxxo ooxxxxxo [MSB]
2522 11:07:57.495376 6, [0] xoooxxxo oooxxxxo [MSB]
2523 11:07:57.498179 7, [0] xooooxoo oooooxoo [MSB]
2524 11:07:57.501648 8, [0] oooooxoo oooooooo [MSB]
2525 11:07:57.505098 31, [0] oooooooo ooooooox [MSB]
2526 11:07:57.508621 32, [0] oooooooo ooooooox [MSB]
2527 11:07:57.511689 33, [0] oooooooo ooooooox [MSB]
2528 11:07:57.515113 34, [0] oooooooo oxooooox [MSB]
2529 11:07:57.515590 35, [0] ooxxoooo xxooooox [MSB]
2530 11:07:57.518056 36, [0] ooxxoooo xxooooox [MSB]
2531 11:07:57.521578 37, [0] ooxxxooo xxxoooox [MSB]
2532 11:07:57.524805 38, [0] ooxxxooo xxxxoxxx [MSB]
2533 11:07:57.528281 39, [0] oxxxxxox xxxxxxxx [MSB]
2534 11:07:57.531317 40, [0] oxxxxxox xxxxxxxx [MSB]
2535 11:07:57.534480 41, [0] xxxxxxxx xxxxxxxx [MSB]
2536 11:07:57.537772 iDelay=41, Bit 0, Center 24 (8 ~ 40) 33
2537 11:07:57.541600 iDelay=41, Bit 1, Center 21 (5 ~ 38) 34
2538 11:07:57.544767 iDelay=41, Bit 2, Center 19 (5 ~ 34) 30
2539 11:07:57.547746 iDelay=41, Bit 3, Center 18 (3 ~ 34) 32
2540 11:07:57.551224 iDelay=41, Bit 4, Center 21 (7 ~ 36) 30
2541 11:07:57.554108 iDelay=41, Bit 5, Center 23 (9 ~ 38) 30
2542 11:07:57.558381 iDelay=41, Bit 6, Center 23 (7 ~ 40) 34
2543 11:07:57.561565 iDelay=41, Bit 7, Center 21 (5 ~ 38) 34
2544 11:07:57.564396 iDelay=41, Bit 8, Center 18 (3 ~ 34) 32
2545 11:07:57.568147 iDelay=41, Bit 9, Center 18 (3 ~ 33) 31
2546 11:07:57.571056 iDelay=41, Bit 10, Center 21 (6 ~ 36) 31
2547 11:07:57.577584 iDelay=41, Bit 11, Center 22 (7 ~ 37) 31
2548 11:07:57.581257 iDelay=41, Bit 12, Center 22 (7 ~ 38) 32
2549 11:07:57.584151 iDelay=41, Bit 13, Center 22 (8 ~ 37) 30
2550 11:07:57.588056 iDelay=41, Bit 14, Center 22 (7 ~ 37) 31
2551 11:07:57.591475 iDelay=41, Bit 15, Center 15 (0 ~ 30) 31
2552 11:07:57.591845 ==
2553 11:07:57.594308 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2554 11:07:57.597281 fsp= 1, odt_onoff= 1, Byte mode= 0
2555 11:07:57.600819 ==
2556 11:07:57.601378 DQS Delay:
2557 11:07:57.601841 DQS0 = 0, DQS1 = 0
2558 11:07:57.604299 DQM Delay:
2559 11:07:57.604830 DQM0 = 21, DQM1 = 20
2560 11:07:57.607698 DQ Delay:
2561 11:07:57.608089 DQ0 =24, DQ1 =21, DQ2 =19, DQ3 =18
2562 11:07:57.610932 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =21
2563 11:07:57.613800 DQ8 =18, DQ9 =18, DQ10 =21, DQ11 =22
2564 11:07:57.617298 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =15
2565 11:07:57.617711
2566 11:07:57.621544
2567 11:07:57.622121 DramC Write-DBI off
2568 11:07:57.622432 ==
2569 11:07:57.627620 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2570 11:07:57.631602 fsp= 1, odt_onoff= 1, Byte mode= 0
2571 11:07:57.632208 ==
2572 11:07:57.633937 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2573 11:07:57.634474
2574 11:07:57.637800 Begin, DQ Scan Range 927~1183
2575 11:07:57.638410
2576 11:07:57.638871
2577 11:07:57.641819 TX Vref Scan disable
2578 11:07:57.644409 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2579 11:07:57.647221 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2580 11:07:57.651330 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2581 11:07:57.654472 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2582 11:07:57.657018 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2583 11:07:57.660471 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2584 11:07:57.663839 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2585 11:07:57.667391 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2586 11:07:57.670565 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2587 11:07:57.673790 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2588 11:07:57.677398 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2589 11:07:57.681429 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2590 11:07:57.683751 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2591 11:07:57.687582 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2592 11:07:57.690611 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2593 11:07:57.694005 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2594 11:07:57.700674 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2595 11:07:57.704034 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2596 11:07:57.707510 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2597 11:07:57.710653 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2598 11:07:57.713959 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2599 11:07:57.717676 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2600 11:07:57.721082 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2601 11:07:57.724397 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2602 11:07:57.727163 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2603 11:07:57.730890 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2604 11:07:57.733988 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2605 11:07:57.737224 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2606 11:07:57.740929 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2607 11:07:57.744241 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2608 11:07:57.747290 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2609 11:07:57.750341 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2610 11:07:57.756962 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2611 11:07:57.760339 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2612 11:07:57.763965 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2613 11:07:57.767431 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2614 11:07:57.771018 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2615 11:07:57.773904 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2616 11:07:57.777338 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2617 11:07:57.780141 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2618 11:07:57.783525 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2619 11:07:57.787186 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2620 11:07:57.790056 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2621 11:07:57.793513 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2622 11:07:57.797187 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2623 11:07:57.800215 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2624 11:07:57.804452 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2625 11:07:57.807010 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2626 11:07:57.809928 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2627 11:07:57.813731 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2628 11:07:57.817209 977 |3 6 17|[0] xxxxxxxx ooxxxxxo [MSB]
2629 11:07:57.820565 978 |3 6 18|[0] xxxxxxxx ooxxxxxo [MSB]
2630 11:07:57.827637 979 |3 6 19|[0] xxxxxxxx oooxxxoo [MSB]
2631 11:07:57.830786 980 |3 6 20|[0] xxxxxxxx oooooxoo [MSB]
2632 11:07:57.833644 981 |3 6 21|[0] xxxxxxxx oooooxoo [MSB]
2633 11:07:57.836638 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
2634 11:07:57.840860 983 |3 6 23|[0] xooooxoo oooooooo [MSB]
2635 11:07:57.844073 993 |3 6 33|[0] oooooooo ooooooox [MSB]
2636 11:07:57.847145 994 |3 6 34|[0] oooooooo ooooooox [MSB]
2637 11:07:57.850314 995 |3 6 35|[0] oooooooo xxxoxxxx [MSB]
2638 11:07:57.853848 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2639 11:07:57.857806 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2640 11:07:57.863655 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2641 11:07:57.866992 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2642 11:07:57.870319 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2643 11:07:57.873453 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2644 11:07:57.876709 1002 |3 6 42|[0] ooxxoooo xxxxxxxx [MSB]
2645 11:07:57.879887 1003 |3 6 43|[0] oxxxooox xxxxxxxx [MSB]
2646 11:07:57.883355 1004 |3 6 44|[0] xxxxxxxx xxxxxxxx [MSB]
2647 11:07:57.887748 Byte0, DQ PI dly=991, DQM PI dly= 991
2648 11:07:57.890005 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
2649 11:07:57.890401
2650 11:07:57.896989 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
2651 11:07:57.897444
2652 11:07:57.899728 Byte1, DQ PI dly=986, DQM PI dly= 986
2653 11:07:57.903407 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
2654 11:07:57.903798
2655 11:07:57.907962 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
2656 11:07:57.910346
2657 11:07:57.910751 ==
2658 11:07:57.913379 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2659 11:07:57.916941 fsp= 1, odt_onoff= 1, Byte mode= 0
2660 11:07:57.917407 ==
2661 11:07:57.919997 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2662 11:07:57.920382
2663 11:07:57.923680 Begin, DQ Scan Range 962~1026
2664 11:07:57.926215 Write Rank0 MR14 =0x0
2665 11:07:57.933638
2666 11:07:57.934129 CH=1, VrefRange= 0, VrefLevel = 0
2667 11:07:57.940565 TX Bit0 (986~999) 14 992, Bit8 (980~992) 13 986,
2668 11:07:57.943381 TX Bit1 (985~996) 12 990, Bit9 (980~991) 12 985,
2669 11:07:57.950131 TX Bit2 (982~996) 15 989, Bit10 (983~993) 11 988,
2670 11:07:57.953941 TX Bit3 (980~993) 14 986, Bit11 (984~994) 11 989,
2671 11:07:57.957207 TX Bit4 (984~998) 15 991, Bit12 (983~994) 12 988,
2672 11:07:57.963678 TX Bit5 (986~998) 13 992, Bit13 (985~993) 9 989,
2673 11:07:57.966903 TX Bit6 (984~998) 15 991, Bit14 (983~994) 12 988,
2674 11:07:57.970346 TX Bit7 (985~997) 13 991, Bit15 (976~987) 12 981,
2675 11:07:57.970811
2676 11:07:57.973367 Write Rank0 MR14 =0x2
2677 11:07:57.980998
2678 11:07:57.981447 CH=1, VrefRange= 0, VrefLevel = 2
2679 11:07:57.988593 TX Bit0 (985~999) 15 992, Bit8 (979~992) 14 985,
2680 11:07:57.991828 TX Bit1 (984~997) 14 990, Bit9 (979~992) 14 985,
2681 11:07:57.998202 TX Bit2 (982~997) 16 989, Bit10 (983~994) 12 988,
2682 11:07:58.001284 TX Bit3 (980~993) 14 986, Bit11 (983~995) 13 989,
2683 11:07:58.004809 TX Bit4 (984~999) 16 991, Bit12 (983~995) 13 989,
2684 11:07:58.011384 TX Bit5 (985~999) 15 992, Bit13 (984~993) 10 988,
2685 11:07:58.014517 TX Bit6 (983~999) 17 991, Bit14 (983~994) 12 988,
2686 11:07:58.017934 TX Bit7 (984~998) 15 991, Bit15 (976~988) 13 982,
2687 11:07:58.018371
2688 11:07:58.021223 Write Rank0 MR14 =0x4
2689 11:07:58.029469
2690 11:07:58.029855 CH=1, VrefRange= 0, VrefLevel = 4
2691 11:07:58.036002 TX Bit0 (985~1000) 16 992, Bit8 (978~993) 16 985,
2692 11:07:58.039363 TX Bit1 (984~998) 15 991, Bit9 (978~992) 15 985,
2693 11:07:58.045868 TX Bit2 (981~998) 18 989, Bit10 (983~995) 13 989,
2694 11:07:58.049398 TX Bit3 (980~994) 15 987, Bit11 (983~996) 14 989,
2695 11:07:58.052754 TX Bit4 (984~999) 16 991, Bit12 (983~996) 14 989,
2696 11:07:58.059498 TX Bit5 (985~1000) 16 992, Bit13 (984~994) 11 989,
2697 11:07:58.062323 TX Bit6 (983~1000) 18 991, Bit14 (982~995) 14 988,
2698 11:07:58.066004 TX Bit7 (984~999) 16 991, Bit15 (975~990) 16 982,
2699 11:07:58.069103
2700 11:07:58.069519 Write Rank0 MR14 =0x6
2701 11:07:58.077540
2702 11:07:58.077922 CH=1, VrefRange= 0, VrefLevel = 6
2703 11:07:58.084292 TX Bit0 (985~1001) 17 993, Bit8 (978~993) 16 985,
2704 11:07:58.087708 TX Bit1 (984~999) 16 991, Bit9 (977~992) 16 984,
2705 11:07:58.094148 TX Bit2 (981~999) 19 990, Bit10 (982~996) 15 989,
2706 11:07:58.097734 TX Bit3 (979~994) 16 986, Bit11 (982~997) 16 989,
2707 11:07:58.100919 TX Bit4 (983~1000) 18 991, Bit12 (983~996) 14 989,
2708 11:07:58.107252 TX Bit5 (985~1000) 16 992, Bit13 (983~995) 13 989,
2709 11:07:58.110733 TX Bit6 (983~1001) 19 992, Bit14 (981~996) 16 988,
2710 11:07:58.117383 TX Bit7 (984~1000) 17 992, Bit15 (976~990) 15 983,
2711 11:07:58.117871
2712 11:07:58.118174 Write Rank0 MR14 =0x8
2713 11:07:58.126383
2714 11:07:58.126915 CH=1, VrefRange= 0, VrefLevel = 8
2715 11:07:58.133306 TX Bit0 (984~1001) 18 992, Bit8 (978~994) 17 986,
2716 11:07:58.136719 TX Bit1 (984~1000) 17 992, Bit9 (978~993) 16 985,
2717 11:07:58.142954 TX Bit2 (980~999) 20 989, Bit10 (982~996) 15 989,
2718 11:07:58.146424 TX Bit3 (979~995) 17 987, Bit11 (982~998) 17 990,
2719 11:07:58.150522 TX Bit4 (983~1000) 18 991, Bit12 (982~997) 16 989,
2720 11:07:58.155969 TX Bit5 (985~1000) 16 992, Bit13 (984~996) 13 990,
2721 11:07:58.159311 TX Bit6 (983~1001) 19 992, Bit14 (981~996) 16 988,
2722 11:07:58.165885 TX Bit7 (984~1000) 17 992, Bit15 (974~991) 18 982,
2723 11:07:58.166268
2724 11:07:58.166557 Write Rank0 MR14 =0xa
2725 11:07:58.174595
2726 11:07:58.178257 CH=1, VrefRange= 0, VrefLevel = 10
2727 11:07:58.181801 TX Bit0 (984~1002) 19 993, Bit8 (977~994) 18 985,
2728 11:07:58.184660 TX Bit1 (983~1000) 18 991, Bit9 (977~993) 17 985,
2729 11:07:58.191323 TX Bit2 (980~1000) 21 990, Bit10 (981~997) 17 989,
2730 11:07:58.194650 TX Bit3 (979~996) 18 987, Bit11 (982~998) 17 990,
2731 11:07:58.197827 TX Bit4 (982~1001) 20 991, Bit12 (982~998) 17 990,
2732 11:07:58.204976 TX Bit5 (985~1002) 18 993, Bit13 (983~996) 14 989,
2733 11:07:58.207891 TX Bit6 (983~1001) 19 992, Bit14 (981~998) 18 989,
2734 11:07:58.215075 TX Bit7 (983~1001) 19 992, Bit15 (975~991) 17 983,
2735 11:07:58.215454
2736 11:07:58.215746 Write Rank0 MR14 =0xc
2737 11:07:58.224478
2738 11:07:58.227662 CH=1, VrefRange= 0, VrefLevel = 12
2739 11:07:58.231154 TX Bit0 (984~1003) 20 993, Bit8 (976~994) 19 985,
2740 11:07:58.234143 TX Bit1 (982~1001) 20 991, Bit9 (977~994) 18 985,
2741 11:07:58.240818 TX Bit2 (980~1000) 21 990, Bit10 (981~998) 18 989,
2742 11:07:58.243790 TX Bit3 (979~997) 19 988, Bit11 (982~999) 18 990,
2743 11:07:58.247266 TX Bit4 (982~1001) 20 991, Bit12 (982~998) 17 990,
2744 11:07:58.253737 TX Bit5 (985~1002) 18 993, Bit13 (983~997) 15 990,
2745 11:07:58.257370 TX Bit6 (982~1002) 21 992, Bit14 (980~998) 19 989,
2746 11:07:58.264189 TX Bit7 (983~1001) 19 992, Bit15 (973~992) 20 982,
2747 11:07:58.264705
2748 11:07:58.265059 Write Rank0 MR14 =0xe
2749 11:07:58.273251
2750 11:07:58.276706 CH=1, VrefRange= 0, VrefLevel = 14
2751 11:07:58.279916 TX Bit0 (984~1003) 20 993, Bit8 (976~995) 20 985,
2752 11:07:58.283151 TX Bit1 (982~1001) 20 991, Bit9 (977~994) 18 985,
2753 11:07:58.290339 TX Bit2 (980~1001) 22 990, Bit10 (980~998) 19 989,
2754 11:07:58.293082 TX Bit3 (978~997) 20 987, Bit11 (981~999) 19 990,
2755 11:07:58.296706 TX Bit4 (981~1002) 22 991, Bit12 (980~999) 20 989,
2756 11:07:58.303183 TX Bit5 (984~1003) 20 993, Bit13 (982~998) 17 990,
2757 11:07:58.306371 TX Bit6 (982~1002) 21 992, Bit14 (981~999) 19 990,
2758 11:07:58.312937 TX Bit7 (982~1002) 21 992, Bit15 (973~992) 20 982,
2759 11:07:58.313374
2760 11:07:58.313674 Write Rank0 MR14 =0x10
2761 11:07:58.322415
2762 11:07:58.326362 CH=1, VrefRange= 0, VrefLevel = 16
2763 11:07:58.329514 TX Bit0 (984~1004) 21 994, Bit8 (976~995) 20 985,
2764 11:07:58.332598 TX Bit1 (982~1002) 21 992, Bit9 (976~995) 20 985,
2765 11:07:58.339663 TX Bit2 (979~1001) 23 990, Bit10 (980~999) 20 989,
2766 11:07:58.342750 TX Bit3 (978~998) 21 988, Bit11 (980~999) 20 989,
2767 11:07:58.345597 TX Bit4 (981~1003) 23 992, Bit12 (980~999) 20 989,
2768 11:07:58.352452 TX Bit5 (984~1003) 20 993, Bit13 (982~998) 17 990,
2769 11:07:58.355979 TX Bit6 (981~1003) 23 992, Bit14 (979~999) 21 989,
2770 11:07:58.362005 TX Bit7 (983~1002) 20 992, Bit15 (973~992) 20 982,
2771 11:07:58.362468
2772 11:07:58.362787 Write Rank0 MR14 =0x12
2773 11:07:58.371981
2774 11:07:58.375677 CH=1, VrefRange= 0, VrefLevel = 18
2775 11:07:58.378417 TX Bit0 (983~1005) 23 994, Bit8 (976~997) 22 986,
2776 11:07:58.382009 TX Bit1 (982~1002) 21 992, Bit9 (975~996) 22 985,
2777 11:07:58.388476 TX Bit2 (979~1001) 23 990, Bit10 (979~999) 21 989,
2778 11:07:58.392402 TX Bit3 (978~999) 22 988, Bit11 (980~1000) 21 990,
2779 11:07:58.395457 TX Bit4 (981~1003) 23 992, Bit12 (980~999) 20 989,
2780 11:07:58.402217 TX Bit5 (984~1003) 20 993, Bit13 (982~999) 18 990,
2781 11:07:58.405205 TX Bit6 (981~1003) 23 992, Bit14 (979~999) 21 989,
2782 11:07:58.412142 TX Bit7 (981~1002) 22 991, Bit15 (973~993) 21 983,
2783 11:07:58.412539
2784 11:07:58.412833 Write Rank0 MR14 =0x14
2785 11:07:58.421656
2786 11:07:58.424717 CH=1, VrefRange= 0, VrefLevel = 20
2787 11:07:58.427872 TX Bit0 (984~1005) 22 994, Bit8 (975~998) 24 986,
2788 11:07:58.431625 TX Bit1 (982~1003) 22 992, Bit9 (975~997) 23 986,
2789 11:07:58.438215 TX Bit2 (979~1002) 24 990, Bit10 (979~999) 21 989,
2790 11:07:58.441020 TX Bit3 (978~999) 22 988, Bit11 (979~1000) 22 989,
2791 11:07:58.444654 TX Bit4 (980~1004) 25 992, Bit12 (980~999) 20 989,
2792 11:07:58.451399 TX Bit5 (983~1005) 23 994, Bit13 (981~999) 19 990,
2793 11:07:58.455207 TX Bit6 (981~1004) 24 992, Bit14 (978~999) 22 988,
2794 11:07:58.461421 TX Bit7 (982~1003) 22 992, Bit15 (973~993) 21 983,
2795 11:07:58.461892
2796 11:07:58.462194 Write Rank0 MR14 =0x16
2797 11:07:58.471495
2798 11:07:58.475199 CH=1, VrefRange= 0, VrefLevel = 22
2799 11:07:58.478108 TX Bit0 (984~1006) 23 995, Bit8 (975~997) 23 986,
2800 11:07:58.481777 TX Bit1 (981~1003) 23 992, Bit9 (975~997) 23 986,
2801 11:07:58.487820 TX Bit2 (978~1003) 26 990, Bit10 (978~999) 22 988,
2802 11:07:58.491132 TX Bit3 (977~1000) 24 988, Bit11 (979~1000) 22 989,
2803 11:07:58.494381 TX Bit4 (980~1005) 26 992, Bit12 (979~1000) 22 989,
2804 11:07:58.501593 TX Bit5 (983~1005) 23 994, Bit13 (981~1000) 20 990,
2805 11:07:58.504312 TX Bit6 (980~1004) 25 992, Bit14 (978~1000) 23 989,
2806 11:07:58.511297 TX Bit7 (981~1004) 24 992, Bit15 (971~993) 23 982,
2807 11:07:58.511722
2808 11:07:58.512016 Write Rank0 MR14 =0x18
2809 11:07:58.522127
2810 11:07:58.525086 CH=1, VrefRange= 0, VrefLevel = 24
2811 11:07:58.527834 TX Bit0 (982~1006) 25 994, Bit8 (975~998) 24 986,
2812 11:07:58.531320 TX Bit1 (980~1004) 25 992, Bit9 (974~998) 25 986,
2813 11:07:58.538181 TX Bit2 (978~1003) 26 990, Bit10 (977~1000) 24 988,
2814 11:07:58.541221 TX Bit3 (977~1000) 24 988, Bit11 (979~1001) 23 990,
2815 11:07:58.548596 TX Bit4 (980~1005) 26 992, Bit12 (979~1000) 22 989,
2816 11:07:58.551662 TX Bit5 (983~1005) 23 994, Bit13 (980~1000) 21 990,
2817 11:07:58.554672 TX Bit6 (980~1006) 27 993, Bit14 (978~1000) 23 989,
2818 11:07:58.562320 TX Bit7 (981~1004) 24 992, Bit15 (971~994) 24 982,
2819 11:07:58.562752
2820 11:07:58.563044 Write Rank0 MR14 =0x1a
2821 11:07:58.571544
2822 11:07:58.574938 CH=1, VrefRange= 0, VrefLevel = 26
2823 11:07:58.578155 TX Bit0 (982~1006) 25 994, Bit8 (974~999) 26 986,
2824 11:07:58.581545 TX Bit1 (980~1004) 25 992, Bit9 (974~998) 25 986,
2825 11:07:58.588060 TX Bit2 (978~1003) 26 990, Bit10 (978~1000) 23 989,
2826 11:07:58.591493 TX Bit3 (977~1001) 25 989, Bit11 (978~1001) 24 989,
2827 11:07:58.597658 TX Bit4 (979~1005) 27 992, Bit12 (978~1000) 23 989,
2828 11:07:58.601076 TX Bit5 (983~1006) 24 994, Bit13 (979~1000) 22 989,
2829 11:07:58.604305 TX Bit6 (979~1006) 28 992, Bit14 (977~1000) 24 988,
2830 11:07:58.610965 TX Bit7 (980~1004) 25 992, Bit15 (971~995) 25 983,
2831 11:07:58.611398
2832 11:07:58.614212 Write Rank0 MR14 =0x1c
2833 11:07:58.622030
2834 11:07:58.625311 CH=1, VrefRange= 0, VrefLevel = 28
2835 11:07:58.628396 TX Bit0 (982~1007) 26 994, Bit8 (974~999) 26 986,
2836 11:07:58.632260 TX Bit1 (980~1005) 26 992, Bit9 (974~998) 25 986,
2837 11:07:58.638777 TX Bit2 (978~1003) 26 990, Bit10 (977~1000) 24 988,
2838 11:07:58.641774 TX Bit3 (977~1001) 25 989, Bit11 (978~1001) 24 989,
2839 11:07:58.648515 TX Bit4 (980~1005) 26 992, Bit12 (978~1001) 24 989,
2840 11:07:58.651620 TX Bit5 (983~1006) 24 994, Bit13 (979~1000) 22 989,
2841 11:07:58.655887 TX Bit6 (980~1006) 27 993, Bit14 (977~1000) 24 988,
2842 11:07:58.662216 TX Bit7 (980~1005) 26 992, Bit15 (970~996) 27 983,
2843 11:07:58.662606
2844 11:07:58.662907 Write Rank0 MR14 =0x1e
2845 11:07:58.672344
2846 11:07:58.675648 CH=1, VrefRange= 0, VrefLevel = 30
2847 11:07:58.678964 TX Bit0 (982~1007) 26 994, Bit8 (974~999) 26 986,
2848 11:07:58.682608 TX Bit1 (980~1006) 27 993, Bit9 (973~998) 26 985,
2849 11:07:58.688767 TX Bit2 (978~1003) 26 990, Bit10 (977~1000) 24 988,
2850 11:07:58.692057 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
2851 11:07:58.698912 TX Bit4 (980~1006) 27 993, Bit12 (978~1000) 23 989,
2852 11:07:58.702064 TX Bit5 (982~1007) 26 994, Bit13 (979~1000) 22 989,
2853 11:07:58.705645 TX Bit6 (980~1007) 28 993, Bit14 (977~1000) 24 988,
2854 11:07:58.712236 TX Bit7 (979~1006) 28 992, Bit15 (970~995) 26 982,
2855 11:07:58.712627
2856 11:07:58.712994 Write Rank0 MR14 =0x20
2857 11:07:58.722465
2858 11:07:58.725555 CH=1, VrefRange= 0, VrefLevel = 32
2859 11:07:58.729171 TX Bit0 (982~1007) 26 994, Bit8 (974~999) 26 986,
2860 11:07:58.732465 TX Bit1 (980~1006) 27 993, Bit9 (973~998) 26 985,
2861 11:07:58.739915 TX Bit2 (978~1003) 26 990, Bit10 (977~1000) 24 988,
2862 11:07:58.742285 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
2863 11:07:58.749087 TX Bit4 (980~1006) 27 993, Bit12 (978~1000) 23 989,
2864 11:07:58.752986 TX Bit5 (982~1007) 26 994, Bit13 (979~1000) 22 989,
2865 11:07:58.755947 TX Bit6 (980~1007) 28 993, Bit14 (977~1000) 24 988,
2866 11:07:58.762197 TX Bit7 (979~1006) 28 992, Bit15 (970~995) 26 982,
2867 11:07:58.762589
2868 11:07:58.762887 Write Rank0 MR14 =0x22
2869 11:07:58.772878
2870 11:07:58.776094 CH=1, VrefRange= 0, VrefLevel = 34
2871 11:07:58.780043 TX Bit0 (982~1007) 26 994, Bit8 (974~999) 26 986,
2872 11:07:58.782821 TX Bit1 (980~1006) 27 993, Bit9 (973~998) 26 985,
2873 11:07:58.789569 TX Bit2 (978~1003) 26 990, Bit10 (977~1000) 24 988,
2874 11:07:58.793317 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
2875 11:07:58.799734 TX Bit4 (980~1006) 27 993, Bit12 (978~1000) 23 989,
2876 11:07:58.803611 TX Bit5 (982~1007) 26 994, Bit13 (979~1000) 22 989,
2877 11:07:58.806252 TX Bit6 (980~1007) 28 993, Bit14 (977~1000) 24 988,
2878 11:07:58.812748 TX Bit7 (979~1006) 28 992, Bit15 (970~995) 26 982,
2879 11:07:58.813188
2880 11:07:58.813495 Write Rank0 MR14 =0x24
2881 11:07:58.823167
2882 11:07:58.826485 CH=1, VrefRange= 0, VrefLevel = 36
2883 11:07:58.829556 TX Bit0 (982~1007) 26 994, Bit8 (974~999) 26 986,
2884 11:07:58.833560 TX Bit1 (980~1006) 27 993, Bit9 (973~998) 26 985,
2885 11:07:58.839759 TX Bit2 (978~1003) 26 990, Bit10 (977~1000) 24 988,
2886 11:07:58.843431 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
2887 11:07:58.850268 TX Bit4 (980~1006) 27 993, Bit12 (978~1000) 23 989,
2888 11:07:58.853276 TX Bit5 (982~1007) 26 994, Bit13 (979~1000) 22 989,
2889 11:07:58.856528 TX Bit6 (980~1007) 28 993, Bit14 (977~1000) 24 988,
2890 11:07:58.863367 TX Bit7 (979~1006) 28 992, Bit15 (970~995) 26 982,
2891 11:07:58.863854
2892 11:07:58.864252
2893 11:07:58.866621 TX Vref found, early break! 380< 387
2894 11:07:58.870060 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =833/100 ps
2895 11:07:58.873234 u1DelayCellOfst[0]=5 cells (5 PI)
2896 11:07:58.877277 u1DelayCellOfst[1]=4 cells (4 PI)
2897 11:07:58.880141 u1DelayCellOfst[2]=1 cells (1 PI)
2898 11:07:58.883806 u1DelayCellOfst[3]=0 cells (0 PI)
2899 11:07:58.886890 u1DelayCellOfst[4]=4 cells (4 PI)
2900 11:07:58.889932 u1DelayCellOfst[5]=5 cells (5 PI)
2901 11:07:58.893212 u1DelayCellOfst[6]=4 cells (4 PI)
2902 11:07:58.893720 u1DelayCellOfst[7]=3 cells (3 PI)
2903 11:07:58.896577 Byte0, DQ PI dly=989, DQM PI dly= 991
2904 11:07:58.903428 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2905 11:07:58.903942
2906 11:07:58.906710 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2907 11:07:58.907151
2908 11:07:58.910085 u1DelayCellOfst[8]=4 cells (4 PI)
2909 11:07:58.913280 u1DelayCellOfst[9]=3 cells (3 PI)
2910 11:07:58.916769 u1DelayCellOfst[10]=7 cells (6 PI)
2911 11:07:58.920156 u1DelayCellOfst[11]=7 cells (6 PI)
2912 11:07:58.923207 u1DelayCellOfst[12]=8 cells (7 PI)
2913 11:07:58.926463 u1DelayCellOfst[13]=8 cells (7 PI)
2914 11:07:58.929612 u1DelayCellOfst[14]=7 cells (6 PI)
2915 11:07:58.933330 u1DelayCellOfst[15]=0 cells (0 PI)
2916 11:07:58.936670 Byte1, DQ PI dly=982, DQM PI dly= 985
2917 11:07:58.939540 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
2918 11:07:58.939980
2919 11:07:58.943093 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
2920 11:07:58.943748
2921 11:07:58.946779 Write Rank0 MR14 =0x1e
2922 11:07:58.947201
2923 11:07:58.950048 Final TX Range 0 Vref 30
2924 11:07:58.950555
2925 11:07:58.956377 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2926 11:07:58.956761
2927 11:07:58.963470 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2928 11:07:58.969519 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2929 11:07:58.976521 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2930 11:07:58.976963 Write Rank0 MR3 =0xb0
2931 11:07:58.979491 DramC Write-DBI on
2932 11:07:58.979883 ==
2933 11:07:58.986177 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2934 11:07:58.986827 fsp= 1, odt_onoff= 1, Byte mode= 0
2935 11:07:58.989544 ==
2936 11:07:58.993105 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2937 11:07:58.993650
2938 11:07:58.996176 Begin, DQ Scan Range 705~769
2939 11:07:58.996610
2940 11:07:58.997035
2941 11:07:58.997474 TX Vref Scan disable
2942 11:07:58.999765 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2943 11:07:59.003001 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2944 11:07:59.009563 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2945 11:07:59.012867 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2946 11:07:59.016285 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2947 11:07:59.019529 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2948 11:07:59.023831 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2949 11:07:59.026331 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2950 11:07:59.029300 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2951 11:07:59.033323 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2952 11:07:59.036246 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2953 11:07:59.039618 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2954 11:07:59.042669 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2955 11:07:59.045847 718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2956 11:07:59.049778 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2957 11:07:59.052952 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2958 11:07:59.056545 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2959 11:07:59.059147 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2960 11:07:59.062263 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2961 11:07:59.066047 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2962 11:07:59.072837 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
2963 11:07:59.076156 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2964 11:07:59.082390 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2965 11:07:59.085716 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2966 11:07:59.089484 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2967 11:07:59.092479 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2968 11:07:59.095524 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2969 11:07:59.098864 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2970 11:07:59.102523 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
2971 11:07:59.105998 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
2972 11:07:59.109639 753 |2 6 49|[0] xxxxxxxx xxxxxxxx [MSB]
2973 11:07:59.112498 Byte0, DQ PI dly=739, DQM PI dly= 739
2974 11:07:59.115517 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 35)
2975 11:07:59.115975
2976 11:07:59.122032 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 35)
2977 11:07:59.122481
2978 11:07:59.125569 Byte1, DQ PI dly=731, DQM PI dly= 731
2979 11:07:59.129155 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
2980 11:07:59.129637
2981 11:07:59.132045 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
2982 11:07:59.132434
2983 11:07:59.138876 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2984 11:07:59.148787 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2985 11:07:59.155454 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2986 11:07:59.155916 Write Rank0 MR3 =0x30
2987 11:07:59.158690 DramC Write-DBI off
2988 11:07:59.159141
2989 11:07:59.159456 [DATLAT]
2990 11:07:59.161838 Freq=1600, CH1 RK0, use_rxtx_scan=0
2991 11:07:59.162227
2992 11:07:59.165214 DATLAT Default: 0xf
2993 11:07:59.165682 7, 0xFFFF, sum=0
2994 11:07:59.168817 8, 0xFFFF, sum=0
2995 11:07:59.169327 9, 0xFFFF, sum=0
2996 11:07:59.172122 10, 0xFFFF, sum=0
2997 11:07:59.172582 11, 0xFFFF, sum=0
2998 11:07:59.175485 12, 0xFFFF, sum=0
2999 11:07:59.175949 13, 0xFFFF, sum=0
3000 11:07:59.176257 14, 0x0, sum=1
3001 11:07:59.178648 15, 0x0, sum=2
3002 11:07:59.179037 16, 0x0, sum=3
3003 11:07:59.181638 17, 0x0, sum=4
3004 11:07:59.185716 pattern=2 first_step=14 total pass=5 best_step=16
3005 11:07:59.186181 ==
3006 11:07:59.192491 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3007 11:07:59.195011 fsp= 1, odt_onoff= 1, Byte mode= 0
3008 11:07:59.195400 ==
3009 11:07:59.198537 Start DQ dly to find pass range UseTestEngine =1
3010 11:07:59.201994 x-axis: bit #, y-axis: DQ dly (-127~63)
3011 11:07:59.202452 RX Vref Scan = 1
3012 11:07:59.318679
3013 11:07:59.319171 RX Vref found, early break!
3014 11:07:59.319508
3015 11:07:59.324970 Final RX Vref 12, apply to both rank0 and 1
3016 11:07:59.325522 ==
3017 11:07:59.328750 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3018 11:07:59.331471 fsp= 1, odt_onoff= 1, Byte mode= 0
3019 11:07:59.331862 ==
3020 11:07:59.332159 DQS Delay:
3021 11:07:59.335788 DQS0 = 0, DQS1 = 0
3022 11:07:59.336366 DQM Delay:
3023 11:07:59.338467 DQM0 = 21, DQM1 = 19
3024 11:07:59.338891 DQ Delay:
3025 11:07:59.341650 DQ0 =23, DQ1 =21, DQ2 =20, DQ3 =19
3026 11:07:59.344842 DQ4 =21, DQ5 =23, DQ6 =24, DQ7 =22
3027 11:07:59.348845 DQ8 =18, DQ9 =16, DQ10 =22, DQ11 =22
3028 11:07:59.351417 DQ12 =21, DQ13 =22, DQ14 =21, DQ15 =16
3029 11:07:59.351797
3030 11:07:59.352110
3031 11:07:59.352502
3032 11:07:59.355294 [DramC_TX_OE_Calibration] TA2
3033 11:07:59.358860 Original DQ_B0 (3 6) =30, OEN = 27
3034 11:07:59.361862 Original DQ_B1 (3 6) =30, OEN = 27
3035 11:07:59.364607 23, 0x0, End_B0=23 End_B1=23
3036 11:07:59.364996 24, 0x0, End_B0=24 End_B1=24
3037 11:07:59.367983 25, 0x0, End_B0=25 End_B1=25
3038 11:07:59.371980 26, 0x0, End_B0=26 End_B1=26
3039 11:07:59.374435 27, 0x0, End_B0=27 End_B1=27
3040 11:07:59.378079 28, 0x0, End_B0=28 End_B1=28
3041 11:07:59.378471 29, 0x0, End_B0=29 End_B1=29
3042 11:07:59.381072 30, 0x0, End_B0=30 End_B1=30
3043 11:07:59.384603 31, 0xFFFF, End_B0=30 End_B1=30
3044 11:07:59.391327 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3045 11:07:59.394407 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3046 11:07:59.394804
3047 11:07:59.395104
3048 11:07:59.397953 Write Rank0 MR23 =0x3f
3049 11:07:59.398339 [DQSOSC]
3050 11:07:59.407831 [DQSOSCAuto] RK0, (LSB)MR18= 0xbcbc, (MSB)MR19= 0x202, tDQSOscB0 = 450 ps tDQSOscB1 = 450 ps
3051 11:07:59.414770 CH1_RK0: MR19=0x202, MR18=0xBCBC, DQSOSC=450, MR23=63, INC=12, DEC=18
3052 11:07:59.415231 Write Rank0 MR23 =0x3f
3053 11:07:59.415534 [DQSOSC]
3054 11:07:59.424586 [DQSOSCAuto] RK0, (LSB)MR18= 0xbebe, (MSB)MR19= 0x202, tDQSOscB0 = 448 ps tDQSOscB1 = 448 ps
3055 11:07:59.427698 CH1 RK0: MR19=202, MR18=BEBE
3056 11:07:59.431283 [RankSwap] Rank num 2, (Multi 1), Rank 1
3057 11:07:59.431671 Write Rank0 MR2 =0xad
3058 11:07:59.434387 [Write Leveling]
3059 11:07:59.437602 delay byte0 byte1 byte2 byte3
3060 11:07:59.437985
3061 11:07:59.438283 10 0 0
3062 11:07:59.441077 11 0 0
3063 11:07:59.441502 12 0 0
3064 11:07:59.444385 13 0 0
3065 11:07:59.444779 14 0 0
3066 11:07:59.445082 15 0 0
3067 11:07:59.447185 16 0 0
3068 11:07:59.447576 17 0 0
3069 11:07:59.450958 18 0 0
3070 11:07:59.451350 19 0 0
3071 11:07:59.451651 20 0 0
3072 11:07:59.454047 21 0 0
3073 11:07:59.454501 22 0 0
3074 11:07:59.457672 23 0 0
3075 11:07:59.458067 24 0 0
3076 11:07:59.460916 25 0 0
3077 11:07:59.461352 26 0 0
3078 11:07:59.461658 27 0 0
3079 11:07:59.464301 28 0 0
3080 11:07:59.464765 29 0 0
3081 11:07:59.467557 30 0 0
3082 11:07:59.467949 31 0 0
3083 11:07:59.468255 32 0 ff
3084 11:07:59.471447 33 0 ff
3085 11:07:59.471839 34 0 ff
3086 11:07:59.474004 35 0 ff
3087 11:07:59.474394 36 0 ff
3088 11:07:59.477553 37 0 ff
3089 11:07:59.478024 38 ff ff
3090 11:07:59.480780 39 0 ff
3091 11:07:59.481226 40 ff ff
3092 11:07:59.483894 41 ff ff
3093 11:07:59.484356 42 ff ff
3094 11:07:59.484664 43 ff ff
3095 11:07:59.487463 44 ff ff
3096 11:07:59.487953 45 ff ff
3097 11:07:59.490500 46 ff ff
3098 11:07:59.493860 pass bytecount = 0xff (0xff: all bytes pass)
3099 11:07:59.494247
3100 11:07:59.497138 DQS0 dly: 40
3101 11:07:59.497633 DQS1 dly: 32
3102 11:07:59.497939 Write Rank0 MR2 =0x2d
3103 11:07:59.504049 [RankSwap] Rank num 2, (Multi 1), Rank 0
3104 11:07:59.504436 Write Rank1 MR1 =0xd6
3105 11:07:59.504738 [Gating]
3106 11:07:59.507587 ==
3107 11:07:59.510216 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3108 11:07:59.513785 fsp= 1, odt_onoff= 1, Byte mode= 0
3109 11:07:59.514177 ==
3110 11:07:59.517290 3 1 0 |3534 2d2c |(11 11)(11 11) |(0 0)(1 1)| 0
3111 11:07:59.524088 3 1 4 |3534 2d2c |(11 11)(11 11) |(0 0)(0 0)| 0
3112 11:07:59.527253 3 1 8 |3534 1918 |(11 11)(11 11) |(1 1)(1 1)| 0
3113 11:07:59.530300 3 1 12 |3534 2423 |(11 11)(11 11) |(1 1)(1 0)| 0
3114 11:07:59.537690 3 1 16 |3534 2c2c |(11 11)(0 0) |(0 1)(1 1)| 0
3115 11:07:59.540810 3 1 20 |3534 909 |(11 11)(11 11) |(0 1)(1 0)| 0
3116 11:07:59.543724 3 1 24 |3534 2d2d |(11 11)(10 10) |(0 1)(0 1)| 0
3117 11:07:59.546941 3 1 28 |3534 2e2d |(11 11)(1 1) |(0 1)(0 1)| 0
3118 11:07:59.553299 3 2 0 |3534 2d2c |(11 11)(11 11) |(0 1)(1 0)| 0
3119 11:07:59.556982 3 2 4 |3534 2e2d |(11 11)(11 11) |(0 1)(0 1)| 0
3120 11:07:59.560211 3 2 8 |3534 2e2d |(11 11)(11 11) |(0 1)(0 1)| 0
3121 11:07:59.566875 3 2 12 |201 2d2c |(11 11)(11 11) |(1 1)(1 0)| 0
3122 11:07:59.570684 3 2 16 |3d3d 2e2e |(11 11)(10 10) |(1 1)(1 0)| 0
3123 11:07:59.573411 3 2 20 |3d3d 302 |(11 11)(11 11) |(1 1)(0 0)| 0
3124 11:07:59.580045 3 2 24 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
3125 11:07:59.583964 3 2 28 |3d3d 3636 |(11 11)(10 10) |(1 1)(0 0)| 0
3126 11:07:59.586880 3 3 0 |3d3d 3635 |(11 11)(11 11) |(1 1)(0 0)| 0
3127 11:07:59.590077 3 3 4 |3d3d 3636 |(11 11)(11 11) |(1 1)(0 0)| 0
3128 11:07:59.597072 3 3 8 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3129 11:07:59.600040 3 3 12 |3d3d 807 |(11 11)(11 11) |(1 1)(1 1)| 0
3130 11:07:59.603452 3 3 16 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3131 11:07:59.609915 3 3 20 |3534 1110 |(11 11)(11 11) |(1 1)(1 1)| 0
3132 11:07:59.613652 [Byte 0] Lead/lag falling Transition (3, 3, 20)
3133 11:07:59.617033 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3134 11:07:59.620998 [Byte 1] Lead/lag falling Transition (3, 3, 24)
3135 11:07:59.626576 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3136 11:07:59.630028 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3137 11:07:59.633640 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3138 11:07:59.641363 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3139 11:07:59.643936 3 4 12 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3140 11:07:59.646548 3 4 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3141 11:07:59.653560 3 4 20 |3d3d e0d |(11 11)(11 11) |(1 1)(1 1)| 0
3142 11:07:59.657037 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3143 11:07:59.660472 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3144 11:07:59.663721 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3145 11:07:59.670225 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3146 11:07:59.674077 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3147 11:07:59.676583 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3148 11:07:59.684010 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3149 11:07:59.686790 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3150 11:07:59.690111 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3151 11:07:59.696813 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3152 11:07:59.700532 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3153 11:07:59.703301 [Byte 0] Lead/lag falling Transition (3, 6, 0)
3154 11:07:59.707045 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3155 11:07:59.713248 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3156 11:07:59.716705 [Byte 0] Lead/lag Transition tap number (3)
3157 11:07:59.720745 [Byte 1] Lead/lag falling Transition (3, 6, 8)
3158 11:07:59.723795 3 6 12 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3159 11:07:59.730822 3 6 16 |606 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3160 11:07:59.733872 [Byte 1] Lead/lag Transition tap number (3)
3161 11:07:59.736787 3 6 20 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3162 11:07:59.740413 [Byte 0]First pass (3, 6, 20)
3163 11:07:59.743680 3 6 24 |4646 404 |(0 0)(1 1) |(0 0)(0 0)| 0
3164 11:07:59.747031 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3165 11:07:59.749879 [Byte 1]First pass (3, 6, 28)
3166 11:07:59.753413 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3167 11:07:59.759618 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3168 11:07:59.762922 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3169 11:07:59.767079 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3170 11:07:59.769726 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3171 11:07:59.773646 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3172 11:07:59.779852 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3173 11:07:59.783185 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3174 11:07:59.787061 All bytes gating window > 1UI, Early break!
3175 11:07:59.787559
3176 11:07:59.789890 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
3177 11:07:59.790384
3178 11:07:59.793513 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 14)
3179 11:07:59.793936
3180 11:07:59.794263
3181 11:07:59.794563
3182 11:07:59.799952 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
3183 11:07:59.800413
3184 11:07:59.803342 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
3185 11:07:59.803767
3186 11:07:59.804089
3187 11:07:59.804474 Write Rank1 MR1 =0x56
3188 11:07:59.806687
3189 11:07:59.807116 best RODT dly(2T, 0.5T) = (2, 3)
3190 11:07:59.807444
3191 11:07:59.810033 best RODT dly(2T, 0.5T) = (2, 3)
3192 11:07:59.810411 ==
3193 11:07:59.816534 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3194 11:07:59.819827 fsp= 1, odt_onoff= 1, Byte mode= 0
3195 11:07:59.820249 ==
3196 11:07:59.823769 Start DQ dly to find pass range UseTestEngine =0
3197 11:07:59.826518 x-axis: bit #, y-axis: DQ dly (-127~63)
3198 11:07:59.829776 RX Vref Scan = 0
3199 11:07:59.833178 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3200 11:07:59.836742 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3201 11:07:59.837286 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3202 11:07:59.840188 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3203 11:07:59.843551 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3204 11:07:59.847001 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3205 11:07:59.850017 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3206 11:07:59.853754 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3207 11:07:59.856761 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3208 11:07:59.860218 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3209 11:07:59.860731 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3210 11:07:59.863159 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3211 11:07:59.866226 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3212 11:07:59.869821 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3213 11:07:59.873461 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3214 11:07:59.876723 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3215 11:07:59.880380 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3216 11:07:59.883525 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3217 11:07:59.883982 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3218 11:07:59.886327 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3219 11:07:59.889215 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3220 11:07:59.892605 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3221 11:07:59.896124 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3222 11:07:59.899433 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3223 11:07:59.902479 -2, [0] xxxxxxxx xxxxxxxx [MSB]
3224 11:07:59.906017 -1, [0] xxxxxxxx xxxxxxxx [MSB]
3225 11:07:59.906177 0, [0] xxxxxxxx xxxxxxxo [MSB]
3226 11:07:59.909651 1, [0] xxxxxxxx xoxxxxxo [MSB]
3227 11:07:59.912594 2, [0] xxxoxxxx xoxxxxxo [MSB]
3228 11:07:59.915936 3, [0] xxxoxxxx ooxxxxxo [MSB]
3229 11:07:59.919719 4, [0] xxooxxxx ooxxxxxo [MSB]
3230 11:07:59.919914 5, [0] xxooxxxx oooxxxxo [MSB]
3231 11:07:59.922674 6, [0] xxoooxxx oooooxoo [MSB]
3232 11:07:59.926028 7, [0] xooooxxo oooooooo [MSB]
3233 11:07:59.929364 31, [0] oooooooo ooooooox [MSB]
3234 11:07:59.932511 32, [0] oooooooo ooooooox [MSB]
3235 11:07:59.936163 33, [0] oooooooo ooooooox [MSB]
3236 11:07:59.939899 34, [0] oooooooo oxooooox [MSB]
3237 11:07:59.940194 35, [0] oooxoooo xxooooox [MSB]
3238 11:07:59.942979 36, [0] ooxxoooo xxooooox [MSB]
3239 11:07:59.946221 37, [0] ooxxoooo xxooooox [MSB]
3240 11:07:59.949784 38, [0] ooxxoooo xxxoooox [MSB]
3241 11:07:59.952491 39, [0] ooxxxoox xxxxxxxx [MSB]
3242 11:07:59.955808 40, [0] oxxxxoox xxxxxxxx [MSB]
3243 11:07:59.959770 41, [0] xxxxxxox xxxxxxxx [MSB]
3244 11:07:59.960275 42, [0] xxxxxxxx xxxxxxxx [MSB]
3245 11:07:59.966269 iDelay=42, Bit 0, Center 24 (8 ~ 40) 33
3246 11:07:59.969691 iDelay=42, Bit 1, Center 23 (7 ~ 39) 33
3247 11:07:59.974159 iDelay=42, Bit 2, Center 19 (4 ~ 35) 32
3248 11:07:59.975713 iDelay=42, Bit 3, Center 18 (2 ~ 34) 33
3249 11:07:59.979026 iDelay=42, Bit 4, Center 22 (6 ~ 38) 33
3250 11:07:59.983068 iDelay=42, Bit 5, Center 24 (8 ~ 40) 33
3251 11:07:59.986140 iDelay=42, Bit 6, Center 24 (8 ~ 41) 34
3252 11:07:59.989288 iDelay=42, Bit 7, Center 22 (7 ~ 38) 32
3253 11:07:59.992666 iDelay=42, Bit 8, Center 18 (3 ~ 34) 32
3254 11:07:59.995710 iDelay=42, Bit 9, Center 17 (1 ~ 33) 33
3255 11:07:59.998975 iDelay=42, Bit 10, Center 21 (5 ~ 37) 33
3256 11:08:00.003434 iDelay=42, Bit 11, Center 22 (6 ~ 38) 33
3257 11:08:00.005645 iDelay=42, Bit 12, Center 22 (6 ~ 38) 33
3258 11:08:00.012541 iDelay=42, Bit 13, Center 22 (7 ~ 38) 32
3259 11:08:00.015620 iDelay=42, Bit 14, Center 22 (6 ~ 38) 33
3260 11:08:00.018972 iDelay=42, Bit 15, Center 15 (0 ~ 30) 31
3261 11:08:00.019401 ==
3262 11:08:00.022757 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3263 11:08:00.025519 fsp= 1, odt_onoff= 1, Byte mode= 0
3264 11:08:00.026025 ==
3265 11:08:00.028938 DQS Delay:
3266 11:08:00.029504 DQS0 = 0, DQS1 = 0
3267 11:08:00.032586 DQM Delay:
3268 11:08:00.033007 DQM0 = 22, DQM1 = 19
3269 11:08:00.033380 DQ Delay:
3270 11:08:00.035271 DQ0 =24, DQ1 =23, DQ2 =19, DQ3 =18
3271 11:08:00.038933 DQ4 =22, DQ5 =24, DQ6 =24, DQ7 =22
3272 11:08:00.042242 DQ8 =18, DQ9 =17, DQ10 =21, DQ11 =22
3273 11:08:00.045387 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =15
3274 11:08:00.045889
3275 11:08:00.046230
3276 11:08:00.048972 DramC Write-DBI off
3277 11:08:00.049559 ==
3278 11:08:00.055546 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3279 11:08:00.055974 fsp= 1, odt_onoff= 1, Byte mode= 0
3280 11:08:00.058530 ==
3281 11:08:00.062003 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3282 11:08:00.062495
3283 11:08:00.064912 Begin, DQ Scan Range 928~1184
3284 11:08:00.065318
3285 11:08:00.065618
3286 11:08:00.065893 TX Vref Scan disable
3287 11:08:00.068371 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3288 11:08:00.075188 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3289 11:08:00.078754 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3290 11:08:00.081734 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3291 11:08:00.085172 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3292 11:08:00.088421 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3293 11:08:00.091643 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3294 11:08:00.094653 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3295 11:08:00.098466 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3296 11:08:00.101787 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3297 11:08:00.104542 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3298 11:08:00.108128 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3299 11:08:00.111132 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3300 11:08:00.115131 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3301 11:08:00.118828 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3302 11:08:00.121307 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3303 11:08:00.128084 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3304 11:08:00.131775 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3305 11:08:00.134590 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3306 11:08:00.137631 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3307 11:08:00.141567 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3308 11:08:00.144399 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3309 11:08:00.148368 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3310 11:08:00.151185 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3311 11:08:00.154456 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3312 11:08:00.158113 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3313 11:08:00.160823 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3314 11:08:00.164502 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3315 11:08:00.167768 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3316 11:08:00.170970 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3317 11:08:00.177981 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3318 11:08:00.180943 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3319 11:08:00.184220 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3320 11:08:00.187595 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3321 11:08:00.191496 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3322 11:08:00.193720 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3323 11:08:00.197435 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3324 11:08:00.200918 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3325 11:08:00.203641 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3326 11:08:00.207156 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3327 11:08:00.210262 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3328 11:08:00.214240 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3329 11:08:00.216926 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3330 11:08:00.219994 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3331 11:08:00.223427 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3332 11:08:00.227109 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3333 11:08:00.230404 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
3334 11:08:00.236908 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
3335 11:08:00.240189 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
3336 11:08:00.243445 977 |3 6 17|[0] xxxxxxxx ooxxxxxo [MSB]
3337 11:08:00.246877 978 |3 6 18|[0] xxxxxxxx ooxxxxxo [MSB]
3338 11:08:00.250281 979 |3 6 19|[0] xxxxxxxx oooxxxoo [MSB]
3339 11:08:00.253222 980 |3 6 20|[0] xxxxxxxx oooxxxoo [MSB]
3340 11:08:00.256754 981 |3 6 21|[0] xxxxxxxx ooooxxoo [MSB]
3341 11:08:00.259539 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
3342 11:08:00.263294 983 |3 6 23|[0] xxxxxxxx oooooooo [MSB]
3343 11:08:00.266564 984 |3 6 24|[0] xxxxxxxx oooooooo [MSB]
3344 11:08:00.269591 985 |3 6 25|[0] xxoooxoo oooooooo [MSB]
3345 11:08:00.276978 994 |3 6 34|[0] oooooooo ooooooox [MSB]
3346 11:08:00.280443 995 |3 6 35|[0] oooooooo xxooooox [MSB]
3347 11:08:00.283450 996 |3 6 36|[0] oooooooo xxooooox [MSB]
3348 11:08:00.286536 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3349 11:08:00.290309 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3350 11:08:00.293260 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
3351 11:08:00.296965 1000 |3 6 40|[0] oooooooo xxxxxxxx [MSB]
3352 11:08:00.300063 1001 |3 6 41|[0] oooooooo xxxxxxxx [MSB]
3353 11:08:00.303395 1002 |3 6 42|[0] oooooooo xxxxxxxx [MSB]
3354 11:08:00.307275 1003 |3 6 43|[0] oooooooo xxxxxxxx [MSB]
3355 11:08:00.310493 1004 |3 6 44|[0] oooxoooo xxxxxxxx [MSB]
3356 11:08:00.312922 1005 |3 6 45|[0] oooxoooo xxxxxxxx [MSB]
3357 11:08:00.319428 1006 |3 6 46|[0] oooxoooo xxxxxxxx [MSB]
3358 11:08:00.322913 1007 |3 6 47|[0] oxxxoooo xxxxxxxx [MSB]
3359 11:08:00.326177 1008 |3 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
3360 11:08:00.329719 Byte0, DQ PI dly=995, DQM PI dly= 995
3361 11:08:00.332702 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 35)
3362 11:08:00.333160
3363 11:08:00.336265 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 35)
3364 11:08:00.339358
3365 11:08:00.342641 Byte1, DQ PI dly=987, DQM PI dly= 987
3366 11:08:00.346095 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
3367 11:08:00.346610
3368 11:08:00.349577 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
3369 11:08:00.350104
3370 11:08:00.350437 ==
3371 11:08:00.356434 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3372 11:08:00.359304 fsp= 1, odt_onoff= 1, Byte mode= 0
3373 11:08:00.359735 ==
3374 11:08:00.363433 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3375 11:08:00.363939
3376 11:08:00.365618 Begin, DQ Scan Range 963~1027
3377 11:08:00.369209 Write Rank1 MR14 =0x0
3378 11:08:00.376290
3379 11:08:00.376799 CH=1, VrefRange= 0, VrefLevel = 0
3380 11:08:00.382898 TX Bit0 (990~1002) 13 996, Bit8 (980~991) 12 985,
3381 11:08:00.386434 TX Bit1 (988~1001) 14 994, Bit9 (980~990) 11 985,
3382 11:08:00.393100 TX Bit2 (986~1000) 15 993, Bit10 (983~993) 11 988,
3383 11:08:00.396013 TX Bit3 (984~997) 14 990, Bit11 (983~995) 13 989,
3384 11:08:00.399621 TX Bit4 (986~1003) 18 994, Bit12 (983~994) 12 988,
3385 11:08:00.406230 TX Bit5 (990~1001) 12 995, Bit13 (984~993) 10 988,
3386 11:08:00.408896 TX Bit6 (987~1001) 15 994, Bit14 (983~993) 11 988,
3387 11:08:00.415918 TX Bit7 (987~1001) 15 994, Bit15 (976~987) 12 981,
3388 11:08:00.416352
3389 11:08:00.416691 Write Rank1 MR14 =0x2
3390 11:08:00.425239
3391 11:08:00.425744 CH=1, VrefRange= 0, VrefLevel = 2
3392 11:08:00.431364 TX Bit0 (990~1003) 14 996, Bit8 (978~992) 15 985,
3393 11:08:00.435094 TX Bit1 (987~1002) 16 994, Bit9 (979~991) 13 985,
3394 11:08:00.441583 TX Bit2 (985~1001) 17 993, Bit10 (982~994) 13 988,
3395 11:08:00.445047 TX Bit3 (983~998) 16 990, Bit11 (983~996) 14 989,
3396 11:08:00.448295 TX Bit4 (986~1003) 18 994, Bit12 (983~994) 12 988,
3397 11:08:00.455172 TX Bit5 (989~1002) 14 995, Bit13 (984~994) 11 989,
3398 11:08:00.458030 TX Bit6 (987~1002) 16 994, Bit14 (983~994) 12 988,
3399 11:08:00.464975 TX Bit7 (987~1003) 17 995, Bit15 (975~988) 14 981,
3400 11:08:00.465532
3401 11:08:00.465866 Write Rank1 MR14 =0x4
3402 11:08:00.473934
3403 11:08:00.474432 CH=1, VrefRange= 0, VrefLevel = 4
3404 11:08:00.481301 TX Bit0 (989~1005) 17 997, Bit8 (978~992) 15 985,
3405 11:08:00.484465 TX Bit1 (987~1003) 17 995, Bit9 (979~991) 13 985,
3406 11:08:00.490569 TX Bit2 (985~1002) 18 993, Bit10 (982~995) 14 988,
3407 11:08:00.494248 TX Bit3 (983~999) 17 991, Bit11 (983~997) 15 990,
3408 11:08:00.497518 TX Bit4 (986~1004) 19 995, Bit12 (983~995) 13 989,
3409 11:08:00.503995 TX Bit5 (989~1003) 15 996, Bit13 (983~995) 13 989,
3410 11:08:00.507600 TX Bit6 (987~1003) 17 995, Bit14 (983~995) 13 989,
3411 11:08:00.514294 TX Bit7 (987~1003) 17 995, Bit15 (975~989) 15 982,
3412 11:08:00.514785
3413 11:08:00.515410 Write Rank1 MR14 =0x6
3414 11:08:00.523327
3415 11:08:00.523710 CH=1, VrefRange= 0, VrefLevel = 6
3416 11:08:00.530068 TX Bit0 (988~1005) 18 996, Bit8 (978~992) 15 985,
3417 11:08:00.533163 TX Bit1 (987~1003) 17 995, Bit9 (979~992) 14 985,
3418 11:08:00.539635 TX Bit2 (985~1002) 18 993, Bit10 (981~995) 15 988,
3419 11:08:00.543675 TX Bit3 (983~1000) 18 991, Bit11 (982~998) 17 990,
3420 11:08:00.546151 TX Bit4 (985~1005) 21 995, Bit12 (983~995) 13 989,
3421 11:08:00.553093 TX Bit5 (987~1004) 18 995, Bit13 (983~996) 14 989,
3422 11:08:00.556748 TX Bit6 (986~1004) 19 995, Bit14 (982~995) 14 988,
3423 11:08:00.562782 TX Bit7 (987~1004) 18 995, Bit15 (975~991) 17 983,
3424 11:08:00.563166
3425 11:08:00.563460 Write Rank1 MR14 =0x8
3426 11:08:00.573219
3427 11:08:00.573678 CH=1, VrefRange= 0, VrefLevel = 8
3428 11:08:00.579557 TX Bit0 (988~1006) 19 997, Bit8 (977~993) 17 985,
3429 11:08:00.583015 TX Bit1 (986~1005) 20 995, Bit9 (978~992) 15 985,
3430 11:08:00.589298 TX Bit2 (985~1003) 19 994, Bit10 (981~996) 16 988,
3431 11:08:00.592971 TX Bit3 (983~1001) 19 992, Bit11 (982~998) 17 990,
3432 11:08:00.595904 TX Bit4 (986~1006) 21 996, Bit12 (982~996) 15 989,
3433 11:08:00.602812 TX Bit5 (987~1005) 19 996, Bit13 (983~996) 14 989,
3434 11:08:00.605831 TX Bit6 (986~1004) 19 995, Bit14 (982~996) 15 989,
3435 11:08:00.612808 TX Bit7 (986~1005) 20 995, Bit15 (974~991) 18 982,
3436 11:08:00.613241
3437 11:08:00.613546 Write Rank1 MR14 =0xa
3438 11:08:00.622304
3439 11:08:00.625882 CH=1, VrefRange= 0, VrefLevel = 10
3440 11:08:00.629350 TX Bit0 (988~1006) 19 997, Bit8 (977~993) 17 985,
3441 11:08:00.632560 TX Bit1 (987~1005) 19 996, Bit9 (978~992) 15 985,
3442 11:08:00.638973 TX Bit2 (985~1004) 20 994, Bit10 (980~997) 18 988,
3443 11:08:00.642104 TX Bit3 (982~1001) 20 991, Bit11 (981~999) 19 990,
3444 11:08:00.646255 TX Bit4 (985~1006) 22 995, Bit12 (982~998) 17 990,
3445 11:08:00.652497 TX Bit5 (987~1006) 20 996, Bit13 (983~997) 15 990,
3446 11:08:00.655825 TX Bit6 (986~1005) 20 995, Bit14 (981~997) 17 989,
3447 11:08:00.662004 TX Bit7 (986~1006) 21 996, Bit15 (974~992) 19 983,
3448 11:08:00.662425
3449 11:08:00.662718 Write Rank1 MR14 =0xc
3450 11:08:00.672648
3451 11:08:00.675553 CH=1, VrefRange= 0, VrefLevel = 12
3452 11:08:00.678796 TX Bit0 (987~1007) 21 997, Bit8 (976~993) 18 984,
3453 11:08:00.682545 TX Bit1 (986~1006) 21 996, Bit9 (977~993) 17 985,
3454 11:08:00.688589 TX Bit2 (984~1004) 21 994, Bit10 (980~998) 19 989,
3455 11:08:00.692396 TX Bit3 (982~1002) 21 992, Bit11 (981~999) 19 990,
3456 11:08:00.695760 TX Bit4 (985~1006) 22 995, Bit12 (982~998) 17 990,
3457 11:08:00.701908 TX Bit5 (987~1006) 20 996, Bit13 (982~998) 17 990,
3458 11:08:00.704966 TX Bit6 (986~1006) 21 996, Bit14 (981~998) 18 989,
3459 11:08:00.711767 TX Bit7 (986~1006) 21 996, Bit15 (974~992) 19 983,
3460 11:08:00.712192
3461 11:08:00.712516 Write Rank1 MR14 =0xe
3462 11:08:00.721762
3463 11:08:00.725282 CH=1, VrefRange= 0, VrefLevel = 14
3464 11:08:00.728587 TX Bit0 (987~1007) 21 997, Bit8 (976~994) 19 985,
3465 11:08:00.731767 TX Bit1 (986~1006) 21 996, Bit9 (977~993) 17 985,
3466 11:08:00.738226 TX Bit2 (984~1005) 22 994, Bit10 (980~998) 19 989,
3467 11:08:00.742121 TX Bit3 (982~1002) 21 992, Bit11 (981~999) 19 990,
3468 11:08:00.748776 TX Bit4 (985~1007) 23 996, Bit12 (981~999) 19 990,
3469 11:08:00.751418 TX Bit5 (986~1007) 22 996, Bit13 (982~999) 18 990,
3470 11:08:00.755053 TX Bit6 (985~1006) 22 995, Bit14 (981~998) 18 989,
3471 11:08:00.761750 TX Bit7 (986~1006) 21 996, Bit15 (973~992) 20 982,
3472 11:08:00.762261
3473 11:08:00.762593 Write Rank1 MR14 =0x10
3474 11:08:00.772413
3475 11:08:00.775154 CH=1, VrefRange= 0, VrefLevel = 16
3476 11:08:00.778564 TX Bit0 (987~1007) 21 997, Bit8 (976~995) 20 985,
3477 11:08:00.781783 TX Bit1 (986~1006) 21 996, Bit9 (977~993) 17 985,
3478 11:08:00.788338 TX Bit2 (984~1006) 23 995, Bit10 (979~999) 21 989,
3479 11:08:00.791664 TX Bit3 (981~1003) 23 992, Bit11 (980~1000) 21 990,
3480 11:08:00.795338 TX Bit4 (985~1007) 23 996, Bit12 (981~999) 19 990,
3481 11:08:00.802003 TX Bit5 (986~1007) 22 996, Bit13 (982~999) 18 990,
3482 11:08:00.804425 TX Bit6 (985~1007) 23 996, Bit14 (980~999) 20 989,
3483 11:08:00.811452 TX Bit7 (986~1006) 21 996, Bit15 (973~993) 21 983,
3484 11:08:00.812019
3485 11:08:00.812353 Write Rank1 MR14 =0x12
3486 11:08:00.821547
3487 11:08:00.825078 CH=1, VrefRange= 0, VrefLevel = 18
3488 11:08:00.828509 TX Bit0 (986~1007) 22 996, Bit8 (976~995) 20 985,
3489 11:08:00.831377 TX Bit1 (986~1007) 22 996, Bit9 (976~994) 19 985,
3490 11:08:00.838349 TX Bit2 (983~1006) 24 994, Bit10 (978~999) 22 988,
3491 11:08:00.842568 TX Bit3 (981~1003) 23 992, Bit11 (980~1000) 21 990,
3492 11:08:00.848441 TX Bit4 (984~1007) 24 995, Bit12 (981~999) 19 990,
3493 11:08:00.851573 TX Bit5 (986~1007) 22 996, Bit13 (981~1000) 20 990,
3494 11:08:00.854505 TX Bit6 (985~1007) 23 996, Bit14 (979~999) 21 989,
3495 11:08:00.861531 TX Bit7 (985~1007) 23 996, Bit15 (972~993) 22 982,
3496 11:08:00.862038
3497 11:08:00.862374 Write Rank1 MR14 =0x14
3498 11:08:00.871724
3499 11:08:00.874942 CH=1, VrefRange= 0, VrefLevel = 20
3500 11:08:00.878435 TX Bit0 (986~1008) 23 997, Bit8 (975~996) 22 985,
3501 11:08:00.882122 TX Bit1 (986~1007) 22 996, Bit9 (976~995) 20 985,
3502 11:08:00.888513 TX Bit2 (983~1006) 24 994, Bit10 (978~999) 22 988,
3503 11:08:00.891474 TX Bit3 (980~1004) 25 992, Bit11 (980~1000) 21 990,
3504 11:08:00.895389 TX Bit4 (984~1007) 24 995, Bit12 (980~999) 20 989,
3505 11:08:00.902103 TX Bit5 (986~1007) 22 996, Bit13 (981~1000) 20 990,
3506 11:08:00.905242 TX Bit6 (985~1007) 23 996, Bit14 (979~999) 21 989,
3507 11:08:00.912060 TX Bit7 (985~1007) 23 996, Bit15 (972~993) 22 982,
3508 11:08:00.912488
3509 11:08:00.912816 Write Rank1 MR14 =0x16
3510 11:08:00.922232
3511 11:08:00.925072 CH=1, VrefRange= 0, VrefLevel = 22
3512 11:08:00.928671 TX Bit0 (986~1008) 23 997, Bit8 (975~997) 23 986,
3513 11:08:00.932057 TX Bit1 (985~1007) 23 996, Bit9 (975~996) 22 985,
3514 11:08:00.938986 TX Bit2 (983~1007) 25 995, Bit10 (978~999) 22 988,
3515 11:08:00.942090 TX Bit3 (980~1004) 25 992, Bit11 (979~1000) 22 989,
3516 11:08:00.948574 TX Bit4 (984~1007) 24 995, Bit12 (979~1000) 22 989,
3517 11:08:00.951724 TX Bit5 (985~1008) 24 996, Bit13 (981~1000) 20 990,
3518 11:08:00.955499 TX Bit6 (985~1007) 23 996, Bit14 (979~999) 21 989,
3519 11:08:00.961994 TX Bit7 (985~1007) 23 996, Bit15 (971~994) 24 982,
3520 11:08:00.962502
3521 11:08:00.962832 Write Rank1 MR14 =0x18
3522 11:08:00.972652
3523 11:08:00.975033 CH=1, VrefRange= 0, VrefLevel = 24
3524 11:08:00.978798 TX Bit0 (986~1008) 23 997, Bit8 (974~997) 24 985,
3525 11:08:00.981843 TX Bit1 (985~1008) 24 996, Bit9 (975~997) 23 986,
3526 11:08:00.988831 TX Bit2 (983~1007) 25 995, Bit10 (977~1000) 24 988,
3527 11:08:00.992105 TX Bit3 (980~1006) 27 993, Bit11 (978~1001) 24 989,
3528 11:08:00.998354 TX Bit4 (984~1008) 25 996, Bit12 (979~1000) 22 989,
3529 11:08:01.001713 TX Bit5 (985~1008) 24 996, Bit13 (981~1000) 20 990,
3530 11:08:01.004942 TX Bit6 (984~1007) 24 995, Bit14 (978~1000) 23 989,
3531 11:08:01.011536 TX Bit7 (985~1007) 23 996, Bit15 (971~995) 25 983,
3532 11:08:01.011978
3533 11:08:01.014901 Write Rank1 MR14 =0x1a
3534 11:08:01.023022
3535 11:08:01.025441 CH=1, VrefRange= 0, VrefLevel = 26
3536 11:08:01.029086 TX Bit0 (986~1008) 23 997, Bit8 (974~998) 25 986,
3537 11:08:01.032350 TX Bit1 (985~1008) 24 996, Bit9 (975~997) 23 986,
3538 11:08:01.039528 TX Bit2 (982~1007) 26 994, Bit10 (977~1000) 24 988,
3539 11:08:01.042437 TX Bit3 (980~1006) 27 993, Bit11 (978~1001) 24 989,
3540 11:08:01.049111 TX Bit4 (984~1008) 25 996, Bit12 (979~1000) 22 989,
3541 11:08:01.052408 TX Bit5 (985~1008) 24 996, Bit13 (979~1001) 23 990,
3542 11:08:01.055810 TX Bit6 (984~1008) 25 996, Bit14 (978~1000) 23 989,
3543 11:08:01.062007 TX Bit7 (985~1008) 24 996, Bit15 (970~995) 26 982,
3544 11:08:01.062527
3545 11:08:01.062857 Write Rank1 MR14 =0x1c
3546 11:08:01.073330
3547 11:08:01.076512 CH=1, VrefRange= 0, VrefLevel = 28
3548 11:08:01.079171 TX Bit0 (986~1009) 24 997, Bit8 (974~998) 25 986,
3549 11:08:01.082979 TX Bit1 (985~1008) 24 996, Bit9 (974~998) 25 986,
3550 11:08:01.089351 TX Bit2 (982~1007) 26 994, Bit10 (977~1000) 24 988,
3551 11:08:01.092918 TX Bit3 (979~1006) 28 992, Bit11 (978~1001) 24 989,
3552 11:08:01.099497 TX Bit4 (984~1008) 25 996, Bit12 (978~1001) 24 989,
3553 11:08:01.103027 TX Bit5 (985~1008) 24 996, Bit13 (980~1001) 22 990,
3554 11:08:01.106257 TX Bit6 (984~1008) 25 996, Bit14 (977~1000) 24 988,
3555 11:08:01.112679 TX Bit7 (984~1008) 25 996, Bit15 (970~995) 26 982,
3556 11:08:01.113239
3557 11:08:01.113582 Write Rank1 MR14 =0x1e
3558 11:08:01.123809
3559 11:08:01.126490 CH=1, VrefRange= 0, VrefLevel = 30
3560 11:08:01.130264 TX Bit0 (986~1009) 24 997, Bit8 (975~998) 24 986,
3561 11:08:01.133006 TX Bit1 (984~1008) 25 996, Bit9 (974~998) 25 986,
3562 11:08:01.139815 TX Bit2 (982~1007) 26 994, Bit10 (976~1000) 25 988,
3563 11:08:01.143253 TX Bit3 (979~1006) 28 992, Bit11 (977~1000) 24 988,
3564 11:08:01.150133 TX Bit4 (985~1008) 24 996, Bit12 (978~1001) 24 989,
3565 11:08:01.153579 TX Bit5 (985~1009) 25 997, Bit13 (979~1001) 23 990,
3566 11:08:01.156930 TX Bit6 (984~1008) 25 996, Bit14 (977~1000) 24 988,
3567 11:08:01.163560 TX Bit7 (984~1008) 25 996, Bit15 (970~995) 26 982,
3568 11:08:01.164061
3569 11:08:01.164393 Write Rank1 MR14 =0x20
3570 11:08:01.174198
3571 11:08:01.177562 CH=1, VrefRange= 0, VrefLevel = 32
3572 11:08:01.180678 TX Bit0 (986~1009) 24 997, Bit8 (975~998) 24 986,
3573 11:08:01.184410 TX Bit1 (984~1008) 25 996, Bit9 (974~998) 25 986,
3574 11:08:01.190411 TX Bit2 (982~1007) 26 994, Bit10 (976~1000) 25 988,
3575 11:08:01.193963 TX Bit3 (979~1006) 28 992, Bit11 (977~1000) 24 988,
3576 11:08:01.200073 TX Bit4 (985~1008) 24 996, Bit12 (978~1001) 24 989,
3577 11:08:01.203304 TX Bit5 (985~1009) 25 997, Bit13 (979~1001) 23 990,
3578 11:08:01.206635 TX Bit6 (984~1008) 25 996, Bit14 (977~1000) 24 988,
3579 11:08:01.213177 TX Bit7 (984~1008) 25 996, Bit15 (970~995) 26 982,
3580 11:08:01.213315
3581 11:08:01.216417 Write Rank1 MR14 =0x22
3582 11:08:01.224712
3583 11:08:01.227747 CH=1, VrefRange= 0, VrefLevel = 34
3584 11:08:01.230864 TX Bit0 (986~1009) 24 997, Bit8 (975~998) 24 986,
3585 11:08:01.233932 TX Bit1 (984~1008) 25 996, Bit9 (974~998) 25 986,
3586 11:08:01.241382 TX Bit2 (982~1007) 26 994, Bit10 (976~1000) 25 988,
3587 11:08:01.244603 TX Bit3 (979~1006) 28 992, Bit11 (977~1000) 24 988,
3588 11:08:01.251207 TX Bit4 (985~1008) 24 996, Bit12 (978~1001) 24 989,
3589 11:08:01.253870 TX Bit5 (985~1009) 25 997, Bit13 (979~1001) 23 990,
3590 11:08:01.257428 TX Bit6 (984~1008) 25 996, Bit14 (977~1000) 24 988,
3591 11:08:01.264257 TX Bit7 (984~1008) 25 996, Bit15 (970~995) 26 982,
3592 11:08:01.264610
3593 11:08:01.264826 Write Rank1 MR14 =0x24
3594 11:08:01.275395
3595 11:08:01.278652 CH=1, VrefRange= 0, VrefLevel = 36
3596 11:08:01.282100 TX Bit0 (986~1009) 24 997, Bit8 (975~998) 24 986,
3597 11:08:01.285246 TX Bit1 (984~1008) 25 996, Bit9 (974~998) 25 986,
3598 11:08:01.292228 TX Bit2 (982~1007) 26 994, Bit10 (976~1000) 25 988,
3599 11:08:01.294830 TX Bit3 (979~1006) 28 992, Bit11 (977~1000) 24 988,
3600 11:08:01.301432 TX Bit4 (985~1008) 24 996, Bit12 (978~1001) 24 989,
3601 11:08:01.305395 TX Bit5 (985~1009) 25 997, Bit13 (979~1001) 23 990,
3602 11:08:01.308575 TX Bit6 (984~1008) 25 996, Bit14 (977~1000) 24 988,
3603 11:08:01.314581 TX Bit7 (984~1008) 25 996, Bit15 (970~995) 26 982,
3604 11:08:01.315073
3605 11:08:01.315401 Write Rank1 MR14 =0x26
3606 11:08:01.325775
3607 11:08:01.329052 CH=1, VrefRange= 0, VrefLevel = 38
3608 11:08:01.332941 TX Bit0 (986~1009) 24 997, Bit8 (975~998) 24 986,
3609 11:08:01.336103 TX Bit1 (984~1008) 25 996, Bit9 (974~998) 25 986,
3610 11:08:01.342116 TX Bit2 (982~1007) 26 994, Bit10 (976~1000) 25 988,
3611 11:08:01.345521 TX Bit3 (979~1006) 28 992, Bit11 (977~1000) 24 988,
3612 11:08:01.352290 TX Bit4 (985~1008) 24 996, Bit12 (978~1001) 24 989,
3613 11:08:01.355262 TX Bit5 (985~1009) 25 997, Bit13 (979~1001) 23 990,
3614 11:08:01.358881 TX Bit6 (984~1008) 25 996, Bit14 (977~1000) 24 988,
3615 11:08:01.365816 TX Bit7 (984~1008) 25 996, Bit15 (970~995) 26 982,
3616 11:08:01.366245
3617 11:08:01.366571
3618 11:08:01.368576 TX Vref found, early break! 370< 377
3619 11:08:01.372170 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =833/100 ps
3620 11:08:01.375494 u1DelayCellOfst[0]=5 cells (5 PI)
3621 11:08:01.378453 u1DelayCellOfst[1]=4 cells (4 PI)
3622 11:08:01.382328 u1DelayCellOfst[2]=2 cells (2 PI)
3623 11:08:01.384953 u1DelayCellOfst[3]=0 cells (0 PI)
3624 11:08:01.389333 u1DelayCellOfst[4]=4 cells (4 PI)
3625 11:08:01.391989 u1DelayCellOfst[5]=5 cells (5 PI)
3626 11:08:01.395053 u1DelayCellOfst[6]=4 cells (4 PI)
3627 11:08:01.398535 u1DelayCellOfst[7]=4 cells (4 PI)
3628 11:08:01.402110 Byte0, DQ PI dly=992, DQM PI dly= 994
3629 11:08:01.405274 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
3630 11:08:01.405777
3631 11:08:01.408490 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
3632 11:08:01.408911
3633 11:08:01.411943 u1DelayCellOfst[8]=4 cells (4 PI)
3634 11:08:01.415094 u1DelayCellOfst[9]=4 cells (4 PI)
3635 11:08:01.418577 u1DelayCellOfst[10]=7 cells (6 PI)
3636 11:08:01.421450 u1DelayCellOfst[11]=7 cells (6 PI)
3637 11:08:01.424976 u1DelayCellOfst[12]=8 cells (7 PI)
3638 11:08:01.428208 u1DelayCellOfst[13]=9 cells (8 PI)
3639 11:08:01.432032 u1DelayCellOfst[14]=7 cells (6 PI)
3640 11:08:01.435061 u1DelayCellOfst[15]=0 cells (0 PI)
3641 11:08:01.438370 Byte1, DQ PI dly=982, DQM PI dly= 986
3642 11:08:01.441392 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3643 11:08:01.441823
3644 11:08:01.444622 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3645 11:08:01.447864
3646 11:08:01.448286 Write Rank1 MR14 =0x1e
3647 11:08:01.448609
3648 11:08:01.451838 Final TX Range 0 Vref 30
3649 11:08:01.452341
3650 11:08:01.458229 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3651 11:08:01.458722
3652 11:08:01.464869 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3653 11:08:01.471291 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3654 11:08:01.477736 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3655 11:08:01.481470 Write Rank1 MR3 =0xb0
3656 11:08:01.481969 DramC Write-DBI on
3657 11:08:01.482299 ==
3658 11:08:01.488217 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3659 11:08:01.490815 fsp= 1, odt_onoff= 1, Byte mode= 0
3660 11:08:01.491250 ==
3661 11:08:01.494356 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3662 11:08:01.494906
3663 11:08:01.497801 Begin, DQ Scan Range 706~770
3664 11:08:01.498222
3665 11:08:01.498546
3666 11:08:01.501332 TX Vref Scan disable
3667 11:08:01.504371 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3668 11:08:01.507415 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3669 11:08:01.510654 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3670 11:08:01.515302 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3671 11:08:01.517334 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3672 11:08:01.520550 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3673 11:08:01.524320 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3674 11:08:01.527939 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3675 11:08:01.530859 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3676 11:08:01.534488 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3677 11:08:01.538214 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3678 11:08:01.540724 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3679 11:08:01.544495 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3680 11:08:01.547826 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3681 11:08:01.554017 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3682 11:08:01.557479 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3683 11:08:01.560425 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3684 11:08:01.564319 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3685 11:08:01.566801 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3686 11:08:01.570603 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
3687 11:08:01.573862 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
3688 11:08:01.577477 727 |2 6 23|[0] xxxxxxxx oooooooo [MSB]
3689 11:08:01.580961 728 |2 6 24|[0] xxxxxxxx oooooooo [MSB]
3690 11:08:01.588263 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3691 11:08:01.591211 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3692 11:08:01.594754 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3693 11:08:01.597890 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3694 11:08:01.601535 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3695 11:08:01.604734 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3696 11:08:01.607766 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3697 11:08:01.611454 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3698 11:08:01.614477 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
3699 11:08:01.618053 753 |2 6 49|[0] oooooooo xxxxxxxx [MSB]
3700 11:08:01.620911 754 |2 6 50|[0] oooooooo xxxxxxxx [MSB]
3701 11:08:01.624720 755 |2 6 51|[0] oooooooo xxxxxxxx [MSB]
3702 11:08:01.627839 756 |2 6 52|[0] xxxxxxxx xxxxxxxx [MSB]
3703 11:08:01.631114 Byte0, DQ PI dly=742, DQM PI dly= 742
3704 11:08:01.637996 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 38)
3705 11:08:01.638506
3706 11:08:01.640924 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 38)
3707 11:08:01.641395
3708 11:08:01.645230 Byte1, DQ PI dly=730, DQM PI dly= 730
3709 11:08:01.647914 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
3710 11:08:01.648420
3711 11:08:01.654020 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
3712 11:08:01.654447
3713 11:08:01.660762 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3714 11:08:01.667569 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3715 11:08:01.674199 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3716 11:08:01.677389 Write Rank1 MR3 =0x30
3717 11:08:01.678083 DramC Write-DBI off
3718 11:08:01.678466
3719 11:08:01.678854 [DATLAT]
3720 11:08:01.681180 Freq=1600, CH1 RK1, use_rxtx_scan=0
3721 11:08:01.681690
3722 11:08:01.683745 DATLAT Default: 0x10
3723 11:08:01.684124 7, 0xFFFF, sum=0
3724 11:08:01.687496 8, 0xFFFF, sum=0
3725 11:08:01.687884 9, 0xFFFF, sum=0
3726 11:08:01.691733 10, 0xFFFF, sum=0
3727 11:08:01.692199 11, 0xFFFF, sum=0
3728 11:08:01.694678 12, 0xFFFF, sum=0
3729 11:08:01.695431 13, 0xFFFF, sum=0
3730 11:08:01.697603 14, 0x0, sum=1
3731 11:08:01.697990 15, 0x0, sum=2
3732 11:08:01.700707 16, 0x0, sum=3
3733 11:08:01.701150 17, 0x0, sum=4
3734 11:08:01.703785 pattern=2 first_step=14 total pass=5 best_step=16
3735 11:08:01.704168 ==
3736 11:08:01.710708 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3737 11:08:01.713834 fsp= 1, odt_onoff= 1, Byte mode= 0
3738 11:08:01.714217 ==
3739 11:08:01.717113 Start DQ dly to find pass range UseTestEngine =1
3740 11:08:01.720868 x-axis: bit #, y-axis: DQ dly (-127~63)
3741 11:08:01.724140 RX Vref Scan = 0
3742 11:08:01.727180 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3743 11:08:01.730422 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3744 11:08:01.730812 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3745 11:08:01.733719 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3746 11:08:01.737058 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3747 11:08:01.740359 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3748 11:08:01.743342 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3749 11:08:01.746926 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3750 11:08:01.750210 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3751 11:08:01.753594 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3752 11:08:01.757578 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3753 11:08:01.757968 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3754 11:08:01.760111 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3755 11:08:01.763753 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3756 11:08:01.767257 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3757 11:08:01.770224 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3758 11:08:01.773812 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3759 11:08:01.777190 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3760 11:08:01.780399 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3761 11:08:01.780788 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3762 11:08:01.783924 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3763 11:08:01.786992 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3764 11:08:01.790197 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3765 11:08:01.793809 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3766 11:08:01.797509 -2, [0] xxxxxxxx xxxxxxxx [MSB]
3767 11:08:01.800135 -1, [0] xxxxxxxx xxxxxxxx [MSB]
3768 11:08:01.800524 0, [0] xxxxxxxx xxxxxxxo [MSB]
3769 11:08:01.803447 1, [0] xxxxxxxx xoxxxxxo [MSB]
3770 11:08:01.807269 2, [0] xxxxxxxx xoxxxxxo [MSB]
3771 11:08:01.810663 3, [0] xxxoxxxx ooxxxxxo [MSB]
3772 11:08:01.813948 4, [0] xxooxxxx ooxxxxxo [MSB]
3773 11:08:01.814346 5, [0] xxooxxxx ooxxxxxo [MSB]
3774 11:08:01.816523 6, [0] xxoooxxx ooxxoxxo [MSB]
3775 11:08:01.820561 7, [0] oooooxxx oooooooo [MSB]
3776 11:08:01.823496 8, [0] ooooooxo oooooooo [MSB]
3777 11:08:01.826890 30, [0] oooooooo ooooooox [MSB]
3778 11:08:01.830279 31, [0] oooooooo ooooooox [MSB]
3779 11:08:01.833408 32, [0] oooooooo ooooooox [MSB]
3780 11:08:01.836707 33, [0] oooooooo oxooooox [MSB]
3781 11:08:01.840663 34, [0] oooxoooo xxooooox [MSB]
3782 11:08:01.843404 35, [0] oooxoooo xxooooox [MSB]
3783 11:08:01.847168 36, [0] ooxxoooo xxooooox [MSB]
3784 11:08:01.847661 37, [0] ooxxooox xxooxoxx [MSB]
3785 11:08:01.849945 38, [0] oxxxxoox xxxxxxxx [MSB]
3786 11:08:01.853180 39, [0] xxxxxoox xxxxxxxx [MSB]
3787 11:08:01.857053 40, [0] xxxxxxox xxxxxxxx [MSB]
3788 11:08:01.860042 41, [0] xxxxxxxx xxxxxxxx [MSB]
3789 11:08:01.863582 iDelay=41, Bit 0, Center 22 (7 ~ 38) 32
3790 11:08:01.866452 iDelay=41, Bit 1, Center 22 (7 ~ 37) 31
3791 11:08:01.869712 iDelay=41, Bit 2, Center 19 (4 ~ 35) 32
3792 11:08:01.873759 iDelay=41, Bit 3, Center 18 (3 ~ 33) 31
3793 11:08:01.876934 iDelay=41, Bit 4, Center 21 (6 ~ 37) 32
3794 11:08:01.880020 iDelay=41, Bit 5, Center 23 (8 ~ 39) 32
3795 11:08:01.883552 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
3796 11:08:01.886897 iDelay=41, Bit 7, Center 22 (8 ~ 36) 29
3797 11:08:01.889876 iDelay=41, Bit 8, Center 18 (3 ~ 33) 31
3798 11:08:01.893551 iDelay=41, Bit 9, Center 16 (1 ~ 32) 32
3799 11:08:01.897077 iDelay=41, Bit 10, Center 22 (7 ~ 37) 31
3800 11:08:01.903491 iDelay=41, Bit 11, Center 22 (7 ~ 37) 31
3801 11:08:01.906606 iDelay=41, Bit 12, Center 21 (6 ~ 36) 31
3802 11:08:01.909567 iDelay=41, Bit 13, Center 22 (7 ~ 37) 31
3803 11:08:01.912923 iDelay=41, Bit 14, Center 21 (7 ~ 36) 30
3804 11:08:01.916825 iDelay=41, Bit 15, Center 14 (0 ~ 29) 30
3805 11:08:01.917296 ==
3806 11:08:01.923072 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3807 11:08:01.923504 fsp= 1, odt_onoff= 1, Byte mode= 0
3808 11:08:01.926480 ==
3809 11:08:01.926978 DQS Delay:
3810 11:08:01.927306 DQS0 = 0, DQS1 = 0
3811 11:08:01.929695 DQM Delay:
3812 11:08:01.930119 DQM0 = 21, DQM1 = 19
3813 11:08:01.933100 DQ Delay:
3814 11:08:01.933555 DQ0 =22, DQ1 =22, DQ2 =19, DQ3 =18
3815 11:08:01.936460 DQ4 =21, DQ5 =23, DQ6 =24, DQ7 =22
3816 11:08:01.940736 DQ8 =18, DQ9 =16, DQ10 =22, DQ11 =22
3817 11:08:01.942816 DQ12 =21, DQ13 =22, DQ14 =21, DQ15 =14
3818 11:08:01.946163
3819 11:08:01.946540
3820 11:08:01.946834
3821 11:08:01.947106 [DramC_TX_OE_Calibration] TA2
3822 11:08:01.949895 Original DQ_B0 (3 6) =30, OEN = 27
3823 11:08:01.953097 Original DQ_B1 (3 6) =30, OEN = 27
3824 11:08:01.956621 23, 0x0, End_B0=23 End_B1=23
3825 11:08:01.960392 24, 0x0, End_B0=24 End_B1=24
3826 11:08:01.962799 25, 0x0, End_B0=25 End_B1=25
3827 11:08:01.963228 26, 0x0, End_B0=26 End_B1=26
3828 11:08:01.966297 27, 0x0, End_B0=27 End_B1=27
3829 11:08:01.969692 28, 0x0, End_B0=28 End_B1=28
3830 11:08:01.972905 29, 0x0, End_B0=29 End_B1=29
3831 11:08:01.976388 30, 0x0, End_B0=30 End_B1=30
3832 11:08:01.976898 31, 0xFFFF, End_B0=30 End_B1=30
3833 11:08:01.983237 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3834 11:08:01.990071 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3835 11:08:01.990592
3836 11:08:01.991036
3837 11:08:01.991444 Write Rank1 MR23 =0x3f
3838 11:08:01.993877 [DQSOSC]
3839 11:08:01.999897 [DQSOSCAuto] RK1, (LSB)MR18= 0xd5d5, (MSB)MR19= 0x202, tDQSOscB0 = 434 ps tDQSOscB1 = 434 ps
3840 11:08:02.005785 CH1_RK1: MR19=0x202, MR18=0xD5D5, DQSOSC=434, MR23=63, INC=13, DEC=19
3841 11:08:02.009862 Write Rank1 MR23 =0x3f
3842 11:08:02.010386 [DQSOSC]
3843 11:08:02.016539 [DQSOSCAuto] RK1, (LSB)MR18= 0xd8d8, (MSB)MR19= 0x202, tDQSOscB0 = 432 ps tDQSOscB1 = 432 ps
3844 11:08:02.019678 CH1 RK1: MR19=202, MR18=D8D8
3845 11:08:02.022360 [RxdqsGatingPostProcess] freq 1600
3846 11:08:02.029435 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3847 11:08:02.029938 Rank: 0
3848 11:08:02.032989 best DQS0 dly(2T, 0.5T) = (2, 6)
3849 11:08:02.036463 best DQS1 dly(2T, 0.5T) = (2, 6)
3850 11:08:02.039534 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3851 11:08:02.043183 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3852 11:08:02.043609 Rank: 1
3853 11:08:02.046310 best DQS0 dly(2T, 0.5T) = (2, 6)
3854 11:08:02.049488 best DQS1 dly(2T, 0.5T) = (2, 6)
3855 11:08:02.052618 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3856 11:08:02.056047 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3857 11:08:02.059367 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3858 11:08:02.062235 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3859 11:08:02.069670 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3860 11:08:02.070178
3861 11:08:02.070507
3862 11:08:02.071918 [Calibration Summary] Freqency 1600
3863 11:08:02.072343 CH 0, Rank 0
3864 11:08:02.072669 All Pass.
3865 11:08:02.072973
3866 11:08:02.075692 CH 0, Rank 1
3867 11:08:02.076279 All Pass.
3868 11:08:02.076645
3869 11:08:02.076949 CH 1, Rank 0
3870 11:08:02.079128 All Pass.
3871 11:08:02.079626
3872 11:08:02.079948 CH 1, Rank 1
3873 11:08:02.080250 All Pass.
3874 11:08:02.080534
3875 11:08:02.085974 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3876 11:08:02.091971 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3877 11:08:02.102284 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3878 11:08:02.102772 Write Rank0 MR3 =0xb0
3879 11:08:02.108849 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3880 11:08:02.115111 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3881 11:08:02.121800 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3882 11:08:02.125018 Write Rank1 MR3 =0xb0
3883 11:08:02.131951 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3884 11:08:02.138444 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3885 11:08:02.145496 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3886 11:08:02.148284 Write Rank0 MR3 =0xb0
3887 11:08:02.154986 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3888 11:08:02.162012 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3889 11:08:02.168347 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3890 11:08:02.171439 Write Rank1 MR3 =0xb0
3891 11:08:02.171863 DramC Write-DBI on
3892 11:08:02.175072 [GetDramInforAfterCalByMRR] Vendor 6.
3893 11:08:02.177835 [GetDramInforAfterCalByMRR] Revision 505.
3894 11:08:02.181209 MR8 1111
3895 11:08:02.184845 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3896 11:08:02.185391 MR8 1111
3897 11:08:02.190961 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3898 11:08:02.191452 MR8 1111
3899 11:08:02.195335 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3900 11:08:02.197682 MR8 1111
3901 11:08:02.201160 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3902 11:08:02.211485 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3903 11:08:02.214248 Write Rank0 MR13 =0xd0
3904 11:08:02.214672 Write Rank1 MR13 =0xd0
3905 11:08:02.217817 Write Rank0 MR13 =0xd0
3906 11:08:02.218317 Write Rank1 MR13 =0xd0
3907 11:08:02.221342 Save calibration result to emmc
3908 11:08:02.222053
3909 11:08:02.222404
3910 11:08:02.224416 [DramcModeReg_Check] Freq_1600, FSP_1
3911 11:08:02.227708 FSP_1, CH_0, RK0
3912 11:08:02.228207 Write Rank0 MR13 =0xd8
3913 11:08:02.230559 MR12 = 0x60 (global = 0x60) match
3914 11:08:02.234085 MR14 = 0x1e (global = 0x1e) match
3915 11:08:02.237202 FSP_1, CH_0, RK1
3916 11:08:02.237625 Write Rank1 MR13 =0xd8
3917 11:08:02.240906 MR12 = 0x5c (global = 0x5c) match
3918 11:08:02.244231 MR14 = 0x20 (global = 0x20) match
3919 11:08:02.247672 FSP_1, CH_1, RK0
3920 11:08:02.248172 Write Rank0 MR13 =0xd8
3921 11:08:02.251003 MR12 = 0x60 (global = 0x60) match
3922 11:08:02.255349 MR14 = 0x1e (global = 0x1e) match
3923 11:08:02.257450 FSP_1, CH_1, RK1
3924 11:08:02.257872 Write Rank1 MR13 =0xd8
3925 11:08:02.261051 MR12 = 0x60 (global = 0x60) match
3926 11:08:02.264155 MR14 = 0x1e (global = 0x1e) match
3927 11:08:02.264656
3928 11:08:02.270941 [MEM_TEST] 02: After DFS, before run time config
3929 11:08:02.280577 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3930 11:08:02.281068
3931 11:08:02.281434 [TA2_TEST]
3932 11:08:02.281734 === TA2 HW
3933 11:08:02.283855 TA2 PAT: XTALK
3934 11:08:02.287224 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3935 11:08:02.293752 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3936 11:08:02.297423 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3937 11:08:02.304075 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3938 11:08:02.304578
3939 11:08:02.304902
3940 11:08:02.305252 Settings after calibration
3941 11:08:02.305556
3942 11:08:02.306947 [DramcRunTimeConfig]
3943 11:08:02.310648 TransferPLLToSPMControl - MODE SW PHYPLL
3944 11:08:02.311072 TX_TRACKING: ON
3945 11:08:02.313560 RX_TRACKING: ON
3946 11:08:02.314086 HW_GATING: ON
3947 11:08:02.316969 HW_GATING DBG: OFF
3948 11:08:02.317430 ddr_geometry:1
3949 11:08:02.320937 ddr_geometry:1
3950 11:08:02.321568 ddr_geometry:1
3951 11:08:02.323627 ddr_geometry:1
3952 11:08:02.324052 ddr_geometry:1
3953 11:08:02.324379 ddr_geometry:1
3954 11:08:02.327357 ddr_geometry:1
3955 11:08:02.327859 ddr_geometry:1
3956 11:08:02.329948 High Freq DUMMY_READ_FOR_TRACKING: ON
3957 11:08:02.334043 ZQCS_ENABLE_LP4: OFF
3958 11:08:02.337090 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3959 11:08:02.340402 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3960 11:08:02.340912 SPM_CONTROL_AFTERK: ON
3961 11:08:02.343424 IMPEDANCE_TRACKING: ON
3962 11:08:02.343846 TEMP_SENSOR: ON
3963 11:08:02.347080 PER_BANK_REFRESH: ON
3964 11:08:02.347581 HW_SAVE_FOR_SR: ON
3965 11:08:02.353770 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3966 11:08:02.354281 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3967 11:08:02.356801 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3968 11:08:02.360234 Read ODT Tracking: ON
3969 11:08:02.364207 =========================
3970 11:08:02.364843
3971 11:08:02.365376 [TA2_TEST]
3972 11:08:02.365696 === TA2 HW
3973 11:08:02.370151 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3974 11:08:02.374093 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3975 11:08:02.380130 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3976 11:08:02.383726 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3977 11:08:02.384228
3978 11:08:02.386693 [MEM_TEST] 03: After run time config
3979 11:08:02.398815 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3980 11:08:02.401779 [complex_mem_test] start addr:0x40024000, len:131072
3981 11:08:02.606570 1st complex R/W mem test pass
3982 11:08:02.613873 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3983 11:08:02.616535 sync preloader write leveling
3984 11:08:02.619651 sync preloader cbt_mr12
3985 11:08:02.622913 sync preloader cbt_clk_dly
3986 11:08:02.623334 sync preloader cbt_cmd_dly
3987 11:08:02.626058 sync preloader cbt_cs
3988 11:08:02.629841 sync preloader cbt_ca_perbit_delay
3989 11:08:02.630340 sync preloader clk_delay
3990 11:08:02.633086 sync preloader dqs_delay
3991 11:08:02.636452 sync preloader u1Gating2T_Save
3992 11:08:02.639910 sync preloader u1Gating05T_Save
3993 11:08:02.642823 sync preloader u1Gatingfine_tune_Save
3994 11:08:02.646577 sync preloader u1Gatingucpass_count_Save
3995 11:08:02.649538 sync preloader u1TxWindowPerbitVref_Save
3996 11:08:02.653080 sync preloader u1TxCenter_min_Save
3997 11:08:02.656493 sync preloader u1TxCenter_max_Save
3998 11:08:02.659629 sync preloader u1Txwin_center_Save
3999 11:08:02.662983 sync preloader u1Txfirst_pass_Save
4000 11:08:02.666194 sync preloader u1Txlast_pass_Save
4001 11:08:02.666716 sync preloader u1RxDatlat_Save
4002 11:08:02.672617 sync preloader u1RxWinPerbitVref_Save
4003 11:08:02.676282 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4004 11:08:02.679381 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4005 11:08:02.683220 sync preloader delay_cell_unit
4006 11:08:02.689066 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4007 11:08:02.692367 sync preloader write leveling
4008 11:08:02.692883 sync preloader cbt_mr12
4009 11:08:02.696182 sync preloader cbt_clk_dly
4010 11:08:02.699386 sync preloader cbt_cmd_dly
4011 11:08:02.699904 sync preloader cbt_cs
4012 11:08:02.702703 sync preloader cbt_ca_perbit_delay
4013 11:08:02.705829 sync preloader clk_delay
4014 11:08:02.709531 sync preloader dqs_delay
4015 11:08:02.712413 sync preloader u1Gating2T_Save
4016 11:08:02.712958 sync preloader u1Gating05T_Save
4017 11:08:02.715945 sync preloader u1Gatingfine_tune_Save
4018 11:08:02.719104 sync preloader u1Gatingucpass_count_Save
4019 11:08:02.726084 sync preloader u1TxWindowPerbitVref_Save
4020 11:08:02.729108 sync preloader u1TxCenter_min_Save
4021 11:08:02.729674 sync preloader u1TxCenter_max_Save
4022 11:08:02.732113 sync preloader u1Txwin_center_Save
4023 11:08:02.735460 sync preloader u1Txfirst_pass_Save
4024 11:08:02.739184 sync preloader u1Txlast_pass_Save
4025 11:08:02.742260 sync preloader u1RxDatlat_Save
4026 11:08:02.745637 sync preloader u1RxWinPerbitVref_Save
4027 11:08:02.748508 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4028 11:08:02.755716 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4029 11:08:02.756176 sync preloader delay_cell_unit
4030 11:08:02.762141 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4031 11:08:02.765389 sync preloader write leveling
4032 11:08:02.768555 sync preloader cbt_mr12
4033 11:08:02.772365 sync preloader cbt_clk_dly
4034 11:08:02.772871 sync preloader cbt_cmd_dly
4035 11:08:02.775555 sync preloader cbt_cs
4036 11:08:02.779046 sync preloader cbt_ca_perbit_delay
4037 11:08:02.782009 sync preloader clk_delay
4038 11:08:02.782433 sync preloader dqs_delay
4039 11:08:02.786012 sync preloader u1Gating2T_Save
4040 11:08:02.789027 sync preloader u1Gating05T_Save
4041 11:08:02.792118 sync preloader u1Gatingfine_tune_Save
4042 11:08:02.795696 sync preloader u1Gatingucpass_count_Save
4043 11:08:02.798664 sync preloader u1TxWindowPerbitVref_Save
4044 11:08:02.802062 sync preloader u1TxCenter_min_Save
4045 11:08:02.805583 sync preloader u1TxCenter_max_Save
4046 11:08:02.808923 sync preloader u1Txwin_center_Save
4047 11:08:02.812105 sync preloader u1Txfirst_pass_Save
4048 11:08:02.815758 sync preloader u1Txlast_pass_Save
4049 11:08:02.818554 sync preloader u1RxDatlat_Save
4050 11:08:02.822037 sync preloader u1RxWinPerbitVref_Save
4051 11:08:02.824732 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4052 11:08:02.830081 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4053 11:08:02.831562 sync preloader delay_cell_unit
4054 11:08:02.834782 just_for_test_dump_coreboot_params dump all params
4055 11:08:02.838412 dump source = 0x0
4056 11:08:02.842540 dump params frequency:1600
4057 11:08:02.843037 dump params rank number:2
4058 11:08:02.843370
4059 11:08:02.844897 dump params write leveling
4060 11:08:02.848761 write leveling[0][0][0] = 0x20
4061 11:08:02.852170 write leveling[0][0][1] = 0x18
4062 11:08:02.855168 write leveling[0][1][0] = 0x21
4063 11:08:02.856232 write leveling[0][1][1] = 0x19
4064 11:08:02.858653 write leveling[1][0][0] = 0x21
4065 11:08:02.861995 write leveling[1][0][1] = 0x1f
4066 11:08:02.864608 write leveling[1][1][0] = 0x28
4067 11:08:02.868574 write leveling[1][1][1] = 0x20
4068 11:08:02.868994 dump params cbt_cs
4069 11:08:02.872375 cbt_cs[0][0] = 0x8
4070 11:08:02.872836 cbt_cs[0][1] = 0x8
4071 11:08:02.874597 cbt_cs[1][0] = 0xb
4072 11:08:02.874978 cbt_cs[1][1] = 0xb
4073 11:08:02.877832 dump params cbt_mr12
4074 11:08:02.878213 cbt_mr12[0][0] = 0x20
4075 11:08:02.881495 cbt_mr12[0][1] = 0x1c
4076 11:08:02.885095 cbt_mr12[1][0] = 0x20
4077 11:08:02.885931 cbt_mr12[1][1] = 0x20
4078 11:08:02.888064 dump params tx window
4079 11:08:02.891993 tx_center_min[0][0][0] = 985
4080 11:08:02.892393 tx_center_max[0][0][0] = 992
4081 11:08:02.894660 tx_center_min[0][0][1] = 978
4082 11:08:02.898248 tx_center_max[0][0][1] = 985
4083 11:08:02.901460 tx_center_min[0][1][0] = 987
4084 11:08:02.905209 tx_center_max[0][1][0] = 993
4085 11:08:02.905596 tx_center_min[0][1][1] = 979
4086 11:08:02.907912 tx_center_max[0][1][1] = 987
4087 11:08:02.911767 tx_center_min[1][0][0] = 989
4088 11:08:02.915344 tx_center_max[1][0][0] = 994
4089 11:08:02.917964 tx_center_min[1][0][1] = 982
4090 11:08:02.918386 tx_center_max[1][0][1] = 989
4091 11:08:02.921762 tx_center_min[1][1][0] = 992
4092 11:08:02.924473 tx_center_max[1][1][0] = 997
4093 11:08:02.927915 tx_center_min[1][1][1] = 982
4094 11:08:02.928331 tx_center_max[1][1][1] = 990
4095 11:08:02.931993 dump params tx window
4096 11:08:02.935304 tx_win_center[0][0][0] = 992
4097 11:08:02.938018 tx_first_pass[0][0][0] = 980
4098 11:08:02.938401 tx_last_pass[0][0][0] = 1004
4099 11:08:02.941559 tx_win_center[0][0][1] = 990
4100 11:08:02.944758 tx_first_pass[0][0][1] = 979
4101 11:08:02.947951 tx_last_pass[0][0][1] = 1002
4102 11:08:02.951264 tx_win_center[0][0][2] = 991
4103 11:08:02.951649 tx_first_pass[0][0][2] = 980
4104 11:08:02.954704 tx_last_pass[0][0][2] = 1003
4105 11:08:02.958347 tx_win_center[0][0][3] = 985
4106 11:08:02.960944 tx_first_pass[0][0][3] = 975
4107 11:08:02.964336 tx_last_pass[0][0][3] = 995
4108 11:08:02.964809 tx_win_center[0][0][4] = 990
4109 11:08:02.967728 tx_first_pass[0][0][4] = 979
4110 11:08:02.970941 tx_last_pass[0][0][4] = 1002
4111 11:08:02.974565 tx_win_center[0][0][5] = 988
4112 11:08:02.975003 tx_first_pass[0][0][5] = 978
4113 11:08:02.977465 tx_last_pass[0][0][5] = 998
4114 11:08:02.981481 tx_win_center[0][0][6] = 989
4115 11:08:02.984347 tx_first_pass[0][0][6] = 978
4116 11:08:02.987715 tx_last_pass[0][0][6] = 1000
4117 11:08:02.988174 tx_win_center[0][0][7] = 990
4118 11:08:02.990784 tx_first_pass[0][0][7] = 979
4119 11:08:02.994388 tx_last_pass[0][0][7] = 1002
4120 11:08:02.998443 tx_win_center[0][0][8] = 978
4121 11:08:03.001084 tx_first_pass[0][0][8] = 967
4122 11:08:03.001807 tx_last_pass[0][0][8] = 990
4123 11:08:03.004378 tx_win_center[0][0][9] = 979
4124 11:08:03.008020 tx_first_pass[0][0][9] = 968
4125 11:08:03.011665 tx_last_pass[0][0][9] = 991
4126 11:08:03.012427 tx_win_center[0][0][10] = 985
4127 11:08:03.014786 tx_first_pass[0][0][10] = 973
4128 11:08:03.017808 tx_last_pass[0][0][10] = 997
4129 11:08:03.021193 tx_win_center[0][0][11] = 979
4130 11:08:03.024530 tx_first_pass[0][0][11] = 968
4131 11:08:03.024915 tx_last_pass[0][0][11] = 990
4132 11:08:03.027386 tx_win_center[0][0][12] = 980
4133 11:08:03.031163 tx_first_pass[0][0][12] = 968
4134 11:08:03.034139 tx_last_pass[0][0][12] = 993
4135 11:08:03.037519 tx_win_center[0][0][13] = 980
4136 11:08:03.037912 tx_first_pass[0][0][13] = 968
4137 11:08:03.041059 tx_last_pass[0][0][13] = 992
4138 11:08:03.044444 tx_win_center[0][0][14] = 981
4139 11:08:03.047578 tx_first_pass[0][0][14] = 969
4140 11:08:03.051154 tx_last_pass[0][0][14] = 994
4141 11:08:03.051545 tx_win_center[0][0][15] = 985
4142 11:08:03.054115 tx_first_pass[0][0][15] = 973
4143 11:08:03.057419 tx_last_pass[0][0][15] = 997
4144 11:08:03.061609 tx_win_center[0][1][0] = 993
4145 11:08:03.064227 tx_first_pass[0][1][0] = 981
4146 11:08:03.064613 tx_last_pass[0][1][0] = 1005
4147 11:08:03.067328 tx_win_center[0][1][1] = 991
4148 11:08:03.070635 tx_first_pass[0][1][1] = 980
4149 11:08:03.074032 tx_last_pass[0][1][1] = 1003
4150 11:08:03.077233 tx_win_center[0][1][2] = 993
4151 11:08:03.077626 tx_first_pass[0][1][2] = 981
4152 11:08:03.080424 tx_last_pass[0][1][2] = 1005
4153 11:08:03.083935 tx_win_center[0][1][3] = 987
4154 11:08:03.087638 tx_first_pass[0][1][3] = 977
4155 11:08:03.088165 tx_last_pass[0][1][3] = 997
4156 11:08:03.090488 tx_win_center[0][1][4] = 992
4157 11:08:03.093912 tx_first_pass[0][1][4] = 981
4158 11:08:03.097494 tx_last_pass[0][1][4] = 1004
4159 11:08:03.100733 tx_win_center[0][1][5] = 989
4160 11:08:03.101304 tx_first_pass[0][1][5] = 978
4161 11:08:03.103857 tx_last_pass[0][1][5] = 1000
4162 11:08:03.107099 tx_win_center[0][1][6] = 990
4163 11:08:03.110828 tx_first_pass[0][1][6] = 979
4164 11:08:03.114909 tx_last_pass[0][1][6] = 1001
4165 11:08:03.115296 tx_win_center[0][1][7] = 992
4166 11:08:03.117980 tx_first_pass[0][1][7] = 980
4167 11:08:03.120775 tx_last_pass[0][1][7] = 1004
4168 11:08:03.123926 tx_win_center[0][1][8] = 979
4169 11:08:03.124310 tx_first_pass[0][1][8] = 968
4170 11:08:03.127297 tx_last_pass[0][1][8] = 991
4171 11:08:03.131043 tx_win_center[0][1][9] = 983
4172 11:08:03.134109 tx_first_pass[0][1][9] = 972
4173 11:08:03.137313 tx_last_pass[0][1][9] = 994
4174 11:08:03.137704 tx_win_center[0][1][10] = 987
4175 11:08:03.141208 tx_first_pass[0][1][10] = 976
4176 11:08:03.143713 tx_last_pass[0][1][10] = 998
4177 11:08:03.147597 tx_win_center[0][1][11] = 981
4178 11:08:03.151114 tx_first_pass[0][1][11] = 969
4179 11:08:03.151503 tx_last_pass[0][1][11] = 993
4180 11:08:03.154119 tx_win_center[0][1][12] = 983
4181 11:08:03.157364 tx_first_pass[0][1][12] = 972
4182 11:08:03.160938 tx_last_pass[0][1][12] = 995
4183 11:08:03.164034 tx_win_center[0][1][13] = 982
4184 11:08:03.164506 tx_first_pass[0][1][13] = 970
4185 11:08:03.167328 tx_last_pass[0][1][13] = 994
4186 11:08:03.170924 tx_win_center[0][1][14] = 984
4187 11:08:03.174024 tx_first_pass[0][1][14] = 972
4188 11:08:03.177311 tx_last_pass[0][1][14] = 996
4189 11:08:03.177698 tx_win_center[0][1][15] = 986
4190 11:08:03.180513 tx_first_pass[0][1][15] = 975
4191 11:08:03.183704 tx_last_pass[0][1][15] = 998
4192 11:08:03.187566 tx_win_center[1][0][0] = 994
4193 11:08:03.190947 tx_first_pass[1][0][0] = 982
4194 11:08:03.191329 tx_last_pass[1][0][0] = 1007
4195 11:08:03.194112 tx_win_center[1][0][1] = 993
4196 11:08:03.197199 tx_first_pass[1][0][1] = 980
4197 11:08:03.200715 tx_last_pass[1][0][1] = 1006
4198 11:08:03.203751 tx_win_center[1][0][2] = 990
4199 11:08:03.204134 tx_first_pass[1][0][2] = 978
4200 11:08:03.207497 tx_last_pass[1][0][2] = 1003
4201 11:08:03.212003 tx_win_center[1][0][3] = 989
4202 11:08:03.213745 tx_first_pass[1][0][3] = 977
4203 11:08:03.214135 tx_last_pass[1][0][3] = 1001
4204 11:08:03.217364 tx_win_center[1][0][4] = 993
4205 11:08:03.221235 tx_first_pass[1][0][4] = 980
4206 11:08:03.223979 tx_last_pass[1][0][4] = 1006
4207 11:08:03.227332 tx_win_center[1][0][5] = 994
4208 11:08:03.227754 tx_first_pass[1][0][5] = 982
4209 11:08:03.231140 tx_last_pass[1][0][5] = 1007
4210 11:08:03.233973 tx_win_center[1][0][6] = 993
4211 11:08:03.237548 tx_first_pass[1][0][6] = 980
4212 11:08:03.238052 tx_last_pass[1][0][6] = 1007
4213 11:08:03.240989 tx_win_center[1][0][7] = 992
4214 11:08:03.244898 tx_first_pass[1][0][7] = 979
4215 11:08:03.248228 tx_last_pass[1][0][7] = 1006
4216 11:08:03.250591 tx_win_center[1][0][8] = 986
4217 11:08:03.251096 tx_first_pass[1][0][8] = 974
4218 11:08:03.253957 tx_last_pass[1][0][8] = 999
4219 11:08:03.257391 tx_win_center[1][0][9] = 985
4220 11:08:03.260769 tx_first_pass[1][0][9] = 973
4221 11:08:03.264458 tx_last_pass[1][0][9] = 998
4222 11:08:03.264968 tx_win_center[1][0][10] = 988
4223 11:08:03.266858 tx_first_pass[1][0][10] = 977
4224 11:08:03.270478 tx_last_pass[1][0][10] = 1000
4225 11:08:03.273912 tx_win_center[1][0][11] = 988
4226 11:08:03.277330 tx_first_pass[1][0][11] = 977
4227 11:08:03.277860 tx_last_pass[1][0][11] = 1000
4228 11:08:03.280754 tx_win_center[1][0][12] = 989
4229 11:08:03.284207 tx_first_pass[1][0][12] = 978
4230 11:08:03.286890 tx_last_pass[1][0][12] = 1000
4231 11:08:03.290149 tx_win_center[1][0][13] = 989
4232 11:08:03.293998 tx_first_pass[1][0][13] = 979
4233 11:08:03.294510 tx_last_pass[1][0][13] = 1000
4234 11:08:03.296927 tx_win_center[1][0][14] = 988
4235 11:08:03.300187 tx_first_pass[1][0][14] = 977
4236 11:08:03.303239 tx_last_pass[1][0][14] = 1000
4237 11:08:03.306629 tx_win_center[1][0][15] = 982
4238 11:08:03.307159 tx_first_pass[1][0][15] = 970
4239 11:08:03.310647 tx_last_pass[1][0][15] = 995
4240 11:08:03.314080 tx_win_center[1][1][0] = 997
4241 11:08:03.317817 tx_first_pass[1][1][0] = 986
4242 11:08:03.320171 tx_last_pass[1][1][0] = 1009
4243 11:08:03.320593 tx_win_center[1][1][1] = 996
4244 11:08:03.323672 tx_first_pass[1][1][1] = 984
4245 11:08:03.326524 tx_last_pass[1][1][1] = 1008
4246 11:08:03.330061 tx_win_center[1][1][2] = 994
4247 11:08:03.330481 tx_first_pass[1][1][2] = 982
4248 11:08:03.333804 tx_last_pass[1][1][2] = 1007
4249 11:08:03.336830 tx_win_center[1][1][3] = 992
4250 11:08:03.340285 tx_first_pass[1][1][3] = 979
4251 11:08:03.343495 tx_last_pass[1][1][3] = 1006
4252 11:08:03.343999 tx_win_center[1][1][4] = 996
4253 11:08:03.346939 tx_first_pass[1][1][4] = 985
4254 11:08:03.350139 tx_last_pass[1][1][4] = 1008
4255 11:08:03.353586 tx_win_center[1][1][5] = 997
4256 11:08:03.357592 tx_first_pass[1][1][5] = 985
4257 11:08:03.358094 tx_last_pass[1][1][5] = 1009
4258 11:08:03.360610 tx_win_center[1][1][6] = 996
4259 11:08:03.363517 tx_first_pass[1][1][6] = 984
4260 11:08:03.367284 tx_last_pass[1][1][6] = 1008
4261 11:08:03.367790 tx_win_center[1][1][7] = 996
4262 11:08:03.370526 tx_first_pass[1][1][7] = 984
4263 11:08:03.373200 tx_last_pass[1][1][7] = 1008
4264 11:08:03.376693 tx_win_center[1][1][8] = 986
4265 11:08:03.380010 tx_first_pass[1][1][8] = 975
4266 11:08:03.380503 tx_last_pass[1][1][8] = 998
4267 11:08:03.383709 tx_win_center[1][1][9] = 986
4268 11:08:03.386872 tx_first_pass[1][1][9] = 974
4269 11:08:03.390222 tx_last_pass[1][1][9] = 998
4270 11:08:03.393419 tx_win_center[1][1][10] = 988
4271 11:08:03.393843 tx_first_pass[1][1][10] = 976
4272 11:08:03.396572 tx_last_pass[1][1][10] = 1000
4273 11:08:03.399822 tx_win_center[1][1][11] = 988
4274 11:08:03.403272 tx_first_pass[1][1][11] = 977
4275 11:08:03.406733 tx_last_pass[1][1][11] = 1000
4276 11:08:03.407318 tx_win_center[1][1][12] = 989
4277 11:08:03.410757 tx_first_pass[1][1][12] = 978
4278 11:08:03.413260 tx_last_pass[1][1][12] = 1001
4279 11:08:03.416484 tx_win_center[1][1][13] = 990
4280 11:08:03.419617 tx_first_pass[1][1][13] = 979
4281 11:08:03.420045 tx_last_pass[1][1][13] = 1001
4282 11:08:03.423630 tx_win_center[1][1][14] = 988
4283 11:08:03.426854 tx_first_pass[1][1][14] = 977
4284 11:08:03.430052 tx_last_pass[1][1][14] = 1000
4285 11:08:03.433224 tx_win_center[1][1][15] = 982
4286 11:08:03.436151 tx_first_pass[1][1][15] = 970
4287 11:08:03.436577 tx_last_pass[1][1][15] = 995
4288 11:08:03.440056 dump params rx window
4289 11:08:03.443359 rx_firspass[0][0][0] = 9
4290 11:08:03.443820 rx_lastpass[0][0][0] = 37
4291 11:08:03.446001 rx_firspass[0][0][1] = 9
4292 11:08:03.449423 rx_lastpass[0][0][1] = 37
4293 11:08:03.449807 rx_firspass[0][0][2] = 11
4294 11:08:03.453279 rx_lastpass[0][0][2] = 37
4295 11:08:03.456391 rx_firspass[0][0][3] = 3
4296 11:08:03.460024 rx_lastpass[0][0][3] = 32
4297 11:08:03.460487 rx_firspass[0][0][4] = 10
4298 11:08:03.463251 rx_lastpass[0][0][4] = 36
4299 11:08:03.466412 rx_firspass[0][0][5] = 6
4300 11:08:03.466873 rx_lastpass[0][0][5] = 32
4301 11:08:03.469619 rx_firspass[0][0][6] = 7
4302 11:08:03.472699 rx_lastpass[0][0][6] = 35
4303 11:08:03.475882 rx_firspass[0][0][7] = 11
4304 11:08:03.476320 rx_lastpass[0][0][7] = 35
4305 11:08:03.480354 rx_firspass[0][0][8] = 3
4306 11:08:03.482544 rx_lastpass[0][0][8] = 31
4307 11:08:03.482933 rx_firspass[0][0][9] = 5
4308 11:08:03.485967 rx_lastpass[0][0][9] = 32
4309 11:08:03.489277 rx_firspass[0][0][10] = 11
4310 11:08:03.492435 rx_lastpass[0][0][10] = 39
4311 11:08:03.492809 rx_firspass[0][0][11] = 4
4312 11:08:03.496160 rx_lastpass[0][0][11] = 31
4313 11:08:03.499320 rx_firspass[0][0][12] = 5
4314 11:08:03.499711 rx_lastpass[0][0][12] = 35
4315 11:08:03.503667 rx_firspass[0][0][13] = 7
4316 11:08:03.506422 rx_lastpass[0][0][13] = 32
4317 11:08:03.509600 rx_firspass[0][0][14] = 7
4318 11:08:03.510188 rx_lastpass[0][0][14] = 35
4319 11:08:03.512836 rx_firspass[0][0][15] = 9
4320 11:08:03.515645 rx_lastpass[0][0][15] = 36
4321 11:08:03.516019 rx_firspass[0][1][0] = 9
4322 11:08:03.518941 rx_lastpass[0][1][0] = 39
4323 11:08:03.522237 rx_firspass[0][1][1] = 7
4324 11:08:03.525761 rx_lastpass[0][1][1] = 39
4325 11:08:03.526144 rx_firspass[0][1][2] = 9
4326 11:08:03.529151 rx_lastpass[0][1][2] = 39
4327 11:08:03.532570 rx_firspass[0][1][3] = 1
4328 11:08:03.533034 rx_lastpass[0][1][3] = 32
4329 11:08:03.535935 rx_firspass[0][1][4] = 9
4330 11:08:03.539157 rx_lastpass[0][1][4] = 37
4331 11:08:03.539629 rx_firspass[0][1][5] = 3
4332 11:08:03.542510 rx_lastpass[0][1][5] = 34
4333 11:08:03.545689 rx_firspass[0][1][6] = 4
4334 11:08:03.549057 rx_lastpass[0][1][6] = 35
4335 11:08:03.549461 rx_firspass[0][1][7] = 7
4336 11:08:03.552734 rx_lastpass[0][1][7] = 37
4337 11:08:03.556599 rx_firspass[0][1][8] = 2
4338 11:08:03.557098 rx_lastpass[0][1][8] = 32
4339 11:08:03.559887 rx_firspass[0][1][9] = 5
4340 11:08:03.562752 rx_lastpass[0][1][9] = 34
4341 11:08:03.566310 rx_firspass[0][1][10] = 12
4342 11:08:03.566810 rx_lastpass[0][1][10] = 41
4343 11:08:03.568902 rx_firspass[0][1][11] = 3
4344 11:08:03.572229 rx_lastpass[0][1][11] = 32
4345 11:08:03.572656 rx_firspass[0][1][12] = 6
4346 11:08:03.576164 rx_lastpass[0][1][12] = 35
4347 11:08:03.579319 rx_firspass[0][1][13] = 8
4348 11:08:03.582777 rx_lastpass[0][1][13] = 34
4349 11:08:03.583281 rx_firspass[0][1][14] = 7
4350 11:08:03.586080 rx_lastpass[0][1][14] = 37
4351 11:08:03.589275 rx_firspass[0][1][15] = 9
4352 11:08:03.589778 rx_lastpass[0][1][15] = 38
4353 11:08:03.592587 rx_firspass[1][0][0] = 8
4354 11:08:03.596142 rx_lastpass[1][0][0] = 37
4355 11:08:03.599217 rx_firspass[1][0][1] = 7
4356 11:08:03.599716 rx_lastpass[1][0][1] = 35
4357 11:08:03.602335 rx_firspass[1][0][2] = 5
4358 11:08:03.605682 rx_lastpass[1][0][2] = 35
4359 11:08:03.606101 rx_firspass[1][0][3] = 5
4360 11:08:03.608976 rx_lastpass[1][0][3] = 32
4361 11:08:03.612771 rx_firspass[1][0][4] = 7
4362 11:08:03.615771 rx_lastpass[1][0][4] = 36
4363 11:08:03.616279 rx_firspass[1][0][5] = 9
4364 11:08:03.619034 rx_lastpass[1][0][5] = 37
4365 11:08:03.622573 rx_firspass[1][0][6] = 11
4366 11:08:03.623132 rx_lastpass[1][0][6] = 37
4367 11:08:03.625566 rx_firspass[1][0][7] = 9
4368 11:08:03.628918 rx_lastpass[1][0][7] = 35
4369 11:08:03.629574 rx_firspass[1][0][8] = 4
4370 11:08:03.632733 rx_lastpass[1][0][8] = 31
4371 11:08:03.635777 rx_firspass[1][0][9] = 3
4372 11:08:03.638687 rx_lastpass[1][0][9] = 31
4373 11:08:03.639108 rx_firspass[1][0][10] = 6
4374 11:08:03.642612 rx_lastpass[1][0][10] = 36
4375 11:08:03.645564 rx_firspass[1][0][11] = 8
4376 11:08:03.646074 rx_lastpass[1][0][11] = 36
4377 11:08:03.648668 rx_firspass[1][0][12] = 8
4378 11:08:03.652351 rx_lastpass[1][0][12] = 35
4379 11:08:03.656605 rx_firspass[1][0][13] = 8
4380 11:08:03.657027 rx_lastpass[1][0][13] = 36
4381 11:08:03.659187 rx_firspass[1][0][14] = 8
4382 11:08:03.662099 rx_lastpass[1][0][14] = 34
4383 11:08:03.665775 rx_firspass[1][0][15] = 4
4384 11:08:03.666284 rx_lastpass[1][0][15] = 28
4385 11:08:03.669348 rx_firspass[1][1][0] = 7
4386 11:08:03.672306 rx_lastpass[1][1][0] = 38
4387 11:08:03.672858 rx_firspass[1][1][1] = 7
4388 11:08:03.675623 rx_lastpass[1][1][1] = 37
4389 11:08:03.679056 rx_firspass[1][1][2] = 4
4390 11:08:03.679479 rx_lastpass[1][1][2] = 35
4391 11:08:03.682667 rx_firspass[1][1][3] = 3
4392 11:08:03.684910 rx_lastpass[1][1][3] = 33
4393 11:08:03.688771 rx_firspass[1][1][4] = 6
4394 11:08:03.689259 rx_lastpass[1][1][4] = 37
4395 11:08:03.692079 rx_firspass[1][1][5] = 8
4396 11:08:03.695723 rx_lastpass[1][1][5] = 39
4397 11:08:03.696235 rx_firspass[1][1][6] = 9
4398 11:08:03.698993 rx_lastpass[1][1][6] = 40
4399 11:08:03.702311 rx_firspass[1][1][7] = 8
4400 11:08:03.705552 rx_lastpass[1][1][7] = 36
4401 11:08:03.706059 rx_firspass[1][1][8] = 3
4402 11:08:03.709049 rx_lastpass[1][1][8] = 33
4403 11:08:03.712532 rx_firspass[1][1][9] = 1
4404 11:08:03.713041 rx_lastpass[1][1][9] = 32
4405 11:08:03.714988 rx_firspass[1][1][10] = 7
4406 11:08:03.718712 rx_lastpass[1][1][10] = 37
4407 11:08:03.719221 rx_firspass[1][1][11] = 7
4408 11:08:03.722007 rx_lastpass[1][1][11] = 37
4409 11:08:03.725086 rx_firspass[1][1][12] = 6
4410 11:08:03.728984 rx_lastpass[1][1][12] = 36
4411 11:08:03.729703 rx_firspass[1][1][13] = 7
4412 11:08:03.732123 rx_lastpass[1][1][13] = 37
4413 11:08:03.735281 rx_firspass[1][1][14] = 7
4414 11:08:03.738694 rx_lastpass[1][1][14] = 36
4415 11:08:03.739190 rx_firspass[1][1][15] = 0
4416 11:08:03.741710 rx_lastpass[1][1][15] = 29
4417 11:08:03.745392 dump params clk_delay
4418 11:08:03.745938 clk_delay[0] = 0
4419 11:08:03.748734 clk_delay[1] = 0
4420 11:08:03.749379 dump params dqs_delay
4421 11:08:03.752529 dqs_delay[0][0] = 0
4422 11:08:03.752953 dqs_delay[0][1] = -1
4423 11:08:03.755126 dqs_delay[1][0] = 0
4424 11:08:03.755553 dqs_delay[1][1] = 0
4425 11:08:03.758592 dump params delay_cell_unit = 833
4426 11:08:03.761650 dump source = 0x0
4427 11:08:03.762075 dump params frequency:1200
4428 11:08:03.766222 dump params rank number:2
4429 11:08:03.766605
4430 11:08:03.768199 dump params write leveling
4431 11:08:03.771886 write leveling[0][0][0] = 0x0
4432 11:08:03.775078 write leveling[0][0][1] = 0x0
4433 11:08:03.775469 write leveling[0][1][0] = 0x0
4434 11:08:03.778270 write leveling[0][1][1] = 0x0
4435 11:08:03.781942 write leveling[1][0][0] = 0x0
4436 11:08:03.784955 write leveling[1][0][1] = 0x0
4437 11:08:03.788265 write leveling[1][1][0] = 0x0
4438 11:08:03.788734 write leveling[1][1][1] = 0x0
4439 11:08:03.791772 dump params cbt_cs
4440 11:08:03.792233 cbt_cs[0][0] = 0x0
4441 11:08:03.794754 cbt_cs[0][1] = 0x0
4442 11:08:03.797903 cbt_cs[1][0] = 0x0
4443 11:08:03.798289 cbt_cs[1][1] = 0x0
4444 11:08:03.801809 dump params cbt_mr12
4445 11:08:03.802277 cbt_mr12[0][0] = 0x0
4446 11:08:03.805956 cbt_mr12[0][1] = 0x0
4447 11:08:03.806421 cbt_mr12[1][0] = 0x0
4448 11:08:03.807852 cbt_mr12[1][1] = 0x0
4449 11:08:03.811968 dump params tx window
4450 11:08:03.812434 tx_center_min[0][0][0] = 0
4451 11:08:03.814585 tx_center_max[0][0][0] = 0
4452 11:08:03.818473 tx_center_min[0][0][1] = 0
4453 11:08:03.818953 tx_center_max[0][0][1] = 0
4454 11:08:03.821192 tx_center_min[0][1][0] = 0
4455 11:08:03.824742 tx_center_max[0][1][0] = 0
4456 11:08:03.828327 tx_center_min[0][1][1] = 0
4457 11:08:03.828800 tx_center_max[0][1][1] = 0
4458 11:08:03.831095 tx_center_min[1][0][0] = 0
4459 11:08:03.835000 tx_center_max[1][0][0] = 0
4460 11:08:03.837998 tx_center_min[1][0][1] = 0
4461 11:08:03.838406 tx_center_max[1][0][1] = 0
4462 11:08:03.841651 tx_center_min[1][1][0] = 0
4463 11:08:03.844388 tx_center_max[1][1][0] = 0
4464 11:08:03.848314 tx_center_min[1][1][1] = 0
4465 11:08:03.848785 tx_center_max[1][1][1] = 0
4466 11:08:03.851377 dump params tx window
4467 11:08:03.854690 tx_win_center[0][0][0] = 0
4468 11:08:03.855082 tx_first_pass[0][0][0] = 0
4469 11:08:03.857974 tx_last_pass[0][0][0] = 0
4470 11:08:03.861107 tx_win_center[0][0][1] = 0
4471 11:08:03.864434 tx_first_pass[0][0][1] = 0
4472 11:08:03.864824 tx_last_pass[0][0][1] = 0
4473 11:08:03.868105 tx_win_center[0][0][2] = 0
4474 11:08:03.871246 tx_first_pass[0][0][2] = 0
4475 11:08:03.871715 tx_last_pass[0][0][2] = 0
4476 11:08:03.874415 tx_win_center[0][0][3] = 0
4477 11:08:03.877743 tx_first_pass[0][0][3] = 0
4478 11:08:03.881263 tx_last_pass[0][0][3] = 0
4479 11:08:03.881730 tx_win_center[0][0][4] = 0
4480 11:08:03.884722 tx_first_pass[0][0][4] = 0
4481 11:08:03.888439 tx_last_pass[0][0][4] = 0
4482 11:08:03.890921 tx_win_center[0][0][5] = 0
4483 11:08:03.891313 tx_first_pass[0][0][5] = 0
4484 11:08:03.894734 tx_last_pass[0][0][5] = 0
4485 11:08:03.897941 tx_win_center[0][0][6] = 0
4486 11:08:03.898421 tx_first_pass[0][0][6] = 0
4487 11:08:03.901101 tx_last_pass[0][0][6] = 0
4488 11:08:03.904714 tx_win_center[0][0][7] = 0
4489 11:08:03.908141 tx_first_pass[0][0][7] = 0
4490 11:08:03.908613 tx_last_pass[0][0][7] = 0
4491 11:08:03.911210 tx_win_center[0][0][8] = 0
4492 11:08:03.914211 tx_first_pass[0][0][8] = 0
4493 11:08:03.917832 tx_last_pass[0][0][8] = 0
4494 11:08:03.918330 tx_win_center[0][0][9] = 0
4495 11:08:03.921243 tx_first_pass[0][0][9] = 0
4496 11:08:03.924895 tx_last_pass[0][0][9] = 0
4497 11:08:03.925454 tx_win_center[0][0][10] = 0
4498 11:08:03.928271 tx_first_pass[0][0][10] = 0
4499 11:08:03.931063 tx_last_pass[0][0][10] = 0
4500 11:08:03.934191 tx_win_center[0][0][11] = 0
4501 11:08:03.934621 tx_first_pass[0][0][11] = 0
4502 11:08:03.938049 tx_last_pass[0][0][11] = 0
4503 11:08:03.941658 tx_win_center[0][0][12] = 0
4504 11:08:03.944791 tx_first_pass[0][0][12] = 0
4505 11:08:03.945328 tx_last_pass[0][0][12] = 0
4506 11:08:03.947808 tx_win_center[0][0][13] = 0
4507 11:08:03.950889 tx_first_pass[0][0][13] = 0
4508 11:08:03.954370 tx_last_pass[0][0][13] = 0
4509 11:08:03.954875 tx_win_center[0][0][14] = 0
4510 11:08:03.957855 tx_first_pass[0][0][14] = 0
4511 11:08:03.960890 tx_last_pass[0][0][14] = 0
4512 11:08:03.964735 tx_win_center[0][0][15] = 0
4513 11:08:03.967805 tx_first_pass[0][0][15] = 0
4514 11:08:03.968340 tx_last_pass[0][0][15] = 0
4515 11:08:03.971566 tx_win_center[0][1][0] = 0
4516 11:08:03.974006 tx_first_pass[0][1][0] = 0
4517 11:08:03.974446 tx_last_pass[0][1][0] = 0
4518 11:08:03.977292 tx_win_center[0][1][1] = 0
4519 11:08:03.981028 tx_first_pass[0][1][1] = 0
4520 11:08:03.984158 tx_last_pass[0][1][1] = 0
4521 11:08:03.984811 tx_win_center[0][1][2] = 0
4522 11:08:03.987753 tx_first_pass[0][1][2] = 0
4523 11:08:03.990709 tx_last_pass[0][1][2] = 0
4524 11:08:03.994128 tx_win_center[0][1][3] = 0
4525 11:08:03.994662 tx_first_pass[0][1][3] = 0
4526 11:08:03.997717 tx_last_pass[0][1][3] = 0
4527 11:08:04.000522 tx_win_center[0][1][4] = 0
4528 11:08:04.000948 tx_first_pass[0][1][4] = 0
4529 11:08:04.004811 tx_last_pass[0][1][4] = 0
4530 11:08:04.007757 tx_win_center[0][1][5] = 0
4531 11:08:04.011069 tx_first_pass[0][1][5] = 0
4532 11:08:04.011559 tx_last_pass[0][1][5] = 0
4533 11:08:04.014042 tx_win_center[0][1][6] = 0
4534 11:08:04.017968 tx_first_pass[0][1][6] = 0
4535 11:08:04.018475 tx_last_pass[0][1][6] = 0
4536 11:08:04.020619 tx_win_center[0][1][7] = 0
4537 11:08:04.023759 tx_first_pass[0][1][7] = 0
4538 11:08:04.027816 tx_last_pass[0][1][7] = 0
4539 11:08:04.028383 tx_win_center[0][1][8] = 0
4540 11:08:04.030695 tx_first_pass[0][1][8] = 0
4541 11:08:04.034290 tx_last_pass[0][1][8] = 0
4542 11:08:04.037785 tx_win_center[0][1][9] = 0
4543 11:08:04.038296 tx_first_pass[0][1][9] = 0
4544 11:08:04.040964 tx_last_pass[0][1][9] = 0
4545 11:08:04.044512 tx_win_center[0][1][10] = 0
4546 11:08:04.047255 tx_first_pass[0][1][10] = 0
4547 11:08:04.047700 tx_last_pass[0][1][10] = 0
4548 11:08:04.050687 tx_win_center[0][1][11] = 0
4549 11:08:04.053769 tx_first_pass[0][1][11] = 0
4550 11:08:04.057158 tx_last_pass[0][1][11] = 0
4551 11:08:04.057673 tx_win_center[0][1][12] = 0
4552 11:08:04.061500 tx_first_pass[0][1][12] = 0
4553 11:08:04.063841 tx_last_pass[0][1][12] = 0
4554 11:08:04.067443 tx_win_center[0][1][13] = 0
4555 11:08:04.067949 tx_first_pass[0][1][13] = 0
4556 11:08:04.070428 tx_last_pass[0][1][13] = 0
4557 11:08:04.073776 tx_win_center[0][1][14] = 0
4558 11:08:04.077703 tx_first_pass[0][1][14] = 0
4559 11:08:04.078214 tx_last_pass[0][1][14] = 0
4560 11:08:04.080851 tx_win_center[0][1][15] = 0
4561 11:08:04.084129 tx_first_pass[0][1][15] = 0
4562 11:08:04.087221 tx_last_pass[0][1][15] = 0
4563 11:08:04.087720 tx_win_center[1][0][0] = 0
4564 11:08:04.090919 tx_first_pass[1][0][0] = 0
4565 11:08:04.093799 tx_last_pass[1][0][0] = 0
4566 11:08:04.094269 tx_win_center[1][0][1] = 0
4567 11:08:04.097723 tx_first_pass[1][0][1] = 0
4568 11:08:04.100868 tx_last_pass[1][0][1] = 0
4569 11:08:04.104337 tx_win_center[1][0][2] = 0
4570 11:08:04.104853 tx_first_pass[1][0][2] = 0
4571 11:08:04.107414 tx_last_pass[1][0][2] = 0
4572 11:08:04.110808 tx_win_center[1][0][3] = 0
4573 11:08:04.113750 tx_first_pass[1][0][3] = 0
4574 11:08:04.114177 tx_last_pass[1][0][3] = 0
4575 11:08:04.117594 tx_win_center[1][0][4] = 0
4576 11:08:04.120338 tx_first_pass[1][0][4] = 0
4577 11:08:04.120841 tx_last_pass[1][0][4] = 0
4578 11:08:04.123648 tx_win_center[1][0][5] = 0
4579 11:08:04.127669 tx_first_pass[1][0][5] = 0
4580 11:08:04.131065 tx_last_pass[1][0][5] = 0
4581 11:08:04.131607 tx_win_center[1][0][6] = 0
4582 11:08:04.133833 tx_first_pass[1][0][6] = 0
4583 11:08:04.137813 tx_last_pass[1][0][6] = 0
4584 11:08:04.140460 tx_win_center[1][0][7] = 0
4585 11:08:04.140889 tx_first_pass[1][0][7] = 0
4586 11:08:04.143503 tx_last_pass[1][0][7] = 0
4587 11:08:04.146928 tx_win_center[1][0][8] = 0
4588 11:08:04.147355 tx_first_pass[1][0][8] = 0
4589 11:08:04.150175 tx_last_pass[1][0][8] = 0
4590 11:08:04.154181 tx_win_center[1][0][9] = 0
4591 11:08:04.157474 tx_first_pass[1][0][9] = 0
4592 11:08:04.157977 tx_last_pass[1][0][9] = 0
4593 11:08:04.160024 tx_win_center[1][0][10] = 0
4594 11:08:04.163245 tx_first_pass[1][0][10] = 0
4595 11:08:04.166638 tx_last_pass[1][0][10] = 0
4596 11:08:04.167065 tx_win_center[1][0][11] = 0
4597 11:08:04.170248 tx_first_pass[1][0][11] = 0
4598 11:08:04.173612 tx_last_pass[1][0][11] = 0
4599 11:08:04.176975 tx_win_center[1][0][12] = 0
4600 11:08:04.177512 tx_first_pass[1][0][12] = 0
4601 11:08:04.179908 tx_last_pass[1][0][12] = 0
4602 11:08:04.183675 tx_win_center[1][0][13] = 0
4603 11:08:04.187239 tx_first_pass[1][0][13] = 0
4604 11:08:04.187748 tx_last_pass[1][0][13] = 0
4605 11:08:04.190088 tx_win_center[1][0][14] = 0
4606 11:08:04.193525 tx_first_pass[1][0][14] = 0
4607 11:08:04.197018 tx_last_pass[1][0][14] = 0
4608 11:08:04.197468 tx_win_center[1][0][15] = 0
4609 11:08:04.200099 tx_first_pass[1][0][15] = 0
4610 11:08:04.203473 tx_last_pass[1][0][15] = 0
4611 11:08:04.206432 tx_win_center[1][1][0] = 0
4612 11:08:04.206860 tx_first_pass[1][1][0] = 0
4613 11:08:04.210165 tx_last_pass[1][1][0] = 0
4614 11:08:04.213014 tx_win_center[1][1][1] = 0
4615 11:08:04.216373 tx_first_pass[1][1][1] = 0
4616 11:08:04.216776 tx_last_pass[1][1][1] = 0
4617 11:08:04.219689 tx_win_center[1][1][2] = 0
4618 11:08:04.223363 tx_first_pass[1][1][2] = 0
4619 11:08:04.223742 tx_last_pass[1][1][2] = 0
4620 11:08:04.227239 tx_win_center[1][1][3] = 0
4621 11:08:04.229964 tx_first_pass[1][1][3] = 0
4622 11:08:04.233226 tx_last_pass[1][1][3] = 0
4623 11:08:04.233607 tx_win_center[1][1][4] = 0
4624 11:08:04.236620 tx_first_pass[1][1][4] = 0
4625 11:08:04.239522 tx_last_pass[1][1][4] = 0
4626 11:08:04.243206 tx_win_center[1][1][5] = 0
4627 11:08:04.243674 tx_first_pass[1][1][5] = 0
4628 11:08:04.246577 tx_last_pass[1][1][5] = 0
4629 11:08:04.249656 tx_win_center[1][1][6] = 0
4630 11:08:04.250047 tx_first_pass[1][1][6] = 0
4631 11:08:04.252982 tx_last_pass[1][1][6] = 0
4632 11:08:04.256237 tx_win_center[1][1][7] = 0
4633 11:08:04.259799 tx_first_pass[1][1][7] = 0
4634 11:08:04.260190 tx_last_pass[1][1][7] = 0
4635 11:08:04.263249 tx_win_center[1][1][8] = 0
4636 11:08:04.266434 tx_first_pass[1][1][8] = 0
4637 11:08:04.269419 tx_last_pass[1][1][8] = 0
4638 11:08:04.269808 tx_win_center[1][1][9] = 0
4639 11:08:04.273286 tx_first_pass[1][1][9] = 0
4640 11:08:04.276763 tx_last_pass[1][1][9] = 0
4641 11:08:04.277182 tx_win_center[1][1][10] = 0
4642 11:08:04.279803 tx_first_pass[1][1][10] = 0
4643 11:08:04.283854 tx_last_pass[1][1][10] = 0
4644 11:08:04.286487 tx_win_center[1][1][11] = 0
4645 11:08:04.286949 tx_first_pass[1][1][11] = 0
4646 11:08:04.289787 tx_last_pass[1][1][11] = 0
4647 11:08:04.293010 tx_win_center[1][1][12] = 0
4648 11:08:04.296836 tx_first_pass[1][1][12] = 0
4649 11:08:04.297422 tx_last_pass[1][1][12] = 0
4650 11:08:04.300020 tx_win_center[1][1][13] = 0
4651 11:08:04.302872 tx_first_pass[1][1][13] = 0
4652 11:08:04.305897 tx_last_pass[1][1][13] = 0
4653 11:08:04.306337 tx_win_center[1][1][14] = 0
4654 11:08:04.309562 tx_first_pass[1][1][14] = 0
4655 11:08:04.312657 tx_last_pass[1][1][14] = 0
4656 11:08:04.316397 tx_win_center[1][1][15] = 0
4657 11:08:04.319590 tx_first_pass[1][1][15] = 0
4658 11:08:04.319985 tx_last_pass[1][1][15] = 0
4659 11:08:04.322814 dump params rx window
4660 11:08:04.326144 rx_firspass[0][0][0] = 0
4661 11:08:04.326573 rx_lastpass[0][0][0] = 0
4662 11:08:04.329559 rx_firspass[0][0][1] = 0
4663 11:08:04.332673 rx_lastpass[0][0][1] = 0
4664 11:08:04.333059 rx_firspass[0][0][2] = 0
4665 11:08:04.336460 rx_lastpass[0][0][2] = 0
4666 11:08:04.340059 rx_firspass[0][0][3] = 0
4667 11:08:04.340490 rx_lastpass[0][0][3] = 0
4668 11:08:04.342600 rx_firspass[0][0][4] = 0
4669 11:08:04.346554 rx_lastpass[0][0][4] = 0
4670 11:08:04.346938 rx_firspass[0][0][5] = 0
4671 11:08:04.349722 rx_lastpass[0][0][5] = 0
4672 11:08:04.352938 rx_firspass[0][0][6] = 0
4673 11:08:04.353374 rx_lastpass[0][0][6] = 0
4674 11:08:04.355723 rx_firspass[0][0][7] = 0
4675 11:08:04.359554 rx_lastpass[0][0][7] = 0
4676 11:08:04.359940 rx_firspass[0][0][8] = 0
4677 11:08:04.362820 rx_lastpass[0][0][8] = 0
4678 11:08:04.366174 rx_firspass[0][0][9] = 0
4679 11:08:04.369005 rx_lastpass[0][0][9] = 0
4680 11:08:04.369424 rx_firspass[0][0][10] = 0
4681 11:08:04.372601 rx_lastpass[0][0][10] = 0
4682 11:08:04.375593 rx_firspass[0][0][11] = 0
4683 11:08:04.375980 rx_lastpass[0][0][11] = 0
4684 11:08:04.379818 rx_firspass[0][0][12] = 0
4685 11:08:04.382812 rx_lastpass[0][0][12] = 0
4686 11:08:04.385787 rx_firspass[0][0][13] = 0
4687 11:08:04.386170 rx_lastpass[0][0][13] = 0
4688 11:08:04.389013 rx_firspass[0][0][14] = 0
4689 11:08:04.392599 rx_lastpass[0][0][14] = 0
4690 11:08:04.393057 rx_firspass[0][0][15] = 0
4691 11:08:04.396338 rx_lastpass[0][0][15] = 0
4692 11:08:04.399372 rx_firspass[0][1][0] = 0
4693 11:08:04.402656 rx_lastpass[0][1][0] = 0
4694 11:08:04.403121 rx_firspass[0][1][1] = 0
4695 11:08:04.405833 rx_lastpass[0][1][1] = 0
4696 11:08:04.409565 rx_firspass[0][1][2] = 0
4697 11:08:04.410040 rx_lastpass[0][1][2] = 0
4698 11:08:04.412609 rx_firspass[0][1][3] = 0
4699 11:08:04.415844 rx_lastpass[0][1][3] = 0
4700 11:08:04.416312 rx_firspass[0][1][4] = 0
4701 11:08:04.419325 rx_lastpass[0][1][4] = 0
4702 11:08:04.422689 rx_firspass[0][1][5] = 0
4703 11:08:04.423154 rx_lastpass[0][1][5] = 0
4704 11:08:04.425604 rx_firspass[0][1][6] = 0
4705 11:08:04.429014 rx_lastpass[0][1][6] = 0
4706 11:08:04.429475 rx_firspass[0][1][7] = 0
4707 11:08:04.433003 rx_lastpass[0][1][7] = 0
4708 11:08:04.436502 rx_firspass[0][1][8] = 0
4709 11:08:04.436968 rx_lastpass[0][1][8] = 0
4710 11:08:04.439627 rx_firspass[0][1][9] = 0
4711 11:08:04.442728 rx_lastpass[0][1][9] = 0
4712 11:08:04.446092 rx_firspass[0][1][10] = 0
4713 11:08:04.446562 rx_lastpass[0][1][10] = 0
4714 11:08:04.449551 rx_firspass[0][1][11] = 0
4715 11:08:04.452727 rx_lastpass[0][1][11] = 0
4716 11:08:04.453226 rx_firspass[0][1][12] = 0
4717 11:08:04.455819 rx_lastpass[0][1][12] = 0
4718 11:08:04.460025 rx_firspass[0][1][13] = 0
4719 11:08:04.462364 rx_lastpass[0][1][13] = 0
4720 11:08:04.462753 rx_firspass[0][1][14] = 0
4721 11:08:04.466456 rx_lastpass[0][1][14] = 0
4722 11:08:04.469048 rx_firspass[0][1][15] = 0
4723 11:08:04.469562 rx_lastpass[0][1][15] = 0
4724 11:08:04.472865 rx_firspass[1][0][0] = 0
4725 11:08:04.475902 rx_lastpass[1][0][0] = 0
4726 11:08:04.476290 rx_firspass[1][0][1] = 0
4727 11:08:04.479017 rx_lastpass[1][0][1] = 0
4728 11:08:04.482490 rx_firspass[1][0][2] = 0
4729 11:08:04.485936 rx_lastpass[1][0][2] = 0
4730 11:08:04.486402 rx_firspass[1][0][3] = 0
4731 11:08:04.489770 rx_lastpass[1][0][3] = 0
4732 11:08:04.492282 rx_firspass[1][0][4] = 0
4733 11:08:04.492669 rx_lastpass[1][0][4] = 0
4734 11:08:04.495588 rx_firspass[1][0][5] = 0
4735 11:08:04.499245 rx_lastpass[1][0][5] = 0
4736 11:08:04.499719 rx_firspass[1][0][6] = 0
4737 11:08:04.502534 rx_lastpass[1][0][6] = 0
4738 11:08:04.505817 rx_firspass[1][0][7] = 0
4739 11:08:04.506288 rx_lastpass[1][0][7] = 0
4740 11:08:04.508862 rx_firspass[1][0][8] = 0
4741 11:08:04.512187 rx_lastpass[1][0][8] = 0
4742 11:08:04.515391 rx_firspass[1][0][9] = 0
4743 11:08:04.515861 rx_lastpass[1][0][9] = 0
4744 11:08:04.519109 rx_firspass[1][0][10] = 0
4745 11:08:04.522250 rx_lastpass[1][0][10] = 0
4746 11:08:04.522642 rx_firspass[1][0][11] = 0
4747 11:08:04.525448 rx_lastpass[1][0][11] = 0
4748 11:08:04.528790 rx_firspass[1][0][12] = 0
4749 11:08:04.529306 rx_lastpass[1][0][12] = 0
4750 11:08:04.531902 rx_firspass[1][0][13] = 0
4751 11:08:04.536044 rx_lastpass[1][0][13] = 0
4752 11:08:04.538702 rx_firspass[1][0][14] = 0
4753 11:08:04.539164 rx_lastpass[1][0][14] = 0
4754 11:08:04.542322 rx_firspass[1][0][15] = 0
4755 11:08:04.546435 rx_lastpass[1][0][15] = 0
4756 11:08:04.546905 rx_firspass[1][1][0] = 0
4757 11:08:04.549086 rx_lastpass[1][1][0] = 0
4758 11:08:04.552291 rx_firspass[1][1][1] = 0
4759 11:08:04.552760 rx_lastpass[1][1][1] = 0
4760 11:08:04.555442 rx_firspass[1][1][2] = 0
4761 11:08:04.558913 rx_lastpass[1][1][2] = 0
4762 11:08:04.561789 rx_firspass[1][1][3] = 0
4763 11:08:04.562175 rx_lastpass[1][1][3] = 0
4764 11:08:04.564943 rx_firspass[1][1][4] = 0
4765 11:08:04.568885 rx_lastpass[1][1][4] = 0
4766 11:08:04.569555 rx_firspass[1][1][5] = 0
4767 11:08:04.572342 rx_lastpass[1][1][5] = 0
4768 11:08:04.575506 rx_firspass[1][1][6] = 0
4769 11:08:04.575909 rx_lastpass[1][1][6] = 0
4770 11:08:04.579056 rx_firspass[1][1][7] = 0
4771 11:08:04.582283 rx_lastpass[1][1][7] = 0
4772 11:08:04.582751 rx_firspass[1][1][8] = 0
4773 11:08:04.585482 rx_lastpass[1][1][8] = 0
4774 11:08:04.588471 rx_firspass[1][1][9] = 0
4775 11:08:04.592098 rx_lastpass[1][1][9] = 0
4776 11:08:04.592482 rx_firspass[1][1][10] = 0
4777 11:08:04.595632 rx_lastpass[1][1][10] = 0
4778 11:08:04.599385 rx_firspass[1][1][11] = 0
4779 11:08:04.599855 rx_lastpass[1][1][11] = 0
4780 11:08:04.602107 rx_firspass[1][1][12] = 0
4781 11:08:04.605344 rx_lastpass[1][1][12] = 0
4782 11:08:04.608750 rx_firspass[1][1][13] = 0
4783 11:08:04.609252 rx_lastpass[1][1][13] = 0
4784 11:08:04.612322 rx_firspass[1][1][14] = 0
4785 11:08:04.615256 rx_lastpass[1][1][14] = 0
4786 11:08:04.615724 rx_firspass[1][1][15] = 0
4787 11:08:04.619069 rx_lastpass[1][1][15] = 0
4788 11:08:04.622012 dump params clk_delay
4789 11:08:04.622401 clk_delay[0] = 0
4790 11:08:04.625625 clk_delay[1] = 0
4791 11:08:04.626055 dump params dqs_delay
4792 11:08:04.628578 dqs_delay[0][0] = 0
4793 11:08:04.629169 dqs_delay[0][1] = 0
4794 11:08:04.632084 dqs_delay[1][0] = 0
4795 11:08:04.632578 dqs_delay[1][1] = 0
4796 11:08:04.636132 dump params delay_cell_unit = 833
4797 11:08:04.638511 dump source = 0x0
4798 11:08:04.639006 dump params frequency:800
4799 11:08:04.641589 dump params rank number:2
4800 11:08:04.642010
4801 11:08:04.644995 dump params write leveling
4802 11:08:04.648254 write leveling[0][0][0] = 0x0
4803 11:08:04.651790 write leveling[0][0][1] = 0x0
4804 11:08:04.652304 write leveling[0][1][0] = 0x0
4805 11:08:04.655015 write leveling[0][1][1] = 0x0
4806 11:08:04.658187 write leveling[1][0][0] = 0x0
4807 11:08:04.661325 write leveling[1][0][1] = 0x0
4808 11:08:04.665214 write leveling[1][1][0] = 0x0
4809 11:08:04.665656 write leveling[1][1][1] = 0x0
4810 11:08:04.668282 dump params cbt_cs
4811 11:08:04.671366 cbt_cs[0][0] = 0x0
4812 11:08:04.671873 cbt_cs[0][1] = 0x0
4813 11:08:04.674567 cbt_cs[1][0] = 0x0
4814 11:08:04.674999 cbt_cs[1][1] = 0x0
4815 11:08:04.677833 dump params cbt_mr12
4816 11:08:04.678261 cbt_mr12[0][0] = 0x0
4817 11:08:04.681795 cbt_mr12[0][1] = 0x0
4818 11:08:04.682222 cbt_mr12[1][0] = 0x0
4819 11:08:04.684933 cbt_mr12[1][1] = 0x0
4820 11:08:04.688170 dump params tx window
4821 11:08:04.688673 tx_center_min[0][0][0] = 0
4822 11:08:04.691392 tx_center_max[0][0][0] = 0
4823 11:08:04.694744 tx_center_min[0][0][1] = 0
4824 11:08:04.695245 tx_center_max[0][0][1] = 0
4825 11:08:04.698088 tx_center_min[0][1][0] = 0
4826 11:08:04.701357 tx_center_max[0][1][0] = 0
4827 11:08:04.704844 tx_center_min[0][1][1] = 0
4828 11:08:04.705407 tx_center_max[0][1][1] = 0
4829 11:08:04.708316 tx_center_min[1][0][0] = 0
4830 11:08:04.711482 tx_center_max[1][0][0] = 0
4831 11:08:04.714859 tx_center_min[1][0][1] = 0
4832 11:08:04.715371 tx_center_max[1][0][1] = 0
4833 11:08:04.717794 tx_center_min[1][1][0] = 0
4834 11:08:04.721295 tx_center_max[1][1][0] = 0
4835 11:08:04.724715 tx_center_min[1][1][1] = 0
4836 11:08:04.725268 tx_center_max[1][1][1] = 0
4837 11:08:04.727650 dump params tx window
4838 11:08:04.731405 tx_win_center[0][0][0] = 0
4839 11:08:04.731912 tx_first_pass[0][0][0] = 0
4840 11:08:04.734361 tx_last_pass[0][0][0] = 0
4841 11:08:04.737726 tx_win_center[0][0][1] = 0
4842 11:08:04.741685 tx_first_pass[0][0][1] = 0
4843 11:08:04.742189 tx_last_pass[0][0][1] = 0
4844 11:08:04.744288 tx_win_center[0][0][2] = 0
4845 11:08:04.748162 tx_first_pass[0][0][2] = 0
4846 11:08:04.751774 tx_last_pass[0][0][2] = 0
4847 11:08:04.752280 tx_win_center[0][0][3] = 0
4848 11:08:04.754771 tx_first_pass[0][0][3] = 0
4849 11:08:04.757865 tx_last_pass[0][0][3] = 0
4850 11:08:04.758380 tx_win_center[0][0][4] = 0
4851 11:08:04.761496 tx_first_pass[0][0][4] = 0
4852 11:08:04.764353 tx_last_pass[0][0][4] = 0
4853 11:08:04.767505 tx_win_center[0][0][5] = 0
4854 11:08:04.767932 tx_first_pass[0][0][5] = 0
4855 11:08:04.771101 tx_last_pass[0][0][5] = 0
4856 11:08:04.774726 tx_win_center[0][0][6] = 0
4857 11:08:04.778387 tx_first_pass[0][0][6] = 0
4858 11:08:04.778897 tx_last_pass[0][0][6] = 0
4859 11:08:04.781021 tx_win_center[0][0][7] = 0
4860 11:08:04.784293 tx_first_pass[0][0][7] = 0
4861 11:08:04.784796 tx_last_pass[0][0][7] = 0
4862 11:08:04.787883 tx_win_center[0][0][8] = 0
4863 11:08:04.790971 tx_first_pass[0][0][8] = 0
4864 11:08:04.794653 tx_last_pass[0][0][8] = 0
4865 11:08:04.795161 tx_win_center[0][0][9] = 0
4866 11:08:04.797939 tx_first_pass[0][0][9] = 0
4867 11:08:04.801176 tx_last_pass[0][0][9] = 0
4868 11:08:04.804164 tx_win_center[0][0][10] = 0
4869 11:08:04.804671 tx_first_pass[0][0][10] = 0
4870 11:08:04.808079 tx_last_pass[0][0][10] = 0
4871 11:08:04.811254 tx_win_center[0][0][11] = 0
4872 11:08:04.814086 tx_first_pass[0][0][11] = 0
4873 11:08:04.814516 tx_last_pass[0][0][11] = 0
4874 11:08:04.817588 tx_win_center[0][0][12] = 0
4875 11:08:04.820820 tx_first_pass[0][0][12] = 0
4876 11:08:04.824045 tx_last_pass[0][0][12] = 0
4877 11:08:04.824555 tx_win_center[0][0][13] = 0
4878 11:08:04.827409 tx_first_pass[0][0][13] = 0
4879 11:08:04.830556 tx_last_pass[0][0][13] = 0
4880 11:08:04.834141 tx_win_center[0][0][14] = 0
4881 11:08:04.834652 tx_first_pass[0][0][14] = 0
4882 11:08:04.838363 tx_last_pass[0][0][14] = 0
4883 11:08:04.841243 tx_win_center[0][0][15] = 0
4884 11:08:04.843889 tx_first_pass[0][0][15] = 0
4885 11:08:04.844316 tx_last_pass[0][0][15] = 0
4886 11:08:04.847755 tx_win_center[0][1][0] = 0
4887 11:08:04.850705 tx_first_pass[0][1][0] = 0
4888 11:08:04.854016 tx_last_pass[0][1][0] = 0
4889 11:08:04.854522 tx_win_center[0][1][1] = 0
4890 11:08:04.857532 tx_first_pass[0][1][1] = 0
4891 11:08:04.860887 tx_last_pass[0][1][1] = 0
4892 11:08:04.861455 tx_win_center[0][1][2] = 0
4893 11:08:04.863965 tx_first_pass[0][1][2] = 0
4894 11:08:04.867385 tx_last_pass[0][1][2] = 0
4895 11:08:04.871051 tx_win_center[0][1][3] = 0
4896 11:08:04.871568 tx_first_pass[0][1][3] = 0
4897 11:08:04.874378 tx_last_pass[0][1][3] = 0
4898 11:08:04.877488 tx_win_center[0][1][4] = 0
4899 11:08:04.880940 tx_first_pass[0][1][4] = 0
4900 11:08:04.881498 tx_last_pass[0][1][4] = 0
4901 11:08:04.884433 tx_win_center[0][1][5] = 0
4902 11:08:04.887271 tx_first_pass[0][1][5] = 0
4903 11:08:04.887780 tx_last_pass[0][1][5] = 0
4904 11:08:04.890732 tx_win_center[0][1][6] = 0
4905 11:08:04.894071 tx_first_pass[0][1][6] = 0
4906 11:08:04.897109 tx_last_pass[0][1][6] = 0
4907 11:08:04.897659 tx_win_center[0][1][7] = 0
4908 11:08:04.900612 tx_first_pass[0][1][7] = 0
4909 11:08:04.904085 tx_last_pass[0][1][7] = 0
4910 11:08:04.904647 tx_win_center[0][1][8] = 0
4911 11:08:04.907332 tx_first_pass[0][1][8] = 0
4912 11:08:04.910469 tx_last_pass[0][1][8] = 0
4913 11:08:04.913724 tx_win_center[0][1][9] = 0
4914 11:08:04.914152 tx_first_pass[0][1][9] = 0
4915 11:08:04.917343 tx_last_pass[0][1][9] = 0
4916 11:08:04.920979 tx_win_center[0][1][10] = 0
4917 11:08:04.923540 tx_first_pass[0][1][10] = 0
4918 11:08:04.923971 tx_last_pass[0][1][10] = 0
4919 11:08:04.929630 tx_win_center[0][1][11] = 0
4920 11:08:04.930569 tx_first_pass[0][1][11] = 0
4921 11:08:04.934164 tx_last_pass[0][1][11] = 0
4922 11:08:04.934846 tx_win_center[0][1][12] = 0
4923 11:08:04.936967 tx_first_pass[0][1][12] = 0
4924 11:08:04.940785 tx_last_pass[0][1][12] = 0
4925 11:08:04.943721 tx_win_center[0][1][13] = 0
4926 11:08:04.944151 tx_first_pass[0][1][13] = 0
4927 11:08:04.948058 tx_last_pass[0][1][13] = 0
4928 11:08:04.950711 tx_win_center[0][1][14] = 0
4929 11:08:04.954099 tx_first_pass[0][1][14] = 0
4930 11:08:04.954607 tx_last_pass[0][1][14] = 0
4931 11:08:04.957950 tx_win_center[0][1][15] = 0
4932 11:08:04.960460 tx_first_pass[0][1][15] = 0
4933 11:08:04.963884 tx_last_pass[0][1][15] = 0
4934 11:08:04.964388 tx_win_center[1][0][0] = 0
4935 11:08:04.966822 tx_first_pass[1][0][0] = 0
4936 11:08:04.970591 tx_last_pass[1][0][0] = 0
4937 11:08:04.974056 tx_win_center[1][0][1] = 0
4938 11:08:04.974565 tx_first_pass[1][0][1] = 0
4939 11:08:04.976564 tx_last_pass[1][0][1] = 0
4940 11:08:04.980446 tx_win_center[1][0][2] = 0
4941 11:08:04.980965 tx_first_pass[1][0][2] = 0
4942 11:08:04.984061 tx_last_pass[1][0][2] = 0
4943 11:08:04.986813 tx_win_center[1][0][3] = 0
4944 11:08:04.990737 tx_first_pass[1][0][3] = 0
4945 11:08:04.991241 tx_last_pass[1][0][3] = 0
4946 11:08:04.993489 tx_win_center[1][0][4] = 0
4947 11:08:04.996893 tx_first_pass[1][0][4] = 0
4948 11:08:05.000280 tx_last_pass[1][0][4] = 0
4949 11:08:05.000785 tx_win_center[1][0][5] = 0
4950 11:08:05.003963 tx_first_pass[1][0][5] = 0
4951 11:08:05.006823 tx_last_pass[1][0][5] = 0
4952 11:08:05.007346 tx_win_center[1][0][6] = 0
4953 11:08:05.010427 tx_first_pass[1][0][6] = 0
4954 11:08:05.013611 tx_last_pass[1][0][6] = 0
4955 11:08:05.017289 tx_win_center[1][0][7] = 0
4956 11:08:05.017799 tx_first_pass[1][0][7] = 0
4957 11:08:05.020292 tx_last_pass[1][0][7] = 0
4958 11:08:05.024609 tx_win_center[1][0][8] = 0
4959 11:08:05.025040 tx_first_pass[1][0][8] = 0
4960 11:08:05.027165 tx_last_pass[1][0][8] = 0
4961 11:08:05.030779 tx_win_center[1][0][9] = 0
4962 11:08:05.033798 tx_first_pass[1][0][9] = 0
4963 11:08:05.034304 tx_last_pass[1][0][9] = 0
4964 11:08:05.037104 tx_win_center[1][0][10] = 0
4965 11:08:05.041049 tx_first_pass[1][0][10] = 0
4966 11:08:05.043931 tx_last_pass[1][0][10] = 0
4967 11:08:05.044359 tx_win_center[1][0][11] = 0
4968 11:08:05.047064 tx_first_pass[1][0][11] = 0
4969 11:08:05.051509 tx_last_pass[1][0][11] = 0
4970 11:08:05.054031 tx_win_center[1][0][12] = 0
4971 11:08:05.054539 tx_first_pass[1][0][12] = 0
4972 11:08:05.057141 tx_last_pass[1][0][12] = 0
4973 11:08:05.060770 tx_win_center[1][0][13] = 0
4974 11:08:05.063634 tx_first_pass[1][0][13] = 0
4975 11:08:05.064138 tx_last_pass[1][0][13] = 0
4976 11:08:05.067089 tx_win_center[1][0][14] = 0
4977 11:08:05.070300 tx_first_pass[1][0][14] = 0
4978 11:08:05.073369 tx_last_pass[1][0][14] = 0
4979 11:08:05.073803 tx_win_center[1][0][15] = 0
4980 11:08:05.076791 tx_first_pass[1][0][15] = 0
4981 11:08:05.080189 tx_last_pass[1][0][15] = 0
4982 11:08:05.083661 tx_win_center[1][1][0] = 0
4983 11:08:05.084095 tx_first_pass[1][1][0] = 0
4984 11:08:05.087019 tx_last_pass[1][1][0] = 0
4985 11:08:05.090683 tx_win_center[1][1][1] = 0
4986 11:08:05.093809 tx_first_pass[1][1][1] = 0
4987 11:08:05.094326 tx_last_pass[1][1][1] = 0
4988 11:08:05.097062 tx_win_center[1][1][2] = 0
4989 11:08:05.100390 tx_first_pass[1][1][2] = 0
4990 11:08:05.100898 tx_last_pass[1][1][2] = 0
4991 11:08:05.103103 tx_win_center[1][1][3] = 0
4992 11:08:05.106462 tx_first_pass[1][1][3] = 0
4993 11:08:05.109509 tx_last_pass[1][1][3] = 0
4994 11:08:05.109940 tx_win_center[1][1][4] = 0
4995 11:08:05.113269 tx_first_pass[1][1][4] = 0
4996 11:08:05.116716 tx_last_pass[1][1][4] = 0
4997 11:08:05.119987 tx_win_center[1][1][5] = 0
4998 11:08:05.120510 tx_first_pass[1][1][5] = 0
4999 11:08:05.123478 tx_last_pass[1][1][5] = 0
5000 11:08:05.126265 tx_win_center[1][1][6] = 0
5001 11:08:05.130280 tx_first_pass[1][1][6] = 0
5002 11:08:05.130792 tx_last_pass[1][1][6] = 0
5003 11:08:05.133404 tx_win_center[1][1][7] = 0
5004 11:08:05.136504 tx_first_pass[1][1][7] = 0
5005 11:08:05.137031 tx_last_pass[1][1][7] = 0
5006 11:08:05.139880 tx_win_center[1][1][8] = 0
5007 11:08:05.143330 tx_first_pass[1][1][8] = 0
5008 11:08:05.146934 tx_last_pass[1][1][8] = 0
5009 11:08:05.147443 tx_win_center[1][1][9] = 0
5010 11:08:05.149693 tx_first_pass[1][1][9] = 0
5011 11:08:05.153004 tx_last_pass[1][1][9] = 0
5012 11:08:05.156168 tx_win_center[1][1][10] = 0
5013 11:08:05.156679 tx_first_pass[1][1][10] = 0
5014 11:08:05.159568 tx_last_pass[1][1][10] = 0
5015 11:08:05.162631 tx_win_center[1][1][11] = 0
5016 11:08:05.166481 tx_first_pass[1][1][11] = 0
5017 11:08:05.166646 tx_last_pass[1][1][11] = 0
5018 11:08:05.169059 tx_win_center[1][1][12] = 0
5019 11:08:05.172558 tx_first_pass[1][1][12] = 0
5020 11:08:05.176008 tx_last_pass[1][1][12] = 0
5021 11:08:05.176183 tx_win_center[1][1][13] = 0
5022 11:08:05.179529 tx_first_pass[1][1][13] = 0
5023 11:08:05.182831 tx_last_pass[1][1][13] = 0
5024 11:08:05.185911 tx_win_center[1][1][14] = 0
5025 11:08:05.186189 tx_first_pass[1][1][14] = 0
5026 11:08:05.189073 tx_last_pass[1][1][14] = 0
5027 11:08:05.192284 tx_win_center[1][1][15] = 0
5028 11:08:05.196441 tx_first_pass[1][1][15] = 0
5029 11:08:05.196750 tx_last_pass[1][1][15] = 0
5030 11:08:05.199481 dump params rx window
5031 11:08:05.202622 rx_firspass[0][0][0] = 0
5032 11:08:05.203021 rx_lastpass[0][0][0] = 0
5033 11:08:05.205598 rx_firspass[0][0][1] = 0
5034 11:08:05.208991 rx_lastpass[0][0][1] = 0
5035 11:08:05.209455 rx_firspass[0][0][2] = 0
5036 11:08:05.212434 rx_lastpass[0][0][2] = 0
5037 11:08:05.215629 rx_firspass[0][0][3] = 0
5038 11:08:05.216027 rx_lastpass[0][0][3] = 0
5039 11:08:05.218968 rx_firspass[0][0][4] = 0
5040 11:08:05.222637 rx_lastpass[0][0][4] = 0
5041 11:08:05.225784 rx_firspass[0][0][5] = 0
5042 11:08:05.226244 rx_lastpass[0][0][5] = 0
5043 11:08:05.229089 rx_firspass[0][0][6] = 0
5044 11:08:05.232640 rx_lastpass[0][0][6] = 0
5045 11:08:05.233037 rx_firspass[0][0][7] = 0
5046 11:08:05.236079 rx_lastpass[0][0][7] = 0
5047 11:08:05.239038 rx_firspass[0][0][8] = 0
5048 11:08:05.239426 rx_lastpass[0][0][8] = 0
5049 11:08:05.242299 rx_firspass[0][0][9] = 0
5050 11:08:05.245334 rx_lastpass[0][0][9] = 0
5051 11:08:05.245722 rx_firspass[0][0][10] = 0
5052 11:08:05.248937 rx_lastpass[0][0][10] = 0
5053 11:08:05.252327 rx_firspass[0][0][11] = 0
5054 11:08:05.255821 rx_lastpass[0][0][11] = 0
5055 11:08:05.256338 rx_firspass[0][0][12] = 0
5056 11:08:05.258919 rx_lastpass[0][0][12] = 0
5057 11:08:05.262545 rx_firspass[0][0][13] = 0
5058 11:08:05.262973 rx_lastpass[0][0][13] = 0
5059 11:08:05.265288 rx_firspass[0][0][14] = 0
5060 11:08:05.269211 rx_lastpass[0][0][14] = 0
5061 11:08:05.272228 rx_firspass[0][0][15] = 0
5062 11:08:05.272734 rx_lastpass[0][0][15] = 0
5063 11:08:05.275725 rx_firspass[0][1][0] = 0
5064 11:08:05.278863 rx_lastpass[0][1][0] = 0
5065 11:08:05.279248 rx_firspass[0][1][1] = 0
5066 11:08:05.282293 rx_lastpass[0][1][1] = 0
5067 11:08:05.285693 rx_firspass[0][1][2] = 0
5068 11:08:05.286077 rx_lastpass[0][1][2] = 0
5069 11:08:05.289351 rx_firspass[0][1][3] = 0
5070 11:08:05.293046 rx_lastpass[0][1][3] = 0
5071 11:08:05.293505 rx_firspass[0][1][4] = 0
5072 11:08:05.295333 rx_lastpass[0][1][4] = 0
5073 11:08:05.298735 rx_firspass[0][1][5] = 0
5074 11:08:05.302708 rx_lastpass[0][1][5] = 0
5075 11:08:05.303303 rx_firspass[0][1][6] = 0
5076 11:08:05.306135 rx_lastpass[0][1][6] = 0
5077 11:08:05.308678 rx_firspass[0][1][7] = 0
5078 11:08:05.309075 rx_lastpass[0][1][7] = 0
5079 11:08:05.312425 rx_firspass[0][1][8] = 0
5080 11:08:05.315174 rx_lastpass[0][1][8] = 0
5081 11:08:05.315569 rx_firspass[0][1][9] = 0
5082 11:08:05.318653 rx_lastpass[0][1][9] = 0
5083 11:08:05.322146 rx_firspass[0][1][10] = 0
5084 11:08:05.322547 rx_lastpass[0][1][10] = 0
5085 11:08:05.325424 rx_firspass[0][1][11] = 0
5086 11:08:05.328666 rx_lastpass[0][1][11] = 0
5087 11:08:05.331759 rx_firspass[0][1][12] = 0
5088 11:08:05.332114 rx_lastpass[0][1][12] = 0
5089 11:08:05.335588 rx_firspass[0][1][13] = 0
5090 11:08:05.338384 rx_lastpass[0][1][13] = 0
5091 11:08:05.338791 rx_firspass[0][1][14] = 0
5092 11:08:05.341660 rx_lastpass[0][1][14] = 0
5093 11:08:05.345217 rx_firspass[0][1][15] = 0
5094 11:08:05.348211 rx_lastpass[0][1][15] = 0
5095 11:08:05.348606 rx_firspass[1][0][0] = 0
5096 11:08:05.352317 rx_lastpass[1][0][0] = 0
5097 11:08:05.355378 rx_firspass[1][0][1] = 0
5098 11:08:05.355857 rx_lastpass[1][0][1] = 0
5099 11:08:05.358185 rx_firspass[1][0][2] = 0
5100 11:08:05.361681 rx_lastpass[1][0][2] = 0
5101 11:08:05.362107 rx_firspass[1][0][3] = 0
5102 11:08:05.365495 rx_lastpass[1][0][3] = 0
5103 11:08:05.368340 rx_firspass[1][0][4] = 0
5104 11:08:05.371567 rx_lastpass[1][0][4] = 0
5105 11:08:05.372029 rx_firspass[1][0][5] = 0
5106 11:08:05.374720 rx_lastpass[1][0][5] = 0
5107 11:08:05.378761 rx_firspass[1][0][6] = 0
5108 11:08:05.379158 rx_lastpass[1][0][6] = 0
5109 11:08:05.381371 rx_firspass[1][0][7] = 0
5110 11:08:05.385680 rx_lastpass[1][0][7] = 0
5111 11:08:05.386323 rx_firspass[1][0][8] = 0
5112 11:08:05.388373 rx_lastpass[1][0][8] = 0
5113 11:08:05.391560 rx_firspass[1][0][9] = 0
5114 11:08:05.392027 rx_lastpass[1][0][9] = 0
5115 11:08:05.394961 rx_firspass[1][0][10] = 0
5116 11:08:05.398146 rx_lastpass[1][0][10] = 0
5117 11:08:05.401989 rx_firspass[1][0][11] = 0
5118 11:08:05.402375 rx_lastpass[1][0][11] = 0
5119 11:08:05.405473 rx_firspass[1][0][12] = 0
5120 11:08:05.407965 rx_lastpass[1][0][12] = 0
5121 11:08:05.408352 rx_firspass[1][0][13] = 0
5122 11:08:05.411126 rx_lastpass[1][0][13] = 0
5123 11:08:05.414659 rx_firspass[1][0][14] = 0
5124 11:08:05.418066 rx_lastpass[1][0][14] = 0
5125 11:08:05.418454 rx_firspass[1][0][15] = 0
5126 11:08:05.421667 rx_lastpass[1][0][15] = 0
5127 11:08:05.424751 rx_firspass[1][1][0] = 0
5128 11:08:05.425172 rx_lastpass[1][1][0] = 0
5129 11:08:05.428164 rx_firspass[1][1][1] = 0
5130 11:08:05.431373 rx_lastpass[1][1][1] = 0
5131 11:08:05.431822 rx_firspass[1][1][2] = 0
5132 11:08:05.434930 rx_lastpass[1][1][2] = 0
5133 11:08:05.437659 rx_firspass[1][1][3] = 0
5134 11:08:05.438045 rx_lastpass[1][1][3] = 0
5135 11:08:05.441425 rx_firspass[1][1][4] = 0
5136 11:08:05.444802 rx_lastpass[1][1][4] = 0
5137 11:08:05.447696 rx_firspass[1][1][5] = 0
5138 11:08:05.448078 rx_lastpass[1][1][5] = 0
5139 11:08:05.451201 rx_firspass[1][1][6] = 0
5140 11:08:05.454507 rx_lastpass[1][1][6] = 0
5141 11:08:05.454976 rx_firspass[1][1][7] = 0
5142 11:08:05.457746 rx_lastpass[1][1][7] = 0
5143 11:08:05.461674 rx_firspass[1][1][8] = 0
5144 11:08:05.462106 rx_lastpass[1][1][8] = 0
5145 11:08:05.464647 rx_firspass[1][1][9] = 0
5146 11:08:05.467762 rx_lastpass[1][1][9] = 0
5147 11:08:05.468207 rx_firspass[1][1][10] = 0
5148 11:08:05.471646 rx_lastpass[1][1][10] = 0
5149 11:08:05.474304 rx_firspass[1][1][11] = 0
5150 11:08:05.477623 rx_lastpass[1][1][11] = 0
5151 11:08:05.478008 rx_firspass[1][1][12] = 0
5152 11:08:05.481176 rx_lastpass[1][1][12] = 0
5153 11:08:05.484862 rx_firspass[1][1][13] = 0
5154 11:08:05.485258 rx_lastpass[1][1][13] = 0
5155 11:08:05.487694 rx_firspass[1][1][14] = 0
5156 11:08:05.491672 rx_lastpass[1][1][14] = 0
5157 11:08:05.494634 rx_firspass[1][1][15] = 0
5158 11:08:05.495034 rx_lastpass[1][1][15] = 0
5159 11:08:05.497874 dump params clk_delay
5160 11:08:05.498260 clk_delay[0] = 0
5161 11:08:05.500942 clk_delay[1] = 0
5162 11:08:05.501633 dump params dqs_delay
5163 11:08:05.504426 dqs_delay[0][0] = 0
5164 11:08:05.508196 dqs_delay[0][1] = 0
5165 11:08:05.508581 dqs_delay[1][0] = 0
5166 11:08:05.510897 dqs_delay[1][1] = 0
5167 11:08:05.514725 dump params delay_cell_unit = 833
5168 11:08:05.515494 mt_set_emi_preloader end
5169 11:08:05.520574 [mt_mem_init] dram size: 0x100000000, rank number: 2
5170 11:08:05.524078 [complex_mem_test] start addr:0x40000000, len:20480
5171 11:08:05.560838 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5172 11:08:05.567210 [complex_mem_test] start addr:0x80000000, len:20480
5173 11:08:05.603305 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5174 11:08:05.610164 [complex_mem_test] start addr:0xc0000000, len:20480
5175 11:08:05.645634 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5176 11:08:05.652233 [complex_mem_test] start addr:0x56000000, len:8192
5177 11:08:05.668698 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5178 11:08:05.669089 ddr_geometry:1
5179 11:08:05.675478 [complex_mem_test] start addr:0x80000000, len:8192
5180 11:08:05.692507 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5181 11:08:05.696576 dram_init: dram init end (result: 0)
5182 11:08:05.702533 Successfully loaded DRAM blobs and ran DRAM calibration
5183 11:08:05.712996 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5184 11:08:05.713483 CBMEM:
5185 11:08:05.716120 IMD: root @ 00000000fffff000 254 entries.
5186 11:08:05.719204 IMD: root @ 00000000ffffec00 62 entries.
5187 11:08:05.726194 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5188 11:08:05.732361 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5189 11:08:05.735946 in-header: 03 a1 00 00 08 00 00 00
5190 11:08:05.739129 in-data: 84 60 60 10 00 00 00 00
5191 11:08:05.742319 Chrome EC: clear events_b mask to 0x0000000020004000
5192 11:08:05.749732 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5193 11:08:05.753085 in-header: 03 fd 00 00 00 00 00 00
5194 11:08:05.753517 in-data:
5195 11:08:05.759896 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5196 11:08:05.760289 CBFS @ 21000 size 3d4000
5197 11:08:05.766227 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5198 11:08:05.769836 CBFS: Locating 'fallback/ramstage'
5199 11:08:05.773268 CBFS: Found @ offset 10d40 size d563
5200 11:08:05.794456 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5201 11:08:05.806791 Accumulated console time in romstage 13662 ms
5202 11:08:05.807176
5203 11:08:05.807477
5204 11:08:05.817176 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5205 11:08:05.819656 ARM64: Exception handlers installed.
5206 11:08:05.820045 ARM64: Testing exception
5207 11:08:05.823029 ARM64: Done test exception
5208 11:08:05.826552 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5209 11:08:05.829762 Manufacturer: ef
5210 11:08:05.833251 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5211 11:08:05.840448 WARNING: RO_VPD is uninitialized or empty.
5212 11:08:05.843252 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5213 11:08:05.846455 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5214 11:08:05.856229 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5215 11:08:05.859781 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5216 11:08:05.866171 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5217 11:08:05.866563 Enumerating buses...
5218 11:08:05.872851 Show all devs... Before device enumeration.
5219 11:08:05.873294 Root Device: enabled 1
5220 11:08:05.876119 CPU_CLUSTER: 0: enabled 1
5221 11:08:05.876505 CPU: 00: enabled 1
5222 11:08:05.879525 Compare with tree...
5223 11:08:05.882644 Root Device: enabled 1
5224 11:08:05.883030 CPU_CLUSTER: 0: enabled 1
5225 11:08:05.886252 CPU: 00: enabled 1
5226 11:08:05.889249 Root Device scanning...
5227 11:08:05.889637 root_dev_scan_bus for Root Device
5228 11:08:05.892917 CPU_CLUSTER: 0 enabled
5229 11:08:05.896274 root_dev_scan_bus for Root Device done
5230 11:08:05.902842 scan_bus: scanning of bus Root Device took 10689 usecs
5231 11:08:05.903247 done
5232 11:08:05.905755 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5233 11:08:05.909389 Allocating resources...
5234 11:08:05.909772 Reading resources...
5235 11:08:05.915881 Root Device read_resources bus 0 link: 0
5236 11:08:05.919039 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5237 11:08:05.922783 CPU: 00 missing read_resources
5238 11:08:05.926006 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5239 11:08:05.929294 Root Device read_resources bus 0 link: 0 done
5240 11:08:05.932671 Done reading resources.
5241 11:08:05.935887 Show resources in subtree (Root Device)...After reading.
5242 11:08:05.939797 Root Device child on link 0 CPU_CLUSTER: 0
5243 11:08:05.942336 CPU_CLUSTER: 0 child on link 0 CPU: 00
5244 11:08:05.952512 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5245 11:08:05.952904 CPU: 00
5246 11:08:05.956146 Setting resources...
5247 11:08:05.959283 Root Device assign_resources, bus 0 link: 0
5248 11:08:05.962543 CPU_CLUSTER: 0 missing set_resources
5249 11:08:05.965709 Root Device assign_resources, bus 0 link: 0
5250 11:08:05.969429 Done setting resources.
5251 11:08:05.975828 Show resources in subtree (Root Device)...After assigning values.
5252 11:08:05.978998 Root Device child on link 0 CPU_CLUSTER: 0
5253 11:08:05.982615 CPU_CLUSTER: 0 child on link 0 CPU: 00
5254 11:08:05.992871 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5255 11:08:05.993302 CPU: 00
5256 11:08:05.996164 Done allocating resources.
5257 11:08:05.998946 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5258 11:08:06.002813 Enabling resources...
5259 11:08:06.003199 done.
5260 11:08:06.005842 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5261 11:08:06.008758 Initializing devices...
5262 11:08:06.009179 Root Device init ...
5263 11:08:06.012280 mainboard_init: Starting display init.
5264 11:08:06.015258 ADC[4]: Raw value=75944 ID=0
5265 11:08:06.039830 anx7625_power_on_init: Init interface.
5266 11:08:06.043155 anx7625_disable_pd_protocol: Disabled PD feature.
5267 11:08:06.049529 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5268 11:08:06.106473 anx7625_start_dp_work: Secure OCM version=00
5269 11:08:06.109261 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5270 11:08:06.126447 sp_tx_get_edid_block: EDID Block = 1
5271 11:08:06.243804 Extracted contents:
5272 11:08:06.247196 header: 00 ff ff ff ff ff ff 00
5273 11:08:06.250280 serial number: 06 af 5c 14 00 00 00 00 00 1a
5274 11:08:06.253712 version: 01 04
5275 11:08:06.256946 basic params: 95 1a 0e 78 02
5276 11:08:06.260378 chroma info: 99 85 95 55 56 92 28 22 50 54
5277 11:08:06.263756 established: 00 00 00
5278 11:08:06.270012 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5279 11:08:06.273563 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5280 11:08:06.280167 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5281 11:08:06.286903 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5282 11:08:06.293103 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5283 11:08:06.296652 extensions: 00
5284 11:08:06.297048 checksum: ae
5285 11:08:06.297378
5286 11:08:06.300310 Manufacturer: AUO Model 145c Serial Number 0
5287 11:08:06.303387 Made week 0 of 2016
5288 11:08:06.303773 EDID version: 1.4
5289 11:08:06.306396 Digital display
5290 11:08:06.310076 6 bits per primary color channel
5291 11:08:06.310466 DisplayPort interface
5292 11:08:06.313574 Maximum image size: 26 cm x 14 cm
5293 11:08:06.316632 Gamma: 220%
5294 11:08:06.317017 Check DPMS levels
5295 11:08:06.320011 Supported color formats: RGB 4:4:4
5296 11:08:06.323321 First detailed timing is preferred timing
5297 11:08:06.326393 Established timings supported:
5298 11:08:06.329705 Standard timings supported:
5299 11:08:06.330118 Detailed timings
5300 11:08:06.336485 Hex of detail: ce1d56ea50001a3030204600009010000018
5301 11:08:06.339737 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5302 11:08:06.343076 0556 0586 05a6 0640 hborder 0
5303 11:08:06.350115 0300 0304 030a 031a vborder 0
5304 11:08:06.350190 -hsync -vsync
5305 11:08:06.352744 Did detailed timing
5306 11:08:06.356100 Hex of detail: 0000000f0000000000000000000000000020
5307 11:08:06.359271 Manufacturer-specified data, tag 15
5308 11:08:06.365983 Hex of detail: 000000fe0041554f0a202020202020202020
5309 11:08:06.366058 ASCII string: AUO
5310 11:08:06.369438 Hex of detail: 000000fe004231313658414230312e34200a
5311 11:08:06.373020 ASCII string: B116XAB01.4
5312 11:08:06.373094 Checksum
5313 11:08:06.376233 Checksum: 0xae (valid)
5314 11:08:06.382787 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5315 11:08:06.382862 DSI data_rate: 457800000 bps
5316 11:08:06.390465 anx7625_parse_edid: set default k value to 0x3d for panel
5317 11:08:06.393943 anx7625_parse_edid: pixelclock(76300).
5318 11:08:06.396901 hactive(1366), hsync(32), hfp(48), hbp(154)
5319 11:08:06.400241 vactive(768), vsync(6), vfp(4), vbp(16)
5320 11:08:06.403737 anx7625_dsi_config: config dsi.
5321 11:08:06.411568 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5322 11:08:06.432877 anx7625_dsi_config: success to config DSI
5323 11:08:06.435779 anx7625_dp_start: MIPI phy setup OK.
5324 11:08:06.439038 [SSUSB] Setting up USB HOST controller...
5325 11:08:06.442576 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5326 11:08:06.446306 [SSUSB] phy power-on done.
5327 11:08:06.449691 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5328 11:08:06.453355 in-header: 03 fc 01 00 00 00 00 00
5329 11:08:06.453419 in-data:
5330 11:08:06.459610 handle_proto3_response: EC response with error code: 1
5331 11:08:06.459678 SPM: pcm index = 1
5332 11:08:06.462965 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5333 11:08:06.466453 CBFS @ 21000 size 3d4000
5334 11:08:06.473088 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5335 11:08:06.476425 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5336 11:08:06.479921 CBFS: Found @ offset 1e7c0 size 1026
5337 11:08:06.486120 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5338 11:08:06.489803 SPM: binary array size = 2988
5339 11:08:06.492787 SPM: version = pcm_allinone_v1.17.2_20180829
5340 11:08:06.496435 SPM binary loaded in 32 msecs
5341 11:08:06.503419 spm_kick_im_to_fetch: ptr = 000000004021eec2
5342 11:08:06.507298 spm_kick_im_to_fetch: len = 2988
5343 11:08:06.507363 SPM: spm_kick_pcm_to_run
5344 11:08:06.510340 SPM: spm_kick_pcm_to_run done
5345 11:08:06.513807 SPM: spm_init done in 52 msecs
5346 11:08:06.517418 Root Device init finished in 505263 usecs
5347 11:08:06.520181 CPU_CLUSTER: 0 init ...
5348 11:08:06.530230 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5349 11:08:06.533479 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5350 11:08:06.536875 CBFS @ 21000 size 3d4000
5351 11:08:06.540286 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5352 11:08:06.543805 CBFS: Locating 'sspm.bin'
5353 11:08:06.546861 CBFS: Found @ offset 208c0 size 41cb
5354 11:08:06.557390 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5355 11:08:06.565105 CPU_CLUSTER: 0 init finished in 42801 usecs
5356 11:08:06.565222 Devices initialized
5357 11:08:06.567999 Show all devs... After init.
5358 11:08:06.571761 Root Device: enabled 1
5359 11:08:06.571873 CPU_CLUSTER: 0: enabled 1
5360 11:08:06.575649 CPU: 00: enabled 1
5361 11:08:06.577942 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5362 11:08:06.581542 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5363 11:08:06.584688 ELOG: NV offset 0x558000 size 0x1000
5364 11:08:06.592423 read SPI 0x558000 0x1000: 1263 us, 3243 KB/s, 25.944 Mbps
5365 11:08:06.599298 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5366 11:08:06.603140 ELOG: Event(17) added with size 13 at 2024-07-10 11:08:06 UTC
5367 11:08:06.609196 out: cmd=0x121: 03 db 21 01 00 00 00 00
5368 11:08:06.612643 in-header: 03 48 00 00 2c 00 00 00
5369 11:08:06.622578 in-data: 3c 4d 00 00 00 00 00 00 02 10 00 00 06 80 00 00 64 d9 01 00 06 80 00 00 5b de 5f 00 06 80 00 00 ab 75 01 00 06 80 00 00 e5 f8 02 00
5370 11:08:06.625812 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5371 11:08:06.629493 in-header: 03 19 00 00 08 00 00 00
5372 11:08:06.632461 in-data: a2 e0 47 00 13 00 00 00
5373 11:08:06.636028 Chrome EC: UHEPI supported
5374 11:08:06.642978 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5375 11:08:06.646311 in-header: 03 e1 00 00 08 00 00 00
5376 11:08:06.649253 in-data: 84 20 60 10 00 00 00 00
5377 11:08:06.652616 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5378 11:08:06.659007 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5379 11:08:06.662191 in-header: 03 e1 00 00 08 00 00 00
5380 11:08:06.665704 in-data: 84 20 60 10 00 00 00 00
5381 11:08:06.672212 ELOG: Event(A1) added with size 10 at 2024-07-10 11:08:06 UTC
5382 11:08:06.679022 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5383 11:08:06.682542 ELOG: Event(A0) added with size 9 at 2024-07-10 11:08:06 UTC
5384 11:08:06.688907 elog_add_boot_reason: Logged dev mode boot
5385 11:08:06.689438 Finalize devices...
5386 11:08:06.692306 Devices finalized
5387 11:08:06.695595 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5388 11:08:06.702081 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5389 11:08:06.705827 ELOG: Event(91) added with size 10 at 2024-07-10 11:08:06 UTC
5390 11:08:06.708868 Writing coreboot table at 0xffeda000
5391 11:08:06.712672 0. 0000000000114000-000000000011efff: RAMSTAGE
5392 11:08:06.718777 1. 0000000040000000-000000004023cfff: RAMSTAGE
5393 11:08:06.722051 2. 000000004023d000-00000000545fffff: RAM
5394 11:08:06.725666 3. 0000000054600000-000000005465ffff: BL31
5395 11:08:06.728900 4. 0000000054660000-00000000ffed9fff: RAM
5396 11:08:06.735638 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5397 11:08:06.739013 6. 0000000100000000-000000013fffffff: RAM
5398 11:08:06.742277 Passing 5 GPIOs to payload:
5399 11:08:06.745838 NAME | PORT | POLARITY | VALUE
5400 11:08:06.748852 write protect | 0x00000096 | low | high
5401 11:08:06.755648 EC in RW | 0x000000b1 | high | undefined
5402 11:08:06.759315 EC interrupt | 0x00000097 | low | undefined
5403 11:08:06.765752 TPM interrupt | 0x00000099 | high | undefined
5404 11:08:06.768801 speaker enable | 0x000000af | high | undefined
5405 11:08:06.772382 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5406 11:08:06.775734 in-header: 03 f7 00 00 02 00 00 00
5407 11:08:06.778599 in-data: 04 00
5408 11:08:06.779030 Board ID: 4
5409 11:08:06.782146 ADC[3]: Raw value=216068 ID=1
5410 11:08:06.782549 RAM code: 1
5411 11:08:06.782846 SKU ID: 16
5412 11:08:06.788869 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5413 11:08:06.789325 CBFS @ 21000 size 3d4000
5414 11:08:06.795395 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5415 11:08:06.801863 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 29b8
5416 11:08:06.802262 coreboot table: 940 bytes.
5417 11:08:06.808659 IMD ROOT 0. 00000000fffff000 00001000
5418 11:08:06.811713 IMD SMALL 1. 00000000ffffe000 00001000
5419 11:08:06.815279 CONSOLE 2. 00000000fffde000 00020000
5420 11:08:06.818549 FMAP 3. 00000000fffdd000 0000047c
5421 11:08:06.822054 TIME STAMP 4. 00000000fffdc000 00000910
5422 11:08:06.825153 RAMOOPS 5. 00000000ffedc000 00100000
5423 11:08:06.829242 COREBOOT 6. 00000000ffeda000 00002000
5424 11:08:06.832424 IMD small region:
5425 11:08:06.835442 IMD ROOT 0. 00000000ffffec00 00000400
5426 11:08:06.838571 VBOOT WORK 1. 00000000ffffeb00 00000100
5427 11:08:06.841786 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5428 11:08:06.845261 VPD 3. 00000000ffffea60 0000006c
5429 11:08:06.851492 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5430 11:08:06.858271 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5431 11:08:06.862077 in-header: 03 e1 00 00 08 00 00 00
5432 11:08:06.865188 in-data: 84 20 60 10 00 00 00 00
5433 11:08:06.868491 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5434 11:08:06.871498 CBFS @ 21000 size 3d4000
5435 11:08:06.874957 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5436 11:08:06.877855 CBFS: Locating 'fallback/payload'
5437 11:08:06.887115 CBFS: Found @ offset dc040 size 439a0
5438 11:08:06.974526 read SPI 0xfd078 0x439a0: 84380 us, 3281 KB/s, 26.248 Mbps
5439 11:08:06.977882 Checking segment from ROM address 0x0000000040003a00
5440 11:08:06.984682 Checking segment from ROM address 0x0000000040003a1c
5441 11:08:06.988253 Loading segment from ROM address 0x0000000040003a00
5442 11:08:06.991325 code (compression=0)
5443 11:08:07.001291 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5444 11:08:07.007857 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5445 11:08:07.011987 it's not compressed!
5446 11:08:07.014549 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5447 11:08:07.020844 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5448 11:08:07.029141 Loading segment from ROM address 0x0000000040003a1c
5449 11:08:07.032223 Entry Point 0x0000000080000000
5450 11:08:07.032679 Loaded segments
5451 11:08:07.038816 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5452 11:08:07.042407 Jumping to boot code at 0000000080000000(00000000ffeda000)
5453 11:08:07.052113 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5454 11:08:07.055892 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5455 11:08:07.058858 CBFS @ 21000 size 3d4000
5456 11:08:07.065458 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5457 11:08:07.069264 CBFS: Locating 'fallback/bl31'
5458 11:08:07.071906 CBFS: Found @ offset 36dc0 size 5820
5459 11:08:07.083054 read SPI 0x57de8 0x5820: 6881 us, 3278 KB/s, 26.224 Mbps
5460 11:08:07.086098 Checking segment from ROM address 0x0000000040003a00
5461 11:08:07.093108 Checking segment from ROM address 0x0000000040003a1c
5462 11:08:07.096047 Loading segment from ROM address 0x0000000040003a00
5463 11:08:07.099233 code (compression=1)
5464 11:08:07.106120 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5465 11:08:07.115817 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5466 11:08:07.115892 using LZMA
5467 11:08:07.124899 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5468 11:08:07.131631 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5469 11:08:07.134920 Loading segment from ROM address 0x0000000040003a1c
5470 11:08:07.138103 Entry Point 0x0000000054601000
5471 11:08:07.138189 Loaded segments
5472 11:08:07.140963 NOTICE: MT8183 bl31_setup
5473 11:08:07.148295 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5474 11:08:07.151766 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5475 11:08:07.154905 INFO: [DEVAPC] dump DEVAPC registers:
5476 11:08:07.164976 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5477 11:08:07.171490 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5478 11:08:07.181234 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5479 11:08:07.188142 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5480 11:08:07.198213 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5481 11:08:07.204359 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5482 11:08:07.214994 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5483 11:08:07.222071 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5484 11:08:07.231164 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5485 11:08:07.237809 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5486 11:08:07.244699 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5487 11:08:07.254680 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5488 11:08:07.261038 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5489 11:08:07.271370 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5490 11:08:07.277697 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5491 11:08:07.284333 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5492 11:08:07.291051 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5493 11:08:07.297617 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5494 11:08:07.307386 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5495 11:08:07.314288 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5496 11:08:07.320762 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5497 11:08:07.327660 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5498 11:08:07.331243 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5499 11:08:07.334299 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5500 11:08:07.337434 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5501 11:08:07.340801 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5502 11:08:07.344022 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5503 11:08:07.350418 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5504 11:08:07.357428 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5505 11:08:07.357819 WARNING: region 0:
5506 11:08:07.360246 WARNING: apc:0x168, sa:0x0, ea:0xfff
5507 11:08:07.363916 WARNING: region 1:
5508 11:08:07.367095 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5509 11:08:07.367481 WARNING: region 2:
5510 11:08:07.374203 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5511 11:08:07.374612 WARNING: region 3:
5512 11:08:07.377326 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5513 11:08:07.380375 WARNING: region 4:
5514 11:08:07.383940 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5515 11:08:07.384339 WARNING: region 5:
5516 11:08:07.386978 WARNING: apc:0x0, sa:0x0, ea:0x0
5517 11:08:07.391054 WARNING: region 6:
5518 11:08:07.394148 WARNING: apc:0x0, sa:0x0, ea:0x0
5519 11:08:07.394533 WARNING: region 7:
5520 11:08:07.398086 WARNING: apc:0x0, sa:0x0, ea:0x0
5521 11:08:07.403805 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5522 11:08:07.407278 INFO: SPM: enable SPMC mode
5523 11:08:07.410913 NOTICE: spm_boot_init() start
5524 11:08:07.413757 NOTICE: spm_boot_init() end
5525 11:08:07.417175 INFO: BL31: Initializing runtime services
5526 11:08:07.423661 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5527 11:08:07.426945 INFO: BL31: Preparing for EL3 exit to normal world
5528 11:08:07.430226 INFO: Entry point address = 0x80000000
5529 11:08:07.433765 INFO: SPSR = 0x8
5530 11:08:07.455187
5531 11:08:07.455635
5532 11:08:07.455929
5533 11:08:07.457424 end: 2.2.3 depthcharge-start (duration 00:00:24) [common]
5534 11:08:07.457889 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5535 11:08:07.458248 Setting prompt string to ['jacuzzi:']
5536 11:08:07.458569 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5537 11:08:07.459147 Starting depthcharge on Juniper...
5538 11:08:07.459453
5539 11:08:07.461773 vboot_handoff: creating legacy vboot_handoff structure
5540 11:08:07.462161
5541 11:08:07.465784 ec_init(0): CrosEC protocol v3 supported (544, 544)
5542 11:08:07.466170
5543 11:08:07.468226 Wipe memory regions:
5544 11:08:07.468614
5545 11:08:07.471626 [0x00000040000000, 0x00000054600000)
5546 11:08:07.514909
5547 11:08:07.515297 [0x00000054660000, 0x00000080000000)
5548 11:08:07.606249
5549 11:08:07.606671 [0x000000811994a0, 0x000000ffeda000)
5550 11:08:07.866931
5551 11:08:07.867388 [0x00000100000000, 0x00000140000000)
5552 11:08:07.999999
5553 11:08:08.003065 Initializing XHCI USB controller at 0x11200000.
5554 11:08:08.025724
5555 11:08:08.028891 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5556 11:08:08.029309
5557 11:08:08.029610
5558 11:08:08.030239 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5559 11:08:08.030586 Sending line: 'tftpboot 192.168.201.1 14786808/tftp-deploy-08hh4jwk/kernel/image.itb 14786808/tftp-deploy-08hh4jwk/kernel/cmdline '
5561 11:08:08.131970 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5562 11:08:08.132356 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5563 11:08:08.137097 jacuzzi: tftpboot 192.168.201.1 14786808/tftp-deploy-08hh4jwk/kernel/image.itp-deploy-08hh4jwk/kernel/cmdline
5564 11:08:08.137553
5565 11:08:08.137855 Waiting for link
5566 11:08:08.686269
5567 11:08:08.686705 R8152: Initializing
5568 11:08:08.687098
5569 11:08:08.689238 Version 9 (ocp_data = 6010)
5570 11:08:08.689672
5571 11:08:08.692934 R8152: Done initializing
5572 11:08:08.693366
5573 11:08:08.693664 Adding net device
5574 11:08:08.872176
5575 11:08:08.872628 R8152: Initializing
5576 11:08:08.872926
5577 11:08:08.875225 Version 9 (ocp_data = 6010)
5578 11:08:08.875605
5579 11:08:08.878156 R8152: Done initializing
5580 11:08:08.878560
5581 11:08:08.882254 net_add_device: Attemp to include the same device
5582 11:08:09.268148
5583 11:08:09.268602 done.
5584 11:08:09.268902
5585 11:08:09.269230 MAC: 00:e0:4c:72:3d:67
5586 11:08:09.269507
5587 11:08:09.271386 Sending DHCP discover... done.
5588 11:08:09.271785
5589 11:08:09.274785 Waiting for reply... done.
5590 11:08:09.275166
5591 11:08:09.278134 Sending DHCP request... done.
5592 11:08:09.278364
5593 11:08:09.283221 Waiting for reply... done.
5594 11:08:09.283387
5595 11:08:09.283514 My ip is 192.168.201.13
5596 11:08:09.283632
5597 11:08:09.285841 The DHCP server ip is 192.168.201.1
5598 11:08:09.286035
5599 11:08:09.292934 TFTP server IP predefined by user: 192.168.201.1
5600 11:08:09.293329
5601 11:08:09.300031 Bootfile predefined by user: 14786808/tftp-deploy-08hh4jwk/kernel/image.itb
5602 11:08:09.300413
5603 11:08:09.300707 Sending tftp read request... done.
5604 11:08:09.302861
5605 11:08:09.309856 Waiting for the transfer...
5606 11:08:09.310234
5607 11:08:09.613079 00000000 ################################################################
5608 11:08:09.613208
5609 11:08:09.900428 00080000 ################################################################
5610 11:08:09.900574
5611 11:08:10.175500 00100000 ################################################################
5612 11:08:10.175619
5613 11:08:10.446590 00180000 ################################################################
5614 11:08:10.446716
5615 11:08:10.727709 00200000 ################################################################
5616 11:08:10.727847
5617 11:08:10.981430 00280000 ################################################################
5618 11:08:10.981554
5619 11:08:11.241408 00300000 ################################################################
5620 11:08:11.241527
5621 11:08:11.511600 00380000 ################################################################
5622 11:08:11.511752
5623 11:08:11.776802 00400000 ################################################################
5624 11:08:11.776954
5625 11:08:12.040407 00480000 ################################################################
5626 11:08:12.040533
5627 11:08:12.325428 00500000 ################################################################
5628 11:08:12.325545
5629 11:08:12.612853 00580000 ################################################################
5630 11:08:12.612975
5631 11:08:12.880074 00600000 ################################################################
5632 11:08:12.880228
5633 11:08:13.134389 00680000 ################################################################
5634 11:08:13.134509
5635 11:08:13.414384 00700000 ################################################################
5636 11:08:13.414498
5637 11:08:13.706843 00780000 ################################################################
5638 11:08:13.706968
5639 11:08:13.982626 00800000 ################################################################
5640 11:08:13.982746
5641 11:08:14.268733 00880000 ################################################################
5642 11:08:14.268855
5643 11:08:14.561688 00900000 ################################################################
5644 11:08:14.561806
5645 11:08:14.852860 00980000 ################################################################
5646 11:08:14.852979
5647 11:08:15.137402 00a00000 ################################################################
5648 11:08:15.137528
5649 11:08:15.409347 00a80000 ################################################################
5650 11:08:15.409472
5651 11:08:15.663524 00b00000 ################################################################
5652 11:08:15.663665
5653 11:08:15.917361 00b80000 ################################################################
5654 11:08:15.917480
5655 11:08:16.211615 00c00000 ################################################################
5656 11:08:16.211741
5657 11:08:16.486022 00c80000 ################################################################
5658 11:08:16.486150
5659 11:08:16.761817 00d00000 ################################################################
5660 11:08:16.761939
5661 11:08:17.051513 00d80000 ################################################################
5662 11:08:17.051646
5663 11:08:17.343564 00e00000 ################################################################
5664 11:08:17.343716
5665 11:08:17.603743 00e80000 ################################################################
5666 11:08:17.603876
5667 11:08:17.877087 00f00000 ################################################################
5668 11:08:17.877220
5669 11:08:18.169312 00f80000 ################################################################
5670 11:08:18.169421
5671 11:08:18.456822 01000000 ################################################################
5672 11:08:18.456940
5673 11:08:18.723397 01080000 ################################################################
5674 11:08:18.723533
5675 11:08:19.008861 01100000 ################################################################
5676 11:08:19.008988
5677 11:08:19.281204 01180000 ################################################################
5678 11:08:19.281339
5679 11:08:19.560554 01200000 ################################################################
5680 11:08:19.560674
5681 11:08:19.843394 01280000 ################################################################
5682 11:08:19.843508
5683 11:08:20.109583 01300000 ################################################################
5684 11:08:20.109727
5685 11:08:20.384900 01380000 ################################################################
5686 11:08:20.385035
5687 11:08:20.665369 01400000 ################################################################
5688 11:08:20.665491
5689 11:08:20.935567 01480000 ################################################################
5690 11:08:20.935683
5691 11:08:21.202309 01500000 ################################################################
5692 11:08:21.202428
5693 11:08:21.477111 01580000 ################################################################
5694 11:08:21.477248
5695 11:08:21.749712 01600000 ################################################################
5696 11:08:21.749833
5697 11:08:22.004041 01680000 ################################################################
5698 11:08:22.004148
5699 11:08:22.272769 01700000 ################################################################
5700 11:08:22.272914
5701 11:08:22.536277 01780000 ################################################################
5702 11:08:22.536391
5703 11:08:22.805915 01800000 ################################################################
5704 11:08:22.806041
5705 11:08:23.062245 01880000 ################################################################
5706 11:08:23.062361
5707 11:08:23.356889 01900000 ################################################################
5708 11:08:23.357023
5709 11:08:23.637576 01980000 ################################################################
5710 11:08:23.637686
5711 11:08:23.900203 01a00000 ################################################################
5712 11:08:23.900332
5713 11:08:24.172754 01a80000 ################################################################
5714 11:08:24.172886
5715 11:08:24.443022 01b00000 ################################################################
5716 11:08:24.443152
5717 11:08:24.727328 01b80000 ################################################################
5718 11:08:24.727438
5719 11:08:24.991588 01c00000 ################################################################
5720 11:08:24.991743
5721 11:08:25.278392 01c80000 ################################################################
5722 11:08:25.278507
5723 11:08:25.563118 01d00000 ################################################################
5724 11:08:25.563247
5725 11:08:25.832848 01d80000 ################################################################
5726 11:08:25.832961
5727 11:08:26.104882 01e00000 ################################################################
5728 11:08:26.105033
5729 11:08:26.367183 01e80000 ################################################################
5730 11:08:26.367295
5731 11:08:26.633305 01f00000 ################################################################
5732 11:08:26.633432
5733 11:08:26.913717 01f80000 ################################################################
5734 11:08:26.913825
5735 11:08:27.186678 02000000 ################################################################
5736 11:08:27.186798
5737 11:08:27.464862 02080000 ################################################################
5738 11:08:27.464975
5739 11:08:27.737634 02100000 ################################################################
5740 11:08:27.737756
5741 11:08:28.004714 02180000 ################################################################
5742 11:08:28.004824
5743 11:08:28.275215 02200000 ################################################################
5744 11:08:28.275333
5745 11:08:28.534887 02280000 ################################################################
5746 11:08:28.535034
5747 11:08:28.810646 02300000 ################################################################
5748 11:08:28.810769
5749 11:08:29.102156 02380000 ################################################################
5750 11:08:29.102283
5751 11:08:29.393472 02400000 ################################################################
5752 11:08:29.393596
5753 11:08:29.677086 02480000 ################################################################
5754 11:08:29.677401
5755 11:08:29.965930 02500000 ################################################################
5756 11:08:29.966055
5757 11:08:30.261595 02580000 ################################################################
5758 11:08:30.261705
5759 11:08:30.556755 02600000 ################################################################
5760 11:08:30.556872
5761 11:08:30.819491 02680000 ################################################################
5762 11:08:30.819627
5763 11:08:31.079680 02700000 ################################################################
5764 11:08:31.079800
5765 11:08:31.335738 02780000 ################################################################
5766 11:08:31.335878
5767 11:08:31.596736 02800000 ################################################################
5768 11:08:31.596874
5769 11:08:31.868958 02880000 ################################################################
5770 11:08:31.869105
5771 11:08:32.149895 02900000 ################################################################
5772 11:08:32.150021
5773 11:08:32.429549 02980000 ################################################################
5774 11:08:32.429715
5775 11:08:32.683569 02a00000 ################################################################
5776 11:08:32.683712
5777 11:08:32.945072 02a80000 ################################################################
5778 11:08:32.945252
5779 11:08:33.199298 02b00000 ################################################################
5780 11:08:33.199436
5781 11:08:33.456899 02b80000 ################################################################
5782 11:08:33.457046
5783 11:08:33.737426 02c00000 ################################################################
5784 11:08:33.737545
5785 11:08:34.028221 02c80000 ################################################################
5786 11:08:34.028343
5787 11:08:34.323367 02d00000 ################################################################
5788 11:08:34.323492
5789 11:08:34.605309 02d80000 ################################################################
5790 11:08:34.605434
5791 11:08:34.871717 02e00000 ################################################################
5792 11:08:34.871842
5793 11:08:35.151438 02e80000 ################################################################
5794 11:08:35.151556
5795 11:08:35.407878 02f00000 ################################################################
5796 11:08:35.407995
5797 11:08:35.678762 02f80000 ################################################################
5798 11:08:35.678908
5799 11:08:35.962777 03000000 ################################################################
5800 11:08:35.962924
5801 11:08:36.252700 03080000 ################################################################
5802 11:08:36.252844
5803 11:08:36.532841 03100000 ################################################################
5804 11:08:36.532982
5805 11:08:36.801184 03180000 ################################################################
5806 11:08:36.801342
5807 11:08:37.085888 03200000 ################################################################
5808 11:08:37.086036
5809 11:08:37.358618 03280000 ################################################################
5810 11:08:37.358742
5811 11:08:37.650627 03300000 ################################################################
5812 11:08:37.650753
5813 11:08:37.944272 03380000 ################################################################
5814 11:08:37.944392
5815 11:08:38.236708 03400000 ################################################################
5816 11:08:38.236833
5817 11:08:38.509946 03480000 ################################################################
5818 11:08:38.510062
5819 11:08:38.796177 03500000 ################################################################
5820 11:08:38.796329
5821 11:08:39.054488 03580000 ################################################################
5822 11:08:39.054607
5823 11:08:39.309405 03600000 ################################################################
5824 11:08:39.309527
5825 11:08:39.567471 03680000 ################################################################
5826 11:08:39.567583
5827 11:08:39.846188 03700000 ################################################################
5828 11:08:39.846311
5829 11:08:40.119968 03780000 ################################################################
5830 11:08:40.120082
5831 11:08:40.405735 03800000 ################################################################
5832 11:08:40.405861
5833 11:08:40.691558 03880000 ################################################################
5834 11:08:40.691672
5835 11:08:40.969129 03900000 ################################################################
5836 11:08:40.969294
5837 11:08:41.256747 03980000 ################################################################
5838 11:08:41.256884
5839 11:08:41.551680 03a00000 ################################################################
5840 11:08:41.551796
5841 11:08:41.840590 03a80000 ################################################################
5842 11:08:41.840713
5843 11:08:42.109854 03b00000 ################################################################
5844 11:08:42.109994
5845 11:08:42.373222 03b80000 ################################################################
5846 11:08:42.373349
5847 11:08:42.657685 03c00000 ################################################################
5848 11:08:42.657816
5849 11:08:42.937335 03c80000 ################################################################
5850 11:08:42.937465
5851 11:08:43.210883 03d00000 ################################################################
5852 11:08:43.211006
5853 11:08:43.480540 03d80000 ################################################################
5854 11:08:43.480669
5855 11:08:43.775372 03e00000 ################################################################
5856 11:08:43.775526
5857 11:08:44.070576 03e80000 ################################################################
5858 11:08:44.070703
5859 11:08:44.357969 03f00000 ################################################################
5860 11:08:44.358096
5861 11:08:44.640745 03f80000 ################################################################
5862 11:08:44.640879
5863 11:08:44.906601 04000000 ################################################################
5864 11:08:44.906732
5865 11:08:45.158395 04080000 ################################################################
5866 11:08:45.158520
5867 11:08:45.424818 04100000 ################################################################
5868 11:08:45.424948
5869 11:08:45.683570 04180000 ################################################################
5870 11:08:45.683693
5871 11:08:45.945992 04200000 ################################################################
5872 11:08:45.946120
5873 11:08:46.220590 04280000 ################################################################
5874 11:08:46.220706
5875 11:08:46.504763 04300000 ################################################################
5876 11:08:46.504889
5877 11:08:46.777651 04380000 ################################################################
5878 11:08:46.777769
5879 11:08:47.049410 04400000 ################################################################
5880 11:08:47.049575
5881 11:08:47.310040 04480000 ################################################################
5882 11:08:47.310189
5883 11:08:47.578542 04500000 ################################################################
5884 11:08:47.578671
5885 11:08:47.846571 04580000 ################################################################
5886 11:08:47.846686
5887 11:08:48.107263 04600000 ################################################################
5888 11:08:48.107423
5889 11:08:48.231339 04680000 ############################## done.
5890 11:08:48.231495
5891 11:08:48.234591 The bootfile was 74168354 bytes long.
5892 11:08:48.234690
5893 11:08:48.238110 Sending tftp read request... done.
5894 11:08:48.238244
5895 11:08:48.238329 Waiting for the transfer...
5896 11:08:48.238412
5897 11:08:48.241231 00000000 # done.
5898 11:08:48.241330
5899 11:08:48.247580 Command line loaded dynamically from TFTP file: 14786808/tftp-deploy-08hh4jwk/kernel/cmdline
5900 11:08:48.247681
5901 11:08:48.264278 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5902 11:08:48.264366
5903 11:08:48.267708 Loading FIT.
5904 11:08:48.267803
5905 11:08:48.271049 Image ramdisk-1 has 60992357 bytes.
5906 11:08:48.271122
5907 11:08:48.271178 Image fdt-1 has 57695 bytes.
5908 11:08:48.274588
5909 11:08:48.274654 Image kernel-1 has 13116259 bytes.
5910 11:08:48.274708
5911 11:08:48.284313 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5912 11:08:48.284387
5913 11:08:48.298224 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5914 11:08:48.298300
5915 11:08:48.300996 Choosing best match conf-1 for compat google,juniper-sku16.
5916 11:08:48.306188
5917 11:08:48.311232 Connected to device vid:did:rid of 1ae0:0028:00
5918 11:08:48.317536
5919 11:08:48.321393 tpm_get_response: command 0x17b, return code 0x0
5920 11:08:48.321469
5921 11:08:48.324663 tpm_cleanup: add release locality here.
5922 11:08:48.324763
5923 11:08:48.328039 Shutting down all USB controllers.
5924 11:08:48.328112
5925 11:08:48.330907 Removing current net device
5926 11:08:48.330981
5927 11:08:48.334325 Exiting depthcharge with code 4 at timestamp: 58126018
5928 11:08:48.334400
5929 11:08:48.337842 LZMA decompressing kernel-1 to 0x80193568
5930 11:08:48.337916
5931 11:08:48.344792 LZMA decompressing kernel-1 to 0x40000000
5932 11:08:50.208634
5933 11:08:50.208783 jumping to kernel
5934 11:08:50.209471 end: 2.2.4 bootloader-commands (duration 00:00:43) [common]
5935 11:08:50.209569 start: 2.2.5 auto-login-action (timeout 00:03:44) [common]
5936 11:08:50.209636 Setting prompt string to ['Linux version [0-9]']
5937 11:08:50.209698 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5938 11:08:50.209786 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5939 11:08:50.283412
5940 11:08:50.286768 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5941 11:08:50.289650 start: 2.2.5.1 login-action (timeout 00:03:44) [common]
5942 11:08:50.289734 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5943 11:08:50.289799 Setting prompt string to []
5944 11:08:50.289873 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5945 11:08:50.289939 Using line separator: #'\n'#
5946 11:08:50.289992 No login prompt set.
5947 11:08:50.290045 Parsing kernel messages
5948 11:08:50.290094 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5949 11:08:50.290193 [login-action] Waiting for messages, (timeout 00:03:44)
5950 11:08:50.290252 Waiting using forced prompt support (timeout 00:01:52)
5951 11:08:50.309210 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j261272-arm64-gcc-12-defconfig-arm64-chromebook-bgdbp) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Wed Jul 10 10:43:20 UTC 2024
5952 11:08:50.313528 [ 0.000000] random: crng init done
5953 11:08:50.316187 [ 0.000000] Machine model: Google juniper sku16 board
5954 11:08:50.319479 [ 0.000000] efi: UEFI not found.
5955 11:08:50.329489 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5956 11:08:50.336413 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5957 11:08:50.342809 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5958 11:08:50.349631 [ 0.000000] printk: bootconsole [mtk8250] enabled
5959 11:08:50.357918 [ 0.000000] NUMA: No NUMA configuration found
5960 11:08:50.363909 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5961 11:08:50.370264 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5962 11:08:50.370335 [ 0.000000] Zone ranges:
5963 11:08:50.376730 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5964 11:08:50.379939 [ 0.000000] DMA32 empty
5965 11:08:50.386993 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5966 11:08:50.390317 [ 0.000000] Movable zone start for each node
5967 11:08:50.393252 [ 0.000000] Early memory node ranges
5968 11:08:50.400052 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5969 11:08:50.406412 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5970 11:08:50.413350 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5971 11:08:50.420398 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5972 11:08:50.426472 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5973 11:08:50.432881 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5974 11:08:50.453734 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5975 11:08:50.460274 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5976 11:08:50.467004 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5977 11:08:50.470687 [ 0.000000] psci: probing for conduit method from DT.
5978 11:08:50.476473 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5979 11:08:50.480134 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5980 11:08:50.486678 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5981 11:08:50.490021 [ 0.000000] psci: SMC Calling Convention v1.1
5982 11:08:50.496997 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5983 11:08:50.500201 [ 0.000000] Detected VIPT I-cache on CPU0
5984 11:08:50.506672 [ 0.000000] CPU features: detected: GIC system register CPU interface
5985 11:08:50.513525 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5986 11:08:50.520216 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5987 11:08:50.523750 [ 0.000000] CPU features: detected: ARM erratum 845719
5988 11:08:50.530474 [ 0.000000] alternatives: applying boot alternatives
5989 11:08:50.533013 [ 0.000000] Fallback order for Node 0: 0
5990 11:08:50.539901 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5991 11:08:50.543838 [ 0.000000] Policy zone: Normal
5992 11:08:50.563050 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5993 11:08:50.576042 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5994 11:08:50.582869 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5995 11:08:50.593504 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5996 11:08:50.599594 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5997 11:08:50.602440 <6>[ 0.000000] software IO TLB: area num 8.
5998 11:08:50.628503 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5999 11:08:50.686624 <6>[ 0.000000] Memory: 3855512K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 302952K reserved, 32768K cma-reserved)
6000 11:08:50.693682 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
6001 11:08:50.700137 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
6002 11:08:50.703777 <6>[ 0.000000] rcu: RCU event tracing is enabled.
6003 11:08:50.709380 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
6004 11:08:50.716314 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
6005 11:08:50.719634 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
6006 11:08:50.729638 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
6007 11:08:50.736255 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
6008 11:08:50.742949 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
6009 11:08:50.752510 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
6010 11:08:50.755831 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
6011 11:08:50.763121 <6>[ 0.000000] GICv3: 640 SPIs implemented
6012 11:08:50.766204 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
6013 11:08:50.769232 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
6014 11:08:50.776233 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
6015 11:08:50.782576 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
6016 11:08:50.792503 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
6017 11:08:50.805777 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
6018 11:08:50.812201 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
6019 11:08:50.823606 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
6020 11:08:50.836984 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
6021 11:08:50.843280 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
6022 11:08:50.850242 <6>[ 0.009473] Console: colour dummy device 80x25
6023 11:08:50.853604 <6>[ 0.014505] printk: console [tty1] enabled
6024 11:08:50.863852 <6>[ 0.018899] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
6025 11:08:50.870924 <6>[ 0.029363] pid_max: default: 32768 minimum: 301
6026 11:08:50.873747 <6>[ 0.034244] LSM: Security Framework initializing
6027 11:08:50.883433 <6>[ 0.039157] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
6028 11:08:50.890420 <6>[ 0.046781] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
6029 11:08:50.896531 <4>[ 0.055658] cacheinfo: Unable to detect cache hierarchy for CPU 0
6030 11:08:50.906853 <6>[ 0.062282] cblist_init_generic: Setting adjustable number of callback queues.
6031 11:08:50.913412 <6>[ 0.069727] cblist_init_generic: Setting shift to 3 and lim to 1.
6032 11:08:50.920360 <6>[ 0.076081] cblist_init_generic: Setting adjustable number of callback queues.
6033 11:08:50.926675 <6>[ 0.083525] cblist_init_generic: Setting shift to 3 and lim to 1.
6034 11:08:50.930003 <6>[ 0.089925] rcu: Hierarchical SRCU implementation.
6035 11:08:50.936961 <6>[ 0.094952] rcu: Max phase no-delay instances is 1000.
6036 11:08:50.943642 <6>[ 0.102876] EFI services will not be available.
6037 11:08:50.947534 <6>[ 0.107824] smp: Bringing up secondary CPUs ...
6038 11:08:50.957602 <6>[ 0.113053] Detected VIPT I-cache on CPU1
6039 11:08:50.964301 <4>[ 0.113101] cacheinfo: Unable to detect cache hierarchy for CPU 1
6040 11:08:50.970450 <6>[ 0.113108] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
6041 11:08:50.977296 <6>[ 0.113140] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
6042 11:08:50.980594 <6>[ 0.113622] Detected VIPT I-cache on CPU2
6043 11:08:50.987506 <4>[ 0.113654] cacheinfo: Unable to detect cache hierarchy for CPU 2
6044 11:08:50.994467 <6>[ 0.113658] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
6045 11:08:51.000459 <6>[ 0.113670] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
6046 11:08:51.004006 <6>[ 0.114118] Detected VIPT I-cache on CPU3
6047 11:08:51.010363 <4>[ 0.114148] cacheinfo: Unable to detect cache hierarchy for CPU 3
6048 11:08:51.020619 <6>[ 0.114153] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
6049 11:08:51.027679 <6>[ 0.114164] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
6050 11:08:51.030295 <6>[ 0.114738] CPU features: detected: Spectre-v2
6051 11:08:51.033693 <6>[ 0.114748] CPU features: detected: Spectre-BHB
6052 11:08:51.040549 <6>[ 0.114752] CPU features: detected: ARM erratum 858921
6053 11:08:51.043477 <6>[ 0.114757] Detected VIPT I-cache on CPU4
6054 11:08:51.050250 <4>[ 0.114806] cacheinfo: Unable to detect cache hierarchy for CPU 4
6055 11:08:51.057278 <6>[ 0.114813] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
6056 11:08:51.067208 <6>[ 0.114821] arch_timer: Enabling local workaround for ARM erratum 858921
6057 11:08:51.070548 <6>[ 0.114832] arch_timer: CPU4: Trapping CNTVCT access
6058 11:08:51.076481 <6>[ 0.114840] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
6059 11:08:51.079659 <6>[ 0.115326] Detected VIPT I-cache on CPU5
6060 11:08:51.086507 <4>[ 0.115366] cacheinfo: Unable to detect cache hierarchy for CPU 5
6061 11:08:51.096451 <6>[ 0.115371] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
6062 11:08:51.102962 <6>[ 0.115378] arch_timer: Enabling local workaround for ARM erratum 858921
6063 11:08:51.106461 <6>[ 0.115384] arch_timer: CPU5: Trapping CNTVCT access
6064 11:08:51.112878 <6>[ 0.115390] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
6065 11:08:51.119355 <6>[ 0.115825] Detected VIPT I-cache on CPU6
6066 11:08:51.123342 <4>[ 0.115871] cacheinfo: Unable to detect cache hierarchy for CPU 6
6067 11:08:51.132753 <6>[ 0.115877] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6068 11:08:51.139534 <6>[ 0.115884] arch_timer: Enabling local workaround for ARM erratum 858921
6069 11:08:51.142903 <6>[ 0.115890] arch_timer: CPU6: Trapping CNTVCT access
6070 11:08:51.149474 <6>[ 0.115895] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6071 11:08:51.156944 <6>[ 0.116426] Detected VIPT I-cache on CPU7
6072 11:08:51.159328 <4>[ 0.116470] cacheinfo: Unable to detect cache hierarchy for CPU 7
6073 11:08:51.169606 <6>[ 0.116476] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6074 11:08:51.175770 <6>[ 0.116483] arch_timer: Enabling local workaround for ARM erratum 858921
6075 11:08:51.179197 <6>[ 0.116489] arch_timer: CPU7: Trapping CNTVCT access
6076 11:08:51.185958 <6>[ 0.116494] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6077 11:08:51.192431 <6>[ 0.116542] smp: Brought up 1 node, 8 CPUs
6078 11:08:51.195812 <6>[ 0.355448] SMP: Total of 8 processors activated.
6079 11:08:51.202574 <6>[ 0.360383] CPU features: detected: 32-bit EL0 Support
6080 11:08:51.205939 <6>[ 0.365761] CPU features: detected: 32-bit EL1 Support
6081 11:08:51.212099 <6>[ 0.371130] CPU features: detected: CRC32 instructions
6082 11:08:51.216117 <6>[ 0.376555] CPU: All CPU(s) started at EL2
6083 11:08:51.222330 <6>[ 0.380893] alternatives: applying system-wide alternatives
6084 11:08:51.229920 <6>[ 0.388922] devtmpfs: initialized
6085 11:08:51.245565 <6>[ 0.397848] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
6086 11:08:51.252274 <6>[ 0.407796] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6087 11:08:51.255753 <6>[ 0.415513] pinctrl core: initialized pinctrl subsystem
6088 11:08:51.264254 <6>[ 0.422637] DMI not present or invalid.
6089 11:08:51.270247 <6>[ 0.427005] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6090 11:08:51.276661 <6>[ 0.433905] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6091 11:08:51.286923 <6>[ 0.441433] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6092 11:08:51.293382 <6>[ 0.449685] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6093 11:08:51.300302 <6>[ 0.457861] audit: initializing netlink subsys (disabled)
6094 11:08:51.306522 <5>[ 0.463566] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
6095 11:08:51.313337 <6>[ 0.464537] thermal_sys: Registered thermal governor 'step_wise'
6096 11:08:51.320318 <6>[ 0.471533] thermal_sys: Registered thermal governor 'power_allocator'
6097 11:08:51.323633 <6>[ 0.477831] cpuidle: using governor menu
6098 11:08:51.330747 <6>[ 0.488796] NET: Registered PF_QIPCRTR protocol family
6099 11:08:51.336612 <6>[ 0.494283] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6100 11:08:51.343802 <6>[ 0.501382] ASID allocator initialised with 32768 entries
6101 11:08:51.349669 <6>[ 0.508160] Serial: AMBA PL011 UART driver
6102 11:08:51.360274 <4>[ 0.519507] Trying to register duplicate clock ID: 113
6103 11:08:51.421044 <6>[ 0.576272] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6104 11:08:51.434913 <6>[ 0.590671] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6105 11:08:51.438359 <6>[ 0.600452] KASLR enabled
6106 11:08:51.453098 <6>[ 0.608409] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6107 11:08:51.459279 <6>[ 0.615411] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6108 11:08:51.466066 <6>[ 0.621888] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6109 11:08:51.472676 <6>[ 0.628880] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6110 11:08:51.479897 <6>[ 0.635353] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6111 11:08:51.485896 <6>[ 0.642344] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6112 11:08:51.492992 <6>[ 0.648818] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6113 11:08:51.499439 <6>[ 0.655809] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6114 11:08:51.502419 <6>[ 0.663381] ACPI: Interpreter disabled.
6115 11:08:51.512089 <6>[ 0.671361] iommu: Default domain type: Translated
6116 11:08:51.519176 <6>[ 0.676469] iommu: DMA domain TLB invalidation policy: strict mode
6117 11:08:51.522184 <5>[ 0.683100] SCSI subsystem initialized
6118 11:08:51.528680 <6>[ 0.687508] usbcore: registered new interface driver usbfs
6119 11:08:51.535241 <6>[ 0.693235] usbcore: registered new interface driver hub
6120 11:08:51.538421 <6>[ 0.698775] usbcore: registered new device driver usb
6121 11:08:51.546639 <6>[ 0.705089] pps_core: LinuxPPS API ver. 1 registered
6122 11:08:51.556071 <6>[ 0.710274] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6123 11:08:51.559845 <6>[ 0.719598] PTP clock support registered
6124 11:08:51.562956 <6>[ 0.723851] EDAC MC: Ver: 3.0.0
6125 11:08:51.570260 <6>[ 0.729487] FPGA manager framework
6126 11:08:51.577062 <6>[ 0.733171] Advanced Linux Sound Architecture Driver Initialized.
6127 11:08:51.580227 <6>[ 0.739928] vgaarb: loaded
6128 11:08:51.583499 <6>[ 0.743055] clocksource: Switched to clocksource arch_sys_counter
6129 11:08:51.590715 <5>[ 0.749493] VFS: Disk quotas dquot_6.6.0
6130 11:08:51.597111 <6>[ 0.753670] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6131 11:08:51.600197 <6>[ 0.760846] pnp: PnP ACPI: disabled
6132 11:08:51.608804 <6>[ 0.767739] NET: Registered PF_INET protocol family
6133 11:08:51.615307 <6>[ 0.772969] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6134 11:08:51.627398 <6>[ 0.782881] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6135 11:08:51.638143 <6>[ 0.791637] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6136 11:08:51.644100 <6>[ 0.799587] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6137 11:08:51.650404 <6>[ 0.807819] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6138 11:08:51.656768 <6>[ 0.815911] TCP: Hash tables configured (established 32768 bind 32768)
6139 11:08:51.666961 <6>[ 0.822737] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6140 11:08:51.674145 <6>[ 0.829711] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6141 11:08:51.680495 <6>[ 0.837194] NET: Registered PF_UNIX/PF_LOCAL protocol family
6142 11:08:51.686793 <6>[ 0.843291] RPC: Registered named UNIX socket transport module.
6143 11:08:51.690191 <6>[ 0.849434] RPC: Registered udp transport module.
6144 11:08:51.696904 <6>[ 0.854358] RPC: Registered tcp transport module.
6145 11:08:51.704518 <6>[ 0.859281] RPC: Registered tcp NFSv4.1 backchannel transport module.
6146 11:08:51.706697 <6>[ 0.865934] PCI: CLS 0 bytes, default 64
6147 11:08:51.710224 <6>[ 0.870221] Unpacking initramfs...
6148 11:08:51.731849 <6>[ 0.887731] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6149 11:08:51.742071 <6>[ 0.896360] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6150 11:08:51.745362 <6>[ 0.905210] kvm [1]: IPA Size Limit: 40 bits
6151 11:08:51.752211 <6>[ 0.911539] kvm [1]: vgic-v2@c420000
6152 11:08:51.755873 <6>[ 0.915355] kvm [1]: GIC system register CPU interface enabled
6153 11:08:51.762299 <6>[ 0.921519] kvm [1]: vgic interrupt IRQ18
6154 11:08:51.765845 <6>[ 0.925878] kvm [1]: Hyp mode initialized successfully
6155 11:08:51.773205 <5>[ 0.932172] Initialise system trusted keyrings
6156 11:08:51.779643 <6>[ 0.937035] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6157 11:08:51.787893 <6>[ 0.946994] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6158 11:08:51.794725 <5>[ 0.953477] NFS: Registering the id_resolver key type
6159 11:08:51.797955 <5>[ 0.958795] Key type id_resolver registered
6160 11:08:51.804503 <5>[ 0.963216] Key type id_legacy registered
6161 11:08:51.811785 <6>[ 0.967528] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6162 11:08:51.818148 <6>[ 0.974455] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6163 11:08:51.824029 <6>[ 0.982211] 9p: Installing v9fs 9p2000 file system support
6164 11:08:51.852107 <5>[ 1.011167] Key type asymmetric registered
6165 11:08:51.855158 <5>[ 1.015516] Asymmetric key parser 'x509' registered
6166 11:08:51.865290 <6>[ 1.020674] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6167 11:08:51.868919 <6>[ 1.028295] io scheduler mq-deadline registered
6168 11:08:51.872207 <6>[ 1.033056] io scheduler kyber registered
6169 11:08:51.895392 <6>[ 1.053921] EINJ: ACPI disabled.
6170 11:08:51.901189 <4>[ 1.057710] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6171 11:08:51.939442 <6>[ 1.098608] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6172 11:08:51.947912 <6>[ 1.107085] printk: console [ttyS0] disabled
6173 11:08:51.976036 <6>[ 1.131731] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6174 11:08:51.982435 <6>[ 1.141208] printk: console [ttyS0] enabled
6175 11:08:51.985954 <6>[ 1.141208] printk: console [ttyS0] enabled
6176 11:08:51.992633 <6>[ 1.150131] printk: bootconsole [mtk8250] disabled
6177 11:08:51.995851 <6>[ 1.150131] printk: bootconsole [mtk8250] disabled
6178 11:08:52.006172 <3>[ 1.160664] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6179 11:08:52.012268 <3>[ 1.169049] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6180 11:08:52.041740 <6>[ 1.197460] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6181 11:08:52.048417 <6>[ 1.207119] serial serial0: tty port ttyS1 registered
6182 11:08:52.054965 <6>[ 1.213689] SuperH (H)SCI(F) driver initialized
6183 11:08:52.058145 <6>[ 1.219180] msm_serial: driver initialized
6184 11:08:52.074325 <6>[ 1.229475] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6185 11:08:52.084161 <6>[ 1.238076] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6186 11:08:52.090650 <6>[ 1.246651] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6187 11:08:52.099997 <6>[ 1.255220] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6188 11:08:52.110242 <6>[ 1.263875] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6189 11:08:52.116720 <6>[ 1.272545] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6190 11:08:52.126781 <6>[ 1.281289] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6191 11:08:52.133227 <6>[ 1.290032] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6192 11:08:52.143382 <6>[ 1.298596] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6193 11:08:52.153231 <6>[ 1.307395] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6194 11:08:52.160867 <4>[ 1.319837] cacheinfo: Unable to detect cache hierarchy for CPU 0
6195 11:08:52.170481 <6>[ 1.329136] loop: module loaded
6196 11:08:52.182262 <6>[ 1.341078] vsim1: Bringing 1800000uV into 2700000-2700000uV
6197 11:08:52.200073 <6>[ 1.359036] megasas: 07.719.03.00-rc1
6198 11:08:52.209027 <6>[ 1.367816] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6199 11:08:52.223346 <6>[ 1.382435] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6200 11:08:52.240779 <6>[ 1.399188] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6201 11:08:52.297862 <6>[ 1.449473] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6202 11:08:53.771478 <6>[ 2.929972] Freeing initrd memory: 59560K
6203 11:08:53.786039 <4>[ 2.941908] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6204 11:08:53.792951 <4>[ 2.951143] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
6205 11:08:53.800179 <4>[ 2.957841] Hardware name: Google juniper sku16 board (DT)
6206 11:08:53.802972 <4>[ 2.963579] Call trace:
6207 11:08:53.805868 <4>[ 2.966279] dump_backtrace.part.0+0xe0/0xf0
6208 11:08:53.809380 <4>[ 2.970816] show_stack+0x18/0x30
6209 11:08:53.813106 <4>[ 2.974389] dump_stack_lvl+0x64/0x80
6210 11:08:53.819737 <4>[ 2.978309] dump_stack+0x18/0x34
6211 11:08:53.822316 <4>[ 2.981878] sysfs_warn_dup+0x64/0x80
6212 11:08:53.825828 <4>[ 2.985800] sysfs_do_create_link_sd+0xf0/0x100
6213 11:08:53.829023 <4>[ 2.990588] sysfs_create_link+0x20/0x40
6214 11:08:53.836052 <4>[ 2.994767] bus_add_device+0x64/0x120
6215 11:08:53.839098 <4>[ 2.998772] device_add+0x354/0x7ec
6216 11:08:53.843025 <4>[ 3.002519] of_device_add+0x44/0x60
6217 11:08:53.848887 <4>[ 3.006353] of_platform_device_create_pdata+0x90/0x124
6218 11:08:53.852488 <4>[ 3.011835] of_platform_bus_create+0x154/0x380
6219 11:08:53.855824 <4>[ 3.016621] of_platform_populate+0x50/0xfc
6220 11:08:53.862254 <4>[ 3.021061] parse_mtd_partitions+0x1d8/0x4e0
6221 11:08:53.865697 <4>[ 3.025677] mtd_device_parse_register+0xec/0x2e0
6222 11:08:53.868734 <4>[ 3.030638] spi_nor_probe+0x280/0x2f4
6223 11:08:53.875570 <4>[ 3.034644] spi_mem_probe+0x6c/0xc0
6224 11:08:53.878884 <4>[ 3.038476] spi_probe+0x84/0xe4
6225 11:08:53.882424 <4>[ 3.041961] really_probe+0xbc/0x2dc
6226 11:08:53.886379 <4>[ 3.045792] __driver_probe_device+0x78/0x114
6227 11:08:53.892623 <4>[ 3.050403] driver_probe_device+0xd8/0x15c
6228 11:08:53.895407 <4>[ 3.054841] __device_attach_driver+0xb8/0x134
6229 11:08:53.898778 <4>[ 3.059539] bus_for_each_drv+0x7c/0xd4
6230 11:08:53.902152 <4>[ 3.063631] __device_attach+0x9c/0x1a0
6231 11:08:53.908637 <4>[ 3.067722] device_initial_probe+0x14/0x20
6232 11:08:53.912175 <4>[ 3.072160] bus_probe_device+0x98/0xa0
6233 11:08:53.915429 <4>[ 3.076250] device_add+0x3c0/0x7ec
6234 11:08:53.918445 <4>[ 3.079995] __spi_add_device+0x78/0x120
6235 11:08:53.925154 <4>[ 3.084173] spi_add_device+0x44/0x80
6236 11:08:53.928319 <4>[ 3.088091] spi_register_controller+0x704/0xb20
6237 11:08:53.934862 <4>[ 3.092964] devm_spi_register_controller+0x4c/0xac
6238 11:08:53.938286 <4>[ 3.098096] mtk_spi_probe+0x4f4/0x684
6239 11:08:53.942074 <4>[ 3.102101] platform_probe+0x68/0xc0
6240 11:08:53.945644 <4>[ 3.106020] really_probe+0xbc/0x2dc
6241 11:08:53.952844 <4>[ 3.109850] __driver_probe_device+0x78/0x114
6242 11:08:53.955266 <4>[ 3.114461] driver_probe_device+0xd8/0x15c
6243 11:08:53.958665 <4>[ 3.118897] __driver_attach+0x94/0x19c
6244 11:08:53.961782 <4>[ 3.122987] bus_for_each_dev+0x74/0xd0
6245 11:08:53.968192 <4>[ 3.127080] driver_attach+0x24/0x30
6246 11:08:53.971420 <4>[ 3.130909] bus_add_driver+0x154/0x20c
6247 11:08:53.974906 <4>[ 3.134999] driver_register+0x78/0x130
6248 11:08:53.981477 <4>[ 3.139089] __platform_driver_register+0x28/0x34
6249 11:08:53.985017 <4>[ 3.144049] mtk_spi_driver_init+0x1c/0x28
6250 11:08:53.987685 <4>[ 3.148405] do_one_initcall+0x64/0x1dc
6251 11:08:53.994901 <4>[ 3.152496] kernel_init_freeable+0x218/0x284
6252 11:08:53.997677 <4>[ 3.157111] kernel_init+0x24/0x12c
6253 11:08:54.000978 <4>[ 3.160856] ret_from_fork+0x10/0x20
6254 11:08:54.010708 <6>[ 3.169753] tun: Universal TUN/TAP device driver, 1.6
6255 11:08:54.014216 <6>[ 3.176042] thunder_xcv, ver 1.0
6256 11:08:54.017515 <6>[ 3.179563] thunder_bgx, ver 1.0
6257 11:08:54.020944 <6>[ 3.183069] nicpf, ver 1.0
6258 11:08:54.031472 <6>[ 3.187455] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6259 11:08:54.035551 <6>[ 3.194938] hns3: Copyright (c) 2017 Huawei Corporation.
6260 11:08:54.041642 <6>[ 3.200539] hclge is initializing
6261 11:08:54.045036 <6>[ 3.204131] e1000: Intel(R) PRO/1000 Network Driver
6262 11:08:54.051620 <6>[ 3.209267] e1000: Copyright (c) 1999-2006 Intel Corporation.
6263 11:08:54.055282 <6>[ 3.215292] e1000e: Intel(R) PRO/1000 Network Driver
6264 11:08:54.061658 <6>[ 3.220513] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6265 11:08:54.068413 <6>[ 3.226706] igb: Intel(R) Gigabit Ethernet Network Driver
6266 11:08:54.075124 <6>[ 3.232361] igb: Copyright (c) 2007-2014 Intel Corporation.
6267 11:08:54.081549 <6>[ 3.238204] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6268 11:08:54.088497 <6>[ 3.244728] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6269 11:08:54.091397 <6>[ 3.251292] sky2: driver version 1.30
6270 11:08:54.098394 <6>[ 3.256547] usbcore: registered new device driver r8152-cfgselector
6271 11:08:54.104646 <6>[ 3.263090] usbcore: registered new interface driver r8152
6272 11:08:54.112219 <6>[ 3.268925] VFIO - User Level meta-driver version: 0.3
6273 11:08:54.118224 <6>[ 3.276745] mtu3 11201000.usb: uwk - reg:0x420, version:101
6274 11:08:54.125234 <4>[ 3.282624] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6275 11:08:54.131849 <6>[ 3.289904] mtu3 11201000.usb: dr_mode: 1, drd: auto
6276 11:08:54.138098 <6>[ 3.295130] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6277 11:08:54.141254 <6>[ 3.301316] mtu3 11201000.usb: usb3-drd: 0
6278 11:08:54.151050 <6>[ 3.306909] mtu3 11201000.usb: xHCI platform device register success...
6279 11:08:54.158086 <4>[ 3.315547] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6280 11:08:54.164398 <6>[ 3.323482] xhci-mtk 11200000.usb: xHCI Host Controller
6281 11:08:54.171215 <6>[ 3.329013] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6282 11:08:54.178210 <6>[ 3.336733] xhci-mtk 11200000.usb: USB3 root hub has no ports
6283 11:08:54.187661 <6>[ 3.342742] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6284 11:08:54.194078 <6>[ 3.352164] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6285 11:08:54.200996 <6>[ 3.358249] xhci-mtk 11200000.usb: xHCI Host Controller
6286 11:08:54.207269 <6>[ 3.363737] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6287 11:08:54.214361 <6>[ 3.371395] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6288 11:08:54.217299 <6>[ 3.378212] hub 1-0:1.0: USB hub found
6289 11:08:54.220536 <6>[ 3.382240] hub 1-0:1.0: 1 port detected
6290 11:08:54.231964 <6>[ 3.387602] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6291 11:08:54.235047 <6>[ 3.396219] hub 2-0:1.0: USB hub found
6292 11:08:54.245034 <3>[ 3.400245] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6293 11:08:54.251580 <6>[ 3.408129] usbcore: registered new interface driver usb-storage
6294 11:08:54.258450 <6>[ 3.414703] usbcore: registered new device driver onboard-usb-hub
6295 11:08:54.268283 <4>[ 3.423155] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6296 11:08:54.276330 <6>[ 3.435403] mt6397-rtc mt6358-rtc: registered as rtc0
6297 11:08:54.286670 <6>[ 3.440888] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-10T11:08:54 UTC (1720609734)
6298 11:08:54.293532 <6>[ 3.450782] i2c_dev: i2c /dev entries driver
6299 11:08:54.303095 <6>[ 3.457187] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6300 11:08:54.309544 <6>[ 3.465565] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6301 11:08:54.315837 <6>[ 3.474471] i2c 4-0058: Fixed dependency cycle(s) with /panel
6302 11:08:54.322516 <6>[ 3.480540] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6303 11:08:54.341246 <6>[ 3.500116] cpu cpu0: EM: created perf domain
6304 11:08:54.354382 <6>[ 3.505606] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6305 11:08:54.357421 <6>[ 3.516908] cpu cpu4: EM: created perf domain
6306 11:08:54.364636 <6>[ 3.523942] sdhci: Secure Digital Host Controller Interface driver
6307 11:08:54.371403 <6>[ 3.530399] sdhci: Copyright(c) Pierre Ossman
6308 11:08:54.378298 <6>[ 3.535814] Synopsys Designware Multimedia Card Interface Driver
6309 11:08:54.385313 <6>[ 3.536322] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6310 11:08:54.387954 <6>[ 3.542872] sdhci-pltfm: SDHCI platform and OF driver helper
6311 11:08:54.397092 <6>[ 3.556506] ledtrig-cpu: registered to indicate activity on CPUs
6312 11:08:54.405511 <6>[ 3.564246] usbcore: registered new interface driver usbhid
6313 11:08:54.408746 <6>[ 3.570090] usbhid: USB HID core driver
6314 11:08:54.419671 <6>[ 3.574355] spi_master spi2: will run message pump with realtime priority
6315 11:08:54.423104 <4>[ 3.574358] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6316 11:08:54.430671 <4>[ 3.588610] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6317 11:08:54.443648 <6>[ 3.594130] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6318 11:08:54.462050 <6>[ 3.611274] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6319 11:08:54.469086 <4>[ 3.619870] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6320 11:08:54.472194 <6>[ 3.626292] cros-ec-spi spi2.0: Chrome EC device registered
6321 11:08:54.485959 <4>[ 3.641749] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6322 11:08:54.499911 <4>[ 3.655586] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6323 11:08:54.506285 <4>[ 3.664933] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6324 11:08:54.512981 <6>[ 3.666430] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x12c14
6325 11:08:54.519747 <6>[ 3.678411] mmc0: new HS400 MMC card at address 0001
6326 11:08:54.526446 <6>[ 3.683439] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6327 11:08:54.529676 <6>[ 3.685260] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6328 11:08:54.539516 <6>[ 3.693992] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6329 11:08:54.555784 <6>[ 3.707864] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6330 11:08:54.561987 <6>[ 3.711017] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6331 11:08:54.565501 <6>[ 3.720110] NET: Registered PF_PACKET protocol family
6332 11:08:54.572509 <6>[ 3.726994] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6333 11:08:54.575244 <6>[ 3.730331] 9pnet: Installing 9P2000 support
6334 11:08:54.581796 <6>[ 3.736573] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6335 11:08:54.591815 <6>[ 3.739558] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6336 11:08:54.598251 <5>[ 3.739779] Key type dns_resolver registered
6337 11:08:54.609082 <6>[ 3.739880] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6338 11:08:54.614961 <6>[ 3.746136] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6339 11:08:54.618207 <6>[ 3.757700] registered taskstats version 1
6340 11:08:54.624809 <5>[ 3.782427] Loading compiled-in X.509 certificates
6341 11:08:54.647153 <6>[ 3.803087] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6342 11:08:54.664125 <3>[ 3.819437] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6343 11:08:54.695550 <6>[ 3.847918] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6344 11:08:54.706879 <6>[ 3.862169] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6345 11:08:54.716587 <6>[ 3.870745] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6346 11:08:54.723473 <6>[ 3.879308] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6347 11:08:54.732941 <6>[ 3.887856] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6348 11:08:54.739541 <6>[ 3.896380] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6349 11:08:54.750240 <6>[ 3.904901] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6350 11:08:54.756861 <6>[ 3.913421] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6351 11:08:54.763554 <6>[ 3.922799] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6352 11:08:54.771658 <6>[ 3.930380] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6353 11:08:54.778643 <6>[ 3.937699] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6354 11:08:54.789385 <6>[ 3.944962] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6355 11:08:54.796043 <6>[ 3.952372] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6356 11:08:54.799034 <6>[ 3.958139] hub 1-1:1.0: USB hub found
6357 11:08:54.805531 <6>[ 3.960754] panfrost 13040000.gpu: clock rate = 511999970
6358 11:08:54.808981 <6>[ 3.963571] hub 1-1:1.0: 3 ports detected
6359 11:08:54.819013 <6>[ 3.968756] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6360 11:08:54.825679 <6>[ 3.983133] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6361 11:08:54.835422 <6>[ 3.991137] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6362 11:08:54.849287 <6>[ 3.999572] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6363 11:08:54.855228 <6>[ 4.011650] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6364 11:08:54.866995 <6>[ 4.022736] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6365 11:08:54.877151 <6>[ 4.032012] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6366 11:08:54.887043 <6>[ 4.041162] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6367 11:08:54.897174 <6>[ 4.050294] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6368 11:08:54.903508 <6>[ 4.059422] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6369 11:08:54.913799 <6>[ 4.068723] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6370 11:08:54.923756 <6>[ 4.078024] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6371 11:08:54.933285 <6>[ 4.087499] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6372 11:08:54.943652 <6>[ 4.096973] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6373 11:08:54.949693 <6>[ 4.106099] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6374 11:08:55.023355 <6>[ 4.178781] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6375 11:08:55.032845 <6>[ 4.187671] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6376 11:08:55.044544 <6>[ 4.199425] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6377 11:08:55.107512 <6>[ 4.263091] usb 1-1.1: new high-speed USB device number 3 using xhci-mtk
6378 11:08:55.741609 <6>[ 4.370043] hub 1-1.1:1.0: USB hub found
6379 11:08:55.744429 <6>[ 4.370237] hub 1-1.1:1.0: 4 ports detected
6380 11:08:55.751052 <6>[ 4.883593] Console: switching to colour frame buffer device 170x48
6381 11:08:55.761222 <6>[ 4.915605] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6382 11:08:55.780762 <6>[ 4.933012] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6383 11:08:55.797939 <6>[ 4.950249] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6384 11:08:55.804345 <6>[ 4.962411] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6385 11:08:55.814976 <6>[ 4.970828] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6386 11:08:55.824804 <6>[ 4.975749] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6387 11:08:55.842874 <6>[ 4.994944] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6388 11:08:55.849413 <6>[ 5.003147] usb 1-1.2: new high-speed USB device number 4 using xhci-mtk
6389 11:08:56.044022 <6>[ 5.199385] r8152-cfgselector 1-1.2: reset high-speed USB device number 4 using xhci-mtk
6390 11:08:56.170759 <4>[ 5.326160] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6391 11:08:56.180384 <4>[ 5.335309] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6392 11:08:56.221208 <6>[ 5.379957] r8152 1-1.2:1.0 eth0: v1.12.13
6393 11:08:56.231392 <6>[ 5.387088] usb 1-1.1.1: new high-speed USB device number 5 using xhci-mtk
6394 11:08:56.250038 <6>[ 5.402471] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6395 11:08:56.415389 <6>[ 5.571232] usb 1-1.3: new high-speed USB device number 6 using xhci-mtk
6396 11:08:56.553312 <6>[ 5.705444] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6397 11:08:56.603939 <6>[ 5.759578] r8152-cfgselector 1-1.1.1: reset high-speed USB device number 5 using xhci-mtk
6398 11:08:56.732640 <4>[ 5.888424] r8152 1-1.1.1:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6399 11:08:56.746466 <4>[ 5.902201] r8152 1-1.1.1:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6400 11:08:56.806720 <6>[ 5.965451] r8152 1-1.1.1:1.0 eth1: v1.12.13
6401 11:08:56.835526 <6>[ 5.987612] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6402 11:08:56.861622 <6>[ 6.013948] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6403 11:08:57.807828 <6>[ 6.966635] r8152 1-1.2:1.0 eth0: carrier on
6404 11:09:00.508165 <5>[ 6.995092] Sending DHCP requests .., OK
6405 11:09:00.520760 <6>[ 9.676355] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6406 11:09:00.530673 <6>[ 9.689603] IP-Config: Complete:
6407 11:09:00.545693 <6>[ 9.697965] device=eth0, hwaddr=00:e0:4c:72:3d:67, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6408 11:09:00.557901 <6>[ 9.713706] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-1, domain=lava-rack, nis-domain=(none)
6409 11:09:00.571046 <6>[ 9.726972] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6410 11:09:00.579106 <6>[ 9.726980] nameserver0=192.168.201.1
6411 11:09:00.610013 <6>[ 9.768534] clk: Disabling unused clocks
6412 11:09:00.616358 <6>[ 9.778558] ALSA device list:
6413 11:09:00.625014 <6>[ 9.783704] No soundcards found.
6414 11:09:00.632590 <6>[ 9.791660] Freeing unused kernel memory: 8512K
6415 11:09:00.639540 <6>[ 9.798490] Run /init as init process
6416 11:09:00.674100 <6>[ 9.833091] NET: Registered PF_INET6 protocol family
6417 11:09:00.681629 <6>[ 9.840791] Segment Routing with IPv6
6418 11:09:00.685283 <6>[ 9.845488] In-situ OAM (IOAM) with IPv6
6419 11:09:00.731643 <30>[ 9.863957] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6420 11:09:00.740806 <30>[ 9.899331] systemd[1]: Detected architecture arm64.
6421 11:09:00.740901
6422 11:09:00.746888 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6423 11:09:00.746968
6424 11:09:00.764526 <30>[ 9.923417] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6425 11:09:00.929418 <30>[ 10.084335] systemd[1]: Queued start job for default target graphical.target.
6426 11:09:00.965375 <30>[ 10.120697] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6427 11:09:00.975845 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6428 11:09:00.993600 <30>[ 10.148731] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6429 11:09:01.003573 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6430 11:09:01.020806 <30>[ 10.176011] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6431 11:09:01.031861 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6432 11:09:01.050196 <30>[ 10.204456] systemd[1]: Created slice user.slice - User and Session Slice.
6433 11:09:01.058750 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6434 11:09:01.079642 <30>[ 10.231827] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6435 11:09:01.091762 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6436 11:09:01.112091 <30>[ 10.263954] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6437 11:09:01.123796 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6438 11:09:01.149679 <30>[ 10.295359] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6439 11:09:01.168503 <30>[ 10.324008] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6440 11:09:01.175536 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6441 11:09:01.195997 <30>[ 10.351282] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6442 11:09:01.208493 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6443 11:09:01.227945 <30>[ 10.383345] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6444 11:09:01.242067 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6445 11:09:01.256161 <30>[ 10.415326] systemd[1]: Reached target paths.target - Path Units.
6446 11:09:01.272323 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6447 11:09:01.288407 <30>[ 10.443264] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6448 11:09:01.300259 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6449 11:09:01.316674 <30>[ 10.475234] systemd[1]: Reached target slices.target - Slice Units.
6450 11:09:01.331399 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6451 11:09:01.344645 <30>[ 10.503281] systemd[1]: Reached target swap.target - Swaps.
6452 11:09:01.355299 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6453 11:09:01.375679 <30>[ 10.531297] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6454 11:09:01.389439 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6455 11:09:01.408275 <30>[ 10.563697] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6456 11:09:01.422199 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6457 11:09:01.441673 <30>[ 10.596957] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6458 11:09:01.454928 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6459 11:09:01.472723 <30>[ 10.627968] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6460 11:09:01.486877 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6461 11:09:01.504452 <30>[ 10.659887] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6462 11:09:01.517013 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6463 11:09:01.537353 <30>[ 10.692816] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6464 11:09:01.550968 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6465 11:09:01.568269 <30>[ 10.723789] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6466 11:09:01.581271 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6467 11:09:01.624109 <30>[ 10.779430] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6468 11:09:01.634053 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6469 11:09:01.654417 <30>[ 10.810146] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6470 11:09:01.667600 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6471 11:09:01.689072 <30>[ 10.844558] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6472 11:09:01.702374 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6473 11:09:01.718776 <30>[ 10.866499] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6474 11:09:01.752824 <30>[ 10.908187] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6475 11:09:01.765946 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6476 11:09:01.789563 <30>[ 10.945007] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6477 11:09:01.803307 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6478 11:09:01.848751 <30>[ 11.003726] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6479 11:09:01.862374 Startin<6>[ 11.016025] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6480 11:09:01.865752 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6481 11:09:01.890060 <30>[ 11.045781] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6482 11:09:01.903570 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6483 11:09:01.925492 <30>[ 11.080920] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6484 11:09:01.940047 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6485 11:09:01.960949 <30>[ 11.116803] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6486 11:09:01.972922 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6487 11:09:02.002405 <30>[ 11.157788] systemd[1]: Starting systemd-journald.service - Journal Service...
6488 11:09:02.015208 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6489 11:09:02.040955 <30>[ 11.196694] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6490 11:09:02.052729 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6491 11:09:02.079803 <30>[ 11.232135] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6492 11:09:02.090579 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6493 11:09:02.113566 <30>[ 11.269022] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6494 11:09:02.125956 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6495 11:09:02.150813 <30>[ 11.306474] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6496 11:09:02.161595 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6497 11:09:02.187834 <30>[ 11.342841] systemd[1]: Started systemd-journald.service - Journal Service.
6498 11:09:02.197450 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6499 11:09:02.222126 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6500 11:09:02.240564 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6501 11:09:02.260507 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6502 11:09:02.281040 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6503 11:09:02.301234 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6504 11:09:02.325584 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6505 11:09:02.345386 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6506 11:09:02.365247 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6507 11:09:02.388491 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6508 11:09:02.408600 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6509 11:09:02.433093 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6510 11:09:02.457783 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6511 11:09:02.501533 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6512 11:09:02.530195 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6513 11:09:02.561619 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6514 11:09:02.568801 See 'systemctl status systemd-remount-fs.service' for details.
6515 11:09:02.579641 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6516 11:09:02.600435 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6517 11:09:02.622167 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6518 11:09:02.680911 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6519 11:09:02.693930 <46>[ 11.849734] systemd-journald[199]: Received client request to flush runtime journal.
6520 11:09:02.708663 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6521 11:09:02.732645 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6522 11:09:02.753435 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6523 11:09:02.775058 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6524 11:09:02.797881 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6525 11:09:02.845376 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6526 11:09:02.875159 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6527 11:09:02.897284 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6528 11:09:02.920173 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6529 11:09:02.964396 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6530 11:09:02.990204 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6531 11:09:03.014042 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6532 11:09:03.040178 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6533 11:09:03.059085 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6534 11:09:03.076129 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6535 11:09:03.104570 [[0;32m OK [0m] Finished [0;1;39msystemd-up<6>[ 12.259737] r8152 1-1.1.1:1.0 enx88541f0f729c: renamed from eth1
6536 11:09:03.108094 date-ut…cord System Boot/Shutdown in UTMP.
6537 11:09:03.133671 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6538 11:09:03.148623 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6539 11:09:03.323213 <6>[ 12.475393] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6540 11:09:03.333474 <3>[ 12.483730] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6541 11:09:03.340186 <6>[ 12.491383] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6542 11:09:03.347355 <3>[ 12.496273] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6543 11:09:03.353423 <3>[ 12.501602] mtk-scp 10500000.scp: invalid resource
6544 11:09:03.360095 <6>[ 12.501663] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6545 11:09:03.367466 <6>[ 12.506861] remoteproc remoteproc0: scp is available
6546 11:09:03.376563 <3>[ 12.511200] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6547 11:09:03.383375 <4>[ 12.516378] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6548 11:09:03.393341 <4>[ 12.520641] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6549 11:09:03.403218 <3>[ 12.523980] elan_i2c 2-0015: Error applying setting, reverse things back
6550 11:09:03.406666 <6>[ 12.529008] remoteproc remoteproc0: powering up scp
6551 11:09:03.419852 <6>[ 12.540832] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6552 11:09:03.426604 <4>[ 12.548450] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6553 11:09:03.439911 <6>[ 12.571775] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6554 11:09:03.443255 <3>[ 12.572208] remoteproc remoteproc0: request_firmware failed: -2
6555 11:09:03.455283 <4>[ 12.593470] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6556 11:09:03.458712 <6>[ 12.609079] mc: Linux media interface: v0.10
6557 11:09:03.464884 <4>[ 12.610844] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6558 11:09:03.476070 <3>[ 12.621144] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6559 11:09:03.497946 <3>[ 12.648411] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6560 11:09:03.507572 <3>[ 12.650848] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6561 11:09:03.552726 <3>[ 12.708121] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6562 11:09:03.569526 <3>[ 12.721911] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6563 11:09:03.585573 <3>[ 12.740366] debugfs: File 'Playback' in directory 'dapm' already present!
6564 11:09:03.594759 <3>[ 12.750088] debugfs: File 'Capture' in directory 'dapm' already present!
6565 11:09:03.605559 <3>[ 12.760729] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6566 11:09:03.612035 <6>[ 12.765175] videodev: Linux video capture interface: v2.00
6567 11:09:03.618658 <3>[ 12.769284] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6568 11:09:03.629233 <3>[ 12.769294] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6569 11:09:03.640982 <3>[ 12.796518] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6570 11:09:03.651086 <3>[ 12.805999] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6571 11:09:03.667873 <3>[ 12.823388] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6572 11:09:03.697374 <6>[ 12.852640] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6573 11:09:03.762385 <6>[ 12.917571] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6574 11:09:03.808683 <6>[ 12.960477] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6575 11:09:03.837379 <3>[ 12.995988] thermal_sys: Failed to find 'trips' node
6576 11:09:03.850642 <3>[ 13.006093] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6577 11:09:03.863591 <3>[ 13.019194] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6578 11:09:03.882967 <4>[ 13.038686] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6579 11:09:03.923311 <3>[ 13.081888] thermal_sys: Failed to find 'trips' node
6580 11:09:03.935946 <3>[ 13.091735] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6581 11:09:03.948292 <3>[ 13.103575] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6582 11:09:03.960849 <4>[ 13.116565] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6583 11:09:03.976978 <6>[ 13.135272] Bluetooth: Core ver 2.22
6584 11:09:03.985936 <6>[ 13.144644] NET: Registered PF_BLUETOOTH protocol family
6585 11:09:03.996466 <6>[ 13.155391] Bluetooth: HCI device and connection manager initialized
6586 11:09:04.010881 <6>[ 13.164918] cs_system_cfg: CoreSight Configuration manager initialised
6587 11:09:04.019585 <6>[ 13.166388] Bluetooth: HCI socket layer initialized
6588 11:09:04.026115 <6>[ 13.166402] Bluetooth: L2CAP socket layer initialized
6589 11:09:04.034952 <6>[ 13.166438] Bluetooth: SCO socket layer initialized
6590 11:09:04.088802 <6>[ 13.247452] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6591 11:09:04.143747 <4>[ 13.298974] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6592 11:09:04.150264 <4>[ 13.298974] Fallback method does not support PEC.
6593 11:09:04.170541 <3>[ 13.325827] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6594 11:09:04.183890 <6>[ 13.339132] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6595 11:09:04.203276 <3>[ 13.358782] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6596 11:09:04.210352 <6>[ 13.359025] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6597 11:09:04.236550 <6>[ 13.372780] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video2
6598 11:09:04.248755 <5>[ 13.392289] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6599 11:09:04.266932 <6>[ 13.419056] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6600 11:09:04.281985 <6>[ 13.437562] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6601 11:09:04.288488 <5>[ 13.445080] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6602 11:09:04.302378 <6>[ 13.455043] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6603 11:09:04.308973 <5>[ 13.459191] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6604 11:09:04.319084 <6>[ 13.471607] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6605 11:09:04.328550 <4>[ 13.475379] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6606 11:09:04.352936 <6>[ 13.511760] cfg80211: failed to load regulatory.db
6607 11:09:04.356465 <6>[ 13.512946] Bluetooth: HCI UART driver ver 2.3
6608 11:09:04.372258 <6>[ 13.530811] Bluetooth: HCI UART protocol H4 registered
6609 11:09:04.386191 <6>[ 13.544756] Bluetooth: HCI UART protocol LL registered
6610 11:09:04.410089 <6>[ 13.568557] Bluetooth: HCI UART protocol Three-wire (H5) registered
6611 11:09:04.421359 <6>[ 13.580208] usbcore: registered new interface driver uvcvideo
6612 11:09:04.431035 <6>[ 13.581290] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6613 11:09:04.457476 <6>[ 13.612702] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6614 11:09:04.469900 <6>[ 13.628617] Bluetooth: HCI UART protocol Broadcom registered
6615 11:09:04.510510 <6>[ 13.666050] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6616 11:09:04.513973 <6>[ 13.667721] Bluetooth: hci0: setting up ROME/QCA6390
6617 11:09:04.532001 <6>[ 13.687670] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6618 11:09:04.549342 <6>[ 13.704865] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6619 11:09:04.555950 <6>[ 13.707594] Bluetooth: HCI UART protocol QCA registered
6620 11:09:04.571472 <6>[ 13.727203] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6621 11:09:04.602063 <3>[ 13.757919] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6622 11:09:04.638740 <6>[ 13.797854] Bluetooth: HCI UART protocol Marvell registered
6623 11:09:04.657247 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6624 11:09:04.663971 <3>[ 13.818549] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6625 11:09:04.695420 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Se<46>[ 13.836547] systemd-journald[199]: Data hash table of /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal has a fill level at 75.0 (1536 of 2047 items, 524288 file size, 341 bytes per hash table item), suggesting rotation.
6626 11:09:04.695533 t.
6627 11:09:04.714611 <46>[ 13.862440] systemd-journald[199]: /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal: Journal header limits reached or header out-of-date, rotating.
6628 11:09:04.721072 <3>[ 13.872166] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6629 11:09:04.743551 <3>[ 13.898921] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6630 11:09:04.747442 <3>[ 13.903756] Bluetooth: hci0: Frame reassembly failed (-84)
6631 11:09:04.759871 <3>[ 13.913777] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6632 11:09:04.779818 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0..<3>[ 13.934161] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6633 11:09:04.779979 .
6634 11:09:04.797094 <3>[ 13.952320] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6635 11:09:04.810974 [[0;32m OK [0m] Finished [0<6>[ 13.965565] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6636 11:09:04.824382 ;1;39msystemd-backlight…tness <6>[ 13.977988] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6637 11:09:04.827796 of backlight:backlight_lcd0.
6638 11:09:04.838218 <6>[ 13.989579] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6639 11:09:04.860822 <3>[ 14.015960] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6640 11:09:04.882061 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6641 11:09:04.897536 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6642 11:09:04.920819 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6643 11:09:04.945351 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6644 11:09:04.969303 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6645 11:09:04.989683 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6646 11:09:04.996249 <6>[ 14.152693] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6647 11:09:05.012440 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6648 11:09:05.035344 [[0;32m OK [<6>[ 14.191147] Bluetooth: hci0: QCA Product ID :0x00000008
6649 11:09:05.042247 0m] Reached target [0;1;39msock<6>[ 14.200258] Bluetooth: hci0: QCA SOC Version :0x00000044
6650 11:09:05.045304 ets.target[0m - Socket Units.
6651 11:09:05.051997 <6>[ 14.209259] Bluetooth: hci0: QCA ROM Version :0x00000302
6652 11:09:05.059231 <6>[ 14.217945] Bluetooth: hci0: QCA Patch Version:0x00000111
6653 11:09:05.071723 [[0;32m OK [<6>[ 14.227192] Bluetooth: hci0: QCA controller version 0x00440302
6654 11:09:05.081604 0m] Listening on [0;1;39msystem<6>[ 14.236919] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6655 11:09:05.091303 d-rfkil…l Switch Status /dev/r<4>[ 14.246258] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6656 11:09:05.094831 fkill Watch.
6657 11:09:05.101244 <3>[ 14.258062] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6658 11:09:05.109573 <3>[ 14.268145] Bluetooth: hci0: QCA Failed to download patch (-2)
6659 11:09:05.120822 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6660 11:09:05.172393 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6661 11:09:05.199923 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6662 11:09:05.223606 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6663 11:09:05.240959 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6664 11:09:05.281573 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6665 11:09:05.342638 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6666 11:09:05.365658 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6667 11:09:05.388683 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6668 11:09:05.434373 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6669 11:09:05.457397 [[0;32m OK [<6>[ 14.610585] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6670 11:09:05.464333 0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6671 11:09:05.483183 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6672 11:09:05.504945 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6673 11:09:05.524581 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6674 11:09:05.542283 <4>[ 14.697891] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6675 11:09:05.567515 <4>[ 14.722937] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6676 11:09:05.586216 Startin<4>[ 14.742119] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6677 11:09:05.598823 g [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP..<4>[ 14.756193] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6678 11:09:05.598913 .
6679 11:09:05.634440 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6680 11:09:05.696063
6681 11:09:05.699589 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6682 11:09:05.699692
6683 11:09:05.702260 debian-bookworm-arm64 login: root (automatic login)
6684 11:09:05.702348
6685 11:09:05.727130 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Wed Jul 10 10:43:20 UTC 2024 aarch64
6686 11:09:05.727253
6687 11:09:05.733422 The programs included with the Debian GNU/Linux system are free software;
6688 11:09:05.740755 the exact distribution terms for each program are described in the
6689 11:09:05.743662 individual files in /usr/share/doc/*/copyright.
6690 11:09:05.743740
6691 11:09:05.750354 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6692 11:09:05.753041 permitted by applicable law.
6693 11:09:05.753426 Matched prompt #10: / #
6695 11:09:05.753609 Setting prompt string to ['/ #']
6696 11:09:05.753695 end: 2.2.5.1 login-action (duration 00:00:15) [common]
6698 11:09:05.753868 end: 2.2.5 auto-login-action (duration 00:00:16) [common]
6699 11:09:05.753948 start: 2.2.6 expect-shell-connection (timeout 00:03:29) [common]
6700 11:09:05.754006 Setting prompt string to ['/ #']
6701 11:09:05.754060 Forcing a shell prompt, looking for ['/ #']
6702 11:09:05.754113 Sending line: ''
6704 11:09:05.804471 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6705 11:09:05.804546 Waiting using forced prompt support (timeout 00:02:30)
6706 11:09:05.809744 / #
6707 11:09:05.810019 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6708 11:09:05.810115 start: 2.2.7 export-device-env (timeout 00:03:29) [common]
6709 11:09:05.810206 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6710 11:09:05.810288 end: 2.2 depthcharge-retry (duration 00:01:31) [common]
6711 11:09:05.810370 end: 2 depthcharge-action (duration 00:01:31) [common]
6712 11:09:05.810447 start: 3 lava-test-retry (timeout 00:08:04) [common]
6713 11:09:05.810524 start: 3.1 lava-test-shell (timeout 00:08:04) [common]
6714 11:09:05.810592 Using namespace: common
6715 11:09:05.810655 Sending line: '#'
6717 11:09:05.911265 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6718 11:09:05.916563 / # #
6719 11:09:05.916953 Using /lava-14786808
6720 11:09:05.917209 Sending line: 'export SHELL=/bin/sh'
6722 11:09:06.023430 / # export SHELL=/bin/sh
6723 11:09:06.023680 Sending line: '. /lava-14786808/environment'
6725 11:09:06.129868 / # . /lava-14786808/environment
6726 11:09:06.130456 Sending line: '/lava-14786808/bin/lava-test-runner /lava-14786808/0'
6728 11:09:06.231494 Test shell timeout: 10s (minimum of the action and connection timeout)
6729 11:09:06.237212 / # /lava-14786808/bin/lava-test-runner /lava-14786808/0
6730 11:09:06.266102 + export TESTRUN_ID=0_igt-gpu-panf<8>[ 15.423163] <LAVA_SIGNAL_STARTRUN 0_igt-gpu-panfrost 14786808_1.5.2.3.1>
6731 11:09:06.266719 Received signal: <STARTRUN> 0_igt-gpu-panfrost 14786808_1.5.2.3.1
6732 11:09:06.267067 Starting test lava.0_igt-gpu-panfrost (14786808_1.5.2.3.1)
6733 11:09:06.267507 Skipping test definition patterns.
6734 11:09:06.269264 rost
6735 11:09:06.274143 + cd /lava-14786808/0/tests/0_igt-gpu-panfrost
6736 11:09:06.274514 + cat uuid
6737 11:09:06.276158 + UUID=14786808_1.5.2.3.1
6738 11:09:06.276552 + set +x
6739 11:09:06.285551 + IGT_FORCE_DRIVER=panfrost /usr/bin/igt-parser.sh panfrost_gem_new panfrost_get_param panfrost_prime panfrost_submit
6740 11:09:06.294332 <8>[ 15.453006] <LAVA_SIGNAL_TESTSET START panfrost_gem_new>
6741 11:09:06.294962 Received signal: <TESTSET> START panfrost_gem_new
6742 11:09:06.295366 Starting test_set panfrost_gem_new
6743 11:09:06.316548 <6>[ 15.475123] Console: switching to colour dummy device 80x25
6744 11:09:06.323549 <14>[ 15.481332] [IGT] panfrost_gem_new: executing
6745 11:09:06.329670 IGT-Version: 1.2<14>[ 15.486404] [IGT] panfrost_gem_new: starting subtest gem-new-4096
6746 11:09:06.339749 8-ga44ebfe (aarc<14>[ 15.494417] [IGT] panfrost_gem_new: finished subtest gem-new-4096, SUCCESS
6747 11:09:06.346362 h64) (Linux: 6.1<14>[ 15.503166] [IGT] panfrost_gem_new: exiting, ret=0
6748 11:09:06.346759 .96-cip24 aarch64)
6749 11:09:06.353377 Using IGT_SRANDOM=1720609746 for randomisation
6750 11:09:06.353771 Opened device: /dev/dri/card0
6751 11:09:06.356686 Starting subtest: gem-new-4096
6752 11:09:06.363356 [1mSubtest gem-new-4096: SUCCESS (0.000s)[0m
6753 11:09:06.387055 <6>[ 15.529034] Console: switching to colour frame buffer device 170x48
6754 11:09:06.404171 <8>[ 15.559356] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-4096 RESULT=pass>
6755 11:09:06.404828 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-4096 RESULT=pass
6757 11:09:06.425304 <6>[ 15.583686] Console: switching to colour dummy device 80x25
6758 11:09:06.432214 <14>[ 15.589696] [IGT] panfrost_gem_new: executing
6759 11:09:06.438752 IGT-Version: 1.2<14>[ 15.594737] [IGT] panfrost_gem_new: starting subtest gem-new-0
6760 11:09:06.448436 8-ga44ebfe (aarc<14>[ 15.602403] [IGT] panfrost_gem_new: finished subtest gem-new-0, SUCCESS
6761 11:09:06.454842 h64) (Linux: 6.1<14>[ 15.611016] [IGT] panfrost_gem_new: exiting, ret=0
6762 11:09:06.455349 .96-cip24 aarch64)
6763 11:09:06.458379 Using IGT_SRANDOM=1720609746 for randomisation
6764 11:09:06.461718 Opened device: /dev/dri/card0
6765 11:09:06.465004 Starting subtest: gem-new-0
6766 11:09:06.468592 [1mSubtest gem-new-0: SUCCESS (0.000s)[0m
6767 11:09:06.503993 <6>[ 15.645364] Console: switching to colour frame buffer device 170x48
6768 11:09:06.518777 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-0 RESULT=pass
6770 11:09:06.521278 <8>[ 15.676646] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-0 RESULT=pass>
6771 11:09:06.541550 <6>[ 15.699819] Console: switching to colour dummy device 80x25
6772 11:09:06.548190 <14>[ 15.705757] [IGT] panfrost_gem_new: executing
6773 11:09:06.554506 IGT-Version: 1.2<14>[ 15.710863] [IGT] panfrost_gem_new: starting subtest gem-new-zeroed
6774 11:09:06.564729 8-ga44ebfe (aarc<14>[ 15.719938] [IGT] panfrost_gem_new: finished subtest gem-new-zeroed, SUCCESS
6775 11:09:06.571283 h64) (Linux: 6.1<14>[ 15.727933] [IGT] panfrost_gem_new: exiting, ret=0
6776 11:09:06.571737 .96-cip24 aarch64)
6777 11:09:06.578160 Using IGT_SRANDOM=1720609746 for randomisation
6778 11:09:06.581089 Opened device: /dev/dri/card0
6779 11:09:06.581540 Starting subtest: gem-new-zeroed
6780 11:09:06.587934 [1mSubtest gem-new-zeroed: SUCCESS (0.001s)[0m
6781 11:09:06.620039 <6>[ 15.761836] Console: switching to colour frame buffer device 170x48
6782 11:09:06.637941 <8>[ 15.793102] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-zeroed RESULT=pass>
6783 11:09:06.638737 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-zeroed RESULT=pass
6785 11:09:06.644998 <8>[ 15.803602] <LAVA_SIGNAL_TESTSET STOP>
6786 11:09:06.645732 Received signal: <TESTSET> STOP
6787 11:09:06.646067 Closing test_set panfrost_gem_new
6788 11:09:06.680916 <8>[ 15.839422] <LAVA_SIGNAL_TESTSET START panfrost_get_param>
6789 11:09:06.681674 Received signal: <TESTSET> START panfrost_get_param
6790 11:09:06.682032 Starting test_set panfrost_get_param
6791 11:09:06.714864 <6>[ 15.873154] Console: switching to colour dummy device 80x25
6792 11:09:06.721407 <14>[ 15.879121] [IGT] panfrost_get_param: executing
6793 11:09:06.727885 IGT-Version: 1.2<14>[ 15.884865] [IGT] panfrost_get_param: starting subtest base-params
6794 11:09:06.738266 8-ga44ebfe (aarc<14>[ 15.892680] [IGT] panfrost_get_param: finished subtest base-params, SUCCESS
6795 11:09:06.744617 h64) (Linux: 6.1<14>[ 15.901502] [IGT] panfrost_get_param: exiting, ret=0
6796 11:09:06.745001 .96-cip24 aarch64)
6797 11:09:06.751474 Using IGT_SRANDOM=1720609746 for randomisation
6798 11:09:06.754899 Opened device: /dev/dri/card0
6799 11:09:06.755283 Starting subtest: base-params
6800 11:09:06.760895 [1mSubtest base-params: SUCCESS (0.000s)[0m
6801 11:09:06.786859 <6>[ 15.928809] Console: switching to colour frame buffer device 170x48
6802 11:09:06.803961 <8>[ 15.958946] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=base-params RESULT=pass>
6803 11:09:06.804614 Received signal: <TESTCASE> TEST_CASE_ID=base-params RESULT=pass
6805 11:09:06.824231 <6>[ 15.982315] Console: switching to colour dummy device 80x25
6806 11:09:06.830467 <14>[ 15.988259] [IGT] panfrost_get_param: executing
6807 11:09:06.837275 IGT-Version: 1.2<14>[ 15.993480] [IGT] panfrost_get_param: starting subtest get-bad-param
6808 11:09:06.846939 <14>[ 16.001523] [IGT] panfrost_get_param: finished subtest get-bad-param, SUCCESS
6809 11:09:06.853667 8-ga44ebfe (aarc<14>[ 16.009557] [IGT] panfrost_get_param: exiting, ret=0
6810 11:09:06.857141 h64) (Linux: 6.1.96-cip24 aarch64)
6811 11:09:06.860729 Using IGT_SRANDOM=1720609746 for randomisation
6812 11:09:06.863936 Opened device: /dev/dri/card0
6813 11:09:06.866976 Starting subtest: get-bad-param
6814 11:09:06.870447 [1mSubtest get-bad-param: SUCCESS (0.000s)[0m
6815 11:09:06.902862 <6>[ 16.044487] Console: switching to colour frame buffer device 170x48
6816 11:09:06.920833 <8>[ 16.075954] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-param RESULT=pass>
6817 11:09:06.921518 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-param RESULT=pass
6819 11:09:06.941406 <6>[ 16.099507] Console: switching to colour dummy device 80x25
6820 11:09:06.947977 <14>[ 16.105449] [IGT] panfrost_get_param: executing
6821 11:09:06.954519 IGT-Version: 1.2<14>[ 16.110850] [IGT] panfrost_get_param: starting subtest get-bad-padding
6822 11:09:06.964543 8-ga44ebfe (aarc<14>[ 16.119106] [IGT] panfrost_get_param: finished subtest get-bad-padding, SUCCESS
6823 11:09:06.970778 h64) (Linux: 6.1<14>[ 16.128515] [IGT] panfrost_get_param: exiting, ret=0
6824 11:09:06.974183 .96-cip24 aarch64)
6825 11:09:06.977754 Using IGT_SRANDOM=1720609747 for randomisation
6826 11:09:06.981442 Opened device: /dev/dri/card0
6827 11:09:06.984161 Starting subtest: get-bad-padding
6828 11:09:06.987360 [1mSubtest get-bad-padding: SUCCESS (0.000s)[0m
6829 11:09:07.019297 <6>[ 16.161071] Console: switching to colour frame buffer device 170x48
6830 11:09:07.037102 <8>[ 16.191907] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-padding RESULT=pass>
6831 11:09:07.037772 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-padding RESULT=pass
6833 11:09:07.043491 <8>[ 16.201596] <LAVA_SIGNAL_TESTSET STOP>
6834 11:09:07.044108 Received signal: <TESTSET> STOP
6835 11:09:07.044428 Closing test_set panfrost_get_param
6836 11:09:07.082724 <8>[ 16.240976] <LAVA_SIGNAL_TESTSET START panfrost_prime>
6837 11:09:07.083334 Received signal: <TESTSET> START panfrost_prime
6838 11:09:07.083649 Starting test_set panfrost_prime
6839 11:09:07.106359 <6>[ 16.264845] Console: switching to colour dummy device 80x25
6840 11:09:07.113063 <14>[ 16.270805] [IGT] panfrost_prime: executing
6841 11:09:07.119981 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.96-cip24 aarch64)
6842 11:09:07.123038 Using IGT_SRANDOM=1720609747 for randomisation
6843 11:09:07.125912 Opened device: /dev/dri/card0
6844 11:09:07.150321 <14>[ 16.308805] [IGT] panfrost_prime: starting subtest gem-prime-import
6845 11:09:07.153724 Starting subtest: gem-prime-import
6846 11:09:07.170574 (panfrost_prime:353) CRITICAL: Test assertion failure function igt_has_dumb,<14>[ 16.324275] [IGT] panfrost_prime: finished subtest gem-prime-import, FAIL
6847 11:09:07.176889 file ../tests/p<14>[ 16.333382] [IGT] panfrost_prime: exiting, ret=98
6848 11:09:07.177311 anfrost_prime.c:44:
6849 11:09:07.187323 (panfrost_prime:353) CRITICAL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP
6850 11:09:07.193512 (panfrost_prime:353) CRITICAL: Last errno: 9, Bad file descriptor
6851 11:09:07.194011 Stack trace:
6852 11:09:07.197037 #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6853 11:09:07.200264 #1 [<unknown>+0xbe711358]
6854 11:09:07.203608 #2 [<unknown>+0xbe710f2c]
6855 11:09:07.207127 #3 [__libc_init_first+0x80]
6856 11:09:07.210449 #4 [__libc_start_main+0x98]
6857 11:09:07.210830 #5 [<unknown>+0xbe710f70]
6858 11:09:07.213186 Subtest gem-prime-import failed.
6859 11:09:07.216743 **** DEBUG ****
6860 11:09:07.223505 (panfrost_prime:353) CRITICA<6>[ 16.364336] Console: switching to colour frame buffer device 170x48
6861 11:09:07.233476 L: Test assertion failure function igt_has_dumb, file ../tests/panfrost_prime.c:44:
6862 11:09:07.243017 (panfrost_prime:353) CRITIC<8>[ 16.397054] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-prime-import RESULT=fail>
6863 11:09:07.243646 Received signal: <TESTCASE> TEST_CASE_ID=gem-prime-import RESULT=fail
6865 11:09:07.249928 AL: Failed assertion: ret == 0 || errno == EINVA<8>[ 16.408164] <LAVA_SIGNAL_TESTSET STOP>
6866 11:09:07.250715 Received signal: <TESTSET> STOP
6867 11:09:07.251183 Closing test_set panfrost_prime
6868 11:09:07.253368 L || errno == EOPNOTSUPP
6869 11:09:07.256601 (panfrost_prime:353) CRITICAL: Last errno: 9, Bad file descriptor
6870 11:09:07.263349 (panfrost_prime:353) igt_core-INFO: Stack trace:
6871 11:09:07.276749 (panfrost_prime:353) igt_core-INFO: #0 ../lib/igt_core.c:1989 __igt_fail_assert<8>[ 16.432953] <LAVA_SIGNAL_TESTSET START panfrost_submit>
6872 11:09:07.277207 ()
6873 11:09:07.277939 Received signal: <TESTSET> START panfrost_submit
6874 11:09:07.278432 Starting test_set panfrost_submit
6875 11:09:07.282701 (panfrost_prime:353) igt_core-INFO: #1 [<unknown>+0xbe711358]
6876 11:09:07.286225 (panfrost_prime:353) igt_core-INFO: #2 [<unknown>+0xbe710f2c]
6877 11:09:07.292652 (panfrost_prime:353) igt_core-INFO: #3 [__libc_init_first+0x80]
6878 11:09:07.299563 (panfrost_prime:353) ig<6>[ 16.456877] Console: switching to colour dummy device 80x25
6879 11:09:07.306011 t_core-INFO: #<14>[ 16.464577] [IGT] panfrost_submit: executing
6880 11:09:07.315859 4 [__libc_start_<14>[ 16.470751] [IGT] panfrost_submit: starting subtest pan-submit
6881 11:09:07.316252 main+0x98]
6882 11:09:07.326165 (panfrost_prime:353)<14>[ 16.479256] [IGT] panfrost_submit: finished subtest pan-submit, SUCCESS
6883 11:09:07.332552 igt_core-INFO: <14>[ 16.487895] [IGT] panfrost_submit: exiting, ret=0
6884 11:09:07.332941 #5 [<unknown>+0xbe710f70]
6885 11:09:07.335421 **** END ****
6886 11:09:07.339336 [1mSubtest gem-prime-import: FAIL (0.009s)[0m
6887 11:09:07.348960 (panfrost_prime:353) drmtest-WARNING: Don't attempt to close standard/invalid file descriptor: -1
6888 11:09:07.355907 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.96-cip24 aarch64)
6889 11:09:07.358882 Using IGT_SRANDOM=1720609747 for randomisation
6890 11:09:07.362222 Opened device: /dev/dri/card0
6891 11:09:07.365854 Starting subtest: pan-submit
6892 11:09:07.369685 [1mSubtest pan-submit: SUCCESS (0.001s)[0m
6893 11:09:07.384849 <6>[ 16.526675] Console: switching to colour frame buffer device 170x48
6894 11:09:07.398380 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit RESULT=pass
6896 11:09:07.401587 <8>[ 16.556606] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit RESULT=pass>
6897 11:09:07.422150 <6>[ 16.580427] Console: switching to colour dummy device 80x25
6898 11:09:07.428484 <14>[ 16.586435] [IGT] panfrost_submit: executing
6899 11:09:07.435422 IGT-Version: 1.2<14>[ 16.591513] [IGT] panfrost_submit: starting subtest pan-submit-error-no-jc
6900 11:09:07.445186 <14>[ 16.600079] [IGT] panfrost_submit: finished subtest pan-submit-error-no-jc, SUCCESS
6901 11:09:07.452193 8-ga44ebfe (aarc<14>[ 16.608508] [IGT] panfrost_submit: exiting, ret=0
6902 11:09:07.455478 h64) (Linux: 6.1.96-cip24 aarch64)
6903 11:09:07.458811 Using IGT_SRANDOM=1720609747 for randomisation
6904 11:09:07.461744 Opened device: /dev/dri/card0
6905 11:09:07.465838 Starting subtest: pan-submit-error-no-jc
6906 11:09:07.471873 [1mSubtest pan-submit-error-no-jc: SUCCESS (0.000s)[0m
6907 11:09:07.501329 <6>[ 16.642715] Console: switching to colour frame buffer device 170x48
6908 11:09:07.517894 <8>[ 16.673254] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass>
6909 11:09:07.518521 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass
6911 11:09:07.540094 <6>[ 16.698699] Console: switching to colour dummy device 80x25
6912 11:09:07.547042 <14>[ 16.704664] [IGT] panfrost_submit: executing
6913 11:09:07.556847 IGT-Version: 1.2<14>[ 16.709648] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-in-syncs
6914 11:09:07.567044 8-ga44ebfe (aarc<14>[ 16.719016] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-in-syncs, SUCCESS
6915 11:09:07.573269 h64) (Linux: 6.1<14>[ 16.729276] [IGT] panfrost_submit: exiting, ret=0
6916 11:09:07.573654 .96-cip24 aarch64)
6917 11:09:07.576791 Using IGT_SRANDOM=1720609747 for randomisation
6918 11:09:07.579950 Opened device: /dev/dri/card0
6919 11:09:07.586955 Starting subtest: pan-submit-error-bad-in-syncs
6920 11:09:07.590261 [1mSubtest pan-submit-error-bad-in-syncs: SUCCESS (0.000s)[0m
6921 11:09:07.617632 <6>[ 16.759075] Console: switching to colour frame buffer device 170x48
6922 11:09:07.635556 <8>[ 16.790898] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass>
6923 11:09:07.636054 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass
6925 11:09:07.659333 <6>[ 16.817887] Console: switching to colour dummy device 80x25
6926 11:09:07.665849 <14>[ 16.824321] [IGT] panfrost_submit: executing
6927 11:09:07.675914 IGT-Version: 1.2<14>[ 16.829496] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-bo-handles
6928 11:09:07.685782 8-ga44ebfe (aarc<14>[ 16.839365] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-bo-handles, SUCCESS
6929 11:09:07.692882 h64) (Linux: 6.1<14>[ 16.849654] [IGT] panfrost_submit: exiting, ret=0
6930 11:09:07.692958 .96-cip24 aarch64)
6931 11:09:07.699020 Using IGT_SRANDOM=1720609747 for randomisation
6932 11:09:07.699120 Opened device: /dev/dri/card0
6933 11:09:07.705528 Starting subtest: pan-submit-error-bad-bo-handles
6934 11:09:07.712287 [1mSubtest pan-submit-error-bad-bo-handles: SUCCESS (0.000s)[0m
6935 11:09:07.733443 <6>[ 16.875611] Console: switching to colour frame buffer device 170x48
6936 11:09:07.752459 <8>[ 16.907681] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass>
6937 11:09:07.752814 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass
6939 11:09:07.776171 <6>[ 16.934653] Console: switching to colour dummy device 80x25
6940 11:09:07.782971 <14>[ 16.940707] [IGT] panfrost_submit: executing
6941 11:09:07.793102 IGT-Version: 1.2<14>[ 16.945654] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-requirements
6942 11:09:07.803003 8-ga44ebfe (aarc<14>[ 16.955416] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-requirements, SUCCESS
6943 11:09:07.809514 h64) (Linux: 6.1<14>[ 16.965860] [IGT] panfrost_submit: exiting, ret=0
6944 11:09:07.809905 .96-cip24 aarch64)
6945 11:09:07.816364 Using IGT_SRANDOM=1720609747 for randomisation
6946 11:09:07.816817 Opened device: /dev/dri/card0
6947 11:09:07.822837 Starting subtest: pan-submit-error-bad-requirements
6948 11:09:07.829080 [1mSubtest pan-submit-error-bad-requirements: SUCCESS (0.000s)[0m
6949 11:09:07.850120 <6>[ 16.991642] Console: switching to colour frame buffer device 170x48
6950 11:09:07.868397 <8>[ 17.023579] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass>
6951 11:09:07.869052 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass
6953 11:09:07.891438 <6>[ 17.049818] Console: switching to colour dummy device 80x25
6954 11:09:07.898515 <14>[ 17.055986] [IGT] panfrost_submit: executing
6955 11:09:07.907845 IGT-Version: 1.2<14>[ 17.060937] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-out-sync
6956 11:09:07.918044 8-ga44ebfe (aarc<14>[ 17.070323] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-out-sync, SUCCESS
6957 11:09:07.924689 h64) (Linux: 6.1<14>[ 17.080518] [IGT] panfrost_submit: exiting, ret=0
6958 11:09:07.925079 .96-cip24 aarch64)
6959 11:09:07.930928 Using IGT_SRANDOM=1720609748 for randomisation
6960 11:09:07.931314 Opened device: /dev/dri/card0
6961 11:09:07.938405 Starting subtest: pan-submit-error-bad-out-sync
6962 11:09:07.944356 [1mSubtest pan-submit-error-bad-out-sync: SUCCESS (0.000s)[0m
6963 11:09:07.966999 <6>[ 17.108263] Console: switching to colour frame buffer device 170x48
6964 11:09:07.983701 <8>[ 17.138902] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass>
6965 11:09:07.984328 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass
6967 11:09:08.008128 <6>[ 17.166270] Console: switching to colour dummy device 80x25
6968 11:09:08.014486 <14>[ 17.172538] [IGT] panfrost_submit: executing
6969 11:09:08.021109 IGT-Version: 1.2<14>[ 17.177704] [IGT] panfrost_submit: starting subtest pan-reset
6970 11:09:08.027845 8-ga44ebfe (aarch64) (Linux: 6.1.96-cip24 aarch64)
6971 11:09:08.031343 Using IGT_SRANDOM=1720609748 for randomisation
6972 11:09:08.034607 Opened device: /dev/dri/card0
6973 11:09:08.037579 Starting subtest: pan-reset
6974 11:09:08.569944 <3>[ 17.718351] panfrost 13040000.gpu: gpu sched timeout, js=1, config=0x7300, status=0x8, head=0x2000000, tail=0x2000040, sched_job=0000000059dc830d
6975 11:09:08.579739 [1mSubtest pan-<14>[ 17.733329] [IGT] panfrost_submit: finished subtest pan-reset, SUCCESS
6976 11:09:08.583640 reset: SUCCESS (<14>[ 17.741701] [IGT] panfrost_submit: exiting, ret=0
6977 11:09:08.586334 0.548s)[0m
6978 11:09:08.637193 <6>[ 17.778463] Console: switching to colour frame buffer device 170x48
6979 11:09:08.652784 Received signal: <TESTCASE> TEST_CASE_ID=pan-reset RESULT=pass
6981 11:09:08.655392 <8>[ 17.810782] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-reset RESULT=pass>
6982 11:09:08.676352 <6>[ 17.834443] Console: switching to colour dummy device 80x25
6983 11:09:08.682669 <14>[ 17.840617] [IGT] panfrost_submit: executing
6984 11:09:08.689535 IGT-Version: 1.2<14>[ 17.845592] [IGT] panfrost_submit: starting subtest pan-submit-and-close
6985 11:09:08.699251 8-ga44ebfe (aarc<14>[ 17.854527] [IGT] panfrost_submit: finished subtest pan-submit-and-close, SUCCESS
6986 11:09:08.706253 h64) (Linux: 6.1<14>[ 17.863313] [IGT] panfrost_submit: exiting, ret=0
6987 11:09:08.709341 .96-cip24 aarch64)
6988 11:09:08.712792 Using IGT_SRANDOM=1720609748 for randomisation
6989 11:09:08.715687 Opened device: /dev/dri/card0
6990 11:09:08.718930 Starting subtest: pan-submit-and-close
6991 11:09:08.722351 [1mSubtest pan-submit-and-close: SUCCESS (0.001s)[0m
6992 11:09:08.748081 <6>[ 17.889691] Console: switching to colour frame buffer device 170x48
6993 11:09:08.764084 <8>[ 17.919387] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-and-close RESULT=pass>
6994 11:09:08.764785 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-and-close RESULT=pass
6996 11:09:08.787952 <6>[ 17.946094] Console: switching to colour dummy device 80x25
6997 11:09:08.794801 <14>[ 17.952364] [IGT] panfrost_submit: executing
6998 11:09:08.801606 IGT-Version: 1.2<14>[ 17.957516] [IGT] panfrost_submit: starting subtest pan-unhandled-pagefault
6999 11:09:08.807883 8-ga44ebfe (aarch64) (Linux: 6.1.96-cip24 aarch64)
7000 11:09:08.811472 Using IGT_SRANDOM=1720609748 for randomisation
7001 11:09:08.814961 Opened device: /dev/dri/card0
7002 11:09:08.817951 Starting subtest: pan-unhandled-pagefault
7003 11:09:08.924256 (panfrost_submit:383) CRITICAL: Test assertion failure function __igt_unique____real_main65, fil<14>[ 18.079792] [IGT] panfrost_submit: finished subtest pan-unhandled-pagefault, FAIL
7004 11:09:08.930796 e ../tests/panfr<14>[ 18.088937] [IGT] panfrost_submit: exiting, ret=98
7005 11:09:08.934680 ost_submit.c:178:
7006 11:09:08.947194 (panfrost_submit:383) CRITICAL: Failed assertion: syncobj_wait(fd, &submit->args->out_sync, 1, abs_timeout(SHORT_TIME_NSEC), 0, NULL)
7007 11:09:08.947611 Stack trace:
7008 11:09:08.950350 #0 ../lib/igt_core.c:1989 __igt_fail_assert()
7009 11:09:08.953720 #1 [<unknown>+0xac371980]
7010 11:09:08.957030 #2 [<unknown>+0xac370dec]
7011 11:09:08.960391 #3 [__libc_init_first+0x80]
7012 11:09:08.964248 #4 [__libc_start_main+0x98]
7013 11:09:08.964632 #5 [<unknown>+0xac370e30]
7014 11:09:08.970795 Subtest pan-unhandled-pagefault failed.
7015 11:09:08.971178 **** DEBUG ****
7016 11:09:08.986849 (panfrost_submit:383) CRITICAL: Test assertion failure function __igt_unique____real_main65, file ../tes<6>[ 18.125547] Console: switching to colour frame buffer device 170x48
7017 11:09:08.987244 ts/panfrost_submit.c:178:
7018 11:09:09.003747 (panfrost_submit:383) CRITICAL: Failed assertion: syncobj_wait(fd, &submit->args->out<8>[ 18.158344] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-unhandled-pagefault RESULT=fail>
7019 11:09:09.004390 Received signal: <TESTCASE> TEST_CASE_ID=pan-unhandled-pagefault RESULT=fail
7021 11:09:09.010057 _sync, 1, abs_timeout(SHORT_TIME<8>[ 18.169630] <LAVA_SIGNAL_TESTSET STOP>
7022 11:09:09.010683 Received signal: <TESTSET> STOP
7023 11:09:09.011013 Closing test_set panfrost_submit
7024 11:09:09.013697 _NSEC), 0, NULL)
7025 11:09:09.020496 (panfrost_subm<8>[ 18.175393] <LAVA_SIGNAL_ENDRUN 0_igt-gpu-panfrost 14786808_1.5.2.3.1>
7026 11:09:09.021159 Received signal: <ENDRUN> 0_igt-gpu-panfrost 14786808_1.5.2.3.1
7027 11:09:09.021529 Ending use of test pattern.
7028 11:09:09.021874 Ending test lava.0_igt-gpu-panfrost (14786808_1.5.2.3.1), duration 2.75
7030 11:09:09.023574 it:383) igt_core-INFO: Stack trace:
7031 11:09:09.030824 (panfrost_submit:383) igt_core-INFO: #0 ../lib/igt_core.c:1989 __igt_fail_assert()
7032 11:09:09.036780 (panfrost_submit:383) igt_core-INFO: #1 [<unknown>+0xac371980]
7033 11:09:09.043320 (panfrost_submit:383) igt_core-INFO: #2 [<unknown>+0xac370dec]
7034 11:09:09.049912 (panfrost_submit:383) igt_core-INFO: #3 [__libc_init_first+0x80]
7035 11:09:09.057236 (panfrost_submit:383) igt_core-INFO: #4 [__libc_start_main+0x98]
7036 11:09:09.059893 (panfrost_submit:383) igt_core-INFO: #5 [<unknown>+0xac370e30]
7037 11:09:09.063249 **** END ****
7038 11:09:09.066679 [1mSubtest pan-unhandled-pagefault: FAIL (0.113s)[0m
7039 11:09:09.069703 + set +x
7040 11:09:09.070114 <LAVA_TEST_RUNNER EXIT>
7041 11:09:09.070756 ok: lava_test_shell seems to have completed
7042 11:09:09.073329 gem-new-4096:
set: panfrost_gem_new
result: pass
gem-new-0:
set: panfrost_gem_new
result: pass
gem-new-zeroed:
set: panfrost_gem_new
result: pass
base-params:
set: panfrost_get_param
result: pass
get-bad-param:
set: panfrost_get_param
result: pass
get-bad-padding:
set: panfrost_get_param
result: pass
gem-prime-import:
set: panfrost_prime
result: fail
pan-submit:
set: panfrost_submit
result: pass
pan-submit-error-no-jc:
set: panfrost_submit
result: pass
pan-submit-error-bad-in-syncs:
set: panfrost_submit
result: pass
pan-submit-error-bad-bo-handles:
set: panfrost_submit
result: pass
pan-submit-error-bad-requirements:
set: panfrost_submit
result: pass
pan-submit-error-bad-out-sync:
set: panfrost_submit
result: pass
pan-reset:
set: panfrost_submit
result: pass
pan-submit-and-close:
set: panfrost_submit
result: pass
pan-unhandled-pagefault:
set: panfrost_submit
result: fail
7043 11:09:09.074002 end: 3.1 lava-test-shell (duration 00:00:03) [common]
7044 11:09:09.074478 end: 3 lava-test-retry (duration 00:00:03) [common]
7045 11:09:09.074955 start: 4 finalize (timeout 00:08:00) [common]
7046 11:09:09.075425 start: 4.1 power-off (timeout 00:00:30) [common]
7047 11:09:09.076591 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-1', '--port=1', '--command=off']
7048 11:09:11.192301 >> Command sent successfully.
7049 11:09:11.206160 Returned 0 in 2 seconds
7050 11:09:11.206911 end: 4.1 power-off (duration 00:00:02) [common]
7052 11:09:11.208427 start: 4.2 read-feedback (timeout 00:07:58) [common]
7053 11:09:11.209310 Listened to connection for namespace 'common' for up to 1s
7055 11:09:11.210367 Listened to connection for namespace 'common' for up to 1s
7056 11:09:12.209321 Finalising connection for namespace 'common'
7057 11:09:12.209985 Disconnecting from shell: Finalise
7058 11:09:12.310950 end: 4.2 read-feedback (duration 00:00:01) [common]
7059 11:09:12.311678 end: 4 finalize (duration 00:00:03) [common]
7060 11:09:12.312358 Cleaning after the job
7061 11:09:12.312989 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786808/tftp-deploy-08hh4jwk/ramdisk
7062 11:09:12.339147 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786808/tftp-deploy-08hh4jwk/kernel
7063 11:09:12.363541 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786808/tftp-deploy-08hh4jwk/dtb
7064 11:09:12.363782 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786808/tftp-deploy-08hh4jwk/modules
7065 11:09:12.370179 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14786808
7066 11:09:12.481617 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14786808
7067 11:09:12.481774 Job finished correctly