Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 45
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 89
1 11:01:54.257786 lava-dispatcher, installed at version: 2024.05
2 11:01:54.257973 start: 0 validate
3 11:01:54.258122 Start time: 2024-07-10 11:01:54.258113+00:00 (UTC)
4 11:01:54.258284 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:01:54.258425 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 11:01:54.529246 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:01:54.530171 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 11:01:54.800845 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:01:54.801988 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 11:02:33.468623 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:02:33.469323 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 11:02:33.998231 Using caching service: 'http://localhost/cache/?uri=%s'
13 11:02:33.998977 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
14 11:02:34.275067 validate duration: 40.02
16 11:02:34.276270 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 11:02:34.276816 start: 1.1 download-retry (timeout 00:10:00) [common]
18 11:02:34.277355 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 11:02:34.278027 Not decompressing ramdisk as can be used compressed.
20 11:02:34.278538 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 11:02:34.278986 saving as /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/ramdisk/initrd.cpio.gz
22 11:02:34.279442 total size: 5628169 (5 MB)
23 11:02:38.050860 progress 0 % (0 MB)
24 11:02:38.060829 progress 5 % (0 MB)
25 11:02:38.069626 progress 10 % (0 MB)
26 11:02:38.077032 progress 15 % (0 MB)
27 11:02:38.082807 progress 20 % (1 MB)
28 11:02:38.086768 progress 25 % (1 MB)
29 11:02:38.090412 progress 30 % (1 MB)
30 11:02:38.093550 progress 35 % (1 MB)
31 11:02:38.096132 progress 40 % (2 MB)
32 11:02:38.098711 progress 45 % (2 MB)
33 11:02:38.101035 progress 50 % (2 MB)
34 11:02:38.103323 progress 55 % (2 MB)
35 11:02:38.105422 progress 60 % (3 MB)
36 11:02:38.107404 progress 65 % (3 MB)
37 11:02:38.109294 progress 70 % (3 MB)
38 11:02:38.110944 progress 75 % (4 MB)
39 11:02:38.112832 progress 80 % (4 MB)
40 11:02:38.114330 progress 85 % (4 MB)
41 11:02:38.115998 progress 90 % (4 MB)
42 11:02:38.117731 progress 95 % (5 MB)
43 11:02:38.119108 progress 100 % (5 MB)
44 11:02:38.119315 5 MB downloaded in 3.84 s (1.40 MB/s)
45 11:02:38.119455 end: 1.1.1 http-download (duration 00:00:04) [common]
47 11:02:38.119669 end: 1.1 download-retry (duration 00:00:04) [common]
48 11:02:38.119747 start: 1.2 download-retry (timeout 00:09:56) [common]
49 11:02:38.119821 start: 1.2.1 http-download (timeout 00:09:56) [common]
50 11:02:38.119951 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
51 11:02:38.120011 saving as /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/kernel/Image
52 11:02:38.120063 total size: 54813184 (52 MB)
53 11:02:38.120117 No compression specified
54 11:02:38.121109 progress 0 % (0 MB)
55 11:02:38.134844 progress 5 % (2 MB)
56 11:02:38.148495 progress 10 % (5 MB)
57 11:02:38.162264 progress 15 % (7 MB)
58 11:02:38.176408 progress 20 % (10 MB)
59 11:02:38.190489 progress 25 % (13 MB)
60 11:02:38.204280 progress 30 % (15 MB)
61 11:02:38.218242 progress 35 % (18 MB)
62 11:02:38.231988 progress 40 % (20 MB)
63 11:02:38.245559 progress 45 % (23 MB)
64 11:02:38.259350 progress 50 % (26 MB)
65 11:02:38.273286 progress 55 % (28 MB)
66 11:02:38.286942 progress 60 % (31 MB)
67 11:02:38.300859 progress 65 % (34 MB)
68 11:02:38.314831 progress 70 % (36 MB)
69 11:02:38.328767 progress 75 % (39 MB)
70 11:02:38.342602 progress 80 % (41 MB)
71 11:02:38.356182 progress 85 % (44 MB)
72 11:02:38.369948 progress 90 % (47 MB)
73 11:02:38.383665 progress 95 % (49 MB)
74 11:02:38.396891 progress 100 % (52 MB)
75 11:02:38.397113 52 MB downloaded in 0.28 s (188.68 MB/s)
76 11:02:38.397304 end: 1.2.1 http-download (duration 00:00:00) [common]
78 11:02:38.397524 end: 1.2 download-retry (duration 00:00:00) [common]
79 11:02:38.397603 start: 1.3 download-retry (timeout 00:09:56) [common]
80 11:02:38.397677 start: 1.3.1 http-download (timeout 00:09:56) [common]
81 11:02:38.397805 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 11:02:38.397865 saving as /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 11:02:38.397916 total size: 57695 (0 MB)
84 11:02:38.397968 No compression specified
85 11:02:38.399081 progress 56 % (0 MB)
86 11:02:38.399340 progress 100 % (0 MB)
87 11:02:38.399528 0 MB downloaded in 0.00 s (34.19 MB/s)
88 11:02:38.399635 end: 1.3.1 http-download (duration 00:00:00) [common]
90 11:02:38.399830 end: 1.3 download-retry (duration 00:00:00) [common]
91 11:02:38.399903 start: 1.4 download-retry (timeout 00:09:56) [common]
92 11:02:38.399975 start: 1.4.1 http-download (timeout 00:09:56) [common]
93 11:02:38.400078 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 11:02:38.400135 saving as /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/nfsrootfs/full.rootfs.tar
95 11:02:38.400187 total size: 120894716 (115 MB)
96 11:02:38.400239 Using unxz to decompress xz
97 11:02:38.401411 progress 0 % (0 MB)
98 11:02:38.744708 progress 5 % (5 MB)
99 11:02:39.089938 progress 10 % (11 MB)
100 11:02:39.438291 progress 15 % (17 MB)
101 11:02:39.761432 progress 20 % (23 MB)
102 11:02:40.065425 progress 25 % (28 MB)
103 11:02:40.407563 progress 30 % (34 MB)
104 11:02:40.728294 progress 35 % (40 MB)
105 11:02:40.898972 progress 40 % (46 MB)
106 11:02:41.083777 progress 45 % (51 MB)
107 11:02:41.384559 progress 50 % (57 MB)
108 11:02:41.739911 progress 55 % (63 MB)
109 11:02:42.074432 progress 60 % (69 MB)
110 11:02:42.413692 progress 65 % (74 MB)
111 11:02:42.756172 progress 70 % (80 MB)
112 11:02:43.111805 progress 75 % (86 MB)
113 11:02:43.457066 progress 80 % (92 MB)
114 11:02:43.813034 progress 85 % (98 MB)
115 11:02:44.171861 progress 90 % (103 MB)
116 11:02:44.515070 progress 95 % (109 MB)
117 11:02:44.889723 progress 100 % (115 MB)
118 11:02:44.895289 115 MB downloaded in 6.50 s (17.75 MB/s)
119 11:02:44.895502 end: 1.4.1 http-download (duration 00:00:06) [common]
121 11:02:44.895716 end: 1.4 download-retry (duration 00:00:06) [common]
122 11:02:44.895794 start: 1.5 download-retry (timeout 00:09:49) [common]
123 11:02:44.895868 start: 1.5.1 http-download (timeout 00:09:49) [common]
124 11:02:44.895998 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
125 11:02:44.896059 saving as /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/modules/modules.tar
126 11:02:44.896113 total size: 8607984 (8 MB)
127 11:02:44.896167 Using unxz to decompress xz
128 11:02:44.897485 progress 0 % (0 MB)
129 11:02:44.918326 progress 5 % (0 MB)
130 11:02:44.943236 progress 10 % (0 MB)
131 11:02:44.967710 progress 15 % (1 MB)
132 11:02:44.993169 progress 20 % (1 MB)
133 11:02:45.017796 progress 25 % (2 MB)
134 11:02:45.041834 progress 30 % (2 MB)
135 11:02:45.064794 progress 35 % (2 MB)
136 11:02:45.091703 progress 40 % (3 MB)
137 11:02:45.117002 progress 45 % (3 MB)
138 11:02:45.141448 progress 50 % (4 MB)
139 11:02:45.166872 progress 55 % (4 MB)
140 11:02:45.191472 progress 60 % (4 MB)
141 11:02:45.215334 progress 65 % (5 MB)
142 11:02:45.240959 progress 70 % (5 MB)
143 11:02:45.268636 progress 75 % (6 MB)
144 11:02:45.297067 progress 80 % (6 MB)
145 11:02:45.321118 progress 85 % (7 MB)
146 11:02:45.344742 progress 90 % (7 MB)
147 11:02:45.368476 progress 95 % (7 MB)
148 11:02:45.391487 progress 100 % (8 MB)
149 11:02:45.396994 8 MB downloaded in 0.50 s (16.39 MB/s)
150 11:02:45.397189 end: 1.5.1 http-download (duration 00:00:01) [common]
152 11:02:45.397408 end: 1.5 download-retry (duration 00:00:01) [common]
153 11:02:45.397487 start: 1.6 prepare-tftp-overlay (timeout 00:09:49) [common]
154 11:02:45.397564 start: 1.6.1 extract-nfsrootfs (timeout 00:09:49) [common]
155 11:02:49.696376 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14786786/extract-nfsrootfs-74nf38jf
156 11:02:49.696554 end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
157 11:02:49.696641 start: 1.6.2 lava-overlay (timeout 00:09:45) [common]
158 11:02:49.696806 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg
159 11:02:49.696919 makedir: /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin
160 11:02:49.697033 makedir: /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/tests
161 11:02:49.697124 makedir: /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/results
162 11:02:49.697249 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-add-keys
163 11:02:49.697390 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-add-sources
164 11:02:49.697520 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-background-process-start
165 11:02:49.697637 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-background-process-stop
166 11:02:49.697761 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-common-functions
167 11:02:49.697877 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-echo-ipv4
168 11:02:49.697990 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-install-packages
169 11:02:49.698110 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-installed-packages
170 11:02:49.698329 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-os-build
171 11:02:49.698501 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-probe-channel
172 11:02:49.698618 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-probe-ip
173 11:02:49.698819 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-target-ip
174 11:02:49.698954 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-target-mac
175 11:02:49.699066 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-target-storage
176 11:02:49.699192 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-test-case
177 11:02:49.699313 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-test-event
178 11:02:49.699424 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-test-feedback
179 11:02:49.699544 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-test-raise
180 11:02:49.699659 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-test-reference
181 11:02:49.699771 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-test-runner
182 11:02:49.699881 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-test-set
183 11:02:49.699989 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-test-shell
184 11:02:49.700110 Updating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-add-keys (debian)
185 11:02:49.700474 Updating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-add-sources (debian)
186 11:02:49.700824 Updating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-install-packages (debian)
187 11:02:49.701380 Updating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-installed-packages (debian)
188 11:02:49.701770 Updating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/bin/lava-os-build (debian)
189 11:02:49.702120 Creating /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/environment
190 11:02:49.702218 LAVA metadata
191 11:02:49.702286 - LAVA_JOB_ID=14786786
192 11:02:49.702351 - LAVA_DISPATCHER_IP=192.168.201.1
193 11:02:49.702455 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:45) [common]
194 11:02:49.702512 skipped lava-vland-overlay
195 11:02:49.702581 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 11:02:49.702652 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:45) [common]
197 11:02:49.702704 skipped lava-multinode-overlay
198 11:02:49.702766 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 11:02:49.702833 start: 1.6.2.3 test-definition (timeout 00:09:45) [common]
200 11:02:49.702894 Loading test definitions
201 11:02:49.702967 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:45) [common]
202 11:02:49.703023 Using /lava-14786786 at stage 0
203 11:02:49.703294 uuid=14786786_1.6.2.3.1 testdef=None
204 11:02:49.703372 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 11:02:49.703452 start: 1.6.2.3.2 test-overlay (timeout 00:09:45) [common]
206 11:02:49.703928 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 11:02:49.704170 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:45) [common]
209 11:02:49.704672 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 11:02:49.704874 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
212 11:02:49.705396 runner path: /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/0/tests/0_timesync-off test_uuid 14786786_1.6.2.3.1
213 11:02:49.705535 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 11:02:49.705731 start: 1.6.2.3.5 git-repo-action (timeout 00:09:45) [common]
216 11:02:49.705794 Using /lava-14786786 at stage 0
217 11:02:49.705879 Fetching tests from https://github.com/kernelci/test-definitions.git
218 11:02:49.705954 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/0/tests/1_kselftest-rtc'
219 11:02:53.353863 Running '/usr/bin/git checkout kernelci.org
220 11:02:53.504774 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
221 11:02:53.505375 uuid=14786786_1.6.2.3.5 testdef=None
222 11:02:53.505512 end: 1.6.2.3.5 git-repo-action (duration 00:00:04) [common]
224 11:02:53.505832 start: 1.6.2.3.6 test-overlay (timeout 00:09:41) [common]
225 11:02:53.506970 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 11:02:53.507308 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:41) [common]
228 11:02:53.508867 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 11:02:53.509238 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:41) [common]
231 11:02:53.510762 runner path: /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/0/tests/1_kselftest-rtc test_uuid 14786786_1.6.2.3.5
232 11:02:53.510874 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 11:02:53.510963 BRANCH='cip'
234 11:02:53.511048 SKIPFILE='/dev/null'
235 11:02:53.511130 SKIP_INSTALL='True'
236 11:02:53.511214 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz'
237 11:02:53.511296 TST_CASENAME=''
238 11:02:53.511379 TST_CMDFILES='rtc'
239 11:02:53.511566 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 11:02:53.511891 Creating lava-test-runner.conf files
242 11:02:53.511977 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14786786/lava-overlay-n9cy7ljg/lava-14786786/0 for stage 0
243 11:02:53.512095 - 0_timesync-off
244 11:02:53.512185 - 1_kselftest-rtc
245 11:02:53.512306 end: 1.6.2.3 test-definition (duration 00:00:04) [common]
246 11:02:53.512417 start: 1.6.2.4 compress-overlay (timeout 00:09:41) [common]
247 11:03:00.779577 end: 1.6.2.4 compress-overlay (duration 00:00:07) [common]
248 11:03:00.779735 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
249 11:03:00.779843 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 11:03:00.779988 end: 1.6.2 lava-overlay (duration 00:00:11) [common]
251 11:03:00.780091 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
252 11:03:00.941571 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 11:03:00.941713 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
254 11:03:00.941786 extracting modules file /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14786786/extract-nfsrootfs-74nf38jf
255 11:03:01.166156 extracting modules file /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14786786/extract-overlay-ramdisk-y76bg_b6/ramdisk
256 11:03:01.395885 end: 1.6.4 extract-modules (duration 00:00:00) [common]
257 11:03:01.396023 start: 1.6.5 apply-overlay-tftp (timeout 00:09:33) [common]
258 11:03:01.396100 [common] Applying overlay to NFS
259 11:03:01.396158 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14786786/compress-overlay-fthn0svw/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14786786/extract-nfsrootfs-74nf38jf
260 11:03:02.247115 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 11:03:02.247274 start: 1.6.6 configure-preseed-file (timeout 00:09:32) [common]
262 11:03:02.247384 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 11:03:02.247485 start: 1.6.7 compress-ramdisk (timeout 00:09:32) [common]
264 11:03:02.247553 Building ramdisk /var/lib/lava/dispatcher/tmp/14786786/extract-overlay-ramdisk-y76bg_b6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14786786/extract-overlay-ramdisk-y76bg_b6/ramdisk
265 11:03:02.829081 >> 129845 blocks
266 11:03:04.975267 rename /var/lib/lava/dispatcher/tmp/14786786/extract-overlay-ramdisk-y76bg_b6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/ramdisk/ramdisk.cpio.gz
267 11:03:04.975435 end: 1.6.7 compress-ramdisk (duration 00:00:03) [common]
268 11:03:04.975523 start: 1.6.8 prepare-kernel (timeout 00:09:29) [common]
269 11:03:04.975600 start: 1.6.8.1 prepare-fit (timeout 00:09:29) [common]
270 11:03:04.975672 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/kernel/Image']
271 11:03:18.946701 Returned 0 in 13 seconds
272 11:03:18.946859 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/kernel/image.itb
273 11:03:19.538151 output: FIT description: Kernel Image image with one or more FDT blobs
274 11:03:19.538267 output: Created: Wed Jul 10 12:03:19 2024
275 11:03:19.538328 output: Image 0 (kernel-1)
276 11:03:19.538381 output: Description:
277 11:03:19.538433 output: Created: Wed Jul 10 12:03:19 2024
278 11:03:19.538483 output: Type: Kernel Image
279 11:03:19.538533 output: Compression: lzma compressed
280 11:03:19.538585 output: Data Size: 13116259 Bytes = 12808.85 KiB = 12.51 MiB
281 11:03:19.538635 output: Architecture: AArch64
282 11:03:19.538683 output: OS: Linux
283 11:03:19.538730 output: Load Address: 0x00000000
284 11:03:19.538778 output: Entry Point: 0x00000000
285 11:03:19.538826 output: Hash algo: crc32
286 11:03:19.538873 output: Hash value: 9bb85fb9
287 11:03:19.538920 output: Image 1 (fdt-1)
288 11:03:19.538967 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 11:03:19.539015 output: Created: Wed Jul 10 12:03:19 2024
290 11:03:19.539062 output: Type: Flat Device Tree
291 11:03:19.539109 output: Compression: uncompressed
292 11:03:19.539156 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 11:03:19.539204 output: Architecture: AArch64
294 11:03:19.539251 output: Hash algo: crc32
295 11:03:19.539297 output: Hash value: a9713552
296 11:03:19.539343 output: Image 2 (ramdisk-1)
297 11:03:19.539390 output: Description: unavailable
298 11:03:19.539437 output: Created: Wed Jul 10 12:03:19 2024
299 11:03:19.539484 output: Type: RAMDisk Image
300 11:03:19.539531 output: Compression: uncompressed
301 11:03:19.539578 output: Data Size: 18709913 Bytes = 18271.40 KiB = 17.84 MiB
302 11:03:19.539625 output: Architecture: AArch64
303 11:03:19.539672 output: OS: Linux
304 11:03:19.539718 output: Load Address: unavailable
305 11:03:19.539765 output: Entry Point: unavailable
306 11:03:19.539812 output: Hash algo: crc32
307 11:03:19.539859 output: Hash value: 22754301
308 11:03:19.539904 output: Default Configuration: 'conf-1'
309 11:03:19.539950 output: Configuration 0 (conf-1)
310 11:03:19.539997 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 11:03:19.540043 output: Kernel: kernel-1
312 11:03:19.540089 output: Init Ramdisk: ramdisk-1
313 11:03:19.540136 output: FDT: fdt-1
314 11:03:19.540183 output: Loadables: kernel-1
315 11:03:19.540230 output:
316 11:03:19.540336 end: 1.6.8.1 prepare-fit (duration 00:00:15) [common]
317 11:03:19.540409 end: 1.6.8 prepare-kernel (duration 00:00:15) [common]
318 11:03:19.540482 end: 1.6 prepare-tftp-overlay (duration 00:00:34) [common]
319 11:03:19.540553 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:15) [common]
320 11:03:19.540609 No LXC device requested
321 11:03:19.540674 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 11:03:19.540743 start: 1.8 deploy-device-env (timeout 00:09:15) [common]
323 11:03:19.540808 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 11:03:19.540861 Checking files for TFTP limit of 4294967296 bytes.
325 11:03:19.541254 end: 1 tftp-deploy (duration 00:00:45) [common]
326 11:03:19.541341 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 11:03:19.541417 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 11:03:19.541504 substitutions:
329 11:03:19.541562 - {DTB}: 14786786/tftp-deploy-6cc153ad/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 11:03:19.541617 - {INITRD}: 14786786/tftp-deploy-6cc153ad/ramdisk/ramdisk.cpio.gz
331 11:03:19.541669 - {KERNEL}: 14786786/tftp-deploy-6cc153ad/kernel/Image
332 11:03:19.541726 - {LAVA_MAC}: None
333 11:03:19.541780 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14786786/extract-nfsrootfs-74nf38jf
334 11:03:19.541830 - {NFS_SERVER_IP}: 192.168.201.1
335 11:03:19.541879 - {PRESEED_CONFIG}: None
336 11:03:19.541935 - {PRESEED_LOCAL}: None
337 11:03:19.541985 - {RAMDISK}: 14786786/tftp-deploy-6cc153ad/ramdisk/ramdisk.cpio.gz
338 11:03:19.542033 - {ROOT_PART}: None
339 11:03:19.542080 - {ROOT}: None
340 11:03:19.542127 - {SERVER_IP}: 192.168.201.1
341 11:03:19.542174 - {TEE}: None
342 11:03:19.542222 Parsed boot commands:
343 11:03:19.542268 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 11:03:19.542403 Parsed boot commands: tftpboot 192.168.201.1 14786786/tftp-deploy-6cc153ad/kernel/image.itb 14786786/tftp-deploy-6cc153ad/kernel/cmdline
345 11:03:19.542478 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 11:03:19.542550 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 11:03:19.542620 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 11:03:19.542689 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 11:03:19.542742 Not connected, no need to disconnect.
350 11:03:19.542806 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 11:03:19.542873 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 11:03:19.542925 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
353 11:03:19.545906 Setting prompt string to ['lava-test: # ']
354 11:03:19.546209 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 11:03:19.546300 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 11:03:19.546393 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 11:03:19.546471 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 11:03:19.546641 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=reboot']
359 11:03:28.709021 >> Command sent successfully.
360 11:03:28.712345 Returned 0 in 9 seconds
361 11:03:28.712488 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
363 11:03:28.712683 end: 2.2.2 reset-device (duration 00:00:09) [common]
364 11:03:28.712766 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
365 11:03:28.712840 Setting prompt string to 'Starting depthcharge on Juniper...'
366 11:03:28.712897 Changing prompt to 'Starting depthcharge on Juniper...'
367 11:03:28.712955 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
368 11:03:28.713316 [Enter `^Ec?' for help]
369 11:03:35.927705 [DL] 00000000 00000000 010701
370 11:03:35.932883
371 11:03:35.932962
372 11:03:35.933021 F0: 102B 0000
373 11:03:35.933084
374 11:03:35.933141 F3: 1006 0033 [0200]
375 11:03:35.935703
376 11:03:35.935779 F3: 4001 00E0 [0200]
377 11:03:35.935837
378 11:03:35.935891 F3: 0000 0000
379 11:03:35.939357
380 11:03:35.939431 V0: 0000 0000 [0001]
381 11:03:35.939490
382 11:03:35.939542 00: 1027 0002
383 11:03:35.939595
384 11:03:35.942562 01: 0000 0000
385 11:03:35.942638
386 11:03:35.942696 BP: 0C00 0251 [0000]
387 11:03:35.942750
388 11:03:35.945866 G0: 1182 0000
389 11:03:35.945940
390 11:03:35.945998 EC: 0004 0000 [0001]
391 11:03:35.946052
392 11:03:35.949391 S7: 0000 0000 [0000]
393 11:03:35.949469
394 11:03:35.949527 CC: 0000 0000 [0001]
395 11:03:35.952691
396 11:03:35.952764 T0: 0000 00DB [000F]
397 11:03:35.952822
398 11:03:35.952876 Jump to BL
399 11:03:35.952926
400 11:03:35.988492
401 11:03:35.988576
402 11:03:35.995627 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
403 11:03:35.998883 ARM64: Exception handlers installed.
404 11:03:36.002219 ARM64: Testing exception
405 11:03:36.005007 ARM64: Done test exception
406 11:03:36.009265 WDT: Last reset was cold boot
407 11:03:36.009341 SPI0(PAD0) initialized at 992727 Hz
408 11:03:36.016587 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
409 11:03:36.016676 Manufacturer: ef
410 11:03:36.023222 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
411 11:03:36.035647 Probing TPM: . done!
412 11:03:36.035722 TPM ready after 0 ms
413 11:03:36.041808 Connected to device vid:did:rid of 1ae0:0028:00
414 11:03:36.049263 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
415 11:03:36.052321 Initialized TPM device CR50 revision 0
416 11:03:36.098652 tlcl_send_startup: Startup return code is 0
417 11:03:36.098748 TPM: setup succeeded
418 11:03:36.107771 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
419 11:03:36.110734 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
420 11:03:36.114135 in-header: 03 19 00 00 08 00 00 00
421 11:03:36.117569 in-data: a2 e0 47 00 13 00 00 00
422 11:03:36.120957 Chrome EC: UHEPI supported
423 11:03:36.127880 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
424 11:03:36.131439 in-header: 03 a1 00 00 08 00 00 00
425 11:03:36.134227 in-data: 84 60 60 10 00 00 00 00
426 11:03:36.134301 Phase 1
427 11:03:36.137834 FMAP: area GBB found @ 3f5000 (12032 bytes)
428 11:03:36.144349 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
429 11:03:36.147747 VB2:vb2_check_recovery() Recovery was requested manually
430 11:03:36.154708 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
431 11:03:36.160576 Recovery requested (1009000e)
432 11:03:36.169039 tlcl_extend: response is 0
433 11:03:36.174760 tlcl_extend: response is 0
434 11:03:36.199762
435 11:03:36.199840
436 11:03:36.206299 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
437 11:03:36.209427 ARM64: Exception handlers installed.
438 11:03:36.212832 ARM64: Testing exception
439 11:03:36.216067 ARM64: Done test exception
440 11:03:36.231605 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x2000
441 11:03:36.238065 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
442 11:03:36.241986 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
443 11:03:36.249755 [RTC]rtc_get_frequency_meter,134: input=0xf, output=860
444 11:03:36.256806 [RTC]rtc_get_frequency_meter,134: input=0x7, output=734
445 11:03:36.263837 [RTC]rtc_get_frequency_meter,134: input=0xb, output=796
446 11:03:36.266765 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b
447 11:03:36.273430 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
448 11:03:36.276988 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
449 11:03:36.280451 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
450 11:03:36.283671 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
451 11:03:36.287032 in-header: 03 19 00 00 08 00 00 00
452 11:03:36.290450 in-data: a2 e0 47 00 13 00 00 00
453 11:03:36.293747 Chrome EC: UHEPI supported
454 11:03:36.300994 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
455 11:03:36.304118 in-header: 03 a1 00 00 08 00 00 00
456 11:03:36.307034 in-data: 84 60 60 10 00 00 00 00
457 11:03:36.310633 Skip loading cached calibration data
458 11:03:36.317600 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
459 11:03:36.320329 in-header: 03 a1 00 00 08 00 00 00
460 11:03:36.323854 in-data: 84 60 60 10 00 00 00 00
461 11:03:36.330894 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
462 11:03:36.333886 in-header: 03 a1 00 00 08 00 00 00
463 11:03:36.337221 in-data: 84 60 60 10 00 00 00 00
464 11:03:36.340699 ADC[3]: Raw value=1037476 ID=8
465 11:03:36.340798 Manufacturer: ef
466 11:03:36.347556 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
467 11:03:36.350585 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
468 11:03:36.354060 CBFS @ 21000 size 3d4000
469 11:03:36.357420 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
470 11:03:36.364110 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
471 11:03:36.367243 CBFS: Found @ offset 3c880 size 4b
472 11:03:36.367319 DRAM-K: Full Calibration
473 11:03:36.374500 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
474 11:03:36.374607 CBFS @ 21000 size 3d4000
475 11:03:36.380979 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
476 11:03:36.384054 CBFS: Locating 'fallback/dram'
477 11:03:36.387213 CBFS: Found @ offset 24b00 size 12268
478 11:03:36.415410 read SPI 0x45b44 0x1224c: 22775 us, 3263 KB/s, 26.104 Mbps
479 11:03:36.418242 ddr_geometry: 1, config: 0x0
480 11:03:36.421817 header.status = 0x0
481 11:03:36.425069 header.magic = 0x44524d4b (expected: 0x44524d4b)
482 11:03:36.429095 header.version = 0x5 (expected: 0x5)
483 11:03:36.432355 header.size = 0x8f0 (expected: 0x8f0)
484 11:03:36.432430 header.config = 0x0
485 11:03:36.435153 header.flags = 0x0
486 11:03:36.435227 header.checksum = 0x0
487 11:03:36.441986 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
488 11:03:36.448320 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
489 11:03:36.451816 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
490 11:03:36.455215 ddr_geometry:1
491 11:03:36.455296 [EMI] new MDL number = 1
492 11:03:36.458370 dram_cbt_mode_extern: 0
493 11:03:36.461740 dram_cbt_mode [RK0]: 0, [RK1]: 0
494 11:03:36.468932 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
495 11:03:36.469006
496 11:03:36.469064
497 11:03:36.469117 [Bianco] ETT version 0.0.0.1
498 11:03:36.475491 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
499 11:03:36.475575
500 11:03:36.479000 vSetVcoreByFreq with vcore:762500, freq=1600
501 11:03:36.479074
502 11:03:36.479131 [DramcInit]
503 11:03:36.481708 AutoRefreshCKEOff AutoREF OFF
504 11:03:36.485364 DDRPhyPLLSetting-CKEOFF
505 11:03:36.488512 DDRPhyPLLSetting-CKEON
506 11:03:36.488587
507 11:03:36.488645 Enable WDQS
508 11:03:36.492370 [ModeRegInit_LP4] CH0 RK0
509 11:03:36.495467 Write Rank0 MR13 =0x18
510 11:03:36.495542 Write Rank0 MR12 =0x5d
511 11:03:36.498841 Write Rank0 MR1 =0x56
512 11:03:36.502532 Write Rank0 MR2 =0x1a
513 11:03:36.502606 Write Rank0 MR11 =0x0
514 11:03:36.505810 Write Rank0 MR22 =0x38
515 11:03:36.505884 Write Rank0 MR14 =0x5d
516 11:03:36.509556 Write Rank0 MR3 =0x30
517 11:03:36.512419 Write Rank0 MR13 =0x58
518 11:03:36.512497 Write Rank0 MR12 =0x5d
519 11:03:36.515900 Write Rank0 MR1 =0x56
520 11:03:36.515974 Write Rank0 MR2 =0x2d
521 11:03:36.519190 Write Rank0 MR11 =0x23
522 11:03:36.522628 Write Rank0 MR22 =0x34
523 11:03:36.522702 Write Rank0 MR14 =0x10
524 11:03:36.525691 Write Rank0 MR3 =0x30
525 11:03:36.525765 Write Rank0 MR13 =0xd8
526 11:03:36.529040 [ModeRegInit_LP4] CH0 RK1
527 11:03:36.532305 Write Rank1 MR13 =0x18
528 11:03:36.532380 Write Rank1 MR12 =0x5d
529 11:03:36.535918 Write Rank1 MR1 =0x56
530 11:03:36.539453 Write Rank1 MR2 =0x1a
531 11:03:36.539530 Write Rank1 MR11 =0x0
532 11:03:36.542875 Write Rank1 MR22 =0x38
533 11:03:36.542949 Write Rank1 MR14 =0x5d
534 11:03:36.546285 Write Rank1 MR3 =0x30
535 11:03:36.549543 Write Rank1 MR13 =0x58
536 11:03:36.549617 Write Rank1 MR12 =0x5d
537 11:03:36.552530 Write Rank1 MR1 =0x56
538 11:03:36.552603 Write Rank1 MR2 =0x2d
539 11:03:36.556011 Write Rank1 MR11 =0x23
540 11:03:36.559066 Write Rank1 MR22 =0x34
541 11:03:36.559140 Write Rank1 MR14 =0x10
542 11:03:36.562665 Write Rank1 MR3 =0x30
543 11:03:36.566818 Write Rank1 MR13 =0xd8
544 11:03:36.566893 [ModeRegInit_LP4] CH1 RK0
545 11:03:36.569335 Write Rank0 MR13 =0x18
546 11:03:36.569408 Write Rank0 MR12 =0x5d
547 11:03:36.572728 Write Rank0 MR1 =0x56
548 11:03:36.576359 Write Rank0 MR2 =0x1a
549 11:03:36.576433 Write Rank0 MR11 =0x0
550 11:03:36.579220 Write Rank0 MR22 =0x38
551 11:03:36.579294 Write Rank0 MR14 =0x5d
552 11:03:36.582664 Write Rank0 MR3 =0x30
553 11:03:36.585864 Write Rank0 MR13 =0x58
554 11:03:36.585937 Write Rank0 MR12 =0x5d
555 11:03:36.589187 Write Rank0 MR1 =0x56
556 11:03:36.592630 Write Rank0 MR2 =0x2d
557 11:03:36.592732 Write Rank0 MR11 =0x23
558 11:03:36.595688 Write Rank0 MR22 =0x34
559 11:03:36.595762 Write Rank0 MR14 =0x10
560 11:03:36.599234 Write Rank0 MR3 =0x30
561 11:03:36.602716 Write Rank0 MR13 =0xd8
562 11:03:36.602790 [ModeRegInit_LP4] CH1 RK1
563 11:03:36.606263 Write Rank1 MR13 =0x18
564 11:03:36.609063 Write Rank1 MR12 =0x5d
565 11:03:36.609143 Write Rank1 MR1 =0x56
566 11:03:36.612406 Write Rank1 MR2 =0x1a
567 11:03:36.612479 Write Rank1 MR11 =0x0
568 11:03:36.615616 Write Rank1 MR22 =0x38
569 11:03:36.618976 Write Rank1 MR14 =0x5d
570 11:03:36.619050 Write Rank1 MR3 =0x30
571 11:03:36.622428 Write Rank1 MR13 =0x58
572 11:03:36.622502 Write Rank1 MR12 =0x5d
573 11:03:36.625738 Write Rank1 MR1 =0x56
574 11:03:36.629129 Write Rank1 MR2 =0x2d
575 11:03:36.629210 Write Rank1 MR11 =0x23
576 11:03:36.632753 Write Rank1 MR22 =0x34
577 11:03:36.632827 Write Rank1 MR14 =0x10
578 11:03:36.636196 Write Rank1 MR3 =0x30
579 11:03:36.639636 Write Rank1 MR13 =0xd8
580 11:03:36.639711 match AC timing 3
581 11:03:36.649269 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
582 11:03:36.649366 [MiockJmeterHQA]
583 11:03:36.656265 vSetVcoreByFreq with vcore:762500, freq=1600
584 11:03:36.757214
585 11:03:36.757305 MIOCK jitter meter ch=0
586 11:03:36.757363
587 11:03:36.760326 1T = (99-17) = 82 dly cells
588 11:03:36.767268 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
589 11:03:36.770525 vSetVcoreByFreq with vcore:725000, freq=1200
590 11:03:36.868130
591 11:03:36.868222 MIOCK jitter meter ch=0
592 11:03:36.868280
593 11:03:36.870859 1T = (94-16) = 78 dly cells
594 11:03:36.877638 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
595 11:03:36.880834 vSetVcoreByFreq with vcore:725000, freq=800
596 11:03:36.978159
597 11:03:36.978261 MIOCK jitter meter ch=0
598 11:03:36.978319
599 11:03:36.981949 1T = (94-16) = 78 dly cells
600 11:03:36.987954 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
601 11:03:36.991376 vSetVcoreByFreq with vcore:762500, freq=1600
602 11:03:36.995163 vSetVcoreByFreq with vcore:762500, freq=1600
603 11:03:36.995238
604 11:03:36.995297 K DRVP
605 11:03:36.998278 1. OCD DRVP=0 CALOUT=0
606 11:03:37.001615 1. OCD DRVP=1 CALOUT=0
607 11:03:37.001690 1. OCD DRVP=2 CALOUT=0
608 11:03:37.004735 1. OCD DRVP=3 CALOUT=0
609 11:03:37.004810 1. OCD DRVP=4 CALOUT=0
610 11:03:37.007863 1. OCD DRVP=5 CALOUT=0
611 11:03:37.011433 1. OCD DRVP=6 CALOUT=0
612 11:03:37.011509 1. OCD DRVP=7 CALOUT=0
613 11:03:37.014867 1. OCD DRVP=8 CALOUT=0
614 11:03:37.014942 1. OCD DRVP=9 CALOUT=1
615 11:03:37.018172
616 11:03:37.018247 1. OCD DRVP calibration OK! DRVP=9
617 11:03:37.022041
618 11:03:37.022117
619 11:03:37.022173
620 11:03:37.022226 K ODTN
621 11:03:37.022277 3. OCD ODTN=0 ,CALOUT=1
622 11:03:37.025193 3. OCD ODTN=1 ,CALOUT=1
623 11:03:37.028384 3. OCD ODTN=2 ,CALOUT=1
624 11:03:37.028459 3. OCD ODTN=3 ,CALOUT=1
625 11:03:37.031659 3. OCD ODTN=4 ,CALOUT=1
626 11:03:37.035115 3. OCD ODTN=5 ,CALOUT=1
627 11:03:37.035191 3. OCD ODTN=6 ,CALOUT=1
628 11:03:37.038997 3. OCD ODTN=7 ,CALOUT=0
629 11:03:37.039072
630 11:03:37.041823 3. OCD ODTN calibration OK! ODTN=7
631 11:03:37.041899
632 11:03:37.045247 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
633 11:03:37.048636 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
634 11:03:37.055287 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
635 11:03:37.055361
636 11:03:37.055418 K DRVP
637 11:03:37.058763 1. OCD DRVP=0 CALOUT=0
638 11:03:37.058838 1. OCD DRVP=1 CALOUT=0
639 11:03:37.061970 1. OCD DRVP=2 CALOUT=0
640 11:03:37.065294 1. OCD DRVP=3 CALOUT=0
641 11:03:37.065369 1. OCD DRVP=4 CALOUT=0
642 11:03:37.068264 1. OCD DRVP=5 CALOUT=0
643 11:03:37.068339 1. OCD DRVP=6 CALOUT=0
644 11:03:37.071909 1. OCD DRVP=7 CALOUT=0
645 11:03:37.075369 1. OCD DRVP=8 CALOUT=0
646 11:03:37.075444 1. OCD DRVP=9 CALOUT=0
647 11:03:37.078879 1. OCD DRVP=10 CALOUT=1
648 11:03:37.078954
649 11:03:37.081778 1. OCD DRVP calibration OK! DRVP=10
650 11:03:37.081855
651 11:03:37.081913
652 11:03:37.081965
653 11:03:37.082016 K ODTN
654 11:03:37.085122 3. OCD ODTN=0 ,CALOUT=1
655 11:03:37.088983 3. OCD ODTN=1 ,CALOUT=1
656 11:03:37.089058 3. OCD ODTN=2 ,CALOUT=1
657 11:03:37.092183 3. OCD ODTN=3 ,CALOUT=1
658 11:03:37.092258 3. OCD ODTN=4 ,CALOUT=1
659 11:03:37.095575 3. OCD ODTN=5 ,CALOUT=1
660 11:03:37.098716 3. OCD ODTN=6 ,CALOUT=1
661 11:03:37.098791 3. OCD ODTN=7 ,CALOUT=1
662 11:03:37.101892 3. OCD ODTN=8 ,CALOUT=1
663 11:03:37.105398 3. OCD ODTN=9 ,CALOUT=1
664 11:03:37.105474 3. OCD ODTN=10 ,CALOUT=1
665 11:03:37.109326 3. OCD ODTN=11 ,CALOUT=1
666 11:03:37.111924 3. OCD ODTN=12 ,CALOUT=1
667 11:03:37.112000 3. OCD ODTN=13 ,CALOUT=1
668 11:03:37.115293 3. OCD ODTN=14 ,CALOUT=0
669 11:03:37.115369
670 11:03:37.119117 3. OCD ODTN calibration OK! ODTN=14
671 11:03:37.119193
672 11:03:37.122279 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14
673 11:03:37.125335 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14
674 11:03:37.132290 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)
675 11:03:37.132365
676 11:03:37.132423 [DramcInit]
677 11:03:37.135717 AutoRefreshCKEOff AutoREF OFF
678 11:03:37.139315 DDRPhyPLLSetting-CKEOFF
679 11:03:37.139390 DDRPhyPLLSetting-CKEON
680 11:03:37.139446
681 11:03:37.142316 Enable WDQS
682 11:03:37.142390 ==
683 11:03:37.145773 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
684 11:03:37.149029 fsp= 1, odt_onoff= 1, Byte mode= 0
685 11:03:37.149129 ==
686 11:03:37.152659 [Duty_Offset_Calibration]
687 11:03:37.152733
688 11:03:37.155817 ===========================
689 11:03:37.155892 B0:0 B1:1 CA:1
690 11:03:37.177473 ==
691 11:03:37.180961 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
692 11:03:37.183912 fsp= 1, odt_onoff= 1, Byte mode= 0
693 11:03:37.183986 ==
694 11:03:37.187225 [Duty_Offset_Calibration]
695 11:03:37.187299
696 11:03:37.190579 ===========================
697 11:03:37.190653 B0:1 B1:2 CA:0
698 11:03:37.223235 [ModeRegInit_LP4] CH0 RK0
699 11:03:37.226934 Write Rank0 MR13 =0x18
700 11:03:37.227009 Write Rank0 MR12 =0x5d
701 11:03:37.229925 Write Rank0 MR1 =0x56
702 11:03:37.234419 Write Rank0 MR2 =0x1a
703 11:03:37.234494 Write Rank0 MR11 =0x0
704 11:03:37.236962 Write Rank0 MR22 =0x38
705 11:03:37.237036 Write Rank0 MR14 =0x5d
706 11:03:37.240143 Write Rank0 MR3 =0x30
707 11:03:37.242929 Write Rank0 MR13 =0x58
708 11:03:37.243004 Write Rank0 MR12 =0x5d
709 11:03:37.246849 Write Rank0 MR1 =0x56
710 11:03:37.246923 Write Rank0 MR2 =0x2d
711 11:03:37.250099 Write Rank0 MR11 =0x23
712 11:03:37.253610 Write Rank0 MR22 =0x34
713 11:03:37.253684 Write Rank0 MR14 =0x10
714 11:03:37.256705 Write Rank0 MR3 =0x30
715 11:03:37.260580 Write Rank0 MR13 =0xd8
716 11:03:37.260654 [ModeRegInit_LP4] CH0 RK1
717 11:03:37.263201 Write Rank1 MR13 =0x18
718 11:03:37.263275 Write Rank1 MR12 =0x5d
719 11:03:37.266603 Write Rank1 MR1 =0x56
720 11:03:37.270138 Write Rank1 MR2 =0x1a
721 11:03:37.270211 Write Rank1 MR11 =0x0
722 11:03:37.273477 Write Rank1 MR22 =0x38
723 11:03:37.273551 Write Rank1 MR14 =0x5d
724 11:03:37.276628 Write Rank1 MR3 =0x30
725 11:03:37.280038 Write Rank1 MR13 =0x58
726 11:03:37.280112 Write Rank1 MR12 =0x5d
727 11:03:37.283579 Write Rank1 MR1 =0x56
728 11:03:37.283654 Write Rank1 MR2 =0x2d
729 11:03:37.286722 Write Rank1 MR11 =0x23
730 11:03:37.289826 Write Rank1 MR22 =0x34
731 11:03:37.289900 Write Rank1 MR14 =0x10
732 11:03:37.293613 Write Rank1 MR3 =0x30
733 11:03:37.297046 Write Rank1 MR13 =0xd8
734 11:03:37.297119 [ModeRegInit_LP4] CH1 RK0
735 11:03:37.300169 Write Rank0 MR13 =0x18
736 11:03:37.300243 Write Rank0 MR12 =0x5d
737 11:03:37.303755 Write Rank0 MR1 =0x56
738 11:03:37.306912 Write Rank0 MR2 =0x1a
739 11:03:37.306986 Write Rank0 MR11 =0x0
740 11:03:37.310516 Write Rank0 MR22 =0x38
741 11:03:37.310590 Write Rank0 MR14 =0x5d
742 11:03:37.313473 Write Rank0 MR3 =0x30
743 11:03:37.317116 Write Rank0 MR13 =0x58
744 11:03:37.317227 Write Rank0 MR12 =0x5d
745 11:03:37.320417 Write Rank0 MR1 =0x56
746 11:03:37.320490 Write Rank0 MR2 =0x2d
747 11:03:37.323688 Write Rank0 MR11 =0x23
748 11:03:37.326815 Write Rank0 MR22 =0x34
749 11:03:37.326889 Write Rank0 MR14 =0x10
750 11:03:37.330596 Write Rank0 MR3 =0x30
751 11:03:37.333978 Write Rank0 MR13 =0xd8
752 11:03:37.334052 [ModeRegInit_LP4] CH1 RK1
753 11:03:37.336790 Write Rank1 MR13 =0x18
754 11:03:37.336863 Write Rank1 MR12 =0x5d
755 11:03:37.340504 Write Rank1 MR1 =0x56
756 11:03:37.344126 Write Rank1 MR2 =0x1a
757 11:03:37.344201 Write Rank1 MR11 =0x0
758 11:03:37.347560 Write Rank1 MR22 =0x38
759 11:03:37.347634 Write Rank1 MR14 =0x5d
760 11:03:37.350529 Write Rank1 MR3 =0x30
761 11:03:37.353999 Write Rank1 MR13 =0x58
762 11:03:37.354073 Write Rank1 MR12 =0x5d
763 11:03:37.357079 Write Rank1 MR1 =0x56
764 11:03:37.357192 Write Rank1 MR2 =0x2d
765 11:03:37.360546 Write Rank1 MR11 =0x23
766 11:03:37.363952 Write Rank1 MR22 =0x34
767 11:03:37.364026 Write Rank1 MR14 =0x10
768 11:03:37.367484 Write Rank1 MR3 =0x30
769 11:03:37.367558 Write Rank1 MR13 =0xd8
770 11:03:37.370664 match AC timing 3
771 11:03:37.381280 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
772 11:03:37.381360 DramC Write-DBI off
773 11:03:37.384201 DramC Read-DBI off
774 11:03:37.384275 Write Rank0 MR13 =0x59
775 11:03:37.387560 ==
776 11:03:37.390720 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
777 11:03:37.394699 fsp= 1, odt_onoff= 1, Byte mode= 0
778 11:03:37.394774 ==
779 11:03:37.398009 === u2Vref_new: 0x56 --> 0x2d
780 11:03:37.400716 === u2Vref_new: 0x58 --> 0x38
781 11:03:37.404433 === u2Vref_new: 0x5a --> 0x39
782 11:03:37.407533 === u2Vref_new: 0x5c --> 0x3c
783 11:03:37.410698 === u2Vref_new: 0x5e --> 0x3d
784 11:03:37.410773 === u2Vref_new: 0x60 --> 0xa0
785 11:03:37.414877
786 11:03:37.414950 CBT Vref found, early break!
787 11:03:37.417595 [CA 0] Center 33 (4~63) winsize 60
788 11:03:37.421346 [CA 1] Center 34 (5~63) winsize 59
789 11:03:37.425068 [CA 2] Center 28 (0~57) winsize 58
790 11:03:37.427857 [CA 3] Center 24 (-3~51) winsize 55
791 11:03:37.431173 [CA 4] Center 25 (-2~53) winsize 56
792 11:03:37.434556 [CA 5] Center 30 (2~58) winsize 57
793 11:03:37.434630
794 11:03:37.438212 [CATrainingPosCal] consider 1 rank data
795 11:03:37.441431 u2DelayCellTimex100 = 762/100 ps
796 11:03:37.444834 CA0 delay=33 (4~63),Diff = 9 PI (11 cell)
797 11:03:37.448194 CA1 delay=34 (5~63),Diff = 10 PI (12 cell)
798 11:03:37.451698 CA2 delay=28 (0~57),Diff = 4 PI (5 cell)
799 11:03:37.455074 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
800 11:03:37.458422 CA4 delay=25 (-2~53),Diff = 1 PI (1 cell)
801 11:03:37.461767 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
802 11:03:37.461841
803 11:03:37.468584 CA PerBit enable=1, Macro0, CA PI delay=24
804 11:03:37.468658 === u2Vref_new: 0x56 --> 0x2d
805 11:03:37.468716
806 11:03:37.471621 Vref(ca) range 1: 22
807 11:03:37.471695
808 11:03:37.475156 CS Dly= 10 (41-0-32)
809 11:03:37.475230 Write Rank0 MR13 =0xd8
810 11:03:37.478602 Write Rank0 MR13 =0xd8
811 11:03:37.481656 Write Rank0 MR12 =0x56
812 11:03:37.481730 Write Rank1 MR13 =0x59
813 11:03:37.481789 ==
814 11:03:37.488973 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
815 11:03:37.492319 fsp= 1, odt_onoff= 1, Byte mode= 0
816 11:03:37.492393 ==
817 11:03:37.495304 === u2Vref_new: 0x56 --> 0x2d
818 11:03:37.495379 === u2Vref_new: 0x58 --> 0x38
819 11:03:37.499052 === u2Vref_new: 0x5a --> 0x39
820 11:03:37.502045 === u2Vref_new: 0x5c --> 0x3c
821 11:03:37.505500 === u2Vref_new: 0x5e --> 0x3d
822 11:03:37.509049 === u2Vref_new: 0x60 --> 0xa0
823 11:03:37.512449 [CA 0] Center 34 (5~63) winsize 59
824 11:03:37.515787 [CA 1] Center 34 (6~63) winsize 58
825 11:03:37.519144 [CA 2] Center 29 (0~58) winsize 59
826 11:03:37.522901 [CA 3] Center 23 (-4~50) winsize 55
827 11:03:37.525871 [CA 4] Center 24 (-3~52) winsize 56
828 11:03:37.529060 [CA 5] Center 30 (1~59) winsize 59
829 11:03:37.529192
830 11:03:37.532183 [CATrainingPosCal] consider 2 rank data
831 11:03:37.535869 u2DelayCellTimex100 = 762/100 ps
832 11:03:37.538839 CA0 delay=34 (5~63),Diff = 11 PI (14 cell)
833 11:03:37.542487 CA1 delay=34 (6~63),Diff = 11 PI (14 cell)
834 11:03:37.545813 CA2 delay=28 (0~57),Diff = 5 PI (6 cell)
835 11:03:37.549397 CA3 delay=23 (-3~50),Diff = 0 PI (0 cell)
836 11:03:37.552228 CA4 delay=25 (-2~52),Diff = 2 PI (2 cell)
837 11:03:37.555731 CA5 delay=30 (2~58),Diff = 7 PI (8 cell)
838 11:03:37.555805
839 11:03:37.562394 CA PerBit enable=1, Macro0, CA PI delay=23
840 11:03:37.562468 === u2Vref_new: 0x56 --> 0x2d
841 11:03:37.562527
842 11:03:37.566814 Vref(ca) range 1: 22
843 11:03:37.566887
844 11:03:37.568995 CS Dly= 11 (42-0-32)
845 11:03:37.569068 Write Rank1 MR13 =0xd8
846 11:03:37.572534 Write Rank1 MR13 =0xd8
847 11:03:37.575754 Write Rank1 MR12 =0x56
848 11:03:37.579044 [RankSwap] Rank num 2, (Multi 1), Rank 0
849 11:03:37.579135 Write Rank0 MR2 =0xad
850 11:03:37.582962 [Write Leveling]
851 11:03:37.586008 delay byte0 byte1 byte2 byte3
852 11:03:37.586097
853 11:03:37.586195 10 0 0
854 11:03:37.586303 11 0 0
855 11:03:37.589502 12 0 0
856 11:03:37.589595 13 0 0
857 11:03:37.592725 14 0 0
858 11:03:37.592818 15 0 0
859 11:03:37.592902 16 0 0
860 11:03:37.595818 17 0 0
861 11:03:37.595904 18 0 0
862 11:03:37.599415 19 0 0
863 11:03:37.599511 20 0 0
864 11:03:37.602621 21 0 0
865 11:03:37.602719 22 0 0
866 11:03:37.602805 23 0 0
867 11:03:37.605772 24 0 0
868 11:03:37.605860 25 0 0
869 11:03:37.609147 26 0 ff
870 11:03:37.609242 27 0 ff
871 11:03:37.612625 28 0 ff
872 11:03:37.612710 29 0 ff
873 11:03:37.612793 30 0 ff
874 11:03:37.616078 31 0 ff
875 11:03:37.616174 32 ff ff
876 11:03:37.619432 33 ff ff
877 11:03:37.619497 34 ff ff
878 11:03:37.622702 35 ff ff
879 11:03:37.622767 36 ff ff
880 11:03:37.626193 37 ff ff
881 11:03:37.626282 38 ff ff
882 11:03:37.629607 pass bytecount = 0xff (0xff: all bytes pass)
883 11:03:37.629691
884 11:03:37.632617 DQS0 dly: 32
885 11:03:37.632700 DQS1 dly: 26
886 11:03:37.635777 Write Rank0 MR2 =0x2d
887 11:03:37.639234 [RankSwap] Rank num 2, (Multi 1), Rank 0
888 11:03:37.639322 Write Rank0 MR1 =0xd6
889 11:03:37.642641 [Gating]
890 11:03:37.642723 ==
891 11:03:37.645920 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
892 11:03:37.649395 fsp= 1, odt_onoff= 1, Byte mode= 0
893 11:03:37.649457 ==
894 11:03:37.652831 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
895 11:03:37.659712 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
896 11:03:37.663261 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
897 11:03:37.666540 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
898 11:03:37.672836 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
899 11:03:37.676490 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
900 11:03:37.679794 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
901 11:03:37.686395 3 1 28 |2c2c 2c2b |(11 0)(11 11) |(0 0)(1 0)| 0
902 11:03:37.689780 3 2 0 |1a19 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
903 11:03:37.693510 3 2 4 |3534 404 |(11 11)(11 11) |(0 0)(0 0)| 0
904 11:03:37.696792 3 2 8 |3534 c0c |(11 11)(11 11) |(0 0)(0 0)| 0
905 11:03:37.703555 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
906 11:03:37.706205 3 2 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
907 11:03:37.709685 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
908 11:03:37.716285 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
909 11:03:37.719610 3 2 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
910 11:03:37.723156 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
911 11:03:37.729939 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
912 11:03:37.733417 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
913 11:03:37.736653 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
914 11:03:37.740168 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
915 11:03:37.746719 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
916 11:03:37.750568 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
917 11:03:37.753325 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
918 11:03:37.760072 3 4 0 |201 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
919 11:03:37.763378 3 4 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
920 11:03:37.766733 3 4 8 |3d3d 707 |(11 11)(11 11) |(1 1)(1 1)| 0
921 11:03:37.769977 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
922 11:03:37.776776 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
923 11:03:37.780107 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
924 11:03:37.783587 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
925 11:03:37.790765 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
926 11:03:37.794130 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
927 11:03:37.796816 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 11:03:37.803928 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 11:03:37.806938 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 11:03:37.810197 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 11:03:37.814231 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 11:03:37.820195 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 11:03:37.823465 [Byte 0] Lead/lag falling Transition (3, 5, 24)
934 11:03:37.826872 [Byte 1] Lead/lag falling Transition (3, 5, 24)
935 11:03:37.833773 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
936 11:03:37.837184 [Byte 0] Lead/lag Transition tap number (2)
937 11:03:37.840568 [Byte 1] Lead/lag Transition tap number (2)
938 11:03:37.844157 3 6 0 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
939 11:03:37.846993 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
940 11:03:37.850311 [Byte 0]First pass (3, 6, 4)
941 11:03:37.854065 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
942 11:03:37.857143 [Byte 1]First pass (3, 6, 8)
943 11:03:37.860649 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
944 11:03:37.867210 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
945 11:03:37.870689 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
946 11:03:37.873928 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
947 11:03:37.877330 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
948 11:03:37.880610 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 11:03:37.887552 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
950 11:03:37.890569 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 11:03:37.893735 All bytes gating window > 1UI, Early break!
952 11:03:37.893824
953 11:03:37.897710 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 28)
954 11:03:37.897797
955 11:03:37.900558 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
956 11:03:37.900644
957 11:03:37.900723
958 11:03:37.900802
959 11:03:37.903955 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
960 11:03:37.907564
961 11:03:37.910978 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
962 11:03:37.911065
963 11:03:37.911144
964 11:03:37.911223 Write Rank0 MR1 =0x56
965 11:03:37.911302
966 11:03:37.914269 best RODT dly(2T, 0.5T) = (2, 2)
967 11:03:37.914354
968 11:03:37.917451 best RODT dly(2T, 0.5T) = (2, 2)
969 11:03:37.917583 ==
970 11:03:37.924433 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
971 11:03:37.927743 fsp= 1, odt_onoff= 1, Byte mode= 0
972 11:03:37.927815 ==
973 11:03:37.931460 Start DQ dly to find pass range UseTestEngine =0
974 11:03:37.934130 x-axis: bit #, y-axis: DQ dly (-127~63)
975 11:03:37.937415 RX Vref Scan = 0
976 11:03:37.937503 -26, [0] xxxxxxxx xxxxxxxx [MSB]
977 11:03:37.941318 -25, [0] xxxxxxxx xxxxxxxx [MSB]
978 11:03:37.944320 -24, [0] xxxxxxxx xxxxxxxx [MSB]
979 11:03:37.947469 -23, [0] xxxxxxxx xxxxxxxx [MSB]
980 11:03:37.951049 -22, [0] xxxxxxxx xxxxxxxx [MSB]
981 11:03:37.954150 -21, [0] xxxxxxxx xxxxxxxx [MSB]
982 11:03:37.957901 -20, [0] xxxxxxxx xxxxxxxx [MSB]
983 11:03:37.961045 -19, [0] xxxxxxxx xxxxxxxx [MSB]
984 11:03:37.961143 -18, [0] xxxxxxxx xxxxxxxx [MSB]
985 11:03:37.964459 -17, [0] xxxxxxxx xxxxxxxx [MSB]
986 11:03:37.967463 -16, [0] xxxxxxxx xxxxxxxx [MSB]
987 11:03:37.970696 -15, [0] xxxxxxxx xxxxxxxx [MSB]
988 11:03:37.974456 -14, [0] xxxxxxxx xxxxxxxx [MSB]
989 11:03:37.978048 -13, [0] xxxxxxxx xxxxxxxx [MSB]
990 11:03:37.981255 -12, [0] xxxxxxxx xxxxxxxx [MSB]
991 11:03:37.984164 -11, [0] xxxxxxxx xxxxxxxx [MSB]
992 11:03:37.987714 -10, [0] xxxxxxxx xxxxxxxx [MSB]
993 11:03:37.987804 -9, [0] xxxxxxxx xxxxxxxx [MSB]
994 11:03:37.990849 -8, [0] xxxxxxxx xxxxxxxx [MSB]
995 11:03:37.994580 -7, [0] xxxxxxxx xxxxxxxx [MSB]
996 11:03:37.997928 -6, [0] xxxxxxxx xxxxxxxx [MSB]
997 11:03:38.001012 -5, [0] xxxxxxxx xxxxxxxx [MSB]
998 11:03:38.004640 -4, [0] xxxxxxxx xxxxxxxx [MSB]
999 11:03:38.004730 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1000 11:03:38.008193 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1001 11:03:38.011245 -1, [0] xxxxxxxx xxxxxxxx [MSB]
1002 11:03:38.014689 0, [0] xxxoxoxx xxxxxxxx [MSB]
1003 11:03:38.018235 1, [0] xxxoxoxx xxxoxxxx [MSB]
1004 11:03:38.021095 2, [0] xxxoxoxx xxxoxoxx [MSB]
1005 11:03:38.021219 3, [0] xxxoxooo oxxoxoox [MSB]
1006 11:03:38.024692 4, [0] xxxoxooo oxxoxoox [MSB]
1007 11:03:38.027770 5, [0] xxxoxooo ooxooooo [MSB]
1008 11:03:38.031203 6, [0] xxxoxooo ooxooooo [MSB]
1009 11:03:38.034961 7, [0] xooooooo oooooooo [MSB]
1010 11:03:38.037736 8, [0] xooooooo oooooooo [MSB]
1011 11:03:38.037813 9, [0] xooooooo oooooooo [MSB]
1012 11:03:38.041523 10, [0] xooooooo oooooooo [MSB]
1013 11:03:38.044954 31, [0] oooooooo oooooooo [MSB]
1014 11:03:38.048114 32, [0] oooxoooo oooooooo [MSB]
1015 11:03:38.051750 33, [0] oooxoooo oooooxoo [MSB]
1016 11:03:38.055035 34, [0] oooxoxxo oooooxxo [MSB]
1017 11:03:38.057974 35, [0] oooxoxxx xooooxxo [MSB]
1018 11:03:38.058054 36, [0] oooxoxxx xooxoxxo [MSB]
1019 11:03:38.062206 37, [0] oooxoxxx xxoxxxxx [MSB]
1020 11:03:38.065091 38, [0] oooxoxxx xxoxxxxx [MSB]
1021 11:03:38.068463 39, [0] oooxoxxx xxoxxxxx [MSB]
1022 11:03:38.071901 40, [0] oooxoxxx xxoxxxxx [MSB]
1023 11:03:38.074741 41, [0] xoxxxxxx xxoxxxxx [MSB]
1024 11:03:38.074818 42, [0] xxxxxxxx xxxxxxxx [MSB]
1025 11:03:38.081484 iDelay=42, Bit 0, Center 25 (11 ~ 40) 30
1026 11:03:38.084913 iDelay=42, Bit 1, Center 24 (7 ~ 41) 35
1027 11:03:38.088462 iDelay=42, Bit 2, Center 23 (7 ~ 40) 34
1028 11:03:38.091860 iDelay=42, Bit 3, Center 15 (0 ~ 31) 32
1029 11:03:38.095351 iDelay=42, Bit 4, Center 23 (7 ~ 40) 34
1030 11:03:38.098776 iDelay=42, Bit 5, Center 16 (0 ~ 33) 34
1031 11:03:38.102327 iDelay=42, Bit 6, Center 18 (3 ~ 33) 31
1032 11:03:38.105385 iDelay=42, Bit 7, Center 18 (3 ~ 34) 32
1033 11:03:38.108448 iDelay=42, Bit 8, Center 18 (3 ~ 34) 32
1034 11:03:38.112346 iDelay=42, Bit 9, Center 20 (5 ~ 36) 32
1035 11:03:38.115383 iDelay=42, Bit 10, Center 24 (7 ~ 41) 35
1036 11:03:38.119237 iDelay=42, Bit 11, Center 18 (1 ~ 35) 35
1037 11:03:38.122311 iDelay=42, Bit 12, Center 20 (5 ~ 36) 32
1038 11:03:38.125292 iDelay=42, Bit 13, Center 17 (2 ~ 32) 31
1039 11:03:38.128969 iDelay=42, Bit 14, Center 18 (3 ~ 33) 31
1040 11:03:38.132608 iDelay=42, Bit 15, Center 20 (5 ~ 36) 32
1041 11:03:38.135215 ==
1042 11:03:38.138450 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1043 11:03:38.141872 fsp= 1, odt_onoff= 1, Byte mode= 0
1044 11:03:38.141963 ==
1045 11:03:38.142036 DQS Delay:
1046 11:03:38.145330 DQS0 = 0, DQS1 = 0
1047 11:03:38.145405 DQM Delay:
1048 11:03:38.149001 DQM0 = 20, DQM1 = 19
1049 11:03:38.149098 DQ Delay:
1050 11:03:38.152211 DQ0 =25, DQ1 =24, DQ2 =23, DQ3 =15
1051 11:03:38.155724 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
1052 11:03:38.159046 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =18
1053 11:03:38.162175 DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20
1054 11:03:38.162249
1055 11:03:38.162306
1056 11:03:38.165545 DramC Write-DBI off
1057 11:03:38.165644 ==
1058 11:03:38.169219 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1059 11:03:38.172141 fsp= 1, odt_onoff= 1, Byte mode= 0
1060 11:03:38.172215 ==
1061 11:03:38.175588 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1062 11:03:38.175662
1063 11:03:38.179097 Begin, DQ Scan Range 922~1178
1064 11:03:38.179171
1065 11:03:38.179229
1066 11:03:38.182122 TX Vref Scan disable
1067 11:03:38.185483 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1068 11:03:38.188608 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1069 11:03:38.192482 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1070 11:03:38.195319 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1071 11:03:38.198684 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1072 11:03:38.202500 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1073 11:03:38.206049 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1074 11:03:38.209000 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1075 11:03:38.212420 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1076 11:03:38.216147 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1077 11:03:38.219555 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1078 11:03:38.225939 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1079 11:03:38.229040 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1080 11:03:38.232425 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1081 11:03:38.235911 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1082 11:03:38.239535 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1083 11:03:38.242557 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1084 11:03:38.246171 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1085 11:03:38.249602 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1086 11:03:38.252672 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1087 11:03:38.255848 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1088 11:03:38.259470 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1089 11:03:38.262580 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1090 11:03:38.265972 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1091 11:03:38.269353 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1092 11:03:38.272931 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1093 11:03:38.275805 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1094 11:03:38.279123 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1095 11:03:38.283189 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1096 11:03:38.289499 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1097 11:03:38.293170 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1098 11:03:38.296119 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1099 11:03:38.299525 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1100 11:03:38.303164 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1101 11:03:38.306216 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1102 11:03:38.309570 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1103 11:03:38.313059 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1104 11:03:38.316182 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1105 11:03:38.319527 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1106 11:03:38.323151 961 |3 6 1|[0] xxxxxxxx oxxxxxxx [MSB]
1107 11:03:38.327020 962 |3 6 2|[0] xxxxxxxx oxxoxxxx [MSB]
1108 11:03:38.329605 963 |3 6 3|[0] xxxxxxxx oxxoooxx [MSB]
1109 11:03:38.333319 964 |3 6 4|[0] xxxxxxxx ooxoooox [MSB]
1110 11:03:38.336146 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1111 11:03:38.339566 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1112 11:03:38.343360 967 |3 6 7|[0] xxxxxxxx oooooooo [MSB]
1113 11:03:38.346702 968 |3 6 8|[0] xxxoxxxx oooooooo [MSB]
1114 11:03:38.350440 969 |3 6 9|[0] xxxoxoox oooooooo [MSB]
1115 11:03:38.353016 970 |3 6 10|[0] xxxoxoox oooooooo [MSB]
1116 11:03:38.356847 971 |3 6 11|[0] xxxoxoox oooooooo [MSB]
1117 11:03:38.360659 972 |3 6 12|[0] xxxooooo oooooooo [MSB]
1118 11:03:38.363634 973 |3 6 13|[0] xxoooooo oooooooo [MSB]
1119 11:03:38.370348 974 |3 6 14|[0] xxoooooo oooooooo [MSB]
1120 11:03:38.373045 986 |3 6 26|[0] oooooooo oooxoxoo [MSB]
1121 11:03:38.376560 987 |3 6 27|[0] oooooooo xxoxxxoo [MSB]
1122 11:03:38.379995 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1123 11:03:38.383588 989 |3 6 29|[0] oooxoooo xxxxxxxx [MSB]
1124 11:03:38.386991 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1125 11:03:38.390416 991 |3 6 31|[0] oooxoxoo xxxxxxxx [MSB]
1126 11:03:38.394013 992 |3 6 32|[0] xoxxxxxx xxxxxxxx [MSB]
1127 11:03:38.396723 993 |3 6 33|[0] xxxxxxxx xxxxxxxx [MSB]
1128 11:03:38.400361 Byte0, DQ PI dly=980, DQM PI dly= 980
1129 11:03:38.406985 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1130 11:03:38.407061
1131 11:03:38.410251 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1132 11:03:38.410326
1133 11:03:38.413834 Byte1, DQ PI dly=975, DQM PI dly= 975
1134 11:03:38.417466 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1135 11:03:38.417541
1136 11:03:38.423514 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1137 11:03:38.423589
1138 11:03:38.423646 ==
1139 11:03:38.427009 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1140 11:03:38.430960 fsp= 1, odt_onoff= 1, Byte mode= 0
1141 11:03:38.431035 ==
1142 11:03:38.437413 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1143 11:03:38.437488
1144 11:03:38.437546 Begin, DQ Scan Range 951~1015
1145 11:03:38.440813 Write Rank0 MR14 =0x0
1146 11:03:38.449051
1147 11:03:38.449172 CH=0, VrefRange= 0, VrefLevel = 0
1148 11:03:38.455798 TX Bit0 (977~993) 17 985, Bit8 (964~983) 20 973,
1149 11:03:38.459552 TX Bit1 (976~992) 17 984, Bit9 (966~983) 18 974,
1150 11:03:38.462844 TX Bit2 (976~992) 17 984, Bit10 (969~989) 21 979,
1151 11:03:38.469730 TX Bit3 (969~985) 17 977, Bit11 (965~982) 18 973,
1152 11:03:38.472794 TX Bit4 (974~992) 19 983, Bit12 (967~983) 17 975,
1153 11:03:38.479165 TX Bit5 (971~986) 16 978, Bit13 (966~982) 17 974,
1154 11:03:38.482634 TX Bit6 (972~986) 15 979, Bit14 (967~983) 17 975,
1155 11:03:38.486136 TX Bit7 (976~989) 14 982, Bit15 (968~983) 16 975,
1156 11:03:38.486210
1157 11:03:38.489470 Write Rank0 MR14 =0x2
1158 11:03:38.497971
1159 11:03:38.498044 CH=0, VrefRange= 0, VrefLevel = 2
1160 11:03:38.504541 TX Bit0 (976~993) 18 984, Bit8 (964~983) 20 973,
1161 11:03:38.507740 TX Bit1 (976~992) 17 984, Bit9 (966~983) 18 974,
1162 11:03:38.514306 TX Bit2 (975~992) 18 983, Bit10 (969~989) 21 979,
1163 11:03:38.517911 TX Bit3 (969~985) 17 977, Bit11 (965~982) 18 973,
1164 11:03:38.521123 TX Bit4 (974~992) 19 983, Bit12 (966~983) 18 974,
1165 11:03:38.528360 TX Bit5 (971~986) 16 978, Bit13 (966~982) 17 974,
1166 11:03:38.531036 TX Bit6 (971~988) 18 979, Bit14 (966~984) 19 975,
1167 11:03:38.534575 TX Bit7 (976~990) 15 983, Bit15 (968~984) 17 976,
1168 11:03:38.534650
1169 11:03:38.537841 Write Rank0 MR14 =0x4
1170 11:03:38.546557
1171 11:03:38.546632 CH=0, VrefRange= 0, VrefLevel = 4
1172 11:03:38.553087 TX Bit0 (976~993) 18 984, Bit8 (963~983) 21 973,
1173 11:03:38.556299 TX Bit1 (976~992) 17 984, Bit9 (966~983) 18 974,
1174 11:03:38.559841 TX Bit2 (976~992) 17 984, Bit10 (969~989) 21 979,
1175 11:03:38.566308 TX Bit3 (969~986) 18 977, Bit11 (964~982) 19 973,
1176 11:03:38.569906 TX Bit4 (974~993) 20 983, Bit12 (966~983) 18 974,
1177 11:03:38.576480 TX Bit5 (970~986) 17 978, Bit13 (966~982) 17 974,
1178 11:03:38.579808 TX Bit6 (971~987) 17 979, Bit14 (967~984) 18 975,
1179 11:03:38.583085 TX Bit7 (975~989) 15 982, Bit15 (968~984) 17 976,
1180 11:03:38.583161
1181 11:03:38.586626 Write Rank0 MR14 =0x6
1182 11:03:38.594894
1183 11:03:38.594967 CH=0, VrefRange= 0, VrefLevel = 6
1184 11:03:38.601507 TX Bit0 (976~994) 19 985, Bit8 (963~984) 22 973,
1185 11:03:38.605102 TX Bit1 (976~992) 17 984, Bit9 (965~983) 19 974,
1186 11:03:38.611543 TX Bit2 (975~992) 18 983, Bit10 (968~989) 22 978,
1187 11:03:38.615509 TX Bit3 (969~986) 18 977, Bit11 (963~983) 21 973,
1188 11:03:38.618735 TX Bit4 (974~993) 20 983, Bit12 (966~984) 19 975,
1189 11:03:38.625156 TX Bit5 (970~987) 18 978, Bit13 (965~983) 19 974,
1190 11:03:38.628509 TX Bit6 (970~988) 19 979, Bit14 (966~985) 20 975,
1191 11:03:38.632105 TX Bit7 (975~991) 17 983, Bit15 (968~985) 18 976,
1192 11:03:38.632180
1193 11:03:38.635349 Write Rank0 MR14 =0x8
1194 11:03:38.643965
1195 11:03:38.644039 CH=0, VrefRange= 0, VrefLevel = 8
1196 11:03:38.651005 TX Bit0 (976~994) 19 985, Bit8 (963~984) 22 973,
1197 11:03:38.653608 TX Bit1 (976~993) 18 984, Bit9 (966~984) 19 975,
1198 11:03:38.660888 TX Bit2 (975~993) 19 984, Bit10 (968~990) 23 979,
1199 11:03:38.664242 TX Bit3 (969~987) 19 978, Bit11 (964~983) 20 973,
1200 11:03:38.667077 TX Bit4 (973~993) 21 983, Bit12 (966~984) 19 975,
1201 11:03:38.674071 TX Bit5 (970~988) 19 979, Bit13 (965~983) 19 974,
1202 11:03:38.677839 TX Bit6 (970~990) 21 980, Bit14 (966~985) 20 975,
1203 11:03:38.681001 TX Bit7 (975~991) 17 983, Bit15 (968~986) 19 977,
1204 11:03:38.681093
1205 11:03:38.684263 Write Rank0 MR14 =0xa
1206 11:03:38.692728
1207 11:03:38.695977 CH=0, VrefRange= 0, VrefLevel = 10
1208 11:03:38.699421 TX Bit0 (976~994) 19 985, Bit8 (962~985) 24 973,
1209 11:03:38.702625 TX Bit1 (975~993) 19 984, Bit9 (965~984) 20 974,
1210 11:03:38.708905 TX Bit2 (975~993) 19 984, Bit10 (968~990) 23 979,
1211 11:03:38.760289 TX Bit3 (968~987) 20 977, Bit11 (963~983) 21 973,
1212 11:03:38.760988 TX Bit4 (973~994) 22 983, Bit12 (965~985) 21 975,
1213 11:03:38.761089 TX Bit5 (969~989) 21 979, Bit13 (964~984) 21 974,
1214 11:03:38.761430 TX Bit6 (970~990) 21 980, Bit14 (965~986) 22 975,
1215 11:03:38.761700 TX Bit7 (974~991) 18 982, Bit15 (968~986) 19 977,
1216 11:03:38.761785
1217 11:03:38.761866 Write Rank0 MR14 =0xc
1218 11:03:38.761941
1219 11:03:38.762212 CH=0, VrefRange= 0, VrefLevel = 12
1220 11:03:38.762846 TX Bit0 (975~995) 21 985, Bit8 (962~985) 24 973,
1221 11:03:38.763119 TX Bit1 (975~994) 20 984, Bit9 (965~985) 21 975,
1222 11:03:38.763264 TX Bit2 (974~993) 20 983, Bit10 (968~990) 23 979,
1223 11:03:38.763346 TX Bit3 (968~988) 21 978, Bit11 (963~984) 22 973,
1224 11:03:38.777285 TX Bit4 (973~994) 22 983, Bit12 (965~985) 21 975,
1225 11:03:38.777946 TX Bit5 (969~990) 22 979, Bit13 (963~984) 22 973,
1226 11:03:38.778337 TX Bit6 (970~990) 21 980, Bit14 (964~986) 23 975,
1227 11:03:38.780936 TX Bit7 (973~992) 20 982, Bit15 (968~987) 20 977,
1228 11:03:38.781021
1229 11:03:38.781103 Write Rank0 MR14 =0xe
1230 11:03:38.790459
1231 11:03:38.790555 CH=0, VrefRange= 0, VrefLevel = 14
1232 11:03:38.797327 TX Bit0 (975~995) 21 985, Bit8 (962~986) 25 974,
1233 11:03:38.800377 TX Bit1 (975~994) 20 984, Bit9 (964~986) 23 975,
1234 11:03:38.807652 TX Bit2 (974~993) 20 983, Bit10 (968~990) 23 979,
1235 11:03:38.810572 TX Bit3 (968~988) 21 978, Bit11 (962~984) 23 973,
1236 11:03:38.813743 TX Bit4 (972~994) 23 983, Bit12 (964~986) 23 975,
1237 11:03:38.820438 TX Bit5 (969~990) 22 979, Bit13 (963~984) 22 973,
1238 11:03:38.823834 TX Bit6 (970~990) 21 980, Bit14 (965~987) 23 976,
1239 11:03:38.827636 TX Bit7 (973~992) 20 982, Bit15 (967~988) 22 977,
1240 11:03:38.827724
1241 11:03:38.830838 Write Rank0 MR14 =0x10
1242 11:03:38.839548
1243 11:03:38.842829 CH=0, VrefRange= 0, VrefLevel = 16
1244 11:03:38.846441 TX Bit0 (975~996) 22 985, Bit8 (961~986) 26 973,
1245 11:03:38.849763 TX Bit1 (974~994) 21 984, Bit9 (964~986) 23 975,
1246 11:03:38.853288 TX Bit2 (973~994) 22 983, Bit10 (968~990) 23 979,
1247 11:03:38.859567 TX Bit3 (968~989) 22 978, Bit11 (962~985) 24 973,
1248 11:03:38.863512 TX Bit4 (972~995) 24 983, Bit12 (964~986) 23 975,
1249 11:03:38.869527 TX Bit5 (969~990) 22 979, Bit13 (962~985) 24 973,
1250 11:03:38.873566 TX Bit6 (969~991) 23 980, Bit14 (963~988) 26 975,
1251 11:03:38.876557 TX Bit7 (972~992) 21 982, Bit15 (967~988) 22 977,
1252 11:03:38.876650
1253 11:03:38.879774 Write Rank0 MR14 =0x12
1254 11:03:38.888876
1255 11:03:38.891931 CH=0, VrefRange= 0, VrefLevel = 18
1256 11:03:38.896560 TX Bit0 (975~996) 22 985, Bit8 (962~987) 26 974,
1257 11:03:38.899391 TX Bit1 (973~994) 22 983, Bit9 (964~987) 24 975,
1258 11:03:38.905726 TX Bit2 (974~994) 21 984, Bit10 (967~991) 25 979,
1259 11:03:38.909430 TX Bit3 (967~990) 24 978, Bit11 (962~985) 24 973,
1260 11:03:38.912162 TX Bit4 (971~995) 25 983, Bit12 (963~987) 25 975,
1261 11:03:38.918889 TX Bit5 (969~991) 23 980, Bit13 (963~985) 23 974,
1262 11:03:38.922381 TX Bit6 (969~991) 23 980, Bit14 (964~988) 25 976,
1263 11:03:38.925775 TX Bit7 (971~993) 23 982, Bit15 (967~989) 23 978,
1264 11:03:38.925863
1265 11:03:38.928734 Write Rank0 MR14 =0x14
1266 11:03:38.937931
1267 11:03:38.941851 CH=0, VrefRange= 0, VrefLevel = 20
1268 11:03:38.945233 TX Bit0 (974~997) 24 985, Bit8 (961~987) 27 974,
1269 11:03:38.948362 TX Bit1 (973~995) 23 984, Bit9 (963~988) 26 975,
1270 11:03:38.954888 TX Bit2 (973~995) 23 984, Bit10 (967~991) 25 979,
1271 11:03:38.958452 TX Bit3 (967~991) 25 979, Bit11 (961~986) 26 973,
1272 11:03:38.961921 TX Bit4 (971~996) 26 983, Bit12 (963~987) 25 975,
1273 11:03:38.968814 TX Bit5 (968~991) 24 979, Bit13 (962~986) 25 974,
1274 11:03:38.971709 TX Bit6 (969~992) 24 980, Bit14 (962~988) 27 975,
1275 11:03:38.975176 TX Bit7 (971~993) 23 982, Bit15 (966~989) 24 977,
1276 11:03:38.975250
1277 11:03:38.978637 Write Rank0 MR14 =0x16
1278 11:03:38.987667
1279 11:03:38.991286 CH=0, VrefRange= 0, VrefLevel = 22
1280 11:03:38.994262 TX Bit0 (973~998) 26 985, Bit8 (961~987) 27 974,
1281 11:03:38.998085 TX Bit1 (973~995) 23 984, Bit9 (962~988) 27 975,
1282 11:03:39.004304 TX Bit2 (972~995) 24 983, Bit10 (967~991) 25 979,
1283 11:03:39.007383 TX Bit3 (967~991) 25 979, Bit11 (961~986) 26 973,
1284 11:03:39.011092 TX Bit4 (972~996) 25 984, Bit12 (963~987) 25 975,
1285 11:03:39.018151 TX Bit5 (968~991) 24 979, Bit13 (962~986) 25 974,
1286 11:03:39.021113 TX Bit6 (969~992) 24 980, Bit14 (962~988) 27 975,
1287 11:03:39.024085 TX Bit7 (972~994) 23 983, Bit15 (966~989) 24 977,
1288 11:03:39.024160
1289 11:03:39.027458 Write Rank0 MR14 =0x18
1290 11:03:39.037226
1291 11:03:39.037298 CH=0, VrefRange= 0, VrefLevel = 24
1292 11:03:39.043707 TX Bit0 (973~998) 26 985, Bit8 (961~986) 26 973,
1293 11:03:39.047243 TX Bit1 (973~996) 24 984, Bit9 (963~988) 26 975,
1294 11:03:39.053961 TX Bit2 (972~995) 24 983, Bit10 (968~991) 24 979,
1295 11:03:39.057433 TX Bit3 (967~991) 25 979, Bit11 (961~986) 26 973,
1296 11:03:39.060908 TX Bit4 (971~996) 26 983, Bit12 (962~987) 26 974,
1297 11:03:39.067204 TX Bit5 (968~991) 24 979, Bit13 (962~985) 24 973,
1298 11:03:39.070535 TX Bit6 (969~993) 25 981, Bit14 (962~987) 26 974,
1299 11:03:39.073736 TX Bit7 (971~994) 24 982, Bit15 (966~990) 25 978,
1300 11:03:39.073810
1301 11:03:39.077441 Write Rank0 MR14 =0x1a
1302 11:03:39.086649
1303 11:03:39.086722 CH=0, VrefRange= 0, VrefLevel = 26
1304 11:03:39.093884 TX Bit0 (973~998) 26 985, Bit8 (961~986) 26 973,
1305 11:03:39.096603 TX Bit1 (973~996) 24 984, Bit9 (963~988) 26 975,
1306 11:03:39.100153 TX Bit2 (972~995) 24 983, Bit10 (968~991) 24 979,
1307 11:03:39.106579 TX Bit3 (967~991) 25 979, Bit11 (961~986) 26 973,
1308 11:03:39.110068 TX Bit4 (971~996) 26 983, Bit12 (962~987) 26 974,
1309 11:03:39.116882 TX Bit5 (968~991) 24 979, Bit13 (962~985) 24 973,
1310 11:03:39.120118 TX Bit6 (969~993) 25 981, Bit14 (962~987) 26 974,
1311 11:03:39.123868 TX Bit7 (971~994) 24 982, Bit15 (966~990) 25 978,
1312 11:03:39.123942
1313 11:03:39.126916 Write Rank0 MR14 =0x1c
1314 11:03:39.136310
1315 11:03:39.139438 CH=0, VrefRange= 0, VrefLevel = 28
1316 11:03:39.142532 TX Bit0 (973~998) 26 985, Bit8 (961~986) 26 973,
1317 11:03:39.146616 TX Bit1 (973~996) 24 984, Bit9 (963~988) 26 975,
1318 11:03:39.152373 TX Bit2 (972~995) 24 983, Bit10 (968~991) 24 979,
1319 11:03:39.156204 TX Bit3 (967~991) 25 979, Bit11 (961~986) 26 973,
1320 11:03:39.159312 TX Bit4 (971~996) 26 983, Bit12 (962~987) 26 974,
1321 11:03:39.165911 TX Bit5 (968~991) 24 979, Bit13 (962~985) 24 973,
1322 11:03:39.169517 TX Bit6 (969~993) 25 981, Bit14 (962~987) 26 974,
1323 11:03:39.172744 TX Bit7 (971~994) 24 982, Bit15 (966~990) 25 978,
1324 11:03:39.172818
1325 11:03:39.175778 Write Rank0 MR14 =0x1e
1326 11:03:39.185054
1327 11:03:39.188543 CH=0, VrefRange= 0, VrefLevel = 30
1328 11:03:39.191862 TX Bit0 (973~998) 26 985, Bit8 (961~986) 26 973,
1329 11:03:39.196106 TX Bit1 (973~996) 24 984, Bit9 (963~988) 26 975,
1330 11:03:39.201737 TX Bit2 (972~995) 24 983, Bit10 (968~991) 24 979,
1331 11:03:39.205614 TX Bit3 (967~991) 25 979, Bit11 (961~986) 26 973,
1332 11:03:39.208800 TX Bit4 (971~996) 26 983, Bit12 (962~987) 26 974,
1333 11:03:39.215535 TX Bit5 (968~991) 24 979, Bit13 (962~985) 24 973,
1334 11:03:39.218938 TX Bit6 (969~993) 25 981, Bit14 (962~987) 26 974,
1335 11:03:39.221858 TX Bit7 (971~994) 24 982, Bit15 (966~990) 25 978,
1336 11:03:39.221933
1337 11:03:39.221989
1338 11:03:39.225300 TX Vref found, early break! 372< 380
1339 11:03:39.232338 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1340 11:03:39.236023 u1DelayCellOfst[0]=7 cells (6 PI)
1341 11:03:39.238890 u1DelayCellOfst[1]=6 cells (5 PI)
1342 11:03:39.242805 u1DelayCellOfst[2]=5 cells (4 PI)
1343 11:03:39.242901 u1DelayCellOfst[3]=0 cells (0 PI)
1344 11:03:39.245312 u1DelayCellOfst[4]=5 cells (4 PI)
1345 11:03:39.249024 u1DelayCellOfst[5]=0 cells (0 PI)
1346 11:03:39.252198 u1DelayCellOfst[6]=2 cells (2 PI)
1347 11:03:39.255510 u1DelayCellOfst[7]=3 cells (3 PI)
1348 11:03:39.259066 Byte0, DQ PI dly=979, DQM PI dly= 982
1349 11:03:39.262289 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1350 11:03:39.262383
1351 11:03:39.269684 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1352 11:03:39.269762
1353 11:03:39.272427 u1DelayCellOfst[8]=0 cells (0 PI)
1354 11:03:39.275923 u1DelayCellOfst[9]=2 cells (2 PI)
1355 11:03:39.276012 u1DelayCellOfst[10]=7 cells (6 PI)
1356 11:03:39.279184 u1DelayCellOfst[11]=0 cells (0 PI)
1357 11:03:39.282808 u1DelayCellOfst[12]=1 cells (1 PI)
1358 11:03:39.285497 u1DelayCellOfst[13]=0 cells (0 PI)
1359 11:03:39.288854 u1DelayCellOfst[14]=1 cells (1 PI)
1360 11:03:39.292530 u1DelayCellOfst[15]=6 cells (5 PI)
1361 11:03:39.295766 Byte1, DQ PI dly=973, DQM PI dly= 976
1362 11:03:39.299149 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)
1363 11:03:39.299252
1364 11:03:39.305832 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)
1365 11:03:39.305900
1366 11:03:39.305956 Write Rank0 MR14 =0x18
1367 11:03:39.306038
1368 11:03:39.309477 Final TX Range 0 Vref 24
1369 11:03:39.309550
1370 11:03:39.315841 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1371 11:03:39.315908
1372 11:03:39.322770 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1373 11:03:39.329267 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1374 11:03:39.336145 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1375 11:03:39.339356 Write Rank0 MR3 =0xb0
1376 11:03:39.339444 DramC Write-DBI on
1377 11:03:39.339532 ==
1378 11:03:39.346108 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1379 11:03:39.349343 fsp= 1, odt_onoff= 1, Byte mode= 0
1380 11:03:39.349410 ==
1381 11:03:39.353255 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1382 11:03:39.353319
1383 11:03:39.356514 Begin, DQ Scan Range 696~760
1384 11:03:39.356600
1385 11:03:39.356678
1386 11:03:39.359564 TX Vref Scan disable
1387 11:03:39.362874 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1388 11:03:39.366263 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1389 11:03:39.369521 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1390 11:03:39.373089 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1391 11:03:39.377000 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1392 11:03:39.379756 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1393 11:03:39.383280 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1394 11:03:39.386440 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1395 11:03:39.390010 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1396 11:03:39.393274 705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]
1397 11:03:39.396926 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1398 11:03:39.400095 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1399 11:03:39.403133 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1400 11:03:39.406522 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1401 11:03:39.410224 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1402 11:03:39.413479 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1403 11:03:39.416785 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1404 11:03:39.419971 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1405 11:03:39.429318 733 |2 6 29|[0] oooooooo xxxxxxxx [MSB]
1406 11:03:39.432806 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1407 11:03:39.435791 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1408 11:03:39.439154 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1409 11:03:39.442784 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1410 11:03:39.445746 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1411 11:03:39.449419 739 |2 6 35|[0] xxxxxxxx xxxxxxxx [MSB]
1412 11:03:39.452669 Byte0, DQ PI dly=726, DQM PI dly= 726
1413 11:03:39.455861 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 22)
1414 11:03:39.455936
1415 11:03:39.459514 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 22)
1416 11:03:39.462746
1417 11:03:39.466105 Byte1, DQ PI dly=718, DQM PI dly= 718
1418 11:03:39.470003 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 14)
1419 11:03:39.470078
1420 11:03:39.472970 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 14)
1421 11:03:39.473044
1422 11:03:39.480099 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1423 11:03:39.486402 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1424 11:03:39.492792 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1425 11:03:39.496045 Write Rank0 MR3 =0x30
1426 11:03:39.499766 DramC Write-DBI off
1427 11:03:39.499840
1428 11:03:39.499897 [DATLAT]
1429 11:03:39.503169 Freq=1600, CH0 RK0, use_rxtx_scan=0
1430 11:03:39.503243
1431 11:03:39.503301 DATLAT Default: 0xf
1432 11:03:39.506103 7, 0xFFFF, sum=0
1433 11:03:39.506178 8, 0xFFFF, sum=0
1434 11:03:39.509391 9, 0xFFFF, sum=0
1435 11:03:39.509467 10, 0xFFFF, sum=0
1436 11:03:39.512853 11, 0xFFFF, sum=0
1437 11:03:39.512928 12, 0xFFFF, sum=0
1438 11:03:39.516168 13, 0xFFFF, sum=0
1439 11:03:39.516243 14, 0x0, sum=1
1440 11:03:39.519628 15, 0x0, sum=2
1441 11:03:39.519703 16, 0x0, sum=3
1442 11:03:39.519762 17, 0x0, sum=4
1443 11:03:39.526464 pattern=2 first_step=14 total pass=5 best_step=16
1444 11:03:39.526538 ==
1445 11:03:39.529834 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1446 11:03:39.532942 fsp= 1, odt_onoff= 1, Byte mode= 0
1447 11:03:39.533041 ==
1448 11:03:39.539975 Start DQ dly to find pass range UseTestEngine =1
1449 11:03:39.542963 x-axis: bit #, y-axis: DQ dly (-127~63)
1450 11:03:39.543060 RX Vref Scan = 1
1451 11:03:39.665696
1452 11:03:39.665811 RX Vref found, early break!
1453 11:03:39.665907
1454 11:03:39.672479 Final RX Vref 12, apply to both rank0 and 1
1455 11:03:39.672587 ==
1456 11:03:39.675643 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1457 11:03:39.679243 fsp= 1, odt_onoff= 1, Byte mode= 0
1458 11:03:39.679336 ==
1459 11:03:39.679423 DQS Delay:
1460 11:03:39.682242 DQS0 = 0, DQS1 = 0
1461 11:03:39.682340 DQM Delay:
1462 11:03:39.685877 DQM0 = 20, DQM1 = 18
1463 11:03:39.685956 DQ Delay:
1464 11:03:39.689150 DQ0 =25, DQ1 =25, DQ2 =24, DQ3 =15
1465 11:03:39.692546 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
1466 11:03:39.695786 DQ8 =18, DQ9 =19, DQ10 =24, DQ11 =16
1467 11:03:39.699228 DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20
1468 11:03:39.699317
1469 11:03:39.699401
1470 11:03:39.699481
1471 11:03:39.702734 [DramC_TX_OE_Calibration] TA2
1472 11:03:39.706034 Original DQ_B0 (3 6) =30, OEN = 27
1473 11:03:39.709265 Original DQ_B1 (3 6) =30, OEN = 27
1474 11:03:39.712722 23, 0x0, End_B0=23 End_B1=23
1475 11:03:39.712814 24, 0x0, End_B0=24 End_B1=24
1476 11:03:39.715913 25, 0x0, End_B0=25 End_B1=25
1477 11:03:39.719249 26, 0x0, End_B0=26 End_B1=26
1478 11:03:39.722539 27, 0x0, End_B0=27 End_B1=27
1479 11:03:39.722614 28, 0x0, End_B0=28 End_B1=28
1480 11:03:39.725843 29, 0x0, End_B0=29 End_B1=29
1481 11:03:39.729679 30, 0x0, End_B0=30 End_B1=30
1482 11:03:39.732535 31, 0xFFFF, End_B0=30 End_B1=30
1483 11:03:39.736164 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1484 11:03:39.743004 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1485 11:03:39.743078
1486 11:03:39.743135
1487 11:03:39.746563 Write Rank0 MR23 =0x3f
1488 11:03:39.746637 [DQSOSC]
1489 11:03:39.752701 [DQSOSCAuto] RK0, (LSB)MR18= 0xab, (MSB)MR19= 0x3, tDQSOscB0 = 335 ps tDQSOscB1 = 0 ps
1490 11:03:39.759673 CH0_RK0: MR19=0x3, MR18=0xAB, DQSOSC=335, MR23=63, INC=21, DEC=32
1491 11:03:39.763261 Write Rank0 MR23 =0x3f
1492 11:03:39.763335 [DQSOSC]
1493 11:03:39.769364 [DQSOSCAuto] RK0, (LSB)MR18= 0xa6, (MSB)MR19= 0x3, tDQSOscB0 = 337 ps tDQSOscB1 = 0 ps
1494 11:03:39.772820 CH0 RK0: MR19=3, MR18=A6
1495 11:03:39.776083 [RankSwap] Rank num 2, (Multi 1), Rank 1
1496 11:03:39.776159 Write Rank0 MR2 =0xad
1497 11:03:39.779771 [Write Leveling]
1498 11:03:39.783270 delay byte0 byte1 byte2 byte3
1499 11:03:39.783344
1500 11:03:39.783402 10 0 0
1501 11:03:39.786851 11 0 0
1502 11:03:39.786926 12 0 0
1503 11:03:39.789722 13 0 0
1504 11:03:39.789797 14 0 0
1505 11:03:39.789856 15 0 0
1506 11:03:39.792826 16 0 0
1507 11:03:39.792901 17 0 0
1508 11:03:39.796311 18 0 0
1509 11:03:39.796386 19 0 0
1510 11:03:39.796444 20 0 0
1511 11:03:39.799559 21 0 0
1512 11:03:39.799634 22 0 0
1513 11:03:39.803022 23 0 0
1514 11:03:39.803097 24 0 0
1515 11:03:39.806357 25 0 0
1516 11:03:39.806432 26 0 0
1517 11:03:39.806491 27 0 0
1518 11:03:39.809724 28 0 ff
1519 11:03:39.809799 29 0 ff
1520 11:03:39.812726 30 0 ff
1521 11:03:39.812801 31 0 ff
1522 11:03:39.816386 32 0 ff
1523 11:03:39.816461 33 ff ff
1524 11:03:39.816520 34 0 ff
1525 11:03:39.819794 35 ff ff
1526 11:03:39.819869 36 ff ff
1527 11:03:39.823305 37 ff ff
1528 11:03:39.823381 38 ff ff
1529 11:03:39.826468 39 ff ff
1530 11:03:39.826546 40 ff ff
1531 11:03:39.829783 41 ff ff
1532 11:03:39.832922 pass bytecount = 0xff (0xff: all bytes pass)
1533 11:03:39.832996
1534 11:03:39.833054 DQS0 dly: 35
1535 11:03:39.836515 DQS1 dly: 28
1536 11:03:39.836589 Write Rank0 MR2 =0x2d
1537 11:03:39.840174 [RankSwap] Rank num 2, (Multi 1), Rank 0
1538 11:03:39.843234 Write Rank1 MR1 =0xd6
1539 11:03:39.843308 [Gating]
1540 11:03:39.843365 ==
1541 11:03:39.850082 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1542 11:03:39.853401 fsp= 1, odt_onoff= 1, Byte mode= 0
1543 11:03:39.853475 ==
1544 11:03:39.856525 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1545 11:03:39.860147 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1546 11:03:39.866664 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 1)| 0
1547 11:03:39.869878 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1548 11:03:39.873526 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1549 11:03:39.880065 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1550 11:03:39.883329 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1551 11:03:39.886841 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1552 11:03:39.890459 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1553 11:03:39.897375 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1554 11:03:39.900223 3 2 8 |404 2c2b |(11 11)(11 11) |(1 0)(0 0)| 0
1555 11:03:39.903389 3 2 12 |201 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
1556 11:03:39.909973 3 2 16 |3534 606 |(11 11)(11 11) |(0 0)(0 0)| 0
1557 11:03:39.913302 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1558 11:03:39.916760 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1559 11:03:39.920448 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1560 11:03:39.926696 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1561 11:03:39.930254 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1562 11:03:39.933724 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1563 11:03:39.940742 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1564 11:03:39.943606 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1565 11:03:39.947229 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1566 11:03:39.953675 [Byte 1] Lead/lag falling Transition (3, 3, 20)
1567 11:03:39.956958 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1568 11:03:39.960667 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1569 11:03:39.964097 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1570 11:03:39.970747 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1571 11:03:39.973635 3 4 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1572 11:03:39.977103 3 4 12 |908 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1573 11:03:39.984122 3 4 16 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1574 11:03:39.986922 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1575 11:03:39.991114 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1576 11:03:39.997333 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1577 11:03:40.000681 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1578 11:03:40.003883 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1579 11:03:40.007382 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1580 11:03:40.014097 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1581 11:03:40.017444 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1582 11:03:40.020853 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1583 11:03:40.027195 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1584 11:03:40.030747 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1585 11:03:40.033865 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1586 11:03:40.037637 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1587 11:03:40.043889 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1588 11:03:40.047379 [Byte 0] Lead/lag Transition tap number (2)
1589 11:03:40.051043 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1590 11:03:40.054250 3 6 8 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1591 11:03:40.060967 [Byte 1] Lead/lag Transition tap number (2)
1592 11:03:40.064314 3 6 12 |202 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1593 11:03:40.067436 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1594 11:03:40.070696 [Byte 0]First pass (3, 6, 16)
1595 11:03:40.074425 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1596 11:03:40.077446 [Byte 1]First pass (3, 6, 20)
1597 11:03:40.081084 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1598 11:03:40.084589 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1599 11:03:40.087573 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1600 11:03:40.094590 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1601 11:03:40.098253 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1602 11:03:40.101460 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1603 11:03:40.104993 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1604 11:03:40.107832 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1605 11:03:40.114471 All bytes gating window > 1UI, Early break!
1606 11:03:40.114546
1607 11:03:40.117978 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1608 11:03:40.118052
1609 11:03:40.121353 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1610 11:03:40.121428
1611 11:03:40.121486
1612 11:03:40.121539
1613 11:03:40.124839 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1614 11:03:40.124913
1615 11:03:40.127726 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1616 11:03:40.127801
1617 11:03:40.127858
1618 11:03:40.131323 Write Rank1 MR1 =0x56
1619 11:03:40.131398
1620 11:03:40.134671 best RODT dly(2T, 0.5T) = (2, 3)
1621 11:03:40.134744
1622 11:03:40.137940 best RODT dly(2T, 0.5T) = (2, 3)
1623 11:03:40.138015 ==
1624 11:03:40.141393 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1625 11:03:40.144906 fsp= 1, odt_onoff= 1, Byte mode= 0
1626 11:03:40.144981 ==
1627 11:03:40.151389 Start DQ dly to find pass range UseTestEngine =0
1628 11:03:40.154866 x-axis: bit #, y-axis: DQ dly (-127~63)
1629 11:03:40.154941 RX Vref Scan = 0
1630 11:03:40.158518 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1631 11:03:40.161438 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1632 11:03:40.164969 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1633 11:03:40.168274 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1634 11:03:40.171328 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1635 11:03:40.171404 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1636 11:03:40.175265 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1637 11:03:40.178114 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1638 11:03:40.181820 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1639 11:03:40.185328 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1640 11:03:40.188133 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1641 11:03:40.191731 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1642 11:03:40.195249 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1643 11:03:40.195326 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1644 11:03:40.198450 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1645 11:03:40.201618 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1646 11:03:40.204890 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1647 11:03:40.208698 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1648 11:03:40.212114 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1649 11:03:40.214828 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1650 11:03:40.218835 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1651 11:03:40.218910 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1652 11:03:40.222119 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1653 11:03:40.224892 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1654 11:03:40.228828 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1655 11:03:40.231724 -1, [0] xxxxxxxx xxxoxxxx [MSB]
1656 11:03:40.235102 0, [0] xxxxxxxx xxxoxxxx [MSB]
1657 11:03:40.235177 1, [0] xxxoxoxx oxxoxoxx [MSB]
1658 11:03:40.238728 2, [0] xxxoxoxx ooxoooox [MSB]
1659 11:03:40.241681 3, [0] xxxoxooo ooxoooox [MSB]
1660 11:03:40.244944 4, [0] xxxoxooo ooxoooox [MSB]
1661 11:03:40.248922 5, [0] xxxoxooo ooxooooo [MSB]
1662 11:03:40.252111 6, [0] xxxooooo oooooooo [MSB]
1663 11:03:40.252186 7, [0] xoxooooo oooooooo [MSB]
1664 11:03:40.255612 8, [0] xooooooo oooooooo [MSB]
1665 11:03:40.258879 9, [0] xooooooo oooooooo [MSB]
1666 11:03:40.261683 10, [0] xooooooo oooooooo [MSB]
1667 11:03:40.265436 33, [0] oooooooo oooooooo [MSB]
1668 11:03:40.268844 34, [0] oooxoooo oooooooo [MSB]
1669 11:03:40.268919 35, [0] oooxooxo oooooxxo [MSB]
1670 11:03:40.271850 36, [0] oooxooxx xooxoxxo [MSB]
1671 11:03:40.275248 37, [0] oooxoxxx xxoxxxxo [MSB]
1672 11:03:40.278909 38, [0] oooxoxxx xxoxxxxx [MSB]
1673 11:03:40.282070 39, [0] oooxoxxx xxoxxxxx [MSB]
1674 11:03:40.285736 40, [0] oooxoxxx xxoxxxxx [MSB]
1675 11:03:40.285813 41, [0] xooxxxxx xxoxxxxx [MSB]
1676 11:03:40.288830 42, [0] xoxxxxxx xxoxxxxx [MSB]
1677 11:03:40.292055 43, [0] xxxxxxxx xxxxxxxx [MSB]
1678 11:03:40.295649 iDelay=43, Bit 0, Center 25 (11 ~ 40) 30
1679 11:03:40.299209 iDelay=43, Bit 1, Center 24 (7 ~ 42) 36
1680 11:03:40.302611 iDelay=43, Bit 2, Center 24 (8 ~ 41) 34
1681 11:03:40.305488 iDelay=43, Bit 3, Center 17 (1 ~ 33) 33
1682 11:03:40.309473 iDelay=43, Bit 4, Center 23 (6 ~ 40) 35
1683 11:03:40.315723 iDelay=43, Bit 5, Center 18 (1 ~ 36) 36
1684 11:03:40.319299 iDelay=43, Bit 6, Center 18 (3 ~ 34) 32
1685 11:03:40.322230 iDelay=43, Bit 7, Center 19 (3 ~ 35) 33
1686 11:03:40.325551 iDelay=43, Bit 8, Center 18 (1 ~ 35) 35
1687 11:03:40.329057 iDelay=43, Bit 9, Center 19 (2 ~ 36) 35
1688 11:03:40.332583 iDelay=43, Bit 10, Center 24 (6 ~ 42) 37
1689 11:03:40.335646 iDelay=43, Bit 11, Center 17 (-1 ~ 35) 37
1690 11:03:40.339397 iDelay=43, Bit 12, Center 19 (2 ~ 36) 35
1691 11:03:40.342923 iDelay=43, Bit 13, Center 17 (1 ~ 34) 34
1692 11:03:40.345845 iDelay=43, Bit 14, Center 18 (2 ~ 34) 33
1693 11:03:40.349408 iDelay=43, Bit 15, Center 21 (5 ~ 37) 33
1694 11:03:40.349482 ==
1695 11:03:40.355880 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1696 11:03:40.359280 fsp= 1, odt_onoff= 1, Byte mode= 0
1697 11:03:40.359355 ==
1698 11:03:40.359413 DQS Delay:
1699 11:03:40.362834 DQS0 = 0, DQS1 = 0
1700 11:03:40.362908 DQM Delay:
1701 11:03:40.362966 DQM0 = 21, DQM1 = 19
1702 11:03:40.365834 DQ Delay:
1703 11:03:40.369399 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =17
1704 11:03:40.372905 DQ4 =23, DQ5 =18, DQ6 =18, DQ7 =19
1705 11:03:40.376180 DQ8 =18, DQ9 =19, DQ10 =24, DQ11 =17
1706 11:03:40.379801 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =21
1707 11:03:40.379875
1708 11:03:40.379932
1709 11:03:40.379986 DramC Write-DBI off
1710 11:03:40.380037 ==
1711 11:03:40.385920 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1712 11:03:40.389416 fsp= 1, odt_onoff= 1, Byte mode= 0
1713 11:03:40.389490 ==
1714 11:03:40.392787 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1715 11:03:40.392861
1716 11:03:40.396185 Begin, DQ Scan Range 924~1180
1717 11:03:40.396259
1718 11:03:40.396316
1719 11:03:40.399915 TX Vref Scan disable
1720 11:03:40.403254 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1721 11:03:40.406260 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1722 11:03:40.409613 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1723 11:03:40.413087 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1724 11:03:40.416537 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1725 11:03:40.419601 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1726 11:03:40.422755 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1727 11:03:40.426449 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1728 11:03:40.429761 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1729 11:03:40.433057 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1730 11:03:40.436504 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1731 11:03:40.440192 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1732 11:03:40.443006 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1733 11:03:40.446517 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1734 11:03:40.449981 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1735 11:03:40.456449 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1736 11:03:40.460549 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1737 11:03:40.463411 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1738 11:03:40.466536 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1739 11:03:40.470459 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1740 11:03:40.473106 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1741 11:03:40.476445 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1742 11:03:40.479999 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1743 11:03:40.483389 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1744 11:03:40.486592 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1745 11:03:40.490088 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1746 11:03:40.493628 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1747 11:03:40.496798 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1748 11:03:40.500055 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1749 11:03:40.503201 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1750 11:03:40.506843 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1751 11:03:40.509895 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1752 11:03:40.516740 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1753 11:03:40.521320 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1754 11:03:40.523429 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1755 11:03:40.527205 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1756 11:03:40.530371 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1757 11:03:40.533793 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1758 11:03:40.536914 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1759 11:03:40.540570 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1760 11:03:40.543689 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1761 11:03:40.547196 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1762 11:03:40.550641 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1763 11:03:40.553872 967 |3 6 7|[0] xxxxxxxx xxxoxoxx [MSB]
1764 11:03:40.556977 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1765 11:03:40.560342 969 |3 6 9|[0] xxxxxxxx ooxooooo [MSB]
1766 11:03:40.563961 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1767 11:03:40.567370 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1768 11:03:40.570417 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1769 11:03:40.573727 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1770 11:03:40.577319 974 |3 6 14|[0] xxxoxxox oooooooo [MSB]
1771 11:03:40.580468 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1772 11:03:40.584136 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1773 11:03:40.587344 977 |3 6 17|[0] xxxooooo oooooooo [MSB]
1774 11:03:40.595223 988 |3 6 28|[0] oooooooo oooooxoo [MSB]
1775 11:03:40.598449 989 |3 6 29|[0] oooooooo xooxoxoo [MSB]
1776 11:03:40.601849 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1777 11:03:40.604859 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1778 11:03:40.608328 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1779 11:03:40.611568 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1780 11:03:40.615305 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1781 11:03:40.618228 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
1782 11:03:40.621475 996 |3 6 36|[0] oooooxoo xxxxxxxx [MSB]
1783 11:03:40.625008 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1784 11:03:40.628933 998 |3 6 38|[0] oooxoxxo xxxxxxxx [MSB]
1785 11:03:40.631998 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1786 11:03:40.635391 Byte0, DQ PI dly=986, DQM PI dly= 986
1787 11:03:40.638647 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1788 11:03:40.642227
1789 11:03:40.645712 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1790 11:03:40.645787
1791 11:03:40.648811 Byte1, DQ PI dly=978, DQM PI dly= 978
1792 11:03:40.651785 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1793 11:03:40.651860
1794 11:03:40.655023 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1795 11:03:40.659012
1796 11:03:40.659085 ==
1797 11:03:40.661753 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1798 11:03:40.665313 fsp= 1, odt_onoff= 1, Byte mode= 0
1799 11:03:40.665388 ==
1800 11:03:40.668568 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1801 11:03:40.668642
1802 11:03:40.672105 Begin, DQ Scan Range 954~1018
1803 11:03:40.675057 Write Rank1 MR14 =0x0
1804 11:03:40.683507
1805 11:03:40.683579 CH=0, VrefRange= 0, VrefLevel = 0
1806 11:03:40.690603 TX Bit0 (981~999) 19 990, Bit8 (969~984) 16 976,
1807 11:03:40.694040 TX Bit1 (980~997) 18 988, Bit9 (969~985) 17 977,
1808 11:03:40.700769 TX Bit2 (980~997) 18 988, Bit10 (974~990) 17 982,
1809 11:03:40.704104 TX Bit3 (974~992) 19 983, Bit11 (968~984) 17 976,
1810 11:03:40.707074 TX Bit4 (980~998) 19 989, Bit12 (969~985) 17 977,
1811 11:03:40.714049 TX Bit5 (977~991) 15 984, Bit13 (968~983) 16 975,
1812 11:03:40.717069 TX Bit6 (977~992) 16 984, Bit14 (969~984) 16 976,
1813 11:03:40.720464 TX Bit7 (978~994) 17 986, Bit15 (973~987) 15 980,
1814 11:03:40.720538
1815 11:03:40.723993 Write Rank1 MR14 =0x2
1816 11:03:40.733257
1817 11:03:40.733330 CH=0, VrefRange= 0, VrefLevel = 2
1818 11:03:40.739490 TX Bit0 (981~999) 19 990, Bit8 (969~985) 17 977,
1819 11:03:40.742907 TX Bit1 (979~998) 20 988, Bit9 (969~985) 17 977,
1820 11:03:40.749636 TX Bit2 (979~998) 20 988, Bit10 (974~990) 17 982,
1821 11:03:40.752788 TX Bit3 (974~992) 19 983, Bit11 (968~984) 17 976,
1822 11:03:40.756148 TX Bit4 (979~998) 20 988, Bit12 (969~985) 17 977,
1823 11:03:40.763169 TX Bit5 (977~991) 15 984, Bit13 (968~983) 16 975,
1824 11:03:40.766504 TX Bit6 (977~993) 17 985, Bit14 (969~985) 17 977,
1825 11:03:40.769836 TX Bit7 (978~995) 18 986, Bit15 (973~988) 16 980,
1826 11:03:40.769911
1827 11:03:40.773465 Write Rank1 MR14 =0x4
1828 11:03:40.782033
1829 11:03:40.782108 CH=0, VrefRange= 0, VrefLevel = 4
1830 11:03:40.788564 TX Bit0 (980~999) 20 989, Bit8 (968~985) 18 976,
1831 11:03:40.792174 TX Bit1 (979~998) 20 988, Bit9 (969~986) 18 977,
1832 11:03:40.799038 TX Bit2 (979~998) 20 988, Bit10 (973~990) 18 981,
1833 11:03:40.802266 TX Bit3 (974~993) 20 983, Bit11 (968~985) 18 976,
1834 11:03:40.805456 TX Bit4 (979~998) 20 988, Bit12 (969~985) 17 977,
1835 11:03:40.812542 TX Bit5 (976~992) 17 984, Bit13 (968~984) 17 976,
1836 11:03:40.815576 TX Bit6 (977~994) 18 985, Bit14 (969~985) 17 977,
1837 11:03:40.819016 TX Bit7 (978~996) 19 987, Bit15 (972~989) 18 980,
1838 11:03:40.819089
1839 11:03:40.822146 Write Rank1 MR14 =0x6
1840 11:03:40.831498
1841 11:03:40.831572 CH=0, VrefRange= 0, VrefLevel = 6
1842 11:03:40.838299 TX Bit0 (980~1000) 21 990, Bit8 (968~985) 18 976,
1843 11:03:40.841588 TX Bit1 (978~998) 21 988, Bit9 (968~986) 19 977,
1844 11:03:40.848401 TX Bit2 (979~998) 20 988, Bit10 (973~990) 18 981,
1845 11:03:40.851368 TX Bit3 (973~993) 21 983, Bit11 (968~985) 18 976,
1846 11:03:40.855120 TX Bit4 (979~999) 21 989, Bit12 (968~986) 19 977,
1847 11:03:40.861679 TX Bit5 (976~992) 17 984, Bit13 (968~984) 17 976,
1848 11:03:40.864714 TX Bit6 (976~994) 19 985, Bit14 (968~985) 18 976,
1849 11:03:40.868187 TX Bit7 (978~997) 20 987, Bit15 (971~989) 19 980,
1850 11:03:40.868262
1851 11:03:40.871833 Write Rank1 MR14 =0x8
1852 11:03:40.880712
1853 11:03:40.880786 CH=0, VrefRange= 0, VrefLevel = 8
1854 11:03:40.887364 TX Bit0 (979~1000) 22 989, Bit8 (968~986) 19 977,
1855 11:03:40.890599 TX Bit1 (978~998) 21 988, Bit9 (968~987) 20 977,
1856 11:03:40.897828 TX Bit2 (978~998) 21 988, Bit10 (972~990) 19 981,
1857 11:03:40.900517 TX Bit3 (973~993) 21 983, Bit11 (968~985) 18 976,
1858 11:03:40.904029 TX Bit4 (978~999) 22 988, Bit12 (968~987) 20 977,
1859 11:03:40.910800 TX Bit5 (976~993) 18 984, Bit13 (968~985) 18 976,
1860 11:03:40.914240 TX Bit6 (976~995) 20 985, Bit14 (968~986) 19 977,
1861 11:03:40.917194 TX Bit7 (978~997) 20 987, Bit15 (970~989) 20 979,
1862 11:03:40.917283
1863 11:03:40.920559 Write Rank1 MR14 =0xa
1864 11:03:40.930013
1865 11:03:40.933845 CH=0, VrefRange= 0, VrefLevel = 10
1866 11:03:40.936419 TX Bit0 (979~1000) 22 989, Bit8 (968~987) 20 977,
1867 11:03:40.940368 TX Bit1 (979~999) 21 989, Bit9 (968~988) 21 978,
1868 11:03:40.946481 TX Bit2 (978~999) 22 988, Bit10 (972~990) 19 981,
1869 11:03:40.949955 TX Bit3 (972~994) 23 983, Bit11 (967~986) 20 976,
1870 11:03:40.953438 TX Bit4 (978~999) 22 988, Bit12 (968~988) 21 978,
1871 11:03:40.960782 TX Bit5 (975~993) 19 984, Bit13 (968~985) 18 976,
1872 11:03:40.963226 TX Bit6 (976~995) 20 985, Bit14 (968~987) 20 977,
1873 11:03:40.966555 TX Bit7 (977~997) 21 987, Bit15 (970~989) 20 979,
1874 11:03:40.966629
1875 11:03:40.969823 Write Rank1 MR14 =0xc
1876 11:03:40.979690
1877 11:03:40.979789 CH=0, VrefRange= 0, VrefLevel = 12
1878 11:03:40.985985 TX Bit0 (979~1001) 23 990, Bit8 (968~987) 20 977,
1879 11:03:40.989735 TX Bit1 (978~999) 22 988, Bit9 (968~988) 21 978,
1880 11:03:40.996021 TX Bit2 (978~999) 22 988, Bit10 (971~991) 21 981,
1881 11:03:40.999596 TX Bit3 (972~994) 23 983, Bit11 (967~987) 21 977,
1882 11:03:41.002954 TX Bit4 (978~1000) 23 989, Bit12 (968~988) 21 978,
1883 11:03:41.009811 TX Bit5 (975~994) 20 984, Bit13 (967~986) 20 976,
1884 11:03:41.012984 TX Bit6 (975~996) 22 985, Bit14 (968~988) 21 978,
1885 11:03:41.016456 TX Bit7 (977~998) 22 987, Bit15 (970~990) 21 980,
1886 11:03:41.016530
1887 11:03:41.019906 Write Rank1 MR14 =0xe
1888 11:03:41.029127
1889 11:03:41.032873 CH=0, VrefRange= 0, VrefLevel = 14
1890 11:03:41.035889 TX Bit0 (978~1001) 24 989, Bit8 (967~988) 22 977,
1891 11:03:41.039628 TX Bit1 (978~1000) 23 989, Bit9 (968~989) 22 978,
1892 11:03:41.046000 TX Bit2 (978~999) 22 988, Bit10 (971~991) 21 981,
1893 11:03:41.049377 TX Bit3 (971~995) 25 983, Bit11 (967~988) 22 977,
1894 11:03:41.052852 TX Bit4 (977~1000) 24 988, Bit12 (968~989) 22 978,
1895 11:03:41.059457 TX Bit5 (975~994) 20 984, Bit13 (967~987) 21 977,
1896 11:03:41.062778 TX Bit6 (975~997) 23 986, Bit14 (968~989) 22 978,
1897 11:03:41.066396 TX Bit7 (977~998) 22 987, Bit15 (970~990) 21 980,
1898 11:03:41.066483
1899 11:03:41.069823 Write Rank1 MR14 =0x10
1900 11:03:41.079325
1901 11:03:41.079400 CH=0, VrefRange= 0, VrefLevel = 16
1902 11:03:41.085719 TX Bit0 (979~1001) 23 990, Bit8 (967~988) 22 977,
1903 11:03:41.089315 TX Bit1 (978~1000) 23 989, Bit9 (968~989) 22 978,
1904 11:03:41.096189 TX Bit2 (978~1000) 23 989, Bit10 (970~991) 22 980,
1905 11:03:41.099314 TX Bit3 (971~995) 25 983, Bit11 (966~988) 23 977,
1906 11:03:41.102875 TX Bit4 (978~1000) 23 989, Bit12 (968~989) 22 978,
1907 11:03:41.109098 TX Bit5 (974~995) 22 984, Bit13 (967~987) 21 977,
1908 11:03:41.112596 TX Bit6 (974~997) 24 985, Bit14 (968~989) 22 978,
1909 11:03:41.116248 TX Bit7 (976~998) 23 987, Bit15 (969~990) 22 979,
1910 11:03:41.116325
1911 11:03:41.119429 Write Rank1 MR14 =0x12
1912 11:03:41.129023
1913 11:03:41.132569 CH=0, VrefRange= 0, VrefLevel = 18
1914 11:03:41.136100 TX Bit0 (978~1002) 25 990, Bit8 (967~989) 23 978,
1915 11:03:41.139242 TX Bit1 (977~1000) 24 988, Bit9 (968~989) 22 978,
1916 11:03:41.146116 TX Bit2 (978~1000) 23 989, Bit10 (970~992) 23 981,
1917 11:03:41.149518 TX Bit3 (971~996) 26 983, Bit11 (966~989) 24 977,
1918 11:03:41.153128 TX Bit4 (977~1001) 25 989, Bit12 (967~989) 23 978,
1919 11:03:41.159165 TX Bit5 (973~996) 24 984, Bit13 (966~988) 23 977,
1920 11:03:41.162547 TX Bit6 (974~998) 25 986, Bit14 (968~989) 22 978,
1921 11:03:41.166092 TX Bit7 (977~998) 22 987, Bit15 (969~990) 22 979,
1922 11:03:41.166166
1923 11:03:41.169292 Write Rank1 MR14 =0x14
1924 11:03:41.179800
1925 11:03:41.183373 CH=0, VrefRange= 0, VrefLevel = 20
1926 11:03:41.186041 TX Bit0 (978~1003) 26 990, Bit8 (967~989) 23 978,
1927 11:03:41.189458 TX Bit1 (977~1001) 25 989, Bit9 (968~989) 22 978,
1928 11:03:41.196239 TX Bit2 (978~1000) 23 989, Bit10 (970~992) 23 981,
1929 11:03:41.199523 TX Bit3 (971~997) 27 984, Bit11 (966~989) 24 977,
1930 11:03:41.202659 TX Bit4 (977~1001) 25 989, Bit12 (967~989) 23 978,
1931 11:03:41.209604 TX Bit5 (974~997) 24 985, Bit13 (966~988) 23 977,
1932 11:03:41.213148 TX Bit6 (974~998) 25 986, Bit14 (967~989) 23 978,
1933 11:03:41.216317 TX Bit7 (976~999) 24 987, Bit15 (969~990) 22 979,
1934 11:03:41.216392
1935 11:03:41.219399 Write Rank1 MR14 =0x16
1936 11:03:41.229926
1937 11:03:41.233434 CH=0, VrefRange= 0, VrefLevel = 22
1938 11:03:41.236748 TX Bit0 (978~1003) 26 990, Bit8 (967~989) 23 978,
1939 11:03:41.240084 TX Bit1 (978~1001) 24 989, Bit9 (968~989) 22 978,
1940 11:03:41.246378 TX Bit2 (977~1001) 25 989, Bit10 (970~992) 23 981,
1941 11:03:41.249850 TX Bit3 (970~997) 28 983, Bit11 (966~989) 24 977,
1942 11:03:41.253293 TX Bit4 (977~1001) 25 989, Bit12 (967~989) 23 978,
1943 11:03:41.259859 TX Bit5 (973~997) 25 985, Bit13 (966~988) 23 977,
1944 11:03:41.263184 TX Bit6 (973~998) 26 985, Bit14 (967~989) 23 978,
1945 11:03:41.267020 TX Bit7 (976~1000) 25 988, Bit15 (969~990) 22 979,
1946 11:03:41.267095
1947 11:03:41.269915 Write Rank1 MR14 =0x18
1948 11:03:41.279837
1949 11:03:41.284163 CH=0, VrefRange= 0, VrefLevel = 24
1950 11:03:41.287101 TX Bit0 (978~1003) 26 990, Bit8 (966~989) 24 977,
1951 11:03:41.290167 TX Bit1 (977~1001) 25 989, Bit9 (968~989) 22 978,
1952 11:03:41.296791 TX Bit2 (977~1001) 25 989, Bit10 (969~991) 23 980,
1953 11:03:41.300590 TX Bit3 (971~996) 26 983, Bit11 (966~989) 24 977,
1954 11:03:41.303252 TX Bit4 (977~1001) 25 989, Bit12 (967~990) 24 978,
1955 11:03:41.310556 TX Bit5 (972~997) 26 984, Bit13 (966~987) 22 976,
1956 11:03:41.313366 TX Bit6 (972~998) 27 985, Bit14 (967~989) 23 978,
1957 11:03:41.320243 TX Bit7 (975~1000) 26 987, Bit15 (969~990) 22 979,
1958 11:03:41.320317
1959 11:03:41.320375 Write Rank1 MR14 =0x1a
1960 11:03:41.330513
1961 11:03:41.333561 CH=0, VrefRange= 0, VrefLevel = 26
1962 11:03:41.337448 TX Bit0 (978~1003) 26 990, Bit8 (966~989) 24 977,
1963 11:03:41.340457 TX Bit1 (977~1001) 25 989, Bit9 (968~989) 22 978,
1964 11:03:41.347526 TX Bit2 (977~1001) 25 989, Bit10 (969~991) 23 980,
1965 11:03:41.350332 TX Bit3 (971~996) 26 983, Bit11 (966~989) 24 977,
1966 11:03:41.353575 TX Bit4 (977~1001) 25 989, Bit12 (967~990) 24 978,
1967 11:03:41.360345 TX Bit5 (972~997) 26 984, Bit13 (966~987) 22 976,
1968 11:03:41.363773 TX Bit6 (972~998) 27 985, Bit14 (967~989) 23 978,
1969 11:03:41.367542 TX Bit7 (975~1000) 26 987, Bit15 (969~990) 22 979,
1970 11:03:41.370607
1971 11:03:41.370673 Write Rank1 MR14 =0x1c
1972 11:03:41.380601
1973 11:03:41.383722 CH=0, VrefRange= 0, VrefLevel = 28
1974 11:03:41.387349 TX Bit0 (978~1003) 26 990, Bit8 (966~989) 24 977,
1975 11:03:41.390331 TX Bit1 (977~1001) 25 989, Bit9 (968~989) 22 978,
1976 11:03:41.397422 TX Bit2 (977~1001) 25 989, Bit10 (969~991) 23 980,
1977 11:03:41.400501 TX Bit3 (971~996) 26 983, Bit11 (966~989) 24 977,
1978 11:03:41.403745 TX Bit4 (977~1001) 25 989, Bit12 (967~990) 24 978,
1979 11:03:41.411096 TX Bit5 (972~997) 26 984, Bit13 (966~987) 22 976,
1980 11:03:41.414021 TX Bit6 (972~998) 27 985, Bit14 (967~989) 23 978,
1981 11:03:41.420800 TX Bit7 (975~1000) 26 987, Bit15 (969~990) 22 979,
1982 11:03:41.420900
1983 11:03:41.420987 Write Rank1 MR14 =0x1e
1984 11:03:41.430513
1985 11:03:41.433883 CH=0, VrefRange= 0, VrefLevel = 30
1986 11:03:41.437238 TX Bit0 (978~1003) 26 990, Bit8 (966~989) 24 977,
1987 11:03:41.440583 TX Bit1 (977~1001) 25 989, Bit9 (968~989) 22 978,
1988 11:03:41.447525 TX Bit2 (977~1001) 25 989, Bit10 (969~991) 23 980,
1989 11:03:41.450854 TX Bit3 (971~996) 26 983, Bit11 (966~989) 24 977,
1990 11:03:41.454896 TX Bit4 (977~1001) 25 989, Bit12 (967~990) 24 978,
1991 11:03:41.460698 TX Bit5 (972~997) 26 984, Bit13 (966~987) 22 976,
1992 11:03:41.464226 TX Bit6 (972~998) 27 985, Bit14 (967~989) 23 978,
1993 11:03:41.470821 TX Bit7 (975~1000) 26 987, Bit15 (969~990) 22 979,
1994 11:03:41.470897
1995 11:03:41.470956
1996 11:03:41.474180 TX Vref found, early break! 369< 370
1997 11:03:41.477332 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1998 11:03:41.480956 u1DelayCellOfst[0]=8 cells (7 PI)
1999 11:03:41.484123 u1DelayCellOfst[1]=7 cells (6 PI)
2000 11:03:41.487678 u1DelayCellOfst[2]=7 cells (6 PI)
2001 11:03:41.491391 u1DelayCellOfst[3]=0 cells (0 PI)
2002 11:03:41.491458 u1DelayCellOfst[4]=7 cells (6 PI)
2003 11:03:41.494549 u1DelayCellOfst[5]=1 cells (1 PI)
2004 11:03:41.497761 u1DelayCellOfst[6]=2 cells (2 PI)
2005 11:03:41.501000 u1DelayCellOfst[7]=5 cells (4 PI)
2006 11:03:41.504339 Byte0, DQ PI dly=983, DQM PI dly= 986
2007 11:03:41.511031 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2008 11:03:41.511124
2009 11:03:41.514449 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2010 11:03:41.514520
2011 11:03:41.517478 u1DelayCellOfst[8]=1 cells (1 PI)
2012 11:03:41.520930 u1DelayCellOfst[9]=2 cells (2 PI)
2013 11:03:41.524271 u1DelayCellOfst[10]=5 cells (4 PI)
2014 11:03:41.528054 u1DelayCellOfst[11]=1 cells (1 PI)
2015 11:03:41.530942 u1DelayCellOfst[12]=2 cells (2 PI)
2016 11:03:41.531036 u1DelayCellOfst[13]=0 cells (0 PI)
2017 11:03:41.534297 u1DelayCellOfst[14]=2 cells (2 PI)
2018 11:03:41.537879 u1DelayCellOfst[15]=3 cells (3 PI)
2019 11:03:41.541438 Byte1, DQ PI dly=976, DQM PI dly= 978
2020 11:03:41.547683 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2021 11:03:41.547782
2022 11:03:41.551104 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2023 11:03:41.551168
2024 11:03:41.554436 Write Rank1 MR14 =0x18
2025 11:03:41.554506
2026 11:03:41.554563 Final TX Range 0 Vref 24
2027 11:03:41.554616
2028 11:03:41.561690 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2029 11:03:41.561760
2030 11:03:41.567576 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2031 11:03:41.574580 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2032 11:03:41.581261 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2033 11:03:41.584377 Write Rank1 MR3 =0xb0
2034 11:03:41.587875 DramC Write-DBI on
2035 11:03:41.587948 ==
2036 11:03:41.591510 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2037 11:03:41.594574 fsp= 1, odt_onoff= 1, Byte mode= 0
2038 11:03:41.594681 ==
2039 11:03:41.597829 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2040 11:03:41.597906
2041 11:03:41.601274 Begin, DQ Scan Range 698~762
2042 11:03:41.601359
2043 11:03:41.601444
2044 11:03:41.604913 TX Vref Scan disable
2045 11:03:41.607829 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2046 11:03:41.611168 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2047 11:03:41.614467 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2048 11:03:41.617928 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2049 11:03:41.621533 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2050 11:03:41.625055 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2051 11:03:41.628367 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2052 11:03:41.631102 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2053 11:03:41.634725 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2054 11:03:41.637820 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2055 11:03:41.641328 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
2056 11:03:41.644987 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2057 11:03:41.648093 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2058 11:03:41.654693 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2059 11:03:41.658265 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2060 11:03:41.661315 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2061 11:03:41.664845 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2062 11:03:41.668049 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2063 11:03:41.671755 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2064 11:03:41.674790 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2065 11:03:41.681873 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
2066 11:03:41.685032 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2067 11:03:41.688850 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2068 11:03:41.692040 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2069 11:03:41.695796 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2070 11:03:41.698879 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2071 11:03:41.702259 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2072 11:03:41.705370 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2073 11:03:41.708588 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2074 11:03:41.712020 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2075 11:03:41.715319 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2076 11:03:41.718753 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
2077 11:03:41.722566 Byte0, DQ PI dly=731, DQM PI dly= 731
2078 11:03:41.725414 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
2079 11:03:41.728849
2080 11:03:41.731980 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
2081 11:03:41.732055
2082 11:03:41.735644 Byte1, DQ PI dly=720, DQM PI dly= 720
2083 11:03:41.739128 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)
2084 11:03:41.739202
2085 11:03:41.742318 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)
2086 11:03:41.742393
2087 11:03:41.749022 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2088 11:03:41.755823 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2089 11:03:41.765814 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2090 11:03:41.765889 Write Rank1 MR3 =0x30
2091 11:03:41.769126 DramC Write-DBI off
2092 11:03:41.769240
2093 11:03:41.769298 [DATLAT]
2094 11:03:41.772450 Freq=1600, CH0 RK1, use_rxtx_scan=0
2095 11:03:41.772525
2096 11:03:41.775765 DATLAT Default: 0x10
2097 11:03:41.775839 7, 0xFFFF, sum=0
2098 11:03:41.775897 8, 0xFFFF, sum=0
2099 11:03:41.779145 9, 0xFFFF, sum=0
2100 11:03:41.779220 10, 0xFFFF, sum=0
2101 11:03:41.782384 11, 0xFFFF, sum=0
2102 11:03:41.782460 12, 0xFFFF, sum=0
2103 11:03:41.785689 13, 0xFFFF, sum=0
2104 11:03:41.785765 14, 0x0, sum=1
2105 11:03:41.789630 15, 0x0, sum=2
2106 11:03:41.789706 16, 0x0, sum=3
2107 11:03:41.792518 17, 0x0, sum=4
2108 11:03:41.795964 pattern=2 first_step=14 total pass=5 best_step=16
2109 11:03:41.796039 ==
2110 11:03:41.799517 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2111 11:03:41.802915 fsp= 1, odt_onoff= 1, Byte mode= 0
2112 11:03:41.806068 ==
2113 11:03:41.809112 Start DQ dly to find pass range UseTestEngine =1
2114 11:03:41.812456 x-axis: bit #, y-axis: DQ dly (-127~63)
2115 11:03:41.812532 RX Vref Scan = 0
2116 11:03:41.816223 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2117 11:03:41.819409 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2118 11:03:41.822983 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2119 11:03:41.825874 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2120 11:03:41.829366 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2121 11:03:41.833474 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2122 11:03:41.833550 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2123 11:03:41.836402 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2124 11:03:41.839525 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2125 11:03:41.842950 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2126 11:03:41.846258 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2127 11:03:41.849511 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2128 11:03:41.852905 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2129 11:03:41.855939 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2130 11:03:41.856012 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2131 11:03:41.859524 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2132 11:03:41.862894 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2133 11:03:41.866006 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2134 11:03:41.869336 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2135 11:03:41.874389 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2136 11:03:41.876137 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2137 11:03:41.876248 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2138 11:03:41.879757 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2139 11:03:41.882741 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2140 11:03:41.886233 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2141 11:03:41.889695 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2142 11:03:41.892921 0, [0] xxxoxoxx xxxoxoxx [MSB]
2143 11:03:41.896279 1, [0] xxxoxoxx oxxoxoxx [MSB]
2144 11:03:41.896355 2, [0] xxxoxoxx oxxoxoox [MSB]
2145 11:03:41.899720 3, [0] xxxoxooo ooxoooox [MSB]
2146 11:03:41.902997 4, [0] xxxoxooo ooxooooo [MSB]
2147 11:03:41.906595 5, [0] xxxoxooo ooxooooo [MSB]
2148 11:03:41.909967 6, [0] xxxooooo oooooooo [MSB]
2149 11:03:41.910038 7, [0] xoxooooo oooooooo [MSB]
2150 11:03:41.913122 8, [0] xooooooo oooooooo [MSB]
2151 11:03:41.917248 33, [0] oooxoooo oooooooo [MSB]
2152 11:03:41.920633 34, [0] oooxoooo oooooxoo [MSB]
2153 11:03:41.924497 35, [0] oooxoooo oooxoxoo [MSB]
2154 11:03:41.927353 36, [0] oooxoxox oooxoxxo [MSB]
2155 11:03:41.930889 37, [0] oooxoxxx xooxoxxo [MSB]
2156 11:03:41.934417 38, [0] oooxoxxx xxoxxxxx [MSB]
2157 11:03:41.934483 39, [0] oooxoxxx xxoxxxxx [MSB]
2158 11:03:41.937583 40, [0] oooxoxxx xxoxxxxx [MSB]
2159 11:03:41.941024 41, [0] oooxxxxx xxoxxxxx [MSB]
2160 11:03:41.944564 42, [0] oooxxxxx xxoxxxxx [MSB]
2161 11:03:41.947382 43, [0] xxxxxxxx xxxxxxxx [MSB]
2162 11:03:41.951493 iDelay=43, Bit 0, Center 25 (9 ~ 42) 34
2163 11:03:41.954635 iDelay=43, Bit 1, Center 24 (7 ~ 42) 36
2164 11:03:41.957903 iDelay=43, Bit 2, Center 25 (8 ~ 42) 35
2165 11:03:41.961574 iDelay=43, Bit 3, Center 15 (-1 ~ 32) 34
2166 11:03:41.965097 iDelay=43, Bit 4, Center 23 (6 ~ 40) 35
2167 11:03:41.968000 iDelay=43, Bit 5, Center 17 (0 ~ 35) 36
2168 11:03:41.971169 iDelay=43, Bit 6, Center 19 (3 ~ 36) 34
2169 11:03:41.974726 iDelay=43, Bit 7, Center 19 (3 ~ 35) 33
2170 11:03:41.978101 iDelay=43, Bit 8, Center 18 (1 ~ 36) 36
2171 11:03:41.981414 iDelay=43, Bit 9, Center 20 (3 ~ 37) 35
2172 11:03:41.984439 iDelay=43, Bit 10, Center 24 (6 ~ 42) 37
2173 11:03:41.991348 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
2174 11:03:41.994855 iDelay=43, Bit 12, Center 20 (3 ~ 37) 35
2175 11:03:41.997993 iDelay=43, Bit 13, Center 16 (0 ~ 33) 34
2176 11:03:42.001346 iDelay=43, Bit 14, Center 18 (2 ~ 35) 34
2177 11:03:42.004474 iDelay=43, Bit 15, Center 20 (4 ~ 37) 34
2178 11:03:42.004547 ==
2179 11:03:42.008181 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2180 11:03:42.011283 fsp= 1, odt_onoff= 1, Byte mode= 0
2181 11:03:42.011357 ==
2182 11:03:42.014590 DQS Delay:
2183 11:03:42.014652 DQS0 = 0, DQS1 = 0
2184 11:03:42.018106 DQM Delay:
2185 11:03:42.018170 DQM0 = 20, DQM1 = 19
2186 11:03:42.018224 DQ Delay:
2187 11:03:42.021128 DQ0 =25, DQ1 =24, DQ2 =25, DQ3 =15
2188 11:03:42.024786 DQ4 =23, DQ5 =17, DQ6 =19, DQ7 =19
2189 11:03:42.028105 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =17
2190 11:03:42.031480 DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20
2191 11:03:42.031543
2192 11:03:42.031604
2193 11:03:42.031658
2194 11:03:42.034593 [DramC_TX_OE_Calibration] TA2
2195 11:03:42.038088 Original DQ_B0 (3 6) =30, OEN = 27
2196 11:03:42.041730 Original DQ_B1 (3 6) =30, OEN = 27
2197 11:03:42.044593 23, 0x0, End_B0=23 End_B1=23
2198 11:03:42.048245 24, 0x0, End_B0=24 End_B1=24
2199 11:03:42.048312 25, 0x0, End_B0=25 End_B1=25
2200 11:03:42.051757 26, 0x0, End_B0=26 End_B1=26
2201 11:03:42.054960 27, 0x0, End_B0=27 End_B1=27
2202 11:03:42.058186 28, 0x0, End_B0=28 End_B1=28
2203 11:03:42.061383 29, 0x0, End_B0=29 End_B1=29
2204 11:03:42.061459 30, 0x0, End_B0=30 End_B1=30
2205 11:03:42.064563 31, 0xFFFF, End_B0=30 End_B1=30
2206 11:03:42.071411 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2207 11:03:42.075200 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2208 11:03:42.078063
2209 11:03:42.078142
2210 11:03:42.078202 Write Rank1 MR23 =0x3f
2211 11:03:42.078255 [DQSOSC]
2212 11:03:42.087957 [DQSOSCAuto] RK1, (LSB)MR18= 0x7b, (MSB)MR19= 0x3, tDQSOscB0 = 353 ps tDQSOscB1 = 0 ps
2213 11:03:42.091699 CH0_RK1: MR19=0x3, MR18=0x7B, DQSOSC=353, MR23=63, INC=19, DEC=29
2214 11:03:42.094989 Write Rank1 MR23 =0x3f
2215 11:03:42.095098 [DQSOSC]
2216 11:03:42.105056 [DQSOSCAuto] RK1, (LSB)MR18= 0x77, (MSB)MR19= 0x3, tDQSOscB0 = 355 ps tDQSOscB1 = 0 ps
2217 11:03:42.105190 CH0 RK1: MR19=3, MR18=77
2218 11:03:42.108531 [RxdqsGatingPostProcess] freq 1600
2219 11:03:42.114946 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2220 11:03:42.115021 Rank: 0
2221 11:03:42.118855 best DQS0 dly(2T, 0.5T) = (2, 5)
2222 11:03:42.121758 best DQS1 dly(2T, 0.5T) = (2, 5)
2223 11:03:42.124923 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2224 11:03:42.128539 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2225 11:03:42.128612 Rank: 1
2226 11:03:42.132733 best DQS0 dly(2T, 0.5T) = (2, 6)
2227 11:03:42.132808 best DQS1 dly(2T, 0.5T) = (2, 6)
2228 11:03:42.136531 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2229 11:03:42.139350 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2230 11:03:42.145948 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2231 11:03:42.149314 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2232 11:03:42.152930 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2233 11:03:42.156167 Write Rank0 MR13 =0x59
2234 11:03:42.156241 ==
2235 11:03:42.159557 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2236 11:03:42.162780 fsp= 1, odt_onoff= 1, Byte mode= 0
2237 11:03:42.162854 ==
2238 11:03:42.166128 === u2Vref_new: 0x56 --> 0x3a
2239 11:03:42.169327 === u2Vref_new: 0x58 --> 0x58
2240 11:03:42.172890 === u2Vref_new: 0x5a --> 0x5a
2241 11:03:42.176505 === u2Vref_new: 0x5c --> 0x78
2242 11:03:42.180085 === u2Vref_new: 0x5e --> 0x7a
2243 11:03:42.182838 === u2Vref_new: 0x60 --> 0x90
2244 11:03:42.186228 [CA 0] Center 36 (9~63) winsize 55
2245 11:03:42.190244 [CA 1] Center 35 (7~63) winsize 57
2246 11:03:42.193308 [CA 2] Center 32 (3~61) winsize 59
2247 11:03:42.197105 [CA 3] Center 32 (3~62) winsize 60
2248 11:03:42.199728 [CA 4] Center 33 (3~63) winsize 61
2249 11:03:42.199802 [CA 5] Center 26 (-1~53) winsize 55
2250 11:03:42.203075
2251 11:03:42.206419 [CATrainingPosCal] consider 1 rank data
2252 11:03:42.206493 u2DelayCellTimex100 = 762/100 ps
2253 11:03:42.213019 CA0 delay=36 (9~63),Diff = 10 PI (12 cell)
2254 11:03:42.216485 CA1 delay=35 (7~63),Diff = 9 PI (11 cell)
2255 11:03:42.220312 CA2 delay=32 (3~61),Diff = 6 PI (7 cell)
2256 11:03:42.223197 CA3 delay=32 (3~62),Diff = 6 PI (7 cell)
2257 11:03:42.226754 CA4 delay=33 (3~63),Diff = 7 PI (8 cell)
2258 11:03:42.229695 CA5 delay=26 (-1~53),Diff = 0 PI (0 cell)
2259 11:03:42.229769
2260 11:03:42.233485 CA PerBit enable=1, Macro0, CA PI delay=26
2261 11:03:42.237109 === u2Vref_new: 0x56 --> 0x3a
2262 11:03:42.237232
2263 11:03:42.240254 Vref(ca) range 1: 22
2264 11:03:42.240328
2265 11:03:42.240385 CS Dly= 10 (41-0-32)
2266 11:03:42.243463 Write Rank0 MR13 =0xd8
2267 11:03:42.246476 Write Rank0 MR13 =0xd8
2268 11:03:42.246550 Write Rank0 MR12 =0x56
2269 11:03:42.250179 Write Rank1 MR13 =0x59
2270 11:03:42.250253 ==
2271 11:03:42.253120 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2272 11:03:42.256659 fsp= 1, odt_onoff= 1, Byte mode= 0
2273 11:03:42.256734 ==
2274 11:03:42.260054 === u2Vref_new: 0x56 --> 0x3a
2275 11:03:42.263200 === u2Vref_new: 0x58 --> 0x58
2276 11:03:42.267028 === u2Vref_new: 0x5a --> 0x5a
2277 11:03:42.269836 === u2Vref_new: 0x5c --> 0x78
2278 11:03:42.273612 === u2Vref_new: 0x5e --> 0x7a
2279 11:03:42.277050 === u2Vref_new: 0x60 --> 0x90
2280 11:03:42.280457 [CA 0] Center 36 (9~63) winsize 55
2281 11:03:42.283514 [CA 1] Center 34 (6~63) winsize 58
2282 11:03:42.286953 [CA 2] Center 33 (4~62) winsize 59
2283 11:03:42.290115 [CA 3] Center 33 (3~63) winsize 61
2284 11:03:42.293358 [CA 4] Center 34 (5~63) winsize 59
2285 11:03:42.293421 [CA 5] Center 26 (-1~53) winsize 55
2286 11:03:42.296714
2287 11:03:42.300042 [CATrainingPosCal] consider 2 rank data
2288 11:03:42.300116 u2DelayCellTimex100 = 762/100 ps
2289 11:03:42.307431 CA0 delay=36 (9~63),Diff = 10 PI (12 cell)
2290 11:03:42.310651 CA1 delay=35 (7~63),Diff = 9 PI (11 cell)
2291 11:03:42.313903 CA2 delay=32 (4~61),Diff = 6 PI (7 cell)
2292 11:03:42.316771 CA3 delay=32 (3~62),Diff = 6 PI (7 cell)
2293 11:03:42.320673 CA4 delay=34 (5~63),Diff = 8 PI (10 cell)
2294 11:03:42.323923 CA5 delay=26 (-1~53),Diff = 0 PI (0 cell)
2295 11:03:42.323993
2296 11:03:42.327044 CA PerBit enable=1, Macro0, CA PI delay=26
2297 11:03:42.330445 === u2Vref_new: 0x5a --> 0x5a
2298 11:03:42.330541
2299 11:03:42.333741 Vref(ca) range 1: 26
2300 11:03:42.333808
2301 11:03:42.333863 CS Dly= 11 (42-0-32)
2302 11:03:42.337082 Write Rank1 MR13 =0xd8
2303 11:03:42.340479 Write Rank1 MR13 =0xd8
2304 11:03:42.340547 Write Rank1 MR12 =0x5a
2305 11:03:42.343600 [RankSwap] Rank num 2, (Multi 1), Rank 0
2306 11:03:42.347455 Write Rank0 MR2 =0xad
2307 11:03:42.347530 [Write Leveling]
2308 11:03:42.350683 delay byte0 byte1 byte2 byte3
2309 11:03:42.350750
2310 11:03:42.353933 10 0 0
2311 11:03:42.354000 11 0 0
2312 11:03:42.354058 12 0 0
2313 11:03:42.356993 13 0 0
2314 11:03:42.357080 14 0 0
2315 11:03:42.360744 15 0 0
2316 11:03:42.360831 16 0 0
2317 11:03:42.363883 17 0 0
2318 11:03:42.363948 18 0 0
2319 11:03:42.364001 19 0 0
2320 11:03:42.367761 20 0 0
2321 11:03:42.367826 21 0 0
2322 11:03:42.370870 22 0 0
2323 11:03:42.370935 23 0 0
2324 11:03:42.371000 24 0 0
2325 11:03:42.373951 25 0 0
2326 11:03:42.374012 26 0 0
2327 11:03:42.377276 27 0 0
2328 11:03:42.377352 28 0 0
2329 11:03:42.377408 29 0 0
2330 11:03:42.381064 30 0 0
2331 11:03:42.381203 31 0 ff
2332 11:03:42.383883 32 0 ff
2333 11:03:42.383999 33 0 ff
2334 11:03:42.387922 34 ff ff
2335 11:03:42.387988 35 ff ff
2336 11:03:42.390634 36 ff ff
2337 11:03:42.390695 37 ff ff
2338 11:03:42.390749 38 ff ff
2339 11:03:42.394401 39 ff ff
2340 11:03:42.394466 40 ff ff
2341 11:03:42.401165 pass bytecount = 0xff (0xff: all bytes pass)
2342 11:03:42.401234
2343 11:03:42.401290 DQS0 dly: 34
2344 11:03:42.401349 DQS1 dly: 31
2345 11:03:42.403961 Write Rank0 MR2 =0x2d
2346 11:03:42.407424 [RankSwap] Rank num 2, (Multi 1), Rank 0
2347 11:03:42.410810 Write Rank0 MR1 =0xd6
2348 11:03:42.410884 [Gating]
2349 11:03:42.410942 ==
2350 11:03:42.417876 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2351 11:03:42.417951 fsp= 1, odt_onoff= 1, Byte mode= 0
2352 11:03:42.421330 ==
2353 11:03:42.423980 3 1 0 |2c2c 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2354 11:03:42.427599 3 1 4 |1515 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2355 11:03:42.430820 3 1 8 |2d2d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2356 11:03:42.437638 3 1 12 |3231 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2357 11:03:42.440932 3 1 16 |3131 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2358 11:03:42.444864 3 1 20 |2e2d 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2359 11:03:42.451267 3 1 24 |908 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2360 11:03:42.454142 3 1 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2361 11:03:42.458353 3 2 0 |1b1a 504 |(11 11)(11 11) |(0 0)(1 1)| 0
2362 11:03:42.461335 3 2 4 |1717 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2363 11:03:42.468115 3 2 8 |3636 3d3d |(0 0)(11 11) |(0 0)(1 1)| 0
2364 11:03:42.471033 3 2 12 |3736 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2365 11:03:42.474607 3 2 16 |403 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2366 11:03:42.481285 3 2 20 |1b1a 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2367 11:03:42.484225 3 2 24 |3635 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2368 11:03:42.487736 3 2 28 |3837 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2369 11:03:42.494195 [Byte 0] Lead/lag falling Transition (3, 2, 28)
2370 11:03:42.497939 3 3 0 |808 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
2371 11:03:42.500927 3 3 4 |3534 100f |(11 11)(11 11) |(0 1)(1 1)| 0
2372 11:03:42.504273 3 3 8 |3534 2625 |(11 11)(11 11) |(0 1)(1 1)| 0
2373 11:03:42.511433 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2374 11:03:42.514279 [Byte 1] Lead/lag falling Transition (3, 3, 12)
2375 11:03:42.517745 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2376 11:03:42.524915 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2377 11:03:42.528109 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2378 11:03:42.531379 3 3 28 |504 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2379 11:03:42.534664 3 4 0 |3d3d 2221 |(11 11)(11 11) |(1 1)(1 1)| 0
2380 11:03:42.541364 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2381 11:03:42.544779 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2382 11:03:42.548361 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2383 11:03:42.554478 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2384 11:03:42.557877 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2385 11:03:42.561431 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2386 11:03:42.568006 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2387 11:03:42.571569 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2388 11:03:42.574945 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2389 11:03:42.578073 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2390 11:03:42.584788 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2391 11:03:42.588304 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2392 11:03:42.591688 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2393 11:03:42.598014 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2394 11:03:42.601489 [Byte 0] Lead/lag Transition tap number (2)
2395 11:03:42.604945 [Byte 1] Lead/lag falling Transition (3, 5, 20)
2396 11:03:42.608403 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2397 11:03:42.615232 3 5 28 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2398 11:03:42.618246 [Byte 1] Lead/lag Transition tap number (3)
2399 11:03:42.621579 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2400 11:03:42.624946 [Byte 0]First pass (3, 6, 0)
2401 11:03:42.628724 3 6 4 |4646 e0e |(0 0)(11 11) |(0 0)(0 0)| 0
2402 11:03:42.631831 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2403 11:03:42.635172 [Byte 1]First pass (3, 6, 8)
2404 11:03:42.638417 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2405 11:03:42.641621 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2406 11:03:42.648956 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2407 11:03:42.652524 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2408 11:03:42.655324 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2409 11:03:42.658622 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2410 11:03:42.662479 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2411 11:03:42.669072 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2412 11:03:42.672006 All bytes gating window > 1UI, Early break!
2413 11:03:42.672080
2414 11:03:42.675309 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
2415 11:03:42.675384
2416 11:03:42.678567 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 26)
2417 11:03:42.678641
2418 11:03:42.678698
2419 11:03:42.678751
2420 11:03:42.682028 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
2421 11:03:42.682102
2422 11:03:42.685298 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
2423 11:03:42.688709
2424 11:03:42.688783
2425 11:03:42.688840 Write Rank0 MR1 =0x56
2426 11:03:42.688894
2427 11:03:42.692157 best RODT dly(2T, 0.5T) = (2, 2)
2428 11:03:42.692231
2429 11:03:42.695757 best RODT dly(2T, 0.5T) = (2, 2)
2430 11:03:42.695832 ==
2431 11:03:42.702067 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2432 11:03:42.702143 fsp= 1, odt_onoff= 1, Byte mode= 0
2433 11:03:42.705432 ==
2434 11:03:42.708670 Start DQ dly to find pass range UseTestEngine =0
2435 11:03:42.712224 x-axis: bit #, y-axis: DQ dly (-127~63)
2436 11:03:42.712298 RX Vref Scan = 0
2437 11:03:42.715616 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2438 11:03:42.718822 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2439 11:03:42.722468 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2440 11:03:42.726224 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2441 11:03:42.728943 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2442 11:03:42.732558 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2443 11:03:42.732634 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2444 11:03:42.735904 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2445 11:03:42.739346 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2446 11:03:42.742748 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2447 11:03:42.745697 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2448 11:03:42.749129 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2449 11:03:42.752445 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2450 11:03:42.755713 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2451 11:03:42.759271 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2452 11:03:42.759380 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2453 11:03:42.762490 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2454 11:03:42.765793 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2455 11:03:42.769036 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2456 11:03:42.772364 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2457 11:03:42.775958 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2458 11:03:42.779230 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2459 11:03:42.779300 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2460 11:03:42.782532 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2461 11:03:42.785816 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2462 11:03:42.789046 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2463 11:03:42.792763 0, [0] xxxoxxxx xxxxxxxx [MSB]
2464 11:03:42.796194 1, [0] xxxoxxxx xxxxxxxo [MSB]
2465 11:03:42.796261 2, [0] xxooxxxx xxxxxxxo [MSB]
2466 11:03:42.799516 3, [0] xxooxxxo xxxxxxxo [MSB]
2467 11:03:42.802378 4, [0] xxoooxxo oooxooxo [MSB]
2468 11:03:42.805810 5, [0] xxoooxxo oooooooo [MSB]
2469 11:03:42.809077 6, [0] xooooxxo oooooooo [MSB]
2470 11:03:42.812659 7, [0] xoooooxo oooooooo [MSB]
2471 11:03:42.812726 8, [0] ooooooxo oooooooo [MSB]
2472 11:03:42.815646 32, [0] ooxxoooo oooooooo [MSB]
2473 11:03:42.819317 33, [0] ooxxoooo ooooooox [MSB]
2474 11:03:42.822585 34, [0] ooxxoooo ooooooox [MSB]
2475 11:03:42.826270 35, [0] ooxxxooo ooxoooox [MSB]
2476 11:03:42.829556 36, [0] ooxxxoox xoxoooox [MSB]
2477 11:03:42.829621 37, [0] ooxxxoox xxxxoxxx [MSB]
2478 11:03:42.832688 38, [0] ooxxxoox xxxxoxxx [MSB]
2479 11:03:42.835781 39, [0] ooxxxoox xxxxxxxx [MSB]
2480 11:03:42.839661 40, [0] oxxxxoox xxxxxxxx [MSB]
2481 11:03:42.842862 41, [0] xxxxxxxx xxxxxxxx [MSB]
2482 11:03:42.845997 iDelay=41, Bit 0, Center 24 (8 ~ 40) 33
2483 11:03:42.849294 iDelay=41, Bit 1, Center 22 (6 ~ 39) 34
2484 11:03:42.852563 iDelay=41, Bit 2, Center 16 (2 ~ 31) 30
2485 11:03:42.856129 iDelay=41, Bit 3, Center 15 (0 ~ 31) 32
2486 11:03:42.859351 iDelay=41, Bit 4, Center 19 (4 ~ 34) 31
2487 11:03:42.863245 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2488 11:03:42.866168 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
2489 11:03:42.869499 iDelay=41, Bit 7, Center 19 (3 ~ 35) 33
2490 11:03:42.872640 iDelay=41, Bit 8, Center 19 (4 ~ 35) 32
2491 11:03:42.876161 iDelay=41, Bit 9, Center 20 (4 ~ 36) 33
2492 11:03:42.879593 iDelay=41, Bit 10, Center 19 (4 ~ 34) 31
2493 11:03:42.886366 iDelay=41, Bit 11, Center 20 (5 ~ 36) 32
2494 11:03:42.889647 iDelay=41, Bit 12, Center 21 (4 ~ 38) 35
2495 11:03:42.892678 iDelay=41, Bit 13, Center 20 (4 ~ 36) 33
2496 11:03:42.896121 iDelay=41, Bit 14, Center 20 (5 ~ 36) 32
2497 11:03:42.900092 iDelay=41, Bit 15, Center 16 (1 ~ 32) 32
2498 11:03:42.900164 ==
2499 11:03:42.902885 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2500 11:03:42.906595 fsp= 1, odt_onoff= 1, Byte mode= 0
2501 11:03:42.906662 ==
2502 11:03:42.909598 DQS Delay:
2503 11:03:42.909664 DQS0 = 0, DQS1 = 0
2504 11:03:42.912993 DQM Delay:
2505 11:03:42.913082 DQM0 = 20, DQM1 = 19
2506 11:03:42.913204 DQ Delay:
2507 11:03:42.916399 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2508 11:03:42.919994 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
2509 11:03:42.923248 DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =20
2510 11:03:42.926251 DQ12 =21, DQ13 =20, DQ14 =20, DQ15 =16
2511 11:03:42.926316
2512 11:03:42.926378
2513 11:03:42.929676 DramC Write-DBI off
2514 11:03:42.929740 ==
2515 11:03:42.936489 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2516 11:03:42.936556 fsp= 1, odt_onoff= 1, Byte mode= 0
2517 11:03:42.939875 ==
2518 11:03:42.943238 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2519 11:03:42.943302
2520 11:03:42.946765 Begin, DQ Scan Range 927~1183
2521 11:03:42.946861
2522 11:03:42.946951
2523 11:03:42.947031 TX Vref Scan disable
2524 11:03:42.949960 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2525 11:03:42.956312 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2526 11:03:42.959543 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2527 11:03:42.962941 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2528 11:03:42.966377 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2529 11:03:42.969552 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2530 11:03:42.972912 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2531 11:03:42.976186 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2532 11:03:42.979492 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2533 11:03:42.982917 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2534 11:03:42.986157 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2535 11:03:42.989644 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2536 11:03:42.992890 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2537 11:03:42.996648 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2538 11:03:42.999665 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2539 11:03:43.003263 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2540 11:03:43.006755 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2541 11:03:43.009627 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2542 11:03:43.016494 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2543 11:03:43.019823 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2544 11:03:43.023074 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2545 11:03:43.026940 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2546 11:03:43.029800 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2547 11:03:43.033152 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2548 11:03:43.036728 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2549 11:03:43.039951 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2550 11:03:43.043235 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2551 11:03:43.046695 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2552 11:03:43.050136 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2553 11:03:43.052892 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2554 11:03:43.056365 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2555 11:03:43.059691 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2556 11:03:43.063639 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2557 11:03:43.066234 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2558 11:03:43.070114 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2559 11:03:43.073000 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2560 11:03:43.079456 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2561 11:03:43.082686 964 |3 6 4|[0] xxxxxxxx xxxxxxxo [MSB]
2562 11:03:43.086204 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]
2563 11:03:43.089730 966 |3 6 6|[0] xxxxxxxx xoxxxxxo [MSB]
2564 11:03:43.093166 967 |3 6 7|[0] xxxxxxxx ooxxxxxo [MSB]
2565 11:03:43.096273 968 |3 6 8|[0] xxxxxxxx oooxoxxo [MSB]
2566 11:03:43.099600 969 |3 6 9|[0] xxxxxxxx oooooxoo [MSB]
2567 11:03:43.102903 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
2568 11:03:43.106484 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
2569 11:03:43.109596 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2570 11:03:43.112663 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
2571 11:03:43.115993 974 |3 6 14|[0] xxoooxxx oooooooo [MSB]
2572 11:03:43.119599 975 |3 6 15|[0] xooooxxo oooooooo [MSB]
2573 11:03:43.122485 976 |3 6 16|[0] xoooooxo oooooooo [MSB]
2574 11:03:43.130348 989 |3 6 29|[0] oooooooo ooooooox [MSB]
2575 11:03:43.133765 990 |3 6 30|[0] oooooooo oxooooox [MSB]
2576 11:03:43.137338 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2577 11:03:43.140484 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2578 11:03:43.143915 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
2579 11:03:43.146763 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
2580 11:03:43.150233 995 |3 6 35|[0] ooxxooox xxxxxxxx [MSB]
2581 11:03:43.153711 996 |3 6 36|[0] ooxxooox xxxxxxxx [MSB]
2582 11:03:43.157224 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
2583 11:03:43.160486 Byte0, DQ PI dly=984, DQM PI dly= 984
2584 11:03:43.163938 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
2585 11:03:43.164011
2586 11:03:43.170481 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
2587 11:03:43.170552
2588 11:03:43.173720 Byte1, DQ PI dly=978, DQM PI dly= 978
2589 11:03:43.177144 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2590 11:03:43.177253
2591 11:03:43.181003 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2592 11:03:43.181099
2593 11:03:43.183658 ==
2594 11:03:43.186611 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2595 11:03:43.190142 fsp= 1, odt_onoff= 1, Byte mode= 0
2596 11:03:43.190207 ==
2597 11:03:43.193676 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2598 11:03:43.193749
2599 11:03:43.196675 Begin, DQ Scan Range 954~1018
2600 11:03:43.200214 Write Rank0 MR14 =0x0
2601 11:03:43.208443
2602 11:03:43.208519 CH=1, VrefRange= 0, VrefLevel = 0
2603 11:03:43.214699 TX Bit0 (978~997) 20 987, Bit8 (969~985) 17 977,
2604 11:03:43.218262 TX Bit1 (977~994) 18 985, Bit9 (969~985) 17 977,
2605 11:03:43.221373 TX Bit2 (976~990) 15 983, Bit10 (970~985) 16 977,
2606 11:03:43.228616 TX Bit3 (974~989) 16 981, Bit11 (972~988) 17 980,
2607 11:03:43.231679 TX Bit4 (976~992) 17 984, Bit12 (970~988) 19 979,
2608 11:03:43.238071 TX Bit5 (977~995) 19 986, Bit13 (971~988) 18 979,
2609 11:03:43.241319 TX Bit6 (978~995) 18 986, Bit14 (970~986) 17 978,
2610 11:03:43.245004 TX Bit7 (976~991) 16 983, Bit15 (967~984) 18 975,
2611 11:03:43.245096
2612 11:03:43.248110 Write Rank0 MR14 =0x2
2613 11:03:43.256794
2614 11:03:43.256886 CH=1, VrefRange= 0, VrefLevel = 2
2615 11:03:43.263504 TX Bit0 (977~996) 20 986, Bit8 (969~985) 17 977,
2616 11:03:43.266735 TX Bit1 (976~994) 19 985, Bit9 (969~985) 17 977,
2617 11:03:43.273342 TX Bit2 (976~991) 16 983, Bit10 (969~986) 18 977,
2618 11:03:43.276663 TX Bit3 (973~990) 18 981, Bit11 (971~988) 18 979,
2619 11:03:43.280192 TX Bit4 (976~992) 17 984, Bit12 (970~989) 20 979,
2620 11:03:43.286877 TX Bit5 (977~996) 20 986, Bit13 (972~988) 17 980,
2621 11:03:43.290561 TX Bit6 (978~996) 19 987, Bit14 (970~986) 17 978,
2622 11:03:43.293244 TX Bit7 (976~991) 16 983, Bit15 (967~985) 19 976,
2623 11:03:43.293310
2624 11:03:43.297059 Write Rank0 MR14 =0x4
2625 11:03:43.305755
2626 11:03:43.305840 CH=1, VrefRange= 0, VrefLevel = 4
2627 11:03:43.312005 TX Bit0 (977~997) 21 987, Bit8 (968~986) 19 977,
2628 11:03:43.315360 TX Bit1 (976~995) 20 985, Bit9 (968~985) 18 976,
2629 11:03:43.322376 TX Bit2 (975~991) 17 983, Bit10 (969~986) 18 977,
2630 11:03:43.325520 TX Bit3 (973~990) 18 981, Bit11 (970~989) 20 979,
2631 11:03:43.328701 TX Bit4 (976~992) 17 984, Bit12 (970~990) 21 980,
2632 11:03:43.335345 TX Bit5 (977~996) 20 986, Bit13 (971~989) 19 980,
2633 11:03:43.338938 TX Bit6 (978~996) 19 987, Bit14 (970~987) 18 978,
2634 11:03:43.342052 TX Bit7 (976~991) 16 983, Bit15 (966~985) 20 975,
2635 11:03:43.342132
2636 11:03:43.345256 Write Rank0 MR14 =0x6
2637 11:03:43.354110
2638 11:03:43.354187 CH=1, VrefRange= 0, VrefLevel = 6
2639 11:03:43.360927 TX Bit0 (977~997) 21 987, Bit8 (968~986) 19 977,
2640 11:03:43.364420 TX Bit1 (976~995) 20 985, Bit9 (968~986) 19 977,
2641 11:03:43.370819 TX Bit2 (975~992) 18 983, Bit10 (969~987) 19 978,
2642 11:03:43.374378 TX Bit3 (972~990) 19 981, Bit11 (970~990) 21 980,
2643 11:03:43.377801 TX Bit4 (976~993) 18 984, Bit12 (970~990) 21 980,
2644 11:03:43.384047 TX Bit5 (977~997) 21 987, Bit13 (971~990) 20 980,
2645 11:03:43.387743 TX Bit6 (978~997) 20 987, Bit14 (969~988) 20 978,
2646 11:03:43.391208 TX Bit7 (976~992) 17 984, Bit15 (966~986) 21 976,
2647 11:03:43.391314
2648 11:03:43.394399 Write Rank0 MR14 =0x8
2649 11:03:43.402920
2650 11:03:43.402994 CH=1, VrefRange= 0, VrefLevel = 8
2651 11:03:43.409743 TX Bit0 (977~998) 22 987, Bit8 (968~987) 20 977,
2652 11:03:43.412973 TX Bit1 (976~996) 21 986, Bit9 (968~987) 20 977,
2653 11:03:43.419535 TX Bit2 (975~992) 18 983, Bit10 (969~987) 19 978,
2654 11:03:43.423090 TX Bit3 (972~990) 19 981, Bit11 (970~990) 21 980,
2655 11:03:43.426220 TX Bit4 (976~994) 19 985, Bit12 (969~990) 22 979,
2656 11:03:43.433319 TX Bit5 (976~997) 22 986, Bit13 (971~990) 20 980,
2657 11:03:43.436175 TX Bit6 (977~997) 21 987, Bit14 (969~988) 20 978,
2658 11:03:43.440154 TX Bit7 (976~992) 17 984, Bit15 (966~986) 21 976,
2659 11:03:43.440229
2660 11:03:43.443875 Write Rank0 MR14 =0xa
2661 11:03:43.451857
2662 11:03:43.455472 CH=1, VrefRange= 0, VrefLevel = 10
2663 11:03:43.458966 TX Bit0 (977~998) 22 987, Bit8 (968~988) 21 978,
2664 11:03:43.462193 TX Bit1 (976~997) 22 986, Bit9 (968~987) 20 977,
2665 11:03:43.468701 TX Bit2 (974~992) 19 983, Bit10 (969~988) 20 978,
2666 11:03:43.472031 TX Bit3 (972~991) 20 981, Bit11 (970~991) 22 980,
2667 11:03:43.475193 TX Bit4 (975~994) 20 984, Bit12 (969~991) 23 980,
2668 11:03:43.482040 TX Bit5 (976~997) 22 986, Bit13 (970~991) 22 980,
2669 11:03:43.485673 TX Bit6 (977~998) 22 987, Bit14 (969~989) 21 979,
2670 11:03:43.488595 TX Bit7 (976~992) 17 984, Bit15 (966~987) 22 976,
2671 11:03:43.488670
2672 11:03:43.492054 Write Rank0 MR14 =0xc
2673 11:03:43.501081
2674 11:03:43.504581 CH=1, VrefRange= 0, VrefLevel = 12
2675 11:03:43.508018 TX Bit0 (977~998) 22 987, Bit8 (968~988) 21 978,
2676 11:03:43.510917 TX Bit1 (976~997) 22 986, Bit9 (968~988) 21 978,
2677 11:03:43.517500 TX Bit2 (974~993) 20 983, Bit10 (968~989) 22 978,
2678 11:03:43.520874 TX Bit3 (971~991) 21 981, Bit11 (969~991) 23 980,
2679 11:03:43.524353 TX Bit4 (975~995) 21 985, Bit12 (969~991) 23 980,
2680 11:03:43.530862 TX Bit5 (976~998) 23 987, Bit13 (970~991) 22 980,
2681 11:03:43.534215 TX Bit6 (977~998) 22 987, Bit14 (969~990) 22 979,
2682 11:03:43.537610 TX Bit7 (975~993) 19 984, Bit15 (966~987) 22 976,
2683 11:03:43.537689
2684 11:03:43.540879 Write Rank0 MR14 =0xe
2685 11:03:43.549960
2686 11:03:43.553094 CH=1, VrefRange= 0, VrefLevel = 14
2687 11:03:43.556828 TX Bit0 (977~998) 22 987, Bit8 (967~990) 24 978,
2688 11:03:43.560197 TX Bit1 (975~997) 23 986, Bit9 (967~988) 22 977,
2689 11:03:43.566516 TX Bit2 (974~993) 20 983, Bit10 (968~990) 23 979,
2690 11:03:43.569722 TX Bit3 (971~992) 22 981, Bit11 (969~991) 23 980,
2691 11:03:43.573347 TX Bit4 (975~995) 21 985, Bit12 (969~991) 23 980,
2692 11:03:43.579851 TX Bit5 (976~998) 23 987, Bit13 (970~991) 22 980,
2693 11:03:43.583630 TX Bit6 (977~998) 22 987, Bit14 (969~990) 22 979,
2694 11:03:43.586349 TX Bit7 (975~994) 20 984, Bit15 (965~988) 24 976,
2695 11:03:43.586424
2696 11:03:43.589573 Write Rank0 MR14 =0x10
2697 11:03:43.599500
2698 11:03:43.602520 CH=1, VrefRange= 0, VrefLevel = 16
2699 11:03:43.605872 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
2700 11:03:43.608769 TX Bit1 (975~998) 24 986, Bit9 (967~989) 23 978,
2701 11:03:43.615906 TX Bit2 (973~994) 22 983, Bit10 (968~990) 23 979,
2702 11:03:43.619328 TX Bit3 (970~992) 23 981, Bit11 (969~991) 23 980,
2703 11:03:43.622239 TX Bit4 (975~996) 22 985, Bit12 (969~991) 23 980,
2704 11:03:43.629010 TX Bit5 (976~999) 24 987, Bit13 (970~991) 22 980,
2705 11:03:43.632288 TX Bit6 (977~999) 23 988, Bit14 (969~991) 23 980,
2706 11:03:43.635581 TX Bit7 (974~994) 21 984, Bit15 (965~988) 24 976,
2707 11:03:43.635657
2708 11:03:43.638869 Write Rank0 MR14 =0x12
2709 11:03:43.648439
2710 11:03:43.652021 CH=1, VrefRange= 0, VrefLevel = 18
2711 11:03:43.655465 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
2712 11:03:43.658352 TX Bit1 (975~998) 24 986, Bit9 (967~990) 24 978,
2713 11:03:43.665032 TX Bit2 (973~994) 22 983, Bit10 (968~990) 23 979,
2714 11:03:43.668302 TX Bit3 (970~992) 23 981, Bit11 (969~992) 24 980,
2715 11:03:43.671408 TX Bit4 (974~996) 23 985, Bit12 (968~991) 24 979,
2716 11:03:43.678356 TX Bit5 (976~999) 24 987, Bit13 (969~991) 23 980,
2717 11:03:43.681321 TX Bit6 (977~999) 23 988, Bit14 (969~991) 23 980,
2718 11:03:43.684954 TX Bit7 (974~995) 22 984, Bit15 (964~989) 26 976,
2719 11:03:43.687953
2720 11:03:43.688028 Write Rank0 MR14 =0x14
2721 11:03:43.697818
2722 11:03:43.700834 CH=1, VrefRange= 0, VrefLevel = 20
2723 11:03:43.704315 TX Bit0 (976~1000) 25 988, Bit8 (967~991) 25 979,
2724 11:03:43.707785 TX Bit1 (975~998) 24 986, Bit9 (967~990) 24 978,
2725 11:03:43.714526 TX Bit2 (972~994) 23 983, Bit10 (968~991) 24 979,
2726 11:03:43.717734 TX Bit3 (970~993) 24 981, Bit11 (969~992) 24 980,
2727 11:03:43.720955 TX Bit4 (974~997) 24 985, Bit12 (968~992) 25 980,
2728 11:03:43.727833 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2729 11:03:43.731272 TX Bit6 (977~999) 23 988, Bit14 (968~991) 24 979,
2730 11:03:43.734156 TX Bit7 (974~996) 23 985, Bit15 (964~989) 26 976,
2731 11:03:43.734254
2732 11:03:43.737458 Write Rank0 MR14 =0x16
2733 11:03:43.747090
2734 11:03:43.750431 CH=1, VrefRange= 0, VrefLevel = 22
2735 11:03:43.753683 TX Bit0 (976~999) 24 987, Bit8 (967~991) 25 979,
2736 11:03:43.756834 TX Bit1 (975~998) 24 986, Bit9 (967~990) 24 978,
2737 11:03:43.763284 TX Bit2 (972~995) 24 983, Bit10 (967~991) 25 979,
2738 11:03:43.767110 TX Bit3 (969~993) 25 981, Bit11 (969~992) 24 980,
2739 11:03:43.770321 TX Bit4 (973~998) 26 985, Bit12 (968~992) 25 980,
2740 11:03:43.777252 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2741 11:03:43.780824 TX Bit6 (976~999) 24 987, Bit14 (968~991) 24 979,
2742 11:03:43.783742 TX Bit7 (973~996) 24 984, Bit15 (963~988) 26 975,
2743 11:03:43.783818
2744 11:03:43.787073 Write Rank0 MR14 =0x18
2745 11:03:43.796413
2746 11:03:43.799774 CH=1, VrefRange= 0, VrefLevel = 24
2747 11:03:43.802970 TX Bit0 (976~1000) 25 988, Bit8 (967~991) 25 979,
2748 11:03:43.806305 TX Bit1 (974~998) 25 986, Bit9 (966~990) 25 978,
2749 11:03:43.813170 TX Bit2 (971~995) 25 983, Bit10 (968~991) 24 979,
2750 11:03:43.816533 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
2751 11:03:43.819878 TX Bit4 (973~997) 25 985, Bit12 (968~992) 25 980,
2752 11:03:43.826285 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2753 11:03:43.829539 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
2754 11:03:43.833342 TX Bit7 (973~997) 25 985, Bit15 (963~988) 26 975,
2755 11:03:43.836312
2756 11:03:43.836385 Write Rank0 MR14 =0x1a
2757 11:03:43.845762
2758 11:03:43.849000 CH=1, VrefRange= 0, VrefLevel = 26
2759 11:03:43.852505 TX Bit0 (976~1000) 25 988, Bit8 (967~991) 25 979,
2760 11:03:43.855849 TX Bit1 (974~999) 26 986, Bit9 (967~990) 24 978,
2761 11:03:43.863007 TX Bit2 (971~994) 24 982, Bit10 (967~991) 25 979,
2762 11:03:43.866134 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
2763 11:03:43.869572 TX Bit4 (972~997) 26 984, Bit12 (968~992) 25 980,
2764 11:03:43.876365 TX Bit5 (975~999) 25 987, Bit13 (968~991) 24 979,
2765 11:03:43.879223 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
2766 11:03:43.882572 TX Bit7 (973~997) 25 985, Bit15 (963~987) 25 975,
2767 11:03:43.882674
2768 11:03:43.885788 Write Rank0 MR14 =0x1c
2769 11:03:43.895545
2770 11:03:43.898930 CH=1, VrefRange= 0, VrefLevel = 28
2771 11:03:43.901989 TX Bit0 (976~1000) 25 988, Bit8 (967~991) 25 979,
2772 11:03:43.905436 TX Bit1 (974~999) 26 986, Bit9 (967~990) 24 978,
2773 11:03:43.912322 TX Bit2 (971~994) 24 982, Bit10 (967~991) 25 979,
2774 11:03:43.916112 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
2775 11:03:43.918855 TX Bit4 (972~997) 26 984, Bit12 (968~992) 25 980,
2776 11:03:43.925583 TX Bit5 (975~999) 25 987, Bit13 (968~991) 24 979,
2777 11:03:43.928681 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
2778 11:03:43.932225 TX Bit7 (973~997) 25 985, Bit15 (963~987) 25 975,
2779 11:03:43.935553
2780 11:03:43.935627 Write Rank0 MR14 =0x1e
2781 11:03:43.944851
2782 11:03:43.948459 CH=1, VrefRange= 0, VrefLevel = 30
2783 11:03:43.951615 TX Bit0 (976~1000) 25 988, Bit8 (967~991) 25 979,
2784 11:03:43.955122 TX Bit1 (974~999) 26 986, Bit9 (967~990) 24 978,
2785 11:03:43.961681 TX Bit2 (971~994) 24 982, Bit10 (967~991) 25 979,
2786 11:03:43.964775 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
2787 11:03:43.968525 TX Bit4 (972~997) 26 984, Bit12 (968~992) 25 980,
2788 11:03:43.975128 TX Bit5 (975~999) 25 987, Bit13 (968~991) 24 979,
2789 11:03:43.978505 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
2790 11:03:43.981855 TX Bit7 (973~997) 25 985, Bit15 (963~987) 25 975,
2791 11:03:43.981949
2792 11:03:43.985383
2793 11:03:43.985449 TX Vref found, early break! 375< 378
2794 11:03:43.991859 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2795 11:03:43.995240 u1DelayCellOfst[0]=8 cells (7 PI)
2796 11:03:43.998874 u1DelayCellOfst[1]=6 cells (5 PI)
2797 11:03:44.001434 u1DelayCellOfst[2]=1 cells (1 PI)
2798 11:03:44.004798 u1DelayCellOfst[3]=0 cells (0 PI)
2799 11:03:44.008144 u1DelayCellOfst[4]=3 cells (3 PI)
2800 11:03:44.008214 u1DelayCellOfst[5]=7 cells (6 PI)
2801 11:03:44.011503 u1DelayCellOfst[6]=8 cells (7 PI)
2802 11:03:44.015107 u1DelayCellOfst[7]=5 cells (4 PI)
2803 11:03:44.018535 Byte0, DQ PI dly=981, DQM PI dly= 984
2804 11:03:44.025097 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2805 11:03:44.025218
2806 11:03:44.028688 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2807 11:03:44.028783
2808 11:03:44.031990 u1DelayCellOfst[8]=5 cells (4 PI)
2809 11:03:44.034885 u1DelayCellOfst[9]=3 cells (3 PI)
2810 11:03:44.038483 u1DelayCellOfst[10]=5 cells (4 PI)
2811 11:03:44.041658 u1DelayCellOfst[11]=6 cells (5 PI)
2812 11:03:44.044825 u1DelayCellOfst[12]=6 cells (5 PI)
2813 11:03:44.044904 u1DelayCellOfst[13]=5 cells (4 PI)
2814 11:03:44.048501 u1DelayCellOfst[14]=5 cells (4 PI)
2815 11:03:44.051699 u1DelayCellOfst[15]=0 cells (0 PI)
2816 11:03:44.054625 Byte1, DQ PI dly=975, DQM PI dly= 977
2817 11:03:44.061449 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
2818 11:03:44.061519
2819 11:03:44.064869 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
2820 11:03:44.064941
2821 11:03:44.067795 Write Rank0 MR14 =0x1a
2822 11:03:44.067860
2823 11:03:44.067920 Final TX Range 0 Vref 26
2824 11:03:44.068009
2825 11:03:44.074568 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2826 11:03:44.074634
2827 11:03:44.081469 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2828 11:03:44.087778 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2829 11:03:44.098397 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2830 11:03:44.098474 Write Rank0 MR3 =0xb0
2831 11:03:44.101462 DramC Write-DBI on
2832 11:03:44.101538 ==
2833 11:03:44.104672 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2834 11:03:44.108094 fsp= 1, odt_onoff= 1, Byte mode= 0
2835 11:03:44.108165 ==
2836 11:03:44.115055 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2837 11:03:44.115123
2838 11:03:44.115177 Begin, DQ Scan Range 697~761
2839 11:03:44.115235
2840 11:03:44.115294
2841 11:03:44.117901 TX Vref Scan disable
2842 11:03:44.122193 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2843 11:03:44.125418 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2844 11:03:44.128161 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2845 11:03:44.131585 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2846 11:03:44.134957 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2847 11:03:44.138400 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2848 11:03:44.141354 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2849 11:03:44.148087 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2850 11:03:44.151226 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2851 11:03:44.154786 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2852 11:03:44.158234 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
2853 11:03:44.161872 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
2854 11:03:44.164858 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2855 11:03:44.168162 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2856 11:03:44.171821 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2857 11:03:44.174770 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2858 11:03:44.178673 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2859 11:03:44.181811 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2860 11:03:44.185263 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2861 11:03:44.192810 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2862 11:03:44.195972 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2863 11:03:44.199161 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2864 11:03:44.202985 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2865 11:03:44.206169 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2866 11:03:44.209394 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2867 11:03:44.212413 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2868 11:03:44.216282 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2869 11:03:44.219608 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2870 11:03:44.222990 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2871 11:03:44.225808 Byte0, DQ PI dly=729, DQM PI dly= 729
2872 11:03:44.229166 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
2873 11:03:44.229257
2874 11:03:44.236027 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
2875 11:03:44.236101
2876 11:03:44.239280 Byte1, DQ PI dly=720, DQM PI dly= 720
2877 11:03:44.242786 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)
2878 11:03:44.242861
2879 11:03:44.246266 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)
2880 11:03:44.246340
2881 11:03:44.253069 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2882 11:03:44.259749 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2883 11:03:44.269522 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2884 11:03:44.269597 Write Rank0 MR3 =0x30
2885 11:03:44.272722 DramC Write-DBI off
2886 11:03:44.272797
2887 11:03:44.272854 [DATLAT]
2888 11:03:44.276016 Freq=1600, CH1 RK0, use_rxtx_scan=0
2889 11:03:44.276096
2890 11:03:44.279220 DATLAT Default: 0xf
2891 11:03:44.279312 7, 0xFFFF, sum=0
2892 11:03:44.282890 8, 0xFFFF, sum=0
2893 11:03:44.282988 9, 0xFFFF, sum=0
2894 11:03:44.286417 10, 0xFFFF, sum=0
2895 11:03:44.286498 11, 0xFFFF, sum=0
2896 11:03:44.289633 12, 0xFFFF, sum=0
2897 11:03:44.289709 13, 0xFFFF, sum=0
2898 11:03:44.289768 14, 0x0, sum=1
2899 11:03:44.292640 15, 0x0, sum=2
2900 11:03:44.292716 16, 0x0, sum=3
2901 11:03:44.295883 17, 0x0, sum=4
2902 11:03:44.299168 pattern=2 first_step=14 total pass=5 best_step=16
2903 11:03:44.299243 ==
2904 11:03:44.306204 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2905 11:03:44.306280 fsp= 1, odt_onoff= 1, Byte mode= 0
2906 11:03:44.309748 ==
2907 11:03:44.312803 Start DQ dly to find pass range UseTestEngine =1
2908 11:03:44.316423 x-axis: bit #, y-axis: DQ dly (-127~63)
2909 11:03:44.316499 RX Vref Scan = 1
2910 11:03:44.432594
2911 11:03:44.432689 RX Vref found, early break!
2912 11:03:44.432747
2913 11:03:44.439011 Final RX Vref 13, apply to both rank0 and 1
2914 11:03:44.439088 ==
2915 11:03:44.442476 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2916 11:03:44.445932 fsp= 1, odt_onoff= 1, Byte mode= 0
2917 11:03:44.446008 ==
2918 11:03:44.446066 DQS Delay:
2919 11:03:44.449512 DQS0 = 0, DQS1 = 0
2920 11:03:44.449586 DQM Delay:
2921 11:03:44.452219 DQM0 = 20, DQM1 = 18
2922 11:03:44.452293 DQ Delay:
2923 11:03:44.455542 DQ0 =24, DQ1 =23, DQ2 =16, DQ3 =15
2924 11:03:44.458875 DQ4 =18, DQ5 =24, DQ6 =25, DQ7 =19
2925 11:03:44.462549 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19
2926 11:03:44.465582 DQ12 =20, DQ13 =19, DQ14 =18, DQ15 =17
2927 11:03:44.465656
2928 11:03:44.465714
2929 11:03:44.465767
2930 11:03:44.469265 [DramC_TX_OE_Calibration] TA2
2931 11:03:44.472294 Original DQ_B0 (3 6) =30, OEN = 27
2932 11:03:44.475639 Original DQ_B1 (3 6) =30, OEN = 27
2933 11:03:44.479169 23, 0x0, End_B0=23 End_B1=23
2934 11:03:44.479244 24, 0x0, End_B0=24 End_B1=24
2935 11:03:44.482138 25, 0x0, End_B0=25 End_B1=25
2936 11:03:44.485543 26, 0x0, End_B0=26 End_B1=26
2937 11:03:44.488977 27, 0x0, End_B0=27 End_B1=27
2938 11:03:44.489052 28, 0x0, End_B0=28 End_B1=28
2939 11:03:44.492768 29, 0x0, End_B0=29 End_B1=29
2940 11:03:44.496001 30, 0x0, End_B0=30 End_B1=30
2941 11:03:44.499599 31, 0xFFFF, End_B0=30 End_B1=30
2942 11:03:44.505497 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2943 11:03:44.509279 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2944 11:03:44.509381
2945 11:03:44.509446
2946 11:03:44.512397 Write Rank0 MR23 =0x3f
2947 11:03:44.512471 [DQSOSC]
2948 11:03:44.518861 [DQSOSCAuto] RK0, (LSB)MR18= 0xba, (MSB)MR19= 0x3, tDQSOscB0 = 330 ps tDQSOscB1 = 0 ps
2949 11:03:44.526138 CH1_RK0: MR19=0x3, MR18=0xBA, DQSOSC=330, MR23=63, INC=22, DEC=33
2950 11:03:44.529255 Write Rank0 MR23 =0x3f
2951 11:03:44.529329 [DQSOSC]
2952 11:03:44.535589 [DQSOSCAuto] RK0, (LSB)MR18= 0xb9, (MSB)MR19= 0x3, tDQSOscB0 = 330 ps tDQSOscB1 = 0 ps
2953 11:03:44.538907 CH1 RK0: MR19=3, MR18=B9
2954 11:03:44.542263 [RankSwap] Rank num 2, (Multi 1), Rank 1
2955 11:03:44.545575 Write Rank0 MR2 =0xad
2956 11:03:44.545652 [Write Leveling]
2957 11:03:44.548817 delay byte0 byte1 byte2 byte3
2958 11:03:44.548891
2959 11:03:44.552527 10 0 0
2960 11:03:44.552603 11 0 0
2961 11:03:44.552661 12 0 0
2962 11:03:44.555473 13 0 0
2963 11:03:44.555549 14 0 0
2964 11:03:44.558764 15 0 0
2965 11:03:44.558839 16 0 0
2966 11:03:44.558898 17 0 0
2967 11:03:44.562107 18 0 0
2968 11:03:44.562182 19 0 0
2969 11:03:44.565718 20 0 0
2970 11:03:44.565793 21 0 0
2971 11:03:44.565852 22 0 0
2972 11:03:44.569293 23 0 0
2973 11:03:44.569369 24 0 0
2974 11:03:44.572161 25 0 0
2975 11:03:44.572236 26 0 0
2976 11:03:44.575479 27 0 0
2977 11:03:44.575554 28 0 0
2978 11:03:44.575614 29 0 0
2979 11:03:44.579260 30 0 0
2980 11:03:44.579335 31 0 0
2981 11:03:44.582311 32 0 0
2982 11:03:44.582411 33 0 ff
2983 11:03:44.585841 34 ff ff
2984 11:03:44.585919 35 ff ff
2985 11:03:44.585979 36 ff ff
2986 11:03:44.589064 37 ff ff
2987 11:03:44.589167 38 ff ff
2988 11:03:44.592166 39 ff ff
2989 11:03:44.592242 40 ff ff
2990 11:03:44.595618 pass bytecount = 0xff (0xff: all bytes pass)
2991 11:03:44.598890
2992 11:03:44.598964 DQS0 dly: 34
2993 11:03:44.599021 DQS1 dly: 33
2994 11:03:44.602843 Write Rank0 MR2 =0x2d
2995 11:03:44.605677 [RankSwap] Rank num 2, (Multi 1), Rank 0
2996 11:03:44.609351 Write Rank1 MR1 =0xd6
2997 11:03:44.609449 [Gating]
2998 11:03:44.609533 ==
2999 11:03:44.612434 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3000 11:03:44.615802 fsp= 1, odt_onoff= 1, Byte mode= 0
3001 11:03:44.615876 ==
3002 11:03:44.622420 3 1 0 |2e2e 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3003 11:03:44.625487 3 1 4 |1010 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
3004 11:03:44.629075 3 1 8 |605 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3005 11:03:44.635503 3 1 12 |1615 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3006 11:03:44.639247 3 1 16 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3007 11:03:44.643654 3 1 20 |1615 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3008 11:03:44.645795 3 1 24 |2121 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3009 11:03:44.652188 3 1 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3010 11:03:44.655478 3 2 0 |3939 807 |(11 11)(11 11) |(1 1)(1 1)| 0
3011 11:03:44.659168 3 2 4 |1514 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3012 11:03:44.662484 [Byte 0] Lead/lag Transition tap number (1)
3013 11:03:44.669623 3 2 8 |3736 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3014 11:03:44.672275 3 2 12 |505 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3015 11:03:44.675803 3 2 16 |2929 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3016 11:03:44.682595 3 2 20 |3635 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3017 11:03:44.686170 3 2 24 |3a39 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3018 11:03:44.689356 3 2 28 |2524 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3019 11:03:44.695924 3 3 0 |2625 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3020 11:03:44.699239 3 3 4 |3534 909 |(11 11)(11 11) |(0 1)(1 1)| 0
3021 11:03:44.702541 3 3 8 |3534 b0a |(11 11)(11 11) |(0 1)(1 1)| 0
3022 11:03:44.706093 [Byte 1] Lead/lag falling Transition (3, 3, 8)
3023 11:03:44.712515 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3024 11:03:44.715788 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3025 11:03:44.719422 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3026 11:03:44.725864 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3027 11:03:44.729740 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3028 11:03:44.732948 3 4 0 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
3029 11:03:44.738934 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3030 11:03:44.742884 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3031 11:03:44.745848 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3032 11:03:44.749388 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3033 11:03:44.755744 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3034 11:03:44.759550 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3035 11:03:44.762536 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3036 11:03:44.768959 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3037 11:03:44.772399 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3038 11:03:44.776214 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3039 11:03:44.782832 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3040 11:03:44.785693 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3041 11:03:44.789075 [Byte 0] Lead/lag falling Transition (3, 5, 16)
3042 11:03:44.792568 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3043 11:03:44.799521 [Byte 0] Lead/lag Transition tap number (2)
3044 11:03:44.802447 [Byte 1] Lead/lag falling Transition (3, 5, 20)
3045 11:03:44.805981 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3046 11:03:44.809321 [Byte 1] Lead/lag Transition tap number (2)
3047 11:03:44.816256 3 5 28 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
3048 11:03:44.819245 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3049 11:03:44.822729 [Byte 0]First pass (3, 6, 0)
3050 11:03:44.825911 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3051 11:03:44.829143 [Byte 1]First pass (3, 6, 4)
3052 11:03:44.832508 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3053 11:03:44.835708 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3054 11:03:44.839432 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3055 11:03:44.845943 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3056 11:03:44.849302 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3057 11:03:44.852189 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3058 11:03:44.855819 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3059 11:03:44.858882 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3060 11:03:44.865931 All bytes gating window > 1UI, Early break!
3061 11:03:44.866005
3062 11:03:44.868840 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
3063 11:03:44.868914
3064 11:03:44.872421 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 24)
3065 11:03:44.872496
3066 11:03:44.872553
3067 11:03:44.872606
3068 11:03:44.875599 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
3069 11:03:44.875678
3070 11:03:44.879270 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
3071 11:03:44.879344
3072 11:03:44.879402
3073 11:03:44.882158 Write Rank1 MR1 =0x56
3074 11:03:44.882232
3075 11:03:44.885633 best RODT dly(2T, 0.5T) = (2, 2)
3076 11:03:44.885707
3077 11:03:44.888876 best RODT dly(2T, 0.5T) = (2, 2)
3078 11:03:44.888950 ==
3079 11:03:44.892384 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3080 11:03:44.896246 fsp= 1, odt_onoff= 1, Byte mode= 0
3081 11:03:44.896321 ==
3082 11:03:44.902423 Start DQ dly to find pass range UseTestEngine =0
3083 11:03:44.905863 x-axis: bit #, y-axis: DQ dly (-127~63)
3084 11:03:44.905937 RX Vref Scan = 0
3085 11:03:44.909125 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3086 11:03:44.912637 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3087 11:03:44.916045 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3088 11:03:44.919389 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3089 11:03:44.922436 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3090 11:03:44.925704 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3091 11:03:44.925779 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3092 11:03:44.929292 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3093 11:03:44.932532 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3094 11:03:44.936027 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3095 11:03:44.939366 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3096 11:03:44.942744 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3097 11:03:44.945769 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3098 11:03:44.948936 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3099 11:03:44.949013 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3100 11:03:44.952462 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3101 11:03:44.955507 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3102 11:03:44.959253 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3103 11:03:44.962219 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3104 11:03:44.965793 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3105 11:03:44.969416 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3106 11:03:44.969494 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3107 11:03:44.972448 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3108 11:03:44.975803 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3109 11:03:44.979259 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3110 11:03:44.982716 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3111 11:03:44.985873 0, [0] xxooxxxo xxxxxxxo [MSB]
3112 11:03:44.989352 1, [0] xxoooxxo xxxxxxxo [MSB]
3113 11:03:44.989428 2, [0] xxoooxxo oooxxxxo [MSB]
3114 11:03:44.992928 3, [0] xxoooxxo ooooxooo [MSB]
3115 11:03:44.995964 4, [0] xxoooxxo oooooooo [MSB]
3116 11:03:44.999275 5, [0] xoooooxo oooooooo [MSB]
3117 11:03:45.002660 6, [0] xoooooxo oooooooo [MSB]
3118 11:03:45.005599 34, [0] oooxoooo oooooooo [MSB]
3119 11:03:45.005675 35, [0] ooxxoooo ooooooox [MSB]
3120 11:03:45.009483 36, [0] ooxxoooo ooooooox [MSB]
3121 11:03:45.012557 37, [0] ooxxxooo ooxoooox [MSB]
3122 11:03:45.015966 38, [0] ooxxxooo xoxoooxx [MSB]
3123 11:03:45.018947 39, [0] ooxxxoox xxxxoxxx [MSB]
3124 11:03:45.022530 40, [0] ooxxxoox xxxxoxxx [MSB]
3125 11:03:45.025653 41, [0] ooxxxoox xxxxxxxx [MSB]
3126 11:03:45.025729 42, [0] oxxxxxxx xxxxxxxx [MSB]
3127 11:03:45.029654 43, [0] xxxxxxxx xxxxxxxx [MSB]
3128 11:03:45.032496 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3129 11:03:45.035744 iDelay=43, Bit 1, Center 23 (5 ~ 41) 37
3130 11:03:45.039445 iDelay=43, Bit 2, Center 17 (0 ~ 34) 35
3131 11:03:45.042746 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
3132 11:03:45.049104 iDelay=43, Bit 4, Center 18 (1 ~ 36) 36
3133 11:03:45.052930 iDelay=43, Bit 5, Center 23 (5 ~ 41) 37
3134 11:03:45.056459 iDelay=43, Bit 6, Center 24 (7 ~ 41) 35
3135 11:03:45.059117 iDelay=43, Bit 7, Center 19 (0 ~ 38) 39
3136 11:03:45.062312 iDelay=43, Bit 8, Center 19 (2 ~ 37) 36
3137 11:03:45.065701 iDelay=43, Bit 9, Center 20 (2 ~ 38) 37
3138 11:03:45.069212 iDelay=43, Bit 10, Center 19 (2 ~ 36) 35
3139 11:03:45.072301 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
3140 11:03:45.076359 iDelay=43, Bit 12, Center 22 (4 ~ 40) 37
3141 11:03:45.078993 iDelay=43, Bit 13, Center 20 (3 ~ 38) 36
3142 11:03:45.082425 iDelay=43, Bit 14, Center 20 (3 ~ 37) 35
3143 11:03:45.085710 iDelay=43, Bit 15, Center 16 (-1 ~ 34) 36
3144 11:03:45.085785 ==
3145 11:03:45.093171 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3146 11:03:45.095935 fsp= 1, odt_onoff= 1, Byte mode= 0
3147 11:03:45.096011 ==
3148 11:03:45.096076 DQS Delay:
3149 11:03:45.099277 DQS0 = 0, DQS1 = 0
3150 11:03:45.099351 DQM Delay:
3151 11:03:45.102654 DQM0 = 20, DQM1 = 19
3152 11:03:45.102729 DQ Delay:
3153 11:03:45.106236 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
3154 11:03:45.109044 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =19
3155 11:03:45.112491 DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =20
3156 11:03:45.115688 DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =16
3157 11:03:45.115763
3158 11:03:45.115821
3159 11:03:45.119454 DramC Write-DBI off
3160 11:03:45.119533 ==
3161 11:03:45.122647 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3162 11:03:45.125631 fsp= 1, odt_onoff= 1, Byte mode= 0
3163 11:03:45.125707 ==
3164 11:03:45.129103 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3165 11:03:45.132495
3166 11:03:45.132570 Begin, DQ Scan Range 929~1185
3167 11:03:45.132628
3168 11:03:45.132681
3169 11:03:45.135754 TX Vref Scan disable
3170 11:03:45.139493 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3171 11:03:45.142757 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3172 11:03:45.145908 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3173 11:03:45.149276 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3174 11:03:45.153038 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3175 11:03:45.155534 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3176 11:03:45.159294 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3177 11:03:45.162171 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3178 11:03:45.169324 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3179 11:03:45.172576 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3180 11:03:45.176032 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3181 11:03:45.179386 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3182 11:03:45.182317 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3183 11:03:45.186071 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3184 11:03:45.188878 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3185 11:03:45.192300 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3186 11:03:45.195823 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3187 11:03:45.198709 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3188 11:03:45.202298 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3189 11:03:45.205993 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3190 11:03:45.208989 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3191 11:03:45.212119 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3192 11:03:45.215376 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3193 11:03:45.218927 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3194 11:03:45.225609 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3195 11:03:45.228653 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3196 11:03:45.232161 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3197 11:03:45.235531 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3198 11:03:45.238508 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3199 11:03:45.242254 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3200 11:03:45.245786 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3201 11:03:45.248722 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3202 11:03:45.252660 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3203 11:03:45.255776 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3204 11:03:45.258796 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3205 11:03:45.262299 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3206 11:03:45.265830 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3207 11:03:45.269022 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3208 11:03:45.272261 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3209 11:03:45.275728 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3210 11:03:45.278879 969 |3 6 9|[0] xxxxxxxx xxxxxxxo [MSB]
3211 11:03:45.281996 970 |3 6 10|[0] xxxxxxxx oooxxxxo [MSB]
3212 11:03:45.285343 971 |3 6 11|[0] xxxxxxxx oooxoxoo [MSB]
3213 11:03:45.288792 972 |3 6 12|[0] xxooxxxx oooooxoo [MSB]
3214 11:03:45.295480 973 |3 6 13|[0] xxooxxxx oooooooo [MSB]
3215 11:03:45.298569 974 |3 6 14|[0] xxoooxxx oooooooo [MSB]
3216 11:03:45.302285 975 |3 6 15|[0] xxoooxxo oooooooo [MSB]
3217 11:03:45.305193 976 |3 6 16|[0] xxooooxo oooooooo [MSB]
3218 11:03:45.309255 991 |3 6 31|[0] oooooooo ooooooox [MSB]
3219 11:03:45.312248 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3220 11:03:45.319282 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3221 11:03:45.322439 994 |3 6 34|[0] ooxxoooo xxxxxxxx [MSB]
3222 11:03:45.325301 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]
3223 11:03:45.328595 996 |3 6 36|[0] ooxxxoox xxxxxxxx [MSB]
3224 11:03:45.332134 997 |3 6 37|[0] ooxxxoox xxxxxxxx [MSB]
3225 11:03:45.335804 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
3226 11:03:45.339078 Byte0, DQ PI dly=984, DQM PI dly= 984
3227 11:03:45.342482 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
3228 11:03:45.342620
3229 11:03:45.345325 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
3230 11:03:45.349165
3231 11:03:45.352495 Byte1, DQ PI dly=980, DQM PI dly= 980
3232 11:03:45.355585 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
3233 11:03:45.355807
3234 11:03:45.358908 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
3235 11:03:45.359128
3236 11:03:45.359298 ==
3237 11:03:45.366248 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3238 11:03:45.369418 fsp= 1, odt_onoff= 1, Byte mode= 0
3239 11:03:45.369770 ==
3240 11:03:45.372524 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3241 11:03:45.372906
3242 11:03:45.375605 Begin, DQ Scan Range 956~1020
3243 11:03:45.379046 Write Rank1 MR14 =0x0
3244 11:03:45.386014
3245 11:03:45.386508 CH=1, VrefRange= 0, VrefLevel = 0
3246 11:03:45.392557 TX Bit0 (979~997) 19 988, Bit8 (973~987) 15 980,
3247 11:03:45.395833 TX Bit1 (978~994) 17 986, Bit9 (972~988) 17 980,
3248 11:03:45.402693 TX Bit2 (976~991) 16 983, Bit10 (974~988) 15 981,
3249 11:03:45.405776 TX Bit3 (974~990) 17 982, Bit11 (975~991) 17 983,
3250 11:03:45.409397 TX Bit4 (976~992) 17 984, Bit12 (975~990) 16 982,
3251 11:03:45.416064 TX Bit5 (978~996) 19 987, Bit13 (976~989) 14 982,
3252 11:03:45.419064 TX Bit6 (978~997) 20 987, Bit14 (975~990) 16 982,
3253 11:03:45.422658 TX Bit7 (977~991) 15 984, Bit15 (969~986) 18 977,
3254 11:03:45.423111
3255 11:03:45.426021 Write Rank1 MR14 =0x2
3256 11:03:45.434682
3257 11:03:45.435067 CH=1, VrefRange= 0, VrefLevel = 2
3258 11:03:45.441132 TX Bit0 (978~998) 21 988, Bit8 (972~989) 18 980,
3259 11:03:45.444524 TX Bit1 (978~995) 18 986, Bit9 (972~989) 18 980,
3260 11:03:45.451140 TX Bit2 (975~991) 17 983, Bit10 (974~990) 17 982,
3261 11:03:45.454723 TX Bit3 (973~990) 18 981, Bit11 (975~992) 18 983,
3262 11:03:45.458192 TX Bit4 (976~992) 17 984, Bit12 (974~991) 18 982,
3263 11:03:45.464523 TX Bit5 (978~995) 18 986, Bit13 (976~990) 15 983,
3264 11:03:45.467624 TX Bit6 (978~997) 20 987, Bit14 (975~990) 16 982,
3265 11:03:45.471000 TX Bit7 (977~992) 16 984, Bit15 (969~986) 18 977,
3266 11:03:45.471075
3267 11:03:45.474150 Write Rank1 MR14 =0x4
3268 11:03:45.482874
3269 11:03:45.482949 CH=1, VrefRange= 0, VrefLevel = 4
3270 11:03:45.489528 TX Bit0 (978~998) 21 988, Bit8 (972~989) 18 980,
3271 11:03:45.492883 TX Bit1 (978~995) 18 986, Bit9 (972~989) 18 980,
3272 11:03:45.500057 TX Bit2 (975~991) 17 983, Bit10 (974~990) 17 982,
3273 11:03:45.502789 TX Bit3 (973~990) 18 981, Bit11 (975~992) 18 983,
3274 11:03:45.506225 TX Bit4 (976~992) 17 984, Bit12 (974~991) 18 982,
3275 11:03:45.512930 TX Bit5 (978~995) 18 986, Bit13 (976~990) 15 983,
3276 11:03:45.516583 TX Bit6 (978~997) 20 987, Bit14 (975~990) 16 982,
3277 11:03:45.519388 TX Bit7 (977~992) 16 984, Bit15 (969~986) 18 977,
3278 11:03:45.519464
3279 11:03:45.523001 Write Rank1 MR14 =0x6
3280 11:03:45.531626
3281 11:03:45.531701 CH=1, VrefRange= 0, VrefLevel = 6
3282 11:03:45.538124 TX Bit0 (978~998) 21 988, Bit8 (972~990) 19 981,
3283 11:03:45.541714 TX Bit1 (977~996) 20 986, Bit9 (971~990) 20 980,
3284 11:03:45.548286 TX Bit2 (974~991) 18 982, Bit10 (973~991) 19 982,
3285 11:03:45.551643 TX Bit3 (972~991) 20 981, Bit11 (975~992) 18 983,
3286 11:03:45.555268 TX Bit4 (975~993) 19 984, Bit12 (973~992) 20 982,
3287 11:03:45.561801 TX Bit5 (977~997) 21 987, Bit13 (975~991) 17 983,
3288 11:03:45.564723 TX Bit6 (977~998) 22 987, Bit14 (974~991) 18 982,
3289 11:03:45.568280 TX Bit7 (976~992) 17 984, Bit15 (969~987) 19 978,
3290 11:03:45.568357
3291 11:03:45.571294 Write Rank1 MR14 =0x8
3292 11:03:45.580227
3293 11:03:45.580303 CH=1, VrefRange= 0, VrefLevel = 8
3294 11:03:45.586975 TX Bit0 (977~998) 22 987, Bit8 (971~990) 20 980,
3295 11:03:45.590228 TX Bit1 (978~996) 19 987, Bit9 (971~991) 21 981,
3296 11:03:45.597036 TX Bit2 (975~992) 18 983, Bit10 (972~991) 20 981,
3297 11:03:45.600600 TX Bit3 (972~991) 20 981, Bit11 (974~993) 20 983,
3298 11:03:45.603608 TX Bit4 (975~993) 19 984, Bit12 (972~992) 21 982,
3299 11:03:45.610054 TX Bit5 (977~997) 21 987, Bit13 (975~991) 17 983,
3300 11:03:45.613464 TX Bit6 (977~998) 22 987, Bit14 (973~991) 19 982,
3301 11:03:45.616937 TX Bit7 (976~993) 18 984, Bit15 (969~987) 19 978,
3302 11:03:45.617013
3303 11:03:45.620312 Write Rank1 MR14 =0xa
3304 11:03:45.629003
3305 11:03:45.631814 CH=1, VrefRange= 0, VrefLevel = 10
3306 11:03:45.635533 TX Bit0 (977~998) 22 987, Bit8 (971~991) 21 981,
3307 11:03:45.639084 TX Bit1 (977~997) 21 987, Bit9 (970~991) 22 980,
3308 11:03:45.645447 TX Bit2 (974~992) 19 983, Bit10 (972~991) 20 981,
3309 11:03:45.648781 TX Bit3 (971~992) 22 981, Bit11 (974~993) 20 983,
3310 11:03:45.651949 TX Bit4 (975~994) 20 984, Bit12 (973~992) 20 982,
3311 11:03:45.658790 TX Bit5 (977~998) 22 987, Bit13 (974~991) 18 982,
3312 11:03:45.661959 TX Bit6 (977~998) 22 987, Bit14 (973~992) 20 982,
3313 11:03:45.665672 TX Bit7 (976~993) 18 984, Bit15 (968~987) 20 977,
3314 11:03:45.668610
3315 11:03:45.668685 Write Rank1 MR14 =0xc
3316 11:03:45.677434
3317 11:03:45.680822 CH=1, VrefRange= 0, VrefLevel = 12
3318 11:03:45.684762 TX Bit0 (977~999) 23 988, Bit8 (971~991) 21 981,
3319 11:03:45.687307 TX Bit1 (977~997) 21 987, Bit9 (970~991) 22 980,
3320 11:03:45.694196 TX Bit2 (974~992) 19 983, Bit10 (972~992) 21 982,
3321 11:03:45.697412 TX Bit3 (971~992) 22 981, Bit11 (973~993) 21 983,
3322 11:03:45.700884 TX Bit4 (975~994) 20 984, Bit12 (972~992) 21 982,
3323 11:03:45.707296 TX Bit5 (976~998) 23 987, Bit13 (975~992) 18 983,
3324 11:03:45.710671 TX Bit6 (977~999) 23 988, Bit14 (972~992) 21 982,
3325 11:03:45.713881 TX Bit7 (976~994) 19 985, Bit15 (968~988) 21 978,
3326 11:03:45.717368
3327 11:03:45.717443 Write Rank1 MR14 =0xe
3328 11:03:45.726507
3329 11:03:45.729935 CH=1, VrefRange= 0, VrefLevel = 14
3330 11:03:45.733405 TX Bit0 (977~999) 23 988, Bit8 (971~992) 22 981,
3331 11:03:45.736931 TX Bit1 (977~998) 22 987, Bit9 (969~991) 23 980,
3332 11:03:45.743168 TX Bit2 (973~993) 21 983, Bit10 (972~992) 21 982,
3333 11:03:45.746849 TX Bit3 (970~992) 23 981, Bit11 (973~993) 21 983,
3334 11:03:45.750035 TX Bit4 (974~995) 22 984, Bit12 (971~993) 23 982,
3335 11:03:45.756697 TX Bit5 (976~998) 23 987, Bit13 (973~992) 20 982,
3336 11:03:45.759783 TX Bit6 (977~999) 23 988, Bit14 (972~992) 21 982,
3337 11:03:45.763200 TX Bit7 (976~995) 20 985, Bit15 (968~989) 22 978,
3338 11:03:45.763277
3339 11:03:45.766925 Write Rank1 MR14 =0x10
3340 11:03:45.776355
3341 11:03:45.778962 CH=1, VrefRange= 0, VrefLevel = 16
3342 11:03:45.782282 TX Bit0 (977~1000) 24 988, Bit8 (970~992) 23 981,
3343 11:03:45.785819 TX Bit1 (976~998) 23 987, Bit9 (970~992) 23 981,
3344 11:03:45.793158 TX Bit2 (972~993) 22 982, Bit10 (971~992) 22 981,
3345 11:03:45.796098 TX Bit3 (971~993) 23 982, Bit11 (973~994) 22 983,
3346 11:03:45.799130 TX Bit4 (974~996) 23 985, Bit12 (972~993) 22 982,
3347 11:03:45.805767 TX Bit5 (976~998) 23 987, Bit13 (972~992) 21 982,
3348 11:03:45.809257 TX Bit6 (977~999) 23 988, Bit14 (972~993) 22 982,
3349 11:03:45.812329 TX Bit7 (976~995) 20 985, Bit15 (968~990) 23 979,
3350 11:03:45.812405
3351 11:03:45.815930 Write Rank1 MR14 =0x12
3352 11:03:45.825050
3353 11:03:45.828420 CH=1, VrefRange= 0, VrefLevel = 18
3354 11:03:45.831831 TX Bit0 (977~1000) 24 988, Bit8 (970~992) 23 981,
3355 11:03:45.835209 TX Bit1 (977~998) 22 987, Bit9 (969~992) 24 980,
3356 11:03:45.841968 TX Bit2 (972~994) 23 983, Bit10 (971~992) 22 981,
3357 11:03:45.844826 TX Bit3 (970~993) 24 981, Bit11 (972~994) 23 983,
3358 11:03:45.848265 TX Bit4 (974~996) 23 985, Bit12 (971~993) 23 982,
3359 11:03:45.854696 TX Bit5 (976~999) 24 987, Bit13 (973~993) 21 983,
3360 11:03:45.858227 TX Bit6 (976~1000) 25 988, Bit14 (971~993) 23 982,
3361 11:03:45.861727 TX Bit7 (975~995) 21 985, Bit15 (968~991) 24 979,
3362 11:03:45.864902
3363 11:03:45.864977 Write Rank1 MR14 =0x14
3364 11:03:45.874470
3365 11:03:45.877642 CH=1, VrefRange= 0, VrefLevel = 20
3366 11:03:45.881107 TX Bit0 (977~1000) 24 988, Bit8 (970~993) 24 981,
3367 11:03:45.884069 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
3368 11:03:45.890646 TX Bit2 (972~994) 23 983, Bit10 (970~992) 23 981,
3369 11:03:45.894287 TX Bit3 (970~994) 25 982, Bit11 (971~994) 24 982,
3370 11:03:45.897747 TX Bit4 (973~997) 25 985, Bit12 (971~993) 23 982,
3371 11:03:45.904361 TX Bit5 (976~999) 24 987, Bit13 (972~993) 22 982,
3372 11:03:45.907507 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
3373 11:03:45.910809 TX Bit7 (975~996) 22 985, Bit15 (968~991) 24 979,
3374 11:03:45.914064
3375 11:03:45.914139 Write Rank1 MR14 =0x16
3376 11:03:45.923619
3377 11:03:45.926808 CH=1, VrefRange= 0, VrefLevel = 22
3378 11:03:45.930041 TX Bit0 (976~1000) 25 988, Bit8 (969~993) 25 981,
3379 11:03:45.933394 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
3380 11:03:45.940384 TX Bit2 (971~995) 25 983, Bit10 (969~992) 24 980,
3381 11:03:45.943769 TX Bit3 (969~994) 26 981, Bit11 (971~994) 24 982,
3382 11:03:45.947014 TX Bit4 (973~998) 26 985, Bit12 (970~993) 24 981,
3383 11:03:45.953864 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
3384 11:03:45.956748 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
3385 11:03:45.960365 TX Bit7 (975~996) 22 985, Bit15 (967~991) 25 979,
3386 11:03:45.963634
3387 11:03:45.963708 Write Rank1 MR14 =0x18
3388 11:03:45.972698
3389 11:03:45.976401 CH=1, VrefRange= 0, VrefLevel = 24
3390 11:03:45.980034 TX Bit0 (976~1000) 25 988, Bit8 (969~993) 25 981,
3391 11:03:45.983136 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
3392 11:03:45.989837 TX Bit2 (971~995) 25 983, Bit10 (969~992) 24 980,
3393 11:03:45.993044 TX Bit3 (969~994) 26 981, Bit11 (971~994) 24 982,
3394 11:03:45.996361 TX Bit4 (973~998) 26 985, Bit12 (970~993) 24 981,
3395 11:03:46.002814 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
3396 11:03:46.006180 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
3397 11:03:46.009945 TX Bit7 (975~996) 22 985, Bit15 (967~991) 25 979,
3398 11:03:46.012712
3399 11:03:46.012787 Write Rank1 MR14 =0x1a
3400 11:03:46.022199
3401 11:03:46.026302 CH=1, VrefRange= 0, VrefLevel = 26
3402 11:03:46.029947 TX Bit0 (976~1000) 25 988, Bit8 (969~993) 25 981,
3403 11:03:46.032279 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
3404 11:03:46.039124 TX Bit2 (971~995) 25 983, Bit10 (969~992) 24 980,
3405 11:03:46.042763 TX Bit3 (969~994) 26 981, Bit11 (971~994) 24 982,
3406 11:03:46.046027 TX Bit4 (973~998) 26 985, Bit12 (970~993) 24 981,
3407 11:03:46.052329 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
3408 11:03:46.055824 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
3409 11:03:46.059348 TX Bit7 (975~996) 22 985, Bit15 (967~991) 25 979,
3410 11:03:46.062321
3411 11:03:46.062390 Write Rank1 MR14 =0x1c
3412 11:03:46.072068
3413 11:03:46.075237 CH=1, VrefRange= 0, VrefLevel = 28
3414 11:03:46.078836 TX Bit0 (976~1000) 25 988, Bit8 (969~993) 25 981,
3415 11:03:46.082225 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
3416 11:03:46.088488 TX Bit2 (971~995) 25 983, Bit10 (969~992) 24 980,
3417 11:03:46.091701 TX Bit3 (969~994) 26 981, Bit11 (971~994) 24 982,
3418 11:03:46.095336 TX Bit4 (973~998) 26 985, Bit12 (970~993) 24 981,
3419 11:03:46.102187 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
3420 11:03:46.105366 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
3421 11:03:46.108655 TX Bit7 (975~996) 22 985, Bit15 (967~991) 25 979,
3422 11:03:46.111780
3423 11:03:46.111856 Write Rank1 MR14 =0x1e
3424 11:03:46.121417
3425 11:03:46.124546 CH=1, VrefRange= 0, VrefLevel = 30
3426 11:03:46.127894 TX Bit0 (976~1000) 25 988, Bit8 (969~993) 25 981,
3427 11:03:46.131323 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
3428 11:03:46.137573 TX Bit2 (971~995) 25 983, Bit10 (969~992) 24 980,
3429 11:03:46.141538 TX Bit3 (969~994) 26 981, Bit11 (971~994) 24 982,
3430 11:03:46.144500 TX Bit4 (973~998) 26 985, Bit12 (970~993) 24 981,
3431 11:03:46.151414 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
3432 11:03:46.154976 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
3433 11:03:46.157844 TX Bit7 (975~996) 22 985, Bit15 (967~991) 25 979,
3434 11:03:46.161456
3435 11:03:46.164435 wait MRW command Rank1 MR14 =0x20 fired (1)
3436 11:03:46.164510 Write Rank1 MR14 =0x20
3437 11:03:46.174090
3438 11:03:46.177725 CH=1, VrefRange= 0, VrefLevel = 32
3439 11:03:46.181293 TX Bit0 (976~1000) 25 988, Bit8 (969~993) 25 981,
3440 11:03:46.184406 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
3441 11:03:46.190823 TX Bit2 (971~995) 25 983, Bit10 (969~992) 24 980,
3442 11:03:46.194327 TX Bit3 (969~994) 26 981, Bit11 (971~994) 24 982,
3443 11:03:46.197772 TX Bit4 (973~998) 26 985, Bit12 (970~993) 24 981,
3444 11:03:46.204362 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
3445 11:03:46.207654 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
3446 11:03:46.211406 TX Bit7 (975~996) 22 985, Bit15 (967~991) 25 979,
3447 11:03:46.214398
3448 11:03:46.214471
3449 11:03:46.217838 TX Vref found, early break! 363< 370
3450 11:03:46.220864 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3451 11:03:46.224182 u1DelayCellOfst[0]=8 cells (7 PI)
3452 11:03:46.227626 u1DelayCellOfst[1]=7 cells (6 PI)
3453 11:03:46.231192 u1DelayCellOfst[2]=2 cells (2 PI)
3454 11:03:46.234223 u1DelayCellOfst[3]=0 cells (0 PI)
3455 11:03:46.237678 u1DelayCellOfst[4]=5 cells (4 PI)
3456 11:03:46.237752 u1DelayCellOfst[5]=7 cells (6 PI)
3457 11:03:46.240815 u1DelayCellOfst[6]=8 cells (7 PI)
3458 11:03:46.244274 u1DelayCellOfst[7]=5 cells (4 PI)
3459 11:03:46.247328 Byte0, DQ PI dly=981, DQM PI dly= 984
3460 11:03:46.254266 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
3461 11:03:46.254343
3462 11:03:46.257347 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
3463 11:03:46.257422
3464 11:03:46.260581 u1DelayCellOfst[8]=2 cells (2 PI)
3465 11:03:46.263979 u1DelayCellOfst[9]=1 cells (1 PI)
3466 11:03:46.268026 u1DelayCellOfst[10]=1 cells (1 PI)
3467 11:03:46.271035 u1DelayCellOfst[11]=3 cells (3 PI)
3468 11:03:46.274130 u1DelayCellOfst[12]=2 cells (2 PI)
3469 11:03:46.274204 u1DelayCellOfst[13]=3 cells (3 PI)
3470 11:03:46.278228 u1DelayCellOfst[14]=2 cells (2 PI)
3471 11:03:46.280738 u1DelayCellOfst[15]=0 cells (0 PI)
3472 11:03:46.284122 Byte1, DQ PI dly=979, DQM PI dly= 980
3473 11:03:46.290652 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
3474 11:03:46.290726
3475 11:03:46.294429 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
3476 11:03:46.294504
3477 11:03:46.297766 Write Rank1 MR14 =0x16
3478 11:03:46.297840
3479 11:03:46.297897 Final TX Range 0 Vref 22
3480 11:03:46.297951
3481 11:03:46.304070 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3482 11:03:46.304144
3483 11:03:46.310824 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3484 11:03:46.317623 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3485 11:03:46.327354 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3486 11:03:46.327428 Write Rank1 MR3 =0xb0
3487 11:03:46.330764 DramC Write-DBI on
3488 11:03:46.330837 ==
3489 11:03:46.334146 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3490 11:03:46.337629 fsp= 1, odt_onoff= 1, Byte mode= 0
3491 11:03:46.337703 ==
3492 11:03:46.344209 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3493 11:03:46.344283
3494 11:03:46.344341 Begin, DQ Scan Range 700~764
3495 11:03:46.344394
3496 11:03:46.344445
3497 11:03:46.347500 TX Vref Scan disable
3498 11:03:46.351263 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3499 11:03:46.354229 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3500 11:03:46.357689 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3501 11:03:46.361205 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3502 11:03:46.364187 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3503 11:03:46.367900 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3504 11:03:46.371349 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3505 11:03:46.374646 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3506 11:03:46.377632 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3507 11:03:46.384581 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3508 11:03:46.387706 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3509 11:03:46.391430 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3510 11:03:46.394871 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3511 11:03:46.397505 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3512 11:03:46.400910 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3513 11:03:46.404315 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3514 11:03:46.407485 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3515 11:03:46.411333 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3516 11:03:46.418917 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3517 11:03:46.421928 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3518 11:03:46.425460 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3519 11:03:46.428865 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3520 11:03:46.431824 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3521 11:03:46.435241 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3522 11:03:46.439033 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3523 11:03:46.441901 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
3524 11:03:46.445426 Byte0, DQ PI dly=730, DQM PI dly= 730
3525 11:03:46.448620 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
3526 11:03:46.448695
3527 11:03:46.455240 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
3528 11:03:46.455316
3529 11:03:46.458585 Byte1, DQ PI dly=724, DQM PI dly= 724
3530 11:03:46.461797 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
3531 11:03:46.461871
3532 11:03:46.465370 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
3533 11:03:46.465444
3534 11:03:46.472025 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3535 11:03:46.478544 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3536 11:03:46.488774 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3537 11:03:46.488852 Write Rank1 MR3 =0x30
3538 11:03:46.492108 DramC Write-DBI off
3539 11:03:46.492182
3540 11:03:46.492240 [DATLAT]
3541 11:03:46.495210 Freq=1600, CH1 RK1, use_rxtx_scan=0
3542 11:03:46.495285
3543 11:03:46.499016 DATLAT Default: 0x10
3544 11:03:46.499090 7, 0xFFFF, sum=0
3545 11:03:46.499150 8, 0xFFFF, sum=0
3546 11:03:46.502085 9, 0xFFFF, sum=0
3547 11:03:46.502161 10, 0xFFFF, sum=0
3548 11:03:46.505595 11, 0xFFFF, sum=0
3549 11:03:46.505670 12, 0xFFFF, sum=0
3550 11:03:46.508523 13, 0xFFFF, sum=0
3551 11:03:46.508603 14, 0x0, sum=1
3552 11:03:46.512214 15, 0x0, sum=2
3553 11:03:46.512294 16, 0x0, sum=3
3554 11:03:46.515070 17, 0x0, sum=4
3555 11:03:46.518443 pattern=2 first_step=14 total pass=5 best_step=16
3556 11:03:46.518517 ==
3557 11:03:46.521706 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3558 11:03:46.525270 fsp= 1, odt_onoff= 1, Byte mode= 0
3559 11:03:46.525345 ==
3560 11:03:46.532182 Start DQ dly to find pass range UseTestEngine =1
3561 11:03:46.535214 x-axis: bit #, y-axis: DQ dly (-127~63)
3562 11:03:46.535289 RX Vref Scan = 0
3563 11:03:46.538721 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3564 11:03:46.542134 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3565 11:03:46.545030 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3566 11:03:46.548731 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3567 11:03:46.552285 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3568 11:03:46.555230 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3569 11:03:46.555305 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3570 11:03:46.558810 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3571 11:03:46.562261 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3572 11:03:46.565598 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3573 11:03:46.568525 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3574 11:03:46.571836 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3575 11:03:46.575017 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3576 11:03:46.578544 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3577 11:03:46.578619 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3578 11:03:46.581792 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3579 11:03:46.585592 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3580 11:03:46.588347 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3581 11:03:46.591644 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3582 11:03:46.595264 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3583 11:03:46.598376 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3584 11:03:46.601830 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3585 11:03:46.601907 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3586 11:03:46.605075 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3587 11:03:46.608970 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3588 11:03:46.612274 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3589 11:03:46.615262 0, [0] xxooxxxx xxxxxxxo [MSB]
3590 11:03:46.618647 1, [0] xxoooxxo xoxxxxxo [MSB]
3591 11:03:46.618723 2, [0] xxoooxxo oooxxxxo [MSB]
3592 11:03:46.621940 3, [0] xxoooxxo ooooxooo [MSB]
3593 11:03:46.625436 4, [0] xxoooxxo oooooooo [MSB]
3594 11:03:46.628874 5, [0] xoooooxo oooooooo [MSB]
3595 11:03:46.631844 6, [0] xoooooxo oooooooo [MSB]
3596 11:03:46.635174 34, [0] oooxoooo oooooooo [MSB]
3597 11:03:46.638266 35, [0] oooxoooo ooooooox [MSB]
3598 11:03:46.642043 36, [0] ooxxoooo ooooooox [MSB]
3599 11:03:46.645268 37, [0] ooxxxoox ooxooxxx [MSB]
3600 11:03:46.648682 38, [0] ooxxxoox xxxooxxx [MSB]
3601 11:03:46.652245 39, [0] ooxxxoox xxxxoxxx [MSB]
3602 11:03:46.652321 40, [0] ooxxxoox xxxxxxxx [MSB]
3603 11:03:46.655767 41, [0] oxxxxoox xxxxxxxx [MSB]
3604 11:03:46.658925 42, [0] oxxxxxox xxxxxxxx [MSB]
3605 11:03:46.662014 43, [0] xxxxxxxx xxxxxxxx [MSB]
3606 11:03:46.665289 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3607 11:03:46.668689 iDelay=43, Bit 1, Center 22 (5 ~ 40) 36
3608 11:03:46.672022 iDelay=43, Bit 2, Center 17 (0 ~ 35) 36
3609 11:03:46.675299 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
3610 11:03:46.678675 iDelay=43, Bit 4, Center 18 (1 ~ 36) 36
3611 11:03:46.682118 iDelay=43, Bit 5, Center 23 (5 ~ 41) 37
3612 11:03:46.685477 iDelay=43, Bit 6, Center 24 (7 ~ 42) 36
3613 11:03:46.688896 iDelay=43, Bit 7, Center 18 (1 ~ 36) 36
3614 11:03:46.692050 iDelay=43, Bit 8, Center 19 (2 ~ 37) 36
3615 11:03:46.698660 iDelay=43, Bit 9, Center 19 (1 ~ 37) 37
3616 11:03:46.702006 iDelay=43, Bit 10, Center 19 (2 ~ 36) 35
3617 11:03:46.705441 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
3618 11:03:46.708886 iDelay=43, Bit 12, Center 21 (4 ~ 39) 36
3619 11:03:46.712240 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
3620 11:03:46.715489 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
3621 11:03:46.718477 iDelay=43, Bit 15, Center 17 (0 ~ 34) 35
3622 11:03:46.718553 ==
3623 11:03:46.725145 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3624 11:03:46.728853 fsp= 1, odt_onoff= 1, Byte mode= 0
3625 11:03:46.728929 ==
3626 11:03:46.728987 DQS Delay:
3627 11:03:46.729041 DQS0 = 0, DQS1 = 0
3628 11:03:46.732581 DQM Delay:
3629 11:03:46.732656 DQM0 = 20, DQM1 = 19
3630 11:03:46.735427 DQ Delay:
3631 11:03:46.738475 DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15
3632 11:03:46.742087 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =18
3633 11:03:46.742164 DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =20
3634 11:03:46.748454 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
3635 11:03:46.748534
3636 11:03:46.748593
3637 11:03:46.748648
3638 11:03:46.748699 [DramC_TX_OE_Calibration] TA2
3639 11:03:46.751670 Original DQ_B0 (3 6) =30, OEN = 27
3640 11:03:46.755693 Original DQ_B1 (3 6) =30, OEN = 27
3641 11:03:46.758651 23, 0x0, End_B0=23 End_B1=23
3642 11:03:46.762164 24, 0x0, End_B0=24 End_B1=24
3643 11:03:46.765195 25, 0x0, End_B0=25 End_B1=25
3644 11:03:46.765272 26, 0x0, End_B0=26 End_B1=26
3645 11:03:46.768850 27, 0x0, End_B0=27 End_B1=27
3646 11:03:46.772188 28, 0x0, End_B0=28 End_B1=28
3647 11:03:46.775208 29, 0x0, End_B0=29 End_B1=29
3648 11:03:46.778626 30, 0x0, End_B0=30 End_B1=30
3649 11:03:46.778704 31, 0xFFFF, End_B0=30 End_B1=30
3650 11:03:46.785266 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3651 11:03:46.791677 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3652 11:03:46.791753
3653 11:03:46.791812
3654 11:03:46.791865 Write Rank1 MR23 =0x3f
3655 11:03:46.795216 [DQSOSC]
3656 11:03:46.802566 [DQSOSCAuto] RK1, (LSB)MR18= 0xaf, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
3657 11:03:46.808715 CH1_RK1: MR19=0x3, MR18=0xAF, DQSOSC=334, MR23=63, INC=22, DEC=33
3658 11:03:46.808791 Write Rank1 MR23 =0x3f
3659 11:03:46.812211 [DQSOSC]
3660 11:03:46.818489 [DQSOSCAuto] RK1, (LSB)MR18= 0xae, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
3661 11:03:46.818565 CH1 RK1: MR19=3, MR18=AE
3662 11:03:46.821837 [RxdqsGatingPostProcess] freq 1600
3663 11:03:46.828494 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3664 11:03:46.828570 Rank: 0
3665 11:03:46.831865 best DQS0 dly(2T, 0.5T) = (2, 5)
3666 11:03:46.835376 best DQS1 dly(2T, 0.5T) = (2, 5)
3667 11:03:46.838474 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3668 11:03:46.841849 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3669 11:03:46.841925 Rank: 1
3670 11:03:46.845244 best DQS0 dly(2T, 0.5T) = (2, 5)
3671 11:03:46.848406 best DQS1 dly(2T, 0.5T) = (2, 5)
3672 11:03:46.852172 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3673 11:03:46.855579 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3674 11:03:46.858540 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3675 11:03:46.861936 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3676 11:03:46.868702 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3677 11:03:46.868782
3678 11:03:46.868841
3679 11:03:46.871786 [Calibration Summary] Freqency 1600
3680 11:03:46.871861 CH 0, Rank 0
3681 11:03:46.874980 All Pass.
3682 11:03:46.875054
3683 11:03:46.875113 CH 0, Rank 1
3684 11:03:46.875167 All Pass.
3685 11:03:46.875218
3686 11:03:46.878950 CH 1, Rank 0
3687 11:03:46.879025 All Pass.
3688 11:03:46.879084
3689 11:03:46.879138 CH 1, Rank 1
3690 11:03:46.881713 All Pass.
3691 11:03:46.881788
3692 11:03:46.888263 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3693 11:03:46.895170 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3694 11:03:46.901784 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3695 11:03:46.901861 Write Rank0 MR3 =0xb0
3696 11:03:46.908510 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3697 11:03:46.915417 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3698 11:03:46.924933 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3699 11:03:46.925010 Write Rank1 MR3 =0xb0
3700 11:03:46.931914 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3701 11:03:46.938931 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3702 11:03:46.945580 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3703 11:03:46.948760 Write Rank0 MR3 =0xb0
3704 11:03:46.955156 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3705 11:03:46.962226 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3706 11:03:46.969039 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3707 11:03:46.972349 Write Rank1 MR3 =0xb0
3708 11:03:46.972448 DramC Write-DBI on
3709 11:03:46.975533 [GetDramInforAfterCalByMRR] Vendor 1.
3710 11:03:46.978397 [GetDramInforAfterCalByMRR] Revision 7.
3711 11:03:46.978473 MR8 12
3712 11:03:46.985608 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3713 11:03:46.985686 MR8 12
3714 11:03:46.992094 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3715 11:03:46.992171 MR8 12
3716 11:03:46.995366 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3717 11:03:46.995442 MR8 12
3718 11:03:47.002014 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3719 11:03:47.008813 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3720 11:03:47.012457 Write Rank0 MR13 =0xd0
3721 11:03:47.015744 Write Rank1 MR13 =0xd0
3722 11:03:47.015820 Write Rank0 MR13 =0xd0
3723 11:03:47.018690 Write Rank1 MR13 =0xd0
3724 11:03:47.022268 Save calibration result to emmc
3725 11:03:47.022344
3726 11:03:47.022403
3727 11:03:47.025832 [DramcModeReg_Check] Freq_1600, FSP_1
3728 11:03:47.025907 FSP_1, CH_0, RK0
3729 11:03:47.028821 Write Rank0 MR13 =0xd8
3730 11:03:47.032266 MR12 = 0x56 (global = 0x56) match
3731 11:03:47.035647 MR14 = 0x18 (global = 0x18) match
3732 11:03:47.035722 FSP_1, CH_0, RK1
3733 11:03:47.038857 Write Rank1 MR13 =0xd8
3734 11:03:47.042263 MR12 = 0x56 (global = 0x56) match
3735 11:03:47.045451 MR14 = 0x18 (global = 0x18) match
3736 11:03:47.045526 FSP_1, CH_1, RK0
3737 11:03:47.048877 Write Rank0 MR13 =0xd8
3738 11:03:47.052410 MR12 = 0x56 (global = 0x56) match
3739 11:03:47.055578 MR14 = 0x1a (global = 0x1a) match
3740 11:03:47.055654 FSP_1, CH_1, RK1
3741 11:03:47.059133 Write Rank1 MR13 =0xd8
3742 11:03:47.062543 MR12 = 0x5a (global = 0x5a) match
3743 11:03:47.065816 MR14 = 0x16 (global = 0x16) match
3744 11:03:47.065891
3745 11:03:47.069163 [MEM_TEST] 02: After DFS, before run time config
3746 11:03:47.080362 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3747 11:03:47.080440
3748 11:03:47.080498 [TA2_TEST]
3749 11:03:47.080551 === TA2 HW
3750 11:03:47.084221 TA2 PAT: XTALK
3751 11:03:47.086857 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3752 11:03:47.093922 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3753 11:03:47.097078 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3754 11:03:47.100203 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3755 11:03:47.103745
3756 11:03:47.103819
3757 11:03:47.103877 Settings after calibration
3758 11:03:47.103931
3759 11:03:47.107022 [DramcRunTimeConfig]
3760 11:03:47.110512 TransferPLLToSPMControl - MODE SW PHYPLL
3761 11:03:47.110588 TX_TRACKING: ON
3762 11:03:47.113696 RX_TRACKING: ON
3763 11:03:47.113781 HW_GATING: ON
3764 11:03:47.116977 HW_GATING DBG: OFF
3765 11:03:47.117051 ddr_geometry:1
3766 11:03:47.120418 ddr_geometry:1
3767 11:03:47.120518 ddr_geometry:1
3768 11:03:47.120591 ddr_geometry:1
3769 11:03:47.123546 ddr_geometry:1
3770 11:03:47.123620 ddr_geometry:1
3771 11:03:47.127028 ddr_geometry:1
3772 11:03:47.127106 ddr_geometry:1
3773 11:03:47.130458 High Freq DUMMY_READ_FOR_TRACKING: ON
3774 11:03:47.133534 ZQCS_ENABLE_LP4: OFF
3775 11:03:47.137419 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3776 11:03:47.140633 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3777 11:03:47.140709 SPM_CONTROL_AFTERK: ON
3778 11:03:47.143636 IMPEDANCE_TRACKING: ON
3779 11:03:47.143711 TEMP_SENSOR: ON
3780 11:03:47.146748 PER_BANK_REFRESH: ON
3781 11:03:47.146824 HW_SAVE_FOR_SR: ON
3782 11:03:47.150102 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3783 11:03:47.153919 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3784 11:03:47.157116 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3785 11:03:47.160666 Read ODT Tracking: ON
3786 11:03:47.163578 =========================
3787 11:03:47.163653
3788 11:03:47.163712 [TA2_TEST]
3789 11:03:47.163766 === TA2 HW
3790 11:03:47.170232 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3791 11:03:47.173732 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3792 11:03:47.180529 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3793 11:03:47.183506 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3794 11:03:47.183582
3795 11:03:47.187117 [MEM_TEST] 03: After run time config
3796 11:03:47.198231 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3797 11:03:47.201941 [complex_mem_test] start addr:0x40024000, len:131072
3798 11:03:47.406043 1st complex R/W mem test pass
3799 11:03:47.411995 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3800 11:03:47.415569 sync preloader write leveling
3801 11:03:47.418866 sync preloader cbt_mr12
3802 11:03:47.422128 sync preloader cbt_clk_dly
3803 11:03:47.422203 sync preloader cbt_cmd_dly
3804 11:03:47.425517 sync preloader cbt_cs
3805 11:03:47.429067 sync preloader cbt_ca_perbit_delay
3806 11:03:47.432379 sync preloader clk_delay
3807 11:03:47.432454 sync preloader dqs_delay
3808 11:03:47.435849 sync preloader u1Gating2T_Save
3809 11:03:47.438549 sync preloader u1Gating05T_Save
3810 11:03:47.442536 sync preloader u1Gatingfine_tune_Save
3811 11:03:47.445685 sync preloader u1Gatingucpass_count_Save
3812 11:03:47.448999 sync preloader u1TxWindowPerbitVref_Save
3813 11:03:47.452149 sync preloader u1TxCenter_min_Save
3814 11:03:47.455394 sync preloader u1TxCenter_max_Save
3815 11:03:47.458675 sync preloader u1Txwin_center_Save
3816 11:03:47.462218 sync preloader u1Txfirst_pass_Save
3817 11:03:47.465209 sync preloader u1Txlast_pass_Save
3818 11:03:47.469133 sync preloader u1RxDatlat_Save
3819 11:03:47.471697 sync preloader u1RxWinPerbitVref_Save
3820 11:03:47.475893 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3821 11:03:47.478543 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3822 11:03:47.481986 sync preloader delay_cell_unit
3823 11:03:47.488606 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3824 11:03:47.492006 sync preloader write leveling
3825 11:03:47.492082 sync preloader cbt_mr12
3826 11:03:47.495227 sync preloader cbt_clk_dly
3827 11:03:47.498513 sync preloader cbt_cmd_dly
3828 11:03:47.498606 sync preloader cbt_cs
3829 11:03:47.501979 sync preloader cbt_ca_perbit_delay
3830 11:03:47.505357 sync preloader clk_delay
3831 11:03:47.508762 sync preloader dqs_delay
3832 11:03:47.512035 sync preloader u1Gating2T_Save
3833 11:03:47.512109 sync preloader u1Gating05T_Save
3834 11:03:47.515083 sync preloader u1Gatingfine_tune_Save
3835 11:03:47.518460 sync preloader u1Gatingucpass_count_Save
3836 11:03:47.525370 sync preloader u1TxWindowPerbitVref_Save
3837 11:03:47.525446 sync preloader u1TxCenter_min_Save
3838 11:03:47.528543 sync preloader u1TxCenter_max_Save
3839 11:03:47.532073 sync preloader u1Txwin_center_Save
3840 11:03:47.535375 sync preloader u1Txfirst_pass_Save
3841 11:03:47.538896 sync preloader u1Txlast_pass_Save
3842 11:03:47.541963 sync preloader u1RxDatlat_Save
3843 11:03:47.545405 sync preloader u1RxWinPerbitVref_Save
3844 11:03:47.549328 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3845 11:03:47.552180 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3846 11:03:47.555382 sync preloader delay_cell_unit
3847 11:03:47.561836 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3848 11:03:47.565356 sync preloader write leveling
3849 11:03:47.568974 sync preloader cbt_mr12
3850 11:03:47.569078 sync preloader cbt_clk_dly
3851 11:03:47.572015 sync preloader cbt_cmd_dly
3852 11:03:47.575710 sync preloader cbt_cs
3853 11:03:47.579012 sync preloader cbt_ca_perbit_delay
3854 11:03:47.579110 sync preloader clk_delay
3855 11:03:47.582397 sync preloader dqs_delay
3856 11:03:47.585957 sync preloader u1Gating2T_Save
3857 11:03:47.588818 sync preloader u1Gating05T_Save
3858 11:03:47.592182 sync preloader u1Gatingfine_tune_Save
3859 11:03:47.595545 sync preloader u1Gatingucpass_count_Save
3860 11:03:47.598697 sync preloader u1TxWindowPerbitVref_Save
3861 11:03:47.602302 sync preloader u1TxCenter_min_Save
3862 11:03:47.605223 sync preloader u1TxCenter_max_Save
3863 11:03:47.608845 sync preloader u1Txwin_center_Save
3864 11:03:47.612116 sync preloader u1Txfirst_pass_Save
3865 11:03:47.615205 sync preloader u1Txlast_pass_Save
3866 11:03:47.615280 sync preloader u1RxDatlat_Save
3867 11:03:47.619078 sync preloader u1RxWinPerbitVref_Save
3868 11:03:47.625275 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3869 11:03:47.628690 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3870 11:03:47.632243 sync preloader delay_cell_unit
3871 11:03:47.635122 just_for_test_dump_coreboot_params dump all params
3872 11:03:47.638722 dump source = 0x0
3873 11:03:47.638796 dump params frequency:1600
3874 11:03:47.641742 dump params rank number:2
3875 11:03:47.641817
3876 11:03:47.645151 dump params write leveling
3877 11:03:47.649040 write leveling[0][0][0] = 0x20
3878 11:03:47.649146 write leveling[0][0][1] = 0x1a
3879 11:03:47.651699 write leveling[0][1][0] = 0x23
3880 11:03:47.655203 write leveling[0][1][1] = 0x1c
3881 11:03:47.658456 write leveling[1][0][0] = 0x22
3882 11:03:47.662134 write leveling[1][0][1] = 0x1f
3883 11:03:47.665132 write leveling[1][1][0] = 0x22
3884 11:03:47.665246 write leveling[1][1][1] = 0x21
3885 11:03:47.668552 dump params cbt_cs
3886 11:03:47.668627 cbt_cs[0][0] = 0xa
3887 11:03:47.672423 cbt_cs[0][1] = 0xa
3888 11:03:47.672502 cbt_cs[1][0] = 0xa
3889 11:03:47.675135 cbt_cs[1][1] = 0xa
3890 11:03:47.678569 dump params cbt_mr12
3891 11:03:47.678643 cbt_mr12[0][0] = 0x16
3892 11:03:47.681859 cbt_mr12[0][1] = 0x16
3893 11:03:47.681934 cbt_mr12[1][0] = 0x16
3894 11:03:47.685517 cbt_mr12[1][1] = 0x1a
3895 11:03:47.688518 dump params tx window
3896 11:03:47.688616 tx_center_min[0][0][0] = 979
3897 11:03:47.692328 tx_center_max[0][0][0] = 985
3898 11:03:47.695593 tx_center_min[0][0][1] = 973
3899 11:03:47.699188 tx_center_max[0][0][1] = 979
3900 11:03:47.699263 tx_center_min[0][1][0] = 983
3901 11:03:47.702297 tx_center_max[0][1][0] = 990
3902 11:03:47.705711 tx_center_min[0][1][1] = 976
3903 11:03:47.708942 tx_center_max[0][1][1] = 980
3904 11:03:47.712132 tx_center_min[1][0][0] = 981
3905 11:03:47.712231 tx_center_max[1][0][0] = 988
3906 11:03:47.715245 tx_center_min[1][0][1] = 975
3907 11:03:47.718670 tx_center_max[1][0][1] = 980
3908 11:03:47.722166 tx_center_min[1][1][0] = 981
3909 11:03:47.725553 tx_center_max[1][1][0] = 988
3910 11:03:47.725627 tx_center_min[1][1][1] = 979
3911 11:03:47.729097 tx_center_max[1][1][1] = 982
3912 11:03:47.732462 dump params tx window
3913 11:03:47.732537 tx_win_center[0][0][0] = 985
3914 11:03:47.735734 tx_first_pass[0][0][0] = 973
3915 11:03:47.738813 tx_last_pass[0][0][0] = 998
3916 11:03:47.742261 tx_win_center[0][0][1] = 984
3917 11:03:47.745417 tx_first_pass[0][0][1] = 973
3918 11:03:47.745493 tx_last_pass[0][0][1] = 996
3919 11:03:47.749146 tx_win_center[0][0][2] = 983
3920 11:03:47.752427 tx_first_pass[0][0][2] = 972
3921 11:03:47.755410 tx_last_pass[0][0][2] = 995
3922 11:03:47.755486 tx_win_center[0][0][3] = 979
3923 11:03:47.759026 tx_first_pass[0][0][3] = 967
3924 11:03:47.762249 tx_last_pass[0][0][3] = 991
3925 11:03:47.765660 tx_win_center[0][0][4] = 983
3926 11:03:47.769319 tx_first_pass[0][0][4] = 971
3927 11:03:47.769395 tx_last_pass[0][0][4] = 996
3928 11:03:47.772093 tx_win_center[0][0][5] = 979
3929 11:03:47.775481 tx_first_pass[0][0][5] = 968
3930 11:03:47.778488 tx_last_pass[0][0][5] = 991
3931 11:03:47.778563 tx_win_center[0][0][6] = 981
3932 11:03:47.782106 tx_first_pass[0][0][6] = 969
3933 11:03:47.785390 tx_last_pass[0][0][6] = 993
3934 11:03:47.788786 tx_win_center[0][0][7] = 982
3935 11:03:47.792398 tx_first_pass[0][0][7] = 971
3936 11:03:47.792474 tx_last_pass[0][0][7] = 994
3937 11:03:47.795436 tx_win_center[0][0][8] = 973
3938 11:03:47.798852 tx_first_pass[0][0][8] = 961
3939 11:03:47.802572 tx_last_pass[0][0][8] = 986
3940 11:03:47.802647 tx_win_center[0][0][9] = 975
3941 11:03:47.805356 tx_first_pass[0][0][9] = 963
3942 11:03:47.808662 tx_last_pass[0][0][9] = 988
3943 11:03:47.812204 tx_win_center[0][0][10] = 979
3944 11:03:47.815502 tx_first_pass[0][0][10] = 968
3945 11:03:47.815578 tx_last_pass[0][0][10] = 991
3946 11:03:47.819072 tx_win_center[0][0][11] = 973
3947 11:03:47.822352 tx_first_pass[0][0][11] = 961
3948 11:03:47.825843 tx_last_pass[0][0][11] = 986
3949 11:03:47.829075 tx_win_center[0][0][12] = 974
3950 11:03:47.829188 tx_first_pass[0][0][12] = 962
3951 11:03:47.832009 tx_last_pass[0][0][12] = 987
3952 11:03:47.835183 tx_win_center[0][0][13] = 973
3953 11:03:47.838875 tx_first_pass[0][0][13] = 962
3954 11:03:47.841770 tx_last_pass[0][0][13] = 985
3955 11:03:47.841845 tx_win_center[0][0][14] = 974
3956 11:03:47.845133 tx_first_pass[0][0][14] = 962
3957 11:03:47.848757 tx_last_pass[0][0][14] = 987
3958 11:03:47.852271 tx_win_center[0][0][15] = 978
3959 11:03:47.855643 tx_first_pass[0][0][15] = 966
3960 11:03:47.855718 tx_last_pass[0][0][15] = 990
3961 11:03:47.858689 tx_win_center[0][1][0] = 990
3962 11:03:47.862395 tx_first_pass[0][1][0] = 978
3963 11:03:47.865280 tx_last_pass[0][1][0] = 1003
3964 11:03:47.869435 tx_win_center[0][1][1] = 989
3965 11:03:47.869510 tx_first_pass[0][1][1] = 977
3966 11:03:47.871980 tx_last_pass[0][1][1] = 1001
3967 11:03:47.875593 tx_win_center[0][1][2] = 989
3968 11:03:47.878839 tx_first_pass[0][1][2] = 977
3969 11:03:47.878914 tx_last_pass[0][1][2] = 1001
3970 11:03:47.881862 tx_win_center[0][1][3] = 983
3971 11:03:47.885824 tx_first_pass[0][1][3] = 971
3972 11:03:47.888951 tx_last_pass[0][1][3] = 996
3973 11:03:47.892321 tx_win_center[0][1][4] = 989
3974 11:03:47.892411 tx_first_pass[0][1][4] = 977
3975 11:03:47.895860 tx_last_pass[0][1][4] = 1001
3976 11:03:47.899045 tx_win_center[0][1][5] = 984
3977 11:03:47.901753 tx_first_pass[0][1][5] = 972
3978 11:03:47.905294 tx_last_pass[0][1][5] = 997
3979 11:03:47.905369 tx_win_center[0][1][6] = 985
3980 11:03:47.908738 tx_first_pass[0][1][6] = 972
3981 11:03:47.912326 tx_last_pass[0][1][6] = 998
3982 11:03:47.915122 tx_win_center[0][1][7] = 987
3983 11:03:47.915197 tx_first_pass[0][1][7] = 975
3984 11:03:47.918742 tx_last_pass[0][1][7] = 1000
3985 11:03:47.921661 tx_win_center[0][1][8] = 977
3986 11:03:47.925113 tx_first_pass[0][1][8] = 966
3987 11:03:47.928342 tx_last_pass[0][1][8] = 989
3988 11:03:47.928442 tx_win_center[0][1][9] = 978
3989 11:03:47.931750 tx_first_pass[0][1][9] = 968
3990 11:03:47.935368 tx_last_pass[0][1][9] = 989
3991 11:03:47.938200 tx_win_center[0][1][10] = 980
3992 11:03:47.938278 tx_first_pass[0][1][10] = 969
3993 11:03:47.941586 tx_last_pass[0][1][10] = 991
3994 11:03:47.945143 tx_win_center[0][1][11] = 977
3995 11:03:47.948480 tx_first_pass[0][1][11] = 966
3996 11:03:47.951675 tx_last_pass[0][1][11] = 989
3997 11:03:47.951749 tx_win_center[0][1][12] = 978
3998 11:03:47.955219 tx_first_pass[0][1][12] = 967
3999 11:03:47.958623 tx_last_pass[0][1][12] = 990
4000 11:03:47.961835 tx_win_center[0][1][13] = 976
4001 11:03:47.965303 tx_first_pass[0][1][13] = 966
4002 11:03:47.965377 tx_last_pass[0][1][13] = 987
4003 11:03:47.969300 tx_win_center[0][1][14] = 978
4004 11:03:47.971803 tx_first_pass[0][1][14] = 967
4005 11:03:47.975086 tx_last_pass[0][1][14] = 989
4006 11:03:47.978814 tx_win_center[0][1][15] = 979
4007 11:03:47.978913 tx_first_pass[0][1][15] = 969
4008 11:03:47.982152 tx_last_pass[0][1][15] = 990
4009 11:03:47.985039 tx_win_center[1][0][0] = 988
4010 11:03:47.988431 tx_first_pass[1][0][0] = 976
4011 11:03:47.991827 tx_last_pass[1][0][0] = 1000
4012 11:03:47.991903 tx_win_center[1][0][1] = 986
4013 11:03:47.995036 tx_first_pass[1][0][1] = 974
4014 11:03:47.998310 tx_last_pass[1][0][1] = 999
4015 11:03:48.001687 tx_win_center[1][0][2] = 982
4016 11:03:48.005400 tx_first_pass[1][0][2] = 971
4017 11:03:48.005476 tx_last_pass[1][0][2] = 994
4018 11:03:48.008439 tx_win_center[1][0][3] = 981
4019 11:03:48.011863 tx_first_pass[1][0][3] = 969
4020 11:03:48.015212 tx_last_pass[1][0][3] = 993
4021 11:03:48.015286 tx_win_center[1][0][4] = 984
4022 11:03:48.018650 tx_first_pass[1][0][4] = 972
4023 11:03:48.022027 tx_last_pass[1][0][4] = 997
4024 11:03:48.024823 tx_win_center[1][0][5] = 987
4025 11:03:48.028062 tx_first_pass[1][0][5] = 975
4026 11:03:48.028136 tx_last_pass[1][0][5] = 999
4027 11:03:48.032117 tx_win_center[1][0][6] = 988
4028 11:03:48.035079 tx_first_pass[1][0][6] = 976
4029 11:03:48.038422 tx_last_pass[1][0][6] = 1000
4030 11:03:48.038496 tx_win_center[1][0][7] = 985
4031 11:03:48.041706 tx_first_pass[1][0][7] = 973
4032 11:03:48.045322 tx_last_pass[1][0][7] = 997
4033 11:03:48.048327 tx_win_center[1][0][8] = 979
4034 11:03:48.051580 tx_first_pass[1][0][8] = 967
4035 11:03:48.051656 tx_last_pass[1][0][8] = 991
4036 11:03:48.054981 tx_win_center[1][0][9] = 978
4037 11:03:48.058924 tx_first_pass[1][0][9] = 967
4038 11:03:48.061574 tx_last_pass[1][0][9] = 990
4039 11:03:48.061649 tx_win_center[1][0][10] = 979
4040 11:03:48.064954 tx_first_pass[1][0][10] = 967
4041 11:03:48.068352 tx_last_pass[1][0][10] = 991
4042 11:03:48.071815 tx_win_center[1][0][11] = 980
4043 11:03:48.075407 tx_first_pass[1][0][11] = 968
4044 11:03:48.075482 tx_last_pass[1][0][11] = 992
4045 11:03:48.078647 tx_win_center[1][0][12] = 980
4046 11:03:48.081865 tx_first_pass[1][0][12] = 968
4047 11:03:48.084957 tx_last_pass[1][0][12] = 992
4048 11:03:48.088320 tx_win_center[1][0][13] = 979
4049 11:03:48.088434 tx_first_pass[1][0][13] = 968
4050 11:03:48.091673 tx_last_pass[1][0][13] = 991
4051 11:03:48.094990 tx_win_center[1][0][14] = 979
4052 11:03:48.098798 tx_first_pass[1][0][14] = 968
4053 11:03:48.101500 tx_last_pass[1][0][14] = 991
4054 11:03:48.101575 tx_win_center[1][0][15] = 975
4055 11:03:48.105174 tx_first_pass[1][0][15] = 963
4056 11:03:48.108458 tx_last_pass[1][0][15] = 987
4057 11:03:48.111825 tx_win_center[1][1][0] = 988
4058 11:03:48.114968 tx_first_pass[1][1][0] = 976
4059 11:03:48.115063 tx_last_pass[1][1][0] = 1000
4060 11:03:48.118783 tx_win_center[1][1][1] = 987
4061 11:03:48.122128 tx_first_pass[1][1][1] = 976
4062 11:03:48.125637 tx_last_pass[1][1][1] = 999
4063 11:03:48.125731 tx_win_center[1][1][2] = 983
4064 11:03:48.128353 tx_first_pass[1][1][2] = 971
4065 11:03:48.131840 tx_last_pass[1][1][2] = 995
4066 11:03:48.135263 tx_win_center[1][1][3] = 981
4067 11:03:48.139031 tx_first_pass[1][1][3] = 969
4068 11:03:48.139132 tx_last_pass[1][1][3] = 994
4069 11:03:48.141716 tx_win_center[1][1][4] = 985
4070 11:03:48.145427 tx_first_pass[1][1][4] = 973
4071 11:03:48.148436 tx_last_pass[1][1][4] = 998
4072 11:03:48.148525 tx_win_center[1][1][5] = 987
4073 11:03:48.151720 tx_first_pass[1][1][5] = 976
4074 11:03:48.155145 tx_last_pass[1][1][5] = 999
4075 11:03:48.158598 tx_win_center[1][1][6] = 988
4076 11:03:48.161811 tx_first_pass[1][1][6] = 976
4077 11:03:48.161900 tx_last_pass[1][1][6] = 1000
4078 11:03:48.164929 tx_win_center[1][1][7] = 985
4079 11:03:48.168615 tx_first_pass[1][1][7] = 975
4080 11:03:48.171798 tx_last_pass[1][1][7] = 996
4081 11:03:48.171873 tx_win_center[1][1][8] = 981
4082 11:03:48.175124 tx_first_pass[1][1][8] = 969
4083 11:03:48.178696 tx_last_pass[1][1][8] = 993
4084 11:03:48.181920 tx_win_center[1][1][9] = 980
4085 11:03:48.185112 tx_first_pass[1][1][9] = 969
4086 11:03:48.185229 tx_last_pass[1][1][9] = 992
4087 11:03:48.188835 tx_win_center[1][1][10] = 980
4088 11:03:48.191960 tx_first_pass[1][1][10] = 969
4089 11:03:48.195420 tx_last_pass[1][1][10] = 992
4090 11:03:48.198337 tx_win_center[1][1][11] = 982
4091 11:03:48.198412 tx_first_pass[1][1][11] = 971
4092 11:03:48.202139 tx_last_pass[1][1][11] = 994
4093 11:03:48.205398 tx_win_center[1][1][12] = 981
4094 11:03:48.208570 tx_first_pass[1][1][12] = 970
4095 11:03:48.208644 tx_last_pass[1][1][12] = 993
4096 11:03:48.212140 tx_win_center[1][1][13] = 982
4097 11:03:48.215214 tx_first_pass[1][1][13] = 971
4098 11:03:48.218342 tx_last_pass[1][1][13] = 993
4099 11:03:48.222219 tx_win_center[1][1][14] = 981
4100 11:03:48.225372 tx_first_pass[1][1][14] = 970
4101 11:03:48.225446 tx_last_pass[1][1][14] = 993
4102 11:03:48.228480 tx_win_center[1][1][15] = 979
4103 11:03:48.231874 tx_first_pass[1][1][15] = 967
4104 11:03:48.235260 tx_last_pass[1][1][15] = 991
4105 11:03:48.235334 dump params rx window
4106 11:03:48.238661 rx_firspass[0][0][0] = 9
4107 11:03:48.242286 rx_lastpass[0][0][0] = 41
4108 11:03:48.242366 rx_firspass[0][0][1] = 9
4109 11:03:48.245295 rx_lastpass[0][0][1] = 40
4110 11:03:48.249317 rx_firspass[0][0][2] = 9
4111 11:03:48.249392 rx_lastpass[0][0][2] = 39
4112 11:03:48.252256 rx_firspass[0][0][3] = -1
4113 11:03:48.255681 rx_lastpass[0][0][3] = 31
4114 11:03:48.258717 rx_firspass[0][0][4] = 7
4115 11:03:48.258792 rx_lastpass[0][0][4] = 39
4116 11:03:48.262218 rx_firspass[0][0][5] = 3
4117 11:03:48.265787 rx_lastpass[0][0][5] = 29
4118 11:03:48.265862 rx_firspass[0][0][6] = 2
4119 11:03:48.269022 rx_lastpass[0][0][6] = 32
4120 11:03:48.272510 rx_firspass[0][0][7] = 4
4121 11:03:48.272584 rx_lastpass[0][0][7] = 34
4122 11:03:48.275791 rx_firspass[0][0][8] = 2
4123 11:03:48.279044 rx_lastpass[0][0][8] = 34
4124 11:03:48.279119 rx_firspass[0][0][9] = 5
4125 11:03:48.282122 rx_lastpass[0][0][9] = 35
4126 11:03:48.285461 rx_firspass[0][0][10] = 9
4127 11:03:48.288715 rx_lastpass[0][0][10] = 38
4128 11:03:48.288826 rx_firspass[0][0][11] = 3
4129 11:03:48.292301 rx_lastpass[0][0][11] = 30
4130 11:03:48.295465 rx_firspass[0][0][12] = 5
4131 11:03:48.298969 rx_lastpass[0][0][12] = 34
4132 11:03:48.299044 rx_firspass[0][0][13] = 1
4133 11:03:48.301943 rx_lastpass[0][0][13] = 31
4134 11:03:48.305304 rx_firspass[0][0][14] = 3
4135 11:03:48.305379 rx_lastpass[0][0][14] = 33
4136 11:03:48.308552 rx_firspass[0][0][15] = 4
4137 11:03:48.312838 rx_lastpass[0][0][15] = 35
4138 11:03:48.315333 rx_firspass[0][1][0] = 9
4139 11:03:48.315408 rx_lastpass[0][1][0] = 42
4140 11:03:48.318675 rx_firspass[0][1][1] = 7
4141 11:03:48.322185 rx_lastpass[0][1][1] = 42
4142 11:03:48.322260 rx_firspass[0][1][2] = 8
4143 11:03:48.325340 rx_lastpass[0][1][2] = 42
4144 11:03:48.329046 rx_firspass[0][1][3] = -1
4145 11:03:48.332166 rx_lastpass[0][1][3] = 32
4146 11:03:48.332242 rx_firspass[0][1][4] = 6
4147 11:03:48.335684 rx_lastpass[0][1][4] = 40
4148 11:03:48.338665 rx_firspass[0][1][5] = 0
4149 11:03:48.338740 rx_lastpass[0][1][5] = 35
4150 11:03:48.342307 rx_firspass[0][1][6] = 3
4151 11:03:48.345273 rx_lastpass[0][1][6] = 36
4152 11:03:48.345348 rx_firspass[0][1][7] = 3
4153 11:03:48.348640 rx_lastpass[0][1][7] = 35
4154 11:03:48.351949 rx_firspass[0][1][8] = 1
4155 11:03:48.355323 rx_lastpass[0][1][8] = 36
4156 11:03:48.355398 rx_firspass[0][1][9] = 3
4157 11:03:48.358701 rx_lastpass[0][1][9] = 37
4158 11:03:48.362063 rx_firspass[0][1][10] = 6
4159 11:03:48.362138 rx_lastpass[0][1][10] = 42
4160 11:03:48.365307 rx_firspass[0][1][11] = 0
4161 11:03:48.368852 rx_lastpass[0][1][11] = 34
4162 11:03:48.372197 rx_firspass[0][1][12] = 3
4163 11:03:48.372272 rx_lastpass[0][1][12] = 37
4164 11:03:48.375167 rx_firspass[0][1][13] = 0
4165 11:03:48.378952 rx_lastpass[0][1][13] = 33
4166 11:03:48.379051 rx_firspass[0][1][14] = 2
4167 11:03:48.381958 rx_lastpass[0][1][14] = 35
4168 11:03:48.385441 rx_firspass[0][1][15] = 4
4169 11:03:48.389299 rx_lastpass[0][1][15] = 37
4170 11:03:48.389374 rx_firspass[1][0][0] = 7
4171 11:03:48.391956 rx_lastpass[1][0][0] = 42
4172 11:03:48.395062 rx_firspass[1][0][1] = 6
4173 11:03:48.395137 rx_lastpass[1][0][1] = 39
4174 11:03:48.398855 rx_firspass[1][0][2] = 0
4175 11:03:48.401645 rx_lastpass[1][0][2] = 33
4176 11:03:48.405051 rx_firspass[1][0][3] = -1
4177 11:03:48.405125 rx_lastpass[1][0][3] = 32
4178 11:03:48.408983 rx_firspass[1][0][4] = 3
4179 11:03:48.412571 rx_lastpass[1][0][4] = 34
4180 11:03:48.412646 rx_firspass[1][0][5] = 8
4181 11:03:48.415495 rx_lastpass[1][0][5] = 40
4182 11:03:48.418726 rx_firspass[1][0][6] = 9
4183 11:03:48.418801 rx_lastpass[1][0][6] = 41
4184 11:03:48.422142 rx_firspass[1][0][7] = 4
4185 11:03:48.425403 rx_lastpass[1][0][7] = 34
4186 11:03:48.425478 rx_firspass[1][0][8] = 2
4187 11:03:48.428667 rx_lastpass[1][0][8] = 36
4188 11:03:48.431748 rx_firspass[1][0][9] = 3
4189 11:03:48.435368 rx_lastpass[1][0][9] = 36
4190 11:03:48.435443 rx_firspass[1][0][10] = 1
4191 11:03:48.438552 rx_lastpass[1][0][10] = 35
4192 11:03:48.442112 rx_firspass[1][0][11] = 3
4193 11:03:48.442191 rx_lastpass[1][0][11] = 36
4194 11:03:48.445594 rx_firspass[1][0][12] = 4
4195 11:03:48.448603 rx_lastpass[1][0][12] = 36
4196 11:03:48.452012 rx_firspass[1][0][13] = 4
4197 11:03:48.452087 rx_lastpass[1][0][13] = 34
4198 11:03:48.455227 rx_firspass[1][0][14] = 2
4199 11:03:48.458711 rx_lastpass[1][0][14] = 35
4200 11:03:48.461980 rx_firspass[1][0][15] = 0
4201 11:03:48.462072 rx_lastpass[1][0][15] = 33
4202 11:03:48.465132 rx_firspass[1][1][0] = 7
4203 11:03:48.468683 rx_lastpass[1][1][0] = 42
4204 11:03:48.468783 rx_firspass[1][1][1] = 5
4205 11:03:48.471711 rx_lastpass[1][1][1] = 40
4206 11:03:48.474940 rx_firspass[1][1][2] = 0
4207 11:03:48.478504 rx_lastpass[1][1][2] = 35
4208 11:03:48.478596 rx_firspass[1][1][3] = -2
4209 11:03:48.481974 rx_lastpass[1][1][3] = 33
4210 11:03:48.485403 rx_firspass[1][1][4] = 1
4211 11:03:48.485501 rx_lastpass[1][1][4] = 36
4212 11:03:48.489090 rx_firspass[1][1][5] = 5
4213 11:03:48.492160 rx_lastpass[1][1][5] = 41
4214 11:03:48.492247 rx_firspass[1][1][6] = 7
4215 11:03:48.495334 rx_lastpass[1][1][6] = 42
4216 11:03:48.499009 rx_firspass[1][1][7] = 1
4217 11:03:48.501904 rx_lastpass[1][1][7] = 36
4218 11:03:48.501977 rx_firspass[1][1][8] = 2
4219 11:03:48.504980 rx_lastpass[1][1][8] = 37
4220 11:03:48.508801 rx_firspass[1][1][9] = 1
4221 11:03:48.508905 rx_lastpass[1][1][9] = 37
4222 11:03:48.512262 rx_firspass[1][1][10] = 2
4223 11:03:48.515067 rx_lastpass[1][1][10] = 36
4224 11:03:48.515141 rx_firspass[1][1][11] = 3
4225 11:03:48.518759 rx_lastpass[1][1][11] = 38
4226 11:03:48.522032 rx_firspass[1][1][12] = 4
4227 11:03:48.525907 rx_lastpass[1][1][12] = 39
4228 11:03:48.525981 rx_firspass[1][1][13] = 3
4229 11:03:48.528574 rx_lastpass[1][1][13] = 36
4230 11:03:48.531829 rx_firspass[1][1][14] = 3
4231 11:03:48.535166 rx_lastpass[1][1][14] = 36
4232 11:03:48.535240 rx_firspass[1][1][15] = 0
4233 11:03:48.538515 rx_lastpass[1][1][15] = 34
4234 11:03:48.542394 dump params clk_delay
4235 11:03:48.542470 clk_delay[0] = -1
4236 11:03:48.545090 clk_delay[1] = 0
4237 11:03:48.545199 dump params dqs_delay
4238 11:03:48.548393 dqs_delay[0][0] = 0
4239 11:03:48.548466 dqs_delay[0][1] = -1
4240 11:03:48.551792 dqs_delay[1][0] = -1
4241 11:03:48.551867 dqs_delay[1][1] = 0
4242 11:03:48.555152 dump params delay_cell_unit = 762
4243 11:03:48.558317 dump source = 0x0
4244 11:03:48.558403 dump params frequency:1200
4245 11:03:48.561660 dump params rank number:2
4246 11:03:48.561734
4247 11:03:48.565345 dump params write leveling
4248 11:03:48.568681 write leveling[0][0][0] = 0x0
4249 11:03:48.571836 write leveling[0][0][1] = 0x0
4250 11:03:48.571910 write leveling[0][1][0] = 0x0
4251 11:03:48.575502 write leveling[0][1][1] = 0x0
4252 11:03:48.578289 write leveling[1][0][0] = 0x0
4253 11:03:48.581668 write leveling[1][0][1] = 0x0
4254 11:03:48.585040 write leveling[1][1][0] = 0x0
4255 11:03:48.585115 write leveling[1][1][1] = 0x0
4256 11:03:48.588619 dump params cbt_cs
4257 11:03:48.588717 cbt_cs[0][0] = 0x0
4258 11:03:48.592002 cbt_cs[0][1] = 0x0
4259 11:03:48.592076 cbt_cs[1][0] = 0x0
4260 11:03:48.595554 cbt_cs[1][1] = 0x0
4261 11:03:48.598347 dump params cbt_mr12
4262 11:03:48.598421 cbt_mr12[0][0] = 0x0
4263 11:03:48.601862 cbt_mr12[0][1] = 0x0
4264 11:03:48.601935 cbt_mr12[1][0] = 0x0
4265 11:03:48.605041 cbt_mr12[1][1] = 0x0
4266 11:03:48.605144 dump params tx window
4267 11:03:48.608502 tx_center_min[0][0][0] = 0
4268 11:03:48.611731 tx_center_max[0][0][0] = 0
4269 11:03:48.615197 tx_center_min[0][0][1] = 0
4270 11:03:48.615272 tx_center_max[0][0][1] = 0
4271 11:03:48.618688 tx_center_min[0][1][0] = 0
4272 11:03:48.621684 tx_center_max[0][1][0] = 0
4273 11:03:48.625489 tx_center_min[0][1][1] = 0
4274 11:03:48.625564 tx_center_max[0][1][1] = 0
4275 11:03:48.628921 tx_center_min[1][0][0] = 0
4276 11:03:48.631950 tx_center_max[1][0][0] = 0
4277 11:03:48.632026 tx_center_min[1][0][1] = 0
4278 11:03:48.635334 tx_center_max[1][0][1] = 0
4279 11:03:48.638802 tx_center_min[1][1][0] = 0
4280 11:03:48.642079 tx_center_max[1][1][0] = 0
4281 11:03:48.642154 tx_center_min[1][1][1] = 0
4282 11:03:48.645627 tx_center_max[1][1][1] = 0
4283 11:03:48.648986 dump params tx window
4284 11:03:48.649084 tx_win_center[0][0][0] = 0
4285 11:03:48.651939 tx_first_pass[0][0][0] = 0
4286 11:03:48.655182 tx_last_pass[0][0][0] = 0
4287 11:03:48.658511 tx_win_center[0][0][1] = 0
4288 11:03:48.658588 tx_first_pass[0][0][1] = 0
4289 11:03:48.661825 tx_last_pass[0][0][1] = 0
4290 11:03:48.665408 tx_win_center[0][0][2] = 0
4291 11:03:48.668621 tx_first_pass[0][0][2] = 0
4292 11:03:48.668695 tx_last_pass[0][0][2] = 0
4293 11:03:48.672303 tx_win_center[0][0][3] = 0
4294 11:03:48.675422 tx_first_pass[0][0][3] = 0
4295 11:03:48.675497 tx_last_pass[0][0][3] = 0
4296 11:03:48.679242 tx_win_center[0][0][4] = 0
4297 11:03:48.682191 tx_first_pass[0][0][4] = 0
4298 11:03:48.685626 tx_last_pass[0][0][4] = 0
4299 11:03:48.685730 tx_win_center[0][0][5] = 0
4300 11:03:48.688789 tx_first_pass[0][0][5] = 0
4301 11:03:48.692244 tx_last_pass[0][0][5] = 0
4302 11:03:48.692337 tx_win_center[0][0][6] = 0
4303 11:03:48.695790 tx_first_pass[0][0][6] = 0
4304 11:03:48.699321 tx_last_pass[0][0][6] = 0
4305 11:03:48.702281 tx_win_center[0][0][7] = 0
4306 11:03:48.702348 tx_first_pass[0][0][7] = 0
4307 11:03:48.705449 tx_last_pass[0][0][7] = 0
4308 11:03:48.708810 tx_win_center[0][0][8] = 0
4309 11:03:48.712181 tx_first_pass[0][0][8] = 0
4310 11:03:48.712270 tx_last_pass[0][0][8] = 0
4311 11:03:48.715851 tx_win_center[0][0][9] = 0
4312 11:03:48.718768 tx_first_pass[0][0][9] = 0
4313 11:03:48.718843 tx_last_pass[0][0][9] = 0
4314 11:03:48.722359 tx_win_center[0][0][10] = 0
4315 11:03:48.725707 tx_first_pass[0][0][10] = 0
4316 11:03:48.728718 tx_last_pass[0][0][10] = 0
4317 11:03:48.728792 tx_win_center[0][0][11] = 0
4318 11:03:48.732054 tx_first_pass[0][0][11] = 0
4319 11:03:48.735395 tx_last_pass[0][0][11] = 0
4320 11:03:48.738675 tx_win_center[0][0][12] = 0
4321 11:03:48.738749 tx_first_pass[0][0][12] = 0
4322 11:03:48.742270 tx_last_pass[0][0][12] = 0
4323 11:03:48.745535 tx_win_center[0][0][13] = 0
4324 11:03:48.749050 tx_first_pass[0][0][13] = 0
4325 11:03:48.749169 tx_last_pass[0][0][13] = 0
4326 11:03:48.752421 tx_win_center[0][0][14] = 0
4327 11:03:48.755654 tx_first_pass[0][0][14] = 0
4328 11:03:48.759158 tx_last_pass[0][0][14] = 0
4329 11:03:48.759221 tx_win_center[0][0][15] = 0
4330 11:03:48.762191 tx_first_pass[0][0][15] = 0
4331 11:03:48.765798 tx_last_pass[0][0][15] = 0
4332 11:03:48.768732 tx_win_center[0][1][0] = 0
4333 11:03:48.768820 tx_first_pass[0][1][0] = 0
4334 11:03:48.772928 tx_last_pass[0][1][0] = 0
4335 11:03:48.775242 tx_win_center[0][1][1] = 0
4336 11:03:48.778503 tx_first_pass[0][1][1] = 0
4337 11:03:48.778577 tx_last_pass[0][1][1] = 0
4338 11:03:48.781967 tx_win_center[0][1][2] = 0
4339 11:03:48.785178 tx_first_pass[0][1][2] = 0
4340 11:03:48.785252 tx_last_pass[0][1][2] = 0
4341 11:03:48.788690 tx_win_center[0][1][3] = 0
4342 11:03:48.792126 tx_first_pass[0][1][3] = 0
4343 11:03:48.795306 tx_last_pass[0][1][3] = 0
4344 11:03:48.795380 tx_win_center[0][1][4] = 0
4345 11:03:48.798592 tx_first_pass[0][1][4] = 0
4346 11:03:48.802102 tx_last_pass[0][1][4] = 0
4347 11:03:48.805848 tx_win_center[0][1][5] = 0
4348 11:03:48.805922 tx_first_pass[0][1][5] = 0
4349 11:03:48.808910 tx_last_pass[0][1][5] = 0
4350 11:03:48.812200 tx_win_center[0][1][6] = 0
4351 11:03:48.812274 tx_first_pass[0][1][6] = 0
4352 11:03:48.815352 tx_last_pass[0][1][6] = 0
4353 11:03:48.819126 tx_win_center[0][1][7] = 0
4354 11:03:48.822203 tx_first_pass[0][1][7] = 0
4355 11:03:48.822277 tx_last_pass[0][1][7] = 0
4356 11:03:48.825604 tx_win_center[0][1][8] = 0
4357 11:03:48.828722 tx_first_pass[0][1][8] = 0
4358 11:03:48.828790 tx_last_pass[0][1][8] = 0
4359 11:03:48.831962 tx_win_center[0][1][9] = 0
4360 11:03:48.835459 tx_first_pass[0][1][9] = 0
4361 11:03:48.838989 tx_last_pass[0][1][9] = 0
4362 11:03:48.839079 tx_win_center[0][1][10] = 0
4363 11:03:48.842396 tx_first_pass[0][1][10] = 0
4364 11:03:48.845816 tx_last_pass[0][1][10] = 0
4365 11:03:48.848945 tx_win_center[0][1][11] = 0
4366 11:03:48.849032 tx_first_pass[0][1][11] = 0
4367 11:03:48.852161 tx_last_pass[0][1][11] = 0
4368 11:03:48.856202 tx_win_center[0][1][12] = 0
4369 11:03:48.859274 tx_first_pass[0][1][12] = 0
4370 11:03:48.859362 tx_last_pass[0][1][12] = 0
4371 11:03:48.862192 tx_win_center[0][1][13] = 0
4372 11:03:48.865820 tx_first_pass[0][1][13] = 0
4373 11:03:48.869360 tx_last_pass[0][1][13] = 0
4374 11:03:48.869424 tx_win_center[0][1][14] = 0
4375 11:03:48.872287 tx_first_pass[0][1][14] = 0
4376 11:03:48.875724 tx_last_pass[0][1][14] = 0
4377 11:03:48.879418 tx_win_center[0][1][15] = 0
4378 11:03:48.879491 tx_first_pass[0][1][15] = 0
4379 11:03:48.882498 tx_last_pass[0][1][15] = 0
4380 11:03:48.885975 tx_win_center[1][0][0] = 0
4381 11:03:48.888800 tx_first_pass[1][0][0] = 0
4382 11:03:48.888898 tx_last_pass[1][0][0] = 0
4383 11:03:48.892257 tx_win_center[1][0][1] = 0
4384 11:03:48.895835 tx_first_pass[1][0][1] = 0
4385 11:03:48.895911 tx_last_pass[1][0][1] = 0
4386 11:03:48.899104 tx_win_center[1][0][2] = 0
4387 11:03:48.902399 tx_first_pass[1][0][2] = 0
4388 11:03:48.906082 tx_last_pass[1][0][2] = 0
4389 11:03:48.906181 tx_win_center[1][0][3] = 0
4390 11:03:48.909180 tx_first_pass[1][0][3] = 0
4391 11:03:48.912306 tx_last_pass[1][0][3] = 0
4392 11:03:48.912382 tx_win_center[1][0][4] = 0
4393 11:03:48.915802 tx_first_pass[1][0][4] = 0
4394 11:03:48.919229 tx_last_pass[1][0][4] = 0
4395 11:03:48.922429 tx_win_center[1][0][5] = 0
4396 11:03:48.922504 tx_first_pass[1][0][5] = 0
4397 11:03:48.925882 tx_last_pass[1][0][5] = 0
4398 11:03:48.929320 tx_win_center[1][0][6] = 0
4399 11:03:48.929395 tx_first_pass[1][0][6] = 0
4400 11:03:48.932555 tx_last_pass[1][0][6] = 0
4401 11:03:48.936140 tx_win_center[1][0][7] = 0
4402 11:03:48.939342 tx_first_pass[1][0][7] = 0
4403 11:03:48.939417 tx_last_pass[1][0][7] = 0
4404 11:03:48.942588 tx_win_center[1][0][8] = 0
4405 11:03:48.945734 tx_first_pass[1][0][8] = 0
4406 11:03:48.949369 tx_last_pass[1][0][8] = 0
4407 11:03:48.949444 tx_win_center[1][0][9] = 0
4408 11:03:48.952622 tx_first_pass[1][0][9] = 0
4409 11:03:48.955792 tx_last_pass[1][0][9] = 0
4410 11:03:48.955867 tx_win_center[1][0][10] = 0
4411 11:03:48.959080 tx_first_pass[1][0][10] = 0
4412 11:03:48.962714 tx_last_pass[1][0][10] = 0
4413 11:03:48.965852 tx_win_center[1][0][11] = 0
4414 11:03:48.969398 tx_first_pass[1][0][11] = 0
4415 11:03:48.969473 tx_last_pass[1][0][11] = 0
4416 11:03:48.972880 tx_win_center[1][0][12] = 0
4417 11:03:48.975582 tx_first_pass[1][0][12] = 0
4418 11:03:48.975657 tx_last_pass[1][0][12] = 0
4419 11:03:48.979259 tx_win_center[1][0][13] = 0
4420 11:03:48.982672 tx_first_pass[1][0][13] = 0
4421 11:03:48.986093 tx_last_pass[1][0][13] = 0
4422 11:03:48.986168 tx_win_center[1][0][14] = 0
4423 11:03:48.989278 tx_first_pass[1][0][14] = 0
4424 11:03:48.992720 tx_last_pass[1][0][14] = 0
4425 11:03:48.995672 tx_win_center[1][0][15] = 0
4426 11:03:48.995747 tx_first_pass[1][0][15] = 0
4427 11:03:48.998991 tx_last_pass[1][0][15] = 0
4428 11:03:49.002444 tx_win_center[1][1][0] = 0
4429 11:03:49.005739 tx_first_pass[1][1][0] = 0
4430 11:03:49.005813 tx_last_pass[1][1][0] = 0
4431 11:03:49.009208 tx_win_center[1][1][1] = 0
4432 11:03:49.012585 tx_first_pass[1][1][1] = 0
4433 11:03:49.016603 tx_last_pass[1][1][1] = 0
4434 11:03:49.016678 tx_win_center[1][1][2] = 0
4435 11:03:49.019631 tx_first_pass[1][1][2] = 0
4436 11:03:49.022648 tx_last_pass[1][1][2] = 0
4437 11:03:49.022723 tx_win_center[1][1][3] = 0
4438 11:03:49.026299 tx_first_pass[1][1][3] = 0
4439 11:03:49.029361 tx_last_pass[1][1][3] = 0
4440 11:03:49.032696 tx_win_center[1][1][4] = 0
4441 11:03:49.032771 tx_first_pass[1][1][4] = 0
4442 11:03:49.035931 tx_last_pass[1][1][4] = 0
4443 11:03:49.039767 tx_win_center[1][1][5] = 0
4444 11:03:49.039842 tx_first_pass[1][1][5] = 0
4445 11:03:49.042632 tx_last_pass[1][1][5] = 0
4446 11:03:49.045985 tx_win_center[1][1][6] = 0
4447 11:03:49.049407 tx_first_pass[1][1][6] = 0
4448 11:03:49.049485 tx_last_pass[1][1][6] = 0
4449 11:03:49.052662 tx_win_center[1][1][7] = 0
4450 11:03:49.055772 tx_first_pass[1][1][7] = 0
4451 11:03:49.059323 tx_last_pass[1][1][7] = 0
4452 11:03:49.059400 tx_win_center[1][1][8] = 0
4453 11:03:49.062917 tx_first_pass[1][1][8] = 0
4454 11:03:49.066172 tx_last_pass[1][1][8] = 0
4455 11:03:49.066248 tx_win_center[1][1][9] = 0
4456 11:03:49.069066 tx_first_pass[1][1][9] = 0
4457 11:03:49.072509 tx_last_pass[1][1][9] = 0
4458 11:03:49.075832 tx_win_center[1][1][10] = 0
4459 11:03:49.075907 tx_first_pass[1][1][10] = 0
4460 11:03:49.079628 tx_last_pass[1][1][10] = 0
4461 11:03:49.082515 tx_win_center[1][1][11] = 0
4462 11:03:49.086515 tx_first_pass[1][1][11] = 0
4463 11:03:49.086590 tx_last_pass[1][1][11] = 0
4464 11:03:49.089836 tx_win_center[1][1][12] = 0
4465 11:03:49.092563 tx_first_pass[1][1][12] = 0
4466 11:03:49.095984 tx_last_pass[1][1][12] = 0
4467 11:03:49.096060 tx_win_center[1][1][13] = 0
4468 11:03:49.099294 tx_first_pass[1][1][13] = 0
4469 11:03:49.102692 tx_last_pass[1][1][13] = 0
4470 11:03:49.106098 tx_win_center[1][1][14] = 0
4471 11:03:49.106173 tx_first_pass[1][1][14] = 0
4472 11:03:49.109593 tx_last_pass[1][1][14] = 0
4473 11:03:49.112607 tx_win_center[1][1][15] = 0
4474 11:03:49.115948 tx_first_pass[1][1][15] = 0
4475 11:03:49.116022 tx_last_pass[1][1][15] = 0
4476 11:03:49.119544 dump params rx window
4477 11:03:49.122478 rx_firspass[0][0][0] = 0
4478 11:03:49.122552 rx_lastpass[0][0][0] = 0
4479 11:03:49.126223 rx_firspass[0][0][1] = 0
4480 11:03:49.129285 rx_lastpass[0][0][1] = 0
4481 11:03:49.129360 rx_firspass[0][0][2] = 0
4482 11:03:49.132792 rx_lastpass[0][0][2] = 0
4483 11:03:49.135849 rx_firspass[0][0][3] = 0
4484 11:03:49.135923 rx_lastpass[0][0][3] = 0
4485 11:03:49.139351 rx_firspass[0][0][4] = 0
4486 11:03:49.142905 rx_lastpass[0][0][4] = 0
4487 11:03:49.143003 rx_firspass[0][0][5] = 0
4488 11:03:49.146051 rx_lastpass[0][0][5] = 0
4489 11:03:49.150000 rx_firspass[0][0][6] = 0
4490 11:03:49.152976 rx_lastpass[0][0][6] = 0
4491 11:03:49.153074 rx_firspass[0][0][7] = 0
4492 11:03:49.155841 rx_lastpass[0][0][7] = 0
4493 11:03:49.159451 rx_firspass[0][0][8] = 0
4494 11:03:49.159526 rx_lastpass[0][0][8] = 0
4495 11:03:49.162730 rx_firspass[0][0][9] = 0
4496 11:03:49.165833 rx_lastpass[0][0][9] = 0
4497 11:03:49.165908 rx_firspass[0][0][10] = 0
4498 11:03:49.169566 rx_lastpass[0][0][10] = 0
4499 11:03:49.172549 rx_firspass[0][0][11] = 0
4500 11:03:49.172623 rx_lastpass[0][0][11] = 0
4501 11:03:49.175947 rx_firspass[0][0][12] = 0
4502 11:03:49.179608 rx_lastpass[0][0][12] = 0
4503 11:03:49.182567 rx_firspass[0][0][13] = 0
4504 11:03:49.182642 rx_lastpass[0][0][13] = 0
4505 11:03:49.185756 rx_firspass[0][0][14] = 0
4506 11:03:49.189564 rx_lastpass[0][0][14] = 0
4507 11:03:49.189663 rx_firspass[0][0][15] = 0
4508 11:03:49.192674 rx_lastpass[0][0][15] = 0
4509 11:03:49.196466 rx_firspass[0][1][0] = 0
4510 11:03:49.199271 rx_lastpass[0][1][0] = 0
4511 11:03:49.199346 rx_firspass[0][1][1] = 0
4512 11:03:49.202326 rx_lastpass[0][1][1] = 0
4513 11:03:49.205703 rx_firspass[0][1][2] = 0
4514 11:03:49.205777 rx_lastpass[0][1][2] = 0
4515 11:03:49.209180 rx_firspass[0][1][3] = 0
4516 11:03:49.212458 rx_lastpass[0][1][3] = 0
4517 11:03:49.212532 rx_firspass[0][1][4] = 0
4518 11:03:49.215824 rx_lastpass[0][1][4] = 0
4519 11:03:49.219795 rx_firspass[0][1][5] = 0
4520 11:03:49.219870 rx_lastpass[0][1][5] = 0
4521 11:03:49.222805 rx_firspass[0][1][6] = 0
4522 11:03:49.226154 rx_lastpass[0][1][6] = 0
4523 11:03:49.226229 rx_firspass[0][1][7] = 0
4524 11:03:49.229578 rx_lastpass[0][1][7] = 0
4525 11:03:49.233060 rx_firspass[0][1][8] = 0
4526 11:03:49.233134 rx_lastpass[0][1][8] = 0
4527 11:03:49.236003 rx_firspass[0][1][9] = 0
4528 11:03:49.239206 rx_lastpass[0][1][9] = 0
4529 11:03:49.242448 rx_firspass[0][1][10] = 0
4530 11:03:49.242522 rx_lastpass[0][1][10] = 0
4531 11:03:49.245839 rx_firspass[0][1][11] = 0
4532 11:03:49.249712 rx_lastpass[0][1][11] = 0
4533 11:03:49.249786 rx_firspass[0][1][12] = 0
4534 11:03:49.252568 rx_lastpass[0][1][12] = 0
4535 11:03:49.255981 rx_firspass[0][1][13] = 0
4536 11:03:49.259217 rx_lastpass[0][1][13] = 0
4537 11:03:49.259292 rx_firspass[0][1][14] = 0
4538 11:03:49.262515 rx_lastpass[0][1][14] = 0
4539 11:03:49.265883 rx_firspass[0][1][15] = 0
4540 11:03:49.265961 rx_lastpass[0][1][15] = 0
4541 11:03:49.269560 rx_firspass[1][0][0] = 0
4542 11:03:49.272553 rx_lastpass[1][0][0] = 0
4543 11:03:49.272628 rx_firspass[1][0][1] = 0
4544 11:03:49.275723 rx_lastpass[1][0][1] = 0
4545 11:03:49.279271 rx_firspass[1][0][2] = 0
4546 11:03:49.282727 rx_lastpass[1][0][2] = 0
4547 11:03:49.282802 rx_firspass[1][0][3] = 0
4548 11:03:49.286051 rx_lastpass[1][0][3] = 0
4549 11:03:49.289095 rx_firspass[1][0][4] = 0
4550 11:03:49.289219 rx_lastpass[1][0][4] = 0
4551 11:03:49.292936 rx_firspass[1][0][5] = 0
4552 11:03:49.295886 rx_lastpass[1][0][5] = 0
4553 11:03:49.295961 rx_firspass[1][0][6] = 0
4554 11:03:49.299435 rx_lastpass[1][0][6] = 0
4555 11:03:49.302519 rx_firspass[1][0][7] = 0
4556 11:03:49.302594 rx_lastpass[1][0][7] = 0
4557 11:03:49.306010 rx_firspass[1][0][8] = 0
4558 11:03:49.309014 rx_lastpass[1][0][8] = 0
4559 11:03:49.309088 rx_firspass[1][0][9] = 0
4560 11:03:49.312603 rx_lastpass[1][0][9] = 0
4561 11:03:49.315946 rx_firspass[1][0][10] = 0
4562 11:03:49.318911 rx_lastpass[1][0][10] = 0
4563 11:03:49.318990 rx_firspass[1][0][11] = 0
4564 11:03:49.323028 rx_lastpass[1][0][11] = 0
4565 11:03:49.325749 rx_firspass[1][0][12] = 0
4566 11:03:49.325824 rx_lastpass[1][0][12] = 0
4567 11:03:49.328907 rx_firspass[1][0][13] = 0
4568 11:03:49.332691 rx_lastpass[1][0][13] = 0
4569 11:03:49.336264 rx_firspass[1][0][14] = 0
4570 11:03:49.336339 rx_lastpass[1][0][14] = 0
4571 11:03:49.339251 rx_firspass[1][0][15] = 0
4572 11:03:49.342612 rx_lastpass[1][0][15] = 0
4573 11:03:49.342687 rx_firspass[1][1][0] = 0
4574 11:03:49.345876 rx_lastpass[1][1][0] = 0
4575 11:03:49.349281 rx_firspass[1][1][1] = 0
4576 11:03:49.349380 rx_lastpass[1][1][1] = 0
4577 11:03:49.352605 rx_firspass[1][1][2] = 0
4578 11:03:49.355600 rx_lastpass[1][1][2] = 0
4579 11:03:49.355699 rx_firspass[1][1][3] = 0
4580 11:03:49.359034 rx_lastpass[1][1][3] = 0
4581 11:03:49.362470 rx_firspass[1][1][4] = 0
4582 11:03:49.366018 rx_lastpass[1][1][4] = 0
4583 11:03:49.366093 rx_firspass[1][1][5] = 0
4584 11:03:49.368955 rx_lastpass[1][1][5] = 0
4585 11:03:49.372759 rx_firspass[1][1][6] = 0
4586 11:03:49.372834 rx_lastpass[1][1][6] = 0
4587 11:03:49.375603 rx_firspass[1][1][7] = 0
4588 11:03:49.379331 rx_lastpass[1][1][7] = 0
4589 11:03:49.379406 rx_firspass[1][1][8] = 0
4590 11:03:49.382420 rx_lastpass[1][1][8] = 0
4591 11:03:49.385734 rx_firspass[1][1][9] = 0
4592 11:03:49.385809 rx_lastpass[1][1][9] = 0
4593 11:03:49.389171 rx_firspass[1][1][10] = 0
4594 11:03:49.392492 rx_lastpass[1][1][10] = 0
4595 11:03:49.395522 rx_firspass[1][1][11] = 0
4596 11:03:49.395597 rx_lastpass[1][1][11] = 0
4597 11:03:49.399124 rx_firspass[1][1][12] = 0
4598 11:03:49.402362 rx_lastpass[1][1][12] = 0
4599 11:03:49.402436 rx_firspass[1][1][13] = 0
4600 11:03:49.405951 rx_lastpass[1][1][13] = 0
4601 11:03:49.409430 rx_firspass[1][1][14] = 0
4602 11:03:49.412606 rx_lastpass[1][1][14] = 0
4603 11:03:49.412713 rx_firspass[1][1][15] = 0
4604 11:03:49.415755 rx_lastpass[1][1][15] = 0
4605 11:03:49.419357 dump params clk_delay
4606 11:03:49.419432 clk_delay[0] = 0
4607 11:03:49.419490 clk_delay[1] = 0
4608 11:03:49.422331 dump params dqs_delay
4609 11:03:49.425713 dqs_delay[0][0] = 0
4610 11:03:49.425788 dqs_delay[0][1] = 0
4611 11:03:49.429667 dqs_delay[1][0] = 0
4612 11:03:49.429741 dqs_delay[1][1] = 0
4613 11:03:49.432513 dump params delay_cell_unit = 762
4614 11:03:49.436021 dump source = 0x0
4615 11:03:49.436096 dump params frequency:800
4616 11:03:49.439005 dump params rank number:2
4617 11:03:49.439105
4618 11:03:49.442361 dump params write leveling
4619 11:03:49.445913 write leveling[0][0][0] = 0x0
4620 11:03:49.445988 write leveling[0][0][1] = 0x0
4621 11:03:49.449319 write leveling[0][1][0] = 0x0
4622 11:03:49.452662 write leveling[0][1][1] = 0x0
4623 11:03:49.456145 write leveling[1][0][0] = 0x0
4624 11:03:49.459179 write leveling[1][0][1] = 0x0
4625 11:03:49.459269 write leveling[1][1][0] = 0x0
4626 11:03:49.462453 write leveling[1][1][1] = 0x0
4627 11:03:49.466766 dump params cbt_cs
4628 11:03:49.466839 cbt_cs[0][0] = 0x0
4629 11:03:49.469144 cbt_cs[0][1] = 0x0
4630 11:03:49.469220 cbt_cs[1][0] = 0x0
4631 11:03:49.472643 cbt_cs[1][1] = 0x0
4632 11:03:49.472717 dump params cbt_mr12
4633 11:03:49.475816 cbt_mr12[0][0] = 0x0
4634 11:03:49.475891 cbt_mr12[0][1] = 0x0
4635 11:03:49.479325 cbt_mr12[1][0] = 0x0
4636 11:03:49.482340 cbt_mr12[1][1] = 0x0
4637 11:03:49.482415 dump params tx window
4638 11:03:49.486175 tx_center_min[0][0][0] = 0
4639 11:03:49.489035 tx_center_max[0][0][0] = 0
4640 11:03:49.489110 tx_center_min[0][0][1] = 0
4641 11:03:49.492847 tx_center_max[0][0][1] = 0
4642 11:03:49.495888 tx_center_min[0][1][0] = 0
4643 11:03:49.498974 tx_center_max[0][1][0] = 0
4644 11:03:49.499049 tx_center_min[0][1][1] = 0
4645 11:03:49.502393 tx_center_max[0][1][1] = 0
4646 11:03:49.505779 tx_center_min[1][0][0] = 0
4647 11:03:49.509358 tx_center_max[1][0][0] = 0
4648 11:03:49.509433 tx_center_min[1][0][1] = 0
4649 11:03:49.512557 tx_center_max[1][0][1] = 0
4650 11:03:49.516024 tx_center_min[1][1][0] = 0
4651 11:03:49.518961 tx_center_max[1][1][0] = 0
4652 11:03:49.519036 tx_center_min[1][1][1] = 0
4653 11:03:49.522624 tx_center_max[1][1][1] = 0
4654 11:03:49.525764 dump params tx window
4655 11:03:49.525839 tx_win_center[0][0][0] = 0
4656 11:03:49.529357 tx_first_pass[0][0][0] = 0
4657 11:03:49.532575 tx_last_pass[0][0][0] = 0
4658 11:03:49.536161 tx_win_center[0][0][1] = 0
4659 11:03:49.536236 tx_first_pass[0][0][1] = 0
4660 11:03:49.539062 tx_last_pass[0][0][1] = 0
4661 11:03:49.542705 tx_win_center[0][0][2] = 0
4662 11:03:49.542780 tx_first_pass[0][0][2] = 0
4663 11:03:49.546101 tx_last_pass[0][0][2] = 0
4664 11:03:49.549498 tx_win_center[0][0][3] = 0
4665 11:03:49.552257 tx_first_pass[0][0][3] = 0
4666 11:03:49.552334 tx_last_pass[0][0][3] = 0
4667 11:03:49.555906 tx_win_center[0][0][4] = 0
4668 11:03:49.559249 tx_first_pass[0][0][4] = 0
4669 11:03:49.559324 tx_last_pass[0][0][4] = 0
4670 11:03:49.562903 tx_win_center[0][0][5] = 0
4671 11:03:49.565735 tx_first_pass[0][0][5] = 0
4672 11:03:49.569431 tx_last_pass[0][0][5] = 0
4673 11:03:49.569505 tx_win_center[0][0][6] = 0
4674 11:03:49.572724 tx_first_pass[0][0][6] = 0
4675 11:03:49.575690 tx_last_pass[0][0][6] = 0
4676 11:03:49.579052 tx_win_center[0][0][7] = 0
4677 11:03:49.579128 tx_first_pass[0][0][7] = 0
4678 11:03:49.582517 tx_last_pass[0][0][7] = 0
4679 11:03:49.586038 tx_win_center[0][0][8] = 0
4680 11:03:49.586113 tx_first_pass[0][0][8] = 0
4681 11:03:49.589115 tx_last_pass[0][0][8] = 0
4682 11:03:49.592949 tx_win_center[0][0][9] = 0
4683 11:03:49.595693 tx_first_pass[0][0][9] = 0
4684 11:03:49.595767 tx_last_pass[0][0][9] = 0
4685 11:03:49.599573 tx_win_center[0][0][10] = 0
4686 11:03:49.602450 tx_first_pass[0][0][10] = 0
4687 11:03:49.605769 tx_last_pass[0][0][10] = 0
4688 11:03:49.605845 tx_win_center[0][0][11] = 0
4689 11:03:49.609031 tx_first_pass[0][0][11] = 0
4690 11:03:49.612383 tx_last_pass[0][0][11] = 0
4691 11:03:49.616045 tx_win_center[0][0][12] = 0
4692 11:03:49.616120 tx_first_pass[0][0][12] = 0
4693 11:03:49.619574 tx_last_pass[0][0][12] = 0
4694 11:03:49.622876 tx_win_center[0][0][13] = 0
4695 11:03:49.625665 tx_first_pass[0][0][13] = 0
4696 11:03:49.625763 tx_last_pass[0][0][13] = 0
4697 11:03:49.629514 tx_win_center[0][0][14] = 0
4698 11:03:49.632688 tx_first_pass[0][0][14] = 0
4699 11:03:49.635572 tx_last_pass[0][0][14] = 0
4700 11:03:49.635647 tx_win_center[0][0][15] = 0
4701 11:03:49.639347 tx_first_pass[0][0][15] = 0
4702 11:03:49.642927 tx_last_pass[0][0][15] = 0
4703 11:03:49.646230 tx_win_center[0][1][0] = 0
4704 11:03:49.646320 tx_first_pass[0][1][0] = 0
4705 11:03:49.649405 tx_last_pass[0][1][0] = 0
4706 11:03:49.652381 tx_win_center[0][1][1] = 0
4707 11:03:49.652455 tx_first_pass[0][1][1] = 0
4708 11:03:49.656048 tx_last_pass[0][1][1] = 0
4709 11:03:49.659613 tx_win_center[0][1][2] = 0
4710 11:03:49.662516 tx_first_pass[0][1][2] = 0
4711 11:03:49.662591 tx_last_pass[0][1][2] = 0
4712 11:03:49.666006 tx_win_center[0][1][3] = 0
4713 11:03:49.669423 tx_first_pass[0][1][3] = 0
4714 11:03:49.672548 tx_last_pass[0][1][3] = 0
4715 11:03:49.672646 tx_win_center[0][1][4] = 0
4716 11:03:49.676073 tx_first_pass[0][1][4] = 0
4717 11:03:49.678960 tx_last_pass[0][1][4] = 0
4718 11:03:49.679035 tx_win_center[0][1][5] = 0
4719 11:03:49.682305 tx_first_pass[0][1][5] = 0
4720 11:03:49.686141 tx_last_pass[0][1][5] = 0
4721 11:03:49.689437 tx_win_center[0][1][6] = 0
4722 11:03:49.689512 tx_first_pass[0][1][6] = 0
4723 11:03:49.692708 tx_last_pass[0][1][6] = 0
4724 11:03:49.696154 tx_win_center[0][1][7] = 0
4725 11:03:49.696230 tx_first_pass[0][1][7] = 0
4726 11:03:49.698975 tx_last_pass[0][1][7] = 0
4727 11:03:49.702602 tx_win_center[0][1][8] = 0
4728 11:03:49.705997 tx_first_pass[0][1][8] = 0
4729 11:03:49.706073 tx_last_pass[0][1][8] = 0
4730 11:03:49.709716 tx_win_center[0][1][9] = 0
4731 11:03:49.712475 tx_first_pass[0][1][9] = 0
4732 11:03:49.715852 tx_last_pass[0][1][9] = 0
4733 11:03:49.715927 tx_win_center[0][1][10] = 0
4734 11:03:49.719039 tx_first_pass[0][1][10] = 0
4735 11:03:49.722455 tx_last_pass[0][1][10] = 0
4736 11:03:49.725745 tx_win_center[0][1][11] = 0
4737 11:03:49.725820 tx_first_pass[0][1][11] = 0
4738 11:03:49.729088 tx_last_pass[0][1][11] = 0
4739 11:03:49.732722 tx_win_center[0][1][12] = 0
4740 11:03:49.735494 tx_first_pass[0][1][12] = 0
4741 11:03:49.735593 tx_last_pass[0][1][12] = 0
4742 11:03:49.738964 tx_win_center[0][1][13] = 0
4743 11:03:49.742341 tx_first_pass[0][1][13] = 0
4744 11:03:49.746179 tx_last_pass[0][1][13] = 0
4745 11:03:49.746254 tx_win_center[0][1][14] = 0
4746 11:03:49.749027 tx_first_pass[0][1][14] = 0
4747 11:03:49.752496 tx_last_pass[0][1][14] = 0
4748 11:03:49.755853 tx_win_center[0][1][15] = 0
4749 11:03:49.755929 tx_first_pass[0][1][15] = 0
4750 11:03:49.759251 tx_last_pass[0][1][15] = 0
4751 11:03:49.762652 tx_win_center[1][0][0] = 0
4752 11:03:49.765728 tx_first_pass[1][0][0] = 0
4753 11:03:49.765802 tx_last_pass[1][0][0] = 0
4754 11:03:49.768939 tx_win_center[1][0][1] = 0
4755 11:03:49.772603 tx_first_pass[1][0][1] = 0
4756 11:03:49.772702 tx_last_pass[1][0][1] = 0
4757 11:03:49.775982 tx_win_center[1][0][2] = 0
4758 11:03:49.778858 tx_first_pass[1][0][2] = 0
4759 11:03:49.782823 tx_last_pass[1][0][2] = 0
4760 11:03:49.782898 tx_win_center[1][0][3] = 0
4761 11:03:49.785688 tx_first_pass[1][0][3] = 0
4762 11:03:49.789084 tx_last_pass[1][0][3] = 0
4763 11:03:49.789221 tx_win_center[1][0][4] = 0
4764 11:03:49.792131 tx_first_pass[1][0][4] = 0
4765 11:03:49.795555 tx_last_pass[1][0][4] = 0
4766 11:03:49.799130 tx_win_center[1][0][5] = 0
4767 11:03:49.799205 tx_first_pass[1][0][5] = 0
4768 11:03:49.802504 tx_last_pass[1][0][5] = 0
4769 11:03:49.805791 tx_win_center[1][0][6] = 0
4770 11:03:49.809101 tx_first_pass[1][0][6] = 0
4771 11:03:49.809244 tx_last_pass[1][0][6] = 0
4772 11:03:49.812144 tx_win_center[1][0][7] = 0
4773 11:03:49.815659 tx_first_pass[1][0][7] = 0
4774 11:03:49.815758 tx_last_pass[1][0][7] = 0
4775 11:03:49.819069 tx_win_center[1][0][8] = 0
4776 11:03:49.822482 tx_first_pass[1][0][8] = 0
4777 11:03:49.825340 tx_last_pass[1][0][8] = 0
4778 11:03:49.825406 tx_win_center[1][0][9] = 0
4779 11:03:49.828695 tx_first_pass[1][0][9] = 0
4780 11:03:49.832449 tx_last_pass[1][0][9] = 0
4781 11:03:49.835482 tx_win_center[1][0][10] = 0
4782 11:03:49.835570 tx_first_pass[1][0][10] = 0
4783 11:03:49.839078 tx_last_pass[1][0][10] = 0
4784 11:03:49.842398 tx_win_center[1][0][11] = 0
4785 11:03:49.845374 tx_first_pass[1][0][11] = 0
4786 11:03:49.845467 tx_last_pass[1][0][11] = 0
4787 11:03:49.848647 tx_win_center[1][0][12] = 0
4788 11:03:49.851949 tx_first_pass[1][0][12] = 0
4789 11:03:49.855447 tx_last_pass[1][0][12] = 0
4790 11:03:49.855538 tx_win_center[1][0][13] = 0
4791 11:03:49.858782 tx_first_pass[1][0][13] = 0
4792 11:03:49.862413 tx_last_pass[1][0][13] = 0
4793 11:03:49.865434 tx_win_center[1][0][14] = 0
4794 11:03:49.865499 tx_first_pass[1][0][14] = 0
4795 11:03:49.868750 tx_last_pass[1][0][14] = 0
4796 11:03:49.872202 tx_win_center[1][0][15] = 0
4797 11:03:49.875598 tx_first_pass[1][0][15] = 0
4798 11:03:49.875673 tx_last_pass[1][0][15] = 0
4799 11:03:49.878971 tx_win_center[1][1][0] = 0
4800 11:03:49.882131 tx_first_pass[1][1][0] = 0
4801 11:03:49.885352 tx_last_pass[1][1][0] = 0
4802 11:03:49.885426 tx_win_center[1][1][1] = 0
4803 11:03:49.888705 tx_first_pass[1][1][1] = 0
4804 11:03:49.892033 tx_last_pass[1][1][1] = 0
4805 11:03:49.892109 tx_win_center[1][1][2] = 0
4806 11:03:49.895568 tx_first_pass[1][1][2] = 0
4807 11:03:49.898911 tx_last_pass[1][1][2] = 0
4808 11:03:49.902487 tx_win_center[1][1][3] = 0
4809 11:03:49.902563 tx_first_pass[1][1][3] = 0
4810 11:03:49.905520 tx_last_pass[1][1][3] = 0
4811 11:03:49.908732 tx_win_center[1][1][4] = 0
4812 11:03:49.911896 tx_first_pass[1][1][4] = 0
4813 11:03:49.911973 tx_last_pass[1][1][4] = 0
4814 11:03:49.915382 tx_win_center[1][1][5] = 0
4815 11:03:49.918873 tx_first_pass[1][1][5] = 0
4816 11:03:49.918950 tx_last_pass[1][1][5] = 0
4817 11:03:49.922455 tx_win_center[1][1][6] = 0
4818 11:03:49.925462 tx_first_pass[1][1][6] = 0
4819 11:03:49.929034 tx_last_pass[1][1][6] = 0
4820 11:03:49.929109 tx_win_center[1][1][7] = 0
4821 11:03:49.932319 tx_first_pass[1][1][7] = 0
4822 11:03:49.935586 tx_last_pass[1][1][7] = 0
4823 11:03:49.935661 tx_win_center[1][1][8] = 0
4824 11:03:49.938701 tx_first_pass[1][1][8] = 0
4825 11:03:49.941776 tx_last_pass[1][1][8] = 0
4826 11:03:49.945428 tx_win_center[1][1][9] = 0
4827 11:03:49.945503 tx_first_pass[1][1][9] = 0
4828 11:03:49.948475 tx_last_pass[1][1][9] = 0
4829 11:03:49.952192 tx_win_center[1][1][10] = 0
4830 11:03:49.955575 tx_first_pass[1][1][10] = 0
4831 11:03:49.955649 tx_last_pass[1][1][10] = 0
4832 11:03:49.958853 tx_win_center[1][1][11] = 0
4833 11:03:49.961867 tx_first_pass[1][1][11] = 0
4834 11:03:49.965520 tx_last_pass[1][1][11] = 0
4835 11:03:49.965605 tx_win_center[1][1][12] = 0
4836 11:03:49.968722 tx_first_pass[1][1][12] = 0
4837 11:03:49.971894 tx_last_pass[1][1][12] = 0
4838 11:03:49.975283 tx_win_center[1][1][13] = 0
4839 11:03:49.975358 tx_first_pass[1][1][13] = 0
4840 11:03:49.978717 tx_last_pass[1][1][13] = 0
4841 11:03:49.982382 tx_win_center[1][1][14] = 0
4842 11:03:49.985551 tx_first_pass[1][1][14] = 0
4843 11:03:49.985625 tx_last_pass[1][1][14] = 0
4844 11:03:49.989041 tx_win_center[1][1][15] = 0
4845 11:03:49.992272 tx_first_pass[1][1][15] = 0
4846 11:03:49.995776 tx_last_pass[1][1][15] = 0
4847 11:03:49.995851 dump params rx window
4848 11:03:49.999384 rx_firspass[0][0][0] = 0
4849 11:03:50.002153 rx_lastpass[0][0][0] = 0
4850 11:03:50.002228 rx_firspass[0][0][1] = 0
4851 11:03:50.005314 rx_lastpass[0][0][1] = 0
4852 11:03:50.008772 rx_firspass[0][0][2] = 0
4853 11:03:50.008866 rx_lastpass[0][0][2] = 0
4854 11:03:50.011899 rx_firspass[0][0][3] = 0
4855 11:03:50.015393 rx_lastpass[0][0][3] = 0
4856 11:03:50.015485 rx_firspass[0][0][4] = 0
4857 11:03:50.018797 rx_lastpass[0][0][4] = 0
4858 11:03:50.022258 rx_firspass[0][0][5] = 0
4859 11:03:50.022357 rx_lastpass[0][0][5] = 0
4860 11:03:50.025522 rx_firspass[0][0][6] = 0
4861 11:03:50.028815 rx_lastpass[0][0][6] = 0
4862 11:03:50.028889 rx_firspass[0][0][7] = 0
4863 11:03:50.032455 rx_lastpass[0][0][7] = 0
4864 11:03:50.035278 rx_firspass[0][0][8] = 0
4865 11:03:50.035352 rx_lastpass[0][0][8] = 0
4866 11:03:50.038491 rx_firspass[0][0][9] = 0
4867 11:03:50.042343 rx_lastpass[0][0][9] = 0
4868 11:03:50.045312 rx_firspass[0][0][10] = 0
4869 11:03:50.045380 rx_lastpass[0][0][10] = 0
4870 11:03:50.048667 rx_firspass[0][0][11] = 0
4871 11:03:50.052096 rx_lastpass[0][0][11] = 0
4872 11:03:50.052193 rx_firspass[0][0][12] = 0
4873 11:03:50.055213 rx_lastpass[0][0][12] = 0
4874 11:03:50.059219 rx_firspass[0][0][13] = 0
4875 11:03:50.062311 rx_lastpass[0][0][13] = 0
4876 11:03:50.062408 rx_firspass[0][0][14] = 0
4877 11:03:50.065747 rx_lastpass[0][0][14] = 0
4878 11:03:50.068962 rx_firspass[0][0][15] = 0
4879 11:03:50.069053 rx_lastpass[0][0][15] = 0
4880 11:03:50.071969 rx_firspass[0][1][0] = 0
4881 11:03:50.075051 rx_lastpass[0][1][0] = 0
4882 11:03:50.075144 rx_firspass[0][1][1] = 0
4883 11:03:50.078614 rx_lastpass[0][1][1] = 0
4884 11:03:50.082157 rx_firspass[0][1][2] = 0
4885 11:03:50.082251 rx_lastpass[0][1][2] = 0
4886 11:03:50.085553 rx_firspass[0][1][3] = 0
4887 11:03:50.088859 rx_lastpass[0][1][3] = 0
4888 11:03:50.092368 rx_firspass[0][1][4] = 0
4889 11:03:50.092462 rx_lastpass[0][1][4] = 0
4890 11:03:50.095736 rx_firspass[0][1][5] = 0
4891 11:03:50.098747 rx_lastpass[0][1][5] = 0
4892 11:03:50.098843 rx_firspass[0][1][6] = 0
4893 11:03:50.101965 rx_lastpass[0][1][6] = 0
4894 11:03:50.105718 rx_firspass[0][1][7] = 0
4895 11:03:50.105786 rx_lastpass[0][1][7] = 0
4896 11:03:50.108924 rx_firspass[0][1][8] = 0
4897 11:03:50.112303 rx_lastpass[0][1][8] = 0
4898 11:03:50.112402 rx_firspass[0][1][9] = 0
4899 11:03:50.115632 rx_lastpass[0][1][9] = 0
4900 11:03:50.118780 rx_firspass[0][1][10] = 0
4901 11:03:50.118880 rx_lastpass[0][1][10] = 0
4902 11:03:50.122533 rx_firspass[0][1][11] = 0
4903 11:03:50.125708 rx_lastpass[0][1][11] = 0
4904 11:03:50.128737 rx_firspass[0][1][12] = 0
4905 11:03:50.128834 rx_lastpass[0][1][12] = 0
4906 11:03:50.132163 rx_firspass[0][1][13] = 0
4907 11:03:50.135591 rx_lastpass[0][1][13] = 0
4908 11:03:50.135681 rx_firspass[0][1][14] = 0
4909 11:03:50.139046 rx_lastpass[0][1][14] = 0
4910 11:03:50.142419 rx_firspass[0][1][15] = 0
4911 11:03:50.145904 rx_lastpass[0][1][15] = 0
4912 11:03:50.145997 rx_firspass[1][0][0] = 0
4913 11:03:50.148596 rx_lastpass[1][0][0] = 0
4914 11:03:50.152108 rx_firspass[1][0][1] = 0
4915 11:03:50.152200 rx_lastpass[1][0][1] = 0
4916 11:03:50.155379 rx_firspass[1][0][2] = 0
4917 11:03:50.158699 rx_lastpass[1][0][2] = 0
4918 11:03:50.158789 rx_firspass[1][0][3] = 0
4919 11:03:50.162093 rx_lastpass[1][0][3] = 0
4920 11:03:50.165454 rx_firspass[1][0][4] = 0
4921 11:03:50.165544 rx_lastpass[1][0][4] = 0
4922 11:03:50.168598 rx_firspass[1][0][5] = 0
4923 11:03:50.172239 rx_lastpass[1][0][5] = 0
4924 11:03:50.172343 rx_firspass[1][0][6] = 0
4925 11:03:50.175710 rx_lastpass[1][0][6] = 0
4926 11:03:50.178623 rx_firspass[1][0][7] = 0
4927 11:03:50.181911 rx_lastpass[1][0][7] = 0
4928 11:03:50.182002 rx_firspass[1][0][8] = 0
4929 11:03:50.185200 rx_lastpass[1][0][8] = 0
4930 11:03:50.188699 rx_firspass[1][0][9] = 0
4931 11:03:50.188790 rx_lastpass[1][0][9] = 0
4932 11:03:50.192034 rx_firspass[1][0][10] = 0
4933 11:03:50.195933 rx_lastpass[1][0][10] = 0
4934 11:03:50.195999 rx_firspass[1][0][11] = 0
4935 11:03:50.198532 rx_lastpass[1][0][11] = 0
4936 11:03:50.202158 rx_firspass[1][0][12] = 0
4937 11:03:50.205047 rx_lastpass[1][0][12] = 0
4938 11:03:50.205145 rx_firspass[1][0][13] = 0
4939 11:03:50.209295 rx_lastpass[1][0][13] = 0
4940 11:03:50.212034 rx_firspass[1][0][14] = 0
4941 11:03:50.212134 rx_lastpass[1][0][14] = 0
4942 11:03:50.215568 rx_firspass[1][0][15] = 0
4943 11:03:50.218684 rx_lastpass[1][0][15] = 0
4944 11:03:50.222185 rx_firspass[1][1][0] = 0
4945 11:03:50.222274 rx_lastpass[1][1][0] = 0
4946 11:03:50.225110 rx_firspass[1][1][1] = 0
4947 11:03:50.228702 rx_lastpass[1][1][1] = 0
4948 11:03:50.228788 rx_firspass[1][1][2] = 0
4949 11:03:50.232070 rx_lastpass[1][1][2] = 0
4950 11:03:50.235446 rx_firspass[1][1][3] = 0
4951 11:03:50.235535 rx_lastpass[1][1][3] = 0
4952 11:03:50.238753 rx_firspass[1][1][4] = 0
4953 11:03:50.242357 rx_lastpass[1][1][4] = 0
4954 11:03:50.242447 rx_firspass[1][1][5] = 0
4955 11:03:50.245451 rx_lastpass[1][1][5] = 0
4956 11:03:50.248834 rx_firspass[1][1][6] = 0
4957 11:03:50.248933 rx_lastpass[1][1][6] = 0
4958 11:03:50.252336 rx_firspass[1][1][7] = 0
4959 11:03:50.255743 rx_lastpass[1][1][7] = 0
4960 11:03:50.255835 rx_firspass[1][1][8] = 0
4961 11:03:50.258509 rx_lastpass[1][1][8] = 0
4962 11:03:50.262083 rx_firspass[1][1][9] = 0
4963 11:03:50.265492 rx_lastpass[1][1][9] = 0
4964 11:03:50.265590 rx_firspass[1][1][10] = 0
4965 11:03:50.268777 rx_lastpass[1][1][10] = 0
4966 11:03:50.272183 rx_firspass[1][1][11] = 0
4967 11:03:50.272272 rx_lastpass[1][1][11] = 0
4968 11:03:50.275395 rx_firspass[1][1][12] = 0
4969 11:03:50.278765 rx_lastpass[1][1][12] = 0
4970 11:03:50.281958 rx_firspass[1][1][13] = 0
4971 11:03:50.282031 rx_lastpass[1][1][13] = 0
4972 11:03:50.285309 rx_firspass[1][1][14] = 0
4973 11:03:50.288329 rx_lastpass[1][1][14] = 0
4974 11:03:50.288421 rx_firspass[1][1][15] = 0
4975 11:03:50.291732 rx_lastpass[1][1][15] = 0
4976 11:03:50.295096 dump params clk_delay
4977 11:03:50.295194 clk_delay[0] = 0
4978 11:03:50.298281 clk_delay[1] = 0
4979 11:03:50.298374 dump params dqs_delay
4980 11:03:50.302138 dqs_delay[0][0] = 0
4981 11:03:50.302226 dqs_delay[0][1] = 0
4982 11:03:50.305071 dqs_delay[1][0] = 0
4983 11:03:50.305210 dqs_delay[1][1] = 0
4984 11:03:50.308342 dump params delay_cell_unit = 762
4985 11:03:50.311695 mt_set_emi_preloader end
4986 11:03:50.315213 [mt_mem_init] dram size: 0x100000000, rank number: 2
4987 11:03:50.321763 [complex_mem_test] start addr:0x40000000, len:20480
4988 11:03:50.357782 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
4989 11:03:50.364568 [complex_mem_test] start addr:0x80000000, len:20480
4990 11:03:50.399956 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
4991 11:03:50.406992 [complex_mem_test] start addr:0xc0000000, len:20480
4992 11:03:50.442564 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
4993 11:03:50.449114 [complex_mem_test] start addr:0x56000000, len:8192
4994 11:03:50.465827 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
4995 11:03:50.465909 ddr_geometry:1
4996 11:03:50.472556 [complex_mem_test] start addr:0x80000000, len:8192
4997 11:03:50.489425 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
4998 11:03:50.492894 dram_init: dram init end (result: 0)
4999 11:03:50.499728 Successfully loaded DRAM blobs and ran DRAM calibration
5000 11:03:50.509351 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5001 11:03:50.509426 CBMEM:
5002 11:03:50.512929 IMD: root @ 00000000fffff000 254 entries.
5003 11:03:50.516531 IMD: root @ 00000000ffffec00 62 entries.
5004 11:03:50.522533 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5005 11:03:50.529534 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5006 11:03:50.532814 in-header: 03 a1 00 00 08 00 00 00
5007 11:03:50.536223 in-data: 84 60 60 10 00 00 00 00
5008 11:03:50.539739 Chrome EC: clear events_b mask to 0x0000000020004000
5009 11:03:50.546155 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5010 11:03:50.549347 in-header: 03 fd 00 00 00 00 00 00
5011 11:03:50.549425 in-data:
5012 11:03:50.556381 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5013 11:03:50.559828 CBFS @ 21000 size 3d4000
5014 11:03:50.562662 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5015 11:03:50.566385 CBFS: Locating 'fallback/ramstage'
5016 11:03:50.569466 CBFS: Found @ offset 10d40 size d563
5017 11:03:50.591707 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5018 11:03:50.603794 Accumulated console time in romstage 12748 ms
5019 11:03:50.603873
5020 11:03:50.603930
5021 11:03:50.613898 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5022 11:03:50.616894 ARM64: Exception handlers installed.
5023 11:03:50.616969 ARM64: Testing exception
5024 11:03:50.620152 ARM64: Done test exception
5025 11:03:50.623272 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5026 11:03:50.626825 Manufacturer: ef
5027 11:03:50.630290 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5028 11:03:50.636893 WARNING: RO_VPD is uninitialized or empty.
5029 11:03:50.639816 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5030 11:03:50.643044 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5031 11:03:50.654151 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5032 11:03:50.656667 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5033 11:03:50.662994 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5034 11:03:50.663069 Enumerating buses...
5035 11:03:50.669976 Show all devs... Before device enumeration.
5036 11:03:50.670052 Root Device: enabled 1
5037 11:03:50.673063 CPU_CLUSTER: 0: enabled 1
5038 11:03:50.673163 CPU: 00: enabled 1
5039 11:03:50.676492 Compare with tree...
5040 11:03:50.679717 Root Device: enabled 1
5041 11:03:50.679792 CPU_CLUSTER: 0: enabled 1
5042 11:03:50.683141 CPU: 00: enabled 1
5043 11:03:50.683216 Root Device scanning...
5044 11:03:50.686567 root_dev_scan_bus for Root Device
5045 11:03:50.689796 CPU_CLUSTER: 0 enabled
5046 11:03:50.694563 root_dev_scan_bus for Root Device done
5047 11:03:50.696809 scan_bus: scanning of bus Root Device took 10690 usecs
5048 11:03:50.700345 done
5049 11:03:50.703642 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5050 11:03:50.706566 Allocating resources...
5051 11:03:50.706657 Reading resources...
5052 11:03:50.710298 Root Device read_resources bus 0 link: 0
5053 11:03:50.716843 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5054 11:03:50.716938 CPU: 00 missing read_resources
5055 11:03:50.723076 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5056 11:03:50.726904 Root Device read_resources bus 0 link: 0 done
5057 11:03:50.730146 Done reading resources.
5058 11:03:50.733842 Show resources in subtree (Root Device)...After reading.
5059 11:03:50.736792 Root Device child on link 0 CPU_CLUSTER: 0
5060 11:03:50.740039 CPU_CLUSTER: 0 child on link 0 CPU: 00
5061 11:03:50.750442 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5062 11:03:50.750519 CPU: 00
5063 11:03:50.753116 Setting resources...
5064 11:03:50.756336 Root Device assign_resources, bus 0 link: 0
5065 11:03:50.759812 CPU_CLUSTER: 0 missing set_resources
5066 11:03:50.763949 Root Device assign_resources, bus 0 link: 0
5067 11:03:50.766861 Done setting resources.
5068 11:03:50.770128 Show resources in subtree (Root Device)...After assigning values.
5069 11:03:50.776669 Root Device child on link 0 CPU_CLUSTER: 0
5070 11:03:50.779753 CPU_CLUSTER: 0 child on link 0 CPU: 00
5071 11:03:50.787237 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5072 11:03:50.789922 CPU: 00
5073 11:03:50.789998 Done allocating resources.
5074 11:03:50.796996 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5075 11:03:50.797072 Enabling resources...
5076 11:03:50.799982 done.
5077 11:03:50.803635 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5078 11:03:50.806803 Initializing devices...
5079 11:03:50.806878 Root Device init ...
5080 11:03:50.810415 mainboard_init: Starting display init.
5081 11:03:50.813577 ADC[4]: Raw value=76850 ID=0
5082 11:03:50.835685 anx7625_power_on_init: Init interface.
5083 11:03:50.839192 anx7625_disable_pd_protocol: Disabled PD feature.
5084 11:03:50.846043 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5085 11:03:50.892709 anx7625_start_dp_work: Secure OCM version=00
5086 11:03:50.896083 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5087 11:03:50.912694 sp_tx_get_edid_block: EDID Block = 1
5088 11:03:51.030270 Extracted contents:
5089 11:03:51.033539 header: 00 ff ff ff ff ff ff 00
5090 11:03:51.036965 serial number: 06 af 5c 14 00 00 00 00 00 1a
5091 11:03:51.040301 version: 01 04
5092 11:03:51.043265 basic params: 95 1a 0e 78 02
5093 11:03:51.047089 chroma info: 99 85 95 55 56 92 28 22 50 54
5094 11:03:51.050066 established: 00 00 00
5095 11:03:51.056643 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5096 11:03:51.059863 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5097 11:03:51.067031 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5098 11:03:51.073046 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5099 11:03:51.080085 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5100 11:03:51.083617 extensions: 00
5101 11:03:51.083693 checksum: ae
5102 11:03:51.083752
5103 11:03:51.086487 Manufacturer: AUO Model 145c Serial Number 0
5104 11:03:51.089937 Made week 0 of 2016
5105 11:03:51.090012 EDID version: 1.4
5106 11:03:51.093370 Digital display
5107 11:03:51.096848 6 bits per primary color channel
5108 11:03:51.096925 DisplayPort interface
5109 11:03:51.099844 Maximum image size: 26 cm x 14 cm
5110 11:03:51.103534 Gamma: 220%
5111 11:03:51.103622 Check DPMS levels
5112 11:03:51.106564 Supported color formats: RGB 4:4:4
5113 11:03:51.110021 First detailed timing is preferred timing
5114 11:03:51.113095 Established timings supported:
5115 11:03:51.116426 Standard timings supported:
5116 11:03:51.116500 Detailed timings
5117 11:03:51.123213 Hex of detail: ce1d56ea50001a3030204600009010000018
5118 11:03:51.126641 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5119 11:03:51.130500 0556 0586 05a6 0640 hborder 0
5120 11:03:51.133092 0300 0304 030a 031a vborder 0
5121 11:03:51.136397 -hsync -vsync
5122 11:03:51.140178 Did detailed timing
5123 11:03:51.143411 Hex of detail: 0000000f0000000000000000000000000020
5124 11:03:51.146979 Manufacturer-specified data, tag 15
5125 11:03:51.150433 Hex of detail: 000000fe0041554f0a202020202020202020
5126 11:03:51.153664 ASCII string: AUO
5127 11:03:51.156495 Hex of detail: 000000fe004231313658414230312e34200a
5128 11:03:51.160434 ASCII string: B116XAB01.4
5129 11:03:51.160509 Checksum
5130 11:03:51.163231 Checksum: 0xae (valid)
5131 11:03:51.170189 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5132 11:03:51.170265 DSI data_rate: 457800000 bps
5133 11:03:51.177048 anx7625_parse_edid: set default k value to 0x3d for panel
5134 11:03:51.180416 anx7625_parse_edid: pixelclock(76300).
5135 11:03:51.183832 hactive(1366), hsync(32), hfp(48), hbp(154)
5136 11:03:51.187061 vactive(768), vsync(6), vfp(4), vbp(16)
5137 11:03:51.190673 anx7625_dsi_config: config dsi.
5138 11:03:51.198823 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5139 11:03:51.219560 anx7625_dsi_config: success to config DSI
5140 11:03:51.222615 anx7625_dp_start: MIPI phy setup OK.
5141 11:03:51.226381 [SSUSB] Setting up USB HOST controller...
5142 11:03:51.229759 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5143 11:03:51.233279 [SSUSB] phy power-on done.
5144 11:03:51.236700 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5145 11:03:51.239964 in-header: 03 fc 01 00 00 00 00 00
5146 11:03:51.240062 in-data:
5147 11:03:51.243251 handle_proto3_response: EC response with error code: 1
5148 11:03:51.246933 SPM: pcm index = 1
5149 11:03:51.249830 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5150 11:03:51.253747 CBFS @ 21000 size 3d4000
5151 11:03:51.260338 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5152 11:03:51.263421 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5153 11:03:51.266662 CBFS: Found @ offset 1e7c0 size 1026
5154 11:03:51.273551 read SPI 0x3f808 0x1026: 1272 us, 3250 KB/s, 26.000 Mbps
5155 11:03:51.277034 SPM: binary array size = 2988
5156 11:03:51.280093 SPM: version = pcm_allinone_v1.17.2_20180829
5157 11:03:51.283659 SPM binary loaded in 32 msecs
5158 11:03:51.290492 spm_kick_im_to_fetch: ptr = 000000004021eec2
5159 11:03:51.294380 spm_kick_im_to_fetch: len = 2988
5160 11:03:51.294455 SPM: spm_kick_pcm_to_run
5161 11:03:51.297407 SPM: spm_kick_pcm_to_run done
5162 11:03:51.300525 SPM: spm_init done in 52 msecs
5163 11:03:51.304180 Root Device init finished in 494998 usecs
5164 11:03:51.307473 CPU_CLUSTER: 0 init ...
5165 11:03:51.314076 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5166 11:03:51.320486 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5167 11:03:51.324331 CBFS @ 21000 size 3d4000
5168 11:03:51.327344 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5169 11:03:51.330857 CBFS: Locating 'sspm.bin'
5170 11:03:51.334011 CBFS: Found @ offset 208c0 size 41cb
5171 11:03:51.343935 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5172 11:03:51.351469 CPU_CLUSTER: 0 init finished in 42799 usecs
5173 11:03:51.351543 Devices initialized
5174 11:03:51.354844 Show all devs... After init.
5175 11:03:51.358291 Root Device: enabled 1
5176 11:03:51.358365 CPU_CLUSTER: 0: enabled 1
5177 11:03:51.361600 CPU: 00: enabled 1
5178 11:03:51.365026 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5179 11:03:51.369298 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5180 11:03:51.371371 ELOG: NV offset 0x558000 size 0x1000
5181 11:03:51.379644 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5182 11:03:51.385929 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5183 11:03:51.389324 ELOG: Event(17) added with size 13 at 2024-07-10 11:03:51 UTC
5184 11:03:51.392604 out: cmd=0x121: 03 db 21 01 00 00 00 00
5185 11:03:51.396512 in-header: 03 f8 00 00 2c 00 00 00
5186 11:03:51.409326 in-data: b0 47 00 00 00 00 00 00 02 10 00 00 06 80 00 00 dd 69 0a 00 06 80 00 00 1e 2a 15 00 06 80 00 00 8a cd 01 00 06 80 00 00 7a d7 62 00
5187 11:03:51.412488 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5188 11:03:51.416226 in-header: 03 19 00 00 08 00 00 00
5189 11:03:51.419324 in-data: a2 e0 47 00 13 00 00 00
5190 11:03:51.422499 Chrome EC: UHEPI supported
5191 11:03:51.429489 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5192 11:03:51.433375 in-header: 03 e1 00 00 08 00 00 00
5193 11:03:51.435922 in-data: 84 20 60 10 00 00 00 00
5194 11:03:51.439151 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5195 11:03:51.446102 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5196 11:03:51.449482 in-header: 03 e1 00 00 08 00 00 00
5197 11:03:51.453545 in-data: 84 20 60 10 00 00 00 00
5198 11:03:51.459491 ELOG: Event(A1) added with size 10 at 2024-07-10 11:03:51 UTC
5199 11:03:51.465988 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5200 11:03:51.469743 ELOG: Event(A0) added with size 9 at 2024-07-10 11:03:51 UTC
5201 11:03:51.472432 elog_add_boot_reason: Logged dev mode boot
5202 11:03:51.476033 Finalize devices...
5203 11:03:51.479081 Devices finalized
5204 11:03:51.483439 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5205 11:03:51.486369 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5206 11:03:51.492503 ELOG: Event(91) added with size 10 at 2024-07-10 11:03:51 UTC
5207 11:03:51.495978 Writing coreboot table at 0xffeda000
5208 11:03:51.499371 0. 0000000000114000-000000000011efff: RAMSTAGE
5209 11:03:51.506096 1. 0000000040000000-000000004023cfff: RAMSTAGE
5210 11:03:51.509549 2. 000000004023d000-00000000545fffff: RAM
5211 11:03:51.512879 3. 0000000054600000-000000005465ffff: BL31
5212 11:03:51.516307 4. 0000000054660000-00000000ffed9fff: RAM
5213 11:03:51.522664 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5214 11:03:51.525871 6. 0000000100000000-000000013fffffff: RAM
5215 11:03:51.525964 Passing 5 GPIOs to payload:
5216 11:03:51.532737 NAME | PORT | POLARITY | VALUE
5217 11:03:51.535901 write protect | 0x00000096 | low | high
5218 11:03:51.542448 EC in RW | 0x000000b1 | high | undefined
5219 11:03:51.546122 EC interrupt | 0x00000097 | low | undefined
5220 11:03:51.549043 TPM interrupt | 0x00000099 | high | undefined
5221 11:03:51.556059 speaker enable | 0x000000af | high | undefined
5222 11:03:51.559122 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5223 11:03:51.562706 in-header: 03 f7 00 00 02 00 00 00
5224 11:03:51.562795 in-data: 04 00
5225 11:03:51.566278 Board ID: 4
5226 11:03:51.568938 ADC[3]: Raw value=1033918 ID=8
5227 11:03:51.569026 RAM code: 8
5228 11:03:51.569117 SKU ID: 16
5229 11:03:51.572951 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5230 11:03:51.575760 CBFS @ 21000 size 3d4000
5231 11:03:51.582668 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5232 11:03:51.589202 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 7103
5233 11:03:51.589351 coreboot table: 940 bytes.
5234 11:03:51.592134 IMD ROOT 0. 00000000fffff000 00001000
5235 11:03:51.599142 IMD SMALL 1. 00000000ffffe000 00001000
5236 11:03:51.602764 CONSOLE 2. 00000000fffde000 00020000
5237 11:03:51.605510 FMAP 3. 00000000fffdd000 0000047c
5238 11:03:51.608948 TIME STAMP 4. 00000000fffdc000 00000910
5239 11:03:51.612424 RAMOOPS 5. 00000000ffedc000 00100000
5240 11:03:51.615906 COREBOOT 6. 00000000ffeda000 00002000
5241 11:03:51.615998 IMD small region:
5242 11:03:51.622407 IMD ROOT 0. 00000000ffffec00 00000400
5243 11:03:51.625783 VBOOT WORK 1. 00000000ffffeb00 00000100
5244 11:03:51.629129 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5245 11:03:51.632488 VPD 3. 00000000ffffea60 0000006c
5246 11:03:51.636002 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5247 11:03:51.642134 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5248 11:03:51.645736 in-header: 03 e1 00 00 08 00 00 00
5249 11:03:51.648836 in-data: 84 20 60 10 00 00 00 00
5250 11:03:51.655861 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5251 11:03:51.655964 CBFS @ 21000 size 3d4000
5252 11:03:51.662342 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5253 11:03:51.665679 CBFS: Locating 'fallback/payload'
5254 11:03:51.673716 CBFS: Found @ offset dc040 size 439a0
5255 11:03:51.761453 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5256 11:03:51.764523 Checking segment from ROM address 0x0000000040003a00
5257 11:03:51.771291 Checking segment from ROM address 0x0000000040003a1c
5258 11:03:51.774573 Loading segment from ROM address 0x0000000040003a00
5259 11:03:51.778079 code (compression=0)
5260 11:03:51.784927 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5261 11:03:51.794585 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5262 11:03:51.798116 it's not compressed!
5263 11:03:51.801265 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5264 11:03:51.807953 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5265 11:03:51.815357 Loading segment from ROM address 0x0000000040003a1c
5266 11:03:51.819356 Entry Point 0x0000000080000000
5267 11:03:51.819430 Loaded segments
5268 11:03:51.825504 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5269 11:03:51.829079 Jumping to boot code at 0000000080000000(00000000ffeda000)
5270 11:03:51.838844 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5271 11:03:51.842104 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5272 11:03:51.845182 CBFS @ 21000 size 3d4000
5273 11:03:51.852158 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5274 11:03:51.856038 CBFS: Locating 'fallback/bl31'
5275 11:03:51.858599 CBFS: Found @ offset 36dc0 size 5820
5276 11:03:51.869970 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5277 11:03:51.874113 Checking segment from ROM address 0x0000000040003a00
5278 11:03:51.879691 Checking segment from ROM address 0x0000000040003a1c
5279 11:03:51.882995 Loading segment from ROM address 0x0000000040003a00
5280 11:03:51.886382 code (compression=1)
5281 11:03:51.892898 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5282 11:03:51.902823 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5283 11:03:51.902900 using LZMA
5284 11:03:51.911292 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5285 11:03:51.918374 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5286 11:03:51.921451 Loading segment from ROM address 0x0000000040003a1c
5287 11:03:51.924971 Entry Point 0x0000000054601000
5288 11:03:51.925047 Loaded segments
5289 11:03:51.928218 NOTICE: MT8183 bl31_setup
5290 11:03:51.934928 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5291 11:03:51.938511 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5292 11:03:51.942078 INFO: [DEVAPC] dump DEVAPC registers:
5293 11:03:51.951976 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5294 11:03:51.958299 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5295 11:03:51.968277 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5296 11:03:51.975396 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5297 11:03:51.985260 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5298 11:03:51.991749 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5299 11:03:52.001517 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5300 11:03:52.008654 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5301 11:03:52.015409 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5302 11:03:52.025540 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5303 11:03:52.031792 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5304 11:03:52.042007 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5305 11:03:52.048547 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5306 11:03:52.055331 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5307 11:03:52.064691 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5308 11:03:52.071785 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5309 11:03:52.078072 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5310 11:03:52.085015 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5311 11:03:52.091952 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5312 11:03:52.101687 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5313 11:03:52.108185 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5314 11:03:52.115167 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5315 11:03:52.118427 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5316 11:03:52.121629 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5317 11:03:52.125123 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5318 11:03:52.128513 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5319 11:03:52.131983 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5320 11:03:52.138350 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5321 11:03:52.142272 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5322 11:03:52.145101 WARNING: region 0:
5323 11:03:52.148440 WARNING: apc:0x168, sa:0x0, ea:0xfff
5324 11:03:52.148539 WARNING: region 1:
5325 11:03:52.154882 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5326 11:03:52.154957 WARNING: region 2:
5327 11:03:52.158137 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5328 11:03:52.161452 WARNING: region 3:
5329 11:03:52.164908 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5330 11:03:52.164982 WARNING: region 4:
5331 11:03:52.168217 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5332 11:03:52.171789 WARNING: region 5:
5333 11:03:52.175047 WARNING: apc:0x0, sa:0x0, ea:0x0
5334 11:03:52.175122 WARNING: region 6:
5335 11:03:52.178422 WARNING: apc:0x0, sa:0x0, ea:0x0
5336 11:03:52.181747 WARNING: region 7:
5337 11:03:52.185014 WARNING: apc:0x0, sa:0x0, ea:0x0
5338 11:03:52.191957 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5339 11:03:52.194961 INFO: SPM: enable SPMC mode
5340 11:03:52.198160 NOTICE: spm_boot_init() start
5341 11:03:52.198236 NOTICE: spm_boot_init() end
5342 11:03:52.204684 INFO: BL31: Initializing runtime services
5343 11:03:52.208231 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5344 11:03:52.214687 INFO: BL31: Preparing for EL3 exit to normal world
5345 11:03:52.218022 INFO: Entry point address = 0x80000000
5346 11:03:52.218097 INFO: SPSR = 0x8
5347 11:03:52.241704
5348 11:03:52.241779
5349 11:03:52.241837
5350 11:03:52.242298 end: 2.2.3 depthcharge-start (duration 00:00:24) [common]
5351 11:03:52.242389 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5352 11:03:52.242462 Setting prompt string to ['jacuzzi:']
5353 11:03:52.242527 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5354 11:03:52.245053 Starting depthcharge on Juniper...
5355 11:03:52.245128
5356 11:03:52.248187 vboot_handoff: creating legacy vboot_handoff structure
5357 11:03:52.248262
5358 11:03:52.251544 ec_init(0): CrosEC protocol v3 supported (544, 544)
5359 11:03:52.251619
5360 11:03:52.255143 Wipe memory regions:
5361 11:03:52.255217
5362 11:03:52.258300 [0x00000040000000, 0x00000054600000)
5363 11:03:52.301042
5364 11:03:52.301125 [0x00000054660000, 0x00000080000000)
5365 11:03:52.393198
5366 11:03:52.393290 [0x000000811994a0, 0x000000ffeda000)
5367 11:03:52.652632
5368 11:03:52.652760 [0x00000100000000, 0x00000140000000)
5369 11:03:52.785025
5370 11:03:52.788456 Initializing XHCI USB controller at 0x11200000.
5371 11:03:52.811961
5372 11:03:52.815045 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5373 11:03:52.815126
5374 11:03:52.815185
5375 11:03:52.815442 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5376 11:03:52.815520 Sending line: 'tftpboot 192.168.201.1 14786786/tftp-deploy-6cc153ad/kernel/image.itb 14786786/tftp-deploy-6cc153ad/kernel/cmdline '
5378 11:03:52.915945 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5379 11:03:52.916021 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:27)
5380 11:03:52.919953 jacuzzi: tftpboot 192.168.201.1 14786786/tftp-deploy-6cc153ad/kernel/image.ittp-deploy-6cc153ad/kernel/cmdline
5381 11:03:52.920031
5382 11:03:52.920089 Waiting for link
5383 11:03:53.325134
5384 11:03:53.325279 R8152: Initializing
5385 11:03:53.325339
5386 11:03:53.328721 Version 9 (ocp_data = 6010)
5387 11:03:53.328797
5388 11:03:53.331945 R8152: Done initializing
5389 11:03:53.332020
5390 11:03:53.332077 Adding net device
5391 11:03:53.717341
5392 11:03:53.717456 done.
5393 11:03:53.717514
5394 11:03:53.717569 MAC: 00:e0:4c:71:a7:1f
5395 11:03:53.717620
5396 11:03:53.720568 Sending DHCP discover... done.
5397 11:03:53.720644
5398 11:03:53.723963 Waiting for reply... done.
5399 11:03:53.724039
5400 11:03:53.727483 Sending DHCP request... done.
5401 11:03:53.727559
5402 11:03:53.727617 Waiting for reply... done.
5403 11:03:53.727672
5404 11:03:53.730490 My ip is 192.168.201.23
5405 11:03:53.730566
5406 11:03:53.733944 The DHCP server ip is 192.168.201.1
5407 11:03:53.734019
5408 11:03:53.737120 TFTP server IP predefined by user: 192.168.201.1
5409 11:03:53.737219
5410 11:03:53.744352 Bootfile predefined by user: 14786786/tftp-deploy-6cc153ad/kernel/image.itb
5411 11:03:53.744429
5412 11:03:53.747394 Sending tftp read request... done.
5413 11:03:53.747470
5414 11:03:53.750497 Waiting for the transfer...
5415 11:03:53.750574
5416 11:03:54.000206 00000000 ################################################################
5417 11:03:54.000325
5418 11:03:54.257497 00080000 ################################################################
5419 11:03:54.257617
5420 11:03:54.512905 00100000 ################################################################
5421 11:03:54.513028
5422 11:03:54.761792 00180000 ################################################################
5423 11:03:54.761911
5424 11:03:55.018999 00200000 ################################################################
5425 11:03:55.019140
5426 11:03:55.272109 00280000 ################################################################
5427 11:03:55.272227
5428 11:03:55.528796 00300000 ################################################################
5429 11:03:55.528945
5430 11:03:55.786801 00380000 ################################################################
5431 11:03:55.786919
5432 11:03:56.038757 00400000 ################################################################
5433 11:03:56.038880
5434 11:03:56.301686 00480000 ################################################################
5435 11:03:56.301814
5436 11:03:56.562991 00500000 ################################################################
5437 11:03:56.563113
5438 11:03:56.822873 00580000 ################################################################
5439 11:03:56.822991
5440 11:03:57.087947 00600000 ################################################################
5441 11:03:57.088104
5442 11:03:57.341980 00680000 ################################################################
5443 11:03:57.342112
5444 11:03:57.602256 00700000 ################################################################
5445 11:03:57.602390
5446 11:03:57.861623 00780000 ################################################################
5447 11:03:57.861746
5448 11:03:58.115150 00800000 ################################################################
5449 11:03:58.115261
5450 11:03:58.385779 00880000 ################################################################
5451 11:03:58.385897
5452 11:03:58.672745 00900000 ################################################################
5453 11:03:58.672891
5454 11:03:58.951865 00980000 ################################################################
5455 11:03:58.952007
5456 11:03:59.232903 00a00000 ################################################################
5457 11:03:59.233053
5458 11:03:59.517733 00a80000 ################################################################
5459 11:03:59.517858
5460 11:03:59.804397 00b00000 ################################################################
5461 11:03:59.804516
5462 11:04:00.091167 00b80000 ################################################################
5463 11:04:00.091288
5464 11:04:00.377399 00c00000 ################################################################
5465 11:04:00.377507
5466 11:04:00.646318 00c80000 ################################################################
5467 11:04:00.646429
5468 11:04:00.898270 00d00000 ################################################################
5469 11:04:00.898379
5470 11:04:01.152987 00d80000 ################################################################
5471 11:04:01.153127
5472 11:04:01.432807 00e00000 ################################################################
5473 11:04:01.432918
5474 11:04:01.696147 00e80000 ################################################################
5475 11:04:01.696257
5476 11:04:01.959239 00f00000 ################################################################
5477 11:04:01.959351
5478 11:04:02.214072 00f80000 ################################################################
5479 11:04:02.214185
5480 11:04:02.464617 01000000 ################################################################
5481 11:04:02.464738
5482 11:04:02.715880 01080000 ################################################################
5483 11:04:02.716004
5484 11:04:02.968588 01100000 ################################################################
5485 11:04:02.968695
5486 11:04:03.221944 01180000 ################################################################
5487 11:04:03.222051
5488 11:04:03.491520 01200000 ################################################################
5489 11:04:03.491634
5490 11:04:03.745619 01280000 ################################################################
5491 11:04:03.745741
5492 11:04:03.998188 01300000 ################################################################
5493 11:04:03.998300
5494 11:04:04.259202 01380000 ################################################################
5495 11:04:04.259320
5496 11:04:04.516588 01400000 ################################################################
5497 11:04:04.516697
5498 11:04:04.801913 01480000 ################################################################
5499 11:04:04.802040
5500 11:04:05.079765 01500000 ################################################################
5501 11:04:05.079886
5502 11:04:05.348468 01580000 ################################################################
5503 11:04:05.348581
5504 11:04:05.599656 01600000 ################################################################
5505 11:04:05.599767
5506 11:04:05.868758 01680000 ################################################################
5507 11:04:05.868871
5508 11:04:06.126622 01700000 ################################################################
5509 11:04:06.126736
5510 11:04:06.377152 01780000 ################################################################
5511 11:04:06.377278
5512 11:04:06.627224 01800000 ################################################################
5513 11:04:06.627342
5514 11:04:06.898776 01880000 ################################################################
5515 11:04:06.898898
5516 11:04:07.180645 01900000 ################################################################
5517 11:04:07.180759
5518 11:04:07.441911 01980000 ################################################################
5519 11:04:07.442038
5520 11:04:07.695082 01a00000 ################################################################
5521 11:04:07.695204
5522 11:04:07.970586 01a80000 ################################################################
5523 11:04:07.970727
5524 11:04:08.256295 01b00000 ################################################################
5525 11:04:08.256412
5526 11:04:08.518613 01b80000 ################################################################
5527 11:04:08.518739
5528 11:04:08.800133 01c00000 ################################################################
5529 11:04:08.800254
5530 11:04:09.086624 01c80000 ################################################################
5531 11:04:09.086749
5532 11:04:09.357024 01d00000 ################################################################
5533 11:04:09.357169
5534 11:04:09.635165 01d80000 ################################################################
5535 11:04:09.635276
5536 11:04:09.868979 01e00000 ##################################################### done.
5537 11:04:09.869102
5538 11:04:09.872534 The bootfile was 31885910 bytes long.
5539 11:04:09.872611
5540 11:04:09.875767 Sending tftp read request... done.
5541 11:04:09.875844
5542 11:04:09.879155 Waiting for the transfer...
5543 11:04:09.879231
5544 11:04:09.879289 00000000 # done.
5545 11:04:09.879345
5546 11:04:09.889407 Command line loaded dynamically from TFTP file: 14786786/tftp-deploy-6cc153ad/kernel/cmdline
5547 11:04:09.889485
5548 11:04:09.912371 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14786786/extract-nfsrootfs-74nf38jf,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5549 11:04:09.912451
5550 11:04:09.915944 Loading FIT.
5551 11:04:09.916019
5552 11:04:09.919375 Image ramdisk-1 has 18709913 bytes.
5553 11:04:09.919451
5554 11:04:09.919509 Image fdt-1 has 57695 bytes.
5555 11:04:09.919563
5556 11:04:09.922891 Image kernel-1 has 13116259 bytes.
5557 11:04:09.922966
5558 11:04:09.933017 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5559 11:04:09.933094
5560 11:04:09.946388 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5561 11:04:09.946466
5562 11:04:09.950191 Choosing best match conf-1 for compat google,juniper-sku16.
5563 11:04:09.954114
5564 11:04:09.958761 Connected to device vid:did:rid of 1ae0:0028:00
5565 11:04:09.966851
5566 11:04:09.970463 tpm_get_response: command 0x17b, return code 0x0
5567 11:04:09.970538
5568 11:04:09.973547 tpm_cleanup: add release locality here.
5569 11:04:09.973622
5570 11:04:09.976991 Shutting down all USB controllers.
5571 11:04:09.977067
5572 11:04:09.980132 Removing current net device
5573 11:04:09.980207
5574 11:04:09.983722 Exiting depthcharge with code 4 at timestamp: 34017853
5575 11:04:09.983797
5576 11:04:09.987152 LZMA decompressing kernel-1 to 0x80193568
5577 11:04:09.987226
5578 11:04:09.990280 LZMA decompressing kernel-1 to 0x40000000
5579 11:04:11.856837
5580 11:04:11.856963 jumping to kernel
5581 11:04:11.857398 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
5582 11:04:11.857488 start: 2.2.5 auto-login-action (timeout 00:04:08) [common]
5583 11:04:11.857555 Setting prompt string to ['Linux version [0-9]']
5584 11:04:11.857615 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5585 11:04:11.857715 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5586 11:04:11.931521
5587 11:04:11.934906 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5588 11:04:11.938645 start: 2.2.5.1 login-action (timeout 00:04:08) [common]
5589 11:04:11.938734 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5590 11:04:11.938799 Setting prompt string to []
5591 11:04:11.938869 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5592 11:04:11.938930 Using line separator: #'\n'#
5593 11:04:11.938981 No login prompt set.
5594 11:04:11.939035 Parsing kernel messages
5595 11:04:11.939083 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5596 11:04:11.939174 [login-action] Waiting for messages, (timeout 00:04:08)
5597 11:04:11.939234 Waiting using forced prompt support (timeout 00:02:04)
5598 11:04:11.957796 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j261272-arm64-gcc-12-defconfig-arm64-chromebook-bgdbp) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Wed Jul 10 10:43:20 UTC 2024
5599 11:04:11.961571 [ 0.000000] random: crng init done
5600 11:04:11.964979 [ 0.000000] Machine model: Google juniper sku16 board
5601 11:04:11.967683 [ 0.000000] efi: UEFI not found.
5602 11:04:11.978773 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5603 11:04:11.984975 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5604 11:04:11.991948 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5605 11:04:11.998144 [ 0.000000] printk: bootconsole [mtk8250] enabled
5606 11:04:12.005589 [ 0.000000] NUMA: No NUMA configuration found
5607 11:04:12.012101 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5608 11:04:12.018370 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5609 11:04:12.018444 [ 0.000000] Zone ranges:
5610 11:04:12.025522 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5611 11:04:12.028438 [ 0.000000] DMA32 empty
5612 11:04:12.035255 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5613 11:04:12.038544 [ 0.000000] Movable zone start for each node
5614 11:04:12.042163 [ 0.000000] Early memory node ranges
5615 11:04:12.048757 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5616 11:04:12.055288 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5617 11:04:12.061824 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5618 11:04:12.068756 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5619 11:04:12.075555 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5620 11:04:12.081916 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5621 11:04:12.102666 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5622 11:04:12.108796 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5623 11:04:12.115204 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5624 11:04:12.118982 [ 0.000000] psci: probing for conduit method from DT.
5625 11:04:12.125085 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5626 11:04:12.128756 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5627 11:04:12.135414 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5628 11:04:12.138949 [ 0.000000] psci: SMC Calling Convention v1.1
5629 11:04:12.145979 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5630 11:04:12.148643 [ 0.000000] Detected VIPT I-cache on CPU0
5631 11:04:12.156130 [ 0.000000] CPU features: detected: GIC system register CPU interface
5632 11:04:12.162506 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5633 11:04:12.168940 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5634 11:04:12.172280 [ 0.000000] CPU features: detected: ARM erratum 845719
5635 11:04:12.179026 [ 0.000000] alternatives: applying boot alternatives
5636 11:04:12.182066 [ 0.000000] Fallback order for Node 0: 0
5637 11:04:12.189417 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5638 11:04:12.192382 [ 0.000000] Policy zone: Normal
5639 11:04:12.218972 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14786786/extract-nfsrootfs-74nf38jf,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5640 11:04:12.231923 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5641 11:04:12.241945 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5642 11:04:12.248640 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5643 11:04:12.255293 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5644 11:04:12.262140 <6>[ 0.000000] software IO TLB: area num 8.
5645 11:04:12.286018 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5646 11:04:12.344710 <6>[ 0.000000] Memory: 3896800K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 261664K reserved, 32768K cma-reserved)
5647 11:04:12.351350 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5648 11:04:12.358165 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5649 11:04:12.361492 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5650 11:04:12.368213 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5651 11:04:12.374216 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5652 11:04:12.378153 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5653 11:04:12.387869 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5654 11:04:12.394533 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5655 11:04:12.397651 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5656 11:04:12.409328 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5657 11:04:12.415880 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5658 11:04:12.419267 <6>[ 0.000000] GICv3: 640 SPIs implemented
5659 11:04:12.423062 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5660 11:04:12.429243 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5661 11:04:12.432790 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5662 11:04:12.439405 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5663 11:04:12.449400 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5664 11:04:12.462889 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5665 11:04:12.469469 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5666 11:04:12.481194 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5667 11:04:12.494308 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5668 11:04:12.501037 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5669 11:04:12.508156 <6>[ 0.009464] Console: colour dummy device 80x25
5670 11:04:12.511342 <6>[ 0.014498] printk: console [tty1] enabled
5671 11:04:12.521507 <6>[ 0.018890] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5672 11:04:12.527957 <6>[ 0.029355] pid_max: default: 32768 minimum: 301
5673 11:04:12.531463 <6>[ 0.034236] LSM: Security Framework initializing
5674 11:04:12.541011 <6>[ 0.039152] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5675 11:04:12.548130 <6>[ 0.046775] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5676 11:04:12.554526 <4>[ 0.055651] cacheinfo: Unable to detect cache hierarchy for CPU 0
5677 11:04:12.564656 <6>[ 0.062277] cblist_init_generic: Setting adjustable number of callback queues.
5678 11:04:12.571193 <6>[ 0.069723] cblist_init_generic: Setting shift to 3 and lim to 1.
5679 11:04:12.578070 <6>[ 0.076076] cblist_init_generic: Setting adjustable number of callback queues.
5680 11:04:12.584592 <6>[ 0.083521] cblist_init_generic: Setting shift to 3 and lim to 1.
5681 11:04:12.588052 <6>[ 0.089920] rcu: Hierarchical SRCU implementation.
5682 11:04:12.594432 <6>[ 0.094947] rcu: Max phase no-delay instances is 1000.
5683 11:04:12.601149 <6>[ 0.102851] EFI services will not be available.
5684 11:04:12.605117 <6>[ 0.107800] smp: Bringing up secondary CPUs ...
5685 11:04:12.615710 <6>[ 0.113061] Detected VIPT I-cache on CPU1
5686 11:04:12.621849 <4>[ 0.113107] cacheinfo: Unable to detect cache hierarchy for CPU 1
5687 11:04:12.628546 <6>[ 0.113115] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5688 11:04:12.635497 <6>[ 0.113147] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5689 11:04:12.638433 <6>[ 0.113629] Detected VIPT I-cache on CPU2
5690 11:04:12.645411 <4>[ 0.113662] cacheinfo: Unable to detect cache hierarchy for CPU 2
5691 11:04:12.651671 <6>[ 0.113667] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5692 11:04:12.658592 <6>[ 0.113678] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5693 11:04:12.661702 <6>[ 0.114125] Detected VIPT I-cache on CPU3
5694 11:04:12.668828 <4>[ 0.114156] cacheinfo: Unable to detect cache hierarchy for CPU 3
5695 11:04:12.674962 <6>[ 0.114161] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5696 11:04:12.681821 <6>[ 0.114172] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5697 11:04:12.688117 <6>[ 0.114746] CPU features: detected: Spectre-v2
5698 11:04:12.691370 <6>[ 0.114756] CPU features: detected: Spectre-BHB
5699 11:04:12.698202 <6>[ 0.114760] CPU features: detected: ARM erratum 858921
5700 11:04:12.701730 <6>[ 0.114765] Detected VIPT I-cache on CPU4
5701 11:04:12.708033 <4>[ 0.114813] cacheinfo: Unable to detect cache hierarchy for CPU 4
5702 11:04:12.714749 <6>[ 0.114821] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5703 11:04:12.721675 <6>[ 0.114829] arch_timer: Enabling local workaround for ARM erratum 858921
5704 11:04:12.728196 <6>[ 0.114839] arch_timer: CPU4: Trapping CNTVCT access
5705 11:04:12.734401 <6>[ 0.114847] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5706 11:04:12.738171 <6>[ 0.115333] Detected VIPT I-cache on CPU5
5707 11:04:12.744960 <4>[ 0.115374] cacheinfo: Unable to detect cache hierarchy for CPU 5
5708 11:04:12.751448 <6>[ 0.115379] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5709 11:04:12.757847 <6>[ 0.115386] arch_timer: Enabling local workaround for ARM erratum 858921
5710 11:04:12.764447 <6>[ 0.115392] arch_timer: CPU5: Trapping CNTVCT access
5711 11:04:12.771685 <6>[ 0.115397] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5712 11:04:12.774899 <6>[ 0.115933] Detected VIPT I-cache on CPU6
5713 11:04:12.781608 <4>[ 0.115979] cacheinfo: Unable to detect cache hierarchy for CPU 6
5714 11:04:12.788009 <6>[ 0.115986] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5715 11:04:12.795021 <6>[ 0.115992] arch_timer: Enabling local workaround for ARM erratum 858921
5716 11:04:12.801239 <6>[ 0.115998] arch_timer: CPU6: Trapping CNTVCT access
5717 11:04:12.808224 <6>[ 0.116003] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5718 11:04:12.811172 <6>[ 0.116533] Detected VIPT I-cache on CPU7
5719 11:04:12.818264 <4>[ 0.116576] cacheinfo: Unable to detect cache hierarchy for CPU 7
5720 11:04:12.824905 <6>[ 0.116582] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5721 11:04:12.831709 <6>[ 0.116589] arch_timer: Enabling local workaround for ARM erratum 858921
5722 11:04:12.838386 <6>[ 0.116596] arch_timer: CPU7: Trapping CNTVCT access
5723 11:04:12.844691 <6>[ 0.116601] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5724 11:04:12.847815 <6>[ 0.116648] smp: Brought up 1 node, 8 CPUs
5725 11:04:12.854662 <6>[ 0.355523] SMP: Total of 8 processors activated.
5726 11:04:12.858191 <6>[ 0.360458] CPU features: detected: 32-bit EL0 Support
5727 11:04:12.864755 <6>[ 0.365829] CPU features: detected: 32-bit EL1 Support
5728 11:04:12.871244 <6>[ 0.371195] CPU features: detected: CRC32 instructions
5729 11:04:12.874924 <6>[ 0.376622] CPU: All CPU(s) started at EL2
5730 11:04:12.881599 <6>[ 0.380960] alternatives: applying system-wide alternatives
5731 11:04:12.884644 <6>[ 0.388965] devtmpfs: initialized
5732 11:04:12.900055 <6>[ 0.397936] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5733 11:04:12.909711 <6>[ 0.407885] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5734 11:04:12.913105 <6>[ 0.415609] pinctrl core: initialized pinctrl subsystem
5735 11:04:12.921225 <6>[ 0.422711] DMI not present or invalid.
5736 11:04:12.928084 <6>[ 0.427084] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5737 11:04:12.934623 <6>[ 0.433990] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5738 11:04:12.944658 <6>[ 0.441517] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5739 11:04:12.951183 <6>[ 0.449769] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5740 11:04:12.957583 <6>[ 0.457945] audit: initializing netlink subsys (disabled)
5741 11:04:12.964409 <5>[ 0.463651] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5742 11:04:12.971411 <6>[ 0.464625] thermal_sys: Registered thermal governor 'step_wise'
5743 11:04:12.977783 <6>[ 0.471617] thermal_sys: Registered thermal governor 'power_allocator'
5744 11:04:12.981035 <6>[ 0.477917] cpuidle: using governor menu
5745 11:04:12.988007 <6>[ 0.488880] NET: Registered PF_QIPCRTR protocol family
5746 11:04:12.994876 <6>[ 0.494376] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5747 11:04:13.001338 <6>[ 0.501478] ASID allocator initialised with 32768 entries
5748 11:04:13.004376 <6>[ 0.508256] Serial: AMBA PL011 UART driver
5749 11:04:13.018144 <4>[ 0.519600] Trying to register duplicate clock ID: 113
5750 11:04:13.078243 <6>[ 0.576272] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5751 11:04:13.092801 <6>[ 0.590658] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5752 11:04:13.096113 <6>[ 0.600434] KASLR enabled
5753 11:04:13.110208 <6>[ 0.608399] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5754 11:04:13.117092 <6>[ 0.615401] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5755 11:04:13.123313 <6>[ 0.621878] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5756 11:04:13.130307 <6>[ 0.628869] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5757 11:04:13.136949 <6>[ 0.635342] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5758 11:04:13.143567 <6>[ 0.642331] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5759 11:04:13.150292 <6>[ 0.648805] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5760 11:04:13.157237 <6>[ 0.655796] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5761 11:04:13.160286 <6>[ 0.663364] ACPI: Interpreter disabled.
5762 11:04:13.169620 <6>[ 0.671342] iommu: Default domain type: Translated
5763 11:04:13.176449 <6>[ 0.676451] iommu: DMA domain TLB invalidation policy: strict mode
5764 11:04:13.179570 <5>[ 0.683082] SCSI subsystem initialized
5765 11:04:13.186733 <6>[ 0.687492] usbcore: registered new interface driver usbfs
5766 11:04:13.193126 <6>[ 0.693219] usbcore: registered new interface driver hub
5767 11:04:13.196365 <6>[ 0.698761] usbcore: registered new device driver usb
5768 11:04:13.203450 <6>[ 0.705064] pps_core: LinuxPPS API ver. 1 registered
5769 11:04:13.213533 <6>[ 0.710249] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5770 11:04:13.217103 <6>[ 0.719573] PTP clock support registered
5771 11:04:13.220715 <6>[ 0.723824] EDAC MC: Ver: 3.0.0
5772 11:04:13.228362 <6>[ 0.729457] FPGA manager framework
5773 11:04:13.231365 <6>[ 0.733142] Advanced Linux Sound Architecture Driver Initialized.
5774 11:04:13.234907 <6>[ 0.739900] vgaarb: loaded
5775 11:04:13.241935 <6>[ 0.743037] clocksource: Switched to clocksource arch_sys_counter
5776 11:04:13.248466 <5>[ 0.749473] VFS: Disk quotas dquot_6.6.0
5777 11:04:13.254899 <6>[ 0.753651] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5778 11:04:13.258385 <6>[ 0.760828] pnp: PnP ACPI: disabled
5779 11:04:13.266903 <6>[ 0.767726] NET: Registered PF_INET protocol family
5780 11:04:13.273085 <6>[ 0.772956] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5781 11:04:13.284625 <6>[ 0.782870] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5782 11:04:13.294774 <6>[ 0.791624] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5783 11:04:13.301216 <6>[ 0.799575] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5784 11:04:13.307741 <6>[ 0.807807] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5785 11:04:13.314715 <6>[ 0.815900] TCP: Hash tables configured (established 32768 bind 32768)
5786 11:04:13.324472 <6>[ 0.822730] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5787 11:04:13.331437 <6>[ 0.829702] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5788 11:04:13.338133 <6>[ 0.837183] NET: Registered PF_UNIX/PF_LOCAL protocol family
5789 11:04:13.344439 <6>[ 0.843284] RPC: Registered named UNIX socket transport module.
5790 11:04:13.347782 <6>[ 0.849428] RPC: Registered udp transport module.
5791 11:04:13.351489 <6>[ 0.854354] RPC: Registered tcp transport module.
5792 11:04:13.358194 <6>[ 0.859278] RPC: Registered tcp NFSv4.1 backchannel transport module.
5793 11:04:13.364700 <6>[ 0.865930] PCI: CLS 0 bytes, default 64
5794 11:04:13.367876 <6>[ 0.870213] Unpacking initramfs...
5795 11:04:13.381454 <6>[ 0.879679] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5796 11:04:13.391902 <6>[ 0.888304] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5797 11:04:13.395059 <6>[ 0.897153] kvm [1]: IPA Size Limit: 40 bits
5798 11:04:13.402033 <6>[ 0.903482] kvm [1]: vgic-v2@c420000
5799 11:04:13.405076 <6>[ 0.907298] kvm [1]: GIC system register CPU interface enabled
5800 11:04:13.411786 <6>[ 0.913467] kvm [1]: vgic interrupt IRQ18
5801 11:04:13.415251 <6>[ 0.917829] kvm [1]: Hyp mode initialized successfully
5802 11:04:13.423139 <5>[ 0.924080] Initialise system trusted keyrings
5803 11:04:13.429023 <6>[ 0.928911] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5804 11:04:13.437096 <6>[ 0.938737] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5805 11:04:13.444001 <5>[ 0.945243] NFS: Registering the id_resolver key type
5806 11:04:13.447026 <5>[ 0.950556] Key type id_resolver registered
5807 11:04:13.453984 <5>[ 0.954973] Key type id_legacy registered
5808 11:04:13.460694 <6>[ 0.959281] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5809 11:04:13.467086 <6>[ 0.966203] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5810 11:04:13.474389 <6>[ 0.973962] 9p: Installing v9fs 9p2000 file system support
5811 11:04:13.500936 <5>[ 1.002464] Key type asymmetric registered
5812 11:04:13.504243 <5>[ 1.006806] Asymmetric key parser 'x509' registered
5813 11:04:13.514263 <6>[ 1.011960] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5814 11:04:13.517456 <6>[ 1.019575] io scheduler mq-deadline registered
5815 11:04:13.520747 <6>[ 1.024337] io scheduler kyber registered
5816 11:04:13.543585 <6>[ 1.045054] EINJ: ACPI disabled.
5817 11:04:13.550594 <4>[ 1.048811] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5818 11:04:13.588293 <6>[ 1.089730] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5819 11:04:13.596756 <6>[ 1.098215] printk: console [ttyS0] disabled
5820 11:04:13.625063 <6>[ 1.122872] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5821 11:04:13.631483 <6>[ 1.132346] printk: console [ttyS0] enabled
5822 11:04:13.634891 <6>[ 1.132346] printk: console [ttyS0] enabled
5823 11:04:13.641473 <6>[ 1.141269] printk: bootconsole [mtk8250] disabled
5824 11:04:13.645024 <6>[ 1.141269] printk: bootconsole [mtk8250] disabled
5825 11:04:13.654936 <3>[ 1.151801] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5826 11:04:13.661679 <3>[ 1.160183] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5827 11:04:13.690439 <6>[ 1.188592] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5828 11:04:13.696943 <6>[ 1.198249] serial serial0: tty port ttyS1 registered
5829 11:04:13.703835 <6>[ 1.204821] SuperH (H)SCI(F) driver initialized
5830 11:04:13.707100 <6>[ 1.210322] msm_serial: driver initialized
5831 11:04:13.722720 <6>[ 1.220762] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5832 11:04:13.733013 <6>[ 1.229368] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5833 11:04:13.739511 <6>[ 1.237946] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5834 11:04:13.749214 <6>[ 1.246513] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5835 11:04:13.756335 <6>[ 1.255169] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5836 11:04:13.766037 <6>[ 1.263833] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5837 11:04:13.776056 <6>[ 1.272572] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5838 11:04:13.782859 <6>[ 1.281307] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5839 11:04:13.792842 <6>[ 1.289884] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5840 11:04:13.799071 <6>[ 1.298691] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5841 11:04:13.809716 <4>[ 1.311107] cacheinfo: Unable to detect cache hierarchy for CPU 0
5842 11:04:13.818854 <6>[ 1.320465] loop: module loaded
5843 11:04:13.830760 <6>[ 1.332396] vsim1: Bringing 1800000uV into 2700000-2700000uV
5844 11:04:13.849477 <6>[ 1.350412] megasas: 07.719.03.00-rc1
5845 11:04:13.858001 <6>[ 1.359152] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5846 11:04:13.865045 <6>[ 1.366424] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5847 11:04:13.882154 <6>[ 1.383260] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5848 11:04:13.939106 <6>[ 1.433585] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5849 11:04:13.985787 <6>[ 1.486738] Freeing initrd memory: 18268K
5850 11:04:14.000712 <4>[ 1.498617] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5851 11:04:14.007253 <4>[ 1.507844] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
5852 11:04:14.013718 <4>[ 1.514543] Hardware name: Google juniper sku16 board (DT)
5853 11:04:14.017569 <4>[ 1.520282] Call trace:
5854 11:04:14.020438 <4>[ 1.522982] dump_backtrace.part.0+0xe0/0xf0
5855 11:04:14.023780 <4>[ 1.527520] show_stack+0x18/0x30
5856 11:04:14.027163 <4>[ 1.531094] dump_stack_lvl+0x64/0x80
5857 11:04:14.030521 <4>[ 1.535013] dump_stack+0x18/0x34
5858 11:04:14.037208 <4>[ 1.538582] sysfs_warn_dup+0x64/0x80
5859 11:04:14.040926 <4>[ 1.542505] sysfs_do_create_link_sd+0xf0/0x100
5860 11:04:14.043968 <4>[ 1.547292] sysfs_create_link+0x20/0x40
5861 11:04:14.047748 <4>[ 1.551471] bus_add_device+0x64/0x120
5862 11:04:14.054319 <4>[ 1.555476] device_add+0x354/0x7ec
5863 11:04:14.057318 <4>[ 1.559222] of_device_add+0x44/0x60
5864 11:04:14.060829 <4>[ 1.563056] of_platform_device_create_pdata+0x90/0x124
5865 11:04:14.067413 <4>[ 1.568537] of_platform_bus_create+0x154/0x380
5866 11:04:14.070573 <4>[ 1.573324] of_platform_populate+0x50/0xfc
5867 11:04:14.077516 <4>[ 1.577762] parse_mtd_partitions+0x1d8/0x4e0
5868 11:04:14.080655 <4>[ 1.582377] mtd_device_parse_register+0xec/0x2e0
5869 11:04:14.084436 <4>[ 1.587338] spi_nor_probe+0x280/0x2f4
5870 11:04:14.087665 <4>[ 1.591343] spi_mem_probe+0x6c/0xc0
5871 11:04:14.091063 <4>[ 1.595176] spi_probe+0x84/0xe4
5872 11:04:14.097938 <4>[ 1.598661] really_probe+0xbc/0x2dc
5873 11:04:14.101235 <4>[ 1.602492] __driver_probe_device+0x78/0x114
5874 11:04:14.104137 <4>[ 1.607104] driver_probe_device+0xd8/0x15c
5875 11:04:14.110835 <4>[ 1.611541] __device_attach_driver+0xb8/0x134
5876 11:04:14.113973 <4>[ 1.616240] bus_for_each_drv+0x7c/0xd4
5877 11:04:14.117500 <4>[ 1.620332] __device_attach+0x9c/0x1a0
5878 11:04:14.121066 <4>[ 1.624422] device_initial_probe+0x14/0x20
5879 11:04:14.127257 <4>[ 1.628860] bus_probe_device+0x98/0xa0
5880 11:04:14.130958 <4>[ 1.632951] device_add+0x3c0/0x7ec
5881 11:04:14.134203 <4>[ 1.636696] __spi_add_device+0x78/0x120
5882 11:04:14.137830 <4>[ 1.640874] spi_add_device+0x44/0x80
5883 11:04:14.144875 <4>[ 1.644791] spi_register_controller+0x704/0xb20
5884 11:04:14.147439 <4>[ 1.649664] devm_spi_register_controller+0x4c/0xac
5885 11:04:14.151093 <4>[ 1.654797] mtk_spi_probe+0x4f4/0x684
5886 11:04:14.157760 <4>[ 1.658802] platform_probe+0x68/0xc0
5887 11:04:14.160944 <4>[ 1.662720] really_probe+0xbc/0x2dc
5888 11:04:14.164610 <4>[ 1.666550] __driver_probe_device+0x78/0x114
5889 11:04:14.167572 <4>[ 1.671162] driver_probe_device+0xd8/0x15c
5890 11:04:14.174440 <4>[ 1.675599] __driver_attach+0x94/0x19c
5891 11:04:14.177577 <4>[ 1.679689] bus_for_each_dev+0x74/0xd0
5892 11:04:14.181403 <4>[ 1.683781] driver_attach+0x24/0x30
5893 11:04:14.184181 <4>[ 1.687610] bus_add_driver+0x154/0x20c
5894 11:04:14.187947 <4>[ 1.691701] driver_register+0x78/0x130
5895 11:04:14.194222 <4>[ 1.695792] __platform_driver_register+0x28/0x34
5896 11:04:14.197616 <4>[ 1.700752] mtk_spi_driver_init+0x1c/0x28
5897 11:04:14.204253 <4>[ 1.705108] do_one_initcall+0x64/0x1dc
5898 11:04:14.208184 <4>[ 1.709200] kernel_init_freeable+0x218/0x284
5899 11:04:14.210887 <4>[ 1.713815] kernel_init+0x24/0x12c
5900 11:04:14.214129 <4>[ 1.717560] ret_from_fork+0x10/0x20
5901 11:04:14.225078 <6>[ 1.726388] tun: Universal TUN/TAP device driver, 1.6
5902 11:04:14.229044 <6>[ 1.732689] thunder_xcv, ver 1.0
5903 11:04:14.232241 <6>[ 1.736211] thunder_bgx, ver 1.0
5904 11:04:14.234927 <6>[ 1.739714] nicpf, ver 1.0
5905 11:04:14.245839 <6>[ 1.744077] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5906 11:04:14.249207 <6>[ 1.751564] hns3: Copyright (c) 2017 Huawei Corporation.
5907 11:04:14.252871 <6>[ 1.757160] hclge is initializing
5908 11:04:14.259418 <6>[ 1.760747] e1000: Intel(R) PRO/1000 Network Driver
5909 11:04:14.266320 <6>[ 1.765882] e1000: Copyright (c) 1999-2006 Intel Corporation.
5910 11:04:14.270146 <6>[ 1.771905] e1000e: Intel(R) PRO/1000 Network Driver
5911 11:04:14.276631 <6>[ 1.777126] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5912 11:04:14.282730 <6>[ 1.783319] igb: Intel(R) Gigabit Ethernet Network Driver
5913 11:04:14.289876 <6>[ 1.788973] igb: Copyright (c) 2007-2014 Intel Corporation.
5914 11:04:14.296583 <6>[ 1.794817] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5915 11:04:14.299700 <6>[ 1.801340] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5916 11:04:14.306797 <6>[ 1.807892] sky2: driver version 1.30
5917 11:04:14.313127 <6>[ 1.813146] usbcore: registered new device driver r8152-cfgselector
5918 11:04:14.320274 <6>[ 1.819689] usbcore: registered new interface driver r8152
5919 11:04:14.323050 <6>[ 1.825515] VFIO - User Level meta-driver version: 0.3
5920 11:04:14.331868 <6>[ 1.833324] mtu3 11201000.usb: uwk - reg:0x420, version:101
5921 11:04:14.339097 <4>[ 1.839199] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5922 11:04:14.345438 <6>[ 1.846468] mtu3 11201000.usb: dr_mode: 1, drd: auto
5923 11:04:14.352349 <6>[ 1.851694] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5924 11:04:14.355328 <6>[ 1.857878] mtu3 11201000.usb: usb3-drd: 0
5925 11:04:14.365421 <6>[ 1.863459] mtu3 11201000.usb: xHCI platform device register success...
5926 11:04:14.371787 <4>[ 1.872101] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5927 11:04:14.378401 <6>[ 1.880051] xhci-mtk 11200000.usb: xHCI Host Controller
5928 11:04:14.385257 <6>[ 1.885563] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5929 11:04:14.392075 <6>[ 1.893291] xhci-mtk 11200000.usb: USB3 root hub has no ports
5930 11:04:14.402097 <6>[ 1.899299] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5931 11:04:14.408902 <6>[ 1.908724] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5932 11:04:14.415830 <6>[ 1.914805] xhci-mtk 11200000.usb: xHCI Host Controller
5933 11:04:14.422111 <6>[ 1.920294] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5934 11:04:14.428715 <6>[ 1.927975] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5935 11:04:14.432349 <6>[ 1.934795] hub 1-0:1.0: USB hub found
5936 11:04:14.435436 <6>[ 1.938824] hub 1-0:1.0: 1 port detected
5937 11:04:14.446233 <6>[ 1.944206] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5938 11:04:14.449359 <6>[ 1.952852] hub 2-0:1.0: USB hub found
5939 11:04:14.456367 <3>[ 1.956900] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5940 11:04:14.463114 <6>[ 1.964815] usbcore: registered new interface driver usb-storage
5941 11:04:14.469992 <6>[ 1.971427] usbcore: registered new device driver onboard-usb-hub
5942 11:04:14.485086 <4>[ 1.983149] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
5943 11:04:14.493952 <6>[ 1.995432] mt6397-rtc mt6358-rtc: registered as rtc0
5944 11:04:14.503864 <6>[ 2.000915] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-10T11:04:14 UTC (1720609454)
5945 11:04:14.507245 <6>[ 2.010799] i2c_dev: i2c /dev entries driver
5946 11:04:14.518913 <6>[ 2.017200] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5947 11:04:14.529417 <6>[ 2.025519] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5948 11:04:14.532239 <6>[ 2.034424] i2c 4-0058: Fixed dependency cycle(s) with /panel
5949 11:04:14.542436 <6>[ 2.040453] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
5950 11:04:14.558714 <6>[ 2.059915] cpu cpu0: EM: created perf domain
5951 11:04:14.568335 <6>[ 2.065448] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
5952 11:04:14.575539 <6>[ 2.076736] cpu cpu4: EM: created perf domain
5953 11:04:14.582255 <6>[ 2.083448] sdhci: Secure Digital Host Controller Interface driver
5954 11:04:14.588593 <6>[ 2.089903] sdhci: Copyright(c) Pierre Ossman
5955 11:04:14.595242 <6>[ 2.095301] Synopsys Designware Multimedia Card Interface Driver
5956 11:04:14.602341 <6>[ 2.095844] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
5957 11:04:14.605559 <6>[ 2.102365] sdhci-pltfm: SDHCI platform and OF driver helper
5958 11:04:14.613988 <6>[ 2.115425] ledtrig-cpu: registered to indicate activity on CPUs
5959 11:04:14.621691 <6>[ 2.123182] usbcore: registered new interface driver usbhid
5960 11:04:14.625498 <6>[ 2.129021] usbhid: USB HID core driver
5961 11:04:14.635675 <6>[ 2.133341] spi_master spi2: will run message pump with realtime priority
5962 11:04:14.639832 <4>[ 2.133417] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
5963 11:04:14.646893 <4>[ 2.147621] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
5964 11:04:14.660188 <6>[ 2.153008] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
5965 11:04:14.679565 <6>[ 2.171067] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
5966 11:04:14.686178 <4>[ 2.179889] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
5967 11:04:14.689769 <6>[ 2.186772] cros-ec-spi spi2.0: Chrome EC device registered
5968 11:04:14.704266 <4>[ 2.202084] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
5969 11:04:14.717607 <4>[ 2.215266] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
5970 11:04:14.724348 <4>[ 2.224906] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
5971 11:04:14.734244 <6>[ 2.235520] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
5972 11:04:14.742332 <6>[ 2.243253] mmc0: new HS400 MMC card at address 0001
5973 11:04:14.748558 <6>[ 2.249054] mmc1: new ultra high speed SDR104 SDIO card at address 0001
5974 11:04:14.755245 <6>[ 2.249757] mmcblk0: mmc0:0001 TB2932 29.2 GiB
5975 11:04:14.761881 <6>[ 2.256061] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
5976 11:04:14.768778 <6>[ 2.266394] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
5977 11:04:14.778590 <6>[ 2.273355] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5978 11:04:14.785625 <6>[ 2.278955] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
5979 11:04:14.788791 <6>[ 2.288080] NET: Registered PF_PACKET protocol family
5980 11:04:14.795810 <6>[ 2.292926] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
5981 11:04:14.798796 <6>[ 2.297026] 9pnet: Installing 9P2000 support
5982 11:04:14.805486 <6>[ 2.303497] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
5983 11:04:14.812768 <5>[ 2.306735] Key type dns_resolver registered
5984 11:04:14.822263 <6>[ 2.306893] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
5985 11:04:14.832473 <6>[ 2.307144] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
5986 11:04:14.838849 <6>[ 2.340157] registered taskstats version 1
5987 11:04:14.842658 <5>[ 2.344533] Loading compiled-in X.509 certificates
5988 11:04:14.856683 <6>[ 2.355048] usb 1-1: new high-speed USB device number 2 using xhci-mtk
5989 11:04:14.886952 <3>[ 2.385305] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
5990 11:04:14.916394 <6>[ 2.411161] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5991 11:04:14.926336 <6>[ 2.424083] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
5992 11:04:14.933102 <6>[ 2.432639] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
5993 11:04:14.943185 <6>[ 2.441162] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
5994 11:04:14.953250 <6>[ 2.449682] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
5995 11:04:14.959690 <6>[ 2.458202] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
5996 11:04:14.969545 <6>[ 2.466721] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
5997 11:04:14.976773 <6>[ 2.475241] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
5998 11:04:14.982793 <6>[ 2.484319] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
5999 11:04:14.990168 <6>[ 2.491708] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6000 11:04:14.997421 <6>[ 2.498896] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6001 11:04:15.007983 <6>[ 2.506049] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6002 11:04:15.011034 <6>[ 2.510037] hub 1-1:1.0: USB hub found
6003 11:04:15.017958 <6>[ 2.513442] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6004 11:04:15.021367 <6>[ 2.517116] hub 1-1:1.0: 3 ports detected
6005 11:04:15.027975 <6>[ 2.524866] panfrost 13040000.gpu: clock rate = 511999970
6006 11:04:15.038238 <6>[ 2.533407] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6007 11:04:15.044308 <6>[ 2.543681] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6008 11:04:15.054624 <6>[ 2.551690] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6009 11:04:15.064434 <6>[ 2.560123] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6010 11:04:15.070950 <6>[ 2.572200] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6011 11:04:15.084464 <6>[ 2.582479] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6012 11:04:15.094542 <6>[ 2.591526] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6013 11:04:15.105028 <6>[ 2.600696] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6014 11:04:15.111345 <6>[ 2.609827] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6015 11:04:15.121392 <6>[ 2.618958] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6016 11:04:15.131652 <6>[ 2.628260] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6017 11:04:15.141071 <6>[ 2.637562] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6018 11:04:15.151111 <6>[ 2.647037] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6019 11:04:15.158026 <6>[ 2.656512] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6020 11:04:15.167509 <6>[ 2.665638] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6021 11:04:15.241088 <6>[ 2.738849] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6022 11:04:15.250888 <6>[ 2.747742] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6023 11:04:15.261570 <6>[ 2.759387] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6024 11:04:15.316702 <6>[ 2.815055] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6025 11:04:15.946969 <6>[ 3.007340] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6026 11:04:15.957089 <4>[ 3.124300] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6027 11:04:15.963544 <4>[ 3.124318] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6028 11:04:15.970691 <6>[ 3.160220] r8152 1-1.2:1.0 eth0: v1.12.13
6029 11:04:15.976790 <6>[ 3.239067] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6030 11:04:15.983481 <6>[ 3.428585] Console: switching to colour frame buffer device 170x48
6031 11:04:15.993299 <6>[ 3.490491] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6032 11:04:16.012076 <6>[ 3.506829] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6033 11:04:16.028710 <6>[ 3.523557] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6034 11:04:16.035286 <6>[ 3.536138] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6035 11:04:16.046003 <6>[ 3.544239] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6036 11:04:16.055931 <6>[ 3.548114] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6037 11:04:16.073023 <6>[ 3.567597] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6038 11:04:17.271892 <6>[ 4.772991] r8152 1-1.2:1.0 eth0: carrier on
6039 11:04:20.293895 <5>[ 4.803074] Sending DHCP requests .., OK
6040 11:04:20.300548 <6>[ 7.799545] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23
6041 11:04:20.304310 <6>[ 7.807977] IP-Config: Complete:
6042 11:04:20.316917 <6>[ 7.811547] device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1
6043 11:04:20.327255 <6>[ 7.822446] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)
6044 11:04:20.338884 <6>[ 7.836814] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6045 11:04:20.347713 <6>[ 7.836825] nameserver0=192.168.201.1
6046 11:04:20.355643 <6>[ 7.856659] clk: Disabling unused clocks
6047 11:04:20.360449 <6>[ 7.864659] ALSA device list:
6048 11:04:20.369619 <6>[ 7.870752] No soundcards found.
6049 11:04:20.378308 <6>[ 7.879727] Freeing unused kernel memory: 8512K
6050 11:04:20.385670 <6>[ 7.886891] Run /init as init process
6051 11:04:20.396896 Loading, please wait...
6052 11:04:20.428407 Starting systemd-udevd version 252.22-1~deb12u1
6053 11:04:20.753883 <6>[ 8.251605] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6054 11:04:20.756975 <3>[ 8.253828] thermal_sys: Failed to find 'trips' node
6055 11:04:20.772321 <3>[ 8.270281] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6056 11:04:20.782146 <3>[ 8.278765] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6057 11:04:20.792175 <3>[ 8.278782] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6058 11:04:20.795528 <3>[ 8.280463] mtk-scp 10500000.scp: invalid resource
6059 11:04:20.802496 <6>[ 8.280521] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6060 11:04:20.808633 <6>[ 8.281815] remoteproc remoteproc0: scp is available
6061 11:04:20.819103 <4>[ 8.281900] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6062 11:04:20.822205 <6>[ 8.281906] remoteproc remoteproc0: powering up scp
6063 11:04:20.832611 <4>[ 8.281922] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6064 11:04:20.839390 <3>[ 8.281925] remoteproc remoteproc0: request_firmware failed: -2
6065 11:04:20.845528 <3>[ 8.288833] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6066 11:04:20.848709 <6>[ 8.289023] mc: Linux media interface: v0.10
6067 11:04:20.856074 <4>[ 8.297519] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6068 11:04:20.861978 <4>[ 8.300708] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6069 11:04:20.872700 <4>[ 8.300841] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6070 11:04:20.882555 <3>[ 8.302516] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6071 11:04:20.889316 <3>[ 8.310003] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6072 11:04:20.897506 <6>[ 8.310825] videodev: Linux video capture interface: v2.00
6073 11:04:20.908537 <5>[ 8.311851] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6074 11:04:20.915294 <3>[ 8.313096] thermal_sys: Failed to find 'trips' node
6075 11:04:20.925537 <3>[ 8.313101] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6076 11:04:20.935947 <3>[ 8.313108] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6077 11:04:20.942241 <4>[ 8.313111] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6078 11:04:20.952237 <4>[ 8.314806] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6079 11:04:20.958282 <3>[ 8.315213] elan_i2c 2-0015: Error applying setting, reverse things back
6080 11:04:20.968305 <6>[ 8.315906] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6081 11:04:20.978231 <3>[ 8.323753] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6082 11:04:20.988267 <6>[ 8.334838] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6083 11:04:20.998430 <3>[ 8.337395] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6084 11:04:21.005099 <5>[ 8.346847] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6085 11:04:21.012098 <3>[ 8.351602] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6086 11:04:21.021700 <5>[ 8.355339] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6087 11:04:21.028069 <6>[ 8.357003] cs_system_cfg: CoreSight Configuration manager initialised
6088 11:04:21.038017 <3>[ 8.362364] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6089 11:04:21.045250 <3>[ 8.362378] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6090 11:04:21.054856 <3>[ 8.362386] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6091 11:04:21.061556 <3>[ 8.362391] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6092 11:04:21.071608 <3>[ 8.362980] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6093 11:04:21.084983 <3>[ 8.365480] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6094 11:04:21.091665 <6>[ 8.365572] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6095 11:04:21.101382 <4>[ 8.369887] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6096 11:04:21.109065 <6>[ 8.370173] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6097 11:04:21.115763 <6>[ 8.377112] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6098 11:04:21.123569 <6>[ 8.388074] cfg80211: failed to load regulatory.db
6099 11:04:21.132706 <6>[ 8.433915] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6100 11:04:21.142347 <6>[ 8.441330] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6101 11:04:21.146000 <6>[ 8.460154] Bluetooth: Core ver 2.22
6102 11:04:21.155589 <6>[ 8.466345] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6103 11:04:21.159481 <6>[ 8.476202] NET: Registered PF_BLUETOOTH protocol family
6104 11:04:21.169308 <6>[ 8.484897] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6105 11:04:21.176445 <6>[ 8.486309] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6106 11:04:21.183005 <6>[ 8.495589] Bluetooth: HCI device and connection manager initialized
6107 11:04:21.189987 <6>[ 8.496283] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6108 11:04:21.200494 <6>[ 8.497129] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6109 11:04:21.206243 <6>[ 8.504343] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6110 11:04:21.220036 <6>[ 8.504672] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6111 11:04:21.226249 <6>[ 8.504939] usbcore: registered new interface driver uvcvideo
6112 11:04:21.233480 <6>[ 8.505579] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6113 11:04:21.243721 <6>[ 8.505899] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6114 11:04:21.247456 <6>[ 8.510925] Bluetooth: HCI socket layer initialized
6115 11:04:21.254458 <6>[ 8.519744] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6116 11:04:21.260954 <6>[ 8.527805] Bluetooth: L2CAP socket layer initialized
6117 11:04:21.268201 <6>[ 8.534717] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6118 11:04:21.275572 <6>[ 8.543241] Bluetooth: SCO socket layer initialized
6119 11:04:21.284651 <3>[ 8.552043] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6120 11:04:21.294946 <6>[ 8.568788] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6121 11:04:21.305573 <3>[ 8.570445] debugfs: File 'Playback' in directory 'dapm' already present!
6122 11:04:21.312804 <6>[ 8.578092] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6123 11:04:21.322626 <3>[ 8.590497] debugfs: File 'Capture' in directory 'dapm' already present!
6124 11:04:21.325847 <6>[ 8.590846] Bluetooth: HCI UART driver ver 2.3
6125 11:04:21.339088 <6>[ 8.592998] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6126 11:04:21.349249 <6>[ 8.598760] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6127 11:04:21.355508 <6>[ 8.607130] Bluetooth: HCI UART protocol H4 registered
6128 11:04:21.363210 <6>[ 8.607181] Bluetooth: HCI UART protocol LL registered
6129 11:04:21.372816 <4>[ 8.734445] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6130 11:04:21.375893 <4>[ 8.734445] Fallback method does not support PEC.
6131 11:04:21.382341 <6>[ 8.739743] Bluetooth: HCI UART protocol Three-wire (H5) registered
6132 11:04:21.392999 <3>[ 8.752762] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6133 11:04:21.399297 <6>[ 8.753898] Bluetooth: HCI UART protocol Broadcom registered
6134 11:04:21.406059 <6>[ 8.768403] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6135 11:04:21.417003 <3>[ 8.770337] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6136 11:04:21.423155 <6>[ 8.775394] Bluetooth: HCI UART protocol QCA registered
6137 11:04:21.429554 <6>[ 8.776452] Bluetooth: hci0: setting up ROME/QCA6390
6138 11:04:21.463980 <6>[ 8.965128] Bluetooth: HCI UART protocol Marvell registered
6139 11:04:21.474608 Begin: Loading essential drivers ... done.
6140 11:04:21.477707 Begin: Running /scripts/init-premount ... done.
6141 11:04:21.484654 Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
6142 11:04:21.491472 Beg<3>[ 8.989809] Bluetooth: hci0: Frame reassembly failed (-84)
6143 11:04:21.497875 in: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
6144 11:04:21.501309 Device /sys/class/net/eth0 found
6145 11:04:21.501696 done.
6146 11:04:21.513705 Begin: Waiting up to 180 secs for any network device to become available ... done.
6147 11:04:21.553953 IP-Config: eth0 hardware address 00:e0:4c:71:a7:1f mtu 1500 DHCP
6148 11:04:21.561019 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6149 11:04:21.567627 address: 192.168.201.23 broadcast: 192.168.201.255 netmask: 255.255.255.0
6150 11:04:21.574254 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6151 11:04:21.580736 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-3
6152 11:04:21.587357 domain : lava-rack
6153 11:04:21.590810 rootserver: 192.168.201.1 rootpath:
6154 11:04:21.591408 filename :
6155 11:04:21.601508 done.
6156 11:04:21.609874 Begin: Running /scripts/nfs-bottom ... done.
6157 11:04:21.626664 Begin: Running /scripts/init-bottom ... done.
6158 11:04:21.662367 <6>[ 9.160278] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6159 11:04:21.755712 <4>[ 9.253977] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6160 11:04:21.762426 <6>[ 9.263045] Bluetooth: hci0: QCA Product ID :0x00000008
6161 11:04:21.770280 <6>[ 9.271344] Bluetooth: hci0: QCA SOC Version :0x00000044
6162 11:04:21.779313 <6>[ 9.280415] Bluetooth: hci0: QCA ROM Version :0x00000302
6163 11:04:21.788494 <6>[ 9.289800] Bluetooth: hci0: QCA Patch Version:0x00000111
6164 11:04:21.798442 <6>[ 9.299760] Bluetooth: hci0: QCA controller version 0x00440302
6165 11:04:21.811695 <6>[ 9.309765] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6166 11:04:21.822852 <4>[ 9.320596] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6167 11:04:21.834890 <3>[ 9.332726] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6168 11:04:21.845245 <4>[ 9.341135] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6169 11:04:21.848960 <3>[ 9.343334] Bluetooth: hci0: QCA Failed to download patch (-2)
6170 11:04:21.865819 <4>[ 9.363967] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6171 11:04:21.876101 <4>[ 9.377218] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6172 11:04:23.128594 <6>[ 10.630324] NET: Registered PF_INET6 protocol family
6173 11:04:23.142037 <6>[ 10.642750] Segment Routing with IPv6
6174 11:04:23.149687 <6>[ 10.651414] In-situ OAM (IOAM) with IPv6
6175 11:04:23.326062 <30>[ 10.800900] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6176 11:04:23.347079 <30>[ 10.848830] systemd[1]: Detected architecture arm64.
6177 11:04:23.358256
6178 11:04:23.361831 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6179 11:04:23.361910
6180 11:04:23.386428 <30>[ 10.888078] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6181 11:04:24.409479 <30>[ 11.907671] systemd[1]: Queued start job for default target graphical.target.
6182 11:04:24.450172 <30>[ 11.948338] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6183 11:04:24.462236 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6184 11:04:24.483395 <30>[ 11.981535] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6185 11:04:24.496717 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6186 11:04:24.515115 <30>[ 12.013491] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6187 11:04:24.529320 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6188 11:04:24.546277 <30>[ 12.044656] systemd[1]: Created slice user.slice - User and Session Slice.
6189 11:04:24.558687 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6190 11:04:24.580829 <30>[ 12.075641] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6191 11:04:24.593872 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6192 11:04:24.617297 <30>[ 12.111489] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6193 11:04:24.628606 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6194 11:04:24.655406 <30>[ 12.143458] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6195 11:04:24.674249 <30>[ 12.172662] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6196 11:04:24.682059 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6197 11:04:24.701035 <30>[ 12.199253] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6198 11:04:24.714568 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6199 11:04:24.733507 <30>[ 12.231269] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6200 11:04:24.747570 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6201 11:04:24.761503 <30>[ 12.263342] systemd[1]: Reached target paths.target - Path Units.
6202 11:04:24.776376 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6203 11:04:24.792883 <30>[ 12.291235] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6204 11:04:24.805655 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6205 11:04:24.817539 <30>[ 12.319216] systemd[1]: Reached target slices.target - Slice Units.
6206 11:04:24.832760 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6207 11:04:24.845737 <30>[ 12.347258] systemd[1]: Reached target swap.target - Swaps.
6208 11:04:24.856634 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6209 11:04:24.877321 <30>[ 12.375328] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6210 11:04:24.890562 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6211 11:04:24.909590 <30>[ 12.407638] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6212 11:04:24.923557 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6213 11:04:24.943759 <30>[ 12.441934] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6214 11:04:24.957609 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6215 11:04:24.974503 <30>[ 12.472882] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6216 11:04:24.988966 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6217 11:04:25.006106 <30>[ 12.504088] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6218 11:04:25.018163 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6219 11:04:25.038612 <30>[ 12.536919] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6220 11:04:25.052241 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6221 11:04:25.071901 <30>[ 12.570084] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6222 11:04:25.085274 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6223 11:04:25.101640 <30>[ 12.599802] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6224 11:04:25.114911 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6225 11:04:25.165031 <30>[ 12.663547] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6226 11:04:25.178698 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6227 11:04:25.202410 <30>[ 12.700471] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6228 11:04:25.215628 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6229 11:04:25.237813 <30>[ 12.735591] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6230 11:04:25.250487 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6231 11:04:25.276053 <30>[ 12.767868] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6232 11:04:25.301039 <30>[ 12.799412] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6233 11:04:25.314428 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6234 11:04:25.339391 <30>[ 12.837229] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6235 11:04:25.351282 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6236 11:04:25.398628 <30>[ 12.895840] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6237 11:04:25.409535 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6238 11:04:25.430798 <30>[ 12.929286] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6239 11:04:25.444146 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6240 11:04:25.466182 <6>[ 12.964478] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6241 11:04:25.510018 <30>[ 13.008311] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6242 11:04:25.524354 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6243 11:04:25.547547 <30>[ 13.045653] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6244 11:04:25.558374 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6245 11:04:25.585078 <6>[ 13.086582] fuse: init (API version 7.37)
6246 11:04:25.617866 <30>[ 13.116353] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6247 11:04:25.631614 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6248 11:04:25.660403 <30>[ 13.158646] systemd[1]: Starting systemd-journald.service - Journal Service...
6249 11:04:25.670174 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6250 11:04:25.696109 <30>[ 13.194121] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6251 11:04:25.708846 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6252 11:04:25.732510 <30>[ 13.227403] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6253 11:04:25.744393 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6254 11:04:25.770378 <30>[ 13.268392] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6255 11:04:25.784494 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6256 11:04:25.806191 <30>[ 13.304339] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6257 11:04:25.818152 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6258 11:04:25.847353 <30>[ 13.345434] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6259 11:04:25.853663 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6260 11:04:25.871825 <30>[ 13.372055] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6261 11:04:25.882097 <3>[ 13.376154] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6262 11:04:25.899882 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue <3>[ 13.396361] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6263 11:04:25.899969 File System.
6264 11:04:25.916232 <3>[ 13.413835] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6265 11:04:25.923916 <30>[ 13.423125] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6266 11:04:25.933826 <3>[ 13.428153] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6267 11:04:25.948968 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug <3>[ 13.446626] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6268 11:04:25.951930 File System.
6269 11:04:25.966861 <3>[ 13.464611] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6270 11:04:25.978321 <30>[ 13.474564] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6271 11:04:25.984721 <3>[ 13.480674] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6272 11:04:26.003120 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static D<3>[ 13.500189] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6273 11:04:26.003222 evice Nodes.
6274 11:04:26.019795 <30>[ 13.520512] systemd[1]: modprobe@configfs.service: Deactivated successfully.
6275 11:04:26.032301 <30>[ 13.530437] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
6276 11:04:26.042859 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6277 11:04:26.062208 <30>[ 13.560310] systemd[1]: Started systemd-journald.service - Journal Service.
6278 11:04:26.073311 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6279 11:04:26.094064 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6280 11:04:26.115780 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6281 11:04:26.136634 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6282 11:04:26.156002 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6283 11:04:26.176147 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6284 11:04:26.193738 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6285 11:04:26.215356 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6286 11:04:26.234882 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6287 11:04:26.257949 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6288 11:04:26.305418 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6289 11:04:26.328397 Mountin<4>[ 13.826084] power_supply_show_property: 2 callbacks suppressed
6290 11:04:26.336027 g [0;1;39msys-k<3>[ 13.826094] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6291 11:04:26.346313 ernel-config…e<3>[ 13.840834] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6292 11:04:26.363619 <4>[ 13.843226] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6293 11:04:26.370484 <3>[ 13.861783] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6294 11:04:26.373594 rnel Configuration File System...
6295 11:04:26.383608 <3>[ 13.869174] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6296 11:04:26.410393 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6297 11:04:26.416779 <3>[ 13.914935] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6298 11:04:26.437070 Starting [0;1;39msyste<3>[ 13.933696] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6299 11:04:26.440542 md-random-se…ice[0m - Load/Save Random Seed...
6300 11:04:26.454149 <3>[ 13.951613] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6301 11:04:26.472265 <3>[ 13.970013] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6302 11:04:26.488088 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Ke<3>[ 13.987484] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6303 11:04:26.491627 rnel Variables...
6304 11:04:26.506826 <3>[ 14.005180] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6305 11:04:26.527525 <3>[ 14.025476] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6306 11:04:26.542572 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6307 11:04:26.553879 <46>[ 14.051729] systemd-journald[323]: Received client request to flush runtime journal.
6308 11:04:26.575307 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6309 11:04:26.599152 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6310 11:04:26.618772 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6311 11:04:26.639854 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6312 11:04:26.661865 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6313 11:04:27.329370 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6314 11:04:27.382556 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6315 11:04:28.002836 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6316 11:04:28.050306 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6317 11:04:28.069620 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6318 11:04:28.089913 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6319 11:04:28.134493 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6320 11:04:28.158974 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6321 11:04:28.427055 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6322 11:04:28.489438 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6323 11:04:28.562923 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6324 11:04:28.776582 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6325 11:04:28.797361 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6326 11:04:28.845616 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6327 11:04:28.863150 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6328 11:04:28.911279 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6329 11:04:28.974644 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6330 11:04:29.008218 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6331 11:04:29.102351 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6332 11:04:29.124647 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6333 11:04:29.230946 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6334 11:04:29.266313 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6335 11:04:29.291592 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6336 11:04:29.314828 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6337 11:04:29.334136 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6338 11:04:29.354355 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6339 11:04:29.377095 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6340 11:04:29.397385 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6341 11:04:29.430590 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6342 11:04:29.454968 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6343 11:04:29.474870 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6344 11:04:29.508937 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6345 11:04:29.526625 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6346 11:04:29.550787 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6347 11:04:29.571403 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6348 11:04:29.589525 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6349 11:04:29.607869 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6350 11:04:29.629401 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6351 11:04:29.645412 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6352 11:04:29.661151 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6353 11:04:29.679855 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6354 11:04:29.697714 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6355 11:04:29.714254 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6356 11:04:29.790237 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6357 11:04:29.818519 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6358 11:04:29.847788 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6359 11:04:29.950458 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6360 11:04:29.988795 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6361 11:04:30.015269 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6362 11:04:30.037262 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6363 11:04:30.154664 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6364 11:04:30.199876 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6365 11:04:30.252458 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6366 11:04:30.278189 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6367 11:04:30.294629 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6368 11:04:30.326024 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6369 11:04:30.348654 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6370 11:04:30.371317 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6371 11:04:30.391168 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6372 11:04:30.438980 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6373 11:04:30.487330 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6374 11:04:30.575727
6375 11:04:30.578748 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6376 11:04:30.578842
6377 11:04:30.582194 debian-bookworm-arm64 login: root (automatic login)
6378 11:04:30.582279
6379 11:04:30.854056 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Wed Jul 10 10:43:20 UTC 2024 aarch64
6380 11:04:30.876379
6381 11:04:30.880102 The programs included with the Debian GNU/Linux system are free software;
6382 11:04:30.886195 the exact distribution terms for each program are described in the
6383 11:04:30.892909 individual files in /usr/share/doc/*/copyright.
6384 11:04:30.893018
6385 11:04:30.896249 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6386 11:04:30.899201 permitted by applicable law.
6387 11:04:32.052605 Matched prompt #10: / #
6389 11:04:32.052891 Setting prompt string to ['/ #']
6390 11:04:32.052979 end: 2.2.5.1 login-action (duration 00:00:20) [common]
6392 11:04:32.053197 end: 2.2.5 auto-login-action (duration 00:00:20) [common]
6393 11:04:32.053306 start: 2.2.6 expect-shell-connection (timeout 00:03:47) [common]
6394 11:04:32.053395 Setting prompt string to ['/ #']
6395 11:04:32.053474 Forcing a shell prompt, looking for ['/ #']
6396 11:04:32.053532 Sending line: ''
6398 11:04:32.103856 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6399 11:04:32.103925 Waiting using forced prompt support (timeout 00:02:30)
6400 11:04:32.108727 / #
6401 11:04:32.108998 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6402 11:04:32.109106 start: 2.2.7 export-device-env (timeout 00:03:47) [common]
6403 11:04:32.109203 Sending line: "export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14786786/extract-nfsrootfs-74nf38jf'"
6405 11:04:32.215108 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14786786/extract-nfsrootfs-74nf38jf'
6406 11:04:32.215461 Sending line: "export NFS_SERVER_IP='192.168.201.1'"
6408 11:04:32.321465 / # export NFS_SERVER_IP='192.168.201.1'
6409 11:04:32.321814 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6410 11:04:32.321953 end: 2.2 depthcharge-retry (duration 00:01:13) [common]
6411 11:04:32.322083 end: 2 depthcharge-action (duration 00:01:13) [common]
6412 11:04:32.322209 start: 3 lava-test-retry (timeout 00:08:02) [common]
6413 11:04:32.322338 start: 3.1 lava-test-shell (timeout 00:08:02) [common]
6414 11:04:32.322452 Using namespace: common
6415 11:04:32.322559 Sending line: '#'
6417 11:04:32.423575 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6418 11:04:32.429550 / # #
6419 11:04:32.429831 Using /lava-14786786
6420 11:04:32.429907 Sending line: 'export SHELL=/bin/bash'
6422 11:04:32.535469 / # export SHELL=/bin/bash
6423 11:04:32.535817 Sending line: '. /lava-14786786/environment'
6425 11:04:32.641022 / # . /lava-14786786/environment
6426 11:04:32.647095 Sending line: '/lava-14786786/bin/lava-test-runner /lava-14786786/0'
6428 11:04:32.747559 Test shell timeout: 10s (minimum of the action and connection timeout)
6429 11:04:32.752781 / # /lava-14786786/bin/lava-test-runner /lava-14786786/0
6430 11:04:32.991649 + export TESTRUN_ID=0_timesync-off
6431 11:04:32.994661 + TESTRUN_ID=0_timesync-off
6432 11:04:32.998284 + cd /lava-14786786/0/tests/0_timesync-off
6433 11:04:33.001349 ++ cat uuid
6434 11:04:33.005015 + UUID=14786786_1.6.2.3.1
6435 11:04:33.005147 + set +x
6436 11:04:33.010981 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14786786_1.6.2.3.1>
6437 11:04:33.011252 Received signal: <STARTRUN> 0_timesync-off 14786786_1.6.2.3.1
6438 11:04:33.011326 Starting test lava.0_timesync-off (14786786_1.6.2.3.1)
6439 11:04:33.011413 Skipping test definition patterns.
6440 11:04:33.014464 + systemctl stop systemd-timesyncd
6441 11:04:33.052515 + set +x
6442 11:04:33.056244 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14786786_1.6.2.3.1>
6443 11:04:33.056536 Received signal: <ENDRUN> 0_timesync-off 14786786_1.6.2.3.1
6444 11:04:33.056645 Ending use of test pattern.
6445 11:04:33.056727 Ending test lava.0_timesync-off (14786786_1.6.2.3.1), duration 0.05
6447 11:04:33.109445 + export TESTRUN_ID=1_kselftest-rtc
6448 11:04:33.112738 + TESTRUN_ID=1_kselftest-rtc
6449 11:04:33.115962 + cd /lava-14786786/0/tests/1_kselftest-rtc
6450 11:04:33.119435 ++ cat uuid
6451 11:04:33.119511 + UUID=14786786_1.6.2.3.5
6452 11:04:33.122554 + set +x
6453 11:04:33.125525 <LAVA_SIGNAL_STARTRUN 1_kselftest-rtc 14786786_1.6.2.3.5>
6454 11:04:33.125771 Received signal: <STARTRUN> 1_kselftest-rtc 14786786_1.6.2.3.5
6455 11:04:33.125834 Starting test lava.1_kselftest-rtc (14786786_1.6.2.3.5)
6456 11:04:33.125904 Skipping test definition patterns.
6457 11:04:33.129128 + cd ./automated/linux/kselftest/
6458 11:04:33.155700 + ./kselftest.sh -c rtc -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1 -E ''
6459 11:04:33.183132 INFO: install_deps skipped
6460 11:04:33.675967 --2024-07-10 11:04:33-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz
6461 11:04:33.702668 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6462 11:04:33.837797 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6463 11:04:33.970831 HTTP request sent, awaiting response... 200 OK
6464 11:04:33.974375 Length: 1919896 (1.8M) [application/octet-stream]
6465 11:04:33.977846 Saving to: 'kselftest_armhf.tar.gz'
6466 11:04:33.977965
6467 11:04:33.978058
6468 11:04:34.237844 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6469 11:04:34.504909 kselftest_armhf.tar 2%[ ] 46.39K 174KB/s
6470 11:04:34.770933 kselftest_armhf.tar 11%[=> ] 216.08K 406KB/s
6471 11:04:35.036532 kselftest_armhf.tar 33%[=====> ] 630.40K 788KB/s
6472 11:04:35.302036 kselftest_armhf.tar 53%[=========> ] 993.82K 933KB/s
6473 11:04:35.567547 kselftest_armhf.tar 73%[=============> ] 1.35M 1.01MB/s
6474 11:04:35.584870 kselftest_armhf.tar 95%[==================> ] 1.74M 1.09MB/s
6475 11:04:35.590993 kselftest_armhf.tar 100%[===================>] 1.83M 1.14MB/s in 1.6s
6476 11:04:35.591313
6477 11:04:35.759702 2024-07-10 11:04:35 (1.14 MB/s) - 'kselftest_armhf.tar.gz' saved [1919896/1919896]
6478 11:04:35.759895
6479 11:04:42.225052 skiplist:
6480 11:04:42.227879 ========================================
6481 11:04:42.231224 ========================================
6482 11:04:42.277300 rtc:rtctest
6483 11:04:42.297721 ============== Tests to run ===============
6484 11:04:42.297824 rtc:rtctest
6485 11:04:42.304532 ===========End Tests to run ===============
6486 11:04:42.308502 shardfile-rtc pass
6487 11:04:42.406457 <12>[ 29.907297] kselftest: Running tests in rtc
6488 11:04:42.416419 TAP version 13
6489 11:04:42.431641 1..1
6490 11:04:42.462048 # selftests: rtc: rtctest
6491 11:04:42.910497 # TAP version 13
6492 11:04:42.910625 # 1..8
6493 11:04:42.913078 # # Starting 8 tests from 2 test cases.
6494 11:04:42.916100 # # RUN rtc.date_read ...
6495 11:04:42.923117 # # rtctest.c:49:date_read:Current RTC date/time is 10/07/2024 11:04:42.
6496 11:04:42.926562 # # OK rtc.date_read
6497 11:04:42.929395 # ok 1 rtc.date_read
6498 11:04:42.932981 # # RUN rtc.date_read_loop ...
6499 11:04:42.942895 # # rtctest.c:88:date_read_loop:Continuously reading RTC time for 30s (with 11ms breaks after every read).
6500 11:04:50.493046 <6>[ 37.996966] vaux18: disabling
6501 11:04:50.496320 <6>[ 38.000490] vio28: disabling
6502 11:05:13.012839 # # rtctest.c:115:date_read_loop:Performed 2672 RTC time reads.
6503 11:05:13.016106 # # OK rtc.date_read_loop
6504 11:05:13.019466 # ok 2 rtc.date_read_loop
6505 11:05:13.023025 # # RUN rtc.uie_read ...
6506 11:05:15.999494 # # OK rtc.uie_read
6507 11:05:15.999654 # ok 3 rtc.uie_read
6508 11:05:16.002695 # # RUN rtc.uie_select ...
6509 11:05:18.996916 # # OK rtc.uie_select
6510 11:05:18.999573 # ok 4 rtc.uie_select
6511 11:05:19.002839 # # RUN rtc.alarm_alm_set ...
6512 11:05:19.009837 # # rtctest.c:202:alarm_alm_set:Alarm time now set to 11:05:22.
6513 11:05:19.012712 # # rtctest.c:207:alarm_alm_set:Expected -1 (-1) != rc (-1)
6514 11:05:19.019395 # # alarm_alm_set: Test terminated by assertion
6515 11:05:19.023211 # # FAIL rtc.alarm_alm_set
6516 11:05:19.026081 # not ok 5 rtc.alarm_alm_set
6517 11:05:19.029432 # # RUN rtc.alarm_wkalm_set ...
6518 11:05:19.036121 # # rtctest.c:258:alarm_wkalm_set:Alarm time now set to 10/07/2024 11:05:22.
6519 11:05:22.000208 # # OK rtc.alarm_wkalm_set
6520 11:05:22.000369 # ok 6 rtc.alarm_wkalm_set
6521 11:05:22.007155 # # RUN rtc.alarm_alm_set_minute ...
6522 11:05:22.010360 # # rtctest.c:304:alarm_alm_set_minute:Alarm time now set to 11:06:00.
6523 11:05:22.016795 # # rtctest.c:309:alarm_alm_set_minute:Expected -1 (-1) != rc (-1)
6524 11:05:22.024180 # # alarm_alm_set_minute: Test terminated by assertion
6525 11:05:22.026820 # # FAIL rtc.alarm_alm_set_minute
6526 11:05:22.030260 # not ok 7 rtc.alarm_alm_set_minute
6527 11:05:22.033425 # # RUN rtc.alarm_wkalm_set_minute ...
6528 11:05:22.043511 # # rtctest.c:360:alarm_wkalm_set_minute:Alarm time now set to 10/07/2024 11:06:00.
6529 11:06:00.001723 # # OK rtc.alarm_wkalm_set_minute
6530 11:06:00.005258 # ok 8 rtc.alarm_wkalm_set_minute
6531 11:06:00.008526 # # FAILED: 6 / 8 tests passed.
6532 11:06:00.012002 # # Totals: pass:6 fail:2 xfail:0 xpass:0 skip:0 error:0
6533 11:06:00.014813 not ok 1 selftests: rtc: rtctest # exit=1
6534 11:06:01.654694 rtc_rtctest_rtc_date_read pass
6535 11:06:01.657867 rtc_rtctest_rtc_date_read_loop pass
6536 11:06:01.660773 rtc_rtctest_rtc_uie_read pass
6537 11:06:01.664316 rtc_rtctest_rtc_uie_select pass
6538 11:06:01.667518 rtc_rtctest_rtc_alarm_alm_set fail
6539 11:06:01.670664 rtc_rtctest_rtc_alarm_wkalm_set pass
6540 11:06:01.673937 rtc_rtctest_rtc_alarm_alm_set_minute fail
6541 11:06:01.677364 rtc_rtctest_rtc_alarm_wkalm_set_minute pass
6542 11:06:01.680778 rtc_rtctest fail
6543 11:06:01.746946 + ../../utils/send-to-lava.sh ./output/result.txt
6544 11:06:01.811513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-rtc RESULT=pass>
6545 11:06:01.811805 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-rtc RESULT=pass
6547 11:06:01.855585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_date_read RESULT=pass>
6548 11:06:01.855949 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_date_read RESULT=pass
6550 11:06:01.904533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_date_read_loop RESULT=pass>
6551 11:06:01.905203 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_date_read_loop RESULT=pass
6553 11:06:01.956139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_uie_read RESULT=pass>
6554 11:06:01.956801 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_uie_read RESULT=pass
6556 11:06:02.006541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_uie_select RESULT=pass>
6557 11:06:02.007258 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_uie_select RESULT=pass
6559 11:06:02.054759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set RESULT=fail>
6560 11:06:02.055014 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set RESULT=fail
6562 11:06:02.095513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set RESULT=pass>
6563 11:06:02.095784 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set RESULT=pass
6565 11:06:02.134754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set_minute RESULT=fail>
6566 11:06:02.135007 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set_minute RESULT=fail
6568 11:06:02.179005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set_minute RESULT=pass>
6569 11:06:02.179408 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set_minute RESULT=pass
6571 11:06:02.221286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest RESULT=fail>
6572 11:06:02.221758 + set +x
6573 11:06:02.222300 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest RESULT=fail
6575 11:06:02.227597 <LAVA_SIGNAL_ENDRUN 1_kselftest-rtc 14786786_1.6.2.3.5>
6576 11:06:02.228224 Received signal: <ENDRUN> 1_kselftest-rtc 14786786_1.6.2.3.5
6577 11:06:02.228623 Ending use of test pattern.
6578 11:06:02.228925 Ending test lava.1_kselftest-rtc (14786786_1.6.2.3.5), duration 89.10
6580 11:06:02.229946 ok: lava_test_shell seems to have completed
6581 11:06:02.230546 shardfile-rtc: pass
rtc_rtctest_rtc_date_read: pass
rtc_rtctest_rtc_date_read_loop: pass
rtc_rtctest_rtc_uie_read: pass
rtc_rtctest_rtc_uie_select: pass
rtc_rtctest_rtc_alarm_alm_set: fail
rtc_rtctest_rtc_alarm_wkalm_set: pass
rtc_rtctest_rtc_alarm_alm_set_minute: fail
rtc_rtctest_rtc_alarm_wkalm_set_minute: pass
rtc_rtctest: fail
6582 11:06:02.230939 end: 3.1 lava-test-shell (duration 00:01:30) [common]
6583 11:06:02.231309 end: 3 lava-test-retry (duration 00:01:30) [common]
6584 11:06:02.231689 start: 4 finalize (timeout 00:06:32) [common]
6585 11:06:02.232074 start: 4.1 power-off (timeout 00:00:30) [common]
6586 11:06:02.232690 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
6587 11:06:04.358870 >> Command sent successfully.
6588 11:06:04.375689 Returned 0 in 2 seconds
6589 11:06:04.376325 end: 4.1 power-off (duration 00:00:02) [common]
6591 11:06:04.377649 start: 4.2 read-feedback (timeout 00:06:30) [common]
6593 11:06:04.379067 Listened to connection for namespace 'common' for up to 1s
6594 11:06:05.379412 Finalising connection for namespace 'common'
6595 11:06:05.379934 Disconnecting from shell: Finalise
6596 11:06:05.380423 / #
6597 11:06:05.481407 end: 4.2 read-feedback (duration 00:00:01) [common]
6598 11:06:05.481922 end: 4 finalize (duration 00:00:03) [common]
6599 11:06:05.482399 Cleaning after the job
6600 11:06:05.482819 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/ramdisk
6601 11:06:05.492137 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/kernel
6602 11:06:05.525841 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/dtb
6603 11:06:05.526179 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/nfsrootfs
6604 11:06:05.595178 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786786/tftp-deploy-6cc153ad/modules
6605 11:06:05.600998 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14786786
6606 11:06:06.151050 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14786786
6607 11:06:06.151197 Job finished correctly