Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 51
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 91
1 11:02:04.246518 lava-dispatcher, installed at version: 2024.05
2 11:02:04.246715 start: 0 validate
3 11:02:04.246831 Start time: 2024-07-10 11:02:04.246825+00:00 (UTC)
4 11:02:04.246967 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:02:04.247111 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 11:02:04.516038 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:02:04.516562 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 11:02:51.308184 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:02:51.309068 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 11:02:51.578923 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:02:51.579477 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 11:02:52.110306 Using caching service: 'http://localhost/cache/?uri=%s'
13 11:02:52.110455 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
14 11:02:55.614924 validate duration: 51.37
16 11:02:55.615166 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 11:02:55.615259 start: 1.1 download-retry (timeout 00:10:00) [common]
18 11:02:55.615337 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 11:02:55.615482 Not decompressing ramdisk as can be used compressed.
20 11:02:55.615562 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 11:02:55.615619 saving as /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/ramdisk/initrd.cpio.gz
22 11:02:55.615676 total size: 5628169 (5 MB)
23 11:02:55.882121 progress 0 % (0 MB)
24 11:02:55.883698 progress 5 % (0 MB)
25 11:02:55.885159 progress 10 % (0 MB)
26 11:02:55.886718 progress 15 % (0 MB)
27 11:02:55.888304 progress 20 % (1 MB)
28 11:02:55.889914 progress 25 % (1 MB)
29 11:02:55.891365 progress 30 % (1 MB)
30 11:02:55.892804 progress 35 % (1 MB)
31 11:02:55.894331 progress 40 % (2 MB)
32 11:02:55.896348 progress 45 % (2 MB)
33 11:02:55.897787 progress 50 % (2 MB)
34 11:02:55.899319 progress 55 % (2 MB)
35 11:02:55.900779 progress 60 % (3 MB)
36 11:02:55.902168 progress 65 % (3 MB)
37 11:02:55.903984 progress 70 % (3 MB)
38 11:02:55.905427 progress 75 % (4 MB)
39 11:02:55.907151 progress 80 % (4 MB)
40 11:02:55.908570 progress 85 % (4 MB)
41 11:02:55.910374 progress 90 % (4 MB)
42 11:02:55.912065 progress 95 % (5 MB)
43 11:02:55.913461 progress 100 % (5 MB)
44 11:02:55.913686 5 MB downloaded in 0.30 s (18.01 MB/s)
45 11:02:55.913856 end: 1.1.1 http-download (duration 00:00:00) [common]
47 11:02:55.914114 end: 1.1 download-retry (duration 00:00:00) [common]
48 11:02:55.914220 start: 1.2 download-retry (timeout 00:10:00) [common]
49 11:02:55.914324 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 11:02:55.914680 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
51 11:02:55.914779 saving as /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/kernel/Image
52 11:02:55.914836 total size: 54813184 (52 MB)
53 11:02:55.914890 No compression specified
54 11:02:55.916009 progress 0 % (0 MB)
55 11:02:55.929982 progress 5 % (2 MB)
56 11:02:55.945215 progress 10 % (5 MB)
57 11:02:55.958600 progress 15 % (7 MB)
58 11:02:55.972874 progress 20 % (10 MB)
59 11:02:55.986765 progress 25 % (13 MB)
60 11:02:56.000642 progress 30 % (15 MB)
61 11:02:56.015002 progress 35 % (18 MB)
62 11:02:56.029495 progress 40 % (20 MB)
63 11:02:56.043033 progress 45 % (23 MB)
64 11:02:56.057847 progress 50 % (26 MB)
65 11:02:56.072304 progress 55 % (28 MB)
66 11:02:56.086122 progress 60 % (31 MB)
67 11:02:56.100154 progress 65 % (34 MB)
68 11:02:56.114328 progress 70 % (36 MB)
69 11:02:56.128179 progress 75 % (39 MB)
70 11:02:56.142143 progress 80 % (41 MB)
71 11:02:56.156051 progress 85 % (44 MB)
72 11:02:56.170533 progress 90 % (47 MB)
73 11:02:56.183928 progress 95 % (49 MB)
74 11:02:56.197172 progress 100 % (52 MB)
75 11:02:56.197475 52 MB downloaded in 0.28 s (184.95 MB/s)
76 11:02:56.197631 end: 1.2.1 http-download (duration 00:00:00) [common]
78 11:02:56.197840 end: 1.2 download-retry (duration 00:00:00) [common]
79 11:02:56.197919 start: 1.3 download-retry (timeout 00:09:59) [common]
80 11:02:56.197992 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 11:02:56.198123 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 11:02:56.198183 saving as /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 11:02:56.198235 total size: 57695 (0 MB)
84 11:02:56.198286 No compression specified
85 11:02:56.199362 progress 56 % (0 MB)
86 11:02:56.199642 progress 100 % (0 MB)
87 11:02:56.199899 0 MB downloaded in 0.00 s (33.10 MB/s)
88 11:02:56.200014 end: 1.3.1 http-download (duration 00:00:00) [common]
90 11:02:56.200214 end: 1.3 download-retry (duration 00:00:00) [common]
91 11:02:56.200289 start: 1.4 download-retry (timeout 00:09:59) [common]
92 11:02:56.200363 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 11:02:56.200467 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 11:02:56.200526 saving as /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/nfsrootfs/full.rootfs.tar
95 11:02:56.200581 total size: 120894716 (115 MB)
96 11:02:56.200635 Using unxz to decompress xz
97 11:02:56.201919 progress 0 % (0 MB)
98 11:02:56.543349 progress 5 % (5 MB)
99 11:02:56.883462 progress 10 % (11 MB)
100 11:02:57.223127 progress 15 % (17 MB)
101 11:02:57.548117 progress 20 % (23 MB)
102 11:02:57.851685 progress 25 % (28 MB)
103 11:02:58.199260 progress 30 % (34 MB)
104 11:02:58.518257 progress 35 % (40 MB)
105 11:02:58.691086 progress 40 % (46 MB)
106 11:02:58.873936 progress 45 % (51 MB)
107 11:02:59.179038 progress 50 % (57 MB)
108 11:02:59.526914 progress 55 % (63 MB)
109 11:02:59.865603 progress 60 % (69 MB)
110 11:03:00.205815 progress 65 % (74 MB)
111 11:03:00.548829 progress 70 % (80 MB)
112 11:03:00.904205 progress 75 % (86 MB)
113 11:03:01.242300 progress 80 % (92 MB)
114 11:03:01.597985 progress 85 % (98 MB)
115 11:03:01.945343 progress 90 % (103 MB)
116 11:03:02.308569 progress 95 % (109 MB)
117 11:03:02.672393 progress 100 % (115 MB)
118 11:03:02.677902 115 MB downloaded in 6.48 s (17.80 MB/s)
119 11:03:02.678091 end: 1.4.1 http-download (duration 00:00:06) [common]
121 11:03:02.678310 end: 1.4 download-retry (duration 00:00:06) [common]
122 11:03:02.678389 start: 1.5 download-retry (timeout 00:09:53) [common]
123 11:03:02.678464 start: 1.5.1 http-download (timeout 00:09:53) [common]
124 11:03:02.678597 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
125 11:03:02.678658 saving as /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/modules/modules.tar
126 11:03:02.678711 total size: 8607984 (8 MB)
127 11:03:02.678767 Using unxz to decompress xz
128 11:03:02.943977 progress 0 % (0 MB)
129 11:03:02.964050 progress 5 % (0 MB)
130 11:03:02.988884 progress 10 % (0 MB)
131 11:03:03.012928 progress 15 % (1 MB)
132 11:03:03.037039 progress 20 % (1 MB)
133 11:03:03.060445 progress 25 % (2 MB)
134 11:03:03.084010 progress 30 % (2 MB)
135 11:03:03.106146 progress 35 % (2 MB)
136 11:03:03.131848 progress 40 % (3 MB)
137 11:03:03.156440 progress 45 % (3 MB)
138 11:03:03.180246 progress 50 % (4 MB)
139 11:03:03.204645 progress 55 % (4 MB)
140 11:03:03.228549 progress 60 % (4 MB)
141 11:03:03.252408 progress 65 % (5 MB)
142 11:03:03.277926 progress 70 % (5 MB)
143 11:03:03.306702 progress 75 % (6 MB)
144 11:03:03.335221 progress 80 % (6 MB)
145 11:03:03.359762 progress 85 % (7 MB)
146 11:03:03.383674 progress 90 % (7 MB)
147 11:03:03.408824 progress 95 % (7 MB)
148 11:03:03.431583 progress 100 % (8 MB)
149 11:03:03.436818 8 MB downloaded in 0.76 s (10.83 MB/s)
150 11:03:03.437003 end: 1.5.1 http-download (duration 00:00:01) [common]
152 11:03:03.437273 end: 1.5 download-retry (duration 00:00:01) [common]
153 11:03:03.437381 start: 1.6 prepare-tftp-overlay (timeout 00:09:52) [common]
154 11:03:03.437471 start: 1.6.1 extract-nfsrootfs (timeout 00:09:52) [common]
155 11:03:07.144068 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14786780/extract-nfsrootfs-f7ihucu9
156 11:03:07.144260 end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
157 11:03:07.144388 start: 1.6.2 lava-overlay (timeout 00:09:48) [common]
158 11:03:07.144611 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p
159 11:03:07.144776 makedir: /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin
160 11:03:07.144904 makedir: /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/tests
161 11:03:07.145028 makedir: /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/results
162 11:03:07.145148 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-add-keys
163 11:03:07.145365 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-add-sources
164 11:03:07.145533 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-background-process-start
165 11:03:07.145701 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-background-process-stop
166 11:03:07.145826 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-common-functions
167 11:03:07.145943 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-echo-ipv4
168 11:03:07.146056 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-install-packages
169 11:03:07.146168 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-installed-packages
170 11:03:07.146278 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-os-build
171 11:03:07.146388 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-probe-channel
172 11:03:07.146498 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-probe-ip
173 11:03:07.146609 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-target-ip
174 11:03:07.146719 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-target-mac
175 11:03:07.146827 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-target-storage
176 11:03:07.146942 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-test-case
177 11:03:07.147052 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-test-event
178 11:03:07.147160 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-test-feedback
179 11:03:07.147270 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-test-raise
180 11:03:07.147378 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-test-reference
181 11:03:07.147489 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-test-runner
182 11:03:07.147597 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-test-set
183 11:03:07.147706 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-test-shell
184 11:03:07.147821 Updating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-add-keys (debian)
185 11:03:07.147961 Updating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-add-sources (debian)
186 11:03:07.148088 Updating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-install-packages (debian)
187 11:03:07.148220 Updating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-installed-packages (debian)
188 11:03:07.148345 Updating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/bin/lava-os-build (debian)
189 11:03:07.148455 Creating /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/environment
190 11:03:07.148538 LAVA metadata
191 11:03:07.148602 - LAVA_JOB_ID=14786780
192 11:03:07.148657 - LAVA_DISPATCHER_IP=192.168.201.1
193 11:03:07.148754 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:48) [common]
194 11:03:07.148810 skipped lava-vland-overlay
195 11:03:07.148878 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 11:03:07.148948 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
197 11:03:07.149001 skipped lava-multinode-overlay
198 11:03:07.149063 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 11:03:07.149132 start: 1.6.2.3 test-definition (timeout 00:09:48) [common]
200 11:03:07.149196 Loading test definitions
201 11:03:07.149314 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:48) [common]
202 11:03:07.149373 Using /lava-14786780 at stage 0
203 11:03:07.149645 uuid=14786780_1.6.2.3.1 testdef=None
204 11:03:07.149724 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 11:03:07.149797 start: 1.6.2.3.2 test-overlay (timeout 00:09:48) [common]
206 11:03:07.150181 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 11:03:07.150375 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:48) [common]
209 11:03:07.150861 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 11:03:07.151066 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
212 11:03:07.153089 runner path: /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/0/tests/0_timesync-off test_uuid 14786780_1.6.2.3.1
213 11:03:07.153271 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 11:03:07.153486 start: 1.6.2.3.5 git-repo-action (timeout 00:09:48) [common]
216 11:03:07.153548 Using /lava-14786780 at stage 0
217 11:03:07.153633 Fetching tests from https://github.com/kernelci/test-definitions.git
218 11:03:07.153708 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/0/tests/1_kselftest-tpm2'
219 11:03:11.071508 Running '/usr/bin/git checkout kernelci.org
220 11:03:11.147115 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/kselftest.yaml
221 11:03:11.147706 uuid=14786780_1.6.2.3.5 testdef=None
222 11:03:11.147849 end: 1.6.2.3.5 git-repo-action (duration 00:00:04) [common]
224 11:03:11.148178 start: 1.6.2.3.6 test-overlay (timeout 00:09:44) [common]
225 11:03:11.149332 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 11:03:11.149591 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:44) [common]
228 11:03:11.150487 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 11:03:11.150728 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:44) [common]
231 11:03:11.152183 runner path: /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/0/tests/1_kselftest-tpm2 test_uuid 14786780_1.6.2.3.5
232 11:03:11.152321 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 11:03:11.152421 BRANCH='cip'
234 11:03:11.152509 SKIPFILE='/dev/null'
235 11:03:11.152611 SKIP_INSTALL='True'
236 11:03:11.152710 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz'
237 11:03:11.152797 TST_CASENAME=''
238 11:03:11.152881 TST_CMDFILES='tpm2'
239 11:03:11.153065 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 11:03:11.153428 Creating lava-test-runner.conf files
242 11:03:11.153500 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14786780/lava-overlay-eo4fov1p/lava-14786780/0 for stage 0
243 11:03:11.153604 - 0_timesync-off
244 11:03:11.153670 - 1_kselftest-tpm2
245 11:03:11.153778 end: 1.6.2.3 test-definition (duration 00:00:04) [common]
246 11:03:11.153867 start: 1.6.2.4 compress-overlay (timeout 00:09:44) [common]
247 11:03:18.418211 end: 1.6.2.4 compress-overlay (duration 00:00:07) [common]
248 11:03:18.418346 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
249 11:03:18.418430 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 11:03:18.418510 end: 1.6.2 lava-overlay (duration 00:00:11) [common]
251 11:03:18.418587 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
252 11:03:18.566375 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 11:03:18.566545 start: 1.6.4 extract-modules (timeout 00:09:37) [common]
254 11:03:18.566648 extracting modules file /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14786780/extract-nfsrootfs-f7ihucu9
255 11:03:18.835056 extracting modules file /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14786780/extract-overlay-ramdisk-9_qvr0mf/ramdisk
256 11:03:19.055619 end: 1.6.4 extract-modules (duration 00:00:00) [common]
257 11:03:19.055761 start: 1.6.5 apply-overlay-tftp (timeout 00:09:37) [common]
258 11:03:19.055845 [common] Applying overlay to NFS
259 11:03:19.055905 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14786780/compress-overlay-2ptas_pr/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14786780/extract-nfsrootfs-f7ihucu9
260 11:03:19.881549 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 11:03:19.881726 start: 1.6.6 configure-preseed-file (timeout 00:09:36) [common]
262 11:03:19.881858 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 11:03:19.881942 start: 1.6.7 compress-ramdisk (timeout 00:09:36) [common]
264 11:03:19.882010 Building ramdisk /var/lib/lava/dispatcher/tmp/14786780/extract-overlay-ramdisk-9_qvr0mf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14786780/extract-overlay-ramdisk-9_qvr0mf/ramdisk
265 11:03:20.204963 >> 129845 blocks
266 11:03:22.296004 rename /var/lib/lava/dispatcher/tmp/14786780/extract-overlay-ramdisk-9_qvr0mf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/ramdisk/ramdisk.cpio.gz
267 11:03:22.296166 end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
268 11:03:22.296256 start: 1.6.8 prepare-kernel (timeout 00:09:33) [common]
269 11:03:22.296333 start: 1.6.8.1 prepare-fit (timeout 00:09:33) [common]
270 11:03:22.296411 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/kernel/Image']
271 11:03:35.814120 Returned 0 in 13 seconds
272 11:03:35.814276 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/kernel/image.itb
273 11:03:36.173786 output: FIT description: Kernel Image image with one or more FDT blobs
274 11:03:36.173900 output: Created: Wed Jul 10 12:03:36 2024
275 11:03:36.173961 output: Image 0 (kernel-1)
276 11:03:36.174015 output: Description:
277 11:03:36.174066 output: Created: Wed Jul 10 12:03:36 2024
278 11:03:36.174117 output: Type: Kernel Image
279 11:03:36.174167 output: Compression: lzma compressed
280 11:03:36.174218 output: Data Size: 13116259 Bytes = 12808.85 KiB = 12.51 MiB
281 11:03:36.174267 output: Architecture: AArch64
282 11:03:36.174315 output: OS: Linux
283 11:03:36.174362 output: Load Address: 0x00000000
284 11:03:36.174409 output: Entry Point: 0x00000000
285 11:03:36.174456 output: Hash algo: crc32
286 11:03:36.174504 output: Hash value: 9bb85fb9
287 11:03:36.174551 output: Image 1 (fdt-1)
288 11:03:36.174598 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 11:03:36.174645 output: Created: Wed Jul 10 12:03:36 2024
290 11:03:36.174693 output: Type: Flat Device Tree
291 11:03:36.174740 output: Compression: uncompressed
292 11:03:36.174786 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 11:03:36.174833 output: Architecture: AArch64
294 11:03:36.174881 output: Hash algo: crc32
295 11:03:36.174928 output: Hash value: a9713552
296 11:03:36.174974 output: Image 2 (ramdisk-1)
297 11:03:36.175020 output: Description: unavailable
298 11:03:36.175067 output: Created: Wed Jul 10 12:03:36 2024
299 11:03:36.175113 output: Type: RAMDisk Image
300 11:03:36.175160 output: Compression: uncompressed
301 11:03:36.175206 output: Data Size: 18703022 Bytes = 18264.67 KiB = 17.84 MiB
302 11:03:36.175254 output: Architecture: AArch64
303 11:03:36.175300 output: OS: Linux
304 11:03:36.175346 output: Load Address: unavailable
305 11:03:36.175392 output: Entry Point: unavailable
306 11:03:36.175460 output: Hash algo: crc32
307 11:03:36.175520 output: Hash value: 7eb18689
308 11:03:36.175567 output: Default Configuration: 'conf-1'
309 11:03:36.175613 output: Configuration 0 (conf-1)
310 11:03:36.175659 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 11:03:36.175705 output: Kernel: kernel-1
312 11:03:36.175751 output: Init Ramdisk: ramdisk-1
313 11:03:36.175796 output: FDT: fdt-1
314 11:03:36.175842 output: Loadables: kernel-1
315 11:03:36.175888 output:
316 11:03:36.175986 end: 1.6.8.1 prepare-fit (duration 00:00:14) [common]
317 11:03:36.176060 end: 1.6.8 prepare-kernel (duration 00:00:14) [common]
318 11:03:36.176132 end: 1.6 prepare-tftp-overlay (duration 00:00:33) [common]
319 11:03:36.176204 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
320 11:03:36.176259 No LXC device requested
321 11:03:36.176323 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 11:03:36.176392 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
323 11:03:36.176456 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 11:03:36.176509 Checking files for TFTP limit of 4294967296 bytes.
325 11:03:36.176865 end: 1 tftp-deploy (duration 00:00:41) [common]
326 11:03:36.176951 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 11:03:36.177027 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 11:03:36.177113 substitutions:
329 11:03:36.177169 - {DTB}: 14786780/tftp-deploy-of3oyt0l/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 11:03:36.177223 - {INITRD}: 14786780/tftp-deploy-of3oyt0l/ramdisk/ramdisk.cpio.gz
331 11:03:36.177285 - {KERNEL}: 14786780/tftp-deploy-of3oyt0l/kernel/Image
332 11:03:36.177335 - {LAVA_MAC}: None
333 11:03:36.177383 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14786780/extract-nfsrootfs-f7ihucu9
334 11:03:36.177432 - {NFS_SERVER_IP}: 192.168.201.1
335 11:03:36.177479 - {PRESEED_CONFIG}: None
336 11:03:36.177536 - {PRESEED_LOCAL}: None
337 11:03:36.177585 - {RAMDISK}: 14786780/tftp-deploy-of3oyt0l/ramdisk/ramdisk.cpio.gz
338 11:03:36.177632 - {ROOT_PART}: None
339 11:03:36.177679 - {ROOT}: None
340 11:03:36.177727 - {SERVER_IP}: 192.168.201.1
341 11:03:36.177774 - {TEE}: None
342 11:03:36.177821 Parsed boot commands:
343 11:03:36.177867 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 11:03:36.178006 Parsed boot commands: tftpboot 192.168.201.1 14786780/tftp-deploy-of3oyt0l/kernel/image.itb 14786780/tftp-deploy-of3oyt0l/kernel/cmdline
345 11:03:36.178101 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 11:03:36.178174 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 11:03:36.178246 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 11:03:36.178314 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 11:03:36.178368 Not connected, no need to disconnect.
350 11:03:36.178431 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 11:03:36.178496 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 11:03:36.178549 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-5'
353 11:03:36.181484 Setting prompt string to ['lava-test: # ']
354 11:03:36.181780 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 11:03:36.181874 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 11:03:36.181962 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 11:03:36.182039 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 11:03:36.182210 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=reboot']
359 11:03:45.334594 >> Command sent successfully.
360 11:03:45.337985 Returned 0 in 9 seconds
361 11:03:45.338137 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
363 11:03:45.338448 end: 2.2.2 reset-device (duration 00:00:09) [common]
364 11:03:45.338560 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
365 11:03:45.338662 Setting prompt string to 'Starting depthcharge on Juniper...'
366 11:03:45.338744 Changing prompt to 'Starting depthcharge on Juniper...'
367 11:03:45.338828 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
368 11:03:45.339321 [Enter `^Ec?' for help]
369 11:03:52.882777 [DL] 00000000 00000000 010701
370 11:03:52.887784
371 11:03:52.887884
372 11:03:52.887974 F0: 102B 0000
373 11:03:52.888063
374 11:03:52.888147 F3: 1006 0033 [0200]
375 11:03:52.890772
376 11:03:52.890876 F3: 4001 00E0 [0200]
377 11:03:52.890972
378 11:03:52.891058 F3: 0000 0000
379 11:03:52.891132
380 11:03:52.894161 V0: 0000 0000 [0001]
381 11:03:52.894237
382 11:03:52.894296 00: 1027 0002
383 11:03:52.894352
384 11:03:52.897487 01: 0000 0000
385 11:03:52.897591
386 11:03:52.897683 BP: 0C00 0251 [0000]
387 11:03:52.897764
388 11:03:52.901096 G0: 1182 0000
389 11:03:52.901196
390 11:03:52.901325 EC: 0004 0000 [0001]
391 11:03:52.901407
392 11:03:52.904257 S7: 0000 0000 [0000]
393 11:03:52.904350
394 11:03:52.904430 CC: 0000 0000 [0001]
395 11:03:52.904487
396 11:03:52.907554 T0: 0000 00DB [000F]
397 11:03:52.907654
398 11:03:52.907744 Jump to BL
399 11:03:52.907807
400 11:03:52.943456
401 11:03:52.943534
402 11:03:52.949919 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
403 11:03:52.953295 ARM64: Exception handlers installed.
404 11:03:52.956591 ARM64: Testing exception
405 11:03:52.959929 ARM64: Done test exception
406 11:03:52.963629 WDT: Last reset was cold boot
407 11:03:52.967504 SPI0(PAD0) initialized at 992727 Hz
408 11:03:52.970442 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
409 11:03:52.970519 Manufacturer: ef
410 11:03:52.977342 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
411 11:03:52.990076 Probing TPM: . done!
412 11:03:52.990153 TPM ready after 0 ms
413 11:03:52.996977 Connected to device vid:did:rid of 1ae0:0028:00
414 11:03:53.003560 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
415 11:03:53.037073 Initialized TPM device CR50 revision 0
416 11:03:53.048761 tlcl_send_startup: Startup return code is 0
417 11:03:53.048840 TPM: setup succeeded
418 11:03:53.057161 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
419 11:03:53.060320 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
420 11:03:53.063679 in-header: 03 19 00 00 08 00 00 00
421 11:03:53.066967 in-data: a2 e0 47 00 13 00 00 00
422 11:03:53.070233 Chrome EC: UHEPI supported
423 11:03:53.076933 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
424 11:03:53.080552 in-header: 03 a1 00 00 08 00 00 00
425 11:03:53.084211 in-data: 84 60 60 10 00 00 00 00
426 11:03:53.084288 Phase 1
427 11:03:53.087068 FMAP: area GBB found @ 3f5000 (12032 bytes)
428 11:03:53.093963 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
429 11:03:53.097376 VB2:vb2_check_recovery() Recovery was requested manually
430 11:03:53.103851 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
431 11:03:53.109352 Recovery requested (1009000e)
432 11:03:53.118505 tlcl_extend: response is 0
433 11:03:53.123905 tlcl_extend: response is 0
434 11:03:53.148952
435 11:03:53.149025
436 11:03:53.155534 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
437 11:03:53.158688 ARM64: Exception handlers installed.
438 11:03:53.161955 ARM64: Testing exception
439 11:03:53.165382 ARM64: Done test exception
440 11:03:53.181016 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xaa70, sec=0x2000
441 11:03:53.187743 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
442 11:03:53.190843 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
443 11:03:53.199290 [RTC]rtc_get_frequency_meter,134: input=0xf, output=777
444 11:03:53.205995 [RTC]rtc_get_frequency_meter,134: input=0x17, output=957
445 11:03:53.213157 [RTC]rtc_get_frequency_meter,134: input=0x13, output=867
446 11:03:53.220124 [RTC]rtc_get_frequency_meter,134: input=0x11, output=823
447 11:03:53.227490 [RTC]rtc_get_frequency_meter,134: input=0x10, output=800
448 11:03:53.234055 [RTC]rtc_get_frequency_meter,134: input=0xf, output=778
449 11:03:53.241022 [RTC]rtc_get_frequency_meter,134: input=0x10, output=800
450 11:03:53.244360 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xaa70
451 11:03:53.250950 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
452 11:03:53.254294 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
453 11:03:53.257773 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
454 11:03:53.261712 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
455 11:03:53.264735 in-header: 03 19 00 00 08 00 00 00
456 11:03:53.267896 in-data: a2 e0 47 00 13 00 00 00
457 11:03:53.271269 Chrome EC: UHEPI supported
458 11:03:53.277912 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
459 11:03:53.281620 in-header: 03 a1 00 00 08 00 00 00
460 11:03:53.284680 in-data: 84 60 60 10 00 00 00 00
461 11:03:53.288558 Skip loading cached calibration data
462 11:03:53.295281 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
463 11:03:53.298488 in-header: 03 a1 00 00 08 00 00 00
464 11:03:53.302177 in-data: 84 60 60 10 00 00 00 00
465 11:03:53.308275 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
466 11:03:53.311595 in-header: 03 a1 00 00 08 00 00 00
467 11:03:53.314941 in-data: 84 60 60 10 00 00 00 00
468 11:03:53.318151 ADC[3]: Raw value=1043865 ID=8
469 11:03:53.318227 Manufacturer: ef
470 11:03:53.325066 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
471 11:03:53.328230 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
472 11:03:53.331906 CBFS @ 21000 size 3d4000
473 11:03:53.335496 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
474 11:03:53.338639 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
475 11:03:53.342210 CBFS: Found @ offset 3c880 size 4b
476 11:03:53.345862 DRAM-K: Full Calibration
477 11:03:53.349280 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
478 11:03:53.352366 CBFS @ 21000 size 3d4000
479 11:03:53.359350 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
480 11:03:53.363030 CBFS: Locating 'fallback/dram'
481 11:03:53.366046 CBFS: Found @ offset 24b00 size 12268
482 11:03:53.392357 read SPI 0x45b44 0x1224c: 22775 us, 3263 KB/s, 26.104 Mbps
483 11:03:53.395776 ddr_geometry: 1, config: 0x0
484 11:03:53.399181 header.status = 0x0
485 11:03:53.402461 header.magic = 0x44524d4b (expected: 0x44524d4b)
486 11:03:53.406012 header.version = 0x5 (expected: 0x5)
487 11:03:53.409158 header.size = 0x8f0 (expected: 0x8f0)
488 11:03:53.409251 header.config = 0x0
489 11:03:53.412744 header.flags = 0x0
490 11:03:53.412805 header.checksum = 0x0
491 11:03:53.419809 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
492 11:03:53.425948 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
493 11:03:53.429433 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
494 11:03:53.432793 ddr_geometry:1
495 11:03:53.432857 [EMI] new MDL number = 1
496 11:03:53.436124 dram_cbt_mode_extern: 0
497 11:03:53.439891 dram_cbt_mode [RK0]: 0, [RK1]: 0
498 11:03:53.446219 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
499 11:03:53.446314
500 11:03:53.446400
501 11:03:53.446457 [Bianco] ETT version 0.0.0.1
502 11:03:53.452946 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
503 11:03:53.453043
504 11:03:53.456287 vSetVcoreByFreq with vcore:762500, freq=1600
505 11:03:53.456364
506 11:03:53.456423 [DramcInit]
507 11:03:53.459735 AutoRefreshCKEOff AutoREF OFF
508 11:03:53.463036 DDRPhyPLLSetting-CKEOFF
509 11:03:53.463140 DDRPhyPLLSetting-CKEON
510 11:03:53.466496
511 11:03:53.466573 Enable WDQS
512 11:03:53.469781 [ModeRegInit_LP4] CH0 RK0
513 11:03:53.473243 Write Rank0 MR13 =0x18
514 11:03:53.473351 Write Rank0 MR12 =0x5d
515 11:03:53.476438 Write Rank0 MR1 =0x56
516 11:03:53.480258 Write Rank0 MR2 =0x1a
517 11:03:53.480334 Write Rank0 MR11 =0x0
518 11:03:53.483558 Write Rank0 MR22 =0x38
519 11:03:53.483635 Write Rank0 MR14 =0x5d
520 11:03:53.487144 Write Rank0 MR3 =0x30
521 11:03:53.490033 Write Rank0 MR13 =0x58
522 11:03:53.490109 Write Rank0 MR12 =0x5d
523 11:03:53.493298 Write Rank0 MR1 =0x56
524 11:03:53.493374 Write Rank0 MR2 =0x2d
525 11:03:53.496691 Write Rank0 MR11 =0x23
526 11:03:53.500446 Write Rank0 MR22 =0x34
527 11:03:53.500522 Write Rank0 MR14 =0x10
528 11:03:53.503897 Write Rank0 MR3 =0x30
529 11:03:53.503973 Write Rank0 MR13 =0xd8
530 11:03:53.507101 [ModeRegInit_LP4] CH0 RK1
531 11:03:53.510430 Write Rank1 MR13 =0x18
532 11:03:53.510506 Write Rank1 MR12 =0x5d
533 11:03:53.513820 Write Rank1 MR1 =0x56
534 11:03:53.517136 Write Rank1 MR2 =0x1a
535 11:03:53.517215 Write Rank1 MR11 =0x0
536 11:03:53.520130 Write Rank1 MR22 =0x38
537 11:03:53.520206 Write Rank1 MR14 =0x5d
538 11:03:53.523502 Write Rank1 MR3 =0x30
539 11:03:53.526961 Write Rank1 MR13 =0x58
540 11:03:53.527038 Write Rank1 MR12 =0x5d
541 11:03:53.530549 Write Rank1 MR1 =0x56
542 11:03:53.530624 Write Rank1 MR2 =0x2d
543 11:03:53.533875 Write Rank1 MR11 =0x23
544 11:03:53.537011 Write Rank1 MR22 =0x34
545 11:03:53.537100 Write Rank1 MR14 =0x10
546 11:03:53.540501 Write Rank1 MR3 =0x30
547 11:03:53.540576 Write Rank1 MR13 =0xd8
548 11:03:53.543827 [ModeRegInit_LP4] CH1 RK0
549 11:03:53.547193 Write Rank0 MR13 =0x18
550 11:03:53.547269 Write Rank0 MR12 =0x5d
551 11:03:53.550855 Write Rank0 MR1 =0x56
552 11:03:53.550931 Write Rank0 MR2 =0x1a
553 11:03:53.554133 Write Rank0 MR11 =0x0
554 11:03:53.557163 Write Rank0 MR22 =0x38
555 11:03:53.557262 Write Rank0 MR14 =0x5d
556 11:03:53.560587 Write Rank0 MR3 =0x30
557 11:03:53.563982 Write Rank0 MR13 =0x58
558 11:03:53.564057 Write Rank0 MR12 =0x5d
559 11:03:53.567321 Write Rank0 MR1 =0x56
560 11:03:53.567396 Write Rank0 MR2 =0x2d
561 11:03:53.570796 Write Rank0 MR11 =0x23
562 11:03:53.570872 Write Rank0 MR22 =0x34
563 11:03:53.574223 Write Rank0 MR14 =0x10
564 11:03:53.577494 Write Rank0 MR3 =0x30
565 11:03:53.577569 Write Rank0 MR13 =0xd8
566 11:03:53.581215 [ModeRegInit_LP4] CH1 RK1
567 11:03:53.584246 Write Rank1 MR13 =0x18
568 11:03:53.584327 Write Rank1 MR12 =0x5d
569 11:03:53.587576 Write Rank1 MR1 =0x56
570 11:03:53.587653 Write Rank1 MR2 =0x1a
571 11:03:53.591213 Write Rank1 MR11 =0x0
572 11:03:53.594241 Write Rank1 MR22 =0x38
573 11:03:53.594316 Write Rank1 MR14 =0x5d
574 11:03:53.597477 Write Rank1 MR3 =0x30
575 11:03:53.597553 Write Rank1 MR13 =0x58
576 11:03:53.601375 Write Rank1 MR12 =0x5d
577 11:03:53.604602 Write Rank1 MR1 =0x56
578 11:03:53.604677 Write Rank1 MR2 =0x2d
579 11:03:53.607716 Write Rank1 MR11 =0x23
580 11:03:53.611060 Write Rank1 MR22 =0x34
581 11:03:53.611136 Write Rank1 MR14 =0x10
582 11:03:53.614375 Write Rank1 MR3 =0x30
583 11:03:53.614451 Write Rank1 MR13 =0xd8
584 11:03:53.618062 match AC timing 3
585 11:03:53.627776 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
586 11:03:53.627854 [MiockJmeterHQA]
587 11:03:53.631235 vSetVcoreByFreq with vcore:762500, freq=1600
588 11:03:53.735674
589 11:03:53.735798 MIOCK jitter meter ch=0
590 11:03:53.735861
591 11:03:53.739165 1T = (100-17) = 83 dly cells
592 11:03:53.745878 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 753/100 ps
593 11:03:53.748788 vSetVcoreByFreq with vcore:725000, freq=1200
594 11:03:53.847297
595 11:03:53.847404 MIOCK jitter meter ch=0
596 11:03:53.847466
597 11:03:53.850372 1T = (95-16) = 79 dly cells
598 11:03:53.857443 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
599 11:03:53.860922 vSetVcoreByFreq with vcore:725000, freq=800
600 11:03:53.958394
601 11:03:53.958487 MIOCK jitter meter ch=0
602 11:03:53.958547
603 11:03:53.961984 1T = (95-16) = 79 dly cells
604 11:03:53.968747 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
605 11:03:53.971964 vSetVcoreByFreq with vcore:762500, freq=1600
606 11:03:53.975278 vSetVcoreByFreq with vcore:762500, freq=1600
607 11:03:53.975342
608 11:03:53.975399 K DRVP
609 11:03:53.978519 1. OCD DRVP=0 CALOUT=0
610 11:03:53.981905 1. OCD DRVP=1 CALOUT=0
611 11:03:53.981975 1. OCD DRVP=2 CALOUT=0
612 11:03:53.985359 1. OCD DRVP=3 CALOUT=0
613 11:03:53.985430 1. OCD DRVP=4 CALOUT=0
614 11:03:53.988728 1. OCD DRVP=5 CALOUT=0
615 11:03:53.992477 1. OCD DRVP=6 CALOUT=0
616 11:03:53.992545 1. OCD DRVP=7 CALOUT=0
617 11:03:53.995404 1. OCD DRVP=8 CALOUT=1
618 11:03:53.995485
619 11:03:53.998812 1. OCD DRVP calibration OK! DRVP=8
620 11:03:53.998889
621 11:03:53.998947
622 11:03:53.999001
623 11:03:53.999052 K ODTN
624 11:03:54.002326 3. OCD ODTN=0 ,CALOUT=1
625 11:03:54.002403 3. OCD ODTN=1 ,CALOUT=1
626 11:03:54.005956 3. OCD ODTN=2 ,CALOUT=1
627 11:03:54.009143 3. OCD ODTN=3 ,CALOUT=1
628 11:03:54.009220 3. OCD ODTN=4 ,CALOUT=1
629 11:03:54.012449 3. OCD ODTN=5 ,CALOUT=1
630 11:03:54.015754 3. OCD ODTN=6 ,CALOUT=1
631 11:03:54.015830 3. OCD ODTN=7 ,CALOUT=0
632 11:03:54.015891
633 11:03:54.019431 3. OCD ODTN calibration OK! ODTN=7
634 11:03:54.019508
635 11:03:54.022222 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
636 11:03:54.029459 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
637 11:03:54.032816 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
638 11:03:54.032892
639 11:03:54.032979 K DRVP
640 11:03:54.035807 1. OCD DRVP=0 CALOUT=0
641 11:03:54.039341 1. OCD DRVP=1 CALOUT=0
642 11:03:54.039419 1. OCD DRVP=2 CALOUT=0
643 11:03:54.042764 1. OCD DRVP=3 CALOUT=0
644 11:03:54.042842 1. OCD DRVP=4 CALOUT=0
645 11:03:54.046237 1. OCD DRVP=5 CALOUT=0
646 11:03:54.049353 1. OCD DRVP=6 CALOUT=0
647 11:03:54.049434 1. OCD DRVP=7 CALOUT=0
648 11:03:54.052688 1. OCD DRVP=8 CALOUT=0
649 11:03:54.055881 1. OCD DRVP=9 CALOUT=0
650 11:03:54.055958 1. OCD DRVP=10 CALOUT=1
651 11:03:54.056017
652 11:03:54.059372 1. OCD DRVP calibration OK! DRVP=10
653 11:03:54.059449
654 11:03:54.059507
655 11:03:54.059561
656 11:03:54.062519 K ODTN
657 11:03:54.062594 3. OCD ODTN=0 ,CALOUT=1
658 11:03:54.066023 3. OCD ODTN=1 ,CALOUT=1
659 11:03:54.066100 3. OCD ODTN=2 ,CALOUT=1
660 11:03:54.069557 3. OCD ODTN=3 ,CALOUT=1
661 11:03:54.072814 3. OCD ODTN=4 ,CALOUT=1
662 11:03:54.072891 3. OCD ODTN=5 ,CALOUT=1
663 11:03:54.076118 3. OCD ODTN=6 ,CALOUT=1
664 11:03:54.079289 3. OCD ODTN=7 ,CALOUT=1
665 11:03:54.079386 3. OCD ODTN=8 ,CALOUT=1
666 11:03:54.082969 3. OCD ODTN=9 ,CALOUT=1
667 11:03:54.086413 3. OCD ODTN=10 ,CALOUT=1
668 11:03:54.086509 3. OCD ODTN=11 ,CALOUT=1
669 11:03:54.089499 3. OCD ODTN=12 ,CALOUT=1
670 11:03:54.092876 3. OCD ODTN=13 ,CALOUT=1
671 11:03:54.092977 3. OCD ODTN=14 ,CALOUT=1
672 11:03:54.096244 3. OCD ODTN=15 ,CALOUT=0
673 11:03:54.096322
674 11:03:54.099868 3. OCD ODTN calibration OK! ODTN=15
675 11:03:54.099946
676 11:03:54.103096 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
677 11:03:54.106277 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
678 11:03:54.112860 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
679 11:03:54.112936
680 11:03:54.112995 [DramcInit]
681 11:03:54.116357 AutoRefreshCKEOff AutoREF OFF
682 11:03:54.119822 DDRPhyPLLSetting-CKEOFF
683 11:03:54.119918 DDRPhyPLLSetting-CKEON
684 11:03:54.120004
685 11:03:54.123114 Enable WDQS
686 11:03:54.123216 ==
687 11:03:54.126779 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
688 11:03:54.130121 fsp= 1, odt_onoff= 1, Byte mode= 0
689 11:03:54.130198 ==
690 11:03:54.133175 [Duty_Offset_Calibration]
691 11:03:54.133283
692 11:03:54.136438 ===========================
693 11:03:54.136514 B0:1 B1:0 CA:0
694 11:03:54.158043 ==
695 11:03:54.161506 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
696 11:03:54.164486 fsp= 1, odt_onoff= 1, Byte mode= 0
697 11:03:54.164554 ==
698 11:03:54.168149 [Duty_Offset_Calibration]
699 11:03:54.168212
700 11:03:54.171175 ===========================
701 11:03:54.171237 B0:1 B1:0 CA:-1
702 11:03:54.205537 [ModeRegInit_LP4] CH0 RK0
703 11:03:54.208911 Write Rank0 MR13 =0x18
704 11:03:54.208978 Write Rank0 MR12 =0x5d
705 11:03:54.212577 Write Rank0 MR1 =0x56
706 11:03:54.215965 Write Rank0 MR2 =0x1a
707 11:03:54.216029 Write Rank0 MR11 =0x0
708 11:03:54.219506 Write Rank0 MR22 =0x38
709 11:03:54.219569 Write Rank0 MR14 =0x5d
710 11:03:54.222424 Write Rank0 MR3 =0x30
711 11:03:54.225927 Write Rank0 MR13 =0x58
712 11:03:54.225987 Write Rank0 MR12 =0x5d
713 11:03:54.229128 Write Rank0 MR1 =0x56
714 11:03:54.229217 Write Rank0 MR2 =0x2d
715 11:03:54.232333 Write Rank0 MR11 =0x23
716 11:03:54.235979 Write Rank0 MR22 =0x34
717 11:03:54.236068 Write Rank0 MR14 =0x10
718 11:03:54.239548 Write Rank0 MR3 =0x30
719 11:03:54.239620 Write Rank0 MR13 =0xd8
720 11:03:54.242738 [ModeRegInit_LP4] CH0 RK1
721 11:03:54.245774 Write Rank1 MR13 =0x18
722 11:03:54.245859 Write Rank1 MR12 =0x5d
723 11:03:54.249161 Write Rank1 MR1 =0x56
724 11:03:54.253241 Write Rank1 MR2 =0x1a
725 11:03:54.253347 Write Rank1 MR11 =0x0
726 11:03:54.256431 Write Rank1 MR22 =0x38
727 11:03:54.256518 Write Rank1 MR14 =0x5d
728 11:03:54.259812 Write Rank1 MR3 =0x30
729 11:03:54.263291 Write Rank1 MR13 =0x58
730 11:03:54.263385 Write Rank1 MR12 =0x5d
731 11:03:54.266612 Write Rank1 MR1 =0x56
732 11:03:54.266775 Write Rank1 MR2 =0x2d
733 11:03:54.269588 Write Rank1 MR11 =0x23
734 11:03:54.273222 Write Rank1 MR22 =0x34
735 11:03:54.273346 Write Rank1 MR14 =0x10
736 11:03:54.276170 Write Rank1 MR3 =0x30
737 11:03:54.276295 Write Rank1 MR13 =0xd8
738 11:03:54.279700 [ModeRegInit_LP4] CH1 RK0
739 11:03:54.283285 Write Rank0 MR13 =0x18
740 11:03:54.283430 Write Rank0 MR12 =0x5d
741 11:03:54.286724 Write Rank0 MR1 =0x56
742 11:03:54.289912 Write Rank0 MR2 =0x1a
743 11:03:54.290103 Write Rank0 MR11 =0x0
744 11:03:54.293305 Write Rank0 MR22 =0x38
745 11:03:54.293554 Write Rank0 MR14 =0x5d
746 11:03:54.297140 Write Rank0 MR3 =0x30
747 11:03:54.300765 Write Rank0 MR13 =0x58
748 11:03:54.301110 Write Rank0 MR12 =0x5d
749 11:03:54.303503 Write Rank0 MR1 =0x56
750 11:03:54.303862 Write Rank0 MR2 =0x2d
751 11:03:54.307114 Write Rank0 MR11 =0x23
752 11:03:54.310481 Write Rank0 MR22 =0x34
753 11:03:54.310913 Write Rank0 MR14 =0x10
754 11:03:54.313738 Write Rank0 MR3 =0x30
755 11:03:54.314170 Write Rank0 MR13 =0xd8
756 11:03:54.317647 [ModeRegInit_LP4] CH1 RK1
757 11:03:54.320449 Write Rank1 MR13 =0x18
758 11:03:54.320994 Write Rank1 MR12 =0x5d
759 11:03:54.323953 Write Rank1 MR1 =0x56
760 11:03:54.324380 Write Rank1 MR2 =0x1a
761 11:03:54.327289 Write Rank1 MR11 =0x0
762 11:03:54.330393 Write Rank1 MR22 =0x38
763 11:03:54.330968 Write Rank1 MR14 =0x5d
764 11:03:54.334267 Write Rank1 MR3 =0x30
765 11:03:54.337128 Write Rank1 MR13 =0x58
766 11:03:54.337653 Write Rank1 MR12 =0x5d
767 11:03:54.340480 Write Rank1 MR1 =0x56
768 11:03:54.340909 Write Rank1 MR2 =0x2d
769 11:03:54.343872 Write Rank1 MR11 =0x23
770 11:03:54.347396 Write Rank1 MR22 =0x34
771 11:03:54.347967 Write Rank1 MR14 =0x10
772 11:03:54.350413 Write Rank1 MR3 =0x30
773 11:03:54.350934 Write Rank1 MR13 =0xd8
774 11:03:54.354325 match AC timing 3
775 11:03:54.364358 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
776 11:03:54.364755 DramC Write-DBI off
777 11:03:54.367592 DramC Read-DBI off
778 11:03:54.368055 Write Rank0 MR13 =0x59
779 11:03:54.368358 ==
780 11:03:54.374398 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
781 11:03:54.377876 fsp= 1, odt_onoff= 1, Byte mode= 0
782 11:03:54.378268 ==
783 11:03:54.380838 === u2Vref_new: 0x56 --> 0x2d
784 11:03:54.384636 === u2Vref_new: 0x58 --> 0x38
785 11:03:54.387647 === u2Vref_new: 0x5a --> 0x39
786 11:03:54.391137 === u2Vref_new: 0x5c --> 0x3c
787 11:03:54.391528 === u2Vref_new: 0x5e --> 0x3d
788 11:03:54.394818 === u2Vref_new: 0x60 --> 0xa0
789 11:03:54.398114 [CA 0] Center 33 (4~63) winsize 60
790 11:03:54.401633 [CA 1] Center 34 (5~63) winsize 59
791 11:03:54.404471 [CA 2] Center 27 (0~55) winsize 56
792 11:03:54.407867 [CA 3] Center 23 (-4~51) winsize 56
793 11:03:54.411236 [CA 4] Center 24 (-3~52) winsize 56
794 11:03:54.414625 [CA 5] Center 28 (-1~58) winsize 60
795 11:03:54.415015
796 11:03:54.418182 [CATrainingPosCal] consider 1 rank data
797 11:03:54.421302 u2DelayCellTimex100 = 753/100 ps
798 11:03:54.424878 CA0 delay=33 (4~63),Diff = 10 PI (12 cell)
799 11:03:54.428258 CA1 delay=34 (5~63),Diff = 11 PI (14 cell)
800 11:03:54.431609 CA2 delay=27 (0~55),Diff = 4 PI (5 cell)
801 11:03:54.434725 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
802 11:03:54.441612 CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)
803 11:03:54.445149 CA5 delay=28 (-1~58),Diff = 5 PI (6 cell)
804 11:03:54.445730
805 11:03:54.448519 CA PerBit enable=1, Macro0, CA PI delay=23
806 11:03:54.452012 === u2Vref_new: 0x58 --> 0x38
807 11:03:54.452444
808 11:03:54.452779 Vref(ca) range 1: 24
809 11:03:54.453086
810 11:03:54.455063 CS Dly= 11 (42-0-32)
811 11:03:54.458178 Write Rank0 MR13 =0xd8
812 11:03:54.458608 Write Rank0 MR13 =0xd8
813 11:03:54.461695 Write Rank0 MR12 =0x58
814 11:03:54.462124 Write Rank1 MR13 =0x59
815 11:03:54.462455 ==
816 11:03:54.468217 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
817 11:03:54.472095 fsp= 1, odt_onoff= 1, Byte mode= 0
818 11:03:54.472609 ==
819 11:03:54.475028 === u2Vref_new: 0x56 --> 0x2d
820 11:03:54.478325 === u2Vref_new: 0x58 --> 0x38
821 11:03:54.481851 === u2Vref_new: 0x5a --> 0x39
822 11:03:54.485031 === u2Vref_new: 0x5c --> 0x3c
823 11:03:54.485556 === u2Vref_new: 0x5e --> 0x3d
824 11:03:54.488861 === u2Vref_new: 0x60 --> 0xa0
825 11:03:54.492173 [CA 0] Center 33 (4~63) winsize 60
826 11:03:54.495595 [CA 1] Center 34 (5~63) winsize 59
827 11:03:54.499003 [CA 2] Center 28 (0~56) winsize 57
828 11:03:54.502162 [CA 3] Center 23 (-4~51) winsize 56
829 11:03:54.505610 [CA 4] Center 24 (-3~52) winsize 56
830 11:03:54.509181 [CA 5] Center 29 (1~58) winsize 58
831 11:03:54.509729
832 11:03:54.512146 [CATrainingPosCal] consider 2 rank data
833 11:03:54.515652 u2DelayCellTimex100 = 753/100 ps
834 11:03:54.518698 CA0 delay=33 (4~63),Diff = 10 PI (12 cell)
835 11:03:54.522232 CA1 delay=34 (5~63),Diff = 11 PI (14 cell)
836 11:03:54.525575 CA2 delay=27 (0~55),Diff = 4 PI (5 cell)
837 11:03:54.529297 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
838 11:03:54.532657 CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)
839 11:03:54.539298 CA5 delay=29 (1~58),Diff = 6 PI (7 cell)
840 11:03:54.539769
841 11:03:54.542392 CA PerBit enable=1, Macro0, CA PI delay=23
842 11:03:54.546320 === u2Vref_new: 0x56 --> 0x2d
843 11:03:54.546794
844 11:03:54.547126 Vref(ca) range 1: 22
845 11:03:54.547436
846 11:03:54.549578 CS Dly= 7 (38-0-32)
847 11:03:54.550085 Write Rank1 MR13 =0xd8
848 11:03:54.552858 Write Rank1 MR13 =0xd8
849 11:03:54.556076 Write Rank1 MR12 =0x56
850 11:03:54.559432 [RankSwap] Rank num 2, (Multi 1), Rank 0
851 11:03:54.559865 Write Rank0 MR2 =0xad
852 11:03:54.562913 [Write Leveling]
853 11:03:54.566372 delay byte0 byte1 byte2 byte3
854 11:03:54.566908
855 11:03:54.567397 10 0 0
856 11:03:54.567751 11 0 0
857 11:03:54.569742 12 0 0
858 11:03:54.570257 13 0 0
859 11:03:54.572966 14 0 0
860 11:03:54.573467 15 0 0
861 11:03:54.576217 16 0 0
862 11:03:54.576668 17 0 0
863 11:03:54.577007 18 0 0
864 11:03:54.579547 19 0 0
865 11:03:54.579982 20 0 0
866 11:03:54.582967 21 0 0
867 11:03:54.583407 22 0 0
868 11:03:54.583763 23 0 0
869 11:03:54.586107 24 0 0
870 11:03:54.586546 25 0 0
871 11:03:54.589923 26 0 0
872 11:03:54.590360 27 0 0
873 11:03:54.593068 28 0 ff
874 11:03:54.593581 29 0 ff
875 11:03:54.593929 30 0 ff
876 11:03:54.596698 31 0 ff
877 11:03:54.597291 32 0 ff
878 11:03:54.599960 33 ff ff
879 11:03:54.600445 34 ff ff
880 11:03:54.603196 35 ff ff
881 11:03:54.603631 36 ff ff
882 11:03:54.606995 37 ff ff
883 11:03:54.607511 38 ff ff
884 11:03:54.607849 39 ff ff
885 11:03:54.613620 pass bytecount = 0xff (0xff: all bytes pass)
886 11:03:54.614115
887 11:03:54.614449 DQS0 dly: 33
888 11:03:54.614756 DQS1 dly: 28
889 11:03:54.617001 Write Rank0 MR2 =0x2d
890 11:03:54.620298 [RankSwap] Rank num 2, (Multi 1), Rank 0
891 11:03:54.623614 Write Rank0 MR1 =0xd6
892 11:03:54.624117 [Gating]
893 11:03:54.624449 ==
894 11:03:54.630088 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
895 11:03:54.630520 fsp= 1, odt_onoff= 1, Byte mode= 0
896 11:03:54.633595 ==
897 11:03:54.636655 3 1 0 |3534 3131 |(11 11)(11 11) |(1 1)(1 1)| 0
898 11:03:54.640144 3 1 4 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
899 11:03:54.643485 3 1 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
900 11:03:54.650162 3 1 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
901 11:03:54.654189 3 1 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
902 11:03:54.657362 3 1 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
903 11:03:54.663457 3 1 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
904 11:03:54.666740 3 1 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
905 11:03:54.670579 3 2 0 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
906 11:03:54.673793 3 2 4 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0
907 11:03:54.680479 3 2 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
908 11:03:54.684023 3 2 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
909 11:03:54.687181 3 2 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
910 11:03:54.693649 3 2 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
911 11:03:54.697090 3 2 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
912 11:03:54.700727 3 2 28 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
913 11:03:54.707302 3 3 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
914 11:03:54.710606 3 3 4 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
915 11:03:54.714045 3 3 8 |201 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
916 11:03:54.717422 [Byte 0] Lead/lag Transition tap number (1)
917 11:03:54.720599 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
918 11:03:54.727589 [Byte 1] Lead/lag falling Transition (3, 3, 12)
919 11:03:54.730874 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
920 11:03:54.734412 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
921 11:03:54.741012 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
922 11:03:54.744171 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
923 11:03:54.747979 3 4 0 |b0a 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
924 11:03:54.750895 3 4 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
925 11:03:54.757591 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
926 11:03:54.761362 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
927 11:03:54.764558 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 11:03:54.771370 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 11:03:54.774400 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 11:03:54.778088 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 11:03:54.784671 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 11:03:54.788023 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 11:03:54.791181 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 11:03:54.794776 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
935 11:03:54.801410 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
936 11:03:54.805100 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
937 11:03:54.808182 [Byte 0] Lead/lag falling Transition (3, 5, 20)
938 11:03:54.814751 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
939 11:03:54.818138 [Byte 1] Lead/lag falling Transition (3, 5, 24)
940 11:03:54.821672 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
941 11:03:54.824911 [Byte 0] Lead/lag Transition tap number (3)
942 11:03:54.828321 [Byte 1] Lead/lag Transition tap number (2)
943 11:03:54.835130 3 6 0 |2222 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
944 11:03:54.838514 3 6 4 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
945 11:03:54.841717 [Byte 0]First pass (3, 6, 4)
946 11:03:54.845135 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
947 11:03:54.848543 [Byte 1]First pass (3, 6, 8)
948 11:03:54.852037 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 11:03:54.855130 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
950 11:03:54.858718 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 11:03:54.865142 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 11:03:54.868475 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 11:03:54.872119 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 11:03:54.875667 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
955 11:03:54.878633 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
956 11:03:54.882114 All bytes gating window > 1UI, Early break!
957 11:03:54.882842
958 11:03:54.888735 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
959 11:03:54.889118
960 11:03:54.892190 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
961 11:03:54.892569
962 11:03:54.892865
963 11:03:54.893137
964 11:03:54.895749 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
965 11:03:54.896162
966 11:03:54.898726 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
967 11:03:54.899108
968 11:03:54.899404
969 11:03:54.902266 Write Rank0 MR1 =0x56
970 11:03:54.902650
971 11:03:54.905533 best RODT dly(2T, 0.5T) = (2, 2)
972 11:03:54.905961
973 11:03:54.909128 best RODT dly(2T, 0.5T) = (2, 2)
974 11:03:54.909611 ==
975 11:03:54.912420 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
976 11:03:54.916405 fsp= 1, odt_onoff= 1, Byte mode= 0
977 11:03:54.916865 ==
978 11:03:54.922862 Start DQ dly to find pass range UseTestEngine =0
979 11:03:54.926005 x-axis: bit #, y-axis: DQ dly (-127~63)
980 11:03:54.926495 RX Vref Scan = 0
981 11:03:54.929159 -26, [0] xxxxxxxx xxxxxxxx [MSB]
982 11:03:54.933031 -25, [0] xxxxxxxx xxxxxxxx [MSB]
983 11:03:54.936110 -24, [0] xxxxxxxx xxxxxxxx [MSB]
984 11:03:54.939555 -23, [0] xxxxxxxx xxxxxxxx [MSB]
985 11:03:54.939950 -22, [0] xxxxxxxx xxxxxxxx [MSB]
986 11:03:54.943319 -21, [0] xxxxxxxx xxxxxxxx [MSB]
987 11:03:54.946066 -20, [0] xxxxxxxx xxxxxxxx [MSB]
988 11:03:54.949471 -19, [0] xxxxxxxx xxxxxxxx [MSB]
989 11:03:54.952767 -18, [0] xxxxxxxx xxxxxxxx [MSB]
990 11:03:54.956203 -17, [0] xxxxxxxx xxxxxxxx [MSB]
991 11:03:54.959645 -16, [0] xxxxxxxx xxxxxxxx [MSB]
992 11:03:54.960125 -15, [0] xxxxxxxx xxxxxxxx [MSB]
993 11:03:54.963048 -14, [0] xxxxxxxx xxxxxxxx [MSB]
994 11:03:54.966563 -13, [0] xxxxxxxx xxxxxxxx [MSB]
995 11:03:54.970650 -12, [0] xxxxxxxx xxxxxxxx [MSB]
996 11:03:54.973845 -11, [0] xxxxxxxx xxxxxxxx [MSB]
997 11:03:54.976502 -10, [0] xxxxxxxx xxxxxxxx [MSB]
998 11:03:54.980376 -9, [0] xxxxxxxx xxxxxxxx [MSB]
999 11:03:54.980803 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1000 11:03:54.983197 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1001 11:03:54.987000 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1002 11:03:54.989973 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1003 11:03:54.993574 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1004 11:03:54.997411 -3, [0] xxxoxxxx xxxxxxxx [MSB]
1005 11:03:55.000621 -2, [0] xxxoxxxx xxxxxxxx [MSB]
1006 11:03:55.001124 -1, [0] xxxoxoxx xxxxxxxx [MSB]
1007 11:03:55.003856 0, [0] xxxoxooo xxxxxoxx [MSB]
1008 11:03:55.007044 1, [0] xxxoxooo oxxxxoxx [MSB]
1009 11:03:55.010344 2, [0] xxxoxooo ooxxooxx [MSB]
1010 11:03:55.013404 3, [0] xxxoxooo ooxooooo [MSB]
1011 11:03:55.013658 4, [0] xxxoxooo ooxooooo [MSB]
1012 11:03:55.016749 5, [0] xxxoxooo oooooooo [MSB]
1013 11:03:55.019802 6, [0] xxoooooo oooooooo [MSB]
1014 11:03:55.023152 7, [0] xooooooo oooooooo [MSB]
1015 11:03:55.026374 31, [0] oooxoooo oooooooo [MSB]
1016 11:03:55.030093 32, [0] oooxoooo oooooooo [MSB]
1017 11:03:55.033207 33, [0] oooxoxxo oooooooo [MSB]
1018 11:03:55.033326 34, [0] oooxoxxo ooooooxo [MSB]
1019 11:03:55.036405 35, [0] oooxoxxo xooxooxo [MSB]
1020 11:03:55.039857 36, [0] oooxoxxo xooxooxo [MSB]
1021 11:03:55.043483 37, [0] oooxoxxx xooxoxxo [MSB]
1022 11:03:55.046549 38, [0] oooxoxxx xooxxxxo [MSB]
1023 11:03:55.050130 39, [0] oooxxxxx xxoxxxxx [MSB]
1024 11:03:55.050207 40, [0] oxoxxxxx xxoxxxxx [MSB]
1025 11:03:55.053561 41, [0] oxxxxxxx xxxxxxxx [MSB]
1026 11:03:55.056607 42, [0] xxxxxxxx xxxxxxxx [MSB]
1027 11:03:55.060233 iDelay=42, Bit 0, Center 24 (8 ~ 41) 34
1028 11:03:55.063368 iDelay=42, Bit 1, Center 23 (7 ~ 39) 33
1029 11:03:55.066884 iDelay=42, Bit 2, Center 23 (6 ~ 40) 35
1030 11:03:55.070266 iDelay=42, Bit 3, Center 13 (-3 ~ 30) 34
1031 11:03:55.073825 iDelay=42, Bit 4, Center 22 (6 ~ 38) 33
1032 11:03:55.080214 iDelay=42, Bit 5, Center 15 (-1 ~ 32) 34
1033 11:03:55.083780 iDelay=42, Bit 6, Center 16 (0 ~ 32) 33
1034 11:03:55.087295 iDelay=42, Bit 7, Center 18 (0 ~ 36) 37
1035 11:03:55.090336 iDelay=42, Bit 8, Center 17 (1 ~ 34) 34
1036 11:03:55.093634 iDelay=42, Bit 9, Center 20 (2 ~ 38) 37
1037 11:03:55.097205 iDelay=42, Bit 10, Center 22 (5 ~ 40) 36
1038 11:03:55.100394 iDelay=42, Bit 11, Center 18 (3 ~ 34) 32
1039 11:03:55.104041 iDelay=42, Bit 12, Center 19 (2 ~ 37) 36
1040 11:03:55.107609 iDelay=42, Bit 13, Center 18 (0 ~ 36) 37
1041 11:03:55.110873 iDelay=42, Bit 14, Center 18 (3 ~ 33) 31
1042 11:03:55.114194 iDelay=42, Bit 15, Center 20 (3 ~ 38) 36
1043 11:03:55.114724 ==
1044 11:03:55.120874 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1045 11:03:55.124644 fsp= 1, odt_onoff= 1, Byte mode= 0
1046 11:03:55.125122 ==
1047 11:03:55.125523 DQS Delay:
1048 11:03:55.127532 DQS0 = 0, DQS1 = 0
1049 11:03:55.127953 DQM Delay:
1050 11:03:55.130979 DQM0 = 19, DQM1 = 19
1051 11:03:55.131405 DQ Delay:
1052 11:03:55.134484 DQ0 =24, DQ1 =23, DQ2 =23, DQ3 =13
1053 11:03:55.138002 DQ4 =22, DQ5 =15, DQ6 =16, DQ7 =18
1054 11:03:55.141291 DQ8 =17, DQ9 =20, DQ10 =22, DQ11 =18
1055 11:03:55.144720 DQ12 =19, DQ13 =18, DQ14 =18, DQ15 =20
1056 11:03:55.145204
1057 11:03:55.145594
1058 11:03:55.145900 DramC Write-DBI off
1059 11:03:55.146193 ==
1060 11:03:55.150979 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1061 11:03:55.154341 fsp= 1, odt_onoff= 1, Byte mode= 0
1062 11:03:55.154819 ==
1063 11:03:55.158265 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1064 11:03:55.158690
1065 11:03:55.161406 Begin, DQ Scan Range 924~1180
1066 11:03:55.161918
1067 11:03:55.162358
1068 11:03:55.164727 TX Vref Scan disable
1069 11:03:55.168225 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1070 11:03:55.171442 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1071 11:03:55.174839 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1072 11:03:55.178320 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1073 11:03:55.181605 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1074 11:03:55.184908 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1075 11:03:55.188405 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1076 11:03:55.191715 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1077 11:03:55.195186 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1078 11:03:55.198357 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1079 11:03:55.201576 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1080 11:03:55.204910 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1081 11:03:55.208421 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1082 11:03:55.211734 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1083 11:03:55.214908 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1084 11:03:55.218484 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1085 11:03:55.225103 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1086 11:03:55.228721 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1087 11:03:55.232107 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1088 11:03:55.235455 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1089 11:03:55.238543 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1090 11:03:55.242045 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1091 11:03:55.245166 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1092 11:03:55.248700 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1093 11:03:55.252304 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1094 11:03:55.255404 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1095 11:03:55.259271 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1096 11:03:55.262228 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1097 11:03:55.265755 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1098 11:03:55.269217 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1099 11:03:55.272820 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1100 11:03:55.276240 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1101 11:03:55.279362 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1102 11:03:55.282576 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1103 11:03:55.286156 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1104 11:03:55.289465 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1105 11:03:55.292607 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1106 11:03:55.296060 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1107 11:03:55.299745 962 |3 6 2|[0] xxxxxxxx oxxxxxxx [MSB]
1108 11:03:55.306073 963 |3 6 3|[0] xxxxxxxx ooxoxxxx [MSB]
1109 11:03:55.309428 964 |3 6 4|[0] xxxxxxxx ooxoooox [MSB]
1110 11:03:55.312840 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1111 11:03:55.316221 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1112 11:03:55.319721 967 |3 6 7|[0] xxxxxxxx ooxooooo [MSB]
1113 11:03:55.322892 968 |3 6 8|[0] xxxxxxxx ooxooooo [MSB]
1114 11:03:55.326479 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
1115 11:03:55.329604 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1116 11:03:55.333169 971 |3 6 11|[0] xxxoxoxx oooooooo [MSB]
1117 11:03:55.336646 972 |3 6 12|[0] xxxoxooo oooooooo [MSB]
1118 11:03:55.339634 973 |3 6 13|[0] xxxoxooo oooooooo [MSB]
1119 11:03:55.342933 974 |3 6 14|[0] xxxoxooo oooooooo [MSB]
1120 11:03:55.346627 975 |3 6 15|[0] xxoooooo oooooooo [MSB]
1121 11:03:55.353202 988 |3 6 28|[0] oooooooo xooooxoo [MSB]
1122 11:03:55.356669 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1123 11:03:55.360532 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1124 11:03:55.363107 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1125 11:03:55.367211 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1126 11:03:55.370072 993 |3 6 33|[0] oooxoxxo xxxxxxxx [MSB]
1127 11:03:55.373615 994 |3 6 34|[0] xxxxxxxx xxxxxxxx [MSB]
1128 11:03:55.377395 Byte0, DQ PI dly=982, DQM PI dly= 982
1129 11:03:55.380380 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1130 11:03:55.380845
1131 11:03:55.383797 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1132 11:03:55.384305
1133 11:03:55.387204 Byte1, DQ PI dly=976, DQM PI dly= 976
1134 11:03:55.393769 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1135 11:03:55.394193
1136 11:03:55.396990 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1137 11:03:55.397417
1138 11:03:55.397718 ==
1139 11:03:55.403814 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1140 11:03:55.407168 fsp= 1, odt_onoff= 1, Byte mode= 0
1141 11:03:55.407552 ==
1142 11:03:55.410863 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1143 11:03:55.411244
1144 11:03:55.413882 Begin, DQ Scan Range 952~1016
1145 11:03:55.414262 Write Rank0 MR14 =0x0
1146 11:03:55.424019
1147 11:03:55.424440 CH=0, VrefRange= 0, VrefLevel = 0
1148 11:03:55.430635 TX Bit0 (977~994) 18 985, Bit8 (965~983) 19 974,
1149 11:03:55.433927 TX Bit1 (977~992) 16 984, Bit9 (966~984) 19 975,
1150 11:03:55.440604 TX Bit2 (977~993) 17 985, Bit10 (969~989) 21 979,
1151 11:03:55.443873 TX Bit3 (970~987) 18 978, Bit11 (966~984) 19 975,
1152 11:03:55.447203 TX Bit4 (976~993) 18 984, Bit12 (967~985) 19 976,
1153 11:03:55.453735 TX Bit5 (974~989) 16 981, Bit13 (967~983) 17 975,
1154 11:03:55.457093 TX Bit6 (975~990) 16 982, Bit14 (967~983) 17 975,
1155 11:03:55.460675 TX Bit7 (976~992) 17 984, Bit15 (968~987) 20 977,
1156 11:03:55.461161
1157 11:03:55.464166 Write Rank0 MR14 =0x2
1158 11:03:55.472889
1159 11:03:55.473392 CH=0, VrefRange= 0, VrefLevel = 2
1160 11:03:55.479392 TX Bit0 (977~995) 19 986, Bit8 (964~983) 20 973,
1161 11:03:55.482680 TX Bit1 (977~992) 16 984, Bit9 (966~984) 19 975,
1162 11:03:55.486409 TX Bit2 (977~994) 18 985, Bit10 (970~989) 20 979,
1163 11:03:55.492654 TX Bit3 (970~988) 19 979, Bit11 (965~984) 20 974,
1164 11:03:55.496448 TX Bit4 (976~994) 19 985, Bit12 (967~985) 19 976,
1165 11:03:55.503269 TX Bit5 (974~989) 16 981, Bit13 (966~983) 18 974,
1166 11:03:55.506431 TX Bit6 (975~990) 16 982, Bit14 (966~983) 18 974,
1167 11:03:55.509635 TX Bit7 (975~992) 18 983, Bit15 (969~988) 20 978,
1168 11:03:55.510102
1169 11:03:55.512825 Write Rank0 MR14 =0x4
1170 11:03:55.521346
1171 11:03:55.521781 CH=0, VrefRange= 0, VrefLevel = 4
1172 11:03:55.528200 TX Bit0 (977~995) 19 986, Bit8 (963~984) 22 973,
1173 11:03:55.531504 TX Bit1 (976~993) 18 984, Bit9 (965~985) 21 975,
1174 11:03:55.534799 TX Bit2 (977~994) 18 985, Bit10 (969~989) 21 979,
1175 11:03:55.541341 TX Bit3 (970~989) 20 979, Bit11 (965~985) 21 975,
1176 11:03:55.544820 TX Bit4 (976~995) 20 985, Bit12 (966~986) 21 976,
1177 11:03:55.551775 TX Bit5 (974~990) 17 982, Bit13 (966~984) 19 975,
1178 11:03:55.554998 TX Bit6 (975~990) 16 982, Bit14 (966~984) 19 975,
1179 11:03:55.558152 TX Bit7 (975~992) 18 983, Bit15 (968~988) 21 978,
1180 11:03:55.558689
1181 11:03:55.561342 Write Rank0 MR14 =0x6
1182 11:03:55.570092
1183 11:03:55.570565 CH=0, VrefRange= 0, VrefLevel = 6
1184 11:03:55.577160 TX Bit0 (977~996) 20 986, Bit8 (963~984) 22 973,
1185 11:03:55.580017 TX Bit1 (977~993) 17 985, Bit9 (965~985) 21 975,
1186 11:03:55.583587 TX Bit2 (976~994) 19 985, Bit10 (969~990) 22 979,
1187 11:03:55.590249 TX Bit3 (970~990) 21 980, Bit11 (964~986) 23 975,
1188 11:03:55.593802 TX Bit4 (976~995) 20 985, Bit12 (966~987) 22 976,
1189 11:03:55.600598 TX Bit5 (973~990) 18 981, Bit13 (966~984) 19 975,
1190 11:03:55.603739 TX Bit6 (974~991) 18 982, Bit14 (966~985) 20 975,
1191 11:03:55.607100 TX Bit7 (975~993) 19 984, Bit15 (968~988) 21 978,
1192 11:03:55.607525
1193 11:03:55.610903 Write Rank0 MR14 =0x8
1194 11:03:55.619095
1195 11:03:55.619559 CH=0, VrefRange= 0, VrefLevel = 8
1196 11:03:55.625828 TX Bit0 (977~996) 20 986, Bit8 (963~985) 23 974,
1197 11:03:55.629080 TX Bit1 (976~994) 19 985, Bit9 (965~986) 22 975,
1198 11:03:55.635703 TX Bit2 (976~995) 20 985, Bit10 (969~990) 22 979,
1199 11:03:55.639146 TX Bit3 (969~990) 22 979, Bit11 (964~986) 23 975,
1200 11:03:55.642331 TX Bit4 (975~995) 21 985, Bit12 (965~988) 24 976,
1201 11:03:55.649342 TX Bit5 (973~990) 18 981, Bit13 (966~985) 20 975,
1202 11:03:55.652434 TX Bit6 (974~991) 18 982, Bit14 (966~985) 20 975,
1203 11:03:55.655930 TX Bit7 (974~993) 20 983, Bit15 (968~989) 22 978,
1204 11:03:55.656361
1205 11:03:55.659024 Write Rank0 MR14 =0xa
1206 11:03:55.668302
1207 11:03:55.671508 CH=0, VrefRange= 0, VrefLevel = 10
1208 11:03:55.674845 TX Bit0 (977~997) 21 987, Bit8 (962~985) 24 973,
1209 11:03:55.723366 TX Bit1 (976~994) 19 985, Bit9 (964~987) 24 975,
1210 11:03:55.724129 TX Bit2 (976~996) 21 986, Bit10 (969~990) 22 979,
1211 11:03:55.724858 TX Bit3 (969~990) 22 979, Bit11 (964~987) 24 975,
1212 11:03:55.725208 TX Bit4 (975~996) 22 985, Bit12 (965~988) 24 976,
1213 11:03:55.725595 TX Bit5 (972~991) 20 981, Bit13 (966~985) 20 975,
1214 11:03:55.725901 TX Bit6 (973~991) 19 982, Bit14 (965~986) 22 975,
1215 11:03:55.726195 TX Bit7 (974~994) 21 984, Bit15 (968~989) 22 978,
1216 11:03:55.726480
1217 11:03:55.726761 Write Rank0 MR14 =0xc
1218 11:03:55.727231
1219 11:03:55.727560 CH=0, VrefRange= 0, VrefLevel = 12
1220 11:03:55.727916 TX Bit0 (976~998) 23 987, Bit8 (963~986) 24 974,
1221 11:03:55.730860 TX Bit1 (976~995) 20 985, Bit9 (964~987) 24 975,
1222 11:03:55.734024 TX Bit2 (976~996) 21 986, Bit10 (969~990) 22 979,
1223 11:03:55.737674 TX Bit3 (968~991) 24 979, Bit11 (963~987) 25 975,
1224 11:03:55.740542 TX Bit4 (975~996) 22 985, Bit12 (964~988) 25 976,
1225 11:03:55.747972 TX Bit5 (972~991) 20 981, Bit13 (965~986) 22 975,
1226 11:03:55.751169 TX Bit6 (973~992) 20 982, Bit14 (965~986) 22 975,
1227 11:03:55.754206 TX Bit7 (973~994) 22 983, Bit15 (967~989) 23 978,
1228 11:03:55.754683
1229 11:03:55.757320 Write Rank0 MR14 =0xe
1230 11:03:55.766439
1231 11:03:55.769830 CH=0, VrefRange= 0, VrefLevel = 14
1232 11:03:55.773639 TX Bit0 (976~998) 23 987, Bit8 (962~987) 26 974,
1233 11:03:55.776664 TX Bit1 (976~996) 21 986, Bit9 (964~988) 25 976,
1234 11:03:55.783579 TX Bit2 (976~997) 22 986, Bit10 (968~990) 23 979,
1235 11:03:55.786836 TX Bit3 (968~991) 24 979, Bit11 (963~988) 26 975,
1236 11:03:55.790209 TX Bit4 (975~997) 23 986, Bit12 (964~988) 25 976,
1237 11:03:55.797005 TX Bit5 (971~991) 21 981, Bit13 (965~986) 22 975,
1238 11:03:55.800485 TX Bit6 (972~992) 21 982, Bit14 (965~987) 23 976,
1239 11:03:55.803709 TX Bit7 (973~995) 23 984, Bit15 (968~989) 22 978,
1240 11:03:55.804349
1241 11:03:55.807125 Write Rank0 MR14 =0x10
1242 11:03:55.816307
1243 11:03:55.819073 CH=0, VrefRange= 0, VrefLevel = 16
1244 11:03:55.822730 TX Bit0 (976~998) 23 987, Bit8 (962~987) 26 974,
1245 11:03:55.825936 TX Bit1 (976~996) 21 986, Bit9 (963~989) 27 976,
1246 11:03:55.832885 TX Bit2 (975~997) 23 986, Bit10 (968~991) 24 979,
1247 11:03:55.836310 TX Bit3 (968~991) 24 979, Bit11 (963~988) 26 975,
1248 11:03:55.839428 TX Bit4 (974~998) 25 986, Bit12 (964~989) 26 976,
1249 11:03:55.846268 TX Bit5 (971~992) 22 981, Bit13 (964~987) 24 975,
1250 11:03:55.850162 TX Bit6 (971~993) 23 982, Bit14 (963~988) 26 975,
1251 11:03:55.853131 TX Bit7 (973~996) 24 984, Bit15 (967~990) 24 978,
1252 11:03:55.853595
1253 11:03:55.856510 Write Rank0 MR14 =0x12
1254 11:03:55.865393
1255 11:03:55.868793 CH=0, VrefRange= 0, VrefLevel = 18
1256 11:03:55.872202 TX Bit0 (976~998) 23 987, Bit8 (962~987) 26 974,
1257 11:03:55.875635 TX Bit1 (976~996) 21 986, Bit9 (962~989) 28 975,
1258 11:03:55.882062 TX Bit2 (975~997) 23 986, Bit10 (968~991) 24 979,
1259 11:03:55.885822 TX Bit3 (968~991) 24 979, Bit11 (962~989) 28 975,
1260 11:03:55.888847 TX Bit4 (974~997) 24 985, Bit12 (964~989) 26 976,
1261 11:03:55.895595 TX Bit5 (970~992) 23 981, Bit13 (963~988) 26 975,
1262 11:03:55.899192 TX Bit6 (971~993) 23 982, Bit14 (963~988) 26 975,
1263 11:03:55.902305 TX Bit7 (972~996) 25 984, Bit15 (967~990) 24 978,
1264 11:03:55.902704
1265 11:03:55.905667 Write Rank0 MR14 =0x14
1266 11:03:55.914795
1267 11:03:55.918078 CH=0, VrefRange= 0, VrefLevel = 20
1268 11:03:55.921720 TX Bit0 (976~999) 24 987, Bit8 (961~988) 28 974,
1269 11:03:55.925543 TX Bit1 (975~996) 22 985, Bit9 (962~989) 28 975,
1270 11:03:55.931497 TX Bit2 (975~998) 24 986, Bit10 (968~991) 24 979,
1271 11:03:55.935084 TX Bit3 (967~992) 26 979, Bit11 (962~988) 27 975,
1272 11:03:55.938647 TX Bit4 (974~998) 25 986, Bit12 (963~989) 27 976,
1273 11:03:55.945138 TX Bit5 (970~992) 23 981, Bit13 (963~988) 26 975,
1274 11:03:55.948524 TX Bit6 (971~993) 23 982, Bit14 (964~989) 26 976,
1275 11:03:55.951715 TX Bit7 (971~996) 26 983, Bit15 (966~990) 25 978,
1276 11:03:55.952102
1277 11:03:55.955300 Write Rank0 MR14 =0x16
1278 11:03:55.964229
1279 11:03:55.967588 CH=0, VrefRange= 0, VrefLevel = 22
1280 11:03:55.970678 TX Bit0 (976~999) 24 987, Bit8 (961~988) 28 974,
1281 11:03:55.974604 TX Bit1 (975~997) 23 986, Bit9 (963~989) 27 976,
1282 11:03:55.980954 TX Bit2 (975~998) 24 986, Bit10 (967~991) 25 979,
1283 11:03:55.984263 TX Bit3 (968~991) 24 979, Bit11 (962~988) 27 975,
1284 11:03:55.987944 TX Bit4 (974~999) 26 986, Bit12 (963~989) 27 976,
1285 11:03:55.994594 TX Bit5 (970~992) 23 981, Bit13 (963~987) 25 975,
1286 11:03:55.997664 TX Bit6 (970~994) 25 982, Bit14 (963~989) 27 976,
1287 11:03:56.001194 TX Bit7 (971~996) 26 983, Bit15 (966~990) 25 978,
1288 11:03:56.001603
1289 11:03:56.004300 Write Rank0 MR14 =0x18
1290 11:03:56.013867
1291 11:03:56.017127 CH=0, VrefRange= 0, VrefLevel = 24
1292 11:03:56.020514 TX Bit0 (975~999) 25 987, Bit8 (962~987) 26 974,
1293 11:03:56.023820 TX Bit1 (975~998) 24 986, Bit9 (963~988) 26 975,
1294 11:03:56.030834 TX Bit2 (975~998) 24 986, Bit10 (968~991) 24 979,
1295 11:03:56.033911 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1296 11:03:56.037174 TX Bit4 (974~998) 25 986, Bit12 (962~989) 28 975,
1297 11:03:56.043718 TX Bit5 (969~993) 25 981, Bit13 (962~987) 26 974,
1298 11:03:56.047269 TX Bit6 (970~994) 25 982, Bit14 (963~989) 27 976,
1299 11:03:56.050994 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1300 11:03:56.051411
1301 11:03:56.053799 Write Rank0 MR14 =0x1a
1302 11:03:56.063332
1303 11:03:56.066566 CH=0, VrefRange= 0, VrefLevel = 26
1304 11:03:56.070041 TX Bit0 (975~999) 25 987, Bit8 (962~987) 26 974,
1305 11:03:56.073297 TX Bit1 (975~998) 24 986, Bit9 (963~988) 26 975,
1306 11:03:56.080042 TX Bit2 (975~998) 24 986, Bit10 (968~991) 24 979,
1307 11:03:56.083223 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1308 11:03:56.086659 TX Bit4 (974~998) 25 986, Bit12 (962~989) 28 975,
1309 11:03:56.093589 TX Bit5 (969~993) 25 981, Bit13 (962~987) 26 974,
1310 11:03:56.096561 TX Bit6 (970~994) 25 982, Bit14 (963~989) 27 976,
1311 11:03:56.100240 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1312 11:03:56.100626
1313 11:03:56.103411 Write Rank0 MR14 =0x1c
1314 11:03:56.112668
1315 11:03:56.116200 CH=0, VrefRange= 0, VrefLevel = 28
1316 11:03:56.119559 TX Bit0 (975~999) 25 987, Bit8 (962~987) 26 974,
1317 11:03:56.122870 TX Bit1 (975~998) 24 986, Bit9 (963~988) 26 975,
1318 11:03:56.129699 TX Bit2 (975~998) 24 986, Bit10 (968~991) 24 979,
1319 11:03:56.133012 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1320 11:03:56.136489 TX Bit4 (974~998) 25 986, Bit12 (962~989) 28 975,
1321 11:03:56.143196 TX Bit5 (969~993) 25 981, Bit13 (962~987) 26 974,
1322 11:03:56.146346 TX Bit6 (970~994) 25 982, Bit14 (963~989) 27 976,
1323 11:03:56.149836 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1324 11:03:56.150272
1325 11:03:56.152838 Write Rank0 MR14 =0x1e
1326 11:03:56.162169
1327 11:03:56.165578 CH=0, VrefRange= 0, VrefLevel = 30
1328 11:03:56.168927 TX Bit0 (975~999) 25 987, Bit8 (962~987) 26 974,
1329 11:03:56.172429 TX Bit1 (975~998) 24 986, Bit9 (963~988) 26 975,
1330 11:03:56.179385 TX Bit2 (975~998) 24 986, Bit10 (968~991) 24 979,
1331 11:03:56.182417 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1332 11:03:56.185778 TX Bit4 (974~998) 25 986, Bit12 (962~989) 28 975,
1333 11:03:56.192601 TX Bit5 (969~993) 25 981, Bit13 (962~987) 26 974,
1334 11:03:56.196050 TX Bit6 (970~994) 25 982, Bit14 (963~989) 27 976,
1335 11:03:56.199648 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1336 11:03:56.200120
1337 11:03:56.200424
1338 11:03:56.202736 TX Vref found, early break! 374< 386
1339 11:03:56.209600 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
1340 11:03:56.212815 u1DelayCellOfst[0]=9 cells (7 PI)
1341 11:03:56.216397 u1DelayCellOfst[1]=7 cells (6 PI)
1342 11:03:56.217062 u1DelayCellOfst[2]=7 cells (6 PI)
1343 11:03:56.219751 u1DelayCellOfst[3]=0 cells (0 PI)
1344 11:03:56.223282 u1DelayCellOfst[4]=7 cells (6 PI)
1345 11:03:56.226608 u1DelayCellOfst[5]=1 cells (1 PI)
1346 11:03:56.229720 u1DelayCellOfst[6]=2 cells (2 PI)
1347 11:03:56.233051 u1DelayCellOfst[7]=3 cells (3 PI)
1348 11:03:56.236299 Byte0, DQ PI dly=980, DQM PI dly= 983
1349 11:03:56.239871 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1350 11:03:56.240304
1351 11:03:56.246527 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1352 11:03:56.246971
1353 11:03:56.249826 u1DelayCellOfst[8]=0 cells (0 PI)
1354 11:03:56.250308 u1DelayCellOfst[9]=1 cells (1 PI)
1355 11:03:56.253167 u1DelayCellOfst[10]=6 cells (5 PI)
1356 11:03:56.256329 u1DelayCellOfst[11]=1 cells (1 PI)
1357 11:03:56.260027 u1DelayCellOfst[12]=1 cells (1 PI)
1358 11:03:56.262919 u1DelayCellOfst[13]=0 cells (0 PI)
1359 11:03:56.266484 u1DelayCellOfst[14]=2 cells (2 PI)
1360 11:03:56.269568 u1DelayCellOfst[15]=5 cells (4 PI)
1361 11:03:56.273068 Byte1, DQ PI dly=974, DQM PI dly= 976
1362 11:03:56.276625 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
1363 11:03:56.277055
1364 11:03:56.283089 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
1365 11:03:56.283580
1366 11:03:56.283917 Write Rank0 MR14 =0x18
1367 11:03:56.284244
1368 11:03:56.286619 Final TX Range 0 Vref 24
1369 11:03:56.287048
1370 11:03:56.293311 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1371 11:03:56.293817
1372 11:03:56.300630 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1373 11:03:56.306957 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1374 11:03:56.313452 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1375 11:03:56.317120 Write Rank0 MR3 =0xb0
1376 11:03:56.317638 DramC Write-DBI on
1377 11:03:56.317970 ==
1378 11:03:56.323639 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1379 11:03:56.326783 fsp= 1, odt_onoff= 1, Byte mode= 0
1380 11:03:56.327348 ==
1381 11:03:56.331888 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1382 11:03:56.332340
1383 11:03:56.333588 Begin, DQ Scan Range 696~760
1384 11:03:56.333754
1385 11:03:56.333880
1386 11:03:56.336726 TX Vref Scan disable
1387 11:03:56.339913 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1388 11:03:56.343804 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1389 11:03:56.346939 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1390 11:03:56.350355 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1391 11:03:56.354023 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1392 11:03:56.357020 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1393 11:03:56.361158 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1394 11:03:56.363826 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1395 11:03:56.367205 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1396 11:03:56.371066 705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]
1397 11:03:56.373942 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1398 11:03:56.377583 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1399 11:03:56.380930 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1400 11:03:56.383877 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1401 11:03:56.386953 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1402 11:03:56.390815 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1403 11:03:56.393826 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1404 11:03:56.397010 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1405 11:03:56.406512 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1406 11:03:56.409896 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1407 11:03:56.413266 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1408 11:03:56.417071 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1409 11:03:56.420061 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1410 11:03:56.423618 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1411 11:03:56.426775 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1412 11:03:56.430219 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1413 11:03:56.433558 742 |2 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1414 11:03:56.436861 Byte0, DQ PI dly=727, DQM PI dly= 727
1415 11:03:56.440348 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
1416 11:03:56.440783
1417 11:03:56.446880 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
1418 11:03:56.447267
1419 11:03:56.450509 Byte1, DQ PI dly=719, DQM PI dly= 719
1420 11:03:56.453893 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 15)
1421 11:03:56.454333
1422 11:03:56.457042 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 15)
1423 11:03:56.457513
1424 11:03:56.463835 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1425 11:03:56.470994 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1426 11:03:56.477154 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1427 11:03:56.480562 Write Rank0 MR3 =0x30
1428 11:03:56.480947 DramC Write-DBI off
1429 11:03:56.484312
1430 11:03:56.484700 [DATLAT]
1431 11:03:56.486976 Freq=1600, CH0 RK0, use_rxtx_scan=0
1432 11:03:56.487367
1433 11:03:56.487667 DATLAT Default: 0xf
1434 11:03:56.490665 7, 0xFFFF, sum=0
1435 11:03:56.491059 8, 0xFFFF, sum=0
1436 11:03:56.494117 9, 0xFFFF, sum=0
1437 11:03:56.494635 10, 0xFFFF, sum=0
1438 11:03:56.497445 11, 0xFFFF, sum=0
1439 11:03:56.497838 12, 0xFFFF, sum=0
1440 11:03:56.500833 13, 0xFFFF, sum=0
1441 11:03:56.501289 14, 0x0, sum=1
1442 11:03:56.501606 15, 0x0, sum=2
1443 11:03:56.504074 16, 0x0, sum=3
1444 11:03:56.504466 17, 0x0, sum=4
1445 11:03:56.510855 pattern=2 first_step=14 total pass=5 best_step=16
1446 11:03:56.511290 ==
1447 11:03:56.514385 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1448 11:03:56.517715 fsp= 1, odt_onoff= 1, Byte mode= 0
1449 11:03:56.518101 ==
1450 11:03:56.521020 Start DQ dly to find pass range UseTestEngine =1
1451 11:03:56.527426 x-axis: bit #, y-axis: DQ dly (-127~63)
1452 11:03:56.527813 RX Vref Scan = 1
1453 11:03:56.642409
1454 11:03:56.642899 RX Vref found, early break!
1455 11:03:56.643234
1456 11:03:56.649107 Final RX Vref 12, apply to both rank0 and 1
1457 11:03:56.649576 ==
1458 11:03:56.652260 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1459 11:03:56.656152 fsp= 1, odt_onoff= 1, Byte mode= 0
1460 11:03:56.656579 ==
1461 11:03:56.656913 DQS Delay:
1462 11:03:56.659361 DQS0 = 0, DQS1 = 0
1463 11:03:56.659788 DQM Delay:
1464 11:03:56.662517 DQM0 = 19, DQM1 = 18
1465 11:03:56.663014 DQ Delay:
1466 11:03:56.666029 DQ0 =24, DQ1 =23, DQ2 =23, DQ3 =13
1467 11:03:56.668997 DQ4 =22, DQ5 =14, DQ6 =16, DQ7 =18
1468 11:03:56.672552 DQ8 =18, DQ9 =19, DQ10 =22, DQ11 =17
1469 11:03:56.675767 DQ12 =19, DQ13 =16, DQ14 =17, DQ15 =20
1470 11:03:56.676182
1471 11:03:56.676496
1472 11:03:56.676772
1473 11:03:56.678945 [DramC_TX_OE_Calibration] TA2
1474 11:03:56.682386 Original DQ_B0 (3 6) =30, OEN = 27
1475 11:03:56.685674 Original DQ_B1 (3 6) =30, OEN = 27
1476 11:03:56.689126 23, 0x0, End_B0=23 End_B1=23
1477 11:03:56.689566 24, 0x0, End_B0=24 End_B1=24
1478 11:03:56.692438 25, 0x0, End_B0=25 End_B1=25
1479 11:03:56.696052 26, 0x0, End_B0=26 End_B1=26
1480 11:03:56.699281 27, 0x0, End_B0=27 End_B1=27
1481 11:03:56.699723 28, 0x0, End_B0=28 End_B1=28
1482 11:03:56.702851 29, 0x0, End_B0=29 End_B1=29
1483 11:03:56.706317 30, 0x0, End_B0=30 End_B1=30
1484 11:03:56.709339 31, 0xFFFF, End_B0=30 End_B1=30
1485 11:03:56.712949 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1486 11:03:56.719919 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1487 11:03:56.720546
1488 11:03:56.721012
1489 11:03:56.722920 Write Rank0 MR23 =0x3f
1490 11:03:56.723316 [DQSOSC]
1491 11:03:56.729928 [DQSOSCAuto] RK0, (LSB)MR18= 0x9b, (MSB)MR19= 0x3, tDQSOscB0 = 341 ps tDQSOscB1 = 0 ps
1492 11:03:56.736374 CH0_RK0: MR19=0x3, MR18=0x9B, DQSOSC=341, MR23=63, INC=21, DEC=31
1493 11:03:56.739597 Write Rank0 MR23 =0x3f
1494 11:03:56.739985 [DQSOSC]
1495 11:03:56.746677 [DQSOSCAuto] RK0, (LSB)MR18= 0x9f, (MSB)MR19= 0x3, tDQSOscB0 = 339 ps tDQSOscB1 = 0 ps
1496 11:03:56.749602 CH0 RK0: MR19=3, MR18=9F
1497 11:03:56.753162 [RankSwap] Rank num 2, (Multi 1), Rank 1
1498 11:03:56.756165 Write Rank0 MR2 =0xad
1499 11:03:56.756574 [Write Leveling]
1500 11:03:56.759803 delay byte0 byte1 byte2 byte3
1501 11:03:56.760189
1502 11:03:56.760487 10 0 0
1503 11:03:56.763073 11 0 0
1504 11:03:56.763617 12 0 0
1505 11:03:56.766694 13 0 0
1506 11:03:56.767233 14 0 0
1507 11:03:56.767706 15 0 0
1508 11:03:56.770045 16 0 0
1509 11:03:56.770582 17 0 0
1510 11:03:56.773311 18 0 0
1511 11:03:56.773816 19 0 0
1512 11:03:56.774286 20 0 0
1513 11:03:56.776572 21 0 0
1514 11:03:56.777083 22 0 0
1515 11:03:56.780335 23 0 0
1516 11:03:56.780819 24 0 0
1517 11:03:56.781317 25 0 0
1518 11:03:56.783458 26 0 0
1519 11:03:56.783969 27 0 0
1520 11:03:56.786894 28 0 0
1521 11:03:56.787425 29 0 0
1522 11:03:56.789980 30 0 0
1523 11:03:56.790491 31 0 ff
1524 11:03:56.790914 32 0 ff
1525 11:03:56.793260 33 0 ff
1526 11:03:56.793676 34 ff ff
1527 11:03:56.797052 35 ff ff
1528 11:03:56.797492 36 ff ff
1529 11:03:56.800083 37 ff ff
1530 11:03:56.800474 38 ff ff
1531 11:03:56.803509 39 ff ff
1532 11:03:56.803900 40 ff ff
1533 11:03:56.807171 pass bytecount = 0xff (0xff: all bytes pass)
1534 11:03:56.807559
1535 11:03:56.810251 DQS0 dly: 34
1536 11:03:56.810636 DQS1 dly: 31
1537 11:03:56.813481 Write Rank0 MR2 =0x2d
1538 11:03:56.816795 [RankSwap] Rank num 2, (Multi 1), Rank 0
1539 11:03:56.817184 Write Rank1 MR1 =0xd6
1540 11:03:56.820125 [Gating]
1541 11:03:56.820510 ==
1542 11:03:56.823644 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1543 11:03:56.827006 fsp= 1, odt_onoff= 1, Byte mode= 0
1544 11:03:56.827398 ==
1545 11:03:56.830723 3 1 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1546 11:03:56.837137 3 1 4 |3534 3535 |(11 11)(11 11) |(0 0)(0 0)| 0
1547 11:03:56.840415 3 1 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1548 11:03:56.843666 3 1 12 |3534 3434 |(11 11)(11 11) |(1 1)(1 1)| 0
1549 11:03:56.850613 3 1 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1550 11:03:56.853925 3 1 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1551 11:03:56.857370 3 1 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1552 11:03:56.861051 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1553 11:03:56.867287 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1554 11:03:56.870920 3 2 4 |3534 3434 |(11 11)(11 11) |(0 1)(0 1)| 0
1555 11:03:56.874456 3 2 8 |3d3d b0a |(11 11)(11 11) |(1 1)(0 1)| 0
1556 11:03:56.880663 3 2 12 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1557 11:03:56.884244 3 2 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 11:03:56.887770 3 2 20 |3d3d 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
1559 11:03:56.890835 3 2 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 11:03:56.897514 3 2 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 11:03:56.901045 3 3 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 11:03:56.904592 3 3 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1563 11:03:56.911055 3 3 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1564 11:03:56.915122 3 3 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1565 11:03:56.917711 3 3 16 |3d3c 0 |(11 11)(11 11) |(1 1)(1 1)| 0
1566 11:03:56.921604 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1567 11:03:56.928097 [Byte 0] Lead/lag Transition tap number (1)
1568 11:03:56.931263 [Byte 1] Lead/lag falling Transition (3, 3, 20)
1569 11:03:56.934357 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1570 11:03:56.941478 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1571 11:03:56.944570 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1572 11:03:56.947846 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1573 11:03:56.951401 3 4 8 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1574 11:03:56.958217 3 4 12 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1575 11:03:56.961280 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1576 11:03:56.964623 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1577 11:03:56.971528 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1578 11:03:56.975149 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1579 11:03:56.977915 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1580 11:03:56.984512 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1581 11:03:56.987940 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1582 11:03:56.991721 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1583 11:03:56.994607 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1584 11:03:57.001145 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1585 11:03:57.004516 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1586 11:03:57.008134 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1587 11:03:57.014910 [Byte 0] Lead/lag falling Transition (3, 5, 28)
1588 11:03:57.018292 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1589 11:03:57.021747 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1590 11:03:57.025470 3 6 4 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1591 11:03:57.031854 [Byte 0] Lead/lag Transition tap number (3)
1592 11:03:57.034953 [Byte 1] Lead/lag Transition tap number (2)
1593 11:03:57.038648 3 6 8 |202 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1594 11:03:57.041535 3 6 12 |4646 b0a |(10 10)(11 11) |(0 0)(0 0)| 0
1595 11:03:57.045353 3 6 16 |4646 a0a |(0 0)(1 1) |(0 0)(0 0)| 0
1596 11:03:57.048304 [Byte 0]First pass (3, 6, 16)
1597 11:03:57.051980 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1598 11:03:57.054975 [Byte 1]First pass (3, 6, 20)
1599 11:03:57.058552 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1600 11:03:57.065157 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1601 11:03:57.068718 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1602 11:03:57.071856 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1603 11:03:57.075715 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1604 11:03:57.078914 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1605 11:03:57.085467 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1606 11:03:57.089283 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1607 11:03:57.092286 All bytes gating window > 1UI, Early break!
1608 11:03:57.092814
1609 11:03:57.095540 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 2)
1610 11:03:57.095975
1611 11:03:57.098698 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 4)
1612 11:03:57.099131
1613 11:03:57.099461
1614 11:03:57.099765
1615 11:03:57.102030 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 2)
1616 11:03:57.102463
1617 11:03:57.109117 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1618 11:03:57.109573
1619 11:03:57.109909
1620 11:03:57.110216 Write Rank1 MR1 =0x56
1621 11:03:57.110514
1622 11:03:57.112185 best RODT dly(2T, 0.5T) = (2, 3)
1623 11:03:57.112611
1624 11:03:57.116050 best RODT dly(2T, 0.5T) = (2, 3)
1625 11:03:57.116571 ==
1626 11:03:57.122890 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1627 11:03:57.125556 fsp= 1, odt_onoff= 1, Byte mode= 0
1628 11:03:57.126014 ==
1629 11:03:57.129109 Start DQ dly to find pass range UseTestEngine =0
1630 11:03:57.132272 x-axis: bit #, y-axis: DQ dly (-127~63)
1631 11:03:57.136099 RX Vref Scan = 0
1632 11:03:57.136769 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1633 11:03:57.139006 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1634 11:03:57.142316 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1635 11:03:57.145775 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1636 11:03:57.149383 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1637 11:03:57.152610 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1638 11:03:57.155998 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1639 11:03:57.156447 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1640 11:03:57.159608 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1641 11:03:57.162988 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1642 11:03:57.165993 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1643 11:03:57.169860 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1644 11:03:57.172938 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1645 11:03:57.176211 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1646 11:03:57.179695 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1647 11:03:57.180159 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1648 11:03:57.183344 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1649 11:03:57.186288 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1650 11:03:57.189701 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1651 11:03:57.193287 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1652 11:03:57.196445 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1653 11:03:57.199903 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1654 11:03:57.200302 -4, [0] xxxoxxxx xxxxxxxx [MSB]
1655 11:03:57.203390 -3, [0] xxxoxxxx xxxxxxxx [MSB]
1656 11:03:57.206724 -2, [0] xxxoxxxx xxxxxxxx [MSB]
1657 11:03:57.210055 -1, [0] xxxoxoxo xxxxxxxx [MSB]
1658 11:03:57.213331 0, [0] xxxoxooo ooxxxoxx [MSB]
1659 11:03:57.216265 1, [0] xxxoxooo ooxoooox [MSB]
1660 11:03:57.216805 2, [0] xxxoxooo ooxooooo [MSB]
1661 11:03:57.219993 3, [0] xxxoxooo ooxooooo [MSB]
1662 11:03:57.222871 4, [0] xxxoxooo ooxooooo [MSB]
1663 11:03:57.226490 5, [0] xooooooo oooooooo [MSB]
1664 11:03:57.229686 6, [0] xooooooo oooooooo [MSB]
1665 11:03:57.232972 33, [0] oooxoooo oooooooo [MSB]
1666 11:03:57.233387 34, [0] oooxoooo oooooooo [MSB]
1667 11:03:57.236254 35, [0] oooxoxoo oooxooxo [MSB]
1668 11:03:57.239932 36, [0] oooxoxxo xooxooxo [MSB]
1669 11:03:57.242960 37, [0] oooxoxxx xooxoxxo [MSB]
1670 11:03:57.246157 38, [0] oooxoxxx xxoxxxxo [MSB]
1671 11:03:57.250059 39, [0] oooxoxxx xxoxxxxo [MSB]
1672 11:03:57.252833 40, [0] oxoxxxxx xxoxxxxx [MSB]
1673 11:03:57.253291 41, [0] oxxxxxxx xxoxxxxx [MSB]
1674 11:03:57.256400 42, [0] xxxxxxxx xxoxxxxx [MSB]
1675 11:03:57.260132 43, [0] xxxxxxxx xxxxxxxx [MSB]
1676 11:03:57.263334 iDelay=43, Bit 0, Center 24 (7 ~ 41) 35
1677 11:03:57.266766 iDelay=43, Bit 1, Center 22 (5 ~ 39) 35
1678 11:03:57.269981 iDelay=43, Bit 2, Center 22 (5 ~ 40) 36
1679 11:03:57.273618 iDelay=43, Bit 3, Center 14 (-4 ~ 32) 37
1680 11:03:57.276664 iDelay=43, Bit 4, Center 22 (5 ~ 39) 35
1681 11:03:57.279835 iDelay=43, Bit 5, Center 16 (-1 ~ 34) 36
1682 11:03:57.286866 iDelay=43, Bit 6, Center 17 (0 ~ 35) 36
1683 11:03:57.290025 iDelay=43, Bit 7, Center 17 (-1 ~ 36) 38
1684 11:03:57.293706 iDelay=43, Bit 8, Center 17 (0 ~ 35) 36
1685 11:03:57.297024 iDelay=43, Bit 9, Center 18 (0 ~ 37) 38
1686 11:03:57.300171 iDelay=43, Bit 10, Center 23 (5 ~ 42) 38
1687 11:03:57.303532 iDelay=43, Bit 11, Center 17 (1 ~ 34) 34
1688 11:03:57.307460 iDelay=43, Bit 12, Center 19 (1 ~ 37) 37
1689 11:03:57.310663 iDelay=43, Bit 13, Center 18 (0 ~ 36) 37
1690 11:03:57.313897 iDelay=43, Bit 14, Center 17 (1 ~ 34) 34
1691 11:03:57.317608 iDelay=43, Bit 15, Center 20 (2 ~ 39) 38
1692 11:03:57.318000 ==
1693 11:03:57.323641 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1694 11:03:57.327072 fsp= 1, odt_onoff= 1, Byte mode= 0
1695 11:03:57.327465 ==
1696 11:03:57.327771 DQS Delay:
1697 11:03:57.330528 DQS0 = 0, DQS1 = 0
1698 11:03:57.330917 DQM Delay:
1699 11:03:57.331220 DQM0 = 19, DQM1 = 18
1700 11:03:57.334035 DQ Delay:
1701 11:03:57.337340 DQ0 =24, DQ1 =22, DQ2 =22, DQ3 =14
1702 11:03:57.340916 DQ4 =22, DQ5 =16, DQ6 =17, DQ7 =17
1703 11:03:57.343857 DQ8 =17, DQ9 =18, DQ10 =23, DQ11 =17
1704 11:03:57.347215 DQ12 =19, DQ13 =18, DQ14 =17, DQ15 =20
1705 11:03:57.347605
1706 11:03:57.347905
1707 11:03:57.348185 DramC Write-DBI off
1708 11:03:57.348453 ==
1709 11:03:57.353864 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1710 11:03:57.357394 fsp= 1, odt_onoff= 1, Byte mode= 0
1711 11:03:57.357793 ==
1712 11:03:57.360808 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1713 11:03:57.361284
1714 11:03:57.364124 Begin, DQ Scan Range 927~1183
1715 11:03:57.364559
1716 11:03:57.364877
1717 11:03:57.367557 TX Vref Scan disable
1718 11:03:57.370969 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1719 11:03:57.374379 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1720 11:03:57.377381 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1721 11:03:57.380702 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1722 11:03:57.384054 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1723 11:03:57.387307 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1724 11:03:57.390898 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1725 11:03:57.394375 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1726 11:03:57.397576 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1727 11:03:57.401040 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1728 11:03:57.404406 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1729 11:03:57.408143 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1730 11:03:57.411583 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1731 11:03:57.415196 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1732 11:03:57.418180 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1733 11:03:57.421342 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1734 11:03:57.424622 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1735 11:03:57.431279 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1736 11:03:57.434488 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1737 11:03:57.438423 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1738 11:03:57.441682 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1739 11:03:57.445025 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1740 11:03:57.448141 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1741 11:03:57.451614 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1742 11:03:57.455072 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1743 11:03:57.458179 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1744 11:03:57.461560 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1745 11:03:57.464855 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1746 11:03:57.468287 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1747 11:03:57.471549 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1748 11:03:57.474938 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1749 11:03:57.478370 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1750 11:03:57.481937 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1751 11:03:57.485561 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1752 11:03:57.488608 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1753 11:03:57.492239 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1754 11:03:57.495230 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1755 11:03:57.499231 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1756 11:03:57.502151 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1757 11:03:57.505403 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1758 11:03:57.508938 967 |3 6 7|[0] xxxxxxxx oxxxxxxx [MSB]
1759 11:03:57.512284 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1760 11:03:57.515452 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1761 11:03:57.522295 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1762 11:03:57.525687 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1763 11:03:57.529143 972 |3 6 12|[0] xxxxxxxx ooxooooo [MSB]
1764 11:03:57.532409 973 |3 6 13|[0] xxxoxoox ooxooooo [MSB]
1765 11:03:57.535756 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1766 11:03:57.539828 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1767 11:03:57.542618 976 |3 6 16|[0] xxxooooo oooooooo [MSB]
1768 11:03:57.545952 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1769 11:03:57.552951 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1770 11:03:57.555713 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1771 11:03:57.559613 993 |3 6 33|[0] oooxoxoo xxxxxxxx [MSB]
1772 11:03:57.562530 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1773 11:03:57.565843 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1774 11:03:57.569146 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1775 11:03:57.572505 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1776 11:03:57.576229 Byte0, DQ PI dly=984, DQM PI dly= 984
1777 11:03:57.579266 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1778 11:03:57.579668
1779 11:03:57.582669 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1780 11:03:57.586067
1781 11:03:57.586465 Byte1, DQ PI dly=979, DQM PI dly= 979
1782 11:03:57.593062 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1783 11:03:57.593486
1784 11:03:57.596334 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1785 11:03:57.596733
1786 11:03:57.597124 ==
1787 11:03:57.602882 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1788 11:03:57.606603 fsp= 1, odt_onoff= 1, Byte mode= 0
1789 11:03:57.606990 ==
1790 11:03:57.609922 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1791 11:03:57.610307
1792 11:03:57.613566 Begin, DQ Scan Range 955~1019
1793 11:03:57.613951 Write Rank1 MR14 =0x0
1794 11:03:57.622992
1795 11:03:57.623441 CH=0, VrefRange= 0, VrefLevel = 0
1796 11:03:57.630116 TX Bit0 (978~997) 20 987, Bit8 (969~988) 20 978,
1797 11:03:57.633265 TX Bit1 (978~995) 18 986, Bit9 (972~989) 18 980,
1798 11:03:57.636523 TX Bit2 (978~995) 18 986, Bit10 (976~991) 16 983,
1799 11:03:57.643156 TX Bit3 (974~990) 17 982, Bit11 (971~988) 18 979,
1800 11:03:57.647073 TX Bit4 (977~996) 20 986, Bit12 (972~989) 18 980,
1801 11:03:57.653368 TX Bit5 (975~990) 16 982, Bit13 (972~987) 16 979,
1802 11:03:57.657350 TX Bit6 (976~991) 16 983, Bit14 (972~989) 18 980,
1803 11:03:57.660199 TX Bit7 (977~993) 17 985, Bit15 (975~991) 17 983,
1804 11:03:57.660584
1805 11:03:57.663501 Write Rank1 MR14 =0x2
1806 11:03:57.672071
1807 11:03:57.672501 CH=0, VrefRange= 0, VrefLevel = 2
1808 11:03:57.679186 TX Bit0 (979~998) 20 988, Bit8 (969~989) 21 979,
1809 11:03:57.682046 TX Bit1 (978~996) 19 987, Bit9 (971~989) 19 980,
1810 11:03:57.685492 TX Bit2 (978~996) 19 987, Bit10 (975~992) 18 983,
1811 11:03:57.692005 TX Bit3 (974~990) 17 982, Bit11 (970~989) 20 979,
1812 11:03:57.695404 TX Bit4 (977~997) 21 987, Bit12 (972~990) 19 981,
1813 11:03:57.702386 TX Bit5 (975~990) 16 982, Bit13 (972~987) 16 979,
1814 11:03:57.705841 TX Bit6 (975~991) 17 983, Bit14 (972~989) 18 980,
1815 11:03:57.709146 TX Bit7 (977~993) 17 985, Bit15 (974~991) 18 982,
1816 11:03:57.709715
1817 11:03:57.712235 Write Rank1 MR14 =0x4
1818 11:03:57.720999
1819 11:03:57.721491 CH=0, VrefRange= 0, VrefLevel = 4
1820 11:03:57.727333 TX Bit0 (978~998) 21 988, Bit8 (968~989) 22 978,
1821 11:03:57.730780 TX Bit1 (978~997) 20 987, Bit9 (970~990) 21 980,
1822 11:03:57.734232 TX Bit2 (977~997) 21 987, Bit10 (975~992) 18 983,
1823 11:03:57.741399 TX Bit3 (973~990) 18 981, Bit11 (970~989) 20 979,
1824 11:03:57.744074 TX Bit4 (977~997) 21 987, Bit12 (971~990) 20 980,
1825 11:03:57.751306 TX Bit5 (975~991) 17 983, Bit13 (971~988) 18 979,
1826 11:03:57.754468 TX Bit6 (975~992) 18 983, Bit14 (971~990) 20 980,
1827 11:03:57.757771 TX Bit7 (977~994) 18 985, Bit15 (973~991) 19 982,
1828 11:03:57.758256
1829 11:03:57.760842 Write Rank1 MR14 =0x6
1830 11:03:57.769338
1831 11:03:57.769808 CH=0, VrefRange= 0, VrefLevel = 6
1832 11:03:57.776118 TX Bit0 (978~998) 21 988, Bit8 (968~989) 22 978,
1833 11:03:57.779453 TX Bit1 (977~997) 21 987, Bit9 (971~990) 20 980,
1834 11:03:57.786584 TX Bit2 (977~997) 21 987, Bit10 (975~992) 18 983,
1835 11:03:57.789638 TX Bit3 (973~991) 19 982, Bit11 (970~990) 21 980,
1836 11:03:57.793216 TX Bit4 (977~997) 21 987, Bit12 (970~990) 21 980,
1837 11:03:57.799875 TX Bit5 (974~990) 17 982, Bit13 (970~989) 20 979,
1838 11:03:57.802785 TX Bit6 (975~992) 18 983, Bit14 (970~990) 21 980,
1839 11:03:57.806409 TX Bit7 (977~994) 18 985, Bit15 (973~992) 20 982,
1840 11:03:57.806797
1841 11:03:57.809533 Write Rank1 MR14 =0x8
1842 11:03:57.818527
1843 11:03:57.818979 CH=0, VrefRange= 0, VrefLevel = 8
1844 11:03:57.825115 TX Bit0 (977~999) 23 988, Bit8 (968~990) 23 979,
1845 11:03:57.828900 TX Bit1 (977~997) 21 987, Bit9 (970~990) 21 980,
1846 11:03:57.831955 TX Bit2 (977~997) 21 987, Bit10 (975~992) 18 983,
1847 11:03:57.838420 TX Bit3 (972~991) 20 981, Bit11 (969~990) 22 979,
1848 11:03:57.842236 TX Bit4 (977~998) 22 987, Bit12 (970~990) 21 980,
1849 11:03:57.848769 TX Bit5 (974~991) 18 982, Bit13 (970~989) 20 979,
1850 11:03:57.851996 TX Bit6 (975~992) 18 983, Bit14 (970~990) 21 980,
1851 11:03:57.855264 TX Bit7 (977~995) 19 986, Bit15 (974~992) 19 983,
1852 11:03:57.855813
1853 11:03:57.858911 Write Rank1 MR14 =0xa
1854 11:03:57.867480
1855 11:03:57.867967 CH=0, VrefRange= 0, VrefLevel = 10
1856 11:03:57.874837 TX Bit0 (978~999) 22 988, Bit8 (968~990) 23 979,
1857 11:03:57.877948 TX Bit1 (977~997) 21 987, Bit9 (970~990) 21 980,
1858 11:03:57.881371 TX Bit2 (977~997) 21 987, Bit10 (975~993) 19 984,
1859 11:03:57.887619 TX Bit3 (972~991) 20 981, Bit11 (969~990) 22 979,
1860 11:03:57.891223 TX Bit4 (976~998) 23 987, Bit12 (970~990) 21 980,
1861 11:03:57.898020 TX Bit5 (973~991) 19 982, Bit13 (970~989) 20 979,
1862 11:03:57.901056 TX Bit6 (974~993) 20 983, Bit14 (970~990) 21 980,
1863 11:03:57.904331 TX Bit7 (976~995) 20 985, Bit15 (973~992) 20 982,
1864 11:03:57.904925
1865 11:03:57.907601 Write Rank1 MR14 =0xc
1866 11:03:57.916490
1867 11:03:57.919516 CH=0, VrefRange= 0, VrefLevel = 12
1868 11:03:57.923125 TX Bit0 (977~999) 23 988, Bit8 (968~990) 23 979,
1869 11:03:57.926339 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
1870 11:03:57.933293 TX Bit2 (977~998) 22 987, Bit10 (975~993) 19 984,
1871 11:03:57.936538 TX Bit3 (971~992) 22 981, Bit11 (969~990) 22 979,
1872 11:03:57.939749 TX Bit4 (976~998) 23 987, Bit12 (970~991) 22 980,
1873 11:03:57.946576 TX Bit5 (973~991) 19 982, Bit13 (969~990) 22 979,
1874 11:03:57.949572 TX Bit6 (974~993) 20 983, Bit14 (969~991) 23 980,
1875 11:03:57.952985 TX Bit7 (976~996) 21 986, Bit15 (973~992) 20 982,
1876 11:03:57.953402
1877 11:03:57.956654 Write Rank1 MR14 =0xe
1878 11:03:57.965925
1879 11:03:57.968688 CH=0, VrefRange= 0, VrefLevel = 14
1880 11:03:57.972208 TX Bit0 (977~999) 23 988, Bit8 (968~990) 23 979,
1881 11:03:57.975320 TX Bit1 (977~998) 22 987, Bit9 (969~991) 23 980,
1882 11:03:57.982189 TX Bit2 (977~998) 22 987, Bit10 (974~994) 21 984,
1883 11:03:57.985388 TX Bit3 (971~992) 22 981, Bit11 (968~990) 23 979,
1884 11:03:57.989022 TX Bit4 (976~999) 24 987, Bit12 (970~991) 22 980,
1885 11:03:57.995444 TX Bit5 (973~992) 20 982, Bit13 (969~990) 22 979,
1886 11:03:57.999326 TX Bit6 (973~994) 22 983, Bit14 (969~991) 23 980,
1887 11:03:58.002214 TX Bit7 (976~997) 22 986, Bit15 (972~993) 22 982,
1888 11:03:58.002616
1889 11:03:58.005291 Write Rank1 MR14 =0x10
1890 11:03:58.014629
1891 11:03:58.015071 CH=0, VrefRange= 0, VrefLevel = 16
1892 11:03:58.021414 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
1893 11:03:58.024649 TX Bit1 (977~998) 22 987, Bit9 (969~991) 23 980,
1894 11:03:58.031553 TX Bit2 (977~999) 23 988, Bit10 (974~994) 21 984,
1895 11:03:58.034936 TX Bit3 (971~993) 23 982, Bit11 (968~991) 24 979,
1896 11:03:58.038678 TX Bit4 (976~999) 24 987, Bit12 (970~991) 22 980,
1897 11:03:58.045103 TX Bit5 (972~993) 22 982, Bit13 (968~990) 23 979,
1898 11:03:58.048482 TX Bit6 (973~994) 22 983, Bit14 (969~991) 23 980,
1899 11:03:58.051745 TX Bit7 (976~997) 22 986, Bit15 (972~993) 22 982,
1900 11:03:58.052182
1901 11:03:58.054759 Write Rank1 MR14 =0x12
1902 11:03:58.064327
1903 11:03:58.067114 CH=0, VrefRange= 0, VrefLevel = 18
1904 11:03:58.070640 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
1905 11:03:58.073952 TX Bit1 (976~999) 24 987, Bit9 (969~991) 23 980,
1906 11:03:58.080517 TX Bit2 (977~999) 23 988, Bit10 (974~995) 22 984,
1907 11:03:58.083834 TX Bit3 (970~993) 24 981, Bit11 (968~991) 24 979,
1908 11:03:58.087478 TX Bit4 (976~999) 24 987, Bit12 (968~991) 24 979,
1909 11:03:58.094569 TX Bit5 (972~993) 22 982, Bit13 (968~990) 23 979,
1910 11:03:58.097631 TX Bit6 (972~995) 24 983, Bit14 (969~991) 23 980,
1911 11:03:58.100745 TX Bit7 (976~997) 22 986, Bit15 (971~993) 23 982,
1912 11:03:58.101136
1913 11:03:58.104109 Write Rank1 MR14 =0x14
1914 11:03:58.113764
1915 11:03:58.117161 CH=0, VrefRange= 0, VrefLevel = 20
1916 11:03:58.120248 TX Bit0 (977~1000) 24 988, Bit8 (967~991) 25 979,
1917 11:03:58.123635 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1918 11:03:58.130023 TX Bit2 (976~999) 24 987, Bit10 (974~995) 22 984,
1919 11:03:58.133519 TX Bit3 (970~994) 25 982, Bit11 (968~991) 24 979,
1920 11:03:58.136937 TX Bit4 (975~1000) 26 987, Bit12 (968~992) 25 980,
1921 11:03:58.143371 TX Bit5 (971~993) 23 982, Bit13 (968~990) 23 979,
1922 11:03:58.146907 TX Bit6 (972~995) 24 983, Bit14 (969~992) 24 980,
1923 11:03:58.150642 TX Bit7 (975~998) 24 986, Bit15 (970~994) 25 982,
1924 11:03:58.151076
1925 11:03:58.153473 Write Rank1 MR14 =0x16
1926 11:03:58.162713
1927 11:03:58.166211 CH=0, VrefRange= 0, VrefLevel = 22
1928 11:03:58.169694 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
1929 11:03:58.172920 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1930 11:03:58.179662 TX Bit2 (976~999) 24 987, Bit10 (973~996) 24 984,
1931 11:03:58.183206 TX Bit3 (969~994) 26 981, Bit11 (968~991) 24 979,
1932 11:03:58.186261 TX Bit4 (975~1000) 26 987, Bit12 (968~992) 25 980,
1933 11:03:58.193166 TX Bit5 (971~994) 24 982, Bit13 (968~990) 23 979,
1934 11:03:58.196880 TX Bit6 (971~996) 26 983, Bit14 (968~992) 25 980,
1935 11:03:58.199841 TX Bit7 (975~998) 24 986, Bit15 (970~994) 25 982,
1936 11:03:58.200233
1937 11:03:58.203034 Write Rank1 MR14 =0x18
1938 11:03:58.212368
1939 11:03:58.216240 CH=0, VrefRange= 0, VrefLevel = 24
1940 11:03:58.219765 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
1941 11:03:58.222658 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1942 11:03:58.229345 TX Bit2 (976~999) 24 987, Bit10 (973~996) 24 984,
1943 11:03:58.233036 TX Bit3 (969~994) 26 981, Bit11 (968~992) 25 980,
1944 11:03:58.236099 TX Bit4 (976~999) 24 987, Bit12 (968~992) 25 980,
1945 11:03:58.243078 TX Bit5 (970~994) 25 982, Bit13 (968~991) 24 979,
1946 11:03:58.246048 TX Bit6 (971~995) 25 983, Bit14 (968~992) 25 980,
1947 11:03:58.249830 TX Bit7 (974~998) 25 986, Bit15 (969~993) 25 981,
1948 11:03:58.250309
1949 11:03:58.253012 Write Rank1 MR14 =0x1a
1950 11:03:58.261993
1951 11:03:58.262381 CH=0, VrefRange= 0, VrefLevel = 26
1952 11:03:58.269138 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
1953 11:03:58.272311 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1954 11:03:58.276079 TX Bit2 (976~999) 24 987, Bit10 (973~996) 24 984,
1955 11:03:58.282510 TX Bit3 (969~994) 26 981, Bit11 (968~992) 25 980,
1956 11:03:58.285856 TX Bit4 (976~999) 24 987, Bit12 (968~992) 25 980,
1957 11:03:58.292597 TX Bit5 (970~994) 25 982, Bit13 (968~991) 24 979,
1958 11:03:58.295872 TX Bit6 (971~995) 25 983, Bit14 (968~992) 25 980,
1959 11:03:58.299044 TX Bit7 (974~998) 25 986, Bit15 (969~993) 25 981,
1960 11:03:58.299443
1961 11:03:58.302368 Write Rank1 MR14 =0x1c
1962 11:03:58.311637
1963 11:03:58.314951 CH=0, VrefRange= 0, VrefLevel = 28
1964 11:03:58.318329 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
1965 11:03:58.321501 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1966 11:03:58.328408 TX Bit2 (976~999) 24 987, Bit10 (973~996) 24 984,
1967 11:03:58.331536 TX Bit3 (969~994) 26 981, Bit11 (968~992) 25 980,
1968 11:03:58.335103 TX Bit4 (976~999) 24 987, Bit12 (968~992) 25 980,
1969 11:03:58.341611 TX Bit5 (970~994) 25 982, Bit13 (968~991) 24 979,
1970 11:03:58.345177 TX Bit6 (971~995) 25 983, Bit14 (968~992) 25 980,
1971 11:03:58.348248 TX Bit7 (974~998) 25 986, Bit15 (969~993) 25 981,
1972 11:03:58.348680
1973 11:03:58.351695 Write Rank1 MR14 =0x1e
1974 11:03:58.360717
1975 11:03:58.363909 CH=0, VrefRange= 0, VrefLevel = 30
1976 11:03:58.367499 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
1977 11:03:58.371165 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1978 11:03:58.377828 TX Bit2 (976~999) 24 987, Bit10 (973~996) 24 984,
1979 11:03:58.380935 TX Bit3 (969~994) 26 981, Bit11 (968~992) 25 980,
1980 11:03:58.384615 TX Bit4 (976~999) 24 987, Bit12 (968~992) 25 980,
1981 11:03:58.391205 TX Bit5 (970~994) 25 982, Bit13 (968~991) 24 979,
1982 11:03:58.394557 TX Bit6 (971~995) 25 983, Bit14 (968~992) 25 980,
1983 11:03:58.397757 TX Bit7 (974~998) 25 986, Bit15 (969~993) 25 981,
1984 11:03:58.398150
1985 11:03:58.401083 Write Rank1 MR14 =0x20
1986 11:03:58.410202
1987 11:03:58.410593 CH=0, VrefRange= 0, VrefLevel = 32
1988 11:03:58.417167 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
1989 11:03:58.420135 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1990 11:03:58.427532 TX Bit2 (976~999) 24 987, Bit10 (973~996) 24 984,
1991 11:03:58.430317 TX Bit3 (969~994) 26 981, Bit11 (968~992) 25 980,
1992 11:03:58.433704 TX Bit4 (976~999) 24 987, Bit12 (968~992) 25 980,
1993 11:03:58.440558 TX Bit5 (970~994) 25 982, Bit13 (968~991) 24 979,
1994 11:03:58.443788 TX Bit6 (971~995) 25 983, Bit14 (968~992) 25 980,
1995 11:03:58.447588 TX Bit7 (974~998) 25 986, Bit15 (969~993) 25 981,
1996 11:03:58.447992
1997 11:03:58.448401
1998 11:03:58.450908 TX Vref found, early break! 368< 376
1999 11:03:58.458388 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2000 11:03:58.460907 u1DelayCellOfst[0]=9 cells (7 PI)
2001 11:03:58.461420 u1DelayCellOfst[1]=7 cells (6 PI)
2002 11:03:58.464253 u1DelayCellOfst[2]=7 cells (6 PI)
2003 11:03:58.467833 u1DelayCellOfst[3]=0 cells (0 PI)
2004 11:03:58.471307 u1DelayCellOfst[4]=7 cells (6 PI)
2005 11:03:58.474806 u1DelayCellOfst[5]=1 cells (1 PI)
2006 11:03:58.477808 u1DelayCellOfst[6]=2 cells (2 PI)
2007 11:03:58.481127 u1DelayCellOfst[7]=6 cells (5 PI)
2008 11:03:58.484399 Byte0, DQ PI dly=981, DQM PI dly= 984
2009 11:03:58.488063 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2010 11:03:58.488592
2011 11:03:58.491573 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2012 11:03:58.492121
2013 11:03:58.495219 u1DelayCellOfst[8]=0 cells (0 PI)
2014 11:03:58.498220 u1DelayCellOfst[9]=0 cells (0 PI)
2015 11:03:58.501874 u1DelayCellOfst[10]=6 cells (5 PI)
2016 11:03:58.504892 u1DelayCellOfst[11]=1 cells (1 PI)
2017 11:03:58.508257 u1DelayCellOfst[12]=1 cells (1 PI)
2018 11:03:58.511487 u1DelayCellOfst[13]=0 cells (0 PI)
2019 11:03:58.514910 u1DelayCellOfst[14]=1 cells (1 PI)
2020 11:03:58.518137 u1DelayCellOfst[15]=2 cells (2 PI)
2021 11:03:58.521624 Byte1, DQ PI dly=979, DQM PI dly= 981
2022 11:03:58.525197 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2023 11:03:58.525511
2024 11:03:58.528425 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2025 11:03:58.528704
2026 11:03:58.531623 Write Rank1 MR14 =0x18
2027 11:03:58.531900
2028 11:03:58.535285 Final TX Range 0 Vref 24
2029 11:03:58.535569
2030 11:03:58.542206 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2031 11:03:58.542495
2032 11:03:58.548598 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2033 11:03:58.555557 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2034 11:03:58.561767 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2035 11:03:58.565401 Write Rank1 MR3 =0xb0
2036 11:03:58.565794 DramC Write-DBI on
2037 11:03:58.566097 ==
2038 11:03:58.572258 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2039 11:03:58.575618 fsp= 1, odt_onoff= 1, Byte mode= 0
2040 11:03:58.576090 ==
2041 11:03:58.579592 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2042 11:03:58.580085
2043 11:03:58.582273 Begin, DQ Scan Range 701~765
2044 11:03:58.582663
2045 11:03:58.582975
2046 11:03:58.583264 TX Vref Scan disable
2047 11:03:58.585554 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2048 11:03:58.589178 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2049 11:03:58.595549 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2050 11:03:58.599194 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2051 11:03:58.602619 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2052 11:03:58.605890 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2053 11:03:58.609364 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2054 11:03:58.613069 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2055 11:03:58.616668 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2056 11:03:58.619510 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2057 11:03:58.623055 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2058 11:03:58.625965 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2059 11:03:58.629368 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2060 11:03:58.632484 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2061 11:03:58.636373 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2062 11:03:58.640059 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2063 11:03:58.647140 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2064 11:03:58.650585 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2065 11:03:58.654055 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2066 11:03:58.657418 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2067 11:03:58.660959 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2068 11:03:58.663925 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2069 11:03:58.666944 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2070 11:03:58.670764 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2071 11:03:58.673922 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2072 11:03:58.677528 Byte0, DQ PI dly=730, DQM PI dly= 730
2073 11:03:58.680440 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2074 11:03:58.680842
2075 11:03:58.687283 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2076 11:03:58.687672
2077 11:03:58.690723 Byte1, DQ PI dly=723, DQM PI dly= 723
2078 11:03:58.694156 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2079 11:03:58.694547
2080 11:03:58.697879 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2081 11:03:58.698340
2082 11:03:58.705952 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2083 11:03:58.712589 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2084 11:03:58.719521 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2085 11:03:58.720029 Write Rank1 MR3 =0x30
2086 11:03:58.722886 DramC Write-DBI off
2087 11:03:58.723292
2088 11:03:58.723714 [DATLAT]
2089 11:03:58.726244 Freq=1600, CH0 RK1, use_rxtx_scan=0
2090 11:03:58.726631
2091 11:03:58.729465 DATLAT Default: 0x10
2092 11:03:58.729856 7, 0xFFFF, sum=0
2093 11:03:58.732996 8, 0xFFFF, sum=0
2094 11:03:58.733511 9, 0xFFFF, sum=0
2095 11:03:58.736389 10, 0xFFFF, sum=0
2096 11:03:58.736815 11, 0xFFFF, sum=0
2097 11:03:58.740034 12, 0xFFFF, sum=0
2098 11:03:58.740530 13, 0xFFFF, sum=0
2099 11:03:58.742698 14, 0x0, sum=1
2100 11:03:58.743088 15, 0x0, sum=2
2101 11:03:58.743512 16, 0x0, sum=3
2102 11:03:58.746238 17, 0x0, sum=4
2103 11:03:58.749727 pattern=2 first_step=14 total pass=5 best_step=16
2104 11:03:58.750130 ==
2105 11:03:58.756320 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2106 11:03:58.759885 fsp= 1, odt_onoff= 1, Byte mode= 0
2107 11:03:58.760277 ==
2108 11:03:58.763361 Start DQ dly to find pass range UseTestEngine =1
2109 11:03:58.766220 x-axis: bit #, y-axis: DQ dly (-127~63)
2110 11:03:58.769665 RX Vref Scan = 0
2111 11:03:58.772646 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2112 11:03:58.773114 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2113 11:03:58.776192 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2114 11:03:58.779691 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2115 11:03:58.783827 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2116 11:03:58.787286 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2117 11:03:58.791011 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2118 11:03:58.791414 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2119 11:03:58.794978 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2120 11:03:58.799104 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2121 11:03:58.803346 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2122 11:03:58.803735 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2123 11:03:58.806220 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2124 11:03:58.809783 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2125 11:03:58.813270 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2126 11:03:58.816305 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2127 11:03:58.819516 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2128 11:03:58.819790 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2129 11:03:58.823258 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2130 11:03:58.826957 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2131 11:03:58.830319 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2132 11:03:58.833866 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2133 11:03:58.836581 -4, [0] xxxoxxxx xxxxxxxx [MSB]
2134 11:03:58.836841 -3, [0] xxxoxxxx xxxxxxxx [MSB]
2135 11:03:58.839791 -2, [0] xxxoxoxx xxxxxxxx [MSB]
2136 11:03:58.844072 -1, [0] xxxoxoxx oxxxxxxx [MSB]
2137 11:03:58.846991 0, [0] xxxoxoxx oxxoxxxx [MSB]
2138 11:03:58.850570 1, [0] xxxoxoox oxxoxoxx [MSB]
2139 11:03:58.850780 2, [0] xxxoxooo oxxoooox [MSB]
2140 11:03:58.853684 3, [0] xxxoxooo ooxooooo [MSB]
2141 11:03:58.857000 4, [0] xxxoxooo ooxooooo [MSB]
2142 11:03:58.860600 5, [0] xxxoxooo ooxooooo [MSB]
2143 11:03:58.863961 6, [0] xoxooooo oooooooo [MSB]
2144 11:03:58.867984 32, [0] oooxoooo oooooooo [MSB]
2145 11:03:58.871382 33, [0] oooxoooo oooooooo [MSB]
2146 11:03:58.874819 34, [0] oooxoxoo oooooxoo [MSB]
2147 11:03:58.874990 35, [0] oooxoxox oooxoxxo [MSB]
2148 11:03:58.878086 36, [0] oooxoxxx xooxoxxo [MSB]
2149 11:03:58.881723 37, [0] oooxoxxx xxoxoxxo [MSB]
2150 11:03:58.884999 38, [0] oooxoxxx xxoxxxxo [MSB]
2151 11:03:58.888159 39, [0] oooxoxxx xxoxxxxx [MSB]
2152 11:03:58.891249 40, [0] ooxxoxxx xxoxxxxx [MSB]
2153 11:03:58.894647 41, [0] oxxxxxxx xxxxxxxx [MSB]
2154 11:03:58.894743 42, [0] oxxxxxxx xxxxxxxx [MSB]
2155 11:03:58.898398 43, [0] xxxxxxxx xxxxxxxx [MSB]
2156 11:03:58.901890 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
2157 11:03:58.905156 iDelay=43, Bit 1, Center 23 (6 ~ 40) 35
2158 11:03:58.908497 iDelay=43, Bit 2, Center 23 (7 ~ 39) 33
2159 11:03:58.911985 iDelay=43, Bit 3, Center 13 (-4 ~ 31) 36
2160 11:03:58.918648 iDelay=43, Bit 4, Center 23 (6 ~ 40) 35
2161 11:03:58.922376 iDelay=43, Bit 5, Center 15 (-2 ~ 33) 36
2162 11:03:58.925550 iDelay=43, Bit 6, Center 18 (1 ~ 35) 35
2163 11:03:58.928711 iDelay=43, Bit 7, Center 18 (2 ~ 34) 33
2164 11:03:58.932304 iDelay=43, Bit 8, Center 17 (-1 ~ 35) 37
2165 11:03:58.935455 iDelay=43, Bit 9, Center 19 (3 ~ 36) 34
2166 11:03:58.938624 iDelay=43, Bit 10, Center 23 (6 ~ 40) 35
2167 11:03:58.942252 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
2168 11:03:58.946030 iDelay=43, Bit 12, Center 19 (2 ~ 37) 36
2169 11:03:58.948976 iDelay=43, Bit 13, Center 17 (1 ~ 33) 33
2170 11:03:58.952626 iDelay=43, Bit 14, Center 18 (2 ~ 34) 33
2171 11:03:58.955846 iDelay=43, Bit 15, Center 20 (3 ~ 38) 36
2172 11:03:58.956296 ==
2173 11:03:58.962483 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2174 11:03:58.965801 fsp= 1, odt_onoff= 1, Byte mode= 0
2175 11:03:58.966276 ==
2176 11:03:58.966606 DQS Delay:
2177 11:03:58.969472 DQS0 = 0, DQS1 = 0
2178 11:03:58.969893 DQM Delay:
2179 11:03:58.970224 DQM0 = 19, DQM1 = 18
2180 11:03:58.972788 DQ Delay:
2181 11:03:58.976372 DQ0 =24, DQ1 =23, DQ2 =23, DQ3 =13
2182 11:03:58.979519 DQ4 =23, DQ5 =15, DQ6 =18, DQ7 =18
2183 11:03:58.982801 DQ8 =17, DQ9 =19, DQ10 =23, DQ11 =17
2184 11:03:58.986414 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20
2185 11:03:58.986835
2186 11:03:58.987163
2187 11:03:58.987457
2188 11:03:58.989833 [DramC_TX_OE_Calibration] TA2
2189 11:03:58.990255 Original DQ_B0 (3 6) =30, OEN = 27
2190 11:03:58.993353 Original DQ_B1 (3 6) =30, OEN = 27
2191 11:03:58.996447 23, 0x0, End_B0=23 End_B1=23
2192 11:03:58.999677 24, 0x0, End_B0=24 End_B1=24
2193 11:03:59.002929 25, 0x0, End_B0=25 End_B1=25
2194 11:03:59.006224 26, 0x0, End_B0=26 End_B1=26
2195 11:03:59.006723 27, 0x0, End_B0=27 End_B1=27
2196 11:03:59.009719 28, 0x0, End_B0=28 End_B1=28
2197 11:03:59.013361 29, 0x0, End_B0=29 End_B1=29
2198 11:03:59.016576 30, 0x0, End_B0=30 End_B1=30
2199 11:03:59.017074 31, 0xFFFF, End_B0=30 End_B1=30
2200 11:03:59.023011 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2201 11:03:59.029733 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2202 11:03:59.030180
2203 11:03:59.030606
2204 11:03:59.030962 Write Rank1 MR23 =0x3f
2205 11:03:59.033596 [DQSOSC]
2206 11:03:59.039839 [DQSOSCAuto] RK1, (LSB)MR18= 0x8f, (MSB)MR19= 0x3, tDQSOscB0 = 345 ps tDQSOscB1 = 0 ps
2207 11:03:59.046721 CH0_RK1: MR19=0x3, MR18=0x8F, DQSOSC=345, MR23=63, INC=20, DEC=31
2208 11:03:59.047269 Write Rank1 MR23 =0x3f
2209 11:03:59.050097 [DQSOSC]
2210 11:03:59.056575 [DQSOSCAuto] RK1, (LSB)MR18= 0x90, (MSB)MR19= 0x3, tDQSOscB0 = 345 ps tDQSOscB1 = 0 ps
2211 11:03:59.056981 CH0 RK1: MR19=3, MR18=90
2212 11:03:59.059876 [RxdqsGatingPostProcess] freq 1600
2213 11:03:59.066587 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2214 11:03:59.066986 Rank: 0
2215 11:03:59.069921 best DQS0 dly(2T, 0.5T) = (2, 5)
2216 11:03:59.073266 best DQS1 dly(2T, 0.5T) = (2, 5)
2217 11:03:59.076468 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2218 11:03:59.079906 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2219 11:03:59.080332 Rank: 1
2220 11:03:59.083556 best DQS0 dly(2T, 0.5T) = (2, 6)
2221 11:03:59.086928 best DQS1 dly(2T, 0.5T) = (2, 6)
2222 11:03:59.090078 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2223 11:03:59.093805 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2224 11:03:59.096798 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2225 11:03:59.100498 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2226 11:03:59.106835 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2227 11:03:59.107255 Write Rank0 MR13 =0x59
2228 11:03:59.107672 ==
2229 11:03:59.113513 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2230 11:03:59.116902 fsp= 1, odt_onoff= 1, Byte mode= 0
2231 11:03:59.117329 ==
2232 11:03:59.120898 === u2Vref_new: 0x56 --> 0x3a
2233 11:03:59.123714 === u2Vref_new: 0x58 --> 0x58
2234 11:03:59.127046 === u2Vref_new: 0x5a --> 0x5a
2235 11:03:59.127446 === u2Vref_new: 0x5c --> 0x78
2236 11:03:59.130780 === u2Vref_new: 0x5e --> 0x7a
2237 11:03:59.134214 === u2Vref_new: 0x60 --> 0x90
2238 11:03:59.137496 [CA 0] Center 37 (11~63) winsize 53
2239 11:03:59.140873 [CA 1] Center 36 (9~63) winsize 55
2240 11:03:59.144304 [CA 2] Center 33 (4~63) winsize 60
2241 11:03:59.147732 [CA 3] Center 33 (4~63) winsize 60
2242 11:03:59.150949 [CA 4] Center 34 (6~63) winsize 58
2243 11:03:59.154669 [CA 5] Center 28 (-1~57) winsize 59
2244 11:03:59.155234
2245 11:03:59.157756 [CATrainingPosCal] consider 1 rank data
2246 11:03:59.160878 u2DelayCellTimex100 = 753/100 ps
2247 11:03:59.164588 CA0 delay=37 (11~63),Diff = 9 PI (11 cell)
2248 11:03:59.167686 CA1 delay=36 (9~63),Diff = 8 PI (10 cell)
2249 11:03:59.171209 CA2 delay=33 (4~63),Diff = 5 PI (6 cell)
2250 11:03:59.174584 CA3 delay=33 (4~63),Diff = 5 PI (6 cell)
2251 11:03:59.177728 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2252 11:03:59.181528 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2253 11:03:59.181953
2254 11:03:59.187864 CA PerBit enable=1, Macro0, CA PI delay=28
2255 11:03:59.188309 === u2Vref_new: 0x56 --> 0x3a
2256 11:03:59.188663
2257 11:03:59.191400 Vref(ca) range 1: 22
2258 11:03:59.191823
2259 11:03:59.194621 CS Dly= 12 (43-0-32)
2260 11:03:59.195061 Write Rank0 MR13 =0xd8
2261 11:03:59.197656 Write Rank0 MR13 =0xd8
2262 11:03:59.201002 Write Rank0 MR12 =0x56
2263 11:03:59.201491 Write Rank1 MR13 =0x59
2264 11:03:59.201795 ==
2265 11:03:59.207768 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2266 11:03:59.211200 fsp= 1, odt_onoff= 1, Byte mode= 0
2267 11:03:59.211641 ==
2268 11:03:59.214762 === u2Vref_new: 0x56 --> 0x3a
2269 11:03:59.215285 === u2Vref_new: 0x58 --> 0x58
2270 11:03:59.218376 === u2Vref_new: 0x5a --> 0x5a
2271 11:03:59.221725 === u2Vref_new: 0x5c --> 0x78
2272 11:03:59.224782 === u2Vref_new: 0x5e --> 0x7a
2273 11:03:59.228195 === u2Vref_new: 0x60 --> 0x90
2274 11:03:59.228683
2275 11:03:59.231904 CBT Vref found, early break!
2276 11:03:59.235227 [CA 0] Center 37 (11~63) winsize 53
2277 11:03:59.238415 [CA 1] Center 35 (8~63) winsize 56
2278 11:03:59.241541 [CA 2] Center 34 (5~63) winsize 59
2279 11:03:59.244921 [CA 3] Center 34 (5~63) winsize 59
2280 11:03:59.248494 [CA 4] Center 35 (7~63) winsize 57
2281 11:03:59.251792 [CA 5] Center 28 (-1~57) winsize 59
2282 11:03:59.252279
2283 11:03:59.255175 [CATrainingPosCal] consider 2 rank data
2284 11:03:59.258710 u2DelayCellTimex100 = 753/100 ps
2285 11:03:59.261890 CA0 delay=37 (11~63),Diff = 9 PI (11 cell)
2286 11:03:59.265481 CA1 delay=36 (9~63),Diff = 8 PI (10 cell)
2287 11:03:59.268621 CA2 delay=34 (5~63),Diff = 6 PI (7 cell)
2288 11:03:59.271905 CA3 delay=34 (5~63),Diff = 6 PI (7 cell)
2289 11:03:59.275313 CA4 delay=35 (7~63),Diff = 7 PI (9 cell)
2290 11:03:59.278811 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2291 11:03:59.279243
2292 11:03:59.282338 CA PerBit enable=1, Macro0, CA PI delay=28
2293 11:03:59.285339 === u2Vref_new: 0x56 --> 0x3a
2294 11:03:59.285725
2295 11:03:59.288527 Vref(ca) range 1: 22
2296 11:03:59.288908
2297 11:03:59.289204 CS Dly= 12 (43-0-32)
2298 11:03:59.292300 Write Rank1 MR13 =0xd8
2299 11:03:59.295350 Write Rank1 MR13 =0xd8
2300 11:03:59.295758 Write Rank1 MR12 =0x56
2301 11:03:59.298740 [RankSwap] Rank num 2, (Multi 1), Rank 0
2302 11:03:59.301881 Write Rank0 MR2 =0xad
2303 11:03:59.302385 [Write Leveling]
2304 11:03:59.305356 delay byte0 byte1 byte2 byte3
2305 11:03:59.305762
2306 11:03:59.308765 10 0 0
2307 11:03:59.309156 11 0 0
2308 11:03:59.312011 12 0 0
2309 11:03:59.312400 13 0 0
2310 11:03:59.312699 14 0 0
2311 11:03:59.315418 15 0 0
2312 11:03:59.315812 16 0 0
2313 11:03:59.319471 17 0 0
2314 11:03:59.319939 18 0 0
2315 11:03:59.320296 19 0 0
2316 11:03:59.322782 20 0 0
2317 11:03:59.323252 21 0 0
2318 11:03:59.325660 22 0 0
2319 11:03:59.326052 23 0 0
2320 11:03:59.326351 24 0 0
2321 11:03:59.329057 25 0 0
2322 11:03:59.329501 26 0 0
2323 11:03:59.332348 27 0 0
2324 11:03:59.332793 28 0 0
2325 11:03:59.335754 29 0 0
2326 11:03:59.336145 30 0 0
2327 11:03:59.336452 31 0 0
2328 11:03:59.339292 32 0 0
2329 11:03:59.339681 33 0 ff
2330 11:03:59.342929 34 0 ff
2331 11:03:59.343479 35 0 ff
2332 11:03:59.343860 36 0 ff
2333 11:03:59.345656 37 ff ff
2334 11:03:59.346184 38 ff ff
2335 11:03:59.349089 39 ff ff
2336 11:03:59.349522 40 ff ff
2337 11:03:59.352322 41 ff ff
2338 11:03:59.352768 42 ff ff
2339 11:03:59.355828 43 ff ff
2340 11:03:59.359395 pass bytecount = 0xff (0xff: all bytes pass)
2341 11:03:59.359782
2342 11:03:59.360118 DQS0 dly: 37
2343 11:03:59.362513 DQS1 dly: 33
2344 11:03:59.363017 Write Rank0 MR2 =0x2d
2345 11:03:59.366106 [RankSwap] Rank num 2, (Multi 1), Rank 0
2346 11:03:59.369404 Write Rank0 MR1 =0xd6
2347 11:03:59.369792 [Gating]
2348 11:03:59.370092 ==
2349 11:03:59.375974 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2350 11:03:59.379458 fsp= 1, odt_onoff= 1, Byte mode= 0
2351 11:03:59.379846 ==
2352 11:03:59.383454 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2353 11:03:59.386136 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2354 11:03:59.392949 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2355 11:03:59.396630 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2356 11:03:59.400089 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2357 11:03:59.406404 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2358 11:03:59.409799 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2359 11:03:59.413335 3 1 28 |201 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2360 11:03:59.416806 3 2 0 |b0a 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2361 11:03:59.423311 3 2 4 |3d3d 1a19 |(11 11)(11 11) |(1 1)(0 0)| 0
2362 11:03:59.426771 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2363 11:03:59.430038 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2364 11:03:59.437168 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2365 11:03:59.440180 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2366 11:03:59.443624 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2367 11:03:59.446821 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2368 11:03:59.453720 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2369 11:03:59.456792 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2370 11:03:59.460246 3 3 8 |504 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2371 11:03:59.463470 [Byte 0] Lead/lag Transition tap number (1)
2372 11:03:59.469904 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2373 11:03:59.473541 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2374 11:03:59.477263 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2375 11:03:59.483815 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2376 11:03:59.487009 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2377 11:03:59.490501 3 4 0 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2378 11:03:59.497127 3 4 4 |3d3d 3636 |(11 11)(11 11) |(1 1)(1 1)| 0
2379 11:03:59.500354 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2380 11:03:59.503719 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2381 11:03:59.506868 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2382 11:03:59.514079 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2383 11:03:59.517157 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2384 11:03:59.520548 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2385 11:03:59.527504 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2386 11:03:59.530809 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2387 11:03:59.533983 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2388 11:03:59.540602 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2389 11:03:59.543827 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2390 11:03:59.547328 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2391 11:03:59.550887 [Byte 0] Lead/lag falling Transition (3, 5, 20)
2392 11:03:59.557502 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2393 11:03:59.560621 [Byte 0] Lead/lag Transition tap number (2)
2394 11:03:59.564200 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2395 11:03:59.567541 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2396 11:03:59.574191 3 6 0 |606 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2397 11:03:59.577812 [Byte 1] Lead/lag Transition tap number (3)
2398 11:03:59.580514 3 6 4 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
2399 11:03:59.584084 [Byte 0]First pass (3, 6, 4)
2400 11:03:59.587483 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2401 11:03:59.590743 [Byte 1]First pass (3, 6, 8)
2402 11:03:59.594203 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2403 11:03:59.597766 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2404 11:03:59.604212 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2405 11:03:59.607701 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2406 11:03:59.610997 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2407 11:03:59.614234 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2408 11:03:59.617556 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2409 11:03:59.620907 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2410 11:03:59.627295 All bytes gating window > 1UI, Early break!
2411 11:03:59.627954
2412 11:03:59.630750 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)
2413 11:03:59.631139
2414 11:03:59.633970 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
2415 11:03:59.634425
2416 11:03:59.634833
2417 11:03:59.635231
2418 11:03:59.637703 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
2419 11:03:59.638089
2420 11:03:59.641215 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
2421 11:03:59.641645
2422 11:03:59.644053
2423 11:03:59.644440 Write Rank0 MR1 =0x56
2424 11:03:59.644741
2425 11:03:59.647431 best RODT dly(2T, 0.5T) = (2, 2)
2426 11:03:59.647842
2427 11:03:59.650758 best RODT dly(2T, 0.5T) = (2, 2)
2428 11:03:59.651143 ==
2429 11:03:59.657349 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2430 11:03:59.660917 fsp= 1, odt_onoff= 1, Byte mode= 0
2431 11:03:59.661341 ==
2432 11:03:59.664221 Start DQ dly to find pass range UseTestEngine =0
2433 11:03:59.667924 x-axis: bit #, y-axis: DQ dly (-127~63)
2434 11:03:59.668398 RX Vref Scan = 0
2435 11:03:59.671004 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2436 11:03:59.674381 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2437 11:03:59.677761 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2438 11:03:59.680735 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2439 11:03:59.684113 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2440 11:03:59.687778 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2441 11:03:59.690834 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2442 11:03:59.691270 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2443 11:03:59.694410 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2444 11:03:59.697923 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2445 11:03:59.700879 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2446 11:03:59.704417 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2447 11:03:59.707754 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2448 11:03:59.711004 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2449 11:03:59.714313 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2450 11:03:59.714827 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2451 11:03:59.717547 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2452 11:03:59.721383 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2453 11:03:59.724235 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2454 11:03:59.727862 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2455 11:03:59.731400 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2456 11:03:59.734831 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2457 11:03:59.735346 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2458 11:03:59.738188 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2459 11:03:59.741437 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2460 11:03:59.744371 -1, [0] xxxxxxxx xxxxxxxo [MSB]
2461 11:03:59.747547 0, [0] xxxoxxxx xxxxxxxo [MSB]
2462 11:03:59.751011 1, [0] xxooxxxx xxoxxxxo [MSB]
2463 11:03:59.751451 2, [0] xxooxxxo oxoxxxxo [MSB]
2464 11:03:59.754686 3, [0] xxoooxxo ooooxxoo [MSB]
2465 11:03:59.757575 4, [0] xxoooxxo oooooooo [MSB]
2466 11:03:59.760880 5, [0] xooooxxo oooooooo [MSB]
2467 11:03:59.764185 6, [0] xooooxxo oooooooo [MSB]
2468 11:03:59.767788 31, [0] oooooooo oooooooo [MSB]
2469 11:03:59.770905 32, [0] oooxoooo oooooooo [MSB]
2470 11:03:59.771342 33, [0] ooxxoooo ooooooox [MSB]
2471 11:03:59.774257 34, [0] ooxxoooo oxooooox [MSB]
2472 11:03:59.778004 35, [0] ooxxoooo oxxxooox [MSB]
2473 11:03:59.781001 36, [0] ooxxoooo xxxxooxx [MSB]
2474 11:03:59.784767 37, [0] ooxxxoox xxxxoxxx [MSB]
2475 11:03:59.788284 38, [0] ooxxxoox xxxxoxxx [MSB]
2476 11:03:59.788796 39, [0] ooxxxoox xxxxxxxx [MSB]
2477 11:03:59.790975 40, [0] ooxxxoox xxxxxxxx [MSB]
2478 11:03:59.794476 41, [0] ooxxxoxx xxxxxxxx [MSB]
2479 11:03:59.797692 42, [0] xxxxxoxx xxxxxxxx [MSB]
2480 11:03:59.801456 43, [0] xxxxxxxx xxxxxxxx [MSB]
2481 11:03:59.804772 iDelay=43, Bit 0, Center 24 (7 ~ 41) 35
2482 11:03:59.807848 iDelay=43, Bit 1, Center 23 (5 ~ 41) 37
2483 11:03:59.811095 iDelay=43, Bit 2, Center 16 (1 ~ 32) 32
2484 11:03:59.814610 iDelay=43, Bit 3, Center 15 (0 ~ 31) 32
2485 11:03:59.817890 iDelay=43, Bit 4, Center 19 (3 ~ 36) 34
2486 11:03:59.821684 iDelay=43, Bit 5, Center 24 (7 ~ 42) 36
2487 11:03:59.824723 iDelay=43, Bit 6, Center 23 (7 ~ 40) 34
2488 11:03:59.828093 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
2489 11:03:59.831304 iDelay=43, Bit 8, Center 18 (2 ~ 35) 34
2490 11:03:59.834811 iDelay=43, Bit 9, Center 18 (3 ~ 33) 31
2491 11:03:59.841579 iDelay=43, Bit 10, Center 17 (1 ~ 34) 34
2492 11:03:59.844436 iDelay=43, Bit 11, Center 18 (3 ~ 34) 32
2493 11:03:59.847857 iDelay=43, Bit 12, Center 21 (4 ~ 38) 35
2494 11:03:59.851484 iDelay=43, Bit 13, Center 20 (4 ~ 36) 33
2495 11:03:59.854483 iDelay=43, Bit 14, Center 19 (3 ~ 35) 33
2496 11:03:59.857798 iDelay=43, Bit 15, Center 15 (-2 ~ 32) 35
2497 11:03:59.858284 ==
2498 11:03:59.864701 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2499 11:03:59.867888 fsp= 1, odt_onoff= 1, Byte mode= 0
2500 11:03:59.868318 ==
2501 11:03:59.868651 DQS Delay:
2502 11:03:59.868959 DQS0 = 0, DQS1 = 0
2503 11:03:59.871238 DQM Delay:
2504 11:03:59.871739 DQM0 = 20, DQM1 = 18
2505 11:03:59.874821 DQ Delay:
2506 11:03:59.877767 DQ0 =24, DQ1 =23, DQ2 =16, DQ3 =15
2507 11:03:59.878197 DQ4 =19, DQ5 =24, DQ6 =23, DQ7 =19
2508 11:03:59.881332 DQ8 =18, DQ9 =18, DQ10 =17, DQ11 =18
2509 11:03:59.884839 DQ12 =21, DQ13 =20, DQ14 =19, DQ15 =15
2510 11:03:59.887811
2511 11:03:59.888240
2512 11:03:59.888569 DramC Write-DBI off
2513 11:03:59.888879 ==
2514 11:03:59.894918 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2515 11:03:59.898015 fsp= 1, odt_onoff= 1, Byte mode= 0
2516 11:03:59.898449 ==
2517 11:03:59.901383 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2518 11:03:59.901883
2519 11:03:59.904509 Begin, DQ Scan Range 929~1185
2520 11:03:59.904949
2521 11:03:59.905304
2522 11:03:59.908078 TX Vref Scan disable
2523 11:03:59.911387 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2524 11:03:59.914705 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2525 11:03:59.917780 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2526 11:03:59.921409 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2527 11:03:59.924839 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2528 11:03:59.928329 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2529 11:03:59.931565 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2530 11:03:59.934753 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2531 11:03:59.938235 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2532 11:03:59.941614 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2533 11:03:59.944900 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2534 11:03:59.947967 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2535 11:03:59.951396 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2536 11:03:59.955240 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2537 11:03:59.958283 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2538 11:03:59.961475 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2539 11:03:59.964613 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2540 11:03:59.971492 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2541 11:03:59.975132 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2542 11:03:59.978448 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2543 11:03:59.981746 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2544 11:03:59.985825 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2545 11:03:59.988394 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2546 11:03:59.991951 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2547 11:03:59.995260 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2548 11:03:59.998197 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2549 11:04:00.001474 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2550 11:04:00.004883 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2551 11:04:00.008166 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2552 11:04:00.011538 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2553 11:04:00.014935 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2554 11:04:00.018277 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2555 11:04:00.021934 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2556 11:04:00.025252 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2557 11:04:00.028661 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2558 11:04:00.031816 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2559 11:04:00.038503 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2560 11:04:00.041699 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2561 11:04:00.044862 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2562 11:04:00.048409 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2563 11:04:00.051989 969 |3 6 9|[0] xxxxxxxx xxxxxxxo [MSB]
2564 11:04:00.055120 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2565 11:04:00.058445 971 |3 6 11|[0] xxxxxxxx oooxxxxo [MSB]
2566 11:04:00.061479 972 |3 6 12|[0] xxxxxxxx ooooxxoo [MSB]
2567 11:04:00.064761 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
2568 11:04:00.068273 974 |3 6 14|[0] xxxoxxxx oooooooo [MSB]
2569 11:04:00.071657 975 |3 6 15|[0] xxoooxxx oooooooo [MSB]
2570 11:04:00.074542 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
2571 11:04:00.082882 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2572 11:04:00.086182 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2573 11:04:00.089602 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
2574 11:04:00.092573 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]
2575 11:04:00.096339 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
2576 11:04:00.099168 997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]
2577 11:04:00.102556 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
2578 11:04:00.105854 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2579 11:04:00.109336 Byte0, DQ PI dly=985, DQM PI dly= 985
2580 11:04:00.112746 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2581 11:04:00.113256
2582 11:04:00.119247 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2583 11:04:00.119769
2584 11:04:00.122764 Byte1, DQ PI dly=981, DQM PI dly= 981
2585 11:04:00.126190 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2586 11:04:00.126622
2587 11:04:00.129503 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2588 11:04:00.130054
2589 11:04:00.130388 ==
2590 11:04:00.136153 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2591 11:04:00.139851 fsp= 1, odt_onoff= 1, Byte mode= 0
2592 11:04:00.140360 ==
2593 11:04:00.142893 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2594 11:04:00.143397
2595 11:04:00.146240 Begin, DQ Scan Range 957~1021
2596 11:04:00.149648 Write Rank0 MR14 =0x0
2597 11:04:00.156780
2598 11:04:00.157311 CH=1, VrefRange= 0, VrefLevel = 0
2599 11:04:00.163088 TX Bit0 (980~997) 18 988, Bit8 (972~991) 20 981,
2600 11:04:00.166222 TX Bit1 (978~995) 18 986, Bit9 (972~988) 17 980,
2601 11:04:00.172967 TX Bit2 (977~991) 15 984, Bit10 (974~989) 16 981,
2602 11:04:00.177063 TX Bit3 (976~990) 15 983, Bit11 (976~991) 16 983,
2603 11:04:00.179799 TX Bit4 (977~992) 16 984, Bit12 (976~992) 17 984,
2604 11:04:00.186673 TX Bit5 (979~997) 19 988, Bit13 (976~991) 16 983,
2605 11:04:00.190106 TX Bit6 (980~997) 18 988, Bit14 (976~990) 15 983,
2606 11:04:00.192860 TX Bit7 (978~992) 15 985, Bit15 (970~988) 19 979,
2607 11:04:00.193382
2608 11:04:00.196854 Write Rank0 MR14 =0x2
2609 11:04:00.205152
2610 11:04:00.205699 CH=1, VrefRange= 0, VrefLevel = 2
2611 11:04:00.211517 TX Bit0 (980~997) 18 988, Bit8 (971~991) 21 981,
2612 11:04:00.214571 TX Bit1 (978~996) 19 987, Bit9 (971~990) 20 980,
2613 11:04:00.221368 TX Bit2 (976~991) 16 983, Bit10 (974~990) 17 982,
2614 11:04:00.224666 TX Bit3 (975~990) 16 982, Bit11 (975~991) 17 983,
2615 11:04:00.228323 TX Bit4 (977~993) 17 985, Bit12 (976~992) 17 984,
2616 11:04:00.234663 TX Bit5 (978~998) 21 988, Bit13 (976~991) 16 983,
2617 11:04:00.237928 TX Bit6 (979~998) 20 988, Bit14 (975~991) 17 983,
2618 11:04:00.241255 TX Bit7 (978~992) 15 985, Bit15 (970~988) 19 979,
2619 11:04:00.241690
2620 11:04:00.244919 Write Rank0 MR14 =0x4
2621 11:04:00.253276
2622 11:04:00.253782 CH=1, VrefRange= 0, VrefLevel = 4
2623 11:04:00.259815 TX Bit0 (979~998) 20 988, Bit8 (971~991) 21 981,
2624 11:04:00.263459 TX Bit1 (977~997) 21 987, Bit9 (970~990) 21 980,
2625 11:04:00.269528 TX Bit2 (976~991) 16 983, Bit10 (973~990) 18 981,
2626 11:04:00.273074 TX Bit3 (975~990) 16 982, Bit11 (975~992) 18 983,
2627 11:04:00.276328 TX Bit4 (977~994) 18 985, Bit12 (975~992) 18 983,
2628 11:04:00.283251 TX Bit5 (978~998) 21 988, Bit13 (975~992) 18 983,
2629 11:04:00.286736 TX Bit6 (979~998) 20 988, Bit14 (975~991) 17 983,
2630 11:04:00.289955 TX Bit7 (977~993) 17 985, Bit15 (970~989) 20 979,
2631 11:04:00.290475
2632 11:04:00.293352 Write Rank0 MR14 =0x6
2633 11:04:00.301663
2634 11:04:00.302171 CH=1, VrefRange= 0, VrefLevel = 6
2635 11:04:00.308626 TX Bit0 (979~998) 20 988, Bit8 (971~991) 21 981,
2636 11:04:00.312280 TX Bit1 (977~997) 21 987, Bit9 (970~991) 22 980,
2637 11:04:00.318457 TX Bit2 (976~992) 17 984, Bit10 (973~991) 19 982,
2638 11:04:00.321946 TX Bit3 (975~991) 17 983, Bit11 (974~992) 19 983,
2639 11:04:00.325382 TX Bit4 (976~994) 19 985, Bit12 (975~992) 18 983,
2640 11:04:00.331709 TX Bit5 (978~998) 21 988, Bit13 (975~992) 18 983,
2641 11:04:00.335456 TX Bit6 (978~998) 21 988, Bit14 (974~991) 18 982,
2642 11:04:00.338503 TX Bit7 (977~993) 17 985, Bit15 (970~989) 20 979,
2643 11:04:00.339013
2644 11:04:00.341775 Write Rank0 MR14 =0x8
2645 11:04:00.349838
2646 11:04:00.350338 CH=1, VrefRange= 0, VrefLevel = 8
2647 11:04:00.357164 TX Bit0 (979~998) 20 988, Bit8 (971~992) 22 981,
2648 11:04:00.359822 TX Bit1 (977~997) 21 987, Bit9 (970~991) 22 980,
2649 11:04:00.366547 TX Bit2 (976~992) 17 984, Bit10 (972~991) 20 981,
2650 11:04:00.370154 TX Bit3 (974~992) 19 983, Bit11 (974~992) 19 983,
2651 11:04:00.373199 TX Bit4 (976~995) 20 985, Bit12 (975~993) 19 984,
2652 11:04:00.380488 TX Bit5 (978~998) 21 988, Bit13 (975~992) 18 983,
2653 11:04:00.383451 TX Bit6 (978~998) 21 988, Bit14 (974~992) 19 983,
2654 11:04:00.386702 TX Bit7 (977~994) 18 985, Bit15 (969~990) 22 979,
2655 11:04:00.387136
2656 11:04:00.390370 Write Rank0 MR14 =0xa
2657 11:04:00.398656
2658 11:04:00.401885 CH=1, VrefRange= 0, VrefLevel = 10
2659 11:04:00.405072 TX Bit0 (978~999) 22 988, Bit8 (971~992) 22 981,
2660 11:04:00.408712 TX Bit1 (977~998) 22 987, Bit9 (970~992) 23 981,
2661 11:04:00.415298 TX Bit2 (976~992) 17 984, Bit10 (972~992) 21 982,
2662 11:04:00.418391 TX Bit3 (974~992) 19 983, Bit11 (974~992) 19 983,
2663 11:04:00.422160 TX Bit4 (976~996) 21 986, Bit12 (974~993) 20 983,
2664 11:04:00.428928 TX Bit5 (977~998) 22 987, Bit13 (975~992) 18 983,
2665 11:04:00.432321 TX Bit6 (978~998) 21 988, Bit14 (974~992) 19 983,
2666 11:04:00.435556 TX Bit7 (977~994) 18 985, Bit15 (969~991) 23 980,
2667 11:04:00.436061
2668 11:04:00.438448 Write Rank0 MR14 =0xc
2669 11:04:00.447331
2670 11:04:00.450448 CH=1, VrefRange= 0, VrefLevel = 12
2671 11:04:00.454043 TX Bit0 (978~999) 22 988, Bit8 (970~992) 23 981,
2672 11:04:00.457308 TX Bit1 (977~998) 22 987, Bit9 (970~991) 22 980,
2673 11:04:00.464116 TX Bit2 (975~993) 19 984, Bit10 (971~992) 22 981,
2674 11:04:00.467232 TX Bit3 (973~992) 20 982, Bit11 (973~993) 21 983,
2675 11:04:00.470558 TX Bit4 (976~996) 21 986, Bit12 (974~993) 20 983,
2676 11:04:00.477023 TX Bit5 (977~999) 23 988, Bit13 (973~992) 20 982,
2677 11:04:00.480854 TX Bit6 (977~999) 23 988, Bit14 (973~992) 20 982,
2678 11:04:00.484028 TX Bit7 (977~995) 19 986, Bit15 (969~991) 23 980,
2679 11:04:00.484537
2680 11:04:00.486978 Write Rank0 MR14 =0xe
2681 11:04:00.495981
2682 11:04:00.499072 CH=1, VrefRange= 0, VrefLevel = 14
2683 11:04:00.502644 TX Bit0 (978~999) 22 988, Bit8 (970~992) 23 981,
2684 11:04:00.506476 TX Bit1 (977~998) 22 987, Bit9 (970~992) 23 981,
2685 11:04:00.512935 TX Bit2 (975~994) 20 984, Bit10 (971~992) 22 981,
2686 11:04:00.516160 TX Bit3 (973~993) 21 983, Bit11 (972~993) 22 982,
2687 11:04:00.519389 TX Bit4 (976~997) 22 986, Bit12 (974~994) 21 984,
2688 11:04:00.526146 TX Bit5 (977~999) 23 988, Bit13 (973~993) 21 983,
2689 11:04:00.529276 TX Bit6 (977~999) 23 988, Bit14 (973~992) 20 982,
2690 11:04:00.533059 TX Bit7 (976~996) 21 986, Bit15 (969~991) 23 980,
2691 11:04:00.533613
2692 11:04:00.535943 Write Rank0 MR14 =0x10
2693 11:04:00.544677
2694 11:04:00.547951 CH=1, VrefRange= 0, VrefLevel = 16
2695 11:04:00.551004 TX Bit0 (977~999) 23 988, Bit8 (970~992) 23 981,
2696 11:04:00.554339 TX Bit1 (977~998) 22 987, Bit9 (970~992) 23 981,
2697 11:04:00.561183 TX Bit2 (975~994) 20 984, Bit10 (971~992) 22 981,
2698 11:04:00.564626 TX Bit3 (973~993) 21 983, Bit11 (972~993) 22 982,
2699 11:04:00.567931 TX Bit4 (976~997) 22 986, Bit12 (973~994) 22 983,
2700 11:04:00.574731 TX Bit5 (977~999) 23 988, Bit13 (973~993) 21 983,
2701 11:04:00.577909 TX Bit6 (977~999) 23 988, Bit14 (972~992) 21 982,
2702 11:04:00.581493 TX Bit7 (976~996) 21 986, Bit15 (969~991) 23 980,
2703 11:04:00.582000
2704 11:04:00.584608 Write Rank0 MR14 =0x12
2705 11:04:00.593564
2706 11:04:00.596911 CH=1, VrefRange= 0, VrefLevel = 18
2707 11:04:00.600087 TX Bit0 (977~1000) 24 988, Bit8 (970~993) 24 981,
2708 11:04:00.603565 TX Bit1 (977~998) 22 987, Bit9 (970~992) 23 981,
2709 11:04:00.610112 TX Bit2 (975~995) 21 985, Bit10 (971~992) 22 981,
2710 11:04:00.613570 TX Bit3 (972~994) 23 983, Bit11 (972~994) 23 983,
2711 11:04:00.616746 TX Bit4 (975~998) 24 986, Bit12 (972~994) 23 983,
2712 11:04:00.623581 TX Bit5 (977~999) 23 988, Bit13 (972~993) 22 982,
2713 11:04:00.626891 TX Bit6 (977~1000) 24 988, Bit14 (972~993) 22 982,
2714 11:04:00.630295 TX Bit7 (976~997) 22 986, Bit15 (969~991) 23 980,
2715 11:04:00.633221
2716 11:04:00.633689 Write Rank0 MR14 =0x14
2717 11:04:00.642673
2718 11:04:00.645597 CH=1, VrefRange= 0, VrefLevel = 20
2719 11:04:00.649080 TX Bit0 (977~1000) 24 988, Bit8 (970~992) 23 981,
2720 11:04:00.652306 TX Bit1 (977~999) 23 988, Bit9 (970~992) 23 981,
2721 11:04:00.659178 TX Bit2 (975~995) 21 985, Bit10 (971~993) 23 982,
2722 11:04:00.662557 TX Bit3 (972~994) 23 983, Bit11 (971~994) 24 982,
2723 11:04:00.665868 TX Bit4 (975~998) 24 986, Bit12 (972~994) 23 983,
2724 11:04:00.672679 TX Bit5 (977~1000) 24 988, Bit13 (972~994) 23 983,
2725 11:04:00.675908 TX Bit6 (977~1000) 24 988, Bit14 (971~993) 23 982,
2726 11:04:00.679481 TX Bit7 (976~997) 22 986, Bit15 (968~992) 25 980,
2727 11:04:00.679960
2728 11:04:00.682650 Write Rank0 MR14 =0x16
2729 11:04:00.692364
2730 11:04:00.694887 CH=1, VrefRange= 0, VrefLevel = 22
2731 11:04:00.698212 TX Bit0 (977~1000) 24 988, Bit8 (969~992) 24 980,
2732 11:04:00.701325 TX Bit1 (976~999) 24 987, Bit9 (970~992) 23 981,
2733 11:04:00.708241 TX Bit2 (974~996) 23 985, Bit10 (970~993) 24 981,
2734 11:04:00.711786 TX Bit3 (971~995) 25 983, Bit11 (971~994) 24 982,
2735 11:04:00.714926 TX Bit4 (975~998) 24 986, Bit12 (972~995) 24 983,
2736 11:04:00.721525 TX Bit5 (976~999) 24 987, Bit13 (972~994) 23 983,
2737 11:04:00.725024 TX Bit6 (977~1000) 24 988, Bit14 (971~993) 23 982,
2738 11:04:00.728491 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2739 11:04:00.731380
2740 11:04:00.731873 Write Rank0 MR14 =0x18
2741 11:04:00.740493
2742 11:04:00.743867 CH=1, VrefRange= 0, VrefLevel = 24
2743 11:04:00.747247 TX Bit0 (977~1000) 24 988, Bit8 (969~992) 24 980,
2744 11:04:00.750511 TX Bit1 (976~999) 24 987, Bit9 (970~992) 23 981,
2745 11:04:00.757717 TX Bit2 (974~996) 23 985, Bit10 (970~993) 24 981,
2746 11:04:00.761024 TX Bit3 (971~995) 25 983, Bit11 (971~994) 24 982,
2747 11:04:00.764343 TX Bit4 (975~998) 24 986, Bit12 (972~995) 24 983,
2748 11:04:00.770696 TX Bit5 (976~999) 24 987, Bit13 (972~994) 23 983,
2749 11:04:00.774588 TX Bit6 (977~1000) 24 988, Bit14 (971~993) 23 982,
2750 11:04:00.777487 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2751 11:04:00.777923
2752 11:04:00.780801 Write Rank0 MR14 =0x1a
2753 11:04:00.790131
2754 11:04:00.790641 CH=1, VrefRange= 0, VrefLevel = 26
2755 11:04:00.796535 TX Bit0 (977~1001) 25 989, Bit8 (969~992) 24 980,
2756 11:04:00.800221 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2757 11:04:00.806912 TX Bit2 (973~997) 25 985, Bit10 (970~993) 24 981,
2758 11:04:00.810233 TX Bit3 (971~994) 24 982, Bit11 (971~994) 24 982,
2759 11:04:00.813723 TX Bit4 (975~998) 24 986, Bit12 (971~995) 25 983,
2760 11:04:00.820562 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
2761 11:04:00.823868 TX Bit6 (977~1000) 24 988, Bit14 (971~993) 23 982,
2762 11:04:00.826974 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2763 11:04:00.829982
2764 11:04:00.830499 Write Rank0 MR14 =0x1c
2765 11:04:00.839483
2766 11:04:00.839995 CH=1, VrefRange= 0, VrefLevel = 28
2767 11:04:00.846056 TX Bit0 (977~1001) 25 989, Bit8 (969~992) 24 980,
2768 11:04:00.849125 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2769 11:04:00.856001 TX Bit2 (973~997) 25 985, Bit10 (970~993) 24 981,
2770 11:04:00.859484 TX Bit3 (971~994) 24 982, Bit11 (971~994) 24 982,
2771 11:04:00.862977 TX Bit4 (975~998) 24 986, Bit12 (971~995) 25 983,
2772 11:04:00.869908 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
2773 11:04:00.872839 TX Bit6 (977~1000) 24 988, Bit14 (971~993) 23 982,
2774 11:04:00.876061 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2775 11:04:00.876612
2776 11:04:00.879619 Write Rank0 MR14 =0x1e
2777 11:04:00.888465
2778 11:04:00.888978 CH=1, VrefRange= 0, VrefLevel = 30
2779 11:04:00.895412 TX Bit0 (977~1001) 25 989, Bit8 (969~992) 24 980,
2780 11:04:00.898637 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2781 11:04:00.905034 TX Bit2 (973~997) 25 985, Bit10 (970~993) 24 981,
2782 11:04:00.908472 TX Bit3 (971~994) 24 982, Bit11 (971~994) 24 982,
2783 11:04:00.911835 TX Bit4 (975~998) 24 986, Bit12 (971~995) 25 983,
2784 11:04:00.918537 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
2785 11:04:00.921879 TX Bit6 (977~1000) 24 988, Bit14 (971~993) 23 982,
2786 11:04:00.925445 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2787 11:04:00.925955
2788 11:04:00.928798 Write Rank0 MR14 =0x20
2789 11:04:00.937614
2790 11:04:00.941185 CH=1, VrefRange= 0, VrefLevel = 32
2791 11:04:00.944555 TX Bit0 (977~1001) 25 989, Bit8 (969~992) 24 980,
2792 11:04:00.947555 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2793 11:04:00.954317 TX Bit2 (973~997) 25 985, Bit10 (970~993) 24 981,
2794 11:04:00.957544 TX Bit3 (971~994) 24 982, Bit11 (971~994) 24 982,
2795 11:04:00.960642 TX Bit4 (975~998) 24 986, Bit12 (971~995) 25 983,
2796 11:04:00.967576 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
2797 11:04:00.970886 TX Bit6 (977~1000) 24 988, Bit14 (971~993) 23 982,
2798 11:04:00.973798 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2799 11:04:00.977425
2800 11:04:00.978100 Write Rank0 MR14 =0x22
2801 11:04:00.986498
2802 11:04:00.989945 CH=1, VrefRange= 0, VrefLevel = 34
2803 11:04:00.992961 TX Bit0 (977~1001) 25 989, Bit8 (969~992) 24 980,
2804 11:04:00.996427 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2805 11:04:01.003277 TX Bit2 (973~997) 25 985, Bit10 (970~993) 24 981,
2806 11:04:01.006634 TX Bit3 (971~994) 24 982, Bit11 (971~994) 24 982,
2807 11:04:01.010073 TX Bit4 (975~998) 24 986, Bit12 (971~995) 25 983,
2808 11:04:01.016977 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
2809 11:04:01.020161 TX Bit6 (977~1000) 24 988, Bit14 (971~993) 23 982,
2810 11:04:01.023511 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2811 11:04:01.024024
2812 11:04:01.026828
2813 11:04:01.027333 TX Vref found, early break! 356< 366
2814 11:04:01.033651 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2815 11:04:01.036725 u1DelayCellOfst[0]=9 cells (7 PI)
2816 11:04:01.040144 u1DelayCellOfst[1]=6 cells (5 PI)
2817 11:04:01.043934 u1DelayCellOfst[2]=3 cells (3 PI)
2818 11:04:01.046842 u1DelayCellOfst[3]=0 cells (0 PI)
2819 11:04:01.047276 u1DelayCellOfst[4]=5 cells (4 PI)
2820 11:04:01.049772 u1DelayCellOfst[5]=6 cells (5 PI)
2821 11:04:01.053669 u1DelayCellOfst[6]=7 cells (6 PI)
2822 11:04:01.057094 u1DelayCellOfst[7]=5 cells (4 PI)
2823 11:04:01.060138 Byte0, DQ PI dly=982, DQM PI dly= 985
2824 11:04:01.063521 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
2825 11:04:01.066440
2826 11:04:01.070214 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
2827 11:04:01.070730
2828 11:04:01.073089 u1DelayCellOfst[8]=0 cells (0 PI)
2829 11:04:01.076883 u1DelayCellOfst[9]=0 cells (0 PI)
2830 11:04:01.080218 u1DelayCellOfst[10]=1 cells (1 PI)
2831 11:04:01.080730 u1DelayCellOfst[11]=2 cells (2 PI)
2832 11:04:01.083964 u1DelayCellOfst[12]=3 cells (3 PI)
2833 11:04:01.086651 u1DelayCellOfst[13]=2 cells (2 PI)
2834 11:04:01.089992 u1DelayCellOfst[14]=2 cells (2 PI)
2835 11:04:01.093457 u1DelayCellOfst[15]=0 cells (0 PI)
2836 11:04:01.096820 Byte1, DQ PI dly=980, DQM PI dly= 981
2837 11:04:01.104061 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2838 11:04:01.104569
2839 11:04:01.107099 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2840 11:04:01.107614
2841 11:04:01.107947 Write Rank0 MR14 =0x1a
2842 11:04:01.110553
2843 11:04:01.111055 Final TX Range 0 Vref 26
2844 11:04:01.111392
2845 11:04:01.116848 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2846 11:04:01.117326
2847 11:04:01.123761 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2848 11:04:01.130300 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2849 11:04:01.137545 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2850 11:04:01.140692 Write Rank0 MR3 =0xb0
2851 11:04:01.141121 DramC Write-DBI on
2852 11:04:01.143564 ==
2853 11:04:01.147024 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2854 11:04:01.150416 fsp= 1, odt_onoff= 1, Byte mode= 0
2855 11:04:01.150850 ==
2856 11:04:01.154001 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2857 11:04:01.154508
2858 11:04:01.157329 Begin, DQ Scan Range 701~765
2859 11:04:01.157759
2860 11:04:01.158087
2861 11:04:01.160329 TX Vref Scan disable
2862 11:04:01.163845 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2863 11:04:01.167201 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2864 11:04:01.170588 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2865 11:04:01.173938 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2866 11:04:01.177409 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2867 11:04:01.180575 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2868 11:04:01.184151 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2869 11:04:01.187777 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2870 11:04:01.190836 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2871 11:04:01.194038 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2872 11:04:01.197326 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2873 11:04:01.201146 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2874 11:04:01.204121 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2875 11:04:01.207240 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2876 11:04:01.210855 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2877 11:04:01.214568 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2878 11:04:01.220908 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2879 11:04:01.224041 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2880 11:04:01.230905 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2881 11:04:01.233937 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2882 11:04:01.237884 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2883 11:04:01.241214 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2884 11:04:01.244611 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2885 11:04:01.247656 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2886 11:04:01.250851 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2887 11:04:01.254576 Byte0, DQ PI dly=730, DQM PI dly= 730
2888 11:04:01.258066 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2889 11:04:01.258572
2890 11:04:01.261099 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2891 11:04:01.264449
2892 11:04:01.267697 Byte1, DQ PI dly=724, DQM PI dly= 724
2893 11:04:01.271504 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2894 11:04:01.272011
2895 11:04:01.274823 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2896 11:04:01.275330
2897 11:04:01.280824 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2898 11:04:01.288153 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2899 11:04:01.294347 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2900 11:04:01.297539 Write Rank0 MR3 =0x30
2901 11:04:01.301142 DramC Write-DBI off
2902 11:04:01.301676
2903 11:04:01.302010 [DATLAT]
2904 11:04:01.304149 Freq=1600, CH1 RK0, use_rxtx_scan=0
2905 11:04:01.304576
2906 11:04:01.304906 DATLAT Default: 0xf
2907 11:04:01.307787 7, 0xFFFF, sum=0
2908 11:04:01.308298 8, 0xFFFF, sum=0
2909 11:04:01.310780 9, 0xFFFF, sum=0
2910 11:04:01.311214 10, 0xFFFF, sum=0
2911 11:04:01.314367 11, 0xFFFF, sum=0
2912 11:04:01.314878 12, 0xFFFF, sum=0
2913 11:04:01.317967 13, 0xFFFF, sum=0
2914 11:04:01.318645 14, 0x0, sum=1
2915 11:04:01.320841 15, 0x0, sum=2
2916 11:04:01.321306 16, 0x0, sum=3
2917 11:04:01.321649 17, 0x0, sum=4
2918 11:04:01.327766 pattern=2 first_step=14 total pass=5 best_step=16
2919 11:04:01.328274 ==
2920 11:04:01.331025 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2921 11:04:01.334075 fsp= 1, odt_onoff= 1, Byte mode= 0
2922 11:04:01.334310 ==
2923 11:04:01.340895 Start DQ dly to find pass range UseTestEngine =1
2924 11:04:01.344327 x-axis: bit #, y-axis: DQ dly (-127~63)
2925 11:04:01.344632 RX Vref Scan = 1
2926 11:04:01.460004
2927 11:04:01.460518 RX Vref found, early break!
2928 11:04:01.460854
2929 11:04:01.466714 Final RX Vref 12, apply to both rank0 and 1
2930 11:04:01.467228 ==
2931 11:04:01.469449 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2932 11:04:01.473330 fsp= 1, odt_onoff= 1, Byte mode= 0
2933 11:04:01.473854 ==
2934 11:04:01.474192 DQS Delay:
2935 11:04:01.476605 DQS0 = 0, DQS1 = 0
2936 11:04:01.477108 DQM Delay:
2937 11:04:01.479930 DQM0 = 20, DQM1 = 18
2938 11:04:01.480431 DQ Delay:
2939 11:04:01.483086 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =14
2940 11:04:01.486687 DQ4 =19, DQ5 =24, DQ6 =24, DQ7 =19
2941 11:04:01.489780 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
2942 11:04:01.493116 DQ12 =21, DQ13 =19, DQ14 =20, DQ15 =15
2943 11:04:01.493646
2944 11:04:01.493979
2945 11:04:01.494279
2946 11:04:01.496120 [DramC_TX_OE_Calibration] TA2
2947 11:04:01.499436 Original DQ_B0 (3 6) =30, OEN = 27
2948 11:04:01.503111 Original DQ_B1 (3 6) =30, OEN = 27
2949 11:04:01.506223 23, 0x0, End_B0=23 End_B1=23
2950 11:04:01.506660 24, 0x0, End_B0=24 End_B1=24
2951 11:04:01.509866 25, 0x0, End_B0=25 End_B1=25
2952 11:04:01.513344 26, 0x0, End_B0=26 End_B1=26
2953 11:04:01.516673 27, 0x0, End_B0=27 End_B1=27
2954 11:04:01.517186 28, 0x0, End_B0=28 End_B1=28
2955 11:04:01.519538 29, 0x0, End_B0=29 End_B1=29
2956 11:04:01.523294 30, 0x0, End_B0=30 End_B1=30
2957 11:04:01.526563 31, 0xFFFF, End_B0=30 End_B1=30
2958 11:04:01.533480 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2959 11:04:01.536573 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2960 11:04:01.537004
2961 11:04:01.537361
2962 11:04:01.539826 Write Rank0 MR23 =0x3f
2963 11:04:01.540327 [DQSOSC]
2964 11:04:01.546406 [DQSOSCAuto] RK0, (LSB)MR18= 0x9f, (MSB)MR19= 0x3, tDQSOscB0 = 339 ps tDQSOscB1 = 0 ps
2965 11:04:01.552954 CH1_RK0: MR19=0x3, MR18=0x9F, DQSOSC=339, MR23=63, INC=21, DEC=32
2966 11:04:01.556243 Write Rank0 MR23 =0x3f
2967 11:04:01.556672 [DQSOSC]
2968 11:04:01.563253 [DQSOSCAuto] RK0, (LSB)MR18= 0xa2, (MSB)MR19= 0x3, tDQSOscB0 = 338 ps tDQSOscB1 = 0 ps
2969 11:04:01.566463 CH1 RK0: MR19=3, MR18=A2
2970 11:04:01.569823 [RankSwap] Rank num 2, (Multi 1), Rank 1
2971 11:04:01.573320 Write Rank0 MR2 =0xad
2972 11:04:01.573853 [Write Leveling]
2973 11:04:01.576575 delay byte0 byte1 byte2 byte3
2974 11:04:01.577101
2975 11:04:01.577511 10 0 0
2976 11:04:01.579846 11 0 0
2977 11:04:01.580378 12 0 0
2978 11:04:01.583183 13 0 0
2979 11:04:01.583621 14 0 0
2980 11:04:01.586604 15 0 0
2981 11:04:01.587043 16 0 0
2982 11:04:01.587381 17 0 0
2983 11:04:01.589752 18 0 0
2984 11:04:01.590190 19 0 0
2985 11:04:01.593289 20 0 0
2986 11:04:01.593813 21 0 0
2987 11:04:01.594156 22 0 0
2988 11:04:01.596377 23 0 0
2989 11:04:01.596809 24 0 0
2990 11:04:01.599613 25 0 0
2991 11:04:01.600113 26 0 0
2992 11:04:01.600476 27 0 0
2993 11:04:01.603500 28 0 0
2994 11:04:01.604010 29 0 0
2995 11:04:01.606261 30 0 0
2996 11:04:01.606693 31 0 0
2997 11:04:01.610069 32 0 0
2998 11:04:01.610582 33 0 ff
2999 11:04:01.610923 34 0 ff
3000 11:04:01.613470 35 0 ff
3001 11:04:01.613905 36 ff ff
3002 11:04:01.616377 37 0 ff
3003 11:04:01.616884 38 0 ff
3004 11:04:01.619856 39 ff ff
3005 11:04:01.620307 40 ff ff
3006 11:04:01.623195 41 ff ff
3007 11:04:01.623631 42 ff ff
3008 11:04:01.626864 43 ff ff
3009 11:04:01.627375 44 ff ff
3010 11:04:01.627712 45 ff ff
3011 11:04:01.633309 pass bytecount = 0xff (0xff: all bytes pass)
3012 11:04:01.633822
3013 11:04:01.634153 DQS0 dly: 39
3014 11:04:01.634458 DQS1 dly: 33
3015 11:04:01.636916 Write Rank0 MR2 =0x2d
3016 11:04:01.640403 [RankSwap] Rank num 2, (Multi 1), Rank 0
3017 11:04:01.643340 Write Rank1 MR1 =0xd6
3018 11:04:01.643846 [Gating]
3019 11:04:01.644183 ==
3020 11:04:01.650155 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3021 11:04:01.650667 fsp= 1, odt_onoff= 1, Byte mode= 0
3022 11:04:01.653109 ==
3023 11:04:01.657061 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3024 11:04:01.660471 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
3025 11:04:01.663384 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
3026 11:04:01.670213 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
3027 11:04:01.673677 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
3028 11:04:01.676604 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
3029 11:04:01.683930 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3030 11:04:01.687156 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3031 11:04:01.690165 3 2 0 |403 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3032 11:04:01.696414 3 2 4 |3d3d c0c |(11 11)(11 11) |(1 1)(0 0)| 0
3033 11:04:01.699778 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3034 11:04:01.703397 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3035 11:04:01.706556 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3036 11:04:01.713642 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3037 11:04:01.716584 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3038 11:04:01.719769 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3039 11:04:01.727100 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3040 11:04:01.729895 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3041 11:04:01.733602 3 3 8 |504 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3042 11:04:01.736926 [Byte 0] Lead/lag Transition tap number (1)
3043 11:04:01.743636 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3044 11:04:01.746799 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3045 11:04:01.749996 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3046 11:04:01.757060 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3047 11:04:01.760562 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3048 11:04:01.763388 3 4 0 |201 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3049 11:04:01.770538 3 4 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3050 11:04:01.773213 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3051 11:04:01.776482 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3052 11:04:01.779883 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3053 11:04:01.786832 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3054 11:04:01.790437 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3055 11:04:01.793898 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3056 11:04:01.800148 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3057 11:04:01.803321 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3058 11:04:01.807053 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3059 11:04:01.813943 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3060 11:04:01.817362 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3061 11:04:01.820093 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3062 11:04:01.823627 [Byte 0] Lead/lag falling Transition (3, 5, 20)
3063 11:04:01.830440 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3064 11:04:01.833488 [Byte 1] Lead/lag falling Transition (3, 5, 24)
3065 11:04:01.836756 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
3066 11:04:01.843781 [Byte 0] Lead/lag Transition tap number (3)
3067 11:04:01.847082 3 6 0 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3068 11:04:01.849957 [Byte 1] Lead/lag Transition tap number (3)
3069 11:04:01.853358 3 6 4 |4646 202 |(10 10)(11 11) |(0 0)(0 0)| 0
3070 11:04:01.856893 3 6 8 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
3071 11:04:01.860187 [Byte 0]First pass (3, 6, 8)
3072 11:04:01.863812 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3073 11:04:01.867293 [Byte 1]First pass (3, 6, 12)
3074 11:04:01.870499 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3075 11:04:01.876831 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3076 11:04:01.880061 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3077 11:04:01.883720 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3078 11:04:01.886995 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3079 11:04:01.890392 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3080 11:04:01.897101 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3081 11:04:01.900381 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3082 11:04:01.904510 All bytes gating window > 1UI, Early break!
3083 11:04:01.904998
3084 11:04:01.907581 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
3085 11:04:01.907966
3086 11:04:01.910463 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
3087 11:04:01.910847
3088 11:04:01.911316
3089 11:04:01.911662
3090 11:04:01.917460 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
3091 11:04:01.917926
3092 11:04:01.921117 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
3093 11:04:01.921543
3094 11:04:01.921839
3095 11:04:01.922113 Write Rank1 MR1 =0x56
3096 11:04:01.924017
3097 11:04:01.924397 best RODT dly(2T, 0.5T) = (2, 2)
3098 11:04:01.924715
3099 11:04:01.927004 best RODT dly(2T, 0.5T) = (2, 2)
3100 11:04:01.927388 ==
3101 11:04:01.933897 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3102 11:04:01.937347 fsp= 1, odt_onoff= 1, Byte mode= 0
3103 11:04:01.937818 ==
3104 11:04:01.941108 Start DQ dly to find pass range UseTestEngine =0
3105 11:04:01.944036 x-axis: bit #, y-axis: DQ dly (-127~63)
3106 11:04:01.947144 RX Vref Scan = 0
3107 11:04:01.950447 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3108 11:04:01.954013 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3109 11:04:01.954402 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3110 11:04:01.957073 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3111 11:04:01.960883 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3112 11:04:01.963833 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3113 11:04:01.967637 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3114 11:04:01.970493 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3115 11:04:01.973973 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3116 11:04:01.977353 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3117 11:04:01.977831 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3118 11:04:01.980707 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3119 11:04:01.984291 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3120 11:04:01.987183 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3121 11:04:01.990544 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3122 11:04:01.993660 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3123 11:04:01.997334 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3124 11:04:02.000513 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3125 11:04:02.000901 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3126 11:04:02.003790 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3127 11:04:02.007461 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3128 11:04:02.010581 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3129 11:04:02.014115 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3130 11:04:02.017883 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3131 11:04:02.020685 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3132 11:04:02.021221 -1, [0] xxooxxxx xxxxxxxo [MSB]
3133 11:04:02.023973 0, [0] xxooxxxx xxoxxxxo [MSB]
3134 11:04:02.027122 1, [0] xxooxxxo oxoxxxxo [MSB]
3135 11:04:02.031091 2, [0] xxoooxxo oooxxxxo [MSB]
3136 11:04:02.034051 3, [0] xxoooxxo oooxxxxo [MSB]
3137 11:04:02.037192 4, [0] xxoooxxo ooooxxoo [MSB]
3138 11:04:02.037635 5, [0] xxoooxxo ooooxooo [MSB]
3139 11:04:02.040765 33, [0] oooxoooo oooooooo [MSB]
3140 11:04:02.043807 34, [0] oooxoooo ooooooox [MSB]
3141 11:04:02.047782 35, [0] ooxxoooo ooooooox [MSB]
3142 11:04:02.050581 36, [0] ooxxoooo oxooooox [MSB]
3143 11:04:02.054197 37, [0] ooxxoooo xxxxooox [MSB]
3144 11:04:02.054585 38, [0] ooxxoooo xxxxooox [MSB]
3145 11:04:02.057410 39, [0] ooxxxoox xxxxooxx [MSB]
3146 11:04:02.060381 40, [0] ooxxxoox xxxxoxxx [MSB]
3147 11:04:02.063949 41, [0] ooxxxoox xxxxxxxx [MSB]
3148 11:04:02.067061 42, [0] ooxxxxox xxxxxxxx [MSB]
3149 11:04:02.070911 43, [0] oxxxxxxx xxxxxxxx [MSB]
3150 11:04:02.074200 44, [0] xxxxxxxx xxxxxxxx [MSB]
3151 11:04:02.077601 iDelay=44, Bit 0, Center 24 (6 ~ 43) 38
3152 11:04:02.081183 iDelay=44, Bit 1, Center 24 (6 ~ 42) 37
3153 11:04:02.084377 iDelay=44, Bit 2, Center 16 (-1 ~ 34) 36
3154 11:04:02.087392 iDelay=44, Bit 3, Center 15 (-2 ~ 32) 35
3155 11:04:02.090887 iDelay=44, Bit 4, Center 20 (2 ~ 38) 37
3156 11:04:02.094478 iDelay=44, Bit 5, Center 23 (6 ~ 41) 36
3157 11:04:02.097818 iDelay=44, Bit 6, Center 24 (6 ~ 42) 37
3158 11:04:02.100998 iDelay=44, Bit 7, Center 19 (1 ~ 38) 38
3159 11:04:02.104603 iDelay=44, Bit 8, Center 18 (1 ~ 36) 36
3160 11:04:02.107806 iDelay=44, Bit 9, Center 18 (2 ~ 35) 34
3161 11:04:02.111222 iDelay=44, Bit 10, Center 18 (0 ~ 36) 37
3162 11:04:02.114584 iDelay=44, Bit 11, Center 20 (4 ~ 36) 33
3163 11:04:02.117914 iDelay=44, Bit 12, Center 23 (6 ~ 40) 35
3164 11:04:02.124346 iDelay=44, Bit 13, Center 22 (5 ~ 39) 35
3165 11:04:02.127271 iDelay=44, Bit 14, Center 21 (4 ~ 38) 35
3166 11:04:02.130591 iDelay=44, Bit 15, Center 15 (-2 ~ 33) 36
3167 11:04:02.131015 ==
3168 11:04:02.134214 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3169 11:04:02.137681 fsp= 1, odt_onoff= 1, Byte mode= 0
3170 11:04:02.138239 ==
3171 11:04:02.141309 DQS Delay:
3172 11:04:02.141806 DQS0 = 0, DQS1 = 0
3173 11:04:02.142134 DQM Delay:
3174 11:04:02.144345 DQM0 = 20, DQM1 = 19
3175 11:04:02.144841 DQ Delay:
3176 11:04:02.148086 DQ0 =24, DQ1 =24, DQ2 =16, DQ3 =15
3177 11:04:02.150953 DQ4 =20, DQ5 =23, DQ6 =24, DQ7 =19
3178 11:04:02.154273 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =20
3179 11:04:02.157838 DQ12 =23, DQ13 =22, DQ14 =21, DQ15 =15
3180 11:04:02.158335
3181 11:04:02.158657
3182 11:04:02.161153 DramC Write-DBI off
3183 11:04:02.161736 ==
3184 11:04:02.164178 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3185 11:04:02.167616 fsp= 1, odt_onoff= 1, Byte mode= 0
3186 11:04:02.168111 ==
3187 11:04:02.174360 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3188 11:04:02.174886
3189 11:04:02.177514 Begin, DQ Scan Range 929~1185
3190 11:04:02.177962
3191 11:04:02.178287
3192 11:04:02.178640 TX Vref Scan disable
3193 11:04:02.181111 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3194 11:04:02.184478 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3195 11:04:02.187655 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3196 11:04:02.191088 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3197 11:04:02.197972 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3198 11:04:02.200974 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3199 11:04:02.204693 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3200 11:04:02.208158 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3201 11:04:02.211241 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3202 11:04:02.214638 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3203 11:04:02.218174 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3204 11:04:02.221113 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3205 11:04:02.224223 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3206 11:04:02.227751 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3207 11:04:02.231496 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3208 11:04:02.234675 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3209 11:04:02.237921 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3210 11:04:02.241296 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3211 11:04:02.244637 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3212 11:04:02.247990 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3213 11:04:02.251385 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3214 11:04:02.254747 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3215 11:04:02.261845 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3216 11:04:02.264590 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3217 11:04:02.268069 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3218 11:04:02.271395 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3219 11:04:02.275207 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3220 11:04:02.278079 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3221 11:04:02.281893 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3222 11:04:02.285104 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3223 11:04:02.288211 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3224 11:04:02.291631 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3225 11:04:02.294666 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3226 11:04:02.297900 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3227 11:04:02.301579 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3228 11:04:02.305493 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3229 11:04:02.308588 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3230 11:04:02.311324 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3231 11:04:02.314858 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3232 11:04:02.318201 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3233 11:04:02.321678 969 |3 6 9|[0] xxxxxxxx xxxxxxxo [MSB]
3234 11:04:02.324537 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
3235 11:04:02.328513 971 |3 6 11|[0] xxxxxxxx oooxxxoo [MSB]
3236 11:04:02.331871 972 |3 6 12|[0] xxxxxxxx ooooxooo [MSB]
3237 11:04:02.338310 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3238 11:04:02.341747 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3239 11:04:02.345167 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3240 11:04:02.348248 976 |3 6 16|[0] xxoooxxx oooooooo [MSB]
3241 11:04:02.351624 977 |3 6 17|[0] xxoooxxx oooooooo [MSB]
3242 11:04:02.355001 978 |3 6 18|[0] xooooxxo oooooooo [MSB]
3243 11:04:02.358872 979 |3 6 19|[0] xoooooxo oooooooo [MSB]
3244 11:04:02.361781 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3245 11:04:02.368673 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3246 11:04:02.371659 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3247 11:04:02.375203 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3248 11:04:02.378135 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3249 11:04:02.381709 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3250 11:04:02.384823 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3251 11:04:02.388543 999 |3 6 39|[0] ooxxxooo xxxxxxxx [MSB]
3252 11:04:02.391729 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
3253 11:04:02.395132 Byte0, DQ PI dly=987, DQM PI dly= 987
3254 11:04:02.398164 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
3255 11:04:02.398596
3256 11:04:02.404753 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
3257 11:04:02.405355
3258 11:04:02.408211 Byte1, DQ PI dly=981, DQM PI dly= 981
3259 11:04:02.411828 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
3260 11:04:02.412341
3261 11:04:02.415392 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
3262 11:04:02.415903
3263 11:04:02.416252 ==
3264 11:04:02.421644 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3265 11:04:02.424967 fsp= 1, odt_onoff= 1, Byte mode= 0
3266 11:04:02.425431 ==
3267 11:04:02.428673 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3268 11:04:02.429192
3269 11:04:02.431904 Begin, DQ Scan Range 957~1021
3270 11:04:02.434716 Write Rank1 MR14 =0x0
3271 11:04:02.442499
3272 11:04:02.443004 CH=1, VrefRange= 0, VrefLevel = 0
3273 11:04:02.449420 TX Bit0 (982~999) 18 990, Bit8 (972~990) 19 981,
3274 11:04:02.452351 TX Bit1 (981~998) 18 989, Bit9 (973~989) 17 981,
3275 11:04:02.460133 TX Bit2 (977~994) 18 985, Bit10 (974~988) 15 981,
3276 11:04:02.462868 TX Bit3 (976~992) 17 984, Bit11 (975~991) 17 983,
3277 11:04:02.466064 TX Bit4 (979~996) 18 987, Bit12 (976~992) 17 984,
3278 11:04:02.472873 TX Bit5 (982~999) 18 990, Bit13 (976~990) 15 983,
3279 11:04:02.476590 TX Bit6 (982~1000) 19 991, Bit14 (975~990) 16 982,
3280 11:04:02.479572 TX Bit7 (981~997) 17 989, Bit15 (970~987) 18 978,
3281 11:04:02.480105
3282 11:04:02.482826 Write Rank1 MR14 =0x2
3283 11:04:02.491600
3284 11:04:02.492202 CH=1, VrefRange= 0, VrefLevel = 2
3285 11:04:02.498047 TX Bit0 (982~1000) 19 991, Bit8 (972~991) 20 981,
3286 11:04:02.501388 TX Bit1 (980~999) 20 989, Bit9 (972~989) 18 980,
3287 11:04:02.508197 TX Bit2 (977~995) 19 986, Bit10 (974~988) 15 981,
3288 11:04:02.511342 TX Bit3 (976~993) 18 984, Bit11 (975~992) 18 983,
3289 11:04:02.514837 TX Bit4 (978~997) 20 987, Bit12 (976~992) 17 984,
3290 11:04:02.521674 TX Bit5 (982~1000) 19 991, Bit13 (975~990) 16 982,
3291 11:04:02.525022 TX Bit6 (982~1000) 19 991, Bit14 (974~991) 18 982,
3292 11:04:02.528252 TX Bit7 (980~997) 18 988, Bit15 (970~988) 19 979,
3293 11:04:02.531645
3294 11:04:02.532168 Write Rank1 MR14 =0x4
3295 11:04:02.540770
3296 11:04:02.541349 CH=1, VrefRange= 0, VrefLevel = 4
3297 11:04:02.547362 TX Bit0 (982~1000) 19 991, Bit8 (971~991) 21 981,
3298 11:04:02.551154 TX Bit1 (980~999) 20 989, Bit9 (971~990) 20 980,
3299 11:04:02.557196 TX Bit2 (977~995) 19 986, Bit10 (973~990) 18 981,
3300 11:04:02.560776 TX Bit3 (976~993) 18 984, Bit11 (974~992) 19 983,
3301 11:04:02.564288 TX Bit4 (978~997) 20 987, Bit12 (976~992) 17 984,
3302 11:04:02.570772 TX Bit5 (982~1000) 19 991, Bit13 (975~991) 17 983,
3303 11:04:02.573920 TX Bit6 (981~1000) 20 990, Bit14 (974~991) 18 982,
3304 11:04:02.577378 TX Bit7 (980~998) 19 989, Bit15 (969~988) 20 978,
3305 11:04:02.577821
3306 11:04:02.580821 Write Rank1 MR14 =0x6
3307 11:04:02.589797
3308 11:04:02.590354 CH=1, VrefRange= 0, VrefLevel = 6
3309 11:04:02.596755 TX Bit0 (981~1000) 20 990, Bit8 (971~991) 21 981,
3310 11:04:02.600178 TX Bit1 (979~999) 21 989, Bit9 (971~991) 21 981,
3311 11:04:02.606674 TX Bit2 (977~996) 20 986, Bit10 (973~990) 18 981,
3312 11:04:02.610104 TX Bit3 (976~994) 19 985, Bit11 (974~992) 19 983,
3313 11:04:02.613290 TX Bit4 (978~997) 20 987, Bit12 (975~992) 18 983,
3314 11:04:02.619985 TX Bit5 (981~1000) 20 990, Bit13 (975~991) 17 983,
3315 11:04:02.623654 TX Bit6 (981~1001) 21 991, Bit14 (973~991) 19 982,
3316 11:04:02.626947 TX Bit7 (980~998) 19 989, Bit15 (969~989) 21 979,
3317 11:04:02.627376
3318 11:04:02.629833 Write Rank1 MR14 =0x8
3319 11:04:02.639359
3320 11:04:02.639880 CH=1, VrefRange= 0, VrefLevel = 8
3321 11:04:02.645941 TX Bit0 (981~1001) 21 991, Bit8 (971~992) 22 981,
3322 11:04:02.649327 TX Bit1 (979~999) 21 989, Bit9 (971~991) 21 981,
3323 11:04:02.655741 TX Bit2 (976~997) 22 986, Bit10 (972~990) 19 981,
3324 11:04:02.659315 TX Bit3 (976~995) 20 985, Bit11 (974~992) 19 983,
3325 11:04:02.662473 TX Bit4 (977~998) 22 987, Bit12 (975~992) 18 983,
3326 11:04:02.669388 TX Bit5 (981~1000) 20 990, Bit13 (973~991) 19 982,
3327 11:04:02.672329 TX Bit6 (981~1001) 21 991, Bit14 (973~992) 20 982,
3328 11:04:02.675676 TX Bit7 (978~998) 21 988, Bit15 (969~990) 22 979,
3329 11:04:02.676104
3330 11:04:02.679134 Write Rank1 MR14 =0xa
3331 11:04:02.688538
3332 11:04:02.691612 CH=1, VrefRange= 0, VrefLevel = 10
3333 11:04:02.694677 TX Bit0 (981~1001) 21 991, Bit8 (970~992) 23 981,
3334 11:04:02.698595 TX Bit1 (978~999) 22 988, Bit9 (971~991) 21 981,
3335 11:04:02.704873 TX Bit2 (976~997) 22 986, Bit10 (972~991) 20 981,
3336 11:04:02.708254 TX Bit3 (975~996) 22 985, Bit11 (973~992) 20 982,
3337 11:04:02.711652 TX Bit4 (977~998) 22 987, Bit12 (975~993) 19 984,
3338 11:04:02.718593 TX Bit5 (981~1000) 20 990, Bit13 (973~992) 20 982,
3339 11:04:02.722134 TX Bit6 (980~1001) 22 990, Bit14 (973~992) 20 982,
3340 11:04:02.725032 TX Bit7 (979~998) 20 988, Bit15 (969~990) 22 979,
3341 11:04:02.725526
3342 11:04:02.728758 Write Rank1 MR14 =0xc
3343 11:04:02.737923
3344 11:04:02.741335 CH=1, VrefRange= 0, VrefLevel = 12
3345 11:04:02.744380 TX Bit0 (981~1002) 22 991, Bit8 (970~992) 23 981,
3346 11:04:02.747748 TX Bit1 (979~1000) 22 989, Bit9 (970~991) 22 980,
3347 11:04:02.754382 TX Bit2 (976~998) 23 987, Bit10 (971~991) 21 981,
3348 11:04:02.758121 TX Bit3 (975~997) 23 986, Bit11 (972~993) 22 982,
3349 11:04:02.761165 TX Bit4 (977~998) 22 987, Bit12 (974~993) 20 983,
3350 11:04:02.767986 TX Bit5 (980~1001) 22 990, Bit13 (973~992) 20 982,
3351 11:04:02.771512 TX Bit6 (980~1002) 23 991, Bit14 (972~992) 21 982,
3352 11:04:02.774600 TX Bit7 (978~998) 21 988, Bit15 (969~991) 23 980,
3353 11:04:02.777823
3354 11:04:02.778296 Write Rank1 MR14 =0xe
3355 11:04:02.787353
3356 11:04:02.790654 CH=1, VrefRange= 0, VrefLevel = 14
3357 11:04:02.793963 TX Bit0 (980~1002) 23 991, Bit8 (970~992) 23 981,
3358 11:04:02.797452 TX Bit1 (978~1000) 23 989, Bit9 (970~992) 23 981,
3359 11:04:02.804336 TX Bit2 (976~998) 23 987, Bit10 (971~992) 22 981,
3360 11:04:02.807497 TX Bit3 (975~997) 23 986, Bit11 (972~993) 22 982,
3361 11:04:02.810590 TX Bit4 (977~998) 22 987, Bit12 (973~993) 21 983,
3362 11:04:02.817763 TX Bit5 (979~1001) 23 990, Bit13 (973~992) 20 982,
3363 11:04:02.820897 TX Bit6 (980~1002) 23 991, Bit14 (972~992) 21 982,
3364 11:04:02.824405 TX Bit7 (978~999) 22 988, Bit15 (969~991) 23 980,
3365 11:04:02.827284
3366 11:04:02.827707 Write Rank1 MR14 =0x10
3367 11:04:02.836966
3368 11:04:02.840479 CH=1, VrefRange= 0, VrefLevel = 16
3369 11:04:02.843712 TX Bit0 (980~1003) 24 991, Bit8 (970~992) 23 981,
3370 11:04:02.846980 TX Bit1 (977~1000) 24 988, Bit9 (970~992) 23 981,
3371 11:04:02.853827 TX Bit2 (975~998) 24 986, Bit10 (971~992) 22 981,
3372 11:04:02.857037 TX Bit3 (975~997) 23 986, Bit11 (972~993) 22 982,
3373 11:04:02.861125 TX Bit4 (976~998) 23 987, Bit12 (973~993) 21 983,
3374 11:04:02.867222 TX Bit5 (979~1001) 23 990, Bit13 (972~992) 21 982,
3375 11:04:02.870599 TX Bit6 (979~1002) 24 990, Bit14 (971~992) 22 981,
3376 11:04:02.873920 TX Bit7 (977~999) 23 988, Bit15 (969~991) 23 980,
3377 11:04:02.877277
3378 11:04:02.877798 Write Rank1 MR14 =0x12
3379 11:04:02.887032
3380 11:04:02.890385 CH=1, VrefRange= 0, VrefLevel = 18
3381 11:04:02.893480 TX Bit0 (980~1003) 24 991, Bit8 (970~992) 23 981,
3382 11:04:02.896987 TX Bit1 (978~1000) 23 989, Bit9 (970~992) 23 981,
3383 11:04:02.903749 TX Bit2 (975~998) 24 986, Bit10 (970~992) 23 981,
3384 11:04:02.906757 TX Bit3 (975~998) 24 986, Bit11 (972~994) 23 983,
3385 11:04:02.910267 TX Bit4 (976~999) 24 987, Bit12 (973~994) 22 983,
3386 11:04:02.917148 TX Bit5 (979~1002) 24 990, Bit13 (971~992) 22 981,
3387 11:04:02.920812 TX Bit6 (979~1003) 25 991, Bit14 (971~992) 22 981,
3388 11:04:02.923787 TX Bit7 (977~999) 23 988, Bit15 (968~992) 25 980,
3389 11:04:02.926856
3390 11:04:02.927284 Write Rank1 MR14 =0x14
3391 11:04:02.936763
3392 11:04:02.940158 CH=1, VrefRange= 0, VrefLevel = 20
3393 11:04:02.943215 TX Bit0 (979~1004) 26 991, Bit8 (970~992) 23 981,
3394 11:04:02.947165 TX Bit1 (977~1001) 25 989, Bit9 (970~992) 23 981,
3395 11:04:02.953299 TX Bit2 (975~998) 24 986, Bit10 (971~992) 22 981,
3396 11:04:02.956590 TX Bit3 (975~998) 24 986, Bit11 (971~994) 24 982,
3397 11:04:02.960231 TX Bit4 (976~999) 24 987, Bit12 (973~994) 22 983,
3398 11:04:02.966548 TX Bit5 (978~1002) 25 990, Bit13 (971~993) 23 982,
3399 11:04:02.969964 TX Bit6 (979~1003) 25 991, Bit14 (971~993) 23 982,
3400 11:04:02.973552 TX Bit7 (977~999) 23 988, Bit15 (968~992) 25 980,
3401 11:04:02.976586
3402 11:04:02.976968 Write Rank1 MR14 =0x16
3403 11:04:02.986843
3404 11:04:02.990351 CH=1, VrefRange= 0, VrefLevel = 22
3405 11:04:02.993178 TX Bit0 (978~1004) 27 991, Bit8 (970~993) 24 981,
3406 11:04:02.996683 TX Bit1 (977~1001) 25 989, Bit9 (970~992) 23 981,
3407 11:04:03.003322 TX Bit2 (975~999) 25 987, Bit10 (970~993) 24 981,
3408 11:04:03.006526 TX Bit3 (974~998) 25 986, Bit11 (971~994) 24 982,
3409 11:04:03.010172 TX Bit4 (976~999) 24 987, Bit12 (972~994) 23 983,
3410 11:04:03.017527 TX Bit5 (978~1003) 26 990, Bit13 (971~993) 23 982,
3411 11:04:03.019982 TX Bit6 (978~1004) 27 991, Bit14 (971~993) 23 982,
3412 11:04:03.026585 TX Bit7 (977~1000) 24 988, Bit15 (968~992) 25 980,
3413 11:04:03.027047
3414 11:04:03.030194 wait MRW command Rank1 MR14 =0x18 fired (1)
3415 11:04:03.030624 Write Rank1 MR14 =0x18
3416 11:04:03.040640
3417 11:04:03.043913 CH=1, VrefRange= 0, VrefLevel = 24
3418 11:04:03.047284 TX Bit0 (978~1005) 28 991, Bit8 (969~993) 25 981,
3419 11:04:03.050662 TX Bit1 (977~1001) 25 989, Bit9 (970~992) 23 981,
3420 11:04:03.057330 TX Bit2 (975~999) 25 987, Bit10 (970~993) 24 981,
3421 11:04:03.060643 TX Bit3 (974~998) 25 986, Bit11 (971~995) 25 983,
3422 11:04:03.064045 TX Bit4 (976~1000) 25 988, Bit12 (972~995) 24 983,
3423 11:04:03.071233 TX Bit5 (978~1003) 26 990, Bit13 (971~993) 23 982,
3424 11:04:03.073872 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
3425 11:04:03.080307 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
3426 11:04:03.080699
3427 11:04:03.080995 Write Rank1 MR14 =0x1a
3428 11:04:03.090836
3429 11:04:03.094533 CH=1, VrefRange= 0, VrefLevel = 26
3430 11:04:03.097331 TX Bit0 (978~1005) 28 991, Bit8 (969~993) 25 981,
3431 11:04:03.100860 TX Bit1 (977~1001) 25 989, Bit9 (970~992) 23 981,
3432 11:04:03.107384 TX Bit2 (975~999) 25 987, Bit10 (970~993) 24 981,
3433 11:04:03.110667 TX Bit3 (974~998) 25 986, Bit11 (971~995) 25 983,
3434 11:04:03.114039 TX Bit4 (976~1000) 25 988, Bit12 (972~995) 24 983,
3435 11:04:03.120426 TX Bit5 (978~1003) 26 990, Bit13 (971~993) 23 982,
3436 11:04:03.123989 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
3437 11:04:03.131025 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
3438 11:04:03.131461
3439 11:04:03.131797 Write Rank1 MR14 =0x1c
3440 11:04:03.140947
3441 11:04:03.144095 CH=1, VrefRange= 0, VrefLevel = 28
3442 11:04:03.147984 TX Bit0 (978~1005) 28 991, Bit8 (969~993) 25 981,
3443 11:04:03.151207 TX Bit1 (977~1001) 25 989, Bit9 (970~992) 23 981,
3444 11:04:03.157737 TX Bit2 (975~999) 25 987, Bit10 (970~993) 24 981,
3445 11:04:03.161052 TX Bit3 (974~998) 25 986, Bit11 (971~995) 25 983,
3446 11:04:03.164329 TX Bit4 (976~1000) 25 988, Bit12 (972~995) 24 983,
3447 11:04:03.171232 TX Bit5 (978~1003) 26 990, Bit13 (971~993) 23 982,
3448 11:04:03.174903 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
3449 11:04:03.177981 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
3450 11:04:03.181033
3451 11:04:03.181528 Write Rank1 MR14 =0x1e
3452 11:04:03.191251
3453 11:04:03.194323 CH=1, VrefRange= 0, VrefLevel = 30
3454 11:04:03.197744 TX Bit0 (978~1005) 28 991, Bit8 (969~993) 25 981,
3455 11:04:03.201014 TX Bit1 (977~1001) 25 989, Bit9 (970~992) 23 981,
3456 11:04:03.207739 TX Bit2 (975~999) 25 987, Bit10 (970~993) 24 981,
3457 11:04:03.211329 TX Bit3 (974~998) 25 986, Bit11 (971~995) 25 983,
3458 11:04:03.214678 TX Bit4 (976~1000) 25 988, Bit12 (972~995) 24 983,
3459 11:04:03.221097 TX Bit5 (978~1003) 26 990, Bit13 (971~993) 23 982,
3460 11:04:03.224346 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
3461 11:04:03.231177 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
3462 11:04:03.231698
3463 11:04:03.232034 Write Rank1 MR14 =0x20
3464 11:04:03.241146
3465 11:04:03.244829 CH=1, VrefRange= 0, VrefLevel = 32
3466 11:04:03.247550 TX Bit0 (978~1005) 28 991, Bit8 (969~993) 25 981,
3467 11:04:03.250878 TX Bit1 (977~1001) 25 989, Bit9 (970~992) 23 981,
3468 11:04:03.257903 TX Bit2 (975~999) 25 987, Bit10 (970~993) 24 981,
3469 11:04:03.261456 TX Bit3 (974~998) 25 986, Bit11 (971~995) 25 983,
3470 11:04:03.264639 TX Bit4 (976~1000) 25 988, Bit12 (972~995) 24 983,
3471 11:04:03.271111 TX Bit5 (978~1003) 26 990, Bit13 (971~993) 23 982,
3472 11:04:03.274776 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
3473 11:04:03.278197 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
3474 11:04:03.281542
3475 11:04:03.282054
3476 11:04:03.284473 TX Vref found, early break! 374< 379
3477 11:04:03.288113 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
3478 11:04:03.291452 u1DelayCellOfst[0]=6 cells (5 PI)
3479 11:04:03.295140 u1DelayCellOfst[1]=3 cells (3 PI)
3480 11:04:03.298582 u1DelayCellOfst[2]=1 cells (1 PI)
3481 11:04:03.301424 u1DelayCellOfst[3]=0 cells (0 PI)
3482 11:04:03.301863 u1DelayCellOfst[4]=2 cells (2 PI)
3483 11:04:03.304919 u1DelayCellOfst[5]=5 cells (4 PI)
3484 11:04:03.308143 u1DelayCellOfst[6]=6 cells (5 PI)
3485 11:04:03.311701 u1DelayCellOfst[7]=2 cells (2 PI)
3486 11:04:03.315073 Byte0, DQ PI dly=986, DQM PI dly= 988
3487 11:04:03.321971 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3488 11:04:03.322476
3489 11:04:03.324826 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3490 11:04:03.325371
3491 11:04:03.328278 u1DelayCellOfst[8]=1 cells (1 PI)
3492 11:04:03.331929 u1DelayCellOfst[9]=1 cells (1 PI)
3493 11:04:03.335060 u1DelayCellOfst[10]=1 cells (1 PI)
3494 11:04:03.338056 u1DelayCellOfst[11]=3 cells (3 PI)
3495 11:04:03.338486 u1DelayCellOfst[12]=3 cells (3 PI)
3496 11:04:03.341688 u1DelayCellOfst[13]=2 cells (2 PI)
3497 11:04:03.344866 u1DelayCellOfst[14]=1 cells (1 PI)
3498 11:04:03.348326 u1DelayCellOfst[15]=0 cells (0 PI)
3499 11:04:03.351539 Byte1, DQ PI dly=980, DQM PI dly= 981
3500 11:04:03.358266 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
3501 11:04:03.358715
3502 11:04:03.362023 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
3503 11:04:03.362548
3504 11:04:03.365410 Write Rank1 MR14 =0x18
3505 11:04:03.365929
3506 11:04:03.366369 Final TX Range 0 Vref 24
3507 11:04:03.366795
3508 11:04:03.371659 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3509 11:04:03.372094
3510 11:04:03.378632 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3511 11:04:03.384964 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3512 11:04:03.392123 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3513 11:04:03.395273 Write Rank1 MR3 =0xb0
3514 11:04:03.398461 DramC Write-DBI on
3515 11:04:03.398964 ==
3516 11:04:03.401550 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3517 11:04:03.405402 fsp= 1, odt_onoff= 1, Byte mode= 0
3518 11:04:03.405912 ==
3519 11:04:03.408698 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3520 11:04:03.409206
3521 11:04:03.411772 Begin, DQ Scan Range 701~765
3522 11:04:03.412195
3523 11:04:03.412528
3524 11:04:03.415457 TX Vref Scan disable
3525 11:04:03.418749 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3526 11:04:03.422214 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3527 11:04:03.425612 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3528 11:04:03.428792 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3529 11:04:03.432627 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3530 11:04:03.435397 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3531 11:04:03.438908 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3532 11:04:03.442349 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3533 11:04:03.445302 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3534 11:04:03.448840 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3535 11:04:03.452513 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3536 11:04:03.455117 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3537 11:04:03.458666 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3538 11:04:03.461843 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3539 11:04:03.468900 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3540 11:04:03.471651 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3541 11:04:03.475393 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3542 11:04:03.478742 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3543 11:04:03.481857 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3544 11:04:03.488910 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3545 11:04:03.492275 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3546 11:04:03.495795 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3547 11:04:03.498617 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3548 11:04:03.502474 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3549 11:04:03.505602 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3550 11:04:03.509059 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3551 11:04:03.512209 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3552 11:04:03.516260 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3553 11:04:03.518965 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
3554 11:04:03.521919 Byte0, DQ PI dly=732, DQM PI dly= 732
3555 11:04:03.525686 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
3556 11:04:03.526200
3557 11:04:03.532504 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
3558 11:04:03.533161
3559 11:04:03.535902 Byte1, DQ PI dly=724, DQM PI dly= 724
3560 11:04:03.538985 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
3561 11:04:03.539420
3562 11:04:03.542752 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
3563 11:04:03.543301
3564 11:04:03.549262 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3565 11:04:03.555527 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3566 11:04:03.566325 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3567 11:04:03.566838 Write Rank1 MR3 =0x30
3568 11:04:03.569274 DramC Write-DBI off
3569 11:04:03.569779
3570 11:04:03.570111 [DATLAT]
3571 11:04:03.573219 Freq=1600, CH1 RK1, use_rxtx_scan=0
3572 11:04:03.573800
3573 11:04:03.576194 DATLAT Default: 0x10
3574 11:04:03.576697 7, 0xFFFF, sum=0
3575 11:04:03.579222 8, 0xFFFF, sum=0
3576 11:04:03.579658 9, 0xFFFF, sum=0
3577 11:04:03.579998 10, 0xFFFF, sum=0
3578 11:04:03.582863 11, 0xFFFF, sum=0
3579 11:04:03.583317 12, 0xFFFF, sum=0
3580 11:04:03.585909 13, 0xFFFF, sum=0
3581 11:04:03.586347 14, 0x0, sum=1
3582 11:04:03.589160 15, 0x0, sum=2
3583 11:04:03.589756 16, 0x0, sum=3
3584 11:04:03.592315 17, 0x0, sum=4
3585 11:04:03.596021 pattern=2 first_step=14 total pass=5 best_step=16
3586 11:04:03.596525 ==
3587 11:04:03.599183 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3588 11:04:03.602644 fsp= 1, odt_onoff= 1, Byte mode= 0
3589 11:04:03.606112 ==
3590 11:04:03.609564 Start DQ dly to find pass range UseTestEngine =1
3591 11:04:03.612690 x-axis: bit #, y-axis: DQ dly (-127~63)
3592 11:04:03.613186 RX Vref Scan = 0
3593 11:04:03.616183 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3594 11:04:03.619292 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3595 11:04:03.623003 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3596 11:04:03.625914 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3597 11:04:03.629510 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3598 11:04:03.632910 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3599 11:04:03.633465 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3600 11:04:03.636090 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3601 11:04:03.639106 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3602 11:04:03.642550 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3603 11:04:03.646156 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3604 11:04:03.649474 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3605 11:04:03.652935 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3606 11:04:03.656162 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3607 11:04:03.656685 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3608 11:04:03.659889 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3609 11:04:03.663073 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3610 11:04:03.665910 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3611 11:04:03.669846 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3612 11:04:03.673086 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3613 11:04:03.676730 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3614 11:04:03.677298 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3615 11:04:03.679311 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3616 11:04:03.682676 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3617 11:04:03.686454 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3618 11:04:03.689657 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3619 11:04:03.692847 0, [0] xxooxxxx xxxxxxxo [MSB]
3620 11:04:03.693391 1, [0] xxooxxxx oooxxxxo [MSB]
3621 11:04:03.696639 2, [0] xxooxxxx oooxxxxo [MSB]
3622 11:04:03.699764 3, [0] xxoooxxo ooooxxxo [MSB]
3623 11:04:03.702991 4, [0] xxoooxxo ooooxooo [MSB]
3624 11:04:03.706576 5, [0] xxoooxxo oooooooo [MSB]
3625 11:04:03.709582 6, [0] xooooxxo oooooooo [MSB]
3626 11:04:03.710018 7, [0] ooooooxo oooooooo [MSB]
3627 11:04:03.715230 33, [0] oooxoooo ooooooox [MSB]
3628 11:04:03.717948 34, [0] oooxoooo ooooooox [MSB]
3629 11:04:03.721695 35, [0] ooxxoooo ooooooox [MSB]
3630 11:04:03.724955 36, [0] ooxxoooo ooooooox [MSB]
3631 11:04:03.728470 37, [0] ooxxoooo xxxxooox [MSB]
3632 11:04:03.731939 38, [0] ooxxxooo xxxxooxx [MSB]
3633 11:04:03.732373 39, [0] ooxxxoox xxxxoxxx [MSB]
3634 11:04:03.735025 40, [0] ooxxxoox xxxxxxxx [MSB]
3635 11:04:03.738327 41, [0] ooxxxxox xxxxxxxx [MSB]
3636 11:04:03.741591 42, [0] oxxxxxox xxxxxxxx [MSB]
3637 11:04:03.744946 43, [0] xxxxxxxx xxxxxxxx [MSB]
3638 11:04:03.748498 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3639 11:04:03.751873 iDelay=43, Bit 1, Center 23 (6 ~ 41) 36
3640 11:04:03.755019 iDelay=43, Bit 2, Center 17 (0 ~ 34) 35
3641 11:04:03.758339 iDelay=43, Bit 3, Center 15 (-2 ~ 32) 35
3642 11:04:03.761528 iDelay=43, Bit 4, Center 20 (3 ~ 37) 35
3643 11:04:03.764987 iDelay=43, Bit 5, Center 23 (7 ~ 40) 34
3644 11:04:03.768352 iDelay=43, Bit 6, Center 25 (8 ~ 42) 35
3645 11:04:03.771878 iDelay=43, Bit 7, Center 20 (3 ~ 38) 36
3646 11:04:03.774853 iDelay=43, Bit 8, Center 18 (1 ~ 36) 36
3647 11:04:03.778401 iDelay=43, Bit 9, Center 18 (1 ~ 36) 36
3648 11:04:03.785038 iDelay=43, Bit 10, Center 18 (1 ~ 36) 36
3649 11:04:03.788050 iDelay=43, Bit 11, Center 19 (3 ~ 36) 34
3650 11:04:03.791986 iDelay=43, Bit 12, Center 22 (5 ~ 39) 35
3651 11:04:03.795397 iDelay=43, Bit 13, Center 21 (4 ~ 38) 35
3652 11:04:03.798508 iDelay=43, Bit 14, Center 20 (4 ~ 37) 34
3653 11:04:03.801658 iDelay=43, Bit 15, Center 15 (-2 ~ 32) 35
3654 11:04:03.802085 ==
3655 11:04:03.808357 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3656 11:04:03.808847 fsp= 1, odt_onoff= 1, Byte mode= 0
3657 11:04:03.811810 ==
3658 11:04:03.812310 DQS Delay:
3659 11:04:03.812713 DQS0 = 0, DQS1 = 0
3660 11:04:03.814908 DQM Delay:
3661 11:04:03.815414 DQM0 = 20, DQM1 = 18
3662 11:04:03.818204 DQ Delay:
3663 11:04:03.821454 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
3664 11:04:03.821882 DQ4 =20, DQ5 =23, DQ6 =25, DQ7 =20
3665 11:04:03.825358 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
3666 11:04:03.828256 DQ12 =22, DQ13 =21, DQ14 =20, DQ15 =15
3667 11:04:03.828487
3668 11:04:03.831355
3669 11:04:03.831598
3670 11:04:03.831735 [DramC_TX_OE_Calibration] TA2
3671 11:04:03.834864 Original DQ_B0 (3 6) =30, OEN = 27
3672 11:04:03.838445 Original DQ_B1 (3 6) =30, OEN = 27
3673 11:04:03.841444 23, 0x0, End_B0=23 End_B1=23
3674 11:04:03.844792 24, 0x0, End_B0=24 End_B1=24
3675 11:04:03.848195 25, 0x0, End_B0=25 End_B1=25
3676 11:04:03.848442 26, 0x0, End_B0=26 End_B1=26
3677 11:04:03.851580 27, 0x0, End_B0=27 End_B1=27
3678 11:04:03.855024 28, 0x0, End_B0=28 End_B1=28
3679 11:04:03.858463 29, 0x0, End_B0=29 End_B1=29
3680 11:04:03.858843 30, 0x0, End_B0=30 End_B1=30
3681 11:04:03.861704 31, 0xFFFF, End_B0=30 End_B1=30
3682 11:04:03.868227 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3683 11:04:03.874940 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3684 11:04:03.875374
3685 11:04:03.875707
3686 11:04:03.876010 Write Rank1 MR23 =0x3f
3687 11:04:03.878831 [DQSOSC]
3688 11:04:03.884981 [DQSOSCAuto] RK1, (LSB)MR18= 0xa8, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps
3689 11:04:03.891705 CH1_RK1: MR19=0x3, MR18=0xA8, DQSOSC=336, MR23=63, INC=21, DEC=32
3690 11:04:03.892186 Write Rank1 MR23 =0x3f
3691 11:04:03.892526 [DQSOSC]
3692 11:04:03.901723 [DQSOSCAuto] RK1, (LSB)MR18= 0xa3, (MSB)MR19= 0x3, tDQSOscB0 = 338 ps tDQSOscB1 = 0 ps
3693 11:04:03.902199 CH1 RK1: MR19=3, MR18=A3
3694 11:04:03.905142 [RxdqsGatingPostProcess] freq 1600
3695 11:04:03.912141 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3696 11:04:03.912654 Rank: 0
3697 11:04:03.915310 best DQS0 dly(2T, 0.5T) = (2, 5)
3698 11:04:03.918854 best DQS1 dly(2T, 0.5T) = (2, 5)
3699 11:04:03.921900 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3700 11:04:03.925335 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3701 11:04:03.925763 Rank: 1
3702 11:04:03.928838 best DQS0 dly(2T, 0.5T) = (2, 5)
3703 11:04:03.931928 best DQS1 dly(2T, 0.5T) = (2, 5)
3704 11:04:03.935260 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3705 11:04:03.938663 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3706 11:04:03.941817 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3707 11:04:03.945759 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3708 11:04:03.952219 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3709 11:04:03.952727
3710 11:04:03.953054
3711 11:04:03.955678 [Calibration Summary] Freqency 1600
3712 11:04:03.956105 CH 0, Rank 0
3713 11:04:03.956430 All Pass.
3714 11:04:03.956731
3715 11:04:03.958631 CH 0, Rank 1
3716 11:04:03.959054 All Pass.
3717 11:04:03.959446
3718 11:04:03.959758 CH 1, Rank 0
3719 11:04:03.962123 All Pass.
3720 11:04:03.962547
3721 11:04:03.962922 CH 1, Rank 1
3722 11:04:03.963233 All Pass.
3723 11:04:03.963521
3724 11:04:03.968684 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3725 11:04:03.979080 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3726 11:04:03.985286 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3727 11:04:03.985714 Write Rank0 MR3 =0xb0
3728 11:04:03.992153 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3729 11:04:03.998617 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3730 11:04:04.005354 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3731 11:04:04.008411 Write Rank1 MR3 =0xb0
3732 11:04:04.015325 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3733 11:04:04.022018 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3734 11:04:04.028796 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3735 11:04:04.032465 Write Rank0 MR3 =0xb0
3736 11:04:04.038726 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3737 11:04:04.045819 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3738 11:04:04.052347 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3739 11:04:04.052880 Write Rank1 MR3 =0xb0
3740 11:04:04.055509 DramC Write-DBI on
3741 11:04:04.058812 [GetDramInforAfterCalByMRR] Vendor 1.
3742 11:04:04.062572 [GetDramInforAfterCalByMRR] Revision 7.
3743 11:04:04.063096 MR8 12
3744 11:04:04.068866 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3745 11:04:04.069413 MR8 12
3746 11:04:04.072366 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3747 11:04:04.075902 MR8 12
3748 11:04:04.078793 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3749 11:04:04.079221 MR8 12
3750 11:04:04.085739 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3751 11:04:04.092315 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3752 11:04:04.095354 Write Rank0 MR13 =0xd0
3753 11:04:04.098725 Write Rank1 MR13 =0xd0
3754 11:04:04.099153 Write Rank0 MR13 =0xd0
3755 11:04:04.102148 Write Rank1 MR13 =0xd0
3756 11:04:04.105606 Save calibration result to emmc
3757 11:04:04.106028
3758 11:04:04.106349
3759 11:04:04.108500 [DramcModeReg_Check] Freq_1600, FSP_1
3760 11:04:04.108921 FSP_1, CH_0, RK0
3761 11:04:04.111914 Write Rank0 MR13 =0xd8
3762 11:04:04.115068 MR12 = 0x58 (global = 0x58) match
3763 11:04:04.119300 MR14 = 0x18 (global = 0x18) match
3764 11:04:04.119808 FSP_1, CH_0, RK1
3765 11:04:04.122404 Write Rank1 MR13 =0xd8
3766 11:04:04.125189 MR12 = 0x56 (global = 0x56) match
3767 11:04:04.128950 MR14 = 0x18 (global = 0x18) match
3768 11:04:04.129423 FSP_1, CH_1, RK0
3769 11:04:04.132066 Write Rank0 MR13 =0xd8
3770 11:04:04.135501 MR12 = 0x56 (global = 0x56) match
3771 11:04:04.139012 MR14 = 0x1a (global = 0x1a) match
3772 11:04:04.139440 FSP_1, CH_1, RK1
3773 11:04:04.142330 Write Rank1 MR13 =0xd8
3774 11:04:04.145660 MR12 = 0x56 (global = 0x56) match
3775 11:04:04.149021 MR14 = 0x18 (global = 0x18) match
3776 11:04:04.149588
3777 11:04:04.152023 [MEM_TEST] 02: After DFS, before run time config
3778 11:04:04.163585 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3779 11:04:04.164110
3780 11:04:04.164443 [TA2_TEST]
3781 11:04:04.164752 === TA2 HW
3782 11:04:04.166475 TA2 PAT: XTALK
3783 11:04:04.169952 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3784 11:04:04.176804 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3785 11:04:04.180343 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3786 11:04:04.183274 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3787 11:04:04.183711
3788 11:04:04.186839
3789 11:04:04.187263 Settings after calibration
3790 11:04:04.187595
3791 11:04:04.190118 [DramcRunTimeConfig]
3792 11:04:04.193553 TransferPLLToSPMControl - MODE SW PHYPLL
3793 11:04:04.193983 TX_TRACKING: ON
3794 11:04:04.197024 RX_TRACKING: ON
3795 11:04:04.197590 HW_GATING: ON
3796 11:04:04.199832 HW_GATING DBG: OFF
3797 11:04:04.200264 ddr_geometry:1
3798 11:04:04.203494 ddr_geometry:1
3799 11:04:04.203994 ddr_geometry:1
3800 11:04:04.204327 ddr_geometry:1
3801 11:04:04.206607 ddr_geometry:1
3802 11:04:04.207034 ddr_geometry:1
3803 11:04:04.210081 ddr_geometry:1
3804 11:04:04.210591 ddr_geometry:1
3805 11:04:04.213161 High Freq DUMMY_READ_FOR_TRACKING: ON
3806 11:04:04.216861 ZQCS_ENABLE_LP4: OFF
3807 11:04:04.217351 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3808 11:04:04.220208 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3809 11:04:04.223705 SPM_CONTROL_AFTERK: ON
3810 11:04:04.226715 IMPEDANCE_TRACKING: ON
3811 11:04:04.227279 TEMP_SENSOR: ON
3812 11:04:04.230094 PER_BANK_REFRESH: ON
3813 11:04:04.230522 HW_SAVE_FOR_SR: ON
3814 11:04:04.233804 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3815 11:04:04.236853 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3816 11:04:04.240251 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3817 11:04:04.243456 Read ODT Tracking: ON
3818 11:04:04.246755 =========================
3819 11:04:04.247180
3820 11:04:04.247506 [TA2_TEST]
3821 11:04:04.247807 === TA2 HW
3822 11:04:04.253321 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3823 11:04:04.256754 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3824 11:04:04.263304 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3825 11:04:04.266761 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3826 11:04:04.267143
3827 11:04:04.269801 [MEM_TEST] 03: After run time config
3828 11:04:04.281150 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3829 11:04:04.284525 [complex_mem_test] start addr:0x40024000, len:131072
3830 11:04:04.488176 1st complex R/W mem test pass
3831 11:04:04.494732 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3832 11:04:04.497898 sync preloader write leveling
3833 11:04:04.501543 sync preloader cbt_mr12
3834 11:04:04.504898 sync preloader cbt_clk_dly
3835 11:04:04.504973 sync preloader cbt_cmd_dly
3836 11:04:04.508292 sync preloader cbt_cs
3837 11:04:04.511599 sync preloader cbt_ca_perbit_delay
3838 11:04:04.511676 sync preloader clk_delay
3839 11:04:04.514904 sync preloader dqs_delay
3840 11:04:04.518313 sync preloader u1Gating2T_Save
3841 11:04:04.521864 sync preloader u1Gating05T_Save
3842 11:04:04.524761 sync preloader u1Gatingfine_tune_Save
3843 11:04:04.528070 sync preloader u1Gatingucpass_count_Save
3844 11:04:04.531526 sync preloader u1TxWindowPerbitVref_Save
3845 11:04:04.534676 sync preloader u1TxCenter_min_Save
3846 11:04:04.538052 sync preloader u1TxCenter_max_Save
3847 11:04:04.541381 sync preloader u1Txwin_center_Save
3848 11:04:04.544843 sync preloader u1Txfirst_pass_Save
3849 11:04:04.548193 sync preloader u1Txlast_pass_Save
3850 11:04:04.548268 sync preloader u1RxDatlat_Save
3851 11:04:04.551770 sync preloader u1RxWinPerbitVref_Save
3852 11:04:04.558176 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3853 11:04:04.561585 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3854 11:04:04.564936 sync preloader delay_cell_unit
3855 11:04:04.571740 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3856 11:04:04.571816 sync preloader write leveling
3857 11:04:04.574949 sync preloader cbt_mr12
3858 11:04:04.578499 sync preloader cbt_clk_dly
3859 11:04:04.581756 sync preloader cbt_cmd_dly
3860 11:04:04.581832 sync preloader cbt_cs
3861 11:04:04.585200 sync preloader cbt_ca_perbit_delay
3862 11:04:04.588760 sync preloader clk_delay
3863 11:04:04.588836 sync preloader dqs_delay
3864 11:04:04.591777 sync preloader u1Gating2T_Save
3865 11:04:04.595370 sync preloader u1Gating05T_Save
3866 11:04:04.598367 sync preloader u1Gatingfine_tune_Save
3867 11:04:04.601917 sync preloader u1Gatingucpass_count_Save
3868 11:04:04.605020 sync preloader u1TxWindowPerbitVref_Save
3869 11:04:04.608398 sync preloader u1TxCenter_min_Save
3870 11:04:04.611772 sync preloader u1TxCenter_max_Save
3871 11:04:04.615091 sync preloader u1Txwin_center_Save
3872 11:04:04.618238 sync preloader u1Txfirst_pass_Save
3873 11:04:04.621963 sync preloader u1Txlast_pass_Save
3874 11:04:04.624988 sync preloader u1RxDatlat_Save
3875 11:04:04.628787 sync preloader u1RxWinPerbitVref_Save
3876 11:04:04.632077 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3877 11:04:04.635435 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3878 11:04:04.638527 sync preloader delay_cell_unit
3879 11:04:04.645189 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3880 11:04:04.648618 sync preloader write leveling
3881 11:04:04.651677 sync preloader cbt_mr12
3882 11:04:04.651753 sync preloader cbt_clk_dly
3883 11:04:04.654960 sync preloader cbt_cmd_dly
3884 11:04:04.658500 sync preloader cbt_cs
3885 11:04:04.658588 sync preloader cbt_ca_perbit_delay
3886 11:04:04.662197 sync preloader clk_delay
3887 11:04:04.665770 sync preloader dqs_delay
3888 11:04:04.668734 sync preloader u1Gating2T_Save
3889 11:04:04.668809 sync preloader u1Gating05T_Save
3890 11:04:04.674989 sync preloader u1Gatingfine_tune_Save
3891 11:04:04.678480 sync preloader u1Gatingucpass_count_Save
3892 11:04:04.681752 sync preloader u1TxWindowPerbitVref_Save
3893 11:04:04.685013 sync preloader u1TxCenter_min_Save
3894 11:04:04.688294 sync preloader u1TxCenter_max_Save
3895 11:04:04.688369 sync preloader u1Txwin_center_Save
3896 11:04:04.691739 sync preloader u1Txfirst_pass_Save
3897 11:04:04.695321 sync preloader u1Txlast_pass_Save
3898 11:04:04.698496 sync preloader u1RxDatlat_Save
3899 11:04:04.701777 sync preloader u1RxWinPerbitVref_Save
3900 11:04:04.705035 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3901 11:04:04.712013 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3902 11:04:04.715312 sync preloader delay_cell_unit
3903 11:04:04.718331 just_for_test_dump_coreboot_params dump all params
3904 11:04:04.718405 dump source = 0x0
3905 11:04:04.721512 dump params frequency:1600
3906 11:04:04.725098 dump params rank number:2
3907 11:04:04.725172
3908 11:04:04.728342 dump params write leveling
3909 11:04:04.728417 write leveling[0][0][0] = 0x21
3910 11:04:04.731535 write leveling[0][0][1] = 0x1c
3911 11:04:04.734910 write leveling[0][1][0] = 0x22
3912 11:04:04.738283 write leveling[0][1][1] = 0x1f
3913 11:04:04.741494 write leveling[1][0][0] = 0x25
3914 11:04:04.744951 write leveling[1][0][1] = 0x21
3915 11:04:04.745026 write leveling[1][1][0] = 0x27
3916 11:04:04.748157 write leveling[1][1][1] = 0x21
3917 11:04:04.751570 dump params cbt_cs
3918 11:04:04.751645 cbt_cs[0][0] = 0x9
3919 11:04:04.755111 cbt_cs[0][1] = 0x9
3920 11:04:04.755186 cbt_cs[1][0] = 0xc
3921 11:04:04.758396 cbt_cs[1][1] = 0xc
3922 11:04:04.758471 dump params cbt_mr12
3923 11:04:04.761752 cbt_mr12[0][0] = 0x18
3924 11:04:04.761828 cbt_mr12[0][1] = 0x16
3925 11:04:04.765444 cbt_mr12[1][0] = 0x16
3926 11:04:04.768161 cbt_mr12[1][1] = 0x16
3927 11:04:04.768236 dump params tx window
3928 11:04:04.771998 tx_center_min[0][0][0] = 980
3929 11:04:04.775190 tx_center_max[0][0][0] = 987
3930 11:04:04.778439 tx_center_min[0][0][1] = 974
3931 11:04:04.778515 tx_center_max[0][0][1] = 979
3932 11:04:04.781949 tx_center_min[0][1][0] = 981
3933 11:04:04.785217 tx_center_max[0][1][0] = 988
3934 11:04:04.788964 tx_center_min[0][1][1] = 979
3935 11:04:04.792011 tx_center_max[0][1][1] = 984
3936 11:04:04.792086 tx_center_min[1][0][0] = 982
3937 11:04:04.795390 tx_center_max[1][0][0] = 989
3938 11:04:04.798738 tx_center_min[1][0][1] = 980
3939 11:04:04.801897 tx_center_max[1][0][1] = 983
3940 11:04:04.801973 tx_center_min[1][1][0] = 986
3941 11:04:04.805432 tx_center_max[1][1][0] = 991
3942 11:04:04.808600 tx_center_min[1][1][1] = 980
3943 11:04:04.812576 tx_center_max[1][1][1] = 983
3944 11:04:04.812652 dump params tx window
3945 11:04:04.815303 tx_win_center[0][0][0] = 987
3946 11:04:04.818896 tx_first_pass[0][0][0] = 975
3947 11:04:04.821971 tx_last_pass[0][0][0] = 999
3948 11:04:04.822046 tx_win_center[0][0][1] = 986
3949 11:04:04.825355 tx_first_pass[0][0][1] = 975
3950 11:04:04.829081 tx_last_pass[0][0][1] = 998
3951 11:04:04.832465 tx_win_center[0][0][2] = 986
3952 11:04:04.835378 tx_first_pass[0][0][2] = 975
3953 11:04:04.835455 tx_last_pass[0][0][2] = 998
3954 11:04:04.838678 tx_win_center[0][0][3] = 980
3955 11:04:04.842247 tx_first_pass[0][0][3] = 968
3956 11:04:04.845750 tx_last_pass[0][0][3] = 992
3957 11:04:04.845855 tx_win_center[0][0][4] = 986
3958 11:04:04.848887 tx_first_pass[0][0][4] = 974
3959 11:04:04.852156 tx_last_pass[0][0][4] = 998
3960 11:04:04.855759 tx_win_center[0][0][5] = 981
3961 11:04:04.858966 tx_first_pass[0][0][5] = 969
3962 11:04:04.859042 tx_last_pass[0][0][5] = 993
3963 11:04:04.862131 tx_win_center[0][0][6] = 982
3964 11:04:04.865552 tx_first_pass[0][0][6] = 970
3965 11:04:04.868922 tx_last_pass[0][0][6] = 994
3966 11:04:04.868997 tx_win_center[0][0][7] = 983
3967 11:04:04.872205 tx_first_pass[0][0][7] = 971
3968 11:04:04.875566 tx_last_pass[0][0][7] = 995
3969 11:04:04.879138 tx_win_center[0][0][8] = 974
3970 11:04:04.879214 tx_first_pass[0][0][8] = 962
3971 11:04:04.882262 tx_last_pass[0][0][8] = 987
3972 11:04:04.885668 tx_win_center[0][0][9] = 975
3973 11:04:04.888869 tx_first_pass[0][0][9] = 963
3974 11:04:04.892526 tx_last_pass[0][0][9] = 988
3975 11:04:04.892602 tx_win_center[0][0][10] = 979
3976 11:04:04.895908 tx_first_pass[0][0][10] = 968
3977 11:04:04.899418 tx_last_pass[0][0][10] = 991
3978 11:04:04.902565 tx_win_center[0][0][11] = 975
3979 11:04:04.905839 tx_first_pass[0][0][11] = 962
3980 11:04:04.905916 tx_last_pass[0][0][11] = 988
3981 11:04:04.909352 tx_win_center[0][0][12] = 975
3982 11:04:04.912319 tx_first_pass[0][0][12] = 962
3983 11:04:04.915751 tx_last_pass[0][0][12] = 989
3984 11:04:04.919293 tx_win_center[0][0][13] = 974
3985 11:04:04.919369 tx_first_pass[0][0][13] = 962
3986 11:04:04.922720 tx_last_pass[0][0][13] = 987
3987 11:04:04.925664 tx_win_center[0][0][14] = 976
3988 11:04:04.929097 tx_first_pass[0][0][14] = 963
3989 11:04:04.932479 tx_last_pass[0][0][14] = 989
3990 11:04:04.932555 tx_win_center[0][0][15] = 978
3991 11:04:04.936187 tx_first_pass[0][0][15] = 966
3992 11:04:04.939146 tx_last_pass[0][0][15] = 990
3993 11:04:04.942493 tx_win_center[0][1][0] = 988
3994 11:04:04.945728 tx_first_pass[0][1][0] = 976
3995 11:04:04.945804 tx_last_pass[0][1][0] = 1001
3996 11:04:04.949058 tx_win_center[0][1][1] = 987
3997 11:04:04.952479 tx_first_pass[0][1][1] = 976
3998 11:04:04.955842 tx_last_pass[0][1][1] = 999
3999 11:04:04.955917 tx_win_center[0][1][2] = 987
4000 11:04:04.959524 tx_first_pass[0][1][2] = 976
4001 11:04:04.962689 tx_last_pass[0][1][2] = 999
4002 11:04:04.965853 tx_win_center[0][1][3] = 981
4003 11:04:04.965928 tx_first_pass[0][1][3] = 969
4004 11:04:04.969189 tx_last_pass[0][1][3] = 994
4005 11:04:04.972495 tx_win_center[0][1][4] = 987
4006 11:04:04.975985 tx_first_pass[0][1][4] = 976
4007 11:04:04.979578 tx_last_pass[0][1][4] = 999
4008 11:04:04.979653 tx_win_center[0][1][5] = 982
4009 11:04:04.982716 tx_first_pass[0][1][5] = 970
4010 11:04:04.986116 tx_last_pass[0][1][5] = 994
4011 11:04:04.989655 tx_win_center[0][1][6] = 983
4012 11:04:04.989730 tx_first_pass[0][1][6] = 971
4013 11:04:04.992728 tx_last_pass[0][1][6] = 995
4014 11:04:04.995943 tx_win_center[0][1][7] = 986
4015 11:04:04.999383 tx_first_pass[0][1][7] = 974
4016 11:04:04.999489 tx_last_pass[0][1][7] = 998
4017 11:04:05.003121 tx_win_center[0][1][8] = 979
4018 11:04:05.006248 tx_first_pass[0][1][8] = 967
4019 11:04:05.009769 tx_last_pass[0][1][8] = 991
4020 11:04:05.013260 tx_win_center[0][1][9] = 979
4021 11:04:05.013349 tx_first_pass[0][1][9] = 968
4022 11:04:05.016238 tx_last_pass[0][1][9] = 991
4023 11:04:05.019846 tx_win_center[0][1][10] = 984
4024 11:04:05.022983 tx_first_pass[0][1][10] = 973
4025 11:04:05.023059 tx_last_pass[0][1][10] = 996
4026 11:04:05.026639 tx_win_center[0][1][11] = 980
4027 11:04:05.029863 tx_first_pass[0][1][11] = 968
4028 11:04:05.033063 tx_last_pass[0][1][11] = 992
4029 11:04:05.036417 tx_win_center[0][1][12] = 980
4030 11:04:05.036493 tx_first_pass[0][1][12] = 968
4031 11:04:05.039616 tx_last_pass[0][1][12] = 992
4032 11:04:05.043030 tx_win_center[0][1][13] = 979
4033 11:04:05.046335 tx_first_pass[0][1][13] = 968
4034 11:04:05.049949 tx_last_pass[0][1][13] = 991
4035 11:04:05.050025 tx_win_center[0][1][14] = 980
4036 11:04:05.053065 tx_first_pass[0][1][14] = 968
4037 11:04:05.056658 tx_last_pass[0][1][14] = 992
4038 11:04:05.060355 tx_win_center[0][1][15] = 981
4039 11:04:05.063602 tx_first_pass[0][1][15] = 969
4040 11:04:05.063677 tx_last_pass[0][1][15] = 993
4041 11:04:05.066815 tx_win_center[1][0][0] = 989
4042 11:04:05.070043 tx_first_pass[1][0][0] = 977
4043 11:04:05.073141 tx_last_pass[1][0][0] = 1001
4044 11:04:05.076673 tx_win_center[1][0][1] = 987
4045 11:04:05.076748 tx_first_pass[1][0][1] = 976
4046 11:04:05.079768 tx_last_pass[1][0][1] = 999
4047 11:04:05.083415 tx_win_center[1][0][2] = 985
4048 11:04:05.086525 tx_first_pass[1][0][2] = 973
4049 11:04:05.086601 tx_last_pass[1][0][2] = 997
4050 11:04:05.090159 tx_win_center[1][0][3] = 982
4051 11:04:05.093519 tx_first_pass[1][0][3] = 971
4052 11:04:05.097081 tx_last_pass[1][0][3] = 994
4053 11:04:05.099981 tx_win_center[1][0][4] = 986
4054 11:04:05.100056 tx_first_pass[1][0][4] = 975
4055 11:04:05.103300 tx_last_pass[1][0][4] = 998
4056 11:04:05.106855 tx_win_center[1][0][5] = 987
4057 11:04:05.110255 tx_first_pass[1][0][5] = 976
4058 11:04:05.110331 tx_last_pass[1][0][5] = 999
4059 11:04:05.113332 tx_win_center[1][0][6] = 988
4060 11:04:05.116898 tx_first_pass[1][0][6] = 977
4061 11:04:05.119848 tx_last_pass[1][0][6] = 1000
4062 11:04:05.123651 tx_win_center[1][0][7] = 986
4063 11:04:05.123726 tx_first_pass[1][0][7] = 975
4064 11:04:05.126916 tx_last_pass[1][0][7] = 998
4065 11:04:05.130344 tx_win_center[1][0][8] = 980
4066 11:04:05.133349 tx_first_pass[1][0][8] = 969
4067 11:04:05.133424 tx_last_pass[1][0][8] = 992
4068 11:04:05.136935 tx_win_center[1][0][9] = 980
4069 11:04:05.140100 tx_first_pass[1][0][9] = 969
4070 11:04:05.143416 tx_last_pass[1][0][9] = 992
4071 11:04:05.146521 tx_win_center[1][0][10] = 981
4072 11:04:05.146596 tx_first_pass[1][0][10] = 970
4073 11:04:05.150028 tx_last_pass[1][0][10] = 993
4074 11:04:05.153771 tx_win_center[1][0][11] = 982
4075 11:04:05.156539 tx_first_pass[1][0][11] = 971
4076 11:04:05.156614 tx_last_pass[1][0][11] = 994
4077 11:04:05.160026 tx_win_center[1][0][12] = 983
4078 11:04:05.163653 tx_first_pass[1][0][12] = 971
4079 11:04:05.166700 tx_last_pass[1][0][12] = 995
4080 11:04:05.169871 tx_win_center[1][0][13] = 982
4081 11:04:05.173257 tx_first_pass[1][0][13] = 971
4082 11:04:05.173332 tx_last_pass[1][0][13] = 993
4083 11:04:05.176630 tx_win_center[1][0][14] = 982
4084 11:04:05.180353 tx_first_pass[1][0][14] = 971
4085 11:04:05.183246 tx_last_pass[1][0][14] = 993
4086 11:04:05.183313 tx_win_center[1][0][15] = 980
4087 11:04:05.186827 tx_first_pass[1][0][15] = 968
4088 11:04:05.189946 tx_last_pass[1][0][15] = 992
4089 11:04:05.193859 tx_win_center[1][1][0] = 991
4090 11:04:05.196667 tx_first_pass[1][1][0] = 978
4091 11:04:05.196743 tx_last_pass[1][1][0] = 1005
4092 11:04:05.199977 tx_win_center[1][1][1] = 989
4093 11:04:05.203674 tx_first_pass[1][1][1] = 977
4094 11:04:05.206867 tx_last_pass[1][1][1] = 1001
4095 11:04:05.210102 tx_win_center[1][1][2] = 987
4096 11:04:05.210178 tx_first_pass[1][1][2] = 975
4097 11:04:05.213558 tx_last_pass[1][1][2] = 999
4098 11:04:05.216886 tx_win_center[1][1][3] = 986
4099 11:04:05.220674 tx_first_pass[1][1][3] = 974
4100 11:04:05.220749 tx_last_pass[1][1][3] = 998
4101 11:04:05.223416 tx_win_center[1][1][4] = 988
4102 11:04:05.226792 tx_first_pass[1][1][4] = 976
4103 11:04:05.230173 tx_last_pass[1][1][4] = 1000
4104 11:04:05.233568 tx_win_center[1][1][5] = 990
4105 11:04:05.233643 tx_first_pass[1][1][5] = 978
4106 11:04:05.236850 tx_last_pass[1][1][5] = 1003
4107 11:04:05.239989 tx_win_center[1][1][6] = 991
4108 11:04:05.243778 tx_first_pass[1][1][6] = 978
4109 11:04:05.243853 tx_last_pass[1][1][6] = 1004
4110 11:04:05.246989 tx_win_center[1][1][7] = 988
4111 11:04:05.250195 tx_first_pass[1][1][7] = 976
4112 11:04:05.253376 tx_last_pass[1][1][7] = 1000
4113 11:04:05.257304 tx_win_center[1][1][8] = 981
4114 11:04:05.257380 tx_first_pass[1][1][8] = 969
4115 11:04:05.260505 tx_last_pass[1][1][8] = 993
4116 11:04:05.263788 tx_win_center[1][1][9] = 981
4117 11:04:05.267111 tx_first_pass[1][1][9] = 970
4118 11:04:05.267187 tx_last_pass[1][1][9] = 992
4119 11:04:05.270105 tx_win_center[1][1][10] = 981
4120 11:04:05.273621 tx_first_pass[1][1][10] = 970
4121 11:04:05.277209 tx_last_pass[1][1][10] = 993
4122 11:04:05.280408 tx_win_center[1][1][11] = 983
4123 11:04:05.280494 tx_first_pass[1][1][11] = 971
4124 11:04:05.283926 tx_last_pass[1][1][11] = 995
4125 11:04:05.287098 tx_win_center[1][1][12] = 983
4126 11:04:05.290399 tx_first_pass[1][1][12] = 972
4127 11:04:05.293891 tx_last_pass[1][1][12] = 995
4128 11:04:05.293992 tx_win_center[1][1][13] = 982
4129 11:04:05.296910 tx_first_pass[1][1][13] = 971
4130 11:04:05.300373 tx_last_pass[1][1][13] = 993
4131 11:04:05.303726 tx_win_center[1][1][14] = 981
4132 11:04:05.307289 tx_first_pass[1][1][14] = 970
4133 11:04:05.307364 tx_last_pass[1][1][14] = 993
4134 11:04:05.310570 tx_win_center[1][1][15] = 980
4135 11:04:05.314368 tx_first_pass[1][1][15] = 968
4136 11:04:05.317124 tx_last_pass[1][1][15] = 992
4137 11:04:05.317198 dump params rx window
4138 11:04:05.320748 rx_firspass[0][0][0] = 8
4139 11:04:05.323744 rx_lastpass[0][0][0] = 40
4140 11:04:05.327298 rx_firspass[0][0][1] = 6
4141 11:04:05.327372 rx_lastpass[0][0][1] = 39
4142 11:04:05.330605 rx_firspass[0][0][2] = 8
4143 11:04:05.333923 rx_lastpass[0][0][2] = 38
4144 11:04:05.333997 rx_firspass[0][0][3] = -4
4145 11:04:05.337102 rx_lastpass[0][0][3] = 29
4146 11:04:05.340473 rx_firspass[0][0][4] = 6
4147 11:04:05.340548 rx_lastpass[0][0][4] = 38
4148 11:04:05.343849 rx_firspass[0][0][5] = -1
4149 11:04:05.347244 rx_lastpass[0][0][5] = 30
4150 11:04:05.350466 rx_firspass[0][0][6] = 1
4151 11:04:05.350540 rx_lastpass[0][0][6] = 32
4152 11:04:05.353693 rx_firspass[0][0][7] = 3
4153 11:04:05.357106 rx_lastpass[0][0][7] = 32
4154 11:04:05.357202 rx_firspass[0][0][8] = 0
4155 11:04:05.360928 rx_lastpass[0][0][8] = 34
4156 11:04:05.364028 rx_firspass[0][0][9] = 4
4157 11:04:05.364102 rx_lastpass[0][0][9] = 34
4158 11:04:05.367233 rx_firspass[0][0][10] = 6
4159 11:04:05.370395 rx_lastpass[0][0][10] = 38
4160 11:04:05.374042 rx_firspass[0][0][11] = 0
4161 11:04:05.374116 rx_lastpass[0][0][11] = 34
4162 11:04:05.377468 rx_firspass[0][0][12] = 2
4163 11:04:05.380610 rx_lastpass[0][0][12] = 36
4164 11:04:05.380684 rx_firspass[0][0][13] = 2
4165 11:04:05.383891 rx_lastpass[0][0][13] = 30
4166 11:04:05.387710 rx_firspass[0][0][14] = -1
4167 11:04:05.390924 rx_lastpass[0][0][14] = 36
4168 11:04:05.390997 rx_firspass[0][0][15] = 3
4169 11:04:05.394105 rx_lastpass[0][0][15] = 36
4170 11:04:05.397831 rx_firspass[0][1][0] = 7
4171 11:04:05.397905 rx_lastpass[0][1][0] = 42
4172 11:04:05.401244 rx_firspass[0][1][1] = 6
4173 11:04:05.404279 rx_lastpass[0][1][1] = 40
4174 11:04:05.404353 rx_firspass[0][1][2] = 7
4175 11:04:05.407760 rx_lastpass[0][1][2] = 39
4176 11:04:05.411150 rx_firspass[0][1][3] = -4
4177 11:04:05.414187 rx_lastpass[0][1][3] = 31
4178 11:04:05.414284 rx_firspass[0][1][4] = 6
4179 11:04:05.417607 rx_lastpass[0][1][4] = 40
4180 11:04:05.421074 rx_firspass[0][1][5] = -2
4181 11:04:05.421172 rx_lastpass[0][1][5] = 33
4182 11:04:05.424185 rx_firspass[0][1][6] = 1
4183 11:04:05.427633 rx_lastpass[0][1][6] = 35
4184 11:04:05.427708 rx_firspass[0][1][7] = 2
4185 11:04:05.430955 rx_lastpass[0][1][7] = 34
4186 11:04:05.434526 rx_firspass[0][1][8] = -1
4187 11:04:05.437681 rx_lastpass[0][1][8] = 35
4188 11:04:05.437755 rx_firspass[0][1][9] = 3
4189 11:04:05.441051 rx_lastpass[0][1][9] = 36
4190 11:04:05.444258 rx_firspass[0][1][10] = 6
4191 11:04:05.444375 rx_lastpass[0][1][10] = 40
4192 11:04:05.447561 rx_firspass[0][1][11] = 0
4193 11:04:05.450899 rx_lastpass[0][1][11] = 34
4194 11:04:05.454498 rx_firspass[0][1][12] = 2
4195 11:04:05.454628 rx_lastpass[0][1][12] = 37
4196 11:04:05.457807 rx_firspass[0][1][13] = 1
4197 11:04:05.461020 rx_lastpass[0][1][13] = 33
4198 11:04:05.461118 rx_firspass[0][1][14] = 2
4199 11:04:05.465060 rx_lastpass[0][1][14] = 34
4200 11:04:05.467570 rx_firspass[0][1][15] = 3
4201 11:04:05.471427 rx_lastpass[0][1][15] = 38
4202 11:04:05.471503 rx_firspass[1][0][0] = 7
4203 11:04:05.474317 rx_lastpass[1][0][0] = 40
4204 11:04:05.477510 rx_firspass[1][0][1] = 6
4205 11:04:05.477585 rx_lastpass[1][0][1] = 40
4206 11:04:05.481002 rx_firspass[1][0][2] = 0
4207 11:04:05.484565 rx_lastpass[1][0][2] = 34
4208 11:04:05.487638 rx_firspass[1][0][3] = -2
4209 11:04:05.487713 rx_lastpass[1][0][3] = 33
4210 11:04:05.491166 rx_firspass[1][0][4] = 3
4211 11:04:05.494692 rx_lastpass[1][0][4] = 35
4212 11:04:05.494767 rx_firspass[1][0][5] = 7
4213 11:04:05.497733 rx_lastpass[1][0][5] = 40
4214 11:04:05.501129 rx_firspass[1][0][6] = 9
4215 11:04:05.501238 rx_lastpass[1][0][6] = 40
4216 11:04:05.504569 rx_firspass[1][0][7] = 4
4217 11:04:05.507706 rx_lastpass[1][0][7] = 35
4218 11:04:05.511087 rx_firspass[1][0][8] = 1
4219 11:04:05.511186 rx_lastpass[1][0][8] = 35
4220 11:04:05.514339 rx_firspass[1][0][9] = 0
4221 11:04:05.517554 rx_lastpass[1][0][9] = 35
4222 11:04:05.517642 rx_firspass[1][0][10] = 2
4223 11:04:05.520943 rx_lastpass[1][0][10] = 33
4224 11:04:05.524763 rx_firspass[1][0][11] = 2
4225 11:04:05.527887 rx_lastpass[1][0][11] = 36
4226 11:04:05.528035 rx_firspass[1][0][12] = 4
4227 11:04:05.531362 rx_lastpass[1][0][12] = 37
4228 11:04:05.534861 rx_firspass[1][0][13] = 3
4229 11:04:05.535009 rx_lastpass[1][0][13] = 35
4230 11:04:05.537859 rx_firspass[1][0][14] = 3
4231 11:04:05.541278 rx_lastpass[1][0][14] = 35
4232 11:04:05.544533 rx_firspass[1][0][15] = -2
4233 11:04:05.544627 rx_lastpass[1][0][15] = 31
4234 11:04:05.547860 rx_firspass[1][1][0] = 7
4235 11:04:05.551196 rx_lastpass[1][1][0] = 42
4236 11:04:05.551273 rx_firspass[1][1][1] = 6
4237 11:04:05.554967 rx_lastpass[1][1][1] = 41
4238 11:04:05.557839 rx_firspass[1][1][2] = 0
4239 11:04:05.561068 rx_lastpass[1][1][2] = 34
4240 11:04:05.561170 rx_firspass[1][1][3] = -2
4241 11:04:05.564427 rx_lastpass[1][1][3] = 32
4242 11:04:05.568061 rx_firspass[1][1][4] = 3
4243 11:04:05.568175 rx_lastpass[1][1][4] = 37
4244 11:04:05.571951 rx_firspass[1][1][5] = 7
4245 11:04:05.574803 rx_lastpass[1][1][5] = 40
4246 11:04:05.574884 rx_firspass[1][1][6] = 8
4247 11:04:05.578262 rx_lastpass[1][1][6] = 42
4248 11:04:05.581262 rx_firspass[1][1][7] = 3
4249 11:04:05.581344 rx_lastpass[1][1][7] = 38
4250 11:04:05.584728 rx_firspass[1][1][8] = 1
4251 11:04:05.587984 rx_lastpass[1][1][8] = 36
4252 11:04:05.591980 rx_firspass[1][1][9] = 1
4253 11:04:05.592062 rx_lastpass[1][1][9] = 36
4254 11:04:05.594850 rx_firspass[1][1][10] = 1
4255 11:04:05.598118 rx_lastpass[1][1][10] = 36
4256 11:04:05.598199 rx_firspass[1][1][11] = 3
4257 11:04:05.601240 rx_lastpass[1][1][11] = 36
4258 11:04:05.604589 rx_firspass[1][1][12] = 5
4259 11:04:05.608008 rx_lastpass[1][1][12] = 39
4260 11:04:05.608113 rx_firspass[1][1][13] = 4
4261 11:04:05.611727 rx_lastpass[1][1][13] = 38
4262 11:04:05.614827 rx_firspass[1][1][14] = 4
4263 11:04:05.618160 rx_lastpass[1][1][14] = 37
4264 11:04:05.618240 rx_firspass[1][1][15] = -2
4265 11:04:05.621188 rx_lastpass[1][1][15] = 32
4266 11:04:05.624867 dump params clk_delay
4267 11:04:05.624968 clk_delay[0] = 0
4268 11:04:05.625031 clk_delay[1] = 0
4269 11:04:05.627914 dump params dqs_delay
4270 11:04:05.631680 dqs_delay[0][0] = -1
4271 11:04:05.631764 dqs_delay[0][1] = 0
4272 11:04:05.634862 dqs_delay[1][0] = 0
4273 11:04:05.634940 dqs_delay[1][1] = 1
4274 11:04:05.638174 dump params delay_cell_unit = 753
4275 11:04:05.641401 dump source = 0x0
4276 11:04:05.641479 dump params frequency:1200
4277 11:04:05.644966 dump params rank number:2
4278 11:04:05.645104
4279 11:04:05.648297 dump params write leveling
4280 11:04:05.651572 write leveling[0][0][0] = 0x0
4281 11:04:05.651648 write leveling[0][0][1] = 0x0
4282 11:04:05.654706 write leveling[0][1][0] = 0x0
4283 11:04:05.658351 write leveling[0][1][1] = 0x0
4284 11:04:05.661583 write leveling[1][0][0] = 0x0
4285 11:04:05.664968 write leveling[1][0][1] = 0x0
4286 11:04:05.665048 write leveling[1][1][0] = 0x0
4287 11:04:05.668303 write leveling[1][1][1] = 0x0
4288 11:04:05.671530 dump params cbt_cs
4289 11:04:05.671611 cbt_cs[0][0] = 0x0
4290 11:04:05.675187 cbt_cs[0][1] = 0x0
4291 11:04:05.675285 cbt_cs[1][0] = 0x0
4292 11:04:05.678154 cbt_cs[1][1] = 0x0
4293 11:04:05.678238 dump params cbt_mr12
4294 11:04:05.681531 cbt_mr12[0][0] = 0x0
4295 11:04:05.684928 cbt_mr12[0][1] = 0x0
4296 11:04:05.685010 cbt_mr12[1][0] = 0x0
4297 11:04:05.688128 cbt_mr12[1][1] = 0x0
4298 11:04:05.688236 dump params tx window
4299 11:04:05.692016 tx_center_min[0][0][0] = 0
4300 11:04:05.694972 tx_center_max[0][0][0] = 0
4301 11:04:05.695054 tx_center_min[0][0][1] = 0
4302 11:04:05.698541 tx_center_max[0][0][1] = 0
4303 11:04:05.701557 tx_center_min[0][1][0] = 0
4304 11:04:05.705458 tx_center_max[0][1][0] = 0
4305 11:04:05.705535 tx_center_min[0][1][1] = 0
4306 11:04:05.708122 tx_center_max[0][1][1] = 0
4307 11:04:05.712008 tx_center_min[1][0][0] = 0
4308 11:04:05.715273 tx_center_max[1][0][0] = 0
4309 11:04:05.715349 tx_center_min[1][0][1] = 0
4310 11:04:05.718317 tx_center_max[1][0][1] = 0
4311 11:04:05.721979 tx_center_min[1][1][0] = 0
4312 11:04:05.725386 tx_center_max[1][1][0] = 0
4313 11:04:05.725462 tx_center_min[1][1][1] = 0
4314 11:04:05.728465 tx_center_max[1][1][1] = 0
4315 11:04:05.731755 dump params tx window
4316 11:04:05.731830 tx_win_center[0][0][0] = 0
4317 11:04:05.735119 tx_first_pass[0][0][0] = 0
4318 11:04:05.738383 tx_last_pass[0][0][0] = 0
4319 11:04:05.738459 tx_win_center[0][0][1] = 0
4320 11:04:05.741883 tx_first_pass[0][0][1] = 0
4321 11:04:05.745127 tx_last_pass[0][0][1] = 0
4322 11:04:05.748581 tx_win_center[0][0][2] = 0
4323 11:04:05.748657 tx_first_pass[0][0][2] = 0
4324 11:04:05.751813 tx_last_pass[0][0][2] = 0
4325 11:04:05.755356 tx_win_center[0][0][3] = 0
4326 11:04:05.758864 tx_first_pass[0][0][3] = 0
4327 11:04:05.758940 tx_last_pass[0][0][3] = 0
4328 11:04:05.762202 tx_win_center[0][0][4] = 0
4329 11:04:05.765328 tx_first_pass[0][0][4] = 0
4330 11:04:05.765403 tx_last_pass[0][0][4] = 0
4331 11:04:05.768717 tx_win_center[0][0][5] = 0
4332 11:04:05.772314 tx_first_pass[0][0][5] = 0
4333 11:04:05.775454 tx_last_pass[0][0][5] = 0
4334 11:04:05.775530 tx_win_center[0][0][6] = 0
4335 11:04:05.779112 tx_first_pass[0][0][6] = 0
4336 11:04:05.782145 tx_last_pass[0][0][6] = 0
4337 11:04:05.782220 tx_win_center[0][0][7] = 0
4338 11:04:05.785530 tx_first_pass[0][0][7] = 0
4339 11:04:05.788691 tx_last_pass[0][0][7] = 0
4340 11:04:05.792277 tx_win_center[0][0][8] = 0
4341 11:04:05.792353 tx_first_pass[0][0][8] = 0
4342 11:04:05.795888 tx_last_pass[0][0][8] = 0
4343 11:04:05.799198 tx_win_center[0][0][9] = 0
4344 11:04:05.799274 tx_first_pass[0][0][9] = 0
4345 11:04:05.802224 tx_last_pass[0][0][9] = 0
4346 11:04:05.805822 tx_win_center[0][0][10] = 0
4347 11:04:05.808774 tx_first_pass[0][0][10] = 0
4348 11:04:05.808849 tx_last_pass[0][0][10] = 0
4349 11:04:05.812148 tx_win_center[0][0][11] = 0
4350 11:04:05.815461 tx_first_pass[0][0][11] = 0
4351 11:04:05.818893 tx_last_pass[0][0][11] = 0
4352 11:04:05.818969 tx_win_center[0][0][12] = 0
4353 11:04:05.822523 tx_first_pass[0][0][12] = 0
4354 11:04:05.825725 tx_last_pass[0][0][12] = 0
4355 11:04:05.829173 tx_win_center[0][0][13] = 0
4356 11:04:05.829290 tx_first_pass[0][0][13] = 0
4357 11:04:05.832586 tx_last_pass[0][0][13] = 0
4358 11:04:05.835514 tx_win_center[0][0][14] = 0
4359 11:04:05.838935 tx_first_pass[0][0][14] = 0
4360 11:04:05.839011 tx_last_pass[0][0][14] = 0
4361 11:04:05.841988 tx_win_center[0][0][15] = 0
4362 11:04:05.845304 tx_first_pass[0][0][15] = 0
4363 11:04:05.848812 tx_last_pass[0][0][15] = 0
4364 11:04:05.848888 tx_win_center[0][1][0] = 0
4365 11:04:05.852348 tx_first_pass[0][1][0] = 0
4366 11:04:05.855544 tx_last_pass[0][1][0] = 0
4367 11:04:05.858687 tx_win_center[0][1][1] = 0
4368 11:04:05.858763 tx_first_pass[0][1][1] = 0
4369 11:04:05.861998 tx_last_pass[0][1][1] = 0
4370 11:04:05.865639 tx_win_center[0][1][2] = 0
4371 11:04:05.868894 tx_first_pass[0][1][2] = 0
4372 11:04:05.868970 tx_last_pass[0][1][2] = 0
4373 11:04:05.872054 tx_win_center[0][1][3] = 0
4374 11:04:05.875506 tx_first_pass[0][1][3] = 0
4375 11:04:05.875582 tx_last_pass[0][1][3] = 0
4376 11:04:05.878471 tx_win_center[0][1][4] = 0
4377 11:04:05.881920 tx_first_pass[0][1][4] = 0
4378 11:04:05.885160 tx_last_pass[0][1][4] = 0
4379 11:04:05.885259 tx_win_center[0][1][5] = 0
4380 11:04:05.888713 tx_first_pass[0][1][5] = 0
4381 11:04:05.891943 tx_last_pass[0][1][5] = 0
4382 11:04:05.892035 tx_win_center[0][1][6] = 0
4383 11:04:05.895294 tx_first_pass[0][1][6] = 0
4384 11:04:05.898471 tx_last_pass[0][1][6] = 0
4385 11:04:05.901720 tx_win_center[0][1][7] = 0
4386 11:04:05.901797 tx_first_pass[0][1][7] = 0
4387 11:04:05.905053 tx_last_pass[0][1][7] = 0
4388 11:04:05.908657 tx_win_center[0][1][8] = 0
4389 11:04:05.912108 tx_first_pass[0][1][8] = 0
4390 11:04:05.912183 tx_last_pass[0][1][8] = 0
4391 11:04:05.915413 tx_win_center[0][1][9] = 0
4392 11:04:05.918598 tx_first_pass[0][1][9] = 0
4393 11:04:05.918676 tx_last_pass[0][1][9] = 0
4394 11:04:05.921797 tx_win_center[0][1][10] = 0
4395 11:04:05.925394 tx_first_pass[0][1][10] = 0
4396 11:04:05.928533 tx_last_pass[0][1][10] = 0
4397 11:04:05.928608 tx_win_center[0][1][11] = 0
4398 11:04:05.932044 tx_first_pass[0][1][11] = 0
4399 11:04:05.935684 tx_last_pass[0][1][11] = 0
4400 11:04:05.938541 tx_win_center[0][1][12] = 0
4401 11:04:05.938617 tx_first_pass[0][1][12] = 0
4402 11:04:05.942257 tx_last_pass[0][1][12] = 0
4403 11:04:05.945391 tx_win_center[0][1][13] = 0
4404 11:04:05.948731 tx_first_pass[0][1][13] = 0
4405 11:04:05.948807 tx_last_pass[0][1][13] = 0
4406 11:04:05.952167 tx_win_center[0][1][14] = 0
4407 11:04:05.955311 tx_first_pass[0][1][14] = 0
4408 11:04:05.958790 tx_last_pass[0][1][14] = 0
4409 11:04:05.958900 tx_win_center[0][1][15] = 0
4410 11:04:05.962759 tx_first_pass[0][1][15] = 0
4411 11:04:05.965576 tx_last_pass[0][1][15] = 0
4412 11:04:05.968659 tx_win_center[1][0][0] = 0
4413 11:04:05.968781 tx_first_pass[1][0][0] = 0
4414 11:04:05.972247 tx_last_pass[1][0][0] = 0
4415 11:04:05.975663 tx_win_center[1][0][1] = 0
4416 11:04:05.978801 tx_first_pass[1][0][1] = 0
4417 11:04:05.978931 tx_last_pass[1][0][1] = 0
4418 11:04:05.982463 tx_win_center[1][0][2] = 0
4419 11:04:05.985547 tx_first_pass[1][0][2] = 0
4420 11:04:05.985658 tx_last_pass[1][0][2] = 0
4421 11:04:05.989135 tx_win_center[1][0][3] = 0
4422 11:04:05.992488 tx_first_pass[1][0][3] = 0
4423 11:04:05.995736 tx_last_pass[1][0][3] = 0
4424 11:04:05.995814 tx_win_center[1][0][4] = 0
4425 11:04:05.999295 tx_first_pass[1][0][4] = 0
4426 11:04:06.002114 tx_last_pass[1][0][4] = 0
4427 11:04:06.002191 tx_win_center[1][0][5] = 0
4428 11:04:06.005443 tx_first_pass[1][0][5] = 0
4429 11:04:06.009093 tx_last_pass[1][0][5] = 0
4430 11:04:06.012105 tx_win_center[1][0][6] = 0
4431 11:04:06.012181 tx_first_pass[1][0][6] = 0
4432 11:04:06.015690 tx_last_pass[1][0][6] = 0
4433 11:04:06.019051 tx_win_center[1][0][7] = 0
4434 11:04:06.022463 tx_first_pass[1][0][7] = 0
4435 11:04:06.022539 tx_last_pass[1][0][7] = 0
4436 11:04:06.025565 tx_win_center[1][0][8] = 0
4437 11:04:06.029032 tx_first_pass[1][0][8] = 0
4438 11:04:06.029107 tx_last_pass[1][0][8] = 0
4439 11:04:06.032874 tx_win_center[1][0][9] = 0
4440 11:04:06.035601 tx_first_pass[1][0][9] = 0
4441 11:04:06.038900 tx_last_pass[1][0][9] = 0
4442 11:04:06.038969 tx_win_center[1][0][10] = 0
4443 11:04:06.042399 tx_first_pass[1][0][10] = 0
4444 11:04:06.045586 tx_last_pass[1][0][10] = 0
4445 11:04:06.049082 tx_win_center[1][0][11] = 0
4446 11:04:06.049172 tx_first_pass[1][0][11] = 0
4447 11:04:06.052385 tx_last_pass[1][0][11] = 0
4448 11:04:06.055611 tx_win_center[1][0][12] = 0
4449 11:04:06.059029 tx_first_pass[1][0][12] = 0
4450 11:04:06.059157 tx_last_pass[1][0][12] = 0
4451 11:04:06.062224 tx_win_center[1][0][13] = 0
4452 11:04:06.065690 tx_first_pass[1][0][13] = 0
4453 11:04:06.068853 tx_last_pass[1][0][13] = 0
4454 11:04:06.068927 tx_win_center[1][0][14] = 0
4455 11:04:06.072340 tx_first_pass[1][0][14] = 0
4456 11:04:06.075728 tx_last_pass[1][0][14] = 0
4457 11:04:06.079032 tx_win_center[1][0][15] = 0
4458 11:04:06.079107 tx_first_pass[1][0][15] = 0
4459 11:04:06.082168 tx_last_pass[1][0][15] = 0
4460 11:04:06.085393 tx_win_center[1][1][0] = 0
4461 11:04:06.089168 tx_first_pass[1][1][0] = 0
4462 11:04:06.089289 tx_last_pass[1][1][0] = 0
4463 11:04:06.092127 tx_win_center[1][1][1] = 0
4464 11:04:06.095664 tx_first_pass[1][1][1] = 0
4465 11:04:06.095754 tx_last_pass[1][1][1] = 0
4466 11:04:06.098867 tx_win_center[1][1][2] = 0
4467 11:04:06.102232 tx_first_pass[1][1][2] = 0
4468 11:04:06.105562 tx_last_pass[1][1][2] = 0
4469 11:04:06.105669 tx_win_center[1][1][3] = 0
4470 11:04:06.108778 tx_first_pass[1][1][3] = 0
4471 11:04:06.112433 tx_last_pass[1][1][3] = 0
4472 11:04:06.112508 tx_win_center[1][1][4] = 0
4473 11:04:06.115407 tx_first_pass[1][1][4] = 0
4474 11:04:06.118870 tx_last_pass[1][1][4] = 0
4475 11:04:06.122549 tx_win_center[1][1][5] = 0
4476 11:04:06.122624 tx_first_pass[1][1][5] = 0
4477 11:04:06.125829 tx_last_pass[1][1][5] = 0
4478 11:04:06.128988 tx_win_center[1][1][6] = 0
4479 11:04:06.132396 tx_first_pass[1][1][6] = 0
4480 11:04:06.132470 tx_last_pass[1][1][6] = 0
4481 11:04:06.136170 tx_win_center[1][1][7] = 0
4482 11:04:06.138876 tx_first_pass[1][1][7] = 0
4483 11:04:06.138951 tx_last_pass[1][1][7] = 0
4484 11:04:06.142159 tx_win_center[1][1][8] = 0
4485 11:04:06.145768 tx_first_pass[1][1][8] = 0
4486 11:04:06.148948 tx_last_pass[1][1][8] = 0
4487 11:04:06.149023 tx_win_center[1][1][9] = 0
4488 11:04:06.152516 tx_first_pass[1][1][9] = 0
4489 11:04:06.155911 tx_last_pass[1][1][9] = 0
4490 11:04:06.155986 tx_win_center[1][1][10] = 0
4491 11:04:06.158921 tx_first_pass[1][1][10] = 0
4492 11:04:06.162406 tx_last_pass[1][1][10] = 0
4493 11:04:06.166319 tx_win_center[1][1][11] = 0
4494 11:04:06.166394 tx_first_pass[1][1][11] = 0
4495 11:04:06.169073 tx_last_pass[1][1][11] = 0
4496 11:04:06.172431 tx_win_center[1][1][12] = 0
4497 11:04:06.176283 tx_first_pass[1][1][12] = 0
4498 11:04:06.176358 tx_last_pass[1][1][12] = 0
4499 11:04:06.179365 tx_win_center[1][1][13] = 0
4500 11:04:06.182799 tx_first_pass[1][1][13] = 0
4501 11:04:06.186124 tx_last_pass[1][1][13] = 0
4502 11:04:06.186198 tx_win_center[1][1][14] = 0
4503 11:04:06.189379 tx_first_pass[1][1][14] = 0
4504 11:04:06.192902 tx_last_pass[1][1][14] = 0
4505 11:04:06.195952 tx_win_center[1][1][15] = 0
4506 11:04:06.196030 tx_first_pass[1][1][15] = 0
4507 11:04:06.199397 tx_last_pass[1][1][15] = 0
4508 11:04:06.203199 dump params rx window
4509 11:04:06.203274 rx_firspass[0][0][0] = 0
4510 11:04:06.206350 rx_lastpass[0][0][0] = 0
4511 11:04:06.209422 rx_firspass[0][0][1] = 0
4512 11:04:06.209497 rx_lastpass[0][0][1] = 0
4513 11:04:06.212756 rx_firspass[0][0][2] = 0
4514 11:04:06.215968 rx_lastpass[0][0][2] = 0
4515 11:04:06.216043 rx_firspass[0][0][3] = 0
4516 11:04:06.219503 rx_lastpass[0][0][3] = 0
4517 11:04:06.222670 rx_firspass[0][0][4] = 0
4518 11:04:06.226329 rx_lastpass[0][0][4] = 0
4519 11:04:06.226404 rx_firspass[0][0][5] = 0
4520 11:04:06.229540 rx_lastpass[0][0][5] = 0
4521 11:04:06.232894 rx_firspass[0][0][6] = 0
4522 11:04:06.232995 rx_lastpass[0][0][6] = 0
4523 11:04:06.236376 rx_firspass[0][0][7] = 0
4524 11:04:06.239693 rx_lastpass[0][0][7] = 0
4525 11:04:06.239768 rx_firspass[0][0][8] = 0
4526 11:04:06.243005 rx_lastpass[0][0][8] = 0
4527 11:04:06.246424 rx_firspass[0][0][9] = 0
4528 11:04:06.246522 rx_lastpass[0][0][9] = 0
4529 11:04:06.249904 rx_firspass[0][0][10] = 0
4530 11:04:06.253160 rx_lastpass[0][0][10] = 0
4531 11:04:06.253259 rx_firspass[0][0][11] = 0
4532 11:04:06.256393 rx_lastpass[0][0][11] = 0
4533 11:04:06.259619 rx_firspass[0][0][12] = 0
4534 11:04:06.263073 rx_lastpass[0][0][12] = 0
4535 11:04:06.263164 rx_firspass[0][0][13] = 0
4536 11:04:06.266485 rx_lastpass[0][0][13] = 0
4537 11:04:06.269430 rx_firspass[0][0][14] = 0
4538 11:04:06.269521 rx_lastpass[0][0][14] = 0
4539 11:04:06.272912 rx_firspass[0][0][15] = 0
4540 11:04:06.276253 rx_lastpass[0][0][15] = 0
4541 11:04:06.279724 rx_firspass[0][1][0] = 0
4542 11:04:06.279816 rx_lastpass[0][1][0] = 0
4543 11:04:06.282794 rx_firspass[0][1][1] = 0
4544 11:04:06.286228 rx_lastpass[0][1][1] = 0
4545 11:04:06.286319 rx_firspass[0][1][2] = 0
4546 11:04:06.289874 rx_lastpass[0][1][2] = 0
4547 11:04:06.293208 rx_firspass[0][1][3] = 0
4548 11:04:06.293358 rx_lastpass[0][1][3] = 0
4549 11:04:06.296100 rx_firspass[0][1][4] = 0
4550 11:04:06.299570 rx_lastpass[0][1][4] = 0
4551 11:04:06.299661 rx_firspass[0][1][5] = 0
4552 11:04:06.302599 rx_lastpass[0][1][5] = 0
4553 11:04:06.306116 rx_firspass[0][1][6] = 0
4554 11:04:06.306190 rx_lastpass[0][1][6] = 0
4555 11:04:06.309399 rx_firspass[0][1][7] = 0
4556 11:04:06.312783 rx_lastpass[0][1][7] = 0
4557 11:04:06.316219 rx_firspass[0][1][8] = 0
4558 11:04:06.316310 rx_lastpass[0][1][8] = 0
4559 11:04:06.319594 rx_firspass[0][1][9] = 0
4560 11:04:06.322854 rx_lastpass[0][1][9] = 0
4561 11:04:06.322946 rx_firspass[0][1][10] = 0
4562 11:04:06.326062 rx_lastpass[0][1][10] = 0
4563 11:04:06.329570 rx_firspass[0][1][11] = 0
4564 11:04:06.329659 rx_lastpass[0][1][11] = 0
4565 11:04:06.333055 rx_firspass[0][1][12] = 0
4566 11:04:06.336240 rx_lastpass[0][1][12] = 0
4567 11:04:06.339542 rx_firspass[0][1][13] = 0
4568 11:04:06.339658 rx_lastpass[0][1][13] = 0
4569 11:04:06.342709 rx_firspass[0][1][14] = 0
4570 11:04:06.346191 rx_lastpass[0][1][14] = 0
4571 11:04:06.346283 rx_firspass[0][1][15] = 0
4572 11:04:06.349499 rx_lastpass[0][1][15] = 0
4573 11:04:06.352781 rx_firspass[1][0][0] = 0
4574 11:04:06.352872 rx_lastpass[1][0][0] = 0
4575 11:04:06.356185 rx_firspass[1][0][1] = 0
4576 11:04:06.359626 rx_lastpass[1][0][1] = 0
4577 11:04:06.362883 rx_firspass[1][0][2] = 0
4578 11:04:06.362974 rx_lastpass[1][0][2] = 0
4579 11:04:06.366297 rx_firspass[1][0][3] = 0
4580 11:04:06.369505 rx_lastpass[1][0][3] = 0
4581 11:04:06.369596 rx_firspass[1][0][4] = 0
4582 11:04:06.372852 rx_lastpass[1][0][4] = 0
4583 11:04:06.376894 rx_firspass[1][0][5] = 0
4584 11:04:06.376986 rx_lastpass[1][0][5] = 0
4585 11:04:06.379774 rx_firspass[1][0][6] = 0
4586 11:04:06.382926 rx_lastpass[1][0][6] = 0
4587 11:04:06.383017 rx_firspass[1][0][7] = 0
4588 11:04:06.386288 rx_lastpass[1][0][7] = 0
4589 11:04:06.389601 rx_firspass[1][0][8] = 0
4590 11:04:06.389675 rx_lastpass[1][0][8] = 0
4591 11:04:06.392894 rx_firspass[1][0][9] = 0
4592 11:04:06.396384 rx_lastpass[1][0][9] = 0
4593 11:04:06.396475 rx_firspass[1][0][10] = 0
4594 11:04:06.399818 rx_lastpass[1][0][10] = 0
4595 11:04:06.402985 rx_firspass[1][0][11] = 0
4596 11:04:06.406430 rx_lastpass[1][0][11] = 0
4597 11:04:06.406522 rx_firspass[1][0][12] = 0
4598 11:04:06.409677 rx_lastpass[1][0][12] = 0
4599 11:04:06.413245 rx_firspass[1][0][13] = 0
4600 11:04:06.413352 rx_lastpass[1][0][13] = 0
4601 11:04:06.416427 rx_firspass[1][0][14] = 0
4602 11:04:06.419696 rx_lastpass[1][0][14] = 0
4603 11:04:06.422906 rx_firspass[1][0][15] = 0
4604 11:04:06.422998 rx_lastpass[1][0][15] = 0
4605 11:04:06.426493 rx_firspass[1][1][0] = 0
4606 11:04:06.429747 rx_lastpass[1][1][0] = 0
4607 11:04:06.429839 rx_firspass[1][1][1] = 0
4608 11:04:06.433191 rx_lastpass[1][1][1] = 0
4609 11:04:06.436470 rx_firspass[1][1][2] = 0
4610 11:04:06.436559 rx_lastpass[1][1][2] = 0
4611 11:04:06.439777 rx_firspass[1][1][3] = 0
4612 11:04:06.443266 rx_lastpass[1][1][3] = 0
4613 11:04:06.443357 rx_firspass[1][1][4] = 0
4614 11:04:06.446603 rx_lastpass[1][1][4] = 0
4615 11:04:06.449608 rx_firspass[1][1][5] = 0
4616 11:04:06.449700 rx_lastpass[1][1][5] = 0
4617 11:04:06.453161 rx_firspass[1][1][6] = 0
4618 11:04:06.456611 rx_lastpass[1][1][6] = 0
4619 11:04:06.460087 rx_firspass[1][1][7] = 0
4620 11:04:06.460177 rx_lastpass[1][1][7] = 0
4621 11:04:06.463173 rx_firspass[1][1][8] = 0
4622 11:04:06.466563 rx_lastpass[1][1][8] = 0
4623 11:04:06.466654 rx_firspass[1][1][9] = 0
4624 11:04:06.470138 rx_lastpass[1][1][9] = 0
4625 11:04:06.473404 rx_firspass[1][1][10] = 0
4626 11:04:06.473496 rx_lastpass[1][1][10] = 0
4627 11:04:06.476458 rx_firspass[1][1][11] = 0
4628 11:04:06.480087 rx_lastpass[1][1][11] = 0
4629 11:04:06.480177 rx_firspass[1][1][12] = 0
4630 11:04:06.483410 rx_lastpass[1][1][12] = 0
4631 11:04:06.486655 rx_firspass[1][1][13] = 0
4632 11:04:06.490338 rx_lastpass[1][1][13] = 0
4633 11:04:06.490430 rx_firspass[1][1][14] = 0
4634 11:04:06.493243 rx_lastpass[1][1][14] = 0
4635 11:04:06.497127 rx_firspass[1][1][15] = 0
4636 11:04:06.497204 rx_lastpass[1][1][15] = 0
4637 11:04:06.500118 dump params clk_delay
4638 11:04:06.500210 clk_delay[0] = 0
4639 11:04:06.503405 clk_delay[1] = 0
4640 11:04:06.506931 dump params dqs_delay
4641 11:04:06.507006 dqs_delay[0][0] = 0
4642 11:04:06.510358 dqs_delay[0][1] = 0
4643 11:04:06.510464 dqs_delay[1][0] = 0
4644 11:04:06.513565 dqs_delay[1][1] = 0
4645 11:04:06.517079 dump params delay_cell_unit = 753
4646 11:04:06.517177 dump source = 0x0
4647 11:04:06.520464 dump params frequency:800
4648 11:04:06.520538 dump params rank number:2
4649 11:04:06.523799
4650 11:04:06.523876 dump params write leveling
4651 11:04:06.526893 write leveling[0][0][0] = 0x0
4652 11:04:06.530195 write leveling[0][0][1] = 0x0
4653 11:04:06.533645 write leveling[0][1][0] = 0x0
4654 11:04:06.533729 write leveling[0][1][1] = 0x0
4655 11:04:06.537099 write leveling[1][0][0] = 0x0
4656 11:04:06.540763 write leveling[1][0][1] = 0x0
4657 11:04:06.543818 write leveling[1][1][0] = 0x0
4658 11:04:06.547204 write leveling[1][1][1] = 0x0
4659 11:04:06.547324 dump params cbt_cs
4660 11:04:06.550633 cbt_cs[0][0] = 0x0
4661 11:04:06.550708 cbt_cs[0][1] = 0x0
4662 11:04:06.553685 cbt_cs[1][0] = 0x0
4663 11:04:06.553764 cbt_cs[1][1] = 0x0
4664 11:04:06.556946 dump params cbt_mr12
4665 11:04:06.557021 cbt_mr12[0][0] = 0x0
4666 11:04:06.560393 cbt_mr12[0][1] = 0x0
4667 11:04:06.560471 cbt_mr12[1][0] = 0x0
4668 11:04:06.563610 cbt_mr12[1][1] = 0x0
4669 11:04:06.566907 dump params tx window
4670 11:04:06.567009 tx_center_min[0][0][0] = 0
4671 11:04:06.570436 tx_center_max[0][0][0] = 0
4672 11:04:06.573640 tx_center_min[0][0][1] = 0
4673 11:04:06.577078 tx_center_max[0][0][1] = 0
4674 11:04:06.577152 tx_center_min[0][1][0] = 0
4675 11:04:06.580703 tx_center_max[0][1][0] = 0
4676 11:04:06.584188 tx_center_min[0][1][1] = 0
4677 11:04:06.586994 tx_center_max[0][1][1] = 0
4678 11:04:06.587070 tx_center_min[1][0][0] = 0
4679 11:04:06.590378 tx_center_max[1][0][0] = 0
4680 11:04:06.593837 tx_center_min[1][0][1] = 0
4681 11:04:06.593915 tx_center_max[1][0][1] = 0
4682 11:04:06.597382 tx_center_min[1][1][0] = 0
4683 11:04:06.600527 tx_center_max[1][1][0] = 0
4684 11:04:06.603723 tx_center_min[1][1][1] = 0
4685 11:04:06.603799 tx_center_max[1][1][1] = 0
4686 11:04:06.607175 dump params tx window
4687 11:04:06.610722 tx_win_center[0][0][0] = 0
4688 11:04:06.610797 tx_first_pass[0][0][0] = 0
4689 11:04:06.613930 tx_last_pass[0][0][0] = 0
4690 11:04:06.617260 tx_win_center[0][0][1] = 0
4691 11:04:06.620462 tx_first_pass[0][0][1] = 0
4692 11:04:06.620540 tx_last_pass[0][0][1] = 0
4693 11:04:06.623767 tx_win_center[0][0][2] = 0
4694 11:04:06.627280 tx_first_pass[0][0][2] = 0
4695 11:04:06.630360 tx_last_pass[0][0][2] = 0
4696 11:04:06.630457 tx_win_center[0][0][3] = 0
4697 11:04:06.634074 tx_first_pass[0][0][3] = 0
4698 11:04:06.637139 tx_last_pass[0][0][3] = 0
4699 11:04:06.637281 tx_win_center[0][0][4] = 0
4700 11:04:06.640548 tx_first_pass[0][0][4] = 0
4701 11:04:06.643746 tx_last_pass[0][0][4] = 0
4702 11:04:06.647198 tx_win_center[0][0][5] = 0
4703 11:04:06.647289 tx_first_pass[0][0][5] = 0
4704 11:04:06.650627 tx_last_pass[0][0][5] = 0
4705 11:04:06.653750 tx_win_center[0][0][6] = 0
4706 11:04:06.653841 tx_first_pass[0][0][6] = 0
4707 11:04:06.657359 tx_last_pass[0][0][6] = 0
4708 11:04:06.660664 tx_win_center[0][0][7] = 0
4709 11:04:06.664110 tx_first_pass[0][0][7] = 0
4710 11:04:06.664203 tx_last_pass[0][0][7] = 0
4711 11:04:06.667435 tx_win_center[0][0][8] = 0
4712 11:04:06.670822 tx_first_pass[0][0][8] = 0
4713 11:04:06.670914 tx_last_pass[0][0][8] = 0
4714 11:04:06.674381 tx_win_center[0][0][9] = 0
4715 11:04:06.677398 tx_first_pass[0][0][9] = 0
4716 11:04:06.680830 tx_last_pass[0][0][9] = 0
4717 11:04:06.680905 tx_win_center[0][0][10] = 0
4718 11:04:06.684414 tx_first_pass[0][0][10] = 0
4719 11:04:06.687565 tx_last_pass[0][0][10] = 0
4720 11:04:06.691254 tx_win_center[0][0][11] = 0
4721 11:04:06.691331 tx_first_pass[0][0][11] = 0
4722 11:04:06.693860 tx_last_pass[0][0][11] = 0
4723 11:04:06.697357 tx_win_center[0][0][12] = 0
4724 11:04:06.700442 tx_first_pass[0][0][12] = 0
4725 11:04:06.700509 tx_last_pass[0][0][12] = 0
4726 11:04:06.704070 tx_win_center[0][0][13] = 0
4727 11:04:06.707524 tx_first_pass[0][0][13] = 0
4728 11:04:06.710801 tx_last_pass[0][0][13] = 0
4729 11:04:06.710870 tx_win_center[0][0][14] = 0
4730 11:04:06.713995 tx_first_pass[0][0][14] = 0
4731 11:04:06.717293 tx_last_pass[0][0][14] = 0
4732 11:04:06.721083 tx_win_center[0][0][15] = 0
4733 11:04:06.721172 tx_first_pass[0][0][15] = 0
4734 11:04:06.724171 tx_last_pass[0][0][15] = 0
4735 11:04:06.727769 tx_win_center[0][1][0] = 0
4736 11:04:06.730848 tx_first_pass[0][1][0] = 0
4737 11:04:06.730914 tx_last_pass[0][1][0] = 0
4738 11:04:06.734051 tx_win_center[0][1][1] = 0
4739 11:04:06.737353 tx_first_pass[0][1][1] = 0
4740 11:04:06.737441 tx_last_pass[0][1][1] = 0
4741 11:04:06.741303 tx_win_center[0][1][2] = 0
4742 11:04:06.744021 tx_first_pass[0][1][2] = 0
4743 11:04:06.747523 tx_last_pass[0][1][2] = 0
4744 11:04:06.747599 tx_win_center[0][1][3] = 0
4745 11:04:06.751023 tx_first_pass[0][1][3] = 0
4746 11:04:06.754199 tx_last_pass[0][1][3] = 0
4747 11:04:06.754275 tx_win_center[0][1][4] = 0
4748 11:04:06.757903 tx_first_pass[0][1][4] = 0
4749 11:04:06.761018 tx_last_pass[0][1][4] = 0
4750 11:04:06.764526 tx_win_center[0][1][5] = 0
4751 11:04:06.764602 tx_first_pass[0][1][5] = 0
4752 11:04:06.767663 tx_last_pass[0][1][5] = 0
4753 11:04:06.771056 tx_win_center[0][1][6] = 0
4754 11:04:06.774230 tx_first_pass[0][1][6] = 0
4755 11:04:06.774306 tx_last_pass[0][1][6] = 0
4756 11:04:06.777851 tx_win_center[0][1][7] = 0
4757 11:04:06.780885 tx_first_pass[0][1][7] = 0
4758 11:04:06.780983 tx_last_pass[0][1][7] = 0
4759 11:04:06.784338 tx_win_center[0][1][8] = 0
4760 11:04:06.787652 tx_first_pass[0][1][8] = 0
4761 11:04:06.790956 tx_last_pass[0][1][8] = 0
4762 11:04:06.791032 tx_win_center[0][1][9] = 0
4763 11:04:06.794610 tx_first_pass[0][1][9] = 0
4764 11:04:06.797587 tx_last_pass[0][1][9] = 0
4765 11:04:06.797663 tx_win_center[0][1][10] = 0
4766 11:04:06.801050 tx_first_pass[0][1][10] = 0
4767 11:04:06.804549 tx_last_pass[0][1][10] = 0
4768 11:04:06.807728 tx_win_center[0][1][11] = 0
4769 11:04:06.807830 tx_first_pass[0][1][11] = 0
4770 11:04:06.811303 tx_last_pass[0][1][11] = 0
4771 11:04:06.814766 tx_win_center[0][1][12] = 0
4772 11:04:06.817910 tx_first_pass[0][1][12] = 0
4773 11:04:06.818021 tx_last_pass[0][1][12] = 0
4774 11:04:06.821463 tx_win_center[0][1][13] = 0
4775 11:04:06.824892 tx_first_pass[0][1][13] = 0
4776 11:04:06.827971 tx_last_pass[0][1][13] = 0
4777 11:04:06.828046 tx_win_center[0][1][14] = 0
4778 11:04:06.831255 tx_first_pass[0][1][14] = 0
4779 11:04:06.834819 tx_last_pass[0][1][14] = 0
4780 11:04:06.838287 tx_win_center[0][1][15] = 0
4781 11:04:06.838362 tx_first_pass[0][1][15] = 0
4782 11:04:06.841472 tx_last_pass[0][1][15] = 0
4783 11:04:06.844851 tx_win_center[1][0][0] = 0
4784 11:04:06.848180 tx_first_pass[1][0][0] = 0
4785 11:04:06.848255 tx_last_pass[1][0][0] = 0
4786 11:04:06.851343 tx_win_center[1][0][1] = 0
4787 11:04:06.854926 tx_first_pass[1][0][1] = 0
4788 11:04:06.855001 tx_last_pass[1][0][1] = 0
4789 11:04:06.858105 tx_win_center[1][0][2] = 0
4790 11:04:06.861430 tx_first_pass[1][0][2] = 0
4791 11:04:06.865098 tx_last_pass[1][0][2] = 0
4792 11:04:06.865174 tx_win_center[1][0][3] = 0
4793 11:04:06.868341 tx_first_pass[1][0][3] = 0
4794 11:04:06.871691 tx_last_pass[1][0][3] = 0
4795 11:04:06.874761 tx_win_center[1][0][4] = 0
4796 11:04:06.874836 tx_first_pass[1][0][4] = 0
4797 11:04:06.878175 tx_last_pass[1][0][4] = 0
4798 11:04:06.881474 tx_win_center[1][0][5] = 0
4799 11:04:06.881549 tx_first_pass[1][0][5] = 0
4800 11:04:06.884932 tx_last_pass[1][0][5] = 0
4801 11:04:06.888254 tx_win_center[1][0][6] = 0
4802 11:04:06.891530 tx_first_pass[1][0][6] = 0
4803 11:04:06.891606 tx_last_pass[1][0][6] = 0
4804 11:04:06.895234 tx_win_center[1][0][7] = 0
4805 11:04:06.898605 tx_first_pass[1][0][7] = 0
4806 11:04:06.898681 tx_last_pass[1][0][7] = 0
4807 11:04:06.901625 tx_win_center[1][0][8] = 0
4808 11:04:06.905151 tx_first_pass[1][0][8] = 0
4809 11:04:06.908387 tx_last_pass[1][0][8] = 0
4810 11:04:06.908463 tx_win_center[1][0][9] = 0
4811 11:04:06.911707 tx_first_pass[1][0][9] = 0
4812 11:04:06.914990 tx_last_pass[1][0][9] = 0
4813 11:04:06.918403 tx_win_center[1][0][10] = 0
4814 11:04:06.918479 tx_first_pass[1][0][10] = 0
4815 11:04:06.921438 tx_last_pass[1][0][10] = 0
4816 11:04:06.924906 tx_win_center[1][0][11] = 0
4817 11:04:06.928497 tx_first_pass[1][0][11] = 0
4818 11:04:06.928573 tx_last_pass[1][0][11] = 0
4819 11:04:06.931703 tx_win_center[1][0][12] = 0
4820 11:04:06.935301 tx_first_pass[1][0][12] = 0
4821 11:04:06.935377 tx_last_pass[1][0][12] = 0
4822 11:04:06.938221 tx_win_center[1][0][13] = 0
4823 11:04:06.942004 tx_first_pass[1][0][13] = 0
4824 11:04:06.945452 tx_last_pass[1][0][13] = 0
4825 11:04:06.945521 tx_win_center[1][0][14] = 0
4826 11:04:06.948777 tx_first_pass[1][0][14] = 0
4827 11:04:06.951676 tx_last_pass[1][0][14] = 0
4828 11:04:06.955056 tx_win_center[1][0][15] = 0
4829 11:04:06.955148 tx_first_pass[1][0][15] = 0
4830 11:04:06.958453 tx_last_pass[1][0][15] = 0
4831 11:04:06.961820 tx_win_center[1][1][0] = 0
4832 11:04:06.965317 tx_first_pass[1][1][0] = 0
4833 11:04:06.965414 tx_last_pass[1][1][0] = 0
4834 11:04:06.968728 tx_win_center[1][1][1] = 0
4835 11:04:06.971900 tx_first_pass[1][1][1] = 0
4836 11:04:06.975033 tx_last_pass[1][1][1] = 0
4837 11:04:06.975144 tx_win_center[1][1][2] = 0
4838 11:04:06.978576 tx_first_pass[1][1][2] = 0
4839 11:04:06.981951 tx_last_pass[1][1][2] = 0
4840 11:04:06.982055 tx_win_center[1][1][3] = 0
4841 11:04:06.985278 tx_first_pass[1][1][3] = 0
4842 11:04:06.988451 tx_last_pass[1][1][3] = 0
4843 11:04:06.992100 tx_win_center[1][1][4] = 0
4844 11:04:06.992188 tx_first_pass[1][1][4] = 0
4845 11:04:06.995199 tx_last_pass[1][1][4] = 0
4846 11:04:06.998778 tx_win_center[1][1][5] = 0
4847 11:04:07.001854 tx_first_pass[1][1][5] = 0
4848 11:04:07.001943 tx_last_pass[1][1][5] = 0
4849 11:04:07.005079 tx_win_center[1][1][6] = 0
4850 11:04:07.008523 tx_first_pass[1][1][6] = 0
4851 11:04:07.008612 tx_last_pass[1][1][6] = 0
4852 11:04:07.011692 tx_win_center[1][1][7] = 0
4853 11:04:07.015304 tx_first_pass[1][1][7] = 0
4854 11:04:07.018853 tx_last_pass[1][1][7] = 0
4855 11:04:07.018914 tx_win_center[1][1][8] = 0
4856 11:04:07.021802 tx_first_pass[1][1][8] = 0
4857 11:04:07.025208 tx_last_pass[1][1][8] = 0
4858 11:04:07.025312 tx_win_center[1][1][9] = 0
4859 11:04:07.028561 tx_first_pass[1][1][9] = 0
4860 11:04:07.032071 tx_last_pass[1][1][9] = 0
4861 11:04:07.035619 tx_win_center[1][1][10] = 0
4862 11:04:07.035703 tx_first_pass[1][1][10] = 0
4863 11:04:07.038578 tx_last_pass[1][1][10] = 0
4864 11:04:07.041791 tx_win_center[1][1][11] = 0
4865 11:04:07.045514 tx_first_pass[1][1][11] = 0
4866 11:04:07.045587 tx_last_pass[1][1][11] = 0
4867 11:04:07.048717 tx_win_center[1][1][12] = 0
4868 11:04:07.052316 tx_first_pass[1][1][12] = 0
4869 11:04:07.055402 tx_last_pass[1][1][12] = 0
4870 11:04:07.055489 tx_win_center[1][1][13] = 0
4871 11:04:07.059057 tx_first_pass[1][1][13] = 0
4872 11:04:07.062045 tx_last_pass[1][1][13] = 0
4873 11:04:07.065539 tx_win_center[1][1][14] = 0
4874 11:04:07.065604 tx_first_pass[1][1][14] = 0
4875 11:04:07.068847 tx_last_pass[1][1][14] = 0
4876 11:04:07.072586 tx_win_center[1][1][15] = 0
4877 11:04:07.075539 tx_first_pass[1][1][15] = 0
4878 11:04:07.075618 tx_last_pass[1][1][15] = 0
4879 11:04:07.078971 dump params rx window
4880 11:04:07.082549 rx_firspass[0][0][0] = 0
4881 11:04:07.082645 rx_lastpass[0][0][0] = 0
4882 11:04:07.085810 rx_firspass[0][0][1] = 0
4883 11:04:07.089349 rx_lastpass[0][0][1] = 0
4884 11:04:07.089420 rx_firspass[0][0][2] = 0
4885 11:04:07.092561 rx_lastpass[0][0][2] = 0
4886 11:04:07.095913 rx_firspass[0][0][3] = 0
4887 11:04:07.096007 rx_lastpass[0][0][3] = 0
4888 11:04:07.099632 rx_firspass[0][0][4] = 0
4889 11:04:07.102762 rx_lastpass[0][0][4] = 0
4890 11:04:07.102839 rx_firspass[0][0][5] = 0
4891 11:04:07.106040 rx_lastpass[0][0][5] = 0
4892 11:04:07.109209 rx_firspass[0][0][6] = 0
4893 11:04:07.109290 rx_lastpass[0][0][6] = 0
4894 11:04:07.112656 rx_firspass[0][0][7] = 0
4895 11:04:07.116167 rx_lastpass[0][0][7] = 0
4896 11:04:07.116244 rx_firspass[0][0][8] = 0
4897 11:04:07.119517 rx_lastpass[0][0][8] = 0
4898 11:04:07.122814 rx_firspass[0][0][9] = 0
4899 11:04:07.122892 rx_lastpass[0][0][9] = 0
4900 11:04:07.126274 rx_firspass[0][0][10] = 0
4901 11:04:07.129424 rx_lastpass[0][0][10] = 0
4902 11:04:07.132518 rx_firspass[0][0][11] = 0
4903 11:04:07.132611 rx_lastpass[0][0][11] = 0
4904 11:04:07.135952 rx_firspass[0][0][12] = 0
4905 11:04:07.139535 rx_lastpass[0][0][12] = 0
4906 11:04:07.139608 rx_firspass[0][0][13] = 0
4907 11:04:07.142788 rx_lastpass[0][0][13] = 0
4908 11:04:07.146125 rx_firspass[0][0][14] = 0
4909 11:04:07.149339 rx_lastpass[0][0][14] = 0
4910 11:04:07.149411 rx_firspass[0][0][15] = 0
4911 11:04:07.152798 rx_lastpass[0][0][15] = 0
4912 11:04:07.156393 rx_firspass[0][1][0] = 0
4913 11:04:07.156486 rx_lastpass[0][1][0] = 0
4914 11:04:07.159545 rx_firspass[0][1][1] = 0
4915 11:04:07.162726 rx_lastpass[0][1][1] = 0
4916 11:04:07.162815 rx_firspass[0][1][2] = 0
4917 11:04:07.166146 rx_lastpass[0][1][2] = 0
4918 11:04:07.169705 rx_firspass[0][1][3] = 0
4919 11:04:07.169767 rx_lastpass[0][1][3] = 0
4920 11:04:07.172787 rx_firspass[0][1][4] = 0
4921 11:04:07.176561 rx_lastpass[0][1][4] = 0
4922 11:04:07.176646 rx_firspass[0][1][5] = 0
4923 11:04:07.179582 rx_lastpass[0][1][5] = 0
4924 11:04:07.182979 rx_firspass[0][1][6] = 0
4925 11:04:07.183070 rx_lastpass[0][1][6] = 0
4926 11:04:07.186265 rx_firspass[0][1][7] = 0
4927 11:04:07.189870 rx_lastpass[0][1][7] = 0
4928 11:04:07.189944 rx_firspass[0][1][8] = 0
4929 11:04:07.192886 rx_lastpass[0][1][8] = 0
4930 11:04:07.196370 rx_firspass[0][1][9] = 0
4931 11:04:07.200092 rx_lastpass[0][1][9] = 0
4932 11:04:07.200185 rx_firspass[0][1][10] = 0
4933 11:04:07.203056 rx_lastpass[0][1][10] = 0
4934 11:04:07.206619 rx_firspass[0][1][11] = 0
4935 11:04:07.206728 rx_lastpass[0][1][11] = 0
4936 11:04:07.209934 rx_firspass[0][1][12] = 0
4937 11:04:07.213140 rx_lastpass[0][1][12] = 0
4938 11:04:07.213271 rx_firspass[0][1][13] = 0
4939 11:04:07.216688 rx_lastpass[0][1][13] = 0
4940 11:04:07.219726 rx_firspass[0][1][14] = 0
4941 11:04:07.223012 rx_lastpass[0][1][14] = 0
4942 11:04:07.223083 rx_firspass[0][1][15] = 0
4943 11:04:07.226678 rx_lastpass[0][1][15] = 0
4944 11:04:07.230077 rx_firspass[1][0][0] = 0
4945 11:04:07.230148 rx_lastpass[1][0][0] = 0
4946 11:04:07.233281 rx_firspass[1][0][1] = 0
4947 11:04:07.237133 rx_lastpass[1][0][1] = 0
4948 11:04:07.237252 rx_firspass[1][0][2] = 0
4949 11:04:07.240132 rx_lastpass[1][0][2] = 0
4950 11:04:07.243325 rx_firspass[1][0][3] = 0
4951 11:04:07.246631 rx_lastpass[1][0][3] = 0
4952 11:04:07.246725 rx_firspass[1][0][4] = 0
4953 11:04:07.250147 rx_lastpass[1][0][4] = 0
4954 11:04:07.253518 rx_firspass[1][0][5] = 0
4955 11:04:07.253632 rx_lastpass[1][0][5] = 0
4956 11:04:07.256720 rx_firspass[1][0][6] = 0
4957 11:04:07.259962 rx_lastpass[1][0][6] = 0
4958 11:04:07.260057 rx_firspass[1][0][7] = 0
4959 11:04:07.263523 rx_lastpass[1][0][7] = 0
4960 11:04:07.266905 rx_firspass[1][0][8] = 0
4961 11:04:07.266972 rx_lastpass[1][0][8] = 0
4962 11:04:07.270425 rx_firspass[1][0][9] = 0
4963 11:04:07.273776 rx_lastpass[1][0][9] = 0
4964 11:04:07.273865 rx_firspass[1][0][10] = 0
4965 11:04:07.276891 rx_lastpass[1][0][10] = 0
4966 11:04:07.279981 rx_firspass[1][0][11] = 0
4967 11:04:07.283243 rx_lastpass[1][0][11] = 0
4968 11:04:07.283305 rx_firspass[1][0][12] = 0
4969 11:04:07.286414 rx_lastpass[1][0][12] = 0
4970 11:04:07.289882 rx_firspass[1][0][13] = 0
4971 11:04:07.289948 rx_lastpass[1][0][13] = 0
4972 11:04:07.293221 rx_firspass[1][0][14] = 0
4973 11:04:07.296721 rx_lastpass[1][0][14] = 0
4974 11:04:07.300098 rx_firspass[1][0][15] = 0
4975 11:04:07.300188 rx_lastpass[1][0][15] = 0
4976 11:04:07.303340 rx_firspass[1][1][0] = 0
4977 11:04:07.306623 rx_lastpass[1][1][0] = 0
4978 11:04:07.306713 rx_firspass[1][1][1] = 0
4979 11:04:07.309945 rx_lastpass[1][1][1] = 0
4980 11:04:07.313555 rx_firspass[1][1][2] = 0
4981 11:04:07.313620 rx_lastpass[1][1][2] = 0
4982 11:04:07.317139 rx_firspass[1][1][3] = 0
4983 11:04:07.320194 rx_lastpass[1][1][3] = 0
4984 11:04:07.320260 rx_firspass[1][1][4] = 0
4985 11:04:07.323569 rx_lastpass[1][1][4] = 0
4986 11:04:07.326665 rx_firspass[1][1][5] = 0
4987 11:04:07.326757 rx_lastpass[1][1][5] = 0
4988 11:04:07.329928 rx_firspass[1][1][6] = 0
4989 11:04:07.333387 rx_lastpass[1][1][6] = 0
4990 11:04:07.333454 rx_firspass[1][1][7] = 0
4991 11:04:07.336721 rx_lastpass[1][1][7] = 0
4992 11:04:07.340135 rx_firspass[1][1][8] = 0
4993 11:04:07.343795 rx_lastpass[1][1][8] = 0
4994 11:04:07.343864 rx_firspass[1][1][9] = 0
4995 11:04:07.346651 rx_lastpass[1][1][9] = 0
4996 11:04:07.350200 rx_firspass[1][1][10] = 0
4997 11:04:07.350267 rx_lastpass[1][1][10] = 0
4998 11:04:07.353918 rx_firspass[1][1][11] = 0
4999 11:04:07.357134 rx_lastpass[1][1][11] = 0
5000 11:04:07.357222 rx_firspass[1][1][12] = 0
5001 11:04:07.360022 rx_lastpass[1][1][12] = 0
5002 11:04:07.363992 rx_firspass[1][1][13] = 0
5003 11:04:07.366816 rx_lastpass[1][1][13] = 0
5004 11:04:07.366884 rx_firspass[1][1][14] = 0
5005 11:04:07.370172 rx_lastpass[1][1][14] = 0
5006 11:04:07.373625 rx_firspass[1][1][15] = 0
5007 11:04:07.373718 rx_lastpass[1][1][15] = 0
5008 11:04:07.377147 dump params clk_delay
5009 11:04:07.377272 clk_delay[0] = 0
5010 11:04:07.380181 clk_delay[1] = 0
5011 11:04:07.380268 dump params dqs_delay
5012 11:04:07.383643 dqs_delay[0][0] = 0
5013 11:04:07.386818 dqs_delay[0][1] = 0
5014 11:04:07.386881 dqs_delay[1][0] = 0
5015 11:04:07.390376 dqs_delay[1][1] = 0
5016 11:04:07.393922 dump params delay_cell_unit = 753
5017 11:04:07.393988 mt_set_emi_preloader end
5018 11:04:07.400450 [mt_mem_init] dram size: 0x100000000, rank number: 2
5019 11:04:07.403793 [complex_mem_test] start addr:0x40000000, len:20480
5020 11:04:07.440340 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5021 11:04:07.446944 [complex_mem_test] start addr:0x80000000, len:20480
5022 11:04:07.482888 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5023 11:04:07.489482 [complex_mem_test] start addr:0xc0000000, len:20480
5024 11:04:07.525422 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5025 11:04:07.531671 [complex_mem_test] start addr:0x56000000, len:8192
5026 11:04:07.548145 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5027 11:04:07.548244 ddr_geometry:1
5028 11:04:07.555158 [complex_mem_test] start addr:0x80000000, len:8192
5029 11:04:07.572153 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5030 11:04:07.575615 dram_init: dram init end (result: 0)
5031 11:04:07.582061 Successfully loaded DRAM blobs and ran DRAM calibration
5032 11:04:07.591993 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5033 11:04:07.592087 CBMEM:
5034 11:04:07.595429 IMD: root @ 00000000fffff000 254 entries.
5035 11:04:07.598669 IMD: root @ 00000000ffffec00 62 entries.
5036 11:04:07.605347 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5037 11:04:07.612155 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5038 11:04:07.615323 in-header: 03 a1 00 00 08 00 00 00
5039 11:04:07.618585 in-data: 84 60 60 10 00 00 00 00
5040 11:04:07.622116 Chrome EC: clear events_b mask to 0x0000000020004000
5041 11:04:07.629548 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5042 11:04:07.632819 in-header: 03 fd 00 00 00 00 00 00
5043 11:04:07.632914 in-data:
5044 11:04:07.639798 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5045 11:04:07.639896 CBFS @ 21000 size 3d4000
5046 11:04:07.646220 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5047 11:04:07.649447 CBFS: Locating 'fallback/ramstage'
5048 11:04:07.652869 CBFS: Found @ offset 10d40 size d563
5049 11:04:07.673787 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5050 11:04:07.686096 Accumulated console time in romstage 12860 ms
5051 11:04:07.686173
5052 11:04:07.686233
5053 11:04:07.695963 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5054 11:04:07.699117 ARM64: Exception handlers installed.
5055 11:04:07.699214 ARM64: Testing exception
5056 11:04:07.702449 ARM64: Done test exception
5057 11:04:07.705899 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5058 11:04:07.709160 Manufacturer: ef
5059 11:04:07.712433 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5060 11:04:07.719184 WARNING: RO_VPD is uninitialized or empty.
5061 11:04:07.722555 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5062 11:04:07.725982 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5063 11:04:07.735463 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5064 11:04:07.739161 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5065 11:04:07.745662 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5066 11:04:07.745738 Enumerating buses...
5067 11:04:07.752261 Show all devs... Before device enumeration.
5068 11:04:07.752333 Root Device: enabled 1
5069 11:04:07.755728 CPU_CLUSTER: 0: enabled 1
5070 11:04:07.755821 CPU: 00: enabled 1
5071 11:04:07.758905 Compare with tree...
5072 11:04:07.762347 Root Device: enabled 1
5073 11:04:07.762438 CPU_CLUSTER: 0: enabled 1
5074 11:04:07.765658 CPU: 00: enabled 1
5075 11:04:07.765725 Root Device scanning...
5076 11:04:07.769156 root_dev_scan_bus for Root Device
5077 11:04:07.772894 CPU_CLUSTER: 0 enabled
5078 11:04:07.775676 root_dev_scan_bus for Root Device done
5079 11:04:07.779151 scan_bus: scanning of bus Root Device took 10690 usecs
5080 11:04:07.782469 done
5081 11:04:07.786639 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5082 11:04:07.789326 Allocating resources...
5083 11:04:07.789391 Reading resources...
5084 11:04:07.792683 Root Device read_resources bus 0 link: 0
5085 11:04:07.795990 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5086 11:04:07.799214 CPU: 00 missing read_resources
5087 11:04:07.805927 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5088 11:04:07.809220 Root Device read_resources bus 0 link: 0 done
5089 11:04:07.809296 Done reading resources.
5090 11:04:07.816038 Show resources in subtree (Root Device)...After reading.
5091 11:04:07.819322 Root Device child on link 0 CPU_CLUSTER: 0
5092 11:04:07.822859 CPU_CLUSTER: 0 child on link 0 CPU: 00
5093 11:04:07.832708 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5094 11:04:07.832801 CPU: 00
5095 11:04:07.836073 Setting resources...
5096 11:04:07.839470 Root Device assign_resources, bus 0 link: 0
5097 11:04:07.842844 CPU_CLUSTER: 0 missing set_resources
5098 11:04:07.846284 Root Device assign_resources, bus 0 link: 0
5099 11:04:07.849477 Done setting resources.
5100 11:04:07.852745 Show resources in subtree (Root Device)...After assigning values.
5101 11:04:07.859325 Root Device child on link 0 CPU_CLUSTER: 0
5102 11:04:07.862951 CPU_CLUSTER: 0 child on link 0 CPU: 00
5103 11:04:07.869511 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5104 11:04:07.872768 CPU: 00
5105 11:04:07.872857 Done allocating resources.
5106 11:04:07.879342 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5107 11:04:07.879411 Enabling resources...
5108 11:04:07.879470 done.
5109 11:04:07.886226 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5110 11:04:07.886290 Initializing devices...
5111 11:04:07.889702 Root Device init ...
5112 11:04:07.892746 mainboard_init: Starting display init.
5113 11:04:07.895954 ADC[4]: Raw value=77032 ID=0
5114 11:04:07.918612 anx7625_power_on_init: Init interface.
5115 11:04:07.921638 anx7625_disable_pd_protocol: Disabled PD feature.
5116 11:04:07.928151 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5117 11:04:07.985625 anx7625_start_dp_work: Secure OCM version=00
5118 11:04:07.988616 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5119 11:04:08.005650 sp_tx_get_edid_block: EDID Block = 1
5120 11:04:08.123083 Extracted contents:
5121 11:04:08.126119 header: 00 ff ff ff ff ff ff 00
5122 11:04:08.129751 serial number: 06 af 5c 14 00 00 00 00 00 1a
5123 11:04:08.132911 version: 01 04
5124 11:04:08.136282 basic params: 95 1a 0e 78 02
5125 11:04:08.139431 chroma info: 99 85 95 55 56 92 28 22 50 54
5126 11:04:08.142772 established: 00 00 00
5127 11:04:08.149575 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5128 11:04:08.152825 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5129 11:04:08.159479 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5130 11:04:08.166494 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5131 11:04:08.173122 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5132 11:04:08.176218 extensions: 00
5133 11:04:08.176293 checksum: ae
5134 11:04:08.176350
5135 11:04:08.179573 Manufacturer: AUO Model 145c Serial Number 0
5136 11:04:08.182832 Made week 0 of 2016
5137 11:04:08.182894 EDID version: 1.4
5138 11:04:08.186248 Digital display
5139 11:04:08.189585 6 bits per primary color channel
5140 11:04:08.189678 DisplayPort interface
5141 11:04:08.192908 Maximum image size: 26 cm x 14 cm
5142 11:04:08.196179 Gamma: 220%
5143 11:04:08.196271 Check DPMS levels
5144 11:04:08.199692 Supported color formats: RGB 4:4:4
5145 11:04:08.202855 First detailed timing is preferred timing
5146 11:04:08.206170 Established timings supported:
5147 11:04:08.209419 Standard timings supported:
5148 11:04:08.209484 Detailed timings
5149 11:04:08.213448 Hex of detail: ce1d56ea50001a3030204600009010000018
5150 11:04:08.219614 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5151 11:04:08.222921 0556 0586 05a6 0640 hborder 0
5152 11:04:08.226121 0300 0304 030a 031a vborder 0
5153 11:04:08.229423 -hsync -vsync
5154 11:04:08.233033 Did detailed timing
5155 11:04:08.236300 Hex of detail: 0000000f0000000000000000000000000020
5156 11:04:08.239651 Manufacturer-specified data, tag 15
5157 11:04:08.243036 Hex of detail: 000000fe0041554f0a202020202020202020
5158 11:04:08.246429 ASCII string: AUO
5159 11:04:08.249728 Hex of detail: 000000fe004231313658414230312e34200a
5160 11:04:08.252835 ASCII string: B116XAB01.4
5161 11:04:08.252897 Checksum
5162 11:04:08.256337 Checksum: 0xae (valid)
5163 11:04:08.262936 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5164 11:04:08.263025 DSI data_rate: 457800000 bps
5165 11:04:08.270156 anx7625_parse_edid: set default k value to 0x3d for panel
5166 11:04:08.273330 anx7625_parse_edid: pixelclock(76300).
5167 11:04:08.276624 hactive(1366), hsync(32), hfp(48), hbp(154)
5168 11:04:08.280164 vactive(768), vsync(6), vfp(4), vbp(16)
5169 11:04:08.283677 anx7625_dsi_config: config dsi.
5170 11:04:08.291351 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5171 11:04:08.312197 anx7625_dsi_config: success to config DSI
5172 11:04:08.315771 anx7625_dp_start: MIPI phy setup OK.
5173 11:04:08.318817 [SSUSB] Setting up USB HOST controller...
5174 11:04:08.322398 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5175 11:04:08.325659 [SSUSB] phy power-on done.
5176 11:04:08.329667 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5177 11:04:08.333006 in-header: 03 fc 01 00 00 00 00 00
5178 11:04:08.333099 in-data:
5179 11:04:08.336104 handle_proto3_response: EC response with error code: 1
5180 11:04:08.339698 SPM: pcm index = 1
5181 11:04:08.342920 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5182 11:04:08.345876 CBFS @ 21000 size 3d4000
5183 11:04:08.352910 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5184 11:04:08.356275 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5185 11:04:08.359311 CBFS: Found @ offset 1e7c0 size 1026
5186 11:04:08.366284 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5187 11:04:08.369639 SPM: binary array size = 2988
5188 11:04:08.372634 SPM: version = pcm_allinone_v1.17.2_20180829
5189 11:04:08.376052 SPM binary loaded in 32 msecs
5190 11:04:08.383409 spm_kick_im_to_fetch: ptr = 000000004021eec2
5191 11:04:08.386820 spm_kick_im_to_fetch: len = 2988
5192 11:04:08.386882 SPM: spm_kick_pcm_to_run
5193 11:04:08.390068 SPM: spm_kick_pcm_to_run done
5194 11:04:08.393566 SPM: spm_init done in 52 msecs
5195 11:04:08.396693 Root Device init finished in 505253 usecs
5196 11:04:08.400064 CPU_CLUSTER: 0 init ...
5197 11:04:08.406999 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5198 11:04:08.413564 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5199 11:04:08.413636 CBFS @ 21000 size 3d4000
5200 11:04:08.420595 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5201 11:04:08.423560 CBFS: Locating 'sspm.bin'
5202 11:04:08.426967 CBFS: Found @ offset 208c0 size 41cb
5203 11:04:08.436639 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5204 11:04:08.444892 CPU_CLUSTER: 0 init finished in 42800 usecs
5205 11:04:08.444983 Devices initialized
5206 11:04:08.448128 Show all devs... After init.
5207 11:04:08.451654 Root Device: enabled 1
5208 11:04:08.451740 CPU_CLUSTER: 0: enabled 1
5209 11:04:08.454845 CPU: 00: enabled 1
5210 11:04:08.457696 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5211 11:04:08.461324 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5212 11:04:08.464469 ELOG: NV offset 0x558000 size 0x1000
5213 11:04:08.472096 read SPI 0x558000 0x1000: 1263 us, 3243 KB/s, 25.944 Mbps
5214 11:04:08.478740 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5215 11:04:08.482267 ELOG: Event(17) added with size 13 at 2024-07-10 11:04:08 UTC
5216 11:04:08.485723 out: cmd=0x121: 03 db 21 01 00 00 00 00
5217 11:04:08.488712 in-header: 03 70 00 00 2c 00 00 00
5218 11:04:08.502331 in-data: 9f 49 00 00 00 00 00 00 02 10 00 00 06 80 00 00 90 d3 00 00 06 80 00 00 8b b8 0c 00 06 80 00 00 66 b4 01 00 06 80 00 00 2b f4 63 00
5219 11:04:08.505878 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5220 11:04:08.508948 in-header: 03 19 00 00 08 00 00 00
5221 11:04:08.512231 in-data: a2 e0 47 00 13 00 00 00
5222 11:04:08.515670 Chrome EC: UHEPI supported
5223 11:04:08.522482 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5224 11:04:08.525583 in-header: 03 e1 00 00 08 00 00 00
5225 11:04:08.528859 in-data: 84 20 60 10 00 00 00 00
5226 11:04:08.532556 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5227 11:04:08.538952 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5228 11:04:08.542252 in-header: 03 e1 00 00 08 00 00 00
5229 11:04:08.545557 in-data: 84 20 60 10 00 00 00 00
5230 11:04:08.552129 ELOG: Event(A1) added with size 10 at 2024-07-10 11:04:08 UTC
5231 11:04:08.559129 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5232 11:04:08.562507 ELOG: Event(A0) added with size 9 at 2024-07-10 11:04:08 UTC
5233 11:04:08.565660 elog_add_boot_reason: Logged dev mode boot
5234 11:04:08.568958 Finalize devices...
5235 11:04:08.569035 Devices finalized
5236 11:04:08.575557 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5237 11:04:08.580316 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5238 11:04:08.585707 ELOG: Event(91) added with size 10 at 2024-07-10 11:04:08 UTC
5239 11:04:08.588829 Writing coreboot table at 0xffeda000
5240 11:04:08.592208 0. 0000000000114000-000000000011efff: RAMSTAGE
5241 11:04:08.595407 1. 0000000040000000-000000004023cfff: RAMSTAGE
5242 11:04:08.602047 2. 000000004023d000-00000000545fffff: RAM
5243 11:04:08.605502 3. 0000000054600000-000000005465ffff: BL31
5244 11:04:08.608854 4. 0000000054660000-00000000ffed9fff: RAM
5245 11:04:08.612110 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5246 11:04:08.618877 6. 0000000100000000-000000013fffffff: RAM
5247 11:04:08.618954 Passing 5 GPIOs to payload:
5248 11:04:08.625832 NAME | PORT | POLARITY | VALUE
5249 11:04:08.629076 write protect | 0x00000096 | low | high
5250 11:04:08.635662 EC in RW | 0x000000b1 | high | undefined
5251 11:04:08.639192 EC interrupt | 0x00000097 | low | undefined
5252 11:04:08.642218 TPM interrupt | 0x00000099 | high | undefined
5253 11:04:08.648928 speaker enable | 0x000000af | high | undefined
5254 11:04:08.652447 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5255 11:04:08.655683 in-header: 03 f7 00 00 02 00 00 00
5256 11:04:08.655774 in-data: 04 00
5257 11:04:08.658977 Board ID: 4
5258 11:04:08.659071 ADC[3]: Raw value=1041012 ID=8
5259 11:04:08.662383 RAM code: 8
5260 11:04:08.662460 SKU ID: 16
5261 11:04:08.665865 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5262 11:04:08.669075 CBFS @ 21000 size 3d4000
5263 11:04:08.675978 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5264 11:04:08.679158 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 6d96
5265 11:04:08.682863 coreboot table: 940 bytes.
5266 11:04:08.685802 IMD ROOT 0. 00000000fffff000 00001000
5267 11:04:08.689365 IMD SMALL 1. 00000000ffffe000 00001000
5268 11:04:08.692286 CONSOLE 2. 00000000fffde000 00020000
5269 11:04:08.698959 FMAP 3. 00000000fffdd000 0000047c
5270 11:04:08.702322 TIME STAMP 4. 00000000fffdc000 00000910
5271 11:04:08.706035 RAMOOPS 5. 00000000ffedc000 00100000
5272 11:04:08.709165 COREBOOT 6. 00000000ffeda000 00002000
5273 11:04:08.709265 IMD small region:
5274 11:04:08.712551 IMD ROOT 0. 00000000ffffec00 00000400
5275 11:04:08.719085 VBOOT WORK 1. 00000000ffffeb00 00000100
5276 11:04:08.722360 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5277 11:04:08.725592 VPD 3. 00000000ffffea60 0000006c
5278 11:04:08.729442 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5279 11:04:08.735611 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5280 11:04:08.739046 in-header: 03 e1 00 00 08 00 00 00
5281 11:04:08.742697 in-data: 84 20 60 10 00 00 00 00
5282 11:04:08.745694 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5283 11:04:08.749046 CBFS @ 21000 size 3d4000
5284 11:04:08.755967 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5285 11:04:08.758943 CBFS: Locating 'fallback/payload'
5286 11:04:08.766370 CBFS: Found @ offset dc040 size 439a0
5287 11:04:08.854279 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5288 11:04:08.857706 Checking segment from ROM address 0x0000000040003a00
5289 11:04:08.863942 Checking segment from ROM address 0x0000000040003a1c
5290 11:04:08.867509 Loading segment from ROM address 0x0000000040003a00
5291 11:04:08.870988 code (compression=0)
5292 11:04:08.877442 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5293 11:04:08.887614 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5294 11:04:08.891144 it's not compressed!
5295 11:04:08.894369 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5296 11:04:08.900851 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5297 11:04:08.908583 Loading segment from ROM address 0x0000000040003a1c
5298 11:04:08.911678 Entry Point 0x0000000080000000
5299 11:04:08.911753 Loaded segments
5300 11:04:08.918273 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5301 11:04:08.921839 Jumping to boot code at 0000000080000000(00000000ffeda000)
5302 11:04:08.932053 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5303 11:04:08.935277 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5304 11:04:08.938470 CBFS @ 21000 size 3d4000
5305 11:04:08.945041 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5306 11:04:08.945140 CBFS: Locating 'fallback/bl31'
5307 11:04:08.948928 CBFS: Found @ offset 36dc0 size 5820
5308 11:04:08.962288 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5309 11:04:08.965647 Checking segment from ROM address 0x0000000040003a00
5310 11:04:08.972276 Checking segment from ROM address 0x0000000040003a1c
5311 11:04:08.975769 Loading segment from ROM address 0x0000000040003a00
5312 11:04:08.979014 code (compression=1)
5313 11:04:08.985587 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5314 11:04:08.995508 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5315 11:04:08.995586 using LZMA
5316 11:04:09.004102 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5317 11:04:09.010646 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5318 11:04:09.014207 Loading segment from ROM address 0x0000000040003a1c
5319 11:04:09.017598 Entry Point 0x0000000054601000
5320 11:04:09.017674 Loaded segments
5321 11:04:09.020702 NOTICE: MT8183 bl31_setup
5322 11:04:09.027700 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5323 11:04:09.031070 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5324 11:04:09.034807 INFO: [DEVAPC] dump DEVAPC registers:
5325 11:04:09.044446 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5326 11:04:09.051164 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5327 11:04:09.061331 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5328 11:04:09.067969 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5329 11:04:09.077748 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5330 11:04:09.084435 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5331 11:04:09.091135 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5332 11:04:09.101191 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5333 11:04:09.108057 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5334 11:04:09.117946 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5335 11:04:09.124825 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5336 11:04:09.134696 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5337 11:04:09.141176 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5338 11:04:09.147999 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5339 11:04:09.157853 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5340 11:04:09.164559 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5341 11:04:09.171065 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5342 11:04:09.177989 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5343 11:04:09.184885 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5344 11:04:09.194598 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5345 11:04:09.201546 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5346 11:04:09.208045 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5347 11:04:09.211249 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5348 11:04:09.215245 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5349 11:04:09.218103 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5350 11:04:09.221214 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5351 11:04:09.224755 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5352 11:04:09.231558 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5353 11:04:09.234816 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5354 11:04:09.238054 WARNING: region 0:
5355 11:04:09.241447 WARNING: apc:0x168, sa:0x0, ea:0xfff
5356 11:04:09.241522 WARNING: region 1:
5357 11:04:09.244566 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5358 11:04:09.248109 WARNING: region 2:
5359 11:04:09.251483 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5360 11:04:09.254792 WARNING: region 3:
5361 11:04:09.258287 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5362 11:04:09.258361 WARNING: region 4:
5363 11:04:09.261459 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5364 11:04:09.264848 WARNING: region 5:
5365 11:04:09.267984 WARNING: apc:0x0, sa:0x0, ea:0x0
5366 11:04:09.268058 WARNING: region 6:
5367 11:04:09.271483 WARNING: apc:0x0, sa:0x0, ea:0x0
5368 11:04:09.274755 WARNING: region 7:
5369 11:04:09.278470 WARNING: apc:0x0, sa:0x0, ea:0x0
5370 11:04:09.284937 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5371 11:04:09.288377 INFO: SPM: enable SPMC mode
5372 11:04:09.288452 NOTICE: spm_boot_init() start
5373 11:04:09.291497 NOTICE: spm_boot_init() end
5374 11:04:09.294843 INFO: BL31: Initializing runtime services
5375 11:04:09.301573 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5376 11:04:09.308139 INFO: BL31: Preparing for EL3 exit to normal world
5377 11:04:09.311507 INFO: Entry point address = 0x80000000
5378 11:04:09.311602 INFO: SPSR = 0x8
5379 11:04:09.334408
5380 11:04:09.334483
5381 11:04:09.334560
5382 11:04:09.335138 end: 2.2.3 depthcharge-start (duration 00:00:24) [common]
5383 11:04:09.335231 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5384 11:04:09.335303 Setting prompt string to ['jacuzzi:']
5385 11:04:09.335368 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5386 11:04:09.337601 Starting depthcharge on Juniper...
5387 11:04:09.337676
5388 11:04:09.341014 vboot_handoff: creating legacy vboot_handoff structure
5389 11:04:09.341131
5390 11:04:09.344351 ec_init(0): CrosEC protocol v3 supported (544, 544)
5391 11:04:09.344427
5392 11:04:09.347617 Wipe memory regions:
5393 11:04:09.347693
5394 11:04:09.350933 [0x00000040000000, 0x00000054600000)
5395 11:04:09.393702
5396 11:04:09.393778 [0x00000054660000, 0x00000080000000)
5397 11:04:09.485175
5398 11:04:09.485320 [0x000000811994a0, 0x000000ffeda000)
5399 11:04:09.744703
5400 11:04:09.744822 [0x00000100000000, 0x00000140000000)
5401 11:04:09.877568
5402 11:04:09.880870 Initializing XHCI USB controller at 0x11200000.
5403 11:04:09.903840
5404 11:04:09.907221 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5405 11:04:09.907297
5406 11:04:09.907357
5407 11:04:09.907614 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5408 11:04:09.907686 Sending line: 'tftpboot 192.168.201.1 14786780/tftp-deploy-of3oyt0l/kernel/image.itb 14786780/tftp-deploy-of3oyt0l/kernel/cmdline '
5410 11:04:10.008121 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5411 11:04:10.008200 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5412 11:04:10.012241 jacuzzi: tftpboot 192.168.201.1 14786780/tftp-deploy-of3oyt0l/kernel/image.itp-deploy-of3oyt0l/kernel/cmdline
5413 11:04:10.012314
5414 11:04:10.012375 Waiting for link
5415 11:04:10.563818
5416 11:04:10.563935 R8152: Initializing
5417 11:04:10.563996
5418 11:04:10.567039 Version 9 (ocp_data = 6010)
5419 11:04:10.567116
5420 11:04:10.570297 R8152: Done initializing
5421 11:04:10.570372
5422 11:04:10.570431 Adding net device
5423 11:04:10.749998
5424 11:04:10.750115 R8152: Initializing
5425 11:04:10.750194
5426 11:04:10.753548 Version 9 (ocp_data = 6010)
5427 11:04:10.753638
5428 11:04:10.756531 R8152: Done initializing
5429 11:04:10.756629
5430 11:04:10.759853 net_add_device: Attemp to include the same device
5431 11:04:11.146259
5432 11:04:11.146369 done.
5433 11:04:11.146448
5434 11:04:11.146505 MAC: 00:e0:4c:68:03:2b
5435 11:04:11.146558
5436 11:04:11.149617 Sending DHCP discover... done.
5437 11:04:11.149694
5438 11:04:11.153143 Waiting for reply... done.
5439 11:04:11.153242
5440 11:04:11.156297 Sending DHCP request... done.
5441 11:04:11.156389
5442 11:04:11.156469 Waiting for reply... done.
5443 11:04:11.156551
5444 11:04:11.159804 My ip is 192.168.201.17
5445 11:04:11.159867
5446 11:04:11.162947 The DHCP server ip is 192.168.201.1
5447 11:04:11.163010
5448 11:04:11.166225 TFTP server IP predefined by user: 192.168.201.1
5449 11:04:11.166300
5450 11:04:11.172857 Bootfile predefined by user: 14786780/tftp-deploy-of3oyt0l/kernel/image.itb
5451 11:04:11.172947
5452 11:04:11.176262 Sending tftp read request... done.
5453 11:04:11.176325
5454 11:04:11.179620 Waiting for the transfer...
5455 11:04:11.179709
5456 11:04:11.451169 00000000 ################################################################
5457 11:04:11.451293
5458 11:04:11.715123 00080000 ################################################################
5459 11:04:11.715277
5460 11:04:11.964850 00100000 ################################################################
5461 11:04:11.964967
5462 11:04:12.218194 00180000 ################################################################
5463 11:04:12.218308
5464 11:04:12.476391 00200000 ################################################################
5465 11:04:12.476511
5466 11:04:12.734563 00280000 ################################################################
5467 11:04:12.734684
5468 11:04:12.999736 00300000 ################################################################
5469 11:04:12.999854
5470 11:04:13.255336 00380000 ################################################################
5471 11:04:13.255452
5472 11:04:13.521207 00400000 ################################################################
5473 11:04:13.521350
5474 11:04:13.791434 00480000 ################################################################
5475 11:04:13.791581
5476 11:04:14.049579 00500000 ################################################################
5477 11:04:14.049700
5478 11:04:14.320955 00580000 ################################################################
5479 11:04:14.321098
5480 11:04:14.580752 00600000 ################################################################
5481 11:04:14.580896
5482 11:04:14.853863 00680000 ################################################################
5483 11:04:14.853989
5484 11:04:15.140818 00700000 ################################################################
5485 11:04:15.140943
5486 11:04:15.429031 00780000 ################################################################
5487 11:04:15.429156
5488 11:04:15.707906 00800000 ################################################################
5489 11:04:15.708050
5490 11:04:15.963523 00880000 ################################################################
5491 11:04:15.963670
5492 11:04:16.237456 00900000 ################################################################
5493 11:04:16.237603
5494 11:04:16.514667 00980000 ################################################################
5495 11:04:16.514798
5496 11:04:16.772438 00a00000 ################################################################
5497 11:04:16.772571
5498 11:04:17.028558 00a80000 ################################################################
5499 11:04:17.028705
5500 11:04:17.293189 00b00000 ################################################################
5501 11:04:17.293310
5502 11:04:17.545403 00b80000 ################################################################
5503 11:04:17.545517
5504 11:04:17.811780 00c00000 ################################################################
5505 11:04:17.811896
5506 11:04:18.071299 00c80000 ################################################################
5507 11:04:18.071416
5508 11:04:18.340860 00d00000 ################################################################
5509 11:04:18.340979
5510 11:04:18.618992 00d80000 ################################################################
5511 11:04:18.619122
5512 11:04:18.869797 00e00000 ################################################################
5513 11:04:18.869945
5514 11:04:19.123639 00e80000 ################################################################
5515 11:04:19.123756
5516 11:04:19.402591 00f00000 ################################################################
5517 11:04:19.402705
5518 11:04:19.653668 00f80000 ################################################################
5519 11:04:19.653780
5520 11:04:19.922606 01000000 ################################################################
5521 11:04:19.922746
5522 11:04:20.217930 01080000 ################################################################
5523 11:04:20.218041
5524 11:04:20.485558 01100000 ################################################################
5525 11:04:20.485674
5526 11:04:20.750607 01180000 ################################################################
5527 11:04:20.750725
5528 11:04:21.010383 01200000 ################################################################
5529 11:04:21.010493
5530 11:04:21.264604 01280000 ################################################################
5531 11:04:21.264719
5532 11:04:21.528630 01300000 ################################################################
5533 11:04:21.528758
5534 11:04:21.784006 01380000 ################################################################
5535 11:04:21.784129
5536 11:04:22.041593 01400000 ################################################################
5537 11:04:22.041724
5538 11:04:22.297398 01480000 ################################################################
5539 11:04:22.297517
5540 11:04:22.560067 01500000 ################################################################
5541 11:04:22.560182
5542 11:04:22.823159 01580000 ################################################################
5543 11:04:22.823273
5544 11:04:23.089570 01600000 ################################################################
5545 11:04:23.089697
5546 11:04:23.373871 01680000 ################################################################
5547 11:04:23.373989
5548 11:04:23.638142 01700000 ################################################################
5549 11:04:23.638293
5550 11:04:23.903307 01780000 ################################################################
5551 11:04:23.903429
5552 11:04:24.176414 01800000 ################################################################
5553 11:04:24.176541
5554 11:04:24.428141 01880000 ################################################################
5555 11:04:24.428269
5556 11:04:24.678156 01900000 ################################################################
5557 11:04:24.678278
5558 11:04:24.945838 01980000 ################################################################
5559 11:04:24.945960
5560 11:04:25.232246 01a00000 ################################################################
5561 11:04:25.232373
5562 11:04:25.514858 01a80000 ################################################################
5563 11:04:25.514986
5564 11:04:25.796694 01b00000 ################################################################
5565 11:04:25.796824
5566 11:04:26.095905 01b80000 ################################################################
5567 11:04:26.096029
5568 11:04:26.374695 01c00000 ################################################################
5569 11:04:26.374821
5570 11:04:26.646931 01c80000 ################################################################
5571 11:04:26.647055
5572 11:04:26.917898 01d00000 ################################################################
5573 11:04:26.918056
5574 11:04:27.171207 01d80000 ################################################################
5575 11:04:27.171364
5576 11:04:27.371961 01e00000 #################################################### done.
5577 11:04:27.372080
5578 11:04:27.375669 The bootfile was 31879018 bytes long.
5579 11:04:27.375746
5580 11:04:27.378898 Sending tftp read request... done.
5581 11:04:27.378978
5582 11:04:27.382007 Waiting for the transfer...
5583 11:04:27.382085
5584 11:04:27.382143 00000000 # done.
5585 11:04:27.382199
5586 11:04:27.392189 Command line loaded dynamically from TFTP file: 14786780/tftp-deploy-of3oyt0l/kernel/cmdline
5587 11:04:27.392303
5588 11:04:27.415505 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14786780/extract-nfsrootfs-f7ihucu9,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5589 11:04:27.419225
5590 11:04:27.419317 Loading FIT.
5591 11:04:27.419406
5592 11:04:27.422483 Image ramdisk-1 has 18703022 bytes.
5593 11:04:27.422554
5594 11:04:27.425495 Image fdt-1 has 57695 bytes.
5595 11:04:27.425579
5596 11:04:27.428989 Image kernel-1 has 13116259 bytes.
5597 11:04:27.429080
5598 11:04:27.435519 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5599 11:04:27.435616
5600 11:04:27.449016 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5601 11:04:27.449091
5602 11:04:27.452484 Choosing best match conf-1 for compat google,juniper-sku16.
5603 11:04:27.457820
5604 11:04:27.462531 Connected to device vid:did:rid of 1ae0:0028:00
5605 11:04:27.470832
5606 11:04:27.474089 tpm_get_response: command 0x17b, return code 0x0
5607 11:04:27.474180
5608 11:04:27.477327 tpm_cleanup: add release locality here.
5609 11:04:27.477420
5610 11:04:27.480656 Shutting down all USB controllers.
5611 11:04:27.480743
5612 11:04:27.484162 Removing current net device
5613 11:04:27.484240
5614 11:04:27.487528 Exiting depthcharge with code 4 at timestamp: 34567073
5615 11:04:27.487616
5616 11:04:27.490988 LZMA decompressing kernel-1 to 0x80193568
5617 11:04:27.491061
5618 11:04:27.494149 LZMA decompressing kernel-1 to 0x40000000
5619 11:04:29.360225
5620 11:04:29.360348 jumping to kernel
5621 11:04:29.360813 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
5622 11:04:29.360910 start: 2.2.5 auto-login-action (timeout 00:04:07) [common]
5623 11:04:29.360981 Setting prompt string to ['Linux version [0-9]']
5624 11:04:29.361046 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5625 11:04:29.361120 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5626 11:04:29.435015
5627 11:04:29.438439 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5628 11:04:29.442325 start: 2.2.5.1 login-action (timeout 00:04:07) [common]
5629 11:04:29.442413 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5630 11:04:29.442482 Setting prompt string to []
5631 11:04:29.442553 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5632 11:04:29.442616 Using line separator: #'\n'#
5633 11:04:29.442668 No login prompt set.
5634 11:04:29.442722 Parsing kernel messages
5635 11:04:29.442775 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5636 11:04:29.442873 [login-action] Waiting for messages, (timeout 00:04:07)
5637 11:04:29.442932 Waiting using forced prompt support (timeout 00:02:03)
5638 11:04:29.461828 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j261272-arm64-gcc-12-defconfig-arm64-chromebook-bgdbp) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Wed Jul 10 10:43:20 UTC 2024
5639 11:04:29.465149 [ 0.000000] random: crng init done
5640 11:04:29.468611 [ 0.000000] Machine model: Google juniper sku16 board
5641 11:04:29.471860 [ 0.000000] efi: UEFI not found.
5642 11:04:29.481907 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5643 11:04:29.488536 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5644 11:04:29.495515 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5645 11:04:29.501880 [ 0.000000] printk: bootconsole [mtk8250] enabled
5646 11:04:29.509119 [ 0.000000] NUMA: No NUMA configuration found
5647 11:04:29.515839 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5648 11:04:29.522366 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bda00-0x13f7bffff]
5649 11:04:29.522468 [ 0.000000] Zone ranges:
5650 11:04:29.529065 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5651 11:04:29.532316 [ 0.000000] DMA32 empty
5652 11:04:29.539522 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5653 11:04:29.542453 [ 0.000000] Movable zone start for each node
5654 11:04:29.545922 [ 0.000000] Early memory node ranges
5655 11:04:29.552325 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5656 11:04:29.559053 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5657 11:04:29.565696 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5658 11:04:29.572481 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5659 11:04:29.579101 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5660 11:04:29.586017 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5661 11:04:29.605915 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5662 11:04:29.612515 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5663 11:04:29.619021 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5664 11:04:29.622500 [ 0.000000] psci: probing for conduit method from DT.
5665 11:04:29.629403 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5666 11:04:29.632579 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5667 11:04:29.639099 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5668 11:04:29.642543 [ 0.000000] psci: SMC Calling Convention v1.1
5669 11:04:29.649150 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5670 11:04:29.652494 [ 0.000000] Detected VIPT I-cache on CPU0
5671 11:04:29.659238 [ 0.000000] CPU features: detected: GIC system register CPU interface
5672 11:04:29.665893 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5673 11:04:29.672779 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5674 11:04:29.675866 [ 0.000000] CPU features: detected: ARM erratum 845719
5675 11:04:29.682807 [ 0.000000] alternatives: applying boot alternatives
5676 11:04:29.685720 [ 0.000000] Fallback order for Node 0: 0
5677 11:04:29.692738 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5678 11:04:29.695964 [ 0.000000] Policy zone: Normal
5679 11:04:29.722460 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14786780/extract-nfsrootfs-f7ihucu9,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5680 11:04:29.735908 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5681 11:04:29.746252 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5682 11:04:29.752679 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5683 11:04:29.759425 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5684 11:04:29.762667 <6>[ 0.000000] software IO TLB: area num 8.
5685 11:04:29.789816 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5686 11:04:29.847627 <6>[ 0.000000] Memory: 3896800K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 261664K reserved, 32768K cma-reserved)
5687 11:04:29.854327 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5688 11:04:29.860871 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5689 11:04:29.864297 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5690 11:04:29.870969 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5691 11:04:29.877724 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5692 11:04:29.880985 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5693 11:04:29.891092 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5694 11:04:29.897613 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5695 11:04:29.901033 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5696 11:04:29.912958 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5697 11:04:29.919451 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5698 11:04:29.922942 <6>[ 0.000000] GICv3: 640 SPIs implemented
5699 11:04:29.926411 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5700 11:04:29.933009 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5701 11:04:29.936088 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5702 11:04:29.942842 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5703 11:04:29.952814 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5704 11:04:29.966387 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5705 11:04:29.972971 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5706 11:04:29.984588 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5707 11:04:29.997907 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5708 11:04:30.004449 <6>[ 0.000001] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5709 11:04:30.011434 <6>[ 0.009464] Console: colour dummy device 80x25
5710 11:04:30.014728 <6>[ 0.014501] printk: console [tty1] enabled
5711 11:04:30.024677 <6>[ 0.018891] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5712 11:04:30.031497 <6>[ 0.029355] pid_max: default: 32768 minimum: 301
5713 11:04:30.034759 <6>[ 0.034235] LSM: Security Framework initializing
5714 11:04:30.044793 <6>[ 0.039149] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5715 11:04:30.051556 <6>[ 0.046772] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5716 11:04:30.058278 <4>[ 0.055651] cacheinfo: Unable to detect cache hierarchy for CPU 0
5717 11:04:30.068327 <6>[ 0.062277] cblist_init_generic: Setting adjustable number of callback queues.
5718 11:04:30.071678 <6>[ 0.069722] cblist_init_generic: Setting shift to 3 and lim to 1.
5719 11:04:30.081462 <6>[ 0.076076] cblist_init_generic: Setting adjustable number of callback queues.
5720 11:04:30.088126 <6>[ 0.083520] cblist_init_generic: Setting shift to 3 and lim to 1.
5721 11:04:30.091445 <6>[ 0.089918] rcu: Hierarchical SRCU implementation.
5722 11:04:30.098148 <6>[ 0.094944] rcu: Max phase no-delay instances is 1000.
5723 11:04:30.104570 <6>[ 0.102852] EFI services will not be available.
5724 11:04:30.107922 <6>[ 0.107800] smp: Bringing up secondary CPUs ...
5725 11:04:30.118374 <6>[ 0.113028] Detected VIPT I-cache on CPU1
5726 11:04:30.125439 <4>[ 0.113076] cacheinfo: Unable to detect cache hierarchy for CPU 1
5727 11:04:30.132033 <6>[ 0.113084] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5728 11:04:30.138645 <6>[ 0.113116] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5729 11:04:30.142035 <6>[ 0.113597] Detected VIPT I-cache on CPU2
5730 11:04:30.149130 <4>[ 0.113631] cacheinfo: Unable to detect cache hierarchy for CPU 2
5731 11:04:30.155266 <6>[ 0.113635] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5732 11:04:30.162095 <6>[ 0.113647] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5733 11:04:30.165260 <6>[ 0.114094] Detected VIPT I-cache on CPU3
5734 11:04:30.172152 <4>[ 0.114125] cacheinfo: Unable to detect cache hierarchy for CPU 3
5735 11:04:30.178521 <6>[ 0.114130] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5736 11:04:30.185120 <6>[ 0.114141] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5737 11:04:30.191802 <6>[ 0.114714] CPU features: detected: Spectre-v2
5738 11:04:30.195184 <6>[ 0.114724] CPU features: detected: Spectre-BHB
5739 11:04:30.201969 <6>[ 0.114728] CPU features: detected: ARM erratum 858921
5740 11:04:30.205106 <6>[ 0.114733] Detected VIPT I-cache on CPU4
5741 11:04:30.211679 <4>[ 0.114781] cacheinfo: Unable to detect cache hierarchy for CPU 4
5742 11:04:30.218407 <6>[ 0.114789] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5743 11:04:30.225129 <6>[ 0.114797] arch_timer: Enabling local workaround for ARM erratum 858921
5744 11:04:30.231985 <6>[ 0.114808] arch_timer: CPU4: Trapping CNTVCT access
5745 11:04:30.238566 <6>[ 0.114816] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5746 11:04:30.241820 <6>[ 0.115302] Detected VIPT I-cache on CPU5
5747 11:04:30.248449 <4>[ 0.115342] cacheinfo: Unable to detect cache hierarchy for CPU 5
5748 11:04:30.254899 <6>[ 0.115347] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5749 11:04:30.262049 <6>[ 0.115354] arch_timer: Enabling local workaround for ARM erratum 858921
5750 11:04:30.268638 <6>[ 0.115360] arch_timer: CPU5: Trapping CNTVCT access
5751 11:04:30.275412 <6>[ 0.115365] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5752 11:04:30.278910 <6>[ 0.115801] Detected VIPT I-cache on CPU6
5753 11:04:30.285150 <4>[ 0.115847] cacheinfo: Unable to detect cache hierarchy for CPU 6
5754 11:04:30.292029 <6>[ 0.115853] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5755 11:04:30.298613 <6>[ 0.115860] arch_timer: Enabling local workaround for ARM erratum 858921
5756 11:04:30.305100 <6>[ 0.115867] arch_timer: CPU6: Trapping CNTVCT access
5757 11:04:30.311907 <6>[ 0.115872] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5758 11:04:30.315222 <6>[ 0.116402] Detected VIPT I-cache on CPU7
5759 11:04:30.321762 <4>[ 0.116445] cacheinfo: Unable to detect cache hierarchy for CPU 7
5760 11:04:30.328764 <6>[ 0.116452] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5761 11:04:30.335549 <6>[ 0.116458] arch_timer: Enabling local workaround for ARM erratum 858921
5762 11:04:30.341944 <6>[ 0.116465] arch_timer: CPU7: Trapping CNTVCT access
5763 11:04:30.348312 <6>[ 0.116470] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5764 11:04:30.352183 <6>[ 0.116518] smp: Brought up 1 node, 8 CPUs
5765 11:04:30.358318 <6>[ 0.355425] SMP: Total of 8 processors activated.
5766 11:04:30.361534 <6>[ 0.360360] CPU features: detected: 32-bit EL0 Support
5767 11:04:30.368124 <6>[ 0.365738] CPU features: detected: 32-bit EL1 Support
5768 11:04:30.374975 <6>[ 0.371106] CPU features: detected: CRC32 instructions
5769 11:04:30.378185 <6>[ 0.376532] CPU: All CPU(s) started at EL2
5770 11:04:30.384839 <6>[ 0.380871] alternatives: applying system-wide alternatives
5771 11:04:30.387999 <6>[ 0.388885] devtmpfs: initialized
5772 11:04:30.403097 <6>[ 0.397845] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5773 11:04:30.412922 <6>[ 0.407795] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5774 11:04:30.416277 <6>[ 0.415519] pinctrl core: initialized pinctrl subsystem
5775 11:04:30.424578 <6>[ 0.422634] DMI not present or invalid.
5776 11:04:30.431189 <6>[ 0.427004] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5777 11:04:30.438037 <6>[ 0.433913] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5778 11:04:30.447806 <6>[ 0.441441] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5779 11:04:30.454603 <6>[ 0.449691] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5780 11:04:30.461161 <6>[ 0.457868] audit: initializing netlink subsys (disabled)
5781 11:04:30.468224 <5>[ 0.463572] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
5782 11:04:30.474641 <6>[ 0.464539] thermal_sys: Registered thermal governor 'step_wise'
5783 11:04:30.481079 <6>[ 0.471538] thermal_sys: Registered thermal governor 'power_allocator'
5784 11:04:30.484718 <6>[ 0.477837] cpuidle: using governor menu
5785 11:04:30.491195 <6>[ 0.488802] NET: Registered PF_QIPCRTR protocol family
5786 11:04:30.497967 <6>[ 0.494299] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5787 11:04:30.504793 <6>[ 0.501399] ASID allocator initialised with 32768 entries
5788 11:04:30.508133 <6>[ 0.508167] Serial: AMBA PL011 UART driver
5789 11:04:30.521208 <4>[ 0.519482] Trying to register duplicate clock ID: 113
5790 11:04:30.581477 <6>[ 0.576027] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5791 11:04:30.595571 <6>[ 0.590401] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5792 11:04:30.599056 <6>[ 0.600179] KASLR enabled
5793 11:04:30.613627 <6>[ 0.608146] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5794 11:04:30.620130 <6>[ 0.615149] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5795 11:04:30.626703 <6>[ 0.621626] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5796 11:04:30.633610 <6>[ 0.628618] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5797 11:04:30.640118 <6>[ 0.635091] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5798 11:04:30.646963 <6>[ 0.642081] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5799 11:04:30.653554 <6>[ 0.648554] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5800 11:04:30.660135 <6>[ 0.655545] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5801 11:04:30.663600 <6>[ 0.663113] ACPI: Interpreter disabled.
5802 11:04:30.672976 <6>[ 0.671095] iommu: Default domain type: Translated
5803 11:04:30.679984 <6>[ 0.676202] iommu: DMA domain TLB invalidation policy: strict mode
5804 11:04:30.683304 <5>[ 0.682831] SCSI subsystem initialized
5805 11:04:30.689808 <6>[ 0.687247] usbcore: registered new interface driver usbfs
5806 11:04:30.696774 <6>[ 0.692973] usbcore: registered new interface driver hub
5807 11:04:30.699855 <6>[ 0.698516] usbcore: registered new device driver usb
5808 11:04:30.706703 <6>[ 0.704821] pps_core: LinuxPPS API ver. 1 registered
5809 11:04:30.717267 <6>[ 0.710005] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5810 11:04:30.720042 <6>[ 0.719329] PTP clock support registered
5811 11:04:30.723277 <6>[ 0.723581] EDAC MC: Ver: 3.0.0
5812 11:04:30.731546 <6>[ 0.729213] FPGA manager framework
5813 11:04:30.734893 <6>[ 0.732898] Advanced Linux Sound Architecture Driver Initialized.
5814 11:04:30.738433 <6>[ 0.739654] vgaarb: loaded
5815 11:04:30.744852 <6>[ 0.742781] clocksource: Switched to clocksource arch_sys_counter
5816 11:04:30.751653 <5>[ 0.749214] VFS: Disk quotas dquot_6.6.0
5817 11:04:30.758337 <6>[ 0.753389] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5818 11:04:30.761706 <6>[ 0.760563] pnp: PnP ACPI: disabled
5819 11:04:30.769559 <6>[ 0.767456] NET: Registered PF_INET protocol family
5820 11:04:30.776456 <6>[ 0.772686] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5821 11:04:30.787797 <6>[ 0.782599] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5822 11:04:30.797943 <6>[ 0.791356] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5823 11:04:30.804853 <6>[ 0.799307] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5824 11:04:30.811258 <6>[ 0.807539] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5825 11:04:30.818400 <6>[ 0.815633] TCP: Hash tables configured (established 32768 bind 32768)
5826 11:04:30.824825 <6>[ 0.822461] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5827 11:04:30.834758 <6>[ 0.829434] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5828 11:04:30.838178 <6>[ 0.836916] NET: Registered PF_UNIX/PF_LOCAL protocol family
5829 11:04:30.844982 <6>[ 0.843012] RPC: Registered named UNIX socket transport module.
5830 11:04:30.851840 <6>[ 0.849155] RPC: Registered udp transport module.
5831 11:04:30.855049 <6>[ 0.854079] RPC: Registered tcp transport module.
5832 11:04:30.861574 <6>[ 0.859003] RPC: Registered tcp NFSv4.1 backchannel transport module.
5833 11:04:30.868455 <6>[ 0.865656] PCI: CLS 0 bytes, default 64
5834 11:04:30.871691 <6>[ 0.869942] Unpacking initramfs...
5835 11:04:30.884610 <6>[ 0.879394] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5836 11:04:30.894907 <6>[ 0.888016] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5837 11:04:30.897984 <6>[ 0.896867] kvm [1]: IPA Size Limit: 40 bits
5838 11:04:30.905188 <6>[ 0.903194] kvm [1]: vgic-v2@c420000
5839 11:04:30.908492 <6>[ 0.907010] kvm [1]: GIC system register CPU interface enabled
5840 11:04:30.916899 <6>[ 0.914871] kvm [1]: vgic interrupt IRQ18
5841 11:04:30.920140 <6>[ 0.919235] kvm [1]: Hyp mode initialized successfully
5842 11:04:30.927610 <5>[ 0.925601] Initialise system trusted keyrings
5843 11:04:30.934201 <6>[ 0.930444] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5844 11:04:30.942203 <6>[ 0.940378] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5845 11:04:30.948958 <5>[ 0.946832] NFS: Registering the id_resolver key type
5846 11:04:30.952305 <5>[ 0.952136] Key type id_resolver registered
5847 11:04:30.959131 <5>[ 0.956547] Key type id_legacy registered
5848 11:04:30.965773 <6>[ 0.960852] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5849 11:04:30.972166 <6>[ 0.967776] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5850 11:04:30.978802 <6>[ 0.975550] 9p: Installing v9fs 9p2000 file system support
5851 11:04:31.007277 <5>[ 1.005026] Key type asymmetric registered
5852 11:04:31.010474 <5>[ 1.009369] Asymmetric key parser 'x509' registered
5853 11:04:31.020498 <6>[ 1.014525] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5854 11:04:31.023945 <6>[ 1.022141] io scheduler mq-deadline registered
5855 11:04:31.027007 <6>[ 1.026897] io scheduler kyber registered
5856 11:04:31.049828 <6>[ 1.047679] EINJ: ACPI disabled.
5857 11:04:31.056262 <4>[ 1.051456] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5858 11:04:31.094143 <6>[ 1.092279] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5859 11:04:31.102630 <6>[ 1.100817] printk: console [ttyS0] disabled
5860 11:04:31.131045 <6>[ 1.125469] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5861 11:04:31.137651 <6>[ 1.134940] printk: console [ttyS0] enabled
5862 11:04:31.140655 <6>[ 1.134940] printk: console [ttyS0] enabled
5863 11:04:31.147475 <6>[ 1.143858] printk: bootconsole [mtk8250] disabled
5864 11:04:31.150716 <6>[ 1.143858] printk: bootconsole [mtk8250] disabled
5865 11:04:31.161198 <3>[ 1.154400] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5866 11:04:31.167544 <3>[ 1.162790] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5867 11:04:31.196391 <6>[ 1.191199] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5868 11:04:31.203263 <6>[ 1.200853] serial serial0: tty port ttyS1 registered
5869 11:04:31.209822 <6>[ 1.207466] SuperH (H)SCI(F) driver initialized
5870 11:04:31.213214 <6>[ 1.212972] msm_serial: driver initialized
5871 11:04:31.228693 <6>[ 1.223286] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5872 11:04:31.238470 <6>[ 1.231870] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5873 11:04:31.245396 <6>[ 1.240449] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5874 11:04:31.255468 <6>[ 1.249020] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5875 11:04:31.262234 <6>[ 1.257676] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5876 11:04:31.271920 <6>[ 1.266346] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5877 11:04:31.282020 <6>[ 1.275091] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5878 11:04:31.288536 <6>[ 1.283830] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5879 11:04:31.298805 <6>[ 1.292396] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5880 11:04:31.305282 <6>[ 1.301198] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5881 11:04:31.315738 <4>[ 1.313605] cacheinfo: Unable to detect cache hierarchy for CPU 0
5882 11:04:31.325076 <6>[ 1.322930] loop: module loaded
5883 11:04:31.337347 <6>[ 1.334907] vsim1: Bringing 1800000uV into 2700000-2700000uV
5884 11:04:31.354907 <6>[ 1.352991] megasas: 07.719.03.00-rc1
5885 11:04:31.363904 <6>[ 1.361803] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5886 11:04:31.372192 <6>[ 1.370172] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5887 11:04:31.389298 <6>[ 1.387033] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5888 11:04:31.445762 <6>[ 1.437256] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b8
5889 11:04:31.492199 <6>[ 1.490214] Freeing initrd memory: 18260K
5890 11:04:31.505553 <4>[ 1.500144] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5891 11:04:31.512034 <4>[ 1.509377] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
5892 11:04:31.518622 <4>[ 1.516075] Hardware name: Google juniper sku16 board (DT)
5893 11:04:31.522136 <4>[ 1.521814] Call trace:
5894 11:04:31.525271 <4>[ 1.524514] dump_backtrace.part.0+0xe0/0xf0
5895 11:04:31.528686 <4>[ 1.529051] show_stack+0x18/0x30
5896 11:04:31.531870 <4>[ 1.532623] dump_stack_lvl+0x64/0x80
5897 11:04:31.538802 <4>[ 1.536542] dump_stack+0x18/0x34
5898 11:04:31.542107 <4>[ 1.540112] sysfs_warn_dup+0x64/0x80
5899 11:04:31.545341 <4>[ 1.544034] sysfs_do_create_link_sd+0xf0/0x100
5900 11:04:31.548537 <4>[ 1.548821] sysfs_create_link+0x20/0x40
5901 11:04:31.555426 <4>[ 1.553000] bus_add_device+0x64/0x120
5902 11:04:31.558839 <4>[ 1.557005] device_add+0x354/0x7ec
5903 11:04:31.561960 <4>[ 1.560751] of_device_add+0x44/0x60
5904 11:04:31.565573 <4>[ 1.564583] of_platform_device_create_pdata+0x90/0x124
5905 11:04:31.572272 <4>[ 1.570064] of_platform_bus_create+0x154/0x380
5906 11:04:31.575434 <4>[ 1.574849] of_platform_populate+0x50/0xfc
5907 11:04:31.582201 <4>[ 1.579289] parse_mtd_partitions+0x1d8/0x4e0
5908 11:04:31.585394 <4>[ 1.583905] mtd_device_parse_register+0xec/0x2e0
5909 11:04:31.588865 <4>[ 1.588866] spi_nor_probe+0x280/0x2f4
5910 11:04:31.592299 <4>[ 1.592872] spi_mem_probe+0x6c/0xc0
5911 11:04:31.595789 <4>[ 1.596705] spi_probe+0x84/0xe4
5912 11:04:31.602106 <4>[ 1.600190] really_probe+0xbc/0x2dc
5913 11:04:31.605526 <4>[ 1.604021] __driver_probe_device+0x78/0x114
5914 11:04:31.608744 <4>[ 1.608633] driver_probe_device+0xd8/0x15c
5915 11:04:31.615601 <4>[ 1.613070] __device_attach_driver+0xb8/0x134
5916 11:04:31.618947 <4>[ 1.617768] bus_for_each_drv+0x7c/0xd4
5917 11:04:31.622179 <4>[ 1.621861] __device_attach+0x9c/0x1a0
5918 11:04:31.628992 <4>[ 1.625951] device_initial_probe+0x14/0x20
5919 11:04:31.632771 <4>[ 1.630389] bus_probe_device+0x98/0xa0
5920 11:04:31.635947 <4>[ 1.634479] device_add+0x3c0/0x7ec
5921 11:04:31.639085 <4>[ 1.638224] __spi_add_device+0x78/0x120
5922 11:04:31.642465 <4>[ 1.642402] spi_add_device+0x44/0x80
5923 11:04:31.649087 <4>[ 1.646320] spi_register_controller+0x704/0xb20
5924 11:04:31.652360 <4>[ 1.651192] devm_spi_register_controller+0x4c/0xac
5925 11:04:31.655711 <4>[ 1.656324] mtk_spi_probe+0x4f4/0x684
5926 11:04:31.662647 <4>[ 1.660329] platform_probe+0x68/0xc0
5927 11:04:31.666043 <4>[ 1.664247] really_probe+0xbc/0x2dc
5928 11:04:31.669418 <4>[ 1.668077] __driver_probe_device+0x78/0x114
5929 11:04:31.672745 <4>[ 1.672689] driver_probe_device+0xd8/0x15c
5930 11:04:31.679100 <4>[ 1.677126] __driver_attach+0x94/0x19c
5931 11:04:31.682820 <4>[ 1.681216] bus_for_each_dev+0x74/0xd0
5932 11:04:31.686002 <4>[ 1.685309] driver_attach+0x24/0x30
5933 11:04:31.689351 <4>[ 1.689138] bus_add_driver+0x154/0x20c
5934 11:04:31.695984 <4>[ 1.693228] driver_register+0x78/0x130
5935 11:04:31.699333 <4>[ 1.697319] __platform_driver_register+0x28/0x34
5936 11:04:31.702593 <4>[ 1.702278] mtk_spi_driver_init+0x1c/0x28
5937 11:04:31.709223 <4>[ 1.706634] do_one_initcall+0x64/0x1dc
5938 11:04:31.712645 <4>[ 1.710725] kernel_init_freeable+0x218/0x284
5939 11:04:31.716063 <4>[ 1.715341] kernel_init+0x24/0x12c
5940 11:04:31.719308 <4>[ 1.719085] ret_from_fork+0x10/0x20
5941 11:04:31.729786 <6>[ 1.727807] tun: Universal TUN/TAP device driver, 1.6
5942 11:04:31.733136 <6>[ 1.734079] thunder_xcv, ver 1.0
5943 11:04:31.736519 <6>[ 1.737593] thunder_bgx, ver 1.0
5944 11:04:31.740023 <6>[ 1.741100] nicpf, ver 1.0
5945 11:04:31.750877 <6>[ 1.745475] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5946 11:04:31.754204 <6>[ 1.752959] hns3: Copyright (c) 2017 Huawei Corporation.
5947 11:04:31.757854 <6>[ 1.758556] hclge is initializing
5948 11:04:31.764335 <6>[ 1.762141] e1000: Intel(R) PRO/1000 Network Driver
5949 11:04:31.770801 <6>[ 1.767275] e1000: Copyright (c) 1999-2006 Intel Corporation.
5950 11:04:31.774279 <6>[ 1.773298] e1000e: Intel(R) PRO/1000 Network Driver
5951 11:04:31.781369 <6>[ 1.778520] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5952 11:04:31.787651 <6>[ 1.784714] igb: Intel(R) Gigabit Ethernet Network Driver
5953 11:04:31.794593 <6>[ 1.790370] igb: Copyright (c) 2007-2014 Intel Corporation.
5954 11:04:31.801007 <6>[ 1.796212] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5955 11:04:31.804384 <6>[ 1.802736] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5956 11:04:31.811425 <6>[ 1.809290] sky2: driver version 1.30
5957 11:04:31.817920 <6>[ 1.814543] usbcore: registered new device driver r8152-cfgselector
5958 11:04:31.824600 <6>[ 1.821085] usbcore: registered new interface driver r8152
5959 11:04:31.827960 <6>[ 1.826909] VFIO - User Level meta-driver version: 0.3
5960 11:04:31.836793 <6>[ 1.834677] mtu3 11201000.usb: uwk - reg:0x420, version:101
5961 11:04:31.843454 <4>[ 1.840548] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5962 11:04:31.850165 <6>[ 1.847828] mtu3 11201000.usb: dr_mode: 1, drd: auto
5963 11:04:31.856780 <6>[ 1.853053] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5964 11:04:31.859930 <6>[ 1.859228] mtu3 11201000.usb: usb3-drd: 0
5965 11:04:31.870293 <6>[ 1.864787] mtu3 11201000.usb: xHCI platform device register success...
5966 11:04:31.876619 <4>[ 1.873373] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5967 11:04:31.883510 <6>[ 1.881315] xhci-mtk 11200000.usb: xHCI Host Controller
5968 11:04:31.890117 <6>[ 1.886821] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5969 11:04:31.896668 <6>[ 1.894539] xhci-mtk 11200000.usb: USB3 root hub has no ports
5970 11:04:31.906701 <6>[ 1.900569] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5971 11:04:31.913429 <6>[ 1.909987] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5972 11:04:31.920278 <6>[ 1.916067] xhci-mtk 11200000.usb: xHCI Host Controller
5973 11:04:31.926719 <6>[ 1.921558] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5974 11:04:31.933516 <6>[ 1.929216] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5975 11:04:31.936683 <6>[ 1.936030] hub 1-0:1.0: USB hub found
5976 11:04:31.939952 <6>[ 1.940058] hub 1-0:1.0: 1 port detected
5977 11:04:31.951000 <6>[ 1.945403] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5978 11:04:31.954128 <6>[ 1.954025] hub 2-0:1.0: USB hub found
5979 11:04:31.961117 <3>[ 1.958071] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5980 11:04:31.967895 <6>[ 1.965956] usbcore: registered new interface driver usb-storage
5981 11:04:31.974525 <6>[ 1.972561] usbcore: registered new device driver onboard-usb-hub
5982 11:04:31.988201 <4>[ 1.982888] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
5983 11:04:31.997484 <6>[ 1.995114] mt6397-rtc mt6358-rtc: registered as rtc0
5984 11:04:32.006995 <6>[ 2.000591] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-10T11:04:31 UTC (1720609471)
5985 11:04:32.010598 <6>[ 2.010462] i2c_dev: i2c /dev entries driver
5986 11:04:32.022942 <6>[ 2.016853] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5987 11:04:32.032493 <6>[ 2.025169] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5988 11:04:32.035643 <6>[ 2.034078] i2c 4-0058: Fixed dependency cycle(s) with /panel
5989 11:04:32.045646 <6>[ 2.040108] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
5990 11:04:32.061946 <6>[ 2.059539] cpu cpu0: EM: created perf domain
5991 11:04:32.071352 <6>[ 2.065009] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
5992 11:04:32.078086 <6>[ 2.076287] cpu cpu4: EM: created perf domain
5993 11:04:32.084793 <6>[ 2.082913] sdhci: Secure Digital Host Controller Interface driver
5994 11:04:32.091632 <6>[ 2.089357] sdhci: Copyright(c) Pierre Ossman
5995 11:04:32.098656 <6>[ 2.094764] Synopsys Designware Multimedia Card Interface Driver
5996 11:04:32.105045 <6>[ 2.095331] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
5997 11:04:32.108162 <6>[ 2.101850] sdhci-pltfm: SDHCI platform and OF driver helper
5998 11:04:32.116451 <6>[ 2.114339] ledtrig-cpu: registered to indicate activity on CPUs
5999 11:04:32.123917 <6>[ 2.122024] usbcore: registered new interface driver usbhid
6000 11:04:32.127571 <6>[ 2.127861] usbhid: USB HID core driver
6001 11:04:32.137884 <6>[ 2.132168] spi_master spi2: will run message pump with realtime priority
6002 11:04:32.144458 <4>[ 2.132406] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6003 11:04:32.151121 <4>[ 2.146845] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6004 11:04:32.177613 <6>[ 2.168990] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6005 11:04:32.197803 <6>[ 2.185577] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6006 11:04:32.204339 <4>[ 2.193524] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6007 11:04:32.207924 <6>[ 2.200272] cros-ec-spi spi2.0: Chrome EC device registered
6008 11:04:32.219279 <6>[ 2.217049] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6009 11:04:32.226174 <4>[ 2.217699] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6010 11:04:32.232827 <6>[ 2.224517] mmc0: new HS400 MMC card at address 0001
6011 11:04:32.239389 <4>[ 2.234765] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6012 11:04:32.246095 <6>[ 2.237595] mmcblk0: mmc0:0001 TB2932 29.2 GiB
6013 11:04:32.252572 <4>[ 2.244300] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6014 11:04:32.259607 <6>[ 2.257749] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6015 11:04:32.270611 <6>[ 2.265048] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6016 11:04:32.273993 <6>[ 2.265408] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
6017 11:04:32.284085 <6>[ 2.266804] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6018 11:04:32.293734 <6>[ 2.271857] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6019 11:04:32.300742 <6>[ 2.273345] NET: Registered PF_PACKET protocol family
6020 11:04:32.303801 <6>[ 2.278514] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
6021 11:04:32.307217 <6>[ 2.285955] 9pnet: Installing 9P2000 support
6022 11:04:32.313876 <6>[ 2.297726] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
6023 11:04:32.320616 <5>[ 2.302082] Key type dns_resolver registered
6024 11:04:32.330665 <6>[ 2.306086] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6025 11:04:32.340329 <6>[ 2.306179] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6026 11:04:32.348102 <6>[ 2.345685] registered taskstats version 1
6027 11:04:32.351094 <5>[ 2.350198] Loading compiled-in X.509 certificates
6028 11:04:32.364154 <6>[ 2.358919] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6029 11:04:32.405331 <3>[ 2.399704] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6030 11:04:32.435958 <6>[ 2.427317] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6031 11:04:32.447241 <6>[ 2.441649] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6032 11:04:32.456980 <6>[ 2.450245] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6033 11:04:32.463964 <6>[ 2.458798] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6034 11:04:32.474037 <6>[ 2.467324] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6035 11:04:32.480515 <6>[ 2.475847] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6036 11:04:32.490682 <6>[ 2.484368] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6037 11:04:32.497065 <6>[ 2.492901] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6038 11:04:32.504399 <6>[ 2.502298] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6039 11:04:32.512509 <6>[ 2.509857] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6040 11:04:32.519294 <6>[ 2.517162] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6041 11:04:32.529828 <6>[ 2.524488] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6042 11:04:32.536473 <6>[ 2.531974] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6043 11:04:32.539755 <6>[ 2.539605] hub 1-1:1.0: USB hub found
6044 11:04:32.546305 <6>[ 2.544094] hub 1-1:1.0: 3 ports detected
6045 11:04:32.553349 <6>[ 2.549073] panfrost 13040000.gpu: clock rate = 511999970
6046 11:04:32.562875 <6>[ 2.554786] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6047 11:04:32.569786 <6>[ 2.564973] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6048 11:04:32.579715 <6>[ 2.572984] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6049 11:04:32.589883 <6>[ 2.581418] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6050 11:04:32.596609 <6>[ 2.593497] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6051 11:04:32.607937 <6>[ 2.602615] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6052 11:04:32.617918 <6>[ 2.611244] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6053 11:04:32.628260 <6>[ 2.620394] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6054 11:04:32.634513 <6>[ 2.629525] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6055 11:04:32.644698 <6>[ 2.638653] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6056 11:04:32.654535 <6>[ 2.647955] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6057 11:04:32.664468 <6>[ 2.657257] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6058 11:04:32.674327 <6>[ 2.666730] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6059 11:04:32.680981 <6>[ 2.676212] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6060 11:04:32.690978 <6>[ 2.685340] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6061 11:04:32.763876 <6>[ 2.758489] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6062 11:04:32.773772 <6>[ 2.767387] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6063 11:04:32.784624 <6>[ 2.779076] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6064 11:04:32.864061 <6>[ 2.858814] usb 1-1.1: new high-speed USB device number 3 using xhci-mtk
6065 11:04:33.485808 <6>[ 2.964619] hub 1-1.1:1.0: USB hub found
6066 11:04:33.489031 <6>[ 2.964855] hub 1-1.1:1.0: 4 ports detected
6067 11:04:33.495559 <6>[ 3.467052] Console: switching to colour frame buffer device 170x48
6068 11:04:33.505367 <6>[ 3.499071] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6069 11:04:33.524537 <6>[ 3.515701] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6070 11:04:33.542198 <6>[ 3.533598] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6071 11:04:33.548965 <6>[ 3.546186] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6072 11:04:33.560103 <6>[ 3.554674] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6073 11:04:33.570113 <6>[ 3.562836] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6074 11:04:33.590213 <6>[ 3.581638] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6075 11:04:33.596823 <6>[ 3.592698] usb 1-1.2: new high-speed USB device number 4 using xhci-mtk
6076 11:04:33.603811 <6>[ 3.600185] Trying to probe devices needed for running init ...
6077 11:04:33.618945 <3>[ 3.613570] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: could not get audiosys reset:-517
6078 11:04:33.634994 <6>[ 3.626306] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6079 11:04:33.796288 <6>[ 3.791115] r8152-cfgselector 1-1.2: reset high-speed USB device number 4 using xhci-mtk
6080 11:04:33.921412 <4>[ 3.916023] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6081 11:04:33.931225 <4>[ 3.925308] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6082 11:04:33.973866 <6>[ 3.971744] r8152 1-1.2:1.0 eth0: v1.12.13
6083 11:04:33.994441 <6>[ 3.985656] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6084 11:04:34.004897 <6>[ 3.999361] usb 1-1.1.1: new high-speed USB device number 5 using xhci-mtk
6085 11:04:34.024213 <6>[ 4.015700] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6086 11:04:34.192147 <6>[ 4.186813] usb 1-1.3: new high-speed USB device number 6 using xhci-mtk
6087 11:04:34.333040 <6>[ 4.324362] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6088 11:04:34.384592 <6>[ 4.379298] r8152-cfgselector 1-1.1.1: reset high-speed USB device number 5 using xhci-mtk
6089 11:04:34.513698 <4>[ 4.508072] r8152 1-1.1.1:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6090 11:04:34.527922 <4>[ 4.522606] r8152 1-1.1.1:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6091 11:04:34.591426 <6>[ 4.589006] r8152 1-1.1.1:1.0 eth1: v1.12.13
6092 11:04:34.619503 <6>[ 4.610957] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6093 11:04:34.646606 <6>[ 4.637940] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6094 11:04:35.622745 <6>[ 5.620690] r8152 1-1.2:1.0 eth0: carrier on
6095 11:04:38.180835 <5>[ 5.642820] Sending DHCP requests .., OK
6096 11:04:38.193448 <6>[ 8.188215] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.17
6097 11:04:38.203972 <6>[ 8.201655] IP-Config: Complete:
6098 11:04:38.218868 <6>[ 8.210207] device=eth0, hwaddr=00:e0:4c:68:03:2b, ipaddr=192.168.201.17, mask=255.255.255.0, gw=192.168.201.1
6099 11:04:38.231765 <6>[ 8.226130] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5, domain=lava-rack, nis-domain=(none)
6100 11:04:38.245138 <6>[ 8.239530] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6101 11:04:38.252292 <6>[ 8.239539] nameserver0=192.168.201.1
6102 11:04:38.282359 <6>[ 8.279982] clk: Disabling unused clocks
6103 11:04:38.286769 <6>[ 8.288108] ALSA device list:
6104 11:04:38.296104 <6>[ 8.293644] No soundcards found.
6105 11:04:38.304115 <6>[ 8.301972] Freeing unused kernel memory: 8512K
6106 11:04:38.311154 <6>[ 8.308936] Run /init as init process
6107 11:04:38.321725 Loading, please wait...
6108 11:04:38.353723 Starting systemd-udevd version 252.22-1~deb12u1
6109 11:04:38.666645 <6>[ 8.661254] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6110 11:04:38.682726 <3>[ 8.674102] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6111 11:04:38.689806 <4>[ 8.676560] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6112 11:04:38.699427 <4>[ 8.678203] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6113 11:04:38.706242 <3>[ 8.684145] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6114 11:04:38.716030 <3>[ 8.684155] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6115 11:04:38.726062 <6>[ 8.687921] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6116 11:04:38.739082 <6>[ 8.692325] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6117 11:04:38.745930 <3>[ 8.701378] elan_i2c 2-0015: Error applying setting, reverse things back
6118 11:04:38.752447 <4>[ 8.702124] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6119 11:04:38.762369 <3>[ 8.716223] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6120 11:04:38.776322 <3>[ 8.734204] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6121 11:04:38.782311 <3>[ 8.741040] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6122 11:04:38.789712 <6>[ 8.744738] mc: Linux media interface: v0.10
6123 11:04:38.793203 <6>[ 8.774031] videodev: Linux video capture interface: v2.00
6124 11:04:38.803108 <3>[ 8.778478] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6125 11:04:38.809832 <6>[ 8.780289] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6126 11:04:38.816803 <6>[ 8.781720] r8152 1-1.1.1:1.0 enx88541f0f7aca: renamed from eth1
6127 11:04:38.827099 <6>[ 8.787122] cs_system_cfg: CoreSight Configuration manager initialised
6128 11:04:38.833884 <3>[ 8.791068] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6129 11:04:38.852736 <3>[ 8.847381] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6130 11:04:38.863058 <6>[ 8.855282] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6131 11:04:38.869625 <3>[ 8.855920] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6132 11:04:38.880220 <6>[ 8.874293] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6133 11:04:38.886360 <3>[ 8.874569] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6134 11:04:38.896466 <5>[ 8.875878] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6135 11:04:38.903125 <6>[ 8.883183] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6136 11:04:38.909750 <3>[ 8.883383] mtk-scp 10500000.scp: invalid resource
6137 11:04:38.916158 <6>[ 8.883450] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6138 11:04:38.922896 <6>[ 8.884561] remoteproc remoteproc0: scp is available
6139 11:04:38.929671 <4>[ 8.885407] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6140 11:04:38.936175 <6>[ 8.885416] remoteproc remoteproc0: powering up scp
6141 11:04:38.942981 <4>[ 8.885444] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6142 11:04:38.949493 <3>[ 8.885450] remoteproc remoteproc0: request_firmware failed: -2
6143 11:04:38.956144 <5>[ 8.887210] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6144 11:04:38.965969 <5>[ 8.887702] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6145 11:04:38.972601 <4>[ 8.887769] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6146 11:04:38.980098 <6>[ 8.887775] cfg80211: failed to load regulatory.db
6147 11:04:38.990492 <3>[ 8.891014] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6148 11:04:38.996574 <6>[ 8.899234] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6149 11:04:39.007189 <3>[ 8.906966] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6150 11:04:39.013722 <6>[ 8.914962] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6151 11:04:39.027828 <3>[ 8.920032] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6152 11:04:39.030957 <6>[ 8.920418] Bluetooth: Core ver 2.22
6153 11:04:39.037538 <6>[ 8.920486] NET: Registered PF_BLUETOOTH protocol family
6154 11:04:39.044122 <6>[ 8.920489] Bluetooth: HCI device and connection manager initialized
6155 11:04:39.047312 <6>[ 8.920505] Bluetooth: HCI socket layer initialized
6156 11:04:39.054658 <6>[ 8.920512] Bluetooth: L2CAP socket layer initialized
6157 11:04:39.061407 <6>[ 8.920524] Bluetooth: SCO socket layer initialized
6158 11:04:39.068071 <6>[ 8.920660] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6159 11:04:39.074700 <6>[ 8.921405] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6160 11:04:39.084601 <6>[ 8.924911] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6161 11:04:39.091396 <6>[ 8.924963] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6162 11:04:39.101408 <6>[ 8.925022] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6163 11:04:39.108178 <6>[ 8.925781] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6164 11:04:39.117997 <6>[ 8.926024] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video1 (81,1)
6165 11:04:39.124775 <6>[ 8.933294] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6166 11:04:39.135124 <3>[ 8.934239] debugfs: File 'Playback' in directory 'dapm' already present!
6167 11:04:39.141517 <3>[ 8.934249] debugfs: File 'Capture' in directory 'dapm' already present!
6168 11:04:39.151479 <6>[ 8.935768] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6169 11:04:39.158698 <3>[ 8.938334] thermal_sys: Failed to find 'trips' node
6170 11:04:39.166002 <3>[ 8.938342] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6171 11:04:39.172559 <3>[ 8.938351] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6172 11:04:39.180189 <4>[ 8.938356] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6173 11:04:39.193445 <6>[ 8.939835] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6174 11:04:39.197007 <3>[ 8.941046] thermal_sys: Failed to find 'trips' node
6175 11:04:39.211869 <3>[ 8.941051] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6176 11:04:39.224025 <3>[ 8.941059] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6177 11:04:39.237415 <4>[ 8.941064] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6178 11:04:39.248408 <6>[ 8.947037] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6179 11:04:39.256405 <6>[ 8.953228] usbcore: registered new interface driver uvcvideo
6180 11:04:39.264775 <6>[ 8.960538] Bluetooth: HCI UART driver ver 2.3
6181 11:04:39.275366 <6>[ 9.000882] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6182 11:04:39.283920 <6>[ 9.001680] Bluetooth: HCI UART protocol H4 registered
6183 11:04:39.294964 <6>[ 9.010120] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6184 11:04:39.301708 <6>[ 9.018107] Bluetooth: HCI UART protocol LL registered
6185 11:04:39.315705 <6>[ 9.030227] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6186 11:04:39.322332 <6>[ 9.033689] Bluetooth: HCI UART protocol Three-wire (H5) registered
6187 11:04:39.333955 <4>[ 9.152866] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6188 11:04:39.340775 <4>[ 9.152866] Fallback method does not support PEC.
6189 11:04:39.347049 <6>[ 9.155971] Bluetooth: HCI UART protocol Broadcom registered
6190 11:04:39.357418 <3>[ 9.163581] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6191 11:04:39.364175 <6>[ 9.168221] Bluetooth: HCI UART protocol QCA registered
6192 11:04:39.371185 <6>[ 9.169175] Bluetooth: hci0: setting up ROME/QCA6390
6193 11:04:39.381372 <3>[ 9.182597] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6194 11:04:39.388205 <6>[ 9.184183] Bluetooth: HCI UART protocol Marvell registered
6195 11:04:39.400292 <6>[ 9.188341] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6196 11:04:39.403436 Begin: Loading essential drivers ... done.
6197 11:04:39.409844 <3>[ 9.382003] Bluetooth: hci0: Frame reassembly failed (-84)
6198 11:04:39.413167 Begin: Running /scripts/init-premount ... done.
6199 11:04:39.419986 Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
6200 11:04:39.429885 Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
6201 11:04:39.433379 Device /sys/class/net/enx88541f0f7aca found
6202 11:04:39.433455 done.
6203 11:04:39.443200 Begin: Waiting up to 180 secs for any network device to become available ... done.
6204 11:04:39.524246 IP-Config: enx88541f0f7aca hardware address 88:54:1f:0f:7a:ca mtu 1500 DHCP
6205 11:04:39.545123 IP-Config: eth0 hardware address 00:e0:4c:68:03:2b mtu 1500 DHCP
6206 11:04:39.551772 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6207 11:04:39.558388 address: 192.168.201.17 broadcast: 192.168.201.255 netmask: 255.255.255.0
6208 11:04:39.565013 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6209 11:04:39.571838 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-5
6210 11:04:39.578029 domain : lava-rack
6211 11:04:39.581574 rootserver: 192.168.201.1 rootpath:
6212 11:04:39.581651 filename :
6213 11:04:39.594447 done.
6214 11:04:39.600516 Begin: Running /scripts/nfs-bottom ... done.
6215 11:04:39.617952 Begin: Running /scripts/init-bottom ... done.
6216 11:04:39.682707 <6>[ 9.680171] Bluetooth: hci0: QCA Product ID :0x00000008
6217 11:04:39.690253 <6>[ 9.688264] Bluetooth: hci0: QCA SOC Version :0x00000044
6218 11:04:39.698499 <6>[ 9.696369] Bluetooth: hci0: QCA ROM Version :0x00000302
6219 11:04:39.706672 <6>[ 9.704467] Bluetooth: hci0: QCA Patch Version:0x00000111
6220 11:04:39.715886 <6>[ 9.713726] Bluetooth: hci0: QCA controller version 0x00440302
6221 11:04:39.722409 <6>[ 9.713735] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6222 11:04:39.735425 <4>[ 9.714527] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6223 11:04:39.750397 <3>[ 9.745044] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6224 11:04:39.760518 <6>[ 9.748505] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6225 11:04:39.766744 <3>[ 9.753320] Bluetooth: hci0: QCA Failed to download patch (-2)
6226 11:04:39.838635 <4>[ 9.832895] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6227 11:04:39.858086 <4>[ 9.852682] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6228 11:04:39.874045 <4>[ 9.868500] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6229 11:04:39.884399 <4>[ 9.882239] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6230 11:04:40.973083 <6>[ 10.970895] NET: Registered PF_INET6 protocol family
6231 11:04:40.984940 <6>[ 10.982918] Segment Routing with IPv6
6232 11:04:40.992470 <6>[ 10.990008] In-situ OAM (IOAM) with IPv6
6233 11:04:41.169396 <30>[ 11.140660] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6234 11:04:41.188891 <30>[ 11.186744] systemd[1]: Detected architecture arm64.
6235 11:04:41.198564
6236 11:04:41.201854 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6237 11:04:41.201931
6238 11:04:41.225626 <30>[ 11.223405] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6239 11:04:42.196650 <30>[ 12.191256] systemd[1]: Queued start job for default target graphical.target.
6240 11:04:42.237976 <30>[ 12.232519] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6241 11:04:42.250715 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6242 11:04:42.270586 <30>[ 12.265154] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6243 11:04:42.284298 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6244 11:04:42.302750 <30>[ 12.297259] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6245 11:04:42.317013 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6246 11:04:42.333866 <30>[ 12.328437] systemd[1]: Created slice user.slice - User and Session Slice.
6247 11:04:42.346120 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6248 11:04:42.368477 <30>[ 12.359420] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6249 11:04:42.381689 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6250 11:04:42.404687 <30>[ 12.395445] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6251 11:04:42.414667 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6252 11:04:42.443404 <30>[ 12.427252] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6253 11:04:42.460493 <30>[ 12.454471] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6254 11:04:42.467753 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6255 11:04:42.484836 <30>[ 12.478991] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6256 11:04:42.497355 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6257 11:04:42.513327 <30>[ 12.507040] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6258 11:04:42.527408 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6259 11:04:42.541965 <30>[ 12.539092] systemd[1]: Reached target paths.target - Path Units.
6260 11:04:42.556750 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6261 11:04:42.572890 <30>[ 12.566987] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6262 11:04:42.585757 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6263 11:04:42.597768 <30>[ 12.594953] systemd[1]: Reached target slices.target - Slice Units.
6264 11:04:42.612516 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6265 11:04:42.626184 <30>[ 12.622998] systemd[1]: Reached target swap.target - Swaps.
6266 11:04:42.636600 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6267 11:04:42.656794 <30>[ 12.651043] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6268 11:04:42.670884 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6269 11:04:42.689346 <30>[ 12.683421] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6270 11:04:42.703296 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6271 11:04:42.724449 <30>[ 12.718288] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6272 11:04:42.738157 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6273 11:04:42.763365 <30>[ 12.757135] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6274 11:04:42.777584 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6275 11:04:42.793808 <30>[ 12.787732] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6276 11:04:42.806046 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6277 11:04:42.827567 <30>[ 12.821196] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6278 11:04:42.841443 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6279 11:04:42.860588 <30>[ 12.854346] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6280 11:04:42.873744 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6281 11:04:42.893736 <30>[ 12.887605] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6282 11:04:42.906800 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6283 11:04:42.949142 <30>[ 12.943292] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6284 11:04:42.961919 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6285 11:04:42.987052 <30>[ 12.981191] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6286 11:04:43.000289 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6287 11:04:43.021451 <30>[ 13.015329] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6288 11:04:43.033252 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6289 11:04:43.056857 <30>[ 13.043856] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6290 11:04:43.114174 <30>[ 13.107874] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6291 11:04:43.128131 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6292 11:04:43.151654 <30>[ 13.145396] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6293 11:04:43.162846 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6294 11:04:43.187734 <30>[ 13.181604] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6295 11:04:43.198479 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6296 11:04:43.235650 <6>[ 13.229444] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6297 11:04:43.247136 <30>[ 13.239579] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6298 11:04:43.258520 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6299 11:04:43.283855 <30>[ 13.277480] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6300 11:04:43.295321 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6301 11:04:43.354173 <30>[ 13.348233] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6302 11:04:43.366685 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6303 11:04:43.392097 <30>[ 13.386198] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6304 11:04:43.405961 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kern<6>[ 13.405146] fuse: init (API version 7.37)
6305 11:04:43.409243 el Module loop...
6306 11:04:43.453612 <30>[ 13.447713] systemd[1]: Starting systemd-journald.service - Journal Service...
6307 11:04:43.464906 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6308 11:04:43.490079 <30>[ 13.483958] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6309 11:04:43.500614 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6310 11:04:43.532787 <30>[ 13.523752] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6311 11:04:43.544780 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6312 11:04:43.593586 <30>[ 13.587732] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6313 11:04:43.607545 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6314 11:04:43.630631 <30>[ 13.624582] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6315 11:04:43.643641 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6316 11:04:43.666768 <30>[ 13.660498] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6317 11:04:43.676665 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6318 11:04:43.693914 <30>[ 13.688109] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6319 11:04:43.707336 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6320 11:04:43.717914 <3>[ 13.711917] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6321 11:04:43.725160 <30>[ 13.721194] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6322 11:04:43.735092 <3>[ 13.727137] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6323 11:04:43.746708 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6324 11:04:43.753336 <3>[ 13.748102] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6325 11:04:43.766060 <30>[ 13.758202] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6326 11:04:43.773025 <3>[ 13.762879] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6327 11:04:43.787880 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate <3>[ 13.782735] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6328 11:04:43.791269 List of Static Device Nodes.
6329 11:04:43.805899 <3>[ 13.799039] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6330 11:04:43.812996 <30>[ 13.808604] systemd[1]: modprobe@configfs.service: Deactivated successfully.
6331 11:04:43.823085 <3>[ 13.815424] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6332 11:04:43.830798 <30>[ 13.816907] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
6333 11:04:43.840856 <3>[ 13.831432] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6334 11:04:43.855928 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6335 11:04:43.873987 <30>[ 13.867440] systemd[1]: Started systemd-journald.service - Journal Service.
6336 11:04:43.880387 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6337 11:04:43.903039 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6338 11:04:43.924460 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6339 11:04:43.948624 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6340 11:04:43.967817 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6341 11:04:43.992118 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6342 11:04:44.011081 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6343 11:04:44.034981 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6344 11:04:44.054882 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6345 11:04:44.076222 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6346 11:04:44.132241 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Contr<4>[ 14.117354] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6347 11:04:44.132770 ol File System...
6348 11:04:44.142151 <3>[ 14.135293] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6349 11:04:44.156930 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6350 11:04:44.177865 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6351 11:04:44.201322 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6352 11:04:44.229394 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6353 11:04:44.254546 Starting [0;1;39msyste<46>[ 14.246706] systemd-journald[323]: Received client request to flush runtime journal.
6354 11:04:44.257933 md-sysusers.…rvice[0m - Create System Users...
6355 11:04:44.286528 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6356 11:04:44.306794 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6357 11:04:44.326160 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6358 11:04:44.351205 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6359 11:04:44.371187 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6360 11:04:45.382944 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6361 11:04:45.425981 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6362 11:04:45.736514 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6363 11:04:45.845442 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6364 11:04:45.866155 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6365 11:04:45.885570 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6366 11:04:45.937759 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6367 11:04:45.963634 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6368 11:04:46.217475 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6369 11:04:46.277386 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6370 11:04:46.319210 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6371 11:04:46.515381 <4>[ 16.512600] power_supply_show_property: 4 callbacks suppressed
6372 11:04:46.526671 <3>[ 16.512618] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6373 11:04:46.543523 <3>[ 16.536811] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6374 11:04:46.558747 <3>[ 16.552377] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6375 11:04:46.575657 [[0;32m OK [<3>[ 16.569016] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6376 11:04:46.582988 0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6377 11:04:46.589814 <3>[ 16.585420] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6378 11:04:46.605556 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m<3>[ 16.600366] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6379 11:04:46.608833 - Bluetooth Support.
6380 11:04:46.625809 <3>[ 16.619444] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6381 11:04:46.645379 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6382 11:04:46.661192 <3>[ 16.654870] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6383 11:04:46.678045 <3>[ 16.671272] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6384 11:04:46.688137 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6385 11:04:46.712115 <3>[ 16.705723] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6386 11:04:46.741488 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6387 11:04:46.787070 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6388 11:04:46.853592 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6389 11:04:46.874784 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6390 11:04:46.901337 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6391 11:04:46.969835 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6392 11:04:47.066761 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6393 11:04:47.090450 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6394 11:04:47.116526 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6395 11:04:47.140303 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6396 11:04:47.167023 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6397 11:04:47.189844 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6398 11:04:47.215045 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6399 11:04:47.237554 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6400 11:04:47.257870 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6401 11:04:47.279458 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6402 11:04:47.302061 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6403 11:04:47.324486 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6404 11:04:47.356029 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6405 11:04:47.410504 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6406 11:04:47.430585 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6407 11:04:47.454198 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6408 11:04:47.478241 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6409 11:04:47.498180 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6410 11:04:47.518100 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6411 11:04:47.536538 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6412 11:04:47.559196 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6413 11:04:47.579129 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6414 11:04:47.627538 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6415 11:04:47.653753 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6416 11:04:47.687968 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6417 11:04:47.788698 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6418 11:04:47.818247 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6419 11:04:47.841634 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6420 11:04:47.858634 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6421 11:04:47.981973 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6422 11:04:48.062921 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6423 11:04:48.130680 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6424 11:04:48.149943 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6425 11:04:48.172046 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6426 11:04:48.206436 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6427 11:04:48.229683 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6428 11:04:48.252930 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6429 11:04:48.274964 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6430 11:04:48.323087 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6431 11:04:48.390471 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6432 11:04:48.493040
6433 11:04:48.496120 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6434 11:04:48.496523
6435 11:04:48.499538 debian-bookworm-arm64 login: root (automatic login)
6436 11:04:48.499927
6437 11:04:48.785697 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Wed Jul 10 10:43:20 UTC 2024 aarch64
6438 11:04:48.786130
6439 11:04:48.792502 The programs included with the Debian GNU/Linux system are free software;
6440 11:04:48.799254 the exact distribution terms for each program are described in the
6441 11:04:48.802371 individual files in /usr/share/doc/*/copyright.
6442 11:04:48.802930
6443 11:04:48.808819 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6444 11:04:48.812099 permitted by applicable law.
6445 11:04:50.064034 Matched prompt #10: / #
6447 11:04:50.065143 Setting prompt string to ['/ #']
6448 11:04:50.065652 end: 2.2.5.1 login-action (duration 00:00:21) [common]
6450 11:04:50.066628 end: 2.2.5 auto-login-action (duration 00:00:21) [common]
6451 11:04:50.067069 start: 2.2.6 expect-shell-connection (timeout 00:03:46) [common]
6452 11:04:50.067419 Setting prompt string to ['/ #']
6453 11:04:50.067726 Forcing a shell prompt, looking for ['/ #']
6454 11:04:50.068022 Sending line: ''
6456 11:04:50.119125 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6457 11:04:50.119566 Waiting using forced prompt support (timeout 00:02:30)
6458 11:04:50.125171 / #
6459 11:04:50.126080 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6460 11:04:50.126560 start: 2.2.7 export-device-env (timeout 00:03:46) [common]
6461 11:04:50.126943 Sending line: "export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14786780/extract-nfsrootfs-f7ihucu9'"
6463 11:04:50.234105 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14786780/extract-nfsrootfs-f7ihucu9'
6464 11:04:50.234868 Sending line: "export NFS_SERVER_IP='192.168.201.1'"
6466 11:04:50.342196 / # export NFS_SERVER_IP='192.168.201.1'
6467 11:04:50.343101 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6468 11:04:50.343597 end: 2.2 depthcharge-retry (duration 00:01:14) [common]
6469 11:04:50.344069 end: 2 depthcharge-action (duration 00:01:14) [common]
6470 11:04:50.344540 start: 3 lava-test-retry (timeout 00:08:05) [common]
6471 11:04:50.344994 start: 3.1 lava-test-shell (timeout 00:08:05) [common]
6472 11:04:50.345419 Using namespace: common
6473 11:04:50.345780 Sending line: '#'
6475 11:04:50.447214 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6476 11:04:50.452810 / # #
6477 11:04:50.453564 Using /lava-14786780
6478 11:04:50.453918 Sending line: 'export SHELL=/bin/bash'
6480 11:04:50.560983 / # export SHELL=/bin/bash
6481 11:04:50.561775 Sending line: '. /lava-14786780/environment'
6483 11:04:50.668579 / # . /lava-14786780/environment
6484 11:04:50.674763 Sending line: '/lava-14786780/bin/lava-test-runner /lava-14786780/0'
6486 11:04:50.776325 Test shell timeout: 10s (minimum of the action and connection timeout)
6487 11:04:50.781831 / # /lava-14786780/bin/lava-test-runner /lava-14786780/0
6488 11:04:51.070515 + export TESTRUN_ID=0_timesync-off
6489 11:04:51.073551 + TESTRUN_ID=0_timesync-off
6490 11:04:51.076908 + cd /lava-14786780/0/tests/0_timesync-off
6491 11:04:51.080146 ++ cat uuid
6492 11:04:51.084649 + UUID=14786780_1.6.2.3.1
6493 11:04:51.085046 + set +x
6494 11:04:51.091286 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14786780_1.6.2.3.1>
6495 11:04:51.091962 Received signal: <STARTRUN> 0_timesync-off 14786780_1.6.2.3.1
6496 11:04:51.092297 Starting test lava.0_timesync-off (14786780_1.6.2.3.1)
6497 11:04:51.092676 Skipping test definition patterns.
6498 11:04:51.094334 + systemctl stop systemd-timesyncd
6499 11:04:51.150450 + set +x
6500 11:04:51.153711 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14786780_1.6.2.3.1>
6501 11:04:51.154397 Received signal: <ENDRUN> 0_timesync-off 14786780_1.6.2.3.1
6502 11:04:51.154787 Ending use of test pattern.
6503 11:04:51.155102 Ending test lava.0_timesync-off (14786780_1.6.2.3.1), duration 0.06
6505 11:04:51.231900 + export TESTRUN_ID=1_kselftest-tpm2
6506 11:04:51.235238 + TESTRUN_ID=1_kselftest-tpm2
6507 11:04:51.238951 + cd /lava-14786780/0/tests/1_kselftest-tpm2
6508 11:04:51.242045 ++ cat uuid
6509 11:04:51.247265 + UUID=14786780_1.6.2.3.5
6510 11:04:51.247721 + set +x
6511 11:04:51.253387 <LAVA_SIGNAL_STARTRUN 1_kselftest-tpm2 14786780_1.6.2.3.5>
6512 11:04:51.254018 Received signal: <STARTRUN> 1_kselftest-tpm2 14786780_1.6.2.3.5
6513 11:04:51.254388 Starting test lava.1_kselftest-tpm2 (14786780_1.6.2.3.5)
6514 11:04:51.254792 Skipping test definition patterns.
6515 11:04:51.257059 + cd ./automated/linux/kselftest/
6516 11:04:51.283610 + ./kselftest.sh -c tpm2 -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1 -E ''
6517 11:04:51.333340 INFO: install_deps skipped
6518 11:04:51.838212 --2024-07-10 11:04:51-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz
6519 11:04:51.856281 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6520 11:04:51.989867 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6521 11:04:52.122901 HTTP request sent, awaiting response... 200 OK
6522 11:04:52.125828 Length: 1919896 (1.8M) [application/octet-stream]
6523 11:04:52.129066 Saving to: 'kselftest_armhf.tar.gz'
6524 11:04:52.129548
6525 11:04:52.129886
6526 11:04:52.388941 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6527 11:04:52.654813 kselftest_armhf.tar 2%[ ] 44.98K 169KB/s
6528 11:04:52.969322 kselftest_armhf.tar 11%[=> ] 213.25K 401KB/s
6529 11:04:53.110117 kselftest_armhf.tar 43%[=======> ] 814.23K 962KB/s
6530 11:04:53.116653 kselftest_armhf.tar 100%[===================>] 1.83M 1.85MB/s in 1.0s
6531 11:04:53.116736
6532 11:04:53.285049 2024-07-10 11:04:53 (1.85 MB/s) - 'kselftest_armhf.tar.gz' saved [1919896/1919896]
6533 11:04:53.285182
6534 11:05:00.196270 skiplist:
6535 11:05:00.199504 ========================================
6536 11:05:00.202763 ========================================
6537 11:05:00.251871 tpm2:test_smoke.sh
6538 11:05:00.255048 tpm2:test_space.sh
6539 11:05:00.274064 ============== Tests to run ===============
6540 11:05:00.277291 tpm2:test_smoke.sh
6541 11:05:00.277678 tpm2:test_space.sh
6542 11:05:00.281283 ===========End Tests to run ===============
6543 11:05:00.284801 shardfile-tpm2 pass
6544 11:05:00.408457 <12>[ 30.405595] kselftest: Running tests in tpm2
6545 11:05:00.420796 TAP version 13
6546 11:05:00.438101 1..2
6547 11:05:00.474516 # selftests: tpm2: test_smoke.sh
6548 11:05:02.439820 # test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite) ... ERROR
6549 11:05:02.446624 # test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp) ... ERROR
6550 11:05:02.452623 # Exception ignored in: <function Client.__del__ at 0xffffa07cccc0>
6551 11:05:02.456757 # Traceback (most recent call last):
6552 11:05:02.466205 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6553 11:05:02.466708 # if self.tpm:
6554 11:05:02.469535 # ^^^^^^^^
6555 11:05:02.472871 # AttributeError: 'Client' object has no attribute 'tpm'
6556 11:05:02.479498 # test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth) ... ERROR
6557 11:05:02.486827 # Exception ignored in: <function Client.__del__ at 0xffffa07cccc0>
6558 11:05:02.489583 # Traceback (most recent call last):
6559 11:05:02.499827 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6560 11:05:02.500340 # if self.tpm:
6561 11:05:02.502875 # ^^^^^^^^
6562 11:05:02.506105 # AttributeError: 'Client' object has no attribute 'tpm'
6563 11:05:02.512757 # test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy) ... ERROR
6564 11:05:02.520110 # Exception ignored in: <function Client.__del__ at 0xffffa07cccc0>
6565 11:05:02.523148 # Traceback (most recent call last):
6566 11:05:02.532971 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6567 11:05:02.536429 # if self.tpm:
6568 11:05:02.536944 # ^^^^^^^^
6569 11:05:02.543110 # AttributeError: 'Client' object has no attribute 'tpm'
6570 11:05:02.549553 # test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth) ... ERROR
6571 11:05:02.556400 # Exception ignored in: <function Client.__del__ at 0xffffa07cccc0>
6572 11:05:02.559933 # Traceback (most recent call last):
6573 11:05:02.569842 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6574 11:05:02.570353 # if self.tpm:
6575 11:05:02.572924 # ^^^^^^^^
6576 11:05:02.576528 # AttributeError: 'Client' object has no attribute 'tpm'
6577 11:05:02.583177 # test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds) ... ERROR
6578 11:05:02.589775 # Exception ignored in: <function Client.__del__ at 0xffffa07cccc0>
6579 11:05:02.593154 # Traceback (most recent call last):
6580 11:05:02.603093 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6581 11:05:02.606586 # if self.tpm:
6582 11:05:02.606986 # ^^^^^^^^
6583 11:05:02.613517 # AttributeError: 'Client' object has no attribute 'tpm'
6584 11:05:02.619568 # test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd) ... ERROR
6585 11:05:02.623223 # Exception ignored in: <function Client.__del__ at 0xffffa07cccc0>
6586 11:05:02.626742 # Traceback (most recent call last):
6587 11:05:02.636714 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6588 11:05:02.639951 # if self.tpm:
6589 11:05:02.640334 # ^^^^^^^^
6590 11:05:02.646758 # AttributeError: 'Client' object has no attribute 'tpm'
6591 11:05:02.653251 # test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth) ... ERROR
6592 11:05:02.660088 # Exception ignored in: <function Client.__del__ at 0xffffa07cccc0>
6593 11:05:02.663363 # Traceback (most recent call last):
6594 11:05:02.673451 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6595 11:05:02.673887 # if self.tpm:
6596 11:05:02.676820 # ^^^^^^^^
6597 11:05:02.680170 # AttributeError: 'Client' object has no attribute 'tpm'
6598 11:05:02.690265 # test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy) ... ERROR
6599 11:05:02.696970 # Exception ignored in: <function Client.__del__ at 0xffffa07cccc0>
6600 11:05:02.700231 # Traceback (most recent call last):
6601 11:05:02.710450 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6602 11:05:02.710920 # if self.tpm:
6603 11:05:02.713716 # ^^^^^^^^
6604 11:05:02.717044 # AttributeError: 'Client' object has no attribute 'tpm'
6605 11:05:02.717566 #
6606 11:05:02.723491 # ======================================================================
6607 11:05:02.733611 # ERROR: test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite)
6608 11:05:02.740294 # ----------------------------------------------------------------------
6609 11:05:02.743715 # Traceback (most recent call last):
6610 11:05:02.753867 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 16, in setUp
6611 11:05:02.757043 # self.root_key = self.client.create_root_key()
6612 11:05:02.763792 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6613 11:05:02.773818 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6614 11:05:02.777033 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6615 11:05:02.783951 # ^^^^^^^^^^^^^^^^^^
6616 11:05:02.793957 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6617 11:05:02.797203 # raise ProtocolError(cc, rc)
6618 11:05:02.804004 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6619 11:05:02.804598 #
6620 11:05:02.810850 # ======================================================================
6621 11:05:02.817602 # ERROR: test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp)
6622 11:05:02.823813 # ----------------------------------------------------------------------
6623 11:05:02.827979 # Traceback (most recent call last):
6624 11:05:02.837181 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6625 11:05:02.840453 # self.client = tpm2.Client()
6626 11:05:02.843832 # ^^^^^^^^^^^^^
6627 11:05:02.854052 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6628 11:05:02.857543 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6629 11:05:02.860600 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6630 11:05:02.868100 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6631 11:05:02.868540 #
6632 11:05:02.873701 # ======================================================================
6633 11:05:02.880294 # ERROR: test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth)
6634 11:05:02.887173 # ----------------------------------------------------------------------
6635 11:05:02.890449 # Traceback (most recent call last):
6636 11:05:02.900950 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6637 11:05:02.904109 # self.client = tpm2.Client()
6638 11:05:02.907762 # ^^^^^^^^^^^^^
6639 11:05:02.917469 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6640 11:05:02.920672 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6641 11:05:02.927521 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6642 11:05:02.930759 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6643 11:05:02.931278 #
6644 11:05:02.937526 # ======================================================================
6645 11:05:02.944161 # ERROR: test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy)
6646 11:05:02.950940 # ----------------------------------------------------------------------
6647 11:05:02.954329 # Traceback (most recent call last):
6648 11:05:02.964141 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6649 11:05:02.967607 # self.client = tpm2.Client()
6650 11:05:02.970918 # ^^^^^^^^^^^^^
6651 11:05:02.980844 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6652 11:05:02.987345 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6653 11:05:02.990873 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6654 11:05:02.997580 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6655 11:05:02.998064 #
6656 11:05:03.004323 # ======================================================================
6657 11:05:03.011092 # ERROR: test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth)
6658 11:05:03.017571 # ----------------------------------------------------------------------
6659 11:05:03.020993 # Traceback (most recent call last):
6660 11:05:03.031095 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6661 11:05:03.034754 # self.client = tpm2.Client()
6662 11:05:03.037751 # ^^^^^^^^^^^^^
6663 11:05:03.048080 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6664 11:05:03.051180 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6665 11:05:03.057704 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6666 11:05:03.061083 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6667 11:05:03.061509 #
6668 11:05:03.067736 # ======================================================================
6669 11:05:03.074446 # ERROR: test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds)
6670 11:05:03.080927 # ----------------------------------------------------------------------
6671 11:05:03.084513 # Traceback (most recent call last):
6672 11:05:03.094821 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6673 11:05:03.097645 # self.client = tpm2.Client()
6674 11:05:03.100905 # ^^^^^^^^^^^^^
6675 11:05:03.110888 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6676 11:05:03.117741 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6677 11:05:03.121062 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6678 11:05:03.127790 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6679 11:05:03.128267 #
6680 11:05:03.134306 # ======================================================================
6681 11:05:03.141191 # ERROR: test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd)
6682 11:05:03.147743 # ----------------------------------------------------------------------
6683 11:05:03.151000 # Traceback (most recent call last):
6684 11:05:03.160997 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6685 11:05:03.164449 # self.client = tpm2.Client()
6686 11:05:03.164883 # ^^^^^^^^^^^^^
6687 11:05:03.174306 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6688 11:05:03.181261 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6689 11:05:03.184484 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6690 11:05:03.191457 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6691 11:05:03.191981 #
6692 11:05:03.197845 # ======================================================================
6693 11:05:03.204625 # ERROR: test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth)
6694 11:05:03.211406 # ----------------------------------------------------------------------
6695 11:05:03.215022 # Traceback (most recent call last):
6696 11:05:03.224692 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6697 11:05:03.227738 # self.client = tpm2.Client()
6698 11:05:03.231260 # ^^^^^^^^^^^^^
6699 11:05:03.241300 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6700 11:05:03.247864 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6701 11:05:03.251503 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6702 11:05:03.258226 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6703 11:05:03.258662 #
6704 11:05:03.265311 # ======================================================================
6705 11:05:03.271347 # ERROR: test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy)
6706 11:05:03.278076 # ----------------------------------------------------------------------
6707 11:05:03.281461 # Traceback (most recent call last):
6708 11:05:03.291972 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6709 11:05:03.294814 # self.client = tpm2.Client()
6710 11:05:03.298196 # ^^^^^^^^^^^^^
6711 11:05:03.308812 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6712 11:05:03.314262 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6713 11:05:03.317882 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6714 11:05:03.324620 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6715 11:05:03.325015 #
6716 11:05:03.331370 # ----------------------------------------------------------------------
6717 11:05:03.331907 # Ran 9 tests in 0.067s
6718 11:05:03.332284 #
6719 11:05:03.335213 # FAILED (errors=9)
6720 11:05:03.341953 # test_async (tpm2_tests.AsyncTest.test_async) ... ok
6721 11:05:03.348601 # test_flush_invalid_context (tpm2_tests.AsyncTest.test_flush_invalid_context) ... ok
6722 11:05:03.349114 #
6723 11:05:03.352408 # ----------------------------------------------------------------------
6724 11:05:03.358303 # Ran 2 tests in 0.033s
6725 11:05:03.358859 #
6726 11:05:03.359201 # OK
6727 11:05:03.361561 ok 1 selftests: tpm2: test_smoke.sh
6728 11:05:03.361994 # selftests: tpm2: test_space.sh
6729 11:05:03.368628 # test_flush_context (tpm2_tests.SpaceTest.test_flush_context) ... ERROR
6730 11:05:03.376262 # test_get_handles (tpm2_tests.SpaceTest.test_get_handles) ... ERROR
6731 11:05:03.383707 # test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc) ... ERROR
6732 11:05:03.399488 # test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces) ... ERROR
6733 11:05:03.399969 #
6734 11:05:03.405925 # ======================================================================
6735 11:05:03.412739 # ERROR: test_flush_context (tpm2_tests.SpaceTest.test_flush_context)
6736 11:05:03.419416 # ----------------------------------------------------------------------
6737 11:05:03.422631 # Traceback (most recent call last):
6738 11:05:03.432518 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 261, in test_flush_context
6739 11:05:03.435820 # root1 = space1.create_root_key()
6740 11:05:03.439284 # ^^^^^^^^^^^^^^^^^^^^^^^^
6741 11:05:03.449458 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6742 11:05:03.455914 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6743 11:05:03.459539 # ^^^^^^^^^^^^^^^^^^
6744 11:05:03.469572 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6745 11:05:03.472971 # raise ProtocolError(cc, rc)
6746 11:05:03.479842 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6747 11:05:03.480533 #
6748 11:05:03.486192 # ======================================================================
6749 11:05:03.492949 # ERROR: test_get_handles (tpm2_tests.SpaceTest.test_get_handles)
6750 11:05:03.499479 # ----------------------------------------------------------------------
6751 11:05:03.502818 # Traceback (most recent call last):
6752 11:05:03.512907 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 271, in test_get_handles
6753 11:05:03.516178 # space1.create_root_key()
6754 11:05:03.526350 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6755 11:05:03.533394 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6756 11:05:03.536451 # ^^^^^^^^^^^^^^^^^^
6757 11:05:03.546492 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6758 11:05:03.549983 # raise ProtocolError(cc, rc)
6759 11:05:03.556381 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6760 11:05:03.556807 #
6761 11:05:03.563064 # ======================================================================
6762 11:05:03.566833 # ERROR: test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc)
6763 11:05:03.573321 # ----------------------------------------------------------------------
6764 11:05:03.576543 # Traceback (most recent call last):
6765 11:05:03.590171 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 290, in test_invalid_cc
6766 11:05:03.593484 # root1 = space1.create_root_key()
6767 11:05:03.596947 # ^^^^^^^^^^^^^^^^^^^^^^^^
6768 11:05:03.607020 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6769 11:05:03.613737 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6770 11:05:03.616913 # ^^^^^^^^^^^^^^^^^^
6771 11:05:03.626878 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6772 11:05:03.630244 # raise ProtocolError(cc, rc)
6773 11:05:03.636806 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6774 11:05:03.637278 #
6775 11:05:03.643880 # ======================================================================
6776 11:05:03.650373 # ERROR: test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces)
6777 11:05:03.653774 # ----------------------------------------------------------------------
6778 11:05:03.660103 # Traceback (most recent call last):
6779 11:05:03.670101 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 247, in test_make_two_spaces
6780 11:05:03.673784 # root1 = space1.create_root_key()
6781 11:05:03.676889 # ^^^^^^^^^^^^^^^^^^^^^^^^
6782 11:05:03.687080 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6783 11:05:03.693990 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6784 11:05:03.697018 # ^^^^^^^^^^^^^^^^^^
6785 11:05:03.707422 # File "/lava-14786780/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6786 11:05:03.710510 # raise ProtocolError(cc, rc)
6787 11:05:03.717220 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6788 11:05:03.717640 #
6789 11:05:03.723928 # ----------------------------------------------------------------------
6790 11:05:03.724360 # Ran 4 tests in 0.097s
6791 11:05:03.727153 #
6792 11:05:03.727540 # FAILED (errors=4)
6793 11:05:03.730809 not ok 2 selftests: tpm2: test_space.sh # exit=1
6794 11:05:04.150724 tpm2_test_smoke_sh pass
6795 11:05:04.153958 tpm2_test_space_sh fail
6796 11:05:04.236789 + ../../utils/send-to-lava.sh ./output/result.txt
6797 11:05:04.317981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-tpm2 RESULT=pass>
6798 11:05:04.318733 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-tpm2 RESULT=pass
6800 11:05:04.376486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass>
6801 11:05:04.377172 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass
6803 11:05:04.432621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_space_sh RESULT=fail>
6804 11:05:04.433287 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_space_sh RESULT=fail
6806 11:05:04.435732 + set +x
6807 11:05:04.439123 <LAVA_SIGNAL_ENDRUN 1_kselftest-tpm2 14786780_1.6.2.3.5>
6808 11:05:04.439764 Received signal: <ENDRUN> 1_kselftest-tpm2 14786780_1.6.2.3.5
6809 11:05:04.440113 Ending use of test pattern.
6810 11:05:04.440397 Ending test lava.1_kselftest-tpm2 (14786780_1.6.2.3.5), duration 13.19
6812 11:05:04.442589 <LAVA_TEST_RUNNER EXIT>
6813 11:05:04.443210 ok: lava_test_shell seems to have completed
6814 11:05:04.443707 shardfile-tpm2: pass
tpm2_test_smoke_sh: pass
tpm2_test_space_sh: fail
6815 11:05:04.444097 end: 3.1 lava-test-shell (duration 00:00:14) [common]
6816 11:05:04.444490 end: 3 lava-test-retry (duration 00:00:14) [common]
6817 11:05:04.444948 start: 4 finalize (timeout 00:07:51) [common]
6818 11:05:04.445412 start: 4.1 power-off (timeout 00:00:30) [common]
6819 11:05:04.446024 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=off']
6820 11:05:06.566022 >> Command sent successfully.
6821 11:05:06.579626 Returned 0 in 2 seconds
6822 11:05:06.580346 end: 4.1 power-off (duration 00:00:02) [common]
6824 11:05:06.581409 start: 4.2 read-feedback (timeout 00:07:49) [common]
6825 11:05:06.582196 Listened to connection for namespace 'common' for up to 1s
6826 11:05:07.583235 Finalising connection for namespace 'common'
6827 11:05:07.583801 Disconnecting from shell: Finalise
6828 11:05:07.584158 / #
6829 11:05:07.685127 end: 4.2 read-feedback (duration 00:00:01) [common]
6830 11:05:07.685789 end: 4 finalize (duration 00:00:03) [common]
6831 11:05:07.686340 Cleaning after the job
6832 11:05:07.686824 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/ramdisk
6833 11:05:07.697541 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/kernel
6834 11:05:07.731950 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/dtb
6835 11:05:07.732278 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/nfsrootfs
6836 11:05:07.801571 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786780/tftp-deploy-of3oyt0l/modules
6837 11:05:07.807124 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14786780
6838 11:05:08.365858 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14786780
6839 11:05:08.366030 Job finished correctly