Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 3
- Kernel Errors: 41
- Boot result: FAIL
- Warnings: 1
- Kernel Warnings: 97
1 11:06:34.008602 lava-dispatcher, installed at version: 2024.05
2 11:06:34.008787 start: 0 validate
3 11:06:34.008922 Start time: 2024-07-10 11:06:34.008912+00:00 (UTC)
4 11:06:34.009047 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:06:34.009236 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 11:06:34.283628 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:06:34.284312 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 11:07:34.611325 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:07:34.611499 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 11:07:34.877814 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:07:34.877966 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
12 11:07:34.880154 validate duration: 60.87
14 11:07:34.880381 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:07:34.880481 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:07:34.880562 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:07:34.880725 Not decompressing ramdisk as can be used compressed.
18 11:07:34.880806 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/rootfs.cpio.gz
19 11:07:34.880875 saving as /var/lib/lava/dispatcher/tmp/14786814/tftp-deploy-pxb2vzc_/ramdisk/rootfs.cpio.gz
20 11:07:34.880934 total size: 95552279 (91 MB)
21 11:07:41.649832 progress 0 % (0 MB)
22 11:07:41.688617 progress 5 % (4 MB)
23 11:07:41.714596 progress 10 % (9 MB)
24 11:07:41.739691 progress 15 % (13 MB)
25 11:07:41.765074 progress 20 % (18 MB)
26 11:07:41.792363 progress 25 % (22 MB)
27 11:07:41.819227 progress 30 % (27 MB)
28 11:07:41.844268 progress 35 % (31 MB)
29 11:07:41.868803 progress 40 % (36 MB)
30 11:07:41.895121 progress 45 % (41 MB)
31 11:07:41.921501 progress 50 % (45 MB)
32 11:07:41.948153 progress 55 % (50 MB)
33 11:07:41.975956 progress 60 % (54 MB)
34 11:07:42.003303 progress 65 % (59 MB)
35 11:07:42.029628 progress 70 % (63 MB)
36 11:07:42.056594 progress 75 % (68 MB)
37 11:07:42.082736 progress 80 % (72 MB)
38 11:07:42.108164 progress 85 % (77 MB)
39 11:07:42.133978 progress 90 % (82 MB)
40 11:07:42.158644 progress 95 % (86 MB)
41 11:07:42.183209 progress 100 % (91 MB)
42 11:07:42.183369 91 MB downloaded in 7.30 s (12.48 MB/s)
43 11:07:42.183537 end: 1.1.1 http-download (duration 00:00:07) [common]
45 11:07:42.183761 end: 1.1 download-retry (duration 00:00:07) [common]
46 11:07:42.183840 start: 1.2 download-retry (timeout 00:09:53) [common]
47 11:07:42.183922 start: 1.2.1 http-download (timeout 00:09:53) [common]
48 11:07:42.184054 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
49 11:07:42.184119 saving as /var/lib/lava/dispatcher/tmp/14786814/tftp-deploy-pxb2vzc_/kernel/Image
50 11:07:42.184174 total size: 54813184 (52 MB)
51 11:07:42.184228 No compression specified
52 11:07:42.185410 progress 0 % (0 MB)
53 11:07:42.199856 progress 5 % (2 MB)
54 11:07:42.214270 progress 10 % (5 MB)
55 11:07:42.228405 progress 15 % (7 MB)
56 11:07:42.242933 progress 20 % (10 MB)
57 11:07:42.257107 progress 25 % (13 MB)
58 11:07:42.271326 progress 30 % (15 MB)
59 11:07:42.285936 progress 35 % (18 MB)
60 11:07:42.300159 progress 40 % (20 MB)
61 11:07:42.314369 progress 45 % (23 MB)
62 11:07:42.329726 progress 50 % (26 MB)
63 11:07:42.344190 progress 55 % (28 MB)
64 11:07:42.358556 progress 60 % (31 MB)
65 11:07:42.372528 progress 65 % (34 MB)
66 11:07:42.386655 progress 70 % (36 MB)
67 11:07:42.400955 progress 75 % (39 MB)
68 11:07:42.415550 progress 80 % (41 MB)
69 11:07:42.429905 progress 85 % (44 MB)
70 11:07:42.444031 progress 90 % (47 MB)
71 11:07:42.457943 progress 95 % (49 MB)
72 11:07:42.471709 progress 100 % (52 MB)
73 11:07:42.471956 52 MB downloaded in 0.29 s (181.65 MB/s)
74 11:07:42.472112 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:07:42.472323 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:07:42.472403 start: 1.3 download-retry (timeout 00:09:52) [common]
78 11:07:42.472479 start: 1.3.1 http-download (timeout 00:09:52) [common]
79 11:07:42.472609 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 11:07:42.472670 saving as /var/lib/lava/dispatcher/tmp/14786814/tftp-deploy-pxb2vzc_/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 11:07:42.472724 total size: 57695 (0 MB)
82 11:07:42.472777 No compression specified
83 11:07:42.473810 progress 56 % (0 MB)
84 11:07:42.474075 progress 100 % (0 MB)
85 11:07:42.474268 0 MB downloaded in 0.00 s (35.69 MB/s)
86 11:07:42.474381 end: 1.3.1 http-download (duration 00:00:00) [common]
88 11:07:42.474584 end: 1.3 download-retry (duration 00:00:00) [common]
89 11:07:42.474661 start: 1.4 download-retry (timeout 00:09:52) [common]
90 11:07:42.474736 start: 1.4.1 http-download (timeout 00:09:52) [common]
91 11:07:42.474837 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
92 11:07:42.474897 saving as /var/lib/lava/dispatcher/tmp/14786814/tftp-deploy-pxb2vzc_/modules/modules.tar
93 11:07:42.474950 total size: 8607984 (8 MB)
94 11:07:42.475004 Using unxz to decompress xz
95 11:07:42.742155 progress 0 % (0 MB)
96 11:07:42.764723 progress 5 % (0 MB)
97 11:07:42.792653 progress 10 % (0 MB)
98 11:07:42.819342 progress 15 % (1 MB)
99 11:07:42.845419 progress 20 % (1 MB)
100 11:07:42.870316 progress 25 % (2 MB)
101 11:07:42.894652 progress 30 % (2 MB)
102 11:07:42.918501 progress 35 % (2 MB)
103 11:07:42.946289 progress 40 % (3 MB)
104 11:07:42.971713 progress 45 % (3 MB)
105 11:07:42.996967 progress 50 % (4 MB)
106 11:07:43.023774 progress 55 % (4 MB)
107 11:07:43.049500 progress 60 % (4 MB)
108 11:07:43.073889 progress 65 % (5 MB)
109 11:07:43.099797 progress 70 % (5 MB)
110 11:07:43.127495 progress 75 % (6 MB)
111 11:07:43.156593 progress 80 % (6 MB)
112 11:07:43.180506 progress 85 % (7 MB)
113 11:07:43.204156 progress 90 % (7 MB)
114 11:07:43.228109 progress 95 % (7 MB)
115 11:07:43.252894 progress 100 % (8 MB)
116 11:07:43.258620 8 MB downloaded in 0.78 s (10.48 MB/s)
117 11:07:43.258821 end: 1.4.1 http-download (duration 00:00:01) [common]
119 11:07:43.259040 end: 1.4 download-retry (duration 00:00:01) [common]
120 11:07:43.259119 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 11:07:43.259195 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 11:07:43.259265 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 11:07:43.259337 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
124 11:07:43.259512 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq
125 11:07:43.259636 makedir: /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin
126 11:07:43.259725 makedir: /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/tests
127 11:07:43.259811 makedir: /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/results
128 11:07:43.259900 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-add-keys
129 11:07:43.260033 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-add-sources
130 11:07:43.260180 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-background-process-start
131 11:07:43.260327 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-background-process-stop
132 11:07:43.260476 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-common-functions
133 11:07:43.260621 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-echo-ipv4
134 11:07:43.260736 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-install-packages
135 11:07:43.260848 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-installed-packages
136 11:07:43.260959 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-os-build
137 11:07:43.261072 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-probe-channel
138 11:07:43.261232 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-probe-ip
139 11:07:43.261346 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-target-ip
140 11:07:43.261460 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-target-mac
141 11:07:43.261572 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-target-storage
142 11:07:43.261687 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-test-case
143 11:07:43.261799 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-test-event
144 11:07:43.261954 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-test-feedback
145 11:07:43.262115 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-test-raise
146 11:07:43.262258 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-test-reference
147 11:07:43.262374 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-test-runner
148 11:07:43.262492 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-test-set
149 11:07:43.262607 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-test-shell
150 11:07:43.262721 Updating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-install-packages (oe)
151 11:07:43.262865 Updating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/bin/lava-installed-packages (oe)
152 11:07:43.262986 Creating /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/environment
153 11:07:43.263087 LAVA metadata
154 11:07:43.263153 - LAVA_JOB_ID=14786814
155 11:07:43.263209 - LAVA_DISPATCHER_IP=192.168.201.1
156 11:07:43.263312 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
157 11:07:43.263368 skipped lava-vland-overlay
158 11:07:43.263436 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 11:07:43.263507 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
160 11:07:43.263563 skipped lava-multinode-overlay
161 11:07:43.263626 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 11:07:43.263694 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
163 11:07:43.263759 Loading test definitions
164 11:07:43.263834 start: 1.5.2.3.1 git-repo-action (timeout 00:09:52) [common]
165 11:07:43.263895 Using /lava-14786814 at stage 0
166 11:07:43.263981 Fetching tests from https://github.com/kernelci/kernelci-core
167 11:07:43.264055 Running '/usr/bin/git clone -b kernelci.org --depth=1 https://github.com/kernelci/kernelci-core /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/0/tests/0_sleep'
168 11:07:43.820728 Removing '.git' directory in /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/0/tests/0_sleep
169 11:07:43.821696 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/0/tests/0_sleep/config/lava/sleep/sleep.yaml
170 11:07:43.821941 uuid=14786814_1.5.2.3.1 testdef=None
171 11:07:43.822042 end: 1.5.2.3.1 git-repo-action (duration 00:00:01) [common]
173 11:07:43.822238 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
174 11:07:43.822702 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
176 11:07:43.822933 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
177 11:07:43.823571 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
179 11:07:43.823787 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
180 11:07:43.824386 runner path: /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/0/tests/0_sleep test_uuid 14786814_1.5.2.3.1
181 11:07:43.824460 sleep_params='mem freeze'
182 11:07:43.824595 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
184 11:07:43.824868 Creating lava-test-runner.conf files
185 11:07:43.824955 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14786814/lava-overlay-18brjdlq/lava-14786814/0 for stage 0
186 11:07:43.825075 - 0_sleep
187 11:07:43.825202 end: 1.5.2.3 test-definition (duration 00:00:01) [common]
188 11:07:43.825281 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
189 11:07:43.960523 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
190 11:07:43.960657 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
191 11:07:43.960739 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
192 11:07:43.960819 end: 1.5.2 lava-overlay (duration 00:00:01) [common]
193 11:07:43.960895 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
194 11:07:46.859456 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:03) [common]
195 11:07:46.859617 start: 1.5.4 extract-modules (timeout 00:09:48) [common]
196 11:07:46.859692 extracting modules file /var/lib/lava/dispatcher/tmp/14786814/tftp-deploy-pxb2vzc_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14786814/extract-overlay-ramdisk-s59o9zc1/ramdisk
197 11:07:47.102854 end: 1.5.4 extract-modules (duration 00:00:00) [common]
198 11:07:47.102994 start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
199 11:07:47.103069 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14786814/compress-overlay-j38intmu/overlay-1.5.2.4.tar.gz to ramdisk
200 11:07:47.103127 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14786814/compress-overlay-j38intmu/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14786814/extract-overlay-ramdisk-s59o9zc1/ramdisk
201 11:07:47.204778 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
202 11:07:47.204918 start: 1.5.6 configure-preseed-file (timeout 00:09:48) [common]
203 11:07:47.205003 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
204 11:07:47.205079 start: 1.5.7 compress-ramdisk (timeout 00:09:48) [common]
205 11:07:47.205223 Building ramdisk /var/lib/lava/dispatcher/tmp/14786814/extract-overlay-ramdisk-s59o9zc1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14786814/extract-overlay-ramdisk-s59o9zc1/ramdisk
206 11:07:49.337468 >> 674775 blocks
207 11:08:01.030629 rename /var/lib/lava/dispatcher/tmp/14786814/extract-overlay-ramdisk-s59o9zc1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14786814/tftp-deploy-pxb2vzc_/ramdisk/ramdisk.cpio.gz
208 11:08:01.030806 end: 1.5.7 compress-ramdisk (duration 00:00:14) [common]
209 11:08:01.030890 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
210 11:08:01.030967 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
211 11:08:01.031040 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14786814/tftp-deploy-pxb2vzc_/kernel/Image']
212 11:08:14.675185 Returned 0 in 13 seconds
213 11:08:14.675360 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14786814/tftp-deploy-pxb2vzc_/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14786814/tftp-deploy-pxb2vzc_/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14786814/tftp-deploy-pxb2vzc_/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14786814/tftp-deploy-pxb2vzc_/kernel/image.itb
214 11:08:16.757756 output: FIT description: Kernel Image image with one or more FDT blobs
215 11:08:16.757878 output: Created: Wed Jul 10 12:08:16 2024
216 11:08:16.757938 output: Image 0 (kernel-1)
217 11:08:16.757992 output: Description:
218 11:08:16.758043 output: Created: Wed Jul 10 12:08:16 2024
219 11:08:16.758093 output: Type: Kernel Image
220 11:08:16.758142 output: Compression: lzma compressed
221 11:08:16.758192 output: Data Size: 13116259 Bytes = 12808.85 KiB = 12.51 MiB
222 11:08:16.758241 output: Architecture: AArch64
223 11:08:16.758289 output: OS: Linux
224 11:08:16.758336 output: Load Address: 0x00000000
225 11:08:16.758385 output: Entry Point: 0x00000000
226 11:08:16.758432 output: Hash algo: crc32
227 11:08:16.758480 output: Hash value: 9bb85fb9
228 11:08:16.758527 output: Image 1 (fdt-1)
229 11:08:16.758573 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
230 11:08:16.758621 output: Created: Wed Jul 10 12:08:16 2024
231 11:08:16.758668 output: Type: Flat Device Tree
232 11:08:16.758715 output: Compression: uncompressed
233 11:08:16.758762 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
234 11:08:16.758810 output: Architecture: AArch64
235 11:08:16.758856 output: Hash algo: crc32
236 11:08:16.758903 output: Hash value: a9713552
237 11:08:16.758949 output: Image 2 (ramdisk-1)
238 11:08:16.758996 output: Description: unavailable
239 11:08:16.759043 output: Created: Wed Jul 10 12:08:16 2024
240 11:08:16.759091 output: Type: RAMDisk Image
241 11:08:16.759138 output: Compression: uncompressed
242 11:08:16.759184 output: Data Size: 108959034 Bytes = 106405.31 KiB = 103.91 MiB
243 11:08:16.759230 output: Architecture: AArch64
244 11:08:16.759277 output: OS: Linux
245 11:08:16.759323 output: Load Address: unavailable
246 11:08:16.759370 output: Entry Point: unavailable
247 11:08:16.759416 output: Hash algo: crc32
248 11:08:16.759461 output: Hash value: 69693335
249 11:08:16.759508 output: Default Configuration: 'conf-1'
250 11:08:16.759554 output: Configuration 0 (conf-1)
251 11:08:16.759600 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
252 11:08:16.759647 output: Kernel: kernel-1
253 11:08:16.759693 output: Init Ramdisk: ramdisk-1
254 11:08:16.759741 output: FDT: fdt-1
255 11:08:16.759789 output: Loadables: kernel-1
256 11:08:16.759837 output:
257 11:08:16.759937 end: 1.5.8.1 prepare-fit (duration 00:00:16) [common]
258 11:08:16.760010 end: 1.5.8 prepare-kernel (duration 00:00:16) [common]
259 11:08:16.760082 end: 1.5 prepare-tftp-overlay (duration 00:00:34) [common]
260 11:08:16.760154 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:18) [common]
261 11:08:16.760209 No LXC device requested
262 11:08:16.760274 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
263 11:08:16.760342 start: 1.7 deploy-device-env (timeout 00:09:18) [common]
264 11:08:16.760408 end: 1.7 deploy-device-env (duration 00:00:00) [common]
265 11:08:16.760460 Checking files for TFTP limit of 4294967296 bytes.
266 11:08:16.760810 end: 1 tftp-deploy (duration 00:00:42) [common]
267 11:08:16.760894 start: 2 depthcharge-action (timeout 00:05:00) [common]
268 11:08:16.760970 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
269 11:08:16.761053 substitutions:
270 11:08:16.761110 - {DTB}: 14786814/tftp-deploy-pxb2vzc_/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
271 11:08:16.761196 - {INITRD}: 14786814/tftp-deploy-pxb2vzc_/ramdisk/ramdisk.cpio.gz
272 11:08:16.761262 - {KERNEL}: 14786814/tftp-deploy-pxb2vzc_/kernel/Image
273 11:08:16.761313 - {LAVA_MAC}: None
274 11:08:16.761362 - {PRESEED_CONFIG}: None
275 11:08:16.761410 - {PRESEED_LOCAL}: None
276 11:08:16.761457 - {RAMDISK}: 14786814/tftp-deploy-pxb2vzc_/ramdisk/ramdisk.cpio.gz
277 11:08:16.761513 - {ROOT_PART}: None
278 11:08:16.761562 - {ROOT}: None
279 11:08:16.761609 - {SERVER_IP}: 192.168.201.1
280 11:08:16.761655 - {TEE}: None
281 11:08:16.761703 Parsed boot commands:
282 11:08:16.761749 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
283 11:08:16.761884 Parsed boot commands: tftpboot 192.168.201.1 14786814/tftp-deploy-pxb2vzc_/kernel/image.itb 14786814/tftp-deploy-pxb2vzc_/kernel/cmdline
284 11:08:16.761960 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
285 11:08:16.762030 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
286 11:08:16.762100 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
287 11:08:16.762169 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
288 11:08:16.762221 Not connected, no need to disconnect.
289 11:08:16.762285 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
290 11:08:16.762350 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
291 11:08:16.762402 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
292 11:08:16.765262 Setting prompt string to ['lava-test: # ']
293 11:08:16.765565 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
294 11:08:16.765653 end: 2.2.1 reset-connection (duration 00:00:00) [common]
295 11:08:16.765740 start: 2.2.2 reset-device (timeout 00:05:00) [common]
296 11:08:16.765818 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
297 11:08:16.765994 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=reboot']
298 11:08:25.964459 >> Command sent successfully.
299 11:08:25.978962 Returned 0 in 9 seconds
300 11:08:25.979606 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
302 11:08:25.981093 end: 2.2.2 reset-device (duration 00:00:09) [common]
303 11:08:25.981601 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
304 11:08:25.981967 Setting prompt string to 'Starting depthcharge on Juniper...'
305 11:08:25.982250 Changing prompt to 'Starting depthcharge on Juniper...'
306 11:08:25.982551 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
307 11:08:25.984174 [Enter `^Ec?' for help]
308 11:08:33.563126 [DL] 00000000 00000000 010701
309 11:08:33.567871
310 11:08:33.567949
311 11:08:33.568007 F0: 102B 0000
312 11:08:33.568068
313 11:08:33.568123 F3: 1006 0033 [0200]
314 11:08:33.571062
315 11:08:33.571136 F3: 4001 00E0 [0200]
316 11:08:33.571198
317 11:08:33.571253 F3: 0000 0000
318 11:08:33.571308
319 11:08:33.574354 V0: 0000 0000 [0001]
320 11:08:33.574429
321 11:08:33.574487 00: 1027 0002
322 11:08:33.574543
323 11:08:33.577779 01: 0000 0000
324 11:08:33.577855
325 11:08:33.577912 BP: 0C00 0251 [0000]
326 11:08:33.577966
327 11:08:33.581099 G0: 1182 0000
328 11:08:33.581214
329 11:08:33.581272 EC: 0004 0000 [0001]
330 11:08:33.581327
331 11:08:33.584407 S7: 0000 0000 [0000]
332 11:08:33.584482
333 11:08:33.584539 CC: 0000 0000 [0001]
334 11:08:33.587656
335 11:08:33.587731 T0: 0000 00DB [000F]
336 11:08:33.587790
337 11:08:33.587843 Jump to BL
338 11:08:33.587895
339 11:08:33.623551
340 11:08:33.623629
341 11:08:33.629984 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
342 11:08:33.636694 ARM64: Exception handlers installed.
343 11:08:33.636769 ARM64: Testing exception
344 11:08:33.640038 ARM64: Done test exception
345 11:08:33.643757 WDT: Last reset was cold boot
346 11:08:33.646898 SPI0(PAD0) initialized at 992727 Hz
347 11:08:33.651582 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
348 11:08:33.651658 Manufacturer: ef
349 11:08:33.657740 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
350 11:08:33.670638 Probing TPM: . done!
351 11:08:33.670715 TPM ready after 0 ms
352 11:08:33.677591 Connected to device vid:did:rid of 1ae0:0028:00
353 11:08:33.683803 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
354 11:08:33.687575 Initialized TPM device CR50 revision 0
355 11:08:33.733366 tlcl_send_startup: Startup return code is 0
356 11:08:33.733459 TPM: setup succeeded
357 11:08:33.742679 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
358 11:08:33.746084 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
359 11:08:33.749500 in-header: 03 19 00 00 08 00 00 00
360 11:08:33.752991 in-data: a2 e0 47 00 13 00 00 00
361 11:08:33.755802 Chrome EC: UHEPI supported
362 11:08:33.763214 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
363 11:08:33.765835 in-header: 03 a1 00 00 08 00 00 00
364 11:08:33.769391 in-data: 84 60 60 10 00 00 00 00
365 11:08:33.769469 Phase 1
366 11:08:33.772740 FMAP: area GBB found @ 3f5000 (12032 bytes)
367 11:08:33.779379 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
368 11:08:33.785963 VB2:vb2_check_recovery() Recovery was requested manually
369 11:08:33.789496 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
370 11:08:33.795439 Recovery requested (1009000e)
371 11:08:33.803976 tlcl_extend: response is 0
372 11:08:33.809712 tlcl_extend: response is 0
373 11:08:33.834437
374 11:08:33.834554
375 11:08:33.840944 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
376 11:08:33.844362 ARM64: Exception handlers installed.
377 11:08:33.847773 ARM64: Testing exception
378 11:08:33.851327 ARM64: Done test exception
379 11:08:33.866465 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x2000
380 11:08:33.873350 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
381 11:08:33.876709 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
382 11:08:33.884797 [RTC]rtc_get_frequency_meter,134: input=0xf, output=864
383 11:08:33.891657 [RTC]rtc_get_frequency_meter,134: input=0x7, output=733
384 11:08:33.898738 [RTC]rtc_get_frequency_meter,134: input=0xb, output=796
385 11:08:33.902409 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b
386 11:08:33.908793 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
387 11:08:33.912094 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
388 11:08:33.915601 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
389 11:08:33.919295 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
390 11:08:33.921960 in-header: 03 19 00 00 08 00 00 00
391 11:08:33.926231 in-data: a2 e0 47 00 13 00 00 00
392 11:08:33.928764 Chrome EC: UHEPI supported
393 11:08:33.935635 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
394 11:08:33.939109 in-header: 03 a1 00 00 08 00 00 00
395 11:08:33.942208 in-data: 84 60 60 10 00 00 00 00
396 11:08:33.945715 Skip loading cached calibration data
397 11:08:33.952850 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
398 11:08:33.955839 in-header: 03 a1 00 00 08 00 00 00
399 11:08:33.959279 in-data: 84 60 60 10 00 00 00 00
400 11:08:33.965846 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
401 11:08:33.969291 in-header: 03 a1 00 00 08 00 00 00
402 11:08:33.972346 in-data: 84 60 60 10 00 00 00 00
403 11:08:33.975939 ADC[3]: Raw value=1037476 ID=8
404 11:08:33.976019 Manufacturer: ef
405 11:08:33.982116 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
406 11:08:33.985949 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
407 11:08:33.988814 CBFS @ 21000 size 3d4000
408 11:08:33.992638 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
409 11:08:33.999148 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
410 11:08:34.002389 CBFS: Found @ offset 3c880 size 4b
411 11:08:34.002464 DRAM-K: Full Calibration
412 11:08:34.008996 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
413 11:08:34.009073 CBFS @ 21000 size 3d4000
414 11:08:34.016079 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
415 11:08:34.019478 CBFS: Locating 'fallback/dram'
416 11:08:34.022318 CBFS: Found @ offset 24b00 size 12268
417 11:08:34.050067 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
418 11:08:34.053189 ddr_geometry: 1, config: 0x0
419 11:08:34.056795 header.status = 0x0
420 11:08:34.060058 header.magic = 0x44524d4b (expected: 0x44524d4b)
421 11:08:34.063267 header.version = 0x5 (expected: 0x5)
422 11:08:34.066721 header.size = 0x8f0 (expected: 0x8f0)
423 11:08:34.066796 header.config = 0x0
424 11:08:34.070459 header.flags = 0x0
425 11:08:34.070535 header.checksum = 0x0
426 11:08:34.076839 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
427 11:08:34.083447 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
428 11:08:34.087035 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
429 11:08:34.090267 ddr_geometry:1
430 11:08:34.090344 [EMI] new MDL number = 1
431 11:08:34.093606 dram_cbt_mode_extern: 0
432 11:08:34.097023 dram_cbt_mode [RK0]: 0, [RK1]: 0
433 11:08:34.103531 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
434 11:08:34.103607
435 11:08:34.103664
436 11:08:34.103718 [Bianco] ETT version 0.0.0.1
437 11:08:34.110829 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
438 11:08:34.110907
439 11:08:34.113724 vSetVcoreByFreq with vcore:762500, freq=1600
440 11:08:34.113799
441 11:08:34.113858 [DramcInit]
442 11:08:34.116828 AutoRefreshCKEOff AutoREF OFF
443 11:08:34.120386 DDRPhyPLLSetting-CKEOFF
444 11:08:34.123520 DDRPhyPLLSetting-CKEON
445 11:08:34.123594
446 11:08:34.123653 Enable WDQS
447 11:08:34.127478 [ModeRegInit_LP4] CH0 RK0
448 11:08:34.130925 Write Rank0 MR13 =0x18
449 11:08:34.131004 Write Rank0 MR12 =0x5d
450 11:08:34.134036 Write Rank0 MR1 =0x56
451 11:08:34.136962 Write Rank0 MR2 =0x1a
452 11:08:34.137053 Write Rank0 MR11 =0x0
453 11:08:34.140410 Write Rank0 MR22 =0x38
454 11:08:34.140482 Write Rank0 MR14 =0x5d
455 11:08:34.144407 Write Rank0 MR3 =0x30
456 11:08:34.147200 Write Rank0 MR13 =0x58
457 11:08:34.147267 Write Rank0 MR12 =0x5d
458 11:08:34.150792 Write Rank0 MR1 =0x56
459 11:08:34.150890 Write Rank0 MR2 =0x2d
460 11:08:34.154128 Write Rank0 MR11 =0x23
461 11:08:34.157292 Write Rank0 MR22 =0x34
462 11:08:34.157362 Write Rank0 MR14 =0x10
463 11:08:34.160803 Write Rank0 MR3 =0x30
464 11:08:34.164184 Write Rank0 MR13 =0xd8
465 11:08:34.164258 [ModeRegInit_LP4] CH0 RK1
466 11:08:34.167304 Write Rank1 MR13 =0x18
467 11:08:34.167406 Write Rank1 MR12 =0x5d
468 11:08:34.170671 Write Rank1 MR1 =0x56
469 11:08:34.174026 Write Rank1 MR2 =0x1a
470 11:08:34.174093 Write Rank1 MR11 =0x0
471 11:08:34.177482 Write Rank1 MR22 =0x38
472 11:08:34.177553 Write Rank1 MR14 =0x5d
473 11:08:34.180645 Write Rank1 MR3 =0x30
474 11:08:34.184046 Write Rank1 MR13 =0x58
475 11:08:34.184114 Write Rank1 MR12 =0x5d
476 11:08:34.187441 Write Rank1 MR1 =0x56
477 11:08:34.187538 Write Rank1 MR2 =0x2d
478 11:08:34.190769 Write Rank1 MR11 =0x23
479 11:08:34.194410 Write Rank1 MR22 =0x34
480 11:08:34.194482 Write Rank1 MR14 =0x10
481 11:08:34.197999 Write Rank1 MR3 =0x30
482 11:08:34.200717 Write Rank1 MR13 =0xd8
483 11:08:34.200784 [ModeRegInit_LP4] CH1 RK0
484 11:08:34.204322 Write Rank0 MR13 =0x18
485 11:08:34.204401 Write Rank0 MR12 =0x5d
486 11:08:34.207460 Write Rank0 MR1 =0x56
487 11:08:34.210822 Write Rank0 MR2 =0x1a
488 11:08:34.210897 Write Rank0 MR11 =0x0
489 11:08:34.214032 Write Rank0 MR22 =0x38
490 11:08:34.214094 Write Rank0 MR14 =0x5d
491 11:08:34.217525 Write Rank0 MR3 =0x30
492 11:08:34.221331 Write Rank0 MR13 =0x58
493 11:08:34.221399 Write Rank0 MR12 =0x5d
494 11:08:34.224620 Write Rank0 MR1 =0x56
495 11:08:34.224686 Write Rank0 MR2 =0x2d
496 11:08:34.227786 Write Rank0 MR11 =0x23
497 11:08:34.231842 Write Rank0 MR22 =0x34
498 11:08:34.231913 Write Rank0 MR14 =0x10
499 11:08:34.234489 Write Rank0 MR3 =0x30
500 11:08:34.237713 Write Rank0 MR13 =0xd8
501 11:08:34.237783 [ModeRegInit_LP4] CH1 RK1
502 11:08:34.241116 Write Rank1 MR13 =0x18
503 11:08:34.241229 Write Rank1 MR12 =0x5d
504 11:08:34.244375 Write Rank1 MR1 =0x56
505 11:08:34.247849 Write Rank1 MR2 =0x1a
506 11:08:34.247940 Write Rank1 MR11 =0x0
507 11:08:34.251044 Write Rank1 MR22 =0x38
508 11:08:34.251119 Write Rank1 MR14 =0x5d
509 11:08:34.254359 Write Rank1 MR3 =0x30
510 11:08:34.257774 Write Rank1 MR13 =0x58
511 11:08:34.257849 Write Rank1 MR12 =0x5d
512 11:08:34.261193 Write Rank1 MR1 =0x56
513 11:08:34.261268 Write Rank1 MR2 =0x2d
514 11:08:34.264398 Write Rank1 MR11 =0x23
515 11:08:34.267803 Write Rank1 MR22 =0x34
516 11:08:34.267878 Write Rank1 MR14 =0x10
517 11:08:34.271742 Write Rank1 MR3 =0x30
518 11:08:34.274465 Write Rank1 MR13 =0xd8
519 11:08:34.274540 match AC timing 3
520 11:08:34.284781 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
521 11:08:34.284857 [MiockJmeterHQA]
522 11:08:34.291213 vSetVcoreByFreq with vcore:762500, freq=1600
523 11:08:34.393261
524 11:08:34.393364 MIOCK jitter meter ch=0
525 11:08:34.393426
526 11:08:34.396657 1T = (100-18) = 82 dly cells
527 11:08:34.403394 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
528 11:08:34.406871 vSetVcoreByFreq with vcore:725000, freq=1200
529 11:08:34.504670
530 11:08:34.504778 MIOCK jitter meter ch=0
531 11:08:34.504838
532 11:08:34.507829 1T = (95-17) = 78 dly cells
533 11:08:34.514716 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
534 11:08:34.517964 vSetVcoreByFreq with vcore:725000, freq=800
535 11:08:34.615809
536 11:08:34.615909 MIOCK jitter meter ch=0
537 11:08:34.615968
538 11:08:34.619279 1T = (95-17) = 78 dly cells
539 11:08:34.626609 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
540 11:08:34.629268 vSetVcoreByFreq with vcore:762500, freq=1600
541 11:08:34.632881 vSetVcoreByFreq with vcore:762500, freq=1600
542 11:08:34.632981
543 11:08:34.633065 K DRVP
544 11:08:34.636014 1. OCD DRVP=0 CALOUT=0
545 11:08:34.639901 1. OCD DRVP=1 CALOUT=0
546 11:08:34.639997 1. OCD DRVP=2 CALOUT=0
547 11:08:34.643479 1. OCD DRVP=3 CALOUT=0
548 11:08:34.643546 1. OCD DRVP=4 CALOUT=0
549 11:08:34.646186 1. OCD DRVP=5 CALOUT=0
550 11:08:34.650066 1. OCD DRVP=6 CALOUT=0
551 11:08:34.650171 1. OCD DRVP=7 CALOUT=0
552 11:08:34.653341 1. OCD DRVP=8 CALOUT=0
553 11:08:34.653432 1. OCD DRVP=9 CALOUT=1
554 11:08:34.656475
555 11:08:34.656538 1. OCD DRVP calibration OK! DRVP=9
556 11:08:34.656591
557 11:08:34.659952
558 11:08:34.660055
559 11:08:34.660115 K ODTN
560 11:08:34.660169 3. OCD ODTN=0 ,CALOUT=1
561 11:08:34.663489 3. OCD ODTN=1 ,CALOUT=1
562 11:08:34.666403 3. OCD ODTN=2 ,CALOUT=1
563 11:08:34.666478 3. OCD ODTN=3 ,CALOUT=1
564 11:08:34.669906 3. OCD ODTN=4 ,CALOUT=1
565 11:08:34.673568 3. OCD ODTN=5 ,CALOUT=1
566 11:08:34.673639 3. OCD ODTN=6 ,CALOUT=1
567 11:08:34.677075 3. OCD ODTN=7 ,CALOUT=0
568 11:08:34.677169
569 11:08:34.679935 3. OCD ODTN calibration OK! ODTN=7
570 11:08:34.680000
571 11:08:34.683233 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
572 11:08:34.686553 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
573 11:08:34.693639 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
574 11:08:34.693710
575 11:08:34.693767 K DRVP
576 11:08:34.696775 1. OCD DRVP=0 CALOUT=0
577 11:08:34.696870 1. OCD DRVP=1 CALOUT=0
578 11:08:34.700158 1. OCD DRVP=2 CALOUT=0
579 11:08:34.700223 1. OCD DRVP=3 CALOUT=0
580 11:08:34.703305 1. OCD DRVP=4 CALOUT=0
581 11:08:34.706850 1. OCD DRVP=5 CALOUT=0
582 11:08:34.706917 1. OCD DRVP=6 CALOUT=0
583 11:08:34.710155 1. OCD DRVP=7 CALOUT=0
584 11:08:34.713239 1. OCD DRVP=8 CALOUT=0
585 11:08:34.713320 1. OCD DRVP=9 CALOUT=0
586 11:08:34.717032 1. OCD DRVP=10 CALOUT=1
587 11:08:34.717102
588 11:08:34.720178 1. OCD DRVP calibration OK! DRVP=10
589 11:08:34.720246
590 11:08:34.720303
591 11:08:34.720358
592 11:08:34.720419 K ODTN
593 11:08:34.723695 3. OCD ODTN=0 ,CALOUT=1
594 11:08:34.723762 3. OCD ODTN=1 ,CALOUT=1
595 11:08:34.727134 3. OCD ODTN=2 ,CALOUT=1
596 11:08:34.730456 3. OCD ODTN=3 ,CALOUT=1
597 11:08:34.730534 3. OCD ODTN=4 ,CALOUT=1
598 11:08:34.733583 3. OCD ODTN=5 ,CALOUT=1
599 11:08:34.736923 3. OCD ODTN=6 ,CALOUT=1
600 11:08:34.737018 3. OCD ODTN=7 ,CALOUT=1
601 11:08:34.740718 3. OCD ODTN=8 ,CALOUT=1
602 11:08:34.743609 3. OCD ODTN=9 ,CALOUT=1
603 11:08:34.743676 3. OCD ODTN=10 ,CALOUT=1
604 11:08:34.747670 3. OCD ODTN=11 ,CALOUT=1
605 11:08:34.750337 3. OCD ODTN=12 ,CALOUT=1
606 11:08:34.750409 3. OCD ODTN=13 ,CALOUT=1
607 11:08:34.753817 3. OCD ODTN=14 ,CALOUT=0
608 11:08:34.753887
609 11:08:34.757033 3. OCD ODTN calibration OK! ODTN=14
610 11:08:34.757148
611 11:08:34.760328 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14
612 11:08:34.763918 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14
613 11:08:34.770249 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)
614 11:08:34.770327
615 11:08:34.770385 [DramcInit]
616 11:08:34.774125 AutoRefreshCKEOff AutoREF OFF
617 11:08:34.776921 DDRPhyPLLSetting-CKEOFF
618 11:08:34.777014 DDRPhyPLLSetting-CKEON
619 11:08:34.777101
620 11:08:34.780429 Enable WDQS
621 11:08:34.780506 ==
622 11:08:34.783755 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
623 11:08:34.787157 fsp= 1, odt_onoff= 1, Byte mode= 0
624 11:08:34.787252 ==
625 11:08:34.790735 [Duty_Offset_Calibration]
626 11:08:34.790829
627 11:08:34.794109 ===========================
628 11:08:34.794181 B0:0 B1:1 CA:1
629 11:08:34.815516 ==
630 11:08:34.818693 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
631 11:08:34.822103 fsp= 1, odt_onoff= 1, Byte mode= 0
632 11:08:34.822171 ==
633 11:08:34.825103 [Duty_Offset_Calibration]
634 11:08:34.825222
635 11:08:34.828610 ===========================
636 11:08:34.828683 B0:1 B1:2 CA:0
637 11:08:34.862173 [ModeRegInit_LP4] CH0 RK0
638 11:08:34.865288 Write Rank0 MR13 =0x18
639 11:08:34.865361 Write Rank0 MR12 =0x5d
640 11:08:34.868842 Write Rank0 MR1 =0x56
641 11:08:34.871669 Write Rank0 MR2 =0x1a
642 11:08:34.871766 Write Rank0 MR11 =0x0
643 11:08:34.874959 Write Rank0 MR22 =0x38
644 11:08:34.875025 Write Rank0 MR14 =0x5d
645 11:08:34.878403 Write Rank0 MR3 =0x30
646 11:08:34.882210 Write Rank0 MR13 =0x58
647 11:08:34.882274 Write Rank0 MR12 =0x5d
648 11:08:34.885378 Write Rank0 MR1 =0x56
649 11:08:34.885472 Write Rank0 MR2 =0x2d
650 11:08:34.888647 Write Rank0 MR11 =0x23
651 11:08:34.891909 Write Rank0 MR22 =0x34
652 11:08:34.892002 Write Rank0 MR14 =0x10
653 11:08:34.895725 Write Rank0 MR3 =0x30
654 11:08:34.895820 Write Rank0 MR13 =0xd8
655 11:08:34.898756 [ModeRegInit_LP4] CH0 RK1
656 11:08:34.902089 Write Rank1 MR13 =0x18
657 11:08:34.902166 Write Rank1 MR12 =0x5d
658 11:08:34.906142 Write Rank1 MR1 =0x56
659 11:08:34.908884 Write Rank1 MR2 =0x1a
660 11:08:34.908975 Write Rank1 MR11 =0x0
661 11:08:34.912256 Write Rank1 MR22 =0x38
662 11:08:34.912350 Write Rank1 MR14 =0x5d
663 11:08:34.915374 Write Rank1 MR3 =0x30
664 11:08:34.918909 Write Rank1 MR13 =0x58
665 11:08:34.918978 Write Rank1 MR12 =0x5d
666 11:08:34.922417 Write Rank1 MR1 =0x56
667 11:08:34.922484 Write Rank1 MR2 =0x2d
668 11:08:34.925843 Write Rank1 MR11 =0x23
669 11:08:34.928892 Write Rank1 MR22 =0x34
670 11:08:34.928986 Write Rank1 MR14 =0x10
671 11:08:34.932299 Write Rank1 MR3 =0x30
672 11:08:34.932379 Write Rank1 MR13 =0xd8
673 11:08:34.935792 [ModeRegInit_LP4] CH1 RK0
674 11:08:34.938982 Write Rank0 MR13 =0x18
675 11:08:34.939083 Write Rank0 MR12 =0x5d
676 11:08:34.942347 Write Rank0 MR1 =0x56
677 11:08:34.945663 Write Rank0 MR2 =0x1a
678 11:08:34.945732 Write Rank0 MR11 =0x0
679 11:08:34.949604 Write Rank0 MR22 =0x38
680 11:08:34.949677 Write Rank0 MR14 =0x5d
681 11:08:34.952610 Write Rank0 MR3 =0x30
682 11:08:34.955856 Write Rank0 MR13 =0x58
683 11:08:34.955949 Write Rank0 MR12 =0x5d
684 11:08:34.959131 Write Rank0 MR1 =0x56
685 11:08:34.959198 Write Rank0 MR2 =0x2d
686 11:08:34.962525 Write Rank0 MR11 =0x23
687 11:08:34.965840 Write Rank0 MR22 =0x34
688 11:08:34.965913 Write Rank0 MR14 =0x10
689 11:08:34.969007 Write Rank0 MR3 =0x30
690 11:08:34.969110 Write Rank0 MR13 =0xd8
691 11:08:34.972854 [ModeRegInit_LP4] CH1 RK1
692 11:08:34.976384 Write Rank1 MR13 =0x18
693 11:08:34.976450 Write Rank1 MR12 =0x5d
694 11:08:34.978994 Write Rank1 MR1 =0x56
695 11:08:34.982645 Write Rank1 MR2 =0x1a
696 11:08:34.982740 Write Rank1 MR11 =0x0
697 11:08:34.985941 Write Rank1 MR22 =0x38
698 11:08:34.986015 Write Rank1 MR14 =0x5d
699 11:08:34.989415 Write Rank1 MR3 =0x30
700 11:08:34.992797 Write Rank1 MR13 =0x58
701 11:08:34.992897 Write Rank1 MR12 =0x5d
702 11:08:34.996038 Write Rank1 MR1 =0x56
703 11:08:34.996136 Write Rank1 MR2 =0x2d
704 11:08:34.999386 Write Rank1 MR11 =0x23
705 11:08:35.002382 Write Rank1 MR22 =0x34
706 11:08:35.002448 Write Rank1 MR14 =0x10
707 11:08:35.006122 Write Rank1 MR3 =0x30
708 11:08:35.009328 Write Rank1 MR13 =0xd8
709 11:08:35.009418 match AC timing 3
710 11:08:35.019421 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
711 11:08:35.019500 DramC Write-DBI off
712 11:08:35.022738 DramC Read-DBI off
713 11:08:35.025895 Write Rank0 MR13 =0x59
714 11:08:35.025969 ==
715 11:08:35.029801 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
716 11:08:35.032840 fsp= 1, odt_onoff= 1, Byte mode= 0
717 11:08:35.032930 ==
718 11:08:35.035921 === u2Vref_new: 0x56 --> 0x2d
719 11:08:35.039302 === u2Vref_new: 0x58 --> 0x38
720 11:08:35.042974 === u2Vref_new: 0x5a --> 0x39
721 11:08:35.046436 === u2Vref_new: 0x5c --> 0x3c
722 11:08:35.049460 === u2Vref_new: 0x5e --> 0x3d
723 11:08:35.049537 === u2Vref_new: 0x60 --> 0xa0
724 11:08:35.053117
725 11:08:35.053216 CBT Vref found, early break!
726 11:08:35.056469 [CA 0] Center 33 (4~63) winsize 60
727 11:08:35.059846 [CA 1] Center 34 (5~63) winsize 59
728 11:08:35.063675 [CA 2] Center 29 (1~57) winsize 57
729 11:08:35.067050 [CA 3] Center 24 (-3~51) winsize 55
730 11:08:35.070171 [CA 4] Center 25 (-2~52) winsize 55
731 11:08:35.073474 [CA 5] Center 30 (2~58) winsize 57
732 11:08:35.073577
733 11:08:35.076724 [CATrainingPosCal] consider 1 rank data
734 11:08:35.079936 u2DelayCellTimex100 = 762/100 ps
735 11:08:35.083610 CA0 delay=33 (4~63),Diff = 9 PI (11 cell)
736 11:08:35.087149 CA1 delay=34 (5~63),Diff = 10 PI (12 cell)
737 11:08:35.090326 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
738 11:08:35.093515 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
739 11:08:35.096776 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
740 11:08:35.103624 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
741 11:08:35.103700
742 11:08:35.106971 CA PerBit enable=1, Macro0, CA PI delay=24
743 11:08:35.107062 === u2Vref_new: 0x56 --> 0x2d
744 11:08:35.110481
745 11:08:35.110571 Vref(ca) range 1: 22
746 11:08:35.110643
747 11:08:35.113957 CS Dly= 10 (41-0-32)
748 11:08:35.114032 Write Rank0 MR13 =0xd8
749 11:08:35.117263 Write Rank0 MR13 =0xd8
750 11:08:35.120563 Write Rank0 MR12 =0x56
751 11:08:35.120628 Write Rank1 MR13 =0x59
752 11:08:35.120728 ==
753 11:08:35.127285 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
754 11:08:35.130568 fsp= 1, odt_onoff= 1, Byte mode= 0
755 11:08:35.130668 ==
756 11:08:35.133859 === u2Vref_new: 0x56 --> 0x2d
757 11:08:35.136928 === u2Vref_new: 0x58 --> 0x38
758 11:08:35.137027 === u2Vref_new: 0x5a --> 0x39
759 11:08:35.140806 === u2Vref_new: 0x5c --> 0x3c
760 11:08:35.143930 === u2Vref_new: 0x5e --> 0x3d
761 11:08:35.147454 === u2Vref_new: 0x60 --> 0xa0
762 11:08:35.150754 [CA 0] Center 34 (5~63) winsize 59
763 11:08:35.154376 [CA 1] Center 34 (6~63) winsize 58
764 11:08:35.157381 [CA 2] Center 29 (0~58) winsize 59
765 11:08:35.160950 [CA 3] Center 23 (-4~50) winsize 55
766 11:08:35.163897 [CA 4] Center 24 (-3~51) winsize 55
767 11:08:35.167337 [CA 5] Center 30 (1~59) winsize 59
768 11:08:35.167411
769 11:08:35.170640 [CATrainingPosCal] consider 2 rank data
770 11:08:35.173913 u2DelayCellTimex100 = 762/100 ps
771 11:08:35.177588 CA0 delay=34 (5~63),Diff = 11 PI (14 cell)
772 11:08:35.180947 CA1 delay=34 (6~63),Diff = 11 PI (14 cell)
773 11:08:35.184104 CA2 delay=29 (1~57),Diff = 6 PI (7 cell)
774 11:08:35.187691 CA3 delay=23 (-3~50),Diff = 0 PI (0 cell)
775 11:08:35.190803 CA4 delay=24 (-2~51),Diff = 1 PI (1 cell)
776 11:08:35.194266 CA5 delay=30 (2~58),Diff = 7 PI (8 cell)
777 11:08:35.197671
778 11:08:35.201028 CA PerBit enable=1, Macro0, CA PI delay=23
779 11:08:35.201102 === u2Vref_new: 0x56 --> 0x2d
780 11:08:35.201198
781 11:08:35.204644 Vref(ca) range 1: 22
782 11:08:35.204710
783 11:08:35.207980 CS Dly= 11 (42-0-32)
784 11:08:35.208049 Write Rank1 MR13 =0xd8
785 11:08:35.211486 Write Rank1 MR13 =0xd8
786 11:08:35.214551 Write Rank1 MR12 =0x56
787 11:08:35.217797 [RankSwap] Rank num 2, (Multi 1), Rank 0
788 11:08:35.217866 Write Rank0 MR2 =0xad
789 11:08:35.221214 [Write Leveling]
790 11:08:35.224677 delay byte0 byte1 byte2 byte3
791 11:08:35.224747
792 11:08:35.224832 10 0 0
793 11:08:35.224892 11 0 0
794 11:08:35.227710 12 0 0
795 11:08:35.227776 13 0 0
796 11:08:35.231222 14 0 0
797 11:08:35.231297 15 0 0
798 11:08:35.234583 16 0 0
799 11:08:35.234664 17 0 0
800 11:08:35.234736 18 0 0
801 11:08:35.238169 19 0 0
802 11:08:35.238233 20 0 0
803 11:08:35.241673 21 0 0
804 11:08:35.241748 22 0 0
805 11:08:35.241806 23 0 0
806 11:08:35.244871 24 0 0
807 11:08:35.244969 25 0 0
808 11:08:35.248081 26 0 ff
809 11:08:35.248178 27 0 ff
810 11:08:35.251585 28 0 ff
811 11:08:35.251658 29 0 ff
812 11:08:35.251716 30 0 ff
813 11:08:35.255133 31 0 ff
814 11:08:35.255210 32 0 ff
815 11:08:35.257901 33 ff ff
816 11:08:35.257968 34 ff ff
817 11:08:35.261627 35 ff ff
818 11:08:35.261698 36 ff ff
819 11:08:35.264925 37 ff ff
820 11:08:35.265025 38 ff ff
821 11:08:35.268352 39 ff ff
822 11:08:35.271620 pass bytecount = 0xff (0xff: all bytes pass)
823 11:08:35.271694
824 11:08:35.271753 DQS0 dly: 33
825 11:08:35.274788 DQS1 dly: 26
826 11:08:35.274855 Write Rank0 MR2 =0x2d
827 11:08:35.277755 [RankSwap] Rank num 2, (Multi 1), Rank 0
828 11:08:35.280996 Write Rank0 MR1 =0xd6
829 11:08:35.281097 [Gating]
830 11:08:35.281212 ==
831 11:08:35.288045 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
832 11:08:35.291991 fsp= 1, odt_onoff= 1, Byte mode= 0
833 11:08:35.292086 ==
834 11:08:35.294831 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
835 11:08:35.298111 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
836 11:08:35.304447 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
837 11:08:35.307927 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
838 11:08:35.311280 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
839 11:08:35.318382 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
840 11:08:35.321709 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
841 11:08:35.324815 3 1 28 |2c2c 2c2b |(11 10)(11 11) |(0 0)(1 0)| 0
842 11:08:35.328509 3 2 0 |3534 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
843 11:08:35.335179 3 2 4 |3534 909 |(11 11)(11 11) |(0 0)(0 0)| 0
844 11:08:35.338545 3 2 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
845 11:08:35.341675 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
846 11:08:35.348519 3 2 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
847 11:08:35.351524 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
848 11:08:35.355318 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
849 11:08:35.358527 3 2 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
850 11:08:35.365237 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
851 11:08:35.368591 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
852 11:08:35.371672 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
853 11:08:35.379022 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
854 11:08:35.381716 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
855 11:08:35.385343 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
856 11:08:35.391840 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
857 11:08:35.395385 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
858 11:08:35.398683 3 4 0 |403 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
859 11:08:35.401912 3 4 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
860 11:08:35.409053 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 11:08:35.412655 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 11:08:35.415473 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 11:08:35.422282 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 11:08:35.425636 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 11:08:35.429231 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 11:08:35.432749 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 11:08:35.439640 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 11:08:35.442736 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 11:08:35.446029 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 11:08:35.452399 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
871 11:08:35.456172 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
872 11:08:35.459330 [Byte 0] Lead/lag falling Transition (3, 5, 20)
873 11:08:35.465764 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
874 11:08:35.469297 [Byte 1] Lead/lag falling Transition (3, 5, 24)
875 11:08:35.472478 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
876 11:08:35.475887 [Byte 0] Lead/lag Transition tap number (3)
877 11:08:35.479078 [Byte 1] Lead/lag Transition tap number (2)
878 11:08:35.486205 3 6 0 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
879 11:08:35.489205 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
880 11:08:35.492795 [Byte 0]First pass (3, 6, 4)
881 11:08:35.495857 3 6 8 |4646 404 |(0 0)(1 1) |(0 0)(0 0)| 0
882 11:08:35.499185 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 11:08:35.502674 [Byte 1]First pass (3, 6, 12)
884 11:08:35.506098 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 11:08:35.509380 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 11:08:35.512884 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 11:08:35.519876 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 11:08:35.522928 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 11:08:35.526049 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
890 11:08:35.529641 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
891 11:08:35.532752 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
892 11:08:35.539324 All bytes gating window > 1UI, Early break!
893 11:08:35.539411
894 11:08:35.542823 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
895 11:08:35.542899
896 11:08:35.546099 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
897 11:08:35.546176
898 11:08:35.546234
899 11:08:35.546288
900 11:08:35.549829 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
901 11:08:35.549905
902 11:08:35.553030 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
903 11:08:35.553128
904 11:08:35.556399
905 11:08:35.559777 wait MRW command Rank0 MR1 =0x56 fired (1)
906 11:08:35.559852 Write Rank0 MR1 =0x56
907 11:08:35.559911
908 11:08:35.562891 best RODT dly(2T, 0.5T) = (2, 2)
909 11:08:35.562966
910 11:08:35.566414 best RODT dly(2T, 0.5T) = (2, 2)
911 11:08:35.566490 ==
912 11:08:35.572794 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
913 11:08:35.576643 fsp= 1, odt_onoff= 1, Byte mode= 0
914 11:08:35.576722 ==
915 11:08:35.579913 Start DQ dly to find pass range UseTestEngine =0
916 11:08:35.582953 x-axis: bit #, y-axis: DQ dly (-127~63)
917 11:08:35.583030 RX Vref Scan = 0
918 11:08:35.586543 -26, [0] xxxxxxxx xxxxxxxx [MSB]
919 11:08:35.590059 -25, [0] xxxxxxxx xxxxxxxx [MSB]
920 11:08:35.593004 -24, [0] xxxxxxxx xxxxxxxx [MSB]
921 11:08:35.596624 -23, [0] xxxxxxxx xxxxxxxx [MSB]
922 11:08:35.599680 -22, [0] xxxxxxxx xxxxxxxx [MSB]
923 11:08:35.603198 -21, [0] xxxxxxxx xxxxxxxx [MSB]
924 11:08:35.606438 -20, [0] xxxxxxxx xxxxxxxx [MSB]
925 11:08:35.606515 -19, [0] xxxxxxxx xxxxxxxx [MSB]
926 11:08:35.610402 -18, [0] xxxxxxxx xxxxxxxx [MSB]
927 11:08:35.613240 -17, [0] xxxxxxxx xxxxxxxx [MSB]
928 11:08:35.616494 -16, [0] xxxxxxxx xxxxxxxx [MSB]
929 11:08:35.619960 -15, [0] xxxxxxxx xxxxxxxx [MSB]
930 11:08:35.623091 -14, [0] xxxxxxxx xxxxxxxx [MSB]
931 11:08:35.626943 -13, [0] xxxxxxxx xxxxxxxx [MSB]
932 11:08:35.629762 -12, [0] xxxxxxxx xxxxxxxx [MSB]
933 11:08:35.629839 -11, [0] xxxxxxxx xxxxxxxx [MSB]
934 11:08:35.633095 -10, [0] xxxxxxxx xxxxxxxx [MSB]
935 11:08:35.636922 -9, [0] xxxxxxxx xxxxxxxx [MSB]
936 11:08:35.640540 -8, [0] xxxxxxxx xxxxxxxx [MSB]
937 11:08:35.643689 -7, [0] xxxxxxxx xxxxxxxx [MSB]
938 11:08:35.647028 -6, [0] xxxxxxxx xxxxxxxx [MSB]
939 11:08:35.650075 -5, [0] xxxxxxxx xxxxxxxx [MSB]
940 11:08:35.650153 -4, [0] xxxxxxxx xxxxxxxx [MSB]
941 11:08:35.653479 -3, [0] xxxxxxxx xxxxxxxx [MSB]
942 11:08:35.656737 -2, [0] xxxxxxxx xxxxxxxx [MSB]
943 11:08:35.660209 -1, [0] xxxxxxxx xxxxxxxx [MSB]
944 11:08:35.663487 0, [0] xxxoxoxx xxxxxxxx [MSB]
945 11:08:35.667097 1, [0] xxxoxoxx xxxoxxxx [MSB]
946 11:08:35.667174 2, [0] xxxoxoxo xxxoxoxx [MSB]
947 11:08:35.670368 3, [0] xxxoxooo oxxoxoox [MSB]
948 11:08:35.673473 4, [0] xxxoxooo ooxoxooo [MSB]
949 11:08:35.676928 5, [0] xxxoxooo ooxooooo [MSB]
950 11:08:35.680189 6, [0] xxxoxooo ooxooooo [MSB]
951 11:08:35.683956 7, [0] xxoooooo ooxooooo [MSB]
952 11:08:35.684034 8, [0] xooooooo oooooooo [MSB]
953 11:08:35.686928 9, [0] xooooooo oooooooo [MSB]
954 11:08:35.690648 10, [0] xooooooo oooooooo [MSB]
955 11:08:35.693972 31, [0] oooooooo oooooooo [MSB]
956 11:08:35.697367 32, [0] oooxoooo oooooooo [MSB]
957 11:08:35.700416 33, [0] oooxoooo oooooxoo [MSB]
958 11:08:35.700493 34, [0] oooxoxxo oooooxxo [MSB]
959 11:08:35.703799 35, [0] oooxoxxx xooooxxo [MSB]
960 11:08:35.707294 36, [0] oooxoxxx xooxoxxo [MSB]
961 11:08:35.710634 37, [0] oooxoxxx xxoxxxxx [MSB]
962 11:08:35.713700 38, [0] oooxoxxx xxoxxxxx [MSB]
963 11:08:35.717290 39, [0] oooxoxxx xxoxxxxx [MSB]
964 11:08:35.721045 40, [0] oooxoxxx xxoxxxxx [MSB]
965 11:08:35.721173 41, [0] xoxxxxxx xxoxxxxx [MSB]
966 11:08:35.723863 42, [0] xxxxxxxx xxxxxxxx [MSB]
967 11:08:35.726830 iDelay=42, Bit 0, Center 25 (11 ~ 40) 30
968 11:08:35.730217 iDelay=42, Bit 1, Center 24 (8 ~ 41) 34
969 11:08:35.733697 iDelay=42, Bit 2, Center 23 (7 ~ 40) 34
970 11:08:35.737260 iDelay=42, Bit 3, Center 15 (0 ~ 31) 32
971 11:08:35.743975 iDelay=42, Bit 4, Center 23 (7 ~ 40) 34
972 11:08:35.747259 iDelay=42, Bit 5, Center 16 (0 ~ 33) 34
973 11:08:35.750604 iDelay=42, Bit 6, Center 18 (3 ~ 33) 31
974 11:08:35.753953 iDelay=42, Bit 7, Center 18 (2 ~ 34) 33
975 11:08:35.757392 iDelay=42, Bit 8, Center 18 (3 ~ 34) 32
976 11:08:35.761009 iDelay=42, Bit 9, Center 20 (4 ~ 36) 33
977 11:08:35.764085 iDelay=42, Bit 10, Center 24 (8 ~ 41) 34
978 11:08:35.767670 iDelay=42, Bit 11, Center 18 (1 ~ 35) 35
979 11:08:35.770731 iDelay=42, Bit 12, Center 20 (5 ~ 36) 32
980 11:08:35.774100 iDelay=42, Bit 13, Center 17 (2 ~ 32) 31
981 11:08:35.777418 iDelay=42, Bit 14, Center 18 (3 ~ 33) 31
982 11:08:35.780592 iDelay=42, Bit 15, Center 20 (4 ~ 36) 33
983 11:08:35.780668 ==
984 11:08:35.787661 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
985 11:08:35.791076 fsp= 1, odt_onoff= 1, Byte mode= 0
986 11:08:35.791152 ==
987 11:08:35.791212 DQS Delay:
988 11:08:35.794246 DQS0 = 0, DQS1 = 0
989 11:08:35.794335 DQM Delay:
990 11:08:35.797845 DQM0 = 20, DQM1 = 19
991 11:08:35.797920 DQ Delay:
992 11:08:35.801221 DQ0 =25, DQ1 =24, DQ2 =23, DQ3 =15
993 11:08:35.804423 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
994 11:08:35.807726 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =18
995 11:08:35.811092 DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20
996 11:08:35.811168
997 11:08:35.811227
998 11:08:35.811281 DramC Write-DBI off
999 11:08:35.811333 ==
1000 11:08:35.817904 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1001 11:08:35.820805 fsp= 1, odt_onoff= 1, Byte mode= 0
1002 11:08:35.820884 ==
1003 11:08:35.824527 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1004 11:08:35.824604
1005 11:08:35.827861 Begin, DQ Scan Range 922~1178
1006 11:08:35.827937
1007 11:08:35.827996
1008 11:08:35.831299 TX Vref Scan disable
1009 11:08:35.834607 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1010 11:08:35.838143 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1011 11:08:35.841314 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1012 11:08:35.844850 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1013 11:08:35.847996 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1014 11:08:35.851220 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1015 11:08:35.854646 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1016 11:08:35.857991 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1017 11:08:35.861412 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1018 11:08:35.865268 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1019 11:08:35.868547 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1020 11:08:35.871724 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1021 11:08:35.875418 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1022 11:08:35.878110 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1023 11:08:35.881977 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1024 11:08:35.888344 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1025 11:08:35.891687 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1026 11:08:35.895434 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1027 11:08:35.898806 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1028 11:08:35.902114 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1029 11:08:35.905285 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1030 11:08:35.908550 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1031 11:08:35.912051 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1032 11:08:35.915375 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1033 11:08:35.918840 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1034 11:08:35.922044 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1035 11:08:35.925273 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1036 11:08:35.928936 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1037 11:08:35.932200 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1038 11:08:35.935428 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1039 11:08:35.938785 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1040 11:08:35.942347 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1041 11:08:35.945780 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1042 11:08:35.948941 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1043 11:08:35.955496 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1044 11:08:35.959002 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1045 11:08:35.962163 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1046 11:08:35.965759 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1047 11:08:35.968972 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1048 11:08:35.972783 961 |3 6 1|[0] xxxxxxxx oxxxxxxx [MSB]
1049 11:08:35.975690 962 |3 6 2|[0] xxxxxxxx oxxoxxxx [MSB]
1050 11:08:35.978993 963 |3 6 3|[0] xxxxxxxx oxxoxoxx [MSB]
1051 11:08:35.982534 964 |3 6 4|[0] xxxxxxxx ooxoooox [MSB]
1052 11:08:35.986041 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1053 11:08:35.989538 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1054 11:08:35.992727 967 |3 6 7|[0] xxxxxxxx ooxooooo [MSB]
1055 11:08:35.996122 968 |3 6 8|[0] xxxxxxxx oooooooo [MSB]
1056 11:08:35.999394 969 |3 6 9|[0] xxxoxoxx oooooooo [MSB]
1057 11:08:36.002771 970 |3 6 10|[0] xxxoxoox oooooooo [MSB]
1058 11:08:36.005755 971 |3 6 11|[0] xxxoxoox oooooooo [MSB]
1059 11:08:36.009762 972 |3 6 12|[0] xxxoxoox oooooooo [MSB]
1060 11:08:36.012789 973 |3 6 13|[0] xxxooooo oooooooo [MSB]
1061 11:08:36.015914 974 |3 6 14|[0] xxxooooo oooooooo [MSB]
1062 11:08:36.019315 975 |3 6 15|[0] xooooooo oooooooo [MSB]
1063 11:08:36.027188 986 |3 6 26|[0] oooooooo oooxoxoo [MSB]
1064 11:08:36.030377 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1065 11:08:36.033596 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1066 11:08:36.037244 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1067 11:08:36.040451 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1068 11:08:36.043540 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1069 11:08:36.047011 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1070 11:08:36.050405 993 |3 6 33|[0] oooxoxxo xxxxxxxx [MSB]
1071 11:08:36.053456 994 |3 6 34|[0] xxxxxxxx xxxxxxxx [MSB]
1072 11:08:36.056836 Byte0, DQ PI dly=982, DQM PI dly= 982
1073 11:08:36.060411 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1074 11:08:36.060487
1075 11:08:36.067314 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1076 11:08:36.067390
1077 11:08:36.070526 Byte1, DQ PI dly=975, DQM PI dly= 975
1078 11:08:36.074219 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1079 11:08:36.074294
1080 11:08:36.077074 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1081 11:08:36.077208
1082 11:08:36.077316 ==
1083 11:08:36.083957 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1084 11:08:36.087422 fsp= 1, odt_onoff= 1, Byte mode= 0
1085 11:08:36.087498 ==
1086 11:08:36.091316 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1087 11:08:36.091392
1088 11:08:36.094424 Begin, DQ Scan Range 951~1015
1089 11:08:36.097178 Write Rank0 MR14 =0x0
1090 11:08:36.104515
1091 11:08:36.104590 CH=0, VrefRange= 0, VrefLevel = 0
1092 11:08:36.111272 TX Bit0 (977~994) 18 985, Bit8 (964~983) 20 973,
1093 11:08:36.115386 TX Bit1 (977~993) 17 985, Bit9 (967~982) 16 974,
1094 11:08:36.122151 TX Bit2 (976~993) 18 984, Bit10 (969~989) 21 979,
1095 11:08:36.124662 TX Bit3 (970~986) 17 978, Bit11 (965~982) 18 973,
1096 11:08:36.127998 TX Bit4 (976~993) 18 984, Bit12 (967~983) 17 975,
1097 11:08:36.134408 TX Bit5 (972~987) 16 979, Bit13 (966~982) 17 974,
1098 11:08:36.138050 TX Bit6 (974~988) 15 981, Bit14 (967~983) 17 975,
1099 11:08:36.141445 TX Bit7 (976~991) 16 983, Bit15 (968~983) 16 975,
1100 11:08:36.141551
1101 11:08:36.144673 Write Rank0 MR14 =0x2
1102 11:08:36.153062
1103 11:08:36.153196 CH=0, VrefRange= 0, VrefLevel = 2
1104 11:08:36.159961 TX Bit0 (977~994) 18 985, Bit8 (964~983) 20 973,
1105 11:08:36.163243 TX Bit1 (977~993) 17 985, Bit9 (967~983) 17 975,
1106 11:08:36.170200 TX Bit2 (976~993) 18 984, Bit10 (969~989) 21 979,
1107 11:08:36.173565 TX Bit3 (970~987) 18 978, Bit11 (965~982) 18 973,
1108 11:08:36.176751 TX Bit4 (976~994) 19 985, Bit12 (966~983) 18 974,
1109 11:08:36.183341 TX Bit5 (971~988) 18 979, Bit13 (966~982) 17 974,
1110 11:08:36.186580 TX Bit6 (973~989) 17 981, Bit14 (967~984) 18 975,
1111 11:08:36.190007 TX Bit7 (976~991) 16 983, Bit15 (968~983) 16 975,
1112 11:08:36.190099
1113 11:08:36.193109 Write Rank0 MR14 =0x4
1114 11:08:36.202012
1115 11:08:36.202094 CH=0, VrefRange= 0, VrefLevel = 4
1116 11:08:36.208618 TX Bit0 (977~995) 19 986, Bit8 (963~984) 22 973,
1117 11:08:36.212566 TX Bit1 (977~994) 18 985, Bit9 (966~983) 18 974,
1118 11:08:36.218912 TX Bit2 (977~993) 17 985, Bit10 (969~989) 21 979,
1119 11:08:36.222221 TX Bit3 (970~987) 18 978, Bit11 (964~983) 20 973,
1120 11:08:36.226031 TX Bit4 (975~994) 20 984, Bit12 (966~983) 18 974,
1121 11:08:36.232357 TX Bit5 (971~988) 18 979, Bit13 (965~983) 19 974,
1122 11:08:36.235761 TX Bit6 (973~990) 18 981, Bit14 (966~984) 19 975,
1123 11:08:36.238835 TX Bit7 (976~991) 16 983, Bit15 (968~984) 17 976,
1124 11:08:36.238913
1125 11:08:36.242846 Write Rank0 MR14 =0x6
1126 11:08:36.250716
1127 11:08:36.250793 CH=0, VrefRange= 0, VrefLevel = 6
1128 11:08:36.257947 TX Bit0 (977~995) 19 986, Bit8 (963~984) 22 973,
1129 11:08:36.261304 TX Bit1 (976~994) 19 985, Bit9 (966~983) 18 974,
1130 11:08:36.267734 TX Bit2 (976~994) 19 985, Bit10 (969~989) 21 979,
1131 11:08:36.271105 TX Bit3 (969~987) 19 978, Bit11 (964~983) 20 973,
1132 11:08:36.274703 TX Bit4 (975~994) 20 984, Bit12 (966~984) 19 975,
1133 11:08:36.281534 TX Bit5 (971~990) 20 980, Bit13 (965~983) 19 974,
1134 11:08:36.284761 TX Bit6 (972~990) 19 981, Bit14 (965~985) 21 975,
1135 11:08:36.287758 TX Bit7 (976~992) 17 984, Bit15 (968~985) 18 976,
1136 11:08:36.287829
1137 11:08:36.291076 Write Rank0 MR14 =0x8
1138 11:08:36.300060
1139 11:08:36.303471 CH=0, VrefRange= 0, VrefLevel = 8
1140 11:08:36.306510 TX Bit0 (977~996) 20 986, Bit8 (963~984) 22 973,
1141 11:08:36.310257 TX Bit1 (976~994) 19 985, Bit9 (965~984) 20 974,
1142 11:08:36.316660 TX Bit2 (976~994) 19 985, Bit10 (968~990) 23 979,
1143 11:08:36.319858 TX Bit3 (969~988) 20 978, Bit11 (963~983) 21 973,
1144 11:08:36.323182 TX Bit4 (975~994) 20 984, Bit12 (965~984) 20 974,
1145 11:08:36.329925 TX Bit5 (970~990) 21 980, Bit13 (965~983) 19 974,
1146 11:08:36.333568 TX Bit6 (972~991) 20 981, Bit14 (966~985) 20 975,
1147 11:08:36.336610 TX Bit7 (975~992) 18 983, Bit15 (968~985) 18 976,
1148 11:08:36.336696
1149 11:08:36.340332 Write Rank0 MR14 =0xa
1150 11:08:36.396805
1151 11:08:36.396917 CH=0, VrefRange= 0, VrefLevel = 10
1152 11:08:36.397459 TX Bit0 (976~996) 21 986, Bit8 (962~985) 24 973,
1153 11:08:36.397839 TX Bit1 (976~994) 19 985, Bit9 (966~985) 20 975,
1154 11:08:36.398583 TX Bit2 (975~994) 20 984, Bit10 (968~990) 23 979,
1155 11:08:36.398647 TX Bit3 (969~989) 21 979, Bit11 (963~983) 21 973,
1156 11:08:36.399168 TX Bit4 (974~995) 22 984, Bit12 (965~985) 21 975,
1157 11:08:36.399406 TX Bit5 (970~991) 22 980, Bit13 (963~983) 21 973,
1158 11:08:36.399476 TX Bit6 (971~991) 21 981, Bit14 (965~986) 22 975,
1159 11:08:36.399952 TX Bit7 (975~992) 18 983, Bit15 (967~986) 20 976,
1160 11:08:36.400035
1161 11:08:36.400094 Write Rank0 MR14 =0xc
1162 11:08:36.400148
1163 11:08:36.412226 CH=0, VrefRange= 0, VrefLevel = 12
1164 11:08:36.412772 TX Bit0 (976~996) 21 986, Bit8 (962~985) 24 973,
1165 11:08:36.412859 TX Bit1 (976~995) 20 985, Bit9 (965~985) 21 975,
1166 11:08:36.415583 TX Bit2 (975~994) 20 984, Bit10 (968~990) 23 979,
1167 11:08:36.418687 TX Bit3 (969~989) 21 979, Bit11 (962~984) 23 973,
1168 11:08:36.422063 TX Bit4 (974~996) 23 985, Bit12 (965~985) 21 975,
1169 11:08:36.425382 TX Bit5 (970~991) 22 980, Bit13 (964~984) 21 974,
1170 11:08:36.432022 TX Bit6 (971~992) 22 981, Bit14 (965~986) 22 975,
1171 11:08:36.435764 TX Bit7 (975~993) 19 984, Bit15 (968~987) 20 977,
1172 11:08:36.435889
1173 11:08:36.438862 Write Rank0 MR14 =0xe
1174 11:08:36.448017
1175 11:08:36.451065 CH=0, VrefRange= 0, VrefLevel = 14
1176 11:08:36.454419 TX Bit0 (976~997) 22 986, Bit8 (961~986) 26 973,
1177 11:08:36.457652 TX Bit1 (976~995) 20 985, Bit9 (964~985) 22 974,
1178 11:08:36.464596 TX Bit2 (975~995) 21 985, Bit10 (968~990) 23 979,
1179 11:08:36.467929 TX Bit3 (969~991) 23 980, Bit11 (962~984) 23 973,
1180 11:08:36.471147 TX Bit4 (974~996) 23 985, Bit12 (964~986) 23 975,
1181 11:08:36.477548 TX Bit5 (970~991) 22 980, Bit13 (963~984) 22 973,
1182 11:08:36.480921 TX Bit6 (970~992) 23 981, Bit14 (964~987) 24 975,
1183 11:08:36.484697 TX Bit7 (974~993) 20 983, Bit15 (967~988) 22 977,
1184 11:08:36.485085
1185 11:08:36.487673 Write Rank0 MR14 =0x10
1186 11:08:36.497132
1187 11:08:36.497549 CH=0, VrefRange= 0, VrefLevel = 16
1188 11:08:36.503547 TX Bit0 (976~997) 22 986, Bit8 (961~986) 26 973,
1189 11:08:36.507262 TX Bit1 (976~996) 21 986, Bit9 (964~986) 23 975,
1190 11:08:36.513949 TX Bit2 (975~995) 21 985, Bit10 (968~991) 24 979,
1191 11:08:36.517537 TX Bit3 (968~991) 24 979, Bit11 (962~985) 24 973,
1192 11:08:36.520634 TX Bit4 (973~997) 25 985, Bit12 (964~986) 23 975,
1193 11:08:36.527253 TX Bit5 (970~992) 23 981, Bit13 (963~985) 23 974,
1194 11:08:36.530889 TX Bit6 (970~992) 23 981, Bit14 (964~988) 25 976,
1195 11:08:36.533610 TX Bit7 (974~994) 21 984, Bit15 (967~988) 22 977,
1196 11:08:36.534013
1197 11:08:36.538095 Write Rank0 MR14 =0x12
1198 11:08:36.546629
1199 11:08:36.549755 CH=0, VrefRange= 0, VrefLevel = 18
1200 11:08:36.553268 TX Bit0 (975~998) 24 986, Bit8 (961~987) 27 974,
1201 11:08:36.556516 TX Bit1 (975~996) 22 985, Bit9 (964~987) 24 975,
1202 11:08:36.563538 TX Bit2 (974~996) 23 985, Bit10 (968~991) 24 979,
1203 11:08:36.566945 TX Bit3 (968~991) 24 979, Bit11 (962~985) 24 973,
1204 11:08:36.569937 TX Bit4 (973~997) 25 985, Bit12 (964~987) 24 975,
1205 11:08:36.576724 TX Bit5 (969~992) 24 980, Bit13 (963~985) 23 974,
1206 11:08:36.579863 TX Bit6 (970~992) 23 981, Bit14 (963~989) 27 976,
1207 11:08:36.583514 TX Bit7 (974~994) 21 984, Bit15 (966~989) 24 977,
1208 11:08:36.583915
1209 11:08:36.586705 Write Rank0 MR14 =0x14
1210 11:08:36.596171
1211 11:08:36.599671 CH=0, VrefRange= 0, VrefLevel = 20
1212 11:08:36.602958 TX Bit0 (975~999) 25 987, Bit8 (961~987) 27 974,
1213 11:08:36.606606 TX Bit1 (975~997) 23 986, Bit9 (963~988) 26 975,
1214 11:08:36.613071 TX Bit2 (974~996) 23 985, Bit10 (967~991) 25 979,
1215 11:08:36.616317 TX Bit3 (968~992) 25 980, Bit11 (961~986) 26 973,
1216 11:08:36.620036 TX Bit4 (973~998) 26 985, Bit12 (963~988) 26 975,
1217 11:08:36.626453 TX Bit5 (969~992) 24 980, Bit13 (962~986) 25 974,
1218 11:08:36.629925 TX Bit6 (970~993) 24 981, Bit14 (963~988) 26 975,
1219 11:08:36.632880 TX Bit7 (972~994) 23 983, Bit15 (966~989) 24 977,
1220 11:08:36.633410
1221 11:08:36.636216 Write Rank0 MR14 =0x16
1222 11:08:36.645981
1223 11:08:36.649170 CH=0, VrefRange= 0, VrefLevel = 22
1224 11:08:36.652622 TX Bit0 (975~999) 25 987, Bit8 (961~987) 27 974,
1225 11:08:36.655669 TX Bit1 (975~997) 23 986, Bit9 (962~988) 27 975,
1226 11:08:36.662853 TX Bit2 (974~997) 24 985, Bit10 (967~991) 25 979,
1227 11:08:36.665997 TX Bit3 (968~992) 25 980, Bit11 (961~986) 26 973,
1228 11:08:36.669411 TX Bit4 (972~998) 27 985, Bit12 (962~987) 26 974,
1229 11:08:36.675994 TX Bit5 (969~992) 24 980, Bit13 (962~986) 25 974,
1230 11:08:36.679294 TX Bit6 (969~993) 25 981, Bit14 (962~988) 27 975,
1231 11:08:36.682689 TX Bit7 (972~995) 24 983, Bit15 (966~989) 24 977,
1232 11:08:36.683197
1233 11:08:36.686268 Write Rank0 MR14 =0x18
1234 11:08:36.695602
1235 11:08:36.698914 CH=0, VrefRange= 0, VrefLevel = 24
1236 11:08:36.702121 TX Bit0 (975~999) 25 987, Bit8 (962~986) 25 974,
1237 11:08:36.705684 TX Bit1 (974~998) 25 986, Bit9 (963~988) 26 975,
1238 11:08:36.712306 TX Bit2 (974~997) 24 985, Bit10 (967~991) 25 979,
1239 11:08:36.715961 TX Bit3 (968~992) 25 980, Bit11 (961~985) 25 973,
1240 11:08:36.718865 TX Bit4 (973~998) 26 985, Bit12 (962~987) 26 974,
1241 11:08:36.725838 TX Bit5 (969~992) 24 980, Bit13 (962~985) 24 973,
1242 11:08:36.729292 TX Bit6 (969~993) 25 981, Bit14 (963~987) 25 975,
1243 11:08:36.732436 TX Bit7 (972~995) 24 983, Bit15 (966~990) 25 978,
1244 11:08:36.732822
1245 11:08:36.735755 Write Rank0 MR14 =0x1a
1246 11:08:36.746176
1247 11:08:36.748694 CH=0, VrefRange= 0, VrefLevel = 26
1248 11:08:36.751825 TX Bit0 (975~999) 25 987, Bit8 (962~986) 25 974,
1249 11:08:36.755174 TX Bit1 (974~998) 25 986, Bit9 (963~988) 26 975,
1250 11:08:36.762236 TX Bit2 (974~997) 24 985, Bit10 (967~991) 25 979,
1251 11:08:36.765700 TX Bit3 (968~992) 25 980, Bit11 (961~985) 25 973,
1252 11:08:36.769243 TX Bit4 (973~998) 26 985, Bit12 (962~987) 26 974,
1253 11:08:36.775837 TX Bit5 (969~992) 24 980, Bit13 (962~985) 24 973,
1254 11:08:36.778683 TX Bit6 (969~993) 25 981, Bit14 (963~987) 25 975,
1255 11:08:36.781925 TX Bit7 (972~995) 24 983, Bit15 (966~990) 25 978,
1256 11:08:36.782377
1257 11:08:36.784996 Write Rank0 MR14 =0x1c
1258 11:08:36.795005
1259 11:08:36.797994 CH=0, VrefRange= 0, VrefLevel = 28
1260 11:08:36.801757 TX Bit0 (975~999) 25 987, Bit8 (962~986) 25 974,
1261 11:08:36.804839 TX Bit1 (974~998) 25 986, Bit9 (963~988) 26 975,
1262 11:08:36.811816 TX Bit2 (974~997) 24 985, Bit10 (967~991) 25 979,
1263 11:08:36.814820 TX Bit3 (968~992) 25 980, Bit11 (961~985) 25 973,
1264 11:08:36.818582 TX Bit4 (973~998) 26 985, Bit12 (962~987) 26 974,
1265 11:08:36.825413 TX Bit5 (969~992) 24 980, Bit13 (962~985) 24 973,
1266 11:08:36.828565 TX Bit6 (969~993) 25 981, Bit14 (963~987) 25 975,
1267 11:08:36.832007 TX Bit7 (972~995) 24 983, Bit15 (966~990) 25 978,
1268 11:08:36.832400
1269 11:08:36.835481 Write Rank0 MR14 =0x1e
1270 11:08:36.844949
1271 11:08:36.845605 CH=0, VrefRange= 0, VrefLevel = 30
1272 11:08:36.851195 TX Bit0 (975~999) 25 987, Bit8 (962~986) 25 974,
1273 11:08:36.854441 TX Bit1 (974~998) 25 986, Bit9 (963~988) 26 975,
1274 11:08:36.861543 TX Bit2 (974~997) 24 985, Bit10 (967~991) 25 979,
1275 11:08:36.864317 TX Bit3 (968~992) 25 980, Bit11 (961~985) 25 973,
1276 11:08:36.867829 TX Bit4 (973~998) 26 985, Bit12 (962~987) 26 974,
1277 11:08:36.874420 TX Bit5 (969~992) 24 980, Bit13 (962~985) 24 973,
1278 11:08:36.878254 TX Bit6 (969~993) 25 981, Bit14 (963~987) 25 975,
1279 11:08:36.881584 TX Bit7 (972~995) 24 983, Bit15 (966~990) 25 978,
1280 11:08:36.882102
1281 11:08:36.882523
1282 11:08:36.884437 TX Vref found, early break! 371< 379
1283 11:08:36.891345 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1284 11:08:36.894645 u1DelayCellOfst[0]=8 cells (7 PI)
1285 11:08:36.898245 u1DelayCellOfst[1]=7 cells (6 PI)
1286 11:08:36.901685 u1DelayCellOfst[2]=6 cells (5 PI)
1287 11:08:36.902324 u1DelayCellOfst[3]=0 cells (0 PI)
1288 11:08:36.904572 u1DelayCellOfst[4]=6 cells (5 PI)
1289 11:08:36.908145 u1DelayCellOfst[5]=0 cells (0 PI)
1290 11:08:36.911958 u1DelayCellOfst[6]=1 cells (1 PI)
1291 11:08:36.914889 u1DelayCellOfst[7]=3 cells (3 PI)
1292 11:08:36.918261 Byte0, DQ PI dly=980, DQM PI dly= 983
1293 11:08:36.921535 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1294 11:08:36.922100
1295 11:08:36.928108 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1296 11:08:36.928680
1297 11:08:36.931576 u1DelayCellOfst[8]=1 cells (1 PI)
1298 11:08:36.934790 u1DelayCellOfst[9]=2 cells (2 PI)
1299 11:08:36.937997 u1DelayCellOfst[10]=7 cells (6 PI)
1300 11:08:36.938577 u1DelayCellOfst[11]=0 cells (0 PI)
1301 11:08:36.941606 u1DelayCellOfst[12]=1 cells (1 PI)
1302 11:08:36.944875 u1DelayCellOfst[13]=0 cells (0 PI)
1303 11:08:36.948206 u1DelayCellOfst[14]=2 cells (2 PI)
1304 11:08:36.951640 u1DelayCellOfst[15]=6 cells (5 PI)
1305 11:08:36.954907 Byte1, DQ PI dly=973, DQM PI dly= 976
1306 11:08:36.958314 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)
1307 11:08:36.961686
1308 11:08:36.964875 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)
1309 11:08:36.965411
1310 11:08:36.965875 Write Rank0 MR14 =0x18
1311 11:08:36.968101
1312 11:08:36.968575 Final TX Range 0 Vref 24
1313 11:08:36.969032
1314 11:08:36.975305 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1315 11:08:36.975811
1316 11:08:36.981766 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1317 11:08:36.988375 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1318 11:08:36.995492 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1319 11:08:36.998305 Write Rank0 MR3 =0xb0
1320 11:08:36.998691 DramC Write-DBI on
1321 11:08:37.001471 ==
1322 11:08:37.004854 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1323 11:08:37.008574 fsp= 1, odt_onoff= 1, Byte mode= 0
1324 11:08:37.009134 ==
1325 11:08:37.011368 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1326 11:08:37.011712
1327 11:08:37.015205 Begin, DQ Scan Range 696~760
1328 11:08:37.015502
1329 11:08:37.015821
1330 11:08:37.018463 TX Vref Scan disable
1331 11:08:37.021650 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1332 11:08:37.025363 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1333 11:08:37.028241 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1334 11:08:37.031786 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1335 11:08:37.035048 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1336 11:08:37.038277 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1337 11:08:37.041761 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1338 11:08:37.045290 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1339 11:08:37.048629 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1340 11:08:37.051830 705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]
1341 11:08:37.055343 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1342 11:08:37.058724 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1343 11:08:37.062244 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1344 11:08:37.065518 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1345 11:08:37.068735 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1346 11:08:37.072212 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1347 11:08:37.075793 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1348 11:08:37.079183 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1349 11:08:37.082566 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1350 11:08:37.091688 733 |2 6 29|[0] oooooooo xxxxxxxx [MSB]
1351 11:08:37.095441 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1352 11:08:37.098720 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1353 11:08:37.102098 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1354 11:08:37.105540 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1355 11:08:37.108891 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1356 11:08:37.112048 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1357 11:08:37.115307 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1358 11:08:37.118777 741 |2 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1359 11:08:37.121897 Byte0, DQ PI dly=727, DQM PI dly= 727
1360 11:08:37.125873 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
1361 11:08:37.126232
1362 11:08:37.132083 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
1363 11:08:37.132411
1364 11:08:37.135362 Byte1, DQ PI dly=718, DQM PI dly= 718
1365 11:08:37.138858 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 14)
1366 11:08:37.139190
1367 11:08:37.142143 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 14)
1368 11:08:37.142474
1369 11:08:37.148887 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1370 11:08:37.155455 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1371 11:08:37.162404 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1372 11:08:37.165531 Write Rank0 MR3 =0x30
1373 11:08:37.169131 DramC Write-DBI off
1374 11:08:37.169470
1375 11:08:37.169719 [DATLAT]
1376 11:08:37.172229 Freq=1600, CH0 RK0, use_rxtx_scan=0
1377 11:08:37.172558
1378 11:08:37.172830 DATLAT Default: 0xf
1379 11:08:37.175748 7, 0xFFFF, sum=0
1380 11:08:37.176078 8, 0xFFFF, sum=0
1381 11:08:37.178786 9, 0xFFFF, sum=0
1382 11:08:37.179119 10, 0xFFFF, sum=0
1383 11:08:37.182510 11, 0xFFFF, sum=0
1384 11:08:37.182882 12, 0xFFFF, sum=0
1385 11:08:37.185558 13, 0xFFFF, sum=0
1386 11:08:37.185987 14, 0x0, sum=1
1387 11:08:37.188935 15, 0x0, sum=2
1388 11:08:37.189296 16, 0x0, sum=3
1389 11:08:37.189559 17, 0x0, sum=4
1390 11:08:37.195792 pattern=2 first_step=14 total pass=5 best_step=16
1391 11:08:37.196127 ==
1392 11:08:37.199296 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1393 11:08:37.202451 fsp= 1, odt_onoff= 1, Byte mode= 0
1394 11:08:37.202779 ==
1395 11:08:37.209049 Start DQ dly to find pass range UseTestEngine =1
1396 11:08:37.211927 x-axis: bit #, y-axis: DQ dly (-127~63)
1397 11:08:37.212003 RX Vref Scan = 1
1398 11:08:37.335067
1399 11:08:37.335186 RX Vref found, early break!
1400 11:08:37.335246
1401 11:08:37.342063 Final RX Vref 13, apply to both rank0 and 1
1402 11:08:37.342140 ==
1403 11:08:37.345494 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1404 11:08:37.348639 fsp= 1, odt_onoff= 1, Byte mode= 0
1405 11:08:37.348715 ==
1406 11:08:37.348774 DQS Delay:
1407 11:08:37.351956 DQS0 = 0, DQS1 = 0
1408 11:08:37.352031 DQM Delay:
1409 11:08:37.355733 DQM0 = 20, DQM1 = 19
1410 11:08:37.355808 DQ Delay:
1411 11:08:37.358296 DQ0 =26, DQ1 =24, DQ2 =24, DQ3 =15
1412 11:08:37.361999 DQ4 =22, DQ5 =16, DQ6 =17, DQ7 =19
1413 11:08:37.365408 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =16
1414 11:08:37.368729 DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20
1415 11:08:37.368804
1416 11:08:37.368862
1417 11:08:37.368915
1418 11:08:37.371839 [DramC_TX_OE_Calibration] TA2
1419 11:08:37.375200 Original DQ_B0 (3 6) =30, OEN = 27
1420 11:08:37.379062 Original DQ_B1 (3 6) =30, OEN = 27
1421 11:08:37.381676 23, 0x0, End_B0=23 End_B1=23
1422 11:08:37.381753 24, 0x0, End_B0=24 End_B1=24
1423 11:08:37.385338 25, 0x0, End_B0=25 End_B1=25
1424 11:08:37.388545 26, 0x0, End_B0=26 End_B1=26
1425 11:08:37.391922 27, 0x0, End_B0=27 End_B1=27
1426 11:08:37.391999 28, 0x0, End_B0=28 End_B1=28
1427 11:08:37.395416 29, 0x0, End_B0=29 End_B1=29
1428 11:08:37.398924 30, 0x0, End_B0=30 End_B1=30
1429 11:08:37.401765 31, 0xFFFF, End_B0=30 End_B1=30
1430 11:08:37.405531 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1431 11:08:37.412443 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1432 11:08:37.412520
1433 11:08:37.412578
1434 11:08:37.415469 Write Rank0 MR23 =0x3f
1435 11:08:37.415544 [DQSOSC]
1436 11:08:37.422049 [DQSOSCAuto] RK0, (LSB)MR18= 0xa9, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps
1437 11:08:37.428987 CH0_RK0: MR19=0x3, MR18=0xA9, DQSOSC=336, MR23=63, INC=21, DEC=32
1438 11:08:37.432580 Write Rank0 MR23 =0x3f
1439 11:08:37.432655 [DQSOSC]
1440 11:08:37.439151 [DQSOSCAuto] RK0, (LSB)MR18= 0xa8, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps
1441 11:08:37.442354 CH0 RK0: MR19=3, MR18=A8
1442 11:08:37.445754 [RankSwap] Rank num 2, (Multi 1), Rank 1
1443 11:08:37.448977 Write Rank0 MR2 =0xad
1444 11:08:37.449076 [Write Leveling]
1445 11:08:37.452160 delay byte0 byte1 byte2 byte3
1446 11:08:37.452236
1447 11:08:37.452294 10 0 0
1448 11:08:37.455648 11 0 0
1449 11:08:37.455724 12 0 0
1450 11:08:37.459110 13 0 0
1451 11:08:37.459187 14 0 0
1452 11:08:37.459247 15 0 0
1453 11:08:37.462084 16 0 0
1454 11:08:37.462172 17 0 0
1455 11:08:37.465508 18 0 0
1456 11:08:37.465585 19 0 0
1457 11:08:37.465651 20 0 0
1458 11:08:37.469392 21 0 0
1459 11:08:37.469464 22 0 0
1460 11:08:37.472033 23 0 0
1461 11:08:37.472103 24 0 0
1462 11:08:37.475517 25 0 0
1463 11:08:37.475603 26 0 0
1464 11:08:37.475663 27 0 0
1465 11:08:37.478717 28 0 0
1466 11:08:37.478796 29 0 ff
1467 11:08:37.482016 30 0 ff
1468 11:08:37.482100 31 0 ff
1469 11:08:37.485904 32 0 ff
1470 11:08:37.485983 33 0 ff
1471 11:08:37.486046 34 ff ff
1472 11:08:37.488821 35 ff ff
1473 11:08:37.488900 36 ff ff
1474 11:08:37.492815 37 ff ff
1475 11:08:37.492892 38 ff ff
1476 11:08:37.495920 39 ff ff
1477 11:08:37.495997 40 ff ff
1478 11:08:37.498849 pass bytecount = 0xff (0xff: all bytes pass)
1479 11:08:37.498917
1480 11:08:37.502543 DQS0 dly: 34
1481 11:08:37.502611 DQS1 dly: 29
1482 11:08:37.505817 Write Rank0 MR2 =0x2d
1483 11:08:37.509265 [RankSwap] Rank num 2, (Multi 1), Rank 0
1484 11:08:37.509341 Write Rank1 MR1 =0xd6
1485 11:08:37.512725 [Gating]
1486 11:08:37.512799 ==
1487 11:08:37.515673 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1488 11:08:37.518937 fsp= 1, odt_onoff= 1, Byte mode= 0
1489 11:08:37.519011 ==
1490 11:08:37.526205 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1491 11:08:37.529175 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1492 11:08:37.532672 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1493 11:08:37.536078 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1494 11:08:37.542795 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1495 11:08:37.546269 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1496 11:08:37.549046 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1497 11:08:37.556012 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1498 11:08:37.559869 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1499 11:08:37.563079 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1500 11:08:37.568978 3 2 8 |404 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1501 11:08:37.572610 3 2 12 |201 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
1502 11:08:37.576015 3 2 16 |3534 404 |(11 11)(11 11) |(0 0)(0 0)| 0
1503 11:08:37.579070 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1504 11:08:37.586219 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1505 11:08:37.589684 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1506 11:08:37.592951 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1507 11:08:37.599662 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1508 11:08:37.602928 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1509 11:08:37.605678 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1510 11:08:37.612871 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1511 11:08:37.615884 [Byte 0] Lead/lag Transition tap number (1)
1512 11:08:37.619128 [Byte 1] Lead/lag falling Transition (3, 3, 16)
1513 11:08:37.623021 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1514 11:08:37.629588 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1515 11:08:37.633005 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1516 11:08:37.636218 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1517 11:08:37.639829 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1518 11:08:37.646233 3 4 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1519 11:08:37.649424 3 4 12 |201 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1520 11:08:37.653007 3 4 16 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
1521 11:08:37.659410 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1522 11:08:37.662874 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1523 11:08:37.666120 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1524 11:08:37.673026 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1525 11:08:37.676416 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1526 11:08:37.679900 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1527 11:08:37.683153 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1528 11:08:37.690104 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1529 11:08:37.692972 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1530 11:08:37.696287 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1531 11:08:37.703713 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1532 11:08:37.706920 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1533 11:08:37.709918 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1534 11:08:37.713046 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1535 11:08:37.719965 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1536 11:08:37.723007 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1537 11:08:37.726689 [Byte 0] Lead/lag Transition tap number (3)
1538 11:08:37.729799 [Byte 1] Lead/lag Transition tap number (3)
1539 11:08:37.737088 3 6 12 |202 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1540 11:08:37.740404 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1541 11:08:37.743580 [Byte 0]First pass (3, 6, 16)
1542 11:08:37.747085 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1543 11:08:37.750129 [Byte 1]First pass (3, 6, 20)
1544 11:08:37.753582 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1545 11:08:37.756893 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1546 11:08:37.759964 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1547 11:08:37.763527 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1548 11:08:37.770356 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1549 11:08:37.773700 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1550 11:08:37.776530 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1551 11:08:37.779975 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1552 11:08:37.783369 All bytes gating window > 1UI, Early break!
1553 11:08:37.787063
1554 11:08:37.790255 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
1555 11:08:37.790330
1556 11:08:37.793297 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)
1557 11:08:37.793372
1558 11:08:37.793430
1559 11:08:37.793483
1560 11:08:37.798037 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1561 11:08:37.798138
1562 11:08:37.800748 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1563 11:08:37.800822
1564 11:08:37.800880
1565 11:08:37.803492 Write Rank1 MR1 =0x56
1566 11:08:37.803567
1567 11:08:37.807282 best RODT dly(2T, 0.5T) = (2, 3)
1568 11:08:37.807358
1569 11:08:37.810223 best RODT dly(2T, 0.5T) = (2, 3)
1570 11:08:37.810298 ==
1571 11:08:37.813728 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1572 11:08:37.817099 fsp= 1, odt_onoff= 1, Byte mode= 0
1573 11:08:37.817224 ==
1574 11:08:37.823468 Start DQ dly to find pass range UseTestEngine =0
1575 11:08:37.826614 x-axis: bit #, y-axis: DQ dly (-127~63)
1576 11:08:37.826690 RX Vref Scan = 0
1577 11:08:37.830382 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1578 11:08:37.833654 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1579 11:08:37.836750 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1580 11:08:37.840421 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1581 11:08:37.840498 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1582 11:08:37.843495 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1583 11:08:37.846901 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1584 11:08:37.850293 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1585 11:08:37.853642 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1586 11:08:37.856864 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1587 11:08:37.860345 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1588 11:08:37.863609 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1589 11:08:37.863686 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1590 11:08:37.867152 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1591 11:08:37.871052 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1592 11:08:37.873746 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1593 11:08:37.877102 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1594 11:08:37.880682 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1595 11:08:37.884138 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1596 11:08:37.887062 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1597 11:08:37.887138 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1598 11:08:37.890452 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1599 11:08:37.893928 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1600 11:08:37.897132 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1601 11:08:37.900477 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1602 11:08:37.904281 -1, [0] xxxoxxxx xxxxxxxx [MSB]
1603 11:08:37.904359 0, [0] xxxoxxxx oxxoxoxx [MSB]
1604 11:08:37.907245 1, [0] xxxoxoxx ooxoooox [MSB]
1605 11:08:37.910588 2, [0] xxxoxooo ooxoooox [MSB]
1606 11:08:37.914002 3, [0] xxxoxooo ooxooooo [MSB]
1607 11:08:37.917600 4, [0] xxxoxooo ooxooooo [MSB]
1608 11:08:37.920616 5, [0] xxxoxooo oooooooo [MSB]
1609 11:08:37.920693 6, [0] xxxooooo oooooooo [MSB]
1610 11:08:37.923978 7, [0] xooooooo oooooooo [MSB]
1611 11:08:37.927319 8, [0] xooooooo oooooooo [MSB]
1612 11:08:37.930938 9, [0] xooooooo oooooooo [MSB]
1613 11:08:37.934461 34, [0] oooooooo oooooooo [MSB]
1614 11:08:37.937630 35, [0] oooxoooo oooxoooo [MSB]
1615 11:08:37.937707 36, [0] oooxoooo oooxoxxo [MSB]
1616 11:08:37.940624 37, [0] oooxoxxx xooxoxxo [MSB]
1617 11:08:37.943909 38, [0] oooxoxxx xxoxxxxo [MSB]
1618 11:08:37.947293 39, [0] oooxoxxx xxoxxxxx [MSB]
1619 11:08:37.951319 40, [0] oooxoxxx xxoxxxxx [MSB]
1620 11:08:37.954194 41, [0] oooxoxxx xxoxxxxx [MSB]
1621 11:08:37.954270 42, [0] oooxxxxx xxoxxxxx [MSB]
1622 11:08:37.957948 43, [0] xoxxxxxx xxxxxxxx [MSB]
1623 11:08:37.961289 44, [0] xxxxxxxx xxxxxxxx [MSB]
1624 11:08:37.964522 iDelay=44, Bit 0, Center 26 (10 ~ 42) 33
1625 11:08:37.967937 iDelay=44, Bit 1, Center 25 (7 ~ 43) 37
1626 11:08:37.970974 iDelay=44, Bit 2, Center 24 (7 ~ 42) 36
1627 11:08:37.974251 iDelay=44, Bit 3, Center 16 (-1 ~ 34) 36
1628 11:08:37.980985 iDelay=44, Bit 4, Center 23 (6 ~ 41) 36
1629 11:08:37.984148 iDelay=44, Bit 5, Center 18 (1 ~ 36) 36
1630 11:08:37.987775 iDelay=44, Bit 6, Center 19 (2 ~ 36) 35
1631 11:08:37.991243 iDelay=44, Bit 7, Center 19 (2 ~ 36) 35
1632 11:08:37.994597 iDelay=44, Bit 8, Center 18 (0 ~ 36) 37
1633 11:08:37.997919 iDelay=44, Bit 9, Center 19 (1 ~ 37) 37
1634 11:08:38.001416 iDelay=44, Bit 10, Center 23 (5 ~ 42) 38
1635 11:08:38.004438 iDelay=44, Bit 11, Center 17 (0 ~ 34) 35
1636 11:08:38.007996 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
1637 11:08:38.011403 iDelay=44, Bit 13, Center 17 (0 ~ 35) 36
1638 11:08:38.014459 iDelay=44, Bit 14, Center 18 (1 ~ 35) 35
1639 11:08:38.017825 iDelay=44, Bit 15, Center 20 (3 ~ 38) 36
1640 11:08:38.017900 ==
1641 11:08:38.024432 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1642 11:08:38.027765 fsp= 1, odt_onoff= 1, Byte mode= 0
1643 11:08:38.027859 ==
1644 11:08:38.027936 DQS Delay:
1645 11:08:38.031482 DQS0 = 0, DQS1 = 0
1646 11:08:38.031557 DQM Delay:
1647 11:08:38.034812 DQM0 = 21, DQM1 = 18
1648 11:08:38.034887 DQ Delay:
1649 11:08:38.037896 DQ0 =26, DQ1 =25, DQ2 =24, DQ3 =16
1650 11:08:38.041647 DQ4 =23, DQ5 =18, DQ6 =19, DQ7 =19
1651 11:08:38.044914 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17
1652 11:08:38.048179 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20
1653 11:08:38.048255
1654 11:08:38.048313
1655 11:08:38.048366 DramC Write-DBI off
1656 11:08:38.048418 ==
1657 11:08:38.054490 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1658 11:08:38.057745 fsp= 1, odt_onoff= 1, Byte mode= 0
1659 11:08:38.057821 ==
1660 11:08:38.061323 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1661 11:08:38.061415
1662 11:08:38.065128 Begin, DQ Scan Range 925~1181
1663 11:08:38.065259
1664 11:08:38.065333
1665 11:08:38.068536 TX Vref Scan disable
1666 11:08:38.071222 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1667 11:08:38.074614 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1668 11:08:38.077886 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1669 11:08:38.081827 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1670 11:08:38.084817 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1671 11:08:38.088140 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1672 11:08:38.091868 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1673 11:08:38.094903 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1674 11:08:38.098378 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1675 11:08:38.102040 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1676 11:08:38.105296 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1677 11:08:38.108721 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1678 11:08:38.111730 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1679 11:08:38.115069 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1680 11:08:38.122103 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1681 11:08:38.125484 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1682 11:08:38.128606 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1683 11:08:38.132159 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1684 11:08:38.135888 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1685 11:08:38.139420 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1686 11:08:38.141901 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1687 11:08:38.145173 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1688 11:08:38.148794 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1689 11:08:38.152309 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1690 11:08:38.155475 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1691 11:08:38.158867 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1692 11:08:38.162117 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1693 11:08:38.165347 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1694 11:08:38.168923 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1695 11:08:38.171981 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1696 11:08:38.175512 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1697 11:08:38.179646 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1698 11:08:38.185854 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1699 11:08:38.189161 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1700 11:08:38.192588 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1701 11:08:38.195754 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1702 11:08:38.198883 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1703 11:08:38.202104 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1704 11:08:38.205580 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1705 11:08:38.208743 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1706 11:08:38.212114 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1707 11:08:38.215501 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1708 11:08:38.218976 967 |3 6 7|[0] xxxxxxxx xxxoxxxx [MSB]
1709 11:08:38.222559 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1710 11:08:38.226191 969 |3 6 9|[0] xxxxxxxx ooxooooo [MSB]
1711 11:08:38.229415 970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]
1712 11:08:38.232561 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1713 11:08:38.236238 972 |3 6 12|[0] xxxoxoxx oooooooo [MSB]
1714 11:08:38.239573 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1715 11:08:38.242338 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1716 11:08:38.247008 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1717 11:08:38.249809 976 |3 6 16|[0] xxxoxooo oooooooo [MSB]
1718 11:08:38.252427 977 |3 6 17|[0] xooooooo oooooooo [MSB]
1719 11:08:38.260486 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1720 11:08:38.263692 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1721 11:08:38.267219 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1722 11:08:38.270942 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1723 11:08:38.274186 994 |3 6 34|[0] oooooxoo xxxxxxxx [MSB]
1724 11:08:38.277173 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1725 11:08:38.281066 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1726 11:08:38.284409 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1727 11:08:38.287618 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1728 11:08:38.290819 Byte0, DQ PI dly=984, DQM PI dly= 984
1729 11:08:38.293884 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1730 11:08:38.293988
1731 11:08:38.300799 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1732 11:08:38.300892
1733 11:08:38.303855 Byte1, DQ PI dly=979, DQM PI dly= 979
1734 11:08:38.307380 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1735 11:08:38.307456
1736 11:08:38.310902 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1737 11:08:38.310978
1738 11:08:38.314387 ==
1739 11:08:38.317615 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1740 11:08:38.321030 fsp= 1, odt_onoff= 1, Byte mode= 0
1741 11:08:38.321131 ==
1742 11:08:38.324546 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1743 11:08:38.324636
1744 11:08:38.327252 Begin, DQ Scan Range 955~1019
1745 11:08:38.330777 Write Rank1 MR14 =0x0
1746 11:08:38.338194
1747 11:08:38.338273 CH=0, VrefRange= 0, VrefLevel = 0
1748 11:08:38.345428 TX Bit0 (979~998) 20 988, Bit8 (969~985) 17 977,
1749 11:08:38.348395 TX Bit1 (978~996) 19 987, Bit9 (969~985) 17 977,
1750 11:08:38.355053 TX Bit2 (979~996) 18 987, Bit10 (975~990) 16 982,
1751 11:08:38.359000 TX Bit3 (973~991) 19 982, Bit11 (968~985) 18 976,
1752 11:08:38.362046 TX Bit4 (979~996) 18 987, Bit12 (969~985) 17 977,
1753 11:08:38.368542 TX Bit5 (976~990) 15 983, Bit13 (969~984) 16 976,
1754 11:08:38.372006 TX Bit6 (976~992) 17 984, Bit14 (969~985) 17 977,
1755 11:08:38.375159 TX Bit7 (977~993) 17 985, Bit15 (974~988) 15 981,
1756 11:08:38.375236
1757 11:08:38.378632 Write Rank1 MR14 =0x2
1758 11:08:38.387329
1759 11:08:38.387406 CH=0, VrefRange= 0, VrefLevel = 2
1760 11:08:38.393802 TX Bit0 (979~998) 20 988, Bit8 (969~985) 17 977,
1761 11:08:38.397357 TX Bit1 (978~997) 20 987, Bit9 (969~986) 18 977,
1762 11:08:38.404092 TX Bit2 (978~996) 19 987, Bit10 (975~990) 16 982,
1763 11:08:38.407653 TX Bit3 (973~991) 19 982, Bit11 (968~985) 18 976,
1764 11:08:38.410506 TX Bit4 (978~997) 20 987, Bit12 (969~986) 18 977,
1765 11:08:38.417671 TX Bit5 (975~991) 17 983, Bit13 (968~984) 17 976,
1766 11:08:38.420812 TX Bit6 (976~992) 17 984, Bit14 (969~985) 17 977,
1767 11:08:38.424071 TX Bit7 (977~993) 17 985, Bit15 (973~989) 17 981,
1768 11:08:38.424180
1769 11:08:38.427189 Write Rank1 MR14 =0x4
1770 11:08:38.436518
1771 11:08:38.436611 CH=0, VrefRange= 0, VrefLevel = 4
1772 11:08:38.442634 TX Bit0 (979~999) 21 989, Bit8 (969~986) 18 977,
1773 11:08:38.446144 TX Bit1 (978~998) 21 988, Bit9 (969~986) 18 977,
1774 11:08:38.449983 TX Bit2 (978~997) 20 987, Bit10 (974~990) 17 982,
1775 11:08:38.456157 TX Bit3 (972~991) 20 981, Bit11 (968~986) 19 977,
1776 11:08:38.460154 TX Bit4 (978~998) 21 988, Bit12 (969~987) 19 978,
1777 11:08:38.466709 TX Bit5 (975~991) 17 983, Bit13 (968~985) 18 976,
1778 11:08:38.470085 TX Bit6 (975~993) 19 984, Bit14 (969~986) 18 977,
1779 11:08:38.473426 TX Bit7 (978~994) 17 986, Bit15 (972~989) 18 980,
1780 11:08:38.473502
1781 11:08:38.477063 Write Rank1 MR14 =0x6
1782 11:08:38.485076
1783 11:08:38.485193 CH=0, VrefRange= 0, VrefLevel = 6
1784 11:08:38.491899 TX Bit0 (979~999) 21 989, Bit8 (968~987) 20 977,
1785 11:08:38.495321 TX Bit1 (978~998) 21 988, Bit9 (969~987) 19 978,
1786 11:08:38.501775 TX Bit2 (978~998) 21 988, Bit10 (974~991) 18 982,
1787 11:08:38.505286 TX Bit3 (972~992) 21 982, Bit11 (968~986) 19 977,
1788 11:08:38.508585 TX Bit4 (978~998) 21 988, Bit12 (969~987) 19 978,
1789 11:08:38.515373 TX Bit5 (975~991) 17 983, Bit13 (968~985) 18 976,
1790 11:08:38.518856 TX Bit6 (975~993) 19 984, Bit14 (969~987) 19 978,
1791 11:08:38.521805 TX Bit7 (978~994) 17 986, Bit15 (973~989) 17 981,
1792 11:08:38.521881
1793 11:08:38.525357 Write Rank1 MR14 =0x8
1794 11:08:38.534244
1795 11:08:38.534321 CH=0, VrefRange= 0, VrefLevel = 8
1796 11:08:38.540813 TX Bit0 (978~999) 22 988, Bit8 (968~987) 20 977,
1797 11:08:38.544050 TX Bit1 (978~998) 21 988, Bit9 (969~988) 20 978,
1798 11:08:38.551047 TX Bit2 (978~998) 21 988, Bit10 (974~991) 18 982,
1799 11:08:38.553847 TX Bit3 (971~992) 22 981, Bit11 (968~987) 20 977,
1800 11:08:38.557231 TX Bit4 (977~998) 22 987, Bit12 (968~988) 21 978,
1801 11:08:38.563924 TX Bit5 (974~991) 18 982, Bit13 (968~986) 19 977,
1802 11:08:38.567325 TX Bit6 (975~993) 19 984, Bit14 (969~987) 19 978,
1803 11:08:38.570607 TX Bit7 (977~995) 19 986, Bit15 (972~990) 19 981,
1804 11:08:38.570708
1805 11:08:38.574593 Write Rank1 MR14 =0xa
1806 11:08:38.582724
1807 11:08:38.586734 CH=0, VrefRange= 0, VrefLevel = 10
1808 11:08:38.589505 TX Bit0 (978~999) 22 988, Bit8 (968~988) 21 978,
1809 11:08:38.592966 TX Bit1 (978~999) 22 988, Bit9 (969~989) 21 979,
1810 11:08:38.599762 TX Bit2 (978~998) 21 988, Bit10 (973~991) 19 982,
1811 11:08:38.603065 TX Bit3 (971~993) 23 982, Bit11 (968~987) 20 977,
1812 11:08:38.606311 TX Bit4 (977~999) 23 988, Bit12 (968~989) 22 978,
1813 11:08:38.613107 TX Bit5 (974~992) 19 983, Bit13 (968~987) 20 977,
1814 11:08:38.616518 TX Bit6 (974~994) 21 984, Bit14 (968~988) 21 978,
1815 11:08:38.620247 TX Bit7 (977~996) 20 986, Bit15 (971~990) 20 980,
1816 11:08:38.620322
1817 11:08:38.623521 Write Rank1 MR14 =0xc
1818 11:08:38.632116
1819 11:08:38.635451 CH=0, VrefRange= 0, VrefLevel = 12
1820 11:08:38.638873 TX Bit0 (978~1000) 23 989, Bit8 (968~988) 21 978,
1821 11:08:38.642009 TX Bit1 (978~999) 22 988, Bit9 (969~989) 21 979,
1822 11:08:38.649203 TX Bit2 (977~999) 23 988, Bit10 (973~992) 20 982,
1823 11:08:38.651990 TX Bit3 (971~993) 23 982, Bit11 (967~988) 22 977,
1824 11:08:38.655254 TX Bit4 (978~999) 22 988, Bit12 (968~989) 22 978,
1825 11:08:38.662130 TX Bit5 (973~992) 20 982, Bit13 (968~987) 20 977,
1826 11:08:38.665625 TX Bit6 (974~994) 21 984, Bit14 (968~989) 22 978,
1827 11:08:38.669092 TX Bit7 (976~997) 22 986, Bit15 (970~990) 21 980,
1828 11:08:38.669198
1829 11:08:38.672131 Write Rank1 MR14 =0xe
1830 11:08:38.681341
1831 11:08:38.684880 CH=0, VrefRange= 0, VrefLevel = 14
1832 11:08:38.688099 TX Bit0 (978~1000) 23 989, Bit8 (968~989) 22 978,
1833 11:08:38.691574 TX Bit1 (978~999) 22 988, Bit9 (968~989) 22 978,
1834 11:08:38.698490 TX Bit2 (977~999) 23 988, Bit10 (972~992) 21 982,
1835 11:08:38.701484 TX Bit3 (970~994) 25 982, Bit11 (967~989) 23 978,
1836 11:08:38.704677 TX Bit4 (977~999) 23 988, Bit12 (968~989) 22 978,
1837 11:08:38.711855 TX Bit5 (973~993) 21 983, Bit13 (968~988) 21 978,
1838 11:08:38.715124 TX Bit6 (974~994) 21 984, Bit14 (968~989) 22 978,
1839 11:08:38.718341 TX Bit7 (976~997) 22 986, Bit15 (970~990) 21 980,
1840 11:08:38.718419
1841 11:08:38.722086 Write Rank1 MR14 =0x10
1842 11:08:38.730770
1843 11:08:38.734122 CH=0, VrefRange= 0, VrefLevel = 16
1844 11:08:38.737555 TX Bit0 (978~1000) 23 989, Bit8 (968~989) 22 978,
1845 11:08:38.741269 TX Bit1 (977~999) 23 988, Bit9 (968~990) 23 979,
1846 11:08:38.747523 TX Bit2 (977~999) 23 988, Bit10 (971~992) 22 981,
1847 11:08:38.750822 TX Bit3 (970~994) 25 982, Bit11 (967~989) 23 978,
1848 11:08:38.754233 TX Bit4 (977~999) 23 988, Bit12 (968~989) 22 978,
1849 11:08:38.761127 TX Bit5 (972~993) 22 982, Bit13 (967~989) 23 978,
1850 11:08:38.764703 TX Bit6 (973~995) 23 984, Bit14 (968~989) 22 978,
1851 11:08:38.767808 TX Bit7 (976~998) 23 987, Bit15 (970~991) 22 980,
1852 11:08:38.767885
1853 11:08:38.771120 Write Rank1 MR14 =0x12
1854 11:08:38.780822
1855 11:08:38.780898 CH=0, VrefRange= 0, VrefLevel = 18
1856 11:08:38.787053 TX Bit0 (978~1000) 23 989, Bit8 (968~989) 22 978,
1857 11:08:38.790945 TX Bit1 (977~999) 23 988, Bit9 (968~990) 23 979,
1858 11:08:38.797473 TX Bit2 (977~999) 23 988, Bit10 (971~992) 22 981,
1859 11:08:38.800704 TX Bit3 (970~994) 25 982, Bit11 (967~989) 23 978,
1860 11:08:38.803882 TX Bit4 (977~999) 23 988, Bit12 (968~989) 22 978,
1861 11:08:38.810562 TX Bit5 (972~993) 22 982, Bit13 (967~989) 23 978,
1862 11:08:38.814056 TX Bit6 (973~995) 23 984, Bit14 (968~989) 22 978,
1863 11:08:38.817311 TX Bit7 (976~998) 23 987, Bit15 (970~991) 22 980,
1864 11:08:38.817379
1865 11:08:38.823936 wait MRW command Rank1 MR14 =0x14 fired (1)
1866 11:08:38.824010 Write Rank1 MR14 =0x14
1867 11:08:38.833723
1868 11:08:38.833802 CH=0, VrefRange= 0, VrefLevel = 20
1869 11:08:38.840817 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978,
1870 11:08:38.844478 TX Bit1 (976~1000) 25 988, Bit9 (968~990) 23 979,
1871 11:08:38.850324 TX Bit2 (977~1000) 24 988, Bit10 (971~993) 23 982,
1872 11:08:38.854262 TX Bit3 (970~995) 26 982, Bit11 (966~989) 24 977,
1873 11:08:38.857184 TX Bit4 (977~1000) 24 988, Bit12 (968~990) 23 979,
1874 11:08:38.863835 TX Bit5 (971~994) 24 982, Bit13 (967~989) 23 978,
1875 11:08:38.867122 TX Bit6 (972~997) 26 984, Bit14 (968~990) 23 979,
1876 11:08:38.873661 TX Bit7 (975~999) 25 987, Bit15 (970~991) 22 980,
1877 11:08:38.873733
1878 11:08:38.873791 Write Rank1 MR14 =0x16
1879 11:08:38.883530
1880 11:08:38.883623 CH=0, VrefRange= 0, VrefLevel = 22
1881 11:08:38.890450 TX Bit0 (977~1002) 26 989, Bit8 (967~989) 23 978,
1882 11:08:38.893771 TX Bit1 (976~1000) 25 988, Bit9 (968~990) 23 979,
1883 11:08:38.900428 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1884 11:08:38.903851 TX Bit3 (969~995) 27 982, Bit11 (967~990) 24 978,
1885 11:08:38.907142 TX Bit4 (976~1000) 25 988, Bit12 (968~990) 23 979,
1886 11:08:38.913889 TX Bit5 (971~995) 25 983, Bit13 (967~989) 23 978,
1887 11:08:38.917028 TX Bit6 (971~997) 27 984, Bit14 (968~990) 23 979,
1888 11:08:38.920426 TX Bit7 (975~999) 25 987, Bit15 (969~991) 23 980,
1889 11:08:38.920504
1890 11:08:38.924282 Write Rank1 MR14 =0x18
1891 11:08:38.933677
1892 11:08:38.937085 CH=0, VrefRange= 0, VrefLevel = 24
1893 11:08:38.940198 TX Bit0 (977~1002) 26 989, Bit8 (967~989) 23 978,
1894 11:08:38.943834 TX Bit1 (976~1000) 25 988, Bit9 (968~990) 23 979,
1895 11:08:38.950580 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1896 11:08:38.953872 TX Bit3 (969~995) 27 982, Bit11 (967~990) 24 978,
1897 11:08:38.957283 TX Bit4 (976~1000) 25 988, Bit12 (968~990) 23 979,
1898 11:08:38.963772 TX Bit5 (971~995) 25 983, Bit13 (967~989) 23 978,
1899 11:08:38.966849 TX Bit6 (971~997) 27 984, Bit14 (968~990) 23 979,
1900 11:08:38.970191 TX Bit7 (975~999) 25 987, Bit15 (969~991) 23 980,
1901 11:08:38.973694
1902 11:08:38.973789 Write Rank1 MR14 =0x1a
1903 11:08:38.983526
1904 11:08:38.987433 CH=0, VrefRange= 0, VrefLevel = 26
1905 11:08:38.990448 TX Bit0 (977~1002) 26 989, Bit8 (967~989) 23 978,
1906 11:08:38.993960 TX Bit1 (976~1000) 25 988, Bit9 (968~990) 23 979,
1907 11:08:39.000371 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1908 11:08:39.003820 TX Bit3 (969~995) 27 982, Bit11 (967~990) 24 978,
1909 11:08:39.007297 TX Bit4 (976~1000) 25 988, Bit12 (968~990) 23 979,
1910 11:08:39.014257 TX Bit5 (971~995) 25 983, Bit13 (967~989) 23 978,
1911 11:08:39.017424 TX Bit6 (971~997) 27 984, Bit14 (968~990) 23 979,
1912 11:08:39.020860 TX Bit7 (975~999) 25 987, Bit15 (969~991) 23 980,
1913 11:08:39.023612
1914 11:08:39.023686 Write Rank1 MR14 =0x1c
1915 11:08:39.033391
1916 11:08:39.036556 CH=0, VrefRange= 0, VrefLevel = 28
1917 11:08:39.039883 TX Bit0 (977~1002) 26 989, Bit8 (967~989) 23 978,
1918 11:08:39.043394 TX Bit1 (976~1000) 25 988, Bit9 (968~990) 23 979,
1919 11:08:39.050011 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1920 11:08:39.053094 TX Bit3 (969~995) 27 982, Bit11 (967~990) 24 978,
1921 11:08:39.056641 TX Bit4 (976~1000) 25 988, Bit12 (968~990) 23 979,
1922 11:08:39.063741 TX Bit5 (971~995) 25 983, Bit13 (967~989) 23 978,
1923 11:08:39.066983 TX Bit6 (971~997) 27 984, Bit14 (968~990) 23 979,
1924 11:08:39.070623 TX Bit7 (975~999) 25 987, Bit15 (969~991) 23 980,
1925 11:08:39.070690
1926 11:08:39.073312 Write Rank1 MR14 =0x1e
1927 11:08:39.083200
1928 11:08:39.086277 CH=0, VrefRange= 0, VrefLevel = 30
1929 11:08:39.090133 TX Bit0 (977~1002) 26 989, Bit8 (967~989) 23 978,
1930 11:08:39.093524 TX Bit1 (976~1000) 25 988, Bit9 (968~990) 23 979,
1931 11:08:39.099967 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1932 11:08:39.103689 TX Bit3 (969~995) 27 982, Bit11 (967~990) 24 978,
1933 11:08:39.107095 TX Bit4 (976~1000) 25 988, Bit12 (968~990) 23 979,
1934 11:08:39.114087 TX Bit5 (971~995) 25 983, Bit13 (967~989) 23 978,
1935 11:08:39.116994 TX Bit6 (971~997) 27 984, Bit14 (968~990) 23 979,
1936 11:08:39.120387 TX Bit7 (975~999) 25 987, Bit15 (969~991) 23 980,
1937 11:08:39.120462
1938 11:08:39.123680 Write Rank1 MR14 =0x20
1939 11:08:39.133028
1940 11:08:39.136370 CH=0, VrefRange= 0, VrefLevel = 32
1941 11:08:39.139742 TX Bit0 (977~1002) 26 989, Bit8 (967~989) 23 978,
1942 11:08:39.143053 TX Bit1 (976~1000) 25 988, Bit9 (968~990) 23 979,
1943 11:08:39.149727 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1944 11:08:39.152915 TX Bit3 (969~995) 27 982, Bit11 (967~990) 24 978,
1945 11:08:39.156289 TX Bit4 (976~1000) 25 988, Bit12 (968~990) 23 979,
1946 11:08:39.163258 TX Bit5 (971~995) 25 983, Bit13 (967~989) 23 978,
1947 11:08:39.166316 TX Bit6 (971~997) 27 984, Bit14 (968~990) 23 979,
1948 11:08:39.172923 TX Bit7 (975~999) 25 987, Bit15 (969~991) 23 980,
1949 11:08:39.172999
1950 11:08:39.173057
1951 11:08:39.176346 TX Vref found, early break! 356< 370
1952 11:08:39.179927 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1953 11:08:39.182910 u1DelayCellOfst[0]=8 cells (7 PI)
1954 11:08:39.186200 u1DelayCellOfst[1]=7 cells (6 PI)
1955 11:08:39.189838 u1DelayCellOfst[2]=7 cells (6 PI)
1956 11:08:39.192989 u1DelayCellOfst[3]=0 cells (0 PI)
1957 11:08:39.196298 u1DelayCellOfst[4]=7 cells (6 PI)
1958 11:08:39.196389 u1DelayCellOfst[5]=1 cells (1 PI)
1959 11:08:39.199558 u1DelayCellOfst[6]=2 cells (2 PI)
1960 11:08:39.203034 u1DelayCellOfst[7]=6 cells (5 PI)
1961 11:08:39.206362 Byte0, DQ PI dly=982, DQM PI dly= 985
1962 11:08:39.213018 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1963 11:08:39.213115
1964 11:08:39.216266 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1965 11:08:39.216344
1966 11:08:39.219787 u1DelayCellOfst[8]=0 cells (0 PI)
1967 11:08:39.223233 u1DelayCellOfst[9]=1 cells (1 PI)
1968 11:08:39.226333 u1DelayCellOfst[10]=3 cells (3 PI)
1969 11:08:39.229519 u1DelayCellOfst[11]=0 cells (0 PI)
1970 11:08:39.232739 u1DelayCellOfst[12]=1 cells (1 PI)
1971 11:08:39.232836 u1DelayCellOfst[13]=0 cells (0 PI)
1972 11:08:39.236408 u1DelayCellOfst[14]=1 cells (1 PI)
1973 11:08:39.239646 u1DelayCellOfst[15]=2 cells (2 PI)
1974 11:08:39.242979 Byte1, DQ PI dly=978, DQM PI dly= 979
1975 11:08:39.249760 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1976 11:08:39.249836
1977 11:08:39.253089 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1978 11:08:39.253203
1979 11:08:39.256442 Write Rank1 MR14 =0x16
1980 11:08:39.256516
1981 11:08:39.256573 Final TX Range 0 Vref 22
1982 11:08:39.256627
1983 11:08:39.263030 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1984 11:08:39.263107
1985 11:08:39.269866 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1986 11:08:39.276238 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1987 11:08:39.286313 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1988 11:08:39.286393 Write Rank1 MR3 =0xb0
1989 11:08:39.289981 DramC Write-DBI on
1990 11:08:39.290069 ==
1991 11:08:39.293266 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1992 11:08:39.296607 fsp= 1, odt_onoff= 1, Byte mode= 0
1993 11:08:39.296681 ==
1994 11:08:39.299646 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1995 11:08:39.303315
1996 11:08:39.303411 Begin, DQ Scan Range 699~763
1997 11:08:39.303502
1998 11:08:39.303589
1999 11:08:39.306847 TX Vref Scan disable
2000 11:08:39.309977 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2001 11:08:39.313326 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2002 11:08:39.316417 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2003 11:08:39.319840 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2004 11:08:39.323752 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2005 11:08:39.326587 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2006 11:08:39.330167 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2007 11:08:39.333624 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2008 11:08:39.336952 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2009 11:08:39.340099 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2010 11:08:39.343520 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2011 11:08:39.346956 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2012 11:08:39.350142 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2013 11:08:39.356742 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2014 11:08:39.360383 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2015 11:08:39.363877 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2016 11:08:39.367267 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2017 11:08:39.370425 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2018 11:08:39.377585 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2019 11:08:39.380435 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2020 11:08:39.383639 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2021 11:08:39.387620 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2022 11:08:39.390505 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2023 11:08:39.393656 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2024 11:08:39.397621 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2025 11:08:39.400888 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2026 11:08:39.403987 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2027 11:08:39.407285 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2028 11:08:39.410670 Byte0, DQ PI dly=730, DQM PI dly= 730
2029 11:08:39.413950 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2030 11:08:39.414054
2031 11:08:39.420860 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2032 11:08:39.420936
2033 11:08:39.423967 Byte1, DQ PI dly=721, DQM PI dly= 721
2034 11:08:39.427128 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
2035 11:08:39.427204
2036 11:08:39.430870 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
2037 11:08:39.430943
2038 11:08:39.437104 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2039 11:08:39.444556 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2040 11:08:39.454482 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2041 11:08:39.454567 Write Rank1 MR3 =0x30
2042 11:08:39.457589 DramC Write-DBI off
2043 11:08:39.457664
2044 11:08:39.457724 [DATLAT]
2045 11:08:39.461026 Freq=1600, CH0 RK1, use_rxtx_scan=0
2046 11:08:39.461147
2047 11:08:39.464204 DATLAT Default: 0x10
2048 11:08:39.464280 7, 0xFFFF, sum=0
2049 11:08:39.467578 8, 0xFFFF, sum=0
2050 11:08:39.467655 9, 0xFFFF, sum=0
2051 11:08:39.467715 10, 0xFFFF, sum=0
2052 11:08:39.470471 11, 0xFFFF, sum=0
2053 11:08:39.470547 12, 0xFFFF, sum=0
2054 11:08:39.473803 13, 0xFFFF, sum=0
2055 11:08:39.473879 14, 0x0, sum=1
2056 11:08:39.477611 15, 0x0, sum=2
2057 11:08:39.477689 16, 0x0, sum=3
2058 11:08:39.480846 17, 0x0, sum=4
2059 11:08:39.484195 pattern=2 first_step=14 total pass=5 best_step=16
2060 11:08:39.484270 ==
2061 11:08:39.487394 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2062 11:08:39.490913 fsp= 1, odt_onoff= 1, Byte mode= 0
2063 11:08:39.491001 ==
2064 11:08:39.497913 Start DQ dly to find pass range UseTestEngine =1
2065 11:08:39.501428 x-axis: bit #, y-axis: DQ dly (-127~63)
2066 11:08:39.501548 RX Vref Scan = 0
2067 11:08:39.504702 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2068 11:08:39.507310 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2069 11:08:39.511260 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2070 11:08:39.514098 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2071 11:08:39.517614 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2072 11:08:39.521000 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2073 11:08:39.521075 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2074 11:08:39.524286 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2075 11:08:39.527738 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2076 11:08:39.531319 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2077 11:08:39.534360 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2078 11:08:39.537568 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2079 11:08:39.541287 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2080 11:08:39.544450 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2081 11:08:39.544529 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2082 11:08:39.547797 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2083 11:08:39.550950 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2084 11:08:39.554664 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2085 11:08:39.557688 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2086 11:08:39.560939 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2087 11:08:39.564347 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2088 11:08:39.564422 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2089 11:08:39.568049 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2090 11:08:39.571909 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2091 11:08:39.574316 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2092 11:08:39.577766 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2093 11:08:39.581251 0, [0] xxxoxxxx oxxoxoxx [MSB]
2094 11:08:39.581321 1, [0] xxxoxoxx ooxoooox [MSB]
2095 11:08:39.585043 2, [0] xxxoxooo ooxoooox [MSB]
2096 11:08:39.588221 3, [0] xxxoxooo ooxooooo [MSB]
2097 11:08:39.591526 4, [0] xxxoxooo ooxooooo [MSB]
2098 11:08:39.594392 5, [0] xxxooooo ooxooooo [MSB]
2099 11:08:39.597787 6, [0] xxxooooo oooooooo [MSB]
2100 11:08:39.597863 7, [0] xooooooo oooooooo [MSB]
2101 11:08:39.601029 8, [0] xooooooo oooooooo [MSB]
2102 11:08:39.605898 34, [0] oooxoooo oooxoooo [MSB]
2103 11:08:39.609326 35, [0] oooxoxoo oooxoxoo [MSB]
2104 11:08:39.612791 36, [0] oooxoxxo oooxoxoo [MSB]
2105 11:08:39.615909 37, [0] oooxoxxx xooxxxxo [MSB]
2106 11:08:39.619069 38, [0] oooxoxxx xooxxxxo [MSB]
2107 11:08:39.622486 39, [0] oooxoxxx xxoxxxxx [MSB]
2108 11:08:39.622562 40, [0] oooxoxxx xxoxxxxx [MSB]
2109 11:08:39.625918 41, [0] oooxxxxx xxoxxxxx [MSB]
2110 11:08:39.629101 42, [0] oooxxxxx xxxxxxxx [MSB]
2111 11:08:39.632544 43, [0] oxxxxxxx xxxxxxxx [MSB]
2112 11:08:39.635947 44, [0] xxxxxxxx xxxxxxxx [MSB]
2113 11:08:39.639770 iDelay=44, Bit 0, Center 26 (9 ~ 43) 35
2114 11:08:39.642475 iDelay=44, Bit 1, Center 24 (7 ~ 42) 36
2115 11:08:39.646248 iDelay=44, Bit 2, Center 24 (7 ~ 42) 36
2116 11:08:39.649436 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2117 11:08:39.652736 iDelay=44, Bit 4, Center 22 (5 ~ 40) 36
2118 11:08:39.655750 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2119 11:08:39.659286 iDelay=44, Bit 6, Center 18 (2 ~ 35) 34
2120 11:08:39.662718 iDelay=44, Bit 7, Center 19 (2 ~ 36) 35
2121 11:08:39.666070 iDelay=44, Bit 8, Center 18 (0 ~ 36) 37
2122 11:08:39.669504 iDelay=44, Bit 9, Center 19 (1 ~ 38) 38
2123 11:08:39.676268 iDelay=44, Bit 10, Center 23 (6 ~ 41) 36
2124 11:08:39.679463 iDelay=44, Bit 11, Center 16 (0 ~ 33) 34
2125 11:08:39.682817 iDelay=44, Bit 12, Center 18 (1 ~ 36) 36
2126 11:08:39.686258 iDelay=44, Bit 13, Center 17 (0 ~ 34) 35
2127 11:08:39.689720 iDelay=44, Bit 14, Center 18 (1 ~ 36) 36
2128 11:08:39.692810 iDelay=44, Bit 15, Center 20 (3 ~ 38) 36
2129 11:08:39.692881 ==
2130 11:08:39.696281 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2131 11:08:39.699950 fsp= 1, odt_onoff= 1, Byte mode= 0
2132 11:08:39.702770 ==
2133 11:08:39.702847 DQS Delay:
2134 11:08:39.702906 DQS0 = 0, DQS1 = 0
2135 11:08:39.706075 DQM Delay:
2136 11:08:39.706151 DQM0 = 20, DQM1 = 18
2137 11:08:39.709441 DQ Delay:
2138 11:08:39.709517 DQ0 =26, DQ1 =24, DQ2 =24, DQ3 =15
2139 11:08:39.712821 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =19
2140 11:08:39.716695 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =16
2141 11:08:39.720060 DQ12 =18, DQ13 =17, DQ14 =18, DQ15 =20
2142 11:08:39.720136
2143 11:08:39.720195
2144 11:08:39.720248
2145 11:08:39.723196 [DramC_TX_OE_Calibration] TA2
2146 11:08:39.726668 Original DQ_B0 (3 6) =30, OEN = 27
2147 11:08:39.729849 Original DQ_B1 (3 6) =30, OEN = 27
2148 11:08:39.733037 23, 0x0, End_B0=23 End_B1=23
2149 11:08:39.736805 24, 0x0, End_B0=24 End_B1=24
2150 11:08:39.736883 25, 0x0, End_B0=25 End_B1=25
2151 11:08:39.740030 26, 0x0, End_B0=26 End_B1=26
2152 11:08:39.743053 27, 0x0, End_B0=27 End_B1=27
2153 11:08:39.746351 28, 0x0, End_B0=28 End_B1=28
2154 11:08:39.749558 29, 0x0, End_B0=29 End_B1=29
2155 11:08:39.749635 30, 0x0, End_B0=30 End_B1=30
2156 11:08:39.753120 31, 0xFFFF, End_B0=30 End_B1=30
2157 11:08:39.760063 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2158 11:08:39.763194 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2159 11:08:39.766839
2160 11:08:39.766913
2161 11:08:39.766971 Write Rank1 MR23 =0x3f
2162 11:08:39.767025 [DQSOSC]
2163 11:08:39.777069 [DQSOSCAuto] RK1, (LSB)MR18= 0x77, (MSB)MR19= 0x3, tDQSOscB0 = 355 ps tDQSOscB1 = 0 ps
2164 11:08:39.780319 CH0_RK1: MR19=0x3, MR18=0x77, DQSOSC=355, MR23=63, INC=19, DEC=29
2165 11:08:39.783762 Write Rank1 MR23 =0x3f
2166 11:08:39.783841 [DQSOSC]
2167 11:08:39.790329 [DQSOSCAuto] RK1, (LSB)MR18= 0x77, (MSB)MR19= 0x3, tDQSOscB0 = 355 ps tDQSOscB1 = 0 ps
2168 11:08:39.794167 CH0 RK1: MR19=3, MR18=77
2169 11:08:39.797013 [RxdqsGatingPostProcess] freq 1600
2170 11:08:39.803613 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2171 11:08:39.803692 Rank: 0
2172 11:08:39.806957 best DQS0 dly(2T, 0.5T) = (2, 5)
2173 11:08:39.810129 best DQS1 dly(2T, 0.5T) = (2, 5)
2174 11:08:39.813591 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2175 11:08:39.817617 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2176 11:08:39.817719 Rank: 1
2177 11:08:39.820313 best DQS0 dly(2T, 0.5T) = (2, 6)
2178 11:08:39.823576 best DQS1 dly(2T, 0.5T) = (2, 6)
2179 11:08:39.827007 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2180 11:08:39.830733 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2181 11:08:39.833887 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2182 11:08:39.837309 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2183 11:08:39.841244 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2184 11:08:39.844036 Write Rank0 MR13 =0x59
2185 11:08:39.844111 ==
2186 11:08:39.850864 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2187 11:08:39.850946 fsp= 1, odt_onoff= 1, Byte mode= 0
2188 11:08:39.854165 ==
2189 11:08:39.854240 === u2Vref_new: 0x56 --> 0x3a
2190 11:08:39.857965 === u2Vref_new: 0x58 --> 0x58
2191 11:08:39.861308 === u2Vref_new: 0x5a --> 0x5a
2192 11:08:39.864341 === u2Vref_new: 0x5c --> 0x78
2193 11:08:39.867576 === u2Vref_new: 0x5e --> 0x7a
2194 11:08:39.871312 === u2Vref_new: 0x60 --> 0x90
2195 11:08:39.874366 [CA 0] Center 36 (9~63) winsize 55
2196 11:08:39.877767 [CA 1] Center 34 (6~63) winsize 58
2197 11:08:39.880955 [CA 2] Center 33 (4~63) winsize 60
2198 11:08:39.884661 [CA 3] Center 32 (3~62) winsize 60
2199 11:08:39.888116 [CA 4] Center 33 (4~63) winsize 60
2200 11:08:39.890802 [CA 5] Center 25 (-2~53) winsize 56
2201 11:08:39.890877
2202 11:08:39.894325 [CATrainingPosCal] consider 1 rank data
2203 11:08:39.897805 u2DelayCellTimex100 = 762/100 ps
2204 11:08:39.901336 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
2205 11:08:39.904773 CA1 delay=34 (6~63),Diff = 9 PI (11 cell)
2206 11:08:39.908071 CA2 delay=33 (4~63),Diff = 8 PI (10 cell)
2207 11:08:39.910917 CA3 delay=32 (3~62),Diff = 7 PI (8 cell)
2208 11:08:39.914488 CA4 delay=33 (4~63),Diff = 8 PI (10 cell)
2209 11:08:39.917743 CA5 delay=25 (-2~53),Diff = 0 PI (0 cell)
2210 11:08:39.917818
2211 11:08:39.921350 CA PerBit enable=1, Macro0, CA PI delay=25
2212 11:08:39.924561 === u2Vref_new: 0x56 --> 0x3a
2213 11:08:39.924636
2214 11:08:39.928111 Vref(ca) range 1: 22
2215 11:08:39.928185
2216 11:08:39.928245 CS Dly= 10 (41-0-32)
2217 11:08:39.931215 Write Rank0 MR13 =0xd8
2218 11:08:39.934738 Write Rank0 MR13 =0xd8
2219 11:08:39.934813 Write Rank0 MR12 =0x56
2220 11:08:39.938412 Write Rank1 MR13 =0x59
2221 11:08:39.938488 ==
2222 11:08:39.945037 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2223 11:08:39.945117 fsp= 1, odt_onoff= 1, Byte mode= 0
2224 11:08:39.948086 ==
2225 11:08:39.948161 === u2Vref_new: 0x56 --> 0x3a
2226 11:08:39.951413 === u2Vref_new: 0x58 --> 0x58
2227 11:08:39.954616 === u2Vref_new: 0x5a --> 0x5a
2228 11:08:39.957684 === u2Vref_new: 0x5c --> 0x78
2229 11:08:39.961755 === u2Vref_new: 0x5e --> 0x7a
2230 11:08:39.965115 === u2Vref_new: 0x60 --> 0x90
2231 11:08:39.968350 [CA 0] Center 36 (10~63) winsize 54
2232 11:08:39.971562 [CA 1] Center 35 (8~63) winsize 56
2233 11:08:39.975183 [CA 2] Center 33 (3~63) winsize 61
2234 11:08:39.978095 [CA 3] Center 33 (3~63) winsize 61
2235 11:08:39.981221 [CA 4] Center 33 (4~63) winsize 60
2236 11:08:39.984812 [CA 5] Center 25 (-2~53) winsize 56
2237 11:08:39.984889
2238 11:08:39.988058 [CATrainingPosCal] consider 2 rank data
2239 11:08:39.991205 u2DelayCellTimex100 = 762/100 ps
2240 11:08:39.994591 CA0 delay=36 (10~63),Diff = 11 PI (14 cell)
2241 11:08:39.998126 CA1 delay=35 (8~63),Diff = 10 PI (12 cell)
2242 11:08:40.001666 CA2 delay=33 (4~63),Diff = 8 PI (10 cell)
2243 11:08:40.005019 CA3 delay=32 (3~62),Diff = 7 PI (8 cell)
2244 11:08:40.008461 CA4 delay=33 (4~63),Diff = 8 PI (10 cell)
2245 11:08:40.011421 CA5 delay=25 (-2~53),Diff = 0 PI (0 cell)
2246 11:08:40.011521
2247 11:08:40.018150 CA PerBit enable=1, Macro0, CA PI delay=25
2248 11:08:40.018226 === u2Vref_new: 0x58 --> 0x58
2249 11:08:40.018285
2250 11:08:40.021793 Vref(ca) range 1: 24
2251 11:08:40.021868
2252 11:08:40.024963 CS Dly= 12 (43-0-32)
2253 11:08:40.025078 Write Rank1 MR13 =0xd8
2254 11:08:40.028364 Write Rank1 MR13 =0xd8
2255 11:08:40.028439 Write Rank1 MR12 =0x58
2256 11:08:40.035089 [RankSwap] Rank num 2, (Multi 1), Rank 0
2257 11:08:40.035166 Write Rank0 MR2 =0xad
2258 11:08:40.038264 [Write Leveling]
2259 11:08:40.038354 delay byte0 byte1 byte2 byte3
2260 11:08:40.041827
2261 11:08:40.041899 10 0 0
2262 11:08:40.041959 11 0 0
2263 11:08:40.045290 12 0 0
2264 11:08:40.045360 13 0 0
2265 11:08:40.048389 14 0 0
2266 11:08:40.048490 15 0 0
2267 11:08:40.048575 16 0 0
2268 11:08:40.052052 17 0 0
2269 11:08:40.052153 18 0 0
2270 11:08:40.055142 19 0 0
2271 11:08:40.055235 20 0 0
2272 11:08:40.055365 21 0 0
2273 11:08:40.058351 22 0 0
2274 11:08:40.058462 23 0 0
2275 11:08:40.062134 24 0 0
2276 11:08:40.062226 25 0 0
2277 11:08:40.065310 26 0 0
2278 11:08:40.065414 27 0 0
2279 11:08:40.065473 28 0 0
2280 11:08:40.069036 29 0 0
2281 11:08:40.069152 30 0 0
2282 11:08:40.071852 31 0 ff
2283 11:08:40.071958 32 0 ff
2284 11:08:40.072046 33 0 ff
2285 11:08:40.075501 34 0 ff
2286 11:08:40.075578 35 0 ff
2287 11:08:40.078895 36 ff ff
2288 11:08:40.078990 37 ff ff
2289 11:08:40.081997 38 ff ff
2290 11:08:40.082074 39 ff ff
2291 11:08:40.085435 40 ff ff
2292 11:08:40.085512 41 ff ff
2293 11:08:40.088516 42 ff ff
2294 11:08:40.092116 pass bytecount = 0xff (0xff: all bytes pass)
2295 11:08:40.092215
2296 11:08:40.092306 DQS0 dly: 36
2297 11:08:40.095564 DQS1 dly: 31
2298 11:08:40.095648 Write Rank0 MR2 =0x2d
2299 11:08:40.098774 [RankSwap] Rank num 2, (Multi 1), Rank 0
2300 11:08:40.101881 Write Rank0 MR1 =0xd6
2301 11:08:40.101957 [Gating]
2302 11:08:40.102015 ==
2303 11:08:40.108824 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2304 11:08:40.112616 fsp= 1, odt_onoff= 1, Byte mode= 0
2305 11:08:40.112693 ==
2306 11:08:40.115369 3 1 0 |1110 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2307 11:08:40.118631 3 1 4 |2e2d 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2308 11:08:40.125483 3 1 8 |100 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2309 11:08:40.128517 3 1 12 |2e2d 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2310 11:08:40.132351 3 1 16 |c0c 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2311 11:08:40.135629 3 1 20 |2e2d 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2312 11:08:40.142708 3 1 24 |2e2d 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2313 11:08:40.145449 3 1 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2314 11:08:40.148777 3 2 0 |3535 201 |(11 11)(11 11) |(0 0)(1 1)| 0
2315 11:08:40.155796 3 2 4 |2120 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2316 11:08:40.159254 3 2 8 |1615 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2317 11:08:40.162330 3 2 12 |3433 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2318 11:08:40.169218 3 2 16 |3535 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2319 11:08:40.172197 3 2 20 |100f 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2320 11:08:40.175678 3 2 24 |3535 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2321 11:08:40.179103 3 2 28 |3636 3d3d |(10 10)(11 11) |(1 1)(1 1)| 0
2322 11:08:40.185366 3 3 0 |a09 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2323 11:08:40.188704 3 3 4 |3534 1e1e |(11 11)(11 11) |(1 1)(1 1)| 0
2324 11:08:40.192131 [Byte 0] Lead/lag falling Transition (3, 3, 4)
2325 11:08:40.198922 3 3 8 |3534 504 |(11 11)(11 11) |(0 1)(1 1)| 0
2326 11:08:40.202376 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2327 11:08:40.205634 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2328 11:08:40.209201 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2329 11:08:40.215617 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2330 11:08:40.218817 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2331 11:08:40.222522 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2332 11:08:40.228765 3 4 0 |3d3d b0a |(11 11)(11 11) |(1 1)(1 1)| 0
2333 11:08:40.232388 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2334 11:08:40.236061 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2335 11:08:40.239206 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2336 11:08:40.245625 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2337 11:08:40.248954 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2338 11:08:40.252316 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2339 11:08:40.259618 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2340 11:08:40.262720 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2341 11:08:40.266026 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2342 11:08:40.272573 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2343 11:08:40.275785 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2344 11:08:40.279499 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2345 11:08:40.282530 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2346 11:08:40.289649 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2347 11:08:40.292832 [Byte 0] Lead/lag Transition tap number (2)
2348 11:08:40.295966 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2349 11:08:40.299458 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2350 11:08:40.306158 3 5 28 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2351 11:08:40.309457 [Byte 1] Lead/lag Transition tap number (2)
2352 11:08:40.312822 3 6 0 |4646 909 |(10 10)(11 11) |(0 0)(0 0)| 0
2353 11:08:40.316328 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2354 11:08:40.319394 [Byte 0]First pass (3, 6, 4)
2355 11:08:40.323047 [Byte 1]First pass (3, 6, 4)
2356 11:08:40.325950 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2357 11:08:40.329509 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2358 11:08:40.336068 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2359 11:08:40.339566 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2360 11:08:40.343259 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2361 11:08:40.346429 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2362 11:08:40.349676 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2363 11:08:40.356299 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2364 11:08:40.359586 All bytes gating window > 1UI, Early break!
2365 11:08:40.359663
2366 11:08:40.363041 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
2367 11:08:40.363116
2368 11:08:40.366296 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
2369 11:08:40.366371
2370 11:08:40.366429
2371 11:08:40.366483
2372 11:08:40.369926 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
2373 11:08:40.370002
2374 11:08:40.373013 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
2375 11:08:40.373105
2376 11:08:40.376282
2377 11:08:40.376356 Write Rank0 MR1 =0x56
2378 11:08:40.376415
2379 11:08:40.379771 best RODT dly(2T, 0.5T) = (2, 2)
2380 11:08:40.379847
2381 11:08:40.383155 best RODT dly(2T, 0.5T) = (2, 2)
2382 11:08:40.383230 ==
2383 11:08:40.389772 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2384 11:08:40.389850 fsp= 1, odt_onoff= 1, Byte mode= 0
2385 11:08:40.393325 ==
2386 11:08:40.396512 Start DQ dly to find pass range UseTestEngine =0
2387 11:08:40.400049 x-axis: bit #, y-axis: DQ dly (-127~63)
2388 11:08:40.400125 RX Vref Scan = 0
2389 11:08:40.403681 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2390 11:08:40.406645 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2391 11:08:40.410201 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2392 11:08:40.413134 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2393 11:08:40.416823 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2394 11:08:40.419853 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2395 11:08:40.423275 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2396 11:08:40.423353 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2397 11:08:40.426565 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2398 11:08:40.430230 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2399 11:08:40.433382 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2400 11:08:40.437150 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2401 11:08:40.440432 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2402 11:08:40.443400 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2403 11:08:40.446711 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2404 11:08:40.446787 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2405 11:08:40.449882 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2406 11:08:40.453503 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2407 11:08:40.456791 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2408 11:08:40.460019 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2409 11:08:40.463216 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2410 11:08:40.466970 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2411 11:08:40.467046 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2412 11:08:40.470162 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2413 11:08:40.473516 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2414 11:08:40.476918 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2415 11:08:40.480794 0, [0] xxxoxxxx xxxxxxxx [MSB]
2416 11:08:40.483966 1, [0] xxxoxxxx xxxxxxxo [MSB]
2417 11:08:40.484042 2, [0] xxooxxxx xxxxxxxo [MSB]
2418 11:08:40.487181 3, [0] xxoooxxo oooxxoxo [MSB]
2419 11:08:40.490261 4, [0] xxoooxxo oooxooxo [MSB]
2420 11:08:40.493843 5, [0] xxoooxxo oooooooo [MSB]
2421 11:08:40.497072 6, [0] xooooxxo oooooooo [MSB]
2422 11:08:40.497175 7, [0] xoooooxo oooooooo [MSB]
2423 11:08:40.500340 8, [0] ooooooxo oooooooo [MSB]
2424 11:08:40.503710 32, [0] ooxxoooo oooooooo [MSB]
2425 11:08:40.507039 33, [0] ooxxoooo ooooooox [MSB]
2426 11:08:40.510215 34, [0] ooxxoooo ooooooox [MSB]
2427 11:08:40.513593 35, [0] ooxxxooo ooxoooox [MSB]
2428 11:08:40.517397 36, [0] ooxxxoox xoxoooox [MSB]
2429 11:08:40.517500 37, [0] ooxxxoox xxxxoxxx [MSB]
2430 11:08:40.520389 38, [0] ooxxxoox xxxxoxxx [MSB]
2431 11:08:40.523535 39, [0] ooxxxoox xxxxxxxx [MSB]
2432 11:08:40.527034 40, [0] oxxxxoox xxxxxxxx [MSB]
2433 11:08:40.530329 41, [0] xxxxxxxx xxxxxxxx [MSB]
2434 11:08:40.533784 iDelay=41, Bit 0, Center 24 (8 ~ 40) 33
2435 11:08:40.537013 iDelay=41, Bit 1, Center 22 (6 ~ 39) 34
2436 11:08:40.540638 iDelay=41, Bit 2, Center 16 (2 ~ 31) 30
2437 11:08:40.543864 iDelay=41, Bit 3, Center 15 (-1 ~ 31) 33
2438 11:08:40.546841 iDelay=41, Bit 4, Center 18 (3 ~ 34) 32
2439 11:08:40.550802 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2440 11:08:40.553898 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
2441 11:08:40.557265 iDelay=41, Bit 7, Center 19 (3 ~ 35) 33
2442 11:08:40.560306 iDelay=41, Bit 8, Center 19 (3 ~ 35) 33
2443 11:08:40.563773 iDelay=41, Bit 9, Center 19 (3 ~ 36) 34
2444 11:08:40.570640 iDelay=41, Bit 10, Center 18 (3 ~ 34) 32
2445 11:08:40.573984 iDelay=41, Bit 11, Center 20 (5 ~ 36) 32
2446 11:08:40.577256 iDelay=41, Bit 12, Center 21 (4 ~ 38) 35
2447 11:08:40.580306 iDelay=41, Bit 13, Center 19 (3 ~ 36) 34
2448 11:08:40.584228 iDelay=41, Bit 14, Center 20 (5 ~ 36) 32
2449 11:08:40.587411 iDelay=41, Bit 15, Center 16 (1 ~ 32) 32
2450 11:08:40.587490 ==
2451 11:08:40.593761 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2452 11:08:40.593842 fsp= 1, odt_onoff= 1, Byte mode= 0
2453 11:08:40.597403 ==
2454 11:08:40.597481 DQS Delay:
2455 11:08:40.597539 DQS0 = 0, DQS1 = 0
2456 11:08:40.600737 DQM Delay:
2457 11:08:40.600814 DQM0 = 20, DQM1 = 19
2458 11:08:40.604037 DQ Delay:
2459 11:08:40.606889 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2460 11:08:40.606965 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =19
2461 11:08:40.610552 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =20
2462 11:08:40.613823 DQ12 =21, DQ13 =19, DQ14 =20, DQ15 =16
2463 11:08:40.616958
2464 11:08:40.617031
2465 11:08:40.617089 DramC Write-DBI off
2466 11:08:40.617151 ==
2467 11:08:40.623589 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2468 11:08:40.627337 fsp= 1, odt_onoff= 1, Byte mode= 0
2469 11:08:40.627411 ==
2470 11:08:40.630349 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2471 11:08:40.630424
2472 11:08:40.633753 Begin, DQ Scan Range 927~1183
2473 11:08:40.633827
2474 11:08:40.633886
2475 11:08:40.636821 TX Vref Scan disable
2476 11:08:40.640585 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2477 11:08:40.643942 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2478 11:08:40.647128 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2479 11:08:40.650445 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2480 11:08:40.654057 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2481 11:08:40.657715 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2482 11:08:40.660320 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2483 11:08:40.663727 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2484 11:08:40.667188 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2485 11:08:40.670224 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2486 11:08:40.673765 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2487 11:08:40.677047 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2488 11:08:40.680834 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2489 11:08:40.683926 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2490 11:08:40.687445 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2491 11:08:40.690683 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2492 11:08:40.697439 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2493 11:08:40.700330 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2494 11:08:40.704089 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2495 11:08:40.707581 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2496 11:08:40.710711 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2497 11:08:40.714486 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2498 11:08:40.717308 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2499 11:08:40.720620 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2500 11:08:40.724540 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2501 11:08:40.727466 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2502 11:08:40.730949 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2503 11:08:40.734242 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2504 11:08:40.737315 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2505 11:08:40.740683 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2506 11:08:40.743961 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2507 11:08:40.747394 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2508 11:08:40.750758 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2509 11:08:40.754315 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2510 11:08:40.760866 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2511 11:08:40.764282 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2512 11:08:40.767399 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2513 11:08:40.770511 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2514 11:08:40.774008 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]
2515 11:08:40.777561 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
2516 11:08:40.780959 967 |3 6 7|[0] xxxxxxxx xoxxxxxo [MSB]
2517 11:08:40.784060 968 |3 6 8|[0] xxxxxxxx oooxxxxo [MSB]
2518 11:08:40.787742 969 |3 6 9|[0] xxxxxxxx oooooxoo [MSB]
2519 11:08:40.790960 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
2520 11:08:40.794236 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
2521 11:08:40.797349 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2522 11:08:40.800870 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
2523 11:08:40.803828 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
2524 11:08:40.807602 975 |3 6 15|[0] xxooxxxx oooooooo [MSB]
2525 11:08:40.810993 976 |3 6 16|[0] xooooxxo oooooooo [MSB]
2526 11:08:40.814075 977 |3 6 17|[0] ooooooxo oooooooo [MSB]
2527 11:08:40.821926 990 |3 6 30|[0] oooooooo ooooooox [MSB]
2528 11:08:40.825001 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2529 11:08:40.828594 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2530 11:08:40.831624 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2531 11:08:40.835279 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2532 11:08:40.838819 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
2533 11:08:40.842106 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
2534 11:08:40.845494 997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]
2535 11:08:40.848618 998 |3 6 38|[0] ooxxooox xxxxxxxx [MSB]
2536 11:08:40.851669 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2537 11:08:40.855134 Byte0, DQ PI dly=986, DQM PI dly= 986
2538 11:08:40.858370 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
2539 11:08:40.858504
2540 11:08:40.864837 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
2541 11:08:40.864975
2542 11:08:40.868818 Byte1, DQ PI dly=978, DQM PI dly= 978
2543 11:08:40.871737 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2544 11:08:40.871873
2545 11:08:40.874889 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2546 11:08:40.875023
2547 11:08:40.878392 ==
2548 11:08:40.881887 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2549 11:08:40.885243 fsp= 1, odt_onoff= 1, Byte mode= 0
2550 11:08:40.885378 ==
2551 11:08:40.888566 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2552 11:08:40.888697
2553 11:08:40.892147 Begin, DQ Scan Range 954~1018
2554 11:08:40.895035 Write Rank0 MR14 =0x0
2555 11:08:40.903583
2556 11:08:40.903716 CH=1, VrefRange= 0, VrefLevel = 0
2557 11:08:40.909974 TX Bit0 (979~998) 20 988, Bit8 (969~985) 17 977,
2558 11:08:40.913549 TX Bit1 (978~996) 19 987, Bit9 (969~986) 18 977,
2559 11:08:40.920494 TX Bit2 (977~992) 16 984, Bit10 (970~986) 17 978,
2560 11:08:40.923207 TX Bit3 (976~990) 15 983, Bit11 (972~989) 18 980,
2561 11:08:40.927182 TX Bit4 (978~993) 16 985, Bit12 (971~989) 19 980,
2562 11:08:40.933259 TX Bit5 (978~997) 20 987, Bit13 (972~989) 18 980,
2563 11:08:40.936394 TX Bit6 (980~997) 18 988, Bit14 (970~987) 18 978,
2564 11:08:40.940348 TX Bit7 (978~992) 15 985, Bit15 (967~985) 19 976,
2565 11:08:40.940485
2566 11:08:40.943106 Write Rank0 MR14 =0x2
2567 11:08:40.952187
2568 11:08:40.952322 CH=1, VrefRange= 0, VrefLevel = 2
2569 11:08:40.958571 TX Bit0 (979~998) 20 988, Bit8 (969~986) 18 977,
2570 11:08:40.962099 TX Bit1 (978~997) 20 987, Bit9 (968~986) 19 977,
2571 11:08:40.968957 TX Bit2 (977~992) 16 984, Bit10 (970~986) 17 978,
2572 11:08:40.972087 TX Bit3 (976~991) 16 983, Bit11 (971~990) 20 980,
2573 11:08:40.975107 TX Bit4 (977~994) 18 985, Bit12 (970~990) 21 980,
2574 11:08:40.981801 TX Bit5 (978~998) 21 988, Bit13 (972~989) 18 980,
2575 11:08:40.985450 TX Bit6 (980~998) 19 989, Bit14 (971~987) 17 979,
2576 11:08:40.988521 TX Bit7 (977~992) 16 984, Bit15 (967~985) 19 976,
2577 11:08:40.988658
2578 11:08:40.991727 Write Rank0 MR14 =0x4
2579 11:08:41.001279
2580 11:08:41.001416 CH=1, VrefRange= 0, VrefLevel = 4
2581 11:08:41.007900 TX Bit0 (979~998) 20 988, Bit8 (969~987) 19 978,
2582 11:08:41.010803 TX Bit1 (977~997) 21 987, Bit9 (969~987) 19 978,
2583 11:08:41.018150 TX Bit2 (977~992) 16 984, Bit10 (969~987) 19 978,
2584 11:08:41.021007 TX Bit3 (975~991) 17 983, Bit11 (971~990) 20 980,
2585 11:08:41.024352 TX Bit4 (977~994) 18 985, Bit12 (970~990) 21 980,
2586 11:08:41.030867 TX Bit5 (978~998) 21 988, Bit13 (972~990) 19 981,
2587 11:08:41.034706 TX Bit6 (979~998) 20 988, Bit14 (970~988) 19 979,
2588 11:08:41.037512 TX Bit7 (977~993) 17 985, Bit15 (967~986) 20 976,
2589 11:08:41.037642
2590 11:08:41.040745 Write Rank0 MR14 =0x6
2591 11:08:41.050105
2592 11:08:41.050246 CH=1, VrefRange= 0, VrefLevel = 6
2593 11:08:41.057209 TX Bit0 (978~999) 22 988, Bit8 (969~987) 19 978,
2594 11:08:41.059966 TX Bit1 (977~997) 21 987, Bit9 (969~987) 19 978,
2595 11:08:41.067037 TX Bit2 (976~993) 18 984, Bit10 (969~988) 20 978,
2596 11:08:41.070348 TX Bit3 (975~991) 17 983, Bit11 (971~991) 21 981,
2597 11:08:41.073283 TX Bit4 (977~995) 19 986, Bit12 (970~990) 21 980,
2598 11:08:41.079922 TX Bit5 (978~998) 21 988, Bit13 (971~990) 20 980,
2599 11:08:41.083372 TX Bit6 (979~998) 20 988, Bit14 (970~989) 20 979,
2600 11:08:41.086640 TX Bit7 (977~994) 18 985, Bit15 (967~987) 21 977,
2601 11:08:41.086771
2602 11:08:41.089764 Write Rank0 MR14 =0x8
2603 11:08:41.098931
2604 11:08:41.099068 CH=1, VrefRange= 0, VrefLevel = 8
2605 11:08:41.105917 TX Bit0 (978~999) 22 988, Bit8 (968~988) 21 978,
2606 11:08:41.108859 TX Bit1 (977~998) 22 987, Bit9 (968~988) 21 978,
2607 11:08:41.115731 TX Bit2 (976~994) 19 985, Bit10 (969~989) 21 979,
2608 11:08:41.119276 TX Bit3 (974~992) 19 983, Bit11 (970~991) 22 980,
2609 11:08:41.122616 TX Bit4 (977~996) 20 986, Bit12 (969~991) 23 980,
2610 11:08:41.129575 TX Bit5 (978~999) 22 988, Bit13 (971~991) 21 981,
2611 11:08:41.132361 TX Bit6 (978~999) 22 988, Bit14 (969~990) 22 979,
2612 11:08:41.136118 TX Bit7 (977~994) 18 985, Bit15 (966~987) 22 976,
2613 11:08:41.136244
2614 11:08:41.138917 Write Rank0 MR14 =0xa
2615 11:08:41.148458
2616 11:08:41.151824 CH=1, VrefRange= 0, VrefLevel = 10
2617 11:08:41.154772 TX Bit0 (978~999) 22 988, Bit8 (968~989) 22 978,
2618 11:08:41.158045 TX Bit1 (977~998) 22 987, Bit9 (968~989) 22 978,
2619 11:08:41.165368 TX Bit2 (976~994) 19 985, Bit10 (969~989) 21 979,
2620 11:08:41.168356 TX Bit3 (974~992) 19 983, Bit11 (970~991) 22 980,
2621 11:08:41.171460 TX Bit4 (976~997) 22 986, Bit12 (969~991) 23 980,
2622 11:08:41.178188 TX Bit5 (977~998) 22 987, Bit13 (971~991) 21 981,
2623 11:08:41.181848 TX Bit6 (978~998) 21 988, Bit14 (970~990) 21 980,
2624 11:08:41.184575 TX Bit7 (976~995) 20 985, Bit15 (965~988) 24 976,
2625 11:08:41.188333
2626 11:08:41.188462 Write Rank0 MR14 =0xc
2627 11:08:41.197260
2628 11:08:41.200592 CH=1, VrefRange= 0, VrefLevel = 12
2629 11:08:41.204075 TX Bit0 (978~1000) 23 989, Bit8 (968~990) 23 979,
2630 11:08:41.207554 TX Bit1 (977~998) 22 987, Bit9 (968~989) 22 978,
2631 11:08:41.214110 TX Bit2 (976~995) 20 985, Bit10 (969~990) 22 979,
2632 11:08:41.217045 TX Bit3 (973~993) 21 983, Bit11 (970~991) 22 980,
2633 11:08:41.220596 TX Bit4 (976~997) 22 986, Bit12 (969~991) 23 980,
2634 11:08:41.227154 TX Bit5 (977~999) 23 988, Bit13 (970~991) 22 980,
2635 11:08:41.230871 TX Bit6 (978~999) 22 988, Bit14 (969~991) 23 980,
2636 11:08:41.233937 TX Bit7 (976~996) 21 986, Bit15 (966~988) 23 977,
2637 11:08:41.234066
2638 11:08:41.237501 Write Rank0 MR14 =0xe
2639 11:08:41.246486
2640 11:08:41.250197 CH=1, VrefRange= 0, VrefLevel = 14
2641 11:08:41.253205 TX Bit0 (978~1000) 23 989, Bit8 (968~990) 23 979,
2642 11:08:41.256497 TX Bit1 (976~998) 23 987, Bit9 (967~990) 24 978,
2643 11:08:41.263527 TX Bit2 (976~996) 21 986, Bit10 (969~991) 23 980,
2644 11:08:41.266439 TX Bit3 (973~993) 21 983, Bit11 (970~992) 23 981,
2645 11:08:41.270233 TX Bit4 (976~998) 23 987, Bit12 (969~991) 23 980,
2646 11:08:41.276630 TX Bit5 (977~1000) 24 988, Bit13 (970~991) 22 980,
2647 11:08:41.280002 TX Bit6 (978~1000) 23 989, Bit14 (969~991) 23 980,
2648 11:08:41.283832 TX Bit7 (976~996) 21 986, Bit15 (965~989) 25 977,
2649 11:08:41.287098
2650 11:08:41.287231 Write Rank0 MR14 =0x10
2651 11:08:41.296277
2652 11:08:41.299886 CH=1, VrefRange= 0, VrefLevel = 16
2653 11:08:41.303022 TX Bit0 (978~1000) 23 989, Bit8 (968~991) 24 979,
2654 11:08:41.306271 TX Bit1 (976~999) 24 987, Bit9 (967~990) 24 978,
2655 11:08:41.313289 TX Bit2 (975~996) 22 985, Bit10 (968~991) 24 979,
2656 11:08:41.316762 TX Bit3 (972~994) 23 983, Bit11 (969~992) 24 980,
2657 11:08:41.319583 TX Bit4 (976~998) 23 987, Bit12 (969~991) 23 980,
2658 11:08:41.326677 TX Bit5 (977~1000) 24 988, Bit13 (970~991) 22 980,
2659 11:08:41.330410 TX Bit6 (978~1000) 23 989, Bit14 (969~991) 23 980,
2660 11:08:41.333053 TX Bit7 (976~997) 22 986, Bit15 (965~989) 25 977,
2661 11:08:41.336268
2662 11:08:41.336399 Write Rank0 MR14 =0x12
2663 11:08:41.345966
2664 11:08:41.346109 CH=1, VrefRange= 0, VrefLevel = 18
2665 11:08:41.352958 TX Bit0 (977~1001) 25 989, Bit8 (967~991) 25 979,
2666 11:08:41.356019 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
2667 11:08:41.362904 TX Bit2 (975~997) 23 986, Bit10 (968~991) 24 979,
2668 11:08:41.365942 TX Bit3 (972~994) 23 983, Bit11 (969~992) 24 980,
2669 11:08:41.369215 TX Bit4 (976~998) 23 987, Bit12 (969~992) 24 980,
2670 11:08:41.376033 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
2671 11:08:41.380057 TX Bit6 (978~1000) 23 989, Bit14 (969~991) 23 980,
2672 11:08:41.386162 TX Bit7 (976~997) 22 986, Bit15 (965~990) 26 977,
2673 11:08:41.386296
2674 11:08:41.386417 Write Rank0 MR14 =0x14
2675 11:08:41.396245
2676 11:08:41.399052 CH=1, VrefRange= 0, VrefLevel = 20
2677 11:08:41.402431 TX Bit0 (978~1001) 24 989, Bit8 (967~991) 25 979,
2678 11:08:41.405586 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
2679 11:08:41.412943 TX Bit2 (975~997) 23 986, Bit10 (968~991) 24 979,
2680 11:08:41.415811 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2681 11:08:41.419168 TX Bit4 (975~998) 24 986, Bit12 (968~992) 25 980,
2682 11:08:41.425774 TX Bit5 (976~1000) 25 988, Bit13 (969~992) 24 980,
2683 11:08:41.429221 TX Bit6 (977~1001) 25 989, Bit14 (969~991) 23 980,
2684 11:08:41.435922 TX Bit7 (975~998) 24 986, Bit15 (965~990) 26 977,
2685 11:08:41.436059
2686 11:08:41.439237 wait MRW command Rank0 MR14 =0x16 fired (1)
2687 11:08:41.439368 Write Rank0 MR14 =0x16
2688 11:08:41.449991
2689 11:08:41.452976 CH=1, VrefRange= 0, VrefLevel = 22
2690 11:08:41.456240 TX Bit0 (977~1002) 26 989, Bit8 (967~991) 25 979,
2691 11:08:41.459480 TX Bit1 (976~1000) 25 988, Bit9 (967~991) 25 979,
2692 11:08:41.466298 TX Bit2 (974~998) 25 986, Bit10 (967~992) 26 979,
2693 11:08:41.469556 TX Bit3 (971~996) 26 983, Bit11 (969~993) 25 981,
2694 11:08:41.472980 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2695 11:08:41.479733 TX Bit5 (976~1001) 26 988, Bit13 (969~992) 24 980,
2696 11:08:41.482914 TX Bit6 (977~1001) 25 989, Bit14 (969~991) 23 980,
2697 11:08:41.486269 TX Bit7 (975~998) 24 986, Bit15 (964~990) 27 977,
2698 11:08:41.489877
2699 11:08:41.490007 Write Rank0 MR14 =0x18
2700 11:08:41.499799
2701 11:08:41.503119 CH=1, VrefRange= 0, VrefLevel = 24
2702 11:08:41.506706 TX Bit0 (977~1002) 26 989, Bit8 (967~991) 25 979,
2703 11:08:41.510027 TX Bit1 (976~1000) 25 988, Bit9 (967~991) 25 979,
2704 11:08:41.516866 TX Bit2 (973~997) 25 985, Bit10 (967~991) 25 979,
2705 11:08:41.519678 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2706 11:08:41.523303 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2707 11:08:41.530040 TX Bit5 (976~1001) 26 988, Bit13 (969~992) 24 980,
2708 11:08:41.533040 TX Bit6 (978~1002) 25 990, Bit14 (968~991) 24 979,
2709 11:08:41.536600 TX Bit7 (975~998) 24 986, Bit15 (964~989) 26 976,
2710 11:08:41.536675
2711 11:08:41.540373 Write Rank0 MR14 =0x1a
2712 11:08:41.549856
2713 11:08:41.553282 CH=1, VrefRange= 0, VrefLevel = 26
2714 11:08:41.556726 TX Bit0 (977~1002) 26 989, Bit8 (967~991) 25 979,
2715 11:08:41.560193 TX Bit1 (976~1000) 25 988, Bit9 (967~991) 25 979,
2716 11:08:41.566689 TX Bit2 (973~997) 25 985, Bit10 (967~991) 25 979,
2717 11:08:41.569993 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2718 11:08:41.573331 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2719 11:08:41.579861 TX Bit5 (976~1001) 26 988, Bit13 (969~992) 24 980,
2720 11:08:41.583130 TX Bit6 (978~1002) 25 990, Bit14 (968~991) 24 979,
2721 11:08:41.589795 TX Bit7 (975~998) 24 986, Bit15 (964~989) 26 976,
2722 11:08:41.589873
2723 11:08:41.589961 Write Rank0 MR14 =0x1c
2724 11:08:41.599928
2725 11:08:41.603167 CH=1, VrefRange= 0, VrefLevel = 28
2726 11:08:41.606131 TX Bit0 (977~1002) 26 989, Bit8 (967~991) 25 979,
2727 11:08:41.609659 TX Bit1 (976~1000) 25 988, Bit9 (967~991) 25 979,
2728 11:08:41.616178 TX Bit2 (973~997) 25 985, Bit10 (967~991) 25 979,
2729 11:08:41.619627 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2730 11:08:41.622737 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2731 11:08:41.629480 TX Bit5 (976~1001) 26 988, Bit13 (969~992) 24 980,
2732 11:08:41.632907 TX Bit6 (978~1002) 25 990, Bit14 (968~991) 24 979,
2733 11:08:41.639468 TX Bit7 (975~998) 24 986, Bit15 (964~989) 26 976,
2734 11:08:41.639548
2735 11:08:41.639607 Write Rank0 MR14 =0x1e
2736 11:08:41.649544
2737 11:08:41.652704 CH=1, VrefRange= 0, VrefLevel = 30
2738 11:08:41.656369 TX Bit0 (977~1002) 26 989, Bit8 (967~991) 25 979,
2739 11:08:41.659531 TX Bit1 (976~1000) 25 988, Bit9 (967~991) 25 979,
2740 11:08:41.666382 TX Bit2 (973~997) 25 985, Bit10 (967~991) 25 979,
2741 11:08:41.669705 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2742 11:08:41.673113 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2743 11:08:41.679400 TX Bit5 (976~1001) 26 988, Bit13 (969~992) 24 980,
2744 11:08:41.682845 TX Bit6 (978~1002) 25 990, Bit14 (968~991) 24 979,
2745 11:08:41.689635 TX Bit7 (975~998) 24 986, Bit15 (964~989) 26 976,
2746 11:08:41.689711
2747 11:08:41.689769 Write Rank0 MR14 =0x20
2748 11:08:41.699284
2749 11:08:41.702880 CH=1, VrefRange= 0, VrefLevel = 32
2750 11:08:41.706539 TX Bit0 (977~1002) 26 989, Bit8 (967~991) 25 979,
2751 11:08:41.709837 TX Bit1 (976~1000) 25 988, Bit9 (967~991) 25 979,
2752 11:08:41.715882 TX Bit2 (973~997) 25 985, Bit10 (967~991) 25 979,
2753 11:08:41.719457 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2754 11:08:41.722681 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2755 11:08:41.729383 TX Bit5 (976~1001) 26 988, Bit13 (969~992) 24 980,
2756 11:08:41.732560 TX Bit6 (978~1002) 25 990, Bit14 (968~991) 24 979,
2757 11:08:41.739157 TX Bit7 (975~998) 24 986, Bit15 (964~989) 26 976,
2758 11:08:41.739234
2759 11:08:41.739306
2760 11:08:41.742655 TX Vref found, early break! 375< 379
2761 11:08:41.745995 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2762 11:08:41.749067 u1DelayCellOfst[0]=7 cells (6 PI)
2763 11:08:41.752704 u1DelayCellOfst[1]=6 cells (5 PI)
2764 11:08:41.756556 u1DelayCellOfst[2]=2 cells (2 PI)
2765 11:08:41.759769 u1DelayCellOfst[3]=0 cells (0 PI)
2766 11:08:41.763036 u1DelayCellOfst[4]=5 cells (4 PI)
2767 11:08:41.763112 u1DelayCellOfst[5]=6 cells (5 PI)
2768 11:08:41.766346 u1DelayCellOfst[6]=8 cells (7 PI)
2769 11:08:41.769505 u1DelayCellOfst[7]=3 cells (3 PI)
2770 11:08:41.773319 Byte0, DQ PI dly=983, DQM PI dly= 986
2771 11:08:41.779708 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2772 11:08:41.779847
2773 11:08:41.782961 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2774 11:08:41.783098
2775 11:08:41.786216 u1DelayCellOfst[8]=3 cells (3 PI)
2776 11:08:41.789315 u1DelayCellOfst[9]=3 cells (3 PI)
2777 11:08:41.792549 u1DelayCellOfst[10]=3 cells (3 PI)
2778 11:08:41.796089 u1DelayCellOfst[11]=5 cells (4 PI)
2779 11:08:41.799510 u1DelayCellOfst[12]=5 cells (4 PI)
2780 11:08:41.799639 u1DelayCellOfst[13]=5 cells (4 PI)
2781 11:08:41.803049 u1DelayCellOfst[14]=3 cells (3 PI)
2782 11:08:41.806208 u1DelayCellOfst[15]=0 cells (0 PI)
2783 11:08:41.809479 Byte1, DQ PI dly=976, DQM PI dly= 978
2784 11:08:41.815903 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2785 11:08:41.816031
2786 11:08:41.819771 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2787 11:08:41.819899
2788 11:08:41.822536 Write Rank0 MR14 =0x18
2789 11:08:41.822654
2790 11:08:41.822773 Final TX Range 0 Vref 24
2791 11:08:41.822888
2792 11:08:41.829292 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2793 11:08:41.829422
2794 11:08:41.836368 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2795 11:08:41.842531 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2796 11:08:41.852864 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2797 11:08:41.853012 Write Rank0 MR3 =0xb0
2798 11:08:41.856319 DramC Write-DBI on
2799 11:08:41.856453 ==
2800 11:08:41.859266 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2801 11:08:41.862972 fsp= 1, odt_onoff= 1, Byte mode= 0
2802 11:08:41.863052 ==
2803 11:08:41.869386 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2804 11:08:41.869453
2805 11:08:41.869508 Begin, DQ Scan Range 698~762
2806 11:08:41.869560
2807 11:08:41.872545
2808 11:08:41.872619 TX Vref Scan disable
2809 11:08:41.876233 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2810 11:08:41.879506 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2811 11:08:41.882947 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2812 11:08:41.886138 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2813 11:08:41.889342 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2814 11:08:41.893012 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2815 11:08:41.896174 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2816 11:08:41.899446 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2817 11:08:41.906207 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2818 11:08:41.909408 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
2819 11:08:41.912648 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
2820 11:08:41.916060 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2821 11:08:41.919762 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2822 11:08:41.923207 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2823 11:08:41.926354 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2824 11:08:41.929342 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2825 11:08:41.933648 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2826 11:08:41.936352 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2827 11:08:41.939595 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2828 11:08:41.942936 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2829 11:08:41.950654 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2830 11:08:41.954196 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2831 11:08:41.957472 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2832 11:08:41.960697 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2833 11:08:41.964379 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2834 11:08:41.967704 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2835 11:08:41.970837 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2836 11:08:41.974155 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2837 11:08:41.977348 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2838 11:08:41.980667 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
2839 11:08:41.984165 Byte0, DQ PI dly=731, DQM PI dly= 731
2840 11:08:41.987431 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
2841 11:08:41.987508
2842 11:08:41.994024 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
2843 11:08:41.994101
2844 11:08:41.997325 Byte1, DQ PI dly=721, DQM PI dly= 721
2845 11:08:42.001043 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
2846 11:08:42.001146
2847 11:08:42.003890 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
2848 11:08:42.003956
2849 11:08:42.010636 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2850 11:08:42.020912 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2851 11:08:42.027449 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2852 11:08:42.027526 Write Rank0 MR3 =0x30
2853 11:08:42.030635 DramC Write-DBI off
2854 11:08:42.030710
2855 11:08:42.030769 [DATLAT]
2856 11:08:42.034183 Freq=1600, CH1 RK0, use_rxtx_scan=0
2857 11:08:42.034258
2858 11:08:42.037374 DATLAT Default: 0xf
2859 11:08:42.037449 7, 0xFFFF, sum=0
2860 11:08:42.040913 8, 0xFFFF, sum=0
2861 11:08:42.040989 9, 0xFFFF, sum=0
2862 11:08:42.041048 10, 0xFFFF, sum=0
2863 11:08:42.044164 11, 0xFFFF, sum=0
2864 11:08:42.044241 12, 0xFFFF, sum=0
2865 11:08:42.047439 13, 0xFFFF, sum=0
2866 11:08:42.047516 14, 0x0, sum=1
2867 11:08:42.050766 15, 0x0, sum=2
2868 11:08:42.050842 16, 0x0, sum=3
2869 11:08:42.054389 17, 0x0, sum=4
2870 11:08:42.057287 pattern=2 first_step=14 total pass=5 best_step=16
2871 11:08:42.057429 ==
2872 11:08:42.064309 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2873 11:08:42.064447 fsp= 1, odt_onoff= 1, Byte mode= 0
2874 11:08:42.067485 ==
2875 11:08:42.070815 Start DQ dly to find pass range UseTestEngine =1
2876 11:08:42.074141 x-axis: bit #, y-axis: DQ dly (-127~63)
2877 11:08:42.074274 RX Vref Scan = 1
2878 11:08:42.197775
2879 11:08:42.197985 RX Vref found, early break!
2880 11:08:42.198113
2881 11:08:42.201501 Final RX Vref 13, apply to both rank0 and 1
2882 11:08:42.204808 ==
2883 11:08:42.207968 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2884 11:08:42.211304 fsp= 1, odt_onoff= 1, Byte mode= 0
2885 11:08:42.211439 ==
2886 11:08:42.211562 DQS Delay:
2887 11:08:42.214492 DQS0 = 0, DQS1 = 0
2888 11:08:42.214624 DQM Delay:
2889 11:08:42.217692 DQM0 = 20, DQM1 = 18
2890 11:08:42.217825 DQ Delay:
2891 11:08:42.220787 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2892 11:08:42.224642 DQ4 =18, DQ5 =23, DQ6 =25, DQ7 =19
2893 11:08:42.228118 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19
2894 11:08:42.231246 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
2895 11:08:42.231320
2896 11:08:42.231378
2897 11:08:42.231430
2898 11:08:42.234412 [DramC_TX_OE_Calibration] TA2
2899 11:08:42.237536 Original DQ_B0 (3 6) =30, OEN = 27
2900 11:08:42.241241 Original DQ_B1 (3 6) =30, OEN = 27
2901 11:08:42.244473 23, 0x0, End_B0=23 End_B1=23
2902 11:08:42.244620 24, 0x0, End_B0=24 End_B1=24
2903 11:08:42.247863 25, 0x0, End_B0=25 End_B1=25
2904 11:08:42.250763 26, 0x0, End_B0=26 End_B1=26
2905 11:08:42.254510 27, 0x0, End_B0=27 End_B1=27
2906 11:08:42.254646 28, 0x0, End_B0=28 End_B1=28
2907 11:08:42.258482 29, 0x0, End_B0=29 End_B1=29
2908 11:08:42.261051 30, 0x0, End_B0=30 End_B1=30
2909 11:08:42.264208 31, 0xFFFF, End_B0=30 End_B1=30
2910 11:08:42.270649 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2911 11:08:42.274216 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2912 11:08:42.274292
2913 11:08:42.274349
2914 11:08:42.277598 Write Rank0 MR23 =0x3f
2915 11:08:42.277673 [DQSOSC]
2916 11:08:42.287377 [DQSOSCAuto] RK0, (LSB)MR18= 0xbc, (MSB)MR19= 0x3, tDQSOscB0 = 329 ps tDQSOscB1 = 0 ps
2917 11:08:42.290946 CH1_RK0: MR19=0x3, MR18=0xBC, DQSOSC=329, MR23=63, INC=22, DEC=34
2918 11:08:42.294014 Write Rank0 MR23 =0x3f
2919 11:08:42.294088 [DQSOSC]
2920 11:08:42.301121 [DQSOSCAuto] RK0, (LSB)MR18= 0xbb, (MSB)MR19= 0x3, tDQSOscB0 = 329 ps tDQSOscB1 = 0 ps
2921 11:08:42.304056 CH1 RK0: MR19=3, MR18=BB
2922 11:08:42.307521 [RankSwap] Rank num 2, (Multi 1), Rank 1
2923 11:08:42.310760 Write Rank0 MR2 =0xad
2924 11:08:42.310838 [Write Leveling]
2925 11:08:42.313793 delay byte0 byte1 byte2 byte3
2926 11:08:42.313868
2927 11:08:42.317115 10 0 0
2928 11:08:42.317227 11 0 0
2929 11:08:42.317286 12 0 0
2930 11:08:42.320750 13 0 0
2931 11:08:42.320825 14 0 0
2932 11:08:42.323936 15 0 0
2933 11:08:42.324012 16 0 0
2934 11:08:42.327813 17 0 0
2935 11:08:42.327889 18 0 0
2936 11:08:42.327949 19 0 0
2937 11:08:42.330946 20 0 0
2938 11:08:42.331044 21 0 0
2939 11:08:42.334233 22 0 0
2940 11:08:42.334309 23 0 0
2941 11:08:42.334367 24 0 0
2942 11:08:42.337129 25 0 0
2943 11:08:42.337243 26 0 0
2944 11:08:42.340887 27 0 0
2945 11:08:42.340962 28 0 0
2946 11:08:42.341021 29 0 0
2947 11:08:42.344215 30 0 0
2948 11:08:42.344292 31 0 0
2949 11:08:42.347207 32 0 ff
2950 11:08:42.347284 33 0 ff
2951 11:08:42.350386 34 0 ff
2952 11:08:42.350462 35 ff ff
2953 11:08:42.353945 36 ff ff
2954 11:08:42.354022 37 ff ff
2955 11:08:42.354081 38 ff ff
2956 11:08:42.357273 39 ff ff
2957 11:08:42.357368 40 ff ff
2958 11:08:42.361128 41 ff ff
2959 11:08:42.363983 pass bytecount = 0xff (0xff: all bytes pass)
2960 11:08:42.364058
2961 11:08:42.367646 DQS0 dly: 35
2962 11:08:42.367720 DQS1 dly: 32
2963 11:08:42.367779 Write Rank0 MR2 =0x2d
2964 11:08:42.374144 [RankSwap] Rank num 2, (Multi 1), Rank 0
2965 11:08:42.374219 Write Rank1 MR1 =0xd6
2966 11:08:42.374278 [Gating]
2967 11:08:42.377596 ==
2968 11:08:42.380718 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2969 11:08:42.384609 fsp= 1, odt_onoff= 1, Byte mode= 0
2970 11:08:42.384683 ==
2971 11:08:42.387709 3 1 0 |2222 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2972 11:08:42.394001 3 1 4 |f0e 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2973 11:08:42.397730 3 1 8 |1f1e 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2974 11:08:42.400678 3 1 12 |2d2c 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2975 11:08:42.403929 3 1 16 |2d2d 3534 |(0 0)(11 11) |(0 1)(0 1)| 0
2976 11:08:42.411486 3 1 20 |2e2d 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2977 11:08:42.414079 3 1 24 |2d2c 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2978 11:08:42.417212 3 1 28 |605 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2979 11:08:42.424082 3 2 0 |2b2a 201 |(11 11)(11 11) |(0 0)(1 1)| 0
2980 11:08:42.427386 3 2 4 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2981 11:08:42.430810 3 2 8 |3636 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2982 11:08:42.437353 3 2 12 |3535 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2983 11:08:42.440683 3 2 16 |3636 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2984 11:08:42.443955 3 2 20 |3837 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2985 11:08:42.450837 3 2 24 |3635 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2986 11:08:42.453876 3 2 28 |2827 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2987 11:08:42.457001 3 3 0 |201f 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2988 11:08:42.460841 [Byte 0] Lead/lag falling Transition (3, 3, 0)
2989 11:08:42.467732 3 3 4 |3534 3d3d |(11 11)(10 10) |(0 1)(1 1)| 0
2990 11:08:42.471085 3 3 8 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2991 11:08:42.474066 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2992 11:08:42.477605 [Byte 1] Lead/lag falling Transition (3, 3, 12)
2993 11:08:42.484014 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2994 11:08:42.487404 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2995 11:08:42.490865 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2996 11:08:42.497306 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2997 11:08:42.500914 3 4 0 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
2998 11:08:42.504257 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2999 11:08:42.510499 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3000 11:08:42.514013 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3001 11:08:42.517551 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3002 11:08:42.524184 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3003 11:08:42.527596 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3004 11:08:42.531019 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3005 11:08:42.534171 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3006 11:08:42.540608 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3007 11:08:42.543979 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3008 11:08:42.547434 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3009 11:08:42.554316 [Byte 0] Lead/lag falling Transition (3, 5, 12)
3010 11:08:42.557202 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3011 11:08:42.560700 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3012 11:08:42.564062 [Byte 0] Lead/lag Transition tap number (3)
3013 11:08:42.571013 [Byte 1] Lead/lag falling Transition (3, 5, 20)
3014 11:08:42.574282 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3015 11:08:42.577882 3 5 28 |403 3e3d |(11 11)(11 11) |(0 0)(1 0)| 0
3016 11:08:42.580686 [Byte 1] Lead/lag Transition tap number (3)
3017 11:08:42.587819 3 6 0 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
3018 11:08:42.587896 [Byte 0]First pass (3, 6, 0)
3019 11:08:42.593987 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3020 11:08:42.594079 [Byte 1]First pass (3, 6, 4)
3021 11:08:42.600809 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3022 11:08:42.604513 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3023 11:08:42.607397 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3024 11:08:42.610936 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3025 11:08:42.614231 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3026 11:08:42.621131 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3027 11:08:42.624365 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3028 11:08:42.627872 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3029 11:08:42.631016 All bytes gating window > 1UI, Early break!
3030 11:08:42.631115
3031 11:08:42.634124 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 18)
3032 11:08:42.634199
3033 11:08:42.641085 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 26)
3034 11:08:42.641218
3035 11:08:42.641278
3036 11:08:42.641332
3037 11:08:42.644012 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 18)
3038 11:08:42.644131
3039 11:08:42.647438 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
3040 11:08:42.647535
3041 11:08:42.647620
3042 11:08:42.651065 Write Rank1 MR1 =0x56
3043 11:08:42.651153
3044 11:08:42.654214 best RODT dly(2T, 0.5T) = (2, 2)
3045 11:08:42.654301
3046 11:08:42.657397 best RODT dly(2T, 0.5T) = (2, 2)
3047 11:08:42.657472 ==
3048 11:08:42.660798 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3049 11:08:42.663865 fsp= 1, odt_onoff= 1, Byte mode= 0
3050 11:08:42.663965 ==
3051 11:08:42.670564 Start DQ dly to find pass range UseTestEngine =0
3052 11:08:42.673825 x-axis: bit #, y-axis: DQ dly (-127~63)
3053 11:08:42.673924 RX Vref Scan = 0
3054 11:08:42.677377 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3055 11:08:42.680996 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3056 11:08:42.684206 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3057 11:08:42.687179 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3058 11:08:42.687273 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3059 11:08:42.691212 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3060 11:08:42.694553 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3061 11:08:42.697498 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3062 11:08:42.700848 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3063 11:08:42.704051 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3064 11:08:42.707331 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3065 11:08:42.710473 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3066 11:08:42.710549 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3067 11:08:42.713774 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3068 11:08:42.717504 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3069 11:08:42.720829 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3070 11:08:42.724739 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3071 11:08:42.727703 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3072 11:08:42.730763 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3073 11:08:42.733857 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3074 11:08:42.733932 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3075 11:08:42.737178 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3076 11:08:42.740950 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3077 11:08:42.743956 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3078 11:08:42.747482 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3079 11:08:42.750333 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3080 11:08:42.754124 0, [0] xxxoxxxx xxxxxxxo [MSB]
3081 11:08:42.754199 1, [0] xxooxxxo xxxxxxxo [MSB]
3082 11:08:42.757686 2, [0] xxoooxxo xxxxxxxo [MSB]
3083 11:08:42.760842 3, [0] xxoooxxo ooooxooo [MSB]
3084 11:08:42.764107 4, [0] xxoooxxo oooooooo [MSB]
3085 11:08:42.767169 5, [0] xoooooxo oooooooo [MSB]
3086 11:08:42.767248 6, [0] xoooooxo oooooooo [MSB]
3087 11:08:42.770500 34, [0] oooxoooo oooooooo [MSB]
3088 11:08:42.773771 35, [0] ooxxoooo ooooooox [MSB]
3089 11:08:42.777288 36, [0] ooxxoooo ooooooox [MSB]
3090 11:08:42.780396 37, [0] ooxxxooo xoxoooox [MSB]
3091 11:08:42.784221 38, [0] ooxxxoox xxxoooox [MSB]
3092 11:08:42.787439 39, [0] ooxxxoox xxxxoxxx [MSB]
3093 11:08:42.787515 40, [0] ooxxxoox xxxxoxxx [MSB]
3094 11:08:42.790666 41, [0] ooxxxoox xxxxxxxx [MSB]
3095 11:08:42.794502 42, [0] xxxxxxxx xxxxxxxx [MSB]
3096 11:08:42.797646 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
3097 11:08:42.800981 iDelay=42, Bit 1, Center 23 (5 ~ 41) 37
3098 11:08:42.803961 iDelay=42, Bit 2, Center 17 (1 ~ 34) 34
3099 11:08:42.807282 iDelay=42, Bit 3, Center 15 (-2 ~ 33) 36
3100 11:08:42.814201 iDelay=42, Bit 4, Center 19 (2 ~ 36) 35
3101 11:08:42.817292 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3102 11:08:42.820497 iDelay=42, Bit 6, Center 24 (7 ~ 41) 35
3103 11:08:42.823783 iDelay=42, Bit 7, Center 19 (1 ~ 37) 37
3104 11:08:42.827424 iDelay=42, Bit 8, Center 19 (3 ~ 36) 34
3105 11:08:42.831093 iDelay=42, Bit 9, Center 20 (3 ~ 37) 35
3106 11:08:42.834411 iDelay=42, Bit 10, Center 19 (3 ~ 36) 34
3107 11:08:42.837802 iDelay=42, Bit 11, Center 20 (3 ~ 38) 36
3108 11:08:42.840498 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3109 11:08:42.844112 iDelay=42, Bit 13, Center 20 (3 ~ 38) 36
3110 11:08:42.847530 iDelay=42, Bit 14, Center 20 (3 ~ 38) 36
3111 11:08:42.850761 iDelay=42, Bit 15, Center 16 (-1 ~ 34) 36
3112 11:08:42.850836 ==
3113 11:08:42.857140 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3114 11:08:42.860524 fsp= 1, odt_onoff= 1, Byte mode= 0
3115 11:08:42.860599 ==
3116 11:08:42.860656 DQS Delay:
3117 11:08:42.864204 DQS0 = 0, DQS1 = 0
3118 11:08:42.864278 DQM Delay:
3119 11:08:42.867546 DQM0 = 20, DQM1 = 19
3120 11:08:42.867620 DQ Delay:
3121 11:08:42.870621 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
3122 11:08:42.874197 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
3123 11:08:42.877521 DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =20
3124 11:08:42.880504 DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =16
3125 11:08:42.880578
3126 11:08:42.880636
3127 11:08:42.880688 DramC Write-DBI off
3128 11:08:42.883950 ==
3129 11:08:42.887164 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3130 11:08:42.890511 fsp= 1, odt_onoff= 1, Byte mode= 0
3131 11:08:42.890587 ==
3132 11:08:42.894084 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3133 11:08:42.894158
3134 11:08:42.897024 Begin, DQ Scan Range 928~1184
3135 11:08:42.897121
3136 11:08:42.897226
3137 11:08:42.900465 TX Vref Scan disable
3138 11:08:42.903700 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3139 11:08:42.907646 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3140 11:08:42.910676 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3141 11:08:42.913713 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3142 11:08:42.917779 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3143 11:08:42.920433 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3144 11:08:42.923807 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3145 11:08:42.927167 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3146 11:08:42.930604 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3147 11:08:42.937289 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3148 11:08:42.940543 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3149 11:08:42.943859 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3150 11:08:42.946895 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3151 11:08:42.950624 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3152 11:08:42.953691 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3153 11:08:42.957180 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3154 11:08:42.960920 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3155 11:08:42.963692 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3156 11:08:42.967252 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3157 11:08:42.970398 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3158 11:08:42.973748 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3159 11:08:42.977152 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3160 11:08:42.980541 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3161 11:08:42.983584 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3162 11:08:42.987421 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3163 11:08:42.993793 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3164 11:08:42.997414 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3165 11:08:43.000640 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3166 11:08:43.003757 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3167 11:08:43.007547 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3168 11:08:43.010243 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3169 11:08:43.013889 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3170 11:08:43.016931 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3171 11:08:43.020537 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3172 11:08:43.023563 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3173 11:08:43.027081 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3174 11:08:43.030155 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3175 11:08:43.033895 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3176 11:08:43.036833 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3177 11:08:43.040936 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3178 11:08:43.043442 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3179 11:08:43.046765 969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]
3180 11:08:43.050162 970 |3 6 10|[0] xxxxxxxx oooxoxoo [MSB]
3181 11:08:43.054222 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3182 11:08:43.056985 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3183 11:08:43.060467 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
3184 11:08:43.067290 974 |3 6 14|[0] xxooxxxx oooooooo [MSB]
3185 11:08:43.070503 975 |3 6 15|[0] xxoooxxx oooooooo [MSB]
3186 11:08:43.073547 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
3187 11:08:43.077429 990 |3 6 30|[0] oooooooo ooooooox [MSB]
3188 11:08:43.080532 991 |3 6 31|[0] oooooooo ooooooox [MSB]
3189 11:08:43.083882 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3190 11:08:43.090235 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3191 11:08:43.093663 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3192 11:08:43.096874 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]
3193 11:08:43.100537 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
3194 11:08:43.103501 997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB]
3195 11:08:43.106818 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
3196 11:08:43.110229 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3197 11:08:43.113508 Byte0, DQ PI dly=985, DQM PI dly= 985
3198 11:08:43.117281 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
3199 11:08:43.117357
3200 11:08:43.123656 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
3201 11:08:43.123771
3202 11:08:43.127441 Byte1, DQ PI dly=979, DQM PI dly= 979
3203 11:08:43.130046 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
3204 11:08:43.130122
3205 11:08:43.133289 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
3206 11:08:43.133365
3207 11:08:43.133423 ==
3208 11:08:43.140070 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3209 11:08:43.143656 fsp= 1, odt_onoff= 1, Byte mode= 0
3210 11:08:43.143746 ==
3211 11:08:43.146737 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3212 11:08:43.146812
3213 11:08:43.150504 Begin, DQ Scan Range 955~1019
3214 11:08:43.153663 Write Rank1 MR14 =0x0
3215 11:08:43.160976
3216 11:08:43.161050 CH=1, VrefRange= 0, VrefLevel = 0
3217 11:08:43.167779 TX Bit0 (979~998) 20 988, Bit8 (972~987) 16 979,
3218 11:08:43.170903 TX Bit1 (978~995) 18 986, Bit9 (971~987) 17 979,
3219 11:08:43.177451 TX Bit2 (976~991) 16 983, Bit10 (973~987) 15 980,
3220 11:08:43.181279 TX Bit3 (974~990) 17 982, Bit11 (974~991) 18 982,
3221 11:08:43.184260 TX Bit4 (977~992) 16 984, Bit12 (973~989) 17 981,
3222 11:08:43.190923 TX Bit5 (978~997) 20 987, Bit13 (975~988) 14 981,
3223 11:08:43.194261 TX Bit6 (978~997) 20 987, Bit14 (973~988) 16 980,
3224 11:08:43.197471 TX Bit7 (977~992) 16 984, Bit15 (968~985) 18 976,
3225 11:08:43.197546
3226 11:08:43.200815 Write Rank1 MR14 =0x2
3227 11:08:43.210087
3228 11:08:43.210193 CH=1, VrefRange= 0, VrefLevel = 2
3229 11:08:43.216622 TX Bit0 (978~998) 21 988, Bit8 (971~988) 18 979,
3230 11:08:43.219615 TX Bit1 (978~996) 19 987, Bit9 (970~987) 18 978,
3231 11:08:43.226304 TX Bit2 (976~991) 16 983, Bit10 (972~987) 16 979,
3232 11:08:43.229739 TX Bit3 (974~990) 17 982, Bit11 (974~991) 18 982,
3233 11:08:43.232969 TX Bit4 (976~993) 18 984, Bit12 (972~989) 18 980,
3234 11:08:43.240053 TX Bit5 (978~997) 20 987, Bit13 (975~988) 14 981,
3235 11:08:43.243244 TX Bit6 (978~998) 21 988, Bit14 (972~989) 18 980,
3236 11:08:43.246365 TX Bit7 (977~992) 16 984, Bit15 (968~986) 19 977,
3237 11:08:43.246441
3238 11:08:43.250124 Write Rank1 MR14 =0x4
3239 11:08:43.258827
3240 11:08:43.258906 CH=1, VrefRange= 0, VrefLevel = 4
3241 11:08:43.265589 TX Bit0 (979~998) 20 988, Bit8 (970~988) 19 979,
3242 11:08:43.268819 TX Bit1 (978~997) 20 987, Bit9 (970~988) 19 979,
3243 11:08:43.275817 TX Bit2 (975~992) 18 983, Bit10 (972~989) 18 980,
3244 11:08:43.278833 TX Bit3 (974~991) 18 982, Bit11 (973~991) 19 982,
3245 11:08:43.282162 TX Bit4 (976~993) 18 984, Bit12 (972~990) 19 981,
3246 11:08:43.288759 TX Bit5 (978~997) 20 987, Bit13 (974~989) 16 981,
3247 11:08:43.291942 TX Bit6 (978~998) 21 988, Bit14 (973~990) 18 981,
3248 11:08:43.295462 TX Bit7 (977~993) 17 985, Bit15 (968~986) 19 977,
3249 11:08:43.295580
3250 11:08:43.298679 Write Rank1 MR14 =0x6
3251 11:08:43.307182
3252 11:08:43.307257 CH=1, VrefRange= 0, VrefLevel = 6
3253 11:08:43.313997 TX Bit0 (978~998) 21 988, Bit8 (971~989) 19 980,
3254 11:08:43.317630 TX Bit1 (978~997) 20 987, Bit9 (970~989) 20 979,
3255 11:08:43.323894 TX Bit2 (975~992) 18 983, Bit10 (971~990) 20 980,
3256 11:08:43.327706 TX Bit3 (974~992) 19 983, Bit11 (973~991) 19 982,
3257 11:08:43.330793 TX Bit4 (976~994) 19 985, Bit12 (972~991) 20 981,
3258 11:08:43.337278 TX Bit5 (978~997) 20 987, Bit13 (974~990) 17 982,
3259 11:08:43.340407 TX Bit6 (978~998) 21 988, Bit14 (972~991) 20 981,
3260 11:08:43.344358 TX Bit7 (977~993) 17 985, Bit15 (968~986) 19 977,
3261 11:08:43.344433
3262 11:08:43.350872 wait MRW command Rank1 MR14 =0x8 fired (1)
3263 11:08:43.350952 Write Rank1 MR14 =0x8
3264 11:08:43.359952
3265 11:08:43.360049 CH=1, VrefRange= 0, VrefLevel = 8
3266 11:08:43.367044 TX Bit0 (978~999) 22 988, Bit8 (970~989) 20 979,
3267 11:08:43.370139 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
3268 11:08:43.376942 TX Bit2 (975~993) 19 984, Bit10 (971~990) 20 980,
3269 11:08:43.380318 TX Bit3 (973~991) 19 982, Bit11 (972~992) 21 982,
3270 11:08:43.383731 TX Bit4 (976~995) 20 985, Bit12 (971~991) 21 981,
3271 11:08:43.390340 TX Bit5 (977~998) 22 987, Bit13 (974~990) 17 982,
3272 11:08:43.393551 TX Bit6 (977~999) 23 988, Bit14 (972~991) 20 981,
3273 11:08:43.396635 TX Bit7 (977~994) 18 985, Bit15 (968~987) 20 977,
3274 11:08:43.396710
3275 11:08:43.399924 Write Rank1 MR14 =0xa
3276 11:08:43.409291
3277 11:08:43.412767 CH=1, VrefRange= 0, VrefLevel = 10
3278 11:08:43.415741 TX Bit0 (978~999) 22 988, Bit8 (970~991) 22 980,
3279 11:08:43.419354 TX Bit1 (977~998) 22 987, Bit9 (969~989) 21 979,
3280 11:08:43.426057 TX Bit2 (974~993) 20 983, Bit10 (970~991) 22 980,
3281 11:08:43.429247 TX Bit3 (973~992) 20 982, Bit11 (972~992) 21 982,
3282 11:08:43.432685 TX Bit4 (976~995) 20 985, Bit12 (971~992) 22 981,
3283 11:08:43.439337 TX Bit5 (977~998) 22 987, Bit13 (972~991) 20 981,
3284 11:08:43.442428 TX Bit6 (978~999) 22 988, Bit14 (971~991) 21 981,
3285 11:08:43.446337 TX Bit7 (976~994) 19 985, Bit15 (967~987) 21 977,
3286 11:08:43.446426
3287 11:08:43.449096 Write Rank1 MR14 =0xc
3288 11:08:43.458489
3289 11:08:43.461848 CH=1, VrefRange= 0, VrefLevel = 12
3290 11:08:43.465586 TX Bit0 (978~1000) 23 989, Bit8 (970~991) 22 980,
3291 11:08:43.468829 TX Bit1 (977~998) 22 987, Bit9 (969~991) 23 980,
3292 11:08:43.475056 TX Bit2 (975~994) 20 984, Bit10 (970~991) 22 980,
3293 11:08:43.478361 TX Bit3 (972~993) 22 982, Bit11 (971~992) 22 981,
3294 11:08:43.482257 TX Bit4 (975~996) 22 985, Bit12 (971~992) 22 981,
3295 11:08:43.488325 TX Bit5 (977~999) 23 988, Bit13 (972~991) 20 981,
3296 11:08:43.491757 TX Bit6 (977~999) 23 988, Bit14 (971~991) 21 981,
3297 11:08:43.494907 TX Bit7 (977~995) 19 986, Bit15 (967~988) 22 977,
3298 11:08:43.498365
3299 11:08:43.498466 Write Rank1 MR14 =0xe
3300 11:08:43.507842
3301 11:08:43.510688 CH=1, VrefRange= 0, VrefLevel = 14
3302 11:08:43.514262 TX Bit0 (977~1000) 24 988, Bit8 (970~991) 22 980,
3303 11:08:43.517441 TX Bit1 (977~998) 22 987, Bit9 (969~991) 23 980,
3304 11:08:43.524231 TX Bit2 (974~994) 21 984, Bit10 (970~991) 22 980,
3305 11:08:43.527464 TX Bit3 (972~993) 22 982, Bit11 (971~993) 23 982,
3306 11:08:43.530658 TX Bit4 (975~997) 23 986, Bit12 (971~992) 22 981,
3307 11:08:43.537856 TX Bit5 (977~999) 23 988, Bit13 (971~992) 22 981,
3308 11:08:43.540732 TX Bit6 (977~999) 23 988, Bit14 (971~991) 21 981,
3309 11:08:43.544561 TX Bit7 (976~995) 20 985, Bit15 (967~988) 22 977,
3310 11:08:43.544643
3311 11:08:43.547926 Write Rank1 MR14 =0x10
3312 11:08:43.557213
3313 11:08:43.560254 CH=1, VrefRange= 0, VrefLevel = 16
3314 11:08:43.563497 TX Bit0 (977~1000) 24 988, Bit8 (969~991) 23 980,
3315 11:08:43.566710 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
3316 11:08:43.573612 TX Bit2 (974~995) 22 984, Bit10 (970~991) 22 980,
3317 11:08:43.576916 TX Bit3 (971~994) 24 982, Bit11 (970~993) 24 981,
3318 11:08:43.580305 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3319 11:08:43.586842 TX Bit5 (977~999) 23 988, Bit13 (972~992) 21 982,
3320 11:08:43.590609 TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981,
3321 11:08:43.593676 TX Bit7 (976~996) 21 986, Bit15 (967~988) 22 977,
3322 11:08:43.596899
3323 11:08:43.596978 Write Rank1 MR14 =0x12
3324 11:08:43.606709
3325 11:08:43.610318 CH=1, VrefRange= 0, VrefLevel = 18
3326 11:08:43.613069 TX Bit0 (977~1001) 25 989, Bit8 (969~992) 24 980,
3327 11:08:43.616555 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
3328 11:08:43.623196 TX Bit2 (973~995) 23 984, Bit10 (969~992) 24 980,
3329 11:08:43.627364 TX Bit3 (971~994) 24 982, Bit11 (970~993) 24 981,
3330 11:08:43.630286 TX Bit4 (974~997) 24 985, Bit12 (970~992) 23 981,
3331 11:08:43.637041 TX Bit5 (977~999) 23 988, Bit13 (970~992) 23 981,
3332 11:08:43.640408 TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981,
3333 11:08:43.643126 TX Bit7 (976~997) 22 986, Bit15 (967~989) 23 978,
3334 11:08:43.643201
3335 11:08:43.646509 Write Rank1 MR14 =0x14
3336 11:08:43.656509
3337 11:08:43.659403 CH=1, VrefRange= 0, VrefLevel = 20
3338 11:08:43.662991 TX Bit0 (977~1001) 25 989, Bit8 (969~992) 24 980,
3339 11:08:43.666166 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
3340 11:08:43.672695 TX Bit2 (973~996) 24 984, Bit10 (969~992) 24 980,
3341 11:08:43.676340 TX Bit3 (970~995) 26 982, Bit11 (970~994) 25 982,
3342 11:08:43.679534 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3343 11:08:43.686568 TX Bit5 (977~999) 23 988, Bit13 (970~992) 23 981,
3344 11:08:43.689423 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3345 11:08:43.692590 TX Bit7 (975~997) 23 986, Bit15 (967~990) 24 978,
3346 11:08:43.696024
3347 11:08:43.696099 Write Rank1 MR14 =0x16
3348 11:08:43.706005
3349 11:08:43.709587 CH=1, VrefRange= 0, VrefLevel = 22
3350 11:08:43.712613 TX Bit0 (977~1001) 25 989, Bit8 (969~992) 24 980,
3351 11:08:43.715703 TX Bit1 (976~1000) 25 988, Bit9 (968~992) 25 980,
3352 11:08:43.722546 TX Bit2 (972~996) 25 984, Bit10 (969~992) 24 980,
3353 11:08:43.725838 TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981,
3354 11:08:43.729352 TX Bit4 (974~998) 25 986, Bit12 (970~993) 24 981,
3355 11:08:43.735684 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3356 11:08:43.739333 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3357 11:08:43.745595 TX Bit7 (975~997) 23 986, Bit15 (967~990) 24 978,
3358 11:08:43.745699
3359 11:08:43.745784 Write Rank1 MR14 =0x18
3360 11:08:43.755635
3361 11:08:43.759142 CH=1, VrefRange= 0, VrefLevel = 24
3362 11:08:43.762162 TX Bit0 (977~1002) 26 989, Bit8 (969~992) 24 980,
3363 11:08:43.766202 TX Bit1 (976~1000) 25 988, Bit9 (969~991) 23 980,
3364 11:08:43.772694 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3365 11:08:43.775535 TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981,
3366 11:08:43.779017 TX Bit4 (973~998) 26 985, Bit12 (969~993) 25 981,
3367 11:08:43.785674 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3368 11:08:43.789092 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3369 11:08:43.795540 TX Bit7 (975~998) 24 986, Bit15 (967~990) 24 978,
3370 11:08:43.795615
3371 11:08:43.795673 Write Rank1 MR14 =0x1a
3372 11:08:43.805629
3373 11:08:43.809157 CH=1, VrefRange= 0, VrefLevel = 26
3374 11:08:43.812370 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
3375 11:08:43.815693 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3376 11:08:43.822503 TX Bit2 (971~997) 27 984, Bit10 (969~991) 23 980,
3377 11:08:43.825564 TX Bit3 (970~994) 25 982, Bit11 (970~993) 24 981,
3378 11:08:43.829113 TX Bit4 (973~998) 26 985, Bit12 (970~993) 24 981,
3379 11:08:43.835983 TX Bit5 (976~1000) 25 988, Bit13 (969~992) 24 980,
3380 11:08:43.838929 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3381 11:08:43.842390 TX Bit7 (974~998) 25 986, Bit15 (967~990) 24 978,
3382 11:08:43.845867
3383 11:08:43.845989 Write Rank1 MR14 =0x1c
3384 11:08:43.855872
3385 11:08:43.858956 CH=1, VrefRange= 0, VrefLevel = 28
3386 11:08:43.862631 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
3387 11:08:43.866011 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3388 11:08:43.872382 TX Bit2 (971~997) 27 984, Bit10 (969~991) 23 980,
3389 11:08:43.875383 TX Bit3 (970~994) 25 982, Bit11 (970~993) 24 981,
3390 11:08:43.878877 TX Bit4 (973~998) 26 985, Bit12 (970~993) 24 981,
3391 11:08:43.885933 TX Bit5 (976~1000) 25 988, Bit13 (969~992) 24 980,
3392 11:08:43.889231 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3393 11:08:43.892083 TX Bit7 (974~998) 25 986, Bit15 (967~990) 24 978,
3394 11:08:43.895720
3395 11:08:43.895796 Write Rank1 MR14 =0x1e
3396 11:08:43.905418
3397 11:08:43.908980 CH=1, VrefRange= 0, VrefLevel = 30
3398 11:08:43.912161 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
3399 11:08:43.915443 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3400 11:08:43.922341 TX Bit2 (971~997) 27 984, Bit10 (969~991) 23 980,
3401 11:08:43.925511 TX Bit3 (970~994) 25 982, Bit11 (970~993) 24 981,
3402 11:08:43.928788 TX Bit4 (973~998) 26 985, Bit12 (970~993) 24 981,
3403 11:08:43.935511 TX Bit5 (976~1000) 25 988, Bit13 (969~992) 24 980,
3404 11:08:43.938499 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3405 11:08:43.945243 TX Bit7 (974~998) 25 986, Bit15 (967~990) 24 978,
3406 11:08:43.945337
3407 11:08:43.945421 Write Rank1 MR14 =0x20
3408 11:08:43.955484
3409 11:08:43.958493 CH=1, VrefRange= 0, VrefLevel = 32
3410 11:08:43.961942 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
3411 11:08:43.965121 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3412 11:08:43.971950 TX Bit2 (971~997) 27 984, Bit10 (969~991) 23 980,
3413 11:08:43.975445 TX Bit3 (970~994) 25 982, Bit11 (970~993) 24 981,
3414 11:08:43.978832 TX Bit4 (973~998) 26 985, Bit12 (970~993) 24 981,
3415 11:08:43.985295 TX Bit5 (976~1000) 25 988, Bit13 (969~992) 24 980,
3416 11:08:43.988966 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3417 11:08:43.992239 TX Bit7 (974~998) 25 986, Bit15 (967~990) 24 978,
3418 11:08:43.995414
3419 11:08:43.995504
3420 11:08:43.998662 TX Vref found, early break! 364< 375
3421 11:08:44.002020 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3422 11:08:44.005155 u1DelayCellOfst[0]=8 cells (7 PI)
3423 11:08:44.008604 u1DelayCellOfst[1]=7 cells (6 PI)
3424 11:08:44.012429 u1DelayCellOfst[2]=2 cells (2 PI)
3425 11:08:44.015277 u1DelayCellOfst[3]=0 cells (0 PI)
3426 11:08:44.018589 u1DelayCellOfst[4]=3 cells (3 PI)
3427 11:08:44.018690 u1DelayCellOfst[5]=7 cells (6 PI)
3428 11:08:44.022228 u1DelayCellOfst[6]=7 cells (6 PI)
3429 11:08:44.025049 u1DelayCellOfst[7]=5 cells (4 PI)
3430 11:08:44.028709 Byte0, DQ PI dly=982, DQM PI dly= 985
3431 11:08:44.035460 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3432 11:08:44.035554
3433 11:08:44.038837 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3434 11:08:44.038925
3435 11:08:44.042056 u1DelayCellOfst[8]=2 cells (2 PI)
3436 11:08:44.045005 u1DelayCellOfst[9]=1 cells (1 PI)
3437 11:08:44.048202 u1DelayCellOfst[10]=2 cells (2 PI)
3438 11:08:44.051524 u1DelayCellOfst[11]=3 cells (3 PI)
3439 11:08:44.054818 u1DelayCellOfst[12]=3 cells (3 PI)
3440 11:08:44.058342 u1DelayCellOfst[13]=2 cells (2 PI)
3441 11:08:44.058421 u1DelayCellOfst[14]=2 cells (2 PI)
3442 11:08:44.061857 u1DelayCellOfst[15]=0 cells (0 PI)
3443 11:08:44.064978 Byte1, DQ PI dly=978, DQM PI dly= 979
3444 11:08:44.071906 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3445 11:08:44.071982
3446 11:08:44.075797 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3447 11:08:44.075873
3448 11:08:44.078910 Write Rank1 MR14 =0x1a
3449 11:08:44.078986
3450 11:08:44.079045 Final TX Range 0 Vref 26
3451 11:08:44.079100
3452 11:08:44.085067 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3453 11:08:44.085152
3454 11:08:44.091656 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3455 11:08:44.101248 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3456 11:08:44.108018 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3457 11:08:44.108095 Write Rank1 MR3 =0xb0
3458 11:08:44.111814 DramC Write-DBI on
3459 11:08:44.111890 ==
3460 11:08:44.115008 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3461 11:08:44.118089 fsp= 1, odt_onoff= 1, Byte mode= 0
3462 11:08:44.118165 ==
3463 11:08:44.124690 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3464 11:08:44.124765
3465 11:08:44.128345 Begin, DQ Scan Range 699~763
3466 11:08:44.128419
3467 11:08:44.128477
3468 11:08:44.128530 TX Vref Scan disable
3469 11:08:44.131726 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3470 11:08:44.135116 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3471 11:08:44.138291 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3472 11:08:44.141690 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3473 11:08:44.145043 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3474 11:08:44.148459 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3475 11:08:44.155006 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3476 11:08:44.158229 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3477 11:08:44.161899 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3478 11:08:44.165123 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3479 11:08:44.168303 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3480 11:08:44.171757 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3481 11:08:44.174941 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3482 11:08:44.178819 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3483 11:08:44.181814 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3484 11:08:44.185057 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3485 11:08:44.188433 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3486 11:08:44.191600 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3487 11:08:44.195320 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3488 11:08:44.203402 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3489 11:08:44.206463 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3490 11:08:44.209894 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3491 11:08:44.212930 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3492 11:08:44.216444 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3493 11:08:44.219702 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3494 11:08:44.222892 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3495 11:08:44.226782 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
3496 11:08:44.229517 Byte0, DQ PI dly=730, DQM PI dly= 730
3497 11:08:44.233077 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
3498 11:08:44.233190
3499 11:08:44.239848 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
3500 11:08:44.239923
3501 11:08:44.243032 Byte1, DQ PI dly=723, DQM PI dly= 723
3502 11:08:44.246681 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3503 11:08:44.246756
3504 11:08:44.250227 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3505 11:08:44.250301
3506 11:08:44.256306 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3507 11:08:44.262973 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3508 11:08:44.270052 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3509 11:08:44.273089 Write Rank1 MR3 =0x30
3510 11:08:44.276231 DramC Write-DBI off
3511 11:08:44.276309
3512 11:08:44.276365 [DATLAT]
3513 11:08:44.280541 Freq=1600, CH1 RK1, use_rxtx_scan=0
3514 11:08:44.280623
3515 11:08:44.283022 DATLAT Default: 0x10
3516 11:08:44.283096 7, 0xFFFF, sum=0
3517 11:08:44.286105 8, 0xFFFF, sum=0
3518 11:08:44.286180 9, 0xFFFF, sum=0
3519 11:08:44.286240 10, 0xFFFF, sum=0
3520 11:08:44.290041 11, 0xFFFF, sum=0
3521 11:08:44.290117 12, 0xFFFF, sum=0
3522 11:08:44.293017 13, 0xFFFF, sum=0
3523 11:08:44.293093 14, 0x0, sum=1
3524 11:08:44.296726 15, 0x0, sum=2
3525 11:08:44.296802 16, 0x0, sum=3
3526 11:08:44.299970 17, 0x0, sum=4
3527 11:08:44.302919 pattern=2 first_step=14 total pass=5 best_step=16
3528 11:08:44.302993 ==
3529 11:08:44.306134 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3530 11:08:44.309923 fsp= 1, odt_onoff= 1, Byte mode= 0
3531 11:08:44.312825 ==
3532 11:08:44.316379 Start DQ dly to find pass range UseTestEngine =1
3533 11:08:44.319750 x-axis: bit #, y-axis: DQ dly (-127~63)
3534 11:08:44.319824 RX Vref Scan = 0
3535 11:08:44.322926 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3536 11:08:44.326259 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3537 11:08:44.329765 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3538 11:08:44.332901 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3539 11:08:44.336068 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3540 11:08:44.339316 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3541 11:08:44.343484 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3542 11:08:44.343559 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3543 11:08:44.345884 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3544 11:08:44.349222 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3545 11:08:44.352846 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3546 11:08:44.356656 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3547 11:08:44.359673 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3548 11:08:44.363270 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3549 11:08:44.366039 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3550 11:08:44.366117 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3551 11:08:44.369610 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3552 11:08:44.372591 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3553 11:08:44.376317 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3554 11:08:44.379506 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3555 11:08:44.383066 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3556 11:08:44.386055 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3557 11:08:44.389556 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3558 11:08:44.389632 -3, [0] xxxoxxxx xxxxxxxx [MSB]
3559 11:08:44.392861 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3560 11:08:44.396300 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3561 11:08:44.399430 0, [0] xxooxxxx xxxxxxxo [MSB]
3562 11:08:44.402813 1, [0] xxoooxxo xxxxxxxo [MSB]
3563 11:08:44.406499 2, [0] xxoooxxo ooxxxxxo [MSB]
3564 11:08:44.406615 3, [0] xxoooxxo ooooxooo [MSB]
3565 11:08:44.409744 4, [0] xxoooxxo oooooooo [MSB]
3566 11:08:44.412910 5, [0] xoooooxo oooooooo [MSB]
3567 11:08:44.415930 6, [0] xoooooxo oooooooo [MSB]
3568 11:08:44.419267 34, [0] oooxoooo oooooooo [MSB]
3569 11:08:44.422638 35, [0] oooxoooo ooooooox [MSB]
3570 11:08:44.426185 36, [0] ooxxoooo ooooooox [MSB]
3571 11:08:44.429420 37, [0] ooxxxoox ooxooxxx [MSB]
3572 11:08:44.432705 38, [0] ooxxxoox xxxooxxx [MSB]
3573 11:08:44.435954 39, [0] ooxxxoox xxxxoxxx [MSB]
3574 11:08:44.436043 40, [0] ooxxxoox xxxxxxxx [MSB]
3575 11:08:44.439325 41, [0] oxxxxoox xxxxxxxx [MSB]
3576 11:08:44.442648 42, [0] oxxxxxox xxxxxxxx [MSB]
3577 11:08:44.446059 43, [0] xxxxxxxx xxxxxxxx [MSB]
3578 11:08:44.449382 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3579 11:08:44.452869 iDelay=43, Bit 1, Center 22 (5 ~ 40) 36
3580 11:08:44.456059 iDelay=43, Bit 2, Center 17 (0 ~ 35) 36
3581 11:08:44.459390 iDelay=43, Bit 3, Center 15 (-3 ~ 33) 37
3582 11:08:44.462899 iDelay=43, Bit 4, Center 18 (1 ~ 36) 36
3583 11:08:44.466038 iDelay=43, Bit 5, Center 23 (5 ~ 41) 37
3584 11:08:44.469371 iDelay=43, Bit 6, Center 24 (7 ~ 42) 36
3585 11:08:44.476027 iDelay=43, Bit 7, Center 18 (1 ~ 36) 36
3586 11:08:44.479239 iDelay=43, Bit 8, Center 19 (2 ~ 37) 36
3587 11:08:44.482687 iDelay=43, Bit 9, Center 19 (2 ~ 37) 36
3588 11:08:44.485989 iDelay=43, Bit 10, Center 19 (3 ~ 36) 34
3589 11:08:44.489291 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
3590 11:08:44.492550 iDelay=43, Bit 12, Center 21 (4 ~ 39) 36
3591 11:08:44.496023 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
3592 11:08:44.499793 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
3593 11:08:44.502984 iDelay=43, Bit 15, Center 17 (0 ~ 34) 35
3594 11:08:44.503059 ==
3595 11:08:44.509468 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3596 11:08:44.512865 fsp= 1, odt_onoff= 1, Byte mode= 0
3597 11:08:44.512940 ==
3598 11:08:44.512998 DQS Delay:
3599 11:08:44.516415 DQS0 = 0, DQS1 = 0
3600 11:08:44.516490 DQM Delay:
3601 11:08:44.516548 DQM0 = 20, DQM1 = 19
3602 11:08:44.519619 DQ Delay:
3603 11:08:44.522981 DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15
3604 11:08:44.526484 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =18
3605 11:08:44.529560 DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =20
3606 11:08:44.533276 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
3607 11:08:44.533351
3608 11:08:44.533409
3609 11:08:44.533462
3610 11:08:44.536145 [DramC_TX_OE_Calibration] TA2
3611 11:08:44.536220 Original DQ_B0 (3 6) =30, OEN = 27
3612 11:08:44.539587 Original DQ_B1 (3 6) =30, OEN = 27
3613 11:08:44.542890 23, 0x0, End_B0=23 End_B1=23
3614 11:08:44.546416 24, 0x0, End_B0=24 End_B1=24
3615 11:08:44.549687 25, 0x0, End_B0=25 End_B1=25
3616 11:08:44.549789 26, 0x0, End_B0=26 End_B1=26
3617 11:08:44.553285 27, 0x0, End_B0=27 End_B1=27
3618 11:08:44.556369 28, 0x0, End_B0=28 End_B1=28
3619 11:08:44.559657 29, 0x0, End_B0=29 End_B1=29
3620 11:08:44.562898 30, 0x0, End_B0=30 End_B1=30
3621 11:08:44.562974 31, 0xFFFF, End_B0=30 End_B1=30
3622 11:08:44.569773 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3623 11:08:44.576455 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3624 11:08:44.576530
3625 11:08:44.576587
3626 11:08:44.576640 Write Rank1 MR23 =0x3f
3627 11:08:44.579570 [DQSOSC]
3628 11:08:44.586529 [DQSOSCAuto] RK1, (LSB)MR18= 0xb1, (MSB)MR19= 0x3, tDQSOscB0 = 333 ps tDQSOscB1 = 0 ps
3629 11:08:44.593022 CH1_RK1: MR19=0x3, MR18=0xB1, DQSOSC=333, MR23=63, INC=22, DEC=33
3630 11:08:44.593098 Write Rank1 MR23 =0x3f
3631 11:08:44.596753 [DQSOSC]
3632 11:08:44.603234 [DQSOSCAuto] RK1, (LSB)MR18= 0xb4, (MSB)MR19= 0x3, tDQSOscB0 = 332 ps tDQSOscB1 = 0 ps
3633 11:08:44.606411 CH1 RK1: MR19=3, MR18=B4
3634 11:08:44.606486 [RxdqsGatingPostProcess] freq 1600
3635 11:08:44.612905 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3636 11:08:44.612997 Rank: 0
3637 11:08:44.616440 best DQS0 dly(2T, 0.5T) = (2, 5)
3638 11:08:44.619800 best DQS1 dly(2T, 0.5T) = (2, 5)
3639 11:08:44.623849 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3640 11:08:44.626786 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3641 11:08:44.626875 Rank: 1
3642 11:08:44.629667 best DQS0 dly(2T, 0.5T) = (2, 5)
3643 11:08:44.633054 best DQS1 dly(2T, 0.5T) = (2, 5)
3644 11:08:44.637019 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3645 11:08:44.639918 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3646 11:08:44.643193 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3647 11:08:44.646772 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3648 11:08:44.653296 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3649 11:08:44.653372
3650 11:08:44.653485
3651 11:08:44.656777 [Calibration Summary] Freqency 1600
3652 11:08:44.656852 CH 0, Rank 0
3653 11:08:44.656924 All Pass.
3654 11:08:44.660676
3655 11:08:44.660750 CH 0, Rank 1
3656 11:08:44.660811 All Pass.
3657 11:08:44.660882
3658 11:08:44.664640 CH 1, Rank 0
3659 11:08:44.664731 All Pass.
3660 11:08:44.664822
3661 11:08:44.664886 CH 1, Rank 1
3662 11:08:44.666523 All Pass.
3663 11:08:44.666598
3664 11:08:44.670183 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3665 11:08:44.680247 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3666 11:08:44.686621 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3667 11:08:44.686696 Write Rank0 MR3 =0xb0
3668 11:08:44.693272 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3669 11:08:44.699760 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3670 11:08:44.710031 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3671 11:08:44.710108 Write Rank1 MR3 =0xb0
3672 11:08:44.716695 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3673 11:08:44.723229 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3674 11:08:44.729897 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3675 11:08:44.733101 Write Rank0 MR3 =0xb0
3676 11:08:44.739785 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3677 11:08:44.746317 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3678 11:08:44.753504 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3679 11:08:44.756542 Write Rank1 MR3 =0xb0
3680 11:08:44.756650 DramC Write-DBI on
3681 11:08:44.759941 [GetDramInforAfterCalByMRR] Vendor 1.
3682 11:08:44.763274 [GetDramInforAfterCalByMRR] Revision 7.
3683 11:08:44.763345 MR8 12
3684 11:08:44.770120 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3685 11:08:44.770196 MR8 12
3686 11:08:44.776843 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3687 11:08:44.776944 MR8 12
3688 11:08:44.779814 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3689 11:08:44.779919 MR8 12
3690 11:08:44.786642 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3691 11:08:44.793490 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3692 11:08:44.796793 Write Rank0 MR13 =0xd0
3693 11:08:44.800296 Write Rank1 MR13 =0xd0
3694 11:08:44.800368 Write Rank0 MR13 =0xd0
3695 11:08:44.803582 Write Rank1 MR13 =0xd0
3696 11:08:44.807436 Save calibration result to emmc
3697 11:08:44.807498
3698 11:08:44.807552
3699 11:08:44.810174 [DramcModeReg_Check] Freq_1600, FSP_1
3700 11:08:44.810236 FSP_1, CH_0, RK0
3701 11:08:44.813384 Write Rank0 MR13 =0xd8
3702 11:08:44.816524 MR12 = 0x56 (global = 0x56) match
3703 11:08:44.819875 MR14 = 0x18 (global = 0x18) match
3704 11:08:44.819967 FSP_1, CH_0, RK1
3705 11:08:44.823575 Write Rank1 MR13 =0xd8
3706 11:08:44.826404 MR12 = 0x56 (global = 0x56) match
3707 11:08:44.829989 MR14 = 0x16 (global = 0x16) match
3708 11:08:44.830057 FSP_1, CH_1, RK0
3709 11:08:44.833347 Write Rank0 MR13 =0xd8
3710 11:08:44.836751 MR12 = 0x56 (global = 0x56) match
3711 11:08:44.840243 MR14 = 0x18 (global = 0x18) match
3712 11:08:44.840340 FSP_1, CH_1, RK1
3713 11:08:44.843105 Write Rank1 MR13 =0xd8
3714 11:08:44.846539 MR12 = 0x58 (global = 0x58) match
3715 11:08:44.849965 MR14 = 0x1a (global = 0x1a) match
3716 11:08:44.850037
3717 11:08:44.853243 [MEM_TEST] 02: After DFS, before run time config
3718 11:08:44.864900 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3719 11:08:44.864979
3720 11:08:44.865074 [TA2_TEST]
3721 11:08:44.865174 === TA2 HW
3722 11:08:44.868425 TA2 PAT: XTALK
3723 11:08:44.871839 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3724 11:08:44.878360 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3725 11:08:44.881905 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3726 11:08:44.885254 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3727 11:08:44.888154
3728 11:08:44.888254
3729 11:08:44.888341 Settings after calibration
3730 11:08:44.888424
3731 11:08:44.891658 [DramcRunTimeConfig]
3732 11:08:44.894780 TransferPLLToSPMControl - MODE SW PHYPLL
3733 11:08:44.894857 TX_TRACKING: ON
3734 11:08:44.898275 RX_TRACKING: ON
3735 11:08:44.898351 HW_GATING: ON
3736 11:08:44.901558 HW_GATING DBG: OFF
3737 11:08:44.901634 ddr_geometry:1
3738 11:08:44.904737 ddr_geometry:1
3739 11:08:44.904813 ddr_geometry:1
3740 11:08:44.904872 ddr_geometry:1
3741 11:08:44.908206 ddr_geometry:1
3742 11:08:44.908284 ddr_geometry:1
3743 11:08:44.911793 ddr_geometry:1
3744 11:08:44.911871 ddr_geometry:1
3745 11:08:44.915057 High Freq DUMMY_READ_FOR_TRACKING: ON
3746 11:08:44.918757 ZQCS_ENABLE_LP4: OFF
3747 11:08:44.921567 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3748 11:08:44.925484 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3749 11:08:44.925559 SPM_CONTROL_AFTERK: ON
3750 11:08:44.928311 IMPEDANCE_TRACKING: ON
3751 11:08:44.928387 TEMP_SENSOR: ON
3752 11:08:44.931501 PER_BANK_REFRESH: ON
3753 11:08:44.931577 HW_SAVE_FOR_SR: ON
3754 11:08:44.935033 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3755 11:08:44.938450 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3756 11:08:44.941836 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3757 11:08:44.945133 Read ODT Tracking: ON
3758 11:08:44.948371 =========================
3759 11:08:44.948447
3760 11:08:44.948505 [TA2_TEST]
3761 11:08:44.948559 === TA2 HW
3762 11:08:44.954935 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3763 11:08:44.958460 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3764 11:08:44.965342 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3765 11:08:44.968148 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3766 11:08:44.968237
3767 11:08:44.971823 [MEM_TEST] 03: After run time config
3768 11:08:44.983045 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3769 11:08:44.986087 [complex_mem_test] start addr:0x40024000, len:131072
3770 11:08:45.190625 1st complex R/W mem test pass
3771 11:08:45.197440 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3772 11:08:45.200673 sync preloader write leveling
3773 11:08:45.203764 sync preloader cbt_mr12
3774 11:08:45.207098 sync preloader cbt_clk_dly
3775 11:08:45.207172 sync preloader cbt_cmd_dly
3776 11:08:45.210709 sync preloader cbt_cs
3777 11:08:45.214093 sync preloader cbt_ca_perbit_delay
3778 11:08:45.214166 sync preloader clk_delay
3779 11:08:45.217118 sync preloader dqs_delay
3780 11:08:45.220789 sync preloader u1Gating2T_Save
3781 11:08:45.224020 sync preloader u1Gating05T_Save
3782 11:08:45.226863 sync preloader u1Gatingfine_tune_Save
3783 11:08:45.230607 sync preloader u1Gatingucpass_count_Save
3784 11:08:45.233864 sync preloader u1TxWindowPerbitVref_Save
3785 11:08:45.237048 sync preloader u1TxCenter_min_Save
3786 11:08:45.240364 sync preloader u1TxCenter_max_Save
3787 11:08:45.243594 sync preloader u1Txwin_center_Save
3788 11:08:45.247097 sync preloader u1Txfirst_pass_Save
3789 11:08:45.250279 sync preloader u1Txlast_pass_Save
3790 11:08:45.250352 sync preloader u1RxDatlat_Save
3791 11:08:45.254033 sync preloader u1RxWinPerbitVref_Save
3792 11:08:45.260445 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3793 11:08:45.263921 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3794 11:08:45.267402 sync preloader delay_cell_unit
3795 11:08:45.273876 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3796 11:08:45.276889 sync preloader write leveling
3797 11:08:45.276988 sync preloader cbt_mr12
3798 11:08:45.280392 sync preloader cbt_clk_dly
3799 11:08:45.283948 sync preloader cbt_cmd_dly
3800 11:08:45.284056 sync preloader cbt_cs
3801 11:08:45.287000 sync preloader cbt_ca_perbit_delay
3802 11:08:45.290930 sync preloader clk_delay
3803 11:08:45.293786 sync preloader dqs_delay
3804 11:08:45.293879 sync preloader u1Gating2T_Save
3805 11:08:45.297396 sync preloader u1Gating05T_Save
3806 11:08:45.300390 sync preloader u1Gatingfine_tune_Save
3807 11:08:45.304203 sync preloader u1Gatingucpass_count_Save
3808 11:08:45.306822 sync preloader u1TxWindowPerbitVref_Save
3809 11:08:45.310342 sync preloader u1TxCenter_min_Save
3810 11:08:45.313568 sync preloader u1TxCenter_max_Save
3811 11:08:45.317427 sync preloader u1Txwin_center_Save
3812 11:08:45.320607 sync preloader u1Txfirst_pass_Save
3813 11:08:45.323810 sync preloader u1Txlast_pass_Save
3814 11:08:45.326850 sync preloader u1RxDatlat_Save
3815 11:08:45.330351 sync preloader u1RxWinPerbitVref_Save
3816 11:08:45.333885 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3817 11:08:45.337078 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3818 11:08:45.340393 sync preloader delay_cell_unit
3819 11:08:45.347134 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3820 11:08:45.350531 sync preloader write leveling
3821 11:08:45.353982 sync preloader cbt_mr12
3822 11:08:45.354077 sync preloader cbt_clk_dly
3823 11:08:45.357692 sync preloader cbt_cmd_dly
3824 11:08:45.360365 sync preloader cbt_cs
3825 11:08:45.364236 sync preloader cbt_ca_perbit_delay
3826 11:08:45.364330 sync preloader clk_delay
3827 11:08:45.367185 sync preloader dqs_delay
3828 11:08:45.370223 sync preloader u1Gating2T_Save
3829 11:08:45.373559 sync preloader u1Gating05T_Save
3830 11:08:45.377217 sync preloader u1Gatingfine_tune_Save
3831 11:08:45.380625 sync preloader u1Gatingucpass_count_Save
3832 11:08:45.383475 sync preloader u1TxWindowPerbitVref_Save
3833 11:08:45.387154 sync preloader u1TxCenter_min_Save
3834 11:08:45.390603 sync preloader u1TxCenter_max_Save
3835 11:08:45.393757 sync preloader u1Txwin_center_Save
3836 11:08:45.397147 sync preloader u1Txfirst_pass_Save
3837 11:08:45.397256 sync preloader u1Txlast_pass_Save
3838 11:08:45.400654 sync preloader u1RxDatlat_Save
3839 11:08:45.403594 sync preloader u1RxWinPerbitVref_Save
3840 11:08:45.410463 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3841 11:08:45.413799 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3842 11:08:45.417023 sync preloader delay_cell_unit
3843 11:08:45.419968 just_for_test_dump_coreboot_params dump all params
3844 11:08:45.420052 dump source = 0x0
3845 11:08:45.423374 dump params frequency:1600
3846 11:08:45.426983 dump params rank number:2
3847 11:08:45.427088
3848 11:08:45.430126 dump params write leveling
3849 11:08:45.430200 write leveling[0][0][0] = 0x21
3850 11:08:45.433432 write leveling[0][0][1] = 0x1a
3851 11:08:45.436751 write leveling[0][1][0] = 0x22
3852 11:08:45.440114 write leveling[0][1][1] = 0x1d
3853 11:08:45.444024 write leveling[1][0][0] = 0x24
3854 11:08:45.447434 write leveling[1][0][1] = 0x1f
3855 11:08:45.447509 write leveling[1][1][0] = 0x23
3856 11:08:45.450692 write leveling[1][1][1] = 0x20
3857 11:08:45.453915 dump params cbt_cs
3858 11:08:45.453989 cbt_cs[0][0] = 0xa
3859 11:08:45.457082 cbt_cs[0][1] = 0xa
3860 11:08:45.457194 cbt_cs[1][0] = 0xb
3861 11:08:45.460463 cbt_cs[1][1] = 0xb
3862 11:08:45.460542 dump params cbt_mr12
3863 11:08:45.463534 cbt_mr12[0][0] = 0x16
3864 11:08:45.466881 cbt_mr12[0][1] = 0x16
3865 11:08:45.466978 cbt_mr12[1][0] = 0x16
3866 11:08:45.470523 cbt_mr12[1][1] = 0x18
3867 11:08:45.470611 dump params tx window
3868 11:08:45.474000 tx_center_min[0][0][0] = 980
3869 11:08:45.476999 tx_center_max[0][0][0] = 987
3870 11:08:45.480279 tx_center_min[0][0][1] = 973
3871 11:08:45.483959 tx_center_max[0][0][1] = 979
3872 11:08:45.484032 tx_center_min[0][1][0] = 982
3873 11:08:45.486856 tx_center_max[0][1][0] = 989
3874 11:08:45.490867 tx_center_min[0][1][1] = 978
3875 11:08:45.494057 tx_center_max[0][1][1] = 981
3876 11:08:45.494120 tx_center_min[1][0][0] = 983
3877 11:08:45.496990 tx_center_max[1][0][0] = 990
3878 11:08:45.500580 tx_center_min[1][0][1] = 976
3879 11:08:45.503806 tx_center_max[1][0][1] = 980
3880 11:08:45.507070 tx_center_min[1][1][0] = 982
3881 11:08:45.507160 tx_center_max[1][1][0] = 989
3882 11:08:45.510413 tx_center_min[1][1][1] = 978
3883 11:08:45.514237 tx_center_max[1][1][1] = 981
3884 11:08:45.517020 dump params tx window
3885 11:08:45.517107 tx_win_center[0][0][0] = 987
3886 11:08:45.520262 tx_first_pass[0][0][0] = 975
3887 11:08:45.524490 tx_last_pass[0][0][0] = 999
3888 11:08:45.527421 tx_win_center[0][0][1] = 986
3889 11:08:45.527484 tx_first_pass[0][0][1] = 974
3890 11:08:45.530391 tx_last_pass[0][0][1] = 998
3891 11:08:45.533690 tx_win_center[0][0][2] = 985
3892 11:08:45.536917 tx_first_pass[0][0][2] = 974
3893 11:08:45.540226 tx_last_pass[0][0][2] = 997
3894 11:08:45.540315 tx_win_center[0][0][3] = 980
3895 11:08:45.543769 tx_first_pass[0][0][3] = 968
3896 11:08:45.547122 tx_last_pass[0][0][3] = 992
3897 11:08:45.550219 tx_win_center[0][0][4] = 985
3898 11:08:45.550287 tx_first_pass[0][0][4] = 973
3899 11:08:45.553656 tx_last_pass[0][0][4] = 998
3900 11:08:45.556675 tx_win_center[0][0][5] = 980
3901 11:08:45.560715 tx_first_pass[0][0][5] = 969
3902 11:08:45.563478 tx_last_pass[0][0][5] = 992
3903 11:08:45.563566 tx_win_center[0][0][6] = 981
3904 11:08:45.567030 tx_first_pass[0][0][6] = 969
3905 11:08:45.570447 tx_last_pass[0][0][6] = 993
3906 11:08:45.573657 tx_win_center[0][0][7] = 983
3907 11:08:45.573735 tx_first_pass[0][0][7] = 972
3908 11:08:45.577170 tx_last_pass[0][0][7] = 995
3909 11:08:45.580355 tx_win_center[0][0][8] = 974
3910 11:08:45.583739 tx_first_pass[0][0][8] = 962
3911 11:08:45.586944 tx_last_pass[0][0][8] = 986
3912 11:08:45.587023 tx_win_center[0][0][9] = 975
3913 11:08:45.590477 tx_first_pass[0][0][9] = 963
3914 11:08:45.593862 tx_last_pass[0][0][9] = 988
3915 11:08:45.597207 tx_win_center[0][0][10] = 979
3916 11:08:45.600353 tx_first_pass[0][0][10] = 967
3917 11:08:45.600431 tx_last_pass[0][0][10] = 991
3918 11:08:45.603654 tx_win_center[0][0][11] = 973
3919 11:08:45.606914 tx_first_pass[0][0][11] = 961
3920 11:08:45.610133 tx_last_pass[0][0][11] = 985
3921 11:08:45.613352 tx_win_center[0][0][12] = 974
3922 11:08:45.613430 tx_first_pass[0][0][12] = 962
3923 11:08:45.616952 tx_last_pass[0][0][12] = 987
3924 11:08:45.620027 tx_win_center[0][0][13] = 973
3925 11:08:45.624085 tx_first_pass[0][0][13] = 962
3926 11:08:45.626978 tx_last_pass[0][0][13] = 985
3927 11:08:45.627055 tx_win_center[0][0][14] = 975
3928 11:08:45.629924 tx_first_pass[0][0][14] = 963
3929 11:08:45.633820 tx_last_pass[0][0][14] = 987
3930 11:08:45.636713 tx_win_center[0][0][15] = 978
3931 11:08:45.640048 tx_first_pass[0][0][15] = 966
3932 11:08:45.640126 tx_last_pass[0][0][15] = 990
3933 11:08:45.643571 tx_win_center[0][1][0] = 989
3934 11:08:45.647033 tx_first_pass[0][1][0] = 977
3935 11:08:45.650086 tx_last_pass[0][1][0] = 1002
3936 11:08:45.650164 tx_win_center[0][1][1] = 988
3937 11:08:45.653363 tx_first_pass[0][1][1] = 976
3938 11:08:45.656683 tx_last_pass[0][1][1] = 1000
3939 11:08:45.660139 tx_win_center[0][1][2] = 988
3940 11:08:45.663373 tx_first_pass[0][1][2] = 977
3941 11:08:45.663451 tx_last_pass[0][1][2] = 1000
3942 11:08:45.666812 tx_win_center[0][1][3] = 982
3943 11:08:45.670554 tx_first_pass[0][1][3] = 969
3944 11:08:45.673849 tx_last_pass[0][1][3] = 995
3945 11:08:45.677083 tx_win_center[0][1][4] = 988
3946 11:08:45.677211 tx_first_pass[0][1][4] = 976
3947 11:08:45.680467 tx_last_pass[0][1][4] = 1000
3948 11:08:45.683902 tx_win_center[0][1][5] = 983
3949 11:08:45.686969 tx_first_pass[0][1][5] = 971
3950 11:08:45.687047 tx_last_pass[0][1][5] = 995
3951 11:08:45.689907 tx_win_center[0][1][6] = 984
3952 11:08:45.693629 tx_first_pass[0][1][6] = 971
3953 11:08:45.697057 tx_last_pass[0][1][6] = 997
3954 11:08:45.700313 tx_win_center[0][1][7] = 987
3955 11:08:45.700390 tx_first_pass[0][1][7] = 975
3956 11:08:45.704856 tx_last_pass[0][1][7] = 999
3957 11:08:45.706968 tx_win_center[0][1][8] = 978
3958 11:08:45.710355 tx_first_pass[0][1][8] = 967
3959 11:08:45.710433 tx_last_pass[0][1][8] = 989
3960 11:08:45.713704 tx_win_center[0][1][9] = 979
3961 11:08:45.716988 tx_first_pass[0][1][9] = 968
3962 11:08:45.720182 tx_last_pass[0][1][9] = 990
3963 11:08:45.723591 tx_win_center[0][1][10] = 981
3964 11:08:45.723669 tx_first_pass[0][1][10] = 970
3965 11:08:45.726636 tx_last_pass[0][1][10] = 993
3966 11:08:45.730804 tx_win_center[0][1][11] = 978
3967 11:08:45.733124 tx_first_pass[0][1][11] = 967
3968 11:08:45.736676 tx_last_pass[0][1][11] = 990
3969 11:08:45.736753 tx_win_center[0][1][12] = 979
3970 11:08:45.740028 tx_first_pass[0][1][12] = 968
3971 11:08:45.743475 tx_last_pass[0][1][12] = 990
3972 11:08:45.746503 tx_win_center[0][1][13] = 978
3973 11:08:45.750212 tx_first_pass[0][1][13] = 967
3974 11:08:45.750290 tx_last_pass[0][1][13] = 989
3975 11:08:45.753364 tx_win_center[0][1][14] = 979
3976 11:08:45.756908 tx_first_pass[0][1][14] = 968
3977 11:08:45.759827 tx_last_pass[0][1][14] = 990
3978 11:08:45.763277 tx_win_center[0][1][15] = 980
3979 11:08:45.763355 tx_first_pass[0][1][15] = 969
3980 11:08:45.767249 tx_last_pass[0][1][15] = 991
3981 11:08:45.769767 tx_win_center[1][0][0] = 989
3982 11:08:45.773496 tx_first_pass[1][0][0] = 977
3983 11:08:45.776600 tx_last_pass[1][0][0] = 1002
3984 11:08:45.776679 tx_win_center[1][0][1] = 988
3985 11:08:45.779984 tx_first_pass[1][0][1] = 976
3986 11:08:45.783270 tx_last_pass[1][0][1] = 1000
3987 11:08:45.786622 tx_win_center[1][0][2] = 985
3988 11:08:45.786699 tx_first_pass[1][0][2] = 973
3989 11:08:45.790055 tx_last_pass[1][0][2] = 997
3990 11:08:45.793261 tx_win_center[1][0][3] = 983
3991 11:08:45.796716 tx_first_pass[1][0][3] = 971
3992 11:08:45.796794 tx_last_pass[1][0][3] = 995
3993 11:08:45.800491 tx_win_center[1][0][4] = 987
3994 11:08:45.803719 tx_first_pass[1][0][4] = 975
3995 11:08:45.806641 tx_last_pass[1][0][4] = 999
3996 11:08:45.810235 tx_win_center[1][0][5] = 988
3997 11:08:45.810313 tx_first_pass[1][0][5] = 976
3998 11:08:45.813391 tx_last_pass[1][0][5] = 1001
3999 11:08:45.816986 tx_win_center[1][0][6] = 990
4000 11:08:45.820336 tx_first_pass[1][0][6] = 978
4001 11:08:45.823668 tx_last_pass[1][0][6] = 1002
4002 11:08:45.823746 tx_win_center[1][0][7] = 986
4003 11:08:45.826602 tx_first_pass[1][0][7] = 975
4004 11:08:45.830276 tx_last_pass[1][0][7] = 998
4005 11:08:45.833405 tx_win_center[1][0][8] = 979
4006 11:08:45.833483 tx_first_pass[1][0][8] = 967
4007 11:08:45.836856 tx_last_pass[1][0][8] = 991
4008 11:08:45.839796 tx_win_center[1][0][9] = 979
4009 11:08:45.843097 tx_first_pass[1][0][9] = 967
4010 11:08:45.846797 tx_last_pass[1][0][9] = 991
4011 11:08:45.846875 tx_win_center[1][0][10] = 979
4012 11:08:45.850098 tx_first_pass[1][0][10] = 967
4013 11:08:45.853533 tx_last_pass[1][0][10] = 991
4014 11:08:45.856809 tx_win_center[1][0][11] = 980
4015 11:08:45.859864 tx_first_pass[1][0][11] = 969
4016 11:08:45.859942 tx_last_pass[1][0][11] = 992
4017 11:08:45.863343 tx_win_center[1][0][12] = 980
4018 11:08:45.866842 tx_first_pass[1][0][12] = 968
4019 11:08:45.870207 tx_last_pass[1][0][12] = 992
4020 11:08:45.873801 tx_win_center[1][0][13] = 980
4021 11:08:45.873879 tx_first_pass[1][0][13] = 969
4022 11:08:45.876877 tx_last_pass[1][0][13] = 992
4023 11:08:45.880152 tx_win_center[1][0][14] = 979
4024 11:08:45.883622 tx_first_pass[1][0][14] = 968
4025 11:08:45.886937 tx_last_pass[1][0][14] = 991
4026 11:08:45.887015 tx_win_center[1][0][15] = 976
4027 11:08:45.890038 tx_first_pass[1][0][15] = 964
4028 11:08:45.893103 tx_last_pass[1][0][15] = 989
4029 11:08:45.897024 tx_win_center[1][1][0] = 989
4030 11:08:45.899957 tx_first_pass[1][1][0] = 977
4031 11:08:45.900035 tx_last_pass[1][1][0] = 1002
4032 11:08:45.903589 tx_win_center[1][1][1] = 988
4033 11:08:45.906891 tx_first_pass[1][1][1] = 977
4034 11:08:45.909867 tx_last_pass[1][1][1] = 1000
4035 11:08:45.909944 tx_win_center[1][1][2] = 984
4036 11:08:45.913363 tx_first_pass[1][1][2] = 971
4037 11:08:45.917006 tx_last_pass[1][1][2] = 997
4038 11:08:45.919808 tx_win_center[1][1][3] = 982
4039 11:08:45.923534 tx_first_pass[1][1][3] = 970
4040 11:08:45.923611 tx_last_pass[1][1][3] = 994
4041 11:08:45.926960 tx_win_center[1][1][4] = 985
4042 11:08:45.929876 tx_first_pass[1][1][4] = 973
4043 11:08:45.933429 tx_last_pass[1][1][4] = 998
4044 11:08:45.936846 tx_win_center[1][1][5] = 988
4045 11:08:45.936924 tx_first_pass[1][1][5] = 976
4046 11:08:45.939942 tx_last_pass[1][1][5] = 1000
4047 11:08:45.943387 tx_win_center[1][1][6] = 988
4048 11:08:45.946409 tx_first_pass[1][1][6] = 976
4049 11:08:45.946487 tx_last_pass[1][1][6] = 1000
4050 11:08:45.949647 tx_win_center[1][1][7] = 986
4051 11:08:45.953114 tx_first_pass[1][1][7] = 974
4052 11:08:45.956411 tx_last_pass[1][1][7] = 998
4053 11:08:45.959532 tx_win_center[1][1][8] = 980
4054 11:08:45.959610 tx_first_pass[1][1][8] = 968
4055 11:08:45.962874 tx_last_pass[1][1][8] = 992
4056 11:08:45.966529 tx_win_center[1][1][9] = 979
4057 11:08:45.969797 tx_first_pass[1][1][9] = 968
4058 11:08:45.969872 tx_last_pass[1][1][9] = 991
4059 11:08:45.973130 tx_win_center[1][1][10] = 980
4060 11:08:45.976816 tx_first_pass[1][1][10] = 969
4061 11:08:45.979552 tx_last_pass[1][1][10] = 991
4062 11:08:45.983454 tx_win_center[1][1][11] = 981
4063 11:08:45.983529 tx_first_pass[1][1][11] = 970
4064 11:08:45.986447 tx_last_pass[1][1][11] = 993
4065 11:08:45.989667 tx_win_center[1][1][12] = 981
4066 11:08:45.993009 tx_first_pass[1][1][12] = 970
4067 11:08:45.996812 tx_last_pass[1][1][12] = 993
4068 11:08:45.996888 tx_win_center[1][1][13] = 980
4069 11:08:45.999975 tx_first_pass[1][1][13] = 969
4070 11:08:46.003186 tx_last_pass[1][1][13] = 992
4071 11:08:46.006357 tx_win_center[1][1][14] = 980
4072 11:08:46.010076 tx_first_pass[1][1][14] = 969
4073 11:08:46.010174 tx_last_pass[1][1][14] = 992
4074 11:08:46.013096 tx_win_center[1][1][15] = 978
4075 11:08:46.016412 tx_first_pass[1][1][15] = 967
4076 11:08:46.019716 tx_last_pass[1][1][15] = 990
4077 11:08:46.019790 dump params rx window
4078 11:08:46.023055 rx_firspass[0][0][0] = 9
4079 11:08:46.026208 rx_lastpass[0][0][0] = 42
4080 11:08:46.029530 rx_firspass[0][0][1] = 8
4081 11:08:46.029604 rx_lastpass[0][0][1] = 40
4082 11:08:46.033111 rx_firspass[0][0][2] = 9
4083 11:08:46.036141 rx_lastpass[0][0][2] = 39
4084 11:08:46.036235 rx_firspass[0][0][3] = -1
4085 11:08:46.039611 rx_lastpass[0][0][3] = 31
4086 11:08:46.043243 rx_firspass[0][0][4] = 7
4087 11:08:46.043316 rx_lastpass[0][0][4] = 39
4088 11:08:46.046186 rx_firspass[0][0][5] = 3
4089 11:08:46.050037 rx_lastpass[0][0][5] = 29
4090 11:08:46.053026 rx_firspass[0][0][6] = 2
4091 11:08:46.053124 rx_lastpass[0][0][6] = 32
4092 11:08:46.056250 rx_firspass[0][0][7] = 4
4093 11:08:46.060086 rx_lastpass[0][0][7] = 34
4094 11:08:46.060159 rx_firspass[0][0][8] = 2
4095 11:08:46.063409 rx_lastpass[0][0][8] = 34
4096 11:08:46.066444 rx_firspass[0][0][9] = 5
4097 11:08:46.066517 rx_lastpass[0][0][9] = 36
4098 11:08:46.070007 rx_firspass[0][0][10] = 9
4099 11:08:46.073217 rx_lastpass[0][0][10] = 38
4100 11:08:46.076657 rx_firspass[0][0][11] = 2
4101 11:08:46.076738 rx_lastpass[0][0][11] = 31
4102 11:08:46.079841 rx_firspass[0][0][12] = 5
4103 11:08:46.083055 rx_lastpass[0][0][12] = 34
4104 11:08:46.083128 rx_firspass[0][0][13] = 1
4105 11:08:46.086851 rx_lastpass[0][0][13] = 31
4106 11:08:46.089762 rx_firspass[0][0][14] = 3
4107 11:08:46.093442 rx_lastpass[0][0][14] = 33
4108 11:08:46.093515 rx_firspass[0][0][15] = 4
4109 11:08:46.096338 rx_lastpass[0][0][15] = 35
4110 11:08:46.100193 rx_firspass[0][1][0] = 9
4111 11:08:46.100265 rx_lastpass[0][1][0] = 43
4112 11:08:46.103424 rx_firspass[0][1][1] = 7
4113 11:08:46.106561 rx_lastpass[0][1][1] = 42
4114 11:08:46.109761 rx_firspass[0][1][2] = 7
4115 11:08:46.109835 rx_lastpass[0][1][2] = 42
4116 11:08:46.113088 rx_firspass[0][1][3] = -2
4117 11:08:46.117068 rx_lastpass[0][1][3] = 33
4118 11:08:46.117169 rx_firspass[0][1][4] = 5
4119 11:08:46.120299 rx_lastpass[0][1][4] = 40
4120 11:08:46.123615 rx_firspass[0][1][5] = 1
4121 11:08:46.123689 rx_lastpass[0][1][5] = 34
4122 11:08:46.126714 rx_firspass[0][1][6] = 2
4123 11:08:46.130116 rx_lastpass[0][1][6] = 35
4124 11:08:46.130190 rx_firspass[0][1][7] = 2
4125 11:08:46.133835 rx_lastpass[0][1][7] = 36
4126 11:08:46.137103 rx_firspass[0][1][8] = 0
4127 11:08:46.140257 rx_lastpass[0][1][8] = 36
4128 11:08:46.140331 rx_firspass[0][1][9] = 1
4129 11:08:46.143612 rx_lastpass[0][1][9] = 38
4130 11:08:46.146779 rx_firspass[0][1][10] = 6
4131 11:08:46.146852 rx_lastpass[0][1][10] = 41
4132 11:08:46.150276 rx_firspass[0][1][11] = 0
4133 11:08:46.153354 rx_lastpass[0][1][11] = 33
4134 11:08:46.156758 rx_firspass[0][1][12] = 1
4135 11:08:46.156902 rx_lastpass[0][1][12] = 36
4136 11:08:46.160100 rx_firspass[0][1][13] = 0
4137 11:08:46.163418 rx_lastpass[0][1][13] = 34
4138 11:08:46.163492 rx_firspass[0][1][14] = 1
4139 11:08:46.166570 rx_lastpass[0][1][14] = 36
4140 11:08:46.170209 rx_firspass[0][1][15] = 3
4141 11:08:46.173628 rx_lastpass[0][1][15] = 38
4142 11:08:46.173702 rx_firspass[1][0][0] = 8
4143 11:08:46.176625 rx_lastpass[1][0][0] = 40
4144 11:08:46.179940 rx_firspass[1][0][1] = 7
4145 11:08:46.180014 rx_lastpass[1][0][1] = 38
4146 11:08:46.183341 rx_firspass[1][0][2] = 1
4147 11:08:46.186664 rx_lastpass[1][0][2] = 32
4148 11:08:46.190081 rx_firspass[1][0][3] = 0
4149 11:08:46.190179 rx_lastpass[1][0][3] = 31
4150 11:08:46.193358 rx_firspass[1][0][4] = 3
4151 11:08:46.196811 rx_lastpass[1][0][4] = 32
4152 11:08:46.196885 rx_firspass[1][0][5] = 9
4153 11:08:46.199906 rx_lastpass[1][0][5] = 38
4154 11:08:46.203416 rx_firspass[1][0][6] = 9
4155 11:08:46.203513 rx_lastpass[1][0][6] = 40
4156 11:08:46.207808 rx_firspass[1][0][7] = 5
4157 11:08:46.210203 rx_lastpass[1][0][7] = 33
4158 11:08:46.213632 rx_firspass[1][0][8] = 3
4159 11:08:46.213730 rx_lastpass[1][0][8] = 35
4160 11:08:46.216404 rx_firspass[1][0][9] = 4
4161 11:08:46.220058 rx_lastpass[1][0][9] = 35
4162 11:08:46.220133 rx_firspass[1][0][10] = 2
4163 11:08:46.223570 rx_lastpass[1][0][10] = 34
4164 11:08:46.227120 rx_firspass[1][0][11] = 5
4165 11:08:46.229968 rx_lastpass[1][0][11] = 34
4166 11:08:46.230041 rx_firspass[1][0][12] = 5
4167 11:08:46.233526 rx_lastpass[1][0][12] = 35
4168 11:08:46.236843 rx_firspass[1][0][13] = 5
4169 11:08:46.236916 rx_lastpass[1][0][13] = 32
4170 11:08:46.239826 rx_firspass[1][0][14] = 3
4171 11:08:46.243727 rx_lastpass[1][0][14] = 34
4172 11:08:46.246336 rx_firspass[1][0][15] = 1
4173 11:08:46.246410 rx_lastpass[1][0][15] = 32
4174 11:08:46.249860 rx_firspass[1][1][0] = 7
4175 11:08:46.253544 rx_lastpass[1][1][0] = 42
4176 11:08:46.253618 rx_firspass[1][1][1] = 5
4177 11:08:46.256464 rx_lastpass[1][1][1] = 40
4178 11:08:46.260400 rx_firspass[1][1][2] = 0
4179 11:08:46.263116 rx_lastpass[1][1][2] = 35
4180 11:08:46.263190 rx_firspass[1][1][3] = -3
4181 11:08:46.266507 rx_lastpass[1][1][3] = 33
4182 11:08:46.269907 rx_firspass[1][1][4] = 1
4183 11:08:46.269981 rx_lastpass[1][1][4] = 36
4184 11:08:46.273133 rx_firspass[1][1][5] = 5
4185 11:08:46.276752 rx_lastpass[1][1][5] = 41
4186 11:08:46.276849 rx_firspass[1][1][6] = 7
4187 11:08:46.279869 rx_lastpass[1][1][6] = 42
4188 11:08:46.283194 rx_firspass[1][1][7] = 1
4189 11:08:46.286555 rx_lastpass[1][1][7] = 36
4190 11:08:46.286629 rx_firspass[1][1][8] = 2
4191 11:08:46.290076 rx_lastpass[1][1][8] = 37
4192 11:08:46.293477 rx_firspass[1][1][9] = 2
4193 11:08:46.293550 rx_lastpass[1][1][9] = 37
4194 11:08:46.296691 rx_firspass[1][1][10] = 3
4195 11:08:46.300217 rx_lastpass[1][1][10] = 36
4196 11:08:46.303062 rx_firspass[1][1][11] = 3
4197 11:08:46.303223 rx_lastpass[1][1][11] = 38
4198 11:08:46.306686 rx_firspass[1][1][12] = 4
4199 11:08:46.309698 rx_lastpass[1][1][12] = 39
4200 11:08:46.309772 rx_firspass[1][1][13] = 3
4201 11:08:46.312944 rx_lastpass[1][1][13] = 36
4202 11:08:46.316751 rx_firspass[1][1][14] = 3
4203 11:08:46.320193 rx_lastpass[1][1][14] = 36
4204 11:08:46.320268 rx_firspass[1][1][15] = 0
4205 11:08:46.323463 rx_lastpass[1][1][15] = 34
4206 11:08:46.326622 dump params clk_delay
4207 11:08:46.326696 clk_delay[0] = -1
4208 11:08:46.329450 clk_delay[1] = 0
4209 11:08:46.329524 dump params dqs_delay
4210 11:08:46.332678 dqs_delay[0][0] = 0
4211 11:08:46.332751 dqs_delay[0][1] = -1
4212 11:08:46.336106 dqs_delay[1][0] = -1
4213 11:08:46.336179 dqs_delay[1][1] = 1
4214 11:08:46.339955 dump params delay_cell_unit = 762
4215 11:08:46.342714 dump source = 0x0
4216 11:08:46.346050 dump params frequency:1200
4217 11:08:46.346124 dump params rank number:2
4218 11:08:46.346182
4219 11:08:46.349784 dump params write leveling
4220 11:08:46.352933 write leveling[0][0][0] = 0x0
4221 11:08:46.356670 write leveling[0][0][1] = 0x0
4222 11:08:46.359818 write leveling[0][1][0] = 0x0
4223 11:08:46.359892 write leveling[0][1][1] = 0x0
4224 11:08:46.363266 write leveling[1][0][0] = 0x0
4225 11:08:46.366436 write leveling[1][0][1] = 0x0
4226 11:08:46.369456 write leveling[1][1][0] = 0x0
4227 11:08:46.373028 write leveling[1][1][1] = 0x0
4228 11:08:46.373126 dump params cbt_cs
4229 11:08:46.375978 cbt_cs[0][0] = 0x0
4230 11:08:46.376052 cbt_cs[0][1] = 0x0
4231 11:08:46.379472 cbt_cs[1][0] = 0x0
4232 11:08:46.379546 cbt_cs[1][1] = 0x0
4233 11:08:46.382864 dump params cbt_mr12
4234 11:08:46.382937 cbt_mr12[0][0] = 0x0
4235 11:08:46.386384 cbt_mr12[0][1] = 0x0
4236 11:08:46.386457 cbt_mr12[1][0] = 0x0
4237 11:08:46.389387 cbt_mr12[1][1] = 0x0
4238 11:08:46.392580 dump params tx window
4239 11:08:46.392654 tx_center_min[0][0][0] = 0
4240 11:08:46.396162 tx_center_max[0][0][0] = 0
4241 11:08:46.399304 tx_center_min[0][0][1] = 0
4242 11:08:46.402559 tx_center_max[0][0][1] = 0
4243 11:08:46.402633 tx_center_min[0][1][0] = 0
4244 11:08:46.405819 tx_center_max[0][1][0] = 0
4245 11:08:46.409425 tx_center_min[0][1][1] = 0
4246 11:08:46.412364 tx_center_max[0][1][1] = 0
4247 11:08:46.412462 tx_center_min[1][0][0] = 0
4248 11:08:46.415892 tx_center_max[1][0][0] = 0
4249 11:08:46.419628 tx_center_min[1][0][1] = 0
4250 11:08:46.422634 tx_center_max[1][0][1] = 0
4251 11:08:46.422708 tx_center_min[1][1][0] = 0
4252 11:08:46.426079 tx_center_max[1][1][0] = 0
4253 11:08:46.428951 tx_center_min[1][1][1] = 0
4254 11:08:46.429049 tx_center_max[1][1][1] = 0
4255 11:08:46.432308 dump params tx window
4256 11:08:46.435648 tx_win_center[0][0][0] = 0
4257 11:08:46.439260 tx_first_pass[0][0][0] = 0
4258 11:08:46.439359 tx_last_pass[0][0][0] = 0
4259 11:08:46.442340 tx_win_center[0][0][1] = 0
4260 11:08:46.445657 tx_first_pass[0][0][1] = 0
4261 11:08:46.445755 tx_last_pass[0][0][1] = 0
4262 11:08:46.449164 tx_win_center[0][0][2] = 0
4263 11:08:46.452671 tx_first_pass[0][0][2] = 0
4264 11:08:46.455985 tx_last_pass[0][0][2] = 0
4265 11:08:46.456059 tx_win_center[0][0][3] = 0
4266 11:08:46.459084 tx_first_pass[0][0][3] = 0
4267 11:08:46.462953 tx_last_pass[0][0][3] = 0
4268 11:08:46.463027 tx_win_center[0][0][4] = 0
4269 11:08:46.465654 tx_first_pass[0][0][4] = 0
4270 11:08:46.469059 tx_last_pass[0][0][4] = 0
4271 11:08:46.472610 tx_win_center[0][0][5] = 0
4272 11:08:46.472683 tx_first_pass[0][0][5] = 0
4273 11:08:46.475882 tx_last_pass[0][0][5] = 0
4274 11:08:46.479132 tx_win_center[0][0][6] = 0
4275 11:08:46.482503 tx_first_pass[0][0][6] = 0
4276 11:08:46.482577 tx_last_pass[0][0][6] = 0
4277 11:08:46.486096 tx_win_center[0][0][7] = 0
4278 11:08:46.489590 tx_first_pass[0][0][7] = 0
4279 11:08:46.489692 tx_last_pass[0][0][7] = 0
4280 11:08:46.492269 tx_win_center[0][0][8] = 0
4281 11:08:46.496156 tx_first_pass[0][0][8] = 0
4282 11:08:46.498947 tx_last_pass[0][0][8] = 0
4283 11:08:46.499022 tx_win_center[0][0][9] = 0
4284 11:08:46.502897 tx_first_pass[0][0][9] = 0
4285 11:08:46.505688 tx_last_pass[0][0][9] = 0
4286 11:08:46.509143 tx_win_center[0][0][10] = 0
4287 11:08:46.509252 tx_first_pass[0][0][10] = 0
4288 11:08:46.512501 tx_last_pass[0][0][10] = 0
4289 11:08:46.515739 tx_win_center[0][0][11] = 0
4290 11:08:46.518908 tx_first_pass[0][0][11] = 0
4291 11:08:46.518982 tx_last_pass[0][0][11] = 0
4292 11:08:46.522380 tx_win_center[0][0][12] = 0
4293 11:08:46.526109 tx_first_pass[0][0][12] = 0
4294 11:08:46.529668 tx_last_pass[0][0][12] = 0
4295 11:08:46.529742 tx_win_center[0][0][13] = 0
4296 11:08:46.532568 tx_first_pass[0][0][13] = 0
4297 11:08:46.535730 tx_last_pass[0][0][13] = 0
4298 11:08:46.539455 tx_win_center[0][0][14] = 0
4299 11:08:46.539608 tx_first_pass[0][0][14] = 0
4300 11:08:46.543086 tx_last_pass[0][0][14] = 0
4301 11:08:46.546082 tx_win_center[0][0][15] = 0
4302 11:08:46.549134 tx_first_pass[0][0][15] = 0
4303 11:08:46.549252 tx_last_pass[0][0][15] = 0
4304 11:08:46.552695 tx_win_center[0][1][0] = 0
4305 11:08:46.556061 tx_first_pass[0][1][0] = 0
4306 11:08:46.556139 tx_last_pass[0][1][0] = 0
4307 11:08:46.559642 tx_win_center[0][1][1] = 0
4308 11:08:46.562805 tx_first_pass[0][1][1] = 0
4309 11:08:46.566036 tx_last_pass[0][1][1] = 0
4310 11:08:46.566114 tx_win_center[0][1][2] = 0
4311 11:08:46.569257 tx_first_pass[0][1][2] = 0
4312 11:08:46.572527 tx_last_pass[0][1][2] = 0
4313 11:08:46.575853 tx_win_center[0][1][3] = 0
4314 11:08:46.575930 tx_first_pass[0][1][3] = 0
4315 11:08:46.579005 tx_last_pass[0][1][3] = 0
4316 11:08:46.582714 tx_win_center[0][1][4] = 0
4317 11:08:46.582792 tx_first_pass[0][1][4] = 0
4318 11:08:46.585980 tx_last_pass[0][1][4] = 0
4319 11:08:46.588927 tx_win_center[0][1][5] = 0
4320 11:08:46.592401 tx_first_pass[0][1][5] = 0
4321 11:08:46.592478 tx_last_pass[0][1][5] = 0
4322 11:08:46.595790 tx_win_center[0][1][6] = 0
4323 11:08:46.599487 tx_first_pass[0][1][6] = 0
4324 11:08:46.599565 tx_last_pass[0][1][6] = 0
4325 11:08:46.602620 tx_win_center[0][1][7] = 0
4326 11:08:46.606019 tx_first_pass[0][1][7] = 0
4327 11:08:46.609536 tx_last_pass[0][1][7] = 0
4328 11:08:46.609614 tx_win_center[0][1][8] = 0
4329 11:08:46.612929 tx_first_pass[0][1][8] = 0
4330 11:08:46.616032 tx_last_pass[0][1][8] = 0
4331 11:08:46.616138 tx_win_center[0][1][9] = 0
4332 11:08:46.619222 tx_first_pass[0][1][9] = 0
4333 11:08:46.622605 tx_last_pass[0][1][9] = 0
4334 11:08:46.625732 tx_win_center[0][1][10] = 0
4335 11:08:46.625810 tx_first_pass[0][1][10] = 0
4336 11:08:46.629336 tx_last_pass[0][1][10] = 0
4337 11:08:46.632812 tx_win_center[0][1][11] = 0
4338 11:08:46.635743 tx_first_pass[0][1][11] = 0
4339 11:08:46.635821 tx_last_pass[0][1][11] = 0
4340 11:08:46.639038 tx_win_center[0][1][12] = 0
4341 11:08:46.642530 tx_first_pass[0][1][12] = 0
4342 11:08:46.646346 tx_last_pass[0][1][12] = 0
4343 11:08:46.646424 tx_win_center[0][1][13] = 0
4344 11:08:46.649438 tx_first_pass[0][1][13] = 0
4345 11:08:46.652523 tx_last_pass[0][1][13] = 0
4346 11:08:46.655808 tx_win_center[0][1][14] = 0
4347 11:08:46.655885 tx_first_pass[0][1][14] = 0
4348 11:08:46.659089 tx_last_pass[0][1][14] = 0
4349 11:08:46.662680 tx_win_center[0][1][15] = 0
4350 11:08:46.665872 tx_first_pass[0][1][15] = 0
4351 11:08:46.665950 tx_last_pass[0][1][15] = 0
4352 11:08:46.669099 tx_win_center[1][0][0] = 0
4353 11:08:46.672491 tx_first_pass[1][0][0] = 0
4354 11:08:46.675701 tx_last_pass[1][0][0] = 0
4355 11:08:46.675778 tx_win_center[1][0][1] = 0
4356 11:08:46.679149 tx_first_pass[1][0][1] = 0
4357 11:08:46.682508 tx_last_pass[1][0][1] = 0
4358 11:08:46.685967 tx_win_center[1][0][2] = 0
4359 11:08:46.686044 tx_first_pass[1][0][2] = 0
4360 11:08:46.689052 tx_last_pass[1][0][2] = 0
4361 11:08:46.692573 tx_win_center[1][0][3] = 0
4362 11:08:46.692651 tx_first_pass[1][0][3] = 0
4363 11:08:46.695876 tx_last_pass[1][0][3] = 0
4364 11:08:46.698945 tx_win_center[1][0][4] = 0
4365 11:08:46.702461 tx_first_pass[1][0][4] = 0
4366 11:08:46.702538 tx_last_pass[1][0][4] = 0
4367 11:08:46.705764 tx_win_center[1][0][5] = 0
4368 11:08:46.709109 tx_first_pass[1][0][5] = 0
4369 11:08:46.709233 tx_last_pass[1][0][5] = 0
4370 11:08:46.712336 tx_win_center[1][0][6] = 0
4371 11:08:46.715672 tx_first_pass[1][0][6] = 0
4372 11:08:46.719467 tx_last_pass[1][0][6] = 0
4373 11:08:46.719546 tx_win_center[1][0][7] = 0
4374 11:08:46.722668 tx_first_pass[1][0][7] = 0
4375 11:08:46.726108 tx_last_pass[1][0][7] = 0
4376 11:08:46.726185 tx_win_center[1][0][8] = 0
4377 11:08:46.729547 tx_first_pass[1][0][8] = 0
4378 11:08:46.732706 tx_last_pass[1][0][8] = 0
4379 11:08:46.735770 tx_win_center[1][0][9] = 0
4380 11:08:46.735848 tx_first_pass[1][0][9] = 0
4381 11:08:46.739751 tx_last_pass[1][0][9] = 0
4382 11:08:46.742676 tx_win_center[1][0][10] = 0
4383 11:08:46.746177 tx_first_pass[1][0][10] = 0
4384 11:08:46.746255 tx_last_pass[1][0][10] = 0
4385 11:08:46.749163 tx_win_center[1][0][11] = 0
4386 11:08:46.752523 tx_first_pass[1][0][11] = 0
4387 11:08:46.756322 tx_last_pass[1][0][11] = 0
4388 11:08:46.756400 tx_win_center[1][0][12] = 0
4389 11:08:46.759488 tx_first_pass[1][0][12] = 0
4390 11:08:46.762465 tx_last_pass[1][0][12] = 0
4391 11:08:46.766510 tx_win_center[1][0][13] = 0
4392 11:08:46.766588 tx_first_pass[1][0][13] = 0
4393 11:08:46.769023 tx_last_pass[1][0][13] = 0
4394 11:08:46.772463 tx_win_center[1][0][14] = 0
4395 11:08:46.775913 tx_first_pass[1][0][14] = 0
4396 11:08:46.775990 tx_last_pass[1][0][14] = 0
4397 11:08:46.779349 tx_win_center[1][0][15] = 0
4398 11:08:46.782697 tx_first_pass[1][0][15] = 0
4399 11:08:46.786176 tx_last_pass[1][0][15] = 0
4400 11:08:46.786254 tx_win_center[1][1][0] = 0
4401 11:08:46.789486 tx_first_pass[1][1][0] = 0
4402 11:08:46.792798 tx_last_pass[1][1][0] = 0
4403 11:08:46.795987 tx_win_center[1][1][1] = 0
4404 11:08:46.796064 tx_first_pass[1][1][1] = 0
4405 11:08:46.799188 tx_last_pass[1][1][1] = 0
4406 11:08:46.802666 tx_win_center[1][1][2] = 0
4407 11:08:46.802743 tx_first_pass[1][1][2] = 0
4408 11:08:46.805753 tx_last_pass[1][1][2] = 0
4409 11:08:46.809494 tx_win_center[1][1][3] = 0
4410 11:08:46.812676 tx_first_pass[1][1][3] = 0
4411 11:08:46.812753 tx_last_pass[1][1][3] = 0
4412 11:08:46.815849 tx_win_center[1][1][4] = 0
4413 11:08:46.819204 tx_first_pass[1][1][4] = 0
4414 11:08:46.823152 tx_last_pass[1][1][4] = 0
4415 11:08:46.823230 tx_win_center[1][1][5] = 0
4416 11:08:46.825805 tx_first_pass[1][1][5] = 0
4417 11:08:46.829318 tx_last_pass[1][1][5] = 0
4418 11:08:46.829396 tx_win_center[1][1][6] = 0
4419 11:08:46.832759 tx_first_pass[1][1][6] = 0
4420 11:08:46.836217 tx_last_pass[1][1][6] = 0
4421 11:08:46.839299 tx_win_center[1][1][7] = 0
4422 11:08:46.839377 tx_first_pass[1][1][7] = 0
4423 11:08:46.842661 tx_last_pass[1][1][7] = 0
4424 11:08:46.846361 tx_win_center[1][1][8] = 0
4425 11:08:46.846439 tx_first_pass[1][1][8] = 0
4426 11:08:46.849300 tx_last_pass[1][1][8] = 0
4427 11:08:46.853089 tx_win_center[1][1][9] = 0
4428 11:08:46.856048 tx_first_pass[1][1][9] = 0
4429 11:08:46.856146 tx_last_pass[1][1][9] = 0
4430 11:08:46.859437 tx_win_center[1][1][10] = 0
4431 11:08:46.862596 tx_first_pass[1][1][10] = 0
4432 11:08:46.866199 tx_last_pass[1][1][10] = 0
4433 11:08:46.866273 tx_win_center[1][1][11] = 0
4434 11:08:46.869314 tx_first_pass[1][1][11] = 0
4435 11:08:46.872927 tx_last_pass[1][1][11] = 0
4436 11:08:46.876345 tx_win_center[1][1][12] = 0
4437 11:08:46.876419 tx_first_pass[1][1][12] = 0
4438 11:08:46.879408 tx_last_pass[1][1][12] = 0
4439 11:08:46.882741 tx_win_center[1][1][13] = 0
4440 11:08:46.886380 tx_first_pass[1][1][13] = 0
4441 11:08:46.886453 tx_last_pass[1][1][13] = 0
4442 11:08:46.889563 tx_win_center[1][1][14] = 0
4443 11:08:46.892342 tx_first_pass[1][1][14] = 0
4444 11:08:46.895963 tx_last_pass[1][1][14] = 0
4445 11:08:46.896037 tx_win_center[1][1][15] = 0
4446 11:08:46.899323 tx_first_pass[1][1][15] = 0
4447 11:08:46.902467 tx_last_pass[1][1][15] = 0
4448 11:08:46.902541 dump params rx window
4449 11:08:46.905812 rx_firspass[0][0][0] = 0
4450 11:08:46.909093 rx_lastpass[0][0][0] = 0
4451 11:08:46.909215 rx_firspass[0][0][1] = 0
4452 11:08:46.912811 rx_lastpass[0][0][1] = 0
4453 11:08:46.916124 rx_firspass[0][0][2] = 0
4454 11:08:46.919879 rx_lastpass[0][0][2] = 0
4455 11:08:46.919953 rx_firspass[0][0][3] = 0
4456 11:08:46.922332 rx_lastpass[0][0][3] = 0
4457 11:08:46.926115 rx_firspass[0][0][4] = 0
4458 11:08:46.926189 rx_lastpass[0][0][4] = 0
4459 11:08:46.929079 rx_firspass[0][0][5] = 0
4460 11:08:46.932890 rx_lastpass[0][0][5] = 0
4461 11:08:46.932964 rx_firspass[0][0][6] = 0
4462 11:08:46.935627 rx_lastpass[0][0][6] = 0
4463 11:08:46.939215 rx_firspass[0][0][7] = 0
4464 11:08:46.939289 rx_lastpass[0][0][7] = 0
4465 11:08:46.942327 rx_firspass[0][0][8] = 0
4466 11:08:46.945623 rx_lastpass[0][0][8] = 0
4467 11:08:46.945696 rx_firspass[0][0][9] = 0
4468 11:08:46.949170 rx_lastpass[0][0][9] = 0
4469 11:08:46.952440 rx_firspass[0][0][10] = 0
4470 11:08:46.955543 rx_lastpass[0][0][10] = 0
4471 11:08:46.955621 rx_firspass[0][0][11] = 0
4472 11:08:46.958998 rx_lastpass[0][0][11] = 0
4473 11:08:46.962433 rx_firspass[0][0][12] = 0
4474 11:08:46.962510 rx_lastpass[0][0][12] = 0
4475 11:08:46.965847 rx_firspass[0][0][13] = 0
4476 11:08:46.969568 rx_lastpass[0][0][13] = 0
4477 11:08:46.972493 rx_firspass[0][0][14] = 0
4478 11:08:46.972570 rx_lastpass[0][0][14] = 0
4479 11:08:46.975824 rx_firspass[0][0][15] = 0
4480 11:08:46.979295 rx_lastpass[0][0][15] = 0
4481 11:08:46.979370 rx_firspass[0][1][0] = 0
4482 11:08:46.982906 rx_lastpass[0][1][0] = 0
4483 11:08:46.986042 rx_firspass[0][1][1] = 0
4484 11:08:46.986118 rx_lastpass[0][1][1] = 0
4485 11:08:46.989335 rx_firspass[0][1][2] = 0
4486 11:08:46.992525 rx_lastpass[0][1][2] = 0
4487 11:08:46.992600 rx_firspass[0][1][3] = 0
4488 11:08:46.995683 rx_lastpass[0][1][3] = 0
4489 11:08:46.998992 rx_firspass[0][1][4] = 0
4490 11:08:47.002628 rx_lastpass[0][1][4] = 0
4491 11:08:47.002703 rx_firspass[0][1][5] = 0
4492 11:08:47.005788 rx_lastpass[0][1][5] = 0
4493 11:08:47.008873 rx_firspass[0][1][6] = 0
4494 11:08:47.008948 rx_lastpass[0][1][6] = 0
4495 11:08:47.012296 rx_firspass[0][1][7] = 0
4496 11:08:47.015532 rx_lastpass[0][1][7] = 0
4497 11:08:47.015630 rx_firspass[0][1][8] = 0
4498 11:08:47.019251 rx_lastpass[0][1][8] = 0
4499 11:08:47.022476 rx_firspass[0][1][9] = 0
4500 11:08:47.022551 rx_lastpass[0][1][9] = 0
4501 11:08:47.025961 rx_firspass[0][1][10] = 0
4502 11:08:47.029361 rx_lastpass[0][1][10] = 0
4503 11:08:47.032554 rx_firspass[0][1][11] = 0
4504 11:08:47.032632 rx_lastpass[0][1][11] = 0
4505 11:08:47.036018 rx_firspass[0][1][12] = 0
4506 11:08:47.039178 rx_lastpass[0][1][12] = 0
4507 11:08:47.039255 rx_firspass[0][1][13] = 0
4508 11:08:47.042456 rx_lastpass[0][1][13] = 0
4509 11:08:47.045793 rx_firspass[0][1][14] = 0
4510 11:08:47.049040 rx_lastpass[0][1][14] = 0
4511 11:08:47.049163 rx_firspass[0][1][15] = 0
4512 11:08:47.052581 rx_lastpass[0][1][15] = 0
4513 11:08:47.055696 rx_firspass[1][0][0] = 0
4514 11:08:47.055794 rx_lastpass[1][0][0] = 0
4515 11:08:47.058951 rx_firspass[1][0][1] = 0
4516 11:08:47.062326 rx_lastpass[1][0][1] = 0
4517 11:08:47.062400 rx_firspass[1][0][2] = 0
4518 11:08:47.066052 rx_lastpass[1][0][2] = 0
4519 11:08:47.068948 rx_firspass[1][0][3] = 0
4520 11:08:47.069045 rx_lastpass[1][0][3] = 0
4521 11:08:47.072601 rx_firspass[1][0][4] = 0
4522 11:08:47.075434 rx_lastpass[1][0][4] = 0
4523 11:08:47.079255 rx_firspass[1][0][5] = 0
4524 11:08:47.079329 rx_lastpass[1][0][5] = 0
4525 11:08:47.082447 rx_firspass[1][0][6] = 0
4526 11:08:47.085410 rx_lastpass[1][0][6] = 0
4527 11:08:47.085484 rx_firspass[1][0][7] = 0
4528 11:08:47.088928 rx_lastpass[1][0][7] = 0
4529 11:08:47.092245 rx_firspass[1][0][8] = 0
4530 11:08:47.092319 rx_lastpass[1][0][8] = 0
4531 11:08:47.095788 rx_firspass[1][0][9] = 0
4532 11:08:47.098779 rx_lastpass[1][0][9] = 0
4533 11:08:47.098853 rx_firspass[1][0][10] = 0
4534 11:08:47.102076 rx_lastpass[1][0][10] = 0
4535 11:08:47.105463 rx_firspass[1][0][11] = 0
4536 11:08:47.108846 rx_lastpass[1][0][11] = 0
4537 11:08:47.108919 rx_firspass[1][0][12] = 0
4538 11:08:47.112411 rx_lastpass[1][0][12] = 0
4539 11:08:47.115621 rx_firspass[1][0][13] = 0
4540 11:08:47.115695 rx_lastpass[1][0][13] = 0
4541 11:08:47.118939 rx_firspass[1][0][14] = 0
4542 11:08:47.122525 rx_lastpass[1][0][14] = 0
4543 11:08:47.125388 rx_firspass[1][0][15] = 0
4544 11:08:47.125462 rx_lastpass[1][0][15] = 0
4545 11:08:47.129126 rx_firspass[1][1][0] = 0
4546 11:08:47.132110 rx_lastpass[1][1][0] = 0
4547 11:08:47.132186 rx_firspass[1][1][1] = 0
4548 11:08:47.135968 rx_lastpass[1][1][1] = 0
4549 11:08:47.138984 rx_firspass[1][1][2] = 0
4550 11:08:47.139059 rx_lastpass[1][1][2] = 0
4551 11:08:47.142067 rx_firspass[1][1][3] = 0
4552 11:08:47.145494 rx_lastpass[1][1][3] = 0
4553 11:08:47.145569 rx_firspass[1][1][4] = 0
4554 11:08:47.148723 rx_lastpass[1][1][4] = 0
4555 11:08:47.152573 rx_firspass[1][1][5] = 0
4556 11:08:47.152648 rx_lastpass[1][1][5] = 0
4557 11:08:47.155549 rx_firspass[1][1][6] = 0
4558 11:08:47.158867 rx_lastpass[1][1][6] = 0
4559 11:08:47.158942 rx_firspass[1][1][7] = 0
4560 11:08:47.162693 rx_lastpass[1][1][7] = 0
4561 11:08:47.165372 rx_firspass[1][1][8] = 0
4562 11:08:47.168714 rx_lastpass[1][1][8] = 0
4563 11:08:47.168789 rx_firspass[1][1][9] = 0
4564 11:08:47.172176 rx_lastpass[1][1][9] = 0
4565 11:08:47.175806 rx_firspass[1][1][10] = 0
4566 11:08:47.175881 rx_lastpass[1][1][10] = 0
4567 11:08:47.179106 rx_firspass[1][1][11] = 0
4568 11:08:47.182393 rx_lastpass[1][1][11] = 0
4569 11:08:47.182467 rx_firspass[1][1][12] = 0
4570 11:08:47.185482 rx_lastpass[1][1][12] = 0
4571 11:08:47.188642 rx_firspass[1][1][13] = 0
4572 11:08:47.192237 rx_lastpass[1][1][13] = 0
4573 11:08:47.192312 rx_firspass[1][1][14] = 0
4574 11:08:47.195394 rx_lastpass[1][1][14] = 0
4575 11:08:47.199296 rx_firspass[1][1][15] = 0
4576 11:08:47.199371 rx_lastpass[1][1][15] = 0
4577 11:08:47.202354 dump params clk_delay
4578 11:08:47.205756 clk_delay[0] = 0
4579 11:08:47.205831 clk_delay[1] = 0
4580 11:08:47.208759 dump params dqs_delay
4581 11:08:47.208834 dqs_delay[0][0] = 0
4582 11:08:47.212231 dqs_delay[0][1] = 0
4583 11:08:47.212305 dqs_delay[1][0] = 0
4584 11:08:47.215542 dqs_delay[1][1] = 0
4585 11:08:47.218860 dump params delay_cell_unit = 762
4586 11:08:47.218936 dump source = 0x0
4587 11:08:47.222698 dump params frequency:800
4588 11:08:47.225862 dump params rank number:2
4589 11:08:47.225936
4590 11:08:47.225994 dump params write leveling
4591 11:08:47.229028 write leveling[0][0][0] = 0x0
4592 11:08:47.232309 write leveling[0][0][1] = 0x0
4593 11:08:47.235736 write leveling[0][1][0] = 0x0
4594 11:08:47.238962 write leveling[0][1][1] = 0x0
4595 11:08:47.239036 write leveling[1][0][0] = 0x0
4596 11:08:47.242236 write leveling[1][0][1] = 0x0
4597 11:08:47.245487 write leveling[1][1][0] = 0x0
4598 11:08:47.248879 write leveling[1][1][1] = 0x0
4599 11:08:47.248954 dump params cbt_cs
4600 11:08:47.252338 cbt_cs[0][0] = 0x0
4601 11:08:47.252412 cbt_cs[0][1] = 0x0
4602 11:08:47.255498 cbt_cs[1][0] = 0x0
4603 11:08:47.255575 cbt_cs[1][1] = 0x0
4604 11:08:47.258736 dump params cbt_mr12
4605 11:08:47.262354 cbt_mr12[0][0] = 0x0
4606 11:08:47.262429 cbt_mr12[0][1] = 0x0
4607 11:08:47.265510 cbt_mr12[1][0] = 0x0
4608 11:08:47.265584 cbt_mr12[1][1] = 0x0
4609 11:08:47.268922 dump params tx window
4610 11:08:47.272300 tx_center_min[0][0][0] = 0
4611 11:08:47.272375 tx_center_max[0][0][0] = 0
4612 11:08:47.275402 tx_center_min[0][0][1] = 0
4613 11:08:47.278628 tx_center_max[0][0][1] = 0
4614 11:08:47.278703 tx_center_min[0][1][0] = 0
4615 11:08:47.281967 tx_center_max[0][1][0] = 0
4616 11:08:47.285337 tx_center_min[0][1][1] = 0
4617 11:08:47.288618 tx_center_max[0][1][1] = 0
4618 11:08:47.288693 tx_center_min[1][0][0] = 0
4619 11:08:47.291906 tx_center_max[1][0][0] = 0
4620 11:08:47.295191 tx_center_min[1][0][1] = 0
4621 11:08:47.298494 tx_center_max[1][0][1] = 0
4622 11:08:47.298570 tx_center_min[1][1][0] = 0
4623 11:08:47.301965 tx_center_max[1][1][0] = 0
4624 11:08:47.305569 tx_center_min[1][1][1] = 0
4625 11:08:47.308476 tx_center_max[1][1][1] = 0
4626 11:08:47.308552 dump params tx window
4627 11:08:47.312060 tx_win_center[0][0][0] = 0
4628 11:08:47.315251 tx_first_pass[0][0][0] = 0
4629 11:08:47.315327 tx_last_pass[0][0][0] = 0
4630 11:08:47.318996 tx_win_center[0][0][1] = 0
4631 11:08:47.321930 tx_first_pass[0][0][1] = 0
4632 11:08:47.325010 tx_last_pass[0][0][1] = 0
4633 11:08:47.325085 tx_win_center[0][0][2] = 0
4634 11:08:47.328708 tx_first_pass[0][0][2] = 0
4635 11:08:47.331976 tx_last_pass[0][0][2] = 0
4636 11:08:47.332051 tx_win_center[0][0][3] = 0
4637 11:08:47.335792 tx_first_pass[0][0][3] = 0
4638 11:08:47.338799 tx_last_pass[0][0][3] = 0
4639 11:08:47.341770 tx_win_center[0][0][4] = 0
4640 11:08:47.341845 tx_first_pass[0][0][4] = 0
4641 11:08:47.345568 tx_last_pass[0][0][4] = 0
4642 11:08:47.348881 tx_win_center[0][0][5] = 0
4643 11:08:47.351611 tx_first_pass[0][0][5] = 0
4644 11:08:47.351687 tx_last_pass[0][0][5] = 0
4645 11:08:47.354987 tx_win_center[0][0][6] = 0
4646 11:08:47.358479 tx_first_pass[0][0][6] = 0
4647 11:08:47.361568 tx_last_pass[0][0][6] = 0
4648 11:08:47.361644 tx_win_center[0][0][7] = 0
4649 11:08:47.365165 tx_first_pass[0][0][7] = 0
4650 11:08:47.368514 tx_last_pass[0][0][7] = 0
4651 11:08:47.368588 tx_win_center[0][0][8] = 0
4652 11:08:47.371609 tx_first_pass[0][0][8] = 0
4653 11:08:47.374946 tx_last_pass[0][0][8] = 0
4654 11:08:47.378093 tx_win_center[0][0][9] = 0
4655 11:08:47.378167 tx_first_pass[0][0][9] = 0
4656 11:08:47.381694 tx_last_pass[0][0][9] = 0
4657 11:08:47.385021 tx_win_center[0][0][10] = 0
4658 11:08:47.388869 tx_first_pass[0][0][10] = 0
4659 11:08:47.388942 tx_last_pass[0][0][10] = 0
4660 11:08:47.391734 tx_win_center[0][0][11] = 0
4661 11:08:47.395216 tx_first_pass[0][0][11] = 0
4662 11:08:47.398333 tx_last_pass[0][0][11] = 0
4663 11:08:47.398407 tx_win_center[0][0][12] = 0
4664 11:08:47.401499 tx_first_pass[0][0][12] = 0
4665 11:08:47.405046 tx_last_pass[0][0][12] = 0
4666 11:08:47.408429 tx_win_center[0][0][13] = 0
4667 11:08:47.408504 tx_first_pass[0][0][13] = 0
4668 11:08:47.411303 tx_last_pass[0][0][13] = 0
4669 11:08:47.415392 tx_win_center[0][0][14] = 0
4670 11:08:47.418286 tx_first_pass[0][0][14] = 0
4671 11:08:47.418361 tx_last_pass[0][0][14] = 0
4672 11:08:47.421629 tx_win_center[0][0][15] = 0
4673 11:08:47.424860 tx_first_pass[0][0][15] = 0
4674 11:08:47.428137 tx_last_pass[0][0][15] = 0
4675 11:08:47.428212 tx_win_center[0][1][0] = 0
4676 11:08:47.431782 tx_first_pass[0][1][0] = 0
4677 11:08:47.434878 tx_last_pass[0][1][0] = 0
4678 11:08:47.434954 tx_win_center[0][1][1] = 0
4679 11:08:47.438262 tx_first_pass[0][1][1] = 0
4680 11:08:47.442205 tx_last_pass[0][1][1] = 0
4681 11:08:47.445107 tx_win_center[0][1][2] = 0
4682 11:08:47.445227 tx_first_pass[0][1][2] = 0
4683 11:08:47.448574 tx_last_pass[0][1][2] = 0
4684 11:08:47.451824 tx_win_center[0][1][3] = 0
4685 11:08:47.455110 tx_first_pass[0][1][3] = 0
4686 11:08:47.455184 tx_last_pass[0][1][3] = 0
4687 11:08:47.458827 tx_win_center[0][1][4] = 0
4688 11:08:47.462035 tx_first_pass[0][1][4] = 0
4689 11:08:47.462109 tx_last_pass[0][1][4] = 0
4690 11:08:47.464984 tx_win_center[0][1][5] = 0
4691 11:08:47.468654 tx_first_pass[0][1][5] = 0
4692 11:08:47.471777 tx_last_pass[0][1][5] = 0
4693 11:08:47.471851 tx_win_center[0][1][6] = 0
4694 11:08:47.475201 tx_first_pass[0][1][6] = 0
4695 11:08:47.478641 tx_last_pass[0][1][6] = 0
4696 11:08:47.478714 tx_win_center[0][1][7] = 0
4697 11:08:47.481689 tx_first_pass[0][1][7] = 0
4698 11:08:47.485075 tx_last_pass[0][1][7] = 0
4699 11:08:47.488387 tx_win_center[0][1][8] = 0
4700 11:08:47.488460 tx_first_pass[0][1][8] = 0
4701 11:08:47.492182 tx_last_pass[0][1][8] = 0
4702 11:08:47.495525 tx_win_center[0][1][9] = 0
4703 11:08:47.495600 tx_first_pass[0][1][9] = 0
4704 11:08:47.498231 tx_last_pass[0][1][9] = 0
4705 11:08:47.501804 tx_win_center[0][1][10] = 0
4706 11:08:47.504919 tx_first_pass[0][1][10] = 0
4707 11:08:47.504995 tx_last_pass[0][1][10] = 0
4708 11:08:47.508794 tx_win_center[0][1][11] = 0
4709 11:08:47.512021 tx_first_pass[0][1][11] = 0
4710 11:08:47.515809 tx_last_pass[0][1][11] = 0
4711 11:08:47.515884 tx_win_center[0][1][12] = 0
4712 11:08:47.518566 tx_first_pass[0][1][12] = 0
4713 11:08:47.521727 tx_last_pass[0][1][12] = 0
4714 11:08:47.525329 tx_win_center[0][1][13] = 0
4715 11:08:47.525404 tx_first_pass[0][1][13] = 0
4716 11:08:47.528622 tx_last_pass[0][1][13] = 0
4717 11:08:47.531783 tx_win_center[0][1][14] = 0
4718 11:08:47.535129 tx_first_pass[0][1][14] = 0
4719 11:08:47.535209 tx_last_pass[0][1][14] = 0
4720 11:08:47.538809 tx_win_center[0][1][15] = 0
4721 11:08:47.542107 tx_first_pass[0][1][15] = 0
4722 11:08:47.545083 tx_last_pass[0][1][15] = 0
4723 11:08:47.545213 tx_win_center[1][0][0] = 0
4724 11:08:47.548479 tx_first_pass[1][0][0] = 0
4725 11:08:47.551865 tx_last_pass[1][0][0] = 0
4726 11:08:47.555356 tx_win_center[1][0][1] = 0
4727 11:08:47.555431 tx_first_pass[1][0][1] = 0
4728 11:08:47.558435 tx_last_pass[1][0][1] = 0
4729 11:08:47.561691 tx_win_center[1][0][2] = 0
4730 11:08:47.561766 tx_first_pass[1][0][2] = 0
4731 11:08:47.565636 tx_last_pass[1][0][2] = 0
4732 11:08:47.569092 tx_win_center[1][0][3] = 0
4733 11:08:47.571921 tx_first_pass[1][0][3] = 0
4734 11:08:47.572004 tx_last_pass[1][0][3] = 0
4735 11:08:47.575923 tx_win_center[1][0][4] = 0
4736 11:08:47.578328 tx_first_pass[1][0][4] = 0
4737 11:08:47.578430 tx_last_pass[1][0][4] = 0
4738 11:08:47.581656 tx_win_center[1][0][5] = 0
4739 11:08:47.585349 tx_first_pass[1][0][5] = 0
4740 11:08:47.588527 tx_last_pass[1][0][5] = 0
4741 11:08:47.588602 tx_win_center[1][0][6] = 0
4742 11:08:47.591904 tx_first_pass[1][0][6] = 0
4743 11:08:47.595029 tx_last_pass[1][0][6] = 0
4744 11:08:47.598771 tx_win_center[1][0][7] = 0
4745 11:08:47.598847 tx_first_pass[1][0][7] = 0
4746 11:08:47.601994 tx_last_pass[1][0][7] = 0
4747 11:08:47.605383 tx_win_center[1][0][8] = 0
4748 11:08:47.605458 tx_first_pass[1][0][8] = 0
4749 11:08:47.609181 tx_last_pass[1][0][8] = 0
4750 11:08:47.611901 tx_win_center[1][0][9] = 0
4751 11:08:47.615240 tx_first_pass[1][0][9] = 0
4752 11:08:47.615315 tx_last_pass[1][0][9] = 0
4753 11:08:47.618717 tx_win_center[1][0][10] = 0
4754 11:08:47.621893 tx_first_pass[1][0][10] = 0
4755 11:08:47.625159 tx_last_pass[1][0][10] = 0
4756 11:08:47.625271 tx_win_center[1][0][11] = 0
4757 11:08:47.628576 tx_first_pass[1][0][11] = 0
4758 11:08:47.631880 tx_last_pass[1][0][11] = 0
4759 11:08:47.635545 tx_win_center[1][0][12] = 0
4760 11:08:47.635620 tx_first_pass[1][0][12] = 0
4761 11:08:47.638624 tx_last_pass[1][0][12] = 0
4762 11:08:47.641776 tx_win_center[1][0][13] = 0
4763 11:08:47.645271 tx_first_pass[1][0][13] = 0
4764 11:08:47.645346 tx_last_pass[1][0][13] = 0
4765 11:08:47.648565 tx_win_center[1][0][14] = 0
4766 11:08:47.652006 tx_first_pass[1][0][14] = 0
4767 11:08:47.655348 tx_last_pass[1][0][14] = 0
4768 11:08:47.655423 tx_win_center[1][0][15] = 0
4769 11:08:47.659191 tx_first_pass[1][0][15] = 0
4770 11:08:47.662044 tx_last_pass[1][0][15] = 0
4771 11:08:47.664961 tx_win_center[1][1][0] = 0
4772 11:08:47.665058 tx_first_pass[1][1][0] = 0
4773 11:08:47.668440 tx_last_pass[1][1][0] = 0
4774 11:08:47.671986 tx_win_center[1][1][1] = 0
4775 11:08:47.675503 tx_first_pass[1][1][1] = 0
4776 11:08:47.675577 tx_last_pass[1][1][1] = 0
4777 11:08:47.678380 tx_win_center[1][1][2] = 0
4778 11:08:47.681569 tx_first_pass[1][1][2] = 0
4779 11:08:47.681643 tx_last_pass[1][1][2] = 0
4780 11:08:47.685128 tx_win_center[1][1][3] = 0
4781 11:08:47.688482 tx_first_pass[1][1][3] = 0
4782 11:08:47.691754 tx_last_pass[1][1][3] = 0
4783 11:08:47.691828 tx_win_center[1][1][4] = 0
4784 11:08:47.695124 tx_first_pass[1][1][4] = 0
4785 11:08:47.698519 tx_last_pass[1][1][4] = 0
4786 11:08:47.698594 tx_win_center[1][1][5] = 0
4787 11:08:47.701969 tx_first_pass[1][1][5] = 0
4788 11:08:47.705313 tx_last_pass[1][1][5] = 0
4789 11:08:47.708398 tx_win_center[1][1][6] = 0
4790 11:08:47.708482 tx_first_pass[1][1][6] = 0
4791 11:08:47.711973 tx_last_pass[1][1][6] = 0
4792 11:08:47.715147 tx_win_center[1][1][7] = 0
4793 11:08:47.718558 tx_first_pass[1][1][7] = 0
4794 11:08:47.718632 tx_last_pass[1][1][7] = 0
4795 11:08:47.721844 tx_win_center[1][1][8] = 0
4796 11:08:47.725171 tx_first_pass[1][1][8] = 0
4797 11:08:47.725260 tx_last_pass[1][1][8] = 0
4798 11:08:47.728591 tx_win_center[1][1][9] = 0
4799 11:08:47.731522 tx_first_pass[1][1][9] = 0
4800 11:08:47.734799 tx_last_pass[1][1][9] = 0
4801 11:08:47.734877 tx_win_center[1][1][10] = 0
4802 11:08:47.738955 tx_first_pass[1][1][10] = 0
4803 11:08:47.741777 tx_last_pass[1][1][10] = 0
4804 11:08:47.744994 tx_win_center[1][1][11] = 0
4805 11:08:47.745091 tx_first_pass[1][1][11] = 0
4806 11:08:47.748521 tx_last_pass[1][1][11] = 0
4807 11:08:47.751715 tx_win_center[1][1][12] = 0
4808 11:08:47.755229 tx_first_pass[1][1][12] = 0
4809 11:08:47.755304 tx_last_pass[1][1][12] = 0
4810 11:08:47.758526 tx_win_center[1][1][13] = 0
4811 11:08:47.761743 tx_first_pass[1][1][13] = 0
4812 11:08:47.764981 tx_last_pass[1][1][13] = 0
4813 11:08:47.765079 tx_win_center[1][1][14] = 0
4814 11:08:47.768163 tx_first_pass[1][1][14] = 0
4815 11:08:47.771540 tx_last_pass[1][1][14] = 0
4816 11:08:47.774819 tx_win_center[1][1][15] = 0
4817 11:08:47.774893 tx_first_pass[1][1][15] = 0
4818 11:08:47.778684 tx_last_pass[1][1][15] = 0
4819 11:08:47.781451 dump params rx window
4820 11:08:47.781525 rx_firspass[0][0][0] = 0
4821 11:08:47.784578 rx_lastpass[0][0][0] = 0
4822 11:08:47.788450 rx_firspass[0][0][1] = 0
4823 11:08:47.791271 rx_lastpass[0][0][1] = 0
4824 11:08:47.791369 rx_firspass[0][0][2] = 0
4825 11:08:47.794693 rx_lastpass[0][0][2] = 0
4826 11:08:47.798640 rx_firspass[0][0][3] = 0
4827 11:08:47.798723 rx_lastpass[0][0][3] = 0
4828 11:08:47.801459 rx_firspass[0][0][4] = 0
4829 11:08:47.804801 rx_lastpass[0][0][4] = 0
4830 11:08:47.804904 rx_firspass[0][0][5] = 0
4831 11:08:47.808368 rx_lastpass[0][0][5] = 0
4832 11:08:47.811523 rx_firspass[0][0][6] = 0
4833 11:08:47.811596 rx_lastpass[0][0][6] = 0
4834 11:08:47.814853 rx_firspass[0][0][7] = 0
4835 11:08:47.818001 rx_lastpass[0][0][7] = 0
4836 11:08:47.818075 rx_firspass[0][0][8] = 0
4837 11:08:47.821414 rx_lastpass[0][0][8] = 0
4838 11:08:47.824737 rx_firspass[0][0][9] = 0
4839 11:08:47.828042 rx_lastpass[0][0][9] = 0
4840 11:08:47.828116 rx_firspass[0][0][10] = 0
4841 11:08:47.831343 rx_lastpass[0][0][10] = 0
4842 11:08:47.834509 rx_firspass[0][0][11] = 0
4843 11:08:47.834603 rx_lastpass[0][0][11] = 0
4844 11:08:47.837894 rx_firspass[0][0][12] = 0
4845 11:08:47.841188 rx_lastpass[0][0][12] = 0
4846 11:08:47.844540 rx_firspass[0][0][13] = 0
4847 11:08:47.844615 rx_lastpass[0][0][13] = 0
4848 11:08:47.848249 rx_firspass[0][0][14] = 0
4849 11:08:47.851254 rx_lastpass[0][0][14] = 0
4850 11:08:47.851329 rx_firspass[0][0][15] = 0
4851 11:08:47.854727 rx_lastpass[0][0][15] = 0
4852 11:08:47.858073 rx_firspass[0][1][0] = 0
4853 11:08:47.861093 rx_lastpass[0][1][0] = 0
4854 11:08:47.861210 rx_firspass[0][1][1] = 0
4855 11:08:47.864327 rx_lastpass[0][1][1] = 0
4856 11:08:47.867685 rx_firspass[0][1][2] = 0
4857 11:08:47.867760 rx_lastpass[0][1][2] = 0
4858 11:08:47.871450 rx_firspass[0][1][3] = 0
4859 11:08:47.874452 rx_lastpass[0][1][3] = 0
4860 11:08:47.874527 rx_firspass[0][1][4] = 0
4861 11:08:47.877607 rx_lastpass[0][1][4] = 0
4862 11:08:47.880972 rx_firspass[0][1][5] = 0
4863 11:08:47.881047 rx_lastpass[0][1][5] = 0
4864 11:08:47.884628 rx_firspass[0][1][6] = 0
4865 11:08:47.887957 rx_lastpass[0][1][6] = 0
4866 11:08:47.888033 rx_firspass[0][1][7] = 0
4867 11:08:47.891047 rx_lastpass[0][1][7] = 0
4868 11:08:47.894227 rx_firspass[0][1][8] = 0
4869 11:08:47.894301 rx_lastpass[0][1][8] = 0
4870 11:08:47.898412 rx_firspass[0][1][9] = 0
4871 11:08:47.901125 rx_lastpass[0][1][9] = 0
4872 11:08:47.904455 rx_firspass[0][1][10] = 0
4873 11:08:47.904530 rx_lastpass[0][1][10] = 0
4874 11:08:47.907893 rx_firspass[0][1][11] = 0
4875 11:08:47.911118 rx_lastpass[0][1][11] = 0
4876 11:08:47.911193 rx_firspass[0][1][12] = 0
4877 11:08:47.914466 rx_lastpass[0][1][12] = 0
4878 11:08:47.917764 rx_firspass[0][1][13] = 0
4879 11:08:47.917839 rx_lastpass[0][1][13] = 0
4880 11:08:47.920975 rx_firspass[0][1][14] = 0
4881 11:08:47.924335 rx_lastpass[0][1][14] = 0
4882 11:08:47.928051 rx_firspass[0][1][15] = 0
4883 11:08:47.928127 rx_lastpass[0][1][15] = 0
4884 11:08:47.931391 rx_firspass[1][0][0] = 0
4885 11:08:47.934416 rx_lastpass[1][0][0] = 0
4886 11:08:47.934491 rx_firspass[1][0][1] = 0
4887 11:08:47.937942 rx_lastpass[1][0][1] = 0
4888 11:08:47.941090 rx_firspass[1][0][2] = 0
4889 11:08:47.941201 rx_lastpass[1][0][2] = 0
4890 11:08:47.944480 rx_firspass[1][0][3] = 0
4891 11:08:47.947824 rx_lastpass[1][0][3] = 0
4892 11:08:47.947899 rx_firspass[1][0][4] = 0
4893 11:08:47.951142 rx_lastpass[1][0][4] = 0
4894 11:08:47.954977 rx_firspass[1][0][5] = 0
4895 11:08:47.957697 rx_lastpass[1][0][5] = 0
4896 11:08:47.957774 rx_firspass[1][0][6] = 0
4897 11:08:47.961764 rx_lastpass[1][0][6] = 0
4898 11:08:47.965065 rx_firspass[1][0][7] = 0
4899 11:08:47.965163 rx_lastpass[1][0][7] = 0
4900 11:08:47.967782 rx_firspass[1][0][8] = 0
4901 11:08:47.971181 rx_lastpass[1][0][8] = 0
4902 11:08:47.971256 rx_firspass[1][0][9] = 0
4903 11:08:47.974771 rx_lastpass[1][0][9] = 0
4904 11:08:47.977975 rx_firspass[1][0][10] = 0
4905 11:08:47.978050 rx_lastpass[1][0][10] = 0
4906 11:08:47.981363 rx_firspass[1][0][11] = 0
4907 11:08:47.984691 rx_lastpass[1][0][11] = 0
4908 11:08:47.988127 rx_firspass[1][0][12] = 0
4909 11:08:47.988201 rx_lastpass[1][0][12] = 0
4910 11:08:47.991792 rx_firspass[1][0][13] = 0
4911 11:08:47.994981 rx_lastpass[1][0][13] = 0
4912 11:08:47.995055 rx_firspass[1][0][14] = 0
4913 11:08:47.998264 rx_lastpass[1][0][14] = 0
4914 11:08:48.002307 rx_firspass[1][0][15] = 0
4915 11:08:48.002381 rx_lastpass[1][0][15] = 0
4916 11:08:48.005046 rx_firspass[1][1][0] = 0
4917 11:08:48.008294 rx_lastpass[1][1][0] = 0
4918 11:08:48.011835 rx_firspass[1][1][1] = 0
4919 11:08:48.011910 rx_lastpass[1][1][1] = 0
4920 11:08:48.014782 rx_firspass[1][1][2] = 0
4921 11:08:48.018340 rx_lastpass[1][1][2] = 0
4922 11:08:48.018415 rx_firspass[1][1][3] = 0
4923 11:08:48.022921 rx_lastpass[1][1][3] = 0
4924 11:08:48.024937 rx_firspass[1][1][4] = 0
4925 11:08:48.025029 rx_lastpass[1][1][4] = 0
4926 11:08:48.028324 rx_firspass[1][1][5] = 0
4927 11:08:48.031985 rx_lastpass[1][1][5] = 0
4928 11:08:48.032060 rx_firspass[1][1][6] = 0
4929 11:08:48.035257 rx_lastpass[1][1][6] = 0
4930 11:08:48.038283 rx_firspass[1][1][7] = 0
4931 11:08:48.038358 rx_lastpass[1][1][7] = 0
4932 11:08:48.041697 rx_firspass[1][1][8] = 0
4933 11:08:48.044917 rx_lastpass[1][1][8] = 0
4934 11:08:48.044992 rx_firspass[1][1][9] = 0
4935 11:08:48.048704 rx_lastpass[1][1][9] = 0
4936 11:08:48.052058 rx_firspass[1][1][10] = 0
4937 11:08:48.055001 rx_lastpass[1][1][10] = 0
4938 11:08:48.055076 rx_firspass[1][1][11] = 0
4939 11:08:48.058365 rx_lastpass[1][1][11] = 0
4940 11:08:48.061852 rx_firspass[1][1][12] = 0
4941 11:08:48.061927 rx_lastpass[1][1][12] = 0
4942 11:08:48.065121 rx_firspass[1][1][13] = 0
4943 11:08:48.068235 rx_lastpass[1][1][13] = 0
4944 11:08:48.071575 rx_firspass[1][1][14] = 0
4945 11:08:48.071650 rx_lastpass[1][1][14] = 0
4946 11:08:48.074699 rx_firspass[1][1][15] = 0
4947 11:08:48.078360 rx_lastpass[1][1][15] = 0
4948 11:08:48.078435 dump params clk_delay
4949 11:08:48.081762 clk_delay[0] = 0
4950 11:08:48.081837 clk_delay[1] = 0
4951 11:08:48.085175 dump params dqs_delay
4952 11:08:48.085250 dqs_delay[0][0] = 0
4953 11:08:48.088201 dqs_delay[0][1] = 0
4954 11:08:48.088275 dqs_delay[1][0] = 0
4955 11:08:48.091369 dqs_delay[1][1] = 0
4956 11:08:48.095366 dump params delay_cell_unit = 762
4957 11:08:48.098272 mt_set_emi_preloader end
4958 11:08:48.101462 [mt_mem_init] dram size: 0x100000000, rank number: 2
4959 11:08:48.104614 [complex_mem_test] start addr:0x40000000, len:20480
4960 11:08:48.142757 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
4961 11:08:48.149197 [complex_mem_test] start addr:0x80000000, len:20480
4962 11:08:48.184988 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
4963 11:08:48.191408 [complex_mem_test] start addr:0xc0000000, len:20480
4964 11:08:48.227344 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
4965 11:08:48.234089 [complex_mem_test] start addr:0x56000000, len:8192
4966 11:08:48.250733 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
4967 11:08:48.254127 ddr_geometry:1
4968 11:08:48.257399 [complex_mem_test] start addr:0x80000000, len:8192
4969 11:08:48.274277 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
4970 11:08:48.277552 dram_init: dram init end (result: 0)
4971 11:08:48.284302 Successfully loaded DRAM blobs and ran DRAM calibration
4972 11:08:48.294564 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
4973 11:08:48.294640 CBMEM:
4974 11:08:48.297655 IMD: root @ 00000000fffff000 254 entries.
4975 11:08:48.300935 IMD: root @ 00000000ffffec00 62 entries.
4976 11:08:48.307975 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
4977 11:08:48.314455 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
4978 11:08:48.317737 in-header: 03 a1 00 00 08 00 00 00
4979 11:08:48.321330 in-data: 84 60 60 10 00 00 00 00
4980 11:08:48.324117 Chrome EC: clear events_b mask to 0x0000000020004000
4981 11:08:48.331636 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
4982 11:08:48.335193 in-header: 03 fd 00 00 00 00 00 00
4983 11:08:48.335269 in-data:
4984 11:08:48.341711 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
4985 11:08:48.341801 CBFS @ 21000 size 3d4000
4986 11:08:48.348297 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
4987 11:08:48.351556 CBFS: Locating 'fallback/ramstage'
4988 11:08:48.354898 CBFS: Found @ offset 10d40 size d563
4989 11:08:48.376231 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
4990 11:08:48.388566 Accumulated console time in romstage 12862 ms
4991 11:08:48.388642
4992 11:08:48.388700
4993 11:08:48.398336 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
4994 11:08:48.401804 ARM64: Exception handlers installed.
4995 11:08:48.401879 ARM64: Testing exception
4996 11:08:48.405127 ARM64: Done test exception
4997 11:08:48.408696 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
4998 11:08:48.411550 Manufacturer: ef
4999 11:08:48.414882 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5000 11:08:48.421649 WARNING: RO_VPD is uninitialized or empty.
5001 11:08:48.424846 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5002 11:08:48.428124 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5003 11:08:48.437791 read SPI 0x550600 0x3a00: 4533 us, 3275 KB/s, 26.200 Mbps
5004 11:08:48.441642 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5005 11:08:48.447994 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5006 11:08:48.448069 Enumerating buses...
5007 11:08:48.454890 Show all devs... Before device enumeration.
5008 11:08:48.454966 Root Device: enabled 1
5009 11:08:48.457965 CPU_CLUSTER: 0: enabled 1
5010 11:08:48.458040 CPU: 00: enabled 1
5011 11:08:48.461060 Compare with tree...
5012 11:08:48.464642 Root Device: enabled 1
5013 11:08:48.464716 CPU_CLUSTER: 0: enabled 1
5014 11:08:48.468067 CPU: 00: enabled 1
5015 11:08:48.471551 Root Device scanning...
5016 11:08:48.471626 root_dev_scan_bus for Root Device
5017 11:08:48.474329 CPU_CLUSTER: 0 enabled
5018 11:08:48.478578 root_dev_scan_bus for Root Device done
5019 11:08:48.481535 scan_bus: scanning of bus Root Device took 10689 usecs
5020 11:08:48.484737 done
5021 11:08:48.488024 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5022 11:08:48.491994 Allocating resources...
5023 11:08:48.492068 Reading resources...
5024 11:08:48.494642 Root Device read_resources bus 0 link: 0
5025 11:08:48.501692 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5026 11:08:48.501767 CPU: 00 missing read_resources
5027 11:08:48.508231 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5028 11:08:48.511361 Root Device read_resources bus 0 link: 0 done
5029 11:08:48.515124 Done reading resources.
5030 11:08:48.517912 Show resources in subtree (Root Device)...After reading.
5031 11:08:48.521296 Root Device child on link 0 CPU_CLUSTER: 0
5032 11:08:48.524488 CPU_CLUSTER: 0 child on link 0 CPU: 00
5033 11:08:48.534600 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5034 11:08:48.534675 CPU: 00
5035 11:08:48.537799 Setting resources...
5036 11:08:48.541472 Root Device assign_resources, bus 0 link: 0
5037 11:08:48.544368 CPU_CLUSTER: 0 missing set_resources
5038 11:08:48.547760 Root Device assign_resources, bus 0 link: 0
5039 11:08:48.550911 Done setting resources.
5040 11:08:48.558290 Show resources in subtree (Root Device)...After assigning values.
5041 11:08:48.561171 Root Device child on link 0 CPU_CLUSTER: 0
5042 11:08:48.564504 CPU_CLUSTER: 0 child on link 0 CPU: 00
5043 11:08:48.571207 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5044 11:08:48.574763 CPU: 00
5045 11:08:48.574837 Done allocating resources.
5046 11:08:48.580868 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5047 11:08:48.584228 Enabling resources...
5048 11:08:48.584303 done.
5049 11:08:48.587582 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5050 11:08:48.590932 Initializing devices...
5051 11:08:48.591007 Root Device init ...
5052 11:08:48.594308 mainboard_init: Starting display init.
5053 11:08:48.597899 ADC[4]: Raw value=76494 ID=0
5054 11:08:48.621081 anx7625_power_on_init: Init interface.
5055 11:08:48.624415 anx7625_disable_pd_protocol: Disabled PD feature.
5056 11:08:48.630815 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5057 11:08:48.677388 anx7625_start_dp_work: Secure OCM version=00
5058 11:08:48.680794 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5059 11:08:48.698129 sp_tx_get_edid_block: EDID Block = 1
5060 11:08:48.815354 Extracted contents:
5061 11:08:48.818456 header: 00 ff ff ff ff ff ff 00
5062 11:08:48.821565 serial number: 06 af 5c 14 00 00 00 00 00 1a
5063 11:08:48.825011 version: 01 04
5064 11:08:48.828442 basic params: 95 1a 0e 78 02
5065 11:08:48.831921 chroma info: 99 85 95 55 56 92 28 22 50 54
5066 11:08:48.835228 established: 00 00 00
5067 11:08:48.841735 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5068 11:08:48.844949 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5069 11:08:48.851459 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5070 11:08:48.858330 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5071 11:08:48.865002 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5072 11:08:48.868893 extensions: 00
5073 11:08:48.868969 checksum: ae
5074 11:08:48.869028
5075 11:08:48.871541 Manufacturer: AUO Model 145c Serial Number 0
5076 11:08:48.874944 Made week 0 of 2016
5077 11:08:48.875020 EDID version: 1.4
5078 11:08:48.878445 Digital display
5079 11:08:48.881670 6 bits per primary color channel
5080 11:08:48.881747 DisplayPort interface
5081 11:08:48.884563 Maximum image size: 26 cm x 14 cm
5082 11:08:48.888198 Gamma: 220%
5083 11:08:48.888274 Check DPMS levels
5084 11:08:48.891300 Supported color formats: RGB 4:4:4
5085 11:08:48.894993 First detailed timing is preferred timing
5086 11:08:48.898055 Established timings supported:
5087 11:08:48.901769 Standard timings supported:
5088 11:08:48.901844 Detailed timings
5089 11:08:48.908186 Hex of detail: ce1d56ea50001a3030204600009010000018
5090 11:08:48.911609 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5091 11:08:48.914938 0556 0586 05a6 0640 hborder 0
5092 11:08:48.918490 0300 0304 030a 031a vborder 0
5093 11:08:48.921818 -hsync -vsync
5094 11:08:48.924799 Did detailed timing
5095 11:08:48.928013 Hex of detail: 0000000f0000000000000000000000000020
5096 11:08:48.931368 Manufacturer-specified data, tag 15
5097 11:08:48.934639 Hex of detail: 000000fe0041554f0a202020202020202020
5098 11:08:48.938400 ASCII string: AUO
5099 11:08:48.942064 Hex of detail: 000000fe004231313658414230312e34200a
5100 11:08:48.944668 ASCII string: B116XAB01.4
5101 11:08:48.944743 Checksum
5102 11:08:48.948271 Checksum: 0xae (valid)
5103 11:08:48.954609 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5104 11:08:48.954686 DSI data_rate: 457800000 bps
5105 11:08:48.961884 anx7625_parse_edid: set default k value to 0x3d for panel
5106 11:08:48.965587 anx7625_parse_edid: pixelclock(76300).
5107 11:08:48.968983 hactive(1366), hsync(32), hfp(48), hbp(154)
5108 11:08:48.972356 vactive(768), vsync(6), vfp(4), vbp(16)
5109 11:08:48.975400 anx7625_dsi_config: config dsi.
5110 11:08:48.983775 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5111 11:08:49.004136 anx7625_dsi_config: success to config DSI
5112 11:08:49.007697 anx7625_dp_start: MIPI phy setup OK.
5113 11:08:49.010946 [SSUSB] Setting up USB HOST controller...
5114 11:08:49.014445 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5115 11:08:49.017634 [SSUSB] phy power-on done.
5116 11:08:49.021408 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5117 11:08:49.024842 in-header: 03 fc 01 00 00 00 00 00
5118 11:08:49.024918 in-data:
5119 11:08:49.031472 handle_proto3_response: EC response with error code: 1
5120 11:08:49.031547 SPM: pcm index = 1
5121 11:08:49.034839 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5122 11:08:49.038391 CBFS @ 21000 size 3d4000
5123 11:08:49.045012 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5124 11:08:49.048173 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5125 11:08:49.051565 CBFS: Found @ offset 1e7c0 size 1026
5126 11:08:49.057997 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5127 11:08:49.061557 SPM: binary array size = 2988
5128 11:08:49.064577 SPM: version = pcm_allinone_v1.17.2_20180829
5129 11:08:49.067886 SPM binary loaded in 32 msecs
5130 11:08:49.075665 spm_kick_im_to_fetch: ptr = 000000004021eec2
5131 11:08:49.078786 spm_kick_im_to_fetch: len = 2988
5132 11:08:49.078862 SPM: spm_kick_pcm_to_run
5133 11:08:49.082244 SPM: spm_kick_pcm_to_run done
5134 11:08:49.085636 SPM: spm_init done in 52 msecs
5135 11:08:49.089068 Root Device init finished in 494995 usecs
5136 11:08:49.092576 CPU_CLUSTER: 0 init ...
5137 11:08:49.102288 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5138 11:08:49.106090 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5139 11:08:49.106166 CBFS @ 21000 size 3d4000
5140 11:08:49.112687 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5141 11:08:49.115336 CBFS: Locating 'sspm.bin'
5142 11:08:49.119258 CBFS: Found @ offset 208c0 size 41cb
5143 11:08:49.128469 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5144 11:08:49.136959 CPU_CLUSTER: 0 init finished in 42805 usecs
5145 11:08:49.137037 Devices initialized
5146 11:08:49.140079 Show all devs... After init.
5147 11:08:49.143093 Root Device: enabled 1
5148 11:08:49.143170 CPU_CLUSTER: 0: enabled 1
5149 11:08:49.146713 CPU: 00: enabled 1
5150 11:08:49.150119 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5151 11:08:49.153610 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5152 11:08:49.156714 ELOG: NV offset 0x558000 size 0x1000
5153 11:08:49.164098 read SPI 0x558000 0x1000: 1263 us, 3243 KB/s, 25.944 Mbps
5154 11:08:49.171020 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5155 11:08:49.174287 ELOG: Event(17) added with size 13 at 2024-07-10 11:08:49 UTC
5156 11:08:49.177248 out: cmd=0x121: 03 db 21 01 00 00 00 00
5157 11:08:49.180813 in-header: 03 79 00 00 2c 00 00 00
5158 11:08:49.194141 in-data: 42 48 00 00 00 00 00 00 02 10 00 00 06 80 00 00 8a cd 01 00 06 80 00 00 7a d7 62 00 06 80 00 00 9c 48 02 00 06 80 00 00 5a 55 04 00
5159 11:08:49.197377 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5160 11:08:49.200637 in-header: 03 19 00 00 08 00 00 00
5161 11:08:49.204161 in-data: a2 e0 47 00 13 00 00 00
5162 11:08:49.208011 Chrome EC: UHEPI supported
5163 11:08:49.214294 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5164 11:08:49.217120 in-header: 03 e1 00 00 08 00 00 00
5165 11:08:49.220973 in-data: 84 20 60 10 00 00 00 00
5166 11:08:49.224340 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5167 11:08:49.230777 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5168 11:08:49.234238 in-header: 03 e1 00 00 08 00 00 00
5169 11:08:49.237411 in-data: 84 20 60 10 00 00 00 00
5170 11:08:49.244316 ELOG: Event(A1) added with size 10 at 2024-07-10 11:08:49 UTC
5171 11:08:49.250743 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5172 11:08:49.254370 ELOG: Event(A0) added with size 9 at 2024-07-10 11:08:49 UTC
5173 11:08:49.257613 elog_add_boot_reason: Logged dev mode boot
5174 11:08:49.260709 Finalize devices...
5175 11:08:49.264594 Devices finalized
5176 11:08:49.267665 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5177 11:08:49.270924 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5178 11:08:49.277659 ELOG: Event(91) added with size 10 at 2024-07-10 11:08:49 UTC
5179 11:08:49.281041 Writing coreboot table at 0xffeda000
5180 11:08:49.284352 0. 0000000000114000-000000000011efff: RAMSTAGE
5181 11:08:49.287791 1. 0000000040000000-000000004023cfff: RAMSTAGE
5182 11:08:49.294303 2. 000000004023d000-00000000545fffff: RAM
5183 11:08:49.297660 3. 0000000054600000-000000005465ffff: BL31
5184 11:08:49.300983 4. 0000000054660000-00000000ffed9fff: RAM
5185 11:08:49.307594 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5186 11:08:49.310523 6. 0000000100000000-000000013fffffff: RAM
5187 11:08:49.310598 Passing 5 GPIOs to payload:
5188 11:08:49.317330 NAME | PORT | POLARITY | VALUE
5189 11:08:49.320704 write protect | 0x00000096 | low | high
5190 11:08:49.327731 EC in RW | 0x000000b1 | high | undefined
5191 11:08:49.331114 EC interrupt | 0x00000097 | low | undefined
5192 11:08:49.334163 TPM interrupt | 0x00000099 | high | undefined
5193 11:08:49.340800 speaker enable | 0x000000af | high | undefined
5194 11:08:49.344067 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5195 11:08:49.347295 in-header: 03 f7 00 00 02 00 00 00
5196 11:08:49.347370 in-data: 04 00
5197 11:08:49.351047 Board ID: 4
5198 11:08:49.351124 ADC[3]: Raw value=1034274 ID=8
5199 11:08:49.354393 RAM code: 8
5200 11:08:49.354468 SKU ID: 16
5201 11:08:49.357304 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5202 11:08:49.361589 CBFS @ 21000 size 3d4000
5203 11:08:49.367458 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5204 11:08:49.373988 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 7103
5205 11:08:49.374063 coreboot table: 940 bytes.
5206 11:08:49.377786 IMD ROOT 0. 00000000fffff000 00001000
5207 11:08:49.381054 IMD SMALL 1. 00000000ffffe000 00001000
5208 11:08:49.384748 CONSOLE 2. 00000000fffde000 00020000
5209 11:08:49.390895 FMAP 3. 00000000fffdd000 0000047c
5210 11:08:49.394462 TIME STAMP 4. 00000000fffdc000 00000910
5211 11:08:49.397609 RAMOOPS 5. 00000000ffedc000 00100000
5212 11:08:49.400948 COREBOOT 6. 00000000ffeda000 00002000
5213 11:08:49.401023 IMD small region:
5214 11:08:49.404356 IMD ROOT 0. 00000000ffffec00 00000400
5215 11:08:49.410997 VBOOT WORK 1. 00000000ffffeb00 00000100
5216 11:08:49.414344 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5217 11:08:49.417320 VPD 3. 00000000ffffea60 0000006c
5218 11:08:49.420800 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5219 11:08:49.427736 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5220 11:08:49.430714 in-header: 03 e1 00 00 08 00 00 00
5221 11:08:49.435113 in-data: 84 20 60 10 00 00 00 00
5222 11:08:49.440595 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5223 11:08:49.440688 CBFS @ 21000 size 3d4000
5224 11:08:49.447394 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5225 11:08:49.450845 CBFS: Locating 'fallback/payload'
5226 11:08:49.458295 CBFS: Found @ offset dc040 size 439a0
5227 11:08:49.545883 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5228 11:08:49.549704 Checking segment from ROM address 0x0000000040003a00
5229 11:08:49.556329 Checking segment from ROM address 0x0000000040003a1c
5230 11:08:49.560249 Loading segment from ROM address 0x0000000040003a00
5231 11:08:49.562743 code (compression=0)
5232 11:08:49.572799 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5233 11:08:49.579483 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5234 11:08:49.582606 it's not compressed!
5235 11:08:49.586100 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5236 11:08:49.592506 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5237 11:08:49.600771 Loading segment from ROM address 0x0000000040003a1c
5238 11:08:49.603587 Entry Point 0x0000000080000000
5239 11:08:49.603662 Loaded segments
5240 11:08:49.610161 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5241 11:08:49.614024 Jumping to boot code at 0000000080000000(00000000ffeda000)
5242 11:08:49.623738 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5243 11:08:49.627161 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5244 11:08:49.630203 CBFS @ 21000 size 3d4000
5245 11:08:49.637101 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5246 11:08:49.640038 CBFS: Locating 'fallback/bl31'
5247 11:08:49.643986 CBFS: Found @ offset 36dc0 size 5820
5248 11:08:49.654672 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5249 11:08:49.657827 Checking segment from ROM address 0x0000000040003a00
5250 11:08:49.664266 Checking segment from ROM address 0x0000000040003a1c
5251 11:08:49.667336 Loading segment from ROM address 0x0000000040003a00
5252 11:08:49.670760 code (compression=1)
5253 11:08:49.677392 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5254 11:08:49.687884 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5255 11:08:49.687963 using LZMA
5256 11:08:49.696173 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5257 11:08:49.702779 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5258 11:08:49.706198 Loading segment from ROM address 0x0000000040003a1c
5259 11:08:49.709725 Entry Point 0x0000000054601000
5260 11:08:49.709799 Loaded segments
5261 11:08:49.712772 NOTICE: MT8183 bl31_setup
5262 11:08:49.719977 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5263 11:08:49.723215 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5264 11:08:49.726753 INFO: [DEVAPC] dump DEVAPC registers:
5265 11:08:49.737121 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5266 11:08:49.743760 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5267 11:08:49.750144 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5268 11:08:49.760627 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5269 11:08:49.770315 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5270 11:08:49.776972 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5271 11:08:49.783389 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5272 11:08:49.793225 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5273 11:08:49.800179 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5274 11:08:49.809996 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5275 11:08:49.816919 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5276 11:08:49.826806 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5277 11:08:49.833258 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5278 11:08:49.840010 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5279 11:08:49.849869 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5280 11:08:49.857271 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5281 11:08:49.863818 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5282 11:08:49.870375 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5283 11:08:49.876757 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5284 11:08:49.886759 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5285 11:08:49.893088 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5286 11:08:49.900149 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5287 11:08:49.903158 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5288 11:08:49.906649 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5289 11:08:49.909968 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5290 11:08:49.913901 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5291 11:08:49.917600 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5292 11:08:49.923396 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5293 11:08:49.926576 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5294 11:08:49.929807 WARNING: region 0:
5295 11:08:49.933093 WARNING: apc:0x168, sa:0x0, ea:0xfff
5296 11:08:49.933206 WARNING: region 1:
5297 11:08:49.936871 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5298 11:08:49.940298 WARNING: region 2:
5299 11:08:49.943194 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5300 11:08:49.946605 WARNING: region 3:
5301 11:08:49.949982 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5302 11:08:49.950058 WARNING: region 4:
5303 11:08:49.953177 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5304 11:08:49.956645 WARNING: region 5:
5305 11:08:49.959901 WARNING: apc:0x0, sa:0x0, ea:0x0
5306 11:08:49.959976 WARNING: region 6:
5307 11:08:49.963086 WARNING: apc:0x0, sa:0x0, ea:0x0
5308 11:08:49.966977 WARNING: region 7:
5309 11:08:49.969818 WARNING: apc:0x0, sa:0x0, ea:0x0
5310 11:08:49.976580 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5311 11:08:49.979753 INFO: SPM: enable SPMC mode
5312 11:08:49.983212 NOTICE: spm_boot_init() start
5313 11:08:49.983288 NOTICE: spm_boot_init() end
5314 11:08:49.989603 INFO: BL31: Initializing runtime services
5315 11:08:49.993123 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5316 11:08:49.999786 INFO: BL31: Preparing for EL3 exit to normal world
5317 11:08:50.003197 INFO: Entry point address = 0x80000000
5318 11:08:50.003272 INFO: SPSR = 0x8
5319 11:08:50.026517
5320 11:08:50.026592
5321 11:08:50.026650
5322 11:08:50.027064 end: 2.2.3 depthcharge-start (duration 00:00:24) [common]
5323 11:08:50.027152 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5324 11:08:50.027223 Setting prompt string to ['jacuzzi:']
5325 11:08:50.027286 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5326 11:08:50.029991 Starting depthcharge on Juniper...
5327 11:08:50.030067
5328 11:08:50.032997 vboot_handoff: creating legacy vboot_handoff structure
5329 11:08:50.033073
5330 11:08:50.036530 ec_init(0): CrosEC protocol v3 supported (544, 544)
5331 11:08:50.036605
5332 11:08:50.039673 Wipe memory regions:
5333 11:08:50.039747
5334 11:08:50.043298 [0x00000040000000, 0x00000054600000)
5335 11:08:50.085881
5336 11:08:50.085961 [0x00000054660000, 0x00000080000000)
5337 11:08:50.176943
5338 11:08:50.177048 [0x000000811994a0, 0x000000ffeda000)
5339 11:08:50.436446
5340 11:08:50.436569 [0x00000100000000, 0x00000140000000)
5341 11:08:50.569111
5342 11:08:50.572386 Initializing XHCI USB controller at 0x11200000.
5343 11:08:50.595133
5344 11:08:50.598444 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5345 11:08:50.598518
5346 11:08:50.598576
5347 11:08:50.598834 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5348 11:08:50.598908 Sending line: 'tftpboot 192.168.201.1 14786814/tftp-deploy-pxb2vzc_/kernel/image.itb 14786814/tftp-deploy-pxb2vzc_/kernel/cmdline '
5350 11:08:50.699352 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5351 11:08:50.699487 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5352 11:08:50.703940 jacuzzi: tftpboot 192.168.201.1 14786814/tftp-deploy-pxb2vzc_/kernel/image.ittp-deploy-pxb2vzc_/kernel/cmdline
5353 11:08:50.704015
5354 11:08:50.704074 Waiting for link
5355 11:08:51.108832
5356 11:08:51.108960 R8152: Initializing
5357 11:08:51.109018
5358 11:08:51.112260 Version 9 (ocp_data = 6010)
5359 11:08:51.112333
5360 11:08:51.115552 R8152: Done initializing
5361 11:08:51.115626
5362 11:08:51.115683 Adding net device
5363 11:08:51.501312
5364 11:08:51.501441 done.
5365 11:08:51.501499
5366 11:08:51.501553 MAC: 00:e0:4c:71:a7:1f
5367 11:08:51.501605
5368 11:08:51.504918 Sending DHCP discover... done.
5369 11:08:51.504992
5370 11:08:51.508010 Waiting for reply... done.
5371 11:08:51.508085
5372 11:08:51.511098 Sending DHCP request... done.
5373 11:08:51.511172
5374 11:08:51.511230 Waiting for reply... done.
5375 11:08:51.511283
5376 11:08:51.514781 My ip is 192.168.201.23
5377 11:08:51.514899
5378 11:08:51.518143 The DHCP server ip is 192.168.201.1
5379 11:08:51.518217
5380 11:08:51.521368 TFTP server IP predefined by user: 192.168.201.1
5381 11:08:51.521458
5382 11:08:51.528056 Bootfile predefined by user: 14786814/tftp-deploy-pxb2vzc_/kernel/image.itb
5383 11:08:51.528131
5384 11:08:51.531600 Sending tftp read request... done.
5385 11:08:51.531674
5386 11:08:51.534536 Waiting for the transfer...
5387 11:08:51.534610
5388 11:08:51.819049 00000000 ################################################################
5389 11:08:51.819176
5390 11:08:52.081644 00080000 ################################################################
5391 11:08:52.081770
5392 11:08:52.348899 00100000 ################################################################
5393 11:08:52.349013
5394 11:08:52.620826 00180000 ################################################################
5395 11:08:52.620943
5396 11:08:52.879689 00200000 ################################################################
5397 11:08:52.879823
5398 11:08:53.160076 00280000 ################################################################
5399 11:08:53.160186
5400 11:08:53.458903 00300000 ################################################################
5401 11:08:53.459051
5402 11:08:53.747374 00380000 ################################################################
5403 11:08:53.747488
5404 11:08:54.039546 00400000 ################################################################
5405 11:08:54.039672
5406 11:08:54.318998 00480000 ################################################################
5407 11:08:54.319113
5408 11:08:54.614187 00500000 ################################################################
5409 11:08:54.614310
5410 11:08:54.913670 00580000 ################################################################
5411 11:08:54.913801
5412 11:08:55.211363 00600000 ################################################################
5413 11:08:55.211492
5414 11:08:55.497645 00680000 ################################################################
5415 11:08:55.497774
5416 11:08:55.795027 00700000 ################################################################
5417 11:08:55.795140
5418 11:08:56.063900 00780000 ################################################################
5419 11:08:56.064028
5420 11:08:56.345346 00800000 ################################################################
5421 11:08:56.345503
5422 11:08:56.638901 00880000 ################################################################
5423 11:08:56.639031
5424 11:08:56.909712 00900000 ################################################################
5425 11:08:56.909843
5426 11:08:57.180102 00980000 ################################################################
5427 11:08:57.180250
5428 11:08:57.460438 00a00000 ################################################################
5429 11:08:57.460564
5430 11:08:57.724638 00a80000 ################################################################
5431 11:08:57.724787
5432 11:08:57.995964 00b00000 ################################################################
5433 11:08:57.996112
5434 11:08:58.257068 00b80000 ################################################################
5435 11:08:58.257233
5436 11:08:58.522529 00c00000 ################################################################
5437 11:08:58.522693
5438 11:08:58.786386 00c80000 ################################################################
5439 11:08:58.786507
5440 11:08:59.048361 00d00000 ################################################################
5441 11:08:59.048487
5442 11:08:59.337142 00d80000 ################################################################
5443 11:08:59.337272
5444 11:08:59.601350 00e00000 ################################################################
5445 11:08:59.601478
5446 11:08:59.867294 00e80000 ################################################################
5447 11:08:59.867428
5448 11:09:00.136672 00f00000 ################################################################
5449 11:09:00.136795
5450 11:09:00.395477 00f80000 ################################################################
5451 11:09:00.395609
5452 11:09:00.665127 01000000 ################################################################
5453 11:09:00.665301
5454 11:09:00.983697 01080000 ################################################################
5455 11:09:00.983854
5456 11:09:01.336375 01100000 ################################################################
5457 11:09:01.336530
5458 11:09:01.679971 01180000 ################################################################
5459 11:09:01.680128
5460 11:09:02.000949 01200000 ################################################################
5461 11:09:02.001091
5462 11:09:02.311303 01280000 ################################################################
5463 11:09:02.311431
5464 11:09:02.580191 01300000 ################################################################
5465 11:09:02.580314
5466 11:09:02.860404 01380000 ################################################################
5467 11:09:02.860601
5468 11:09:03.134826 01400000 ################################################################
5469 11:09:03.134954
5470 11:09:03.409910 01480000 ################################################################
5471 11:09:03.410049
5472 11:09:03.674487 01500000 ################################################################
5473 11:09:03.674658
5474 11:09:03.936747 01580000 ################################################################
5475 11:09:03.936875
5476 11:09:04.212792 01600000 ################################################################
5477 11:09:04.212907
5478 11:09:04.474489 01680000 ################################################################
5479 11:09:04.474610
5480 11:09:04.735802 01700000 ################################################################
5481 11:09:04.735947
5482 11:09:05.006745 01780000 ################################################################
5483 11:09:05.006879
5484 11:09:05.280954 01800000 ################################################################
5485 11:09:05.281083
5486 11:09:05.558957 01880000 ################################################################
5487 11:09:05.559074
5488 11:09:05.835377 01900000 ################################################################
5489 11:09:05.835517
5490 11:09:06.103557 01980000 ################################################################
5491 11:09:06.103704
5492 11:09:06.371701 01a00000 ################################################################
5493 11:09:06.371813
5494 11:09:06.631585 01a80000 ################################################################
5495 11:09:06.631697
5496 11:09:06.885951 01b00000 ################################################################
5497 11:09:06.886086
5498 11:09:07.146132 01b80000 ################################################################
5499 11:09:07.146251
5500 11:09:07.414535 01c00000 ################################################################
5501 11:09:07.414648
5502 11:09:07.681242 01c80000 ################################################################
5503 11:09:07.681356
5504 11:09:07.950369 01d00000 ################################################################
5505 11:09:07.950483
5506 11:09:08.244350 01d80000 ################################################################
5507 11:09:08.244478
5508 11:09:08.529031 01e00000 ################################################################
5509 11:09:08.529165
5510 11:09:08.794574 01e80000 ################################################################
5511 11:09:08.794726
5512 11:09:09.070406 01f00000 ################################################################
5513 11:09:09.070520
5514 11:09:09.328717 01f80000 ################################################################
5515 11:09:09.328841
5516 11:09:09.598869 02000000 ################################################################
5517 11:09:09.598982
5518 11:09:09.871769 02080000 ################################################################
5519 11:09:09.871883
5520 11:09:10.134564 02100000 ################################################################
5521 11:09:10.134674
5522 11:09:10.394022 02180000 ################################################################
5523 11:09:10.394145
5524 11:09:10.650088 02200000 ################################################################
5525 11:09:10.650201
5526 11:09:10.917776 02280000 ################################################################
5527 11:09:10.917952
5528 11:09:11.180912 02300000 ################################################################
5529 11:09:11.181026
5530 11:09:11.432222 02380000 ################################################################
5531 11:09:11.432362
5532 11:09:11.689626 02400000 ################################################################
5533 11:09:11.689735
5534 11:09:11.946244 02480000 ################################################################
5535 11:09:11.946370
5536 11:09:12.218487 02500000 ################################################################
5537 11:09:12.218594
5538 11:09:12.479063 02580000 ################################################################
5539 11:09:12.479191
5540 11:09:12.751731 02600000 ################################################################
5541 11:09:12.751852
5542 11:09:13.034633 02680000 ################################################################
5543 11:09:13.034758
5544 11:09:13.320323 02700000 ################################################################
5545 11:09:13.320479
5546 11:09:13.579748 02780000 ################################################################
5547 11:09:13.579902
5548 11:09:13.844524 02800000 ################################################################
5549 11:09:13.844668
5550 11:09:14.124207 02880000 ################################################################
5551 11:09:14.124353
5552 11:09:14.410827 02900000 ################################################################
5553 11:09:14.410962
5554 11:09:14.782325 02980000 ################################################################
5555 11:09:14.782448
5556 11:09:15.139868 02a00000 ################################################################
5557 11:09:15.140480
5558 11:09:15.514829 02a80000 ################################################################
5559 11:09:15.514959
5560 11:09:15.813534 02b00000 ################################################################
5561 11:09:15.813656
5562 11:09:16.114423 02b80000 ################################################################
5563 11:09:16.114550
5564 11:09:16.409458 02c00000 ################################################################
5565 11:09:16.409571
5566 11:09:16.707925 02c80000 ################################################################
5567 11:09:16.708043
5568 11:09:16.993413 02d00000 ################################################################
5569 11:09:16.993540
5570 11:09:17.290778 02d80000 ################################################################
5571 11:09:17.290900
5572 11:09:17.594630 02e00000 ################################################################
5573 11:09:17.594751
5574 11:09:17.896045 02e80000 ################################################################
5575 11:09:17.896365
5576 11:09:18.194585 02f00000 ################################################################
5577 11:09:18.194706
5578 11:09:18.486532 02f80000 ################################################################
5579 11:09:18.486650
5580 11:09:18.782686 03000000 ################################################################
5581 11:09:18.782813
5582 11:09:19.080508 03080000 ################################################################
5583 11:09:19.080633
5584 11:09:19.377093 03100000 ################################################################
5585 11:09:19.377254
5586 11:09:19.674221 03180000 ################################################################
5587 11:09:19.674344
5588 11:09:19.970988 03200000 ################################################################
5589 11:09:19.971102
5590 11:09:20.269043 03280000 ################################################################
5591 11:09:20.269203
5592 11:09:20.645780 03300000 ################################################################
5593 11:09:20.646278
5594 11:09:21.044750 03380000 ################################################################
5595 11:09:21.045266
5596 11:09:21.409956 03400000 ################################################################
5597 11:09:21.410421
5598 11:09:21.724444 03480000 ################################################################
5599 11:09:21.724558
5600 11:09:21.998429 03500000 ################################################################
5601 11:09:21.998533
5602 11:09:22.271034 03580000 ################################################################
5603 11:09:22.271142
5604 11:09:22.556285 03600000 ################################################################
5605 11:09:22.556389
5606 11:09:22.845438 03680000 ################################################################
5607 11:09:22.845551
5608 11:09:23.110719 03700000 ################################################################
5609 11:09:23.110830
5610 11:09:23.393850 03780000 ################################################################
5611 11:09:23.393960
5612 11:09:23.666058 03800000 ################################################################
5613 11:09:23.666160
5614 11:09:23.963393 03880000 ################################################################
5615 11:09:23.963501
5616 11:09:24.250423 03900000 ################################################################
5617 11:09:24.250534
5618 11:09:24.553382 03980000 ################################################################
5619 11:09:24.553496
5620 11:09:24.855861 03a00000 ################################################################
5621 11:09:24.855992
5622 11:09:25.237728 03a80000 ################################################################
5623 11:09:25.238211
5624 11:09:25.640474 03b00000 ################################################################
5625 11:09:25.640913
5626 11:09:25.911472 03b80000 ################################################################
5627 11:09:25.911583
5628 11:09:26.166280 03c00000 ################################################################
5629 11:09:26.166387
5630 11:09:26.420620 03c80000 ################################################################
5631 11:09:26.420727
5632 11:09:26.696775 03d00000 ################################################################
5633 11:09:26.696882
5634 11:09:26.976777 03d80000 ################################################################
5635 11:09:26.976886
5636 11:09:27.241739 03e00000 ################################################################
5637 11:09:27.241850
5638 11:09:27.503109 03e80000 ################################################################
5639 11:09:27.503217
5640 11:09:27.799048 03f00000 ################################################################
5641 11:09:27.799181
5642 11:09:28.169890 03f80000 ################################################################
5643 11:09:28.170325
5644 11:09:28.574028 04000000 ################################################################
5645 11:09:28.574460
5646 11:09:28.959534 04080000 ################################################################
5647 11:09:28.960091
5648 11:09:29.347321 04100000 ################################################################
5649 11:09:29.347758
5650 11:09:29.746888 04180000 ################################################################
5651 11:09:29.747342
5652 11:09:30.135430 04200000 ################################################################
5653 11:09:30.135542
5654 11:09:30.426997 04280000 ################################################################
5655 11:09:30.427104
5656 11:09:30.719452 04300000 ################################################################
5657 11:09:30.719560
5658 11:09:31.016448 04380000 ################################################################
5659 11:09:31.016562
5660 11:09:31.308600 04400000 ################################################################
5661 11:09:31.308714
5662 11:09:31.585208 04480000 ################################################################
5663 11:09:31.585323
5664 11:09:31.878013 04500000 ################################################################
5665 11:09:31.878124
5666 11:09:32.171766 04580000 ################################################################
5667 11:09:32.171883
5668 11:09:32.464413 04600000 ################################################################
5669 11:09:32.464528
5670 11:09:32.762627 04680000 ################################################################
5671 11:09:32.762742
5672 11:09:33.059290 04700000 ################################################################
5673 11:09:33.059403
5674 11:09:33.344397 04780000 ################################################################
5675 11:09:33.344515
5676 11:09:33.620563 04800000 ################################################################
5677 11:09:33.620678
5678 11:09:33.879791 04880000 ################################################################
5679 11:09:33.879907
5680 11:09:34.175434 04900000 ################################################################
5681 11:09:34.175539
5682 11:09:34.458691 04980000 ################################################################
5683 11:09:34.458799
5684 11:09:34.751828 04a00000 ################################################################
5685 11:09:34.751937
5686 11:09:35.047222 04a80000 ################################################################
5687 11:09:35.047337
5688 11:09:35.334304 04b00000 ################################################################
5689 11:09:35.334418
5690 11:09:35.625738 04b80000 ################################################################
5691 11:09:35.625848
5692 11:09:35.921685 04c00000 ################################################################
5693 11:09:35.921795
5694 11:09:36.219565 04c80000 ################################################################
5695 11:09:36.219676
5696 11:09:36.502089 04d00000 ################################################################
5697 11:09:36.502209
5698 11:09:36.785157 04d80000 ################################################################
5699 11:09:36.785269
5700 11:09:37.054845 04e00000 ################################################################
5701 11:09:37.054959
5702 11:09:37.317722 04e80000 ################################################################
5703 11:09:37.317832
5704 11:09:37.609857 04f00000 ################################################################
5705 11:09:37.609971
5706 11:09:37.884400 04f80000 ################################################################
5707 11:09:37.884510
5708 11:09:38.180438 05000000 ################################################################
5709 11:09:38.180548
5710 11:09:38.459700 05080000 ################################################################
5711 11:09:38.459811
5712 11:09:38.720103 05100000 ################################################################
5713 11:09:38.720216
5714 11:09:38.974062 05180000 ################################################################
5715 11:09:38.974170
5716 11:09:39.238694 05200000 ################################################################
5717 11:09:39.238803
5718 11:09:39.507627 05280000 ################################################################
5719 11:09:39.507772
5720 11:09:39.777030 05300000 ################################################################
5721 11:09:39.777204
5722 11:09:40.070099 05380000 ################################################################
5723 11:09:40.070236
5724 11:09:40.362522 05400000 ################################################################
5725 11:09:40.362630
5726 11:09:40.628837 05480000 ################################################################
5727 11:09:40.628947
5728 11:09:40.897895 05500000 ################################################################
5729 11:09:40.898007
5730 11:09:41.193140 05580000 ################################################################
5731 11:09:41.193273
5732 11:09:41.483117 05600000 ################################################################
5733 11:09:41.483226
5734 11:09:41.775834 05680000 ################################################################
5735 11:09:41.775945
5736 11:09:42.055226 05700000 ################################################################
5737 11:09:42.055357
5738 11:09:42.345684 05780000 ################################################################
5739 11:09:42.345795
5740 11:09:42.628452 05800000 ################################################################
5741 11:09:42.628570
5742 11:09:42.893971 05880000 ################################################################
5743 11:09:42.894083
5744 11:09:43.173868 05900000 ################################################################
5745 11:09:43.173976
5746 11:09:43.471430 05980000 ################################################################
5747 11:09:43.471540
5748 11:09:43.758512 05a00000 ################################################################
5749 11:09:43.758624
5750 11:09:44.015760 05a80000 ################################################################
5751 11:09:44.015892
5752 11:09:44.404135 05b00000 ################################################################
5753 11:09:44.404574
5754 11:09:44.793212 05b80000 ################################################################
5755 11:09:44.793684
5756 11:09:45.187426 05c00000 ################################################################
5757 11:09:45.187875
5758 11:09:45.576833 05c80000 ################################################################
5759 11:09:45.577313
5760 11:09:45.965820 05d00000 ################################################################
5761 11:09:45.966262
5762 11:09:46.352424 05d80000 ################################################################
5763 11:09:46.352869
5764 11:09:46.734091 05e00000 ################################################################
5765 11:09:46.734569
5766 11:09:47.127733 05e80000 ################################################################
5767 11:09:47.128168
5768 11:09:47.515683 05f00000 ################################################################
5769 11:09:47.516191
5770 11:09:47.911700 05f80000 ################################################################
5771 11:09:47.912148
5772 11:09:48.239401 06000000 ################################################################
5773 11:09:48.239515
5774 11:09:48.569325 06080000 ################################################################
5775 11:09:48.569756
5776 11:09:48.959605 06100000 ################################################################
5777 11:09:48.960049
5778 11:09:49.356777 06180000 ################################################################
5779 11:09:49.357259
5780 11:09:49.739135 06200000 ################################################################
5781 11:09:49.739585
5782 11:09:50.083677 06280000 ################################################################
5783 11:09:50.083789
5784 11:09:50.394202 06300000 ################################################################
5785 11:09:50.394315
5786 11:09:50.687071 06380000 ################################################################
5787 11:09:50.687180
5788 11:09:50.969891 06400000 ################################################################
5789 11:09:50.970003
5790 11:09:51.250557 06480000 ################################################################
5791 11:09:51.250675
5792 11:09:51.505989 06500000 ################################################################
5793 11:09:51.506102
5794 11:09:51.761930 06580000 ################################################################
5795 11:09:51.762045
5796 11:09:52.015694 06600000 ################################################################
5797 11:09:52.015815
5798 11:09:52.299336 06680000 ################################################################
5799 11:09:52.299458
5800 11:09:52.596012 06700000 ################################################################
5801 11:09:52.596132
5802 11:09:52.971615 06780000 ################################################################
5803 11:09:52.972075
5804 11:09:53.380065 06800000 ################################################################
5805 11:09:53.380716
5806 11:09:53.779402 06880000 ################################################################
5807 11:09:53.779970
5808 11:09:54.120252 06900000 ################################################################
5809 11:09:54.120466
5810 11:09:54.499080 06980000 ################################################################
5811 11:09:54.499541
5812 11:09:54.889994 06a00000 ################################################################
5813 11:09:54.890453
5814 11:09:55.317841 06a80000 ################################################################
5815 11:09:55.318322
5816 11:09:55.648281 06b00000 ################################################################
5817 11:09:55.648397
5818 11:09:55.951837 06b80000 ################################################################
5819 11:09:55.951975
5820 11:09:56.254497 06c00000 ################################################################
5821 11:09:56.254647
5822 11:09:56.557392 06c80000 ################################################################
5823 11:09:56.557539
5824 11:09:56.859940 06d00000 ################################################################
5825 11:09:56.860064
5826 11:09:57.156372 06d80000 ################################################################
5827 11:09:57.156497
5828 11:09:57.442949 06e00000 ################################################################
5829 11:09:57.443069
5830 11:09:57.730578 06e80000 ################################################################
5831 11:09:57.730703
5832 11:09:58.014413 06f00000 ################################################################
5833 11:09:58.014536
5834 11:09:58.301705 06f80000 ################################################################
5835 11:09:58.301846
5836 11:09:58.561049 07000000 ################################################################
5837 11:09:58.561233
5838 11:09:58.815218 07080000 ################################################################
5839 11:09:58.815363
5840 11:09:59.070634 07100000 ################################################################
5841 11:09:59.070756
5842 11:09:59.329610 07180000 ################################################################
5843 11:09:59.329756
5844 11:09:59.584283 07200000 ################################################################
5845 11:09:59.584429
5846 11:09:59.839242 07280000 ################################################################
5847 11:09:59.839366
5848 11:10:00.094325 07300000 ################################################################
5849 11:10:00.094474
5850 11:10:00.349856 07380000 ################################################################
5851 11:10:00.349978
5852 11:10:00.597537 07400000 ############################################################## done.
5853 11:10:00.597657
5854 11:10:00.600735 The bootfile was 122135030 bytes long.
5855 11:10:00.600863
5856 11:10:00.604097 Sending tftp read request... done.
5857 11:10:00.604175
5858 11:10:00.604234 Waiting for the transfer...
5859 11:10:00.607504
5860 11:10:00.607581 00000000 # done.
5861 11:10:00.607684
5862 11:10:00.613941 Command line loaded dynamically from TFTP file: 14786814/tftp-deploy-pxb2vzc_/kernel/cmdline
5863 11:10:00.614019
5864 11:10:00.630900 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5865 11:10:00.631013
5866 11:10:00.634155 Loading FIT.
5867 11:10:00.634258
5868 11:10:00.638353 Image ramdisk-1 has 108959034 bytes.
5869 11:10:00.638429
5870 11:10:00.640722 Image fdt-1 has 57695 bytes.
5871 11:10:00.640798
5872 11:10:00.640862 Image kernel-1 has 13116259 bytes.
5873 11:10:00.640920
5874 11:10:00.650960 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5875 11:10:00.651041
5876 11:10:00.664422 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5877 11:10:00.664524
5878 11:10:00.667430 Choosing best match conf-1 for compat google,juniper-sku16.
5879 11:10:00.673099
5880 11:10:00.677451 Connected to device vid:did:rid of 1ae0:0028:00
5881 11:10:00.685120
5882 11:10:00.689021 tpm_get_response: command 0x17b, return code 0x0
5883 11:10:00.689170
5884 11:10:00.692316 tpm_cleanup: add release locality here.
5885 11:10:00.692414
5886 11:10:00.695740 Shutting down all USB controllers.
5887 11:10:00.695840
5888 11:10:00.699460 Removing current net device
5889 11:10:00.699561
5890 11:10:00.702291 Exiting depthcharge with code 4 at timestamp: 87100228
5891 11:10:00.702390
5892 11:10:00.705594 LZMA decompressing kernel-1 to 0x80193568
5893 11:10:00.705670
5894 11:10:00.709130 LZMA decompressing kernel-1 to 0x40000000
5895 11:10:02.574865
5896 11:10:02.574980 jumping to kernel
5897 11:10:02.575555 end: 2.2.4 bootloader-commands (duration 00:01:13) [common]
5898 11:10:02.575648 start: 2.2.5 auto-login-action (timeout 00:03:14) [common]
5899 11:10:02.575716 Setting prompt string to ['Linux version [0-9]']
5900 11:10:02.575778 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5901 11:10:02.575840 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5902 11:10:02.650248
5903 11:10:02.653310 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5904 11:10:02.656531 start: 2.2.5.1 login-action (timeout 00:03:14) [common]
5905 11:10:02.656649 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5906 11:10:02.656718 Setting prompt string to []
5907 11:10:02.656789 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5908 11:10:02.656854 Using line separator: #'\n'#
5909 11:10:02.656907 No login prompt set.
5910 11:10:02.656964 Parsing kernel messages
5911 11:10:02.657014 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5912 11:10:02.657111 [login-action] Waiting for messages, (timeout 00:03:14)
5913 11:10:02.657211 Waiting using forced prompt support (timeout 00:01:37)
5914 11:10:02.676558 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j261272-arm64-gcc-12-defconfig-arm64-chromebook-bgdbp) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Wed Jul 10 10:43:20 UTC 2024
5915 11:10:02.680293 [ 0.000000] random: crng init done
5916 11:10:02.683534 [ 0.000000] Machine model: Google juniper sku16 board
5917 11:10:02.686557 [ 0.000000] efi: UEFI not found.
5918 11:10:02.696377 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5919 11:10:02.702923 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5920 11:10:02.709707 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5921 11:10:02.716819 [ 0.000000] printk: bootconsole [mtk8250] enabled
5922 11:10:02.723878 [ 0.000000] NUMA: No NUMA configuration found
5923 11:10:02.730646 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5924 11:10:02.736986 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5925 11:10:02.737062 [ 0.000000] Zone ranges:
5926 11:10:02.743515 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5927 11:10:02.747352 [ 0.000000] DMA32 empty
5928 11:10:02.753477 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5929 11:10:02.756866 [ 0.000000] Movable zone start for each node
5930 11:10:02.760327 [ 0.000000] Early memory node ranges
5931 11:10:02.767210 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5932 11:10:02.773703 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5933 11:10:02.780178 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5934 11:10:02.786907 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5935 11:10:02.793385 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5936 11:10:02.800357 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5937 11:10:02.820653 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5938 11:10:02.827234 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5939 11:10:02.834508 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5940 11:10:02.836950 [ 0.000000] psci: probing for conduit method from DT.
5941 11:10:02.843594 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5942 11:10:02.847246 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5943 11:10:02.853634 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5944 11:10:02.857351 [ 0.000000] psci: SMC Calling Convention v1.1
5945 11:10:02.863540 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5946 11:10:02.867192 [ 0.000000] Detected VIPT I-cache on CPU0
5947 11:10:02.873852 [ 0.000000] CPU features: detected: GIC system register CPU interface
5948 11:10:02.880223 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5949 11:10:02.886998 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5950 11:10:02.890555 [ 0.000000] CPU features: detected: ARM erratum 845719
5951 11:10:02.897067 [ 0.000000] alternatives: applying boot alternatives
5952 11:10:02.900450 [ 0.000000] Fallback order for Node 0: 0
5953 11:10:02.907066 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5954 11:10:02.910714 [ 0.000000] Policy zone: Normal
5955 11:10:02.930180 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5956 11:10:02.940604 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5957 11:10:02.951452 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5958 11:10:02.957902 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5959 11:10:02.963953 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5960 11:10:02.971297 <6>[ 0.000000] software IO TLB: area num 8.
5961 11:10:02.995837 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5962 11:10:03.053574 <6>[ 0.000000] Memory: 3808672K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 349792K reserved, 32768K cma-reserved)
5963 11:10:03.060438 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5964 11:10:03.066937 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5965 11:10:03.070237 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5966 11:10:03.076838 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5967 11:10:03.083501 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5968 11:10:03.086449 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5969 11:10:03.096576 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5970 11:10:03.103314 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5971 11:10:03.106809 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5972 11:10:03.118779 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5973 11:10:03.125071 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5974 11:10:03.128438 <6>[ 0.000000] GICv3: 640 SPIs implemented
5975 11:10:03.131989 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5976 11:10:03.135448 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5977 11:10:03.141893 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5978 11:10:03.148488 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5979 11:10:03.158585 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5980 11:10:03.172100 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5981 11:10:03.178421 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5982 11:10:03.190164 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5983 11:10:03.203802 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5984 11:10:03.209980 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5985 11:10:03.217209 <6>[ 0.009477] Console: colour dummy device 80x25
5986 11:10:03.220900 <6>[ 0.014507] printk: console [tty1] enabled
5987 11:10:03.230543 <6>[ 0.018898] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5988 11:10:03.237548 <6>[ 0.029364] pid_max: default: 32768 minimum: 301
5989 11:10:03.240998 <6>[ 0.034244] LSM: Security Framework initializing
5990 11:10:03.250476 <6>[ 0.039160] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5991 11:10:03.256962 <6>[ 0.046782] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5992 11:10:03.264200 <4>[ 0.055667] cacheinfo: Unable to detect cache hierarchy for CPU 0
5993 11:10:03.274125 <6>[ 0.062291] cblist_init_generic: Setting adjustable number of callback queues.
5994 11:10:03.277671 <6>[ 0.069737] cblist_init_generic: Setting shift to 3 and lim to 1.
5995 11:10:03.287234 <6>[ 0.076091] cblist_init_generic: Setting adjustable number of callback queues.
5996 11:10:03.293909 <6>[ 0.083535] cblist_init_generic: Setting shift to 3 and lim to 1.
5997 11:10:03.297521 <6>[ 0.089935] rcu: Hierarchical SRCU implementation.
5998 11:10:03.303567 <6>[ 0.094961] rcu: Max phase no-delay instances is 1000.
5999 11:10:03.310654 <6>[ 0.102877] EFI services will not be available.
6000 11:10:03.313896 <6>[ 0.107826] smp: Bringing up secondary CPUs ...
6001 11:10:03.324443 <6>[ 0.113093] Detected VIPT I-cache on CPU1
6002 11:10:03.330939 <4>[ 0.113139] cacheinfo: Unable to detect cache hierarchy for CPU 1
6003 11:10:03.337652 <6>[ 0.113147] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
6004 11:10:03.344446 <6>[ 0.113181] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
6005 11:10:03.347729 <6>[ 0.113660] Detected VIPT I-cache on CPU2
6006 11:10:03.354117 <4>[ 0.113694] cacheinfo: Unable to detect cache hierarchy for CPU 2
6007 11:10:03.361225 <6>[ 0.113699] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
6008 11:10:03.368010 <6>[ 0.113711] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
6009 11:10:03.370990 <6>[ 0.114157] Detected VIPT I-cache on CPU3
6010 11:10:03.378716 <4>[ 0.114187] cacheinfo: Unable to detect cache hierarchy for CPU 3
6011 11:10:03.387178 <6>[ 0.114191] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
6012 11:10:03.393839 <6>[ 0.114203] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
6013 11:10:03.397438 <6>[ 0.114778] CPU features: detected: Spectre-v2
6014 11:10:03.400566 <6>[ 0.114788] CPU features: detected: Spectre-BHB
6015 11:10:03.407307 <6>[ 0.114792] CPU features: detected: ARM erratum 858921
6016 11:10:03.410486 <6>[ 0.114797] Detected VIPT I-cache on CPU4
6017 11:10:03.417174 <4>[ 0.114846] cacheinfo: Unable to detect cache hierarchy for CPU 4
6018 11:10:03.423838 <6>[ 0.114854] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
6019 11:10:03.430929 <6>[ 0.114862] arch_timer: Enabling local workaround for ARM erratum 858921
6020 11:10:03.437586 <6>[ 0.114872] arch_timer: CPU4: Trapping CNTVCT access
6021 11:10:03.443700 <6>[ 0.114880] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
6022 11:10:03.447049 <6>[ 0.115365] Detected VIPT I-cache on CPU5
6023 11:10:03.453731 <4>[ 0.115405] cacheinfo: Unable to detect cache hierarchy for CPU 5
6024 11:10:03.460139 <6>[ 0.115411] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
6025 11:10:03.467053 <6>[ 0.115417] arch_timer: Enabling local workaround for ARM erratum 858921
6026 11:10:03.473898 <6>[ 0.115424] arch_timer: CPU5: Trapping CNTVCT access
6027 11:10:03.480777 <6>[ 0.115429] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
6028 11:10:03.483637 <6>[ 0.115965] Detected VIPT I-cache on CPU6
6029 11:10:03.489929 <4>[ 0.116011] cacheinfo: Unable to detect cache hierarchy for CPU 6
6030 11:10:03.497055 <6>[ 0.116017] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6031 11:10:03.506951 <6>[ 0.116024] arch_timer: Enabling local workaround for ARM erratum 858921
6032 11:10:03.510155 <6>[ 0.116030] arch_timer: CPU6: Trapping CNTVCT access
6033 11:10:03.517194 <6>[ 0.116035] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6034 11:10:03.520195 <6>[ 0.116565] Detected VIPT I-cache on CPU7
6035 11:10:03.527216 <4>[ 0.116609] cacheinfo: Unable to detect cache hierarchy for CPU 7
6036 11:10:03.533725 <6>[ 0.116615] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6037 11:10:03.543478 <6>[ 0.116622] arch_timer: Enabling local workaround for ARM erratum 858921
6038 11:10:03.547033 <6>[ 0.116629] arch_timer: CPU7: Trapping CNTVCT access
6039 11:10:03.553633 <6>[ 0.116634] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6040 11:10:03.557063 <6>[ 0.116682] smp: Brought up 1 node, 8 CPUs
6041 11:10:03.563340 <6>[ 0.355560] SMP: Total of 8 processors activated.
6042 11:10:03.570117 <6>[ 0.360495] CPU features: detected: 32-bit EL0 Support
6043 11:10:03.573218 <6>[ 0.365866] CPU features: detected: 32-bit EL1 Support
6044 11:10:03.580324 <6>[ 0.371232] CPU features: detected: CRC32 instructions
6045 11:10:03.583246 <6>[ 0.376657] CPU: All CPU(s) started at EL2
6046 11:10:03.590135 <6>[ 0.380995] alternatives: applying system-wide alternatives
6047 11:10:03.596686 <6>[ 0.389130] devtmpfs: initialized
6048 11:10:03.609311 <6>[ 0.398073] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
6049 11:10:03.618920 <6>[ 0.408020] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6050 11:10:03.623065 <6>[ 0.415739] pinctrl core: initialized pinctrl subsystem
6051 11:10:03.630845 <6>[ 0.422859] DMI not present or invalid.
6052 11:10:03.637168 <6>[ 0.427228] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6053 11:10:03.644092 <6>[ 0.434123] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6054 11:10:03.654046 <6>[ 0.441651] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6055 11:10:03.660888 <6>[ 0.449901] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6056 11:10:03.667415 <6>[ 0.458076] audit: initializing netlink subsys (disabled)
6057 11:10:03.673779 <5>[ 0.463783] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
6058 11:10:03.680566 <6>[ 0.464762] thermal_sys: Registered thermal governor 'step_wise'
6059 11:10:03.686915 <6>[ 0.471749] thermal_sys: Registered thermal governor 'power_allocator'
6060 11:10:03.690569 <6>[ 0.478049] cpuidle: using governor menu
6061 11:10:03.697401 <6>[ 0.489011] NET: Registered PF_QIPCRTR protocol family
6062 11:10:03.703545 <6>[ 0.494498] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6063 11:10:03.710873 <6>[ 0.501594] ASID allocator initialised with 32768 entries
6064 11:10:03.713720 <6>[ 0.508368] Serial: AMBA PL011 UART driver
6065 11:10:03.727621 <4>[ 0.519710] Trying to register duplicate clock ID: 113
6066 11:10:03.787202 <6>[ 0.576336] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6067 11:10:03.802021 <6>[ 0.590742] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6068 11:10:03.805172 <6>[ 0.600513] KASLR enabled
6069 11:10:03.819709 <6>[ 0.608476] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6070 11:10:03.825965 <6>[ 0.615479] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6071 11:10:03.832545 <6>[ 0.621955] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6072 11:10:03.839298 <6>[ 0.628946] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6073 11:10:03.846114 <6>[ 0.635420] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6074 11:10:03.853364 <6>[ 0.642409] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6075 11:10:03.859268 <6>[ 0.648882] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6076 11:10:03.865977 <6>[ 0.655873] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6077 11:10:03.869438 <6>[ 0.663442] ACPI: Interpreter disabled.
6078 11:10:03.879017 <6>[ 0.671424] iommu: Default domain type: Translated
6079 11:10:03.886264 <6>[ 0.676532] iommu: DMA domain TLB invalidation policy: strict mode
6080 11:10:03.889631 <5>[ 0.683163] SCSI subsystem initialized
6081 11:10:03.896126 <6>[ 0.687573] usbcore: registered new interface driver usbfs
6082 11:10:03.902455 <6>[ 0.693302] usbcore: registered new interface driver hub
6083 11:10:03.905671 <6>[ 0.698842] usbcore: registered new device driver usb
6084 11:10:03.912661 <6>[ 0.705152] pps_core: LinuxPPS API ver. 1 registered
6085 11:10:03.922861 <6>[ 0.710338] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6086 11:10:03.925965 <6>[ 0.719662] PTP clock support registered
6087 11:10:03.929386 <6>[ 0.723915] EDAC MC: Ver: 3.0.0
6088 11:10:03.937192 <6>[ 0.729544] FPGA manager framework
6089 11:10:03.943788 <6>[ 0.733230] Advanced Linux Sound Architecture Driver Initialized.
6090 11:10:03.947395 <6>[ 0.739990] vgaarb: loaded
6091 11:10:03.950779 <6>[ 0.743111] clocksource: Switched to clocksource arch_sys_counter
6092 11:10:03.957107 <5>[ 0.749541] VFS: Disk quotas dquot_6.6.0
6093 11:10:03.964087 <6>[ 0.753717] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6094 11:10:03.966981 <6>[ 0.760892] pnp: PnP ACPI: disabled
6095 11:10:03.975319 <6>[ 0.767761] NET: Registered PF_INET protocol family
6096 11:10:03.982007 <6>[ 0.772985] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6097 11:10:03.994000 <6>[ 0.782891] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6098 11:10:04.001353 <6>[ 0.791644] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6099 11:10:04.010421 <6>[ 0.799595] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6100 11:10:04.017181 <6>[ 0.807829] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6101 11:10:04.024310 <6>[ 0.815922] TCP: Hash tables configured (established 32768 bind 32768)
6102 11:10:04.033869 <6>[ 0.822749] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6103 11:10:04.040470 <6>[ 0.829723] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6104 11:10:04.047232 <6>[ 0.837205] NET: Registered PF_UNIX/PF_LOCAL protocol family
6105 11:10:04.054190 <6>[ 0.843335] RPC: Registered named UNIX socket transport module.
6106 11:10:04.057386 <6>[ 0.849480] RPC: Registered udp transport module.
6107 11:10:04.063488 <6>[ 0.854405] RPC: Registered tcp transport module.
6108 11:10:04.070307 <6>[ 0.859328] RPC: Registered tcp NFSv4.1 backchannel transport module.
6109 11:10:04.074346 <6>[ 0.865980] PCI: CLS 0 bytes, default 64
6110 11:10:04.076809 <6>[ 0.870267] Unpacking initramfs...
6111 11:10:04.091032 <6>[ 0.879756] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6112 11:10:04.100681 <6>[ 0.888382] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6113 11:10:04.104690 <6>[ 0.897237] kvm [1]: IPA Size Limit: 40 bits
6114 11:10:04.111588 <6>[ 0.903561] kvm [1]: vgic-v2@c420000
6115 11:10:04.114493 <6>[ 0.907377] kvm [1]: GIC system register CPU interface enabled
6116 11:10:04.121380 <6>[ 0.913551] kvm [1]: vgic interrupt IRQ18
6117 11:10:04.124535 <6>[ 0.917916] kvm [1]: Hyp mode initialized successfully
6118 11:10:04.132088 <5>[ 0.924231] Initialise system trusted keyrings
6119 11:10:04.138817 <6>[ 0.929063] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6120 11:10:04.146936 <6>[ 0.938886] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6121 11:10:04.153444 <5>[ 0.945341] NFS: Registering the id_resolver key type
6122 11:10:04.156442 <5>[ 0.950652] Key type id_resolver registered
6123 11:10:04.163165 <5>[ 0.955067] Key type id_legacy registered
6124 11:10:04.169940 <6>[ 0.959379] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6125 11:10:04.176519 <6>[ 0.966302] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6126 11:10:04.183359 <6>[ 0.974097] 9p: Installing v9fs 9p2000 file system support
6127 11:10:04.211482 <5>[ 1.003604] Key type asymmetric registered
6128 11:10:04.214913 <5>[ 1.007947] Asymmetric key parser 'x509' registered
6129 11:10:04.224974 <6>[ 1.013100] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6130 11:10:04.228164 <6>[ 1.020710] io scheduler mq-deadline registered
6131 11:10:04.231672 <6>[ 1.025465] io scheduler kyber registered
6132 11:10:04.254038 <6>[ 1.046173] EINJ: ACPI disabled.
6133 11:10:04.260452 <4>[ 1.049919] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6134 11:10:04.298527 <6>[ 1.090478] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6135 11:10:04.306823 <6>[ 1.098924] printk: console [ttyS0] disabled
6136 11:10:04.334795 <6>[ 1.123575] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6137 11:10:04.341079 <6>[ 1.133067] printk: console [ttyS0] enabled
6138 11:10:04.344903 <6>[ 1.133067] printk: console [ttyS0] enabled
6139 11:10:04.351772 <6>[ 1.141988] printk: bootconsole [mtk8250] disabled
6140 11:10:04.355413 <6>[ 1.141988] printk: bootconsole [mtk8250] disabled
6141 11:10:04.364593 <3>[ 1.152528] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6142 11:10:04.370885 <3>[ 1.160908] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6143 11:10:04.400398 <6>[ 1.189316] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6144 11:10:04.406888 <6>[ 1.198975] serial serial0: tty port ttyS1 registered
6145 11:10:04.413874 <6>[ 1.205544] SuperH (H)SCI(F) driver initialized
6146 11:10:04.416871 <6>[ 1.211013] msm_serial: driver initialized
6147 11:10:04.432254 <6>[ 1.221338] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6148 11:10:04.442876 <6>[ 1.229938] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6149 11:10:04.449327 <6>[ 1.238505] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6150 11:10:04.458672 <6>[ 1.247071] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6151 11:10:04.466084 <6>[ 1.255722] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6152 11:10:04.475731 <6>[ 1.264383] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6153 11:10:04.485507 <6>[ 1.273124] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6154 11:10:04.492067 <6>[ 1.281864] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6155 11:10:04.502018 <6>[ 1.290439] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6156 11:10:04.509233 <6>[ 1.299238] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6157 11:10:04.519484 <4>[ 1.311658] cacheinfo: Unable to detect cache hierarchy for CPU 0
6158 11:10:04.529054 <6>[ 1.320976] loop: module loaded
6159 11:10:04.540810 <6>[ 1.332874] vsim1: Bringing 1800000uV into 2700000-2700000uV
6160 11:10:04.558580 <6>[ 1.350754] megasas: 07.719.03.00-rc1
6161 11:10:04.567356 <6>[ 1.359468] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6162 11:10:04.574154 <6>[ 1.366500] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6163 11:10:04.591059 <6>[ 1.383309] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6164 11:10:04.647956 <6>[ 1.433587] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
6165 11:10:07.582501 <6>[ 4.374418] Freeing initrd memory: 106400K
6166 11:10:07.597699 <4>[ 4.386491] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6167 11:10:07.604275 <4>[ 4.395747] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
6168 11:10:07.611424 <4>[ 4.402446] Hardware name: Google juniper sku16 board (DT)
6169 11:10:07.614115 <4>[ 4.408185] Call trace:
6170 11:10:07.617359 <4>[ 4.410886] dump_backtrace.part.0+0xe0/0xf0
6171 11:10:07.621058 <4>[ 4.415423] show_stack+0x18/0x30
6172 11:10:07.623979 <4>[ 4.418996] dump_stack_lvl+0x64/0x80
6173 11:10:07.630550 <4>[ 4.422916] dump_stack+0x18/0x34
6174 11:10:07.634100 <4>[ 4.426485] sysfs_warn_dup+0x64/0x80
6175 11:10:07.637745 <4>[ 4.430407] sysfs_do_create_link_sd+0xf0/0x100
6176 11:10:07.640496 <4>[ 4.435194] sysfs_create_link+0x20/0x40
6177 11:10:07.647122 <4>[ 4.439373] bus_add_device+0x64/0x120
6178 11:10:07.650615 <4>[ 4.443379] device_add+0x354/0x7ec
6179 11:10:07.653963 <4>[ 4.447125] of_device_add+0x44/0x60
6180 11:10:07.660491 <4>[ 4.450959] of_platform_device_create_pdata+0x90/0x124
6181 11:10:07.663967 <4>[ 4.456441] of_platform_bus_create+0x154/0x380
6182 11:10:07.667960 <4>[ 4.461228] of_platform_populate+0x50/0xfc
6183 11:10:07.673901 <4>[ 4.465666] parse_mtd_partitions+0x1d8/0x4e0
6184 11:10:07.677441 <4>[ 4.470282] mtd_device_parse_register+0xec/0x2e0
6185 11:10:07.683554 <4>[ 4.475243] spi_nor_probe+0x280/0x2f4
6186 11:10:07.687075 <4>[ 4.479248] spi_mem_probe+0x6c/0xc0
6187 11:10:07.690190 <4>[ 4.483080] spi_probe+0x84/0xe4
6188 11:10:07.694334 <4>[ 4.486565] really_probe+0xbc/0x2dc
6189 11:10:07.697219 <4>[ 4.490396] __driver_probe_device+0x78/0x114
6190 11:10:07.703662 <4>[ 4.495008] driver_probe_device+0xd8/0x15c
6191 11:10:07.706581 <4>[ 4.499446] __device_attach_driver+0xb8/0x134
6192 11:10:07.710095 <4>[ 4.504143] bus_for_each_drv+0x7c/0xd4
6193 11:10:07.716578 <4>[ 4.508237] __device_attach+0x9c/0x1a0
6194 11:10:07.721089 <4>[ 4.512328] device_initial_probe+0x14/0x20
6195 11:10:07.723163 <4>[ 4.516766] bus_probe_device+0x98/0xa0
6196 11:10:07.726571 <4>[ 4.520856] device_add+0x3c0/0x7ec
6197 11:10:07.730022 <4>[ 4.524600] __spi_add_device+0x78/0x120
6198 11:10:07.736490 <4>[ 4.528778] spi_add_device+0x44/0x80
6199 11:10:07.740268 <4>[ 4.532695] spi_register_controller+0x704/0xb20
6200 11:10:07.746709 <4>[ 4.537567] devm_spi_register_controller+0x4c/0xac
6201 11:10:07.750156 <4>[ 4.542700] mtk_spi_probe+0x4f4/0x684
6202 11:10:07.753066 <4>[ 4.546705] platform_probe+0x68/0xc0
6203 11:10:07.757183 <4>[ 4.550623] really_probe+0xbc/0x2dc
6204 11:10:07.763043 <4>[ 4.554453] __driver_probe_device+0x78/0x114
6205 11:10:07.766621 <4>[ 4.559065] driver_probe_device+0xd8/0x15c
6206 11:10:07.769823 <4>[ 4.563503] __driver_attach+0x94/0x19c
6207 11:10:07.773002 <4>[ 4.567594] bus_for_each_dev+0x74/0xd0
6208 11:10:07.779809 <4>[ 4.571687] driver_attach+0x24/0x30
6209 11:10:07.783361 <4>[ 4.575516] bus_add_driver+0x154/0x20c
6210 11:10:07.786457 <4>[ 4.579607] driver_register+0x78/0x130
6211 11:10:07.793118 <4>[ 4.583697] __platform_driver_register+0x28/0x34
6212 11:10:07.796140 <4>[ 4.588658] mtk_spi_driver_init+0x1c/0x28
6213 11:10:07.799583 <4>[ 4.593014] do_one_initcall+0x64/0x1dc
6214 11:10:07.802829 <4>[ 4.597105] kernel_init_freeable+0x218/0x284
6215 11:10:07.809599 <4>[ 4.601720] kernel_init+0x24/0x12c
6216 11:10:07.812999 <4>[ 4.605464] ret_from_fork+0x10/0x20
6217 11:10:07.821923 <6>[ 4.614353] tun: Universal TUN/TAP device driver, 1.6
6218 11:10:07.825558 <6>[ 4.620648] thunder_xcv, ver 1.0
6219 11:10:07.828890 <6>[ 4.624164] thunder_bgx, ver 1.0
6220 11:10:07.832198 <6>[ 4.627670] nicpf, ver 1.0
6221 11:10:07.843308 <6>[ 4.632052] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6222 11:10:07.846521 <6>[ 4.639536] hns3: Copyright (c) 2017 Huawei Corporation.
6223 11:10:07.849952 <6>[ 4.645136] hclge is initializing
6224 11:10:07.856596 <6>[ 4.648728] e1000: Intel(R) PRO/1000 Network Driver
6225 11:10:07.863340 <6>[ 4.653863] e1000: Copyright (c) 1999-2006 Intel Corporation.
6226 11:10:07.866306 <6>[ 4.659886] e1000e: Intel(R) PRO/1000 Network Driver
6227 11:10:07.873183 <6>[ 4.665107] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6228 11:10:07.879855 <6>[ 4.671300] igb: Intel(R) Gigabit Ethernet Network Driver
6229 11:10:07.886647 <6>[ 4.676955] igb: Copyright (c) 2007-2014 Intel Corporation.
6230 11:10:07.893394 <6>[ 4.682798] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6231 11:10:07.899604 <6>[ 4.689322] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6232 11:10:07.902922 <6>[ 4.695881] sky2: driver version 1.30
6233 11:10:07.909993 <6>[ 4.701143] usbcore: registered new device driver r8152-cfgselector
6234 11:10:07.916339 <6>[ 4.707687] usbcore: registered new interface driver r8152
6235 11:10:07.922851 <6>[ 4.713515] VFIO - User Level meta-driver version: 0.3
6236 11:10:07.929777 <6>[ 4.721349] mtu3 11201000.usb: uwk - reg:0x420, version:101
6237 11:10:07.936175 <4>[ 4.727220] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6238 11:10:07.942745 <6>[ 4.734502] mtu3 11201000.usb: dr_mode: 1, drd: auto
6239 11:10:07.950067 <6>[ 4.739728] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6240 11:10:07.952756 <6>[ 4.745916] mtu3 11201000.usb: usb3-drd: 0
6241 11:10:07.963012 <6>[ 4.751522] mtu3 11201000.usb: xHCI platform device register success...
6242 11:10:07.969350 <4>[ 4.760170] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6243 11:10:07.975909 <6>[ 4.768102] xhci-mtk 11200000.usb: xHCI Host Controller
6244 11:10:07.982605 <6>[ 4.773606] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6245 11:10:07.989313 <6>[ 4.781325] xhci-mtk 11200000.usb: USB3 root hub has no ports
6246 11:10:07.999231 <6>[ 4.787333] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6247 11:10:08.006160 <6>[ 4.796758] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6248 11:10:08.012672 <6>[ 4.802836] xhci-mtk 11200000.usb: xHCI Host Controller
6249 11:10:08.019590 <6>[ 4.808326] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6250 11:10:08.025636 <6>[ 4.815983] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6251 11:10:08.029146 <6>[ 4.822801] hub 1-0:1.0: USB hub found
6252 11:10:08.032150 <6>[ 4.826832] hub 1-0:1.0: 1 port detected
6253 11:10:08.043737 <6>[ 4.832177] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6254 11:10:08.047169 <6>[ 4.840806] hub 2-0:1.0: USB hub found
6255 11:10:08.053864 <3>[ 4.844861] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6256 11:10:08.060264 <6>[ 4.852748] usbcore: registered new interface driver usb-storage
6257 11:10:08.067136 <6>[ 4.859340] usbcore: registered new device driver onboard-usb-hub
6258 11:10:08.078564 <4>[ 4.867211] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6259 11:10:08.087606 <6>[ 4.879464] mt6397-rtc mt6358-rtc: registered as rtc0
6260 11:10:08.097222 <6>[ 4.884945] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-10T11:10:08 UTC (1720609808)
6261 11:10:08.100347 <6>[ 4.894837] i2c_dev: i2c /dev entries driver
6262 11:10:08.112368 <6>[ 4.901247] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6263 11:10:08.122557 <6>[ 4.909564] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6264 11:10:08.125834 <6>[ 4.918467] i2c 4-0058: Fixed dependency cycle(s) with /panel
6265 11:10:08.135435 <6>[ 4.924499] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6266 11:10:08.152000 <6>[ 4.944015] cpu cpu0: EM: created perf domain
6267 11:10:08.161842 <6>[ 4.949549] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6268 11:10:08.168639 <6>[ 4.960841] cpu cpu4: EM: created perf domain
6269 11:10:08.175204 <6>[ 4.967608] sdhci: Secure Digital Host Controller Interface driver
6270 11:10:08.182457 <6>[ 4.974064] sdhci: Copyright(c) Pierre Ossman
6271 11:10:08.188614 <6>[ 4.979485] Synopsys Designware Multimedia Card Interface Driver
6272 11:10:08.195534 <6>[ 4.979991] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6273 11:10:08.199012 <6>[ 4.986574] sdhci-pltfm: SDHCI platform and OF driver helper
6274 11:10:08.207086 <6>[ 4.999161] ledtrig-cpu: registered to indicate activity on CPUs
6275 11:10:08.215122 <6>[ 5.006894] usbcore: registered new interface driver usbhid
6276 11:10:08.217865 <6>[ 5.012739] usbhid: USB HID core driver
6277 11:10:08.229095 <6>[ 5.017027] spi_master spi2: will run message pump with realtime priority
6278 11:10:08.235600 <4>[ 5.017280] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6279 11:10:08.242520 <4>[ 5.031393] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6280 11:10:08.260175 <6>[ 5.045886] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6281 11:10:08.278841 <6>[ 5.061359] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6282 11:10:08.285642 <4>[ 5.066699] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6283 11:10:08.288908 <6>[ 5.076804] cros-ec-spi spi2.0: Chrome EC device registered
6284 11:10:08.302221 <4>[ 5.090964] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6285 11:10:08.305726 <6>[ 5.097125] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6286 11:10:08.315577 <4>[ 5.101775] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6287 11:10:08.318828 <6>[ 5.104467] mmc0: new HS400 MMC card at address 0001
6288 11:10:08.325503 <4>[ 5.112826] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6289 11:10:08.331887 <6>[ 5.118246] mmcblk0: mmc0:0001 TB2932 29.2 GiB
6290 11:10:08.338527 <6>[ 5.128545] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6291 11:10:08.345446 <6>[ 5.134408] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6292 11:10:08.351990 <6>[ 5.143222] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
6293 11:10:08.358121 <6>[ 5.149653] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
6294 11:10:08.365053 <6>[ 5.156045] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
6295 11:10:08.375320 <6>[ 5.161489] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6296 11:10:08.390047 <6>[ 5.175758] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6297 11:10:08.400410 <6>[ 5.183757] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6298 11:10:08.407096 <6>[ 5.187599] NET: Registered PF_PACKET protocol family
6299 11:10:08.416748 <6>[ 5.199152] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6300 11:10:08.420799 <6>[ 5.204086] 9pnet: Installing 9P2000 support
6301 11:10:08.426866 <5>[ 5.218502] Key type dns_resolver registered
6302 11:10:08.430143 <6>[ 5.223445] registered taskstats version 1
6303 11:10:08.436579 <5>[ 5.227810] Loading compiled-in X.509 certificates
6304 11:10:08.466425 <6>[ 5.255445] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6305 11:10:08.473253 <3>[ 5.261358] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6306 11:10:08.503904 <6>[ 5.289581] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6307 11:10:08.514449 <6>[ 5.303009] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6308 11:10:08.524301 <6>[ 5.311583] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6309 11:10:08.531122 <6>[ 5.320112] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6310 11:10:08.540967 <6>[ 5.328637] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6311 11:10:08.547777 <6>[ 5.337160] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6312 11:10:08.557813 <6>[ 5.345682] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6313 11:10:08.564984 <6>[ 5.354202] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6314 11:10:08.571365 <6>[ 5.363303] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6315 11:10:08.579116 <6>[ 5.370679] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6316 11:10:08.586178 <6>[ 5.377872] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6317 11:10:08.596847 <6>[ 5.385023] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6318 11:10:08.603342 <6>[ 5.392359] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6319 11:10:08.610004 <6>[ 5.400502] panfrost 13040000.gpu: clock rate = 511999970
6320 11:10:08.619607 <6>[ 5.406192] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6321 11:10:08.622836 <6>[ 5.410073] hub 1-1:1.0: USB hub found
6322 11:10:08.630476 <6>[ 5.416186] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6323 11:10:08.636015 <6>[ 5.420268] hub 1-1:1.0: 3 ports detected
6324 11:10:08.642590 <6>[ 5.427751] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6325 11:10:08.656300 <6>[ 5.440458] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6326 11:10:08.662245 <6>[ 5.452534] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6327 11:10:08.674232 <6>[ 5.462948] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6328 11:10:08.684371 <6>[ 5.471710] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6329 11:10:08.694028 <6>[ 5.480860] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6330 11:10:08.700725 <6>[ 5.489990] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6331 11:10:08.711192 <6>[ 5.499117] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6332 11:10:08.720728 <6>[ 5.508420] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6333 11:10:08.730843 <6>[ 5.517722] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6334 11:10:08.741012 <6>[ 5.527197] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6335 11:10:08.747167 <6>[ 5.536674] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6336 11:10:08.757116 <6>[ 5.545801] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6337 11:10:08.830139 <6>[ 5.618668] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6338 11:10:08.839949 <6>[ 5.627526] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6339 11:10:08.850638 <6>[ 5.639494] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6340 11:10:08.930700 <6>[ 5.719271] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6341 11:10:09.537031 <6>[ 5.915574] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6342 11:10:09.547014 <4>[ 6.018375] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6343 11:10:09.553262 <4>[ 6.018395] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6344 11:10:09.559858 <6>[ 6.060217] r8152 1-1.2:1.0 eth0: v1.12.13
6345 11:10:09.566450 <6>[ 6.139142] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6346 11:10:09.573306 <6>[ 6.308766] Console: switching to colour frame buffer device 170x48
6347 11:10:09.579564 <6>[ 6.369400] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6348 11:10:09.599948 <6>[ 6.385437] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6349 11:10:09.618722 <6>[ 6.404369] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6350 11:10:09.625498 <6>[ 6.416949] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6351 11:10:09.636443 <6>[ 6.424978] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6352 11:10:09.645835 <6>[ 6.432311] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6353 11:10:09.666031 <6>[ 6.451426] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6354 11:10:10.996315 <6>[ 7.788352] r8152 1-1.2:1.0 eth0: carrier on
6355 11:10:13.523597 <5>[ 7.811247] Sending DHCP requests .., OK
6356 11:10:13.529602 <6>[ 10.319455] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23
6357 11:10:13.533470 <6>[ 10.327912] IP-Config: Complete:
6358 11:10:13.547110 <6>[ 10.331479] device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1
6359 11:10:13.552957 <6>[ 10.342379] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)
6360 11:10:13.568129 <6>[ 10.356788] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6361 11:10:13.577349 <6>[ 10.356799] nameserver0=192.168.201.1
6362 11:10:13.584478 <6>[ 10.376735] clk: Disabling unused clocks
6363 11:10:13.589937 <6>[ 10.384748] ALSA device list:
6364 11:10:13.598819 <6>[ 10.390842] No soundcards found.
6365 11:10:13.607873 <6>[ 10.399970] Freeing unused kernel memory: 8512K
6366 11:10:13.615259 <6>[ 10.407179] Run /init as init process
6367 11:10:13.645081 <6>[ 10.437145] NET: Registered PF_INET6 protocol family
6368 11:10:13.652935 <6>[ 10.444707] Segment Routing with IPv6
6369 11:10:13.656076 <6>[ 10.449399] In-situ OAM (IOAM) with IPv6
6370 11:10:13.697683 <30>[ 10.462967] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6371 11:10:13.706614 <30>[ 10.498694] systemd[1]: Detected architecture arm64.
6372 11:10:13.706692
6373 11:10:13.713091 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6374 11:10:13.713190
6375 11:10:13.727833 <30>[ 10.519562] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6376 11:10:13.893887 <30>[ 10.682451] systemd[1]: Queued start job for default target graphical.target.
6377 11:10:13.920552 <30>[ 10.709371] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6378 11:10:13.930842 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6379 11:10:13.947302 <30>[ 10.736048] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6380 11:10:13.957523 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6381 11:10:13.976397 <30>[ 10.764911] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6382 11:10:13.987496 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6383 11:10:14.007300 <30>[ 10.795884] systemd[1]: Created slice user.slice - User and Session Slice.
6384 11:10:14.017066 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6385 11:10:14.037937 <30>[ 10.823561] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6386 11:10:14.048543 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6387 11:10:14.070020 <30>[ 10.855414] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6388 11:10:14.080930 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6389 11:10:14.108676 <30>[ 10.887428] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6390 11:10:14.126197 <30>[ 10.914837] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6391 11:10:14.133374 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6392 11:10:14.151273 <30>[ 10.939417] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6393 11:10:14.163325 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6394 11:10:14.179237 <30>[ 10.967348] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6395 11:10:14.193044 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6396 11:10:14.207729 <30>[ 10.999377] systemd[1]: Reached target paths.target - Path Units.
6397 11:10:14.221895 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6398 11:10:14.238626 <30>[ 11.027310] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6399 11:10:14.251300 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6400 11:10:14.263497 <30>[ 11.055277] systemd[1]: Reached target slices.target - Slice Units.
6401 11:10:14.278017 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6402 11:10:14.291652 <30>[ 11.083330] systemd[1]: Reached target swap.target - Swaps.
6403 11:10:14.302037 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6404 11:10:14.322906 <30>[ 11.111386] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6405 11:10:14.336107 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6406 11:10:14.355667 <30>[ 11.143667] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6407 11:10:14.368841 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6408 11:10:14.387843 <30>[ 11.176653] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6409 11:10:14.401778 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6410 11:10:14.423677 <30>[ 11.212048] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6411 11:10:14.437602 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6412 11:10:14.455293 <30>[ 11.243939] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6413 11:10:14.467500 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6414 11:10:14.487930 <30>[ 11.276003] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6415 11:10:14.500987 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6416 11:10:14.519346 <30>[ 11.307815] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6417 11:10:14.532365 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6418 11:10:14.582855 <30>[ 11.371541] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6419 11:10:14.594909 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6420 11:10:14.619719 <30>[ 11.408507] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6421 11:10:14.630842 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6422 11:10:14.656760 <30>[ 11.444815] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6423 11:10:14.667685 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6424 11:10:14.694131 <30>[ 11.476139] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6425 11:10:14.717320 <30>[ 11.505837] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6426 11:10:14.729329 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6427 11:10:14.751864 <30>[ 11.540665] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6428 11:10:14.764057 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6429 11:10:14.811070 <30>[ 11.599964] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6430 11:10:14.828029 Startin<6>[ 11.613984] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6431 11:10:14.831782 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6432 11:10:14.860039 <30>[ 11.648436] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6433 11:10:14.870625 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6434 11:10:14.897238 <30>[ 11.685782] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6435 11:10:14.911223 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6436 11:10:14.940991 <30>[ 11.729090] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6437 11:10:14.951347 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6438 11:10:15.019646 <30>[ 11.808256] systemd[1]: Starting systemd-journald.service - Journal Service...
6439 11:10:15.030706 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6440 11:10:15.051219 <30>[ 11.839719] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6441 11:10:15.062386 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6442 11:10:15.085418 <30>[ 11.870622] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6443 11:10:15.095279 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6444 11:10:15.114564 <30>[ 11.903529] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6445 11:10:15.127449 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6446 11:10:15.149551 <30>[ 11.938385] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6447 11:10:15.160943 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6448 11:10:15.182394 <30>[ 11.970876] systemd[1]: Started systemd-journald.service - Journal Service.
6449 11:10:15.192292 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6450 11:10:15.212808 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6451 11:10:15.231949 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6452 11:10:15.251288 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6453 11:10:15.268372 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6454 11:10:15.289658 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6455 11:10:15.310179 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6456 11:10:15.330013 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6457 11:10:15.349522 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6458 11:10:15.369953 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6459 11:10:15.387666 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6460 11:10:15.407608 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6461 11:10:15.430450 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6462 11:10:15.475633 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6463 11:10:15.499452 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6464 11:10:15.528753 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6465 11:10:15.543515 See 'systemctl status systemd-remount-fs.service' for details.
6466 11:10:15.564603 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6467 11:10:15.584974 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6468 11:10:15.604376 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6469 11:10:15.643982 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6470 11:10:15.657773 <46>[ 12.446034] systemd-journald[201]: Received client request to flush runtime journal.
6471 11:10:15.672037 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6472 11:10:15.700352 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6473 11:10:15.731127 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6474 11:10:15.753951 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6475 11:10:15.777325 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6476 11:10:15.819448 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6477 11:10:15.856100 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6478 11:10:15.879781 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6479 11:10:15.903192 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6480 11:10:15.951131 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6481 11:10:15.976568 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6482 11:10:16.014096 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6483 11:10:16.065224 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6484 11:10:16.086225 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6485 11:10:16.103527 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6486 11:10:16.130823 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6487 11:10:16.163073 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6488 11:10:16.181859 [[0;32m OK [0m] Found device<46>[ 12.972794] systemd-journald[201]: Time jumped backwards, rotating.
6489 11:10:16.188576 [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6490 11:10:16.295310 <6>[ 13.080304] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6491 11:10:16.302069 <6>[ 13.080325] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6492 11:10:16.311534 <3>[ 13.091478] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6493 11:10:16.322270 <4>[ 13.110399] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6494 11:10:16.332638 <3>[ 13.110796] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6495 11:10:16.342033 <6>[ 13.121916] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6496 11:10:16.355450 <3>[ 13.127474] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6497 11:10:16.361596 <3>[ 13.127480] elan_i2c 2-0015: Error applying setting, reverse things back
6498 11:10:16.373393 <4>[ 13.160658] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6499 11:10:16.379509 <3>[ 13.163810] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6500 11:10:16.392666 <6>[ 13.169585] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6501 11:10:16.400013 <3>[ 13.177979] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6502 11:10:16.405892 <4>[ 13.191825] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6503 11:10:16.415976 <3>[ 13.197044] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6504 11:10:16.419635 <3>[ 13.197629] mtk-scp 10500000.scp: invalid resource
6505 11:10:16.429396 <6>[ 13.197685] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6506 11:10:16.435902 <6>[ 13.205391] mc: Linux media interface: v0.10
6507 11:10:16.445917 <3>[ 13.212979] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6508 11:10:16.454578 <6>[ 13.246134] remoteproc remoteproc0: scp is available
6509 11:10:16.464770 <3>[ 13.246501] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6510 11:10:16.471019 <4>[ 13.252221] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6511 11:10:16.483988 <3>[ 13.260230] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6512 11:10:16.493579 <3>[ 13.260243] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6513 11:10:16.500377 <3>[ 13.260249] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6514 11:10:16.509826 <3>[ 13.273398] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6515 11:10:16.514164 <6>[ 13.280577] remoteproc remoteproc0: powering up scp
6516 11:10:16.522415 <6>[ 13.293982] videodev: Linux video capture interface: v2.00
6517 11:10:16.534110 <4>[ 13.298105] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6518 11:10:16.567240 <6>[ 13.353574] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6519 11:10:16.574272 <3>[ 13.356166] remoteproc remoteproc0: request_firmware failed: -2
6520 11:10:16.580888 <6>[ 13.356903] cs_system_cfg: CoreSight Configuration manager initialised
6521 11:10:16.590759 <5>[ 13.365319] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6522 11:10:16.609348 <6>[ 13.396710] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input6
6523 11:10:16.657813 <6>[ 13.446245] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6524 11:10:16.664102 <5>[ 13.446510] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6525 11:10:16.680552 <5>[ 13.469178] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6526 11:10:16.693900 <3>[ 13.469270] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6527 11:10:16.700475 <4>[ 13.477711] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6528 11:10:16.715701 <6>[ 13.507088] cfg80211: failed to load regulatory.db
6529 11:10:16.721611 <6>[ 13.507812] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6530 11:10:16.751963 <3>[ 13.537229] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6531 11:10:16.768273 <6>[ 13.556519] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6532 11:10:16.774333 <3>[ 13.557916] debugfs: File 'Playback' in directory 'dapm' already present!
6533 11:10:16.793511 <6>[ 13.582243] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6534 11:10:16.800391 <3>[ 13.582517] debugfs: File 'Capture' in directory 'dapm' already present!
6535 11:10:16.806970 <6>[ 13.590791] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6536 11:10:16.815631 <6>[ 13.590854] Bluetooth: Core ver 2.22
6537 11:10:16.826797 <6>[ 13.618659] NET: Registered PF_BLUETOOTH protocol family
6538 11:10:16.836809 <6>[ 13.628607] Bluetooth: HCI device and connection manager initialized
6539 11:10:16.848531 <6>[ 13.640089] Bluetooth: HCI socket layer initialized
6540 11:10:16.854819 <6>[ 13.640799] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6541 11:10:16.861468 <6>[ 13.645845] Bluetooth: L2CAP socket layer initialized
6542 11:10:16.876974 <6>[ 13.668669] Bluetooth: SCO socket layer initialized
6543 11:10:16.883280 <6>[ 13.669787] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6544 11:10:16.912500 <6>[ 13.700553] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6545 11:10:16.940040 <4>[ 13.728345] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6546 11:10:16.946542 <4>[ 13.728345] Fallback method does not support PEC.
6547 11:10:16.962925 <3>[ 13.751506] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6548 11:10:16.984112 <3>[ 13.772222] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6549 11:10:16.999199 <6>[ 13.784508] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input7
6550 11:10:17.017497 <6>[ 13.806360] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6551 11:10:17.048234 <6>[ 13.836655] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6552 11:10:17.054965 <3>[ 13.845474] thermal_sys: Failed to find 'trips' node
6553 11:10:17.065039 <6>[ 13.846696] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6554 11:10:17.071587 <3>[ 13.851885] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6555 11:10:17.081965 <6>[ 13.860654] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6556 11:10:17.091441 <3>[ 13.869534] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6557 11:10:17.104892 <6>[ 13.895344] Bluetooth: HCI UART driver ver 2.3
6558 11:10:17.112276 <4>[ 13.896960] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6559 11:10:17.116048 <6>[ 13.902079] Bluetooth: HCI UART protocol H4 registered
6560 11:10:17.126170 <3>[ 13.912240] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6561 11:10:17.152056 <6>[ 13.932847] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6562 11:10:17.158482 <3>[ 13.936957] thermal_sys: Failed to find 'trips' node
6563 11:10:17.168593 <3>[ 13.956680] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6564 11:10:17.175235 <3>[ 13.965059] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6565 11:10:17.185944 <4>[ 13.974524] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6566 11:10:17.192531 <6>[ 13.983368] Bluetooth: HCI UART protocol LL registered
6567 11:10:17.210858 <6>[ 14.002561] Bluetooth: HCI UART protocol Three-wire (H5) registered
6568 11:10:17.237536 <6>[ 14.029161] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6569 11:10:17.252160 <3>[ 14.035586] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6570 11:10:17.258814 <6>[ 14.045611] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6571 11:10:17.267898 <6>[ 14.046897] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6572 11:10:17.280913 <3>[ 14.057352] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6573 11:10:17.313883 <6>[ 14.105032] Bluetooth: HCI UART protocol Broadcom registered
6574 11:10:17.348023 <6>[ 14.139800] Bluetooth: HCI UART protocol QCA registered
6575 11:10:17.361859 <6>[ 14.153831] Bluetooth: HCI UART protocol Marvell registered
6576 11:10:17.387307 <6>[ 14.172916] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6577 11:10:17.418044 <6>[ 14.206247] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6578 11:10:17.443855 <6>[ 14.235608] Bluetooth: hci0: setting up ROME/QCA6390
6579 11:10:17.476161 <6>[ 14.267042] usbcore: registered new interface driver uvcvideo
6580 11:10:17.482876 <3>[ 14.271998] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6581 11:10:17.504707 [[0;32m OK [<3>[ 14.293542] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6582 11:10:17.511170 0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6583 11:10:17.527607 <3>[ 14.315494] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6584 11:10:17.544633 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Se<3>[ 14.331621] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6585 11:10:17.544734 t.
6586 11:10:17.560442 <3>[ 14.348497] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6587 11:10:17.593170 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6588 11:10:17.617417 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6589 11:10:17.670078 [[0;32m OK [0m] Reached target [0;1;39mblue<3>[ 14.458575] Bluetooth: hci0: Frame reassembly failed (-84)
6590 11:10:17.674742 tooth.target[0m - Bluetooth Support.
6591 11:10:17.691181 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6592 11:10:17.697568 <6>[ 14.486084] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6593 11:10:17.712475 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6594 11:10:17.732323 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6595 11:10:17.751075 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6596 11:10:17.767548 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6597 11:10:17.783555 [[0;32m OK [<4>[ 14.572521] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6598 11:10:17.790440 0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6599 11:10:17.805261 <4>[ 14.593932] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6600 11:10:17.820903 [[0;32m OK [0m] Reached target [0;1;39msock<4>[ 14.610341] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6601 11:10:17.824121 ets.target[0m - Socket Units.
6602 11:10:17.832089 <4>[ 14.623960] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6603 11:10:17.846911 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6604 11:10:17.863821 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6605 11:10:17.900557 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6606 11:10:17.927898 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6607 11:10:17.936729 <6>[ 14.728568] Bluetooth: hci0: QCA Product ID :0x00000008
6608 11:10:17.946376 <6>[ 14.738108] Bluetooth: hci0: QCA SOC Version :0x00000044
6609 11:10:17.956139 <6>[ 14.747603] Bluetooth: hci0: QCA ROM Version :0x00000302
6610 11:10:17.965877 <6>[ 14.757605] Bluetooth: hci0: QCA Patch Version:0x00000111
6611 11:10:17.972473 <6>[ 14.757623] Bluetooth: hci0: QCA controller version 0x00440302
6612 11:10:17.982513 Starting [0;1;39msystemd-user-sess…v<6>[ 14.757632] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6613 11:10:17.986045 ice[0m - Permit User Sessions...
6614 11:10:17.995708 <4>[ 14.757741] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6615 11:10:18.009356 <3>[ 14.798071] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6616 11:10:18.015923 <3>[ 14.798078] Bluetooth: hci0: QCA Failed to download patch (-2)
6617 11:10:18.026135 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6618 11:10:18.051002 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6619 11:10:18.112472 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6620 11:10:18.156373 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6621 11:10:18.175288 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6622 11:10:18.228294 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6623 11:10:18.248197 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6624 11:10:18.268313 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6625 11:10:18.289846 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6626 11:10:18.308657 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6627 11:10:18.353342 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6628 11:10:18.394076 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6629 11:10:18.438794
6630 11:10:18.442875 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6631 11:10:18.442951
6632 11:10:18.445332 debian-bookworm-arm64 login: root (automatic login)
6633 11:10:18.445408
6634 11:10:18.470906 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Wed Jul 10 10:43:20 UTC 2024 aarch64
6635 11:10:18.470989
6636 11:10:18.477109 The programs included with the Debian GNU/Linux system are free software;
6637 11:10:18.484172 the exact distribution terms for each program are described in the
6638 11:10:18.487250 individual files in /usr/share/doc/*/copyright.
6639 11:10:18.487326
6640 11:10:18.493973 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6641 11:10:18.497391 permitted by applicable law.
6642 11:10:18.497766 Matched prompt #10: / #
6644 11:10:18.497948 Setting prompt string to ['/ #']
6645 11:10:18.498033 end: 2.2.5.1 login-action (duration 00:00:16) [common]
6647 11:10:18.498207 end: 2.2.5 auto-login-action (duration 00:00:16) [common]
6648 11:10:18.498285 start: 2.2.6 expect-shell-connection (timeout 00:02:58) [common]
6649 11:10:18.498347 Setting prompt string to ['/ #']
6650 11:10:18.498400 Forcing a shell prompt, looking for ['/ #']
6651 11:10:18.498453 Sending line: ''
6653 11:10:18.548793 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6654 11:10:18.548880 Waiting using forced prompt support (timeout 00:02:30)
6655 11:10:18.554040 / #
6656 11:10:18.554303 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6657 11:10:18.554384 start: 2.2.7 export-device-env (timeout 00:02:58) [common]
6658 11:10:18.554466 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6659 11:10:18.554541 end: 2.2 depthcharge-retry (duration 00:02:02) [common]
6660 11:10:18.554621 end: 2 depthcharge-action (duration 00:02:02) [common]
6661 11:10:18.554696 start: 3 lava-test-retry (timeout 00:05:00) [common]
6662 11:10:18.554774 start: 3.1 lava-test-shell (timeout 00:05:00) [common]
6663 11:10:18.554841 Using namespace: common
6664 11:10:18.554903 Sending line: '#'
6666 11:10:18.655287 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:05:00)
6667 11:10:18.661077 / # #
6668 11:10:18.661383 Using /lava-14786814
6669 11:10:18.661446 Sending line: 'export SHELL=/bin/sh'
6671 11:10:18.767059 / # export SHELL=/bin/sh
6672 11:10:18.767304 Sending line: '. /lava-14786814/environment'
6674 11:10:18.872792 / # . /lava-14786814/environment
6675 11:10:18.873055 Sending line: '/lava-14786814/bin/lava-test-runner /lava-14786814/0'
6677 11:10:18.973452 Test shell timeout: 10s (minimum of the action and connection timeout)
6678 11:10:18.978409 / # /lava-14786814/bin/lava-test-runner /lava-14786814/0
6679 11:10:19.005442 + export TESTRUN_ID=0_sleep
6680 11:10:19.008863 + cd /lava-14786814/0/tests/0_sleep
6681 11:10:19.011842 + cat uuid
6682 11:10:19.011917 + UUID=14786814_1.5.2.3.1
6683 11:10:19.015084 + set +x
6684 11:10:19.018623 <LAVA_SIGNAL_STARTRUN 0_sleep 14786814_1.5.2.3.1>
6685 11:10:19.018874 Received signal: <STARTRUN> 0_sleep 14786814_1.5.2.3.1
6686 11:10:19.018939 Starting test lava.0_sleep (14786814_1.5.2.3.1)
6687 11:10:19.019012 Skipping test definition patterns.
6688 11:10:19.021606 + ./config/lava/sleep/sleep.sh mem freeze
6689 11:10:19.025286 Received signal: <TESTCASE> TEST_CASE_ID=rtc-exist RESULT=pass
6691 11:10:19.028805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc-exist RESULT=pass>
6692 11:10:19.032413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc-wakeup-enabled RESULT=pass>
6693 11:10:19.032670 Received signal: <TESTCASE> TEST_CASE_ID=rtc-wakeup-enabled RESULT=pass
6695 11:10:19.035104 rtcwake: assuming RTC uses UTC ...
6696 11:10:19.041574 rtcwake: wakeup from "mem" using rtc0 at Wed Jul 10 11:10:25 2024
6697 11:10:19.052846 <6>[ 15.844447] PM: suspend entry (deep)
6698 11:10:19.056303 <6>[ 15.848545] Filesystems sync: 0.000 seconds
6699 11:10:19.062515 <6>[ 15.853635] Freezing user space processes
6700 11:10:19.069344 <6>[ 15.859249] Freezing user space processes completed (elapsed 0.001 seconds)
6701 11:10:19.072521 <6>[ 15.866611] OOM killer disabled.
6702 11:10:19.079182 <6>[ 15.870134] Freezing remaining freezable tasks
6703 11:10:19.085980 <6>[ 15.876203] Freezing remaining freezable tasks completed (elapsed 0.001 seconds)
6704 11:10:19.095791 <6>[ 15.883935] printk: Suspending console(s) (use no_console_suspend to debug)
6705 11:10:25.845828 <6>[ 16.037307] Disabling non-boot CPUs ...
6706 11:10:25.849067 <6>[ 16.039131] psci: CPU1 killed (polled 4 ms)
6707 11:10:25.852371 <6>[ 16.041372] psci: CPU2 killed (polled 0 ms)
6708 11:10:25.859668 <6>[ 16.043134] psci: CPU3 killed (polled 4 ms)
6709 11:10:25.862665 <6>[ 16.045134] psci: CPU4 killed (polled 0 ms)
6710 11:10:25.866014 <6>[ 16.047057] psci: CPU5 killed (polled 0 ms)
6711 11:10:25.872844 <6>[ 16.048988] psci: CPU6 killed (polled 0 ms)
6712 11:10:25.875856 <6>[ 16.050842] psci: CPU7 killed (polled 0 ms)
6713 11:10:25.879078 <6>[ 16.051456] Enabling non-boot CPUs ...
6714 11:10:25.885984 <6>[ 16.051936] Detected VIPT I-cache on CPU1
6715 11:10:25.889765 <4>[ 16.052006] cacheinfo: Unable to detect cache hierarchy for CPU 1
6716 11:10:25.899287 <6>[ 16.052022] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
6717 11:10:25.905887 <6>[ 16.052083] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
6718 11:10:25.905988 <6>[ 16.052655] CPU1 is up
6719 11:10:25.912948 <6>[ 16.052988] Detected VIPT I-cache on CPU2
6720 11:10:25.919866 <4>[ 16.053018] cacheinfo: Unable to detect cache hierarchy for CPU 2
6721 11:10:25.926457 <6>[ 16.053026] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
6722 11:10:25.933070 <6>[ 16.053051] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
6723 11:10:25.935958 <6>[ 16.053337] CPU2 is up
6724 11:10:25.939152 <6>[ 16.053687] Detected VIPT I-cache on CPU3
6725 11:10:25.945831 <4>[ 16.053716] cacheinfo: Unable to detect cache hierarchy for CPU 3
6726 11:10:25.952448 <6>[ 16.053724] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
6727 11:10:25.959189 <6>[ 16.053749] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
6728 11:10:25.962477 <6>[ 16.054086] CPU3 is up
6729 11:10:25.965916 <6>[ 16.054528] Detected VIPT I-cache on CPU4
6730 11:10:25.972886 <4>[ 16.054581] cacheinfo: Unable to detect cache hierarchy for CPU 4
6731 11:10:25.979385 <6>[ 16.054595] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
6732 11:10:25.985941 <6>[ 16.054631] arch_timer: CPU4: Trapping CNTVCT access
6733 11:10:25.992423 <6>[ 16.054649] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
6734 11:10:25.996353 <6>[ 16.055264] CPU4 is up
6735 11:10:25.999798 <6>[ 16.055607] Detected VIPT I-cache on CPU5
6736 11:10:26.006278 <4>[ 16.055642] cacheinfo: Unable to detect cache hierarchy for CPU 5
6737 11:10:26.012480 <6>[ 16.055651] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
6738 11:10:26.018914 <6>[ 16.055672] arch_timer: CPU5: Trapping CNTVCT access
6739 11:10:26.025865 <6>[ 16.055682] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
6740 11:10:26.025988 <6>[ 16.056103] CPU5 is up
6741 11:10:26.032630 <6>[ 16.056406] Detected VIPT I-cache on CPU6
6742 11:10:26.038997 <4>[ 16.056439] cacheinfo: Unable to detect cache hierarchy for CPU 6
6743 11:10:26.045653 <6>[ 16.056448] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6744 11:10:26.048884 <6>[ 16.056470] arch_timer: CPU6: Trapping CNTVCT access
6745 11:10:26.056218 <6>[ 16.056480] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6746 11:10:26.059121 <6>[ 16.056913] CPU6 is up
6747 11:10:26.062735 <6>[ 16.057306] Detected VIPT I-cache on CPU7
6748 11:10:26.068722 <4>[ 16.057353] cacheinfo: Unable to detect cache hierarchy for CPU 7
6749 11:10:26.078703 <6>[ 16.057362] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6750 11:10:26.081990 <6>[ 16.057383] arch_timer: CPU7: Trapping CNTVCT access
6751 11:10:26.088714 <6>[ 16.057393] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6752 11:10:26.091994 <6>[ 16.057837] CPU7 is up
6753 11:10:26.095566 <3>[ 16.059766] Failed to prepare clk '(null)': -13
6754 11:10:26.101796 <3>[ 16.059854] Failed to prepare clk '(null)': -13
6755 11:10:26.109075 <4>[ 16.168489] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6756 11:10:26.115233 <4>[ 16.175825] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6757 11:10:26.125030 <4>[ 16.179007] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6758 11:10:26.128296 <4>[ 16.179648] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6759 11:10:26.135018 <6>[ 16.370617] r8152 1-1.2:1.0 eth0: carrier on
6760 11:10:26.155838 <6>[ 17.197874] OOM killer enabled.
6761 11:10:26.159134 <6>[ 17.201865] Restarting tasks ... done.
6762 11:10:26.165832 <5>[ 17.206957] random: crng reseeded on system resumption
6763 11:10:26.169031 <6>[ 17.213680] PM: suspend exit
6764 11:10:26.180584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtcwake-mem-1 RESULT=pass>
6765 11:10:26.180879 Received signal: <TESTCASE> TEST_CASE_ID=rtcwake-mem-1 RESULT=pass
6767 11:10:26.184044 rtcwake: assuming RTC uses UTC ...
6768 11:10:26.190460 rtcwake: wakeup from "mem" using rtc0 at Wed Jul 10 11:10:32 2024
6769 11:10:26.204342 <6>[ 17.245766] PM: suspend entry (deep)
6770 11:10:26.210422 <6>[ 17.251509] Filesystems sync: 0.000 seconds
6771 11:10:26.216896 <6>[ 17.258248] Freezing user space processes
6772 11:10:26.227304 <6>[ 17.265878] Freezing user space processes completed (elapsed 0.001 seconds)
6773 11:10:26.230534 <6>[ 17.274854] OOM killer disabled.
6774 11:10:26.238616 <6>[ 17.280010] Freezing remaining freezable tasks
6775 11:10:27.169059 <6>[ 18.207345] Freezing remaining freezable tasks completed (elapsed 0.921 seconds)
6776 11:10:27.180261 <6>[ 18.218635] printk: Suspending console(s) (use no_console_suspend to debug)
6777 11:15:18.554874 Marking unfinished test run as failed
6780 11:15:18.555189 end: 3.1 lava-test-shell (duration 00:05:00) [common]
6782 11:15:18.555348 lava-test-retry failed: 1 of 1 attempts. 'lava-test-shell timed out after 300 seconds'
6784 11:15:18.555482 end: 3 lava-test-retry (duration 00:05:00) [common]
6786 11:15:18.555676 Cleaning after the job
6787 11:15:18.555759 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786814/tftp-deploy-pxb2vzc_/ramdisk
6788 11:15:18.567550 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786814/tftp-deploy-pxb2vzc_/kernel
6789 11:15:18.588223 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786814/tftp-deploy-pxb2vzc_/dtb
6790 11:15:18.588428 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786814/tftp-deploy-pxb2vzc_/modules
6791 11:15:18.594264 start: 4.1 power-off (timeout 00:00:30) [common]
6792 11:15:18.594418 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
6793 11:15:20.682881 >> Command sent successfully.
6794 11:15:20.696148 Returned 0 in 2 seconds
6795 11:15:20.696698 end: 4.1 power-off (duration 00:00:02) [common]
6797 11:15:20.697685 start: 4.2 read-feedback (timeout 00:04:58) [common]
6798 11:15:20.698286 Listened to connection for namespace 'common' for up to 1s
6799 11:15:21.699185 Finalising connection for namespace 'common'
6800 11:15:21.699383 Disconnecting from shell: Finalise
6801 11:15:21.799694 end: 4.2 read-feedback (duration 00:00:01) [common]
6802 11:15:21.799871 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14786814
6803 11:15:21.955479 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14786814
6804 11:15:21.955647 TestError: A test failed to run, look at the error message.