Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 46
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 103
1 11:06:50.550734 lava-dispatcher, installed at version: 2024.05
2 11:06:50.550942 start: 0 validate
3 11:06:50.551067 Start time: 2024-07-10 11:06:50.551061+00:00 (UTC)
4 11:06:50.551209 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:06:50.551368 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 11:06:50.823940 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:06:50.824807 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 11:06:52.685199 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:06:52.685954 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 11:06:52.954041 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:06:52.954739 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 11:06:53.225174 Using caching service: 'http://localhost/cache/?uri=%s'
13 11:06:53.225415 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
14 11:07:09.695276 validate duration: 19.14
16 11:07:09.696751 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 11:07:09.697476 start: 1.1 download-retry (timeout 00:10:00) [common]
18 11:07:09.698105 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 11:07:09.699052 Not decompressing ramdisk as can be used compressed.
20 11:07:09.699694 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/arm64/initrd.cpio.gz
21 11:07:09.700128 saving as /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/ramdisk/initrd.cpio.gz
22 11:07:09.700439 total size: 5628143 (5 MB)
23 11:07:09.969751 progress 0 % (0 MB)
24 11:07:09.978641 progress 5 % (0 MB)
25 11:07:09.987372 progress 10 % (0 MB)
26 11:07:09.995968 progress 15 % (0 MB)
27 11:07:10.001730 progress 20 % (1 MB)
28 11:07:10.006077 progress 25 % (1 MB)
29 11:07:10.009624 progress 30 % (1 MB)
30 11:07:10.012690 progress 35 % (1 MB)
31 11:07:10.015358 progress 40 % (2 MB)
32 11:07:10.018180 progress 45 % (2 MB)
33 11:07:10.020440 progress 50 % (2 MB)
34 11:07:10.022636 progress 55 % (2 MB)
35 11:07:10.024725 progress 60 % (3 MB)
36 11:07:10.026624 progress 65 % (3 MB)
37 11:07:10.028462 progress 70 % (3 MB)
38 11:07:10.030560 progress 75 % (4 MB)
39 11:07:10.032338 progress 80 % (4 MB)
40 11:07:10.033848 progress 85 % (4 MB)
41 11:07:10.035505 progress 90 % (4 MB)
42 11:07:10.037202 progress 95 % (5 MB)
43 11:07:10.038693 progress 100 % (5 MB)
44 11:07:10.038925 5 MB downloaded in 0.34 s (15.86 MB/s)
45 11:07:10.039105 end: 1.1.1 http-download (duration 00:00:00) [common]
47 11:07:10.039482 end: 1.1 download-retry (duration 00:00:00) [common]
48 11:07:10.039587 start: 1.2 download-retry (timeout 00:10:00) [common]
49 11:07:10.039687 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 11:07:10.039847 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
51 11:07:10.039920 saving as /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/kernel/Image
52 11:07:10.040018 total size: 54813184 (52 MB)
53 11:07:10.040120 No compression specified
54 11:07:10.307529 progress 0 % (0 MB)
55 11:07:10.355452 progress 5 % (2 MB)
56 11:07:10.373430 progress 10 % (5 MB)
57 11:07:10.388102 progress 15 % (7 MB)
58 11:07:10.403104 progress 20 % (10 MB)
59 11:07:10.418069 progress 25 % (13 MB)
60 11:07:10.432727 progress 30 % (15 MB)
61 11:07:10.447650 progress 35 % (18 MB)
62 11:07:10.462533 progress 40 % (20 MB)
63 11:07:10.477230 progress 45 % (23 MB)
64 11:07:10.492182 progress 50 % (26 MB)
65 11:07:10.507056 progress 55 % (28 MB)
66 11:07:10.521663 progress 60 % (31 MB)
67 11:07:10.536384 progress 65 % (34 MB)
68 11:07:10.550962 progress 70 % (36 MB)
69 11:07:10.565633 progress 75 % (39 MB)
70 11:07:10.580269 progress 80 % (41 MB)
71 11:07:10.594842 progress 85 % (44 MB)
72 11:07:10.609514 progress 90 % (47 MB)
73 11:07:10.624215 progress 95 % (49 MB)
74 11:07:10.638850 progress 100 % (52 MB)
75 11:07:10.639082 52 MB downloaded in 0.60 s (87.26 MB/s)
76 11:07:10.639243 end: 1.2.1 http-download (duration 00:00:01) [common]
78 11:07:10.639476 end: 1.2 download-retry (duration 00:00:01) [common]
79 11:07:10.639564 start: 1.3 download-retry (timeout 00:09:59) [common]
80 11:07:10.639647 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 11:07:10.639792 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 11:07:10.639860 saving as /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 11:07:10.639917 total size: 57695 (0 MB)
84 11:07:10.639975 No compression specified
85 11:07:10.906776 progress 56 % (0 MB)
86 11:07:10.908269 progress 100 % (0 MB)
87 11:07:10.909390 0 MB downloaded in 0.27 s (0.20 MB/s)
88 11:07:10.910039 end: 1.3.1 http-download (duration 00:00:00) [common]
90 11:07:10.911171 end: 1.3 download-retry (duration 00:00:00) [common]
91 11:07:10.911594 start: 1.4 download-retry (timeout 00:09:59) [common]
92 11:07:10.912014 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 11:07:10.912632 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/arm64/full.rootfs.tar.xz
94 11:07:10.912976 saving as /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/nfsrootfs/full.rootfs.tar
95 11:07:10.913239 total size: 55895280 (53 MB)
96 11:07:10.913514 Using unxz to decompress xz
97 11:07:11.184257 progress 0 % (0 MB)
98 11:07:11.384187 progress 5 % (2 MB)
99 11:07:11.555453 progress 10 % (5 MB)
100 11:07:11.708942 progress 15 % (8 MB)
101 11:07:11.869596 progress 20 % (10 MB)
102 11:07:12.033587 progress 25 % (13 MB)
103 11:07:12.203274 progress 30 % (16 MB)
104 11:07:12.334744 progress 35 % (18 MB)
105 11:07:12.411223 progress 40 % (21 MB)
106 11:07:12.563865 progress 45 % (24 MB)
107 11:07:12.735419 progress 50 % (26 MB)
108 11:07:12.901875 progress 55 % (29 MB)
109 11:07:13.072536 progress 60 % (32 MB)
110 11:07:13.248350 progress 65 % (34 MB)
111 11:07:13.422650 progress 70 % (37 MB)
112 11:07:13.598318 progress 75 % (40 MB)
113 11:07:13.746688 progress 80 % (42 MB)
114 11:07:13.896762 progress 85 % (45 MB)
115 11:07:14.077765 progress 90 % (48 MB)
116 11:07:14.263213 progress 95 % (50 MB)
117 11:07:14.438965 progress 100 % (53 MB)
118 11:07:14.445575 53 MB downloaded in 3.53 s (15.09 MB/s)
119 11:07:14.445761 end: 1.4.1 http-download (duration 00:00:04) [common]
121 11:07:14.446028 end: 1.4 download-retry (duration 00:00:04) [common]
122 11:07:14.446131 start: 1.5 download-retry (timeout 00:09:55) [common]
123 11:07:14.446232 start: 1.5.1 http-download (timeout 00:09:55) [common]
124 11:07:14.446389 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
125 11:07:14.446488 saving as /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/modules/modules.tar
126 11:07:14.446568 total size: 8607984 (8 MB)
127 11:07:14.446669 Using unxz to decompress xz
128 11:07:14.448498 progress 0 % (0 MB)
129 11:07:14.470542 progress 5 % (0 MB)
130 11:07:14.496976 progress 10 % (0 MB)
131 11:07:14.522905 progress 15 % (1 MB)
132 11:07:14.548905 progress 20 % (1 MB)
133 11:07:14.574012 progress 25 % (2 MB)
134 11:07:14.599259 progress 30 % (2 MB)
135 11:07:14.623598 progress 35 % (2 MB)
136 11:07:14.651974 progress 40 % (3 MB)
137 11:07:14.678127 progress 45 % (3 MB)
138 11:07:14.703933 progress 50 % (4 MB)
139 11:07:14.730561 progress 55 % (4 MB)
140 11:07:14.756969 progress 60 % (4 MB)
141 11:07:14.782023 progress 65 % (5 MB)
142 11:07:14.809051 progress 70 % (5 MB)
143 11:07:14.838222 progress 75 % (6 MB)
144 11:07:14.867990 progress 80 % (6 MB)
145 11:07:14.893354 progress 85 % (7 MB)
146 11:07:14.918211 progress 90 % (7 MB)
147 11:07:14.943165 progress 95 % (7 MB)
148 11:07:14.967476 progress 100 % (8 MB)
149 11:07:14.973181 8 MB downloaded in 0.53 s (15.59 MB/s)
150 11:07:14.973350 end: 1.5.1 http-download (duration 00:00:01) [common]
152 11:07:14.973584 end: 1.5 download-retry (duration 00:00:01) [common]
153 11:07:14.973678 start: 1.6 prepare-tftp-overlay (timeout 00:09:55) [common]
154 11:07:14.973766 start: 1.6.1 extract-nfsrootfs (timeout 00:09:55) [common]
155 11:07:16.433382 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14786825/extract-nfsrootfs-_4sdnrfz
156 11:07:16.433578 end: 1.6.1 extract-nfsrootfs (duration 00:00:01) [common]
157 11:07:16.433679 start: 1.6.2 lava-overlay (timeout 00:09:53) [common]
158 11:07:16.433867 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9
159 11:07:16.434001 makedir: /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin
160 11:07:16.434127 makedir: /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/tests
161 11:07:16.434231 makedir: /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/results
162 11:07:16.434335 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-add-keys
163 11:07:16.434479 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-add-sources
164 11:07:16.434628 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-background-process-start
165 11:07:16.434794 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-background-process-stop
166 11:07:16.434973 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-common-functions
167 11:07:16.435149 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-echo-ipv4
168 11:07:16.435319 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-install-packages
169 11:07:16.435478 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-installed-packages
170 11:07:16.435647 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-os-build
171 11:07:16.435815 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-probe-channel
172 11:07:16.435976 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-probe-ip
173 11:07:16.436146 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-target-ip
174 11:07:16.436316 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-target-mac
175 11:07:16.436484 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-target-storage
176 11:07:16.436646 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-test-case
177 11:07:16.436772 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-test-event
178 11:07:16.436920 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-test-feedback
179 11:07:16.437054 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-test-raise
180 11:07:16.437187 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-test-reference
181 11:07:16.437329 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-test-runner
182 11:07:16.437466 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-test-set
183 11:07:16.437605 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-test-shell
184 11:07:16.437734 Updating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-install-packages (oe)
185 11:07:16.437908 Updating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/bin/lava-installed-packages (oe)
186 11:07:16.438045 Creating /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/environment
187 11:07:16.438155 LAVA metadata
188 11:07:16.438259 - LAVA_JOB_ID=14786825
189 11:07:16.438353 - LAVA_DISPATCHER_IP=192.168.201.1
190 11:07:16.438499 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:53) [common]
191 11:07:16.438603 skipped lava-vland-overlay
192 11:07:16.438711 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
193 11:07:16.438842 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:53) [common]
194 11:07:16.438934 skipped lava-multinode-overlay
195 11:07:16.439050 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
196 11:07:16.439163 start: 1.6.2.3 test-definition (timeout 00:09:53) [common]
197 11:07:16.439265 Loading test definitions
198 11:07:16.439395 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:53) [common]
199 11:07:16.439496 Using /lava-14786825 at stage 0
200 11:07:16.439959 uuid=14786825_1.6.2.3.1 testdef=None
201 11:07:16.440093 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
202 11:07:16.440223 start: 1.6.2.3.2 test-overlay (timeout 00:09:53) [common]
203 11:07:16.440966 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
205 11:07:16.441344 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:53) [common]
206 11:07:16.442070 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
208 11:07:16.442463 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:53) [common]
209 11:07:16.443143 runner path: /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/0/tests/0_wifi-basic test_uuid 14786825_1.6.2.3.1
210 11:07:16.443319 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
212 11:07:16.443531 Creating lava-test-runner.conf files
213 11:07:16.443620 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14786825/lava-overlay-y6epx5j9/lava-14786825/0 for stage 0
214 11:07:16.443716 - 0_wifi-basic
215 11:07:16.443816 end: 1.6.2.3 test-definition (duration 00:00:00) [common]
216 11:07:16.443921 start: 1.6.2.4 compress-overlay (timeout 00:09:53) [common]
217 11:07:16.451275 end: 1.6.2.4 compress-overlay (duration 00:00:00) [common]
218 11:07:16.451380 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:53) [common]
219 11:07:16.451492 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
220 11:07:16.451586 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
221 11:07:16.451677 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:53) [common]
222 11:07:16.610767 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
223 11:07:16.610955 start: 1.6.4 extract-modules (timeout 00:09:53) [common]
224 11:07:16.611068 extracting modules file /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14786825/extract-nfsrootfs-_4sdnrfz
225 11:07:16.936476 extracting modules file /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14786825/extract-overlay-ramdisk-0hzyhte1/ramdisk
226 11:07:17.255613 end: 1.6.4 extract-modules (duration 00:00:01) [common]
227 11:07:17.255775 start: 1.6.5 apply-overlay-tftp (timeout 00:09:52) [common]
228 11:07:17.255904 [common] Applying overlay to NFS
229 11:07:17.256002 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14786825/compress-overlay-4vtj8ujx/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14786825/extract-nfsrootfs-_4sdnrfz
230 11:07:17.264788 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
231 11:07:17.264931 start: 1.6.6 configure-preseed-file (timeout 00:09:52) [common]
232 11:07:17.265062 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
233 11:07:17.265187 start: 1.6.7 compress-ramdisk (timeout 00:09:52) [common]
234 11:07:17.265300 Building ramdisk /var/lib/lava/dispatcher/tmp/14786825/extract-overlay-ramdisk-0hzyhte1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14786825/extract-overlay-ramdisk-0hzyhte1/ramdisk
235 11:07:17.563975 >> 129845 blocks
236 11:07:19.847127 rename /var/lib/lava/dispatcher/tmp/14786825/extract-overlay-ramdisk-0hzyhte1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/ramdisk/ramdisk.cpio.gz
237 11:07:19.847329 end: 1.6.7 compress-ramdisk (duration 00:00:03) [common]
238 11:07:19.847459 start: 1.6.8 prepare-kernel (timeout 00:09:50) [common]
239 11:07:19.847577 start: 1.6.8.1 prepare-fit (timeout 00:09:50) [common]
240 11:07:19.847699 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/kernel/Image']
241 11:07:34.625797 Returned 0 in 14 seconds
242 11:07:34.625975 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/kernel/image.itb
243 11:07:35.010578 output: FIT description: Kernel Image image with one or more FDT blobs
244 11:07:35.010754 output: Created: Wed Jul 10 12:07:34 2024
245 11:07:35.010825 output: Image 0 (kernel-1)
246 11:07:35.010887 output: Description:
247 11:07:35.010943 output: Created: Wed Jul 10 12:07:34 2024
248 11:07:35.010999 output: Type: Kernel Image
249 11:07:35.011053 output: Compression: lzma compressed
250 11:07:35.011111 output: Data Size: 13116259 Bytes = 12808.85 KiB = 12.51 MiB
251 11:07:35.011166 output: Architecture: AArch64
252 11:07:35.011220 output: OS: Linux
253 11:07:35.011275 output: Load Address: 0x00000000
254 11:07:35.011329 output: Entry Point: 0x00000000
255 11:07:35.011384 output: Hash algo: crc32
256 11:07:35.011440 output: Hash value: 9bb85fb9
257 11:07:35.011494 output: Image 1 (fdt-1)
258 11:07:35.011547 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
259 11:07:35.011601 output: Created: Wed Jul 10 12:07:34 2024
260 11:07:35.011655 output: Type: Flat Device Tree
261 11:07:35.011707 output: Compression: uncompressed
262 11:07:35.011760 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
263 11:07:35.011814 output: Architecture: AArch64
264 11:07:35.011867 output: Hash algo: crc32
265 11:07:35.011920 output: Hash value: a9713552
266 11:07:35.011973 output: Image 2 (ramdisk-1)
267 11:07:35.012026 output: Description: unavailable
268 11:07:35.012079 output: Created: Wed Jul 10 12:07:34 2024
269 11:07:35.012132 output: Type: RAMDisk Image
270 11:07:35.012185 output: Compression: uncompressed
271 11:07:35.012238 output: Data Size: 18705510 Bytes = 18267.10 KiB = 17.84 MiB
272 11:07:35.012291 output: Architecture: AArch64
273 11:07:35.012344 output: OS: Linux
274 11:07:35.012395 output: Load Address: unavailable
275 11:07:35.012447 output: Entry Point: unavailable
276 11:07:35.012509 output: Hash algo: crc32
277 11:07:35.012561 output: Hash value: 0a2a6854
278 11:07:35.012613 output: Default Configuration: 'conf-1'
279 11:07:35.012667 output: Configuration 0 (conf-1)
280 11:07:35.012719 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
281 11:07:35.012773 output: Kernel: kernel-1
282 11:07:35.012825 output: Init Ramdisk: ramdisk-1
283 11:07:35.012878 output: FDT: fdt-1
284 11:07:35.012930 output: Loadables: kernel-1
285 11:07:35.012982 output:
286 11:07:35.013087 end: 1.6.8.1 prepare-fit (duration 00:00:15) [common]
287 11:07:35.013169 end: 1.6.8 prepare-kernel (duration 00:00:15) [common]
288 11:07:35.013251 end: 1.6 prepare-tftp-overlay (duration 00:00:20) [common]
289 11:07:35.013332 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:35) [common]
290 11:07:35.013394 No LXC device requested
291 11:07:35.013465 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
292 11:07:35.013542 start: 1.8 deploy-device-env (timeout 00:09:35) [common]
293 11:07:35.013615 end: 1.8 deploy-device-env (duration 00:00:00) [common]
294 11:07:35.013675 Checking files for TFTP limit of 4294967296 bytes.
295 11:07:35.014075 end: 1 tftp-deploy (duration 00:00:25) [common]
296 11:07:35.014172 start: 2 depthcharge-action (timeout 00:05:00) [common]
297 11:07:35.014258 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
298 11:07:35.014357 substitutions:
299 11:07:35.014422 - {DTB}: 14786825/tftp-deploy-aimptjqy/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
300 11:07:35.014482 - {INITRD}: 14786825/tftp-deploy-aimptjqy/ramdisk/ramdisk.cpio.gz
301 11:07:35.014540 - {KERNEL}: 14786825/tftp-deploy-aimptjqy/kernel/Image
302 11:07:35.014595 - {LAVA_MAC}: None
303 11:07:35.014649 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14786825/extract-nfsrootfs-_4sdnrfz
304 11:07:35.014704 - {NFS_SERVER_IP}: 192.168.201.1
305 11:07:35.014758 - {PRESEED_CONFIG}: None
306 11:07:35.014821 - {PRESEED_LOCAL}: None
307 11:07:35.014875 - {RAMDISK}: 14786825/tftp-deploy-aimptjqy/ramdisk/ramdisk.cpio.gz
308 11:07:35.014930 - {ROOT_PART}: None
309 11:07:35.014983 - {ROOT}: None
310 11:07:35.015036 - {SERVER_IP}: 192.168.201.1
311 11:07:35.015090 - {TEE}: None
312 11:07:35.015143 Parsed boot commands:
313 11:07:35.015195 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
314 11:07:35.015347 Parsed boot commands: tftpboot 192.168.201.1 14786825/tftp-deploy-aimptjqy/kernel/image.itb 14786825/tftp-deploy-aimptjqy/kernel/cmdline
315 11:07:35.015433 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
316 11:07:35.015513 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
317 11:07:35.015592 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
318 11:07:35.015669 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
319 11:07:35.015728 Not connected, no need to disconnect.
320 11:07:35.015799 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
321 11:07:35.015874 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
322 11:07:35.015934 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
323 11:07:35.018985 Setting prompt string to ['lava-test: # ']
324 11:07:35.019319 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
325 11:07:35.019423 end: 2.2.1 reset-connection (duration 00:00:00) [common]
326 11:07:35.019523 start: 2.2.2 reset-device (timeout 00:05:00) [common]
327 11:07:35.019611 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
328 11:07:35.019814 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=reboot']
329 11:07:44.161588 >> Command sent successfully.
330 11:07:44.165773 Returned 0 in 9 seconds
331 11:07:44.165936 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
333 11:07:44.166159 end: 2.2.2 reset-device (duration 00:00:09) [common]
334 11:07:44.166253 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
335 11:07:44.166331 Setting prompt string to 'Starting depthcharge on Juniper...'
336 11:07:44.166393 Changing prompt to 'Starting depthcharge on Juniper...'
337 11:07:44.166461 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
338 11:07:44.166820 [Enter `^Ec?' for help]
339 11:07:50.992243 [DL] 00000000 00000000 010701
340 11:07:50.996914
341 11:07:50.997001
342 11:07:50.997067 F0: 102B 0000
343 11:07:50.997134
344 11:07:50.997194 F3: 1006 0033 [0200]
345 11:07:51.000148
346 11:07:51.000216 F3: 4001 00E0 [0200]
347 11:07:51.000273
348 11:07:51.000330 F3: 0000 0000
349 11:07:51.004134
350 11:07:51.004218 V0: 0000 0000 [0001]
351 11:07:51.004284
352 11:07:51.004345 00: 1027 0002
353 11:07:51.004406
354 11:07:51.007079 01: 0000 0000
355 11:07:51.007164
356 11:07:51.007230 BP: 0C00 0251 [0000]
357 11:07:51.007289
358 11:07:51.010707 G0: 1182 0000
359 11:07:51.010792
360 11:07:51.010857 EC: 0004 0000 [0001]
361 11:07:51.010918
362 11:07:51.013766 S7: 0000 0000 [0000]
363 11:07:51.013849
364 11:07:51.013913 CC: 0000 0000 [0001]
365 11:07:51.016974
366 11:07:51.017057 T0: 0000 00DB [000F]
367 11:07:51.017122
368 11:07:51.017182 Jump to BL
369 11:07:51.017239
370 11:07:51.053185
371 11:07:51.053270
372 11:07:51.059587 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
373 11:07:51.063224 ARM64: Exception handlers installed.
374 11:07:51.066314 ARM64: Testing exception
375 11:07:51.069689 ARM64: Done test exception
376 11:07:51.074308 WDT: Last reset was cold boot
377 11:07:51.074392 SPI0(PAD0) initialized at 992727 Hz
378 11:07:51.080977 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
379 11:07:51.081063 Manufacturer: ef
380 11:07:51.087798 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
381 11:07:51.099973 Probing TPM: . done!
382 11:07:51.100056 TPM ready after 0 ms
383 11:07:51.106628 Connected to device vid:did:rid of 1ae0:0028:00
384 11:07:51.113486 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
385 11:07:51.116683 Initialized TPM device CR50 revision 0
386 11:07:51.160478 tlcl_send_startup: Startup return code is 0
387 11:07:51.160619 TPM: setup succeeded
388 11:07:51.169688 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
389 11:07:51.173329 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
390 11:07:51.176551 in-header: 03 19 00 00 08 00 00 00
391 11:07:51.179751 in-data: a2 e0 47 00 13 00 00 00
392 11:07:51.183000 Chrome EC: UHEPI supported
393 11:07:51.189718 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
394 11:07:51.193347 in-header: 03 a1 00 00 08 00 00 00
395 11:07:51.196630 in-data: 84 60 60 10 00 00 00 00
396 11:07:51.196706 Phase 1
397 11:07:51.199880 FMAP: area GBB found @ 3f5000 (12032 bytes)
398 11:07:51.206497 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
399 11:07:51.213088 VB2:vb2_check_recovery() Recovery was requested manually
400 11:07:51.217020 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
401 11:07:51.222919 Recovery requested (1009000e)
402 11:07:51.228309 tlcl_extend: response is 0
403 11:07:51.236977 tlcl_extend: response is 0
404 11:07:51.261718
405 11:07:51.261801
406 11:07:51.268243 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
407 11:07:51.271611 ARM64: Exception handlers installed.
408 11:07:51.275141 ARM64: Testing exception
409 11:07:51.278230 ARM64: Done test exception
410 11:07:51.293680 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2017
411 11:07:51.300616 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
412 11:07:51.304063 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
413 11:07:51.312094 [RTC]rtc_get_frequency_meter,134: input=0xf, output=916
414 11:07:51.319178 [RTC]rtc_get_frequency_meter,134: input=0x7, output=778
415 11:07:51.325987 [RTC]rtc_get_frequency_meter,134: input=0xb, output=848
416 11:07:51.332914 [RTC]rtc_get_frequency_meter,134: input=0x9, output=814
417 11:07:51.339515 [RTC]rtc_get_frequency_meter,134: input=0x8, output=795
418 11:07:51.342901 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
419 11:07:51.349746 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
420 11:07:51.353016 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
421 11:07:51.356217 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
422 11:07:51.363188 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
423 11:07:51.366475 in-header: 03 19 00 00 08 00 00 00
424 11:07:51.366580 in-data: a2 e0 47 00 13 00 00 00
425 11:07:51.369924 Chrome EC: UHEPI supported
426 11:07:51.376351 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
427 11:07:51.379750 in-header: 03 a1 00 00 08 00 00 00
428 11:07:51.383301 in-data: 84 60 60 10 00 00 00 00
429 11:07:51.386355 Skip loading cached calibration data
430 11:07:51.393482 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
431 11:07:51.396401 in-header: 03 a1 00 00 08 00 00 00
432 11:07:51.399953 in-data: 84 60 60 10 00 00 00 00
433 11:07:51.406651 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
434 11:07:51.410163 in-header: 03 a1 00 00 08 00 00 00
435 11:07:51.413232 in-data: 84 60 60 10 00 00 00 00
436 11:07:51.416634 ADC[3]: Raw value=216571 ID=1
437 11:07:51.416712 Manufacturer: ef
438 11:07:51.423268 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
439 11:07:51.426595 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
440 11:07:51.429888 CBFS @ 21000 size 3d4000
441 11:07:51.433468 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
442 11:07:51.440132 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
443 11:07:51.443535 CBFS: Found @ offset 3c700 size 44
444 11:07:51.443610 DRAM-K: Full Calibration
445 11:07:51.450095 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
446 11:07:51.450172 CBFS @ 21000 size 3d4000
447 11:07:51.457126 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
448 11:07:51.460347 CBFS: Locating 'fallback/dram'
449 11:07:51.463358 CBFS: Found @ offset 24b00 size 12268
450 11:07:51.490968 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
451 11:07:51.494116 ddr_geometry: 1, config: 0x0
452 11:07:51.497502 header.status = 0x0
453 11:07:51.501050 header.magic = 0x44524d4b (expected: 0x44524d4b)
454 11:07:51.504289 header.version = 0x5 (expected: 0x5)
455 11:07:51.507375 header.size = 0x8f0 (expected: 0x8f0)
456 11:07:51.507479 header.config = 0x0
457 11:07:51.510935 header.flags = 0x0
458 11:07:51.513980 header.checksum = 0x0
459 11:07:51.517413 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
460 11:07:51.524245 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
461 11:07:51.527468 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
462 11:07:51.530921 ddr_geometry:1
463 11:07:51.531028 [EMI] new MDL number = 1
464 11:07:51.534352 dram_cbt_mode_extern: 0
465 11:07:51.537631 dram_cbt_mode [RK0]: 0, [RK1]: 0
466 11:07:51.544250 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
467 11:07:51.544352
468 11:07:51.544449
469 11:07:51.547615 [Bianco] ETT version 0.0.0.1
470 11:07:51.550978 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
471 11:07:51.551077
472 11:07:51.554194 vSetVcoreByFreq with vcore:762500, freq=1600
473 11:07:51.554267
474 11:07:51.554326 [DramcInit]
475 11:07:51.558043 AutoRefreshCKEOff AutoREF OFF
476 11:07:51.561282 DDRPhyPLLSetting-CKEOFF
477 11:07:51.564162 DDRPhyPLLSetting-CKEON
478 11:07:51.564260
479 11:07:51.564350 Enable WDQS
480 11:07:51.568096 [ModeRegInit_LP4] CH0 RK0
481 11:07:51.571418 Write Rank0 MR13 =0x18
482 11:07:51.571518 Write Rank0 MR12 =0x5d
483 11:07:51.574559 Write Rank0 MR1 =0x56
484 11:07:51.578006 Write Rank0 MR2 =0x1a
485 11:07:51.578081 Write Rank0 MR11 =0x0
486 11:07:51.581603 Write Rank0 MR22 =0x38
487 11:07:51.581707 Write Rank0 MR14 =0x5d
488 11:07:51.585231 Write Rank0 MR3 =0x30
489 11:07:51.588413 Write Rank0 MR13 =0x58
490 11:07:51.588508 Write Rank0 MR12 =0x5d
491 11:07:51.591848 Write Rank0 MR1 =0x56
492 11:07:51.591950 Write Rank0 MR2 =0x2d
493 11:07:51.595043 Write Rank0 MR11 =0x23
494 11:07:51.598321 Write Rank0 MR22 =0x34
495 11:07:51.598396 Write Rank0 MR14 =0x10
496 11:07:51.601797 Write Rank0 MR3 =0x30
497 11:07:51.601896 Write Rank0 MR13 =0xd8
498 11:07:51.605471 [ModeRegInit_LP4] CH0 RK1
499 11:07:51.608603 Write Rank1 MR13 =0x18
500 11:07:51.608680 Write Rank1 MR12 =0x5d
501 11:07:51.611920 Write Rank1 MR1 =0x56
502 11:07:51.615081 Write Rank1 MR2 =0x1a
503 11:07:51.615158 Write Rank1 MR11 =0x0
504 11:07:51.618494 Write Rank1 MR22 =0x38
505 11:07:51.618571 Write Rank1 MR14 =0x5d
506 11:07:51.621901 Write Rank1 MR3 =0x30
507 11:07:51.625317 Write Rank1 MR13 =0x58
508 11:07:51.625421 Write Rank1 MR12 =0x5d
509 11:07:51.628566 Write Rank1 MR1 =0x56
510 11:07:51.628639 Write Rank1 MR2 =0x2d
511 11:07:51.632021 Write Rank1 MR11 =0x23
512 11:07:51.634894 Write Rank1 MR22 =0x34
513 11:07:51.634996 Write Rank1 MR14 =0x10
514 11:07:51.638685 Write Rank1 MR3 =0x30
515 11:07:51.638757 Write Rank1 MR13 =0xd8
516 11:07:51.641756 [ModeRegInit_LP4] CH1 RK0
517 11:07:51.645217 Write Rank0 MR13 =0x18
518 11:07:51.645320 Write Rank0 MR12 =0x5d
519 11:07:51.648749 Write Rank0 MR1 =0x56
520 11:07:51.651844 Write Rank0 MR2 =0x1a
521 11:07:51.651952 Write Rank0 MR11 =0x0
522 11:07:51.655048 Write Rank0 MR22 =0x38
523 11:07:51.655150 Write Rank0 MR14 =0x5d
524 11:07:51.658860 Write Rank0 MR3 =0x30
525 11:07:51.662092 Write Rank0 MR13 =0x58
526 11:07:51.662172 Write Rank0 MR12 =0x5d
527 11:07:51.665330 Write Rank0 MR1 =0x56
528 11:07:51.665431 Write Rank0 MR2 =0x2d
529 11:07:51.668532 Write Rank0 MR11 =0x23
530 11:07:51.671860 Write Rank0 MR22 =0x34
531 11:07:51.671952 Write Rank0 MR14 =0x10
532 11:07:51.675750 Write Rank0 MR3 =0x30
533 11:07:51.675848 Write Rank0 MR13 =0xd8
534 11:07:51.679168 [ModeRegInit_LP4] CH1 RK1
535 11:07:51.682406 Write Rank1 MR13 =0x18
536 11:07:51.682506 Write Rank1 MR12 =0x5d
537 11:07:51.685574 Write Rank1 MR1 =0x56
538 11:07:51.689172 Write Rank1 MR2 =0x1a
539 11:07:51.689270 Write Rank1 MR11 =0x0
540 11:07:51.692511 Write Rank1 MR22 =0x38
541 11:07:51.692583 Write Rank1 MR14 =0x5d
542 11:07:51.696158 Write Rank1 MR3 =0x30
543 11:07:51.699038 Write Rank1 MR13 =0x58
544 11:07:51.699111 Write Rank1 MR12 =0x5d
545 11:07:51.702293 Write Rank1 MR1 =0x56
546 11:07:51.702392 Write Rank1 MR2 =0x2d
547 11:07:51.705504 Write Rank1 MR11 =0x23
548 11:07:51.708796 Write Rank1 MR22 =0x34
549 11:07:51.708867 Write Rank1 MR14 =0x10
550 11:07:51.712041 Write Rank1 MR3 =0x30
551 11:07:51.715856 Write Rank1 MR13 =0xd8
552 11:07:51.715938 match AC timing 3
553 11:07:51.725368 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
554 11:07:51.725476 [MiockJmeterHQA]
555 11:07:51.732042 vSetVcoreByFreq with vcore:762500, freq=1600
556 11:07:51.836172
557 11:07:51.836296 MIOCK jitter meter ch=0
558 11:07:51.836393
559 11:07:51.839467 1T = (102-17) = 85 dly cells
560 11:07:51.846272 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
561 11:07:51.849421 vSetVcoreByFreq with vcore:725000, freq=1200
562 11:07:51.948989
563 11:07:51.949105 MIOCK jitter meter ch=0
564 11:07:51.949173
565 11:07:51.952273 1T = (96-16) = 80 dly cells
566 11:07:51.959111 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
567 11:07:51.962303 vSetVcoreByFreq with vcore:725000, freq=800
568 11:07:52.061009
569 11:07:52.061135 MIOCK jitter meter ch=0
570 11:07:52.061235
571 11:07:52.064482 1T = (96-16) = 80 dly cells
572 11:07:52.071418 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
573 11:07:52.074047 vSetVcoreByFreq with vcore:762500, freq=1600
574 11:07:52.077376 vSetVcoreByFreq with vcore:762500, freq=1600
575 11:07:52.077454
576 11:07:52.077520 K DRVP
577 11:07:52.081319 1. OCD DRVP=0 CALOUT=0
578 11:07:52.084520 1. OCD DRVP=1 CALOUT=0
579 11:07:52.084626 1. OCD DRVP=2 CALOUT=0
580 11:07:52.087869 1. OCD DRVP=3 CALOUT=0
581 11:07:52.087969 1. OCD DRVP=4 CALOUT=0
582 11:07:52.091146 1. OCD DRVP=5 CALOUT=0
583 11:07:52.094146 1. OCD DRVP=6 CALOUT=0
584 11:07:52.094220 1. OCD DRVP=7 CALOUT=0
585 11:07:52.097616 1. OCD DRVP=8 CALOUT=0
586 11:07:52.101072 1. OCD DRVP=9 CALOUT=1
587 11:07:52.101175
588 11:07:52.104288 1. OCD DRVP calibration OK! DRVP=9
589 11:07:52.104392
590 11:07:52.104490
591 11:07:52.104551
592 11:07:52.104608 K ODTN
593 11:07:52.107452 3. OCD ODTN=0 ,CALOUT=1
594 11:07:52.107520 3. OCD ODTN=1 ,CALOUT=1
595 11:07:52.110997 3. OCD ODTN=2 ,CALOUT=1
596 11:07:52.114202 3. OCD ODTN=3 ,CALOUT=1
597 11:07:52.114276 3. OCD ODTN=4 ,CALOUT=1
598 11:07:52.117860 3. OCD ODTN=5 ,CALOUT=1
599 11:07:52.117942 3. OCD ODTN=6 ,CALOUT=1
600 11:07:52.120871 3. OCD ODTN=7 ,CALOUT=0
601 11:07:52.120951
602 11:07:52.124341 3. OCD ODTN calibration OK! ODTN=7
603 11:07:52.124451
604 11:07:52.127657 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
605 11:07:52.130927 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
606 11:07:52.137361 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
607 11:07:52.137446
608 11:07:52.137511 K DRVP
609 11:07:52.141184 1. OCD DRVP=0 CALOUT=0
610 11:07:52.141262 1. OCD DRVP=1 CALOUT=0
611 11:07:52.144660 1. OCD DRVP=2 CALOUT=0
612 11:07:52.147938 1. OCD DRVP=3 CALOUT=0
613 11:07:52.148012 1. OCD DRVP=4 CALOUT=0
614 11:07:52.150989 1. OCD DRVP=5 CALOUT=0
615 11:07:52.154286 1. OCD DRVP=6 CALOUT=0
616 11:07:52.154387 1. OCD DRVP=7 CALOUT=0
617 11:07:52.157934 1. OCD DRVP=8 CALOUT=0
618 11:07:52.158007 1. OCD DRVP=9 CALOUT=0
619 11:07:52.161061 1. OCD DRVP=10 CALOUT=0
620 11:07:52.164414 1. OCD DRVP=11 CALOUT=1
621 11:07:52.164527
622 11:07:52.167599 1. OCD DRVP calibration OK! DRVP=11
623 11:07:52.167700
624 11:07:52.167793
625 11:07:52.167881
626 11:07:52.167967 K ODTN
627 11:07:52.171172 3. OCD ODTN=0 ,CALOUT=1
628 11:07:52.171246 3. OCD ODTN=1 ,CALOUT=1
629 11:07:52.174530 3. OCD ODTN=2 ,CALOUT=1
630 11:07:52.177979 3. OCD ODTN=3 ,CALOUT=1
631 11:07:52.178062 3. OCD ODTN=4 ,CALOUT=1
632 11:07:52.181092 3. OCD ODTN=5 ,CALOUT=1
633 11:07:52.184353 3. OCD ODTN=6 ,CALOUT=1
634 11:07:52.184462 3. OCD ODTN=7 ,CALOUT=1
635 11:07:52.188139 3. OCD ODTN=8 ,CALOUT=1
636 11:07:52.188223 3. OCD ODTN=9 ,CALOUT=1
637 11:07:52.191381 3. OCD ODTN=10 ,CALOUT=1
638 11:07:52.194556 3. OCD ODTN=11 ,CALOUT=1
639 11:07:52.194666 3. OCD ODTN=12 ,CALOUT=1
640 11:07:52.197822 3. OCD ODTN=13 ,CALOUT=1
641 11:07:52.201139 3. OCD ODTN=14 ,CALOUT=1
642 11:07:52.201252 3. OCD ODTN=15 ,CALOUT=0
643 11:07:52.204411
644 11:07:52.207849 3. OCD ODTN calibration OK! ODTN=15
645 11:07:52.207966
646 11:07:52.211117 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
647 11:07:52.214530 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
648 11:07:52.217911 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
649 11:07:52.218017
650 11:07:52.221480 [DramcInit]
651 11:07:52.224630 AutoRefreshCKEOff AutoREF OFF
652 11:07:52.224709 DDRPhyPLLSetting-CKEOFF
653 11:07:52.227946 DDRPhyPLLSetting-CKEON
654 11:07:52.228055
655 11:07:52.228155 Enable WDQS
656 11:07:52.228246 ==
657 11:07:52.234519 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
658 11:07:52.237866 fsp= 1, odt_onoff= 1, Byte mode= 0
659 11:07:52.237970 ==
660 11:07:52.241399 [Duty_Offset_Calibration]
661 11:07:52.241483
662 11:07:52.241548 ===========================
663 11:07:52.244675 B0:1 B1:1 CA:1
664 11:07:52.263939 ==
665 11:07:52.266955 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
666 11:07:52.270782 fsp= 1, odt_onoff= 1, Byte mode= 0
667 11:07:52.270868 ==
668 11:07:52.273922 [Duty_Offset_Calibration]
669 11:07:52.274016
670 11:07:52.277400 ===========================
671 11:07:52.277486 B0:1 B1:0 CA:2
672 11:07:52.310068 [ModeRegInit_LP4] CH0 RK0
673 11:07:52.313559 Write Rank0 MR13 =0x18
674 11:07:52.313644 Write Rank0 MR12 =0x5d
675 11:07:52.316910 Write Rank0 MR1 =0x56
676 11:07:52.320224 Write Rank0 MR2 =0x1a
677 11:07:52.320308 Write Rank0 MR11 =0x0
678 11:07:52.323677 Write Rank0 MR22 =0x38
679 11:07:52.323763 Write Rank0 MR14 =0x5d
680 11:07:52.326661 Write Rank0 MR3 =0x30
681 11:07:52.330036 Write Rank0 MR13 =0x58
682 11:07:52.330122 Write Rank0 MR12 =0x5d
683 11:07:52.333808 Write Rank0 MR1 =0x56
684 11:07:52.333894 Write Rank0 MR2 =0x2d
685 11:07:52.336732 Write Rank0 MR11 =0x23
686 11:07:52.340346 Write Rank0 MR22 =0x34
687 11:07:52.340431 Write Rank0 MR14 =0x10
688 11:07:52.343740 Write Rank0 MR3 =0x30
689 11:07:52.346636 Write Rank0 MR13 =0xd8
690 11:07:52.346722 [ModeRegInit_LP4] CH0 RK1
691 11:07:52.350124 Write Rank1 MR13 =0x18
692 11:07:52.350209 Write Rank1 MR12 =0x5d
693 11:07:52.353628 Write Rank1 MR1 =0x56
694 11:07:52.356686 Write Rank1 MR2 =0x1a
695 11:07:52.356772 Write Rank1 MR11 =0x0
696 11:07:52.360478 Write Rank1 MR22 =0x38
697 11:07:52.360562 Write Rank1 MR14 =0x5d
698 11:07:52.363609 Write Rank1 MR3 =0x30
699 11:07:52.366914 Write Rank1 MR13 =0x58
700 11:07:52.366999 Write Rank1 MR12 =0x5d
701 11:07:52.370207 Write Rank1 MR1 =0x56
702 11:07:52.373522 Write Rank1 MR2 =0x2d
703 11:07:52.373606 Write Rank1 MR11 =0x23
704 11:07:52.376740 Write Rank1 MR22 =0x34
705 11:07:52.376824 Write Rank1 MR14 =0x10
706 11:07:52.380571 Write Rank1 MR3 =0x30
707 11:07:52.383946 Write Rank1 MR13 =0xd8
708 11:07:52.384030 [ModeRegInit_LP4] CH1 RK0
709 11:07:52.387250 Write Rank0 MR13 =0x18
710 11:07:52.390107 Write Rank0 MR12 =0x5d
711 11:07:52.390192 Write Rank0 MR1 =0x56
712 11:07:52.393406 Write Rank0 MR2 =0x1a
713 11:07:52.393491 Write Rank0 MR11 =0x0
714 11:07:52.396750 Write Rank0 MR22 =0x38
715 11:07:52.400251 Write Rank0 MR14 =0x5d
716 11:07:52.400335 Write Rank0 MR3 =0x30
717 11:07:52.403511 Write Rank0 MR13 =0x58
718 11:07:52.403596 Write Rank0 MR12 =0x5d
719 11:07:52.406950 Write Rank0 MR1 =0x56
720 11:07:52.410392 Write Rank0 MR2 =0x2d
721 11:07:52.410477 Write Rank0 MR11 =0x23
722 11:07:52.413867 Write Rank0 MR22 =0x34
723 11:07:52.413952 Write Rank0 MR14 =0x10
724 11:07:52.417568 Write Rank0 MR3 =0x30
725 11:07:52.420425 Write Rank0 MR13 =0xd8
726 11:07:52.420516 [ModeRegInit_LP4] CH1 RK1
727 11:07:52.423606 Write Rank1 MR13 =0x18
728 11:07:52.427296 Write Rank1 MR12 =0x5d
729 11:07:52.427380 Write Rank1 MR1 =0x56
730 11:07:52.430522 Write Rank1 MR2 =0x1a
731 11:07:52.430606 Write Rank1 MR11 =0x0
732 11:07:52.433828 Write Rank1 MR22 =0x38
733 11:07:52.437117 Write Rank1 MR14 =0x5d
734 11:07:52.437202 Write Rank1 MR3 =0x30
735 11:07:52.440421 Write Rank1 MR13 =0x58
736 11:07:52.440513 Write Rank1 MR12 =0x5d
737 11:07:52.444016 Write Rank1 MR1 =0x56
738 11:07:52.447484 Write Rank1 MR2 =0x2d
739 11:07:52.447568 Write Rank1 MR11 =0x23
740 11:07:52.450593 Write Rank1 MR22 =0x34
741 11:07:52.450677 Write Rank1 MR14 =0x10
742 11:07:52.453802 Write Rank1 MR3 =0x30
743 11:07:52.457480 Write Rank1 MR13 =0xd8
744 11:07:52.457564 match AC timing 3
745 11:07:52.467571 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
746 11:07:52.470743 DramC Write-DBI off
747 11:07:52.470828 DramC Read-DBI off
748 11:07:52.474198 Write Rank0 MR13 =0x59
749 11:07:52.474295 ==
750 11:07:52.477366 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
751 11:07:52.480729 fsp= 1, odt_onoff= 1, Byte mode= 0
752 11:07:52.480815 ==
753 11:07:52.483974 === u2Vref_new: 0x56 --> 0x2d
754 11:07:52.487225 === u2Vref_new: 0x58 --> 0x38
755 11:07:52.490594 === u2Vref_new: 0x5a --> 0x39
756 11:07:52.493929 === u2Vref_new: 0x5c --> 0x3c
757 11:07:52.497296 === u2Vref_new: 0x5e --> 0x3d
758 11:07:52.500735 === u2Vref_new: 0x60 --> 0xa0
759 11:07:52.503946 [CA 0] Center 34 (6~63) winsize 58
760 11:07:52.507748 [CA 1] Center 36 (9~63) winsize 55
761 11:07:52.511128 [CA 2] Center 29 (0~59) winsize 60
762 11:07:52.513968 [CA 3] Center 25 (-2~52) winsize 55
763 11:07:52.514053 [CA 4] Center 25 (-2~53) winsize 56
764 11:07:52.517722 [CA 5] Center 30 (0~60) winsize 61
765 11:07:52.517807
766 11:07:52.521155 [CATrainingPosCal] consider 1 rank data
767 11:07:52.524449 u2DelayCellTimex100 = 735/100 ps
768 11:07:52.527613 CA0 delay=34 (6~63),Diff = 9 PI (11 cell)
769 11:07:52.534238 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
770 11:07:52.537763 CA2 delay=29 (0~59),Diff = 4 PI (5 cell)
771 11:07:52.541036 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
772 11:07:52.544207 CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)
773 11:07:52.547854 CA5 delay=30 (0~60),Diff = 5 PI (6 cell)
774 11:07:52.547939
775 11:07:52.550919 CA PerBit enable=1, Macro0, CA PI delay=25
776 11:07:52.554349 === u2Vref_new: 0x60 --> 0xa0
777 11:07:52.554434
778 11:07:52.557751 Vref(ca) range 1: 32
779 11:07:52.557836
780 11:07:52.557902 CS Dly= 9 (40-0-32)
781 11:07:52.560923 Write Rank0 MR13 =0xd8
782 11:07:52.561038 Write Rank0 MR13 =0xd8
783 11:07:52.564585 Write Rank0 MR12 =0x60
784 11:07:52.567961 Write Rank1 MR13 =0x59
785 11:07:52.568046 ==
786 11:07:52.571053 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
787 11:07:52.574265 fsp= 1, odt_onoff= 1, Byte mode= 0
788 11:07:52.574352 ==
789 11:07:52.577587 === u2Vref_new: 0x56 --> 0x2d
790 11:07:52.581385 === u2Vref_new: 0x58 --> 0x38
791 11:07:52.584819 === u2Vref_new: 0x5a --> 0x39
792 11:07:52.588028 === u2Vref_new: 0x5c --> 0x3c
793 11:07:52.591334 === u2Vref_new: 0x5e --> 0x3d
794 11:07:52.594983 === u2Vref_new: 0x60 --> 0xa0
795 11:07:52.597628 [CA 0] Center 36 (9~63) winsize 55
796 11:07:52.601458 [CA 1] Center 36 (9~63) winsize 55
797 11:07:52.604704 [CA 2] Center 31 (2~60) winsize 59
798 11:07:52.607852 [CA 3] Center 26 (-2~54) winsize 57
799 11:07:52.611243 [CA 4] Center 26 (-2~54) winsize 57
800 11:07:52.611328 [CA 5] Center 31 (2~61) winsize 60
801 11:07:52.611395
802 11:07:52.617786 [CATrainingPosCal] consider 2 rank data
803 11:07:52.617871 u2DelayCellTimex100 = 735/100 ps
804 11:07:52.624308 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
805 11:07:52.627956 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
806 11:07:52.631603 CA2 delay=30 (2~59),Diff = 5 PI (6 cell)
807 11:07:52.634928 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
808 11:07:52.638254 CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)
809 11:07:52.641478 CA5 delay=31 (2~60),Diff = 6 PI (7 cell)
810 11:07:52.641563
811 11:07:52.644687 CA PerBit enable=1, Macro0, CA PI delay=25
812 11:07:52.648033 === u2Vref_new: 0x5c --> 0x3c
813 11:07:52.648118
814 11:07:52.651312 Vref(ca) range 1: 28
815 11:07:52.651396
816 11:07:52.651462 CS Dly= 7 (38-0-32)
817 11:07:52.654786 Write Rank1 MR13 =0xd8
818 11:07:52.654870 Write Rank1 MR13 =0xd8
819 11:07:52.657946 Write Rank1 MR12 =0x5c
820 11:07:52.661632 [RankSwap] Rank num 2, (Multi 1), Rank 0
821 11:07:52.664906 Write Rank0 MR2 =0xad
822 11:07:52.664991 [Write Leveling]
823 11:07:52.668229 delay byte0 byte1 byte2 byte3
824 11:07:52.668313
825 11:07:52.671220 10 0 0
826 11:07:52.671300 11 0 0
827 11:07:52.671365 12 0 0
828 11:07:52.674698 13 0 0
829 11:07:52.674782 14 0 0
830 11:07:52.677925 15 0 0
831 11:07:52.678038 16 0 0
832 11:07:52.678139 17 0 0
833 11:07:52.681314 18 0 0
834 11:07:52.681426 19 0 0
835 11:07:52.685067 20 0 0
836 11:07:52.685143 21 0 0
837 11:07:52.688288 22 0 0
838 11:07:52.688390 23 0 0
839 11:07:52.688492 24 0 ff
840 11:07:52.691551 25 0 ff
841 11:07:52.691655 26 0 ff
842 11:07:52.694921 27 0 ff
843 11:07:52.695036 28 0 ff
844 11:07:52.698086 29 0 ff
845 11:07:52.698194 30 0 ff
846 11:07:52.698293 31 ff ff
847 11:07:52.701639 32 0 ff
848 11:07:52.701711 33 ff ff
849 11:07:52.705315 34 ff ff
850 11:07:52.705399 35 ff ff
851 11:07:52.708803 36 ff ff
852 11:07:52.708899 37 ff ff
853 11:07:52.711734 38 ff ff
854 11:07:52.711818 39 ff ff
855 11:07:52.715171 pass bytecount = 0xff (0xff: all bytes pass)
856 11:07:52.715254
857 11:07:52.718403 DQS0 dly: 33
858 11:07:52.718512 DQS1 dly: 24
859 11:07:52.721755 Write Rank0 MR2 =0x2d
860 11:07:52.725114 [RankSwap] Rank num 2, (Multi 1), Rank 0
861 11:07:52.725197 Write Rank0 MR1 =0xd6
862 11:07:52.728312 [Gating]
863 11:07:52.728395 ==
864 11:07:52.731488 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
865 11:07:52.735386 fsp= 1, odt_onoff= 1, Byte mode= 0
866 11:07:52.735469 ==
867 11:07:52.742061 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
868 11:07:52.745569 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
869 11:07:52.748450 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
870 11:07:52.751971 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
871 11:07:52.758523 3 1 16 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
872 11:07:52.761788 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
873 11:07:52.765217 3 1 24 |1818 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
874 11:07:52.771579 3 1 28 |807 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
875 11:07:52.774905 3 2 0 |3534 504 |(11 11)(11 11) |(0 0)(1 1)| 0
876 11:07:52.778587 3 2 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
877 11:07:52.785346 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
878 11:07:52.788662 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
879 11:07:52.791790 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
880 11:07:52.798344 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
881 11:07:52.801966 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
882 11:07:52.805276 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
883 11:07:52.808561 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
884 11:07:52.815022 3 3 4 |3534 1818 |(11 11)(11 11) |(0 0)(1 1)| 0
885 11:07:52.818617 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
886 11:07:52.821946 [Byte 1] Lead/lag falling Transition (3, 3, 8)
887 11:07:52.828391 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
888 11:07:52.831868 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
889 11:07:52.834971 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
890 11:07:52.838451 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
891 11:07:52.845092 3 3 28 |1918 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
892 11:07:52.848919 3 4 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
893 11:07:52.852066 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
894 11:07:52.858980 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
895 11:07:52.862012 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
896 11:07:52.865361 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
897 11:07:52.871743 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
898 11:07:52.875230 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
899 11:07:52.878486 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
900 11:07:52.885356 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
901 11:07:52.888988 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
902 11:07:52.892302 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
903 11:07:52.895589 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
904 11:07:52.902135 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
905 11:07:52.905463 [Byte 0] Lead/lag falling Transition (3, 5, 16)
906 11:07:52.908826 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
907 11:07:52.912369 [Byte 0] Lead/lag Transition tap number (2)
908 11:07:52.919103 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
909 11:07:52.922171 [Byte 1] Lead/lag falling Transition (3, 5, 24)
910 11:07:52.925581 3 5 28 |4646 3d3d |(0 0)(11 11) |(0 0)(1 0)| 0
911 11:07:52.929147 [Byte 0]First pass (3, 5, 28)
912 11:07:52.932263 [Byte 1] Lead/lag Transition tap number (2)
913 11:07:52.935400 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
914 11:07:52.942572 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
915 11:07:52.945673 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
916 11:07:52.949177 [Byte 1]First pass (3, 6, 8)
917 11:07:52.952218 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
918 11:07:52.955695 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
919 11:07:52.959238 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
920 11:07:52.962308 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
921 11:07:52.969272 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
922 11:07:52.972604 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
923 11:07:52.975665 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
924 11:07:52.979024 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
925 11:07:52.982955 All bytes gating window > 1UI, Early break!
926 11:07:52.983042
927 11:07:52.989350 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
928 11:07:52.989435
929 11:07:52.992475 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
930 11:07:52.992560
931 11:07:52.992626
932 11:07:52.992687
933 11:07:52.995761 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
934 11:07:52.995846
935 11:07:52.999087 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
936 11:07:52.999172
937 11:07:52.999238
938 11:07:53.002643 Write Rank0 MR1 =0x56
939 11:07:53.002729
940 11:07:53.005628 best RODT dly(2T, 0.5T) = (2, 2)
941 11:07:53.005712
942 11:07:53.009531 best RODT dly(2T, 0.5T) = (2, 2)
943 11:07:53.009615 ==
944 11:07:53.012706 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
945 11:07:53.016025 fsp= 1, odt_onoff= 1, Byte mode= 0
946 11:07:53.016111 ==
947 11:07:53.022882 Start DQ dly to find pass range UseTestEngine =0
948 11:07:53.025757 x-axis: bit #, y-axis: DQ dly (-127~63)
949 11:07:53.025842 RX Vref Scan = 0
950 11:07:53.029226 -26, [0] xxxxxxxx xxxxxxxx [MSB]
951 11:07:53.032628 -25, [0] xxxxxxxx xxxxxxxx [MSB]
952 11:07:53.036295 -24, [0] xxxxxxxx xxxxxxxx [MSB]
953 11:07:53.039561 -23, [0] xxxxxxxx xxxxxxxx [MSB]
954 11:07:53.043088 -22, [0] xxxxxxxx xxxxxxxx [MSB]
955 11:07:53.043175 -21, [0] xxxxxxxx xxxxxxxx [MSB]
956 11:07:53.046278 -20, [0] xxxxxxxx xxxxxxxx [MSB]
957 11:07:53.049863 -19, [0] xxxxxxxx xxxxxxxx [MSB]
958 11:07:53.052702 -18, [0] xxxxxxxx xxxxxxxx [MSB]
959 11:07:53.055885 -17, [0] xxxxxxxx xxxxxxxx [MSB]
960 11:07:53.059280 -16, [0] xxxxxxxx xxxxxxxx [MSB]
961 11:07:53.063009 -15, [0] xxxxxxxx xxxxxxxx [MSB]
962 11:07:53.066243 -14, [0] xxxxxxxx xxxxxxxx [MSB]
963 11:07:53.066329 -13, [0] xxxxxxxx xxxxxxxx [MSB]
964 11:07:53.069325 -12, [0] xxxxxxxx xxxxxxxx [MSB]
965 11:07:53.073021 -11, [0] xxxxxxxx xxxxxxxx [MSB]
966 11:07:53.076206 -10, [0] xxxxxxxx xxxxxxxx [MSB]
967 11:07:53.079550 -9, [0] xxxxxxxx xxxxxxxx [MSB]
968 11:07:53.082998 -8, [0] xxxxxxxx xxxxxxxx [MSB]
969 11:07:53.086531 -7, [0] xxxxxxxx xxxxxxxx [MSB]
970 11:07:53.086614 -6, [0] xxxxxxxx xxxxxxxx [MSB]
971 11:07:53.089508 -5, [0] xxxxxxxx xxxxxxxx [MSB]
972 11:07:53.093028 -4, [0] xxxxxxxx xxxxxxxx [MSB]
973 11:07:53.096404 -3, [0] xxxxxxxx xxxxxxxx [MSB]
974 11:07:53.099351 -2, [0] xxxoxxxx ooxxxxxx [MSB]
975 11:07:53.102922 -1, [0] xxxoxxxx ooxoxxxx [MSB]
976 11:07:53.102995 0, [0] xxxoxoxx ooxoxxxx [MSB]
977 11:07:53.106485 1, [0] xxxoxoox ooxoooxx [MSB]
978 11:07:53.109689 2, [0] xxxoxoox ooxoooxx [MSB]
979 11:07:53.112986 3, [0] xxxoxooo ooxoooox [MSB]
980 11:07:53.116280 4, [0] xoooxooo ooxooooo [MSB]
981 11:07:53.119728 5, [0] xooooooo ooxooooo [MSB]
982 11:07:53.119804 6, [0] xooooooo ooxooooo [MSB]
983 11:07:53.123206 7, [0] oooooooo ooxooooo [MSB]
984 11:07:53.126496 33, [0] oooxoooo xooooooo [MSB]
985 11:07:53.129555 34, [0] oooxoooo xooooooo [MSB]
986 11:07:53.132909 35, [0] oooxoooo xooooooo [MSB]
987 11:07:53.136085 36, [0] oooxoxoo xooxoooo [MSB]
988 11:07:53.139777 37, [0] oooxoxxx xxoxoooo [MSB]
989 11:07:53.139850 38, [0] oooxoxxx xxoxxoxo [MSB]
990 11:07:53.142717 39, [0] oooxoxxx xxoxxxxo [MSB]
991 11:07:53.145946 40, [0] oooxxxxx xxoxxxxo [MSB]
992 11:07:53.149424 41, [0] xxxxxxxx xxoxxxxo [MSB]
993 11:07:53.153273 42, [0] xxxxxxxx xxoxxxxx [MSB]
994 11:07:53.156420 43, [0] xxxxxxxx xxoxxxxx [MSB]
995 11:07:53.159705 44, [0] xxxxxxxx xxxxxxxx [MSB]
996 11:07:53.162834 iDelay=44, Bit 0, Center 23 (7 ~ 40) 34
997 11:07:53.166192 iDelay=44, Bit 1, Center 22 (4 ~ 40) 37
998 11:07:53.169353 iDelay=44, Bit 2, Center 22 (4 ~ 40) 37
999 11:07:53.172743 iDelay=44, Bit 3, Center 15 (-2 ~ 32) 35
1000 11:07:53.176187 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
1001 11:07:53.179660 iDelay=44, Bit 5, Center 17 (0 ~ 35) 36
1002 11:07:53.182930 iDelay=44, Bit 6, Center 18 (1 ~ 36) 36
1003 11:07:53.186490 iDelay=44, Bit 7, Center 19 (3 ~ 36) 34
1004 11:07:53.189642 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
1005 11:07:53.193003 iDelay=44, Bit 9, Center 17 (-2 ~ 36) 39
1006 11:07:53.196426 iDelay=44, Bit 10, Center 25 (8 ~ 43) 36
1007 11:07:53.199576 iDelay=44, Bit 11, Center 17 (-1 ~ 35) 37
1008 11:07:53.203126 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
1009 11:07:53.209868 iDelay=44, Bit 13, Center 19 (1 ~ 38) 38
1010 11:07:53.213333 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
1011 11:07:53.216353 iDelay=44, Bit 15, Center 22 (4 ~ 41) 38
1012 11:07:53.216437 ==
1013 11:07:53.220084 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1014 11:07:53.223375 fsp= 1, odt_onoff= 1, Byte mode= 0
1015 11:07:53.223460 ==
1016 11:07:53.226756 DQS Delay:
1017 11:07:53.226830 DQS0 = 0, DQS1 = 0
1018 11:07:53.226900 DQM Delay:
1019 11:07:53.230169 DQM0 = 19, DQM1 = 19
1020 11:07:53.230241 DQ Delay:
1021 11:07:53.233239 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =15
1022 11:07:53.236882 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =19
1023 11:07:53.240193 DQ8 =15, DQ9 =17, DQ10 =25, DQ11 =17
1024 11:07:53.243330 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =22
1025 11:07:53.243407
1026 11:07:53.243469
1027 11:07:53.246680 DramC Write-DBI off
1028 11:07:53.246760 ==
1029 11:07:53.249779 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1030 11:07:53.253560 fsp= 1, odt_onoff= 1, Byte mode= 0
1031 11:07:53.253671 ==
1032 11:07:53.259976 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1033 11:07:53.260084
1034 11:07:53.260180 Begin, DQ Scan Range 920~1176
1035 11:07:53.263170
1036 11:07:53.263257
1037 11:07:53.263324 TX Vref Scan disable
1038 11:07:53.266955 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1039 11:07:53.270265 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1040 11:07:53.273602 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1041 11:07:53.276817 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1042 11:07:53.279937 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1043 11:07:53.286974 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1044 11:07:53.290210 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1045 11:07:53.293583 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1046 11:07:53.296891 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1047 11:07:53.300230 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1048 11:07:53.303602 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1049 11:07:53.306929 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1050 11:07:53.310377 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1051 11:07:53.313601 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1052 11:07:53.316731 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1053 11:07:53.320197 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1054 11:07:53.323529 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1055 11:07:53.327371 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1056 11:07:53.330341 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1057 11:07:53.333955 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1058 11:07:53.337115 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1059 11:07:53.340279 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1060 11:07:53.344198 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1061 11:07:53.347435 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1062 11:07:53.353773 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1063 11:07:53.357270 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1064 11:07:53.360592 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1065 11:07:53.363880 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1066 11:07:53.366951 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1067 11:07:53.370597 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1068 11:07:53.373812 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1069 11:07:53.377143 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1070 11:07:53.380617 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1071 11:07:53.384146 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1072 11:07:53.386944 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1073 11:07:53.390312 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1074 11:07:53.394088 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1075 11:07:53.397462 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1076 11:07:53.400368 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1077 11:07:53.403827 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1078 11:07:53.407157 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1079 11:07:53.413847 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1080 11:07:53.417360 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1081 11:07:53.420804 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1082 11:07:53.423944 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1083 11:07:53.427490 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1084 11:07:53.430402 966 |3 6 6|[0] xxxxxxxx oxxoxxxx [MSB]
1085 11:07:53.434060 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1086 11:07:53.437475 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1087 11:07:53.440471 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1088 11:07:53.444313 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1089 11:07:53.447570 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1090 11:07:53.450472 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1091 11:07:53.454399 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1092 11:07:53.457142 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1093 11:07:53.460995 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1094 11:07:53.464085 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1095 11:07:53.467346 977 |3 6 17|[0] xoxooooo oooooooo [MSB]
1096 11:07:53.474375 985 |3 6 25|[0] oooooooo xooooooo [MSB]
1097 11:07:53.477602 986 |3 6 26|[0] oooooooo xooooooo [MSB]
1098 11:07:53.480942 987 |3 6 27|[0] oooooooo xooxoooo [MSB]
1099 11:07:53.484341 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1100 11:07:53.487642 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1101 11:07:53.491120 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1102 11:07:53.494142 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1103 11:07:53.498013 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1104 11:07:53.501252 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1105 11:07:53.504554 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1106 11:07:53.507770 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1107 11:07:53.510889 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1108 11:07:53.514308 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1109 11:07:53.517582 998 |3 6 38|[0] oooxxxxx xxxxxxxx [MSB]
1110 11:07:53.521034 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1111 11:07:53.524586 Byte0, DQ PI dly=986, DQM PI dly= 986
1112 11:07:53.531067 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1113 11:07:53.531152
1114 11:07:53.534980 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1115 11:07:53.535065
1116 11:07:53.537996 Byte1, DQ PI dly=977, DQM PI dly= 977
1117 11:07:53.541691 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1118 11:07:53.541776
1119 11:07:53.548144 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1120 11:07:53.548229
1121 11:07:53.548295 ==
1122 11:07:53.551615 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1123 11:07:53.554592 fsp= 1, odt_onoff= 1, Byte mode= 0
1124 11:07:53.554676 ==
1125 11:07:53.558074 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1126 11:07:53.561395
1127 11:07:53.561479 Begin, DQ Scan Range 953~1017
1128 11:07:53.564381 Write Rank0 MR14 =0x0
1129 11:07:53.572793
1130 11:07:53.572877 CH=0, VrefRange= 0, VrefLevel = 0
1131 11:07:53.579210 TX Bit0 (980~994) 15 987, Bit8 (968~978) 11 973,
1132 11:07:53.582537 TX Bit1 (978~993) 16 985, Bit9 (969~984) 16 976,
1133 11:07:53.589684 TX Bit2 (980~994) 15 987, Bit10 (975~987) 13 981,
1134 11:07:53.592706 TX Bit3 (976~987) 12 981, Bit11 (968~982) 15 975,
1135 11:07:53.596253 TX Bit4 (979~992) 14 985, Bit12 (970~983) 14 976,
1136 11:07:53.602791 TX Bit5 (977~991) 15 984, Bit13 (970~983) 14 976,
1137 11:07:53.606242 TX Bit6 (978~991) 14 984, Bit14 (969~984) 16 976,
1138 11:07:53.609489 TX Bit7 (979~992) 14 985, Bit15 (974~986) 13 980,
1139 11:07:53.609574
1140 11:07:53.612885 Write Rank0 MR14 =0x2
1141 11:07:53.621459
1142 11:07:53.621542 CH=0, VrefRange= 0, VrefLevel = 2
1143 11:07:53.628127 TX Bit0 (979~995) 17 987, Bit8 (967~979) 13 973,
1144 11:07:53.631287 TX Bit1 (978~994) 17 986, Bit9 (968~984) 17 976,
1145 11:07:53.638111 TX Bit2 (979~994) 16 986, Bit10 (975~988) 14 981,
1146 11:07:53.641417 TX Bit3 (975~988) 14 981, Bit11 (968~982) 15 975,
1147 11:07:53.644788 TX Bit4 (978~992) 15 985, Bit12 (971~984) 14 977,
1148 11:07:53.651255 TX Bit5 (976~992) 17 984, Bit13 (969~984) 16 976,
1149 11:07:53.654589 TX Bit6 (977~991) 15 984, Bit14 (969~985) 17 977,
1150 11:07:53.658160 TX Bit7 (979~993) 15 986, Bit15 (974~987) 14 980,
1151 11:07:53.658244
1152 11:07:53.661183 Write Rank0 MR14 =0x4
1153 11:07:53.670251
1154 11:07:53.670334 CH=0, VrefRange= 0, VrefLevel = 4
1155 11:07:53.677056 TX Bit0 (979~996) 18 987, Bit8 (967~981) 15 974,
1156 11:07:53.680189 TX Bit1 (978~994) 17 986, Bit9 (968~984) 17 976,
1157 11:07:53.683423 TX Bit2 (979~996) 18 987, Bit10 (974~989) 16 981,
1158 11:07:53.689966 TX Bit3 (975~989) 15 982, Bit11 (968~983) 16 975,
1159 11:07:53.693262 TX Bit4 (978~993) 16 985, Bit12 (970~984) 15 977,
1160 11:07:53.700306 TX Bit5 (976~992) 17 984, Bit13 (969~984) 16 976,
1161 11:07:53.703622 TX Bit6 (977~992) 16 984, Bit14 (969~985) 17 977,
1162 11:07:53.706958 TX Bit7 (978~993) 16 985, Bit15 (974~988) 15 981,
1163 11:07:53.707043
1164 11:07:53.710246 Write Rank0 MR14 =0x6
1165 11:07:53.719091
1166 11:07:53.719175 CH=0, VrefRange= 0, VrefLevel = 6
1167 11:07:53.725606 TX Bit0 (979~997) 19 988, Bit8 (967~981) 15 974,
1168 11:07:53.729004 TX Bit1 (978~995) 18 986, Bit9 (968~985) 18 976,
1169 11:07:53.735505 TX Bit2 (978~996) 19 987, Bit10 (974~990) 17 982,
1170 11:07:53.739110 TX Bit3 (975~990) 16 982, Bit11 (968~983) 16 975,
1171 11:07:53.742246 TX Bit4 (978~994) 17 986, Bit12 (969~985) 17 977,
1172 11:07:53.749386 TX Bit5 (976~993) 18 984, Bit13 (969~985) 17 977,
1173 11:07:53.752476 TX Bit6 (977~993) 17 985, Bit14 (968~986) 19 977,
1174 11:07:53.756037 TX Bit7 (978~993) 16 985, Bit15 (974~989) 16 981,
1175 11:07:53.756122
1176 11:07:53.759546 Write Rank0 MR14 =0x8
1177 11:07:53.767645
1178 11:07:53.767729 CH=0, VrefRange= 0, VrefLevel = 8
1179 11:07:53.819085 TX Bit0 (978~997) 20 987, Bit8 (966~982) 17 974,
1180 11:07:53.819371 TX Bit1 (978~995) 18 986, Bit9 (968~985) 18 976,
1181 11:07:53.819468 TX Bit2 (978~996) 19 987, Bit10 (973~990) 18 981,
1182 11:07:53.819567 TX Bit3 (974~991) 18 982, Bit11 (967~984) 18 975,
1183 11:07:53.819632 TX Bit4 (978~994) 17 986, Bit12 (969~985) 17 977,
1184 11:07:53.819692 TX Bit5 (976~993) 18 984, Bit13 (969~985) 17 977,
1185 11:07:53.820346 TX Bit6 (977~993) 17 985, Bit14 (968~987) 20 977,
1186 11:07:53.820658 TX Bit7 (978~994) 17 986, Bit15 (973~990) 18 981,
1187 11:07:53.820731
1188 11:07:53.820793 Write Rank0 MR14 =0xa
1189 11:07:53.820852
1190 11:07:53.820908 CH=0, VrefRange= 0, VrefLevel = 10
1191 11:07:53.854748 TX Bit0 (978~996) 19 987, Bit8 (966~983) 18 974,
1192 11:07:53.855060 TX Bit1 (977~996) 20 986, Bit9 (968~985) 18 976,
1193 11:07:53.855164 TX Bit2 (978~996) 19 987, Bit10 (973~991) 19 982,
1194 11:07:53.855230 TX Bit3 (974~991) 18 982, Bit11 (967~985) 19 976,
1195 11:07:53.855303 TX Bit4 (977~995) 19 986, Bit12 (969~986) 18 977,
1196 11:07:53.855758 TX Bit5 (976~994) 19 985, Bit13 (968~986) 19 977,
1197 11:07:53.856050 TX Bit6 (977~994) 18 985, Bit14 (968~988) 21 978,
1198 11:07:53.858533 TX Bit7 (978~995) 18 986, Bit15 (973~990) 18 981,
1199 11:07:53.858618
1200 11:07:53.858683 Write Rank0 MR14 =0xc
1201 11:07:53.865897
1202 11:07:53.869067 CH=0, VrefRange= 0, VrefLevel = 12
1203 11:07:53.872316 TX Bit0 (978~998) 21 988, Bit8 (966~983) 18 974,
1204 11:07:53.875402 TX Bit1 (977~996) 20 986, Bit9 (968~986) 19 977,
1205 11:07:53.882325 TX Bit2 (978~998) 21 988, Bit10 (973~991) 19 982,
1206 11:07:53.885903 TX Bit3 (974~992) 19 983, Bit11 (967~985) 19 976,
1207 11:07:53.888796 TX Bit4 (977~996) 20 986, Bit12 (968~986) 19 977,
1208 11:07:53.895752 TX Bit5 (976~994) 19 985, Bit13 (968~987) 20 977,
1209 11:07:53.899215 TX Bit6 (977~994) 18 985, Bit14 (968~988) 21 978,
1210 11:07:53.902519 TX Bit7 (978~995) 18 986, Bit15 (972~990) 19 981,
1211 11:07:53.902601
1212 11:07:53.905959 Write Rank0 MR14 =0xe
1213 11:07:53.915256
1214 11:07:53.918306 CH=0, VrefRange= 0, VrefLevel = 14
1215 11:07:53.921864 TX Bit0 (978~999) 22 988, Bit8 (966~984) 19 975,
1216 11:07:53.924648 TX Bit1 (977~998) 22 987, Bit9 (967~987) 21 977,
1217 11:07:53.931890 TX Bit2 (977~998) 22 987, Bit10 (973~991) 19 982,
1218 11:07:53.935384 TX Bit3 (973~992) 20 982, Bit11 (967~985) 19 976,
1219 11:07:53.938140 TX Bit4 (977~996) 20 986, Bit12 (968~987) 20 977,
1220 11:07:53.945233 TX Bit5 (975~994) 20 984, Bit13 (968~987) 20 977,
1221 11:07:53.948343 TX Bit6 (976~994) 19 985, Bit14 (968~989) 22 978,
1222 11:07:53.951554 TX Bit7 (977~996) 20 986, Bit15 (972~991) 20 981,
1223 11:07:53.951641
1224 11:07:53.954886 Write Rank0 MR14 =0x10
1225 11:07:53.964769
1226 11:07:53.964851 CH=0, VrefRange= 0, VrefLevel = 16
1227 11:07:53.971275 TX Bit0 (978~999) 22 988, Bit8 (966~984) 19 975,
1228 11:07:53.974476 TX Bit1 (977~998) 22 987, Bit9 (968~988) 21 978,
1229 11:07:53.981441 TX Bit2 (978~999) 22 988, Bit10 (972~992) 21 982,
1230 11:07:53.984163 TX Bit3 (972~992) 21 982, Bit11 (966~985) 20 975,
1231 11:07:53.987587 TX Bit4 (977~998) 22 987, Bit12 (968~988) 21 978,
1232 11:07:53.994214 TX Bit5 (975~995) 21 985, Bit13 (968~988) 21 978,
1233 11:07:53.997759 TX Bit6 (976~995) 20 985, Bit14 (968~990) 23 979,
1234 11:07:54.000999 TX Bit7 (977~997) 21 987, Bit15 (971~991) 21 981,
1235 11:07:54.001085
1236 11:07:54.004226 Write Rank0 MR14 =0x12
1237 11:07:54.013558
1238 11:07:54.017177 CH=0, VrefRange= 0, VrefLevel = 18
1239 11:07:54.020295 TX Bit0 (978~999) 22 988, Bit8 (965~985) 21 975,
1240 11:07:54.023464 TX Bit1 (977~998) 22 987, Bit9 (967~988) 22 977,
1241 11:07:54.030544 TX Bit2 (977~999) 23 988, Bit10 (972~992) 21 982,
1242 11:07:54.033908 TX Bit3 (972~993) 22 982, Bit11 (966~986) 21 976,
1243 11:07:54.037131 TX Bit4 (977~997) 21 987, Bit12 (968~988) 21 978,
1244 11:07:54.044076 TX Bit5 (975~995) 21 985, Bit13 (968~988) 21 978,
1245 11:07:54.047149 TX Bit6 (976~996) 21 986, Bit14 (967~990) 24 978,
1246 11:07:54.050411 TX Bit7 (977~998) 22 987, Bit15 (971~991) 21 981,
1247 11:07:54.050489
1248 11:07:54.053736 Write Rank0 MR14 =0x14
1249 11:07:54.063331
1250 11:07:54.066829 CH=0, VrefRange= 0, VrefLevel = 20
1251 11:07:54.070123 TX Bit0 (977~1000) 24 988, Bit8 (965~985) 21 975,
1252 11:07:54.073205 TX Bit1 (977~999) 23 988, Bit9 (967~988) 22 977,
1253 11:07:54.079607 TX Bit2 (977~1000) 24 988, Bit10 (971~993) 23 982,
1254 11:07:54.082959 TX Bit3 (972~993) 22 982, Bit11 (966~987) 22 976,
1255 11:07:54.086649 TX Bit4 (977~999) 23 988, Bit12 (968~989) 22 978,
1256 11:07:54.093385 TX Bit5 (974~996) 23 985, Bit13 (967~989) 23 978,
1257 11:07:54.096589 TX Bit6 (975~997) 23 986, Bit14 (967~990) 24 978,
1258 11:07:54.100107 TX Bit7 (977~997) 21 987, Bit15 (971~992) 22 981,
1259 11:07:54.100189
1260 11:07:54.102893 Write Rank0 MR14 =0x16
1261 11:07:54.112879
1262 11:07:54.116155 CH=0, VrefRange= 0, VrefLevel = 22
1263 11:07:54.119745 TX Bit0 (977~1000) 24 988, Bit8 (965~986) 22 975,
1264 11:07:54.123094 TX Bit1 (977~999) 23 988, Bit9 (967~989) 23 978,
1265 11:07:54.129571 TX Bit2 (977~1000) 24 988, Bit10 (971~993) 23 982,
1266 11:07:54.133013 TX Bit3 (971~993) 23 982, Bit11 (966~987) 22 976,
1267 11:07:54.136156 TX Bit4 (976~999) 24 987, Bit12 (968~990) 23 979,
1268 11:07:54.142704 TX Bit5 (974~996) 23 985, Bit13 (967~990) 24 978,
1269 11:07:54.146218 TX Bit6 (975~998) 24 986, Bit14 (967~990) 24 978,
1270 11:07:54.149483 TX Bit7 (976~999) 24 987, Bit15 (970~992) 23 981,
1271 11:07:54.149564
1272 11:07:54.152888 Write Rank0 MR14 =0x18
1273 11:07:54.162686
1274 11:07:54.166122 CH=0, VrefRange= 0, VrefLevel = 24
1275 11:07:54.169192 TX Bit0 (977~1000) 24 988, Bit8 (965~986) 22 975,
1276 11:07:54.172636 TX Bit1 (976~999) 24 987, Bit9 (967~990) 24 978,
1277 11:07:54.179235 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1278 11:07:54.182474 TX Bit3 (971~994) 24 982, Bit11 (966~988) 23 977,
1279 11:07:54.185948 TX Bit4 (976~999) 24 987, Bit12 (968~990) 23 979,
1280 11:07:54.192410 TX Bit5 (974~997) 24 985, Bit13 (967~990) 24 978,
1281 11:07:54.195894 TX Bit6 (975~997) 23 986, Bit14 (967~991) 25 979,
1282 11:07:54.199274 TX Bit7 (977~999) 23 988, Bit15 (970~992) 23 981,
1283 11:07:54.199349
1284 11:07:54.202447 Write Rank0 MR14 =0x1a
1285 11:07:54.212103
1286 11:07:54.215441 CH=0, VrefRange= 0, VrefLevel = 26
1287 11:07:54.218564 TX Bit0 (977~1000) 24 988, Bit8 (964~987) 24 975,
1288 11:07:54.222209 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
1289 11:07:54.228976 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1290 11:07:54.232248 TX Bit3 (971~994) 24 982, Bit11 (965~989) 25 977,
1291 11:07:54.235715 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1292 11:07:54.242644 TX Bit5 (973~997) 25 985, Bit13 (967~990) 24 978,
1293 11:07:54.245793 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1294 11:07:54.249040 TX Bit7 (977~999) 23 988, Bit15 (969~993) 25 981,
1295 11:07:54.249124
1296 11:07:54.252096 Write Rank0 MR14 =0x1c
1297 11:07:54.262057
1298 11:07:54.262139 CH=0, VrefRange= 0, VrefLevel = 28
1299 11:07:54.268865 TX Bit0 (977~1001) 25 989, Bit8 (964~987) 24 975,
1300 11:07:54.272282 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
1301 11:07:54.278924 TX Bit2 (977~1001) 25 989, Bit10 (970~993) 24 981,
1302 11:07:54.282303 TX Bit3 (970~994) 25 982, Bit11 (965~989) 25 977,
1303 11:07:54.285520 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1304 11:07:54.292318 TX Bit5 (974~997) 24 985, Bit13 (967~990) 24 978,
1305 11:07:54.295618 TX Bit6 (974~999) 26 986, Bit14 (967~991) 25 979,
1306 11:07:54.299220 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1307 11:07:54.302381
1308 11:07:54.302463 Write Rank0 MR14 =0x1e
1309 11:07:54.312221
1310 11:07:54.315368 CH=0, VrefRange= 0, VrefLevel = 30
1311 11:07:54.318920 TX Bit0 (977~1001) 25 989, Bit8 (964~987) 24 975,
1312 11:07:54.322434 TX Bit1 (977~1000) 24 988, Bit9 (967~990) 24 978,
1313 11:07:54.328905 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1314 11:07:54.332082 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1315 11:07:54.335827 TX Bit4 (976~1000) 25 988, Bit12 (967~991) 25 979,
1316 11:07:54.342065 TX Bit5 (974~997) 24 985, Bit13 (966~990) 25 978,
1317 11:07:54.345720 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1318 11:07:54.352116 TX Bit7 (976~1000) 25 988, Bit15 (968~993) 26 980,
1319 11:07:54.352267
1320 11:07:54.352375 Write Rank0 MR14 =0x20
1321 11:07:54.362169
1322 11:07:54.365779 CH=0, VrefRange= 0, VrefLevel = 32
1323 11:07:54.368884 TX Bit0 (977~1001) 25 989, Bit8 (964~987) 24 975,
1324 11:07:54.372003 TX Bit1 (977~1000) 24 988, Bit9 (967~990) 24 978,
1325 11:07:54.378836 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1326 11:07:54.382400 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1327 11:07:54.385995 TX Bit4 (976~1000) 25 988, Bit12 (967~991) 25 979,
1328 11:07:54.392639 TX Bit5 (974~997) 24 985, Bit13 (966~990) 25 978,
1329 11:07:54.396003 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1330 11:07:54.399150 TX Bit7 (976~1000) 25 988, Bit15 (968~993) 26 980,
1331 11:07:54.402339
1332 11:07:54.402421 Write Rank0 MR14 =0x22
1333 11:07:54.412147
1334 11:07:54.412229 CH=0, VrefRange= 0, VrefLevel = 34
1335 11:07:54.419066 TX Bit0 (977~1001) 25 989, Bit8 (964~987) 24 975,
1336 11:07:54.422638 TX Bit1 (977~1000) 24 988, Bit9 (967~990) 24 978,
1337 11:07:54.429168 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1338 11:07:54.432190 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1339 11:07:54.435401 TX Bit4 (976~1000) 25 988, Bit12 (967~991) 25 979,
1340 11:07:54.442234 TX Bit5 (974~997) 24 985, Bit13 (966~990) 25 978,
1341 11:07:54.445585 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1342 11:07:54.452208 TX Bit7 (976~1000) 25 988, Bit15 (968~993) 26 980,
1343 11:07:54.452293
1344 11:07:54.452358 Write Rank0 MR14 =0x24
1345 11:07:54.462373
1346 11:07:54.466039 CH=0, VrefRange= 0, VrefLevel = 36
1347 11:07:54.469061 TX Bit0 (977~1001) 25 989, Bit8 (964~987) 24 975,
1348 11:07:54.472322 TX Bit1 (977~1000) 24 988, Bit9 (967~990) 24 978,
1349 11:07:54.478974 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1350 11:07:54.482161 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1351 11:07:54.485514 TX Bit4 (976~1000) 25 988, Bit12 (967~991) 25 979,
1352 11:07:54.492174 TX Bit5 (974~997) 24 985, Bit13 (966~990) 25 978,
1353 11:07:54.495440 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1354 11:07:54.502262 TX Bit7 (976~1000) 25 988, Bit15 (968~993) 26 980,
1355 11:07:54.502347
1356 11:07:54.502412
1357 11:07:54.505508 TX Vref found, early break! 372< 378
1358 11:07:54.509222 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1359 11:07:54.512505 u1DelayCellOfst[0]=9 cells (7 PI)
1360 11:07:54.515756 u1DelayCellOfst[1]=7 cells (6 PI)
1361 11:07:54.518926 u1DelayCellOfst[2]=9 cells (7 PI)
1362 11:07:54.522439 u1DelayCellOfst[3]=0 cells (0 PI)
1363 11:07:54.525919 u1DelayCellOfst[4]=7 cells (6 PI)
1364 11:07:54.526004 u1DelayCellOfst[5]=3 cells (3 PI)
1365 11:07:54.528931 u1DelayCellOfst[6]=6 cells (5 PI)
1366 11:07:54.532594 u1DelayCellOfst[7]=7 cells (6 PI)
1367 11:07:54.535807 Byte0, DQ PI dly=982, DQM PI dly= 985
1368 11:07:54.542764 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1369 11:07:54.542848
1370 11:07:54.545669 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1371 11:07:54.545753
1372 11:07:54.549222 u1DelayCellOfst[8]=0 cells (0 PI)
1373 11:07:54.552764 u1DelayCellOfst[9]=3 cells (3 PI)
1374 11:07:54.555781 u1DelayCellOfst[10]=9 cells (7 PI)
1375 11:07:54.559049 u1DelayCellOfst[11]=2 cells (2 PI)
1376 11:07:54.559161 u1DelayCellOfst[12]=5 cells (4 PI)
1377 11:07:54.562480 u1DelayCellOfst[13]=3 cells (3 PI)
1378 11:07:54.565829 u1DelayCellOfst[14]=5 cells (4 PI)
1379 11:07:54.569157 u1DelayCellOfst[15]=6 cells (5 PI)
1380 11:07:54.572771 Byte1, DQ PI dly=975, DQM PI dly= 978
1381 11:07:54.579242 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1382 11:07:54.579353
1383 11:07:54.582651 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1384 11:07:54.582739
1385 11:07:54.586181 Write Rank0 MR14 =0x1e
1386 11:07:54.586264
1387 11:07:54.586330 Final TX Range 0 Vref 30
1388 11:07:54.586391
1389 11:07:54.592591 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1390 11:07:54.592677
1391 11:07:54.599758 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1392 11:07:54.605911 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1393 11:07:54.612687 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1394 11:07:54.616302 Write Rank0 MR3 =0xb0
1395 11:07:54.619478 DramC Write-DBI on
1396 11:07:54.619563 ==
1397 11:07:54.623196 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1398 11:07:54.626245 fsp= 1, odt_onoff= 1, Byte mode= 0
1399 11:07:54.626330 ==
1400 11:07:54.629198 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1401 11:07:54.629282
1402 11:07:54.632641 Begin, DQ Scan Range 698~762
1403 11:07:54.632725
1404 11:07:54.632790
1405 11:07:54.636441 TX Vref Scan disable
1406 11:07:54.639731 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1407 11:07:54.643227 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1408 11:07:54.646166 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1409 11:07:54.649550 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1410 11:07:54.653185 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1411 11:07:54.656086 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1412 11:07:54.659501 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1413 11:07:54.663111 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1414 11:07:54.666489 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1415 11:07:54.669834 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1416 11:07:54.673160 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1417 11:07:54.676287 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1418 11:07:54.683010 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1419 11:07:54.686097 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1420 11:07:54.689271 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1421 11:07:54.692737 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1422 11:07:54.696079 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1423 11:07:54.699431 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1424 11:07:54.702749 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1425 11:07:54.705993 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1426 11:07:54.709333 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1427 11:07:54.712290 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1428 11:07:54.720325 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1429 11:07:54.723300 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1430 11:07:54.726734 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1431 11:07:54.730112 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1432 11:07:54.733317 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1433 11:07:54.737164 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1434 11:07:54.740267 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1435 11:07:54.743786 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1436 11:07:54.747220 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1437 11:07:54.750206 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1438 11:07:54.753503 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1439 11:07:54.756910 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1440 11:07:54.760744 Byte0, DQ PI dly=732, DQM PI dly= 732
1441 11:07:54.763735 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1442 11:07:54.767176
1443 11:07:54.770517 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1444 11:07:54.770620
1445 11:07:54.773592 Byte1, DQ PI dly=721, DQM PI dly= 721
1446 11:07:54.777007 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
1447 11:07:54.777110
1448 11:07:54.780281 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
1449 11:07:54.783732
1450 11:07:54.787482 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1451 11:07:54.797404 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1452 11:07:54.804058 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1453 11:07:54.807381 wait MRW command Rank0 MR3 =0x30 fired (1)
1454 11:07:54.807466 Write Rank0 MR3 =0x30
1455 11:07:54.810702 DramC Write-DBI off
1456 11:07:54.810786
1457 11:07:54.810852 [DATLAT]
1458 11:07:54.813995 Freq=1600, CH0 RK0, use_rxtx_scan=0
1459 11:07:54.814080
1460 11:07:54.817325 DATLAT Default: 0xf
1461 11:07:54.817409 7, 0xFFFF, sum=0
1462 11:07:54.820780 8, 0xFFFF, sum=0
1463 11:07:54.820867 9, 0xFFFF, sum=0
1464 11:07:54.823888 10, 0xFFFF, sum=0
1465 11:07:54.823974 11, 0xFFFF, sum=0
1466 11:07:54.827683 12, 0xFFFF, sum=0
1467 11:07:54.827768 13, 0xFFFF, sum=0
1468 11:07:54.830538 14, 0x0, sum=1
1469 11:07:54.830622 15, 0x0, sum=2
1470 11:07:54.830689 16, 0x0, sum=3
1471 11:07:54.833875 17, 0x0, sum=4
1472 11:07:54.837300 pattern=2 first_step=14 total pass=5 best_step=16
1473 11:07:54.837385 ==
1474 11:07:54.843847 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1475 11:07:54.847269 fsp= 1, odt_onoff= 1, Byte mode= 0
1476 11:07:54.847354 ==
1477 11:07:54.850610 Start DQ dly to find pass range UseTestEngine =1
1478 11:07:54.853931 x-axis: bit #, y-axis: DQ dly (-127~63)
1479 11:07:54.854016 RX Vref Scan = 1
1480 11:07:54.970535
1481 11:07:54.970650 RX Vref found, early break!
1482 11:07:54.970718
1483 11:07:54.977254 Final RX Vref 12, apply to both rank0 and 1
1484 11:07:54.977340 ==
1485 11:07:54.980595 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1486 11:07:54.983670 fsp= 1, odt_onoff= 1, Byte mode= 0
1487 11:07:54.983754 ==
1488 11:07:54.983819 DQS Delay:
1489 11:07:54.987143 DQS0 = 0, DQS1 = 0
1490 11:07:54.987227 DQM Delay:
1491 11:07:54.990512 DQM0 = 19, DQM1 = 18
1492 11:07:54.990595 DQ Delay:
1493 11:07:54.993680 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15
1494 11:07:54.997291 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
1495 11:07:55.000744 DQ8 =14, DQ9 =16, DQ10 =25, DQ11 =16
1496 11:07:55.003666 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1497 11:07:55.003749
1498 11:07:55.003814
1499 11:07:55.003874
1500 11:07:55.007513 [DramC_TX_OE_Calibration] TA2
1501 11:07:55.010477 Original DQ_B0 (3 6) =30, OEN = 27
1502 11:07:55.013800 Original DQ_B1 (3 6) =30, OEN = 27
1503 11:07:55.017077 23, 0x0, End_B0=23 End_B1=23
1504 11:07:55.017163 24, 0x0, End_B0=24 End_B1=24
1505 11:07:55.021094 25, 0x0, End_B0=25 End_B1=25
1506 11:07:55.024241 26, 0x0, End_B0=26 End_B1=26
1507 11:07:55.027660 27, 0x0, End_B0=27 End_B1=27
1508 11:07:55.027745 28, 0x0, End_B0=28 End_B1=28
1509 11:07:55.030357 29, 0x0, End_B0=29 End_B1=29
1510 11:07:55.034221 30, 0x0, End_B0=30 End_B1=30
1511 11:07:55.037379 31, 0xFFFF, End_B0=30 End_B1=30
1512 11:07:55.040740 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1513 11:07:55.047598 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1514 11:07:55.047683
1515 11:07:55.047748
1516 11:07:55.050840 Write Rank0 MR23 =0x3f
1517 11:07:55.050923 [DQSOSC]
1518 11:07:55.061020 [DQSOSCAuto] RK0, (LSB)MR18= 0x1515, (MSB)MR19= 0x303, tDQSOscB0 = 399 ps tDQSOscB1 = 399 ps
1519 11:07:55.063881 CH0_RK0: MR19=0x303, MR18=0x1515, DQSOSC=399, MR23=63, INC=15, DEC=23
1520 11:07:55.067336 Write Rank0 MR23 =0x3f
1521 11:07:55.067420 [DQSOSC]
1522 11:07:55.077237 [DQSOSCAuto] RK0, (LSB)MR18= 0x1515, (MSB)MR19= 0x303, tDQSOscB0 = 399 ps tDQSOscB1 = 399 ps
1523 11:07:55.077326 CH0 RK0: MR19=303, MR18=1515
1524 11:07:55.084273 [RankSwap] Rank num 2, (Multi 1), Rank 1
1525 11:07:55.084358 Write Rank0 MR2 =0xad
1526 11:07:55.087488 [Write Leveling]
1527 11:07:55.087573 delay byte0 byte1 byte2 byte3
1528 11:07:55.090872
1529 11:07:55.090956 10 0 0
1530 11:07:55.091024 11 0 0
1531 11:07:55.094122 12 0 0
1532 11:07:55.094208 13 0 0
1533 11:07:55.097409 14 0 0
1534 11:07:55.097495 15 0 0
1535 11:07:55.097563 16 0 0
1536 11:07:55.100916 17 0 0
1537 11:07:55.101003 18 0 0
1538 11:07:55.104977 19 0 0
1539 11:07:55.105063 20 0 0
1540 11:07:55.105131 21 0 0
1541 11:07:55.107491 22 0 0
1542 11:07:55.107575 23 0 0
1543 11:07:55.111200 24 0 ff
1544 11:07:55.111287 25 ff ff
1545 11:07:55.114175 26 ff ff
1546 11:07:55.114261 27 ff ff
1547 11:07:55.117637 28 ff ff
1548 11:07:55.117722 29 ff ff
1549 11:07:55.120953 30 ff ff
1550 11:07:55.121038 31 ff ff
1551 11:07:55.124171 pass bytecount = 0xff (0xff: all bytes pass)
1552 11:07:55.124256
1553 11:07:55.127525 DQS0 dly: 25
1554 11:07:55.127610 DQS1 dly: 24
1555 11:07:55.131203 Write Rank0 MR2 =0x2d
1556 11:07:55.134759 [RankSwap] Rank num 2, (Multi 1), Rank 0
1557 11:07:55.134844 Write Rank1 MR1 =0xd6
1558 11:07:55.134911 [Gating]
1559 11:07:55.138151 ==
1560 11:07:55.141181 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1561 11:07:55.144325 fsp= 1, odt_onoff= 1, Byte mode= 0
1562 11:07:55.144410 ==
1563 11:07:55.147779 3 1 0 |2c2c 3534 |(0 0)(11 11) |(0 0)(0 0)| 0
1564 11:07:55.154357 3 1 4 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1565 11:07:55.157752 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1566 11:07:55.161030 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1567 11:07:55.167639 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1568 11:07:55.170940 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1569 11:07:55.174601 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1570 11:07:55.177960 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1571 11:07:55.184557 3 2 0 |2c2c 3534 |(0 0)(11 11) |(1 0)(0 1)| 0
1572 11:07:55.187884 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1573 11:07:55.191023 3 2 8 |2525 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1574 11:07:55.198145 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1575 11:07:55.201679 3 2 16 |3534 403 |(11 11)(11 11) |(0 0)(1 1)| 0
1576 11:07:55.204704 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1577 11:07:55.208338 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1578 11:07:55.214735 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1579 11:07:55.218222 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1580 11:07:55.221695 3 3 4 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1581 11:07:55.228316 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1582 11:07:55.231203 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1583 11:07:55.234978 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1584 11:07:55.241826 3 3 20 |3534 4645 |(11 11)(11 11) |(0 0)(1 1)| 0
1585 11:07:55.244661 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1586 11:07:55.248297 [Byte 1] Lead/lag falling Transition (3, 3, 24)
1587 11:07:55.251306 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1588 11:07:55.258138 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1589 11:07:55.261384 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1590 11:07:55.264541 3 4 8 |1716 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1591 11:07:55.271241 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1592 11:07:55.274487 3 4 16 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
1593 11:07:55.278192 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1594 11:07:55.284859 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1595 11:07:55.288155 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1596 11:07:55.291421 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1597 11:07:55.295126 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1598 11:07:55.301328 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1599 11:07:55.305256 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1600 11:07:55.308431 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1601 11:07:55.314672 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1602 11:07:55.318533 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1603 11:07:55.321718 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1604 11:07:55.328339 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1605 11:07:55.331719 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1606 11:07:55.334934 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1607 11:07:55.338267 [Byte 0] Lead/lag Transition tap number (2)
1608 11:07:55.345034 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1609 11:07:55.348216 3 6 8 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1610 11:07:55.351615 [Byte 1] Lead/lag Transition tap number (2)
1611 11:07:55.354621 3 6 12 |1c1c 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1612 11:07:55.361659 3 6 16 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
1613 11:07:55.361745 [Byte 0]First pass (3, 6, 16)
1614 11:07:55.368538 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1615 11:07:55.368640 [Byte 1]First pass (3, 6, 20)
1616 11:07:55.375111 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1617 11:07:55.378161 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1618 11:07:55.381636 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1619 11:07:55.384904 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1620 11:07:55.388096 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1621 11:07:55.395274 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1622 11:07:55.398272 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1623 11:07:55.401840 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1624 11:07:55.404849 All bytes gating window > 1UI, Early break!
1625 11:07:55.404934
1626 11:07:55.408152 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1627 11:07:55.408262
1628 11:07:55.411464 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1629 11:07:55.411561
1630 11:07:55.414876
1631 11:07:55.414960
1632 11:07:55.418528 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1633 11:07:55.418612
1634 11:07:55.421493 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1635 11:07:55.421577
1636 11:07:55.421649
1637 11:07:55.424925 Write Rank1 MR1 =0x56
1638 11:07:55.425009
1639 11:07:55.425075 best RODT dly(2T, 0.5T) = (2, 3)
1640 11:07:55.428700
1641 11:07:55.428783 best RODT dly(2T, 0.5T) = (2, 3)
1642 11:07:55.431672 ==
1643 11:07:55.434853 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1644 11:07:55.438837 fsp= 1, odt_onoff= 1, Byte mode= 0
1645 11:07:55.438922 ==
1646 11:07:55.442177 Start DQ dly to find pass range UseTestEngine =0
1647 11:07:55.445445 x-axis: bit #, y-axis: DQ dly (-127~63)
1648 11:07:55.448580 RX Vref Scan = 0
1649 11:07:55.451632 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1650 11:07:55.455297 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1651 11:07:55.455382 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1652 11:07:55.458378 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1653 11:07:55.461784 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1654 11:07:55.465155 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1655 11:07:55.468872 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1656 11:07:55.471834 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1657 11:07:55.475597 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1658 11:07:55.478673 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1659 11:07:55.478758 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1660 11:07:55.482065 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1661 11:07:55.485120 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1662 11:07:55.488353 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1663 11:07:55.492305 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1664 11:07:55.495328 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1665 11:07:55.498869 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1666 11:07:55.502311 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1667 11:07:55.502393 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1668 11:07:55.505443 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1669 11:07:55.508759 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1670 11:07:55.511862 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1671 11:07:55.515492 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1672 11:07:55.519215 -3, [0] xxxxxxxx oxxxxxxx [MSB]
1673 11:07:55.519326 -2, [0] xxxxxxxx oxxoxxxx [MSB]
1674 11:07:55.522122 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1675 11:07:55.525869 0, [0] xxxoxoxx ooxooxxx [MSB]
1676 11:07:55.528883 1, [0] xxxoxoxo ooxoooxx [MSB]
1677 11:07:55.532108 2, [0] xxxoxooo ooxoooox [MSB]
1678 11:07:55.535438 3, [0] xxxooooo ooxoooox [MSB]
1679 11:07:55.535524 4, [0] xooooooo ooxoooox [MSB]
1680 11:07:55.538987 5, [0] oooooooo ooxoooox [MSB]
1681 11:07:55.542260 6, [0] oooooooo ooxooooo [MSB]
1682 11:07:55.545638 34, [0] oooooooo xooooooo [MSB]
1683 11:07:55.548911 35, [0] oooxoooo xooooooo [MSB]
1684 11:07:55.552279 36, [0] oooxoooo xooxoooo [MSB]
1685 11:07:55.555904 37, [0] oooxoxoo xxoxoxoo [MSB]
1686 11:07:55.555989 38, [0] oooxoxoo xxoxoxxo [MSB]
1687 11:07:55.558895 39, [0] oooxoxxx xxoxxxxo [MSB]
1688 11:07:55.562142 40, [0] oooxoxxx xxoxxxxo [MSB]
1689 11:07:55.565377 41, [0] oxxxxxxx xxoxxxxx [MSB]
1690 11:07:55.568935 42, [0] oxxxxxxx xxoxxxxx [MSB]
1691 11:07:55.571932 43, [0] xxxxxxxx xxoxxxxx [MSB]
1692 11:07:55.575808 44, [0] xxxxxxxx xxoxxxxx [MSB]
1693 11:07:55.575887 45, [0] xxxxxxxx xxxxxxxx [MSB]
1694 11:07:55.578888 iDelay=45, Bit 0, Center 23 (5 ~ 42) 38
1695 11:07:55.585144 iDelay=45, Bit 1, Center 22 (4 ~ 40) 37
1696 11:07:55.588758 iDelay=45, Bit 2, Center 22 (4 ~ 40) 37
1697 11:07:55.592096 iDelay=45, Bit 3, Center 16 (-1 ~ 34) 36
1698 11:07:55.595367 iDelay=45, Bit 4, Center 21 (3 ~ 40) 38
1699 11:07:55.598653 iDelay=45, Bit 5, Center 18 (0 ~ 36) 37
1700 11:07:55.602521 iDelay=45, Bit 6, Center 20 (2 ~ 38) 37
1701 11:07:55.605741 iDelay=45, Bit 7, Center 19 (1 ~ 38) 38
1702 11:07:55.609179 iDelay=45, Bit 8, Center 15 (-3 ~ 33) 37
1703 11:07:55.612271 iDelay=45, Bit 9, Center 18 (0 ~ 36) 37
1704 11:07:55.615767 iDelay=45, Bit 10, Center 25 (7 ~ 44) 38
1705 11:07:55.619141 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1706 11:07:55.622712 iDelay=45, Bit 12, Center 19 (0 ~ 38) 39
1707 11:07:55.625654 iDelay=45, Bit 13, Center 18 (1 ~ 36) 36
1708 11:07:55.629044 iDelay=45, Bit 14, Center 19 (2 ~ 37) 36
1709 11:07:55.635772 iDelay=45, Bit 15, Center 23 (6 ~ 40) 35
1710 11:07:55.635854 ==
1711 11:07:55.639013 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1712 11:07:55.642342 fsp= 1, odt_onoff= 1, Byte mode= 0
1713 11:07:55.642419 ==
1714 11:07:55.642486 DQS Delay:
1715 11:07:55.645758 DQS0 = 0, DQS1 = 0
1716 11:07:55.645861 DQM Delay:
1717 11:07:55.649061 DQM0 = 20, DQM1 = 19
1718 11:07:55.649142 DQ Delay:
1719 11:07:55.652323 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =16
1720 11:07:55.655792 DQ4 =21, DQ5 =18, DQ6 =20, DQ7 =19
1721 11:07:55.658975 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
1722 11:07:55.662569 DQ12 =19, DQ13 =18, DQ14 =19, DQ15 =23
1723 11:07:55.662669
1724 11:07:55.662759
1725 11:07:55.665541 DramC Write-DBI off
1726 11:07:55.665616 ==
1727 11:07:55.669347 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1728 11:07:55.672591 fsp= 1, odt_onoff= 1, Byte mode= 0
1729 11:07:55.672666 ==
1730 11:07:55.679309 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1731 11:07:55.679387
1732 11:07:55.679449 Begin, DQ Scan Range 920~1176
1733 11:07:55.679516
1734 11:07:55.679575
1735 11:07:55.682687 TX Vref Scan disable
1736 11:07:55.685779 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1737 11:07:55.689393 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1738 11:07:55.692516 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1739 11:07:55.695851 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1740 11:07:55.698928 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1741 11:07:55.702868 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1742 11:07:55.706075 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1743 11:07:55.712852 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1744 11:07:55.716238 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1745 11:07:55.719357 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1746 11:07:55.722841 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1747 11:07:55.726037 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1748 11:07:55.729330 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1749 11:07:55.732926 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1750 11:07:55.736100 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1751 11:07:55.739164 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1752 11:07:55.742804 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1753 11:07:55.746057 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1754 11:07:55.749168 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1755 11:07:55.752896 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1756 11:07:55.756007 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1757 11:07:55.759330 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1758 11:07:55.762421 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1759 11:07:55.766146 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1760 11:07:55.769269 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1761 11:07:55.775911 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1762 11:07:55.779265 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1763 11:07:55.783262 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1764 11:07:55.786176 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1765 11:07:55.789891 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1766 11:07:55.793068 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1767 11:07:55.796219 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1768 11:07:55.799814 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1769 11:07:55.802858 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1770 11:07:55.806701 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1771 11:07:55.810086 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1772 11:07:55.812870 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1773 11:07:55.816189 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1774 11:07:55.819997 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1775 11:07:55.823407 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1776 11:07:55.826374 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1777 11:07:55.829619 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1778 11:07:55.833120 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1779 11:07:55.836600 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1780 11:07:55.839883 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1781 11:07:55.843699 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1782 11:07:55.846932 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1783 11:07:55.850087 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1784 11:07:55.853621 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1785 11:07:55.856822 969 |3 6 9|[0] xxxxxxxx ooxoxxxx [MSB]
1786 11:07:55.863396 970 |3 6 10|[0] xxxxxxxx ooxooxox [MSB]
1787 11:07:55.866651 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1788 11:07:55.870086 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1789 11:07:55.873656 973 |3 6 13|[0] xoxooooo ooxoooox [MSB]
1790 11:07:55.876555 974 |3 6 14|[0] ooxooooo ooxooooo [MSB]
1791 11:07:55.879952 987 |3 6 27|[0] oooxoooo xooooooo [MSB]
1792 11:07:55.883349 988 |3 6 28|[0] oooxoooo xxxxxxxx [MSB]
1793 11:07:55.889823 989 |3 6 29|[0] oooxoooo xxxxxxxx [MSB]
1794 11:07:55.893284 990 |3 6 30|[0] oooxoxoo xxxxxxxx [MSB]
1795 11:07:55.896596 991 |3 6 31|[0] oooxoxoo xxxxxxxx [MSB]
1796 11:07:55.900458 992 |3 6 32|[0] xxxxxxxx xxxxxxxx [MSB]
1797 11:07:55.903331 Byte0, DQ PI dly=981, DQM PI dly= 981
1798 11:07:55.906953 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1799 11:07:55.907063
1800 11:07:55.910186 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1801 11:07:55.910263
1802 11:07:55.913740 Byte1, DQ PI dly=979, DQM PI dly= 979
1803 11:07:55.920498 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1804 11:07:55.920578
1805 11:07:55.923932 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1806 11:07:55.924008
1807 11:07:55.924070 ==
1808 11:07:55.930295 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1809 11:07:55.933458 fsp= 1, odt_onoff= 1, Byte mode= 0
1810 11:07:55.933560 ==
1811 11:07:55.936895 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1812 11:07:55.936971
1813 11:07:55.940150 Begin, DQ Scan Range 955~1019
1814 11:07:55.940231 Write Rank1 MR14 =0x0
1815 11:07:55.949338
1816 11:07:55.949416 CH=0, VrefRange= 0, VrefLevel = 0
1817 11:07:55.955436 TX Bit0 (976~990) 15 983, Bit8 (969~982) 14 975,
1818 11:07:55.958863 TX Bit1 (976~986) 11 981, Bit9 (972~985) 14 978,
1819 11:07:55.965420 TX Bit2 (977~987) 11 982, Bit10 (977~985) 9 981,
1820 11:07:55.969185 TX Bit3 (969~981) 13 975, Bit11 (970~983) 14 976,
1821 11:07:55.972434 TX Bit4 (975~986) 12 980, Bit12 (973~985) 13 979,
1822 11:07:55.979131 TX Bit5 (972~984) 13 978, Bit13 (974~983) 10 978,
1823 11:07:55.982444 TX Bit6 (973~985) 13 979, Bit14 (974~985) 12 979,
1824 11:07:55.985647 TX Bit7 (975~987) 13 981, Bit15 (976~986) 11 981,
1825 11:07:55.985747
1826 11:07:55.988856 Write Rank1 MR14 =0x2
1827 11:07:55.996550
1828 11:07:55.996631 CH=0, VrefRange= 0, VrefLevel = 2
1829 11:07:56.003282 TX Bit0 (976~991) 16 983, Bit8 (969~983) 15 976,
1830 11:07:56.006345 TX Bit1 (975~987) 13 981, Bit9 (971~985) 15 978,
1831 11:07:56.013371 TX Bit2 (976~988) 13 982, Bit10 (977~990) 14 983,
1832 11:07:56.017140 TX Bit3 (969~982) 14 975, Bit11 (970~983) 14 976,
1833 11:07:56.020283 TX Bit4 (975~987) 13 981, Bit12 (972~985) 14 978,
1834 11:07:56.026489 TX Bit5 (972~985) 14 978, Bit13 (974~983) 10 978,
1835 11:07:56.029980 TX Bit6 (973~986) 14 979, Bit14 (974~985) 12 979,
1836 11:07:56.033147 TX Bit7 (974~988) 15 981, Bit15 (975~990) 16 982,
1837 11:07:56.033249
1838 11:07:56.036428 Write Rank1 MR14 =0x4
1839 11:07:56.044353
1840 11:07:56.044463 CH=0, VrefRange= 0, VrefLevel = 4
1841 11:07:56.050782 TX Bit0 (976~991) 16 983, Bit8 (969~983) 15 976,
1842 11:07:56.054432 TX Bit1 (975~988) 14 981, Bit9 (970~986) 17 978,
1843 11:07:56.061166 TX Bit2 (976~989) 14 982, Bit10 (976~990) 15 983,
1844 11:07:56.064570 TX Bit3 (969~983) 15 976, Bit11 (969~984) 16 976,
1845 11:07:56.067855 TX Bit4 (974~989) 16 981, Bit12 (972~986) 15 979,
1846 11:07:56.074324 TX Bit5 (971~985) 15 978, Bit13 (974~983) 10 978,
1847 11:07:56.077776 TX Bit6 (972~987) 16 979, Bit14 (973~988) 16 980,
1848 11:07:56.081110 TX Bit7 (974~989) 16 981, Bit15 (975~990) 16 982,
1849 11:07:56.081196
1850 11:07:56.084518 Write Rank1 MR14 =0x6
1851 11:07:56.091741
1852 11:07:56.091825 CH=0, VrefRange= 0, VrefLevel = 6
1853 11:07:56.099076 TX Bit0 (976~991) 16 983, Bit8 (968~984) 17 976,
1854 11:07:56.102513 TX Bit1 (975~988) 14 981, Bit9 (970~987) 18 978,
1855 11:07:56.108888 TX Bit2 (976~990) 15 983, Bit10 (976~991) 16 983,
1856 11:07:56.111794 TX Bit3 (969~984) 16 976, Bit11 (969~984) 16 976,
1857 11:07:56.115387 TX Bit4 (974~989) 16 981, Bit12 (972~987) 16 979,
1858 11:07:56.121891 TX Bit5 (970~986) 17 978, Bit13 (973~984) 12 978,
1859 11:07:56.125368 TX Bit6 (971~987) 17 979, Bit14 (973~988) 16 980,
1860 11:07:56.128534 TX Bit7 (973~989) 17 981, Bit15 (975~991) 17 983,
1861 11:07:56.128619
1862 11:07:56.132231 Write Rank1 MR14 =0x8
1863 11:07:56.139503
1864 11:07:56.139588 CH=0, VrefRange= 0, VrefLevel = 8
1865 11:07:56.146297 TX Bit0 (976~991) 16 983, Bit8 (968~984) 17 976,
1866 11:07:56.149651 TX Bit1 (974~990) 17 982, Bit9 (970~987) 18 978,
1867 11:07:56.156592 TX Bit2 (975~990) 16 982, Bit10 (976~991) 16 983,
1868 11:07:56.159507 TX Bit3 (968~984) 17 976, Bit11 (969~984) 16 976,
1869 11:07:56.163301 TX Bit4 (974~990) 17 982, Bit12 (971~988) 18 979,
1870 11:07:56.169986 TX Bit5 (970~986) 17 978, Bit13 (973~986) 14 979,
1871 11:07:56.172911 TX Bit6 (971~988) 18 979, Bit14 (972~989) 18 980,
1872 11:07:56.176680 TX Bit7 (973~990) 18 981, Bit15 (975~991) 17 983,
1873 11:07:56.176763
1874 11:07:56.180027 Write Rank1 MR14 =0xa
1875 11:07:56.187763
1876 11:07:56.190513 CH=0, VrefRange= 0, VrefLevel = 10
1877 11:07:56.194284 TX Bit0 (975~992) 18 983, Bit8 (968~984) 17 976,
1878 11:07:56.197227 TX Bit1 (974~990) 17 982, Bit9 (970~988) 19 979,
1879 11:07:56.204053 TX Bit2 (976~991) 16 983, Bit10 (976~992) 17 984,
1880 11:07:56.207491 TX Bit3 (968~984) 17 976, Bit11 (969~985) 17 977,
1881 11:07:56.210845 TX Bit4 (973~991) 19 982, Bit12 (971~988) 18 979,
1882 11:07:56.217383 TX Bit5 (970~987) 18 978, Bit13 (972~986) 15 979,
1883 11:07:56.220824 TX Bit6 (971~988) 18 979, Bit14 (972~989) 18 980,
1884 11:07:56.224057 TX Bit7 (972~990) 19 981, Bit15 (974~992) 19 983,
1885 11:07:56.224142
1886 11:07:56.227514 Write Rank1 MR14 =0xc
1887 11:07:56.235187
1888 11:07:56.238499 CH=0, VrefRange= 0, VrefLevel = 12
1889 11:07:56.241754 TX Bit0 (975~992) 18 983, Bit8 (968~985) 18 976,
1890 11:07:56.245146 TX Bit1 (974~991) 18 982, Bit9 (969~989) 21 979,
1891 11:07:56.252030 TX Bit2 (975~991) 17 983, Bit10 (975~991) 17 983,
1892 11:07:56.255217 TX Bit3 (968~985) 18 976, Bit11 (968~986) 19 977,
1893 11:07:56.258556 TX Bit4 (973~991) 19 982, Bit12 (970~989) 20 979,
1894 11:07:56.265015 TX Bit5 (970~988) 19 979, Bit13 (972~987) 16 979,
1895 11:07:56.268514 TX Bit6 (970~990) 21 980, Bit14 (971~990) 20 980,
1896 11:07:56.272001 TX Bit7 (972~991) 20 981, Bit15 (974~992) 19 983,
1897 11:07:56.272103
1898 11:07:56.275254 Write Rank1 MR14 =0xe
1899 11:07:56.283157
1900 11:07:56.286852 CH=0, VrefRange= 0, VrefLevel = 14
1901 11:07:56.290116 TX Bit0 (975~993) 19 984, Bit8 (968~986) 19 977,
1902 11:07:56.293316 TX Bit1 (974~991) 18 982, Bit9 (969~989) 21 979,
1903 11:07:56.300423 TX Bit2 (975~992) 18 983, Bit10 (975~993) 19 984,
1904 11:07:56.303136 TX Bit3 (968~985) 18 976, Bit11 (968~987) 20 977,
1905 11:07:56.306394 TX Bit4 (972~991) 20 981, Bit12 (970~990) 21 980,
1906 11:07:56.313548 TX Bit5 (970~989) 20 979, Bit13 (971~988) 18 979,
1907 11:07:56.316862 TX Bit6 (970~990) 21 980, Bit14 (970~990) 21 980,
1908 11:07:56.320339 TX Bit7 (972~991) 20 981, Bit15 (974~992) 19 983,
1909 11:07:56.320442
1910 11:07:56.323061 Write Rank1 MR14 =0x10
1911 11:07:56.331352
1912 11:07:56.331435 CH=0, VrefRange= 0, VrefLevel = 16
1913 11:07:56.338213 TX Bit0 (974~993) 20 983, Bit8 (967~986) 20 976,
1914 11:07:56.341371 TX Bit1 (973~991) 19 982, Bit9 (969~990) 22 979,
1915 11:07:56.348164 TX Bit2 (975~992) 18 983, Bit10 (975~993) 19 984,
1916 11:07:56.351709 TX Bit3 (968~986) 19 977, Bit11 (968~987) 20 977,
1917 11:07:56.354826 TX Bit4 (971~991) 21 981, Bit12 (969~990) 22 979,
1918 11:07:56.361494 TX Bit5 (969~989) 21 979, Bit13 (971~989) 19 980,
1919 11:07:56.364720 TX Bit6 (970~991) 22 980, Bit14 (970~990) 21 980,
1920 11:07:56.368476 TX Bit7 (971~992) 22 981, Bit15 (974~993) 20 983,
1921 11:07:56.368561
1922 11:07:56.371612 Write Rank1 MR14 =0x12
1923 11:07:56.379572
1924 11:07:56.383158 CH=0, VrefRange= 0, VrefLevel = 18
1925 11:07:56.386598 TX Bit0 (974~994) 21 984, Bit8 (967~987) 21 977,
1926 11:07:56.389516 TX Bit1 (973~992) 20 982, Bit9 (969~990) 22 979,
1927 11:07:56.396278 TX Bit2 (975~993) 19 984, Bit10 (974~994) 21 984,
1928 11:07:56.399709 TX Bit3 (967~987) 21 977, Bit11 (968~988) 21 978,
1929 11:07:56.403056 TX Bit4 (971~992) 22 981, Bit12 (969~990) 22 979,
1930 11:07:56.409899 TX Bit5 (969~990) 22 979, Bit13 (970~989) 20 979,
1931 11:07:56.413114 TX Bit6 (970~991) 22 980, Bit14 (970~991) 22 980,
1932 11:07:56.416584 TX Bit7 (970~992) 23 981, Bit15 (974~993) 20 983,
1933 11:07:56.416669
1934 11:07:56.419793 Write Rank1 MR14 =0x14
1935 11:07:56.427963
1936 11:07:56.428047 CH=0, VrefRange= 0, VrefLevel = 20
1937 11:07:56.434679 TX Bit0 (974~994) 21 984, Bit8 (967~988) 22 977,
1938 11:07:56.438009 TX Bit1 (972~992) 21 982, Bit9 (969~990) 22 979,
1939 11:07:56.444701 TX Bit2 (975~993) 19 984, Bit10 (974~994) 21 984,
1940 11:07:56.447994 TX Bit3 (967~987) 21 977, Bit11 (968~989) 22 978,
1941 11:07:56.451777 TX Bit4 (971~992) 22 981, Bit12 (969~991) 23 980,
1942 11:07:56.458408 TX Bit5 (969~990) 22 979, Bit13 (970~989) 20 979,
1943 11:07:56.461597 TX Bit6 (969~991) 23 980, Bit14 (969~991) 23 980,
1944 11:07:56.464998 TX Bit7 (970~992) 23 981, Bit15 (974~994) 21 984,
1945 11:07:56.465083
1946 11:07:56.468233 Write Rank1 MR14 =0x16
1947 11:07:56.476293
1948 11:07:56.480341 CH=0, VrefRange= 0, VrefLevel = 22
1949 11:07:56.483107 TX Bit0 (973~994) 22 983, Bit8 (967~989) 23 978,
1950 11:07:56.486791 TX Bit1 (971~993) 23 982, Bit9 (968~991) 24 979,
1951 11:07:56.492954 TX Bit2 (974~993) 20 983, Bit10 (974~995) 22 984,
1952 11:07:56.496692 TX Bit3 (967~987) 21 977, Bit11 (967~989) 23 978,
1953 11:07:56.500040 TX Bit4 (970~993) 24 981, Bit12 (969~991) 23 980,
1954 11:07:56.506720 TX Bit5 (969~991) 23 980, Bit13 (970~990) 21 980,
1955 11:07:56.509906 TX Bit6 (969~992) 24 980, Bit14 (969~991) 23 980,
1956 11:07:56.512953 TX Bit7 (970~993) 24 981, Bit15 (973~994) 22 983,
1957 11:07:56.513023
1958 11:07:56.516139 Write Rank1 MR14 =0x18
1959 11:07:56.524762
1960 11:07:56.528387 CH=0, VrefRange= 0, VrefLevel = 24
1961 11:07:56.531807 TX Bit0 (973~995) 23 984, Bit8 (967~990) 24 978,
1962 11:07:56.534894 TX Bit1 (971~993) 23 982, Bit9 (968~991) 24 979,
1963 11:07:56.541607 TX Bit2 (974~994) 21 984, Bit10 (973~995) 23 984,
1964 11:07:56.545237 TX Bit3 (966~988) 23 977, Bit11 (967~990) 24 978,
1965 11:07:56.548692 TX Bit4 (970~993) 24 981, Bit12 (969~991) 23 980,
1966 11:07:56.555378 TX Bit5 (968~991) 24 979, Bit13 (969~990) 22 979,
1967 11:07:56.558299 TX Bit6 (969~992) 24 980, Bit14 (969~991) 23 980,
1968 11:07:56.562164 TX Bit7 (970~993) 24 981, Bit15 (973~995) 23 984,
1969 11:07:56.562242
1970 11:07:56.565015 Write Rank1 MR14 =0x1a
1971 11:07:56.573280
1972 11:07:56.573366 CH=0, VrefRange= 0, VrefLevel = 26
1973 11:07:56.580125 TX Bit0 (972~995) 24 983, Bit8 (966~990) 25 978,
1974 11:07:56.583293 TX Bit1 (971~993) 23 982, Bit9 (968~991) 24 979,
1975 11:07:56.590290 TX Bit2 (973~994) 22 983, Bit10 (973~995) 23 984,
1976 11:07:56.593546 TX Bit3 (966~989) 24 977, Bit11 (967~990) 24 978,
1977 11:07:56.596839 TX Bit4 (970~993) 24 981, Bit12 (968~991) 24 979,
1978 11:07:56.603488 TX Bit5 (968~991) 24 979, Bit13 (969~990) 22 979,
1979 11:07:56.606917 TX Bit6 (969~992) 24 980, Bit14 (969~991) 23 980,
1980 11:07:56.610117 TX Bit7 (970~993) 24 981, Bit15 (971~995) 25 983,
1981 11:07:56.610193
1982 11:07:56.613739 Write Rank1 MR14 =0x1c
1983 11:07:56.622359
1984 11:07:56.625601 CH=0, VrefRange= 0, VrefLevel = 28
1985 11:07:56.629153 TX Bit0 (972~995) 24 983, Bit8 (966~990) 25 978,
1986 11:07:56.631992 TX Bit1 (971~994) 24 982, Bit9 (968~991) 24 979,
1987 11:07:56.639196 TX Bit2 (973~994) 22 983, Bit10 (973~997) 25 985,
1988 11:07:56.642598 TX Bit3 (966~989) 24 977, Bit11 (967~990) 24 978,
1989 11:07:56.645607 TX Bit4 (969~994) 26 981, Bit12 (968~992) 25 980,
1990 11:07:56.652242 TX Bit5 (968~992) 25 980, Bit13 (969~991) 23 980,
1991 11:07:56.655449 TX Bit6 (969~993) 25 981, Bit14 (968~993) 26 980,
1992 11:07:56.659152 TX Bit7 (970~994) 25 982, Bit15 (972~996) 25 984,
1993 11:07:56.659227
1994 11:07:56.662304 Write Rank1 MR14 =0x1e
1995 11:07:56.671087
1996 11:07:56.674813 CH=0, VrefRange= 0, VrefLevel = 30
1997 11:07:56.677977 TX Bit0 (971~996) 26 983, Bit8 (966~990) 25 978,
1998 11:07:56.680977 TX Bit1 (970~994) 25 982, Bit9 (968~991) 24 979,
1999 11:07:56.687773 TX Bit2 (972~995) 24 983, Bit10 (972~998) 27 985,
2000 11:07:56.691000 TX Bit3 (966~990) 25 978, Bit11 (967~990) 24 978,
2001 11:07:56.694447 TX Bit4 (969~994) 26 981, Bit12 (968~992) 25 980,
2002 11:07:56.701201 TX Bit5 (968~992) 25 980, Bit13 (969~991) 23 980,
2003 11:07:56.704920 TX Bit6 (969~993) 25 981, Bit14 (968~993) 26 980,
2004 11:07:56.708027 TX Bit7 (969~994) 26 981, Bit15 (971~996) 26 983,
2005 11:07:56.708111
2006 11:07:56.710813 Write Rank1 MR14 =0x20
2007 11:07:56.720146
2008 11:07:56.720229 CH=0, VrefRange= 0, VrefLevel = 32
2009 11:07:56.726999 TX Bit0 (971~996) 26 983, Bit8 (966~990) 25 978,
2010 11:07:56.730290 TX Bit1 (970~994) 25 982, Bit9 (968~991) 24 979,
2011 11:07:56.733720 TX Bit2 (972~995) 24 983, Bit10 (972~998) 27 985,
2012 11:07:56.740652 TX Bit3 (966~990) 25 978, Bit11 (967~990) 24 978,
2013 11:07:56.744041 TX Bit4 (969~994) 26 981, Bit12 (968~992) 25 980,
2014 11:07:56.750531 TX Bit5 (968~992) 25 980, Bit13 (969~991) 23 980,
2015 11:07:56.753893 TX Bit6 (969~993) 25 981, Bit14 (968~993) 26 980,
2016 11:07:56.757016 TX Bit7 (969~994) 26 981, Bit15 (971~996) 26 983,
2017 11:07:56.757090
2018 11:07:56.760339 Write Rank1 MR14 =0x22
2019 11:07:56.769210
2020 11:07:56.772102 CH=0, VrefRange= 0, VrefLevel = 34
2021 11:07:56.775798 TX Bit0 (971~996) 26 983, Bit8 (966~990) 25 978,
2022 11:07:56.778798 TX Bit1 (970~994) 25 982, Bit9 (968~991) 24 979,
2023 11:07:56.785681 TX Bit2 (972~995) 24 983, Bit10 (972~998) 27 985,
2024 11:07:56.789156 TX Bit3 (966~990) 25 978, Bit11 (967~990) 24 978,
2025 11:07:56.792065 TX Bit4 (969~994) 26 981, Bit12 (968~992) 25 980,
2026 11:07:56.799043 TX Bit5 (968~992) 25 980, Bit13 (969~991) 23 980,
2027 11:07:56.802187 TX Bit6 (969~993) 25 981, Bit14 (968~993) 26 980,
2028 11:07:56.805632 TX Bit7 (969~994) 26 981, Bit15 (971~996) 26 983,
2029 11:07:56.805711
2030 11:07:56.809123 Write Rank1 MR14 =0x24
2031 11:07:56.817291
2032 11:07:56.820948 CH=0, VrefRange= 0, VrefLevel = 36
2033 11:07:56.824217 TX Bit0 (971~996) 26 983, Bit8 (966~990) 25 978,
2034 11:07:56.827534 TX Bit1 (970~994) 25 982, Bit9 (968~991) 24 979,
2035 11:07:56.834253 TX Bit2 (972~995) 24 983, Bit10 (972~998) 27 985,
2036 11:07:56.837411 TX Bit3 (966~990) 25 978, Bit11 (967~990) 24 978,
2037 11:07:56.840712 TX Bit4 (969~994) 26 981, Bit12 (968~992) 25 980,
2038 11:07:56.847309 TX Bit5 (968~992) 25 980, Bit13 (969~991) 23 980,
2039 11:07:56.851169 TX Bit6 (969~993) 25 981, Bit14 (968~993) 26 980,
2040 11:07:56.854544 TX Bit7 (969~994) 26 981, Bit15 (971~996) 26 983,
2041 11:07:56.854629
2042 11:07:56.857809 Write Rank1 MR14 =0x26
2043 11:07:56.866011
2044 11:07:56.866084 CH=0, VrefRange= 0, VrefLevel = 38
2045 11:07:56.872807 TX Bit0 (971~996) 26 983, Bit8 (966~990) 25 978,
2046 11:07:56.876363 TX Bit1 (970~994) 25 982, Bit9 (968~991) 24 979,
2047 11:07:56.882934 TX Bit2 (972~995) 24 983, Bit10 (972~998) 27 985,
2048 11:07:56.886202 TX Bit3 (966~990) 25 978, Bit11 (967~990) 24 978,
2049 11:07:56.889557 TX Bit4 (969~994) 26 981, Bit12 (968~992) 25 980,
2050 11:07:56.896375 TX Bit5 (968~992) 25 980, Bit13 (969~991) 23 980,
2051 11:07:56.899696 TX Bit6 (969~993) 25 981, Bit14 (968~993) 26 980,
2052 11:07:56.903254 TX Bit7 (969~994) 26 981, Bit15 (971~996) 26 983,
2053 11:07:56.903329
2054 11:07:56.903391
2055 11:07:56.906489 TX Vref found, early break! 373< 381
2056 11:07:56.912936 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2057 11:07:56.916539 u1DelayCellOfst[0]=6 cells (5 PI)
2058 11:07:56.919746 u1DelayCellOfst[1]=5 cells (4 PI)
2059 11:07:56.922925 u1DelayCellOfst[2]=6 cells (5 PI)
2060 11:07:56.923006 u1DelayCellOfst[3]=0 cells (0 PI)
2061 11:07:56.926445 u1DelayCellOfst[4]=3 cells (3 PI)
2062 11:07:56.929744 u1DelayCellOfst[5]=2 cells (2 PI)
2063 11:07:56.933379 u1DelayCellOfst[6]=3 cells (3 PI)
2064 11:07:56.936640 u1DelayCellOfst[7]=3 cells (3 PI)
2065 11:07:56.939774 Byte0, DQ PI dly=978, DQM PI dly= 980
2066 11:07:56.943048 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2067 11:07:56.943123
2068 11:07:56.950010 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2069 11:07:56.950092
2070 11:07:56.953368 u1DelayCellOfst[8]=0 cells (0 PI)
2071 11:07:56.956756 u1DelayCellOfst[9]=1 cells (1 PI)
2072 11:07:56.956839 u1DelayCellOfst[10]=9 cells (7 PI)
2073 11:07:56.960114 u1DelayCellOfst[11]=0 cells (0 PI)
2074 11:07:56.963471 u1DelayCellOfst[12]=2 cells (2 PI)
2075 11:07:56.966962 u1DelayCellOfst[13]=2 cells (2 PI)
2076 11:07:56.970267 u1DelayCellOfst[14]=2 cells (2 PI)
2077 11:07:56.973752 u1DelayCellOfst[15]=6 cells (5 PI)
2078 11:07:56.976831 Byte1, DQ PI dly=978, DQM PI dly= 981
2079 11:07:56.979904 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2080 11:07:56.979977
2081 11:07:56.987120 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2082 11:07:56.987225
2083 11:07:56.990257 wait MRW command Rank1 MR14 =0x1e fired (1)
2084 11:07:56.993626 Write Rank1 MR14 =0x1e
2085 11:07:56.993752
2086 11:07:56.993823 Final TX Range 0 Vref 30
2087 11:07:56.993885
2088 11:07:57.000128 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2089 11:07:57.000257
2090 11:07:57.006703 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2091 11:07:57.013535 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2092 11:07:57.020181 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2093 11:07:57.023981 Write Rank1 MR3 =0xb0
2094 11:07:57.026695 DramC Write-DBI on
2095 11:07:57.026779 ==
2096 11:07:57.030102 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2097 11:07:57.033401 fsp= 1, odt_onoff= 1, Byte mode= 0
2098 11:07:57.033488 ==
2099 11:07:57.037495 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2100 11:07:57.037582
2101 11:07:57.040412 Begin, DQ Scan Range 700~764
2102 11:07:57.040514
2103 11:07:57.040620
2104 11:07:57.043914 TX Vref Scan disable
2105 11:07:57.046690 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2106 11:07:57.050365 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2107 11:07:57.054090 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2108 11:07:57.056797 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2109 11:07:57.060196 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2110 11:07:57.063850 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2111 11:07:57.067139 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2112 11:07:57.070223 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2113 11:07:57.073656 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2114 11:07:57.077532 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2115 11:07:57.080767 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2116 11:07:57.083918 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2117 11:07:57.087046 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2118 11:07:57.090610 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2119 11:07:57.100207 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2120 11:07:57.103831 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2121 11:07:57.106874 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2122 11:07:57.110809 739 |2 6 35|[0] xxxxxxxx xxxxxxxx [MSB]
2123 11:07:57.113914 Byte0, DQ PI dly=726, DQM PI dly= 726
2124 11:07:57.117136 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 22)
2125 11:07:57.117213
2126 11:07:57.120211 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 22)
2127 11:07:57.120299
2128 11:07:57.123513 Byte1, DQ PI dly=723, DQM PI dly= 723
2129 11:07:57.130207 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2130 11:07:57.130292
2131 11:07:57.133598 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2132 11:07:57.133683
2133 11:07:57.140780 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2134 11:07:57.147313 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2135 11:07:57.153889 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2136 11:07:57.157232 Write Rank1 MR3 =0x30
2137 11:07:57.157316 DramC Write-DBI off
2138 11:07:57.157381
2139 11:07:57.160747 [DATLAT]
2140 11:07:57.163960 Freq=1600, CH0 RK1, use_rxtx_scan=0
2141 11:07:57.164043
2142 11:07:57.164108 DATLAT Default: 0x10
2143 11:07:57.167143 7, 0xFFFF, sum=0
2144 11:07:57.167228 8, 0xFFFF, sum=0
2145 11:07:57.170490 9, 0xFFFF, sum=0
2146 11:07:57.170575 10, 0xFFFF, sum=0
2147 11:07:57.173669 11, 0xFFFF, sum=0
2148 11:07:57.173755 12, 0xFFFF, sum=0
2149 11:07:57.177268 13, 0xFFFF, sum=0
2150 11:07:57.177353 14, 0x0, sum=1
2151 11:07:57.177420 15, 0x0, sum=2
2152 11:07:57.180473 16, 0x0, sum=3
2153 11:07:57.180558 17, 0x0, sum=4
2154 11:07:57.187115 pattern=2 first_step=14 total pass=5 best_step=16
2155 11:07:57.187199 ==
2156 11:07:57.190454 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2157 11:07:57.193713 fsp= 1, odt_onoff= 1, Byte mode= 0
2158 11:07:57.193797 ==
2159 11:07:57.197191 Start DQ dly to find pass range UseTestEngine =1
2160 11:07:57.204064 x-axis: bit #, y-axis: DQ dly (-127~63)
2161 11:07:57.204148 RX Vref Scan = 0
2162 11:07:57.207418 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2163 11:07:57.210644 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2164 11:07:57.213794 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2165 11:07:57.217058 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2166 11:07:57.217143 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2167 11:07:57.220925 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2168 11:07:57.224128 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2169 11:07:57.227278 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2170 11:07:57.230567 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2171 11:07:57.233868 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2172 11:07:57.237541 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2173 11:07:57.240363 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2174 11:07:57.240448 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2175 11:07:57.243841 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2176 11:07:57.247344 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2177 11:07:57.250588 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2178 11:07:57.253918 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2179 11:07:57.257931 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2180 11:07:57.261039 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2181 11:07:57.261124 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2182 11:07:57.264276 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2183 11:07:57.267597 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2184 11:07:57.271123 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2185 11:07:57.274489 -3, [0] xxxxxxxx oxxxxxxx [MSB]
2186 11:07:57.277677 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2187 11:07:57.281120 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2188 11:07:57.281209 0, [0] xxxoxxxx oxxoxxxx [MSB]
2189 11:07:57.284436 1, [0] xxxoxoxx ooxooxxx [MSB]
2190 11:07:57.287705 2, [0] xxxoxoxx ooxoooox [MSB]
2191 11:07:57.291195 3, [0] xxxoxooo ooxoooox [MSB]
2192 11:07:57.294614 4, [0] xxxoxooo ooxoooox [MSB]
2193 11:07:57.294699 5, [0] xoxooooo ooxoooox [MSB]
2194 11:07:57.297915 6, [0] oooooooo ooxooooo [MSB]
2195 11:07:57.302629 33, [0] oooooooo xooooooo [MSB]
2196 11:07:57.305975 34, [0] oooooooo xooooooo [MSB]
2197 11:07:57.309168 35, [0] oooxoxoo xooxoxoo [MSB]
2198 11:07:57.312274 36, [0] oooxoxoo xooxoxoo [MSB]
2199 11:07:57.315661 37, [0] oooxoxoo xxoxoxoo [MSB]
2200 11:07:57.319234 38, [0] oooxoxxo xxoxxxoo [MSB]
2201 11:07:57.319322 39, [0] oxxxxxxx xxoxxxxo [MSB]
2202 11:07:57.322304 40, [0] oxxxxxxx xxoxxxxx [MSB]
2203 11:07:57.325760 41, [0] xxxxxxxx xxoxxxxx [MSB]
2204 11:07:57.329169 42, [0] xxxxxxxx xxoxxxxx [MSB]
2205 11:07:57.332227 43, [0] xxxxxxxx xxoxxxxx [MSB]
2206 11:07:57.335800 44, [0] xxxxxxxx xxxxxxxx [MSB]
2207 11:07:57.338967 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
2208 11:07:57.342807 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2209 11:07:57.346057 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2210 11:07:57.349179 iDelay=44, Bit 3, Center 16 (-2 ~ 34) 37
2211 11:07:57.352590 iDelay=44, Bit 4, Center 21 (5 ~ 38) 34
2212 11:07:57.355871 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2213 11:07:57.359280 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2214 11:07:57.362879 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2215 11:07:57.366108 iDelay=44, Bit 8, Center 14 (-3 ~ 32) 36
2216 11:07:57.369181 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2217 11:07:57.373132 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2218 11:07:57.375835 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2219 11:07:57.382888 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2220 11:07:57.386266 iDelay=44, Bit 13, Center 18 (2 ~ 34) 33
2221 11:07:57.389804 iDelay=44, Bit 14, Center 20 (2 ~ 38) 37
2222 11:07:57.392856 iDelay=44, Bit 15, Center 22 (6 ~ 39) 34
2223 11:07:57.392942 ==
2224 11:07:57.396044 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2225 11:07:57.399669 fsp= 1, odt_onoff= 1, Byte mode= 0
2226 11:07:57.399757 ==
2227 11:07:57.403025 DQS Delay:
2228 11:07:57.403111 DQS0 = 0, DQS1 = 0
2229 11:07:57.405805 DQM Delay:
2230 11:07:57.405892 DQM0 = 20, DQM1 = 19
2231 11:07:57.405978 DQ Delay:
2232 11:07:57.409781 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =16
2233 11:07:57.413004 DQ4 =21, DQ5 =17, DQ6 =20, DQ7 =20
2234 11:07:57.416531 DQ8 =14, DQ9 =18, DQ10 =25, DQ11 =16
2235 11:07:57.419690 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
2236 11:07:57.419775
2237 11:07:57.419860
2238 11:07:57.419940
2239 11:07:57.422973 [DramC_TX_OE_Calibration] TA2
2240 11:07:57.426158 Original DQ_B0 (3 6) =30, OEN = 27
2241 11:07:57.429600 Original DQ_B1 (3 6) =30, OEN = 27
2242 11:07:57.433043 23, 0x0, End_B0=23 End_B1=23
2243 11:07:57.436449 24, 0x0, End_B0=24 End_B1=24
2244 11:07:57.436546 25, 0x0, End_B0=25 End_B1=25
2245 11:07:57.439448 26, 0x0, End_B0=26 End_B1=26
2246 11:07:57.442866 27, 0x0, End_B0=27 End_B1=27
2247 11:07:57.446476 28, 0x0, End_B0=28 End_B1=28
2248 11:07:57.446565 29, 0x0, End_B0=29 End_B1=29
2249 11:07:57.449639 30, 0x0, End_B0=30 End_B1=30
2250 11:07:57.453140 31, 0xFFFF, End_B0=30 End_B1=30
2251 11:07:57.459591 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2252 11:07:57.463039 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2253 11:07:57.463126
2254 11:07:57.466303
2255 11:07:57.466389 Write Rank1 MR23 =0x3f
2256 11:07:57.466475 [DQSOSC]
2257 11:07:57.476525 [DQSOSCAuto] RK1, (LSB)MR18= 0xd8d8, (MSB)MR19= 0x202, tDQSOscB0 = 432 ps tDQSOscB1 = 432 ps
2258 11:07:57.483003 CH0_RK1: MR19=0x202, MR18=0xD8D8, DQSOSC=432, MR23=63, INC=13, DEC=19
2259 11:07:57.483092 Write Rank1 MR23 =0x3f
2260 11:07:57.486286 [DQSOSC]
2261 11:07:57.492920 [DQSOSCAuto] RK1, (LSB)MR18= 0xd8d8, (MSB)MR19= 0x202, tDQSOscB0 = 432 ps tDQSOscB1 = 432 ps
2262 11:07:57.496702 CH0 RK1: MR19=202, MR18=D8D8
2263 11:07:57.499936 [RxdqsGatingPostProcess] freq 1600
2264 11:07:57.503226 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2265 11:07:57.506665 Rank: 0
2266 11:07:57.506778 best DQS0 dly(2T, 0.5T) = (2, 5)
2267 11:07:57.509857 best DQS1 dly(2T, 0.5T) = (2, 5)
2268 11:07:57.513290 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2269 11:07:57.516494 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2270 11:07:57.516604 Rank: 1
2271 11:07:57.519987 best DQS0 dly(2T, 0.5T) = (2, 6)
2272 11:07:57.523269 best DQS1 dly(2T, 0.5T) = (2, 6)
2273 11:07:57.526470 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2274 11:07:57.529942 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2275 11:07:57.536729 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2276 11:07:57.536817 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2277 11:07:57.543321 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2278 11:07:57.546599 Write Rank0 MR13 =0x59
2279 11:07:57.546682 ==
2280 11:07:57.549938 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2281 11:07:57.553359 fsp= 1, odt_onoff= 1, Byte mode= 0
2282 11:07:57.553453 ==
2283 11:07:57.556622 === u2Vref_new: 0x56 --> 0x3a
2284 11:07:57.559858 === u2Vref_new: 0x58 --> 0x58
2285 11:07:57.563449 === u2Vref_new: 0x5a --> 0x5a
2286 11:07:57.566679 === u2Vref_new: 0x5c --> 0x78
2287 11:07:57.569807 === u2Vref_new: 0x5e --> 0x7a
2288 11:07:57.573339 === u2Vref_new: 0x60 --> 0x90
2289 11:07:57.576625 [CA 0] Center 38 (13~63) winsize 51
2290 11:07:57.580286 [CA 1] Center 38 (13~63) winsize 51
2291 11:07:57.583069 [CA 2] Center 34 (6~63) winsize 58
2292 11:07:57.586550 [CA 3] Center 34 (6~63) winsize 58
2293 11:07:57.586661 [CA 4] Center 34 (6~63) winsize 58
2294 11:07:57.590013 [CA 5] Center 28 (-2~59) winsize 62
2295 11:07:57.590097
2296 11:07:57.596647 [CATrainingPosCal] consider 1 rank data
2297 11:07:57.596731 u2DelayCellTimex100 = 735/100 ps
2298 11:07:57.603292 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2299 11:07:57.606544 CA1 delay=38 (13~63),Diff = 10 PI (13 cell)
2300 11:07:57.609893 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2301 11:07:57.613031 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2302 11:07:57.616534 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2303 11:07:57.619763 CA5 delay=28 (-2~59),Diff = 0 PI (0 cell)
2304 11:07:57.619845
2305 11:07:57.623172 CA PerBit enable=1, Macro0, CA PI delay=28
2306 11:07:57.626865 === u2Vref_new: 0x60 --> 0x90
2307 11:07:57.626949
2308 11:07:57.630110 Vref(ca) range 1: 32
2309 11:07:57.630192
2310 11:07:57.630255 CS Dly= 11 (42-0-32)
2311 11:07:57.633453 Write Rank0 MR13 =0xd8
2312 11:07:57.636704 Write Rank0 MR13 =0xd8
2313 11:07:57.636787 Write Rank0 MR12 =0x60
2314 11:07:57.639966 Write Rank1 MR13 =0x59
2315 11:07:57.640049 ==
2316 11:07:57.643344 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2317 11:07:57.646758 fsp= 1, odt_onoff= 1, Byte mode= 0
2318 11:07:57.646844 ==
2319 11:07:57.650547 === u2Vref_new: 0x56 --> 0x3a
2320 11:07:57.653290 === u2Vref_new: 0x58 --> 0x58
2321 11:07:57.656475 === u2Vref_new: 0x5a --> 0x5a
2322 11:07:57.660198 === u2Vref_new: 0x5c --> 0x78
2323 11:07:57.663526 === u2Vref_new: 0x5e --> 0x7a
2324 11:07:57.666918 === u2Vref_new: 0x60 --> 0x90
2325 11:07:57.669821 [CA 0] Center 38 (13~63) winsize 51
2326 11:07:57.673779 [CA 1] Center 37 (12~63) winsize 52
2327 11:07:57.677093 [CA 2] Center 35 (8~63) winsize 56
2328 11:07:57.680399 [CA 3] Center 35 (7~63) winsize 57
2329 11:07:57.683709 [CA 4] Center 34 (6~63) winsize 58
2330 11:07:57.687198 [CA 5] Center 26 (-3~56) winsize 60
2331 11:07:57.687284
2332 11:07:57.690623 [CATrainingPosCal] consider 2 rank data
2333 11:07:57.693679 u2DelayCellTimex100 = 735/100 ps
2334 11:07:57.697252 CA0 delay=38 (13~63),Diff = 11 PI (14 cell)
2335 11:07:57.700216 CA1 delay=38 (13~63),Diff = 11 PI (14 cell)
2336 11:07:57.703767 CA2 delay=35 (8~63),Diff = 8 PI (10 cell)
2337 11:07:57.707097 CA3 delay=35 (7~63),Diff = 8 PI (10 cell)
2338 11:07:57.710902 CA4 delay=34 (6~63),Diff = 7 PI (9 cell)
2339 11:07:57.713824 CA5 delay=27 (-2~56),Diff = 0 PI (0 cell)
2340 11:07:57.713910
2341 11:07:57.717331 CA PerBit enable=1, Macro0, CA PI delay=27
2342 11:07:57.720232 === u2Vref_new: 0x5c --> 0x78
2343 11:07:57.720318
2344 11:07:57.723564 Vref(ca) range 1: 28
2345 11:07:57.723650
2346 11:07:57.727175 CS Dly= 11 (42-0-32)
2347 11:07:57.727286 Write Rank1 MR13 =0xd8
2348 11:07:57.730193 Write Rank1 MR13 =0xd8
2349 11:07:57.730279 Write Rank1 MR12 =0x5c
2350 11:07:57.733387 [RankSwap] Rank num 2, (Multi 1), Rank 0
2351 11:07:57.736872 Write Rank0 MR2 =0xad
2352 11:07:57.740120 [Write Leveling]
2353 11:07:57.740197 delay byte0 byte1 byte2 byte3
2354 11:07:57.743439
2355 11:07:57.743516 10 0 0
2356 11:07:57.743600 11 0 0
2357 11:07:57.746862 12 0 0
2358 11:07:57.746950 13 0 0
2359 11:07:57.750240 14 0 0
2360 11:07:57.750328 15 0 0
2361 11:07:57.750415 16 0 0
2362 11:07:57.753712 17 0 0
2363 11:07:57.753800 18 0 0
2364 11:07:57.757167 19 0 0
2365 11:07:57.757255 20 0 0
2366 11:07:57.757341 21 0 0
2367 11:07:57.760422 22 0 0
2368 11:07:57.760527 23 0 0
2369 11:07:57.763776 24 0 0
2370 11:07:57.763864 25 0 ff
2371 11:07:57.766922 26 0 ff
2372 11:07:57.767009 27 0 ff
2373 11:07:57.767096 28 0 ff
2374 11:07:57.770174 29 0 ff
2375 11:07:57.770260 30 0 ff
2376 11:07:57.773784 31 0 ff
2377 11:07:57.773869 32 0 ff
2378 11:07:57.777189 33 0 ff
2379 11:07:57.777277 34 ff ff
2380 11:07:57.780469 35 ff ff
2381 11:07:57.780557 36 ff ff
2382 11:07:57.783789 37 ff ff
2383 11:07:57.783897 38 ff ff
2384 11:07:57.784004 39 ff ff
2385 11:07:57.787046 40 ff ff
2386 11:07:57.790309 pass bytecount = 0xff (0xff: all bytes pass)
2387 11:07:57.790396
2388 11:07:57.793803 DQS0 dly: 34
2389 11:07:57.793888 DQS1 dly: 25
2390 11:07:57.793974 Write Rank0 MR2 =0x2d
2391 11:07:57.800317 [RankSwap] Rank num 2, (Multi 1), Rank 0
2392 11:07:57.800428 Write Rank0 MR1 =0xd6
2393 11:07:57.800522 [Gating]
2394 11:07:57.803605 ==
2395 11:07:57.807215 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2396 11:07:57.810579 fsp= 1, odt_onoff= 1, Byte mode= 0
2397 11:07:57.810666 ==
2398 11:07:57.813773 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2399 11:07:57.820565 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2400 11:07:57.823917 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2401 11:07:57.826911 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2402 11:07:57.834132 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2403 11:07:57.837249 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2404 11:07:57.840290 3 1 24 |3535 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2405 11:07:57.843959 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2406 11:07:57.850241 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2407 11:07:57.853634 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2408 11:07:57.857208 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2409 11:07:57.863647 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2410 11:07:57.867244 3 2 16 |c0c 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2411 11:07:57.870597 3 2 20 |3d3d 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2412 11:07:57.877570 3 2 24 |3d3d 302 |(11 11)(11 11) |(1 1)(0 0)| 0
2413 11:07:57.880395 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2414 11:07:57.883873 3 3 0 |3635 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2415 11:07:57.887182 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2416 11:07:57.893630 3 3 8 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2417 11:07:57.897057 3 3 12 |3c3c 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
2418 11:07:57.900840 3 3 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2419 11:07:57.907181 3 3 20 |403 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2420 11:07:57.910465 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2421 11:07:57.913845 [Byte 0] Lead/lag falling Transition (3, 3, 24)
2422 11:07:57.920578 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2423 11:07:57.923934 [Byte 1] Lead/lag Transition tap number (1)
2424 11:07:57.927470 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2425 11:07:57.930486 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2426 11:07:57.937012 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2427 11:07:57.940754 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2428 11:07:57.943930 3 4 16 |201f 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2429 11:07:57.947737 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2430 11:07:57.954440 3 4 24 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
2431 11:07:57.957686 3 4 28 |3d3d b0a |(11 11)(11 11) |(1 1)(1 1)| 0
2432 11:07:57.961276 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2433 11:07:57.967551 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2434 11:07:57.970926 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2435 11:07:57.974493 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2436 11:07:57.977803 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2437 11:07:57.984445 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2438 11:07:57.987651 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2439 11:07:57.991337 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2440 11:07:57.997679 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2441 11:07:58.000995 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2442 11:07:58.004508 [Byte 0] Lead/lag falling Transition (3, 6, 4)
2443 11:07:58.010888 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2444 11:07:58.014591 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2445 11:07:58.017911 [Byte 0] Lead/lag Transition tap number (3)
2446 11:07:58.021176 3 6 16 |403 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2447 11:07:58.027856 [Byte 1] Lead/lag falling Transition (3, 6, 16)
2448 11:07:58.031126 3 6 20 |4646 3d3d |(0 0)(11 11) |(0 0)(1 0)| 0
2449 11:07:58.034447 [Byte 0]First pass (3, 6, 20)
2450 11:07:58.037950 [Byte 1] Lead/lag Transition tap number (2)
2451 11:07:58.041235 3 6 24 |4646 1413 |(0 0)(11 11) |(0 0)(0 0)| 0
2452 11:07:58.044308 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2453 11:07:58.047693 [Byte 1]First pass (3, 6, 28)
2454 11:07:58.051476 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2455 11:07:58.054597 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2456 11:07:58.061204 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2457 11:07:58.064393 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2458 11:07:58.068261 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2459 11:07:58.071013 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2460 11:07:58.074244 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2461 11:07:58.080922 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2462 11:07:58.084299 All bytes gating window > 1UI, Early break!
2463 11:07:58.084386
2464 11:07:58.087971 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
2465 11:07:58.088058
2466 11:07:58.090990 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
2467 11:07:58.091076
2468 11:07:58.091161
2469 11:07:58.091241
2470 11:07:58.094660 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
2471 11:07:58.097971
2472 11:07:58.101168 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2473 11:07:58.101254
2474 11:07:58.101339
2475 11:07:58.101420 Write Rank0 MR1 =0x56
2476 11:07:58.101498
2477 11:07:58.104681 best RODT dly(2T, 0.5T) = (2, 3)
2478 11:07:58.104767
2479 11:07:58.107489 best RODT dly(2T, 0.5T) = (2, 3)
2480 11:07:58.107589 ==
2481 11:07:58.114544 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2482 11:07:58.117588 fsp= 1, odt_onoff= 1, Byte mode= 0
2483 11:07:58.117663 ==
2484 11:07:58.121217 Start DQ dly to find pass range UseTestEngine =0
2485 11:07:58.124872 x-axis: bit #, y-axis: DQ dly (-127~63)
2486 11:07:58.127733 RX Vref Scan = 0
2487 11:07:58.131202 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2488 11:07:58.131289 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2489 11:07:58.134692 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2490 11:07:58.137883 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2491 11:07:58.141152 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2492 11:07:58.144619 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2493 11:07:58.147927 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2494 11:07:58.151043 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2495 11:07:58.154206 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2496 11:07:58.157499 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2497 11:07:58.157586 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2498 11:07:58.160825 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2499 11:07:58.164212 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2500 11:07:58.167381 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2501 11:07:58.170662 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2502 11:07:58.174451 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2503 11:07:58.177627 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2504 11:07:58.180959 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2505 11:07:58.181042 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2506 11:07:58.184286 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2507 11:07:58.187583 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2508 11:07:58.191010 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2509 11:07:58.193880 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2510 11:07:58.197412 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2511 11:07:58.200699 -2, [0] xxxoxxxx xoxxxxxo [MSB]
2512 11:07:58.200785 -1, [0] xxxoxxxx xoxxxxxo [MSB]
2513 11:07:58.204152 0, [0] xxxoxxxx ooxxxxxo [MSB]
2514 11:07:58.207720 1, [0] xxooxxxx ooxxxxxo [MSB]
2515 11:07:58.210550 2, [0] xxooxxxx ooxxxxxo [MSB]
2516 11:07:58.214272 3, [0] xxooxxxo oooxxxxo [MSB]
2517 11:07:58.217309 4, [0] oxoooxxo oooxoxxo [MSB]
2518 11:07:58.217396 5, [0] oooooxxo ooooooxo [MSB]
2519 11:07:58.220611 31, [0] oooooooo ooooooox [MSB]
2520 11:07:58.224171 32, [0] oooooooo ooooooox [MSB]
2521 11:07:58.227366 33, [0] oooooooo ooooooox [MSB]
2522 11:07:58.230486 34, [0] oooooooo ooooooox [MSB]
2523 11:07:58.233658 35, [0] oooxoooo ooooooox [MSB]
2524 11:07:58.237301 36, [0] oooxoooo xxooooox [MSB]
2525 11:07:58.237387 37, [0] ooxxoooo xxooooox [MSB]
2526 11:07:58.240488 38, [0] ooxxoooo xxooooox [MSB]
2527 11:07:58.243848 39, [0] ooxxooox xxooooox [MSB]
2528 11:07:58.247229 40, [0] oxxxxoox xxxoooox [MSB]
2529 11:07:58.250581 41, [0] xxxxxoox xxxxxxxx [MSB]
2530 11:07:58.253879 42, [0] xxxxxxxx xxxxxxxx [MSB]
2531 11:07:58.257557 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
2532 11:07:58.260701 iDelay=42, Bit 1, Center 22 (5 ~ 39) 35
2533 11:07:58.263950 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
2534 11:07:58.267252 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
2535 11:07:58.270512 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2536 11:07:58.274253 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
2537 11:07:58.277441 iDelay=42, Bit 6, Center 23 (6 ~ 41) 36
2538 11:07:58.280921 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
2539 11:07:58.284013 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
2540 11:07:58.287333 iDelay=42, Bit 9, Center 16 (-2 ~ 35) 38
2541 11:07:58.290694 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
2542 11:07:58.297368 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
2543 11:07:58.300287 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
2544 11:07:58.303728 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
2545 11:07:58.307494 iDelay=42, Bit 14, Center 23 (6 ~ 40) 35
2546 11:07:58.310690 iDelay=42, Bit 15, Center 13 (-4 ~ 30) 35
2547 11:07:58.310776 ==
2548 11:07:58.313825 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2549 11:07:58.317214 fsp= 1, odt_onoff= 1, Byte mode= 0
2550 11:07:58.320883 ==
2551 11:07:58.320968 DQS Delay:
2552 11:07:58.321035 DQS0 = 0, DQS1 = 0
2553 11:07:58.324071 DQM Delay:
2554 11:07:58.324155 DQM0 = 20, DQM1 = 19
2555 11:07:58.326826 DQ Delay:
2556 11:07:58.326911 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16
2557 11:07:58.330398 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
2558 11:07:58.333358 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
2559 11:07:58.337070 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =13
2560 11:07:58.337155
2561 11:07:58.340354
2562 11:07:58.340472 DramC Write-DBI off
2563 11:07:58.340542 ==
2564 11:07:58.347030 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2565 11:07:58.350216 fsp= 1, odt_onoff= 1, Byte mode= 0
2566 11:07:58.350301 ==
2567 11:07:58.353515 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2568 11:07:58.353600
2569 11:07:58.357251 Begin, DQ Scan Range 921~1177
2570 11:07:58.357335
2571 11:07:58.357401
2572 11:07:58.360162 TX Vref Scan disable
2573 11:07:58.363716 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2574 11:07:58.366705 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2575 11:07:58.370341 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2576 11:07:58.373380 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2577 11:07:58.376971 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2578 11:07:58.379839 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2579 11:07:58.383275 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2580 11:07:58.386472 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2581 11:07:58.389975 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2582 11:07:58.393481 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2583 11:07:58.396636 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2584 11:07:58.400037 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2585 11:07:58.403235 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2586 11:07:58.406635 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2587 11:07:58.409958 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2588 11:07:58.416566 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2589 11:07:58.419986 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2590 11:07:58.423261 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2591 11:07:58.426570 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2592 11:07:58.430109 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2593 11:07:58.432817 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2594 11:07:58.436529 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2595 11:07:58.439575 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2596 11:07:58.443245 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2597 11:07:58.446700 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2598 11:07:58.449826 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2599 11:07:58.453029 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2600 11:07:58.456358 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2601 11:07:58.459556 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2602 11:07:58.466284 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2603 11:07:58.469571 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2604 11:07:58.472674 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2605 11:07:58.476221 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2606 11:07:58.479518 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2607 11:07:58.482803 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2608 11:07:58.486292 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2609 11:07:58.489564 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2610 11:07:58.492814 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2611 11:07:58.496034 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2612 11:07:58.499469 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2613 11:07:58.502694 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2614 11:07:58.506301 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2615 11:07:58.509677 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2616 11:07:58.512788 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2617 11:07:58.516117 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2618 11:07:58.519296 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2619 11:07:58.522716 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2620 11:07:58.526525 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2621 11:07:58.529691 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2622 11:07:58.533120 970 |3 6 10|[0] xxxxxxxx xxxxxxxo [MSB]
2623 11:07:58.539362 971 |3 6 11|[0] xxxxxxxx oxxxxxxo [MSB]
2624 11:07:58.543209 972 |3 6 12|[0] xxxxxxxx ooxxxxxo [MSB]
2625 11:07:58.546283 973 |3 6 13|[0] xxxxxxxx ooxxxxoo [MSB]
2626 11:07:58.549547 974 |3 6 14|[0] xxxxxxxx oooxoxoo [MSB]
2627 11:07:58.552762 975 |3 6 15|[0] xxxxxxxx oooooxoo [MSB]
2628 11:07:58.556444 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2629 11:07:58.559566 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2630 11:07:58.562815 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2631 11:07:58.566233 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2632 11:07:58.569417 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2633 11:07:58.572851 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
2634 11:07:58.576103 982 |3 6 22|[0] oooooxoo oooooooo [MSB]
2635 11:07:58.579434 987 |3 6 27|[0] oooooooo ooooooox [MSB]
2636 11:07:58.585995 988 |3 6 28|[0] oooooooo ooooooox [MSB]
2637 11:07:58.589270 989 |3 6 29|[0] oooooooo oxooooox [MSB]
2638 11:07:58.592725 990 |3 6 30|[0] oooooooo oxooooox [MSB]
2639 11:07:58.596003 991 |3 6 31|[0] oooooooo xxooooox [MSB]
2640 11:07:58.599495 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2641 11:07:58.602416 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2642 11:07:58.605734 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2643 11:07:58.609419 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2644 11:07:58.612478 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2645 11:07:58.615705 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2646 11:07:58.619927 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2647 11:07:58.622619 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
2648 11:07:58.625689 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2649 11:07:58.629000 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2650 11:07:58.632714 1002 |3 6 42|[0] oxxxooox xxxxxxxx [MSB]
2651 11:07:58.639115 1003 |3 6 43|[0] oxxxxxxx xxxxxxxx [MSB]
2652 11:07:58.642390 1004 |3 6 44|[0] xxxxxxxx xxxxxxxx [MSB]
2653 11:07:58.645963 Byte0, DQ PI dly=991, DQM PI dly= 991
2654 11:07:58.648951 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
2655 11:07:58.649037
2656 11:07:58.652361 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
2657 11:07:58.652449
2658 11:07:58.655645 Byte1, DQ PI dly=980, DQM PI dly= 980
2659 11:07:58.662496 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2660 11:07:58.662584
2661 11:07:58.665772 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2662 11:07:58.665859
2663 11:07:58.665945 ==
2664 11:07:58.672593 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2665 11:07:58.675530 fsp= 1, odt_onoff= 1, Byte mode= 0
2666 11:07:58.675617 ==
2667 11:07:58.678924 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2668 11:07:58.679010
2669 11:07:58.682340 Begin, DQ Scan Range 956~1020
2670 11:07:58.682426 Write Rank0 MR14 =0x0
2671 11:07:58.692945
2672 11:07:58.693031 CH=1, VrefRange= 0, VrefLevel = 0
2673 11:07:58.699501 TX Bit0 (984~1000) 17 992, Bit8 (975~985) 11 980,
2674 11:07:58.702773 TX Bit1 (984~997) 14 990, Bit9 (976~984) 9 980,
2675 11:07:58.709424 TX Bit2 (982~997) 16 989, Bit10 (977~988) 12 982,
2676 11:07:58.712739 TX Bit3 (981~993) 13 987, Bit11 (977~989) 13 983,
2677 11:07:58.716056 TX Bit4 (984~998) 15 991, Bit12 (976~988) 13 982,
2678 11:07:58.722957 TX Bit5 (985~999) 15 992, Bit13 (978~989) 12 983,
2679 11:07:58.725761 TX Bit6 (985~998) 14 991, Bit14 (976~988) 13 982,
2680 11:07:58.729008 TX Bit7 (984~997) 14 990, Bit15 (970~982) 13 976,
2681 11:07:58.729094
2682 11:07:58.732732 Write Rank0 MR14 =0x2
2683 11:07:58.741646
2684 11:07:58.741733 CH=1, VrefRange= 0, VrefLevel = 2
2685 11:07:58.748188 TX Bit0 (984~1001) 18 992, Bit8 (974~985) 12 979,
2686 11:07:58.751507 TX Bit1 (984~998) 15 991, Bit9 (975~985) 11 980,
2687 11:07:58.758012 TX Bit2 (982~998) 17 990, Bit10 (976~988) 13 982,
2688 11:07:58.761312 TX Bit3 (980~994) 15 987, Bit11 (977~989) 13 983,
2689 11:07:58.764510 TX Bit4 (983~999) 17 991, Bit12 (976~990) 15 983,
2690 11:07:58.771765 TX Bit5 (985~999) 15 992, Bit13 (978~990) 13 984,
2691 11:07:58.774926 TX Bit6 (984~999) 16 991, Bit14 (976~989) 14 982,
2692 11:07:58.778203 TX Bit7 (984~998) 15 991, Bit15 (970~983) 14 976,
2693 11:07:58.778313
2694 11:07:58.781400 Write Rank0 MR14 =0x4
2695 11:07:58.790757
2696 11:07:58.790840 CH=1, VrefRange= 0, VrefLevel = 4
2697 11:07:58.797493 TX Bit0 (984~1001) 18 992, Bit8 (974~986) 13 980,
2698 11:07:58.800874 TX Bit1 (983~999) 17 991, Bit9 (974~985) 12 979,
2699 11:07:58.807590 TX Bit2 (981~998) 18 989, Bit10 (976~990) 15 983,
2700 11:07:58.810968 TX Bit3 (980~995) 16 987, Bit11 (977~991) 15 984,
2701 11:07:58.813690 TX Bit4 (983~999) 17 991, Bit12 (976~991) 16 983,
2702 11:07:58.820410 TX Bit5 (985~1000) 16 992, Bit13 (977~991) 15 984,
2703 11:07:58.823735 TX Bit6 (984~999) 16 991, Bit14 (976~989) 14 982,
2704 11:07:58.827427 TX Bit7 (984~998) 15 991, Bit15 (969~983) 15 976,
2705 11:07:58.830808
2706 11:07:58.830891 Write Rank0 MR14 =0x6
2707 11:07:58.840297
2708 11:07:58.840380 CH=1, VrefRange= 0, VrefLevel = 6
2709 11:07:58.846720 TX Bit0 (984~1002) 19 993, Bit8 (973~986) 14 979,
2710 11:07:58.850133 TX Bit1 (983~999) 17 991, Bit9 (974~985) 12 979,
2711 11:07:58.856643 TX Bit2 (981~999) 19 990, Bit10 (976~991) 16 983,
2712 11:07:58.860201 TX Bit3 (979~996) 18 987, Bit11 (977~991) 15 984,
2713 11:07:58.863482 TX Bit4 (983~1000) 18 991, Bit12 (976~991) 16 983,
2714 11:07:58.870388 TX Bit5 (985~1000) 16 992, Bit13 (977~991) 15 984,
2715 11:07:58.873415 TX Bit6 (983~999) 17 991, Bit14 (975~991) 17 983,
2716 11:07:58.876881 TX Bit7 (983~999) 17 991, Bit15 (969~984) 16 976,
2717 11:07:58.880285
2718 11:07:58.880386 Write Rank0 MR14 =0x8
2719 11:07:58.889577
2720 11:07:58.889661 CH=1, VrefRange= 0, VrefLevel = 8
2721 11:07:58.896186 TX Bit0 (984~1003) 20 993, Bit8 (972~987) 16 979,
2722 11:07:58.899964 TX Bit1 (983~999) 17 991, Bit9 (973~986) 14 979,
2723 11:07:58.906371 TX Bit2 (981~999) 19 990, Bit10 (975~991) 17 983,
2724 11:07:58.909558 TX Bit3 (978~996) 19 987, Bit11 (976~992) 17 984,
2725 11:07:58.912890 TX Bit4 (982~1000) 19 991, Bit12 (975~992) 18 983,
2726 11:07:58.919586 TX Bit5 (984~1001) 18 992, Bit13 (977~992) 16 984,
2727 11:07:58.922966 TX Bit6 (983~1000) 18 991, Bit14 (975~991) 17 983,
2728 11:07:58.929636 TX Bit7 (983~999) 17 991, Bit15 (969~984) 16 976,
2729 11:07:58.929721
2730 11:07:58.929787 Write Rank0 MR14 =0xa
2731 11:07:58.939444
2732 11:07:58.942731 CH=1, VrefRange= 0, VrefLevel = 10
2733 11:07:58.946019 TX Bit0 (984~1003) 20 993, Bit8 (972~987) 16 979,
2734 11:07:58.949285 TX Bit1 (982~1000) 19 991, Bit9 (973~986) 14 979,
2735 11:07:58.955801 TX Bit2 (980~999) 20 989, Bit10 (975~991) 17 983,
2736 11:07:58.959261 TX Bit3 (978~997) 20 987, Bit11 (976~992) 17 984,
2737 11:07:58.962533 TX Bit4 (982~1001) 20 991, Bit12 (975~992) 18 983,
2738 11:07:58.969069 TX Bit5 (984~1001) 18 992, Bit13 (977~992) 16 984,
2739 11:07:58.972399 TX Bit6 (983~1000) 18 991, Bit14 (974~992) 19 983,
2740 11:07:58.978890 TX Bit7 (983~1000) 18 991, Bit15 (969~985) 17 977,
2741 11:07:58.978976
2742 11:07:58.979041 Write Rank0 MR14 =0xc
2743 11:07:58.989410
2744 11:07:58.993004 CH=1, VrefRange= 0, VrefLevel = 12
2745 11:07:58.996405 TX Bit0 (983~1004) 22 993, Bit8 (971~989) 19 980,
2746 11:07:58.999724 TX Bit1 (983~1001) 19 992, Bit9 (972~987) 16 979,
2747 11:07:59.005979 TX Bit2 (980~1000) 21 990, Bit10 (975~992) 18 983,
2748 11:07:59.009381 TX Bit3 (978~998) 21 988, Bit11 (975~992) 18 983,
2749 11:07:59.013092 TX Bit4 (982~1002) 21 992, Bit12 (975~993) 19 984,
2750 11:07:59.019293 TX Bit5 (984~1002) 19 993, Bit13 (976~992) 17 984,
2751 11:07:59.022656 TX Bit6 (983~1001) 19 992, Bit14 (974~992) 19 983,
2752 11:07:59.029300 TX Bit7 (982~1000) 19 991, Bit15 (969~985) 17 977,
2753 11:07:59.029385
2754 11:07:59.029450 Write Rank0 MR14 =0xe
2755 11:07:59.040017
2756 11:07:59.043307 CH=1, VrefRange= 0, VrefLevel = 14
2757 11:07:59.046577 TX Bit0 (983~1005) 23 994, Bit8 (971~990) 20 980,
2758 11:07:59.050098 TX Bit1 (982~1001) 20 991, Bit9 (972~987) 16 979,
2759 11:07:59.056736 TX Bit2 (979~1000) 22 989, Bit10 (975~992) 18 983,
2760 11:07:59.059575 TX Bit3 (978~998) 21 988, Bit11 (975~992) 18 983,
2761 11:07:59.063103 TX Bit4 (981~1002) 22 991, Bit12 (975~993) 19 984,
2762 11:07:59.069689 TX Bit5 (984~1002) 19 993, Bit13 (976~993) 18 984,
2763 11:07:59.072948 TX Bit6 (982~1002) 21 992, Bit14 (974~993) 20 983,
2764 11:07:59.079542 TX Bit7 (982~1001) 20 991, Bit15 (969~986) 18 977,
2765 11:07:59.079630
2766 11:07:59.079715 Write Rank0 MR14 =0x10
2767 11:07:59.090504
2768 11:07:59.093440 CH=1, VrefRange= 0, VrefLevel = 16
2769 11:07:59.097066 TX Bit0 (982~1005) 24 993, Bit8 (972~991) 20 981,
2770 11:07:59.100339 TX Bit1 (981~1002) 22 991, Bit9 (971~989) 19 980,
2771 11:07:59.107045 TX Bit2 (979~1001) 23 990, Bit10 (974~992) 19 983,
2772 11:07:59.110254 TX Bit3 (978~999) 22 988, Bit11 (975~993) 19 984,
2773 11:07:59.113514 TX Bit4 (981~1002) 22 991, Bit12 (974~993) 20 983,
2774 11:07:59.120283 TX Bit5 (983~1003) 21 993, Bit13 (976~993) 18 984,
2775 11:07:59.123739 TX Bit6 (982~1002) 21 992, Bit14 (974~993) 20 983,
2776 11:07:59.130261 TX Bit7 (981~1001) 21 991, Bit15 (968~986) 19 977,
2777 11:07:59.130348
2778 11:07:59.130435 Write Rank0 MR14 =0x12
2779 11:07:59.140410
2780 11:07:59.143951 CH=1, VrefRange= 0, VrefLevel = 18
2781 11:07:59.147338 TX Bit0 (982~1005) 24 993, Bit8 (970~991) 22 980,
2782 11:07:59.150577 TX Bit1 (981~1002) 22 991, Bit9 (971~990) 20 980,
2783 11:07:59.157861 TX Bit2 (979~1001) 23 990, Bit10 (974~993) 20 983,
2784 11:07:59.160870 TX Bit3 (978~999) 22 988, Bit11 (974~993) 20 983,
2785 11:07:59.163949 TX Bit4 (980~1003) 24 991, Bit12 (974~994) 21 984,
2786 11:07:59.170973 TX Bit5 (983~1004) 22 993, Bit13 (976~994) 19 985,
2787 11:07:59.173951 TX Bit6 (981~1002) 22 991, Bit14 (973~993) 21 983,
2788 11:07:59.180337 TX Bit7 (981~1002) 22 991, Bit15 (969~987) 19 978,
2789 11:07:59.180426
2790 11:07:59.180518 Write Rank0 MR14 =0x14
2791 11:07:59.191646
2792 11:07:59.194925 CH=1, VrefRange= 0, VrefLevel = 20
2793 11:07:59.198194 TX Bit0 (982~1006) 25 994, Bit8 (970~991) 22 980,
2794 11:07:59.201375 TX Bit1 (980~1003) 24 991, Bit9 (971~990) 20 980,
2795 11:07:59.208270 TX Bit2 (978~1001) 24 989, Bit10 (974~993) 20 983,
2796 11:07:59.211491 TX Bit3 (978~999) 22 988, Bit11 (974~994) 21 984,
2797 11:07:59.214347 TX Bit4 (980~1004) 25 992, Bit12 (974~994) 21 984,
2798 11:07:59.221255 TX Bit5 (983~1004) 22 993, Bit13 (976~994) 19 985,
2799 11:07:59.224672 TX Bit6 (981~1003) 23 992, Bit14 (972~994) 23 983,
2800 11:07:59.230904 TX Bit7 (980~1003) 24 991, Bit15 (968~988) 21 978,
2801 11:07:59.231015
2802 11:07:59.231119 Write Rank0 MR14 =0x16
2803 11:07:59.241973
2804 11:07:59.245316 CH=1, VrefRange= 0, VrefLevel = 22
2805 11:07:59.248693 TX Bit0 (982~1006) 25 994, Bit8 (970~991) 22 980,
2806 11:07:59.252029 TX Bit1 (979~1003) 25 991, Bit9 (971~990) 20 980,
2807 11:07:59.258542 TX Bit2 (978~1002) 25 990, Bit10 (973~994) 22 983,
2808 11:07:59.261859 TX Bit3 (977~1000) 24 988, Bit11 (974~994) 21 984,
2809 11:07:59.265008 TX Bit4 (980~1004) 25 992, Bit12 (974~995) 22 984,
2810 11:07:59.271922 TX Bit5 (982~1005) 24 993, Bit13 (975~994) 20 984,
2811 11:07:59.275264 TX Bit6 (981~1004) 24 992, Bit14 (973~994) 22 983,
2812 11:07:59.281931 TX Bit7 (981~1003) 23 992, Bit15 (968~988) 21 978,
2813 11:07:59.282045
2814 11:07:59.282140 Write Rank0 MR14 =0x18
2815 11:07:59.292792
2816 11:07:59.296186 CH=1, VrefRange= 0, VrefLevel = 24
2817 11:07:59.299506 TX Bit0 (981~1006) 26 993, Bit8 (970~992) 23 981,
2818 11:07:59.302601 TX Bit1 (980~1004) 25 992, Bit9 (971~991) 21 981,
2819 11:07:59.309228 TX Bit2 (978~1003) 26 990, Bit10 (973~994) 22 983,
2820 11:07:59.312338 TX Bit3 (977~1000) 24 988, Bit11 (973~994) 22 983,
2821 11:07:59.315546 TX Bit4 (979~1005) 27 992, Bit12 (974~995) 22 984,
2822 11:07:59.322439 TX Bit5 (982~1005) 24 993, Bit13 (975~994) 20 984,
2823 11:07:59.325513 TX Bit6 (980~1004) 25 992, Bit14 (972~994) 23 983,
2824 11:07:59.332262 TX Bit7 (980~1004) 25 992, Bit15 (968~988) 21 978,
2825 11:07:59.332374
2826 11:07:59.332478 Write Rank0 MR14 =0x1a
2827 11:07:59.343234
2828 11:07:59.346515 CH=1, VrefRange= 0, VrefLevel = 26
2829 11:07:59.349960 TX Bit0 (981~1006) 26 993, Bit8 (970~992) 23 981,
2830 11:07:59.353171 TX Bit1 (979~1005) 27 992, Bit9 (970~991) 22 980,
2831 11:07:59.359915 TX Bit2 (978~1003) 26 990, Bit10 (971~995) 25 983,
2832 11:07:59.363446 TX Bit3 (977~1000) 24 988, Bit11 (973~995) 23 984,
2833 11:07:59.366523 TX Bit4 (979~1006) 28 992, Bit12 (972~996) 25 984,
2834 11:07:59.372889 TX Bit5 (982~1006) 25 994, Bit13 (975~995) 21 985,
2835 11:07:59.376432 TX Bit6 (980~1005) 26 992, Bit14 (972~995) 24 983,
2836 11:07:59.383180 TX Bit7 (980~1005) 26 992, Bit15 (967~990) 24 978,
2837 11:07:59.383286
2838 11:07:59.383389 Write Rank0 MR14 =0x1c
2839 11:07:59.393933
2840 11:07:59.394041 CH=1, VrefRange= 0, VrefLevel = 28
2841 11:07:59.400904 TX Bit0 (980~1007) 28 993, Bit8 (970~992) 23 981,
2842 11:07:59.403848 TX Bit1 (979~1005) 27 992, Bit9 (970~992) 23 981,
2843 11:07:59.411417 TX Bit2 (978~1004) 27 991, Bit10 (972~994) 23 983,
2844 11:07:59.414486 TX Bit3 (977~1001) 25 989, Bit11 (972~996) 25 984,
2845 11:07:59.417201 TX Bit4 (979~1006) 28 992, Bit12 (973~996) 24 984,
2846 11:07:59.424313 TX Bit5 (981~1006) 26 993, Bit13 (975~995) 21 985,
2847 11:07:59.427192 TX Bit6 (980~1006) 27 993, Bit14 (971~995) 25 983,
2848 11:07:59.433977 TX Bit7 (979~1005) 27 992, Bit15 (967~990) 24 978,
2849 11:07:59.434062
2850 11:07:59.434128 Write Rank0 MR14 =0x1e
2851 11:07:59.444938
2852 11:07:59.448182 CH=1, VrefRange= 0, VrefLevel = 30
2853 11:07:59.451658 TX Bit0 (980~1007) 28 993, Bit8 (969~993) 25 981,
2854 11:07:59.454881 TX Bit1 (979~1005) 27 992, Bit9 (969~992) 24 980,
2855 11:07:59.461632 TX Bit2 (978~1003) 26 990, Bit10 (971~995) 25 983,
2856 11:07:59.464935 TX Bit3 (977~1001) 25 989, Bit11 (971~996) 26 983,
2857 11:07:59.468280 TX Bit4 (980~1005) 26 992, Bit12 (972~996) 25 984,
2858 11:07:59.474526 TX Bit5 (981~1007) 27 994, Bit13 (974~996) 23 985,
2859 11:07:59.478091 TX Bit6 (979~1006) 28 992, Bit14 (972~995) 24 983,
2860 11:07:59.484611 TX Bit7 (979~1006) 28 992, Bit15 (967~990) 24 978,
2861 11:07:59.484691
2862 11:07:59.484773 Write Rank0 MR14 =0x20
2863 11:07:59.495473
2864 11:07:59.499003 CH=1, VrefRange= 0, VrefLevel = 32
2865 11:07:59.502229 TX Bit0 (980~1007) 28 993, Bit8 (969~993) 25 981,
2866 11:07:59.505667 TX Bit1 (979~1005) 27 992, Bit9 (969~992) 24 980,
2867 11:07:59.512300 TX Bit2 (978~1003) 26 990, Bit10 (971~995) 25 983,
2868 11:07:59.515394 TX Bit3 (977~1001) 25 989, Bit11 (971~996) 26 983,
2869 11:07:59.518902 TX Bit4 (980~1005) 26 992, Bit12 (972~996) 25 984,
2870 11:07:59.526187 TX Bit5 (981~1007) 27 994, Bit13 (974~996) 23 985,
2871 11:07:59.528980 TX Bit6 (979~1006) 28 992, Bit14 (972~995) 24 983,
2872 11:07:59.535335 TX Bit7 (979~1006) 28 992, Bit15 (967~990) 24 978,
2873 11:07:59.535420
2874 11:07:59.535484 Write Rank0 MR14 =0x22
2875 11:07:59.546366
2876 11:07:59.549504 CH=1, VrefRange= 0, VrefLevel = 34
2877 11:07:59.553250 TX Bit0 (980~1007) 28 993, Bit8 (969~993) 25 981,
2878 11:07:59.556222 TX Bit1 (979~1005) 27 992, Bit9 (969~992) 24 980,
2879 11:07:59.563151 TX Bit2 (978~1003) 26 990, Bit10 (971~995) 25 983,
2880 11:07:59.566306 TX Bit3 (977~1001) 25 989, Bit11 (971~996) 26 983,
2881 11:07:59.569598 TX Bit4 (980~1005) 26 992, Bit12 (972~996) 25 984,
2882 11:07:59.576331 TX Bit5 (981~1007) 27 994, Bit13 (974~996) 23 985,
2883 11:07:59.579718 TX Bit6 (979~1006) 28 992, Bit14 (972~995) 24 983,
2884 11:07:59.586581 TX Bit7 (979~1006) 28 992, Bit15 (967~990) 24 978,
2885 11:07:59.586676
2886 11:07:59.586761 Write Rank0 MR14 =0x24
2887 11:07:59.597515
2888 11:07:59.600318 CH=1, VrefRange= 0, VrefLevel = 36
2889 11:07:59.603832 TX Bit0 (980~1007) 28 993, Bit8 (969~993) 25 981,
2890 11:07:59.606929 TX Bit1 (979~1005) 27 992, Bit9 (969~992) 24 980,
2891 11:07:59.613508 TX Bit2 (978~1003) 26 990, Bit10 (971~995) 25 983,
2892 11:07:59.617353 TX Bit3 (977~1001) 25 989, Bit11 (971~996) 26 983,
2893 11:07:59.620475 TX Bit4 (980~1005) 26 992, Bit12 (972~996) 25 984,
2894 11:07:59.627146 TX Bit5 (981~1007) 27 994, Bit13 (974~996) 23 985,
2895 11:07:59.630504 TX Bit6 (979~1006) 28 992, Bit14 (972~995) 24 983,
2896 11:07:59.636943 TX Bit7 (979~1006) 28 992, Bit15 (967~990) 24 978,
2897 11:07:59.637028
2898 11:07:59.637094
2899 11:07:59.640420 TX Vref found, early break! 389< 390
2900 11:07:59.643864 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2901 11:07:59.647106 u1DelayCellOfst[0]=5 cells (4 PI)
2902 11:07:59.650438 u1DelayCellOfst[1]=3 cells (3 PI)
2903 11:07:59.653830 u1DelayCellOfst[2]=1 cells (1 PI)
2904 11:07:59.657179 u1DelayCellOfst[3]=0 cells (0 PI)
2905 11:07:59.660315 u1DelayCellOfst[4]=3 cells (3 PI)
2906 11:07:59.664014 u1DelayCellOfst[5]=6 cells (5 PI)
2907 11:07:59.664098 u1DelayCellOfst[6]=3 cells (3 PI)
2908 11:07:59.667212 u1DelayCellOfst[7]=3 cells (3 PI)
2909 11:07:59.670225 Byte0, DQ PI dly=989, DQM PI dly= 991
2910 11:07:59.676852 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2911 11:07:59.676936
2912 11:07:59.680721 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2913 11:07:59.680810
2914 11:07:59.683425 u1DelayCellOfst[8]=3 cells (3 PI)
2915 11:07:59.687319 u1DelayCellOfst[9]=2 cells (2 PI)
2916 11:07:59.690581 u1DelayCellOfst[10]=6 cells (5 PI)
2917 11:07:59.693887 u1DelayCellOfst[11]=6 cells (5 PI)
2918 11:07:59.697136 u1DelayCellOfst[12]=7 cells (6 PI)
2919 11:07:59.700384 u1DelayCellOfst[13]=9 cells (7 PI)
2920 11:07:59.703570 u1DelayCellOfst[14]=6 cells (5 PI)
2921 11:07:59.703654 u1DelayCellOfst[15]=0 cells (0 PI)
2922 11:07:59.707301 Byte1, DQ PI dly=978, DQM PI dly= 981
2923 11:07:59.713683 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2924 11:07:59.713768
2925 11:07:59.717059 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2926 11:07:59.717143
2927 11:07:59.720341 Write Rank0 MR14 =0x1e
2928 11:07:59.720424
2929 11:07:59.723575 Final TX Range 0 Vref 30
2930 11:07:59.723685
2931 11:07:59.730213 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2932 11:07:59.730297
2933 11:07:59.733735 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2934 11:07:59.743766 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2935 11:07:59.750340 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2936 11:07:59.753753 wait MRW command Rank0 MR3 =0xb0 fired (1)
2937 11:07:59.753837 Write Rank0 MR3 =0xb0
2938 11:07:59.756642 DramC Write-DBI on
2939 11:07:59.756726 ==
2940 11:07:59.763481 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2941 11:07:59.766683 fsp= 1, odt_onoff= 1, Byte mode= 0
2942 11:07:59.766766 ==
2943 11:07:59.769999 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2944 11:07:59.770083
2945 11:07:59.773425 Begin, DQ Scan Range 701~765
2946 11:07:59.773535
2947 11:07:59.773627
2948 11:07:59.773713 TX Vref Scan disable
2949 11:07:59.776852 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2950 11:07:59.783148 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2951 11:07:59.786936 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2952 11:07:59.789949 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2953 11:07:59.793306 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2954 11:07:59.796878 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2955 11:07:59.799947 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2956 11:07:59.803127 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2957 11:07:59.806424 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2958 11:07:59.809955 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2959 11:07:59.813185 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2960 11:07:59.816678 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2961 11:07:59.819927 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2962 11:07:59.823007 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2963 11:07:59.826637 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2964 11:07:59.829873 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2965 11:07:59.833075 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2966 11:07:59.836558 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2967 11:07:59.839788 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2968 11:07:59.843004 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2969 11:07:59.849344 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2970 11:07:59.853120 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2971 11:07:59.856322 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2972 11:07:59.859361 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2973 11:07:59.865986 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2974 11:07:59.869151 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2975 11:07:59.872807 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2976 11:07:59.876250 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2977 11:07:59.879092 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2978 11:07:59.882519 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2979 11:07:59.886021 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2980 11:07:59.889158 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2981 11:07:59.892274 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2982 11:07:59.895830 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2983 11:07:59.899344 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2984 11:07:59.902415 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2985 11:07:59.906092 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2986 11:07:59.909010 Byte0, DQ PI dly=737, DQM PI dly= 737
2987 11:07:59.916079 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
2988 11:07:59.916163
2989 11:07:59.919569 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
2990 11:07:59.919654
2991 11:07:59.922685 Byte1, DQ PI dly=725, DQM PI dly= 725
2992 11:07:59.926042 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
2993 11:07:59.926126
2994 11:07:59.932396 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
2995 11:07:59.932487
2996 11:07:59.938741 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2997 11:07:59.945370 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2998 11:07:59.952041 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2999 11:07:59.955710 Write Rank0 MR3 =0x30
3000 11:07:59.955794 DramC Write-DBI off
3001 11:07:59.955858
3002 11:07:59.955918 [DATLAT]
3003 11:07:59.958933 Freq=1600, CH1 RK0, use_rxtx_scan=0
3004 11:07:59.959017
3005 11:07:59.962329 DATLAT Default: 0xf
3006 11:07:59.962412 7, 0xFFFF, sum=0
3007 11:07:59.965731 8, 0xFFFF, sum=0
3008 11:07:59.965816 9, 0xFFFF, sum=0
3009 11:07:59.968962 10, 0xFFFF, sum=0
3010 11:07:59.969075 11, 0xFFFF, sum=0
3011 11:07:59.972028 12, 0xFFFF, sum=0
3012 11:07:59.972130 13, 0xFFFF, sum=0
3013 11:07:59.975541 14, 0x0, sum=1
3014 11:07:59.975626 15, 0x0, sum=2
3015 11:07:59.978716 16, 0x0, sum=3
3016 11:07:59.978800 17, 0x0, sum=4
3017 11:07:59.982125 pattern=2 first_step=14 total pass=5 best_step=16
3018 11:07:59.982209 ==
3019 11:07:59.988866 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3020 11:07:59.992176 fsp= 1, odt_onoff= 1, Byte mode= 0
3021 11:07:59.992260 ==
3022 11:07:59.995639 Start DQ dly to find pass range UseTestEngine =1
3023 11:07:59.998709 x-axis: bit #, y-axis: DQ dly (-127~63)
3024 11:08:00.002058 RX Vref Scan = 1
3025 11:08:00.108335
3026 11:08:00.108448 RX Vref found, early break!
3027 11:08:00.108524
3028 11:08:00.115082 Final RX Vref 11, apply to both rank0 and 1
3029 11:08:00.115167 ==
3030 11:08:00.118332 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3031 11:08:00.122133 fsp= 1, odt_onoff= 1, Byte mode= 0
3032 11:08:00.122219 ==
3033 11:08:00.122285 DQS Delay:
3034 11:08:00.125479 DQS0 = 0, DQS1 = 0
3035 11:08:00.125564 DQM Delay:
3036 11:08:00.128594 DQM0 = 20, DQM1 = 19
3037 11:08:00.128677 DQ Delay:
3038 11:08:00.131706 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16
3039 11:08:00.134898 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =21
3040 11:08:00.138538 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3041 11:08:00.141674 DQ12 =22, DQ13 =21, DQ14 =23, DQ15 =13
3042 11:08:00.141761
3043 11:08:00.141825
3044 11:08:00.141883
3045 11:08:00.145442 [DramC_TX_OE_Calibration] TA2
3046 11:08:00.148396 Original DQ_B0 (3 6) =30, OEN = 27
3047 11:08:00.151993 Original DQ_B1 (3 6) =30, OEN = 27
3048 11:08:00.152077 23, 0x0, End_B0=23 End_B1=23
3049 11:08:00.155232 24, 0x0, End_B0=24 End_B1=24
3050 11:08:00.158649 25, 0x0, End_B0=25 End_B1=25
3051 11:08:00.162523 26, 0x0, End_B0=26 End_B1=26
3052 11:08:00.165493 27, 0x0, End_B0=27 End_B1=27
3053 11:08:00.165578 28, 0x0, End_B0=28 End_B1=28
3054 11:08:00.168989 29, 0x0, End_B0=29 End_B1=29
3055 11:08:00.172282 30, 0x0, End_B0=30 End_B1=30
3056 11:08:00.175196 31, 0xFFFF, End_B0=30 End_B1=30
3057 11:08:00.178765 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3058 11:08:00.185213 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3059 11:08:00.185297
3060 11:08:00.185362
3061 11:08:00.188664 Write Rank0 MR23 =0x3f
3062 11:08:00.188747 [DQSOSC]
3063 11:08:00.195747 [DQSOSCAuto] RK0, (LSB)MR18= 0xbdbd, (MSB)MR19= 0x202, tDQSOscB0 = 449 ps tDQSOscB1 = 449 ps
3064 11:08:00.202659 CH1_RK0: MR19=0x202, MR18=0xBDBD, DQSOSC=449, MR23=63, INC=12, DEC=18
3065 11:08:00.205421 Write Rank0 MR23 =0x3f
3066 11:08:00.205505 [DQSOSC]
3067 11:08:00.215686 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
3068 11:08:00.215771 CH1 RK0: MR19=202, MR18=C0C0
3069 11:08:00.219316 [RankSwap] Rank num 2, (Multi 1), Rank 1
3070 11:08:00.222185 Write Rank0 MR2 =0xad
3071 11:08:00.225465 [Write Leveling]
3072 11:08:00.225549 delay byte0 byte1 byte2 byte3
3073 11:08:00.225614
3074 11:08:00.229113 10 0 0
3075 11:08:00.229198 11 0 0
3076 11:08:00.232381 12 0 0
3077 11:08:00.232476 13 0 0
3078 11:08:00.235589 14 0 0
3079 11:08:00.235673 15 0 0
3080 11:08:00.235739 16 0 0
3081 11:08:00.239258 17 0 0
3082 11:08:00.239343 18 0 0
3083 11:08:00.242642 19 0 0
3084 11:08:00.242727 20 0 0
3085 11:08:00.242793 21 0 0
3086 11:08:00.245648 22 0 0
3087 11:08:00.245733 23 0 0
3088 11:08:00.248770 24 0 ff
3089 11:08:00.248855 25 0 ff
3090 11:08:00.252002 26 0 ff
3091 11:08:00.252087 27 0 ff
3092 11:08:00.252153 28 0 ff
3093 11:08:00.255712 29 0 ff
3094 11:08:00.255797 30 0 ff
3095 11:08:00.258832 31 0 ff
3096 11:08:00.258918 32 0 ff
3097 11:08:00.262205 33 0 ff
3098 11:08:00.262289 34 ff ff
3099 11:08:00.265697 35 ff ff
3100 11:08:00.265782 36 ff ff
3101 11:08:00.268883 37 ff ff
3102 11:08:00.268967 38 ff ff
3103 11:08:00.269033 39 ff ff
3104 11:08:00.272014 40 ff ff
3105 11:08:00.275364 pass bytecount = 0xff (0xff: all bytes pass)
3106 11:08:00.275447
3107 11:08:00.278645 DQS0 dly: 34
3108 11:08:00.278729 DQS1 dly: 24
3109 11:08:00.282028 Write Rank0 MR2 =0x2d
3110 11:08:00.285248 [RankSwap] Rank num 2, (Multi 1), Rank 0
3111 11:08:00.285333 Write Rank1 MR1 =0xd6
3112 11:08:00.289031 [Gating]
3113 11:08:00.289114 ==
3114 11:08:00.292169 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3115 11:08:00.295508 fsp= 1, odt_onoff= 1, Byte mode= 0
3116 11:08:00.295593 ==
3117 11:08:00.298770 3 1 0 |3535 2c2b |(0 0)(11 11) |(1 1)(1 1)| 0
3118 11:08:00.305350 3 1 4 |201 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3119 11:08:00.308417 3 1 8 |3535 2c2b |(0 0)(11 11) |(1 1)(0 0)| 0
3120 11:08:00.312082 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3121 11:08:00.318575 3 1 16 |3434 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3122 11:08:00.322164 3 1 20 |3433 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3123 11:08:00.325340 3 1 24 |3434 2c2b |(0 0)(11 11) |(0 1)(1 0)| 0
3124 11:08:00.329139 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3125 11:08:00.335064 3 2 0 |f0f 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3126 11:08:00.338367 3 2 4 |201 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3127 11:08:00.342052 3 2 8 |3e3d 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3128 11:08:00.348815 3 2 12 |3d3c 1615 |(11 11)(11 11) |(1 1)(0 0)| 0
3129 11:08:00.352055 3 2 16 |3d3d 201 |(11 11)(11 11) |(1 1)(0 0)| 0
3130 11:08:00.355289 3 2 20 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3131 11:08:00.361972 3 2 24 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3132 11:08:00.365296 3 2 28 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3133 11:08:00.368261 3 3 0 |3c3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3134 11:08:00.371884 3 3 4 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3135 11:08:00.378670 3 3 8 |504 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3136 11:08:00.381642 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3137 11:08:00.385209 [Byte 0] Lead/lag falling Transition (3, 3, 12)
3138 11:08:00.391630 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3139 11:08:00.395147 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3140 11:08:00.398385 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3141 11:08:00.405213 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3142 11:08:00.408378 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3143 11:08:00.411829 3 4 4 |3231 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3144 11:08:00.415264 3 4 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3145 11:08:00.422087 3 4 12 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
3146 11:08:00.425045 3 4 16 |3d3d 1f1e |(11 11)(11 11) |(1 1)(1 1)| 0
3147 11:08:00.428469 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3148 11:08:00.435229 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3149 11:08:00.438344 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3150 11:08:00.441654 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3151 11:08:00.448690 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3152 11:08:00.452094 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3153 11:08:00.455512 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3154 11:08:00.461961 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3155 11:08:00.465377 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3156 11:08:00.468411 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3157 11:08:00.471717 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3158 11:08:00.478393 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3159 11:08:00.481679 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3160 11:08:00.485003 [Byte 0] Lead/lag Transition tap number (3)
3161 11:08:00.491638 3 6 4 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3162 11:08:00.494943 [Byte 1] Lead/lag falling Transition (3, 6, 4)
3163 11:08:00.498855 3 6 8 |2626 3d3d |(1 1)(11 11) |(0 0)(1 0)| 0
3164 11:08:00.501833 [Byte 1] Lead/lag Transition tap number (2)
3165 11:08:00.505213 3 6 12 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3166 11:08:00.508435 [Byte 0]First pass (3, 6, 12)
3167 11:08:00.512080 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3168 11:08:00.518299 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3169 11:08:00.521367 [Byte 1]First pass (3, 6, 20)
3170 11:08:00.524607 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3171 11:08:00.527976 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3172 11:08:00.531219 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3173 11:08:00.534709 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3174 11:08:00.541523 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3175 11:08:00.544709 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3176 11:08:00.548010 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3177 11:08:00.551333 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3178 11:08:00.554552 All bytes gating window > 1UI, Early break!
3179 11:08:00.557900
3180 11:08:00.561145 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 30)
3181 11:08:00.561229
3182 11:08:00.564336 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
3183 11:08:00.564420
3184 11:08:00.564497
3185 11:08:00.564558
3186 11:08:00.567698 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
3187 11:08:00.567781
3188 11:08:00.571116 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
3189 11:08:00.571199
3190 11:08:00.571263
3191 11:08:00.574752 Write Rank1 MR1 =0x56
3192 11:08:00.574836
3193 11:08:00.578080 best RODT dly(2T, 0.5T) = (2, 2)
3194 11:08:00.578165
3195 11:08:00.580631 best RODT dly(2T, 0.5T) = (2, 3)
3196 11:08:00.580731 ==
3197 11:08:00.584090 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3198 11:08:00.587543 fsp= 1, odt_onoff= 1, Byte mode= 0
3199 11:08:00.587628 ==
3200 11:08:00.594226 Start DQ dly to find pass range UseTestEngine =0
3201 11:08:00.597432 x-axis: bit #, y-axis: DQ dly (-127~63)
3202 11:08:00.597515 RX Vref Scan = 0
3203 11:08:00.601071 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3204 11:08:00.604336 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3205 11:08:00.607700 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3206 11:08:00.610737 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3207 11:08:00.614216 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3208 11:08:00.617566 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3209 11:08:00.617652 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3210 11:08:00.620786 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3211 11:08:00.623945 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3212 11:08:00.627254 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3213 11:08:00.631074 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3214 11:08:00.633829 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3215 11:08:00.637684 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3216 11:08:00.641175 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3217 11:08:00.641291 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3218 11:08:00.644358 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3219 11:08:00.647539 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3220 11:08:00.650904 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3221 11:08:00.654242 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3222 11:08:00.657630 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3223 11:08:00.660631 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3224 11:08:00.664040 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3225 11:08:00.664144 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3226 11:08:00.667600 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3227 11:08:00.670798 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3228 11:08:00.674044 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3229 11:08:00.677272 0, [0] xxooxxxx ooxxxxxo [MSB]
3230 11:08:00.680510 1, [0] xxooxxxx ooxxxxxo [MSB]
3231 11:08:00.680596 2, [0] xxooxxxx ooxxxxxo [MSB]
3232 11:08:00.683895 3, [0] xxoooxxo oooxxxxo [MSB]
3233 11:08:00.687416 4, [0] oxoooxxo oooxoxxo [MSB]
3234 11:08:00.690415 5, [0] oooooxoo ooooooxo [MSB]
3235 11:08:00.694059 32, [0] oooooooo ooooooox [MSB]
3236 11:08:00.697130 33, [0] oooooooo ooooooox [MSB]
3237 11:08:00.700519 34, [0] oooooooo ooooooox [MSB]
3238 11:08:00.700604 35, [0] oooxoooo oxooooox [MSB]
3239 11:08:00.703706 36, [0] oooxoooo xxooooox [MSB]
3240 11:08:00.707135 37, [0] ooxxoooo xxooooox [MSB]
3241 11:08:00.710684 38, [0] ooxxoooo xxooooox [MSB]
3242 11:08:00.714039 39, [0] oxxxooox xxooooox [MSB]
3243 11:08:00.717091 40, [0] oxxxxoox xxxoooox [MSB]
3244 11:08:00.720330 41, [0] oxxxxoox xxxxxoox [MSB]
3245 11:08:00.720415 42, [0] xxxxxxxx xxxxxxxx [MSB]
3246 11:08:00.724192 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
3247 11:08:00.727335 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3248 11:08:00.734039 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3249 11:08:00.737113 iDelay=42, Bit 3, Center 16 (-1 ~ 34) 36
3250 11:08:00.740572 iDelay=42, Bit 4, Center 21 (3 ~ 39) 37
3251 11:08:00.743777 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
3252 11:08:00.747259 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3253 11:08:00.750772 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3254 11:08:00.753769 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
3255 11:08:00.757339 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3256 11:08:00.760628 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3257 11:08:00.763913 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3258 11:08:00.767216 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3259 11:08:00.770671 iDelay=42, Bit 13, Center 23 (5 ~ 41) 37
3260 11:08:00.773803 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
3261 11:08:00.780287 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3262 11:08:00.780371 ==
3263 11:08:00.784179 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3264 11:08:00.786914 fsp= 1, odt_onoff= 1, Byte mode= 0
3265 11:08:00.786999 ==
3266 11:08:00.790599 DQS Delay:
3267 11:08:00.790683 DQS0 = 0, DQS1 = 0
3268 11:08:00.790747 DQM Delay:
3269 11:08:00.793847 DQM0 = 20, DQM1 = 19
3270 11:08:00.793930 DQ Delay:
3271 11:08:00.796948 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3272 11:08:00.800749 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
3273 11:08:00.803586 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3274 11:08:00.806941 DQ12 =22, DQ13 =23, DQ14 =23, DQ15 =14
3275 11:08:00.807025
3276 11:08:00.807090
3277 11:08:00.810381 DramC Write-DBI off
3278 11:08:00.810464 ==
3279 11:08:00.813846 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3280 11:08:00.817009 fsp= 1, odt_onoff= 1, Byte mode= 0
3281 11:08:00.817092 ==
3282 11:08:00.823555 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3283 11:08:00.823642
3284 11:08:00.823707 Begin, DQ Scan Range 920~1176
3285 11:08:00.827043
3286 11:08:00.827125
3287 11:08:00.827189 TX Vref Scan disable
3288 11:08:00.830289 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
3289 11:08:00.833588 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3290 11:08:00.836851 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3291 11:08:00.840048 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3292 11:08:00.843548 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3293 11:08:00.850118 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3294 11:08:00.853357 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3295 11:08:00.856756 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3296 11:08:00.860073 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3297 11:08:00.863263 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3298 11:08:00.866645 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3299 11:08:00.870080 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3300 11:08:00.873488 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3301 11:08:00.876818 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3302 11:08:00.879855 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3303 11:08:00.883747 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3304 11:08:00.886824 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3305 11:08:00.890019 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3306 11:08:00.893287 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3307 11:08:00.896697 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3308 11:08:00.903159 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3309 11:08:00.906644 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3310 11:08:00.909954 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3311 11:08:00.913338 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3312 11:08:00.916625 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3313 11:08:00.919891 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3314 11:08:00.923363 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3315 11:08:00.926332 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3316 11:08:00.929959 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3317 11:08:00.932961 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3318 11:08:00.936747 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3319 11:08:00.939742 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3320 11:08:00.943134 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3321 11:08:00.946849 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3322 11:08:00.949951 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3323 11:08:00.953623 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3324 11:08:00.959639 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3325 11:08:00.963027 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3326 11:08:00.966324 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3327 11:08:00.970318 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3328 11:08:00.973514 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3329 11:08:00.976182 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3330 11:08:00.979518 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3331 11:08:00.982794 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3332 11:08:00.986147 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3333 11:08:00.990019 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3334 11:08:00.993171 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3335 11:08:00.996356 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3336 11:08:00.999677 968 |3 6 8|[0] xxxxxxxx oxxxxxxo [MSB]
3337 11:08:01.003031 969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]
3338 11:08:01.006188 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
3339 11:08:01.009953 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3340 11:08:01.013031 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3341 11:08:01.016220 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3342 11:08:01.020006 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3343 11:08:01.022758 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3344 11:08:01.030025 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3345 11:08:01.033115 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3346 11:08:01.036361 978 |3 6 18|[0] xxoooxox oooooooo [MSB]
3347 11:08:01.039701 979 |3 6 19|[0] ooooooox oooooooo [MSB]
3348 11:08:01.043111 985 |3 6 25|[0] oooooooo ooooooox [MSB]
3349 11:08:01.046334 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3350 11:08:01.049363 987 |3 6 27|[0] oooooooo ooooooox [MSB]
3351 11:08:01.052835 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
3352 11:08:01.056212 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
3353 11:08:01.059514 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3354 11:08:01.062510 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3355 11:08:01.069202 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3356 11:08:01.072852 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3357 11:08:01.076094 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3358 11:08:01.079735 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3359 11:08:01.082552 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3360 11:08:01.085874 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
3361 11:08:01.089095 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3362 11:08:01.092475 999 |3 6 39|[0] ooxxoooo xxxxxxxx [MSB]
3363 11:08:01.095737 1000 |3 6 40|[0] ooxxooox xxxxxxxx [MSB]
3364 11:08:01.099444 1001 |3 6 41|[0] oxxxxoxx xxxxxxxx [MSB]
3365 11:08:01.102918 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
3366 11:08:01.105949 Byte0, DQ PI dly=988, DQM PI dly= 988
3367 11:08:01.112515 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3368 11:08:01.112600
3369 11:08:01.115877 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3370 11:08:01.115965
3371 11:08:01.119305 Byte1, DQ PI dly=977, DQM PI dly= 977
3372 11:08:01.122443 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3373 11:08:01.122527
3374 11:08:01.129104 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3375 11:08:01.129188
3376 11:08:01.129253 ==
3377 11:08:01.132362 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3378 11:08:01.135752 fsp= 1, odt_onoff= 1, Byte mode= 0
3379 11:08:01.135835 ==
3380 11:08:01.142318 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3381 11:08:01.142402
3382 11:08:01.142468 Begin, DQ Scan Range 953~1017
3383 11:08:01.145923 Write Rank1 MR14 =0x0
3384 11:08:01.154599
3385 11:08:01.154682 CH=1, VrefRange= 0, VrefLevel = 0
3386 11:08:01.161185 TX Bit0 (983~998) 16 990, Bit8 (970~984) 15 977,
3387 11:08:01.164564 TX Bit1 (982~996) 15 989, Bit9 (971~984) 14 977,
3388 11:08:01.170947 TX Bit2 (979~993) 15 986, Bit10 (974~985) 12 979,
3389 11:08:01.174627 TX Bit3 (978~991) 14 984, Bit11 (975~986) 12 980,
3390 11:08:01.177754 TX Bit4 (981~995) 15 988, Bit12 (976~985) 10 980,
3391 11:08:01.184631 TX Bit5 (982~998) 17 990, Bit13 (975~987) 13 981,
3392 11:08:01.188027 TX Bit6 (982~997) 16 989, Bit14 (975~984) 10 979,
3393 11:08:01.190986 TX Bit7 (983~994) 12 988, Bit15 (968~978) 11 973,
3394 11:08:01.191070
3395 11:08:01.194761 Write Rank1 MR14 =0x2
3396 11:08:01.203960
3397 11:08:01.204044 CH=1, VrefRange= 0, VrefLevel = 2
3398 11:08:01.210637 TX Bit0 (982~998) 17 990, Bit8 (970~984) 15 977,
3399 11:08:01.213890 TX Bit1 (980~997) 18 988, Bit9 (970~984) 15 977,
3400 11:08:01.220575 TX Bit2 (979~994) 16 986, Bit10 (974~985) 12 979,
3401 11:08:01.224126 TX Bit3 (978~991) 14 984, Bit11 (975~987) 13 981,
3402 11:08:01.227206 TX Bit4 (980~996) 17 988, Bit12 (974~985) 12 979,
3403 11:08:01.233824 TX Bit5 (982~998) 17 990, Bit13 (974~988) 15 981,
3404 11:08:01.237109 TX Bit6 (981~997) 17 989, Bit14 (974~985) 12 979,
3405 11:08:01.240541 TX Bit7 (983~995) 13 989, Bit15 (968~979) 12 973,
3406 11:08:01.240625
3407 11:08:01.243641 Write Rank1 MR14 =0x4
3408 11:08:01.253302
3409 11:08:01.253385 CH=1, VrefRange= 0, VrefLevel = 4
3410 11:08:01.259919 TX Bit0 (982~999) 18 990, Bit8 (969~984) 16 976,
3411 11:08:01.263323 TX Bit1 (980~998) 19 989, Bit9 (970~984) 15 977,
3412 11:08:01.269594 TX Bit2 (979~995) 17 987, Bit10 (973~986) 14 979,
3413 11:08:01.273154 TX Bit3 (978~992) 15 985, Bit11 (974~987) 14 980,
3414 11:08:01.276390 TX Bit4 (980~997) 18 988, Bit12 (974~986) 13 980,
3415 11:08:01.283082 TX Bit5 (981~999) 19 990, Bit13 (974~989) 16 981,
3416 11:08:01.286359 TX Bit6 (981~998) 18 989, Bit14 (973~985) 13 979,
3417 11:08:01.289668 TX Bit7 (983~996) 14 989, Bit15 (968~979) 12 973,
3418 11:08:01.289752
3419 11:08:01.292939 Write Rank1 MR14 =0x6
3420 11:08:01.302521
3421 11:08:01.302603 CH=1, VrefRange= 0, VrefLevel = 6
3422 11:08:01.309385 TX Bit0 (981~999) 19 990, Bit8 (969~985) 17 977,
3423 11:08:01.312733 TX Bit1 (980~998) 19 989, Bit9 (970~984) 15 977,
3424 11:08:01.315719 TX Bit2 (978~996) 19 987, Bit10 (973~986) 14 979,
3425 11:08:01.322580 TX Bit3 (977~992) 16 984, Bit11 (973~988) 16 980,
3426 11:08:01.325829 TX Bit4 (980~998) 19 989, Bit12 (974~987) 14 980,
3427 11:08:01.332696 TX Bit5 (982~999) 18 990, Bit13 (973~989) 17 981,
3428 11:08:01.335605 TX Bit6 (980~998) 19 989, Bit14 (973~986) 14 979,
3429 11:08:01.338851 TX Bit7 (982~997) 16 989, Bit15 (968~980) 13 974,
3430 11:08:01.338935
3431 11:08:01.342143 Write Rank1 MR14 =0x8
3432 11:08:01.351978
3433 11:08:01.352062 CH=1, VrefRange= 0, VrefLevel = 8
3434 11:08:01.358515 TX Bit0 (981~1000) 20 990, Bit8 (969~985) 17 977,
3435 11:08:01.361515 TX Bit1 (979~998) 20 988, Bit9 (969~985) 17 977,
3436 11:08:01.368020 TX Bit2 (978~997) 20 987, Bit10 (972~987) 16 979,
3437 11:08:01.371890 TX Bit3 (977~993) 17 985, Bit11 (973~989) 17 981,
3438 11:08:01.375078 TX Bit4 (979~998) 20 988, Bit12 (973~988) 16 980,
3439 11:08:01.381950 TX Bit5 (981~1000) 20 990, Bit13 (973~990) 18 981,
3440 11:08:01.385264 TX Bit6 (979~999) 21 989, Bit14 (972~986) 15 979,
3441 11:08:01.388536 TX Bit7 (982~997) 16 989, Bit15 (967~982) 16 974,
3442 11:08:01.388621
3443 11:08:01.391883 Write Rank1 MR14 =0xa
3444 11:08:01.401336
3445 11:08:01.404892 CH=1, VrefRange= 0, VrefLevel = 10
3446 11:08:01.408275 TX Bit0 (981~1000) 20 990, Bit8 (969~986) 18 977,
3447 11:08:01.411192 TX Bit1 (979~999) 21 989, Bit9 (969~985) 17 977,
3448 11:08:01.417894 TX Bit2 (978~997) 20 987, Bit10 (971~988) 18 979,
3449 11:08:01.421658 TX Bit3 (977~993) 17 985, Bit11 (972~990) 19 981,
3450 11:08:01.424416 TX Bit4 (979~999) 21 989, Bit12 (972~988) 17 980,
3451 11:08:01.431483 TX Bit5 (981~1000) 20 990, Bit13 (972~991) 20 981,
3452 11:08:01.434711 TX Bit6 (980~999) 20 989, Bit14 (972~988) 17 980,
3453 11:08:01.440942 TX Bit7 (981~998) 18 989, Bit15 (967~983) 17 975,
3454 11:08:01.441026
3455 11:08:01.441091 Write Rank1 MR14 =0xc
3456 11:08:01.450884
3457 11:08:01.454223 CH=1, VrefRange= 0, VrefLevel = 12
3458 11:08:01.457549 TX Bit0 (980~1000) 21 990, Bit8 (969~986) 18 977,
3459 11:08:01.460922 TX Bit1 (979~999) 21 989, Bit9 (969~986) 18 977,
3460 11:08:01.467387 TX Bit2 (978~998) 21 988, Bit10 (971~988) 18 979,
3461 11:08:01.470832 TX Bit3 (977~994) 18 985, Bit11 (972~990) 19 981,
3462 11:08:01.474154 TX Bit4 (978~999) 22 988, Bit12 (972~989) 18 980,
3463 11:08:01.480961 TX Bit5 (980~1000) 21 990, Bit13 (972~991) 20 981,
3464 11:08:01.484303 TX Bit6 (979~999) 21 989, Bit14 (971~989) 19 980,
3465 11:08:01.490976 TX Bit7 (981~998) 18 989, Bit15 (967~983) 17 975,
3466 11:08:01.491062
3467 11:08:01.491127 Write Rank1 MR14 =0xe
3468 11:08:01.500804
3469 11:08:01.504332 CH=1, VrefRange= 0, VrefLevel = 14
3470 11:08:01.507515 TX Bit0 (980~1001) 22 990, Bit8 (969~986) 18 977,
3471 11:08:01.510942 TX Bit1 (978~999) 22 988, Bit9 (969~986) 18 977,
3472 11:08:01.517709 TX Bit2 (977~998) 22 987, Bit10 (971~990) 20 980,
3473 11:08:01.520555 TX Bit3 (977~995) 19 986, Bit11 (972~991) 20 981,
3474 11:08:01.524137 TX Bit4 (978~999) 22 988, Bit12 (972~990) 19 981,
3475 11:08:01.530540 TX Bit5 (979~1001) 23 990, Bit13 (972~991) 20 981,
3476 11:08:01.533752 TX Bit6 (979~1000) 22 989, Bit14 (972~990) 19 981,
3477 11:08:01.540393 TX Bit7 (980~999) 20 989, Bit15 (966~984) 19 975,
3478 11:08:01.540511
3479 11:08:01.540577 Write Rank1 MR14 =0x10
3480 11:08:01.550686
3481 11:08:01.553924 CH=1, VrefRange= 0, VrefLevel = 16
3482 11:08:01.557176 TX Bit0 (980~1001) 22 990, Bit8 (968~987) 20 977,
3483 11:08:01.560757 TX Bit1 (979~1000) 22 989, Bit9 (969~987) 19 978,
3484 11:08:01.567279 TX Bit2 (977~999) 23 988, Bit10 (970~990) 21 980,
3485 11:08:01.570676 TX Bit3 (976~996) 21 986, Bit11 (971~991) 21 981,
3486 11:08:01.573959 TX Bit4 (978~1000) 23 989, Bit12 (971~991) 21 981,
3487 11:08:01.580807 TX Bit5 (979~1001) 23 990, Bit13 (971~991) 21 981,
3488 11:08:01.583925 TX Bit6 (979~1000) 22 989, Bit14 (971~990) 20 980,
3489 11:08:01.590855 TX Bit7 (980~999) 20 989, Bit15 (966~984) 19 975,
3490 11:08:01.590939
3491 11:08:01.591004 Write Rank1 MR14 =0x12
3492 11:08:01.601552
3493 11:08:01.604637 CH=1, VrefRange= 0, VrefLevel = 18
3494 11:08:01.608000 TX Bit0 (979~1002) 24 990, Bit8 (968~987) 20 977,
3495 11:08:01.611324 TX Bit1 (978~1000) 23 989, Bit9 (969~987) 19 978,
3496 11:08:01.618170 TX Bit2 (977~999) 23 988, Bit10 (970~990) 21 980,
3497 11:08:01.621258 TX Bit3 (976~997) 22 986, Bit11 (971~991) 21 981,
3498 11:08:01.624792 TX Bit4 (978~1000) 23 989, Bit12 (971~991) 21 981,
3499 11:08:01.631183 TX Bit5 (979~1002) 24 990, Bit13 (971~992) 22 981,
3500 11:08:01.634869 TX Bit6 (979~1001) 23 990, Bit14 (970~990) 21 980,
3501 11:08:01.640974 TX Bit7 (979~1000) 22 989, Bit15 (966~984) 19 975,
3502 11:08:01.641058
3503 11:08:01.641123 Write Rank1 MR14 =0x14
3504 11:08:01.651929
3505 11:08:01.655017 CH=1, VrefRange= 0, VrefLevel = 20
3506 11:08:01.658883 TX Bit0 (979~1003) 25 991, Bit8 (968~989) 22 978,
3507 11:08:01.662014 TX Bit1 (978~1001) 24 989, Bit9 (968~988) 21 978,
3508 11:08:01.668944 TX Bit2 (977~999) 23 988, Bit10 (970~991) 22 980,
3509 11:08:01.672235 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3510 11:08:01.675067 TX Bit4 (978~1000) 23 989, Bit12 (971~991) 21 981,
3511 11:08:01.681634 TX Bit5 (979~1002) 24 990, Bit13 (971~992) 22 981,
3512 11:08:01.684966 TX Bit6 (978~1001) 24 989, Bit14 (970~991) 22 980,
3513 11:08:01.692078 TX Bit7 (979~1000) 22 989, Bit15 (966~985) 20 975,
3514 11:08:01.692194
3515 11:08:01.692300 Write Rank1 MR14 =0x16
3516 11:08:01.702299
3517 11:08:01.705601 CH=1, VrefRange= 0, VrefLevel = 22
3518 11:08:01.709282 TX Bit0 (979~1003) 25 991, Bit8 (968~989) 22 978,
3519 11:08:01.712426 TX Bit1 (978~1001) 24 989, Bit9 (968~989) 22 978,
3520 11:08:01.718959 TX Bit2 (977~999) 23 988, Bit10 (969~991) 23 980,
3521 11:08:01.722389 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3522 11:08:01.725548 TX Bit4 (978~1001) 24 989, Bit12 (970~992) 23 981,
3523 11:08:01.732282 TX Bit5 (978~1003) 26 990, Bit13 (970~992) 23 981,
3524 11:08:01.735475 TX Bit6 (978~1002) 25 990, Bit14 (970~991) 22 980,
3525 11:08:01.742127 TX Bit7 (978~1000) 23 989, Bit15 (965~985) 21 975,
3526 11:08:01.742213
3527 11:08:01.742278 Write Rank1 MR14 =0x18
3528 11:08:01.752754
3529 11:08:01.756830 CH=1, VrefRange= 0, VrefLevel = 24
3530 11:08:01.759520 TX Bit0 (978~1003) 26 990, Bit8 (968~990) 23 979,
3531 11:08:01.762865 TX Bit1 (978~1002) 25 990, Bit9 (969~990) 22 979,
3532 11:08:01.769703 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
3533 11:08:01.772868 TX Bit3 (975~998) 24 986, Bit11 (970~992) 23 981,
3534 11:08:01.776271 TX Bit4 (978~1001) 24 989, Bit12 (970~992) 23 981,
3535 11:08:01.782746 TX Bit5 (978~1003) 26 990, Bit13 (970~993) 24 981,
3536 11:08:01.786134 TX Bit6 (978~1002) 25 990, Bit14 (970~992) 23 981,
3537 11:08:01.792855 TX Bit7 (979~1001) 23 990, Bit15 (965~986) 22 975,
3538 11:08:01.792941
3539 11:08:01.793006 Write Rank1 MR14 =0x1a
3540 11:08:01.803763
3541 11:08:01.807156 CH=1, VrefRange= 0, VrefLevel = 26
3542 11:08:01.810414 TX Bit0 (978~1004) 27 991, Bit8 (967~991) 25 979,
3543 11:08:01.813635 TX Bit1 (978~1002) 25 990, Bit9 (967~990) 24 978,
3544 11:08:01.820556 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
3545 11:08:01.823736 TX Bit3 (975~998) 24 986, Bit11 (969~992) 24 980,
3546 11:08:01.827033 TX Bit4 (977~1002) 26 989, Bit12 (970~992) 23 981,
3547 11:08:01.833928 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3548 11:08:01.837385 TX Bit6 (978~1003) 26 990, Bit14 (970~992) 23 981,
3549 11:08:01.843671 TX Bit7 (978~1001) 24 989, Bit15 (964~986) 23 975,
3550 11:08:01.843756
3551 11:08:01.843821 Write Rank1 MR14 =0x1c
3552 11:08:01.854778
3553 11:08:01.857953 CH=1, VrefRange= 0, VrefLevel = 28
3554 11:08:01.861279 TX Bit0 (978~1004) 27 991, Bit8 (967~991) 25 979,
3555 11:08:01.864384 TX Bit1 (977~1003) 27 990, Bit9 (968~991) 24 979,
3556 11:08:01.871415 TX Bit2 (976~1000) 25 988, Bit10 (969~992) 24 980,
3557 11:08:01.874924 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3558 11:08:01.878038 TX Bit4 (977~1003) 27 990, Bit12 (970~992) 23 981,
3559 11:08:01.884944 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3560 11:08:01.887848 TX Bit6 (978~1003) 26 990, Bit14 (969~992) 24 980,
3561 11:08:01.894631 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3562 11:08:01.894716
3563 11:08:01.894781 Write Rank1 MR14 =0x1e
3564 11:08:01.905467
3565 11:08:01.908955 CH=1, VrefRange= 0, VrefLevel = 30
3566 11:08:01.912081 TX Bit0 (978~1005) 28 991, Bit8 (967~990) 24 978,
3567 11:08:01.915433 TX Bit1 (977~1003) 27 990, Bit9 (967~991) 25 979,
3568 11:08:01.922075 TX Bit2 (976~1001) 26 988, Bit10 (969~992) 24 980,
3569 11:08:01.925468 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3570 11:08:01.928673 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3571 11:08:01.935733 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3572 11:08:01.938788 TX Bit6 (977~1003) 27 990, Bit14 (969~992) 24 980,
3573 11:08:01.945570 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3574 11:08:01.945679
3575 11:08:01.945750 Write Rank1 MR14 =0x20
3576 11:08:01.956654
3577 11:08:01.959938 CH=1, VrefRange= 0, VrefLevel = 32
3578 11:08:01.963178 TX Bit0 (978~1005) 28 991, Bit8 (967~990) 24 978,
3579 11:08:01.966819 TX Bit1 (977~1003) 27 990, Bit9 (967~991) 25 979,
3580 11:08:01.973001 TX Bit2 (976~1001) 26 988, Bit10 (969~992) 24 980,
3581 11:08:01.976320 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3582 11:08:01.979568 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3583 11:08:01.986530 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3584 11:08:01.990165 TX Bit6 (977~1003) 27 990, Bit14 (969~992) 24 980,
3585 11:08:01.996424 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3586 11:08:01.996525
3587 11:08:01.996591 Write Rank1 MR14 =0x22
3588 11:08:02.007937
3589 11:08:02.011135 CH=1, VrefRange= 0, VrefLevel = 34
3590 11:08:02.014410 TX Bit0 (978~1005) 28 991, Bit8 (967~990) 24 978,
3591 11:08:02.017955 TX Bit1 (977~1003) 27 990, Bit9 (967~991) 25 979,
3592 11:08:02.024279 TX Bit2 (976~1001) 26 988, Bit10 (969~992) 24 980,
3593 11:08:02.027775 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3594 11:08:02.031053 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3595 11:08:02.037819 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3596 11:08:02.041185 TX Bit6 (977~1003) 27 990, Bit14 (969~992) 24 980,
3597 11:08:02.047723 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3598 11:08:02.047808
3599 11:08:02.047874 Write Rank1 MR14 =0x24
3600 11:08:02.058338
3601 11:08:02.061731 CH=1, VrefRange= 0, VrefLevel = 36
3602 11:08:02.064955 TX Bit0 (978~1005) 28 991, Bit8 (967~990) 24 978,
3603 11:08:02.068606 TX Bit1 (977~1003) 27 990, Bit9 (967~991) 25 979,
3604 11:08:02.075494 TX Bit2 (976~1001) 26 988, Bit10 (969~992) 24 980,
3605 11:08:02.078792 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3606 11:08:02.082266 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3607 11:08:02.089016 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3608 11:08:02.091940 TX Bit6 (977~1003) 27 990, Bit14 (969~992) 24 980,
3609 11:08:02.098379 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3610 11:08:02.098483
3611 11:08:02.098578 Write Rank1 MR14 =0x26
3612 11:08:02.109132
3613 11:08:02.112680 CH=1, VrefRange= 0, VrefLevel = 38
3614 11:08:02.116011 TX Bit0 (978~1005) 28 991, Bit8 (967~990) 24 978,
3615 11:08:02.119251 TX Bit1 (977~1003) 27 990, Bit9 (967~991) 25 979,
3616 11:08:02.125866 TX Bit2 (976~1001) 26 988, Bit10 (969~992) 24 980,
3617 11:08:02.129086 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3618 11:08:02.132539 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3619 11:08:02.139093 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3620 11:08:02.142423 TX Bit6 (977~1003) 27 990, Bit14 (969~992) 24 980,
3621 11:08:02.149292 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3622 11:08:02.149366
3623 11:08:02.149427
3624 11:08:02.152238 TX Vref found, early break! 376< 384
3625 11:08:02.156070 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3626 11:08:02.159437 u1DelayCellOfst[0]=5 cells (4 PI)
3627 11:08:02.162313 u1DelayCellOfst[1]=3 cells (3 PI)
3628 11:08:02.166027 u1DelayCellOfst[2]=1 cells (1 PI)
3629 11:08:02.169152 u1DelayCellOfst[3]=0 cells (0 PI)
3630 11:08:02.172471 u1DelayCellOfst[4]=3 cells (3 PI)
3631 11:08:02.175838 u1DelayCellOfst[5]=5 cells (4 PI)
3632 11:08:02.178774 u1DelayCellOfst[6]=3 cells (3 PI)
3633 11:08:02.178843 u1DelayCellOfst[7]=3 cells (3 PI)
3634 11:08:02.182128 Byte0, DQ PI dly=987, DQM PI dly= 989
3635 11:08:02.188833 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
3636 11:08:02.188920
3637 11:08:02.192251 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
3638 11:08:02.192330
3639 11:08:02.195451 u1DelayCellOfst[8]=3 cells (3 PI)
3640 11:08:02.199387 u1DelayCellOfst[9]=5 cells (4 PI)
3641 11:08:02.202460 u1DelayCellOfst[10]=6 cells (5 PI)
3642 11:08:02.205902 u1DelayCellOfst[11]=7 cells (6 PI)
3643 11:08:02.209353 u1DelayCellOfst[12]=7 cells (6 PI)
3644 11:08:02.212496 u1DelayCellOfst[13]=7 cells (6 PI)
3645 11:08:02.215806 u1DelayCellOfst[14]=6 cells (5 PI)
3646 11:08:02.219164 u1DelayCellOfst[15]=0 cells (0 PI)
3647 11:08:02.222396 Byte1, DQ PI dly=975, DQM PI dly= 978
3648 11:08:02.225537 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
3649 11:08:02.225621
3650 11:08:02.228884 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
3651 11:08:02.228968
3652 11:08:02.232295 Write Rank1 MR14 =0x1e
3653 11:08:02.232378
3654 11:08:02.235315 Final TX Range 0 Vref 30
3655 11:08:02.235403
3656 11:08:02.242193 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3657 11:08:02.242309
3658 11:08:02.249017 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3659 11:08:02.255560 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3660 11:08:02.262126 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3661 11:08:02.262211 Write Rank1 MR3 =0xb0
3662 11:08:02.265517 DramC Write-DBI on
3663 11:08:02.265600 ==
3664 11:08:02.272128 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3665 11:08:02.272212 fsp= 1, odt_onoff= 1, Byte mode= 0
3666 11:08:02.275204 ==
3667 11:08:02.278495 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3668 11:08:02.278579
3669 11:08:02.282446 Begin, DQ Scan Range 698~762
3670 11:08:02.282530
3671 11:08:02.282594
3672 11:08:02.282653 TX Vref Scan disable
3673 11:08:02.285096 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3674 11:08:02.288487 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3675 11:08:02.295379 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3676 11:08:02.298778 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3677 11:08:02.301745 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3678 11:08:02.305038 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3679 11:08:02.308509 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3680 11:08:02.312005 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3681 11:08:02.315039 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3682 11:08:02.318793 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3683 11:08:02.322023 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3684 11:08:02.325484 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3685 11:08:02.328707 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3686 11:08:02.331907 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3687 11:08:02.335074 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3688 11:08:02.338385 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3689 11:08:02.342158 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3690 11:08:02.344976 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3691 11:08:02.348314 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3692 11:08:02.351625 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3693 11:08:02.354877 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3694 11:08:02.358292 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3695 11:08:02.365415 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3696 11:08:02.368790 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3697 11:08:02.371972 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3698 11:08:02.375225 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3699 11:08:02.378663 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3700 11:08:02.384908 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3701 11:08:02.388416 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3702 11:08:02.391500 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3703 11:08:02.395308 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3704 11:08:02.398763 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3705 11:08:02.401603 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3706 11:08:02.405472 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3707 11:08:02.408611 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3708 11:08:02.411532 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3709 11:08:02.415279 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3710 11:08:02.418796 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3711 11:08:02.422104 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3712 11:08:02.425151 Byte0, DQ PI dly=735, DQM PI dly= 735
3713 11:08:02.431459 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
3714 11:08:02.431544
3715 11:08:02.435207 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
3716 11:08:02.435292
3717 11:08:02.438534 Byte1, DQ PI dly=723, DQM PI dly= 723
3718 11:08:02.441875 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3719 11:08:02.441960
3720 11:08:02.448447 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3721 11:08:02.448542
3722 11:08:02.455261 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3723 11:08:02.461641 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3724 11:08:02.468343 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3725 11:08:02.468463 Write Rank1 MR3 =0x30
3726 11:08:02.471576 DramC Write-DBI off
3727 11:08:02.471660
3728 11:08:02.471725 [DATLAT]
3729 11:08:02.474688 Freq=1600, CH1 RK1, use_rxtx_scan=0
3730 11:08:02.474772
3731 11:08:02.478262 DATLAT Default: 0x10
3732 11:08:02.478347 7, 0xFFFF, sum=0
3733 11:08:02.481427 8, 0xFFFF, sum=0
3734 11:08:02.481513 9, 0xFFFF, sum=0
3735 11:08:02.484591 10, 0xFFFF, sum=0
3736 11:08:02.484677 11, 0xFFFF, sum=0
3737 11:08:02.488317 12, 0xFFFF, sum=0
3738 11:08:02.488403 13, 0xFFFF, sum=0
3739 11:08:02.491653 14, 0x0, sum=1
3740 11:08:02.491738 15, 0x0, sum=2
3741 11:08:02.491804 16, 0x0, sum=3
3742 11:08:02.494963 17, 0x0, sum=4
3743 11:08:02.498147 pattern=2 first_step=14 total pass=5 best_step=16
3744 11:08:02.498231 ==
3745 11:08:02.504781 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3746 11:08:02.508064 fsp= 1, odt_onoff= 1, Byte mode= 0
3747 11:08:02.508147 ==
3748 11:08:02.511340 Start DQ dly to find pass range UseTestEngine =1
3749 11:08:02.514577 x-axis: bit #, y-axis: DQ dly (-127~63)
3750 11:08:02.517785 RX Vref Scan = 0
3751 11:08:02.521356 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3752 11:08:02.521442 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3753 11:08:02.524555 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3754 11:08:02.528122 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3755 11:08:02.531339 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3756 11:08:02.534633 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3757 11:08:02.537857 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3758 11:08:02.541234 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3759 11:08:02.544472 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3760 11:08:02.544559 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3761 11:08:02.547790 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3762 11:08:02.551184 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3763 11:08:02.554497 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3764 11:08:02.557892 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3765 11:08:02.561170 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3766 11:08:02.564413 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3767 11:08:02.568082 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3768 11:08:02.568167 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3769 11:08:02.571709 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3770 11:08:02.574543 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3771 11:08:02.577935 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3772 11:08:02.581174 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3773 11:08:02.584907 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3774 11:08:02.588118 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3775 11:08:02.588203 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3776 11:08:02.591274 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3777 11:08:02.594543 0, [0] xxooxxxx ooxxxxxo [MSB]
3778 11:08:02.597935 1, [0] xxooxxxx ooxxxxxo [MSB]
3779 11:08:02.601357 2, [0] xxooxxxx ooxxxxxo [MSB]
3780 11:08:02.604429 3, [0] oxooxxxo ooxxxxxo [MSB]
3781 11:08:02.604523 4, [0] oooooxxo ooooooxo [MSB]
3782 11:08:02.610023 32, [0] oooooooo ooooooox [MSB]
3783 11:08:02.613329 33, [0] oooooooo ooooooox [MSB]
3784 11:08:02.616561 34, [0] oooooooo ooooooox [MSB]
3785 11:08:02.620289 35, [0] oooxoooo oxooooox [MSB]
3786 11:08:02.623581 36, [0] oooxoooo xxooooox [MSB]
3787 11:08:02.626523 37, [0] ooxxoooo xxooooox [MSB]
3788 11:08:02.626609 38, [0] ooxxoooo xxooooox [MSB]
3789 11:08:02.629644 39, [0] ooxxooox xxxoooox [MSB]
3790 11:08:02.633156 40, [0] oxxxxoox xxxoooox [MSB]
3791 11:08:02.636340 41, [0] xxxxxxox xxxxxxxx [MSB]
3792 11:08:02.640029 42, [0] xxxxxxxx xxxxxxxx [MSB]
3793 11:08:02.643032 iDelay=42, Bit 0, Center 21 (3 ~ 40) 38
3794 11:08:02.646227 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
3795 11:08:02.649978 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3796 11:08:02.653303 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3797 11:08:02.656286 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3798 11:08:02.659989 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3799 11:08:02.663440 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3800 11:08:02.666412 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3801 11:08:02.669639 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
3802 11:08:02.676436 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3803 11:08:02.679726 iDelay=42, Bit 10, Center 21 (4 ~ 38) 35
3804 11:08:02.683171 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3805 11:08:02.686507 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3806 11:08:02.690159 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
3807 11:08:02.693237 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3808 11:08:02.696446 iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36
3809 11:08:02.696548 ==
3810 11:08:02.703195 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3811 11:08:02.706336 fsp= 1, odt_onoff= 1, Byte mode= 0
3812 11:08:02.706425 ==
3813 11:08:02.706491 DQS Delay:
3814 11:08:02.709724 DQS0 = 0, DQS1 = 0
3815 11:08:02.709807 DQM Delay:
3816 11:08:02.709873 DQM0 = 20, DQM1 = 19
3817 11:08:02.713203 DQ Delay:
3818 11:08:02.716336 DQ0 =21, DQ1 =21, DQ2 =18, DQ3 =16
3819 11:08:02.719870 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3820 11:08:02.723242 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3821 11:08:02.726459 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =13
3822 11:08:02.726544
3823 11:08:02.726609
3824 11:08:02.726670
3825 11:08:02.729690 [DramC_TX_OE_Calibration] TA2
3826 11:08:02.729778 Original DQ_B0 (3 6) =30, OEN = 27
3827 11:08:02.732927 Original DQ_B1 (3 6) =30, OEN = 27
3828 11:08:02.736610 23, 0x0, End_B0=23 End_B1=23
3829 11:08:02.739421 24, 0x0, End_B0=24 End_B1=24
3830 11:08:02.743254 25, 0x0, End_B0=25 End_B1=25
3831 11:08:02.746087 26, 0x0, End_B0=26 End_B1=26
3832 11:08:02.746175 27, 0x0, End_B0=27 End_B1=27
3833 11:08:02.749804 28, 0x0, End_B0=28 End_B1=28
3834 11:08:02.753100 29, 0x0, End_B0=29 End_B1=29
3835 11:08:02.756598 30, 0x0, End_B0=30 End_B1=30
3836 11:08:02.756687 31, 0xFFFF, End_B0=30 End_B1=30
3837 11:08:02.762947 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3838 11:08:02.769445 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3839 11:08:02.769533
3840 11:08:02.769620
3841 11:08:02.772804 Write Rank1 MR23 =0x3f
3842 11:08:02.772892 [DQSOSC]
3843 11:08:02.780049 [DQSOSCAuto] RK1, (LSB)MR18= 0xcfcf, (MSB)MR19= 0x202, tDQSOscB0 = 438 ps tDQSOscB1 = 438 ps
3844 11:08:02.786126 CH1_RK1: MR19=0x202, MR18=0xCFCF, DQSOSC=438, MR23=63, INC=12, DEC=19
3845 11:08:02.789502 Write Rank1 MR23 =0x3f
3846 11:08:02.789588 [DQSOSC]
3847 11:08:02.796288 [DQSOSCAuto] RK1, (LSB)MR18= 0xcccc, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
3848 11:08:02.799343 CH1 RK1: MR19=202, MR18=CCCC
3849 11:08:02.802796 [RxdqsGatingPostProcess] freq 1600
3850 11:08:02.809407 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3851 11:08:02.809494 Rank: 0
3852 11:08:02.812703 best DQS0 dly(2T, 0.5T) = (2, 6)
3853 11:08:02.815894 best DQS1 dly(2T, 0.5T) = (2, 6)
3854 11:08:02.819506 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3855 11:08:02.822708 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3856 11:08:02.822795 Rank: 1
3857 11:08:02.826001 best DQS0 dly(2T, 0.5T) = (2, 5)
3858 11:08:02.829248 best DQS1 dly(2T, 0.5T) = (2, 6)
3859 11:08:02.832756 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3860 11:08:02.836612 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3861 11:08:02.839303 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3862 11:08:02.842923 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3863 11:08:02.846145 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3864 11:08:02.849579
3865 11:08:02.849665
3866 11:08:02.853165 [Calibration Summary] Freqency 1600
3867 11:08:02.853252 CH 0, Rank 0
3868 11:08:02.853339 All Pass.
3869 11:08:02.853420
3870 11:08:02.856546 CH 0, Rank 1
3871 11:08:02.856634 All Pass.
3872 11:08:02.856720
3873 11:08:02.856800 CH 1, Rank 0
3874 11:08:02.859670 All Pass.
3875 11:08:02.859769
3876 11:08:02.859849 CH 1, Rank 1
3877 11:08:02.859927 All Pass.
3878 11:08:02.860023
3879 11:08:02.866496 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3880 11:08:02.873052 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3881 11:08:02.879547 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3882 11:08:02.882896 Write Rank0 MR3 =0xb0
3883 11:08:02.889713 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3884 11:08:02.896000 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3885 11:08:02.904868 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3886 11:08:02.906035 Write Rank1 MR3 =0xb0
3887 11:08:02.912911 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3888 11:08:02.919164 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3889 11:08:02.926193 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3890 11:08:02.929051 Write Rank0 MR3 =0xb0
3891 11:08:02.935897 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3892 11:08:02.942722 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3893 11:08:02.949208 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3894 11:08:02.949297 Write Rank1 MR3 =0xb0
3895 11:08:02.952643 DramC Write-DBI on
3896 11:08:02.956077 [GetDramInforAfterCalByMRR] Vendor 6.
3897 11:08:02.959152 [GetDramInforAfterCalByMRR] Revision 505.
3898 11:08:02.959239 MR8 1111
3899 11:08:02.966167 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3900 11:08:02.966255 MR8 1111
3901 11:08:02.969056 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3902 11:08:02.972583 MR8 1111
3903 11:08:02.975904 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3904 11:08:02.975992 MR8 1111
3905 11:08:02.982753 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3906 11:08:02.992605 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3907 11:08:02.992694 Write Rank0 MR13 =0xd0
3908 11:08:02.996000 Write Rank1 MR13 =0xd0
3909 11:08:02.996087 Write Rank0 MR13 =0xd0
3910 11:08:02.999138 Write Rank1 MR13 =0xd0
3911 11:08:03.002400 Save calibration result to emmc
3912 11:08:03.002487
3913 11:08:03.002574
3914 11:08:03.005601 [DramcModeReg_Check] Freq_1600, FSP_1
3915 11:08:03.005688 FSP_1, CH_0, RK0
3916 11:08:03.009010 Write Rank0 MR13 =0xd8
3917 11:08:03.012296 MR12 = 0x60 (global = 0x60) match
3918 11:08:03.015488 MR14 = 0x1e (global = 0x1e) match
3919 11:08:03.015576 FSP_1, CH_0, RK1
3920 11:08:03.019082 Write Rank1 MR13 =0xd8
3921 11:08:03.022668 MR12 = 0x5c (global = 0x5c) match
3922 11:08:03.025582 MR14 = 0x1e (global = 0x1e) match
3923 11:08:03.025669 FSP_1, CH_1, RK0
3924 11:08:03.028956 Write Rank0 MR13 =0xd8
3925 11:08:03.032247 MR12 = 0x60 (global = 0x60) match
3926 11:08:03.035578 MR14 = 0x1e (global = 0x1e) match
3927 11:08:03.035665 FSP_1, CH_1, RK1
3928 11:08:03.038882 Write Rank1 MR13 =0xd8
3929 11:08:03.042528 MR12 = 0x5c (global = 0x5c) match
3930 11:08:03.045729 MR14 = 0x1e (global = 0x1e) match
3931 11:08:03.045817
3932 11:08:03.048767 [MEM_TEST] 02: After DFS, before run time config
3933 11:08:03.061052 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3934 11:08:03.061147
3935 11:08:03.061234 [TA2_TEST]
3936 11:08:03.061326 === TA2 HW
3937 11:08:03.064290 TA2 PAT: XTALK
3938 11:08:03.067458 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3939 11:08:03.074047 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3940 11:08:03.077644 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3941 11:08:03.080906 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3942 11:08:03.084140
3943 11:08:03.084251
3944 11:08:03.084354 Settings after calibration
3945 11:08:03.084461
3946 11:08:03.087643 [DramcRunTimeConfig]
3947 11:08:03.091011 TransferPLLToSPMControl - MODE SW PHYPLL
3948 11:08:03.091099 TX_TRACKING: ON
3949 11:08:03.094042 RX_TRACKING: ON
3950 11:08:03.094129 HW_GATING: ON
3951 11:08:03.097632 HW_GATING DBG: OFF
3952 11:08:03.097719 ddr_geometry:1
3953 11:08:03.100988 ddr_geometry:1
3954 11:08:03.101075 ddr_geometry:1
3955 11:08:03.101161 ddr_geometry:1
3956 11:08:03.104075 ddr_geometry:1
3957 11:08:03.104162 ddr_geometry:1
3958 11:08:03.107468 ddr_geometry:1
3959 11:08:03.107554 ddr_geometry:1
3960 11:08:03.110674 High Freq DUMMY_READ_FOR_TRACKING: ON
3961 11:08:03.114243 ZQCS_ENABLE_LP4: OFF
3962 11:08:03.117374 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3963 11:08:03.120949 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3964 11:08:03.121036 SPM_CONTROL_AFTERK: ON
3965 11:08:03.124393 IMPEDANCE_TRACKING: ON
3966 11:08:03.124489 TEMP_SENSOR: ON
3967 11:08:03.127639 PER_BANK_REFRESH: ON
3968 11:08:03.127727 HW_SAVE_FOR_SR: ON
3969 11:08:03.131081 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3970 11:08:03.134418 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3971 11:08:03.137777 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3972 11:08:03.141085 Read ODT Tracking: ON
3973 11:08:03.144570 =========================
3974 11:08:03.144657
3975 11:08:03.144745 [TA2_TEST]
3976 11:08:03.144827 === TA2 HW
3977 11:08:03.150815 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3978 11:08:03.153947 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3979 11:08:03.160891 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3980 11:08:03.164172 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3981 11:08:03.164248
3982 11:08:03.167595 [MEM_TEST] 03: After run time config
3983 11:08:03.178989 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3984 11:08:03.182323 [complex_mem_test] start addr:0x40024000, len:131072
3985 11:08:03.386322 1st complex R/W mem test pass
3986 11:08:03.393028 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3987 11:08:03.396365 sync preloader write leveling
3988 11:08:03.399629 sync preloader cbt_mr12
3989 11:08:03.403002 sync preloader cbt_clk_dly
3990 11:08:03.403089 sync preloader cbt_cmd_dly
3991 11:08:03.406396 sync preloader cbt_cs
3992 11:08:03.409658 sync preloader cbt_ca_perbit_delay
3993 11:08:03.409746 sync preloader clk_delay
3994 11:08:03.412940 sync preloader dqs_delay
3995 11:08:03.416386 sync preloader u1Gating2T_Save
3996 11:08:03.419377 sync preloader u1Gating05T_Save
3997 11:08:03.422571 sync preloader u1Gatingfine_tune_Save
3998 11:08:03.426087 sync preloader u1Gatingucpass_count_Save
3999 11:08:03.429672 sync preloader u1TxWindowPerbitVref_Save
4000 11:08:03.432645 sync preloader u1TxCenter_min_Save
4001 11:08:03.436163 sync preloader u1TxCenter_max_Save
4002 11:08:03.439460 sync preloader u1Txwin_center_Save
4003 11:08:03.442788 sync preloader u1Txfirst_pass_Save
4004 11:08:03.446188 sync preloader u1Txlast_pass_Save
4005 11:08:03.449683 sync preloader u1RxDatlat_Save
4006 11:08:03.452865 sync preloader u1RxWinPerbitVref_Save
4007 11:08:03.456305 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4008 11:08:03.459177 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4009 11:08:03.462789 sync preloader delay_cell_unit
4010 11:08:03.469746 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4011 11:08:03.472445 sync preloader write leveling
4012 11:08:03.472540 sync preloader cbt_mr12
4013 11:08:03.476374 sync preloader cbt_clk_dly
4014 11:08:03.479855 sync preloader cbt_cmd_dly
4015 11:08:03.479941 sync preloader cbt_cs
4016 11:08:03.482496 sync preloader cbt_ca_perbit_delay
4017 11:08:03.486338 sync preloader clk_delay
4018 11:08:03.489155 sync preloader dqs_delay
4019 11:08:03.493000 sync preloader u1Gating2T_Save
4020 11:08:03.493087 sync preloader u1Gating05T_Save
4021 11:08:03.495729 sync preloader u1Gatingfine_tune_Save
4022 11:08:03.499474 sync preloader u1Gatingucpass_count_Save
4023 11:08:03.506226 sync preloader u1TxWindowPerbitVref_Save
4024 11:08:03.506314 sync preloader u1TxCenter_min_Save
4025 11:08:03.509601 sync preloader u1TxCenter_max_Save
4026 11:08:03.512900 sync preloader u1Txwin_center_Save
4027 11:08:03.515974 sync preloader u1Txfirst_pass_Save
4028 11:08:03.519215 sync preloader u1Txlast_pass_Save
4029 11:08:03.522394 sync preloader u1RxDatlat_Save
4030 11:08:03.525951 sync preloader u1RxWinPerbitVref_Save
4031 11:08:03.529056 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4032 11:08:03.536142 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4033 11:08:03.536230 sync preloader delay_cell_unit
4034 11:08:03.542457 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4035 11:08:03.545802 sync preloader write leveling
4036 11:08:03.549101 sync preloader cbt_mr12
4037 11:08:03.552588 sync preloader cbt_clk_dly
4038 11:08:03.552675 sync preloader cbt_cmd_dly
4039 11:08:03.555795 sync preloader cbt_cs
4040 11:08:03.559038 sync preloader cbt_ca_perbit_delay
4041 11:08:03.559127 sync preloader clk_delay
4042 11:08:03.562428 sync preloader dqs_delay
4043 11:08:03.565804 sync preloader u1Gating2T_Save
4044 11:08:03.568932 sync preloader u1Gating05T_Save
4045 11:08:03.572423 sync preloader u1Gatingfine_tune_Save
4046 11:08:03.575956 sync preloader u1Gatingucpass_count_Save
4047 11:08:03.579125 sync preloader u1TxWindowPerbitVref_Save
4048 11:08:03.582513 sync preloader u1TxCenter_min_Save
4049 11:08:03.585807 sync preloader u1TxCenter_max_Save
4050 11:08:03.589712 sync preloader u1Txwin_center_Save
4051 11:08:03.592158 sync preloader u1Txfirst_pass_Save
4052 11:08:03.595668 sync preloader u1Txlast_pass_Save
4053 11:08:03.595756 sync preloader u1RxDatlat_Save
4054 11:08:03.602487 sync preloader u1RxWinPerbitVref_Save
4055 11:08:03.605649 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4056 11:08:03.608894 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4057 11:08:03.612169 sync preloader delay_cell_unit
4058 11:08:03.615569 just_for_test_dump_coreboot_params dump all params
4059 11:08:03.618668 dump source = 0x0
4060 11:08:03.618757 dump params frequency:1600
4061 11:08:03.622576 dump params rank number:2
4062 11:08:03.622663
4063 11:08:03.625643 dump params write leveling
4064 11:08:03.628962 write leveling[0][0][0] = 0x21
4065 11:08:03.632141 write leveling[0][0][1] = 0x18
4066 11:08:03.632228 write leveling[0][1][0] = 0x19
4067 11:08:03.635291 write leveling[0][1][1] = 0x18
4068 11:08:03.638740 write leveling[1][0][0] = 0x22
4069 11:08:03.642088 write leveling[1][0][1] = 0x19
4070 11:08:03.645704 write leveling[1][1][0] = 0x22
4071 11:08:03.648639 write leveling[1][1][1] = 0x18
4072 11:08:03.648726 dump params cbt_cs
4073 11:08:03.652085 cbt_cs[0][0] = 0x8
4074 11:08:03.652173 cbt_cs[0][1] = 0x8
4075 11:08:03.655270 cbt_cs[1][0] = 0xb
4076 11:08:03.655357 cbt_cs[1][1] = 0xb
4077 11:08:03.659175 dump params cbt_mr12
4078 11:08:03.659263 cbt_mr12[0][0] = 0x20
4079 11:08:03.662325 cbt_mr12[0][1] = 0x1c
4080 11:08:03.662412 cbt_mr12[1][0] = 0x20
4081 11:08:03.665386 cbt_mr12[1][1] = 0x1c
4082 11:08:03.668762 dump params tx window
4083 11:08:03.668849 tx_center_min[0][0][0] = 982
4084 11:08:03.672013 tx_center_max[0][0][0] = 989
4085 11:08:03.675604 tx_center_min[0][0][1] = 975
4086 11:08:03.679146 tx_center_max[0][0][1] = 982
4087 11:08:03.682298 tx_center_min[0][1][0] = 978
4088 11:08:03.682385 tx_center_max[0][1][0] = 983
4089 11:08:03.685459 tx_center_min[0][1][1] = 978
4090 11:08:03.689335 tx_center_max[0][1][1] = 985
4091 11:08:03.692229 tx_center_min[1][0][0] = 989
4092 11:08:03.695263 tx_center_max[1][0][0] = 994
4093 11:08:03.695351 tx_center_min[1][0][1] = 978
4094 11:08:03.698923 tx_center_max[1][0][1] = 985
4095 11:08:03.702117 tx_center_min[1][1][0] = 987
4096 11:08:03.705853 tx_center_max[1][1][0] = 991
4097 11:08:03.705941 tx_center_min[1][1][1] = 975
4098 11:08:03.708779 tx_center_max[1][1][1] = 981
4099 11:08:03.712275 dump params tx window
4100 11:08:03.715513 tx_win_center[0][0][0] = 989
4101 11:08:03.715600 tx_first_pass[0][0][0] = 977
4102 11:08:03.718825 tx_last_pass[0][0][0] = 1001
4103 11:08:03.722257 tx_win_center[0][0][1] = 988
4104 11:08:03.725696 tx_first_pass[0][0][1] = 977
4105 11:08:03.728780 tx_last_pass[0][0][1] = 1000
4106 11:08:03.728866 tx_win_center[0][0][2] = 989
4107 11:08:03.732309 tx_first_pass[0][0][2] = 977
4108 11:08:03.735633 tx_last_pass[0][0][2] = 1001
4109 11:08:03.738515 tx_win_center[0][0][3] = 982
4110 11:08:03.741796 tx_first_pass[0][0][3] = 970
4111 11:08:03.741883 tx_last_pass[0][0][3] = 995
4112 11:08:03.745098 tx_win_center[0][0][4] = 988
4113 11:08:03.748357 tx_first_pass[0][0][4] = 976
4114 11:08:03.751585 tx_last_pass[0][0][4] = 1000
4115 11:08:03.755278 tx_win_center[0][0][5] = 985
4116 11:08:03.755366 tx_first_pass[0][0][5] = 974
4117 11:08:03.758675 tx_last_pass[0][0][5] = 997
4118 11:08:03.761679 tx_win_center[0][0][6] = 987
4119 11:08:03.764912 tx_first_pass[0][0][6] = 975
4120 11:08:03.765010 tx_last_pass[0][0][6] = 999
4121 11:08:03.768373 tx_win_center[0][0][7] = 988
4122 11:08:03.771595 tx_first_pass[0][0][7] = 976
4123 11:08:03.775068 tx_last_pass[0][0][7] = 1000
4124 11:08:03.778435 tx_win_center[0][0][8] = 975
4125 11:08:03.778523 tx_first_pass[0][0][8] = 964
4126 11:08:03.781770 tx_last_pass[0][0][8] = 987
4127 11:08:03.784876 tx_win_center[0][0][9] = 978
4128 11:08:03.788091 tx_first_pass[0][0][9] = 967
4129 11:08:03.788179 tx_last_pass[0][0][9] = 990
4130 11:08:03.791612 tx_win_center[0][0][10] = 982
4131 11:08:03.794805 tx_first_pass[0][0][10] = 970
4132 11:08:03.798173 tx_last_pass[0][0][10] = 994
4133 11:08:03.801704 tx_win_center[0][0][11] = 977
4134 11:08:03.804647 tx_first_pass[0][0][11] = 965
4135 11:08:03.804735 tx_last_pass[0][0][11] = 989
4136 11:08:03.808349 tx_win_center[0][0][12] = 979
4137 11:08:03.811073 tx_first_pass[0][0][12] = 967
4138 11:08:03.814815 tx_last_pass[0][0][12] = 991
4139 11:08:03.817905 tx_win_center[0][0][13] = 978
4140 11:08:03.817993 tx_first_pass[0][0][13] = 966
4141 11:08:03.821410 tx_last_pass[0][0][13] = 990
4142 11:08:03.824500 tx_win_center[0][0][14] = 979
4143 11:08:03.827842 tx_first_pass[0][0][14] = 967
4144 11:08:03.831090 tx_last_pass[0][0][14] = 991
4145 11:08:03.831177 tx_win_center[0][0][15] = 980
4146 11:08:03.835104 tx_first_pass[0][0][15] = 968
4147 11:08:03.838127 tx_last_pass[0][0][15] = 993
4148 11:08:03.841270 tx_win_center[0][1][0] = 983
4149 11:08:03.841358 tx_first_pass[0][1][0] = 971
4150 11:08:03.845018 tx_last_pass[0][1][0] = 996
4151 11:08:03.848213 tx_win_center[0][1][1] = 982
4152 11:08:03.851664 tx_first_pass[0][1][1] = 970
4153 11:08:03.855034 tx_last_pass[0][1][1] = 994
4154 11:08:03.855122 tx_win_center[0][1][2] = 983
4155 11:08:03.857761 tx_first_pass[0][1][2] = 972
4156 11:08:03.861008 tx_last_pass[0][1][2] = 995
4157 11:08:03.864783 tx_win_center[0][1][3] = 978
4158 11:08:03.868062 tx_first_pass[0][1][3] = 966
4159 11:08:03.868149 tx_last_pass[0][1][3] = 990
4160 11:08:03.870989 tx_win_center[0][1][4] = 981
4161 11:08:03.874519 tx_first_pass[0][1][4] = 969
4162 11:08:03.877829 tx_last_pass[0][1][4] = 994
4163 11:08:03.877918 tx_win_center[0][1][5] = 980
4164 11:08:03.881075 tx_first_pass[0][1][5] = 968
4165 11:08:03.884447 tx_last_pass[0][1][5] = 992
4166 11:08:03.887697 tx_win_center[0][1][6] = 981
4167 11:08:03.890914 tx_first_pass[0][1][6] = 969
4168 11:08:03.891015 tx_last_pass[0][1][6] = 993
4169 11:08:03.894560 tx_win_center[0][1][7] = 981
4170 11:08:03.897685 tx_first_pass[0][1][7] = 969
4171 11:08:03.901039 tx_last_pass[0][1][7] = 994
4172 11:08:03.901140 tx_win_center[0][1][8] = 978
4173 11:08:03.904360 tx_first_pass[0][1][8] = 966
4174 11:08:03.907974 tx_last_pass[0][1][8] = 990
4175 11:08:03.911294 tx_win_center[0][1][9] = 979
4176 11:08:03.911395 tx_first_pass[0][1][9] = 968
4177 11:08:03.914577 tx_last_pass[0][1][9] = 991
4178 11:08:03.918046 tx_win_center[0][1][10] = 985
4179 11:08:03.920999 tx_first_pass[0][1][10] = 972
4180 11:08:03.924287 tx_last_pass[0][1][10] = 998
4181 11:08:03.924388 tx_win_center[0][1][11] = 978
4182 11:08:03.927650 tx_first_pass[0][1][11] = 967
4183 11:08:03.931219 tx_last_pass[0][1][11] = 990
4184 11:08:03.934596 tx_win_center[0][1][12] = 980
4185 11:08:03.937979 tx_first_pass[0][1][12] = 968
4186 11:08:03.938081 tx_last_pass[0][1][12] = 992
4187 11:08:03.941077 tx_win_center[0][1][13] = 980
4188 11:08:03.944449 tx_first_pass[0][1][13] = 969
4189 11:08:03.947581 tx_last_pass[0][1][13] = 991
4190 11:08:03.951188 tx_win_center[0][1][14] = 980
4191 11:08:03.954571 tx_first_pass[0][1][14] = 968
4192 11:08:03.954676 tx_last_pass[0][1][14] = 993
4193 11:08:03.957857 tx_win_center[0][1][15] = 983
4194 11:08:03.961057 tx_first_pass[0][1][15] = 971
4195 11:08:03.964517 tx_last_pass[0][1][15] = 996
4196 11:08:03.967759 tx_win_center[1][0][0] = 993
4197 11:08:03.967856 tx_first_pass[1][0][0] = 980
4198 11:08:03.971033 tx_last_pass[1][0][0] = 1007
4199 11:08:03.974317 tx_win_center[1][0][1] = 992
4200 11:08:03.977490 tx_first_pass[1][0][1] = 979
4201 11:08:03.977591 tx_last_pass[1][0][1] = 1005
4202 11:08:03.980844 tx_win_center[1][0][2] = 990
4203 11:08:03.983929 tx_first_pass[1][0][2] = 978
4204 11:08:03.987694 tx_last_pass[1][0][2] = 1003
4205 11:08:03.990714 tx_win_center[1][0][3] = 989
4206 11:08:03.990819 tx_first_pass[1][0][3] = 977
4207 11:08:03.994072 tx_last_pass[1][0][3] = 1001
4208 11:08:03.997632 tx_win_center[1][0][4] = 992
4209 11:08:04.000586 tx_first_pass[1][0][4] = 980
4210 11:08:04.003846 tx_last_pass[1][0][4] = 1005
4211 11:08:04.003946 tx_win_center[1][0][5] = 994
4212 11:08:04.007393 tx_first_pass[1][0][5] = 981
4213 11:08:04.011011 tx_last_pass[1][0][5] = 1007
4214 11:08:04.014079 tx_win_center[1][0][6] = 992
4215 11:08:04.017451 tx_first_pass[1][0][6] = 979
4216 11:08:04.017538 tx_last_pass[1][0][6] = 1006
4217 11:08:04.020792 tx_win_center[1][0][7] = 992
4218 11:08:04.024048 tx_first_pass[1][0][7] = 979
4219 11:08:04.027317 tx_last_pass[1][0][7] = 1006
4220 11:08:04.027404 tx_win_center[1][0][8] = 981
4221 11:08:04.030726 tx_first_pass[1][0][8] = 969
4222 11:08:04.034176 tx_last_pass[1][0][8] = 993
4223 11:08:04.037012 tx_win_center[1][0][9] = 980
4224 11:08:04.040690 tx_first_pass[1][0][9] = 969
4225 11:08:04.040778 tx_last_pass[1][0][9] = 992
4226 11:08:04.043932 tx_win_center[1][0][10] = 983
4227 11:08:04.047187 tx_first_pass[1][0][10] = 971
4228 11:08:04.050328 tx_last_pass[1][0][10] = 995
4229 11:08:04.053792 tx_win_center[1][0][11] = 983
4230 11:08:04.053880 tx_first_pass[1][0][11] = 971
4231 11:08:04.057369 tx_last_pass[1][0][11] = 996
4232 11:08:04.060669 tx_win_center[1][0][12] = 984
4233 11:08:04.064128 tx_first_pass[1][0][12] = 972
4234 11:08:04.067009 tx_last_pass[1][0][12] = 996
4235 11:08:04.067096 tx_win_center[1][0][13] = 985
4236 11:08:04.070728 tx_first_pass[1][0][13] = 974
4237 11:08:04.074182 tx_last_pass[1][0][13] = 996
4238 11:08:04.077206 tx_win_center[1][0][14] = 983
4239 11:08:04.080503 tx_first_pass[1][0][14] = 972
4240 11:08:04.080591 tx_last_pass[1][0][14] = 995
4241 11:08:04.083748 tx_win_center[1][0][15] = 978
4242 11:08:04.086814 tx_first_pass[1][0][15] = 967
4243 11:08:04.090579 tx_last_pass[1][0][15] = 990
4244 11:08:04.093778 tx_win_center[1][1][0] = 991
4245 11:08:04.093866 tx_first_pass[1][1][0] = 978
4246 11:08:04.096993 tx_last_pass[1][1][0] = 1005
4247 11:08:04.100467 tx_win_center[1][1][1] = 990
4248 11:08:04.103680 tx_first_pass[1][1][1] = 977
4249 11:08:04.106827 tx_last_pass[1][1][1] = 1003
4250 11:08:04.106914 tx_win_center[1][1][2] = 988
4251 11:08:04.110027 tx_first_pass[1][1][2] = 976
4252 11:08:04.113420 tx_last_pass[1][1][2] = 1001
4253 11:08:04.116947 tx_win_center[1][1][3] = 987
4254 11:08:04.120225 tx_first_pass[1][1][3] = 975
4255 11:08:04.120312 tx_last_pass[1][1][3] = 999
4256 11:08:04.123494 tx_win_center[1][1][4] = 990
4257 11:08:04.126833 tx_first_pass[1][1][4] = 978
4258 11:08:04.130188 tx_last_pass[1][1][4] = 1003
4259 11:08:04.130275 tx_win_center[1][1][5] = 991
4260 11:08:04.133427 tx_first_pass[1][1][5] = 978
4261 11:08:04.136666 tx_last_pass[1][1][5] = 1004
4262 11:08:04.140024 tx_win_center[1][1][6] = 990
4263 11:08:04.143830 tx_first_pass[1][1][6] = 977
4264 11:08:04.143917 tx_last_pass[1][1][6] = 1003
4265 11:08:04.146693 tx_win_center[1][1][7] = 990
4266 11:08:04.150542 tx_first_pass[1][1][7] = 978
4267 11:08:04.153625 tx_last_pass[1][1][7] = 1002
4268 11:08:04.153712 tx_win_center[1][1][8] = 978
4269 11:08:04.156607 tx_first_pass[1][1][8] = 967
4270 11:08:04.159938 tx_last_pass[1][1][8] = 990
4271 11:08:04.163231 tx_win_center[1][1][9] = 979
4272 11:08:04.167119 tx_first_pass[1][1][9] = 967
4273 11:08:04.167206 tx_last_pass[1][1][9] = 991
4274 11:08:04.170079 tx_win_center[1][1][10] = 980
4275 11:08:04.173701 tx_first_pass[1][1][10] = 969
4276 11:08:04.176778 tx_last_pass[1][1][10] = 992
4277 11:08:04.180027 tx_win_center[1][1][11] = 981
4278 11:08:04.180138 tx_first_pass[1][1][11] = 969
4279 11:08:04.183647 tx_last_pass[1][1][11] = 993
4280 11:08:04.186644 tx_win_center[1][1][12] = 981
4281 11:08:04.190156 tx_first_pass[1][1][12] = 970
4282 11:08:04.193500 tx_last_pass[1][1][12] = 993
4283 11:08:04.193584 tx_win_center[1][1][13] = 981
4284 11:08:04.196802 tx_first_pass[1][1][13] = 970
4285 11:08:04.199999 tx_last_pass[1][1][13] = 993
4286 11:08:04.203471 tx_win_center[1][1][14] = 980
4287 11:08:04.207249 tx_first_pass[1][1][14] = 969
4288 11:08:04.207323 tx_last_pass[1][1][14] = 992
4289 11:08:04.209991 tx_win_center[1][1][15] = 975
4290 11:08:04.213190 tx_first_pass[1][1][15] = 964
4291 11:08:04.216644 tx_last_pass[1][1][15] = 987
4292 11:08:04.216746 dump params rx window
4293 11:08:04.219946 rx_firspass[0][0][0] = 5
4294 11:08:04.222934 rx_lastpass[0][0][0] = 38
4295 11:08:04.223034 rx_firspass[0][0][1] = 5
4296 11:08:04.226841 rx_lastpass[0][0][1] = 36
4297 11:08:04.229564 rx_firspass[0][0][2] = 6
4298 11:08:04.232969 rx_lastpass[0][0][2] = 36
4299 11:08:04.233068 rx_firspass[0][0][3] = -2
4300 11:08:04.236356 rx_lastpass[0][0][3] = 31
4301 11:08:04.239616 rx_firspass[0][0][4] = 5
4302 11:08:04.239700 rx_lastpass[0][0][4] = 36
4303 11:08:04.242977 rx_firspass[0][0][5] = 1
4304 11:08:04.246242 rx_lastpass[0][0][5] = 32
4305 11:08:04.249790 rx_firspass[0][0][6] = 3
4306 11:08:04.249874 rx_lastpass[0][0][6] = 33
4307 11:08:04.252874 rx_firspass[0][0][7] = 5
4308 11:08:04.256305 rx_lastpass[0][0][7] = 36
4309 11:08:04.256388 rx_firspass[0][0][8] = -3
4310 11:08:04.259503 rx_lastpass[0][0][8] = 33
4311 11:08:04.263093 rx_firspass[0][0][9] = 0
4312 11:08:04.263176 rx_lastpass[0][0][9] = 32
4313 11:08:04.266284 rx_firspass[0][0][10] = 8
4314 11:08:04.270072 rx_lastpass[0][0][10] = 41
4315 11:08:04.273241 rx_firspass[0][0][11] = 1
4316 11:08:04.273325 rx_lastpass[0][0][11] = 32
4317 11:08:04.276671 rx_firspass[0][0][12] = 2
4318 11:08:04.279881 rx_lastpass[0][0][12] = 36
4319 11:08:04.282824 rx_firspass[0][0][13] = 3
4320 11:08:04.282908 rx_lastpass[0][0][13] = 33
4321 11:08:04.286092 rx_firspass[0][0][14] = 2
4322 11:08:04.289398 rx_lastpass[0][0][14] = 37
4323 11:08:04.289481 rx_firspass[0][0][15] = 5
4324 11:08:04.293114 rx_lastpass[0][0][15] = 37
4325 11:08:04.296650 rx_firspass[0][1][0] = 6
4326 11:08:04.299877 rx_lastpass[0][1][0] = 40
4327 11:08:04.299960 rx_firspass[0][1][1] = 5
4328 11:08:04.302694 rx_lastpass[0][1][1] = 38
4329 11:08:04.306043 rx_firspass[0][1][2] = 6
4330 11:08:04.306126 rx_lastpass[0][1][2] = 38
4331 11:08:04.309577 rx_firspass[0][1][3] = -2
4332 11:08:04.313108 rx_lastpass[0][1][3] = 34
4333 11:08:04.313192 rx_firspass[0][1][4] = 5
4334 11:08:04.316448 rx_lastpass[0][1][4] = 38
4335 11:08:04.319724 rx_firspass[0][1][5] = 1
4336 11:08:04.322974 rx_lastpass[0][1][5] = 34
4337 11:08:04.323058 rx_firspass[0][1][6] = 3
4338 11:08:04.326226 rx_lastpass[0][1][6] = 37
4339 11:08:04.329543 rx_firspass[0][1][7] = 3
4340 11:08:04.329629 rx_lastpass[0][1][7] = 38
4341 11:08:04.332921 rx_firspass[0][1][8] = -3
4342 11:08:04.335991 rx_lastpass[0][1][8] = 32
4343 11:08:04.339386 rx_firspass[0][1][9] = 1
4344 11:08:04.339473 rx_lastpass[0][1][9] = 36
4345 11:08:04.342698 rx_firspass[0][1][10] = 7
4346 11:08:04.345933 rx_lastpass[0][1][10] = 43
4347 11:08:04.346021 rx_firspass[0][1][11] = -2
4348 11:08:04.349327 rx_lastpass[0][1][11] = 34
4349 11:08:04.352556 rx_firspass[0][1][12] = 1
4350 11:08:04.355807 rx_lastpass[0][1][12] = 37
4351 11:08:04.355895 rx_firspass[0][1][13] = 2
4352 11:08:04.359156 rx_lastpass[0][1][13] = 34
4353 11:08:04.362533 rx_firspass[0][1][14] = 2
4354 11:08:04.366100 rx_lastpass[0][1][14] = 38
4355 11:08:04.366180 rx_firspass[0][1][15] = 6
4356 11:08:04.368919 rx_lastpass[0][1][15] = 39
4357 11:08:04.372423 rx_firspass[1][0][0] = 5
4358 11:08:04.372514 rx_lastpass[1][0][0] = 39
4359 11:08:04.375760 rx_firspass[1][0][1] = 4
4360 11:08:04.378978 rx_lastpass[1][0][1] = 38
4361 11:08:04.382346 rx_firspass[1][0][2] = 2
4362 11:08:04.382429 rx_lastpass[1][0][2] = 36
4363 11:08:04.385874 rx_firspass[1][0][3] = -1
4364 11:08:04.389184 rx_lastpass[1][0][3] = 33
4365 11:08:04.389268 rx_firspass[1][0][4] = 5
4366 11:08:04.392331 rx_lastpass[1][0][4] = 38
4367 11:08:04.395733 rx_firspass[1][0][5] = 7
4368 11:08:04.395816 rx_lastpass[1][0][5] = 39
4369 11:08:04.399190 rx_firspass[1][0][6] = 6
4370 11:08:04.402366 rx_lastpass[1][0][6] = 40
4371 11:08:04.405839 rx_firspass[1][0][7] = 4
4372 11:08:04.405923 rx_lastpass[1][0][7] = 38
4373 11:08:04.409346 rx_firspass[1][0][8] = 1
4374 11:08:04.412323 rx_lastpass[1][0][8] = 33
4375 11:08:04.412407 rx_firspass[1][0][9] = 0
4376 11:08:04.415855 rx_lastpass[1][0][9] = 32
4377 11:08:04.419167 rx_firspass[1][0][10] = 5
4378 11:08:04.419277 rx_lastpass[1][0][10] = 35
4379 11:08:04.422527 rx_firspass[1][0][11] = 5
4380 11:08:04.425972 rx_lastpass[1][0][11] = 38
4381 11:08:04.429346 rx_firspass[1][0][12] = 6
4382 11:08:04.429430 rx_lastpass[1][0][12] = 38
4383 11:08:04.432195 rx_firspass[1][0][13] = 6
4384 11:08:04.435765 rx_lastpass[1][0][13] = 37
4385 11:08:04.439027 rx_firspass[1][0][14] = 6
4386 11:08:04.439111 rx_lastpass[1][0][14] = 38
4387 11:08:04.442283 rx_firspass[1][0][15] = -4
4388 11:08:04.445620 rx_lastpass[1][0][15] = 30
4389 11:08:04.445704 rx_firspass[1][1][0] = 3
4390 11:08:04.448866 rx_lastpass[1][1][0] = 40
4391 11:08:04.452158 rx_firspass[1][1][1] = 4
4392 11:08:04.455960 rx_lastpass[1][1][1] = 39
4393 11:08:04.456042 rx_firspass[1][1][2] = 0
4394 11:08:04.459232 rx_lastpass[1][1][2] = 36
4395 11:08:04.462270 rx_firspass[1][1][3] = -2
4396 11:08:04.462354 rx_lastpass[1][1][3] = 34
4397 11:08:04.465286 rx_firspass[1][1][4] = 4
4398 11:08:04.469158 rx_lastpass[1][1][4] = 39
4399 11:08:04.472192 rx_firspass[1][1][5] = 5
4400 11:08:04.472275 rx_lastpass[1][1][5] = 40
4401 11:08:04.475434 rx_firspass[1][1][6] = 5
4402 11:08:04.478766 rx_lastpass[1][1][6] = 41
4403 11:08:04.478849 rx_firspass[1][1][7] = 3
4404 11:08:04.482295 rx_lastpass[1][1][7] = 38
4405 11:08:04.485494 rx_firspass[1][1][8] = 0
4406 11:08:04.485577 rx_lastpass[1][1][8] = 35
4407 11:08:04.489028 rx_firspass[1][1][9] = -1
4408 11:08:04.492126 rx_lastpass[1][1][9] = 34
4409 11:08:04.495582 rx_firspass[1][1][10] = 4
4410 11:08:04.495665 rx_lastpass[1][1][10] = 38
4411 11:08:04.498788 rx_firspass[1][1][11] = 4
4412 11:08:04.501805 rx_lastpass[1][1][11] = 40
4413 11:08:04.501890 rx_firspass[1][1][12] = 4
4414 11:08:04.505398 rx_lastpass[1][1][12] = 40
4415 11:08:04.508948 rx_firspass[1][1][13] = 4
4416 11:08:04.512038 rx_lastpass[1][1][13] = 40
4417 11:08:04.512128 rx_firspass[1][1][14] = 5
4418 11:08:04.515226 rx_lastpass[1][1][14] = 40
4419 11:08:04.518560 rx_firspass[1][1][15] = -4
4420 11:08:04.522002 rx_lastpass[1][1][15] = 31
4421 11:08:04.522093 dump params clk_delay
4422 11:08:04.525135 clk_delay[0] = 1
4423 11:08:04.525224 clk_delay[1] = 0
4424 11:08:04.528700 dump params dqs_delay
4425 11:08:04.528791 dqs_delay[0][0] = -2
4426 11:08:04.531706 dqs_delay[0][1] = 0
4427 11:08:04.531796 dqs_delay[1][0] = 0
4428 11:08:04.535230 dqs_delay[1][1] = 0
4429 11:08:04.538353 dump params delay_cell_unit = 735
4430 11:08:04.538449 dump source = 0x0
4431 11:08:04.542058 dump params frequency:1200
4432 11:08:04.545378 dump params rank number:2
4433 11:08:04.545475
4434 11:08:04.548437 dump params write leveling
4435 11:08:04.548547 write leveling[0][0][0] = 0x0
4436 11:08:04.551605 write leveling[0][0][1] = 0x0
4437 11:08:04.555417 write leveling[0][1][0] = 0x0
4438 11:08:04.558410 write leveling[0][1][1] = 0x0
4439 11:08:04.561759 write leveling[1][0][0] = 0x0
4440 11:08:04.561857 write leveling[1][0][1] = 0x0
4441 11:08:04.565235 write leveling[1][1][0] = 0x0
4442 11:08:04.568548 write leveling[1][1][1] = 0x0
4443 11:08:04.571693 dump params cbt_cs
4444 11:08:04.571769 cbt_cs[0][0] = 0x0
4445 11:08:04.575576 cbt_cs[0][1] = 0x0
4446 11:08:04.575644 cbt_cs[1][0] = 0x0
4447 11:08:04.578606 cbt_cs[1][1] = 0x0
4448 11:08:04.578689 dump params cbt_mr12
4449 11:08:04.582103 cbt_mr12[0][0] = 0x0
4450 11:08:04.582188 cbt_mr12[0][1] = 0x0
4451 11:08:04.585346 cbt_mr12[1][0] = 0x0
4452 11:08:04.585430 cbt_mr12[1][1] = 0x0
4453 11:08:04.588398 dump params tx window
4454 11:08:04.591795 tx_center_min[0][0][0] = 0
4455 11:08:04.595166 tx_center_max[0][0][0] = 0
4456 11:08:04.595256 tx_center_min[0][0][1] = 0
4457 11:08:04.598375 tx_center_max[0][0][1] = 0
4458 11:08:04.601703 tx_center_min[0][1][0] = 0
4459 11:08:04.601811 tx_center_max[0][1][0] = 0
4460 11:08:04.604977 tx_center_min[0][1][1] = 0
4461 11:08:04.608472 tx_center_max[0][1][1] = 0
4462 11:08:04.611868 tx_center_min[1][0][0] = 0
4463 11:08:04.612069 tx_center_max[1][0][0] = 0
4464 11:08:04.615249 tx_center_min[1][0][1] = 0
4465 11:08:04.619041 tx_center_max[1][0][1] = 0
4466 11:08:04.622326 tx_center_min[1][1][0] = 0
4467 11:08:04.622580 tx_center_max[1][1][0] = 0
4468 11:08:04.625507 tx_center_min[1][1][1] = 0
4469 11:08:04.628733 tx_center_max[1][1][1] = 0
4470 11:08:04.629020 dump params tx window
4471 11:08:04.632314 tx_win_center[0][0][0] = 0
4472 11:08:04.635211 tx_first_pass[0][0][0] = 0
4473 11:08:04.639051 tx_last_pass[0][0][0] = 0
4474 11:08:04.639494 tx_win_center[0][0][1] = 0
4475 11:08:04.642477 tx_first_pass[0][0][1] = 0
4476 11:08:04.645393 tx_last_pass[0][0][1] = 0
4477 11:08:04.645776 tx_win_center[0][0][2] = 0
4478 11:08:04.648774 tx_first_pass[0][0][2] = 0
4479 11:08:04.652077 tx_last_pass[0][0][2] = 0
4480 11:08:04.655290 tx_win_center[0][0][3] = 0
4481 11:08:04.655677 tx_first_pass[0][0][3] = 0
4482 11:08:04.658673 tx_last_pass[0][0][3] = 0
4483 11:08:04.662778 tx_win_center[0][0][4] = 0
4484 11:08:04.665713 tx_first_pass[0][0][4] = 0
4485 11:08:04.666179 tx_last_pass[0][0][4] = 0
4486 11:08:04.668683 tx_win_center[0][0][5] = 0
4487 11:08:04.672104 tx_first_pass[0][0][5] = 0
4488 11:08:04.675322 tx_last_pass[0][0][5] = 0
4489 11:08:04.675707 tx_win_center[0][0][6] = 0
4490 11:08:04.678537 tx_first_pass[0][0][6] = 0
4491 11:08:04.682166 tx_last_pass[0][0][6] = 0
4492 11:08:04.682550 tx_win_center[0][0][7] = 0
4493 11:08:04.685358 tx_first_pass[0][0][7] = 0
4494 11:08:04.688615 tx_last_pass[0][0][7] = 0
4495 11:08:04.691966 tx_win_center[0][0][8] = 0
4496 11:08:04.692350 tx_first_pass[0][0][8] = 0
4497 11:08:04.695500 tx_last_pass[0][0][8] = 0
4498 11:08:04.698504 tx_win_center[0][0][9] = 0
4499 11:08:04.698888 tx_first_pass[0][0][9] = 0
4500 11:08:04.702307 tx_last_pass[0][0][9] = 0
4501 11:08:04.705596 tx_win_center[0][0][10] = 0
4502 11:08:04.709022 tx_first_pass[0][0][10] = 0
4503 11:08:04.709410 tx_last_pass[0][0][10] = 0
4504 11:08:04.712284 tx_win_center[0][0][11] = 0
4505 11:08:04.715721 tx_first_pass[0][0][11] = 0
4506 11:08:04.719138 tx_last_pass[0][0][11] = 0
4507 11:08:04.719596 tx_win_center[0][0][12] = 0
4508 11:08:04.722021 tx_first_pass[0][0][12] = 0
4509 11:08:04.725246 tx_last_pass[0][0][12] = 0
4510 11:08:04.728485 tx_win_center[0][0][13] = 0
4511 11:08:04.728882 tx_first_pass[0][0][13] = 0
4512 11:08:04.732084 tx_last_pass[0][0][13] = 0
4513 11:08:04.735338 tx_win_center[0][0][14] = 0
4514 11:08:04.739085 tx_first_pass[0][0][14] = 0
4515 11:08:04.739590 tx_last_pass[0][0][14] = 0
4516 11:08:04.741844 tx_win_center[0][0][15] = 0
4517 11:08:04.745718 tx_first_pass[0][0][15] = 0
4518 11:08:04.748755 tx_last_pass[0][0][15] = 0
4519 11:08:04.749181 tx_win_center[0][1][0] = 0
4520 11:08:04.752160 tx_first_pass[0][1][0] = 0
4521 11:08:04.755716 tx_last_pass[0][1][0] = 0
4522 11:08:04.758731 tx_win_center[0][1][1] = 0
4523 11:08:04.759231 tx_first_pass[0][1][1] = 0
4524 11:08:04.762294 tx_last_pass[0][1][1] = 0
4525 11:08:04.765214 tx_win_center[0][1][2] = 0
4526 11:08:04.768205 tx_first_pass[0][1][2] = 0
4527 11:08:04.768654 tx_last_pass[0][1][2] = 0
4528 11:08:04.772182 tx_win_center[0][1][3] = 0
4529 11:08:04.775309 tx_first_pass[0][1][3] = 0
4530 11:08:04.775697 tx_last_pass[0][1][3] = 0
4531 11:08:04.778651 tx_win_center[0][1][4] = 0
4532 11:08:04.781572 tx_first_pass[0][1][4] = 0
4533 11:08:04.785282 tx_last_pass[0][1][4] = 0
4534 11:08:04.785665 tx_win_center[0][1][5] = 0
4535 11:08:04.788314 tx_first_pass[0][1][5] = 0
4536 11:08:04.791386 tx_last_pass[0][1][5] = 0
4537 11:08:04.794806 tx_win_center[0][1][6] = 0
4538 11:08:04.795190 tx_first_pass[0][1][6] = 0
4539 11:08:04.798488 tx_last_pass[0][1][6] = 0
4540 11:08:04.801816 tx_win_center[0][1][7] = 0
4541 11:08:04.802203 tx_first_pass[0][1][7] = 0
4542 11:08:04.805023 tx_last_pass[0][1][7] = 0
4543 11:08:04.808081 tx_win_center[0][1][8] = 0
4544 11:08:04.811666 tx_first_pass[0][1][8] = 0
4545 11:08:04.812408 tx_last_pass[0][1][8] = 0
4546 11:08:04.814550 tx_win_center[0][1][9] = 0
4547 11:08:04.818134 tx_first_pass[0][1][9] = 0
4548 11:08:04.821429 tx_last_pass[0][1][9] = 0
4549 11:08:04.821876 tx_win_center[0][1][10] = 0
4550 11:08:04.824652 tx_first_pass[0][1][10] = 0
4551 11:08:04.827940 tx_last_pass[0][1][10] = 0
4552 11:08:04.831810 tx_win_center[0][1][11] = 0
4553 11:08:04.832210 tx_first_pass[0][1][11] = 0
4554 11:08:04.834985 tx_last_pass[0][1][11] = 0
4555 11:08:04.838351 tx_win_center[0][1][12] = 0
4556 11:08:04.841732 tx_first_pass[0][1][12] = 0
4557 11:08:04.842353 tx_last_pass[0][1][12] = 0
4558 11:08:04.844837 tx_win_center[0][1][13] = 0
4559 11:08:04.847931 tx_first_pass[0][1][13] = 0
4560 11:08:04.851161 tx_last_pass[0][1][13] = 0
4561 11:08:04.851547 tx_win_center[0][1][14] = 0
4562 11:08:04.855009 tx_first_pass[0][1][14] = 0
4563 11:08:04.858120 tx_last_pass[0][1][14] = 0
4564 11:08:04.861416 tx_win_center[0][1][15] = 0
4565 11:08:04.862027 tx_first_pass[0][1][15] = 0
4566 11:08:04.865021 tx_last_pass[0][1][15] = 0
4567 11:08:04.867763 tx_win_center[1][0][0] = 0
4568 11:08:04.871090 tx_first_pass[1][0][0] = 0
4569 11:08:04.871474 tx_last_pass[1][0][0] = 0
4570 11:08:04.875000 tx_win_center[1][0][1] = 0
4571 11:08:04.878023 tx_first_pass[1][0][1] = 0
4572 11:08:04.878408 tx_last_pass[1][0][1] = 0
4573 11:08:04.881486 tx_win_center[1][0][2] = 0
4574 11:08:04.884539 tx_first_pass[1][0][2] = 0
4575 11:08:04.888109 tx_last_pass[1][0][2] = 0
4576 11:08:04.888537 tx_win_center[1][0][3] = 0
4577 11:08:04.891584 tx_first_pass[1][0][3] = 0
4578 11:08:04.894539 tx_last_pass[1][0][3] = 0
4579 11:08:04.894928 tx_win_center[1][0][4] = 0
4580 11:08:04.898081 tx_first_pass[1][0][4] = 0
4581 11:08:04.901384 tx_last_pass[1][0][4] = 0
4582 11:08:04.904850 tx_win_center[1][0][5] = 0
4583 11:08:04.905239 tx_first_pass[1][0][5] = 0
4584 11:08:04.908186 tx_last_pass[1][0][5] = 0
4585 11:08:04.911668 tx_win_center[1][0][6] = 0
4586 11:08:04.915052 tx_first_pass[1][0][6] = 0
4587 11:08:04.915438 tx_last_pass[1][0][6] = 0
4588 11:08:04.918261 tx_win_center[1][0][7] = 0
4589 11:08:04.922056 tx_first_pass[1][0][7] = 0
4590 11:08:04.922523 tx_last_pass[1][0][7] = 0
4591 11:08:04.924600 tx_win_center[1][0][8] = 0
4592 11:08:04.928172 tx_first_pass[1][0][8] = 0
4593 11:08:04.931053 tx_last_pass[1][0][8] = 0
4594 11:08:04.931442 tx_win_center[1][0][9] = 0
4595 11:08:04.934638 tx_first_pass[1][0][9] = 0
4596 11:08:04.937601 tx_last_pass[1][0][9] = 0
4597 11:08:04.941214 tx_win_center[1][0][10] = 0
4598 11:08:04.941596 tx_first_pass[1][0][10] = 0
4599 11:08:04.944686 tx_last_pass[1][0][10] = 0
4600 11:08:04.947838 tx_win_center[1][0][11] = 0
4601 11:08:04.951142 tx_first_pass[1][0][11] = 0
4602 11:08:04.951600 tx_last_pass[1][0][11] = 0
4603 11:08:04.954855 tx_win_center[1][0][12] = 0
4604 11:08:04.958269 tx_first_pass[1][0][12] = 0
4605 11:08:04.961105 tx_last_pass[1][0][12] = 0
4606 11:08:04.961492 tx_win_center[1][0][13] = 0
4607 11:08:04.964550 tx_first_pass[1][0][13] = 0
4608 11:08:04.968333 tx_last_pass[1][0][13] = 0
4609 11:08:04.971089 tx_win_center[1][0][14] = 0
4610 11:08:04.971547 tx_first_pass[1][0][14] = 0
4611 11:08:04.974992 tx_last_pass[1][0][14] = 0
4612 11:08:04.977604 tx_win_center[1][0][15] = 0
4613 11:08:04.981533 tx_first_pass[1][0][15] = 0
4614 11:08:04.981993 tx_last_pass[1][0][15] = 0
4615 11:08:04.984267 tx_win_center[1][1][0] = 0
4616 11:08:04.987825 tx_first_pass[1][1][0] = 0
4617 11:08:04.991203 tx_last_pass[1][1][0] = 0
4618 11:08:04.991585 tx_win_center[1][1][1] = 0
4619 11:08:04.994553 tx_first_pass[1][1][1] = 0
4620 11:08:04.997761 tx_last_pass[1][1][1] = 0
4621 11:08:04.998143 tx_win_center[1][1][2] = 0
4622 11:08:05.001082 tx_first_pass[1][1][2] = 0
4623 11:08:05.004435 tx_last_pass[1][1][2] = 0
4624 11:08:05.008134 tx_win_center[1][1][3] = 0
4625 11:08:05.008565 tx_first_pass[1][1][3] = 0
4626 11:08:05.011154 tx_last_pass[1][1][3] = 0
4627 11:08:05.014558 tx_win_center[1][1][4] = 0
4628 11:08:05.018153 tx_first_pass[1][1][4] = 0
4629 11:08:05.018541 tx_last_pass[1][1][4] = 0
4630 11:08:05.021359 tx_win_center[1][1][5] = 0
4631 11:08:05.024209 tx_first_pass[1][1][5] = 0
4632 11:08:05.024735 tx_last_pass[1][1][5] = 0
4633 11:08:05.027494 tx_win_center[1][1][6] = 0
4634 11:08:05.031292 tx_first_pass[1][1][6] = 0
4635 11:08:05.034504 tx_last_pass[1][1][6] = 0
4636 11:08:05.035012 tx_win_center[1][1][7] = 0
4637 11:08:05.037815 tx_first_pass[1][1][7] = 0
4638 11:08:05.041201 tx_last_pass[1][1][7] = 0
4639 11:08:05.041582 tx_win_center[1][1][8] = 0
4640 11:08:05.044143 tx_first_pass[1][1][8] = 0
4641 11:08:05.048181 tx_last_pass[1][1][8] = 0
4642 11:08:05.051718 tx_win_center[1][1][9] = 0
4643 11:08:05.052176 tx_first_pass[1][1][9] = 0
4644 11:08:05.054421 tx_last_pass[1][1][9] = 0
4645 11:08:05.057830 tx_win_center[1][1][10] = 0
4646 11:08:05.061150 tx_first_pass[1][1][10] = 0
4647 11:08:05.061619 tx_last_pass[1][1][10] = 0
4648 11:08:05.064202 tx_win_center[1][1][11] = 0
4649 11:08:05.067464 tx_first_pass[1][1][11] = 0
4650 11:08:05.070948 tx_last_pass[1][1][11] = 0
4651 11:08:05.071448 tx_win_center[1][1][12] = 0
4652 11:08:05.074125 tx_first_pass[1][1][12] = 0
4653 11:08:05.077464 tx_last_pass[1][1][12] = 0
4654 11:08:05.081153 tx_win_center[1][1][13] = 0
4655 11:08:05.081659 tx_first_pass[1][1][13] = 0
4656 11:08:05.084083 tx_last_pass[1][1][13] = 0
4657 11:08:05.087722 tx_win_center[1][1][14] = 0
4658 11:08:05.090657 tx_first_pass[1][1][14] = 0
4659 11:08:05.091087 tx_last_pass[1][1][14] = 0
4660 11:08:05.094201 tx_win_center[1][1][15] = 0
4661 11:08:05.097502 tx_first_pass[1][1][15] = 0
4662 11:08:05.100894 tx_last_pass[1][1][15] = 0
4663 11:08:05.101401 dump params rx window
4664 11:08:05.104390 rx_firspass[0][0][0] = 0
4665 11:08:05.107407 rx_lastpass[0][0][0] = 0
4666 11:08:05.107830 rx_firspass[0][0][1] = 0
4667 11:08:05.110738 rx_lastpass[0][0][1] = 0
4668 11:08:05.114251 rx_firspass[0][0][2] = 0
4669 11:08:05.114746 rx_lastpass[0][0][2] = 0
4670 11:08:05.117426 rx_firspass[0][0][3] = 0
4671 11:08:05.120913 rx_lastpass[0][0][3] = 0
4672 11:08:05.121514 rx_firspass[0][0][4] = 0
4673 11:08:05.124199 rx_lastpass[0][0][4] = 0
4674 11:08:05.127677 rx_firspass[0][0][5] = 0
4675 11:08:05.128175 rx_lastpass[0][0][5] = 0
4676 11:08:05.130967 rx_firspass[0][0][6] = 0
4677 11:08:05.134314 rx_lastpass[0][0][6] = 0
4678 11:08:05.138194 rx_firspass[0][0][7] = 0
4679 11:08:05.138693 rx_lastpass[0][0][7] = 0
4680 11:08:05.140942 rx_firspass[0][0][8] = 0
4681 11:08:05.144058 rx_lastpass[0][0][8] = 0
4682 11:08:05.144512 rx_firspass[0][0][9] = 0
4683 11:08:05.147560 rx_lastpass[0][0][9] = 0
4684 11:08:05.150875 rx_firspass[0][0][10] = 0
4685 11:08:05.151259 rx_lastpass[0][0][10] = 0
4686 11:08:05.154567 rx_firspass[0][0][11] = 0
4687 11:08:05.157726 rx_lastpass[0][0][11] = 0
4688 11:08:05.158184 rx_firspass[0][0][12] = 0
4689 11:08:05.161087 rx_lastpass[0][0][12] = 0
4690 11:08:05.164157 rx_firspass[0][0][13] = 0
4691 11:08:05.167981 rx_lastpass[0][0][13] = 0
4692 11:08:05.168360 rx_firspass[0][0][14] = 0
4693 11:08:05.170564 rx_lastpass[0][0][14] = 0
4694 11:08:05.174082 rx_firspass[0][0][15] = 0
4695 11:08:05.177260 rx_lastpass[0][0][15] = 0
4696 11:08:05.177720 rx_firspass[0][1][0] = 0
4697 11:08:05.180529 rx_lastpass[0][1][0] = 0
4698 11:08:05.184393 rx_firspass[0][1][1] = 0
4699 11:08:05.184953 rx_lastpass[0][1][1] = 0
4700 11:08:05.187362 rx_firspass[0][1][2] = 0
4701 11:08:05.190262 rx_lastpass[0][1][2] = 0
4702 11:08:05.190683 rx_firspass[0][1][3] = 0
4703 11:08:05.194043 rx_lastpass[0][1][3] = 0
4704 11:08:05.197072 rx_firspass[0][1][4] = 0
4705 11:08:05.197454 rx_lastpass[0][1][4] = 0
4706 11:08:05.200740 rx_firspass[0][1][5] = 0
4707 11:08:05.204190 rx_lastpass[0][1][5] = 0
4708 11:08:05.204740 rx_firspass[0][1][6] = 0
4709 11:08:05.207289 rx_lastpass[0][1][6] = 0
4710 11:08:05.210706 rx_firspass[0][1][7] = 0
4711 11:08:05.214288 rx_lastpass[0][1][7] = 0
4712 11:08:05.214788 rx_firspass[0][1][8] = 0
4713 11:08:05.217213 rx_lastpass[0][1][8] = 0
4714 11:08:05.220594 rx_firspass[0][1][9] = 0
4715 11:08:05.221093 rx_lastpass[0][1][9] = 0
4716 11:08:05.223752 rx_firspass[0][1][10] = 0
4717 11:08:05.226954 rx_lastpass[0][1][10] = 0
4718 11:08:05.227336 rx_firspass[0][1][11] = 0
4719 11:08:05.230473 rx_lastpass[0][1][11] = 0
4720 11:08:05.234258 rx_firspass[0][1][12] = 0
4721 11:08:05.237048 rx_lastpass[0][1][12] = 0
4722 11:08:05.237433 rx_firspass[0][1][13] = 0
4723 11:08:05.240261 rx_lastpass[0][1][13] = 0
4724 11:08:05.244253 rx_firspass[0][1][14] = 0
4725 11:08:05.244770 rx_lastpass[0][1][14] = 0
4726 11:08:05.247324 rx_firspass[0][1][15] = 0
4727 11:08:05.250608 rx_lastpass[0][1][15] = 0
4728 11:08:05.251079 rx_firspass[1][0][0] = 0
4729 11:08:05.254046 rx_lastpass[1][0][0] = 0
4730 11:08:05.257303 rx_firspass[1][0][1] = 0
4731 11:08:05.260583 rx_lastpass[1][0][1] = 0
4732 11:08:05.261057 rx_firspass[1][0][2] = 0
4733 11:08:05.264376 rx_lastpass[1][0][2] = 0
4734 11:08:05.267229 rx_firspass[1][0][3] = 0
4735 11:08:05.267689 rx_lastpass[1][0][3] = 0
4736 11:08:05.270668 rx_firspass[1][0][4] = 0
4737 11:08:05.274200 rx_lastpass[1][0][4] = 0
4738 11:08:05.274668 rx_firspass[1][0][5] = 0
4739 11:08:05.277559 rx_lastpass[1][0][5] = 0
4740 11:08:05.280392 rx_firspass[1][0][6] = 0
4741 11:08:05.280844 rx_lastpass[1][0][6] = 0
4742 11:08:05.283920 rx_firspass[1][0][7] = 0
4743 11:08:05.287192 rx_lastpass[1][0][7] = 0
4744 11:08:05.287577 rx_firspass[1][0][8] = 0
4745 11:08:05.290536 rx_lastpass[1][0][8] = 0
4746 11:08:05.293597 rx_firspass[1][0][9] = 0
4747 11:08:05.296740 rx_lastpass[1][0][9] = 0
4748 11:08:05.297121 rx_firspass[1][0][10] = 0
4749 11:08:05.300536 rx_lastpass[1][0][10] = 0
4750 11:08:05.304235 rx_firspass[1][0][11] = 0
4751 11:08:05.304760 rx_lastpass[1][0][11] = 0
4752 11:08:05.307295 rx_firspass[1][0][12] = 0
4753 11:08:05.310373 rx_lastpass[1][0][12] = 0
4754 11:08:05.313736 rx_firspass[1][0][13] = 0
4755 11:08:05.314213 rx_lastpass[1][0][13] = 0
4756 11:08:05.317406 rx_firspass[1][0][14] = 0
4757 11:08:05.320800 rx_lastpass[1][0][14] = 0
4758 11:08:05.321264 rx_firspass[1][0][15] = 0
4759 11:08:05.324102 rx_lastpass[1][0][15] = 0
4760 11:08:05.327316 rx_firspass[1][1][0] = 0
4761 11:08:05.327776 rx_lastpass[1][1][0] = 0
4762 11:08:05.330316 rx_firspass[1][1][1] = 0
4763 11:08:05.333667 rx_lastpass[1][1][1] = 0
4764 11:08:05.336863 rx_firspass[1][1][2] = 0
4765 11:08:05.337321 rx_lastpass[1][1][2] = 0
4766 11:08:05.340379 rx_firspass[1][1][3] = 0
4767 11:08:05.343251 rx_lastpass[1][1][3] = 0
4768 11:08:05.343667 rx_firspass[1][1][4] = 0
4769 11:08:05.346994 rx_lastpass[1][1][4] = 0
4770 11:08:05.350243 rx_firspass[1][1][5] = 0
4771 11:08:05.350624 rx_lastpass[1][1][5] = 0
4772 11:08:05.353558 rx_firspass[1][1][6] = 0
4773 11:08:05.356850 rx_lastpass[1][1][6] = 0
4774 11:08:05.357231 rx_firspass[1][1][7] = 0
4775 11:08:05.360566 rx_lastpass[1][1][7] = 0
4776 11:08:05.364003 rx_firspass[1][1][8] = 0
4777 11:08:05.364504 rx_lastpass[1][1][8] = 0
4778 11:08:05.367109 rx_firspass[1][1][9] = 0
4779 11:08:05.370135 rx_lastpass[1][1][9] = 0
4780 11:08:05.373700 rx_firspass[1][1][10] = 0
4781 11:08:05.374153 rx_lastpass[1][1][10] = 0
4782 11:08:05.377103 rx_firspass[1][1][11] = 0
4783 11:08:05.380391 rx_lastpass[1][1][11] = 0
4784 11:08:05.380920 rx_firspass[1][1][12] = 0
4785 11:08:05.383596 rx_lastpass[1][1][12] = 0
4786 11:08:05.386951 rx_firspass[1][1][13] = 0
4787 11:08:05.387411 rx_lastpass[1][1][13] = 0
4788 11:08:05.389998 rx_firspass[1][1][14] = 0
4789 11:08:05.394039 rx_lastpass[1][1][14] = 0
4790 11:08:05.397466 rx_firspass[1][1][15] = 0
4791 11:08:05.397923 rx_lastpass[1][1][15] = 0
4792 11:08:05.400420 dump params clk_delay
4793 11:08:05.400913 clk_delay[0] = 0
4794 11:08:05.403819 clk_delay[1] = 0
4795 11:08:05.404278 dump params dqs_delay
4796 11:08:05.406892 dqs_delay[0][0] = 0
4797 11:08:05.407392 dqs_delay[0][1] = 0
4798 11:08:05.410247 dqs_delay[1][0] = 0
4799 11:08:05.413818 dqs_delay[1][1] = 0
4800 11:08:05.414282 dump params delay_cell_unit = 735
4801 11:08:05.417192 dump source = 0x0
4802 11:08:05.420319 dump params frequency:800
4803 11:08:05.420737 dump params rank number:2
4804 11:08:05.421036
4805 11:08:05.423508 dump params write leveling
4806 11:08:05.427312 write leveling[0][0][0] = 0x0
4807 11:08:05.430003 write leveling[0][0][1] = 0x0
4808 11:08:05.433460 write leveling[0][1][0] = 0x0
4809 11:08:05.433915 write leveling[0][1][1] = 0x0
4810 11:08:05.437116 write leveling[1][0][0] = 0x0
4811 11:08:05.440596 write leveling[1][0][1] = 0x0
4812 11:08:05.443817 write leveling[1][1][0] = 0x0
4813 11:08:05.446794 write leveling[1][1][1] = 0x0
4814 11:08:05.447176 dump params cbt_cs
4815 11:08:05.450217 cbt_cs[0][0] = 0x0
4816 11:08:05.450602 cbt_cs[0][1] = 0x0
4817 11:08:05.453650 cbt_cs[1][0] = 0x0
4818 11:08:05.454033 cbt_cs[1][1] = 0x0
4819 11:08:05.457382 dump params cbt_mr12
4820 11:08:05.457845 cbt_mr12[0][0] = 0x0
4821 11:08:05.459954 cbt_mr12[0][1] = 0x0
4822 11:08:05.463434 cbt_mr12[1][0] = 0x0
4823 11:08:05.463895 cbt_mr12[1][1] = 0x0
4824 11:08:05.466778 dump params tx window
4825 11:08:05.467238 tx_center_min[0][0][0] = 0
4826 11:08:05.469671 tx_center_max[0][0][0] = 0
4827 11:08:05.473602 tx_center_min[0][0][1] = 0
4828 11:08:05.476426 tx_center_max[0][0][1] = 0
4829 11:08:05.476848 tx_center_min[0][1][0] = 0
4830 11:08:05.479627 tx_center_max[0][1][0] = 0
4831 11:08:05.483000 tx_center_min[0][1][1] = 0
4832 11:08:05.486388 tx_center_max[0][1][1] = 0
4833 11:08:05.486771 tx_center_min[1][0][0] = 0
4834 11:08:05.489571 tx_center_max[1][0][0] = 0
4835 11:08:05.493146 tx_center_min[1][0][1] = 0
4836 11:08:05.496333 tx_center_max[1][0][1] = 0
4837 11:08:05.496831 tx_center_min[1][1][0] = 0
4838 11:08:05.499872 tx_center_max[1][1][0] = 0
4839 11:08:05.503183 tx_center_min[1][1][1] = 0
4840 11:08:05.506400 tx_center_max[1][1][1] = 0
4841 11:08:05.506837 dump params tx window
4842 11:08:05.509478 tx_win_center[0][0][0] = 0
4843 11:08:05.513040 tx_first_pass[0][0][0] = 0
4844 11:08:05.513508 tx_last_pass[0][0][0] = 0
4845 11:08:05.516381 tx_win_center[0][0][1] = 0
4846 11:08:05.519577 tx_first_pass[0][0][1] = 0
4847 11:08:05.523690 tx_last_pass[0][0][1] = 0
4848 11:08:05.524198 tx_win_center[0][0][2] = 0
4849 11:08:05.526678 tx_first_pass[0][0][2] = 0
4850 11:08:05.529444 tx_last_pass[0][0][2] = 0
4851 11:08:05.529860 tx_win_center[0][0][3] = 0
4852 11:08:05.532920 tx_first_pass[0][0][3] = 0
4853 11:08:05.536204 tx_last_pass[0][0][3] = 0
4854 11:08:05.539703 tx_win_center[0][0][4] = 0
4855 11:08:05.540165 tx_first_pass[0][0][4] = 0
4856 11:08:05.542731 tx_last_pass[0][0][4] = 0
4857 11:08:05.545912 tx_win_center[0][0][5] = 0
4858 11:08:05.549248 tx_first_pass[0][0][5] = 0
4859 11:08:05.549626 tx_last_pass[0][0][5] = 0
4860 11:08:05.552887 tx_win_center[0][0][6] = 0
4861 11:08:05.556074 tx_first_pass[0][0][6] = 0
4862 11:08:05.559485 tx_last_pass[0][0][6] = 0
4863 11:08:05.559864 tx_win_center[0][0][7] = 0
4864 11:08:05.562253 tx_first_pass[0][0][7] = 0
4865 11:08:05.565956 tx_last_pass[0][0][7] = 0
4866 11:08:05.566416 tx_win_center[0][0][8] = 0
4867 11:08:05.569014 tx_first_pass[0][0][8] = 0
4868 11:08:05.572224 tx_last_pass[0][0][8] = 0
4869 11:08:05.576421 tx_win_center[0][0][9] = 0
4870 11:08:05.576924 tx_first_pass[0][0][9] = 0
4871 11:08:05.579248 tx_last_pass[0][0][9] = 0
4872 11:08:05.582409 tx_win_center[0][0][10] = 0
4873 11:08:05.585788 tx_first_pass[0][0][10] = 0
4874 11:08:05.586169 tx_last_pass[0][0][10] = 0
4875 11:08:05.588982 tx_win_center[0][0][11] = 0
4876 11:08:05.592546 tx_first_pass[0][0][11] = 0
4877 11:08:05.596318 tx_last_pass[0][0][11] = 0
4878 11:08:05.596834 tx_win_center[0][0][12] = 0
4879 11:08:05.599326 tx_first_pass[0][0][12] = 0
4880 11:08:05.602483 tx_last_pass[0][0][12] = 0
4881 11:08:05.605707 tx_win_center[0][0][13] = 0
4882 11:08:05.606087 tx_first_pass[0][0][13] = 0
4883 11:08:05.609554 tx_last_pass[0][0][13] = 0
4884 11:08:05.612302 tx_win_center[0][0][14] = 0
4885 11:08:05.615631 tx_first_pass[0][0][14] = 0
4886 11:08:05.616093 tx_last_pass[0][0][14] = 0
4887 11:08:05.619351 tx_win_center[0][0][15] = 0
4888 11:08:05.622554 tx_first_pass[0][0][15] = 0
4889 11:08:05.625914 tx_last_pass[0][0][15] = 0
4890 11:08:05.626409 tx_win_center[0][1][0] = 0
4891 11:08:05.629082 tx_first_pass[0][1][0] = 0
4892 11:08:05.632774 tx_last_pass[0][1][0] = 0
4893 11:08:05.635937 tx_win_center[0][1][1] = 0
4894 11:08:05.636435 tx_first_pass[0][1][1] = 0
4895 11:08:05.639296 tx_last_pass[0][1][1] = 0
4896 11:08:05.642300 tx_win_center[0][1][2] = 0
4897 11:08:05.642724 tx_first_pass[0][1][2] = 0
4898 11:08:05.645646 tx_last_pass[0][1][2] = 0
4899 11:08:05.649158 tx_win_center[0][1][3] = 0
4900 11:08:05.652320 tx_first_pass[0][1][3] = 0
4901 11:08:05.652950 tx_last_pass[0][1][3] = 0
4902 11:08:05.655980 tx_win_center[0][1][4] = 0
4903 11:08:05.658956 tx_first_pass[0][1][4] = 0
4904 11:08:05.659381 tx_last_pass[0][1][4] = 0
4905 11:08:05.662868 tx_win_center[0][1][5] = 0
4906 11:08:05.666206 tx_first_pass[0][1][5] = 0
4907 11:08:05.668979 tx_last_pass[0][1][5] = 0
4908 11:08:05.669404 tx_win_center[0][1][6] = 0
4909 11:08:05.672328 tx_first_pass[0][1][6] = 0
4910 11:08:05.675519 tx_last_pass[0][1][6] = 0
4911 11:08:05.678634 tx_win_center[0][1][7] = 0
4912 11:08:05.679062 tx_first_pass[0][1][7] = 0
4913 11:08:05.682174 tx_last_pass[0][1][7] = 0
4914 11:08:05.685576 tx_win_center[0][1][8] = 0
4915 11:08:05.689296 tx_first_pass[0][1][8] = 0
4916 11:08:05.689761 tx_last_pass[0][1][8] = 0
4917 11:08:05.692066 tx_win_center[0][1][9] = 0
4918 11:08:05.695723 tx_first_pass[0][1][9] = 0
4919 11:08:05.696199 tx_last_pass[0][1][9] = 0
4920 11:08:05.698590 tx_win_center[0][1][10] = 0
4921 11:08:05.702171 tx_first_pass[0][1][10] = 0
4922 11:08:05.705255 tx_last_pass[0][1][10] = 0
4923 11:08:05.705639 tx_win_center[0][1][11] = 0
4924 11:08:05.709155 tx_first_pass[0][1][11] = 0
4925 11:08:05.712049 tx_last_pass[0][1][11] = 0
4926 11:08:05.716014 tx_win_center[0][1][12] = 0
4927 11:08:05.716562 tx_first_pass[0][1][12] = 0
4928 11:08:05.719301 tx_last_pass[0][1][12] = 0
4929 11:08:05.722601 tx_win_center[0][1][13] = 0
4930 11:08:05.725962 tx_first_pass[0][1][13] = 0
4931 11:08:05.726459 tx_last_pass[0][1][13] = 0
4932 11:08:05.729236 tx_win_center[0][1][14] = 0
4933 11:08:05.732089 tx_first_pass[0][1][14] = 0
4934 11:08:05.735978 tx_last_pass[0][1][14] = 0
4935 11:08:05.736522 tx_win_center[0][1][15] = 0
4936 11:08:05.739199 tx_first_pass[0][1][15] = 0
4937 11:08:05.742144 tx_last_pass[0][1][15] = 0
4938 11:08:05.745893 tx_win_center[1][0][0] = 0
4939 11:08:05.746314 tx_first_pass[1][0][0] = 0
4940 11:08:05.749408 tx_last_pass[1][0][0] = 0
4941 11:08:05.752397 tx_win_center[1][0][1] = 0
4942 11:08:05.752993 tx_first_pass[1][0][1] = 0
4943 11:08:05.755649 tx_last_pass[1][0][1] = 0
4944 11:08:05.759282 tx_win_center[1][0][2] = 0
4945 11:08:05.762675 tx_first_pass[1][0][2] = 0
4946 11:08:05.763134 tx_last_pass[1][0][2] = 0
4947 11:08:05.765942 tx_win_center[1][0][3] = 0
4948 11:08:05.769424 tx_first_pass[1][0][3] = 0
4949 11:08:05.769808 tx_last_pass[1][0][3] = 0
4950 11:08:05.772560 tx_win_center[1][0][4] = 0
4951 11:08:05.775962 tx_first_pass[1][0][4] = 0
4952 11:08:05.779034 tx_last_pass[1][0][4] = 0
4953 11:08:05.779419 tx_win_center[1][0][5] = 0
4954 11:08:05.782437 tx_first_pass[1][0][5] = 0
4955 11:08:05.785584 tx_last_pass[1][0][5] = 0
4956 11:08:05.789235 tx_win_center[1][0][6] = 0
4957 11:08:05.789695 tx_first_pass[1][0][6] = 0
4958 11:08:05.791847 tx_last_pass[1][0][6] = 0
4959 11:08:05.795409 tx_win_center[1][0][7] = 0
4960 11:08:05.799083 tx_first_pass[1][0][7] = 0
4961 11:08:05.799482 tx_last_pass[1][0][7] = 0
4962 11:08:05.802044 tx_win_center[1][0][8] = 0
4963 11:08:05.805560 tx_first_pass[1][0][8] = 0
4964 11:08:05.805948 tx_last_pass[1][0][8] = 0
4965 11:08:05.808739 tx_win_center[1][0][9] = 0
4966 11:08:05.812096 tx_first_pass[1][0][9] = 0
4967 11:08:05.815723 tx_last_pass[1][0][9] = 0
4968 11:08:05.816107 tx_win_center[1][0][10] = 0
4969 11:08:05.818876 tx_first_pass[1][0][10] = 0
4970 11:08:05.822377 tx_last_pass[1][0][10] = 0
4971 11:08:05.825704 tx_win_center[1][0][11] = 0
4972 11:08:05.826161 tx_first_pass[1][0][11] = 0
4973 11:08:05.828973 tx_last_pass[1][0][11] = 0
4974 11:08:05.832238 tx_win_center[1][0][12] = 0
4975 11:08:05.835882 tx_first_pass[1][0][12] = 0
4976 11:08:05.836338 tx_last_pass[1][0][12] = 0
4977 11:08:05.839029 tx_win_center[1][0][13] = 0
4978 11:08:05.841942 tx_first_pass[1][0][13] = 0
4979 11:08:05.845936 tx_last_pass[1][0][13] = 0
4980 11:08:05.846419 tx_win_center[1][0][14] = 0
4981 11:08:05.848811 tx_first_pass[1][0][14] = 0
4982 11:08:05.851813 tx_last_pass[1][0][14] = 0
4983 11:08:05.856019 tx_win_center[1][0][15] = 0
4984 11:08:05.856525 tx_first_pass[1][0][15] = 0
4985 11:08:05.858756 tx_last_pass[1][0][15] = 0
4986 11:08:05.862168 tx_win_center[1][1][0] = 0
4987 11:08:05.865313 tx_first_pass[1][1][0] = 0
4988 11:08:05.865739 tx_last_pass[1][1][0] = 0
4989 11:08:05.868501 tx_win_center[1][1][1] = 0
4990 11:08:05.871897 tx_first_pass[1][1][1] = 0
4991 11:08:05.872281 tx_last_pass[1][1][1] = 0
4992 11:08:05.875552 tx_win_center[1][1][2] = 0
4993 11:08:05.878810 tx_first_pass[1][1][2] = 0
4994 11:08:05.881791 tx_last_pass[1][1][2] = 0
4995 11:08:05.882171 tx_win_center[1][1][3] = 0
4996 11:08:05.885106 tx_first_pass[1][1][3] = 0
4997 11:08:05.888789 tx_last_pass[1][1][3] = 0
4998 11:08:05.889254 tx_win_center[1][1][4] = 0
4999 11:08:05.891924 tx_first_pass[1][1][4] = 0
5000 11:08:05.895269 tx_last_pass[1][1][4] = 0
5001 11:08:05.898685 tx_win_center[1][1][5] = 0
5002 11:08:05.899276 tx_first_pass[1][1][5] = 0
5003 11:08:05.901795 tx_last_pass[1][1][5] = 0
5004 11:08:05.905645 tx_win_center[1][1][6] = 0
5005 11:08:05.908780 tx_first_pass[1][1][6] = 0
5006 11:08:05.909342 tx_last_pass[1][1][6] = 0
5007 11:08:05.911868 tx_win_center[1][1][7] = 0
5008 11:08:05.915389 tx_first_pass[1][1][7] = 0
5009 11:08:05.915902 tx_last_pass[1][1][7] = 0
5010 11:08:05.918853 tx_win_center[1][1][8] = 0
5011 11:08:05.922024 tx_first_pass[1][1][8] = 0
5012 11:08:05.925486 tx_last_pass[1][1][8] = 0
5013 11:08:05.925871 tx_win_center[1][1][9] = 0
5014 11:08:05.928498 tx_first_pass[1][1][9] = 0
5015 11:08:05.931782 tx_last_pass[1][1][9] = 0
5016 11:08:05.935005 tx_win_center[1][1][10] = 0
5017 11:08:05.935469 tx_first_pass[1][1][10] = 0
5018 11:08:05.938345 tx_last_pass[1][1][10] = 0
5019 11:08:05.942070 tx_win_center[1][1][11] = 0
5020 11:08:05.945429 tx_first_pass[1][1][11] = 0
5021 11:08:05.945815 tx_last_pass[1][1][11] = 0
5022 11:08:05.948554 tx_win_center[1][1][12] = 0
5023 11:08:05.952076 tx_first_pass[1][1][12] = 0
5024 11:08:05.955560 tx_last_pass[1][1][12] = 0
5025 11:08:05.956017 tx_win_center[1][1][13] = 0
5026 11:08:05.958427 tx_first_pass[1][1][13] = 0
5027 11:08:05.961858 tx_last_pass[1][1][13] = 0
5028 11:08:05.965510 tx_win_center[1][1][14] = 0
5029 11:08:05.965976 tx_first_pass[1][1][14] = 0
5030 11:08:05.968929 tx_last_pass[1][1][14] = 0
5031 11:08:05.971666 tx_win_center[1][1][15] = 0
5032 11:08:05.975055 tx_first_pass[1][1][15] = 0
5033 11:08:05.975534 tx_last_pass[1][1][15] = 0
5034 11:08:05.978510 dump params rx window
5035 11:08:05.981538 rx_firspass[0][0][0] = 0
5036 11:08:05.982061 rx_lastpass[0][0][0] = 0
5037 11:08:05.985254 rx_firspass[0][0][1] = 0
5038 11:08:05.988728 rx_lastpass[0][0][1] = 0
5039 11:08:05.989230 rx_firspass[0][0][2] = 0
5040 11:08:05.992042 rx_lastpass[0][0][2] = 0
5041 11:08:05.995022 rx_firspass[0][0][3] = 0
5042 11:08:05.995447 rx_lastpass[0][0][3] = 0
5043 11:08:05.998061 rx_firspass[0][0][4] = 0
5044 11:08:06.002047 rx_lastpass[0][0][4] = 0
5045 11:08:06.005726 rx_firspass[0][0][5] = 0
5046 11:08:06.006231 rx_lastpass[0][0][5] = 0
5047 11:08:06.008141 rx_firspass[0][0][6] = 0
5048 11:08:06.011782 rx_lastpass[0][0][6] = 0
5049 11:08:06.012306 rx_firspass[0][0][7] = 0
5050 11:08:06.015515 rx_lastpass[0][0][7] = 0
5051 11:08:06.018764 rx_firspass[0][0][8] = 0
5052 11:08:06.019267 rx_lastpass[0][0][8] = 0
5053 11:08:06.021938 rx_firspass[0][0][9] = 0
5054 11:08:06.025456 rx_lastpass[0][0][9] = 0
5055 11:08:06.025963 rx_firspass[0][0][10] = 0
5056 11:08:06.028226 rx_lastpass[0][0][10] = 0
5057 11:08:06.031956 rx_firspass[0][0][11] = 0
5058 11:08:06.035323 rx_lastpass[0][0][11] = 0
5059 11:08:06.035828 rx_firspass[0][0][12] = 0
5060 11:08:06.038698 rx_lastpass[0][0][12] = 0
5061 11:08:06.042100 rx_firspass[0][0][13] = 0
5062 11:08:06.042602 rx_lastpass[0][0][13] = 0
5063 11:08:06.045497 rx_firspass[0][0][14] = 0
5064 11:08:06.048496 rx_lastpass[0][0][14] = 0
5065 11:08:06.048929 rx_firspass[0][0][15] = 0
5066 11:08:06.052033 rx_lastpass[0][0][15] = 0
5067 11:08:06.055443 rx_firspass[0][1][0] = 0
5068 11:08:06.058608 rx_lastpass[0][1][0] = 0
5069 11:08:06.059017 rx_firspass[0][1][1] = 0
5070 11:08:06.062024 rx_lastpass[0][1][1] = 0
5071 11:08:06.065392 rx_firspass[0][1][2] = 0
5072 11:08:06.066029 rx_lastpass[0][1][2] = 0
5073 11:08:06.069105 rx_firspass[0][1][3] = 0
5074 11:08:06.071968 rx_lastpass[0][1][3] = 0
5075 11:08:06.072395 rx_firspass[0][1][4] = 0
5076 11:08:06.075180 rx_lastpass[0][1][4] = 0
5077 11:08:06.078695 rx_firspass[0][1][5] = 0
5078 11:08:06.079233 rx_lastpass[0][1][5] = 0
5079 11:08:06.081989 rx_firspass[0][1][6] = 0
5080 11:08:06.085140 rx_lastpass[0][1][6] = 0
5081 11:08:06.085530 rx_firspass[0][1][7] = 0
5082 11:08:06.088906 rx_lastpass[0][1][7] = 0
5083 11:08:06.092323 rx_firspass[0][1][8] = 0
5084 11:08:06.095362 rx_lastpass[0][1][8] = 0
5085 11:08:06.095791 rx_firspass[0][1][9] = 0
5086 11:08:06.098529 rx_lastpass[0][1][9] = 0
5087 11:08:06.101808 rx_firspass[0][1][10] = 0
5088 11:08:06.102347 rx_lastpass[0][1][10] = 0
5089 11:08:06.105164 rx_firspass[0][1][11] = 0
5090 11:08:06.108263 rx_lastpass[0][1][11] = 0
5091 11:08:06.111573 rx_firspass[0][1][12] = 0
5092 11:08:06.111954 rx_lastpass[0][1][12] = 0
5093 11:08:06.114834 rx_firspass[0][1][13] = 0
5094 11:08:06.118286 rx_lastpass[0][1][13] = 0
5095 11:08:06.118667 rx_firspass[0][1][14] = 0
5096 11:08:06.121675 rx_lastpass[0][1][14] = 0
5097 11:08:06.124958 rx_firspass[0][1][15] = 0
5098 11:08:06.128171 rx_lastpass[0][1][15] = 0
5099 11:08:06.128580 rx_firspass[1][0][0] = 0
5100 11:08:06.131665 rx_lastpass[1][0][0] = 0
5101 11:08:06.135069 rx_firspass[1][0][1] = 0
5102 11:08:06.135568 rx_lastpass[1][0][1] = 0
5103 11:08:06.138022 rx_firspass[1][0][2] = 0
5104 11:08:06.141621 rx_lastpass[1][0][2] = 0
5105 11:08:06.142004 rx_firspass[1][0][3] = 0
5106 11:08:06.144925 rx_lastpass[1][0][3] = 0
5107 11:08:06.148139 rx_firspass[1][0][4] = 0
5108 11:08:06.148550 rx_lastpass[1][0][4] = 0
5109 11:08:06.151564 rx_firspass[1][0][5] = 0
5110 11:08:06.155271 rx_lastpass[1][0][5] = 0
5111 11:08:06.155786 rx_firspass[1][0][6] = 0
5112 11:08:06.158412 rx_lastpass[1][0][6] = 0
5113 11:08:06.161788 rx_firspass[1][0][7] = 0
5114 11:08:06.162254 rx_lastpass[1][0][7] = 0
5115 11:08:06.164829 rx_firspass[1][0][8] = 0
5116 11:08:06.168052 rx_lastpass[1][0][8] = 0
5117 11:08:06.171672 rx_firspass[1][0][9] = 0
5118 11:08:06.172159 rx_lastpass[1][0][9] = 0
5119 11:08:06.174898 rx_firspass[1][0][10] = 0
5120 11:08:06.178159 rx_lastpass[1][0][10] = 0
5121 11:08:06.178542 rx_firspass[1][0][11] = 0
5122 11:08:06.181510 rx_lastpass[1][0][11] = 0
5123 11:08:06.184779 rx_firspass[1][0][12] = 0
5124 11:08:06.188088 rx_lastpass[1][0][12] = 0
5125 11:08:06.188510 rx_firspass[1][0][13] = 0
5126 11:08:06.191201 rx_lastpass[1][0][13] = 0
5127 11:08:06.194649 rx_firspass[1][0][14] = 0
5128 11:08:06.195072 rx_lastpass[1][0][14] = 0
5129 11:08:06.198268 rx_firspass[1][0][15] = 0
5130 11:08:06.201549 rx_lastpass[1][0][15] = 0
5131 11:08:06.201963 rx_firspass[1][1][0] = 0
5132 11:08:06.204349 rx_lastpass[1][1][0] = 0
5133 11:08:06.208195 rx_firspass[1][1][1] = 0
5134 11:08:06.211920 rx_lastpass[1][1][1] = 0
5135 11:08:06.212384 rx_firspass[1][1][2] = 0
5136 11:08:06.214876 rx_lastpass[1][1][2] = 0
5137 11:08:06.218219 rx_firspass[1][1][3] = 0
5138 11:08:06.218690 rx_lastpass[1][1][3] = 0
5139 11:08:06.221663 rx_firspass[1][1][4] = 0
5140 11:08:06.224782 rx_lastpass[1][1][4] = 0
5141 11:08:06.225257 rx_firspass[1][1][5] = 0
5142 11:08:06.228010 rx_lastpass[1][1][5] = 0
5143 11:08:06.231656 rx_firspass[1][1][6] = 0
5144 11:08:06.232126 rx_lastpass[1][1][6] = 0
5145 11:08:06.234720 rx_firspass[1][1][7] = 0
5146 11:08:06.237725 rx_lastpass[1][1][7] = 0
5147 11:08:06.238112 rx_firspass[1][1][8] = 0
5148 11:08:06.241456 rx_lastpass[1][1][8] = 0
5149 11:08:06.244743 rx_firspass[1][1][9] = 0
5150 11:08:06.247930 rx_lastpass[1][1][9] = 0
5151 11:08:06.248508 rx_firspass[1][1][10] = 0
5152 11:08:06.251242 rx_lastpass[1][1][10] = 0
5153 11:08:06.254553 rx_firspass[1][1][11] = 0
5154 11:08:06.254936 rx_lastpass[1][1][11] = 0
5155 11:08:06.258052 rx_firspass[1][1][12] = 0
5156 11:08:06.261157 rx_lastpass[1][1][12] = 0
5157 11:08:06.261540 rx_firspass[1][1][13] = 0
5158 11:08:06.265240 rx_lastpass[1][1][13] = 0
5159 11:08:06.268264 rx_firspass[1][1][14] = 0
5160 11:08:06.271485 rx_lastpass[1][1][14] = 0
5161 11:08:06.271869 rx_firspass[1][1][15] = 0
5162 11:08:06.275066 rx_lastpass[1][1][15] = 0
5163 11:08:06.278396 dump params clk_delay
5164 11:08:06.278781 clk_delay[0] = 0
5165 11:08:06.281104 clk_delay[1] = 0
5166 11:08:06.281499 dump params dqs_delay
5167 11:08:06.284487 dqs_delay[0][0] = 0
5168 11:08:06.284896 dqs_delay[0][1] = 0
5169 11:08:06.288665 dqs_delay[1][0] = 0
5170 11:08:06.289130 dqs_delay[1][1] = 0
5171 11:08:06.291451 dump params delay_cell_unit = 735
5172 11:08:06.294886 mt_set_emi_preloader end
5173 11:08:06.298110 [mt_mem_init] dram size: 0x100000000, rank number: 2
5174 11:08:06.304592 [complex_mem_test] start addr:0x40000000, len:20480
5175 11:08:06.340959 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5176 11:08:06.347089 [complex_mem_test] start addr:0x80000000, len:20480
5177 11:08:06.382445 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5178 11:08:06.389149 [complex_mem_test] start addr:0xc0000000, len:20480
5179 11:08:06.424706 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5180 11:08:06.431812 [complex_mem_test] start addr:0x56000000, len:8192
5181 11:08:06.448407 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5182 11:08:06.448962 ddr_geometry:1
5183 11:08:06.454529 [complex_mem_test] start addr:0x80000000, len:8192
5184 11:08:06.472344 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5185 11:08:06.475435 dram_init: dram init end (result: 0)
5186 11:08:06.482277 Successfully loaded DRAM blobs and ran DRAM calibration
5187 11:08:06.492211 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5188 11:08:06.492751 CBMEM:
5189 11:08:06.495006 IMD: root @ 00000000fffff000 254 entries.
5190 11:08:06.498401 IMD: root @ 00000000ffffec00 62 entries.
5191 11:08:06.505413 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5192 11:08:06.512502 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5193 11:08:06.515365 in-header: 03 a1 00 00 08 00 00 00
5194 11:08:06.519126 in-data: 84 60 60 10 00 00 00 00
5195 11:08:06.522010 Chrome EC: clear events_b mask to 0x0000000020004000
5196 11:08:06.529211 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5197 11:08:06.532522 in-header: 03 fd 00 00 00 00 00 00
5198 11:08:06.532914 in-data:
5199 11:08:06.538492 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5200 11:08:06.538886 CBFS @ 21000 size 3d4000
5201 11:08:06.545637 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5202 11:08:06.548752 CBFS: Locating 'fallback/ramstage'
5203 11:08:06.552104 CBFS: Found @ offset 10d40 size d563
5204 11:08:06.573657 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5205 11:08:06.585704 Accumulated console time in romstage 13559 ms
5206 11:08:06.586153
5207 11:08:06.586452
5208 11:08:06.595892 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5209 11:08:06.599164 ARM64: Exception handlers installed.
5210 11:08:06.599562 ARM64: Testing exception
5211 11:08:06.602525 ARM64: Done test exception
5212 11:08:06.605697 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5213 11:08:06.609006 Manufacturer: ef
5214 11:08:06.612234 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5215 11:08:06.618812 WARNING: RO_VPD is uninitialized or empty.
5216 11:08:06.622372 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5217 11:08:06.625707 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5218 11:08:06.635588 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5219 11:08:06.638914 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5220 11:08:06.645698 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5221 11:08:06.646159 Enumerating buses...
5222 11:08:06.652198 Show all devs... Before device enumeration.
5223 11:08:06.652624 Root Device: enabled 1
5224 11:08:06.655736 CPU_CLUSTER: 0: enabled 1
5225 11:08:06.656205 CPU: 00: enabled 1
5226 11:08:06.658950 Compare with tree...
5227 11:08:06.662177 Root Device: enabled 1
5228 11:08:06.662566 CPU_CLUSTER: 0: enabled 1
5229 11:08:06.665340 CPU: 00: enabled 1
5230 11:08:06.668755 Root Device scanning...
5231 11:08:06.671796 root_dev_scan_bus for Root Device
5232 11:08:06.672183 CPU_CLUSTER: 0 enabled
5233 11:08:06.675082 root_dev_scan_bus for Root Device done
5234 11:08:06.682009 scan_bus: scanning of bus Root Device took 10690 usecs
5235 11:08:06.682399 done
5236 11:08:06.685230 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5237 11:08:06.688324 Allocating resources...
5238 11:08:06.688762 Reading resources...
5239 11:08:06.695310 Root Device read_resources bus 0 link: 0
5240 11:08:06.698307 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5241 11:08:06.701844 CPU: 00 missing read_resources
5242 11:08:06.705225 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5243 11:08:06.708449 Root Device read_resources bus 0 link: 0 done
5244 11:08:06.711698 Done reading resources.
5245 11:08:06.715117 Show resources in subtree (Root Device)...After reading.
5246 11:08:06.718572 Root Device child on link 0 CPU_CLUSTER: 0
5247 11:08:06.721608 CPU_CLUSTER: 0 child on link 0 CPU: 00
5248 11:08:06.732219 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5249 11:08:06.732747 CPU: 00
5250 11:08:06.735500 Setting resources...
5251 11:08:06.738885 Root Device assign_resources, bus 0 link: 0
5252 11:08:06.741879 CPU_CLUSTER: 0 missing set_resources
5253 11:08:06.745300 Root Device assign_resources, bus 0 link: 0
5254 11:08:06.748618 Done setting resources.
5255 11:08:06.755809 Show resources in subtree (Root Device)...After assigning values.
5256 11:08:06.758918 Root Device child on link 0 CPU_CLUSTER: 0
5257 11:08:06.762279 CPU_CLUSTER: 0 child on link 0 CPU: 00
5258 11:08:06.771783 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5259 11:08:06.772293 CPU: 00
5260 11:08:06.775570 Done allocating resources.
5261 11:08:06.778311 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5262 11:08:06.781458 Enabling resources...
5263 11:08:06.781894 done.
5264 11:08:06.785175 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5265 11:08:06.788076 Initializing devices...
5266 11:08:06.788558 Root Device init ...
5267 11:08:06.791816 mainboard_init: Starting display init.
5268 11:08:06.795039 ADC[4]: Raw value=75746 ID=0
5269 11:08:06.818125 anx7625_power_on_init: Init interface.
5270 11:08:06.821903 anx7625_disable_pd_protocol: Disabled PD feature.
5271 11:08:06.828396 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5272 11:08:06.875238 anx7625_start_dp_work: Secure OCM version=00
5273 11:08:06.878647 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5274 11:08:06.895937 sp_tx_get_edid_block: EDID Block = 1
5275 11:08:07.012753 Extracted contents:
5276 11:08:07.016676 header: 00 ff ff ff ff ff ff 00
5277 11:08:07.019568 serial number: 06 af 5c 14 00 00 00 00 00 1a
5278 11:08:07.022864 version: 01 04
5279 11:08:07.026144 basic params: 95 1a 0e 78 02
5280 11:08:07.029457 chroma info: 99 85 95 55 56 92 28 22 50 54
5281 11:08:07.032295 established: 00 00 00
5282 11:08:07.039444 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5283 11:08:07.042800 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5284 11:08:07.049378 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5285 11:08:07.055982 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5286 11:08:07.062385 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5287 11:08:07.065920 extensions: 00
5288 11:08:07.066306 checksum: ae
5289 11:08:07.066602
5290 11:08:07.069168 Manufacturer: AUO Model 145c Serial Number 0
5291 11:08:07.072498 Made week 0 of 2016
5292 11:08:07.073001 EDID version: 1.4
5293 11:08:07.075730 Digital display
5294 11:08:07.079375 6 bits per primary color channel
5295 11:08:07.079767 DisplayPort interface
5296 11:08:07.082394 Maximum image size: 26 cm x 14 cm
5297 11:08:07.085930 Gamma: 220%
5298 11:08:07.086388 Check DPMS levels
5299 11:08:07.089439 Supported color formats: RGB 4:4:4
5300 11:08:07.092370 First detailed timing is preferred timing
5301 11:08:07.095723 Established timings supported:
5302 11:08:07.098868 Standard timings supported:
5303 11:08:07.099451 Detailed timings
5304 11:08:07.105740 Hex of detail: ce1d56ea50001a3030204600009010000018
5305 11:08:07.109004 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5306 11:08:07.112186 0556 0586 05a6 0640 hborder 0
5307 11:08:07.115608 0300 0304 030a 031a vborder 0
5308 11:08:07.118874 -hsync -vsync
5309 11:08:07.122197 Did detailed timing
5310 11:08:07.125678 Hex of detail: 0000000f0000000000000000000000000020
5311 11:08:07.129021 Manufacturer-specified data, tag 15
5312 11:08:07.132432 Hex of detail: 000000fe0041554f0a202020202020202020
5313 11:08:07.135628 ASCII string: AUO
5314 11:08:07.139189 Hex of detail: 000000fe004231313658414230312e34200a
5315 11:08:07.142511 ASCII string: B116XAB01.4
5316 11:08:07.142897 Checksum
5317 11:08:07.145690 Checksum: 0xae (valid)
5318 11:08:07.152413 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5319 11:08:07.152841 DSI data_rate: 457800000 bps
5320 11:08:07.159948 anx7625_parse_edid: set default k value to 0x3d for panel
5321 11:08:07.162949 anx7625_parse_edid: pixelclock(76300).
5322 11:08:07.166264 hactive(1366), hsync(32), hfp(48), hbp(154)
5323 11:08:07.169659 vactive(768), vsync(6), vfp(4), vbp(16)
5324 11:08:07.173097 anx7625_dsi_config: config dsi.
5325 11:08:07.181027 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5326 11:08:07.201751 anx7625_dsi_config: success to config DSI
5327 11:08:07.205345 anx7625_dp_start: MIPI phy setup OK.
5328 11:08:07.209081 [SSUSB] Setting up USB HOST controller...
5329 11:08:07.212204 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5330 11:08:07.215511 [SSUSB] phy power-on done.
5331 11:08:07.219187 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5332 11:08:07.222431 in-header: 03 fc 01 00 00 00 00 00
5333 11:08:07.222895 in-data:
5334 11:08:07.225694 handle_proto3_response: EC response with error code: 1
5335 11:08:07.229012 SPM: pcm index = 1
5336 11:08:07.232358 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5337 11:08:07.235811 CBFS @ 21000 size 3d4000
5338 11:08:07.242252 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5339 11:08:07.245567 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5340 11:08:07.249029 CBFS: Found @ offset 1e7c0 size 1026
5341 11:08:07.255682 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5342 11:08:07.259229 SPM: binary array size = 2988
5343 11:08:07.262033 SPM: version = pcm_allinone_v1.17.2_20180829
5344 11:08:07.265383 SPM binary loaded in 32 msecs
5345 11:08:07.272795 spm_kick_im_to_fetch: ptr = 000000004021eec2
5346 11:08:07.276286 spm_kick_im_to_fetch: len = 2988
5347 11:08:07.276754 SPM: spm_kick_pcm_to_run
5348 11:08:07.279864 SPM: spm_kick_pcm_to_run done
5349 11:08:07.282896 SPM: spm_init done in 52 msecs
5350 11:08:07.285998 Root Device init finished in 494998 usecs
5351 11:08:07.289997 CPU_CLUSTER: 0 init ...
5352 11:08:07.299266 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5353 11:08:07.302682 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5354 11:08:07.305926 CBFS @ 21000 size 3d4000
5355 11:08:07.309118 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5356 11:08:07.313281 CBFS: Locating 'sspm.bin'
5357 11:08:07.316190 CBFS: Found @ offset 208c0 size 41cb
5358 11:08:07.326268 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5359 11:08:07.334417 CPU_CLUSTER: 0 init finished in 42802 usecs
5360 11:08:07.334798 Devices initialized
5361 11:08:07.337421 Show all devs... After init.
5362 11:08:07.340922 Root Device: enabled 1
5363 11:08:07.341302 CPU_CLUSTER: 0: enabled 1
5364 11:08:07.344492 CPU: 00: enabled 1
5365 11:08:07.347257 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5366 11:08:07.350714 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5367 11:08:07.354059 ELOG: NV offset 0x558000 size 0x1000
5368 11:08:07.361716 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5369 11:08:07.368573 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5370 11:08:07.371348 ELOG: Event(17) added with size 13 at 2024-07-10 11:08:01 UTC
5371 11:08:07.374633 out: cmd=0x121: 03 db 21 01 00 00 00 00
5372 11:08:07.378470 in-header: 03 ba 00 00 2c 00 00 00
5373 11:08:07.391379 in-data: 27 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 79 23 01 00 06 80 00 00 40 df 01 00 06 80 00 00 7d cb 00 00 06 80 00 00 77 fe 01 00
5374 11:08:07.394610 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5375 11:08:07.397849 in-header: 03 19 00 00 08 00 00 00
5376 11:08:07.401266 in-data: a2 e0 47 00 13 00 00 00
5377 11:08:07.405017 Chrome EC: UHEPI supported
5378 11:08:07.411380 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5379 11:08:07.414830 in-header: 03 e1 00 00 08 00 00 00
5380 11:08:07.418530 in-data: 84 20 60 10 00 00 00 00
5381 11:08:07.420993 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5382 11:08:07.428087 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5383 11:08:07.431390 in-header: 03 e1 00 00 08 00 00 00
5384 11:08:07.434454 in-data: 84 20 60 10 00 00 00 00
5385 11:08:07.441106 ELOG: Event(A1) added with size 10 at 2024-07-10 11:08:01 UTC
5386 11:08:07.447761 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5387 11:08:07.451403 ELOG: Event(A0) added with size 9 at 2024-07-10 11:08:01 UTC
5388 11:08:07.457962 elog_add_boot_reason: Logged dev mode boot
5389 11:08:07.458062 Finalize devices...
5390 11:08:07.461104 Devices finalized
5391 11:08:07.464589 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5392 11:08:07.467899 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5393 11:08:07.474790 ELOG: Event(91) added with size 10 at 2024-07-10 11:08:01 UTC
5394 11:08:07.478187 Writing coreboot table at 0xffeda000
5395 11:08:07.481243 0. 0000000000114000-000000000011efff: RAMSTAGE
5396 11:08:07.487705 1. 0000000040000000-000000004023cfff: RAMSTAGE
5397 11:08:07.491087 2. 000000004023d000-00000000545fffff: RAM
5398 11:08:07.494431 3. 0000000054600000-000000005465ffff: BL31
5399 11:08:07.497832 4. 0000000054660000-00000000ffed9fff: RAM
5400 11:08:07.504423 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5401 11:08:07.508034 6. 0000000100000000-000000013fffffff: RAM
5402 11:08:07.508119 Passing 5 GPIOs to payload:
5403 11:08:07.514838 NAME | PORT | POLARITY | VALUE
5404 11:08:07.517986 write protect | 0x00000096 | low | high
5405 11:08:07.525023 EC in RW | 0x000000b1 | high | undefined
5406 11:08:07.528184 EC interrupt | 0x00000097 | low | undefined
5407 11:08:07.531653 TPM interrupt | 0x00000099 | high | undefined
5408 11:08:07.538299 speaker enable | 0x000000af | high | undefined
5409 11:08:07.541656 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5410 11:08:07.544946 in-header: 03 f7 00 00 02 00 00 00
5411 11:08:07.545187 in-data: 04 00
5412 11:08:07.548291 Board ID: 4
5413 11:08:07.548588 ADC[3]: Raw value=215504 ID=1
5414 11:08:07.551764 RAM code: 1
5415 11:08:07.552084 SKU ID: 16
5416 11:08:07.555331 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5417 11:08:07.558154 CBFS @ 21000 size 3d4000
5418 11:08:07.564906 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5419 11:08:07.571381 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum c00c
5420 11:08:07.571809 coreboot table: 940 bytes.
5421 11:08:07.574427 IMD ROOT 0. 00000000fffff000 00001000
5422 11:08:07.581288 IMD SMALL 1. 00000000ffffe000 00001000
5423 11:08:07.585032 CONSOLE 2. 00000000fffde000 00020000
5424 11:08:07.587778 FMAP 3. 00000000fffdd000 0000047c
5425 11:08:07.591057 TIME STAMP 4. 00000000fffdc000 00000910
5426 11:08:07.594456 RAMOOPS 5. 00000000ffedc000 00100000
5427 11:08:07.597629 COREBOOT 6. 00000000ffeda000 00002000
5428 11:08:07.600932 IMD small region:
5429 11:08:07.604678 IMD ROOT 0. 00000000ffffec00 00000400
5430 11:08:07.607944 VBOOT WORK 1. 00000000ffffeb00 00000100
5431 11:08:07.611336 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5432 11:08:07.614574 VPD 3. 00000000ffffea60 0000006c
5433 11:08:07.617939 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5434 11:08:07.624609 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5435 11:08:07.627409 in-header: 03 e1 00 00 08 00 00 00
5436 11:08:07.630942 in-data: 84 20 60 10 00 00 00 00
5437 11:08:07.637779 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5438 11:08:07.637863 CBFS @ 21000 size 3d4000
5439 11:08:07.644190 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5440 11:08:07.647456 CBFS: Locating 'fallback/payload'
5441 11:08:07.655502 CBFS: Found @ offset dc040 size 439a0
5442 11:08:07.743243 read SPI 0xfd078 0x439a0: 84380 us, 3281 KB/s, 26.248 Mbps
5443 11:08:07.746559 Checking segment from ROM address 0x0000000040003a00
5444 11:08:07.753212 Checking segment from ROM address 0x0000000040003a1c
5445 11:08:07.756917 Loading segment from ROM address 0x0000000040003a00
5446 11:08:07.760601 code (compression=0)
5447 11:08:07.770496 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5448 11:08:07.776705 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5449 11:08:07.780252 it's not compressed!
5450 11:08:07.783263 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5451 11:08:07.789897 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5452 11:08:07.798145 Loading segment from ROM address 0x0000000040003a1c
5453 11:08:07.801503 Entry Point 0x0000000080000000
5454 11:08:07.801897 Loaded segments
5455 11:08:07.807984 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5456 11:08:07.811077 Jumping to boot code at 0000000080000000(00000000ffeda000)
5457 11:08:07.821140 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5458 11:08:07.824360 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5459 11:08:07.827721 CBFS @ 21000 size 3d4000
5460 11:08:07.834670 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5461 11:08:07.837685 CBFS: Locating 'fallback/bl31'
5462 11:08:07.841160 CBFS: Found @ offset 36dc0 size 5820
5463 11:08:07.852077 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5464 11:08:07.855616 Checking segment from ROM address 0x0000000040003a00
5465 11:08:07.862160 Checking segment from ROM address 0x0000000040003a1c
5466 11:08:07.865283 Loading segment from ROM address 0x0000000040003a00
5467 11:08:07.868565 code (compression=1)
5468 11:08:07.875631 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5469 11:08:07.885017 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5470 11:08:07.885401 using LZMA
5471 11:08:07.893545 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5472 11:08:07.900070 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5473 11:08:07.903400 Loading segment from ROM address 0x0000000040003a1c
5474 11:08:07.906647 Entry Point 0x0000000054601000
5475 11:08:07.906811 Loaded segments
5476 11:08:07.910300 NOTICE: MT8183 bl31_setup
5477 11:08:07.917369 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5478 11:08:07.920531 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5479 11:08:07.923637 INFO: [DEVAPC] dump DEVAPC registers:
5480 11:08:07.934010 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5481 11:08:07.940588 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5482 11:08:07.947044 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5483 11:08:07.957151 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5484 11:08:07.966810 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5485 11:08:07.973446 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5486 11:08:07.983154 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5487 11:08:07.990049 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5488 11:08:07.996800 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5489 11:08:08.006411 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5490 11:08:08.012993 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5491 11:08:08.023511 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5492 11:08:08.030129 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5493 11:08:08.039980 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5494 11:08:08.046563 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5495 11:08:08.053313 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5496 11:08:08.059669 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5497 11:08:08.066241 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5498 11:08:08.076403 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5499 11:08:08.083112 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5500 11:08:08.089643 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5501 11:08:08.096428 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5502 11:08:08.099740 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5503 11:08:08.103016 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5504 11:08:08.106569 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5505 11:08:08.109780 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5506 11:08:08.112570 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5507 11:08:08.119560 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5508 11:08:08.126237 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5509 11:08:08.126323 WARNING: region 0:
5510 11:08:08.129583 WARNING: apc:0x168, sa:0x0, ea:0xfff
5511 11:08:08.132633 WARNING: region 1:
5512 11:08:08.136234 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5513 11:08:08.136322 WARNING: region 2:
5514 11:08:08.139807 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5515 11:08:08.142555 WARNING: region 3:
5516 11:08:08.146220 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5517 11:08:08.149197 WARNING: region 4:
5518 11:08:08.152854 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5519 11:08:08.152940 WARNING: region 5:
5520 11:08:08.155707 WARNING: apc:0x0, sa:0x0, ea:0x0
5521 11:08:08.159078 WARNING: region 6:
5522 11:08:08.162688 WARNING: apc:0x0, sa:0x0, ea:0x0
5523 11:08:08.162774 WARNING: region 7:
5524 11:08:08.165909 WARNING: apc:0x0, sa:0x0, ea:0x0
5525 11:08:08.172516 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5526 11:08:08.176219 INFO: SPM: enable SPMC mode
5527 11:08:08.179470 NOTICE: spm_boot_init() start
5528 11:08:08.183054 NOTICE: spm_boot_init() end
5529 11:08:08.185878 INFO: BL31: Initializing runtime services
5530 11:08:08.192409 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5531 11:08:08.195950 INFO: BL31: Preparing for EL3 exit to normal world
5532 11:08:08.198882 INFO: Entry point address = 0x80000000
5533 11:08:08.202206 INFO: SPSR = 0x8
5534 11:08:08.223096
5535 11:08:08.223184
5536 11:08:08.223268
5537 11:08:08.223758 end: 2.2.3 depthcharge-start (duration 00:00:24) [common]
5538 11:08:08.223871 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5539 11:08:08.223963 Setting prompt string to ['jacuzzi:']
5540 11:08:08.224049 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5541 11:08:08.226702 Starting depthcharge on Juniper...
5542 11:08:08.226789
5543 11:08:08.230068 vboot_handoff: creating legacy vboot_handoff structure
5544 11:08:08.230154
5545 11:08:08.233399 ec_init(0): CrosEC protocol v3 supported (544, 544)
5546 11:08:08.233486
5547 11:08:08.236937 Wipe memory regions:
5548 11:08:08.237023
5549 11:08:08.239630 [0x00000040000000, 0x00000054600000)
5550 11:08:08.283162
5551 11:08:08.283281 [0x00000054660000, 0x00000080000000)
5552 11:08:08.374644
5553 11:08:08.374745 [0x000000811994a0, 0x000000ffeda000)
5554 11:08:08.635075
5555 11:08:08.635226 [0x00000100000000, 0x00000140000000)
5556 11:08:08.767581
5557 11:08:08.770916 Initializing XHCI USB controller at 0x11200000.
5558 11:08:08.794241
5559 11:08:08.796937 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5560 11:08:08.797114
5561 11:08:08.797247
5562 11:08:08.797616 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5563 11:08:08.797786 Sending line: 'tftpboot 192.168.201.1 14786825/tftp-deploy-aimptjqy/kernel/image.itb 14786825/tftp-deploy-aimptjqy/kernel/cmdline '
5565 11:08:08.898391 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5566 11:08:08.898603 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5567 11:08:08.902641 jacuzzi: tftpboot 192.168.201.1 14786825/tftp-deploy-aimptjqy/kernel/image.itbtp-deploy-aimptjqy/kernel/cmdline
5568 11:08:08.902837
5569 11:08:08.902969 Waiting for link
5570 11:08:09.308502
5571 11:08:09.308938 R8152: Initializing
5572 11:08:09.309249
5573 11:08:09.311722 Version 9 (ocp_data = 6010)
5574 11:08:09.312106
5575 11:08:09.315294 R8152: Done initializing
5576 11:08:09.315770
5577 11:08:09.316076 Adding net device
5578 11:08:09.700898
5579 11:08:09.701405 done.
5580 11:08:09.701740
5581 11:08:09.702124 MAC: 00:e0:4c:68:0b:b9
5582 11:08:09.702430
5583 11:08:09.703815 Sending DHCP discover... done.
5584 11:08:09.704243
5585 11:08:09.707663 Waiting for reply... done.
5586 11:08:09.708167
5587 11:08:09.710563 Sending DHCP request... done.
5588 11:08:09.710745
5589 11:08:09.714199 Waiting for reply... done.
5590 11:08:09.714367
5591 11:08:09.714497 My ip is 192.168.201.13
5592 11:08:09.714617
5593 11:08:09.717933 The DHCP server ip is 192.168.201.1
5594 11:08:09.718462
5595 11:08:09.724593 TFTP server IP predefined by user: 192.168.201.1
5596 11:08:09.725107
5597 11:08:09.731353 Bootfile predefined by user: 14786825/tftp-deploy-aimptjqy/kernel/image.itb
5598 11:08:09.731871
5599 11:08:09.732207 Sending tftp read request... done.
5600 11:08:09.734350
5601 11:08:09.740907 Waiting for the transfer...
5602 11:08:09.741326
5603 11:08:10.103965 00000000 ################################################################
5604 11:08:10.104104
5605 11:08:10.383967 00080000 ################################################################
5606 11:08:10.384101
5607 11:08:10.639390 00100000 ################################################################
5608 11:08:10.639518
5609 11:08:10.893893 00180000 ################################################################
5610 11:08:10.894014
5611 11:08:11.158451 00200000 ################################################################
5612 11:08:11.158584
5613 11:08:11.439119 00280000 ################################################################
5614 11:08:11.439240
5615 11:08:11.720575 00300000 ################################################################
5616 11:08:11.720702
5617 11:08:11.975675 00380000 ################################################################
5618 11:08:11.975803
5619 11:08:12.230577 00400000 ################################################################
5620 11:08:12.230714
5621 11:08:12.500901 00480000 ################################################################
5622 11:08:12.501037
5623 11:08:12.789857 00500000 ################################################################
5624 11:08:12.789987
5625 11:08:13.084981 00580000 ################################################################
5626 11:08:13.085116
5627 11:08:13.368849 00600000 ################################################################
5628 11:08:13.368981
5629 11:08:13.667838 00680000 ################################################################
5630 11:08:13.667969
5631 11:08:13.967333 00700000 ################################################################
5632 11:08:13.967465
5633 11:08:14.263624 00780000 ################################################################
5634 11:08:14.263761
5635 11:08:14.533462 00800000 ################################################################
5636 11:08:14.533597
5637 11:08:14.824045 00880000 ################################################################
5638 11:08:14.824183
5639 11:08:15.105576 00900000 ################################################################
5640 11:08:15.105707
5641 11:08:15.395074 00980000 ################################################################
5642 11:08:15.395205
5643 11:08:15.687856 00a00000 ################################################################
5644 11:08:15.687993
5645 11:08:15.956166 00a80000 ################################################################
5646 11:08:15.956296
5647 11:08:16.242946 00b00000 ################################################################
5648 11:08:16.243102
5649 11:08:16.534618 00b80000 ################################################################
5650 11:08:16.534755
5651 11:08:16.834964 00c00000 ################################################################
5652 11:08:16.835093
5653 11:08:17.136759 00c80000 ################################################################
5654 11:08:17.136889
5655 11:08:17.434509 00d00000 ################################################################
5656 11:08:17.434643
5657 11:08:17.717869 00d80000 ################################################################
5658 11:08:17.718005
5659 11:08:18.006733 00e00000 ################################################################
5660 11:08:18.006866
5661 11:08:18.260615 00e80000 ################################################################
5662 11:08:18.260742
5663 11:08:18.524993 00f00000 ################################################################
5664 11:08:18.525158
5665 11:08:18.790615 00f80000 ################################################################
5666 11:08:18.790744
5667 11:08:19.176143 01000000 ################################################################
5668 11:08:19.176638
5669 11:08:19.527366 01080000 ################################################################
5670 11:08:19.527505
5671 11:08:19.805146 01100000 ################################################################
5672 11:08:19.805284
5673 11:08:20.062607 01180000 ################################################################
5674 11:08:20.062738
5675 11:08:20.316321 01200000 ################################################################
5676 11:08:20.316450
5677 11:08:20.583336 01280000 ################################################################
5678 11:08:20.583470
5679 11:08:20.848933 01300000 ################################################################
5680 11:08:20.849067
5681 11:08:21.104081 01380000 ################################################################
5682 11:08:21.104210
5683 11:08:21.358943 01400000 ################################################################
5684 11:08:21.359073
5685 11:08:21.614589 01480000 ################################################################
5686 11:08:21.614723
5687 11:08:21.897478 01500000 ################################################################
5688 11:08:21.897613
5689 11:08:22.169414 01580000 ################################################################
5690 11:08:22.169550
5691 11:08:22.448646 01600000 ################################################################
5692 11:08:22.448781
5693 11:08:22.711492 01680000 ################################################################
5694 11:08:22.711636
5695 11:08:22.969064 01700000 ################################################################
5696 11:08:22.969199
5697 11:08:23.224135 01780000 ################################################################
5698 11:08:23.224277
5699 11:08:23.478548 01800000 ################################################################
5700 11:08:23.478693
5701 11:08:23.732477 01880000 ################################################################
5702 11:08:23.732623
5703 11:08:24.006292 01900000 ################################################################
5704 11:08:24.006413
5705 11:08:24.260235 01980000 ################################################################
5706 11:08:24.260362
5707 11:08:24.531844 01a00000 ################################################################
5708 11:08:24.531994
5709 11:08:24.801223 01a80000 ################################################################
5710 11:08:24.801359
5711 11:08:25.079334 01b00000 ################################################################
5712 11:08:25.079478
5713 11:08:25.362466 01b80000 ################################################################
5714 11:08:25.362591
5715 11:08:25.665057 01c00000 ################################################################
5716 11:08:25.665190
5717 11:08:25.944447 01c80000 ################################################################
5718 11:08:25.944607
5719 11:08:26.225962 01d00000 ################################################################
5720 11:08:26.226100
5721 11:08:26.495862 01d80000 ################################################################
5722 11:08:26.496000
5723 11:08:26.719626 01e00000 #################################################### done.
5724 11:08:26.719760
5725 11:08:26.723166 The bootfile was 31881506 bytes long.
5726 11:08:26.723256
5727 11:08:26.726411 Sending tftp read request... done.
5728 11:08:26.726497
5729 11:08:26.726562 Waiting for the transfer...
5730 11:08:26.726622
5731 11:08:26.729833 00000000 # done.
5732 11:08:26.729920
5733 11:08:26.736324 Command line loaded dynamically from TFTP file: 14786825/tftp-deploy-aimptjqy/kernel/cmdline
5734 11:08:26.736410
5735 11:08:26.762536 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14786825/extract-nfsrootfs-_4sdnrfz,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5736 11:08:26.762633
5737 11:08:26.762698 Loading FIT.
5738 11:08:26.762759
5739 11:08:26.765792 Image ramdisk-1 has 18705510 bytes.
5740 11:08:26.765876
5741 11:08:26.769647 Image fdt-1 has 57695 bytes.
5742 11:08:26.769732
5743 11:08:26.773611 Image kernel-1 has 13116259 bytes.
5744 11:08:26.773696
5745 11:08:26.782923 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5746 11:08:26.783009
5747 11:08:26.792658 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5748 11:08:26.792744
5749 11:08:26.799736 Choosing best match conf-1 for compat google,juniper-sku16.
5750 11:08:26.803178
5751 11:08:26.807989 Connected to device vid:did:rid of 1ae0:0028:00
5752 11:08:26.816220
5753 11:08:26.819404 tpm_get_response: command 0x17b, return code 0x0
5754 11:08:26.819489
5755 11:08:26.822473 tpm_cleanup: add release locality here.
5756 11:08:26.822558
5757 11:08:26.826036 Shutting down all USB controllers.
5758 11:08:26.826120
5759 11:08:26.829392 Removing current net device
5760 11:08:26.829476
5761 11:08:26.832613 Exiting depthcharge with code 4 at timestamp: 35802371
5762 11:08:26.832697
5763 11:08:26.835793 LZMA decompressing kernel-1 to 0x80193568
5764 11:08:26.835878
5765 11:08:26.842823 LZMA decompressing kernel-1 to 0x40000000
5766 11:08:28.705424
5767 11:08:28.705560 jumping to kernel
5768 11:08:28.706080 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
5769 11:08:28.706191 start: 2.2.5 auto-login-action (timeout 00:04:06) [common]
5770 11:08:28.706278 Setting prompt string to ['Linux version [0-9]']
5771 11:08:28.706346 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5772 11:08:28.706432 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5773 11:08:28.780164
5774 11:08:28.783655 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5775 11:08:28.787088 start: 2.2.5.1 login-action (timeout 00:04:06) [common]
5776 11:08:28.787188 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5777 11:08:28.787264 Setting prompt string to []
5778 11:08:28.787345 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5779 11:08:28.787416 Using line separator: #'\n'#
5780 11:08:28.787475 No login prompt set.
5781 11:08:28.787538 Parsing kernel messages
5782 11:08:28.787594 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5783 11:08:28.787700 [login-action] Waiting for messages, (timeout 00:04:06)
5784 11:08:28.787763 Waiting using forced prompt support (timeout 00:02:03)
5785 11:08:28.806766 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j261272-arm64-gcc-12-defconfig-arm64-chromebook-bgdbp) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Wed Jul 10 10:43:20 UTC 2024
5786 11:08:28.809797 [ 0.000000] random: crng init done
5787 11:08:28.813287 [ 0.000000] Machine model: Google juniper sku16 board
5788 11:08:28.816836 [ 0.000000] efi: UEFI not found.
5789 11:08:28.826338 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5790 11:08:28.833138 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5791 11:08:28.840080 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5792 11:08:28.846794 [ 0.000000] printk: bootconsole [mtk8250] enabled
5793 11:08:28.854022 [ 0.000000] NUMA: No NUMA configuration found
5794 11:08:28.860734 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5795 11:08:28.867720 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5796 11:08:28.867806 [ 0.000000] Zone ranges:
5797 11:08:28.874311 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5798 11:08:28.877712 [ 0.000000] DMA32 empty
5799 11:08:28.883827 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5800 11:08:28.887502 [ 0.000000] Movable zone start for each node
5801 11:08:28.890904 [ 0.000000] Early memory node ranges
5802 11:08:28.897477 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5803 11:08:28.903954 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5804 11:08:28.910263 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5805 11:08:28.917017 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5806 11:08:28.923507 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5807 11:08:28.930222 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5808 11:08:28.950960 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5809 11:08:28.957712 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5810 11:08:28.964145 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5811 11:08:28.967213 [ 0.000000] psci: probing for conduit method from DT.
5812 11:08:28.973774 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5813 11:08:28.976987 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5814 11:08:28.983657 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5815 11:08:28.987032 [ 0.000000] psci: SMC Calling Convention v1.1
5816 11:08:28.993608 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5817 11:08:28.997268 [ 0.000000] Detected VIPT I-cache on CPU0
5818 11:08:29.003898 [ 0.000000] CPU features: detected: GIC system register CPU interface
5819 11:08:29.010279 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5820 11:08:29.016739 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5821 11:08:29.023339 [ 0.000000] CPU features: detected: ARM erratum 845719
5822 11:08:29.026524 [ 0.000000] alternatives: applying boot alternatives
5823 11:08:29.029797 [ 0.000000] Fallback order for Node 0: 0
5824 11:08:29.036693 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5825 11:08:29.039615 [ 0.000000] Policy zone: Normal
5826 11:08:29.069923 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14786825/extract-nfsrootfs-_4sdnrfz,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5827 11:08:29.079482 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5828 11:08:29.089676 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5829 11:08:29.096269 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5830 11:08:29.106383 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5831 11:08:29.109472 <6>[ 0.000000] software IO TLB: area num 8.
5832 11:08:29.134688 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5833 11:08:29.192969 <6>[ 0.000000] Memory: 3896804K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 261660K reserved, 32768K cma-reserved)
5834 11:08:29.199611 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5835 11:08:29.206126 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5836 11:08:29.209326 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5837 11:08:29.216008 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5838 11:08:29.222577 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5839 11:08:29.226507 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5840 11:08:29.236249 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5841 11:08:29.242709 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5842 11:08:29.245999 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5843 11:08:29.257787 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5844 11:08:29.264658 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5845 11:08:29.267926 <6>[ 0.000000] GICv3: 640 SPIs implemented
5846 11:08:29.271236 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5847 11:08:29.278007 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5848 11:08:29.281512 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5849 11:08:29.287869 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5850 11:08:29.300952 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5851 11:08:29.311021 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5852 11:08:29.317406 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5853 11:08:29.329717 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5854 11:08:29.342814 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5855 11:08:29.349391 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5856 11:08:29.356590 <6>[ 0.009466] Console: colour dummy device 80x25
5857 11:08:29.359806 <6>[ 0.014502] printk: console [tty1] enabled
5858 11:08:29.370147 <6>[ 0.018891] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5859 11:08:29.376648 <6>[ 0.029356] pid_max: default: 32768 minimum: 301
5860 11:08:29.379866 <6>[ 0.034236] LSM: Security Framework initializing
5861 11:08:29.389757 <6>[ 0.039152] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5862 11:08:29.396502 <6>[ 0.046774] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5863 11:08:29.403228 <4>[ 0.055653] cacheinfo: Unable to detect cache hierarchy for CPU 0
5864 11:08:29.412999 <6>[ 0.062280] cblist_init_generic: Setting adjustable number of callback queues.
5865 11:08:29.420168 <6>[ 0.069725] cblist_init_generic: Setting shift to 3 and lim to 1.
5866 11:08:29.426498 <6>[ 0.076079] cblist_init_generic: Setting adjustable number of callback queues.
5867 11:08:29.433084 <6>[ 0.083524] cblist_init_generic: Setting shift to 3 and lim to 1.
5868 11:08:29.436619 <6>[ 0.089922] rcu: Hierarchical SRCU implementation.
5869 11:08:29.443259 <6>[ 0.094949] rcu: Max phase no-delay instances is 1000.
5870 11:08:29.450187 <6>[ 0.102849] EFI services will not be available.
5871 11:08:29.453326 <6>[ 0.107798] smp: Bringing up secondary CPUs ...
5872 11:08:29.463651 <6>[ 0.113102] Detected VIPT I-cache on CPU1
5873 11:08:29.470194 <4>[ 0.113149] cacheinfo: Unable to detect cache hierarchy for CPU 1
5874 11:08:29.476997 <6>[ 0.113157] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5875 11:08:29.483613 <6>[ 0.113189] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5876 11:08:29.486880 <6>[ 0.113673] Detected VIPT I-cache on CPU2
5877 11:08:29.493504 <4>[ 0.113707] cacheinfo: Unable to detect cache hierarchy for CPU 2
5878 11:08:29.500321 <6>[ 0.113711] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5879 11:08:29.506551 <6>[ 0.113723] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5880 11:08:29.513723 <6>[ 0.114168] Detected VIPT I-cache on CPU3
5881 11:08:29.516485 <4>[ 0.114198] cacheinfo: Unable to detect cache hierarchy for CPU 3
5882 11:08:29.526954 <6>[ 0.114203] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5883 11:08:29.533411 <6>[ 0.114214] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5884 11:08:29.536665 <6>[ 0.114789] CPU features: detected: Spectre-v2
5885 11:08:29.540032 <6>[ 0.114799] CPU features: detected: Spectre-BHB
5886 11:08:29.546540 <6>[ 0.114802] CPU features: detected: ARM erratum 858921
5887 11:08:29.549907 <6>[ 0.114808] Detected VIPT I-cache on CPU4
5888 11:08:29.556754 <4>[ 0.114856] cacheinfo: Unable to detect cache hierarchy for CPU 4
5889 11:08:29.563564 <6>[ 0.114864] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5890 11:08:29.569749 <6>[ 0.114872] arch_timer: Enabling local workaround for ARM erratum 858921
5891 11:08:29.576742 <6>[ 0.114882] arch_timer: CPU4: Trapping CNTVCT access
5892 11:08:29.583236 <6>[ 0.114890] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5893 11:08:29.586602 <6>[ 0.115376] Detected VIPT I-cache on CPU5
5894 11:08:29.593232 <4>[ 0.115417] cacheinfo: Unable to detect cache hierarchy for CPU 5
5895 11:08:29.600075 <6>[ 0.115422] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5896 11:08:29.609808 <6>[ 0.115429] arch_timer: Enabling local workaround for ARM erratum 858921
5897 11:08:29.612824 <6>[ 0.115435] arch_timer: CPU5: Trapping CNTVCT access
5898 11:08:29.619542 <6>[ 0.115440] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5899 11:08:29.623109 <6>[ 0.115876] Detected VIPT I-cache on CPU6
5900 11:08:29.629952 <4>[ 0.115921] cacheinfo: Unable to detect cache hierarchy for CPU 6
5901 11:08:29.636437 <6>[ 0.115928] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5902 11:08:29.646423 <6>[ 0.115934] arch_timer: Enabling local workaround for ARM erratum 858921
5903 11:08:29.649763 <6>[ 0.115941] arch_timer: CPU6: Trapping CNTVCT access
5904 11:08:29.656551 <6>[ 0.115946] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5905 11:08:29.659424 <6>[ 0.116477] Detected VIPT I-cache on CPU7
5906 11:08:29.666689 <4>[ 0.116521] cacheinfo: Unable to detect cache hierarchy for CPU 7
5907 11:08:29.673323 <6>[ 0.116527] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5908 11:08:29.682642 <6>[ 0.116534] arch_timer: Enabling local workaround for ARM erratum 858921
5909 11:08:29.686561 <6>[ 0.116540] arch_timer: CPU7: Trapping CNTVCT access
5910 11:08:29.692839 <6>[ 0.116545] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5911 11:08:29.696113 <6>[ 0.116620] smp: Brought up 1 node, 8 CPUs
5912 11:08:29.702716 <6>[ 0.355497] SMP: Total of 8 processors activated.
5913 11:08:29.709367 <6>[ 0.360434] CPU features: detected: 32-bit EL0 Support
5914 11:08:29.712580 <6>[ 0.365805] CPU features: detected: 32-bit EL1 Support
5915 11:08:29.719295 <6>[ 0.371170] CPU features: detected: CRC32 instructions
5916 11:08:29.722484 <6>[ 0.376597] CPU: All CPU(s) started at EL2
5917 11:08:29.729157 <6>[ 0.380935] alternatives: applying system-wide alternatives
5918 11:08:29.735842 <6>[ 0.388932] devtmpfs: initialized
5919 11:08:29.748131 <6>[ 0.397891] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5920 11:08:29.757996 <6>[ 0.407842] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5921 11:08:29.761597 <6>[ 0.415565] pinctrl core: initialized pinctrl subsystem
5922 11:08:29.769390 <6>[ 0.422668] DMI not present or invalid.
5923 11:08:29.775974 <6>[ 0.427038] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5924 11:08:29.783136 <6>[ 0.433943] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5925 11:08:29.789930 <6>[ 0.441471] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5926 11:08:29.799750 <6>[ 0.449722] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5927 11:08:29.806322 <6>[ 0.457899] audit: initializing netlink subsys (disabled)
5928 11:08:29.813388 <5>[ 0.463605] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5929 11:08:29.820026 <6>[ 0.464580] thermal_sys: Registered thermal governor 'step_wise'
5930 11:08:29.826644 <6>[ 0.471571] thermal_sys: Registered thermal governor 'power_allocator'
5931 11:08:29.829790 <6>[ 0.477870] cpuidle: using governor menu
5932 11:08:29.836642 <6>[ 0.488833] NET: Registered PF_QIPCRTR protocol family
5933 11:08:29.843287 <6>[ 0.494329] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5934 11:08:29.850030 <6>[ 0.501428] ASID allocator initialised with 32768 entries
5935 11:08:29.852735 <6>[ 0.508195] Serial: AMBA PL011 UART driver
5936 11:08:29.866480 <4>[ 0.519518] Trying to register duplicate clock ID: 113
5937 11:08:29.926385 <6>[ 0.576171] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5938 11:08:29.941028 <6>[ 0.590563] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5939 11:08:29.943799 <6>[ 0.600340] KASLR enabled
5940 11:08:29.958379 <6>[ 0.608281] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5941 11:08:29.965073 <6>[ 0.615285] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5942 11:08:29.971637 <6>[ 0.621762] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5943 11:08:29.978071 <6>[ 0.628754] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5944 11:08:29.984781 <6>[ 0.635228] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5945 11:08:29.991640 <6>[ 0.642219] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5946 11:08:29.998473 <6>[ 0.648692] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5947 11:08:30.004886 <6>[ 0.655682] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5948 11:08:30.008364 <6>[ 0.663286] ACPI: Interpreter disabled.
5949 11:08:30.017937 <6>[ 0.671268] iommu: Default domain type: Translated
5950 11:08:30.025135 <6>[ 0.676377] iommu: DMA domain TLB invalidation policy: strict mode
5951 11:08:30.028128 <5>[ 0.683006] SCSI subsystem initialized
5952 11:08:30.034795 <6>[ 0.687420] usbcore: registered new interface driver usbfs
5953 11:08:30.041855 <6>[ 0.693148] usbcore: registered new interface driver hub
5954 11:08:30.044973 <6>[ 0.698688] usbcore: registered new device driver usb
5955 11:08:30.051920 <6>[ 0.704991] pps_core: LinuxPPS API ver. 1 registered
5956 11:08:30.061808 <6>[ 0.710176] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5957 11:08:30.065099 <6>[ 0.719500] PTP clock support registered
5958 11:08:30.068424 <6>[ 0.723753] EDAC MC: Ver: 3.0.0
5959 11:08:30.076505 <6>[ 0.729387] FPGA manager framework
5960 11:08:30.079848 <6>[ 0.733068] Advanced Linux Sound Architecture Driver Initialized.
5961 11:08:30.083484 <6>[ 0.739822] vgaarb: loaded
5962 11:08:30.090351 <6>[ 0.742950] clocksource: Switched to clocksource arch_sys_counter
5963 11:08:30.097326 <5>[ 0.749387] VFS: Disk quotas dquot_6.6.0
5964 11:08:30.104282 <6>[ 0.753560] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5965 11:08:30.106967 <6>[ 0.760736] pnp: PnP ACPI: disabled
5966 11:08:30.114660 <6>[ 0.767621] NET: Registered PF_INET protocol family
5967 11:08:30.121606 <6>[ 0.772851] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5968 11:08:30.133690 <6>[ 0.782766] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5969 11:08:30.140023 <6>[ 0.791522] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5970 11:08:30.149983 <6>[ 0.799473] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5971 11:08:30.156724 <6>[ 0.807705] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5972 11:08:30.163237 <6>[ 0.815798] TCP: Hash tables configured (established 32768 bind 32768)
5973 11:08:30.173397 <6>[ 0.822624] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5974 11:08:30.179873 <6>[ 0.829599] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5975 11:08:30.186694 <6>[ 0.837081] NET: Registered PF_UNIX/PF_LOCAL protocol family
5976 11:08:30.189999 <6>[ 0.843183] RPC: Registered named UNIX socket transport module.
5977 11:08:30.196146 <6>[ 0.849328] RPC: Registered udp transport module.
5978 11:08:30.200067 <6>[ 0.854252] RPC: Registered tcp transport module.
5979 11:08:30.206409 <6>[ 0.859175] RPC: Registered tcp NFSv4.1 backchannel transport module.
5980 11:08:30.212950 <6>[ 0.865828] PCI: CLS 0 bytes, default 64
5981 11:08:30.216284 <6>[ 0.870089] Unpacking initramfs...
5982 11:08:30.234148 <6>[ 0.883556] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5983 11:08:30.244056 <6>[ 0.892296] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5984 11:08:30.247105 <6>[ 0.901216] kvm [1]: IPA Size Limit: 40 bits
5985 11:08:30.254767 <6>[ 0.907569] kvm [1]: vgic-v2@c420000
5986 11:08:30.258332 <6>[ 0.911405] kvm [1]: GIC system register CPU interface enabled
5987 11:08:30.264731 <6>[ 0.917591] kvm [1]: vgic interrupt IRQ18
5988 11:08:30.268065 <6>[ 0.921973] kvm [1]: Hyp mode initialized successfully
5989 11:08:30.275760 <5>[ 0.928322] Initialise system trusted keyrings
5990 11:08:30.281935 <6>[ 0.933172] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5991 11:08:30.290234 <6>[ 0.943092] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5992 11:08:30.296882 <5>[ 0.949522] NFS: Registering the id_resolver key type
5993 11:08:30.300783 <5>[ 0.954838] Key type id_resolver registered
5994 11:08:30.307087 <5>[ 0.959250] Key type id_legacy registered
5995 11:08:30.313782 <6>[ 0.963552] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5996 11:08:30.320610 <6>[ 0.970474] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5997 11:08:30.326974 <6>[ 0.978239] 9p: Installing v9fs 9p2000 file system support
5998 11:08:30.354661 <5>[ 1.007360] Key type asymmetric registered
5999 11:08:30.357918 <5>[ 1.011706] Asymmetric key parser 'x509' registered
6000 11:08:30.367981 <6>[ 1.016856] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6001 11:08:30.371358 <6>[ 1.024478] io scheduler mq-deadline registered
6002 11:08:30.374354 <6>[ 1.029236] io scheduler kyber registered
6003 11:08:30.397255 <6>[ 1.049996] EINJ: ACPI disabled.
6004 11:08:30.403975 <4>[ 1.053766] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6005 11:08:30.441833 <6>[ 1.094439] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6006 11:08:30.450378 <6>[ 1.102907] printk: console [ttyS0] disabled
6007 11:08:30.478612 <6>[ 1.127561] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6008 11:08:30.484911 <6>[ 1.137036] printk: console [ttyS0] enabled
6009 11:08:30.487978 <6>[ 1.137036] printk: console [ttyS0] enabled
6010 11:08:30.494973 <6>[ 1.145953] printk: bootconsole [mtk8250] disabled
6011 11:08:30.498332 <6>[ 1.145953] printk: bootconsole [mtk8250] disabled
6012 11:08:30.507789 <3>[ 1.156476] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6013 11:08:30.514830 <3>[ 1.164859] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6014 11:08:30.543636 <6>[ 1.193258] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6015 11:08:30.550758 <6>[ 1.202911] serial serial0: tty port ttyS1 registered
6016 11:08:30.557351 <6>[ 1.209473] SuperH (H)SCI(F) driver initialized
6017 11:08:30.560442 <6>[ 1.214937] msm_serial: driver initialized
6018 11:08:30.576118 <6>[ 1.225233] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6019 11:08:30.585737 <6>[ 1.233836] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6020 11:08:30.592250 <6>[ 1.242413] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6021 11:08:30.602556 <6>[ 1.250989] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6022 11:08:30.608965 <6>[ 1.259646] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6023 11:08:30.618856 <6>[ 1.268308] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6024 11:08:30.629205 <6>[ 1.277047] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6025 11:08:30.635813 <6>[ 1.285786] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6026 11:08:30.645645 <6>[ 1.294349] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6027 11:08:30.652272 <6>[ 1.303148] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6028 11:08:30.662660 <4>[ 1.315522] cacheinfo: Unable to detect cache hierarchy for CPU 0
6029 11:08:30.672260 <6>[ 1.324848] loop: module loaded
6030 11:08:30.684219 <6>[ 1.336784] vsim1: Bringing 1800000uV into 2700000-2700000uV
6031 11:08:30.701419 <6>[ 1.354642] megasas: 07.719.03.00-rc1
6032 11:08:30.710120 <6>[ 1.363395] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6033 11:08:30.717432 <6>[ 1.370344] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6034 11:08:30.734289 <6>[ 1.387217] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6035 11:08:30.791599 <6>[ 1.437636] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6036 11:08:30.846565 <6>[ 1.499711] Freeing initrd memory: 18264K
6037 11:08:30.861920 <4>[ 1.511538] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6038 11:08:30.868563 <4>[ 1.520766] CPU: 5 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
6039 11:08:30.875323 <4>[ 1.527465] Hardware name: Google juniper sku16 board (DT)
6040 11:08:30.878882 <4>[ 1.533204] Call trace:
6041 11:08:30.882208 <4>[ 1.535905] dump_backtrace.part.0+0xe0/0xf0
6042 11:08:30.885568 <4>[ 1.540442] show_stack+0x18/0x30
6043 11:08:30.888681 <4>[ 1.544015] dump_stack_lvl+0x64/0x80
6044 11:08:30.891989 <4>[ 1.547935] dump_stack+0x18/0x34
6045 11:08:30.898499 <4>[ 1.551504] sysfs_warn_dup+0x64/0x80
6046 11:08:30.901864 <4>[ 1.555426] sysfs_do_create_link_sd+0xf0/0x100
6047 11:08:30.905310 <4>[ 1.560214] sysfs_create_link+0x20/0x40
6048 11:08:30.911623 <4>[ 1.564393] bus_add_device+0x64/0x120
6049 11:08:30.915097 <4>[ 1.568398] device_add+0x354/0x7ec
6050 11:08:30.918704 <4>[ 1.572144] of_device_add+0x44/0x60
6051 11:08:30.922010 <4>[ 1.575977] of_platform_device_create_pdata+0x90/0x124
6052 11:08:30.928413 <4>[ 1.581459] of_platform_bus_create+0x154/0x380
6053 11:08:30.931992 <4>[ 1.586245] of_platform_populate+0x50/0xfc
6054 11:08:30.938513 <4>[ 1.590684] parse_mtd_partitions+0x1d8/0x4e0
6055 11:08:30.941713 <4>[ 1.595299] mtd_device_parse_register+0xec/0x2e0
6056 11:08:30.945157 <4>[ 1.600261] spi_nor_probe+0x280/0x2f4
6057 11:08:30.948631 <4>[ 1.604265] spi_mem_probe+0x6c/0xc0
6058 11:08:30.955116 <4>[ 1.608098] spi_probe+0x84/0xe4
6059 11:08:30.958496 <4>[ 1.611583] really_probe+0xbc/0x2dc
6060 11:08:30.962116 <4>[ 1.615413] __driver_probe_device+0x78/0x114
6061 11:08:30.965104 <4>[ 1.620025] driver_probe_device+0xd8/0x15c
6062 11:08:30.971883 <4>[ 1.624463] __device_attach_driver+0xb8/0x134
6063 11:08:30.974998 <4>[ 1.629162] bus_for_each_drv+0x7c/0xd4
6064 11:08:30.978652 <4>[ 1.633256] __device_attach+0x9c/0x1a0
6065 11:08:30.985459 <4>[ 1.637345] device_initial_probe+0x14/0x20
6066 11:08:30.988415 <4>[ 1.641783] bus_probe_device+0x98/0xa0
6067 11:08:30.991782 <4>[ 1.645873] device_add+0x3c0/0x7ec
6068 11:08:30.995076 <4>[ 1.649617] __spi_add_device+0x78/0x120
6069 11:08:30.998368 <4>[ 1.653795] spi_add_device+0x44/0x80
6070 11:08:31.004952 <4>[ 1.657712] spi_register_controller+0x704/0xb20
6071 11:08:31.008962 <4>[ 1.662583] devm_spi_register_controller+0x4c/0xac
6072 11:08:31.015041 <4>[ 1.667717] mtk_spi_probe+0x4f4/0x684
6073 11:08:31.018879 <4>[ 1.671722] platform_probe+0x68/0xc0
6074 11:08:31.022097 <4>[ 1.675641] really_probe+0xbc/0x2dc
6075 11:08:31.025201 <4>[ 1.679470] __driver_probe_device+0x78/0x114
6076 11:08:31.032027 <4>[ 1.684081] driver_probe_device+0xd8/0x15c
6077 11:08:31.035508 <4>[ 1.688519] __driver_attach+0x94/0x19c
6078 11:08:31.038531 <4>[ 1.692609] bus_for_each_dev+0x74/0xd0
6079 11:08:31.042159 <4>[ 1.696702] driver_attach+0x24/0x30
6080 11:08:31.045505 <4>[ 1.700531] bus_add_driver+0x154/0x20c
6081 11:08:31.052211 <4>[ 1.704621] driver_register+0x78/0x130
6082 11:08:31.055074 <4>[ 1.708711] __platform_driver_register+0x28/0x34
6083 11:08:31.058220 <4>[ 1.713671] mtk_spi_driver_init+0x1c/0x28
6084 11:08:31.064898 <4>[ 1.718027] do_one_initcall+0x64/0x1dc
6085 11:08:31.068244 <4>[ 1.722117] kernel_init_freeable+0x218/0x284
6086 11:08:31.071897 <4>[ 1.726733] kernel_init+0x24/0x12c
6087 11:08:31.074962 <4>[ 1.730477] ret_from_fork+0x10/0x20
6088 11:08:31.086325 <6>[ 1.739337] tun: Universal TUN/TAP device driver, 1.6
6089 11:08:31.089695 <6>[ 1.745629] thunder_xcv, ver 1.0
6090 11:08:31.092938 <6>[ 1.749145] thunder_bgx, ver 1.0
6091 11:08:31.096693 <6>[ 1.752648] nicpf, ver 1.0
6092 11:08:31.107293 <6>[ 1.757028] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6093 11:08:31.110764 <6>[ 1.764515] hns3: Copyright (c) 2017 Huawei Corporation.
6094 11:08:31.114130 <6>[ 1.770120] hclge is initializing
6095 11:08:31.120908 <6>[ 1.773708] e1000: Intel(R) PRO/1000 Network Driver
6096 11:08:31.127580 <6>[ 1.778844] e1000: Copyright (c) 1999-2006 Intel Corporation.
6097 11:08:31.130979 <6>[ 1.784865] e1000e: Intel(R) PRO/1000 Network Driver
6098 11:08:31.137373 <6>[ 1.790087] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6099 11:08:31.144105 <6>[ 1.796283] igb: Intel(R) Gigabit Ethernet Network Driver
6100 11:08:31.150754 <6>[ 1.801939] igb: Copyright (c) 2007-2014 Intel Corporation.
6101 11:08:31.157560 <6>[ 1.807783] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6102 11:08:31.160662 <6>[ 1.814309] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6103 11:08:31.167726 <6>[ 1.820869] sky2: driver version 1.30
6104 11:08:31.174340 <6>[ 1.826127] usbcore: registered new device driver r8152-cfgselector
6105 11:08:31.180998 <6>[ 1.832669] usbcore: registered new interface driver r8152
6106 11:08:31.184931 <6>[ 1.838500] VFIO - User Level meta-driver version: 0.3
6107 11:08:31.193059 <6>[ 1.846314] mtu3 11201000.usb: uwk - reg:0x420, version:101
6108 11:08:31.199780 <4>[ 1.852187] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6109 11:08:31.207042 <6>[ 1.859465] mtu3 11201000.usb: dr_mode: 1, drd: auto
6110 11:08:31.213617 <6>[ 1.864692] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6111 11:08:31.216732 <6>[ 1.870877] mtu3 11201000.usb: usb3-drd: 0
6112 11:08:31.226511 <6>[ 1.876447] mtu3 11201000.usb: xHCI platform device register success...
6113 11:08:31.233384 <4>[ 1.885049] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6114 11:08:31.240382 <6>[ 1.892993] xhci-mtk 11200000.usb: xHCI Host Controller
6115 11:08:31.247103 <6>[ 1.898502] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6116 11:08:31.253390 <6>[ 1.906239] xhci-mtk 11200000.usb: USB3 root hub has no ports
6117 11:08:31.263450 <6>[ 1.912248] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6118 11:08:31.270567 <6>[ 1.921673] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6119 11:08:31.274176 <6>[ 1.927737] xhci-mtk 11200000.usb: xHCI Host Controller
6120 11:08:31.283964 <6>[ 1.933227] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6121 11:08:31.290422 <6>[ 1.940888] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6122 11:08:31.293625 <6>[ 1.947715] hub 1-0:1.0: USB hub found
6123 11:08:31.296953 <6>[ 1.951744] hub 1-0:1.0: 1 port detected
6124 11:08:31.307458 <6>[ 1.957098] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6125 11:08:31.310892 <6>[ 1.965735] hub 2-0:1.0: USB hub found
6126 11:08:31.320930 <3>[ 1.969786] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6127 11:08:31.327228 <6>[ 1.977678] usbcore: registered new interface driver usb-storage
6128 11:08:31.333972 <6>[ 1.984288] usbcore: registered new device driver onboard-usb-hub
6129 11:08:31.345171 <4>[ 1.995064] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6130 11:08:31.354241 <6>[ 2.007285] mt6397-rtc mt6358-rtc: registered as rtc0
6131 11:08:31.364543 <6>[ 2.012765] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-10T11:08:25 UTC (1720609705)
6132 11:08:31.367772 <6>[ 2.022640] i2c_dev: i2c /dev entries driver
6133 11:08:31.379531 <6>[ 2.029066] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6134 11:08:31.389216 <6>[ 2.037407] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6135 11:08:31.392575 <6>[ 2.046312] i2c 4-0058: Fixed dependency cycle(s) with /panel
6136 11:08:31.402498 <6>[ 2.052345] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6137 11:08:31.418872 <6>[ 2.071817] cpu cpu0: EM: created perf domain
6138 11:08:31.428958 <6>[ 2.077307] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6139 11:08:31.435438 <6>[ 2.088597] cpu cpu4: EM: created perf domain
6140 11:08:31.442277 <6>[ 2.095368] sdhci: Secure Digital Host Controller Interface driver
6141 11:08:31.449206 <6>[ 2.101824] sdhci: Copyright(c) Pierre Ossman
6142 11:08:31.455567 <6>[ 2.107247] Synopsys Designware Multimedia Card Interface Driver
6143 11:08:31.462419 <6>[ 2.107726] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6144 11:08:31.465883 <6>[ 2.114300] sdhci-pltfm: SDHCI platform and OF driver helper
6145 11:08:31.474769 <6>[ 2.128017] ledtrig-cpu: registered to indicate activity on CPUs
6146 11:08:31.482718 <6>[ 2.135768] usbcore: registered new interface driver usbhid
6147 11:08:31.486169 <6>[ 2.141611] usbhid: USB HID core driver
6148 11:08:31.496884 <6>[ 2.145874] spi_master spi2: will run message pump with realtime priority
6149 11:08:31.500362 <4>[ 2.145877] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6150 11:08:31.507682 <4>[ 2.160130] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6151 11:08:31.521175 <6>[ 2.165422] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6152 11:08:31.539535 <6>[ 2.182592] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6153 11:08:31.546022 <4>[ 2.192919] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6154 11:08:31.549372 <6>[ 2.197415] cros-ec-spi spi2.0: Chrome EC device registered
6155 11:08:31.562680 <4>[ 2.212232] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6156 11:08:31.573808 <4>[ 2.223425] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6157 11:08:31.580435 <4>[ 2.232301] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6158 11:08:31.590565 <6>[ 2.243447] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6159 11:08:31.597194 <6>[ 2.248357] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6160 11:08:31.604288 <6>[ 2.251684] mmc0: new HS400 MMC card at address 0001
6161 11:08:31.611040 <6>[ 2.262736] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6162 11:08:31.620785 <6>[ 2.269921] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6163 11:08:31.627605 <6>[ 2.273033] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6164 11:08:31.637707 <6>[ 2.282191] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6165 11:08:31.644117 <6>[ 2.288131] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6166 11:08:31.647674 <6>[ 2.296794] NET: Registered PF_PACKET protocol family
6167 11:08:31.654256 <6>[ 2.301990] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6168 11:08:31.657448 <6>[ 2.306151] 9pnet: Installing 9P2000 support
6169 11:08:31.670615 <6>[ 2.310746] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6170 11:08:31.680597 <6>[ 2.311272] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6171 11:08:31.687601 <6>[ 2.312442] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6172 11:08:31.690982 <5>[ 2.315749] Key type dns_resolver registered
6173 11:08:31.697547 <6>[ 2.349352] registered taskstats version 1
6174 11:08:31.700399 <5>[ 2.353720] Loading compiled-in X.509 certificates
6175 11:08:31.725841 <6>[ 2.374971] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6176 11:08:31.748185 <3>[ 2.397782] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6177 11:08:31.780099 <6>[ 2.426626] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6178 11:08:31.791107 <6>[ 2.440964] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6179 11:08:31.800912 <6>[ 2.449567] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6180 11:08:31.808031 <6>[ 2.458098] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6181 11:08:31.818065 <6>[ 2.466768] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6182 11:08:31.824397 <6>[ 2.475324] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6183 11:08:31.834229 <6>[ 2.483846] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6184 11:08:31.844517 <6>[ 2.492367] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6185 11:08:31.851172 <6>[ 2.501652] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6186 11:08:31.857599 <6>[ 2.509210] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6187 11:08:31.864324 <6>[ 2.516523] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6188 11:08:31.870714 <6>[ 2.523788] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6189 11:08:31.877346 <6>[ 2.530006] hub 1-1:1.0: USB hub found
6190 11:08:31.884124 <6>[ 2.531259] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6191 11:08:31.887768 <6>[ 2.534865] hub 1-1:1.0: 3 ports detected
6192 11:08:31.893883 <6>[ 2.542812] panfrost 13040000.gpu: clock rate = 511999970
6193 11:08:31.903663 <6>[ 2.551131] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6194 11:08:31.910247 <6>[ 2.561342] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6195 11:08:31.920645 <6>[ 2.569354] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6196 11:08:31.930035 <6>[ 2.577787] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6197 11:08:31.936774 <6>[ 2.589864] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6198 11:08:31.950260 <6>[ 2.599811] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6199 11:08:31.960320 <6>[ 2.608825] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6200 11:08:31.970340 <6>[ 2.617976] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6201 11:08:31.976673 <6>[ 2.627108] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6202 11:08:31.986667 <6>[ 2.636236] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6203 11:08:31.996601 <6>[ 2.645538] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6204 11:08:32.006926 <6>[ 2.654839] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6205 11:08:32.016851 <6>[ 2.664313] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6206 11:08:32.023360 <6>[ 2.673792] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6207 11:08:32.033167 <6>[ 2.682921] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6208 11:08:32.106679 <6>[ 2.756290] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6209 11:08:32.116208 <6>[ 2.765202] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6210 11:08:32.127651 <6>[ 2.777011] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6211 11:08:32.185261 <6>[ 2.834986] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6212 11:08:32.830303 <6>[ 3.027334] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6213 11:08:32.840050 <4>[ 3.144169] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6214 11:08:32.846623 <4>[ 3.144186] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6215 11:08:32.853557 <6>[ 3.179961] r8152 1-1.2:1.0 eth0: v1.12.13
6216 11:08:32.860314 <6>[ 3.258980] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6217 11:08:32.867071 <6>[ 3.463430] Console: switching to colour frame buffer device 170x48
6218 11:08:32.873474 <6>[ 3.524070] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6219 11:08:32.894848 <6>[ 3.541183] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6220 11:08:32.914265 <6>[ 3.560538] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6221 11:08:32.920865 <6>[ 3.572818] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6222 11:08:32.931149 <6>[ 3.581016] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6223 11:08:32.941010 <6>[ 3.587961] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6224 11:08:32.961418 <6>[ 3.608035] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6225 11:08:34.275654 <6>[ 4.927877] r8152 1-1.2:1.0 eth0: carrier on
6226 11:08:37.222135 <5>[ 4.954982] Sending DHCP requests .., OK
6227 11:08:37.229098 <6>[ 7.879340] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6228 11:08:37.232559 <6>[ 7.887788] IP-Config: Complete:
6229 11:08:37.245593 <6>[ 7.891354] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6230 11:08:37.255518 <6>[ 7.902252] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6231 11:08:37.267883 <6>[ 7.916622] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6232 11:08:37.275936 <6>[ 7.916632] nameserver0=192.168.201.1
6233 11:08:37.284262 <6>[ 7.936612] clk: Disabling unused clocks
6234 11:08:37.288981 <6>[ 7.944611] ALSA device list:
6235 11:08:37.297723 <6>[ 7.950515] No soundcards found.
6236 11:08:37.307404 <6>[ 7.959592] Freeing unused kernel memory: 8512K
6237 11:08:37.314408 <6>[ 7.966733] Run /init as init process
6238 11:08:37.325185 Loading, please wait...
6239 11:08:37.357012 Starting systemd-udevd version 252.22-1~deb12u1
6240 11:08:37.700238 <3>[ 8.346331] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6241 11:08:37.707283 <6>[ 8.346417] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6242 11:08:37.713649 <3>[ 8.348503] thermal_sys: Failed to find 'trips' node
6243 11:08:37.720525 <3>[ 8.348512] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6244 11:08:37.730720 <3>[ 8.348521] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6245 11:08:37.737058 <4>[ 8.348526] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6246 11:08:37.743926 <3>[ 8.351394] thermal_sys: Failed to find 'trips' node
6247 11:08:37.750736 <3>[ 8.351402] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6248 11:08:37.762285 <3>[ 8.351408] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6249 11:08:37.772916 <4>[ 8.351412] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6250 11:08:37.779231 <3>[ 8.356373] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6251 11:08:37.794105 <3>[ 8.356382] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6252 11:08:37.801157 <3>[ 8.356387] elan_i2c 2-0015: Error applying setting, reverse things back
6253 11:08:37.811097 <6>[ 8.356732] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6254 11:08:37.817443 <4>[ 8.370004] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6255 11:08:37.827600 <3>[ 8.370741] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6256 11:08:37.834487 <3>[ 8.370761] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6257 11:08:37.844100 <3>[ 8.370767] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6258 11:08:37.854149 <3>[ 8.370823] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6259 11:08:37.861024 <3>[ 8.370828] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6260 11:08:37.871236 <3>[ 8.370835] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6261 11:08:37.881195 <3>[ 8.370843] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6262 11:08:37.888241 <3>[ 8.370847] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6263 11:08:37.897565 <3>[ 8.370901] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6264 11:08:37.904397 <3>[ 8.374258] thermal_sys: Failed to find 'trips' node
6265 11:08:37.911065 <4>[ 8.379070] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6266 11:08:37.917705 <3>[ 8.387402] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6267 11:08:37.928012 <3>[ 8.387415] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6268 11:08:37.934370 <4>[ 8.387420] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6269 11:08:37.943889 <4>[ 8.390686] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6270 11:08:37.950812 <6>[ 8.444408] mc: Linux media interface: v0.10
6271 11:08:37.960482 <6>[ 8.452012] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6272 11:08:37.967617 <5>[ 8.459638] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6273 11:08:37.973702 <6>[ 8.467178] cs_system_cfg: CoreSight Configuration manager initialised
6274 11:08:37.983814 <6>[ 8.471393] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6275 11:08:37.993943 <6>[ 8.474762] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6276 11:08:38.000752 <6>[ 8.475536] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6277 11:08:38.010612 <6>[ 8.477116] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6278 11:08:38.020331 <3>[ 8.487500] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6279 11:08:38.027444 <5>[ 8.490478] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6280 11:08:38.037107 <5>[ 8.490972] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6281 11:08:38.047018 <4>[ 8.491056] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6282 11:08:38.050266 <6>[ 8.491065] cfg80211: failed to load regulatory.db
6283 11:08:38.057893 <6>[ 8.493521] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6284 11:08:38.067493 <6>[ 8.534742] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6285 11:08:38.081924 <6>[ 8.538189] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6286 11:08:38.090739 <6>[ 8.556287] videodev: Linux video capture interface: v2.00
6287 11:08:38.101237 <3>[ 8.556888] mtk-scp 10500000.scp: invalid resource
6288 11:08:38.114100 <6>[ 8.556956] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6289 11:08:38.122647 <6>[ 8.557874] remoteproc remoteproc0: scp is available
6290 11:08:38.135844 <4>[ 8.557943] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6291 11:08:38.145202 <6>[ 8.557949] remoteproc remoteproc0: powering up scp
6292 11:08:38.158196 <4>[ 8.557964] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6293 11:08:38.167285 <3>[ 8.557967] remoteproc remoteproc0: request_firmware failed: -2
6294 11:08:38.181199 <6>[ 8.561337] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6295 11:08:38.190048 <6>[ 8.577281] Bluetooth: Core ver 2.22
6296 11:08:38.200882 <6>[ 8.584995] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6297 11:08:38.209084 <6>[ 8.592428] NET: Registered PF_BLUETOOTH protocol family
6298 11:08:38.221619 <6>[ 8.602413] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6299 11:08:38.230027 <6>[ 8.607081] Bluetooth: HCI device and connection manager initialized
6300 11:08:38.244080 <6>[ 8.617000] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6301 11:08:38.252578 <6>[ 8.624909] Bluetooth: HCI socket layer initialized
6302 11:08:38.260026 <6>[ 8.625411] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6303 11:08:38.267182 <6>[ 8.632706] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6304 11:08:38.270316 <6>[ 8.642757] Bluetooth: L2CAP socket layer initialized
6305 11:08:38.277689 <6>[ 8.650901] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6306 11:08:38.287503 Begin: Loading e<6>[ 8.651565] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6307 11:08:38.287589 ssential drivers ... done.
6308 11:08:38.294176 Begin: Running /scri<6>[ 8.658308] Bluetooth: SCO socket layer initialized
6309 11:08:38.297568 pts/init-premount ... done.
6310 11:08:38.310747 Beg<3>[ 8.658610] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6311 11:08:38.323693 in: Mounting root file system ..<6>[ 8.661102] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6312 11:08:38.333908 . Begin: Running /scripts/nfs-to<6>[ 8.661323] usbcore: registered new interface driver uvcvideo
6313 11:08:38.333995 p ... done.
6314 11:08:38.343682 Begin: Running /scr<6>[ 8.666655] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6315 11:08:38.353839 ipts/nfs-premount ... Waiting up<3>[ 8.679403] debugfs: File 'Playback' in directory 'dapm' already present!
6316 11:08:38.366622 to 60 secs for any ethernet to <6>[ 8.695551] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6317 11:08:38.370140 become available
6318 11:08:38.376483 Device /sys/cl<3>[ 8.703445] debugfs: File 'Capture' in directory 'dapm' already present!
6319 11:08:38.379987 ass/net/eth0 found
6320 11:08:38.380070 done.
6321 11:08:38.390533 Begin<6>[ 8.706236] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6322 11:08:38.403882 : Waiting up to 180 secs for any<6>[ 8.708882] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6323 11:08:38.410273 network device to become availa<6>[ 8.708916] Bluetooth: HCI UART driver ver 2.3
6324 11:08:38.410359 ble ... done.
6325 11:08:38.416938 <6>[ 8.708922] Bluetooth: HCI UART protocol H4 registered
6326 11:08:38.423469 <6>[ 8.708961] Bluetooth: HCI UART protocol LL registered
6327 11:08:38.430428 <6>[ 8.708974] Bluetooth: HCI UART protocol Three-wire (H5) registered
6328 11:08:38.438689 <6>[ 8.709320] Bluetooth: HCI UART protocol Broadcom registered
6329 11:08:38.446335 <6>[ 8.709345] Bluetooth: HCI UART protocol QCA registered
6330 11:08:38.453243 <6>[ 8.709357] Bluetooth: HCI UART protocol Marvell registered
6331 11:08:38.460816 <6>[ 8.710475] Bluetooth: hci0: setting up ROME/QCA6390
6332 11:08:38.471339 <4>[ 8.905335] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6333 11:08:38.478083 <4>[ 8.905335] Fallback method does not support PEC.
6334 11:08:38.487846 <6>[ 8.910897] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6335 11:08:38.498803 <3>[ 8.919774] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6336 11:08:38.505650 <3>[ 8.925700] Bluetooth: hci0: Frame reassembly failed (-84)
6337 11:08:38.516242 <3>[ 8.934986] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6338 11:08:38.521584 <6>[ 9.082719] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6339 11:08:38.549099 <6>[ 9.201563] Bluetooth: hci0: QCA Product ID :0x00000008
6340 11:08:38.600352 <6>[ 9.252839] Bluetooth: hci0: QCA SOC Version :0x00000044
6341 11:08:38.608758 <6>[ 9.261121] Bluetooth: hci0: QCA ROM Version :0x00000302
6342 11:08:38.616864 <6>[ 9.269091] Bluetooth: hci0: QCA Patch Version:0x00000111
6343 11:08:38.624565 <6>[ 9.276867] Bluetooth: hci0: QCA controller version 0x00440302
6344 11:08:38.635544 <6>[ 9.284822] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6345 11:08:38.645213 <4>[ 9.293512] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6346 11:08:38.655141 IP-Config: eth0 <3>[ 9.303669] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6347 11:08:38.661789 hardware address<3>[ 9.313552] Bluetooth: hci0: QCA Failed to download patch (-2)
6348 11:08:38.664834 00:e0:4c:68:0b:b9 mtu 1500 DHCP
6349 11:08:38.671812 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6350 11:08:38.678182 address: 192.168.201.13 broadcast: 192.168.201.255 netmask: 255.255.255.0
6351 11:08:38.684831 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6352 11:08:38.691606 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-0
6353 11:08:38.698188 domain : lava-rack
6354 11:08:38.701364 rootserver: 192.168.201.1 rootpath:
6355 11:08:38.702178 filename :
6356 11:08:38.750894 done.
6357 11:08:38.758279 Begin: Running /scripts/nfs-bottom ... done.
6358 11:08:38.775145 Begin: Running /scripts/init-bottom ... done.
6359 11:08:38.905026 <6>[ 9.554089] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6360 11:08:38.985217 <4>[ 9.634532] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6361 11:08:39.007043 <4>[ 9.656080] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6362 11:08:39.022433 <4>[ 9.671652] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6363 11:08:39.032657 <4>[ 9.685105] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6364 11:08:40.165438 <6>[ 10.818426] NET: Registered PF_INET6 protocol family
6365 11:08:40.178087 <6>[ 10.830925] Segment Routing with IPv6
6366 11:08:40.187424 <6>[ 10.839349] In-situ OAM (IOAM) with IPv6
6367 11:08:40.368024 <30>[ 10.994486] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6368 11:08:40.388780 <30>[ 11.041533] systemd[1]: Detected architecture arm64.
6369 11:08:40.398678
6370 11:08:40.401770 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6371 11:08:40.401876
6372 11:08:40.427279 <30>[ 11.080065] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6373 11:08:41.398314 <30>[ 12.047962] systemd[1]: Queued start job for default target graphical.target.
6374 11:08:41.433965 <30>[ 12.083703] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6375 11:08:41.446560 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6376 11:08:41.463653 <30>[ 12.113179] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6377 11:08:41.476856 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6378 11:08:41.496356 <30>[ 12.145532] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6379 11:08:41.510174 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6380 11:08:41.527199 <30>[ 12.176544] systemd[1]: Created slice user.slice - User and Session Slice.
6381 11:08:41.538840 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6382 11:08:41.561696 <30>[ 12.207551] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6383 11:08:41.574168 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6384 11:08:41.593328 <30>[ 12.239365] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6385 11:08:41.605362 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6386 11:08:41.631864 <30>[ 12.271348] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6387 11:08:41.651217 <30>[ 12.300334] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6388 11:08:41.658710 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6389 11:08:41.677925 <30>[ 12.327148] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6390 11:08:41.691068 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6391 11:08:41.710380 <30>[ 12.359207] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6392 11:08:41.724174 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6393 11:08:41.738608 <30>[ 12.391230] systemd[1]: Reached target paths.target - Path Units.
6394 11:08:41.751759 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6395 11:08:41.765873 <30>[ 12.415189] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6396 11:08:41.778776 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6397 11:08:41.790659 <30>[ 12.443115] systemd[1]: Reached target slices.target - Slice Units.
6398 11:08:41.805543 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6399 11:08:41.818893 <30>[ 12.471174] systemd[1]: Reached target swap.target - Swaps.
6400 11:08:41.829508 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6401 11:08:41.850000 <30>[ 12.499195] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6402 11:08:41.863260 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6403 11:08:41.882666 <30>[ 12.531613] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6404 11:08:41.895983 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6405 11:08:41.917182 <30>[ 12.566167] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6406 11:08:41.930300 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6407 11:08:41.951749 <30>[ 12.600933] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6408 11:08:41.965843 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6409 11:08:41.983015 <30>[ 12.632020] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6410 11:08:41.995181 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6411 11:08:42.015538 <30>[ 12.664851] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6412 11:08:42.029438 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6413 11:08:42.048410 <30>[ 12.697912] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6414 11:08:42.061938 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6415 11:08:42.078403 <30>[ 12.727741] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6416 11:08:42.091483 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6417 11:08:42.134135 <30>[ 12.783572] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6418 11:08:42.146526 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6419 11:08:42.167744 <30>[ 12.817309] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6420 11:08:42.179502 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6421 11:08:42.218218 <30>[ 12.867635] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6422 11:08:42.229675 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6423 11:08:42.253667 <30>[ 12.895845] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6424 11:08:42.278386 <30>[ 12.927458] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6425 11:08:42.290483 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6426 11:08:42.331349 <30>[ 12.980457] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6427 11:08:42.343070 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6428 11:08:42.368383 <30>[ 13.017439] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6429 11:08:42.379647 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6430 11:08:42.402616 <30>[ 13.051481] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6431 11:08:42.416532 Starting [0;1;39mmodpr<6>[ 13.063887] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6432 11:08:42.419940 obe@drm.service[0m - Load Kernel Module drm...
6433 11:08:42.479144 <30>[ 13.127781] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6434 11:08:42.493891 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6435 11:08:42.516764 <30>[ 13.165634] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6436 11:08:42.527995 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6437 11:08:42.550344 <30>[ 13.199358] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6438 11:08:42.562027 Starting [0;1;39mmodpr<6>[ 13.212056] fuse: init (API version 7.37)
6439 11:08:42.565025 obe@loop.ser…e[0m - Load Kernel Module loop...
6440 11:08:42.591243 <30>[ 13.239643] systemd[1]: Starting systemd-journald.service - Journal Service...
6441 11:08:42.601987 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6442 11:08:42.654952 <30>[ 13.303827] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6443 11:08:42.666067 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6444 11:08:42.689439 <30>[ 13.335347] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6445 11:08:42.700644 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6446 11:08:42.721623 <30>[ 13.370694] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6447 11:08:42.732070 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6448 11:08:42.762443 <3>[ 13.410789] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6449 11:08:42.777503 <3>[ 13.426148] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6450 11:08:42.788553 <30>[ 13.435280] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6451 11:08:42.795350 <3>[ 13.443990] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6452 11:08:42.812530 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices..<3>[ 13.460676] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6453 11:08:42.813015 .
6454 11:08:42.827403 <3>[ 13.476291] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6455 11:08:42.842163 <3>[ 13.491217] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6456 11:08:42.850004 <30>[ 13.492449] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6457 11:08:42.856708 <3>[ 13.505127] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6458 11:08:42.873093 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - H<3>[ 13.523607] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6459 11:08:42.876580 uge Pages File System.
6460 11:08:42.895788 <30>[ 13.543621] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6461 11:08:42.905728 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6462 11:08:42.922587 <30>[ 13.571930] systemd[1]: Started systemd-journald.service - Journal Service.
6463 11:08:42.934101 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6464 11:08:42.954681 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6465 11:08:42.971876 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6466 11:08:42.992570 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6467 11:08:43.013843 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6468 11:08:43.033568 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6469 11:08:43.054065 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6470 11:08:43.073596 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6471 11:08:43.091408 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6472 11:08:43.112098 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6473 11:08:43.131888 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6474 11:08:43.152798 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6475 11:08:43.173558 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6476 11:08:43.227439 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6477 11:08:43.251686 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6478 11:08:43.272108 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6479 11:08:43.289309 <4>[ 13.941080] power_supply_show_property: 2 callbacks suppressed
6480 11:08:43.300187 <3>[ 13.941092] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6481 11:08:43.306658 <3>[ 13.953290] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6482 11:08:43.324948 <4>[ 13.956149] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6483 11:08:43.331176 <3>[ 13.971782] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6484 11:08:43.343575 <3>[ 13.980754] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6485 11:08:43.367726 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6486 11:08:43.374287 <3>[ 14.023348] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6487 11:08:43.394353 <3>[ 14.042912] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6488 11:08:43.416275 Startin<3>[ 14.065553] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6489 11:08:43.422836 g [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6490 11:08:43.437434 <3>[ 14.086261] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6491 11:08:43.457401 Starting [0;1;39msystemd-sysusers.…r<3>[ 14.104611] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6492 11:08:43.460913 vice[0m - Create System Users...
6493 11:08:43.475443 <3>[ 14.124170] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6494 11:08:43.493218 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All u<3>[ 14.140795] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6495 11:08:43.493758 dev Devices.
6496 11:08:43.515140 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse<46>[ 14.163702] systemd-journald[313]: Received client request to flush runtime journal.
6497 11:08:43.518134 -connec…nt[0m - FUSE Control File System.
6498 11:08:43.539317 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6499 11:08:43.563940 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6500 11:08:43.584602 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6501 11:08:43.604145 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6502 11:08:43.654831 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6503 11:08:44.997385 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6504 11:08:45.040320 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6505 11:08:45.058403 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6506 11:08:45.078298 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6507 11:08:45.139444 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6508 11:08:45.165911 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6509 11:08:45.432724 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6510 11:08:45.490283 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6511 11:08:45.533561 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6512 11:08:45.631565 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6513 11:08:45.859716 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6514 11:08:45.879313 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6515 11:08:45.905274 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6516 11:08:45.923324 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6517 11:08:45.969018 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6518 11:08:46.037844 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6519 11:08:46.063356 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6520 11:08:46.089554 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6521 11:08:46.132400 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6522 11:08:46.150593 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6523 11:08:46.202867 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6524 11:08:46.220249 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6525 11:08:46.307698 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6526 11:08:46.328580 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6527 11:08:46.347832 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6528 11:08:46.367683 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6529 11:08:46.387711 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6530 11:08:46.412096 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6531 11:08:46.434815 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6532 11:08:46.451655 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6533 11:08:46.474770 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6534 11:08:46.495062 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6535 11:08:46.514238 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6536 11:08:46.533149 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6537 11:08:46.551108 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6538 11:08:46.577065 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6539 11:08:46.620312 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6540 11:08:46.651710 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6541 11:08:46.755645 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6542 11:08:46.781857 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6543 11:08:46.948559 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6544 11:08:47.007551 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6545 11:08:47.065910 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6546 11:08:47.087506 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6547 11:08:47.104340 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6548 11:08:47.138121 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6549 11:08:47.163955 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6550 11:08:47.186111 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6551 11:08:47.207484 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6552 11:08:47.252437 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6553 11:08:47.302390 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6554 11:08:47.386637
6555 11:08:47.390555 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6556 11:08:47.390952
6557 11:08:47.393602 debian-bookworm-arm64 login: root (automatic login)
6558 11:08:47.394034
6559 11:08:47.673803 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Wed Jul 10 10:43:20 UTC 2024 aarch64
6560 11:08:47.674072
6561 11:08:47.680617 The programs included with the Debian GNU/Linux system are free software;
6562 11:08:47.686485 the exact distribution terms for each program are described in the
6563 11:08:47.689915 individual files in /usr/share/doc/*/copyright.
6564 11:08:47.690342
6565 11:08:47.696800 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6566 11:08:47.699784 permitted by applicable law.
6567 11:08:47.770680 Matched prompt #10: / #
6569 11:08:47.771768 Setting prompt string to ['/ #']
6570 11:08:47.772272 end: 2.2.5.1 login-action (duration 00:00:19) [common]
6572 11:08:47.773378 end: 2.2.5 auto-login-action (duration 00:00:19) [common]
6573 11:08:47.773865 start: 2.2.6 expect-shell-connection (timeout 00:03:47) [common]
6574 11:08:47.774209 Setting prompt string to ['/ #']
6575 11:08:47.774569 Forcing a shell prompt, looking for ['/ #']
6576 11:08:47.774926 Sending line: ''
6578 11:08:47.826156 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6579 11:08:47.826764 Waiting using forced prompt support (timeout 00:02:30)
6580 11:08:47.831955 / #
6581 11:08:47.832817 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6582 11:08:47.833296 start: 2.2.7 export-device-env (timeout 00:03:47) [common]
6583 11:08:47.833701 Sending line: "export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14786825/extract-nfsrootfs-_4sdnrfz'"
6585 11:08:47.940738 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14786825/extract-nfsrootfs-_4sdnrfz'
6586 11:08:47.941366 Sending line: "export NFS_SERVER_IP='192.168.201.1'"
6588 11:08:48.048294 / # export NFS_SERVER_IP='192.168.201.1'
6589 11:08:48.049129 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6590 11:08:48.049563 end: 2.2 depthcharge-retry (duration 00:01:13) [common]
6591 11:08:48.049993 end: 2 depthcharge-action (duration 00:01:13) [common]
6592 11:08:48.050405 start: 3 lava-test-retry (timeout 00:08:22) [common]
6593 11:08:48.050809 start: 3.1 lava-test-shell (timeout 00:08:22) [common]
6594 11:08:48.051148 Using namespace: common
6595 11:08:48.051471 Sending line: '#'
6597 11:08:48.152961 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6598 11:08:48.158700 / # #
6599 11:08:48.159482 Using /lava-14786825
6600 11:08:48.159834 Sending line: 'export SHELL=/bin/sh'
6602 11:08:48.267012 / # export SHELL=/bin/sh
6603 11:08:48.267697 Sending line: '. /lava-14786825/environment'
6605 11:08:48.374514 / # . /lava-14786825/environment
6606 11:08:48.381064 Sending line: '/lava-14786825/bin/lava-test-runner /lava-14786825/0'
6608 11:08:48.482632 Test shell timeout: 10s (minimum of the action and connection timeout)
6609 11:08:48.488002 / # /lava-14786825/bin/lava-test-runner /lava-14786825/0
6610 11:08:48.725198 + export TESTRUN_ID=0_wifi-basic
6611 11:08:48.728286 + cd /lava-14786825/0/tests/0_wifi-basic
6612 11:08:48.732116 + cat uuid
6613 11:08:48.738443 + UUID=14786825_1.6.2.3.1
6614 11:08:48.738897 + set +x
6615 11:08:48.745051 <LAVA_SIGNAL_STARTRUN 0_wifi-basic 14786825_1.6.2.3.1>
6616 11:08:48.745745 Received signal: <STARTRUN> 0_wifi-basic 14786825_1.6.2.3.1
6617 11:08:48.746100 Starting test lava.0_wifi-basic (14786825_1.6.2.3.1)
6618 11:08:48.746455 Skipping test definition patterns.
6619 11:08:48.748073 + KERNELCI_LAVA=y /usr/bin/wifi-basic-parser.sh
6620 11:08:48.873829 wlan interfaces found:
6621 11:08:48.874286 wlan0
6622 11:08:48.905497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wlan-present RESULT=pass>
6623 11:08:48.906250 Received signal: <TESTCASE> TEST_CASE_ID=wlan-present RESULT=pass
6625 11:08:48.912893 <LAVA_SIGNAL_TESTSET START wlan-rfkill>
6626 11:08:48.913501 Received signal: <TESTSET> START wlan-rfkill
6627 11:08:48.913838 Starting test_set wlan-rfkill
6628 11:08:48.955164 1 wlan
6629 11:08:48.981922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rfkill-wlan-present RESULT=pass>
6630 11:08:48.982178 Received signal: <TESTCASE> TEST_CASE_ID=rfkill-wlan-present RESULT=pass
6632 11:08:49.110132 <4>[ 19.758892] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6633 11:08:49.127367 <4>[ 19.776205] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6634 11:08:49.139081 <4>[ 19.788102] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6635 11:08:49.145985 <4>[ 19.797166] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6636 11:08:49.210748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rfkill-wlan-soft-block RESULT=pass>
6637 11:08:49.211018 Received signal: <TESTCASE> TEST_CASE_ID=rfkill-wlan-soft-block RESULT=pass
6639 11:08:49.258512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rfkill-wlan-soft-unblock RESULT=pass>
6640 11:08:49.259129 Received signal: <TESTCASE> TEST_CASE_ID=rfkill-wlan-soft-unblock RESULT=pass
6642 11:08:49.262487 <LAVA_SIGNAL_TESTSET STOP>
6643 11:08:49.263103 Received signal: <TESTSET> STOP
6644 11:08:49.263412 Closing test_set wlan-rfkill
6645 11:08:49.268632 Received signal: <TESTSET> START wlan-scan
6646 11:08:49.269011 Starting test_set wlan-scan
6647 11:08:49.271480 <LAVA_SIGNAL_TESTSET START wlan-scan>
6648 11:08:54.921150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wlan-scan RESULT=pass UNITS=networks MEASUREMENT=98>
6649 11:08:54.921864 Received signal: <TESTCASE> TEST_CASE_ID=wlan-scan RESULT=pass UNITS=networks MEASUREMENT=98
6651 11:08:54.923013 Received signal: <TESTSET> STOP
6652 11:08:54.923315 Closing test_set wlan-scan
6653 11:08:54.924556 <LAVA_SIGNAL_TESTSET STOP>
6654 11:08:54.931895 <LAVA_SIGNAL_TESTSET START wlan-monitor>
6655 11:08:54.932542 Received signal: <TESTSET> START wlan-monitor
6656 11:08:54.933000 Starting test_set wlan-monitor
6657 11:08:55.097149 <4>[ 25.745888] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6658 11:08:55.114812 <4>[ 25.763191] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6659 11:08:55.126757 <4>[ 25.775034] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6660 11:08:55.133273 <4>[ 25.784099] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6661 11:08:55.677189 <6>[ 26.328918] IPv6: ADDRCONF(NETDEV_CHANGE): wlan0: link becomes ready
6662 11:08:55.698204 wlan0 is in monitor mode
6663 11:08:55.729926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wlan-monitor-mode RESULT=pass>
6664 11:08:55.730627 Received signal: <TESTCASE> TEST_CASE_ID=wlan-monitor-mode RESULT=pass
6666 11:08:55.857380 <4>[ 26.505967] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6667 11:08:55.874562 <4>[ 26.523282] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6668 11:08:55.886693 <4>[ 26.535168] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6669 11:08:55.893000 <4>[ 26.544247] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6670 11:08:56.398159 wlan0 is in managed mode
6671 11:08:56.422248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wlan-managed-mode RESULT=pass>
6672 11:08:56.422991 Received signal: <TESTCASE> TEST_CASE_ID=wlan-managed-mode RESULT=pass
6674 11:08:56.425736 <LAVA_SIGNAL_TESTSET STOP>
6675 11:08:56.426141 + set +x
6676 11:08:56.426734 Received signal: <TESTSET> STOP
6677 11:08:56.427091 Closing test_set wlan-monitor
6678 11:08:56.432159 <LAVA_SIGNAL_ENDRUN 0_wifi-basic 14786825_1.6.2.3.1>
6679 11:08:56.432632 <LAVA_TEST_RUNNER EXIT>
6680 11:08:56.433229 Received signal: <ENDRUN> 0_wifi-basic 14786825_1.6.2.3.1
6681 11:08:56.433629 Ending use of test pattern.
6682 11:08:56.433941 Ending test lava.0_wifi-basic (14786825_1.6.2.3.1), duration 7.69
6684 11:08:56.435467 ok: lava_test_shell seems to have completed
6685 11:08:56.436603 wlan-present: pass
rfkill-wlan-present:
set: wlan-rfkill
result: pass
rfkill-wlan-soft-block:
set: wlan-rfkill
result: pass
rfkill-wlan-soft-unblock:
set: wlan-rfkill
result: pass
wlan-scan:
set: wlan-scan
result: pass
wlan-monitor-mode:
set: wlan-monitor
result: pass
wlan-managed-mode:
set: wlan-monitor
result: pass
6686 11:08:56.437226 end: 3.1 lava-test-shell (duration 00:00:08) [common]
6687 11:08:56.437732 end: 3 lava-test-retry (duration 00:00:08) [common]
6688 11:08:56.438275 start: 4 finalize (timeout 00:08:13) [common]
6689 11:08:56.438782 start: 4.1 power-off (timeout 00:00:30) [common]
6690 11:08:56.439612 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
6691 11:08:58.535705 >> Command sent successfully.
6692 11:08:58.549101 Returned 0 in 2 seconds
6693 11:08:58.549669 end: 4.1 power-off (duration 00:00:02) [common]
6695 11:08:58.550598 start: 4.2 read-feedback (timeout 00:08:11) [common]
6696 11:08:58.551222 Listened to connection for namespace 'common' for up to 1s
6697 11:08:59.552319 Finalising connection for namespace 'common'
6698 11:08:59.552946 Disconnecting from shell: Finalise
6699 11:08:59.553311 / #
6700 11:08:59.654550 end: 4.2 read-feedback (duration 00:00:01) [common]
6701 11:08:59.655262 end: 4 finalize (duration 00:00:03) [common]
6702 11:08:59.655796 Cleaning after the job
6703 11:08:59.656235 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/ramdisk
6704 11:08:59.665863 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/kernel
6705 11:08:59.700285 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/dtb
6706 11:08:59.700624 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/nfsrootfs
6707 11:08:59.738554 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786825/tftp-deploy-aimptjqy/modules
6708 11:08:59.744860 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14786825
6709 11:08:59.994929 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14786825
6710 11:08:59.995116 Job finished correctly