Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 47
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 87
1 11:05:44.136060 lava-dispatcher, installed at version: 2024.05
2 11:05:44.136259 start: 0 validate
3 11:05:44.136368 Start time: 2024-07-10 11:05:44.136363+00:00 (UTC)
4 11:05:44.136519 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:05:44.136668 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 11:05:44.445902 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:05:44.446130 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 11:05:44.711928 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:05:44.712646 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 11:05:44.980094 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:05:44.980225 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 11:05:45.245062 Using caching service: 'http://localhost/cache/?uri=%s'
13 11:05:45.245204 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
14 11:05:45.511532 validate duration: 1.38
16 11:05:45.511771 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 11:05:45.511866 start: 1.1 download-retry (timeout 00:10:00) [common]
18 11:05:45.511945 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 11:05:45.512097 Not decompressing ramdisk as can be used compressed.
20 11:05:45.512214 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 11:05:45.512302 saving as /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/ramdisk/initrd.cpio.gz
22 11:05:45.512357 total size: 5628182 (5 MB)
23 11:05:45.513394 progress 0 % (0 MB)
24 11:05:45.515251 progress 5 % (0 MB)
25 11:05:45.516766 progress 10 % (0 MB)
26 11:05:45.518143 progress 15 % (0 MB)
27 11:05:45.519630 progress 20 % (1 MB)
28 11:05:45.520999 progress 25 % (1 MB)
29 11:05:45.522513 progress 30 % (1 MB)
30 11:05:45.524007 progress 35 % (1 MB)
31 11:05:45.525347 progress 40 % (2 MB)
32 11:05:45.526860 progress 45 % (2 MB)
33 11:05:45.528206 progress 50 % (2 MB)
34 11:05:45.529670 progress 55 % (2 MB)
35 11:05:45.531130 progress 60 % (3 MB)
36 11:05:45.532423 progress 65 % (3 MB)
37 11:05:45.533945 progress 70 % (3 MB)
38 11:05:45.535278 progress 75 % (4 MB)
39 11:05:45.536718 progress 80 % (4 MB)
40 11:05:45.538105 progress 85 % (4 MB)
41 11:05:45.539558 progress 90 % (4 MB)
42 11:05:45.540997 progress 95 % (5 MB)
43 11:05:45.542440 progress 100 % (5 MB)
44 11:05:45.542636 5 MB downloaded in 0.03 s (177.29 MB/s)
45 11:05:45.542782 end: 1.1.1 http-download (duration 00:00:00) [common]
47 11:05:45.542999 end: 1.1 download-retry (duration 00:00:00) [common]
48 11:05:45.543078 start: 1.2 download-retry (timeout 00:10:00) [common]
49 11:05:45.543152 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 11:05:45.543285 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
51 11:05:45.543344 saving as /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/kernel/Image
52 11:05:45.543396 total size: 54813184 (52 MB)
53 11:05:45.543450 No compression specified
54 11:05:45.544427 progress 0 % (0 MB)
55 11:05:45.557640 progress 5 % (2 MB)
56 11:05:45.570900 progress 10 % (5 MB)
57 11:05:45.584048 progress 15 % (7 MB)
58 11:05:45.597577 progress 20 % (10 MB)
59 11:05:45.610933 progress 25 % (13 MB)
60 11:05:45.624038 progress 30 % (15 MB)
61 11:05:45.637199 progress 35 % (18 MB)
62 11:05:45.650912 progress 40 % (20 MB)
63 11:05:45.663942 progress 45 % (23 MB)
64 11:05:45.677213 progress 50 % (26 MB)
65 11:05:45.690723 progress 55 % (28 MB)
66 11:05:45.703668 progress 60 % (31 MB)
67 11:05:45.717046 progress 65 % (34 MB)
68 11:05:45.730382 progress 70 % (36 MB)
69 11:05:45.743661 progress 75 % (39 MB)
70 11:05:45.757049 progress 80 % (41 MB)
71 11:05:45.770485 progress 85 % (44 MB)
72 11:05:45.784142 progress 90 % (47 MB)
73 11:05:45.797665 progress 95 % (49 MB)
74 11:05:45.811133 progress 100 % (52 MB)
75 11:05:45.811353 52 MB downloaded in 0.27 s (195.09 MB/s)
76 11:05:45.811500 end: 1.2.1 http-download (duration 00:00:00) [common]
78 11:05:45.811707 end: 1.2 download-retry (duration 00:00:00) [common]
79 11:05:45.811788 start: 1.3 download-retry (timeout 00:10:00) [common]
80 11:05:45.811862 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 11:05:45.811986 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 11:05:45.812046 saving as /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 11:05:45.812098 total size: 57695 (0 MB)
84 11:05:45.812150 No compression specified
85 11:05:45.813211 progress 56 % (0 MB)
86 11:05:45.813463 progress 100 % (0 MB)
87 11:05:45.813647 0 MB downloaded in 0.00 s (35.56 MB/s)
88 11:05:45.813756 end: 1.3.1 http-download (duration 00:00:00) [common]
90 11:05:45.813955 end: 1.3 download-retry (duration 00:00:00) [common]
91 11:05:45.814070 start: 1.4 download-retry (timeout 00:10:00) [common]
92 11:05:45.814159 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 11:05:45.814266 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 11:05:45.814324 saving as /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/nfsrootfs/full.rootfs.tar
95 11:05:45.814375 total size: 107552908 (102 MB)
96 11:05:45.814427 Using unxz to decompress xz
97 11:05:45.815588 progress 0 % (0 MB)
98 11:05:46.083739 progress 5 % (5 MB)
99 11:05:46.387404 progress 10 % (10 MB)
100 11:05:46.681029 progress 15 % (15 MB)
101 11:05:46.977615 progress 20 % (20 MB)
102 11:05:47.235962 progress 25 % (25 MB)
103 11:05:47.520938 progress 30 % (30 MB)
104 11:05:47.805814 progress 35 % (35 MB)
105 11:05:47.973146 progress 40 % (41 MB)
106 11:05:48.164751 progress 45 % (46 MB)
107 11:05:48.458888 progress 50 % (51 MB)
108 11:05:48.738548 progress 55 % (56 MB)
109 11:05:49.045436 progress 60 % (61 MB)
110 11:05:49.353584 progress 65 % (66 MB)
111 11:05:49.654091 progress 70 % (71 MB)
112 11:05:49.958255 progress 75 % (76 MB)
113 11:05:50.245217 progress 80 % (82 MB)
114 11:05:50.544669 progress 85 % (87 MB)
115 11:05:50.825263 progress 90 % (92 MB)
116 11:05:51.112462 progress 95 % (97 MB)
117 11:05:51.417831 progress 100 % (102 MB)
118 11:05:51.423339 102 MB downloaded in 5.61 s (18.29 MB/s)
119 11:05:51.423582 end: 1.4.1 http-download (duration 00:00:06) [common]
121 11:05:51.423841 end: 1.4 download-retry (duration 00:00:06) [common]
122 11:05:51.423919 start: 1.5 download-retry (timeout 00:09:54) [common]
123 11:05:51.423994 start: 1.5.1 http-download (timeout 00:09:54) [common]
124 11:05:51.424122 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
125 11:05:51.424183 saving as /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/modules/modules.tar
126 11:05:51.424243 total size: 8607984 (8 MB)
127 11:05:51.424298 Using unxz to decompress xz
128 11:05:51.425500 progress 0 % (0 MB)
129 11:05:51.446456 progress 5 % (0 MB)
130 11:05:51.471007 progress 10 % (0 MB)
131 11:05:51.495160 progress 15 % (1 MB)
132 11:05:51.518733 progress 20 % (1 MB)
133 11:05:51.541409 progress 25 % (2 MB)
134 11:05:51.564193 progress 30 % (2 MB)
135 11:05:51.585632 progress 35 % (2 MB)
136 11:05:51.610785 progress 40 % (3 MB)
137 11:05:51.634399 progress 45 % (3 MB)
138 11:05:51.657637 progress 50 % (4 MB)
139 11:05:51.682211 progress 55 % (4 MB)
140 11:05:51.705453 progress 60 % (4 MB)
141 11:05:51.728335 progress 65 % (5 MB)
142 11:05:51.752964 progress 70 % (5 MB)
143 11:05:51.779521 progress 75 % (6 MB)
144 11:05:51.806740 progress 80 % (6 MB)
145 11:05:51.829373 progress 85 % (7 MB)
146 11:05:51.851704 progress 90 % (7 MB)
147 11:05:51.874284 progress 95 % (7 MB)
148 11:05:51.896072 progress 100 % (8 MB)
149 11:05:51.901212 8 MB downloaded in 0.48 s (17.21 MB/s)
150 11:05:51.901359 end: 1.5.1 http-download (duration 00:00:00) [common]
152 11:05:51.901568 end: 1.5 download-retry (duration 00:00:00) [common]
153 11:05:51.901646 start: 1.6 prepare-tftp-overlay (timeout 00:09:54) [common]
154 11:05:51.901721 start: 1.6.1 extract-nfsrootfs (timeout 00:09:54) [common]
155 11:05:54.173025 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14786844/extract-nfsrootfs-orzksr3v
156 11:05:54.173212 end: 1.6.1 extract-nfsrootfs (duration 00:00:02) [common]
157 11:05:54.173325 start: 1.6.2 lava-overlay (timeout 00:09:51) [common]
158 11:05:54.173525 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1
159 11:05:54.173669 makedir: /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin
160 11:05:54.173789 makedir: /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/tests
161 11:05:54.173903 makedir: /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/results
162 11:05:54.174020 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-add-keys
163 11:05:54.174201 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-add-sources
164 11:05:54.174322 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-background-process-start
165 11:05:54.174441 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-background-process-stop
166 11:05:54.174573 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-common-functions
167 11:05:54.174695 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-echo-ipv4
168 11:05:54.174809 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-install-packages
169 11:05:54.174927 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-installed-packages
170 11:05:54.175039 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-os-build
171 11:05:54.175162 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-probe-channel
172 11:05:54.175279 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-probe-ip
173 11:05:54.175392 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-target-ip
174 11:05:54.175512 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-target-mac
175 11:05:54.175656 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-target-storage
176 11:05:54.175801 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-test-case
177 11:05:54.175945 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-test-event
178 11:05:54.176087 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-test-feedback
179 11:05:54.176231 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-test-raise
180 11:05:54.176369 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-test-reference
181 11:05:54.176510 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-test-runner
182 11:05:54.176652 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-test-set
183 11:05:54.176792 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-test-shell
184 11:05:54.176936 Updating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-install-packages (oe)
185 11:05:54.177107 Updating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/bin/lava-installed-packages (oe)
186 11:05:54.177249 Creating /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/environment
187 11:05:54.177378 LAVA metadata
188 11:05:54.177475 - LAVA_JOB_ID=14786844
189 11:05:54.177561 - LAVA_DISPATCHER_IP=192.168.201.1
190 11:05:54.177681 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:51) [common]
191 11:05:54.177765 skipped lava-vland-overlay
192 11:05:54.177859 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
193 11:05:54.177969 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
194 11:05:54.178048 skipped lava-multinode-overlay
195 11:05:54.178116 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
196 11:05:54.178193 start: 1.6.2.3 test-definition (timeout 00:09:51) [common]
197 11:05:54.178256 Loading test definitions
198 11:05:54.178336 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:51) [common]
199 11:05:54.178397 Using /lava-14786844 at stage 0
200 11:05:54.178764 uuid=14786844_1.6.2.3.1 testdef=None
201 11:05:54.178871 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
202 11:05:54.178978 start: 1.6.2.3.2 test-overlay (timeout 00:09:51) [common]
203 11:05:54.179637 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
205 11:05:54.179964 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:51) [common]
206 11:05:54.180820 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
208 11:05:54.181162 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
209 11:05:54.182011 runner path: /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/0/tests/0_dmesg test_uuid 14786844_1.6.2.3.1
210 11:05:54.182218 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
212 11:05:54.182528 Creating lava-test-runner.conf files
213 11:05:54.182612 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14786844/lava-overlay-mek27qr1/lava-14786844/0 for stage 0
214 11:05:54.182719 - 0_dmesg
215 11:05:54.182837 end: 1.6.2.3 test-definition (duration 00:00:00) [common]
216 11:05:54.182941 start: 1.6.2.4 compress-overlay (timeout 00:09:51) [common]
217 11:05:54.189713 end: 1.6.2.4 compress-overlay (duration 00:00:00) [common]
218 11:05:54.189844 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
219 11:05:54.189952 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
220 11:05:54.190108 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
221 11:05:54.190211 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
222 11:05:54.331912 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
223 11:05:54.332079 start: 1.6.4 extract-modules (timeout 00:09:51) [common]
224 11:05:54.332187 extracting modules file /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14786844/extract-nfsrootfs-orzksr3v
225 11:05:54.601039 extracting modules file /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14786844/extract-overlay-ramdisk-x31j7e5z/ramdisk
226 11:05:54.840138 end: 1.6.4 extract-modules (duration 00:00:01) [common]
227 11:05:54.840289 start: 1.6.5 apply-overlay-tftp (timeout 00:09:51) [common]
228 11:05:54.840368 [common] Applying overlay to NFS
229 11:05:54.840426 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14786844/compress-overlay-j7ftceex/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14786844/extract-nfsrootfs-orzksr3v
230 11:05:54.846826 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
231 11:05:54.846918 start: 1.6.6 configure-preseed-file (timeout 00:09:51) [common]
232 11:05:54.846997 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
233 11:05:54.847087 start: 1.6.7 compress-ramdisk (timeout 00:09:51) [common]
234 11:05:54.847150 Building ramdisk /var/lib/lava/dispatcher/tmp/14786844/extract-overlay-ramdisk-x31j7e5z/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14786844/extract-overlay-ramdisk-x31j7e5z/ramdisk
235 11:05:55.129546 >> 129845 blocks
236 11:05:57.196669 rename /var/lib/lava/dispatcher/tmp/14786844/extract-overlay-ramdisk-x31j7e5z/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/ramdisk/ramdisk.cpio.gz
237 11:05:57.196847 end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
238 11:05:57.196939 start: 1.6.8 prepare-kernel (timeout 00:09:48) [common]
239 11:05:57.197088 start: 1.6.8.1 prepare-fit (timeout 00:09:48) [common]
240 11:05:57.197170 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/kernel/Image']
241 11:06:10.757160 Returned 0 in 13 seconds
242 11:06:10.757339 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/kernel/image.itb
243 11:06:11.111025 output: FIT description: Kernel Image image with one or more FDT blobs
244 11:06:11.111159 output: Created: Wed Jul 10 12:06:11 2024
245 11:06:11.111243 output: Image 0 (kernel-1)
246 11:06:11.111332 output: Description:
247 11:06:11.111419 output: Created: Wed Jul 10 12:06:11 2024
248 11:06:11.111509 output: Type: Kernel Image
249 11:06:11.111565 output: Compression: lzma compressed
250 11:06:11.111618 output: Data Size: 13116259 Bytes = 12808.85 KiB = 12.51 MiB
251 11:06:11.111667 output: Architecture: AArch64
252 11:06:11.111715 output: OS: Linux
253 11:06:11.111762 output: Load Address: 0x00000000
254 11:06:11.111810 output: Entry Point: 0x00000000
255 11:06:11.111857 output: Hash algo: crc32
256 11:06:11.111907 output: Hash value: 9bb85fb9
257 11:06:11.111955 output: Image 1 (fdt-1)
258 11:06:11.112002 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
259 11:06:11.112049 output: Created: Wed Jul 10 12:06:11 2024
260 11:06:11.112097 output: Type: Flat Device Tree
261 11:06:11.112144 output: Compression: uncompressed
262 11:06:11.112191 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
263 11:06:11.112239 output: Architecture: AArch64
264 11:06:11.112287 output: Hash algo: crc32
265 11:06:11.112334 output: Hash value: a9713552
266 11:06:11.112381 output: Image 2 (ramdisk-1)
267 11:06:11.112428 output: Description: unavailable
268 11:06:11.112475 output: Created: Wed Jul 10 12:06:11 2024
269 11:06:11.112523 output: Type: RAMDisk Image
270 11:06:11.112570 output: Compression: uncompressed
271 11:06:11.112616 output: Data Size: 18707388 Bytes = 18268.93 KiB = 17.84 MiB
272 11:06:11.112663 output: Architecture: AArch64
273 11:06:11.112709 output: OS: Linux
274 11:06:11.112755 output: Load Address: unavailable
275 11:06:11.112801 output: Entry Point: unavailable
276 11:06:11.112848 output: Hash algo: crc32
277 11:06:11.112893 output: Hash value: 18109e56
278 11:06:11.112939 output: Default Configuration: 'conf-1'
279 11:06:11.112985 output: Configuration 0 (conf-1)
280 11:06:11.113032 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
281 11:06:11.113078 output: Kernel: kernel-1
282 11:06:11.113125 output: Init Ramdisk: ramdisk-1
283 11:06:11.113171 output: FDT: fdt-1
284 11:06:11.113216 output: Loadables: kernel-1
285 11:06:11.113262 output:
286 11:06:11.113357 end: 1.6.8.1 prepare-fit (duration 00:00:14) [common]
287 11:06:11.113429 end: 1.6.8 prepare-kernel (duration 00:00:14) [common]
288 11:06:11.113501 end: 1.6 prepare-tftp-overlay (duration 00:00:19) [common]
289 11:06:11.113573 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:34) [common]
290 11:06:11.113628 No LXC device requested
291 11:06:11.113692 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
292 11:06:11.113761 start: 1.8 deploy-device-env (timeout 00:09:34) [common]
293 11:06:11.113827 end: 1.8 deploy-device-env (duration 00:00:00) [common]
294 11:06:11.113880 Checking files for TFTP limit of 4294967296 bytes.
295 11:06:11.114249 end: 1 tftp-deploy (duration 00:00:26) [common]
296 11:06:11.114335 start: 2 depthcharge-action (timeout 00:05:00) [common]
297 11:06:11.114411 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
298 11:06:11.114498 substitutions:
299 11:06:11.114556 - {DTB}: 14786844/tftp-deploy-au1nb48_/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
300 11:06:11.114610 - {INITRD}: 14786844/tftp-deploy-au1nb48_/ramdisk/ramdisk.cpio.gz
301 11:06:11.114662 - {KERNEL}: 14786844/tftp-deploy-au1nb48_/kernel/Image
302 11:06:11.114711 - {LAVA_MAC}: None
303 11:06:11.114760 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14786844/extract-nfsrootfs-orzksr3v
304 11:06:11.114809 - {NFS_SERVER_IP}: 192.168.201.1
305 11:06:11.114857 - {PRESEED_CONFIG}: None
306 11:06:11.114912 - {PRESEED_LOCAL}: None
307 11:06:11.114978 - {RAMDISK}: 14786844/tftp-deploy-au1nb48_/ramdisk/ramdisk.cpio.gz
308 11:06:11.115051 - {ROOT_PART}: None
309 11:06:11.115119 - {ROOT}: None
310 11:06:11.115201 - {SERVER_IP}: 192.168.201.1
311 11:06:11.115284 - {TEE}: None
312 11:06:11.115367 Parsed boot commands:
313 11:06:11.115448 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
314 11:06:11.115631 Parsed boot commands: tftpboot 192.168.201.1 14786844/tftp-deploy-au1nb48_/kernel/image.itb 14786844/tftp-deploy-au1nb48_/kernel/cmdline
315 11:06:11.115743 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
316 11:06:11.115851 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
317 11:06:11.115959 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
318 11:06:11.116064 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
319 11:06:11.116148 Not connected, no need to disconnect.
320 11:06:11.116252 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
321 11:06:11.116358 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
322 11:06:11.116442 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-4'
323 11:06:11.119444 Setting prompt string to ['lava-test: # ']
324 11:06:11.119779 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
325 11:06:11.119888 end: 2.2.1 reset-connection (duration 00:00:00) [common]
326 11:06:11.120050 start: 2.2.2 reset-device (timeout 00:05:00) [common]
327 11:06:11.120144 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
328 11:06:11.120344 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=reboot']
329 11:06:20.257155 >> Command sent successfully.
330 11:06:20.260596 Returned 0 in 9 seconds
331 11:06:20.260774 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
333 11:06:20.261099 end: 2.2.2 reset-device (duration 00:00:09) [common]
334 11:06:20.261209 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
335 11:06:20.261288 Setting prompt string to 'Starting depthcharge on Juniper...'
336 11:06:20.261350 Changing prompt to 'Starting depthcharge on Juniper...'
337 11:06:20.261444 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
338 11:06:20.261921 [Enter `^Ec?' for help]
339 11:06:27.127136 [DL] 00000000 00000000 010701
340 11:06:27.132066
341 11:06:27.132215
342 11:06:27.132345 F0: 102B 0000
343 11:06:27.132475
344 11:06:27.135277 F3: 1006 0033 [0200]
345 11:06:27.135395
346 11:06:27.135486 F3: 4001 00E0 [0200]
347 11:06:27.135570
348 11:06:27.135650 F3: 0000 0000
349 11:06:27.139123
350 11:06:27.139200 V0: 0000 0000 [0001]
351 11:06:27.139260
352 11:06:27.139316 00: 1027 0002
353 11:06:27.139372
354 11:06:27.142003 01: 0000 0000
355 11:06:27.142092
356 11:06:27.142153 BP: 0C00 0251 [0000]
357 11:06:27.142208
358 11:06:27.145339 G0: 1182 0000
359 11:06:27.145419
360 11:06:27.145479 EC: 0004 0000 [0001]
361 11:06:27.145535
362 11:06:27.148849 S7: 0000 0000 [0000]
363 11:06:27.148927
364 11:06:27.152028 CC: 0000 0000 [0001]
365 11:06:27.152106
366 11:06:27.152166 T0: 0000 00DB [000F]
367 11:06:27.152222
368 11:06:27.152274 Jump to BL
369 11:06:27.152326
370 11:06:27.188506
371 11:06:27.188632
372 11:06:27.194753 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
373 11:06:27.197793 ARM64: Exception handlers installed.
374 11:06:27.201855 ARM64: Testing exception
375 11:06:27.204860 ARM64: Done test exception
376 11:06:27.208447 WDT: Last reset was cold boot
377 11:06:27.208531 SPI0(PAD0) initialized at 992727 Hz
378 11:06:27.215068 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
379 11:06:27.215152 Manufacturer: ef
380 11:06:27.221831 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
381 11:06:27.234734 Probing TPM: . done!
382 11:06:27.234841 TPM ready after 0 ms
383 11:06:27.241387 Connected to device vid:did:rid of 1ae0:0028:00
384 11:06:27.247932 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
385 11:06:27.282417 Initialized TPM device CR50 revision 0
386 11:06:27.294722 tlcl_send_startup: Startup return code is 0
387 11:06:27.294874 TPM: setup succeeded
388 11:06:27.304082 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
389 11:06:27.307201 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
390 11:06:27.310359 in-header: 03 19 00 00 08 00 00 00
391 11:06:27.313562 in-data: a2 e0 47 00 13 00 00 00
392 11:06:27.317308 Chrome EC: UHEPI supported
393 11:06:27.323728 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
394 11:06:27.327025 in-header: 03 a1 00 00 08 00 00 00
395 11:06:27.329955 in-data: 84 60 60 10 00 00 00 00
396 11:06:27.330242 Phase 1
397 11:06:27.333383 FMAP: area GBB found @ 3f5000 (12032 bytes)
398 11:06:27.340474 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
399 11:06:27.347085 VB2:vb2_check_recovery() Recovery was requested manually
400 11:06:27.350237 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
401 11:06:27.356897 Recovery requested (1009000e)
402 11:06:27.365418 tlcl_extend: response is 0
403 11:06:27.370453 tlcl_extend: response is 0
404 11:06:27.395389
405 11:06:27.395536
406 11:06:27.405560 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
407 11:06:27.405643 ARM64: Exception handlers installed.
408 11:06:27.408746 ARM64: Testing exception
409 11:06:27.412004 ARM64: Done test exception
410 11:06:27.427787 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x9a6d, sec=0x2007
411 11:06:27.434246 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
412 11:06:27.437385 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
413 11:06:27.446013 [RTC]rtc_get_frequency_meter,134: input=0xf, output=823
414 11:06:27.453081 [RTC]rtc_get_frequency_meter,134: input=0x7, output=698
415 11:06:27.460063 [RTC]rtc_get_frequency_meter,134: input=0xb, output=760
416 11:06:27.466907 [RTC]rtc_get_frequency_meter,134: input=0xd, output=792
417 11:06:27.473684 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x9a6d
418 11:06:27.477175 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
419 11:06:27.480402 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
420 11:06:27.486383 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
421 11:06:27.489541 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
422 11:06:27.493255 in-header: 03 19 00 00 08 00 00 00
423 11:06:27.496180 in-data: a2 e0 47 00 13 00 00 00
424 11:06:27.496256 Chrome EC: UHEPI supported
425 11:06:27.503094 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
426 11:06:27.506363 in-header: 03 a1 00 00 08 00 00 00
427 11:06:27.509698 in-data: 84 60 60 10 00 00 00 00
428 11:06:27.512637 Skip loading cached calibration data
429 11:06:27.519349 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
430 11:06:27.523341 in-header: 03 a1 00 00 08 00 00 00
431 11:06:27.526501 in-data: 84 60 60 10 00 00 00 00
432 11:06:27.533300 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
433 11:06:27.536250 in-header: 03 a1 00 00 08 00 00 00
434 11:06:27.539359 in-data: 84 60 60 10 00 00 00 00
435 11:06:27.543100 ADC[3]: Raw value=214183 ID=1
436 11:06:27.543275 Manufacturer: ef
437 11:06:27.549574 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
438 11:06:27.552664 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
439 11:06:27.556312 CBFS @ 21000 size 3d4000
440 11:06:27.562845 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
441 11:06:27.566438 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
442 11:06:27.568936 CBFS: Found @ offset 3c700 size 44
443 11:06:27.572195 DRAM-K: Full Calibration
444 11:06:27.576313 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
445 11:06:27.579626 CBFS @ 21000 size 3d4000
446 11:06:27.582947 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
447 11:06:27.586187 CBFS: Locating 'fallback/dram'
448 11:06:27.589220 CBFS: Found @ offset 24b00 size 12268
449 11:06:27.618346 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
450 11:06:27.622188 ddr_geometry: 1, config: 0x0
451 11:06:27.624944 header.status = 0x0
452 11:06:27.628342 header.magic = 0x44524d4b (expected: 0x44524d4b)
453 11:06:27.631336 header.version = 0x5 (expected: 0x5)
454 11:06:27.634607 header.size = 0x8f0 (expected: 0x8f0)
455 11:06:27.635048 header.config = 0x0
456 11:06:27.638441 header.flags = 0x0
457 11:06:27.641549 header.checksum = 0x0
458 11:06:27.648007 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
459 11:06:27.651201 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
460 11:06:27.658400 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
461 11:06:27.658904 ddr_geometry:1
462 11:06:27.661125 [EMI] new MDL number = 1
463 11:06:27.661553 dram_cbt_mode_extern: 0
464 11:06:27.664161 dram_cbt_mode [RK0]: 0, [RK1]: 0
465 11:06:27.671173 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
466 11:06:27.671604
467 11:06:27.672003
468 11:06:27.674426 [Bianco] ETT version 0.0.0.1
469 11:06:27.677744 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
470 11:06:27.678297
471 11:06:27.681541 vSetVcoreByFreq with vcore:762500, freq=1600
472 11:06:27.682087
473 11:06:27.684796 [DramcInit]
474 11:06:27.687833 AutoRefreshCKEOff AutoREF OFF
475 11:06:27.688281 DDRPhyPLLSetting-CKEOFF
476 11:06:27.691315 DDRPhyPLLSetting-CKEON
477 11:06:27.691818
478 11:06:27.692151 Enable WDQS
479 11:06:27.695653 [ModeRegInit_LP4] CH0 RK0
480 11:06:27.698954 Write Rank0 MR13 =0x18
481 11:06:27.699541 Write Rank0 MR12 =0x5d
482 11:06:27.702366 Write Rank0 MR1 =0x56
483 11:06:27.706181 Write Rank0 MR2 =0x1a
484 11:06:27.706613 Write Rank0 MR11 =0x0
485 11:06:27.708638 Write Rank0 MR22 =0x38
486 11:06:27.711994 Write Rank0 MR14 =0x5d
487 11:06:27.712423 Write Rank0 MR3 =0x30
488 11:06:27.715191 Write Rank0 MR13 =0x58
489 11:06:27.715831 Write Rank0 MR12 =0x5d
490 11:06:27.718556 Write Rank0 MR1 =0x56
491 11:06:27.722170 Write Rank0 MR2 =0x2d
492 11:06:27.722677 Write Rank0 MR11 =0x23
493 11:06:27.726101 Write Rank0 MR22 =0x34
494 11:06:27.726607 Write Rank0 MR14 =0x10
495 11:06:27.728965 Write Rank0 MR3 =0x30
496 11:06:27.731795 Write Rank0 MR13 =0xd8
497 11:06:27.732263 [ModeRegInit_LP4] CH0 RK1
498 11:06:27.735359 Write Rank1 MR13 =0x18
499 11:06:27.738127 Write Rank1 MR12 =0x5d
500 11:06:27.738572 Write Rank1 MR1 =0x56
501 11:06:27.741474 Write Rank1 MR2 =0x1a
502 11:06:27.741902 Write Rank1 MR11 =0x0
503 11:06:27.745261 Write Rank1 MR22 =0x38
504 11:06:27.748214 Write Rank1 MR14 =0x5d
505 11:06:27.748716 Write Rank1 MR3 =0x30
506 11:06:27.751543 Write Rank1 MR13 =0x58
507 11:06:27.754580 Write Rank1 MR12 =0x5d
508 11:06:27.755023 Write Rank1 MR1 =0x56
509 11:06:27.757863 Write Rank1 MR2 =0x2d
510 11:06:27.758313 Write Rank1 MR11 =0x23
511 11:06:27.761342 Write Rank1 MR22 =0x34
512 11:06:27.764708 Write Rank1 MR14 =0x10
513 11:06:27.765101 Write Rank1 MR3 =0x30
514 11:06:27.768325 Write Rank1 MR13 =0xd8
515 11:06:27.771829 [ModeRegInit_LP4] CH1 RK0
516 11:06:27.772219 Write Rank0 MR13 =0x18
517 11:06:27.774653 Write Rank0 MR12 =0x5d
518 11:06:27.775042 Write Rank0 MR1 =0x56
519 11:06:27.777804 Write Rank0 MR2 =0x1a
520 11:06:27.781203 Write Rank0 MR11 =0x0
521 11:06:27.781674 Write Rank0 MR22 =0x38
522 11:06:27.784643 Write Rank0 MR14 =0x5d
523 11:06:27.785148 Write Rank0 MR3 =0x30
524 11:06:27.787775 Write Rank0 MR13 =0x58
525 11:06:27.791526 Write Rank0 MR12 =0x5d
526 11:06:27.791997 Write Rank0 MR1 =0x56
527 11:06:27.794613 Write Rank0 MR2 =0x2d
528 11:06:27.798574 Write Rank0 MR11 =0x23
529 11:06:27.799049 Write Rank0 MR22 =0x34
530 11:06:27.801521 Write Rank0 MR14 =0x10
531 11:06:27.801993 Write Rank0 MR3 =0x30
532 11:06:27.804353 Write Rank0 MR13 =0xd8
533 11:06:27.807526 [ModeRegInit_LP4] CH1 RK1
534 11:06:27.807914 Write Rank1 MR13 =0x18
535 11:06:27.810877 Write Rank1 MR12 =0x5d
536 11:06:27.814094 Write Rank1 MR1 =0x56
537 11:06:27.814490 Write Rank1 MR2 =0x1a
538 11:06:27.817949 Write Rank1 MR11 =0x0
539 11:06:27.818417 Write Rank1 MR22 =0x38
540 11:06:27.821149 Write Rank1 MR14 =0x5d
541 11:06:27.824827 Write Rank1 MR3 =0x30
542 11:06:27.825300 Write Rank1 MR13 =0x58
543 11:06:27.827341 Write Rank1 MR12 =0x5d
544 11:06:27.830977 Write Rank1 MR1 =0x56
545 11:06:27.831453 Write Rank1 MR2 =0x2d
546 11:06:27.834132 Write Rank1 MR11 =0x23
547 11:06:27.834522 Write Rank1 MR22 =0x34
548 11:06:27.837764 Write Rank1 MR14 =0x10
549 11:06:27.840926 Write Rank1 MR3 =0x30
550 11:06:27.841397 Write Rank1 MR13 =0xd8
551 11:06:27.844793 match AC timing 3
552 11:06:27.853821 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
553 11:06:27.854345 [MiockJmeterHQA]
554 11:06:27.857519 vSetVcoreByFreq with vcore:762500, freq=1600
555 11:06:27.963633
556 11:06:27.964140 MIOCK jitter meter ch=0
557 11:06:27.964475
558 11:06:27.966888 1T = (102-19) = 83 dly cells
559 11:06:27.973651 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 753/100 ps
560 11:06:27.977096 vSetVcoreByFreq with vcore:725000, freq=1200
561 11:06:28.076886
562 11:06:28.077387 MIOCK jitter meter ch=0
563 11:06:28.077719
564 11:06:28.080110 1T = (97-18) = 79 dly cells
565 11:06:28.086608 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
566 11:06:28.090385 vSetVcoreByFreq with vcore:725000, freq=800
567 11:06:28.190959
568 11:06:28.191462 MIOCK jitter meter ch=0
569 11:06:28.191794
570 11:06:28.193851 1T = (97-18) = 79 dly cells
571 11:06:28.200286 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
572 11:06:28.203445 vSetVcoreByFreq with vcore:762500, freq=1600
573 11:06:28.207099 vSetVcoreByFreq with vcore:762500, freq=1600
574 11:06:28.207528
575 11:06:28.207864 K DRVP
576 11:06:28.210136 1. OCD DRVP=0 CALOUT=0
577 11:06:28.213180 1. OCD DRVP=1 CALOUT=0
578 11:06:28.213636 1. OCD DRVP=2 CALOUT=0
579 11:06:28.216838 1. OCD DRVP=3 CALOUT=0
580 11:06:28.219880 1. OCD DRVP=4 CALOUT=0
581 11:06:28.220316 1. OCD DRVP=5 CALOUT=0
582 11:06:28.223053 1. OCD DRVP=6 CALOUT=0
583 11:06:28.223487 1. OCD DRVP=7 CALOUT=0
584 11:06:28.226505 1. OCD DRVP=8 CALOUT=1
585 11:06:28.227048
586 11:06:28.229424 1. OCD DRVP calibration OK! DRVP=8
587 11:06:28.230060
588 11:06:28.230516
589 11:06:28.230951
590 11:06:28.233038 K ODTN
591 11:06:28.233470 3. OCD ODTN=0 ,CALOUT=1
592 11:06:28.236492 3. OCD ODTN=1 ,CALOUT=1
593 11:06:28.236887 3. OCD ODTN=2 ,CALOUT=1
594 11:06:28.239365 3. OCD ODTN=3 ,CALOUT=1
595 11:06:28.242953 3. OCD ODTN=4 ,CALOUT=1
596 11:06:28.243433 3. OCD ODTN=5 ,CALOUT=1
597 11:06:28.246159 3. OCD ODTN=6 ,CALOUT=1
598 11:06:28.249969 3. OCD ODTN=7 ,CALOUT=0
599 11:06:28.250482
600 11:06:28.253090 3. OCD ODTN calibration OK! ODTN=7
601 11:06:28.253570
602 11:06:28.256149 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
603 11:06:28.258860 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
604 11:06:28.266043 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
605 11:06:28.266661
606 11:06:28.267060 K DRVP
607 11:06:28.268658 1. OCD DRVP=0 CALOUT=0
608 11:06:28.269254 1. OCD DRVP=1 CALOUT=0
609 11:06:28.272358 1. OCD DRVP=2 CALOUT=0
610 11:06:28.272947 1. OCD DRVP=3 CALOUT=0
611 11:06:28.275513 1. OCD DRVP=4 CALOUT=0
612 11:06:28.279048 1. OCD DRVP=5 CALOUT=0
613 11:06:28.279443 1. OCD DRVP=6 CALOUT=0
614 11:06:28.282290 1. OCD DRVP=7 CALOUT=0
615 11:06:28.285456 1. OCD DRVP=8 CALOUT=0
616 11:06:28.285878 1. OCD DRVP=9 CALOUT=1
617 11:06:28.286246
618 11:06:28.288911 1. OCD DRVP calibration OK! DRVP=9
619 11:06:28.289418
620 11:06:28.289909
621 11:06:28.290323
622 11:06:28.292077 K ODTN
623 11:06:28.292554 3. OCD ODTN=0 ,CALOUT=1
624 11:06:28.295445 3. OCD ODTN=1 ,CALOUT=1
625 11:06:28.298612 3. OCD ODTN=2 ,CALOUT=1
626 11:06:28.299009 3. OCD ODTN=3 ,CALOUT=1
627 11:06:28.301989 3. OCD ODTN=4 ,CALOUT=1
628 11:06:28.305157 3. OCD ODTN=5 ,CALOUT=1
629 11:06:28.305552 3. OCD ODTN=6 ,CALOUT=1
630 11:06:28.308702 3. OCD ODTN=7 ,CALOUT=1
631 11:06:28.309099 3. OCD ODTN=8 ,CALOUT=1
632 11:06:28.312100 3. OCD ODTN=9 ,CALOUT=1
633 11:06:28.315110 3. OCD ODTN=10 ,CALOUT=1
634 11:06:28.318346 3. OCD ODTN=11 ,CALOUT=1
635 11:06:28.318855 3. OCD ODTN=12 ,CALOUT=1
636 11:06:28.321743 3. OCD ODTN=13 ,CALOUT=1
637 11:06:28.325314 3. OCD ODTN=14 ,CALOUT=0
638 11:06:28.325772
639 11:06:28.328530 3. OCD ODTN calibration OK! ODTN=14
640 11:06:28.328952
641 11:06:28.331807 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=14
642 11:06:28.335167 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=14
643 11:06:28.338200 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=14 (After Adjust)
644 11:06:28.341741
645 11:06:28.342318 [DramcInit]
646 11:06:28.345176 AutoRefreshCKEOff AutoREF OFF
647 11:06:28.345635 DDRPhyPLLSetting-CKEOFF
648 11:06:28.348507 DDRPhyPLLSetting-CKEON
649 11:06:28.348972
650 11:06:28.349274 Enable WDQS
651 11:06:28.349554 ==
652 11:06:28.354852 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
653 11:06:28.358063 fsp= 1, odt_onoff= 1, Byte mode= 0
654 11:06:28.358455 ==
655 11:06:28.361338 [Duty_Offset_Calibration]
656 11:06:28.361722
657 11:06:28.362070 ===========================
658 11:06:28.365248 B0:2 B1:2 CA:1
659 11:06:28.386156 ==
660 11:06:28.389179 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
661 11:06:28.393166 fsp= 1, odt_onoff= 1, Byte mode= 0
662 11:06:28.393595 ==
663 11:06:28.396485 [Duty_Offset_Calibration]
664 11:06:28.396990
665 11:06:28.398995 ===========================
666 11:06:28.399426 B0:0 B1:0 CA:-1
667 11:06:28.431794 [ModeRegInit_LP4] CH0 RK0
668 11:06:28.435300 Write Rank0 MR13 =0x18
669 11:06:28.435731 Write Rank0 MR12 =0x5d
670 11:06:28.438670 Write Rank0 MR1 =0x56
671 11:06:28.441465 Write Rank0 MR2 =0x1a
672 11:06:28.441962 Write Rank0 MR11 =0x0
673 11:06:28.444930 Write Rank0 MR22 =0x38
674 11:06:28.448737 Write Rank0 MR14 =0x5d
675 11:06:28.449190 Write Rank0 MR3 =0x30
676 11:06:28.450966 Write Rank0 MR13 =0x58
677 11:06:28.451393 Write Rank0 MR12 =0x5d
678 11:06:28.454566 Write Rank0 MR1 =0x56
679 11:06:28.458153 Write Rank0 MR2 =0x2d
680 11:06:28.458542 Write Rank0 MR11 =0x23
681 11:06:28.461076 Write Rank0 MR22 =0x34
682 11:06:28.461476 Write Rank0 MR14 =0x10
683 11:06:28.464552 Write Rank0 MR3 =0x30
684 11:06:28.467597 Write Rank0 MR13 =0xd8
685 11:06:28.467999 [ModeRegInit_LP4] CH0 RK1
686 11:06:28.470808 Write Rank1 MR13 =0x18
687 11:06:28.474532 Write Rank1 MR12 =0x5d
688 11:06:28.474934 Write Rank1 MR1 =0x56
689 11:06:28.477793 Write Rank1 MR2 =0x1a
690 11:06:28.478249 Write Rank1 MR11 =0x0
691 11:06:28.481118 Write Rank1 MR22 =0x38
692 11:06:28.484475 Write Rank1 MR14 =0x5d
693 11:06:28.484873 Write Rank1 MR3 =0x30
694 11:06:28.487665 Write Rank1 MR13 =0x58
695 11:06:28.490815 Write Rank1 MR12 =0x5d
696 11:06:28.491215 Write Rank1 MR1 =0x56
697 11:06:28.494723 Write Rank1 MR2 =0x2d
698 11:06:28.495123 Write Rank1 MR11 =0x23
699 11:06:28.497507 Write Rank1 MR22 =0x34
700 11:06:28.501279 Write Rank1 MR14 =0x10
701 11:06:28.501677 Write Rank1 MR3 =0x30
702 11:06:28.504394 Write Rank1 MR13 =0xd8
703 11:06:28.507586 [ModeRegInit_LP4] CH1 RK0
704 11:06:28.507985 Write Rank0 MR13 =0x18
705 11:06:28.510928 Write Rank0 MR12 =0x5d
706 11:06:28.511453 Write Rank0 MR1 =0x56
707 11:06:28.514285 Write Rank0 MR2 =0x1a
708 11:06:28.517757 Write Rank0 MR11 =0x0
709 11:06:28.518262 Write Rank0 MR22 =0x38
710 11:06:28.520699 Write Rank0 MR14 =0x5d
711 11:06:28.521098 Write Rank0 MR3 =0x30
712 11:06:28.524204 Write Rank0 MR13 =0x58
713 11:06:28.527501 Write Rank0 MR12 =0x5d
714 11:06:28.528014 Write Rank0 MR1 =0x56
715 11:06:28.530982 Write Rank0 MR2 =0x2d
716 11:06:28.534171 Write Rank0 MR11 =0x23
717 11:06:28.534639 Write Rank0 MR22 =0x34
718 11:06:28.537785 Write Rank0 MR14 =0x10
719 11:06:28.538222 Write Rank0 MR3 =0x30
720 11:06:28.540643 Write Rank0 MR13 =0xd8
721 11:06:28.544293 [ModeRegInit_LP4] CH1 RK1
722 11:06:28.544761 Write Rank1 MR13 =0x18
723 11:06:28.547268 Write Rank1 MR12 =0x5d
724 11:06:28.550950 Write Rank1 MR1 =0x56
725 11:06:28.551459 Write Rank1 MR2 =0x1a
726 11:06:28.553840 Write Rank1 MR11 =0x0
727 11:06:28.554423 Write Rank1 MR22 =0x38
728 11:06:28.557209 Write Rank1 MR14 =0x5d
729 11:06:28.560285 Write Rank1 MR3 =0x30
730 11:06:28.560814 Write Rank1 MR13 =0x58
731 11:06:28.563693 Write Rank1 MR12 =0x5d
732 11:06:28.566976 Write Rank1 MR1 =0x56
733 11:06:28.567420 Write Rank1 MR2 =0x2d
734 11:06:28.569893 Write Rank1 MR11 =0x23
735 11:06:28.570370 Write Rank1 MR22 =0x34
736 11:06:28.573496 Write Rank1 MR14 =0x10
737 11:06:28.576621 Write Rank1 MR3 =0x30
738 11:06:28.577082 Write Rank1 MR13 =0xd8
739 11:06:28.579980 match AC timing 3
740 11:06:28.589560 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
741 11:06:28.589969 DramC Write-DBI off
742 11:06:28.593625 DramC Read-DBI off
743 11:06:28.594038 Write Rank0 MR13 =0x59
744 11:06:28.594348 ==
745 11:06:28.600006 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
746 11:06:28.603431 fsp= 1, odt_onoff= 1, Byte mode= 0
747 11:06:28.603820 ==
748 11:06:28.606505 === u2Vref_new: 0x56 --> 0x2d
749 11:06:28.609589 === u2Vref_new: 0x58 --> 0x38
750 11:06:28.613026 === u2Vref_new: 0x5a --> 0x39
751 11:06:28.616926 === u2Vref_new: 0x5c --> 0x3c
752 11:06:28.619669 === u2Vref_new: 0x5e --> 0x3d
753 11:06:28.620086 === u2Vref_new: 0x60 --> 0xa0
754 11:06:28.623251 [CA 0] Center 34 (6~63) winsize 58
755 11:06:28.626524 [CA 1] Center 35 (8~63) winsize 56
756 11:06:28.630212 [CA 2] Center 30 (2~59) winsize 58
757 11:06:28.633025 [CA 3] Center 25 (-3~53) winsize 57
758 11:06:28.636565 [CA 4] Center 26 (-2~54) winsize 57
759 11:06:28.639579 [CA 5] Center 31 (2~60) winsize 59
760 11:06:28.640011
761 11:06:28.643634 [CATrainingPosCal] consider 1 rank data
762 11:06:28.646542 u2DelayCellTimex100 = 753/100 ps
763 11:06:28.650098 CA0 delay=34 (6~63),Diff = 9 PI (11 cell)
764 11:06:28.653408 CA1 delay=35 (8~63),Diff = 10 PI (12 cell)
765 11:06:28.660365 CA2 delay=30 (2~59),Diff = 5 PI (6 cell)
766 11:06:28.662531 CA3 delay=25 (-3~53),Diff = 0 PI (0 cell)
767 11:06:28.666312 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
768 11:06:28.669886 CA5 delay=31 (2~60),Diff = 6 PI (7 cell)
769 11:06:28.670352
770 11:06:28.673277 CA PerBit enable=1, Macro0, CA PI delay=25
771 11:06:28.675915 === u2Vref_new: 0x5e --> 0x3d
772 11:06:28.676345
773 11:06:28.679100 Vref(ca) range 1: 30
774 11:06:28.679531
775 11:06:28.679862 CS Dly= 8 (39-0-32)
776 11:06:28.682938 Write Rank0 MR13 =0xd8
777 11:06:28.683439 Write Rank0 MR13 =0xd8
778 11:06:28.685949 Write Rank0 MR12 =0x5e
779 11:06:28.689559 Write Rank1 MR13 =0x59
780 11:06:28.689988 ==
781 11:06:28.692859 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
782 11:06:28.696310 fsp= 1, odt_onoff= 1, Byte mode= 0
783 11:06:28.696823 ==
784 11:06:28.699901 === u2Vref_new: 0x56 --> 0x2d
785 11:06:28.702103 === u2Vref_new: 0x58 --> 0x38
786 11:06:28.705861 === u2Vref_new: 0x5a --> 0x39
787 11:06:28.708999 === u2Vref_new: 0x5c --> 0x3c
788 11:06:28.712778 === u2Vref_new: 0x5e --> 0x3d
789 11:06:28.716179 === u2Vref_new: 0x60 --> 0xa0
790 11:06:28.718763 [CA 0] Center 35 (8~63) winsize 56
791 11:06:28.721991 [CA 1] Center 35 (8~63) winsize 56
792 11:06:28.725971 [CA 2] Center 31 (2~60) winsize 59
793 11:06:28.729082 [CA 3] Center 26 (-2~54) winsize 57
794 11:06:28.732296 [CA 4] Center 26 (-2~54) winsize 57
795 11:06:28.735362 [CA 5] Center 32 (3~61) winsize 59
796 11:06:28.735793
797 11:06:28.738374 [CATrainingPosCal] consider 2 rank data
798 11:06:28.742514 u2DelayCellTimex100 = 753/100 ps
799 11:06:28.745503 CA0 delay=35 (8~63),Diff = 10 PI (12 cell)
800 11:06:28.748766 CA1 delay=35 (8~63),Diff = 10 PI (12 cell)
801 11:06:28.751979 CA2 delay=30 (2~59),Diff = 5 PI (6 cell)
802 11:06:28.754908 CA3 delay=25 (-2~53),Diff = 0 PI (0 cell)
803 11:06:28.758408 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
804 11:06:28.761756 CA5 delay=31 (3~60),Diff = 6 PI (7 cell)
805 11:06:28.762367
806 11:06:28.767734 CA PerBit enable=1, Macro0, CA PI delay=25
807 11:06:28.768163 === u2Vref_new: 0x5e --> 0x3d
808 11:06:28.768503
809 11:06:28.771319 Vref(ca) range 1: 30
810 11:06:28.771745
811 11:06:28.775065 CS Dly= 7 (38-0-32)
812 11:06:28.775558 Write Rank1 MR13 =0xd8
813 11:06:28.777772 Write Rank1 MR13 =0xd8
814 11:06:28.780867 Write Rank1 MR12 =0x5e
815 11:06:28.784906 [RankSwap] Rank num 2, (Multi 1), Rank 0
816 11:06:28.785414 Write Rank0 MR2 =0xad
817 11:06:28.788112 [Write Leveling]
818 11:06:28.790949 delay byte0 byte1 byte2 byte3
819 11:06:28.791379
820 11:06:28.791712 10 0 0
821 11:06:28.794537 11 0 0
822 11:06:28.795050 12 0 0
823 11:06:28.795390 13 0 0
824 11:06:28.797498 14 0 0
825 11:06:28.797934 15 0 0
826 11:06:28.800840 16 0 0
827 11:06:28.801349 17 0 0
828 11:06:28.804739 18 0 0
829 11:06:28.805260 19 0 0
830 11:06:28.805616 20 0 0
831 11:06:28.807650 21 0 0
832 11:06:28.808083 22 0 ff
833 11:06:28.810882 23 0 ff
834 11:06:28.811318 24 0 ff
835 11:06:28.813869 25 0 ff
836 11:06:28.814340 26 0 ff
837 11:06:28.814683 27 0 ff
838 11:06:28.817372 28 0 ff
839 11:06:28.817880 29 0 ff
840 11:06:28.820257 30 0 ff
841 11:06:28.820908 31 0 ff
842 11:06:28.824202 32 0 ff
843 11:06:28.824711 33 ff ff
844 11:06:28.827347 34 ff ff
845 11:06:28.827782 35 ff ff
846 11:06:28.830114 36 ff ff
847 11:06:28.830574 37 ff ff
848 11:06:28.833779 38 ff ff
849 11:06:28.834391 39 ff ff
850 11:06:28.837496 pass bytecount = 0xff (0xff: all bytes pass)
851 11:06:28.838001
852 11:06:28.840171 DQS0 dly: 33
853 11:06:28.840675 DQS1 dly: 22
854 11:06:28.843361 Write Rank0 MR2 =0x2d
855 11:06:28.847006 [RankSwap] Rank num 2, (Multi 1), Rank 0
856 11:06:28.847500 Write Rank0 MR1 =0xd6
857 11:06:28.850185 [Gating]
858 11:06:28.850825 ==
859 11:06:28.853040 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
860 11:06:28.856487 fsp= 1, odt_onoff= 1, Byte mode= 0
861 11:06:28.856963 ==
862 11:06:28.863432 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
863 11:06:28.866964 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
864 11:06:28.869945 3 1 8 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
865 11:06:28.873265 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
866 11:06:28.879992 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
867 11:06:28.882810 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
868 11:06:28.889373 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
869 11:06:28.892601 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
870 11:06:28.896600 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
871 11:06:28.899569 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
872 11:06:28.906060 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
873 11:06:28.909590 3 2 12 |807 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
874 11:06:28.912573 3 2 16 |2323 2c2c |(11 11)(11 10) |(1 1)(0 0)| 0
875 11:06:28.919049 3 2 20 |3d3d 201 |(11 11)(11 11) |(1 1)(0 0)| 0
876 11:06:28.922141 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
877 11:06:28.926416 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
878 11:06:28.932808 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
879 11:06:28.936050 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
880 11:06:28.939485 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
881 11:06:28.946161 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
882 11:06:28.949285 3 3 16 |b0a 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
883 11:06:28.952336 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
884 11:06:28.955898 [Byte 0] Lead/lag Transition tap number (1)
885 11:06:28.961666 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
886 11:06:28.966137 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
887 11:06:28.968529 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
888 11:06:28.974694 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
889 11:06:28.979142 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
890 11:06:28.981833 3 4 12 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
891 11:06:28.988421 3 4 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
892 11:06:28.991585 3 4 20 |3d3d 100f |(11 11)(11 11) |(1 1)(1 1)| 0
893 11:06:28.995002 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
894 11:06:29.001978 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
895 11:06:29.005330 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
896 11:06:29.007873 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
897 11:06:29.014930 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
898 11:06:29.018042 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
899 11:06:29.021181 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
900 11:06:29.028084 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
901 11:06:29.031677 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
902 11:06:29.035130 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
903 11:06:29.041110 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
904 11:06:29.044634 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
905 11:06:29.048153 [Byte 0] Lead/lag falling Transition (3, 6, 4)
906 11:06:29.050994 [Byte 1] Lead/lag falling Transition (3, 6, 4)
907 11:06:29.057463 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
908 11:06:29.061056 [Byte 0] Lead/lag Transition tap number (2)
909 11:06:29.064094 3 6 12 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
910 11:06:29.070608 [Byte 1] Lead/lag Transition tap number (3)
911 11:06:29.074091 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
912 11:06:29.077435 [Byte 0]First pass (3, 6, 16)
913 11:06:29.080607 3 6 20 |4646 808 |(0 0)(11 11) |(0 0)(0 0)| 0
914 11:06:29.083717 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
915 11:06:29.086925 [Byte 1]First pass (3, 6, 24)
916 11:06:29.090510 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
917 11:06:29.093272 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
918 11:06:29.100295 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
919 11:06:29.103408 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
920 11:06:29.106814 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
921 11:06:29.110130 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
922 11:06:29.113527 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
923 11:06:29.120077 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
924 11:06:29.122830 All bytes gating window > 1UI, Early break!
925 11:06:29.123346
926 11:06:29.126754 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 8)
927 11:06:29.127191
928 11:06:29.129571 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
929 11:06:29.130056
930 11:06:29.130370
931 11:06:29.130650
932 11:06:29.133272 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
933 11:06:29.133656
934 11:06:29.139506 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
935 11:06:29.140010
936 11:06:29.140385
937 11:06:29.140675 Write Rank0 MR1 =0x56
938 11:06:29.140953
939 11:06:29.142992 best RODT dly(2T, 0.5T) = (2, 3)
940 11:06:29.143381
941 11:06:29.146117 best RODT dly(2T, 0.5T) = (2, 3)
942 11:06:29.146712 ==
943 11:06:29.152507 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
944 11:06:29.155844 fsp= 1, odt_onoff= 1, Byte mode= 0
945 11:06:29.156401 ==
946 11:06:29.158940 Start DQ dly to find pass range UseTestEngine =0
947 11:06:29.162273 x-axis: bit #, y-axis: DQ dly (-127~63)
948 11:06:29.165846 RX Vref Scan = 0
949 11:06:29.169113 -26, [0] xxxxxxxx xxxxxxxx [MSB]
950 11:06:29.172551 -25, [0] xxxxxxxx xxxxxxxx [MSB]
951 11:06:29.172959 -24, [0] xxxxxxxx xxxxxxxx [MSB]
952 11:06:29.175333 -23, [0] xxxxxxxx xxxxxxxx [MSB]
953 11:06:29.178594 -22, [0] xxxxxxxx xxxxxxxx [MSB]
954 11:06:29.182374 -21, [0] xxxxxxxx xxxxxxxx [MSB]
955 11:06:29.185345 -20, [0] xxxxxxxx xxxxxxxx [MSB]
956 11:06:29.189158 -19, [0] xxxxxxxx xxxxxxxx [MSB]
957 11:06:29.192633 -18, [0] xxxxxxxx xxxxxxxx [MSB]
958 11:06:29.195623 -17, [0] xxxxxxxx xxxxxxxx [MSB]
959 11:06:29.198354 -16, [0] xxxxxxxx xxxxxxxx [MSB]
960 11:06:29.198753 -15, [0] xxxxxxxx xxxxxxxx [MSB]
961 11:06:29.202114 -14, [0] xxxxxxxx xxxxxxxx [MSB]
962 11:06:29.205377 -13, [0] xxxxxxxx xxxxxxxx [MSB]
963 11:06:29.208765 -12, [0] xxxxxxxx xxxxxxxx [MSB]
964 11:06:29.211847 -11, [0] xxxxxxxx xxxxxxxx [MSB]
965 11:06:29.215234 -10, [0] xxxxxxxx xxxxxxxx [MSB]
966 11:06:29.219027 -9, [0] xxxxxxxx xxxxxxxx [MSB]
967 11:06:29.222721 -8, [0] xxxxxxxx xxxxxxxx [MSB]
968 11:06:29.223225 -7, [0] xxxxxxxx xxxxxxxx [MSB]
969 11:06:29.225301 -6, [0] xxxxxxxx xxxxxxxx [MSB]
970 11:06:29.228995 -5, [0] xxxxxxxx xxxxxxxx [MSB]
971 11:06:29.231822 -4, [0] xxxxxxxx xxxxxxxx [MSB]
972 11:06:29.235517 -3, [0] xxxoxxxx xxxxxxxx [MSB]
973 11:06:29.238630 -2, [0] xxxoxxxx oxxoxxxx [MSB]
974 11:06:29.241560 -1, [0] xxxoxxxx oxxoxxxx [MSB]
975 11:06:29.241992 0, [0] xxxoxxxx ooxoxxxx [MSB]
976 11:06:29.245017 1, [0] xxxoxoxx ooxooxxx [MSB]
977 11:06:29.248519 2, [0] xxxoxoox ooxoooxx [MSB]
978 11:06:29.252217 3, [0] xxxoxooo ooxoooox [MSB]
979 11:06:29.255334 4, [0] xxxoxooo ooxoooox [MSB]
980 11:06:29.257990 5, [0] xoxooooo ooxooooo [MSB]
981 11:06:29.258478 6, [0] xooooooo ooxooooo [MSB]
982 11:06:29.261970 7, [0] oooooooo ooxooooo [MSB]
983 11:06:29.264640 33, [0] oooxoooo oooooooo [MSB]
984 11:06:29.267567 34, [0] oooxoxoo xooooooo [MSB]
985 11:06:29.271629 35, [0] oooxoxoo xooooooo [MSB]
986 11:06:29.274974 36, [0] oooxoxoo xxoxoooo [MSB]
987 11:06:29.277867 37, [0] oooxoxoo xxoxxxoo [MSB]
988 11:06:29.281103 38, [0] oooxoxxx xxoxxxxo [MSB]
989 11:06:29.281534 39, [0] xooxoxxx xxoxxxxo [MSB]
990 11:06:29.284999 40, [0] xxoxoxxx xxoxxxxo [MSB]
991 11:06:29.288199 41, [0] xxxxxxxx xxoxxxxx [MSB]
992 11:06:29.291372 42, [0] xxxxxxxx xxoxxxxx [MSB]
993 11:06:29.295125 43, [0] xxxxxxxx xxxxxxxx [MSB]
994 11:06:29.298203 iDelay=43, Bit 0, Center 22 (7 ~ 38) 32
995 11:06:29.301807 iDelay=43, Bit 1, Center 22 (5 ~ 39) 35
996 11:06:29.304904 iDelay=43, Bit 2, Center 23 (6 ~ 40) 35
997 11:06:29.307861 iDelay=43, Bit 3, Center 14 (-3 ~ 32) 36
998 11:06:29.311426 iDelay=43, Bit 4, Center 22 (5 ~ 40) 36
999 11:06:29.314348 iDelay=43, Bit 5, Center 17 (1 ~ 33) 33
1000 11:06:29.318097 iDelay=43, Bit 6, Center 19 (2 ~ 37) 36
1001 11:06:29.320963 iDelay=43, Bit 7, Center 20 (3 ~ 37) 35
1002 11:06:29.324781 iDelay=43, Bit 8, Center 15 (-2 ~ 33) 36
1003 11:06:29.328302 iDelay=43, Bit 9, Center 17 (0 ~ 35) 36
1004 11:06:29.334757 iDelay=43, Bit 10, Center 25 (8 ~ 42) 35
1005 11:06:29.338051 iDelay=43, Bit 11, Center 16 (-2 ~ 35) 38
1006 11:06:29.341572 iDelay=43, Bit 12, Center 18 (1 ~ 36) 36
1007 11:06:29.344200 iDelay=43, Bit 13, Center 19 (2 ~ 36) 35
1008 11:06:29.347557 iDelay=43, Bit 14, Center 20 (3 ~ 37) 35
1009 11:06:29.350783 iDelay=43, Bit 15, Center 22 (5 ~ 40) 36
1010 11:06:29.351285 ==
1011 11:06:29.357346 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1012 11:06:29.360424 fsp= 1, odt_onoff= 1, Byte mode= 0
1013 11:06:29.361135 ==
1014 11:06:29.361504 DQS Delay:
1015 11:06:29.363924 DQS0 = 0, DQS1 = 0
1016 11:06:29.364494 DQM Delay:
1017 11:06:29.364853 DQM0 = 19, DQM1 = 19
1018 11:06:29.367667 DQ Delay:
1019 11:06:29.370530 DQ0 =22, DQ1 =22, DQ2 =23, DQ3 =14
1020 11:06:29.373975 DQ4 =22, DQ5 =17, DQ6 =19, DQ7 =20
1021 11:06:29.376999 DQ8 =15, DQ9 =17, DQ10 =25, DQ11 =16
1022 11:06:29.380353 DQ12 =18, DQ13 =19, DQ14 =20, DQ15 =22
1023 11:06:29.380780
1024 11:06:29.381106
1025 11:06:29.381403 DramC Write-DBI off
1026 11:06:29.381695 ==
1027 11:06:29.386953 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1028 11:06:29.390705 fsp= 1, odt_onoff= 1, Byte mode= 0
1029 11:06:29.391206 ==
1030 11:06:29.393965 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1031 11:06:29.394585
1032 11:06:29.397027 Begin, DQ Scan Range 918~1174
1033 11:06:29.397452
1034 11:06:29.397783
1035 11:06:29.400095 TX Vref Scan disable
1036 11:06:29.403385 918 |3 4 22|[0] xxxxxxxx xxxxxxxx [MSB]
1037 11:06:29.407116 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1038 11:06:29.410254 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1039 11:06:29.414003 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1040 11:06:29.416867 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1041 11:06:29.419860 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1042 11:06:29.423227 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1043 11:06:29.427127 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1044 11:06:29.429723 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1045 11:06:29.436925 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1046 11:06:29.440216 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1047 11:06:29.443270 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1048 11:06:29.446429 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1049 11:06:29.450103 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1050 11:06:29.453503 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1051 11:06:29.456168 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1052 11:06:29.459629 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1053 11:06:29.463178 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1054 11:06:29.466223 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1055 11:06:29.469382 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1056 11:06:29.472766 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1057 11:06:29.476350 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1058 11:06:29.479494 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1059 11:06:29.486608 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1060 11:06:29.489201 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1061 11:06:29.492546 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1062 11:06:29.496357 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1063 11:06:29.499304 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1064 11:06:29.502846 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1065 11:06:29.505689 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1066 11:06:29.508833 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1067 11:06:29.512542 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1068 11:06:29.515906 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1069 11:06:29.519040 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1070 11:06:29.522389 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1071 11:06:29.525144 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1072 11:06:29.532174 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1073 11:06:29.535435 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1074 11:06:29.538744 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1075 11:06:29.541884 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1076 11:06:29.545143 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1077 11:06:29.549269 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1078 11:06:29.552684 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1079 11:06:29.555526 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1080 11:06:29.559048 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1081 11:06:29.562045 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1082 11:06:29.565219 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1083 11:06:29.568744 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1084 11:06:29.571473 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1085 11:06:29.574818 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1086 11:06:29.578463 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1087 11:06:29.581476 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1088 11:06:29.585128 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1089 11:06:29.588297 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1090 11:06:29.591509 972 |3 6 12|[0] xxxxxxxx ooxooooo [MSB]
1091 11:06:29.598219 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1092 11:06:29.601446 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1093 11:06:29.604569 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1094 11:06:29.608116 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1095 11:06:29.611315 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1096 11:06:29.614752 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
1097 11:06:29.617605 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
1098 11:06:29.621151 980 |3 6 20|[0] xxxoooox oooooooo [MSB]
1099 11:06:29.624543 981 |3 6 21|[0] xoxooooo oooooooo [MSB]
1100 11:06:29.627741 982 |3 6 22|[0] xooooooo oooooooo [MSB]
1101 11:06:29.631078 985 |3 6 25|[0] oooooooo xooooooo [MSB]
1102 11:06:29.634351 986 |3 6 26|[0] oooooooo xooxoooo [MSB]
1103 11:06:29.640916 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1104 11:06:29.643921 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1105 11:06:29.647854 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1106 11:06:29.650731 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1107 11:06:29.654101 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1108 11:06:29.657671 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1109 11:06:29.660670 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1110 11:06:29.664267 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1111 11:06:29.667103 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
1112 11:06:29.670749 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
1113 11:06:29.673540 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
1114 11:06:29.676929 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
1115 11:06:29.680212 999 |3 6 39|[0] oooxoxoo xxxxxxxx [MSB]
1116 11:06:29.683579 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1117 11:06:29.687226 Byte0, DQ PI dly=989, DQM PI dly= 989
1118 11:06:29.694098 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
1119 11:06:29.694636
1120 11:06:29.696894 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
1121 11:06:29.697394
1122 11:06:29.700258 Byte1, DQ PI dly=977, DQM PI dly= 977
1123 11:06:29.707040 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1124 11:06:29.707546
1125 11:06:29.710534 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1126 11:06:29.710966
1127 11:06:29.711296 ==
1128 11:06:29.717197 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1129 11:06:29.717699 fsp= 1, odt_onoff= 1, Byte mode= 0
1130 11:06:29.720379 ==
1131 11:06:29.723820 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1132 11:06:29.724252
1133 11:06:29.726931 Begin, DQ Scan Range 953~1017
1134 11:06:29.730567 wait MRW command Rank0 MR14 =0x0 fired (1)
1135 11:06:29.731071 Write Rank0 MR14 =0x0
1136 11:06:29.740822
1137 11:06:29.741327 CH=0, VrefRange= 0, VrefLevel = 0
1138 11:06:29.747521 TX Bit0 (985~999) 15 992, Bit8 (969~981) 13 975,
1139 11:06:29.750569 TX Bit1 (984~997) 14 990, Bit9 (970~982) 13 976,
1140 11:06:29.757208 TX Bit2 (984~998) 15 991, Bit10 (975~986) 12 980,
1141 11:06:29.760731 TX Bit3 (978~992) 15 985, Bit11 (970~980) 11 975,
1142 11:06:29.764395 TX Bit4 (984~994) 11 989, Bit12 (971~982) 12 976,
1143 11:06:29.771014 TX Bit5 (982~992) 11 987, Bit13 (972~982) 11 977,
1144 11:06:29.774372 TX Bit6 (983~994) 12 988, Bit14 (972~984) 13 978,
1145 11:06:29.776735 TX Bit7 (984~994) 11 989, Bit15 (974~988) 15 981,
1146 11:06:29.780028
1147 11:06:29.780470 Write Rank0 MR14 =0x2
1148 11:06:29.790120
1149 11:06:29.790551 CH=0, VrefRange= 0, VrefLevel = 2
1150 11:06:29.796319 TX Bit0 (985~999) 15 992, Bit8 (968~981) 14 974,
1151 11:06:29.799913 TX Bit1 (984~998) 15 991, Bit9 (970~982) 13 976,
1152 11:06:29.806169 TX Bit2 (984~999) 16 991, Bit10 (975~988) 14 981,
1153 11:06:29.809666 TX Bit3 (978~992) 15 985, Bit11 (969~981) 13 975,
1154 11:06:29.812595 TX Bit4 (984~995) 12 989, Bit12 (970~983) 14 976,
1155 11:06:29.819544 TX Bit5 (981~993) 13 987, Bit13 (971~982) 12 976,
1156 11:06:29.822802 TX Bit6 (982~995) 14 988, Bit14 (971~985) 15 978,
1157 11:06:29.826229 TX Bit7 (984~996) 13 990, Bit15 (974~989) 16 981,
1158 11:06:29.829320
1159 11:06:29.829701 Write Rank0 MR14 =0x4
1160 11:06:29.839239
1161 11:06:29.839622 CH=0, VrefRange= 0, VrefLevel = 4
1162 11:06:29.845791 TX Bit0 (984~1000) 17 992, Bit8 (968~982) 15 975,
1163 11:06:29.849025 TX Bit1 (983~999) 17 991, Bit9 (969~983) 15 976,
1164 11:06:29.855344 TX Bit2 (984~999) 16 991, Bit10 (975~988) 14 981,
1165 11:06:29.858946 TX Bit3 (977~993) 17 985, Bit11 (969~982) 14 975,
1166 11:06:29.862270 TX Bit4 (984~996) 13 990, Bit12 (970~983) 14 976,
1167 11:06:29.869212 TX Bit5 (980~994) 15 987, Bit13 (971~983) 13 977,
1168 11:06:29.872044 TX Bit6 (982~996) 15 989, Bit14 (971~986) 16 978,
1169 11:06:29.923541 TX Bit7 (984~997) 14 990, Bit15 (974~989) 16 981,
1170 11:06:29.923961
1171 11:06:29.924267 Write Rank0 MR14 =0x6
1172 11:06:29.924865
1173 11:06:29.925173 CH=0, VrefRange= 0, VrefLevel = 6
1174 11:06:29.925452 TX Bit0 (984~1000) 17 992, Bit8 (968~982) 15 975,
1175 11:06:29.925725 TX Bit1 (983~999) 17 991, Bit9 (969~983) 15 976,
1176 11:06:29.926088 TX Bit2 (984~1000) 17 992, Bit10 (974~989) 16 981,
1177 11:06:29.926381 TX Bit3 (977~993) 17 985, Bit11 (968~982) 15 975,
1178 11:06:29.926694 TX Bit4 (983~998) 16 990, Bit12 (970~984) 15 977,
1179 11:06:29.927214 TX Bit5 (980~994) 15 987, Bit13 (970~983) 14 976,
1180 11:06:29.927507 TX Bit6 (981~997) 17 989, Bit14 (971~987) 17 979,
1181 11:06:29.949636 TX Bit7 (983~997) 15 990, Bit15 (973~990) 18 981,
1182 11:06:29.950082
1183 11:06:29.950400 Write Rank0 MR14 =0x8
1184 11:06:29.950684
1185 11:06:29.951260 CH=0, VrefRange= 0, VrefLevel = 8
1186 11:06:29.951565 TX Bit0 (984~1001) 18 992, Bit8 (967~982) 16 974,
1187 11:06:29.951840 TX Bit1 (983~999) 17 991, Bit9 (968~984) 17 976,
1188 11:06:29.953213 TX Bit2 (983~1000) 18 991, Bit10 (974~990) 17 982,
1189 11:06:29.956995 TX Bit3 (977~994) 18 985, Bit11 (968~982) 15 975,
1190 11:06:29.963534 TX Bit4 (983~998) 16 990, Bit12 (969~984) 16 976,
1191 11:06:29.966553 TX Bit5 (979~995) 17 987, Bit13 (969~984) 16 976,
1192 11:06:29.972920 TX Bit6 (981~998) 18 989, Bit14 (971~988) 18 979,
1193 11:06:29.976666 TX Bit7 (983~998) 16 990, Bit15 (973~990) 18 981,
1194 11:06:29.977106
1195 11:06:29.979576 Write Rank0 MR14 =0xa
1196 11:06:29.987802
1197 11:06:29.991026 CH=0, VrefRange= 0, VrefLevel = 10
1198 11:06:29.994303 TX Bit0 (984~1001) 18 992, Bit8 (967~983) 17 975,
1199 11:06:29.997781 TX Bit1 (983~1000) 18 991, Bit9 (969~985) 17 977,
1200 11:06:30.004190 TX Bit2 (984~1001) 18 992, Bit10 (974~990) 17 982,
1201 11:06:30.007688 TX Bit3 (977~994) 18 985, Bit11 (967~983) 17 975,
1202 11:06:30.013725 TX Bit4 (982~998) 17 990, Bit12 (968~985) 18 976,
1203 11:06:30.017336 TX Bit5 (979~996) 18 987, Bit13 (970~984) 15 977,
1204 11:06:30.020825 TX Bit6 (980~998) 19 989, Bit14 (970~988) 19 979,
1205 11:06:30.027242 TX Bit7 (982~999) 18 990, Bit15 (973~991) 19 982,
1206 11:06:30.027636
1207 11:06:30.027959 Write Rank0 MR14 =0xc
1208 11:06:30.037907
1209 11:06:30.041181 CH=0, VrefRange= 0, VrefLevel = 12
1210 11:06:30.044359 TX Bit0 (983~1002) 20 992, Bit8 (967~984) 18 975,
1211 11:06:30.047589 TX Bit1 (982~1000) 19 991, Bit9 (968~985) 18 976,
1212 11:06:30.054129 TX Bit2 (983~1001) 19 992, Bit10 (974~991) 18 982,
1213 11:06:30.057485 TX Bit3 (977~996) 20 986, Bit11 (967~983) 17 975,
1214 11:06:30.060513 TX Bit4 (982~999) 18 990, Bit12 (968~986) 19 977,
1215 11:06:30.067350 TX Bit5 (979~997) 19 988, Bit13 (969~985) 17 977,
1216 11:06:30.070804 TX Bit6 (979~999) 21 989, Bit14 (970~989) 20 979,
1217 11:06:30.077603 TX Bit7 (982~999) 18 990, Bit15 (972~991) 20 981,
1218 11:06:30.077987
1219 11:06:30.078338 Write Rank0 MR14 =0xe
1220 11:06:30.087600
1221 11:06:30.091317 CH=0, VrefRange= 0, VrefLevel = 14
1222 11:06:30.094419 TX Bit0 (983~1002) 20 992, Bit8 (967~984) 18 975,
1223 11:06:30.097336 TX Bit1 (982~1001) 20 991, Bit9 (968~986) 19 977,
1224 11:06:30.104401 TX Bit2 (983~1002) 20 992, Bit10 (973~991) 19 982,
1225 11:06:30.107790 TX Bit3 (976~997) 22 986, Bit11 (967~984) 18 975,
1226 11:06:30.111180 TX Bit4 (982~1000) 19 991, Bit12 (968~987) 20 977,
1227 11:06:30.117503 TX Bit5 (978~998) 21 988, Bit13 (969~986) 18 977,
1228 11:06:30.120548 TX Bit6 (979~999) 21 989, Bit14 (968~989) 22 978,
1229 11:06:30.127351 TX Bit7 (982~1000) 19 991, Bit15 (972~992) 21 982,
1230 11:06:30.127741
1231 11:06:30.128045 Write Rank0 MR14 =0x10
1232 11:06:30.137971
1233 11:06:30.141293 CH=0, VrefRange= 0, VrefLevel = 16
1234 11:06:30.144647 TX Bit0 (983~1003) 21 993, Bit8 (966~985) 20 975,
1235 11:06:30.147950 TX Bit1 (981~1001) 21 991, Bit9 (968~987) 20 977,
1236 11:06:30.154777 TX Bit2 (982~1003) 22 992, Bit10 (973~992) 20 982,
1237 11:06:30.158131 TX Bit3 (976~996) 21 986, Bit11 (967~985) 19 976,
1238 11:06:30.161103 TX Bit4 (981~1000) 20 990, Bit12 (968~988) 21 978,
1239 11:06:30.168493 TX Bit5 (978~998) 21 988, Bit13 (968~988) 21 978,
1240 11:06:30.171337 TX Bit6 (979~1000) 22 989, Bit14 (968~989) 22 978,
1241 11:06:30.177569 TX Bit7 (981~1000) 20 990, Bit15 (972~992) 21 982,
1242 11:06:30.178154
1243 11:06:30.178506 Write Rank0 MR14 =0x12
1244 11:06:30.188988
1245 11:06:30.192274 CH=0, VrefRange= 0, VrefLevel = 18
1246 11:06:30.195711 TX Bit0 (983~1004) 22 993, Bit8 (966~985) 20 975,
1247 11:06:30.198564 TX Bit1 (981~1002) 22 991, Bit9 (968~988) 21 978,
1248 11:06:30.205126 TX Bit2 (982~1003) 22 992, Bit10 (973~992) 20 982,
1249 11:06:30.208943 TX Bit3 (976~997) 22 986, Bit11 (967~985) 19 976,
1250 11:06:30.215484 TX Bit4 (980~1000) 21 990, Bit12 (968~989) 22 978,
1251 11:06:30.218720 TX Bit5 (978~999) 22 988, Bit13 (968~988) 21 978,
1252 11:06:30.221668 TX Bit6 (978~1000) 23 989, Bit14 (968~990) 23 979,
1253 11:06:30.228793 TX Bit7 (981~1001) 21 991, Bit15 (970~992) 23 981,
1254 11:06:30.229310
1255 11:06:30.229774 Write Rank0 MR14 =0x14
1256 11:06:30.239238
1257 11:06:30.242943 CH=0, VrefRange= 0, VrefLevel = 20
1258 11:06:30.246043 TX Bit0 (983~1004) 22 993, Bit8 (966~986) 21 976,
1259 11:06:30.249396 TX Bit1 (980~1003) 24 991, Bit9 (967~988) 22 977,
1260 11:06:30.255984 TX Bit2 (982~1003) 22 992, Bit10 (972~993) 22 982,
1261 11:06:30.259626 TX Bit3 (976~998) 23 987, Bit11 (966~986) 21 976,
1262 11:06:30.265841 TX Bit4 (980~1000) 21 990, Bit12 (967~989) 23 978,
1263 11:06:30.269207 TX Bit5 (978~999) 22 988, Bit13 (968~989) 22 978,
1264 11:06:30.272163 TX Bit6 (978~1000) 23 989, Bit14 (968~990) 23 979,
1265 11:06:30.279033 TX Bit7 (980~1001) 22 990, Bit15 (971~993) 23 982,
1266 11:06:30.279434
1267 11:06:30.279735 Write Rank0 MR14 =0x16
1268 11:06:30.289939
1269 11:06:30.293365 CH=0, VrefRange= 0, VrefLevel = 22
1270 11:06:30.296760 TX Bit0 (983~1004) 22 993, Bit8 (966~987) 22 976,
1271 11:06:30.300100 TX Bit1 (980~1003) 24 991, Bit9 (967~989) 23 978,
1272 11:06:30.306465 TX Bit2 (982~1004) 23 993, Bit10 (972~994) 23 983,
1273 11:06:30.309574 TX Bit3 (975~998) 24 986, Bit11 (966~988) 23 977,
1274 11:06:30.316378 TX Bit4 (979~1001) 23 990, Bit12 (967~990) 24 978,
1275 11:06:30.319909 TX Bit5 (977~999) 23 988, Bit13 (968~989) 22 978,
1276 11:06:30.322892 TX Bit6 (978~1000) 23 989, Bit14 (968~990) 23 979,
1277 11:06:30.329353 TX Bit7 (980~1002) 23 991, Bit15 (971~993) 23 982,
1278 11:06:30.329836
1279 11:06:30.330230 Write Rank0 MR14 =0x18
1280 11:06:30.341092
1281 11:06:30.344107 CH=0, VrefRange= 0, VrefLevel = 24
1282 11:06:30.348040 TX Bit0 (982~1005) 24 993, Bit8 (966~987) 22 976,
1283 11:06:30.350840 TX Bit1 (980~1003) 24 991, Bit9 (966~989) 24 977,
1284 11:06:30.358151 TX Bit2 (981~1005) 25 993, Bit10 (972~995) 24 983,
1285 11:06:30.361390 TX Bit3 (975~999) 25 987, Bit11 (966~988) 23 977,
1286 11:06:30.364315 TX Bit4 (979~1002) 24 990, Bit12 (967~990) 24 978,
1287 11:06:30.371055 TX Bit5 (977~999) 23 988, Bit13 (967~989) 23 978,
1288 11:06:30.373618 TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979,
1289 11:06:30.380628 TX Bit7 (979~1003) 25 991, Bit15 (969~994) 26 981,
1290 11:06:30.381114
1291 11:06:30.381443 Write Rank0 MR14 =0x1a
1292 11:06:30.392072
1293 11:06:30.394998 CH=0, VrefRange= 0, VrefLevel = 26
1294 11:06:30.398570 TX Bit0 (982~1005) 24 993, Bit8 (965~988) 24 976,
1295 11:06:30.401869 TX Bit1 (979~1004) 26 991, Bit9 (967~989) 23 978,
1296 11:06:30.408296 TX Bit2 (981~1005) 25 993, Bit10 (972~995) 24 983,
1297 11:06:30.411382 TX Bit3 (975~999) 25 987, Bit11 (966~988) 23 977,
1298 11:06:30.418583 TX Bit4 (979~1003) 25 991, Bit12 (967~990) 24 978,
1299 11:06:30.421634 TX Bit5 (977~1000) 24 988, Bit13 (967~990) 24 978,
1300 11:06:30.424702 TX Bit6 (977~1002) 26 989, Bit14 (967~991) 25 979,
1301 11:06:30.431311 TX Bit7 (979~1003) 25 991, Bit15 (968~995) 28 981,
1302 11:06:30.431784
1303 11:06:30.432199 Write Rank0 MR14 =0x1c
1304 11:06:30.443406
1305 11:06:30.443900 CH=0, VrefRange= 0, VrefLevel = 28
1306 11:06:30.449970 TX Bit0 (982~1006) 25 994, Bit8 (965~988) 24 976,
1307 11:06:30.453418 TX Bit1 (979~1005) 27 992, Bit9 (967~989) 23 978,
1308 11:06:30.459621 TX Bit2 (980~1006) 27 993, Bit10 (971~996) 26 983,
1309 11:06:30.462680 TX Bit3 (975~999) 25 987, Bit11 (966~989) 24 977,
1310 11:06:30.468906 TX Bit4 (978~1004) 27 991, Bit12 (967~990) 24 978,
1311 11:06:30.473021 TX Bit5 (977~1000) 24 988, Bit13 (967~989) 23 978,
1312 11:06:30.476034 TX Bit6 (977~1002) 26 989, Bit14 (967~991) 25 979,
1313 11:06:30.482839 TX Bit7 (979~1003) 25 991, Bit15 (968~994) 27 981,
1314 11:06:30.483334
1315 11:06:30.483665 Write Rank0 MR14 =0x1e
1316 11:06:30.494226
1317 11:06:30.497774 CH=0, VrefRange= 0, VrefLevel = 30
1318 11:06:30.500642 TX Bit0 (981~1006) 26 993, Bit8 (964~988) 25 976,
1319 11:06:30.503938 TX Bit1 (979~1005) 27 992, Bit9 (967~989) 23 978,
1320 11:06:30.510498 TX Bit2 (981~1005) 25 993, Bit10 (971~995) 25 983,
1321 11:06:30.513558 TX Bit3 (975~999) 25 987, Bit11 (965~988) 24 976,
1322 11:06:30.520645 TX Bit4 (978~1004) 27 991, Bit12 (966~990) 25 978,
1323 11:06:30.523929 TX Bit5 (977~1001) 25 989, Bit13 (967~990) 24 978,
1324 11:06:30.526764 TX Bit6 (977~1002) 26 989, Bit14 (967~991) 25 979,
1325 11:06:30.533431 TX Bit7 (979~1004) 26 991, Bit15 (969~993) 25 981,
1326 11:06:30.533934
1327 11:06:30.534328 Write Rank0 MR14 =0x20
1328 11:06:30.545350
1329 11:06:30.548307 CH=0, VrefRange= 0, VrefLevel = 32
1330 11:06:30.551823 TX Bit0 (981~1006) 26 993, Bit8 (964~988) 25 976,
1331 11:06:30.554986 TX Bit1 (979~1005) 27 992, Bit9 (967~989) 23 978,
1332 11:06:30.561581 TX Bit2 (981~1005) 25 993, Bit10 (971~995) 25 983,
1333 11:06:30.564841 TX Bit3 (975~999) 25 987, Bit11 (965~988) 24 976,
1334 11:06:30.571303 TX Bit4 (978~1004) 27 991, Bit12 (966~990) 25 978,
1335 11:06:30.574865 TX Bit5 (977~1001) 25 989, Bit13 (967~990) 24 978,
1336 11:06:30.577847 TX Bit6 (977~1002) 26 989, Bit14 (967~991) 25 979,
1337 11:06:30.584551 TX Bit7 (979~1004) 26 991, Bit15 (969~993) 25 981,
1338 11:06:30.585224
1339 11:06:30.585590 Write Rank0 MR14 =0x22
1340 11:06:30.595807
1341 11:06:30.599058 CH=0, VrefRange= 0, VrefLevel = 34
1342 11:06:30.602330 TX Bit0 (981~1006) 26 993, Bit8 (964~988) 25 976,
1343 11:06:30.605531 TX Bit1 (979~1005) 27 992, Bit9 (967~989) 23 978,
1344 11:06:30.612176 TX Bit2 (981~1005) 25 993, Bit10 (971~995) 25 983,
1345 11:06:30.615419 TX Bit3 (975~999) 25 987, Bit11 (965~988) 24 976,
1346 11:06:30.621866 TX Bit4 (978~1004) 27 991, Bit12 (966~990) 25 978,
1347 11:06:30.625460 TX Bit5 (977~1001) 25 989, Bit13 (967~990) 24 978,
1348 11:06:30.629107 TX Bit6 (977~1002) 26 989, Bit14 (967~991) 25 979,
1349 11:06:30.635596 TX Bit7 (979~1004) 26 991, Bit15 (969~993) 25 981,
1350 11:06:30.635987
1351 11:06:30.636285 Write Rank0 MR14 =0x24
1352 11:06:30.646804
1353 11:06:30.649734 CH=0, VrefRange= 0, VrefLevel = 36
1354 11:06:30.653320 TX Bit0 (981~1006) 26 993, Bit8 (964~988) 25 976,
1355 11:06:30.657341 TX Bit1 (979~1005) 27 992, Bit9 (967~989) 23 978,
1356 11:06:30.663564 TX Bit2 (981~1005) 25 993, Bit10 (971~995) 25 983,
1357 11:06:30.666116 TX Bit3 (975~999) 25 987, Bit11 (965~988) 24 976,
1358 11:06:30.673303 TX Bit4 (978~1004) 27 991, Bit12 (966~990) 25 978,
1359 11:06:30.676408 TX Bit5 (977~1001) 25 989, Bit13 (967~990) 24 978,
1360 11:06:30.679995 TX Bit6 (977~1002) 26 989, Bit14 (967~991) 25 979,
1361 11:06:30.686347 TX Bit7 (979~1004) 26 991, Bit15 (969~993) 25 981,
1362 11:06:30.686806
1363 11:06:30.687112
1364 11:06:30.690284 TX Vref found, early break! 371< 382
1365 11:06:30.693169 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
1366 11:06:30.697301 u1DelayCellOfst[0]=7 cells (6 PI)
1367 11:06:30.699816 u1DelayCellOfst[1]=6 cells (5 PI)
1368 11:06:30.702808 u1DelayCellOfst[2]=7 cells (6 PI)
1369 11:06:30.705929 u1DelayCellOfst[3]=0 cells (0 PI)
1370 11:06:30.709583 u1DelayCellOfst[4]=5 cells (4 PI)
1371 11:06:30.712634 u1DelayCellOfst[5]=2 cells (2 PI)
1372 11:06:30.715936 u1DelayCellOfst[6]=2 cells (2 PI)
1373 11:06:30.719089 u1DelayCellOfst[7]=5 cells (4 PI)
1374 11:06:30.722598 Byte0, DQ PI dly=987, DQM PI dly= 990
1375 11:06:30.726027 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
1376 11:06:30.726416
1377 11:06:30.729111 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
1378 11:06:30.729496
1379 11:06:30.732904 u1DelayCellOfst[8]=0 cells (0 PI)
1380 11:06:30.736767 u1DelayCellOfst[9]=2 cells (2 PI)
1381 11:06:30.739675 u1DelayCellOfst[10]=9 cells (7 PI)
1382 11:06:30.742875 u1DelayCellOfst[11]=0 cells (0 PI)
1383 11:06:30.746411 u1DelayCellOfst[12]=2 cells (2 PI)
1384 11:06:30.749384 u1DelayCellOfst[13]=2 cells (2 PI)
1385 11:06:30.752678 u1DelayCellOfst[14]=3 cells (3 PI)
1386 11:06:30.756320 u1DelayCellOfst[15]=6 cells (5 PI)
1387 11:06:30.759164 Byte1, DQ PI dly=976, DQM PI dly= 979
1388 11:06:30.762307 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1389 11:06:30.762692
1390 11:06:30.765372 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1391 11:06:30.768518
1392 11:06:30.768895 Write Rank0 MR14 =0x1e
1393 11:06:30.769192
1394 11:06:30.772235 Final TX Range 0 Vref 30
1395 11:06:30.772661
1396 11:06:30.778631 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1397 11:06:30.779097
1398 11:06:30.785101 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1399 11:06:30.792267 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1400 11:06:30.798423 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1401 11:06:30.801851 Write Rank0 MR3 =0xb0
1402 11:06:30.802360 DramC Write-DBI on
1403 11:06:30.802694 ==
1404 11:06:30.808551 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1405 11:06:30.811657 fsp= 1, odt_onoff= 1, Byte mode= 0
1406 11:06:30.812099 ==
1407 11:06:30.814994 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1408 11:06:30.815412
1409 11:06:30.819000 Begin, DQ Scan Range 699~763
1410 11:06:30.819498
1411 11:06:30.819825
1412 11:06:30.821859 TX Vref Scan disable
1413 11:06:30.824780 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1414 11:06:30.828161 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1415 11:06:30.831500 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1416 11:06:30.835224 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1417 11:06:30.838143 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1418 11:06:30.841336 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1419 11:06:30.844548 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1420 11:06:30.847716 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1421 11:06:30.850840 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1422 11:06:30.854713 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1423 11:06:30.857582 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1424 11:06:30.861095 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1425 11:06:30.864367 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1426 11:06:30.868055 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1427 11:06:30.874210 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1428 11:06:30.877938 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1429 11:06:30.880965 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1430 11:06:30.884461 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1431 11:06:30.887645 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1432 11:06:30.891178 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1433 11:06:30.894796 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1434 11:06:30.897358 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
1435 11:06:30.901169 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
1436 11:06:30.908857 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1437 11:06:30.911362 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1438 11:06:30.914684 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1439 11:06:30.918153 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1440 11:06:30.921716 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1441 11:06:30.924502 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1442 11:06:30.927671 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1443 11:06:30.931297 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1444 11:06:30.934815 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1445 11:06:30.938140 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1446 11:06:30.941538 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1447 11:06:30.944882 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
1448 11:06:30.947716 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
1449 11:06:30.951018 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
1450 11:06:30.958161 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
1451 11:06:30.960781 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
1452 11:06:30.964766 Byte0, DQ PI dly=735, DQM PI dly= 735
1453 11:06:30.967883 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
1454 11:06:30.968316
1455 11:06:30.971608 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
1456 11:06:30.972115
1457 11:06:30.975063 Byte1, DQ PI dly=722, DQM PI dly= 722
1458 11:06:30.980861 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
1459 11:06:30.981296
1460 11:06:30.984224 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
1461 11:06:30.984657
1462 11:06:30.990611 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1463 11:06:30.997631 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1464 11:06:31.004543 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1465 11:06:31.007619 Write Rank0 MR3 =0x30
1466 11:06:31.008045 DramC Write-DBI off
1467 11:06:31.008377
1468 11:06:31.010892 [DATLAT]
1469 11:06:31.013715 Freq=1600, CH0 RK0, use_rxtx_scan=0
1470 11:06:31.014194
1471 11:06:31.014533 DATLAT Default: 0xf
1472 11:06:31.017483 7, 0xFFFF, sum=0
1473 11:06:31.017993 8, 0xFFFF, sum=0
1474 11:06:31.020341 9, 0xFFFF, sum=0
1475 11:06:31.020845 10, 0xFFFF, sum=0
1476 11:06:31.024023 11, 0xFFFF, sum=0
1477 11:06:31.024534 12, 0xFFFF, sum=0
1478 11:06:31.027335 13, 0xFFFF, sum=0
1479 11:06:31.027771 14, 0x0, sum=1
1480 11:06:31.030171 15, 0x0, sum=2
1481 11:06:31.030621 16, 0x0, sum=3
1482 11:06:31.030961 17, 0x0, sum=4
1483 11:06:31.036797 pattern=2 first_step=14 total pass=5 best_step=16
1484 11:06:31.037292 ==
1485 11:06:31.040166 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1486 11:06:31.043259 fsp= 1, odt_onoff= 1, Byte mode= 0
1487 11:06:31.043689 ==
1488 11:06:31.050426 Start DQ dly to find pass range UseTestEngine =1
1489 11:06:31.053083 x-axis: bit #, y-axis: DQ dly (-127~63)
1490 11:06:31.053528 RX Vref Scan = 1
1491 11:06:31.161690
1492 11:06:31.162244 RX Vref found, early break!
1493 11:06:31.162588
1494 11:06:31.167652 Final RX Vref 11, apply to both rank0 and 1
1495 11:06:31.168080 ==
1496 11:06:31.172108 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1497 11:06:31.174704 fsp= 1, odt_onoff= 1, Byte mode= 0
1498 11:06:31.175135 ==
1499 11:06:31.175526 DQS Delay:
1500 11:06:31.178152 DQS0 = 0, DQS1 = 0
1501 11:06:31.178654 DQM Delay:
1502 11:06:31.181062 DQM0 = 19, DQM1 = 18
1503 11:06:31.181484 DQ Delay:
1504 11:06:31.185152 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15
1505 11:06:31.187840 DQ4 =21, DQ5 =16, DQ6 =19, DQ7 =21
1506 11:06:31.191190 DQ8 =14, DQ9 =16, DQ10 =24, DQ11 =16
1507 11:06:31.194240 DQ12 =18, DQ13 =18, DQ14 =20, DQ15 =21
1508 11:06:31.194745
1509 11:06:31.195080
1510 11:06:31.195383
1511 11:06:31.197463 [DramC_TX_OE_Calibration] TA2
1512 11:06:31.200907 Original DQ_B0 (3 6) =30, OEN = 27
1513 11:06:31.204378 Original DQ_B1 (3 6) =30, OEN = 27
1514 11:06:31.207906 23, 0x0, End_B0=23 End_B1=23
1515 11:06:31.208422 24, 0x0, End_B0=24 End_B1=24
1516 11:06:31.210894 25, 0x0, End_B0=25 End_B1=25
1517 11:06:31.214066 26, 0x0, End_B0=26 End_B1=26
1518 11:06:31.217966 27, 0x0, End_B0=27 End_B1=27
1519 11:06:31.221119 28, 0x0, End_B0=28 End_B1=28
1520 11:06:31.221588 29, 0x0, End_B0=29 End_B1=29
1521 11:06:31.224154 30, 0x0, End_B0=30 End_B1=30
1522 11:06:31.227397 31, 0xFFFF, End_B0=30 End_B1=30
1523 11:06:31.234108 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1524 11:06:31.237406 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1525 11:06:31.237888
1526 11:06:31.238239
1527 11:06:31.240725 Write Rank0 MR23 =0x3f
1528 11:06:31.241112 [DQSOSC]
1529 11:06:31.250092 [DQSOSCAuto] RK0, (LSB)MR18= 0xacac, (MSB)MR19= 0x202, tDQSOscB0 = 460 ps tDQSOscB1 = 460 ps
1530 11:06:31.257369 CH0_RK0: MR19=0x202, MR18=0xACAC, DQSOSC=460, MR23=63, INC=11, DEC=17
1531 11:06:31.257932 Write Rank0 MR23 =0x3f
1532 11:06:31.260243 [DQSOSC]
1533 11:06:31.266771 [DQSOSCAuto] RK0, (LSB)MR18= 0xafaf, (MSB)MR19= 0x202, tDQSOscB0 = 458 ps tDQSOscB1 = 458 ps
1534 11:06:31.269830 CH0 RK0: MR19=202, MR18=AFAF
1535 11:06:31.273432 [RankSwap] Rank num 2, (Multi 1), Rank 1
1536 11:06:31.276527 Write Rank0 MR2 =0xad
1537 11:06:31.277138 [Write Leveling]
1538 11:06:31.279826 delay byte0 byte1 byte2 byte3
1539 11:06:31.280347
1540 11:06:31.280793 10 0 0
1541 11:06:31.282912 11 0 0
1542 11:06:31.283428 12 0 0
1543 11:06:31.287168 13 0 0
1544 11:06:31.287662 14 0 0
1545 11:06:31.288020 15 0 0
1546 11:06:31.290195 16 0 0
1547 11:06:31.290594 17 0 0
1548 11:06:31.292927 18 0 0
1549 11:06:31.293417 19 0 0
1550 11:06:31.296228 20 0 0
1551 11:06:31.296737 21 0 0
1552 11:06:31.297180 22 0 0
1553 11:06:31.300422 23 0 ff
1554 11:06:31.300808 24 0 ff
1555 11:06:31.302945 25 0 ff
1556 11:06:31.303340 26 0 ff
1557 11:06:31.306430 27 0 ff
1558 11:06:31.306822 28 0 ff
1559 11:06:31.307128 29 0 ff
1560 11:06:31.309627 30 0 ff
1561 11:06:31.310055 31 0 ff
1562 11:06:31.313582 32 ff ff
1563 11:06:31.313984 33 ff ff
1564 11:06:31.316617 34 ff ff
1565 11:06:31.317086 35 ff ff
1566 11:06:31.319593 36 ff ff
1567 11:06:31.319987 37 ff ff
1568 11:06:31.323312 38 ff ff
1569 11:06:31.326614 pass bytecount = 0xff (0xff: all bytes pass)
1570 11:06:31.327006
1571 11:06:31.327304 DQS0 dly: 32
1572 11:06:31.329996 DQS1 dly: 23
1573 11:06:31.330525 Write Rank0 MR2 =0x2d
1574 11:06:31.332517 [RankSwap] Rank num 2, (Multi 1), Rank 0
1575 11:06:31.336693 Write Rank1 MR1 =0xd6
1576 11:06:31.337164 [Gating]
1577 11:06:31.337466 ==
1578 11:06:31.343347 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1579 11:06:31.346119 fsp= 1, odt_onoff= 1, Byte mode= 0
1580 11:06:31.346505 ==
1581 11:06:31.349457 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1582 11:06:31.356392 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1583 11:06:31.359735 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1584 11:06:31.362537 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1585 11:06:31.366470 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1586 11:06:31.372173 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1587 11:06:31.375390 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1588 11:06:31.378726 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1589 11:06:31.385805 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1590 11:06:31.389022 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1591 11:06:31.393007 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
1592 11:06:31.398901 3 2 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1593 11:06:31.402181 3 2 16 |2322 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1594 11:06:31.406001 3 2 20 |3d3d 2c2c |(11 11)(11 0) |(1 1)(0 0)| 0
1595 11:06:31.412366 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1596 11:06:31.415399 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1597 11:06:31.418975 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1598 11:06:31.425739 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1599 11:06:31.428950 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1600 11:06:31.431913 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1601 11:06:31.438484 3 3 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1602 11:06:31.441573 3 3 20 |707 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1603 11:06:31.445071 [Byte 1] Lead/lag falling Transition (3, 3, 20)
1604 11:06:31.451473 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1605 11:06:31.455000 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1606 11:06:31.458195 [Byte 0] Lead/lag Transition tap number (1)
1607 11:06:31.461204 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1608 11:06:31.467940 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1609 11:06:31.471353 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1610 11:06:31.474809 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1611 11:06:31.480894 3 4 16 |201 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1612 11:06:31.484807 3 4 20 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1613 11:06:31.487658 3 4 24 |3d3d e0e |(11 11)(11 11) |(1 1)(1 1)| 0
1614 11:06:31.494491 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1615 11:06:31.497854 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1616 11:06:31.500901 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1617 11:06:31.507702 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1618 11:06:31.510980 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1619 11:06:31.514099 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1620 11:06:31.520984 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1621 11:06:31.524447 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1622 11:06:31.527902 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1623 11:06:31.533682 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1624 11:06:31.537220 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1625 11:06:31.540150 [Byte 0] Lead/lag falling Transition (3, 6, 4)
1626 11:06:31.543620 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1627 11:06:31.550205 [Byte 1] Lead/lag falling Transition (3, 6, 8)
1628 11:06:31.553814 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1629 11:06:31.556842 [Byte 0] Lead/lag Transition tap number (3)
1630 11:06:31.560430 3 6 16 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1631 11:06:31.567080 [Byte 1] Lead/lag Transition tap number (3)
1632 11:06:31.569669 3 6 20 |404 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1633 11:06:31.573756 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1634 11:06:31.576703 [Byte 0]First pass (3, 6, 24)
1635 11:06:31.579776 [Byte 1]First pass (3, 6, 24)
1636 11:06:31.583023 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1637 11:06:31.586379 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1638 11:06:31.590150 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1639 11:06:31.596750 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1640 11:06:31.599946 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1641 11:06:31.603143 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1642 11:06:31.606303 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1643 11:06:31.612738 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1644 11:06:31.616160 All bytes gating window > 1UI, Early break!
1645 11:06:31.616587
1646 11:06:31.619464 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
1647 11:06:31.619891
1648 11:06:31.622338 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 14)
1649 11:06:31.622763
1650 11:06:31.623093
1651 11:06:31.623397
1652 11:06:31.625785 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
1653 11:06:31.629107
1654 11:06:31.632503 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
1655 11:06:31.632928
1656 11:06:31.633459
1657 11:06:31.635557 wait MRW command Rank1 MR1 =0x56 fired (1)
1658 11:06:31.639209 Write Rank1 MR1 =0x56
1659 11:06:31.639588
1660 11:06:31.642128 best RODT dly(2T, 0.5T) = (2, 3)
1661 11:06:31.642515
1662 11:06:31.642825 best RODT dly(2T, 0.5T) = (2, 3)
1663 11:06:31.645557 ==
1664 11:06:31.649128 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1665 11:06:31.652180 fsp= 1, odt_onoff= 1, Byte mode= 0
1666 11:06:31.652647 ==
1667 11:06:31.655687 Start DQ dly to find pass range UseTestEngine =0
1668 11:06:31.658824 x-axis: bit #, y-axis: DQ dly (-127~63)
1669 11:06:31.662111 RX Vref Scan = 0
1670 11:06:31.665803 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1671 11:06:31.669189 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1672 11:06:31.672467 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1673 11:06:31.672943 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1674 11:06:31.675528 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1675 11:06:31.678502 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1676 11:06:31.681732 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1677 11:06:31.685361 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1678 11:06:31.688712 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1679 11:06:31.691963 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1680 11:06:31.694816 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1681 11:06:31.698396 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1682 11:06:31.698790 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1683 11:06:31.701830 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1684 11:06:31.704833 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1685 11:06:31.708982 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1686 11:06:31.711895 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1687 11:06:31.714940 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1688 11:06:31.718078 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1689 11:06:31.721936 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1690 11:06:31.722503 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1691 11:06:31.724962 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1692 11:06:31.728293 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1693 11:06:31.731788 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1694 11:06:31.734688 -2, [0] xxxoxxxx xxxxxxxx [MSB]
1695 11:06:31.738405 -1, [0] xxxoxxxx xxxxxxxx [MSB]
1696 11:06:31.740986 0, [0] xxxoxoxx oxxxxxxx [MSB]
1697 11:06:31.741420 1, [0] xxxoxooo oxxoxxxx [MSB]
1698 11:06:31.744422 2, [0] xxxoxooo oxxoxxxx [MSB]
1699 11:06:31.747734 3, [0] xoxooooo ooxoooxx [MSB]
1700 11:06:31.750871 4, [0] ooxooooo ooxoooxx [MSB]
1701 11:06:31.754948 5, [0] oooooooo ooxoooox [MSB]
1702 11:06:31.758416 6, [0] oooooooo ooxooooo [MSB]
1703 11:06:31.758921 7, [0] oooooooo ooxooooo [MSB]
1704 11:06:31.761453 8, [0] oooooooo ooxooooo [MSB]
1705 11:06:31.764473 33, [0] oooxoooo oooooooo [MSB]
1706 11:06:31.767530 34, [0] oooxoxoo xooooooo [MSB]
1707 11:06:31.770787 35, [0] oooxoxoo xooxoooo [MSB]
1708 11:06:31.774420 36, [0] oooxoxoo xooxxooo [MSB]
1709 11:06:31.777441 37, [0] oooxoxxo xxoxxooo [MSB]
1710 11:06:31.777950 38, [0] oooxoxxx xxoxxxxo [MSB]
1711 11:06:31.781370 39, [0] xxoxoxxx xxoxxxxo [MSB]
1712 11:06:31.784710 40, [0] xxoxoxxx xxoxxxxo [MSB]
1713 11:06:31.787617 41, [0] xxxxxxxx xxoxxxxo [MSB]
1714 11:06:31.790671 42, [0] xxxxxxxx xxoxxxxx [MSB]
1715 11:06:31.794339 43, [0] xxxxxxxx xxxxxxxx [MSB]
1716 11:06:31.797396 iDelay=43, Bit 0, Center 21 (4 ~ 38) 35
1717 11:06:31.800941 iDelay=43, Bit 1, Center 20 (3 ~ 38) 36
1718 11:06:31.804395 iDelay=43, Bit 2, Center 22 (5 ~ 40) 36
1719 11:06:31.807873 iDelay=43, Bit 3, Center 15 (-2 ~ 32) 35
1720 11:06:31.811235 iDelay=43, Bit 4, Center 21 (3 ~ 40) 38
1721 11:06:31.814362 iDelay=43, Bit 5, Center 16 (0 ~ 33) 34
1722 11:06:31.817639 iDelay=43, Bit 6, Center 18 (1 ~ 36) 36
1723 11:06:31.820875 iDelay=43, Bit 7, Center 19 (1 ~ 37) 37
1724 11:06:31.824125 iDelay=43, Bit 8, Center 16 (0 ~ 33) 34
1725 11:06:31.826906 iDelay=43, Bit 9, Center 19 (3 ~ 36) 34
1726 11:06:31.833853 iDelay=43, Bit 10, Center 25 (9 ~ 42) 34
1727 11:06:31.836940 iDelay=43, Bit 11, Center 17 (1 ~ 34) 34
1728 11:06:31.840208 iDelay=43, Bit 12, Center 19 (3 ~ 35) 33
1729 11:06:31.844003 iDelay=43, Bit 13, Center 20 (3 ~ 37) 35
1730 11:06:31.846929 iDelay=43, Bit 14, Center 21 (5 ~ 37) 33
1731 11:06:31.850880 iDelay=43, Bit 15, Center 23 (6 ~ 41) 36
1732 11:06:31.851386 ==
1733 11:06:31.856701 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1734 11:06:31.860469 fsp= 1, odt_onoff= 1, Byte mode= 0
1735 11:06:31.860967 ==
1736 11:06:31.861296 DQS Delay:
1737 11:06:31.863474 DQS0 = 0, DQS1 = 0
1738 11:06:31.863896 DQM Delay:
1739 11:06:31.864225 DQM0 = 19, DQM1 = 20
1740 11:06:31.867187 DQ Delay:
1741 11:06:31.869843 DQ0 =21, DQ1 =20, DQ2 =22, DQ3 =15
1742 11:06:31.873135 DQ4 =21, DQ5 =16, DQ6 =18, DQ7 =19
1743 11:06:31.876381 DQ8 =16, DQ9 =19, DQ10 =25, DQ11 =17
1744 11:06:31.880038 DQ12 =19, DQ13 =20, DQ14 =21, DQ15 =23
1745 11:06:31.880500
1746 11:06:31.880829
1747 11:06:31.881133 DramC Write-DBI off
1748 11:06:31.881427 ==
1749 11:06:31.886231 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1750 11:06:31.889782 fsp= 1, odt_onoff= 1, Byte mode= 0
1751 11:06:31.890320 ==
1752 11:06:31.893738 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1753 11:06:31.894303
1754 11:06:31.896455 Begin, DQ Scan Range 919~1175
1755 11:06:31.896925
1756 11:06:31.897303
1757 11:06:31.899422 TX Vref Scan disable
1758 11:06:31.902940 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1759 11:06:31.906557 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1760 11:06:31.909130 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1761 11:06:31.912557 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1762 11:06:31.915904 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1763 11:06:31.919638 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1764 11:06:31.922692 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1765 11:06:31.926075 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1766 11:06:31.929384 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1767 11:06:31.935495 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1768 11:06:31.939390 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1769 11:06:31.942640 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1770 11:06:31.946469 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1771 11:06:31.948984 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1772 11:06:31.952132 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1773 11:06:31.955297 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1774 11:06:31.959293 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1775 11:06:31.961812 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1776 11:06:31.965966 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1777 11:06:31.968199 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1778 11:06:31.971755 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1779 11:06:31.975227 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1780 11:06:31.981966 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1781 11:06:31.985590 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1782 11:06:31.988631 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1783 11:06:31.991876 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1784 11:06:31.994566 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1785 11:06:31.998614 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1786 11:06:32.001691 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1787 11:06:32.005036 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1788 11:06:32.008585 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1789 11:06:32.011344 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1790 11:06:32.015018 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1791 11:06:32.018468 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1792 11:06:32.021739 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1793 11:06:32.025056 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1794 11:06:32.031384 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1795 11:06:32.034547 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1796 11:06:32.038050 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1797 11:06:32.041149 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1798 11:06:32.044492 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1799 11:06:32.047695 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1800 11:06:32.050971 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1801 11:06:32.053946 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1802 11:06:32.057428 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1803 11:06:32.061303 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1804 11:06:32.064425 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1805 11:06:32.067552 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1806 11:06:32.070661 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1807 11:06:32.074054 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1808 11:06:32.076920 969 |3 6 9|[0] xxxxxxxx oxxoooxx [MSB]
1809 11:06:32.080592 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1810 11:06:32.083570 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1811 11:06:32.091001 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1812 11:06:32.094410 973 |3 6 13|[0] xxxxxxxx ooxooooo [MSB]
1813 11:06:32.096760 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1814 11:06:32.100065 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1815 11:06:32.103427 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1816 11:06:32.106901 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1817 11:06:32.110269 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
1818 11:06:32.113398 979 |3 6 19|[0] xxxoooox oooooooo [MSB]
1819 11:06:32.116755 980 |3 6 20|[0] xoxooooo oooooooo [MSB]
1820 11:06:32.120128 981 |3 6 21|[0] xoxooooo oooooooo [MSB]
1821 11:06:32.127092 989 |3 6 29|[0] oooooooo xooxoooo [MSB]
1822 11:06:32.130484 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1823 11:06:32.133491 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1824 11:06:32.136417 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1825 11:06:32.140414 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1826 11:06:32.144280 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1827 11:06:32.146637 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1828 11:06:32.150002 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1829 11:06:32.153523 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
1830 11:06:32.156862 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
1831 11:06:32.160039 999 |3 6 39|[0] oooxoxoo xxxxxxxx [MSB]
1832 11:06:32.163234 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1833 11:06:32.166755 Byte0, DQ PI dly=988, DQM PI dly= 988
1834 11:06:32.173279 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
1835 11:06:32.173801
1836 11:06:32.176376 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
1837 11:06:32.176802
1838 11:06:32.179953 Byte1, DQ PI dly=979, DQM PI dly= 979
1839 11:06:32.183128 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1840 11:06:32.183699
1841 11:06:32.189600 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1842 11:06:32.190199
1843 11:06:32.190544 ==
1844 11:06:32.193184 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1845 11:06:32.195876 fsp= 1, odt_onoff= 1, Byte mode= 0
1846 11:06:32.196378 ==
1847 11:06:32.202514 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1848 11:06:32.203071
1849 11:06:32.206298 Begin, DQ Scan Range 955~1019
1850 11:06:32.206720 Write Rank1 MR14 =0x0
1851 11:06:32.215143
1852 11:06:32.215671 CH=0, VrefRange= 0, VrefLevel = 0
1853 11:06:32.221940 TX Bit0 (984~997) 14 990, Bit8 (970~982) 13 976,
1854 11:06:32.225185 TX Bit1 (983~995) 13 989, Bit9 (972~983) 12 977,
1855 11:06:32.232184 TX Bit2 (984~996) 13 990, Bit10 (976~990) 15 983,
1856 11:06:32.235703 TX Bit3 (977~991) 15 984, Bit11 (972~982) 11 977,
1857 11:06:32.238469 TX Bit4 (983~995) 13 989, Bit12 (973~984) 12 978,
1858 11:06:32.244973 TX Bit5 (980~992) 13 986, Bit13 (973~985) 13 979,
1859 11:06:32.248708 TX Bit6 (980~993) 14 986, Bit14 (973~986) 14 979,
1860 11:06:32.254823 TX Bit7 (982~995) 14 988, Bit15 (976~988) 13 982,
1861 11:06:32.255333
1862 11:06:32.255661 Write Rank1 MR14 =0x2
1863 11:06:32.264129
1864 11:06:32.264624 CH=0, VrefRange= 0, VrefLevel = 2
1865 11:06:32.270365 TX Bit0 (984~998) 15 991, Bit8 (969~983) 15 976,
1866 11:06:32.273817 TX Bit1 (983~996) 14 989, Bit9 (972~984) 13 978,
1867 11:06:32.280143 TX Bit2 (984~998) 15 991, Bit10 (976~991) 16 983,
1868 11:06:32.283475 TX Bit3 (977~991) 15 984, Bit11 (971~982) 12 976,
1869 11:06:32.286809 TX Bit4 (983~996) 14 989, Bit12 (972~984) 13 978,
1870 11:06:32.293771 TX Bit5 (980~993) 14 986, Bit13 (972~986) 15 979,
1871 11:06:32.297084 TX Bit6 (980~994) 15 987, Bit14 (973~988) 16 980,
1872 11:06:32.299909 TX Bit7 (982~997) 16 989, Bit15 (976~989) 14 982,
1873 11:06:32.303681
1874 11:06:32.306833 wait MRW command Rank1 MR14 =0x4 fired (1)
1875 11:06:32.307258 Write Rank1 MR14 =0x4
1876 11:06:32.316652
1877 11:06:32.317079 CH=0, VrefRange= 0, VrefLevel = 4
1878 11:06:32.323160 TX Bit0 (984~998) 15 991, Bit8 (968~983) 16 975,
1879 11:06:32.326361 TX Bit1 (983~997) 15 990, Bit9 (972~984) 13 978,
1880 11:06:32.332702 TX Bit2 (984~999) 16 991, Bit10 (975~991) 17 983,
1881 11:06:32.336564 TX Bit3 (977~992) 16 984, Bit11 (970~983) 14 976,
1882 11:06:32.339336 TX Bit4 (982~998) 17 990, Bit12 (972~985) 14 978,
1883 11:06:32.346395 TX Bit5 (979~994) 16 986, Bit13 (972~986) 15 979,
1884 11:06:32.349782 TX Bit6 (979~995) 17 987, Bit14 (972~989) 18 980,
1885 11:06:32.356503 TX Bit7 (982~998) 17 990, Bit15 (975~989) 15 982,
1886 11:06:32.356975
1887 11:06:32.357271 Write Rank1 MR14 =0x6
1888 11:06:32.365874
1889 11:06:32.366402 CH=0, VrefRange= 0, VrefLevel = 6
1890 11:06:32.372949 TX Bit0 (984~998) 15 991, Bit8 (969~984) 16 976,
1891 11:06:32.375080 TX Bit1 (982~998) 17 990, Bit9 (971~985) 15 978,
1892 11:06:32.382560 TX Bit2 (984~999) 16 991, Bit10 (975~991) 17 983,
1893 11:06:32.385473 TX Bit3 (977~992) 16 984, Bit11 (969~984) 16 976,
1894 11:06:32.389285 TX Bit4 (982~998) 17 990, Bit12 (971~986) 16 978,
1895 11:06:32.395361 TX Bit5 (979~995) 17 987, Bit13 (971~987) 17 979,
1896 11:06:32.398314 TX Bit6 (979~995) 17 987, Bit14 (972~989) 18 980,
1897 11:06:32.405048 TX Bit7 (981~999) 19 990, Bit15 (975~990) 16 982,
1898 11:06:32.405586
1899 11:06:32.405904 Write Rank1 MR14 =0x8
1900 11:06:32.415164
1901 11:06:32.415622 CH=0, VrefRange= 0, VrefLevel = 8
1902 11:06:32.421182 TX Bit0 (984~999) 16 991, Bit8 (968~984) 17 976,
1903 11:06:32.424689 TX Bit1 (982~999) 18 990, Bit9 (971~986) 16 978,
1904 11:06:32.431475 TX Bit2 (983~999) 17 991, Bit10 (975~992) 18 983,
1905 11:06:32.434109 TX Bit3 (977~992) 16 984, Bit11 (969~984) 16 976,
1906 11:06:32.437935 TX Bit4 (982~998) 17 990, Bit12 (971~987) 17 979,
1907 11:06:32.444653 TX Bit5 (979~996) 18 987, Bit13 (971~988) 18 979,
1908 11:06:32.447443 TX Bit6 (979~997) 19 988, Bit14 (972~990) 19 981,
1909 11:06:32.454061 TX Bit7 (980~999) 20 989, Bit15 (975~990) 16 982,
1910 11:06:32.454566
1911 11:06:32.454896 Write Rank1 MR14 =0xa
1912 11:06:32.463852
1913 11:06:32.466920 CH=0, VrefRange= 0, VrefLevel = 10
1914 11:06:32.470640 TX Bit0 (983~999) 17 991, Bit8 (968~985) 18 976,
1915 11:06:32.474554 TX Bit1 (982~999) 18 990, Bit9 (970~987) 18 978,
1916 11:06:32.480090 TX Bit2 (983~1000) 18 991, Bit10 (975~993) 19 984,
1917 11:06:32.483072 TX Bit3 (976~993) 18 984, Bit11 (969~985) 17 977,
1918 11:06:32.486803 TX Bit4 (980~999) 20 989, Bit12 (970~988) 19 979,
1919 11:06:32.493444 TX Bit5 (978~997) 20 987, Bit13 (970~988) 19 979,
1920 11:06:32.496617 TX Bit6 (979~998) 20 988, Bit14 (971~990) 20 980,
1921 11:06:32.502989 TX Bit7 (980~999) 20 989, Bit15 (975~991) 17 983,
1922 11:06:32.503502
1923 11:06:32.503831 Write Rank1 MR14 =0xc
1924 11:06:32.513141
1925 11:06:32.516402 CH=0, VrefRange= 0, VrefLevel = 12
1926 11:06:32.519619 TX Bit0 (984~1000) 17 992, Bit8 (968~986) 19 977,
1927 11:06:32.523085 TX Bit1 (981~1000) 20 990, Bit9 (970~987) 18 978,
1928 11:06:32.529535 TX Bit2 (983~1000) 18 991, Bit10 (975~994) 20 984,
1929 11:06:32.533032 TX Bit3 (977~994) 18 985, Bit11 (968~985) 18 976,
1930 11:06:32.535853 TX Bit4 (981~999) 19 990, Bit12 (970~989) 20 979,
1931 11:06:32.542989 TX Bit5 (978~997) 20 987, Bit13 (970~989) 20 979,
1932 11:06:32.545970 TX Bit6 (978~998) 21 988, Bit14 (971~991) 21 981,
1933 11:06:32.553082 TX Bit7 (980~1000) 21 990, Bit15 (974~991) 18 982,
1934 11:06:32.553582
1935 11:06:32.553912 Write Rank1 MR14 =0xe
1936 11:06:32.562797
1937 11:06:32.566170 CH=0, VrefRange= 0, VrefLevel = 14
1938 11:06:32.569303 TX Bit0 (983~1000) 18 991, Bit8 (967~987) 21 977,
1939 11:06:32.572165 TX Bit1 (981~1000) 20 990, Bit9 (969~988) 20 978,
1940 11:06:32.579046 TX Bit2 (983~1001) 19 992, Bit10 (974~994) 21 984,
1941 11:06:32.582225 TX Bit3 (976~994) 19 985, Bit11 (968~986) 19 977,
1942 11:06:32.588803 TX Bit4 (980~1000) 21 990, Bit12 (970~989) 20 979,
1943 11:06:32.592081 TX Bit5 (978~997) 20 987, Bit13 (969~990) 22 979,
1944 11:06:32.595365 TX Bit6 (978~999) 22 988, Bit14 (970~991) 22 980,
1945 11:06:32.601998 TX Bit7 (979~1000) 22 989, Bit15 (974~992) 19 983,
1946 11:06:32.602472
1947 11:06:32.602798 Write Rank1 MR14 =0x10
1948 11:06:32.612266
1949 11:06:32.616026 CH=0, VrefRange= 0, VrefLevel = 16
1950 11:06:32.619459 TX Bit0 (982~1001) 20 991, Bit8 (967~988) 22 977,
1951 11:06:32.622491 TX Bit1 (980~1000) 21 990, Bit9 (969~988) 20 978,
1952 11:06:32.629223 TX Bit2 (982~1001) 20 991, Bit10 (974~995) 22 984,
1953 11:06:32.632221 TX Bit3 (976~995) 20 985, Bit11 (968~987) 20 977,
1954 11:06:32.636215 TX Bit4 (980~1000) 21 990, Bit12 (969~990) 22 979,
1955 11:06:32.641982 TX Bit5 (977~998) 22 987, Bit13 (969~990) 22 979,
1956 11:06:32.645714 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
1957 11:06:32.652256 TX Bit7 (979~1001) 23 990, Bit15 (974~993) 20 983,
1958 11:06:32.652767
1959 11:06:32.653100 Write Rank1 MR14 =0x12
1960 11:06:32.662531
1961 11:06:32.666055 CH=0, VrefRange= 0, VrefLevel = 18
1962 11:06:32.668934 TX Bit0 (982~1001) 20 991, Bit8 (967~988) 22 977,
1963 11:06:32.672279 TX Bit1 (980~1001) 22 990, Bit9 (969~989) 21 979,
1964 11:06:32.678732 TX Bit2 (982~1001) 20 991, Bit10 (974~996) 23 985,
1965 11:06:32.681973 TX Bit3 (976~996) 21 986, Bit11 (968~988) 21 978,
1966 11:06:32.689070 TX Bit4 (979~1001) 23 990, Bit12 (969~990) 22 979,
1967 11:06:32.692442 TX Bit5 (977~998) 22 987, Bit13 (969~990) 22 979,
1968 11:06:32.695825 TX Bit6 (978~999) 22 988, Bit14 (969~992) 24 980,
1969 11:06:32.702161 TX Bit7 (979~1001) 23 990, Bit15 (974~994) 21 984,
1970 11:06:32.702661
1971 11:06:32.702988 Write Rank1 MR14 =0x14
1972 11:06:32.712721
1973 11:06:32.715400 CH=0, VrefRange= 0, VrefLevel = 20
1974 11:06:32.718994 TX Bit0 (982~1002) 21 992, Bit8 (967~989) 23 978,
1975 11:06:32.722289 TX Bit1 (980~1001) 22 990, Bit9 (969~989) 21 979,
1976 11:06:32.729192 TX Bit2 (981~1001) 21 991, Bit10 (974~996) 23 985,
1977 11:06:32.731925 TX Bit3 (976~996) 21 986, Bit11 (967~989) 23 978,
1978 11:06:32.735838 TX Bit4 (979~1000) 22 989, Bit12 (969~990) 22 979,
1979 11:06:32.741839 TX Bit5 (977~999) 23 988, Bit13 (969~991) 23 980,
1980 11:06:32.745467 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
1981 11:06:32.752531 TX Bit7 (978~1001) 24 989, Bit15 (973~994) 22 983,
1982 11:06:32.753057
1983 11:06:32.753392 Write Rank1 MR14 =0x16
1984 11:06:32.762673
1985 11:06:32.765794 CH=0, VrefRange= 0, VrefLevel = 22
1986 11:06:32.769218 TX Bit0 (982~1003) 22 992, Bit8 (967~989) 23 978,
1987 11:06:32.772042 TX Bit1 (979~1001) 23 990, Bit9 (969~990) 22 979,
1988 11:06:32.779265 TX Bit2 (981~1003) 23 992, Bit10 (973~997) 25 985,
1989 11:06:32.782387 TX Bit3 (975~997) 23 986, Bit11 (967~989) 23 978,
1990 11:06:32.788731 TX Bit4 (978~1002) 25 990, Bit12 (968~991) 24 979,
1991 11:06:32.791998 TX Bit5 (977~999) 23 988, Bit13 (968~991) 24 979,
1992 11:06:32.795529 TX Bit6 (977~1000) 24 988, Bit14 (969~993) 25 981,
1993 11:06:32.801921 TX Bit7 (978~1002) 25 990, Bit15 (973~994) 22 983,
1994 11:06:32.802712
1995 11:06:32.803077 Write Rank1 MR14 =0x18
1996 11:06:32.813663
1997 11:06:32.816290 CH=0, VrefRange= 0, VrefLevel = 24
1998 11:06:32.819810 TX Bit0 (981~1004) 24 992, Bit8 (966~989) 24 977,
1999 11:06:32.822863 TX Bit1 (979~1002) 24 990, Bit9 (968~990) 23 979,
2000 11:06:32.829304 TX Bit2 (980~1003) 24 991, Bit10 (973~997) 25 985,
2001 11:06:32.832833 TX Bit3 (975~997) 23 986, Bit11 (967~990) 24 978,
2002 11:06:32.836374 TX Bit4 (979~1002) 24 990, Bit12 (968~991) 24 979,
2003 11:06:32.842973 TX Bit5 (977~999) 23 988, Bit13 (968~991) 24 979,
2004 11:06:32.846534 TX Bit6 (977~1001) 25 989, Bit14 (968~993) 26 980,
2005 11:06:32.853173 TX Bit7 (978~1002) 25 990, Bit15 (973~996) 24 984,
2006 11:06:32.853690
2007 11:06:32.854068 Write Rank1 MR14 =0x1a
2008 11:06:32.863959
2009 11:06:32.866916 CH=0, VrefRange= 0, VrefLevel = 26
2010 11:06:32.870145 TX Bit0 (981~1004) 24 992, Bit8 (966~989) 24 977,
2011 11:06:32.873062 TX Bit1 (979~1003) 25 991, Bit9 (968~990) 23 979,
2012 11:06:32.879776 TX Bit2 (980~1003) 24 991, Bit10 (973~997) 25 985,
2013 11:06:32.883345 TX Bit3 (974~998) 25 986, Bit11 (967~990) 24 978,
2014 11:06:32.886578 TX Bit4 (978~1003) 26 990, Bit12 (968~991) 24 979,
2015 11:06:32.893369 TX Bit5 (976~1000) 25 988, Bit13 (968~991) 24 979,
2016 11:06:32.896072 TX Bit6 (977~1001) 25 989, Bit14 (968~992) 25 980,
2017 11:06:32.903191 TX Bit7 (978~1003) 26 990, Bit15 (973~996) 24 984,
2018 11:06:32.903855
2019 11:06:32.904195 Write Rank1 MR14 =0x1c
2020 11:06:32.914222
2021 11:06:32.917325 CH=0, VrefRange= 0, VrefLevel = 28
2022 11:06:32.920887 TX Bit0 (980~1005) 26 992, Bit8 (966~989) 24 977,
2023 11:06:32.923638 TX Bit1 (979~1003) 25 991, Bit9 (968~990) 23 979,
2024 11:06:32.930641 TX Bit2 (980~1004) 25 992, Bit10 (973~997) 25 985,
2025 11:06:32.933919 TX Bit3 (975~999) 25 987, Bit11 (967~990) 24 978,
2026 11:06:32.940285 TX Bit4 (978~1003) 26 990, Bit12 (968~991) 24 979,
2027 11:06:32.943975 TX Bit5 (976~1000) 25 988, Bit13 (968~990) 23 979,
2028 11:06:32.947516 TX Bit6 (977~1001) 25 989, Bit14 (968~992) 25 980,
2029 11:06:32.953550 TX Bit7 (978~1004) 27 991, Bit15 (972~996) 25 984,
2030 11:06:32.954117
2031 11:06:32.954461 Write Rank1 MR14 =0x1e
2032 11:06:32.964804
2033 11:06:32.968265 CH=0, VrefRange= 0, VrefLevel = 30
2034 11:06:32.971524 TX Bit0 (980~1005) 26 992, Bit8 (966~989) 24 977,
2035 11:06:32.975243 TX Bit1 (979~1003) 25 991, Bit9 (968~990) 23 979,
2036 11:06:32.981784 TX Bit2 (980~1004) 25 992, Bit10 (973~997) 25 985,
2037 11:06:32.984352 TX Bit3 (975~999) 25 987, Bit11 (967~990) 24 978,
2038 11:06:32.990923 TX Bit4 (978~1003) 26 990, Bit12 (968~991) 24 979,
2039 11:06:32.994902 TX Bit5 (976~1000) 25 988, Bit13 (968~990) 23 979,
2040 11:06:32.997780 TX Bit6 (977~1001) 25 989, Bit14 (968~992) 25 980,
2041 11:06:33.004242 TX Bit7 (978~1004) 27 991, Bit15 (972~996) 25 984,
2042 11:06:33.004829
2043 11:06:33.005170 Write Rank1 MR14 =0x20
2044 11:06:33.015417
2045 11:06:33.019173 CH=0, VrefRange= 0, VrefLevel = 32
2046 11:06:33.022252 TX Bit0 (980~1005) 26 992, Bit8 (966~989) 24 977,
2047 11:06:33.025257 TX Bit1 (979~1003) 25 991, Bit9 (968~990) 23 979,
2048 11:06:33.032516 TX Bit2 (980~1004) 25 992, Bit10 (973~997) 25 985,
2049 11:06:33.035752 TX Bit3 (975~999) 25 987, Bit11 (967~990) 24 978,
2050 11:06:33.038590 TX Bit4 (978~1003) 26 990, Bit12 (968~991) 24 979,
2051 11:06:33.045112 TX Bit5 (976~1000) 25 988, Bit13 (968~990) 23 979,
2052 11:06:33.048466 TX Bit6 (977~1001) 25 989, Bit14 (968~992) 25 980,
2053 11:06:33.055112 TX Bit7 (978~1004) 27 991, Bit15 (972~996) 25 984,
2054 11:06:33.055602
2055 11:06:33.055928 Write Rank1 MR14 =0x22
2056 11:06:33.065882
2057 11:06:33.069118 CH=0, VrefRange= 0, VrefLevel = 34
2058 11:06:33.072396 TX Bit0 (980~1005) 26 992, Bit8 (966~989) 24 977,
2059 11:06:33.075787 TX Bit1 (979~1003) 25 991, Bit9 (968~990) 23 979,
2060 11:06:33.082639 TX Bit2 (980~1004) 25 992, Bit10 (973~997) 25 985,
2061 11:06:33.085875 TX Bit3 (975~999) 25 987, Bit11 (967~990) 24 978,
2062 11:06:33.089271 TX Bit4 (978~1003) 26 990, Bit12 (968~991) 24 979,
2063 11:06:33.095649 TX Bit5 (976~1000) 25 988, Bit13 (968~990) 23 979,
2064 11:06:33.099157 TX Bit6 (977~1001) 25 989, Bit14 (968~992) 25 980,
2065 11:06:33.105338 TX Bit7 (978~1004) 27 991, Bit15 (972~996) 25 984,
2066 11:06:33.105770
2067 11:06:33.106144
2068 11:06:33.108604 TX Vref found, early break! 372< 377
2069 11:06:33.112411 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2070 11:06:33.115970 u1DelayCellOfst[0]=6 cells (5 PI)
2071 11:06:33.118959 u1DelayCellOfst[1]=5 cells (4 PI)
2072 11:06:33.121979 u1DelayCellOfst[2]=6 cells (5 PI)
2073 11:06:33.125328 u1DelayCellOfst[3]=0 cells (0 PI)
2074 11:06:33.128520 u1DelayCellOfst[4]=3 cells (3 PI)
2075 11:06:33.131648 u1DelayCellOfst[5]=1 cells (1 PI)
2076 11:06:33.135434 u1DelayCellOfst[6]=2 cells (2 PI)
2077 11:06:33.138621 u1DelayCellOfst[7]=5 cells (4 PI)
2078 11:06:33.142171 Byte0, DQ PI dly=987, DQM PI dly= 989
2079 11:06:33.145103 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
2080 11:06:33.145496
2081 11:06:33.148333 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
2082 11:06:33.148611
2083 11:06:33.151337 u1DelayCellOfst[8]=0 cells (0 PI)
2084 11:06:33.154797 u1DelayCellOfst[9]=2 cells (2 PI)
2085 11:06:33.158421 u1DelayCellOfst[10]=10 cells (8 PI)
2086 11:06:33.161785 u1DelayCellOfst[11]=1 cells (1 PI)
2087 11:06:33.164312 u1DelayCellOfst[12]=2 cells (2 PI)
2088 11:06:33.167998 u1DelayCellOfst[13]=2 cells (2 PI)
2089 11:06:33.171032 u1DelayCellOfst[14]=3 cells (3 PI)
2090 11:06:33.174312 u1DelayCellOfst[15]=9 cells (7 PI)
2091 11:06:33.177358 Byte1, DQ PI dly=977, DQM PI dly= 981
2092 11:06:33.180963 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
2093 11:06:33.181068
2094 11:06:33.187413 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
2095 11:06:33.187498
2096 11:06:33.187562 Write Rank1 MR14 =0x1c
2097 11:06:33.187622
2098 11:06:33.191069 Final TX Range 0 Vref 28
2099 11:06:33.191227
2100 11:06:33.197576 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2101 11:06:33.197744
2102 11:06:33.204355 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2103 11:06:33.210810 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2104 11:06:33.217427 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2105 11:06:33.220748 Write Rank1 MR3 =0xb0
2106 11:06:33.220906 DramC Write-DBI on
2107 11:06:33.221006 ==
2108 11:06:33.227809 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2109 11:06:33.230980 fsp= 1, odt_onoff= 1, Byte mode= 0
2110 11:06:33.231190 ==
2111 11:06:33.234121 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2112 11:06:33.234317
2113 11:06:33.237444 Begin, DQ Scan Range 701~765
2114 11:06:33.237681
2115 11:06:33.237810
2116 11:06:33.241690 TX Vref Scan disable
2117 11:06:33.244236 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2118 11:06:33.246975 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2119 11:06:33.250992 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2120 11:06:33.254145 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2121 11:06:33.257519 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2122 11:06:33.261047 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2123 11:06:33.264034 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2124 11:06:33.267813 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2125 11:06:33.270901 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2126 11:06:33.274082 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2127 11:06:33.277169 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2128 11:06:33.280844 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2129 11:06:33.283763 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2130 11:06:33.287141 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2131 11:06:33.290781 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2132 11:06:33.297076 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2133 11:06:33.300162 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2134 11:06:33.303832 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2135 11:06:33.306774 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2136 11:06:33.310223 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2137 11:06:33.313606 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2138 11:06:33.320564 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2139 11:06:33.324124 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2140 11:06:33.327231 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2141 11:06:33.330578 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2142 11:06:33.333550 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2143 11:06:33.336905 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2144 11:06:33.340582 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2145 11:06:33.343844 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2146 11:06:33.346965 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2147 11:06:33.350480 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2148 11:06:33.353513 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2149 11:06:33.356735 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2150 11:06:33.360068 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2151 11:06:33.366413 749 |2 6 45|[0] xxxxxxxx xxxxxxxx [MSB]
2152 11:06:33.369716 Byte0, DQ PI dly=735, DQM PI dly= 735
2153 11:06:33.372610 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
2154 11:06:33.373076
2155 11:06:33.376563 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
2156 11:06:33.376994
2157 11:06:33.379144 Byte1, DQ PI dly=723, DQM PI dly= 723
2158 11:06:33.386127 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2159 11:06:33.386581
2160 11:06:33.389134 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2161 11:06:33.389659
2162 11:06:33.397133 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2163 11:06:33.403198 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2164 11:06:33.409870 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2165 11:06:33.413412 Write Rank1 MR3 =0x30
2166 11:06:33.413810 DramC Write-DBI off
2167 11:06:33.414160
2168 11:06:33.416734 [DATLAT]
2169 11:06:33.420013 Freq=1600, CH0 RK1, use_rxtx_scan=0
2170 11:06:33.420401
2171 11:06:33.420703 DATLAT Default: 0x10
2172 11:06:33.423065 7, 0xFFFF, sum=0
2173 11:06:33.423453 8, 0xFFFF, sum=0
2174 11:06:33.426734 9, 0xFFFF, sum=0
2175 11:06:33.427201 10, 0xFFFF, sum=0
2176 11:06:33.430273 11, 0xFFFF, sum=0
2177 11:06:33.430746 12, 0xFFFF, sum=0
2178 11:06:33.433274 13, 0xFFFF, sum=0
2179 11:06:33.433787 14, 0x0, sum=1
2180 11:06:33.434175 15, 0x0, sum=2
2181 11:06:33.436698 16, 0x0, sum=3
2182 11:06:33.437215 17, 0x0, sum=4
2183 11:06:33.443145 pattern=2 first_step=14 total pass=5 best_step=16
2184 11:06:33.443571 ==
2185 11:06:33.446291 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2186 11:06:33.449508 fsp= 1, odt_onoff= 1, Byte mode= 0
2187 11:06:33.449893 ==
2188 11:06:33.453189 Start DQ dly to find pass range UseTestEngine =1
2189 11:06:33.460314 x-axis: bit #, y-axis: DQ dly (-127~63)
2190 11:06:33.460903 RX Vref Scan = 0
2191 11:06:33.462858 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2192 11:06:33.466056 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2193 11:06:33.469533 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2194 11:06:33.473229 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2195 11:06:33.473743 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2196 11:06:33.475933 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2197 11:06:33.478905 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2198 11:06:33.482996 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2199 11:06:33.485910 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2200 11:06:33.488758 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2201 11:06:33.491907 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2202 11:06:33.495666 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2203 11:06:33.498847 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2204 11:06:33.499283 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2205 11:06:33.502073 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2206 11:06:33.506339 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2207 11:06:33.508843 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2208 11:06:33.512113 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2209 11:06:33.514968 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2210 11:06:33.518584 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2211 11:06:33.521653 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2212 11:06:33.522143 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2213 11:06:33.525770 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2214 11:06:33.529037 -3, [0] xxxoxxxx xxxxxxxx [MSB]
2215 11:06:33.531412 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2216 11:06:33.535626 -1, [0] xxxoxoxx xxxxxxxx [MSB]
2217 11:06:33.538854 0, [0] xxxoxoxx oxxoxxxx [MSB]
2218 11:06:33.541861 1, [0] xxxoxoox oxxoxxxx [MSB]
2219 11:06:33.542318 2, [0] xxxoxoox ooxoxxxx [MSB]
2220 11:06:33.545522 3, [0] ooxoxoox ooxoooxx [MSB]
2221 11:06:33.547959 4, [0] ooxoxoox ooxoooxx [MSB]
2222 11:06:33.551639 5, [0] ooooxooo ooxoooox [MSB]
2223 11:06:33.555048 6, [0] oooooooo ooxooooo [MSB]
2224 11:06:33.558115 7, [0] oooooooo ooxooooo [MSB]
2225 11:06:33.561436 8, [0] oooooooo ooxooooo [MSB]
2226 11:06:33.564746 32, [0] oooxoooo oooooooo [MSB]
2227 11:06:33.568046 33, [0] oooxoxoo oooooooo [MSB]
2228 11:06:33.571026 34, [0] oooxoxoo xooxoooo [MSB]
2229 11:06:33.574423 35, [0] oooxoxxo xxoxoooo [MSB]
2230 11:06:33.574864 36, [0] oooxoxxo xxoxoooo [MSB]
2231 11:06:33.577352 37, [0] oooxoxxo xxoxxxoo [MSB]
2232 11:06:33.580680 38, [0] oooxoxxx xxoxxxoo [MSB]
2233 11:06:33.584466 39, [0] xxoxxxxx xxoxxxxo [MSB]
2234 11:06:33.587267 40, [0] xxoxxxxx xxoxxxxo [MSB]
2235 11:06:33.590885 41, [0] xxxxxxxx xxoxxxxx [MSB]
2236 11:06:33.593903 42, [0] xxxxxxxx xxoxxxxx [MSB]
2237 11:06:33.594342 43, [0] xxxxxxxx xxxxxxxx [MSB]
2238 11:06:33.600693 iDelay=43, Bit 0, Center 20 (3 ~ 38) 36
2239 11:06:33.604490 iDelay=43, Bit 1, Center 20 (3 ~ 38) 36
2240 11:06:33.607456 iDelay=43, Bit 2, Center 22 (5 ~ 40) 36
2241 11:06:33.610710 iDelay=43, Bit 3, Center 14 (-3 ~ 31) 35
2242 11:06:33.614481 iDelay=43, Bit 4, Center 22 (6 ~ 38) 33
2243 11:06:33.617665 iDelay=43, Bit 5, Center 15 (-1 ~ 32) 34
2244 11:06:33.621537 iDelay=43, Bit 6, Center 17 (1 ~ 34) 34
2245 11:06:33.623792 iDelay=43, Bit 7, Center 21 (5 ~ 37) 33
2246 11:06:33.627779 iDelay=43, Bit 8, Center 16 (0 ~ 33) 34
2247 11:06:33.630759 iDelay=43, Bit 9, Center 18 (2 ~ 34) 33
2248 11:06:33.634118 iDelay=43, Bit 10, Center 25 (9 ~ 42) 34
2249 11:06:33.637485 iDelay=43, Bit 11, Center 16 (0 ~ 33) 34
2250 11:06:33.640828 iDelay=43, Bit 12, Center 19 (3 ~ 36) 34
2251 11:06:33.646923 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
2252 11:06:33.650874 iDelay=43, Bit 14, Center 21 (5 ~ 38) 34
2253 11:06:33.654094 iDelay=43, Bit 15, Center 23 (6 ~ 40) 35
2254 11:06:33.654597 ==
2255 11:06:33.657241 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2256 11:06:33.660858 fsp= 1, odt_onoff= 1, Byte mode= 0
2257 11:06:33.661355 ==
2258 11:06:33.664324 DQS Delay:
2259 11:06:33.664823 DQS0 = 0, DQS1 = 0
2260 11:06:33.665153 DQM Delay:
2261 11:06:33.667512 DQM0 = 18, DQM1 = 19
2262 11:06:33.668007 DQ Delay:
2263 11:06:33.670397 DQ0 =20, DQ1 =20, DQ2 =22, DQ3 =14
2264 11:06:33.673585 DQ4 =22, DQ5 =15, DQ6 =17, DQ7 =21
2265 11:06:33.677735 DQ8 =16, DQ9 =18, DQ10 =25, DQ11 =16
2266 11:06:33.680225 DQ12 =19, DQ13 =19, DQ14 =21, DQ15 =23
2267 11:06:33.680649
2268 11:06:33.680977
2269 11:06:33.681287
2270 11:06:33.683464 [DramC_TX_OE_Calibration] TA2
2271 11:06:33.687046 Original DQ_B0 (3 6) =30, OEN = 27
2272 11:06:33.689978 Original DQ_B1 (3 6) =30, OEN = 27
2273 11:06:33.693624 23, 0x0, End_B0=23 End_B1=23
2274 11:06:33.696596 24, 0x0, End_B0=24 End_B1=24
2275 11:06:33.697078 25, 0x0, End_B0=25 End_B1=25
2276 11:06:33.700257 26, 0x0, End_B0=26 End_B1=26
2277 11:06:33.703723 27, 0x0, End_B0=27 End_B1=27
2278 11:06:33.706611 28, 0x0, End_B0=28 End_B1=28
2279 11:06:33.709489 29, 0x0, End_B0=29 End_B1=29
2280 11:06:33.709760 30, 0x0, End_B0=30 End_B1=30
2281 11:06:33.713437 31, 0xFFFF, End_B0=30 End_B1=30
2282 11:06:33.720515 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2283 11:06:33.726505 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2284 11:06:33.726892
2285 11:06:33.727185
2286 11:06:33.727453 Write Rank1 MR23 =0x3f
2287 11:06:33.729689 [DQSOSC]
2288 11:06:33.736829 [DQSOSCAuto] RK1, (LSB)MR18= 0xb0b0, (MSB)MR19= 0x202, tDQSOscB0 = 457 ps tDQSOscB1 = 457 ps
2289 11:06:33.743217 CH0_RK1: MR19=0x202, MR18=0xB0B0, DQSOSC=457, MR23=63, INC=11, DEC=17
2290 11:06:33.743664 Write Rank1 MR23 =0x3f
2291 11:06:33.746048 [DQSOSC]
2292 11:06:33.753244 [DQSOSCAuto] RK1, (LSB)MR18= 0xb3b3, (MSB)MR19= 0x202, tDQSOscB0 = 455 ps tDQSOscB1 = 455 ps
2293 11:06:33.756175 CH0 RK1: MR19=202, MR18=B3B3
2294 11:06:33.759528 [RxdqsGatingPostProcess] freq 1600
2295 11:06:33.765842 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2296 11:06:33.766421 Rank: 0
2297 11:06:33.769673 best DQS0 dly(2T, 0.5T) = (2, 6)
2298 11:06:33.772680 best DQS1 dly(2T, 0.5T) = (2, 6)
2299 11:06:33.776139 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2300 11:06:33.779496 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2301 11:06:33.779979 Rank: 1
2302 11:06:33.783012 best DQS0 dly(2T, 0.5T) = (2, 6)
2303 11:06:33.786076 best DQS1 dly(2T, 0.5T) = (2, 6)
2304 11:06:33.789158 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2305 11:06:33.792575 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2306 11:06:33.795917 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2307 11:06:33.799279 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2308 11:06:33.802827 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2309 11:06:33.805991 Write Rank0 MR13 =0x59
2310 11:06:33.806471 ==
2311 11:06:33.812612 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2312 11:06:33.816347 fsp= 1, odt_onoff= 1, Byte mode= 0
2313 11:06:33.816773 ==
2314 11:06:33.817116 === u2Vref_new: 0x56 --> 0x3a
2315 11:06:33.819288 === u2Vref_new: 0x58 --> 0x58
2316 11:06:33.822550 === u2Vref_new: 0x5a --> 0x5a
2317 11:06:33.826430 === u2Vref_new: 0x5c --> 0x78
2318 11:06:33.829314 === u2Vref_new: 0x5e --> 0x7a
2319 11:06:33.832632 === u2Vref_new: 0x60 --> 0x90
2320 11:06:33.835572 [CA 0] Center 37 (12~63) winsize 52
2321 11:06:33.839423 [CA 1] Center 37 (11~63) winsize 53
2322 11:06:33.842798 [CA 2] Center 35 (7~63) winsize 57
2323 11:06:33.846143 [CA 3] Center 35 (7~63) winsize 57
2324 11:06:33.849124 [CA 4] Center 34 (5~63) winsize 59
2325 11:06:33.852042 [CA 5] Center 28 (0~57) winsize 58
2326 11:06:33.852498
2327 11:06:33.855331 [CATrainingPosCal] consider 1 rank data
2328 11:06:33.859006 u2DelayCellTimex100 = 753/100 ps
2329 11:06:33.862351 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2330 11:06:33.865302 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2331 11:06:33.869005 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2332 11:06:33.872088 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2333 11:06:33.875428 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2334 11:06:33.881642 CA5 delay=28 (0~57),Diff = 0 PI (0 cell)
2335 11:06:33.882159
2336 11:06:33.885322 CA PerBit enable=1, Macro0, CA PI delay=28
2337 11:06:33.888273 === u2Vref_new: 0x5e --> 0x7a
2338 11:06:33.888702
2339 11:06:33.889034 Vref(ca) range 1: 30
2340 11:06:33.889345
2341 11:06:33.891737 CS Dly= 10 (41-0-32)
2342 11:06:33.894672 Write Rank0 MR13 =0xd8
2343 11:06:33.895094 Write Rank0 MR13 =0xd8
2344 11:06:33.898437 Write Rank0 MR12 =0x5e
2345 11:06:33.898938 Write Rank1 MR13 =0x59
2346 11:06:33.901490 ==
2347 11:06:33.905075 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2348 11:06:33.908042 fsp= 1, odt_onoff= 1, Byte mode= 0
2349 11:06:33.908467 ==
2350 11:06:33.911675 === u2Vref_new: 0x56 --> 0x3a
2351 11:06:33.914583 === u2Vref_new: 0x58 --> 0x58
2352 11:06:33.918143 === u2Vref_new: 0x5a --> 0x5a
2353 11:06:33.921617 === u2Vref_new: 0x5c --> 0x78
2354 11:06:33.924508 === u2Vref_new: 0x5e --> 0x7a
2355 11:06:33.927612 === u2Vref_new: 0x60 --> 0x90
2356 11:06:33.931483 [CA 0] Center 37 (11~63) winsize 53
2357 11:06:33.934197 [CA 1] Center 36 (10~63) winsize 54
2358 11:06:33.937874 [CA 2] Center 35 (8~63) winsize 56
2359 11:06:33.941129 [CA 3] Center 34 (6~63) winsize 58
2360 11:06:33.941630 [CA 4] Center 34 (5~63) winsize 59
2361 11:06:33.944251 [CA 5] Center 28 (0~56) winsize 57
2362 11:06:33.944675
2363 11:06:33.951011 [CATrainingPosCal] consider 2 rank data
2364 11:06:33.951510 u2DelayCellTimex100 = 753/100 ps
2365 11:06:33.957990 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2366 11:06:33.961201 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2367 11:06:33.964319 CA2 delay=35 (8~63),Diff = 7 PI (9 cell)
2368 11:06:33.967281 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2369 11:06:33.970699 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2370 11:06:33.973801 CA5 delay=28 (0~56),Diff = 0 PI (0 cell)
2371 11:06:33.974286
2372 11:06:33.977690 CA PerBit enable=1, Macro0, CA PI delay=28
2373 11:06:33.980368 === u2Vref_new: 0x60 --> 0x90
2374 11:06:33.980843
2375 11:06:33.983872 Vref(ca) range 1: 32
2376 11:06:33.984358
2377 11:06:33.984693 CS Dly= 10 (41-0-32)
2378 11:06:33.987103 Write Rank1 MR13 =0xd8
2379 11:06:33.990187 Write Rank1 MR13 =0xd8
2380 11:06:33.990575 Write Rank1 MR12 =0x60
2381 11:06:33.994462 [RankSwap] Rank num 2, (Multi 1), Rank 0
2382 11:06:33.997122 Write Rank0 MR2 =0xad
2383 11:06:33.997582 [Write Leveling]
2384 11:06:34.000687 delay byte0 byte1 byte2 byte3
2385 11:06:34.001141
2386 11:06:34.003457 10 0 0
2387 11:06:34.003847 11 0 0
2388 11:06:34.006637 12 0 0
2389 11:06:34.007028 13 0 0
2390 11:06:34.007331 14 0 0
2391 11:06:34.010814 15 0 0
2392 11:06:34.011321 16 0 0
2393 11:06:34.013608 17 0 0
2394 11:06:34.013996 18 0 0
2395 11:06:34.017225 19 0 0
2396 11:06:34.017615 20 0 0
2397 11:06:34.017918 21 0 0
2398 11:06:34.020395 22 0 0
2399 11:06:34.020786 23 0 0
2400 11:06:34.023723 24 0 0
2401 11:06:34.024191 25 0 0
2402 11:06:34.026901 26 0 0
2403 11:06:34.027422 27 0 0
2404 11:06:34.027737 28 0 0
2405 11:06:34.030025 29 0 0
2406 11:06:34.030491 30 0 0
2407 11:06:34.033044 31 0 0
2408 11:06:34.033433 32 0 0
2409 11:06:34.033735 33 0 0
2410 11:06:34.036720 34 ff ff
2411 11:06:34.037181 35 ff ff
2412 11:06:34.040524 36 ff ff
2413 11:06:34.040914 37 ff ff
2414 11:06:34.043540 38 ff ff
2415 11:06:34.044009 39 ff ff
2416 11:06:34.046582 40 ff ff
2417 11:06:34.050355 pass bytecount = 0xff (0xff: all bytes pass)
2418 11:06:34.050815
2419 11:06:34.051113 DQS0 dly: 34
2420 11:06:34.053096 DQS1 dly: 34
2421 11:06:34.053557 Write Rank0 MR2 =0x2d
2422 11:06:34.056568 [RankSwap] Rank num 2, (Multi 1), Rank 0
2423 11:06:34.059967 Write Rank0 MR1 =0xd6
2424 11:06:34.060421 [Gating]
2425 11:06:34.060718 ==
2426 11:06:34.066585 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2427 11:06:34.069691 fsp= 1, odt_onoff= 1, Byte mode= 0
2428 11:06:34.070256 ==
2429 11:06:34.072595 3 1 0 |2c2b 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2430 11:06:34.079365 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2431 11:06:34.082781 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2432 11:06:34.085531 3 1 12 |2c2b 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
2433 11:06:34.092303 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2434 11:06:34.096281 3 1 20 |2c2b 3635 |(11 11)(11 11) |(1 1)(0 0)| 0
2435 11:06:34.099446 [Byte 0] Lead/lag falling Transition (3, 1, 20)
2436 11:06:34.105532 3 1 24 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 0)| 0
2437 11:06:34.108581 3 1 28 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
2438 11:06:34.111665 3 2 0 |2c2b b0b |(11 11)(11 11) |(1 0)(1 1)| 0
2439 11:06:34.118939 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2440 11:06:34.121691 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2441 11:06:34.124746 3 2 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2442 11:06:34.131703 3 2 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2443 11:06:34.135150 3 2 20 |2c2b 2322 |(11 11)(11 11) |(1 0)(0 0)| 0
2444 11:06:34.138434 [Byte 0] Lead/lag Transition tap number (9)
2445 11:06:34.141650 3 2 24 |606 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2446 11:06:34.147867 3 2 28 |3534 2f2e |(11 11)(11 11) |(0 0)(0 1)| 0
2447 11:06:34.151576 3 3 0 |3534 505 |(11 11)(11 11) |(0 0)(1 1)| 0
2448 11:06:34.154544 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2449 11:06:34.161430 3 3 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2450 11:06:34.165024 3 3 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2451 11:06:34.168715 3 3 16 |3534 2e2d |(11 11)(11 11) |(1 1)(1 1)| 0
2452 11:06:34.174304 3 3 20 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
2453 11:06:34.177701 3 3 24 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
2454 11:06:34.181152 3 3 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2455 11:06:34.187354 3 4 0 |3534 2625 |(11 11)(11 11) |(0 0)(1 1)| 0
2456 11:06:34.190530 [Byte 1] Lead/lag Transition tap number (1)
2457 11:06:34.194190 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2458 11:06:34.197277 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2459 11:06:34.203941 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2460 11:06:34.207245 3 4 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2461 11:06:34.210413 3 4 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2462 11:06:34.217118 3 4 24 |403 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2463 11:06:34.220615 3 4 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2464 11:06:34.223520 3 5 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2465 11:06:34.230605 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2466 11:06:34.233569 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2467 11:06:34.237014 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2468 11:06:34.243473 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2469 11:06:34.246751 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2470 11:06:34.249877 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2471 11:06:34.256838 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2472 11:06:34.260113 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2473 11:06:34.263535 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2474 11:06:34.270180 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2475 11:06:34.272859 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2476 11:06:34.276588 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2477 11:06:34.282606 [Byte 0] Lead/lag falling Transition (3, 6, 16)
2478 11:06:34.286658 3 6 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2479 11:06:34.289284 [Byte 0] Lead/lag Transition tap number (2)
2480 11:06:34.292624 3 6 24 |403 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2481 11:06:34.299253 [Byte 1] Lead/lag Transition tap number (1)
2482 11:06:34.303169 3 6 28 |404 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
2483 11:06:34.306061 3 7 0 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
2484 11:06:34.309474 [Byte 0]First pass (3, 7, 0)
2485 11:06:34.312627 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2486 11:06:34.315560 [Byte 1]First pass (3, 7, 4)
2487 11:06:34.318909 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2488 11:06:34.322151 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2489 11:06:34.329173 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2490 11:06:34.332229 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2491 11:06:34.335441 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2492 11:06:34.339018 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2493 11:06:34.345029 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2494 11:06:34.348122 4 0 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2495 11:06:34.351786 All bytes gating window > 1UI, Early break!
2496 11:06:34.352214
2497 11:06:34.355321 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 20)
2498 11:06:34.355821
2499 11:06:34.357670 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 26)
2500 11:06:34.358136
2501 11:06:34.358466
2502 11:06:34.358771
2503 11:06:34.364913 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2504 11:06:34.365412
2505 11:06:34.368217 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 26)
2506 11:06:34.368728
2507 11:06:34.369059
2508 11:06:34.371628 Write Rank0 MR1 =0x56
2509 11:06:34.372124
2510 11:06:34.372451 best RODT dly(2T, 0.5T) = (2, 3)
2511 11:06:34.374650
2512 11:06:34.375069 best RODT dly(2T, 0.5T) = (2, 3)
2513 11:06:34.377890 ==
2514 11:06:34.380815 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2515 11:06:34.384378 fsp= 1, odt_onoff= 1, Byte mode= 0
2516 11:06:34.384838 ==
2517 11:06:34.387308 Start DQ dly to find pass range UseTestEngine =0
2518 11:06:34.390961 x-axis: bit #, y-axis: DQ dly (-127~63)
2519 11:06:34.394125 RX Vref Scan = 0
2520 11:06:34.397334 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2521 11:06:34.400311 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2522 11:06:34.403838 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2523 11:06:34.406812 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2524 11:06:34.407278 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2525 11:06:34.410076 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2526 11:06:34.413343 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2527 11:06:34.416607 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2528 11:06:34.420392 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2529 11:06:34.423370 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2530 11:06:34.426518 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2531 11:06:34.429889 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2532 11:06:34.433070 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2533 11:06:34.433473 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2534 11:06:34.436425 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2535 11:06:34.440188 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2536 11:06:34.442879 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2537 11:06:34.446755 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2538 11:06:34.449914 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2539 11:06:34.453169 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2540 11:06:34.456030 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2541 11:06:34.456431 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2542 11:06:34.459287 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2543 11:06:34.462877 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2544 11:06:34.465828 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2545 11:06:34.470057 -1, [0] xxxxxxxx xxxxxxxo [MSB]
2546 11:06:34.472484 0, [0] xxxxxxxx ooxxxxxo [MSB]
2547 11:06:34.476178 1, [0] xxxoxxxx ooxxxxxo [MSB]
2548 11:06:34.476583 2, [0] xxxoxxxx ooxxxxxo [MSB]
2549 11:06:34.479501 3, [0] xxooxxxx oooxxxxo [MSB]
2550 11:06:34.482740 4, [0] xooooxxo ooooxxxo [MSB]
2551 11:06:34.485903 5, [0] xooooxxo ooooooxo [MSB]
2552 11:06:34.488908 6, [0] xooooxxo oooooooo [MSB]
2553 11:06:34.492158 7, [0] xooooooo oooooooo [MSB]
2554 11:06:34.495516 8, [0] xooooooo oooooooo [MSB]
2555 11:06:34.495985 33, [0] oooxoooo ooooooox [MSB]
2556 11:06:34.499379 34, [0] oooxoooo ooooooox [MSB]
2557 11:06:34.502423 35, [0] oooxoooo xoooooox [MSB]
2558 11:06:34.505522 36, [0] oooxoooo xxooooox [MSB]
2559 11:06:34.509167 37, [0] ooxxoooo xxooooox [MSB]
2560 11:06:34.512223 38, [0] ooxxoooo xxooooox [MSB]
2561 11:06:34.515217 39, [0] xxxxxoox xxooxoox [MSB]
2562 11:06:34.515628 40, [0] xxxxxoox xxxoxoox [MSB]
2563 11:06:34.518633 41, [0] xxxxxxxx xxxxxxxx [MSB]
2564 11:06:34.521749 iDelay=41, Bit 0, Center 23 (9 ~ 38) 30
2565 11:06:34.525443 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
2566 11:06:34.532016 iDelay=41, Bit 2, Center 19 (3 ~ 36) 34
2567 11:06:34.535057 iDelay=41, Bit 3, Center 16 (1 ~ 32) 32
2568 11:06:34.538765 iDelay=41, Bit 4, Center 21 (4 ~ 38) 35
2569 11:06:34.541819 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2570 11:06:34.545030 iDelay=41, Bit 6, Center 23 (7 ~ 40) 34
2571 11:06:34.548085 iDelay=41, Bit 7, Center 21 (4 ~ 38) 35
2572 11:06:34.551735 iDelay=41, Bit 8, Center 17 (0 ~ 34) 35
2573 11:06:34.555052 iDelay=41, Bit 9, Center 17 (0 ~ 35) 36
2574 11:06:34.558653 iDelay=41, Bit 10, Center 21 (3 ~ 39) 37
2575 11:06:34.561109 iDelay=41, Bit 11, Center 22 (4 ~ 40) 37
2576 11:06:34.564435 iDelay=41, Bit 12, Center 21 (5 ~ 38) 34
2577 11:06:34.571505 iDelay=41, Bit 13, Center 22 (5 ~ 40) 36
2578 11:06:34.574650 iDelay=41, Bit 14, Center 23 (6 ~ 40) 35
2579 11:06:34.577795 iDelay=41, Bit 15, Center 14 (-4 ~ 32) 37
2580 11:06:34.578270 ==
2581 11:06:34.581006 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2582 11:06:34.584436 fsp= 1, odt_onoff= 1, Byte mode= 0
2583 11:06:34.584941 ==
2584 11:06:34.587520 DQS Delay:
2585 11:06:34.587939 DQS0 = 0, DQS1 = 0
2586 11:06:34.590701 DQM Delay:
2587 11:06:34.591122 DQM0 = 20, DQM1 = 19
2588 11:06:34.591449 DQ Delay:
2589 11:06:34.593980 DQ0 =23, DQ1 =21, DQ2 =19, DQ3 =16
2590 11:06:34.597829 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =21
2591 11:06:34.600843 DQ8 =17, DQ9 =17, DQ10 =21, DQ11 =22
2592 11:06:34.604054 DQ12 =21, DQ13 =22, DQ14 =23, DQ15 =14
2593 11:06:34.604477
2594 11:06:34.604807
2595 11:06:34.607582 DramC Write-DBI off
2596 11:06:34.608089 ==
2597 11:06:34.614252 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2598 11:06:34.616798 fsp= 1, odt_onoff= 1, Byte mode= 0
2599 11:06:34.617224 ==
2600 11:06:34.620377 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2601 11:06:34.620803
2602 11:06:34.623615 Begin, DQ Scan Range 930~1186
2603 11:06:34.624041
2604 11:06:34.624369
2605 11:06:34.626958 TX Vref Scan disable
2606 11:06:34.630540 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2607 11:06:34.633346 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2608 11:06:34.636880 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2609 11:06:34.640174 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2610 11:06:34.643158 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2611 11:06:34.647054 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2612 11:06:34.649984 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2613 11:06:34.652697 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2614 11:06:34.656329 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2615 11:06:34.660074 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2616 11:06:34.662793 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2617 11:06:34.669921 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2618 11:06:34.673007 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2619 11:06:34.675912 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2620 11:06:34.679047 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2621 11:06:34.682713 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2622 11:06:34.685673 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2623 11:06:34.689122 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2624 11:06:34.693062 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2625 11:06:34.695879 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2626 11:06:34.699003 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2627 11:06:34.702656 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2628 11:06:34.705794 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2629 11:06:34.709171 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2630 11:06:34.715534 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2631 11:06:34.718354 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2632 11:06:34.721568 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2633 11:06:34.725640 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2634 11:06:34.728842 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2635 11:06:34.731904 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2636 11:06:34.735427 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2637 11:06:34.738566 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2638 11:06:34.741771 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2639 11:06:34.744884 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2640 11:06:34.748105 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2641 11:06:34.751577 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2642 11:06:34.754777 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2643 11:06:34.757938 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2644 11:06:34.761334 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2645 11:06:34.764706 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2646 11:06:34.771183 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2647 11:06:34.774485 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2648 11:06:34.777546 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2649 11:06:34.780746 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2650 11:06:34.784068 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2651 11:06:34.787278 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2652 11:06:34.790651 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2653 11:06:34.794158 977 |3 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2654 11:06:34.797566 978 |3 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2655 11:06:34.800476 979 |3 6 19|[0] xxxxxxxx xxxxxxxx [MSB]
2656 11:06:34.803639 980 |3 6 20|[0] xxxxxxxx xxxxxxxx [MSB]
2657 11:06:34.807343 981 |3 6 21|[0] xxxxxxxx xxxxxxxx [MSB]
2658 11:06:34.810534 982 |3 6 22|[0] xxxxxxxx ooxxxxxo [MSB]
2659 11:06:34.813836 983 |3 6 23|[0] xxxxxxxx ooxxxxxo [MSB]
2660 11:06:34.820330 984 |3 6 24|[0] xooooooo ooxxxxxo [MSB]
2661 11:06:34.823393 985 |3 6 25|[0] oooooooo oooxoxoo [MSB]
2662 11:06:34.826782 997 |3 6 37|[0] oooooooo ooooooox [MSB]
2663 11:06:34.829938 998 |3 6 38|[0] oooooooo ooooooox [MSB]
2664 11:06:34.833470 999 |3 6 39|[0] oooooooo ooooooox [MSB]
2665 11:06:34.836758 1000 |3 6 40|[0] oooooooo ooooooox [MSB]
2666 11:06:34.843177 1001 |3 6 41|[0] oooxoooo oxooooox [MSB]
2667 11:06:34.846108 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2668 11:06:34.850092 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
2669 11:06:34.852717 1004 |3 6 44|[0] ooxxoooo xxxxxxxx [MSB]
2670 11:06:34.856175 1005 |3 6 45|[0] ooxxoooo xxxxxxxx [MSB]
2671 11:06:34.859408 1006 |3 6 46|[0] ooxxxoox xxxxxxxx [MSB]
2672 11:06:34.862686 1007 |3 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2673 11:06:34.866145 Byte0, DQ PI dly=993, DQM PI dly= 993
2674 11:06:34.872885 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 33)
2675 11:06:34.873313
2676 11:06:34.875984 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 33)
2677 11:06:34.876367
2678 11:06:34.879662 Byte1, DQ PI dly=991, DQM PI dly= 991
2679 11:06:34.883133 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
2680 11:06:34.883519
2681 11:06:34.889133 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
2682 11:06:34.889641
2683 11:06:34.889942 ==
2684 11:06:34.892930 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2685 11:06:34.896115 fsp= 1, odt_onoff= 1, Byte mode= 0
2686 11:06:34.896644 ==
2687 11:06:34.902174 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2688 11:06:34.902558
2689 11:06:34.905526 Begin, DQ Scan Range 967~1031
2690 11:06:34.905907 Write Rank0 MR14 =0x0
2691 11:06:34.913197
2692 11:06:34.913731 CH=1, VrefRange= 0, VrefLevel = 0
2693 11:06:34.919959 TX Bit0 (986~1002) 17 994, Bit8 (986~995) 10 990,
2694 11:06:34.922748 TX Bit1 (985~1001) 17 993, Bit9 (986~994) 9 990,
2695 11:06:34.929727 TX Bit2 (984~998) 15 991, Bit10 (987~1000) 14 993,
2696 11:06:34.933122 TX Bit3 (983~994) 12 988, Bit11 (988~999) 12 993,
2697 11:06:34.936722 TX Bit4 (985~1000) 16 992, Bit12 (987~999) 13 993,
2698 11:06:34.943545 TX Bit5 (986~1001) 16 993, Bit13 (988~999) 12 993,
2699 11:06:34.946505 TX Bit6 (986~1001) 16 993, Bit14 (987~995) 9 991,
2700 11:06:34.952857 TX Bit7 (985~999) 15 992, Bit15 (983~991) 9 987,
2701 11:06:34.953245
2702 11:06:34.953540 Write Rank0 MR14 =0x2
2703 11:06:34.961524
2704 11:06:34.961980 CH=1, VrefRange= 0, VrefLevel = 2
2705 11:06:34.967738 TX Bit0 (986~1003) 18 994, Bit8 (985~995) 11 990,
2706 11:06:34.971189 TX Bit1 (984~1002) 19 993, Bit9 (985~995) 11 990,
2707 11:06:34.977596 TX Bit2 (984~998) 15 991, Bit10 (987~1001) 15 994,
2708 11:06:34.981018 TX Bit3 (982~995) 14 988, Bit11 (987~1000) 14 993,
2709 11:06:34.988013 TX Bit4 (985~1001) 17 993, Bit12 (987~1000) 14 993,
2710 11:06:34.990751 TX Bit5 (986~1002) 17 994, Bit13 (987~1000) 14 993,
2711 11:06:34.994262 TX Bit6 (985~1002) 18 993, Bit14 (987~996) 10 991,
2712 11:06:35.000915 TX Bit7 (985~999) 15 992, Bit15 (982~993) 12 987,
2713 11:06:35.001450
2714 11:06:35.001909 Write Rank0 MR14 =0x4
2715 11:06:35.009353
2716 11:06:35.009737 CH=1, VrefRange= 0, VrefLevel = 4
2717 11:06:35.016448 TX Bit0 (985~1004) 20 994, Bit8 (984~996) 13 990,
2718 11:06:35.019631 TX Bit1 (984~1002) 19 993, Bit9 (985~995) 11 990,
2719 11:06:35.026247 TX Bit2 (984~999) 16 991, Bit10 (986~1001) 16 993,
2720 11:06:35.029357 TX Bit3 (982~997) 16 989, Bit11 (987~1001) 15 994,
2721 11:06:35.036212 TX Bit4 (985~1002) 18 993, Bit12 (987~1001) 15 994,
2722 11:06:35.039114 TX Bit5 (985~1003) 19 994, Bit13 (987~1001) 15 994,
2723 11:06:35.043003 TX Bit6 (985~1002) 18 993, Bit14 (987~998) 12 992,
2724 11:06:35.049162 TX Bit7 (985~1000) 16 992, Bit15 (981~993) 13 987,
2725 11:06:35.049550
2726 11:06:35.049846 Write Rank0 MR14 =0x6
2727 11:06:35.059017
2728 11:06:35.059470 CH=1, VrefRange= 0, VrefLevel = 6
2729 11:06:35.065379 TX Bit0 (985~1005) 21 995, Bit8 (984~997) 14 990,
2730 11:06:35.068843 TX Bit1 (984~1003) 20 993, Bit9 (984~996) 13 990,
2731 11:06:35.075226 TX Bit2 (983~999) 17 991, Bit10 (986~1001) 16 993,
2732 11:06:35.078486 TX Bit3 (981~997) 17 989, Bit11 (987~1001) 15 994,
2733 11:06:35.084649 TX Bit4 (985~1002) 18 993, Bit12 (986~1001) 16 993,
2734 11:06:35.087936 TX Bit5 (985~1004) 20 994, Bit13 (987~1001) 15 994,
2735 11:06:35.091532 TX Bit6 (985~1004) 20 994, Bit14 (986~999) 14 992,
2736 11:06:35.098378 TX Bit7 (985~1002) 18 993, Bit15 (981~994) 14 987,
2737 11:06:35.098947
2738 11:06:35.101122 Write Rank0 MR14 =0x8
2739 11:06:35.107636
2740 11:06:35.108127 CH=1, VrefRange= 0, VrefLevel = 8
2741 11:06:35.113825 TX Bit0 (985~1005) 21 995, Bit8 (984~999) 16 991,
2742 11:06:35.117421 TX Bit1 (984~1004) 21 994, Bit9 (984~997) 14 990,
2743 11:06:35.123733 TX Bit2 (984~1000) 17 992, Bit10 (986~1002) 17 994,
2744 11:06:35.127141 TX Bit3 (981~998) 18 989, Bit11 (987~1002) 16 994,
2745 11:06:35.133585 TX Bit4 (984~1003) 20 993, Bit12 (986~1001) 16 993,
2746 11:06:35.136936 TX Bit5 (985~1005) 21 995, Bit13 (987~1002) 16 994,
2747 11:06:35.140344 TX Bit6 (985~1004) 20 994, Bit14 (986~1000) 15 993,
2748 11:06:35.146562 TX Bit7 (985~1002) 18 993, Bit15 (980~994) 15 987,
2749 11:06:35.146985
2750 11:06:35.149810 Write Rank0 MR14 =0xa
2751 11:06:35.156516
2752 11:06:35.159295 CH=1, VrefRange= 0, VrefLevel = 10
2753 11:06:35.162868 TX Bit0 (985~1006) 22 995, Bit8 (983~999) 17 991,
2754 11:06:35.165908 TX Bit1 (984~1005) 22 994, Bit9 (984~998) 15 991,
2755 11:06:35.173346 TX Bit2 (983~1001) 19 992, Bit10 (985~1002) 18 993,
2756 11:06:35.176227 TX Bit3 (981~999) 19 990, Bit11 (986~1002) 17 994,
2757 11:06:35.182794 TX Bit4 (984~1004) 21 994, Bit12 (986~1002) 17 994,
2758 11:06:35.186093 TX Bit5 (985~1005) 21 995, Bit13 (987~1002) 16 994,
2759 11:06:35.192598 TX Bit6 (984~1005) 22 994, Bit14 (986~1001) 16 993,
2760 11:06:35.195866 TX Bit7 (984~1003) 20 993, Bit15 (980~994) 15 987,
2761 11:06:35.196296
2762 11:06:35.199183 Write Rank0 MR14 =0xc
2763 11:06:35.205933
2764 11:06:35.209472 CH=1, VrefRange= 0, VrefLevel = 12
2765 11:06:35.212421 TX Bit0 (985~1006) 22 995, Bit8 (983~999) 17 991,
2766 11:06:35.215785 TX Bit1 (984~1005) 22 994, Bit9 (984~998) 15 991,
2767 11:06:35.221854 TX Bit2 (982~1002) 21 992, Bit10 (985~1002) 18 993,
2768 11:06:35.225313 TX Bit3 (980~999) 20 989, Bit11 (986~1002) 17 994,
2769 11:06:35.232380 TX Bit4 (984~1005) 22 994, Bit12 (985~1002) 18 993,
2770 11:06:35.235299 TX Bit5 (985~1005) 21 995, Bit13 (986~1002) 17 994,
2771 11:06:35.238817 TX Bit6 (984~1005) 22 994, Bit14 (985~1001) 17 993,
2772 11:06:35.244904 TX Bit7 (984~1004) 21 994, Bit15 (979~995) 17 987,
2773 11:06:35.245395
2774 11:06:35.248091 Write Rank0 MR14 =0xe
2775 11:06:35.254923
2776 11:06:35.258179 CH=1, VrefRange= 0, VrefLevel = 14
2777 11:06:35.261422 TX Bit0 (985~1006) 22 995, Bit8 (983~1000) 18 991,
2778 11:06:35.264517 TX Bit1 (984~1006) 23 995, Bit9 (983~1000) 18 991,
2779 11:06:35.271044 TX Bit2 (982~1002) 21 992, Bit10 (986~1003) 18 994,
2780 11:06:35.274312 TX Bit3 (980~999) 20 989, Bit11 (986~1003) 18 994,
2781 11:06:35.281095 TX Bit4 (984~1005) 22 994, Bit12 (985~1003) 19 994,
2782 11:06:35.284095 TX Bit5 (985~1006) 22 995, Bit13 (986~1002) 17 994,
2783 11:06:35.291170 TX Bit6 (984~1006) 23 995, Bit14 (986~1001) 16 993,
2784 11:06:35.294156 TX Bit7 (984~1005) 22 994, Bit15 (979~995) 17 987,
2785 11:06:35.294668
2786 11:06:35.297427 Write Rank0 MR14 =0x10
2787 11:06:35.304758
2788 11:06:35.305175 CH=1, VrefRange= 0, VrefLevel = 16
2789 11:06:35.310862 TX Bit0 (985~1007) 23 996, Bit8 (982~1001) 20 991,
2790 11:06:35.314539 TX Bit1 (983~1006) 24 994, Bit9 (982~1000) 19 991,
2791 11:06:35.321151 TX Bit2 (981~1003) 23 992, Bit10 (985~1003) 19 994,
2792 11:06:35.324162 TX Bit3 (979~1000) 22 989, Bit11 (985~1003) 19 994,
2793 11:06:35.330882 TX Bit4 (983~1006) 24 994, Bit12 (985~1003) 19 994,
2794 11:06:35.334833 TX Bit5 (984~1006) 23 995, Bit13 (986~1003) 18 994,
2795 11:06:35.341069 TX Bit6 (984~1006) 23 995, Bit14 (985~1002) 18 993,
2796 11:06:35.343639 TX Bit7 (984~1005) 22 994, Bit15 (979~996) 18 987,
2797 11:06:35.344102
2798 11:06:35.347553 Write Rank0 MR14 =0x12
2799 11:06:35.354740
2800 11:06:35.358540 CH=1, VrefRange= 0, VrefLevel = 18
2801 11:06:35.360817 TX Bit0 (984~1007) 24 995, Bit8 (983~1001) 19 992,
2802 11:06:35.364046 TX Bit1 (983~1006) 24 994, Bit9 (981~1001) 21 991,
2803 11:06:35.370654 TX Bit2 (982~1004) 23 993, Bit10 (984~1004) 21 994,
2804 11:06:35.373825 TX Bit3 (979~1000) 22 989, Bit11 (986~1004) 19 995,
2805 11:06:35.380832 TX Bit4 (983~1006) 24 994, Bit12 (985~1003) 19 994,
2806 11:06:35.384335 TX Bit5 (984~1006) 23 995, Bit13 (986~1003) 18 994,
2807 11:06:35.390413 TX Bit6 (984~1006) 23 995, Bit14 (985~1002) 18 993,
2808 11:06:35.394166 TX Bit7 (984~1005) 22 994, Bit15 (979~996) 18 987,
2809 11:06:35.394675
2810 11:06:35.396828 Write Rank0 MR14 =0x14
2811 11:06:35.404349
2812 11:06:35.407026 CH=1, VrefRange= 0, VrefLevel = 20
2813 11:06:35.410639 TX Bit0 (984~1007) 24 995, Bit8 (981~1001) 21 991,
2814 11:06:35.414375 TX Bit1 (984~1006) 23 995, Bit9 (981~1001) 21 991,
2815 11:06:35.420167 TX Bit2 (981~1004) 24 992, Bit10 (985~1004) 20 994,
2816 11:06:35.423743 TX Bit3 (979~1001) 23 990, Bit11 (985~1004) 20 994,
2817 11:06:35.430644 TX Bit4 (983~1006) 24 994, Bit12 (985~1004) 20 994,
2818 11:06:35.433848 TX Bit5 (984~1006) 23 995, Bit13 (986~1004) 19 995,
2819 11:06:35.439859 TX Bit6 (984~1006) 23 995, Bit14 (985~1002) 18 993,
2820 11:06:35.443828 TX Bit7 (984~1005) 22 994, Bit15 (978~997) 20 987,
2821 11:06:35.444338
2822 11:06:35.446595 Write Rank0 MR14 =0x16
2823 11:06:35.453668
2824 11:06:35.456888 CH=1, VrefRange= 0, VrefLevel = 22
2825 11:06:35.459907 TX Bit0 (984~1007) 24 995, Bit8 (981~1002) 22 991,
2826 11:06:35.463122 TX Bit1 (983~1007) 25 995, Bit9 (981~1001) 21 991,
2827 11:06:35.469746 TX Bit2 (981~1005) 25 993, Bit10 (984~1005) 22 994,
2828 11:06:35.473212 TX Bit3 (978~1001) 24 989, Bit11 (985~1005) 21 995,
2829 11:06:35.479763 TX Bit4 (983~1006) 24 994, Bit12 (984~1005) 22 994,
2830 11:06:35.483362 TX Bit5 (984~1006) 23 995, Bit13 (985~1005) 21 995,
2831 11:06:35.489414 TX Bit6 (983~1006) 24 994, Bit14 (985~1003) 19 994,
2832 11:06:35.492610 TX Bit7 (984~1006) 23 995, Bit15 (978~998) 21 988,
2833 11:06:35.493018
2834 11:06:35.496130 Write Rank0 MR14 =0x18
2835 11:06:35.503524
2836 11:06:35.506890 CH=1, VrefRange= 0, VrefLevel = 24
2837 11:06:35.510360 TX Bit0 (984~1008) 25 996, Bit8 (980~1002) 23 991,
2838 11:06:35.513666 TX Bit1 (983~1007) 25 995, Bit9 (980~1002) 23 991,
2839 11:06:35.520242 TX Bit2 (980~1006) 27 993, Bit10 (984~1005) 22 994,
2840 11:06:35.523039 TX Bit3 (978~1002) 25 990, Bit11 (985~1005) 21 995,
2841 11:06:35.529843 TX Bit4 (983~1007) 25 995, Bit12 (985~1005) 21 995,
2842 11:06:35.533270 TX Bit5 (984~1007) 24 995, Bit13 (985~1005) 21 995,
2843 11:06:35.539790 TX Bit6 (983~1007) 25 995, Bit14 (985~1003) 19 994,
2844 11:06:35.542859 TX Bit7 (983~1006) 24 994, Bit15 (978~999) 22 988,
2845 11:06:35.543294
2846 11:06:35.546364 Write Rank0 MR14 =0x1a
2847 11:06:35.553437
2848 11:06:35.556552 CH=1, VrefRange= 0, VrefLevel = 26
2849 11:06:35.559965 TX Bit0 (984~1008) 25 996, Bit8 (980~1002) 23 991,
2850 11:06:35.563458 TX Bit1 (982~1007) 26 994, Bit9 (980~1002) 23 991,
2851 11:06:35.570211 TX Bit2 (980~1006) 27 993, Bit10 (984~1005) 22 994,
2852 11:06:35.573398 TX Bit3 (978~1003) 26 990, Bit11 (985~1006) 22 995,
2853 11:06:35.580211 TX Bit4 (982~1007) 26 994, Bit12 (984~1005) 22 994,
2854 11:06:35.583283 TX Bit5 (984~1007) 24 995, Bit13 (985~1005) 21 995,
2855 11:06:35.589606 TX Bit6 (983~1007) 25 995, Bit14 (984~1004) 21 994,
2856 11:06:35.592805 TX Bit7 (982~1007) 26 994, Bit15 (977~1000) 24 988,
2857 11:06:35.593309
2858 11:06:35.596309 wait MRW command Rank0 MR14 =0x1c fired (1)
2859 11:06:35.599174 Write Rank0 MR14 =0x1c
2860 11:06:35.607515
2861 11:06:35.610360 CH=1, VrefRange= 0, VrefLevel = 28
2862 11:06:35.613522 TX Bit0 (984~1008) 25 996, Bit8 (981~1003) 23 992,
2863 11:06:35.617430 TX Bit1 (983~1007) 25 995, Bit9 (980~1002) 23 991,
2864 11:06:35.623612 TX Bit2 (979~1006) 28 992, Bit10 (983~1004) 22 993,
2865 11:06:35.626728 TX Bit3 (978~1003) 26 990, Bit11 (985~1006) 22 995,
2866 11:06:35.633720 TX Bit4 (982~1007) 26 994, Bit12 (985~1006) 22 995,
2867 11:06:35.637148 TX Bit5 (984~1008) 25 996, Bit13 (985~1006) 22 995,
2868 11:06:35.644011 TX Bit6 (983~1007) 25 995, Bit14 (984~1004) 21 994,
2869 11:06:35.646784 TX Bit7 (982~1007) 26 994, Bit15 (978~1000) 23 989,
2870 11:06:35.647224
2871 11:06:35.649888 Write Rank0 MR14 =0x1e
2872 11:06:35.657114
2873 11:06:35.660400 CH=1, VrefRange= 0, VrefLevel = 30
2874 11:06:35.663642 TX Bit0 (984~1008) 25 996, Bit8 (981~1003) 23 992,
2875 11:06:35.666752 TX Bit1 (983~1007) 25 995, Bit9 (980~1002) 23 991,
2876 11:06:35.673750 TX Bit2 (979~1006) 28 992, Bit10 (983~1004) 22 993,
2877 11:06:35.676669 TX Bit3 (978~1003) 26 990, Bit11 (985~1006) 22 995,
2878 11:06:35.683344 TX Bit4 (982~1007) 26 994, Bit12 (985~1006) 22 995,
2879 11:06:35.686572 TX Bit5 (984~1008) 25 996, Bit13 (985~1006) 22 995,
2880 11:06:35.693338 TX Bit6 (983~1007) 25 995, Bit14 (984~1004) 21 994,
2881 11:06:35.696197 TX Bit7 (982~1007) 26 994, Bit15 (978~1000) 23 989,
2882 11:06:35.696630
2883 11:06:35.700181 wait MRW command Rank0 MR14 =0x20 fired (1)
2884 11:06:35.703625 Write Rank0 MR14 =0x20
2885 11:06:35.711105
2886 11:06:35.714920 CH=1, VrefRange= 0, VrefLevel = 32
2887 11:06:35.718044 TX Bit0 (984~1008) 25 996, Bit8 (981~1003) 23 992,
2888 11:06:35.720705 TX Bit1 (983~1007) 25 995, Bit9 (980~1002) 23 991,
2889 11:06:35.727590 TX Bit2 (979~1006) 28 992, Bit10 (983~1004) 22 993,
2890 11:06:35.730903 TX Bit3 (978~1003) 26 990, Bit11 (985~1006) 22 995,
2891 11:06:35.737759 TX Bit4 (982~1007) 26 994, Bit12 (985~1006) 22 995,
2892 11:06:35.740714 TX Bit5 (984~1008) 25 996, Bit13 (985~1006) 22 995,
2893 11:06:35.746937 TX Bit6 (983~1007) 25 995, Bit14 (984~1004) 21 994,
2894 11:06:35.750506 TX Bit7 (982~1007) 26 994, Bit15 (978~1000) 23 989,
2895 11:06:35.751012
2896 11:06:35.753646 Write Rank0 MR14 =0x22
2897 11:06:35.761130
2898 11:06:35.764340 CH=1, VrefRange= 0, VrefLevel = 34
2899 11:06:35.767827 TX Bit0 (984~1008) 25 996, Bit8 (981~1003) 23 992,
2900 11:06:35.770989 TX Bit1 (983~1007) 25 995, Bit9 (980~1002) 23 991,
2901 11:06:35.777277 TX Bit2 (979~1006) 28 992, Bit10 (983~1004) 22 993,
2902 11:06:35.780494 TX Bit3 (978~1003) 26 990, Bit11 (985~1006) 22 995,
2903 11:06:35.786748 TX Bit4 (982~1007) 26 994, Bit12 (985~1006) 22 995,
2904 11:06:35.791247 TX Bit5 (984~1008) 25 996, Bit13 (985~1006) 22 995,
2905 11:06:35.796828 TX Bit6 (983~1007) 25 995, Bit14 (984~1004) 21 994,
2906 11:06:35.800658 TX Bit7 (982~1007) 26 994, Bit15 (978~1000) 23 989,
2907 11:06:35.801161
2908 11:06:35.803596 Write Rank0 MR14 =0x24
2909 11:06:35.810952
2910 11:06:35.813845 CH=1, VrefRange= 0, VrefLevel = 36
2911 11:06:35.817785 TX Bit0 (984~1008) 25 996, Bit8 (981~1003) 23 992,
2912 11:06:35.821030 TX Bit1 (983~1007) 25 995, Bit9 (980~1002) 23 991,
2913 11:06:35.827349 TX Bit2 (979~1006) 28 992, Bit10 (983~1004) 22 993,
2914 11:06:35.830612 TX Bit3 (978~1003) 26 990, Bit11 (985~1006) 22 995,
2915 11:06:35.837944 TX Bit4 (982~1007) 26 994, Bit12 (985~1006) 22 995,
2916 11:06:35.840543 TX Bit5 (984~1008) 25 996, Bit13 (985~1006) 22 995,
2917 11:06:35.846959 TX Bit6 (983~1007) 25 995, Bit14 (984~1004) 21 994,
2918 11:06:35.850338 TX Bit7 (982~1007) 26 994, Bit15 (978~1000) 23 989,
2919 11:06:35.850770
2920 11:06:35.851099
2921 11:06:35.853632 TX Vref found, early break! 356< 364
2922 11:06:35.859993 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2923 11:06:35.860492 u1DelayCellOfst[0]=7 cells (6 PI)
2924 11:06:35.863265 u1DelayCellOfst[1]=6 cells (5 PI)
2925 11:06:35.866909 u1DelayCellOfst[2]=2 cells (2 PI)
2926 11:06:35.870233 u1DelayCellOfst[3]=0 cells (0 PI)
2927 11:06:35.873117 u1DelayCellOfst[4]=5 cells (4 PI)
2928 11:06:35.876992 u1DelayCellOfst[5]=7 cells (6 PI)
2929 11:06:35.879679 u1DelayCellOfst[6]=6 cells (5 PI)
2930 11:06:35.883220 u1DelayCellOfst[7]=5 cells (4 PI)
2931 11:06:35.886418 Byte0, DQ PI dly=990, DQM PI dly= 993
2932 11:06:35.889959 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2933 11:06:35.890434
2934 11:06:35.896143 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2935 11:06:35.896645
2936 11:06:35.899318 u1DelayCellOfst[8]=3 cells (3 PI)
2937 11:06:35.899744 u1DelayCellOfst[9]=2 cells (2 PI)
2938 11:06:35.902259 u1DelayCellOfst[10]=5 cells (4 PI)
2939 11:06:35.906417 u1DelayCellOfst[11]=7 cells (6 PI)
2940 11:06:35.909260 u1DelayCellOfst[12]=7 cells (6 PI)
2941 11:06:35.912947 u1DelayCellOfst[13]=7 cells (6 PI)
2942 11:06:35.916174 u1DelayCellOfst[14]=6 cells (5 PI)
2943 11:06:35.918944 u1DelayCellOfst[15]=0 cells (0 PI)
2944 11:06:35.922552 Byte1, DQ PI dly=989, DQM PI dly= 992
2945 11:06:35.928867 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2946 11:06:35.929384
2947 11:06:35.931868 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2948 11:06:35.932310
2949 11:06:35.935971 Write Rank0 MR14 =0x1c
2950 11:06:35.936480
2951 11:06:35.936922 Final TX Range 0 Vref 28
2952 11:06:35.937332
2953 11:06:35.942251 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2954 11:06:35.942775
2955 11:06:35.948629 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2956 11:06:35.955413 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2957 11:06:35.964851 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2958 11:06:35.965359 Write Rank0 MR3 =0xb0
2959 11:06:35.968398 DramC Write-DBI on
2960 11:06:35.968910 ==
2961 11:06:35.971754 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2962 11:06:35.974750 fsp= 1, odt_onoff= 1, Byte mode= 0
2963 11:06:35.975268 ==
2964 11:06:35.981429 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2965 11:06:35.981948
2966 11:06:35.984282 Begin, DQ Scan Range 712~776
2967 11:06:35.984887
2968 11:06:35.985323
2969 11:06:35.985732 TX Vref Scan disable
2970 11:06:35.987395 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2971 11:06:35.990683 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2972 11:06:35.994674 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2973 11:06:36.000831 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2974 11:06:36.004178 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2975 11:06:36.007194 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2976 11:06:36.010594 718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2977 11:06:36.013988 719 |2 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2978 11:06:36.017000 720 |2 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2979 11:06:36.020672 721 |2 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2980 11:06:36.023729 722 |2 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2981 11:06:36.026931 723 |2 6 19|[0] xxxxxxxx xxxxxxxx [MSB]
2982 11:06:36.030920 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2983 11:06:36.034157 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
2984 11:06:36.036829 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
2985 11:06:36.043407 727 |2 6 23|[0] xxxxxxxx oooooooo [MSB]
2986 11:06:36.049820 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2987 11:06:36.052981 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2988 11:06:36.056259 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2989 11:06:36.059587 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
2990 11:06:36.062971 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
2991 11:06:36.066414 753 |2 6 49|[0] xxxxxxxx xxxxxxxx [MSB]
2992 11:06:36.069505 Byte0, DQ PI dly=740, DQM PI dly= 740
2993 11:06:36.072651 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 36)
2994 11:06:36.073086
2995 11:06:36.079615 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 36)
2996 11:06:36.080103
2997 11:06:36.083057 Byte1, DQ PI dly=735, DQM PI dly= 735
2998 11:06:36.085807 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
2999 11:06:36.086269
3000 11:06:36.089194 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
3001 11:06:36.089624
3002 11:06:36.096310 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3003 11:06:36.105636 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3004 11:06:36.112258 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3005 11:06:36.112758 Write Rank0 MR3 =0x30
3006 11:06:36.115324 DramC Write-DBI off
3007 11:06:36.115742
3008 11:06:36.116069 [DATLAT]
3009 11:06:36.118442 Freq=1600, CH1 RK0, use_rxtx_scan=0
3010 11:06:36.118865
3011 11:06:36.122178 DATLAT Default: 0xf
3012 11:06:36.122752 7, 0xFFFF, sum=0
3013 11:06:36.125643 8, 0xFFFF, sum=0
3014 11:06:36.126120 9, 0xFFFF, sum=0
3015 11:06:36.128284 10, 0xFFFF, sum=0
3016 11:06:36.128750 11, 0xFFFF, sum=0
3017 11:06:36.132498 12, 0xFFFF, sum=0
3018 11:06:36.133038 13, 0xFFFF, sum=0
3019 11:06:36.135736 14, 0x0, sum=1
3020 11:06:36.136239 15, 0x0, sum=2
3021 11:06:36.136577 16, 0x0, sum=3
3022 11:06:36.138061 17, 0x0, sum=4
3023 11:06:36.141540 pattern=2 first_step=14 total pass=5 best_step=16
3024 11:06:36.142085 ==
3025 11:06:36.148262 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3026 11:06:36.151195 fsp= 1, odt_onoff= 1, Byte mode= 0
3027 11:06:36.151620 ==
3028 11:06:36.154510 Start DQ dly to find pass range UseTestEngine =1
3029 11:06:36.158370 x-axis: bit #, y-axis: DQ dly (-127~63)
3030 11:06:36.161548 RX Vref Scan = 1
3031 11:06:36.267990
3032 11:06:36.268491 RX Vref found, early break!
3033 11:06:36.268821
3034 11:06:36.274434 Final RX Vref 11, apply to both rank0 and 1
3035 11:06:36.274940 ==
3036 11:06:36.278205 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3037 11:06:36.281106 fsp= 1, odt_onoff= 1, Byte mode= 0
3038 11:06:36.281603 ==
3039 11:06:36.284608 DQS Delay:
3040 11:06:36.285067 DQS0 = 0, DQS1 = 0
3041 11:06:36.285409 DQM Delay:
3042 11:06:36.288029 DQM0 = 20, DQM1 = 19
3043 11:06:36.288587 DQ Delay:
3044 11:06:36.290858 DQ0 =22, DQ1 =20, DQ2 =19, DQ3 =16
3045 11:06:36.294865 DQ4 =20, DQ5 =22, DQ6 =24, DQ7 =21
3046 11:06:36.297364 DQ8 =17, DQ9 =17, DQ10 =20, DQ11 =21
3047 11:06:36.301090 DQ12 =22, DQ13 =21, DQ14 =22, DQ15 =14
3048 11:06:36.301619
3049 11:06:36.301954
3050 11:06:36.302462
3051 11:06:36.303720 [DramC_TX_OE_Calibration] TA2
3052 11:06:36.307140 Original DQ_B0 (3 6) =30, OEN = 27
3053 11:06:36.310948 Original DQ_B1 (3 6) =30, OEN = 27
3054 11:06:36.313905 23, 0x0, End_B0=23 End_B1=23
3055 11:06:36.317264 24, 0x0, End_B0=24 End_B1=24
3056 11:06:36.317695 25, 0x0, End_B0=25 End_B1=25
3057 11:06:36.321263 26, 0x0, End_B0=26 End_B1=26
3058 11:06:36.323786 27, 0x0, End_B0=27 End_B1=27
3059 11:06:36.326723 28, 0x0, End_B0=28 End_B1=28
3060 11:06:36.327157 29, 0x0, End_B0=29 End_B1=29
3061 11:06:36.329977 30, 0x0, End_B0=30 End_B1=30
3062 11:06:36.333506 31, 0xFFFF, End_B0=30 End_B1=30
3063 11:06:36.340516 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3064 11:06:36.343163 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3065 11:06:36.347030
3066 11:06:36.347452
3067 11:06:36.347777 Write Rank0 MR23 =0x3f
3068 11:06:36.348082 [DQSOSC]
3069 11:06:36.357278 [DQSOSCAuto] RK0, (LSB)MR18= 0xabab, (MSB)MR19= 0x202, tDQSOscB0 = 461 ps tDQSOscB1 = 461 ps
3070 11:06:36.362821 CH1_RK0: MR19=0x202, MR18=0xABAB, DQSOSC=461, MR23=63, INC=11, DEC=17
3071 11:06:36.363324 Write Rank0 MR23 =0x3f
3072 11:06:36.366241 [DQSOSC]
3073 11:06:36.373115 [DQSOSCAuto] RK0, (LSB)MR18= 0xacac, (MSB)MR19= 0x202, tDQSOscB0 = 460 ps tDQSOscB1 = 460 ps
3074 11:06:36.375885 CH1 RK0: MR19=202, MR18=ACAC
3075 11:06:36.379580 [RankSwap] Rank num 2, (Multi 1), Rank 1
3076 11:06:36.382213 Write Rank0 MR2 =0xad
3077 11:06:36.382637 [Write Leveling]
3078 11:06:36.385960 delay byte0 byte1 byte2 byte3
3079 11:06:36.386432
3080 11:06:36.389327 10 0 0
3081 11:06:36.389834 11 0 0
3082 11:06:36.390213 12 0 0
3083 11:06:36.393044 13 0 0
3084 11:06:36.393544 14 0 0
3085 11:06:36.395559 15 0 0
3086 11:06:36.395985 16 0 0
3087 11:06:36.398970 17 0 0
3088 11:06:36.399472 18 0 0
3089 11:06:36.399807 19 0 0
3090 11:06:36.402322 20 0 0
3091 11:06:36.402805 21 0 0
3092 11:06:36.406224 22 0 0
3093 11:06:36.406729 23 0 0
3094 11:06:36.407066 24 0 0
3095 11:06:36.408716 25 0 0
3096 11:06:36.409154 26 0 0
3097 11:06:36.412093 27 0 0
3098 11:06:36.412521 28 0 0
3099 11:06:36.415091 29 0 ff
3100 11:06:36.415522 30 0 0
3101 11:06:36.415859 31 0 ff
3102 11:06:36.418877 32 0 ff
3103 11:06:36.419304 33 ff ff
3104 11:06:36.422071 34 ff ff
3105 11:06:36.422578 35 ff ff
3106 11:06:36.425014 36 ff ff
3107 11:06:36.425565 37 ff ff
3108 11:06:36.428241 38 ff ff
3109 11:06:36.428674 39 ff ff
3110 11:06:36.431656 pass bytecount = 0xff (0xff: all bytes pass)
3111 11:06:36.434940
3112 11:06:36.435392 DQS0 dly: 33
3113 11:06:36.435691 DQS1 dly: 31
3114 11:06:36.438115 Write Rank0 MR2 =0x2d
3115 11:06:36.441422 [RankSwap] Rank num 2, (Multi 1), Rank 0
3116 11:06:36.444727 Write Rank1 MR1 =0xd6
3117 11:06:36.445109 [Gating]
3118 11:06:36.445402 ==
3119 11:06:36.447793 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3120 11:06:36.451651 fsp= 1, odt_onoff= 1, Byte mode= 0
3121 11:06:36.452119 ==
3122 11:06:36.457577 3 1 0 |2c2b 3635 |(11 11)(11 11) |(1 1)(0 0)| 0
3123 11:06:36.461272 3 1 4 |2c2b 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
3124 11:06:36.464838 3 1 8 |2c2b 3535 |(11 11)(0 0) |(1 1)(0 0)| 0
3125 11:06:36.471299 3 1 12 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
3126 11:06:36.474506 3 1 16 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
3127 11:06:36.478315 3 1 20 |2c2b 3535 |(11 11)(0 0) |(1 0)(1 1)| 0
3128 11:06:36.484435 3 1 24 |2c2b c0c |(11 11)(11 11) |(1 0)(1 1)| 0
3129 11:06:36.487338 [Byte 1] Lead/lag Transition tap number (1)
3130 11:06:36.490406 3 1 28 |2c2b 3534 |(11 11)(1 1) |(1 0)(0 0)| 0
3131 11:06:36.493923 3 2 0 |2c2b 3535 |(11 11)(0 0) |(1 0)(0 0)| 0
3132 11:06:36.500430 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
3133 11:06:36.503655 3 2 8 |2c2b 3535 |(11 11)(0 0) |(1 0)(0 0)| 0
3134 11:06:36.506720 3 2 12 |2c2b 3231 |(11 11)(11 11) |(1 0)(0 0)| 0
3135 11:06:36.513615 3 2 16 |2c2c 201 |(11 0)(11 11) |(1 0)(1 0)| 0
3136 11:06:36.516570 3 2 20 |201 3332 |(11 11)(11 11) |(0 0)(1 0)| 0
3137 11:06:36.520242 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
3138 11:06:36.526352 3 2 28 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
3139 11:06:36.529672 3 3 0 |3534 3c3c |(11 11)(11 11) |(0 0)(1 1)| 0
3140 11:06:36.533445 3 3 4 |3534 3b3b |(11 11)(11 11) |(0 0)(1 1)| 0
3141 11:06:36.539963 3 3 8 |3534 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
3142 11:06:36.542847 3 3 12 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
3143 11:06:36.545954 3 3 16 |3534 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
3144 11:06:36.549326 3 3 20 |3534 3a3a |(11 11)(11 11) |(1 1)(1 1)| 0
3145 11:06:36.555688 [Byte 0] Lead/lag Transition tap number (1)
3146 11:06:36.559118 3 3 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3147 11:06:36.562648 3 3 28 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
3148 11:06:36.568864 [Byte 1] Lead/lag Transition tap number (1)
3149 11:06:36.572274 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3150 11:06:36.575769 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3151 11:06:36.582189 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3152 11:06:36.585632 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3153 11:06:36.589043 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3154 11:06:36.592353 3 4 20 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3155 11:06:36.598840 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3156 11:06:36.601444 3 4 28 |3d3d 908 |(11 11)(11 11) |(1 1)(1 1)| 0
3157 11:06:36.605068 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3158 11:06:36.612036 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3159 11:06:36.615352 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3160 11:06:36.618652 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3161 11:06:36.625028 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3162 11:06:36.627970 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3163 11:06:36.631689 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3164 11:06:36.637764 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3165 11:06:36.641269 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3166 11:06:36.644585 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3167 11:06:36.650786 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3168 11:06:36.654111 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3169 11:06:36.658198 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3170 11:06:36.661307 [Byte 0] Lead/lag Transition tap number (2)
3171 11:06:36.667940 3 6 16 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3172 11:06:36.671202 [Byte 1] Lead/lag falling Transition (3, 6, 16)
3173 11:06:36.674051 3 6 20 |606 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3174 11:06:36.680761 [Byte 1] Lead/lag Transition tap number (2)
3175 11:06:36.683538 3 6 24 |4646 1413 |(0 0)(11 11) |(0 0)(0 0)| 0
3176 11:06:36.686891 [Byte 0]First pass (3, 6, 24)
3177 11:06:36.690744 3 6 28 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
3178 11:06:36.694367 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3179 11:06:36.697234 [Byte 1]First pass (3, 7, 0)
3180 11:06:36.700323 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3181 11:06:36.703843 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3182 11:06:36.710390 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3183 11:06:36.713892 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3184 11:06:36.717401 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3185 11:06:36.719993 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3186 11:06:36.726731 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3187 11:06:36.729943 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3188 11:06:36.733324 All bytes gating window > 1UI, Early break!
3189 11:06:36.733779
3190 11:06:36.736476 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
3191 11:06:36.736879
3192 11:06:36.740121 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
3193 11:06:36.740591
3194 11:06:36.740945
3195 11:06:36.741222
3196 11:06:36.746449 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
3197 11:06:36.746999
3198 11:06:36.749769 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
3199 11:06:36.750280
3200 11:06:36.750583
3201 11:06:36.753451 Write Rank1 MR1 =0x56
3202 11:06:36.753830
3203 11:06:36.754175 best RODT dly(2T, 0.5T) = (2, 3)
3204 11:06:36.756275
3205 11:06:36.756660 best RODT dly(2T, 0.5T) = (2, 3)
3206 11:06:36.759420 ==
3207 11:06:36.762563 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3208 11:06:36.766146 fsp= 1, odt_onoff= 1, Byte mode= 0
3209 11:06:36.766609 ==
3210 11:06:36.769305 Start DQ dly to find pass range UseTestEngine =0
3211 11:06:36.772756 x-axis: bit #, y-axis: DQ dly (-127~63)
3212 11:06:36.776135 RX Vref Scan = 0
3213 11:06:36.779064 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3214 11:06:36.782318 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3215 11:06:36.785902 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3216 11:06:36.788614 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3217 11:06:36.789004 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3218 11:06:36.792013 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3219 11:06:36.795916 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3220 11:06:36.798485 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3221 11:06:36.802401 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3222 11:06:36.805292 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3223 11:06:36.808394 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3224 11:06:36.812381 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3225 11:06:36.815030 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3226 11:06:36.815458 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3227 11:06:36.818319 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3228 11:06:36.822211 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3229 11:06:36.824686 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3230 11:06:36.828636 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3231 11:06:36.831654 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3232 11:06:36.834755 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3233 11:06:36.837998 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3234 11:06:36.838519 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3235 11:06:36.841856 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3236 11:06:36.844690 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3237 11:06:36.848159 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3238 11:06:36.851166 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3239 11:06:36.854601 0, [0] xxxoxxxx xxxxxxxo [MSB]
3240 11:06:36.858108 1, [0] xxxoxxxx xxxxxxxo [MSB]
3241 11:06:36.858545 2, [0] xxooxxxx ooxxxxxo [MSB]
3242 11:06:36.861585 3, [0] xooooxxo ooxxxxxo [MSB]
3243 11:06:36.864329 4, [0] xooooxxo oooxxxxo [MSB]
3244 11:06:36.867709 5, [0] xooooxoo oooxxxxo [MSB]
3245 11:06:36.871424 6, [0] xooooxoo ooooxxoo [MSB]
3246 11:06:36.873987 33, [0] oooxoooo ooooooox [MSB]
3247 11:06:36.878156 34, [0] oooxoooo ooooooox [MSB]
3248 11:06:36.878663 35, [0] ooxxoooo xoooooox [MSB]
3249 11:06:36.880929 36, [0] ooxxoooo xxooooox [MSB]
3250 11:06:36.884117 37, [0] ooxxoooo xxooooox [MSB]
3251 11:06:36.887494 38, [0] oxxxooox xxooooox [MSB]
3252 11:06:36.890501 39, [0] xxxxxoox xxxoxoox [MSB]
3253 11:06:36.893541 40, [0] xxxxxoox xxxoxoox [MSB]
3254 11:06:36.896996 41, [0] xxxxxxxx xxxxxxxx [MSB]
3255 11:06:36.900586 iDelay=41, Bit 0, Center 22 (7 ~ 38) 32
3256 11:06:36.904083 iDelay=41, Bit 1, Center 20 (3 ~ 37) 35
3257 11:06:36.907094 iDelay=41, Bit 2, Center 18 (2 ~ 34) 33
3258 11:06:36.910570 iDelay=41, Bit 3, Center 15 (-1 ~ 32) 34
3259 11:06:36.913750 iDelay=41, Bit 4, Center 20 (3 ~ 38) 36
3260 11:06:36.916618 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
3261 11:06:36.920511 iDelay=41, Bit 6, Center 22 (5 ~ 40) 36
3262 11:06:36.923562 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
3263 11:06:36.926553 iDelay=41, Bit 8, Center 18 (2 ~ 34) 33
3264 11:06:36.930091 iDelay=41, Bit 9, Center 18 (2 ~ 35) 34
3265 11:06:36.936636 iDelay=41, Bit 10, Center 21 (4 ~ 38) 35
3266 11:06:36.939755 iDelay=41, Bit 11, Center 23 (6 ~ 40) 35
3267 11:06:36.943101 iDelay=41, Bit 12, Center 22 (7 ~ 38) 32
3268 11:06:36.946216 iDelay=41, Bit 13, Center 23 (7 ~ 40) 34
3269 11:06:36.949551 iDelay=41, Bit 14, Center 23 (6 ~ 40) 35
3270 11:06:36.952903 iDelay=41, Bit 15, Center 15 (-2 ~ 32) 35
3271 11:06:36.953243 ==
3272 11:06:36.959844 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3273 11:06:36.962986 fsp= 1, odt_onoff= 1, Byte mode= 0
3274 11:06:36.963317 ==
3275 11:06:36.963534 DQS Delay:
3276 11:06:36.966412 DQS0 = 0, DQS1 = 0
3277 11:06:36.966767 DQM Delay:
3278 11:06:36.966989 DQM0 = 20, DQM1 = 20
3279 11:06:36.969475 DQ Delay:
3280 11:06:36.972930 DQ0 =22, DQ1 =20, DQ2 =18, DQ3 =15
3281 11:06:36.975663 DQ4 =20, DQ5 =23, DQ6 =22, DQ7 =20
3282 11:06:36.978912 DQ8 =18, DQ9 =18, DQ10 =21, DQ11 =23
3283 11:06:36.982241 DQ12 =22, DQ13 =23, DQ14 =23, DQ15 =15
3284 11:06:36.982590
3285 11:06:36.982860
3286 11:06:36.983107 DramC Write-DBI off
3287 11:06:36.983343 ==
3288 11:06:36.988615 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3289 11:06:36.992138 fsp= 1, odt_onoff= 1, Byte mode= 0
3290 11:06:36.992521 ==
3291 11:06:36.995720 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3292 11:06:36.996185
3293 11:06:36.999193 Begin, DQ Scan Range 927~1183
3294 11:06:36.999688
3295 11:06:37.000007
3296 11:06:37.002226 TX Vref Scan disable
3297 11:06:37.005694 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3298 11:06:37.008862 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3299 11:06:37.012396 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3300 11:06:37.015246 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3301 11:06:37.019192 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3302 11:06:37.021426 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3303 11:06:37.025084 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3304 11:06:37.031584 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3305 11:06:37.034738 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3306 11:06:37.037899 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3307 11:06:37.041545 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3308 11:06:37.045176 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3309 11:06:37.048312 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3310 11:06:37.051555 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3311 11:06:37.054871 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3312 11:06:37.058080 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3313 11:06:37.061255 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3314 11:06:37.064903 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3315 11:06:37.068435 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3316 11:06:37.071611 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3317 11:06:37.077542 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3318 11:06:37.080961 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3319 11:06:37.084487 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3320 11:06:37.087107 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3321 11:06:37.090397 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3322 11:06:37.094377 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3323 11:06:37.097029 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3324 11:06:37.100725 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3325 11:06:37.103618 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3326 11:06:37.106885 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3327 11:06:37.110273 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3328 11:06:37.114747 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3329 11:06:37.116767 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3330 11:06:37.123058 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3331 11:06:37.127057 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3332 11:06:37.130276 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3333 11:06:37.133137 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3334 11:06:37.136918 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3335 11:06:37.140672 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3336 11:06:37.143085 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3337 11:06:37.146247 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3338 11:06:37.149718 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3339 11:06:37.153100 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3340 11:06:37.156243 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3341 11:06:37.159891 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3342 11:06:37.162991 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3343 11:06:37.166259 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3344 11:06:37.169635 974 |3 6 14|[0] xxxxxxxx xxxxxxxo [MSB]
3345 11:06:37.172827 975 |3 6 15|[0] xxxxxxxx xxxxxxxo [MSB]
3346 11:06:37.175735 976 |3 6 16|[0] xxxxxxxx ooxxxxxo [MSB]
3347 11:06:37.182544 977 |3 6 17|[0] xxxxxxxx ooxxxxxo [MSB]
3348 11:06:37.185785 978 |3 6 18|[0] xxxxxxxx oooxxxoo [MSB]
3349 11:06:37.188810 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3350 11:06:37.192288 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3351 11:06:37.195536 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3352 11:06:37.199281 982 |3 6 22|[0] xxxxxxxo oooooooo [MSB]
3353 11:06:37.202411 983 |3 6 23|[0] xooooooo oooooooo [MSB]
3354 11:06:37.205442 993 |3 6 33|[0] oooooooo ooooooox [MSB]
3355 11:06:37.211906 994 |3 6 34|[0] oooooooo oxooooox [MSB]
3356 11:06:37.215486 995 |3 6 35|[0] oooooooo oxooooox [MSB]
3357 11:06:37.219205 996 |3 6 36|[0] oooooooo xxooooox [MSB]
3358 11:06:37.222112 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3359 11:06:37.225037 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3360 11:06:37.228499 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3361 11:06:37.231701 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3362 11:06:37.235377 1001 |3 6 41|[0] ooxxoooo xxxxxxxx [MSB]
3363 11:06:37.238762 1002 |3 6 42|[0] ooxxoooo xxxxxxxx [MSB]
3364 11:06:37.242322 1003 |3 6 43|[0] ooxxxoxx xxxxxxxx [MSB]
3365 11:06:37.244912 1004 |3 6 44|[0] xxxxxxxx xxxxxxxx [MSB]
3366 11:06:37.251525 Byte0, DQ PI dly=991, DQM PI dly= 991
3367 11:06:37.255217 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
3368 11:06:37.255681
3369 11:06:37.257832 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
3370 11:06:37.258261
3371 11:06:37.261082 Byte1, DQ PI dly=985, DQM PI dly= 985
3372 11:06:37.267978 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
3373 11:06:37.268366
3374 11:06:37.271085 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
3375 11:06:37.271475
3376 11:06:37.271773 ==
3377 11:06:37.277496 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3378 11:06:37.281079 fsp= 1, odt_onoff= 1, Byte mode= 0
3379 11:06:37.281538 ==
3380 11:06:37.284218 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3381 11:06:37.284604
3382 11:06:37.287259 Begin, DQ Scan Range 961~1025
3383 11:06:37.287643 Write Rank1 MR14 =0x0
3384 11:06:37.296916
3385 11:06:37.297371 CH=1, VrefRange= 0, VrefLevel = 0
3386 11:06:37.303535 TX Bit0 (985~998) 14 991, Bit8 (979~992) 14 985,
3387 11:06:37.306629 TX Bit1 (984~997) 14 990, Bit9 (979~989) 11 984,
3388 11:06:37.313299 TX Bit2 (982~996) 15 989, Bit10 (981~993) 13 987,
3389 11:06:37.316209 TX Bit3 (979~992) 14 985, Bit11 (982~994) 13 988,
3390 11:06:37.319544 TX Bit4 (984~998) 15 991, Bit12 (982~993) 12 987,
3391 11:06:37.326360 TX Bit5 (985~998) 14 991, Bit13 (983~995) 13 989,
3392 11:06:37.329754 TX Bit6 (984~998) 15 991, Bit14 (982~993) 12 987,
3393 11:06:37.335937 TX Bit7 (984~998) 15 991, Bit15 (977~986) 10 981,
3394 11:06:37.336325
3395 11:06:37.336622 Write Rank1 MR14 =0x2
3396 11:06:37.345145
3397 11:06:37.345642 CH=1, VrefRange= 0, VrefLevel = 2
3398 11:06:37.351221 TX Bit0 (985~999) 15 992, Bit8 (979~992) 14 985,
3399 11:06:37.354503 TX Bit1 (984~998) 15 991, Bit9 (978~990) 13 984,
3400 11:06:37.361265 TX Bit2 (982~997) 16 989, Bit10 (980~994) 15 987,
3401 11:06:37.364362 TX Bit3 (979~993) 15 986, Bit11 (982~994) 13 988,
3402 11:06:37.367459 TX Bit4 (983~999) 17 991, Bit12 (981~994) 14 987,
3403 11:06:37.374350 TX Bit5 (985~998) 14 991, Bit13 (982~996) 15 989,
3404 11:06:37.377878 TX Bit6 (984~998) 15 991, Bit14 (981~993) 13 987,
3405 11:06:37.384381 TX Bit7 (984~999) 16 991, Bit15 (976~986) 11 981,
3406 11:06:37.384883
3407 11:06:37.385218 Write Rank1 MR14 =0x4
3408 11:06:37.392631
3409 11:06:37.393127 CH=1, VrefRange= 0, VrefLevel = 4
3410 11:06:37.399125 TX Bit0 (985~999) 15 992, Bit8 (978~992) 15 985,
3411 11:06:37.402521 TX Bit1 (983~999) 17 991, Bit9 (978~991) 14 984,
3412 11:06:37.409243 TX Bit2 (982~997) 16 989, Bit10 (980~994) 15 987,
3413 11:06:37.412276 TX Bit3 (979~994) 16 986, Bit11 (981~995) 15 988,
3414 11:06:37.415572 TX Bit4 (983~999) 17 991, Bit12 (981~995) 15 988,
3415 11:06:37.422067 TX Bit5 (985~999) 15 992, Bit13 (981~996) 16 988,
3416 11:06:37.425407 TX Bit6 (983~999) 17 991, Bit14 (980~993) 14 986,
3417 11:06:37.432022 TX Bit7 (984~999) 16 991, Bit15 (975~987) 13 981,
3418 11:06:37.432407
3419 11:06:37.432716 Write Rank1 MR14 =0x6
3420 11:06:37.441131
3421 11:06:37.441586 CH=1, VrefRange= 0, VrefLevel = 6
3422 11:06:37.447442 TX Bit0 (985~1000) 16 992, Bit8 (978~993) 16 985,
3423 11:06:37.450696 TX Bit1 (983~1000) 18 991, Bit9 (978~991) 14 984,
3424 11:06:37.456891 TX Bit2 (981~998) 18 989, Bit10 (979~995) 17 987,
3425 11:06:37.460513 TX Bit3 (978~995) 18 986, Bit11 (980~996) 17 988,
3426 11:06:37.466908 TX Bit4 (983~1000) 18 991, Bit12 (981~995) 15 988,
3427 11:06:37.469981 TX Bit5 (984~1000) 17 992, Bit13 (982~997) 16 989,
3428 11:06:37.473687 TX Bit6 (983~1000) 18 991, Bit14 (980~995) 16 987,
3429 11:06:37.479889 TX Bit7 (984~1000) 17 992, Bit15 (975~989) 15 982,
3430 11:06:37.480351
3431 11:06:37.480669 Write Rank1 MR14 =0x8
3432 11:06:37.489850
3433 11:06:37.490380 CH=1, VrefRange= 0, VrefLevel = 8
3434 11:06:37.496107 TX Bit0 (984~1000) 17 992, Bit8 (977~993) 17 985,
3435 11:06:37.499878 TX Bit1 (983~1000) 18 991, Bit9 (978~992) 15 985,
3436 11:06:37.505821 TX Bit2 (981~998) 18 989, Bit10 (979~995) 17 987,
3437 11:06:37.509105 TX Bit3 (978~996) 19 987, Bit11 (980~996) 17 988,
3438 11:06:37.513089 TX Bit4 (983~1000) 18 991, Bit12 (980~996) 17 988,
3439 11:06:37.518948 TX Bit5 (984~1000) 17 992, Bit13 (981~998) 18 989,
3440 11:06:37.522484 TX Bit6 (983~1000) 18 991, Bit14 (979~995) 17 987,
3441 11:06:37.529044 TX Bit7 (984~1000) 17 992, Bit15 (974~990) 17 982,
3442 11:06:37.529526
3443 11:06:37.529905 Write Rank1 MR14 =0xa
3444 11:06:37.538177
3445 11:06:37.541906 CH=1, VrefRange= 0, VrefLevel = 10
3446 11:06:37.545213 TX Bit0 (984~1001) 18 992, Bit8 (977~994) 18 985,
3447 11:06:37.548170 TX Bit1 (983~1001) 19 992, Bit9 (978~992) 15 985,
3448 11:06:37.554953 TX Bit2 (981~999) 19 990, Bit10 (979~997) 19 988,
3449 11:06:37.557836 TX Bit3 (978~997) 20 987, Bit11 (980~997) 18 988,
3450 11:06:37.561857 TX Bit4 (982~1001) 20 991, Bit12 (980~997) 18 988,
3451 11:06:37.567679 TX Bit5 (984~1001) 18 992, Bit13 (980~999) 20 989,
3452 11:06:37.571172 TX Bit6 (983~1001) 19 992, Bit14 (979~996) 18 987,
3453 11:06:37.578090 TX Bit7 (983~1001) 19 992, Bit15 (974~991) 18 982,
3454 11:06:37.578478
3455 11:06:37.578778 Write Rank1 MR14 =0xc
3456 11:06:37.587196
3457 11:06:37.590570 CH=1, VrefRange= 0, VrefLevel = 12
3458 11:06:37.593648 TX Bit0 (984~1002) 19 993, Bit8 (977~994) 18 985,
3459 11:06:37.597278 TX Bit1 (982~1001) 20 991, Bit9 (977~993) 17 985,
3460 11:06:37.603454 TX Bit2 (980~999) 20 989, Bit10 (979~997) 19 988,
3461 11:06:37.607080 TX Bit3 (978~997) 20 987, Bit11 (980~998) 19 989,
3462 11:06:37.610622 TX Bit4 (982~1001) 20 991, Bit12 (980~998) 19 989,
3463 11:06:37.616780 TX Bit5 (984~1001) 18 992, Bit13 (980~999) 20 989,
3464 11:06:37.620180 TX Bit6 (982~1001) 20 991, Bit14 (979~996) 18 987,
3465 11:06:37.626891 TX Bit7 (983~1001) 19 992, Bit15 (973~992) 20 982,
3466 11:06:37.627277
3467 11:06:37.627588 Write Rank1 MR14 =0xe
3468 11:06:37.636715
3469 11:06:37.640138 CH=1, VrefRange= 0, VrefLevel = 14
3470 11:06:37.643585 TX Bit0 (984~1003) 20 993, Bit8 (976~994) 19 985,
3471 11:06:37.646461 TX Bit1 (982~1002) 21 992, Bit9 (977~993) 17 985,
3472 11:06:37.653173 TX Bit2 (979~1000) 22 989, Bit10 (979~998) 20 988,
3473 11:06:37.656285 TX Bit3 (977~998) 22 987, Bit11 (979~999) 21 989,
3474 11:06:37.659676 TX Bit4 (982~1002) 21 992, Bit12 (979~999) 21 989,
3475 11:06:37.666241 TX Bit5 (984~1003) 20 993, Bit13 (980~999) 20 989,
3476 11:06:37.669892 TX Bit6 (982~1002) 21 992, Bit14 (979~997) 19 988,
3477 11:06:37.675924 TX Bit7 (983~1002) 20 992, Bit15 (973~992) 20 982,
3478 11:06:37.676401
3479 11:06:37.676705 Write Rank1 MR14 =0x10
3480 11:06:37.686425
3481 11:06:37.689493 CH=1, VrefRange= 0, VrefLevel = 16
3482 11:06:37.693035 TX Bit0 (984~1003) 20 993, Bit8 (976~995) 20 985,
3483 11:06:37.695503 TX Bit1 (982~1003) 22 992, Bit9 (977~993) 17 985,
3484 11:06:37.702605 TX Bit2 (979~1000) 22 989, Bit10 (978~999) 22 988,
3485 11:06:37.706401 TX Bit3 (977~998) 22 987, Bit11 (980~999) 20 989,
3486 11:06:37.712277 TX Bit4 (982~1003) 22 992, Bit12 (979~999) 21 989,
3487 11:06:37.715517 TX Bit5 (983~1003) 21 993, Bit13 (980~1000) 21 990,
3488 11:06:37.719151 TX Bit6 (982~1002) 21 992, Bit14 (978~998) 21 988,
3489 11:06:37.725178 TX Bit7 (982~1003) 22 992, Bit15 (973~992) 20 982,
3490 11:06:37.725603
3491 11:06:37.728005 Write Rank1 MR14 =0x12
3492 11:06:37.735706
3493 11:06:37.738813 CH=1, VrefRange= 0, VrefLevel = 18
3494 11:06:37.742487 TX Bit0 (983~1004) 22 993, Bit8 (976~996) 21 986,
3495 11:06:37.745732 TX Bit1 (981~1003) 23 992, Bit9 (977~993) 17 985,
3496 11:06:37.752366 TX Bit2 (978~1001) 24 989, Bit10 (978~999) 22 988,
3497 11:06:37.755459 TX Bit3 (977~998) 22 987, Bit11 (979~1000) 22 989,
3498 11:06:37.762322 TX Bit4 (981~1003) 23 992, Bit12 (979~999) 21 989,
3499 11:06:37.765532 TX Bit5 (983~1004) 22 993, Bit13 (979~1000) 22 989,
3500 11:06:37.768674 TX Bit6 (981~1003) 23 992, Bit14 (978~999) 22 988,
3501 11:06:37.775506 TX Bit7 (982~1002) 21 992, Bit15 (972~993) 22 982,
3502 11:06:37.776010
3503 11:06:37.776339 Write Rank1 MR14 =0x14
3504 11:06:37.786371
3505 11:06:37.788728 CH=1, VrefRange= 0, VrefLevel = 20
3506 11:06:37.792191 TX Bit0 (983~1005) 23 994, Bit8 (976~997) 22 986,
3507 11:06:37.795851 TX Bit1 (982~1005) 24 993, Bit9 (976~994) 19 985,
3508 11:06:37.802237 TX Bit2 (978~1001) 24 989, Bit10 (978~1000) 23 989,
3509 11:06:37.805308 TX Bit3 (977~999) 23 988, Bit11 (978~1000) 23 989,
3510 11:06:37.811940 TX Bit4 (981~1004) 24 992, Bit12 (978~1000) 23 989,
3511 11:06:37.815126 TX Bit5 (983~1005) 23 994, Bit13 (979~1000) 22 989,
3512 11:06:37.818467 TX Bit6 (981~1003) 23 992, Bit14 (978~999) 22 988,
3513 11:06:37.825223 TX Bit7 (982~1003) 22 992, Bit15 (971~993) 23 982,
3514 11:06:37.825720
3515 11:06:37.828233 Write Rank1 MR14 =0x16
3516 11:06:37.835901
3517 11:06:37.839158 CH=1, VrefRange= 0, VrefLevel = 22
3518 11:06:37.842148 TX Bit0 (983~1005) 23 994, Bit8 (976~998) 23 987,
3519 11:06:37.845760 TX Bit1 (981~1005) 25 993, Bit9 (975~994) 20 984,
3520 11:06:37.852442 TX Bit2 (979~1001) 23 990, Bit10 (977~1000) 24 988,
3521 11:06:37.855426 TX Bit3 (977~999) 23 988, Bit11 (978~1000) 23 989,
3522 11:06:37.861720 TX Bit4 (981~1004) 24 992, Bit12 (978~1000) 23 989,
3523 11:06:37.865244 TX Bit5 (983~1005) 23 994, Bit13 (979~1000) 22 989,
3524 11:06:37.868679 TX Bit6 (980~1004) 25 992, Bit14 (978~1000) 23 989,
3525 11:06:37.874779 TX Bit7 (981~1004) 24 992, Bit15 (971~994) 24 982,
3526 11:06:37.875275
3527 11:06:37.877929 Write Rank1 MR14 =0x18
3528 11:06:37.885884
3529 11:06:37.888749 CH=1, VrefRange= 0, VrefLevel = 24
3530 11:06:37.892585 TX Bit0 (982~1005) 24 993, Bit8 (975~998) 24 986,
3531 11:06:37.895542 TX Bit1 (980~1005) 26 992, Bit9 (976~995) 20 985,
3532 11:06:37.902096 TX Bit2 (978~1002) 25 990, Bit10 (977~1000) 24 988,
3533 11:06:37.906073 TX Bit3 (977~1000) 24 988, Bit11 (978~1001) 24 989,
3534 11:06:37.912082 TX Bit4 (980~1005) 26 992, Bit12 (978~1000) 23 989,
3535 11:06:37.915362 TX Bit5 (982~1005) 24 993, Bit13 (978~1001) 24 989,
3536 11:06:37.921767 TX Bit6 (980~1005) 26 992, Bit14 (977~1000) 24 988,
3537 11:06:37.925582 TX Bit7 (981~1005) 25 993, Bit15 (971~994) 24 982,
3538 11:06:37.926120
3539 11:06:37.928002 Write Rank1 MR14 =0x1a
3540 11:06:37.936289
3541 11:06:37.939435 CH=1, VrefRange= 0, VrefLevel = 26
3542 11:06:37.942684 TX Bit0 (982~1006) 25 994, Bit8 (974~998) 25 986,
3543 11:06:37.946158 TX Bit1 (980~1005) 26 992, Bit9 (975~996) 22 985,
3544 11:06:37.952782 TX Bit2 (977~1003) 27 990, Bit10 (977~1000) 24 988,
3545 11:06:37.955646 TX Bit3 (976~1000) 25 988, Bit11 (978~1000) 23 989,
3546 11:06:37.962253 TX Bit4 (980~1006) 27 993, Bit12 (978~1001) 24 989,
3547 11:06:37.965500 TX Bit5 (982~1005) 24 993, Bit13 (978~1001) 24 989,
3548 11:06:37.972488 TX Bit6 (980~1005) 26 992, Bit14 (977~1000) 24 988,
3549 11:06:37.975589 TX Bit7 (980~1005) 26 992, Bit15 (971~995) 25 983,
3550 11:06:37.976019
3551 11:06:37.978659 Write Rank1 MR14 =0x1c
3552 11:06:37.986533
3553 11:06:37.989740 CH=1, VrefRange= 0, VrefLevel = 28
3554 11:06:37.993504 TX Bit0 (982~1006) 25 994, Bit8 (973~998) 26 985,
3555 11:06:37.997149 TX Bit1 (979~1006) 28 992, Bit9 (975~996) 22 985,
3556 11:06:38.003043 TX Bit2 (977~1004) 28 990, Bit10 (977~1001) 25 989,
3557 11:06:38.006313 TX Bit3 (976~1000) 25 988, Bit11 (977~1000) 24 988,
3558 11:06:38.012992 TX Bit4 (979~1006) 28 992, Bit12 (977~1001) 25 989,
3559 11:06:38.016478 TX Bit5 (982~1006) 25 994, Bit13 (978~1001) 24 989,
3560 11:06:38.022759 TX Bit6 (980~1006) 27 993, Bit14 (977~1000) 24 988,
3561 11:06:38.026220 TX Bit7 (980~1006) 27 993, Bit15 (971~995) 25 983,
3562 11:06:38.026723
3563 11:06:38.029130 Write Rank1 MR14 =0x1e
3564 11:06:38.036952
3565 11:06:38.040873 CH=1, VrefRange= 0, VrefLevel = 30
3566 11:06:38.044098 TX Bit0 (982~1006) 25 994, Bit8 (974~998) 25 986,
3567 11:06:38.047080 TX Bit1 (980~1006) 27 993, Bit9 (974~997) 24 985,
3568 11:06:38.053605 TX Bit2 (978~1003) 26 990, Bit10 (977~1000) 24 988,
3569 11:06:38.056492 TX Bit3 (976~1000) 25 988, Bit11 (977~1000) 24 988,
3570 11:06:38.063390 TX Bit4 (980~1006) 27 993, Bit12 (978~1000) 23 989,
3571 11:06:38.066364 TX Bit5 (981~1006) 26 993, Bit13 (978~1001) 24 989,
3572 11:06:38.070282 TX Bit6 (980~1006) 27 993, Bit14 (977~1000) 24 988,
3573 11:06:38.076772 TX Bit7 (980~1006) 27 993, Bit15 (971~994) 24 982,
3574 11:06:38.077276
3575 11:06:38.079769 Write Rank1 MR14 =0x20
3576 11:06:38.087568
3577 11:06:38.090660 CH=1, VrefRange= 0, VrefLevel = 32
3578 11:06:38.093860 TX Bit0 (982~1006) 25 994, Bit8 (974~998) 25 986,
3579 11:06:38.097547 TX Bit1 (980~1006) 27 993, Bit9 (974~997) 24 985,
3580 11:06:38.104159 TX Bit2 (978~1003) 26 990, Bit10 (977~1000) 24 988,
3581 11:06:38.106989 TX Bit3 (976~1000) 25 988, Bit11 (977~1000) 24 988,
3582 11:06:38.113715 TX Bit4 (980~1006) 27 993, Bit12 (978~1000) 23 989,
3583 11:06:38.117008 TX Bit5 (981~1006) 26 993, Bit13 (978~1001) 24 989,
3584 11:06:38.123413 TX Bit6 (980~1006) 27 993, Bit14 (977~1000) 24 988,
3585 11:06:38.126833 TX Bit7 (980~1006) 27 993, Bit15 (971~994) 24 982,
3586 11:06:38.127256
3587 11:06:38.130665 Write Rank1 MR14 =0x22
3588 11:06:38.138564
3589 11:06:38.141742 CH=1, VrefRange= 0, VrefLevel = 34
3590 11:06:38.145044 TX Bit0 (982~1006) 25 994, Bit8 (974~998) 25 986,
3591 11:06:38.148183 TX Bit1 (980~1006) 27 993, Bit9 (974~997) 24 985,
3592 11:06:38.154397 TX Bit2 (978~1003) 26 990, Bit10 (977~1000) 24 988,
3593 11:06:38.157458 TX Bit3 (976~1000) 25 988, Bit11 (977~1000) 24 988,
3594 11:06:38.164589 TX Bit4 (980~1006) 27 993, Bit12 (978~1000) 23 989,
3595 11:06:38.167196 TX Bit5 (981~1006) 26 993, Bit13 (978~1001) 24 989,
3596 11:06:38.173986 TX Bit6 (980~1006) 27 993, Bit14 (977~1000) 24 988,
3597 11:06:38.177404 TX Bit7 (980~1006) 27 993, Bit15 (971~994) 24 982,
3598 11:06:38.177828
3599 11:06:38.180240 Write Rank1 MR14 =0x24
3600 11:06:38.188347
3601 11:06:38.192160 CH=1, VrefRange= 0, VrefLevel = 36
3602 11:06:38.195031 TX Bit0 (982~1006) 25 994, Bit8 (974~998) 25 986,
3603 11:06:38.198361 TX Bit1 (980~1006) 27 993, Bit9 (974~997) 24 985,
3604 11:06:38.205207 TX Bit2 (978~1003) 26 990, Bit10 (977~1000) 24 988,
3605 11:06:38.208289 TX Bit3 (976~1000) 25 988, Bit11 (977~1000) 24 988,
3606 11:06:38.214764 TX Bit4 (980~1006) 27 993, Bit12 (978~1000) 23 989,
3607 11:06:38.217882 TX Bit5 (981~1006) 26 993, Bit13 (978~1001) 24 989,
3608 11:06:38.224856 TX Bit6 (980~1006) 27 993, Bit14 (977~1000) 24 988,
3609 11:06:38.227774 TX Bit7 (980~1006) 27 993, Bit15 (971~994) 24 982,
3610 11:06:38.228321
3611 11:06:38.231063 Write Rank1 MR14 =0x26
3612 11:06:38.239385
3613 11:06:38.242166 CH=1, VrefRange= 0, VrefLevel = 38
3614 11:06:38.245054 TX Bit0 (982~1006) 25 994, Bit8 (974~998) 25 986,
3615 11:06:38.248604 TX Bit1 (980~1006) 27 993, Bit9 (974~997) 24 985,
3616 11:06:38.255878 TX Bit2 (978~1003) 26 990, Bit10 (977~1000) 24 988,
3617 11:06:38.258980 TX Bit3 (976~1000) 25 988, Bit11 (977~1000) 24 988,
3618 11:06:38.265288 TX Bit4 (980~1006) 27 993, Bit12 (978~1000) 23 989,
3619 11:06:38.268323 TX Bit5 (981~1006) 26 993, Bit13 (978~1001) 24 989,
3620 11:06:38.275036 TX Bit6 (980~1006) 27 993, Bit14 (977~1000) 24 988,
3621 11:06:38.278872 TX Bit7 (980~1006) 27 993, Bit15 (971~994) 24 982,
3622 11:06:38.279377
3623 11:06:38.279706
3624 11:06:38.281654 TX Vref found, early break! 370< 381
3625 11:06:38.284962 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
3626 11:06:38.287908 u1DelayCellOfst[0]=7 cells (6 PI)
3627 11:06:38.291562 u1DelayCellOfst[1]=6 cells (5 PI)
3628 11:06:38.294898 u1DelayCellOfst[2]=2 cells (2 PI)
3629 11:06:38.297978 u1DelayCellOfst[3]=0 cells (0 PI)
3630 11:06:38.301575 u1DelayCellOfst[4]=6 cells (5 PI)
3631 11:06:38.304520 u1DelayCellOfst[5]=6 cells (5 PI)
3632 11:06:38.307686 u1DelayCellOfst[6]=6 cells (5 PI)
3633 11:06:38.310778 u1DelayCellOfst[7]=6 cells (5 PI)
3634 11:06:38.313985 Byte0, DQ PI dly=988, DQM PI dly= 991
3635 11:06:38.317501 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3636 11:06:38.317924
3637 11:06:38.324027 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3638 11:06:38.324533
3639 11:06:38.327633 u1DelayCellOfst[8]=5 cells (4 PI)
3640 11:06:38.328056 u1DelayCellOfst[9]=3 cells (3 PI)
3641 11:06:38.330780 u1DelayCellOfst[10]=7 cells (6 PI)
3642 11:06:38.333861 u1DelayCellOfst[11]=7 cells (6 PI)
3643 11:06:38.337702 u1DelayCellOfst[12]=9 cells (7 PI)
3644 11:06:38.340563 u1DelayCellOfst[13]=9 cells (7 PI)
3645 11:06:38.344426 u1DelayCellOfst[14]=7 cells (6 PI)
3646 11:06:38.347081 u1DelayCellOfst[15]=0 cells (0 PI)
3647 11:06:38.350673 Byte1, DQ PI dly=982, DQM PI dly= 985
3648 11:06:38.353974 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3649 11:06:38.357126
3650 11:06:38.360305 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3651 11:06:38.360729
3652 11:06:38.363541 Write Rank1 MR14 =0x1e
3653 11:06:38.363966
3654 11:06:38.364290 Final TX Range 0 Vref 30
3655 11:06:38.364594
3656 11:06:38.370063 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3657 11:06:38.370574
3658 11:06:38.376861 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3659 11:06:38.383080 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3660 11:06:38.393289 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3661 11:06:38.393817 Write Rank1 MR3 =0xb0
3662 11:06:38.396412 DramC Write-DBI on
3663 11:06:38.396924 ==
3664 11:06:38.399788 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3665 11:06:38.402785 fsp= 1, odt_onoff= 1, Byte mode= 0
3666 11:06:38.403297 ==
3667 11:06:38.409095 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3668 11:06:38.409588
3669 11:06:38.409922 Begin, DQ Scan Range 705~769
3670 11:06:38.412526
3671 11:06:38.412947
3672 11:06:38.413276 TX Vref Scan disable
3673 11:06:38.416159 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3674 11:06:38.419550 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3675 11:06:38.422817 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3676 11:06:38.425778 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3677 11:06:38.428700 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3678 11:06:38.435879 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3679 11:06:38.438955 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3680 11:06:38.442576 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3681 11:06:38.445687 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3682 11:06:38.449142 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3683 11:06:38.451968 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3684 11:06:38.455166 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3685 11:06:38.458296 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3686 11:06:38.462169 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3687 11:06:38.465195 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3688 11:06:38.468372 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3689 11:06:38.471874 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3690 11:06:38.474894 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3691 11:06:38.477900 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3692 11:06:38.487927 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3693 11:06:38.490956 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3694 11:06:38.494894 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3695 11:06:38.497628 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3696 11:06:38.501098 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3697 11:06:38.504216 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3698 11:06:38.507366 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3699 11:06:38.510950 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3700 11:06:38.513854 752 |2 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
3701 11:06:38.517556 Byte0, DQ PI dly=737, DQM PI dly= 737
3702 11:06:38.524055 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
3703 11:06:38.524556
3704 11:06:38.527412 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
3705 11:06:38.527920
3706 11:06:38.530268 Byte1, DQ PI dly=730, DQM PI dly= 730
3707 11:06:38.533783 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
3708 11:06:38.534317
3709 11:06:38.540242 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
3710 11:06:38.540742
3711 11:06:38.547060 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3712 11:06:38.553825 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3713 11:06:38.560238 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3714 11:06:38.563340 Write Rank1 MR3 =0x30
3715 11:06:38.563763 DramC Write-DBI off
3716 11:06:38.564094
3717 11:06:38.564395 [DATLAT]
3718 11:06:38.566794 Freq=1600, CH1 RK1, use_rxtx_scan=0
3719 11:06:38.567298
3720 11:06:38.569790 DATLAT Default: 0x10
3721 11:06:38.570318 7, 0xFFFF, sum=0
3722 11:06:38.573067 8, 0xFFFF, sum=0
3723 11:06:38.573594 9, 0xFFFF, sum=0
3724 11:06:38.577214 10, 0xFFFF, sum=0
3725 11:06:38.577807 11, 0xFFFF, sum=0
3726 11:06:38.579690 12, 0xFFFF, sum=0
3727 11:06:38.580119 13, 0xFFFF, sum=0
3728 11:06:38.583144 14, 0x0, sum=1
3729 11:06:38.583690 15, 0x0, sum=2
3730 11:06:38.585928 16, 0x0, sum=3
3731 11:06:38.586386 17, 0x0, sum=4
3732 11:06:38.589140 pattern=2 first_step=14 total pass=5 best_step=16
3733 11:06:38.592886 ==
3734 11:06:38.596246 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3735 11:06:38.599968 fsp= 1, odt_onoff= 1, Byte mode= 0
3736 11:06:38.600481 ==
3737 11:06:38.602624 Start DQ dly to find pass range UseTestEngine =1
3738 11:06:38.609083 x-axis: bit #, y-axis: DQ dly (-127~63)
3739 11:06:38.609517 RX Vref Scan = 0
3740 11:06:38.612147 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3741 11:06:38.615738 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3742 11:06:38.618809 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3743 11:06:38.622499 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3744 11:06:38.623218 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3745 11:06:38.625375 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3746 11:06:38.628878 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3747 11:06:38.632104 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3748 11:06:38.635792 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3749 11:06:38.638487 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3750 11:06:38.641613 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3751 11:06:38.644926 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3752 11:06:38.648234 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3753 11:06:38.648629 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3754 11:06:38.651527 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3755 11:06:38.654973 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3756 11:06:38.657727 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3757 11:06:38.661108 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3758 11:06:38.664947 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3759 11:06:38.667882 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3760 11:06:38.671184 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3761 11:06:38.674597 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3762 11:06:38.674993 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3763 11:06:38.677800 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3764 11:06:38.681084 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3765 11:06:38.684235 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3766 11:06:38.687830 0, [0] xxxoxxxx xxxxxxxo [MSB]
3767 11:06:38.690861 1, [0] xxxoxxxx ooxxxxxo [MSB]
3768 11:06:38.694159 2, [0] xoxoxxxx ooxxxxxo [MSB]
3769 11:06:38.694712 3, [0] xoooxxxo ooxxxxxo [MSB]
3770 11:06:38.697619 4, [0] xooooxxo oooxxxxo [MSB]
3771 11:06:38.701311 5, [0] ooooooxo oooxxxxo [MSB]
3772 11:06:38.704067 6, [0] ooooooxo oooooooo [MSB]
3773 11:06:38.708013 33, [0] oooxoooo ooooooox [MSB]
3774 11:06:38.711008 34, [0] oooxoooo ooooooox [MSB]
3775 11:06:38.714118 35, [0] oooxoooo xxooooox [MSB]
3776 11:06:38.717368 36, [0] ooxxoooo xxooooox [MSB]
3777 11:06:38.720776 37, [0] ooxxoooo xxooooox [MSB]
3778 11:06:38.724085 38, [0] oxxxxooo xxxoooox [MSB]
3779 11:06:38.727402 39, [0] xxxxxoox xxxxxxxx [MSB]
3780 11:06:38.727912 40, [0] xxxxxoox xxxxxxxx [MSB]
3781 11:06:38.730267 41, [0] xxxxxxox xxxxxxxx [MSB]
3782 11:06:38.733950 42, [0] xxxxxxxx xxxxxxxx [MSB]
3783 11:06:38.736772 iDelay=42, Bit 0, Center 21 (5 ~ 38) 34
3784 11:06:38.740295 iDelay=42, Bit 1, Center 19 (2 ~ 37) 36
3785 11:06:38.743770 iDelay=42, Bit 2, Center 19 (3 ~ 35) 33
3786 11:06:38.750327 iDelay=42, Bit 3, Center 15 (-1 ~ 32) 34
3787 11:06:38.753385 iDelay=42, Bit 4, Center 20 (4 ~ 37) 34
3788 11:06:38.757285 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3789 11:06:38.759943 iDelay=42, Bit 6, Center 24 (7 ~ 41) 35
3790 11:06:38.763503 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3791 11:06:38.766380 iDelay=42, Bit 8, Center 17 (1 ~ 34) 34
3792 11:06:38.769880 iDelay=42, Bit 9, Center 17 (1 ~ 34) 34
3793 11:06:38.773408 iDelay=42, Bit 10, Center 20 (4 ~ 37) 34
3794 11:06:38.776411 iDelay=42, Bit 11, Center 22 (6 ~ 38) 33
3795 11:06:38.779735 iDelay=42, Bit 12, Center 22 (6 ~ 38) 33
3796 11:06:38.782957 iDelay=42, Bit 13, Center 22 (6 ~ 38) 33
3797 11:06:38.786264 iDelay=42, Bit 14, Center 22 (6 ~ 38) 33
3798 11:06:38.792898 iDelay=42, Bit 15, Center 15 (-2 ~ 32) 35
3799 11:06:38.793404 ==
3800 11:06:38.795878 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3801 11:06:38.799417 fsp= 1, odt_onoff= 1, Byte mode= 0
3802 11:06:38.799918 ==
3803 11:06:38.802573 DQS Delay:
3804 11:06:38.802996 DQS0 = 0, DQS1 = 0
3805 11:06:38.803323 DQM Delay:
3806 11:06:38.805979 DQM0 = 20, DQM1 = 19
3807 11:06:38.806541 DQ Delay:
3808 11:06:38.809624 DQ0 =21, DQ1 =19, DQ2 =19, DQ3 =15
3809 11:06:38.812345 DQ4 =20, DQ5 =22, DQ6 =24, DQ7 =20
3810 11:06:38.815628 DQ8 =17, DQ9 =17, DQ10 =20, DQ11 =22
3811 11:06:38.819036 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =15
3812 11:06:38.819533
3813 11:06:38.819863
3814 11:06:38.820163
3815 11:06:38.822506 [DramC_TX_OE_Calibration] TA2
3816 11:06:38.826171 Original DQ_B0 (3 6) =30, OEN = 27
3817 11:06:38.829144 Original DQ_B1 (3 6) =30, OEN = 27
3818 11:06:38.832543 23, 0x0, End_B0=23 End_B1=23
3819 11:06:38.834982 24, 0x0, End_B0=24 End_B1=24
3820 11:06:38.838480 25, 0x0, End_B0=25 End_B1=25
3821 11:06:38.838994 26, 0x0, End_B0=26 End_B1=26
3822 11:06:38.841745 27, 0x0, End_B0=27 End_B1=27
3823 11:06:38.845828 28, 0x0, End_B0=28 End_B1=28
3824 11:06:38.848602 29, 0x0, End_B0=29 End_B1=29
3825 11:06:38.849118 30, 0x0, End_B0=30 End_B1=30
3826 11:06:38.851951 31, 0xFFFF, End_B0=30 End_B1=30
3827 11:06:38.857987 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3828 11:06:38.865045 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3829 11:06:38.865474
3830 11:06:38.865817
3831 11:06:38.866365 Write Rank1 MR23 =0x3f
3832 11:06:38.867779 [DQSOSC]
3833 11:06:38.874704 [DQSOSCAuto] RK1, (LSB)MR18= 0xb2b2, (MSB)MR19= 0x202, tDQSOscB0 = 456 ps tDQSOscB1 = 456 ps
3834 11:06:38.880832 CH1_RK1: MR19=0x202, MR18=0xB2B2, DQSOSC=456, MR23=63, INC=11, DEC=17
3835 11:06:38.885307 Write Rank1 MR23 =0x3f
3836 11:06:38.885806 [DQSOSC]
3837 11:06:38.891380 [DQSOSCAuto] RK1, (LSB)MR18= 0xb2b2, (MSB)MR19= 0x202, tDQSOscB0 = 456 ps tDQSOscB1 = 456 ps
3838 11:06:38.894309 CH1 RK1: MR19=202, MR18=B2B2
3839 11:06:38.897879 [RxdqsGatingPostProcess] freq 1600
3840 11:06:38.904437 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3841 11:06:38.904949 Rank: 0
3842 11:06:38.907066 best DQS0 dly(2T, 0.5T) = (2, 6)
3843 11:06:38.910885 best DQS1 dly(2T, 0.5T) = (2, 6)
3844 11:06:38.913855 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3845 11:06:38.917249 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3846 11:06:38.917680 Rank: 1
3847 11:06:38.920240 best DQS0 dly(2T, 0.5T) = (2, 6)
3848 11:06:38.924050 best DQS1 dly(2T, 0.5T) = (2, 6)
3849 11:06:38.927373 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3850 11:06:38.930443 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3851 11:06:38.933472 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3852 11:06:38.936832 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3853 11:06:38.943419 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3854 11:06:38.943923
3855 11:06:38.944249
3856 11:06:38.946944 [Calibration Summary] Freqency 1600
3857 11:06:38.947373 CH 0, Rank 0
3858 11:06:38.947707 All Pass.
3859 11:06:38.950775
3860 11:06:38.951271 CH 0, Rank 1
3861 11:06:38.951601 All Pass.
3862 11:06:38.951906
3863 11:06:38.953130 CH 1, Rank 0
3864 11:06:38.953553 All Pass.
3865 11:06:38.953885
3866 11:06:38.954252 CH 1, Rank 1
3867 11:06:38.956118 All Pass.
3868 11:06:38.956537
3869 11:06:38.962849 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3870 11:06:38.969633 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3871 11:06:38.976029 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3872 11:06:38.979121 Write Rank0 MR3 =0xb0
3873 11:06:38.982967 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3874 11:06:38.992582 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3875 11:06:38.999470 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3876 11:06:38.999976 Write Rank1 MR3 =0xb0
3877 11:06:39.006156 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3878 11:06:39.012411 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3879 11:06:39.022277 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3880 11:06:39.022857 Write Rank0 MR3 =0xb0
3881 11:06:39.028931 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3882 11:06:39.035042 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3883 11:06:39.045295 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3884 11:06:39.045817 Write Rank1 MR3 =0xb0
3885 11:06:39.048425 DramC Write-DBI on
3886 11:06:39.052197 [GetDramInforAfterCalByMRR] Vendor 6.
3887 11:06:39.054703 [GetDramInforAfterCalByMRR] Revision 505.
3888 11:06:39.055132 MR8 1111
3889 11:06:39.061714 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3890 11:06:39.062349 MR8 1111
3891 11:06:39.064955 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3892 11:06:39.068279 MR8 1111
3893 11:06:39.071140 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3894 11:06:39.071640 MR8 1111
3895 11:06:39.078160 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3896 11:06:39.084496 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3897 11:06:39.087637 Write Rank0 MR13 =0xd0
3898 11:06:39.090686 Write Rank1 MR13 =0xd0
3899 11:06:39.091106 Write Rank0 MR13 =0xd0
3900 11:06:39.094314 Write Rank1 MR13 =0xd0
3901 11:06:39.097993 Save calibration result to emmc
3902 11:06:39.098543
3903 11:06:39.098877
3904 11:06:39.100935 [DramcModeReg_Check] Freq_1600, FSP_1
3905 11:06:39.101439 FSP_1, CH_0, RK0
3906 11:06:39.104478 Write Rank0 MR13 =0xd8
3907 11:06:39.107425 MR12 = 0x5e (global = 0x5e) match
3908 11:06:39.110639 MR14 = 0x1e (global = 0x1e) match
3909 11:06:39.111144 FSP_1, CH_0, RK1
3910 11:06:39.113924 Write Rank1 MR13 =0xd8
3911 11:06:39.117137 MR12 = 0x5e (global = 0x5e) match
3912 11:06:39.120565 MR14 = 0x1c (global = 0x1c) match
3913 11:06:39.124228 FSP_1, CH_1, RK0
3914 11:06:39.124656 Write Rank0 MR13 =0xd8
3915 11:06:39.127167 MR12 = 0x5e (global = 0x5e) match
3916 11:06:39.130159 MR14 = 0x1c (global = 0x1c) match
3917 11:06:39.133766 FSP_1, CH_1, RK1
3918 11:06:39.134321 Write Rank1 MR13 =0xd8
3919 11:06:39.137276 MR12 = 0x60 (global = 0x60) match
3920 11:06:39.141386 MR14 = 0x1e (global = 0x1e) match
3921 11:06:39.141885
3922 11:06:39.145159 [MEM_TEST] 02: After DFS, before run time config
3923 11:06:39.155732 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3924 11:06:39.156232
3925 11:06:39.156568 [TA2_TEST]
3926 11:06:39.156876 === TA2 HW
3927 11:06:39.158717 TA2 PAT: XTALK
3928 11:06:39.162039 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3929 11:06:39.168950 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3930 11:06:39.172312 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3931 11:06:39.178998 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3932 11:06:39.179496
3933 11:06:39.179827
3934 11:06:39.180132 Settings after calibration
3935 11:06:39.182256
3936 11:06:39.182749 [DramcRunTimeConfig]
3937 11:06:39.185264 TransferPLLToSPMControl - MODE SW PHYPLL
3938 11:06:39.188654 TX_TRACKING: ON
3939 11:06:39.189084 RX_TRACKING: ON
3940 11:06:39.189411 HW_GATING: ON
3941 11:06:39.191805 HW_GATING DBG: OFF
3942 11:06:39.192227 ddr_geometry:1
3943 11:06:39.194654 ddr_geometry:1
3944 11:06:39.195073 ddr_geometry:1
3945 11:06:39.198351 ddr_geometry:1
3946 11:06:39.198862 ddr_geometry:1
3947 11:06:39.201341 ddr_geometry:1
3948 11:06:39.201765 ddr_geometry:1
3949 11:06:39.202154 ddr_geometry:1
3950 11:06:39.204770 High Freq DUMMY_READ_FOR_TRACKING: ON
3951 11:06:39.208640 ZQCS_ENABLE_LP4: OFF
3952 11:06:39.211212 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3953 11:06:39.215263 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3954 11:06:39.218400 SPM_CONTROL_AFTERK: ON
3955 11:06:39.218946 IMPEDANCE_TRACKING: ON
3956 11:06:39.221804 TEMP_SENSOR: ON
3957 11:06:39.222369 PER_BANK_REFRESH: ON
3958 11:06:39.225408 HW_SAVE_FOR_SR: ON
3959 11:06:39.227761 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3960 11:06:39.230999 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3961 11:06:39.234380 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3962 11:06:39.234881 Read ODT Tracking: ON
3963 11:06:39.237654 =========================
3964 11:06:39.238237
3965 11:06:39.238588 [TA2_TEST]
3966 11:06:39.240974 === TA2 HW
3967 11:06:39.244604 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3968 11:06:39.251118 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3969 11:06:39.254579 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3970 11:06:39.260579 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3971 11:06:39.261064
3972 11:06:39.263561 [MEM_TEST] 03: After run time config
3973 11:06:39.274276 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3974 11:06:39.276582 [complex_mem_test] start addr:0x40024000, len:131072
3975 11:06:39.481455 1st complex R/W mem test pass
3976 11:06:39.488101 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3977 11:06:39.491106 sync preloader write leveling
3978 11:06:39.494459 sync preloader cbt_mr12
3979 11:06:39.498055 sync preloader cbt_clk_dly
3980 11:06:39.498561 sync preloader cbt_cmd_dly
3981 11:06:39.501140 sync preloader cbt_cs
3982 11:06:39.504156 sync preloader cbt_ca_perbit_delay
3983 11:06:39.507226 sync preloader clk_delay
3984 11:06:39.507729 sync preloader dqs_delay
3985 11:06:39.510627 sync preloader u1Gating2T_Save
3986 11:06:39.513870 sync preloader u1Gating05T_Save
3987 11:06:39.517522 sync preloader u1Gatingfine_tune_Save
3988 11:06:39.520339 sync preloader u1Gatingucpass_count_Save
3989 11:06:39.524174 sync preloader u1TxWindowPerbitVref_Save
3990 11:06:39.526898 sync preloader u1TxCenter_min_Save
3991 11:06:39.530354 sync preloader u1TxCenter_max_Save
3992 11:06:39.534166 sync preloader u1Txwin_center_Save
3993 11:06:39.537266 sync preloader u1Txfirst_pass_Save
3994 11:06:39.540547 sync preloader u1Txlast_pass_Save
3995 11:06:39.543561 sync preloader u1RxDatlat_Save
3996 11:06:39.546749 sync preloader u1RxWinPerbitVref_Save
3997 11:06:39.550122 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3998 11:06:39.553288 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3999 11:06:39.556781 sync preloader delay_cell_unit
4000 11:06:39.563211 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4001 11:06:39.566126 sync preloader write leveling
4002 11:06:39.569882 sync preloader cbt_mr12
4003 11:06:39.570429 sync preloader cbt_clk_dly
4004 11:06:39.572617 sync preloader cbt_cmd_dly
4005 11:06:39.576388 sync preloader cbt_cs
4006 11:06:39.579723 sync preloader cbt_ca_perbit_delay
4007 11:06:39.580224 sync preloader clk_delay
4008 11:06:39.583538 sync preloader dqs_delay
4009 11:06:39.586130 sync preloader u1Gating2T_Save
4010 11:06:39.589311 sync preloader u1Gating05T_Save
4011 11:06:39.592683 sync preloader u1Gatingfine_tune_Save
4012 11:06:39.596234 sync preloader u1Gatingucpass_count_Save
4013 11:06:39.599516 sync preloader u1TxWindowPerbitVref_Save
4014 11:06:39.602422 sync preloader u1TxCenter_min_Save
4015 11:06:39.606576 sync preloader u1TxCenter_max_Save
4016 11:06:39.609268 sync preloader u1Txwin_center_Save
4017 11:06:39.612740 sync preloader u1Txfirst_pass_Save
4018 11:06:39.616009 sync preloader u1Txlast_pass_Save
4019 11:06:39.618852 sync preloader u1RxDatlat_Save
4020 11:06:39.622493 sync preloader u1RxWinPerbitVref_Save
4021 11:06:39.625462 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4022 11:06:39.628958 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4023 11:06:39.631780 sync preloader delay_cell_unit
4024 11:06:39.638731 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4025 11:06:39.642138 sync preloader write leveling
4026 11:06:39.642640 sync preloader cbt_mr12
4027 11:06:39.645365 sync preloader cbt_clk_dly
4028 11:06:39.648493 sync preloader cbt_cmd_dly
4029 11:06:39.651530 sync preloader cbt_cs
4030 11:06:39.655002 sync preloader cbt_ca_perbit_delay
4031 11:06:39.655431 sync preloader clk_delay
4032 11:06:39.658107 sync preloader dqs_delay
4033 11:06:39.661636 sync preloader u1Gating2T_Save
4034 11:06:39.664780 sync preloader u1Gating05T_Save
4035 11:06:39.668113 sync preloader u1Gatingfine_tune_Save
4036 11:06:39.671319 sync preloader u1Gatingucpass_count_Save
4037 11:06:39.674601 sync preloader u1TxWindowPerbitVref_Save
4038 11:06:39.677726 sync preloader u1TxCenter_min_Save
4039 11:06:39.680758 sync preloader u1TxCenter_max_Save
4040 11:06:39.684252 sync preloader u1Txwin_center_Save
4041 11:06:39.687947 sync preloader u1Txfirst_pass_Save
4042 11:06:39.688370 sync preloader u1Txlast_pass_Save
4043 11:06:39.691178 sync preloader u1RxDatlat_Save
4044 11:06:39.694210 sync preloader u1RxWinPerbitVref_Save
4045 11:06:39.700716 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4046 11:06:39.704712 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4047 11:06:39.707486 sync preloader delay_cell_unit
4048 11:06:39.710672 just_for_test_dump_coreboot_params dump all params
4049 11:06:39.713675 dump source = 0x0
4050 11:06:39.714251 dump params frequency:1600
4051 11:06:39.716943 dump params rank number:2
4052 11:06:39.717575
4053 11:06:39.720373 dump params write leveling
4054 11:06:39.723571 write leveling[0][0][0] = 0x21
4055 11:06:39.723980 write leveling[0][0][1] = 0x16
4056 11:06:39.727370 write leveling[0][1][0] = 0x20
4057 11:06:39.730184 write leveling[0][1][1] = 0x17
4058 11:06:39.734065 write leveling[1][0][0] = 0x22
4059 11:06:39.736877 write leveling[1][0][1] = 0x22
4060 11:06:39.740762 write leveling[1][1][0] = 0x21
4061 11:06:39.743302 write leveling[1][1][1] = 0x1f
4062 11:06:39.743684 dump params cbt_cs
4063 11:06:39.746497 cbt_cs[0][0] = 0x7
4064 11:06:39.746873 cbt_cs[0][1] = 0x7
4065 11:06:39.750430 cbt_cs[1][0] = 0xa
4066 11:06:39.750810 cbt_cs[1][1] = 0xa
4067 11:06:39.753670 dump params cbt_mr12
4068 11:06:39.754108 cbt_mr12[0][0] = 0x1e
4069 11:06:39.757152 cbt_mr12[0][1] = 0x1e
4070 11:06:39.759806 cbt_mr12[1][0] = 0x1e
4071 11:06:39.760221 cbt_mr12[1][1] = 0x20
4072 11:06:39.763941 dump params tx window
4073 11:06:39.766283 tx_center_min[0][0][0] = 987
4074 11:06:39.766666 tx_center_max[0][0][0] = 993
4075 11:06:39.770497 tx_center_min[0][0][1] = 976
4076 11:06:39.773041 tx_center_max[0][0][1] = 983
4077 11:06:39.776729 tx_center_min[0][1][0] = 987
4078 11:06:39.780296 tx_center_max[0][1][0] = 992
4079 11:06:39.780763 tx_center_min[0][1][1] = 977
4080 11:06:39.783231 tx_center_max[0][1][1] = 985
4081 11:06:39.786555 tx_center_min[1][0][0] = 990
4082 11:06:39.789628 tx_center_max[1][0][0] = 996
4083 11:06:39.792538 tx_center_min[1][0][1] = 989
4084 11:06:39.792921 tx_center_max[1][0][1] = 995
4085 11:06:39.796543 tx_center_min[1][1][0] = 988
4086 11:06:39.799809 tx_center_max[1][1][0] = 994
4087 11:06:39.802959 tx_center_min[1][1][1] = 982
4088 11:06:39.806224 tx_center_max[1][1][1] = 989
4089 11:06:39.806680 dump params tx window
4090 11:06:39.809244 tx_win_center[0][0][0] = 993
4091 11:06:39.812394 tx_first_pass[0][0][0] = 981
4092 11:06:39.815927 tx_last_pass[0][0][0] = 1006
4093 11:06:39.816428 tx_win_center[0][0][1] = 992
4094 11:06:39.818958 tx_first_pass[0][0][1] = 979
4095 11:06:39.822262 tx_last_pass[0][0][1] = 1005
4096 11:06:39.825803 tx_win_center[0][0][2] = 993
4097 11:06:39.829390 tx_first_pass[0][0][2] = 981
4098 11:06:39.829901 tx_last_pass[0][0][2] = 1005
4099 11:06:39.831987 tx_win_center[0][0][3] = 987
4100 11:06:39.835405 tx_first_pass[0][0][3] = 975
4101 11:06:39.838870 tx_last_pass[0][0][3] = 999
4102 11:06:39.839331 tx_win_center[0][0][4] = 991
4103 11:06:39.841837 tx_first_pass[0][0][4] = 978
4104 11:06:39.845564 tx_last_pass[0][0][4] = 1004
4105 11:06:39.848417 tx_win_center[0][0][5] = 989
4106 11:06:39.852122 tx_first_pass[0][0][5] = 977
4107 11:06:39.852553 tx_last_pass[0][0][5] = 1001
4108 11:06:39.855015 tx_win_center[0][0][6] = 989
4109 11:06:39.858591 tx_first_pass[0][0][6] = 977
4110 11:06:39.862051 tx_last_pass[0][0][6] = 1002
4111 11:06:39.864665 tx_win_center[0][0][7] = 991
4112 11:06:39.865087 tx_first_pass[0][0][7] = 979
4113 11:06:39.868499 tx_last_pass[0][0][7] = 1004
4114 11:06:39.871746 tx_win_center[0][0][8] = 976
4115 11:06:39.874830 tx_first_pass[0][0][8] = 964
4116 11:06:39.877906 tx_last_pass[0][0][8] = 988
4117 11:06:39.878434 tx_win_center[0][0][9] = 978
4118 11:06:39.881084 tx_first_pass[0][0][9] = 967
4119 11:06:39.884810 tx_last_pass[0][0][9] = 989
4120 11:06:39.887890 tx_win_center[0][0][10] = 983
4121 11:06:39.891294 tx_first_pass[0][0][10] = 971
4122 11:06:39.891756 tx_last_pass[0][0][10] = 995
4123 11:06:39.894792 tx_win_center[0][0][11] = 976
4124 11:06:39.897899 tx_first_pass[0][0][11] = 965
4125 11:06:39.901446 tx_last_pass[0][0][11] = 988
4126 11:06:39.904670 tx_win_center[0][0][12] = 978
4127 11:06:39.907920 tx_first_pass[0][0][12] = 966
4128 11:06:39.908420 tx_last_pass[0][0][12] = 990
4129 11:06:39.910796 tx_win_center[0][0][13] = 978
4130 11:06:39.914159 tx_first_pass[0][0][13] = 967
4131 11:06:39.918132 tx_last_pass[0][0][13] = 990
4132 11:06:39.921479 tx_win_center[0][0][14] = 979
4133 11:06:39.922003 tx_first_pass[0][0][14] = 967
4134 11:06:39.924424 tx_last_pass[0][0][14] = 991
4135 11:06:39.927567 tx_win_center[0][0][15] = 981
4136 11:06:39.930526 tx_first_pass[0][0][15] = 969
4137 11:06:39.933614 tx_last_pass[0][0][15] = 993
4138 11:06:39.934073 tx_win_center[0][1][0] = 992
4139 11:06:39.937161 tx_first_pass[0][1][0] = 980
4140 11:06:39.940715 tx_last_pass[0][1][0] = 1005
4141 11:06:39.944136 tx_win_center[0][1][1] = 991
4142 11:06:39.947231 tx_first_pass[0][1][1] = 979
4143 11:06:39.947748 tx_last_pass[0][1][1] = 1003
4144 11:06:39.950513 tx_win_center[0][1][2] = 992
4145 11:06:39.954117 tx_first_pass[0][1][2] = 980
4146 11:06:39.956503 tx_last_pass[0][1][2] = 1004
4147 11:06:39.959986 tx_win_center[0][1][3] = 987
4148 11:06:39.960496 tx_first_pass[0][1][3] = 975
4149 11:06:39.963734 tx_last_pass[0][1][3] = 999
4150 11:06:39.966743 tx_win_center[0][1][4] = 990
4151 11:06:39.970064 tx_first_pass[0][1][4] = 978
4152 11:06:39.973679 tx_last_pass[0][1][4] = 1003
4153 11:06:39.974229 tx_win_center[0][1][5] = 988
4154 11:06:39.976987 tx_first_pass[0][1][5] = 976
4155 11:06:39.979816 tx_last_pass[0][1][5] = 1000
4156 11:06:39.983211 tx_win_center[0][1][6] = 989
4157 11:06:39.986541 tx_first_pass[0][1][6] = 977
4158 11:06:39.987079 tx_last_pass[0][1][6] = 1001
4159 11:06:39.989430 tx_win_center[0][1][7] = 991
4160 11:06:39.992554 tx_first_pass[0][1][7] = 978
4161 11:06:39.996353 tx_last_pass[0][1][7] = 1004
4162 11:06:39.999531 tx_win_center[0][1][8] = 977
4163 11:06:40.000029 tx_first_pass[0][1][8] = 966
4164 11:06:40.003044 tx_last_pass[0][1][8] = 989
4165 11:06:40.006109 tx_win_center[0][1][9] = 979
4166 11:06:40.009140 tx_first_pass[0][1][9] = 968
4167 11:06:40.009558 tx_last_pass[0][1][9] = 990
4168 11:06:40.012445 tx_win_center[0][1][10] = 985
4169 11:06:40.016168 tx_first_pass[0][1][10] = 973
4170 11:06:40.019082 tx_last_pass[0][1][10] = 997
4171 11:06:40.022704 tx_win_center[0][1][11] = 978
4172 11:06:40.026157 tx_first_pass[0][1][11] = 967
4173 11:06:40.026655 tx_last_pass[0][1][11] = 990
4174 11:06:40.029264 tx_win_center[0][1][12] = 979
4175 11:06:40.032269 tx_first_pass[0][1][12] = 968
4176 11:06:40.035689 tx_last_pass[0][1][12] = 991
4177 11:06:40.038904 tx_win_center[0][1][13] = 979
4178 11:06:40.039402 tx_first_pass[0][1][13] = 968
4179 11:06:40.042178 tx_last_pass[0][1][13] = 990
4180 11:06:40.045663 tx_win_center[0][1][14] = 980
4181 11:06:40.049244 tx_first_pass[0][1][14] = 968
4182 11:06:40.051796 tx_last_pass[0][1][14] = 992
4183 11:06:40.052222 tx_win_center[0][1][15] = 984
4184 11:06:40.055263 tx_first_pass[0][1][15] = 972
4185 11:06:40.058584 tx_last_pass[0][1][15] = 996
4186 11:06:40.061925 tx_win_center[1][0][0] = 996
4187 11:06:40.065428 tx_first_pass[1][0][0] = 984
4188 11:06:40.065927 tx_last_pass[1][0][0] = 1008
4189 11:06:40.068667 tx_win_center[1][0][1] = 995
4190 11:06:40.072016 tx_first_pass[1][0][1] = 983
4191 11:06:40.075210 tx_last_pass[1][0][1] = 1007
4192 11:06:40.078663 tx_win_center[1][0][2] = 992
4193 11:06:40.079170 tx_first_pass[1][0][2] = 979
4194 11:06:40.081453 tx_last_pass[1][0][2] = 1006
4195 11:06:40.084759 tx_win_center[1][0][3] = 990
4196 11:06:40.088097 tx_first_pass[1][0][3] = 978
4197 11:06:40.091491 tx_last_pass[1][0][3] = 1003
4198 11:06:40.091911 tx_win_center[1][0][4] = 994
4199 11:06:40.094397 tx_first_pass[1][0][4] = 982
4200 11:06:40.097884 tx_last_pass[1][0][4] = 1007
4201 11:06:40.101356 tx_win_center[1][0][5] = 996
4202 11:06:40.104316 tx_first_pass[1][0][5] = 984
4203 11:06:40.104741 tx_last_pass[1][0][5] = 1008
4204 11:06:40.107682 tx_win_center[1][0][6] = 995
4205 11:06:40.111034 tx_first_pass[1][0][6] = 983
4206 11:06:40.114555 tx_last_pass[1][0][6] = 1007
4207 11:06:40.118145 tx_win_center[1][0][7] = 994
4208 11:06:40.118689 tx_first_pass[1][0][7] = 982
4209 11:06:40.120865 tx_last_pass[1][0][7] = 1007
4210 11:06:40.124073 tx_win_center[1][0][8] = 992
4211 11:06:40.127502 tx_first_pass[1][0][8] = 981
4212 11:06:40.130988 tx_last_pass[1][0][8] = 1003
4213 11:06:40.131482 tx_win_center[1][0][9] = 991
4214 11:06:40.134207 tx_first_pass[1][0][9] = 980
4215 11:06:40.137065 tx_last_pass[1][0][9] = 1002
4216 11:06:40.140803 tx_win_center[1][0][10] = 993
4217 11:06:40.144171 tx_first_pass[1][0][10] = 983
4218 11:06:40.144669 tx_last_pass[1][0][10] = 1004
4219 11:06:40.147113 tx_win_center[1][0][11] = 995
4220 11:06:40.150386 tx_first_pass[1][0][11] = 985
4221 11:06:40.153576 tx_last_pass[1][0][11] = 1006
4222 11:06:40.156920 tx_win_center[1][0][12] = 995
4223 11:06:40.160112 tx_first_pass[1][0][12] = 985
4224 11:06:40.160533 tx_last_pass[1][0][12] = 1006
4225 11:06:40.163460 tx_win_center[1][0][13] = 995
4226 11:06:40.166701 tx_first_pass[1][0][13] = 985
4227 11:06:40.170223 tx_last_pass[1][0][13] = 1006
4228 11:06:40.173663 tx_win_center[1][0][14] = 994
4229 11:06:40.176916 tx_first_pass[1][0][14] = 984
4230 11:06:40.177454 tx_last_pass[1][0][14] = 1004
4231 11:06:40.180046 tx_win_center[1][0][15] = 989
4232 11:06:40.183181 tx_first_pass[1][0][15] = 978
4233 11:06:40.186455 tx_last_pass[1][0][15] = 1000
4234 11:06:40.189422 tx_win_center[1][1][0] = 994
4235 11:06:40.189845 tx_first_pass[1][1][0] = 982
4236 11:06:40.192486 tx_last_pass[1][1][0] = 1006
4237 11:06:40.196417 tx_win_center[1][1][1] = 993
4238 11:06:40.199561 tx_first_pass[1][1][1] = 980
4239 11:06:40.202846 tx_last_pass[1][1][1] = 1006
4240 11:06:40.203347 tx_win_center[1][1][2] = 990
4241 11:06:40.206135 tx_first_pass[1][1][2] = 978
4242 11:06:40.209982 tx_last_pass[1][1][2] = 1003
4243 11:06:40.212920 tx_win_center[1][1][3] = 988
4244 11:06:40.216092 tx_first_pass[1][1][3] = 976
4245 11:06:40.216576 tx_last_pass[1][1][3] = 1000
4246 11:06:40.219711 tx_win_center[1][1][4] = 993
4247 11:06:40.222560 tx_first_pass[1][1][4] = 980
4248 11:06:40.226552 tx_last_pass[1][1][4] = 1006
4249 11:06:40.229773 tx_win_center[1][1][5] = 993
4250 11:06:40.230333 tx_first_pass[1][1][5] = 981
4251 11:06:40.232908 tx_last_pass[1][1][5] = 1006
4252 11:06:40.235804 tx_win_center[1][1][6] = 993
4253 11:06:40.239542 tx_first_pass[1][1][6] = 980
4254 11:06:40.242604 tx_last_pass[1][1][6] = 1006
4255 11:06:40.243030 tx_win_center[1][1][7] = 993
4256 11:06:40.245947 tx_first_pass[1][1][7] = 980
4257 11:06:40.249639 tx_last_pass[1][1][7] = 1006
4258 11:06:40.252172 tx_win_center[1][1][8] = 986
4259 11:06:40.252629 tx_first_pass[1][1][8] = 974
4260 11:06:40.255544 tx_last_pass[1][1][8] = 998
4261 11:06:40.258914 tx_win_center[1][1][9] = 985
4262 11:06:40.261925 tx_first_pass[1][1][9] = 974
4263 11:06:40.265214 tx_last_pass[1][1][9] = 997
4264 11:06:40.265595 tx_win_center[1][1][10] = 988
4265 11:06:40.268475 tx_first_pass[1][1][10] = 977
4266 11:06:40.271896 tx_last_pass[1][1][10] = 1000
4267 11:06:40.275686 tx_win_center[1][1][11] = 988
4268 11:06:40.278400 tx_first_pass[1][1][11] = 977
4269 11:06:40.281691 tx_last_pass[1][1][11] = 1000
4270 11:06:40.282117 tx_win_center[1][1][12] = 989
4271 11:06:40.285162 tx_first_pass[1][1][12] = 978
4272 11:06:40.288352 tx_last_pass[1][1][12] = 1000
4273 11:06:40.291555 tx_win_center[1][1][13] = 989
4274 11:06:40.294753 tx_first_pass[1][1][13] = 978
4275 11:06:40.295135 tx_last_pass[1][1][13] = 1001
4276 11:06:40.298826 tx_win_center[1][1][14] = 988
4277 11:06:40.301843 tx_first_pass[1][1][14] = 977
4278 11:06:40.305255 tx_last_pass[1][1][14] = 1000
4279 11:06:40.308757 tx_win_center[1][1][15] = 982
4280 11:06:40.311367 tx_first_pass[1][1][15] = 971
4281 11:06:40.311753 tx_last_pass[1][1][15] = 994
4282 11:06:40.314924 dump params rx window
4283 11:06:40.318413 rx_firspass[0][0][0] = 5
4284 11:06:40.318890 rx_lastpass[0][0][0] = 39
4285 11:06:40.320947 rx_firspass[0][0][1] = 5
4286 11:06:40.324679 rx_lastpass[0][0][1] = 36
4287 11:06:40.325060 rx_firspass[0][0][2] = 6
4288 11:06:40.327763 rx_lastpass[0][0][2] = 37
4289 11:06:40.330846 rx_firspass[0][0][3] = 0
4290 11:06:40.334690 rx_lastpass[0][0][3] = 30
4291 11:06:40.335074 rx_firspass[0][0][4] = 5
4292 11:06:40.337803 rx_lastpass[0][0][4] = 36
4293 11:06:40.341227 rx_firspass[0][0][5] = 1
4294 11:06:40.341726 rx_lastpass[0][0][5] = 33
4295 11:06:40.344002 rx_firspass[0][0][6] = 4
4296 11:06:40.348058 rx_lastpass[0][0][6] = 33
4297 11:06:40.351125 rx_firspass[0][0][7] = 7
4298 11:06:40.351628 rx_lastpass[0][0][7] = 36
4299 11:06:40.354267 rx_firspass[0][0][8] = -1
4300 11:06:40.357420 rx_lastpass[0][0][8] = 31
4301 11:06:40.357923 rx_firspass[0][0][9] = 1
4302 11:06:40.360427 rx_lastpass[0][0][9] = 32
4303 11:06:40.363963 rx_firspass[0][0][10] = 9
4304 11:06:40.367377 rx_lastpass[0][0][10] = 39
4305 11:06:40.367821 rx_firspass[0][0][11] = 1
4306 11:06:40.370905 rx_lastpass[0][0][11] = 30
4307 11:06:40.374043 rx_firspass[0][0][12] = 1
4308 11:06:40.377079 rx_lastpass[0][0][12] = 34
4309 11:06:40.377570 rx_firspass[0][0][13] = 3
4310 11:06:40.380061 rx_lastpass[0][0][13] = 33
4311 11:06:40.383313 rx_firspass[0][0][14] = 3
4312 11:06:40.386692 rx_lastpass[0][0][14] = 36
4313 11:06:40.387107 rx_firspass[0][0][15] = 6
4314 11:06:40.389931 rx_lastpass[0][0][15] = 37
4315 11:06:40.393156 rx_firspass[0][1][0] = 3
4316 11:06:40.393571 rx_lastpass[0][1][0] = 38
4317 11:06:40.396429 rx_firspass[0][1][1] = 3
4318 11:06:40.399777 rx_lastpass[0][1][1] = 38
4319 11:06:40.404618 rx_firspass[0][1][2] = 5
4320 11:06:40.405271 rx_lastpass[0][1][2] = 40
4321 11:06:40.406473 rx_firspass[0][1][3] = -3
4322 11:06:40.409862 rx_lastpass[0][1][3] = 31
4323 11:06:40.410390 rx_firspass[0][1][4] = 6
4324 11:06:40.413013 rx_lastpass[0][1][4] = 38
4325 11:06:40.416951 rx_firspass[0][1][5] = -1
4326 11:06:40.420055 rx_lastpass[0][1][5] = 32
4327 11:06:40.420568 rx_firspass[0][1][6] = 1
4328 11:06:40.423095 rx_lastpass[0][1][6] = 34
4329 11:06:40.426215 rx_firspass[0][1][7] = 5
4330 11:06:40.426741 rx_lastpass[0][1][7] = 37
4331 11:06:40.429225 rx_firspass[0][1][8] = 0
4332 11:06:40.432652 rx_lastpass[0][1][8] = 33
4333 11:06:40.436482 rx_firspass[0][1][9] = 2
4334 11:06:40.436987 rx_lastpass[0][1][9] = 34
4335 11:06:40.439297 rx_firspass[0][1][10] = 9
4336 11:06:40.442415 rx_lastpass[0][1][10] = 42
4337 11:06:40.442838 rx_firspass[0][1][11] = 0
4338 11:06:40.446082 rx_lastpass[0][1][11] = 33
4339 11:06:40.449388 rx_firspass[0][1][12] = 3
4340 11:06:40.452590 rx_lastpass[0][1][12] = 36
4341 11:06:40.453092 rx_firspass[0][1][13] = 3
4342 11:06:40.455873 rx_lastpass[0][1][13] = 36
4343 11:06:40.459053 rx_firspass[0][1][14] = 5
4344 11:06:40.462501 rx_lastpass[0][1][14] = 38
4345 11:06:40.462992 rx_firspass[0][1][15] = 6
4346 11:06:40.465741 rx_lastpass[0][1][15] = 40
4347 11:06:40.468845 rx_firspass[1][0][0] = 5
4348 11:06:40.472412 rx_lastpass[1][0][0] = 39
4349 11:06:40.472922 rx_firspass[1][0][1] = 4
4350 11:06:40.475360 rx_lastpass[1][0][1] = 36
4351 11:06:40.478513 rx_firspass[1][0][2] = 4
4352 11:06:40.478933 rx_lastpass[1][0][2] = 36
4353 11:06:40.481972 rx_firspass[1][0][3] = -1
4354 11:06:40.484848 rx_lastpass[1][0][3] = 33
4355 11:06:40.485280 rx_firspass[1][0][4] = 4
4356 11:06:40.488490 rx_lastpass[1][0][4] = 36
4357 11:06:40.491573 rx_firspass[1][0][5] = 6
4358 11:06:40.494665 rx_lastpass[1][0][5] = 38
4359 11:06:40.495146 rx_firspass[1][0][6] = 10
4360 11:06:40.498205 rx_lastpass[1][0][6] = 39
4361 11:06:40.501501 rx_firspass[1][0][7] = 5
4362 11:06:40.501927 rx_lastpass[1][0][7] = 37
4363 11:06:40.504662 rx_firspass[1][0][8] = 0
4364 11:06:40.508404 rx_lastpass[1][0][8] = 33
4365 11:06:40.511456 rx_firspass[1][0][9] = 2
4366 11:06:40.511896 rx_lastpass[1][0][9] = 32
4367 11:06:40.515062 rx_firspass[1][0][10] = 6
4368 11:06:40.518210 rx_lastpass[1][0][10] = 36
4369 11:06:40.521290 rx_firspass[1][0][11] = 7
4370 11:06:40.521684 rx_lastpass[1][0][11] = 36
4371 11:06:40.524289 rx_firspass[1][0][12] = 5
4372 11:06:40.527641 rx_lastpass[1][0][12] = 38
4373 11:06:40.528027 rx_firspass[1][0][13] = 7
4374 11:06:40.531398 rx_lastpass[1][0][13] = 36
4375 11:06:40.533902 rx_firspass[1][0][14] = 7
4376 11:06:40.537428 rx_lastpass[1][0][14] = 37
4377 11:06:40.537817 rx_firspass[1][0][15] = 0
4378 11:06:40.541041 rx_lastpass[1][0][15] = 29
4379 11:06:40.544048 rx_firspass[1][1][0] = 5
4380 11:06:40.547161 rx_lastpass[1][1][0] = 38
4381 11:06:40.547546 rx_firspass[1][1][1] = 2
4382 11:06:40.550612 rx_lastpass[1][1][1] = 37
4383 11:06:40.553619 rx_firspass[1][1][2] = 3
4384 11:06:40.554003 rx_lastpass[1][1][2] = 35
4385 11:06:40.556950 rx_firspass[1][1][3] = -1
4386 11:06:40.560108 rx_lastpass[1][1][3] = 32
4387 11:06:40.564430 rx_firspass[1][1][4] = 4
4388 11:06:40.564899 rx_lastpass[1][1][4] = 37
4389 11:06:40.567193 rx_firspass[1][1][5] = 5
4390 11:06:40.570228 rx_lastpass[1][1][5] = 40
4391 11:06:40.570618 rx_firspass[1][1][6] = 7
4392 11:06:40.573853 rx_lastpass[1][1][6] = 41
4393 11:06:40.577122 rx_firspass[1][1][7] = 3
4394 11:06:40.580177 rx_lastpass[1][1][7] = 38
4395 11:06:40.580610 rx_firspass[1][1][8] = 1
4396 11:06:40.583414 rx_lastpass[1][1][8] = 34
4397 11:06:40.587232 rx_firspass[1][1][9] = 1
4398 11:06:40.587648 rx_lastpass[1][1][9] = 34
4399 11:06:40.590371 rx_firspass[1][1][10] = 4
4400 11:06:40.593216 rx_lastpass[1][1][10] = 37
4401 11:06:40.596735 rx_firspass[1][1][11] = 6
4402 11:06:40.597177 rx_lastpass[1][1][11] = 38
4403 11:06:40.599942 rx_firspass[1][1][12] = 6
4404 11:06:40.603326 rx_lastpass[1][1][12] = 38
4405 11:06:40.603797 rx_firspass[1][1][13] = 6
4406 11:06:40.606302 rx_lastpass[1][1][13] = 38
4407 11:06:40.610541 rx_firspass[1][1][14] = 6
4408 11:06:40.613868 rx_lastpass[1][1][14] = 38
4409 11:06:40.614393 rx_firspass[1][1][15] = -2
4410 11:06:40.616524 rx_lastpass[1][1][15] = 32
4411 11:06:40.620139 dump params clk_delay
4412 11:06:40.620636 clk_delay[0] = 1
4413 11:06:40.622802 clk_delay[1] = 0
4414 11:06:40.623244 dump params dqs_delay
4415 11:06:40.625980 dqs_delay[0][0] = 0
4416 11:06:40.626442 dqs_delay[0][1] = 0
4417 11:06:40.629901 dqs_delay[1][0] = -1
4418 11:06:40.632855 dqs_delay[1][1] = 0
4419 11:06:40.636131 dump params delay_cell_unit = 753
4420 11:06:40.636571 dump source = 0x0
4421 11:06:40.639428 dump params frequency:1200
4422 11:06:40.639945 dump params rank number:2
4423 11:06:40.642586
4424 11:06:40.643020 dump params write leveling
4425 11:06:40.646138 write leveling[0][0][0] = 0x0
4426 11:06:40.649482 write leveling[0][0][1] = 0x0
4427 11:06:40.652780 write leveling[0][1][0] = 0x0
4428 11:06:40.656018 write leveling[0][1][1] = 0x0
4429 11:06:40.656457 write leveling[1][0][0] = 0x0
4430 11:06:40.660092 write leveling[1][0][1] = 0x0
4431 11:06:40.662017 write leveling[1][1][0] = 0x0
4432 11:06:40.665166 write leveling[1][1][1] = 0x0
4433 11:06:40.665397 dump params cbt_cs
4434 11:06:40.668488 cbt_cs[0][0] = 0x0
4435 11:06:40.668726 cbt_cs[0][1] = 0x0
4436 11:06:40.672288 cbt_cs[1][0] = 0x0
4437 11:06:40.672517 cbt_cs[1][1] = 0x0
4438 11:06:40.675244 dump params cbt_mr12
4439 11:06:40.678674 cbt_mr12[0][0] = 0x0
4440 11:06:40.678936 cbt_mr12[0][1] = 0x0
4441 11:06:40.681424 cbt_mr12[1][0] = 0x0
4442 11:06:40.681659 cbt_mr12[1][1] = 0x0
4443 11:06:40.685339 dump params tx window
4444 11:06:40.688593 tx_center_min[0][0][0] = 0
4445 11:06:40.688897 tx_center_max[0][0][0] = 0
4446 11:06:40.691826 tx_center_min[0][0][1] = 0
4447 11:06:40.695135 tx_center_max[0][0][1] = 0
4448 11:06:40.698230 tx_center_min[0][1][0] = 0
4449 11:06:40.698738 tx_center_max[0][1][0] = 0
4450 11:06:40.701397 tx_center_min[0][1][1] = 0
4451 11:06:40.705252 tx_center_max[0][1][1] = 0
4452 11:06:40.708627 tx_center_min[1][0][0] = 0
4453 11:06:40.709141 tx_center_max[1][0][0] = 0
4454 11:06:40.711538 tx_center_min[1][0][1] = 0
4455 11:06:40.714838 tx_center_max[1][0][1] = 0
4456 11:06:40.718270 tx_center_min[1][1][0] = 0
4457 11:06:40.718658 tx_center_max[1][1][0] = 0
4458 11:06:40.721560 tx_center_min[1][1][1] = 0
4459 11:06:40.724340 tx_center_max[1][1][1] = 0
4460 11:06:40.728292 dump params tx window
4461 11:06:40.728750 tx_win_center[0][0][0] = 0
4462 11:06:40.731418 tx_first_pass[0][0][0] = 0
4463 11:06:40.734496 tx_last_pass[0][0][0] = 0
4464 11:06:40.734900 tx_win_center[0][0][1] = 0
4465 11:06:40.737860 tx_first_pass[0][0][1] = 0
4466 11:06:40.740915 tx_last_pass[0][0][1] = 0
4467 11:06:40.743982 tx_win_center[0][0][2] = 0
4468 11:06:40.744394 tx_first_pass[0][0][2] = 0
4469 11:06:40.747382 tx_last_pass[0][0][2] = 0
4470 11:06:40.750665 tx_win_center[0][0][3] = 0
4471 11:06:40.753866 tx_first_pass[0][0][3] = 0
4472 11:06:40.754843 tx_last_pass[0][0][3] = 0
4473 11:06:40.757415 tx_win_center[0][0][4] = 0
4474 11:06:40.760348 tx_first_pass[0][0][4] = 0
4475 11:06:40.763852 tx_last_pass[0][0][4] = 0
4476 11:06:40.764273 tx_win_center[0][0][5] = 0
4477 11:06:40.767144 tx_first_pass[0][0][5] = 0
4478 11:06:40.770345 tx_last_pass[0][0][5] = 0
4479 11:06:40.770741 tx_win_center[0][0][6] = 0
4480 11:06:40.773491 tx_first_pass[0][0][6] = 0
4481 11:06:40.776969 tx_last_pass[0][0][6] = 0
4482 11:06:40.780013 tx_win_center[0][0][7] = 0
4483 11:06:40.780399 tx_first_pass[0][0][7] = 0
4484 11:06:40.783779 tx_last_pass[0][0][7] = 0
4485 11:06:40.786867 tx_win_center[0][0][8] = 0
4486 11:06:40.790061 tx_first_pass[0][0][8] = 0
4487 11:06:40.790452 tx_last_pass[0][0][8] = 0
4488 11:06:40.793423 tx_win_center[0][0][9] = 0
4489 11:06:40.796955 tx_first_pass[0][0][9] = 0
4490 11:06:40.799967 tx_last_pass[0][0][9] = 0
4491 11:06:40.800354 tx_win_center[0][0][10] = 0
4492 11:06:40.803775 tx_first_pass[0][0][10] = 0
4493 11:06:40.806887 tx_last_pass[0][0][10] = 0
4494 11:06:40.809661 tx_win_center[0][0][11] = 0
4495 11:06:40.810068 tx_first_pass[0][0][11] = 0
4496 11:06:40.813448 tx_last_pass[0][0][11] = 0
4497 11:06:40.816232 tx_win_center[0][0][12] = 0
4498 11:06:40.819685 tx_first_pass[0][0][12] = 0
4499 11:06:40.820146 tx_last_pass[0][0][12] = 0
4500 11:06:40.823142 tx_win_center[0][0][13] = 0
4501 11:06:40.826465 tx_first_pass[0][0][13] = 0
4502 11:06:40.829620 tx_last_pass[0][0][13] = 0
4503 11:06:40.830125 tx_win_center[0][0][14] = 0
4504 11:06:40.832772 tx_first_pass[0][0][14] = 0
4505 11:06:40.835731 tx_last_pass[0][0][14] = 0
4506 11:06:40.839622 tx_win_center[0][0][15] = 0
4507 11:06:40.842868 tx_first_pass[0][0][15] = 0
4508 11:06:40.843247 tx_last_pass[0][0][15] = 0
4509 11:06:40.846468 tx_win_center[0][1][0] = 0
4510 11:06:40.849537 tx_first_pass[0][1][0] = 0
4511 11:06:40.849916 tx_last_pass[0][1][0] = 0
4512 11:06:40.852750 tx_win_center[0][1][1] = 0
4513 11:06:40.856550 tx_first_pass[0][1][1] = 0
4514 11:06:40.859136 tx_last_pass[0][1][1] = 0
4515 11:06:40.859515 tx_win_center[0][1][2] = 0
4516 11:06:40.862320 tx_first_pass[0][1][2] = 0
4517 11:06:40.865734 tx_last_pass[0][1][2] = 0
4518 11:06:40.868993 tx_win_center[0][1][3] = 0
4519 11:06:40.869372 tx_first_pass[0][1][3] = 0
4520 11:06:40.872641 tx_last_pass[0][1][3] = 0
4521 11:06:40.875837 tx_win_center[0][1][4] = 0
4522 11:06:40.879000 tx_first_pass[0][1][4] = 0
4523 11:06:40.879456 tx_last_pass[0][1][4] = 0
4524 11:06:40.882046 tx_win_center[0][1][5] = 0
4525 11:06:40.885363 tx_first_pass[0][1][5] = 0
4526 11:06:40.885950 tx_last_pass[0][1][5] = 0
4527 11:06:40.888983 tx_win_center[0][1][6] = 0
4528 11:06:40.892003 tx_first_pass[0][1][6] = 0
4529 11:06:40.895307 tx_last_pass[0][1][6] = 0
4530 11:06:40.895691 tx_win_center[0][1][7] = 0
4531 11:06:40.898615 tx_first_pass[0][1][7] = 0
4532 11:06:40.901540 tx_last_pass[0][1][7] = 0
4533 11:06:40.905706 tx_win_center[0][1][8] = 0
4534 11:06:40.906127 tx_first_pass[0][1][8] = 0
4535 11:06:40.908972 tx_last_pass[0][1][8] = 0
4536 11:06:40.912142 tx_win_center[0][1][9] = 0
4537 11:06:40.915781 tx_first_pass[0][1][9] = 0
4538 11:06:40.916166 tx_last_pass[0][1][9] = 0
4539 11:06:40.918528 tx_win_center[0][1][10] = 0
4540 11:06:40.922284 tx_first_pass[0][1][10] = 0
4541 11:06:40.925158 tx_last_pass[0][1][10] = 0
4542 11:06:40.925539 tx_win_center[0][1][11] = 0
4543 11:06:40.928129 tx_first_pass[0][1][11] = 0
4544 11:06:40.931827 tx_last_pass[0][1][11] = 0
4545 11:06:40.934942 tx_win_center[0][1][12] = 0
4546 11:06:40.935404 tx_first_pass[0][1][12] = 0
4547 11:06:40.938363 tx_last_pass[0][1][12] = 0
4548 11:06:40.941878 tx_win_center[0][1][13] = 0
4549 11:06:40.944897 tx_first_pass[0][1][13] = 0
4550 11:06:40.945359 tx_last_pass[0][1][13] = 0
4551 11:06:40.948502 tx_win_center[0][1][14] = 0
4552 11:06:40.951699 tx_first_pass[0][1][14] = 0
4553 11:06:40.954673 tx_last_pass[0][1][14] = 0
4554 11:06:40.955057 tx_win_center[0][1][15] = 0
4555 11:06:40.958123 tx_first_pass[0][1][15] = 0
4556 11:06:40.961540 tx_last_pass[0][1][15] = 0
4557 11:06:40.964498 tx_win_center[1][0][0] = 0
4558 11:06:40.964960 tx_first_pass[1][0][0] = 0
4559 11:06:40.968814 tx_last_pass[1][0][0] = 0
4560 11:06:40.971295 tx_win_center[1][0][1] = 0
4561 11:06:40.974514 tx_first_pass[1][0][1] = 0
4562 11:06:40.974974 tx_last_pass[1][0][1] = 0
4563 11:06:40.977863 tx_win_center[1][0][2] = 0
4564 11:06:40.981117 tx_first_pass[1][0][2] = 0
4565 11:06:40.984656 tx_last_pass[1][0][2] = 0
4566 11:06:40.985118 tx_win_center[1][0][3] = 0
4567 11:06:40.987959 tx_first_pass[1][0][3] = 0
4568 11:06:40.990641 tx_last_pass[1][0][3] = 0
4569 11:06:40.991113 tx_win_center[1][0][4] = 0
4570 11:06:40.993959 tx_first_pass[1][0][4] = 0
4571 11:06:40.997457 tx_last_pass[1][0][4] = 0
4572 11:06:41.000828 tx_win_center[1][0][5] = 0
4573 11:06:41.001208 tx_first_pass[1][0][5] = 0
4574 11:06:41.003958 tx_last_pass[1][0][5] = 0
4575 11:06:41.006827 tx_win_center[1][0][6] = 0
4576 11:06:41.010911 tx_first_pass[1][0][6] = 0
4577 11:06:41.011378 tx_last_pass[1][0][6] = 0
4578 11:06:41.014137 tx_win_center[1][0][7] = 0
4579 11:06:41.017026 tx_first_pass[1][0][7] = 0
4580 11:06:41.020428 tx_last_pass[1][0][7] = 0
4581 11:06:41.020889 tx_win_center[1][0][8] = 0
4582 11:06:41.023162 tx_first_pass[1][0][8] = 0
4583 11:06:41.026808 tx_last_pass[1][0][8] = 0
4584 11:06:41.030111 tx_win_center[1][0][9] = 0
4585 11:06:41.030744 tx_first_pass[1][0][9] = 0
4586 11:06:41.033593 tx_last_pass[1][0][9] = 0
4587 11:06:41.036478 tx_win_center[1][0][10] = 0
4588 11:06:41.040436 tx_first_pass[1][0][10] = 0
4589 11:06:41.040894 tx_last_pass[1][0][10] = 0
4590 11:06:41.043205 tx_win_center[1][0][11] = 0
4591 11:06:41.046655 tx_first_pass[1][0][11] = 0
4592 11:06:41.049843 tx_last_pass[1][0][11] = 0
4593 11:06:41.050255 tx_win_center[1][0][12] = 0
4594 11:06:41.053355 tx_first_pass[1][0][12] = 0
4595 11:06:41.056496 tx_last_pass[1][0][12] = 0
4596 11:06:41.059350 tx_win_center[1][0][13] = 0
4597 11:06:41.059739 tx_first_pass[1][0][13] = 0
4598 11:06:41.063089 tx_last_pass[1][0][13] = 0
4599 11:06:41.066188 tx_win_center[1][0][14] = 0
4600 11:06:41.069090 tx_first_pass[1][0][14] = 0
4601 11:06:41.069474 tx_last_pass[1][0][14] = 0
4602 11:06:41.072881 tx_win_center[1][0][15] = 0
4603 11:06:41.076321 tx_first_pass[1][0][15] = 0
4604 11:06:41.079357 tx_last_pass[1][0][15] = 0
4605 11:06:41.079822 tx_win_center[1][1][0] = 0
4606 11:06:41.082180 tx_first_pass[1][1][0] = 0
4607 11:06:41.086050 tx_last_pass[1][1][0] = 0
4608 11:06:41.088959 tx_win_center[1][1][1] = 0
4609 11:06:41.089341 tx_first_pass[1][1][1] = 0
4610 11:06:41.092192 tx_last_pass[1][1][1] = 0
4611 11:06:41.095199 tx_win_center[1][1][2] = 0
4612 11:06:41.099182 tx_first_pass[1][1][2] = 0
4613 11:06:41.099687 tx_last_pass[1][1][2] = 0
4614 11:06:41.102624 tx_win_center[1][1][3] = 0
4615 11:06:41.105434 tx_first_pass[1][1][3] = 0
4616 11:06:41.108665 tx_last_pass[1][1][3] = 0
4617 11:06:41.109044 tx_win_center[1][1][4] = 0
4618 11:06:41.112279 tx_first_pass[1][1][4] = 0
4619 11:06:41.115494 tx_last_pass[1][1][4] = 0
4620 11:06:41.118358 tx_win_center[1][1][5] = 0
4621 11:06:41.118823 tx_first_pass[1][1][5] = 0
4622 11:06:41.122252 tx_last_pass[1][1][5] = 0
4623 11:06:41.125617 tx_win_center[1][1][6] = 0
4624 11:06:41.126143 tx_first_pass[1][1][6] = 0
4625 11:06:41.128409 tx_last_pass[1][1][6] = 0
4626 11:06:41.131770 tx_win_center[1][1][7] = 0
4627 11:06:41.134894 tx_first_pass[1][1][7] = 0
4628 11:06:41.135380 tx_last_pass[1][1][7] = 0
4629 11:06:41.138263 tx_win_center[1][1][8] = 0
4630 11:06:41.141589 tx_first_pass[1][1][8] = 0
4631 11:06:41.145119 tx_last_pass[1][1][8] = 0
4632 11:06:41.145578 tx_win_center[1][1][9] = 0
4633 11:06:41.148446 tx_first_pass[1][1][9] = 0
4634 11:06:41.151157 tx_last_pass[1][1][9] = 0
4635 11:06:41.154697 tx_win_center[1][1][10] = 0
4636 11:06:41.155084 tx_first_pass[1][1][10] = 0
4637 11:06:41.157503 tx_last_pass[1][1][10] = 0
4638 11:06:41.161083 tx_win_center[1][1][11] = 0
4639 11:06:41.164568 tx_first_pass[1][1][11] = 0
4640 11:06:41.165091 tx_last_pass[1][1][11] = 0
4641 11:06:41.167538 tx_win_center[1][1][12] = 0
4642 11:06:41.171520 tx_first_pass[1][1][12] = 0
4643 11:06:41.174268 tx_last_pass[1][1][12] = 0
4644 11:06:41.174726 tx_win_center[1][1][13] = 0
4645 11:06:41.177871 tx_first_pass[1][1][13] = 0
4646 11:06:41.180760 tx_last_pass[1][1][13] = 0
4647 11:06:41.184431 tx_win_center[1][1][14] = 0
4648 11:06:41.184810 tx_first_pass[1][1][14] = 0
4649 11:06:41.187488 tx_last_pass[1][1][14] = 0
4650 11:06:41.190763 tx_win_center[1][1][15] = 0
4651 11:06:41.193906 tx_first_pass[1][1][15] = 0
4652 11:06:41.197446 tx_last_pass[1][1][15] = 0
4653 11:06:41.197996 dump params rx window
4654 11:06:41.200423 rx_firspass[0][0][0] = 0
4655 11:06:41.203843 rx_lastpass[0][0][0] = 0
4656 11:06:41.204305 rx_firspass[0][0][1] = 0
4657 11:06:41.206920 rx_lastpass[0][0][1] = 0
4658 11:06:41.210477 rx_firspass[0][0][2] = 0
4659 11:06:41.210857 rx_lastpass[0][0][2] = 0
4660 11:06:41.213576 rx_firspass[0][0][3] = 0
4661 11:06:41.217272 rx_lastpass[0][0][3] = 0
4662 11:06:41.217651 rx_firspass[0][0][4] = 0
4663 11:06:41.220487 rx_lastpass[0][0][4] = 0
4664 11:06:41.223616 rx_firspass[0][0][5] = 0
4665 11:06:41.224074 rx_lastpass[0][0][5] = 0
4666 11:06:41.226853 rx_firspass[0][0][6] = 0
4667 11:06:41.229931 rx_lastpass[0][0][6] = 0
4668 11:06:41.232969 rx_firspass[0][0][7] = 0
4669 11:06:41.233345 rx_lastpass[0][0][7] = 0
4670 11:06:41.236420 rx_firspass[0][0][8] = 0
4671 11:06:41.239738 rx_lastpass[0][0][8] = 0
4672 11:06:41.240118 rx_firspass[0][0][9] = 0
4673 11:06:41.243071 rx_lastpass[0][0][9] = 0
4674 11:06:41.246496 rx_firspass[0][0][10] = 0
4675 11:06:41.249797 rx_lastpass[0][0][10] = 0
4676 11:06:41.250319 rx_firspass[0][0][11] = 0
4677 11:06:41.252997 rx_lastpass[0][0][11] = 0
4678 11:06:41.256672 rx_firspass[0][0][12] = 0
4679 11:06:41.257134 rx_lastpass[0][0][12] = 0
4680 11:06:41.259539 rx_firspass[0][0][13] = 0
4681 11:06:41.262767 rx_lastpass[0][0][13] = 0
4682 11:06:41.266078 rx_firspass[0][0][14] = 0
4683 11:06:41.266534 rx_lastpass[0][0][14] = 0
4684 11:06:41.269647 rx_firspass[0][0][15] = 0
4685 11:06:41.273037 rx_lastpass[0][0][15] = 0
4686 11:06:41.273496 rx_firspass[0][1][0] = 0
4687 11:06:41.275866 rx_lastpass[0][1][0] = 0
4688 11:06:41.279380 rx_firspass[0][1][1] = 0
4689 11:06:41.282439 rx_lastpass[0][1][1] = 0
4690 11:06:41.282898 rx_firspass[0][1][2] = 0
4691 11:06:41.285548 rx_lastpass[0][1][2] = 0
4692 11:06:41.288832 rx_firspass[0][1][3] = 0
4693 11:06:41.289292 rx_lastpass[0][1][3] = 0
4694 11:06:41.292660 rx_firspass[0][1][4] = 0
4695 11:06:41.295099 rx_lastpass[0][1][4] = 0
4696 11:06:41.295478 rx_firspass[0][1][5] = 0
4697 11:06:41.298851 rx_lastpass[0][1][5] = 0
4698 11:06:41.302221 rx_firspass[0][1][6] = 0
4699 11:06:41.305377 rx_lastpass[0][1][6] = 0
4700 11:06:41.305753 rx_firspass[0][1][7] = 0
4701 11:06:41.308403 rx_lastpass[0][1][7] = 0
4702 11:06:41.311791 rx_firspass[0][1][8] = 0
4703 11:06:41.312347 rx_lastpass[0][1][8] = 0
4704 11:06:41.314990 rx_firspass[0][1][9] = 0
4705 11:06:41.318120 rx_lastpass[0][1][9] = 0
4706 11:06:41.318465 rx_firspass[0][1][10] = 0
4707 11:06:41.321524 rx_lastpass[0][1][10] = 0
4708 11:06:41.325025 rx_firspass[0][1][11] = 0
4709 11:06:41.328242 rx_lastpass[0][1][11] = 0
4710 11:06:41.328643 rx_firspass[0][1][12] = 0
4711 11:06:41.331617 rx_lastpass[0][1][12] = 0
4712 11:06:41.334672 rx_firspass[0][1][13] = 0
4713 11:06:41.335054 rx_lastpass[0][1][13] = 0
4714 11:06:41.337816 rx_firspass[0][1][14] = 0
4715 11:06:41.341310 rx_lastpass[0][1][14] = 0
4716 11:06:41.344979 rx_firspass[0][1][15] = 0
4717 11:06:41.345440 rx_lastpass[0][1][15] = 0
4718 11:06:41.348141 rx_firspass[1][0][0] = 0
4719 11:06:41.350983 rx_lastpass[1][0][0] = 0
4720 11:06:41.351444 rx_firspass[1][0][1] = 0
4721 11:06:41.354571 rx_lastpass[1][0][1] = 0
4722 11:06:41.357908 rx_firspass[1][0][2] = 0
4723 11:06:41.360918 rx_lastpass[1][0][2] = 0
4724 11:06:41.361371 rx_firspass[1][0][3] = 0
4725 11:06:41.364240 rx_lastpass[1][0][3] = 0
4726 11:06:41.367757 rx_firspass[1][0][4] = 0
4727 11:06:41.368142 rx_lastpass[1][0][4] = 0
4728 11:06:41.371305 rx_firspass[1][0][5] = 0
4729 11:06:41.374615 rx_lastpass[1][0][5] = 0
4730 11:06:41.375069 rx_firspass[1][0][6] = 0
4731 11:06:41.377359 rx_lastpass[1][0][6] = 0
4732 11:06:41.381115 rx_firspass[1][0][7] = 0
4733 11:06:41.384042 rx_lastpass[1][0][7] = 0
4734 11:06:41.384424 rx_firspass[1][0][8] = 0
4735 11:06:41.387323 rx_lastpass[1][0][8] = 0
4736 11:06:41.390444 rx_firspass[1][0][9] = 0
4737 11:06:41.390829 rx_lastpass[1][0][9] = 0
4738 11:06:41.393511 rx_firspass[1][0][10] = 0
4739 11:06:41.397007 rx_lastpass[1][0][10] = 0
4740 11:06:41.397463 rx_firspass[1][0][11] = 0
4741 11:06:41.399980 rx_lastpass[1][0][11] = 0
4742 11:06:41.403758 rx_firspass[1][0][12] = 0
4743 11:06:41.406740 rx_lastpass[1][0][12] = 0
4744 11:06:41.407199 rx_firspass[1][0][13] = 0
4745 11:06:41.410401 rx_lastpass[1][0][13] = 0
4746 11:06:41.413291 rx_firspass[1][0][14] = 0
4747 11:06:41.416995 rx_lastpass[1][0][14] = 0
4748 11:06:41.417458 rx_firspass[1][0][15] = 0
4749 11:06:41.419783 rx_lastpass[1][0][15] = 0
4750 11:06:41.423380 rx_firspass[1][1][0] = 0
4751 11:06:41.423839 rx_lastpass[1][1][0] = 0
4752 11:06:41.426943 rx_firspass[1][1][1] = 0
4753 11:06:41.429927 rx_lastpass[1][1][1] = 0
4754 11:06:41.430373 rx_firspass[1][1][2] = 0
4755 11:06:41.433625 rx_lastpass[1][1][2] = 0
4756 11:06:41.436746 rx_firspass[1][1][3] = 0
4757 11:06:41.439965 rx_lastpass[1][1][3] = 0
4758 11:06:41.440395 rx_firspass[1][1][4] = 0
4759 11:06:41.442906 rx_lastpass[1][1][4] = 0
4760 11:06:41.446518 rx_firspass[1][1][5] = 0
4761 11:06:41.447105 rx_lastpass[1][1][5] = 0
4762 11:06:41.449828 rx_firspass[1][1][6] = 0
4763 11:06:41.453121 rx_lastpass[1][1][6] = 0
4764 11:06:41.453626 rx_firspass[1][1][7] = 0
4765 11:06:41.455781 rx_lastpass[1][1][7] = 0
4766 11:06:41.459516 rx_firspass[1][1][8] = 0
4767 11:06:41.462688 rx_lastpass[1][1][8] = 0
4768 11:06:41.463118 rx_firspass[1][1][9] = 0
4769 11:06:41.465806 rx_lastpass[1][1][9] = 0
4770 11:06:41.469094 rx_firspass[1][1][10] = 0
4771 11:06:41.469603 rx_lastpass[1][1][10] = 0
4772 11:06:41.472706 rx_firspass[1][1][11] = 0
4773 11:06:41.475868 rx_lastpass[1][1][11] = 0
4774 11:06:41.479103 rx_firspass[1][1][12] = 0
4775 11:06:41.479523 rx_lastpass[1][1][12] = 0
4776 11:06:41.483357 rx_firspass[1][1][13] = 0
4777 11:06:41.485331 rx_lastpass[1][1][13] = 0
4778 11:06:41.485763 rx_firspass[1][1][14] = 0
4779 11:06:41.488628 rx_lastpass[1][1][14] = 0
4780 11:06:41.491836 rx_firspass[1][1][15] = 0
4781 11:06:41.495627 rx_lastpass[1][1][15] = 0
4782 11:06:41.496054 dump params clk_delay
4783 11:06:41.498807 clk_delay[0] = 0
4784 11:06:41.499280 clk_delay[1] = 0
4785 11:06:41.502121 dump params dqs_delay
4786 11:06:41.502508 dqs_delay[0][0] = 0
4787 11:06:41.505163 dqs_delay[0][1] = 0
4788 11:06:41.505545 dqs_delay[1][0] = 0
4789 11:06:41.508619 dqs_delay[1][1] = 0
4790 11:06:41.511693 dump params delay_cell_unit = 753
4791 11:06:41.512120 dump source = 0x0
4792 11:06:41.515650 dump params frequency:800
4793 11:06:41.518878 dump params rank number:2
4794 11:06:41.519258
4795 11:06:41.519557 dump params write leveling
4796 11:06:41.522270 write leveling[0][0][0] = 0x0
4797 11:06:41.525378 write leveling[0][0][1] = 0x0
4798 11:06:41.528506 write leveling[0][1][0] = 0x0
4799 11:06:41.531881 write leveling[0][1][1] = 0x0
4800 11:06:41.534757 write leveling[1][0][0] = 0x0
4801 11:06:41.535209 write leveling[1][0][1] = 0x0
4802 11:06:41.538503 write leveling[1][1][0] = 0x0
4803 11:06:41.541725 write leveling[1][1][1] = 0x0
4804 11:06:41.545086 dump params cbt_cs
4805 11:06:41.545590 cbt_cs[0][0] = 0x0
4806 11:06:41.548127 cbt_cs[0][1] = 0x0
4807 11:06:41.548635 cbt_cs[1][0] = 0x0
4808 11:06:41.551302 cbt_cs[1][1] = 0x0
4809 11:06:41.551808 dump params cbt_mr12
4810 11:06:41.554908 cbt_mr12[0][0] = 0x0
4811 11:06:41.555424 cbt_mr12[0][1] = 0x0
4812 11:06:41.558150 cbt_mr12[1][0] = 0x0
4813 11:06:41.561571 cbt_mr12[1][1] = 0x0
4814 11:06:41.562130 dump params tx window
4815 11:06:41.564578 tx_center_min[0][0][0] = 0
4816 11:06:41.568035 tx_center_max[0][0][0] = 0
4817 11:06:41.568463 tx_center_min[0][0][1] = 0
4818 11:06:41.571075 tx_center_max[0][0][1] = 0
4819 11:06:41.574335 tx_center_min[0][1][0] = 0
4820 11:06:41.578428 tx_center_max[0][1][0] = 0
4821 11:06:41.578935 tx_center_min[0][1][1] = 0
4822 11:06:41.580968 tx_center_max[0][1][1] = 0
4823 11:06:41.583976 tx_center_min[1][0][0] = 0
4824 11:06:41.586977 tx_center_max[1][0][0] = 0
4825 11:06:41.587452 tx_center_min[1][0][1] = 0
4826 11:06:41.590923 tx_center_max[1][0][1] = 0
4827 11:06:41.593983 tx_center_min[1][1][0] = 0
4828 11:06:41.596958 tx_center_max[1][1][0] = 0
4829 11:06:41.597348 tx_center_min[1][1][1] = 0
4830 11:06:41.600494 tx_center_max[1][1][1] = 0
4831 11:06:41.603770 dump params tx window
4832 11:06:41.606628 tx_win_center[0][0][0] = 0
4833 11:06:41.607148 tx_first_pass[0][0][0] = 0
4834 11:06:41.610126 tx_last_pass[0][0][0] = 0
4835 11:06:41.613599 tx_win_center[0][0][1] = 0
4836 11:06:41.613986 tx_first_pass[0][0][1] = 0
4837 11:06:41.616618 tx_last_pass[0][0][1] = 0
4838 11:06:41.619960 tx_win_center[0][0][2] = 0
4839 11:06:41.623347 tx_first_pass[0][0][2] = 0
4840 11:06:41.623807 tx_last_pass[0][0][2] = 0
4841 11:06:41.626677 tx_win_center[0][0][3] = 0
4842 11:06:41.630372 tx_first_pass[0][0][3] = 0
4843 11:06:41.633297 tx_last_pass[0][0][3] = 0
4844 11:06:41.633803 tx_win_center[0][0][4] = 0
4845 11:06:41.636467 tx_first_pass[0][0][4] = 0
4846 11:06:41.639378 tx_last_pass[0][0][4] = 0
4847 11:06:41.643112 tx_win_center[0][0][5] = 0
4848 11:06:41.643506 tx_first_pass[0][0][5] = 0
4849 11:06:41.645778 tx_last_pass[0][0][5] = 0
4850 11:06:41.649479 tx_win_center[0][0][6] = 0
4851 11:06:41.652955 tx_first_pass[0][0][6] = 0
4852 11:06:41.653361 tx_last_pass[0][0][6] = 0
4853 11:06:41.656138 tx_win_center[0][0][7] = 0
4854 11:06:41.659508 tx_first_pass[0][0][7] = 0
4855 11:06:41.659950 tx_last_pass[0][0][7] = 0
4856 11:06:41.662262 tx_win_center[0][0][8] = 0
4857 11:06:41.665540 tx_first_pass[0][0][8] = 0
4858 11:06:41.668648 tx_last_pass[0][0][8] = 0
4859 11:06:41.668723 tx_win_center[0][0][9] = 0
4860 11:06:41.671721 tx_first_pass[0][0][9] = 0
4861 11:06:41.674825 tx_last_pass[0][0][9] = 0
4862 11:06:41.678793 tx_win_center[0][0][10] = 0
4863 11:06:41.678868 tx_first_pass[0][0][10] = 0
4864 11:06:41.681489 tx_last_pass[0][0][10] = 0
4865 11:06:41.685476 tx_win_center[0][0][11] = 0
4866 11:06:41.688448 tx_first_pass[0][0][11] = 0
4867 11:06:41.688524 tx_last_pass[0][0][11] = 0
4868 11:06:41.691450 tx_win_center[0][0][12] = 0
4869 11:06:41.694934 tx_first_pass[0][0][12] = 0
4870 11:06:41.698274 tx_last_pass[0][0][12] = 0
4871 11:06:41.701916 tx_win_center[0][0][13] = 0
4872 11:06:41.701988 tx_first_pass[0][0][13] = 0
4873 11:06:41.704614 tx_last_pass[0][0][13] = 0
4874 11:06:41.708000 tx_win_center[0][0][14] = 0
4875 11:06:41.711092 tx_first_pass[0][0][14] = 0
4876 11:06:41.711172 tx_last_pass[0][0][14] = 0
4877 11:06:41.714215 tx_win_center[0][0][15] = 0
4878 11:06:41.717672 tx_first_pass[0][0][15] = 0
4879 11:06:41.721549 tx_last_pass[0][0][15] = 0
4880 11:06:41.721703 tx_win_center[0][1][0] = 0
4881 11:06:41.724506 tx_first_pass[0][1][0] = 0
4882 11:06:41.727661 tx_last_pass[0][1][0] = 0
4883 11:06:41.731354 tx_win_center[0][1][1] = 0
4884 11:06:41.731515 tx_first_pass[0][1][1] = 0
4885 11:06:41.734200 tx_last_pass[0][1][1] = 0
4886 11:06:41.737187 tx_win_center[0][1][2] = 0
4887 11:06:41.740525 tx_first_pass[0][1][2] = 0
4888 11:06:41.740651 tx_last_pass[0][1][2] = 0
4889 11:06:41.744396 tx_win_center[0][1][3] = 0
4890 11:06:41.747114 tx_first_pass[0][1][3] = 0
4891 11:06:41.750812 tx_last_pass[0][1][3] = 0
4892 11:06:41.751064 tx_win_center[0][1][4] = 0
4893 11:06:41.753780 tx_first_pass[0][1][4] = 0
4894 11:06:41.756933 tx_last_pass[0][1][4] = 0
4895 11:06:41.757249 tx_win_center[0][1][5] = 0
4896 11:06:41.760084 tx_first_pass[0][1][5] = 0
4897 11:06:41.763812 tx_last_pass[0][1][5] = 0
4898 11:06:41.767200 tx_win_center[0][1][6] = 0
4899 11:06:41.767557 tx_first_pass[0][1][6] = 0
4900 11:06:41.770254 tx_last_pass[0][1][6] = 0
4901 11:06:41.773592 tx_win_center[0][1][7] = 0
4902 11:06:41.776755 tx_first_pass[0][1][7] = 0
4903 11:06:41.777354 tx_last_pass[0][1][7] = 0
4904 11:06:41.780144 tx_win_center[0][1][8] = 0
4905 11:06:41.783560 tx_first_pass[0][1][8] = 0
4906 11:06:41.786423 tx_last_pass[0][1][8] = 0
4907 11:06:41.786500 tx_win_center[0][1][9] = 0
4908 11:06:41.789615 tx_first_pass[0][1][9] = 0
4909 11:06:41.792832 tx_last_pass[0][1][9] = 0
4910 11:06:41.795957 tx_win_center[0][1][10] = 0
4911 11:06:41.796071 tx_first_pass[0][1][10] = 0
4912 11:06:41.799334 tx_last_pass[0][1][10] = 0
4913 11:06:41.802537 tx_win_center[0][1][11] = 0
4914 11:06:41.805653 tx_first_pass[0][1][11] = 0
4915 11:06:41.805755 tx_last_pass[0][1][11] = 0
4916 11:06:41.809315 tx_win_center[0][1][12] = 0
4917 11:06:41.812773 tx_first_pass[0][1][12] = 0
4918 11:06:41.816351 tx_last_pass[0][1][12] = 0
4919 11:06:41.816493 tx_win_center[0][1][13] = 0
4920 11:06:41.819251 tx_first_pass[0][1][13] = 0
4921 11:06:41.822487 tx_last_pass[0][1][13] = 0
4922 11:06:41.825566 tx_win_center[0][1][14] = 0
4923 11:06:41.825786 tx_first_pass[0][1][14] = 0
4924 11:06:41.829384 tx_last_pass[0][1][14] = 0
4925 11:06:41.832149 tx_win_center[0][1][15] = 0
4926 11:06:41.835571 tx_first_pass[0][1][15] = 0
4927 11:06:41.839312 tx_last_pass[0][1][15] = 0
4928 11:06:41.839569 tx_win_center[1][0][0] = 0
4929 11:06:41.842177 tx_first_pass[1][0][0] = 0
4930 11:06:41.845322 tx_last_pass[1][0][0] = 0
4931 11:06:41.845528 tx_win_center[1][0][1] = 0
4932 11:06:41.848969 tx_first_pass[1][0][1] = 0
4933 11:06:41.852420 tx_last_pass[1][0][1] = 0
4934 11:06:41.855123 tx_win_center[1][0][2] = 0
4935 11:06:41.855436 tx_first_pass[1][0][2] = 0
4936 11:06:41.858516 tx_last_pass[1][0][2] = 0
4937 11:06:41.862382 tx_win_center[1][0][3] = 0
4938 11:06:41.865098 tx_first_pass[1][0][3] = 0
4939 11:06:41.865461 tx_last_pass[1][0][3] = 0
4940 11:06:41.868271 tx_win_center[1][0][4] = 0
4941 11:06:41.872080 tx_first_pass[1][0][4] = 0
4942 11:06:41.875319 tx_last_pass[1][0][4] = 0
4943 11:06:41.875614 tx_win_center[1][0][5] = 0
4944 11:06:41.878710 tx_first_pass[1][0][5] = 0
4945 11:06:41.881966 tx_last_pass[1][0][5] = 0
4946 11:06:41.884821 tx_win_center[1][0][6] = 0
4947 11:06:41.885214 tx_first_pass[1][0][6] = 0
4948 11:06:41.888808 tx_last_pass[1][0][6] = 0
4949 11:06:41.892107 tx_win_center[1][0][7] = 0
4950 11:06:41.892561 tx_first_pass[1][0][7] = 0
4951 11:06:41.895065 tx_last_pass[1][0][7] = 0
4952 11:06:41.898378 tx_win_center[1][0][8] = 0
4953 11:06:41.901586 tx_first_pass[1][0][8] = 0
4954 11:06:41.901967 tx_last_pass[1][0][8] = 0
4955 11:06:41.904890 tx_win_center[1][0][9] = 0
4956 11:06:41.908025 tx_first_pass[1][0][9] = 0
4957 11:06:41.910928 tx_last_pass[1][0][9] = 0
4958 11:06:41.911313 tx_win_center[1][0][10] = 0
4959 11:06:41.914513 tx_first_pass[1][0][10] = 0
4960 11:06:41.917559 tx_last_pass[1][0][10] = 0
4961 11:06:41.921501 tx_win_center[1][0][11] = 0
4962 11:06:41.921961 tx_first_pass[1][0][11] = 0
4963 11:06:41.924894 tx_last_pass[1][0][11] = 0
4964 11:06:41.927771 tx_win_center[1][0][12] = 0
4965 11:06:41.931126 tx_first_pass[1][0][12] = 0
4966 11:06:41.931511 tx_last_pass[1][0][12] = 0
4967 11:06:41.934893 tx_win_center[1][0][13] = 0
4968 11:06:41.937668 tx_first_pass[1][0][13] = 0
4969 11:06:41.940836 tx_last_pass[1][0][13] = 0
4970 11:06:41.943893 tx_win_center[1][0][14] = 0
4971 11:06:41.944278 tx_first_pass[1][0][14] = 0
4972 11:06:41.947649 tx_last_pass[1][0][14] = 0
4973 11:06:41.950883 tx_win_center[1][0][15] = 0
4974 11:06:41.954117 tx_first_pass[1][0][15] = 0
4975 11:06:41.954621 tx_last_pass[1][0][15] = 0
4976 11:06:41.957346 tx_win_center[1][1][0] = 0
4977 11:06:41.960470 tx_first_pass[1][1][0] = 0
4978 11:06:41.964006 tx_last_pass[1][1][0] = 0
4979 11:06:41.964432 tx_win_center[1][1][1] = 0
4980 11:06:41.967568 tx_first_pass[1][1][1] = 0
4981 11:06:41.970181 tx_last_pass[1][1][1] = 0
4982 11:06:41.970671 tx_win_center[1][1][2] = 0
4983 11:06:41.973615 tx_first_pass[1][1][2] = 0
4984 11:06:41.977158 tx_last_pass[1][1][2] = 0
4985 11:06:41.980165 tx_win_center[1][1][3] = 0
4986 11:06:41.980666 tx_first_pass[1][1][3] = 0
4987 11:06:41.983303 tx_last_pass[1][1][3] = 0
4988 11:06:41.986738 tx_win_center[1][1][4] = 0
4989 11:06:41.989811 tx_first_pass[1][1][4] = 0
4990 11:06:41.990446 tx_last_pass[1][1][4] = 0
4991 11:06:41.993558 tx_win_center[1][1][5] = 0
4992 11:06:41.996203 tx_first_pass[1][1][5] = 0
4993 11:06:42.000042 tx_last_pass[1][1][5] = 0
4994 11:06:42.000547 tx_win_center[1][1][6] = 0
4995 11:06:42.003135 tx_first_pass[1][1][6] = 0
4996 11:06:42.006475 tx_last_pass[1][1][6] = 0
4997 11:06:42.009685 tx_win_center[1][1][7] = 0
4998 11:06:42.010161 tx_first_pass[1][1][7] = 0
4999 11:06:42.012946 tx_last_pass[1][1][7] = 0
5000 11:06:42.016317 tx_win_center[1][1][8] = 0
5001 11:06:42.019225 tx_first_pass[1][1][8] = 0
5002 11:06:42.019654 tx_last_pass[1][1][8] = 0
5003 11:06:42.022888 tx_win_center[1][1][9] = 0
5004 11:06:42.026395 tx_first_pass[1][1][9] = 0
5005 11:06:42.026898 tx_last_pass[1][1][9] = 0
5006 11:06:42.029317 tx_win_center[1][1][10] = 0
5007 11:06:42.032517 tx_first_pass[1][1][10] = 0
5008 11:06:42.036091 tx_last_pass[1][1][10] = 0
5009 11:06:42.036592 tx_win_center[1][1][11] = 0
5010 11:06:42.038969 tx_first_pass[1][1][11] = 0
5011 11:06:42.042408 tx_last_pass[1][1][11] = 0
5012 11:06:42.046183 tx_win_center[1][1][12] = 0
5013 11:06:42.049408 tx_first_pass[1][1][12] = 0
5014 11:06:42.050041 tx_last_pass[1][1][12] = 0
5015 11:06:42.052435 tx_win_center[1][1][13] = 0
5016 11:06:42.055674 tx_first_pass[1][1][13] = 0
5017 11:06:42.059214 tx_last_pass[1][1][13] = 0
5018 11:06:42.059716 tx_win_center[1][1][14] = 0
5019 11:06:42.062132 tx_first_pass[1][1][14] = 0
5020 11:06:42.065728 tx_last_pass[1][1][14] = 0
5021 11:06:42.068744 tx_win_center[1][1][15] = 0
5022 11:06:42.069181 tx_first_pass[1][1][15] = 0
5023 11:06:42.071693 tx_last_pass[1][1][15] = 0
5024 11:06:42.074919 dump params rx window
5025 11:06:42.075343 rx_firspass[0][0][0] = 0
5026 11:06:42.078756 rx_lastpass[0][0][0] = 0
5027 11:06:42.081616 rx_firspass[0][0][1] = 0
5028 11:06:42.085021 rx_lastpass[0][0][1] = 0
5029 11:06:42.085520 rx_firspass[0][0][2] = 0
5030 11:06:42.088505 rx_lastpass[0][0][2] = 0
5031 11:06:42.091346 rx_firspass[0][0][3] = 0
5032 11:06:42.091769 rx_lastpass[0][0][3] = 0
5033 11:06:42.095197 rx_firspass[0][0][4] = 0
5034 11:06:42.098678 rx_lastpass[0][0][4] = 0
5035 11:06:42.099179 rx_firspass[0][0][5] = 0
5036 11:06:42.101951 rx_lastpass[0][0][5] = 0
5037 11:06:42.104656 rx_firspass[0][0][6] = 0
5038 11:06:42.105156 rx_lastpass[0][0][6] = 0
5039 11:06:42.107932 rx_firspass[0][0][7] = 0
5040 11:06:42.111800 rx_lastpass[0][0][7] = 0
5041 11:06:42.114735 rx_firspass[0][0][8] = 0
5042 11:06:42.115237 rx_lastpass[0][0][8] = 0
5043 11:06:42.118175 rx_firspass[0][0][9] = 0
5044 11:06:42.121015 rx_lastpass[0][0][9] = 0
5045 11:06:42.121449 rx_firspass[0][0][10] = 0
5046 11:06:42.124632 rx_lastpass[0][0][10] = 0
5047 11:06:42.128010 rx_firspass[0][0][11] = 0
5048 11:06:42.131438 rx_lastpass[0][0][11] = 0
5049 11:06:42.131952 rx_firspass[0][0][12] = 0
5050 11:06:42.134419 rx_lastpass[0][0][12] = 0
5051 11:06:42.137476 rx_firspass[0][0][13] = 0
5052 11:06:42.137912 rx_lastpass[0][0][13] = 0
5053 11:06:42.140949 rx_firspass[0][0][14] = 0
5054 11:06:42.144492 rx_lastpass[0][0][14] = 0
5055 11:06:42.148035 rx_firspass[0][0][15] = 0
5056 11:06:42.148551 rx_lastpass[0][0][15] = 0
5057 11:06:42.151356 rx_firspass[0][1][0] = 0
5058 11:06:42.154143 rx_lastpass[0][1][0] = 0
5059 11:06:42.154576 rx_firspass[0][1][1] = 0
5060 11:06:42.157463 rx_lastpass[0][1][1] = 0
5061 11:06:42.160781 rx_firspass[0][1][2] = 0
5062 11:06:42.161289 rx_lastpass[0][1][2] = 0
5063 11:06:42.163971 rx_firspass[0][1][3] = 0
5064 11:06:42.167383 rx_lastpass[0][1][3] = 0
5065 11:06:42.170764 rx_firspass[0][1][4] = 0
5066 11:06:42.171333 rx_lastpass[0][1][4] = 0
5067 11:06:42.173391 rx_firspass[0][1][5] = 0
5068 11:06:42.177195 rx_lastpass[0][1][5] = 0
5069 11:06:42.177618 rx_firspass[0][1][6] = 0
5070 11:06:42.180331 rx_lastpass[0][1][6] = 0
5071 11:06:42.183775 rx_firspass[0][1][7] = 0
5072 11:06:42.184277 rx_lastpass[0][1][7] = 0
5073 11:06:42.186607 rx_firspass[0][1][8] = 0
5074 11:06:42.190626 rx_lastpass[0][1][8] = 0
5075 11:06:42.193581 rx_firspass[0][1][9] = 0
5076 11:06:42.194140 rx_lastpass[0][1][9] = 0
5077 11:06:42.196607 rx_firspass[0][1][10] = 0
5078 11:06:42.199864 rx_lastpass[0][1][10] = 0
5079 11:06:42.200284 rx_firspass[0][1][11] = 0
5080 11:06:42.203193 rx_lastpass[0][1][11] = 0
5081 11:06:42.206696 rx_firspass[0][1][12] = 0
5082 11:06:42.209751 rx_lastpass[0][1][12] = 0
5083 11:06:42.210210 rx_firspass[0][1][13] = 0
5084 11:06:42.212962 rx_lastpass[0][1][13] = 0
5085 11:06:42.216154 rx_firspass[0][1][14] = 0
5086 11:06:42.216576 rx_lastpass[0][1][14] = 0
5087 11:06:42.219419 rx_firspass[0][1][15] = 0
5088 11:06:42.223118 rx_lastpass[0][1][15] = 0
5089 11:06:42.226245 rx_firspass[1][0][0] = 0
5090 11:06:42.226720 rx_lastpass[1][0][0] = 0
5091 11:06:42.229915 rx_firspass[1][0][1] = 0
5092 11:06:42.233227 rx_lastpass[1][0][1] = 0
5093 11:06:42.233704 rx_firspass[1][0][2] = 0
5094 11:06:42.235831 rx_lastpass[1][0][2] = 0
5095 11:06:42.239006 rx_firspass[1][0][3] = 0
5096 11:06:42.239385 rx_lastpass[1][0][3] = 0
5097 11:06:42.242686 rx_firspass[1][0][4] = 0
5098 11:06:42.246064 rx_lastpass[1][0][4] = 0
5099 11:06:42.249351 rx_firspass[1][0][5] = 0
5100 11:06:42.249807 rx_lastpass[1][0][5] = 0
5101 11:06:42.252528 rx_firspass[1][0][6] = 0
5102 11:06:42.255684 rx_lastpass[1][0][6] = 0
5103 11:06:42.256071 rx_firspass[1][0][7] = 0
5104 11:06:42.258897 rx_lastpass[1][0][7] = 0
5105 11:06:42.262305 rx_firspass[1][0][8] = 0
5106 11:06:42.262704 rx_lastpass[1][0][8] = 0
5107 11:06:42.265581 rx_firspass[1][0][9] = 0
5108 11:06:42.269263 rx_lastpass[1][0][9] = 0
5109 11:06:42.271825 rx_firspass[1][0][10] = 0
5110 11:06:42.272209 rx_lastpass[1][0][10] = 0
5111 11:06:42.275191 rx_firspass[1][0][11] = 0
5112 11:06:42.278854 rx_lastpass[1][0][11] = 0
5113 11:06:42.279319 rx_firspass[1][0][12] = 0
5114 11:06:42.281582 rx_lastpass[1][0][12] = 0
5115 11:06:42.285608 rx_firspass[1][0][13] = 0
5116 11:06:42.288361 rx_lastpass[1][0][13] = 0
5117 11:06:42.288744 rx_firspass[1][0][14] = 0
5118 11:06:42.291522 rx_lastpass[1][0][14] = 0
5119 11:06:42.295530 rx_firspass[1][0][15] = 0
5120 11:06:42.296008 rx_lastpass[1][0][15] = 0
5121 11:06:42.298227 rx_firspass[1][1][0] = 0
5122 11:06:42.301580 rx_lastpass[1][1][0] = 0
5123 11:06:42.305044 rx_firspass[1][1][1] = 0
5124 11:06:42.305520 rx_lastpass[1][1][1] = 0
5125 11:06:42.307999 rx_firspass[1][1][2] = 0
5126 11:06:42.311836 rx_lastpass[1][1][2] = 0
5127 11:06:42.312316 rx_firspass[1][1][3] = 0
5128 11:06:42.314859 rx_lastpass[1][1][3] = 0
5129 11:06:42.318001 rx_firspass[1][1][4] = 0
5130 11:06:42.318523 rx_lastpass[1][1][4] = 0
5131 11:06:42.321025 rx_firspass[1][1][5] = 0
5132 11:06:42.324552 rx_lastpass[1][1][5] = 0
5133 11:06:42.327814 rx_firspass[1][1][6] = 0
5134 11:06:42.328293 rx_lastpass[1][1][6] = 0
5135 11:06:42.331581 rx_firspass[1][1][7] = 0
5136 11:06:42.334666 rx_lastpass[1][1][7] = 0
5137 11:06:42.335142 rx_firspass[1][1][8] = 0
5138 11:06:42.337921 rx_lastpass[1][1][8] = 0
5139 11:06:42.341090 rx_firspass[1][1][9] = 0
5140 11:06:42.341570 rx_lastpass[1][1][9] = 0
5141 11:06:42.344322 rx_firspass[1][1][10] = 0
5142 11:06:42.347596 rx_lastpass[1][1][10] = 0
5143 11:06:42.350876 rx_firspass[1][1][11] = 0
5144 11:06:42.351363 rx_lastpass[1][1][11] = 0
5145 11:06:42.354713 rx_firspass[1][1][12] = 0
5146 11:06:42.357552 rx_lastpass[1][1][12] = 0
5147 11:06:42.358068 rx_firspass[1][1][13] = 0
5148 11:06:42.361281 rx_lastpass[1][1][13] = 0
5149 11:06:42.364429 rx_firspass[1][1][14] = 0
5150 11:06:42.368042 rx_lastpass[1][1][14] = 0
5151 11:06:42.368518 rx_firspass[1][1][15] = 0
5152 11:06:42.370498 rx_lastpass[1][1][15] = 0
5153 11:06:42.373699 dump params clk_delay
5154 11:06:42.374135 clk_delay[0] = 0
5155 11:06:42.377064 clk_delay[1] = 0
5156 11:06:42.377416 dump params dqs_delay
5157 11:06:42.380797 dqs_delay[0][0] = 0
5158 11:06:42.381290 dqs_delay[0][1] = 0
5159 11:06:42.383784 dqs_delay[1][0] = 0
5160 11:06:42.384178 dqs_delay[1][1] = 0
5161 11:06:42.387221 dump params delay_cell_unit = 753
5162 11:06:42.390281 mt_set_emi_preloader end
5163 11:06:42.393729 [mt_mem_init] dram size: 0x100000000, rank number: 2
5164 11:06:42.400415 [complex_mem_test] start addr:0x40000000, len:20480
5165 11:06:42.436080 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5166 11:06:42.442682 [complex_mem_test] start addr:0x80000000, len:20480
5167 11:06:42.478678 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5168 11:06:42.485474 [complex_mem_test] start addr:0xc0000000, len:20480
5169 11:06:42.521222 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5170 11:06:42.527670 [complex_mem_test] start addr:0x56000000, len:8192
5171 11:06:42.544313 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5172 11:06:42.548215 ddr_geometry:1
5173 11:06:42.550684 [complex_mem_test] start addr:0x80000000, len:8192
5174 11:06:42.568320 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5175 11:06:42.571213 dram_init: dram init end (result: 0)
5176 11:06:42.578427 Successfully loaded DRAM blobs and ran DRAM calibration
5177 11:06:42.587938 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5178 11:06:42.588475 CBMEM:
5179 11:06:42.590918 IMD: root @ 00000000fffff000 254 entries.
5180 11:06:42.593740 IMD: root @ 00000000ffffec00 62 entries.
5181 11:06:42.600848 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5182 11:06:42.607257 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5183 11:06:42.610608 in-header: 03 a1 00 00 08 00 00 00
5184 11:06:42.613743 in-data: 84 60 60 10 00 00 00 00
5185 11:06:42.616948 Chrome EC: clear events_b mask to 0x0000000020004000
5186 11:06:42.623880 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5187 11:06:42.627542 in-header: 03 fd 00 00 00 00 00 00
5188 11:06:42.631351 in-data:
5189 11:06:42.634430 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5190 11:06:42.637921 CBFS @ 21000 size 3d4000
5191 11:06:42.640977 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5192 11:06:42.644350 CBFS: Locating 'fallback/ramstage'
5193 11:06:42.647772 CBFS: Found @ offset 10d40 size d563
5194 11:06:42.670064 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5195 11:06:42.681994 Accumulated console time in romstage 13554 ms
5196 11:06:42.682555
5197 11:06:42.682993
5198 11:06:42.692169 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5199 11:06:42.694933 ARM64: Exception handlers installed.
5200 11:06:42.695422 ARM64: Testing exception
5201 11:06:42.698046 ARM64: Done test exception
5202 11:06:42.701732 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5203 11:06:42.704922 Manufacturer: ef
5204 11:06:42.711234 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5205 11:06:42.714421 WARNING: RO_VPD is uninitialized or empty.
5206 11:06:42.718050 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5207 11:06:42.721022 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5208 11:06:42.731434 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5209 11:06:42.735402 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5210 11:06:42.741225 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5211 11:06:42.741674 Enumerating buses...
5212 11:06:42.748254 Show all devs... Before device enumeration.
5213 11:06:42.748772 Root Device: enabled 1
5214 11:06:42.751511 CPU_CLUSTER: 0: enabled 1
5215 11:06:42.752028 CPU: 00: enabled 1
5216 11:06:42.754571 Compare with tree...
5217 11:06:42.757926 Root Device: enabled 1
5218 11:06:42.758485 CPU_CLUSTER: 0: enabled 1
5219 11:06:42.761456 CPU: 00: enabled 1
5220 11:06:42.765057 Root Device scanning...
5221 11:06:42.767739 root_dev_scan_bus for Root Device
5222 11:06:42.768244 CPU_CLUSTER: 0 enabled
5223 11:06:42.770619 root_dev_scan_bus for Root Device done
5224 11:06:42.777745 scan_bus: scanning of bus Root Device took 10689 usecs
5225 11:06:42.778277 done
5226 11:06:42.780580 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5227 11:06:42.783916 Allocating resources...
5228 11:06:42.787494 Reading resources...
5229 11:06:42.790371 Root Device read_resources bus 0 link: 0
5230 11:06:42.794172 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5231 11:06:42.796919 CPU: 00 missing read_resources
5232 11:06:42.800480 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5233 11:06:42.804159 Root Device read_resources bus 0 link: 0 done
5234 11:06:42.806946 Done reading resources.
5235 11:06:42.810001 Show resources in subtree (Root Device)...After reading.
5236 11:06:42.816582 Root Device child on link 0 CPU_CLUSTER: 0
5237 11:06:42.819477 CPU_CLUSTER: 0 child on link 0 CPU: 00
5238 11:06:42.825829 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5239 11:06:42.829485 CPU: 00
5240 11:06:42.829561 Setting resources...
5241 11:06:42.835716 Root Device assign_resources, bus 0 link: 0
5242 11:06:42.839061 CPU_CLUSTER: 0 missing set_resources
5243 11:06:42.842311 Root Device assign_resources, bus 0 link: 0
5244 11:06:42.842391 Done setting resources.
5245 11:06:42.849026 Show resources in subtree (Root Device)...After assigning values.
5246 11:06:42.852728 Root Device child on link 0 CPU_CLUSTER: 0
5247 11:06:42.855762 CPU_CLUSTER: 0 child on link 0 CPU: 00
5248 11:06:42.865366 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5249 11:06:42.865446 CPU: 00
5250 11:06:42.868702 Done allocating resources.
5251 11:06:42.875411 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5252 11:06:42.875503 Enabling resources...
5253 11:06:42.875592 done.
5254 11:06:42.882244 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5255 11:06:42.882351 Initializing devices...
5256 11:06:42.885645 Root Device init ...
5257 11:06:42.888681 mainboard_init: Starting display init.
5258 11:06:42.891902 ADC[4]: Raw value=75908 ID=0
5259 11:06:42.914194 anx7625_power_on_init: Init interface.
5260 11:06:42.917899 anx7625_disable_pd_protocol: Disabled PD feature.
5261 11:06:42.923827 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5262 11:06:42.971374 anx7625_start_dp_work: Secure OCM version=00
5263 11:06:42.974554 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5264 11:06:42.991698 sp_tx_get_edid_block: EDID Block = 1
5265 11:06:43.109146 Extracted contents:
5266 11:06:43.112343 header: 00 ff ff ff ff ff ff 00
5267 11:06:43.115603 serial number: 06 af 5c 14 00 00 00 00 00 1a
5268 11:06:43.118475 version: 01 04
5269 11:06:43.121796 basic params: 95 1a 0e 78 02
5270 11:06:43.124911 chroma info: 99 85 95 55 56 92 28 22 50 54
5271 11:06:43.128811 established: 00 00 00
5272 11:06:43.135306 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5273 11:06:43.141687 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5274 11:06:43.144810 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5275 11:06:43.151405 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5276 11:06:43.157837 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5277 11:06:43.161302 extensions: 00
5278 11:06:43.161725 checksum: ae
5279 11:06:43.162105
5280 11:06:43.167698 Manufacturer: AUO Model 145c Serial Number 0
5281 11:06:43.168198 Made week 0 of 2016
5282 11:06:43.171158 EDID version: 1.4
5283 11:06:43.171751 Digital display
5284 11:06:43.174383 6 bits per primary color channel
5285 11:06:43.177955 DisplayPort interface
5286 11:06:43.180956 Maximum image size: 26 cm x 14 cm
5287 11:06:43.181447 Gamma: 220%
5288 11:06:43.181777 Check DPMS levels
5289 11:06:43.184224 Supported color formats: RGB 4:4:4
5290 11:06:43.187679 First detailed timing is preferred timing
5291 11:06:43.190542 Established timings supported:
5292 11:06:43.193648 Standard timings supported:
5293 11:06:43.196853 Detailed timings
5294 11:06:43.200898 Hex of detail: ce1d56ea50001a3030204600009010000018
5295 11:06:43.203744 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5296 11:06:43.210538 0556 0586 05a6 0640 hborder 0
5297 11:06:43.213804 0300 0304 030a 031a vborder 0
5298 11:06:43.216749 -hsync -vsync
5299 11:06:43.217175 Did detailed timing
5300 11:06:43.223550 Hex of detail: 0000000f0000000000000000000000000020
5301 11:06:43.227023 Manufacturer-specified data, tag 15
5302 11:06:43.229841 Hex of detail: 000000fe0041554f0a202020202020202020
5303 11:06:43.230309 ASCII string: AUO
5304 11:06:43.236276 Hex of detail: 000000fe004231313658414230312e34200a
5305 11:06:43.239601 ASCII string: B116XAB01.4
5306 11:06:43.240104 Checksum
5307 11:06:43.243026 Checksum: 0xae (valid)
5308 11:06:43.246995 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5309 11:06:43.250103 DSI data_rate: 457800000 bps
5310 11:06:43.256615 anx7625_parse_edid: set default k value to 0x3d for panel
5311 11:06:43.259799 anx7625_parse_edid: pixelclock(76300).
5312 11:06:43.263073 hactive(1366), hsync(32), hfp(48), hbp(154)
5313 11:06:43.266412 vactive(768), vsync(6), vfp(4), vbp(16)
5314 11:06:43.269524 anx7625_dsi_config: config dsi.
5315 11:06:43.277224 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5316 11:06:43.297897 anx7625_dsi_config: success to config DSI
5317 11:06:43.301266 anx7625_dp_start: MIPI phy setup OK.
5318 11:06:43.304745 [SSUSB] Setting up USB HOST controller...
5319 11:06:43.308487 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5320 11:06:43.311304 [SSUSB] phy power-on done.
5321 11:06:43.315469 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5322 11:06:43.318572 in-header: 03 fc 01 00 00 00 00 00
5323 11:06:43.318997 in-data:
5324 11:06:43.325059 handle_proto3_response: EC response with error code: 1
5325 11:06:43.325557 SPM: pcm index = 1
5326 11:06:43.328574 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5327 11:06:43.331993 CBFS @ 21000 size 3d4000
5328 11:06:43.338317 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5329 11:06:43.341352 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5330 11:06:43.344674 CBFS: Found @ offset 1e7c0 size 1026
5331 11:06:43.351243 read SPI 0x3f808 0x1026: 1270 us, 3255 KB/s, 26.040 Mbps
5332 11:06:43.354751 SPM: binary array size = 2988
5333 11:06:43.357849 SPM: version = pcm_allinone_v1.17.2_20180829
5334 11:06:43.360828 SPM binary loaded in 32 msecs
5335 11:06:43.369278 spm_kick_im_to_fetch: ptr = 000000004021eec2
5336 11:06:43.372718 spm_kick_im_to_fetch: len = 2988
5337 11:06:43.373141 SPM: spm_kick_pcm_to_run
5338 11:06:43.375710 SPM: spm_kick_pcm_to_run done
5339 11:06:43.378999 SPM: spm_init done in 52 msecs
5340 11:06:43.382557 Root Device init finished in 494997 usecs
5341 11:06:43.385546 CPU_CLUSTER: 0 init ...
5342 11:06:43.395376 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5343 11:06:43.398504 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5344 11:06:43.401939 CBFS @ 21000 size 3d4000
5345 11:06:43.405556 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5346 11:06:43.408562 CBFS: Locating 'sspm.bin'
5347 11:06:43.411671 CBFS: Found @ offset 208c0 size 41cb
5348 11:06:43.422799 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5349 11:06:43.430135 CPU_CLUSTER: 0 init finished in 42804 usecs
5350 11:06:43.430634 Devices initialized
5351 11:06:43.433379 Show all devs... After init.
5352 11:06:43.436976 Root Device: enabled 1
5353 11:06:43.437516 CPU_CLUSTER: 0: enabled 1
5354 11:06:43.440016 CPU: 00: enabled 1
5355 11:06:43.443366 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5356 11:06:43.449995 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5357 11:06:43.453247 ELOG: NV offset 0x558000 size 0x1000
5358 11:06:43.456692 read SPI 0x558000 0x1000: 1263 us, 3243 KB/s, 25.944 Mbps
5359 11:06:43.463226 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5360 11:06:43.469494 ELOG: Event(17) added with size 13 at 2024-07-10 11:06:28 UTC
5361 11:06:43.472901 out: cmd=0x121: 03 db 21 01 00 00 00 00
5362 11:06:43.475731 in-header: 03 51 00 00 2c 00 00 00
5363 11:06:43.489123 in-data: fd 4a 00 00 00 00 00 00 02 10 00 00 06 80 00 00 be bb 01 00 06 80 00 00 1f 46 61 00 06 80 00 00 79 a0 01 00 06 80 00 00 43 70 02 00
5364 11:06:43.492278 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5365 11:06:43.495754 in-header: 03 19 00 00 08 00 00 00
5366 11:06:43.499402 in-data: a2 e0 47 00 13 00 00 00
5367 11:06:43.502178 Chrome EC: UHEPI supported
5368 11:06:43.509067 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5369 11:06:43.512195 in-header: 03 e1 00 00 08 00 00 00
5370 11:06:43.515610 in-data: 84 20 60 10 00 00 00 00
5371 11:06:43.518737 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5372 11:06:43.525543 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5373 11:06:43.528767 in-header: 03 e1 00 00 08 00 00 00
5374 11:06:43.532013 in-data: 84 20 60 10 00 00 00 00
5375 11:06:43.534899 ELOG: Event(A1) added with size 10 at 2024-07-10 11:06:28 UTC
5376 11:06:43.545121 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5377 11:06:43.548067 ELOG: Event(A0) added with size 9 at 2024-07-10 11:06:28 UTC
5378 11:06:43.552236 elog_add_boot_reason: Logged dev mode boot
5379 11:06:43.554756 Finalize devices...
5380 11:06:43.555255 Devices finalized
5381 11:06:43.561667 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5382 11:06:43.564460 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5383 11:06:43.571121 ELOG: Event(91) added with size 10 at 2024-07-10 11:06:28 UTC
5384 11:06:43.574634 Writing coreboot table at 0xffeda000
5385 11:06:43.578398 0. 0000000000114000-000000000011efff: RAMSTAGE
5386 11:06:43.584624 1. 0000000040000000-000000004023cfff: RAMSTAGE
5387 11:06:43.587920 2. 000000004023d000-00000000545fffff: RAM
5388 11:06:43.590981 3. 0000000054600000-000000005465ffff: BL31
5389 11:06:43.594275 4. 0000000054660000-00000000ffed9fff: RAM
5390 11:06:43.601459 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5391 11:06:43.604056 6. 0000000100000000-000000013fffffff: RAM
5392 11:06:43.608061 Passing 5 GPIOs to payload:
5393 11:06:43.611104 NAME | PORT | POLARITY | VALUE
5394 11:06:43.613790 write protect | 0x00000096 | low | high
5395 11:06:43.620430 EC in RW | 0x000000b1 | high | undefined
5396 11:06:43.623970 EC interrupt | 0x00000097 | low | undefined
5397 11:06:43.630538 TPM interrupt | 0x00000099 | high | undefined
5398 11:06:43.634297 speaker enable | 0x000000af | high | undefined
5399 11:06:43.637152 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5400 11:06:43.640073 in-header: 03 f7 00 00 02 00 00 00
5401 11:06:43.643911 in-data: 04 00
5402 11:06:43.644331 Board ID: 4
5403 11:06:43.646989 ADC[3]: Raw value=213471 ID=1
5404 11:06:43.647563 RAM code: 1
5405 11:06:43.648067 SKU ID: 16
5406 11:06:43.653871 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5407 11:06:43.654376 CBFS @ 21000 size 3d4000
5408 11:06:43.660118 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5409 11:06:43.666581 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 9629
5410 11:06:43.669812 coreboot table: 940 bytes.
5411 11:06:43.673434 IMD ROOT 0. 00000000fffff000 00001000
5412 11:06:43.676680 IMD SMALL 1. 00000000ffffe000 00001000
5413 11:06:43.679865 CONSOLE 2. 00000000fffde000 00020000
5414 11:06:43.682989 FMAP 3. 00000000fffdd000 0000047c
5415 11:06:43.686408 TIME STAMP 4. 00000000fffdc000 00000910
5416 11:06:43.689905 RAMOOPS 5. 00000000ffedc000 00100000
5417 11:06:43.693228 COREBOOT 6. 00000000ffeda000 00002000
5418 11:06:43.695986 IMD small region:
5419 11:06:43.699512 IMD ROOT 0. 00000000ffffec00 00000400
5420 11:06:43.702957 VBOOT WORK 1. 00000000ffffeb00 00000100
5421 11:06:43.706216 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5422 11:06:43.712865 VPD 3. 00000000ffffea60 0000006c
5423 11:06:43.715967 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5424 11:06:43.722646 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5425 11:06:43.726111 in-header: 03 e1 00 00 08 00 00 00
5426 11:06:43.728784 in-data: 84 20 60 10 00 00 00 00
5427 11:06:43.732612 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5428 11:06:43.735280 CBFS @ 21000 size 3d4000
5429 11:06:43.741877 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5430 11:06:43.745189 CBFS: Locating 'fallback/payload'
5431 11:06:43.752446 CBFS: Found @ offset dc040 size 439a0
5432 11:06:43.839877 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5433 11:06:43.843078 Checking segment from ROM address 0x0000000040003a00
5434 11:06:43.850109 Checking segment from ROM address 0x0000000040003a1c
5435 11:06:43.852911 Loading segment from ROM address 0x0000000040003a00
5436 11:06:43.856818 code (compression=0)
5437 11:06:43.865959 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5438 11:06:43.872998 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5439 11:06:43.875769 it's not compressed!
5440 11:06:43.879401 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5441 11:06:43.885995 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5442 11:06:43.893934 Loading segment from ROM address 0x0000000040003a1c
5443 11:06:43.897534 Entry Point 0x0000000080000000
5444 11:06:43.898068 Loaded segments
5445 11:06:43.904761 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5446 11:06:43.906979 Jumping to boot code at 0000000080000000(00000000ffeda000)
5447 11:06:43.916776 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5448 11:06:43.920212 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5449 11:06:43.924120 CBFS @ 21000 size 3d4000
5450 11:06:43.930665 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5451 11:06:43.933508 CBFS: Locating 'fallback/bl31'
5452 11:06:43.937164 CBFS: Found @ offset 36dc0 size 5820
5453 11:06:43.947784 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5454 11:06:43.951672 Checking segment from ROM address 0x0000000040003a00
5455 11:06:43.957331 Checking segment from ROM address 0x0000000040003a1c
5456 11:06:43.960434 Loading segment from ROM address 0x0000000040003a00
5457 11:06:43.964278 code (compression=1)
5458 11:06:43.974493 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5459 11:06:43.980459 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5460 11:06:43.980565 using LZMA
5461 11:06:43.989763 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5462 11:06:43.995668 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5463 11:06:43.998856 Loading segment from ROM address 0x0000000040003a1c
5464 11:06:44.002541 Entry Point 0x0000000054601000
5465 11:06:44.002624 Loaded segments
5466 11:06:44.005415 NOTICE: MT8183 bl31_setup
5467 11:06:44.012941 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5468 11:06:44.016307 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5469 11:06:44.019528 INFO: [DEVAPC] dump DEVAPC registers:
5470 11:06:44.029346 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5471 11:06:44.036361 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5472 11:06:44.045997 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5473 11:06:44.052971 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5474 11:06:44.062442 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5475 11:06:44.069386 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5476 11:06:44.078867 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5477 11:06:44.085143 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5478 11:06:44.095465 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5479 11:06:44.102128 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5480 11:06:44.111352 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5481 11:06:44.118398 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5482 11:06:44.128038 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5483 11:06:44.134530 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5484 11:06:44.141144 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5485 11:06:44.147673 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5486 11:06:44.157708 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5487 11:06:44.164200 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5488 11:06:44.171001 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5489 11:06:44.176921 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5490 11:06:44.186730 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5491 11:06:44.193219 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5492 11:06:44.196586 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5493 11:06:44.200215 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5494 11:06:44.203463 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5495 11:06:44.206856 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5496 11:06:44.209861 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5497 11:06:44.216479 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5498 11:06:44.219564 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5499 11:06:44.223713 WARNING: region 0:
5500 11:06:44.226715 WARNING: apc:0x168, sa:0x0, ea:0xfff
5501 11:06:44.227022 WARNING: region 1:
5502 11:06:44.233439 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5503 11:06:44.233926 WARNING: region 2:
5504 11:06:44.236619 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5505 11:06:44.239756 WARNING: region 3:
5506 11:06:44.243177 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5507 11:06:44.243570 WARNING: region 4:
5508 11:06:44.249472 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5509 11:06:44.249571 WARNING: region 5:
5510 11:06:44.252884 WARNING: apc:0x0, sa:0x0, ea:0x0
5511 11:06:44.255493 WARNING: region 6:
5512 11:06:44.255568 WARNING: apc:0x0, sa:0x0, ea:0x0
5513 11:06:44.259347 WARNING: region 7:
5514 11:06:44.262251 WARNING: apc:0x0, sa:0x0, ea:0x0
5515 11:06:44.269475 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5516 11:06:44.272539 INFO: SPM: enable SPMC mode
5517 11:06:44.275558 NOTICE: spm_boot_init() start
5518 11:06:44.278723 NOTICE: spm_boot_init() end
5519 11:06:44.281908 INFO: BL31: Initializing runtime services
5520 11:06:44.288527 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5521 11:06:44.292272 INFO: BL31: Preparing for EL3 exit to normal world
5522 11:06:44.295166 INFO: Entry point address = 0x80000000
5523 11:06:44.298523 INFO: SPSR = 0x8
5524 11:06:44.320418
5525 11:06:44.320559
5526 11:06:44.320668
5527 11:06:44.321336 end: 2.2.3 depthcharge-start (duration 00:00:24) [common]
5528 11:06:44.321503 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5529 11:06:44.321637 Setting prompt string to ['jacuzzi:']
5530 11:06:44.321757 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5531 11:06:44.323409 Starting depthcharge on Juniper...
5532 11:06:44.323573
5533 11:06:44.326363 vboot_handoff: creating legacy vboot_handoff structure
5534 11:06:44.326595
5535 11:06:44.329419 ec_init(0): CrosEC protocol v3 supported (544, 544)
5536 11:06:44.332980
5537 11:06:44.333204 Wipe memory regions:
5538 11:06:44.333447
5539 11:06:44.335971 [0x00000040000000, 0x00000054600000)
5540 11:06:44.379136
5541 11:06:44.379417 [0x00000054660000, 0x00000080000000)
5542 11:06:44.471077
5543 11:06:44.471579 [0x000000811994a0, 0x000000ffeda000)
5544 11:06:44.731009
5545 11:06:44.731494 [0x00000100000000, 0x00000140000000)
5546 11:06:44.864378
5547 11:06:44.866991 Initializing XHCI USB controller at 0x11200000.
5548 11:06:44.890484
5549 11:06:44.893459 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5550 11:06:44.893959
5551 11:06:44.894363
5552 11:06:44.895069 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5553 11:06:44.895500 Sending line: 'tftpboot 192.168.201.1 14786844/tftp-deploy-au1nb48_/kernel/image.itb 14786844/tftp-deploy-au1nb48_/kernel/cmdline '
5555 11:06:44.997215 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5556 11:06:44.997860 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5557 11:06:45.002196 jacuzzi: tftpboot 192.168.201.1 14786844/tftp-deploy-au1nb48_/kernel/image.ittp-deploy-au1nb48_/kernel/cmdline
5558 11:06:45.002730
5559 11:06:45.003091 Waiting for link
5560 11:06:45.404166
5561 11:06:45.404660 R8152: Initializing
5562 11:06:45.404994
5563 11:06:45.407294 Version 9 (ocp_data = 6010)
5564 11:06:45.407738
5565 11:06:45.410699 R8152: Done initializing
5566 11:06:45.411138
5567 11:06:45.411575 Adding net device
5568 11:06:45.796282
5569 11:06:45.796473 done.
5570 11:06:45.796631
5571 11:06:45.796772 MAC: 00:e0:4c:72:3d:a6
5572 11:06:45.796918
5573 11:06:45.799221 Sending DHCP discover... done.
5574 11:06:45.799372
5575 11:06:45.802062 Waiting for reply... done.
5576 11:06:45.802206
5577 11:06:45.805596 Sending DHCP request... done.
5578 11:06:45.805760
5579 11:06:45.809251 Waiting for reply... done.
5580 11:06:45.809414
5581 11:06:45.809576 My ip is 192.168.201.20
5582 11:06:45.809768
5583 11:06:45.812786 The DHCP server ip is 192.168.201.1
5584 11:06:45.813022
5585 11:06:45.819479 TFTP server IP predefined by user: 192.168.201.1
5586 11:06:45.819787
5587 11:06:45.826176 Bootfile predefined by user: 14786844/tftp-deploy-au1nb48_/kernel/image.itb
5588 11:06:45.826769
5589 11:06:45.828978 Sending tftp read request... done.
5590 11:06:45.829440
5591 11:06:45.836075 Waiting for the transfer...
5592 11:06:45.836501
5593 11:06:46.132932 00000000 ################################################################
5594 11:06:46.133059
5595 11:06:46.394970 00080000 ################################################################
5596 11:06:46.395094
5597 11:06:46.657272 00100000 ################################################################
5598 11:06:46.657399
5599 11:06:46.919992 00180000 ################################################################
5600 11:06:46.920138
5601 11:06:47.188451 00200000 ################################################################
5602 11:06:47.188572
5603 11:06:47.496458 00280000 ################################################################
5604 11:06:47.496576
5605 11:06:47.764740 00300000 ################################################################
5606 11:06:47.764893
5607 11:06:48.029424 00380000 ################################################################
5608 11:06:48.029572
5609 11:06:48.311107 00400000 ################################################################
5610 11:06:48.311254
5611 11:06:48.609923 00480000 ################################################################
5612 11:06:48.610093
5613 11:06:48.912659 00500000 ################################################################
5614 11:06:48.912798
5615 11:06:49.191057 00580000 ################################################################
5616 11:06:49.191171
5617 11:06:49.491241 00600000 ################################################################
5618 11:06:49.491363
5619 11:06:49.801072 00680000 ################################################################
5620 11:06:49.801222
5621 11:06:50.108781 00700000 ################################################################
5622 11:06:50.108907
5623 11:06:50.411516 00780000 ################################################################
5624 11:06:50.411635
5625 11:06:50.718399 00800000 ################################################################
5626 11:06:50.718523
5627 11:06:51.022639 00880000 ################################################################
5628 11:06:51.022759
5629 11:06:51.329279 00900000 ################################################################
5630 11:06:51.329410
5631 11:06:51.632079 00980000 ################################################################
5632 11:06:51.632196
5633 11:06:51.938153 00a00000 ################################################################
5634 11:06:51.938266
5635 11:06:52.245971 00a80000 ################################################################
5636 11:06:52.246108
5637 11:06:52.543413 00b00000 ################################################################
5638 11:06:52.543525
5639 11:06:52.816047 00b80000 ################################################################
5640 11:06:52.816162
5641 11:06:53.085925 00c00000 ################################################################
5642 11:06:53.086099
5643 11:06:53.359071 00c80000 ################################################################
5644 11:06:53.359186
5645 11:06:53.624814 00d00000 ################################################################
5646 11:06:53.624925
5647 11:06:53.897756 00d80000 ################################################################
5648 11:06:53.897869
5649 11:06:54.164330 00e00000 ################################################################
5650 11:06:54.164465
5651 11:06:54.438826 00e80000 ################################################################
5652 11:06:54.438937
5653 11:06:54.708768 00f00000 ################################################################
5654 11:06:54.708884
5655 11:06:54.970476 00f80000 ################################################################
5656 11:06:54.970621
5657 11:06:55.235402 01000000 ################################################################
5658 11:06:55.235553
5659 11:06:55.499474 01080000 ################################################################
5660 11:06:55.499589
5661 11:06:55.772563 01100000 ################################################################
5662 11:06:55.772719
5663 11:06:56.057638 01180000 ################################################################
5664 11:06:56.057759
5665 11:06:56.324573 01200000 ################################################################
5666 11:06:56.324707
5667 11:06:56.596718 01280000 ################################################################
5668 11:06:56.596839
5669 11:06:56.904823 01300000 ################################################################
5670 11:06:56.904954
5671 11:06:57.194876 01380000 ################################################################
5672 11:06:57.195002
5673 11:06:57.466704 01400000 ################################################################
5674 11:06:57.466830
5675 11:06:57.757198 01480000 ################################################################
5676 11:06:57.757326
5677 11:06:58.061236 01500000 ################################################################
5678 11:06:58.061364
5679 11:06:58.353648 01580000 ################################################################
5680 11:06:58.353772
5681 11:06:58.645778 01600000 ################################################################
5682 11:06:58.645903
5683 11:06:58.932939 01680000 ################################################################
5684 11:06:58.933070
5685 11:06:59.221783 01700000 ################################################################
5686 11:06:59.221927
5687 11:06:59.507665 01780000 ################################################################
5688 11:06:59.507815
5689 11:06:59.785937 01800000 ################################################################
5690 11:06:59.786109
5691 11:07:00.047477 01880000 ################################################################
5692 11:07:00.047605
5693 11:07:00.306765 01900000 ################################################################
5694 11:07:00.306893
5695 11:07:00.574255 01980000 ################################################################
5696 11:07:00.574384
5697 11:07:00.851388 01a00000 ################################################################
5698 11:07:00.851521
5699 11:07:01.115620 01a80000 ################################################################
5700 11:07:01.115754
5701 11:07:01.391121 01b00000 ################################################################
5702 11:07:01.391250
5703 11:07:01.653614 01b80000 ################################################################
5704 11:07:01.653756
5705 11:07:01.932085 01c00000 ################################################################
5706 11:07:01.932226
5707 11:07:02.216987 01c80000 ################################################################
5708 11:07:02.217120
5709 11:07:02.507560 01d00000 ################################################################
5710 11:07:02.507690
5711 11:07:02.769307 01d80000 ################################################################
5712 11:07:02.769491
5713 11:07:02.992773 01e00000 ##################################################### done.
5714 11:07:02.992903
5715 11:07:02.995511 The bootfile was 31883382 bytes long.
5716 11:07:02.995585
5717 11:07:02.999102 Sending tftp read request... done.
5718 11:07:02.999190
5719 11:07:02.999249 Waiting for the transfer...
5720 11:07:03.002529
5721 11:07:03.002613 00000000 # done.
5722 11:07:03.002674
5723 11:07:03.008862 Command line loaded dynamically from TFTP file: 14786844/tftp-deploy-au1nb48_/kernel/cmdline
5724 11:07:03.008955
5725 11:07:03.035117 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14786844/extract-nfsrootfs-orzksr3v,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5726 11:07:03.035251
5727 11:07:03.038158 Loading FIT.
5728 11:07:03.038233
5729 11:07:03.038307 Image ramdisk-1 has 18707388 bytes.
5730 11:07:03.042243
5731 11:07:03.042340 Image fdt-1 has 57695 bytes.
5732 11:07:03.042428
5733 11:07:03.044876 Image kernel-1 has 13116259 bytes.
5734 11:07:03.044969
5735 11:07:03.054849 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5736 11:07:03.054953
5737 11:07:03.068309 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5738 11:07:03.068431
5739 11:07:03.071431 Choosing best match conf-1 for compat google,juniper-sku16.
5740 11:07:03.075747
5741 11:07:03.080865 Connected to device vid:did:rid of 1ae0:0028:00
5742 11:07:03.087458
5743 11:07:03.090796 tpm_get_response: command 0x17b, return code 0x0
5744 11:07:03.090879
5745 11:07:03.093854 tpm_cleanup: add release locality here.
5746 11:07:03.093996
5747 11:07:03.097397 Shutting down all USB controllers.
5748 11:07:03.097500
5749 11:07:03.100707 Removing current net device
5750 11:07:03.100777
5751 11:07:03.103986 Exiting depthcharge with code 4 at timestamp: 35938979
5752 11:07:03.104064
5753 11:07:03.110301 LZMA decompressing kernel-1 to 0x80193568
5754 11:07:03.110398
5755 11:07:03.113442 LZMA decompressing kernel-1 to 0x40000000
5756 11:07:04.977489
5757 11:07:04.977735 jumping to kernel
5758 11:07:04.978298 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
5759 11:07:04.978395 start: 2.2.5 auto-login-action (timeout 00:04:06) [common]
5760 11:07:04.978465 Setting prompt string to ['Linux version [0-9]']
5761 11:07:04.978528 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5762 11:07:04.978595 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5763 11:07:05.052312
5764 11:07:05.055418 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5765 11:07:05.058851 start: 2.2.5.1 login-action (timeout 00:04:06) [common]
5766 11:07:05.058977 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5767 11:07:05.059075 Setting prompt string to []
5768 11:07:05.059180 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5769 11:07:05.059277 Using line separator: #'\n'#
5770 11:07:05.059360 No login prompt set.
5771 11:07:05.059445 Parsing kernel messages
5772 11:07:05.059525 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5773 11:07:05.059690 [login-action] Waiting for messages, (timeout 00:04:06)
5774 11:07:05.059777 Waiting using forced prompt support (timeout 00:02:03)
5775 11:07:05.078300 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j261272-arm64-gcc-12-defconfig-arm64-chromebook-bgdbp) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Wed Jul 10 10:43:20 UTC 2024
5776 11:07:05.082279 [ 0.000000] random: crng init done
5777 11:07:05.085019 [ 0.000000] Machine model: Google juniper sku16 board
5778 11:07:05.088108 [ 0.000000] efi: UEFI not found.
5779 11:07:05.098302 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5780 11:07:05.104502 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5781 11:07:05.114871 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5782 11:07:05.117950 [ 0.000000] printk: bootconsole [mtk8250] enabled
5783 11:07:05.125904 [ 0.000000] NUMA: No NUMA configuration found
5784 11:07:05.132735 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5785 11:07:05.139227 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5786 11:07:05.139364 [ 0.000000] Zone ranges:
5787 11:07:05.145827 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5788 11:07:05.149040 [ 0.000000] DMA32 empty
5789 11:07:05.155297 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5790 11:07:05.158694 [ 0.000000] Movable zone start for each node
5791 11:07:05.162420 [ 0.000000] Early memory node ranges
5792 11:07:05.168873 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5793 11:07:05.175420 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5794 11:07:05.181970 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5795 11:07:05.188513 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5796 11:07:05.195259 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5797 11:07:05.201352 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5798 11:07:05.222635 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5799 11:07:05.229317 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5800 11:07:05.235755 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5801 11:07:05.239126 [ 0.000000] psci: probing for conduit method from DT.
5802 11:07:05.245636 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5803 11:07:05.249045 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5804 11:07:05.255497 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5805 11:07:05.258932 [ 0.000000] psci: SMC Calling Convention v1.1
5806 11:07:05.265273 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5807 11:07:05.268806 [ 0.000000] Detected VIPT I-cache on CPU0
5808 11:07:05.275656 [ 0.000000] CPU features: detected: GIC system register CPU interface
5809 11:07:05.282038 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5810 11:07:05.288623 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5811 11:07:05.295431 [ 0.000000] CPU features: detected: ARM erratum 845719
5812 11:07:05.299181 [ 0.000000] alternatives: applying boot alternatives
5813 11:07:05.304988 [ 0.000000] Fallback order for Node 0: 0
5814 11:07:05.311321 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5815 11:07:05.314924 [ 0.000000] Policy zone: Normal
5816 11:07:05.340903 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14786844/extract-nfsrootfs-orzksr3v,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5817 11:07:05.354285 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5818 11:07:05.360369 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5819 11:07:05.370350 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5820 11:07:05.377208 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5821 11:07:05.380123 <6>[ 0.000000] software IO TLB: area num 8.
5822 11:07:05.406437 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5823 11:07:05.464912 <6>[ 0.000000] Memory: 3896804K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 261660K reserved, 32768K cma-reserved)
5824 11:07:05.471358 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5825 11:07:05.477501 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5826 11:07:05.481464 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5827 11:07:05.487928 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5828 11:07:05.494037 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5829 11:07:05.497824 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5830 11:07:05.507627 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5831 11:07:05.514228 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5832 11:07:05.520581 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5833 11:07:05.530181 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5834 11:07:05.533838 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5835 11:07:05.540409 <6>[ 0.000000] GICv3: 640 SPIs implemented
5836 11:07:05.543630 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5837 11:07:05.546803 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5838 11:07:05.553202 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5839 11:07:05.560375 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5840 11:07:05.573333 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5841 11:07:05.583253 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5842 11:07:05.589858 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5843 11:07:05.601990 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5844 11:07:05.614669 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5845 11:07:05.621874 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5846 11:07:05.628372 <6>[ 0.009463] Console: colour dummy device 80x25
5847 11:07:05.631652 <6>[ 0.014505] printk: console [tty1] enabled
5848 11:07:05.644912 <6>[ 0.018898] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5849 11:07:05.647985 <6>[ 0.029363] pid_max: default: 32768 minimum: 301
5850 11:07:05.654655 <6>[ 0.034244] LSM: Security Framework initializing
5851 11:07:05.661263 <6>[ 0.039159] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5852 11:07:05.667755 <6>[ 0.046782] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5853 11:07:05.674672 <4>[ 0.055657] cacheinfo: Unable to detect cache hierarchy for CPU 0
5854 11:07:05.684507 <6>[ 0.062281] cblist_init_generic: Setting adjustable number of callback queues.
5855 11:07:05.690843 <6>[ 0.069726] cblist_init_generic: Setting shift to 3 and lim to 1.
5856 11:07:05.697269 <6>[ 0.076079] cblist_init_generic: Setting adjustable number of callback queues.
5857 11:07:05.704054 <6>[ 0.083524] cblist_init_generic: Setting shift to 3 and lim to 1.
5858 11:07:05.707365 <6>[ 0.089923] rcu: Hierarchical SRCU implementation.
5859 11:07:05.713679 <6>[ 0.094949] rcu: Max phase no-delay instances is 1000.
5860 11:07:05.721517 <6>[ 0.102858] EFI services will not be available.
5861 11:07:05.725183 <6>[ 0.107807] smp: Bringing up secondary CPUs ...
5862 11:07:05.735591 <6>[ 0.113094] Detected VIPT I-cache on CPU1
5863 11:07:05.742661 <4>[ 0.113140] cacheinfo: Unable to detect cache hierarchy for CPU 1
5864 11:07:05.749518 <6>[ 0.113147] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5865 11:07:05.755497 <6>[ 0.113179] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5866 11:07:05.758660 <6>[ 0.113663] Detected VIPT I-cache on CPU2
5867 11:07:05.765367 <4>[ 0.113697] cacheinfo: Unable to detect cache hierarchy for CPU 2
5868 11:07:05.771951 <6>[ 0.113702] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5869 11:07:05.778516 <6>[ 0.113713] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5870 11:07:05.785107 <6>[ 0.114160] Detected VIPT I-cache on CPU3
5871 11:07:05.791207 <4>[ 0.114190] cacheinfo: Unable to detect cache hierarchy for CPU 3
5872 11:07:05.797725 <6>[ 0.114194] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5873 11:07:05.804747 <6>[ 0.114206] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5874 11:07:05.807830 <6>[ 0.114780] CPU features: detected: Spectre-v2
5875 11:07:05.814778 <6>[ 0.114790] CPU features: detected: Spectre-BHB
5876 11:07:05.817869 <6>[ 0.114794] CPU features: detected: ARM erratum 858921
5877 11:07:05.824262 <6>[ 0.114799] Detected VIPT I-cache on CPU4
5878 11:07:05.827469 <4>[ 0.114848] cacheinfo: Unable to detect cache hierarchy for CPU 4
5879 11:07:05.837304 <6>[ 0.114856] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5880 11:07:05.844231 <6>[ 0.114864] arch_timer: Enabling local workaround for ARM erratum 858921
5881 11:07:05.847391 <6>[ 0.114875] arch_timer: CPU4: Trapping CNTVCT access
5882 11:07:05.854015 <6>[ 0.114883] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5883 11:07:05.860791 <6>[ 0.115368] Detected VIPT I-cache on CPU5
5884 11:07:05.867081 <4>[ 0.115408] cacheinfo: Unable to detect cache hierarchy for CPU 5
5885 11:07:05.873385 <6>[ 0.115414] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5886 11:07:05.880467 <6>[ 0.115421] arch_timer: Enabling local workaround for ARM erratum 858921
5887 11:07:05.883457 <6>[ 0.115427] arch_timer: CPU5: Trapping CNTVCT access
5888 11:07:05.893024 <6>[ 0.115432] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5889 11:07:05.896646 <6>[ 0.115868] Detected VIPT I-cache on CPU6
5890 11:07:05.902762 <4>[ 0.115913] cacheinfo: Unable to detect cache hierarchy for CPU 6
5891 11:07:05.909728 <6>[ 0.115919] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5892 11:07:05.916070 <6>[ 0.115926] arch_timer: Enabling local workaround for ARM erratum 858921
5893 11:07:05.922835 <6>[ 0.115932] arch_timer: CPU6: Trapping CNTVCT access
5894 11:07:05.929166 <6>[ 0.115937] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5895 11:07:05.932565 <6>[ 0.116468] Detected VIPT I-cache on CPU7
5896 11:07:05.939428 <4>[ 0.116510] cacheinfo: Unable to detect cache hierarchy for CPU 7
5897 11:07:05.945911 <6>[ 0.116517] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5898 11:07:05.952426 <6>[ 0.116524] arch_timer: Enabling local workaround for ARM erratum 858921
5899 11:07:05.958744 <6>[ 0.116530] arch_timer: CPU7: Trapping CNTVCT access
5900 11:07:05.965252 <6>[ 0.116535] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5901 11:07:05.968907 <6>[ 0.116594] smp: Brought up 1 node, 8 CPUs
5902 11:07:05.975555 <6>[ 0.355468] SMP: Total of 8 processors activated.
5903 11:07:05.978830 <6>[ 0.360405] CPU features: detected: 32-bit EL0 Support
5904 11:07:05.985124 <6>[ 0.365776] CPU features: detected: 32-bit EL1 Support
5905 11:07:05.992872 <6>[ 0.371141] CPU features: detected: CRC32 instructions
5906 11:07:05.995704 <6>[ 0.376566] CPU: All CPU(s) started at EL2
5907 11:07:06.001787 <6>[ 0.380904] alternatives: applying system-wide alternatives
5908 11:07:06.004856 <6>[ 0.388915] devtmpfs: initialized
5909 11:07:06.023297 <6>[ 0.397870] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5910 11:07:06.029776 <6>[ 0.407817] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5911 11:07:06.036335 <6>[ 0.415538] pinctrl core: initialized pinctrl subsystem
5912 11:07:06.039380 <6>[ 0.422650] DMI not present or invalid.
5913 11:07:06.046702 <6>[ 0.427018] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5914 11:07:06.055929 <6>[ 0.433924] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5915 11:07:06.062907 <6>[ 0.441454] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5916 11:07:06.072534 <6>[ 0.449703] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5917 11:07:06.075771 <6>[ 0.457877] audit: initializing netlink subsys (disabled)
5918 11:07:06.085995 <5>[ 0.463583] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5919 11:07:06.092307 <6>[ 0.464568] thermal_sys: Registered thermal governor 'step_wise'
5920 11:07:06.098690 <6>[ 0.471548] thermal_sys: Registered thermal governor 'power_allocator'
5921 11:07:06.102158 <6>[ 0.477847] cpuidle: using governor menu
5922 11:07:06.108226 <6>[ 0.488809] NET: Registered PF_QIPCRTR protocol family
5923 11:07:06.114972 <6>[ 0.494305] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5924 11:07:06.121586 <6>[ 0.501402] ASID allocator initialised with 32768 entries
5925 11:07:06.124934 <6>[ 0.508182] Serial: AMBA PL011 UART driver
5926 11:07:06.138377 <4>[ 0.519519] Trying to register duplicate clock ID: 113
5927 11:07:06.198994 <6>[ 0.576271] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5928 11:07:06.212642 <6>[ 0.590653] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5929 11:07:06.216040 <6>[ 0.600429] KASLR enabled
5930 11:07:06.230503 <6>[ 0.608354] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5931 11:07:06.236990 <6>[ 0.615356] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5932 11:07:06.243630 <6>[ 0.621832] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5933 11:07:06.250587 <6>[ 0.628823] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5934 11:07:06.256919 <6>[ 0.635296] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5935 11:07:06.263661 <6>[ 0.642287] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5936 11:07:06.270255 <6>[ 0.648761] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5937 11:07:06.276388 <6>[ 0.655750] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5938 11:07:06.279654 <6>[ 0.663286] ACPI: Interpreter disabled.
5939 11:07:06.290332 <6>[ 0.671296] iommu: Default domain type: Translated
5940 11:07:06.296850 <6>[ 0.676458] iommu: DMA domain TLB invalidation policy: strict mode
5941 11:07:06.300427 <5>[ 0.683085] SCSI subsystem initialized
5942 11:07:06.306548 <6>[ 0.687530] usbcore: registered new interface driver usbfs
5943 11:07:06.313004 <6>[ 0.693257] usbcore: registered new interface driver hub
5944 11:07:06.316457 <6>[ 0.698798] usbcore: registered new device driver usb
5945 11:07:06.324183 <6>[ 0.705118] pps_core: LinuxPPS API ver. 1 registered
5946 11:07:06.333635 <6>[ 0.710304] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5947 11:07:06.337109 <6>[ 0.719629] PTP clock support registered
5948 11:07:06.340083 <6>[ 0.723881] EDAC MC: Ver: 3.0.0
5949 11:07:06.348356 <6>[ 0.729530] FPGA manager framework
5950 11:07:06.354683 <6>[ 0.733211] Advanced Linux Sound Architecture Driver Initialized.
5951 11:07:06.357980 <6>[ 0.739952] vgaarb: loaded
5952 11:07:06.364712 <6>[ 0.743085] clocksource: Switched to clocksource arch_sys_counter
5953 11:07:06.368307 <5>[ 0.749518] VFS: Disk quotas dquot_6.6.0
5954 11:07:06.374780 <6>[ 0.753693] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5955 11:07:06.378069 <6>[ 0.760868] pnp: PnP ACPI: disabled
5956 11:07:06.386564 <6>[ 0.767759] NET: Registered PF_INET protocol family
5957 11:07:06.393312 <6>[ 0.772992] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5958 11:07:06.405276 <6>[ 0.782904] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5959 11:07:06.414771 <6>[ 0.791659] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5960 11:07:06.421467 <6>[ 0.799611] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5961 11:07:06.428091 <6>[ 0.807843] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5962 11:07:06.437942 <6>[ 0.815936] TCP: Hash tables configured (established 32768 bind 32768)
5963 11:07:06.444807 <6>[ 0.822763] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5964 11:07:06.451561 <6>[ 0.829737] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5965 11:07:06.457710 <6>[ 0.837219] NET: Registered PF_UNIX/PF_LOCAL protocol family
5966 11:07:06.464274 <6>[ 0.843315] RPC: Registered named UNIX socket transport module.
5967 11:07:06.467886 <6>[ 0.849458] RPC: Registered udp transport module.
5968 11:07:06.474480 <6>[ 0.854383] RPC: Registered tcp transport module.
5969 11:07:06.480695 <6>[ 0.859308] RPC: Registered tcp NFSv4.1 backchannel transport module.
5970 11:07:06.484301 <6>[ 0.865960] PCI: CLS 0 bytes, default 64
5971 11:07:06.487665 <6>[ 0.870222] Unpacking initramfs...
5972 11:07:06.505939 <6>[ 0.883700] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5973 11:07:06.515668 <6>[ 0.892389] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5974 11:07:06.518830 <6>[ 0.901303] kvm [1]: IPA Size Limit: 40 bits
5975 11:07:06.526480 <6>[ 0.907649] kvm [1]: vgic-v2@c420000
5976 11:07:06.529762 <6>[ 0.911479] kvm [1]: GIC system register CPU interface enabled
5977 11:07:06.536491 <6>[ 0.917665] kvm [1]: vgic interrupt IRQ18
5978 11:07:06.539930 <6>[ 0.922044] kvm [1]: Hyp mode initialized successfully
5979 11:07:06.547396 <5>[ 0.928387] Initialise system trusted keyrings
5980 11:07:06.553799 <6>[ 0.933228] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5981 11:07:06.562226 <6>[ 0.943155] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5982 11:07:06.568778 <5>[ 0.949581] NFS: Registering the id_resolver key type
5983 11:07:06.571650 <5>[ 0.954892] Key type id_resolver registered
5984 11:07:06.578563 <5>[ 0.959302] Key type id_legacy registered
5985 11:07:06.585406 <6>[ 0.963600] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5986 11:07:06.591668 <6>[ 0.970523] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5987 11:07:06.598177 <6>[ 0.978288] 9p: Installing v9fs 9p2000 file system support
5988 11:07:06.625155 <5>[ 1.006464] Key type asymmetric registered
5989 11:07:06.628448 <5>[ 1.010808] Asymmetric key parser 'x509' registered
5990 11:07:06.638778 <6>[ 1.015956] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5991 11:07:06.641690 <6>[ 1.023577] io scheduler mq-deadline registered
5992 11:07:06.644949 <6>[ 1.028333] io scheduler kyber registered
5993 11:07:06.667693 <6>[ 1.049135] EINJ: ACPI disabled.
5994 11:07:06.674230 <4>[ 1.052870] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5995 11:07:06.712780 <6>[ 1.093818] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5996 11:07:06.721019 <6>[ 1.102316] printk: console [ttyS0] disabled
5997 11:07:06.749027 <6>[ 1.126974] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5998 11:07:06.756600 <6>[ 1.136449] printk: console [ttyS0] enabled
5999 11:07:06.758841 <6>[ 1.136449] printk: console [ttyS0] enabled
6000 11:07:06.765287 <6>[ 1.145370] printk: bootconsole [mtk8250] disabled
6001 11:07:06.768929 <6>[ 1.145370] printk: bootconsole [mtk8250] disabled
6002 11:07:06.778972 <3>[ 1.155903] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6003 11:07:06.785451 <3>[ 1.164284] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6004 11:07:06.815232 <6>[ 1.192695] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6005 11:07:06.821149 <6>[ 1.202354] serial serial0: tty port ttyS1 registered
6006 11:07:06.828466 <6>[ 1.208934] SuperH (H)SCI(F) driver initialized
6007 11:07:06.831607 <6>[ 1.214463] msm_serial: driver initialized
6008 11:07:06.846922 <6>[ 1.224795] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6009 11:07:06.856941 <6>[ 1.233402] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6010 11:07:06.863164 <6>[ 1.241987] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6011 11:07:06.873556 <6>[ 1.250560] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6012 11:07:06.882948 <6>[ 1.259218] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6013 11:07:06.889695 <6>[ 1.267885] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6014 11:07:06.899926 <6>[ 1.276623] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6015 11:07:06.906314 <6>[ 1.285363] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6016 11:07:06.916278 <6>[ 1.293931] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6017 11:07:06.926194 <6>[ 1.302726] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6018 11:07:06.933897 <4>[ 1.315132] cacheinfo: Unable to detect cache hierarchy for CPU 0
6019 11:07:06.943287 <6>[ 1.324575] loop: module loaded
6020 11:07:06.955221 <6>[ 1.336524] vsim1: Bringing 1800000uV into 2700000-2700000uV
6021 11:07:06.973503 <6>[ 1.354513] megasas: 07.719.03.00-rc1
6022 11:07:06.982494 <6>[ 1.363302] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6023 11:07:06.989320 <6>[ 1.370459] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6024 11:07:07.006263 <6>[ 1.387194] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6025 11:07:07.062720 <6>[ 1.437338] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
6026 11:07:07.119733 <6>[ 1.500972] Freeing initrd memory: 18264K
6027 11:07:07.135375 <4>[ 1.512803] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6028 11:07:07.141473 <4>[ 1.522032] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
6029 11:07:07.148118 <4>[ 1.528730] Hardware name: Google juniper sku16 board (DT)
6030 11:07:07.151924 <4>[ 1.534469] Call trace:
6031 11:07:07.154765 <4>[ 1.537169] dump_backtrace.part.0+0xe0/0xf0
6032 11:07:07.158190 <4>[ 1.541706] show_stack+0x18/0x30
6033 11:07:07.161590 <4>[ 1.545280] dump_stack_lvl+0x64/0x80
6034 11:07:07.168037 <4>[ 1.549199] dump_stack+0x18/0x34
6035 11:07:07.171667 <4>[ 1.552768] sysfs_warn_dup+0x64/0x80
6036 11:07:07.174797 <4>[ 1.556691] sysfs_do_create_link_sd+0xf0/0x100
6037 11:07:07.177866 <4>[ 1.561478] sysfs_create_link+0x20/0x40
6038 11:07:07.184694 <4>[ 1.565657] bus_add_device+0x64/0x120
6039 11:07:07.188278 <4>[ 1.569663] device_add+0x354/0x7ec
6040 11:07:07.191176 <4>[ 1.573409] of_device_add+0x44/0x60
6041 11:07:07.198182 <4>[ 1.577243] of_platform_device_create_pdata+0x90/0x124
6042 11:07:07.201449 <4>[ 1.582724] of_platform_bus_create+0x154/0x380
6043 11:07:07.205059 <4>[ 1.587511] of_platform_populate+0x50/0xfc
6044 11:07:07.211463 <4>[ 1.591949] parse_mtd_partitions+0x1d8/0x4e0
6045 11:07:07.214707 <4>[ 1.596565] mtd_device_parse_register+0xec/0x2e0
6046 11:07:07.221234 <4>[ 1.601527] spi_nor_probe+0x280/0x2f4
6047 11:07:07.224075 <4>[ 1.605532] spi_mem_probe+0x6c/0xc0
6048 11:07:07.227315 <4>[ 1.609365] spi_probe+0x84/0xe4
6049 11:07:07.231324 <4>[ 1.612851] really_probe+0xbc/0x2dc
6050 11:07:07.234395 <4>[ 1.616683] __driver_probe_device+0x78/0x114
6051 11:07:07.240942 <4>[ 1.621295] driver_probe_device+0xd8/0x15c
6052 11:07:07.244099 <4>[ 1.625733] __device_attach_driver+0xb8/0x134
6053 11:07:07.247424 <4>[ 1.630432] bus_for_each_drv+0x7c/0xd4
6054 11:07:07.253989 <4>[ 1.634525] __device_attach+0x9c/0x1a0
6055 11:07:07.257079 <4>[ 1.638615] device_initial_probe+0x14/0x20
6056 11:07:07.260246 <4>[ 1.643053] bus_probe_device+0x98/0xa0
6057 11:07:07.263505 <4>[ 1.647143] device_add+0x3c0/0x7ec
6058 11:07:07.270617 <4>[ 1.650888] __spi_add_device+0x78/0x120
6059 11:07:07.273840 <4>[ 1.655066] spi_add_device+0x44/0x80
6060 11:07:07.277317 <4>[ 1.658983] spi_register_controller+0x704/0xb20
6061 11:07:07.283770 <4>[ 1.663856] devm_spi_register_controller+0x4c/0xac
6062 11:07:07.286845 <4>[ 1.668988] mtk_spi_probe+0x4f4/0x684
6063 11:07:07.290387 <4>[ 1.672992] platform_probe+0x68/0xc0
6064 11:07:07.293811 <4>[ 1.676911] really_probe+0xbc/0x2dc
6065 11:07:07.300396 <4>[ 1.680741] __driver_probe_device+0x78/0x114
6066 11:07:07.303316 <4>[ 1.685353] driver_probe_device+0xd8/0x15c
6067 11:07:07.306664 <4>[ 1.689790] __driver_attach+0x94/0x19c
6068 11:07:07.313264 <4>[ 1.693880] bus_for_each_dev+0x74/0xd0
6069 11:07:07.317055 <4>[ 1.697973] driver_attach+0x24/0x30
6070 11:07:07.320093 <4>[ 1.701803] bus_add_driver+0x154/0x20c
6071 11:07:07.323334 <4>[ 1.705893] driver_register+0x78/0x130
6072 11:07:07.329883 <4>[ 1.709983] __platform_driver_register+0x28/0x34
6073 11:07:07.333586 <4>[ 1.714943] mtk_spi_driver_init+0x1c/0x28
6074 11:07:07.336709 <4>[ 1.719300] do_one_initcall+0x64/0x1dc
6075 11:07:07.343068 <4>[ 1.723390] kernel_init_freeable+0x218/0x284
6076 11:07:07.346562 <4>[ 1.728005] kernel_init+0x24/0x12c
6077 11:07:07.350264 <4>[ 1.731750] ret_from_fork+0x10/0x20
6078 11:07:07.359722 <6>[ 1.740634] tun: Universal TUN/TAP device driver, 1.6
6079 11:07:07.363023 <6>[ 1.746919] thunder_xcv, ver 1.0
6080 11:07:07.366308 <6>[ 1.750435] thunder_bgx, ver 1.0
6081 11:07:07.369448 <6>[ 1.753940] nicpf, ver 1.0
6082 11:07:07.380665 <6>[ 1.758304] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6083 11:07:07.383838 <6>[ 1.765788] hns3: Copyright (c) 2017 Huawei Corporation.
6084 11:07:07.390189 <6>[ 1.771384] hclge is initializing
6085 11:07:07.393488 <6>[ 1.774963] e1000: Intel(R) PRO/1000 Network Driver
6086 11:07:07.400616 <6>[ 1.780100] e1000: Copyright (c) 1999-2006 Intel Corporation.
6087 11:07:07.403779 <6>[ 1.786123] e1000e: Intel(R) PRO/1000 Network Driver
6088 11:07:07.410365 <6>[ 1.791344] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6089 11:07:07.417531 <6>[ 1.797539] igb: Intel(R) Gigabit Ethernet Network Driver
6090 11:07:07.423522 <6>[ 1.803195] igb: Copyright (c) 2007-2014 Intel Corporation.
6091 11:07:07.430353 <6>[ 1.809039] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6092 11:07:07.436753 <6>[ 1.815562] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6093 11:07:07.439724 <6>[ 1.822116] sky2: driver version 1.30
6094 11:07:07.446900 <6>[ 1.827374] usbcore: registered new device driver r8152-cfgselector
6095 11:07:07.453317 <6>[ 1.833915] usbcore: registered new interface driver r8152
6096 11:07:07.459891 <6>[ 1.839745] VFIO - User Level meta-driver version: 0.3
6097 11:07:07.466759 <6>[ 1.847570] mtu3 11201000.usb: uwk - reg:0x420, version:101
6098 11:07:07.472934 <4>[ 1.853441] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6099 11:07:07.479652 <6>[ 1.860712] mtu3 11201000.usb: dr_mode: 1, drd: auto
6100 11:07:07.486207 <6>[ 1.865939] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6101 11:07:07.489369 <6>[ 1.872124] mtu3 11201000.usb: usb3-drd: 0
6102 11:07:07.499596 <6>[ 1.877698] mtu3 11201000.usb: xHCI platform device register success...
6103 11:07:07.506017 <4>[ 1.886321] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6104 11:07:07.513029 <6>[ 1.894270] xhci-mtk 11200000.usb: xHCI Host Controller
6105 11:07:07.520072 <6>[ 1.899777] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6106 11:07:07.526470 <6>[ 1.907499] xhci-mtk 11200000.usb: USB3 root hub has no ports
6107 11:07:07.536657 <6>[ 1.913507] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6108 11:07:07.542785 <6>[ 1.922932] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6109 11:07:07.549402 <6>[ 1.928995] xhci-mtk 11200000.usb: xHCI Host Controller
6110 11:07:07.556098 <6>[ 1.934483] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6111 11:07:07.562635 <6>[ 1.942143] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6112 11:07:07.565871 <6>[ 1.948977] hub 1-0:1.0: USB hub found
6113 11:07:07.572541 <6>[ 1.953006] hub 1-0:1.0: 1 port detected
6114 11:07:07.579423 <6>[ 1.958368] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6115 11:07:07.585907 <6>[ 1.967007] hub 2-0:1.0: USB hub found
6116 11:07:07.592647 <3>[ 1.971042] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6117 11:07:07.599128 <6>[ 1.978930] usbcore: registered new interface driver usb-storage
6118 11:07:07.605358 <6>[ 1.985539] usbcore: registered new device driver onboard-usb-hub
6119 11:07:07.617224 <4>[ 1.995193] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6120 11:07:07.627039 <6>[ 2.007410] mt6397-rtc mt6358-rtc: registered as rtc0
6121 11:07:07.636024 <6>[ 2.012893] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-10T11:06:52 UTC (1720609612)
6122 11:07:07.639981 <6>[ 2.022764] i2c_dev: i2c /dev entries driver
6123 11:07:07.651602 <6>[ 2.029184] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6124 11:07:07.661196 <6>[ 2.037501] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6125 11:07:07.667882 <6>[ 2.046406] i2c 4-0058: Fixed dependency cycle(s) with /panel
6126 11:07:07.674717 <6>[ 2.052437] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6127 11:07:07.690910 <6>[ 2.071884] cpu cpu0: EM: created perf domain
6128 11:07:07.700716 <6>[ 2.077354] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6129 11:07:07.707431 <6>[ 2.088648] cpu cpu4: EM: created perf domain
6130 11:07:07.714792 <6>[ 2.095707] sdhci: Secure Digital Host Controller Interface driver
6131 11:07:07.721562 <6>[ 2.102164] sdhci: Copyright(c) Pierre Ossman
6132 11:07:07.727994 <6>[ 2.107574] Synopsys Designware Multimedia Card Interface Driver
6133 11:07:07.734913 <6>[ 2.107994] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6134 11:07:07.737744 <6>[ 2.114637] sdhci-pltfm: SDHCI platform and OF driver helper
6135 11:07:07.745902 <6>[ 2.127190] ledtrig-cpu: registered to indicate activity on CPUs
6136 11:07:07.753712 <6>[ 2.134874] usbcore: registered new interface driver usbhid
6137 11:07:07.756895 <6>[ 2.140713] usbhid: USB HID core driver
6138 11:07:07.768204 <6>[ 2.145029] spi_master spi2: will run message pump with realtime priority
6139 11:07:07.771777 <4>[ 2.145175] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6140 11:07:07.782177 <4>[ 2.159382] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6141 11:07:07.794833 <6>[ 2.164032] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6142 11:07:07.808427 <6>[ 2.182186] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6143 11:07:07.814901 <4>[ 2.190446] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6144 11:07:07.821546 <6>[ 2.197069] cros-ec-spi spi2.0: Chrome EC device registered
6145 11:07:07.835263 <4>[ 2.213159] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6146 11:07:07.848974 <4>[ 2.226422] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6147 11:07:07.855199 <6>[ 2.227999] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6148 11:07:07.861891 <4>[ 2.235326] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6149 11:07:07.865101 <6>[ 2.241719] mmc0: new HS400 MMC card at address 0001
6150 11:07:07.871824 <6>[ 2.252578] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6151 11:07:07.884291 <6>[ 2.265281] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6152 11:07:07.890620 <6>[ 2.267682] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6153 11:07:07.897360 <6>[ 2.274777] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6154 11:07:07.903864 <6>[ 2.284758] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6155 11:07:07.914163 <6>[ 2.285993] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6156 11:07:07.920781 <6>[ 2.290946] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6157 11:07:07.930699 <6>[ 2.302331] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6158 11:07:07.943541 <6>[ 2.307669] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6159 11:07:07.947151 <6>[ 2.317078] NET: Registered PF_PACKET protocol family
6160 11:07:07.957169 <6>[ 2.328630] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6161 11:07:07.960194 <6>[ 2.333514] 9pnet: Installing 9P2000 support
6162 11:07:07.966918 <5>[ 2.347966] Key type dns_resolver registered
6163 11:07:07.970036 <6>[ 2.353139] registered taskstats version 1
6164 11:07:07.977070 <5>[ 2.357526] Loading compiled-in X.509 certificates
6165 11:07:07.996963 <6>[ 2.375101] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6166 11:07:08.025429 <3>[ 2.403291] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6167 11:07:08.052300 <6>[ 2.426621] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6168 11:07:08.061879 <6>[ 2.439780] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6169 11:07:08.072086 <6>[ 2.448400] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6170 11:07:08.078388 <6>[ 2.456925] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6171 11:07:08.088532 <6>[ 2.465445] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6172 11:07:08.094687 <6>[ 2.473966] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6173 11:07:08.105015 <6>[ 2.482486] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6174 11:07:08.114559 <6>[ 2.491005] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6175 11:07:08.121221 <6>[ 2.500208] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6176 11:07:08.128031 <6>[ 2.507728] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6177 11:07:08.135140 <6>[ 2.515031] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6178 11:07:08.144917 <6>[ 2.522286] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6179 11:07:08.151071 <6>[ 2.529727] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6180 11:07:08.154407 <6>[ 2.530877] hub 1-1:1.0: USB hub found
6181 11:07:08.160994 <6>[ 2.538049] panfrost 13040000.gpu: clock rate = 511999970
6182 11:07:08.164079 <6>[ 2.540917] hub 1-1:1.0: 3 ports detected
6183 11:07:08.173946 <6>[ 2.546113] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6184 11:07:08.184144 <6>[ 2.560577] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6185 11:07:08.190842 <6>[ 2.568588] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6186 11:07:08.203526 <6>[ 2.577025] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6187 11:07:08.210591 <6>[ 2.589102] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6188 11:07:08.223628 <6>[ 2.600842] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6189 11:07:08.232785 <6>[ 2.609636] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6190 11:07:08.243066 <6>[ 2.618783] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6191 11:07:08.249567 <6>[ 2.627914] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6192 11:07:08.259664 <6>[ 2.637043] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6193 11:07:08.269137 <6>[ 2.646343] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6194 11:07:08.279119 <6>[ 2.655644] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6195 11:07:08.288751 <6>[ 2.665117] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6196 11:07:08.298859 <6>[ 2.674591] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6197 11:07:08.308506 <6>[ 2.683717] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6198 11:07:08.378589 <6>[ 2.756099] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6199 11:07:08.388158 <6>[ 2.765132] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6200 11:07:08.399982 <6>[ 2.777451] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6201 11:07:08.477264 <6>[ 2.855121] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6202 11:07:09.116893 <6>[ 3.043357] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6203 11:07:09.126505 <4>[ 3.160367] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6204 11:07:09.133506 <4>[ 3.160383] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6205 11:07:09.139618 <6>[ 3.196137] r8152 1-1.2:1.0 eth0: v1.12.13
6206 11:07:09.146479 <6>[ 3.275115] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6207 11:07:09.152937 <6>[ 3.477936] Console: switching to colour frame buffer device 170x48
6208 11:07:09.159588 <6>[ 3.538572] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6209 11:07:09.181495 <6>[ 3.555800] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6210 11:07:09.200743 <6>[ 3.575072] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6211 11:07:09.210757 <6>[ 3.587623] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6212 11:07:09.217113 <6>[ 3.595800] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6213 11:07:09.226596 <6>[ 3.603258] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6214 11:07:09.248056 <6>[ 3.622678] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6215 11:07:10.405717 <6>[ 4.786777] r8152 1-1.2:1.0 eth0: carrier on
6216 11:07:12.493900 <5>[ 4.811293] Sending DHCP requests .., OK
6217 11:07:12.500912 <6>[ 6.879438] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.20
6218 11:07:12.504159 <6>[ 6.887876] IP-Config: Complete:
6219 11:07:12.517252 <6>[ 6.891447] device=eth0, hwaddr=00:e0:4c:72:3d:a6, ipaddr=192.168.201.20, mask=255.255.255.0, gw=192.168.201.1
6220 11:07:12.526869 <6>[ 6.902347] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4, domain=lava-rack, nis-domain=(none)
6221 11:07:12.538652 <6>[ 6.916711] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6222 11:07:12.547567 <6>[ 6.916721] nameserver0=192.168.201.1
6223 11:07:12.555385 <6>[ 6.936634] clk: Disabling unused clocks
6224 11:07:12.560379 <6>[ 6.944634] ALSA device list:
6225 11:07:12.569363 <6>[ 6.950717] No soundcards found.
6226 11:07:12.578768 <6>[ 6.959631] Freeing unused kernel memory: 8512K
6227 11:07:12.585726 <6>[ 6.966789] Run /init as init process
6228 11:07:12.597476 Loading, please wait...
6229 11:07:12.637883 Starting systemd-udevd version 252.22-1~deb12u1
6230 11:07:12.967336 <6>[ 7.345040] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6231 11:07:12.977077 <6>[ 7.346669] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6232 11:07:12.987135 <4>[ 7.364416] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6233 11:07:12.990310 <3>[ 7.367282] thermal_sys: Failed to find 'trips' node
6234 11:07:13.000029 <4>[ 7.372186] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6235 11:07:13.009648 <3>[ 7.372385] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6236 11:07:13.016384 <3>[ 7.372393] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6237 11:07:13.031054 <3>[ 7.372398] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6238 11:07:13.041534 <3>[ 7.372403] elan_i2c 2-0015: Error applying setting, reverse things back
6239 11:07:13.047394 <3>[ 7.377686] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6240 11:07:13.051120 <6>[ 7.418828] mc: Linux media interface: v0.10
6241 11:07:13.061641 <3>[ 7.425443] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6242 11:07:13.073853 <3>[ 7.449656] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6243 11:07:13.080065 <4>[ 7.454087] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6244 11:07:13.089910 <3>[ 7.460021] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6245 11:07:13.096839 <3>[ 7.470574] thermal_sys: Failed to find 'trips' node
6246 11:07:13.103144 <5>[ 7.471432] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6247 11:07:13.113400 <3>[ 7.476111] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6248 11:07:13.119857 <5>[ 7.483067] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6249 11:07:13.126385 <6>[ 7.483327] cs_system_cfg: CoreSight Configuration manager initialised
6250 11:07:13.136513 <3>[ 7.486922] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6251 11:07:13.143209 <3>[ 7.486944] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6252 11:07:13.153252 <3>[ 7.486951] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6253 11:07:13.159677 <3>[ 7.486957] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6254 11:07:13.169739 <3>[ 7.486962] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6255 11:07:13.176757 <3>[ 7.488786] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6256 11:07:13.188148 <3>[ 7.490183] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6257 11:07:13.197925 <3>[ 7.490195] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6258 11:07:13.204614 <4>[ 7.490199] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6259 11:07:13.218470 <4>[ 7.492988] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6260 11:07:13.225883 <6>[ 7.493709] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6261 11:07:13.231744 <6>[ 7.494758] videodev: Linux video capture interface: v2.00
6262 11:07:13.238344 <5>[ 7.499626] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6263 11:07:13.248032 <6>[ 7.506112] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6264 11:07:13.258278 <4>[ 7.512817] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6265 11:07:13.268075 <6>[ 7.522686] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6266 11:07:13.277766 <6>[ 7.526939] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input6
6267 11:07:13.284921 <3>[ 7.530095] mtk-scp 10500000.scp: invalid resource
6268 11:07:13.291265 <6>[ 7.538093] cfg80211: failed to load regulatory.db
6269 11:07:13.301229 <3>[ 7.538429] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6270 11:07:13.310878 <6>[ 7.539152] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6271 11:07:13.317801 <6>[ 7.539291] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6272 11:07:13.324236 <6>[ 7.539374] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6273 11:07:13.334077 <6>[ 7.539566] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6274 11:07:13.344006 <6>[ 7.546808] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6275 11:07:13.350964 <6>[ 7.547597] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6276 11:07:13.357308 <6>[ 7.549205] remoteproc remoteproc0: scp is available
6277 11:07:13.367475 <4>[ 7.549287] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6278 11:07:13.370449 <6>[ 7.549293] remoteproc remoteproc0: powering up scp
6279 11:07:13.380203 <4>[ 7.549311] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6280 11:07:13.387346 <3>[ 7.549314] remoteproc remoteproc0: request_firmware failed: -2
6281 11:07:13.394206 <6>[ 7.573495] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6282 11:07:13.398279 <6>[ 7.573862] Bluetooth: Core ver 2.22
6283 11:07:13.405145 <6>[ 7.573910] NET: Registered PF_BLUETOOTH protocol family
6284 11:07:13.411384 <6>[ 7.573912] Bluetooth: HCI device and connection manager initialized
6285 11:07:13.418372 <6>[ 7.573924] Bluetooth: HCI socket layer initialized
6286 11:07:13.424671 <6>[ 7.573928] Bluetooth: L2CAP socket layer initialized
6287 11:07:13.431507 <6>[ 7.573936] Bluetooth: SCO socket layer initialized
6288 11:07:13.437931 <6>[ 7.575519] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6289 11:07:13.444100 <6>[ 7.576824] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6290 11:07:13.454658 <6>[ 7.578884] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6291 11:07:13.461018 <6>[ 7.591987] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6292 11:07:13.474829 <6>[ 7.602081] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6293 11:07:13.477990 <6>[ 7.603251] Bluetooth: HCI UART driver ver 2.3
6294 11:07:13.487743 <6>[ 7.603773] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video3
6295 11:07:13.494849 <6>[ 7.610781] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6296 11:07:13.501009 <6>[ 7.611042] usbcore: registered new interface driver uvcvideo
6297 11:07:13.508085 <6>[ 7.616535] Bluetooth: HCI UART protocol H4 registered
6298 11:07:13.517823 <6>[ 7.625112] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6299 11:07:13.521633 Begin: Loading essential drivers ... done.
6300 11:07:13.524284 Begi<6>[ 7.634961] Bluetooth: HCI UART protocol LL registered
6301 11:07:13.531216 n: Running /scripts/init-premount ... done.
6302 11:07:13.541735 Beg<6>[ 7.669090] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6303 11:07:13.549232 in: Mounting root file system ..<6>[ 7.670536] Bluetooth: HCI UART protocol Three-wire (H5) registered
6304 11:07:13.559140 . Begin: Running<6>[ 7.675595] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6305 11:07:13.562441 /scripts/nfs-top ... done.
6306 11:07:13.568873 Begin: Running /scr<6>[ 7.688325] Bluetooth: HCI UART protocol Broadcom registered
6307 11:07:13.585368 ipts/nfs-premount ... Waiting up to 60 secs for <6>[ 7.696197] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6308 11:07:13.588431 any ethernet to become available
6309 11:07:13.596033 Device /sys/cl<6>[ 7.703806] Bluetooth: HCI UART protocol QCA registered
6310 11:07:13.596147 ass/net/eth0 found
6311 11:07:13.596234 done.
6312 11:07:13.608529 Begin<3>[ 7.704145] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6313 11:07:13.618371 : Waiting up to 180 secs for any<3>[ 7.704774] debugfs: File 'Playback' in directory 'dapm' already present!
6314 11:07:13.627998 network device to become availa<3>[ 7.704778] debugfs: File 'Capture' in directory 'dapm' already present!
6315 11:07:13.628111 ble ... done.
6316 11:07:13.635176 <6>[ 7.704959] Bluetooth: hci0: setting up ROME/QCA6390
6317 11:07:13.649463 <6>[ 7.706143] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input7
6318 11:07:13.655169 <3>[ 7.707471] thermal_sys: Failed to find 'trips' node
6319 11:07:13.665420 <3>[ 7.707477] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6320 11:07:13.675335 <3>[ 7.707484] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6321 11:07:13.681931 <4>[ 7.707487] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6322 11:07:13.693020 <6>[ 7.860097] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6323 11:07:13.700028 <6>[ 7.860891] Bluetooth: HCI UART protocol Marvell registered
6324 11:07:13.710332 <4>[ 7.889233] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6325 11:07:13.717344 <4>[ 7.889233] Fallback method does not support PEC.
6326 11:07:13.723544 <3>[ 7.926043] Bluetooth: hci0: Frame reassembly failed (-84)
6327 11:07:13.733091 <3>[ 7.930226] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6328 11:07:13.812680 <3>[ 8.189892] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6329 11:07:13.824812 <6>[ 8.205519] Bluetooth: hci0: QCA Product ID :0x00000008
6330 11:07:13.832102 <6>[ 8.213129] Bluetooth: hci0: QCA SOC Version :0x00000044
6331 11:07:13.840032 <6>[ 8.220607] Bluetooth: hci0: QCA ROM Version :0x00000302
6332 11:07:13.849322 <6>[ 8.222148] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6333 11:07:13.856139 <6>[ 8.226265] Bluetooth: hci0: QCA Patch Version:0x00000111
6334 11:07:13.863470 <6>[ 8.226273] Bluetooth: hci0: QCA controller version 0x00440302
6335 11:07:13.873384 <6>[ 8.226280] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6336 11:07:13.883483 <4>[ 8.226382] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6337 11:07:13.897548 <3>[ 8.275064] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6338 11:07:13.904130 IP-Config: eth0 <3>[ 8.284652] Bluetooth: hci0: QCA Failed to download patch (-2)
6339 11:07:13.910971 hardware address 00:e0:4c:72:3d:a6 mtu 1500 DHCP
6340 11:07:13.914150 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6341 11:07:13.920835 address: 192.168.201.20 broadcast: 192.168.201.255 netmask: 255.255.255.0
6342 11:07:13.930127 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6343 11:07:13.940306 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-4 <4>[ 8.318500] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6344 11:07:13.944161
6345 11:07:13.950400 domain : lava-rack
6346 11:07:13.960579 rootserver: 192.168.201.1 ro<4>[ 8.337761] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6347 11:07:13.960668 otpath:
6348 11:07:13.960726 filename :
6349 11:07:13.963683 done.
6350 11:07:13.966925 Begin: Running /scripts/nfs-bottom ... done.
6351 11:07:13.974525 Be<4>[ 8.352046] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6352 11:07:13.986429 gin: Running /scripts/init-bottom ... <4>[ 8.366251] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6353 11:07:13.988870 done.
6354 11:07:15.293234 <6>[ 9.674216] NET: Registered PF_INET6 protocol family
6355 11:07:15.305244 <6>[ 9.686109] Segment Routing with IPv6
6356 11:07:15.312253 <6>[ 9.693255] In-situ OAM (IOAM) with IPv6
6357 11:07:15.486131 <30>[ 9.840878] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6358 11:07:15.507119 <30>[ 9.887888] systemd[1]: Detected architecture arm64.
6359 11:07:15.518258
6360 11:07:15.521402 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6361 11:07:15.521480
6362 11:07:15.548090 <30>[ 9.928348] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6363 11:07:16.592130 <30>[ 10.969425] systemd[1]: Queued start job for default target graphical.target.
6364 11:07:16.631651 <30>[ 11.008978] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6365 11:07:16.644608 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6366 11:07:16.664124 <30>[ 11.041533] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6367 11:07:16.677363 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6368 11:07:16.696778 <30>[ 11.073587] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6369 11:07:16.710824 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6370 11:07:16.727207 <30>[ 11.104726] systemd[1]: Created slice user.slice - User and Session Slice.
6371 11:07:16.739564 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6372 11:07:16.761658 <30>[ 11.135697] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6373 11:07:16.774561 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6374 11:07:16.797047 <30>[ 11.171526] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6375 11:07:16.809996 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6376 11:07:16.836044 <30>[ 11.203469] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6377 11:07:16.855236 <30>[ 11.232595] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6378 11:07:16.862983 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6379 11:07:16.882061 <30>[ 11.259280] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6380 11:07:16.894890 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6381 11:07:16.914091 <30>[ 11.291355] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6382 11:07:16.928362 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6383 11:07:16.942561 <30>[ 11.323385] systemd[1]: Reached target paths.target - Path Units.
6384 11:07:16.957216 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6385 11:07:16.974135 <30>[ 11.351290] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6386 11:07:16.986525 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6387 11:07:17.001806 <30>[ 11.379250] systemd[1]: Reached target slices.target - Slice Units.
6388 11:07:17.013196 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6389 11:07:17.026667 <30>[ 11.407303] systemd[1]: Reached target swap.target - Swaps.
6390 11:07:17.037175 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6391 11:07:17.057894 <30>[ 11.435332] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6392 11:07:17.071456 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6393 11:07:17.090584 <30>[ 11.467705] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6394 11:07:17.104523 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6395 11:07:17.125552 <30>[ 11.502565] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6396 11:07:17.138888 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6397 11:07:17.159841 <30>[ 11.537046] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6398 11:07:17.173747 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6399 11:07:17.191335 <30>[ 11.568024] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6400 11:07:17.203151 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6401 11:07:17.223921 <30>[ 11.601148] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6402 11:07:17.238201 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6403 11:07:17.257506 <30>[ 11.634607] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6404 11:07:17.270676 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6405 11:07:17.290594 <30>[ 11.667901] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6406 11:07:17.303913 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6407 11:07:17.342712 <30>[ 11.719828] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6408 11:07:17.353237 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6409 11:07:17.374790 <30>[ 11.752136] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6410 11:07:17.388046 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6411 11:07:17.411370 <30>[ 11.788679] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6412 11:07:17.423837 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6413 11:07:17.449219 <30>[ 11.819813] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6414 11:07:17.503278 <30>[ 11.880059] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6415 11:07:17.516186 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6416 11:07:17.540236 <30>[ 11.917661] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6417 11:07:17.551939 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6418 11:07:17.576760 <30>[ 11.953537] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6419 11:07:17.587766 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6420 11:07:17.621169 <6>[ 11.998508] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6421 11:07:17.635074 <30>[ 12.012451] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6422 11:07:17.647228 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6423 11:07:17.672031 <30>[ 12.049406] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6424 11:07:17.686194 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6425 11:07:17.712036 <30>[ 12.089767] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6426 11:07:17.723749 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6427 11:07:17.764480 <6>[ 12.145459] fuse: init (API version 7.37)
6428 11:07:17.782845 <30>[ 12.160143] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6429 11:07:17.796459 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6430 11:07:17.826675 <30>[ 12.203981] systemd[1]: Starting systemd-journald.service - Journal Service...
6431 11:07:17.837617 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6432 11:07:17.890666 <30>[ 12.267839] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6433 11:07:17.902610 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6434 11:07:17.928869 <30>[ 12.302765] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6435 11:07:17.941576 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6436 11:07:17.965290 <30>[ 12.342541] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6437 11:07:17.979395 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6438 11:07:18.030825 <30>[ 12.407954] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6439 11:07:18.044407 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6440 11:07:18.075452 <30>[ 12.452440] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6441 11:07:18.089317 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6442 11:07:18.111267 <30>[ 12.488780] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6443 11:07:18.123439 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6444 11:07:18.142900 <30>[ 12.520253] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6445 11:07:18.156561 <3>[ 12.531687] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6446 11:07:18.170591 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug <3>[ 12.547969] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6447 11:07:18.173865 File System.
6448 11:07:18.189903 <3>[ 12.566910] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6449 11:07:18.200504 <30>[ 12.576222] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6450 11:07:18.207280 <3>[ 12.583439] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6451 11:07:18.220491 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6452 11:07:18.226701 <3>[ 12.603486] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6453 11:07:18.238512 <30>[ 12.614675] systemd[1]: modprobe@configfs.service: Deactivated successfully.
6454 11:07:18.248229 <3>[ 12.622391] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6455 11:07:18.256178 <30>[ 12.624759] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
6456 11:07:18.262506 <3>[ 12.637896] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6457 11:07:18.284991 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Modu<3>[ 12.660865] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6458 11:07:18.285409 le configfs.
6459 11:07:18.300524 <30>[ 12.680544] systemd[1]: modprobe@dm_mod.service: Deactivated successfully.
6460 11:07:18.313683 <30>[ 12.690397] systemd[1]: Finished modprobe@dm_mod.service - Load Kernel Module dm_mod.
6461 11:07:18.323921 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6462 11:07:18.342489 <30>[ 12.719920] systemd[1]: Started systemd-journald.service - Journal Service.
6463 11:07:18.353134 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6464 11:07:18.375665 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6465 11:07:18.397222 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6466 11:07:18.416844 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6467 11:07:18.436640 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6468 11:07:18.454708 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6469 11:07:18.475172 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6470 11:07:18.499507 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6471 11:07:18.523739 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6472 11:07:18.556312 <4>[ 12.936420] power_supply_show_property: 2 callbacks suppressed
6473 11:07:18.567012 <3>[ 12.936430] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6474 11:07:18.573493 <3>[ 12.949927] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6475 11:07:18.590905 <4>[ 12.951583] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6476 11:07:18.597338 <3>[ 12.966599] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6477 11:07:18.611428 <3>[ 12.976158] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6478 11:07:18.640862 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6479 11:07:18.650378 <3>[ 13.026672] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6480 11:07:18.671855 Mounting [0;1;39msys-kernel-config…ernel Configuration File System..<3>[ 13.048080] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6481 11:07:18.671967 .
6482 11:07:18.692326 <3>[ 13.070074] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6483 11:07:18.705131 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6484 11:07:18.711482 <3>[ 13.088782] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6485 11:07:18.732390 Starting [0;1;39msystemd-random-se…ice[0m - Load/Sa<3>[ 13.110188] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6486 11:07:18.735796 ve Random Seed...
6487 11:07:18.751341 <3>[ 13.128549] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6488 11:07:18.768699 Startin<3>[ 13.145974] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6489 11:07:18.775561 g [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6490 11:07:18.797954 <46>[ 13.175037] systemd-journald[316]: Received client request to flush runtime journal.
6491 11:07:18.809360 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6492 11:07:18.835379 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6493 11:07:18.859011 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6494 11:07:18.879375 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6495 11:07:18.900665 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6496 11:07:18.919787 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6497 11:07:19.904816 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6498 11:07:19.947279 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6499 11:07:20.252042 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6500 11:07:20.349879 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6501 11:07:20.371030 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6502 11:07:20.390151 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6503 11:07:20.438972 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6504 11:07:20.469614 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6505 11:07:20.737731 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6506 11:07:20.802198 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6507 11:07:20.844051 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6508 11:07:20.951679 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6509 11:07:21.149753 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6510 11:07:21.170301 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6511 11:07:21.186030 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6512 11:07:21.201896 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6513 11:07:21.247038 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6514 11:07:21.332427 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6515 11:07:21.359054 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6516 11:07:21.381883 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6517 11:07:21.459681 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6518 11:07:21.478892 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6519 11:07:21.496663 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6520 11:07:21.519566 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6521 11:07:21.543694 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6522 11:07:21.625077 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6523 11:07:21.642939 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6524 11:07:21.667022 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6525 11:07:21.682837 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6526 11:07:21.710163 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6527 11:07:21.730097 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6528 11:07:21.747128 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6529 11:07:21.770344 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6530 11:07:21.790554 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6531 11:07:21.806643 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6532 11:07:21.825678 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6533 11:07:21.848402 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6534 11:07:21.867522 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6535 11:07:21.916669 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6536 11:07:21.952049 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6537 11:07:22.061844 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6538 11:07:22.091433 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6539 11:07:22.199596 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6540 11:07:22.252347 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6541 11:07:22.274816 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6542 11:07:22.292053 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6543 11:07:22.311475 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6544 11:07:22.347980 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6545 11:07:22.409343 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6546 11:07:22.428097 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6547 11:07:22.448393 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6548 11:07:22.500222 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6549 11:07:22.600503 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6550 11:07:22.676662
6551 11:07:22.679927 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6552 11:07:22.680013
6553 11:07:22.683336 debian-bookworm-arm64 login: root (automatic login)
6554 11:07:22.683412
6555 11:07:22.924779 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Wed Jul 10 10:43:20 UTC 2024 aarch64
6556 11:07:22.924904
6557 11:07:22.931483 The programs included with the Debian GNU/Linux system are free software;
6558 11:07:22.937906 the exact distribution terms for each program are described in the
6559 11:07:22.941181 individual files in /usr/share/doc/*/copyright.
6560 11:07:22.941258
6561 11:07:22.947921 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6562 11:07:22.950964 permitted by applicable law.
6563 11:07:23.034305 Matched prompt #10: / #
6565 11:07:23.035872 Setting prompt string to ['/ #']
6566 11:07:23.036420 end: 2.2.5.1 login-action (duration 00:00:18) [common]
6568 11:07:23.037818 end: 2.2.5 auto-login-action (duration 00:00:18) [common]
6569 11:07:23.038355 start: 2.2.6 expect-shell-connection (timeout 00:03:48) [common]
6570 11:07:23.038664 Setting prompt string to ['/ #']
6571 11:07:23.038942 Forcing a shell prompt, looking for ['/ #']
6572 11:07:23.039219 Sending line: ''
6574 11:07:23.090293 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6575 11:07:23.090720 Waiting using forced prompt support (timeout 00:02:30)
6576 11:07:23.095882 / #
6577 11:07:23.096634 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6578 11:07:23.097128 start: 2.2.7 export-device-env (timeout 00:03:48) [common]
6579 11:07:23.097544 Sending line: "export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14786844/extract-nfsrootfs-orzksr3v'"
6581 11:07:23.204581 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14786844/extract-nfsrootfs-orzksr3v'
6582 11:07:23.205196 Sending line: "export NFS_SERVER_IP='192.168.201.1'"
6584 11:07:23.312422 / # export NFS_SERVER_IP='192.168.201.1'
6585 11:07:23.313244 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6586 11:07:23.313912 end: 2.2 depthcharge-retry (duration 00:01:12) [common]
6587 11:07:23.314573 end: 2 depthcharge-action (duration 00:01:12) [common]
6588 11:07:23.315020 start: 3 lava-test-retry (timeout 00:01:00) [common]
6589 11:07:23.315426 start: 3.1 lava-test-shell (timeout 00:01:00) [common]
6590 11:07:23.315746 Using namespace: common
6591 11:07:23.316066 Sending line: '#'
6593 11:07:23.417257 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:01:00)
6594 11:07:23.422862 / # #
6595 11:07:23.423532 Using /lava-14786844
6596 11:07:23.423847 Sending line: 'export SHELL=/bin/sh'
6598 11:07:23.531152 / # export SHELL=/bin/sh
6599 11:07:23.531800 Sending line: '. /lava-14786844/environment'
6601 11:07:23.638490 / # . /lava-14786844/environment
6602 11:07:23.644985 Sending line: '/lava-14786844/bin/lava-test-runner /lava-14786844/0'
6604 11:07:23.746254 Test shell timeout: 10s (minimum of the action and connection timeout)
6605 11:07:23.752036 / # /lava-14786844/bin/lava-test-runner /lava-14786844/0
6606 11:07:23.979653 + export TESTRUN_ID=0_dmesg
6607 11:07:23.982381 + cd /lava-14786844/0/tests/0_dmesg
6608 11:07:23.985787 + cat uuid
6609 11:07:23.995190 + UUID=14786844_1.<8>[ 18.372533] <LAVA_SIGNAL_STARTRUN 0_dmesg 14786844_1.6.2.3.1>
6610 11:07:23.995278 6.2.3.1
6611 11:07:23.995348 + set +x
6612 11:07:23.995591 Received signal: <STARTRUN> 0_dmesg 14786844_1.6.2.3.1
6613 11:07:23.995661 Starting test lava.0_dmesg (14786844_1.6.2.3.1)
6614 11:07:23.995742 Skipping test definition patterns.
6615 11:07:23.998441 + KERNELCI_LAVA=y /bin/sh /opt/kernelci/dmesg.sh
6616 11:07:24.092490 <8>[ 18.469956] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0>
6617 11:07:24.093041 Received signal: <TESTCASE> TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0
6619 11:07:24.173816 <8>[ 18.550403] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0>
6620 11:07:24.174530 Received signal: <TESTCASE> TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0
6622 11:07:24.248187 <8>[ 18.625830] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0>
6623 11:07:24.248446 Received signal: <TESTCASE> TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0
6625 11:07:24.252903 + set +x
6626 11:07:24.255743 Received signal: <ENDRUN> 0_dmesg 14786844_1.6.2.3.1
6627 11:07:24.255828 Ending use of test pattern.
6628 11:07:24.255887 Ending test lava.0_dmesg (14786844_1.6.2.3.1), duration 0.26
6630 11:07:24.258501 <8>[ 18.636436] <LAVA_SIGNAL_ENDRUN 0_dmesg 14786844_1.6.2.3.1>
6631 11:07:24.262098 <LAVA_TEST_RUNNER EXIT>
6632 11:07:24.262339 ok: lava_test_shell seems to have completed
6633 11:07:24.262432 crit: pass
alert: pass
emerg: pass
6634 11:07:24.262517 end: 3.1 lava-test-shell (duration 00:00:01) [common]
6635 11:07:24.262592 end: 3 lava-test-retry (duration 00:00:01) [common]
6636 11:07:24.262667 start: 4 finalize (timeout 00:08:21) [common]
6637 11:07:24.262747 start: 4.1 power-off (timeout 00:00:30) [common]
6638 11:07:24.262869 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=off']
6639 11:07:26.354832 >> Command sent successfully.
6640 11:07:26.368961 Returned 0 in 2 seconds
6641 11:07:26.369527 end: 4.1 power-off (duration 00:00:02) [common]
6643 11:07:26.370503 start: 4.2 read-feedback (timeout 00:08:19) [common]
6644 11:07:26.371086 Listened to connection for namespace 'common' for up to 1s
6645 11:07:27.372186 Finalising connection for namespace 'common'
6646 11:07:27.372713 Disconnecting from shell: Finalise
6647 11:07:27.373063 / #
6648 11:07:27.473800 end: 4.2 read-feedback (duration 00:00:01) [common]
6649 11:07:27.474476 end: 4 finalize (duration 00:00:03) [common]
6650 11:07:27.475194 Cleaning after the job
6651 11:07:27.475711 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/ramdisk
6652 11:07:27.486082 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/kernel
6653 11:07:27.514851 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/dtb
6654 11:07:27.515138 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/nfsrootfs
6655 11:07:27.578769 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786844/tftp-deploy-au1nb48_/modules
6656 11:07:27.584417 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14786844
6657 11:07:27.917895 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14786844
6658 11:07:27.918082 Job finished correctly