Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 40
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 84
1 11:01:50.503996 lava-dispatcher, installed at version: 2024.05
2 11:01:50.504216 start: 0 validate
3 11:01:50.504350 Start time: 2024-07-10 11:01:50.504341+00:00 (UTC)
4 11:01:50.504530 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:01:50.504691 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-cros-ec%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 11:01:50.825404 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:01:50.825582 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 11:02:04.318199 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:02:04.318394 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 11:02:25.245395 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:02:25.246012 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.96-cip24%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
12 11:02:25.780240 validate duration: 35.28
14 11:02:25.781404 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:02:25.781900 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:02:25.782310 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:02:25.782931 Not decompressing ramdisk as can be used compressed.
18 11:02:25.783337 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-cros-ec/20240313.0/arm64/rootfs.cpio.gz
19 11:02:25.783670 saving as /var/lib/lava/dispatcher/tmp/14786787/tftp-deploy-lr8rpyez/ramdisk/rootfs.cpio.gz
20 11:02:25.783993 total size: 39026414 (37 MB)
21 11:02:30.009013 progress 0 % (0 MB)
22 11:02:30.019818 progress 5 % (1 MB)
23 11:02:30.030416 progress 10 % (3 MB)
24 11:02:30.040812 progress 15 % (5 MB)
25 11:02:30.051369 progress 20 % (7 MB)
26 11:02:30.061809 progress 25 % (9 MB)
27 11:02:30.072335 progress 30 % (11 MB)
28 11:02:30.082685 progress 35 % (13 MB)
29 11:02:30.093213 progress 40 % (14 MB)
30 11:02:30.103710 progress 45 % (16 MB)
31 11:02:30.114305 progress 50 % (18 MB)
32 11:02:30.124999 progress 55 % (20 MB)
33 11:02:30.135410 progress 60 % (22 MB)
34 11:02:30.146027 progress 65 % (24 MB)
35 11:02:30.156466 progress 70 % (26 MB)
36 11:02:30.167025 progress 75 % (27 MB)
37 11:02:30.177334 progress 80 % (29 MB)
38 11:02:30.187914 progress 85 % (31 MB)
39 11:02:30.198284 progress 90 % (33 MB)
40 11:02:30.208821 progress 95 % (35 MB)
41 11:02:30.219073 progress 100 % (37 MB)
42 11:02:30.219348 37 MB downloaded in 4.44 s (8.39 MB/s)
43 11:02:30.219511 end: 1.1.1 http-download (duration 00:00:04) [common]
45 11:02:30.219760 end: 1.1 download-retry (duration 00:00:04) [common]
46 11:02:30.219849 start: 1.2 download-retry (timeout 00:09:56) [common]
47 11:02:30.219935 start: 1.2.1 http-download (timeout 00:09:56) [common]
48 11:02:30.220080 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
49 11:02:30.220149 saving as /var/lib/lava/dispatcher/tmp/14786787/tftp-deploy-lr8rpyez/kernel/Image
50 11:02:30.220211 total size: 54813184 (52 MB)
51 11:02:30.220272 No compression specified
52 11:02:30.221424 progress 0 % (0 MB)
53 11:02:30.236157 progress 5 % (2 MB)
54 11:02:30.251152 progress 10 % (5 MB)
55 11:02:30.266604 progress 15 % (7 MB)
56 11:02:30.282410 progress 20 % (10 MB)
57 11:02:30.299175 progress 25 % (13 MB)
58 11:02:30.314697 progress 30 % (15 MB)
59 11:02:30.330704 progress 35 % (18 MB)
60 11:02:30.346088 progress 40 % (20 MB)
61 11:02:30.360765 progress 45 % (23 MB)
62 11:02:30.375662 progress 50 % (26 MB)
63 11:02:30.390497 progress 55 % (28 MB)
64 11:02:30.405067 progress 60 % (31 MB)
65 11:02:30.419896 progress 65 % (34 MB)
66 11:02:30.434472 progress 70 % (36 MB)
67 11:02:30.449274 progress 75 % (39 MB)
68 11:02:30.464125 progress 80 % (41 MB)
69 11:02:30.478662 progress 85 % (44 MB)
70 11:02:30.493493 progress 90 % (47 MB)
71 11:02:30.508368 progress 95 % (49 MB)
72 11:02:30.522794 progress 100 % (52 MB)
73 11:02:30.523037 52 MB downloaded in 0.30 s (172.62 MB/s)
74 11:02:30.523200 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:02:30.523435 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:02:30.523525 start: 1.3 download-retry (timeout 00:09:55) [common]
78 11:02:30.523609 start: 1.3.1 http-download (timeout 00:09:55) [common]
79 11:02:30.523776 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 11:02:30.523845 saving as /var/lib/lava/dispatcher/tmp/14786787/tftp-deploy-lr8rpyez/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 11:02:30.523904 total size: 57695 (0 MB)
82 11:02:30.523965 No compression specified
83 11:02:30.525064 progress 56 % (0 MB)
84 11:02:30.525347 progress 100 % (0 MB)
85 11:02:30.525556 0 MB downloaded in 0.00 s (33.36 MB/s)
86 11:02:30.525681 end: 1.3.1 http-download (duration 00:00:00) [common]
88 11:02:30.525906 end: 1.3 download-retry (duration 00:00:00) [common]
89 11:02:30.525989 start: 1.4 download-retry (timeout 00:09:55) [common]
90 11:02:30.526073 start: 1.4.1 http-download (timeout 00:09:55) [common]
91 11:02:30.526190 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.96-cip24/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
92 11:02:30.526258 saving as /var/lib/lava/dispatcher/tmp/14786787/tftp-deploy-lr8rpyez/modules/modules.tar
93 11:02:30.526316 total size: 8607984 (8 MB)
94 11:02:30.526375 Using unxz to decompress xz
95 11:02:30.527763 progress 0 % (0 MB)
96 11:02:30.549851 progress 5 % (0 MB)
97 11:02:30.576222 progress 10 % (0 MB)
98 11:02:30.602584 progress 15 % (1 MB)
99 11:02:30.629065 progress 20 % (1 MB)
100 11:02:30.654601 progress 25 % (2 MB)
101 11:02:30.680653 progress 30 % (2 MB)
102 11:02:30.704805 progress 35 % (2 MB)
103 11:02:30.733480 progress 40 % (3 MB)
104 11:02:30.759473 progress 45 % (3 MB)
105 11:02:30.785288 progress 50 % (4 MB)
106 11:02:30.811672 progress 55 % (4 MB)
107 11:02:30.837407 progress 60 % (4 MB)
108 11:02:30.862459 progress 65 % (5 MB)
109 11:02:30.889457 progress 70 % (5 MB)
110 11:02:30.918567 progress 75 % (6 MB)
111 11:02:30.948428 progress 80 % (6 MB)
112 11:02:30.973958 progress 85 % (7 MB)
113 11:02:30.998957 progress 90 % (7 MB)
114 11:02:31.024020 progress 95 % (7 MB)
115 11:02:31.048425 progress 100 % (8 MB)
116 11:02:31.054122 8 MB downloaded in 0.53 s (15.55 MB/s)
117 11:02:31.054309 end: 1.4.1 http-download (duration 00:00:01) [common]
119 11:02:31.054547 end: 1.4 download-retry (duration 00:00:01) [common]
120 11:02:31.054636 start: 1.5 prepare-tftp-overlay (timeout 00:09:55) [common]
121 11:02:31.054723 start: 1.5.1 extract-nfsrootfs (timeout 00:09:55) [common]
122 11:02:31.054802 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 11:02:31.054881 start: 1.5.2 lava-overlay (timeout 00:09:55) [common]
124 11:02:31.055062 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift
125 11:02:31.055193 makedir: /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin
126 11:02:31.055294 makedir: /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/tests
127 11:02:31.055392 makedir: /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/results
128 11:02:31.055485 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-add-keys
129 11:02:31.055626 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-add-sources
130 11:02:31.055755 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-background-process-start
131 11:02:31.055883 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-background-process-stop
132 11:02:31.056022 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-common-functions
133 11:02:31.056150 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-echo-ipv4
134 11:02:31.056275 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-install-packages
135 11:02:31.056398 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-installed-packages
136 11:02:31.056532 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-os-build
137 11:02:31.056655 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-probe-channel
138 11:02:31.056777 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-probe-ip
139 11:02:31.056900 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-target-ip
140 11:02:31.057022 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-target-mac
141 11:02:31.057144 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-target-storage
142 11:02:31.057272 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-test-case
143 11:02:31.057396 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-test-event
144 11:02:31.057516 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-test-feedback
145 11:02:31.057645 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-test-raise
146 11:02:31.057773 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-test-reference
147 11:02:31.057917 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-test-runner
148 11:02:31.058040 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-test-set
149 11:02:31.058162 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-test-shell
150 11:02:31.058285 Updating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-install-packages (oe)
151 11:02:31.058436 Updating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/bin/lava-installed-packages (oe)
152 11:02:31.058556 Creating /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/environment
153 11:02:31.058655 LAVA metadata
154 11:02:31.058725 - LAVA_JOB_ID=14786787
155 11:02:31.058786 - LAVA_DISPATCHER_IP=192.168.201.1
156 11:02:31.058883 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:55) [common]
157 11:02:31.058944 skipped lava-vland-overlay
158 11:02:31.059016 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 11:02:31.059093 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:55) [common]
160 11:02:31.059152 skipped lava-multinode-overlay
161 11:02:31.059222 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 11:02:31.059298 start: 1.5.2.3 test-definition (timeout 00:09:55) [common]
163 11:02:31.059375 Loading test definitions
164 11:02:31.059458 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:55) [common]
165 11:02:31.059550 Using /lava-14786787 at stage 0
166 11:02:31.059885 uuid=14786787_1.5.2.3.1 testdef=None
167 11:02:31.059975 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 11:02:31.060059 start: 1.5.2.3.2 test-overlay (timeout 00:09:55) [common]
169 11:02:31.060537 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 11:02:31.060753 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:55) [common]
172 11:02:31.061364 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 11:02:31.061591 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:55) [common]
175 11:02:31.062185 runner path: /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/0/tests/0_cros-ec test_uuid 14786787_1.5.2.3.1
176 11:02:31.062341 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 11:02:31.062550 Creating lava-test-runner.conf files
179 11:02:31.062612 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14786787/lava-overlay-_v9cjift/lava-14786787/0 for stage 0
180 11:02:31.062701 - 0_cros-ec
181 11:02:31.062799 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 11:02:31.062886 start: 1.5.2.4 compress-overlay (timeout 00:09:55) [common]
183 11:02:31.069829 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 11:02:31.069934 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:55) [common]
185 11:02:31.070019 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 11:02:31.070103 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 11:02:31.070185 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:55) [common]
188 11:02:32.265436 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 11:02:32.265592 start: 1.5.4 extract-modules (timeout 00:09:54) [common]
190 11:02:32.265674 extracting modules file /var/lib/lava/dispatcher/tmp/14786787/tftp-deploy-lr8rpyez/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14786787/extract-overlay-ramdisk-_rwtf0xp/ramdisk
191 11:02:32.520447 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 11:02:32.520608 start: 1.5.5 apply-overlay-tftp (timeout 00:09:53) [common]
193 11:02:32.520699 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14786787/compress-overlay-a_ewzca_/overlay-1.5.2.4.tar.gz to ramdisk
194 11:02:32.520767 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14786787/compress-overlay-a_ewzca_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14786787/extract-overlay-ramdisk-_rwtf0xp/ramdisk
195 11:02:32.527803 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 11:02:32.527908 start: 1.5.6 configure-preseed-file (timeout 00:09:53) [common]
197 11:02:32.527999 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 11:02:32.528084 start: 1.5.7 compress-ramdisk (timeout 00:09:53) [common]
199 11:02:32.528156 Building ramdisk /var/lib/lava/dispatcher/tmp/14786787/extract-overlay-ramdisk-_rwtf0xp/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14786787/extract-overlay-ramdisk-_rwtf0xp/ramdisk
200 11:02:33.319392 >> 335381 blocks
201 11:02:39.227720 rename /var/lib/lava/dispatcher/tmp/14786787/extract-overlay-ramdisk-_rwtf0xp/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14786787/tftp-deploy-lr8rpyez/ramdisk/ramdisk.cpio.gz
202 11:02:39.227903 end: 1.5.7 compress-ramdisk (duration 00:00:07) [common]
203 11:02:39.228002 start: 1.5.8 prepare-kernel (timeout 00:09:47) [common]
204 11:02:39.228090 start: 1.5.8.1 prepare-fit (timeout 00:09:47) [common]
205 11:02:39.228174 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14786787/tftp-deploy-lr8rpyez/kernel/Image']
206 11:02:53.827904 Returned 0 in 14 seconds
207 11:02:53.828084 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14786787/tftp-deploy-lr8rpyez/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14786787/tftp-deploy-lr8rpyez/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14786787/tftp-deploy-lr8rpyez/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14786787/tftp-deploy-lr8rpyez/kernel/image.itb
208 11:02:54.625583 output: FIT description: Kernel Image image with one or more FDT blobs
209 11:02:54.625722 output: Created: Wed Jul 10 12:02:54 2024
210 11:02:54.625792 output: Image 0 (kernel-1)
211 11:02:54.625853 output: Description:
212 11:02:54.625910 output: Created: Wed Jul 10 12:02:54 2024
213 11:02:54.625967 output: Type: Kernel Image
214 11:02:54.626023 output: Compression: lzma compressed
215 11:02:54.626080 output: Data Size: 13116259 Bytes = 12808.85 KiB = 12.51 MiB
216 11:02:54.626135 output: Architecture: AArch64
217 11:02:54.626188 output: OS: Linux
218 11:02:54.626241 output: Load Address: 0x00000000
219 11:02:54.626295 output: Entry Point: 0x00000000
220 11:02:54.626347 output: Hash algo: crc32
221 11:02:54.626400 output: Hash value: 9bb85fb9
222 11:02:54.626454 output: Image 1 (fdt-1)
223 11:02:54.626507 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 11:02:54.626560 output: Created: Wed Jul 10 12:02:54 2024
225 11:02:54.626613 output: Type: Flat Device Tree
226 11:02:54.626667 output: Compression: uncompressed
227 11:02:54.626720 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 11:02:54.626774 output: Architecture: AArch64
229 11:02:54.626827 output: Hash algo: crc32
230 11:02:54.626880 output: Hash value: a9713552
231 11:02:54.626932 output: Image 2 (ramdisk-1)
232 11:02:54.626984 output: Description: unavailable
233 11:02:54.627037 output: Created: Wed Jul 10 12:02:54 2024
234 11:02:54.627089 output: Type: RAMDisk Image
235 11:02:54.627142 output: Compression: uncompressed
236 11:02:54.627195 output: Data Size: 52108510 Bytes = 50887.22 KiB = 49.69 MiB
237 11:02:54.627247 output: Architecture: AArch64
238 11:02:54.627299 output: OS: Linux
239 11:02:54.627351 output: Load Address: unavailable
240 11:02:54.627404 output: Entry Point: unavailable
241 11:02:54.627457 output: Hash algo: crc32
242 11:02:54.627510 output: Hash value: 635dfc4c
243 11:02:54.627562 output: Default Configuration: 'conf-1'
244 11:02:54.627614 output: Configuration 0 (conf-1)
245 11:02:54.627666 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 11:02:54.627719 output: Kernel: kernel-1
247 11:02:54.627771 output: Init Ramdisk: ramdisk-1
248 11:02:54.627825 output: FDT: fdt-1
249 11:02:54.627878 output: Loadables: kernel-1
250 11:02:54.627931 output:
251 11:02:54.628037 end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
252 11:02:54.628118 end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
253 11:02:54.628200 end: 1.5 prepare-tftp-overlay (duration 00:00:24) [common]
254 11:02:54.628282 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:31) [common]
255 11:02:54.628346 No LXC device requested
256 11:02:54.628424 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 11:02:54.628540 start: 1.7 deploy-device-env (timeout 00:09:31) [common]
258 11:02:54.628617 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 11:02:54.628683 Checking files for TFTP limit of 4294967296 bytes.
260 11:02:54.629084 end: 1 tftp-deploy (duration 00:00:29) [common]
261 11:02:54.629181 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 11:02:54.629268 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 11:02:54.629367 substitutions:
264 11:02:54.629434 - {DTB}: 14786787/tftp-deploy-lr8rpyez/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 11:02:54.629495 - {INITRD}: 14786787/tftp-deploy-lr8rpyez/ramdisk/ramdisk.cpio.gz
266 11:02:54.629553 - {KERNEL}: 14786787/tftp-deploy-lr8rpyez/kernel/Image
267 11:02:54.629610 - {LAVA_MAC}: None
268 11:02:54.629665 - {PRESEED_CONFIG}: None
269 11:02:54.629721 - {PRESEED_LOCAL}: None
270 11:02:54.629776 - {RAMDISK}: 14786787/tftp-deploy-lr8rpyez/ramdisk/ramdisk.cpio.gz
271 11:02:54.629840 - {ROOT_PART}: None
272 11:02:54.629895 - {ROOT}: None
273 11:02:54.629949 - {SERVER_IP}: 192.168.201.1
274 11:02:54.630004 - {TEE}: None
275 11:02:54.630058 Parsed boot commands:
276 11:02:54.630110 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 11:02:54.630262 Parsed boot commands: tftpboot 192.168.201.1 14786787/tftp-deploy-lr8rpyez/kernel/image.itb 14786787/tftp-deploy-lr8rpyez/kernel/cmdline
278 11:02:54.630352 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 11:02:54.630433 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 11:02:54.630513 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 11:02:54.630590 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 11:02:54.630650 Not connected, no need to disconnect.
283 11:02:54.630721 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 11:02:54.630795 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 11:02:54.630855 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
286 11:02:54.633843 Setting prompt string to ['lava-test: # ']
287 11:02:54.634183 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 11:02:54.634282 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 11:02:54.634376 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 11:02:54.634464 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 11:02:54.634659 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=reboot']
292 11:03:03.773917 >> Command sent successfully.
293 11:03:03.777453 Returned 0 in 9 seconds
294 11:03:03.777628 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
296 11:03:03.777966 end: 2.2.2 reset-device (duration 00:00:09) [common]
297 11:03:03.778090 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
298 11:03:03.778194 Setting prompt string to 'Starting depthcharge on Juniper...'
299 11:03:03.778286 Changing prompt to 'Starting depthcharge on Juniper...'
300 11:03:03.778386 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
301 11:03:03.778919 [Enter `^Ec?' for help]
302 11:03:12.205376 [DL] 00000000 00000000 010701
303 11:03:12.210459
304 11:03:12.210559
305 11:03:12.210647 F0: 102B 0000
306 11:03:12.210817
307 11:03:12.210956 F3: 1006 0033 [0200]
308 11:03:12.213375
309 11:03:12.213509 F3: 4001 00E0 [0200]
310 11:03:12.213612
311 11:03:12.213703 F3: 0000 0000
312 11:03:12.216884
313 11:03:12.216989 V0: 0000 0000 [0001]
314 11:03:12.217095
315 11:03:12.217220 00: 1027 0002
316 11:03:12.217321
317 11:03:12.220262 01: 0000 0000
318 11:03:12.220380
319 11:03:12.220489 BP: 0C00 0251 [0000]
320 11:03:12.220555
321 11:03:12.223736 G0: 1182 0000
322 11:03:12.223845
323 11:03:12.223941 EC: 0004 0000 [0001]
324 11:03:12.224032
325 11:03:12.226783 S7: 0000 0000 [0000]
326 11:03:12.226868
327 11:03:12.226932 CC: 0000 0000 [0001]
328 11:03:12.230347
329 11:03:12.230431 T0: 0000 00DB [000F]
330 11:03:12.230497
331 11:03:12.230556 Jump to BL
332 11:03:12.230616
333 11:03:12.266129
334 11:03:12.266216
335 11:03:12.272633 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
336 11:03:12.276425 ARM64: Exception handlers installed.
337 11:03:12.279670 ARM64: Testing exception
338 11:03:12.283045 ARM64: Done test exception
339 11:03:12.287168 WDT: Last reset was cold boot
340 11:03:12.287253 SPI0(PAD0) initialized at 992727 Hz
341 11:03:12.293775 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
342 11:03:12.293860 Manufacturer: ef
343 11:03:12.300282 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
344 11:03:12.313056 Probing TPM: . done!
345 11:03:12.313140 TPM ready after 0 ms
346 11:03:12.319856 Connected to device vid:did:rid of 1ae0:0028:00
347 11:03:12.326203 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
348 11:03:12.330111 Initialized TPM device CR50 revision 0
349 11:03:12.372829 tlcl_send_startup: Startup return code is 0
350 11:03:12.372918 TPM: setup succeeded
351 11:03:12.382188 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
352 11:03:12.385429 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
353 11:03:12.388571 in-header: 03 19 00 00 08 00 00 00
354 11:03:12.392431 in-data: a2 e0 47 00 13 00 00 00
355 11:03:12.395271 Chrome EC: UHEPI supported
356 11:03:12.402078 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
357 11:03:12.405358 in-header: 03 a1 00 00 08 00 00 00
358 11:03:12.409134 in-data: 84 60 60 10 00 00 00 00
359 11:03:12.409220 Phase 1
360 11:03:12.412436 FMAP: area GBB found @ 3f5000 (12032 bytes)
361 11:03:12.418903 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
362 11:03:12.425181 VB2:vb2_check_recovery() Recovery was requested manually
363 11:03:12.428695 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
364 11:03:12.434761 Recovery requested (1009000e)
365 11:03:12.443766 tlcl_extend: response is 0
366 11:03:12.448885 tlcl_extend: response is 0
367 11:03:12.473877
368 11:03:12.473961
369 11:03:12.480694 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
370 11:03:12.483832 ARM64: Exception handlers installed.
371 11:03:12.487383 ARM64: Testing exception
372 11:03:12.490549 ARM64: Done test exception
373 11:03:12.506281 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2017
374 11:03:12.512824 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
375 11:03:12.515994 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
376 11:03:12.524722 [RTC]rtc_get_frequency_meter,134: input=0xf, output=919
377 11:03:12.531254 [RTC]rtc_get_frequency_meter,134: input=0x7, output=781
378 11:03:12.538293 [RTC]rtc_get_frequency_meter,134: input=0xb, output=849
379 11:03:12.545588 [RTC]rtc_get_frequency_meter,134: input=0x9, output=814
380 11:03:12.552307 [RTC]rtc_get_frequency_meter,134: input=0x8, output=798
381 11:03:12.558803 [RTC]rtc_get_frequency_meter,134: input=0x7, output=779
382 11:03:12.565799 [RTC]rtc_get_frequency_meter,134: input=0x8, output=799
383 11:03:12.569514 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
384 11:03:12.576081 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
385 11:03:12.579204 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
386 11:03:12.582446 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
387 11:03:12.585764 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
388 11:03:12.589165 in-header: 03 19 00 00 08 00 00 00
389 11:03:12.592925 in-data: a2 e0 47 00 13 00 00 00
390 11:03:12.595901 Chrome EC: UHEPI supported
391 11:03:12.602657 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
392 11:03:12.606383 in-header: 03 a1 00 00 08 00 00 00
393 11:03:12.609656 in-data: 84 60 60 10 00 00 00 00
394 11:03:12.612583 Skip loading cached calibration data
395 11:03:12.619577 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
396 11:03:12.623276 in-header: 03 a1 00 00 08 00 00 00
397 11:03:12.626292 in-data: 84 60 60 10 00 00 00 00
398 11:03:12.632731 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
399 11:03:12.636319 in-header: 03 a1 00 00 08 00 00 00
400 11:03:12.639747 in-data: 84 60 60 10 00 00 00 00
401 11:03:12.642882 ADC[3]: Raw value=216571 ID=1
402 11:03:12.642964 Manufacturer: ef
403 11:03:12.650026 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
404 11:03:12.653032 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
405 11:03:12.656700 CBFS @ 21000 size 3d4000
406 11:03:12.659684 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
407 11:03:12.666503 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
408 11:03:12.669646 CBFS: Found @ offset 3c700 size 44
409 11:03:12.669728 DRAM-K: Full Calibration
410 11:03:12.676591 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
411 11:03:12.676674 CBFS @ 21000 size 3d4000
412 11:03:12.682906 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
413 11:03:12.686380 CBFS: Locating 'fallback/dram'
414 11:03:12.689532 CBFS: Found @ offset 24b00 size 12268
415 11:03:12.717016 read SPI 0x45b44 0x1224c: 22775 us, 3263 KB/s, 26.104 Mbps
416 11:03:12.720460 ddr_geometry: 1, config: 0x0
417 11:03:12.723843 header.status = 0x0
418 11:03:12.727176 header.magic = 0x44524d4b (expected: 0x44524d4b)
419 11:03:12.730207 header.version = 0x5 (expected: 0x5)
420 11:03:12.733657 header.size = 0x8f0 (expected: 0x8f0)
421 11:03:12.733742 header.config = 0x0
422 11:03:12.737085 header.flags = 0x0
423 11:03:12.740285 header.checksum = 0x0
424 11:03:12.743500 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
425 11:03:12.750348 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
426 11:03:12.753846 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
427 11:03:12.757213 ddr_geometry:1
428 11:03:12.760507 [EMI] new MDL number = 1
429 11:03:12.760592 dram_cbt_mode_extern: 0
430 11:03:12.763994 dram_cbt_mode [RK0]: 0, [RK1]: 0
431 11:03:12.770472 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
432 11:03:12.770557
433 11:03:12.770622
434 11:03:12.774099 [Bianco] ETT version 0.0.0.1
435 11:03:12.777385 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
436 11:03:12.777469
437 11:03:12.780413 vSetVcoreByFreq with vcore:762500, freq=1600
438 11:03:12.780507
439 11:03:12.784066 [DramcInit]
440 11:03:12.784153 AutoRefreshCKEOff AutoREF OFF
441 11:03:12.787008 DDRPhyPLLSetting-CKEOFF
442 11:03:12.790303 DDRPhyPLLSetting-CKEON
443 11:03:12.790387
444 11:03:12.790451 Enable WDQS
445 11:03:12.794184 [ModeRegInit_LP4] CH0 RK0
446 11:03:12.797784 Write Rank0 MR13 =0x18
447 11:03:12.797867 Write Rank0 MR12 =0x5d
448 11:03:12.801003 Write Rank0 MR1 =0x56
449 11:03:12.804297 Write Rank0 MR2 =0x1a
450 11:03:12.804381 Write Rank0 MR11 =0x0
451 11:03:12.808083 Write Rank0 MR22 =0x38
452 11:03:12.808167 Write Rank0 MR14 =0x5d
453 11:03:12.811185 Write Rank0 MR3 =0x30
454 11:03:12.814407 Write Rank0 MR13 =0x58
455 11:03:12.814490 Write Rank0 MR12 =0x5d
456 11:03:12.817761 Write Rank0 MR1 =0x56
457 11:03:12.817845 Write Rank0 MR2 =0x2d
458 11:03:12.821279 Write Rank0 MR11 =0x23
459 11:03:12.824562 Write Rank0 MR22 =0x34
460 11:03:12.824646 Write Rank0 MR14 =0x10
461 11:03:12.828298 Write Rank0 MR3 =0x30
462 11:03:12.831131 Write Rank0 MR13 =0xd8
463 11:03:12.831215 [ModeRegInit_LP4] CH0 RK1
464 11:03:12.834593 Write Rank1 MR13 =0x18
465 11:03:12.834677 Write Rank1 MR12 =0x5d
466 11:03:12.837735 Write Rank1 MR1 =0x56
467 11:03:12.841276 Write Rank1 MR2 =0x1a
468 11:03:12.841359 Write Rank1 MR11 =0x0
469 11:03:12.844420 Write Rank1 MR22 =0x38
470 11:03:12.844522 Write Rank1 MR14 =0x5d
471 11:03:12.848107 Write Rank1 MR3 =0x30
472 11:03:12.851278 Write Rank1 MR13 =0x58
473 11:03:12.851362 Write Rank1 MR12 =0x5d
474 11:03:12.854716 Write Rank1 MR1 =0x56
475 11:03:12.854800 Write Rank1 MR2 =0x2d
476 11:03:12.857932 Write Rank1 MR11 =0x23
477 11:03:12.861265 Write Rank1 MR22 =0x34
478 11:03:12.861347 Write Rank1 MR14 =0x10
479 11:03:12.864543 Write Rank1 MR3 =0x30
480 11:03:12.867823 Write Rank1 MR13 =0xd8
481 11:03:12.867906 [ModeRegInit_LP4] CH1 RK0
482 11:03:12.871207 Write Rank0 MR13 =0x18
483 11:03:12.871294 Write Rank0 MR12 =0x5d
484 11:03:12.874803 Write Rank0 MR1 =0x56
485 11:03:12.878283 Write Rank0 MR2 =0x1a
486 11:03:12.878369 Write Rank0 MR11 =0x0
487 11:03:12.881546 Write Rank0 MR22 =0x38
488 11:03:12.881629 Write Rank0 MR14 =0x5d
489 11:03:12.884834 Write Rank0 MR3 =0x30
490 11:03:12.888232 Write Rank0 MR13 =0x58
491 11:03:12.888315 Write Rank0 MR12 =0x5d
492 11:03:12.891452 Write Rank0 MR1 =0x56
493 11:03:12.891535 Write Rank0 MR2 =0x2d
494 11:03:12.894728 Write Rank0 MR11 =0x23
495 11:03:12.897938 Write Rank0 MR22 =0x34
496 11:03:12.898022 Write Rank0 MR14 =0x10
497 11:03:12.901413 Write Rank0 MR3 =0x30
498 11:03:12.904745 Write Rank0 MR13 =0xd8
499 11:03:12.904829 [ModeRegInit_LP4] CH1 RK1
500 11:03:12.907895 Write Rank1 MR13 =0x18
501 11:03:12.907977 Write Rank1 MR12 =0x5d
502 11:03:12.911503 Write Rank1 MR1 =0x56
503 11:03:12.914715 Write Rank1 MR2 =0x1a
504 11:03:12.914799 Write Rank1 MR11 =0x0
505 11:03:12.918462 Write Rank1 MR22 =0x38
506 11:03:12.918545 Write Rank1 MR14 =0x5d
507 11:03:12.921540 Write Rank1 MR3 =0x30
508 11:03:12.924894 Write Rank1 MR13 =0x58
509 11:03:12.924977 Write Rank1 MR12 =0x5d
510 11:03:12.928096 Write Rank1 MR1 =0x56
511 11:03:12.928180 Write Rank1 MR2 =0x2d
512 11:03:12.931347 Write Rank1 MR11 =0x23
513 11:03:12.935076 Write Rank1 MR22 =0x34
514 11:03:12.935160 Write Rank1 MR14 =0x10
515 11:03:12.938106 Write Rank1 MR3 =0x30
516 11:03:12.941587 Write Rank1 MR13 =0xd8
517 11:03:12.941671 match AC timing 3
518 11:03:12.951496 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
519 11:03:12.951581 [MiockJmeterHQA]
520 11:03:12.957807 vSetVcoreByFreq with vcore:762500, freq=1600
521 11:03:13.062560
522 11:03:13.062673 MIOCK jitter meter ch=0
523 11:03:13.062737
524 11:03:13.065624 1T = (102-17) = 85 dly cells
525 11:03:13.072444 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
526 11:03:13.075745 vSetVcoreByFreq with vcore:725000, freq=1200
527 11:03:13.174946
528 11:03:13.175042 MIOCK jitter meter ch=0
529 11:03:13.175108
530 11:03:13.178255 1T = (96-16) = 80 dly cells
531 11:03:13.186206 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
532 11:03:13.189501 vSetVcoreByFreq with vcore:725000, freq=800
533 11:03:13.287202
534 11:03:13.287461 MIOCK jitter meter ch=0
535 11:03:13.287612
536 11:03:13.290584 1T = (96-16) = 80 dly cells
537 11:03:13.297425 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
538 11:03:13.300584 vSetVcoreByFreq with vcore:762500, freq=1600
539 11:03:13.303631 vSetVcoreByFreq with vcore:762500, freq=1600
540 11:03:13.303719
541 11:03:13.303786 K DRVP
542 11:03:13.306928 1. OCD DRVP=0 CALOUT=0
543 11:03:13.310466 1. OCD DRVP=1 CALOUT=0
544 11:03:13.310555 1. OCD DRVP=2 CALOUT=0
545 11:03:13.313628 1. OCD DRVP=3 CALOUT=0
546 11:03:13.313714 1. OCD DRVP=4 CALOUT=0
547 11:03:13.317048 1. OCD DRVP=5 CALOUT=0
548 11:03:13.320769 1. OCD DRVP=6 CALOUT=0
549 11:03:13.320861 1. OCD DRVP=7 CALOUT=0
550 11:03:13.324189 1. OCD DRVP=8 CALOUT=0
551 11:03:13.327173 1. OCD DRVP=9 CALOUT=1
552 11:03:13.327258
553 11:03:13.327323 1. OCD DRVP calibration OK! DRVP=9
554 11:03:13.330667
555 11:03:13.330750
556 11:03:13.330813
557 11:03:13.330872 K ODTN
558 11:03:13.333967 3. OCD ODTN=0 ,CALOUT=1
559 11:03:13.334052 3. OCD ODTN=1 ,CALOUT=1
560 11:03:13.336997 3. OCD ODTN=2 ,CALOUT=1
561 11:03:13.337082 3. OCD ODTN=3 ,CALOUT=1
562 11:03:13.340337 3. OCD ODTN=4 ,CALOUT=1
563 11:03:13.344068 3. OCD ODTN=5 ,CALOUT=1
564 11:03:13.344162 3. OCD ODTN=6 ,CALOUT=1
565 11:03:13.347442 3. OCD ODTN=7 ,CALOUT=0
566 11:03:13.347527
567 11:03:13.350686 3. OCD ODTN calibration OK! ODTN=7
568 11:03:13.350805
569 11:03:13.354039 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
570 11:03:13.357232 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
571 11:03:13.363878 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
572 11:03:13.363962
573 11:03:13.364026 K DRVP
574 11:03:13.367408 1. OCD DRVP=0 CALOUT=0
575 11:03:13.367495 1. OCD DRVP=1 CALOUT=0
576 11:03:13.370565 1. OCD DRVP=2 CALOUT=0
577 11:03:13.374063 1. OCD DRVP=3 CALOUT=0
578 11:03:13.374148 1. OCD DRVP=4 CALOUT=0
579 11:03:13.377541 1. OCD DRVP=5 CALOUT=0
580 11:03:13.377626 1. OCD DRVP=6 CALOUT=0
581 11:03:13.380847 1. OCD DRVP=7 CALOUT=0
582 11:03:13.383987 1. OCD DRVP=8 CALOUT=0
583 11:03:13.384072 1. OCD DRVP=9 CALOUT=0
584 11:03:13.387576 1. OCD DRVP=10 CALOUT=0
585 11:03:13.390663 1. OCD DRVP=11 CALOUT=1
586 11:03:13.390765
587 11:03:13.394310 1. OCD DRVP calibration OK! DRVP=11
588 11:03:13.394395
589 11:03:13.394459
590 11:03:13.394517
591 11:03:13.394572 K ODTN
592 11:03:13.397593 3. OCD ODTN=0 ,CALOUT=1
593 11:03:13.397678 3. OCD ODTN=1 ,CALOUT=1
594 11:03:13.400890 3. OCD ODTN=2 ,CALOUT=1
595 11:03:13.404224 3. OCD ODTN=3 ,CALOUT=1
596 11:03:13.404309 3. OCD ODTN=4 ,CALOUT=1
597 11:03:13.407483 3. OCD ODTN=5 ,CALOUT=1
598 11:03:13.411082 3. OCD ODTN=6 ,CALOUT=1
599 11:03:13.411167 3. OCD ODTN=7 ,CALOUT=1
600 11:03:13.414317 3. OCD ODTN=8 ,CALOUT=1
601 11:03:13.414402 3. OCD ODTN=9 ,CALOUT=1
602 11:03:13.417534 3. OCD ODTN=10 ,CALOUT=1
603 11:03:13.420734 3. OCD ODTN=11 ,CALOUT=1
604 11:03:13.420819 3. OCD ODTN=12 ,CALOUT=1
605 11:03:13.424019 3. OCD ODTN=13 ,CALOUT=1
606 11:03:13.427716 3. OCD ODTN=14 ,CALOUT=1
607 11:03:13.427801 3. OCD ODTN=15 ,CALOUT=0
608 11:03:13.430732
609 11:03:13.430816 3. OCD ODTN calibration OK! ODTN=15
610 11:03:13.434132
611 11:03:13.437323 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
612 11:03:13.440869 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
613 11:03:13.444567 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
614 11:03:13.444651
615 11:03:13.447945 [DramcInit]
616 11:03:13.450903 AutoRefreshCKEOff AutoREF OFF
617 11:03:13.450987 DDRPhyPLLSetting-CKEOFF
618 11:03:13.454326 DDRPhyPLLSetting-CKEON
619 11:03:13.454409
620 11:03:13.454474 Enable WDQS
621 11:03:13.454533 ==
622 11:03:13.460821 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
623 11:03:13.464357 fsp= 1, odt_onoff= 1, Byte mode= 0
624 11:03:13.464443 ==
625 11:03:13.467875 [Duty_Offset_Calibration]
626 11:03:13.467948
627 11:03:13.468008 ===========================
628 11:03:13.471186 B0:1 B1:1 CA:1
629 11:03:13.490095 ==
630 11:03:13.493070 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
631 11:03:13.496411 fsp= 1, odt_onoff= 1, Byte mode= 0
632 11:03:13.496506 ==
633 11:03:13.499678 [Duty_Offset_Calibration]
634 11:03:13.499750
635 11:03:13.503232 ===========================
636 11:03:13.503316 B0:1 B1:0 CA:2
637 11:03:13.536173 [ModeRegInit_LP4] CH0 RK0
638 11:03:13.539637 Write Rank0 MR13 =0x18
639 11:03:13.539721 Write Rank0 MR12 =0x5d
640 11:03:13.543182 Write Rank0 MR1 =0x56
641 11:03:13.546272 Write Rank0 MR2 =0x1a
642 11:03:13.546355 Write Rank0 MR11 =0x0
643 11:03:13.549932 Write Rank0 MR22 =0x38
644 11:03:13.550016 Write Rank0 MR14 =0x5d
645 11:03:13.553026 Write Rank0 MR3 =0x30
646 11:03:13.556635 Write Rank0 MR13 =0x58
647 11:03:13.556719 Write Rank0 MR12 =0x5d
648 11:03:13.560144 Write Rank0 MR1 =0x56
649 11:03:13.560259 Write Rank0 MR2 =0x2d
650 11:03:13.562997 Write Rank0 MR11 =0x23
651 11:03:13.566527 Write Rank0 MR22 =0x34
652 11:03:13.566611 Write Rank0 MR14 =0x10
653 11:03:13.569726 Write Rank0 MR3 =0x30
654 11:03:13.573301 Write Rank0 MR13 =0xd8
655 11:03:13.573385 [ModeRegInit_LP4] CH0 RK1
656 11:03:13.576228 Write Rank1 MR13 =0x18
657 11:03:13.576311 Write Rank1 MR12 =0x5d
658 11:03:13.579747 Write Rank1 MR1 =0x56
659 11:03:13.583488 Write Rank1 MR2 =0x1a
660 11:03:13.583571 Write Rank1 MR11 =0x0
661 11:03:13.586461 Write Rank1 MR22 =0x38
662 11:03:13.589641 Write Rank1 MR14 =0x5d
663 11:03:13.589725 Write Rank1 MR3 =0x30
664 11:03:13.593060 Write Rank1 MR13 =0x58
665 11:03:13.593143 Write Rank1 MR12 =0x5d
666 11:03:13.597058 Write Rank1 MR1 =0x56
667 11:03:13.597142 Write Rank1 MR2 =0x2d
668 11:03:13.599967 Write Rank1 MR11 =0x23
669 11:03:13.603248 Write Rank1 MR22 =0x34
670 11:03:13.603332 Write Rank1 MR14 =0x10
671 11:03:13.606605 Write Rank1 MR3 =0x30
672 11:03:13.609900 Write Rank1 MR13 =0xd8
673 11:03:13.609985 [ModeRegInit_LP4] CH1 RK0
674 11:03:13.613174 Write Rank0 MR13 =0x18
675 11:03:13.613267 Write Rank0 MR12 =0x5d
676 11:03:13.616582 Write Rank0 MR1 =0x56
677 11:03:13.620323 Write Rank0 MR2 =0x1a
678 11:03:13.620408 Write Rank0 MR11 =0x0
679 11:03:13.623167 Write Rank0 MR22 =0x38
680 11:03:13.623244 Write Rank0 MR14 =0x5d
681 11:03:13.626893 Write Rank0 MR3 =0x30
682 11:03:13.630114 Write Rank0 MR13 =0x58
683 11:03:13.630196 Write Rank0 MR12 =0x5d
684 11:03:13.633401 Write Rank0 MR1 =0x56
685 11:03:13.633484 Write Rank0 MR2 =0x2d
686 11:03:13.636922 Write Rank0 MR11 =0x23
687 11:03:13.639922 Write Rank0 MR22 =0x34
688 11:03:13.640006 Write Rank0 MR14 =0x10
689 11:03:13.643697 Write Rank0 MR3 =0x30
690 11:03:13.646998 Write Rank0 MR13 =0xd8
691 11:03:13.647082 [ModeRegInit_LP4] CH1 RK1
692 11:03:13.650136 Write Rank1 MR13 =0x18
693 11:03:13.650219 Write Rank1 MR12 =0x5d
694 11:03:13.653417 Write Rank1 MR1 =0x56
695 11:03:13.656885 Write Rank1 MR2 =0x1a
696 11:03:13.656968 Write Rank1 MR11 =0x0
697 11:03:13.660509 Write Rank1 MR22 =0x38
698 11:03:13.660592 Write Rank1 MR14 =0x5d
699 11:03:13.663741 Write Rank1 MR3 =0x30
700 11:03:13.667052 Write Rank1 MR13 =0x58
701 11:03:13.667135 Write Rank1 MR12 =0x5d
702 11:03:13.670432 Write Rank1 MR1 =0x56
703 11:03:13.670515 Write Rank1 MR2 =0x2d
704 11:03:13.673402 Write Rank1 MR11 =0x23
705 11:03:13.677040 Write Rank1 MR22 =0x34
706 11:03:13.677146 Write Rank1 MR14 =0x10
707 11:03:13.680049 Write Rank1 MR3 =0x30
708 11:03:13.683625 Write Rank1 MR13 =0xd8
709 11:03:13.683709 match AC timing 3
710 11:03:13.693399 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
711 11:03:13.696873 DramC Write-DBI off
712 11:03:13.696957 DramC Read-DBI off
713 11:03:13.700034 Write Rank0 MR13 =0x59
714 11:03:13.700117 ==
715 11:03:13.703221 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
716 11:03:13.706871 fsp= 1, odt_onoff= 1, Byte mode= 0
717 11:03:13.706955 ==
718 11:03:13.710256 === u2Vref_new: 0x56 --> 0x2d
719 11:03:13.713729 === u2Vref_new: 0x58 --> 0x38
720 11:03:13.716738 === u2Vref_new: 0x5a --> 0x39
721 11:03:13.720753 === u2Vref_new: 0x5c --> 0x3c
722 11:03:13.723590 === u2Vref_new: 0x5e --> 0x3d
723 11:03:13.727123 === u2Vref_new: 0x60 --> 0xa0
724 11:03:13.730415 [CA 0] Center 34 (6~63) winsize 58
725 11:03:13.733542 [CA 1] Center 36 (9~63) winsize 55
726 11:03:13.736852 [CA 2] Center 29 (0~58) winsize 59
727 11:03:13.740035 [CA 3] Center 24 (-3~52) winsize 56
728 11:03:13.740119 [CA 4] Center 25 (-3~54) winsize 58
729 11:03:13.743801 [CA 5] Center 30 (0~60) winsize 61
730 11:03:13.743883
731 11:03:13.750429 [CATrainingPosCal] consider 1 rank data
732 11:03:13.750514 u2DelayCellTimex100 = 735/100 ps
733 11:03:13.756919 CA0 delay=34 (6~63),Diff = 10 PI (13 cell)
734 11:03:13.760309 CA1 delay=36 (9~63),Diff = 12 PI (15 cell)
735 11:03:13.763653 CA2 delay=29 (0~58),Diff = 5 PI (6 cell)
736 11:03:13.766821 CA3 delay=24 (-3~52),Diff = 0 PI (0 cell)
737 11:03:13.770041 CA4 delay=25 (-3~54),Diff = 1 PI (1 cell)
738 11:03:13.773696 CA5 delay=30 (0~60),Diff = 6 PI (7 cell)
739 11:03:13.773806
740 11:03:13.776668 CA PerBit enable=1, Macro0, CA PI delay=24
741 11:03:13.780203 === u2Vref_new: 0x5e --> 0x3d
742 11:03:13.780286
743 11:03:13.783473 Vref(ca) range 1: 30
744 11:03:13.783557
745 11:03:13.783622 CS Dly= 9 (40-0-32)
746 11:03:13.786701 Write Rank0 MR13 =0xd8
747 11:03:13.790236 Write Rank0 MR13 =0xd8
748 11:03:13.790319 Write Rank0 MR12 =0x5e
749 11:03:13.793347 Write Rank1 MR13 =0x59
750 11:03:13.793429 ==
751 11:03:13.797361 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
752 11:03:13.800057 fsp= 1, odt_onoff= 1, Byte mode= 0
753 11:03:13.800140 ==
754 11:03:13.803461 === u2Vref_new: 0x56 --> 0x2d
755 11:03:13.807091 === u2Vref_new: 0x58 --> 0x38
756 11:03:13.810271 === u2Vref_new: 0x5a --> 0x39
757 11:03:13.813783 === u2Vref_new: 0x5c --> 0x3c
758 11:03:13.816780 === u2Vref_new: 0x5e --> 0x3d
759 11:03:13.820252 === u2Vref_new: 0x60 --> 0xa0
760 11:03:13.823580 [CA 0] Center 36 (10~63) winsize 54
761 11:03:13.827205 [CA 1] Center 36 (9~63) winsize 55
762 11:03:13.830588 [CA 2] Center 31 (2~60) winsize 59
763 11:03:13.833967 [CA 3] Center 25 (-3~54) winsize 58
764 11:03:13.837255 [CA 4] Center 26 (-2~54) winsize 57
765 11:03:13.840704 [CA 5] Center 31 (2~61) winsize 60
766 11:03:13.840787
767 11:03:13.843832 [CATrainingPosCal] consider 2 rank data
768 11:03:13.847162 u2DelayCellTimex100 = 735/100 ps
769 11:03:13.850343 CA0 delay=36 (10~63),Diff = 12 PI (15 cell)
770 11:03:13.853680 CA1 delay=36 (9~63),Diff = 12 PI (15 cell)
771 11:03:13.856834 CA2 delay=30 (2~58),Diff = 6 PI (7 cell)
772 11:03:13.860724 CA3 delay=24 (-3~52),Diff = 0 PI (0 cell)
773 11:03:13.863987 CA4 delay=26 (-2~54),Diff = 2 PI (2 cell)
774 11:03:13.867050 CA5 delay=31 (2~60),Diff = 7 PI (9 cell)
775 11:03:13.867123
776 11:03:13.870179 CA PerBit enable=1, Macro0, CA PI delay=24
777 11:03:13.873934 === u2Vref_new: 0x5c --> 0x3c
778 11:03:13.874005
779 11:03:13.877223 Vref(ca) range 1: 28
780 11:03:13.877321
781 11:03:13.877420 CS Dly= 7 (38-0-32)
782 11:03:13.880391 Write Rank1 MR13 =0xd8
783 11:03:13.884016 Write Rank1 MR13 =0xd8
784 11:03:13.884091 Write Rank1 MR12 =0x5c
785 11:03:13.887069 [RankSwap] Rank num 2, (Multi 1), Rank 0
786 11:03:13.890409 Write Rank0 MR2 =0xad
787 11:03:13.890486 [Write Leveling]
788 11:03:13.893982 delay byte0 byte1 byte2 byte3
789 11:03:13.894058
790 11:03:13.897130 10 0 0
791 11:03:13.897215 11 0 0
792 11:03:13.900400 12 0 0
793 11:03:13.900500 13 0 0
794 11:03:13.900563 14 0 0
795 11:03:13.904117 15 0 0
796 11:03:13.904230 16 0 0
797 11:03:13.907137 17 0 0
798 11:03:13.907222 18 0 0
799 11:03:13.910487 19 0 0
800 11:03:13.910572 20 0 0
801 11:03:13.910636 21 0 0
802 11:03:13.913526 22 0 0
803 11:03:13.913618 23 0 0
804 11:03:13.917631 24 0 ff
805 11:03:13.917715 25 0 ff
806 11:03:13.920322 26 0 ff
807 11:03:13.920433 27 0 ff
808 11:03:13.920517 28 0 ff
809 11:03:13.923801 29 0 ff
810 11:03:13.923885 30 0 ff
811 11:03:13.926972 31 0 ff
812 11:03:13.927058 32 0 ff
813 11:03:13.930613 33 ff ff
814 11:03:13.930698 34 ff ff
815 11:03:13.933987 35 ff ff
816 11:03:13.934071 36 ff ff
817 11:03:13.934136 37 ff ff
818 11:03:13.937157 38 ff ff
819 11:03:13.937242 39 ff ff
820 11:03:13.943736 pass bytecount = 0xff (0xff: all bytes pass)
821 11:03:13.943820
822 11:03:13.943885 DQS0 dly: 33
823 11:03:13.943943 DQS1 dly: 24
824 11:03:13.947162 Write Rank0 MR2 =0x2d
825 11:03:13.950476 [RankSwap] Rank num 2, (Multi 1), Rank 0
826 11:03:13.953928 Write Rank0 MR1 =0xd6
827 11:03:13.954011 [Gating]
828 11:03:13.954074 ==
829 11:03:13.957049 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
830 11:03:13.960305 fsp= 1, odt_onoff= 1, Byte mode= 0
831 11:03:13.964000 ==
832 11:03:13.967405 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
833 11:03:13.970635 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
834 11:03:13.974042 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
835 11:03:13.980829 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
836 11:03:13.983840 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
837 11:03:13.987271 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
838 11:03:13.994265 3 1 24 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
839 11:03:13.997245 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
840 11:03:14.000830 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
841 11:03:14.004170 3 2 4 |3534 403 |(11 11)(11 11) |(0 0)(1 1)| 0
842 11:03:14.010703 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
843 11:03:14.014394 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
844 11:03:14.017633 3 2 16 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
845 11:03:14.024402 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
846 11:03:14.027440 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
847 11:03:14.030599 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
848 11:03:14.037296 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
849 11:03:14.041280 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
850 11:03:14.043944 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
851 11:03:14.047434 [Byte 1] Lead/lag falling Transition (3, 3, 8)
852 11:03:14.054274 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
853 11:03:14.057361 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
854 11:03:14.061030 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
855 11:03:14.067670 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
856 11:03:14.070738 3 3 28 |1e1d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
857 11:03:14.074404 3 4 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
858 11:03:14.080806 3 4 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
859 11:03:14.084408 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 11:03:14.087804 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 11:03:14.091229 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 11:03:14.097552 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 11:03:14.100947 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 11:03:14.104464 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 11:03:14.111188 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 11:03:14.114740 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 11:03:14.118172 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 11:03:14.124556 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 11:03:14.127949 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 11:03:14.131015 [Byte 0] Lead/lag falling Transition (3, 5, 16)
871 11:03:14.134668 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
872 11:03:14.141503 [Byte 0] Lead/lag Transition tap number (2)
873 11:03:14.144889 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
874 11:03:14.147697 [Byte 1] Lead/lag falling Transition (3, 5, 24)
875 11:03:14.151617 3 5 28 |404 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
876 11:03:14.157615 [Byte 1] Lead/lag Transition tap number (2)
877 11:03:14.161072 3 6 0 |4646 3d3d |(0 0)(11 11) |(0 0)(0 0)| 0
878 11:03:14.164442 [Byte 0]First pass (3, 6, 0)
879 11:03:14.167717 3 6 4 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
880 11:03:14.171157 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 11:03:14.174822 [Byte 1]First pass (3, 6, 8)
882 11:03:14.178035 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 11:03:14.181873 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 11:03:14.184893 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 11:03:14.191565 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 11:03:14.194849 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 11:03:14.198376 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 11:03:14.201659 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 11:03:14.204927 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
890 11:03:14.211679 All bytes gating window > 1UI, Early break!
891 11:03:14.211773
892 11:03:14.214960 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
893 11:03:14.215044
894 11:03:14.218248 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
895 11:03:14.218331
896 11:03:14.218396
897 11:03:14.218454
898 11:03:14.221755 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
899 11:03:14.221840
900 11:03:14.225228 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
901 11:03:14.225311
902 11:03:14.225375
903 11:03:14.228365 Write Rank0 MR1 =0x56
904 11:03:14.228448
905 11:03:14.231460 best RODT dly(2T, 0.5T) = (2, 2)
906 11:03:14.231543
907 11:03:14.235154 best RODT dly(2T, 0.5T) = (2, 2)
908 11:03:14.235237 ==
909 11:03:14.238270 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
910 11:03:14.241628 fsp= 1, odt_onoff= 1, Byte mode= 0
911 11:03:14.241711 ==
912 11:03:14.248450 Start DQ dly to find pass range UseTestEngine =0
913 11:03:14.251751 x-axis: bit #, y-axis: DQ dly (-127~63)
914 11:03:14.251835 RX Vref Scan = 0
915 11:03:14.255293 -26, [0] xxxxxxxx xxxxxxxx [MSB]
916 11:03:14.258295 -25, [0] xxxxxxxx xxxxxxxx [MSB]
917 11:03:14.262151 -24, [0] xxxxxxxx xxxxxxxx [MSB]
918 11:03:14.265190 -23, [0] xxxxxxxx xxxxxxxx [MSB]
919 11:03:14.268616 -22, [0] xxxxxxxx xxxxxxxx [MSB]
920 11:03:14.271712 -21, [0] xxxxxxxx xxxxxxxx [MSB]
921 11:03:14.271797 -20, [0] xxxxxxxx xxxxxxxx [MSB]
922 11:03:14.275481 -19, [0] xxxxxxxx xxxxxxxx [MSB]
923 11:03:14.278719 -18, [0] xxxxxxxx xxxxxxxx [MSB]
924 11:03:14.282125 -17, [0] xxxxxxxx xxxxxxxx [MSB]
925 11:03:14.285115 -16, [0] xxxxxxxx xxxxxxxx [MSB]
926 11:03:14.288738 -15, [0] xxxxxxxx xxxxxxxx [MSB]
927 11:03:14.291925 -14, [0] xxxxxxxx xxxxxxxx [MSB]
928 11:03:14.295586 -13, [0] xxxxxxxx xxxxxxxx [MSB]
929 11:03:14.295671 -12, [0] xxxxxxxx xxxxxxxx [MSB]
930 11:03:14.298876 -11, [0] xxxxxxxx xxxxxxxx [MSB]
931 11:03:14.302025 -10, [0] xxxxxxxx xxxxxxxx [MSB]
932 11:03:14.305174 -9, [0] xxxxxxxx xxxxxxxx [MSB]
933 11:03:14.308877 -8, [0] xxxxxxxx xxxxxxxx [MSB]
934 11:03:14.312253 -7, [0] xxxxxxxx xxxxxxxx [MSB]
935 11:03:14.315436 -6, [0] xxxxxxxx xxxxxxxx [MSB]
936 11:03:14.315522 -5, [0] xxxxxxxx xxxxxxxx [MSB]
937 11:03:14.318688 -4, [0] xxxxxxxx xxxxxxxx [MSB]
938 11:03:14.322329 -3, [0] xxxxxxxx oxxxxxxx [MSB]
939 11:03:14.325284 -2, [0] xxxoxxxx oxxxxxxx [MSB]
940 11:03:14.328502 -1, [0] xxxoxxxx ooxoxxxx [MSB]
941 11:03:14.332152 0, [0] xxxoxoxx ooxoxxxx [MSB]
942 11:03:14.332240 1, [0] xxxoxoox ooxoooxx [MSB]
943 11:03:14.335219 2, [0] xxxoxoox ooxoooxx [MSB]
944 11:03:14.339000 3, [0] xoxoxooo ooxoooox [MSB]
945 11:03:14.342032 4, [0] xooooooo ooxooooo [MSB]
946 11:03:14.345393 5, [0] xooooooo ooxooooo [MSB]
947 11:03:14.348900 6, [0] oooooooo ooxooooo [MSB]
948 11:03:14.348988 7, [0] oooooooo ooxooooo [MSB]
949 11:03:14.352215 33, [0] oooxoooo xooooooo [MSB]
950 11:03:14.355945 34, [0] oooxoooo xooooooo [MSB]
951 11:03:14.359116 35, [0] oooxoooo xooooooo [MSB]
952 11:03:14.362329 36, [0] oooxoxoo xooxoooo [MSB]
953 11:03:14.365636 37, [0] oooxoxxx xxoxoooo [MSB]
954 11:03:14.365723 38, [0] oooxoxxx xxoxxoxo [MSB]
955 11:03:14.368696 39, [0] oooxoxxx xxoxxxxo [MSB]
956 11:03:14.372111 40, [0] oooxxxxx xxoxxxxo [MSB]
957 11:03:14.375511 41, [0] xxoxxxxx xxoxxxxo [MSB]
958 11:03:14.379105 42, [0] xxxxxxxx xxoxxxxx [MSB]
959 11:03:14.382407 43, [0] xxxxxxxx xxoxxxxx [MSB]
960 11:03:14.385623 44, [0] xxxxxxxx xxxxxxxx [MSB]
961 11:03:14.389223 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
962 11:03:14.392427 iDelay=44, Bit 1, Center 21 (3 ~ 40) 38
963 11:03:14.395856 iDelay=44, Bit 2, Center 22 (4 ~ 41) 38
964 11:03:14.398960 iDelay=44, Bit 3, Center 15 (-2 ~ 32) 35
965 11:03:14.402733 iDelay=44, Bit 4, Center 21 (4 ~ 39) 36
966 11:03:14.405925 iDelay=44, Bit 5, Center 17 (0 ~ 35) 36
967 11:03:14.409256 iDelay=44, Bit 6, Center 18 (1 ~ 36) 36
968 11:03:14.412450 iDelay=44, Bit 7, Center 19 (3 ~ 36) 34
969 11:03:14.415640 iDelay=44, Bit 8, Center 14 (-3 ~ 32) 36
970 11:03:14.418952 iDelay=44, Bit 9, Center 17 (-1 ~ 36) 38
971 11:03:14.422549 iDelay=44, Bit 10, Center 25 (8 ~ 43) 36
972 11:03:14.425613 iDelay=44, Bit 11, Center 17 (-1 ~ 35) 37
973 11:03:14.432374 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
974 11:03:14.436227 iDelay=44, Bit 13, Center 19 (1 ~ 38) 38
975 11:03:14.439317 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
976 11:03:14.442590 iDelay=44, Bit 15, Center 22 (4 ~ 41) 38
977 11:03:14.442675 ==
978 11:03:14.446067 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
979 11:03:14.449477 fsp= 1, odt_onoff= 1, Byte mode= 0
980 11:03:14.449561 ==
981 11:03:14.452353 DQS Delay:
982 11:03:14.452436 DQS0 = 0, DQS1 = 0
983 11:03:14.452523 DQM Delay:
984 11:03:14.455979 DQM0 = 19, DQM1 = 19
985 11:03:14.456062 DQ Delay:
986 11:03:14.459202 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15
987 11:03:14.462457 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =19
988 11:03:14.466292 DQ8 =14, DQ9 =17, DQ10 =25, DQ11 =17
989 11:03:14.469328 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =22
990 11:03:14.469411
991 11:03:14.469476
992 11:03:14.472357 DramC Write-DBI off
993 11:03:14.472441 ==
994 11:03:14.476120 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
995 11:03:14.479333 fsp= 1, odt_onoff= 1, Byte mode= 0
996 11:03:14.479418 ==
997 11:03:14.486053 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
998 11:03:14.486138
999 11:03:14.489344 Begin, DQ Scan Range 920~1176
1000 11:03:14.489429
1001 11:03:14.489494
1002 11:03:14.489553 TX Vref Scan disable
1003 11:03:14.493062 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1004 11:03:14.496266 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1005 11:03:14.499441 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1006 11:03:14.505750 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1007 11:03:14.509072 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1008 11:03:14.512815 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1009 11:03:14.516150 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1010 11:03:14.519337 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1011 11:03:14.522794 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1012 11:03:14.526005 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1013 11:03:14.529478 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1014 11:03:14.532695 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1015 11:03:14.536399 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1016 11:03:14.539331 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1017 11:03:14.542876 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1018 11:03:14.546148 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1019 11:03:14.549435 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1020 11:03:14.553049 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1021 11:03:14.556145 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1022 11:03:14.559367 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1023 11:03:14.562877 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1024 11:03:14.569475 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1025 11:03:14.572554 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1026 11:03:14.576117 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1027 11:03:14.579944 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1028 11:03:14.582781 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1029 11:03:14.586293 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1030 11:03:14.589575 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1031 11:03:14.592617 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1032 11:03:14.596244 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1033 11:03:14.599931 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1034 11:03:14.602864 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1035 11:03:14.606575 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1036 11:03:14.609853 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1037 11:03:14.613101 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1038 11:03:14.616423 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1039 11:03:14.619619 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1040 11:03:14.622936 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1041 11:03:14.626656 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1042 11:03:14.633259 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1043 11:03:14.636432 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1044 11:03:14.639573 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1045 11:03:14.643090 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1046 11:03:14.646468 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1047 11:03:14.649889 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1048 11:03:14.652915 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1049 11:03:14.656705 966 |3 6 6|[0] xxxxxxxx oxxoxxxx [MSB]
1050 11:03:14.659764 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1051 11:03:14.663107 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1052 11:03:14.666393 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1053 11:03:14.669658 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1054 11:03:14.673281 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1055 11:03:14.676612 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1056 11:03:14.679779 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1057 11:03:14.682960 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1058 11:03:14.686410 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1059 11:03:14.689727 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1060 11:03:14.697126 985 |3 6 25|[0] oooooooo xooooooo [MSB]
1061 11:03:14.700583 986 |3 6 26|[0] oooooooo xooxoooo [MSB]
1062 11:03:14.703524 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1063 11:03:14.707111 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1064 11:03:14.710048 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1065 11:03:14.713525 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1066 11:03:14.717326 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1067 11:03:14.720780 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1068 11:03:14.724075 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1069 11:03:14.727159 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1070 11:03:14.730444 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1071 11:03:14.733864 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1072 11:03:14.737151 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1073 11:03:14.740338 998 |3 6 38|[0] oooxxxxx xxxxxxxx [MSB]
1074 11:03:14.744005 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1075 11:03:14.747176 Byte0, DQ PI dly=985, DQM PI dly= 985
1076 11:03:14.754110 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1077 11:03:14.754196
1078 11:03:14.757366 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1079 11:03:14.757451
1080 11:03:14.760420 Byte1, DQ PI dly=976, DQM PI dly= 976
1081 11:03:14.764265 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1082 11:03:14.764377
1083 11:03:14.770706 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1084 11:03:14.770792
1085 11:03:14.770857 ==
1086 11:03:14.773775 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1087 11:03:14.777034 fsp= 1, odt_onoff= 1, Byte mode= 0
1088 11:03:14.777119 ==
1089 11:03:14.784133 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1090 11:03:14.784218
1091 11:03:14.784284 Begin, DQ Scan Range 952~1016
1092 11:03:14.787129 Write Rank0 MR14 =0x0
1093 11:03:14.795692
1094 11:03:14.795777 CH=0, VrefRange= 0, VrefLevel = 0
1095 11:03:14.802416 TX Bit0 (980~994) 15 987, Bit8 (967~978) 12 972,
1096 11:03:14.805770 TX Bit1 (978~993) 16 985, Bit9 (969~983) 15 976,
1097 11:03:14.812635 TX Bit2 (980~994) 15 987, Bit10 (975~987) 13 981,
1098 11:03:14.815557 TX Bit3 (976~987) 12 981, Bit11 (968~982) 15 975,
1099 11:03:14.818889 TX Bit4 (978~992) 15 985, Bit12 (971~983) 13 977,
1100 11:03:14.825540 TX Bit5 (977~991) 15 984, Bit13 (970~984) 15 977,
1101 11:03:14.828970 TX Bit6 (978~991) 14 984, Bit14 (969~984) 16 976,
1102 11:03:14.832653 TX Bit7 (978~992) 15 985, Bit15 (974~985) 12 979,
1103 11:03:14.832738
1104 11:03:14.835892 Write Rank0 MR14 =0x2
1105 11:03:14.844496
1106 11:03:14.844580 CH=0, VrefRange= 0, VrefLevel = 2
1107 11:03:14.851483 TX Bit0 (979~995) 17 987, Bit8 (967~979) 13 973,
1108 11:03:14.854764 TX Bit1 (978~993) 16 985, Bit9 (969~984) 16 976,
1109 11:03:14.861358 TX Bit2 (979~994) 16 986, Bit10 (974~988) 15 981,
1110 11:03:14.864426 TX Bit3 (975~988) 14 981, Bit11 (968~982) 15 975,
1111 11:03:14.867759 TX Bit4 (978~993) 16 985, Bit12 (970~984) 15 977,
1112 11:03:14.874405 TX Bit5 (976~992) 17 984, Bit13 (969~984) 16 976,
1113 11:03:14.877774 TX Bit6 (977~992) 16 984, Bit14 (969~985) 17 977,
1114 11:03:14.881204 TX Bit7 (978~992) 15 985, Bit15 (974~987) 14 980,
1115 11:03:14.881288
1116 11:03:14.884952 Write Rank0 MR14 =0x4
1117 11:03:14.892910
1118 11:03:14.892994 CH=0, VrefRange= 0, VrefLevel = 4
1119 11:03:14.899796 TX Bit0 (979~995) 17 987, Bit8 (967~981) 15 974,
1120 11:03:14.903345 TX Bit1 (978~994) 17 986, Bit9 (968~984) 17 976,
1121 11:03:14.909765 TX Bit2 (978~994) 17 986, Bit10 (975~989) 15 982,
1122 11:03:14.912968 TX Bit3 (975~989) 15 982, Bit11 (968~983) 16 975,
1123 11:03:14.916565 TX Bit4 (978~993) 16 985, Bit12 (970~984) 15 977,
1124 11:03:14.923497 TX Bit5 (976~992) 17 984, Bit13 (969~984) 16 976,
1125 11:03:14.926658 TX Bit6 (977~992) 16 984, Bit14 (969~985) 17 977,
1126 11:03:14.929725 TX Bit7 (978~993) 16 985, Bit15 (974~988) 15 981,
1127 11:03:14.929809
1128 11:03:14.932891 Write Rank0 MR14 =0x6
1129 11:03:14.942234
1130 11:03:14.942318 CH=0, VrefRange= 0, VrefLevel = 6
1131 11:03:14.949030 TX Bit0 (978~997) 20 987, Bit8 (967~981) 15 974,
1132 11:03:14.952113 TX Bit1 (977~995) 19 986, Bit9 (968~985) 18 976,
1133 11:03:14.958774 TX Bit2 (978~996) 19 987, Bit10 (974~990) 17 982,
1134 11:03:14.961989 TX Bit3 (975~990) 16 982, Bit11 (967~983) 17 975,
1135 11:03:14.965751 TX Bit4 (978~993) 16 985, Bit12 (969~985) 17 977,
1136 11:03:14.972220 TX Bit5 (976~992) 17 984, Bit13 (969~985) 17 977,
1137 11:03:14.975488 TX Bit6 (977~992) 16 984, Bit14 (969~986) 18 977,
1138 11:03:14.979100 TX Bit7 (978~994) 17 986, Bit15 (973~989) 17 981,
1139 11:03:14.979184
1140 11:03:15.037742 Write Rank0 MR14 =0x8
1141 11:03:15.037836
1142 11:03:15.037905 CH=0, VrefRange= 0, VrefLevel = 8
1143 11:03:15.038278 TX Bit0 (978~998) 21 988, Bit8 (967~982) 16 974,
1144 11:03:15.038548 TX Bit1 (977~995) 19 986, Bit9 (968~985) 18 976,
1145 11:03:15.038804 TX Bit2 (978~997) 20 987, Bit10 (974~990) 17 982,
1146 11:03:15.039238 TX Bit3 (974~991) 18 982, Bit11 (967~984) 18 975,
1147 11:03:15.039791 TX Bit4 (977~994) 18 985, Bit12 (969~985) 17 977,
1148 11:03:15.039876 TX Bit5 (976~993) 18 984, Bit13 (969~985) 17 977,
1149 11:03:15.040322 TX Bit6 (977~993) 17 985, Bit14 (968~986) 19 977,
1150 11:03:15.040859 TX Bit7 (978~994) 17 986, Bit15 (973~990) 18 981,
1151 11:03:15.040944
1152 11:03:15.041009 Write Rank0 MR14 =0xa
1153 11:03:15.041068
1154 11:03:15.062160 CH=0, VrefRange= 0, VrefLevel = 10
1155 11:03:15.062890 TX Bit0 (978~998) 21 988, Bit8 (966~982) 17 974,
1156 11:03:15.063160 TX Bit1 (977~996) 20 986, Bit9 (968~986) 19 977,
1157 11:03:15.063230 TX Bit2 (978~998) 21 988, Bit10 (973~990) 18 981,
1158 11:03:15.063478 TX Bit3 (974~991) 18 982, Bit11 (967~984) 18 975,
1159 11:03:15.066383 TX Bit4 (977~995) 19 986, Bit12 (969~986) 18 977,
1160 11:03:15.069609 TX Bit5 (975~993) 19 984, Bit13 (968~986) 19 977,
1161 11:03:15.073411 TX Bit6 (977~994) 18 985, Bit14 (968~987) 20 977,
1162 11:03:15.079756 TX Bit7 (977~995) 19 986, Bit15 (972~990) 19 981,
1163 11:03:15.079841
1164 11:03:15.079905 Write Rank0 MR14 =0xc
1165 11:03:15.089902
1166 11:03:15.089986 CH=0, VrefRange= 0, VrefLevel = 12
1167 11:03:15.096275 TX Bit0 (978~998) 21 988, Bit8 (966~983) 18 974,
1168 11:03:15.099535 TX Bit1 (977~997) 21 987, Bit9 (968~986) 19 977,
1169 11:03:15.106821 TX Bit2 (978~998) 21 988, Bit10 (972~991) 20 981,
1170 11:03:15.110012 TX Bit3 (974~992) 19 983, Bit11 (967~984) 18 975,
1171 11:03:15.113120 TX Bit4 (977~996) 20 986, Bit12 (969~986) 18 977,
1172 11:03:15.120044 TX Bit5 (975~994) 20 984, Bit13 (968~986) 19 977,
1173 11:03:15.123329 TX Bit6 (976~994) 19 985, Bit14 (968~988) 21 978,
1174 11:03:15.126941 TX Bit7 (977~995) 19 986, Bit15 (972~990) 19 981,
1175 11:03:15.127027
1176 11:03:15.129952 Write Rank0 MR14 =0xe
1177 11:03:15.139380
1178 11:03:15.142569 CH=0, VrefRange= 0, VrefLevel = 14
1179 11:03:15.146133 TX Bit0 (978~999) 22 988, Bit8 (966~983) 18 974,
1180 11:03:15.149210 TX Bit1 (977~998) 22 987, Bit9 (968~986) 19 977,
1181 11:03:15.153038 TX Bit2 (977~998) 22 987, Bit10 (972~991) 20 981,
1182 11:03:15.159483 TX Bit3 (974~992) 19 983, Bit11 (967~985) 19 976,
1183 11:03:15.162739 TX Bit4 (977~996) 20 986, Bit12 (969~987) 19 978,
1184 11:03:15.169835 TX Bit5 (975~995) 21 985, Bit13 (968~987) 20 977,
1185 11:03:15.173076 TX Bit6 (976~994) 19 985, Bit14 (968~989) 22 978,
1186 11:03:15.176196 TX Bit7 (977~996) 20 986, Bit15 (971~991) 21 981,
1187 11:03:15.176281
1188 11:03:15.179541 Write Rank0 MR14 =0x10
1189 11:03:15.188607
1190 11:03:15.191875 CH=0, VrefRange= 0, VrefLevel = 16
1191 11:03:15.195450 TX Bit0 (977~999) 23 988, Bit8 (966~984) 19 975,
1192 11:03:15.198763 TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977,
1193 11:03:15.205464 TX Bit2 (977~999) 23 988, Bit10 (972~991) 20 981,
1194 11:03:15.208967 TX Bit3 (973~992) 20 982, Bit11 (966~985) 20 975,
1195 11:03:15.212197 TX Bit4 (977~998) 22 987, Bit12 (968~987) 20 977,
1196 11:03:15.218658 TX Bit5 (975~994) 20 984, Bit13 (968~987) 20 977,
1197 11:03:15.222263 TX Bit6 (976~995) 20 985, Bit14 (968~989) 22 978,
1198 11:03:15.225487 TX Bit7 (977~997) 21 987, Bit15 (971~991) 21 981,
1199 11:03:15.225573
1200 11:03:15.228688 Write Rank0 MR14 =0x12
1201 11:03:15.238044
1202 11:03:15.241407 CH=0, VrefRange= 0, VrefLevel = 18
1203 11:03:15.244717 TX Bit0 (977~999) 23 988, Bit8 (965~984) 20 974,
1204 11:03:15.248488 TX Bit1 (977~999) 23 988, Bit9 (967~987) 21 977,
1205 11:03:15.254742 TX Bit2 (977~999) 23 988, Bit10 (972~992) 21 982,
1206 11:03:15.258525 TX Bit3 (972~992) 21 982, Bit11 (966~986) 21 976,
1207 11:03:15.261577 TX Bit4 (976~998) 23 987, Bit12 (968~989) 22 978,
1208 11:03:15.268243 TX Bit5 (974~995) 22 984, Bit13 (968~989) 22 978,
1209 11:03:15.271672 TX Bit6 (976~996) 21 986, Bit14 (967~990) 24 978,
1210 11:03:15.274611 TX Bit7 (977~998) 22 987, Bit15 (971~991) 21 981,
1211 11:03:15.274695
1212 11:03:15.278399 Write Rank0 MR14 =0x14
1213 11:03:15.287703
1214 11:03:15.287785 CH=0, VrefRange= 0, VrefLevel = 20
1215 11:03:15.295016 TX Bit0 (977~1000) 24 988, Bit8 (965~985) 21 975,
1216 11:03:15.298214 TX Bit1 (976~999) 24 987, Bit9 (967~989) 23 978,
1217 11:03:15.304708 TX Bit2 (977~999) 23 988, Bit10 (970~992) 23 981,
1218 11:03:15.308197 TX Bit3 (972~993) 22 982, Bit11 (966~986) 21 976,
1219 11:03:15.311226 TX Bit4 (976~999) 24 987, Bit12 (968~989) 22 978,
1220 11:03:15.318332 TX Bit5 (974~996) 23 985, Bit13 (968~989) 22 978,
1221 11:03:15.321720 TX Bit6 (976~997) 22 986, Bit14 (967~990) 24 978,
1222 11:03:15.324584 TX Bit7 (977~998) 22 987, Bit15 (970~991) 22 980,
1223 11:03:15.324668
1224 11:03:15.328421 Write Rank0 MR14 =0x16
1225 11:03:15.337670
1226 11:03:15.341296 CH=0, VrefRange= 0, VrefLevel = 22
1227 11:03:15.344410 TX Bit0 (977~1000) 24 988, Bit8 (964~985) 22 974,
1228 11:03:15.347678 TX Bit1 (976~999) 24 987, Bit9 (967~989) 23 978,
1229 11:03:15.354604 TX Bit2 (977~1000) 24 988, Bit10 (970~992) 23 981,
1230 11:03:15.357660 TX Bit3 (971~993) 23 982, Bit11 (966~987) 22 976,
1231 11:03:15.360952 TX Bit4 (976~999) 24 987, Bit12 (968~989) 22 978,
1232 11:03:15.367648 TX Bit5 (973~997) 25 985, Bit13 (967~989) 23 978,
1233 11:03:15.371069 TX Bit6 (975~998) 24 986, Bit14 (967~990) 24 978,
1234 11:03:15.374443 TX Bit7 (976~999) 24 987, Bit15 (970~992) 23 981,
1235 11:03:15.374529
1236 11:03:15.377693 Write Rank0 MR14 =0x18
1237 11:03:15.387409
1238 11:03:15.387497 CH=0, VrefRange= 0, VrefLevel = 24
1239 11:03:15.394345 TX Bit0 (977~1000) 24 988, Bit8 (964~986) 23 975,
1240 11:03:15.397654 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
1241 11:03:15.404318 TX Bit2 (976~1000) 25 988, Bit10 (970~993) 24 981,
1242 11:03:15.407591 TX Bit3 (971~994) 24 982, Bit11 (966~988) 23 977,
1243 11:03:15.411007 TX Bit4 (976~999) 24 987, Bit12 (968~990) 23 979,
1244 11:03:15.417878 TX Bit5 (973~997) 25 985, Bit13 (967~990) 24 978,
1245 11:03:15.420801 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1246 11:03:15.424244 TX Bit7 (976~999) 24 987, Bit15 (970~992) 23 981,
1247 11:03:15.427452
1248 11:03:15.427538 Write Rank0 MR14 =0x1a
1249 11:03:15.437557
1250 11:03:15.440761 CH=0, VrefRange= 0, VrefLevel = 26
1251 11:03:15.444271 TX Bit0 (977~1001) 25 989, Bit8 (964~987) 24 975,
1252 11:03:15.447840 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1253 11:03:15.454423 TX Bit2 (976~1000) 25 988, Bit10 (970~993) 24 981,
1254 11:03:15.457637 TX Bit3 (970~994) 25 982, Bit11 (965~989) 25 977,
1255 11:03:15.461282 TX Bit4 (976~999) 24 987, Bit12 (968~990) 23 979,
1256 11:03:15.467829 TX Bit5 (973~998) 26 985, Bit13 (967~990) 24 978,
1257 11:03:15.471546 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1258 11:03:15.474812 TX Bit7 (976~1000) 25 988, Bit15 (970~992) 23 981,
1259 11:03:15.474900
1260 11:03:15.477995 Write Rank0 MR14 =0x1c
1261 11:03:15.488072
1262 11:03:15.488158 CH=0, VrefRange= 0, VrefLevel = 28
1263 11:03:15.494173 TX Bit0 (976~1001) 26 988, Bit8 (964~987) 24 975,
1264 11:03:15.498009 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1265 11:03:15.504380 TX Bit2 (976~1001) 26 988, Bit10 (969~994) 26 981,
1266 11:03:15.508427 TX Bit3 (970~994) 25 982, Bit11 (965~989) 25 977,
1267 11:03:15.511417 TX Bit4 (975~1000) 26 987, Bit12 (967~990) 24 978,
1268 11:03:15.517702 TX Bit5 (972~998) 27 985, Bit13 (967~990) 24 978,
1269 11:03:15.521143 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1270 11:03:15.528074 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1271 11:03:15.528161
1272 11:03:15.528265 Write Rank0 MR14 =0x1e
1273 11:03:15.537851
1274 11:03:15.537938 CH=0, VrefRange= 0, VrefLevel = 30
1275 11:03:15.544838 TX Bit0 (976~1001) 26 988, Bit8 (964~987) 24 975,
1276 11:03:15.548325 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1277 11:03:15.554676 TX Bit2 (976~1001) 26 988, Bit10 (969~994) 26 981,
1278 11:03:15.558111 TX Bit3 (970~994) 25 982, Bit11 (965~989) 25 977,
1279 11:03:15.561680 TX Bit4 (975~1000) 26 987, Bit12 (967~990) 24 978,
1280 11:03:15.568053 TX Bit5 (972~998) 27 985, Bit13 (967~990) 24 978,
1281 11:03:15.571607 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1282 11:03:15.574818 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1283 11:03:15.578097
1284 11:03:15.578183 Write Rank0 MR14 =0x20
1285 11:03:15.588589
1286 11:03:15.588677 CH=0, VrefRange= 0, VrefLevel = 32
1287 11:03:15.594786 TX Bit0 (976~1001) 26 988, Bit8 (964~987) 24 975,
1288 11:03:15.598751 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1289 11:03:15.605326 TX Bit2 (976~1001) 26 988, Bit10 (969~994) 26 981,
1290 11:03:15.608635 TX Bit3 (970~994) 25 982, Bit11 (965~989) 25 977,
1291 11:03:15.611719 TX Bit4 (975~1000) 26 987, Bit12 (967~990) 24 978,
1292 11:03:15.618328 TX Bit5 (972~998) 27 985, Bit13 (967~990) 24 978,
1293 11:03:15.621773 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1294 11:03:15.628633 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1295 11:03:15.628721
1296 11:03:15.628808 Write Rank0 MR14 =0x22
1297 11:03:15.639053
1298 11:03:15.642128 CH=0, VrefRange= 0, VrefLevel = 34
1299 11:03:15.645272 TX Bit0 (976~1001) 26 988, Bit8 (964~987) 24 975,
1300 11:03:15.648618 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1301 11:03:15.655105 TX Bit2 (976~1001) 26 988, Bit10 (969~994) 26 981,
1302 11:03:15.658784 TX Bit3 (970~994) 25 982, Bit11 (965~989) 25 977,
1303 11:03:15.661845 TX Bit4 (975~1000) 26 987, Bit12 (967~990) 24 978,
1304 11:03:15.668789 TX Bit5 (972~998) 27 985, Bit13 (967~990) 24 978,
1305 11:03:15.672060 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1306 11:03:15.678753 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1307 11:03:15.678840
1308 11:03:15.678928 Write Rank0 MR14 =0x24
1309 11:03:15.689124
1310 11:03:15.689214 CH=0, VrefRange= 0, VrefLevel = 36
1311 11:03:15.695303 TX Bit0 (976~1001) 26 988, Bit8 (964~987) 24 975,
1312 11:03:15.698737 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1313 11:03:15.705356 TX Bit2 (976~1001) 26 988, Bit10 (969~994) 26 981,
1314 11:03:15.709078 TX Bit3 (970~994) 25 982, Bit11 (965~989) 25 977,
1315 11:03:15.712401 TX Bit4 (975~1000) 26 987, Bit12 (967~990) 24 978,
1316 11:03:15.719077 TX Bit5 (972~998) 27 985, Bit13 (967~990) 24 978,
1317 11:03:15.722230 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1318 11:03:15.725324 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1319 11:03:15.728673
1320 11:03:15.728759
1321 11:03:15.732178 TX Vref found, early break! 374< 381
1322 11:03:15.735811 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1323 11:03:15.738680 u1DelayCellOfst[0]=7 cells (6 PI)
1324 11:03:15.742136 u1DelayCellOfst[1]=7 cells (6 PI)
1325 11:03:15.746059 u1DelayCellOfst[2]=7 cells (6 PI)
1326 11:03:15.749187 u1DelayCellOfst[3]=0 cells (0 PI)
1327 11:03:15.749299 u1DelayCellOfst[4]=6 cells (5 PI)
1328 11:03:15.752296 u1DelayCellOfst[5]=3 cells (3 PI)
1329 11:03:15.755837 u1DelayCellOfst[6]=6 cells (5 PI)
1330 11:03:15.758726 u1DelayCellOfst[7]=7 cells (6 PI)
1331 11:03:15.762564 Byte0, DQ PI dly=982, DQM PI dly= 985
1332 11:03:15.769002 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1333 11:03:15.769090
1334 11:03:15.772596 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1335 11:03:15.772684
1336 11:03:15.775772 u1DelayCellOfst[8]=0 cells (0 PI)
1337 11:03:15.778931 u1DelayCellOfst[9]=3 cells (3 PI)
1338 11:03:15.782174 u1DelayCellOfst[10]=7 cells (6 PI)
1339 11:03:15.785950 u1DelayCellOfst[11]=2 cells (2 PI)
1340 11:03:15.786037 u1DelayCellOfst[12]=3 cells (3 PI)
1341 11:03:15.789063 u1DelayCellOfst[13]=3 cells (3 PI)
1342 11:03:15.792294 u1DelayCellOfst[14]=5 cells (4 PI)
1343 11:03:15.795575 u1DelayCellOfst[15]=7 cells (6 PI)
1344 11:03:15.799120 Byte1, DQ PI dly=975, DQM PI dly= 978
1345 11:03:15.805786 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1346 11:03:15.805874
1347 11:03:15.809233 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1348 11:03:15.809321
1349 11:03:15.812481 Write Rank0 MR14 =0x1c
1350 11:03:15.812568
1351 11:03:15.812656 Final TX Range 0 Vref 28
1352 11:03:15.812739
1353 11:03:15.819349 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1354 11:03:15.819436
1355 11:03:15.825765 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1356 11:03:15.832758 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1357 11:03:15.839286 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1358 11:03:15.842883 Write Rank0 MR3 =0xb0
1359 11:03:15.842971 DramC Write-DBI on
1360 11:03:15.846040 ==
1361 11:03:15.849230 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1362 11:03:15.852871 fsp= 1, odt_onoff= 1, Byte mode= 0
1363 11:03:15.852959 ==
1364 11:03:15.855871 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1365 11:03:15.855958
1366 11:03:15.860126 Begin, DQ Scan Range 698~762
1367 11:03:15.860214
1368 11:03:15.860300
1369 11:03:15.862673 TX Vref Scan disable
1370 11:03:15.865936 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1371 11:03:15.869416 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1372 11:03:15.872904 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1373 11:03:15.876319 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1374 11:03:15.879468 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1375 11:03:15.882769 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1376 11:03:15.886482 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1377 11:03:15.889553 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1378 11:03:15.892701 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1379 11:03:15.896344 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1380 11:03:15.899551 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1381 11:03:15.903111 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1382 11:03:15.906538 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1383 11:03:15.909721 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1384 11:03:15.916155 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1385 11:03:15.919968 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1386 11:03:15.923153 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1387 11:03:15.926746 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1388 11:03:15.929466 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1389 11:03:15.932951 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1390 11:03:15.936460 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1391 11:03:15.939776 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1392 11:03:15.946624 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1393 11:03:15.949821 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1394 11:03:15.953271 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1395 11:03:15.956979 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1396 11:03:15.960367 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1397 11:03:15.963359 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1398 11:03:15.966771 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1399 11:03:15.969874 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1400 11:03:15.973251 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1401 11:03:15.976586 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1402 11:03:15.980091 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1403 11:03:15.983394 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1404 11:03:15.986815 Byte0, DQ PI dly=732, DQM PI dly= 732
1405 11:03:15.989916 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1406 11:03:15.993296
1407 11:03:15.996651 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1408 11:03:15.996738
1409 11:03:15.999861 Byte1, DQ PI dly=721, DQM PI dly= 721
1410 11:03:16.003270 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
1411 11:03:16.003354
1412 11:03:16.010224 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
1413 11:03:16.010313
1414 11:03:16.013724 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1415 11:03:16.023459 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1416 11:03:16.030488 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1417 11:03:16.030572 Write Rank0 MR3 =0x30
1418 11:03:16.033569 DramC Write-DBI off
1419 11:03:16.033654
1420 11:03:16.033719 [DATLAT]
1421 11:03:16.036739 Freq=1600, CH0 RK0, use_rxtx_scan=0
1422 11:03:16.036823
1423 11:03:16.040048 DATLAT Default: 0xf
1424 11:03:16.040131 7, 0xFFFF, sum=0
1425 11:03:16.043678 8, 0xFFFF, sum=0
1426 11:03:16.043764 9, 0xFFFF, sum=0
1427 11:03:16.046973 10, 0xFFFF, sum=0
1428 11:03:16.047059 11, 0xFFFF, sum=0
1429 11:03:16.049942 12, 0xFFFF, sum=0
1430 11:03:16.050028 13, 0xFFFF, sum=0
1431 11:03:16.050096 14, 0x0, sum=1
1432 11:03:16.053835 15, 0x0, sum=2
1433 11:03:16.053920 16, 0x0, sum=3
1434 11:03:16.057032 17, 0x0, sum=4
1435 11:03:16.060116 pattern=2 first_step=14 total pass=5 best_step=16
1436 11:03:16.060201 ==
1437 11:03:16.067398 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1438 11:03:16.067484 fsp= 1, odt_onoff= 1, Byte mode= 0
1439 11:03:16.070737 ==
1440 11:03:16.073907 Start DQ dly to find pass range UseTestEngine =1
1441 11:03:16.077101 x-axis: bit #, y-axis: DQ dly (-127~63)
1442 11:03:16.077198 RX Vref Scan = 1
1443 11:03:16.193487
1444 11:03:16.193606 RX Vref found, early break!
1445 11:03:16.193673
1446 11:03:16.199683 Final RX Vref 12, apply to both rank0 and 1
1447 11:03:16.199769 ==
1448 11:03:16.203056 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1449 11:03:16.206503 fsp= 1, odt_onoff= 1, Byte mode= 0
1450 11:03:16.206588 ==
1451 11:03:16.206654 DQS Delay:
1452 11:03:16.209779 DQS0 = 0, DQS1 = 0
1453 11:03:16.209863 DQM Delay:
1454 11:03:16.213334 DQM0 = 19, DQM1 = 18
1455 11:03:16.213420 DQ Delay:
1456 11:03:16.216129 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15
1457 11:03:16.219494 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
1458 11:03:16.222710 DQ8 =14, DQ9 =16, DQ10 =25, DQ11 =16
1459 11:03:16.226152 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =21
1460 11:03:16.226237
1461 11:03:16.226302
1462 11:03:16.226362
1463 11:03:16.229553 [DramC_TX_OE_Calibration] TA2
1464 11:03:16.233342 Original DQ_B0 (3 6) =30, OEN = 27
1465 11:03:16.236279 Original DQ_B1 (3 6) =30, OEN = 27
1466 11:03:16.239694 23, 0x0, End_B0=23 End_B1=23
1467 11:03:16.239780 24, 0x0, End_B0=24 End_B1=24
1468 11:03:16.243103 25, 0x0, End_B0=25 End_B1=25
1469 11:03:16.246347 26, 0x0, End_B0=26 End_B1=26
1470 11:03:16.249830 27, 0x0, End_B0=27 End_B1=27
1471 11:03:16.249916 28, 0x0, End_B0=28 End_B1=28
1472 11:03:16.252985 29, 0x0, End_B0=29 End_B1=29
1473 11:03:16.256380 30, 0x0, End_B0=30 End_B1=30
1474 11:03:16.260077 31, 0xFFFF, End_B0=30 End_B1=30
1475 11:03:16.263408 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1476 11:03:16.269889 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1477 11:03:16.269974
1478 11:03:16.270039
1479 11:03:16.273163 Write Rank0 MR23 =0x3f
1480 11:03:16.273247 [DQSOSC]
1481 11:03:16.283182 [DQSOSCAuto] RK0, (LSB)MR18= 0x1010, (MSB)MR19= 0x303, tDQSOscB0 = 401 ps tDQSOscB1 = 401 ps
1482 11:03:16.286864 CH0_RK0: MR19=0x303, MR18=0x1010, DQSOSC=401, MR23=63, INC=15, DEC=22
1483 11:03:16.290464 Write Rank0 MR23 =0x3f
1484 11:03:16.290548 [DQSOSC]
1485 11:03:16.300078 [DQSOSCAuto] RK0, (LSB)MR18= 0x1414, (MSB)MR19= 0x303, tDQSOscB0 = 399 ps tDQSOscB1 = 399 ps
1486 11:03:16.300163 CH0 RK0: MR19=303, MR18=1414
1487 11:03:16.303508 [RankSwap] Rank num 2, (Multi 1), Rank 1
1488 11:03:16.306662 Write Rank0 MR2 =0xad
1489 11:03:16.310325 [Write Leveling]
1490 11:03:16.310410 delay byte0 byte1 byte2 byte3
1491 11:03:16.310475
1492 11:03:16.313532 10 0 0
1493 11:03:16.313618 11 0 0
1494 11:03:16.316581 12 0 0
1495 11:03:16.316667 13 0 0
1496 11:03:16.320448 14 0 0
1497 11:03:16.320544 15 0 0
1498 11:03:16.320610 16 0 0
1499 11:03:16.323613 17 0 0
1500 11:03:16.323726 18 0 0
1501 11:03:16.327107 19 0 0
1502 11:03:16.327192 20 0 0
1503 11:03:16.327258 21 0 0
1504 11:03:16.330479 22 0 0
1505 11:03:16.330564 23 0 ff
1506 11:03:16.333840 24 0 ff
1507 11:03:16.333926 25 0 ff
1508 11:03:16.337083 26 0 ff
1509 11:03:16.337169 27 ff ff
1510 11:03:16.337236 28 ff ff
1511 11:03:16.340431 29 ff ff
1512 11:03:16.340528 30 ff ff
1513 11:03:16.343522 31 ff ff
1514 11:03:16.343608 32 ff ff
1515 11:03:16.347382 33 ff ff
1516 11:03:16.350656 pass bytecount = 0xff (0xff: all bytes pass)
1517 11:03:16.350740
1518 11:03:16.350804 DQS0 dly: 27
1519 11:03:16.353677 DQS1 dly: 23
1520 11:03:16.353761 Write Rank0 MR2 =0x2d
1521 11:03:16.357183 [RankSwap] Rank num 2, (Multi 1), Rank 0
1522 11:03:16.360784 Write Rank1 MR1 =0xd6
1523 11:03:16.360868 [Gating]
1524 11:03:16.360933 ==
1525 11:03:16.367175 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1526 11:03:16.370591 fsp= 1, odt_onoff= 1, Byte mode= 0
1527 11:03:16.370676 ==
1528 11:03:16.373776 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1529 11:03:16.377406 3 1 4 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1530 11:03:16.383874 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1531 11:03:16.387293 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1532 11:03:16.390410 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1533 11:03:16.397684 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1534 11:03:16.400754 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1535 11:03:16.404016 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1536 11:03:16.410808 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1537 11:03:16.413910 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1538 11:03:16.417367 3 2 8 |706 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1539 11:03:16.420532 3 2 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1540 11:03:16.427521 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1541 11:03:16.430779 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1542 11:03:16.433929 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1543 11:03:16.440762 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1544 11:03:16.444007 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1545 11:03:16.447675 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1546 11:03:16.454238 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1547 11:03:16.457641 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1548 11:03:16.461090 [Byte 0] Lead/lag Transition tap number (1)
1549 11:03:16.464178 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1550 11:03:16.471061 3 3 20 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
1551 11:03:16.474451 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1552 11:03:16.477478 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1553 11:03:16.484242 [Byte 1] Lead/lag falling Transition (3, 3, 28)
1554 11:03:16.487906 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1555 11:03:16.491107 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1556 11:03:16.494317 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1557 11:03:16.501423 3 4 12 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1558 11:03:16.504563 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 11:03:16.507753 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 11:03:16.514750 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 11:03:16.517825 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 11:03:16.521078 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1563 11:03:16.527623 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1564 11:03:16.531248 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1565 11:03:16.534306 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1566 11:03:16.537956 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1567 11:03:16.544472 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1568 11:03:16.548062 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1569 11:03:16.551364 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1570 11:03:16.557881 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1571 11:03:16.561196 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1572 11:03:16.564617 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1573 11:03:16.568300 [Byte 0] Lead/lag Transition tap number (2)
1574 11:03:16.574449 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1575 11:03:16.577806 3 6 8 |909 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1576 11:03:16.581300 [Byte 1] Lead/lag Transition tap number (2)
1577 11:03:16.584922 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
1578 11:03:16.588227 [Byte 0]First pass (3, 6, 12)
1579 11:03:16.591352 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1580 11:03:16.597751 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1581 11:03:16.597839 [Byte 1]First pass (3, 6, 20)
1582 11:03:16.604725 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1583 11:03:16.608085 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1584 11:03:16.611043 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1585 11:03:16.614841 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1586 11:03:16.617937 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1587 11:03:16.624823 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1588 11:03:16.627937 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1589 11:03:16.631486 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1590 11:03:16.634909 All bytes gating window > 1UI, Early break!
1591 11:03:16.634994
1592 11:03:16.637953 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1593 11:03:16.638039
1594 11:03:16.641681 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1595 11:03:16.641766
1596 11:03:16.641830
1597 11:03:16.641890
1598 11:03:16.648537 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1599 11:03:16.648623
1600 11:03:16.651603 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1601 11:03:16.651705
1602 11:03:16.651806
1603 11:03:16.651895 Write Rank1 MR1 =0x56
1604 11:03:16.654965
1605 11:03:16.655068 best RODT dly(2T, 0.5T) = (2, 3)
1606 11:03:16.655159
1607 11:03:16.658058 best RODT dly(2T, 0.5T) = (2, 3)
1608 11:03:16.658130 ==
1609 11:03:16.665199 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1610 11:03:16.668166 fsp= 1, odt_onoff= 1, Byte mode= 0
1611 11:03:16.668270 ==
1612 11:03:16.671449 Start DQ dly to find pass range UseTestEngine =0
1613 11:03:16.675058 x-axis: bit #, y-axis: DQ dly (-127~63)
1614 11:03:16.678081 RX Vref Scan = 0
1615 11:03:16.681434 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1616 11:03:16.681545 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1617 11:03:16.684820 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1618 11:03:16.688251 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1619 11:03:16.691537 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1620 11:03:16.695056 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1621 11:03:16.698331 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1622 11:03:16.701958 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1623 11:03:16.705381 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1624 11:03:16.705492 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1625 11:03:16.708485 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1626 11:03:16.711666 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1627 11:03:16.715095 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1628 11:03:16.718401 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1629 11:03:16.721966 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1630 11:03:16.725156 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1631 11:03:16.728347 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1632 11:03:16.728448 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1633 11:03:16.731790 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1634 11:03:16.735205 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1635 11:03:16.738701 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1636 11:03:16.741946 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1637 11:03:16.745159 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1638 11:03:16.748582 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1639 11:03:16.748664 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1640 11:03:16.751654 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1641 11:03:16.754996 0, [0] xxxoxoxx oxxoxxxx [MSB]
1642 11:03:16.758777 1, [0] xxxoxoxx ooxoooxx [MSB]
1643 11:03:16.761997 2, [0] xxxoxooo ooxoooox [MSB]
1644 11:03:16.765215 3, [0] xxxooooo ooxoooox [MSB]
1645 11:03:16.765301 4, [0] xooooooo ooxoooox [MSB]
1646 11:03:16.768549 5, [0] oooooooo ooxooooo [MSB]
1647 11:03:16.772061 6, [0] oooooooo ooxooooo [MSB]
1648 11:03:16.775355 33, [0] oooooooo xooooooo [MSB]
1649 11:03:16.778544 34, [0] oooooooo xooooooo [MSB]
1650 11:03:16.782081 35, [0] oooxoooo xooooooo [MSB]
1651 11:03:16.782166 36, [0] oooxoooo xooxoooo [MSB]
1652 11:03:16.785314 37, [0] oooxoxoo xxoxoxoo [MSB]
1653 11:03:16.788348 38, [0] oooxoxoo xxoxxxxo [MSB]
1654 11:03:16.792245 39, [0] oooxoxox xxoxxxxo [MSB]
1655 11:03:16.795710 40, [0] oooxoxxx xxoxxxxo [MSB]
1656 11:03:16.798635 41, [0] oxxxoxxx xxoxxxxx [MSB]
1657 11:03:16.801820 42, [0] oxxxxxxx xxoxxxxx [MSB]
1658 11:03:16.801896 43, [0] xxxxxxxx xxoxxxxx [MSB]
1659 11:03:16.805249 44, [0] xxxxxxxx xxoxxxxx [MSB]
1660 11:03:16.809005 45, [0] xxxxxxxx xxxxxxxx [MSB]
1661 11:03:16.811975 iDelay=45, Bit 0, Center 23 (5 ~ 42) 38
1662 11:03:16.815461 iDelay=45, Bit 1, Center 22 (4 ~ 40) 37
1663 11:03:16.818728 iDelay=45, Bit 2, Center 22 (4 ~ 40) 37
1664 11:03:16.821998 iDelay=45, Bit 3, Center 16 (-2 ~ 34) 37
1665 11:03:16.825530 iDelay=45, Bit 4, Center 22 (3 ~ 41) 39
1666 11:03:16.828828 iDelay=45, Bit 5, Center 18 (0 ~ 36) 37
1667 11:03:16.835584 iDelay=45, Bit 6, Center 20 (2 ~ 39) 38
1668 11:03:16.839206 iDelay=45, Bit 7, Center 20 (2 ~ 38) 37
1669 11:03:16.842464 iDelay=45, Bit 8, Center 15 (-2 ~ 32) 35
1670 11:03:16.845407 iDelay=45, Bit 9, Center 18 (1 ~ 36) 36
1671 11:03:16.849068 iDelay=45, Bit 10, Center 25 (7 ~ 44) 38
1672 11:03:16.852278 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1673 11:03:16.855693 iDelay=45, Bit 12, Center 19 (1 ~ 37) 37
1674 11:03:16.858788 iDelay=45, Bit 13, Center 18 (1 ~ 36) 36
1675 11:03:16.862217 iDelay=45, Bit 14, Center 19 (2 ~ 37) 36
1676 11:03:16.865443 iDelay=45, Bit 15, Center 22 (5 ~ 40) 36
1677 11:03:16.865520 ==
1678 11:03:16.871937 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1679 11:03:16.876080 fsp= 1, odt_onoff= 1, Byte mode= 0
1680 11:03:16.876156 ==
1681 11:03:16.876256 DQS Delay:
1682 11:03:16.878845 DQS0 = 0, DQS1 = 0
1683 11:03:16.878930 DQM Delay:
1684 11:03:16.882293 DQM0 = 20, DQM1 = 19
1685 11:03:16.882379 DQ Delay:
1686 11:03:16.886002 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =16
1687 11:03:16.889285 DQ4 =22, DQ5 =18, DQ6 =20, DQ7 =20
1688 11:03:16.892235 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
1689 11:03:16.895958 DQ12 =19, DQ13 =18, DQ14 =19, DQ15 =22
1690 11:03:16.896043
1691 11:03:16.896109
1692 11:03:16.896169 DramC Write-DBI off
1693 11:03:16.896227 ==
1694 11:03:16.902561 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1695 11:03:16.905620 fsp= 1, odt_onoff= 1, Byte mode= 0
1696 11:03:16.905699 ==
1697 11:03:16.908950 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1698 11:03:16.909033
1699 11:03:16.912617 Begin, DQ Scan Range 919~1175
1700 11:03:16.912699
1701 11:03:16.912762
1702 11:03:16.915714 TX Vref Scan disable
1703 11:03:16.919126 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1704 11:03:16.922446 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1705 11:03:16.925857 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1706 11:03:16.929042 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1707 11:03:16.932339 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1708 11:03:16.936086 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1709 11:03:16.939141 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1710 11:03:16.942706 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1711 11:03:16.945889 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1712 11:03:16.949040 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1713 11:03:16.952827 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1714 11:03:16.955900 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1715 11:03:16.959011 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1716 11:03:16.965846 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1717 11:03:16.969181 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1718 11:03:16.972668 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1719 11:03:16.976116 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1720 11:03:16.979212 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1721 11:03:16.982691 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1722 11:03:16.986064 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1723 11:03:16.989649 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1724 11:03:16.992715 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1725 11:03:16.995816 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1726 11:03:16.999506 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1727 11:03:17.002796 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1728 11:03:17.006264 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1729 11:03:17.009695 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1730 11:03:17.012855 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1731 11:03:17.016055 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1732 11:03:17.019409 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1733 11:03:17.022744 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1734 11:03:17.029672 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1735 11:03:17.032735 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1736 11:03:17.036237 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1737 11:03:17.039618 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1738 11:03:17.043061 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1739 11:03:17.046063 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1740 11:03:17.049230 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1741 11:03:17.052864 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1742 11:03:17.056346 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1743 11:03:17.059604 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1744 11:03:17.063092 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1745 11:03:17.066051 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1746 11:03:17.069492 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1747 11:03:17.072696 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1748 11:03:17.076318 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1749 11:03:17.079672 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1750 11:03:17.082727 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1751 11:03:17.086638 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1752 11:03:17.089863 968 |3 6 8|[0] xxxxxxxx ooxooxxx [MSB]
1753 11:03:17.092985 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1754 11:03:17.096290 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1755 11:03:17.099467 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1756 11:03:17.106227 972 |3 6 12|[0] xxxxxxxx ooxooooo [MSB]
1757 11:03:17.109823 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1758 11:03:17.112831 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1759 11:03:17.116411 975 |3 6 15|[0] xoxooooo oooooooo [MSB]
1760 11:03:17.119767 976 |3 6 16|[0] ooxooooo oooooooo [MSB]
1761 11:03:17.123055 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1762 11:03:17.126432 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1763 11:03:17.129395 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1764 11:03:17.133183 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1765 11:03:17.139651 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1766 11:03:17.142785 991 |3 6 31|[0] oooxoooo xxxxxxxx [MSB]
1767 11:03:17.146151 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1768 11:03:17.149430 993 |3 6 33|[0] xxxxxxxx xxxxxxxx [MSB]
1769 11:03:17.153173 Byte0, DQ PI dly=983, DQM PI dly= 983
1770 11:03:17.156433 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
1771 11:03:17.156524
1772 11:03:17.160118 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
1773 11:03:17.160201
1774 11:03:17.162791 Byte1, DQ PI dly=977, DQM PI dly= 977
1775 11:03:17.170108 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1776 11:03:17.170192
1777 11:03:17.172800 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1778 11:03:17.172883
1779 11:03:17.172946 ==
1780 11:03:17.179445 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1781 11:03:17.182808 fsp= 1, odt_onoff= 1, Byte mode= 0
1782 11:03:17.182893 ==
1783 11:03:17.186350 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1784 11:03:17.186434
1785 11:03:17.189585 Begin, DQ Scan Range 953~1017
1786 11:03:17.189669 Write Rank1 MR14 =0x0
1787 11:03:17.199030
1788 11:03:17.199113 CH=0, VrefRange= 0, VrefLevel = 0
1789 11:03:17.205524 TX Bit0 (978~991) 14 984, Bit8 (968~981) 14 974,
1790 11:03:17.209856 TX Bit1 (977~988) 12 982, Bit9 (969~983) 15 976,
1791 11:03:17.212363 TX Bit2 (978~990) 13 984, Bit10 (976~986) 11 981,
1792 11:03:17.218952 TX Bit3 (972~983) 12 977, Bit11 (969~981) 13 975,
1793 11:03:17.222449 TX Bit4 (977~990) 14 983, Bit12 (971~984) 14 977,
1794 11:03:17.229047 TX Bit5 (974~986) 13 980, Bit13 (973~981) 9 977,
1795 11:03:17.232570 TX Bit6 (976~989) 14 982, Bit14 (972~983) 12 977,
1796 11:03:17.235891 TX Bit7 (976~990) 15 983, Bit15 (975~986) 12 980,
1797 11:03:17.235975
1798 11:03:17.239196 Write Rank1 MR14 =0x2
1799 11:03:17.247252
1800 11:03:17.247336 CH=0, VrefRange= 0, VrefLevel = 2
1801 11:03:17.253921 TX Bit0 (977~992) 16 984, Bit8 (968~982) 15 975,
1802 11:03:17.257389 TX Bit1 (977~990) 14 983, Bit9 (969~984) 16 976,
1803 11:03:17.263744 TX Bit2 (978~991) 14 984, Bit10 (976~988) 13 982,
1804 11:03:17.267302 TX Bit3 (971~984) 14 977, Bit11 (969~982) 14 975,
1805 11:03:17.270594 TX Bit4 (976~990) 15 983, Bit12 (970~984) 15 977,
1806 11:03:17.277127 TX Bit5 (974~987) 14 980, Bit13 (972~982) 11 977,
1807 11:03:17.280353 TX Bit6 (975~990) 16 982, Bit14 (972~984) 13 978,
1808 11:03:17.283550 TX Bit7 (976~990) 15 983, Bit15 (975~989) 15 982,
1809 11:03:17.283632
1810 11:03:17.290518 wait MRW command Rank1 MR14 =0x4 fired (1)
1811 11:03:17.290599 Write Rank1 MR14 =0x4
1812 11:03:17.298885
1813 11:03:17.298965 CH=0, VrefRange= 0, VrefLevel = 4
1814 11:03:17.305695 TX Bit0 (977~992) 16 984, Bit8 (968~982) 15 975,
1815 11:03:17.308894 TX Bit1 (977~990) 14 983, Bit9 (969~984) 16 976,
1816 11:03:17.315484 TX Bit2 (978~991) 14 984, Bit10 (975~989) 15 982,
1817 11:03:17.318735 TX Bit3 (970~985) 16 977, Bit11 (969~983) 15 976,
1818 11:03:17.322020 TX Bit4 (976~991) 16 983, Bit12 (970~984) 15 977,
1819 11:03:17.328599 TX Bit5 (973~989) 17 981, Bit13 (971~983) 13 977,
1820 11:03:17.332772 TX Bit6 (975~990) 16 982, Bit14 (971~985) 15 978,
1821 11:03:17.335702 TX Bit7 (976~991) 16 983, Bit15 (974~989) 16 981,
1822 11:03:17.335798
1823 11:03:17.338997 Write Rank1 MR14 =0x6
1824 11:03:17.347050
1825 11:03:17.347131 CH=0, VrefRange= 0, VrefLevel = 6
1826 11:03:17.354081 TX Bit0 (977~993) 17 985, Bit8 (968~983) 16 975,
1827 11:03:17.357022 TX Bit1 (977~991) 15 984, Bit9 (969~985) 17 977,
1828 11:03:17.360593 TX Bit2 (978~992) 15 985, Bit10 (975~990) 16 982,
1829 11:03:17.367167 TX Bit3 (970~986) 17 978, Bit11 (968~983) 16 975,
1830 11:03:17.370829 TX Bit4 (976~991) 16 983, Bit12 (970~985) 16 977,
1831 11:03:17.377254 TX Bit5 (973~989) 17 981, Bit13 (971~983) 13 977,
1832 11:03:17.380596 TX Bit6 (975~990) 16 982, Bit14 (970~985) 16 977,
1833 11:03:17.383960 TX Bit7 (975~991) 17 983, Bit15 (973~990) 18 981,
1834 11:03:17.384044
1835 11:03:17.390830 wait MRW command Rank1 MR14 =0x8 fired (1)
1836 11:03:17.390913 Write Rank1 MR14 =0x8
1837 11:03:17.399215
1838 11:03:17.399299 CH=0, VrefRange= 0, VrefLevel = 8
1839 11:03:17.406225 TX Bit0 (977~993) 17 985, Bit8 (967~983) 17 975,
1840 11:03:17.409497 TX Bit1 (976~991) 16 983, Bit9 (968~985) 18 976,
1841 11:03:17.415958 TX Bit2 (977~992) 16 984, Bit10 (975~990) 16 982,
1842 11:03:17.419555 TX Bit3 (970~987) 18 978, Bit11 (968~983) 16 975,
1843 11:03:17.422843 TX Bit4 (976~991) 16 983, Bit12 (969~986) 18 977,
1844 11:03:17.429382 TX Bit5 (972~990) 19 981, Bit13 (970~984) 15 977,
1845 11:03:17.432657 TX Bit6 (974~991) 18 982, Bit14 (970~986) 17 978,
1846 11:03:17.436450 TX Bit7 (975~992) 18 983, Bit15 (973~990) 18 981,
1847 11:03:17.436553
1848 11:03:17.439544 Write Rank1 MR14 =0xa
1849 11:03:17.447565
1850 11:03:17.450673 CH=0, VrefRange= 0, VrefLevel = 10
1851 11:03:17.454123 TX Bit0 (977~994) 18 985, Bit8 (967~983) 17 975,
1852 11:03:17.457765 TX Bit1 (976~992) 17 984, Bit9 (968~986) 19 977,
1853 11:03:17.464187 TX Bit2 (977~993) 17 985, Bit10 (975~991) 17 983,
1854 11:03:17.467402 TX Bit3 (970~988) 19 979, Bit11 (968~984) 17 976,
1855 11:03:17.470701 TX Bit4 (975~992) 18 983, Bit12 (969~986) 18 977,
1856 11:03:17.477827 TX Bit5 (972~990) 19 981, Bit13 (970~984) 15 977,
1857 11:03:17.481245 TX Bit6 (974~991) 18 982, Bit14 (969~987) 19 978,
1858 11:03:17.484250 TX Bit7 (974~992) 19 983, Bit15 (974~991) 18 982,
1859 11:03:17.484362
1860 11:03:17.488003 Write Rank1 MR14 =0xc
1861 11:03:17.496305
1862 11:03:17.499999 CH=0, VrefRange= 0, VrefLevel = 12
1863 11:03:17.502889 TX Bit0 (976~995) 20 985, Bit8 (967~984) 18 975,
1864 11:03:17.506516 TX Bit1 (976~992) 17 984, Bit9 (968~986) 19 977,
1865 11:03:17.513008 TX Bit2 (977~993) 17 985, Bit10 (973~991) 19 982,
1866 11:03:17.516592 TX Bit3 (970~989) 20 979, Bit11 (968~984) 17 976,
1867 11:03:17.520014 TX Bit4 (975~992) 18 983, Bit12 (969~987) 19 978,
1868 11:03:17.526707 TX Bit5 (971~991) 21 981, Bit13 (970~985) 16 977,
1869 11:03:17.529708 TX Bit6 (974~991) 18 982, Bit14 (969~988) 20 978,
1870 11:03:17.533282 TX Bit7 (975~992) 18 983, Bit15 (972~991) 20 981,
1871 11:03:17.533368
1872 11:03:17.536573 Write Rank1 MR14 =0xe
1873 11:03:17.545069
1874 11:03:17.548240 CH=0, VrefRange= 0, VrefLevel = 14
1875 11:03:17.551640 TX Bit0 (976~995) 20 985, Bit8 (967~984) 18 975,
1876 11:03:17.554837 TX Bit1 (975~993) 19 984, Bit9 (968~987) 20 977,
1877 11:03:17.561841 TX Bit2 (977~993) 17 985, Bit10 (973~991) 19 982,
1878 11:03:17.565144 TX Bit3 (969~989) 21 979, Bit11 (967~984) 18 975,
1879 11:03:17.568122 TX Bit4 (975~993) 19 984, Bit12 (969~988) 20 978,
1880 11:03:17.574758 TX Bit5 (971~991) 21 981, Bit13 (969~985) 17 977,
1881 11:03:17.577939 TX Bit6 (973~992) 20 982, Bit14 (969~989) 21 979,
1882 11:03:17.581845 TX Bit7 (974~993) 20 983, Bit15 (972~991) 20 981,
1883 11:03:17.585020
1884 11:03:17.585105 Write Rank1 MR14 =0x10
1885 11:03:17.594190
1886 11:03:17.594276 CH=0, VrefRange= 0, VrefLevel = 16
1887 11:03:17.601008 TX Bit0 (976~996) 21 986, Bit8 (966~985) 20 975,
1888 11:03:17.603851 TX Bit1 (975~993) 19 984, Bit9 (968~987) 20 977,
1889 11:03:17.610607 TX Bit2 (976~994) 19 985, Bit10 (973~991) 19 982,
1890 11:03:17.613955 TX Bit3 (969~990) 22 979, Bit11 (967~985) 19 976,
1891 11:03:17.617735 TX Bit4 (974~994) 21 984, Bit12 (968~989) 22 978,
1892 11:03:17.624091 TX Bit5 (971~991) 21 981, Bit13 (969~986) 18 977,
1893 11:03:17.627746 TX Bit6 (972~992) 21 982, Bit14 (969~989) 21 979,
1894 11:03:17.630935 TX Bit7 (973~994) 22 983, Bit15 (971~991) 21 981,
1895 11:03:17.631020
1896 11:03:17.633745 Write Rank1 MR14 =0x12
1897 11:03:17.643125
1898 11:03:17.646468 CH=0, VrefRange= 0, VrefLevel = 18
1899 11:03:17.649935 TX Bit0 (976~997) 22 986, Bit8 (966~985) 20 975,
1900 11:03:17.653628 TX Bit1 (975~994) 20 984, Bit9 (968~989) 22 978,
1901 11:03:17.659897 TX Bit2 (976~995) 20 985, Bit10 (972~992) 21 982,
1902 11:03:17.663423 TX Bit3 (969~990) 22 979, Bit11 (967~986) 20 976,
1903 11:03:17.666380 TX Bit4 (974~994) 21 984, Bit12 (968~989) 22 978,
1904 11:03:17.673249 TX Bit5 (971~991) 21 981, Bit13 (969~987) 19 978,
1905 11:03:17.676599 TX Bit6 (972~993) 22 982, Bit14 (969~989) 21 979,
1906 11:03:17.679982 TX Bit7 (973~994) 22 983, Bit15 (971~992) 22 981,
1907 11:03:17.680068
1908 11:03:17.683215 Write Rank1 MR14 =0x14
1909 11:03:17.692606
1910 11:03:17.692691 CH=0, VrefRange= 0, VrefLevel = 20
1911 11:03:17.698677 TX Bit0 (976~997) 22 986, Bit8 (966~986) 21 976,
1912 11:03:17.702222 TX Bit1 (975~994) 20 984, Bit9 (968~989) 22 978,
1913 11:03:17.709009 TX Bit2 (976~996) 21 986, Bit10 (972~993) 22 982,
1914 11:03:17.712070 TX Bit3 (969~990) 22 979, Bit11 (967~986) 20 976,
1915 11:03:17.715822 TX Bit4 (974~994) 21 984, Bit12 (968~990) 23 979,
1916 11:03:17.722196 TX Bit5 (970~992) 23 981, Bit13 (969~987) 19 978,
1917 11:03:17.725446 TX Bit6 (971~993) 23 982, Bit14 (968~990) 23 979,
1918 11:03:17.728685 TX Bit7 (972~995) 24 983, Bit15 (970~992) 23 981,
1919 11:03:17.728770
1920 11:03:17.732182 Write Rank1 MR14 =0x16
1921 11:03:17.740996
1922 11:03:17.741084 CH=0, VrefRange= 0, VrefLevel = 22
1923 11:03:17.747767 TX Bit0 (976~997) 22 986, Bit8 (965~986) 22 975,
1924 11:03:17.751638 TX Bit1 (975~995) 21 985, Bit9 (967~990) 24 978,
1925 11:03:17.758076 TX Bit2 (976~996) 21 986, Bit10 (971~993) 23 982,
1926 11:03:17.761239 TX Bit3 (969~991) 23 980, Bit11 (967~987) 21 977,
1927 11:03:17.765157 TX Bit4 (973~995) 23 984, Bit12 (968~990) 23 979,
1928 11:03:17.771706 TX Bit5 (970~992) 23 981, Bit13 (968~988) 21 978,
1929 11:03:17.775077 TX Bit6 (971~994) 24 982, Bit14 (968~990) 23 979,
1930 11:03:17.778158 TX Bit7 (972~995) 24 983, Bit15 (970~992) 23 981,
1931 11:03:17.778244
1932 11:03:17.782041 Write Rank1 MR14 =0x18
1933 11:03:17.790612
1934 11:03:17.793996 CH=0, VrefRange= 0, VrefLevel = 24
1935 11:03:17.797452 TX Bit0 (975~998) 24 986, Bit8 (965~987) 23 976,
1936 11:03:17.800358 TX Bit1 (974~996) 23 985, Bit9 (967~990) 24 978,
1937 11:03:17.807047 TX Bit2 (976~997) 22 986, Bit10 (971~993) 23 982,
1938 11:03:17.810789 TX Bit3 (969~991) 23 980, Bit11 (966~988) 23 977,
1939 11:03:17.814149 TX Bit4 (972~996) 25 984, Bit12 (968~990) 23 979,
1940 11:03:17.820336 TX Bit5 (970~993) 24 981, Bit13 (968~989) 22 978,
1941 11:03:17.823912 TX Bit6 (971~994) 24 982, Bit14 (968~990) 23 979,
1942 11:03:17.827302 TX Bit7 (972~996) 25 984, Bit15 (969~993) 25 981,
1943 11:03:17.827386
1944 11:03:17.830323 Write Rank1 MR14 =0x1a
1945 11:03:17.839784
1946 11:03:17.842925 CH=0, VrefRange= 0, VrefLevel = 26
1947 11:03:17.846266 TX Bit0 (975~998) 24 986, Bit8 (965~988) 24 976,
1948 11:03:17.849488 TX Bit1 (974~997) 24 985, Bit9 (967~990) 24 978,
1949 11:03:17.856673 TX Bit2 (975~997) 23 986, Bit10 (971~994) 24 982,
1950 11:03:17.860075 TX Bit3 (968~991) 24 979, Bit11 (966~989) 24 977,
1951 11:03:17.863313 TX Bit4 (972~997) 26 984, Bit12 (967~990) 24 978,
1952 11:03:17.869455 TX Bit5 (970~993) 24 981, Bit13 (968~989) 22 978,
1953 11:03:17.873371 TX Bit6 (971~995) 25 983, Bit14 (968~991) 24 979,
1954 11:03:17.876718 TX Bit7 (971~997) 27 984, Bit15 (970~993) 24 981,
1955 11:03:17.876804
1956 11:03:17.879702 Write Rank1 MR14 =0x1c
1957 11:03:17.888882
1958 11:03:17.888967 CH=0, VrefRange= 0, VrefLevel = 28
1959 11:03:17.895789 TX Bit0 (975~998) 24 986, Bit8 (964~989) 26 976,
1960 11:03:17.898944 TX Bit1 (973~997) 25 985, Bit9 (967~990) 24 978,
1961 11:03:17.906175 TX Bit2 (975~998) 24 986, Bit10 (971~994) 24 982,
1962 11:03:17.909096 TX Bit3 (968~991) 24 979, Bit11 (966~989) 24 977,
1963 11:03:17.913155 TX Bit4 (972~997) 26 984, Bit12 (968~991) 24 979,
1964 11:03:17.919403 TX Bit5 (970~993) 24 981, Bit13 (968~990) 23 979,
1965 11:03:17.922581 TX Bit6 (970~995) 26 982, Bit14 (968~991) 24 979,
1966 11:03:17.925647 TX Bit7 (971~997) 27 984, Bit15 (969~993) 25 981,
1967 11:03:17.925734
1968 11:03:17.928895 Write Rank1 MR14 =0x1e
1969 11:03:17.938121
1970 11:03:17.941708 CH=0, VrefRange= 0, VrefLevel = 30
1971 11:03:17.945007 TX Bit0 (975~999) 25 987, Bit8 (964~989) 26 976,
1972 11:03:17.948276 TX Bit1 (973~997) 25 985, Bit9 (967~990) 24 978,
1973 11:03:17.955269 TX Bit2 (975~998) 24 986, Bit10 (971~995) 25 983,
1974 11:03:17.958486 TX Bit3 (968~992) 25 980, Bit11 (966~989) 24 977,
1975 11:03:17.962399 TX Bit4 (972~997) 26 984, Bit12 (967~990) 24 978,
1976 11:03:17.968925 TX Bit5 (969~994) 26 981, Bit13 (968~990) 23 979,
1977 11:03:17.972034 TX Bit6 (970~995) 26 982, Bit14 (967~991) 25 979,
1978 11:03:17.975219 TX Bit7 (972~998) 27 985, Bit15 (969~994) 26 981,
1979 11:03:17.975305
1980 11:03:17.978518 Write Rank1 MR14 =0x20
1981 11:03:17.988093
1982 11:03:17.991332 CH=0, VrefRange= 0, VrefLevel = 32
1983 11:03:17.994840 TX Bit0 (974~999) 26 986, Bit8 (965~989) 25 977,
1984 11:03:17.997672 TX Bit1 (974~998) 25 986, Bit9 (967~990) 24 978,
1985 11:03:18.004691 TX Bit2 (975~998) 24 986, Bit10 (970~995) 26 982,
1986 11:03:18.007956 TX Bit3 (968~992) 25 980, Bit11 (966~989) 24 977,
1987 11:03:18.011163 TX Bit4 (972~998) 27 985, Bit12 (967~990) 24 978,
1988 11:03:18.017731 TX Bit5 (969~994) 26 981, Bit13 (967~990) 24 978,
1989 11:03:18.021508 TX Bit6 (970~996) 27 983, Bit14 (967~991) 25 979,
1990 11:03:18.024816 TX Bit7 (972~998) 27 985, Bit15 (969~993) 25 981,
1991 11:03:18.024927
1992 11:03:18.027943 Write Rank1 MR14 =0x22
1993 11:03:18.037107
1994 11:03:18.040300 CH=0, VrefRange= 0, VrefLevel = 34
1995 11:03:18.043999 TX Bit0 (974~999) 26 986, Bit8 (965~989) 25 977,
1996 11:03:18.047177 TX Bit1 (974~998) 25 986, Bit9 (967~990) 24 978,
1997 11:03:18.053822 TX Bit2 (975~998) 24 986, Bit10 (970~995) 26 982,
1998 11:03:18.057049 TX Bit3 (968~992) 25 980, Bit11 (966~989) 24 977,
1999 11:03:18.060704 TX Bit4 (972~998) 27 985, Bit12 (967~990) 24 978,
2000 11:03:18.067230 TX Bit5 (969~994) 26 981, Bit13 (967~990) 24 978,
2001 11:03:18.070387 TX Bit6 (970~996) 27 983, Bit14 (967~991) 25 979,
2002 11:03:18.073986 TX Bit7 (972~998) 27 985, Bit15 (969~993) 25 981,
2003 11:03:18.074089
2004 11:03:18.076988 Write Rank1 MR14 =0x24
2005 11:03:18.086084
2006 11:03:18.090079 CH=0, VrefRange= 0, VrefLevel = 36
2007 11:03:18.092901 TX Bit0 (974~999) 26 986, Bit8 (965~989) 25 977,
2008 11:03:18.096593 TX Bit1 (974~998) 25 986, Bit9 (967~990) 24 978,
2009 11:03:18.102818 TX Bit2 (975~998) 24 986, Bit10 (970~995) 26 982,
2010 11:03:18.106277 TX Bit3 (968~992) 25 980, Bit11 (966~989) 24 977,
2011 11:03:18.109657 TX Bit4 (972~998) 27 985, Bit12 (967~990) 24 978,
2012 11:03:18.116102 TX Bit5 (969~994) 26 981, Bit13 (967~990) 24 978,
2013 11:03:18.119842 TX Bit6 (970~996) 27 983, Bit14 (967~991) 25 979,
2014 11:03:18.122896 TX Bit7 (972~998) 27 985, Bit15 (969~993) 25 981,
2015 11:03:18.122981
2016 11:03:18.129459 wait MRW command Rank1 MR14 =0x26 fired (1)
2017 11:03:18.129545 Write Rank1 MR14 =0x26
2018 11:03:18.139710
2019 11:03:18.139795 CH=0, VrefRange= 0, VrefLevel = 38
2020 11:03:18.145961 TX Bit0 (974~999) 26 986, Bit8 (965~989) 25 977,
2021 11:03:18.149425 TX Bit1 (974~998) 25 986, Bit9 (967~990) 24 978,
2022 11:03:18.155902 TX Bit2 (975~998) 24 986, Bit10 (970~995) 26 982,
2023 11:03:18.159409 TX Bit3 (968~992) 25 980, Bit11 (966~989) 24 977,
2024 11:03:18.162653 TX Bit4 (972~998) 27 985, Bit12 (967~990) 24 978,
2025 11:03:18.169520 TX Bit5 (969~994) 26 981, Bit13 (967~990) 24 978,
2026 11:03:18.172626 TX Bit6 (970~996) 27 983, Bit14 (967~991) 25 979,
2027 11:03:18.175982 TX Bit7 (972~998) 27 985, Bit15 (969~993) 25 981,
2028 11:03:18.176068
2029 11:03:18.179383
2030 11:03:18.182988 TX Vref found, early break! 372< 383
2031 11:03:18.185846 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2032 11:03:18.189269 u1DelayCellOfst[0]=7 cells (6 PI)
2033 11:03:18.192582 u1DelayCellOfst[1]=7 cells (6 PI)
2034 11:03:18.195811 u1DelayCellOfst[2]=7 cells (6 PI)
2035 11:03:18.199330 u1DelayCellOfst[3]=0 cells (0 PI)
2036 11:03:18.202427 u1DelayCellOfst[4]=6 cells (5 PI)
2037 11:03:18.202514 u1DelayCellOfst[5]=1 cells (1 PI)
2038 11:03:18.205767 u1DelayCellOfst[6]=3 cells (3 PI)
2039 11:03:18.209583 u1DelayCellOfst[7]=6 cells (5 PI)
2040 11:03:18.212559 Byte0, DQ PI dly=980, DQM PI dly= 983
2041 11:03:18.219574 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2042 11:03:18.219748
2043 11:03:18.222866 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2044 11:03:18.223004
2045 11:03:18.226150 u1DelayCellOfst[8]=0 cells (0 PI)
2046 11:03:18.229458 u1DelayCellOfst[9]=1 cells (1 PI)
2047 11:03:18.232899 u1DelayCellOfst[10]=6 cells (5 PI)
2048 11:03:18.236194 u1DelayCellOfst[11]=0 cells (0 PI)
2049 11:03:18.236304 u1DelayCellOfst[12]=1 cells (1 PI)
2050 11:03:18.239521 u1DelayCellOfst[13]=1 cells (1 PI)
2051 11:03:18.242677 u1DelayCellOfst[14]=2 cells (2 PI)
2052 11:03:18.245893 u1DelayCellOfst[15]=5 cells (4 PI)
2053 11:03:18.249492 Byte1, DQ PI dly=977, DQM PI dly= 979
2054 11:03:18.256019 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
2055 11:03:18.256134
2056 11:03:18.259332 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
2057 11:03:18.259440
2058 11:03:18.263141 wait MRW command Rank1 MR14 =0x20 fired (1)
2059 11:03:18.266033 Write Rank1 MR14 =0x20
2060 11:03:18.266144
2061 11:03:18.266235 Final TX Range 0 Vref 32
2062 11:03:18.266323
2063 11:03:18.273180 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2064 11:03:18.273288
2065 11:03:18.279660 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2066 11:03:18.286370 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2067 11:03:18.296326 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2068 11:03:18.296437 Write Rank1 MR3 =0xb0
2069 11:03:18.300051 DramC Write-DBI on
2070 11:03:18.300153 ==
2071 11:03:18.302971 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2072 11:03:18.306618 fsp= 1, odt_onoff= 1, Byte mode= 0
2073 11:03:18.306721 ==
2074 11:03:18.313267 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2075 11:03:18.313373
2076 11:03:18.313462 Begin, DQ Scan Range 699~763
2077 11:03:18.313546
2078 11:03:18.313628
2079 11:03:18.316219 TX Vref Scan disable
2080 11:03:18.319787 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2081 11:03:18.323069 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2082 11:03:18.326631 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2083 11:03:18.329763 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2084 11:03:18.333013 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2085 11:03:18.336322 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2086 11:03:18.339842 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2087 11:03:18.343249 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2088 11:03:18.346921 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2089 11:03:18.353299 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2090 11:03:18.356606 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2091 11:03:18.359805 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2092 11:03:18.363393 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2093 11:03:18.366637 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2094 11:03:18.369948 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2095 11:03:18.372974 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2096 11:03:18.380448 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2097 11:03:18.383856 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2098 11:03:18.386999 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2099 11:03:18.390578 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2100 11:03:18.393934 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2101 11:03:18.397131 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2102 11:03:18.400201 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2103 11:03:18.403530 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2104 11:03:18.407211 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2105 11:03:18.410412 Byte0, DQ PI dly=728, DQM PI dly= 728
2106 11:03:18.414047 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2107 11:03:18.414145
2108 11:03:18.420617 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2109 11:03:18.420719
2110 11:03:18.423645 Byte1, DQ PI dly=722, DQM PI dly= 722
2111 11:03:18.427213 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2112 11:03:18.427311
2113 11:03:18.430512 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2114 11:03:18.430614
2115 11:03:18.437378 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2116 11:03:18.443825 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2117 11:03:18.454344 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2118 11:03:18.454449 Write Rank1 MR3 =0x30
2119 11:03:18.457425 DramC Write-DBI off
2120 11:03:18.457533
2121 11:03:18.457631 [DATLAT]
2122 11:03:18.460218 Freq=1600, CH0 RK1, use_rxtx_scan=0
2123 11:03:18.460325
2124 11:03:18.464098 DATLAT Default: 0x10
2125 11:03:18.464213 7, 0xFFFF, sum=0
2126 11:03:18.467696 8, 0xFFFF, sum=0
2127 11:03:18.467804 9, 0xFFFF, sum=0
2128 11:03:18.467894 10, 0xFFFF, sum=0
2129 11:03:18.471141 11, 0xFFFF, sum=0
2130 11:03:18.471246 12, 0xFFFF, sum=0
2131 11:03:18.474363 13, 0xFFFF, sum=0
2132 11:03:18.474475 14, 0x0, sum=1
2133 11:03:18.477591 15, 0x0, sum=2
2134 11:03:18.477703 16, 0x0, sum=3
2135 11:03:18.481077 17, 0x0, sum=4
2136 11:03:18.484201 pattern=2 first_step=14 total pass=5 best_step=16
2137 11:03:18.484326 ==
2138 11:03:18.487442 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2139 11:03:18.490750 fsp= 1, odt_onoff= 1, Byte mode= 0
2140 11:03:18.490863 ==
2141 11:03:18.497307 Start DQ dly to find pass range UseTestEngine =1
2142 11:03:18.500819 x-axis: bit #, y-axis: DQ dly (-127~63)
2143 11:03:18.500937 RX Vref Scan = 0
2144 11:03:18.503849 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2145 11:03:18.507317 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2146 11:03:18.510930 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2147 11:03:18.513958 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2148 11:03:18.517559 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2149 11:03:18.520528 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2150 11:03:18.520655 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2151 11:03:18.524188 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2152 11:03:18.527317 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2153 11:03:18.530639 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2154 11:03:18.533882 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2155 11:03:18.537417 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2156 11:03:18.541019 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2157 11:03:18.544153 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2158 11:03:18.544240 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2159 11:03:18.547825 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2160 11:03:18.550777 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2161 11:03:18.553999 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2162 11:03:18.557786 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2163 11:03:18.561169 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2164 11:03:18.564177 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2165 11:03:18.564265 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2166 11:03:18.567389 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2167 11:03:18.570816 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2168 11:03:18.574470 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2169 11:03:18.577590 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2170 11:03:18.580841 0, [0] xxxoxxxx oxxoxxxx [MSB]
2171 11:03:18.580930 1, [0] xxxoxoxx ooxooxxx [MSB]
2172 11:03:18.584299 2, [0] xxxoxoxx ooxoooxx [MSB]
2173 11:03:18.587547 3, [0] xxxoxooo ooxoooox [MSB]
2174 11:03:18.590735 4, [0] xxxoxooo ooxoooox [MSB]
2175 11:03:18.594248 5, [0] xoxooooo ooxoooox [MSB]
2176 11:03:18.597744 6, [0] oooooooo ooxooooo [MSB]
2177 11:03:18.601110 33, [0] oooooooo xooooooo [MSB]
2178 11:03:18.604228 34, [0] oooxoooo xooooooo [MSB]
2179 11:03:18.607451 35, [0] oooxoxoo xooxoooo [MSB]
2180 11:03:18.611277 36, [0] oooxoxoo xooxoxoo [MSB]
2181 11:03:18.614603 37, [0] oooxoxoo xxoxoxoo [MSB]
2182 11:03:18.614691 38, [0] oooxoxxo xxoxxxxo [MSB]
2183 11:03:18.617940 39, [0] oxxxoxxx xxoxxxxo [MSB]
2184 11:03:18.621239 40, [0] oxxxxxxx xxoxxxxx [MSB]
2185 11:03:18.624778 41, [0] xxxxxxxx xxoxxxxx [MSB]
2186 11:03:18.627942 42, [0] xxxxxxxx xxoxxxxx [MSB]
2187 11:03:18.630767 43, [0] xxxxxxxx xxoxxxxx [MSB]
2188 11:03:18.630856 44, [0] xxxxxxxx xxxxxxxx [MSB]
2189 11:03:18.637925 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
2190 11:03:18.640889 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2191 11:03:18.644890 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2192 11:03:18.647672 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2193 11:03:18.651197 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
2194 11:03:18.654306 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2195 11:03:18.657824 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2196 11:03:18.661486 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2197 11:03:18.664418 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
2198 11:03:18.667822 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2199 11:03:18.671176 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2200 11:03:18.674360 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2201 11:03:18.678043 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2202 11:03:18.680877 iDelay=44, Bit 13, Center 18 (2 ~ 35) 34
2203 11:03:18.687944 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
2204 11:03:18.691270 iDelay=44, Bit 15, Center 22 (6 ~ 39) 34
2205 11:03:18.691354 ==
2206 11:03:18.694700 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2207 11:03:18.697892 fsp= 1, odt_onoff= 1, Byte mode= 0
2208 11:03:18.697977 ==
2209 11:03:18.698042 DQS Delay:
2210 11:03:18.701225 DQS0 = 0, DQS1 = 0
2211 11:03:18.701308 DQM Delay:
2212 11:03:18.704549 DQM0 = 20, DQM1 = 19
2213 11:03:18.704634 DQ Delay:
2214 11:03:18.707811 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15
2215 11:03:18.711333 DQ4 =22, DQ5 =17, DQ6 =20, DQ7 =20
2216 11:03:18.714880 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
2217 11:03:18.717789 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
2218 11:03:18.717872
2219 11:03:18.717935
2220 11:03:18.717994
2221 11:03:18.721282 [DramC_TX_OE_Calibration] TA2
2222 11:03:18.724862 Original DQ_B0 (3 6) =30, OEN = 27
2223 11:03:18.728351 Original DQ_B1 (3 6) =30, OEN = 27
2224 11:03:18.731498 23, 0x0, End_B0=23 End_B1=23
2225 11:03:18.731584 24, 0x0, End_B0=24 End_B1=24
2226 11:03:18.735051 25, 0x0, End_B0=25 End_B1=25
2227 11:03:18.738287 26, 0x0, End_B0=26 End_B1=26
2228 11:03:18.741551 27, 0x0, End_B0=27 End_B1=27
2229 11:03:18.741636 28, 0x0, End_B0=28 End_B1=28
2230 11:03:18.744741 29, 0x0, End_B0=29 End_B1=29
2231 11:03:18.748213 30, 0x0, End_B0=30 End_B1=30
2232 11:03:18.751672 31, 0xFFFF, End_B0=30 End_B1=30
2233 11:03:18.754769 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2234 11:03:18.761425 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2235 11:03:18.761510
2236 11:03:18.761574
2237 11:03:18.765168 Write Rank1 MR23 =0x3f
2238 11:03:18.765250 [DQSOSC]
2239 11:03:18.774996 [DQSOSCAuto] RK1, (LSB)MR18= 0xdada, (MSB)MR19= 0x202, tDQSOscB0 = 431 ps tDQSOscB1 = 431 ps
2240 11:03:18.778214 CH0_RK1: MR19=0x202, MR18=0xDADA, DQSOSC=431, MR23=63, INC=13, DEC=19
2241 11:03:18.781629 Write Rank1 MR23 =0x3f
2242 11:03:18.781738 [DQSOSC]
2243 11:03:18.791475 [DQSOSCAuto] RK1, (LSB)MR18= 0xdada, (MSB)MR19= 0x202, tDQSOscB0 = 431 ps tDQSOscB1 = 431 ps
2244 11:03:18.791586 CH0 RK1: MR19=202, MR18=DADA
2245 11:03:18.795121 [RxdqsGatingPostProcess] freq 1600
2246 11:03:18.801967 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2247 11:03:18.802053 Rank: 0
2248 11:03:18.805304 best DQS0 dly(2T, 0.5T) = (2, 5)
2249 11:03:18.808948 best DQS1 dly(2T, 0.5T) = (2, 5)
2250 11:03:18.811650 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2251 11:03:18.815548 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2252 11:03:18.815631 Rank: 1
2253 11:03:18.818793 best DQS0 dly(2T, 0.5T) = (2, 6)
2254 11:03:18.821987 best DQS1 dly(2T, 0.5T) = (2, 6)
2255 11:03:18.825151 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2256 11:03:18.828420 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2257 11:03:18.831793 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2258 11:03:18.835478 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2259 11:03:18.842383 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2260 11:03:18.842471 Write Rank0 MR13 =0x59
2261 11:03:18.842538 ==
2262 11:03:18.848851 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2263 11:03:18.852374 fsp= 1, odt_onoff= 1, Byte mode= 0
2264 11:03:18.852497 ==
2265 11:03:18.855302 === u2Vref_new: 0x56 --> 0x3a
2266 11:03:18.858956 === u2Vref_new: 0x58 --> 0x58
2267 11:03:18.862374 === u2Vref_new: 0x5a --> 0x5a
2268 11:03:18.862459 === u2Vref_new: 0x5c --> 0x78
2269 11:03:18.865450 === u2Vref_new: 0x5e --> 0x7a
2270 11:03:18.868960 === u2Vref_new: 0x60 --> 0x90
2271 11:03:18.872716 [CA 0] Center 37 (12~63) winsize 52
2272 11:03:18.875408 [CA 1] Center 37 (12~63) winsize 52
2273 11:03:18.878804 [CA 2] Center 34 (6~63) winsize 58
2274 11:03:18.882147 [CA 3] Center 34 (5~63) winsize 59
2275 11:03:18.886264 [CA 4] Center 34 (6~63) winsize 58
2276 11:03:18.889233 [CA 5] Center 28 (-2~59) winsize 62
2277 11:03:18.889322
2278 11:03:18.892340 [CATrainingPosCal] consider 1 rank data
2279 11:03:18.895830 u2DelayCellTimex100 = 735/100 ps
2280 11:03:18.898986 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2281 11:03:18.902637 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2282 11:03:18.905856 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2283 11:03:18.909205 CA3 delay=34 (5~63),Diff = 6 PI (7 cell)
2284 11:03:18.912571 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2285 11:03:18.919582 CA5 delay=28 (-2~59),Diff = 0 PI (0 cell)
2286 11:03:18.919675
2287 11:03:18.922342 CA PerBit enable=1, Macro0, CA PI delay=28
2288 11:03:18.926054 === u2Vref_new: 0x60 --> 0x90
2289 11:03:18.926140
2290 11:03:18.926206 Vref(ca) range 1: 32
2291 11:03:18.926266
2292 11:03:18.929222 CS Dly= 11 (42-0-32)
2293 11:03:18.929307 Write Rank0 MR13 =0xd8
2294 11:03:18.932480 Write Rank0 MR13 =0xd8
2295 11:03:18.935834 Write Rank0 MR12 =0x60
2296 11:03:18.935918 Write Rank1 MR13 =0x59
2297 11:03:18.935982 ==
2298 11:03:18.942983 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2299 11:03:18.946100 fsp= 1, odt_onoff= 1, Byte mode= 0
2300 11:03:18.946197 ==
2301 11:03:18.949391 === u2Vref_new: 0x56 --> 0x3a
2302 11:03:18.952754 === u2Vref_new: 0x58 --> 0x58
2303 11:03:18.955730 === u2Vref_new: 0x5a --> 0x5a
2304 11:03:18.955813 === u2Vref_new: 0x5c --> 0x78
2305 11:03:18.959618 === u2Vref_new: 0x5e --> 0x7a
2306 11:03:18.963118 === u2Vref_new: 0x60 --> 0x90
2307 11:03:18.966440 [CA 0] Center 37 (12~63) winsize 52
2308 11:03:18.969494 [CA 1] Center 37 (12~63) winsize 52
2309 11:03:18.972831 [CA 2] Center 35 (7~63) winsize 57
2310 11:03:18.976323 [CA 3] Center 34 (6~63) winsize 58
2311 11:03:18.980023 [CA 4] Center 34 (5~63) winsize 59
2312 11:03:18.982937 [CA 5] Center 27 (-2~57) winsize 60
2313 11:03:18.983035
2314 11:03:18.986672 [CATrainingPosCal] consider 2 rank data
2315 11:03:18.990022 u2DelayCellTimex100 = 735/100 ps
2316 11:03:18.992946 CA0 delay=37 (12~63),Diff = 10 PI (13 cell)
2317 11:03:18.996141 CA1 delay=37 (12~63),Diff = 10 PI (13 cell)
2318 11:03:18.999857 CA2 delay=35 (7~63),Diff = 8 PI (10 cell)
2319 11:03:19.006218 CA3 delay=34 (6~63),Diff = 7 PI (9 cell)
2320 11:03:19.009576 CA4 delay=34 (6~63),Diff = 7 PI (9 cell)
2321 11:03:19.013665 CA5 delay=27 (-2~57),Diff = 0 PI (0 cell)
2322 11:03:19.013749
2323 11:03:19.016478 CA PerBit enable=1, Macro0, CA PI delay=27
2324 11:03:19.019574 === u2Vref_new: 0x5c --> 0x78
2325 11:03:19.019683
2326 11:03:19.019777 Vref(ca) range 1: 28
2327 11:03:19.019867
2328 11:03:19.023284 CS Dly= 10 (41-0-32)
2329 11:03:19.026565 Write Rank1 MR13 =0xd8
2330 11:03:19.026648 Write Rank1 MR13 =0xd8
2331 11:03:19.030025 Write Rank1 MR12 =0x5c
2332 11:03:19.033081 [RankSwap] Rank num 2, (Multi 1), Rank 0
2333 11:03:19.033166 Write Rank0 MR2 =0xad
2334 11:03:19.036568 [Write Leveling]
2335 11:03:19.039761 delay byte0 byte1 byte2 byte3
2336 11:03:19.039844
2337 11:03:19.039909 10 0 0
2338 11:03:19.043424 11 0 0
2339 11:03:19.043539 12 0 0
2340 11:03:19.046441 13 0 0
2341 11:03:19.046525 14 0 0
2342 11:03:19.046603 15 0 0
2343 11:03:19.049980 16 0 0
2344 11:03:19.050076 17 0 0
2345 11:03:19.053336 18 0 0
2346 11:03:19.053431 19 0 0
2347 11:03:19.053499 20 0 0
2348 11:03:19.056438 21 0 0
2349 11:03:19.056537 22 0 0
2350 11:03:19.060040 23 0 0
2351 11:03:19.060124 24 0 ff
2352 11:03:19.063267 25 0 ff
2353 11:03:19.063397 26 0 ff
2354 11:03:19.063510 27 0 ff
2355 11:03:19.066530 28 0 ff
2356 11:03:19.066653 29 0 ff
2357 11:03:19.069761 30 0 ff
2358 11:03:19.069914 31 0 ff
2359 11:03:19.073411 32 0 ff
2360 11:03:19.073502 33 ff ff
2361 11:03:19.076386 34 ff ff
2362 11:03:19.076501 35 ff ff
2363 11:03:19.076569 36 ff ff
2364 11:03:19.080149 37 ff ff
2365 11:03:19.080234 38 ff ff
2366 11:03:19.083334 39 ff ff
2367 11:03:19.086492 pass bytecount = 0xff (0xff: all bytes pass)
2368 11:03:19.086578
2369 11:03:19.086642 DQS0 dly: 33
2370 11:03:19.090417 DQS1 dly: 24
2371 11:03:19.090500 Write Rank0 MR2 =0x2d
2372 11:03:19.093494 [RankSwap] Rank num 2, (Multi 1), Rank 0
2373 11:03:19.096586 Write Rank0 MR1 =0xd6
2374 11:03:19.096698 [Gating]
2375 11:03:19.096802 ==
2376 11:03:19.103397 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2377 11:03:19.106953 fsp= 1, odt_onoff= 1, Byte mode= 0
2378 11:03:19.107044 ==
2379 11:03:19.110104 3 1 0 |3636 2c2b |(0 0)(11 11) |(0 0)(1 1)| 0
2380 11:03:19.113601 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2381 11:03:19.120346 3 1 8 |201f 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2382 11:03:19.123991 3 1 12 |3636 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2383 11:03:19.126959 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2384 11:03:19.133858 3 1 20 |1d1d 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2385 11:03:19.137113 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2386 11:03:19.140081 3 1 28 |3535 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2387 11:03:19.147030 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2388 11:03:19.149972 3 2 4 |3535 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2389 11:03:19.153542 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2390 11:03:19.159870 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2391 11:03:19.163502 3 2 16 |201 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2392 11:03:19.166827 3 2 20 |3535 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2393 11:03:19.169935 3 2 24 |3d3d 1c1b |(11 11)(11 11) |(1 1)(0 0)| 0
2394 11:03:19.177028 3 2 28 |1c1b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2395 11:03:19.180186 3 3 0 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2396 11:03:19.183742 [Byte 0] Lead/lag Transition tap number (1)
2397 11:03:19.187009 3 3 4 |3c3c 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2398 11:03:19.193620 3 3 8 |3c3c 3534 |(10 10)(11 11) |(0 0)(0 0)| 0
2399 11:03:19.197036 3 3 12 |3c3b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2400 11:03:19.200431 3 3 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2401 11:03:19.206730 3 3 20 |202 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2402 11:03:19.210354 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2403 11:03:19.213898 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2404 11:03:19.216924 [Byte 1] Lead/lag Transition tap number (1)
2405 11:03:19.223673 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2406 11:03:19.226954 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2407 11:03:19.230206 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2408 11:03:19.237084 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2409 11:03:19.240469 3 4 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2410 11:03:19.243667 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2411 11:03:19.250230 3 4 24 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2412 11:03:19.253507 3 4 28 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
2413 11:03:19.256684 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2414 11:03:19.263375 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2415 11:03:19.266706 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2416 11:03:19.270011 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2417 11:03:19.276684 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2418 11:03:19.280363 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2419 11:03:19.283420 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2420 11:03:19.286365 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2421 11:03:19.293329 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2422 11:03:19.296390 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2423 11:03:19.300271 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2424 11:03:19.306551 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2425 11:03:19.309914 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2426 11:03:19.312959 [Byte 0] Lead/lag Transition tap number (2)
2427 11:03:19.316635 3 6 16 |1010 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2428 11:03:19.322856 [Byte 1] Lead/lag falling Transition (3, 6, 16)
2429 11:03:19.326486 3 6 20 |1a1a 3d3d |(1 1)(11 11) |(0 0)(1 0)| 0
2430 11:03:19.329637 [Byte 1] Lead/lag Transition tap number (2)
2431 11:03:19.332992 3 6 24 |4646 2726 |(0 0)(11 11) |(0 0)(0 0)| 0
2432 11:03:19.336833 [Byte 0]First pass (3, 6, 24)
2433 11:03:19.340016 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2434 11:03:19.343469 [Byte 1]First pass (3, 6, 28)
2435 11:03:19.346804 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2436 11:03:19.353211 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2437 11:03:19.356497 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2438 11:03:19.359709 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2439 11:03:19.363514 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2440 11:03:19.366653 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2441 11:03:19.373169 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2442 11:03:19.376696 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2443 11:03:19.379936 All bytes gating window > 1UI, Early break!
2444 11:03:19.380049
2445 11:03:19.383341 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
2446 11:03:19.383456
2447 11:03:19.386633 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
2448 11:03:19.386746
2449 11:03:19.386854
2450 11:03:19.386956
2451 11:03:19.393310 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
2452 11:03:19.393423
2453 11:03:19.396774 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2454 11:03:19.396890
2455 11:03:19.396990
2456 11:03:19.397087 Write Rank0 MR1 =0x56
2457 11:03:19.399855
2458 11:03:19.399966 best RODT dly(2T, 0.5T) = (2, 3)
2459 11:03:19.400068
2460 11:03:19.403190 best RODT dly(2T, 0.5T) = (2, 3)
2461 11:03:19.403306 ==
2462 11:03:19.410226 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2463 11:03:19.413527 fsp= 1, odt_onoff= 1, Byte mode= 0
2464 11:03:19.413641 ==
2465 11:03:19.416474 Start DQ dly to find pass range UseTestEngine =0
2466 11:03:19.420135 x-axis: bit #, y-axis: DQ dly (-127~63)
2467 11:03:19.423366 RX Vref Scan = 0
2468 11:03:19.426746 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2469 11:03:19.429952 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2470 11:03:19.430069 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2471 11:03:19.433094 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2472 11:03:19.436297 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2473 11:03:19.439594 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2474 11:03:19.443406 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2475 11:03:19.446917 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2476 11:03:19.449986 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2477 11:03:19.453257 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2478 11:03:19.453373 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2479 11:03:19.456448 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2480 11:03:19.459788 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2481 11:03:19.463030 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2482 11:03:19.466495 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2483 11:03:19.470112 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2484 11:03:19.473088 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2485 11:03:19.476248 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2486 11:03:19.476362 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2487 11:03:19.479508 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2488 11:03:19.483040 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2489 11:03:19.486301 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2490 11:03:19.489836 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2491 11:03:19.492950 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2492 11:03:19.496425 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2493 11:03:19.496548 -1, [0] xxxoxxxx xoxxxxxo [MSB]
2494 11:03:19.499487 0, [0] xxxoxxxx ooxxxxxo [MSB]
2495 11:03:19.503038 1, [0] xxooxxxx ooxxxxxo [MSB]
2496 11:03:19.506198 2, [0] xxooxxxx oooxxxxo [MSB]
2497 11:03:19.509623 3, [0] xxooxxxo oooxxxxo [MSB]
2498 11:03:19.512844 4, [0] oxoooxxo oooxooxo [MSB]
2499 11:03:19.512959 5, [0] oooooxoo oooooooo [MSB]
2500 11:03:19.516920 32, [0] oooooooo ooooooox [MSB]
2501 11:03:19.519718 33, [0] oooooooo ooooooox [MSB]
2502 11:03:19.522834 34, [0] oooooooo ooooooox [MSB]
2503 11:03:19.526100 35, [0] oooxoooo xxooooox [MSB]
2504 11:03:19.529407 36, [0] oooxoooo xxooooox [MSB]
2505 11:03:19.532821 37, [0] ooxxoooo xxooooox [MSB]
2506 11:03:19.532939 38, [0] ooxxoooo xxooooox [MSB]
2507 11:03:19.536154 39, [0] ooxxoooo xxooooox [MSB]
2508 11:03:19.539716 40, [0] oxxxxoox xxxoooox [MSB]
2509 11:03:19.542618 41, [0] oxxxxoox xxxxxoox [MSB]
2510 11:03:19.546236 42, [0] xxxxxoxx xxxxxxxx [MSB]
2511 11:03:19.549543 43, [0] xxxxxxxx xxxxxxxx [MSB]
2512 11:03:19.552780 iDelay=43, Bit 0, Center 22 (4 ~ 41) 38
2513 11:03:19.556034 iDelay=43, Bit 1, Center 22 (5 ~ 39) 35
2514 11:03:19.559005 iDelay=43, Bit 2, Center 18 (1 ~ 36) 36
2515 11:03:19.563102 iDelay=43, Bit 3, Center 16 (-1 ~ 34) 36
2516 11:03:19.566115 iDelay=43, Bit 4, Center 21 (4 ~ 39) 36
2517 11:03:19.569269 iDelay=43, Bit 5, Center 24 (6 ~ 42) 37
2518 11:03:19.572617 iDelay=43, Bit 6, Center 23 (5 ~ 41) 37
2519 11:03:19.575677 iDelay=43, Bit 7, Center 21 (3 ~ 39) 37
2520 11:03:19.579117 iDelay=43, Bit 8, Center 17 (0 ~ 34) 35
2521 11:03:19.585795 iDelay=43, Bit 9, Center 16 (-2 ~ 34) 37
2522 11:03:19.588883 iDelay=43, Bit 10, Center 20 (2 ~ 39) 38
2523 11:03:19.592490 iDelay=43, Bit 11, Center 22 (5 ~ 40) 36
2524 11:03:19.595832 iDelay=43, Bit 12, Center 22 (4 ~ 40) 37
2525 11:03:19.599089 iDelay=43, Bit 13, Center 22 (4 ~ 41) 38
2526 11:03:19.602251 iDelay=43, Bit 14, Center 23 (5 ~ 41) 37
2527 11:03:19.606071 iDelay=43, Bit 15, Center 13 (-4 ~ 31) 36
2528 11:03:19.606156 ==
2529 11:03:19.611926 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2530 11:03:19.615297 fsp= 1, odt_onoff= 1, Byte mode= 0
2531 11:03:19.615382 ==
2532 11:03:19.615447 DQS Delay:
2533 11:03:19.618702 DQS0 = 0, DQS1 = 0
2534 11:03:19.618786 DQM Delay:
2535 11:03:19.621910 DQM0 = 20, DQM1 = 19
2536 11:03:19.621995 DQ Delay:
2537 11:03:19.625271 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16
2538 11:03:19.628400 DQ4 =21, DQ5 =24, DQ6 =23, DQ7 =21
2539 11:03:19.632218 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
2540 11:03:19.635225 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =13
2541 11:03:19.635309
2542 11:03:19.635374
2543 11:03:19.635434 DramC Write-DBI off
2544 11:03:19.635493 ==
2545 11:03:19.641758 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2546 11:03:19.645388 fsp= 1, odt_onoff= 1, Byte mode= 0
2547 11:03:19.645472 ==
2548 11:03:19.648338 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2549 11:03:19.648422
2550 11:03:19.651579 Begin, DQ Scan Range 920~1176
2551 11:03:19.651661
2552 11:03:19.651727
2553 11:03:19.655484 TX Vref Scan disable
2554 11:03:19.658493 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
2555 11:03:19.661659 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2556 11:03:19.664934 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2557 11:03:19.668131 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2558 11:03:19.671994 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2559 11:03:19.675042 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2560 11:03:19.678441 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2561 11:03:19.681680 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2562 11:03:19.684818 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2563 11:03:19.691321 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2564 11:03:19.694841 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2565 11:03:19.698094 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2566 11:03:19.701340 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2567 11:03:19.704858 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2568 11:03:19.708288 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2569 11:03:19.711201 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2570 11:03:19.714927 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2571 11:03:19.717951 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2572 11:03:19.721549 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2573 11:03:19.724794 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2574 11:03:19.728080 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2575 11:03:19.731289 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2576 11:03:19.734616 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2577 11:03:19.737983 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2578 11:03:19.741527 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2579 11:03:19.747855 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2580 11:03:19.751203 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2581 11:03:19.754604 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2582 11:03:19.758096 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2583 11:03:19.761026 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2584 11:03:19.764400 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2585 11:03:19.767733 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2586 11:03:19.771180 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2587 11:03:19.774715 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2588 11:03:19.777669 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2589 11:03:19.781463 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2590 11:03:19.784430 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2591 11:03:19.787645 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2592 11:03:19.791340 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2593 11:03:19.794568 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2594 11:03:19.797570 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2595 11:03:19.804245 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2596 11:03:19.807720 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2597 11:03:19.811222 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2598 11:03:19.814033 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2599 11:03:19.817505 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2600 11:03:19.820843 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2601 11:03:19.824185 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2602 11:03:19.827401 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2603 11:03:19.830730 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2604 11:03:19.833821 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2605 11:03:19.837395 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
2606 11:03:19.840813 972 |3 6 12|[0] xxxxxxxx oooxoxoo [MSB]
2607 11:03:19.844042 973 |3 6 13|[0] xxxxxxxx oooooxoo [MSB]
2608 11:03:19.847700 974 |3 6 14|[0] xxxxxxxx oooooxoo [MSB]
2609 11:03:19.850673 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2610 11:03:19.854241 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2611 11:03:19.857710 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2612 11:03:19.860990 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2613 11:03:19.864364 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2614 11:03:19.867523 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2615 11:03:19.874158 981 |3 6 21|[0] oooooxoo oooooooo [MSB]
2616 11:03:19.877475 986 |3 6 26|[0] oooooooo ooooooox [MSB]
2617 11:03:19.880571 987 |3 6 27|[0] oooooooo ooooooox [MSB]
2618 11:03:19.884406 988 |3 6 28|[0] oooooooo oxooooox [MSB]
2619 11:03:19.887310 989 |3 6 29|[0] oooooooo xxooooox [MSB]
2620 11:03:19.891333 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
2621 11:03:19.894573 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2622 11:03:19.897262 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2623 11:03:19.900914 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2624 11:03:19.904158 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2625 11:03:19.907196 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2626 11:03:19.910657 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2627 11:03:19.914041 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2628 11:03:19.920652 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2629 11:03:19.923855 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2630 11:03:19.927396 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2631 11:03:19.930615 1001 |3 6 41|[0] ooxxoooo xxxxxxxx [MSB]
2632 11:03:19.933814 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2633 11:03:19.937345 Byte0, DQ PI dly=990, DQM PI dly= 990
2634 11:03:19.940571 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2635 11:03:19.940656
2636 11:03:19.947726 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2637 11:03:19.947810
2638 11:03:19.950640 Byte1, DQ PI dly=979, DQM PI dly= 979
2639 11:03:19.954277 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2640 11:03:19.954389
2641 11:03:19.957275 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2642 11:03:19.957359
2643 11:03:19.957424 ==
2644 11:03:19.963950 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2645 11:03:19.967874 fsp= 1, odt_onoff= 1, Byte mode= 0
2646 11:03:19.967958 ==
2647 11:03:19.971044 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2648 11:03:19.971127
2649 11:03:19.974241 Begin, DQ Scan Range 955~1019
2650 11:03:19.977249 Write Rank0 MR14 =0x0
2651 11:03:19.984853
2652 11:03:19.984936 CH=1, VrefRange= 0, VrefLevel = 0
2653 11:03:19.991353 TX Bit0 (984~999) 16 991, Bit8 (973~984) 12 978,
2654 11:03:19.994596 TX Bit1 (983~996) 14 989, Bit9 (974~983) 10 978,
2655 11:03:20.001693 TX Bit2 (981~995) 15 988, Bit10 (975~986) 12 980,
2656 11:03:20.005072 TX Bit3 (979~992) 14 985, Bit11 (976~987) 12 981,
2657 11:03:20.008215 TX Bit4 (983~997) 15 990, Bit12 (975~987) 13 981,
2658 11:03:20.014641 TX Bit5 (985~998) 14 991, Bit13 (977~988) 12 982,
2659 11:03:20.018348 TX Bit6 (983~998) 16 990, Bit14 (975~986) 12 980,
2660 11:03:20.021510 TX Bit7 (983~996) 14 989, Bit15 (969~979) 11 974,
2661 11:03:20.021594
2662 11:03:20.024748 Write Rank0 MR14 =0x2
2663 11:03:20.033813
2664 11:03:20.033898 CH=1, VrefRange= 0, VrefLevel = 2
2665 11:03:20.040449 TX Bit0 (984~1000) 17 992, Bit8 (972~984) 13 978,
2666 11:03:20.043724 TX Bit1 (983~997) 15 990, Bit9 (973~983) 11 978,
2667 11:03:20.050416 TX Bit2 (981~996) 16 988, Bit10 (975~987) 13 981,
2668 11:03:20.053694 TX Bit3 (979~992) 14 985, Bit11 (975~987) 13 981,
2669 11:03:20.057334 TX Bit4 (982~998) 17 990, Bit12 (975~987) 13 981,
2670 11:03:20.063652 TX Bit5 (985~999) 15 992, Bit13 (976~988) 13 982,
2671 11:03:20.067084 TX Bit6 (983~998) 16 990, Bit14 (974~987) 14 980,
2672 11:03:20.070474 TX Bit7 (983~997) 15 990, Bit15 (969~980) 12 974,
2673 11:03:20.070561
2674 11:03:20.073475 Write Rank0 MR14 =0x4
2675 11:03:20.083031
2676 11:03:20.083116 CH=1, VrefRange= 0, VrefLevel = 4
2677 11:03:20.089346 TX Bit0 (984~1000) 17 992, Bit8 (971~984) 14 977,
2678 11:03:20.092962 TX Bit1 (982~998) 17 990, Bit9 (972~984) 13 978,
2679 11:03:20.099455 TX Bit2 (980~997) 18 988, Bit10 (975~988) 14 981,
2680 11:03:20.102710 TX Bit3 (978~993) 16 985, Bit11 (975~988) 14 981,
2681 11:03:20.106264 TX Bit4 (982~999) 18 990, Bit12 (974~988) 15 981,
2682 11:03:20.113227 TX Bit5 (984~999) 16 991, Bit13 (976~989) 14 982,
2683 11:03:20.116459 TX Bit6 (983~998) 16 990, Bit14 (974~987) 14 980,
2684 11:03:20.119757 TX Bit7 (983~998) 16 990, Bit15 (969~981) 13 975,
2685 11:03:20.119843
2686 11:03:20.122968 Write Rank0 MR14 =0x6
2687 11:03:20.132109
2688 11:03:20.132194 CH=1, VrefRange= 0, VrefLevel = 6
2689 11:03:20.138881 TX Bit0 (984~1001) 18 992, Bit8 (971~985) 15 978,
2690 11:03:20.141944 TX Bit1 (982~998) 17 990, Bit9 (971~984) 14 977,
2691 11:03:20.148974 TX Bit2 (980~998) 19 989, Bit10 (975~988) 14 981,
2692 11:03:20.152424 TX Bit3 (978~994) 17 986, Bit11 (974~989) 16 981,
2693 11:03:20.155175 TX Bit4 (982~999) 18 990, Bit12 (974~990) 17 982,
2694 11:03:20.162410 TX Bit5 (984~999) 16 991, Bit13 (976~990) 15 983,
2695 11:03:20.165283 TX Bit6 (983~999) 17 991, Bit14 (974~988) 15 981,
2696 11:03:20.168744 TX Bit7 (982~998) 17 990, Bit15 (968~983) 16 975,
2697 11:03:20.172055
2698 11:03:20.172139 Write Rank0 MR14 =0x8
2699 11:03:20.181701
2700 11:03:20.181787 CH=1, VrefRange= 0, VrefLevel = 8
2701 11:03:20.188007 TX Bit0 (983~1001) 19 992, Bit8 (970~986) 17 978,
2702 11:03:20.191283 TX Bit1 (982~999) 18 990, Bit9 (971~985) 15 978,
2703 11:03:20.198382 TX Bit2 (979~998) 20 988, Bit10 (973~989) 17 981,
2704 11:03:20.201521 TX Bit3 (978~995) 18 986, Bit11 (975~990) 16 982,
2705 11:03:20.204869 TX Bit4 (981~1000) 20 990, Bit12 (974~991) 18 982,
2706 11:03:20.211442 TX Bit5 (984~1000) 17 992, Bit13 (976~990) 15 983,
2707 11:03:20.215187 TX Bit6 (982~999) 18 990, Bit14 (974~989) 16 981,
2708 11:03:20.218557 TX Bit7 (982~999) 18 990, Bit15 (968~983) 16 975,
2709 11:03:20.218642
2710 11:03:20.221558 Write Rank0 MR14 =0xa
2711 11:03:20.231227
2712 11:03:20.234377 CH=1, VrefRange= 0, VrefLevel = 10
2713 11:03:20.237650 TX Bit0 (983~1001) 19 992, Bit8 (970~986) 17 978,
2714 11:03:20.240870 TX Bit1 (981~999) 19 990, Bit9 (971~985) 15 978,
2715 11:03:20.247232 TX Bit2 (979~999) 21 989, Bit10 (973~990) 18 981,
2716 11:03:20.250504 TX Bit3 (977~995) 19 986, Bit11 (974~991) 18 982,
2717 11:03:20.254168 TX Bit4 (981~1000) 20 990, Bit12 (974~991) 18 982,
2718 11:03:20.260884 TX Bit5 (983~1000) 18 991, Bit13 (975~991) 17 983,
2719 11:03:20.264012 TX Bit6 (982~1000) 19 991, Bit14 (973~990) 18 981,
2720 11:03:20.270725 TX Bit7 (981~999) 19 990, Bit15 (968~984) 17 976,
2721 11:03:20.270821
2722 11:03:20.270887 Write Rank0 MR14 =0xc
2723 11:03:20.281013
2724 11:03:20.284107 CH=1, VrefRange= 0, VrefLevel = 12
2725 11:03:20.287113 TX Bit0 (983~1002) 20 992, Bit8 (970~987) 18 978,
2726 11:03:20.290621 TX Bit1 (981~1000) 20 990, Bit9 (970~985) 16 977,
2727 11:03:20.297180 TX Bit2 (978~999) 22 988, Bit10 (973~990) 18 981,
2728 11:03:20.300563 TX Bit3 (978~997) 20 987, Bit11 (973~991) 19 982,
2729 11:03:20.304053 TX Bit4 (980~1001) 22 990, Bit12 (974~992) 19 983,
2730 11:03:20.310550 TX Bit5 (983~1000) 18 991, Bit13 (975~991) 17 983,
2731 11:03:20.313977 TX Bit6 (981~1000) 20 990, Bit14 (972~991) 20 981,
2732 11:03:20.320579 TX Bit7 (981~999) 19 990, Bit15 (968~984) 17 976,
2733 11:03:20.320664
2734 11:03:20.320730 Write Rank0 MR14 =0xe
2735 11:03:20.330720
2736 11:03:20.333887 CH=1, VrefRange= 0, VrefLevel = 14
2737 11:03:20.337650 TX Bit0 (982~1003) 22 992, Bit8 (970~987) 18 978,
2738 11:03:20.340781 TX Bit1 (980~1000) 21 990, Bit9 (970~986) 17 978,
2739 11:03:20.347059 TX Bit2 (978~999) 22 988, Bit10 (973~991) 19 982,
2740 11:03:20.350881 TX Bit3 (977~996) 20 986, Bit11 (973~991) 19 982,
2741 11:03:20.354005 TX Bit4 (980~1001) 22 990, Bit12 (973~992) 20 982,
2742 11:03:20.360562 TX Bit5 (983~1001) 19 992, Bit13 (975~992) 18 983,
2743 11:03:20.363900 TX Bit6 (981~1001) 21 991, Bit14 (972~991) 20 981,
2744 11:03:20.370582 TX Bit7 (981~1000) 20 990, Bit15 (968~984) 17 976,
2745 11:03:20.370668
2746 11:03:20.370732 Write Rank0 MR14 =0x10
2747 11:03:20.381058
2748 11:03:20.384507 CH=1, VrefRange= 0, VrefLevel = 16
2749 11:03:20.387534 TX Bit0 (982~1003) 22 992, Bit8 (970~989) 20 979,
2750 11:03:20.390940 TX Bit1 (980~1000) 21 990, Bit9 (970~987) 18 978,
2751 11:03:20.397257 TX Bit2 (978~1000) 23 989, Bit10 (972~991) 20 981,
2752 11:03:20.400853 TX Bit3 (977~998) 22 987, Bit11 (973~992) 20 982,
2753 11:03:20.404056 TX Bit4 (979~1002) 24 990, Bit12 (972~992) 21 982,
2754 11:03:20.410621 TX Bit5 (982~1002) 21 992, Bit13 (975~992) 18 983,
2755 11:03:20.414407 TX Bit6 (980~1001) 22 990, Bit14 (972~992) 21 982,
2756 11:03:20.420823 TX Bit7 (980~1000) 21 990, Bit15 (967~985) 19 976,
2757 11:03:20.420937
2758 11:03:20.421001 Write Rank0 MR14 =0x12
2759 11:03:20.431264
2760 11:03:20.434454 CH=1, VrefRange= 0, VrefLevel = 18
2761 11:03:20.437702 TX Bit0 (981~1004) 24 992, Bit8 (969~989) 21 979,
2762 11:03:20.441155 TX Bit1 (979~1001) 23 990, Bit9 (970~987) 18 978,
2763 11:03:20.447814 TX Bit2 (978~1000) 23 989, Bit10 (972~992) 21 982,
2764 11:03:20.451180 TX Bit3 (977~998) 22 987, Bit11 (973~992) 20 982,
2765 11:03:20.454821 TX Bit4 (979~1002) 24 990, Bit12 (972~993) 22 982,
2766 11:03:20.461424 TX Bit5 (982~1002) 21 992, Bit13 (975~992) 18 983,
2767 11:03:20.464844 TX Bit6 (980~1002) 23 991, Bit14 (971~992) 22 981,
2768 11:03:20.471036 TX Bit7 (980~1001) 22 990, Bit15 (967~985) 19 976,
2769 11:03:20.471126
2770 11:03:20.471195 Write Rank0 MR14 =0x14
2771 11:03:20.481931
2772 11:03:20.482020 CH=1, VrefRange= 0, VrefLevel = 20
2773 11:03:20.488854 TX Bit0 (981~1004) 24 992, Bit8 (969~990) 22 979,
2774 11:03:20.492039 TX Bit1 (979~1001) 23 990, Bit9 (969~987) 19 978,
2775 11:03:20.498611 TX Bit2 (978~1000) 23 989, Bit10 (971~992) 22 981,
2776 11:03:20.501729 TX Bit3 (977~999) 23 988, Bit11 (971~992) 22 981,
2777 11:03:20.505326 TX Bit4 (979~1002) 24 990, Bit12 (971~993) 23 982,
2778 11:03:20.511589 TX Bit5 (982~1003) 22 992, Bit13 (973~992) 20 982,
2779 11:03:20.515224 TX Bit6 (979~1002) 24 990, Bit14 (971~992) 22 981,
2780 11:03:20.522223 TX Bit7 (979~1001) 23 990, Bit15 (967~986) 20 976,
2781 11:03:20.522308
2782 11:03:20.522371 Write Rank0 MR14 =0x16
2783 11:03:20.532294
2784 11:03:20.535708 CH=1, VrefRange= 0, VrefLevel = 22
2785 11:03:20.539438 TX Bit0 (980~1005) 26 992, Bit8 (969~991) 23 980,
2786 11:03:20.542650 TX Bit1 (979~1002) 24 990, Bit9 (969~989) 21 979,
2787 11:03:20.548923 TX Bit2 (977~1001) 25 989, Bit10 (971~992) 22 981,
2788 11:03:20.552496 TX Bit3 (977~999) 23 988, Bit11 (971~993) 23 982,
2789 11:03:20.555729 TX Bit4 (979~1003) 25 991, Bit12 (971~993) 23 982,
2790 11:03:20.562399 TX Bit5 (981~1003) 23 992, Bit13 (974~993) 20 983,
2791 11:03:20.565573 TX Bit6 (979~1003) 25 991, Bit14 (970~992) 23 981,
2792 11:03:20.571909 TX Bit7 (979~1002) 24 990, Bit15 (966~986) 21 976,
2793 11:03:20.571992
2794 11:03:20.572055 Write Rank0 MR14 =0x18
2795 11:03:20.582740
2796 11:03:20.586485 CH=1, VrefRange= 0, VrefLevel = 24
2797 11:03:20.589710 TX Bit0 (980~1005) 26 992, Bit8 (969~990) 22 979,
2798 11:03:20.592823 TX Bit1 (978~1002) 25 990, Bit9 (969~989) 21 979,
2799 11:03:20.599761 TX Bit2 (977~1001) 25 989, Bit10 (971~993) 23 982,
2800 11:03:20.602704 TX Bit3 (976~999) 24 987, Bit11 (972~993) 22 982,
2801 11:03:20.606020 TX Bit4 (978~1003) 26 990, Bit12 (971~994) 24 982,
2802 11:03:20.612418 TX Bit5 (981~1004) 24 992, Bit13 (974~993) 20 983,
2803 11:03:20.616094 TX Bit6 (979~1003) 25 991, Bit14 (970~993) 24 981,
2804 11:03:20.622427 TX Bit7 (979~1002) 24 990, Bit15 (967~987) 21 977,
2805 11:03:20.622514
2806 11:03:20.622580 Write Rank0 MR14 =0x1a
2807 11:03:20.633688
2808 11:03:20.633771 CH=1, VrefRange= 0, VrefLevel = 26
2809 11:03:20.640610 TX Bit0 (979~1006) 28 992, Bit8 (969~991) 23 980,
2810 11:03:20.643554 TX Bit1 (978~1003) 26 990, Bit9 (969~990) 22 979,
2811 11:03:20.650534 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2812 11:03:20.653705 TX Bit3 (976~999) 24 987, Bit11 (971~993) 23 982,
2813 11:03:20.657398 TX Bit4 (978~1003) 26 990, Bit12 (970~994) 25 982,
2814 11:03:20.663989 TX Bit5 (980~1005) 26 992, Bit13 (972~993) 22 982,
2815 11:03:20.666916 TX Bit6 (979~1003) 25 991, Bit14 (970~993) 24 981,
2816 11:03:20.673441 TX Bit7 (979~1003) 25 991, Bit15 (966~988) 23 977,
2817 11:03:20.673526
2818 11:03:20.673590 Write Rank0 MR14 =0x1c
2819 11:03:20.684420
2820 11:03:20.687778 CH=1, VrefRange= 0, VrefLevel = 28
2821 11:03:20.691019 TX Bit0 (979~1006) 28 992, Bit8 (968~991) 24 979,
2822 11:03:20.694563 TX Bit1 (978~1003) 26 990, Bit9 (969~990) 22 979,
2823 11:03:20.701244 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2824 11:03:20.704224 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2825 11:03:20.707779 TX Bit4 (978~1004) 27 991, Bit12 (970~994) 25 982,
2826 11:03:20.714390 TX Bit5 (980~1005) 26 992, Bit13 (973~994) 22 983,
2827 11:03:20.717530 TX Bit6 (978~1004) 27 991, Bit14 (970~994) 25 982,
2828 11:03:20.724377 TX Bit7 (978~1003) 26 990, Bit15 (966~988) 23 977,
2829 11:03:20.724469
2830 11:03:20.724535 Write Rank0 MR14 =0x1e
2831 11:03:20.735053
2832 11:03:20.735137 CH=1, VrefRange= 0, VrefLevel = 30
2833 11:03:20.741899 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2834 11:03:20.745145 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2835 11:03:20.751947 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2836 11:03:20.755335 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2837 11:03:20.758811 TX Bit4 (979~1005) 27 992, Bit12 (970~994) 25 982,
2838 11:03:20.765091 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2839 11:03:20.768427 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2840 11:03:20.775084 TX Bit7 (978~1004) 27 991, Bit15 (966~988) 23 977,
2841 11:03:20.775168
2842 11:03:20.775233 Write Rank0 MR14 =0x20
2843 11:03:20.786318
2844 11:03:20.789415 CH=1, VrefRange= 0, VrefLevel = 32
2845 11:03:20.792447 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2846 11:03:20.796327 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2847 11:03:20.802727 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2848 11:03:20.806396 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2849 11:03:20.809803 TX Bit4 (979~1005) 27 992, Bit12 (970~994) 25 982,
2850 11:03:20.816302 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2851 11:03:20.819198 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2852 11:03:20.825982 TX Bit7 (978~1004) 27 991, Bit15 (966~988) 23 977,
2853 11:03:20.826068
2854 11:03:20.826132 Write Rank0 MR14 =0x22
2855 11:03:20.837198
2856 11:03:20.840464 CH=1, VrefRange= 0, VrefLevel = 34
2857 11:03:20.843610 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2858 11:03:20.846837 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2859 11:03:20.853302 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2860 11:03:20.856805 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2861 11:03:20.860243 TX Bit4 (979~1005) 27 992, Bit12 (970~994) 25 982,
2862 11:03:20.866786 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2863 11:03:20.870628 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2864 11:03:20.876876 TX Bit7 (978~1004) 27 991, Bit15 (966~988) 23 977,
2865 11:03:20.876962
2866 11:03:20.877026 Write Rank0 MR14 =0x24
2867 11:03:20.887825
2868 11:03:20.891151 CH=1, VrefRange= 0, VrefLevel = 36
2869 11:03:20.894373 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2870 11:03:20.897779 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2871 11:03:20.904132 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2872 11:03:20.907296 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2873 11:03:20.914230 TX Bit4 (979~1005) 27 992, Bit12 (970~994) 25 982,
2874 11:03:20.917474 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2875 11:03:20.920751 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2876 11:03:20.927381 TX Bit7 (978~1004) 27 991, Bit15 (966~988) 23 977,
2877 11:03:20.927468
2878 11:03:20.927535 Write Rank0 MR14 =0x26
2879 11:03:20.938095
2880 11:03:20.941928 CH=1, VrefRange= 0, VrefLevel = 38
2881 11:03:20.945131 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2882 11:03:20.948255 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2883 11:03:20.954853 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2884 11:03:20.958804 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2885 11:03:20.961886 TX Bit4 (979~1005) 27 992, Bit12 (970~994) 25 982,
2886 11:03:20.968335 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2887 11:03:20.971661 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2888 11:03:20.978241 TX Bit7 (978~1004) 27 991, Bit15 (966~988) 23 977,
2889 11:03:20.978325
2890 11:03:20.978390
2891 11:03:20.981777 TX Vref found, early break! 375< 386
2892 11:03:20.985097 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2893 11:03:20.988318 u1DelayCellOfst[0]=5 cells (4 PI)
2894 11:03:20.991603 u1DelayCellOfst[1]=3 cells (3 PI)
2895 11:03:20.995087 u1DelayCellOfst[2]=1 cells (1 PI)
2896 11:03:20.998173 u1DelayCellOfst[3]=0 cells (0 PI)
2897 11:03:21.001460 u1DelayCellOfst[4]=5 cells (4 PI)
2898 11:03:21.004697 u1DelayCellOfst[5]=6 cells (5 PI)
2899 11:03:21.004781 u1DelayCellOfst[6]=3 cells (3 PI)
2900 11:03:21.008366 u1DelayCellOfst[7]=3 cells (3 PI)
2901 11:03:21.011875 Byte0, DQ PI dly=988, DQM PI dly= 990
2902 11:03:21.018067 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2903 11:03:21.018152
2904 11:03:21.021448 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2905 11:03:21.021533
2906 11:03:21.025259 u1DelayCellOfst[8]=3 cells (3 PI)
2907 11:03:21.028475 u1DelayCellOfst[9]=3 cells (3 PI)
2908 11:03:21.031639 u1DelayCellOfst[10]=5 cells (4 PI)
2909 11:03:21.034941 u1DelayCellOfst[11]=6 cells (5 PI)
2910 11:03:21.038351 u1DelayCellOfst[12]=6 cells (5 PI)
2911 11:03:21.041728 u1DelayCellOfst[13]=7 cells (6 PI)
2912 11:03:21.044900 u1DelayCellOfst[14]=5 cells (4 PI)
2913 11:03:21.044984 u1DelayCellOfst[15]=0 cells (0 PI)
2914 11:03:21.048079 Byte1, DQ PI dly=977, DQM PI dly= 980
2915 11:03:21.055094 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
2916 11:03:21.055179
2917 11:03:21.058508 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
2918 11:03:21.058592
2919 11:03:21.061499 Write Rank0 MR14 =0x1e
2920 11:03:21.061583
2921 11:03:21.065299 Final TX Range 0 Vref 30
2922 11:03:21.065383
2923 11:03:21.072021 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2924 11:03:21.072106
2925 11:03:21.074998 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2926 11:03:21.084748 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2927 11:03:21.091775 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2928 11:03:21.091859 Write Rank0 MR3 =0xb0
2929 11:03:21.095039 DramC Write-DBI on
2930 11:03:21.095123 ==
2931 11:03:21.098194 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2932 11:03:21.101728 fsp= 1, odt_onoff= 1, Byte mode= 0
2933 11:03:21.101813 ==
2934 11:03:21.108188 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2935 11:03:21.108274
2936 11:03:21.111460 Begin, DQ Scan Range 700~764
2937 11:03:21.111545
2938 11:03:21.111609
2939 11:03:21.111681 TX Vref Scan disable
2940 11:03:21.115022 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2941 11:03:21.118159 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2942 11:03:21.121241 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2943 11:03:21.128261 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2944 11:03:21.131297 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2945 11:03:21.135139 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2946 11:03:21.138231 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2947 11:03:21.141206 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2948 11:03:21.144947 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2949 11:03:21.148102 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2950 11:03:21.151262 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2951 11:03:21.154809 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2952 11:03:21.158257 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2953 11:03:21.160991 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2954 11:03:21.164751 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2955 11:03:21.167799 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2956 11:03:21.171104 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2957 11:03:21.174304 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2958 11:03:21.177524 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2959 11:03:21.181352 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2960 11:03:21.184671 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2961 11:03:21.187616 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2962 11:03:21.191290 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2963 11:03:21.199893 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2964 11:03:21.203000 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2965 11:03:21.206717 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2966 11:03:21.209793 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2967 11:03:21.213492 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2968 11:03:21.216812 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2969 11:03:21.219590 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2970 11:03:21.222881 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2971 11:03:21.226268 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2972 11:03:21.229796 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2973 11:03:21.232931 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2974 11:03:21.236608 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2975 11:03:21.239695 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2976 11:03:21.243284 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
2977 11:03:21.246433 Byte0, DQ PI dly=736, DQM PI dly= 736
2978 11:03:21.253111 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
2979 11:03:21.253196
2980 11:03:21.256492 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
2981 11:03:21.256577
2982 11:03:21.259882 Byte1, DQ PI dly=724, DQM PI dly= 724
2983 11:03:21.263174 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2984 11:03:21.263258
2985 11:03:21.269908 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2986 11:03:21.269997
2987 11:03:21.276588 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2988 11:03:21.282936 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2989 11:03:21.289986 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2990 11:03:21.290070 Write Rank0 MR3 =0x30
2991 11:03:21.293136 DramC Write-DBI off
2992 11:03:21.293220
2993 11:03:21.293284 [DATLAT]
2994 11:03:21.296838 Freq=1600, CH1 RK0, use_rxtx_scan=0
2995 11:03:21.296922
2996 11:03:21.300089 DATLAT Default: 0xf
2997 11:03:21.300172 7, 0xFFFF, sum=0
2998 11:03:21.303073 8, 0xFFFF, sum=0
2999 11:03:21.303158 9, 0xFFFF, sum=0
3000 11:03:21.306446 10, 0xFFFF, sum=0
3001 11:03:21.306532 11, 0xFFFF, sum=0
3002 11:03:21.309943 12, 0xFFFF, sum=0
3003 11:03:21.310028 13, 0xFFFF, sum=0
3004 11:03:21.313055 14, 0x0, sum=1
3005 11:03:21.313141 15, 0x0, sum=2
3006 11:03:21.313207 16, 0x0, sum=3
3007 11:03:21.316736 17, 0x0, sum=4
3008 11:03:21.320041 pattern=2 first_step=14 total pass=5 best_step=16
3009 11:03:21.320126 ==
3010 11:03:21.326491 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3011 11:03:21.329891 fsp= 1, odt_onoff= 1, Byte mode= 0
3012 11:03:21.329976 ==
3013 11:03:21.333495 Start DQ dly to find pass range UseTestEngine =1
3014 11:03:21.336369 x-axis: bit #, y-axis: DQ dly (-127~63)
3015 11:03:21.339815 RX Vref Scan = 1
3016 11:03:21.446036
3017 11:03:21.446154 RX Vref found, early break!
3018 11:03:21.446220
3019 11:03:21.452429 Final RX Vref 11, apply to both rank0 and 1
3020 11:03:21.452521 ==
3021 11:03:21.456320 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3022 11:03:21.459272 fsp= 1, odt_onoff= 1, Byte mode= 0
3023 11:03:21.459357 ==
3024 11:03:21.459423 DQS Delay:
3025 11:03:21.462824 DQS0 = 0, DQS1 = 0
3026 11:03:21.462907 DQM Delay:
3027 11:03:21.466010 DQM0 = 20, DQM1 = 19
3028 11:03:21.466093 DQ Delay:
3029 11:03:21.469275 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16
3030 11:03:21.472537 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =21
3031 11:03:21.475726 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3032 11:03:21.479063 DQ12 =22, DQ13 =21, DQ14 =23, DQ15 =13
3033 11:03:21.479173
3034 11:03:21.479263
3035 11:03:21.479323
3036 11:03:21.482470 [DramC_TX_OE_Calibration] TA2
3037 11:03:21.486146 Original DQ_B0 (3 6) =30, OEN = 27
3038 11:03:21.489371 Original DQ_B1 (3 6) =30, OEN = 27
3039 11:03:21.492640 23, 0x0, End_B0=23 End_B1=23
3040 11:03:21.492726 24, 0x0, End_B0=24 End_B1=24
3041 11:03:21.496163 25, 0x0, End_B0=25 End_B1=25
3042 11:03:21.499235 26, 0x0, End_B0=26 End_B1=26
3043 11:03:21.502503 27, 0x0, End_B0=27 End_B1=27
3044 11:03:21.502589 28, 0x0, End_B0=28 End_B1=28
3045 11:03:21.506035 29, 0x0, End_B0=29 End_B1=29
3046 11:03:21.508994 30, 0x0, End_B0=30 End_B1=30
3047 11:03:21.512731 31, 0xFFFF, End_B0=30 End_B1=30
3048 11:03:21.519135 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3049 11:03:21.522490 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3050 11:03:21.522573
3051 11:03:21.522637
3052 11:03:21.525979 Write Rank0 MR23 =0x3f
3053 11:03:21.526063 [DQSOSC]
3054 11:03:21.535968 [DQSOSCAuto] RK0, (LSB)MR18= 0xc1c1, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
3055 11:03:21.539207 CH1_RK0: MR19=0x202, MR18=0xC1C1, DQSOSC=446, MR23=63, INC=12, DEC=18
3056 11:03:21.542320 Write Rank0 MR23 =0x3f
3057 11:03:21.542423 [DQSOSC]
3058 11:03:21.552289 [DQSOSCAuto] RK0, (LSB)MR18= 0xc2c2, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
3059 11:03:21.555829 CH1 RK0: MR19=202, MR18=C2C2
3060 11:03:21.559282 [RankSwap] Rank num 2, (Multi 1), Rank 1
3061 11:03:21.559361 Write Rank0 MR2 =0xad
3062 11:03:21.562472 [Write Leveling]
3063 11:03:21.565850 delay byte0 byte1 byte2 byte3
3064 11:03:21.565954
3065 11:03:21.566054 10 0 0
3066 11:03:21.566147 11 0 0
3067 11:03:21.569198 12 0 0
3068 11:03:21.569273 13 0 0
3069 11:03:21.572322 14 0 0
3070 11:03:21.572433 15 0 0
3071 11:03:21.576198 16 0 0
3072 11:03:21.576286 17 0 0
3073 11:03:21.576349 18 0 0
3074 11:03:21.579188 19 0 0
3075 11:03:21.579264 20 0 0
3076 11:03:21.582394 21 0 0
3077 11:03:21.582481 22 0 0
3078 11:03:21.582547 23 0 0
3079 11:03:21.585523 24 0 0
3080 11:03:21.585636 25 0 ff
3081 11:03:21.588824 26 0 ff
3082 11:03:21.588909 27 0 ff
3083 11:03:21.592224 28 0 ff
3084 11:03:21.592336 29 0 ff
3085 11:03:21.595772 30 0 ff
3086 11:03:21.595888 31 0 ff
3087 11:03:21.595972 32 0 ff
3088 11:03:21.598970 33 ff ff
3089 11:03:21.599056 34 ff ff
3090 11:03:21.602379 35 ff ff
3091 11:03:21.602464 36 ff ff
3092 11:03:21.606044 37 ff ff
3093 11:03:21.606129 38 ff ff
3094 11:03:21.609045 39 ff ff
3095 11:03:21.612315 pass bytecount = 0xff (0xff: all bytes pass)
3096 11:03:21.612425
3097 11:03:21.612513 DQS0 dly: 33
3098 11:03:21.615591 DQS1 dly: 25
3099 11:03:21.615674 Write Rank0 MR2 =0x2d
3100 11:03:21.618889 [RankSwap] Rank num 2, (Multi 1), Rank 0
3101 11:03:21.622348 Write Rank1 MR1 =0xd6
3102 11:03:21.622442 [Gating]
3103 11:03:21.622534 ==
3104 11:03:21.628818 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3105 11:03:21.632166 fsp= 1, odt_onoff= 1, Byte mode= 0
3106 11:03:21.632251 ==
3107 11:03:21.635153 3 1 0 |2b2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
3108 11:03:21.638899 3 1 4 |3635 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3109 11:03:21.645484 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3110 11:03:21.648839 3 1 12 |3535 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3111 11:03:21.651971 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3112 11:03:21.658493 3 1 20 |3535 2c2b |(0 0)(11 11) |(1 1)(1 0)| 0
3113 11:03:21.661952 3 1 24 |3434 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3114 11:03:21.665710 3 1 28 |3433 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3115 11:03:21.671783 3 2 0 |3232 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3116 11:03:21.675426 3 2 4 |2424 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3117 11:03:21.678693 3 2 8 |3130 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3118 11:03:21.681837 3 2 12 |3d3d 404 |(11 11)(11 11) |(1 1)(0 0)| 0
3119 11:03:21.688608 3 2 16 |3b3b 201 |(0 0)(11 11) |(1 1)(0 0)| 0
3120 11:03:21.692067 3 2 20 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3121 11:03:21.695477 [Byte 0] Lead/lag Transition tap number (1)
3122 11:03:21.702025 3 2 24 |3c3b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3123 11:03:21.705506 3 2 28 |3a3a 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3124 11:03:21.708391 3 3 0 |3d3d 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
3125 11:03:21.712242 3 3 4 |1919 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3126 11:03:21.718716 3 3 8 |1111 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3127 11:03:21.721965 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3128 11:03:21.725478 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3129 11:03:21.731850 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3130 11:03:21.735106 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3131 11:03:21.738580 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3132 11:03:21.745222 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3133 11:03:21.748921 3 4 4 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3134 11:03:21.752330 3 4 8 |3838 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3135 11:03:21.755381 3 4 12 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3136 11:03:21.761815 3 4 16 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3137 11:03:21.765090 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3138 11:03:21.768674 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3139 11:03:21.775135 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3140 11:03:21.778284 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3141 11:03:21.781923 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3142 11:03:21.788738 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3143 11:03:21.791613 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3144 11:03:21.795149 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3145 11:03:21.801404 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3146 11:03:21.805064 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3147 11:03:21.808427 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3148 11:03:21.815288 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3149 11:03:21.818327 [Byte 0] Lead/lag Transition tap number (2)
3150 11:03:21.821510 3 6 0 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3151 11:03:21.824620 3 6 4 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3152 11:03:21.831433 [Byte 1] Lead/lag falling Transition (3, 6, 4)
3153 11:03:21.834613 3 6 8 |404 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3154 11:03:21.838213 [Byte 1] Lead/lag Transition tap number (2)
3155 11:03:21.841704 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
3156 11:03:21.844589 [Byte 0]First pass (3, 6, 12)
3157 11:03:21.847964 3 6 16 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
3158 11:03:21.855079 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3159 11:03:21.855165 [Byte 1]First pass (3, 6, 20)
3160 11:03:21.861562 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3161 11:03:21.864988 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3162 11:03:21.868074 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3163 11:03:21.871291 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3164 11:03:21.874770 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3165 11:03:21.881359 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3166 11:03:21.884802 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3167 11:03:21.888142 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3168 11:03:21.891501 All bytes gating window > 1UI, Early break!
3169 11:03:21.891585
3170 11:03:21.894524 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 28)
3171 11:03:21.894609
3172 11:03:21.897821 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
3173 11:03:21.897906
3174 11:03:21.901133
3175 11:03:21.901216
3176 11:03:21.904388 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
3177 11:03:21.904482
3178 11:03:21.908064 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
3179 11:03:21.908149
3180 11:03:21.908213
3181 11:03:21.911099 Write Rank1 MR1 =0x56
3182 11:03:21.911182
3183 11:03:21.914594 best RODT dly(2T, 0.5T) = (2, 2)
3184 11:03:21.914678
3185 11:03:21.918131 best RODT dly(2T, 0.5T) = (2, 3)
3186 11:03:21.918215 ==
3187 11:03:21.921519 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3188 11:03:21.924427 fsp= 1, odt_onoff= 1, Byte mode= 0
3189 11:03:21.924518 ==
3190 11:03:21.927800 Start DQ dly to find pass range UseTestEngine =0
3191 11:03:21.930981 x-axis: bit #, y-axis: DQ dly (-127~63)
3192 11:03:21.934347 RX Vref Scan = 0
3193 11:03:21.938019 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3194 11:03:21.941357 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3195 11:03:21.944370 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3196 11:03:21.944463 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3197 11:03:21.947675 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3198 11:03:21.951359 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3199 11:03:21.954336 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3200 11:03:21.957972 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3201 11:03:21.960971 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3202 11:03:21.964847 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3203 11:03:21.968027 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3204 11:03:21.970882 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3205 11:03:21.970968 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3206 11:03:21.974669 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3207 11:03:21.977913 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3208 11:03:21.980929 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3209 11:03:21.984390 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3210 11:03:21.987880 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3211 11:03:21.991298 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3212 11:03:21.994503 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3213 11:03:21.994589 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3214 11:03:21.998065 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3215 11:03:22.000809 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3216 11:03:22.004288 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3217 11:03:22.007999 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3218 11:03:22.011334 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3219 11:03:22.011421 0, [0] xxxoxxxx xoxxxxxo [MSB]
3220 11:03:22.014631 1, [0] xxooxxxx ooxxxxxo [MSB]
3221 11:03:22.017600 2, [0] xxooxxxx ooxxxxxo [MSB]
3222 11:03:22.021062 3, [0] xxooxxxo oooxxxxo [MSB]
3223 11:03:22.024165 4, [0] oxoooxxo oooxxxxo [MSB]
3224 11:03:22.027684 5, [0] oooooxoo oooxooxo [MSB]
3225 11:03:22.031044 32, [0] oooooooo ooooooox [MSB]
3226 11:03:22.031130 33, [0] oooooooo ooooooox [MSB]
3227 11:03:22.034243 34, [0] oooooooo ooooooox [MSB]
3228 11:03:22.037438 35, [0] oooxoooo xxooooox [MSB]
3229 11:03:22.041093 36, [0] oooxoooo xxooooox [MSB]
3230 11:03:22.044220 37, [0] ooxxoooo xxooooox [MSB]
3231 11:03:22.047448 38, [0] ooxxoooo xxooooox [MSB]
3232 11:03:22.050854 39, [0] oxxxxoox xxooooox [MSB]
3233 11:03:22.050940 40, [0] oxxxxoox xxxoooox [MSB]
3234 11:03:22.054150 41, [0] oxxxxoox xxxxxoox [MSB]
3235 11:03:22.057354 42, [0] xxxxxxxx xxxxxxxx [MSB]
3236 11:03:22.060534 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
3237 11:03:22.064126 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3238 11:03:22.068017 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
3239 11:03:22.070664 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3240 11:03:22.074501 iDelay=42, Bit 4, Center 21 (4 ~ 38) 35
3241 11:03:22.077403 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
3242 11:03:22.083832 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3243 11:03:22.087069 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3244 11:03:22.090478 iDelay=42, Bit 8, Center 17 (1 ~ 34) 34
3245 11:03:22.093942 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
3246 11:03:22.097166 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3247 11:03:22.100569 iDelay=42, Bit 11, Center 23 (6 ~ 40) 35
3248 11:03:22.103903 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3249 11:03:22.107181 iDelay=42, Bit 13, Center 23 (5 ~ 41) 37
3250 11:03:22.110725 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
3251 11:03:22.114072 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3252 11:03:22.114156 ==
3253 11:03:22.120361 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3254 11:03:22.123646 fsp= 1, odt_onoff= 1, Byte mode= 0
3255 11:03:22.123731 ==
3256 11:03:22.123796 DQS Delay:
3257 11:03:22.127031 DQS0 = 0, DQS1 = 0
3258 11:03:22.127115 DQM Delay:
3259 11:03:22.130323 DQM0 = 20, DQM1 = 19
3260 11:03:22.130407 DQ Delay:
3261 11:03:22.133881 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3262 11:03:22.137231 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
3263 11:03:22.140320 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =23
3264 11:03:22.143504 DQ12 =22, DQ13 =23, DQ14 =23, DQ15 =14
3265 11:03:22.143588
3266 11:03:22.143653
3267 11:03:22.146954 DramC Write-DBI off
3268 11:03:22.147041 ==
3269 11:03:22.150191 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3270 11:03:22.153533 fsp= 1, odt_onoff= 1, Byte mode= 0
3271 11:03:22.153618 ==
3272 11:03:22.156638 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3273 11:03:22.160105
3274 11:03:22.160188 Begin, DQ Scan Range 921~1177
3275 11:03:22.160253
3276 11:03:22.160313
3277 11:03:22.163715 TX Vref Scan disable
3278 11:03:22.166823 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3279 11:03:22.170048 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3280 11:03:22.173279 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3281 11:03:22.177020 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3282 11:03:22.180018 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3283 11:03:22.183343 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3284 11:03:22.187048 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3285 11:03:22.190002 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3286 11:03:22.196900 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3287 11:03:22.200339 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3288 11:03:22.203370 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3289 11:03:22.207127 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3290 11:03:22.210015 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3291 11:03:22.213684 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3292 11:03:22.216886 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3293 11:03:22.220129 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3294 11:03:22.223167 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3295 11:03:22.226511 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3296 11:03:22.229978 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3297 11:03:22.233079 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3298 11:03:22.236679 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3299 11:03:22.239999 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3300 11:03:22.243285 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3301 11:03:22.249871 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3302 11:03:22.253394 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3303 11:03:22.256464 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3304 11:03:22.259813 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3305 11:03:22.263333 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3306 11:03:22.266557 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3307 11:03:22.270148 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3308 11:03:22.273391 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3309 11:03:22.276682 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3310 11:03:22.280311 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3311 11:03:22.283261 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3312 11:03:22.286605 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3313 11:03:22.289668 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3314 11:03:22.293470 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3315 11:03:22.296347 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3316 11:03:22.299772 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3317 11:03:22.303183 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3318 11:03:22.309858 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3319 11:03:22.312833 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3320 11:03:22.316360 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3321 11:03:22.319550 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3322 11:03:22.323387 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3323 11:03:22.326167 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3324 11:03:22.329990 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3325 11:03:22.333115 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3326 11:03:22.336127 969 |3 6 9|[0] xxxxxxxx oxxxxxxo [MSB]
3327 11:03:22.339747 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
3328 11:03:22.342984 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
3329 11:03:22.346349 972 |3 6 12|[0] xxxxxxxx oooxxxoo [MSB]
3330 11:03:22.349452 973 |3 6 13|[0] xxxxxxxx oooooxoo [MSB]
3331 11:03:22.352795 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3332 11:03:22.356343 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3333 11:03:22.359523 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3334 11:03:22.362864 977 |3 6 17|[0] xxoooxxx oooooooo [MSB]
3335 11:03:22.366014 978 |3 6 18|[0] xoooooox oooooooo [MSB]
3336 11:03:22.373411 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3337 11:03:22.377001 987 |3 6 27|[0] oooooooo ooooooox [MSB]
3338 11:03:22.380290 988 |3 6 28|[0] oooooooo ooooooox [MSB]
3339 11:03:22.383514 989 |3 6 29|[0] oooooooo ooooooox [MSB]
3340 11:03:22.387090 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3341 11:03:22.390387 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3342 11:03:22.393623 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3343 11:03:22.396856 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3344 11:03:22.400128 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3345 11:03:22.403795 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
3346 11:03:22.407026 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
3347 11:03:22.410686 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
3348 11:03:22.413617 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3349 11:03:22.416986 999 |3 6 39|[0] ooxxooox xxxxxxxx [MSB]
3350 11:03:22.420185 1000 |3 6 40|[0] oxxxxoxx xxxxxxxx [MSB]
3351 11:03:22.426990 1001 |3 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
3352 11:03:22.430117 Byte0, DQ PI dly=987, DQM PI dly= 987
3353 11:03:22.433463 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
3354 11:03:22.433548
3355 11:03:22.436792 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
3356 11:03:22.436877
3357 11:03:22.439967 Byte1, DQ PI dly=979, DQM PI dly= 979
3358 11:03:22.446874 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
3359 11:03:22.446960
3360 11:03:22.449994 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
3361 11:03:22.450081
3362 11:03:22.450145 ==
3363 11:03:22.456846 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3364 11:03:22.456932 fsp= 1, odt_onoff= 1, Byte mode= 0
3365 11:03:22.460167 ==
3366 11:03:22.463246 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3367 11:03:22.463330
3368 11:03:22.466669 Begin, DQ Scan Range 955~1019
3369 11:03:22.466753 Write Rank1 MR14 =0x0
3370 11:03:22.476697
3371 11:03:22.476781 CH=1, VrefRange= 0, VrefLevel = 0
3372 11:03:22.482922 TX Bit0 (981~997) 17 989, Bit8 (971~985) 15 978,
3373 11:03:22.486070 TX Bit1 (980~995) 16 987, Bit9 (971~985) 15 978,
3374 11:03:22.492728 TX Bit2 (978~992) 15 985, Bit10 (975~986) 12 980,
3375 11:03:22.496033 TX Bit3 (978~989) 12 983, Bit11 (976~988) 13 982,
3376 11:03:22.499406 TX Bit4 (979~994) 16 986, Bit12 (976~986) 11 981,
3377 11:03:22.506049 TX Bit5 (981~997) 17 989, Bit13 (976~988) 13 982,
3378 11:03:22.509633 TX Bit6 (980~995) 16 987, Bit14 (977~985) 9 981,
3379 11:03:22.512893 TX Bit7 (982~992) 11 987, Bit15 (970~979) 10 974,
3380 11:03:22.512977
3381 11:03:22.516153 Write Rank1 MR14 =0x2
3382 11:03:22.525061
3383 11:03:22.525151 CH=1, VrefRange= 0, VrefLevel = 2
3384 11:03:22.531646 TX Bit0 (981~997) 17 989, Bit8 (971~985) 15 978,
3385 11:03:22.534972 TX Bit1 (980~995) 16 987, Bit9 (971~985) 15 978,
3386 11:03:22.541522 TX Bit2 (978~993) 16 985, Bit10 (975~987) 13 981,
3387 11:03:22.545277 TX Bit3 (977~990) 14 983, Bit11 (976~988) 13 982,
3388 11:03:22.548058 TX Bit4 (979~995) 17 987, Bit12 (976~988) 13 982,
3389 11:03:22.554626 TX Bit5 (981~997) 17 989, Bit13 (976~990) 15 983,
3390 11:03:22.558340 TX Bit6 (980~995) 16 987, Bit14 (976~986) 11 981,
3391 11:03:22.561630 TX Bit7 (982~993) 12 987, Bit15 (970~980) 11 975,
3392 11:03:22.561714
3393 11:03:22.564873 Write Rank1 MR14 =0x4
3394 11:03:22.574020
3395 11:03:22.574104 CH=1, VrefRange= 0, VrefLevel = 4
3396 11:03:22.580226 TX Bit0 (981~998) 18 989, Bit8 (972~986) 15 979,
3397 11:03:22.583545 TX Bit1 (979~996) 18 987, Bit9 (971~985) 15 978,
3398 11:03:22.590117 TX Bit2 (978~994) 17 986, Bit10 (975~988) 14 981,
3399 11:03:22.593802 TX Bit3 (977~991) 15 984, Bit11 (975~989) 15 982,
3400 11:03:22.597056 TX Bit4 (979~996) 18 987, Bit12 (976~988) 13 982,
3401 11:03:22.603666 TX Bit5 (980~997) 18 988, Bit13 (976~990) 15 983,
3402 11:03:22.606948 TX Bit6 (979~996) 18 987, Bit14 (975~987) 13 981,
3403 11:03:22.610559 TX Bit7 (981~994) 14 987, Bit15 (969~983) 15 976,
3404 11:03:22.610644
3405 11:03:22.613703 Write Rank1 MR14 =0x6
3406 11:03:22.622935
3407 11:03:22.623020 CH=1, VrefRange= 0, VrefLevel = 6
3408 11:03:22.628899 TX Bit0 (980~998) 19 989, Bit8 (970~986) 17 978,
3409 11:03:22.632326 TX Bit1 (979~997) 19 988, Bit9 (970~986) 17 978,
3410 11:03:22.638807 TX Bit2 (978~994) 17 986, Bit10 (974~989) 16 981,
3411 11:03:22.642556 TX Bit3 (977~991) 15 984, Bit11 (975~990) 16 982,
3412 11:03:22.645822 TX Bit4 (978~996) 19 987, Bit12 (975~989) 15 982,
3413 11:03:22.652114 TX Bit5 (981~998) 18 989, Bit13 (975~991) 17 983,
3414 11:03:22.655771 TX Bit6 (980~998) 19 989, Bit14 (975~988) 14 981,
3415 11:03:22.658757 TX Bit7 (981~995) 15 988, Bit15 (969~983) 15 976,
3416 11:03:22.658842
3417 11:03:22.662183 Write Rank1 MR14 =0x8
3418 11:03:22.671433
3419 11:03:22.671518 CH=1, VrefRange= 0, VrefLevel = 8
3420 11:03:22.677977 TX Bit0 (980~999) 20 989, Bit8 (970~986) 17 978,
3421 11:03:22.681174 TX Bit1 (979~998) 20 988, Bit9 (971~986) 16 978,
3422 11:03:22.687815 TX Bit2 (977~995) 19 986, Bit10 (973~989) 17 981,
3423 11:03:22.691198 TX Bit3 (976~992) 17 984, Bit11 (975~991) 17 983,
3424 11:03:22.694340 TX Bit4 (978~998) 21 988, Bit12 (975~990) 16 982,
3425 11:03:22.701201 TX Bit5 (979~999) 21 989, Bit13 (975~991) 17 983,
3426 11:03:22.704482 TX Bit6 (979~998) 20 988, Bit14 (975~989) 15 982,
3427 11:03:22.708111 TX Bit7 (980~996) 17 988, Bit15 (968~983) 16 975,
3428 11:03:22.708198
3429 11:03:22.711026 Write Rank1 MR14 =0xa
3430 11:03:22.720208
3431 11:03:22.723637 CH=1, VrefRange= 0, VrefLevel = 10
3432 11:03:22.726923 TX Bit0 (979~999) 21 989, Bit8 (970~987) 18 978,
3433 11:03:22.730390 TX Bit1 (978~998) 21 988, Bit9 (971~987) 17 979,
3434 11:03:22.736682 TX Bit2 (977~996) 20 986, Bit10 (974~990) 17 982,
3435 11:03:22.740188 TX Bit3 (976~992) 17 984, Bit11 (974~991) 18 982,
3436 11:03:22.743755 TX Bit4 (978~998) 21 988, Bit12 (974~991) 18 982,
3437 11:03:22.749844 TX Bit5 (979~999) 21 989, Bit13 (974~992) 19 983,
3438 11:03:22.753469 TX Bit6 (979~998) 20 988, Bit14 (974~990) 17 982,
3439 11:03:22.756501 TX Bit7 (980~996) 17 988, Bit15 (968~984) 17 976,
3440 11:03:22.760010
3441 11:03:22.760094 Write Rank1 MR14 =0xc
3442 11:03:22.769103
3443 11:03:22.772654 CH=1, VrefRange= 0, VrefLevel = 12
3444 11:03:22.775731 TX Bit0 (979~999) 21 989, Bit8 (970~988) 19 979,
3445 11:03:22.779041 TX Bit1 (978~998) 21 988, Bit9 (970~987) 18 978,
3446 11:03:22.786026 TX Bit2 (977~997) 21 987, Bit10 (973~991) 19 982,
3447 11:03:22.789306 TX Bit3 (976~993) 18 984, Bit11 (974~992) 19 983,
3448 11:03:22.792676 TX Bit4 (978~998) 21 988, Bit12 (974~991) 18 982,
3449 11:03:22.799071 TX Bit5 (979~999) 21 989, Bit13 (974~992) 19 983,
3450 11:03:22.802729 TX Bit6 (978~999) 22 988, Bit14 (973~990) 18 981,
3451 11:03:22.805788 TX Bit7 (979~997) 19 988, Bit15 (968~985) 18 976,
3452 11:03:22.805875
3453 11:03:22.808933 Write Rank1 MR14 =0xe
3454 11:03:22.818638
3455 11:03:22.821831 CH=1, VrefRange= 0, VrefLevel = 14
3456 11:03:22.825365 TX Bit0 (979~1000) 22 989, Bit8 (970~989) 20 979,
3457 11:03:22.828641 TX Bit1 (978~999) 22 988, Bit9 (970~988) 19 979,
3458 11:03:22.835112 TX Bit2 (977~997) 21 987, Bit10 (973~991) 19 982,
3459 11:03:22.838224 TX Bit3 (976~993) 18 984, Bit11 (973~992) 20 982,
3460 11:03:22.841971 TX Bit4 (978~999) 22 988, Bit12 (974~991) 18 982,
3461 11:03:22.848332 TX Bit5 (978~1000) 23 989, Bit13 (974~992) 19 983,
3462 11:03:22.851982 TX Bit6 (978~999) 22 988, Bit14 (974~991) 18 982,
3463 11:03:22.855394 TX Bit7 (979~998) 20 988, Bit15 (968~985) 18 976,
3464 11:03:22.858311
3465 11:03:22.858419 Write Rank1 MR14 =0x10
3466 11:03:22.867590
3467 11:03:22.871382 CH=1, VrefRange= 0, VrefLevel = 16
3468 11:03:22.874565 TX Bit0 (979~1000) 22 989, Bit8 (969~989) 21 979,
3469 11:03:22.877805 TX Bit1 (978~999) 22 988, Bit9 (970~989) 20 979,
3470 11:03:22.884468 TX Bit2 (977~998) 22 987, Bit10 (972~991) 20 981,
3471 11:03:22.887691 TX Bit3 (976~994) 19 985, Bit11 (973~992) 20 982,
3472 11:03:22.891140 TX Bit4 (977~999) 23 988, Bit12 (974~992) 19 983,
3473 11:03:22.897893 TX Bit5 (978~1000) 23 989, Bit13 (973~992) 20 982,
3474 11:03:22.900938 TX Bit6 (978~999) 22 988, Bit14 (972~991) 20 981,
3475 11:03:22.907567 TX Bit7 (979~998) 20 988, Bit15 (968~985) 18 976,
3476 11:03:22.907687
3477 11:03:22.907784 Write Rank1 MR14 =0x12
3478 11:03:22.917758
3479 11:03:22.920881 CH=1, VrefRange= 0, VrefLevel = 18
3480 11:03:22.924138 TX Bit0 (978~1001) 24 989, Bit8 (969~990) 22 979,
3481 11:03:22.927100 TX Bit1 (978~1000) 23 989, Bit9 (970~989) 20 979,
3482 11:03:22.934211 TX Bit2 (976~998) 23 987, Bit10 (971~992) 22 981,
3483 11:03:22.937413 TX Bit3 (975~995) 21 985, Bit11 (972~992) 21 982,
3484 11:03:22.940630 TX Bit4 (977~999) 23 988, Bit12 (973~992) 20 982,
3485 11:03:22.947553 TX Bit5 (978~1001) 24 989, Bit13 (973~993) 21 983,
3486 11:03:22.950723 TX Bit6 (978~1000) 23 989, Bit14 (972~992) 21 982,
3487 11:03:22.957270 TX Bit7 (979~999) 21 989, Bit15 (967~986) 20 976,
3488 11:03:22.957359
3489 11:03:22.957427 Write Rank1 MR14 =0x14
3490 11:03:22.966956
3491 11:03:22.970387 CH=1, VrefRange= 0, VrefLevel = 20
3492 11:03:22.974131 TX Bit0 (978~1001) 24 989, Bit8 (969~991) 23 980,
3493 11:03:22.977240 TX Bit1 (978~1000) 23 989, Bit9 (970~990) 21 980,
3494 11:03:22.983599 TX Bit2 (976~998) 23 987, Bit10 (971~992) 22 981,
3495 11:03:22.987466 TX Bit3 (975~996) 22 985, Bit11 (972~993) 22 982,
3496 11:03:22.990235 TX Bit4 (977~1000) 24 988, Bit12 (972~992) 21 982,
3497 11:03:22.997033 TX Bit5 (978~1001) 24 989, Bit13 (972~993) 22 982,
3498 11:03:23.000657 TX Bit6 (978~1000) 23 989, Bit14 (971~992) 22 981,
3499 11:03:23.006952 TX Bit7 (979~999) 21 989, Bit15 (967~986) 20 976,
3500 11:03:23.007083
3501 11:03:23.007181 Write Rank1 MR14 =0x16
3502 11:03:23.017169
3503 11:03:23.020196 CH=1, VrefRange= 0, VrefLevel = 22
3504 11:03:23.023598 TX Bit0 (978~1001) 24 989, Bit8 (969~991) 23 980,
3505 11:03:23.027031 TX Bit1 (977~1000) 24 988, Bit9 (970~991) 22 980,
3506 11:03:23.033548 TX Bit2 (976~999) 24 987, Bit10 (971~992) 22 981,
3507 11:03:23.036830 TX Bit3 (975~996) 22 985, Bit11 (971~993) 23 982,
3508 11:03:23.040751 TX Bit4 (977~1000) 24 988, Bit12 (971~993) 23 982,
3509 11:03:23.046719 TX Bit5 (978~1001) 24 989, Bit13 (972~994) 23 983,
3510 11:03:23.050147 TX Bit6 (977~1000) 24 988, Bit14 (971~992) 22 981,
3511 11:03:23.056436 TX Bit7 (978~1000) 23 989, Bit15 (967~986) 20 976,
3512 11:03:23.056547
3513 11:03:23.056613 Write Rank1 MR14 =0x18
3514 11:03:23.067507
3515 11:03:23.070590 CH=1, VrefRange= 0, VrefLevel = 24
3516 11:03:23.073946 TX Bit0 (978~1002) 25 990, Bit8 (969~992) 24 980,
3517 11:03:23.077081 TX Bit1 (977~1001) 25 989, Bit9 (969~991) 23 980,
3518 11:03:23.083577 TX Bit2 (976~999) 24 987, Bit10 (971~992) 22 981,
3519 11:03:23.087326 TX Bit3 (975~997) 23 986, Bit11 (971~993) 23 982,
3520 11:03:23.090556 TX Bit4 (977~1001) 25 989, Bit12 (972~993) 22 982,
3521 11:03:23.096850 TX Bit5 (977~1002) 26 989, Bit13 (972~994) 23 983,
3522 11:03:23.100799 TX Bit6 (977~1001) 25 989, Bit14 (971~992) 22 981,
3523 11:03:23.107147 TX Bit7 (978~1000) 23 989, Bit15 (966~987) 22 976,
3524 11:03:23.107276
3525 11:03:23.107380 Write Rank1 MR14 =0x1a
3526 11:03:23.117101
3527 11:03:23.120930 CH=1, VrefRange= 0, VrefLevel = 26
3528 11:03:23.123699 TX Bit0 (978~1002) 25 990, Bit8 (968~992) 25 980,
3529 11:03:23.127159 TX Bit1 (977~1001) 25 989, Bit9 (969~991) 23 980,
3530 11:03:23.134251 TX Bit2 (976~999) 24 987, Bit10 (970~993) 24 981,
3531 11:03:23.137186 TX Bit3 (974~998) 25 986, Bit11 (971~994) 24 982,
3532 11:03:23.141085 TX Bit4 (977~1001) 25 989, Bit12 (972~993) 22 982,
3533 11:03:23.147031 TX Bit5 (977~1002) 26 989, Bit13 (972~994) 23 983,
3534 11:03:23.150274 TX Bit6 (978~1001) 24 989, Bit14 (971~993) 23 982,
3535 11:03:23.157402 TX Bit7 (978~1000) 23 989, Bit15 (966~988) 23 977,
3536 11:03:23.157512
3537 11:03:23.157613 Write Rank1 MR14 =0x1c
3538 11:03:23.167251
3539 11:03:23.170805 CH=1, VrefRange= 0, VrefLevel = 28
3540 11:03:23.174111 TX Bit0 (977~1003) 27 990, Bit8 (968~992) 25 980,
3541 11:03:23.177322 TX Bit1 (977~1001) 25 989, Bit9 (969~992) 24 980,
3542 11:03:23.184052 TX Bit2 (976~1000) 25 988, Bit10 (970~993) 24 981,
3543 11:03:23.187190 TX Bit3 (974~998) 25 986, Bit11 (970~994) 25 982,
3544 11:03:23.190870 TX Bit4 (977~1001) 25 989, Bit12 (971~994) 24 982,
3545 11:03:23.197196 TX Bit5 (977~1003) 27 990, Bit13 (971~995) 25 983,
3546 11:03:23.200942 TX Bit6 (977~1001) 25 989, Bit14 (971~993) 23 982,
3547 11:03:23.207295 TX Bit7 (978~1000) 23 989, Bit15 (966~989) 24 977,
3548 11:03:23.207421
3549 11:03:23.207525 Write Rank1 MR14 =0x1e
3550 11:03:23.217648
3551 11:03:23.221118 CH=1, VrefRange= 0, VrefLevel = 30
3552 11:03:23.224314 TX Bit0 (977~1003) 27 990, Bit8 (968~992) 25 980,
3553 11:03:23.228068 TX Bit1 (977~1001) 25 989, Bit9 (969~992) 24 980,
3554 11:03:23.234363 TX Bit2 (976~1000) 25 988, Bit10 (970~993) 24 981,
3555 11:03:23.237554 TX Bit3 (974~998) 25 986, Bit11 (970~994) 25 982,
3556 11:03:23.244132 TX Bit4 (977~1001) 25 989, Bit12 (971~994) 24 982,
3557 11:03:23.247545 TX Bit5 (977~1003) 27 990, Bit13 (971~995) 25 983,
3558 11:03:23.250890 TX Bit6 (977~1001) 25 989, Bit14 (971~993) 23 982,
3559 11:03:23.257719 TX Bit7 (978~1000) 23 989, Bit15 (966~989) 24 977,
3560 11:03:23.257830
3561 11:03:23.257930 Write Rank1 MR14 =0x20
3562 11:03:23.268159
3563 11:03:23.271684 CH=1, VrefRange= 0, VrefLevel = 32
3564 11:03:23.275045 TX Bit0 (978~1003) 26 990, Bit8 (968~991) 24 979,
3565 11:03:23.277814 TX Bit1 (977~1001) 25 989, Bit9 (968~991) 24 979,
3566 11:03:23.284794 TX Bit2 (976~1000) 25 988, Bit10 (970~993) 24 981,
3567 11:03:23.288371 TX Bit3 (973~998) 26 985, Bit11 (970~994) 25 982,
3568 11:03:23.291291 TX Bit4 (977~1001) 25 989, Bit12 (971~994) 24 982,
3569 11:03:23.297894 TX Bit5 (978~1002) 25 990, Bit13 (971~994) 24 982,
3570 11:03:23.301400 TX Bit6 (977~1002) 26 989, Bit14 (970~993) 24 981,
3571 11:03:23.308109 TX Bit7 (977~1001) 25 989, Bit15 (965~989) 25 977,
3572 11:03:23.308239
3573 11:03:23.308339 Write Rank1 MR14 =0x22
3574 11:03:23.318164
3575 11:03:23.321619 CH=1, VrefRange= 0, VrefLevel = 34
3576 11:03:23.325235 TX Bit0 (978~1003) 26 990, Bit8 (968~991) 24 979,
3577 11:03:23.328193 TX Bit1 (977~1001) 25 989, Bit9 (968~991) 24 979,
3578 11:03:23.335123 TX Bit2 (976~1000) 25 988, Bit10 (970~993) 24 981,
3579 11:03:23.338520 TX Bit3 (973~998) 26 985, Bit11 (970~994) 25 982,
3580 11:03:23.341946 TX Bit4 (977~1001) 25 989, Bit12 (971~994) 24 982,
3581 11:03:23.348480 TX Bit5 (978~1002) 25 990, Bit13 (971~994) 24 982,
3582 11:03:23.351652 TX Bit6 (977~1002) 26 989, Bit14 (970~993) 24 981,
3583 11:03:23.358174 TX Bit7 (977~1001) 25 989, Bit15 (965~989) 25 977,
3584 11:03:23.358302
3585 11:03:23.358402 Write Rank1 MR14 =0x24
3586 11:03:23.368648
3587 11:03:23.372050 CH=1, VrefRange= 0, VrefLevel = 36
3588 11:03:23.375790 TX Bit0 (978~1003) 26 990, Bit8 (968~991) 24 979,
3589 11:03:23.378296 TX Bit1 (977~1001) 25 989, Bit9 (968~991) 24 979,
3590 11:03:23.384958 TX Bit2 (976~1000) 25 988, Bit10 (970~993) 24 981,
3591 11:03:23.388395 TX Bit3 (973~998) 26 985, Bit11 (970~994) 25 982,
3592 11:03:23.392254 TX Bit4 (977~1001) 25 989, Bit12 (971~994) 24 982,
3593 11:03:23.398560 TX Bit5 (978~1002) 25 990, Bit13 (971~994) 24 982,
3594 11:03:23.402049 TX Bit6 (977~1002) 26 989, Bit14 (970~993) 24 981,
3595 11:03:23.408110 TX Bit7 (977~1001) 25 989, Bit15 (965~989) 25 977,
3596 11:03:23.408239
3597 11:03:23.408336 Write Rank1 MR14 =0x26
3598 11:03:23.418866
3599 11:03:23.422113 CH=1, VrefRange= 0, VrefLevel = 38
3600 11:03:23.425323 TX Bit0 (978~1003) 26 990, Bit8 (968~991) 24 979,
3601 11:03:23.428616 TX Bit1 (977~1001) 25 989, Bit9 (968~991) 24 979,
3602 11:03:23.435462 TX Bit2 (976~1000) 25 988, Bit10 (970~993) 24 981,
3603 11:03:23.438782 TX Bit3 (973~998) 26 985, Bit11 (970~994) 25 982,
3604 11:03:23.441795 TX Bit4 (977~1001) 25 989, Bit12 (971~994) 24 982,
3605 11:03:23.448961 TX Bit5 (978~1002) 25 990, Bit13 (971~994) 24 982,
3606 11:03:23.452216 TX Bit6 (977~1002) 26 989, Bit14 (970~993) 24 981,
3607 11:03:23.458656 TX Bit7 (977~1001) 25 989, Bit15 (965~989) 25 977,
3608 11:03:23.458781
3609 11:03:23.458871
3610 11:03:23.462059 TX Vref found, early break! 375< 377
3611 11:03:23.465311 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3612 11:03:23.468540 u1DelayCellOfst[0]=6 cells (5 PI)
3613 11:03:23.471761 u1DelayCellOfst[1]=5 cells (4 PI)
3614 11:03:23.475617 u1DelayCellOfst[2]=3 cells (3 PI)
3615 11:03:23.478691 u1DelayCellOfst[3]=0 cells (0 PI)
3616 11:03:23.481945 u1DelayCellOfst[4]=5 cells (4 PI)
3617 11:03:23.485426 u1DelayCellOfst[5]=6 cells (5 PI)
3618 11:03:23.485532 u1DelayCellOfst[6]=5 cells (4 PI)
3619 11:03:23.488709 u1DelayCellOfst[7]=5 cells (4 PI)
3620 11:03:23.492146 Byte0, DQ PI dly=985, DQM PI dly= 987
3621 11:03:23.498451 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
3622 11:03:23.498551
3623 11:03:23.501701 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
3624 11:03:23.501789
3625 11:03:23.505342 u1DelayCellOfst[8]=2 cells (2 PI)
3626 11:03:23.508330 u1DelayCellOfst[9]=2 cells (2 PI)
3627 11:03:23.511911 u1DelayCellOfst[10]=5 cells (4 PI)
3628 11:03:23.515548 u1DelayCellOfst[11]=6 cells (5 PI)
3629 11:03:23.518569 u1DelayCellOfst[12]=6 cells (5 PI)
3630 11:03:23.521753 u1DelayCellOfst[13]=6 cells (5 PI)
3631 11:03:23.525429 u1DelayCellOfst[14]=5 cells (4 PI)
3632 11:03:23.525527 u1DelayCellOfst[15]=0 cells (0 PI)
3633 11:03:23.528932 Byte1, DQ PI dly=977, DQM PI dly= 979
3634 11:03:23.535353 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3635 11:03:23.535450
3636 11:03:23.538828 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3637 11:03:23.538916
3638 11:03:23.541955 Write Rank1 MR14 =0x20
3639 11:03:23.542041
3640 11:03:23.545379 Final TX Range 0 Vref 32
3641 11:03:23.545467
3642 11:03:23.551664 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3643 11:03:23.551757
3644 11:03:23.555501 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3645 11:03:23.565039 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3646 11:03:23.571647 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3647 11:03:23.571751 Write Rank1 MR3 =0xb0
3648 11:03:23.575383 DramC Write-DBI on
3649 11:03:23.575471 ==
3650 11:03:23.578554 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3651 11:03:23.581686 fsp= 1, odt_onoff= 1, Byte mode= 0
3652 11:03:23.581775 ==
3653 11:03:23.588388 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3654 11:03:23.588514
3655 11:03:23.591865 Begin, DQ Scan Range 699~763
3656 11:03:23.591952
3657 11:03:23.592017
3658 11:03:23.592078 TX Vref Scan disable
3659 11:03:23.595116 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3660 11:03:23.598494 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3661 11:03:23.602037 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3662 11:03:23.608623 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3663 11:03:23.612163 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3664 11:03:23.615252 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3665 11:03:23.618327 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3666 11:03:23.621644 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3667 11:03:23.625022 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3668 11:03:23.628310 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3669 11:03:23.631990 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3670 11:03:23.635252 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3671 11:03:23.638403 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3672 11:03:23.641630 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3673 11:03:23.645244 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3674 11:03:23.648610 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3675 11:03:23.651904 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3676 11:03:23.655379 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3677 11:03:23.658265 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3678 11:03:23.662106 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3679 11:03:23.665313 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3680 11:03:23.668621 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3681 11:03:23.677364 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3682 11:03:23.680510 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3683 11:03:23.683863 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3684 11:03:23.686828 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3685 11:03:23.690124 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3686 11:03:23.694114 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3687 11:03:23.697369 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3688 11:03:23.700477 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3689 11:03:23.703581 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3690 11:03:23.707177 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3691 11:03:23.710090 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3692 11:03:23.713459 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3693 11:03:23.716740 749 |2 6 45|[0] xxxxxxxx xxxxxxxx [MSB]
3694 11:03:23.720030 Byte0, DQ PI dly=734, DQM PI dly= 734
3695 11:03:23.726746 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 30)
3696 11:03:23.726861
3697 11:03:23.730185 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 30)
3698 11:03:23.730279
3699 11:03:23.733462 Byte1, DQ PI dly=724, DQM PI dly= 724
3700 11:03:23.736609 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
3701 11:03:23.736716
3702 11:03:23.743946 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
3703 11:03:23.744066
3704 11:03:23.750450 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3705 11:03:23.756952 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3706 11:03:23.763450 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3707 11:03:23.763560 Write Rank1 MR3 =0x30
3708 11:03:23.766820 DramC Write-DBI off
3709 11:03:23.766916
3710 11:03:23.766986 [DATLAT]
3711 11:03:23.769967 Freq=1600, CH1 RK1, use_rxtx_scan=0
3712 11:03:23.770060
3713 11:03:23.773459 DATLAT Default: 0x10
3714 11:03:23.773537 7, 0xFFFF, sum=0
3715 11:03:23.776439 8, 0xFFFF, sum=0
3716 11:03:23.776538 9, 0xFFFF, sum=0
3717 11:03:23.779819 10, 0xFFFF, sum=0
3718 11:03:23.779902 11, 0xFFFF, sum=0
3719 11:03:23.783168 12, 0xFFFF, sum=0
3720 11:03:23.783251 13, 0xFFFF, sum=0
3721 11:03:23.787021 14, 0x0, sum=1
3722 11:03:23.787113 15, 0x0, sum=2
3723 11:03:23.789959 16, 0x0, sum=3
3724 11:03:23.790051 17, 0x0, sum=4
3725 11:03:23.793196 pattern=2 first_step=14 total pass=5 best_step=16
3726 11:03:23.793276 ==
3727 11:03:23.799990 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3728 11:03:23.803552 fsp= 1, odt_onoff= 1, Byte mode= 0
3729 11:03:23.803652 ==
3730 11:03:23.806747 Start DQ dly to find pass range UseTestEngine =1
3731 11:03:23.809912 x-axis: bit #, y-axis: DQ dly (-127~63)
3732 11:03:23.813237 RX Vref Scan = 0
3733 11:03:23.816542 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3734 11:03:23.816632 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3735 11:03:23.819672 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3736 11:03:23.822870 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3737 11:03:23.826352 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3738 11:03:23.829642 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3739 11:03:23.833594 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3740 11:03:23.836792 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3741 11:03:23.839583 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3742 11:03:23.843123 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3743 11:03:23.843217 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3744 11:03:23.846760 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3745 11:03:23.849945 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3746 11:03:23.853349 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3747 11:03:23.856271 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3748 11:03:23.859779 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3749 11:03:23.863055 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3750 11:03:23.866243 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3751 11:03:23.866337 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3752 11:03:23.869954 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3753 11:03:23.873397 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3754 11:03:23.876282 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3755 11:03:23.880122 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3756 11:03:23.883279 -3, [0] xxxoxxxx xxxxxxxo [MSB]
3757 11:03:23.886591 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3758 11:03:23.886670 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3759 11:03:23.889723 0, [0] xxooxxxx ooxxxxxo [MSB]
3760 11:03:23.892930 1, [0] xxooxxxx ooxxxxxo [MSB]
3761 11:03:23.896752 2, [0] xxooxxxx ooxxxxxo [MSB]
3762 11:03:23.899895 3, [0] xxooxxxo oooxxxxo [MSB]
3763 11:03:23.903033 4, [0] oooooxxo ooooooxo [MSB]
3764 11:03:23.903113 5, [0] ooooooxo oooooooo [MSB]
3765 11:03:23.908256 32, [0] oooooooo ooooooox [MSB]
3766 11:03:23.911207 33, [0] oooooooo ooooooox [MSB]
3767 11:03:23.914537 34, [0] oooooooo ooooooox [MSB]
3768 11:03:23.917960 35, [0] oooxoooo oxooooox [MSB]
3769 11:03:23.921521 36, [0] oooxoooo xxooooox [MSB]
3770 11:03:23.924759 37, [0] ooxxoooo xxooooox [MSB]
3771 11:03:23.924838 38, [0] ooxxoooo xxooooox [MSB]
3772 11:03:23.927845 39, [0] ooxxooox xxooooox [MSB]
3773 11:03:23.931269 40, [0] oxxxxoox xxxoooox [MSB]
3774 11:03:23.935095 41, [0] xxxxxxox xxxxxxxx [MSB]
3775 11:03:23.938195 42, [0] xxxxxxxx xxxxxxxx [MSB]
3776 11:03:23.941231 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
3777 11:03:23.944494 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
3778 11:03:23.948204 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3779 11:03:23.951489 iDelay=42, Bit 3, Center 15 (-3 ~ 34) 38
3780 11:03:23.955035 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3781 11:03:23.958296 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3782 11:03:23.961574 iDelay=42, Bit 6, Center 23 (6 ~ 41) 36
3783 11:03:23.964615 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3784 11:03:23.968104 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
3785 11:03:23.974724 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3786 11:03:23.978394 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3787 11:03:23.981424 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3788 11:03:23.984686 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3789 11:03:23.988004 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
3790 11:03:23.991923 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3791 11:03:23.994862 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3792 11:03:23.994949 ==
3793 11:03:24.001763 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3794 11:03:24.004864 fsp= 1, odt_onoff= 1, Byte mode= 0
3795 11:03:24.004952 ==
3796 11:03:24.005018 DQS Delay:
3797 11:03:24.005077 DQS0 = 0, DQS1 = 0
3798 11:03:24.008192 DQM Delay:
3799 11:03:24.008280 DQM0 = 20, DQM1 = 19
3800 11:03:24.011368 DQ Delay:
3801 11:03:24.015173 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =15
3802 11:03:24.018082 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3803 11:03:24.018170 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3804 11:03:24.024630 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
3805 11:03:24.024721
3806 11:03:24.024787
3807 11:03:24.024847
3808 11:03:24.024905 [DramC_TX_OE_Calibration] TA2
3809 11:03:24.028426 Original DQ_B0 (3 6) =30, OEN = 27
3810 11:03:24.031304 Original DQ_B1 (3 6) =30, OEN = 27
3811 11:03:24.034822 23, 0x0, End_B0=23 End_B1=23
3812 11:03:24.037992 24, 0x0, End_B0=24 End_B1=24
3813 11:03:24.041476 25, 0x0, End_B0=25 End_B1=25
3814 11:03:24.041570 26, 0x0, End_B0=26 End_B1=26
3815 11:03:24.044710 27, 0x0, End_B0=27 End_B1=27
3816 11:03:24.048027 28, 0x0, End_B0=28 End_B1=28
3817 11:03:24.051715 29, 0x0, End_B0=29 End_B1=29
3818 11:03:24.054919 30, 0x0, End_B0=30 End_B1=30
3819 11:03:24.055008 31, 0xFFFF, End_B0=30 End_B1=30
3820 11:03:24.061423 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3821 11:03:24.067899 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3822 11:03:24.067999
3823 11:03:24.068064
3824 11:03:24.068124 Write Rank1 MR23 =0x3f
3825 11:03:24.071153 [DQSOSC]
3826 11:03:24.077829 [DQSOSCAuto] RK1, (LSB)MR18= 0xcccc, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
3827 11:03:24.084834 CH1_RK1: MR19=0x202, MR18=0xCCCC, DQSOSC=439, MR23=63, INC=12, DEC=19
3828 11:03:24.088139 Write Rank1 MR23 =0x3f
3829 11:03:24.088234 [DQSOSC]
3830 11:03:24.094556 [DQSOSCAuto] RK1, (LSB)MR18= 0xd0d0, (MSB)MR19= 0x202, tDQSOscB0 = 437 ps tDQSOscB1 = 437 ps
3831 11:03:24.097800 CH1 RK1: MR19=202, MR18=D0D0
3832 11:03:24.101585 [RxdqsGatingPostProcess] freq 1600
3833 11:03:24.108045 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3834 11:03:24.108154 Rank: 0
3835 11:03:24.111062 best DQS0 dly(2T, 0.5T) = (2, 6)
3836 11:03:24.114730 best DQS1 dly(2T, 0.5T) = (2, 6)
3837 11:03:24.117975 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3838 11:03:24.121237 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3839 11:03:24.121328 Rank: 1
3840 11:03:24.124878 best DQS0 dly(2T, 0.5T) = (2, 5)
3841 11:03:24.128065 best DQS1 dly(2T, 0.5T) = (2, 6)
3842 11:03:24.131114 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3843 11:03:24.134282 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3844 11:03:24.137621 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3845 11:03:24.141249 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3846 11:03:24.144231 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3847 11:03:24.147592
3848 11:03:24.147679
3849 11:03:24.151128 [Calibration Summary] Freqency 1600
3850 11:03:24.151217 CH 0, Rank 0
3851 11:03:24.151283 All Pass.
3852 11:03:24.151344
3853 11:03:24.154259 CH 0, Rank 1
3854 11:03:24.154345 All Pass.
3855 11:03:24.154410
3856 11:03:24.154471 CH 1, Rank 0
3857 11:03:24.157703 All Pass.
3858 11:03:24.157789
3859 11:03:24.157854 CH 1, Rank 1
3860 11:03:24.157914 All Pass.
3861 11:03:24.157971
3862 11:03:24.164691 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3863 11:03:24.171044 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3864 11:03:24.180919 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3865 11:03:24.181030 Write Rank0 MR3 =0xb0
3866 11:03:24.187365 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3867 11:03:24.194223 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3868 11:03:24.200751 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3869 11:03:24.203870 Write Rank1 MR3 =0xb0
3870 11:03:24.210693 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3871 11:03:24.217477 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3872 11:03:24.223928 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3873 11:03:24.227787 Write Rank0 MR3 =0xb0
3874 11:03:24.234214 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3875 11:03:24.240654 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3876 11:03:24.247417 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3877 11:03:24.247523 Write Rank1 MR3 =0xb0
3878 11:03:24.250642 DramC Write-DBI on
3879 11:03:24.254134 [GetDramInforAfterCalByMRR] Vendor 6.
3880 11:03:24.257433 [GetDramInforAfterCalByMRR] Revision 505.
3881 11:03:24.257543 MR8 1111
3882 11:03:24.264030 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3883 11:03:24.264151 MR8 1111
3884 11:03:24.267014 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3885 11:03:24.270872 MR8 1111
3886 11:03:24.273955 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3887 11:03:24.274045 MR8 1111
3888 11:03:24.280505 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3889 11:03:24.290269 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3890 11:03:24.290390 Write Rank0 MR13 =0xd0
3891 11:03:24.293986 Write Rank1 MR13 =0xd0
3892 11:03:24.294074 Write Rank0 MR13 =0xd0
3893 11:03:24.297180 Write Rank1 MR13 =0xd0
3894 11:03:24.300747 Save calibration result to emmc
3895 11:03:24.300867
3896 11:03:24.300936
3897 11:03:24.304403 [DramcModeReg_Check] Freq_1600, FSP_1
3898 11:03:24.304506 FSP_1, CH_0, RK0
3899 11:03:24.307423 Write Rank0 MR13 =0xd8
3900 11:03:24.310790 MR12 = 0x5e (global = 0x5e) match
3901 11:03:24.314182 MR14 = 0x1c (global = 0x1c) match
3902 11:03:24.314271 FSP_1, CH_0, RK1
3903 11:03:24.317502 Write Rank1 MR13 =0xd8
3904 11:03:24.320638 MR12 = 0x5c (global = 0x5c) match
3905 11:03:24.324009 MR14 = 0x20 (global = 0x20) match
3906 11:03:24.324099 FSP_1, CH_1, RK0
3907 11:03:24.327395 Write Rank0 MR13 =0xd8
3908 11:03:24.330485 MR12 = 0x60 (global = 0x60) match
3909 11:03:24.333915 MR14 = 0x1e (global = 0x1e) match
3910 11:03:24.334010 FSP_1, CH_1, RK1
3911 11:03:24.337150 Write Rank1 MR13 =0xd8
3912 11:03:24.340513 MR12 = 0x5c (global = 0x5c) match
3913 11:03:24.344238 MR14 = 0x20 (global = 0x20) match
3914 11:03:24.344327
3915 11:03:24.347190 [MEM_TEST] 02: After DFS, before run time config
3916 11:03:24.359550 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3917 11:03:24.359676
3918 11:03:24.359744 [TA2_TEST]
3919 11:03:24.359805 === TA2 HW
3920 11:03:24.362475 TA2 PAT: XTALK
3921 11:03:24.366054 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3922 11:03:24.372358 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3923 11:03:24.376473 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3924 11:03:24.379264 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3925 11:03:24.382486
3926 11:03:24.382580
3927 11:03:24.382647 Settings after calibration
3928 11:03:24.382708
3929 11:03:24.386097 [DramcRunTimeConfig]
3930 11:03:24.389374 TransferPLLToSPMControl - MODE SW PHYPLL
3931 11:03:24.389470 TX_TRACKING: ON
3932 11:03:24.392373 RX_TRACKING: ON
3933 11:03:24.392469 HW_GATING: ON
3934 11:03:24.395779 HW_GATING DBG: OFF
3935 11:03:24.395866 ddr_geometry:1
3936 11:03:24.399263 ddr_geometry:1
3937 11:03:24.399350 ddr_geometry:1
3938 11:03:24.399416 ddr_geometry:1
3939 11:03:24.402277 ddr_geometry:1
3940 11:03:24.402365 ddr_geometry:1
3941 11:03:24.405918 ddr_geometry:1
3942 11:03:24.406006 ddr_geometry:1
3943 11:03:24.408931 High Freq DUMMY_READ_FOR_TRACKING: ON
3944 11:03:24.412639 ZQCS_ENABLE_LP4: OFF
3945 11:03:24.415500 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3946 11:03:24.419048 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3947 11:03:24.419136 SPM_CONTROL_AFTERK: ON
3948 11:03:24.422383 IMPEDANCE_TRACKING: ON
3949 11:03:24.422471 TEMP_SENSOR: ON
3950 11:03:24.425543 PER_BANK_REFRESH: ON
3951 11:03:24.425630 HW_SAVE_FOR_SR: ON
3952 11:03:24.429047 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3953 11:03:24.432215 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3954 11:03:24.435919 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3955 11:03:24.438945 Read ODT Tracking: ON
3956 11:03:24.442611 =========================
3957 11:03:24.442702
3958 11:03:24.442768 [TA2_TEST]
3959 11:03:24.442829 === TA2 HW
3960 11:03:24.448850 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3961 11:03:24.452335 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3962 11:03:24.459044 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3963 11:03:24.462274 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3964 11:03:24.462365
3965 11:03:24.465482 [MEM_TEST] 03: After run time config
3966 11:03:24.477212 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3967 11:03:24.480473 [complex_mem_test] start addr:0x40024000, len:131072
3968 11:03:24.684862 1st complex R/W mem test pass
3969 11:03:24.691882 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3970 11:03:24.694622 sync preloader write leveling
3971 11:03:24.698154 sync preloader cbt_mr12
3972 11:03:24.700992 sync preloader cbt_clk_dly
3973 11:03:24.701072 sync preloader cbt_cmd_dly
3974 11:03:24.704290 sync preloader cbt_cs
3975 11:03:24.708124 sync preloader cbt_ca_perbit_delay
3976 11:03:24.708238 sync preloader clk_delay
3977 11:03:24.711122 sync preloader dqs_delay
3978 11:03:24.714266 sync preloader u1Gating2T_Save
3979 11:03:24.717835 sync preloader u1Gating05T_Save
3980 11:03:24.720936 sync preloader u1Gatingfine_tune_Save
3981 11:03:24.724077 sync preloader u1Gatingucpass_count_Save
3982 11:03:24.727851 sync preloader u1TxWindowPerbitVref_Save
3983 11:03:24.731439 sync preloader u1TxCenter_min_Save
3984 11:03:24.734069 sync preloader u1TxCenter_max_Save
3985 11:03:24.737971 sync preloader u1Txwin_center_Save
3986 11:03:24.741351 sync preloader u1Txfirst_pass_Save
3987 11:03:24.744476 sync preloader u1Txlast_pass_Save
3988 11:03:24.747505 sync preloader u1RxDatlat_Save
3989 11:03:24.751256 sync preloader u1RxWinPerbitVref_Save
3990 11:03:24.754525 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3991 11:03:24.757604 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3992 11:03:24.760894 sync preloader delay_cell_unit
3993 11:03:24.768178 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3994 11:03:24.770809 sync preloader write leveling
3995 11:03:24.770904 sync preloader cbt_mr12
3996 11:03:24.774254 sync preloader cbt_clk_dly
3997 11:03:24.777657 sync preloader cbt_cmd_dly
3998 11:03:24.777752 sync preloader cbt_cs
3999 11:03:24.780826 sync preloader cbt_ca_perbit_delay
4000 11:03:24.784184 sync preloader clk_delay
4001 11:03:24.787567 sync preloader dqs_delay
4002 11:03:24.790945 sync preloader u1Gating2T_Save
4003 11:03:24.791039 sync preloader u1Gating05T_Save
4004 11:03:24.794504 sync preloader u1Gatingfine_tune_Save
4005 11:03:24.797477 sync preloader u1Gatingucpass_count_Save
4006 11:03:24.804227 sync preloader u1TxWindowPerbitVref_Save
4007 11:03:24.807391 sync preloader u1TxCenter_min_Save
4008 11:03:24.807529 sync preloader u1TxCenter_max_Save
4009 11:03:24.810443 sync preloader u1Txwin_center_Save
4010 11:03:24.814022 sync preloader u1Txfirst_pass_Save
4011 11:03:24.817538 sync preloader u1Txlast_pass_Save
4012 11:03:24.820735 sync preloader u1RxDatlat_Save
4013 11:03:24.823790 sync preloader u1RxWinPerbitVref_Save
4014 11:03:24.827237 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4015 11:03:24.834019 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4016 11:03:24.834124 sync preloader delay_cell_unit
4017 11:03:24.840747 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4018 11:03:24.844208 sync preloader write leveling
4019 11:03:24.847255 sync preloader cbt_mr12
4020 11:03:24.850788 sync preloader cbt_clk_dly
4021 11:03:24.850879 sync preloader cbt_cmd_dly
4022 11:03:24.853636 sync preloader cbt_cs
4023 11:03:24.857224 sync preloader cbt_ca_perbit_delay
4024 11:03:24.860320 sync preloader clk_delay
4025 11:03:24.860411 sync preloader dqs_delay
4026 11:03:24.864104 sync preloader u1Gating2T_Save
4027 11:03:24.867031 sync preloader u1Gating05T_Save
4028 11:03:24.870299 sync preloader u1Gatingfine_tune_Save
4029 11:03:24.873752 sync preloader u1Gatingucpass_count_Save
4030 11:03:24.877041 sync preloader u1TxWindowPerbitVref_Save
4031 11:03:24.880590 sync preloader u1TxCenter_min_Save
4032 11:03:24.883927 sync preloader u1TxCenter_max_Save
4033 11:03:24.886974 sync preloader u1Txwin_center_Save
4034 11:03:24.890505 sync preloader u1Txfirst_pass_Save
4035 11:03:24.893605 sync preloader u1Txlast_pass_Save
4036 11:03:24.897390 sync preloader u1RxDatlat_Save
4037 11:03:24.900584 sync preloader u1RxWinPerbitVref_Save
4038 11:03:24.903567 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4039 11:03:24.907164 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4040 11:03:24.910451 sync preloader delay_cell_unit
4041 11:03:24.913740 just_for_test_dump_coreboot_params dump all params
4042 11:03:24.917016 dump source = 0x0
4043 11:03:24.917104 dump params frequency:1600
4044 11:03:24.920601 dump params rank number:2
4045 11:03:24.920687
4046 11:03:24.924010 dump params write leveling
4047 11:03:24.926889 write leveling[0][0][0] = 0x21
4048 11:03:24.930519 write leveling[0][0][1] = 0x18
4049 11:03:24.930609 write leveling[0][1][0] = 0x1b
4050 11:03:24.933700 write leveling[0][1][1] = 0x17
4051 11:03:24.937265 write leveling[1][0][0] = 0x21
4052 11:03:24.940317 write leveling[1][0][1] = 0x18
4053 11:03:24.943546 write leveling[1][1][0] = 0x21
4054 11:03:24.946947 write leveling[1][1][1] = 0x19
4055 11:03:24.947041 dump params cbt_cs
4056 11:03:24.950216 cbt_cs[0][0] = 0x8
4057 11:03:24.950308 cbt_cs[0][1] = 0x8
4058 11:03:24.953478 cbt_cs[1][0] = 0xa
4059 11:03:24.953567 cbt_cs[1][1] = 0xa
4060 11:03:24.957148 dump params cbt_mr12
4061 11:03:24.957236 cbt_mr12[0][0] = 0x1e
4062 11:03:24.960302 cbt_mr12[0][1] = 0x1c
4063 11:03:24.960389 cbt_mr12[1][0] = 0x20
4064 11:03:24.963980 cbt_mr12[1][1] = 0x1c
4065 11:03:24.967178 dump params tx window
4066 11:03:24.967267 tx_center_min[0][0][0] = 982
4067 11:03:24.970427 tx_center_max[0][0][0] = 988
4068 11:03:24.973587 tx_center_min[0][0][1] = 975
4069 11:03:24.977198 tx_center_max[0][0][1] = 981
4070 11:03:24.980327 tx_center_min[0][1][0] = 980
4071 11:03:24.980446 tx_center_max[0][1][0] = 986
4072 11:03:24.983315 tx_center_min[0][1][1] = 977
4073 11:03:24.987073 tx_center_max[0][1][1] = 982
4074 11:03:24.990003 tx_center_min[1][0][0] = 988
4075 11:03:24.993472 tx_center_max[1][0][0] = 993
4076 11:03:24.993567 tx_center_min[1][0][1] = 977
4077 11:03:24.997051 tx_center_max[1][0][1] = 983
4078 11:03:24.999820 tx_center_min[1][1][0] = 985
4079 11:03:25.003697 tx_center_max[1][1][0] = 990
4080 11:03:25.007016 tx_center_min[1][1][1] = 977
4081 11:03:25.007129 tx_center_max[1][1][1] = 982
4082 11:03:25.009853 dump params tx window
4083 11:03:25.013082 tx_win_center[0][0][0] = 988
4084 11:03:25.017111 tx_first_pass[0][0][0] = 976
4085 11:03:25.017203 tx_last_pass[0][0][0] = 1001
4086 11:03:25.019855 tx_win_center[0][0][1] = 988
4087 11:03:25.023406 tx_first_pass[0][0][1] = 976
4088 11:03:25.026528 tx_last_pass[0][0][1] = 1000
4089 11:03:25.026618 tx_win_center[0][0][2] = 988
4090 11:03:25.029698 tx_first_pass[0][0][2] = 976
4091 11:03:25.033142 tx_last_pass[0][0][2] = 1001
4092 11:03:25.036422 tx_win_center[0][0][3] = 982
4093 11:03:25.039797 tx_first_pass[0][0][3] = 970
4094 11:03:25.039895 tx_last_pass[0][0][3] = 994
4095 11:03:25.043191 tx_win_center[0][0][4] = 987
4096 11:03:25.046759 tx_first_pass[0][0][4] = 975
4097 11:03:25.049969 tx_last_pass[0][0][4] = 1000
4098 11:03:25.053030 tx_win_center[0][0][5] = 985
4099 11:03:25.053120 tx_first_pass[0][0][5] = 972
4100 11:03:25.056275 tx_last_pass[0][0][5] = 998
4101 11:03:25.060022 tx_win_center[0][0][6] = 987
4102 11:03:25.063306 tx_first_pass[0][0][6] = 975
4103 11:03:25.063397 tx_last_pass[0][0][6] = 999
4104 11:03:25.066322 tx_win_center[0][0][7] = 988
4105 11:03:25.069992 tx_first_pass[0][0][7] = 976
4106 11:03:25.073012 tx_last_pass[0][0][7] = 1000
4107 11:03:25.076342 tx_win_center[0][0][8] = 975
4108 11:03:25.076471 tx_first_pass[0][0][8] = 964
4109 11:03:25.079708 tx_last_pass[0][0][8] = 987
4110 11:03:25.083272 tx_win_center[0][0][9] = 978
4111 11:03:25.086493 tx_first_pass[0][0][9] = 967
4112 11:03:25.086613 tx_last_pass[0][0][9] = 990
4113 11:03:25.089897 tx_win_center[0][0][10] = 981
4114 11:03:25.093369 tx_first_pass[0][0][10] = 969
4115 11:03:25.096371 tx_last_pass[0][0][10] = 994
4116 11:03:25.099841 tx_win_center[0][0][11] = 977
4117 11:03:25.099933 tx_first_pass[0][0][11] = 965
4118 11:03:25.102895 tx_last_pass[0][0][11] = 989
4119 11:03:25.106146 tx_win_center[0][0][12] = 978
4120 11:03:25.109940 tx_first_pass[0][0][12] = 967
4121 11:03:25.113130 tx_last_pass[0][0][12] = 990
4122 11:03:25.113221 tx_win_center[0][0][13] = 978
4123 11:03:25.116577 tx_first_pass[0][0][13] = 967
4124 11:03:25.119793 tx_last_pass[0][0][13] = 990
4125 11:03:25.123148 tx_win_center[0][0][14] = 979
4126 11:03:25.126451 tx_first_pass[0][0][14] = 967
4127 11:03:25.126540 tx_last_pass[0][0][14] = 991
4128 11:03:25.129571 tx_win_center[0][0][15] = 981
4129 11:03:25.133209 tx_first_pass[0][0][15] = 969
4130 11:03:25.136760 tx_last_pass[0][0][15] = 993
4131 11:03:25.139578 tx_win_center[0][1][0] = 986
4132 11:03:25.139666 tx_first_pass[0][1][0] = 974
4133 11:03:25.143167 tx_last_pass[0][1][0] = 999
4134 11:03:25.146738 tx_win_center[0][1][1] = 986
4135 11:03:25.149401 tx_first_pass[0][1][1] = 974
4136 11:03:25.152902 tx_last_pass[0][1][1] = 998
4137 11:03:25.152990 tx_win_center[0][1][2] = 986
4138 11:03:25.156201 tx_first_pass[0][1][2] = 975
4139 11:03:25.159282 tx_last_pass[0][1][2] = 998
4140 11:03:25.162955 tx_win_center[0][1][3] = 980
4141 11:03:25.163046 tx_first_pass[0][1][3] = 968
4142 11:03:25.166280 tx_last_pass[0][1][3] = 992
4143 11:03:25.169924 tx_win_center[0][1][4] = 985
4144 11:03:25.172781 tx_first_pass[0][1][4] = 972
4145 11:03:25.176102 tx_last_pass[0][1][4] = 998
4146 11:03:25.176190 tx_win_center[0][1][5] = 981
4147 11:03:25.179346 tx_first_pass[0][1][5] = 969
4148 11:03:25.182942 tx_last_pass[0][1][5] = 994
4149 11:03:25.186097 tx_win_center[0][1][6] = 983
4150 11:03:25.189733 tx_first_pass[0][1][6] = 970
4151 11:03:25.189825 tx_last_pass[0][1][6] = 996
4152 11:03:25.192591 tx_win_center[0][1][7] = 985
4153 11:03:25.196245 tx_first_pass[0][1][7] = 972
4154 11:03:25.199252 tx_last_pass[0][1][7] = 998
4155 11:03:25.199343 tx_win_center[0][1][8] = 977
4156 11:03:25.202543 tx_first_pass[0][1][8] = 965
4157 11:03:25.205789 tx_last_pass[0][1][8] = 989
4158 11:03:25.209281 tx_win_center[0][1][9] = 978
4159 11:03:25.209404 tx_first_pass[0][1][9] = 967
4160 11:03:25.212416 tx_last_pass[0][1][9] = 990
4161 11:03:25.215733 tx_win_center[0][1][10] = 982
4162 11:03:25.219271 tx_first_pass[0][1][10] = 970
4163 11:03:25.222451 tx_last_pass[0][1][10] = 995
4164 11:03:25.222539 tx_win_center[0][1][11] = 977
4165 11:03:25.225917 tx_first_pass[0][1][11] = 966
4166 11:03:25.229330 tx_last_pass[0][1][11] = 989
4167 11:03:25.232784 tx_win_center[0][1][12] = 978
4168 11:03:25.236101 tx_first_pass[0][1][12] = 967
4169 11:03:25.236217 tx_last_pass[0][1][12] = 990
4170 11:03:25.239185 tx_win_center[0][1][13] = 978
4171 11:03:25.242711 tx_first_pass[0][1][13] = 967
4172 11:03:25.246171 tx_last_pass[0][1][13] = 990
4173 11:03:25.249404 tx_win_center[0][1][14] = 979
4174 11:03:25.249496 tx_first_pass[0][1][14] = 967
4175 11:03:25.252842 tx_last_pass[0][1][14] = 991
4176 11:03:25.256431 tx_win_center[0][1][15] = 981
4177 11:03:25.259614 tx_first_pass[0][1][15] = 969
4178 11:03:25.262827 tx_last_pass[0][1][15] = 993
4179 11:03:25.262915 tx_win_center[1][0][0] = 992
4180 11:03:25.265993 tx_first_pass[1][0][0] = 979
4181 11:03:25.269134 tx_last_pass[1][0][0] = 1006
4182 11:03:25.272352 tx_win_center[1][0][1] = 991
4183 11:03:25.275632 tx_first_pass[1][0][1] = 978
4184 11:03:25.275722 tx_last_pass[1][0][1] = 1004
4185 11:03:25.279272 tx_win_center[1][0][2] = 989
4186 11:03:25.282436 tx_first_pass[1][0][2] = 977
4187 11:03:25.285736 tx_last_pass[1][0][2] = 1002
4188 11:03:25.289436 tx_win_center[1][0][3] = 988
4189 11:03:25.289528 tx_first_pass[1][0][3] = 976
4190 11:03:25.292641 tx_last_pass[1][0][3] = 1000
4191 11:03:25.295784 tx_win_center[1][0][4] = 992
4192 11:03:25.299063 tx_first_pass[1][0][4] = 979
4193 11:03:25.299154 tx_last_pass[1][0][4] = 1005
4194 11:03:25.302344 tx_win_center[1][0][5] = 993
4195 11:03:25.305789 tx_first_pass[1][0][5] = 980
4196 11:03:25.308991 tx_last_pass[1][0][5] = 1006
4197 11:03:25.312161 tx_win_center[1][0][6] = 991
4198 11:03:25.312251 tx_first_pass[1][0][6] = 978
4199 11:03:25.316053 tx_last_pass[1][0][6] = 1005
4200 11:03:25.319355 tx_win_center[1][0][7] = 991
4201 11:03:25.322519 tx_first_pass[1][0][7] = 978
4202 11:03:25.325588 tx_last_pass[1][0][7] = 1004
4203 11:03:25.325676 tx_win_center[1][0][8] = 980
4204 11:03:25.328933 tx_first_pass[1][0][8] = 968
4205 11:03:25.332627 tx_last_pass[1][0][8] = 992
4206 11:03:25.335623 tx_win_center[1][0][9] = 980
4207 11:03:25.335738 tx_first_pass[1][0][9] = 969
4208 11:03:25.339004 tx_last_pass[1][0][9] = 991
4209 11:03:25.342267 tx_win_center[1][0][10] = 981
4210 11:03:25.345554 tx_first_pass[1][0][10] = 970
4211 11:03:25.348797 tx_last_pass[1][0][10] = 993
4212 11:03:25.348884 tx_win_center[1][0][11] = 982
4213 11:03:25.352136 tx_first_pass[1][0][11] = 970
4214 11:03:25.355490 tx_last_pass[1][0][11] = 994
4215 11:03:25.358942 tx_win_center[1][0][12] = 982
4216 11:03:25.362282 tx_first_pass[1][0][12] = 970
4217 11:03:25.362373 tx_last_pass[1][0][12] = 994
4218 11:03:25.365296 tx_win_center[1][0][13] = 983
4219 11:03:25.369385 tx_first_pass[1][0][13] = 972
4220 11:03:25.372341 tx_last_pass[1][0][13] = 994
4221 11:03:25.375726 tx_win_center[1][0][14] = 981
4222 11:03:25.379171 tx_first_pass[1][0][14] = 970
4223 11:03:25.379269 tx_last_pass[1][0][14] = 993
4224 11:03:25.382125 tx_win_center[1][0][15] = 977
4225 11:03:25.385669 tx_first_pass[1][0][15] = 966
4226 11:03:25.388567 tx_last_pass[1][0][15] = 988
4227 11:03:25.392335 tx_win_center[1][1][0] = 990
4228 11:03:25.392465 tx_first_pass[1][1][0] = 978
4229 11:03:25.395431 tx_last_pass[1][1][0] = 1003
4230 11:03:25.398488 tx_win_center[1][1][1] = 989
4231 11:03:25.402161 tx_first_pass[1][1][1] = 977
4232 11:03:25.402254 tx_last_pass[1][1][1] = 1001
4233 11:03:25.405595 tx_win_center[1][1][2] = 988
4234 11:03:25.408731 tx_first_pass[1][1][2] = 976
4235 11:03:25.412592 tx_last_pass[1][1][2] = 1000
4236 11:03:25.415382 tx_win_center[1][1][3] = 985
4237 11:03:25.415474 tx_first_pass[1][1][3] = 973
4238 11:03:25.419056 tx_last_pass[1][1][3] = 998
4239 11:03:25.422131 tx_win_center[1][1][4] = 989
4240 11:03:25.425740 tx_first_pass[1][1][4] = 977
4241 11:03:25.428417 tx_last_pass[1][1][4] = 1001
4242 11:03:25.428535 tx_win_center[1][1][5] = 990
4243 11:03:25.432080 tx_first_pass[1][1][5] = 978
4244 11:03:25.435396 tx_last_pass[1][1][5] = 1002
4245 11:03:25.438582 tx_win_center[1][1][6] = 989
4246 11:03:25.438674 tx_first_pass[1][1][6] = 977
4247 11:03:25.441903 tx_last_pass[1][1][6] = 1002
4248 11:03:25.444946 tx_win_center[1][1][7] = 989
4249 11:03:25.448769 tx_first_pass[1][1][7] = 977
4250 11:03:25.452023 tx_last_pass[1][1][7] = 1001
4251 11:03:25.452115 tx_win_center[1][1][8] = 979
4252 11:03:25.455047 tx_first_pass[1][1][8] = 968
4253 11:03:25.458706 tx_last_pass[1][1][8] = 991
4254 11:03:25.462113 tx_win_center[1][1][9] = 979
4255 11:03:25.462257 tx_first_pass[1][1][9] = 968
4256 11:03:25.465100 tx_last_pass[1][1][9] = 991
4257 11:03:25.468834 tx_win_center[1][1][10] = 981
4258 11:03:25.471926 tx_first_pass[1][1][10] = 970
4259 11:03:25.475115 tx_last_pass[1][1][10] = 993
4260 11:03:25.475215 tx_win_center[1][1][11] = 982
4261 11:03:25.478344 tx_first_pass[1][1][11] = 970
4262 11:03:25.482124 tx_last_pass[1][1][11] = 994
4263 11:03:25.485223 tx_win_center[1][1][12] = 982
4264 11:03:25.489024 tx_first_pass[1][1][12] = 971
4265 11:03:25.489123 tx_last_pass[1][1][12] = 994
4266 11:03:25.491756 tx_win_center[1][1][13] = 982
4267 11:03:25.495074 tx_first_pass[1][1][13] = 971
4268 11:03:25.498465 tx_last_pass[1][1][13] = 994
4269 11:03:25.501799 tx_win_center[1][1][14] = 981
4270 11:03:25.504908 tx_first_pass[1][1][14] = 970
4271 11:03:25.504998 tx_last_pass[1][1][14] = 993
4272 11:03:25.508239 tx_win_center[1][1][15] = 977
4273 11:03:25.512165 tx_first_pass[1][1][15] = 965
4274 11:03:25.515061 tx_last_pass[1][1][15] = 989
4275 11:03:25.515142 dump params rx window
4276 11:03:25.518563 rx_firspass[0][0][0] = 5
4277 11:03:25.521883 rx_lastpass[0][0][0] = 38
4278 11:03:25.521975 rx_firspass[0][0][1] = 5
4279 11:03:25.525226 rx_lastpass[0][0][1] = 36
4280 11:03:25.528612 rx_firspass[0][0][2] = 6
4281 11:03:25.528696 rx_lastpass[0][0][2] = 36
4282 11:03:25.531625 rx_firspass[0][0][3] = -2
4283 11:03:25.535095 rx_lastpass[0][0][3] = 31
4284 11:03:25.538656 rx_firspass[0][0][4] = 5
4285 11:03:25.538766 rx_lastpass[0][0][4] = 36
4286 11:03:25.541852 rx_firspass[0][0][5] = 2
4287 11:03:25.545252 rx_lastpass[0][0][5] = 31
4288 11:03:25.545340 rx_firspass[0][0][6] = 4
4289 11:03:25.548447 rx_lastpass[0][0][6] = 33
4290 11:03:25.551924 rx_firspass[0][0][7] = 5
4291 11:03:25.554868 rx_lastpass[0][0][7] = 36
4292 11:03:25.554959 rx_firspass[0][0][8] = -3
4293 11:03:25.558455 rx_lastpass[0][0][8] = 32
4294 11:03:25.561491 rx_firspass[0][0][9] = 1
4295 11:03:25.561580 rx_lastpass[0][0][9] = 32
4296 11:03:25.564879 rx_firspass[0][0][10] = 8
4297 11:03:25.568371 rx_lastpass[0][0][10] = 41
4298 11:03:25.571355 rx_firspass[0][0][11] = 1
4299 11:03:25.571445 rx_lastpass[0][0][11] = 32
4300 11:03:25.575216 rx_firspass[0][0][12] = 2
4301 11:03:25.578238 rx_lastpass[0][0][12] = 36
4302 11:03:25.578326 rx_firspass[0][0][13] = 3
4303 11:03:25.581565 rx_lastpass[0][0][13] = 33
4304 11:03:25.585059 rx_firspass[0][0][14] = 2
4305 11:03:25.588052 rx_lastpass[0][0][14] = 36
4306 11:03:25.588168 rx_firspass[0][0][15] = 6
4307 11:03:25.591480 rx_lastpass[0][0][15] = 37
4308 11:03:25.594707 rx_firspass[0][1][0] = 6
4309 11:03:25.598350 rx_lastpass[0][1][0] = 40
4310 11:03:25.598443 rx_firspass[0][1][1] = 5
4311 11:03:25.601194 rx_lastpass[0][1][1] = 38
4312 11:03:25.604859 rx_firspass[0][1][2] = 6
4313 11:03:25.604948 rx_lastpass[0][1][2] = 38
4314 11:03:25.607697 rx_firspass[0][1][3] = -2
4315 11:03:25.611211 rx_lastpass[0][1][3] = 33
4316 11:03:25.611305 rx_firspass[0][1][4] = 5
4317 11:03:25.614200 rx_lastpass[0][1][4] = 39
4318 11:03:25.617662 rx_firspass[0][1][5] = 1
4319 11:03:25.621243 rx_lastpass[0][1][5] = 34
4320 11:03:25.621336 rx_firspass[0][1][6] = 3
4321 11:03:25.624442 rx_lastpass[0][1][6] = 37
4322 11:03:25.627779 rx_firspass[0][1][7] = 3
4323 11:03:25.627895 rx_lastpass[0][1][7] = 38
4324 11:03:25.630988 rx_firspass[0][1][8] = -2
4325 11:03:25.634629 rx_lastpass[0][1][8] = 32
4326 11:03:25.634720 rx_firspass[0][1][9] = 1
4327 11:03:25.637443 rx_lastpass[0][1][9] = 36
4328 11:03:25.641115 rx_firspass[0][1][10] = 7
4329 11:03:25.644421 rx_lastpass[0][1][10] = 43
4330 11:03:25.644525 rx_firspass[0][1][11] = -2
4331 11:03:25.647700 rx_lastpass[0][1][11] = 34
4332 11:03:25.650986 rx_firspass[0][1][12] = 1
4333 11:03:25.654229 rx_lastpass[0][1][12] = 37
4334 11:03:25.654320 rx_firspass[0][1][13] = 2
4335 11:03:25.657335 rx_lastpass[0][1][13] = 35
4336 11:03:25.661125 rx_firspass[0][1][14] = 3
4337 11:03:25.664465 rx_lastpass[0][1][14] = 37
4338 11:03:25.664557 rx_firspass[0][1][15] = 6
4339 11:03:25.667476 rx_lastpass[0][1][15] = 39
4340 11:03:25.670804 rx_firspass[1][0][0] = 5
4341 11:03:25.670893 rx_lastpass[1][0][0] = 39
4342 11:03:25.674315 rx_firspass[1][0][1] = 5
4343 11:03:25.677681 rx_lastpass[1][0][1] = 38
4344 11:03:25.677772 rx_firspass[1][0][2] = 2
4345 11:03:25.681082 rx_lastpass[1][0][2] = 35
4346 11:03:25.684489 rx_firspass[1][0][3] = -1
4347 11:03:25.687719 rx_lastpass[1][0][3] = 33
4348 11:03:25.687812 rx_firspass[1][0][4] = 5
4349 11:03:25.690961 rx_lastpass[1][0][4] = 38
4350 11:03:25.694236 rx_firspass[1][0][5] = 7
4351 11:03:25.694326 rx_lastpass[1][0][5] = 39
4352 11:03:25.697446 rx_firspass[1][0][6] = 7
4353 11:03:25.700671 rx_lastpass[1][0][6] = 40
4354 11:03:25.700760 rx_firspass[1][0][7] = 5
4355 11:03:25.704602 rx_lastpass[1][0][7] = 38
4356 11:03:25.707905 rx_firspass[1][0][8] = 1
4357 11:03:25.711126 rx_lastpass[1][0][8] = 33
4358 11:03:25.711228 rx_firspass[1][0][9] = 1
4359 11:03:25.714380 rx_lastpass[1][0][9] = 32
4360 11:03:25.717700 rx_firspass[1][0][10] = 5
4361 11:03:25.717782 rx_lastpass[1][0][10] = 35
4362 11:03:25.720961 rx_firspass[1][0][11] = 6
4363 11:03:25.724434 rx_lastpass[1][0][11] = 38
4364 11:03:25.727533 rx_firspass[1][0][12] = 6
4365 11:03:25.727622 rx_lastpass[1][0][12] = 38
4366 11:03:25.731147 rx_firspass[1][0][13] = 6
4367 11:03:25.734243 rx_lastpass[1][0][13] = 37
4368 11:03:25.734332 rx_firspass[1][0][14] = 7
4369 11:03:25.737591 rx_lastpass[1][0][14] = 38
4370 11:03:25.740883 rx_firspass[1][0][15] = -3
4371 11:03:25.744167 rx_lastpass[1][0][15] = 30
4372 11:03:25.744255 rx_firspass[1][1][0] = 4
4373 11:03:25.747718 rx_lastpass[1][1][0] = 40
4374 11:03:25.750793 rx_firspass[1][1][1] = 4
4375 11:03:25.750880 rx_lastpass[1][1][1] = 39
4376 11:03:25.754649 rx_firspass[1][1][2] = 0
4377 11:03:25.757374 rx_lastpass[1][1][2] = 36
4378 11:03:25.760654 rx_firspass[1][1][3] = -3
4379 11:03:25.760742 rx_lastpass[1][1][3] = 34
4380 11:03:25.764170 rx_firspass[1][1][4] = 4
4381 11:03:25.767483 rx_lastpass[1][1][4] = 39
4382 11:03:25.767572 rx_firspass[1][1][5] = 5
4383 11:03:25.771361 rx_lastpass[1][1][5] = 40
4384 11:03:25.774371 rx_firspass[1][1][6] = 6
4385 11:03:25.774459 rx_lastpass[1][1][6] = 41
4386 11:03:25.777239 rx_firspass[1][1][7] = 3
4387 11:03:25.780743 rx_lastpass[1][1][7] = 38
4388 11:03:25.784259 rx_firspass[1][1][8] = 0
4389 11:03:25.784349 rx_lastpass[1][1][8] = 35
4390 11:03:25.787404 rx_firspass[1][1][9] = -1
4391 11:03:25.791108 rx_lastpass[1][1][9] = 34
4392 11:03:25.791196 rx_firspass[1][1][10] = 3
4393 11:03:25.793989 rx_lastpass[1][1][10] = 39
4394 11:03:25.797098 rx_firspass[1][1][11] = 4
4395 11:03:25.800882 rx_lastpass[1][1][11] = 40
4396 11:03:25.800971 rx_firspass[1][1][12] = 4
4397 11:03:25.804143 rx_lastpass[1][1][12] = 40
4398 11:03:25.807457 rx_firspass[1][1][13] = 4
4399 11:03:25.810456 rx_lastpass[1][1][13] = 40
4400 11:03:25.810551 rx_firspass[1][1][14] = 5
4401 11:03:25.814095 rx_lastpass[1][1][14] = 40
4402 11:03:25.817452 rx_firspass[1][1][15] = -3
4403 11:03:25.817549 rx_lastpass[1][1][15] = 31
4404 11:03:25.820316 dump params clk_delay
4405 11:03:25.823978 clk_delay[0] = 1
4406 11:03:25.824074 clk_delay[1] = 0
4407 11:03:25.826962 dump params dqs_delay
4408 11:03:25.827051 dqs_delay[0][0] = -2
4409 11:03:25.830541 dqs_delay[0][1] = 0
4410 11:03:25.830658 dqs_delay[1][0] = 0
4411 11:03:25.833796 dqs_delay[1][1] = 0
4412 11:03:25.837340 dump params delay_cell_unit = 735
4413 11:03:25.837458 dump source = 0x0
4414 11:03:25.840358 dump params frequency:1200
4415 11:03:25.843837 dump params rank number:2
4416 11:03:25.843960
4417 11:03:25.844060 dump params write leveling
4418 11:03:25.847175 write leveling[0][0][0] = 0x0
4419 11:03:25.850343 write leveling[0][0][1] = 0x0
4420 11:03:25.853916 write leveling[0][1][0] = 0x0
4421 11:03:25.857252 write leveling[0][1][1] = 0x0
4422 11:03:25.857370 write leveling[1][0][0] = 0x0
4423 11:03:25.860387 write leveling[1][0][1] = 0x0
4424 11:03:25.863712 write leveling[1][1][0] = 0x0
4425 11:03:25.866997 write leveling[1][1][1] = 0x0
4426 11:03:25.867117 dump params cbt_cs
4427 11:03:25.870149 cbt_cs[0][0] = 0x0
4428 11:03:25.870265 cbt_cs[0][1] = 0x0
4429 11:03:25.873761 cbt_cs[1][0] = 0x0
4430 11:03:25.876860 cbt_cs[1][1] = 0x0
4431 11:03:25.876969 dump params cbt_mr12
4432 11:03:25.880037 cbt_mr12[0][0] = 0x0
4433 11:03:25.880147 cbt_mr12[0][1] = 0x0
4434 11:03:25.883645 cbt_mr12[1][0] = 0x0
4435 11:03:25.883751 cbt_mr12[1][1] = 0x0
4436 11:03:25.887057 dump params tx window
4437 11:03:25.890435 tx_center_min[0][0][0] = 0
4438 11:03:25.890526 tx_center_max[0][0][0] = 0
4439 11:03:25.893695 tx_center_min[0][0][1] = 0
4440 11:03:25.896957 tx_center_max[0][0][1] = 0
4441 11:03:25.900140 tx_center_min[0][1][0] = 0
4442 11:03:25.900230 tx_center_max[0][1][0] = 0
4443 11:03:25.903397 tx_center_min[0][1][1] = 0
4444 11:03:25.906747 tx_center_max[0][1][1] = 0
4445 11:03:25.910211 tx_center_min[1][0][0] = 0
4446 11:03:25.910307 tx_center_max[1][0][0] = 0
4447 11:03:25.913329 tx_center_min[1][0][1] = 0
4448 11:03:25.917146 tx_center_max[1][0][1] = 0
4449 11:03:25.920549 tx_center_min[1][1][0] = 0
4450 11:03:25.920641 tx_center_max[1][1][0] = 0
4451 11:03:25.923610 tx_center_min[1][1][1] = 0
4452 11:03:25.926865 tx_center_max[1][1][1] = 0
4453 11:03:25.926946 dump params tx window
4454 11:03:25.930310 tx_win_center[0][0][0] = 0
4455 11:03:25.933875 tx_first_pass[0][0][0] = 0
4456 11:03:25.936793 tx_last_pass[0][0][0] = 0
4457 11:03:25.936881 tx_win_center[0][0][1] = 0
4458 11:03:25.940143 tx_first_pass[0][0][1] = 0
4459 11:03:25.943531 tx_last_pass[0][0][1] = 0
4460 11:03:25.943646 tx_win_center[0][0][2] = 0
4461 11:03:25.946668 tx_first_pass[0][0][2] = 0
4462 11:03:25.950399 tx_last_pass[0][0][2] = 0
4463 11:03:25.953240 tx_win_center[0][0][3] = 0
4464 11:03:25.953349 tx_first_pass[0][0][3] = 0
4465 11:03:25.956762 tx_last_pass[0][0][3] = 0
4466 11:03:25.960385 tx_win_center[0][0][4] = 0
4467 11:03:25.963373 tx_first_pass[0][0][4] = 0
4468 11:03:25.963485 tx_last_pass[0][0][4] = 0
4469 11:03:25.966815 tx_win_center[0][0][5] = 0
4470 11:03:25.970273 tx_first_pass[0][0][5] = 0
4471 11:03:25.970382 tx_last_pass[0][0][5] = 0
4472 11:03:25.973208 tx_win_center[0][0][6] = 0
4473 11:03:25.976901 tx_first_pass[0][0][6] = 0
4474 11:03:25.980017 tx_last_pass[0][0][6] = 0
4475 11:03:25.980126 tx_win_center[0][0][7] = 0
4476 11:03:25.983597 tx_first_pass[0][0][7] = 0
4477 11:03:25.987100 tx_last_pass[0][0][7] = 0
4478 11:03:25.987209 tx_win_center[0][0][8] = 0
4479 11:03:25.989949 tx_first_pass[0][0][8] = 0
4480 11:03:25.993359 tx_last_pass[0][0][8] = 0
4481 11:03:25.996564 tx_win_center[0][0][9] = 0
4482 11:03:25.996673 tx_first_pass[0][0][9] = 0
4483 11:03:26.000202 tx_last_pass[0][0][9] = 0
4484 11:03:26.003329 tx_win_center[0][0][10] = 0
4485 11:03:26.006510 tx_first_pass[0][0][10] = 0
4486 11:03:26.006601 tx_last_pass[0][0][10] = 0
4487 11:03:26.009613 tx_win_center[0][0][11] = 0
4488 11:03:26.013015 tx_first_pass[0][0][11] = 0
4489 11:03:26.016284 tx_last_pass[0][0][11] = 0
4490 11:03:26.016399 tx_win_center[0][0][12] = 0
4491 11:03:26.019516 tx_first_pass[0][0][12] = 0
4492 11:03:26.022804 tx_last_pass[0][0][12] = 0
4493 11:03:26.026768 tx_win_center[0][0][13] = 0
4494 11:03:26.026860 tx_first_pass[0][0][13] = 0
4495 11:03:26.030090 tx_last_pass[0][0][13] = 0
4496 11:03:26.032791 tx_win_center[0][0][14] = 0
4497 11:03:26.036360 tx_first_pass[0][0][14] = 0
4498 11:03:26.036485 tx_last_pass[0][0][14] = 0
4499 11:03:26.039746 tx_win_center[0][0][15] = 0
4500 11:03:26.042924 tx_first_pass[0][0][15] = 0
4501 11:03:26.045930 tx_last_pass[0][0][15] = 0
4502 11:03:26.046046 tx_win_center[0][1][0] = 0
4503 11:03:26.049510 tx_first_pass[0][1][0] = 0
4504 11:03:26.053041 tx_last_pass[0][1][0] = 0
4505 11:03:26.056122 tx_win_center[0][1][1] = 0
4506 11:03:26.056211 tx_first_pass[0][1][1] = 0
4507 11:03:26.059527 tx_last_pass[0][1][1] = 0
4508 11:03:26.062561 tx_win_center[0][1][2] = 0
4509 11:03:26.066580 tx_first_pass[0][1][2] = 0
4510 11:03:26.066672 tx_last_pass[0][1][2] = 0
4511 11:03:26.069642 tx_win_center[0][1][3] = 0
4512 11:03:26.073079 tx_first_pass[0][1][3] = 0
4513 11:03:26.073166 tx_last_pass[0][1][3] = 0
4514 11:03:26.076029 tx_win_center[0][1][4] = 0
4515 11:03:26.079589 tx_first_pass[0][1][4] = 0
4516 11:03:26.082694 tx_last_pass[0][1][4] = 0
4517 11:03:26.082786 tx_win_center[0][1][5] = 0
4518 11:03:26.085950 tx_first_pass[0][1][5] = 0
4519 11:03:26.089733 tx_last_pass[0][1][5] = 0
4520 11:03:26.092539 tx_win_center[0][1][6] = 0
4521 11:03:26.092629 tx_first_pass[0][1][6] = 0
4522 11:03:26.096435 tx_last_pass[0][1][6] = 0
4523 11:03:26.099750 tx_win_center[0][1][7] = 0
4524 11:03:26.099837 tx_first_pass[0][1][7] = 0
4525 11:03:26.102943 tx_last_pass[0][1][7] = 0
4526 11:03:26.106891 tx_win_center[0][1][8] = 0
4527 11:03:26.109618 tx_first_pass[0][1][8] = 0
4528 11:03:26.109709 tx_last_pass[0][1][8] = 0
4529 11:03:26.112603 tx_win_center[0][1][9] = 0
4530 11:03:26.115776 tx_first_pass[0][1][9] = 0
4531 11:03:26.119164 tx_last_pass[0][1][9] = 0
4532 11:03:26.119252 tx_win_center[0][1][10] = 0
4533 11:03:26.122819 tx_first_pass[0][1][10] = 0
4534 11:03:26.126167 tx_last_pass[0][1][10] = 0
4535 11:03:26.129326 tx_win_center[0][1][11] = 0
4536 11:03:26.129419 tx_first_pass[0][1][11] = 0
4537 11:03:26.132524 tx_last_pass[0][1][11] = 0
4538 11:03:26.135909 tx_win_center[0][1][12] = 0
4539 11:03:26.139187 tx_first_pass[0][1][12] = 0
4540 11:03:26.139274 tx_last_pass[0][1][12] = 0
4541 11:03:26.142890 tx_win_center[0][1][13] = 0
4542 11:03:26.146128 tx_first_pass[0][1][13] = 0
4543 11:03:26.149272 tx_last_pass[0][1][13] = 0
4544 11:03:26.149359 tx_win_center[0][1][14] = 0
4545 11:03:26.152646 tx_first_pass[0][1][14] = 0
4546 11:03:26.156003 tx_last_pass[0][1][14] = 0
4547 11:03:26.159059 tx_win_center[0][1][15] = 0
4548 11:03:26.159147 tx_first_pass[0][1][15] = 0
4549 11:03:26.162656 tx_last_pass[0][1][15] = 0
4550 11:03:26.166170 tx_win_center[1][0][0] = 0
4551 11:03:26.169292 tx_first_pass[1][0][0] = 0
4552 11:03:26.169384 tx_last_pass[1][0][0] = 0
4553 11:03:26.172493 tx_win_center[1][0][1] = 0
4554 11:03:26.175776 tx_first_pass[1][0][1] = 0
4555 11:03:26.175865 tx_last_pass[1][0][1] = 0
4556 11:03:26.179510 tx_win_center[1][0][2] = 0
4557 11:03:26.182642 tx_first_pass[1][0][2] = 0
4558 11:03:26.185775 tx_last_pass[1][0][2] = 0
4559 11:03:26.185865 tx_win_center[1][0][3] = 0
4560 11:03:26.189245 tx_first_pass[1][0][3] = 0
4561 11:03:26.192504 tx_last_pass[1][0][3] = 0
4562 11:03:26.192593 tx_win_center[1][0][4] = 0
4563 11:03:26.195899 tx_first_pass[1][0][4] = 0
4564 11:03:26.199200 tx_last_pass[1][0][4] = 0
4565 11:03:26.202477 tx_win_center[1][0][5] = 0
4566 11:03:26.202568 tx_first_pass[1][0][5] = 0
4567 11:03:26.205746 tx_last_pass[1][0][5] = 0
4568 11:03:26.208970 tx_win_center[1][0][6] = 0
4569 11:03:26.212606 tx_first_pass[1][0][6] = 0
4570 11:03:26.212700 tx_last_pass[1][0][6] = 0
4571 11:03:26.216111 tx_win_center[1][0][7] = 0
4572 11:03:26.219102 tx_first_pass[1][0][7] = 0
4573 11:03:26.219192 tx_last_pass[1][0][7] = 0
4574 11:03:26.222672 tx_win_center[1][0][8] = 0
4575 11:03:26.226046 tx_first_pass[1][0][8] = 0
4576 11:03:26.229335 tx_last_pass[1][0][8] = 0
4577 11:03:26.229423 tx_win_center[1][0][9] = 0
4578 11:03:26.232265 tx_first_pass[1][0][9] = 0
4579 11:03:26.235584 tx_last_pass[1][0][9] = 0
4580 11:03:26.238866 tx_win_center[1][0][10] = 0
4581 11:03:26.238956 tx_first_pass[1][0][10] = 0
4582 11:03:26.242161 tx_last_pass[1][0][10] = 0
4583 11:03:26.245532 tx_win_center[1][0][11] = 0
4584 11:03:26.249170 tx_first_pass[1][0][11] = 0
4585 11:03:26.249260 tx_last_pass[1][0][11] = 0
4586 11:03:26.252285 tx_win_center[1][0][12] = 0
4587 11:03:26.255580 tx_first_pass[1][0][12] = 0
4588 11:03:26.258933 tx_last_pass[1][0][12] = 0
4589 11:03:26.259021 tx_win_center[1][0][13] = 0
4590 11:03:26.262294 tx_first_pass[1][0][13] = 0
4591 11:03:26.265527 tx_last_pass[1][0][13] = 0
4592 11:03:26.269019 tx_win_center[1][0][14] = 0
4593 11:03:26.269126 tx_first_pass[1][0][14] = 0
4594 11:03:26.272193 tx_last_pass[1][0][14] = 0
4595 11:03:26.275402 tx_win_center[1][0][15] = 0
4596 11:03:26.279215 tx_first_pass[1][0][15] = 0
4597 11:03:26.279304 tx_last_pass[1][0][15] = 0
4598 11:03:26.282430 tx_win_center[1][1][0] = 0
4599 11:03:26.285661 tx_first_pass[1][1][0] = 0
4600 11:03:26.289151 tx_last_pass[1][1][0] = 0
4601 11:03:26.289240 tx_win_center[1][1][1] = 0
4602 11:03:26.292333 tx_first_pass[1][1][1] = 0
4603 11:03:26.295373 tx_last_pass[1][1][1] = 0
4604 11:03:26.295459 tx_win_center[1][1][2] = 0
4605 11:03:26.298960 tx_first_pass[1][1][2] = 0
4606 11:03:26.302074 tx_last_pass[1][1][2] = 0
4607 11:03:26.305451 tx_win_center[1][1][3] = 0
4608 11:03:26.305542 tx_first_pass[1][1][3] = 0
4609 11:03:26.308761 tx_last_pass[1][1][3] = 0
4610 11:03:26.312247 tx_win_center[1][1][4] = 0
4611 11:03:26.315442 tx_first_pass[1][1][4] = 0
4612 11:03:26.315533 tx_last_pass[1][1][4] = 0
4613 11:03:26.318852 tx_win_center[1][1][5] = 0
4614 11:03:26.322019 tx_first_pass[1][1][5] = 0
4615 11:03:26.322106 tx_last_pass[1][1][5] = 0
4616 11:03:26.325418 tx_win_center[1][1][6] = 0
4617 11:03:26.328831 tx_first_pass[1][1][6] = 0
4618 11:03:26.332596 tx_last_pass[1][1][6] = 0
4619 11:03:26.332712 tx_win_center[1][1][7] = 0
4620 11:03:26.335260 tx_first_pass[1][1][7] = 0
4621 11:03:26.338651 tx_last_pass[1][1][7] = 0
4622 11:03:26.342020 tx_win_center[1][1][8] = 0
4623 11:03:26.342108 tx_first_pass[1][1][8] = 0
4624 11:03:26.345230 tx_last_pass[1][1][8] = 0
4625 11:03:26.348663 tx_win_center[1][1][9] = 0
4626 11:03:26.348750 tx_first_pass[1][1][9] = 0
4627 11:03:26.352052 tx_last_pass[1][1][9] = 0
4628 11:03:26.355161 tx_win_center[1][1][10] = 0
4629 11:03:26.358489 tx_first_pass[1][1][10] = 0
4630 11:03:26.358580 tx_last_pass[1][1][10] = 0
4631 11:03:26.362160 tx_win_center[1][1][11] = 0
4632 11:03:26.365247 tx_first_pass[1][1][11] = 0
4633 11:03:26.368635 tx_last_pass[1][1][11] = 0
4634 11:03:26.368726 tx_win_center[1][1][12] = 0
4635 11:03:26.371845 tx_first_pass[1][1][12] = 0
4636 11:03:26.375021 tx_last_pass[1][1][12] = 0
4637 11:03:26.378433 tx_win_center[1][1][13] = 0
4638 11:03:26.378524 tx_first_pass[1][1][13] = 0
4639 11:03:26.381759 tx_last_pass[1][1][13] = 0
4640 11:03:26.385117 tx_win_center[1][1][14] = 0
4641 11:03:26.388830 tx_first_pass[1][1][14] = 0
4642 11:03:26.388919 tx_last_pass[1][1][14] = 0
4643 11:03:26.391841 tx_win_center[1][1][15] = 0
4644 11:03:26.395118 tx_first_pass[1][1][15] = 0
4645 11:03:26.399041 tx_last_pass[1][1][15] = 0
4646 11:03:26.399132 dump params rx window
4647 11:03:26.401668 rx_firspass[0][0][0] = 0
4648 11:03:26.405135 rx_lastpass[0][0][0] = 0
4649 11:03:26.405226 rx_firspass[0][0][1] = 0
4650 11:03:26.408437 rx_lastpass[0][0][1] = 0
4651 11:03:26.411584 rx_firspass[0][0][2] = 0
4652 11:03:26.411675 rx_lastpass[0][0][2] = 0
4653 11:03:26.415389 rx_firspass[0][0][3] = 0
4654 11:03:26.418547 rx_lastpass[0][0][3] = 0
4655 11:03:26.418634 rx_firspass[0][0][4] = 0
4656 11:03:26.421810 rx_lastpass[0][0][4] = 0
4657 11:03:26.425192 rx_firspass[0][0][5] = 0
4658 11:03:26.425280 rx_lastpass[0][0][5] = 0
4659 11:03:26.428766 rx_firspass[0][0][6] = 0
4660 11:03:26.432291 rx_lastpass[0][0][6] = 0
4661 11:03:26.435257 rx_firspass[0][0][7] = 0
4662 11:03:26.435346 rx_lastpass[0][0][7] = 0
4663 11:03:26.438534 rx_firspass[0][0][8] = 0
4664 11:03:26.442011 rx_lastpass[0][0][8] = 0
4665 11:03:26.442099 rx_firspass[0][0][9] = 0
4666 11:03:26.445186 rx_lastpass[0][0][9] = 0
4667 11:03:26.448396 rx_firspass[0][0][10] = 0
4668 11:03:26.448495 rx_lastpass[0][0][10] = 0
4669 11:03:26.451886 rx_firspass[0][0][11] = 0
4670 11:03:26.455422 rx_lastpass[0][0][11] = 0
4671 11:03:26.458341 rx_firspass[0][0][12] = 0
4672 11:03:26.458429 rx_lastpass[0][0][12] = 0
4673 11:03:26.461604 rx_firspass[0][0][13] = 0
4674 11:03:26.465024 rx_lastpass[0][0][13] = 0
4675 11:03:26.465113 rx_firspass[0][0][14] = 0
4676 11:03:26.468229 rx_lastpass[0][0][14] = 0
4677 11:03:26.471802 rx_firspass[0][0][15] = 0
4678 11:03:26.475284 rx_lastpass[0][0][15] = 0
4679 11:03:26.475373 rx_firspass[0][1][0] = 0
4680 11:03:26.478403 rx_lastpass[0][1][0] = 0
4681 11:03:26.481642 rx_firspass[0][1][1] = 0
4682 11:03:26.481734 rx_lastpass[0][1][1] = 0
4683 11:03:26.484644 rx_firspass[0][1][2] = 0
4684 11:03:26.487926 rx_lastpass[0][1][2] = 0
4685 11:03:26.488014 rx_firspass[0][1][3] = 0
4686 11:03:26.491468 rx_lastpass[0][1][3] = 0
4687 11:03:26.494897 rx_firspass[0][1][4] = 0
4688 11:03:26.494988 rx_lastpass[0][1][4] = 0
4689 11:03:26.498414 rx_firspass[0][1][5] = 0
4690 11:03:26.501712 rx_lastpass[0][1][5] = 0
4691 11:03:26.505070 rx_firspass[0][1][6] = 0
4692 11:03:26.505160 rx_lastpass[0][1][6] = 0
4693 11:03:26.508143 rx_firspass[0][1][7] = 0
4694 11:03:26.511376 rx_lastpass[0][1][7] = 0
4695 11:03:26.511466 rx_firspass[0][1][8] = 0
4696 11:03:26.514813 rx_lastpass[0][1][8] = 0
4697 11:03:26.518182 rx_firspass[0][1][9] = 0
4698 11:03:26.518271 rx_lastpass[0][1][9] = 0
4699 11:03:26.521556 rx_firspass[0][1][10] = 0
4700 11:03:26.524631 rx_lastpass[0][1][10] = 0
4701 11:03:26.524718 rx_firspass[0][1][11] = 0
4702 11:03:26.527860 rx_lastpass[0][1][11] = 0
4703 11:03:26.531856 rx_firspass[0][1][12] = 0
4704 11:03:26.534931 rx_lastpass[0][1][12] = 0
4705 11:03:26.535021 rx_firspass[0][1][13] = 0
4706 11:03:26.537859 rx_lastpass[0][1][13] = 0
4707 11:03:26.541156 rx_firspass[0][1][14] = 0
4708 11:03:26.541275 rx_lastpass[0][1][14] = 0
4709 11:03:26.544802 rx_firspass[0][1][15] = 0
4710 11:03:26.547997 rx_lastpass[0][1][15] = 0
4711 11:03:26.551158 rx_firspass[1][0][0] = 0
4712 11:03:26.551247 rx_lastpass[1][0][0] = 0
4713 11:03:26.554698 rx_firspass[1][0][1] = 0
4714 11:03:26.557990 rx_lastpass[1][0][1] = 0
4715 11:03:26.558105 rx_firspass[1][0][2] = 0
4716 11:03:26.561360 rx_lastpass[1][0][2] = 0
4717 11:03:26.564941 rx_firspass[1][0][3] = 0
4718 11:03:26.565030 rx_lastpass[1][0][3] = 0
4719 11:03:26.567836 rx_firspass[1][0][4] = 0
4720 11:03:26.571072 rx_lastpass[1][0][4] = 0
4721 11:03:26.571185 rx_firspass[1][0][5] = 0
4722 11:03:26.574403 rx_lastpass[1][0][5] = 0
4723 11:03:26.577920 rx_firspass[1][0][6] = 0
4724 11:03:26.581283 rx_lastpass[1][0][6] = 0
4725 11:03:26.581398 rx_firspass[1][0][7] = 0
4726 11:03:26.584594 rx_lastpass[1][0][7] = 0
4727 11:03:26.587755 rx_firspass[1][0][8] = 0
4728 11:03:26.587861 rx_lastpass[1][0][8] = 0
4729 11:03:26.591060 rx_firspass[1][0][9] = 0
4730 11:03:26.594454 rx_lastpass[1][0][9] = 0
4731 11:03:26.594568 rx_firspass[1][0][10] = 0
4732 11:03:26.597597 rx_lastpass[1][0][10] = 0
4733 11:03:26.600977 rx_firspass[1][0][11] = 0
4734 11:03:26.604188 rx_lastpass[1][0][11] = 0
4735 11:03:26.604297 rx_firspass[1][0][12] = 0
4736 11:03:26.607609 rx_lastpass[1][0][12] = 0
4737 11:03:26.611159 rx_firspass[1][0][13] = 0
4738 11:03:26.611282 rx_lastpass[1][0][13] = 0
4739 11:03:26.614287 rx_firspass[1][0][14] = 0
4740 11:03:26.617811 rx_lastpass[1][0][14] = 0
4741 11:03:26.617927 rx_firspass[1][0][15] = 0
4742 11:03:26.620953 rx_lastpass[1][0][15] = 0
4743 11:03:26.624359 rx_firspass[1][1][0] = 0
4744 11:03:26.627610 rx_lastpass[1][1][0] = 0
4745 11:03:26.627724 rx_firspass[1][1][1] = 0
4746 11:03:26.631197 rx_lastpass[1][1][1] = 0
4747 11:03:26.634360 rx_firspass[1][1][2] = 0
4748 11:03:26.634446 rx_lastpass[1][1][2] = 0
4749 11:03:26.637761 rx_firspass[1][1][3] = 0
4750 11:03:26.640798 rx_lastpass[1][1][3] = 0
4751 11:03:26.640914 rx_firspass[1][1][4] = 0
4752 11:03:26.644016 rx_lastpass[1][1][4] = 0
4753 11:03:26.647506 rx_firspass[1][1][5] = 0
4754 11:03:26.647612 rx_lastpass[1][1][5] = 0
4755 11:03:26.650911 rx_firspass[1][1][6] = 0
4756 11:03:26.654343 rx_lastpass[1][1][6] = 0
4757 11:03:26.657377 rx_firspass[1][1][7] = 0
4758 11:03:26.657487 rx_lastpass[1][1][7] = 0
4759 11:03:26.660948 rx_firspass[1][1][8] = 0
4760 11:03:26.663977 rx_lastpass[1][1][8] = 0
4761 11:03:26.664082 rx_firspass[1][1][9] = 0
4762 11:03:26.667728 rx_lastpass[1][1][9] = 0
4763 11:03:26.671015 rx_firspass[1][1][10] = 0
4764 11:03:26.671123 rx_lastpass[1][1][10] = 0
4765 11:03:26.674142 rx_firspass[1][1][11] = 0
4766 11:03:26.677506 rx_lastpass[1][1][11] = 0
4767 11:03:26.680506 rx_firspass[1][1][12] = 0
4768 11:03:26.680613 rx_lastpass[1][1][12] = 0
4769 11:03:26.683811 rx_firspass[1][1][13] = 0
4770 11:03:26.687114 rx_lastpass[1][1][13] = 0
4771 11:03:26.687219 rx_firspass[1][1][14] = 0
4772 11:03:26.690712 rx_lastpass[1][1][14] = 0
4773 11:03:26.693957 rx_firspass[1][1][15] = 0
4774 11:03:26.697036 rx_lastpass[1][1][15] = 0
4775 11:03:26.697142 dump params clk_delay
4776 11:03:26.700737 clk_delay[0] = 0
4777 11:03:26.700850 clk_delay[1] = 0
4778 11:03:26.704106 dump params dqs_delay
4779 11:03:26.704191 dqs_delay[0][0] = 0
4780 11:03:26.707277 dqs_delay[0][1] = 0
4781 11:03:26.707364 dqs_delay[1][0] = 0
4782 11:03:26.710602 dqs_delay[1][1] = 0
4783 11:03:26.714310 dump params delay_cell_unit = 735
4784 11:03:26.714418 dump source = 0x0
4785 11:03:26.717073 dump params frequency:800
4786 11:03:26.720566 dump params rank number:2
4787 11:03:26.720657
4788 11:03:26.720723 dump params write leveling
4789 11:03:26.724007 write leveling[0][0][0] = 0x0
4790 11:03:26.727196 write leveling[0][0][1] = 0x0
4791 11:03:26.730556 write leveling[0][1][0] = 0x0
4792 11:03:26.733837 write leveling[0][1][1] = 0x0
4793 11:03:26.733955 write leveling[1][0][0] = 0x0
4794 11:03:26.737295 write leveling[1][0][1] = 0x0
4795 11:03:26.741000 write leveling[1][1][0] = 0x0
4796 11:03:26.743902 write leveling[1][1][1] = 0x0
4797 11:03:26.744014 dump params cbt_cs
4798 11:03:26.747099 cbt_cs[0][0] = 0x0
4799 11:03:26.747206 cbt_cs[0][1] = 0x0
4800 11:03:26.750741 cbt_cs[1][0] = 0x0
4801 11:03:26.750828 cbt_cs[1][1] = 0x0
4802 11:03:26.753982 dump params cbt_mr12
4803 11:03:26.757266 cbt_mr12[0][0] = 0x0
4804 11:03:26.757376 cbt_mr12[0][1] = 0x0
4805 11:03:26.760717 cbt_mr12[1][0] = 0x0
4806 11:03:26.760821 cbt_mr12[1][1] = 0x0
4807 11:03:26.763803 dump params tx window
4808 11:03:26.767132 tx_center_min[0][0][0] = 0
4809 11:03:26.767238 tx_center_max[0][0][0] = 0
4810 11:03:26.770913 tx_center_min[0][0][1] = 0
4811 11:03:26.773995 tx_center_max[0][0][1] = 0
4812 11:03:26.777376 tx_center_min[0][1][0] = 0
4813 11:03:26.777480 tx_center_max[0][1][0] = 0
4814 11:03:26.781320 tx_center_min[0][1][1] = 0
4815 11:03:26.783958 tx_center_max[0][1][1] = 0
4816 11:03:26.784064 tx_center_min[1][0][0] = 0
4817 11:03:26.787246 tx_center_max[1][0][0] = 0
4818 11:03:26.790790 tx_center_min[1][0][1] = 0
4819 11:03:26.793855 tx_center_max[1][0][1] = 0
4820 11:03:26.793960 tx_center_min[1][1][0] = 0
4821 11:03:26.797275 tx_center_max[1][1][0] = 0
4822 11:03:26.800510 tx_center_min[1][1][1] = 0
4823 11:03:26.803739 tx_center_max[1][1][1] = 0
4824 11:03:26.803851 dump params tx window
4825 11:03:26.807560 tx_win_center[0][0][0] = 0
4826 11:03:26.810860 tx_first_pass[0][0][0] = 0
4827 11:03:26.810951 tx_last_pass[0][0][0] = 0
4828 11:03:26.814108 tx_win_center[0][0][1] = 0
4829 11:03:26.817381 tx_first_pass[0][0][1] = 0
4830 11:03:26.820657 tx_last_pass[0][0][1] = 0
4831 11:03:26.820745 tx_win_center[0][0][2] = 0
4832 11:03:26.823731 tx_first_pass[0][0][2] = 0
4833 11:03:26.827515 tx_last_pass[0][0][2] = 0
4834 11:03:26.827604 tx_win_center[0][0][3] = 0
4835 11:03:26.830621 tx_first_pass[0][0][3] = 0
4836 11:03:26.833774 tx_last_pass[0][0][3] = 0
4837 11:03:26.837260 tx_win_center[0][0][4] = 0
4838 11:03:26.837351 tx_first_pass[0][0][4] = 0
4839 11:03:26.840557 tx_last_pass[0][0][4] = 0
4840 11:03:26.843912 tx_win_center[0][0][5] = 0
4841 11:03:26.847495 tx_first_pass[0][0][5] = 0
4842 11:03:26.847584 tx_last_pass[0][0][5] = 0
4843 11:03:26.850513 tx_win_center[0][0][6] = 0
4844 11:03:26.854215 tx_first_pass[0][0][6] = 0
4845 11:03:26.854335 tx_last_pass[0][0][6] = 0
4846 11:03:26.857279 tx_win_center[0][0][7] = 0
4847 11:03:26.860538 tx_first_pass[0][0][7] = 0
4848 11:03:26.864115 tx_last_pass[0][0][7] = 0
4849 11:03:26.864230 tx_win_center[0][0][8] = 0
4850 11:03:26.867559 tx_first_pass[0][0][8] = 0
4851 11:03:26.870784 tx_last_pass[0][0][8] = 0
4852 11:03:26.870880 tx_win_center[0][0][9] = 0
4853 11:03:26.873882 tx_first_pass[0][0][9] = 0
4854 11:03:26.877116 tx_last_pass[0][0][9] = 0
4855 11:03:26.880627 tx_win_center[0][0][10] = 0
4856 11:03:26.880754 tx_first_pass[0][0][10] = 0
4857 11:03:26.884246 tx_last_pass[0][0][10] = 0
4858 11:03:26.887431 tx_win_center[0][0][11] = 0
4859 11:03:26.890787 tx_first_pass[0][0][11] = 0
4860 11:03:26.890881 tx_last_pass[0][0][11] = 0
4861 11:03:26.893923 tx_win_center[0][0][12] = 0
4862 11:03:26.897078 tx_first_pass[0][0][12] = 0
4863 11:03:26.900778 tx_last_pass[0][0][12] = 0
4864 11:03:26.900871 tx_win_center[0][0][13] = 0
4865 11:03:26.903933 tx_first_pass[0][0][13] = 0
4866 11:03:26.907490 tx_last_pass[0][0][13] = 0
4867 11:03:26.910478 tx_win_center[0][0][14] = 0
4868 11:03:26.913779 tx_first_pass[0][0][14] = 0
4869 11:03:26.913876 tx_last_pass[0][0][14] = 0
4870 11:03:26.917019 tx_win_center[0][0][15] = 0
4871 11:03:26.920228 tx_first_pass[0][0][15] = 0
4872 11:03:26.920316 tx_last_pass[0][0][15] = 0
4873 11:03:26.923881 tx_win_center[0][1][0] = 0
4874 11:03:26.927059 tx_first_pass[0][1][0] = 0
4875 11:03:26.930399 tx_last_pass[0][1][0] = 0
4876 11:03:26.930487 tx_win_center[0][1][1] = 0
4877 11:03:26.933731 tx_first_pass[0][1][1] = 0
4878 11:03:26.937260 tx_last_pass[0][1][1] = 0
4879 11:03:26.940269 tx_win_center[0][1][2] = 0
4880 11:03:26.940356 tx_first_pass[0][1][2] = 0
4881 11:03:26.943795 tx_last_pass[0][1][2] = 0
4882 11:03:26.947424 tx_win_center[0][1][3] = 0
4883 11:03:26.947515 tx_first_pass[0][1][3] = 0
4884 11:03:26.950483 tx_last_pass[0][1][3] = 0
4885 11:03:26.953536 tx_win_center[0][1][4] = 0
4886 11:03:26.956903 tx_first_pass[0][1][4] = 0
4887 11:03:26.957009 tx_last_pass[0][1][4] = 0
4888 11:03:26.960526 tx_win_center[0][1][5] = 0
4889 11:03:26.963808 tx_first_pass[0][1][5] = 0
4890 11:03:26.967092 tx_last_pass[0][1][5] = 0
4891 11:03:26.967181 tx_win_center[0][1][6] = 0
4892 11:03:26.970091 tx_first_pass[0][1][6] = 0
4893 11:03:26.973671 tx_last_pass[0][1][6] = 0
4894 11:03:26.973758 tx_win_center[0][1][7] = 0
4895 11:03:26.977052 tx_first_pass[0][1][7] = 0
4896 11:03:26.980553 tx_last_pass[0][1][7] = 0
4897 11:03:26.983683 tx_win_center[0][1][8] = 0
4898 11:03:26.983771 tx_first_pass[0][1][8] = 0
4899 11:03:26.986669 tx_last_pass[0][1][8] = 0
4900 11:03:26.990375 tx_win_center[0][1][9] = 0
4901 11:03:26.993468 tx_first_pass[0][1][9] = 0
4902 11:03:26.993559 tx_last_pass[0][1][9] = 0
4903 11:03:26.996763 tx_win_center[0][1][10] = 0
4904 11:03:26.999966 tx_first_pass[0][1][10] = 0
4905 11:03:27.003699 tx_last_pass[0][1][10] = 0
4906 11:03:27.003791 tx_win_center[0][1][11] = 0
4907 11:03:27.007185 tx_first_pass[0][1][11] = 0
4908 11:03:27.010141 tx_last_pass[0][1][11] = 0
4909 11:03:27.013418 tx_win_center[0][1][12] = 0
4910 11:03:27.013538 tx_first_pass[0][1][12] = 0
4911 11:03:27.016683 tx_last_pass[0][1][12] = 0
4912 11:03:27.020166 tx_win_center[0][1][13] = 0
4913 11:03:27.023671 tx_first_pass[0][1][13] = 0
4914 11:03:27.023762 tx_last_pass[0][1][13] = 0
4915 11:03:27.026974 tx_win_center[0][1][14] = 0
4916 11:03:27.030145 tx_first_pass[0][1][14] = 0
4917 11:03:27.033426 tx_last_pass[0][1][14] = 0
4918 11:03:27.033515 tx_win_center[0][1][15] = 0
4919 11:03:27.036560 tx_first_pass[0][1][15] = 0
4920 11:03:27.040314 tx_last_pass[0][1][15] = 0
4921 11:03:27.040404 tx_win_center[1][0][0] = 0
4922 11:03:27.043936 tx_first_pass[1][0][0] = 0
4923 11:03:27.047056 tx_last_pass[1][0][0] = 0
4924 11:03:27.049937 tx_win_center[1][0][1] = 0
4925 11:03:27.050026 tx_first_pass[1][0][1] = 0
4926 11:03:27.053495 tx_last_pass[1][0][1] = 0
4927 11:03:27.056713 tx_win_center[1][0][2] = 0
4928 11:03:27.060332 tx_first_pass[1][0][2] = 0
4929 11:03:27.060449 tx_last_pass[1][0][2] = 0
4930 11:03:27.063408 tx_win_center[1][0][3] = 0
4931 11:03:27.066819 tx_first_pass[1][0][3] = 0
4932 11:03:27.070029 tx_last_pass[1][0][3] = 0
4933 11:03:27.070118 tx_win_center[1][0][4] = 0
4934 11:03:27.073320 tx_first_pass[1][0][4] = 0
4935 11:03:27.077038 tx_last_pass[1][0][4] = 0
4936 11:03:27.077127 tx_win_center[1][0][5] = 0
4937 11:03:27.080559 tx_first_pass[1][0][5] = 0
4938 11:03:27.083371 tx_last_pass[1][0][5] = 0
4939 11:03:27.087286 tx_win_center[1][0][6] = 0
4940 11:03:27.087407 tx_first_pass[1][0][6] = 0
4941 11:03:27.090019 tx_last_pass[1][0][6] = 0
4942 11:03:27.093847 tx_win_center[1][0][7] = 0
4943 11:03:27.093937 tx_first_pass[1][0][7] = 0
4944 11:03:27.096683 tx_last_pass[1][0][7] = 0
4945 11:03:27.100214 tx_win_center[1][0][8] = 0
4946 11:03:27.103547 tx_first_pass[1][0][8] = 0
4947 11:03:27.103635 tx_last_pass[1][0][8] = 0
4948 11:03:27.106956 tx_win_center[1][0][9] = 0
4949 11:03:27.110015 tx_first_pass[1][0][9] = 0
4950 11:03:27.113238 tx_last_pass[1][0][9] = 0
4951 11:03:27.113331 tx_win_center[1][0][10] = 0
4952 11:03:27.116647 tx_first_pass[1][0][10] = 0
4953 11:03:27.119787 tx_last_pass[1][0][10] = 0
4954 11:03:27.123131 tx_win_center[1][0][11] = 0
4955 11:03:27.123249 tx_first_pass[1][0][11] = 0
4956 11:03:27.126488 tx_last_pass[1][0][11] = 0
4957 11:03:27.130271 tx_win_center[1][0][12] = 0
4958 11:03:27.133193 tx_first_pass[1][0][12] = 0
4959 11:03:27.133280 tx_last_pass[1][0][12] = 0
4960 11:03:27.136670 tx_win_center[1][0][13] = 0
4961 11:03:27.140303 tx_first_pass[1][0][13] = 0
4962 11:03:27.143774 tx_last_pass[1][0][13] = 0
4963 11:03:27.143863 tx_win_center[1][0][14] = 0
4964 11:03:27.146524 tx_first_pass[1][0][14] = 0
4965 11:03:27.149686 tx_last_pass[1][0][14] = 0
4966 11:03:27.153521 tx_win_center[1][0][15] = 0
4967 11:03:27.153610 tx_first_pass[1][0][15] = 0
4968 11:03:27.156627 tx_last_pass[1][0][15] = 0
4969 11:03:27.160046 tx_win_center[1][1][0] = 0
4970 11:03:27.163829 tx_first_pass[1][1][0] = 0
4971 11:03:27.163918 tx_last_pass[1][1][0] = 0
4972 11:03:27.166609 tx_win_center[1][1][1] = 0
4973 11:03:27.169998 tx_first_pass[1][1][1] = 0
4974 11:03:27.170086 tx_last_pass[1][1][1] = 0
4975 11:03:27.173318 tx_win_center[1][1][2] = 0
4976 11:03:27.176999 tx_first_pass[1][1][2] = 0
4977 11:03:27.180157 tx_last_pass[1][1][2] = 0
4978 11:03:27.180244 tx_win_center[1][1][3] = 0
4979 11:03:27.183331 tx_first_pass[1][1][3] = 0
4980 11:03:27.186775 tx_last_pass[1][1][3] = 0
4981 11:03:27.186882 tx_win_center[1][1][4] = 0
4982 11:03:27.190038 tx_first_pass[1][1][4] = 0
4983 11:03:27.193070 tx_last_pass[1][1][4] = 0
4984 11:03:27.196383 tx_win_center[1][1][5] = 0
4985 11:03:27.196503 tx_first_pass[1][1][5] = 0
4986 11:03:27.200090 tx_last_pass[1][1][5] = 0
4987 11:03:27.203089 tx_win_center[1][1][6] = 0
4988 11:03:27.207006 tx_first_pass[1][1][6] = 0
4989 11:03:27.207107 tx_last_pass[1][1][6] = 0
4990 11:03:27.210058 tx_win_center[1][1][7] = 0
4991 11:03:27.213362 tx_first_pass[1][1][7] = 0
4992 11:03:27.213455 tx_last_pass[1][1][7] = 0
4993 11:03:27.216640 tx_win_center[1][1][8] = 0
4994 11:03:27.219928 tx_first_pass[1][1][8] = 0
4995 11:03:27.223363 tx_last_pass[1][1][8] = 0
4996 11:03:27.223452 tx_win_center[1][1][9] = 0
4997 11:03:27.226382 tx_first_pass[1][1][9] = 0
4998 11:03:27.230167 tx_last_pass[1][1][9] = 0
4999 11:03:27.233021 tx_win_center[1][1][10] = 0
5000 11:03:27.233109 tx_first_pass[1][1][10] = 0
5001 11:03:27.236327 tx_last_pass[1][1][10] = 0
5002 11:03:27.239774 tx_win_center[1][1][11] = 0
5003 11:03:27.243213 tx_first_pass[1][1][11] = 0
5004 11:03:27.243338 tx_last_pass[1][1][11] = 0
5005 11:03:27.246305 tx_win_center[1][1][12] = 0
5006 11:03:27.249985 tx_first_pass[1][1][12] = 0
5007 11:03:27.253214 tx_last_pass[1][1][12] = 0
5008 11:03:27.253303 tx_win_center[1][1][13] = 0
5009 11:03:27.256580 tx_first_pass[1][1][13] = 0
5010 11:03:27.259687 tx_last_pass[1][1][13] = 0
5011 11:03:27.263159 tx_win_center[1][1][14] = 0
5012 11:03:27.263247 tx_first_pass[1][1][14] = 0
5013 11:03:27.266781 tx_last_pass[1][1][14] = 0
5014 11:03:27.269845 tx_win_center[1][1][15] = 0
5015 11:03:27.273275 tx_first_pass[1][1][15] = 0
5016 11:03:27.273366 tx_last_pass[1][1][15] = 0
5017 11:03:27.276547 dump params rx window
5018 11:03:27.279784 rx_firspass[0][0][0] = 0
5019 11:03:27.279871 rx_lastpass[0][0][0] = 0
5020 11:03:27.282989 rx_firspass[0][0][1] = 0
5021 11:03:27.286738 rx_lastpass[0][0][1] = 0
5022 11:03:27.286828 rx_firspass[0][0][2] = 0
5023 11:03:27.289771 rx_lastpass[0][0][2] = 0
5024 11:03:27.293357 rx_firspass[0][0][3] = 0
5025 11:03:27.293446 rx_lastpass[0][0][3] = 0
5026 11:03:27.296279 rx_firspass[0][0][4] = 0
5027 11:03:27.299423 rx_lastpass[0][0][4] = 0
5028 11:03:27.299510 rx_firspass[0][0][5] = 0
5029 11:03:27.302801 rx_lastpass[0][0][5] = 0
5030 11:03:27.306256 rx_firspass[0][0][6] = 0
5031 11:03:27.310044 rx_lastpass[0][0][6] = 0
5032 11:03:27.310134 rx_firspass[0][0][7] = 0
5033 11:03:27.313154 rx_lastpass[0][0][7] = 0
5034 11:03:27.316222 rx_firspass[0][0][8] = 0
5035 11:03:27.316310 rx_lastpass[0][0][8] = 0
5036 11:03:27.319472 rx_firspass[0][0][9] = 0
5037 11:03:27.323277 rx_lastpass[0][0][9] = 0
5038 11:03:27.323365 rx_firspass[0][0][10] = 0
5039 11:03:27.326433 rx_lastpass[0][0][10] = 0
5040 11:03:27.329489 rx_firspass[0][0][11] = 0
5041 11:03:27.332801 rx_lastpass[0][0][11] = 0
5042 11:03:27.332890 rx_firspass[0][0][12] = 0
5043 11:03:27.336103 rx_lastpass[0][0][12] = 0
5044 11:03:27.339247 rx_firspass[0][0][13] = 0
5045 11:03:27.339333 rx_lastpass[0][0][13] = 0
5046 11:03:27.343071 rx_firspass[0][0][14] = 0
5047 11:03:27.346408 rx_lastpass[0][0][14] = 0
5048 11:03:27.349639 rx_firspass[0][0][15] = 0
5049 11:03:27.349728 rx_lastpass[0][0][15] = 0
5050 11:03:27.352657 rx_firspass[0][1][0] = 0
5051 11:03:27.356289 rx_lastpass[0][1][0] = 0
5052 11:03:27.356377 rx_firspass[0][1][1] = 0
5053 11:03:27.359396 rx_lastpass[0][1][1] = 0
5054 11:03:27.362585 rx_firspass[0][1][2] = 0
5055 11:03:27.362673 rx_lastpass[0][1][2] = 0
5056 11:03:27.366030 rx_firspass[0][1][3] = 0
5057 11:03:27.369207 rx_lastpass[0][1][3] = 0
5058 11:03:27.369296 rx_firspass[0][1][4] = 0
5059 11:03:27.372748 rx_lastpass[0][1][4] = 0
5060 11:03:27.376253 rx_firspass[0][1][5] = 0
5061 11:03:27.376341 rx_lastpass[0][1][5] = 0
5062 11:03:27.379307 rx_firspass[0][1][6] = 0
5063 11:03:27.383121 rx_lastpass[0][1][6] = 0
5064 11:03:27.386375 rx_firspass[0][1][7] = 0
5065 11:03:27.386469 rx_lastpass[0][1][7] = 0
5066 11:03:27.389580 rx_firspass[0][1][8] = 0
5067 11:03:27.392702 rx_lastpass[0][1][8] = 0
5068 11:03:27.392789 rx_firspass[0][1][9] = 0
5069 11:03:27.396133 rx_lastpass[0][1][9] = 0
5070 11:03:27.399557 rx_firspass[0][1][10] = 0
5071 11:03:27.399645 rx_lastpass[0][1][10] = 0
5072 11:03:27.402796 rx_firspass[0][1][11] = 0
5073 11:03:27.406064 rx_lastpass[0][1][11] = 0
5074 11:03:27.409422 rx_firspass[0][1][12] = 0
5075 11:03:27.409511 rx_lastpass[0][1][12] = 0
5076 11:03:27.413045 rx_firspass[0][1][13] = 0
5077 11:03:27.416147 rx_lastpass[0][1][13] = 0
5078 11:03:27.416235 rx_firspass[0][1][14] = 0
5079 11:03:27.419195 rx_lastpass[0][1][14] = 0
5080 11:03:27.422590 rx_firspass[0][1][15] = 0
5081 11:03:27.422677 rx_lastpass[0][1][15] = 0
5082 11:03:27.426142 rx_firspass[1][0][0] = 0
5083 11:03:27.429364 rx_lastpass[1][0][0] = 0
5084 11:03:27.432669 rx_firspass[1][0][1] = 0
5085 11:03:27.432755 rx_lastpass[1][0][1] = 0
5086 11:03:27.435783 rx_firspass[1][0][2] = 0
5087 11:03:27.439429 rx_lastpass[1][0][2] = 0
5088 11:03:27.439517 rx_firspass[1][0][3] = 0
5089 11:03:27.442522 rx_lastpass[1][0][3] = 0
5090 11:03:27.446259 rx_firspass[1][0][4] = 0
5091 11:03:27.446348 rx_lastpass[1][0][4] = 0
5092 11:03:27.449534 rx_firspass[1][0][5] = 0
5093 11:03:27.452692 rx_lastpass[1][0][5] = 0
5094 11:03:27.452779 rx_firspass[1][0][6] = 0
5095 11:03:27.456168 rx_lastpass[1][0][6] = 0
5096 11:03:27.459385 rx_firspass[1][0][7] = 0
5097 11:03:27.459471 rx_lastpass[1][0][7] = 0
5098 11:03:27.462860 rx_firspass[1][0][8] = 0
5099 11:03:27.465711 rx_lastpass[1][0][8] = 0
5100 11:03:27.469249 rx_firspass[1][0][9] = 0
5101 11:03:27.469337 rx_lastpass[1][0][9] = 0
5102 11:03:27.472390 rx_firspass[1][0][10] = 0
5103 11:03:27.475686 rx_lastpass[1][0][10] = 0
5104 11:03:27.475774 rx_firspass[1][0][11] = 0
5105 11:03:27.479252 rx_lastpass[1][0][11] = 0
5106 11:03:27.483041 rx_firspass[1][0][12] = 0
5107 11:03:27.483159 rx_lastpass[1][0][12] = 0
5108 11:03:27.485840 rx_firspass[1][0][13] = 0
5109 11:03:27.489217 rx_lastpass[1][0][13] = 0
5110 11:03:27.492727 rx_firspass[1][0][14] = 0
5111 11:03:27.492825 rx_lastpass[1][0][14] = 0
5112 11:03:27.496428 rx_firspass[1][0][15] = 0
5113 11:03:27.499535 rx_lastpass[1][0][15] = 0
5114 11:03:27.499629 rx_firspass[1][1][0] = 0
5115 11:03:27.502692 rx_lastpass[1][1][0] = 0
5116 11:03:27.506080 rx_firspass[1][1][1] = 0
5117 11:03:27.506188 rx_lastpass[1][1][1] = 0
5118 11:03:27.509522 rx_firspass[1][1][2] = 0
5119 11:03:27.512978 rx_lastpass[1][1][2] = 0
5120 11:03:27.513071 rx_firspass[1][1][3] = 0
5121 11:03:27.516022 rx_lastpass[1][1][3] = 0
5122 11:03:27.519521 rx_firspass[1][1][4] = 0
5123 11:03:27.522972 rx_lastpass[1][1][4] = 0
5124 11:03:27.523062 rx_firspass[1][1][5] = 0
5125 11:03:27.526108 rx_lastpass[1][1][5] = 0
5126 11:03:27.529714 rx_firspass[1][1][6] = 0
5127 11:03:27.529805 rx_lastpass[1][1][6] = 0
5128 11:03:27.532874 rx_firspass[1][1][7] = 0
5129 11:03:27.536100 rx_lastpass[1][1][7] = 0
5130 11:03:27.536187 rx_firspass[1][1][8] = 0
5131 11:03:27.539379 rx_lastpass[1][1][8] = 0
5132 11:03:27.542637 rx_firspass[1][1][9] = 0
5133 11:03:27.542759 rx_lastpass[1][1][9] = 0
5134 11:03:27.546534 rx_firspass[1][1][10] = 0
5135 11:03:27.549620 rx_lastpass[1][1][10] = 0
5136 11:03:27.549715 rx_firspass[1][1][11] = 0
5137 11:03:27.552895 rx_lastpass[1][1][11] = 0
5138 11:03:27.556019 rx_firspass[1][1][12] = 0
5139 11:03:27.559694 rx_lastpass[1][1][12] = 0
5140 11:03:27.559784 rx_firspass[1][1][13] = 0
5141 11:03:27.563096 rx_lastpass[1][1][13] = 0
5142 11:03:27.566081 rx_firspass[1][1][14] = 0
5143 11:03:27.566169 rx_lastpass[1][1][14] = 0
5144 11:03:27.569321 rx_firspass[1][1][15] = 0
5145 11:03:27.573004 rx_lastpass[1][1][15] = 0
5146 11:03:27.573093 dump params clk_delay
5147 11:03:27.576585 clk_delay[0] = 0
5148 11:03:27.576672 clk_delay[1] = 0
5149 11:03:27.579459 dump params dqs_delay
5150 11:03:27.582723 dqs_delay[0][0] = 0
5151 11:03:27.582811 dqs_delay[0][1] = 0
5152 11:03:27.586619 dqs_delay[1][0] = 0
5153 11:03:27.586706 dqs_delay[1][1] = 0
5154 11:03:27.589602 dump params delay_cell_unit = 735
5155 11:03:27.592955 mt_set_emi_preloader end
5156 11:03:27.595919 [mt_mem_init] dram size: 0x100000000, rank number: 2
5157 11:03:27.602916 [complex_mem_test] start addr:0x40000000, len:20480
5158 11:03:27.638149 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5159 11:03:27.644959 [complex_mem_test] start addr:0x80000000, len:20480
5160 11:03:27.680866 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5161 11:03:27.687056 [complex_mem_test] start addr:0xc0000000, len:20480
5162 11:03:27.722541 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5163 11:03:27.729287 [complex_mem_test] start addr:0x56000000, len:8192
5164 11:03:27.746077 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5165 11:03:27.749306 ddr_geometry:1
5166 11:03:27.752397 [complex_mem_test] start addr:0x80000000, len:8192
5167 11:03:27.769848 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5168 11:03:27.773543 dram_init: dram init end (result: 0)
5169 11:03:27.779909 Successfully loaded DRAM blobs and ran DRAM calibration
5170 11:03:27.789681 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5171 11:03:27.789804 CBMEM:
5172 11:03:27.792940 IMD: root @ 00000000fffff000 254 entries.
5173 11:03:27.796362 IMD: root @ 00000000ffffec00 62 entries.
5174 11:03:27.802847 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5175 11:03:27.809879 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5176 11:03:27.813160 in-header: 03 a1 00 00 08 00 00 00
5177 11:03:27.816382 in-data: 84 60 60 10 00 00 00 00
5178 11:03:27.819715 Chrome EC: clear events_b mask to 0x0000000020004000
5179 11:03:27.826926 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5180 11:03:27.830854 in-header: 03 fd 00 00 00 00 00 00
5181 11:03:27.830950 in-data:
5182 11:03:27.837180 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5183 11:03:27.837277 CBFS @ 21000 size 3d4000
5184 11:03:27.843699 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5185 11:03:27.846979 CBFS: Locating 'fallback/ramstage'
5186 11:03:27.850306 CBFS: Found @ offset 10d40 size d563
5187 11:03:27.871541 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5188 11:03:27.883505 Accumulated console time in romstage 13628 ms
5189 11:03:27.883634
5190 11:03:27.883701
5191 11:03:27.893444 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5192 11:03:27.897225 ARM64: Exception handlers installed.
5193 11:03:27.897323 ARM64: Testing exception
5194 11:03:27.900447 ARM64: Done test exception
5195 11:03:27.903742 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5196 11:03:27.907096 Manufacturer: ef
5197 11:03:27.910285 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5198 11:03:27.916785 WARNING: RO_VPD is uninitialized or empty.
5199 11:03:27.920571 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5200 11:03:27.923858 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5201 11:03:27.933330 read SPI 0x550600 0x3a00: 4533 us, 3275 KB/s, 26.200 Mbps
5202 11:03:27.936733 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5203 11:03:27.943380 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5204 11:03:27.943516 Enumerating buses...
5205 11:03:27.949659 Show all devs... Before device enumeration.
5206 11:03:27.949797 Root Device: enabled 1
5207 11:03:27.953048 CPU_CLUSTER: 0: enabled 1
5208 11:03:27.953153 CPU: 00: enabled 1
5209 11:03:27.956875 Compare with tree...
5210 11:03:27.959749 Root Device: enabled 1
5211 11:03:27.959871 CPU_CLUSTER: 0: enabled 1
5212 11:03:27.963032 CPU: 00: enabled 1
5213 11:03:27.966686 Root Device scanning...
5214 11:03:27.966816 root_dev_scan_bus for Root Device
5215 11:03:27.969841 CPU_CLUSTER: 0 enabled
5216 11:03:27.973460 root_dev_scan_bus for Root Device done
5217 11:03:27.980076 scan_bus: scanning of bus Root Device took 10690 usecs
5218 11:03:27.980208 done
5219 11:03:27.983490 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5220 11:03:27.986591 Allocating resources...
5221 11:03:27.986680 Reading resources...
5222 11:03:27.990054 Root Device read_resources bus 0 link: 0
5223 11:03:27.996394 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5224 11:03:27.996521 CPU: 00 missing read_resources
5225 11:03:28.003217 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5226 11:03:28.006372 Root Device read_resources bus 0 link: 0 done
5227 11:03:28.010080 Done reading resources.
5228 11:03:28.013354 Show resources in subtree (Root Device)...After reading.
5229 11:03:28.016684 Root Device child on link 0 CPU_CLUSTER: 0
5230 11:03:28.019566 CPU_CLUSTER: 0 child on link 0 CPU: 00
5231 11:03:28.029641 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5232 11:03:28.029753 CPU: 00
5233 11:03:28.033377 Setting resources...
5234 11:03:28.036401 Root Device assign_resources, bus 0 link: 0
5235 11:03:28.039673 CPU_CLUSTER: 0 missing set_resources
5236 11:03:28.042971 Root Device assign_resources, bus 0 link: 0
5237 11:03:28.046213 Done setting resources.
5238 11:03:28.053051 Show resources in subtree (Root Device)...After assigning values.
5239 11:03:28.056200 Root Device child on link 0 CPU_CLUSTER: 0
5240 11:03:28.059297 CPU_CLUSTER: 0 child on link 0 CPU: 00
5241 11:03:28.069506 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5242 11:03:28.069626 CPU: 00
5243 11:03:28.072869 Done allocating resources.
5244 11:03:28.076162 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5245 11:03:28.079424 Enabling resources...
5246 11:03:28.079505 done.
5247 11:03:28.082664 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5248 11:03:28.085803 Initializing devices...
5249 11:03:28.085891 Root Device init ...
5250 11:03:28.089321 mainboard_init: Starting display init.
5251 11:03:28.092618 ADC[4]: Raw value=75746 ID=0
5252 11:03:28.116266 anx7625_power_on_init: Init interface.
5253 11:03:28.119799 anx7625_disable_pd_protocol: Disabled PD feature.
5254 11:03:28.126272 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5255 11:03:28.172848 anx7625_start_dp_work: Secure OCM version=00
5256 11:03:28.176096 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5257 11:03:28.193456 sp_tx_get_edid_block: EDID Block = 1
5258 11:03:28.310729 Extracted contents:
5259 11:03:28.313909 header: 00 ff ff ff ff ff ff 00
5260 11:03:28.316986 serial number: 06 af 5c 14 00 00 00 00 00 1a
5261 11:03:28.320208 version: 01 04
5262 11:03:28.323967 basic params: 95 1a 0e 78 02
5263 11:03:28.326822 chroma info: 99 85 95 55 56 92 28 22 50 54
5264 11:03:28.330432 established: 00 00 00
5265 11:03:28.336920 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5266 11:03:28.340140 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5267 11:03:28.346828 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5268 11:03:28.353029 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5269 11:03:28.360147 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5270 11:03:28.363346 extensions: 00
5271 11:03:28.363438 checksum: ae
5272 11:03:28.363504
5273 11:03:28.366575 Manufacturer: AUO Model 145c Serial Number 0
5274 11:03:28.369854 Made week 0 of 2016
5275 11:03:28.373422 EDID version: 1.4
5276 11:03:28.373511 Digital display
5277 11:03:28.376837 6 bits per primary color channel
5278 11:03:28.376926 DisplayPort interface
5279 11:03:28.379804 Maximum image size: 26 cm x 14 cm
5280 11:03:28.383291 Gamma: 220%
5281 11:03:28.383382 Check DPMS levels
5282 11:03:28.386549 Supported color formats: RGB 4:4:4
5283 11:03:28.389914 First detailed timing is preferred timing
5284 11:03:28.393199 Established timings supported:
5285 11:03:28.396567 Standard timings supported:
5286 11:03:28.396657 Detailed timings
5287 11:03:28.403530 Hex of detail: ce1d56ea50001a3030204600009010000018
5288 11:03:28.406791 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5289 11:03:28.409964 0556 0586 05a6 0640 hborder 0
5290 11:03:28.416647 0300 0304 030a 031a vborder 0
5291 11:03:28.416758 -hsync -vsync
5292 11:03:28.419865 Did detailed timing
5293 11:03:28.423203 Hex of detail: 0000000f0000000000000000000000000020
5294 11:03:28.426470 Manufacturer-specified data, tag 15
5295 11:03:28.433417 Hex of detail: 000000fe0041554f0a202020202020202020
5296 11:03:28.433520 ASCII string: AUO
5297 11:03:28.436562 Hex of detail: 000000fe004231313658414230312e34200a
5298 11:03:28.440132 ASCII string: B116XAB01.4
5299 11:03:28.440221 Checksum
5300 11:03:28.443074 Checksum: 0xae (valid)
5301 11:03:28.450103 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5302 11:03:28.450204 DSI data_rate: 457800000 bps
5303 11:03:28.457707 anx7625_parse_edid: set default k value to 0x3d for panel
5304 11:03:28.460881 anx7625_parse_edid: pixelclock(76300).
5305 11:03:28.464217 hactive(1366), hsync(32), hfp(48), hbp(154)
5306 11:03:28.467421 vactive(768), vsync(6), vfp(4), vbp(16)
5307 11:03:28.470779 anx7625_dsi_config: config dsi.
5308 11:03:28.478709 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5309 11:03:28.499657 anx7625_dsi_config: success to config DSI
5310 11:03:28.502965 anx7625_dp_start: MIPI phy setup OK.
5311 11:03:28.506411 [SSUSB] Setting up USB HOST controller...
5312 11:03:28.509444 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5313 11:03:28.512810 [SSUSB] phy power-on done.
5314 11:03:28.516675 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5315 11:03:28.520114 in-header: 03 fc 01 00 00 00 00 00
5316 11:03:28.520226 in-data:
5317 11:03:28.523969 handle_proto3_response: EC response with error code: 1
5318 11:03:28.526902 SPM: pcm index = 1
5319 11:03:28.530378 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5320 11:03:28.533547 CBFS @ 21000 size 3d4000
5321 11:03:28.539867 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5322 11:03:28.543281 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5323 11:03:28.546884 CBFS: Found @ offset 1e7c0 size 1026
5324 11:03:28.553699 read SPI 0x3f808 0x1026: 1272 us, 3250 KB/s, 26.000 Mbps
5325 11:03:28.556831 SPM: binary array size = 2988
5326 11:03:28.560014 SPM: version = pcm_allinone_v1.17.2_20180829
5327 11:03:28.563456 SPM binary loaded in 32 msecs
5328 11:03:28.570951 spm_kick_im_to_fetch: ptr = 000000004021eec2
5329 11:03:28.574326 spm_kick_im_to_fetch: len = 2988
5330 11:03:28.574425 SPM: spm_kick_pcm_to_run
5331 11:03:28.577551 SPM: spm_kick_pcm_to_run done
5332 11:03:28.580918 SPM: spm_init done in 52 msecs
5333 11:03:28.584227 Root Device init finished in 494975 usecs
5334 11:03:28.587462 CPU_CLUSTER: 0 init ...
5335 11:03:28.594502 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5336 11:03:28.601249 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5337 11:03:28.601370 CBFS @ 21000 size 3d4000
5338 11:03:28.608005 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5339 11:03:28.610801 CBFS: Locating 'sspm.bin'
5340 11:03:28.614536 CBFS: Found @ offset 208c0 size 41cb
5341 11:03:28.623869 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5342 11:03:28.631965 CPU_CLUSTER: 0 init finished in 42801 usecs
5343 11:03:28.632080 Devices initialized
5344 11:03:28.635054 Show all devs... After init.
5345 11:03:28.638604 Root Device: enabled 1
5346 11:03:28.638694 CPU_CLUSTER: 0: enabled 1
5347 11:03:28.642051 CPU: 00: enabled 1
5348 11:03:28.645451 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5349 11:03:28.648619 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5350 11:03:28.651711 ELOG: NV offset 0x558000 size 0x1000
5351 11:03:28.659572 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5352 11:03:28.666695 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5353 11:03:28.669830 ELOG: Event(17) added with size 13 at 2024-07-10 11:03:22 UTC
5354 11:03:28.673146 out: cmd=0x121: 03 db 21 01 00 00 00 00
5355 11:03:28.676292 in-header: 03 57 00 00 2c 00 00 00
5356 11:03:28.689913 in-data: 7f 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 c7 44 05 00 06 80 00 00 e2 61 0b 00 06 80 00 00 c5 ea 01 00 06 80 00 00 0b 0a 63 00
5357 11:03:28.693103 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5358 11:03:28.696346 in-header: 03 19 00 00 08 00 00 00
5359 11:03:28.699747 in-data: a2 e0 47 00 13 00 00 00
5360 11:03:28.703073 Chrome EC: UHEPI supported
5361 11:03:28.709758 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5362 11:03:28.712889 in-header: 03 e1 00 00 08 00 00 00
5363 11:03:28.716352 in-data: 84 20 60 10 00 00 00 00
5364 11:03:28.719404 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5365 11:03:28.726317 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5366 11:03:28.729412 in-header: 03 e1 00 00 08 00 00 00
5367 11:03:28.732825 in-data: 84 20 60 10 00 00 00 00
5368 11:03:28.739517 ELOG: Event(A1) added with size 10 at 2024-07-10 11:03:22 UTC
5369 11:03:28.745757 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5370 11:03:28.749053 ELOG: Event(A0) added with size 9 at 2024-07-10 11:03:22 UTC
5371 11:03:28.756129 elog_add_boot_reason: Logged dev mode boot
5372 11:03:28.756236 Finalize devices...
5373 11:03:28.759230 Devices finalized
5374 11:03:28.762551 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5375 11:03:28.765905 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5376 11:03:28.772379 ELOG: Event(91) added with size 10 at 2024-07-10 11:03:22 UTC
5377 11:03:28.775753 Writing coreboot table at 0xffeda000
5378 11:03:28.779151 0. 0000000000114000-000000000011efff: RAMSTAGE
5379 11:03:28.786077 1. 0000000040000000-000000004023cfff: RAMSTAGE
5380 11:03:28.789419 2. 000000004023d000-00000000545fffff: RAM
5381 11:03:28.792584 3. 0000000054600000-000000005465ffff: BL31
5382 11:03:28.795790 4. 0000000054660000-00000000ffed9fff: RAM
5383 11:03:28.802222 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5384 11:03:28.806131 6. 0000000100000000-000000013fffffff: RAM
5385 11:03:28.809116 Passing 5 GPIOs to payload:
5386 11:03:28.812319 NAME | PORT | POLARITY | VALUE
5387 11:03:28.815656 write protect | 0x00000096 | low | high
5388 11:03:28.822608 EC in RW | 0x000000b1 | high | undefined
5389 11:03:28.825954 EC interrupt | 0x00000097 | low | undefined
5390 11:03:28.832416 TPM interrupt | 0x00000099 | high | undefined
5391 11:03:28.835939 speaker enable | 0x000000af | high | undefined
5392 11:03:28.838947 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5393 11:03:28.842550 in-header: 03 f7 00 00 02 00 00 00
5394 11:03:28.842641 in-data: 04 00
5395 11:03:28.845890 Board ID: 4
5396 11:03:28.848910 ADC[3]: Raw value=215504 ID=1
5397 11:03:28.849000 RAM code: 1
5398 11:03:28.849067 SKU ID: 16
5399 11:03:28.855978 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5400 11:03:28.856075 CBFS @ 21000 size 3d4000
5401 11:03:28.862619 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5402 11:03:28.869142 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum c00c
5403 11:03:28.869243 coreboot table: 940 bytes.
5404 11:03:28.875850 IMD ROOT 0. 00000000fffff000 00001000
5405 11:03:28.879027 IMD SMALL 1. 00000000ffffe000 00001000
5406 11:03:28.882504 CONSOLE 2. 00000000fffde000 00020000
5407 11:03:28.885631 FMAP 3. 00000000fffdd000 0000047c
5408 11:03:28.888918 TIME STAMP 4. 00000000fffdc000 00000910
5409 11:03:28.892228 RAMOOPS 5. 00000000ffedc000 00100000
5410 11:03:28.895460 COREBOOT 6. 00000000ffeda000 00002000
5411 11:03:28.899017 IMD small region:
5412 11:03:28.901949 IMD ROOT 0. 00000000ffffec00 00000400
5413 11:03:28.905685 VBOOT WORK 1. 00000000ffffeb00 00000100
5414 11:03:28.908766 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5415 11:03:28.912152 VPD 3. 00000000ffffea60 0000006c
5416 11:03:28.918995 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5417 11:03:28.925832 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5418 11:03:28.929040 in-header: 03 e1 00 00 08 00 00 00
5419 11:03:28.929134 in-data: 84 20 60 10 00 00 00 00
5420 11:03:28.935568 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5421 11:03:28.935692 CBFS @ 21000 size 3d4000
5422 11:03:28.941975 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5423 11:03:28.945180 CBFS: Locating 'fallback/payload'
5424 11:03:28.953585 CBFS: Found @ offset dc040 size 439a0
5425 11:03:29.041394 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5426 11:03:29.044843 Checking segment from ROM address 0x0000000040003a00
5427 11:03:29.051322 Checking segment from ROM address 0x0000000040003a1c
5428 11:03:29.054890 Loading segment from ROM address 0x0000000040003a00
5429 11:03:29.058148 code (compression=0)
5430 11:03:29.067944 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5431 11:03:29.074706 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5432 11:03:29.077728 it's not compressed!
5433 11:03:29.081079 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5434 11:03:29.087605 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5435 11:03:29.095728 Loading segment from ROM address 0x0000000040003a1c
5436 11:03:29.099362 Entry Point 0x0000000080000000
5437 11:03:29.099463 Loaded segments
5438 11:03:29.105629 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5439 11:03:29.109132 Jumping to boot code at 0000000080000000(00000000ffeda000)
5440 11:03:29.118854 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5441 11:03:29.122280 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5442 11:03:29.125641 CBFS @ 21000 size 3d4000
5443 11:03:29.132195 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5444 11:03:29.135874 CBFS: Locating 'fallback/bl31'
5445 11:03:29.138693 CBFS: Found @ offset 36dc0 size 5820
5446 11:03:29.149783 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5447 11:03:29.153081 Checking segment from ROM address 0x0000000040003a00
5448 11:03:29.160178 Checking segment from ROM address 0x0000000040003a1c
5449 11:03:29.163262 Loading segment from ROM address 0x0000000040003a00
5450 11:03:29.166535 code (compression=1)
5451 11:03:29.172910 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5452 11:03:29.182645 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5453 11:03:29.182764 using LZMA
5454 11:03:29.192078 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5455 11:03:29.198108 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5456 11:03:29.201552 Loading segment from ROM address 0x0000000040003a1c
5457 11:03:29.205006 Entry Point 0x0000000054601000
5458 11:03:29.205099 Loaded segments
5459 11:03:29.208240 NOTICE: MT8183 bl31_setup
5460 11:03:29.215555 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5461 11:03:29.218539 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5462 11:03:29.222689 INFO: [DEVAPC] dump DEVAPC registers:
5463 11:03:29.231856 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5464 11:03:29.238320 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5465 11:03:29.248768 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5466 11:03:29.254970 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5467 11:03:29.265177 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5468 11:03:29.271791 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5469 11:03:29.281709 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5470 11:03:29.288434 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5471 11:03:29.294994 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5472 11:03:29.305058 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5473 11:03:29.311374 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5474 11:03:29.321592 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5475 11:03:29.328239 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5476 11:03:29.338239 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5477 11:03:29.345381 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5478 11:03:29.351663 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5479 11:03:29.358335 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5480 11:03:29.364728 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5481 11:03:29.375113 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5482 11:03:29.381351 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5483 11:03:29.387954 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5484 11:03:29.394744 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5485 11:03:29.398203 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5486 11:03:29.401823 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5487 11:03:29.405015 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5488 11:03:29.408104 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5489 11:03:29.411800 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5490 11:03:29.418047 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5491 11:03:29.421666 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5492 11:03:29.424669 WARNING: region 0:
5493 11:03:29.428149 WARNING: apc:0x168, sa:0x0, ea:0xfff
5494 11:03:29.431349 WARNING: region 1:
5495 11:03:29.434919 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5496 11:03:29.435010 WARNING: region 2:
5497 11:03:29.438014 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5498 11:03:29.441103 WARNING: region 3:
5499 11:03:29.444936 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5500 11:03:29.445027 WARNING: region 4:
5501 11:03:29.451419 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5502 11:03:29.451513 WARNING: region 5:
5503 11:03:29.454705 WARNING: apc:0x0, sa:0x0, ea:0x0
5504 11:03:29.457878 WARNING: region 6:
5505 11:03:29.457966 WARNING: apc:0x0, sa:0x0, ea:0x0
5506 11:03:29.461243 WARNING: region 7:
5507 11:03:29.464404 WARNING: apc:0x0, sa:0x0, ea:0x0
5508 11:03:29.471524 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5509 11:03:29.474504 INFO: SPM: enable SPMC mode
5510 11:03:29.478275 NOTICE: spm_boot_init() start
5511 11:03:29.478367 NOTICE: spm_boot_init() end
5512 11:03:29.484873 INFO: BL31: Initializing runtime services
5513 11:03:29.488316 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5514 11:03:29.494975 INFO: BL31: Preparing for EL3 exit to normal world
5515 11:03:29.498254 INFO: Entry point address = 0x80000000
5516 11:03:29.498349 INFO: SPSR = 0x8
5517 11:03:29.521999
5518 11:03:29.522140
5519 11:03:29.522207
5520 11:03:29.522691 end: 2.2.3 depthcharge-start (duration 00:00:26) [common]
5521 11:03:29.522792 start: 2.2.4 bootloader-commands (timeout 00:04:25) [common]
5522 11:03:29.522873 Setting prompt string to ['jacuzzi:']
5523 11:03:29.522946 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:25)
5524 11:03:29.525114 Starting depthcharge on Juniper...
5525 11:03:29.525201
5526 11:03:29.528294 vboot_handoff: creating legacy vboot_handoff structure
5527 11:03:29.528381
5528 11:03:29.531974 ec_init(0): CrosEC protocol v3 supported (544, 544)
5529 11:03:29.532062
5530 11:03:29.535055 Wipe memory regions:
5531 11:03:29.535141
5532 11:03:29.538061 [0x00000040000000, 0x00000054600000)
5533 11:03:29.581106
5534 11:03:29.581268 [0x00000054660000, 0x00000080000000)
5535 11:03:29.672596
5536 11:03:29.672740 [0x000000811994a0, 0x000000ffeda000)
5537 11:03:29.933099
5538 11:03:29.933269 [0x00000100000000, 0x00000140000000)
5539 11:03:30.065653
5540 11:03:30.068613 Initializing XHCI USB controller at 0x11200000.
5541 11:03:30.092019
5542 11:03:30.094821 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5543 11:03:30.094914
5544 11:03:30.094980
5545 11:03:30.095248 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5546 11:03:30.095327 Sending line: 'tftpboot 192.168.201.1 14786787/tftp-deploy-lr8rpyez/kernel/image.itb 14786787/tftp-deploy-lr8rpyez/kernel/cmdline '
5548 11:03:30.195868 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5549 11:03:30.195976 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:24)
5550 11:03:30.200285 jacuzzi: tftpboot 192.168.201.1 14786787/tftp-deploy-lr8rpyez/kernel/image.ittp-deploy-lr8rpyez/kernel/cmdline
5551 11:03:30.200372
5552 11:03:30.200438 Waiting for link
5553 11:03:30.605571
5554 11:03:30.605733 R8152: Initializing
5555 11:03:30.605831
5556 11:03:30.608680 Version 9 (ocp_data = 6010)
5557 11:03:30.608805
5558 11:03:30.612375 R8152: Done initializing
5559 11:03:30.612474
5560 11:03:30.612561 Adding net device
5561 11:03:30.997681
5562 11:03:30.997823 done.
5563 11:03:30.997922
5564 11:03:30.998006 MAC: 00:e0:4c:68:0b:b9
5565 11:03:30.998087
5566 11:03:31.001145 Sending DHCP discover... done.
5567 11:03:31.001251
5568 11:03:31.004572 Waiting for reply... done.
5569 11:03:31.004688
5570 11:03:31.008078 Sending DHCP request... done.
5571 11:03:31.008167
5572 11:03:31.008271 Waiting for reply... done.
5573 11:03:31.008373
5574 11:03:31.011536 My ip is 192.168.201.13
5575 11:03:31.011622
5576 11:03:31.014486 The DHCP server ip is 192.168.201.1
5577 11:03:31.014572
5578 11:03:31.017586 TFTP server IP predefined by user: 192.168.201.1
5579 11:03:31.017700
5580 11:03:31.024528 Bootfile predefined by user: 14786787/tftp-deploy-lr8rpyez/kernel/image.itb
5581 11:03:31.024641
5582 11:03:31.027806 Sending tftp read request... done.
5583 11:03:31.027912
5584 11:03:31.030961 Waiting for the transfer...
5585 11:03:31.031076
5586 11:03:31.310670 00000000 ################################################################
5587 11:03:31.310798
5588 11:03:31.580987 00080000 ################################################################
5589 11:03:31.581138
5590 11:03:31.861575 00100000 ################################################################
5591 11:03:31.861718
5592 11:03:32.128443 00180000 ################################################################
5593 11:03:32.128628
5594 11:03:32.384048 00200000 ################################################################
5595 11:03:32.384248
5596 11:03:32.653399 00280000 ################################################################
5597 11:03:32.653544
5598 11:03:32.955524 00300000 ################################################################
5599 11:03:32.955673
5600 11:03:33.243314 00380000 ################################################################
5601 11:03:33.243450
5602 11:03:33.530033 00400000 ################################################################
5603 11:03:33.530204
5604 11:03:33.833628 00480000 ################################################################
5605 11:03:33.833764
5606 11:03:34.131422 00500000 ################################################################
5607 11:03:34.131561
5608 11:03:34.413822 00580000 ################################################################
5609 11:03:34.413966
5610 11:03:34.693396 00600000 ################################################################
5611 11:03:34.693536
5612 11:03:34.973160 00680000 ################################################################
5613 11:03:34.973300
5614 11:03:35.253434 00700000 ################################################################
5615 11:03:35.253575
5616 11:03:35.550846 00780000 ################################################################
5617 11:03:35.550984
5618 11:03:35.854070 00800000 ################################################################
5619 11:03:35.854205
5620 11:03:36.149132 00880000 ################################################################
5621 11:03:36.149269
5622 11:03:36.425202 00900000 ################################################################
5623 11:03:36.425340
5624 11:03:36.691151 00980000 ################################################################
5625 11:03:36.691289
5626 11:03:36.949937 00a00000 ################################################################
5627 11:03:36.950091
5628 11:03:37.203575 00a80000 ################################################################
5629 11:03:37.203738
5630 11:03:37.468364 00b00000 ################################################################
5631 11:03:37.468509
5632 11:03:37.743255 00b80000 ################################################################
5633 11:03:37.743400
5634 11:03:37.996908 00c00000 ################################################################
5635 11:03:37.997075
5636 11:03:38.243960 00c80000 ################################################################
5637 11:03:38.244112
5638 11:03:38.500771 00d00000 ################################################################
5639 11:03:38.500928
5640 11:03:38.794526 00d80000 ################################################################
5641 11:03:38.794678
5642 11:03:39.089392 00e00000 ################################################################
5643 11:03:39.089531
5644 11:03:39.364031 00e80000 ################################################################
5645 11:03:39.364200
5646 11:03:39.669640 00f00000 ################################################################
5647 11:03:39.669797
5648 11:03:39.917665 00f80000 ################################################################
5649 11:03:39.917802
5650 11:03:40.198017 01000000 ################################################################
5651 11:03:40.198154
5652 11:03:40.484304 01080000 ################################################################
5653 11:03:40.484440
5654 11:03:40.771417 01100000 ################################################################
5655 11:03:40.771553
5656 11:03:41.053143 01180000 ################################################################
5657 11:03:41.053277
5658 11:03:41.352180 01200000 ################################################################
5659 11:03:41.352320
5660 11:03:41.644415 01280000 ################################################################
5661 11:03:41.644581
5662 11:03:41.939926 01300000 ################################################################
5663 11:03:41.940086
5664 11:03:42.235047 01380000 ################################################################
5665 11:03:42.235179
5666 11:03:42.523338 01400000 ################################################################
5667 11:03:42.523493
5668 11:03:42.787014 01480000 ################################################################
5669 11:03:42.787178
5670 11:03:43.085132 01500000 ################################################################
5671 11:03:43.085271
5672 11:03:43.349795 01580000 ################################################################
5673 11:03:43.349930
5674 11:03:43.611674 01600000 ################################################################
5675 11:03:43.611814
5676 11:03:43.897490 01680000 ################################################################
5677 11:03:43.897623
5678 11:03:44.179427 01700000 ################################################################
5679 11:03:44.179559
5680 11:03:44.453200 01780000 ################################################################
5681 11:03:44.453344
5682 11:03:44.724358 01800000 ################################################################
5683 11:03:44.724522
5684 11:03:44.994960 01880000 ################################################################
5685 11:03:44.995124
5686 11:03:45.276648 01900000 ################################################################
5687 11:03:45.276814
5688 11:03:45.538062 01980000 ################################################################
5689 11:03:45.538233
5690 11:03:45.793326 01a00000 ################################################################
5691 11:03:45.793456
5692 11:03:46.051313 01a80000 ################################################################
5693 11:03:46.051449
5694 11:03:46.307183 01b00000 ################################################################
5695 11:03:46.307313
5696 11:03:46.575248 01b80000 ################################################################
5697 11:03:46.575379
5698 11:03:46.845982 01c00000 ################################################################
5699 11:03:46.846116
5700 11:03:47.118126 01c80000 ################################################################
5701 11:03:47.118250
5702 11:03:47.385500 01d00000 ################################################################
5703 11:03:47.385620
5704 11:03:47.668616 01d80000 ################################################################
5705 11:03:47.668749
5706 11:03:47.949565 01e00000 ################################################################
5707 11:03:47.949704
5708 11:03:48.209121 01e80000 ################################################################
5709 11:03:48.209252
5710 11:03:48.477020 01f00000 ################################################################
5711 11:03:48.477151
5712 11:03:48.750496 01f80000 ################################################################
5713 11:03:48.750636
5714 11:03:49.005897 02000000 ################################################################
5715 11:03:49.006042
5716 11:03:49.276477 02080000 ################################################################
5717 11:03:49.276609
5718 11:03:49.531440 02100000 ################################################################
5719 11:03:49.531569
5720 11:03:49.786667 02180000 ################################################################
5721 11:03:49.786804
5722 11:03:50.050713 02200000 ################################################################
5723 11:03:50.050851
5724 11:03:50.326797 02280000 ################################################################
5725 11:03:50.326927
5726 11:03:50.617190 02300000 ################################################################
5727 11:03:50.617322
5728 11:03:50.894661 02380000 ################################################################
5729 11:03:50.894800
5730 11:03:51.167147 02400000 ################################################################
5731 11:03:51.167304
5732 11:03:51.444422 02480000 ################################################################
5733 11:03:51.444564
5734 11:03:51.712509 02500000 ################################################################
5735 11:03:51.712640
5736 11:03:52.010330 02580000 ################################################################
5737 11:03:52.010489
5738 11:03:52.283143 02600000 ################################################################
5739 11:03:52.283280
5740 11:03:52.556599 02680000 ################################################################
5741 11:03:52.556734
5742 11:03:52.832717 02700000 ################################################################
5743 11:03:52.832856
5744 11:03:53.116324 02780000 ################################################################
5745 11:03:53.116505
5746 11:03:53.421453 02800000 ################################################################
5747 11:03:53.421593
5748 11:03:53.722859 02880000 ################################################################
5749 11:03:53.723021
5750 11:03:53.995532 02900000 ################################################################
5751 11:03:53.995688
5752 11:03:54.277644 02980000 ################################################################
5753 11:03:54.277792
5754 11:03:54.555727 02a00000 ################################################################
5755 11:03:54.555851
5756 11:03:54.840205 02a80000 ################################################################
5757 11:03:54.840328
5758 11:03:55.122836 02b00000 ################################################################
5759 11:03:55.122963
5760 11:03:55.393901 02b80000 ################################################################
5761 11:03:55.394046
5762 11:03:55.671531 02c00000 ################################################################
5763 11:03:55.671655
5764 11:03:55.952753 02c80000 ################################################################
5765 11:03:55.952879
5766 11:03:56.246146 02d00000 ################################################################
5767 11:03:56.246284
5768 11:03:56.533492 02d80000 ################################################################
5769 11:03:56.533629
5770 11:03:56.796180 02e00000 ################################################################
5771 11:03:56.796312
5772 11:03:57.092419 02e80000 ################################################################
5773 11:03:57.092564
5774 11:03:57.387526 02f00000 ################################################################
5775 11:03:57.387663
5776 11:03:57.687734 02f80000 ################################################################
5777 11:03:57.687874
5778 11:03:57.987578 03000000 ################################################################
5779 11:03:57.987706
5780 11:03:58.286936 03080000 ################################################################
5781 11:03:58.287103
5782 11:03:58.578503 03100000 ################################################################
5783 11:03:58.578641
5784 11:03:58.886380 03180000 ################################################################
5785 11:03:58.886516
5786 11:03:59.161346 03200000 ################################################################
5787 11:03:59.161501
5788 11:03:59.456021 03280000 ################################################################
5789 11:03:59.456183
5790 11:03:59.756222 03300000 ################################################################
5791 11:03:59.756375
5792 11:04:00.055546 03380000 ################################################################
5793 11:04:00.055672
5794 11:04:00.354792 03400000 ################################################################
5795 11:04:00.354923
5796 11:04:00.627132 03480000 ################################################################
5797 11:04:00.627270
5798 11:04:00.910923 03500000 ################################################################
5799 11:04:00.911053
5800 11:04:01.199236 03580000 ################################################################
5801 11:04:01.199372
5802 11:04:01.483889 03600000 ################################################################
5803 11:04:01.484078
5804 11:04:01.768290 03680000 ################################################################
5805 11:04:01.768429
5806 11:04:02.046398 03700000 ################################################################
5807 11:04:02.046534
5808 11:04:02.327561 03780000 ################################################################
5809 11:04:02.327697
5810 11:04:02.614199 03800000 ################################################################
5811 11:04:02.614338
5812 11:04:02.907534 03880000 ################################################################
5813 11:04:02.907673
5814 11:04:03.199418 03900000 ################################################################
5815 11:04:03.199556
5816 11:04:03.496733 03980000 ################################################################
5817 11:04:03.496874
5818 11:04:03.773547 03a00000 ################################################################
5819 11:04:03.773701
5820 11:04:04.081512 03a80000 ################################################################
5821 11:04:04.081683
5822 11:04:04.363356 03b00000 ################################################################
5823 11:04:04.363490
5824 11:04:04.649662 03b80000 ################################################################
5825 11:04:04.649825
5826 11:04:04.927598 03c00000 ################################################################
5827 11:04:04.927765
5828 11:04:05.200353 03c80000 ################################################################
5829 11:04:05.200517
5830 11:04:05.454708 03d00000 ################################################################
5831 11:04:05.454866
5832 11:04:05.720771 03d80000 ################################################################
5833 11:04:05.720909
5834 11:04:05.855826 03e00000 ################################## done.
5835 11:04:05.855943
5836 11:04:05.859288 The bootfile was 65284506 bytes long.
5837 11:04:05.859438
5838 11:04:05.862532 Sending tftp read request... done.
5839 11:04:05.862633
5840 11:04:05.865656 Waiting for the transfer...
5841 11:04:05.865756
5842 11:04:05.865833 00000000 # done.
5843 11:04:05.865906
5844 11:04:05.875981 Command line loaded dynamically from TFTP file: 14786787/tftp-deploy-lr8rpyez/kernel/cmdline
5845 11:04:05.876166
5846 11:04:05.892254 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5847 11:04:05.892560
5848 11:04:05.892726 Loading FIT.
5849 11:04:05.892877
5850 11:04:05.895933 Image ramdisk-1 has 52108510 bytes.
5851 11:04:05.896217
5852 11:04:05.898929 Image fdt-1 has 57695 bytes.
5853 11:04:05.899188
5854 11:04:05.902703 Image kernel-1 has 13116259 bytes.
5855 11:04:05.903137
5856 11:04:05.909294 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5857 11:04:05.909704
5858 11:04:05.922668 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5859 11:04:05.923143
5860 11:04:05.928920 Choosing best match conf-1 for compat google,juniper-sku16.
5861 11:04:05.929380
5862 11:04:05.936996 Connected to device vid:did:rid of 1ae0:0028:00
5863 11:04:05.945436
5864 11:04:05.948195 tpm_get_response: command 0x17b, return code 0x0
5865 11:04:05.948638
5866 11:04:05.951719 tpm_cleanup: add release locality here.
5867 11:04:05.952198
5868 11:04:05.955368 Shutting down all USB controllers.
5869 11:04:05.955756
5870 11:04:05.958388 Removing current net device
5871 11:04:05.958775
5872 11:04:05.961781 Exiting depthcharge with code 4 at timestamp: 53717150
5873 11:04:05.962176
5874 11:04:05.965128 LZMA decompressing kernel-1 to 0x80193568
5875 11:04:05.965520
5876 11:04:05.971679 LZMA decompressing kernel-1 to 0x40000000
5877 11:04:07.833779
5878 11:04:07.833910 jumping to kernel
5879 11:04:07.834477 end: 2.2.4 bootloader-commands (duration 00:00:38) [common]
5880 11:04:07.834577 start: 2.2.5 auto-login-action (timeout 00:03:47) [common]
5881 11:04:07.834658 Setting prompt string to ['Linux version [0-9]']
5882 11:04:07.834729 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5883 11:04:07.834805 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5884 11:04:07.908469
5885 11:04:07.911971 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5886 11:04:07.915279 start: 2.2.5.1 login-action (timeout 00:03:47) [common]
5887 11:04:07.915375 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5888 11:04:07.915447 Setting prompt string to []
5889 11:04:07.915526 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5890 11:04:07.915598 Using line separator: #'\n'#
5891 11:04:07.915656 No login prompt set.
5892 11:04:07.915717 Parsing kernel messages
5893 11:04:07.915772 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5894 11:04:07.915872 [login-action] Waiting for messages, (timeout 00:03:47)
5895 11:04:07.915932 Waiting using forced prompt support (timeout 00:01:53)
5896 11:04:07.935053 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j261272-arm64-gcc-12-defconfig-arm64-chromebook-bgdbp) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Wed Jul 10 10:43:20 UTC 2024
5897 11:04:07.938773 [ 0.000000] random: crng init done
5898 11:04:07.942233 [ 0.000000] Machine model: Google juniper sku16 board
5899 11:04:07.945393 [ 0.000000] efi: UEFI not found.
5900 11:04:07.955806 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5901 11:04:07.961685 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5902 11:04:07.968389 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5903 11:04:07.975092 [ 0.000000] printk: bootconsole [mtk8250] enabled
5904 11:04:07.982563 [ 0.000000] NUMA: No NUMA configuration found
5905 11:04:07.989400 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5906 11:04:07.995940 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5907 11:04:07.996025 [ 0.000000] Zone ranges:
5908 11:04:08.002479 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5909 11:04:08.005801 [ 0.000000] DMA32 empty
5910 11:04:08.012431 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5911 11:04:08.015877 [ 0.000000] Movable zone start for each node
5912 11:04:08.019136 [ 0.000000] Early memory node ranges
5913 11:04:08.026065 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5914 11:04:08.032370 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5915 11:04:08.038960 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5916 11:04:08.046261 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5917 11:04:08.052788 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5918 11:04:08.058812 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5919 11:04:08.079707 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5920 11:04:08.086189 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5921 11:04:08.092717 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5922 11:04:08.096302 [ 0.000000] psci: probing for conduit method from DT.
5923 11:04:08.102954 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5924 11:04:08.106055 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5925 11:04:08.112450 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5926 11:04:08.116270 [ 0.000000] psci: SMC Calling Convention v1.1
5927 11:04:08.122748 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5928 11:04:08.125784 [ 0.000000] Detected VIPT I-cache on CPU0
5929 11:04:08.132784 [ 0.000000] CPU features: detected: GIC system register CPU interface
5930 11:04:08.139250 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5931 11:04:08.145898 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5932 11:04:08.152540 [ 0.000000] CPU features: detected: ARM erratum 845719
5933 11:04:08.155768 [ 0.000000] alternatives: applying boot alternatives
5934 11:04:08.159063 [ 0.000000] Fallback order for Node 0: 0
5935 11:04:08.165702 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5936 11:04:08.168905 [ 0.000000] Policy zone: Normal
5937 11:04:08.188553 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5938 11:04:08.202228 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5939 11:04:08.208732 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5940 11:04:08.218577 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5941 11:04:08.225243 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5942 11:04:08.228227 <6>[ 0.000000] software IO TLB: area num 8.
5943 11:04:08.254299 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5944 11:04:08.312563 <6>[ 0.000000] Memory: 3864188K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 294276K reserved, 32768K cma-reserved)
5945 11:04:08.319038 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5946 11:04:08.325785 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5947 11:04:08.329129 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5948 11:04:08.335747 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5949 11:04:08.342348 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5950 11:04:08.345807 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5951 11:04:08.355802 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5952 11:04:08.362184 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5953 11:04:08.365542 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5954 11:04:08.377708 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5955 11:04:08.384385 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5956 11:04:08.387831 <6>[ 0.000000] GICv3: 640 SPIs implemented
5957 11:04:08.391171 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5958 11:04:08.397376 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5959 11:04:08.400643 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5960 11:04:08.407704 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5961 11:04:08.420729 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5962 11:04:08.430905 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5963 11:04:08.437457 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5964 11:04:08.449624 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5965 11:04:08.462811 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5966 11:04:08.469598 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5967 11:04:08.476002 <6>[ 0.009475] Console: colour dummy device 80x25
5968 11:04:08.479294 <6>[ 0.014507] printk: console [tty1] enabled
5969 11:04:08.489401 <6>[ 0.018899] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5970 11:04:08.496345 <6>[ 0.029364] pid_max: default: 32768 minimum: 301
5971 11:04:08.499715 <6>[ 0.034244] LSM: Security Framework initializing
5972 11:04:08.509765 <6>[ 0.039160] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5973 11:04:08.515919 <6>[ 0.046783] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5974 11:04:08.522423 <4>[ 0.055661] cacheinfo: Unable to detect cache hierarchy for CPU 0
5975 11:04:08.532605 <6>[ 0.062288] cblist_init_generic: Setting adjustable number of callback queues.
5976 11:04:08.539277 <6>[ 0.069734] cblist_init_generic: Setting shift to 3 and lim to 1.
5977 11:04:08.545969 <6>[ 0.076087] cblist_init_generic: Setting adjustable number of callback queues.
5978 11:04:08.552983 <6>[ 0.083532] cblist_init_generic: Setting shift to 3 and lim to 1.
5979 11:04:08.556230 <6>[ 0.089930] rcu: Hierarchical SRCU implementation.
5980 11:04:08.562479 <6>[ 0.094956] rcu: Max phase no-delay instances is 1000.
5981 11:04:08.569591 <6>[ 0.102870] EFI services will not be available.
5982 11:04:08.572725 <6>[ 0.107820] smp: Bringing up secondary CPUs ...
5983 11:04:08.583073 <6>[ 0.113076] Detected VIPT I-cache on CPU1
5984 11:04:08.590371 <4>[ 0.113123] cacheinfo: Unable to detect cache hierarchy for CPU 1
5985 11:04:08.596360 <6>[ 0.113130] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5986 11:04:08.603159 <6>[ 0.113163] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5987 11:04:08.606594 <6>[ 0.113644] Detected VIPT I-cache on CPU2
5988 11:04:08.613444 <4>[ 0.113677] cacheinfo: Unable to detect cache hierarchy for CPU 2
5989 11:04:08.620287 <6>[ 0.113682] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5990 11:04:08.626703 <6>[ 0.113694] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5991 11:04:08.629993 <6>[ 0.114139] Detected VIPT I-cache on CPU3
5992 11:04:08.636482 <4>[ 0.114169] cacheinfo: Unable to detect cache hierarchy for CPU 3
5993 11:04:08.643698 <6>[ 0.114173] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5994 11:04:08.650233 <6>[ 0.114184] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5995 11:04:08.657092 <6>[ 0.114760] CPU features: detected: Spectre-v2
5996 11:04:08.660105 <6>[ 0.114770] CPU features: detected: Spectre-BHB
5997 11:04:08.666761 <6>[ 0.114774] CPU features: detected: ARM erratum 858921
5998 11:04:08.670018 <6>[ 0.114779] Detected VIPT I-cache on CPU4
5999 11:04:08.676274 <4>[ 0.114826] cacheinfo: Unable to detect cache hierarchy for CPU 4
6000 11:04:08.683038 <6>[ 0.114834] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
6001 11:04:08.689684 <6>[ 0.114842] arch_timer: Enabling local workaround for ARM erratum 858921
6002 11:04:08.695994 <6>[ 0.114853] arch_timer: CPU4: Trapping CNTVCT access
6003 11:04:08.703092 <6>[ 0.114861] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
6004 11:04:08.706242 <6>[ 0.115347] Detected VIPT I-cache on CPU5
6005 11:04:08.713202 <4>[ 0.115386] cacheinfo: Unable to detect cache hierarchy for CPU 5
6006 11:04:08.719639 <6>[ 0.115392] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
6007 11:04:08.728987 <6>[ 0.115398] arch_timer: Enabling local workaround for ARM erratum 858921
6008 11:04:08.732261 <6>[ 0.115405] arch_timer: CPU5: Trapping CNTVCT access
6009 11:04:08.738874 <6>[ 0.115410] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
6010 11:04:08.742451 <6>[ 0.115847] Detected VIPT I-cache on CPU6
6011 11:04:08.748970 <4>[ 0.115893] cacheinfo: Unable to detect cache hierarchy for CPU 6
6012 11:04:08.758830 <6>[ 0.115898] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6013 11:04:08.765457 <6>[ 0.115905] arch_timer: Enabling local workaround for ARM erratum 858921
6014 11:04:08.768663 <6>[ 0.115911] arch_timer: CPU6: Trapping CNTVCT access
6015 11:04:08.775304 <6>[ 0.115917] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6016 11:04:08.782145 <6>[ 0.116447] Detected VIPT I-cache on CPU7
6017 11:04:08.785732 <4>[ 0.116491] cacheinfo: Unable to detect cache hierarchy for CPU 7
6018 11:04:08.795574 <6>[ 0.116498] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6019 11:04:08.802425 <6>[ 0.116505] arch_timer: Enabling local workaround for ARM erratum 858921
6020 11:04:08.805567 <6>[ 0.116511] arch_timer: CPU7: Trapping CNTVCT access
6021 11:04:08.812004 <6>[ 0.116516] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6022 11:04:08.818956 <6>[ 0.116564] smp: Brought up 1 node, 8 CPUs
6023 11:04:08.821994 <6>[ 0.355471] SMP: Total of 8 processors activated.
6024 11:04:08.828872 <6>[ 0.360407] CPU features: detected: 32-bit EL0 Support
6025 11:04:08.831946 <6>[ 0.365785] CPU features: detected: 32-bit EL1 Support
6026 11:04:08.838618 <6>[ 0.371153] CPU features: detected: CRC32 instructions
6027 11:04:08.842312 <6>[ 0.376582] CPU: All CPU(s) started at EL2
6028 11:04:08.848665 <6>[ 0.380920] alternatives: applying system-wide alternatives
6029 11:04:08.855629 <6>[ 0.388986] devtmpfs: initialized
6030 11:04:08.871076 <6>[ 0.397912] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
6031 11:04:08.877657 <6>[ 0.407861] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6032 11:04:08.884434 <6>[ 0.415585] pinctrl core: initialized pinctrl subsystem
6033 11:04:08.887563 <6>[ 0.422707] DMI not present or invalid.
6034 11:04:08.894262 <6>[ 0.427077] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6035 11:04:08.904338 <6>[ 0.433976] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6036 11:04:08.911071 <6>[ 0.441504] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6037 11:04:08.920610 <6>[ 0.449756] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6038 11:04:08.924441 <6>[ 0.457933] audit: initializing netlink subsys (disabled)
6039 11:04:08.934448 <5>[ 0.463638] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
6040 11:04:08.940866 <6>[ 0.464604] thermal_sys: Registered thermal governor 'step_wise'
6041 11:04:08.947372 <6>[ 0.471604] thermal_sys: Registered thermal governor 'power_allocator'
6042 11:04:08.950477 <6>[ 0.477901] cpuidle: using governor menu
6043 11:04:08.957725 <6>[ 0.488865] NET: Registered PF_QIPCRTR protocol family
6044 11:04:08.964060 <6>[ 0.494351] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6045 11:04:08.967087 <6>[ 0.501448] ASID allocator initialised with 32768 entries
6046 11:04:08.975038 <6>[ 0.508222] Serial: AMBA PL011 UART driver
6047 11:04:08.986158 <4>[ 0.519568] Trying to register duplicate clock ID: 113
6048 11:04:09.046410 <6>[ 0.576223] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6049 11:04:09.060913 <6>[ 0.590623] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6050 11:04:09.064119 <6>[ 0.600397] KASLR enabled
6051 11:04:09.078552 <6>[ 0.608332] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6052 11:04:09.084866 <6>[ 0.615336] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6053 11:04:09.091890 <6>[ 0.621815] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6054 11:04:09.098167 <6>[ 0.628806] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6055 11:04:09.104747 <6>[ 0.635280] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6056 11:04:09.111506 <6>[ 0.642270] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6057 11:04:09.118173 <6>[ 0.648743] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6058 11:04:09.125231 <6>[ 0.655732] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6059 11:04:09.128259 <6>[ 0.663269] ACPI: Interpreter disabled.
6060 11:04:09.138370 <6>[ 0.671279] iommu: Default domain type: Translated
6061 11:04:09.144633 <6>[ 0.676439] iommu: DMA domain TLB invalidation policy: strict mode
6062 11:04:09.148009 <5>[ 0.683066] SCSI subsystem initialized
6063 11:04:09.154778 <6>[ 0.687513] usbcore: registered new interface driver usbfs
6064 11:04:09.161428 <6>[ 0.693241] usbcore: registered new interface driver hub
6065 11:04:09.164954 <6>[ 0.698782] usbcore: registered new device driver usb
6066 11:04:09.172108 <6>[ 0.705108] pps_core: LinuxPPS API ver. 1 registered
6067 11:04:09.181879 <6>[ 0.710293] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6068 11:04:09.185322 <6>[ 0.719617] PTP clock support registered
6069 11:04:09.188229 <6>[ 0.723871] EDAC MC: Ver: 3.0.0
6070 11:04:09.196420 <6>[ 0.729521] FPGA manager framework
6071 11:04:09.203194 <6>[ 0.733200] Advanced Linux Sound Architecture Driver Initialized.
6072 11:04:09.206651 <6>[ 0.739943] vgaarb: loaded
6073 11:04:09.209812 <6>[ 0.743064] clocksource: Switched to clocksource arch_sys_counter
6074 11:04:09.216408 <5>[ 0.749499] VFS: Disk quotas dquot_6.6.0
6075 11:04:09.223101 <6>[ 0.753677] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6076 11:04:09.226291 <6>[ 0.760851] pnp: PnP ACPI: disabled
6077 11:04:09.234889 <6>[ 0.767755] NET: Registered PF_INET protocol family
6078 11:04:09.241141 <6>[ 0.772988] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6079 11:04:09.253309 <6>[ 0.782878] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6080 11:04:09.259483 <6>[ 0.791633] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6081 11:04:09.269832 <6>[ 0.799583] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6082 11:04:09.276731 <6>[ 0.807815] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6083 11:04:09.283368 <6>[ 0.815909] TCP: Hash tables configured (established 32768 bind 32768)
6084 11:04:09.293117 <6>[ 0.822734] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6085 11:04:09.299631 <6>[ 0.829710] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6086 11:04:09.306303 <6>[ 0.837190] NET: Registered PF_UNIX/PF_LOCAL protocol family
6087 11:04:09.312880 <6>[ 0.843276] RPC: Registered named UNIX socket transport module.
6088 11:04:09.316179 <6>[ 0.849417] RPC: Registered udp transport module.
6089 11:04:09.319928 <6>[ 0.854341] RPC: Registered tcp transport module.
6090 11:04:09.326358 <6>[ 0.859263] RPC: Registered tcp NFSv4.1 backchannel transport module.
6091 11:04:09.332605 <6>[ 0.865916] PCI: CLS 0 bytes, default 64
6092 11:04:09.335830 <6>[ 0.870176] Unpacking initramfs...
6093 11:04:09.349893 <6>[ 0.879690] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6094 11:04:09.359888 <6>[ 0.888432] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6095 11:04:09.363060 <6>[ 0.897339] kvm [1]: IPA Size Limit: 40 bits
6096 11:04:09.370640 <6>[ 0.903683] kvm [1]: vgic-v2@c420000
6097 11:04:09.374179 <6>[ 0.907514] kvm [1]: GIC system register CPU interface enabled
6098 11:04:09.380714 <6>[ 0.913705] kvm [1]: vgic interrupt IRQ18
6099 11:04:09.383538 <6>[ 0.918092] kvm [1]: Hyp mode initialized successfully
6100 11:04:09.391477 <5>[ 0.924439] Initialise system trusted keyrings
6101 11:04:09.397869 <6>[ 0.929225] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6102 11:04:09.406137 <6>[ 0.939183] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6103 11:04:09.412768 <5>[ 0.945639] NFS: Registering the id_resolver key type
6104 11:04:09.415969 <5>[ 0.950953] Key type id_resolver registered
6105 11:04:09.422485 <5>[ 0.955367] Key type id_legacy registered
6106 11:04:09.429219 <6>[ 0.959671] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6107 11:04:09.436346 <6>[ 0.966594] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6108 11:04:09.442895 <6>[ 0.974334] 9p: Installing v9fs 9p2000 file system support
6109 11:04:09.470162 <5>[ 1.003536] Key type asymmetric registered
6110 11:04:09.473575 <5>[ 1.007878] Asymmetric key parser 'x509' registered
6111 11:04:09.483844 <6>[ 1.013028] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6112 11:04:09.486807 <6>[ 1.020644] io scheduler mq-deadline registered
6113 11:04:09.490058 <6>[ 1.025402] io scheduler kyber registered
6114 11:04:09.513025 <6>[ 1.046236] EINJ: ACPI disabled.
6115 11:04:09.519600 <4>[ 1.050071] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6116 11:04:09.557806 <6>[ 1.090929] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6117 11:04:09.566399 <6>[ 1.099437] printk: console [ttyS0] disabled
6118 11:04:09.593955 <6>[ 1.124084] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6119 11:04:09.600562 <6>[ 1.133570] printk: console [ttyS0] enabled
6120 11:04:09.603973 <6>[ 1.133570] printk: console [ttyS0] enabled
6121 11:04:09.610858 <6>[ 1.142491] printk: bootconsole [mtk8250] disabled
6122 11:04:09.614335 <6>[ 1.142491] printk: bootconsole [mtk8250] disabled
6123 11:04:09.624240 <3>[ 1.153018] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6124 11:04:09.630627 <3>[ 1.161401] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6125 11:04:09.660172 <6>[ 1.189821] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6126 11:04:09.666511 <6>[ 1.199469] serial serial0: tty port ttyS1 registered
6127 11:04:09.673667 <6>[ 1.206036] SuperH (H)SCI(F) driver initialized
6128 11:04:09.676756 <6>[ 1.211552] msm_serial: driver initialized
6129 11:04:09.692056 <6>[ 1.221885] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6130 11:04:09.701847 <6>[ 1.230488] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6131 11:04:09.709083 <6>[ 1.239067] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6132 11:04:09.718728 <6>[ 1.247636] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6133 11:04:09.725249 <6>[ 1.256290] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6134 11:04:09.734918 <6>[ 1.264949] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6135 11:04:09.745409 <6>[ 1.273685] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6136 11:04:09.751909 <6>[ 1.282425] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6137 11:04:09.761486 <6>[ 1.290987] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6138 11:04:09.771613 <6>[ 1.299788] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6139 11:04:09.778762 <4>[ 1.312214] cacheinfo: Unable to detect cache hierarchy for CPU 0
6140 11:04:09.788147 <6>[ 1.321527] loop: module loaded
6141 11:04:09.800186 <6>[ 1.333442] vsim1: Bringing 1800000uV into 2700000-2700000uV
6142 11:04:09.818437 <6>[ 1.351266] megasas: 07.719.03.00-rc1
6143 11:04:09.827066 <6>[ 1.360093] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6144 11:04:09.841561 <6>[ 1.374451] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6145 11:04:09.858129 <6>[ 1.391273] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6146 11:04:09.915273 <6>[ 1.441642] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6147 11:04:11.052212 <6>[ 2.585137] Freeing initrd memory: 50884K
6148 11:04:11.067566 <4>[ 2.597245] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6149 11:04:11.074007 <4>[ 2.606498] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
6150 11:04:11.080808 <4>[ 2.613198] Hardware name: Google juniper sku16 board (DT)
6151 11:04:11.084109 <4>[ 2.618937] Call trace:
6152 11:04:11.087688 <4>[ 2.621637] dump_backtrace.part.0+0xe0/0xf0
6153 11:04:11.090854 <4>[ 2.626175] show_stack+0x18/0x30
6154 11:04:11.094064 <4>[ 2.629748] dump_stack_lvl+0x64/0x80
6155 11:04:11.100465 <4>[ 2.633668] dump_stack+0x18/0x34
6156 11:04:11.103586 <4>[ 2.637237] sysfs_warn_dup+0x64/0x80
6157 11:04:11.107388 <4>[ 2.641159] sysfs_do_create_link_sd+0xf0/0x100
6158 11:04:11.110663 <4>[ 2.645947] sysfs_create_link+0x20/0x40
6159 11:04:11.117154 <4>[ 2.650126] bus_add_device+0x64/0x120
6160 11:04:11.120219 <4>[ 2.654131] device_add+0x354/0x7ec
6161 11:04:11.123727 <4>[ 2.657877] of_device_add+0x44/0x60
6162 11:04:11.130402 <4>[ 2.661711] of_platform_device_create_pdata+0x90/0x124
6163 11:04:11.133596 <4>[ 2.667193] of_platform_bus_create+0x154/0x380
6164 11:04:11.137095 <4>[ 2.671978] of_platform_populate+0x50/0xfc
6165 11:04:11.143810 <4>[ 2.676417] parse_mtd_partitions+0x1d8/0x4e0
6166 11:04:11.147017 <4>[ 2.681033] mtd_device_parse_register+0xec/0x2e0
6167 11:04:11.150403 <4>[ 2.685993] spi_nor_probe+0x280/0x2f4
6168 11:04:11.156755 <4>[ 2.689998] spi_mem_probe+0x6c/0xc0
6169 11:04:11.160123 <4>[ 2.693831] spi_probe+0x84/0xe4
6170 11:04:11.163466 <4>[ 2.697316] really_probe+0xbc/0x2dc
6171 11:04:11.166682 <4>[ 2.701146] __driver_probe_device+0x78/0x114
6172 11:04:11.173315 <4>[ 2.705758] driver_probe_device+0xd8/0x15c
6173 11:04:11.176549 <4>[ 2.710196] __device_attach_driver+0xb8/0x134
6174 11:04:11.179837 <4>[ 2.714895] bus_for_each_drv+0x7c/0xd4
6175 11:04:11.183410 <4>[ 2.718988] __device_attach+0x9c/0x1a0
6176 11:04:11.190265 <4>[ 2.723078] device_initial_probe+0x14/0x20
6177 11:04:11.193637 <4>[ 2.727516] bus_probe_device+0x98/0xa0
6178 11:04:11.196707 <4>[ 2.731607] device_add+0x3c0/0x7ec
6179 11:04:11.200218 <4>[ 2.735352] __spi_add_device+0x78/0x120
6180 11:04:11.206759 <4>[ 2.739529] spi_add_device+0x44/0x80
6181 11:04:11.209992 <4>[ 2.743446] spi_register_controller+0x704/0xb20
6182 11:04:11.217135 <4>[ 2.748319] devm_spi_register_controller+0x4c/0xac
6183 11:04:11.220305 <4>[ 2.753453] mtk_spi_probe+0x4f4/0x684
6184 11:04:11.223383 <4>[ 2.757457] platform_probe+0x68/0xc0
6185 11:04:11.226748 <4>[ 2.761375] really_probe+0xbc/0x2dc
6186 11:04:11.233395 <4>[ 2.765204] __driver_probe_device+0x78/0x114
6187 11:04:11.236650 <4>[ 2.769816] driver_probe_device+0xd8/0x15c
6188 11:04:11.239965 <4>[ 2.774254] __driver_attach+0x94/0x19c
6189 11:04:11.243559 <4>[ 2.778344] bus_for_each_dev+0x74/0xd0
6190 11:04:11.246812 <4>[ 2.782436] driver_attach+0x24/0x30
6191 11:04:11.253065 <4>[ 2.786265] bus_add_driver+0x154/0x20c
6192 11:04:11.256257 <4>[ 2.790354] driver_register+0x78/0x130
6193 11:04:11.260006 <4>[ 2.794445] __platform_driver_register+0x28/0x34
6194 11:04:11.266645 <4>[ 2.799405] mtk_spi_driver_init+0x1c/0x28
6195 11:04:11.269851 <4>[ 2.803760] do_one_initcall+0x64/0x1dc
6196 11:04:11.273230 <4>[ 2.807850] kernel_init_freeable+0x218/0x284
6197 11:04:11.279408 <4>[ 2.812466] kernel_init+0x24/0x12c
6198 11:04:11.282969 <4>[ 2.816211] ret_from_fork+0x10/0x20
6199 11:04:11.291815 <6>[ 2.825074] tun: Universal TUN/TAP device driver, 1.6
6200 11:04:11.295708 <6>[ 2.831386] thunder_xcv, ver 1.0
6201 11:04:11.299088 <6>[ 2.834888] thunder_bgx, ver 1.0
6202 11:04:11.301714 <6>[ 2.838393] nicpf, ver 1.0
6203 11:04:11.313246 <6>[ 2.842781] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6204 11:04:11.316191 <6>[ 2.850265] hns3: Copyright (c) 2017 Huawei Corporation.
6205 11:04:11.319653 <6>[ 2.855866] hclge is initializing
6206 11:04:11.326544 <6>[ 2.859450] e1000: Intel(R) PRO/1000 Network Driver
6207 11:04:11.333057 <6>[ 2.864585] e1000: Copyright (c) 1999-2006 Intel Corporation.
6208 11:04:11.336349 <6>[ 2.870607] e1000e: Intel(R) PRO/1000 Network Driver
6209 11:04:11.343214 <6>[ 2.875828] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6210 11:04:11.349891 <6>[ 2.882023] igb: Intel(R) Gigabit Ethernet Network Driver
6211 11:04:11.356410 <6>[ 2.887679] igb: Copyright (c) 2007-2014 Intel Corporation.
6212 11:04:11.363088 <6>[ 2.893522] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6213 11:04:11.369545 <6>[ 2.900045] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6214 11:04:11.372604 <6>[ 2.906601] sky2: driver version 1.30
6215 11:04:11.379535 <6>[ 2.911871] usbcore: registered new device driver r8152-cfgselector
6216 11:04:11.386170 <6>[ 2.918412] usbcore: registered new interface driver r8152
6217 11:04:11.392524 <6>[ 2.924239] VFIO - User Level meta-driver version: 0.3
6218 11:04:11.399534 <6>[ 2.932067] mtu3 11201000.usb: uwk - reg:0x420, version:101
6219 11:04:11.406545 <4>[ 2.937940] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6220 11:04:11.412695 <6>[ 2.945214] mtu3 11201000.usb: dr_mode: 1, drd: auto
6221 11:04:11.419433 <6>[ 2.950440] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6222 11:04:11.422539 <6>[ 2.956624] mtu3 11201000.usb: usb3-drd: 0
6223 11:04:11.432356 <6>[ 2.962204] mtu3 11201000.usb: xHCI platform device register success...
6224 11:04:11.439605 <4>[ 2.970834] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6225 11:04:11.446203 <6>[ 2.978780] xhci-mtk 11200000.usb: xHCI Host Controller
6226 11:04:11.452418 <6>[ 2.984285] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6227 11:04:11.459282 <6>[ 2.992006] xhci-mtk 11200000.usb: USB3 root hub has no ports
6228 11:04:11.469181 <6>[ 2.998013] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6229 11:04:11.475859 <6>[ 3.007440] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6230 11:04:11.482287 <6>[ 3.013505] xhci-mtk 11200000.usb: xHCI Host Controller
6231 11:04:11.488731 <6>[ 3.018995] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6232 11:04:11.495316 <6>[ 3.026653] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6233 11:04:11.498613 <6>[ 3.033473] hub 1-0:1.0: USB hub found
6234 11:04:11.502156 <6>[ 3.037501] hub 1-0:1.0: 1 port detected
6235 11:04:11.513280 <6>[ 3.042831] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6236 11:04:11.516361 <6>[ 3.051468] hub 2-0:1.0: USB hub found
6237 11:04:11.526257 <3>[ 3.055517] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6238 11:04:11.533186 <6>[ 3.063417] usbcore: registered new interface driver usb-storage
6239 11:04:11.539500 <6>[ 3.070000] usbcore: registered new device driver onboard-usb-hub
6240 11:04:11.550079 <4>[ 3.079163] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6241 11:04:11.558519 <6>[ 3.091393] mt6397-rtc mt6358-rtc: registered as rtc0
6242 11:04:11.568386 <6>[ 3.096874] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-10T11:04:05 UTC (1720609445)
6243 11:04:11.571274 <6>[ 3.106755] i2c_dev: i2c /dev entries driver
6244 11:04:11.583525 <6>[ 3.113187] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6245 11:04:11.593375 <6>[ 3.121508] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6246 11:04:11.596504 <6>[ 3.130413] i2c 4-0058: Fixed dependency cycle(s) with /panel
6247 11:04:11.606820 <6>[ 3.136444] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6248 11:04:11.623069 <6>[ 3.155960] cpu cpu0: EM: created perf domain
6249 11:04:11.633038 <6>[ 3.161494] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6250 11:04:11.639643 <6>[ 3.172779] cpu cpu4: EM: created perf domain
6251 11:04:11.646790 <6>[ 3.179805] sdhci: Secure Digital Host Controller Interface driver
6252 11:04:11.653356 <6>[ 3.186261] sdhci: Copyright(c) Pierre Ossman
6253 11:04:11.660266 <6>[ 3.191683] Synopsys Designware Multimedia Card Interface Driver
6254 11:04:11.666792 <6>[ 3.192220] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6255 11:04:11.670069 <6>[ 3.198759] sdhci-pltfm: SDHCI platform and OF driver helper
6256 11:04:11.677998 <6>[ 3.211194] ledtrig-cpu: registered to indicate activity on CPUs
6257 11:04:11.685744 <6>[ 3.218895] usbcore: registered new interface driver usbhid
6258 11:04:11.688997 <6>[ 3.224737] usbhid: USB HID core driver
6259 11:04:11.700213 <6>[ 3.229023] spi_master spi2: will run message pump with realtime priority
6260 11:04:11.707487 <4>[ 3.229282] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6261 11:04:11.714243 <4>[ 3.243410] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6262 11:04:11.723807 <6>[ 3.248172] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6263 11:04:11.745017 <6>[ 3.268134] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6264 11:04:11.751812 <4>[ 3.279786] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6265 11:04:11.754760 <6>[ 3.283361] cros-ec-spi spi2.0: Chrome EC device registered
6266 11:04:11.768773 <4>[ 3.298589] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6267 11:04:11.779769 <4>[ 3.309475] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6268 11:04:11.786166 <6>[ 3.315239] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6269 11:04:11.793423 <4>[ 3.318352] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6270 11:04:11.796387 <6>[ 3.325285] mmc0: new HS400 MMC card at address 0001
6271 11:04:11.803014 <6>[ 3.336136] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6272 11:04:11.809768 <6>[ 3.338727] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6273 11:04:11.816446 <6>[ 3.347022] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6274 11:04:11.824474 <6>[ 3.357575] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6275 11:04:11.834264 <6>[ 3.363878] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6276 11:04:11.840809 <6>[ 3.364176] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6277 11:04:11.851210 <6>[ 3.375912] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6278 11:04:11.857432 <6>[ 3.378985] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6279 11:04:11.860862 <6>[ 3.389817] NET: Registered PF_PACKET protocol family
6280 11:04:11.874080 <6>[ 3.391789] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6281 11:04:11.884531 <6>[ 3.392211] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6282 11:04:11.887867 <6>[ 3.422610] 9pnet: Installing 9P2000 support
6283 11:04:11.894704 <5>[ 3.427174] Key type dns_resolver registered
6284 11:04:11.897821 <6>[ 3.431910] registered taskstats version 1
6285 11:04:11.904387 <5>[ 3.436282] Loading compiled-in X.509 certificates
6286 11:04:11.949385 <6>[ 3.479198] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6287 11:04:11.956412 <3>[ 3.480719] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6288 11:04:11.987538 <6>[ 3.514271] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6289 11:04:11.998685 <6>[ 3.528467] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6290 11:04:12.008445 <6>[ 3.537066] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6291 11:04:12.015032 <6>[ 3.545714] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6292 11:04:12.025001 <6>[ 3.554321] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6293 11:04:12.031748 <6>[ 3.562966] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6294 11:04:12.041839 <6>[ 3.571569] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6295 11:04:12.051732 <6>[ 3.580116] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6296 11:04:12.058269 <6>[ 3.589773] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6297 11:04:12.064780 <6>[ 3.597351] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6298 11:04:12.071343 <6>[ 3.604661] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6299 11:04:12.078604 <6>[ 3.611946] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6300 11:04:12.089584 <6>[ 3.619437] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6301 11:04:12.096155 <6>[ 3.627804] panfrost 13040000.gpu: clock rate = 511999970
6302 11:04:12.106151 <6>[ 3.633490] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6303 11:04:12.109345 <6>[ 3.634703] hub 1-1:1.0: USB hub found
6304 11:04:12.116011 <6>[ 3.643506] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6305 11:04:12.122632 <6>[ 3.647612] hub 1-1:1.0: 3 ports detected
6306 11:04:12.129240 <6>[ 3.655054] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6307 11:04:12.142646 <6>[ 3.667747] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6308 11:04:12.148772 <6>[ 3.679826] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6309 11:04:12.160333 <6>[ 3.690085] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6310 11:04:12.170369 <6>[ 3.698900] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6311 11:04:12.180238 <6>[ 3.708050] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6312 11:04:12.187114 <6>[ 3.717182] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6313 11:04:12.196932 <6>[ 3.726312] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6314 11:04:12.206830 <6>[ 3.735615] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6315 11:04:12.216831 <6>[ 3.744915] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6316 11:04:12.227016 <6>[ 3.754390] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6317 11:04:12.233488 <6>[ 3.763866] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6318 11:04:12.243569 <6>[ 3.772994] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6319 11:04:12.317285 <6>[ 3.846805] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6320 11:04:12.326949 <6>[ 3.855686] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6321 11:04:12.337455 <6>[ 3.867340] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6322 11:04:12.425294 <6>[ 3.955084] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6323 11:04:13.047849 <6>[ 4.143398] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6324 11:04:13.055168 <6>[ 4.279960] r8152 1-1.2:1.0: load rtl8153b-2 v1 10/23/19 successfully
6325 11:04:13.058270 <6>[ 4.312133] r8152 1-1.2:1.0 eth0: v1.12.13
6326 11:04:13.068018 <6>[ 4.391099] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6327 11:04:13.074592 <6>[ 4.561329] Console: switching to colour frame buffer device 170x48
6328 11:04:13.081230 <6>[ 4.611392] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6329 11:04:13.101261 <6>[ 4.627637] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6330 11:04:13.118083 <6>[ 4.644203] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6331 11:04:13.124436 <6>[ 4.656372] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6332 11:04:13.134801 <6>[ 4.664409] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6333 11:04:13.144719 <6>[ 4.669887] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6334 11:04:13.162372 <6>[ 4.688531] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6335 11:04:14.385880 <6>[ 5.918775] r8152 1-1.2:1.0 eth0: carrier on
6336 11:04:16.638141 <5>[ 5.939195] Sending DHCP requests .., OK
6337 11:04:16.644832 <6>[ 8.175819] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6338 11:04:16.648391 <6>[ 8.184267] IP-Config: Complete:
6339 11:04:16.661554 <6>[ 8.187833] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6340 11:04:16.671798 <6>[ 8.198735] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6341 11:04:16.678117 <6>[ 8.208222] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6342 11:04:16.687340 <6>[ 8.208232] nameserver0=192.168.201.1
6343 11:04:16.695764 <6>[ 8.228612] clk: Disabling unused clocks
6344 11:04:16.700541 <6>[ 8.236942] ALSA device list:
6345 11:04:16.709871 <6>[ 8.243018] No soundcards found.
6346 11:04:16.719166 <6>[ 8.252228] Freeing unused kernel memory: 8512K
6347 11:04:16.726248 <6>[ 8.259452] Run /init as init process
6348 11:04:16.756314 <6>[ 8.289508] NET: Registered PF_INET6 protocol family
6349 11:04:16.763691 <6>[ 8.296673] Segment Routing with IPv6
6350 11:04:16.766954 <6>[ 8.301309] In-situ OAM (IOAM) with IPv6
6351 11:04:16.814777 <30>[ 8.321221] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6352 11:04:16.823722 <30>[ 8.356486] systemd[1]: Detected architecture arm64.
6353 11:04:16.823809
6354 11:04:16.830235 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6355 11:04:16.830319
6356 11:04:16.846147 <30>[ 8.379288] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6357 11:04:16.989688 <30>[ 8.519250] systemd[1]: Queued start job for default target graphical.target.
6358 11:04:17.036004 <30>[ 8.565865] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6359 11:04:17.046036 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6360 11:04:17.063250 <30>[ 8.592782] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6361 11:04:17.073479 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6362 11:04:17.090727 <30>[ 8.620581] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6363 11:04:17.102069 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6364 11:04:17.118860 <30>[ 8.648616] systemd[1]: Created slice user.slice - User and Session Slice.
6365 11:04:17.128907 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6366 11:04:17.149073 <30>[ 8.675532] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6367 11:04:17.160416 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6368 11:04:17.181336 <30>[ 8.707462] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6369 11:04:17.192241 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6370 11:04:17.219521 <30>[ 8.739389] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6371 11:04:17.237757 <30>[ 8.767634] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6372 11:04:17.244949 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6373 11:04:17.266008 <30>[ 8.795303] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6374 11:04:17.277895 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6375 11:04:17.293476 <30>[ 8.823330] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6376 11:04:17.308126 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6377 11:04:17.322113 <30>[ 8.855354] systemd[1]: Reached target paths.target - Path Units.
6378 11:04:17.337121 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6379 11:04:17.353674 <30>[ 8.883296] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6380 11:04:17.366317 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6381 11:04:17.382526 <30>[ 8.915621] systemd[1]: Reached target slices.target - Slice Units.
6382 11:04:17.398167 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6383 11:04:17.410112 <30>[ 8.943295] systemd[1]: Reached target swap.target - Swaps.
6384 11:04:17.421055 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6385 11:04:17.441602 <30>[ 8.971360] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6386 11:04:17.455586 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6387 11:04:17.474652 <30>[ 9.004291] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6388 11:04:17.488978 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6389 11:04:17.507423 <30>[ 9.036996] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6390 11:04:17.520975 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6391 11:04:17.539241 <30>[ 9.068784] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6392 11:04:17.553548 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6393 11:04:17.570225 <30>[ 9.099908] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6394 11:04:17.582747 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6395 11:04:17.603191 <30>[ 9.132876] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6396 11:04:17.617080 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6397 11:04:17.634588 <30>[ 9.164129] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6398 11:04:17.647976 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6399 11:04:17.666968 <30>[ 9.196462] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6400 11:04:17.680023 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6401 11:04:17.721591 <30>[ 9.251437] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6402 11:04:17.731661 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6403 11:04:17.743369 <30>[ 9.272982] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6404 11:04:17.754884 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6405 11:04:17.818382 <30>[ 9.348071] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6406 11:04:17.831443 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6407 11:04:17.857008 <30>[ 9.380263] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6408 11:04:17.881555 <30>[ 9.410843] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6409 11:04:17.894729 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6410 11:04:17.958388 <30>[ 9.488274] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6411 11:04:17.971770 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6412 11:04:17.995802 <30>[ 9.525523] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6413 11:04:18.009751 Startin<6>[ 9.540093] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6414 11:04:18.016409 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6415 11:04:18.039230 <30>[ 9.569017] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6416 11:04:18.050107 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6417 11:04:18.063598 <30>[ 9.592919] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6418 11:04:18.076858 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6419 11:04:18.099434 <30>[ 9.628916] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6420 11:04:18.112743 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6421 11:04:18.140227 <30>[ 9.669915] systemd[1]: Starting systemd-journald.service - Journal Service...
6422 11:04:18.151167 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6423 11:04:18.190245 <30>[ 9.720052] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6424 11:04:18.201259 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6425 11:04:18.225743 <30>[ 9.752165] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6426 11:04:18.238467 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6427 11:04:18.263089 <30>[ 9.792837] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6428 11:04:18.277657 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6429 11:04:18.296215 <30>[ 9.826125] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6430 11:04:18.307507 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6431 11:04:18.328427 <30>[ 9.858148] systemd[1]: Started systemd-journald.service - Journal Service.
6432 11:04:18.335231 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6433 11:04:18.355597 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6434 11:04:18.374272 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6435 11:04:18.393965 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6436 11:04:18.414537 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6437 11:04:18.434967 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6438 11:04:18.455086 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6439 11:04:18.477166 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6440 11:04:18.499633 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6441 11:04:18.520765 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6442 11:04:18.543667 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6443 11:04:18.566946 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6444 11:04:18.588909 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6445 11:04:18.642727 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6446 11:04:18.669054 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6447 11:04:18.699661 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6448 11:04:18.706479 See 'systemctl status systemd-remount-fs.service' for details.
6449 11:04:18.717950 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6450 11:04:18.740143 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6451 11:04:18.760597 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6452 11:04:18.806758 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6453 11:04:18.823547 <46>[ 10.353046] systemd-journald[202]: Received client request to flush runtime journal.
6454 11:04:18.835163 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6455 11:04:18.859634 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6456 11:04:18.889715 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6457 11:04:18.907200 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6458 11:04:18.927384 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6459 11:04:18.970914 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6460 11:04:19.001004 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6461 11:04:19.020048 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6462 11:04:19.042266 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6463 11:04:19.086660 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6464 11:04:19.113579 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6465 11:04:19.134053 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6466 11:04:19.175499 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6467 11:04:19.196889 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6468 11:04:19.214328 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6469 11:04:19.244507 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6470 11:04:19.265929 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6471 11:04:19.291409 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6472 11:04:19.378140 <3>[ 10.911144] mtk-scp 10500000.scp: invalid resource
6473 11:04:19.384832 <6>[ 10.914180] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6474 11:04:19.394930 <6>[ 10.916379] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6475 11:04:19.401366 <3>[ 10.927755] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6476 11:04:19.411223 <4>[ 10.930471] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6477 11:04:19.421478 <6>[ 10.931193] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6478 11:04:19.436058 <6>[ 10.933834] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6479 11:04:19.446145 <3>[ 10.940504] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6480 11:04:19.449453 <6>[ 10.940516] remoteproc remoteproc0: scp is available
6481 11:04:19.459247 <4>[ 10.940617] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6482 11:04:19.466136 <6>[ 10.940624] remoteproc remoteproc0: powering up scp
6483 11:04:19.472736 <4>[ 10.940641] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6484 11:04:19.479592 <3>[ 10.940644] remoteproc remoteproc0: request_firmware failed: -2
6485 11:04:19.493085 <3>[ 10.974710] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6486 11:04:19.499679 <3>[ 10.975245] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6487 11:04:19.510742 <3>[ 10.983778] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6488 11:04:19.517189 <6>[ 10.991965] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6489 11:04:19.528695 <3>[ 10.992111] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6490 11:04:19.539662 <3>[ 10.992122] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6491 11:04:19.549617 <3>[ 10.992127] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6492 11:04:19.559264 <3>[ 10.992134] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6493 11:04:19.569515 <3>[ 10.992138] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6494 11:04:19.579766 <3>[ 10.996380] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6495 11:04:19.593431 <3>[ 10.997264] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6496 11:04:19.599827 <3>[ 10.997270] elan_i2c 2-0015: Error applying setting, reverse things back
6497 11:04:19.615279 <3>[ 11.022957] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6498 11:04:19.623135 <6>[ 11.069803] mc: Linux media interface: v0.10
6499 11:04:19.646045 <4>[ 11.174714] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6500 11:04:19.656370 <4>[ 11.185987] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6501 11:04:19.659513 <6>[ 11.190132] Bluetooth: Core ver 2.22
6502 11:04:19.674573 <3>[ 11.200868] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6503 11:04:19.687089 <5>[ 11.216446] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6504 11:04:19.693341 <3>[ 11.220358] debugfs: File 'Playback' in directory 'dapm' already present!
6505 11:04:19.700146 <6>[ 11.225012] NET: Registered PF_BLUETOOTH protocol family
6506 11:04:19.709975 <3>[ 11.231520] debugfs: File 'Capture' in directory 'dapm' already present!
6507 11:04:19.720770 <6>[ 11.253632] Bluetooth: HCI device and connection manager initialized
6508 11:04:19.730702 <6>[ 11.254703] cs_system_cfg: CoreSight Configuration manager initialised
6509 11:04:19.733954 <6>[ 11.260512] Bluetooth: HCI socket layer initialized
6510 11:04:19.745349 <5>[ 11.273979] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6511 11:04:19.748335 <6>[ 11.274711] Bluetooth: L2CAP socket layer initialized
6512 11:04:19.758403 <5>[ 11.281750] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6513 11:04:19.761825 <6>[ 11.286994] Bluetooth: SCO socket layer initialized
6514 11:04:19.771874 <4>[ 11.295052] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6515 11:04:19.778568 <6>[ 11.300285] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6516 11:04:19.785067 <6>[ 11.309184] cfg80211: failed to load regulatory.db
6517 11:04:19.788629 <6>[ 11.309784] videodev: Linux video capture interface: v2.00
6518 11:04:19.798744 <6>[ 11.317558] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6519 11:04:19.816006 <6>[ 11.345336] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6520 11:04:19.826165 <6>[ 11.355913] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6521 11:04:19.837685 <6>[ 11.367439] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6522 11:04:19.850925 <6>[ 11.380731] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6523 11:04:19.863130 <6>[ 11.392792] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6524 11:04:19.874349 <6>[ 11.403742] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6525 11:04:19.884215 <4>[ 11.411769] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6526 11:04:19.887420 <4>[ 11.411769] Fallback method does not support PEC.
6527 11:04:19.907754 <6>[ 11.433894] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6528 11:04:19.920810 <3>[ 11.450368] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6529 11:04:19.930842 <6>[ 11.452162] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6530 11:04:19.945007 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6531 11:04:19.951780 <3>[ 11.481050] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6532 11:04:19.958581 <3>[ 11.484410] thermal_sys: Failed to find 'trips' node
6533 11:04:19.971099 [[0;32m OK [0m] Reached targ<3>[ 11.502376] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6534 11:04:19.981613 et [0;1;39mtime<3>[ 11.504915] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6535 11:04:19.990991 -set.target[0m <3>[ 11.510573] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6536 11:04:19.994552 - System Time Set.
6537 11:04:20.008075 <4>[ 11.537759] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6538 11:04:20.016298 <6>[ 11.549097] Bluetooth: HCI UART driver ver 2.3
6539 11:04:20.022977 <6>[ 11.555498] Bluetooth: HCI UART protocol H4 registered
6540 11:04:20.033290 <6>[ 11.566004] Bluetooth: HCI UART protocol LL registered
6541 11:04:20.043718 <3>[ 11.576474] thermal_sys: Failed to find 'trips' node
6542 11:04:20.055008 <3>[ 11.584506] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6543 11:04:20.064853 <3>[ 11.594534] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6544 11:04:20.076185 <4>[ 11.605685] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6545 11:04:20.090299 <6>[ 11.623457] Bluetooth: HCI UART protocol Three-wire (H5) registered
6546 11:04:20.109340 <6>[ 11.642165] Bluetooth: HCI UART protocol Broadcom registered
6547 11:04:20.124384 <6>[ 11.657584] Bluetooth: HCI UART protocol QCA registered
6548 11:04:20.136559 <6>[ 11.669215] Bluetooth: HCI UART protocol Marvell registered
6549 11:04:20.186621 <6>[ 11.719361] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6550 11:04:20.259065 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6551 11:04:20.302244 <3>[ 11.830978] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6552 11:04:20.331405 <6>[ 11.864119] Bluetooth: hci0: setting up ROME/QCA6390
6553 11:04:20.351495 <3>[ 11.881239] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6554 11:04:20.386377 <3>[ 11.915902] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6555 11:04:20.396998 <6>[ 11.916368] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6556 11:04:20.407290 <3>[ 11.933047] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6557 11:04:20.414094 <6>[ 11.936980] usbcore: registered new interface driver uvcvideo
6558 11:04:20.431239 <3>[ 11.958431] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6559 11:04:20.443969 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6560 11:04:20.457155 <6>[ 11.989727] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6561 11:04:20.470508 <6>[ 12.002763] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6562 11:04:20.484607 <3>[ 12.014064] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6563 11:04:20.500899 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness <6>[ 12.027012] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6564 11:04:20.507493 <6>[ 12.032857] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video2 (81,2)
6565 11:04:20.517741 of backlight:bac<6>[ 12.038136] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6566 11:04:20.520912 klight_lcd0.
6567 11:04:20.536263 <6>[ 12.064846] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video3
6568 11:04:20.546227 <6>[ 12.064927] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6569 11:04:20.557113 <3>[ 12.070094] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6570 11:04:20.563860 <3>[ 12.090392] Bluetooth: hci0: Frame reassembly failed (-84)
6571 11:04:20.584682 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6572 11:04:20.640198 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6573 11:04:20.657880 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6574 11:04:20.677797 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6575 11:04:20.692978 <6>[ 12.222460] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6576 11:04:20.706272 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6577 11:04:20.723421 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6578 11:04:20.741796 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6579 11:04:20.757940 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6580 11:04:20.774943 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6581 11:04:20.794036 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6582 11:04:20.810599 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6583 11:04:20.826001 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6584 11:04:20.832449 <6>[ 12.364171] Bluetooth: hci0: QCA Product ID :0x00000008
6585 11:04:20.841674 <6>[ 12.374670] Bluetooth: hci0: QCA SOC Version :0x00000044
6586 11:04:20.851946 <6>[ 12.385042] Bluetooth: hci0: QCA ROM Version :0x00000302
6587 11:04:20.862092 <6>[ 12.395223] Bluetooth: hci0: QCA Patch Version:0x00000111
6588 11:04:20.872383 <6>[ 12.405286] Bluetooth: hci0: QCA controller version 0x00440302
6589 11:04:20.885471 <6>[ 12.415189] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6590 11:04:20.911535 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6591 11:04:20.938171 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6592 11:04:20.959749 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6593 11:04:20.983616 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6594 11:04:21.020484 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6595 11:04:21.062829 [[0;32m OK [<6>[ 12.589802] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6596 11:04:21.066216 0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6597 11:04:21.110778 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6598 11:04:21.130634 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6599 11:04:21.158965 <3>[ 12.691797] Bluetooth: hci0: Frame reassembly failed (-84)
6600 11:04:21.173206 <4>[ 12.702877] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6601 11:04:21.183710 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6602 11:04:21.190456 <4>[ 12.720513] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6603 11:04:21.203149 [[0;32m OK [<4>[ 12.733706] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6604 11:04:21.212993 0m] Started [0;1;39msystemd-rfkill.ser…- Load<4>[ 12.745317] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6605 11:04:21.216091 /Save RF Kill Switch Status.
6606 11:04:21.242375 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6607 11:04:21.280301 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6608 11:04:21.286946 <6>[ 12.819300] Bluetooth: hci0: QCA Downloading qca/nvm_00440302_i2s.bin
6609 11:04:21.299762 <4>[ 12.829195] bluetooth hci0: Direct firmware load for qca/nvm_00440302_i2s.bin failed with error -2
6610 11:04:21.312152 <3>[ 12.841540] Bluetooth: hci0: QCA Failed to request file: qca/nvm_00440302_i2s.bin (-2)
6611 11:04:21.320141 <3>[ 12.853060] Bluetooth: hci0: QCA Failed to download NVM (-2)
6612 11:04:21.330240 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6613 11:04:21.373041 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6614 11:04:21.418081 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6615 11:04:21.457662
6616 11:04:21.461048 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6617 11:04:21.461158
6618 11:04:21.464211 debian-bookworm-arm64 login: root (automatic login)
6619 11:04:21.464317
6620 11:04:21.481453 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Wed Jul 10 10:43:20 UTC 2024 aarch64
6621 11:04:21.481567
6622 11:04:21.487622 The programs included with the Debian GNU/Linux system are free software;
6623 11:04:21.494345 the exact distribution terms for each program are described in the
6624 11:04:21.497714 individual files in /usr/share/doc/*/copyright.
6625 11:04:21.497803
6626 11:04:21.504122 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6627 11:04:21.507400 permitted by applicable law.
6628 11:04:21.507800 Matched prompt #10: / #
6630 11:04:21.508003 Setting prompt string to ['/ #']
6631 11:04:21.508100 end: 2.2.5.1 login-action (duration 00:00:14) [common]
6633 11:04:21.508291 end: 2.2.5 auto-login-action (duration 00:00:14) [common]
6634 11:04:21.508382 start: 2.2.6 expect-shell-connection (timeout 00:03:33) [common]
6635 11:04:21.508448 Setting prompt string to ['/ #']
6636 11:04:21.508525 Forcing a shell prompt, looking for ['/ #']
6637 11:04:21.508586 Sending line: ''
6639 11:04:21.558891 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6640 11:04:21.558965 Waiting using forced prompt support (timeout 00:02:30)
6641 11:04:21.563986 / #
6642 11:04:21.564257 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6643 11:04:21.564353 start: 2.2.7 export-device-env (timeout 00:03:33) [common]
6644 11:04:21.564449 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6645 11:04:21.564545 end: 2.2 depthcharge-retry (duration 00:01:27) [common]
6646 11:04:21.564635 end: 2 depthcharge-action (duration 00:01:27) [common]
6647 11:04:21.564724 start: 3 lava-test-retry (timeout 00:05:00) [common]
6648 11:04:21.564810 start: 3.1 lava-test-shell (timeout 00:05:00) [common]
6649 11:04:21.564882 Using namespace: common
6650 11:04:21.564955 Sending line: '#'
6652 11:04:21.665381 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:05:00)
6653 11:04:21.671211 / # #
6654 11:04:21.671473 Using /lava-14786787
6655 11:04:21.671542 Sending line: 'export SHELL=/bin/sh'
6657 11:04:21.776641 / # export SHELL=/bin/sh
6658 11:04:21.776895 Sending line: '. /lava-14786787/environment'
6660 11:04:21.882009 / # . /lava-14786787/environment
6661 11:04:21.882278 Sending line: '/lava-14786787/bin/lava-test-runner /lava-14786787/0'
6663 11:04:21.982761 Test shell timeout: 10s (minimum of the action and connection timeout)
6664 11:04:21.987839 / # /lava-14786787/bin/lava-test-runner /lava-14786787/0
6665 11:04:22.010295 + export TESTRUN_ID=0_cros-ec
6666 11:04:22.017361 + c<8>[ 13.549531] <LAVA_SIGNAL_STARTRUN 0_cros-ec 14786787_1.5.2.3.1>
6667 11:04:22.017657 Received signal: <STARTRUN> 0_cros-ec 14786787_1.5.2.3.1
6668 11:04:22.017762 Starting test lava.0_cros-ec (14786787_1.5.2.3.1)
6669 11:04:22.017890 Skipping test definition patterns.
6670 11:04:22.020636 d /lava-14786787/0/tests/0_cros-ec
6671 11:04:22.023935 + cat uuid
6672 11:04:22.024041 + UUID=14786787_1.5.2.3.1
6673 11:04:22.027225 + set +x
6674 11:04:22.030607 + python3 -m cros.runners.lava_runner -v
6675 11:04:22.634101 test_cros_ec_accel_iio_abi (cros.tests.cros_ec_accel.TestCrosECAccel.test_cros_ec_accel_iio_abi)
6676 11:04:22.641018 Checks the cros-ec accelerometer IIO ABI. ... skipped 'No cros-ec-accel found'
6677 11:04:22.641484
6678 11:04:22.647257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_accel_iio_abi RESULT=skip>
6679 11:04:22.647968 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_accel_iio_abi RESULT=skip
6681 11:04:22.660183 test_cros_ec_accel_iio_data_is_valid (cros.tests.cros_ec_accel.TestCrosECAccel.test_cros_ec_accel_iio_data_is_valid)
6682 11:04:22.666994 Validates accelerometer data by computing the magnitude. If the ... skipped 'No accelerometer found'
6683 11:04:22.667462
6684 11:04:22.676891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_accel_iio_data_is_valid RESULT=skip>
6685 11:04:22.677556 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_accel_iio_data_is_valid RESULT=skip
6687 11:04:22.683889 test_cros_ec_gyro_iio_abi (cros.tests.cros_ec_gyro.TestCrosECGyro.test_cros_ec_gyro_iio_abi)
6688 11:04:22.690062 Checks the cros-ec gyroscope IIO ABI. ... skipped 'No cros-ec-gyro found'
6689 11:04:22.690574
6690 11:04:22.696900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_gyro_iio_abi RESULT=skip>
6691 11:04:22.697533 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_gyro_iio_abi RESULT=skip
6693 11:04:22.703046 test_cros_ec_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_abi)
6694 11:04:22.709910 Checks the standard ABI for the main Embedded Controller. ... ok
6695 11:04:22.710360
6696 11:04:22.716542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_abi RESULT=pass>
6697 11:04:22.717222 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_abi RESULT=pass
6699 11:04:22.722849 test_cros_ec_chardev (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_chardev)
6700 11:04:22.729877 Checks the main Embedded controller character device. ... ok
6701 11:04:22.730268
6702 11:04:22.736142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_chardev RESULT=pass>
6703 11:04:22.736798 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_chardev RESULT=pass
6705 11:04:22.742627 test_cros_ec_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_hello)
6706 11:04:22.749996 Checks basic comunication with the main Embedded controller. ... ok
6707 11:04:22.750465
6708 11:04:22.752879 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_hello RESULT=pass
6710 11:04:22.755965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_hello RESULT=pass>
6711 11:04:22.762881 test_cros_fp_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_abi)
6712 11:04:22.769423 Checks the standard ABI for the Fingerprint EC. ... skipped 'MCU cros_fp not supported'
6713 11:04:22.769899
6714 11:04:22.776197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_abi RESULT=skip>
6715 11:04:22.777143 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_abi RESULT=skip
6717 11:04:22.782519 test_cros_fp_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_hello)
6718 11:04:22.789716 Checks basic comunication with the fingerprint controller. ... skipped 'MCU cros_fp not found'
6719 11:04:22.790181
6720 11:04:22.796202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_hello RESULT=skip>
6721 11:04:22.796999 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_hello RESULT=skip
6723 11:04:22.802493 test_cros_fp_reboot (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_reboot)
6724 11:04:22.812359 Test reboot command on Fingerprint MCU. ... skipped 'MCU cros_fp not found'
6725 11:04:22.812777
6726 11:04:22.815559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_reboot RESULT=skip>
6727 11:04:22.816173 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_reboot RESULT=skip
6729 11:04:22.822187 test_cros_pd_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_pd_abi)
6730 11:04:22.832171 Checks the standard ABI for the Power Delivery EC. ... skipped 'MCU cros_pd not supported'
6731 11:04:22.832664
6732 11:04:22.839211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_pd_abi RESULT=skip>
6733 11:04:22.839944 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_pd_abi RESULT=skip
6735 11:04:22.845285 test_cros_pd_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_pd_hello)
6736 11:04:22.852380 Checks basic comunication with the power delivery controller. ... skipped 'MCU cros_pd not found'
6737 11:04:22.856007
6738 11:04:22.858793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_pd_hello RESULT=skip>
6739 11:04:22.859439 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_pd_hello RESULT=skip
6741 11:04:22.865350 test_cros_tp_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_tp_abi)
6742 11:04:22.875424 Checks the standard ABI for the Touchpad EC. ... skipped 'MCU cros_tp not supported'
6743 11:04:22.875963
6744 11:04:22.878514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_tp_abi RESULT=skip>
6745 11:04:22.879336 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_tp_abi RESULT=skip
6747 11:04:22.888808 test_cros_tp_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_tp_hello)
6748 11:04:22.895346 Checks basic comunication with the touchpad controller. ... skipped 'MCU cros_tp not found'
6749 11:04:22.895813
6750 11:04:22.902044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_tp_hello RESULT=skip>
6751 11:04:22.902747 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_tp_hello RESULT=skip
6753 11:04:22.908545 test_cros_ec_pwm_backlight (cros.tests.cros_ec_pwm.TestCrosECPWM.test_cros_ec_pwm_backlight)
6754 11:04:22.918216 Check that the backlight is connected to a pwm of the EC and that ... skipped 'No backlight pwm found'
6755 11:04:22.918632
6756 11:04:22.925356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_pwm_backlight RESULT=skip>
6757 11:04:22.926010 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_pwm_backlight RESULT=skip
6759 11:04:22.935617 test_cros_ec_battery_abi (cros.tests.cros_ec_power.TestCrosECPower.test_cros_ec_battery_abi)
6760 11:04:22.938208 Check the cros battery ABI. ... skipped 'No BAT found'
6761 11:04:22.942096
6762 11:04:22.948305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_battery_abi RESULT=skip>
6763 11:04:22.949067 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_battery_abi RESULT=skip
6765 11:04:22.955196 test_cros_ec_usbpd_charger_abi (cros.tests.cros_ec_power.TestCrosECPower.test_cros_ec_usbpd_charger_abi)
6766 11:04:22.964838 Check the cros USBPD charger ABI. ... skipped 'No CROS_USBPD_CHARGER found'
6767 11:04:22.965230
6768 11:04:22.971276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_usbpd_charger_abi RESULT=skip>
6769 11:04:22.971909 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_usbpd_charger_abi RESULT=skip
6771 11:04:22.977790 test_cros_ec_rtc_abi (cros.tests.cros_ec_rtc.TestCrosECRTC.test_cros_ec_rtc_abi)
6772 11:04:22.985167 Check the cros RTC ABI. ... skipped 'EC_FEATURE_RTC not supported, skipping'
6773 11:04:22.985665
6774 11:04:22.991318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_rtc_abi RESULT=skip>
6775 11:04:22.992007 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_rtc_abi RESULT=skip
6777 11:04:23.001647 test_cros_ec_extcon_usbc_abi (cros.tests.cros_ec_extcon.TestCrosECextcon.test_cros_ec_extcon_usbc_abi)
6778 11:04:23.008237 Checks the cros-ec extcon ABI. ... skipped 'No extcon device found'
6779 11:04:23.008741
6780 11:04:23.014808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_extcon_usbc_abi RESULT=skip>
6781 11:04:23.015200
6782 11:04:23.015733 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_extcon_usbc_abi RESULT=skip
6784 11:04:23.024410 ----------------------------------------------------------<8>[ 14.555705] <LAVA_SIGNAL_ENDRUN 0_cros-ec 14786787_1.5.2.3.1>
6785 11:04:23.025166 Received signal: <ENDRUN> 0_cros-ec 14786787_1.5.2.3.1
6786 11:04:23.025546 Ending use of test pattern.
6787 11:04:23.025830 Ending test lava.0_cros-ec (14786787_1.5.2.3.1), duration 1.01
6789 11:04:23.027652 ------------
6790 11:04:23.028038 Ran 18 tests in 0.350s
6791 11:04:23.028337
6792 11:04:23.031228 OK (skipped=15)
6793 11:04:23.031688 + set +x
6794 11:04:23.034279 <LAVA_TEST_RUNNER EXIT>
6795 11:04:23.034889 ok: lava_test_shell seems to have completed
6796 11:04:23.035692 test_cros_ec_accel_iio_abi: skip
test_cros_ec_accel_iio_data_is_valid: skip
test_cros_ec_gyro_iio_abi: skip
test_cros_ec_abi: pass
test_cros_ec_chardev: pass
test_cros_ec_hello: pass
test_cros_fp_abi: skip
test_cros_fp_hello: skip
test_cros_fp_reboot: skip
test_cros_pd_abi: skip
test_cros_pd_hello: skip
test_cros_tp_abi: skip
test_cros_tp_hello: skip
test_cros_ec_pwm_backlight: skip
test_cros_ec_battery_abi: skip
test_cros_ec_usbpd_charger_abi: skip
test_cros_ec_rtc_abi: skip
test_cros_ec_extcon_usbc_abi: skip
6797 11:04:23.036116 end: 3.1 lava-test-shell (duration 00:00:01) [common]
6798 11:04:23.036528 end: 3 lava-test-retry (duration 00:00:01) [common]
6799 11:04:23.036944 start: 4 finalize (timeout 00:08:03) [common]
6800 11:04:23.037353 start: 4.1 power-off (timeout 00:00:30) [common]
6801 11:04:23.037953 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
6802 11:04:25.165714 >> Command sent successfully.
6803 11:04:25.173606 Returned 0 in 2 seconds
6804 11:04:25.173754 end: 4.1 power-off (duration 00:00:02) [common]
6806 11:04:25.173964 start: 4.2 read-feedback (timeout 00:08:01) [common]
6807 11:04:25.174106 Listened to connection for namespace 'common' for up to 1s
6808 11:04:26.175198 Finalising connection for namespace 'common'
6809 11:04:26.175384 Disconnecting from shell: Finalise
6810 11:04:26.175486 / #
6811 11:04:26.275832 end: 4.2 read-feedback (duration 00:00:01) [common]
6812 11:04:26.276035 end: 4 finalize (duration 00:00:03) [common]
6813 11:04:26.276210 Cleaning after the job
6814 11:04:26.276371 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786787/tftp-deploy-lr8rpyez/ramdisk
6815 11:04:26.285392 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786787/tftp-deploy-lr8rpyez/kernel
6816 11:04:26.308344 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786787/tftp-deploy-lr8rpyez/dtb
6817 11:04:26.308613 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14786787/tftp-deploy-lr8rpyez/modules
6818 11:04:26.316277 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14786787
6819 11:04:26.414691 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14786787
6820 11:04:26.414843 Job finished correctly