Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 02:50:28.642738 lava-dispatcher, installed at version: 2022.10
2 02:50:28.642911 start: 0 validate
3 02:50:28.643038 Start time: 2022-11-16 02:50:28.643031+00:00 (UTC)
4 02:50:28.643165 Using caching service: 'http://localhost/cache/?uri=%s'
5 02:50:28.643292 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221107.1%2Fx86%2Frootfs.cpio.gz exists
6 02:50:28.935308 Using caching service: 'http://localhost/cache/?uri=%s'
7 02:50:28.935514 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.265-cip85-rt27%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 02:50:31.440045 Using caching service: 'http://localhost/cache/?uri=%s'
9 02:50:31.440209 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.265-cip85-rt27%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 02:50:31.448481 validate duration: 2.81
12 02:50:31.448726 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 02:50:31.448831 start: 1.1 download-retry (timeout 00:10:00) [common]
14 02:50:31.448926 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 02:50:31.449024 Not decompressing ramdisk as can be used compressed.
16 02:50:31.449105 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221107.1/x86/rootfs.cpio.gz
17 02:50:31.449168 saving as /var/lib/lava/dispatcher/tmp/7991712/tftp-deploy-7v0wun40/ramdisk/rootfs.cpio.gz
18 02:50:31.449229 total size: 8415749 (8MB)
19 02:50:31.459597 progress 0% (0MB)
20 02:50:31.483257 progress 5% (0MB)
21 02:50:31.504636 progress 10% (0MB)
22 02:50:31.525437 progress 15% (1MB)
23 02:50:31.545445 progress 20% (1MB)
24 02:50:31.568158 progress 25% (2MB)
25 02:50:31.589820 progress 30% (2MB)
26 02:50:31.611975 progress 35% (2MB)
27 02:50:31.637800 progress 40% (3MB)
28 02:50:31.668433 progress 45% (3MB)
29 02:50:31.696145 progress 50% (4MB)
30 02:50:31.726481 progress 55% (4MB)
31 02:50:31.756157 progress 60% (4MB)
32 02:50:31.780865 progress 65% (5MB)
33 02:50:31.809073 progress 70% (5MB)
34 02:50:31.823352 progress 75% (6MB)
35 02:50:31.836567 progress 80% (6MB)
36 02:50:31.851705 progress 85% (6MB)
37 02:50:31.866695 progress 90% (7MB)
38 02:50:31.879355 progress 95% (7MB)
39 02:50:31.893950 progress 100% (8MB)
40 02:50:31.894240 8MB downloaded in 0.45s (18.04MB/s)
41 02:50:31.894400 end: 1.1.1 http-download (duration 00:00:00) [common]
43 02:50:31.894694 end: 1.1 download-retry (duration 00:00:00) [common]
44 02:50:31.894810 start: 1.2 download-retry (timeout 00:10:00) [common]
45 02:50:31.894902 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 02:50:31.895009 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.265-cip85-rt27/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 02:50:31.895081 saving as /var/lib/lava/dispatcher/tmp/7991712/tftp-deploy-7v0wun40/kernel/bzImage
48 02:50:31.895143 total size: 9281536 (8MB)
49 02:50:31.895203 No compression specified
50 02:50:31.907497 progress 0% (0MB)
51 02:50:31.957598 progress 5% (0MB)
52 02:50:31.994804 progress 10% (0MB)
53 02:50:32.030064 progress 15% (1MB)
54 02:50:32.060090 progress 20% (1MB)
55 02:50:32.091429 progress 25% (2MB)
56 02:50:32.123481 progress 30% (2MB)
57 02:50:32.151891 progress 35% (3MB)
58 02:50:32.176678 progress 40% (3MB)
59 02:50:32.204966 progress 45% (4MB)
60 02:50:32.228753 progress 50% (4MB)
61 02:50:32.255593 progress 55% (4MB)
62 02:50:32.280272 progress 60% (5MB)
63 02:50:32.309255 progress 65% (5MB)
64 02:50:32.334833 progress 70% (6MB)
65 02:50:32.362439 progress 75% (6MB)
66 02:50:32.386459 progress 80% (7MB)
67 02:50:32.413225 progress 85% (7MB)
68 02:50:32.433690 progress 90% (7MB)
69 02:50:32.462071 progress 95% (8MB)
70 02:50:32.484705 progress 100% (8MB)
71 02:50:32.485646 8MB downloaded in 0.59s (14.99MB/s)
72 02:50:32.486508 end: 1.2.1 http-download (duration 00:00:01) [common]
74 02:50:32.487730 end: 1.2 download-retry (duration 00:00:01) [common]
75 02:50:32.488226 start: 1.3 download-retry (timeout 00:09:59) [common]
76 02:50:32.488713 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 02:50:32.489210 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.265-cip85-rt27/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 02:50:32.489633 saving as /var/lib/lava/dispatcher/tmp/7991712/tftp-deploy-7v0wun40/modules/modules.tar
79 02:50:32.489980 total size: 64728 (0MB)
80 02:50:32.490296 Using unxz to decompress xz
81 02:50:32.516205 progress 50% (0MB)
82 02:50:32.521159 progress 100% (0MB)
83 02:50:32.528342 0MB downloaded in 0.04s (1.61MB/s)
84 02:50:32.528937 end: 1.3.1 http-download (duration 00:00:00) [common]
86 02:50:32.529719 end: 1.3 download-retry (duration 00:00:00) [common]
87 02:50:32.529985 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
88 02:50:32.530250 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
89 02:50:32.530492 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 02:50:32.530728 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
91 02:50:32.531153 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f
92 02:50:32.531443 makedir: /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin
93 02:50:32.531675 makedir: /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/tests
94 02:50:32.531897 makedir: /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/results
95 02:50:32.532176 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-add-keys
96 02:50:32.532533 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-add-sources
97 02:50:32.532892 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-background-process-start
98 02:50:32.533210 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-background-process-stop
99 02:50:32.533544 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-common-functions
100 02:50:32.533851 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-echo-ipv4
101 02:50:32.534166 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-install-packages
102 02:50:32.534476 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-installed-packages
103 02:50:32.534777 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-os-build
104 02:50:32.535081 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-probe-channel
105 02:50:32.535389 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-probe-ip
106 02:50:32.535691 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-target-ip
107 02:50:32.535993 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-target-mac
108 02:50:32.536295 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-target-storage
109 02:50:32.536604 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-test-case
110 02:50:32.536905 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-test-event
111 02:50:32.537210 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-test-feedback
112 02:50:32.537560 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-test-raise
113 02:50:32.537898 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-test-reference
114 02:50:32.538210 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-test-runner
115 02:50:32.538513 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-test-set
116 02:50:32.538813 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-test-shell
117 02:50:32.539124 Updating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-install-packages (oe)
118 02:50:32.539439 Updating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/bin/lava-installed-packages (oe)
119 02:50:32.539715 Creating /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/environment
120 02:50:32.539959 LAVA metadata
121 02:50:32.540182 - LAVA_JOB_ID=7991712
122 02:50:32.540383 - LAVA_DISPATCHER_IP=192.168.201.1
123 02:50:32.540671 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
124 02:50:32.540862 skipped lava-vland-overlay
125 02:50:32.541079 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 02:50:32.541319 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
127 02:50:32.541525 skipped lava-multinode-overlay
128 02:50:32.541738 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 02:50:32.541969 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
130 02:50:32.542190 Loading test definitions
131 02:50:32.542457 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
132 02:50:32.542666 Using /lava-7991712 at stage 0
133 02:50:32.543387 uuid=7991712_1.4.2.3.1 testdef=None
134 02:50:32.543644 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 02:50:32.543938 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
136 02:50:32.545294 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 02:50:32.545941 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
139 02:50:32.547633 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 02:50:32.548362 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
142 02:50:32.550000 runner path: /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/0/tests/0_dmesg test_uuid 7991712_1.4.2.3.1
143 02:50:32.550336 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 02:50:32.550918 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
146 02:50:32.551102 Using /lava-7991712 at stage 1
147 02:50:32.551645 uuid=7991712_1.4.2.3.5 testdef=None
148 02:50:32.551851 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 02:50:32.552049 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
150 02:50:32.553037 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 02:50:32.553561 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
153 02:50:32.554846 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 02:50:32.555292 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
156 02:50:32.556320 runner path: /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/1/tests/1_bootrr test_uuid 7991712_1.4.2.3.5
157 02:50:32.556585 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 02:50:32.556977 Creating lava-test-runner.conf files
160 02:50:32.557101 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/0 for stage 0
161 02:50:32.557255 - 0_dmesg
162 02:50:32.557412 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7991712/lava-overlay-q5jcva2f/lava-7991712/1 for stage 1
163 02:50:32.557569 - 1_bootrr
164 02:50:32.557740 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 02:50:32.557914 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
166 02:50:32.567339 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 02:50:32.567514 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
168 02:50:32.567642 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 02:50:32.567764 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 02:50:32.567886 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
171 02:50:32.752830 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 02:50:32.753165 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
173 02:50:32.753276 extracting modules file /var/lib/lava/dispatcher/tmp/7991712/tftp-deploy-7v0wun40/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7991712/extract-overlay-ramdisk-45o8assf/ramdisk
174 02:50:32.757503 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 02:50:32.757617 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
176 02:50:32.757708 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7991712/compress-overlay-w7bihxs1/overlay-1.4.2.4.tar.gz to ramdisk
177 02:50:32.757782 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7991712/compress-overlay-w7bihxs1/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7991712/extract-overlay-ramdisk-45o8assf/ramdisk
178 02:50:32.761671 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 02:50:32.761780 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
180 02:50:32.761877 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 02:50:32.761970 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
182 02:50:32.762057 Building ramdisk /var/lib/lava/dispatcher/tmp/7991712/extract-overlay-ramdisk-45o8assf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7991712/extract-overlay-ramdisk-45o8assf/ramdisk
183 02:50:32.824239 >> 48237 blocks
184 02:50:33.567396 rename /var/lib/lava/dispatcher/tmp/7991712/extract-overlay-ramdisk-45o8assf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7991712/tftp-deploy-7v0wun40/ramdisk/ramdisk.cpio.gz
185 02:50:33.567789 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 02:50:33.567911 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
187 02:50:33.568018 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
188 02:50:33.568111 No mkimage arch provided, not using FIT.
189 02:50:33.568207 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 02:50:33.568296 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 02:50:33.568399 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 02:50:33.568502 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
193 02:50:33.568588 No LXC device requested
194 02:50:33.568674 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 02:50:33.568771 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
196 02:50:33.568853 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 02:50:33.568927 Checking files for TFTP limit of 4294967296 bytes.
198 02:50:33.569315 end: 1 tftp-deploy (duration 00:00:02) [common]
199 02:50:33.569434 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 02:50:33.569536 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 02:50:33.569662 substitutions:
202 02:50:33.569733 - {DTB}: None
203 02:50:33.569799 - {INITRD}: 7991712/tftp-deploy-7v0wun40/ramdisk/ramdisk.cpio.gz
204 02:50:33.569861 - {KERNEL}: 7991712/tftp-deploy-7v0wun40/kernel/bzImage
205 02:50:33.569921 - {LAVA_MAC}: None
206 02:50:33.569981 - {PRESEED_CONFIG}: None
207 02:50:33.570039 - {PRESEED_LOCAL}: None
208 02:50:33.570096 - {RAMDISK}: 7991712/tftp-deploy-7v0wun40/ramdisk/ramdisk.cpio.gz
209 02:50:33.570153 - {ROOT_PART}: None
210 02:50:33.570209 - {ROOT}: None
211 02:50:33.570265 - {SERVER_IP}: 192.168.201.1
212 02:50:33.570321 - {TEE}: None
213 02:50:33.570377 Parsed boot commands:
214 02:50:33.570432 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 02:50:33.570583 Parsed boot commands: tftpboot 192.168.201.1 7991712/tftp-deploy-7v0wun40/kernel/bzImage 7991712/tftp-deploy-7v0wun40/kernel/cmdline 7991712/tftp-deploy-7v0wun40/ramdisk/ramdisk.cpio.gz
216 02:50:33.570676 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 02:50:33.570767 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 02:50:33.570867 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 02:50:33.570957 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 02:50:33.571028 Not connected, no need to disconnect.
221 02:50:33.571103 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 02:50:33.571184 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 02:50:33.571252 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-13'
224 02:50:33.573630 Setting prompt string to ['lava-test: # ']
225 02:50:33.573917 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 02:50:33.574024 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 02:50:33.574126 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 02:50:33.574221 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 02:50:33.574399 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
230 02:50:33.593003 >> Command sent successfully.
231 02:50:33.594871 Returned 0 in 0 seconds
232 02:50:33.695584 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 02:50:33.696491 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 02:50:33.696665 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 02:50:33.696811 Setting prompt string to 'Starting depthcharge on Voema...'
237 02:50:33.696925 Changing prompt to 'Starting depthcharge on Voema...'
238 02:50:33.697041 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 02:50:33.697463 [Enter `^Ec?' for help]
240 02:50:40.855615
241 02:50:40.856191
242 02:50:40.865598 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 02:50:40.868912 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
244 02:50:40.875546 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 02:50:40.878824 CPU: AES supported, TXT NOT supported, VT supported
246 02:50:40.885667 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 02:50:40.889308 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 02:50:40.896371 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 02:50:40.899593 VBOOT: Loading verstage.
250 02:50:40.902811 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 02:50:40.909058 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 02:50:40.912415 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 02:50:40.922445 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 02:50:40.929159 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 02:50:40.929347
256 02:50:40.929452
257 02:50:40.939403 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 02:50:40.956358 Probing TPM: . done!
259 02:50:40.959963 TPM ready after 0 ms
260 02:50:40.962857 Connected to device vid:did:rid of 1ae0:0028:00
261 02:50:40.974466 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
262 02:50:40.981100 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 02:50:40.984284 Initialized TPM device CR50 revision 0
264 02:50:41.037100 tlcl_send_startup: Startup return code is 0
265 02:50:41.037686 TPM: setup succeeded
266 02:50:41.051410 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 02:50:41.065376 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 02:50:41.078271 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 02:50:41.088195 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 02:50:41.091792 Chrome EC: UHEPI supported
271 02:50:41.095329 Phase 1
272 02:50:41.098357 FMAP: area GBB found @ 1805000 (458752 bytes)
273 02:50:41.108555 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 02:50:41.114794 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 02:50:41.121612 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 02:50:41.127960 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 02:50:41.131117 Recovery requested (1009000e)
278 02:50:41.134908 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 02:50:41.146387 tlcl_extend: response is 0
280 02:50:41.152960 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 02:50:41.162506 tlcl_extend: response is 0
282 02:50:41.169438 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 02:50:41.176081 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 02:50:41.182432 BS: verstage times (exec / console): total (unknown) / 142 ms
285 02:50:41.182874
286 02:50:41.183223
287 02:50:41.195718 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 02:50:41.202368 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 02:50:41.205707 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 02:50:41.209037 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 02:50:41.215507 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 02:50:41.218749 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 02:50:41.222229 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
294 02:50:41.225445 TCO_STS: 0000 0000
295 02:50:41.228768 GEN_PMCON: d0015038 00002200
296 02:50:41.231928 GBLRST_CAUSE: 00000000 00000000
297 02:50:41.235398 HPR_CAUSE0: 00000000
298 02:50:41.235892 prev_sleep_state 5
299 02:50:41.238086 Boot Count incremented to 10091
300 02:50:41.245275 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 02:50:41.251237 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 02:50:41.261000 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 02:50:41.268050 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 02:50:41.271303 Chrome EC: UHEPI supported
305 02:50:41.277706 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 02:50:41.289530 Probing TPM: done!
307 02:50:41.295976 Connected to device vid:did:rid of 1ae0:0028:00
308 02:50:41.305953 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
309 02:50:41.309267 Initialized TPM device CR50 revision 0
310 02:50:41.324242 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 02:50:41.331013 MRC: Hash idx 0x100b comparison successful.
312 02:50:41.334255 MRC cache found, size faa8
313 02:50:41.334329 bootmode is set to: 2
314 02:50:41.337573 SPD index = 2
315 02:50:41.343887 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 02:50:41.347560 SPD: module type is LPDDR4X
317 02:50:41.350710 SPD: module part number is MT53D1G64D4NW-046
318 02:50:41.357241 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
319 02:50:41.360339 SPD: device width 16 bits, bus width 16 bits
320 02:50:41.367426 SPD: module size is 2048 MB (per channel)
321 02:50:41.797043 CBMEM:
322 02:50:41.800342 IMD: root @ 0x76fff000 254 entries.
323 02:50:41.804078 IMD: root @ 0x76ffec00 62 entries.
324 02:50:41.806992 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 02:50:41.813472 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 02:50:41.816883 External stage cache:
327 02:50:41.820261 IMD: root @ 0x7b3ff000 254 entries.
328 02:50:41.823977 IMD: root @ 0x7b3fec00 62 entries.
329 02:50:41.838569 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 02:50:41.845288 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 02:50:41.851640 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 02:50:41.865413 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 02:50:41.871901 cse_lite: Skip switching to RW in the recovery path
334 02:50:41.872449 8 DIMMs found
335 02:50:41.872890 SMM Memory Map
336 02:50:41.874957 SMRAM : 0x7b000000 0x800000
337 02:50:41.878211
338 02:50:41.881759 Subregion 0: 0x7b000000 0x200000
339 02:50:41.884974 Subregion 1: 0x7b200000 0x200000
340 02:50:41.888687 Subregion 2: 0x7b400000 0x400000
341 02:50:41.889230 top_of_ram = 0x77000000
342 02:50:41.895477 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
343 02:50:41.901841 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
344 02:50:41.905222 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
345 02:50:41.911706 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 02:50:41.918192 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
347 02:50:41.925059 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
348 02:50:41.934876 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
349 02:50:41.938454 Processing 211 relocs. Offset value of 0x74c0b000
350 02:50:41.941536
351 02:50:41.948176 BS: romstage times (exec / console): total (unknown) / 277 ms
352 02:50:41.954196
353 02:50:41.954773
354 02:50:41.961466 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
355 02:50:41.968409 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
356 02:50:41.974812 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
357 02:50:41.981265 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
358 02:50:41.991148 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
359 02:50:41.997368 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
360 02:50:42.040051 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
361 02:50:42.046682 Processing 5008 relocs. Offset value of 0x75d98000
362 02:50:42.050128 BS: postcar times (exec / console): total (unknown) / 59 ms
363 02:50:42.053458
364 02:50:42.053586
365 02:50:42.063051 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
366 02:50:42.063227 Normal boot
367 02:50:42.066328 FW_CONFIG value is 0x804c02
368 02:50:42.069939 PCI: 00:07.0 disabled by fw_config
369 02:50:42.073217 PCI: 00:07.1 disabled by fw_config
370 02:50:42.076650 PCI: 00:0d.2 disabled by fw_config
371 02:50:42.083166 PCI: 00:1c.7 disabled by fw_config
372 02:50:42.086583 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 02:50:42.093163 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
374 02:50:42.096967 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
375 02:50:42.103638 GENERIC: 0.0 disabled by fw_config
376 02:50:42.106749 GENERIC: 1.0 disabled by fw_config
377 02:50:42.109888 fw_config match found: DB_USB=USB3_ACTIVE
378 02:50:42.113345 fw_config match found: DB_USB=USB3_ACTIVE
379 02:50:42.116816 fw_config match found: DB_USB=USB3_ACTIVE
380 02:50:42.123340 fw_config match found: DB_USB=USB3_ACTIVE
381 02:50:42.126912 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
382 02:50:42.132926 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
383 02:50:42.136926
384 02:50:42.143073 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
385 02:50:42.150072 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
386 02:50:42.152640 microcode: sig=0x806c1 pf=0x80 revision=0x86
387 02:50:42.159368 microcode: Update skipped, already up-to-date
388 02:50:42.166551 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
389 02:50:42.193952 Detected 4 core, 8 thread CPU.
390 02:50:42.196995 Setting up SMI for CPU
391 02:50:42.201048 IED base = 0x7b400000
392 02:50:42.201653 IED size = 0x00400000
393 02:50:42.204210 Will perform SMM setup.
394 02:50:42.210709 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
395 02:50:42.217363 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
396 02:50:42.223877 Processing 16 relocs. Offset value of 0x00030000
397 02:50:42.227481 Attempting to start 7 APs
398 02:50:42.230255 Waiting for 10ms after sending INIT.
399 02:50:42.246080 Waiting for 1st SIPI to complete...done.
400 02:50:42.246674 AP: slot 1 apic_id 1.
401 02:50:42.249509 AP: slot 4 apic_id 4.
402 02:50:42.253225 AP: slot 7 apic_id 5.
403 02:50:42.253945 AP: slot 5 apic_id 6.
404 02:50:42.259671 Waiting for 2nd SIPI to complete...done.
405 02:50:42.260269 AP: slot 6 apic_id 2.
406 02:50:42.262926 AP: slot 2 apic_id 7.
407 02:50:42.265807 AP: slot 3 apic_id 3.
408 02:50:42.272199 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
409 02:50:42.279389 Processing 13 relocs. Offset value of 0x00038000
410 02:50:42.279833 Unable to locate Global NVS
411 02:50:42.282641
412 02:50:42.289163 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
413 02:50:42.292586 Installing permanent SMM handler to 0x7b000000
414 02:50:42.302620 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
415 02:50:42.305866 Processing 794 relocs. Offset value of 0x7b010000
416 02:50:42.315766 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
417 02:50:42.318925 Processing 13 relocs. Offset value of 0x7b008000
418 02:50:42.325223 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
419 02:50:42.332181 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
420 02:50:42.335647 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
421 02:50:42.341836 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
422 02:50:42.348853 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
423 02:50:42.355062 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
424 02:50:42.362310 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
425 02:50:42.362862 Unable to locate Global NVS
426 02:50:42.371797 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
427 02:50:42.374972 Clearing SMI status registers
428 02:50:42.375419 SMI_STS: PM1
429 02:50:42.378466 PM1_STS: PWRBTN
430 02:50:42.385408 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
431 02:50:42.388670 In relocation handler: CPU 0
432 02:50:42.391622 New SMBASE=0x7b000000 IEDBASE=0x7b400000
433 02:50:42.398182 Writing SMRR. base = 0x7b000006, mask=0xff800c00
434 02:50:42.398736 Relocation complete.
435 02:50:42.408379 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
436 02:50:42.408932 In relocation handler: CPU 1
437 02:50:42.411529
438 02:50:42.414771 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
439 02:50:42.415321 Relocation complete.
440 02:50:42.425297 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
441 02:50:42.425880 In relocation handler: CPU 6
442 02:50:42.431555 New SMBASE=0x7affe800 IEDBASE=0x7b400000
443 02:50:42.435114 Writing SMRR. base = 0x7b000006, mask=0xff800c00
444 02:50:42.438445 Relocation complete.
445 02:50:42.444933 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
446 02:50:42.447667 In relocation handler: CPU 3
447 02:50:42.451753 New SMBASE=0x7afff400 IEDBASE=0x7b400000
448 02:50:42.454839 Relocation complete.
449 02:50:42.461393 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
450 02:50:42.464473 In relocation handler: CPU 7
451 02:50:42.468507 New SMBASE=0x7affe400 IEDBASE=0x7b400000
452 02:50:42.471338 Relocation complete.
453 02:50:42.477787 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
454 02:50:42.480722 In relocation handler: CPU 4
455 02:50:42.484341 New SMBASE=0x7afff000 IEDBASE=0x7b400000
456 02:50:42.491011 Writing SMRR. base = 0x7b000006, mask=0xff800c00
457 02:50:42.491454 Relocation complete.
458 02:50:42.497507 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
459 02:50:42.500585 In relocation handler: CPU 5
460 02:50:42.507562 New SMBASE=0x7affec00 IEDBASE=0x7b400000
461 02:50:42.510713 Writing SMRR. base = 0x7b000006, mask=0xff800c00
462 02:50:42.513916 Relocation complete.
463 02:50:42.520455 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
464 02:50:42.523612 In relocation handler: CPU 2
465 02:50:42.527169 New SMBASE=0x7afff800 IEDBASE=0x7b400000
466 02:50:42.530182 Relocation complete.
467 02:50:42.530680 Initializing CPU #0
468 02:50:42.533538 CPU: vendor Intel device 806c1
469 02:50:42.540153 CPU: family 06, model 8c, stepping 01
470 02:50:42.540597 Clearing out pending MCEs
471 02:50:42.543699 Setting up local APIC...
472 02:50:42.546720 apic_id: 0x00 done.
473 02:50:42.550217 Turbo is available but hidden
474 02:50:42.553444 Turbo is available and visible
475 02:50:42.557021 microcode: Update skipped, already up-to-date
476 02:50:42.560062 CPU #0 initialized
477 02:50:42.560506 Initializing CPU #6
478 02:50:42.563382 Initializing CPU #3
479 02:50:42.566502 CPU: vendor Intel device 806c1
480 02:50:42.569869 CPU: family 06, model 8c, stepping 01
481 02:50:42.573165 CPU: vendor Intel device 806c1
482 02:50:42.577208 CPU: family 06, model 8c, stepping 01
483 02:50:42.580107 Clearing out pending MCEs
484 02:50:42.583601 Clearing out pending MCEs
485 02:50:42.586541 Setting up local APIC...
486 02:50:42.587004 Initializing CPU #2
487 02:50:42.589984 Initializing CPU #5
488 02:50:42.593276 CPU: vendor Intel device 806c1
489 02:50:42.596388 CPU: family 06, model 8c, stepping 01
490 02:50:42.600004 CPU: vendor Intel device 806c1
491 02:50:42.603596 CPU: family 06, model 8c, stepping 01
492 02:50:42.606805 Clearing out pending MCEs
493 02:50:42.609929 Clearing out pending MCEs
494 02:50:42.610524 Setting up local APIC...
495 02:50:42.613270 apic_id: 0x02 done.
496 02:50:42.616537 Setting up local APIC...
497 02:50:42.617126 Initializing CPU #4
498 02:50:42.619751 Initializing CPU #7
499 02:50:42.623475 CPU: vendor Intel device 806c1
500 02:50:42.627415 CPU: family 06, model 8c, stepping 01
501 02:50:42.630333 CPU: vendor Intel device 806c1
502 02:50:42.634193 CPU: family 06, model 8c, stepping 01
503 02:50:42.637516 Clearing out pending MCEs
504 02:50:42.637966 Clearing out pending MCEs
505 02:50:42.641063 Setting up local APIC...
506 02:50:42.647462 microcode: Update skipped, already up-to-date
507 02:50:42.648006 apic_id: 0x03 done.
508 02:50:42.650920 CPU #6 initialized
509 02:50:42.654086 microcode: Update skipped, already up-to-date
510 02:50:42.657268 Setting up local APIC...
511 02:50:42.660557 apic_id: 0x04 done.
512 02:50:42.661092 Setting up local APIC...
513 02:50:42.663905 apic_id: 0x07 done.
514 02:50:42.667104 apic_id: 0x06 done.
515 02:50:42.670468 microcode: Update skipped, already up-to-date
516 02:50:42.673540 microcode: Update skipped, already up-to-date
517 02:50:42.677146 CPU #2 initialized
518 02:50:42.680168 CPU #5 initialized
519 02:50:42.680654 CPU #3 initialized
520 02:50:42.683484 apic_id: 0x05 done.
521 02:50:42.687684 microcode: Update skipped, already up-to-date
522 02:50:42.693494 microcode: Update skipped, already up-to-date
523 02:50:42.694031 CPU #4 initialized
524 02:50:42.696639 Initializing CPU #1
525 02:50:42.697073 CPU #7 initialized
526 02:50:42.700033 CPU: vendor Intel device 806c1
527 02:50:42.706916 CPU: family 06, model 8c, stepping 01
528 02:50:42.707460 Clearing out pending MCEs
529 02:50:42.710376 Setting up local APIC...
530 02:50:42.713525 apic_id: 0x01 done.
531 02:50:42.716275 microcode: Update skipped, already up-to-date
532 02:50:42.719487 CPU #1 initialized
533 02:50:42.723295 bsp_do_flight_plan done after 461 msecs.
534 02:50:42.726863 CPU: frequency set to 4400 MHz
535 02:50:42.729771 Enabling SMIs.
536 02:50:42.736584 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
537 02:50:42.751384 SATAXPCIE1 indicates PCIe NVMe is present
538 02:50:42.754531 Probing TPM: done!
539 02:50:42.757816 Connected to device vid:did:rid of 1ae0:0028:00
540 02:50:42.768531 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
541 02:50:42.771705 Initialized TPM device CR50 revision 0
542 02:50:42.774609 Enabling S0i3.4
543 02:50:42.781229 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
544 02:50:42.784816 Found a VBT of 8704 bytes after decompression
545 02:50:42.791465 cse_lite: CSE RO boot. HybridStorageMode disabled
546 02:50:42.797608 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
547 02:50:42.873368 FSPS returned 0
548 02:50:42.876298 Executing Phase 1 of FspMultiPhaseSiInit
549 02:50:42.886815 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
550 02:50:42.890245 port C0 DISC req: usage 1 usb3 1 usb2 5
551 02:50:42.893291 Raw Buffer output 0 00000511
552 02:50:42.896952 Raw Buffer output 1 00000000
553 02:50:42.900775 pmc_send_ipc_cmd succeeded
554 02:50:42.907488 port C1 DISC req: usage 1 usb3 2 usb2 3
555 02:50:42.908033 Raw Buffer output 0 00000321
556 02:50:42.910382 Raw Buffer output 1 00000000
557 02:50:42.915246 pmc_send_ipc_cmd succeeded
558 02:50:42.919863 Detected 4 core, 8 thread CPU.
559 02:50:42.923085 Detected 4 core, 8 thread CPU.
560 02:50:43.123313 Display FSP Version Info HOB
561 02:50:43.126498 Reference Code - CPU = a.0.4c.31
562 02:50:43.129709 uCode Version = 0.0.0.86
563 02:50:43.133118 TXT ACM version = ff.ff.ff.ffff
564 02:50:43.136265 Reference Code - ME = a.0.4c.31
565 02:50:43.139399 MEBx version = 0.0.0.0
566 02:50:43.142767 ME Firmware Version = Consumer SKU
567 02:50:43.146318 Reference Code - PCH = a.0.4c.31
568 02:50:43.149402 PCH-CRID Status = Disabled
569 02:50:43.152763 PCH-CRID Original Value = ff.ff.ff.ffff
570 02:50:43.156126 PCH-CRID New Value = ff.ff.ff.ffff
571 02:50:43.159509 OPROM - RST - RAID = ff.ff.ff.ffff
572 02:50:43.162715 PCH Hsio Version = 4.0.0.0
573 02:50:43.166398 Reference Code - SA - System Agent = a.0.4c.31
574 02:50:43.169087 Reference Code - MRC = 2.0.0.1
575 02:50:43.172817 SA - PCIe Version = a.0.4c.31
576 02:50:43.176066 SA-CRID Status = Disabled
577 02:50:43.179229 SA-CRID Original Value = 0.0.0.1
578 02:50:43.182583 SA-CRID New Value = 0.0.0.1
579 02:50:43.185797 OPROM - VBIOS = ff.ff.ff.ffff
580 02:50:43.189026 IO Manageability Engine FW Version = 11.1.4.0
581 02:50:43.192186 PHY Build Version = 0.0.0.e0
582 02:50:43.195493 Thunderbolt(TM) FW Version = 0.0.0.0
583 02:50:43.202829 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
584 02:50:43.206591 ITSS IRQ Polarities Before:
585 02:50:43.206686 IPC0: 0xffffffff
586 02:50:43.210120 IPC1: 0xffffffff
587 02:50:43.210298 IPC2: 0xffffffff
588 02:50:43.213290 IPC3: 0xffffffff
589 02:50:43.213464 ITSS IRQ Polarities After:
590 02:50:43.216839 IPC0: 0xffffffff
591 02:50:43.219897 IPC1: 0xffffffff
592 02:50:43.220046 IPC2: 0xffffffff
593 02:50:43.223249 IPC3: 0xffffffff
594 02:50:43.226468 Found PCIe Root Port #9 at PCI: 00:1d.0.
595 02:50:43.239585 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
596 02:50:43.249289 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
597 02:50:43.262755 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
598 02:50:43.269566 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
599 02:50:43.269928 Enumerating buses...
600 02:50:43.276313 Show all devs... Before device enumeration.
601 02:50:43.276699 Root Device: enabled 1
602 02:50:43.279266 DOMAIN: 0000: enabled 1
603 02:50:43.282623 CPU_CLUSTER: 0: enabled 1
604 02:50:43.286304 PCI: 00:00.0: enabled 1
605 02:50:43.286847 PCI: 00:02.0: enabled 1
606 02:50:43.289830 PCI: 00:04.0: enabled 1
607 02:50:43.292995 PCI: 00:05.0: enabled 1
608 02:50:43.296480 PCI: 00:06.0: enabled 0
609 02:50:43.297020 PCI: 00:07.0: enabled 0
610 02:50:43.299479 PCI: 00:07.1: enabled 0
611 02:50:43.302595 PCI: 00:07.2: enabled 0
612 02:50:43.305673 PCI: 00:07.3: enabled 0
613 02:50:43.306109 PCI: 00:08.0: enabled 1
614 02:50:43.309453 PCI: 00:09.0: enabled 0
615 02:50:43.312925 PCI: 00:0a.0: enabled 0
616 02:50:43.313393 PCI: 00:0d.0: enabled 1
617 02:50:43.315802
618 02:50:43.316318 PCI: 00:0d.1: enabled 0
619 02:50:43.319118 PCI: 00:0d.2: enabled 0
620 02:50:43.322315 PCI: 00:0d.3: enabled 0
621 02:50:43.322750 PCI: 00:0e.0: enabled 0
622 02:50:43.325791 PCI: 00:10.2: enabled 1
623 02:50:43.328979 PCI: 00:10.6: enabled 0
624 02:50:43.332869 PCI: 00:10.7: enabled 0
625 02:50:43.333303 PCI: 00:12.0: enabled 0
626 02:50:43.335723 PCI: 00:12.6: enabled 0
627 02:50:43.338933 PCI: 00:13.0: enabled 0
628 02:50:43.342422 PCI: 00:14.0: enabled 1
629 02:50:43.342857 PCI: 00:14.1: enabled 0
630 02:50:43.345657 PCI: 00:14.2: enabled 1
631 02:50:43.349357 PCI: 00:14.3: enabled 1
632 02:50:43.352650 PCI: 00:15.0: enabled 1
633 02:50:43.353083 PCI: 00:15.1: enabled 1
634 02:50:43.356336 PCI: 00:15.2: enabled 1
635 02:50:43.359659 PCI: 00:15.3: enabled 1
636 02:50:43.360204 PCI: 00:16.0: enabled 1
637 02:50:43.362947
638 02:50:43.363492 PCI: 00:16.1: enabled 0
639 02:50:43.365408 PCI: 00:16.2: enabled 0
640 02:50:43.368990 PCI: 00:16.3: enabled 0
641 02:50:43.369563 PCI: 00:16.4: enabled 0
642 02:50:43.372003
643 02:50:43.372442 PCI: 00:16.5: enabled 0
644 02:50:43.375349 PCI: 00:17.0: enabled 1
645 02:50:43.379218 PCI: 00:19.0: enabled 0
646 02:50:43.379764 PCI: 00:19.1: enabled 1
647 02:50:43.382310 PCI: 00:19.2: enabled 0
648 02:50:43.385376 PCI: 00:1c.0: enabled 1
649 02:50:43.388778 PCI: 00:1c.1: enabled 0
650 02:50:43.389214 PCI: 00:1c.2: enabled 0
651 02:50:43.392249 PCI: 00:1c.3: enabled 0
652 02:50:43.395387 PCI: 00:1c.4: enabled 0
653 02:50:43.398449 PCI: 00:1c.5: enabled 0
654 02:50:43.398889 PCI: 00:1c.6: enabled 1
655 02:50:43.401777 PCI: 00:1c.7: enabled 0
656 02:50:43.405254 PCI: 00:1d.0: enabled 1
657 02:50:43.408683 PCI: 00:1d.1: enabled 0
658 02:50:43.409123 PCI: 00:1d.2: enabled 1
659 02:50:43.412054 PCI: 00:1d.3: enabled 0
660 02:50:43.415573 PCI: 00:1e.0: enabled 1
661 02:50:43.416130 PCI: 00:1e.1: enabled 0
662 02:50:43.418426
663 02:50:43.418890 PCI: 00:1e.2: enabled 1
664 02:50:43.421622 PCI: 00:1e.3: enabled 1
665 02:50:43.425304 PCI: 00:1f.0: enabled 1
666 02:50:43.425905 PCI: 00:1f.1: enabled 0
667 02:50:43.428352 PCI: 00:1f.2: enabled 1
668 02:50:43.431766 PCI: 00:1f.3: enabled 1
669 02:50:43.434730 PCI: 00:1f.4: enabled 0
670 02:50:43.435166 PCI: 00:1f.5: enabled 1
671 02:50:43.438474 PCI: 00:1f.6: enabled 0
672 02:50:43.442045 PCI: 00:1f.7: enabled 0
673 02:50:43.445066 APIC: 00: enabled 1
674 02:50:43.445634 GENERIC: 0.0: enabled 1
675 02:50:43.448078 GENERIC: 0.0: enabled 1
676 02:50:43.451539 GENERIC: 1.0: enabled 1
677 02:50:43.452002 GENERIC: 0.0: enabled 1
678 02:50:43.454892 GENERIC: 1.0: enabled 1
679 02:50:43.458067 USB0 port 0: enabled 1
680 02:50:43.461588 GENERIC: 0.0: enabled 1
681 02:50:43.462134 USB0 port 0: enabled 1
682 02:50:43.464998 GENERIC: 0.0: enabled 1
683 02:50:43.468182 I2C: 00:1a: enabled 1
684 02:50:43.468619 I2C: 00:31: enabled 1
685 02:50:43.471886 I2C: 00:32: enabled 1
686 02:50:43.474883 I2C: 00:10: enabled 1
687 02:50:43.475321 I2C: 00:15: enabled 1
688 02:50:43.478174 GENERIC: 0.0: enabled 0
689 02:50:43.481552 GENERIC: 1.0: enabled 0
690 02:50:43.484629 GENERIC: 0.0: enabled 1
691 02:50:43.485067 SPI: 00: enabled 1
692 02:50:43.488281 SPI: 00: enabled 1
693 02:50:43.491492 PNP: 0c09.0: enabled 1
694 02:50:43.492043 GENERIC: 0.0: enabled 1
695 02:50:43.494759 USB3 port 0: enabled 1
696 02:50:43.497993 USB3 port 1: enabled 1
697 02:50:43.498610 USB3 port 2: enabled 0
698 02:50:43.501258 USB3 port 3: enabled 0
699 02:50:43.504453 USB2 port 0: enabled 0
700 02:50:43.507734 USB2 port 1: enabled 1
701 02:50:43.508269 USB2 port 2: enabled 1
702 02:50:43.510925 USB2 port 3: enabled 0
703 02:50:43.514225 USB2 port 4: enabled 1
704 02:50:43.514668 USB2 port 5: enabled 0
705 02:50:43.517719 USB2 port 6: enabled 0
706 02:50:43.521049 USB2 port 7: enabled 0
707 02:50:43.524241 USB2 port 8: enabled 0
708 02:50:43.524675 USB2 port 9: enabled 0
709 02:50:43.527111 USB3 port 0: enabled 0
710 02:50:43.531134 USB3 port 1: enabled 1
711 02:50:43.531563 USB3 port 2: enabled 0
712 02:50:43.534274 USB3 port 3: enabled 0
713 02:50:43.537439 GENERIC: 0.0: enabled 1
714 02:50:43.540597 GENERIC: 1.0: enabled 1
715 02:50:43.541172 APIC: 01: enabled 1
716 02:50:43.544155 APIC: 07: enabled 1
717 02:50:43.544771 APIC: 03: enabled 1
718 02:50:43.547480 APIC: 04: enabled 1
719 02:50:43.550605 APIC: 06: enabled 1
720 02:50:43.551068 APIC: 02: enabled 1
721 02:50:43.554341 APIC: 05: enabled 1
722 02:50:43.557954 Compare with tree...
723 02:50:43.558499 Root Device: enabled 1
724 02:50:43.560814 DOMAIN: 0000: enabled 1
725 02:50:43.564193 PCI: 00:00.0: enabled 1
726 02:50:43.567155 PCI: 00:02.0: enabled 1
727 02:50:43.567596 PCI: 00:04.0: enabled 1
728 02:50:43.570544 GENERIC: 0.0: enabled 1
729 02:50:43.573916 PCI: 00:05.0: enabled 1
730 02:50:43.577523 PCI: 00:06.0: enabled 0
731 02:50:43.580677 PCI: 00:07.0: enabled 0
732 02:50:43.581222 GENERIC: 0.0: enabled 1
733 02:50:43.583801
734 02:50:43.584243 PCI: 00:07.1: enabled 0
735 02:50:43.587341 GENERIC: 1.0: enabled 1
736 02:50:43.590311 PCI: 00:07.2: enabled 0
737 02:50:43.593810 GENERIC: 0.0: enabled 1
738 02:50:43.597354 PCI: 00:07.3: enabled 0
739 02:50:43.597911 GENERIC: 1.0: enabled 1
740 02:50:43.600399 PCI: 00:08.0: enabled 1
741 02:50:43.603532 PCI: 00:09.0: enabled 0
742 02:50:43.607072 PCI: 00:0a.0: enabled 0
743 02:50:43.610484 PCI: 00:0d.0: enabled 1
744 02:50:43.610926 USB0 port 0: enabled 1
745 02:50:43.613730 USB3 port 0: enabled 1
746 02:50:43.617059 USB3 port 1: enabled 1
747 02:50:43.620261 USB3 port 2: enabled 0
748 02:50:43.623359 USB3 port 3: enabled 0
749 02:50:43.623799 PCI: 00:0d.1: enabled 0
750 02:50:43.626636 PCI: 00:0d.2: enabled 0
751 02:50:43.630002 GENERIC: 0.0: enabled 1
752 02:50:43.633238 PCI: 00:0d.3: enabled 0
753 02:50:43.636408 PCI: 00:0e.0: enabled 0
754 02:50:43.636878 PCI: 00:10.2: enabled 1
755 02:50:43.639729 PCI: 00:10.6: enabled 0
756 02:50:43.643870 PCI: 00:10.7: enabled 0
757 02:50:43.646773 PCI: 00:12.0: enabled 0
758 02:50:43.650076 PCI: 00:12.6: enabled 0
759 02:50:43.650618 PCI: 00:13.0: enabled 0
760 02:50:43.653033 PCI: 00:14.0: enabled 1
761 02:50:43.657283 USB0 port 0: enabled 1
762 02:50:43.660448 USB2 port 0: enabled 0
763 02:50:43.663335 USB2 port 1: enabled 1
764 02:50:43.666390 USB2 port 2: enabled 1
765 02:50:43.666829 USB2 port 3: enabled 0
766 02:50:43.669768 USB2 port 4: enabled 1
767 02:50:43.673487 USB2 port 5: enabled 0
768 02:50:43.676890 USB2 port 6: enabled 0
769 02:50:43.680022 USB2 port 7: enabled 0
770 02:50:43.680566 USB2 port 8: enabled 0
771 02:50:43.683338 USB2 port 9: enabled 0
772 02:50:43.686816 USB3 port 0: enabled 0
773 02:50:43.689720 USB3 port 1: enabled 1
774 02:50:43.693425 USB3 port 2: enabled 0
775 02:50:43.696400 USB3 port 3: enabled 0
776 02:50:43.696858 PCI: 00:14.1: enabled 0
777 02:50:43.699683 PCI: 00:14.2: enabled 1
778 02:50:43.702925 PCI: 00:14.3: enabled 1
779 02:50:43.706111 GENERIC: 0.0: enabled 1
780 02:50:43.709878 PCI: 00:15.0: enabled 1
781 02:50:43.710414 I2C: 00:1a: enabled 1
782 02:50:43.712893 I2C: 00:31: enabled 1
783 02:50:43.716186 I2C: 00:32: enabled 1
784 02:50:43.719551 PCI: 00:15.1: enabled 1
785 02:50:43.720137 I2C: 00:10: enabled 1
786 02:50:43.722781
787 02:50:43.723218 PCI: 00:15.2: enabled 1
788 02:50:43.725877 PCI: 00:15.3: enabled 1
789 02:50:43.729516 PCI: 00:16.0: enabled 1
790 02:50:43.732770 PCI: 00:16.1: enabled 0
791 02:50:43.733200 PCI: 00:16.2: enabled 0
792 02:50:43.736021 PCI: 00:16.3: enabled 0
793 02:50:43.739496 PCI: 00:16.4: enabled 0
794 02:50:43.742947 PCI: 00:16.5: enabled 0
795 02:50:43.745858 PCI: 00:17.0: enabled 1
796 02:50:43.746291 PCI: 00:19.0: enabled 0
797 02:50:43.749401 PCI: 00:19.1: enabled 1
798 02:50:43.752314 I2C: 00:15: enabled 1
799 02:50:43.755920 PCI: 00:19.2: enabled 0
800 02:50:43.759326 PCI: 00:1d.0: enabled 1
801 02:50:43.759759 GENERIC: 0.0: enabled 1
802 02:50:43.762679 PCI: 00:1e.0: enabled 1
803 02:50:43.765806 PCI: 00:1e.1: enabled 0
804 02:50:43.769193 PCI: 00:1e.2: enabled 1
805 02:50:43.769644 SPI: 00: enabled 1
806 02:50:43.772664
807 02:50:43.773203 PCI: 00:1e.3: enabled 1
808 02:50:43.775621 SPI: 00: enabled 1
809 02:50:43.779265 PCI: 00:1f.0: enabled 1
810 02:50:43.782654 PNP: 0c09.0: enabled 1
811 02:50:43.783194 PCI: 00:1f.1: enabled 0
812 02:50:43.785588 PCI: 00:1f.2: enabled 1
813 02:50:43.789245 GENERIC: 0.0: enabled 1
814 02:50:43.792530 GENERIC: 0.0: enabled 1
815 02:50:43.795758 GENERIC: 1.0: enabled 1
816 02:50:43.798921 PCI: 00:1f.3: enabled 1
817 02:50:43.799453 PCI: 00:1f.4: enabled 0
818 02:50:43.802075 PCI: 00:1f.5: enabled 1
819 02:50:43.805613 PCI: 00:1f.6: enabled 0
820 02:50:43.808960 PCI: 00:1f.7: enabled 0
821 02:50:43.860656 CPU_CLUSTER: 0: enabled 1
822 02:50:43.861206 APIC: 00: enabled 1
823 02:50:43.861623 APIC: 01: enabled 1
824 02:50:43.861959 APIC: 07: enabled 1
825 02:50:43.862274 APIC: 03: enabled 1
826 02:50:43.862584 APIC: 04: enabled 1
827 02:50:43.862888 APIC: 06: enabled 1
828 02:50:43.863188 APIC: 02: enabled 1
829 02:50:43.863483 APIC: 05: enabled 1
830 02:50:43.863776 Root Device scanning...
831 02:50:43.864066 scan_static_bus for Root Device
832 02:50:43.864745 DOMAIN: 0000 enabled
833 02:50:43.865086 CPU_CLUSTER: 0 enabled
834 02:50:43.865453 DOMAIN: 0000 scanning...
835 02:50:43.865770 PCI: pci_scan_bus for bus 00
836 02:50:43.866063 PCI: 00:00.0 [8086/0000] ops
837 02:50:43.866350 PCI: 00:00.0 [8086/9a12] enabled
838 02:50:43.866640 PCI: 00:02.0 [8086/0000] bus ops
839 02:50:43.866923 PCI: 00:02.0 [8086/9a40] enabled
840 02:50:43.867210 PCI: 00:04.0 [8086/0000] bus ops
841 02:50:43.911144 PCI: 00:04.0 [8086/9a03] enabled
842 02:50:43.911703 PCI: 00:05.0 [8086/9a19] enabled
843 02:50:43.912057 PCI: 00:07.0 [0000/0000] hidden
844 02:50:43.912386 PCI: 00:08.0 [8086/9a11] enabled
845 02:50:43.912701 PCI: 00:0a.0 [8086/9a0d] disabled
846 02:50:43.913430 PCI: 00:0d.0 [8086/0000] bus ops
847 02:50:43.913776 PCI: 00:0d.0 [8086/9a13] enabled
848 02:50:43.914090 PCI: 00:14.0 [8086/0000] bus ops
849 02:50:43.914393 PCI: 00:14.0 [8086/a0ed] enabled
850 02:50:43.914692 PCI: 00:14.2 [8086/a0ef] enabled
851 02:50:43.914987 PCI: 00:14.3 [8086/0000] bus ops
852 02:50:43.915280 PCI: 00:14.3 [8086/a0f0] enabled
853 02:50:43.915590 PCI: 00:15.0 [8086/0000] bus ops
854 02:50:43.915883 PCI: 00:15.0 [8086/a0e8] enabled
855 02:50:43.916191 PCI: 00:15.1 [8086/0000] bus ops
856 02:50:43.951941 PCI: 00:15.1 [8086/a0e9] enabled
857 02:50:43.952477 PCI: 00:15.2 [8086/0000] bus ops
858 02:50:43.952828 PCI: 00:15.2 [8086/a0ea] enabled
859 02:50:43.953562 PCI: 00:15.3 [8086/0000] bus ops
860 02:50:43.953971 PCI: 00:15.3 [8086/a0eb] enabled
861 02:50:43.954317 PCI: 00:16.0 [8086/0000] ops
862 02:50:43.954631 PCI: 00:16.0 [8086/a0e0] enabled
863 02:50:43.954941 PCI: Static device PCI: 00:17.0 not found, disabling it.
864 02:50:43.955248 PCI: 00:19.0 [8086/0000] bus ops
865 02:50:43.955549 PCI: 00:19.0 [8086/a0c5] disabled
866 02:50:43.956183 PCI: 00:19.1 [8086/0000] bus ops
867 02:50:43.956513 PCI: 00:19.1 [8086/a0c6] enabled
868 02:50:43.959237 PCI: 00:1d.0 [8086/0000] bus ops
869 02:50:43.959684 PCI: 00:1d.0 [8086/a0b0] enabled
870 02:50:43.962828 PCI: 00:1e.0 [8086/0000] ops
871 02:50:43.966194 PCI: 00:1e.0 [8086/a0a8] enabled
872 02:50:43.969550 PCI: 00:1e.2 [8086/0000] bus ops
873 02:50:43.972779 PCI: 00:1e.2 [8086/a0aa] enabled
874 02:50:43.976338 PCI: 00:1e.3 [8086/0000] bus ops
875 02:50:43.979798 PCI: 00:1e.3 [8086/a0ab] enabled
876 02:50:43.982729 PCI: 00:1f.0 [8086/0000] bus ops
877 02:50:43.986017 PCI: 00:1f.0 [8086/a087] enabled
878 02:50:43.989677 RTC Init
879 02:50:43.992935 Set power on after power failure.
880 02:50:43.993495 Disabling Deep S3
881 02:50:43.996121 Disabling Deep S3
882 02:50:43.999314 Disabling Deep S4
883 02:50:43.999851 Disabling Deep S4
884 02:50:44.002737 Disabling Deep S5
885 02:50:44.003274 Disabling Deep S5
886 02:50:44.006064 PCI: 00:1f.2 [0000/0000] hidden
887 02:50:44.008932 PCI: 00:1f.3 [8086/0000] bus ops
888 02:50:44.012356 PCI: 00:1f.3 [8086/a0c8] enabled
889 02:50:44.015326 PCI: 00:1f.5 [8086/0000] bus ops
890 02:50:44.018634 PCI: 00:1f.5 [8086/a0a4] enabled
891 02:50:44.021755 PCI: Leftover static devices:
892 02:50:44.025156 PCI: 00:10.2
893 02:50:44.025652 PCI: 00:10.6
894 02:50:44.026004 PCI: 00:10.7
895 02:50:44.028474 PCI: 00:06.0
896 02:50:44.028956 PCI: 00:07.1
897 02:50:44.032587 PCI: 00:07.2
898 02:50:44.033140 PCI: 00:07.3
899 02:50:44.035457 PCI: 00:09.0
900 02:50:44.035894 PCI: 00:0d.1
901 02:50:44.036238 PCI: 00:0d.2
902 02:50:44.038221 PCI: 00:0d.3
903 02:50:44.038656 PCI: 00:0e.0
904 02:50:44.042015 PCI: 00:12.0
905 02:50:44.042450 PCI: 00:12.6
906 02:50:44.042794 PCI: 00:13.0
907 02:50:44.044828 PCI: 00:14.1
908 02:50:44.045277 PCI: 00:16.1
909 02:50:44.048137 PCI: 00:16.2
910 02:50:44.048584 PCI: 00:16.3
911 02:50:44.051719 PCI: 00:16.4
912 02:50:44.052145 PCI: 00:16.5
913 02:50:44.052481 PCI: 00:17.0
914 02:50:44.054749 PCI: 00:19.2
915 02:50:44.055179 PCI: 00:1e.1
916 02:50:44.058414 PCI: 00:1f.1
917 02:50:44.058839 PCI: 00:1f.4
918 02:50:44.059175 PCI: 00:1f.6
919 02:50:44.061467 PCI: 00:1f.7
920 02:50:44.065052 PCI: Check your devicetree.cb.
921 02:50:44.068052 PCI: 00:02.0 scanning...
922 02:50:44.071569 scan_generic_bus for PCI: 00:02.0
923 02:50:44.074925 scan_generic_bus for PCI: 00:02.0 done
924 02:50:44.078226 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
925 02:50:44.081567 PCI: 00:04.0 scanning...
926 02:50:44.084795 scan_generic_bus for PCI: 00:04.0
927 02:50:44.088164 GENERIC: 0.0 enabled
928 02:50:44.094543 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
929 02:50:44.097637 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
930 02:50:44.100960 PCI: 00:0d.0 scanning...
931 02:50:44.104363 scan_static_bus for PCI: 00:0d.0
932 02:50:44.107593 USB0 port 0 enabled
933 02:50:44.107751 USB0 port 0 scanning...
934 02:50:44.111024 scan_static_bus for USB0 port 0
935 02:50:44.114222 USB3 port 0 enabled
936 02:50:44.117209 USB3 port 1 enabled
937 02:50:44.117345 USB3 port 2 disabled
938 02:50:44.120907 USB3 port 3 disabled
939 02:50:44.124121 USB3 port 0 scanning...
940 02:50:44.127298 scan_static_bus for USB3 port 0
941 02:50:44.130567 scan_static_bus for USB3 port 0 done
942 02:50:44.133875 scan_bus: bus USB3 port 0 finished in 6 msecs
943 02:50:44.137097 USB3 port 1 scanning...
944 02:50:44.140311 scan_static_bus for USB3 port 1
945 02:50:44.143768 scan_static_bus for USB3 port 1 done
946 02:50:44.147359 scan_bus: bus USB3 port 1 finished in 6 msecs
947 02:50:44.153872 scan_static_bus for USB0 port 0 done
948 02:50:44.157029 scan_bus: bus USB0 port 0 finished in 43 msecs
949 02:50:44.160619 scan_static_bus for PCI: 00:0d.0 done
950 02:50:44.166848 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
951 02:50:44.167000 PCI: 00:14.0 scanning...
952 02:50:44.170421 scan_static_bus for PCI: 00:14.0
953 02:50:44.173651 USB0 port 0 enabled
954 02:50:44.176811 USB0 port 0 scanning...
955 02:50:44.180118 scan_static_bus for USB0 port 0
956 02:50:44.180249 USB2 port 0 disabled
957 02:50:44.183482
958 02:50:44.183601 USB2 port 1 enabled
959 02:50:44.186805 USB2 port 2 enabled
960 02:50:44.186909 USB2 port 3 disabled
961 02:50:44.190119 USB2 port 4 enabled
962 02:50:44.193191 USB2 port 5 disabled
963 02:50:44.193319 USB2 port 6 disabled
964 02:50:44.196372 USB2 port 7 disabled
965 02:50:44.199787 USB2 port 8 disabled
966 02:50:44.199867 USB2 port 9 disabled
967 02:50:44.203046 USB3 port 0 disabled
968 02:50:44.203125 USB3 port 1 enabled
969 02:50:44.206399
970 02:50:44.206476 USB3 port 2 disabled
971 02:50:44.210168 USB3 port 3 disabled
972 02:50:44.213292 USB2 port 1 scanning...
973 02:50:44.217073 scan_static_bus for USB2 port 1
974 02:50:44.220086 scan_static_bus for USB2 port 1 done
975 02:50:44.223183 scan_bus: bus USB2 port 1 finished in 6 msecs
976 02:50:44.226437 USB2 port 2 scanning...
977 02:50:44.230204 scan_static_bus for USB2 port 2
978 02:50:44.233362 scan_static_bus for USB2 port 2 done
979 02:50:44.236584 scan_bus: bus USB2 port 2 finished in 6 msecs
980 02:50:44.239914 USB2 port 4 scanning...
981 02:50:44.243141 scan_static_bus for USB2 port 4
982 02:50:44.246497 scan_static_bus for USB2 port 4 done
983 02:50:44.253076 scan_bus: bus USB2 port 4 finished in 6 msecs
984 02:50:44.253592 USB3 port 1 scanning...
985 02:50:44.256838 scan_static_bus for USB3 port 1
986 02:50:44.262681 scan_static_bus for USB3 port 1 done
987 02:50:44.266499 scan_bus: bus USB3 port 1 finished in 6 msecs
988 02:50:44.269576 scan_static_bus for USB0 port 0 done
989 02:50:44.273086 scan_bus: bus USB0 port 0 finished in 93 msecs
990 02:50:44.279661 scan_static_bus for PCI: 00:14.0 done
991 02:50:44.282981 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
992 02:50:44.286356 PCI: 00:14.3 scanning...
993 02:50:44.289588 scan_static_bus for PCI: 00:14.3
994 02:50:44.292899 GENERIC: 0.0 enabled
995 02:50:44.296327 scan_static_bus for PCI: 00:14.3 done
996 02:50:44.299394 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
997 02:50:44.305110 PCI: 00:15.0 scanning...
998 02:50:44.306060 scan_static_bus for PCI: 00:15.0
999 02:50:44.309221 I2C: 00:1a enabled
1000 02:50:44.309335 I2C: 00:31 enabled
1001 02:50:44.312779 I2C: 00:32 enabled
1002 02:50:44.316084 scan_static_bus for PCI: 00:15.0 done
1003 02:50:44.319128 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1004 02:50:44.322575 PCI: 00:15.1 scanning...
1005 02:50:44.325838 scan_static_bus for PCI: 00:15.1
1006 02:50:44.329009 I2C: 00:10 enabled
1007 02:50:44.332415 scan_static_bus for PCI: 00:15.1 done
1008 02:50:44.336057 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1009 02:50:44.339278 PCI: 00:15.2 scanning...
1010 02:50:44.342250 scan_static_bus for PCI: 00:15.2
1011 02:50:44.345700 scan_static_bus for PCI: 00:15.2 done
1012 02:50:44.352574 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1013 02:50:44.355708 PCI: 00:15.3 scanning...
1014 02:50:44.359430 scan_static_bus for PCI: 00:15.3
1015 02:50:44.362584 scan_static_bus for PCI: 00:15.3 done
1016 02:50:44.365374 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1017 02:50:44.368917 PCI: 00:19.1 scanning...
1018 02:50:44.372691 scan_static_bus for PCI: 00:19.1
1019 02:50:44.375597 I2C: 00:15 enabled
1020 02:50:44.379330 scan_static_bus for PCI: 00:19.1 done
1021 02:50:44.382294 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1022 02:50:44.385539 PCI: 00:1d.0 scanning...
1023 02:50:44.388940 do_pci_scan_bridge for PCI: 00:1d.0
1024 02:50:44.392192 PCI: pci_scan_bus for bus 01
1025 02:50:44.395511 PCI: 01:00.0 [15b7/5009] enabled
1026 02:50:44.398975 GENERIC: 0.0 enabled
1027 02:50:44.402018 Enabling Common Clock Configuration
1028 02:50:44.404997 L1 Sub-State supported from root port 29
1029 02:50:44.408163 L1 Sub-State Support = 0x5
1030 02:50:44.411781 CommonModeRestoreTime = 0x28
1031 02:50:44.414886 Power On Value = 0x16, Power On Scale = 0x0
1032 02:50:44.418121 ASPM: Enabled L1
1033 02:50:44.421225 PCIe: Max_Payload_Size adjusted to 128
1034 02:50:44.428216 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1035 02:50:44.428657 PCI: 00:1e.2 scanning...
1036 02:50:44.431174 scan_generic_bus for PCI: 00:1e.2
1037 02:50:44.434372 SPI: 00 enabled
1038 02:50:44.441100 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1039 02:50:44.444264 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1040 02:50:44.448476 PCI: 00:1e.3 scanning...
1041 02:50:44.451638 scan_generic_bus for PCI: 00:1e.3
1042 02:50:44.451773 SPI: 00 enabled
1043 02:50:44.457871 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1044 02:50:44.464366 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1045 02:50:44.464473 PCI: 00:1f.0 scanning...
1046 02:50:44.467862 scan_static_bus for PCI: 00:1f.0
1047 02:50:44.471420 PNP: 0c09.0 enabled
1048 02:50:44.474477 PNP: 0c09.0 scanning...
1049 02:50:44.478209 scan_static_bus for PNP: 0c09.0
1050 02:50:44.481274 scan_static_bus for PNP: 0c09.0 done
1051 02:50:44.484443 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1052 02:50:44.491397 scan_static_bus for PCI: 00:1f.0 done
1053 02:50:44.494610 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1054 02:50:44.497786 PCI: 00:1f.2 scanning...
1055 02:50:44.500961 scan_static_bus for PCI: 00:1f.2
1056 02:50:44.501045 GENERIC: 0.0 enabled
1057 02:50:44.504118 GENERIC: 0.0 scanning...
1058 02:50:44.507453 scan_static_bus for GENERIC: 0.0
1059 02:50:44.511091 GENERIC: 0.0 enabled
1060 02:50:44.514246 GENERIC: 1.0 enabled
1061 02:50:44.517354 scan_static_bus for GENERIC: 0.0 done
1062 02:50:44.520660 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1063 02:50:44.524436 scan_static_bus for PCI: 00:1f.2 done
1064 02:50:44.531120 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1065 02:50:44.534270 PCI: 00:1f.3 scanning...
1066 02:50:44.537418 scan_static_bus for PCI: 00:1f.3
1067 02:50:44.540588 scan_static_bus for PCI: 00:1f.3 done
1068 02:50:44.544338 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1069 02:50:44.547434 PCI: 00:1f.5 scanning...
1070 02:50:44.550554 scan_generic_bus for PCI: 00:1f.5
1071 02:50:44.553861 scan_generic_bus for PCI: 00:1f.5 done
1072 02:50:44.560804 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1073 02:50:44.564312 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1074 02:50:44.567393 scan_static_bus for Root Device done
1075 02:50:44.573774 scan_bus: bus Root Device finished in 736 msecs
1076 02:50:44.573984 done
1077 02:50:44.580591 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1078 02:50:44.584385 Chrome EC: UHEPI supported
1079 02:50:44.590632 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1080 02:50:44.597115 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1081 02:50:44.600885 SPI flash protection: WPSW=0 SRP0=1
1082 02:50:44.603996 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1083 02:50:44.610510 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1084 02:50:44.613710 found VGA at PCI: 00:02.0
1085 02:50:44.617541 Setting up VGA for PCI: 00:02.0
1086 02:50:44.620326 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1087 02:50:44.626941 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1088 02:50:44.627384 Allocating resources...
1089 02:50:44.630519 Reading resources...
1090 02:50:44.633602 Root Device read_resources bus 0 link: 0
1091 02:50:44.640212 DOMAIN: 0000 read_resources bus 0 link: 0
1092 02:50:44.643746 PCI: 00:04.0 read_resources bus 1 link: 0
1093 02:50:44.650550 PCI: 00:04.0 read_resources bus 1 link: 0 done
1094 02:50:44.653600 PCI: 00:0d.0 read_resources bus 0 link: 0
1095 02:50:44.659772 USB0 port 0 read_resources bus 0 link: 0
1096 02:50:44.663218 USB0 port 0 read_resources bus 0 link: 0 done
1097 02:50:44.669996 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1098 02:50:44.673469 PCI: 00:14.0 read_resources bus 0 link: 0
1099 02:50:44.676426 USB0 port 0 read_resources bus 0 link: 0
1100 02:50:44.683631 USB0 port 0 read_resources bus 0 link: 0 done
1101 02:50:44.686731 PCI: 00:14.0 read_resources bus 0 link: 0 done
1102 02:50:44.693595 PCI: 00:14.3 read_resources bus 0 link: 0
1103 02:50:44.696863 PCI: 00:14.3 read_resources bus 0 link: 0 done
1104 02:50:44.703283 PCI: 00:15.0 read_resources bus 0 link: 0
1105 02:50:44.706943 PCI: 00:15.0 read_resources bus 0 link: 0 done
1106 02:50:44.713271 PCI: 00:15.1 read_resources bus 0 link: 0
1107 02:50:44.716592 PCI: 00:15.1 read_resources bus 0 link: 0 done
1108 02:50:44.724001 PCI: 00:19.1 read_resources bus 0 link: 0
1109 02:50:44.727296 PCI: 00:19.1 read_resources bus 0 link: 0 done
1110 02:50:44.734117 PCI: 00:1d.0 read_resources bus 1 link: 0
1111 02:50:44.737469 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1112 02:50:44.744104 PCI: 00:1e.2 read_resources bus 2 link: 0
1113 02:50:44.746974 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1114 02:50:44.753759 PCI: 00:1e.3 read_resources bus 3 link: 0
1115 02:50:44.756946 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1116 02:50:44.763419 PCI: 00:1f.0 read_resources bus 0 link: 0
1117 02:50:44.766808 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1118 02:50:44.770345 PCI: 00:1f.2 read_resources bus 0 link: 0
1119 02:50:44.773248
1120 02:50:44.776872 GENERIC: 0.0 read_resources bus 0 link: 0
1121 02:50:44.780048 GENERIC: 0.0 read_resources bus 0 link: 0 done
1122 02:50:44.783013
1123 02:50:44.786718 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1124 02:50:44.793442 DOMAIN: 0000 read_resources bus 0 link: 0 done
1125 02:50:44.796547 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1126 02:50:44.803917 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1127 02:50:44.806830 Root Device read_resources bus 0 link: 0 done
1128 02:50:44.810503 Done reading resources.
1129 02:50:44.817174 Show resources in subtree (Root Device)...After reading.
1130 02:50:44.820098 Root Device child on link 0 DOMAIN: 0000
1131 02:50:44.823267 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1132 02:50:44.833117 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1133 02:50:44.843100 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1134 02:50:44.843619 PCI: 00:00.0
1135 02:50:44.853406 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1136 02:50:44.863622 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1137 02:50:44.873318 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1138 02:50:44.883321 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1139 02:50:44.893168 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1140 02:50:44.899743 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1141 02:50:44.909573 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1142 02:50:44.919628 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1143 02:50:44.929233 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1144 02:50:44.939617 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1145 02:50:44.949549 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1146 02:50:44.955842 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1147 02:50:44.965997 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1148 02:50:44.975836 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1149 02:50:44.985663 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1150 02:50:44.996053 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1151 02:50:45.006040 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1152 02:50:45.012224 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1153 02:50:45.022270 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1154 02:50:45.032082 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1155 02:50:45.035472 PCI: 00:02.0
1156 02:50:45.045178 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1157 02:50:45.055543 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1158 02:50:45.061905 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1159 02:50:45.065772
1160 02:50:45.068674 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1161 02:50:45.078495 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1162 02:50:45.079036 GENERIC: 0.0
1163 02:50:45.081892 PCI: 00:05.0
1164 02:50:45.092284 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1165 02:50:45.095279 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1166 02:50:45.098415 GENERIC: 0.0
1167 02:50:45.098855 PCI: 00:08.0
1168 02:50:45.108329 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 02:50:45.111533 PCI: 00:0a.0
1170 02:50:45.115372 PCI: 00:0d.0 child on link 0 USB0 port 0
1171 02:50:45.124568 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1172 02:50:45.131667 USB0 port 0 child on link 0 USB3 port 0
1173 02:50:45.132207 USB3 port 0
1174 02:50:45.134626 USB3 port 1
1175 02:50:45.135063 USB3 port 2
1176 02:50:45.138095 USB3 port 3
1177 02:50:45.141520 PCI: 00:14.0 child on link 0 USB0 port 0
1178 02:50:45.151629 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1179 02:50:45.154559 USB0 port 0 child on link 0 USB2 port 0
1180 02:50:45.157881 USB2 port 0
1181 02:50:45.161656 USB2 port 1
1182 02:50:45.162206 USB2 port 2
1183 02:50:45.164773 USB2 port 3
1184 02:50:45.165532 USB2 port 4
1185 02:50:45.167787 USB2 port 5
1186 02:50:45.168274 USB2 port 6
1187 02:50:45.170815 USB2 port 7
1188 02:50:45.171247 USB2 port 8
1189 02:50:45.174683 USB2 port 9
1190 02:50:45.175115 USB3 port 0
1191 02:50:45.177702 USB3 port 1
1192 02:50:45.178136 USB3 port 2
1193 02:50:45.180689 USB3 port 3
1194 02:50:45.181119 PCI: 00:14.2
1195 02:50:45.190803 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1196 02:50:45.201075 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1197 02:50:45.207773 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1198 02:50:45.217474 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1199 02:50:45.218021 GENERIC: 0.0
1200 02:50:45.224480 PCI: 00:15.0 child on link 0 I2C: 00:1a
1201 02:50:45.233880 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 02:50:45.234457 I2C: 00:1a
1203 02:50:45.237402 I2C: 00:31
1204 02:50:45.237840 I2C: 00:32
1205 02:50:45.240532 PCI: 00:15.1 child on link 0 I2C: 00:10
1206 02:50:45.250764 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 02:50:45.253691 I2C: 00:10
1208 02:50:45.254132 PCI: 00:15.2
1209 02:50:45.263646 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 02:50:45.267182 PCI: 00:15.3
1211 02:50:45.277362 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 02:50:45.277908 PCI: 00:16.0
1213 02:50:45.287007 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 02:50:45.289871 PCI: 00:19.0
1215 02:50:45.293286 PCI: 00:19.1 child on link 0 I2C: 00:15
1216 02:50:45.303581 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 02:50:45.306705 I2C: 00:15
1218 02:50:45.309804 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1219 02:50:45.320107 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1220 02:50:45.329889 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1221 02:50:45.336473 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1222 02:50:45.339674 GENERIC: 0.0
1223 02:50:45.340213 PCI: 01:00.0
1224 02:50:45.343091
1225 02:50:45.352553 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 02:50:45.359855 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1227 02:50:45.363195
1228 02:50:45.363739 PCI: 00:1e.0
1229 02:50:45.372648 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1230 02:50:45.379523 PCI: 00:1e.2 child on link 0 SPI: 00
1231 02:50:45.389627 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 02:50:45.390174 SPI: 00
1233 02:50:45.392427 PCI: 00:1e.3 child on link 0 SPI: 00
1234 02:50:45.402241 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 02:50:45.406175 SPI: 00
1236 02:50:45.409068 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1237 02:50:45.419531 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1238 02:50:45.420103 PNP: 0c09.0
1239 02:50:45.428972 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1240 02:50:45.432892 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1241 02:50:45.442356 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1242 02:50:45.452186 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1243 02:50:45.455392 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1244 02:50:45.458626 GENERIC: 0.0
1245 02:50:45.459080 GENERIC: 1.0
1246 02:50:45.461678 PCI: 00:1f.3
1247 02:50:45.472069 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1248 02:50:45.481928 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1249 02:50:45.482528 PCI: 00:1f.5
1250 02:50:45.491768 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1251 02:50:45.495032 CPU_CLUSTER: 0 child on link 0 APIC: 00
1252 02:50:45.498474 APIC: 00
1253 02:50:45.498907 APIC: 01
1254 02:50:45.499248 APIC: 07
1255 02:50:45.501519
1256 02:50:45.501991 APIC: 03
1257 02:50:45.502337 APIC: 04
1258 02:50:45.504718 APIC: 06
1259 02:50:45.505151 APIC: 02
1260 02:50:45.505582 APIC: 05
1261 02:50:45.515039 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1262 02:50:45.518452 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1263 02:50:45.524945 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1264 02:50:45.531370 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1265 02:50:45.534726 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1266 02:50:45.541452 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1267 02:50:45.548206 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1268 02:50:45.554832 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1269 02:50:45.561366 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1270 02:50:45.570983 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1271 02:50:45.574701 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1272 02:50:45.584167 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1273 02:50:45.591068 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1274 02:50:45.597635 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1275 02:50:45.601231 DOMAIN: 0000: Resource ranges:
1276 02:50:45.604302 * Base: 1000, Size: 800, Tag: 100
1277 02:50:45.607498 * Base: 1900, Size: e700, Tag: 100
1278 02:50:45.614126 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1279 02:50:45.620353 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1280 02:50:45.627389 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1281 02:50:45.633638 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1282 02:50:45.636813
1283 02:50:45.643771 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1284 02:50:45.650394 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1285 02:50:45.657013 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1286 02:50:45.659943
1287 02:50:45.667006 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1288 02:50:45.673305 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1289 02:50:45.683327 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1290 02:50:45.689854 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1291 02:50:45.696741 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1292 02:50:45.706500 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1293 02:50:45.713111 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1294 02:50:45.720024 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1295 02:50:45.729361 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1296 02:50:45.736162 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1297 02:50:45.742524 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1298 02:50:45.752682 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1299 02:50:45.759233 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1300 02:50:45.765574 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1301 02:50:45.775923 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1302 02:50:45.782182 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1303 02:50:45.788773 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1304 02:50:45.798738 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1305 02:50:45.801983 DOMAIN: 0000: Resource ranges:
1306 02:50:45.805501 * Base: 7fc00000, Size: 40400000, Tag: 200
1307 02:50:45.808452 * Base: d0000000, Size: 28000000, Tag: 200
1308 02:50:45.815179 * Base: fa000000, Size: 1000000, Tag: 200
1309 02:50:45.818855 * Base: fb001000, Size: 2fff000, Tag: 200
1310 02:50:45.822072 * Base: fe010000, Size: 2e000, Tag: 200
1311 02:50:45.825230 * Base: fe03f000, Size: d41000, Tag: 200
1312 02:50:45.831296 * Base: fed88000, Size: 8000, Tag: 200
1313 02:50:45.834874 * Base: fed93000, Size: d000, Tag: 200
1314 02:50:45.837970 * Base: feda2000, Size: 1e000, Tag: 200
1315 02:50:45.841561 * Base: fede0000, Size: 1220000, Tag: 200
1316 02:50:45.848504 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1317 02:50:45.854906 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1318 02:50:45.861021 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1319 02:50:45.867978 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1320 02:50:45.874287 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1321 02:50:45.881148 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1322 02:50:45.887938 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1323 02:50:45.894246 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1324 02:50:45.900742 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1325 02:50:45.907640 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1326 02:50:45.914121 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1327 02:50:45.920790 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1328 02:50:45.927413 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1329 02:50:45.933725 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1330 02:50:45.940570 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1331 02:50:45.946631 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1332 02:50:45.953529 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1333 02:50:45.960642 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1334 02:50:45.966656 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1335 02:50:45.973687 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1336 02:50:45.979992 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1337 02:50:45.986827 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1338 02:50:45.993043 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1339 02:50:45.999692 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1340 02:50:46.009864 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1341 02:50:46.013002 PCI: 00:1d.0: Resource ranges:
1342 02:50:46.016440 * Base: 7fc00000, Size: 100000, Tag: 200
1343 02:50:46.022504 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1344 02:50:46.029466 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1345 02:50:46.039631 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1346 02:50:46.045817 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1347 02:50:46.049349 Root Device assign_resources, bus 0 link: 0
1348 02:50:46.055931 DOMAIN: 0000 assign_resources, bus 0 link: 0
1349 02:50:46.062331 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1350 02:50:46.072372 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1351 02:50:46.078830 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1352 02:50:46.089456 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1353 02:50:46.092487 PCI: 00:04.0 assign_resources, bus 1 link: 0
1354 02:50:46.095437 PCI: 00:04.0 assign_resources, bus 1 link: 0
1355 02:50:46.105885 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1356 02:50:46.111509 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1357 02:50:46.121881 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1358 02:50:46.124956 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1359 02:50:46.131219 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1360 02:50:46.138107 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1361 02:50:46.144797 PCI: 00:14.0 assign_resources, bus 0 link: 0
1362 02:50:46.147994 PCI: 00:14.0 assign_resources, bus 0 link: 0
1363 02:50:46.154769 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1364 02:50:46.164670 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1365 02:50:46.170887 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1366 02:50:46.177665 PCI: 00:14.3 assign_resources, bus 0 link: 0
1367 02:50:46.181009 PCI: 00:14.3 assign_resources, bus 0 link: 0
1368 02:50:46.191586 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1369 02:50:46.193923 PCI: 00:15.0 assign_resources, bus 0 link: 0
1370 02:50:46.197699 PCI: 00:15.0 assign_resources, bus 0 link: 0
1371 02:50:46.207354 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1372 02:50:46.210958 PCI: 00:15.1 assign_resources, bus 0 link: 0
1373 02:50:46.217615 PCI: 00:15.1 assign_resources, bus 0 link: 0
1374 02:50:46.224106 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1375 02:50:46.233484 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1376 02:50:46.240484 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1377 02:50:46.250687 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1378 02:50:46.253582 PCI: 00:19.1 assign_resources, bus 0 link: 0
1379 02:50:46.257114 PCI: 00:19.1 assign_resources, bus 0 link: 0
1380 02:50:46.260176
1381 02:50:46.267125 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1382 02:50:46.276953 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1383 02:50:46.286638 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1384 02:50:46.289872 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1385 02:50:46.299763 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1386 02:50:46.306273 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1387 02:50:46.309577 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1388 02:50:46.320267 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1389 02:50:46.323290 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1390 02:50:46.329875 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1391 02:50:46.336610 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1392 02:50:46.339549 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1393 02:50:46.342962
1394 02:50:46.346002 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1395 02:50:46.349620 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1396 02:50:46.356347 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1397 02:50:46.359611 LPC: Trying to open IO window from 800 size 1ff
1398 02:50:46.369538 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1399 02:50:46.376061 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1400 02:50:46.386522 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1401 02:50:46.389533 DOMAIN: 0000 assign_resources, bus 0 link: 0
1402 02:50:46.392751 Root Device assign_resources, bus 0 link: 0
1403 02:50:46.395938
1404 02:50:46.396383 Done setting resources.
1405 02:50:46.402300 Show resources in subtree (Root Device)...After assigning values.
1406 02:50:46.406292 Root Device child on link 0 DOMAIN: 0000
1407 02:50:46.412426 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1408 02:50:46.422300 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1409 02:50:46.432054 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1410 02:50:46.432571 PCI: 00:00.0
1411 02:50:46.442347 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1412 02:50:46.452365 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1413 02:50:46.462518 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1414 02:50:46.472481 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1415 02:50:46.478986 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1416 02:50:46.488783 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1417 02:50:46.499106 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1418 02:50:46.509035 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1419 02:50:46.518645 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1420 02:50:46.525497 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1421 02:50:46.528131
1422 02:50:46.535014 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1423 02:50:46.545342 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1424 02:50:46.555027 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1425 02:50:46.565091 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1426 02:50:46.571572 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1427 02:50:46.581355 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1428 02:50:46.591836 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1429 02:50:46.601687 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1430 02:50:46.611432 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1431 02:50:46.621216 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1432 02:50:46.621797 PCI: 00:02.0
1433 02:50:46.634422 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1434 02:50:46.644273 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1435 02:50:46.654656 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1436 02:50:46.657889 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1437 02:50:46.667902 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1438 02:50:46.670729 GENERIC: 0.0
1439 02:50:46.671170 PCI: 00:05.0
1440 02:50:46.680940 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1441 02:50:46.687686 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1442 02:50:46.688226 GENERIC: 0.0
1443 02:50:46.690664 PCI: 00:08.0
1444 02:50:46.701182 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1445 02:50:46.701765 PCI: 00:0a.0
1446 02:50:46.707690 PCI: 00:0d.0 child on link 0 USB0 port 0
1447 02:50:46.717525 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1448 02:50:46.720808 USB0 port 0 child on link 0 USB3 port 0
1449 02:50:46.724006 USB3 port 0
1450 02:50:46.724550 USB3 port 1
1451 02:50:46.727463 USB3 port 2
1452 02:50:46.727906 USB3 port 3
1453 02:50:46.734148 PCI: 00:14.0 child on link 0 USB0 port 0
1454 02:50:46.744202 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1455 02:50:46.747558 USB0 port 0 child on link 0 USB2 port 0
1456 02:50:46.750689 USB2 port 0
1457 02:50:46.751225 USB2 port 1
1458 02:50:46.753898 USB2 port 2
1459 02:50:46.754437 USB2 port 3
1460 02:50:46.757405 USB2 port 4
1461 02:50:46.757940 USB2 port 5
1462 02:50:46.760629 USB2 port 6
1463 02:50:46.761168 USB2 port 7
1464 02:50:46.763615 USB2 port 8
1465 02:50:46.764056 USB2 port 9
1466 02:50:46.766856 USB3 port 0
1467 02:50:46.770295 USB3 port 1
1468 02:50:46.770838 USB3 port 2
1469 02:50:46.773606 USB3 port 3
1470 02:50:46.774050 PCI: 00:14.2
1471 02:50:46.783644 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1472 02:50:46.793310 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1473 02:50:46.800582 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1474 02:50:46.810605 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1475 02:50:46.811306 GENERIC: 0.0
1476 02:50:46.816984 PCI: 00:15.0 child on link 0 I2C: 00:1a
1477 02:50:46.826790 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1478 02:50:46.827351 I2C: 00:1a
1479 02:50:46.830170 I2C: 00:31
1480 02:50:46.830703 I2C: 00:32
1481 02:50:46.836683 PCI: 00:15.1 child on link 0 I2C: 00:10
1482 02:50:46.846161 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1483 02:50:46.846705 I2C: 00:10
1484 02:50:46.849252 PCI: 00:15.2
1485 02:50:46.859671 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1486 02:50:46.860201 PCI: 00:15.3
1487 02:50:46.869563 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1488 02:50:46.873449 PCI: 00:16.0
1489 02:50:46.883231 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1490 02:50:46.883776 PCI: 00:19.0
1491 02:50:46.886130
1492 02:50:46.889182 PCI: 00:19.1 child on link 0 I2C: 00:15
1493 02:50:46.899434 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1494 02:50:46.899967 I2C: 00:15
1495 02:50:46.905839 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1496 02:50:46.916041 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1497 02:50:46.925771 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1498 02:50:46.935491 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1499 02:50:46.938784 GENERIC: 0.0
1500 02:50:46.939227 PCI: 01:00.0
1501 02:50:46.948807 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1502 02:50:46.962393 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1503 02:50:46.962961 PCI: 00:1e.0
1504 02:50:46.971936 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1505 02:50:46.978696 PCI: 00:1e.2 child on link 0 SPI: 00
1506 02:50:46.988282 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1507 02:50:46.988801 SPI: 00
1508 02:50:46.992133 PCI: 00:1e.3 child on link 0 SPI: 00
1509 02:50:47.001861 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1510 02:50:47.005417
1511 02:50:47.005982 SPI: 00
1512 02:50:47.008579 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1513 02:50:47.018162 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1514 02:50:47.018710 PNP: 0c09.0
1515 02:50:47.028738 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1516 02:50:47.031603 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1517 02:50:47.041346 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1518 02:50:47.051534 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1519 02:50:47.054526 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1520 02:50:47.057848 GENERIC: 0.0
1521 02:50:47.058289 GENERIC: 1.0
1522 02:50:47.061513
1523 02:50:47.061956 PCI: 00:1f.3
1524 02:50:47.071007 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1525 02:50:47.080983 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1526 02:50:47.084764 PCI: 00:1f.5
1527 02:50:47.094334 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1528 02:50:47.097462 CPU_CLUSTER: 0 child on link 0 APIC: 00
1529 02:50:47.100840 APIC: 00
1530 02:50:47.101281 APIC: 01
1531 02:50:47.101666 APIC: 07
1532 02:50:47.104798 APIC: 03
1533 02:50:47.105369 APIC: 04
1534 02:50:47.107866 APIC: 06
1535 02:50:47.108307 APIC: 02
1536 02:50:47.108656 APIC: 05
1537 02:50:47.110982 Done allocating resources.
1538 02:50:47.117771 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1539 02:50:47.124183 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1540 02:50:47.127346 Configure GPIOs for I2S audio on UP4.
1541 02:50:47.134535 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1542 02:50:47.137293 Enabling resources...
1543 02:50:47.141070 PCI: 00:00.0 subsystem <- 8086/9a12
1544 02:50:47.144035 PCI: 00:00.0 cmd <- 06
1545 02:50:47.147054 PCI: 00:02.0 subsystem <- 8086/9a40
1546 02:50:47.147498 PCI: 00:02.0 cmd <- 03
1547 02:50:47.150491
1548 02:50:47.153662 PCI: 00:04.0 subsystem <- 8086/9a03
1549 02:50:47.154105 PCI: 00:04.0 cmd <- 02
1550 02:50:47.160730 PCI: 00:05.0 subsystem <- 8086/9a19
1551 02:50:47.161288 PCI: 00:05.0 cmd <- 02
1552 02:50:47.163763 PCI: 00:08.0 subsystem <- 8086/9a11
1553 02:50:47.166835 PCI: 00:08.0 cmd <- 06
1554 02:50:47.170329 PCI: 00:0d.0 subsystem <- 8086/9a13
1555 02:50:47.173818 PCI: 00:0d.0 cmd <- 02
1556 02:50:47.177405 PCI: 00:14.0 subsystem <- 8086/a0ed
1557 02:50:47.180400 PCI: 00:14.0 cmd <- 02
1558 02:50:47.183536 PCI: 00:14.2 subsystem <- 8086/a0ef
1559 02:50:47.186731 PCI: 00:14.2 cmd <- 02
1560 02:50:47.189988 PCI: 00:14.3 subsystem <- 8086/a0f0
1561 02:50:47.193136 PCI: 00:14.3 cmd <- 02
1562 02:50:47.196800 PCI: 00:15.0 subsystem <- 8086/a0e8
1563 02:50:47.199782 PCI: 00:15.0 cmd <- 02
1564 02:50:47.203052 PCI: 00:15.1 subsystem <- 8086/a0e9
1565 02:50:47.203494 PCI: 00:15.1 cmd <- 02
1566 02:50:47.209787 PCI: 00:15.2 subsystem <- 8086/a0ea
1567 02:50:47.210228 PCI: 00:15.2 cmd <- 02
1568 02:50:47.213202 PCI: 00:15.3 subsystem <- 8086/a0eb
1569 02:50:47.217071 PCI: 00:15.3 cmd <- 02
1570 02:50:47.219597 PCI: 00:16.0 subsystem <- 8086/a0e0
1571 02:50:47.223289 PCI: 00:16.0 cmd <- 02
1572 02:50:47.226444 PCI: 00:19.1 subsystem <- 8086/a0c6
1573 02:50:47.229507 PCI: 00:19.1 cmd <- 02
1574 02:50:47.233179 PCI: 00:1d.0 bridge ctrl <- 0013
1575 02:50:47.236229 PCI: 00:1d.0 subsystem <- 8086/a0b0
1576 02:50:47.239458 PCI: 00:1d.0 cmd <- 06
1577 02:50:47.243133 PCI: 00:1e.0 subsystem <- 8086/a0a8
1578 02:50:47.246432 PCI: 00:1e.0 cmd <- 06
1579 02:50:47.249548 PCI: 00:1e.2 subsystem <- 8086/a0aa
1580 02:50:47.252575 PCI: 00:1e.2 cmd <- 06
1581 02:50:47.255922 PCI: 00:1e.3 subsystem <- 8086/a0ab
1582 02:50:47.256371 PCI: 00:1e.3 cmd <- 02
1583 02:50:47.262837 PCI: 00:1f.0 subsystem <- 8086/a087
1584 02:50:47.263271 PCI: 00:1f.0 cmd <- 407
1585 02:50:47.265981 PCI: 00:1f.3 subsystem <- 8086/a0c8
1586 02:50:47.269257 PCI: 00:1f.3 cmd <- 02
1587 02:50:47.273367 PCI: 00:1f.5 subsystem <- 8086/a0a4
1588 02:50:47.276450 PCI: 00:1f.5 cmd <- 406
1589 02:50:47.280901 PCI: 01:00.0 cmd <- 02
1590 02:50:47.285239 done.
1591 02:50:47.288848 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1592 02:50:47.291827 Initializing devices...
1593 02:50:47.294981 Root Device init
1594 02:50:47.297893 Chrome EC: Set SMI mask to 0x0000000000000000
1595 02:50:47.305741 Chrome EC: clear events_b mask to 0x0000000000000000
1596 02:50:47.312651 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1597 02:50:47.318733 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1598 02:50:47.325694 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1599 02:50:47.328782 Chrome EC: Set WAKE mask to 0x0000000000000000
1600 02:50:47.332023
1601 02:50:47.335062 fw_config match found: DB_USB=USB3_ACTIVE
1602 02:50:47.341772 Configure Right Type-C port orientation for retimer
1603 02:50:47.345399 Root Device init finished in 47 msecs
1604 02:50:47.348283 PCI: 00:00.0 init
1605 02:50:47.351963 CPU TDP = 9 Watts
1606 02:50:47.352397 CPU PL1 = 9 Watts
1607 02:50:47.355194 CPU PL2 = 40 Watts
1608 02:50:47.355629 CPU PL4 = 83 Watts
1609 02:50:47.361459 PCI: 00:00.0 init finished in 8 msecs
1610 02:50:47.361955 PCI: 00:02.0 init
1611 02:50:47.364803 GMA: Found VBT in CBFS
1612 02:50:47.368044 GMA: Found valid VBT in CBFS
1613 02:50:47.375271 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1614 02:50:47.381376 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1615 02:50:47.384642 PCI: 00:02.0 init finished in 18 msecs
1616 02:50:47.388371 PCI: 00:05.0 init
1617 02:50:47.391839 PCI: 00:05.0 init finished in 0 msecs
1618 02:50:47.394866 PCI: 00:08.0 init
1619 02:50:47.398052 PCI: 00:08.0 init finished in 0 msecs
1620 02:50:47.401118 PCI: 00:14.0 init
1621 02:50:47.404958 PCI: 00:14.0 init finished in 0 msecs
1622 02:50:47.407944 PCI: 00:14.2 init
1623 02:50:47.411257 PCI: 00:14.2 init finished in 0 msecs
1624 02:50:47.411692 PCI: 00:15.0 init
1625 02:50:47.414402 I2C bus 0 version 0x3230302a
1626 02:50:47.418044 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1627 02:50:47.424551 PCI: 00:15.0 init finished in 6 msecs
1628 02:50:47.425073 PCI: 00:15.1 init
1629 02:50:47.428052 I2C bus 1 version 0x3230302a
1630 02:50:47.430972 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1631 02:50:47.434603 PCI: 00:15.1 init finished in 6 msecs
1632 02:50:47.437661 PCI: 00:15.2 init
1633 02:50:47.441598 I2C bus 2 version 0x3230302a
1634 02:50:47.444270 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1635 02:50:47.447986 PCI: 00:15.2 init finished in 6 msecs
1636 02:50:47.450628 PCI: 00:15.3 init
1637 02:50:47.453889 I2C bus 3 version 0x3230302a
1638 02:50:47.457486 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1639 02:50:47.461053 PCI: 00:15.3 init finished in 6 msecs
1640 02:50:47.464358 PCI: 00:16.0 init
1641 02:50:47.467387 PCI: 00:16.0 init finished in 0 msecs
1642 02:50:47.470541 PCI: 00:19.1 init
1643 02:50:47.473653 I2C bus 5 version 0x3230302a
1644 02:50:47.477351 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1645 02:50:47.480787 PCI: 00:19.1 init finished in 6 msecs
1646 02:50:47.481223 PCI: 00:1d.0 init
1647 02:50:47.483988 Initializing PCH PCIe bridge.
1648 02:50:47.487394 PCI: 00:1d.0 init finished in 3 msecs
1649 02:50:47.490334
1650 02:50:47.490770 PCI: 00:1f.0 init
1651 02:50:47.497462 IOAPIC: Initializing IOAPIC at 0xfec00000
1652 02:50:47.500459 IOAPIC: Bootstrap Processor Local APIC = 0x00
1653 02:50:47.503573 IOAPIC: ID = 0x02
1654 02:50:47.504007 IOAPIC: Dumping registers
1655 02:50:47.506753
1656 02:50:47.507186 reg 0x0000: 0x02000000
1657 02:50:47.510593 reg 0x0001: 0x00770020
1658 02:50:47.513672 reg 0x0002: 0x00000000
1659 02:50:47.516989 PCI: 00:1f.0 init finished in 21 msecs
1660 02:50:47.520714 PCI: 00:1f.2 init
1661 02:50:47.521273 Disabling ACPI via APMC.
1662 02:50:47.526552 APMC done.
1663 02:50:47.529829 PCI: 00:1f.2 init finished in 6 msecs
1664 02:50:47.541173 PCI: 01:00.0 init
1665 02:50:47.544857 PCI: 01:00.0 init finished in 0 msecs
1666 02:50:47.548041 PNP: 0c09.0 init
1667 02:50:47.555082 Google Chrome EC uptime: 8.259 seconds
1668 02:50:47.558319 Google Chrome AP resets since EC boot: 1
1669 02:50:47.561592 Google Chrome most recent AP reset causes:
1670 02:50:47.565630 0.451: 32775 shutdown: entering G3
1671 02:50:47.571799 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1672 02:50:47.574976 PNP: 0c09.0 init finished in 24 msecs
1673 02:50:47.581699 Devices initialized
1674 02:50:47.585297 Show all devs... After init.
1675 02:50:47.588358 Root Device: enabled 1
1676 02:50:47.589074 DOMAIN: 0000: enabled 1
1677 02:50:47.591805 CPU_CLUSTER: 0: enabled 1
1678 02:50:47.594901 PCI: 00:00.0: enabled 1
1679 02:50:47.598175 PCI: 00:02.0: enabled 1
1680 02:50:47.598805 PCI: 00:04.0: enabled 1
1681 02:50:47.601466 PCI: 00:05.0: enabled 1
1682 02:50:47.605152 PCI: 00:06.0: enabled 0
1683 02:50:47.608310 PCI: 00:07.0: enabled 0
1684 02:50:47.608940 PCI: 00:07.1: enabled 0
1685 02:50:47.611389 PCI: 00:07.2: enabled 0
1686 02:50:47.615110 PCI: 00:07.3: enabled 0
1687 02:50:47.618080 PCI: 00:08.0: enabled 1
1688 02:50:47.618526 PCI: 00:09.0: enabled 0
1689 02:50:47.621402 PCI: 00:0a.0: enabled 0
1690 02:50:47.624496 PCI: 00:0d.0: enabled 1
1691 02:50:47.628031 PCI: 00:0d.1: enabled 0
1692 02:50:47.628563 PCI: 00:0d.2: enabled 0
1693 02:50:47.631269 PCI: 00:0d.3: enabled 0
1694 02:50:47.634728 PCI: 00:0e.0: enabled 0
1695 02:50:47.635342 PCI: 00:10.2: enabled 1
1696 02:50:47.637815
1697 02:50:47.638281 PCI: 00:10.6: enabled 0
1698 02:50:47.640849 PCI: 00:10.7: enabled 0
1699 02:50:47.644624 PCI: 00:12.0: enabled 0
1700 02:50:47.645067 PCI: 00:12.6: enabled 0
1701 02:50:47.647581 PCI: 00:13.0: enabled 0
1702 02:50:47.651324 PCI: 00:14.0: enabled 1
1703 02:50:47.654495 PCI: 00:14.1: enabled 0
1704 02:50:47.654939 PCI: 00:14.2: enabled 1
1705 02:50:47.657515 PCI: 00:14.3: enabled 1
1706 02:50:47.661215 PCI: 00:15.0: enabled 1
1707 02:50:47.664284 PCI: 00:15.1: enabled 1
1708 02:50:47.664726 PCI: 00:15.2: enabled 1
1709 02:50:47.667548 PCI: 00:15.3: enabled 1
1710 02:50:47.671249 PCI: 00:16.0: enabled 1
1711 02:50:47.674590 PCI: 00:16.1: enabled 0
1712 02:50:47.675026 PCI: 00:16.2: enabled 0
1713 02:50:47.677725 PCI: 00:16.3: enabled 0
1714 02:50:47.681245 PCI: 00:16.4: enabled 0
1715 02:50:47.681730 PCI: 00:16.5: enabled 0
1716 02:50:47.684742 PCI: 00:17.0: enabled 0
1717 02:50:47.687918 PCI: 00:19.0: enabled 0
1718 02:50:47.691300 PCI: 00:19.1: enabled 1
1719 02:50:47.691828 PCI: 00:19.2: enabled 0
1720 02:50:47.694267 PCI: 00:1c.0: enabled 1
1721 02:50:47.697373 PCI: 00:1c.1: enabled 0
1722 02:50:47.701092 PCI: 00:1c.2: enabled 0
1723 02:50:47.701568 PCI: 00:1c.3: enabled 0
1724 02:50:47.704642 PCI: 00:1c.4: enabled 0
1725 02:50:47.707743 PCI: 00:1c.5: enabled 0
1726 02:50:47.710657 PCI: 00:1c.6: enabled 1
1727 02:50:47.711096 PCI: 00:1c.7: enabled 0
1728 02:50:47.714305 PCI: 00:1d.0: enabled 1
1729 02:50:47.717610 PCI: 00:1d.1: enabled 0
1730 02:50:47.718045 PCI: 00:1d.2: enabled 1
1731 02:50:47.720743
1732 02:50:47.721180 PCI: 00:1d.3: enabled 0
1733 02:50:47.723905 PCI: 00:1e.0: enabled 1
1734 02:50:47.727137 PCI: 00:1e.1: enabled 0
1735 02:50:47.727576 PCI: 00:1e.2: enabled 1
1736 02:50:47.730692 PCI: 00:1e.3: enabled 1
1737 02:50:47.734230 PCI: 00:1f.0: enabled 1
1738 02:50:47.737377 PCI: 00:1f.1: enabled 0
1739 02:50:47.737814 PCI: 00:1f.2: enabled 1
1740 02:50:47.740405 PCI: 00:1f.3: enabled 1
1741 02:50:47.744004 PCI: 00:1f.4: enabled 0
1742 02:50:47.747152 PCI: 00:1f.5: enabled 1
1743 02:50:47.747745 PCI: 00:1f.6: enabled 0
1744 02:50:47.750762 PCI: 00:1f.7: enabled 0
1745 02:50:47.753738 APIC: 00: enabled 1
1746 02:50:47.754169 GENERIC: 0.0: enabled 1
1747 02:50:47.757445 GENERIC: 0.0: enabled 1
1748 02:50:47.761042 GENERIC: 1.0: enabled 1
1749 02:50:47.764220 GENERIC: 0.0: enabled 1
1750 02:50:47.764766 GENERIC: 1.0: enabled 1
1751 02:50:47.767138 USB0 port 0: enabled 1
1752 02:50:47.770454 GENERIC: 0.0: enabled 1
1753 02:50:47.773745 USB0 port 0: enabled 1
1754 02:50:47.774179 GENERIC: 0.0: enabled 1
1755 02:50:47.777389 I2C: 00:1a: enabled 1
1756 02:50:47.780223 I2C: 00:31: enabled 1
1757 02:50:47.780658 I2C: 00:32: enabled 1
1758 02:50:47.783863 I2C: 00:10: enabled 1
1759 02:50:47.787058 I2C: 00:15: enabled 1
1760 02:50:47.787494 GENERIC: 0.0: enabled 0
1761 02:50:47.790188 GENERIC: 1.0: enabled 0
1762 02:50:47.793478 GENERIC: 0.0: enabled 1
1763 02:50:47.793911 SPI: 00: enabled 1
1764 02:50:47.797246 SPI: 00: enabled 1
1765 02:50:47.800231 PNP: 0c09.0: enabled 1
1766 02:50:47.800664 GENERIC: 0.0: enabled 1
1767 02:50:47.803470
1768 02:50:47.803909 USB3 port 0: enabled 1
1769 02:50:47.806719 USB3 port 1: enabled 1
1770 02:50:47.810325 USB3 port 2: enabled 0
1771 02:50:47.810760 USB3 port 3: enabled 0
1772 02:50:47.813558 USB2 port 0: enabled 0
1773 02:50:47.816724 USB2 port 1: enabled 1
1774 02:50:47.817259 USB2 port 2: enabled 1
1775 02:50:47.820380 USB2 port 3: enabled 0
1776 02:50:47.823694 USB2 port 4: enabled 1
1777 02:50:47.826873 USB2 port 5: enabled 0
1778 02:50:47.827307 USB2 port 6: enabled 0
1779 02:50:47.830521 USB2 port 7: enabled 0
1780 02:50:47.833475 USB2 port 8: enabled 0
1781 02:50:47.833912 USB2 port 9: enabled 0
1782 02:50:47.836643 USB3 port 0: enabled 0
1783 02:50:47.839886 USB3 port 1: enabled 1
1784 02:50:47.843662 USB3 port 2: enabled 0
1785 02:50:47.844214 USB3 port 3: enabled 0
1786 02:50:47.846570 GENERIC: 0.0: enabled 1
1787 02:50:47.849667 GENERIC: 1.0: enabled 1
1788 02:50:47.850100 APIC: 01: enabled 1
1789 02:50:47.853078 APIC: 07: enabled 1
1790 02:50:47.856245 APIC: 03: enabled 1
1791 02:50:47.856679 APIC: 04: enabled 1
1792 02:50:47.859689 APIC: 06: enabled 1
1793 02:50:47.860178 APIC: 02: enabled 1
1794 02:50:47.863066 APIC: 05: enabled 1
1795 02:50:47.866344 PCI: 01:00.0: enabled 1
1796 02:50:47.869611 BS: BS_DEV_INIT run times (exec / console): 36 / 540 ms
1797 02:50:47.876869 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1798 02:50:47.880103 ELOG: NV offset 0xf30000 size 0x1000
1799 02:50:47.886765 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1800 02:50:47.893526 ELOG: Event(17) added with size 13 at 2022-11-16 02:50:46 UTC
1801 02:50:47.900092 ELOG: Event(92) added with size 9 at 2022-11-16 02:50:46 UTC
1802 02:50:47.906661 ELOG: Event(93) added with size 9 at 2022-11-16 02:50:46 UTC
1803 02:50:47.913242 ELOG: Event(9E) added with size 10 at 2022-11-16 02:50:46 UTC
1804 02:50:47.919406 ELOG: Event(9F) added with size 14 at 2022-11-16 02:50:46 UTC
1805 02:50:47.926202 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1806 02:50:47.932947 ELOG: Event(A1) added with size 10 at 2022-11-16 02:50:46 UTC
1807 02:50:47.939387 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1808 02:50:47.945668 ELOG: Event(A0) added with size 9 at 2022-11-16 02:50:46 UTC
1809 02:50:47.949138 elog_add_boot_reason: Logged dev mode boot
1810 02:50:47.956227 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1811 02:50:47.959254 Finalize devices...
1812 02:50:47.959699 Devices finalized
1813 02:50:47.965705 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1814 02:50:47.969095 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1815 02:50:47.975628 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1816 02:50:47.978752 ME: HFSTS1 : 0x80030055
1817 02:50:47.982050
1818 02:50:47.985437 ME: HFSTS2 : 0x30280116
1819 02:50:47.989018 ME: HFSTS3 : 0x00000050
1820 02:50:47.995788 ME: HFSTS4 : 0x00004000
1821 02:50:47.998607 ME: HFSTS5 : 0x00000000
1822 02:50:48.001841 ME: HFSTS6 : 0x40400006
1823 02:50:48.005950 ME: Manufacturing Mode : YES
1824 02:50:48.011758 ME: SPI Protection Mode Enabled : NO
1825 02:50:48.015008 ME: FW Partition Table : OK
1826 02:50:48.018240 ME: Bringup Loader Failure : NO
1827 02:50:48.021882 ME: Firmware Init Complete : NO
1828 02:50:48.025081 ME: Boot Options Present : NO
1829 02:50:48.028469 ME: Update In Progress : NO
1830 02:50:48.032136 ME: D0i3 Support : YES
1831 02:50:48.035188 ME: Low Power State Enabled : NO
1832 02:50:48.041625 ME: CPU Replaced : YES
1833 02:50:48.044737 ME: CPU Replacement Valid : YES
1834 02:50:48.047886 ME: Current Working State : 5
1835 02:50:48.051418 ME: Current Operation State : 1
1836 02:50:48.054655 ME: Current Operation Mode : 3
1837 02:50:48.058432 ME: Error Code : 0
1838 02:50:48.061233 ME: Enhanced Debug Mode : NO
1839 02:50:48.064799 ME: CPU Debug Disabled : YES
1840 02:50:48.071288 ME: TXT Support : NO
1841 02:50:48.074606 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1842 02:50:48.084790 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1843 02:50:48.088052 CBFS: 'fallback/slic' not found.
1844 02:50:48.090786 ACPI: Writing ACPI tables at 76b01000.
1845 02:50:48.091220 ACPI: * FACS
1846 02:50:48.094644 ACPI: * DSDT
1847 02:50:48.097708 Ramoops buffer: 0x100000@0x76a00000.
1848 02:50:48.103998 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1849 02:50:48.107933 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1850 02:50:48.110807 Google Chrome EC: version:
1851 02:50:48.114254 ro: voema_v2.0.10114-a447f03e46
1852 02:50:48.117644 rw: voema_v2.0.10114-a447f03e46
1853 02:50:48.120789 running image: 2
1854 02:50:48.124256 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1855 02:50:48.127207
1856 02:50:48.130362 ACPI: * FADT
1857 02:50:48.130798 SCI is IRQ9
1858 02:50:48.133432 ACPI: added table 1/32, length now 40
1859 02:50:48.137510 ACPI: * SSDT
1860 02:50:48.140432 Found 1 CPU(s) with 8 core(s) each.
1861 02:50:48.143594 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1862 02:50:48.146805 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1863 02:50:48.153866 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1864 02:50:48.156767 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1865 02:50:48.163329 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1866 02:50:48.167035 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1867 02:50:48.173726 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1868 02:50:48.180062 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1869 02:50:48.186989 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1870 02:50:48.190117 \_SB.PCI0.RP09: Added StorageD3Enable property
1871 02:50:48.193178 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1872 02:50:48.200021 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1873 02:50:48.203251 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1874 02:50:48.209407 PS2K: Passing 80 keymaps to kernel
1875 02:50:48.216181 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1876 02:50:48.223143 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1877 02:50:48.229239 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1878 02:50:48.232499 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1879 02:50:48.236237
1880 02:50:48.239320 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1881 02:50:48.242495
1882 02:50:48.249032 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1883 02:50:48.252805 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1884 02:50:48.255729
1885 02:50:48.258836 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1886 02:50:48.265759 ACPI: added table 2/32, length now 44
1887 02:50:48.266298 ACPI: * MCFG
1888 02:50:48.269177 ACPI: added table 3/32, length now 48
1889 02:50:48.272222 ACPI: * TPM2
1890 02:50:48.275747 TPM2 log created at 0x769f0000
1891 02:50:48.278733 ACPI: added table 4/32, length now 52
1892 02:50:48.279169 ACPI: * MADT
1893 02:50:48.281878 SCI is IRQ9
1894 02:50:48.285401 ACPI: added table 5/32, length now 56
1895 02:50:48.288819 current = 76b09850
1896 02:50:48.289385 ACPI: * DMAR
1897 02:50:48.292317 ACPI: added table 6/32, length now 60
1898 02:50:48.295744 ACPI: added table 7/32, length now 64
1899 02:50:48.298700 ACPI: * HPET
1900 02:50:48.302200 ACPI: added table 8/32, length now 68
1901 02:50:48.302727 ACPI: done.
1902 02:50:48.305122 ACPI tables: 35216 bytes.
1903 02:50:48.308508 smbios_write_tables: 769ef000
1904 02:50:48.311799 EC returned error result code 3
1905 02:50:48.314961 Couldn't obtain OEM name from CBI
1906 02:50:48.318219 Create SMBIOS type 16
1907 02:50:48.322122 Create SMBIOS type 17
1908 02:50:48.324813 GENERIC: 0.0 (WIFI Device)
1909 02:50:48.325241 SMBIOS tables: 1734 bytes.
1910 02:50:48.331483 Writing table forward entry at 0x00000500
1911 02:50:48.337878 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1912 02:50:48.341491 Writing coreboot table at 0x76b25000
1913 02:50:48.347882 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1914 02:50:48.351116 1. 0000000000001000-000000000009ffff: RAM
1915 02:50:48.354716 2. 00000000000a0000-00000000000fffff: RESERVED
1916 02:50:48.361287 3. 0000000000100000-00000000769eefff: RAM
1917 02:50:48.364689 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1918 02:50:48.371243 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1919 02:50:48.377516 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1920 02:50:48.381236 7. 0000000077000000-000000007fbfffff: RESERVED
1921 02:50:48.387787 8. 00000000c0000000-00000000cfffffff: RESERVED
1922 02:50:48.390587 9. 00000000f8000000-00000000f9ffffff: RESERVED
1923 02:50:48.394828 10. 00000000fb000000-00000000fb000fff: RESERVED
1924 02:50:48.400860 11. 00000000fe000000-00000000fe00ffff: RESERVED
1925 02:50:48.404239 12. 00000000fed80000-00000000fed87fff: RESERVED
1926 02:50:48.410741 13. 00000000fed90000-00000000fed92fff: RESERVED
1927 02:50:48.413936 14. 00000000feda0000-00000000feda1fff: RESERVED
1928 02:50:48.420706 15. 00000000fedc0000-00000000feddffff: RESERVED
1929 02:50:48.424381 16. 0000000100000000-00000004803fffff: RAM
1930 02:50:48.427108 Passing 4 GPIOs to payload:
1931 02:50:48.430390 NAME | PORT | POLARITY | VALUE
1932 02:50:48.437221 lid | undefined | high | high
1933 02:50:48.443626 power | undefined | high | low
1934 02:50:48.446806 oprom | undefined | high | low
1935 02:50:48.453772 EC in RW | 0x000000e5 | high | high
1936 02:50:48.460591 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1937 02:50:48.463373 coreboot table: 1576 bytes.
1938 02:50:48.467155 IMD ROOT 0. 0x76fff000 0x00001000
1939 02:50:48.470066 IMD SMALL 1. 0x76ffe000 0x00001000
1940 02:50:48.473065 FSP MEMORY 2. 0x76c4e000 0x003b0000
1941 02:50:48.476764 VPD 3. 0x76c4d000 0x00000367
1942 02:50:48.480019 RO MCACHE 4. 0x76c4c000 0x00000fdc
1943 02:50:48.483218 CONSOLE 5. 0x76c2c000 0x00020000
1944 02:50:48.489716 FMAP 6. 0x76c2b000 0x00000578
1945 02:50:48.492808 TIME STAMP 7. 0x76c2a000 0x00000910
1946 02:50:48.496481 VBOOT WORK 8. 0x76c16000 0x00014000
1947 02:50:48.499676 ROMSTG STCK 9. 0x76c15000 0x00001000
1948 02:50:48.502815 AFTER CAR 10. 0x76c0a000 0x0000b000
1949 02:50:48.506097 RAMSTAGE 11. 0x76b97000 0x00073000
1950 02:50:48.509406 REFCODE 12. 0x76b42000 0x00055000
1951 02:50:48.512617 SMM BACKUP 13. 0x76b32000 0x00010000
1952 02:50:48.519562 4f444749 14. 0x76b30000 0x00002000
1953 02:50:48.522707 EXT VBT15. 0x76b2d000 0x0000219f
1954 02:50:48.525866 COREBOOT 16. 0x76b25000 0x00008000
1955 02:50:48.529735 ACPI 17. 0x76b01000 0x00024000
1956 02:50:48.532580 ACPI GNVS 18. 0x76b00000 0x00001000
1957 02:50:48.535712 RAMOOPS 19. 0x76a00000 0x00100000
1958 02:50:48.539317 TPM2 TCGLOG20. 0x769f0000 0x00010000
1959 02:50:48.542613 SMBIOS 21. 0x769ef000 0x00000800
1960 02:50:48.545715 IMD small region:
1961 02:50:48.549050 IMD ROOT 0. 0x76ffec00 0x00000400
1962 02:50:48.552199 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1963 02:50:48.559231 POWER STATE 2. 0x76ffeb80 0x00000044
1964 02:50:48.562521 ROMSTAGE 3. 0x76ffeb60 0x00000004
1965 02:50:48.565813 MEM INFO 4. 0x76ffe980 0x000001e0
1966 02:50:48.571898 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1967 02:50:48.575463 MTRR: Physical address space:
1968 02:50:48.578548 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1969 02:50:48.582421
1970 02:50:48.585385 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1971 02:50:48.592103 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1972 02:50:48.599131 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1973 02:50:48.605028 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1974 02:50:48.612390 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1975 02:50:48.618511 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1976 02:50:48.621663 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 02:50:48.624914 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 02:50:48.631937 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 02:50:48.634820 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 02:50:48.638585 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 02:50:48.641490 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 02:50:48.647874 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 02:50:48.651303 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 02:50:48.654818 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 02:50:48.657981 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 02:50:48.664467 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 02:50:48.667617 call enable_fixed_mtrr()
1988 02:50:48.671170 CPU physical address size: 39 bits
1989 02:50:48.674271 MTRR: default type WB/UC MTRR counts: 6/7.
1990 02:50:48.677442 MTRR: WB selected as default type.
1991 02:50:48.684545 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1992 02:50:48.691276 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1993 02:50:48.697645 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1994 02:50:48.703871 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1995 02:50:48.710403 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1996 02:50:48.717305 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1997 02:50:48.717790
1998 02:50:48.720837 MTRR check
1999 02:50:48.721424 Fixed MTRRs : Enabled
2000 02:50:48.723820
2001 02:50:48.724260 Variable MTRRs: Enabled
2002 02:50:48.724640
2003 02:50:48.730674 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 02:50:48.733869 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 02:50:48.737076 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 02:50:48.740194 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 02:50:48.743792 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 02:50:48.747030
2009 02:50:48.750340 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 02:50:48.753598 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 02:50:48.756746 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 02:50:48.760082 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 02:50:48.766913 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 02:50:48.770031 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 02:50:48.776878 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2016 02:50:48.780288 call enable_fixed_mtrr()
2017 02:50:48.783841 Checking cr50 for pending updates
2018 02:50:48.787279 CPU physical address size: 39 bits
2019 02:50:48.791537 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 02:50:48.794743 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 02:50:48.801399 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 02:50:48.804308 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 02:50:48.807464 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 02:50:48.810969 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 02:50:48.814399 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 02:50:48.820762 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 02:50:48.824425 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 02:50:48.827555 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 02:50:48.830879 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 02:50:48.837415 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 02:50:48.840939 MTRR: Fixed MSR 0x258 0x0606060606060606
2032 02:50:48.844157 call enable_fixed_mtrr()
2033 02:50:48.847321 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 02:50:48.854018 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 02:50:48.857168 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 02:50:48.860492 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 02:50:48.863848 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 02:50:48.870564 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 02:50:48.873918 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 02:50:48.877585 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 02:50:48.880450 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 02:50:48.885188 CPU physical address size: 39 bits
2043 02:50:48.892666 call enable_fixed_mtrr()
2044 02:50:48.893183 Reading cr50 TPM mode
2045 02:50:48.896143 MTRR: Fixed MSR 0x250 0x0606060606060606
2046 02:50:48.902610 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 02:50:48.906015 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 02:50:48.909820 MTRR: Fixed MSR 0x259 0x0000000000000000
2049 02:50:48.912984 MTRR: Fixed MSR 0x268 0x0606060606060606
2050 02:50:48.919536 MTRR: Fixed MSR 0x269 0x0606060606060606
2051 02:50:48.922624 MTRR: Fixed MSR 0x26a 0x0606060606060606
2052 02:50:48.926386 MTRR: Fixed MSR 0x26b 0x0606060606060606
2053 02:50:48.929304 MTRR: Fixed MSR 0x26c 0x0606060606060606
2054 02:50:48.935813 MTRR: Fixed MSR 0x26d 0x0606060606060606
2055 02:50:48.939579 MTRR: Fixed MSR 0x26e 0x0606060606060606
2056 02:50:48.942359 MTRR: Fixed MSR 0x26f 0x0606060606060606
2057 02:50:48.949296 MTRR: Fixed MSR 0x258 0x0606060606060606
2058 02:50:48.952627 MTRR: Fixed MSR 0x259 0x0000000000000000
2059 02:50:48.956174 MTRR: Fixed MSR 0x268 0x0606060606060606
2060 02:50:48.959527 MTRR: Fixed MSR 0x269 0x0606060606060606
2061 02:50:48.965925 MTRR: Fixed MSR 0x26a 0x0606060606060606
2062 02:50:48.969798 MTRR: Fixed MSR 0x26b 0x0606060606060606
2063 02:50:48.973046 MTRR: Fixed MSR 0x26c 0x0606060606060606
2064 02:50:48.976263 MTRR: Fixed MSR 0x26d 0x0606060606060606
2065 02:50:48.982604 MTRR: Fixed MSR 0x26e 0x0606060606060606
2066 02:50:48.986105 MTRR: Fixed MSR 0x26f 0x0606060606060606
2067 02:50:48.989152 call enable_fixed_mtrr()
2068 02:50:48.993150 call enable_fixed_mtrr()
2069 02:50:48.999278 BS: BS_PAYLOAD_LOAD entry times (exec / console): 114 / 6 ms
2070 02:50:49.002411 MTRR: Fixed MSR 0x250 0x0606060606060606
2071 02:50:49.005723 MTRR: Fixed MSR 0x250 0x0606060606060606
2072 02:50:49.008807 MTRR: Fixed MSR 0x258 0x0606060606060606
2073 02:50:49.015761 MTRR: Fixed MSR 0x259 0x0000000000000000
2074 02:50:49.019391 MTRR: Fixed MSR 0x268 0x0606060606060606
2075 02:50:49.022561 MTRR: Fixed MSR 0x269 0x0606060606060606
2076 02:50:49.025665 MTRR: Fixed MSR 0x26a 0x0606060606060606
2077 02:50:49.032098 MTRR: Fixed MSR 0x26b 0x0606060606060606
2078 02:50:49.035416 MTRR: Fixed MSR 0x26c 0x0606060606060606
2079 02:50:49.038952 MTRR: Fixed MSR 0x26d 0x0606060606060606
2080 02:50:49.042406 MTRR: Fixed MSR 0x26e 0x0606060606060606
2081 02:50:49.045687 MTRR: Fixed MSR 0x26f 0x0606060606060606
2082 02:50:49.048778
2083 02:50:49.051978 MTRR: Fixed MSR 0x258 0x0606060606060606
2084 02:50:49.055581 call enable_fixed_mtrr()
2085 02:50:49.058763 MTRR: Fixed MSR 0x259 0x0000000000000000
2086 02:50:49.061985 MTRR: Fixed MSR 0x268 0x0606060606060606
2087 02:50:49.065539
2088 02:50:49.069022 MTRR: Fixed MSR 0x269 0x0606060606060606
2089 02:50:49.071923 MTRR: Fixed MSR 0x26a 0x0606060606060606
2090 02:50:49.075463 MTRR: Fixed MSR 0x26b 0x0606060606060606
2091 02:50:49.078717 MTRR: Fixed MSR 0x26c 0x0606060606060606
2092 02:50:49.085509 MTRR: Fixed MSR 0x26d 0x0606060606060606
2093 02:50:49.088440 MTRR: Fixed MSR 0x26e 0x0606060606060606
2094 02:50:49.092045 MTRR: Fixed MSR 0x26f 0x0606060606060606
2095 02:50:49.095848 CPU physical address size: 39 bits
2096 02:50:49.102826 call enable_fixed_mtrr()
2097 02:50:49.109199 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2098 02:50:49.112402 CPU physical address size: 39 bits
2099 02:50:49.116703 CPU physical address size: 39 bits
2100 02:50:49.123108 CPU physical address size: 39 bits
2101 02:50:49.126395 CPU physical address size: 39 bits
2102 02:50:49.129671 Checking segment from ROM address 0xffc02b38
2103 02:50:49.132806 Checking segment from ROM address 0xffc02b54
2104 02:50:49.139761 Loading segment from ROM address 0xffc02b38
2105 02:50:49.140285 code (compression=0)
2106 02:50:49.149617 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2107 02:50:49.159087 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2108 02:50:49.159536 it's not compressed!
2109 02:50:49.299714 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2110 02:50:49.306737 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2111 02:50:49.313825 Loading segment from ROM address 0xffc02b54
2112 02:50:49.316718 Entry Point 0x30000000
2113 02:50:49.317358 Loaded segments
2114 02:50:49.323468 BS: BS_PAYLOAD_LOAD run times (exec / console): 256 / 63 ms
2115 02:50:49.368487 Finalizing chipset.
2116 02:50:49.371857 Finalizing SMM.
2117 02:50:49.372405 APMC done.
2118 02:50:49.378488 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2119 02:50:49.381626 mp_park_aps done after 0 msecs.
2120 02:50:49.385256 Jumping to boot code at 0x30000000(0x76b25000)
2121 02:50:49.394931 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2122 02:50:49.395371
2123 02:50:49.395719
2124 02:50:49.398095
2125 02:50:49.398535
2126 02:50:49.399640 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2127 02:50:49.400336 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2128 02:50:49.400820 Setting prompt string to ['volteer:']
2129 02:50:49.401242 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2130 02:50:49.402262 Starting depthcharge on Voema...
2131 02:50:49.402645
2132 02:50:49.407866 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2133 02:50:49.408321
2134 02:50:49.414845 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2135 02:50:49.415385
2136 02:50:49.421235 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2137 02:50:49.421708
2138 02:50:49.424659 Failed to find eMMC card reader
2139 02:50:49.425218
2140 02:50:49.427613 Wipe memory regions:
2141 02:50:49.428047
2142 02:50:49.430898 [0x00000000001000, 0x000000000a0000)
2143 02:50:49.431334
2144 02:50:49.434172 [0x00000000100000, 0x00000030000000)
2145 02:50:49.434629
2146 02:50:49.471796 [0x00000032662db0, 0x000000769ef000)
2147 02:50:49.472308
2148 02:50:49.523044 [0x00000100000000, 0x00000480400000)
2149 02:50:49.523548
2150 02:50:50.166721 ec_init: CrosEC protocol v3 supported (256, 256)
2151 02:50:50.167232
2152 02:50:50.598414 R8152: Initializing
2153 02:50:50.598966
2154 02:50:50.601706 Version 6 (ocp_data = 5c30)
2155 02:50:50.602265
2156 02:50:50.604929 R8152: Done initializing
2157 02:50:50.605515
2158 02:50:50.608636 Adding net device
2159 02:50:50.609177
2160 02:50:50.912882 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2161 02:50:50.913420
2162 02:50:50.913883
2163 02:50:50.914308
2164 02:50:50.916488 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2166 02:50:51.018423 volteer: tftpboot 192.168.201.1 7991712/tftp-deploy-7v0wun40/kernel/bzImage 7991712/tftp-deploy-7v0wun40/kernel/cmdline 7991712/tftp-deploy-7v0wun40/ramdisk/ramdisk.cpio.gz
2167 02:50:51.019054 Setting prompt string to 'Starting kernel'
2168 02:50:51.019500 Setting prompt string to ['Starting kernel']
2169 02:50:51.019949 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2170 02:50:51.020421 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2171 02:50:51.023976 tftpboot 192.168.201.1 7991712/tftp-deploy-7v0wun40/kernel/bzImaoy-7v0wun40/kernel/cmdline 7991712/tftp-deploy-7v0wun40/ramdisk/ramdisk.cpio.gz
2172 02:50:51.024461
2173 02:50:51.024858 Waiting for link
2174 02:50:51.025189
2175 02:50:51.227188 done.
2176 02:50:51.227695
2177 02:50:51.228045 MAC: 00:24:32:30:7d:ab
2178 02:50:51.228371
2179 02:50:51.230416 Sending DHCP discover... done.
2180 02:50:51.230855
2181 02:50:51.233530 Waiting for reply... done.
2182 02:50:51.233965
2183 02:50:51.236993 Sending DHCP request... done.
2184 02:50:51.237463
2185 02:50:51.244078 Waiting for reply... done.
2186 02:50:51.244516
2187 02:50:51.244866 My ip is 192.168.201.20
2188 02:50:51.245194
2189 02:50:51.247265 The DHCP server ip is 192.168.201.1
2190 02:50:51.247705
2191 02:50:51.253542 TFTP server IP predefined by user: 192.168.201.1
2192 02:50:51.254063
2193 02:50:51.259957 Bootfile predefined by user: 7991712/tftp-deploy-7v0wun40/kernel/bzImage
2194 02:50:51.260398
2195 02:50:51.263229 Sending tftp read request... done.
2196 02:50:51.263667
2197 02:50:51.270073 Waiting for the transfer...
2198 02:50:51.270510
2199 02:50:51.938735 00000000 ################################################################
2200 02:50:51.939295
2201 02:50:52.609091 00080000 ################################################################
2202 02:50:52.609655
2203 02:50:53.280036 00100000 ################################################################
2204 02:50:53.280787
2205 02:50:53.970552 00180000 ################################################################
2206 02:50:53.971073
2207 02:50:54.653142 00200000 ################################################################
2208 02:50:54.653681
2209 02:50:55.341660 00280000 ################################################################
2210 02:50:55.342173
2211 02:50:56.024659 00300000 ################################################################
2212 02:50:56.025267
2213 02:50:56.700571 00380000 ################################################################
2214 02:50:56.701080
2215 02:50:57.380051 00400000 ################################################################
2216 02:50:57.380587
2217 02:50:58.065369 00480000 ################################################################
2218 02:50:58.066046
2219 02:50:58.723474 00500000 ################################################################
2220 02:50:58.723625
2221 02:50:59.354884 00580000 ################################################################
2222 02:50:59.355439
2223 02:51:00.037400 00600000 ################################################################
2224 02:51:00.037973
2225 02:51:00.689225 00680000 ################################################################
2226 02:51:00.689415
2227 02:51:01.312011 00700000 ################################################################
2228 02:51:01.312545
2229 02:51:01.979903 00780000 ################################################################
2230 02:51:01.980470
2231 02:51:02.626187 00800000 ################################################################
2232 02:51:02.626768
2233 02:51:03.115808 00880000 ############################################## done.
2234 02:51:03.116373
2235 02:51:03.118877 The bootfile was 9281536 bytes long.
2236 02:51:03.119315
2237 02:51:03.122591 Sending tftp read request... done.
2238 02:51:03.123046
2239 02:51:03.125504 Waiting for the transfer...
2240 02:51:03.125962
2241 02:51:03.797881 00000000 ################################################################
2242 02:51:03.798442
2243 02:51:04.441826 00080000 ################################################################
2244 02:51:04.442369
2245 02:51:05.094829 00100000 ################################################################
2246 02:51:05.095367
2247 02:51:05.702422 00180000 ################################################################
2248 02:51:05.703054
2249 02:51:06.354877 00200000 ################################################################
2250 02:51:06.355029
2251 02:51:07.005055 00280000 ################################################################
2252 02:51:07.005776
2253 02:51:07.566261 00300000 ################################################################
2254 02:51:07.566404
2255 02:51:08.226777 00380000 ################################################################
2256 02:51:08.227343
2257 02:51:08.806327 00400000 ################################################################
2258 02:51:08.806482
2259 02:51:09.341990 00480000 ################################################################
2260 02:51:09.342145
2261 02:51:09.889427 00500000 ################################################################
2262 02:51:09.889589
2263 02:51:10.418060 00580000 ################################################################
2264 02:51:10.418224
2265 02:51:10.923883 00600000 ################################################################
2266 02:51:10.924037
2267 02:51:11.473369 00680000 ################################################################
2268 02:51:11.473517
2269 02:51:12.012020 00700000 ################################################################
2270 02:51:12.012172
2271 02:51:12.525499 00780000 ################################################################
2272 02:51:12.525657
2273 02:51:12.712905 00800000 ####################### done.
2274 02:51:12.713046
2275 02:51:12.716709 Sending tftp read request... done.
2276 02:51:12.716795
2277 02:51:12.716862 Waiting for the transfer...
2278 02:51:12.719918
2279 02:51:12.720003 00000000 # done.
2280 02:51:12.720071
2281 02:51:12.729712 Command line loaded dynamically from TFTP file: 7991712/tftp-deploy-7v0wun40/kernel/cmdline
2282 02:51:12.729797
2283 02:51:12.742511 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2284 02:51:12.742612
2285 02:51:12.750027 Shutting down all USB controllers.
2286 02:51:12.750141
2287 02:51:12.750231 Removing current net device
2288 02:51:12.750314
2289 02:51:12.753161 Finalizing coreboot
2290 02:51:12.753276
2291 02:51:12.759707 Exiting depthcharge with code 4 at timestamp: 31931190
2292 02:51:12.759847
2293 02:51:12.759957
2294 02:51:12.760073 Starting kernel ...
2295 02:51:12.760178
2296 02:51:12.760277
2297 02:51:12.760372
2298 02:51:12.760874 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2299 02:51:12.761031 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2300 02:51:12.761150 Setting prompt string to ['Linux version [0-9]']
2301 02:51:12.761263 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2302 02:51:12.761390 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2304 02:55:33.761261 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2306 02:55:33.761533 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2308 02:55:33.761695 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2311 02:55:33.761962 end: 2 depthcharge-action (duration 00:05:00) [common]
2313 02:55:33.762196 Cleaning after the job
2314 02:55:33.762294 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7991712/tftp-deploy-7v0wun40/ramdisk
2315 02:55:33.762902 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7991712/tftp-deploy-7v0wun40/kernel
2316 02:55:33.763501 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7991712/tftp-deploy-7v0wun40/modules
2317 02:55:33.763694 start: 5.1 power-off (timeout 00:00:30) [common]
2318 02:55:33.763855 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2319 02:55:33.783098 >> Command sent successfully.
2320 02:55:33.785114 Returned 0 in 0 seconds
2321 02:55:33.885470 end: 5.1 power-off (duration 00:00:00) [common]
2323 02:55:33.885817 start: 5.2 read-feedback (timeout 00:10:00) [common]
2324 02:55:33.886062 Listened to connection for namespace 'common' for up to 1s
2325 02:55:34.889590 Finalising connection for namespace 'common'
2326 02:55:34.890295 Disconnecting from shell: Finalise
2327 02:55:34.991612 end: 5.2 read-feedback (duration 00:00:01) [common]
2328 02:55:34.991840 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7991712
2329 02:55:34.998904 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7991712
2330 02:55:34.999162 JobError: Your job cannot terminate cleanly.