Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 03:22:23.502679 lava-dispatcher, installed at version: 2022.11
2 03:22:23.502880 start: 0 validate
3 03:22:23.503026 Start time: 2023-01-19 03:22:23.503018+00:00 (UTC)
4 03:22:23.503160 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:22:23.503297 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230114.0%2Famd64%2Finitrd.cpio.gz exists
6 03:22:23.788689 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:22:23.788914 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.269-cip88-rt28-rebase%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:22:24.078544 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:22:24.079265 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230114.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 03:22:24.376583 Using caching service: 'http://localhost/cache/?uri=%s'
11 03:22:24.376759 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.269-cip88-rt28-rebase%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 03:22:24.670051 validate duration: 1.17
14 03:22:24.670432 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 03:22:24.670554 start: 1.1 download-retry (timeout 00:10:00) [common]
16 03:22:24.670668 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 03:22:24.670819 Not decompressing ramdisk as can be used compressed.
18 03:22:24.670937 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230114.0/amd64/initrd.cpio.gz
19 03:22:24.671039 saving as /var/lib/lava/dispatcher/tmp/8789760/tftp-deploy-1835veix/ramdisk/initrd.cpio.gz
20 03:22:24.671150 total size: 5432135 (5MB)
21 03:22:24.672507 progress 0% (0MB)
22 03:22:24.674248 progress 5% (0MB)
23 03:22:24.675757 progress 10% (0MB)
24 03:22:24.677319 progress 15% (0MB)
25 03:22:24.678937 progress 20% (1MB)
26 03:22:24.680411 progress 25% (1MB)
27 03:22:24.681847 progress 30% (1MB)
28 03:22:24.683418 progress 35% (1MB)
29 03:22:24.684871 progress 40% (2MB)
30 03:22:24.686292 progress 45% (2MB)
31 03:22:24.687714 progress 50% (2MB)
32 03:22:24.689306 progress 55% (2MB)
33 03:22:24.690755 progress 60% (3MB)
34 03:22:24.692226 progress 65% (3MB)
35 03:22:24.693851 progress 70% (3MB)
36 03:22:24.695241 progress 75% (3MB)
37 03:22:24.696701 progress 80% (4MB)
38 03:22:24.698120 progress 85% (4MB)
39 03:22:24.699701 progress 90% (4MB)
40 03:22:24.701163 progress 95% (4MB)
41 03:22:24.702641 progress 100% (5MB)
42 03:22:24.702934 5MB downloaded in 0.03s (163.02MB/s)
43 03:22:24.703159 end: 1.1.1 http-download (duration 00:00:00) [common]
45 03:22:24.703464 end: 1.1 download-retry (duration 00:00:00) [common]
46 03:22:24.703604 start: 1.2 download-retry (timeout 00:10:00) [common]
47 03:22:24.703729 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 03:22:24.703918 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.269-cip88-rt28-rebase/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 03:22:24.704011 saving as /var/lib/lava/dispatcher/tmp/8789760/tftp-deploy-1835veix/kernel/bzImage
50 03:22:24.704095 total size: 9711616 (9MB)
51 03:22:24.704191 No compression specified
52 03:22:24.705438 progress 0% (0MB)
53 03:22:24.708194 progress 5% (0MB)
54 03:22:24.710919 progress 10% (0MB)
55 03:22:24.713558 progress 15% (1MB)
56 03:22:24.716256 progress 20% (1MB)
57 03:22:24.718854 progress 25% (2MB)
58 03:22:24.721385 progress 30% (2MB)
59 03:22:24.723980 progress 35% (3MB)
60 03:22:24.726864 progress 40% (3MB)
61 03:22:24.729496 progress 45% (4MB)
62 03:22:24.732151 progress 50% (4MB)
63 03:22:24.734751 progress 55% (5MB)
64 03:22:24.737169 progress 60% (5MB)
65 03:22:24.739730 progress 65% (6MB)
66 03:22:24.742321 progress 70% (6MB)
67 03:22:24.744897 progress 75% (6MB)
68 03:22:24.747468 progress 80% (7MB)
69 03:22:24.749883 progress 85% (7MB)
70 03:22:24.752459 progress 90% (8MB)
71 03:22:24.755029 progress 95% (8MB)
72 03:22:24.757684 progress 100% (9MB)
73 03:22:24.757912 9MB downloaded in 0.05s (172.11MB/s)
74 03:22:24.758105 end: 1.2.1 http-download (duration 00:00:00) [common]
76 03:22:24.758447 end: 1.2 download-retry (duration 00:00:00) [common]
77 03:22:24.758575 start: 1.3 download-retry (timeout 00:10:00) [common]
78 03:22:24.758694 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 03:22:24.758845 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230114.0/amd64/full.rootfs.tar.xz
80 03:22:24.758921 saving as /var/lib/lava/dispatcher/tmp/8789760/tftp-deploy-1835veix/nfsrootfs/full.rootfs.tar
81 03:22:24.758990 total size: 133346544 (127MB)
82 03:22:24.759058 Using unxz to decompress xz
83 03:22:24.762645 progress 0% (0MB)
84 03:22:25.134709 progress 5% (6MB)
85 03:22:25.537276 progress 10% (12MB)
86 03:22:25.864668 progress 15% (19MB)
87 03:22:26.103457 progress 20% (25MB)
88 03:22:26.387752 progress 25% (31MB)
89 03:22:26.770204 progress 30% (38MB)
90 03:22:27.161363 progress 35% (44MB)
91 03:22:27.598880 progress 40% (50MB)
92 03:22:28.023798 progress 45% (57MB)
93 03:22:28.417228 progress 50% (63MB)
94 03:22:28.832661 progress 55% (69MB)
95 03:22:29.239042 progress 60% (76MB)
96 03:22:29.644987 progress 65% (82MB)
97 03:22:30.048775 progress 70% (89MB)
98 03:22:30.454274 progress 75% (95MB)
99 03:22:30.945260 progress 80% (101MB)
100 03:22:31.439174 progress 85% (108MB)
101 03:22:31.750242 progress 90% (114MB)
102 03:22:32.138055 progress 95% (120MB)
103 03:22:32.579611 progress 100% (127MB)
104 03:22:32.585739 127MB downloaded in 7.83s (16.25MB/s)
105 03:22:32.586022 end: 1.3.1 http-download (duration 00:00:08) [common]
107 03:22:32.586318 end: 1.3 download-retry (duration 00:00:08) [common]
108 03:22:32.586419 start: 1.4 download-retry (timeout 00:09:52) [common]
109 03:22:32.586516 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 03:22:32.586641 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.269-cip88-rt28-rebase/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 03:22:32.586720 saving as /var/lib/lava/dispatcher/tmp/8789760/tftp-deploy-1835veix/modules/modules.tar
112 03:22:32.586789 total size: 64648 (0MB)
113 03:22:32.586860 Using unxz to decompress xz
114 03:22:32.590184 progress 50% (0MB)
115 03:22:32.590601 progress 100% (0MB)
116 03:22:32.595215 0MB downloaded in 0.01s (7.32MB/s)
117 03:22:32.595467 end: 1.4.1 http-download (duration 00:00:00) [common]
119 03:22:32.595762 end: 1.4 download-retry (duration 00:00:00) [common]
120 03:22:32.595871 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 03:22:32.595981 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 03:22:33.983931 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8789760/extract-nfsrootfs-40taob7f
123 03:22:33.984151 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 03:22:33.984268 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 03:22:33.984415 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk
126 03:22:33.984528 makedir: /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin
127 03:22:33.984630 makedir: /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/tests
128 03:22:33.984728 makedir: /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/results
129 03:22:33.984837 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-add-keys
130 03:22:33.984980 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-add-sources
131 03:22:33.985105 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-background-process-start
132 03:22:33.985229 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-background-process-stop
133 03:22:33.985353 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-common-functions
134 03:22:33.985473 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-echo-ipv4
135 03:22:33.985592 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-install-packages
136 03:22:33.985712 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-installed-packages
137 03:22:33.985830 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-os-build
138 03:22:33.985949 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-probe-channel
139 03:22:33.986066 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-probe-ip
140 03:22:33.986184 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-target-ip
141 03:22:33.986301 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-target-mac
142 03:22:33.986418 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-target-storage
143 03:22:33.986540 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-test-case
144 03:22:33.986676 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-test-event
145 03:22:33.986799 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-test-feedback
146 03:22:33.986919 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-test-raise
147 03:22:33.987039 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-test-reference
148 03:22:33.987157 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-test-runner
149 03:22:33.987276 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-test-set
150 03:22:33.987393 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-test-shell
151 03:22:33.987513 Updating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-install-packages (oe)
152 03:22:33.987640 Updating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/bin/lava-installed-packages (oe)
153 03:22:33.987746 Creating /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/environment
154 03:22:33.987838 LAVA metadata
155 03:22:33.987910 - LAVA_JOB_ID=8789760
156 03:22:33.987980 - LAVA_DISPATCHER_IP=192.168.201.1
157 03:22:33.988226 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 03:22:33.988303 skipped lava-vland-overlay
159 03:22:33.988388 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 03:22:33.988479 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 03:22:33.988548 skipped lava-multinode-overlay
162 03:22:33.988632 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 03:22:33.988758 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 03:22:33.988859 Loading test definitions
165 03:22:33.988963 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
166 03:22:33.989042 Using /lava-8789760 at stage 0
167 03:22:33.989322 uuid=8789760_1.5.2.3.1 testdef=None
168 03:22:33.989422 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 03:22:33.989517 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
170 03:22:33.990036 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 03:22:33.990290 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
173 03:22:33.990926 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 03:22:33.991193 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
176 03:22:33.991803 runner path: /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/0/tests/0_dmesg test_uuid 8789760_1.5.2.3.1
177 03:22:33.991970 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 03:22:33.992236 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
180 03:22:33.992317 Using /lava-8789760 at stage 1
181 03:22:33.992580 uuid=8789760_1.5.2.3.5 testdef=None
182 03:22:33.992689 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 03:22:33.992785 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
184 03:22:33.993273 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 03:22:33.993522 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
187 03:22:33.994159 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 03:22:33.994421 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
190 03:22:33.995055 runner path: /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/1/tests/1_bootrr test_uuid 8789760_1.5.2.3.5
191 03:22:33.995215 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 03:22:33.995450 Creating lava-test-runner.conf files
194 03:22:33.995522 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/0 for stage 0
195 03:22:33.995612 - 0_dmesg
196 03:22:33.995694 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8789760/lava-overlay-2c7swzbk/lava-8789760/1 for stage 1
197 03:22:33.995785 - 1_bootrr
198 03:22:33.995884 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 03:22:33.995980 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
200 03:22:34.002423 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 03:22:34.002543 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
202 03:22:34.002640 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 03:22:34.002737 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 03:22:34.002878 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
205 03:22:34.119728 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 03:22:34.120113 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 03:22:34.120248 extracting modules file /var/lib/lava/dispatcher/tmp/8789760/tftp-deploy-1835veix/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8789760/extract-nfsrootfs-40taob7f
208 03:22:34.124687 extracting modules file /var/lib/lava/dispatcher/tmp/8789760/tftp-deploy-1835veix/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8789760/extract-overlay-ramdisk-e07g37rg/ramdisk
209 03:22:34.128830 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 03:22:34.128961 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 03:22:34.129055 [common] Applying overlay to NFS
212 03:22:34.129137 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8789760/compress-overlay-0q1f9xmn/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8789760/extract-nfsrootfs-40taob7f
213 03:22:34.133471 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 03:22:34.133599 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 03:22:34.133703 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 03:22:34.133803 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 03:22:34.133894 Building ramdisk /var/lib/lava/dispatcher/tmp/8789760/extract-overlay-ramdisk-e07g37rg/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8789760/extract-overlay-ramdisk-e07g37rg/ramdisk
218 03:22:34.172476 >> 24777 blocks
219 03:22:34.697177 rename /var/lib/lava/dispatcher/tmp/8789760/extract-overlay-ramdisk-e07g37rg/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8789760/tftp-deploy-1835veix/ramdisk/ramdisk.cpio.gz
220 03:22:34.697605 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 03:22:34.697740 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
222 03:22:34.697848 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
223 03:22:34.697959 No mkimage arch provided, not using FIT.
224 03:22:34.698065 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 03:22:34.698164 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 03:22:34.698277 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 03:22:34.698383 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
228 03:22:34.698470 No LXC device requested
229 03:22:34.698560 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 03:22:34.698660 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
231 03:22:34.698752 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 03:22:34.698826 Checking files for TFTP limit of 4294967296 bytes.
233 03:22:34.699252 end: 1 tftp-deploy (duration 00:00:10) [common]
234 03:22:34.699372 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 03:22:34.699478 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 03:22:34.699630 substitutions:
237 03:22:34.699708 - {DTB}: None
238 03:22:34.699781 - {INITRD}: 8789760/tftp-deploy-1835veix/ramdisk/ramdisk.cpio.gz
239 03:22:34.699851 - {KERNEL}: 8789760/tftp-deploy-1835veix/kernel/bzImage
240 03:22:34.699926 - {LAVA_MAC}: None
241 03:22:34.699994 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8789760/extract-nfsrootfs-40taob7f
242 03:22:34.700072 - {NFS_SERVER_IP}: 192.168.201.1
243 03:22:34.700138 - {PRESEED_CONFIG}: None
244 03:22:34.700203 - {PRESEED_LOCAL}: None
245 03:22:34.700268 - {RAMDISK}: 8789760/tftp-deploy-1835veix/ramdisk/ramdisk.cpio.gz
246 03:22:34.700331 - {ROOT_PART}: None
247 03:22:34.700395 - {ROOT}: None
248 03:22:34.700458 - {SERVER_IP}: 192.168.201.1
249 03:22:34.700521 - {TEE}: None
250 03:22:34.700584 Parsed boot commands:
251 03:22:34.700646 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 03:22:34.700819 Parsed boot commands: tftpboot 192.168.201.1 8789760/tftp-deploy-1835veix/kernel/bzImage 8789760/tftp-deploy-1835veix/kernel/cmdline 8789760/tftp-deploy-1835veix/ramdisk/ramdisk.cpio.gz
253 03:22:34.700929 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 03:22:34.701032 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 03:22:34.701133 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 03:22:34.701229 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 03:22:34.701309 Not connected, no need to disconnect.
258 03:22:34.701397 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 03:22:34.701492 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 03:22:34.701591 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
261 03:22:34.704446 Setting prompt string to ['lava-test: # ']
262 03:22:34.704789 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 03:22:34.704913 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 03:22:34.705026 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 03:22:34.705132 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 03:22:34.705365 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
267 03:22:34.727969 >> Command sent successfully.
268 03:22:34.730377 Returned 0 in 0 seconds
269 03:22:34.831324 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 03:22:34.832128 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 03:22:34.832406 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 03:22:34.832654 Setting prompt string to 'Starting depthcharge on Helios...'
274 03:22:34.832837 Changing prompt to 'Starting depthcharge on Helios...'
275 03:22:34.833034 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
276 03:22:34.833728 [Enter `^Ec?' for help]
277 03:22:41.759837
278 03:22:41.760004
279 03:22:41.769688 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
280 03:22:41.772722 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
281 03:22:41.779544 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
282 03:22:41.783226 CPU: AES supported, TXT NOT supported, VT supported
283 03:22:41.790013 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
284 03:22:41.793287 PCH: device id 0284 (rev 00) is Cometlake-U Premium
285 03:22:41.799975 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
286 03:22:41.803111 VBOOT: Loading verstage.
287 03:22:41.806285 FMAP: Found "FLASH" version 1.1 at 0xc04000.
288 03:22:41.813387 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
289 03:22:41.816327 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
290 03:22:41.819682 CBFS @ c08000 size 3f8000
291 03:22:41.826328 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
292 03:22:41.829828 CBFS: Locating 'fallback/verstage'
293 03:22:41.833110 CBFS: Found @ offset 10fb80 size 1072c
294 03:22:41.836623
295 03:22:41.836913
296 03:22:41.847489 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
297 03:22:41.861282 Probing TPM: . done!
298 03:22:41.864744 TPM ready after 0 ms
299 03:22:41.867638 Connected to device vid:did:rid of 1ae0:0028:00
300 03:22:41.878363 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
301 03:22:41.881303 Initialized TPM device CR50 revision 0
302 03:22:41.923874 tlcl_send_startup: Startup return code is 0
303 03:22:41.924408 TPM: setup succeeded
304 03:22:41.936579 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
305 03:22:41.940363 Chrome EC: UHEPI supported
306 03:22:41.944010 Phase 1
307 03:22:41.947020 FMAP: area GBB found @ c05000 (12288 bytes)
308 03:22:41.953508 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
309 03:22:41.953946 Phase 2
310 03:22:41.957256
311 03:22:41.957690 Phase 3
312 03:22:41.960183 FMAP: area GBB found @ c05000 (12288 bytes)
313 03:22:41.966920 VB2:vb2_report_dev_firmware() This is developer signed firmware
314 03:22:41.973395 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
315 03:22:41.976955 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
316 03:22:41.983510 VB2:vb2_verify_keyblock() Checking keyblock signature...
317 03:22:41.999181 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
318 03:22:42.002147 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
319 03:22:42.009132 VB2:vb2_verify_fw_preamble() Verifying preamble.
320 03:22:42.013845 Phase 4
321 03:22:42.016664 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
322 03:22:42.023208 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
323 03:22:42.203263 VB2:vb2_rsa_verify_digest() Digest check failed!
324 03:22:42.206197 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
325 03:22:42.209654
326 03:22:42.210136 Saving nvdata
327 03:22:42.212710 Reboot requested (10020007)
328 03:22:42.215889 board_reset() called!
329 03:22:42.216456 full_reset() called!
330 03:22:46.727531
331 03:22:46.728156
332 03:22:46.737622 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
333 03:22:46.740930 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
334 03:22:46.747603 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
335 03:22:46.751085 CPU: AES supported, TXT NOT supported, VT supported
336 03:22:46.757272 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
337 03:22:46.760908 PCH: device id 0284 (rev 00) is Cometlake-U Premium
338 03:22:46.767323 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
339 03:22:46.771013 VBOOT: Loading verstage.
340 03:22:46.773987 FMAP: Found "FLASH" version 1.1 at 0xc04000.
341 03:22:46.781225 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
342 03:22:46.784162 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
343 03:22:46.787683 CBFS @ c08000 size 3f8000
344 03:22:46.794276 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
345 03:22:46.797467 CBFS: Locating 'fallback/verstage'
346 03:22:46.800681 CBFS: Found @ offset 10fb80 size 1072c
347 03:22:46.804270
348 03:22:46.804882
349 03:22:46.813777 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
350 03:22:46.828381 Probing TPM: . done!
351 03:22:46.831909 TPM ready after 0 ms
352 03:22:46.834880 Connected to device vid:did:rid of 1ae0:0028:00
353 03:22:46.845342 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
354 03:22:46.848994 Initialized TPM device CR50 revision 0
355 03:22:46.892428 tlcl_send_startup: Startup return code is 0
356 03:22:46.893045 TPM: setup succeeded
357 03:22:46.904858 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
358 03:22:46.908422 Chrome EC: UHEPI supported
359 03:22:46.912252 Phase 1
360 03:22:46.915162 FMAP: area GBB found @ c05000 (12288 bytes)
361 03:22:46.922040 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
362 03:22:46.928911 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
363 03:22:46.932328 Recovery requested (1009000e)
364 03:22:46.932808 Saving nvdata
365 03:22:46.937886
366 03:22:46.943709 tlcl_extend: response is 0
367 03:22:46.951837 tlcl_extend: response is 0
368 03:22:46.958895 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
369 03:22:46.962065 CBFS @ c08000 size 3f8000
370 03:22:46.969261 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
371 03:22:46.972383 CBFS: Locating 'fallback/romstage'
372 03:22:46.975625 CBFS: Found @ offset 80 size 145fc
373 03:22:46.978751 Accumulated console time in verstage 98 ms
374 03:22:46.978839
375 03:22:46.978919
376 03:22:46.992264 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
377 03:22:46.998590 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
378 03:22:47.001791 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
379 03:22:47.005316 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
380 03:22:47.012040 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
381 03:22:47.015652 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
382 03:22:47.018860 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
383 03:22:47.021823 TCO_STS: 0000 0000
384 03:22:47.024983 GEN_PMCON: e0015238 00000200
385 03:22:47.028551 GBLRST_CAUSE: 00000000 00000000
386 03:22:47.028647 prev_sleep_state 5
387 03:22:47.031727 Boot Count incremented to 42340
388 03:22:47.038406 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
389 03:22:47.041991 CBFS @ c08000 size 3f8000
390 03:22:47.048549 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
391 03:22:47.048644 CBFS: Locating 'fspm.bin'
392 03:22:47.055387 CBFS: Found @ offset 5ffc0 size 71000
393 03:22:47.058571 Chrome EC: UHEPI supported
394 03:22:47.065020 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
395 03:22:47.068631 Probing TPM: done!
396 03:22:47.075803 Connected to device vid:did:rid of 1ae0:0028:00
397 03:22:47.085518 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
398 03:22:47.091639 Initialized TPM device CR50 revision 0
399 03:22:47.100429 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 03:22:47.107191 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
401 03:22:47.110252 MRC cache found, size 1948
402 03:22:47.113798 bootmode is set to: 2
403 03:22:47.116935 PRMRR disabled by config.
404 03:22:47.117031 SPD INDEX = 1
405 03:22:47.120587
406 03:22:47.123258 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
407 03:22:47.126852 CBFS @ c08000 size 3f8000
408 03:22:47.133168 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
409 03:22:47.133264 CBFS: Locating 'spd.bin'
410 03:22:47.136389 CBFS: Found @ offset 5fb80 size 400
411 03:22:47.140114 SPD: module type is LPDDR3
412 03:22:47.143106 SPD: module part is
413 03:22:47.149818 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
414 03:22:47.153511 SPD: device width 4 bits, bus width 8 bits
415 03:22:47.156440 SPD: module size is 4096 MB (per channel)
416 03:22:47.159936 memory slot: 0 configuration done.
417 03:22:47.163002 memory slot: 2 configuration done.
418 03:22:47.215003 CBMEM:
419 03:22:47.218517 IMD: root @ 99fff000 254 entries.
420 03:22:47.221489 IMD: root @ 99ffec00 62 entries.
421 03:22:47.225112 External stage cache:
422 03:22:47.228217 IMD: root @ 9abff000 254 entries.
423 03:22:47.231887 IMD: root @ 9abfec00 62 entries.
424 03:22:47.234852 Chrome EC: clear events_b mask to 0x0000000020004000
425 03:22:47.250596 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
426 03:22:47.255474
427 03:22:47.264539 tlcl_write: response is 0
428 03:22:47.273395 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
429 03:22:47.279938 MRC: TPM MRC hash updated successfully.
430 03:22:47.280038 2 DIMMs found
431 03:22:47.282897 SMM Memory Map
432 03:22:47.286419 SMRAM : 0x9a000000 0x1000000
433 03:22:47.289486 Subregion 0: 0x9a000000 0xa00000
434 03:22:47.292940 Subregion 1: 0x9aa00000 0x200000
435 03:22:47.296608 Subregion 2: 0x9ac00000 0x400000
436 03:22:47.299556 top_of_ram = 0x9a000000
437 03:22:47.303158 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
438 03:22:47.309383 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
439 03:22:47.312858 MTRR Range: Start=ff000000 End=0 (Size 1000000)
440 03:22:47.319437 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 03:22:47.323035 CBFS @ c08000 size 3f8000
442 03:22:47.326246 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 03:22:47.329241 CBFS: Locating 'fallback/postcar'
444 03:22:47.335969 CBFS: Found @ offset 107000 size 4b44
445 03:22:47.339118 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
446 03:22:47.351929 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
447 03:22:47.355000 Processing 180 relocs. Offset value of 0x97c0c000
448 03:22:47.363516 Accumulated console time in romstage 286 ms
449 03:22:47.363612
450 03:22:47.363688
451 03:22:47.373042 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
452 03:22:47.379746 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
453 03:22:47.383319 CBFS @ c08000 size 3f8000
454 03:22:47.386342 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
455 03:22:47.389998 CBFS: Locating 'fallback/ramstage'
456 03:22:47.393083
457 03:22:47.396270 CBFS: Found @ offset 43380 size 1b9e8
458 03:22:47.403239 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 03:22:47.435116 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 03:22:47.438251 Processing 3976 relocs. Offset value of 0x98db0000
461 03:22:47.445163 Accumulated console time in postcar 52 ms
462 03:22:47.445268
463 03:22:47.445345
464 03:22:47.454571 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 03:22:47.461402 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 03:22:47.465162 WARNING: RO_VPD is uninitialized or empty.
467 03:22:47.468500 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 03:22:47.474575 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 03:22:47.474672 Normal boot.
470 03:22:47.481261 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 03:22:47.484799 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 03:22:47.487828 CBFS @ c08000 size 3f8000
473 03:22:47.494472 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 03:22:47.498231 CBFS: Locating 'cpu_microcode_blob.bin'
475 03:22:47.501083 CBFS: Found @ offset 14700 size 2ec00
476 03:22:47.504783 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 03:22:47.507747 Skip microcode update
478 03:22:47.514377 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 03:22:47.514471 CBFS @ c08000 size 3f8000
480 03:22:47.521179 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 03:22:47.524313 CBFS: Locating 'fsps.bin'
482 03:22:47.527912 CBFS: Found @ offset d1fc0 size 35000
483 03:22:47.553032 Detected 4 core, 8 thread CPU.
484 03:22:47.556417 Setting up SMI for CPU
485 03:22:47.559927 IED base = 0x9ac00000
486 03:22:47.560041 IED size = 0x00400000
487 03:22:47.563046 Will perform SMM setup.
488 03:22:47.569529 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 03:22:47.576168 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 03:22:47.579749 Processing 16 relocs. Offset value of 0x00030000
491 03:22:47.583254 Attempting to start 7 APs
492 03:22:47.586693 Waiting for 10ms after sending INIT.
493 03:22:47.603311 Waiting for 1st SIPI to complete...done.
494 03:22:47.603406 AP: slot 3 apic_id 1.
495 03:22:47.609650 Waiting for 2nd SIPI to complete...done.
496 03:22:47.609747 AP: slot 1 apic_id 2.
497 03:22:47.612570 AP: slot 4 apic_id 3.
498 03:22:47.616185 AP: slot 5 apic_id 4.
499 03:22:47.616270 AP: slot 2 apic_id 5.
500 03:22:47.619355 AP: slot 6 apic_id 6.
501 03:22:47.622979 AP: slot 7 apic_id 7.
502 03:22:47.629605 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 03:22:47.632550 Processing 13 relocs. Offset value of 0x00038000
504 03:22:47.636486
505 03:22:47.639449 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
506 03:22:47.646270 Installing SMM handler to 0x9a000000
507 03:22:47.652342 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
508 03:22:47.656415 Processing 658 relocs. Offset value of 0x9a010000
509 03:22:47.658884
510 03:22:47.665688 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
511 03:22:47.669382 Processing 13 relocs. Offset value of 0x9a008000
512 03:22:47.675942 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
513 03:22:47.682644 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
514 03:22:47.685784 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
515 03:22:47.688749
516 03:22:47.692510 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
517 03:22:47.699308 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
518 03:22:47.705300 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
519 03:22:47.708797 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
520 03:22:47.715780 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
521 03:22:47.718765 Clearing SMI status registers
522 03:22:47.721995 SMI_STS: PM1
523 03:22:47.722092 PM1_STS: PWRBTN
524 03:22:47.725567 TCO_STS: SECOND_TO
525 03:22:47.728819 New SMBASE 0x9a000000
526 03:22:47.732422 In relocation handler: CPU 0
527 03:22:47.735410 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
528 03:22:47.739231 Writing SMRR. base = 0x9a000006, mask=0xff000800
529 03:22:47.742391 Relocation complete.
530 03:22:47.745384 New SMBASE 0x99fff400
531 03:22:47.745481 In relocation handler: CPU 3
532 03:22:47.752293 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
533 03:22:47.755607 Writing SMRR. base = 0x9a000006, mask=0xff000800
534 03:22:47.758872 Relocation complete.
535 03:22:47.758967 New SMBASE 0x99fffc00
536 03:22:47.762478
537 03:22:47.762574 In relocation handler: CPU 1
538 03:22:47.769081 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
539 03:22:47.772248 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 03:22:47.775697 Relocation complete.
541 03:22:47.775792 New SMBASE 0x99fff000
542 03:22:47.778656 In relocation handler: CPU 4
543 03:22:47.785419 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
544 03:22:47.788983 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 03:22:47.791988 Relocation complete.
546 03:22:47.792090 New SMBASE 0x99ffe400
547 03:22:47.795722 In relocation handler: CPU 7
548 03:22:47.798746 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
549 03:22:47.801846
550 03:22:47.805600 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 03:22:47.808374 Relocation complete.
552 03:22:47.808470 New SMBASE 0x99ffe800
553 03:22:47.811829 In relocation handler: CPU 6
554 03:22:47.814953 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
555 03:22:47.821524 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 03:22:47.825231 Relocation complete.
557 03:22:47.825328 New SMBASE 0x99ffec00
558 03:22:47.828193 In relocation handler: CPU 5
559 03:22:47.831941 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
560 03:22:47.838013 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 03:22:47.841736 Relocation complete.
562 03:22:47.841832 New SMBASE 0x99fff800
563 03:22:47.844854 In relocation handler: CPU 2
564 03:22:47.848448 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
565 03:22:47.854497 Writing SMRR. base = 0x9a000006, mask=0xff000800
566 03:22:47.854593 Relocation complete.
567 03:22:47.858119
568 03:22:47.858215 Initializing CPU #0
569 03:22:47.861715 CPU: vendor Intel device 806ec
570 03:22:47.864755 CPU: family 06, model 8e, stepping 0c
571 03:22:47.867780 Clearing out pending MCEs
572 03:22:47.871576 Setting up local APIC...
573 03:22:47.871672 apic_id: 0x00 done.
574 03:22:47.874481
575 03:22:47.874578 Turbo is available but hidden
576 03:22:47.878062 Turbo is available and visible
577 03:22:47.881160 VMX status: enabled
578 03:22:47.884733 IA32_FEATURE_CONTROL status: locked
579 03:22:47.887728 Skip microcode update
580 03:22:47.887824 CPU #0 initialized
581 03:22:47.891347 Initializing CPU #3
582 03:22:47.894372 Initializing CPU #6
583 03:22:47.894468 Initializing CPU #7
584 03:22:47.898069 CPU: vendor Intel device 806ec
585 03:22:47.901115 CPU: family 06, model 8e, stepping 0c
586 03:22:47.904544 CPU: vendor Intel device 806ec
587 03:22:47.907661 CPU: family 06, model 8e, stepping 0c
588 03:22:47.911171 Clearing out pending MCEs
589 03:22:47.914367 Clearing out pending MCEs
590 03:22:47.917962 Setting up local APIC...
591 03:22:47.918059 Initializing CPU #1
592 03:22:47.920898 Initializing CPU #4
593 03:22:47.924427 CPU: vendor Intel device 806ec
594 03:22:47.927473 CPU: family 06, model 8e, stepping 0c
595 03:22:47.930947 CPU: vendor Intel device 806ec
596 03:22:47.934485 CPU: family 06, model 8e, stepping 0c
597 03:22:47.937667 Clearing out pending MCEs
598 03:22:47.940806 Clearing out pending MCEs
599 03:22:47.943982 Setting up local APIC...
600 03:22:47.944083 Initializing CPU #2
601 03:22:47.947367 Initializing CPU #5
602 03:22:47.950862 CPU: vendor Intel device 806ec
603 03:22:47.953896 CPU: family 06, model 8e, stepping 0c
604 03:22:47.957191 CPU: vendor Intel device 806ec
605 03:22:47.960768 CPU: family 06, model 8e, stepping 0c
606 03:22:47.964338 Clearing out pending MCEs
607 03:22:47.967490 Clearing out pending MCEs
608 03:22:47.967584 apic_id: 0x02 done.
609 03:22:47.970613 Setting up local APIC...
610 03:22:47.974295 CPU: vendor Intel device 806ec
611 03:22:47.977300 CPU: family 06, model 8e, stepping 0c
612 03:22:47.980373 Clearing out pending MCEs
613 03:22:47.980467 apic_id: 0x06 done.
614 03:22:47.983984 Setting up local APIC...
615 03:22:47.986966 apic_id: 0x03 done.
616 03:22:47.987065 VMX status: enabled
617 03:22:47.990595
618 03:22:47.990690 VMX status: enabled
619 03:22:47.993771 IA32_FEATURE_CONTROL status: locked
620 03:22:47.997358 IA32_FEATURE_CONTROL status: locked
621 03:22:48.000542 Skip microcode update
622 03:22:48.003650 Skip microcode update
623 03:22:48.003744 CPU #1 initialized
624 03:22:48.006947 CPU #4 initialized
625 03:22:48.007045 VMX status: enabled
626 03:22:48.010617 apic_id: 0x07 done.
627 03:22:48.013681 IA32_FEATURE_CONTROL status: locked
628 03:22:48.016696 VMX status: enabled
629 03:22:48.016791 Skip microcode update
630 03:22:48.023918 IA32_FEATURE_CONTROL status: locked
631 03:22:48.024013 CPU #6 initialized
632 03:22:48.026952 Skip microcode update
633 03:22:48.030120 Setting up local APIC...
634 03:22:48.030214 Setting up local APIC...
635 03:22:48.033743 CPU #7 initialized
636 03:22:48.036973 Setting up local APIC...
637 03:22:48.037068 apic_id: 0x01 done.
638 03:22:48.040366 apic_id: 0x04 done.
639 03:22:48.043429 apic_id: 0x05 done.
640 03:22:48.043523 VMX status: enabled
641 03:22:48.046500 VMX status: enabled
642 03:22:48.050173 IA32_FEATURE_CONTROL status: locked
643 03:22:48.053294 IA32_FEATURE_CONTROL status: locked
644 03:22:48.056974 Skip microcode update
645 03:22:48.057073 VMX status: enabled
646 03:22:48.059969 CPU #5 initialized
647 03:22:48.063046 Skip microcode update
648 03:22:48.066908 IA32_FEATURE_CONTROL status: locked
649 03:22:48.067004 CPU #2 initialized
650 03:22:48.069873 Skip microcode update
651 03:22:48.073470 CPU #3 initialized
652 03:22:48.076536 bsp_do_flight_plan done after 466 msecs.
653 03:22:48.080289 CPU: frequency set to 4200 MHz
654 03:22:48.080385 Enabling SMIs.
655 03:22:48.083176 Locking SMM.
656 03:22:48.097225 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
657 03:22:48.100222 CBFS @ c08000 size 3f8000
658 03:22:48.106804 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
659 03:22:48.106901 CBFS: Locating 'vbt.bin'
660 03:22:48.110712 CBFS: Found @ offset 5f5c0 size 499
661 03:22:48.117269 Found a VBT of 4608 bytes after decompression
662 03:22:48.299796 Display FSP Version Info HOB
663 03:22:48.302535 Reference Code - CPU = 9.0.1e.30
664 03:22:48.306143 uCode Version = 0.0.0.ca
665 03:22:48.309200 TXT ACM version = ff.ff.ff.ffff
666 03:22:48.312877 Display FSP Version Info HOB
667 03:22:48.316044 Reference Code - ME = 9.0.1e.30
668 03:22:48.318960 MEBx version = 0.0.0.0
669 03:22:48.322571 ME Firmware Version = Consumer SKU
670 03:22:48.325503 Display FSP Version Info HOB
671 03:22:48.329237 Reference Code - CML PCH = 9.0.1e.30
672 03:22:48.332131 PCH-CRID Status = Disabled
673 03:22:48.335863 PCH-CRID Original Value = ff.ff.ff.ffff
674 03:22:48.338818 PCH-CRID New Value = ff.ff.ff.ffff
675 03:22:48.342571 OPROM - RST - RAID = ff.ff.ff.ffff
676 03:22:48.345604 ChipsetInit Base Version = ff.ff.ff.ffff
677 03:22:48.349182 ChipsetInit Oem Version = ff.ff.ff.ffff
678 03:22:48.352304 Display FSP Version Info HOB
679 03:22:48.358858 Reference Code - SA - System Agent = 9.0.1e.30
680 03:22:48.362448 Reference Code - MRC = 0.7.1.6c
681 03:22:48.362543 SA - PCIe Version = 9.0.1e.30
682 03:22:48.365454 SA-CRID Status = Disabled
683 03:22:48.368521 SA-CRID Original Value = 0.0.0.c
684 03:22:48.372006 SA-CRID New Value = 0.0.0.c
685 03:22:48.375652 OPROM - VBIOS = ff.ff.ff.ffff
686 03:22:48.378750 RTC Init
687 03:22:48.381828 Set power on after power failure.
688 03:22:48.381922 Disabling Deep S3
689 03:22:48.385339 Disabling Deep S3
690 03:22:48.385433 Disabling Deep S4
691 03:22:48.388938 Disabling Deep S4
692 03:22:48.389032 Disabling Deep S5
693 03:22:48.392011 Disabling Deep S5
694 03:22:48.398591 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
695 03:22:48.398686 Enumerating buses...
696 03:22:48.405356 Show all devs... Before device enumeration.
697 03:22:48.405453 Root Device: enabled 1
698 03:22:48.408971 CPU_CLUSTER: 0: enabled 1
699 03:22:48.411955 DOMAIN: 0000: enabled 1
700 03:22:48.415635 APIC: 00: enabled 1
701 03:22:48.415730 PCI: 00:00.0: enabled 1
702 03:22:48.419105 PCI: 00:02.0: enabled 1
703 03:22:48.422208 PCI: 00:04.0: enabled 0
704 03:22:48.422308 PCI: 00:05.0: enabled 0
705 03:22:48.425242 PCI: 00:12.0: enabled 1
706 03:22:48.428848 PCI: 00:12.5: enabled 0
707 03:22:48.431769 PCI: 00:12.6: enabled 0
708 03:22:48.431863 PCI: 00:14.0: enabled 1
709 03:22:48.435296 PCI: 00:14.1: enabled 0
710 03:22:48.438526 PCI: 00:14.3: enabled 1
711 03:22:48.441577 PCI: 00:14.5: enabled 0
712 03:22:48.441671 PCI: 00:15.0: enabled 1
713 03:22:48.445083 PCI: 00:15.1: enabled 1
714 03:22:48.448667 PCI: 00:15.2: enabled 0
715 03:22:48.451766 PCI: 00:15.3: enabled 0
716 03:22:48.451861 PCI: 00:16.0: enabled 1
717 03:22:48.455419 PCI: 00:16.1: enabled 0
718 03:22:48.458512 PCI: 00:16.2: enabled 0
719 03:22:48.458607 PCI: 00:16.3: enabled 0
720 03:22:48.461764
721 03:22:48.461859 PCI: 00:16.4: enabled 0
722 03:22:48.464789 PCI: 00:16.5: enabled 0
723 03:22:48.468522 PCI: 00:17.0: enabled 1
724 03:22:48.468616 PCI: 00:19.0: enabled 1
725 03:22:48.471543 PCI: 00:19.1: enabled 0
726 03:22:48.475353 PCI: 00:19.2: enabled 0
727 03:22:48.478330 PCI: 00:1a.0: enabled 0
728 03:22:48.478428 PCI: 00:1c.0: enabled 0
729 03:22:48.481446 PCI: 00:1c.1: enabled 0
730 03:22:48.485182 PCI: 00:1c.2: enabled 0
731 03:22:48.488018 PCI: 00:1c.3: enabled 0
732 03:22:48.488122 PCI: 00:1c.4: enabled 0
733 03:22:48.491250 PCI: 00:1c.5: enabled 0
734 03:22:48.494876 PCI: 00:1c.6: enabled 0
735 03:22:48.498142 PCI: 00:1c.7: enabled 0
736 03:22:48.498236 PCI: 00:1d.0: enabled 1
737 03:22:48.501703 PCI: 00:1d.1: enabled 0
738 03:22:48.504734 PCI: 00:1d.2: enabled 0
739 03:22:48.504829 PCI: 00:1d.3: enabled 0
740 03:22:48.507805 PCI: 00:1d.4: enabled 0
741 03:22:48.511388 PCI: 00:1d.5: enabled 1
742 03:22:48.514750 PCI: 00:1e.0: enabled 1
743 03:22:48.514850 PCI: 00:1e.1: enabled 0
744 03:22:48.517859 PCI: 00:1e.2: enabled 1
745 03:22:48.521662 PCI: 00:1e.3: enabled 1
746 03:22:48.524602 PCI: 00:1f.0: enabled 1
747 03:22:48.524697 PCI: 00:1f.1: enabled 1
748 03:22:48.528302 PCI: 00:1f.2: enabled 1
749 03:22:48.531186 PCI: 00:1f.3: enabled 1
750 03:22:48.531281 PCI: 00:1f.4: enabled 1
751 03:22:48.534999
752 03:22:48.535094 PCI: 00:1f.5: enabled 1
753 03:22:48.537955 PCI: 00:1f.6: enabled 0
754 03:22:48.541679 USB0 port 0: enabled 1
755 03:22:48.541775 I2C: 00:15: enabled 1
756 03:22:48.544593 I2C: 00:5d: enabled 1
757 03:22:48.548446 GENERIC: 0.0: enabled 1
758 03:22:48.548541 I2C: 00:1a: enabled 1
759 03:22:48.551301 I2C: 00:38: enabled 1
760 03:22:48.554345 I2C: 00:39: enabled 1
761 03:22:48.554439 I2C: 00:3a: enabled 1
762 03:22:48.558021 I2C: 00:3b: enabled 1
763 03:22:48.561221 PCI: 00:00.0: enabled 1
764 03:22:48.561326 SPI: 00: enabled 1
765 03:22:48.564245 SPI: 01: enabled 1
766 03:22:48.568207 PNP: 0c09.0: enabled 1
767 03:22:48.568301 USB2 port 0: enabled 1
768 03:22:48.570837 USB2 port 1: enabled 1
769 03:22:48.574537 USB2 port 2: enabled 0
770 03:22:48.577724 USB2 port 3: enabled 0
771 03:22:48.577819 USB2 port 5: enabled 0
772 03:22:48.580787 USB2 port 6: enabled 1
773 03:22:48.584416 USB2 port 9: enabled 1
774 03:22:48.584511 USB3 port 0: enabled 1
775 03:22:48.587506 USB3 port 1: enabled 1
776 03:22:48.591276 USB3 port 2: enabled 1
777 03:22:48.591371 USB3 port 3: enabled 1
778 03:22:48.594240
779 03:22:48.594335 USB3 port 4: enabled 0
780 03:22:48.597449 APIC: 02: enabled 1
781 03:22:48.597544 APIC: 05: enabled 1
782 03:22:48.601152 APIC: 01: enabled 1
783 03:22:48.604168 APIC: 03: enabled 1
784 03:22:48.604262 APIC: 04: enabled 1
785 03:22:48.607811 APIC: 06: enabled 1
786 03:22:48.610667 APIC: 07: enabled 1
787 03:22:48.610762 Compare with tree...
788 03:22:48.614257 Root Device: enabled 1
789 03:22:48.617335 CPU_CLUSTER: 0: enabled 1
790 03:22:48.617433 APIC: 00: enabled 1
791 03:22:48.621177 APIC: 02: enabled 1
792 03:22:48.624066 APIC: 05: enabled 1
793 03:22:48.624163 APIC: 01: enabled 1
794 03:22:48.627739 APIC: 03: enabled 1
795 03:22:48.630881 APIC: 04: enabled 1
796 03:22:48.630981 APIC: 06: enabled 1
797 03:22:48.633796 APIC: 07: enabled 1
798 03:22:48.637518 DOMAIN: 0000: enabled 1
799 03:22:48.640493 PCI: 00:00.0: enabled 1
800 03:22:48.640589 PCI: 00:02.0: enabled 1
801 03:22:48.644330 PCI: 00:04.0: enabled 0
802 03:22:48.647185 PCI: 00:05.0: enabled 0
803 03:22:48.650312 PCI: 00:12.0: enabled 1
804 03:22:48.654003 PCI: 00:12.5: enabled 0
805 03:22:48.654098 PCI: 00:12.6: enabled 0
806 03:22:48.656895 PCI: 00:14.0: enabled 1
807 03:22:48.660568 USB0 port 0: enabled 1
808 03:22:48.663738 USB2 port 0: enabled 1
809 03:22:48.667422 USB2 port 1: enabled 1
810 03:22:48.667518 USB2 port 2: enabled 0
811 03:22:48.670459 USB2 port 3: enabled 0
812 03:22:48.673484 USB2 port 5: enabled 0
813 03:22:48.677146 USB2 port 6: enabled 1
814 03:22:48.680133 USB2 port 9: enabled 1
815 03:22:48.683362 USB3 port 0: enabled 1
816 03:22:48.683461 USB3 port 1: enabled 1
817 03:22:48.686977 USB3 port 2: enabled 1
818 03:22:48.690688 USB3 port 3: enabled 1
819 03:22:48.693868 USB3 port 4: enabled 0
820 03:22:48.696834 PCI: 00:14.1: enabled 0
821 03:22:48.696941 PCI: 00:14.3: enabled 1
822 03:22:48.700502 PCI: 00:14.5: enabled 0
823 03:22:48.703328 PCI: 00:15.0: enabled 1
824 03:22:48.706925 I2C: 00:15: enabled 1
825 03:22:48.710662 PCI: 00:15.1: enabled 1
826 03:22:48.710762 I2C: 00:5d: enabled 1
827 03:22:48.713582 GENERIC: 0.0: enabled 1
828 03:22:48.716508 PCI: 00:15.2: enabled 0
829 03:22:48.720165 PCI: 00:15.3: enabled 0
830 03:22:48.723290 PCI: 00:16.0: enabled 1
831 03:22:48.723386 PCI: 00:16.1: enabled 0
832 03:22:48.726901 PCI: 00:16.2: enabled 0
833 03:22:48.729993 PCI: 00:16.3: enabled 0
834 03:22:48.733557 PCI: 00:16.4: enabled 0
835 03:22:48.733652 PCI: 00:16.5: enabled 0
836 03:22:48.736683
837 03:22:48.736779 PCI: 00:17.0: enabled 1
838 03:22:48.740264 PCI: 00:19.0: enabled 1
839 03:22:48.743476 I2C: 00:1a: enabled 1
840 03:22:48.746605 I2C: 00:38: enabled 1
841 03:22:48.746700 I2C: 00:39: enabled 1
842 03:22:48.750150 I2C: 00:3a: enabled 1
843 03:22:48.753439 I2C: 00:3b: enabled 1
844 03:22:48.756444 PCI: 00:19.1: enabled 0
845 03:22:48.756539 PCI: 00:19.2: enabled 0
846 03:22:48.760099 PCI: 00:1a.0: enabled 0
847 03:22:48.763662 PCI: 00:1c.0: enabled 0
848 03:22:48.766947 PCI: 00:1c.1: enabled 0
849 03:22:48.770005 PCI: 00:1c.2: enabled 0
850 03:22:48.770100 PCI: 00:1c.3: enabled 0
851 03:22:48.773573 PCI: 00:1c.4: enabled 0
852 03:22:48.776855 PCI: 00:1c.5: enabled 0
853 03:22:48.779982 PCI: 00:1c.6: enabled 0
854 03:22:48.783260 PCI: 00:1c.7: enabled 0
855 03:22:48.783359 PCI: 00:1d.0: enabled 1
856 03:22:48.786566 PCI: 00:1d.1: enabled 0
857 03:22:48.789818 PCI: 00:1d.2: enabled 0
858 03:22:48.793325 PCI: 00:1d.3: enabled 0
859 03:22:48.796382 PCI: 00:1d.4: enabled 0
860 03:22:48.796470 PCI: 00:1d.5: enabled 1
861 03:22:48.799638 PCI: 00:00.0: enabled 1
862 03:22:48.803104 PCI: 00:1e.0: enabled 1
863 03:22:48.806743 PCI: 00:1e.1: enabled 0
864 03:22:48.809766 PCI: 00:1e.2: enabled 1
865 03:22:48.809861 SPI: 00: enabled 1
866 03:22:48.813382 PCI: 00:1e.3: enabled 1
867 03:22:48.816492 SPI: 01: enabled 1
868 03:22:48.816594 PCI: 00:1f.0: enabled 1
869 03:22:48.819419
870 03:22:48.819501 PNP: 0c09.0: enabled 1
871 03:22:48.823211 PCI: 00:1f.1: enabled 1
872 03:22:48.826386 PCI: 00:1f.2: enabled 1
873 03:22:48.829394 PCI: 00:1f.3: enabled 1
874 03:22:48.829495 PCI: 00:1f.4: enabled 1
875 03:22:48.832921 PCI: 00:1f.5: enabled 1
876 03:22:48.836450 PCI: 00:1f.6: enabled 0
877 03:22:48.840012 Root Device scanning...
878 03:22:48.842913 scan_static_bus for Root Device
879 03:22:48.845963 CPU_CLUSTER: 0 enabled
880 03:22:48.846059 DOMAIN: 0000 enabled
881 03:22:48.849578 DOMAIN: 0000 scanning...
882 03:22:48.852533 PCI: pci_scan_bus for bus 00
883 03:22:48.855913 PCI: 00:00.0 [8086/0000] ops
884 03:22:48.859564 PCI: 00:00.0 [8086/9b61] enabled
885 03:22:48.862879 PCI: 00:02.0 [8086/0000] bus ops
886 03:22:48.865930 PCI: 00:02.0 [8086/9b41] enabled
887 03:22:48.869111 PCI: 00:04.0 [8086/1903] disabled
888 03:22:48.872817 PCI: 00:08.0 [8086/1911] enabled
889 03:22:48.876350 PCI: 00:12.0 [8086/02f9] enabled
890 03:22:48.879400 PCI: 00:14.0 [8086/0000] bus ops
891 03:22:48.883059 PCI: 00:14.0 [8086/02ed] enabled
892 03:22:48.885938 PCI: 00:14.2 [8086/02ef] enabled
893 03:22:48.889661 PCI: 00:14.3 [8086/02f0] enabled
894 03:22:48.892727 PCI: 00:15.0 [8086/0000] bus ops
895 03:22:48.896253 PCI: 00:15.0 [8086/02e8] enabled
896 03:22:48.899577 PCI: 00:15.1 [8086/0000] bus ops
897 03:22:48.902557 PCI: 00:15.1 [8086/02e9] enabled
898 03:22:48.906097 PCI: 00:16.0 [8086/0000] ops
899 03:22:48.909035 PCI: 00:16.0 [8086/02e0] enabled
900 03:22:48.912766 PCI: 00:17.0 [8086/0000] ops
901 03:22:48.915598 PCI: 00:17.0 [8086/02d3] enabled
902 03:22:48.919396 PCI: 00:19.0 [8086/0000] bus ops
903 03:22:48.922344 PCI: 00:19.0 [8086/02c5] enabled
904 03:22:48.926114 PCI: 00:1d.0 [8086/0000] bus ops
905 03:22:48.929209 PCI: 00:1d.0 [8086/02b0] enabled
906 03:22:48.932180 PCI: Static device PCI: 00:1d.5 not found, disabling it.
907 03:22:48.935783 PCI: 00:1e.0 [8086/0000] ops
908 03:22:48.938764 PCI: 00:1e.0 [8086/02a8] enabled
909 03:22:48.942344 PCI: 00:1e.2 [8086/0000] bus ops
910 03:22:48.945662 PCI: 00:1e.2 [8086/02aa] enabled
911 03:22:48.949246 PCI: 00:1e.3 [8086/0000] bus ops
912 03:22:48.952273 PCI: 00:1e.3 [8086/02ab] enabled
913 03:22:48.955793 PCI: 00:1f.0 [8086/0000] bus ops
914 03:22:48.958912 PCI: 00:1f.0 [8086/0284] enabled
915 03:22:48.965554 PCI: Static device PCI: 00:1f.1 not found, disabling it.
916 03:22:48.972417 PCI: Static device PCI: 00:1f.2 not found, disabling it.
917 03:22:48.975691 PCI: 00:1f.3 [8086/0000] bus ops
918 03:22:48.979374 PCI: 00:1f.3 [8086/02c8] enabled
919 03:22:48.982101 PCI: 00:1f.4 [8086/0000] bus ops
920 03:22:48.985723 PCI: 00:1f.4 [8086/02a3] enabled
921 03:22:48.988639 PCI: 00:1f.5 [8086/0000] bus ops
922 03:22:48.992276 PCI: 00:1f.5 [8086/02a4] enabled
923 03:22:48.995364 PCI: Leftover static devices:
924 03:22:48.995460 PCI: 00:05.0
925 03:22:48.995535 PCI: 00:12.5
926 03:22:48.998834 PCI: 00:12.6
927 03:22:48.998929 PCI: 00:14.1
928 03:22:49.001834 PCI: 00:14.5
929 03:22:49.001929 PCI: 00:15.2
930 03:22:49.005132 PCI: 00:15.3
931 03:22:49.005226 PCI: 00:16.1
932 03:22:49.005301 PCI: 00:16.2
933 03:22:49.008658 PCI: 00:16.3
934 03:22:49.008753 PCI: 00:16.4
935 03:22:49.011957 PCI: 00:16.5
936 03:22:49.012060 PCI: 00:19.1
937 03:22:49.012138 PCI: 00:19.2
938 03:22:49.015408 PCI: 00:1a.0
939 03:22:49.015504 PCI: 00:1c.0
940 03:22:49.018376 PCI: 00:1c.1
941 03:22:49.018472 PCI: 00:1c.2
942 03:22:49.018546 PCI: 00:1c.3
943 03:22:49.021962 PCI: 00:1c.4
944 03:22:49.022057 PCI: 00:1c.5
945 03:22:49.025522 PCI: 00:1c.6
946 03:22:49.025616 PCI: 00:1c.7
947 03:22:49.028617 PCI: 00:1d.1
948 03:22:49.028711 PCI: 00:1d.2
949 03:22:49.028809 PCI: 00:1d.3
950 03:22:49.031865 PCI: 00:1d.4
951 03:22:49.031960 PCI: 00:1d.5
952 03:22:49.035731 PCI: 00:1e.1
953 03:22:49.035826 PCI: 00:1f.1
954 03:22:49.035901 PCI: 00:1f.2
955 03:22:49.038380 PCI: 00:1f.6
956 03:22:49.041949 PCI: Check your devicetree.cb.
957 03:22:49.045023 PCI: 00:02.0 scanning...
958 03:22:49.048742 scan_generic_bus for PCI: 00:02.0
959 03:22:49.051838 scan_generic_bus for PCI: 00:02.0 done
960 03:22:49.058500 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
961 03:22:49.058599 PCI: 00:14.0 scanning...
962 03:22:49.061525 scan_static_bus for PCI: 00:14.0
963 03:22:49.064819 USB0 port 0 enabled
964 03:22:49.068707 USB0 port 0 scanning...
965 03:22:49.071667 scan_static_bus for USB0 port 0
966 03:22:49.071762 USB2 port 0 enabled
967 03:22:49.074731 USB2 port 1 enabled
968 03:22:49.078127 USB2 port 2 disabled
969 03:22:49.078225 USB2 port 3 disabled
970 03:22:49.081714 USB2 port 5 disabled
971 03:22:49.084699 USB2 port 6 enabled
972 03:22:49.084794 USB2 port 9 enabled
973 03:22:49.088248 USB3 port 0 enabled
974 03:22:49.088343 USB3 port 1 enabled
975 03:22:49.091430 USB3 port 2 enabled
976 03:22:49.094696 USB3 port 3 enabled
977 03:22:49.094792 USB3 port 4 disabled
978 03:22:49.098412 USB2 port 0 scanning...
979 03:22:49.101648 scan_static_bus for USB2 port 0
980 03:22:49.104906 scan_static_bus for USB2 port 0 done
981 03:22:49.111537 scan_bus: scanning of bus USB2 port 0 took 9707 usecs
982 03:22:49.114435 USB2 port 1 scanning...
983 03:22:49.118099 scan_static_bus for USB2 port 1
984 03:22:49.121158 scan_static_bus for USB2 port 1 done
985 03:22:49.124149 scan_bus: scanning of bus USB2 port 1 took 9710 usecs
986 03:22:49.127920 USB2 port 6 scanning...
987 03:22:49.130917 scan_static_bus for USB2 port 6
988 03:22:49.134491 scan_static_bus for USB2 port 6 done
989 03:22:49.141057 scan_bus: scanning of bus USB2 port 6 took 9707 usecs
990 03:22:49.144630 USB2 port 9 scanning...
991 03:22:49.147588 scan_static_bus for USB2 port 9
992 03:22:49.150805 scan_static_bus for USB2 port 9 done
993 03:22:49.154514 scan_bus: scanning of bus USB2 port 9 took 9700 usecs
994 03:22:49.158156 USB3 port 0 scanning...
995 03:22:49.161226 scan_static_bus for USB3 port 0
996 03:22:49.164478 scan_static_bus for USB3 port 0 done
997 03:22:49.170669 scan_bus: scanning of bus USB3 port 0 took 9697 usecs
998 03:22:49.174482 USB3 port 1 scanning...
999 03:22:49.177574 scan_static_bus for USB3 port 1
1000 03:22:49.181133 scan_static_bus for USB3 port 1 done
1001 03:22:49.184168 scan_bus: scanning of bus USB3 port 1 took 9703 usecs
1002 03:22:49.187856
1003 03:22:49.187955 USB3 port 2 scanning...
1004 03:22:49.190680 scan_static_bus for USB3 port 2
1005 03:22:49.194002 scan_static_bus for USB3 port 2 done
1006 03:22:49.200915 scan_bus: scanning of bus USB3 port 2 took 9688 usecs
1007 03:22:49.203938 USB3 port 3 scanning...
1008 03:22:49.207580 scan_static_bus for USB3 port 3
1009 03:22:49.210605 scan_static_bus for USB3 port 3 done
1010 03:22:49.217556 scan_bus: scanning of bus USB3 port 3 took 9708 usecs
1011 03:22:49.221116 scan_static_bus for USB0 port 0 done
1012 03:22:49.223932 scan_bus: scanning of bus USB0 port 0 took 155379 usecs
1013 03:22:49.227158 scan_static_bus for PCI: 00:14.0 done
1014 03:22:49.233592 scan_bus: scanning of bus PCI: 00:14.0 took 173001 usecs
1015 03:22:49.237493 PCI: 00:15.0 scanning...
1016 03:22:49.240511 scan_generic_bus for PCI: 00:15.0
1017 03:22:49.244013 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 03:22:49.247029 scan_generic_bus for PCI: 00:15.0 done
1019 03:22:49.253676 scan_bus: scanning of bus PCI: 00:15.0 took 14299 usecs
1020 03:22:49.257426 PCI: 00:15.1 scanning...
1021 03:22:49.260385 scan_generic_bus for PCI: 00:15.1
1022 03:22:49.263626 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 03:22:49.270267 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 03:22:49.273665 scan_generic_bus for PCI: 00:15.1 done
1025 03:22:49.276859 scan_bus: scanning of bus PCI: 00:15.1 took 18599 usecs
1026 03:22:49.280540 PCI: 00:19.0 scanning...
1027 03:22:49.283708 scan_generic_bus for PCI: 00:19.0
1028 03:22:49.290274 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 03:22:49.293851 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 03:22:49.296762 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 03:22:49.299876 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 03:22:49.303559 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 03:22:49.310302 scan_generic_bus for PCI: 00:19.0 done
1034 03:22:49.313272 scan_bus: scanning of bus PCI: 00:19.0 took 30753 usecs
1035 03:22:49.316874 PCI: 00:1d.0 scanning...
1036 03:22:49.319988 do_pci_scan_bridge for PCI: 00:1d.0
1037 03:22:49.323085 PCI: pci_scan_bus for bus 01
1038 03:22:49.326825 PCI: 01:00.0 [1c5c/1327] enabled
1039 03:22:49.329810 Enabling Common Clock Configuration
1040 03:22:49.336504 L1 Sub-State supported from root port 29
1041 03:22:49.336611 L1 Sub-State Support = 0xf
1042 03:22:49.339651 CommonModeRestoreTime = 0x28
1043 03:22:49.346839 Power On Value = 0x16, Power On Scale = 0x0
1044 03:22:49.346954 ASPM: Enabled L1
1045 03:22:49.352832 scan_bus: scanning of bus PCI: 00:1d.0 took 32791 usecs
1046 03:22:49.356758 PCI: 00:1e.2 scanning...
1047 03:22:49.359747 scan_generic_bus for PCI: 00:1e.2
1048 03:22:49.362759 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 03:22:49.366559 scan_generic_bus for PCI: 00:1e.2 done
1050 03:22:49.372587 scan_bus: scanning of bus PCI: 00:1e.2 took 14008 usecs
1051 03:22:49.372681 PCI: 00:1e.3 scanning...
1052 03:22:49.376235
1053 03:22:49.379437 scan_generic_bus for PCI: 00:1e.3
1054 03:22:49.382971 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1055 03:22:49.386166 scan_generic_bus for PCI: 00:1e.3 done
1056 03:22:49.392599 scan_bus: scanning of bus PCI: 00:1e.3 took 13992 usecs
1057 03:22:49.392695 PCI: 00:1f.0 scanning...
1058 03:22:49.396261 scan_static_bus for PCI: 00:1f.0
1059 03:22:49.399423 PNP: 0c09.0 enabled
1060 03:22:49.402470 scan_static_bus for PCI: 00:1f.0 done
1061 03:22:49.409346 scan_bus: scanning of bus PCI: 00:1f.0 took 12051 usecs
1062 03:22:49.412442 PCI: 00:1f.3 scanning...
1063 03:22:49.416149 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1064 03:22:49.419224 PCI: 00:1f.4 scanning...
1065 03:22:49.422671 scan_generic_bus for PCI: 00:1f.4
1066 03:22:49.425937 scan_generic_bus for PCI: 00:1f.4 done
1067 03:22:49.432539 scan_bus: scanning of bus PCI: 00:1f.4 took 10197 usecs
1068 03:22:49.435647 PCI: 00:1f.5 scanning...
1069 03:22:49.439116 scan_generic_bus for PCI: 00:1f.5
1070 03:22:49.442207 scan_generic_bus for PCI: 00:1f.5 done
1071 03:22:49.449014 scan_bus: scanning of bus PCI: 00:1f.5 took 10195 usecs
1072 03:22:49.455560 scan_bus: scanning of bus DOMAIN: 0000 took 605151 usecs
1073 03:22:49.459364 scan_static_bus for Root Device done
1074 03:22:49.462719 scan_bus: scanning of bus Root Device took 625024 usecs
1075 03:22:49.465671 done
1076 03:22:49.469355 Chrome EC: UHEPI supported
1077 03:22:49.472313 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1078 03:22:49.479321 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1079 03:22:49.485526 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1080 03:22:49.492289 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1081 03:22:49.495349 SPI flash protection: WPSW=0 SRP0=0
1082 03:22:49.501945 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1083 03:22:49.505666 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1084 03:22:49.508626 found VGA at PCI: 00:02.0
1085 03:22:49.511846 Setting up VGA for PCI: 00:02.0
1086 03:22:49.518700 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1087 03:22:49.522331 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1088 03:22:49.525261 Allocating resources...
1089 03:22:49.528471 Reading resources...
1090 03:22:49.532000 Root Device read_resources bus 0 link: 0
1091 03:22:49.535014 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1092 03:22:49.541651 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1093 03:22:49.545147 DOMAIN: 0000 read_resources bus 0 link: 0
1094 03:22:49.552327 PCI: 00:14.0 read_resources bus 0 link: 0
1095 03:22:49.555260 USB0 port 0 read_resources bus 0 link: 0
1096 03:22:49.563487 USB0 port 0 read_resources bus 0 link: 0 done
1097 03:22:49.567250 PCI: 00:14.0 read_resources bus 0 link: 0 done
1098 03:22:49.574704 PCI: 00:15.0 read_resources bus 1 link: 0
1099 03:22:49.577736 PCI: 00:15.0 read_resources bus 1 link: 0 done
1100 03:22:49.584027 PCI: 00:15.1 read_resources bus 2 link: 0
1101 03:22:49.587766 PCI: 00:15.1 read_resources bus 2 link: 0 done
1102 03:22:49.594972 PCI: 00:19.0 read_resources bus 3 link: 0
1103 03:22:49.601927 PCI: 00:19.0 read_resources bus 3 link: 0 done
1104 03:22:49.604694 PCI: 00:1d.0 read_resources bus 1 link: 0
1105 03:22:49.611557 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1106 03:22:49.614608 PCI: 00:1e.2 read_resources bus 4 link: 0
1107 03:22:49.621413 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1108 03:22:49.624610 PCI: 00:1e.3 read_resources bus 5 link: 0
1109 03:22:49.631417 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1110 03:22:49.634709 PCI: 00:1f.0 read_resources bus 0 link: 0
1111 03:22:49.641511 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1112 03:22:49.648076 DOMAIN: 0000 read_resources bus 0 link: 0 done
1113 03:22:49.651315 Root Device read_resources bus 0 link: 0 done
1114 03:22:49.654405 Done reading resources.
1115 03:22:49.661308 Show resources in subtree (Root Device)...After reading.
1116 03:22:49.664479 Root Device child on link 0 CPU_CLUSTER: 0
1117 03:22:49.668126 CPU_CLUSTER: 0 child on link 0 APIC: 00
1118 03:22:49.668223 APIC: 00
1119 03:22:49.671284
1120 03:22:49.671371 APIC: 02
1121 03:22:49.671459 APIC: 05
1122 03:22:49.674300 APIC: 01
1123 03:22:49.674396 APIC: 03
1124 03:22:49.674467 APIC: 04
1125 03:22:49.678064 APIC: 06
1126 03:22:49.678157 APIC: 07
1127 03:22:49.681292 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1128 03:22:49.684368
1129 03:22:49.691168 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 03:22:49.747080 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1131 03:22:49.747229 PCI: 00:00.0
1132 03:22:49.747523 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 03:22:49.748186 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 03:22:49.748465 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 03:22:49.748729 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 03:22:49.797286 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 03:22:49.797601 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 03:22:49.797875 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 03:22:49.797962 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 03:22:49.798766 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 03:22:49.799627 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1142 03:22:49.836890 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1143 03:22:49.837225 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1144 03:22:49.837519 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1145 03:22:49.837602 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1146 03:22:49.844319 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1147 03:22:49.853892 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1148 03:22:49.853993 PCI: 00:02.0
1149 03:22:49.864667 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1150 03:22:49.873719 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1151 03:22:49.877191
1152 03:22:49.883951 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1153 03:22:49.887013 PCI: 00:04.0
1154 03:22:49.887110 PCI: 00:08.0
1155 03:22:49.896951 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 03:22:49.900443 PCI: 00:12.0
1157 03:22:49.910049 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 03:22:49.913808 PCI: 00:14.0 child on link 0 USB0 port 0
1159 03:22:49.923364 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1160 03:22:49.926671 USB0 port 0 child on link 0 USB2 port 0
1161 03:22:49.930273 USB2 port 0
1162 03:22:49.930369 USB2 port 1
1163 03:22:49.933272 USB2 port 2
1164 03:22:49.933368 USB2 port 3
1165 03:22:49.936348 USB2 port 5
1166 03:22:49.936444 USB2 port 6
1167 03:22:49.940246 USB2 port 9
1168 03:22:49.940342 USB3 port 0
1169 03:22:49.943334 USB3 port 1
1170 03:22:49.946940 USB3 port 2
1171 03:22:49.947037 USB3 port 3
1172 03:22:49.949994 USB3 port 4
1173 03:22:49.950090 PCI: 00:14.2
1174 03:22:49.959749 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1175 03:22:49.970006 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1176 03:22:49.973026 PCI: 00:14.3
1177 03:22:49.983451 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1178 03:22:49.986551 PCI: 00:15.0 child on link 0 I2C: 01:15
1179 03:22:49.996387 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 03:22:49.996484 I2C: 01:15
1181 03:22:50.003181 PCI: 00:15.1 child on link 0 I2C: 02:5d
1182 03:22:50.012795 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 03:22:50.012894 I2C: 02:5d
1184 03:22:50.015966 GENERIC: 0.0
1185 03:22:50.016070 PCI: 00:16.0
1186 03:22:50.026513 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 03:22:50.029275 PCI: 00:17.0
1188 03:22:50.035811 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1189 03:22:50.045968 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1190 03:22:50.055576 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1191 03:22:50.062294 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1192 03:22:50.072340 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1193 03:22:50.078915 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1194 03:22:50.086032 PCI: 00:19.0 child on link 0 I2C: 03:1a
1195 03:22:50.095678 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 03:22:50.095775 I2C: 03:1a
1197 03:22:50.098641 I2C: 03:38
1198 03:22:50.098736 I2C: 03:39
1199 03:22:50.102279 I2C: 03:3a
1200 03:22:50.102385 I2C: 03:3b
1201 03:22:50.105476 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1202 03:22:50.115156 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 03:22:50.125379 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 03:22:50.135181 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 03:22:50.135285 PCI: 01:00.0
1206 03:22:50.145312 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1207 03:22:50.148383 PCI: 00:1e.0
1208 03:22:50.158211 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1209 03:22:50.168057 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1210 03:22:50.171941 PCI: 00:1e.2 child on link 0 SPI: 00
1211 03:22:50.181663 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 03:22:50.184864 SPI: 00
1213 03:22:50.187833 PCI: 00:1e.3 child on link 0 SPI: 01
1214 03:22:50.198159 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 03:22:50.198253 SPI: 01
1216 03:22:50.204367 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1217 03:22:50.210969 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1218 03:22:50.220977 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1219 03:22:50.221075 PNP: 0c09.0
1220 03:22:50.230791 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1221 03:22:50.234622 PCI: 00:1f.3
1222 03:22:50.244238 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1223 03:22:50.254194 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1224 03:22:50.254293 PCI: 00:1f.4
1225 03:22:50.264131 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1226 03:22:50.274160 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1227 03:22:50.274257 PCI: 00:1f.5
1228 03:22:50.284151 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1229 03:22:50.290820 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1230 03:22:50.297824 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1231 03:22:50.303700 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1232 03:22:50.307586 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1233 03:22:50.310456 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1234 03:22:50.314128 PCI: 00:17.0 18 * [0x60 - 0x67] io
1235 03:22:50.316974 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1236 03:22:50.323675 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1237 03:22:50.330391 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1238 03:22:50.339978 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1239 03:22:50.347439 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1240 03:22:50.353719 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1241 03:22:50.360181 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1242 03:22:50.367203 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1243 03:22:50.370021 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1244 03:22:50.376895 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1245 03:22:50.380432 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1246 03:22:50.386950 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1247 03:22:50.389883 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1248 03:22:50.396873 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1249 03:22:50.399982 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1250 03:22:50.406147 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1251 03:22:50.409700 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1252 03:22:50.416306 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1253 03:22:50.419481 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1254 03:22:50.423051 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1255 03:22:50.426264
1256 03:22:50.430023 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1257 03:22:50.433227 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1258 03:22:50.439472 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1259 03:22:50.443214 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1260 03:22:50.449712 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1261 03:22:50.453452 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1262 03:22:50.459826 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1263 03:22:50.462882 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1264 03:22:50.469455 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1265 03:22:50.473053 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1266 03:22:50.479560 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1267 03:22:50.486412 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1268 03:22:50.489428 avoid_fixed_resources: DOMAIN: 0000
1269 03:22:50.496030 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1270 03:22:50.503089 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1271 03:22:50.509166 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1272 03:22:50.519227 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1273 03:22:50.526039 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1274 03:22:50.532765 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1275 03:22:50.542540 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1276 03:22:50.548989 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1277 03:22:50.555651 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1278 03:22:50.562589 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1279 03:22:50.572039 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1280 03:22:50.579102 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1281 03:22:50.579549 Setting resources...
1282 03:22:50.585737 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1283 03:22:50.589477 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1284 03:22:50.592625
1285 03:22:50.596203 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1286 03:22:50.599123 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1287 03:22:50.602447 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1288 03:22:50.609110 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1289 03:22:50.615683 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1290 03:22:50.622132 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1291 03:22:50.628910 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1292 03:22:50.635865 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1293 03:22:50.638992 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1294 03:22:50.645401 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1295 03:22:50.648972 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1296 03:22:50.655747 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1297 03:22:50.658678 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1298 03:22:50.662143 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1299 03:22:50.665313
1300 03:22:50.668894 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1301 03:22:50.671833 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1302 03:22:50.678502 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1303 03:22:50.682101 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1304 03:22:50.688586 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1305 03:22:50.692212 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1306 03:22:50.698267 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1307 03:22:50.702128 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1308 03:22:50.708689 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1309 03:22:50.711724 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1310 03:22:50.718772 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1311 03:22:50.721409 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1312 03:22:50.728288 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1313 03:22:50.731271 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1314 03:22:50.734958 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1315 03:22:50.738005
1316 03:22:50.741288 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1317 03:22:50.747930 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1318 03:22:50.754751 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1319 03:22:50.764667 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1320 03:22:50.771386 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1321 03:22:50.774277 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1322 03:22:50.784467 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1323 03:22:50.787519 Root Device assign_resources, bus 0 link: 0
1324 03:22:50.791251 DOMAIN: 0000 assign_resources, bus 0 link: 0
1325 03:22:50.801727 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1326 03:22:50.807899 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1327 03:22:50.818262 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1328 03:22:50.824967 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1329 03:22:50.834630 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1330 03:22:50.841360 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1331 03:22:50.847923 PCI: 00:14.0 assign_resources, bus 0 link: 0
1332 03:22:50.851505 PCI: 00:14.0 assign_resources, bus 0 link: 0
1333 03:22:50.861179 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1334 03:22:50.867106 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1335 03:22:50.873806 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1336 03:22:50.884011 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1337 03:22:50.887698 PCI: 00:15.0 assign_resources, bus 1 link: 0
1338 03:22:50.893992 PCI: 00:15.0 assign_resources, bus 1 link: 0
1339 03:22:50.900637 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1340 03:22:50.907678 PCI: 00:15.1 assign_resources, bus 2 link: 0
1341 03:22:50.910709 PCI: 00:15.1 assign_resources, bus 2 link: 0
1342 03:22:50.917331 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1343 03:22:50.920481
1344 03:22:50.927171 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1345 03:22:50.933611 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1346 03:22:50.944145 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1347 03:22:50.950262 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1348 03:22:50.957136 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1349 03:22:50.966597 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1350 03:22:50.973507 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1351 03:22:50.976525 PCI: 00:19.0 assign_resources, bus 3 link: 0
1352 03:22:50.983782 PCI: 00:19.0 assign_resources, bus 3 link: 0
1353 03:22:50.990478 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1354 03:22:51.000270 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1355 03:22:51.010327 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1356 03:22:51.013412 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 03:22:51.023264 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1358 03:22:51.026255 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1359 03:22:51.036473 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1360 03:22:51.043293 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1361 03:22:51.046452 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1362 03:22:51.053053 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1363 03:22:51.059553 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1364 03:22:51.066343 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1365 03:22:51.069380 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1366 03:22:51.076264 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1367 03:22:51.079341 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1368 03:22:51.086297 LPC: Trying to open IO window from 800 size 1ff
1369 03:22:51.092865 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1370 03:22:51.102687 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1371 03:22:51.109625 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1372 03:22:51.119121 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1373 03:22:51.122447 DOMAIN: 0000 assign_resources, bus 0 link: 0
1374 03:22:51.125429 Root Device assign_resources, bus 0 link: 0
1375 03:22:51.128459 Done setting resources.
1376 03:22:51.135292 Show resources in subtree (Root Device)...After assigning values.
1377 03:22:51.139139 Root Device child on link 0 CPU_CLUSTER: 0
1378 03:22:51.145317 CPU_CLUSTER: 0 child on link 0 APIC: 00
1379 03:22:51.145412 APIC: 00
1380 03:22:51.145488 APIC: 02
1381 03:22:51.148352
1382 03:22:51.148448 APIC: 05
1383 03:22:51.148523 APIC: 01
1384 03:22:51.151963 APIC: 03
1385 03:22:51.152044 APIC: 04
1386 03:22:51.152123 APIC: 06
1387 03:22:51.155106 APIC: 07
1388 03:22:51.158835 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1389 03:22:51.168038 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1390 03:22:51.178536 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1391 03:22:51.181523 PCI: 00:00.0
1392 03:22:51.191710 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1393 03:22:51.201727 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1394 03:22:51.207742 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1395 03:22:51.211348
1396 03:22:51.218221 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1397 03:22:51.228269 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1398 03:22:51.237824 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1399 03:22:51.247627 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1400 03:22:51.257382 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1401 03:22:51.264493 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1402 03:22:51.274159 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1403 03:22:51.283780 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1404 03:22:51.293715 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1405 03:22:51.303990 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1406 03:22:51.313788 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1407 03:22:51.323758 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1408 03:22:51.330334 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1409 03:22:51.333581 PCI: 00:02.0
1410 03:22:51.343425 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1411 03:22:51.353722 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1412 03:22:51.363472 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1413 03:22:51.366549 PCI: 00:04.0
1414 03:22:51.366646 PCI: 00:08.0
1415 03:22:51.376734 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1416 03:22:51.379763 PCI: 00:12.0
1417 03:22:51.390024 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1418 03:22:51.392958 PCI: 00:14.0 child on link 0 USB0 port 0
1419 03:22:51.402930 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1420 03:22:51.409794 USB0 port 0 child on link 0 USB2 port 0
1421 03:22:51.409894 USB2 port 0
1422 03:22:51.412805 USB2 port 1
1423 03:22:51.412900 USB2 port 2
1424 03:22:51.416643 USB2 port 3
1425 03:22:51.416744 USB2 port 5
1426 03:22:51.419854 USB2 port 6
1427 03:22:51.419948 USB2 port 9
1428 03:22:51.422938 USB3 port 0
1429 03:22:51.423032 USB3 port 1
1430 03:22:51.426578 USB3 port 2
1431 03:22:51.426671 USB3 port 3
1432 03:22:51.429629 USB3 port 4
1433 03:22:51.429723 PCI: 00:14.2
1434 03:22:51.442598 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1435 03:22:51.452850 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1436 03:22:51.452951 PCI: 00:14.3
1437 03:22:51.462616 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1438 03:22:51.469512 PCI: 00:15.0 child on link 0 I2C: 01:15
1439 03:22:51.479002 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1440 03:22:51.479100 I2C: 01:15
1441 03:22:51.482358 PCI: 00:15.1 child on link 0 I2C: 02:5d
1442 03:22:51.495716 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1443 03:22:51.495825 I2C: 02:5d
1444 03:22:51.498707 GENERIC: 0.0
1445 03:22:51.498800 PCI: 00:16.0
1446 03:22:51.508590 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1447 03:22:51.512252 PCI: 00:17.0
1448 03:22:51.522155 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1449 03:22:51.532342 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1450 03:22:51.542020 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1451 03:22:51.548559 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1452 03:22:51.558731 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1453 03:22:51.568311 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1454 03:22:51.571653 PCI: 00:19.0 child on link 0 I2C: 03:1a
1455 03:22:51.574893
1456 03:22:51.584621 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1457 03:22:51.584723 I2C: 03:1a
1458 03:22:51.587944 I2C: 03:38
1459 03:22:51.588041 I2C: 03:39
1460 03:22:51.591393 I2C: 03:3a
1461 03:22:51.591490 I2C: 03:3b
1462 03:22:51.594498 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1463 03:22:51.604679 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1464 03:22:51.614368 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1465 03:22:51.624880 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1466 03:22:51.627699 PCI: 01:00.0
1467 03:22:51.637561 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1468 03:22:51.641120 PCI: 00:1e.0
1469 03:22:51.650631 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1470 03:22:51.660553 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1471 03:22:51.664143 PCI: 00:1e.2 child on link 0 SPI: 00
1472 03:22:51.673826 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1473 03:22:51.676929 SPI: 00
1474 03:22:51.680521 PCI: 00:1e.3 child on link 0 SPI: 01
1475 03:22:51.690340 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1476 03:22:51.690439 SPI: 01
1477 03:22:51.693448
1478 03:22:51.697000 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1479 03:22:51.703567 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1480 03:22:51.713319 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1481 03:22:51.716958 PNP: 0c09.0
1482 03:22:51.723101 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1483 03:22:51.726821 PCI: 00:1f.3
1484 03:22:51.736383 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1485 03:22:51.746750 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1486 03:22:51.750067 PCI: 00:1f.4
1487 03:22:51.756572 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1488 03:22:51.766314 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1489 03:22:51.769391 PCI: 00:1f.5
1490 03:22:51.779587 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1491 03:22:51.782747 Done allocating resources.
1492 03:22:51.789468 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1493 03:22:51.789566 Enabling resources...
1494 03:22:51.796835 PCI: 00:00.0 subsystem <- 8086/9b61
1495 03:22:51.796933 PCI: 00:00.0 cmd <- 06
1496 03:22:51.799890 PCI: 00:02.0 subsystem <- 8086/9b41
1497 03:22:51.803588 PCI: 00:02.0 cmd <- 03
1498 03:22:51.806532 PCI: 00:08.0 cmd <- 06
1499 03:22:51.809921 PCI: 00:12.0 subsystem <- 8086/02f9
1500 03:22:51.813348 PCI: 00:12.0 cmd <- 02
1501 03:22:51.816477 PCI: 00:14.0 subsystem <- 8086/02ed
1502 03:22:51.820020 PCI: 00:14.0 cmd <- 02
1503 03:22:51.820126 PCI: 00:14.2 cmd <- 02
1504 03:22:51.823350
1505 03:22:51.826343 PCI: 00:14.3 subsystem <- 8086/02f0
1506 03:22:51.826439 PCI: 00:14.3 cmd <- 02
1507 03:22:51.833201 PCI: 00:15.0 subsystem <- 8086/02e8
1508 03:22:51.833301 PCI: 00:15.0 cmd <- 02
1509 03:22:51.836253 PCI: 00:15.1 subsystem <- 8086/02e9
1510 03:22:51.839966 PCI: 00:15.1 cmd <- 02
1511 03:22:51.843143 PCI: 00:16.0 subsystem <- 8086/02e0
1512 03:22:51.846836 PCI: 00:16.0 cmd <- 02
1513 03:22:51.849924 PCI: 00:17.0 subsystem <- 8086/02d3
1514 03:22:51.853005 PCI: 00:17.0 cmd <- 03
1515 03:22:51.856227 PCI: 00:19.0 subsystem <- 8086/02c5
1516 03:22:51.859613 PCI: 00:19.0 cmd <- 02
1517 03:22:51.862751 PCI: 00:1d.0 bridge ctrl <- 0013
1518 03:22:51.866124 PCI: 00:1d.0 subsystem <- 8086/02b0
1519 03:22:51.869641 PCI: 00:1d.0 cmd <- 06
1520 03:22:51.872781 PCI: 00:1e.0 subsystem <- 8086/02a8
1521 03:22:51.876505 PCI: 00:1e.0 cmd <- 06
1522 03:22:51.879608 PCI: 00:1e.2 subsystem <- 8086/02aa
1523 03:22:51.882406 PCI: 00:1e.2 cmd <- 06
1524 03:22:51.886376 PCI: 00:1e.3 subsystem <- 8086/02ab
1525 03:22:51.886465 PCI: 00:1e.3 cmd <- 02
1526 03:22:51.892938 PCI: 00:1f.0 subsystem <- 8086/0284
1527 03:22:51.893094 PCI: 00:1f.0 cmd <- 407
1528 03:22:51.895907 PCI: 00:1f.3 subsystem <- 8086/02c8
1529 03:22:51.899550 PCI: 00:1f.3 cmd <- 02
1530 03:22:51.902587 PCI: 00:1f.4 subsystem <- 8086/02a3
1531 03:22:51.906220 PCI: 00:1f.4 cmd <- 03
1532 03:22:51.909156 PCI: 00:1f.5 subsystem <- 8086/02a4
1533 03:22:51.912905 PCI: 00:1f.5 cmd <- 406
1534 03:22:51.922104 PCI: 01:00.0 cmd <- 02
1535 03:22:51.926620 done.
1536 03:22:51.938640 ME: Version: 14.0.39.1367
1537 03:22:51.945336 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1538 03:22:51.948409 Initializing devices...
1539 03:22:51.948508 Root Device init ...
1540 03:22:51.955118 Chrome EC: Set SMI mask to 0x0000000000000000
1541 03:22:51.958405 Chrome EC: clear events_b mask to 0x0000000000000000
1542 03:22:51.965630 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1543 03:22:51.971653 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1544 03:22:51.978508 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1545 03:22:51.982074 Chrome EC: Set WAKE mask to 0x0000000000000000
1546 03:22:51.984986 Root Device init finished in 35168 usecs
1547 03:22:51.988617 CPU_CLUSTER: 0 init ...
1548 03:22:51.991657 CPU_CLUSTER: 0 init finished in 2447 usecs
1549 03:22:51.995246
1550 03:22:51.999687 PCI: 00:00.0 init ...
1551 03:22:52.002690 CPU TDP: 15 Watts
1552 03:22:52.006399 CPU PL2 = 64 Watts
1553 03:22:52.009276 PCI: 00:00.0 init finished in 7079 usecs
1554 03:22:52.012421 PCI: 00:02.0 init ...
1555 03:22:52.016223 PCI: 00:02.0 init finished in 2253 usecs
1556 03:22:52.019346 PCI: 00:08.0 init ...
1557 03:22:52.022874 PCI: 00:08.0 init finished in 2251 usecs
1558 03:22:52.026068 PCI: 00:12.0 init ...
1559 03:22:52.029132 PCI: 00:12.0 init finished in 2252 usecs
1560 03:22:52.032771 PCI: 00:14.0 init ...
1561 03:22:52.035844 PCI: 00:14.0 init finished in 2243 usecs
1562 03:22:52.038847 PCI: 00:14.2 init ...
1563 03:22:52.042659 PCI: 00:14.2 init finished in 2251 usecs
1564 03:22:52.045423 PCI: 00:14.3 init ...
1565 03:22:52.048817 PCI: 00:14.3 init finished in 2273 usecs
1566 03:22:52.052156 PCI: 00:15.0 init ...
1567 03:22:52.055892 DW I2C bus 0 at 0xd121f000 (400 KHz)
1568 03:22:52.058818 PCI: 00:15.0 init finished in 5967 usecs
1569 03:22:52.062565 PCI: 00:15.1 init ...
1570 03:22:52.065393 DW I2C bus 1 at 0xd1220000 (400 KHz)
1571 03:22:52.069242 PCI: 00:15.1 init finished in 5975 usecs
1572 03:22:52.072236
1573 03:22:52.072330 PCI: 00:16.0 init ...
1574 03:22:52.078392 PCI: 00:16.0 init finished in 2250 usecs
1575 03:22:52.078487 PCI: 00:19.0 init ...
1576 03:22:52.082174
1577 03:22:52.085301 DW I2C bus 4 at 0xd1222000 (400 KHz)
1578 03:22:52.088894 PCI: 00:19.0 init finished in 5974 usecs
1579 03:22:52.091930 PCI: 00:1d.0 init ...
1580 03:22:52.095550 Initializing PCH PCIe bridge.
1581 03:22:52.098624 PCI: 00:1d.0 init finished in 5282 usecs
1582 03:22:52.102209 PCI: 00:1f.0 init ...
1583 03:22:52.105228 IOAPIC: Initializing IOAPIC at 0xfec00000
1584 03:22:52.111572 IOAPIC: Bootstrap Processor Local APIC = 0x00
1585 03:22:52.111705 IOAPIC: ID = 0x02
1586 03:22:52.115126 IOAPIC: Dumping registers
1587 03:22:52.118225 reg 0x0000: 0x02000000
1588 03:22:52.121818 reg 0x0001: 0x00770020
1589 03:22:52.121912 reg 0x0002: 0x00000000
1590 03:22:52.128010 PCI: 00:1f.0 init finished in 23544 usecs
1591 03:22:52.131741 PCI: 00:1f.4 init ...
1592 03:22:52.134927 PCI: 00:1f.4 init finished in 2261 usecs
1593 03:22:52.145504 PCI: 01:00.0 init ...
1594 03:22:52.148552 PCI: 01:00.0 init finished in 2251 usecs
1595 03:22:52.153335 PNP: 0c09.0 init ...
1596 03:22:52.156440 Google Chrome EC uptime: 11.071 seconds
1597 03:22:52.159397
1598 03:22:52.163297 Google Chrome AP resets since EC boot: 0
1599 03:22:52.166125 Google Chrome most recent AP reset causes:
1600 03:22:52.172984 Google Chrome EC reset flags at last EC boot: reset-pin
1601 03:22:52.175866 PNP: 0c09.0 init finished in 20559 usecs
1602 03:22:52.179523 Devices initialized
1603 03:22:52.182500 Show all devs... After init.
1604 03:22:52.182595 Root Device: enabled 1
1605 03:22:52.186205 CPU_CLUSTER: 0: enabled 1
1606 03:22:52.189252 DOMAIN: 0000: enabled 1
1607 03:22:52.189347 APIC: 00: enabled 1
1608 03:22:52.192380 PCI: 00:00.0: enabled 1
1609 03:22:52.196003 PCI: 00:02.0: enabled 1
1610 03:22:52.199348 PCI: 00:04.0: enabled 0
1611 03:22:52.199444 PCI: 00:05.0: enabled 0
1612 03:22:52.202282 PCI: 00:12.0: enabled 1
1613 03:22:52.205865 PCI: 00:12.5: enabled 0
1614 03:22:52.208888 PCI: 00:12.6: enabled 0
1615 03:22:52.208983 PCI: 00:14.0: enabled 1
1616 03:22:52.212486 PCI: 00:14.1: enabled 0
1617 03:22:52.215613 PCI: 00:14.3: enabled 1
1618 03:22:52.215712 PCI: 00:14.5: enabled 0
1619 03:22:52.218745 PCI: 00:15.0: enabled 1
1620 03:22:52.222413 PCI: 00:15.1: enabled 1
1621 03:22:52.225414 PCI: 00:15.2: enabled 0
1622 03:22:52.225512 PCI: 00:15.3: enabled 0
1623 03:22:52.229128 PCI: 00:16.0: enabled 1
1624 03:22:52.232236 PCI: 00:16.1: enabled 0
1625 03:22:52.236023 PCI: 00:16.2: enabled 0
1626 03:22:52.236126 PCI: 00:16.3: enabled 0
1627 03:22:52.239143 PCI: 00:16.4: enabled 0
1628 03:22:52.242049 PCI: 00:16.5: enabled 0
1629 03:22:52.245872 PCI: 00:17.0: enabled 1
1630 03:22:52.245972 PCI: 00:19.0: enabled 1
1631 03:22:52.249017 PCI: 00:19.1: enabled 0
1632 03:22:52.252426 PCI: 00:19.2: enabled 0
1633 03:22:52.252524 PCI: 00:1a.0: enabled 0
1634 03:22:52.255474
1635 03:22:52.255569 PCI: 00:1c.0: enabled 0
1636 03:22:52.258575 PCI: 00:1c.1: enabled 0
1637 03:22:52.262175 PCI: 00:1c.2: enabled 0
1638 03:22:52.262270 PCI: 00:1c.3: enabled 0
1639 03:22:52.265163 PCI: 00:1c.4: enabled 0
1640 03:22:52.268754 PCI: 00:1c.5: enabled 0
1641 03:22:52.272042 PCI: 00:1c.6: enabled 0
1642 03:22:52.272145 PCI: 00:1c.7: enabled 0
1643 03:22:52.275152 PCI: 00:1d.0: enabled 1
1644 03:22:52.278743 PCI: 00:1d.1: enabled 0
1645 03:22:52.281771 PCI: 00:1d.2: enabled 0
1646 03:22:52.281866 PCI: 00:1d.3: enabled 0
1647 03:22:52.285237 PCI: 00:1d.4: enabled 0
1648 03:22:52.288613 PCI: 00:1d.5: enabled 0
1649 03:22:52.291718 PCI: 00:1e.0: enabled 1
1650 03:22:52.291813 PCI: 00:1e.1: enabled 0
1651 03:22:52.295302 PCI: 00:1e.2: enabled 1
1652 03:22:52.298235 PCI: 00:1e.3: enabled 1
1653 03:22:52.298331 PCI: 00:1f.0: enabled 1
1654 03:22:52.301992 PCI: 00:1f.1: enabled 0
1655 03:22:52.304853 PCI: 00:1f.2: enabled 0
1656 03:22:52.308477 PCI: 00:1f.3: enabled 1
1657 03:22:52.308572 PCI: 00:1f.4: enabled 1
1658 03:22:52.311426 PCI: 00:1f.5: enabled 1
1659 03:22:52.315122 PCI: 00:1f.6: enabled 0
1660 03:22:52.318307 USB0 port 0: enabled 1
1661 03:22:52.318402 I2C: 01:15: enabled 1
1662 03:22:52.322005 I2C: 02:5d: enabled 1
1663 03:22:52.325050 GENERIC: 0.0: enabled 1
1664 03:22:52.325145 I2C: 03:1a: enabled 1
1665 03:22:52.328019 I2C: 03:38: enabled 1
1666 03:22:52.331605 I2C: 03:39: enabled 1
1667 03:22:52.331699 I2C: 03:3a: enabled 1
1668 03:22:52.334677 I2C: 03:3b: enabled 1
1669 03:22:52.338348 PCI: 00:00.0: enabled 1
1670 03:22:52.338443 SPI: 00: enabled 1
1671 03:22:52.341331 SPI: 01: enabled 1
1672 03:22:52.345068 PNP: 0c09.0: enabled 1
1673 03:22:52.345163 USB2 port 0: enabled 1
1674 03:22:52.348104 USB2 port 1: enabled 1
1675 03:22:52.351805 USB2 port 2: enabled 0
1676 03:22:52.351900 USB2 port 3: enabled 0
1677 03:22:52.354751 USB2 port 5: enabled 0
1678 03:22:52.358248 USB2 port 6: enabled 1
1679 03:22:52.361151 USB2 port 9: enabled 1
1680 03:22:52.361246 USB3 port 0: enabled 1
1681 03:22:52.364904 USB3 port 1: enabled 1
1682 03:22:52.368002 USB3 port 2: enabled 1
1683 03:22:52.368103 USB3 port 3: enabled 1
1684 03:22:52.371056 USB3 port 4: enabled 0
1685 03:22:52.374679 APIC: 02: enabled 1
1686 03:22:52.374774 APIC: 05: enabled 1
1687 03:22:52.377688 APIC: 01: enabled 1
1688 03:22:52.381505 APIC: 03: enabled 1
1689 03:22:52.381600 APIC: 04: enabled 1
1690 03:22:52.384532 APIC: 06: enabled 1
1691 03:22:52.384627 APIC: 07: enabled 1
1692 03:22:52.387562 PCI: 00:08.0: enabled 1
1693 03:22:52.390969 PCI: 00:14.2: enabled 1
1694 03:22:52.394154 PCI: 01:00.0: enabled 1
1695 03:22:52.397808 Disabling ACPI via APMC:
1696 03:22:52.397904 done.
1697 03:22:52.404495 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1698 03:22:52.408076 ELOG: NV offset 0xaf0000 size 0x4000
1699 03:22:52.414099 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1700 03:22:52.421596 ELOG: Event(17) added with size 13 at 2023-01-19 03:22:51 UTC
1701 03:22:52.427654 ELOG: Event(92) added with size 9 at 2023-01-19 03:22:51 UTC
1702 03:22:52.434273 ELOG: Event(93) added with size 9 at 2023-01-19 03:22:51 UTC
1703 03:22:52.441134 ELOG: Event(9A) added with size 9 at 2023-01-19 03:22:51 UTC
1704 03:22:52.447226 ELOG: Event(9E) added with size 10 at 2023-01-19 03:22:51 UTC
1705 03:22:52.454055 ELOG: Event(9F) added with size 14 at 2023-01-19 03:22:51 UTC
1706 03:22:52.457237 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1707 03:22:52.464717 ELOG: Event(A1) added with size 10 at 2023-01-19 03:22:51 UTC
1708 03:22:52.474647 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1709 03:22:52.481369 ELOG: Event(A0) added with size 9 at 2023-01-19 03:22:51 UTC
1710 03:22:52.484897 elog_add_boot_reason: Logged dev mode boot
1711 03:22:52.484993 Finalize devices...
1712 03:22:52.487999
1713 03:22:52.488102 PCI: 00:17.0 final
1714 03:22:52.491674 Devices finalized
1715 03:22:52.494674 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1716 03:22:52.501391 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1717 03:22:52.504354 ME: HFSTS1 : 0x90000245
1718 03:22:52.508003 ME: HFSTS2 : 0x3B850126
1719 03:22:52.514537 ME: HFSTS3 : 0x00000020
1720 03:22:52.517630 ME: HFSTS4 : 0x00004800
1721 03:22:52.521163 ME: HFSTS5 : 0x00000000
1722 03:22:52.524287 ME: HFSTS6 : 0x40400006
1723 03:22:52.527983 ME: Manufacturing Mode : NO
1724 03:22:52.531079 ME: FW Partition Table : OK
1725 03:22:52.534105 ME: Bringup Loader Failure : NO
1726 03:22:52.537290 ME: Firmware Init Complete : YES
1727 03:22:52.541022 ME: Boot Options Present : NO
1728 03:22:52.544008 ME: Update In Progress : NO
1729 03:22:52.547732 ME: D0i3 Support : YES
1730 03:22:52.550776 ME: Low Power State Enabled : NO
1731 03:22:52.554365 ME: CPU Replaced : NO
1732 03:22:52.557298 ME: CPU Replacement Valid : YES
1733 03:22:52.560803 ME: Current Working State : 5
1734 03:22:52.563808 ME: Current Operation State : 1
1735 03:22:52.567532 ME: Current Operation Mode : 0
1736 03:22:52.570565 ME: Error Code : 0
1737 03:22:52.573963 ME: CPU Debug Disabled : YES
1738 03:22:52.577287 ME: TXT Support : NO
1739 03:22:52.583840 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1740 03:22:52.590557 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1741 03:22:52.590653 CBFS @ c08000 size 3f8000
1742 03:22:52.597253 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1743 03:22:52.600350 CBFS: Locating 'fallback/dsdt.aml'
1744 03:22:52.603458 CBFS: Found @ offset 10bb80 size 3fa5
1745 03:22:52.610159 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1746 03:22:52.613396 CBFS @ c08000 size 3f8000
1747 03:22:52.616615 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1748 03:22:52.619842 CBFS: Locating 'fallback/slic'
1749 03:22:52.625282 CBFS: 'fallback/slic' not found.
1750 03:22:52.632093 ACPI: Writing ACPI tables at 99b3e000.
1751 03:22:52.632186 ACPI: * FACS
1752 03:22:52.635094 ACPI: * DSDT
1753 03:22:52.638339 Ramoops buffer: 0x100000@0x99a3d000.
1754 03:22:52.641890 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1755 03:22:52.648628 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1756 03:22:52.651614 Google Chrome EC: version:
1757 03:22:52.655221 ro: helios_v2.0.2659-56403530b
1758 03:22:52.658337 rw: helios_v2.0.2849-c41de27e7d
1759 03:22:52.658426 running image: 1
1760 03:22:52.662546 ACPI: * FADT
1761 03:22:52.662635 SCI is IRQ9
1762 03:22:52.666123 ACPI: added table 1/32, length now 40
1763 03:22:52.669193
1764 03:22:52.669290 ACPI: * SSDT
1765 03:22:52.672231 Found 1 CPU(s) with 8 core(s) each.
1766 03:22:52.675902 Error: Could not locate 'wifi_sar' in VPD.
1767 03:22:52.682735 Checking CBFS for default SAR values
1768 03:22:52.685812 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1769 03:22:52.688845 CBFS @ c08000 size 3f8000
1770 03:22:52.695577 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1771 03:22:52.698941 CBFS: Locating 'wifi_sar_defaults.hex'
1772 03:22:52.701966 CBFS: Found @ offset 5fac0 size 77
1773 03:22:52.705519 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1774 03:22:52.711591 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1775 03:22:52.715303 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1776 03:22:52.721958 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1777 03:22:52.725067 failed to find key in VPD: dsm_calib_r0_0
1778 03:22:52.735337 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1779 03:22:52.738552 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1780 03:22:52.744737 failed to find key in VPD: dsm_calib_r0_1
1781 03:22:52.751558 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1782 03:22:52.758383 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1783 03:22:52.761465 failed to find key in VPD: dsm_calib_r0_2
1784 03:22:52.771662 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1785 03:22:52.774908 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1786 03:22:52.781339 failed to find key in VPD: dsm_calib_r0_3
1787 03:22:52.788224 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1788 03:22:52.794677 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1789 03:22:52.797808 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1790 03:22:52.804485 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1791 03:22:52.808070 EC returned error result code 1
1792 03:22:52.811822 EC returned error result code 1
1793 03:22:52.814948 EC returned error result code 1
1794 03:22:52.818573 PS2K: Bad resp from EC. Vivaldi disabled!
1795 03:22:52.824637 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1796 03:22:52.831252 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1797 03:22:52.834948 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1798 03:22:52.841168 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1799 03:22:52.844695 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1800 03:22:52.851388 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1801 03:22:52.858156 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1802 03:22:52.864319 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1803 03:22:52.867904 ACPI: added table 2/32, length now 44
1804 03:22:52.868001 ACPI: * MCFG
1805 03:22:52.874452 ACPI: added table 3/32, length now 48
1806 03:22:52.874549 ACPI: * TPM2
1807 03:22:52.877552 TPM2 log created at 99a2d000
1808 03:22:52.881153 ACPI: added table 4/32, length now 52
1809 03:22:52.884262 ACPI: * MADT
1810 03:22:52.884358 SCI is IRQ9
1811 03:22:52.887885 ACPI: added table 5/32, length now 56
1812 03:22:52.890776 current = 99b43ac0
1813 03:22:52.890873 ACPI: * DMAR
1814 03:22:52.894518 ACPI: added table 6/32, length now 60
1815 03:22:52.897773 ACPI: * IGD OpRegion
1816 03:22:52.900601 GMA: Found VBT in CBFS
1817 03:22:52.904035 GMA: Found valid VBT in CBFS
1818 03:22:52.907913 ACPI: added table 7/32, length now 64
1819 03:22:52.908026 ACPI: * HPET
1820 03:22:52.910801 ACPI: added table 8/32, length now 68
1821 03:22:52.913793
1822 03:22:52.913891 ACPI: done.
1823 03:22:52.917361 ACPI tables: 31744 bytes.
1824 03:22:52.920477 smbios_write_tables: 99a2c000
1825 03:22:52.924065 EC returned error result code 3
1826 03:22:52.927123 Couldn't obtain OEM name from CBI
1827 03:22:52.931001 Create SMBIOS type 17
1828 03:22:52.933755 PCI: 00:00.0 (Intel Cannonlake)
1829 03:22:52.933851 PCI: 00:14.3 (Intel WiFi)
1830 03:22:52.937545 SMBIOS tables: 939 bytes.
1831 03:22:52.940746 Writing table forward entry at 0x00000500
1832 03:22:52.947248 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1833 03:22:52.950503 Writing coreboot table at 0x99b62000
1834 03:22:52.956924 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1835 03:22:52.963482 1. 0000000000001000-000000000009ffff: RAM
1836 03:22:52.966526 2. 00000000000a0000-00000000000fffff: RESERVED
1837 03:22:52.970340 3. 0000000000100000-0000000099a2bfff: RAM
1838 03:22:52.976790 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1839 03:22:52.983350 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1840 03:22:52.986385 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1841 03:22:52.993232 7. 000000009a000000-000000009f7fffff: RESERVED
1842 03:22:52.996306 8. 00000000e0000000-00000000efffffff: RESERVED
1843 03:22:53.003007 9. 00000000fc000000-00000000fc000fff: RESERVED
1844 03:22:53.006637 10. 00000000fe000000-00000000fe00ffff: RESERVED
1845 03:22:53.012673 11. 00000000fed10000-00000000fed17fff: RESERVED
1846 03:22:53.016385 12. 00000000fed80000-00000000fed83fff: RESERVED
1847 03:22:53.019311 13. 00000000fed90000-00000000fed91fff: RESERVED
1848 03:22:53.026495 14. 00000000feda0000-00000000feda1fff: RESERVED
1849 03:22:53.029457 15. 0000000100000000-000000045e7fffff: RAM
1850 03:22:53.032842 Graphics framebuffer located at 0xc0000000
1851 03:22:53.036001 Passing 5 GPIOs to payload:
1852 03:22:53.042790 NAME | PORT | POLARITY | VALUE
1853 03:22:53.045869 write protect | undefined | high | low
1854 03:22:53.049492
1855 03:22:53.052657 lid | undefined | high | high
1856 03:22:53.059299 power | undefined | high | low
1857 03:22:53.062324 oprom | undefined | high | low
1858 03:22:53.068987 EC in RW | 0x000000cb | high | low
1859 03:22:53.069082 Board ID: 4
1860 03:22:53.075539 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1861 03:22:53.079225 CBFS @ c08000 size 3f8000
1862 03:22:53.082297 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1863 03:22:53.089073 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1864 03:22:53.092246 coreboot table: 1492 bytes.
1865 03:22:53.095939 IMD ROOT 0. 99fff000 00001000
1866 03:22:53.098760 IMD SMALL 1. 99ffe000 00001000
1867 03:22:53.102627 FSP MEMORY 2. 99c4e000 003b0000
1868 03:22:53.105458 CONSOLE 3. 99c2e000 00020000
1869 03:22:53.109032 FMAP 4. 99c2d000 0000054e
1870 03:22:53.111955 TIME STAMP 5. 99c2c000 00000910
1871 03:22:53.115747 VBOOT WORK 6. 99c18000 00014000
1872 03:22:53.118817 MRC DATA 7. 99c16000 00001958
1873 03:22:53.121817 ROMSTG STCK 8. 99c15000 00001000
1874 03:22:53.125406 AFTER CAR 9. 99c0b000 0000a000
1875 03:22:53.129029 RAMSTAGE 10. 99baf000 0005c000
1876 03:22:53.132044 REFCODE 11. 99b7a000 00035000
1877 03:22:53.135185 SMM BACKUP 12. 99b6a000 00010000
1878 03:22:53.139029 COREBOOT 13. 99b62000 00008000
1879 03:22:53.141929 ACPI 14. 99b3e000 00024000
1880 03:22:53.145672 ACPI GNVS 15. 99b3d000 00001000
1881 03:22:53.148519 RAMOOPS 16. 99a3d000 00100000
1882 03:22:53.151851 TPM2 TCGLOG17. 99a2d000 00010000
1883 03:22:53.155419 SMBIOS 18. 99a2c000 00000800
1884 03:22:53.158667 IMD small region:
1885 03:22:53.161753 IMD ROOT 0. 99ffec00 00000400
1886 03:22:53.165397 FSP RUNTIME 1. 99ffebe0 00000004
1887 03:22:53.168295 EC HOSTEVENT 2. 99ffebc0 00000008
1888 03:22:53.171964 POWER STATE 3. 99ffeb80 00000040
1889 03:22:53.175031 ROMSTAGE 4. 99ffeb60 00000004
1890 03:22:53.178140 MEM INFO 5. 99ffe9a0 000001b9
1891 03:22:53.181758 VPD 6. 99ffe920 0000006c
1892 03:22:53.184789 MTRR: Physical address space:
1893 03:22:53.191618 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1894 03:22:53.198205 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1895 03:22:53.205042 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1896 03:22:53.211683 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1897 03:22:53.214679 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1898 03:22:53.223172 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1899 03:22:53.227796 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1900 03:22:53.231142 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 03:22:53.237751 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 03:22:53.241181 MTRR: Fixed MSR 0x259 0x0000000000000000
1903 03:22:53.244182 MTRR: Fixed MSR 0x268 0x0606060606060606
1904 03:22:53.247770 MTRR: Fixed MSR 0x269 0x0606060606060606
1905 03:22:53.254452 MTRR: Fixed MSR 0x26a 0x0606060606060606
1906 03:22:53.257995 MTRR: Fixed MSR 0x26b 0x0606060606060606
1907 03:22:53.261093 MTRR: Fixed MSR 0x26c 0x0606060606060606
1908 03:22:53.264097 MTRR: Fixed MSR 0x26d 0x0606060606060606
1909 03:22:53.270823 MTRR: Fixed MSR 0x26e 0x0606060606060606
1910 03:22:53.274380 MTRR: Fixed MSR 0x26f 0x0606060606060606
1911 03:22:53.277300 call enable_fixed_mtrr()
1912 03:22:53.280892 CPU physical address size: 39 bits
1913 03:22:53.283983 MTRR: default type WB/UC MTRR counts: 6/8.
1914 03:22:53.287573 MTRR: WB selected as default type.
1915 03:22:53.294205 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1916 03:22:53.300993 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1917 03:22:53.307438 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1918 03:22:53.313810 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1919 03:22:53.320718 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1920 03:22:53.326836 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1921 03:22:53.330516 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 03:22:53.333429 MTRR: Fixed MSR 0x258 0x0606060606060606
1923 03:22:53.340356 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 03:22:53.343286 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 03:22:53.346993 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 03:22:53.349915 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 03:22:53.356794 MTRR: Fixed MSR 0x26b 0x0606060606060606
1928 03:22:53.360297 MTRR: Fixed MSR 0x26c 0x0606060606060606
1929 03:22:53.363078 MTRR: Fixed MSR 0x26d 0x0606060606060606
1930 03:22:53.366746 MTRR: Fixed MSR 0x26e 0x0606060606060606
1931 03:22:53.369791 MTRR: Fixed MSR 0x26f 0x0606060606060606
1932 03:22:53.376454 MTRR: Fixed MSR 0x250 0x0606060606060606
1933 03:22:53.379977 call enable_fixed_mtrr()
1934 03:22:53.383117 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 03:22:53.386755 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 03:22:53.389609 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 03:22:53.396259 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 03:22:53.399334 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 03:22:53.402966 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 03:22:53.406564 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 03:22:53.409817 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 03:22:53.413136
1943 03:22:53.416035 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 03:22:53.419605 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 03:22:53.422666 CPU physical address size: 39 bits
1946 03:22:53.425743 call enable_fixed_mtrr()
1947 03:22:53.429265 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 03:22:53.433003 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 03:22:53.435837
1950 03:22:53.439384 MTRR: Fixed MSR 0x259 0x0000000000000000
1951 03:22:53.442361 MTRR: Fixed MSR 0x268 0x0606060606060606
1952 03:22:53.446095 MTRR: Fixed MSR 0x269 0x0606060606060606
1953 03:22:53.449008 MTRR: Fixed MSR 0x26a 0x0606060606060606
1954 03:22:53.455634 MTRR: Fixed MSR 0x26b 0x0606060606060606
1955 03:22:53.458853 MTRR: Fixed MSR 0x26c 0x0606060606060606
1956 03:22:53.462498 MTRR: Fixed MSR 0x26d 0x0606060606060606
1957 03:22:53.465319 MTRR: Fixed MSR 0x26e 0x0606060606060606
1958 03:22:53.471982 MTRR: Fixed MSR 0x26f 0x0606060606060606
1959 03:22:53.475587 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 03:22:53.478599 call enable_fixed_mtrr()
1961 03:22:53.481773 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 03:22:53.485466 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 03:22:53.489321 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 03:22:53.495347 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 03:22:53.498432 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 03:22:53.501937 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 03:22:53.504917 MTRR: Fixed MSR 0x26c 0x0606060606060606
1968 03:22:53.511715 MTRR: Fixed MSR 0x26d 0x0606060606060606
1969 03:22:53.515171 MTRR: Fixed MSR 0x26e 0x0606060606060606
1970 03:22:53.518245 MTRR: Fixed MSR 0x26f 0x0606060606060606
1971 03:22:53.521714 CPU physical address size: 39 bits
1972 03:22:53.525266 call enable_fixed_mtrr()
1973 03:22:53.528346 MTRR: Fixed MSR 0x250 0x0606060606060606
1974 03:22:53.535126 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 03:22:53.538101 MTRR: Fixed MSR 0x259 0x0000000000000000
1976 03:22:53.541546 MTRR: Fixed MSR 0x268 0x0606060606060606
1977 03:22:53.544981 MTRR: Fixed MSR 0x269 0x0606060606060606
1978 03:22:53.547982 MTRR: Fixed MSR 0x26a 0x0606060606060606
1979 03:22:53.551254
1980 03:22:53.554783 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 03:22:53.558244 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 03:22:53.561385 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 03:22:53.565025 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 03:22:53.571582 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 03:22:53.574667 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 03:22:53.577776 call enable_fixed_mtrr()
1987 03:22:53.581255 MTRR: Fixed MSR 0x258 0x0606060606060606
1988 03:22:53.584751 MTRR: Fixed MSR 0x259 0x0000000000000000
1989 03:22:53.587775 MTRR: Fixed MSR 0x268 0x0606060606060606
1990 03:22:53.591492
1991 03:22:53.594321 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 03:22:53.598024 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 03:22:53.600966 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 03:22:53.604861 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 03:22:53.611105 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 03:22:53.614119 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 03:22:53.617741 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 03:22:53.620704 CPU physical address size: 39 bits
1999 03:22:53.624219 call enable_fixed_mtrr()
2000 03:22:53.627245 CPU physical address size: 39 bits
2001 03:22:53.627331
2002 03:22:53.630895 MTRR check
2003 03:22:53.633902 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 03:22:53.637589 Fixed MTRRs : Enabled
2005 03:22:53.637676 Variable MTRRs: Enabled
2006 03:22:53.637759
2007 03:22:53.644218 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 03:22:53.647127 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 03:22:53.650626 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 03:22:53.653734 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 03:22:53.660225 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 03:22:53.663477 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 03:22:53.667139 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 03:22:53.670120 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 03:22:53.676995 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 03:22:53.680673 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 03:22:53.686626 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
2018 03:22:53.686718 call enable_fixed_mtrr()
2019 03:22:53.690267 CPU physical address size: 39 bits
2020 03:22:53.693167 CPU physical address size: 39 bits
2021 03:22:53.699822 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
2022 03:22:53.703392 CPU physical address size: 39 bits
2023 03:22:53.706389 CBFS @ c08000 size 3f8000
2024 03:22:53.712894 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2025 03:22:53.716469 CBFS: Locating 'fallback/payload'
2026 03:22:53.719445 CBFS: Found @ offset 1c96c0 size 3f798
2027 03:22:53.726224 Checking segment from ROM address 0xffdd16f8
2028 03:22:53.729805 Checking segment from ROM address 0xffdd1714
2029 03:22:53.732866 Loading segment from ROM address 0xffdd16f8
2030 03:22:53.736363 code (compression=0)
2031 03:22:53.746227 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2032 03:22:53.752568 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2033 03:22:53.756173 it's not compressed!
2034 03:22:53.847519 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2035 03:22:53.854193 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2036 03:22:53.857236 Loading segment from ROM address 0xffdd1714
2037 03:22:53.860968 Entry Point 0x30000000
2038 03:22:53.863793 Loaded segments
2039 03:22:53.869835 Finalizing chipset.
2040 03:22:53.872934 Finalizing SMM.
2041 03:22:53.876486 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2042 03:22:53.879567 mp_park_aps done after 0 msecs.
2043 03:22:53.885934 Jumping to boot code at 30000000(99b62000)
2044 03:22:53.892900 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2045 03:22:53.892998
2046 03:22:53.893074
2047 03:22:53.893144
2048 03:22:53.895998 Starting depthcharge on Helios...
2049 03:22:53.896109
2050 03:22:53.896467 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2051 03:22:53.896580 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2052 03:22:53.896676 Setting prompt string to ['hatch:']
2053 03:22:53.896783 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2054 03:22:53.906246 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2055 03:22:53.906342
2056 03:22:53.912086 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2057 03:22:53.912190
2058 03:22:53.918790 board_setup: Info: eMMC controller not present; skipping
2059 03:22:53.918928
2060 03:22:53.922569 New NVMe Controller 0x30053ac0 @ 00:1d:00
2061 03:22:53.922677
2062 03:22:53.928657 board_setup: Info: SDHCI controller not present; skipping
2063 03:22:53.928779
2064 03:22:53.935350 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2065 03:22:53.935464
2066 03:22:53.935538 Wipe memory regions:
2067 03:22:53.935617
2068 03:22:53.938605 [0x00000000001000, 0x000000000a0000)
2069 03:22:53.938700
2070 03:22:53.945610 [0x00000000100000, 0x00000030000000)
2071 03:22:53.945717
2072 03:22:54.011896 [0x00000030657430, 0x00000099a2c000)
2073 03:22:54.012054
2074 03:22:54.161904 [0x00000100000000, 0x0000045e800000)
2075 03:22:54.162101
2076 03:22:55.617872 R8152: Initializing
2077 03:22:55.618038
2078 03:22:55.621628 Version 9 (ocp_data = 6010)
2079 03:22:55.621726
2080 03:22:55.625565 R8152: Done initializing
2081 03:22:55.625660
2082 03:22:55.629185 Adding net device
2083 03:22:55.629280
2084 03:22:56.112004 R8152: Initializing
2085 03:22:56.112171
2086 03:22:56.114797 Version 6 (ocp_data = 5c30)
2087 03:22:56.114881
2088 03:22:56.118338 R8152: Done initializing
2089 03:22:56.118419
2090 03:22:56.121326 net_add_device: Attemp to include the same device
2091 03:22:56.124968
2092 03:22:56.131754 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2093 03:22:56.131850
2094 03:22:56.131924
2095 03:22:56.131993
2096 03:22:56.132278 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2098 03:22:56.233025 hatch: tftpboot 192.168.201.1 8789760/tftp-deploy-1835veix/kernel/bzImage 8789760/tftp-deploy-1835veix/kernel/cmdline 8789760/tftp-deploy-1835veix/ramdisk/ramdisk.cpio.gz
2099 03:22:56.233204 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2100 03:22:56.233306 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2101 03:22:56.237486 tftpboot 192.168.201.1 8789760/tftp-deploy-1835veix/kernel/bzImoy-1835veix/kernel/cmdline 8789760/tftp-deploy-1835veix/ramdisk/ramdisk.cpio.gz
2102 03:22:56.237594
2103 03:22:56.237672 Waiting for link
2104 03:22:56.237741
2105 03:22:56.438769 done.
2106 03:22:56.438933
2107 03:22:56.439013 MAC: 00:24:32:50:1a:59
2108 03:22:56.439083
2109 03:22:56.441612 Sending DHCP discover... done.
2110 03:22:56.441708
2111 03:22:56.445249 Waiting for reply... done.
2112 03:22:56.445344
2113 03:22:56.448324 Sending DHCP request... done.
2114 03:22:56.448424
2115 03:22:56.451489 Waiting for reply... done.
2116 03:22:56.451584
2117 03:22:56.455102 My ip is 192.168.201.14
2118 03:22:56.455197
2119 03:22:56.458105 The DHCP server ip is 192.168.201.1
2120 03:22:56.458201
2121 03:22:56.461613 TFTP server IP predefined by user: 192.168.201.1
2122 03:22:56.461709
2123 03:22:56.468099 Bootfile predefined by user: 8789760/tftp-deploy-1835veix/kernel/bzImage
2124 03:22:56.468196
2125 03:22:56.471717 Sending tftp read request... done.
2126 03:22:56.471813
2127 03:22:56.478402 Waiting for the transfer...
2128 03:22:56.478497
2129 03:22:57.147312 00000000 ################################################################
2130 03:22:57.147485
2131 03:22:57.819526 00080000 ################################################################
2132 03:22:57.819692
2133 03:22:58.483077 00100000 ################################################################
2134 03:22:58.483250
2135 03:22:59.152216 00180000 ################################################################
2136 03:22:59.152400
2137 03:22:59.793744 00200000 ################################################################
2138 03:22:59.793916
2139 03:23:00.434313 00280000 ################################################################
2140 03:23:00.434483
2141 03:23:01.098894 00300000 ################################################################
2142 03:23:01.099075
2143 03:23:01.750520 00380000 ################################################################
2144 03:23:01.750682
2145 03:23:02.415972 00400000 ################################################################
2146 03:23:02.416134
2147 03:23:03.073566 00480000 ################################################################
2148 03:23:03.073719
2149 03:23:03.722363 00500000 ################################################################
2150 03:23:03.722527
2151 03:23:04.394875 00580000 ################################################################
2152 03:23:04.395024
2153 03:23:05.059837 00600000 ################################################################
2154 03:23:05.060005
2155 03:23:05.732740 00680000 ################################################################
2156 03:23:05.732918
2157 03:23:06.400515 00700000 ################################################################
2158 03:23:06.400680
2159 03:23:07.047057 00780000 ################################################################
2160 03:23:07.047207
2161 03:23:07.706721 00800000 ################################################################
2162 03:23:07.706903
2163 03:23:08.371528 00880000 ################################################################
2164 03:23:08.371692
2165 03:23:08.730900 00900000 ################################## done.
2166 03:23:08.731058
2167 03:23:08.734439 The bootfile was 9711616 bytes long.
2168 03:23:08.734535
2169 03:23:08.737892 Sending tftp read request... done.
2170 03:23:08.737988
2171 03:23:08.740965 Waiting for the transfer...
2172 03:23:08.741061
2173 03:23:09.402400 00000000 ################################################################
2174 03:23:09.402571
2175 03:23:10.071956 00080000 ################################################################
2176 03:23:10.072126
2177 03:23:10.755968 00100000 ################################################################
2178 03:23:10.756133
2179 03:23:11.437680 00180000 ################################################################
2180 03:23:11.437840
2181 03:23:12.089369 00200000 ################################################################
2182 03:23:12.089537
2183 03:23:12.752025 00280000 ################################################################
2184 03:23:12.752200
2185 03:23:13.415002 00300000 ################################################################
2186 03:23:13.415178
2187 03:23:14.077469 00380000 ################################################################
2188 03:23:14.077623
2189 03:23:14.720683 00400000 ################################################################
2190 03:23:14.720857
2191 03:23:15.387575 00480000 ################################################################
2192 03:23:15.387743
2193 03:23:15.741684 00500000 ################################### done.
2194 03:23:15.741835
2195 03:23:15.744614 Sending tftp read request... done.
2196 03:23:15.744711
2197 03:23:15.748165 Waiting for the transfer...
2198 03:23:15.748260
2199 03:23:15.748336 00000000 # done.
2200 03:23:15.748408
2201 03:23:15.757702 Command line loaded dynamically from TFTP file: 8789760/tftp-deploy-1835veix/kernel/cmdline
2202 03:23:15.757801
2203 03:23:15.784339 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8789760/extract-nfsrootfs-40taob7f,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2204 03:23:15.784449
2205 03:23:15.790993 ec_init(0): CrosEC protocol v3 supported (256, 256)
2206 03:23:15.791089
2207 03:23:15.798041 Shutting down all USB controllers.
2208 03:23:15.798137
2209 03:23:15.798212 Removing current net device
2210 03:23:15.798283
2211 03:23:15.801150 Finalizing coreboot
2212 03:23:15.801247
2213 03:23:15.807865 Exiting depthcharge with code 4 at timestamp: 29260658
2214 03:23:15.807961
2215 03:23:15.808036
2216 03:23:15.808116 Starting kernel ...
2217 03:23:15.808185
2218 03:23:15.808578 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2219 03:23:15.808694 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2220 03:23:15.808786 Setting prompt string to ['Linux version [0-9]']
2221 03:23:15.808865 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2222 03:23:15.808945 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2223 03:23:15.811358
2224 03:23:15.811454
2226 03:27:34.809708 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2228 03:27:34.810903 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2230 03:27:34.811824 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2233 03:27:34.813423 end: 2 depthcharge-action (duration 00:05:00) [common]
2235 03:27:34.814385 Cleaning after the job
2236 03:27:34.814481 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8789760/tftp-deploy-1835veix/ramdisk
2237 03:27:34.814975 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8789760/tftp-deploy-1835veix/kernel
2238 03:27:34.815674 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8789760/tftp-deploy-1835veix/nfsrootfs
2239 03:27:34.849533 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8789760/tftp-deploy-1835veix/modules
2240 03:27:34.849855 start: 5.1 power-off (timeout 00:00:30) [common]
2241 03:27:34.850034 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2242 03:27:34.870996 >> Command sent successfully.
2243 03:27:34.873206 Returned 0 in 0 seconds
2244 03:27:34.974142 end: 5.1 power-off (duration 00:00:00) [common]
2246 03:27:34.975678 start: 5.2 read-feedback (timeout 00:10:00) [common]
2247 03:27:34.976941 Listened to connection for namespace 'common' for up to 1s
2248 03:27:35.552941 Listened to connection for namespace 'common' for up to 1s
2249 03:27:35.555685 Listened to connection for namespace 'common' for up to 1s
2250 03:27:35.558920 Listened to connection for namespace 'common' for up to 1s
2251 03:27:35.562409 Listened to connection for namespace 'common' for up to 1s
2252 03:27:35.565899 Listened to connection for namespace 'common' for up to 1s
2253 03:27:35.569014 Listened to connection for namespace 'common' for up to 1s
2254 03:27:35.572933 Listened to connection for namespace 'common' for up to 1s
2255 03:27:35.575868 Listened to connection for namespace 'common' for up to 1s
2256 03:27:35.579289 Listened to connection for namespace 'common' for up to 1s
2257 03:27:35.582331 Listened to connection for namespace 'common' for up to 1s
2258 03:27:35.586271 Listened to connection for namespace 'common' for up to 1s
2259 03:27:35.589101 Listened to connection for namespace 'common' for up to 1s
2260 03:27:35.592395 Listened to connection for namespace 'common' for up to 1s
2261 03:27:35.596309 Listened to connection for namespace 'common' for up to 1s
2262 03:27:35.599050 Listened to connection for namespace 'common' for up to 1s
2263 03:27:35.603213 Listened to connection for namespace 'common' for up to 1s
2264 03:27:35.607112 Listened to connection for namespace 'common' for up to 1s
2265 03:27:35.977820 Finalising connection for namespace 'common'
2266 03:27:35.978521 Disconnecting from shell: Finalise
2267 03:27:35.978988
2268 03:27:36.080586 end: 5.2 read-feedback (duration 00:00:01) [common]
2269 03:27:36.081235 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8789760
2270 03:27:36.217912 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8789760
2271 03:27:36.218123 JobError: Your job cannot terminate cleanly.