Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 20:12:31.170796 lava-dispatcher, installed at version: 2022.11
2 20:12:31.171013 start: 0 validate
3 20:12:31.171149 Start time: 2023-01-18 20:12:31.171139+00:00 (UTC)
4 20:12:31.171300 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:12:31.171454 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230114.0%2Fx86%2Frootfs.cpio.gz exists
6 20:12:31.459377 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:12:31.459569 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.269-rt119-1495-gc851fb1e222f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:12:31.751395 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:12:31.751559 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.269-rt119-1495-gc851fb1e222f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 20:12:32.045847 validate duration: 0.87
12 20:12:32.046181 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 20:12:32.046324 start: 1.1 download-retry (timeout 00:10:00) [common]
14 20:12:32.046417 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 20:12:32.046521 Not decompressing ramdisk as can be used compressed.
16 20:12:32.046605 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230114.0/x86/rootfs.cpio.gz
17 20:12:32.046669 saving as /var/lib/lava/dispatcher/tmp/8784766/tftp-deploy-5yy5dmly/ramdisk/rootfs.cpio.gz
18 20:12:32.046794 total size: 8423555 (8MB)
19 20:12:32.063030 progress 0% (0MB)
20 20:12:32.078978 progress 5% (0MB)
21 20:12:32.086979 progress 10% (0MB)
22 20:12:32.098214 progress 15% (1MB)
23 20:12:32.107730 progress 20% (1MB)
24 20:12:32.116311 progress 25% (2MB)
25 20:12:32.126096 progress 30% (2MB)
26 20:12:32.134822 progress 35% (2MB)
27 20:12:32.146694 progress 40% (3MB)
28 20:12:32.156416 progress 45% (3MB)
29 20:12:32.165061 progress 50% (4MB)
30 20:12:32.174341 progress 55% (4MB)
31 20:12:32.183868 progress 60% (4MB)
32 20:12:32.192839 progress 65% (5MB)
33 20:12:32.202033 progress 70% (5MB)
34 20:12:32.213888 progress 75% (6MB)
35 20:12:32.223003 progress 80% (6MB)
36 20:12:32.232151 progress 85% (6MB)
37 20:12:32.241560 progress 90% (7MB)
38 20:12:32.250342 progress 95% (7MB)
39 20:12:32.261990 progress 100% (8MB)
40 20:12:32.262229 8MB downloaded in 0.22s (37.29MB/s)
41 20:12:32.262421 end: 1.1.1 http-download (duration 00:00:00) [common]
43 20:12:32.262723 end: 1.1 download-retry (duration 00:00:00) [common]
44 20:12:32.262828 start: 1.2 download-retry (timeout 00:10:00) [common]
45 20:12:32.262948 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 20:12:32.263064 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.269-rt119-1495-gc851fb1e222f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 20:12:32.263160 saving as /var/lib/lava/dispatcher/tmp/8784766/tftp-deploy-5yy5dmly/kernel/bzImage
48 20:12:32.263244 total size: 9711616 (9MB)
49 20:12:32.263336 No compression specified
50 20:12:34.769016 progress 0% (0MB)
51 20:12:34.799258 progress 5% (0MB)
52 20:12:34.819237 progress 10% (0MB)
53 20:12:34.839131 progress 15% (1MB)
54 20:12:34.868085 progress 20% (1MB)
55 20:12:34.890192 progress 25% (2MB)
56 20:12:34.913103 progress 30% (2MB)
57 20:12:34.940583 progress 35% (3MB)
58 20:12:34.967063 progress 40% (3MB)
59 20:12:34.999523 progress 45% (4MB)
60 20:12:35.028419 progress 50% (4MB)
61 20:12:35.052776 progress 55% (5MB)
62 20:12:35.083853 progress 60% (5MB)
63 20:12:35.105497 progress 65% (6MB)
64 20:12:35.136858 progress 70% (6MB)
65 20:12:35.169661 progress 75% (6MB)
66 20:12:35.201779 progress 80% (7MB)
67 20:12:35.227155 progress 85% (7MB)
68 20:12:35.261377 progress 90% (8MB)
69 20:12:35.292533 progress 95% (8MB)
70 20:12:35.317813 progress 100% (9MB)
71 20:12:35.318091 9MB downloaded in 3.05s (3.03MB/s)
72 20:12:35.318270 end: 1.2.1 http-download (duration 00:00:03) [common]
74 20:12:35.318528 end: 1.2 download-retry (duration 00:00:03) [common]
75 20:12:35.318622 start: 1.3 download-retry (timeout 00:09:57) [common]
76 20:12:35.318711 start: 1.3.1 http-download (timeout 00:09:57) [common]
77 20:12:35.318831 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.269-rt119-1495-gc851fb1e222f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 20:12:35.318903 saving as /var/lib/lava/dispatcher/tmp/8784766/tftp-deploy-5yy5dmly/modules/modules.tar
79 20:12:35.318971 total size: 64608 (0MB)
80 20:12:35.319034 Using unxz to decompress xz
81 20:12:35.353266 progress 50% (0MB)
82 20:12:35.353726 progress 100% (0MB)
83 20:12:35.358058 0MB downloaded in 0.04s (1.58MB/s)
84 20:12:35.358316 end: 1.3.1 http-download (duration 00:00:00) [common]
86 20:12:35.358595 end: 1.3 download-retry (duration 00:00:00) [common]
87 20:12:35.358699 start: 1.4 prepare-tftp-overlay (timeout 00:09:57) [common]
88 20:12:35.358801 start: 1.4.1 extract-nfsrootfs (timeout 00:09:57) [common]
89 20:12:35.358889 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 20:12:35.358982 start: 1.4.2 lava-overlay (timeout 00:09:57) [common]
91 20:12:35.359160 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2
92 20:12:35.359279 makedir: /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin
93 20:12:35.359367 makedir: /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/tests
94 20:12:35.359454 makedir: /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/results
95 20:12:35.359566 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-add-keys
96 20:12:35.359705 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-add-sources
97 20:12:35.359825 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-background-process-start
98 20:12:35.359951 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-background-process-stop
99 20:12:35.360071 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-common-functions
100 20:12:35.360188 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-echo-ipv4
101 20:12:35.360306 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-install-packages
102 20:12:35.360423 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-installed-packages
103 20:12:35.360539 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-os-build
104 20:12:35.360654 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-probe-channel
105 20:12:35.360770 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-probe-ip
106 20:12:35.360887 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-target-ip
107 20:12:35.361003 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-target-mac
108 20:12:35.361115 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-target-storage
109 20:12:35.361234 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-test-case
110 20:12:35.361351 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-test-event
111 20:12:35.361465 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-test-feedback
112 20:12:35.361576 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-test-raise
113 20:12:35.361696 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-test-reference
114 20:12:35.361810 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-test-runner
115 20:12:35.361922 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-test-set
116 20:12:35.362034 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-test-shell
117 20:12:35.362166 Updating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-install-packages (oe)
118 20:12:35.362288 Updating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/bin/lava-installed-packages (oe)
119 20:12:35.362393 Creating /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/environment
120 20:12:35.362490 LAVA metadata
121 20:12:35.362567 - LAVA_JOB_ID=8784766
122 20:12:35.362638 - LAVA_DISPATCHER_IP=192.168.201.1
123 20:12:35.362746 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:57) [common]
124 20:12:35.362822 skipped lava-vland-overlay
125 20:12:35.362904 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 20:12:35.362991 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:57) [common]
127 20:12:35.363069 skipped lava-multinode-overlay
128 20:12:35.363154 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 20:12:35.363249 start: 1.4.2.3 test-definition (timeout 00:09:57) [common]
130 20:12:35.363329 Loading test definitions
131 20:12:35.363433 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:57) [common]
132 20:12:35.363512 Using /lava-8784766 at stage 0
133 20:12:35.363797 uuid=8784766_1.4.2.3.1 testdef=None
134 20:12:35.363894 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 20:12:35.363988 start: 1.4.2.3.2 test-overlay (timeout 00:09:57) [common]
136 20:12:35.364512 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 20:12:35.364759 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:57) [common]
139 20:12:35.365381 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 20:12:35.365653 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:57) [common]
142 20:12:35.366280 runner path: /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/0/tests/0_dmesg test_uuid 8784766_1.4.2.3.1
143 20:12:35.366444 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 20:12:35.366700 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:57) [common]
146 20:12:35.366781 Using /lava-8784766 at stage 1
147 20:12:35.367038 uuid=8784766_1.4.2.3.5 testdef=None
148 20:12:35.367134 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 20:12:35.367230 start: 1.4.2.3.6 test-overlay (timeout 00:09:57) [common]
150 20:12:35.367696 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 20:12:35.367943 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:57) [common]
153 20:12:35.368574 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 20:12:35.368825 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:57) [common]
156 20:12:35.369404 runner path: /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/1/tests/1_bootrr test_uuid 8784766_1.4.2.3.5
157 20:12:35.369557 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 20:12:35.369779 Creating lava-test-runner.conf files
160 20:12:35.369845 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/0 for stage 0
161 20:12:35.369931 - 0_dmesg
162 20:12:35.370018 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8784766/lava-overlay-osm4vht2/lava-8784766/1 for stage 1
163 20:12:35.370149 - 1_bootrr
164 20:12:35.370250 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 20:12:35.370343 start: 1.4.2.4 compress-overlay (timeout 00:09:57) [common]
166 20:12:35.376773 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 20:12:35.376903 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:57) [common]
168 20:12:35.376998 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 20:12:35.377090 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 20:12:35.377180 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
171 20:12:35.572481 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 20:12:35.572831 start: 1.4.4 extract-modules (timeout 00:09:56) [common]
173 20:12:35.572947 extracting modules file /var/lib/lava/dispatcher/tmp/8784766/tftp-deploy-5yy5dmly/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8784766/extract-overlay-ramdisk-hdoftms4/ramdisk
174 20:12:35.577315 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 20:12:35.577444 start: 1.4.5 apply-overlay-tftp (timeout 00:09:56) [common]
176 20:12:35.577538 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8784766/compress-overlay-xrwafzx4/overlay-1.4.2.4.tar.gz to ramdisk
177 20:12:35.577614 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8784766/compress-overlay-xrwafzx4/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8784766/extract-overlay-ramdisk-hdoftms4/ramdisk
178 20:12:35.581646 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 20:12:35.581766 start: 1.4.6 configure-preseed-file (timeout 00:09:56) [common]
180 20:12:35.581862 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 20:12:35.581959 start: 1.4.7 compress-ramdisk (timeout 00:09:56) [common]
182 20:12:35.582042 Building ramdisk /var/lib/lava/dispatcher/tmp/8784766/extract-overlay-ramdisk-hdoftms4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8784766/extract-overlay-ramdisk-hdoftms4/ramdisk
183 20:12:35.647045 >> 48351 blocks
184 20:12:36.450171 rename /var/lib/lava/dispatcher/tmp/8784766/extract-overlay-ramdisk-hdoftms4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8784766/tftp-deploy-5yy5dmly/ramdisk/ramdisk.cpio.gz
185 20:12:36.450596 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 20:12:36.450732 start: 1.4.8 prepare-kernel (timeout 00:09:56) [common]
187 20:12:36.450838 start: 1.4.8.1 prepare-fit (timeout 00:09:56) [common]
188 20:12:36.450997 No mkimage arch provided, not using FIT.
189 20:12:36.451141 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 20:12:36.451288 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 20:12:36.451439 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 20:12:36.451583 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:56) [common]
193 20:12:36.451707 No LXC device requested
194 20:12:36.451812 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 20:12:36.451905 start: 1.6 deploy-device-env (timeout 00:09:56) [common]
196 20:12:36.451996 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 20:12:36.452068 Checking files for TFTP limit of 4294967296 bytes.
198 20:12:36.452478 end: 1 tftp-deploy (duration 00:00:04) [common]
199 20:12:36.452590 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 20:12:36.452687 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 20:12:36.452818 substitutions:
202 20:12:36.452886 - {DTB}: None
203 20:12:36.452955 - {INITRD}: 8784766/tftp-deploy-5yy5dmly/ramdisk/ramdisk.cpio.gz
204 20:12:36.453017 - {KERNEL}: 8784766/tftp-deploy-5yy5dmly/kernel/bzImage
205 20:12:36.453080 - {LAVA_MAC}: None
206 20:12:36.453146 - {PRESEED_CONFIG}: None
207 20:12:36.453208 - {PRESEED_LOCAL}: None
208 20:12:36.453263 - {RAMDISK}: 8784766/tftp-deploy-5yy5dmly/ramdisk/ramdisk.cpio.gz
209 20:12:36.453319 - {ROOT_PART}: None
210 20:12:36.453373 - {ROOT}: None
211 20:12:36.453431 - {SERVER_IP}: 192.168.201.1
212 20:12:36.453493 - {TEE}: None
213 20:12:36.453548 Parsed boot commands:
214 20:12:36.453604 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 20:12:36.453795 Parsed boot commands: tftpboot 192.168.201.1 8784766/tftp-deploy-5yy5dmly/kernel/bzImage 8784766/tftp-deploy-5yy5dmly/kernel/cmdline 8784766/tftp-deploy-5yy5dmly/ramdisk/ramdisk.cpio.gz
216 20:12:36.453907 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 20:12:36.454000 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 20:12:36.454115 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 20:12:36.454203 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 20:12:36.454271 Not connected, no need to disconnect.
221 20:12:36.454351 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 20:12:36.454434 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 20:12:36.454499 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-8'
224 20:12:36.457066 Setting prompt string to ['lava-test: # ']
225 20:12:36.457362 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 20:12:36.457495 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 20:12:36.457613 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 20:12:36.457704 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 20:12:36.457891 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=reboot'
230 20:12:36.477096 >> Command sent successfully.
231 20:12:36.479181 Returned 0 in 0 seconds
232 20:12:36.579946 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 20:12:36.580509 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 20:12:36.580608 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 20:12:36.580693 Setting prompt string to 'Starting depthcharge on Magolor...'
237 20:12:36.580757 Changing prompt to 'Starting depthcharge on Magolor...'
238 20:12:36.580823 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
239 20:12:36.581087 [Enter `^Ec?' for help]
240 20:12:43.989264
241 20:12:43.989416
242 20:12:43.999697 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
243 20:12:44.003085 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
244 20:12:44.006339 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
245 20:12:44.012862 CPU: AES supported, TXT NOT supported, VT supported
246 20:12:44.016865 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
247 20:12:44.023399 PCH: device id 4d87 (rev 01) is Jasperlake Super
248 20:12:44.026068 IGD: device id 4e55 (rev 01) is Jasperlake GT4
249 20:12:44.029928 VBOOT: Loading verstage.
250 20:12:44.037104 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 20:12:44.040308 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
252 20:12:44.046864 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 20:12:44.050029 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
254 20:12:44.053441
255 20:12:44.053522
256 20:12:44.063274 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
257 20:12:44.077718 Probing TPM: . done!
258 20:12:44.081560 TPM ready after 0 ms
259 20:12:44.085395 Connected to device vid:did:rid of 1ae0:0028:00
260 20:12:44.095378 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
261 20:12:44.101819 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
262 20:12:44.105803 Initialized TPM device CR50 revision 0
263 20:12:44.171390 tlcl_send_startup: Startup return code is 0
264 20:12:44.171557 TPM: setup succeeded
265 20:12:44.181225 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
266 20:12:44.198055 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
267 20:12:44.209931 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
268 20:12:44.219141 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 20:12:44.223142 Chrome EC: UHEPI supported
270 20:12:44.226354 Phase 1
271 20:12:44.229601 FMAP: area GBB found @ c05000 (12288 bytes)
272 20:12:44.236063 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
273 20:12:44.242548 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
274 20:12:44.245789 Recovery requested (1009000e)
275 20:12:44.255672 TPM: Extending digest for VBOOT: boot mode into PCR 0
276 20:12:44.261538 tlcl_extend: response is 0
277 20:12:44.268479 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
278 20:12:44.277814 tlcl_extend: response is 0
279 20:12:44.284299 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
280 20:12:44.287641 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
281 20:12:44.294154 BS: verstage times (exec / console): total (unknown) / 124 ms
282 20:12:44.297401
283 20:12:44.297488
284 20:12:44.307304 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
285 20:12:44.313752 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
286 20:12:44.317082 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
287 20:12:44.320960 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
288 20:12:44.327412 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
289 20:12:44.330496 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
290 20:12:44.333773 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
291 20:12:44.337434 TCO_STS: 0000 0001
292 20:12:44.340848 GEN_PMCON: d0015038 00002200
293 20:12:44.343980 GBLRST_CAUSE: 00000000 00000000
294 20:12:44.344066 prev_sleep_state 5
295 20:12:44.347922 Boot Count incremented to 11052
296 20:12:44.354448 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
297 20:12:44.357610 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
298 20:12:44.361947 Chrome EC: UHEPI supported
299 20:12:44.369093 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
300 20:12:44.374851 Probing TPM: done!
301 20:12:44.381387 Connected to device vid:did:rid of 1ae0:0028:00
302 20:12:44.391696 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
303 20:12:44.395051 Initialized TPM device CR50 revision 0
304 20:12:44.408926 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
305 20:12:44.415552 MRC: Hash idx 0x100b comparison successful.
306 20:12:44.418928 MRC cache found, size 5458
307 20:12:44.419005 bootmode is set to: 2
308 20:12:44.422753 SPD INDEX = 0
309 20:12:44.425431 CBFS: Found 'spd.bin' @0x40c40 size 0x600
310 20:12:44.428731 SPD: module type is LPDDR4X
311 20:12:44.435752 SPD: module part number is MT53E512M32D2NP-046 WT:E
312 20:12:44.442585 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
313 20:12:44.445845 SPD: device width 16 bits, bus width 32 bits
314 20:12:44.448825 SPD: module size is 4096 MB (per channel)
315 20:12:44.452201 meminit_channels: DRAM half-populated
316 20:12:44.535622 CBMEM:
317 20:12:44.538746 IMD: root @ 0x76fff000 254 entries.
318 20:12:44.541940 IMD: root @ 0x76ffec00 62 entries.
319 20:12:44.545188 FMAP: area RO_VPD found @ c00000 (16384 bytes)
320 20:12:44.551587 WARNING: RO_VPD is uninitialized or empty.
321 20:12:44.554970 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
322 20:12:44.558996 External stage cache:
323 20:12:44.562340 IMD: root @ 0x7b3ff000 254 entries.
324 20:12:44.565516 IMD: root @ 0x7b3fec00 62 entries.
325 20:12:44.575233 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
326 20:12:44.582392 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
327 20:12:44.588859 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
328 20:12:44.596695 MRC: 'RECOVERY_MRC_CACHE' does not need update.
329 20:12:44.600010 cse_lite: Skip switching to RW in the recovery path
330 20:12:44.603489
331 20:12:44.603578 1 DIMMs found
332 20:12:44.603645 SMM Memory Map
333 20:12:44.606627 SMRAM : 0x7b000000 0x800000
334 20:12:44.609881 Subregion 0: 0x7b000000 0x200000
335 20:12:44.613229
336 20:12:44.616579 Subregion 1: 0x7b200000 0x200000
337 20:12:44.619935 Subregion 2: 0x7b400000 0x400000
338 20:12:44.620026 top_of_ram = 0x77000000
339 20:12:44.626494 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
340 20:12:44.633212 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
341 20:12:44.636458 MTRR Range: Start=ff000000 End=0 (Size 1000000)
342 20:12:44.642886 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
343 20:12:44.646171 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
344 20:12:44.649326
345 20:12:44.659732 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
346 20:12:44.662972 Processing 188 relocs. Offset value of 0x74c0e000
347 20:12:44.671993 BS: romstage times (exec / console): total (unknown) / 255 ms
348 20:12:44.676445
349 20:12:44.676550
350 20:12:44.686685 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
351 20:12:44.693419 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
352 20:12:44.696646 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
353 20:12:44.703242 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
354 20:12:44.759066 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
355 20:12:44.765618 Processing 4805 relocs. Offset value of 0x75da8000
356 20:12:44.768844 BS: postcar times (exec / console): total (unknown) / 42 ms
357 20:12:44.772131
358 20:12:44.772213
359 20:12:44.772280
360 20:12:44.782356 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
361 20:12:44.782446 Normal boot
362 20:12:44.786246 EC returned error result code 3
363 20:12:44.789736 FW_CONFIG value is 0x204
364 20:12:44.793033 GENERIC: 0.0 disabled by fw_config
365 20:12:44.799491 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
366 20:12:44.802880 I2C: 00:10 disabled by fw_config
367 20:12:44.806091 I2C: 00:10 disabled by fw_config
368 20:12:44.809415 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
369 20:12:44.815865 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
370 20:12:44.819840 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 20:12:44.823729 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 20:12:44.827148
373 20:12:44.830435 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
374 20:12:44.833683 I2C: 00:10 disabled by fw_config
375 20:12:44.840155 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
376 20:12:44.847022 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
377 20:12:44.850261 I2C: 00:1a disabled by fw_config
378 20:12:44.853393 I2C: 00:1a disabled by fw_config
379 20:12:44.856637 fw_config match found: AUDIO_AMP=UNPROVISIONED
380 20:12:44.863207 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 20:12:44.866403 GENERIC: 0.0 disabled by fw_config
382 20:12:44.870247 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
383 20:12:44.876784 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
384 20:12:44.879952 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
385 20:12:44.883399
386 20:12:44.886633 microcode: Update skipped, already up-to-date
387 20:12:44.889830 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 20:12:44.918350 Detected 2 core, 2 thread CPU.
389 20:12:44.921544 Setting up SMI for CPU
390 20:12:44.924811 IED base = 0x7b400000
391 20:12:44.924891 IED size = 0x00400000
392 20:12:44.928217 Will perform SMM setup.
393 20:12:44.931372 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 20:12:44.941208 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 20:12:44.944397 Processing 16 relocs. Offset value of 0x00030000
396 20:12:44.948108 Attempting to start 1 APs
397 20:12:44.951290 Waiting for 10ms after sending INIT.
398 20:12:44.967945 Waiting for 1st SIPI to complete...done.
399 20:12:44.971220 Waiting for 2nd SIPI to complete...done.
400 20:12:44.974431 AP: slot 1 apic_id 2.
401 20:12:44.980913 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 20:12:44.987558 Processing 13 relocs. Offset value of 0x00038000
403 20:12:44.987636 Unable to locate Global NVS
404 20:12:44.997272 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 20:12:45.001131 Installing permanent SMM handler to 0x7b000000
406 20:12:45.010304 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 20:12:45.014056 Processing 704 relocs. Offset value of 0x7b010000
408 20:12:45.023795 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 20:12:45.027078 Processing 13 relocs. Offset value of 0x7b008000
410 20:12:45.033733 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 20:12:45.036836 Unable to locate Global NVS
412 20:12:45.043334 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 20:12:45.046490 Clearing SMI status registers
414 20:12:45.046574 SMI_STS: PM1
415 20:12:45.050342 PM1_STS: PWRBTN
416 20:12:45.053618 TCO_STS: INTRD_DET
417 20:12:45.060072 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
418 20:12:45.063297 In relocation handler: CPU 0
419 20:12:45.066587 New SMBASE=0x7b000000 IEDBASE=0x7b400000
420 20:12:45.069964 Writing SMRR. base = 0x7b000006, mask=0xff800800
421 20:12:45.073271 Relocation complete.
422 20:12:45.079748 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
423 20:12:45.083597 In relocation handler: CPU 1
424 20:12:45.086830 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
425 20:12:45.093185 Writing SMRR. base = 0x7b000006, mask=0xff800800
426 20:12:45.093312 Relocation complete.
427 20:12:45.096697 Initializing CPU #0
428 20:12:45.099994 CPU: vendor Intel device 906c0
429 20:12:45.103398 CPU: family 06, model 9c, stepping 00
430 20:12:45.106535 Clearing out pending MCEs
431 20:12:45.109818 Setting up local APIC...
432 20:12:45.109918 apic_id: 0x00 done.
433 20:12:45.113142 Turbo is available but hidden
434 20:12:45.116479 Turbo is available and visible
435 20:12:45.122991 microcode: Update skipped, already up-to-date
436 20:12:45.123095 CPU #0 initialized
437 20:12:45.126341 Initializing CPU #1
438 20:12:45.129734 CPU: vendor Intel device 906c0
439 20:12:45.133009 CPU: family 06, model 9c, stepping 00
440 20:12:45.136104 Clearing out pending MCEs
441 20:12:45.139396 Setting up local APIC...
442 20:12:45.139475 apic_id: 0x02 done.
443 20:12:45.145871 microcode: Update skipped, already up-to-date
444 20:12:45.145980 CPU #1 initialized
445 20:12:45.153019 bsp_do_flight_plan done after 176 msecs.
446 20:12:45.153102 CPU: frequency set to 2800 MHz
447 20:12:45.155640 Enabling SMIs.
448 20:12:45.162566 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 287 ms
449 20:12:45.172302 Probing TPM: done!
450 20:12:45.178768 Connected to device vid:did:rid of 1ae0:0028:00
451 20:12:45.188943 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
452 20:12:45.192241 Initialized TPM device CR50 revision 0
453 20:12:45.194917 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
454 20:12:45.198193
455 20:12:45.202029 Found a VBT of 7680 bytes after decompression
456 20:12:45.208447 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
457 20:12:45.211770
458 20:12:45.244103 Detected 2 core, 2 thread CPU.
459 20:12:45.247315 Detected 2 core, 2 thread CPU.
460 20:12:45.608343 Display FSP Version Info HOB
461 20:12:45.612090 Reference Code - CPU = 8.7.22.30
462 20:12:45.615325 uCode Version = 24.0.0.1f
463 20:12:45.618618 TXT ACM version = ff.ff.ff.ffff
464 20:12:45.621871 Reference Code - ME = 8.7.22.30
465 20:12:45.625284 MEBx version = 0.0.0.0
466 20:12:45.628511 ME Firmware Version = Consumer SKU
467 20:12:45.631819 Reference Code - PCH = 8.7.22.30
468 20:12:45.635129 PCH-CRID Status = Disabled
469 20:12:45.638291 PCH-CRID Original Value = ff.ff.ff.ffff
470 20:12:45.641688 PCH-CRID New Value = ff.ff.ff.ffff
471 20:12:45.644786 OPROM - RST - RAID = ff.ff.ff.ffff
472 20:12:45.648140 PCH Hsio Version = 4.0.0.0
473 20:12:45.651256 Reference Code - SA - System Agent = 8.7.22.30
474 20:12:45.654448 Reference Code - MRC = 0.0.4.68
475 20:12:45.657851 SA - PCIe Version = 8.7.22.30
476 20:12:45.661630 SA-CRID Status = Disabled
477 20:12:45.664782 SA-CRID Original Value = 0.0.0.0
478 20:12:45.668027 SA-CRID New Value = 0.0.0.0
479 20:12:45.671195 OPROM - VBIOS = ff.ff.ff.ffff
480 20:12:45.674363 IO Manageability Engine FW Version = ff.ff.ff.ffff
481 20:12:45.677602 PHY Build Version = ff.ff.ff.ffff
482 20:12:45.684262 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
483 20:12:45.687888 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
484 20:12:45.691174 ITSS IRQ Polarities Before:
485 20:12:45.694388 IPC0: 0xffffffff
486 20:12:45.694478 IPC1: 0xffffffff
487 20:12:45.697630 IPC2: 0xffffffff
488 20:12:45.697719 IPC3: 0xffffffff
489 20:12:45.700918 ITSS IRQ Polarities After:
490 20:12:45.704159 IPC0: 0xffffffff
491 20:12:45.704250 IPC1: 0xffffffff
492 20:12:45.707410 IPC2: 0xffffffff
493 20:12:45.707502 IPC3: 0xffffffff
494 20:12:45.720614 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
495 20:12:45.727366 BS: BS_DEV_INIT_CHIPS run times (exec / console): 403 / 156 ms
496 20:12:45.727496 Enumerating buses...
497 20:12:45.730612
498 20:12:45.733912 Show all devs... Before device enumeration.
499 20:12:45.737150 Root Device: enabled 1
500 20:12:45.737233 CPU_CLUSTER: 0: enabled 1
501 20:12:45.740354 DOMAIN: 0000: enabled 1
502 20:12:45.743727 PCI: 00:00.0: enabled 1
503 20:12:45.747055 PCI: 00:02.0: enabled 1
504 20:12:45.747161 PCI: 00:04.0: enabled 1
505 20:12:45.750210 PCI: 00:05.0: enabled 1
506 20:12:45.754086 PCI: 00:09.0: enabled 0
507 20:12:45.754171 PCI: 00:12.6: enabled 0
508 20:12:45.757477 PCI: 00:14.0: enabled 1
509 20:12:45.760639 PCI: 00:14.1: enabled 0
510 20:12:45.763661 PCI: 00:14.2: enabled 0
511 20:12:45.763739 PCI: 00:14.3: enabled 1
512 20:12:45.767075 PCI: 00:14.5: enabled 1
513 20:12:45.770304 PCI: 00:15.0: enabled 1
514 20:12:45.773408 PCI: 00:15.1: enabled 1
515 20:12:45.773491 PCI: 00:15.2: enabled 1
516 20:12:45.776665 PCI: 00:15.3: enabled 1
517 20:12:45.780694 PCI: 00:16.0: enabled 1
518 20:12:45.783359 PCI: 00:16.1: enabled 0
519 20:12:45.783444 PCI: 00:16.4: enabled 0
520 20:12:45.787199 PCI: 00:16.5: enabled 0
521 20:12:45.790312 PCI: 00:17.0: enabled 0
522 20:12:45.790403 PCI: 00:19.0: enabled 1
523 20:12:45.793670
524 20:12:45.793757 PCI: 00:19.1: enabled 0
525 20:12:45.796726 PCI: 00:19.2: enabled 1
526 20:12:45.800015 PCI: 00:1a.0: enabled 1
527 20:12:45.800102 PCI: 00:1c.0: enabled 0
528 20:12:45.803430 PCI: 00:1c.1: enabled 0
529 20:12:45.806546 PCI: 00:1c.2: enabled 0
530 20:12:45.809794 PCI: 00:1c.3: enabled 0
531 20:12:45.809878 PCI: 00:1c.4: enabled 0
532 20:12:45.813007 PCI: 00:1c.5: enabled 0
533 20:12:45.816279 PCI: 00:1c.6: enabled 0
534 20:12:45.819598 PCI: 00:1c.7: enabled 1
535 20:12:45.819685 PCI: 00:1e.0: enabled 0
536 20:12:45.823558 PCI: 00:1e.1: enabled 0
537 20:12:45.826353 PCI: 00:1e.2: enabled 1
538 20:12:45.829544 PCI: 00:1e.3: enabled 0
539 20:12:45.829633 PCI: 00:1f.0: enabled 1
540 20:12:45.832864 PCI: 00:1f.1: enabled 1
541 20:12:45.836082 PCI: 00:1f.2: enabled 1
542 20:12:45.836166 PCI: 00:1f.3: enabled 1
543 20:12:45.839402 PCI: 00:1f.4: enabled 0
544 20:12:45.843308 PCI: 00:1f.5: enabled 1
545 20:12:45.846567 PCI: 00:1f.7: enabled 0
546 20:12:45.846652 GENERIC: 0.0: enabled 1
547 20:12:45.849790 GENERIC: 0.0: enabled 1
548 20:12:45.852879 USB0 port 0: enabled 1
549 20:12:45.856201 GENERIC: 0.0: enabled 1
550 20:12:45.856285 I2C: 00:2c: enabled 1
551 20:12:45.859544 I2C: 00:15: enabled 1
552 20:12:45.862845 GENERIC: 0.0: enabled 0
553 20:12:45.862932 I2C: 00:15: enabled 1
554 20:12:45.865888 I2C: 00:10: enabled 0
555 20:12:45.869281 I2C: 00:10: enabled 0
556 20:12:45.869364 I2C: 00:2c: enabled 1
557 20:12:45.872505 I2C: 00:40: enabled 1
558 20:12:45.875625 I2C: 00:10: enabled 1
559 20:12:45.875712 I2C: 00:39: enabled 1
560 20:12:45.879573 I2C: 00:36: enabled 1
561 20:12:45.882825 I2C: 00:10: enabled 0
562 20:12:45.882912 I2C: 00:0c: enabled 1
563 20:12:45.886050 I2C: 00:50: enabled 1
564 20:12:45.888825 I2C: 00:1a: enabled 1
565 20:12:45.888914 I2C: 00:1a: enabled 0
566 20:12:45.892218 I2C: 00:1a: enabled 0
567 20:12:45.895544 I2C: 00:28: enabled 1
568 20:12:45.895642 I2C: 00:29: enabled 1
569 20:12:45.898814
570 20:12:45.898917 PCI: 00:00.0: enabled 1
571 20:12:45.902702 SPI: 00: enabled 1
572 20:12:45.906066 PNP: 0c09.0: enabled 1
573 20:12:45.906161 GENERIC: 0.0: enabled 0
574 20:12:45.909254 USB2 port 0: enabled 1
575 20:12:45.912031 USB2 port 1: enabled 1
576 20:12:45.912121 USB2 port 2: enabled 1
577 20:12:45.915317 USB2 port 3: enabled 1
578 20:12:45.918656 USB2 port 4: enabled 0
579 20:12:45.918749 USB2 port 5: enabled 1
580 20:12:45.921893
581 20:12:45.921985 USB2 port 6: enabled 0
582 20:12:45.925325 USB2 port 7: enabled 1
583 20:12:45.928670 USB3 port 0: enabled 1
584 20:12:45.928772 USB3 port 1: enabled 1
585 20:12:45.932009 USB3 port 2: enabled 1
586 20:12:45.935460 USB3 port 3: enabled 1
587 20:12:45.935555 APIC: 00: enabled 1
588 20:12:45.938685 APIC: 02: enabled 1
589 20:12:45.942135 Compare with tree...
590 20:12:45.942228 Root Device: enabled 1
591 20:12:45.945454 CPU_CLUSTER: 0: enabled 1
592 20:12:45.948869 APIC: 00: enabled 1
593 20:12:45.948964 APIC: 02: enabled 1
594 20:12:45.951605
595 20:12:45.951691 DOMAIN: 0000: enabled 1
596 20:12:45.955057 PCI: 00:00.0: enabled 1
597 20:12:45.958392 PCI: 00:02.0: enabled 1
598 20:12:45.961700 PCI: 00:04.0: enabled 1
599 20:12:45.961877 GENERIC: 0.0: enabled 1
600 20:12:45.964834 PCI: 00:05.0: enabled 1
601 20:12:45.968714 GENERIC: 0.0: enabled 1
602 20:12:45.971965 PCI: 00:09.0: enabled 0
603 20:12:45.975342 PCI: 00:12.6: enabled 0
604 20:12:45.975492 PCI: 00:14.0: enabled 1
605 20:12:45.978471 USB0 port 0: enabled 1
606 20:12:45.981640 USB2 port 0: enabled 1
607 20:12:45.984895 USB2 port 1: enabled 1
608 20:12:45.988210 USB2 port 2: enabled 1
609 20:12:45.991418 USB2 port 3: enabled 1
610 20:12:45.991546 USB2 port 4: enabled 0
611 20:12:45.994533 USB2 port 5: enabled 1
612 20:12:45.998319 USB2 port 6: enabled 0
613 20:12:46.001620 USB2 port 7: enabled 1
614 20:12:46.004768 USB3 port 0: enabled 1
615 20:12:46.004871 USB3 port 1: enabled 1
616 20:12:46.008109
617 20:12:46.008232 USB3 port 2: enabled 1
618 20:12:46.011423 USB3 port 3: enabled 1
619 20:12:46.014617 PCI: 00:14.1: enabled 0
620 20:12:46.017935 PCI: 00:14.2: enabled 0
621 20:12:46.021155 PCI: 00:14.3: enabled 1
622 20:12:46.021305 GENERIC: 0.0: enabled 1
623 20:12:46.024347 PCI: 00:14.5: enabled 1
624 20:12:46.028293 PCI: 00:15.0: enabled 1
625 20:12:46.031434 I2C: 00:2c: enabled 1
626 20:12:46.031573 I2C: 00:15: enabled 1
627 20:12:46.034752 PCI: 00:15.1: enabled 1
628 20:12:46.038008 PCI: 00:15.2: enabled 1
629 20:12:46.041220 GENERIC: 0.0: enabled 0
630 20:12:46.044297 I2C: 00:15: enabled 1
631 20:12:46.044400 I2C: 00:10: enabled 0
632 20:12:46.047668 I2C: 00:10: enabled 0
633 20:12:46.050975 I2C: 00:2c: enabled 1
634 20:12:46.054340 I2C: 00:40: enabled 1
635 20:12:46.054442 I2C: 00:10: enabled 1
636 20:12:46.057516 I2C: 00:39: enabled 1
637 20:12:46.061026 PCI: 00:15.3: enabled 1
638 20:12:46.064241 I2C: 00:36: enabled 1
639 20:12:46.067512 I2C: 00:10: enabled 0
640 20:12:46.067609 I2C: 00:0c: enabled 1
641 20:12:46.070718 I2C: 00:50: enabled 1
642 20:12:46.074013 PCI: 00:16.0: enabled 1
643 20:12:46.077899 PCI: 00:16.1: enabled 0
644 20:12:46.077993 PCI: 00:16.4: enabled 0
645 20:12:46.081726 PCI: 00:16.5: enabled 0
646 20:12:46.085121 PCI: 00:17.0: enabled 0
647 20:12:46.088438 PCI: 00:19.0: enabled 1
648 20:12:46.088561 I2C: 00:1a: enabled 1
649 20:12:46.091718 I2C: 00:1a: enabled 0
650 20:12:46.095040 I2C: 00:1a: enabled 0
651 20:12:46.098319 I2C: 00:28: enabled 1
652 20:12:46.098408 I2C: 00:29: enabled 1
653 20:12:46.101499 PCI: 00:19.1: enabled 0
654 20:12:46.104681 PCI: 00:19.2: enabled 1
655 20:12:46.107943 PCI: 00:1a.0: enabled 1
656 20:12:46.111138 PCI: 00:1e.0: enabled 0
657 20:12:46.111218 PCI: 00:1e.1: enabled 0
658 20:12:46.114393 PCI: 00:1e.2: enabled 1
659 20:12:46.117712 SPI: 00: enabled 1
660 20:12:46.121417 PCI: 00:1e.3: enabled 0
661 20:12:46.121534 PCI: 00:1f.0: enabled 1
662 20:12:46.124672 PNP: 0c09.0: enabled 1
663 20:12:46.127927 PCI: 00:1f.1: enabled 1
664 20:12:46.131231 PCI: 00:1f.2: enabled 1
665 20:12:46.134572 PCI: 00:1f.3: enabled 1
666 20:12:46.134685 GENERIC: 0.0: enabled 0
667 20:12:46.137820 PCI: 00:1f.4: enabled 0
668 20:12:46.141018 PCI: 00:1f.5: enabled 1
669 20:12:46.144296 PCI: 00:1f.7: enabled 0
670 20:12:46.147480 Root Device scanning...
671 20:12:46.150826 scan_static_bus for Root Device
672 20:12:46.150915 CPU_CLUSTER: 0 enabled
673 20:12:46.154137 DOMAIN: 0000 enabled
674 20:12:46.157272 DOMAIN: 0000 scanning...
675 20:12:46.161003 PCI: pci_scan_bus for bus 00
676 20:12:46.164354 PCI: 00:00.0 [8086/0000] ops
677 20:12:46.167802 PCI: 00:00.0 [8086/4e22] enabled
678 20:12:46.171065 PCI: 00:02.0 [8086/0000] bus ops
679 20:12:46.174512 PCI: 00:02.0 [8086/4e55] enabled
680 20:12:46.177876 PCI: 00:04.0 [8086/0000] bus ops
681 20:12:46.181042 PCI: 00:04.0 [8086/4e03] enabled
682 20:12:46.184399 PCI: 00:05.0 [8086/0000] bus ops
683 20:12:46.187087 PCI: 00:05.0 [8086/4e19] enabled
684 20:12:46.190883 PCI: 00:08.0 [8086/4e11] enabled
685 20:12:46.194168 PCI: 00:14.0 [8086/0000] bus ops
686 20:12:46.197297 PCI: 00:14.0 [8086/4ded] enabled
687 20:12:46.200624 PCI: 00:14.2 [8086/4def] disabled
688 20:12:46.203654 PCI: 00:14.3 [8086/0000] bus ops
689 20:12:46.207059 PCI: 00:14.3 [8086/4df0] enabled
690 20:12:46.207151 PCI: 00:14.5 [8086/0000] ops
691 20:12:46.210341 PCI: 00:14.5 [8086/4df8] enabled
692 20:12:46.213582 PCI: 00:15.0 [8086/0000] bus ops
693 20:12:46.217475 PCI: 00:15.0 [8086/4de8] enabled
694 20:12:46.220614 PCI: 00:15.1 [8086/0000] bus ops
695 20:12:46.223922 PCI: 00:15.1 [8086/4de9] enabled
696 20:12:46.227273 PCI: 00:15.2 [8086/0000] bus ops
697 20:12:46.230492 PCI: 00:15.2 [8086/4dea] enabled
698 20:12:46.233727 PCI: 00:15.3 [8086/0000] bus ops
699 20:12:46.237214 PCI: 00:15.3 [8086/4deb] enabled
700 20:12:46.240457 PCI: 00:16.0 [8086/0000] ops
701 20:12:46.243784 PCI: 00:16.0 [8086/4de0] enabled
702 20:12:46.246871 PCI: 00:19.0 [8086/0000] bus ops
703 20:12:46.250344 PCI: 00:19.0 [8086/4dc5] enabled
704 20:12:46.253538 PCI: 00:19.2 [8086/0000] ops
705 20:12:46.256882 PCI: 00:19.2 [8086/4dc7] enabled
706 20:12:46.260224 PCI: 00:1a.0 [8086/0000] ops
707 20:12:46.263609 PCI: 00:1a.0 [8086/4dc4] enabled
708 20:12:46.266848 PCI: 00:1e.0 [8086/0000] ops
709 20:12:46.270024 PCI: 00:1e.0 [8086/4da8] disabled
710 20:12:46.273682 PCI: 00:1e.2 [8086/0000] bus ops
711 20:12:46.276800 PCI: 00:1e.2 [8086/4daa] enabled
712 20:12:46.280158 PCI: 00:1f.0 [8086/0000] bus ops
713 20:12:46.283299 PCI: 00:1f.0 [8086/4d87] enabled
714 20:12:46.289775 PCI: Static device PCI: 00:1f.1 not found, disabling it.
715 20:12:46.289880 RTC Init
716 20:12:46.293562 Set power on after power failure.
717 20:12:46.296833 Disabling Deep S3
718 20:12:46.296921 Disabling Deep S3
719 20:12:46.300084 Disabling Deep S4
720 20:12:46.300165 Disabling Deep S4
721 20:12:46.303280 Disabling Deep S5
722 20:12:46.303372 Disabling Deep S5
723 20:12:46.306517
724 20:12:46.306608 PCI: 00:1f.2 [0000/0000] hidden
725 20:12:46.309677 PCI: 00:1f.3 [8086/0000] bus ops
726 20:12:46.313052 PCI: 00:1f.3 [8086/4dc8] enabled
727 20:12:46.316265 PCI: 00:1f.5 [8086/0000] bus ops
728 20:12:46.319596 PCI: 00:1f.5 [8086/4da4] enabled
729 20:12:46.322891 PCI: Leftover static devices:
730 20:12:46.326148 PCI: 00:12.6
731 20:12:46.326229 PCI: 00:09.0
732 20:12:46.329335 PCI: 00:14.1
733 20:12:46.329412 PCI: 00:16.1
734 20:12:46.329476 PCI: 00:16.4
735 20:12:46.332625 PCI: 00:16.5
736 20:12:46.332702 PCI: 00:17.0
737 20:12:46.336591 PCI: 00:19.1
738 20:12:46.336667 PCI: 00:1e.1
739 20:12:46.336734 PCI: 00:1e.3
740 20:12:46.339568
741 20:12:46.339647 PCI: 00:1f.1
742 20:12:46.339712 PCI: 00:1f.4
743 20:12:46.342994 PCI: 00:1f.7
744 20:12:46.346360 PCI: Check your devicetree.cb.
745 20:12:46.346450 PCI: 00:02.0 scanning...
746 20:12:46.349561 scan_generic_bus for PCI: 00:02.0
747 20:12:46.352638
748 20:12:46.355978 scan_generic_bus for PCI: 00:02.0 done
749 20:12:46.359416 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
750 20:12:46.362749 PCI: 00:04.0 scanning...
751 20:12:46.365912 scan_generic_bus for PCI: 00:04.0
752 20:12:46.369318 GENERIC: 0.0 enabled
753 20:12:46.372501 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
754 20:12:46.379041 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
755 20:12:46.382389 PCI: 00:05.0 scanning...
756 20:12:46.386198 scan_generic_bus for PCI: 00:05.0
757 20:12:46.386282 GENERIC: 0.0 enabled
758 20:12:46.392614 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
759 20:12:46.399052 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
760 20:12:46.399149 PCI: 00:14.0 scanning...
761 20:12:46.402257 scan_static_bus for PCI: 00:14.0
762 20:12:46.406076 USB0 port 0 enabled
763 20:12:46.409261 USB0 port 0 scanning...
764 20:12:46.412587 scan_static_bus for USB0 port 0
765 20:12:46.412676 USB2 port 0 enabled
766 20:12:46.415928 USB2 port 1 enabled
767 20:12:46.419303 USB2 port 2 enabled
768 20:12:46.419389 USB2 port 3 enabled
769 20:12:46.422464 USB2 port 4 disabled
770 20:12:46.425720 USB2 port 5 enabled
771 20:12:46.425807 USB2 port 6 disabled
772 20:12:46.429019 USB2 port 7 enabled
773 20:12:46.429114 USB3 port 0 enabled
774 20:12:46.432284 USB3 port 1 enabled
775 20:12:46.435531 USB3 port 2 enabled
776 20:12:46.435618 USB3 port 3 enabled
777 20:12:46.438877 USB2 port 0 scanning...
778 20:12:46.442249 scan_static_bus for USB2 port 0
779 20:12:46.445399 scan_static_bus for USB2 port 0 done
780 20:12:46.451870 scan_bus: bus USB2 port 0 finished in 6 msecs
781 20:12:46.451966 USB2 port 1 scanning...
782 20:12:46.455214 scan_static_bus for USB2 port 1
783 20:12:46.458483 scan_static_bus for USB2 port 1 done
784 20:12:46.465029 scan_bus: bus USB2 port 1 finished in 6 msecs
785 20:12:46.468245 USB2 port 2 scanning...
786 20:12:46.471443 scan_static_bus for USB2 port 2
787 20:12:46.475367 scan_static_bus for USB2 port 2 done
788 20:12:46.478520 scan_bus: bus USB2 port 2 finished in 6 msecs
789 20:12:46.481698 USB2 port 3 scanning...
790 20:12:46.484923 scan_static_bus for USB2 port 3
791 20:12:46.488098 scan_static_bus for USB2 port 3 done
792 20:12:46.491370 scan_bus: bus USB2 port 3 finished in 6 msecs
793 20:12:46.494753 USB2 port 5 scanning...
794 20:12:46.497841 scan_static_bus for USB2 port 5
795 20:12:46.501104 scan_static_bus for USB2 port 5 done
796 20:12:46.507637 scan_bus: bus USB2 port 5 finished in 6 msecs
797 20:12:46.507728 USB2 port 7 scanning...
798 20:12:46.511421 scan_static_bus for USB2 port 7
799 20:12:46.517772 scan_static_bus for USB2 port 7 done
800 20:12:46.520954 scan_bus: bus USB2 port 7 finished in 6 msecs
801 20:12:46.524402 USB3 port 0 scanning...
802 20:12:46.527730 scan_static_bus for USB3 port 0
803 20:12:46.530950 scan_static_bus for USB3 port 0 done
804 20:12:46.534277 scan_bus: bus USB3 port 0 finished in 6 msecs
805 20:12:46.537620 USB3 port 1 scanning...
806 20:12:46.540875 scan_static_bus for USB3 port 1
807 20:12:46.544183 scan_static_bus for USB3 port 1 done
808 20:12:46.547593 scan_bus: bus USB3 port 1 finished in 6 msecs
809 20:12:46.550769
810 20:12:46.550855 USB3 port 2 scanning...
811 20:12:46.553973 scan_static_bus for USB3 port 2
812 20:12:46.557288 scan_static_bus for USB3 port 2 done
813 20:12:46.563852 scan_bus: bus USB3 port 2 finished in 6 msecs
814 20:12:46.567187 USB3 port 3 scanning...
815 20:12:46.570507 scan_static_bus for USB3 port 3
816 20:12:46.573673 scan_static_bus for USB3 port 3 done
817 20:12:46.576959 scan_bus: bus USB3 port 3 finished in 6 msecs
818 20:12:46.580175 scan_static_bus for USB0 port 0 done
819 20:12:46.586559 scan_bus: bus USB0 port 0 finished in 172 msecs
820 20:12:46.589740 scan_static_bus for PCI: 00:14.0 done
821 20:12:46.593061 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
822 20:12:46.596381 PCI: 00:14.3 scanning...
823 20:12:46.600194 scan_static_bus for PCI: 00:14.3
824 20:12:46.603322 GENERIC: 0.0 enabled
825 20:12:46.606631 scan_static_bus for PCI: 00:14.3 done
826 20:12:46.609904 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
827 20:12:46.613241 PCI: 00:15.0 scanning...
828 20:12:46.616562 scan_static_bus for PCI: 00:15.0
829 20:12:46.619247 I2C: 00:2c enabled
830 20:12:46.619329 I2C: 00:15 enabled
831 20:12:46.625707 scan_static_bus for PCI: 00:15.0 done
832 20:12:46.629002 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
833 20:12:46.632802 PCI: 00:15.1 scanning...
834 20:12:46.636168 scan_static_bus for PCI: 00:15.1
835 20:12:46.639420 scan_static_bus for PCI: 00:15.1 done
836 20:12:46.642798 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
837 20:12:46.646126 PCI: 00:15.2 scanning...
838 20:12:46.649412 scan_static_bus for PCI: 00:15.2
839 20:12:46.652533 GENERIC: 0.0 disabled
840 20:12:46.652617 I2C: 00:15 enabled
841 20:12:46.656351
842 20:12:46.656437 I2C: 00:10 disabled
843 20:12:46.660246 I2C: 00:10 disabled
844 20:12:46.660335 I2C: 00:2c enabled
845 20:12:46.663541 I2C: 00:40 enabled
846 20:12:46.663628 I2C: 00:10 enabled
847 20:12:46.666724 I2C: 00:39 enabled
848 20:12:46.670042 scan_static_bus for PCI: 00:15.2 done
849 20:12:46.673964 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
850 20:12:46.677329 PCI: 00:15.3 scanning...
851 20:12:46.680334 scan_static_bus for PCI: 00:15.3
852 20:12:46.680417 I2C: 00:36 enabled
853 20:12:46.684162
854 20:12:46.684241 I2C: 00:10 disabled
855 20:12:46.687461 I2C: 00:0c enabled
856 20:12:46.687538 I2C: 00:50 enabled
857 20:12:46.690562 scan_static_bus for PCI: 00:15.3 done
858 20:12:46.696946 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
859 20:12:46.700259 PCI: 00:19.0 scanning...
860 20:12:46.703408 scan_static_bus for PCI: 00:19.0
861 20:12:46.703491 I2C: 00:1a enabled
862 20:12:46.707312 I2C: 00:1a disabled
863 20:12:46.710668 I2C: 00:1a disabled
864 20:12:46.710747 I2C: 00:28 enabled
865 20:12:46.713843 I2C: 00:29 enabled
866 20:12:46.716933 scan_static_bus for PCI: 00:19.0 done
867 20:12:46.720237 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
868 20:12:46.723389 PCI: 00:1e.2 scanning...
869 20:12:46.726621 scan_generic_bus for PCI: 00:1e.2
870 20:12:46.730000 SPI: 00 enabled
871 20:12:46.733390 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
872 20:12:46.739801 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
873 20:12:46.743077 PCI: 00:1f.0 scanning...
874 20:12:46.746445 scan_static_bus for PCI: 00:1f.0
875 20:12:46.746533 PNP: 0c09.0 enabled
876 20:12:46.749731 PNP: 0c09.0 scanning...
877 20:12:46.753578 scan_static_bus for PNP: 0c09.0
878 20:12:46.756850 scan_static_bus for PNP: 0c09.0 done
879 20:12:46.763366 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
880 20:12:46.766767 scan_static_bus for PCI: 00:1f.0 done
881 20:12:46.769991 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
882 20:12:46.773256 PCI: 00:1f.3 scanning...
883 20:12:46.776487 scan_static_bus for PCI: 00:1f.3
884 20:12:46.779921 GENERIC: 0.0 disabled
885 20:12:46.782889 scan_static_bus for PCI: 00:1f.3 done
886 20:12:46.786027 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
887 20:12:46.789857 PCI: 00:1f.5 scanning...
888 20:12:46.793121 scan_generic_bus for PCI: 00:1f.5
889 20:12:46.796398 scan_generic_bus for PCI: 00:1f.5 done
890 20:12:46.802792 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
891 20:12:46.806069 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
892 20:12:46.809216 scan_static_bus for Root Device done
893 20:12:46.816301 scan_bus: bus Root Device finished in 664 msecs
894 20:12:46.816387 done
895 20:12:46.822649 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1083 ms
896 20:12:46.825991 Chrome EC: UHEPI supported
897 20:12:46.832446 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
898 20:12:46.835755 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
899 20:12:46.842199 SPI flash protection: WPSW=1 SRP0=1
900 20:12:46.848993 fast_spi_flash_protect: FPR 0 is enabled for range 0x00bca000-0x00bf9fff
901 20:12:46.852361 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
902 20:12:46.858833 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 31 ms
903 20:12:46.862185 found VGA at PCI: 00:02.0
904 20:12:46.865424 Setting up VGA for PCI: 00:02.0
905 20:12:46.868762 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
906 20:12:46.875329 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
907 20:12:46.878598 Allocating resources...
908 20:12:46.878690 Reading resources...
909 20:12:46.885076 Root Device read_resources bus 0 link: 0
910 20:12:46.888281 CPU_CLUSTER: 0 read_resources bus 0 link: 0
911 20:12:46.891539 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
912 20:12:46.898521 DOMAIN: 0000 read_resources bus 0 link: 0
913 20:12:46.901634 PCI: 00:04.0 read_resources bus 1 link: 0
914 20:12:46.908173 PCI: 00:04.0 read_resources bus 1 link: 0 done
915 20:12:46.911518 PCI: 00:05.0 read_resources bus 2 link: 0
916 20:12:46.918450 PCI: 00:05.0 read_resources bus 2 link: 0 done
917 20:12:46.921762 PCI: 00:14.0 read_resources bus 0 link: 0
918 20:12:46.924818 USB0 port 0 read_resources bus 0 link: 0
919 20:12:46.933297 USB0 port 0 read_resources bus 0 link: 0 done
920 20:12:46.936651 PCI: 00:14.0 read_resources bus 0 link: 0 done
921 20:12:46.992310 PCI: 00:14.3 read_resources bus 0 link: 0
922 20:12:46.992662 PCI: 00:14.3 read_resources bus 0 link: 0 done
923 20:12:46.992743 PCI: 00:15.0 read_resources bus 0 link: 0
924 20:12:46.992808 PCI: 00:15.0 read_resources bus 0 link: 0 done
925 20:12:46.992870 PCI: 00:15.2 read_resources bus 0 link: 0
926 20:12:46.993115 PCI: 00:15.2 read_resources bus 0 link: 0 done
927 20:12:46.993189 PCI: 00:15.3 read_resources bus 0 link: 0
928 20:12:46.993286 PCI: 00:15.3 read_resources bus 0 link: 0 done
929 20:12:46.993371 PCI: 00:19.0 read_resources bus 0 link: 0
930 20:12:46.993645 PCI: 00:19.0 read_resources bus 0 link: 0 done
931 20:12:46.993731 PCI: 00:1e.2 read_resources bus 3 link: 0
932 20:12:47.043897 PCI: 00:1e.2 read_resources bus 3 link: 0 done
933 20:12:47.044256 PCI: 00:1f.0 read_resources bus 0 link: 0
934 20:12:47.044338 PCI: 00:1f.0 read_resources bus 0 link: 0 done
935 20:12:47.044415 PCI: 00:1f.3 read_resources bus 0 link: 0
936 20:12:47.044481 PCI: 00:1f.3 read_resources bus 0 link: 0 done
937 20:12:47.044544 DOMAIN: 0000 read_resources bus 0 link: 0 done
938 20:12:47.044611 Root Device read_resources bus 0 link: 0 done
939 20:12:47.044864 Done reading resources.
940 20:12:47.044931 Show resources in subtree (Root Device)...After reading.
941 20:12:47.044992 Root Device child on link 0 CPU_CLUSTER: 0
942 20:12:47.045051 CPU_CLUSTER: 0 child on link 0 APIC: 00
943 20:12:47.045118 APIC: 00
944 20:12:47.045176 APIC: 02
945 20:12:47.068054 DOMAIN: 0000 child on link 0 PCI: 00:00.0
946 20:12:47.068878 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
947 20:12:47.071408 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
948 20:12:47.071497 PCI: 00:00.0
949 20:12:47.078038 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
950 20:12:47.087917 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
951 20:12:47.098007 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
952 20:12:47.108122 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
953 20:12:47.118039 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
954 20:12:47.127816 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
955 20:12:47.134306 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
956 20:12:47.144030 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
957 20:12:47.153897 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
958 20:12:47.163889 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
959 20:12:47.173899 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
960 20:12:47.180611 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
961 20:12:47.190422 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
962 20:12:47.200226 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
963 20:12:47.209859 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
964 20:12:47.220252 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
965 20:12:47.229949 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
966 20:12:47.236702 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
967 20:12:47.239942
968 20:12:47.246036 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
969 20:12:47.249935 PCI: 00:02.0
970 20:12:47.259205 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
971 20:12:47.269127 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
972 20:12:47.279668 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
973 20:12:47.282868 PCI: 00:04.0 child on link 0 GENERIC: 0.0
974 20:12:47.292520 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
975 20:12:47.292663 GENERIC: 0.0
976 20:12:47.299048 PCI: 00:05.0 child on link 0 GENERIC: 0.0
977 20:12:47.309248 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
978 20:12:47.309371 GENERIC: 0.0
979 20:12:47.312480 PCI: 00:08.0
980 20:12:47.322308 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
981 20:12:47.325628 PCI: 00:14.0 child on link 0 USB0 port 0
982 20:12:47.336359 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
983 20:12:47.339689 USB0 port 0 child on link 0 USB2 port 0
984 20:12:47.342951 USB2 port 0
985 20:12:47.343046 USB2 port 1
986 20:12:47.346826 USB2 port 2
987 20:12:47.346913 USB2 port 3
988 20:12:47.350002 USB2 port 4
989 20:12:47.350108 USB2 port 5
990 20:12:47.353212 USB2 port 6
991 20:12:47.353283 USB2 port 7
992 20:12:47.356527 USB3 port 0
993 20:12:47.359916 USB3 port 1
994 20:12:47.359996 USB3 port 2
995 20:12:47.363052 USB3 port 3
996 20:12:47.363137 PCI: 00:14.2
997 20:12:47.366302 PCI: 00:14.3 child on link 0 GENERIC: 0.0
998 20:12:47.376199 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
999 20:12:47.379329 GENERIC: 0.0
1000 20:12:47.379417 PCI: 00:14.5
1001 20:12:47.382602
1002 20:12:47.389734 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1003 20:12:47.392989
1004 20:12:47.395693 PCI: 00:15.0 child on link 0 I2C: 00:2c
1005 20:12:47.405921 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1006 20:12:47.406024 I2C: 00:2c
1007 20:12:47.409124 I2C: 00:15
1008 20:12:47.409218 PCI: 00:15.1
1009 20:12:47.418887 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1010 20:12:47.425341 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1011 20:12:47.435117 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1012 20:12:47.435218 GENERIC: 0.0
1013 20:12:47.439153 I2C: 00:15
1014 20:12:47.439239 I2C: 00:10
1015 20:12:47.442274 I2C: 00:10
1016 20:12:47.442360 I2C: 00:2c
1017 20:12:47.445483 I2C: 00:40
1018 20:12:47.445574 I2C: 00:10
1019 20:12:47.445642 I2C: 00:39
1020 20:12:47.448663
1021 20:12:47.452013 PCI: 00:15.3 child on link 0 I2C: 00:36
1022 20:12:47.461488 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 20:12:47.461593 I2C: 00:36
1024 20:12:47.464732 I2C: 00:10
1025 20:12:47.464819 I2C: 00:0c
1026 20:12:47.468155 I2C: 00:50
1027 20:12:47.468235 PCI: 00:16.0
1028 20:12:47.478010 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1029 20:12:47.481621 PCI: 00:19.0 child on link 0 I2C: 00:1a
1030 20:12:47.484980
1031 20:12:47.491644 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1032 20:12:47.495064
1033 20:12:47.495172 I2C: 00:1a
1034 20:12:47.495243 I2C: 00:1a
1035 20:12:47.498243 I2C: 00:1a
1036 20:12:47.498325 I2C: 00:28
1037 20:12:47.501393 I2C: 00:29
1038 20:12:47.501479 PCI: 00:19.2
1039 20:12:47.514740 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1040 20:12:47.524717 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1041 20:12:47.524815 PCI: 00:1a.0
1042 20:12:47.533854 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1043 20:12:47.537721 PCI: 00:1e.0
1044 20:12:47.540962 PCI: 00:1e.2 child on link 0 SPI: 00
1045 20:12:47.550732 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1046 20:12:47.550827 SPI: 00
1047 20:12:47.557106 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1048 20:12:47.563762 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1049 20:12:47.567141 PNP: 0c09.0
1050 20:12:47.573677 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1051 20:12:47.576967 PCI: 00:1f.2
1052 20:12:47.586684 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1053 20:12:47.597245 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1054 20:12:47.599903 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1055 20:12:47.610393 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1056 20:12:47.620194 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1057 20:12:47.620298 GENERIC: 0.0
1058 20:12:47.623552
1059 20:12:47.623639 PCI: 00:1f.5
1060 20:12:47.633010 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1061 20:12:47.639471 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1062 20:12:47.646594 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1063 20:12:47.652951 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1064 20:12:47.659478 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1065 20:12:47.669106 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1066 20:12:47.675645 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1067 20:12:47.679598 DOMAIN: 0000: Resource ranges:
1068 20:12:47.682227 * Base: 1000, Size: 800, Tag: 100
1069 20:12:47.686042 * Base: 1900, Size: e700, Tag: 100
1070 20:12:47.692673 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1071 20:12:47.699178 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1072 20:12:47.705541 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1073 20:12:47.712182 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1074 20:12:47.718724 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1075 20:12:47.728566 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1076 20:12:47.735129 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1077 20:12:47.741629 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1078 20:12:47.752135 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1079 20:12:47.758528 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1080 20:12:47.765176 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1081 20:12:47.775011 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1082 20:12:47.781479 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1083 20:12:47.788115 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1084 20:12:47.797802 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1085 20:12:47.804407 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1086 20:12:47.811317 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1087 20:12:47.821068 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1088 20:12:47.827474 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1089 20:12:47.833876 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1090 20:12:47.843704 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1091 20:12:47.850334 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1092 20:12:47.857307 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1093 20:12:47.867042 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1094 20:12:47.870477 DOMAIN: 0000: Resource ranges:
1095 20:12:47.873738 * Base: 7fc00000, Size: 40400000, Tag: 200
1096 20:12:47.877028 * Base: d0000000, Size: 2b000000, Tag: 200
1097 20:12:47.883418 * Base: fb001000, Size: 2fff000, Tag: 200
1098 20:12:47.886761 * Base: fe010000, Size: 22000, Tag: 200
1099 20:12:47.889999 * Base: fe033000, Size: a4d000, Tag: 200
1100 20:12:47.893333 * Base: fea88000, Size: 2f8000, Tag: 200
1101 20:12:47.899871 * Base: fed88000, Size: 8000, Tag: 200
1102 20:12:47.903263 * Base: fed93000, Size: d000, Tag: 200
1103 20:12:47.906542 * Base: feda2000, Size: 125e000, Tag: 200
1104 20:12:47.913861 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1105 20:12:47.917055 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1106 20:12:47.923568 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1107 20:12:47.930170 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1108 20:12:47.937344 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1109 20:12:47.943686 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1110 20:12:47.950198 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1111 20:12:47.956744 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1112 20:12:47.963191 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1113 20:12:47.970165 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1114 20:12:47.976802 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1115 20:12:47.983316 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1116 20:12:47.990030 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1117 20:12:47.996040 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1118 20:12:48.002705 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1119 20:12:48.009339 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1120 20:12:48.015877 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1121 20:12:48.022452 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1122 20:12:48.029382 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1123 20:12:48.036019 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1124 20:12:48.042382 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1125 20:12:48.052301 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1126 20:12:48.058745 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1127 20:12:48.062060 Root Device assign_resources, bus 0 link: 0
1128 20:12:48.069069 DOMAIN: 0000 assign_resources, bus 0 link: 0
1129 20:12:48.075603 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1130 20:12:48.085412 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1131 20:12:48.092048 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1132 20:12:48.098485 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1133 20:12:48.105033 PCI: 00:04.0 assign_resources, bus 1 link: 0
1134 20:12:48.108315 PCI: 00:04.0 assign_resources, bus 1 link: 0
1135 20:12:48.118166 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1136 20:12:48.121848 PCI: 00:05.0 assign_resources, bus 2 link: 0
1137 20:12:48.125147 PCI: 00:05.0 assign_resources, bus 2 link: 0
1138 20:12:48.135222 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1139 20:12:48.141647 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1140 20:12:48.148175 PCI: 00:14.0 assign_resources, bus 0 link: 0
1141 20:12:48.151366 PCI: 00:14.0 assign_resources, bus 0 link: 0
1142 20:12:48.161386 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1143 20:12:48.164558 PCI: 00:14.3 assign_resources, bus 0 link: 0
1144 20:12:48.167868 PCI: 00:14.3 assign_resources, bus 0 link: 0
1145 20:12:48.177890 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1146 20:12:48.184564 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1147 20:12:48.191020 PCI: 00:15.0 assign_resources, bus 0 link: 0
1148 20:12:48.194391 PCI: 00:15.0 assign_resources, bus 0 link: 0
1149 20:12:48.200732 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1150 20:12:48.211409 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1151 20:12:48.214562 PCI: 00:15.2 assign_resources, bus 0 link: 0
1152 20:12:48.220863 PCI: 00:15.2 assign_resources, bus 0 link: 0
1153 20:12:48.227449 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1154 20:12:48.230572 PCI: 00:15.3 assign_resources, bus 0 link: 0
1155 20:12:48.237568 PCI: 00:15.3 assign_resources, bus 0 link: 0
1156 20:12:48.244047 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1157 20:12:48.254444 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1158 20:12:48.257035 PCI: 00:19.0 assign_resources, bus 0 link: 0
1159 20:12:48.264241 PCI: 00:19.0 assign_resources, bus 0 link: 0
1160 20:12:48.270311 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1161 20:12:48.277136 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1162 20:12:48.287087 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1163 20:12:48.290389 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1164 20:12:48.297015 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1165 20:12:48.300220 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1166 20:12:48.306929 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1167 20:12:48.310417 LPC: Trying to open IO window from 800 size 1ff
1168 20:12:48.316910 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1169 20:12:48.320238
1170 20:12:48.326874 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1171 20:12:48.330073 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1172 20:12:48.336348 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1173 20:12:48.343407 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1174 20:12:48.346644 DOMAIN: 0000 assign_resources, bus 0 link: 0
1175 20:12:48.349889
1176 20:12:48.352905 Root Device assign_resources, bus 0 link: 0
1177 20:12:48.356238 Done setting resources.
1178 20:12:48.362754 Show resources in subtree (Root Device)...After assigning values.
1179 20:12:48.366305 Root Device child on link 0 CPU_CLUSTER: 0
1180 20:12:48.369331 CPU_CLUSTER: 0 child on link 0 APIC: 00
1181 20:12:48.372573 APIC: 00
1182 20:12:48.372661 APIC: 02
1183 20:12:48.376087 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1184 20:12:48.386104 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1185 20:12:48.395813 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1186 20:12:48.398917 PCI: 00:00.0
1187 20:12:48.405630 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1188 20:12:48.415515 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1189 20:12:48.425406 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1190 20:12:48.435188 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1191 20:12:48.445365 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1192 20:12:48.455059 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1193 20:12:48.461655 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1194 20:12:48.471620 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1195 20:12:48.481483 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1196 20:12:48.491414 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1197 20:12:48.501143 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1198 20:12:48.511068 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1199 20:12:48.517642 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1200 20:12:48.527544 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1201 20:12:48.537676 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1202 20:12:48.547263 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1203 20:12:48.557186 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1204 20:12:48.567520 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1205 20:12:48.574063 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1206 20:12:48.577423 PCI: 00:02.0
1207 20:12:48.587393 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1208 20:12:48.597111 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1209 20:12:48.607158 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1210 20:12:48.610439 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1211 20:12:48.623277 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1212 20:12:48.623387 GENERIC: 0.0
1213 20:12:48.626714 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1214 20:12:48.639666 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1215 20:12:48.639807 GENERIC: 0.0
1216 20:12:48.642851 PCI: 00:08.0
1217 20:12:48.653086 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1218 20:12:48.656168 PCI: 00:14.0 child on link 0 USB0 port 0
1219 20:12:48.665925 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1220 20:12:48.672993 USB0 port 0 child on link 0 USB2 port 0
1221 20:12:48.673093 USB2 port 0
1222 20:12:48.676357 USB2 port 1
1223 20:12:48.676446 USB2 port 2
1224 20:12:48.679627 USB2 port 3
1225 20:12:48.679715 USB2 port 4
1226 20:12:48.683134 USB2 port 5
1227 20:12:48.683223 USB2 port 6
1228 20:12:48.686256 USB2 port 7
1229 20:12:48.686346 USB3 port 0
1230 20:12:48.689604 USB3 port 1
1231 20:12:48.689695 USB3 port 2
1232 20:12:48.692855 USB3 port 3
1233 20:12:48.692956 PCI: 00:14.2
1234 20:12:48.699659 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1235 20:12:48.709577 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1236 20:12:48.709715 GENERIC: 0.0
1237 20:12:48.712659 PCI: 00:14.5
1238 20:12:48.722449 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1239 20:12:48.725758 PCI: 00:15.0 child on link 0 I2C: 00:2c
1240 20:12:48.735329 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1241 20:12:48.738563 I2C: 00:2c
1242 20:12:48.738674 I2C: 00:15
1243 20:12:48.742440 PCI: 00:15.1
1244 20:12:48.752025 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1245 20:12:48.755130 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1246 20:12:48.765047 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1247 20:12:48.768461
1248 20:12:48.768569 GENERIC: 0.0
1249 20:12:48.768637 I2C: 00:15
1250 20:12:48.771659
1251 20:12:48.771748 I2C: 00:10
1252 20:12:48.771815 I2C: 00:10
1253 20:12:48.775052 I2C: 00:2c
1254 20:12:48.775144 I2C: 00:40
1255 20:12:48.778868 I2C: 00:10
1256 20:12:48.778971 I2C: 00:39
1257 20:12:48.785410 PCI: 00:15.3 child on link 0 I2C: 00:36
1258 20:12:48.795145 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1259 20:12:48.795290 I2C: 00:36
1260 20:12:48.798330 I2C: 00:10
1261 20:12:48.798436 I2C: 00:0c
1262 20:12:48.801580 I2C: 00:50
1263 20:12:48.801673 PCI: 00:16.0
1264 20:12:48.811410 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1265 20:12:48.818166 PCI: 00:19.0 child on link 0 I2C: 00:1a
1266 20:12:48.827787 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1267 20:12:48.827908 I2C: 00:1a
1268 20:12:48.831534 I2C: 00:1a
1269 20:12:48.831625 I2C: 00:1a
1270 20:12:48.834606 I2C: 00:28
1271 20:12:48.834698 I2C: 00:29
1272 20:12:48.834766 PCI: 00:19.2
1273 20:12:48.837734
1274 20:12:48.848125 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1275 20:12:48.857795 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1276 20:12:48.857917 PCI: 00:1a.0
1277 20:12:48.871129 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1278 20:12:48.871275 PCI: 00:1e.0
1279 20:12:48.874467 PCI: 00:1e.2 child on link 0 SPI: 00
1280 20:12:48.884503 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1281 20:12:48.887283 SPI: 00
1282 20:12:48.890709 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1283 20:12:48.900636 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1284 20:12:48.900753 PNP: 0c09.0
1285 20:12:48.910468 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1286 20:12:48.910580 PCI: 00:1f.2
1287 20:12:48.920790 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1288 20:12:48.930563 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1289 20:12:48.933720 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1290 20:12:48.943383 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1291 20:12:48.956986 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1292 20:12:48.957140 GENERIC: 0.0
1293 20:12:48.960309 PCI: 00:1f.5
1294 20:12:48.969815 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1295 20:12:48.973110 Done allocating resources.
1296 20:12:48.976351 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2093 ms
1297 20:12:48.980211 Enabling resources...
1298 20:12:48.983538 PCI: 00:00.0 subsystem <- 8086/4e22
1299 20:12:48.986760 PCI: 00:00.0 cmd <- 06
1300 20:12:48.990078 PCI: 00:02.0 subsystem <- 8086/4e55
1301 20:12:48.993425 PCI: 00:02.0 cmd <- 03
1302 20:12:48.996595 PCI: 00:04.0 subsystem <- 8086/4e03
1303 20:12:48.999893 PCI: 00:04.0 cmd <- 02
1304 20:12:49.003156 PCI: 00:05.0 bridge ctrl <- 0003
1305 20:12:49.006960 PCI: 00:05.0 subsystem <- 8086/4e19
1306 20:12:49.010294 PCI: 00:05.0 cmd <- 02
1307 20:12:49.010412 PCI: 00:08.0 cmd <- 06
1308 20:12:49.016656 PCI: 00:14.0 subsystem <- 8086/4ded
1309 20:12:49.016788 PCI: 00:14.0 cmd <- 02
1310 20:12:49.019911 PCI: 00:14.3 subsystem <- 8086/4df0
1311 20:12:49.023229 PCI: 00:14.3 cmd <- 02
1312 20:12:49.026385 PCI: 00:14.5 subsystem <- 8086/4df8
1313 20:12:49.029778 PCI: 00:14.5 cmd <- 06
1314 20:12:49.032898 PCI: 00:15.0 subsystem <- 8086/4de8
1315 20:12:49.036224 PCI: 00:15.0 cmd <- 02
1316 20:12:49.039480 PCI: 00:15.1 subsystem <- 8086/4de9
1317 20:12:49.042691 PCI: 00:15.1 cmd <- 02
1318 20:12:49.046590 PCI: 00:15.2 subsystem <- 8086/4dea
1319 20:12:49.046690 PCI: 00:15.2 cmd <- 02
1320 20:12:49.049823
1321 20:12:49.052895 PCI: 00:15.3 subsystem <- 8086/4deb
1322 20:12:49.052991 PCI: 00:15.3 cmd <- 02
1323 20:12:49.056113 PCI: 00:16.0 subsystem <- 8086/4de0
1324 20:12:49.059280
1325 20:12:49.059378 PCI: 00:16.0 cmd <- 02
1326 20:12:49.062658 PCI: 00:19.0 subsystem <- 8086/4dc5
1327 20:12:49.065797 PCI: 00:19.0 cmd <- 02
1328 20:12:49.069165 PCI: 00:19.2 subsystem <- 8086/4dc7
1329 20:12:49.072499 PCI: 00:19.2 cmd <- 06
1330 20:12:49.075714 PCI: 00:1a.0 subsystem <- 8086/4dc4
1331 20:12:49.078987 PCI: 00:1a.0 cmd <- 06
1332 20:12:49.082778 PCI: 00:1e.2 subsystem <- 8086/4daa
1333 20:12:49.086055 PCI: 00:1e.2 cmd <- 06
1334 20:12:49.089189 PCI: 00:1f.0 subsystem <- 8086/4d87
1335 20:12:49.089278 PCI: 00:1f.0 cmd <- 407
1336 20:12:49.092518
1337 20:12:49.095828 PCI: 00:1f.3 subsystem <- 8086/4dc8
1338 20:12:49.095916 PCI: 00:1f.3 cmd <- 02
1339 20:12:49.099265 PCI: 00:1f.5 subsystem <- 8086/4da4
1340 20:12:49.102565
1341 20:12:49.102654 PCI: 00:1f.5 cmd <- 406
1342 20:12:49.107131 done.
1343 20:12:49.110491 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1344 20:12:49.113711 Initializing devices...
1345 20:12:49.117082 Root Device init
1346 20:12:49.117170 mainboard: EC init
1347 20:12:49.123656 Chrome EC: Set SMI mask to 0x0000000000000000
1348 20:12:49.130278 Chrome EC: clear events_b mask to 0x0000000000000000
1349 20:12:49.133522 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1350 20:12:49.140693 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1351 20:12:49.147219 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1352 20:12:49.150507 Chrome EC: Set WAKE mask to 0x0000000000000000
1353 20:12:49.157579 Root Device init finished in 36 msecs
1354 20:12:49.161338 PCI: 00:00.0 init
1355 20:12:49.161477 CPU TDP = 6 Watts
1356 20:12:49.164609 CPU PL1 = 7 Watts
1357 20:12:49.167729 CPU PL2 = 12 Watts
1358 20:12:49.170761 PCI: 00:00.0 init finished in 6 msecs
1359 20:12:49.170888 PCI: 00:02.0 init
1360 20:12:49.174041 GMA: Found VBT in CBFS
1361 20:12:49.177296 GMA: Found valid VBT in CBFS
1362 20:12:49.183898 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1363 20:12:49.190448 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1364 20:12:49.193705 PCI: 00:02.0 init finished in 18 msecs
1365 20:12:49.197196 PCI: 00:08.0 init
1366 20:12:49.200448 PCI: 00:08.0 init finished in 0 msecs
1367 20:12:49.203786 PCI: 00:14.0 init
1368 20:12:49.207148 XHCI: Updated LFPS sampling OFF time to 9 ms
1369 20:12:49.210372 PCI: 00:14.0 init finished in 4 msecs
1370 20:12:49.213659 PCI: 00:15.0 init
1371 20:12:49.217057 I2C bus 0 version 0x3230302a
1372 20:12:49.220429 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1373 20:12:49.224164 PCI: 00:15.0 init finished in 6 msecs
1374 20:12:49.227501 PCI: 00:15.1 init
1375 20:12:49.230683 I2C bus 1 version 0x3230302a
1376 20:12:49.234144 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1377 20:12:49.237414 PCI: 00:15.1 init finished in 6 msecs
1378 20:12:49.240178 PCI: 00:15.2 init
1379 20:12:49.240275 I2C bus 2 version 0x3230302a
1380 20:12:49.246788 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1381 20:12:49.250551 PCI: 00:15.2 init finished in 6 msecs
1382 20:12:49.250656 PCI: 00:15.3 init
1383 20:12:49.253756 I2C bus 3 version 0x3230302a
1384 20:12:49.257020 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1385 20:12:49.263629 PCI: 00:15.3 init finished in 6 msecs
1386 20:12:49.263731 PCI: 00:16.0 init
1387 20:12:49.266939 PCI: 00:16.0 init finished in 0 msecs
1388 20:12:49.270184 PCI: 00:19.0 init
1389 20:12:49.273433 I2C bus 4 version 0x3230302a
1390 20:12:49.276699 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1391 20:12:49.280131 PCI: 00:19.0 init finished in 6 msecs
1392 20:12:49.283500 PCI: 00:1a.0 init
1393 20:12:49.286911 PCI: 00:1a.0 init finished in 0 msecs
1394 20:12:49.290294 PCI: 00:1f.0 init
1395 20:12:49.293609 IOAPIC: Initializing IOAPIC at 0xfec00000
1396 20:12:49.296985 IOAPIC: Bootstrap Processor Local APIC = 0x00
1397 20:12:49.299742 IOAPIC: ID = 0x02
1398 20:12:49.303033 IOAPIC: Dumping registers
1399 20:12:49.303125 reg 0x0000: 0x02000000
1400 20:12:49.306220 reg 0x0001: 0x00770020
1401 20:12:49.309624 reg 0x0002: 0x00000000
1402 20:12:49.313487 PCI: 00:1f.0 init finished in 21 msecs
1403 20:12:49.316250 PCI: 00:1f.2 init
1404 20:12:49.320105 Disabling ACPI via APMC.
1405 20:12:49.320183 APMC done.
1406 20:12:49.323429
1407 20:12:49.326694 PCI: 00:1f.2 init finished in 5 msecs
1408 20:12:49.336742 PNP: 0c09.0 init
1409 20:12:49.340039 Google Chrome EC uptime: 6.546 seconds
1410 20:12:49.346482 Google Chrome AP resets since EC boot: 0
1411 20:12:49.349738 Google Chrome most recent AP reset causes:
1412 20:12:49.356337 Google Chrome EC reset flags at last EC boot: reset-pin
1413 20:12:49.359545 PNP: 0c09.0 init finished in 18 msecs
1414 20:12:49.359652 Devices initialized
1415 20:12:49.363447 Show all devs... After init.
1416 20:12:49.366614 Root Device: enabled 1
1417 20:12:49.369984 CPU_CLUSTER: 0: enabled 1
1418 20:12:49.373166 DOMAIN: 0000: enabled 1
1419 20:12:49.373253 PCI: 00:00.0: enabled 1
1420 20:12:49.376304 PCI: 00:02.0: enabled 1
1421 20:12:49.379478 PCI: 00:04.0: enabled 1
1422 20:12:49.379588 PCI: 00:05.0: enabled 1
1423 20:12:49.382993 PCI: 00:09.0: enabled 0
1424 20:12:49.386352 PCI: 00:12.6: enabled 0
1425 20:12:49.389687 PCI: 00:14.0: enabled 1
1426 20:12:49.389796 PCI: 00:14.1: enabled 0
1427 20:12:49.392492 PCI: 00:14.2: enabled 0
1428 20:12:49.396377 PCI: 00:14.3: enabled 1
1429 20:12:49.399011 PCI: 00:14.5: enabled 1
1430 20:12:49.399120 PCI: 00:15.0: enabled 1
1431 20:12:49.402836 PCI: 00:15.1: enabled 1
1432 20:12:49.406270 PCI: 00:15.2: enabled 1
1433 20:12:49.409538 PCI: 00:15.3: enabled 1
1434 20:12:49.409629 PCI: 00:16.0: enabled 1
1435 20:12:49.412901 PCI: 00:16.1: enabled 0
1436 20:12:49.415666 PCI: 00:16.4: enabled 0
1437 20:12:49.415745 PCI: 00:16.5: enabled 0
1438 20:12:49.419140
1439 20:12:49.419234 PCI: 00:17.0: enabled 0
1440 20:12:49.422688 PCI: 00:19.0: enabled 1
1441 20:12:49.425983 PCI: 00:19.1: enabled 0
1442 20:12:49.426081 PCI: 00:19.2: enabled 1
1443 20:12:49.429432 PCI: 00:1a.0: enabled 1
1444 20:12:49.432631 PCI: 00:1c.0: enabled 0
1445 20:12:49.435969 PCI: 00:1c.1: enabled 0
1446 20:12:49.436047 PCI: 00:1c.2: enabled 0
1447 20:12:49.439325 PCI: 00:1c.3: enabled 0
1448 20:12:49.442660 PCI: 00:1c.4: enabled 0
1449 20:12:49.445811 PCI: 00:1c.5: enabled 0
1450 20:12:49.445889 PCI: 00:1c.6: enabled 0
1451 20:12:49.449068 PCI: 00:1c.7: enabled 1
1452 20:12:49.452258 PCI: 00:1e.0: enabled 0
1453 20:12:49.452348 PCI: 00:1e.1: enabled 0
1454 20:12:49.455442
1455 20:12:49.455533 PCI: 00:1e.2: enabled 1
1456 20:12:49.459176 PCI: 00:1e.3: enabled 0
1457 20:12:49.462518 PCI: 00:1f.0: enabled 1
1458 20:12:49.462599 PCI: 00:1f.1: enabled 0
1459 20:12:49.465218 PCI: 00:1f.2: enabled 1
1460 20:12:49.469118 PCI: 00:1f.3: enabled 1
1461 20:12:49.471767 PCI: 00:1f.4: enabled 0
1462 20:12:49.471843 PCI: 00:1f.5: enabled 1
1463 20:12:49.475533 PCI: 00:1f.7: enabled 0
1464 20:12:49.478802 GENERIC: 0.0: enabled 1
1465 20:12:49.482042 GENERIC: 0.0: enabled 1
1466 20:12:49.482141 USB0 port 0: enabled 1
1467 20:12:49.485375 GENERIC: 0.0: enabled 1
1468 20:12:49.488686 I2C: 00:2c: enabled 1
1469 20:12:49.488794 I2C: 00:15: enabled 1
1470 20:12:49.491894 GENERIC: 0.0: enabled 0
1471 20:12:49.495177 I2C: 00:15: enabled 1
1472 20:12:49.495260 I2C: 00:10: enabled 0
1473 20:12:49.498461
1474 20:12:49.498567 I2C: 00:10: enabled 0
1475 20:12:49.501681 I2C: 00:2c: enabled 1
1476 20:12:49.505060 I2C: 00:40: enabled 1
1477 20:12:49.505140 I2C: 00:10: enabled 1
1478 20:12:49.508392 I2C: 00:39: enabled 1
1479 20:12:49.511739 I2C: 00:36: enabled 1
1480 20:12:49.511829 I2C: 00:10: enabled 0
1481 20:12:49.515064 I2C: 00:0c: enabled 1
1482 20:12:49.518433 I2C: 00:50: enabled 1
1483 20:12:49.518514 I2C: 00:1a: enabled 1
1484 20:12:49.521693 I2C: 00:1a: enabled 0
1485 20:12:49.524783 I2C: 00:1a: enabled 0
1486 20:12:49.524879 I2C: 00:28: enabled 1
1487 20:12:49.528029 I2C: 00:29: enabled 1
1488 20:12:49.531305 PCI: 00:00.0: enabled 1
1489 20:12:49.531382 SPI: 00: enabled 1
1490 20:12:49.534604 PNP: 0c09.0: enabled 1
1491 20:12:49.537864 GENERIC: 0.0: enabled 0
1492 20:12:49.537958 USB2 port 0: enabled 1
1493 20:12:49.541203 USB2 port 1: enabled 1
1494 20:12:49.544512 USB2 port 2: enabled 1
1495 20:12:49.547640 USB2 port 3: enabled 1
1496 20:12:49.547724 USB2 port 4: enabled 0
1497 20:12:49.550995 USB2 port 5: enabled 1
1498 20:12:49.554156 USB2 port 6: enabled 0
1499 20:12:49.554302 USB2 port 7: enabled 1
1500 20:12:49.558084 USB3 port 0: enabled 1
1501 20:12:49.561220 USB3 port 1: enabled 1
1502 20:12:49.564540 USB3 port 2: enabled 1
1503 20:12:49.564629 USB3 port 3: enabled 1
1504 20:12:49.567740 APIC: 00: enabled 1
1505 20:12:49.567829 APIC: 02: enabled 1
1506 20:12:49.571023 PCI: 00:08.0: enabled 1
1507 20:12:49.577480 BS: BS_DEV_INIT run times (exec / console): 24 / 436 ms
1508 20:12:49.580569 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1509 20:12:49.583936 ELOG: NV offset 0xbfa000 size 0x1000
1510 20:12:49.592257 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1511 20:12:49.598907 ELOG: Event(17) added with size 13 at 2023-01-18 20:12:46 UTC
1512 20:12:49.605788 ELOG: Event(92) added with size 9 at 2023-01-18 20:12:46 UTC
1513 20:12:49.611795 ELOG: Event(93) added with size 9 at 2023-01-18 20:12:46 UTC
1514 20:12:49.618431 ELOG: Event(9E) added with size 10 at 2023-01-18 20:12:46 UTC
1515 20:12:49.624847 ELOG: Event(9F) added with size 14 at 2023-01-18 20:12:46 UTC
1516 20:12:49.631980 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1517 20:12:49.635288 ELOG: Event(A1) added with size 10 at 2023-01-18 20:12:46 UTC
1518 20:12:49.645038 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1519 20:12:49.651587 ELOG: Event(A0) added with size 9 at 2023-01-18 20:12:46 UTC
1520 20:12:49.654736 elog_add_boot_reason: Logged dev mode boot
1521 20:12:49.661359 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1522 20:12:49.661472 Finalize devices...
1523 20:12:49.664511 Devices finalized
1524 20:12:49.671656 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1525 20:12:49.674960 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1526 20:12:49.681218 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1527 20:12:49.684430 ME: HFSTS1 : 0x80030045
1528 20:12:49.687670 ME: HFSTS2 : 0x30280136
1529 20:12:49.694325 ME: HFSTS3 : 0x00000050
1530 20:12:49.698071 ME: HFSTS4 : 0x00004000
1531 20:12:49.701379 ME: HFSTS5 : 0x00000000
1532 20:12:49.704664 ME: HFSTS6 : 0x40400006
1533 20:12:49.708158 ME: Manufacturing Mode : NO
1534 20:12:49.711149 ME: FW Partition Table : OK
1535 20:12:49.714422 ME: Bringup Loader Failure : NO
1536 20:12:49.717697 ME: Firmware Init Complete : NO
1537 20:12:49.720970 ME: Boot Options Present : NO
1538 20:12:49.724291 ME: Update In Progress : NO
1539 20:12:49.727428 ME: D0i3 Support : YES
1540 20:12:49.730637 ME: Low Power State Enabled : NO
1541 20:12:49.733854 ME: CPU Replaced : YES
1542 20:12:49.737038 ME: CPU Replacement Valid : YES
1543 20:12:49.740848 ME: Current Working State : 5
1544 20:12:49.744026 ME: Current Operation State : 1
1545 20:12:49.747306 ME: Current Operation Mode : 3
1546 20:12:49.750375 ME: Error Code : 0
1547 20:12:49.753652 ME: CPU Debug Disabled : YES
1548 20:12:49.756968 ME: TXT Support : NO
1549 20:12:49.763935 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1550 20:12:49.770366 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1551 20:12:49.773552 ACPI: Writing ACPI tables at 76b27000.
1552 20:12:49.776851 ACPI: * FACS
1553 20:12:49.776945 ACPI: * DSDT
1554 20:12:49.780030 Ramoops buffer: 0x100000@0x76a26000.
1555 20:12:49.787012 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1556 20:12:49.790192 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1557 20:12:49.793557 Google Chrome EC: version:
1558 20:12:49.796796 ro: magolor_1.1.9999-103b6f9
1559 20:12:49.800112 rw: magolor_1.1.9999-103b6f9
1560 20:12:49.800189 running image: 1
1561 20:12:49.803427
1562 20:12:49.806646 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1563 20:12:49.811298 ACPI: * FADT
1564 20:12:49.811388 SCI is IRQ9
1565 20:12:49.814706 ACPI: added table 1/32, length now 40
1566 20:12:49.817930
1567 20:12:49.818018 ACPI: * SSDT
1568 20:12:49.821249 Found 1 CPU(s) with 2 core(s) each.
1569 20:12:49.824544 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1570 20:12:49.831002 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1571 20:12:49.834296 Could not locate 'wifi_sar' in VPD.
1572 20:12:49.837492 Checking CBFS for default SAR values
1573 20:12:49.844614 wifi_sar_defaults.hex has bad len in CBFS
1574 20:12:49.847383 failed from getting SAR limits!
1575 20:12:49.851239 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1576 20:12:49.857678 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1577 20:12:49.860862 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1578 20:12:49.867428 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1579 20:12:49.870621 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1580 20:12:49.877653 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1581 20:12:49.880919 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1582 20:12:49.887370 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1583 20:12:49.893939 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1584 20:12:49.900515 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1585 20:12:49.903816 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1586 20:12:49.910324 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1587 20:12:49.917509 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1588 20:12:49.920170 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1589 20:12:49.923530 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1590 20:12:49.931435 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1591 20:12:49.934630 PS2K: Passing 101 keymaps to kernel
1592 20:12:49.941266 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1593 20:12:49.948359 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1594 20:12:49.951470 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1595 20:12:49.957834 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1596 20:12:49.961111 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1597 20:12:49.968100 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1598 20:12:49.974512 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1599 20:12:49.977611 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1600 20:12:49.980987
1601 20:12:49.984226 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1602 20:12:49.991241 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1603 20:12:49.994474 ACPI: added table 2/32, length now 44
1604 20:12:49.997741 ACPI: * MCFG
1605 20:12:50.001086 ACPI: added table 3/32, length now 48
1606 20:12:50.001164 ACPI: * TPM2
1607 20:12:50.004356 TPM2 log created at 0x76a16000
1608 20:12:50.007523 ACPI: added table 4/32, length now 52
1609 20:12:50.010809 ACPI: * MADT
1610 20:12:50.010888 SCI is IRQ9
1611 20:12:50.014236 ACPI: added table 5/32, length now 56
1612 20:12:50.017589 current = 76b2d580
1613 20:12:50.021002 ACPI: * DMAR
1614 20:12:50.023666 ACPI: added table 6/32, length now 60
1615 20:12:50.026984 ACPI: added table 7/32, length now 64
1616 20:12:50.027065 ACPI: * HPET
1617 20:12:50.033432 ACPI: added table 8/32, length now 68
1618 20:12:50.033526 ACPI: done.
1619 20:12:50.036729 ACPI tables: 26304 bytes.
1620 20:12:50.040573 smbios_write_tables: 76a15000
1621 20:12:50.043886 EC returned error result code 3
1622 20:12:50.047272 Couldn't obtain OEM name from CBI
1623 20:12:50.050513 Create SMBIOS type 16
1624 20:12:50.050605 Create SMBIOS type 17
1625 20:12:50.053684 GENERIC: 0.0 (WIFI Device)
1626 20:12:50.056991 SMBIOS tables: 913 bytes.
1627 20:12:50.060151 Writing table forward entry at 0x00000500
1628 20:12:50.066724 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1629 20:12:50.069874 Writing coreboot table at 0x76b4b000
1630 20:12:50.077167 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1631 20:12:50.080294 1. 0000000000001000-000000000009ffff: RAM
1632 20:12:50.086680 2. 00000000000a0000-00000000000fffff: RESERVED
1633 20:12:50.089762 3. 0000000000100000-0000000076a14fff: RAM
1634 20:12:50.096318 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1635 20:12:50.099555 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1636 20:12:50.106250 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1637 20:12:50.112774 7. 0000000077000000-000000007fbfffff: RESERVED
1638 20:12:50.116157 8. 00000000c0000000-00000000cfffffff: RESERVED
1639 20:12:50.119440 9. 00000000fb000000-00000000fb000fff: RESERVED
1640 20:12:50.125972 10. 00000000fe000000-00000000fe00ffff: RESERVED
1641 20:12:50.129241 11. 00000000fea80000-00000000fea87fff: RESERVED
1642 20:12:50.136342 12. 00000000fed80000-00000000fed87fff: RESERVED
1643 20:12:50.139577 13. 00000000fed90000-00000000fed92fff: RESERVED
1644 20:12:50.145981 14. 00000000feda0000-00000000feda1fff: RESERVED
1645 20:12:50.149185 15. 0000000100000000-00000001803fffff: RAM
1646 20:12:50.152495 Passing 4 GPIOs to payload:
1647 20:12:50.155639 NAME | PORT | POLARITY | VALUE
1648 20:12:50.162168 lid | undefined | high | high
1649 20:12:50.168590 power | undefined | high | low
1650 20:12:50.172483 oprom | undefined | high | low
1651 20:12:50.178888 EC in RW | 0x000000b9 | high | low
1652 20:12:50.185224 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 28f0
1653 20:12:50.188517 coreboot table: 1504 bytes.
1654 20:12:50.191606 IMD ROOT 0. 0x76fff000 0x00001000
1655 20:12:50.194975 IMD SMALL 1. 0x76ffe000 0x00001000
1656 20:12:50.198262 FSP MEMORY 2. 0x76c4e000 0x003b0000
1657 20:12:50.201455 CONSOLE 3. 0x76c2e000 0x00020000
1658 20:12:50.204787 FMAP 4. 0x76c2d000 0x00000578
1659 20:12:50.208704 TIME STAMP 5. 0x76c2c000 0x00000910
1660 20:12:50.212105 VBOOT WORK 6. 0x76c18000 0x00014000
1661 20:12:50.218062 ROMSTG STCK 7. 0x76c17000 0x00001000
1662 20:12:50.221430 AFTER CAR 8. 0x76c0d000 0x0000a000
1663 20:12:50.225349 RAMSTAGE 9. 0x76ba7000 0x00066000
1664 20:12:50.228596 REFCODE 10. 0x76b67000 0x00040000
1665 20:12:50.231885 SMM BACKUP 11. 0x76b57000 0x00010000
1666 20:12:50.235213 4f444749 12. 0x76b55000 0x00002000
1667 20:12:50.238378 EXT VBT13. 0x76b53000 0x00001c43
1668 20:12:50.241632 COREBOOT 14. 0x76b4b000 0x00008000
1669 20:12:50.244871 ACPI 15. 0x76b27000 0x00024000
1670 20:12:50.251769 ACPI GNVS 16. 0x76b26000 0x00001000
1671 20:12:50.255072 RAMOOPS 17. 0x76a26000 0x00100000
1672 20:12:50.258355 TPM2 TCGLOG18. 0x76a16000 0x00010000
1673 20:12:50.261690 SMBIOS 19. 0x76a15000 0x00000800
1674 20:12:50.261802 IMD small region:
1675 20:12:50.268258 IMD ROOT 0. 0x76ffec00 0x00000400
1676 20:12:50.271514 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1677 20:12:50.274743 VPD 2. 0x76ffeb80 0x0000004c
1678 20:12:50.277999 POWER STATE 3. 0x76ffeb40 0x00000040
1679 20:12:50.281196 ROMSTAGE 4. 0x76ffeb20 0x00000004
1680 20:12:50.284319 MEM INFO 5. 0x76ffe940 0x000001e0
1681 20:12:50.287662
1682 20:12:50.291524 BS: BS_WRITE_TABLES run times (exec / console): 6 / 516 ms
1683 20:12:50.294647 MTRR: Physical address space:
1684 20:12:50.301212 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1685 20:12:50.307540 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1686 20:12:50.314248 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1687 20:12:50.320968 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1688 20:12:50.327505 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1689 20:12:50.330712 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1690 20:12:50.337761 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1691 20:12:50.344130 MTRR: Fixed MSR 0x250 0x0606060606060606
1692 20:12:50.347325 MTRR: Fixed MSR 0x258 0x0606060606060606
1693 20:12:50.350590 MTRR: Fixed MSR 0x259 0x0000000000000000
1694 20:12:50.353831 MTRR: Fixed MSR 0x268 0x0606060606060606
1695 20:12:50.360278 MTRR: Fixed MSR 0x269 0x0606060606060606
1696 20:12:50.363573 MTRR: Fixed MSR 0x26a 0x0606060606060606
1697 20:12:50.366926 MTRR: Fixed MSR 0x26b 0x0606060606060606
1698 20:12:50.370587 MTRR: Fixed MSR 0x26c 0x0606060606060606
1699 20:12:50.373884 MTRR: Fixed MSR 0x26d 0x0606060606060606
1700 20:12:50.380407 MTRR: Fixed MSR 0x26e 0x0606060606060606
1701 20:12:50.383612 MTRR: Fixed MSR 0x26f 0x0606060606060606
1702 20:12:50.386989 call enable_fixed_mtrr()
1703 20:12:50.390262 CPU physical address size: 39 bits
1704 20:12:50.393377 MTRR: default type WB/UC MTRR counts: 6/5.
1705 20:12:50.397209 MTRR: UC selected as default type.
1706 20:12:50.403165 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1707 20:12:50.410311 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1708 20:12:50.416296 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1709 20:12:50.423250 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1710 20:12:50.429551 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1711 20:12:50.429641
1712 20:12:50.429726 MTRR check
1713 20:12:50.433438 Fixed MTRRs : Enabled
1714 20:12:50.436666 Variable MTRRs: Enabled
1715 20:12:50.436763
1716 20:12:50.439951 MTRR: Fixed MSR 0x250 0x0606060606060606
1717 20:12:50.443253 MTRR: Fixed MSR 0x258 0x0606060606060606
1718 20:12:50.446502 MTRR: Fixed MSR 0x259 0x0000000000000000
1719 20:12:50.449622
1720 20:12:50.452985 MTRR: Fixed MSR 0x268 0x0606060606060606
1721 20:12:50.456147 MTRR: Fixed MSR 0x269 0x0606060606060606
1722 20:12:50.459400 MTRR: Fixed MSR 0x26a 0x0606060606060606
1723 20:12:50.462598 MTRR: Fixed MSR 0x26b 0x0606060606060606
1724 20:12:50.469093 MTRR: Fixed MSR 0x26c 0x0606060606060606
1725 20:12:50.473006 MTRR: Fixed MSR 0x26d 0x0606060606060606
1726 20:12:50.476262 MTRR: Fixed MSR 0x26e 0x0606060606060606
1727 20:12:50.479505 MTRR: Fixed MSR 0x26f 0x0606060606060606
1728 20:12:50.486021 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1729 20:12:50.489280 call enable_fixed_mtrr()
1730 20:12:50.492560 Checking cr50 for pending updates
1731 20:12:50.495839 CPU physical address size: 39 bits
1732 20:12:50.499558 Reading cr50 TPM mode
1733 20:12:50.509331 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1734 20:12:50.517024 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1735 20:12:50.520269 Checking segment from ROM address 0xfff9d5b8
1736 20:12:50.526829 Checking segment from ROM address 0xfff9d5d4
1737 20:12:50.530059 Loading segment from ROM address 0xfff9d5b8
1738 20:12:50.533306 code (compression=0)
1739 20:12:50.540068 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1740 20:12:50.549621 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1741 20:12:50.552904 it's not compressed!
1742 20:12:50.678308 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1743 20:12:50.684474 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1744 20:12:50.692045 Loading segment from ROM address 0xfff9d5d4
1745 20:12:50.695329 Entry Point 0x30000000
1746 20:12:50.695412 Loaded segments
1747 20:12:50.701715 BS: BS_PAYLOAD_LOAD run times (exec / console): 125 / 60 ms
1748 20:12:50.717894 Finalizing chipset.
1749 20:12:50.721246 Finalizing SMM.
1750 20:12:50.721333 APMC done.
1751 20:12:50.727730 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1752 20:12:50.731019 mp_park_aps done after 0 msecs.
1753 20:12:50.734330 Jumping to boot code at 0x30000000(0x76b4b000)
1754 20:12:50.744176 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1755 20:12:50.744274
1756 20:12:50.744347
1757 20:12:50.744411
1758 20:12:50.748056 Starting depthcharge on Magolor...
1759 20:12:50.748128
1760 20:12:50.748475 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
1761 20:12:50.748585 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
1762 20:12:50.748670 Setting prompt string to ['dedede:']
1763 20:12:50.748762 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:46)
1764 20:12:50.757780 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1765 20:12:50.757865
1766 20:12:50.764359 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1767 20:12:50.764442
1768 20:12:50.767643 fw_config match found: AUDIO_AMP=UNPROVISIONED
1769 20:12:50.767720
1770 20:12:50.770714 Wipe memory regions:
1771 20:12:50.770786
1772 20:12:50.773837 [0x00000000001000, 0x000000000a0000)
1773 20:12:50.773909
1774 20:12:50.777196 [0x00000000100000, 0x00000030000000)
1775 20:12:50.777269
1776 20:12:50.909739 [0x00000031062170, 0x00000076a15000)
1777 20:12:50.909891
1778 20:12:51.081950 [0x00000100000000, 0x00000180400000)
1779 20:12:51.082104
1780 20:12:52.144498 R8152: Initializing
1781 20:12:52.144659
1782 20:12:52.147624 Version 6 (ocp_data = 5c30)
1783 20:12:52.147743
1784 20:12:52.150909 R8152: Done initializing
1785 20:12:52.151006
1786 20:12:52.154180 Adding net device
1787 20:12:52.154272
1788 20:12:52.157507 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1789 20:12:52.160772
1790 20:12:52.160851
1791 20:12:52.160931
1792 20:12:52.161210 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1794 20:12:52.261866 dedede: tftpboot 192.168.201.1 8784766/tftp-deploy-5yy5dmly/kernel/bzImage 8784766/tftp-deploy-5yy5dmly/kernel/cmdline 8784766/tftp-deploy-5yy5dmly/ramdisk/ramdisk.cpio.gz
1795 20:12:52.262060 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1796 20:12:52.262153 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
1797 20:12:52.266625 tftpboot 192.168.201.1 8784766/tftp-deploy-5yy5dmly/kernel/bzImaoy-5yy5dmly/kernel/cmdline 8784766/tftp-deploy-5yy5dmly/ramdisk/ramdisk.cpio.gz
1798 20:12:52.266717
1799 20:12:52.266783 Waiting for link
1800 20:12:52.266844
1801 20:12:52.468652 done.
1802 20:12:52.468799
1803 20:12:52.468876 MAC: 00:24:32:30:7b:c4
1804 20:12:52.468944
1805 20:12:52.471994 Sending DHCP discover... done.
1806 20:12:52.472076
1807 20:12:52.475157 Waiting for reply... done.
1808 20:12:52.475232
1809 20:12:52.478446 Sending DHCP request... done.
1810 20:12:52.478541
1811 20:12:52.481664 Waiting for reply... done.
1812 20:12:52.481751
1813 20:12:52.484932 My ip is 192.168.201.12
1814 20:12:52.485018
1815 20:12:52.488203 The DHCP server ip is 192.168.201.1
1816 20:12:52.488288
1817 20:12:52.494723 TFTP server IP predefined by user: 192.168.201.1
1818 20:12:52.494818
1819 20:12:52.501146 Bootfile predefined by user: 8784766/tftp-deploy-5yy5dmly/kernel/bzImage
1820 20:12:52.501232
1821 20:12:52.504434 Sending tftp read request... done.
1822 20:12:52.504509
1823 20:12:52.507653 Waiting for the transfer...
1824 20:12:52.507743
1825 20:12:53.101739 00000000 ################################################################
1826 20:12:53.101908
1827 20:12:53.638492 00080000 ################################################################
1828 20:12:53.638647
1829 20:12:54.178747 00100000 ################################################################
1830 20:12:54.178898
1831 20:12:54.744843 00180000 ################################################################
1832 20:12:54.745005
1833 20:12:55.415985 00200000 ################################################################
1834 20:12:55.416153
1835 20:12:55.991294 00280000 ################################################################
1836 20:12:55.991443
1837 20:12:56.525651 00300000 ################################################################
1838 20:12:56.525805
1839 20:12:57.058644 00380000 ################################################################
1840 20:12:57.058846
1841 20:12:57.596239 00400000 ################################################################
1842 20:12:57.596377
1843 20:12:58.132778 00480000 ################################################################
1844 20:12:58.132932
1845 20:12:58.668040 00500000 ################################################################
1846 20:12:58.668184
1847 20:12:59.204865 00580000 ################################################################
1848 20:12:59.205007
1849 20:12:59.739080 00600000 ################################################################
1850 20:12:59.739218
1851 20:13:00.289480 00680000 ################################################################
1852 20:13:00.289628
1853 20:13:00.842798 00700000 ################################################################
1854 20:13:00.842941
1855 20:13:01.375503 00780000 ################################################################
1856 20:13:01.375643
1857 20:13:01.907357 00800000 ################################################################
1858 20:13:01.907502
1859 20:13:02.440695 00880000 ################################################################
1860 20:13:02.440840
1861 20:13:02.715758 00900000 ################################## done.
1862 20:13:02.715898
1863 20:13:02.719656 The bootfile was 9711616 bytes long.
1864 20:13:02.719747
1865 20:13:02.722936 Sending tftp read request... done.
1866 20:13:02.723026
1867 20:13:02.726274 Waiting for the transfer...
1868 20:13:02.726358
1869 20:13:03.265728 00000000 ################################################################
1870 20:13:03.265868
1871 20:13:03.799350 00080000 ################################################################
1872 20:13:03.799493
1873 20:13:04.341814 00100000 ################################################################
1874 20:13:04.341953
1875 20:13:04.876124 00180000 ################################################################
1876 20:13:04.876259
1877 20:13:05.418476 00200000 ################################################################
1878 20:13:05.418621
1879 20:13:05.969662 00280000 ################################################################
1880 20:13:05.969815
1881 20:13:06.528033 00300000 ################################################################
1882 20:13:06.528190
1883 20:13:07.101919 00380000 ################################################################
1884 20:13:07.102494
1885 20:13:07.652251 00400000 ################################################################
1886 20:13:07.652397
1887 20:13:08.206448 00480000 ################################################################
1888 20:13:08.206607
1889 20:13:08.764842 00500000 ################################################################
1890 20:13:08.765005
1891 20:13:09.336127 00580000 ################################################################
1892 20:13:09.336301
1893 20:13:09.883206 00600000 ################################################################
1894 20:13:09.883343
1895 20:13:10.437267 00680000 ################################################################
1896 20:13:10.437425
1897 20:13:11.006950 00700000 ################################################################
1898 20:13:11.007112
1899 20:13:11.566709 00780000 ################################################################
1900 20:13:11.566884
1901 20:13:11.774463 00800000 ######################## done.
1902 20:13:11.774614
1903 20:13:11.778241 Sending tftp read request... done.
1904 20:13:11.778326
1905 20:13:11.781517 Waiting for the transfer...
1906 20:13:11.781605
1907 20:13:11.781681 00000000 # done.
1908 20:13:11.781748
1909 20:13:11.791376 Command line loaded dynamically from TFTP file: 8784766/tftp-deploy-5yy5dmly/kernel/cmdline
1910 20:13:11.791473
1911 20:13:11.804645 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1912 20:13:11.804741
1913 20:13:11.807775 ec_init: CrosEC protocol v3 supported (256, 256)
1914 20:13:11.807862
1915 20:13:11.819552 Shutting down all USB controllers.
1916 20:13:11.819641
1917 20:13:11.819713 Removing current net device
1918 20:13:11.819778
1919 20:13:11.822794 Finalizing coreboot
1920 20:13:11.822875
1921 20:13:11.829361 Exiting depthcharge with code 4 at timestamp: 27882414
1922 20:13:11.829443
1923 20:13:11.829509
1924 20:13:11.829570 Starting kernel ...
1925 20:13:11.829630
1926 20:13:11.829689
1927 20:13:11.829746
1928 20:13:11.830140 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
1929 20:13:11.830244 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
1930 20:13:11.830322 Setting prompt string to ['Linux version [0-9]']
1931 20:13:11.830397 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1932 20:13:11.830468 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1934 20:17:36.830544 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
1936 20:17:36.830863 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
1938 20:17:36.831091 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1941 20:17:36.831499 end: 2 depthcharge-action (duration 00:05:00) [common]
1943 20:17:36.831841 Cleaning after the job
1944 20:17:36.831966 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8784766/tftp-deploy-5yy5dmly/ramdisk
1945 20:17:36.832971 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8784766/tftp-deploy-5yy5dmly/kernel
1946 20:17:36.833996 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8784766/tftp-deploy-5yy5dmly/modules
1947 20:17:36.834311 start: 5.1 power-off (timeout 00:00:30) [common]
1948 20:17:36.834559 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=off'
1949 20:17:36.853957 >> Command sent successfully.
1950 20:17:36.856102 Returned 0 in 0 seconds
1951 20:17:36.956914 end: 5.1 power-off (duration 00:00:00) [common]
1953 20:17:36.957373 start: 5.2 read-feedback (timeout 00:10:00) [common]
1954 20:17:36.957697 Listened to connection for namespace 'common' for up to 1s
1955 20:17:37.366414 Listened to connection for namespace 'common' for up to 1s
1956 20:17:37.369434 Listened to connection for namespace 'common' for up to 1s
1957 20:17:37.373338 Listened to connection for namespace 'common' for up to 1s
1958 20:17:37.377433 Listened to connection for namespace 'common' for up to 1s
1959 20:17:37.381353 Listened to connection for namespace 'common' for up to 1s
1960 20:17:37.385103 Listened to connection for namespace 'common' for up to 1s
1961 20:17:37.388931 Listened to connection for namespace 'common' for up to 1s
1962 20:17:37.392713 Listened to connection for namespace 'common' for up to 1s
1963 20:17:37.405973 Listened to connection for namespace 'common' for up to 1s
1964 20:17:37.406322 Listened to connection for namespace 'common' for up to 1s
1965 20:17:37.421789 Listened to connection for namespace 'common' for up to 1s
1966 20:17:37.422137 Listened to connection for namespace 'common' for up to 1s
1967 20:17:37.424902 Listened to connection for namespace 'common' for up to 1s
1968 20:17:37.958109 Finalising connection for namespace 'common'
1969 20:17:37.958291 Disconnecting from shell: Finalise
1970 20:17:37.958385
1971 20:17:38.059117 end: 5.2 read-feedback (duration 00:00:01) [common]
1972 20:17:38.059300 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8784766
1973 20:17:38.064186 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8784766
1974 20:17:38.064317 JobError: Your job cannot terminate cleanly.