Boot log: asus-cx9400-volteer

    1 15:43:52.036881  lava-dispatcher, installed at version: 2022.06
    2 15:43:52.037076  start: 0 validate
    3 15:43:52.037210  Start time: 2022-09-17 15:43:52.037203+00:00 (UTC)
    4 15:43:52.037348  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:43:52.037476  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220805.0%2Fx86%2Frootfs.cpio.gz exists
    6 15:43:52.049073  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:43:52.049230  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-229-gb433f12afe250%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 15:43:52.051187  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:43:52.051308  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-229-gb433f12afe250%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 15:43:52.063362  validate duration: 0.03
   12 15:43:52.063628  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 15:43:52.063735  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 15:43:52.063825  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 15:43:52.063964  Not decompressing ramdisk as can be used compressed.
   16 15:43:52.064050  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220805.0/x86/rootfs.cpio.gz
   17 15:43:52.064120  saving as /var/lib/lava/dispatcher/tmp/7300476/tftp-deploy-aksiq6pf/ramdisk/rootfs.cpio.gz
   18 15:43:52.064182  total size: 8415960 (8MB)
   19 15:43:52.067049  progress   0% (0MB)
   20 15:43:52.083032  progress   5% (0MB)
   21 15:43:52.099447  progress  10% (0MB)
   22 15:43:52.117748  progress  15% (1MB)
   23 15:43:52.132038  progress  20% (1MB)
   24 15:43:52.147557  progress  25% (2MB)
   25 15:43:52.164966  progress  30% (2MB)
   26 15:43:52.177981  progress  35% (2MB)
   27 15:43:52.195688  progress  40% (3MB)
   28 15:43:52.208984  progress  45% (3MB)
   29 15:43:52.228397  progress  50% (4MB)
   30 15:43:52.241416  progress  55% (4MB)
   31 15:43:52.258006  progress  60% (4MB)
   32 15:43:52.274244  progress  65% (5MB)
   33 15:43:52.288906  progress  70% (5MB)
   34 15:43:52.305569  progress  75% (6MB)
   35 15:43:52.330960  progress  80% (6MB)
   36 15:43:52.353312  progress  85% (6MB)
   37 15:43:52.383722  progress  90% (7MB)
   38 15:43:52.405725  progress  95% (7MB)
   39 15:43:52.425567  progress 100% (8MB)
   40 15:43:52.425850  8MB downloaded in 0.36s (22.19MB/s)
   41 15:43:52.426004  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 15:43:52.426255  end: 1.1 download-retry (duration 00:00:00) [common]
   44 15:43:52.426345  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 15:43:52.426435  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 15:43:52.426540  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-229-gb433f12afe250/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 15:43:52.426609  saving as /var/lib/lava/dispatcher/tmp/7300476/tftp-deploy-aksiq6pf/kernel/bzImage
   48 15:43:52.426673  total size: 6815632 (6MB)
   49 15:43:52.426734  No compression specified
   50 15:43:52.436777  progress   0% (0MB)
   51 15:43:52.469798  progress   5% (0MB)
   52 15:43:52.495737  progress  10% (0MB)
   53 15:43:52.526224  progress  15% (1MB)
   54 15:43:52.548423  progress  20% (1MB)
   55 15:43:52.568670  progress  25% (1MB)
   56 15:43:52.579513  progress  30% (1MB)
   57 15:43:52.588416  progress  35% (2MB)
   58 15:43:52.599710  progress  40% (2MB)
   59 15:43:52.608760  progress  45% (2MB)
   60 15:43:52.618897  progress  50% (3MB)
   61 15:43:52.629694  progress  55% (3MB)
   62 15:43:52.638717  progress  60% (3MB)
   63 15:43:52.649238  progress  65% (4MB)
   64 15:43:52.660596  progress  70% (4MB)
   65 15:43:52.669218  progress  75% (4MB)
   66 15:43:52.680179  progress  80% (5MB)
   67 15:43:52.689180  progress  85% (5MB)
   68 15:43:52.699353  progress  90% (5MB)
   69 15:43:52.710714  progress  95% (6MB)
   70 15:43:52.718420  progress 100% (6MB)
   71 15:43:52.718715  6MB downloaded in 0.29s (22.26MB/s)
   72 15:43:52.718868  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 15:43:52.719110  end: 1.2 download-retry (duration 00:00:00) [common]
   75 15:43:52.719201  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 15:43:52.719289  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 15:43:52.719394  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-229-gb433f12afe250/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 15:43:52.719463  saving as /var/lib/lava/dispatcher/tmp/7300476/tftp-deploy-aksiq6pf/modules/modules.tar
   79 15:43:52.719526  total size: 51872 (0MB)
   80 15:43:52.719588  Using unxz to decompress xz
   81 15:43:52.733339  progress  63% (0MB)
   82 15:43:52.737945  progress 100% (0MB)
   83 15:43:52.739411  0MB downloaded in 0.02s (2.49MB/s)
   84 15:43:52.739632  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 15:43:52.739902  end: 1.3 download-retry (duration 00:00:00) [common]
   87 15:43:52.740000  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   88 15:43:52.740096  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   89 15:43:52.740186  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 15:43:52.740275  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   91 15:43:52.740437  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1
   92 15:43:52.740548  makedir: /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin
   93 15:43:52.740633  makedir: /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/tests
   94 15:43:52.740716  makedir: /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/results
   95 15:43:52.740870  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-add-keys
   96 15:43:52.741005  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-add-sources
   97 15:43:52.741124  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-background-process-start
   98 15:43:52.741238  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-background-process-stop
   99 15:43:52.741352  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-common-functions
  100 15:43:52.741464  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-echo-ipv4
  101 15:43:52.741577  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-install-packages
  102 15:43:52.741695  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-installed-packages
  103 15:43:52.741807  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-os-build
  104 15:43:52.741920  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-probe-channel
  105 15:43:52.742032  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-probe-ip
  106 15:43:52.742143  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-target-ip
  107 15:43:52.742254  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-target-mac
  108 15:43:52.742365  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-target-storage
  109 15:43:52.742478  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-test-case
  110 15:43:52.742589  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-test-event
  111 15:43:52.742701  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-test-feedback
  112 15:43:52.742813  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-test-raise
  113 15:43:52.742929  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-test-reference
  114 15:43:52.743040  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-test-runner
  115 15:43:52.743150  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-test-set
  116 15:43:52.743260  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-test-shell
  117 15:43:52.743372  Updating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-install-packages (oe)
  118 15:43:52.743487  Updating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/bin/lava-installed-packages (oe)
  119 15:43:52.743589  Creating /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/environment
  120 15:43:52.743678  LAVA metadata
  121 15:43:52.743763  - LAVA_JOB_ID=7300476
  122 15:43:52.743832  - LAVA_DISPATCHER_IP=192.168.201.1
  123 15:43:52.743982  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  124 15:43:52.744048  skipped lava-vland-overlay
  125 15:43:52.744127  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 15:43:52.744215  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  127 15:43:52.744278  skipped lava-multinode-overlay
  128 15:43:52.744354  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 15:43:52.744439  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  130 15:43:52.744514  Loading test definitions
  131 15:43:52.744614  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  132 15:43:52.744694  Using /lava-7300476 at stage 0
  133 15:43:52.744977  uuid=7300476_1.4.2.3.1 testdef=None
  134 15:43:52.745070  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 15:43:52.745163  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  136 15:43:52.745676  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 15:43:52.745912  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  139 15:43:52.746498  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 15:43:52.746746  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  142 15:43:52.747313  runner path: /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/0/tests/0_dmesg test_uuid 7300476_1.4.2.3.1
  143 15:43:52.747466  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 15:43:52.747755  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  146 15:43:52.747842  Using /lava-7300476 at stage 1
  147 15:43:52.748130  uuid=7300476_1.4.2.3.5 testdef=None
  148 15:43:52.748224  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 15:43:52.748316  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  150 15:43:52.748764  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 15:43:52.748993  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  153 15:43:52.749573  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 15:43:52.749815  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  156 15:43:52.750387  runner path: /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/1/tests/1_bootrr test_uuid 7300476_1.4.2.3.5
  157 15:43:52.750532  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 15:43:52.750747  Creating lava-test-runner.conf files
  160 15:43:52.750813  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/0 for stage 0
  161 15:43:52.750896  - 0_dmesg
  162 15:43:52.750972  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7300476/lava-overlay-h34q2tx1/lava-7300476/1 for stage 1
  163 15:43:52.751055  - 1_bootrr
  164 15:43:52.751146  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 15:43:52.751236  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  166 15:43:52.757537  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 15:43:52.757648  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  168 15:43:52.757740  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 15:43:52.757827  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 15:43:52.757916  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  171 15:43:52.941165  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 15:43:52.941494  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  173 15:43:52.941601  extracting modules file /var/lib/lava/dispatcher/tmp/7300476/tftp-deploy-aksiq6pf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7300476/extract-overlay-ramdisk-wyrpkefr/ramdisk
  174 15:43:52.945868  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 15:43:52.945984  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  176 15:43:52.946075  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7300476/compress-overlay-9fxto1o9/overlay-1.4.2.4.tar.gz to ramdisk
  177 15:43:52.946150  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7300476/compress-overlay-9fxto1o9/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7300476/extract-overlay-ramdisk-wyrpkefr/ramdisk
  178 15:43:52.950144  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 15:43:52.950257  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  180 15:43:52.950351  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 15:43:52.950443  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  182 15:43:52.950528  Building ramdisk /var/lib/lava/dispatcher/tmp/7300476/extract-overlay-ramdisk-wyrpkefr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7300476/extract-overlay-ramdisk-wyrpkefr/ramdisk
  183 15:43:53.014030  >> 48006 blocks

  184 15:43:53.782263  rename /var/lib/lava/dispatcher/tmp/7300476/extract-overlay-ramdisk-wyrpkefr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7300476/tftp-deploy-aksiq6pf/ramdisk/ramdisk.cpio.gz
  185 15:43:53.782665  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 15:43:53.782788  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  187 15:43:53.782914  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  188 15:43:53.783011  No mkimage arch provided, not using FIT.
  189 15:43:53.783123  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 15:43:53.783209  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 15:43:53.783312  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 15:43:53.783405  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  193 15:43:53.783486  No LXC device requested
  194 15:43:53.783568  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 15:43:53.783660  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  196 15:43:53.783742  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 15:43:53.783813  Checking files for TFTP limit of 4294967296 bytes.
  198 15:43:53.784233  end: 1 tftp-deploy (duration 00:00:02) [common]
  199 15:43:53.784339  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 15:43:53.784433  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 15:43:53.784563  substitutions:
  202 15:43:53.784631  - {DTB}: None
  203 15:43:53.784700  - {INITRD}: 7300476/tftp-deploy-aksiq6pf/ramdisk/ramdisk.cpio.gz
  204 15:43:53.784771  - {KERNEL}: 7300476/tftp-deploy-aksiq6pf/kernel/bzImage
  205 15:43:53.784838  - {LAVA_MAC}: None
  206 15:43:53.784905  - {PRESEED_CONFIG}: None
  207 15:43:53.784972  - {PRESEED_LOCAL}: None
  208 15:43:53.785038  - {RAMDISK}: 7300476/tftp-deploy-aksiq6pf/ramdisk/ramdisk.cpio.gz
  209 15:43:53.785104  - {ROOT_PART}: None
  210 15:43:53.785170  - {ROOT}: None
  211 15:43:53.785235  - {SERVER_IP}: 192.168.201.1
  212 15:43:53.785299  - {TEE}: None
  213 15:43:53.785364  Parsed boot commands:
  214 15:43:53.785427  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 15:43:53.785584  Parsed boot commands: tftpboot 192.168.201.1 7300476/tftp-deploy-aksiq6pf/kernel/bzImage 7300476/tftp-deploy-aksiq6pf/kernel/cmdline 7300476/tftp-deploy-aksiq6pf/ramdisk/ramdisk.cpio.gz
  216 15:43:53.785683  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 15:43:53.785790  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 15:43:53.785892  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 15:43:53.785991  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 15:43:53.786064  Not connected, no need to disconnect.
  221 15:43:53.786144  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 15:43:53.786247  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 15:43:53.786320  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-7'
  224 15:43:53.788914  Setting prompt string to ['lava-test: # ']
  225 15:43:53.789195  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 15:43:53.789298  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 15:43:53.789399  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 15:43:53.789493  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 15:43:53.789667  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
  230 15:43:53.809144  >> Command sent successfully.

  231 15:43:53.810997  Returned 0 in 0 seconds
  232 15:43:53.911775  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  234 15:43:53.912378  end: 2.2.2 reset-device (duration 00:00:00) [common]
  235 15:43:53.912481  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  236 15:43:53.912567  Setting prompt string to 'Starting depthcharge on Voema...'
  237 15:43:53.912633  Changing prompt to 'Starting depthcharge on Voema...'
  238 15:43:53.912704  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  239 15:43:53.912975  [Enter `^Ec?' for help]
  240 15:44:01.435732  
  241 15:44:01.436363  
  242 15:44:01.445551  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
  243 15:44:01.448680  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
  244 15:44:01.455302  CPU: ID 806c1, Tigerlake B0, ucode: 00000086
  245 15:44:01.458708  CPU: AES supported, TXT NOT supported, VT supported
  246 15:44:01.465639  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
  247 15:44:01.472258  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
  248 15:44:01.475453  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
  249 15:44:01.478715  VBOOT: Loading verstage.
  250 15:44:01.482151  FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
  251 15:44:01.488584  FMAP: base = 0x0 size = 0x2000000 #areas = 32
  252 15:44:01.491944  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  253 15:44:01.502523  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
  254 15:44:01.509168  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
  255 15:44:01.509580  
  256 15:44:01.509942  
  257 15:44:01.522263  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...
  258 15:44:01.536393  Probing TPM: . done!
  259 15:44:01.539356  TPM ready after 0 ms
  260 15:44:01.542943  Connected to device vid:did:rid of 1ae0:0028:00
  261 15:44:01.554116  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
  262 15:44:01.560631  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
  263 15:44:01.564186  Initialized TPM device CR50 revision 0
  264 15:44:01.614307  tlcl_send_startup: Startup return code is 0
  265 15:44:01.614747  TPM: setup succeeded
  266 15:44:01.629814  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
  267 15:44:01.643814  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  268 15:44:01.657216  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
  269 15:44:01.666648  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  270 15:44:01.670568  Chrome EC: UHEPI supported
  271 15:44:01.673776  Phase 1
  272 15:44:01.677137  FMAP: area GBB found @ 1805000 (458752 bytes)
  273 15:44:01.687403  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  274 15:44:01.693825  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  275 15:44:01.700503  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  276 15:44:01.706902  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
  277 15:44:01.710264  Recovery requested (1009000e)
  278 15:44:01.713536  TPM: Extending digest for VBOOT: boot mode into PCR 0
  279 15:44:01.725238  tlcl_extend: response is 0
  280 15:44:01.732004  TPM: Extending digest for VBOOT: GBB HWID into PCR 1
  281 15:44:01.741620  tlcl_extend: response is 0
  282 15:44:01.748429  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  283 15:44:01.755195  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
  284 15:44:01.761731  BS: verstage times (exec / console): total (unknown) / 142 ms
  285 15:44:01.762168  
  286 15:44:01.762511  
  287 15:44:01.774763  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...
  288 15:44:01.781554  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  289 15:44:01.784823  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  290 15:44:01.788330  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
  291 15:44:01.795022  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
  292 15:44:01.798028  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
  293 15:44:01.801431  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
  294 15:44:01.804568  TCO_STS:   0000 0000
  295 15:44:01.807989  GEN_PMCON: d0015038 00002200
  296 15:44:01.811418  GBLRST_CAUSE: 00000000 00000000
  297 15:44:01.811877  HPR_CAUSE0: 00000000
  298 15:44:01.814782  prev_sleep_state 5
  299 15:44:01.818025  Boot Count incremented to 10034
  300 15:44:01.825129  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  301 15:44:01.831403  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  302 15:44:01.837827  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  303 15:44:01.844549  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
  304 15:44:01.849395  Chrome EC: UHEPI supported
  305 15:44:01.855960  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  306 15:44:01.868535  Probing TPM:  done!
  307 15:44:01.875228  Connected to device vid:did:rid of 1ae0:0028:00
  308 15:44:01.885625  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
  309 15:44:01.889298  Initialized TPM device CR50 revision 0
  310 15:44:01.906155  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
  311 15:44:01.912869  MRC: Hash idx 0x100b comparison successful.
  312 15:44:01.916593  MRC cache found, size faa8
  313 15:44:01.917034  bootmode is set to: 2
  314 15:44:01.919778  SPD index = 0
  315 15:44:01.926448  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
  316 15:44:01.929765  SPD: module type is LPDDR4X
  317 15:44:01.932936  SPD: module part number is MT53E512M64D4NW-046
  318 15:44:01.939651  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
  319 15:44:01.943035  SPD: device width 16 bits, bus width 16 bits
  320 15:44:01.949621  SPD: module size is 1024 MB (per channel)
  321 15:44:02.384124  CBMEM:
  322 15:44:02.387531  IMD: root @ 0x76fff000 254 entries.
  323 15:44:02.390703  IMD: root @ 0x76ffec00 62 entries.
  324 15:44:02.394168  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
  325 15:44:02.400914  FMAP: area RW_VPD found @ f35000 (8192 bytes)
  326 15:44:02.404342  External stage cache:
  327 15:44:02.407413  IMD: root @ 0x7b3ff000 254 entries.
  328 15:44:02.410871  IMD: root @ 0x7b3fec00 62 entries.
  329 15:44:02.426061  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  330 15:44:02.432670  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
  331 15:44:02.439201  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
  332 15:44:02.453395  MRC: 'RECOVERY_MRC_CACHE' does not need update.
  333 15:44:02.460068  cse_lite: Skip switching to RW in the recovery path
  334 15:44:02.460536  8 DIMMs found
  335 15:44:02.460915  SMM Memory Map
  336 15:44:02.463696  SMRAM       : 0x7b000000 0x800000
  337 15:44:02.470770   Subregion 0: 0x7b000000 0x200000
  338 15:44:02.471223   Subregion 1: 0x7b200000 0x200000
  339 15:44:02.474224   Subregion 2: 0x7b400000 0x400000
  340 15:44:02.478114  top_of_ram = 0x77000000
  341 15:44:02.484244  MTRR Range: Start=76000000 End=77000000 (Size 1000000)
  342 15:44:02.487321  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
  343 15:44:02.493919  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
  344 15:44:02.497226  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  345 15:44:02.507556  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
  346 15:44:02.514229  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
  347 15:44:02.523942  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
  348 15:44:02.527007  Processing 211 relocs. Offset value of 0x74c0b000
  349 15:44:02.536242  BS: romstage times (exec / console): total (unknown) / 277 ms
  350 15:44:02.542290  
  351 15:44:02.542725  
  352 15:44:02.552153  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...
  353 15:44:02.555423  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  354 15:44:02.565493  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  355 15:44:02.572355  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  356 15:44:02.578771  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
  357 15:44:02.585327  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
  358 15:44:02.631931  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
  359 15:44:02.638860  Processing 5008 relocs. Offset value of 0x75d98000
  360 15:44:02.642128  BS: postcar times (exec / console): total (unknown) / 59 ms
  361 15:44:02.645270  
  362 15:44:02.645710  
  363 15:44:02.655488  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
  364 15:44:02.655953  Normal boot
  365 15:44:02.659261  FW_CONFIG value is 0x804c02
  366 15:44:02.662769  PCI: 00:07.0 disabled by fw_config
  367 15:44:02.666403  PCI: 00:07.1 disabled by fw_config
  368 15:44:02.669979  PCI: 00:0d.2 disabled by fw_config
  369 15:44:02.673153  PCI: 00:1c.7 disabled by fw_config
  370 15:44:02.679763  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  371 15:44:02.686314  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  372 15:44:02.689694  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  373 15:44:02.692933  GENERIC: 0.0 disabled by fw_config
  374 15:44:02.696300  GENERIC: 1.0 disabled by fw_config
  375 15:44:02.703029  fw_config match found: DB_USB=USB3_ACTIVE
  376 15:44:02.706191  fw_config match found: DB_USB=USB3_ACTIVE
  377 15:44:02.709431  fw_config match found: DB_USB=USB3_ACTIVE
  378 15:44:02.712917  fw_config match found: DB_USB=USB3_ACTIVE
  379 15:44:02.719549  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  380 15:44:02.726618  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  381 15:44:02.733152  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  382 15:44:02.743108  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
  383 15:44:02.746064  microcode: sig=0x806c1 pf=0x80 revision=0x86
  384 15:44:02.753033  microcode: Update skipped, already up-to-date
  385 15:44:02.759611  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
  386 15:44:02.787017  Detected 4 core, 8 thread CPU.
  387 15:44:02.790042  Setting up SMI for CPU
  388 15:44:02.793111  IED base = 0x7b400000
  389 15:44:02.793548  IED size = 0x00400000
  390 15:44:02.796547  Will perform SMM setup.
  391 15:44:02.803651  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
  392 15:44:02.809869  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
  393 15:44:02.816733  Processing 16 relocs. Offset value of 0x00030000
  394 15:44:02.819775  Attempting to start 7 APs
  395 15:44:02.823229  Waiting for 10ms after sending INIT.
  396 15:44:02.838646  Waiting for 1st SIPI to complete...done.
  397 15:44:02.839082  AP: slot 1 apic_id 1.
  398 15:44:02.842145  AP: slot 4 apic_id 7.
  399 15:44:02.845080  AP: slot 5 apic_id 6.
  400 15:44:02.845515  AP: slot 2 apic_id 3.
  401 15:44:02.848514  AP: slot 6 apic_id 2.
  402 15:44:02.851871  AP: slot 3 apic_id 5.
  403 15:44:02.855045  Waiting for 2nd SIPI to complete...done.
  404 15:44:02.858595  AP: slot 7 apic_id 4.
  405 15:44:02.865234  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
  406 15:44:02.871785  Processing 13 relocs. Offset value of 0x00038000
  407 15:44:02.872250  Unable to locate Global NVS
  408 15:44:02.881908  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
  409 15:44:02.885242  Installing permanent SMM handler to 0x7b000000
  410 15:44:02.894920  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
  411 15:44:02.898224  Processing 794 relocs. Offset value of 0x7b010000
  412 15:44:02.908465  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
  413 15:44:02.911719  Processing 13 relocs. Offset value of 0x7b008000
  414 15:44:02.918183  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
  415 15:44:02.925030  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
  416 15:44:02.928216  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
  417 15:44:02.934906  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
  418 15:44:02.941543  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
  419 15:44:02.948554  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
  420 15:44:02.954616  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
  421 15:44:02.955055  Unable to locate Global NVS
  422 15:44:02.964599  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
  423 15:44:02.968206  Clearing SMI status registers
  424 15:44:02.968642  SMI_STS: PM1 
  425 15:44:02.971160  PM1_STS: PWRBTN 
  426 15:44:02.978063  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
  427 15:44:02.981601  In relocation handler: CPU 0
  428 15:44:02.984722  New SMBASE=0x7b000000 IEDBASE=0x7b400000
  429 15:44:02.991124  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  430 15:44:02.991535  Relocation complete.
  431 15:44:03.000995  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
  432 15:44:03.001486  In relocation handler: CPU 1
  433 15:44:03.007830  New SMBASE=0x7afffc00 IEDBASE=0x7b400000
  434 15:44:03.008312  Relocation complete.
  435 15:44:03.018000  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
  436 15:44:03.018441  In relocation handler: CPU 7
  437 15:44:03.024451  New SMBASE=0x7affe400 IEDBASE=0x7b400000
  438 15:44:03.027681  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  439 15:44:03.031162  Relocation complete.
  440 15:44:03.037731  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
  441 15:44:03.040926  In relocation handler: CPU 3
  442 15:44:03.044350  New SMBASE=0x7afff400 IEDBASE=0x7b400000
  443 15:44:03.047764  Relocation complete.
  444 15:44:03.054554  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
  445 15:44:03.057742  In relocation handler: CPU 5
  446 15:44:03.060996  New SMBASE=0x7affec00 IEDBASE=0x7b400000
  447 15:44:03.064316  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  448 15:44:03.067945  Relocation complete.
  449 15:44:03.074514  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
  450 15:44:03.077677  In relocation handler: CPU 4
  451 15:44:03.081012  New SMBASE=0x7afff000 IEDBASE=0x7b400000
  452 15:44:03.084593  Relocation complete.
  453 15:44:03.091310  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
  454 15:44:03.094602  In relocation handler: CPU 6
  455 15:44:03.097672  New SMBASE=0x7affe800 IEDBASE=0x7b400000
  456 15:44:03.104199  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  457 15:44:03.104639  Relocation complete.
  458 15:44:03.114484  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
  459 15:44:03.117583  In relocation handler: CPU 2
  460 15:44:03.121198  New SMBASE=0x7afff800 IEDBASE=0x7b400000
  461 15:44:03.121641  Relocation complete.
  462 15:44:03.124494  Initializing CPU #0
  463 15:44:03.127795  CPU: vendor Intel device 806c1
  464 15:44:03.131246  CPU: family 06, model 8c, stepping 01
  465 15:44:03.134555  Clearing out pending MCEs
  466 15:44:03.137660  Setting up local APIC...
  467 15:44:03.138092   apic_id: 0x00 done.
  468 15:44:03.141588  Turbo is available but hidden
  469 15:44:03.145279  Turbo is available and visible
  470 15:44:03.149177  microcode: Update skipped, already up-to-date
  471 15:44:03.152588  CPU #0 initialized
  472 15:44:03.155939  Initializing CPU #7
  473 15:44:03.156377  Initializing CPU #3
  474 15:44:03.158925  Initializing CPU #2
  475 15:44:03.159358  Initializing CPU #6
  476 15:44:03.162393  CPU: vendor Intel device 806c1
  477 15:44:03.166031  CPU: family 06, model 8c, stepping 01
  478 15:44:03.169102  CPU: vendor Intel device 806c1
  479 15:44:03.175681  CPU: family 06, model 8c, stepping 01
  480 15:44:03.176150  Clearing out pending MCEs
  481 15:44:03.179164  Clearing out pending MCEs
  482 15:44:03.182400  Setting up local APIC...
  483 15:44:03.185809  Initializing CPU #4
  484 15:44:03.186276  Initializing CPU #5
  485 15:44:03.188809  CPU: vendor Intel device 806c1
  486 15:44:03.192147  CPU: family 06, model 8c, stepping 01
  487 15:44:03.195688  Initializing CPU #1
  488 15:44:03.198889  CPU: vendor Intel device 806c1
  489 15:44:03.202160  CPU: family 06, model 8c, stepping 01
  490 15:44:03.205751  Clearing out pending MCEs
  491 15:44:03.208804  Clearing out pending MCEs
  492 15:44:03.209238  Setting up local APIC...
  493 15:44:03.212247  Setting up local APIC...
  494 15:44:03.215338  CPU: vendor Intel device 806c1
  495 15:44:03.218578  CPU: family 06, model 8c, stepping 01
  496 15:44:03.222309  CPU: vendor Intel device 806c1
  497 15:44:03.225391  CPU: family 06, model 8c, stepping 01
  498 15:44:03.228616  CPU: vendor Intel device 806c1
  499 15:44:03.232052  CPU: family 06, model 8c, stepping 01
  500 15:44:03.235434  Clearing out pending MCEs
  501 15:44:03.238703  Clearing out pending MCEs
  502 15:44:03.242177  Setting up local APIC...
  503 15:44:03.242615   apic_id: 0x02 done.
  504 15:44:03.245673   apic_id: 0x03 done.
  505 15:44:03.248791  microcode: Update skipped, already up-to-date
  506 15:44:03.255392  microcode: Update skipped, already up-to-date
  507 15:44:03.255830  CPU #6 initialized
  508 15:44:03.259085  CPU #2 initialized
  509 15:44:03.262041   apic_id: 0x07 done.
  510 15:44:03.262477  Setting up local APIC...
  511 15:44:03.265267   apic_id: 0x05 done.
  512 15:44:03.268878  Setting up local APIC...
  513 15:44:03.272198  Clearing out pending MCEs
  514 15:44:03.275202  microcode: Update skipped, already up-to-date
  515 15:44:03.278596   apic_id: 0x04 done.
  516 15:44:03.279030  CPU #3 initialized
  517 15:44:03.285164  microcode: Update skipped, already up-to-date
  518 15:44:03.285602   apic_id: 0x06 done.
  519 15:44:03.291892  microcode: Update skipped, already up-to-date
  520 15:44:03.295120  microcode: Update skipped, already up-to-date
  521 15:44:03.298597  CPU #4 initialized
  522 15:44:03.299066  CPU #5 initialized
  523 15:44:03.301842  CPU #7 initialized
  524 15:44:03.302236  Setting up local APIC...
  525 15:44:03.305421   apic_id: 0x01 done.
  526 15:44:03.308541  microcode: Update skipped, already up-to-date
  527 15:44:03.312192  CPU #1 initialized
  528 15:44:03.315468  bsp_do_flight_plan done after 457 msecs.
  529 15:44:03.318772  CPU: frequency set to 4000 MHz
  530 15:44:03.322190  Enabling SMIs.
  531 15:44:03.328518  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
  532 15:44:03.343487  SATAXPCIE1 indicates PCIe NVMe is present
  533 15:44:03.346810  Probing TPM:  done!
  534 15:44:03.350477  Connected to device vid:did:rid of 1ae0:0028:00
  535 15:44:03.361110  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
  536 15:44:03.363947  Initialized TPM device CR50 revision 0
  537 15:44:03.367645  Enabling S0i3.4
  538 15:44:03.374058  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
  539 15:44:03.377469  Found a VBT of 8704 bytes after decompression
  540 15:44:03.384251  cse_lite: CSE RO boot. HybridStorageMode disabled
  541 15:44:03.390613  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
  542 15:44:03.467209  FSPS returned 0
  543 15:44:03.470369  Executing Phase 1 of FspMultiPhaseSiInit
  544 15:44:03.480287  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
  545 15:44:03.483784  port C0 DISC req: usage 1 usb3 1 usb2 5
  546 15:44:03.487011  Raw Buffer output 0 00000511
  547 15:44:03.490229  Raw Buffer output 1 00000000
  548 15:44:03.493915  pmc_send_ipc_cmd succeeded
  549 15:44:03.500871  port C1 DISC req: usage 1 usb3 2 usb2 3
  550 15:44:03.501325  Raw Buffer output 0 00000321
  551 15:44:03.503900  Raw Buffer output 1 00000000
  552 15:44:03.508363  pmc_send_ipc_cmd succeeded
  553 15:44:03.513614  Detected 4 core, 8 thread CPU.
  554 15:44:03.516884  Detected 4 core, 8 thread CPU.
  555 15:44:03.750343  Display FSP Version Info HOB
  556 15:44:03.753889  Reference Code - CPU = a.0.4c.31
  557 15:44:03.757340  uCode Version = 0.0.0.86
  558 15:44:03.760517  TXT ACM version = ff.ff.ff.ffff
  559 15:44:03.763693  Reference Code - ME = a.0.4c.31
  560 15:44:03.766963  MEBx version = 0.0.0.0
  561 15:44:03.770366  ME Firmware Version = Consumer SKU
  562 15:44:03.773829  Reference Code - PCH = a.0.4c.31
  563 15:44:03.776953  PCH-CRID Status = Disabled
  564 15:44:03.780373  PCH-CRID Original Value = ff.ff.ff.ffff
  565 15:44:03.783561  PCH-CRID New Value = ff.ff.ff.ffff
  566 15:44:03.786852  OPROM - RST - RAID = ff.ff.ff.ffff
  567 15:44:03.790388  PCH Hsio Version = 4.0.0.0
  568 15:44:03.793435  Reference Code - SA - System Agent = a.0.4c.31
  569 15:44:03.797045  Reference Code - MRC = 2.0.0.1
  570 15:44:03.800371  SA - PCIe Version = a.0.4c.31
  571 15:44:03.803756  SA-CRID Status = Disabled
  572 15:44:03.806828  SA-CRID Original Value = 0.0.0.1
  573 15:44:03.810233  SA-CRID New Value = 0.0.0.1
  574 15:44:03.813443  OPROM - VBIOS = ff.ff.ff.ffff
  575 15:44:03.817051  IO Manageability Engine FW Version = 11.1.4.0
  576 15:44:03.820132  PHY Build Version = 0.0.0.e0
  577 15:44:03.823870  Thunderbolt(TM) FW Version = 0.0.0.0
  578 15:44:03.830333  System Agent Manageability Engine FW Version = ff.ff.ff.ffff
  579 15:44:03.834034  ITSS IRQ Polarities Before:
  580 15:44:03.834459  IPC0: 0xffffffff
  581 15:44:03.837242  IPC1: 0xffffffff
  582 15:44:03.837625  IPC2: 0xffffffff
  583 15:44:03.840072  IPC3: 0xffffffff
  584 15:44:03.843582  ITSS IRQ Polarities After:
  585 15:44:03.844161  IPC0: 0xffffffff
  586 15:44:03.846901  IPC1: 0xffffffff
  587 15:44:03.847380  IPC2: 0xffffffff
  588 15:44:03.850383  IPC3: 0xffffffff
  589 15:44:03.853662  Found PCIe Root Port #9 at PCI: 00:1d.0.
  590 15:44:03.866818  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
  591 15:44:03.876623  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
  592 15:44:03.890217  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
  593 15:44:03.896608  BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
  594 15:44:03.897126  Enumerating buses...
  595 15:44:03.903188  Show all devs... Before device enumeration.
  596 15:44:03.903684  Root Device: enabled 1
  597 15:44:03.906827  DOMAIN: 0000: enabled 1
  598 15:44:03.909976  CPU_CLUSTER: 0: enabled 1
  599 15:44:03.913816  PCI: 00:00.0: enabled 1
  600 15:44:03.914446  PCI: 00:02.0: enabled 1
  601 15:44:03.916555  PCI: 00:04.0: enabled 1
  602 15:44:03.920093  PCI: 00:05.0: enabled 1
  603 15:44:03.923567  PCI: 00:06.0: enabled 0
  604 15:44:03.924286  PCI: 00:07.0: enabled 0
  605 15:44:03.926872  PCI: 00:07.1: enabled 0
  606 15:44:03.929993  PCI: 00:07.2: enabled 0
  607 15:44:03.933219  PCI: 00:07.3: enabled 0
  608 15:44:03.933769  PCI: 00:08.0: enabled 1
  609 15:44:03.937101  PCI: 00:09.0: enabled 0
  610 15:44:03.939934  PCI: 00:0a.0: enabled 0
  611 15:44:03.943562  PCI: 00:0d.0: enabled 1
  612 15:44:03.944164  PCI: 00:0d.1: enabled 0
  613 15:44:03.946429  PCI: 00:0d.2: enabled 0
  614 15:44:03.949835  PCI: 00:0d.3: enabled 0
  615 15:44:03.952989  PCI: 00:0e.0: enabled 0
  616 15:44:03.953532  PCI: 00:10.2: enabled 1
  617 15:44:03.956670  PCI: 00:10.6: enabled 0
  618 15:44:03.959950  PCI: 00:10.7: enabled 0
  619 15:44:03.960651  PCI: 00:12.0: enabled 0
  620 15:44:03.963225  PCI: 00:12.6: enabled 0
  621 15:44:03.966459  PCI: 00:13.0: enabled 0
  622 15:44:03.969847  PCI: 00:14.0: enabled 1
  623 15:44:03.970314  PCI: 00:14.1: enabled 0
  624 15:44:03.973479  PCI: 00:14.2: enabled 1
  625 15:44:03.976731  PCI: 00:14.3: enabled 1
  626 15:44:03.979611  PCI: 00:15.0: enabled 1
  627 15:44:03.980116  PCI: 00:15.1: enabled 1
  628 15:44:03.982910  PCI: 00:15.2: enabled 1
  629 15:44:03.986879  PCI: 00:15.3: enabled 1
  630 15:44:03.989519  PCI: 00:16.0: enabled 1
  631 15:44:03.990003  PCI: 00:16.1: enabled 0
  632 15:44:03.993128  PCI: 00:16.2: enabled 0
  633 15:44:03.996218  PCI: 00:16.3: enabled 0
  634 15:44:03.996704  PCI: 00:16.4: enabled 0
  635 15:44:03.999584  PCI: 00:16.5: enabled 0
  636 15:44:04.002994  PCI: 00:17.0: enabled 1
  637 15:44:04.006237  PCI: 00:19.0: enabled 0
  638 15:44:04.006699  PCI: 00:19.1: enabled 1
  639 15:44:04.009590  PCI: 00:19.2: enabled 0
  640 15:44:04.012755  PCI: 00:1c.0: enabled 1
  641 15:44:04.016193  PCI: 00:1c.1: enabled 0
  642 15:44:04.016575  PCI: 00:1c.2: enabled 0
  643 15:44:04.019555  PCI: 00:1c.3: enabled 0
  644 15:44:04.023000  PCI: 00:1c.4: enabled 0
  645 15:44:04.026130  PCI: 00:1c.5: enabled 0
  646 15:44:04.026699  PCI: 00:1c.6: enabled 1
  647 15:44:04.029353  PCI: 00:1c.7: enabled 0
  648 15:44:04.032700  PCI: 00:1d.0: enabled 1
  649 15:44:04.036342  PCI: 00:1d.1: enabled 0
  650 15:44:04.036773  PCI: 00:1d.2: enabled 1
  651 15:44:04.039790  PCI: 00:1d.3: enabled 0
  652 15:44:04.042884  PCI: 00:1e.0: enabled 1
  653 15:44:04.043316  PCI: 00:1e.1: enabled 0
  654 15:44:04.046263  PCI: 00:1e.2: enabled 1
  655 15:44:04.049591  PCI: 00:1e.3: enabled 1
  656 15:44:04.052820  PCI: 00:1f.0: enabled 1
  657 15:44:04.053253  PCI: 00:1f.1: enabled 0
  658 15:44:04.056338  PCI: 00:1f.2: enabled 1
  659 15:44:04.059553  PCI: 00:1f.3: enabled 1
  660 15:44:04.062800  PCI: 00:1f.4: enabled 0
  661 15:44:04.063229  PCI: 00:1f.5: enabled 1
  662 15:44:04.066181  PCI: 00:1f.6: enabled 0
  663 15:44:04.069398  PCI: 00:1f.7: enabled 0
  664 15:44:04.069826  APIC: 00: enabled 1
  665 15:44:04.072564  GENERIC: 0.0: enabled 1
  666 15:44:04.076245  GENERIC: 0.0: enabled 1
  667 15:44:04.079388  GENERIC: 1.0: enabled 1
  668 15:44:04.079828  GENERIC: 0.0: enabled 1
  669 15:44:04.082811  GENERIC: 1.0: enabled 1
  670 15:44:04.085953  USB0 port 0: enabled 1
  671 15:44:04.089396  GENERIC: 0.0: enabled 1
  672 15:44:04.089849  USB0 port 0: enabled 1
  673 15:44:04.092981  GENERIC: 0.0: enabled 1
  674 15:44:04.095877  I2C: 00:1a: enabled 1
  675 15:44:04.096341  I2C: 00:31: enabled 1
  676 15:44:04.099376  I2C: 00:32: enabled 1
  677 15:44:04.102587  I2C: 00:10: enabled 1
  678 15:44:04.103028  I2C: 00:15: enabled 1
  679 15:44:04.106071  GENERIC: 0.0: enabled 0
  680 15:44:04.109267  GENERIC: 1.0: enabled 0
  681 15:44:04.112436  GENERIC: 0.0: enabled 1
  682 15:44:04.112876  SPI: 00: enabled 1
  683 15:44:04.115933  SPI: 00: enabled 1
  684 15:44:04.116378  PNP: 0c09.0: enabled 1
  685 15:44:04.119384  GENERIC: 0.0: enabled 1
  686 15:44:04.122630  USB3 port 0: enabled 1
  687 15:44:04.125693  USB3 port 1: enabled 1
  688 15:44:04.126134  USB3 port 2: enabled 0
  689 15:44:04.128975  USB3 port 3: enabled 0
  690 15:44:04.132391  USB2 port 0: enabled 0
  691 15:44:04.132829  USB2 port 1: enabled 1
  692 15:44:04.135890  USB2 port 2: enabled 1
  693 15:44:04.139055  USB2 port 3: enabled 0
  694 15:44:04.142563  USB2 port 4: enabled 1
  695 15:44:04.143014  USB2 port 5: enabled 0
  696 15:44:04.145848  USB2 port 6: enabled 0
  697 15:44:04.149018  USB2 port 7: enabled 0
  698 15:44:04.149452  USB2 port 8: enabled 0
  699 15:44:04.152359  USB2 port 9: enabled 0
  700 15:44:04.155756  USB3 port 0: enabled 0
  701 15:44:04.156203  USB3 port 1: enabled 1
  702 15:44:04.159208  USB3 port 2: enabled 0
  703 15:44:04.162318  USB3 port 3: enabled 0
  704 15:44:04.165995  GENERIC: 0.0: enabled 1
  705 15:44:04.166563  GENERIC: 1.0: enabled 1
  706 15:44:04.169173  APIC: 01: enabled 1
  707 15:44:04.172290  APIC: 03: enabled 1
  708 15:44:04.172722  APIC: 05: enabled 1
  709 15:44:04.175786  APIC: 07: enabled 1
  710 15:44:04.176248  APIC: 06: enabled 1
  711 15:44:04.179008  APIC: 02: enabled 1
  712 15:44:04.182228  APIC: 04: enabled 1
  713 15:44:04.182660  Compare with tree...
  714 15:44:04.185594  Root Device: enabled 1
  715 15:44:04.189222   DOMAIN: 0000: enabled 1
  716 15:44:04.192741    PCI: 00:00.0: enabled 1
  717 15:44:04.193174    PCI: 00:02.0: enabled 1
  718 15:44:04.195811    PCI: 00:04.0: enabled 1
  719 15:44:04.199354     GENERIC: 0.0: enabled 1
  720 15:44:04.202470    PCI: 00:05.0: enabled 1
  721 15:44:04.205646    PCI: 00:06.0: enabled 0
  722 15:44:04.206076    PCI: 00:07.0: enabled 0
  723 15:44:04.208997     GENERIC: 0.0: enabled 1
  724 15:44:04.212416    PCI: 00:07.1: enabled 0
  725 15:44:04.215949     GENERIC: 1.0: enabled 1
  726 15:44:04.218873    PCI: 00:07.2: enabled 0
  727 15:44:04.219308     GENERIC: 0.0: enabled 1
  728 15:44:04.222361    PCI: 00:07.3: enabled 0
  729 15:44:04.226003     GENERIC: 1.0: enabled 1
  730 15:44:04.228954    PCI: 00:08.0: enabled 1
  731 15:44:04.232297    PCI: 00:09.0: enabled 0
  732 15:44:04.232732    PCI: 00:0a.0: enabled 0
  733 15:44:04.235719    PCI: 00:0d.0: enabled 1
  734 15:44:04.238988     USB0 port 0: enabled 1
  735 15:44:04.242573      USB3 port 0: enabled 1
  736 15:44:04.245641      USB3 port 1: enabled 1
  737 15:44:04.246084      USB3 port 2: enabled 0
  738 15:44:04.249123      USB3 port 3: enabled 0
  739 15:44:04.252692    PCI: 00:0d.1: enabled 0
  740 15:44:04.255553    PCI: 00:0d.2: enabled 0
  741 15:44:04.258939     GENERIC: 0.0: enabled 1
  742 15:44:04.259381    PCI: 00:0d.3: enabled 0
  743 15:44:04.262392    PCI: 00:0e.0: enabled 0
  744 15:44:04.265714    PCI: 00:10.2: enabled 1
  745 15:44:04.269027    PCI: 00:10.6: enabled 0
  746 15:44:04.272404    PCI: 00:10.7: enabled 0
  747 15:44:04.272845    PCI: 00:12.0: enabled 0
  748 15:44:04.275572    PCI: 00:12.6: enabled 0
  749 15:44:04.278804    PCI: 00:13.0: enabled 0
  750 15:44:04.282388    PCI: 00:14.0: enabled 1
  751 15:44:04.285555     USB0 port 0: enabled 1
  752 15:44:04.285995      USB2 port 0: enabled 0
  753 15:44:04.289490      USB2 port 1: enabled 1
  754 15:44:04.292502      USB2 port 2: enabled 1
  755 15:44:04.295729      USB2 port 3: enabled 0
  756 15:44:04.298780      USB2 port 4: enabled 1
  757 15:44:04.302287      USB2 port 5: enabled 0
  758 15:44:04.302727      USB2 port 6: enabled 0
  759 15:44:04.305516      USB2 port 7: enabled 0
  760 15:44:04.308707      USB2 port 8: enabled 0
  761 15:44:04.312118      USB2 port 9: enabled 0
  762 15:44:04.315539      USB3 port 0: enabled 0
  763 15:44:04.316015      USB3 port 1: enabled 1
  764 15:44:04.318695      USB3 port 2: enabled 0
  765 15:44:04.322056      USB3 port 3: enabled 0
  766 15:44:04.325408    PCI: 00:14.1: enabled 0
  767 15:44:04.328987    PCI: 00:14.2: enabled 1
  768 15:44:04.329428    PCI: 00:14.3: enabled 1
  769 15:44:04.332025     GENERIC: 0.0: enabled 1
  770 15:44:04.335570    PCI: 00:15.0: enabled 1
  771 15:44:04.339170     I2C: 00:1a: enabled 1
  772 15:44:04.341924     I2C: 00:31: enabled 1
  773 15:44:04.342365     I2C: 00:32: enabled 1
  774 15:44:04.345234    PCI: 00:15.1: enabled 1
  775 15:44:04.348540     I2C: 00:10: enabled 1
  776 15:44:04.351981    PCI: 00:15.2: enabled 1
  777 15:44:04.355308    PCI: 00:15.3: enabled 1
  778 15:44:04.355750    PCI: 00:16.0: enabled 1
  779 15:44:04.358948    PCI: 00:16.1: enabled 0
  780 15:44:04.362309    PCI: 00:16.2: enabled 0
  781 15:44:04.365747    PCI: 00:16.3: enabled 0
  782 15:44:04.368749    PCI: 00:16.4: enabled 0
  783 15:44:04.369190    PCI: 00:16.5: enabled 0
  784 15:44:04.371902    PCI: 00:17.0: enabled 1
  785 15:44:04.375290    PCI: 00:19.0: enabled 0
  786 15:44:04.378787    PCI: 00:19.1: enabled 1
  787 15:44:04.379230     I2C: 00:15: enabled 1
  788 15:44:04.381996    PCI: 00:19.2: enabled 0
  789 15:44:04.385572    PCI: 00:1d.0: enabled 1
  790 15:44:04.388781     GENERIC: 0.0: enabled 1
  791 15:44:04.391977    PCI: 00:1e.0: enabled 1
  792 15:44:04.392419    PCI: 00:1e.1: enabled 0
  793 15:44:04.395796    PCI: 00:1e.2: enabled 1
  794 15:44:04.399102     SPI: 00: enabled 1
  795 15:44:04.402771    PCI: 00:1e.3: enabled 1
  796 15:44:04.403203     SPI: 00: enabled 1
  797 15:44:04.406300    PCI: 00:1f.0: enabled 1
  798 15:44:04.457271     PNP: 0c09.0: enabled 1
  799 15:44:04.457758    PCI: 00:1f.1: enabled 0
  800 15:44:04.458117    PCI: 00:1f.2: enabled 1
  801 15:44:04.458493     GENERIC: 0.0: enabled 1
  802 15:44:04.458808      GENERIC: 0.0: enabled 1
  803 15:44:04.459165      GENERIC: 1.0: enabled 1
  804 15:44:04.459463    PCI: 00:1f.3: enabled 1
  805 15:44:04.460199    PCI: 00:1f.4: enabled 0
  806 15:44:04.460552    PCI: 00:1f.5: enabled 1
  807 15:44:04.460895    PCI: 00:1f.6: enabled 0
  808 15:44:04.461203    PCI: 00:1f.7: enabled 0
  809 15:44:04.461536   CPU_CLUSTER: 0: enabled 1
  810 15:44:04.461853    APIC: 00: enabled 1
  811 15:44:04.462174    APIC: 01: enabled 1
  812 15:44:04.462486    APIC: 03: enabled 1
  813 15:44:04.462805    APIC: 05: enabled 1
  814 15:44:04.463099    APIC: 07: enabled 1
  815 15:44:04.463398    APIC: 06: enabled 1
  816 15:44:04.463742    APIC: 02: enabled 1
  817 15:44:04.464105    APIC: 04: enabled 1
  818 15:44:04.464784  Root Device scanning...
  819 15:44:04.465116  scan_static_bus for Root Device
  820 15:44:04.465458  DOMAIN: 0000 enabled
  821 15:44:04.468072  CPU_CLUSTER: 0 enabled
  822 15:44:04.471343  DOMAIN: 0000 scanning...
  823 15:44:04.474488  PCI: pci_scan_bus for bus 00
  824 15:44:04.477972  PCI: 00:00.0 [8086/0000] ops
  825 15:44:04.481114  PCI: 00:00.0 [8086/9a12] enabled
  826 15:44:04.484440  PCI: 00:02.0 [8086/0000] bus ops
  827 15:44:04.487818  PCI: 00:02.0 [8086/9a40] enabled
  828 15:44:04.491328  PCI: 00:04.0 [8086/0000] bus ops
  829 15:44:04.494982  PCI: 00:04.0 [8086/9a03] enabled
  830 15:44:04.498017  PCI: 00:05.0 [8086/9a19] enabled
  831 15:44:04.501208  PCI: 00:07.0 [0000/0000] hidden
  832 15:44:04.504719  PCI: 00:08.0 [8086/9a11] enabled
  833 15:44:04.508075  PCI: 00:0a.0 [8086/9a0d] disabled
  834 15:44:04.511275  PCI: 00:0d.0 [8086/0000] bus ops
  835 15:44:04.514609  PCI: 00:0d.0 [8086/9a13] enabled
  836 15:44:04.518010  PCI: 00:14.0 [8086/0000] bus ops
  837 15:44:04.521117  PCI: 00:14.0 [8086/a0ed] enabled
  838 15:44:04.524600  PCI: 00:14.2 [8086/a0ef] enabled
  839 15:44:04.527771  PCI: 00:14.3 [8086/0000] bus ops
  840 15:44:04.531224  PCI: 00:14.3 [8086/a0f0] enabled
  841 15:44:04.534473  PCI: 00:15.0 [8086/0000] bus ops
  842 15:44:04.538041  PCI: 00:15.0 [8086/a0e8] enabled
  843 15:44:04.541242  PCI: 00:15.1 [8086/0000] bus ops
  844 15:44:04.544658  PCI: 00:15.1 [8086/a0e9] enabled
  845 15:44:04.547633  PCI: 00:15.2 [8086/0000] bus ops
  846 15:44:04.551164  PCI: 00:15.2 [8086/a0ea] enabled
  847 15:44:04.554580  PCI: 00:15.3 [8086/0000] bus ops
  848 15:44:04.557684  PCI: 00:15.3 [8086/a0eb] enabled
  849 15:44:04.561081  PCI: 00:16.0 [8086/0000] ops
  850 15:44:04.564346  PCI: 00:16.0 [8086/a0e0] enabled
  851 15:44:04.567880  PCI: Static device PCI: 00:17.0 not found, disabling it.
  852 15:44:04.571231  PCI: 00:19.0 [8086/0000] bus ops
  853 15:44:04.574572  PCI: 00:19.0 [8086/a0c5] disabled
  854 15:44:04.577604  PCI: 00:19.1 [8086/0000] bus ops
  855 15:44:04.581184  PCI: 00:19.1 [8086/a0c6] enabled
  856 15:44:04.584705  PCI: 00:1d.0 [8086/0000] bus ops
  857 15:44:04.587727  PCI: 00:1d.0 [8086/a0b0] enabled
  858 15:44:04.591179  PCI: 00:1e.0 [8086/0000] ops
  859 15:44:04.594519  PCI: 00:1e.0 [8086/a0a8] enabled
  860 15:44:04.597617  PCI: 00:1e.2 [8086/0000] bus ops
  861 15:44:04.601137  PCI: 00:1e.2 [8086/a0aa] enabled
  862 15:44:04.604721  PCI: 00:1e.3 [8086/0000] bus ops
  863 15:44:04.607963  PCI: 00:1e.3 [8086/a0ab] enabled
  864 15:44:04.611022  PCI: 00:1f.0 [8086/0000] bus ops
  865 15:44:04.614491  PCI: 00:1f.0 [8086/a087] enabled
  866 15:44:04.617596  RTC Init
  867 15:44:04.620933  Set power on after power failure.
  868 15:44:04.621364  Disabling Deep S3
  869 15:44:04.624238  Disabling Deep S3
  870 15:44:04.624669  Disabling Deep S4
  871 15:44:04.627646  Disabling Deep S4
  872 15:44:04.628103  Disabling Deep S5
  873 15:44:04.630819  Disabling Deep S5
  874 15:44:04.634198  PCI: 00:1f.2 [0000/0000] hidden
  875 15:44:04.637809  PCI: 00:1f.3 [8086/0000] bus ops
  876 15:44:04.640914  PCI: 00:1f.3 [8086/a0c8] enabled
  877 15:44:04.644432  PCI: 00:1f.5 [8086/0000] bus ops
  878 15:44:04.647583  PCI: 00:1f.5 [8086/a0a4] enabled
  879 15:44:04.650871  PCI: Leftover static devices:
  880 15:44:04.651304  PCI: 00:10.2
  881 15:44:04.654185  PCI: 00:10.6
  882 15:44:04.654618  PCI: 00:10.7
  883 15:44:04.657565  PCI: 00:06.0
  884 15:44:04.657995  PCI: 00:07.1
  885 15:44:04.658378  PCI: 00:07.2
  886 15:44:04.660973  PCI: 00:07.3
  887 15:44:04.661404  PCI: 00:09.0
  888 15:44:04.664278  PCI: 00:0d.1
  889 15:44:04.664853  PCI: 00:0d.2
  890 15:44:04.665210  PCI: 00:0d.3
  891 15:44:04.667748  PCI: 00:0e.0
  892 15:44:04.668215  PCI: 00:12.0
  893 15:44:04.671217  PCI: 00:12.6
  894 15:44:04.671646  PCI: 00:13.0
  895 15:44:04.674585  PCI: 00:14.1
  896 15:44:04.675018  PCI: 00:16.1
  897 15:44:04.675354  PCI: 00:16.2
  898 15:44:04.677782  PCI: 00:16.3
  899 15:44:04.678212  PCI: 00:16.4
  900 15:44:04.680765  PCI: 00:16.5
  901 15:44:04.681194  PCI: 00:17.0
  902 15:44:04.681529  PCI: 00:19.2
  903 15:44:04.684437  PCI: 00:1e.1
  904 15:44:04.684867  PCI: 00:1f.1
  905 15:44:04.687878  PCI: 00:1f.4
  906 15:44:04.688309  PCI: 00:1f.6
  907 15:44:04.688646  PCI: 00:1f.7
  908 15:44:04.690887  PCI: Check your devicetree.cb.
  909 15:44:04.694116  PCI: 00:02.0 scanning...
  910 15:44:04.697421  scan_generic_bus for PCI: 00:02.0
  911 15:44:04.700950  scan_generic_bus for PCI: 00:02.0 done
  912 15:44:04.707616  scan_bus: bus PCI: 00:02.0 finished in 7 msecs
  913 15:44:04.710938  PCI: 00:04.0 scanning...
  914 15:44:04.714035  scan_generic_bus for PCI: 00:04.0
  915 15:44:04.714471  GENERIC: 0.0 enabled
  916 15:44:04.720762  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
  917 15:44:04.727494  scan_bus: bus PCI: 00:04.0 finished in 11 msecs
  918 15:44:04.727959  PCI: 00:0d.0 scanning...
  919 15:44:04.730730  scan_static_bus for PCI: 00:0d.0
  920 15:44:04.734098  USB0 port 0 enabled
  921 15:44:04.737534  USB0 port 0 scanning...
  922 15:44:04.740720  scan_static_bus for USB0 port 0
  923 15:44:04.741153  USB3 port 0 enabled
  924 15:44:04.744014  USB3 port 1 enabled
  925 15:44:04.747259  USB3 port 2 disabled
  926 15:44:04.747708  USB3 port 3 disabled
  927 15:44:04.750621  USB3 port 0 scanning...
  928 15:44:04.754098  scan_static_bus for USB3 port 0
  929 15:44:04.757270  scan_static_bus for USB3 port 0 done
  930 15:44:04.763955  scan_bus: bus USB3 port 0 finished in 6 msecs
  931 15:44:04.764402  USB3 port 1 scanning...
  932 15:44:04.767148  scan_static_bus for USB3 port 1
  933 15:44:04.774006  scan_static_bus for USB3 port 1 done
  934 15:44:04.777291  scan_bus: bus USB3 port 1 finished in 6 msecs
  935 15:44:04.780338  scan_static_bus for USB0 port 0 done
  936 15:44:04.783746  scan_bus: bus USB0 port 0 finished in 43 msecs
  937 15:44:04.791037  scan_static_bus for PCI: 00:0d.0 done
  938 15:44:04.793448  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
  939 15:44:04.796621  PCI: 00:14.0 scanning...
  940 15:44:04.800042  scan_static_bus for PCI: 00:14.0
  941 15:44:04.803565  USB0 port 0 enabled
  942 15:44:04.803663  USB0 port 0 scanning...
  943 15:44:04.806674  scan_static_bus for USB0 port 0
  944 15:44:04.809938  USB2 port 0 disabled
  945 15:44:04.813888  USB2 port 1 enabled
  946 15:44:04.813973  USB2 port 2 enabled
  947 15:44:04.816690  USB2 port 3 disabled
  948 15:44:04.816776  USB2 port 4 enabled
  949 15:44:04.819823  USB2 port 5 disabled
  950 15:44:04.823239  USB2 port 6 disabled
  951 15:44:04.823330  USB2 port 7 disabled
  952 15:44:04.826905  USB2 port 8 disabled
  953 15:44:04.829876  USB2 port 9 disabled
  954 15:44:04.829961  USB3 port 0 disabled
  955 15:44:04.833028  USB3 port 1 enabled
  956 15:44:04.836590  USB3 port 2 disabled
  957 15:44:04.836675  USB3 port 3 disabled
  958 15:44:04.839630  USB2 port 1 scanning...
  959 15:44:04.842954  scan_static_bus for USB2 port 1
  960 15:44:04.846681  scan_static_bus for USB2 port 1 done
  961 15:44:04.853525  scan_bus: bus USB2 port 1 finished in 6 msecs
  962 15:44:04.853611  USB2 port 2 scanning...
  963 15:44:04.856680  scan_static_bus for USB2 port 2
  964 15:44:04.860020  scan_static_bus for USB2 port 2 done
  965 15:44:04.866615  scan_bus: bus USB2 port 2 finished in 6 msecs
  966 15:44:04.869841  USB2 port 4 scanning...
  967 15:44:04.873449  scan_static_bus for USB2 port 4
  968 15:44:04.876788  scan_static_bus for USB2 port 4 done
  969 15:44:04.879758  scan_bus: bus USB2 port 4 finished in 6 msecs
  970 15:44:04.883080  USB3 port 1 scanning...
  971 15:44:04.886482  scan_static_bus for USB3 port 1
  972 15:44:04.889873  scan_static_bus for USB3 port 1 done
  973 15:44:04.893104  scan_bus: bus USB3 port 1 finished in 6 msecs
  974 15:44:04.896870  scan_static_bus for USB0 port 0 done
  975 15:44:04.902878  scan_bus: bus USB0 port 0 finished in 93 msecs
  976 15:44:04.906398  scan_static_bus for PCI: 00:14.0 done
  977 15:44:04.913092  scan_bus: bus PCI: 00:14.0 finished in 110 msecs
  978 15:44:04.913186  PCI: 00:14.3 scanning...
  979 15:44:04.916250  scan_static_bus for PCI: 00:14.3
  980 15:44:04.919730  GENERIC: 0.0 enabled
  981 15:44:04.923504  scan_static_bus for PCI: 00:14.3 done
  982 15:44:04.929282  scan_bus: bus PCI: 00:14.3 finished in 9 msecs
  983 15:44:04.929368  PCI: 00:15.0 scanning...
  984 15:44:04.932882  scan_static_bus for PCI: 00:15.0
  985 15:44:04.936123  I2C: 00:1a enabled
  986 15:44:04.939779  I2C: 00:31 enabled
  987 15:44:04.939869  I2C: 00:32 enabled
  988 15:44:04.942635  scan_static_bus for PCI: 00:15.0 done
  989 15:44:04.949565  scan_bus: bus PCI: 00:15.0 finished in 12 msecs
  990 15:44:04.952555  PCI: 00:15.1 scanning...
  991 15:44:04.955935  scan_static_bus for PCI: 00:15.1
  992 15:44:04.956020  I2C: 00:10 enabled
  993 15:44:04.959707  scan_static_bus for PCI: 00:15.1 done
  994 15:44:04.965987  scan_bus: bus PCI: 00:15.1 finished in 9 msecs
  995 15:44:04.969247  PCI: 00:15.2 scanning...
  996 15:44:04.972816  scan_static_bus for PCI: 00:15.2
  997 15:44:04.976064  scan_static_bus for PCI: 00:15.2 done
  998 15:44:04.979734  scan_bus: bus PCI: 00:15.2 finished in 7 msecs
  999 15:44:04.983358  PCI: 00:15.3 scanning...
 1000 15:44:04.987344  scan_static_bus for PCI: 00:15.3
 1001 15:44:04.990215  scan_static_bus for PCI: 00:15.3 done
 1002 15:44:04.993199  scan_bus: bus PCI: 00:15.3 finished in 7 msecs
 1003 15:44:04.996374  PCI: 00:19.1 scanning...
 1004 15:44:04.999662  scan_static_bus for PCI: 00:19.1
 1005 15:44:05.002876  I2C: 00:15 enabled
 1006 15:44:05.006230  scan_static_bus for PCI: 00:19.1 done
 1007 15:44:05.009558  scan_bus: bus PCI: 00:19.1 finished in 9 msecs
 1008 15:44:05.012978  PCI: 00:1d.0 scanning...
 1009 15:44:05.016213  do_pci_scan_bridge for PCI: 00:1d.0
 1010 15:44:05.019838  PCI: pci_scan_bus for bus 01
 1011 15:44:05.022682  PCI: 01:00.0 [1c5c/174a] enabled
 1012 15:44:05.026291  GENERIC: 0.0 enabled
 1013 15:44:05.029571  Enabling Common Clock Configuration
 1014 15:44:05.032845  L1 Sub-State supported from root port 29
 1015 15:44:05.036200  L1 Sub-State Support = 0xf
 1016 15:44:05.039425  CommonModeRestoreTime = 0x28
 1017 15:44:05.042795  Power On Value = 0x16, Power On Scale = 0x0
 1018 15:44:05.046017  ASPM: Enabled L1
 1019 15:44:05.049508  PCIe: Max_Payload_Size adjusted to 128
 1020 15:44:05.052921  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
 1021 15:44:05.056198  PCI: 00:1e.2 scanning...
 1022 15:44:05.059528  scan_generic_bus for PCI: 00:1e.2
 1023 15:44:05.062558  SPI: 00 enabled
 1024 15:44:05.069522  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
 1025 15:44:05.072576  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
 1026 15:44:05.075904  PCI: 00:1e.3 scanning...
 1027 15:44:05.079707  scan_generic_bus for PCI: 00:1e.3
 1028 15:44:05.079793  SPI: 00 enabled
 1029 15:44:05.085963  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
 1030 15:44:05.092441  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
 1031 15:44:05.095994  PCI: 00:1f.0 scanning...
 1032 15:44:05.099417  scan_static_bus for PCI: 00:1f.0
 1033 15:44:05.099501  PNP: 0c09.0 enabled
 1034 15:44:05.102343  PNP: 0c09.0 scanning...
 1035 15:44:05.105682  scan_static_bus for PNP: 0c09.0
 1036 15:44:05.109450  scan_static_bus for PNP: 0c09.0 done
 1037 15:44:05.112614  scan_bus: bus PNP: 0c09.0 finished in 6 msecs
 1038 15:44:05.119189  scan_static_bus for PCI: 00:1f.0 done
 1039 15:44:05.122735  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
 1040 15:44:05.125997  PCI: 00:1f.2 scanning...
 1041 15:44:05.129343  scan_static_bus for PCI: 00:1f.2
 1042 15:44:05.132459  GENERIC: 0.0 enabled
 1043 15:44:05.132544  GENERIC: 0.0 scanning...
 1044 15:44:05.135989  scan_static_bus for GENERIC: 0.0
 1045 15:44:05.139692  GENERIC: 0.0 enabled
 1046 15:44:05.142628  GENERIC: 1.0 enabled
 1047 15:44:05.145806  scan_static_bus for GENERIC: 0.0 done
 1048 15:44:05.149134  scan_bus: bus GENERIC: 0.0 finished in 11 msecs
 1049 15:44:05.152440  scan_static_bus for PCI: 00:1f.2 done
 1050 15:44:05.159209  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
 1051 15:44:05.162416  PCI: 00:1f.3 scanning...
 1052 15:44:05.165793  scan_static_bus for PCI: 00:1f.3
 1053 15:44:05.169004  scan_static_bus for PCI: 00:1f.3 done
 1054 15:44:05.172268  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
 1055 15:44:05.175833  PCI: 00:1f.5 scanning...
 1056 15:44:05.179032  scan_generic_bus for PCI: 00:1f.5
 1057 15:44:05.182247  scan_generic_bus for PCI: 00:1f.5 done
 1058 15:44:05.189094  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
 1059 15:44:05.192594  scan_bus: bus DOMAIN: 0000 finished in 717 msecs
 1060 15:44:05.195534  scan_static_bus for Root Device done
 1061 15:44:05.202230  scan_bus: bus Root Device finished in 736 msecs
 1062 15:44:05.202316  done
 1063 15:44:05.209047  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
 1064 15:44:05.212235  Chrome EC: UHEPI supported
 1065 15:44:05.218737  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
 1066 15:44:05.225728  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
 1067 15:44:05.228809  SPI flash protection: WPSW=0 SRP0=0
 1068 15:44:05.232026  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1069 15:44:05.238751  BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
 1070 15:44:05.242284  found VGA at PCI: 00:02.0
 1071 15:44:05.245437  Setting up VGA for PCI: 00:02.0
 1072 15:44:05.248834  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1073 15:44:05.255310  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1074 15:44:05.258594  Allocating resources...
 1075 15:44:05.258680  Reading resources...
 1076 15:44:05.265144  Root Device read_resources bus 0 link: 0
 1077 15:44:05.268290  DOMAIN: 0000 read_resources bus 0 link: 0
 1078 15:44:05.272126  PCI: 00:04.0 read_resources bus 1 link: 0
 1079 15:44:05.278861  PCI: 00:04.0 read_resources bus 1 link: 0 done
 1080 15:44:05.282549  PCI: 00:0d.0 read_resources bus 0 link: 0
 1081 15:44:05.288937  USB0 port 0 read_resources bus 0 link: 0
 1082 15:44:05.292033  USB0 port 0 read_resources bus 0 link: 0 done
 1083 15:44:05.298504  PCI: 00:0d.0 read_resources bus 0 link: 0 done
 1084 15:44:05.301982  PCI: 00:14.0 read_resources bus 0 link: 0
 1085 15:44:05.305579  USB0 port 0 read_resources bus 0 link: 0
 1086 15:44:05.313234  USB0 port 0 read_resources bus 0 link: 0 done
 1087 15:44:05.316324  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1088 15:44:05.323132  PCI: 00:14.3 read_resources bus 0 link: 0
 1089 15:44:05.326808  PCI: 00:14.3 read_resources bus 0 link: 0 done
 1090 15:44:05.333280  PCI: 00:15.0 read_resources bus 0 link: 0
 1091 15:44:05.336931  PCI: 00:15.0 read_resources bus 0 link: 0 done
 1092 15:44:05.343551  PCI: 00:15.1 read_resources bus 0 link: 0
 1093 15:44:05.346446  PCI: 00:15.1 read_resources bus 0 link: 0 done
 1094 15:44:05.353732  PCI: 00:19.1 read_resources bus 0 link: 0
 1095 15:44:05.357139  PCI: 00:19.1 read_resources bus 0 link: 0 done
 1096 15:44:05.363616  PCI: 00:1d.0 read_resources bus 1 link: 0
 1097 15:44:05.367182  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1098 15:44:05.373770  PCI: 00:1e.2 read_resources bus 2 link: 0
 1099 15:44:05.377257  PCI: 00:1e.2 read_resources bus 2 link: 0 done
 1100 15:44:05.383612  PCI: 00:1e.3 read_resources bus 3 link: 0
 1101 15:44:05.387273  PCI: 00:1e.3 read_resources bus 3 link: 0 done
 1102 15:44:05.393882  PCI: 00:1f.0 read_resources bus 0 link: 0
 1103 15:44:05.396958  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1104 15:44:05.400656  PCI: 00:1f.2 read_resources bus 0 link: 0
 1105 15:44:05.407472  GENERIC: 0.0 read_resources bus 0 link: 0
 1106 15:44:05.410208  GENERIC: 0.0 read_resources bus 0 link: 0 done
 1107 15:44:05.417064  PCI: 00:1f.2 read_resources bus 0 link: 0 done
 1108 15:44:05.423857  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1109 15:44:05.427437  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1110 15:44:05.430476  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1111 15:44:05.437280  Root Device read_resources bus 0 link: 0 done
 1112 15:44:05.440428  Done reading resources.
 1113 15:44:05.443822  Show resources in subtree (Root Device)...After reading.
 1114 15:44:05.450562   Root Device child on link 0 DOMAIN: 0000
 1115 15:44:05.453580    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1116 15:44:05.463753    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1117 15:44:05.473724    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1118 15:44:05.473812     PCI: 00:00.0
 1119 15:44:05.483734     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1120 15:44:05.493726     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1121 15:44:05.503916     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1122 15:44:05.513495     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1123 15:44:05.520169     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1124 15:44:05.530603     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1125 15:44:05.540276     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1126 15:44:05.550165     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1127 15:44:05.559969     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1128 15:44:05.566863     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1129 15:44:05.576528     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1130 15:44:05.586564     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1131 15:44:05.596765     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1132 15:44:05.606311     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1133 15:44:05.612948     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1134 15:44:05.623183     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1135 15:44:05.633340     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1136 15:44:05.643100     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1137 15:44:05.653012     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1138 15:44:05.663239     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1139 15:44:05.663326     PCI: 00:02.0
 1140 15:44:05.672921     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1141 15:44:05.686274     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1142 15:44:05.692804     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1143 15:44:05.696368     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1144 15:44:05.709391     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
 1145 15:44:05.709480      GENERIC: 0.0
 1146 15:44:05.713068     PCI: 00:05.0
 1147 15:44:05.722825     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1148 15:44:05.726358     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1149 15:44:05.729634      GENERIC: 0.0
 1150 15:44:05.729722     PCI: 00:08.0
 1151 15:44:05.739345     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1152 15:44:05.742578     PCI: 00:0a.0
 1153 15:44:05.746046     PCI: 00:0d.0 child on link 0 USB0 port 0
 1154 15:44:05.755800     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1155 15:44:05.759143      USB0 port 0 child on link 0 USB3 port 0
 1156 15:44:05.762548       USB3 port 0
 1157 15:44:05.762634       USB3 port 1
 1158 15:44:05.766053       USB3 port 2
 1159 15:44:05.766146       USB3 port 3
 1160 15:44:05.772638     PCI: 00:14.0 child on link 0 USB0 port 0
 1161 15:44:05.782655     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1162 15:44:05.786172      USB0 port 0 child on link 0 USB2 port 0
 1163 15:44:05.789314       USB2 port 0
 1164 15:44:05.789400       USB2 port 1
 1165 15:44:05.792828       USB2 port 2
 1166 15:44:05.792913       USB2 port 3
 1167 15:44:05.795958       USB2 port 4
 1168 15:44:05.796044       USB2 port 5
 1169 15:44:05.799157       USB2 port 6
 1170 15:44:05.799243       USB2 port 7
 1171 15:44:05.802940       USB2 port 8
 1172 15:44:05.803026       USB2 port 9
 1173 15:44:05.806055       USB3 port 0
 1174 15:44:05.806141       USB3 port 1
 1175 15:44:05.809740       USB3 port 2
 1176 15:44:05.809826       USB3 port 3
 1177 15:44:05.812864     PCI: 00:14.2
 1178 15:44:05.822387     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1179 15:44:05.832187     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1180 15:44:05.835998     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1181 15:44:05.846111     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1182 15:44:05.849083      GENERIC: 0.0
 1183 15:44:05.852415     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1184 15:44:05.862362     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1185 15:44:05.865562      I2C: 00:1a
 1186 15:44:05.865647      I2C: 00:31
 1187 15:44:05.868984      I2C: 00:32
 1188 15:44:05.872351     PCI: 00:15.1 child on link 0 I2C: 00:10
 1189 15:44:05.882467     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1190 15:44:05.882553      I2C: 00:10
 1191 15:44:05.885812     PCI: 00:15.2
 1192 15:44:05.895452     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1193 15:44:05.895538     PCI: 00:15.3
 1194 15:44:05.905749     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1195 15:44:05.908865     PCI: 00:16.0
 1196 15:44:05.918888     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1197 15:44:05.918973     PCI: 00:19.0
 1198 15:44:05.925764     PCI: 00:19.1 child on link 0 I2C: 00:15
 1199 15:44:05.935312     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1200 15:44:05.935405      I2C: 00:15
 1201 15:44:05.938612     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1202 15:44:05.948618     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1203 15:44:05.958500     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1204 15:44:05.968777     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1205 15:44:05.968864      GENERIC: 0.0
 1206 15:44:05.972027      PCI: 01:00.0
 1207 15:44:05.981988      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1208 15:44:05.992115      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
 1209 15:44:05.998362      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
 1210 15:44:06.001735     PCI: 00:1e.0
 1211 15:44:06.011775     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1212 15:44:06.015251     PCI: 00:1e.2 child on link 0 SPI: 00
 1213 15:44:06.025187     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1214 15:44:06.028568      SPI: 00
 1215 15:44:06.031831     PCI: 00:1e.3 child on link 0 SPI: 00
 1216 15:44:06.041856     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1217 15:44:06.041943      SPI: 00
 1218 15:44:06.048801     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1219 15:44:06.054957     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1220 15:44:06.058117      PNP: 0c09.0
 1221 15:44:06.065108      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1222 15:44:06.071524     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1223 15:44:06.081689     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1224 15:44:06.088523     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1225 15:44:06.094854      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1226 15:44:06.094940       GENERIC: 0.0
 1227 15:44:06.098115       GENERIC: 1.0
 1228 15:44:06.098201     PCI: 00:1f.3
 1229 15:44:06.108011     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1230 15:44:06.121514     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1231 15:44:06.121601     PCI: 00:1f.5
 1232 15:44:06.131595     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1233 15:44:06.134663    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1234 15:44:06.134752     APIC: 00
 1235 15:44:06.137823     APIC: 01
 1236 15:44:06.137908     APIC: 03
 1237 15:44:06.141626     APIC: 05
 1238 15:44:06.141712     APIC: 07
 1239 15:44:06.141778     APIC: 06
 1240 15:44:06.144801     APIC: 02
 1241 15:44:06.144888     APIC: 04
 1242 15:44:06.151277  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
 1243 15:44:06.157985   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
 1244 15:44:06.164415   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 1245 15:44:06.171371   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
 1246 15:44:06.174654    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1247 15:44:06.177853    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem
 1248 15:44:06.184569    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem
 1249 15:44:06.191122   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 1250 15:44:06.197852   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1251 15:44:06.204485   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1252 15:44:06.214745  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
 1253 15:44:06.217689  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1254 15:44:06.227502   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1255 15:44:06.234501   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
 1256 15:44:06.241000   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
 1257 15:44:06.244100   DOMAIN: 0000: Resource ranges:
 1258 15:44:06.247767   * Base: 1000, Size: 800, Tag: 100
 1259 15:44:06.250746   * Base: 1900, Size: e700, Tag: 100
 1260 15:44:06.257438    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
 1261 15:44:06.264442  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
 1262 15:44:06.270807  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
 1263 15:44:06.277903   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
 1264 15:44:06.287569   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
 1265 15:44:06.294141   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
 1266 15:44:06.300796   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
 1267 15:44:06.310743   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
 1268 15:44:06.317608   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
 1269 15:44:06.324343   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
 1270 15:44:06.331215   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
 1271 15:44:06.340743   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
 1272 15:44:06.347410   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
 1273 15:44:06.353912   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
 1274 15:44:06.364176   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
 1275 15:44:06.371164   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
 1276 15:44:06.377273   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
 1277 15:44:06.387137   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
 1278 15:44:06.393739   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
 1279 15:44:06.400423   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
 1280 15:44:06.410497   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
 1281 15:44:06.417221   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
 1282 15:44:06.423885   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
 1283 15:44:06.433672   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
 1284 15:44:06.440502   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
 1285 15:44:06.443531   DOMAIN: 0000: Resource ranges:
 1286 15:44:06.446780   * Base: 7fc00000, Size: 40400000, Tag: 200
 1287 15:44:06.453936   * Base: d0000000, Size: 28000000, Tag: 200
 1288 15:44:06.457215   * Base: fa000000, Size: 1000000, Tag: 200
 1289 15:44:06.460174   * Base: fb001000, Size: 2fff000, Tag: 200
 1290 15:44:06.463449   * Base: fe010000, Size: 2e000, Tag: 200
 1291 15:44:06.470344   * Base: fe03f000, Size: d41000, Tag: 200
 1292 15:44:06.473430   * Base: fed88000, Size: 8000, Tag: 200
 1293 15:44:06.477237   * Base: fed93000, Size: d000, Tag: 200
 1294 15:44:06.480052   * Base: feda2000, Size: 1e000, Tag: 200
 1295 15:44:06.486712   * Base: fede0000, Size: 1220000, Tag: 200
 1296 15:44:06.489973   * Base: 280400000, Size: 7d7fc00000, Tag: 100200
 1297 15:44:06.496759    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
 1298 15:44:06.503404    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem
 1299 15:44:06.510006    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem
 1300 15:44:06.516800    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
 1301 15:44:06.523179    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
 1302 15:44:06.529966    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
 1303 15:44:06.536575    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
 1304 15:44:06.543364    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
 1305 15:44:06.549794    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
 1306 15:44:06.556369    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
 1307 15:44:06.563341    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
 1308 15:44:06.569896    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
 1309 15:44:06.576759    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
 1310 15:44:06.582849    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
 1311 15:44:06.589846    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
 1312 15:44:06.596330    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
 1313 15:44:06.602861    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
 1314 15:44:06.609846    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
 1315 15:44:06.616444    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
 1316 15:44:06.622835    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
 1317 15:44:06.629416    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
 1318 15:44:06.636139    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
 1319 15:44:06.642633  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
 1320 15:44:06.652894  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
 1321 15:44:06.656387   PCI: 00:1d.0: Resource ranges:
 1322 15:44:06.659424   * Base: 7fc00000, Size: 100000, Tag: 200
 1323 15:44:06.666362    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
 1324 15:44:06.672706    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
 1325 15:44:06.679600    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
 1326 15:44:06.689528  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
 1327 15:44:06.696006  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
 1328 15:44:06.699740  Root Device assign_resources, bus 0 link: 0
 1329 15:44:06.706264  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1330 15:44:06.712711  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
 1331 15:44:06.722839  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
 1332 15:44:06.729308  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
 1333 15:44:06.735909  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
 1334 15:44:06.742576  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1335 15:44:06.745761  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1336 15:44:06.755534  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
 1337 15:44:06.762608  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
 1338 15:44:06.772410  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
 1339 15:44:06.775805  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1340 15:44:06.778972  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1341 15:44:06.789018  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
 1342 15:44:06.792328  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1343 15:44:06.798845  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1344 15:44:06.805576  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
 1345 15:44:06.815471  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
 1346 15:44:06.821912  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
 1347 15:44:06.825636  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1348 15:44:06.832169  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1349 15:44:06.838789  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
 1350 15:44:06.845582  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1351 15:44:06.848735  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1352 15:44:06.858707  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
 1353 15:44:06.861847  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1354 15:44:06.865344  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1355 15:44:06.875358  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
 1356 15:44:06.881766  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
 1357 15:44:06.891855  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
 1358 15:44:06.898464  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
 1359 15:44:06.904925  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1360 15:44:06.908452  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1361 15:44:06.918262  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
 1362 15:44:06.928539  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1363 15:44:06.935338  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
 1364 15:44:06.941959  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1365 15:44:06.948103  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
 1366 15:44:06.958236  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
 1367 15:44:06.964635  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
 1368 15:44:06.968064  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1369 15:44:06.977928  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
 1370 15:44:06.981343  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1371 15:44:06.988101  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1372 15:44:06.994508  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
 1373 15:44:06.997742  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1374 15:44:07.004771  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1375 15:44:07.007861  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1376 15:44:07.014752  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1377 15:44:07.017907  LPC: Trying to open IO window from 800 size 1ff
 1378 15:44:07.028194  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
 1379 15:44:07.035125  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
 1380 15:44:07.044684  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
 1381 15:44:07.047780  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1382 15:44:07.051094  Root Device assign_resources, bus 0 link: 0
 1383 15:44:07.054378  Done setting resources.
 1384 15:44:07.060940  Show resources in subtree (Root Device)...After assigning values.
 1385 15:44:07.064388   Root Device child on link 0 DOMAIN: 0000
 1386 15:44:07.071136    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1387 15:44:07.081224    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1388 15:44:07.087608    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1389 15:44:07.091031     PCI: 00:00.0
 1390 15:44:07.100927     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1391 15:44:07.110682     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1392 15:44:07.121017     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1393 15:44:07.127281     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1394 15:44:07.137617     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1395 15:44:07.147419     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1396 15:44:07.157301     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1397 15:44:07.167619     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1398 15:44:07.177010     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1399 15:44:07.183998     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1400 15:44:07.193561     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1401 15:44:07.203665     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1402 15:44:07.213751     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1403 15:44:07.220421     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1404 15:44:07.230230     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1405 15:44:07.240345     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1406 15:44:07.250488     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1407 15:44:07.260090     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1408 15:44:07.270146     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1409 15:44:07.280274     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1410 15:44:07.280360     PCI: 00:02.0
 1411 15:44:07.289809     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
 1412 15:44:07.303449     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
 1413 15:44:07.309890     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
 1414 15:44:07.316632     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1415 15:44:07.326457     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
 1416 15:44:07.329673      GENERIC: 0.0
 1417 15:44:07.329758     PCI: 00:05.0
 1418 15:44:07.339601     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
 1419 15:44:07.346507     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1420 15:44:07.346593      GENERIC: 0.0
 1421 15:44:07.349565     PCI: 00:08.0
 1422 15:44:07.359629     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
 1423 15:44:07.359715     PCI: 00:0a.0
 1424 15:44:07.366226     PCI: 00:0d.0 child on link 0 USB0 port 0
 1425 15:44:07.376295     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
 1426 15:44:07.379508      USB0 port 0 child on link 0 USB3 port 0
 1427 15:44:07.383264       USB3 port 0
 1428 15:44:07.383348       USB3 port 1
 1429 15:44:07.386575       USB3 port 2
 1430 15:44:07.386660       USB3 port 3
 1431 15:44:07.389525     PCI: 00:14.0 child on link 0 USB0 port 0
 1432 15:44:07.402892     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
 1433 15:44:07.406367      USB0 port 0 child on link 0 USB2 port 0
 1434 15:44:07.406452       USB2 port 0
 1435 15:44:07.409712       USB2 port 1
 1436 15:44:07.409799       USB2 port 2
 1437 15:44:07.412923       USB2 port 3
 1438 15:44:07.416422       USB2 port 4
 1439 15:44:07.416507       USB2 port 5
 1440 15:44:07.419998       USB2 port 6
 1441 15:44:07.420083       USB2 port 7
 1442 15:44:07.422821       USB2 port 8
 1443 15:44:07.422923       USB2 port 9
 1444 15:44:07.426252       USB3 port 0
 1445 15:44:07.426328       USB3 port 1
 1446 15:44:07.429486       USB3 port 2
 1447 15:44:07.429560       USB3 port 3
 1448 15:44:07.432752     PCI: 00:14.2
 1449 15:44:07.442877     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
 1450 15:44:07.452868     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
 1451 15:44:07.456164     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1452 15:44:07.469529     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
 1453 15:44:07.469611      GENERIC: 0.0
 1454 15:44:07.472615     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1455 15:44:07.482675     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
 1456 15:44:07.485959      I2C: 00:1a
 1457 15:44:07.486047      I2C: 00:31
 1458 15:44:07.489446      I2C: 00:32
 1459 15:44:07.492674     PCI: 00:15.1 child on link 0 I2C: 00:10
 1460 15:44:07.502609     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
 1461 15:44:07.506060      I2C: 00:10
 1462 15:44:07.506146     PCI: 00:15.2
 1463 15:44:07.516038     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
 1464 15:44:07.519295     PCI: 00:15.3
 1465 15:44:07.529618     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
 1466 15:44:07.529702     PCI: 00:16.0
 1467 15:44:07.542633     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
 1468 15:44:07.542720     PCI: 00:19.0
 1469 15:44:07.545948     PCI: 00:19.1 child on link 0 I2C: 00:15
 1470 15:44:07.559092     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
 1471 15:44:07.559175      I2C: 00:15
 1472 15:44:07.562601     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1473 15:44:07.572192     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
 1474 15:44:07.585569     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
 1475 15:44:07.595757     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
 1476 15:44:07.595844      GENERIC: 0.0
 1477 15:44:07.599083      PCI: 01:00.0
 1478 15:44:07.609009      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
 1479 15:44:07.618777      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
 1480 15:44:07.628861      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
 1481 15:44:07.632044     PCI: 00:1e.0
 1482 15:44:07.642225     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1483 15:44:07.645616     PCI: 00:1e.2 child on link 0 SPI: 00
 1484 15:44:07.655356     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
 1485 15:44:07.658921      SPI: 00
 1486 15:44:07.662219     PCI: 00:1e.3 child on link 0 SPI: 00
 1487 15:44:07.672112     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
 1488 15:44:07.675505      SPI: 00
 1489 15:44:07.678644     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1490 15:44:07.685476     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1491 15:44:07.688591      PNP: 0c09.0
 1492 15:44:07.698534      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1493 15:44:07.701799     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1494 15:44:07.711995     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1495 15:44:07.721966     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1496 15:44:07.725317      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1497 15:44:07.728622       GENERIC: 0.0
 1498 15:44:07.728706       GENERIC: 1.0
 1499 15:44:07.732160     PCI: 00:1f.3
 1500 15:44:07.741824     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
 1501 15:44:07.751945     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
 1502 15:44:07.752030     PCI: 00:1f.5
 1503 15:44:07.761853     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
 1504 15:44:07.768358    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1505 15:44:07.768441     APIC: 00
 1506 15:44:07.768511     APIC: 01
 1507 15:44:07.771898     APIC: 03
 1508 15:44:07.771986     APIC: 05
 1509 15:44:07.775189     APIC: 07
 1510 15:44:07.775272     APIC: 06
 1511 15:44:07.775337     APIC: 02
 1512 15:44:07.778642     APIC: 04
 1513 15:44:07.781892  Done allocating resources.
 1514 15:44:07.785113  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
 1515 15:44:07.792127  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
 1516 15:44:07.795586  Configure GPIOs for I2S audio on UP4.
 1517 15:44:07.802892  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
 1518 15:44:07.806205  Enabling resources...
 1519 15:44:07.809767  PCI: 00:00.0 subsystem <- 8086/9a12
 1520 15:44:07.812738  PCI: 00:00.0 cmd <- 06
 1521 15:44:07.816375  PCI: 00:02.0 subsystem <- 8086/9a40
 1522 15:44:07.819609  PCI: 00:02.0 cmd <- 03
 1523 15:44:07.822839  PCI: 00:04.0 subsystem <- 8086/9a03
 1524 15:44:07.822924  PCI: 00:04.0 cmd <- 02
 1525 15:44:07.829765  PCI: 00:05.0 subsystem <- 8086/9a19
 1526 15:44:07.829851  PCI: 00:05.0 cmd <- 02
 1527 15:44:07.833016  PCI: 00:08.0 subsystem <- 8086/9a11
 1528 15:44:07.836257  PCI: 00:08.0 cmd <- 06
 1529 15:44:07.840036  PCI: 00:0d.0 subsystem <- 8086/9a13
 1530 15:44:07.842842  PCI: 00:0d.0 cmd <- 02
 1531 15:44:07.846361  PCI: 00:14.0 subsystem <- 8086/a0ed
 1532 15:44:07.849597  PCI: 00:14.0 cmd <- 02
 1533 15:44:07.852859  PCI: 00:14.2 subsystem <- 8086/a0ef
 1534 15:44:07.856169  PCI: 00:14.2 cmd <- 02
 1535 15:44:07.859580  PCI: 00:14.3 subsystem <- 8086/a0f0
 1536 15:44:07.863241  PCI: 00:14.3 cmd <- 02
 1537 15:44:07.866313  PCI: 00:15.0 subsystem <- 8086/a0e8
 1538 15:44:07.869683  PCI: 00:15.0 cmd <- 02
 1539 15:44:07.873035  PCI: 00:15.1 subsystem <- 8086/a0e9
 1540 15:44:07.873119  PCI: 00:15.1 cmd <- 02
 1541 15:44:07.879452  PCI: 00:15.2 subsystem <- 8086/a0ea
 1542 15:44:07.879537  PCI: 00:15.2 cmd <- 02
 1543 15:44:07.882870  PCI: 00:15.3 subsystem <- 8086/a0eb
 1544 15:44:07.886398  PCI: 00:15.3 cmd <- 02
 1545 15:44:07.889409  PCI: 00:16.0 subsystem <- 8086/a0e0
 1546 15:44:07.892813  PCI: 00:16.0 cmd <- 02
 1547 15:44:07.896097  PCI: 00:19.1 subsystem <- 8086/a0c6
 1548 15:44:07.899355  PCI: 00:19.1 cmd <- 02
 1549 15:44:07.902626  PCI: 00:1d.0 bridge ctrl <- 0013
 1550 15:44:07.905949  PCI: 00:1d.0 subsystem <- 8086/a0b0
 1551 15:44:07.909326  PCI: 00:1d.0 cmd <- 06
 1552 15:44:07.912971  PCI: 00:1e.0 subsystem <- 8086/a0a8
 1553 15:44:07.915798  PCI: 00:1e.0 cmd <- 06
 1554 15:44:07.919028  PCI: 00:1e.2 subsystem <- 8086/a0aa
 1555 15:44:07.922305  PCI: 00:1e.2 cmd <- 06
 1556 15:44:07.926069  PCI: 00:1e.3 subsystem <- 8086/a0ab
 1557 15:44:07.926154  PCI: 00:1e.3 cmd <- 02
 1558 15:44:07.932764  PCI: 00:1f.0 subsystem <- 8086/a087
 1559 15:44:07.932848  PCI: 00:1f.0 cmd <- 407
 1560 15:44:07.935682  PCI: 00:1f.3 subsystem <- 8086/a0c8
 1561 15:44:07.939144  PCI: 00:1f.3 cmd <- 02
 1562 15:44:07.942307  PCI: 00:1f.5 subsystem <- 8086/a0a4
 1563 15:44:07.945789  PCI: 00:1f.5 cmd <- 406
 1564 15:44:07.950412  PCI: 01:00.0 cmd <- 02
 1565 15:44:07.954753  done.
 1566 15:44:07.958197  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
 1567 15:44:07.961508  Initializing devices...
 1568 15:44:07.964714  Root Device init
 1569 15:44:07.967969  Chrome EC: Set SMI mask to 0x0000000000000000
 1570 15:44:07.974787  Chrome EC: clear events_b mask to 0x0000000000000000
 1571 15:44:07.981553  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1572 15:44:07.988332  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
 1573 15:44:07.991198  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
 1574 15:44:07.997771  Chrome EC: Set WAKE mask to 0x0000000000000000
 1575 15:44:08.004591  fw_config match found: DB_USB=USB3_ACTIVE
 1576 15:44:08.007813  Configure Right Type-C port orientation for retimer
 1577 15:44:08.010976  Root Device init finished in 45 msecs
 1578 15:44:08.015491  PCI: 00:00.0 init
 1579 15:44:08.018716  CPU TDP = 9 Watts
 1580 15:44:08.018801  CPU PL1 = 9 Watts
 1581 15:44:08.022408  CPU PL2 = 40 Watts
 1582 15:44:08.025488  CPU PL4 = 83 Watts
 1583 15:44:08.028634  PCI: 00:00.0 init finished in 8 msecs
 1584 15:44:08.028719  PCI: 00:02.0 init
 1585 15:44:08.032645  GMA: Found VBT in CBFS
 1586 15:44:08.035350  GMA: Found valid VBT in CBFS
 1587 15:44:08.042146  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
 1588 15:44:08.049064                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
 1589 15:44:08.051831  PCI: 00:02.0 init finished in 18 msecs
 1590 15:44:08.055300  PCI: 00:05.0 init
 1591 15:44:08.058548  PCI: 00:05.0 init finished in 0 msecs
 1592 15:44:08.062283  PCI: 00:08.0 init
 1593 15:44:08.065472  PCI: 00:08.0 init finished in 0 msecs
 1594 15:44:08.068619  PCI: 00:14.0 init
 1595 15:44:08.072082  PCI: 00:14.0 init finished in 0 msecs
 1596 15:44:08.075041  PCI: 00:14.2 init
 1597 15:44:08.078738  PCI: 00:14.2 init finished in 0 msecs
 1598 15:44:08.082027  PCI: 00:15.0 init
 1599 15:44:08.082113  I2C bus 0 version 0x3230302a
 1600 15:44:08.088670  DW I2C bus 0 at 0x7fe4e000 (400 KHz)
 1601 15:44:08.091904  PCI: 00:15.0 init finished in 6 msecs
 1602 15:44:08.091990  PCI: 00:15.1 init
 1603 15:44:08.095268  I2C bus 1 version 0x3230302a
 1604 15:44:08.098534  DW I2C bus 1 at 0x7fe4f000 (400 KHz)
 1605 15:44:08.101846  PCI: 00:15.1 init finished in 6 msecs
 1606 15:44:08.105425  PCI: 00:15.2 init
 1607 15:44:08.109064  I2C bus 2 version 0x3230302a
 1608 15:44:08.112225  DW I2C bus 2 at 0x7fe50000 (400 KHz)
 1609 15:44:08.115715  PCI: 00:15.2 init finished in 6 msecs
 1610 15:44:08.118573  PCI: 00:15.3 init
 1611 15:44:08.122159  I2C bus 3 version 0x3230302a
 1612 15:44:08.125326  DW I2C bus 3 at 0x7fe51000 (400 KHz)
 1613 15:44:08.128898  PCI: 00:15.3 init finished in 6 msecs
 1614 15:44:08.131903  PCI: 00:16.0 init
 1615 15:44:08.135193  PCI: 00:16.0 init finished in 0 msecs
 1616 15:44:08.138768  PCI: 00:19.1 init
 1617 15:44:08.138851  I2C bus 5 version 0x3230302a
 1618 15:44:08.145521  DW I2C bus 5 at 0x7fe53000 (400 KHz)
 1619 15:44:08.148712  PCI: 00:19.1 init finished in 6 msecs
 1620 15:44:08.148796  PCI: 00:1d.0 init
 1621 15:44:08.151855  Initializing PCH PCIe bridge.
 1622 15:44:08.155586  PCI: 00:1d.0 init finished in 3 msecs
 1623 15:44:08.159699  PCI: 00:1f.0 init
 1624 15:44:08.162853  IOAPIC: Initializing IOAPIC at 0xfec00000
 1625 15:44:08.169556  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1626 15:44:08.169640  IOAPIC: ID = 0x02
 1627 15:44:08.173267  IOAPIC: Dumping registers
 1628 15:44:08.176707    reg 0x0000: 0x02000000
 1629 15:44:08.179961    reg 0x0001: 0x00770020
 1630 15:44:08.180045    reg 0x0002: 0x00000000
 1631 15:44:08.186130  PCI: 00:1f.0 init finished in 21 msecs
 1632 15:44:08.186214  PCI: 00:1f.2 init
 1633 15:44:08.189729  Disabling ACPI via APMC.
 1634 15:44:08.192864  APMC done.
 1635 15:44:08.196392  PCI: 00:1f.2 init finished in 5 msecs
 1636 15:44:08.208190  PCI: 01:00.0 init
 1637 15:44:08.211208  PCI: 01:00.0 init finished in 0 msecs
 1638 15:44:08.214492  PNP: 0c09.0 init
 1639 15:44:08.217954  Google Chrome EC uptime: 8.351 seconds
 1640 15:44:08.224660  Google Chrome AP resets since EC boot: 1
 1641 15:44:08.227885  Google Chrome most recent AP reset causes:
 1642 15:44:08.231205  	0.346: 32775 shutdown: entering G3
 1643 15:44:08.238285  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
 1644 15:44:08.241049  PNP: 0c09.0 init finished in 22 msecs
 1645 15:44:08.246710  Devices initialized
 1646 15:44:08.250320  Show all devs... After init.
 1647 15:44:08.253810  Root Device: enabled 1
 1648 15:44:08.253894  DOMAIN: 0000: enabled 1
 1649 15:44:08.256802  CPU_CLUSTER: 0: enabled 1
 1650 15:44:08.260096  PCI: 00:00.0: enabled 1
 1651 15:44:08.263312  PCI: 00:02.0: enabled 1
 1652 15:44:08.263396  PCI: 00:04.0: enabled 1
 1653 15:44:08.266679  PCI: 00:05.0: enabled 1
 1654 15:44:08.270058  PCI: 00:06.0: enabled 0
 1655 15:44:08.273237  PCI: 00:07.0: enabled 0
 1656 15:44:08.273323  PCI: 00:07.1: enabled 0
 1657 15:44:08.276605  PCI: 00:07.2: enabled 0
 1658 15:44:08.279922  PCI: 00:07.3: enabled 0
 1659 15:44:08.283391  PCI: 00:08.0: enabled 1
 1660 15:44:08.283476  PCI: 00:09.0: enabled 0
 1661 15:44:08.287146  PCI: 00:0a.0: enabled 0
 1662 15:44:08.290366  PCI: 00:0d.0: enabled 1
 1663 15:44:08.293608  PCI: 00:0d.1: enabled 0
 1664 15:44:08.293694  PCI: 00:0d.2: enabled 0
 1665 15:44:08.296428  PCI: 00:0d.3: enabled 0
 1666 15:44:08.299973  PCI: 00:0e.0: enabled 0
 1667 15:44:08.300076  PCI: 00:10.2: enabled 1
 1668 15:44:08.303354  PCI: 00:10.6: enabled 0
 1669 15:44:08.306506  PCI: 00:10.7: enabled 0
 1670 15:44:08.310113  PCI: 00:12.0: enabled 0
 1671 15:44:08.310198  PCI: 00:12.6: enabled 0
 1672 15:44:08.313203  PCI: 00:13.0: enabled 0
 1673 15:44:08.316351  PCI: 00:14.0: enabled 1
 1674 15:44:08.319750  PCI: 00:14.1: enabled 0
 1675 15:44:08.319840  PCI: 00:14.2: enabled 1
 1676 15:44:08.323161  PCI: 00:14.3: enabled 1
 1677 15:44:08.326479  PCI: 00:15.0: enabled 1
 1678 15:44:08.329713  PCI: 00:15.1: enabled 1
 1679 15:44:08.329799  PCI: 00:15.2: enabled 1
 1680 15:44:08.332983  PCI: 00:15.3: enabled 1
 1681 15:44:08.336296  PCI: 00:16.0: enabled 1
 1682 15:44:08.339771  PCI: 00:16.1: enabled 0
 1683 15:44:08.339862  PCI: 00:16.2: enabled 0
 1684 15:44:08.343088  PCI: 00:16.3: enabled 0
 1685 15:44:08.346422  PCI: 00:16.4: enabled 0
 1686 15:44:08.346507  PCI: 00:16.5: enabled 0
 1687 15:44:08.349375  PCI: 00:17.0: enabled 0
 1688 15:44:08.352937  PCI: 00:19.0: enabled 0
 1689 15:44:08.356578  PCI: 00:19.1: enabled 1
 1690 15:44:08.356664  PCI: 00:19.2: enabled 0
 1691 15:44:08.359328  PCI: 00:1c.0: enabled 1
 1692 15:44:08.362851  PCI: 00:1c.1: enabled 0
 1693 15:44:08.366218  PCI: 00:1c.2: enabled 0
 1694 15:44:08.366303  PCI: 00:1c.3: enabled 0
 1695 15:44:08.369551  PCI: 00:1c.4: enabled 0
 1696 15:44:08.372780  PCI: 00:1c.5: enabled 0
 1697 15:44:08.375814  PCI: 00:1c.6: enabled 1
 1698 15:44:08.375937  PCI: 00:1c.7: enabled 0
 1699 15:44:08.379521  PCI: 00:1d.0: enabled 1
 1700 15:44:08.382631  PCI: 00:1d.1: enabled 0
 1701 15:44:08.386244  PCI: 00:1d.2: enabled 1
 1702 15:44:08.386328  PCI: 00:1d.3: enabled 0
 1703 15:44:08.389361  PCI: 00:1e.0: enabled 1
 1704 15:44:08.392820  PCI: 00:1e.1: enabled 0
 1705 15:44:08.392905  PCI: 00:1e.2: enabled 1
 1706 15:44:08.395997  PCI: 00:1e.3: enabled 1
 1707 15:44:08.399436  PCI: 00:1f.0: enabled 1
 1708 15:44:08.402526  PCI: 00:1f.1: enabled 0
 1709 15:44:08.402611  PCI: 00:1f.2: enabled 1
 1710 15:44:08.406010  PCI: 00:1f.3: enabled 1
 1711 15:44:08.409338  PCI: 00:1f.4: enabled 0
 1712 15:44:08.412366  PCI: 00:1f.5: enabled 1
 1713 15:44:08.412451  PCI: 00:1f.6: enabled 0
 1714 15:44:08.416032  PCI: 00:1f.7: enabled 0
 1715 15:44:08.419094  APIC: 00: enabled 1
 1716 15:44:08.419180  GENERIC: 0.0: enabled 1
 1717 15:44:08.422731  GENERIC: 0.0: enabled 1
 1718 15:44:08.426089  GENERIC: 1.0: enabled 1
 1719 15:44:08.429413  GENERIC: 0.0: enabled 1
 1720 15:44:08.429499  GENERIC: 1.0: enabled 1
 1721 15:44:08.432712  USB0 port 0: enabled 1
 1722 15:44:08.435982  GENERIC: 0.0: enabled 1
 1723 15:44:08.439307  USB0 port 0: enabled 1
 1724 15:44:08.439393  GENERIC: 0.0: enabled 1
 1725 15:44:08.442311  I2C: 00:1a: enabled 1
 1726 15:44:08.445620  I2C: 00:31: enabled 1
 1727 15:44:08.445705  I2C: 00:32: enabled 1
 1728 15:44:08.449141  I2C: 00:10: enabled 1
 1729 15:44:08.452388  I2C: 00:15: enabled 1
 1730 15:44:08.452473  GENERIC: 0.0: enabled 0
 1731 15:44:08.455514  GENERIC: 1.0: enabled 0
 1732 15:44:08.459450  GENERIC: 0.0: enabled 1
 1733 15:44:08.459536  SPI: 00: enabled 1
 1734 15:44:08.462292  SPI: 00: enabled 1
 1735 15:44:08.465661  PNP: 0c09.0: enabled 1
 1736 15:44:08.465746  GENERIC: 0.0: enabled 1
 1737 15:44:08.468972  USB3 port 0: enabled 1
 1738 15:44:08.472230  USB3 port 1: enabled 1
 1739 15:44:08.475365  USB3 port 2: enabled 0
 1740 15:44:08.475450  USB3 port 3: enabled 0
 1741 15:44:08.478953  USB2 port 0: enabled 0
 1742 15:44:08.482472  USB2 port 1: enabled 1
 1743 15:44:08.482643  USB2 port 2: enabled 1
 1744 15:44:08.485551  USB2 port 3: enabled 0
 1745 15:44:08.488840  USB2 port 4: enabled 1
 1746 15:44:08.492020  USB2 port 5: enabled 0
 1747 15:44:08.492174  USB2 port 6: enabled 0
 1748 15:44:08.495458  USB2 port 7: enabled 0
 1749 15:44:08.498756  USB2 port 8: enabled 0
 1750 15:44:08.498872  USB2 port 9: enabled 0
 1751 15:44:08.501918  USB3 port 0: enabled 0
 1752 15:44:08.505281  USB3 port 1: enabled 1
 1753 15:44:08.508803  USB3 port 2: enabled 0
 1754 15:44:08.508946  USB3 port 3: enabled 0
 1755 15:44:08.512078  GENERIC: 0.0: enabled 1
 1756 15:44:08.515419  GENERIC: 1.0: enabled 1
 1757 15:44:08.515600  APIC: 01: enabled 1
 1758 15:44:08.518975  APIC: 03: enabled 1
 1759 15:44:08.522134  APIC: 05: enabled 1
 1760 15:44:08.522345  APIC: 07: enabled 1
 1761 15:44:08.525507  APIC: 06: enabled 1
 1762 15:44:08.525760  APIC: 02: enabled 1
 1763 15:44:08.528852  APIC: 04: enabled 1
 1764 15:44:08.531952  PCI: 01:00.0: enabled 1
 1765 15:44:08.535725  BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
 1766 15:44:08.542149  FMAP: area RW_ELOG found @ f30000 (4096 bytes)
 1767 15:44:08.545416  ELOG: NV offset 0xf30000 size 0x1000
 1768 15:44:08.552613  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1769 15:44:08.559168  ELOG: Event(17) added with size 13 at 2022-09-17 15:38:53 UTC
 1770 15:44:08.565914  ELOG: Event(92) added with size 9 at 2022-09-17 15:38:53 UTC
 1771 15:44:08.572627  ELOG: Event(93) added with size 9 at 2022-09-17 15:38:53 UTC
 1772 15:44:08.579047  ELOG: Event(9E) added with size 10 at 2022-09-17 15:38:53 UTC
 1773 15:44:08.585778  ELOG: Event(9F) added with size 14 at 2022-09-17 15:38:53 UTC
 1774 15:44:08.592293  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
 1775 15:44:08.595607  ELOG: Event(A1) added with size 10 at 2022-09-17 15:38:53 UTC
 1776 15:44:08.605589  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1777 15:44:08.612286  ELOG: Event(A0) added with size 9 at 2022-09-17 15:38:53 UTC
 1778 15:44:08.615828  elog_add_boot_reason: Logged dev mode boot
 1779 15:44:08.622594  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
 1780 15:44:08.623036  Finalize devices...
 1781 15:44:08.625859  Devices finalized
 1782 15:44:08.632667  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
 1783 15:44:08.635765  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
 1784 15:44:08.642153  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
 1785 15:44:08.645518  ME: HFSTS1                      : 0x80030055
 1786 15:44:08.652235  ME: HFSTS2                      : 0x30280116
 1787 15:44:08.655726  ME: HFSTS3                      : 0x00000050
 1788 15:44:08.658758  ME: HFSTS4                      : 0x00004000
 1789 15:44:08.665802  ME: HFSTS5                      : 0x00000000
 1790 15:44:08.668967  ME: HFSTS6                      : 0x00400006
 1791 15:44:08.672218  ME: Manufacturing Mode          : YES
 1792 15:44:08.675552  ME: SPI Protection Mode Enabled : NO
 1793 15:44:08.679041  ME: FW Partition Table          : OK
 1794 15:44:08.682263  ME: Bringup Loader Failure      : NO
 1795 15:44:08.688583  ME: Firmware Init Complete      : NO
 1796 15:44:08.692179  ME: Boot Options Present        : NO
 1797 15:44:08.695227  ME: Update In Progress          : NO
 1798 15:44:08.698640  ME: D0i3 Support                : YES
 1799 15:44:08.701883  ME: Low Power State Enabled     : NO
 1800 15:44:08.705500  ME: CPU Replaced                : YES
 1801 15:44:08.708629  ME: CPU Replacement Valid       : YES
 1802 15:44:08.712101  ME: Current Working State       : 5
 1803 15:44:08.718578  ME: Current Operation State     : 1
 1804 15:44:08.722048  ME: Current Operation Mode      : 3
 1805 15:44:08.725182  ME: Error Code                  : 0
 1806 15:44:08.728440  ME: Enhanced Debug Mode         : NO
 1807 15:44:08.732113  ME: CPU Debug Disabled          : YES
 1808 15:44:08.735207  ME: TXT Support                 : NO
 1809 15:44:08.741941  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
 1810 15:44:08.748543  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
 1811 15:44:08.751728  CBFS: 'fallback/slic' not found.
 1812 15:44:08.755072  ACPI: Writing ACPI tables at 76b01000.
 1813 15:44:08.758611  ACPI:    * FACS
 1814 15:44:08.759124  ACPI:    * DSDT
 1815 15:44:08.764975  Ramoops buffer: 0x100000@0x76a00000.
 1816 15:44:08.768300  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
 1817 15:44:08.772071  FMAP: area RW_VPD found @ f35000 (8192 bytes)
 1818 15:44:08.775314  Google Chrome EC: version:
 1819 15:44:08.778894  	ro: voema_v2.0.7540-147f8d37d1
 1820 15:44:08.782241  	rw: voema_v2.0.7540-147f8d37d1
 1821 15:44:08.785584    running image: 2
 1822 15:44:08.792278  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
 1823 15:44:08.795315  ACPI:    * FADT
 1824 15:44:08.795875  SCI is IRQ9
 1825 15:44:08.798586  ACPI: added table 1/32, length now 40
 1826 15:44:08.802349  ACPI:     * SSDT
 1827 15:44:08.805434  Found 1 CPU(s) with 8 core(s) each.
 1828 15:44:08.808860  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
 1829 15:44:08.815307  \_SB.DPTF: Intel DPTF at GENERIC: 0.0
 1830 15:44:08.818636  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
 1831 15:44:08.822048  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
 1832 15:44:08.828849  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
 1833 15:44:08.835276  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
 1834 15:44:08.838692  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
 1835 15:44:08.845158  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
 1836 15:44:08.851894  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
 1837 15:44:08.855123  \_SB.PCI0.RP09: Added StorageD3Enable property
 1838 15:44:08.858761  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1839 15:44:08.865443  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
 1840 15:44:08.871812  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
 1841 15:44:08.875179  PS2K: Passing 80 keymaps to kernel
 1842 15:44:08.881772  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
 1843 15:44:08.888895  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
 1844 15:44:08.894994  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
 1845 15:44:08.901549  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
 1846 15:44:08.908139  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
 1847 15:44:08.914866  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
 1848 15:44:08.921761  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
 1849 15:44:08.928264  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
 1850 15:44:08.931714  ACPI: added table 2/32, length now 44
 1851 15:44:08.932188  ACPI:    * MCFG
 1852 15:44:08.934837  ACPI: added table 3/32, length now 48
 1853 15:44:08.938128  ACPI:    * TPM2
 1854 15:44:08.941899  TPM2 log created at 0x769f0000
 1855 15:44:08.944908  ACPI: added table 4/32, length now 52
 1856 15:44:08.948463  ACPI:    * MADT
 1857 15:44:08.948897  SCI is IRQ9
 1858 15:44:08.951544  ACPI: added table 5/32, length now 56
 1859 15:44:08.955080  current = 76b09850
 1860 15:44:08.955535  ACPI:    * DMAR
 1861 15:44:08.958110  ACPI: added table 6/32, length now 60
 1862 15:44:08.961504  ACPI: added table 7/32, length now 64
 1863 15:44:08.964901  ACPI:    * HPET
 1864 15:44:08.968256  ACPI: added table 8/32, length now 68
 1865 15:44:08.968697  ACPI: done.
 1866 15:44:08.971584  ACPI tables: 35216 bytes.
 1867 15:44:08.974940  smbios_write_tables: 769ef000
 1868 15:44:08.978128  EC returned error result code 3
 1869 15:44:08.981557  Couldn't obtain OEM name from CBI
 1870 15:44:08.984710  Create SMBIOS type 16
 1871 15:44:08.988206  Create SMBIOS type 17
 1872 15:44:08.991624  GENERIC: 0.0 (WIFI Device)
 1873 15:44:08.992122  SMBIOS tables: 1750 bytes.
 1874 15:44:08.998258  Writing table forward entry at 0x00000500
 1875 15:44:09.002004  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
 1876 15:44:09.008174  Writing coreboot table at 0x76b25000
 1877 15:44:09.011395   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1878 15:44:09.018146   1. 0000000000001000-000000000009ffff: RAM
 1879 15:44:09.021522   2. 00000000000a0000-00000000000fffff: RESERVED
 1880 15:44:09.024915   3. 0000000000100000-00000000769eefff: RAM
 1881 15:44:09.031757   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
 1882 15:44:09.038041   5. 0000000076b98000-0000000076c09fff: RAMSTAGE
 1883 15:44:09.041287   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
 1884 15:44:09.047880   7. 0000000077000000-000000007fbfffff: RESERVED
 1885 15:44:09.051356   8. 00000000c0000000-00000000cfffffff: RESERVED
 1886 15:44:09.057938   9. 00000000f8000000-00000000f9ffffff: RESERVED
 1887 15:44:09.061250  10. 00000000fb000000-00000000fb000fff: RESERVED
 1888 15:44:09.067955  11. 00000000fe000000-00000000fe00ffff: RESERVED
 1889 15:44:09.071236  12. 00000000fed80000-00000000fed87fff: RESERVED
 1890 15:44:09.077827  13. 00000000fed90000-00000000fed92fff: RESERVED
 1891 15:44:09.081493  14. 00000000feda0000-00000000feda1fff: RESERVED
 1892 15:44:09.084394  15. 00000000fedc0000-00000000feddffff: RESERVED
 1893 15:44:09.091331  16. 0000000100000000-00000002803fffff: RAM
 1894 15:44:09.094519  Passing 4 GPIOs to payload:
 1895 15:44:09.097931              NAME |       PORT | POLARITY |     VALUE
 1896 15:44:09.104616               lid |  undefined |     high |      high
 1897 15:44:09.107972             power |  undefined |     high |       low
 1898 15:44:09.114546             oprom |  undefined |     high |       low
 1899 15:44:09.121113          EC in RW | 0x000000e5 |     high |      high
 1900 15:44:09.124605  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum bdad
 1901 15:44:09.127585  coreboot table: 1576 bytes.
 1902 15:44:09.131077  IMD ROOT    0. 0x76fff000 0x00001000
 1903 15:44:09.137767  IMD SMALL   1. 0x76ffe000 0x00001000
 1904 15:44:09.141113  FSP MEMORY  2. 0x76c4e000 0x003b0000
 1905 15:44:09.144322  VPD         3. 0x76c4d000 0x00000367
 1906 15:44:09.148174  RO MCACHE   4. 0x76c4c000 0x00000fdc
 1907 15:44:09.151193  CONSOLE     5. 0x76c2c000 0x00020000
 1908 15:44:09.154227  FMAP        6. 0x76c2b000 0x00000578
 1909 15:44:09.157503  TIME STAMP  7. 0x76c2a000 0x00000910
 1910 15:44:09.161033  VBOOT WORK  8. 0x76c16000 0x00014000
 1911 15:44:09.164392  ROMSTG STCK 9. 0x76c15000 0x00001000
 1912 15:44:09.171189  AFTER CAR  10. 0x76c0a000 0x0000b000
 1913 15:44:09.174461  RAMSTAGE   11. 0x76b97000 0x00073000
 1914 15:44:09.177771  REFCODE    12. 0x76b42000 0x00055000
 1915 15:44:09.181330  SMM BACKUP 13. 0x76b32000 0x00010000
 1916 15:44:09.184862  4f444749   14. 0x76b30000 0x00002000
 1917 15:44:09.188062  EXT VBT15. 0x76b2d000 0x0000219f
 1918 15:44:09.191100  COREBOOT   16. 0x76b25000 0x00008000
 1919 15:44:09.194669  ACPI       17. 0x76b01000 0x00024000
 1920 15:44:09.197833  ACPI GNVS  18. 0x76b00000 0x00001000
 1921 15:44:09.204514  RAMOOPS    19. 0x76a00000 0x00100000
 1922 15:44:09.207621  TPM2 TCGLOG20. 0x769f0000 0x00010000
 1923 15:44:09.211272  SMBIOS     21. 0x769ef000 0x00000800
 1924 15:44:09.211772  IMD small region:
 1925 15:44:09.214324    IMD ROOT    0. 0x76ffec00 0x00000400
 1926 15:44:09.221217    FSP RUNTIME 1. 0x76ffebe0 0x00000004
 1927 15:44:09.224676    POWER STATE 2. 0x76ffeb80 0x00000044
 1928 15:44:09.228171    ROMSTAGE    3. 0x76ffeb60 0x00000004
 1929 15:44:09.230984    MEM INFO    4. 0x76ffe980 0x000001e0
 1930 15:44:09.237634  BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
 1931 15:44:09.241471  MTRR: Physical address space:
 1932 15:44:09.247882  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1933 15:44:09.254168  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1934 15:44:09.261186  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
 1935 15:44:09.264080  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
 1936 15:44:09.270952  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
 1937 15:44:09.277628  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
 1938 15:44:09.284260  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
 1939 15:44:09.287448  MTRR: Fixed MSR 0x250 0x0606060606060606
 1940 15:44:09.294126  MTRR: Fixed MSR 0x258 0x0606060606060606
 1941 15:44:09.297467  MTRR: Fixed MSR 0x259 0x0000000000000000
 1942 15:44:09.300672  MTRR: Fixed MSR 0x268 0x0606060606060606
 1943 15:44:09.303984  MTRR: Fixed MSR 0x269 0x0606060606060606
 1944 15:44:09.307440  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1945 15:44:09.314201  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1946 15:44:09.317358  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1947 15:44:09.320923  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1948 15:44:09.324156  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1949 15:44:09.330831  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1950 15:44:09.333926  call enable_fixed_mtrr()
 1951 15:44:09.337281  CPU physical address size: 39 bits
 1952 15:44:09.340695  MTRR: default type WB/UC MTRR counts: 6/6.
 1953 15:44:09.343981  MTRR: UC selected as default type.
 1954 15:44:09.350703  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
 1955 15:44:09.357230  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
 1956 15:44:09.363730  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
 1957 15:44:09.370893  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
 1958 15:44:09.377303  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
 1959 15:44:09.383762  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
 1960 15:44:09.384279  
 1961 15:44:09.384661  MTRR check
 1962 15:44:09.386944  Fixed MTRRs   : Enabled
 1963 15:44:09.390460  Variable MTRRs: Enabled
 1964 15:44:09.390942  
 1965 15:44:09.393487  MTRR: Fixed MSR 0x250 0x0606060606060606
 1966 15:44:09.396827  MTRR: Fixed MSR 0x258 0x0606060606060606
 1967 15:44:09.403542  MTRR: Fixed MSR 0x259 0x0000000000000000
 1968 15:44:09.407098  MTRR: Fixed MSR 0x268 0x0606060606060606
 1969 15:44:09.410242  MTRR: Fixed MSR 0x269 0x0606060606060606
 1970 15:44:09.413621  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1971 15:44:09.420214  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1972 15:44:09.423675  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1973 15:44:09.426734  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1974 15:44:09.430036  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1975 15:44:09.433541  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1976 15:44:09.443642  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
 1977 15:44:09.444109  call enable_fixed_mtrr()
 1978 15:44:09.448276  Checking cr50 for pending updates
 1979 15:44:09.452087  CPU physical address size: 39 bits
 1980 15:44:09.455585  MTRR: Fixed MSR 0x250 0x0606060606060606
 1981 15:44:09.458701  MTRR: Fixed MSR 0x250 0x0606060606060606
 1982 15:44:09.465117  MTRR: Fixed MSR 0x258 0x0606060606060606
 1983 15:44:09.468664  MTRR: Fixed MSR 0x259 0x0000000000000000
 1984 15:44:09.471920  MTRR: Fixed MSR 0x268 0x0606060606060606
 1985 15:44:09.475187  MTRR: Fixed MSR 0x269 0x0606060606060606
 1986 15:44:09.478508  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1987 15:44:09.485138  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1988 15:44:09.488660  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1989 15:44:09.491740  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1990 15:44:09.495220  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1991 15:44:09.501919  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1992 15:44:09.505041  MTRR: Fixed MSR 0x258 0x0606060606060606
 1993 15:44:09.508477  call enable_fixed_mtrr()
 1994 15:44:09.511653  MTRR: Fixed MSR 0x259 0x0000000000000000
 1995 15:44:09.514957  MTRR: Fixed MSR 0x268 0x0606060606060606
 1996 15:44:09.521734  MTRR: Fixed MSR 0x269 0x0606060606060606
 1997 15:44:09.524894  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1998 15:44:09.528091  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1999 15:44:09.531895  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2000 15:44:09.538573  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2001 15:44:09.541420  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2002 15:44:09.545000  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2003 15:44:09.548098  CPU physical address size: 39 bits
 2004 15:44:09.555062  call enable_fixed_mtrr()
 2005 15:44:09.555547  Reading cr50 TPM mode
 2006 15:44:09.558312  MTRR: Fixed MSR 0x250 0x0606060606060606
 2007 15:44:09.565611  MTRR: Fixed MSR 0x250 0x0606060606060606
 2008 15:44:09.568556  MTRR: Fixed MSR 0x258 0x0606060606060606
 2009 15:44:09.571674  MTRR: Fixed MSR 0x259 0x0000000000000000
 2010 15:44:09.575305  MTRR: Fixed MSR 0x268 0x0606060606060606
 2011 15:44:09.581675  MTRR: Fixed MSR 0x269 0x0606060606060606
 2012 15:44:09.585040  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2013 15:44:09.588567  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2014 15:44:09.591536  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2015 15:44:09.595022  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2016 15:44:09.601466  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2017 15:44:09.605193  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2018 15:44:09.608133  MTRR: Fixed MSR 0x258 0x0606060606060606
 2019 15:44:09.611784  call enable_fixed_mtrr()
 2020 15:44:09.614905  MTRR: Fixed MSR 0x259 0x0000000000000000
 2021 15:44:09.621480  MTRR: Fixed MSR 0x268 0x0606060606060606
 2022 15:44:09.625128  MTRR: Fixed MSR 0x269 0x0606060606060606
 2023 15:44:09.628446  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2024 15:44:09.631558  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2025 15:44:09.638543  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2026 15:44:09.641316  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2027 15:44:09.644783  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2028 15:44:09.648059  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2029 15:44:09.652227  CPU physical address size: 39 bits
 2030 15:44:09.659301  call enable_fixed_mtrr()
 2031 15:44:09.662271  CPU physical address size: 39 bits
 2032 15:44:09.665610  MTRR: Fixed MSR 0x250 0x0606060606060606
 2033 15:44:09.668899  MTRR: Fixed MSR 0x250 0x0606060606060606
 2034 15:44:09.672009  MTRR: Fixed MSR 0x258 0x0606060606060606
 2035 15:44:09.678726  MTRR: Fixed MSR 0x259 0x0000000000000000
 2036 15:44:09.681988  MTRR: Fixed MSR 0x268 0x0606060606060606
 2037 15:44:09.685289  MTRR: Fixed MSR 0x269 0x0606060606060606
 2038 15:44:09.688561  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2039 15:44:09.695793  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2040 15:44:09.698940  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2041 15:44:09.701936  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2042 15:44:09.705212  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2043 15:44:09.708825  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2044 15:44:09.715174  MTRR: Fixed MSR 0x258 0x0606060606060606
 2045 15:44:09.718593  MTRR: Fixed MSR 0x259 0x0000000000000000
 2046 15:44:09.722022  MTRR: Fixed MSR 0x268 0x0606060606060606
 2047 15:44:09.728673  MTRR: Fixed MSR 0x269 0x0606060606060606
 2048 15:44:09.731717  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2049 15:44:09.735045  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2050 15:44:09.738459  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2051 15:44:09.745136  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2052 15:44:09.748717  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2053 15:44:09.751626  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2054 15:44:09.754917  call enable_fixed_mtrr()
 2055 15:44:09.758551  call enable_fixed_mtrr()
 2056 15:44:09.761906  CPU physical address size: 39 bits
 2057 15:44:09.764839  CPU physical address size: 39 bits
 2058 15:44:09.768505  CPU physical address size: 39 bits
 2059 15:44:09.774834  BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 6 ms
 2060 15:44:09.785009  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
 2061 15:44:09.788325  Checking segment from ROM address 0xffc02b38
 2062 15:44:09.791691  Checking segment from ROM address 0xffc02b54
 2063 15:44:09.798194  Loading segment from ROM address 0xffc02b38
 2064 15:44:09.798698    code (compression=0)
 2065 15:44:09.808375    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
 2066 15:44:09.815309  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
 2067 15:44:09.818111  it's not compressed!
 2068 15:44:09.957642  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
 2069 15:44:09.964062  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
 2070 15:44:09.970850  Loading segment from ROM address 0xffc02b54
 2071 15:44:09.971333    Entry Point 0x30000000
 2072 15:44:09.974222  Loaded segments
 2073 15:44:09.981141  BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
 2074 15:44:10.024119  Finalizing chipset.
 2075 15:44:10.027270  Finalizing SMM.
 2076 15:44:10.027889  APMC done.
 2077 15:44:10.034163  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
 2078 15:44:10.037032  mp_park_aps done after 0 msecs.
 2079 15:44:10.040358  Jumping to boot code at 0x30000000(0x76b25000)
 2080 15:44:10.050445  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
 2081 15:44:10.050933  
 2082 15:44:10.053536  Starting depthcharge on Voema...
 2083 15:44:10.054796  end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
 2084 15:44:10.055405  start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
 2085 15:44:10.055899  Setting prompt string to ['volteer:']
 2086 15:44:10.056381  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
 2087 15:44:10.063550  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2088 15:44:10.070287  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2089 15:44:10.073797  Looking for NVMe Controller 0x3005f220 @ 00:1d:00
 2090 15:44:10.077902  Failed to find eMMC card reader
 2091 15:44:10.081464  Wipe memory regions:
 2092 15:44:10.084371  	[0x00000000001000, 0x000000000a0000)
 2093 15:44:10.087757  	[0x00000000100000, 0x00000030000000)
 2094 15:44:10.118445  	[0x00000032662db0, 0x000000769ef000)
 2095 15:44:10.157240  	[0x00000100000000, 0x00000280400000)
 2096 15:44:10.362280  ec_init: CrosEC protocol v3 supported (256, 256)
 2097 15:44:10.369304  update_port_state: port C0 state: usb enable 1 mux conn 0
 2098 15:44:10.378561  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
 2099 15:44:10.385832  pmc_check_ipc_sts: STS_BUSY done after 1561 us
 2100 15:44:10.389278  send_conn_disc_msg: pmc_send_cmd succeeded
 2101 15:44:10.821115  R8152: Initializing
 2102 15:44:10.824562  Version 9 (ocp_data = 6010)
 2103 15:44:10.827760  R8152: Done initializing
 2104 15:44:10.830891  Adding net device
 2105 15:44:11.136003  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
 2106 15:44:11.136704  
 2107 15:44:11.139964  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
 2109 15:44:11.241901  volteer: tftpboot 192.168.201.1 7300476/tftp-deploy-aksiq6pf/kernel/bzImage 7300476/tftp-deploy-aksiq6pf/kernel/cmdline 7300476/tftp-deploy-aksiq6pf/ramdisk/ramdisk.cpio.gz
 2110 15:44:11.242574  Setting prompt string to 'Starting kernel'
 2111 15:44:11.243000  Setting prompt string to ['Starting kernel']
 2112 15:44:11.243401  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
 2113 15:44:11.243811  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:04:43)
 2114 15:44:11.247311  tftpboot 192.168.201.1 7300476/tftp-deploy-aksiq6pf/kernel/bzImoy-aksiq6pf/kernel/cmdline 7300476/tftp-deploy-aksiq6pf/ramdisk/ramdisk.cpio.gz
 2115 15:44:11.247827  Waiting for link
 2116 15:44:11.451570  done.
 2117 15:44:11.452115  MAC: 00:e0:4c:71:a6:42
 2118 15:44:11.455566  Sending DHCP discover... done.
 2119 15:44:11.458337  Waiting for reply... done.
 2120 15:44:11.461537  Sending DHCP request... done.
 2121 15:44:11.465317  Waiting for reply... done.
 2122 15:44:11.468180  My ip is 192.168.201.17
 2123 15:44:11.471566  The DHCP server ip is 192.168.201.1
 2124 15:44:11.478514  TFTP server IP predefined by user: 192.168.201.1
 2125 15:44:11.485127  Bootfile predefined by user: 7300476/tftp-deploy-aksiq6pf/kernel/bzImage
 2126 15:44:11.488125  Sending tftp read request... done.
 2127 15:44:11.491634  Waiting for the transfer... 
 2128 15:44:11.780187  00000000 ################################################################
 2129 15:44:12.062057  00080000 ################################################################
 2130 15:44:12.321895  00100000 ################################################################
 2131 15:44:12.608679  00180000 ################################################################
 2132 15:44:12.889435  00200000 ################################################################
 2133 15:44:13.189872  00280000 ################################################################
 2134 15:44:13.455715  00300000 ################################################################
 2135 15:44:13.723664  00380000 ################################################################
 2136 15:44:14.023389  00400000 ################################################################
 2137 15:44:14.278878  00480000 ################################################################
 2138 15:44:14.554057  00500000 ################################################################
 2139 15:44:14.800406  00580000 ################################################################
 2140 15:44:15.046523  00600000 ################################################################ done.
 2141 15:44:15.049703  The bootfile was 6815632 bytes long.
 2142 15:44:15.053367  Sending tftp read request... done.
 2143 15:44:15.056321  Waiting for the transfer... 
 2144 15:44:15.306851  00000000 ################################################################
 2145 15:44:15.559868  00080000 ################################################################
 2146 15:44:15.858117  00100000 ################################################################
 2147 15:44:16.171439  00180000 ################################################################
 2148 15:44:16.467458  00200000 ################################################################
 2149 15:44:16.766295  00280000 ################################################################
 2150 15:44:17.061751  00300000 ################################################################
 2151 15:44:17.342919  00380000 ################################################################
 2152 15:44:17.604387  00400000 ################################################################
 2153 15:44:17.843259  00480000 ################################################################
 2154 15:44:18.077133  00500000 ################################################################
 2155 15:44:18.314698  00580000 ################################################################
 2156 15:44:18.550377  00600000 ################################################################
 2157 15:44:18.793261  00680000 ################################################################
 2158 15:44:19.080901  00700000 ################################################################
 2159 15:44:19.365762  00780000 ################################################################
 2160 15:44:19.455468  00800000 #################### done.
 2161 15:44:19.458637  Sending tftp read request... done.
 2162 15:44:19.458725  Waiting for the transfer... 
 2163 15:44:19.461869  00000000 # done.
 2164 15:44:19.471766  Command line loaded dynamically from TFTP file: 7300476/tftp-deploy-aksiq6pf/kernel/cmdline
 2165 15:44:19.485302  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
 2166 15:44:19.488428  Shutting down all USB controllers.
 2167 15:44:19.491624  Removing current net device
 2168 15:44:19.494947  Finalizing coreboot
 2169 15:44:19.501627  Exiting depthcharge with code 4 at timestamp: 18101200
 2170 15:44:19.501711  
 2171 15:44:19.501777  Starting kernel ...
 2172 15:44:19.501838  
 2173 15:44:19.501897  
 2174 15:44:19.502203  end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
 2175 15:44:19.502301  start: 2.2.5 auto-login-action (timeout 00:04:34) [common]
 2176 15:44:19.502389  Setting prompt string to ['Linux version [0-9]']
 2177 15:44:19.502469  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
 2178 15:44:19.502542  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:05:00)
 2180 15:48:53.503486  end: 2.2.5 auto-login-action (duration 00:04:34) [common]
 2182 15:48:53.504692  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 274 seconds'
 2184 15:48:53.505608  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2187 15:48:53.507140  end: 2 depthcharge-action (duration 00:05:00) [common]
 2189 15:48:53.508256  Cleaning after the job
 2190 15:48:53.508394  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300476/tftp-deploy-aksiq6pf/ramdisk
 2191 15:48:53.509066  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300476/tftp-deploy-aksiq6pf/kernel
 2192 15:48:53.509554  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300476/tftp-deploy-aksiq6pf/modules
 2193 15:48:53.509750  start: 5.1 power-off (timeout 00:00:30) [common]
 2194 15:48:53.509899  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
 2195 15:48:53.528611  >> Command sent successfully.

 2196 15:48:53.530406  Returned 0 in 0 seconds
 2197 15:48:53.631647  end: 5.1 power-off (duration 00:00:00) [common]
 2199 15:48:53.633221  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2200 15:48:53.634408  Listened to connection for namespace 'common' for up to 1s
 2201 15:48:54.639342  Finalising connection for namespace 'common'
 2202 15:48:54.640096  Disconnecting from shell: Finalise
 2203 15:48:54.741791  end: 5.2 read-feedback (duration 00:00:01) [common]
 2204 15:48:54.742407  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7300476
 2205 15:48:54.750379  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7300476
 2206 15:48:54.750494  JobError: Your job cannot terminate cleanly.