Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 15:43:45.729727 lava-dispatcher, installed at version: 2022.06
2 15:43:45.729917 start: 0 validate
3 15:43:45.730048 Start time: 2022-09-17 15:43:45.730043+00:00 (UTC)
4 15:43:45.730167 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:43:45.730293 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
6 15:43:46.023258 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:43:46.023436 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-229-gb433f12afe250%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:43:46.309919 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:43:46.310083 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:43:46.599089 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:43:46.599277 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-229-gb433f12afe250%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:43:46.892023 validate duration: 1.16
14 15:43:46.892301 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:43:46.892410 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:43:46.892508 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:43:46.892636 Not decompressing ramdisk as can be used compressed.
18 15:43:46.892741 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220826.0/amd64/initrd.cpio.gz
19 15:43:46.892822 saving as /var/lib/lava/dispatcher/tmp/7300462/tftp-deploy-r1gmh8mf/ramdisk/initrd.cpio.gz
20 15:43:46.892884 total size: 5411044 (5MB)
21 15:43:46.894173 progress 0% (0MB)
22 15:43:46.895720 progress 5% (0MB)
23 15:43:46.897087 progress 10% (0MB)
24 15:43:46.898613 progress 15% (0MB)
25 15:43:46.900278 progress 20% (1MB)
26 15:43:46.901764 progress 25% (1MB)
27 15:43:46.903171 progress 30% (1MB)
28 15:43:46.904662 progress 35% (1MB)
29 15:43:46.906189 progress 40% (2MB)
30 15:43:46.907618 progress 45% (2MB)
31 15:43:46.908971 progress 50% (2MB)
32 15:43:46.910371 progress 55% (2MB)
33 15:43:46.911984 progress 60% (3MB)
34 15:43:46.913404 progress 65% (3MB)
35 15:43:46.914793 progress 70% (3MB)
36 15:43:46.916177 progress 75% (3MB)
37 15:43:46.917751 progress 80% (4MB)
38 15:43:46.919132 progress 85% (4MB)
39 15:43:46.920607 progress 90% (4MB)
40 15:43:46.922055 progress 95% (4MB)
41 15:43:46.923551 progress 100% (5MB)
42 15:43:46.923737 5MB downloaded in 0.03s (167.29MB/s)
43 15:43:46.923895 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:43:46.924147 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:43:46.924241 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:43:46.924362 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:43:46.924469 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-229-gb433f12afe250/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:43:46.924540 saving as /var/lib/lava/dispatcher/tmp/7300462/tftp-deploy-r1gmh8mf/kernel/bzImage
50 15:43:46.924604 total size: 6815632 (6MB)
51 15:43:46.924667 No compression specified
52 15:43:46.925779 progress 0% (0MB)
53 15:43:46.927652 progress 5% (0MB)
54 15:43:46.929400 progress 10% (0MB)
55 15:43:46.931300 progress 15% (1MB)
56 15:43:46.932974 progress 20% (1MB)
57 15:43:46.934668 progress 25% (1MB)
58 15:43:46.936634 progress 30% (1MB)
59 15:43:46.938353 progress 35% (2MB)
60 15:43:46.940276 progress 40% (2MB)
61 15:43:46.942056 progress 45% (2MB)
62 15:43:46.943832 progress 50% (3MB)
63 15:43:46.945713 progress 55% (3MB)
64 15:43:46.947362 progress 60% (3MB)
65 15:43:46.949209 progress 65% (4MB)
66 15:43:46.950919 progress 70% (4MB)
67 15:43:46.952552 progress 75% (4MB)
68 15:43:46.954358 progress 80% (5MB)
69 15:43:46.956003 progress 85% (5MB)
70 15:43:46.958053 progress 90% (5MB)
71 15:43:46.960644 progress 95% (6MB)
72 15:43:46.963412 progress 100% (6MB)
73 15:43:46.963837 6MB downloaded in 0.04s (165.70MB/s)
74 15:43:46.964022 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:43:46.964274 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:43:46.964372 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:43:46.964466 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:43:46.964570 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220826.0/amd64/full.rootfs.tar.xz
80 15:43:46.964640 saving as /var/lib/lava/dispatcher/tmp/7300462/tftp-deploy-r1gmh8mf/nfsrootfs/full.rootfs.tar
81 15:43:46.964704 total size: 133217788 (127MB)
82 15:43:46.964767 Using unxz to decompress xz
83 15:43:46.968302 progress 0% (0MB)
84 15:43:47.323638 progress 5% (6MB)
85 15:43:47.701724 progress 10% (12MB)
86 15:43:48.018646 progress 15% (19MB)
87 15:43:48.246291 progress 20% (25MB)
88 15:43:48.515328 progress 25% (31MB)
89 15:43:48.881652 progress 30% (38MB)
90 15:43:49.284065 progress 35% (44MB)
91 15:43:49.705106 progress 40% (50MB)
92 15:43:50.104269 progress 45% (57MB)
93 15:43:50.474812 progress 50% (63MB)
94 15:43:50.863033 progress 55% (69MB)
95 15:43:51.248512 progress 60% (76MB)
96 15:43:51.634382 progress 65% (82MB)
97 15:43:52.007789 progress 70% (88MB)
98 15:43:52.385674 progress 75% (95MB)
99 15:43:52.835734 progress 80% (101MB)
100 15:43:53.293364 progress 85% (108MB)
101 15:43:53.569534 progress 90% (114MB)
102 15:43:53.928011 progress 95% (120MB)
103 15:43:54.337225 progress 100% (127MB)
104 15:43:54.343024 127MB downloaded in 7.38s (17.22MB/s)
105 15:43:54.343458 end: 1.3.1 http-download (duration 00:00:07) [common]
107 15:43:54.343930 end: 1.3 download-retry (duration 00:00:07) [common]
108 15:43:54.344092 start: 1.4 download-retry (timeout 00:09:53) [common]
109 15:43:54.344253 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 15:43:54.344433 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-229-gb433f12afe250/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:43:54.344563 saving as /var/lib/lava/dispatcher/tmp/7300462/tftp-deploy-r1gmh8mf/modules/modules.tar
112 15:43:54.344676 total size: 51872 (0MB)
113 15:43:54.344793 Using unxz to decompress xz
114 15:43:54.349195 progress 63% (0MB)
115 15:43:54.349648 progress 100% (0MB)
116 15:43:54.352972 0MB downloaded in 0.01s (5.97MB/s)
117 15:43:54.353248 end: 1.4.1 http-download (duration 00:00:00) [common]
119 15:43:54.353535 end: 1.4 download-retry (duration 00:00:00) [common]
120 15:43:54.353639 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 15:43:54.353739 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 15:43:55.626993 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7300462/extract-nfsrootfs-v4h83frb
123 15:43:55.627196 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 15:43:55.627300 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 15:43:55.627469 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482
126 15:43:55.627611 makedir: /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin
127 15:43:55.627696 makedir: /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/tests
128 15:43:55.627779 makedir: /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/results
129 15:43:55.627879 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-add-keys
130 15:43:55.628010 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-add-sources
131 15:43:55.628145 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-background-process-start
132 15:43:55.628277 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-background-process-stop
133 15:43:55.628391 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-common-functions
134 15:43:55.628502 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-echo-ipv4
135 15:43:55.628652 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-install-packages
136 15:43:55.628763 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-installed-packages
137 15:43:55.628872 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-os-build
138 15:43:55.628984 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-probe-channel
139 15:43:55.629116 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-probe-ip
140 15:43:55.629228 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-target-ip
141 15:43:55.629345 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-target-mac
142 15:43:55.629458 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-target-storage
143 15:43:55.629587 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-test-case
144 15:43:55.629729 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-test-event
145 15:43:55.629839 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-test-feedback
146 15:43:55.629952 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-test-raise
147 15:43:55.630062 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-test-reference
148 15:43:55.630188 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-test-runner
149 15:43:55.630300 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-test-set
150 15:43:55.630422 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-test-shell
151 15:43:55.630533 Updating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-install-packages (oe)
152 15:43:55.630665 Updating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/bin/lava-installed-packages (oe)
153 15:43:55.630778 Creating /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/environment
154 15:43:55.630864 LAVA metadata
155 15:43:55.630931 - LAVA_JOB_ID=7300462
156 15:43:55.630997 - LAVA_DISPATCHER_IP=192.168.201.1
157 15:43:55.631096 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 15:43:55.631178 skipped lava-vland-overlay
159 15:43:55.631270 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 15:43:55.631353 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 15:43:55.631417 skipped lava-multinode-overlay
162 15:43:55.631509 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 15:43:55.631606 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 15:43:55.631679 Loading test definitions
165 15:43:55.631801 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
166 15:43:55.631871 Using /lava-7300462 at stage 0
167 15:43:55.632125 uuid=7300462_1.5.2.3.1 testdef=None
168 15:43:55.632230 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 15:43:55.632322 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
170 15:43:55.632866 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 15:43:55.633101 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
173 15:43:55.633699 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 15:43:55.633969 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
176 15:43:55.634507 runner path: /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/0/tests/0_dmesg test_uuid 7300462_1.5.2.3.1
177 15:43:55.634661 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 15:43:55.634899 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
180 15:43:55.634975 Using /lava-7300462 at stage 1
181 15:43:55.635214 uuid=7300462_1.5.2.3.5 testdef=None
182 15:43:55.635321 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 15:43:55.635424 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
184 15:43:55.635893 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 15:43:55.636120 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
187 15:43:55.636686 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 15:43:55.636961 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
190 15:43:55.637540 runner path: /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/1/tests/1_bootrr test_uuid 7300462_1.5.2.3.5
191 15:43:55.637685 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 15:43:55.637931 Creating lava-test-runner.conf files
194 15:43:55.637995 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/0 for stage 0
195 15:43:55.638078 - 0_dmesg
196 15:43:55.638153 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7300462/lava-overlay-4p1jm482/lava-7300462/1 for stage 1
197 15:43:55.638236 - 1_bootrr
198 15:43:55.638327 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 15:43:55.638432 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
200 15:43:55.644035 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 15:43:55.644151 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
202 15:43:55.644244 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 15:43:55.644336 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 15:43:55.644426 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
205 15:43:55.747829 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 15:43:55.748182 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 15:43:55.748324 extracting modules file /var/lib/lava/dispatcher/tmp/7300462/tftp-deploy-r1gmh8mf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7300462/extract-nfsrootfs-v4h83frb
208 15:43:55.752525 extracting modules file /var/lib/lava/dispatcher/tmp/7300462/tftp-deploy-r1gmh8mf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7300462/extract-overlay-ramdisk-ks2vp4zk/ramdisk
209 15:43:55.756413 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 15:43:55.756606 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 15:43:55.756698 [common] Applying overlay to NFS
212 15:43:55.756770 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7300462/compress-overlay-t58ocmtz/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7300462/extract-nfsrootfs-v4h83frb
213 15:43:55.760744 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 15:43:55.760868 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 15:43:55.760965 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 15:43:55.761058 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 15:43:55.761140 Building ramdisk /var/lib/lava/dispatcher/tmp/7300462/extract-overlay-ramdisk-ks2vp4zk/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7300462/extract-overlay-ramdisk-ks2vp4zk/ramdisk
218 15:43:55.794288 >> 24431 blocks
219 15:43:56.266090 rename /var/lib/lava/dispatcher/tmp/7300462/extract-overlay-ramdisk-ks2vp4zk/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7300462/tftp-deploy-r1gmh8mf/ramdisk/ramdisk.cpio.gz
220 15:43:56.266497 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 15:43:56.266624 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
222 15:43:56.266727 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
223 15:43:56.266821 No mkimage arch provided, not using FIT.
224 15:43:56.266911 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 15:43:56.266994 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 15:43:56.267091 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 15:43:56.267184 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
228 15:43:56.267262 No LXC device requested
229 15:43:56.267341 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 15:43:56.267430 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
231 15:43:56.267513 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 15:43:56.267582 Checking files for TFTP limit of 4294967296 bytes.
233 15:43:56.267956 end: 1 tftp-deploy (duration 00:00:09) [common]
234 15:43:56.268062 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 15:43:56.268156 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 15:43:56.268283 substitutions:
237 15:43:56.268349 - {DTB}: None
238 15:43:56.268411 - {INITRD}: 7300462/tftp-deploy-r1gmh8mf/ramdisk/ramdisk.cpio.gz
239 15:43:56.268472 - {KERNEL}: 7300462/tftp-deploy-r1gmh8mf/kernel/bzImage
240 15:43:56.268531 - {LAVA_MAC}: None
241 15:43:56.268588 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7300462/extract-nfsrootfs-v4h83frb
242 15:43:56.268647 - {NFS_SERVER_IP}: 192.168.201.1
243 15:43:56.268703 - {PRESEED_CONFIG}: None
244 15:43:56.268760 - {PRESEED_LOCAL}: None
245 15:43:56.268815 - {RAMDISK}: 7300462/tftp-deploy-r1gmh8mf/ramdisk/ramdisk.cpio.gz
246 15:43:56.268871 - {ROOT_PART}: None
247 15:43:56.268926 - {ROOT}: None
248 15:43:56.268982 - {SERVER_IP}: 192.168.201.1
249 15:43:56.269037 - {TEE}: None
250 15:43:56.269091 Parsed boot commands:
251 15:43:56.269154 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 15:43:56.269350 Parsed boot commands: tftpboot 192.168.201.1 7300462/tftp-deploy-r1gmh8mf/kernel/bzImage 7300462/tftp-deploy-r1gmh8mf/kernel/cmdline 7300462/tftp-deploy-r1gmh8mf/ramdisk/ramdisk.cpio.gz
253 15:43:56.269454 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 15:43:56.269546 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 15:43:56.269679 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 15:43:56.269771 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 15:43:56.269847 Not connected, no need to disconnect.
258 15:43:56.269926 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 15:43:56.270011 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 15:43:56.270112 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
261 15:43:56.272837 Setting prompt string to ['lava-test: # ']
262 15:43:56.273124 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 15:43:56.273229 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 15:43:56.273364 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 15:43:56.273456 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 15:43:56.273667 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
267 15:43:56.293094 >> Command sent successfully.
268 15:43:56.295540 Returned 0 in 0 seconds
269 15:43:56.396335 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 15:43:56.396666 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 15:43:56.396764 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 15:43:56.396853 Setting prompt string to 'Starting depthcharge on Helios...'
274 15:43:56.396917 Changing prompt to 'Starting depthcharge on Helios...'
275 15:43:56.396984 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
276 15:43:56.397269 [Enter `^Ec?' for help]
277 15:44:03.815238
278 15:44:03.815394
279 15:44:03.824763 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
280 15:44:03.828123 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
281 15:44:03.834826 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
282 15:44:03.838364 CPU: AES supported, TXT NOT supported, VT supported
283 15:44:03.844421 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
284 15:44:03.851041 PCH: device id 0284 (rev 00) is Cometlake-U Premium
285 15:44:03.854667 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
286 15:44:03.858076 VBOOT: Loading verstage.
287 15:44:03.864461 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
288 15:44:03.867716 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
289 15:44:03.874601 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
290 15:44:03.874693 CBFS @ c08000 size 3f8000
291 15:44:03.880861 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
292 15:44:03.884321 CBFS: Locating 'fallback/verstage'
293 15:44:03.887450 CBFS: Found @ offset 10fb80 size 1072c
294 15:44:03.891622
295 15:44:03.891711
296 15:44:03.901991 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
297 15:44:03.916331 Probing TPM: . done!
298 15:44:03.919639 TPM ready after 0 ms
299 15:44:03.922918 Connected to device vid:did:rid of 1ae0:0028:00
300 15:44:03.933317 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
301 15:44:03.936512 Initialized TPM device CR50 revision 0
302 15:44:03.969719 tlcl_send_startup: Startup return code is 0
303 15:44:03.969825 TPM: setup succeeded
304 15:44:03.981976 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
305 15:44:03.985990 Chrome EC: UHEPI supported
306 15:44:03.989471 Phase 1
307 15:44:03.992240 FMAP: area GBB found @ c05000 (12288 bytes)
308 15:44:03.998959 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
309 15:44:04.002330 Phase 2
310 15:44:04.002425 Phase 3
311 15:44:04.005750 FMAP: area GBB found @ c05000 (12288 bytes)
312 15:44:04.011862 VB2:vb2_report_dev_firmware() This is developer signed firmware
313 15:44:04.018559 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
314 15:44:04.021972 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
315 15:44:04.028476 VB2:vb2_verify_keyblock() Checking keyblock signature...
316 15:44:04.044953 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
317 15:44:04.048061 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
318 15:44:04.054808 VB2:vb2_verify_fw_preamble() Verifying preamble.
319 15:44:04.058770 Phase 4
320 15:44:04.062196 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
321 15:44:04.068640 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
322 15:44:04.248524 VB2:vb2_rsa_verify_digest() Digest check failed!
323 15:44:04.254735 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
324 15:44:04.254864 Saving nvdata
325 15:44:04.258186 Reboot requested (10020007)
326 15:44:04.261400 board_reset() called!
327 15:44:04.261486 full_reset() called!
328 15:44:08.781839
329 15:44:08.781995
330 15:44:08.792123 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
331 15:44:08.794883 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
332 15:44:08.801987 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
333 15:44:08.804708 CPU: AES supported, TXT NOT supported, VT supported
334 15:44:08.811719 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
335 15:44:08.817949 PCH: device id 0284 (rev 00) is Cometlake-U Premium
336 15:44:08.821678 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
337 15:44:08.824589 VBOOT: Loading verstage.
338 15:44:08.831437 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
339 15:44:08.834594 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
340 15:44:08.840917 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
341 15:44:08.844285 CBFS @ c08000 size 3f8000
342 15:44:08.847660 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
343 15:44:08.850691 CBFS: Locating 'fallback/verstage'
344 15:44:08.857374 CBFS: Found @ offset 10fb80 size 1072c
345 15:44:08.857461
346 15:44:08.857529
347 15:44:08.867455 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
348 15:44:08.883310 Probing TPM: . done!
349 15:44:08.886655 TPM ready after 0 ms
350 15:44:08.890082 Connected to device vid:did:rid of 1ae0:0028:00
351 15:44:08.899864 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
352 15:44:08.903689 Initialized TPM device CR50 revision 0
353 15:44:08.936419 tlcl_send_startup: Startup return code is 0
354 15:44:08.936566 TPM: setup succeeded
355 15:44:08.948847 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
356 15:44:08.952758 Chrome EC: UHEPI supported
357 15:44:08.956076 Phase 1
358 15:44:08.959479 FMAP: area GBB found @ c05000 (12288 bytes)
359 15:44:08.966264 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
360 15:44:08.972460 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
361 15:44:08.976207 Recovery requested (1009000e)
362 15:44:08.982002 Saving nvdata
363 15:44:08.987728 tlcl_extend: response is 0
364 15:44:08.996946 tlcl_extend: response is 0
365 15:44:09.003803 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 15:44:09.007081 CBFS @ c08000 size 3f8000
367 15:44:09.013587 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 15:44:09.016817 CBFS: Locating 'fallback/romstage'
369 15:44:09.019786 CBFS: Found @ offset 80 size 145fc
370 15:44:09.023171 Accumulated console time in verstage 98 ms
371 15:44:09.023262
372 15:44:09.023347
373 15:44:09.036520 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
374 15:44:09.043179 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
375 15:44:09.046289 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
376 15:44:09.049217 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
377 15:44:09.056102 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
378 15:44:09.059382 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
379 15:44:09.062724 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
380 15:44:09.065956 TCO_STS: 0000 0000
381 15:44:09.069504 GEN_PMCON: e0015238 00000200
382 15:44:09.072341 GBLRST_CAUSE: 00000000 00000000
383 15:44:09.072426 prev_sleep_state 5
384 15:44:09.076312 Boot Count incremented to 31536
385 15:44:09.083187 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 15:44:09.086520 CBFS @ c08000 size 3f8000
387 15:44:09.093166 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 15:44:09.093257 CBFS: Locating 'fspm.bin'
389 15:44:09.099718 CBFS: Found @ offset 5ffc0 size 71000
390 15:44:09.102727 Chrome EC: UHEPI supported
391 15:44:09.109490 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
392 15:44:09.112958 Probing TPM: done!
393 15:44:09.119728 Connected to device vid:did:rid of 1ae0:0028:00
394 15:44:09.129561 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
395 15:44:09.135753 Initialized TPM device CR50 revision 0
396 15:44:09.144772 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
397 15:44:09.154397 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
398 15:44:09.154487 MRC cache found, size 1948
399 15:44:09.157612 bootmode is set to: 2
400 15:44:09.161006 PRMRR disabled by config.
401 15:44:09.164379 SPD INDEX = 1
402 15:44:09.167658 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
403 15:44:09.170609 CBFS @ c08000 size 3f8000
404 15:44:09.177526 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
405 15:44:09.177636 CBFS: Locating 'spd.bin'
406 15:44:09.181113 CBFS: Found @ offset 5fb80 size 400
407 15:44:09.184370 SPD: module type is LPDDR3
408 15:44:09.187404 SPD: module part is
409 15:44:09.194029 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
410 15:44:09.197591 SPD: device width 4 bits, bus width 8 bits
411 15:44:09.200542 SPD: module size is 4096 MB (per channel)
412 15:44:09.203972 memory slot: 0 configuration done.
413 15:44:09.207335 memory slot: 2 configuration done.
414 15:44:09.259379 CBMEM:
415 15:44:09.262661 IMD: root @ 99fff000 254 entries.
416 15:44:09.266018 IMD: root @ 99ffec00 62 entries.
417 15:44:09.269289 External stage cache:
418 15:44:09.272691 IMD: root @ 9abff000 254 entries.
419 15:44:09.276121 IMD: root @ 9abfec00 62 entries.
420 15:44:09.282813 Chrome EC: clear events_b mask to 0x0000000020004000
421 15:44:09.294872 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 15:44:09.308189 tlcl_write: response is 0
423 15:44:09.317220 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 15:44:09.323596 MRC: TPM MRC hash updated successfully.
425 15:44:09.323704 2 DIMMs found
426 15:44:09.327236 SMM Memory Map
427 15:44:09.330663 SMRAM : 0x9a000000 0x1000000
428 15:44:09.334050 Subregion 0: 0x9a000000 0xa00000
429 15:44:09.336990 Subregion 1: 0x9aa00000 0x200000
430 15:44:09.340627 Subregion 2: 0x9ac00000 0x400000
431 15:44:09.343378 top_of_ram = 0x9a000000
432 15:44:09.346872 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
433 15:44:09.353624 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
434 15:44:09.356518 MTRR Range: Start=ff000000 End=0 (Size 1000000)
435 15:44:09.363404 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 15:44:09.366398 CBFS @ c08000 size 3f8000
437 15:44:09.369651 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 15:44:09.376579 CBFS: Locating 'fallback/postcar'
439 15:44:09.380176 CBFS: Found @ offset 107000 size 4b44
440 15:44:09.386377 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
441 15:44:09.396239 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
442 15:44:09.399391 Processing 180 relocs. Offset value of 0x97c0c000
443 15:44:09.408062 Accumulated console time in romstage 286 ms
444 15:44:09.408141
445 15:44:09.408211
446 15:44:09.417736 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
447 15:44:09.424618 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
448 15:44:09.427890 CBFS @ c08000 size 3f8000
449 15:44:09.434280 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
450 15:44:09.437753 CBFS: Locating 'fallback/ramstage'
451 15:44:09.441017 CBFS: Found @ offset 43380 size 1b9e8
452 15:44:09.447742 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
453 15:44:09.479857 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
454 15:44:09.486683 Processing 3976 relocs. Offset value of 0x98db0000
455 15:44:09.489588 Accumulated console time in postcar 52 ms
456 15:44:09.489684
457 15:44:09.489753
458 15:44:09.499267 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
459 15:44:09.505942 FMAP: area RO_VPD found @ c00000 (16384 bytes)
460 15:44:09.509521 WARNING: RO_VPD is uninitialized or empty.
461 15:44:09.512532 FMAP: area RW_VPD found @ af8000 (8192 bytes)
462 15:44:09.519354 FMAP: area RW_VPD found @ af8000 (8192 bytes)
463 15:44:09.519447 Normal boot.
464 15:44:09.525705 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
465 15:44:09.529160 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 15:44:09.532673 CBFS @ c08000 size 3f8000
467 15:44:09.538923 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 15:44:09.541933 CBFS: Locating 'cpu_microcode_blob.bin'
469 15:44:09.545528 CBFS: Found @ offset 14700 size 2ec00
470 15:44:09.548682 microcode: sig=0x806ec pf=0x4 revision=0xc9
471 15:44:09.552113 Skip microcode update
472 15:44:09.558909 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
473 15:44:09.561983 CBFS @ c08000 size 3f8000
474 15:44:09.565375 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
475 15:44:09.568172 CBFS: Locating 'fsps.bin'
476 15:44:09.571497 CBFS: Found @ offset d1fc0 size 35000
477 15:44:09.597776 Detected 4 core, 8 thread CPU.
478 15:44:09.601107 Setting up SMI for CPU
479 15:44:09.604624 IED base = 0x9ac00000
480 15:44:09.607648 IED size = 0x00400000
481 15:44:09.607726 Will perform SMM setup.
482 15:44:09.614490 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
483 15:44:09.620944 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
484 15:44:09.627752 Processing 16 relocs. Offset value of 0x00030000
485 15:44:09.627843 Attempting to start 7 APs
486 15:44:09.633999 Waiting for 10ms after sending INIT.
487 15:44:09.647905 Waiting for 1st SIPI to complete...done.
488 15:44:09.648002 AP: slot 5 apic_id 4.
489 15:44:09.650812 AP: slot 6 apic_id 5.
490 15:44:09.654683 Waiting for 2nd SIPI to complete...done.
491 15:44:09.657464 AP: slot 3 apic_id 1.
492 15:44:09.660989 AP: slot 7 apic_id 7.
493 15:44:09.661078 AP: slot 2 apic_id 6.
494 15:44:09.664454 AP: slot 1 apic_id 3.
495 15:44:09.667434 AP: slot 4 apic_id 2.
496 15:44:09.673757 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
497 15:44:09.680598 Processing 13 relocs. Offset value of 0x00038000
498 15:44:09.687096 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
499 15:44:09.690507 Installing SMM handler to 0x9a000000
500 15:44:09.697198 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
501 15:44:09.703682 Processing 658 relocs. Offset value of 0x9a010000
502 15:44:09.710156 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
503 15:44:09.713644 Processing 13 relocs. Offset value of 0x9a008000
504 15:44:09.719881 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
505 15:44:09.726891 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
506 15:44:09.733502 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
507 15:44:09.736358 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
508 15:44:09.743354 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
509 15:44:09.749597 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
510 15:44:09.756391 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
511 15:44:09.762666 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
512 15:44:09.766279 Clearing SMI status registers
513 15:44:09.766359 SMI_STS: PM1
514 15:44:09.769894 PM1_STS: PWRBTN
515 15:44:09.769985 TCO_STS: SECOND_TO
516 15:44:09.772953 New SMBASE 0x9a000000
517 15:44:09.775944 In relocation handler: CPU 0
518 15:44:09.779333 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
519 15:44:09.785845 Writing SMRR. base = 0x9a000006, mask=0xff000800
520 15:44:09.785943 Relocation complete.
521 15:44:09.789340 New SMBASE 0x99fff400
522 15:44:09.792656 In relocation handler: CPU 3
523 15:44:09.796018 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
524 15:44:09.802223 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 15:44:09.802307 Relocation complete.
526 15:44:09.805611 New SMBASE 0x99fff000
527 15:44:09.809131 In relocation handler: CPU 4
528 15:44:09.812605 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
529 15:44:09.818953 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 15:44:09.819046 Relocation complete.
531 15:44:09.822370 New SMBASE 0x99fffc00
532 15:44:09.825196 In relocation handler: CPU 1
533 15:44:09.828749 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
534 15:44:09.835121 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 15:44:09.835209 Relocation complete.
536 15:44:09.838570 New SMBASE 0x99fff800
537 15:44:09.842047 In relocation handler: CPU 2
538 15:44:09.844934 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
539 15:44:09.848398 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 15:44:09.851795 Relocation complete.
541 15:44:09.855234 New SMBASE 0x99ffe400
542 15:44:09.858830 In relocation handler: CPU 7
543 15:44:09.861610 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
544 15:44:09.865011 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 15:44:09.867991 Relocation complete.
546 15:44:09.871401 New SMBASE 0x99ffe800
547 15:44:09.874791 In relocation handler: CPU 6
548 15:44:09.878253 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
549 15:44:09.881547 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 15:44:09.885048 Relocation complete.
551 15:44:09.887938 New SMBASE 0x99ffec00
552 15:44:09.891370 In relocation handler: CPU 5
553 15:44:09.894827 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
554 15:44:09.898300 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 15:44:09.901122 Relocation complete.
556 15:44:09.904558 Initializing CPU #0
557 15:44:09.907992 CPU: vendor Intel device 806ec
558 15:44:09.910993 CPU: family 06, model 8e, stepping 0c
559 15:44:09.914423 Clearing out pending MCEs
560 15:44:09.914519 Setting up local APIC...
561 15:44:09.917838 apic_id: 0x00 done.
562 15:44:09.920755 Turbo is available but hidden
563 15:44:09.924137 Turbo is available and visible
564 15:44:09.927695 VMX status: enabled
565 15:44:09.930845 IA32_FEATURE_CONTROL status: locked
566 15:44:09.930944 Skip microcode update
567 15:44:09.934221 CPU #0 initialized
568 15:44:09.937521 Initializing CPU #3
569 15:44:09.937605 Initializing CPU #7
570 15:44:09.940944 CPU: vendor Intel device 806ec
571 15:44:09.944365 CPU: family 06, model 8e, stepping 0c
572 15:44:09.947152 Clearing out pending MCEs
573 15:44:09.950512 Initializing CPU #1
574 15:44:09.950601 Initializing CPU #4
575 15:44:09.953985 CPU: vendor Intel device 806ec
576 15:44:09.957335 CPU: family 06, model 8e, stepping 0c
577 15:44:09.960368 CPU: vendor Intel device 806ec
578 15:44:09.967194 CPU: family 06, model 8e, stepping 0c
579 15:44:09.967312 Clearing out pending MCEs
580 15:44:09.970810 Clearing out pending MCEs
581 15:44:09.973687 Setting up local APIC...
582 15:44:09.973787 Initializing CPU #6
583 15:44:09.976900 Initializing CPU #5
584 15:44:09.980359 CPU: vendor Intel device 806ec
585 15:44:09.983733 CPU: family 06, model 8e, stepping 0c
586 15:44:09.987275 CPU: vendor Intel device 806ec
587 15:44:09.990121 CPU: family 06, model 8e, stepping 0c
588 15:44:09.993546 Clearing out pending MCEs
589 15:44:09.996963 Clearing out pending MCEs
590 15:44:10.000359 Setting up local APIC...
591 15:44:10.000456 Initializing CPU #2
592 15:44:10.003340 CPU: vendor Intel device 806ec
593 15:44:10.006655 CPU: family 06, model 8e, stepping 0c
594 15:44:10.009952 apic_id: 0x05 done.
595 15:44:10.013485 Setting up local APIC...
596 15:44:10.016829 Clearing out pending MCEs
597 15:44:10.019654 CPU: vendor Intel device 806ec
598 15:44:10.023076 CPU: family 06, model 8e, stepping 0c
599 15:44:10.023173 Setting up local APIC...
600 15:44:10.026423 Setting up local APIC...
601 15:44:10.029868 apic_id: 0x07 done.
602 15:44:10.033196 Clearing out pending MCEs
603 15:44:10.033306 VMX status: enabled
604 15:44:10.036668 Setting up local APIC...
605 15:44:10.039468 apic_id: 0x03 done.
606 15:44:10.042951 Setting up local APIC...
607 15:44:10.046405 IA32_FEATURE_CONTROL status: locked
608 15:44:10.046514 apic_id: 0x06 done.
609 15:44:10.049402 Skip microcode update
610 15:44:10.052753 apic_id: 0x04 done.
611 15:44:10.052850 VMX status: enabled
612 15:44:10.056258 VMX status: enabled
613 15:44:10.056349 VMX status: enabled
614 15:44:10.059562 apic_id: 0x02 done.
615 15:44:10.062819 IA32_FEATURE_CONTROL status: locked
616 15:44:10.066271 VMX status: enabled
617 15:44:10.066359 Skip microcode update
618 15:44:10.072522 IA32_FEATURE_CONTROL status: locked
619 15:44:10.072611 CPU #1 initialized
620 15:44:10.075934 Skip microcode update
621 15:44:10.079513 IA32_FEATURE_CONTROL status: locked
622 15:44:10.082394 CPU #7 initialized
623 15:44:10.082484 Skip microcode update
624 15:44:10.085704 CPU #4 initialized
625 15:44:10.085784 CPU #2 initialized
626 15:44:10.089092 apic_id: 0x01 done.
627 15:44:10.092534 IA32_FEATURE_CONTROL status: locked
628 15:44:10.095429 VMX status: enabled
629 15:44:10.095505 Skip microcode update
630 15:44:10.102156 IA32_FEATURE_CONTROL status: locked
631 15:44:10.102244 CPU #6 initialized
632 15:44:10.105605 Skip microcode update
633 15:44:10.105678 VMX status: enabled
634 15:44:10.109117 CPU #5 initialized
635 15:44:10.112043 IA32_FEATURE_CONTROL status: locked
636 15:44:10.115592 Skip microcode update
637 15:44:10.115739 CPU #3 initialized
638 15:44:10.121970 bsp_do_flight_plan done after 464 msecs.
639 15:44:10.125569 CPU: frequency set to 4200 MHz
640 15:44:10.125659 Enabling SMIs.
641 15:44:10.128446 Locking SMM.
642 15:44:10.141648 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
643 15:44:10.145043 CBFS @ c08000 size 3f8000
644 15:44:10.151812 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
645 15:44:10.151906 CBFS: Locating 'vbt.bin'
646 15:44:10.158710 CBFS: Found @ offset 5f5c0 size 499
647 15:44:10.161477 Found a VBT of 4608 bytes after decompression
648 15:44:10.347748 Display FSP Version Info HOB
649 15:44:10.350695 Reference Code - CPU = 9.0.1e.30
650 15:44:10.353951 uCode Version = 0.0.0.ca
651 15:44:10.357697 TXT ACM version = ff.ff.ff.ffff
652 15:44:10.361211 Display FSP Version Info HOB
653 15:44:10.364138 Reference Code - ME = 9.0.1e.30
654 15:44:10.367459 MEBx version = 0.0.0.0
655 15:44:10.370391 ME Firmware Version = Consumer SKU
656 15:44:10.373918 Display FSP Version Info HOB
657 15:44:10.377549 Reference Code - CML PCH = 9.0.1e.30
658 15:44:10.380687 PCH-CRID Status = Disabled
659 15:44:10.383730 PCH-CRID Original Value = ff.ff.ff.ffff
660 15:44:10.387412 PCH-CRID New Value = ff.ff.ff.ffff
661 15:44:10.390249 OPROM - RST - RAID = ff.ff.ff.ffff
662 15:44:10.393658 ChipsetInit Base Version = ff.ff.ff.ffff
663 15:44:10.396703 ChipsetInit Oem Version = ff.ff.ff.ffff
664 15:44:10.400234 Display FSP Version Info HOB
665 15:44:10.406845 Reference Code - SA - System Agent = 9.0.1e.30
666 15:44:10.409730 Reference Code - MRC = 0.7.1.6c
667 15:44:10.413336 SA - PCIe Version = 9.0.1e.30
668 15:44:10.413415 SA-CRID Status = Disabled
669 15:44:10.416284 SA-CRID Original Value = 0.0.0.c
670 15:44:10.419728 SA-CRID New Value = 0.0.0.c
671 15:44:10.423263 OPROM - VBIOS = ff.ff.ff.ffff
672 15:44:10.426802 RTC Init
673 15:44:10.429832 Set power on after power failure.
674 15:44:10.429923 Disabling Deep S3
675 15:44:10.433443 Disabling Deep S3
676 15:44:10.436204 Disabling Deep S4
677 15:44:10.436291 Disabling Deep S4
678 15:44:10.439313 Disabling Deep S5
679 15:44:10.439393 Disabling Deep S5
680 15:44:10.446250 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 196 exit 1
681 15:44:10.449180 Enumerating buses...
682 15:44:10.452646 Show all devs... Before device enumeration.
683 15:44:10.456020 Root Device: enabled 1
684 15:44:10.458947 CPU_CLUSTER: 0: enabled 1
685 15:44:10.459025 DOMAIN: 0000: enabled 1
686 15:44:10.462554 APIC: 00: enabled 1
687 15:44:10.465489 PCI: 00:00.0: enabled 1
688 15:44:10.465566 PCI: 00:02.0: enabled 1
689 15:44:10.468875 PCI: 00:04.0: enabled 0
690 15:44:10.472491 PCI: 00:05.0: enabled 0
691 15:44:10.475417 PCI: 00:12.0: enabled 1
692 15:44:10.475494 PCI: 00:12.5: enabled 0
693 15:44:10.478960 PCI: 00:12.6: enabled 0
694 15:44:10.481852 PCI: 00:14.0: enabled 1
695 15:44:10.485396 PCI: 00:14.1: enabled 0
696 15:44:10.485476 PCI: 00:14.3: enabled 1
697 15:44:10.488432 PCI: 00:14.5: enabled 0
698 15:44:10.491710 PCI: 00:15.0: enabled 1
699 15:44:10.495230 PCI: 00:15.1: enabled 1
700 15:44:10.495317 PCI: 00:15.2: enabled 0
701 15:44:10.498164 PCI: 00:15.3: enabled 0
702 15:44:10.501751 PCI: 00:16.0: enabled 1
703 15:44:10.505189 PCI: 00:16.1: enabled 0
704 15:44:10.505284 PCI: 00:16.2: enabled 0
705 15:44:10.508271 PCI: 00:16.3: enabled 0
706 15:44:10.511384 PCI: 00:16.4: enabled 0
707 15:44:10.514925 PCI: 00:16.5: enabled 0
708 15:44:10.515011 PCI: 00:17.0: enabled 1
709 15:44:10.517850 PCI: 00:19.0: enabled 1
710 15:44:10.521307 PCI: 00:19.1: enabled 0
711 15:44:10.524743 PCI: 00:19.2: enabled 0
712 15:44:10.524828 PCI: 00:1a.0: enabled 0
713 15:44:10.527695 PCI: 00:1c.0: enabled 0
714 15:44:10.531271 PCI: 00:1c.1: enabled 0
715 15:44:10.534204 PCI: 00:1c.2: enabled 0
716 15:44:10.534317 PCI: 00:1c.3: enabled 0
717 15:44:10.537847 PCI: 00:1c.4: enabled 0
718 15:44:10.541332 PCI: 00:1c.5: enabled 0
719 15:44:10.541417 PCI: 00:1c.6: enabled 0
720 15:44:10.544180 PCI: 00:1c.7: enabled 0
721 15:44:10.547817 PCI: 00:1d.0: enabled 1
722 15:44:10.550749 PCI: 00:1d.1: enabled 0
723 15:44:10.550834 PCI: 00:1d.2: enabled 0
724 15:44:10.554176 PCI: 00:1d.3: enabled 0
725 15:44:10.557498 PCI: 00:1d.4: enabled 0
726 15:44:10.560450 PCI: 00:1d.5: enabled 1
727 15:44:10.560534 PCI: 00:1e.0: enabled 1
728 15:44:10.563957 PCI: 00:1e.1: enabled 0
729 15:44:10.567540 PCI: 00:1e.2: enabled 1
730 15:44:10.570386 PCI: 00:1e.3: enabled 1
731 15:44:10.570470 PCI: 00:1f.0: enabled 1
732 15:44:10.574004 PCI: 00:1f.1: enabled 1
733 15:44:10.576841 PCI: 00:1f.2: enabled 1
734 15:44:10.580455 PCI: 00:1f.3: enabled 1
735 15:44:10.580540 PCI: 00:1f.4: enabled 1
736 15:44:10.583886 PCI: 00:1f.5: enabled 1
737 15:44:10.586922 PCI: 00:1f.6: enabled 0
738 15:44:10.589944 USB0 port 0: enabled 1
739 15:44:10.590020 I2C: 00:15: enabled 1
740 15:44:10.593261 I2C: 00:5d: enabled 1
741 15:44:10.596731 GENERIC: 0.0: enabled 1
742 15:44:10.596805 I2C: 00:1a: enabled 1
743 15:44:10.600300 I2C: 00:38: enabled 1
744 15:44:10.603323 I2C: 00:39: enabled 1
745 15:44:10.603396 I2C: 00:3a: enabled 1
746 15:44:10.606874 I2C: 00:3b: enabled 1
747 15:44:10.609830 PCI: 00:00.0: enabled 1
748 15:44:10.609900 SPI: 00: enabled 1
749 15:44:10.613429 SPI: 01: enabled 1
750 15:44:10.617154 PNP: 0c09.0: enabled 1
751 15:44:10.617245 USB2 port 0: enabled 1
752 15:44:10.619943 USB2 port 1: enabled 1
753 15:44:10.623463 USB2 port 2: enabled 0
754 15:44:10.626373 USB2 port 3: enabled 0
755 15:44:10.626448 USB2 port 5: enabled 0
756 15:44:10.630005 USB2 port 6: enabled 1
757 15:44:10.632910 USB2 port 9: enabled 1
758 15:44:10.632980 USB3 port 0: enabled 1
759 15:44:10.636386 USB3 port 1: enabled 1
760 15:44:10.639883 USB3 port 2: enabled 1
761 15:44:10.639959 USB3 port 3: enabled 1
762 15:44:10.642840 USB3 port 4: enabled 0
763 15:44:10.646390 APIC: 03: enabled 1
764 15:44:10.646463 APIC: 06: enabled 1
765 15:44:10.649714 APIC: 01: enabled 1
766 15:44:10.652649 APIC: 02: enabled 1
767 15:44:10.652750 APIC: 04: enabled 1
768 15:44:10.656188 APIC: 05: enabled 1
769 15:44:10.659191 APIC: 07: enabled 1
770 15:44:10.659264 Compare with tree...
771 15:44:10.662691 Root Device: enabled 1
772 15:44:10.665577 CPU_CLUSTER: 0: enabled 1
773 15:44:10.665650 APIC: 00: enabled 1
774 15:44:10.669168 APIC: 03: enabled 1
775 15:44:10.672534 APIC: 06: enabled 1
776 15:44:10.675391 APIC: 01: enabled 1
777 15:44:10.675467 APIC: 02: enabled 1
778 15:44:10.678853 APIC: 04: enabled 1
779 15:44:10.682204 APIC: 05: enabled 1
780 15:44:10.682293 APIC: 07: enabled 1
781 15:44:10.685198 DOMAIN: 0000: enabled 1
782 15:44:10.688733 PCI: 00:00.0: enabled 1
783 15:44:10.692221 PCI: 00:02.0: enabled 1
784 15:44:10.692295 PCI: 00:04.0: enabled 0
785 15:44:10.695222 PCI: 00:05.0: enabled 0
786 15:44:10.698661 PCI: 00:12.0: enabled 1
787 15:44:10.702050 PCI: 00:12.5: enabled 0
788 15:44:10.704940 PCI: 00:12.6: enabled 0
789 15:44:10.705016 PCI: 00:14.0: enabled 1
790 15:44:10.708613 USB0 port 0: enabled 1
791 15:44:10.711348 USB2 port 0: enabled 1
792 15:44:10.715169 USB2 port 1: enabled 1
793 15:44:10.718197 USB2 port 2: enabled 0
794 15:44:10.721641 USB2 port 3: enabled 0
795 15:44:10.721716 USB2 port 5: enabled 0
796 15:44:10.724512 USB2 port 6: enabled 1
797 15:44:10.728054 USB2 port 9: enabled 1
798 15:44:10.731031 USB3 port 0: enabled 1
799 15:44:10.734597 USB3 port 1: enabled 1
800 15:44:10.737540 USB3 port 2: enabled 1
801 15:44:10.737614 USB3 port 3: enabled 1
802 15:44:10.741123 USB3 port 4: enabled 0
803 15:44:10.743991 PCI: 00:14.1: enabled 0
804 15:44:10.747543 PCI: 00:14.3: enabled 1
805 15:44:10.750546 PCI: 00:14.5: enabled 0
806 15:44:10.750620 PCI: 00:15.0: enabled 1
807 15:44:10.753899 I2C: 00:15: enabled 1
808 15:44:10.757423 PCI: 00:15.1: enabled 1
809 15:44:10.760261 I2C: 00:5d: enabled 1
810 15:44:10.763673 GENERIC: 0.0: enabled 1
811 15:44:10.763745 PCI: 00:15.2: enabled 0
812 15:44:10.767392 PCI: 00:15.3: enabled 0
813 15:44:10.770217 PCI: 00:16.0: enabled 1
814 15:44:10.773714 PCI: 00:16.1: enabled 0
815 15:44:10.777111 PCI: 00:16.2: enabled 0
816 15:44:10.777203 PCI: 00:16.3: enabled 0
817 15:44:10.780631 PCI: 00:16.4: enabled 0
818 15:44:10.783636 PCI: 00:16.5: enabled 0
819 15:44:10.787126 PCI: 00:17.0: enabled 1
820 15:44:10.790129 PCI: 00:19.0: enabled 1
821 15:44:10.790205 I2C: 00:1a: enabled 1
822 15:44:10.793552 I2C: 00:38: enabled 1
823 15:44:10.796573 I2C: 00:39: enabled 1
824 15:44:10.799898 I2C: 00:3a: enabled 1
825 15:44:10.803443 I2C: 00:3b: enabled 1
826 15:44:10.803517 PCI: 00:19.1: enabled 0
827 15:44:10.806414 PCI: 00:19.2: enabled 0
828 15:44:10.810026 PCI: 00:1a.0: enabled 0
829 15:44:10.812827 PCI: 00:1c.0: enabled 0
830 15:44:10.816196 PCI: 00:1c.1: enabled 0
831 15:44:10.816274 PCI: 00:1c.2: enabled 0
832 15:44:10.819880 PCI: 00:1c.3: enabled 0
833 15:44:10.822592 PCI: 00:1c.4: enabled 0
834 15:44:10.826125 PCI: 00:1c.5: enabled 0
835 15:44:10.829458 PCI: 00:1c.6: enabled 0
836 15:44:10.829547 PCI: 00:1c.7: enabled 0
837 15:44:10.832574 PCI: 00:1d.0: enabled 1
838 15:44:10.836025 PCI: 00:1d.1: enabled 0
839 15:44:10.839207 PCI: 00:1d.2: enabled 0
840 15:44:10.842349 PCI: 00:1d.3: enabled 0
841 15:44:10.842433 PCI: 00:1d.4: enabled 0
842 15:44:10.845925 PCI: 00:1d.5: enabled 1
843 15:44:10.848870 PCI: 00:00.0: enabled 1
844 15:44:10.852559 PCI: 00:1e.0: enabled 1
845 15:44:10.855589 PCI: 00:1e.1: enabled 0
846 15:44:10.855680 PCI: 00:1e.2: enabled 1
847 15:44:10.859086 SPI: 00: enabled 1
848 15:44:10.862111 PCI: 00:1e.3: enabled 1
849 15:44:10.865480 SPI: 01: enabled 1
850 15:44:10.865558 PCI: 00:1f.0: enabled 1
851 15:44:10.868926 PNP: 0c09.0: enabled 1
852 15:44:10.871862 PCI: 00:1f.1: enabled 1
853 15:44:10.875593 PCI: 00:1f.2: enabled 1
854 15:44:10.878438 PCI: 00:1f.3: enabled 1
855 15:44:10.878542 PCI: 00:1f.4: enabled 1
856 15:44:10.882013 PCI: 00:1f.5: enabled 1
857 15:44:10.884988 PCI: 00:1f.6: enabled 0
858 15:44:10.888611 Root Device scanning...
859 15:44:10.891635 scan_static_bus for Root Device
860 15:44:10.891738 CPU_CLUSTER: 0 enabled
861 15:44:10.895331 DOMAIN: 0000 enabled
862 15:44:10.898197 DOMAIN: 0000 scanning...
863 15:44:10.901786 PCI: pci_scan_bus for bus 00
864 15:44:10.904789 PCI: 00:00.0 [8086/0000] ops
865 15:44:10.908345 PCI: 00:00.0 [8086/9b61] enabled
866 15:44:10.911452 PCI: 00:02.0 [8086/0000] bus ops
867 15:44:10.914990 PCI: 00:02.0 [8086/9b41] enabled
868 15:44:10.918064 PCI: 00:04.0 [8086/1903] disabled
869 15:44:10.921821 PCI: 00:08.0 [8086/1911] enabled
870 15:44:10.924854 PCI: 00:12.0 [8086/02f9] enabled
871 15:44:10.927742 PCI: 00:14.0 [8086/0000] bus ops
872 15:44:10.931320 PCI: 00:14.0 [8086/02ed] enabled
873 15:44:10.934470 PCI: 00:14.2 [8086/02ef] enabled
874 15:44:10.938258 PCI: 00:14.3 [8086/02f0] enabled
875 15:44:10.941204 PCI: 00:15.0 [8086/0000] bus ops
876 15:44:10.944204 PCI: 00:15.0 [8086/02e8] enabled
877 15:44:10.947839 PCI: 00:15.1 [8086/0000] bus ops
878 15:44:10.950860 PCI: 00:15.1 [8086/02e9] enabled
879 15:44:10.953886 PCI: 00:16.0 [8086/0000] ops
880 15:44:10.957391 PCI: 00:16.0 [8086/02e0] enabled
881 15:44:10.961045 PCI: 00:17.0 [8086/0000] ops
882 15:44:10.963993 PCI: 00:17.0 [8086/02d3] enabled
883 15:44:10.967458 PCI: 00:19.0 [8086/0000] bus ops
884 15:44:10.970361 PCI: 00:19.0 [8086/02c5] enabled
885 15:44:10.974085 PCI: 00:1d.0 [8086/0000] bus ops
886 15:44:10.976996 PCI: 00:1d.0 [8086/02b0] enabled
887 15:44:10.984090 PCI: Static device PCI: 00:1d.5 not found, disabling it.
888 15:44:10.986973 PCI: 00:1e.0 [8086/0000] ops
889 15:44:10.990775 PCI: 00:1e.0 [8086/02a8] enabled
890 15:44:10.993771 PCI: 00:1e.2 [8086/0000] bus ops
891 15:44:10.996943 PCI: 00:1e.2 [8086/02aa] enabled
892 15:44:11.000438 PCI: 00:1e.3 [8086/0000] bus ops
893 15:44:11.003309 PCI: 00:1e.3 [8086/02ab] enabled
894 15:44:11.006770 PCI: 00:1f.0 [8086/0000] bus ops
895 15:44:11.009961 PCI: 00:1f.0 [8086/0284] enabled
896 15:44:11.013556 PCI: Static device PCI: 00:1f.1 not found, disabling it.
897 15:44:11.020073 PCI: Static device PCI: 00:1f.2 not found, disabling it.
898 15:44:11.023090 PCI: 00:1f.3 [8086/0000] bus ops
899 15:44:11.026725 PCI: 00:1f.3 [8086/02c8] enabled
900 15:44:11.029663 PCI: 00:1f.4 [8086/0000] bus ops
901 15:44:11.033366 PCI: 00:1f.4 [8086/02a3] enabled
902 15:44:11.036521 PCI: 00:1f.5 [8086/0000] bus ops
903 15:44:11.039527 PCI: 00:1f.5 [8086/02a4] enabled
904 15:44:11.043094 PCI: Leftover static devices:
905 15:44:11.046348 PCI: 00:05.0
906 15:44:11.046722 PCI: 00:12.5
907 15:44:11.047013 PCI: 00:12.6
908 15:44:11.049163 PCI: 00:14.1
909 15:44:11.049558 PCI: 00:14.5
910 15:44:11.052827 PCI: 00:15.2
911 15:44:11.053196 PCI: 00:15.3
912 15:44:11.053514 PCI: 00:16.1
913 15:44:11.055784 PCI: 00:16.2
914 15:44:11.056267 PCI: 00:16.3
915 15:44:11.059409 PCI: 00:16.4
916 15:44:11.059877 PCI: 00:16.5
917 15:44:11.062421 PCI: 00:19.1
918 15:44:11.062823 PCI: 00:19.2
919 15:44:11.063172 PCI: 00:1a.0
920 15:44:11.065924 PCI: 00:1c.0
921 15:44:11.066379 PCI: 00:1c.1
922 15:44:11.069014 PCI: 00:1c.2
923 15:44:11.069480 PCI: 00:1c.3
924 15:44:11.069856 PCI: 00:1c.4
925 15:44:11.072456 PCI: 00:1c.5
926 15:44:11.072806 PCI: 00:1c.6
927 15:44:11.075580 PCI: 00:1c.7
928 15:44:11.076013 PCI: 00:1d.1
929 15:44:11.079037 PCI: 00:1d.2
930 15:44:11.079423 PCI: 00:1d.3
931 15:44:11.079769 PCI: 00:1d.4
932 15:44:11.082123 PCI: 00:1d.5
933 15:44:11.082526 PCI: 00:1e.1
934 15:44:11.085842 PCI: 00:1f.1
935 15:44:11.086212 PCI: 00:1f.2
936 15:44:11.086528 PCI: 00:1f.6
937 15:44:11.088763 PCI: Check your devicetree.cb.
938 15:44:11.092456 PCI: 00:02.0 scanning...
939 15:44:11.095168 scan_generic_bus for PCI: 00:02.0
940 15:44:11.098238 scan_generic_bus for PCI: 00:02.0 done
941 15:44:11.104843 scan_bus: scanning of bus PCI: 00:02.0 took 10188 usecs
942 15:44:11.108362 PCI: 00:14.0 scanning...
943 15:44:11.111432 scan_static_bus for PCI: 00:14.0
944 15:44:11.114525 USB0 port 0 enabled
945 15:44:11.114611 USB0 port 0 scanning...
946 15:44:11.118037 scan_static_bus for USB0 port 0
947 15:44:11.121532 USB2 port 0 enabled
948 15:44:11.124561 USB2 port 1 enabled
949 15:44:11.124646 USB2 port 2 disabled
950 15:44:11.128203 USB2 port 3 disabled
951 15:44:11.131217 USB2 port 5 disabled
952 15:44:11.131302 USB2 port 6 enabled
953 15:44:11.134821 USB2 port 9 enabled
954 15:44:11.137881 USB3 port 0 enabled
955 15:44:11.137966 USB3 port 1 enabled
956 15:44:11.140977 USB3 port 2 enabled
957 15:44:11.141076 USB3 port 3 enabled
958 15:44:11.144668 USB3 port 4 disabled
959 15:44:11.147622 USB2 port 0 scanning...
960 15:44:11.150881 scan_static_bus for USB2 port 0
961 15:44:11.154378 scan_static_bus for USB2 port 0 done
962 15:44:11.160409 scan_bus: scanning of bus USB2 port 0 took 9709 usecs
963 15:44:11.160495 USB2 port 1 scanning...
964 15:44:11.164179 scan_static_bus for USB2 port 1
965 15:44:11.170517 scan_static_bus for USB2 port 1 done
966 15:44:11.173442 scan_bus: scanning of bus USB2 port 1 took 9691 usecs
967 15:44:11.177040 USB2 port 6 scanning...
968 15:44:11.180643 scan_static_bus for USB2 port 6
969 15:44:11.183632 scan_static_bus for USB2 port 6 done
970 15:44:11.189818 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
971 15:44:11.193518 USB2 port 9 scanning...
972 15:44:11.196498 scan_static_bus for USB2 port 9
973 15:44:11.200044 scan_static_bus for USB2 port 9 done
974 15:44:11.203147 scan_bus: scanning of bus USB2 port 9 took 9709 usecs
975 15:44:11.206702 USB3 port 0 scanning...
976 15:44:11.209679 scan_static_bus for USB3 port 0
977 15:44:11.212733 scan_static_bus for USB3 port 0 done
978 15:44:11.219262 scan_bus: scanning of bus USB3 port 0 took 9708 usecs
979 15:44:11.222884 USB3 port 1 scanning...
980 15:44:11.225945 scan_static_bus for USB3 port 1
981 15:44:11.229524 scan_static_bus for USB3 port 1 done
982 15:44:11.235521 scan_bus: scanning of bus USB3 port 1 took 9711 usecs
983 15:44:11.235623 USB3 port 2 scanning...
984 15:44:11.239131 scan_static_bus for USB3 port 2
985 15:44:11.245723 scan_static_bus for USB3 port 2 done
986 15:44:11.248720 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
987 15:44:11.252341 USB3 port 3 scanning...
988 15:44:11.255221 scan_static_bus for USB3 port 3
989 15:44:11.258848 scan_static_bus for USB3 port 3 done
990 15:44:11.265424 scan_bus: scanning of bus USB3 port 3 took 9734 usecs
991 15:44:11.268866 scan_static_bus for USB0 port 0 done
992 15:44:11.275223 scan_bus: scanning of bus USB0 port 0 took 155441 usecs
993 15:44:11.278327 scan_static_bus for PCI: 00:14.0 done
994 15:44:11.281828 scan_bus: scanning of bus PCI: 00:14.0 took 173071 usecs
995 15:44:11.284785 PCI: 00:15.0 scanning...
996 15:44:11.288381 scan_generic_bus for PCI: 00:15.0
997 15:44:11.294902 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
998 15:44:11.297811 scan_generic_bus for PCI: 00:15.0 done
999 15:44:11.304782 scan_bus: scanning of bus PCI: 00:15.0 took 14290 usecs
1000 15:44:11.304870 PCI: 00:15.1 scanning...
1001 15:44:11.307860 scan_generic_bus for PCI: 00:15.1
1002 15:44:11.314499 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1003 15:44:11.317485 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1004 15:44:11.321050 scan_generic_bus for PCI: 00:15.1 done
1005 15:44:11.327617 scan_bus: scanning of bus PCI: 00:15.1 took 18620 usecs
1006 15:44:11.330740 PCI: 00:19.0 scanning...
1007 15:44:11.333905 scan_generic_bus for PCI: 00:19.0
1008 15:44:11.337387 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1009 15:44:11.340412 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1010 15:44:11.347065 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1011 15:44:11.350119 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1012 15:44:11.353635 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1013 15:44:11.356707 scan_generic_bus for PCI: 00:19.0 done
1014 15:44:11.363324 scan_bus: scanning of bus PCI: 00:19.0 took 30734 usecs
1015 15:44:11.366788 PCI: 00:1d.0 scanning...
1016 15:44:11.369898 do_pci_scan_bridge for PCI: 00:1d.0
1017 15:44:11.373373 PCI: pci_scan_bus for bus 01
1018 15:44:11.376327 PCI: 01:00.0 [1c5c/1327] enabled
1019 15:44:11.379877 Enabling Common Clock Configuration
1020 15:44:11.382909 L1 Sub-State supported from root port 29
1021 15:44:11.386563 L1 Sub-State Support = 0xf
1022 15:44:11.389490 CommonModeRestoreTime = 0x28
1023 15:44:11.393097 Power On Value = 0x16, Power On Scale = 0x0
1024 15:44:11.396118 ASPM: Enabled L1
1025 15:44:11.402689 scan_bus: scanning of bus PCI: 00:1d.0 took 32795 usecs
1026 15:44:11.402781 PCI: 00:1e.2 scanning...
1027 15:44:11.405688 scan_generic_bus for PCI: 00:1e.2
1028 15:44:11.412744 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1029 15:44:11.415713 scan_generic_bus for PCI: 00:1e.2 done
1030 15:44:11.422259 scan_bus: scanning of bus PCI: 00:1e.2 took 14012 usecs
1031 15:44:11.422352 PCI: 00:1e.3 scanning...
1032 15:44:11.425865 scan_generic_bus for PCI: 00:1e.3
1033 15:44:11.432590 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1034 15:44:11.435650 scan_generic_bus for PCI: 00:1e.3 done
1035 15:44:11.438582 scan_bus: scanning of bus PCI: 00:1e.3 took 14012 usecs
1036 15:44:11.442232 PCI: 00:1f.0 scanning...
1037 15:44:11.445380 scan_static_bus for PCI: 00:1f.0
1038 15:44:11.448420 PNP: 0c09.0 enabled
1039 15:44:11.452029 scan_static_bus for PCI: 00:1f.0 done
1040 15:44:11.458651 scan_bus: scanning of bus PCI: 00:1f.0 took 12059 usecs
1041 15:44:11.461662 PCI: 00:1f.3 scanning...
1042 15:44:11.465293 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1043 15:44:11.468152 PCI: 00:1f.4 scanning...
1044 15:44:11.471244 scan_generic_bus for PCI: 00:1f.4
1045 15:44:11.474783 scan_generic_bus for PCI: 00:1f.4 done
1046 15:44:11.481259 scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs
1047 15:44:11.484891 PCI: 00:1f.5 scanning...
1048 15:44:11.487736 scan_generic_bus for PCI: 00:1f.5
1049 15:44:11.491158 scan_generic_bus for PCI: 00:1f.5 done
1050 15:44:11.497749 scan_bus: scanning of bus PCI: 00:1f.5 took 10196 usecs
1051 15:44:11.504208 scan_bus: scanning of bus DOMAIN: 0000 took 605287 usecs
1052 15:44:11.507748 scan_static_bus for Root Device done
1053 15:44:11.513797 scan_bus: scanning of bus Root Device took 625161 usecs
1054 15:44:11.513879 done
1055 15:44:11.517240 Chrome EC: UHEPI supported
1056 15:44:11.523931 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1057 15:44:11.526976 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1058 15:44:11.533528 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1059 15:44:11.540614 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1060 15:44:11.544394 SPI flash protection: WPSW=0 SRP0=1
1061 15:44:11.550574 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1062 15:44:11.554113 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1063 15:44:11.557173 found VGA at PCI: 00:02.0
1064 15:44:11.560742 Setting up VGA for PCI: 00:02.0
1065 15:44:11.567417 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1066 15:44:11.570237 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1067 15:44:11.573318 Allocating resources...
1068 15:44:11.576780 Reading resources...
1069 15:44:11.580545 Root Device read_resources bus 0 link: 0
1070 15:44:11.583409 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1071 15:44:11.589709 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1072 15:44:11.593181 DOMAIN: 0000 read_resources bus 0 link: 0
1073 15:44:11.601061 PCI: 00:14.0 read_resources bus 0 link: 0
1074 15:44:11.604151 USB0 port 0 read_resources bus 0 link: 0
1075 15:44:11.612526 USB0 port 0 read_resources bus 0 link: 0 done
1076 15:44:11.615477 PCI: 00:14.0 read_resources bus 0 link: 0 done
1077 15:44:11.623381 PCI: 00:15.0 read_resources bus 1 link: 0
1078 15:44:11.626342 PCI: 00:15.0 read_resources bus 1 link: 0 done
1079 15:44:11.632937 PCI: 00:15.1 read_resources bus 2 link: 0
1080 15:44:11.636019 PCI: 00:15.1 read_resources bus 2 link: 0 done
1081 15:44:11.643941 PCI: 00:19.0 read_resources bus 3 link: 0
1082 15:44:11.650609 PCI: 00:19.0 read_resources bus 3 link: 0 done
1083 15:44:11.653614 PCI: 00:1d.0 read_resources bus 1 link: 0
1084 15:44:11.660177 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1085 15:44:11.663134 PCI: 00:1e.2 read_resources bus 4 link: 0
1086 15:44:11.669724 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1087 15:44:11.673329 PCI: 00:1e.3 read_resources bus 5 link: 0
1088 15:44:11.679645 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1089 15:44:11.683226 PCI: 00:1f.0 read_resources bus 0 link: 0
1090 15:44:11.689784 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1091 15:44:11.696103 DOMAIN: 0000 read_resources bus 0 link: 0 done
1092 15:44:11.699209 Root Device read_resources bus 0 link: 0 done
1093 15:44:11.702817 Done reading resources.
1094 15:44:11.709406 Show resources in subtree (Root Device)...After reading.
1095 15:44:11.712420 Root Device child on link 0 CPU_CLUSTER: 0
1096 15:44:11.715871 CPU_CLUSTER: 0 child on link 0 APIC: 00
1097 15:44:11.718835 APIC: 00
1098 15:44:11.718917 APIC: 03
1099 15:44:11.722482 APIC: 06
1100 15:44:11.722567 APIC: 01
1101 15:44:11.722638 APIC: 02
1102 15:44:11.725394 APIC: 04
1103 15:44:11.725482 APIC: 05
1104 15:44:11.725550 APIC: 07
1105 15:44:11.731952 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 15:44:11.741913 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 15:44:11.797999 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1108 15:44:11.798100 PCI: 00:00.0
1109 15:44:11.798580 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 15:44:11.799863 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 15:44:11.800238 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 15:44:11.800315 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 15:44:11.800381 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 15:44:11.848368 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 15:44:11.849016 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 15:44:11.849321 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 15:44:11.849397 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 15:44:11.849667 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1119 15:44:11.897736 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1120 15:44:11.898077 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1121 15:44:11.898156 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1122 15:44:11.898418 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1123 15:44:11.899007 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1124 15:44:11.907496 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1125 15:44:11.907583 PCI: 00:02.0
1126 15:44:11.914035 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1127 15:44:11.923637 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1128 15:44:11.933828 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1129 15:44:11.933915 PCI: 00:04.0
1130 15:44:11.936810 PCI: 00:08.0
1131 15:44:11.946581 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 15:44:11.946667 PCI: 00:12.0
1133 15:44:11.956281 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1134 15:44:11.962987 PCI: 00:14.0 child on link 0 USB0 port 0
1135 15:44:11.972635 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1136 15:44:11.976264 USB0 port 0 child on link 0 USB2 port 0
1137 15:44:11.979364 USB2 port 0
1138 15:44:11.979449 USB2 port 1
1139 15:44:11.982888 USB2 port 2
1140 15:44:11.982974 USB2 port 3
1141 15:44:11.985898 USB2 port 5
1142 15:44:11.986000 USB2 port 6
1143 15:44:11.989164 USB2 port 9
1144 15:44:11.989272 USB3 port 0
1145 15:44:11.992727 USB3 port 1
1146 15:44:11.992909 USB3 port 2
1147 15:44:11.995730 USB3 port 3
1148 15:44:11.998773 USB3 port 4
1149 15:44:11.998882 PCI: 00:14.2
1150 15:44:12.008703 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1151 15:44:12.018929 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1152 15:44:12.021895 PCI: 00:14.3
1153 15:44:12.031514 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1154 15:44:12.035021 PCI: 00:15.0 child on link 0 I2C: 01:15
1155 15:44:12.044592 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 15:44:12.044723 I2C: 01:15
1157 15:44:12.051152 PCI: 00:15.1 child on link 0 I2C: 02:5d
1158 15:44:12.060817 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 15:44:12.060982 I2C: 02:5d
1160 15:44:12.064564 GENERIC: 0.0
1161 15:44:12.064687 PCI: 00:16.0
1162 15:44:12.074023 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1163 15:44:12.077573 PCI: 00:17.0
1164 15:44:12.086976 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1165 15:44:12.093599 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1166 15:44:12.103640 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1167 15:44:12.110213 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1168 15:44:12.119957 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1169 15:44:12.130029 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1170 15:44:12.133018 PCI: 00:19.0 child on link 0 I2C: 03:1a
1171 15:44:12.142676 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 15:44:12.146212 I2C: 03:1a
1173 15:44:12.146314 I2C: 03:38
1174 15:44:12.146392 I2C: 03:39
1175 15:44:12.149415 I2C: 03:3a
1176 15:44:12.149494 I2C: 03:3b
1177 15:44:12.155891 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1178 15:44:12.162572 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1179 15:44:12.172100 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1180 15:44:12.182346 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1181 15:44:12.185146 PCI: 01:00.0
1182 15:44:12.195338 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1183 15:44:12.195427 PCI: 00:1e.0
1184 15:44:12.208535 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1185 15:44:12.218058 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 15:44:12.221735 PCI: 00:1e.2 child on link 0 SPI: 00
1187 15:44:12.231217 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1188 15:44:12.231304 SPI: 00
1189 15:44:12.237432 PCI: 00:1e.3 child on link 0 SPI: 01
1190 15:44:12.247566 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 15:44:12.247680 SPI: 01
1192 15:44:12.250594 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1193 15:44:12.260876 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1194 15:44:12.270561 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1195 15:44:12.270662 PNP: 0c09.0
1196 15:44:12.280198 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1197 15:44:12.280299 PCI: 00:1f.3
1198 15:44:12.289682 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1199 15:44:12.303083 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1200 15:44:12.303170 PCI: 00:1f.4
1201 15:44:12.313137 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1202 15:44:12.323354 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1203 15:44:12.323444 PCI: 00:1f.5
1204 15:44:12.332908 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1205 15:44:12.339615 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1206 15:44:12.346109 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1207 15:44:12.352714 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1208 15:44:12.355724 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1209 15:44:12.358657 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1210 15:44:12.362352 PCI: 00:17.0 18 * [0x60 - 0x67] io
1211 15:44:12.365250 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1212 15:44:12.371941 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1213 15:44:12.378477 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1214 15:44:12.388723 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1215 15:44:12.395178 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1216 15:44:12.405183 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1217 15:44:12.408004 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1218 15:44:12.414536 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1219 15:44:12.421152 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1220 15:44:12.424679 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1221 15:44:12.427692 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1222 15:44:12.434340 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1223 15:44:12.438125 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1224 15:44:12.444213 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1225 15:44:12.447845 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1226 15:44:12.454358 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1227 15:44:12.457452 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1228 15:44:12.463986 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1229 15:44:12.467096 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1230 15:44:12.473698 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1231 15:44:12.477290 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1232 15:44:12.483389 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1233 15:44:12.487035 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1234 15:44:12.493627 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1235 15:44:12.496640 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1236 15:44:12.503469 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1237 15:44:12.506464 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1238 15:44:12.513416 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1239 15:44:12.516337 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1240 15:44:12.523074 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1241 15:44:12.526007 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1242 15:44:12.536191 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1243 15:44:12.539172 avoid_fixed_resources: DOMAIN: 0000
1244 15:44:12.545977 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1245 15:44:12.548829 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1246 15:44:12.558856 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1247 15:44:12.565475 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1248 15:44:12.575050 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1249 15:44:12.581600 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1250 15:44:12.588344 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1251 15:44:12.598336 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1252 15:44:12.604824 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1253 15:44:12.611361 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1254 15:44:12.617780 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1255 15:44:12.627631 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1256 15:44:12.627718 Setting resources...
1257 15:44:12.634000 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1258 15:44:12.637611 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1259 15:44:12.643599 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1260 15:44:12.647224 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1261 15:44:12.650676 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1262 15:44:12.656708 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1263 15:44:12.663258 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1264 15:44:12.669839 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1265 15:44:12.676411 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1266 15:44:12.683148 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1267 15:44:12.686238 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1268 15:44:12.692738 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1269 15:44:12.695708 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1270 15:44:12.702819 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1271 15:44:12.705736 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1272 15:44:12.712350 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1273 15:44:12.715785 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1274 15:44:12.722191 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1275 15:44:12.725198 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1276 15:44:12.731866 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1277 15:44:12.735463 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1278 15:44:12.741998 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1279 15:44:12.745078 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1280 15:44:12.751698 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1281 15:44:12.754784 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1282 15:44:12.761342 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1283 15:44:12.764832 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1284 15:44:12.771447 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1285 15:44:12.774404 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1286 15:44:12.781156 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1287 15:44:12.784798 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1288 15:44:12.787653 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1289 15:44:12.797289 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1290 15:44:12.803823 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1291 15:44:12.810875 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1292 15:44:12.820955 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1293 15:44:12.823830 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1294 15:44:12.830581 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1295 15:44:12.836494 Root Device assign_resources, bus 0 link: 0
1296 15:44:12.839976 DOMAIN: 0000 assign_resources, bus 0 link: 0
1297 15:44:12.850333 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1298 15:44:12.856352 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1299 15:44:12.866483 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1300 15:44:12.872489 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1301 15:44:12.882649 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1302 15:44:12.889400 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1303 15:44:12.895911 PCI: 00:14.0 assign_resources, bus 0 link: 0
1304 15:44:12.899017 PCI: 00:14.0 assign_resources, bus 0 link: 0
1305 15:44:12.908948 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1306 15:44:12.915418 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1307 15:44:12.925383 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1308 15:44:12.931478 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1309 15:44:12.935029 PCI: 00:15.0 assign_resources, bus 1 link: 0
1310 15:44:12.941566 PCI: 00:15.0 assign_resources, bus 1 link: 0
1311 15:44:12.948044 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1312 15:44:12.954772 PCI: 00:15.1 assign_resources, bus 2 link: 0
1313 15:44:12.958461 PCI: 00:15.1 assign_resources, bus 2 link: 0
1314 15:44:12.967953 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1315 15:44:12.974656 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1316 15:44:12.984766 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1317 15:44:12.990858 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1318 15:44:12.997459 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1319 15:44:13.004763 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1320 15:44:13.014609 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1321 15:44:13.021149 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1322 15:44:13.027690 PCI: 00:19.0 assign_resources, bus 3 link: 0
1323 15:44:13.031257 PCI: 00:19.0 assign_resources, bus 3 link: 0
1324 15:44:13.040891 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1325 15:44:13.046921 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1326 15:44:13.057332 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1327 15:44:13.060300 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 15:44:13.070088 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1329 15:44:13.073615 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1330 15:44:13.083483 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1331 15:44:13.089759 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1332 15:44:13.096838 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1333 15:44:13.099815 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1334 15:44:13.109375 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1335 15:44:13.112973 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1336 15:44:13.119484 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1337 15:44:13.122467 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1338 15:44:13.129332 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1339 15:44:13.132354 LPC: Trying to open IO window from 800 size 1ff
1340 15:44:13.142324 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1341 15:44:13.148828 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1342 15:44:13.158657 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1343 15:44:13.165726 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1344 15:44:13.171730 DOMAIN: 0000 assign_resources, bus 0 link: 0
1345 15:44:13.175318 Root Device assign_resources, bus 0 link: 0
1346 15:44:13.178355 Done setting resources.
1347 15:44:13.185003 Show resources in subtree (Root Device)...After assigning values.
1348 15:44:13.188024 Root Device child on link 0 CPU_CLUSTER: 0
1349 15:44:13.191641 CPU_CLUSTER: 0 child on link 0 APIC: 00
1350 15:44:13.194710 APIC: 00
1351 15:44:13.194786 APIC: 03
1352 15:44:13.197764 APIC: 06
1353 15:44:13.197835 APIC: 01
1354 15:44:13.197898 APIC: 02
1355 15:44:13.200829 APIC: 04
1356 15:44:13.200901 APIC: 05
1357 15:44:13.200964 APIC: 07
1358 15:44:13.207406 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1359 15:44:13.217688 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1360 15:44:13.227213 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1361 15:44:13.230739 PCI: 00:00.0
1362 15:44:13.240388 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1363 15:44:13.246944 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1364 15:44:13.256757 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1365 15:44:13.266742 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1366 15:44:13.276479 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1367 15:44:13.286291 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1368 15:44:13.295940 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1369 15:44:13.305700 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1370 15:44:13.312859 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1371 15:44:13.322291 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1372 15:44:13.332127 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1373 15:44:13.341704 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1374 15:44:13.351498 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1375 15:44:13.361160 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1376 15:44:13.371219 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1377 15:44:13.377989 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1378 15:44:13.380900 PCI: 00:02.0
1379 15:44:13.391199 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1380 15:44:13.400813 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1381 15:44:13.410446 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1382 15:44:13.413929 PCI: 00:04.0
1383 15:44:13.414017 PCI: 00:08.0
1384 15:44:13.423852 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1385 15:44:13.426860 PCI: 00:12.0
1386 15:44:13.436689 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1387 15:44:13.439758 PCI: 00:14.0 child on link 0 USB0 port 0
1388 15:44:13.453366 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1389 15:44:13.456577 USB0 port 0 child on link 0 USB2 port 0
1390 15:44:13.456654 USB2 port 0
1391 15:44:13.459539 USB2 port 1
1392 15:44:13.463156 USB2 port 2
1393 15:44:13.463232 USB2 port 3
1394 15:44:13.466089 USB2 port 5
1395 15:44:13.466164 USB2 port 6
1396 15:44:13.469629 USB2 port 9
1397 15:44:13.469704 USB3 port 0
1398 15:44:13.472551 USB3 port 1
1399 15:44:13.472625 USB3 port 2
1400 15:44:13.476004 USB3 port 3
1401 15:44:13.476123 USB3 port 4
1402 15:44:13.478986 PCI: 00:14.2
1403 15:44:13.489122 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1404 15:44:13.498670 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1405 15:44:13.502362 PCI: 00:14.3
1406 15:44:13.511798 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1407 15:44:13.514894 PCI: 00:15.0 child on link 0 I2C: 01:15
1408 15:44:13.524880 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1409 15:44:13.528470 I2C: 01:15
1410 15:44:13.531288 PCI: 00:15.1 child on link 0 I2C: 02:5d
1411 15:44:13.541368 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1412 15:44:13.544395 I2C: 02:5d
1413 15:44:13.544472 GENERIC: 0.0
1414 15:44:13.547901 PCI: 00:16.0
1415 15:44:13.557570 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1416 15:44:13.557650 PCI: 00:17.0
1417 15:44:13.570934 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1418 15:44:13.580987 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1419 15:44:13.587368 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1420 15:44:13.597175 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1421 15:44:13.606744 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1422 15:44:13.616391 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1423 15:44:13.619887 PCI: 00:19.0 child on link 0 I2C: 03:1a
1424 15:44:13.632871 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1425 15:44:13.632957 I2C: 03:1a
1426 15:44:13.633029 I2C: 03:38
1427 15:44:13.636211 I2C: 03:39
1428 15:44:13.636289 I2C: 03:3a
1429 15:44:13.639695 I2C: 03:3b
1430 15:44:13.642767 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1431 15:44:13.652754 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1432 15:44:13.662553 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1433 15:44:13.672575 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1434 15:44:13.675495 PCI: 01:00.0
1435 15:44:13.685539 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1436 15:44:13.688573 PCI: 00:1e.0
1437 15:44:13.698453 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1438 15:44:13.708695 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1439 15:44:13.711634 PCI: 00:1e.2 child on link 0 SPI: 00
1440 15:44:13.721552 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1441 15:44:13.724934 SPI: 00
1442 15:44:13.727853 PCI: 00:1e.3 child on link 0 SPI: 01
1443 15:44:13.737874 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1444 15:44:13.741364 SPI: 01
1445 15:44:13.744397 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1446 15:44:13.753968 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1447 15:44:13.760471 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1448 15:44:13.764159 PNP: 0c09.0
1449 15:44:13.773810 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1450 15:44:13.773888 PCI: 00:1f.3
1451 15:44:13.783473 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1452 15:44:13.793617 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1453 15:44:13.796621 PCI: 00:1f.4
1454 15:44:13.806426 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1455 15:44:13.816524 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1456 15:44:13.816604 PCI: 00:1f.5
1457 15:44:13.826033 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1458 15:44:13.829570 Done allocating resources.
1459 15:44:13.836085 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1460 15:44:13.839060 Enabling resources...
1461 15:44:13.842485 PCI: 00:00.0 subsystem <- 8086/9b61
1462 15:44:13.845640 PCI: 00:00.0 cmd <- 06
1463 15:44:13.849110 PCI: 00:02.0 subsystem <- 8086/9b41
1464 15:44:13.852138 PCI: 00:02.0 cmd <- 03
1465 15:44:13.855908 PCI: 00:08.0 cmd <- 06
1466 15:44:13.858853 PCI: 00:12.0 subsystem <- 8086/02f9
1467 15:44:13.861801 PCI: 00:12.0 cmd <- 02
1468 15:44:13.865431 PCI: 00:14.0 subsystem <- 8086/02ed
1469 15:44:13.865504 PCI: 00:14.0 cmd <- 02
1470 15:44:13.868427 PCI: 00:14.2 cmd <- 02
1471 15:44:13.872044 PCI: 00:14.3 subsystem <- 8086/02f0
1472 15:44:13.875036 PCI: 00:14.3 cmd <- 02
1473 15:44:13.878519 PCI: 00:15.0 subsystem <- 8086/02e8
1474 15:44:13.881684 PCI: 00:15.0 cmd <- 02
1475 15:44:13.885156 PCI: 00:15.1 subsystem <- 8086/02e9
1476 15:44:13.888130 PCI: 00:15.1 cmd <- 02
1477 15:44:13.891914 PCI: 00:16.0 subsystem <- 8086/02e0
1478 15:44:13.894889 PCI: 00:16.0 cmd <- 02
1479 15:44:13.897813 PCI: 00:17.0 subsystem <- 8086/02d3
1480 15:44:13.901051 PCI: 00:17.0 cmd <- 03
1481 15:44:13.904588 PCI: 00:19.0 subsystem <- 8086/02c5
1482 15:44:13.907926 PCI: 00:19.0 cmd <- 02
1483 15:44:13.910977 PCI: 00:1d.0 bridge ctrl <- 0013
1484 15:44:13.914496 PCI: 00:1d.0 subsystem <- 8086/02b0
1485 15:44:13.917593 PCI: 00:1d.0 cmd <- 06
1486 15:44:13.920643 PCI: 00:1e.0 subsystem <- 8086/02a8
1487 15:44:13.924334 PCI: 00:1e.0 cmd <- 06
1488 15:44:13.927658 PCI: 00:1e.2 subsystem <- 8086/02aa
1489 15:44:13.927743 PCI: 00:1e.2 cmd <- 06
1490 15:44:13.934139 PCI: 00:1e.3 subsystem <- 8086/02ab
1491 15:44:13.934216 PCI: 00:1e.3 cmd <- 02
1492 15:44:13.940617 PCI: 00:1f.0 subsystem <- 8086/0284
1493 15:44:13.940693 PCI: 00:1f.0 cmd <- 407
1494 15:44:13.944115 PCI: 00:1f.3 subsystem <- 8086/02c8
1495 15:44:13.947121 PCI: 00:1f.3 cmd <- 02
1496 15:44:13.950197 PCI: 00:1f.4 subsystem <- 8086/02a3
1497 15:44:13.953747 PCI: 00:1f.4 cmd <- 03
1498 15:44:13.956791 PCI: 00:1f.5 subsystem <- 8086/02a4
1499 15:44:13.960336 PCI: 00:1f.5 cmd <- 406
1500 15:44:13.969489 PCI: 01:00.0 cmd <- 02
1501 15:44:13.974324 done.
1502 15:44:13.987375 ME: Version: 14.0.39.1367
1503 15:44:13.993874 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1504 15:44:13.996822 Initializing devices...
1505 15:44:13.996900 Root Device init ...
1506 15:44:14.003358 Chrome EC: Set SMI mask to 0x0000000000000000
1507 15:44:14.007049 Chrome EC: clear events_b mask to 0x0000000000000000
1508 15:44:14.013635 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1509 15:44:14.020183 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1510 15:44:14.026778 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1511 15:44:14.029609 Chrome EC: Set WAKE mask to 0x0000000000000000
1512 15:44:14.036649 Root Device init finished in 35128 usecs
1513 15:44:14.036730 CPU_CLUSTER: 0 init ...
1514 15:44:14.043130 CPU_CLUSTER: 0 init finished in 2445 usecs
1515 15:44:14.047862 PCI: 00:00.0 init ...
1516 15:44:14.050797 CPU TDP: 15 Watts
1517 15:44:14.054533 CPU PL2 = 64 Watts
1518 15:44:14.057587 PCI: 00:00.0 init finished in 7063 usecs
1519 15:44:14.060530 PCI: 00:02.0 init ...
1520 15:44:14.063979 PCI: 00:02.0 init finished in 2252 usecs
1521 15:44:14.067463 PCI: 00:08.0 init ...
1522 15:44:14.070432 PCI: 00:08.0 init finished in 2249 usecs
1523 15:44:14.073599 PCI: 00:12.0 init ...
1524 15:44:14.077106 PCI: 00:12.0 init finished in 2250 usecs
1525 15:44:14.080608 PCI: 00:14.0 init ...
1526 15:44:14.083577 PCI: 00:14.0 init finished in 2251 usecs
1527 15:44:14.086681 PCI: 00:14.2 init ...
1528 15:44:14.090394 PCI: 00:14.2 init finished in 2241 usecs
1529 15:44:14.093220 PCI: 00:14.3 init ...
1530 15:44:14.096776 PCI: 00:14.3 init finished in 2268 usecs
1531 15:44:14.099919 PCI: 00:15.0 init ...
1532 15:44:14.103595 DW I2C bus 0 at 0xd121f000 (400 KHz)
1533 15:44:14.109749 PCI: 00:15.0 init finished in 5971 usecs
1534 15:44:14.109829 PCI: 00:15.1 init ...
1535 15:44:14.113413 DW I2C bus 1 at 0xd1220000 (400 KHz)
1536 15:44:14.119940 PCI: 00:15.1 init finished in 5969 usecs
1537 15:44:14.122973 PCI: 00:16.0 init ...
1538 15:44:14.126170 PCI: 00:16.0 init finished in 2250 usecs
1539 15:44:14.129696 PCI: 00:19.0 init ...
1540 15:44:14.132694 DW I2C bus 4 at 0xd1222000 (400 KHz)
1541 15:44:14.136237 PCI: 00:19.0 init finished in 5970 usecs
1542 15:44:14.139191 PCI: 00:1d.0 init ...
1543 15:44:14.142810 Initializing PCH PCIe bridge.
1544 15:44:14.145715 PCI: 00:1d.0 init finished in 5278 usecs
1545 15:44:14.149207 PCI: 00:1f.0 init ...
1546 15:44:14.152856 IOAPIC: Initializing IOAPIC at 0xfec00000
1547 15:44:14.159319 IOAPIC: Bootstrap Processor Local APIC = 0x00
1548 15:44:14.159400 IOAPIC: ID = 0x02
1549 15:44:14.163025 IOAPIC: Dumping registers
1550 15:44:14.165770 reg 0x0000: 0x02000000
1551 15:44:14.169160 reg 0x0001: 0x00770020
1552 15:44:14.172272 reg 0x0002: 0x00000000
1553 15:44:14.175835 PCI: 00:1f.0 init finished in 23512 usecs
1554 15:44:14.178875 PCI: 00:1f.4 init ...
1555 15:44:14.182490 PCI: 00:1f.4 init finished in 2258 usecs
1556 15:44:14.193806 PCI: 01:00.0 init ...
1557 15:44:14.196857 PCI: 01:00.0 init finished in 2250 usecs
1558 15:44:14.201120 PNP: 0c09.0 init ...
1559 15:44:14.204257 Google Chrome EC uptime: 11.093 seconds
1560 15:44:14.210909 Google Chrome AP resets since EC boot: 0
1561 15:44:14.214575 Google Chrome most recent AP reset causes:
1562 15:44:14.221163 Google Chrome EC reset flags at last EC boot: reset-pin
1563 15:44:14.224228 PNP: 0c09.0 init finished in 20549 usecs
1564 15:44:14.227815 Devices initialized
1565 15:44:14.230843 Show all devs... After init.
1566 15:44:14.231032 Root Device: enabled 1
1567 15:44:14.234421 CPU_CLUSTER: 0: enabled 1
1568 15:44:14.238041 DOMAIN: 0000: enabled 1
1569 15:44:14.238271 APIC: 00: enabled 1
1570 15:44:14.241215 PCI: 00:00.0: enabled 1
1571 15:44:14.244245 PCI: 00:02.0: enabled 1
1572 15:44:14.247724 PCI: 00:04.0: enabled 0
1573 15:44:14.248090 PCI: 00:05.0: enabled 0
1574 15:44:14.250557 PCI: 00:12.0: enabled 1
1575 15:44:14.254186 PCI: 00:12.5: enabled 0
1576 15:44:14.257339 PCI: 00:12.6: enabled 0
1577 15:44:14.257734 PCI: 00:14.0: enabled 1
1578 15:44:14.260957 PCI: 00:14.1: enabled 0
1579 15:44:14.263844 PCI: 00:14.3: enabled 1
1580 15:44:14.267480 PCI: 00:14.5: enabled 0
1581 15:44:14.267881 PCI: 00:15.0: enabled 1
1582 15:44:14.270379 PCI: 00:15.1: enabled 1
1583 15:44:14.273998 PCI: 00:15.2: enabled 0
1584 15:44:14.277058 PCI: 00:15.3: enabled 0
1585 15:44:14.277497 PCI: 00:16.0: enabled 1
1586 15:44:14.280203 PCI: 00:16.1: enabled 0
1587 15:44:14.283815 PCI: 00:16.2: enabled 0
1588 15:44:14.286655 PCI: 00:16.3: enabled 0
1589 15:44:14.287118 PCI: 00:16.4: enabled 0
1590 15:44:14.290047 PCI: 00:16.5: enabled 0
1591 15:44:14.293148 PCI: 00:17.0: enabled 1
1592 15:44:14.296744 PCI: 00:19.0: enabled 1
1593 15:44:14.297198 PCI: 00:19.1: enabled 0
1594 15:44:14.299802 PCI: 00:19.2: enabled 0
1595 15:44:14.303344 PCI: 00:1a.0: enabled 0
1596 15:44:14.303808 PCI: 00:1c.0: enabled 0
1597 15:44:14.306453 PCI: 00:1c.1: enabled 0
1598 15:44:14.309488 PCI: 00:1c.2: enabled 0
1599 15:44:14.313197 PCI: 00:1c.3: enabled 0
1600 15:44:14.313679 PCI: 00:1c.4: enabled 0
1601 15:44:14.316120 PCI: 00:1c.5: enabled 0
1602 15:44:14.319692 PCI: 00:1c.6: enabled 0
1603 15:44:14.322765 PCI: 00:1c.7: enabled 0
1604 15:44:14.323234 PCI: 00:1d.0: enabled 1
1605 15:44:14.326366 PCI: 00:1d.1: enabled 0
1606 15:44:14.329108 PCI: 00:1d.2: enabled 0
1607 15:44:14.332969 PCI: 00:1d.3: enabled 0
1608 15:44:14.333465 PCI: 00:1d.4: enabled 0
1609 15:44:14.335889 PCI: 00:1d.5: enabled 0
1610 15:44:14.338852 PCI: 00:1e.0: enabled 1
1611 15:44:14.342429 PCI: 00:1e.1: enabled 0
1612 15:44:14.342892 PCI: 00:1e.2: enabled 1
1613 15:44:14.346004 PCI: 00:1e.3: enabled 1
1614 15:44:14.348841 PCI: 00:1f.0: enabled 1
1615 15:44:14.352181 PCI: 00:1f.1: enabled 0
1616 15:44:14.352647 PCI: 00:1f.2: enabled 0
1617 15:44:14.355824 PCI: 00:1f.3: enabled 1
1618 15:44:14.358741 PCI: 00:1f.4: enabled 1
1619 15:44:14.362403 PCI: 00:1f.5: enabled 1
1620 15:44:14.362857 PCI: 00:1f.6: enabled 0
1621 15:44:14.365391 USB0 port 0: enabled 1
1622 15:44:14.368403 I2C: 01:15: enabled 1
1623 15:44:14.368864 I2C: 02:5d: enabled 1
1624 15:44:14.371931 GENERIC: 0.0: enabled 1
1625 15:44:14.375467 I2C: 03:1a: enabled 1
1626 15:44:14.375931 I2C: 03:38: enabled 1
1627 15:44:14.378503 I2C: 03:39: enabled 1
1628 15:44:14.382215 I2C: 03:3a: enabled 1
1629 15:44:14.382696 I2C: 03:3b: enabled 1
1630 15:44:14.385356 PCI: 00:00.0: enabled 1
1631 15:44:14.388329 SPI: 00: enabled 1
1632 15:44:14.388785 SPI: 01: enabled 1
1633 15:44:14.392076 PNP: 0c09.0: enabled 1
1634 15:44:14.395038 USB2 port 0: enabled 1
1635 15:44:14.398081 USB2 port 1: enabled 1
1636 15:44:14.398540 USB2 port 2: enabled 0
1637 15:44:14.401688 USB2 port 3: enabled 0
1638 15:44:14.404503 USB2 port 5: enabled 0
1639 15:44:14.404965 USB2 port 6: enabled 1
1640 15:44:14.408187 USB2 port 9: enabled 1
1641 15:44:14.411424 USB3 port 0: enabled 1
1642 15:44:14.415011 USB3 port 1: enabled 1
1643 15:44:14.415478 USB3 port 2: enabled 1
1644 15:44:14.417867 USB3 port 3: enabled 1
1645 15:44:14.421463 USB3 port 4: enabled 0
1646 15:44:14.421920 APIC: 03: enabled 1
1647 15:44:14.424488 APIC: 06: enabled 1
1648 15:44:14.427469 APIC: 01: enabled 1
1649 15:44:14.427932 APIC: 02: enabled 1
1650 15:44:14.431159 APIC: 04: enabled 1
1651 15:44:14.431617 APIC: 05: enabled 1
1652 15:44:14.434257 APIC: 07: enabled 1
1653 15:44:14.437708 PCI: 00:08.0: enabled 1
1654 15:44:14.440689 PCI: 00:14.2: enabled 1
1655 15:44:14.441146 PCI: 01:00.0: enabled 1
1656 15:44:14.445031 Disabling ACPI via APMC:
1657 15:44:14.448620 done.
1658 15:44:14.452018 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1659 15:44:14.455571 ELOG: NV offset 0xaf0000 size 0x4000
1660 15:44:14.462955 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1661 15:44:14.469486 ELOG: Event(17) added with size 13 at 2022-09-17 15:44:05 UTC
1662 15:44:14.476035 POST: Unexpected post code in previous boot: 0x73
1663 15:44:14.482573 ELOG: Event(A3) added with size 11 at 2022-09-17 15:44:05 UTC
1664 15:44:14.489314 ELOG: Event(A6) added with size 13 at 2022-09-17 15:44:05 UTC
1665 15:44:14.495750 ELOG: Event(92) added with size 9 at 2022-09-17 15:44:05 UTC
1666 15:44:14.501838 ELOG: Event(93) added with size 9 at 2022-09-17 15:44:05 UTC
1667 15:44:14.508391 ELOG: Event(9A) added with size 9 at 2022-09-17 15:44:05 UTC
1668 15:44:14.511568 ELOG: Event(9E) added with size 10 at 2022-09-17 15:44:05 UTC
1669 15:44:14.518371 ELOG: Event(9F) added with size 14 at 2022-09-17 15:44:05 UTC
1670 15:44:14.525029 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1671 15:44:14.531494 ELOG: Event(A1) added with size 10 at 2022-09-17 15:44:05 UTC
1672 15:44:14.538203 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1673 15:44:14.545044 ELOG: Event(A0) added with size 9 at 2022-09-17 15:44:05 UTC
1674 15:44:14.551708 elog_add_boot_reason: Logged dev mode boot
1675 15:44:14.552192 Finalize devices...
1676 15:44:14.554547 PCI: 00:17.0 final
1677 15:44:14.555007 Devices finalized
1678 15:44:14.561474 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1679 15:44:14.568013 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1680 15:44:14.571393 ME: HFSTS1 : 0x90000245
1681 15:44:14.574328 ME: HFSTS2 : 0x3B850126
1682 15:44:14.577738 ME: HFSTS3 : 0x00000020
1683 15:44:14.584187 ME: HFSTS4 : 0x00004800
1684 15:44:14.587876 ME: HFSTS5 : 0x00000000
1685 15:44:14.590863 ME: HFSTS6 : 0x40400006
1686 15:44:14.593878 ME: Manufacturing Mode : NO
1687 15:44:14.597377 ME: FW Partition Table : OK
1688 15:44:14.600564 ME: Bringup Loader Failure : NO
1689 15:44:14.604304 ME: Firmware Init Complete : YES
1690 15:44:14.607140 ME: Boot Options Present : NO
1691 15:44:14.610301 ME: Update In Progress : NO
1692 15:44:14.613794 ME: D0i3 Support : YES
1693 15:44:14.616724 ME: Low Power State Enabled : NO
1694 15:44:14.620495 ME: CPU Replaced : NO
1695 15:44:14.623495 ME: CPU Replacement Valid : YES
1696 15:44:14.627102 ME: Current Working State : 5
1697 15:44:14.630230 ME: Current Operation State : 1
1698 15:44:14.633811 ME: Current Operation Mode : 0
1699 15:44:14.636672 ME: Error Code : 0
1700 15:44:14.639906 ME: CPU Debug Disabled : YES
1701 15:44:14.642840 ME: TXT Support : NO
1702 15:44:14.649716 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1703 15:44:14.652742 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 15:44:14.655795 CBFS @ c08000 size 3f8000
1705 15:44:14.662740 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 15:44:14.665777 CBFS: Locating 'fallback/dsdt.aml'
1707 15:44:14.669405 CBFS: Found @ offset 10bb80 size 3fa5
1708 15:44:14.675527 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1709 15:44:14.679074 CBFS @ c08000 size 3f8000
1710 15:44:14.685676 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1711 15:44:14.685761 CBFS: Locating 'fallback/slic'
1712 15:44:14.694133 CBFS: 'fallback/slic' not found.
1713 15:44:14.697670 ACPI: Writing ACPI tables at 99b3e000.
1714 15:44:14.697756 ACPI: * FACS
1715 15:44:14.700664 ACPI: * DSDT
1716 15:44:14.703756 Ramoops buffer: 0x100000@0x99a3d000.
1717 15:44:14.707338 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1718 15:44:14.714034 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1719 15:44:14.717020 Google Chrome EC: version:
1720 15:44:14.720101 ro: helios_v2.0.2659-56403530b
1721 15:44:14.723206 rw: helios_v2.0.2849-c41de27e7d
1722 15:44:14.723291 running image: 1
1723 15:44:14.727976 ACPI: * FADT
1724 15:44:14.728061 SCI is IRQ9
1725 15:44:14.734593 ACPI: added table 1/32, length now 40
1726 15:44:14.734677 ACPI: * SSDT
1727 15:44:14.738245 Found 1 CPU(s) with 8 core(s) each.
1728 15:44:14.741357 Error: Could not locate 'wifi_sar' in VPD.
1729 15:44:14.747713 Checking CBFS for default SAR values
1730 15:44:14.751235 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1731 15:44:14.754427 CBFS @ c08000 size 3f8000
1732 15:44:14.760781 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1733 15:44:14.764421 CBFS: Locating 'wifi_sar_defaults.hex'
1734 15:44:14.767271 CBFS: Found @ offset 5fac0 size 77
1735 15:44:14.770885 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1736 15:44:14.777473 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1737 15:44:14.780998 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1738 15:44:14.786959 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1739 15:44:14.790649 failed to find key in VPD: dsm_calib_r0_0
1740 15:44:14.800105 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1741 15:44:14.803676 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1742 15:44:14.810246 failed to find key in VPD: dsm_calib_r0_1
1743 15:44:14.816867 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1744 15:44:14.822944 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1745 15:44:14.826483 failed to find key in VPD: dsm_calib_r0_2
1746 15:44:14.836091 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1747 15:44:14.842677 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1748 15:44:14.845810 failed to find key in VPD: dsm_calib_r0_3
1749 15:44:14.855725 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1750 15:44:14.858849 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1751 15:44:14.865840 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1752 15:44:14.869289 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1753 15:44:14.872972 EC returned error result code 1
1754 15:44:14.875981 EC returned error result code 1
1755 15:44:14.879126 EC returned error result code 1
1756 15:44:14.882615 PS2K: Bad resp from EC. Vivaldi disabled!
1757 15:44:14.889164 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1758 15:44:14.895925 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1759 15:44:14.902407 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1760 15:44:14.905553 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1761 15:44:14.912178 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1762 15:44:14.918932 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1763 15:44:14.922194 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1764 15:44:14.928248 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1765 15:44:14.931984 ACPI: added table 2/32, length now 44
1766 15:44:14.934978 ACPI: * MCFG
1767 15:44:14.938028 ACPI: added table 3/32, length now 48
1768 15:44:14.941520 ACPI: * TPM2
1769 15:44:14.945157 TPM2 log created at 99a2d000
1770 15:44:14.948139 ACPI: added table 4/32, length now 52
1771 15:44:14.948223 ACPI: * MADT
1772 15:44:14.951005 SCI is IRQ9
1773 15:44:14.954333 ACPI: added table 5/32, length now 56
1774 15:44:14.954417 current = 99b43ac0
1775 15:44:14.957884 ACPI: * DMAR
1776 15:44:14.960935 ACPI: added table 6/32, length now 60
1777 15:44:14.964444 ACPI: * IGD OpRegion
1778 15:44:14.964528 GMA: Found VBT in CBFS
1779 15:44:14.967956 GMA: Found valid VBT in CBFS
1780 15:44:14.970979 ACPI: added table 7/32, length now 64
1781 15:44:14.974016 ACPI: * HPET
1782 15:44:14.977555 ACPI: added table 8/32, length now 68
1783 15:44:14.981084 ACPI: done.
1784 15:44:14.981168 ACPI tables: 31744 bytes.
1785 15:44:14.984133 smbios_write_tables: 99a2c000
1786 15:44:14.987683 EC returned error result code 3
1787 15:44:14.990767 Couldn't obtain OEM name from CBI
1788 15:44:14.994403 Create SMBIOS type 17
1789 15:44:14.997450 PCI: 00:00.0 (Intel Cannonlake)
1790 15:44:15.000676 PCI: 00:14.3 (Intel WiFi)
1791 15:44:15.003999 SMBIOS tables: 939 bytes.
1792 15:44:15.007597 Writing table forward entry at 0x00000500
1793 15:44:15.013774 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1794 15:44:15.017411 Writing coreboot table at 0x99b62000
1795 15:44:15.023529 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1796 15:44:15.027239 1. 0000000000001000-000000000009ffff: RAM
1797 15:44:15.033773 2. 00000000000a0000-00000000000fffff: RESERVED
1798 15:44:15.036789 3. 0000000000100000-0000000099a2bfff: RAM
1799 15:44:15.043310 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1800 15:44:15.046841 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1801 15:44:15.053186 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1802 15:44:15.056753 7. 000000009a000000-000000009f7fffff: RESERVED
1803 15:44:15.062796 8. 00000000e0000000-00000000efffffff: RESERVED
1804 15:44:15.066303 9. 00000000fc000000-00000000fc000fff: RESERVED
1805 15:44:15.072803 10. 00000000fe000000-00000000fe00ffff: RESERVED
1806 15:44:15.076497 11. 00000000fed10000-00000000fed17fff: RESERVED
1807 15:44:15.082657 12. 00000000fed80000-00000000fed83fff: RESERVED
1808 15:44:15.086246 13. 00000000fed90000-00000000fed91fff: RESERVED
1809 15:44:15.092943 14. 00000000feda0000-00000000feda1fff: RESERVED
1810 15:44:15.095694 15. 0000000100000000-000000045e7fffff: RAM
1811 15:44:15.098722 Graphics framebuffer located at 0xc0000000
1812 15:44:15.102434 Passing 5 GPIOs to payload:
1813 15:44:15.108973 NAME | PORT | POLARITY | VALUE
1814 15:44:15.111980 write protect | undefined | high | low
1815 15:44:15.118552 lid | undefined | high | high
1816 15:44:15.122268 power | undefined | high | low
1817 15:44:15.128388 oprom | undefined | high | low
1818 15:44:15.134992 EC in RW | 0x000000cb | high | low
1819 15:44:15.135078 Board ID: 4
1820 15:44:15.141592 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1821 15:44:15.141742 CBFS @ c08000 size 3f8000
1822 15:44:15.148203 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1823 15:44:15.154724 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1824 15:44:15.158121 coreboot table: 1492 bytes.
1825 15:44:15.161058 IMD ROOT 0. 99fff000 00001000
1826 15:44:15.164595 IMD SMALL 1. 99ffe000 00001000
1827 15:44:15.167582 FSP MEMORY 2. 99c4e000 003b0000
1828 15:44:15.171097 CONSOLE 3. 99c2e000 00020000
1829 15:44:15.174618 FMAP 4. 99c2d000 0000054e
1830 15:44:15.177577 TIME STAMP 5. 99c2c000 00000910
1831 15:44:15.180677 VBOOT WORK 6. 99c18000 00014000
1832 15:44:15.184274 MRC DATA 7. 99c16000 00001958
1833 15:44:15.187314 ROMSTG STCK 8. 99c15000 00001000
1834 15:44:15.191000 AFTER CAR 9. 99c0b000 0000a000
1835 15:44:15.194017 RAMSTAGE 10. 99baf000 0005c000
1836 15:44:15.197433 REFCODE 11. 99b7a000 00035000
1837 15:44:15.200517 SMM BACKUP 12. 99b6a000 00010000
1838 15:44:15.203570 COREBOOT 13. 99b62000 00008000
1839 15:44:15.206978 ACPI 14. 99b3e000 00024000
1840 15:44:15.210083 ACPI GNVS 15. 99b3d000 00001000
1841 15:44:15.213822 RAMOOPS 16. 99a3d000 00100000
1842 15:44:15.216842 TPM2 TCGLOG17. 99a2d000 00010000
1843 15:44:15.219834 SMBIOS 18. 99a2c000 00000800
1844 15:44:15.222940 IMD small region:
1845 15:44:15.226661 IMD ROOT 0. 99ffec00 00000400
1846 15:44:15.229762 FSP RUNTIME 1. 99ffebe0 00000004
1847 15:44:15.232920 EC HOSTEVENT 2. 99ffebc0 00000008
1848 15:44:15.236516 POWER STATE 3. 99ffeb80 00000040
1849 15:44:15.239688 ROMSTAGE 4. 99ffeb60 00000004
1850 15:44:15.242720 MEM INFO 5. 99ffe9a0 000001b9
1851 15:44:15.246223 VPD 6. 99ffe920 0000006c
1852 15:44:15.249188 MTRR: Physical address space:
1853 15:44:15.255735 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1854 15:44:15.262818 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1855 15:44:15.268973 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1856 15:44:15.275423 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1857 15:44:15.282174 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1858 15:44:15.288837 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1859 15:44:15.294926 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1860 15:44:15.298455 MTRR: Fixed MSR 0x250 0x0606060606060606
1861 15:44:15.301541 MTRR: Fixed MSR 0x258 0x0606060606060606
1862 15:44:15.305128 MTRR: Fixed MSR 0x259 0x0000000000000000
1863 15:44:15.311698 MTRR: Fixed MSR 0x268 0x0606060606060606
1864 15:44:15.314842 MTRR: Fixed MSR 0x269 0x0606060606060606
1865 15:44:15.317769 MTRR: Fixed MSR 0x26a 0x0606060606060606
1866 15:44:15.321392 MTRR: Fixed MSR 0x26b 0x0606060606060606
1867 15:44:15.328132 MTRR: Fixed MSR 0x26c 0x0606060606060606
1868 15:44:15.331171 MTRR: Fixed MSR 0x26d 0x0606060606060606
1869 15:44:15.334134 MTRR: Fixed MSR 0x26e 0x0606060606060606
1870 15:44:15.337705 MTRR: Fixed MSR 0x26f 0x0606060606060606
1871 15:44:15.341316 call enable_fixed_mtrr()
1872 15:44:15.344431 CPU physical address size: 39 bits
1873 15:44:15.350891 MTRR: default type WB/UC MTRR counts: 6/8.
1874 15:44:15.354723 MTRR: WB selected as default type.
1875 15:44:15.361160 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1876 15:44:15.367703 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1877 15:44:15.370843 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1878 15:44:15.377197 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1879 15:44:15.383983 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1880 15:44:15.390686 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1881 15:44:15.390778
1882 15:44:15.393670 MTRR check
1883 15:44:15.397460 Fixed MTRRs : Enabled
1884 15:44:15.397544 Variable MTRRs: Enabled
1885 15:44:15.397611
1886 15:44:15.403410 MTRR: Fixed MSR 0x250 0x0606060606060606
1887 15:44:15.407172 MTRR: Fixed MSR 0x258 0x0606060606060606
1888 15:44:15.410004 MTRR: Fixed MSR 0x259 0x0000000000000000
1889 15:44:15.413736 MTRR: Fixed MSR 0x268 0x0606060606060606
1890 15:44:15.419812 MTRR: Fixed MSR 0x269 0x0606060606060606
1891 15:44:15.422893 MTRR: Fixed MSR 0x26a 0x0606060606060606
1892 15:44:15.426520 MTRR: Fixed MSR 0x26b 0x0606060606060606
1893 15:44:15.429649 MTRR: Fixed MSR 0x26c 0x0606060606060606
1894 15:44:15.436311 MTRR: Fixed MSR 0x26d 0x0606060606060606
1895 15:44:15.439425 MTRR: Fixed MSR 0x26e 0x0606060606060606
1896 15:44:15.443174 MTRR: Fixed MSR 0x26f 0x0606060606060606
1897 15:44:15.449315 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1898 15:44:15.452392 call enable_fixed_mtrr()
1899 15:44:15.455885 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1900 15:44:15.459466 CPU physical address size: 39 bits
1901 15:44:15.462549 CBFS @ c08000 size 3f8000
1902 15:44:15.469011 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1903 15:44:15.472630 CBFS: Locating 'fallback/payload'
1904 15:44:15.475474 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 15:44:15.479052 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 15:44:15.485761 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 15:44:15.488571 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 15:44:15.492252 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 15:44:15.495167 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 15:44:15.501754 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 15:44:15.505184 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 15:44:15.508408 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 15:44:15.511995 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 15:44:15.517996 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 15:44:15.521670 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 15:44:15.524683 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 15:44:15.528468 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 15:44:15.534413 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 15:44:15.537898 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 15:44:15.541596 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 15:44:15.544507 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 15:44:15.551099 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 15:44:15.554130 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 15:44:15.557819 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 15:44:15.560720 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 15:44:15.563896 call enable_fixed_mtrr()
1927 15:44:15.567162 call enable_fixed_mtrr()
1928 15:44:15.570779 CPU physical address size: 39 bits
1929 15:44:15.573785 CPU physical address size: 39 bits
1930 15:44:15.580564 MTRR: Fixed MSR 0x250 0x0606060606060606
1931 15:44:15.583587 MTRR: Fixed MSR 0x250 0x0606060606060606
1932 15:44:15.587136 MTRR: Fixed MSR 0x258 0x0606060606060606
1933 15:44:15.590016 MTRR: Fixed MSR 0x259 0x0000000000000000
1934 15:44:15.596627 MTRR: Fixed MSR 0x268 0x0606060606060606
1935 15:44:15.600146 MTRR: Fixed MSR 0x269 0x0606060606060606
1936 15:44:15.603159 MTRR: Fixed MSR 0x26a 0x0606060606060606
1937 15:44:15.606625 MTRR: Fixed MSR 0x26b 0x0606060606060606
1938 15:44:15.613160 MTRR: Fixed MSR 0x26c 0x0606060606060606
1939 15:44:15.616729 MTRR: Fixed MSR 0x26d 0x0606060606060606
1940 15:44:15.619776 MTRR: Fixed MSR 0x26e 0x0606060606060606
1941 15:44:15.622808 MTRR: Fixed MSR 0x26f 0x0606060606060606
1942 15:44:15.629513 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 15:44:15.629598 call enable_fixed_mtrr()
1944 15:44:15.636213 MTRR: Fixed MSR 0x259 0x0000000000000000
1945 15:44:15.639341 MTRR: Fixed MSR 0x268 0x0606060606060606
1946 15:44:15.642941 MTRR: Fixed MSR 0x269 0x0606060606060606
1947 15:44:15.645937 MTRR: Fixed MSR 0x26a 0x0606060606060606
1948 15:44:15.652462 MTRR: Fixed MSR 0x26b 0x0606060606060606
1949 15:44:15.656002 MTRR: Fixed MSR 0x26c 0x0606060606060606
1950 15:44:15.658998 MTRR: Fixed MSR 0x26d 0x0606060606060606
1951 15:44:15.662548 MTRR: Fixed MSR 0x26e 0x0606060606060606
1952 15:44:15.668935 MTRR: Fixed MSR 0x26f 0x0606060606060606
1953 15:44:15.672480 CPU physical address size: 39 bits
1954 15:44:15.675533 call enable_fixed_mtrr()
1955 15:44:15.679178 CBFS: Found @ offset 1c96c0 size 3f798
1956 15:44:15.682475 CPU physical address size: 39 bits
1957 15:44:15.685403 MTRR: Fixed MSR 0x250 0x0606060606060606
1958 15:44:15.689035 MTRR: Fixed MSR 0x250 0x0606060606060606
1959 15:44:15.695252 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 15:44:15.698300 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 15:44:15.701822 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 15:44:15.704823 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 15:44:15.711511 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 15:44:15.715107 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 15:44:15.718161 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 15:44:15.721698 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 15:44:15.727766 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 15:44:15.731330 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 15:44:15.734430 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 15:44:15.738045 call enable_fixed_mtrr()
1971 15:44:15.741184 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 15:44:15.744395 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 15:44:15.751010 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 15:44:15.754004 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 15:44:15.757638 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 15:44:15.760540 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 15:44:15.767150 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 15:44:15.770607 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 15:44:15.773701 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 15:44:15.777399 CPU physical address size: 39 bits
1981 15:44:15.780960 call enable_fixed_mtrr()
1982 15:44:15.783827 Checking segment from ROM address 0xffdd16f8
1983 15:44:15.790488 CPU physical address size: 39 bits
1984 15:44:15.793509 Checking segment from ROM address 0xffdd1714
1985 15:44:15.797171 Loading segment from ROM address 0xffdd16f8
1986 15:44:15.800168 code (compression=0)
1987 15:44:15.810320 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1988 15:44:15.816555 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1989 15:44:15.819934 it's not compressed!
1990 15:44:15.911597 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1991 15:44:15.918166 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1992 15:44:15.924825 Loading segment from ROM address 0xffdd1714
1993 15:44:15.924947 Entry Point 0x30000000
1994 15:44:15.927849 Loaded segments
1995 15:44:15.933786 Finalizing chipset.
1996 15:44:15.936759 Finalizing SMM.
1997 15:44:15.940563 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1998 15:44:15.943661 mp_park_aps done after 0 msecs.
1999 15:44:15.950358 Jumping to boot code at 30000000(99b62000)
2000 15:44:15.956786 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2001 15:44:15.956875
2002 15:44:15.959801 Starting depthcharge on Helios...
2003 15:44:15.960143 end: 2.2.3 depthcharge-start (duration 00:00:20) [common]
2004 15:44:15.960253 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2005 15:44:15.960344 Setting prompt string to ['hatch:']
2006 15:44:15.960431 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2007 15:44:15.969797 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2008 15:44:15.976569 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2009 15:44:15.982651 board_setup: Info: eMMC controller not present; skipping
2010 15:44:15.986173 New NVMe Controller 0x30053ac0 @ 00:1d:00
2011 15:44:15.992631 board_setup: Info: SDHCI controller not present; skipping
2012 15:44:15.999462 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2013 15:44:15.999544 Wipe memory regions:
2014 15:44:16.005949 [0x00000000001000, 0x000000000a0000)
2015 15:44:16.009072 [0x00000000100000, 0x00000030000000)
2016 15:44:16.075899 [0x00000030657430, 0x00000099a2c000)
2017 15:44:16.217093 [0x00000100000000, 0x0000045e800000)
2018 15:44:17.599714 R8152: Initializing
2019 15:44:17.603364 Version 9 (ocp_data = 6010)
2020 15:44:17.607562 R8152: Done initializing
2021 15:44:17.610581 Adding net device
2022 15:44:17.985920 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2023 15:44:17.986060
2024 15:44:17.986337 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2026 15:44:18.087076 hatch: tftpboot 192.168.201.1 7300462/tftp-deploy-r1gmh8mf/kernel/bzImage 7300462/tftp-deploy-r1gmh8mf/kernel/cmdline 7300462/tftp-deploy-r1gmh8mf/ramdisk/ramdisk.cpio.gz
2027 15:44:18.087214 Setting prompt string to 'Starting kernel'
2028 15:44:18.087286 Setting prompt string to ['Starting kernel']
2029 15:44:18.087353 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2030 15:44:18.087423 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:04:38)
2031 15:44:18.091460 tftpboot 192.168.201.1 7300462/tftp-deploy-r1gmh8mf/kernel/bzImoy-r1gmh8mf/kernel/cmdline 7300462/tftp-deploy-r1gmh8mf/ramdisk/ramdisk.cpio.gz
2032 15:44:18.091548 Waiting for link
2033 15:44:18.292431 done.
2034 15:44:18.292960 MAC: f4:f5:e8:50:e5:3a
2035 15:44:18.296046 Sending DHCP discover... done.
2036 15:44:18.299163 Waiting for reply... done.
2037 15:44:18.302237 Sending DHCP request... done.
2038 15:44:18.305771 Waiting for reply... done.
2039 15:44:18.308733 My ip is 192.168.201.15
2040 15:44:18.312440 The DHCP server ip is 192.168.201.1
2041 15:44:18.315518 TFTP server IP predefined by user: 192.168.201.1
2042 15:44:18.325049 Bootfile predefined by user: 7300462/tftp-deploy-r1gmh8mf/kernel/bzImage
2043 15:44:18.328478 Sending tftp read request... done.
2044 15:44:18.333257 Waiting for the transfer...
2045 15:44:18.610925 00000000 ################################################################
2046 15:44:18.848506 00080000 ################################################################
2047 15:44:19.088135 00100000 ################################################################
2048 15:44:19.327066 00180000 ################################################################
2049 15:44:19.559062 00200000 ################################################################
2050 15:44:19.801695 00280000 ################################################################
2051 15:44:20.047956 00300000 ################################################################
2052 15:44:20.293085 00380000 ################################################################
2053 15:44:20.531859 00400000 ################################################################
2054 15:44:20.770636 00480000 ################################################################
2055 15:44:21.014968 00500000 ################################################################
2056 15:44:21.277803 00580000 ################################################################
2057 15:44:21.521155 00600000 ################################################################ done.
2058 15:44:21.525029 The bootfile was 6815632 bytes long.
2059 15:44:21.527955 Sending tftp read request... done.
2060 15:44:21.531074 Waiting for the transfer...
2061 15:44:21.771551 00000000 ################################################################
2062 15:44:22.017330 00080000 ################################################################
2063 15:44:22.261488 00100000 ################################################################
2064 15:44:22.493878 00180000 ################################################################
2065 15:44:22.736324 00200000 ################################################################
2066 15:44:22.977092 00280000 ################################################################
2067 15:44:23.219338 00300000 ################################################################
2068 15:44:23.463253 00380000 ################################################################
2069 15:44:23.707561 00400000 ################################################################
2070 15:44:23.951338 00480000 ################################################################
2071 15:44:24.058489 00500000 ############################# done.
2072 15:44:24.061495 Sending tftp read request... done.
2073 15:44:24.065062 Waiting for the transfer...
2074 15:44:24.065164 00000000 # done.
2075 15:44:24.074784 Command line loaded dynamically from TFTP file: 7300462/tftp-deploy-r1gmh8mf/kernel/cmdline
2076 15:44:24.101104 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7300462/extract-nfsrootfs-v4h83frb,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2077 15:44:24.107236 ec_init(0): CrosEC protocol v3 supported (256, 256)
2078 15:44:24.113979 Shutting down all USB controllers.
2079 15:44:24.114069 Removing current net device
2080 15:44:24.117585 Finalizing coreboot
2081 15:44:24.124368 Exiting depthcharge with code 4 at timestamp: 15443641
2082 15:44:24.124461
2083 15:44:24.124553 Starting kernel ...
2084 15:44:24.124873 end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
2085 15:44:24.124996 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2086 15:44:24.125090 Setting prompt string to ['Linux version [0-9]']
2087 15:44:24.125188 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2088 15:44:24.125303 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:05:00)
2089 15:44:24.127299
2090 15:44:24.127379
2092 15:48:56.126125 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2094 15:48:56.127949 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2096 15:48:56.129378 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2099 15:48:56.130837 end: 2 depthcharge-action (duration 00:05:00) [common]
2101 15:48:56.131036 Cleaning after the job
2102 15:48:56.131117 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300462/tftp-deploy-r1gmh8mf/ramdisk
2103 15:48:56.131596 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300462/tftp-deploy-r1gmh8mf/kernel
2104 15:48:56.132094 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300462/tftp-deploy-r1gmh8mf/nfsrootfs
2105 15:48:56.167654 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300462/tftp-deploy-r1gmh8mf/modules
2106 15:48:56.167957 start: 5.1 power-off (timeout 00:00:30) [common]
2107 15:48:56.168117 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2108 15:48:56.187149 >> Command sent successfully.
2109 15:48:56.188931 Returned 0 in 0 seconds
2110 15:48:56.290189 end: 5.1 power-off (duration 00:00:00) [common]
2112 15:48:56.291959 start: 5.2 read-feedback (timeout 00:10:00) [common]
2113 15:48:56.293225 Listened to connection for namespace 'common' for up to 1s
2114 15:48:57.297699 Finalising connection for namespace 'common'
2115 15:48:57.298512 Disconnecting from shell: Finalise
2116 15:48:57.400175 end: 5.2 read-feedback (duration 00:00:01) [common]
2117 15:48:57.400875 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7300462
2118 15:48:57.496706 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7300462
2119 15:48:57.496920 JobError: Your job cannot terminate cleanly.