Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 15:43:32.162585 lava-dispatcher, installed at version: 2022.06
2 15:43:32.162781 start: 0 validate
3 15:43:32.162913 Start time: 2022-09-17 15:43:32.162903+00:00 (UTC)
4 15:43:32.163038 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:43:32.163165 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
6 15:43:32.454381 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:43:32.455122 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-229-gb433f12afe250%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:43:32.461845 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:43:32.462581 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:43:32.751108 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:43:32.751271 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-229-gb433f12afe250%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:43:32.754403 validate duration: 0.59
14 15:43:32.754679 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:43:32.754780 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:43:32.754870 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:43:32.754968 Not decompressing ramdisk as can be used compressed.
18 15:43:32.755054 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220826.0/amd64/initrd.cpio.gz
19 15:43:32.755119 saving as /var/lib/lava/dispatcher/tmp/7300438/tftp-deploy-ep8bqypb/ramdisk/initrd.cpio.gz
20 15:43:32.755179 total size: 5411044 (5MB)
21 15:43:32.757739 progress 0% (0MB)
22 15:43:32.762859 progress 5% (0MB)
23 15:43:32.767330 progress 10% (0MB)
24 15:43:32.771369 progress 15% (0MB)
25 15:43:32.776162 progress 20% (1MB)
26 15:43:32.780531 progress 25% (1MB)
27 15:43:32.785153 progress 30% (1MB)
28 15:43:32.789744 progress 35% (1MB)
29 15:43:32.795160 progress 40% (2MB)
30 15:43:32.799306 progress 45% (2MB)
31 15:43:32.803731 progress 50% (2MB)
32 15:43:32.808003 progress 55% (2MB)
33 15:43:32.812991 progress 60% (3MB)
34 15:43:32.818160 progress 65% (3MB)
35 15:43:32.822152 progress 70% (3MB)
36 15:43:32.826609 progress 75% (3MB)
37 15:43:32.832015 progress 80% (4MB)
38 15:43:32.836601 progress 85% (4MB)
39 15:43:32.840632 progress 90% (4MB)
40 15:43:32.844879 progress 95% (4MB)
41 15:43:32.849456 progress 100% (5MB)
42 15:43:32.849667 5MB downloaded in 0.09s (54.62MB/s)
43 15:43:32.849826 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:43:32.850132 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:43:32.850229 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:43:32.850319 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:43:32.850430 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-229-gb433f12afe250/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:43:32.850500 saving as /var/lib/lava/dispatcher/tmp/7300438/tftp-deploy-ep8bqypb/kernel/bzImage
50 15:43:32.850563 total size: 6815632 (6MB)
51 15:43:32.850625 No compression specified
52 15:43:32.856838 progress 0% (0MB)
53 15:43:32.879418 progress 5% (0MB)
54 15:43:32.892551 progress 10% (0MB)
55 15:43:32.905537 progress 15% (1MB)
56 15:43:32.916663 progress 20% (1MB)
57 15:43:32.926018 progress 25% (1MB)
58 15:43:32.939224 progress 30% (1MB)
59 15:43:32.946943 progress 35% (2MB)
60 15:43:32.958247 progress 40% (2MB)
61 15:43:32.966135 progress 45% (2MB)
62 15:43:32.971764 progress 50% (3MB)
63 15:43:32.979363 progress 55% (3MB)
64 15:43:32.985299 progress 60% (3MB)
65 15:43:32.992910 progress 65% (4MB)
66 15:43:33.000458 progress 70% (4MB)
67 15:43:33.006225 progress 75% (4MB)
68 15:43:33.014484 progress 80% (5MB)
69 15:43:33.021543 progress 85% (5MB)
70 15:43:33.026841 progress 90% (5MB)
71 15:43:33.034864 progress 95% (6MB)
72 15:43:33.042249 progress 100% (6MB)
73 15:43:33.042547 6MB downloaded in 0.19s (33.86MB/s)
74 15:43:33.042699 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:43:33.042937 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:43:33.043027 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:43:33.043115 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:43:33.043220 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220826.0/amd64/full.rootfs.tar.xz
80 15:43:33.043287 saving as /var/lib/lava/dispatcher/tmp/7300438/tftp-deploy-ep8bqypb/nfsrootfs/full.rootfs.tar
81 15:43:33.043349 total size: 133217788 (127MB)
82 15:43:33.043410 Using unxz to decompress xz
83 15:43:33.048023 progress 0% (0MB)
84 15:43:33.393233 progress 5% (6MB)
85 15:43:33.754719 progress 10% (12MB)
86 15:43:34.048847 progress 15% (19MB)
87 15:43:34.272726 progress 20% (25MB)
88 15:43:34.541476 progress 25% (31MB)
89 15:43:34.894185 progress 30% (38MB)
90 15:43:35.255199 progress 35% (44MB)
91 15:43:35.655971 progress 40% (50MB)
92 15:43:36.045064 progress 45% (57MB)
93 15:43:36.407838 progress 50% (63MB)
94 15:43:36.783827 progress 55% (69MB)
95 15:43:37.155902 progress 60% (76MB)
96 15:43:37.528187 progress 65% (82MB)
97 15:43:37.898088 progress 70% (88MB)
98 15:43:38.264928 progress 75% (95MB)
99 15:43:38.714372 progress 80% (101MB)
100 15:43:39.165333 progress 85% (108MB)
101 15:43:39.440241 progress 90% (114MB)
102 15:43:39.810037 progress 95% (120MB)
103 15:43:40.203615 progress 100% (127MB)
104 15:43:40.209289 127MB downloaded in 7.17s (17.73MB/s)
105 15:43:40.209548 end: 1.3.1 http-download (duration 00:00:07) [common]
107 15:43:40.209809 end: 1.3 download-retry (duration 00:00:07) [common]
108 15:43:40.209901 start: 1.4 download-retry (timeout 00:09:53) [common]
109 15:43:40.209991 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 15:43:40.210108 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-229-gb433f12afe250/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:43:40.210193 saving as /var/lib/lava/dispatcher/tmp/7300438/tftp-deploy-ep8bqypb/modules/modules.tar
112 15:43:40.210256 total size: 51872 (0MB)
113 15:43:40.210319 Using unxz to decompress xz
114 15:43:40.248209 progress 63% (0MB)
115 15:43:40.262832 progress 100% (0MB)
116 15:43:40.264408 0MB downloaded in 0.05s (0.91MB/s)
117 15:43:40.264654 end: 1.4.1 http-download (duration 00:00:00) [common]
119 15:43:40.264915 end: 1.4 download-retry (duration 00:00:00) [common]
120 15:43:40.265012 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 15:43:40.265112 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 15:43:41.506425 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7300438/extract-nfsrootfs-ibb3b94y
123 15:43:41.506662 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 15:43:41.506770 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 15:43:41.506906 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819
126 15:43:41.507009 makedir: /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin
127 15:43:41.507095 makedir: /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/tests
128 15:43:41.507178 makedir: /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/results
129 15:43:41.507275 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-add-keys
130 15:43:41.507402 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-add-sources
131 15:43:41.507518 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-background-process-start
132 15:43:41.507632 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-background-process-stop
133 15:43:41.507744 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-common-functions
134 15:43:41.507897 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-echo-ipv4
135 15:43:41.508022 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-install-packages
136 15:43:41.508132 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-installed-packages
137 15:43:41.508241 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-os-build
138 15:43:41.508353 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-probe-channel
139 15:43:41.508478 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-probe-ip
140 15:43:41.508602 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-target-ip
141 15:43:41.508710 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-target-mac
142 15:43:41.508817 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-target-storage
143 15:43:41.508927 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-test-case
144 15:43:41.509037 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-test-event
145 15:43:41.509146 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-test-feedback
146 15:43:41.509254 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-test-raise
147 15:43:41.509361 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-test-reference
148 15:43:41.509471 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-test-runner
149 15:43:41.509579 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-test-set
150 15:43:41.509685 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-test-shell
151 15:43:41.509795 Updating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-install-packages (oe)
152 15:43:41.509909 Updating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/bin/lava-installed-packages (oe)
153 15:43:41.510005 Creating /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/environment
154 15:43:41.510089 LAVA metadata
155 15:43:41.510155 - LAVA_JOB_ID=7300438
156 15:43:41.510219 - LAVA_DISPATCHER_IP=192.168.201.1
157 15:43:41.510316 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 15:43:41.510382 skipped lava-vland-overlay
159 15:43:41.510474 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 15:43:41.510570 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 15:43:41.510633 skipped lava-multinode-overlay
162 15:43:41.510708 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 15:43:41.510789 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 15:43:41.510861 Loading test definitions
165 15:43:41.510952 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
166 15:43:41.511027 Using /lava-7300438 at stage 0
167 15:43:41.511280 uuid=7300438_1.5.2.3.1 testdef=None
168 15:43:41.511370 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 15:43:41.511457 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
170 15:43:41.511985 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 15:43:41.512215 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
173 15:43:41.512840 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 15:43:41.513080 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
176 15:43:41.513612 runner path: /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/0/tests/0_dmesg test_uuid 7300438_1.5.2.3.1
177 15:43:41.513758 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 15:43:41.513989 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
180 15:43:41.514061 Using /lava-7300438 at stage 1
181 15:43:41.514300 uuid=7300438_1.5.2.3.5 testdef=None
182 15:43:41.514389 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 15:43:41.514490 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
184 15:43:41.514939 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 15:43:41.515164 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
187 15:43:41.515728 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 15:43:41.516006 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
190 15:43:41.516567 runner path: /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/1/tests/1_bootrr test_uuid 7300438_1.5.2.3.5
191 15:43:41.516795 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 15:43:41.517007 Creating lava-test-runner.conf files
194 15:43:41.517072 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/0 for stage 0
195 15:43:41.517155 - 0_dmesg
196 15:43:41.517231 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7300438/lava-overlay-0w02m819/lava-7300438/1 for stage 1
197 15:43:41.517314 - 1_bootrr
198 15:43:41.517406 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 15:43:41.517492 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
200 15:43:41.523005 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 15:43:41.523108 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
202 15:43:41.523196 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 15:43:41.523283 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 15:43:41.523371 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
205 15:43:41.624915 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 15:43:41.625258 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 15:43:41.625373 extracting modules file /var/lib/lava/dispatcher/tmp/7300438/tftp-deploy-ep8bqypb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7300438/extract-nfsrootfs-ibb3b94y
208 15:43:41.629435 extracting modules file /var/lib/lava/dispatcher/tmp/7300438/tftp-deploy-ep8bqypb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7300438/extract-overlay-ramdisk-8a6jn22d/ramdisk
209 15:43:41.633259 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 15:43:41.633373 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 15:43:41.633458 [common] Applying overlay to NFS
212 15:43:41.633531 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7300438/compress-overlay-1ifmy3ra/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7300438/extract-nfsrootfs-ibb3b94y
213 15:43:41.637403 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 15:43:41.637511 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 15:43:41.637604 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 15:43:41.637698 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 15:43:41.637777 Building ramdisk /var/lib/lava/dispatcher/tmp/7300438/extract-overlay-ramdisk-8a6jn22d/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7300438/extract-overlay-ramdisk-8a6jn22d/ramdisk
218 15:43:41.670820 >> 24431 blocks
219 15:43:42.132593 rename /var/lib/lava/dispatcher/tmp/7300438/extract-overlay-ramdisk-8a6jn22d/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7300438/tftp-deploy-ep8bqypb/ramdisk/ramdisk.cpio.gz
220 15:43:42.133123 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
221 15:43:42.133317 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
222 15:43:42.133485 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
223 15:43:42.133640 No mkimage arch provided, not using FIT.
224 15:43:42.133789 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 15:43:42.133934 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 15:43:42.134095 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 15:43:42.134252 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
228 15:43:42.134383 No LXC device requested
229 15:43:42.134523 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 15:43:42.134673 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
231 15:43:42.134819 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 15:43:42.134944 Checking files for TFTP limit of 4294967296 bytes.
233 15:43:42.135513 end: 1 tftp-deploy (duration 00:00:09) [common]
234 15:43:42.135673 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 15:43:42.135829 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 15:43:42.136072 substitutions:
237 15:43:42.136190 - {DTB}: None
238 15:43:42.136301 - {INITRD}: 7300438/tftp-deploy-ep8bqypb/ramdisk/ramdisk.cpio.gz
239 15:43:42.136416 - {KERNEL}: 7300438/tftp-deploy-ep8bqypb/kernel/bzImage
240 15:43:42.136524 - {LAVA_MAC}: None
241 15:43:42.136635 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7300438/extract-nfsrootfs-ibb3b94y
242 15:43:42.136746 - {NFS_SERVER_IP}: 192.168.201.1
243 15:43:42.136853 - {PRESEED_CONFIG}: None
244 15:43:42.136959 - {PRESEED_LOCAL}: None
245 15:43:42.137067 - {RAMDISK}: 7300438/tftp-deploy-ep8bqypb/ramdisk/ramdisk.cpio.gz
246 15:43:42.137176 - {ROOT_PART}: None
247 15:43:42.137287 - {ROOT}: None
248 15:43:42.137392 - {SERVER_IP}: 192.168.201.1
249 15:43:42.137499 - {TEE}: None
250 15:43:42.137608 Parsed boot commands:
251 15:43:42.137712 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 15:43:42.137946 Parsed boot commands: tftpboot 192.168.201.1 7300438/tftp-deploy-ep8bqypb/kernel/bzImage 7300438/tftp-deploy-ep8bqypb/kernel/cmdline 7300438/tftp-deploy-ep8bqypb/ramdisk/ramdisk.cpio.gz
253 15:43:42.138101 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 15:43:42.138254 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 15:43:42.138412 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 15:43:42.138562 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 15:43:42.138691 Not connected, no need to disconnect.
258 15:43:42.138833 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 15:43:42.138979 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 15:43:42.139102 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-9'
261 15:43:42.142340 Setting prompt string to ['lava-test: # ']
262 15:43:42.142718 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 15:43:42.142881 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 15:43:42.143039 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 15:43:42.143187 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 15:43:42.143508 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
267 15:43:42.163314 >> Command sent successfully.
268 15:43:42.165408 Returned 0 in 0 seconds
269 15:43:42.266260 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 15:43:42.266747 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 15:43:42.266907 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 15:43:42.267050 Setting prompt string to 'Starting depthcharge on Voema...'
274 15:43:42.267169 Changing prompt to 'Starting depthcharge on Voema...'
275 15:43:42.267295 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 15:43:42.267702 [Enter `^Ec?' for help]
277 15:43:50.337207
278 15:43:50.337366
279 15:43:50.346788 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 15:43:50.350124 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 15:43:50.356871 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 15:43:50.360220 CPU: AES supported, TXT NOT supported, VT supported
283 15:43:50.366788 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 15:43:50.373353 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 15:43:50.376889 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 15:43:50.379983 VBOOT: Loading verstage.
287 15:43:50.383685 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
288 15:43:50.389886 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 15:43:50.393383 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 15:43:50.403796 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 15:43:50.410606 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 15:43:50.410689
293 15:43:50.410754
294 15:43:50.423531 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 15:43:50.437483 Probing TPM: . done!
296 15:43:50.440980 TPM ready after 0 ms
297 15:43:50.444278 Connected to device vid:did:rid of 1ae0:0028:00
298 15:43:50.455524 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
299 15:43:50.462016 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 15:43:50.465643 Initialized TPM device CR50 revision 0
301 15:43:50.515849 tlcl_send_startup: Startup return code is 0
302 15:43:50.515965 TPM: setup succeeded
303 15:43:50.531691 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 15:43:50.546694 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 15:43:50.560437 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 15:43:50.571000 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 15:43:50.574530 Chrome EC: UHEPI supported
308 15:43:50.577998 Phase 1
309 15:43:50.581034 FMAP: area GBB found @ 1805000 (458752 bytes)
310 15:43:50.588088 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 15:43:50.597665 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 15:43:50.604949 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 15:43:50.610894 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 15:43:50.614496 Recovery requested (1009000e)
315 15:43:50.617535 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 15:43:50.629288 tlcl_extend: response is 0
317 15:43:50.635689 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 15:43:50.645858 tlcl_extend: response is 0
319 15:43:50.652388 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 15:43:50.658885 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 15:43:50.665648 BS: verstage times (exec / console): total (unknown) / 142 ms
322 15:43:50.665731
323 15:43:50.665796
324 15:43:50.678798 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 15:43:50.685420 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 15:43:50.688593 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 15:43:50.692426 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 15:43:50.698581 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 15:43:50.702404 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 15:43:50.705540 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
331 15:43:50.708563 TCO_STS: 0000 0000
332 15:43:50.711960 GEN_PMCON: d0015038 00002200
333 15:43:50.715626 GBLRST_CAUSE: 00000000 00000000
334 15:43:50.715723 HPR_CAUSE0: 00000000
335 15:43:50.718604 prev_sleep_state 5
336 15:43:50.721808 Boot Count incremented to 10506
337 15:43:50.728789 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 15:43:50.735160 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 15:43:50.745146 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 15:43:50.752124 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
341 15:43:50.754849 Chrome EC: UHEPI supported
342 15:43:50.761572 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 15:43:50.773252 Probing TPM: done!
344 15:43:50.780307 Connected to device vid:did:rid of 1ae0:0028:00
345 15:43:50.790468 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
346 15:43:50.797991 Initialized TPM device CR50 revision 0
347 15:43:50.808113 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 15:43:50.814963 MRC: Hash idx 0x100b comparison successful.
349 15:43:50.817891 MRC cache found, size faa8
350 15:43:50.817973 bootmode is set to: 2
351 15:43:50.821235 SPD index = 0
352 15:43:50.828086 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
353 15:43:50.831289 SPD: module type is LPDDR4X
354 15:43:50.838047 SPD: module part number is MT53E512M64D4NW-046
355 15:43:50.841179 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
356 15:43:50.848358 SPD: device width 16 bits, bus width 16 bits
357 15:43:50.851115 SPD: module size is 1024 MB (per channel)
358 15:43:51.284545 CBMEM:
359 15:43:51.288022 IMD: root @ 0x76fff000 254 entries.
360 15:43:51.291384 IMD: root @ 0x76ffec00 62 entries.
361 15:43:51.294959 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
362 15:43:51.301223 FMAP: area RW_VPD found @ f35000 (8192 bytes)
363 15:43:51.304366 External stage cache:
364 15:43:51.307977 IMD: root @ 0x7b3ff000 254 entries.
365 15:43:51.311276 IMD: root @ 0x7b3fec00 62 entries.
366 15:43:51.326313 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
367 15:43:51.332936 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
368 15:43:51.339721 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 15:43:51.353757 MRC: 'RECOVERY_MRC_CACHE' does not need update.
370 15:43:51.357665 cse_lite: Skip switching to RW in the recovery path
371 15:43:51.361497 8 DIMMs found
372 15:43:51.361610 SMM Memory Map
373 15:43:51.364972 SMRAM : 0x7b000000 0x800000
374 15:43:51.367788 Subregion 0: 0x7b000000 0x200000
375 15:43:51.371237 Subregion 1: 0x7b200000 0x200000
376 15:43:51.374534 Subregion 2: 0x7b400000 0x400000
377 15:43:51.377889 top_of_ram = 0x77000000
378 15:43:51.384557 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
379 15:43:51.387769 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
380 15:43:51.394445 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
381 15:43:51.397936 MTRR Range: Start=ff000000 End=0 (Size 1000000)
382 15:43:51.407783 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
383 15:43:51.414366 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
384 15:43:51.424476 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
385 15:43:51.427464 Processing 211 relocs. Offset value of 0x74c0b000
386 15:43:51.436390 BS: romstage times (exec / console): total (unknown) / 277 ms
387 15:43:51.442626
388 15:43:51.442711
389 15:43:51.452422 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
390 15:43:51.455781 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
391 15:43:51.466196 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
392 15:43:51.472289 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
393 15:43:51.479506 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
394 15:43:51.486010 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
395 15:43:51.532787 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
396 15:43:51.539364 Processing 5008 relocs. Offset value of 0x75d98000
397 15:43:51.542624 BS: postcar times (exec / console): total (unknown) / 59 ms
398 15:43:51.546130
399 15:43:51.546212
400 15:43:51.556575 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
401 15:43:51.556659 Normal boot
402 15:43:51.560226 FW_CONFIG value is 0x804c02
403 15:43:51.563311 PCI: 00:07.0 disabled by fw_config
404 15:43:51.566720 PCI: 00:07.1 disabled by fw_config
405 15:43:51.570016 PCI: 00:0d.2 disabled by fw_config
406 15:43:51.573331 PCI: 00:1c.7 disabled by fw_config
407 15:43:51.579989 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 15:43:51.586650 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
409 15:43:51.589776 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 15:43:51.593342 GENERIC: 0.0 disabled by fw_config
411 15:43:51.596396 GENERIC: 1.0 disabled by fw_config
412 15:43:51.603328 fw_config match found: DB_USB=USB3_ACTIVE
413 15:43:51.606681 fw_config match found: DB_USB=USB3_ACTIVE
414 15:43:51.609869 fw_config match found: DB_USB=USB3_ACTIVE
415 15:43:51.613092 fw_config match found: DB_USB=USB3_ACTIVE
416 15:43:51.619871 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
417 15:43:51.626341 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
418 15:43:51.633129 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
419 15:43:51.642817 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
420 15:43:51.646301 microcode: sig=0x806c1 pf=0x80 revision=0x86
421 15:43:51.652952 microcode: Update skipped, already up-to-date
422 15:43:51.659359 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
423 15:43:51.686228 Detected 4 core, 8 thread CPU.
424 15:43:51.689615 Setting up SMI for CPU
425 15:43:51.692783 IED base = 0x7b400000
426 15:43:51.692865 IED size = 0x00400000
427 15:43:51.696255 Will perform SMM setup.
428 15:43:51.703098 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
429 15:43:51.709355 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
430 15:43:51.716116 Processing 16 relocs. Offset value of 0x00030000
431 15:43:51.719245 Attempting to start 7 APs
432 15:43:51.722610 Waiting for 10ms after sending INIT.
433 15:43:51.738570 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
434 15:43:51.741913 AP: slot 3 apic_id 7.
435 15:43:51.745095 AP: slot 6 apic_id 6.
436 15:43:51.745178 AP: slot 4 apic_id 4.
437 15:43:51.748595 AP: slot 7 apic_id 5.
438 15:43:51.751719 AP: slot 5 apic_id 3.
439 15:43:51.751816 AP: slot 2 apic_id 2.
440 15:43:51.751910 done.
441 15:43:51.758179 Waiting for 2nd SIPI to complete...done.
442 15:43:51.764817 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
443 15:43:51.771582 Processing 13 relocs. Offset value of 0x00038000
444 15:43:51.775017 Unable to locate Global NVS
445 15:43:51.781442 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
446 15:43:51.785028 Installing permanent SMM handler to 0x7b000000
447 15:43:51.794630 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
448 15:43:51.798274 Processing 794 relocs. Offset value of 0x7b010000
449 15:43:51.808144 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
450 15:43:51.811344 Processing 13 relocs. Offset value of 0x7b008000
451 15:43:51.818173 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
452 15:43:51.824550 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
453 15:43:51.828043 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
454 15:43:51.835217 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
455 15:43:51.841203 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
456 15:43:51.847781 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
457 15:43:51.854343 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
458 15:43:51.854473 Unable to locate Global NVS
459 15:43:51.864384 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
460 15:43:51.867571 Clearing SMI status registers
461 15:43:51.867662 SMI_STS: PM1
462 15:43:51.870980 PM1_STS: PWRBTN
463 15:43:51.877449 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
464 15:43:51.880978 In relocation handler: CPU 0
465 15:43:51.884397 New SMBASE=0x7b000000 IEDBASE=0x7b400000
466 15:43:51.891113 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 15:43:51.891204 Relocation complete.
468 15:43:51.900657 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
469 15:43:51.900756 In relocation handler: CPU 1
470 15:43:51.907401 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
471 15:43:51.907500 Relocation complete.
472 15:43:51.917403 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
473 15:43:51.917494 In relocation handler: CPU 5
474 15:43:51.924269 New SMBASE=0x7affec00 IEDBASE=0x7b400000
475 15:43:51.924361 Relocation complete.
476 15:43:51.934226 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
477 15:43:51.934355 In relocation handler: CPU 2
478 15:43:51.940644 New SMBASE=0x7afff800 IEDBASE=0x7b400000
479 15:43:51.943930 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 15:43:51.947325 Relocation complete.
481 15:43:51.953885 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
482 15:43:51.957236 In relocation handler: CPU 7
483 15:43:51.960526 New SMBASE=0x7affe400 IEDBASE=0x7b400000
484 15:43:51.963871 Relocation complete.
485 15:43:51.970377 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
486 15:43:51.973997 In relocation handler: CPU 4
487 15:43:51.977227 New SMBASE=0x7afff000 IEDBASE=0x7b400000
488 15:43:51.983666 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 15:43:51.983768 Relocation complete.
490 15:43:51.990537 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
491 15:43:51.993751 In relocation handler: CPU 6
492 15:43:52.000441 New SMBASE=0x7affe800 IEDBASE=0x7b400000
493 15:43:52.003798 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 15:43:52.006884 Relocation complete.
495 15:43:52.013719 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
496 15:43:52.016717 In relocation handler: CPU 3
497 15:43:52.020974 New SMBASE=0x7afff400 IEDBASE=0x7b400000
498 15:43:52.021065 Relocation complete.
499 15:43:52.024417 Initializing CPU #0
500 15:43:52.027820 CPU: vendor Intel device 806c1
501 15:43:52.031088 CPU: family 06, model 8c, stepping 01
502 15:43:52.034452 Clearing out pending MCEs
503 15:43:52.037651 Setting up local APIC...
504 15:43:52.037753 apic_id: 0x00 done.
505 15:43:52.041015 Turbo is available but hidden
506 15:43:52.044312 Turbo is available and visible
507 15:43:52.050840 microcode: Update skipped, already up-to-date
508 15:43:52.050949 CPU #0 initialized
509 15:43:52.054385 Initializing CPU #5
510 15:43:52.057550 Initializing CPU #2
511 15:43:52.057638 CPU: vendor Intel device 806c1
512 15:43:52.064456 CPU: family 06, model 8c, stepping 01
513 15:43:52.067458 CPU: vendor Intel device 806c1
514 15:43:52.070873 CPU: family 06, model 8c, stepping 01
515 15:43:52.074054 Clearing out pending MCEs
516 15:43:52.074137 Clearing out pending MCEs
517 15:43:52.077169 Setting up local APIC...
518 15:43:52.080481 Initializing CPU #3
519 15:43:52.080563 Initializing CPU #6
520 15:43:52.084034 CPU: vendor Intel device 806c1
521 15:43:52.087201 CPU: family 06, model 8c, stepping 01
522 15:43:52.090524 CPU: vendor Intel device 806c1
523 15:43:52.097575 CPU: family 06, model 8c, stepping 01
524 15:43:52.097676 Clearing out pending MCEs
525 15:43:52.100572 Clearing out pending MCEs
526 15:43:52.103805 Setting up local APIC...
527 15:43:52.107290 Initializing CPU #7
528 15:43:52.107384 Initializing CPU #4
529 15:43:52.110255 CPU: vendor Intel device 806c1
530 15:43:52.113698 CPU: family 06, model 8c, stepping 01
531 15:43:52.116930 CPU: vendor Intel device 806c1
532 15:43:52.120316 CPU: family 06, model 8c, stepping 01
533 15:43:52.123707 Clearing out pending MCEs
534 15:43:52.126640 Clearing out pending MCEs
535 15:43:52.130166 Setting up local APIC...
536 15:43:52.130271 Setting up local APIC...
537 15:43:52.133599 apic_id: 0x07 done.
538 15:43:52.136988 Setting up local APIC...
539 15:43:52.140139 apic_id: 0x02 done.
540 15:43:52.140226 apic_id: 0x03 done.
541 15:43:52.146867 microcode: Update skipped, already up-to-date
542 15:43:52.150047 microcode: Update skipped, already up-to-date
543 15:43:52.153217 apic_id: 0x06 done.
544 15:43:52.156518 microcode: Update skipped, already up-to-date
545 15:43:52.160148 microcode: Update skipped, already up-to-date
546 15:43:52.163266 CPU #3 initialized
547 15:43:52.166717 CPU #6 initialized
548 15:43:52.166795 CPU #2 initialized
549 15:43:52.169982 CPU #5 initialized
550 15:43:52.170055 apic_id: 0x05 done.
551 15:43:52.173236 Setting up local APIC...
552 15:43:52.176535 Initializing CPU #1
553 15:43:52.176616 apic_id: 0x04 done.
554 15:43:52.183062 microcode: Update skipped, already up-to-date
555 15:43:52.186627 microcode: Update skipped, already up-to-date
556 15:43:52.190058 CPU #7 initialized
557 15:43:52.190135 CPU #4 initialized
558 15:43:52.193429 CPU: vendor Intel device 806c1
559 15:43:52.196798 CPU: family 06, model 8c, stepping 01
560 15:43:52.199999 Clearing out pending MCEs
561 15:43:52.202985 Setting up local APIC...
562 15:43:52.206494 apic_id: 0x01 done.
563 15:43:52.209948 microcode: Update skipped, already up-to-date
564 15:43:52.212833 CPU #1 initialized
565 15:43:52.216389 bsp_do_flight_plan done after 455 msecs.
566 15:43:52.219732 CPU: frequency set to 4000 MHz
567 15:43:52.219807 Enabling SMIs.
568 15:43:52.226161 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
569 15:43:52.243347 SATAXPCIE1 indicates PCIe NVMe is present
570 15:43:52.246772 Probing TPM: done!
571 15:43:52.250345 Connected to device vid:did:rid of 1ae0:0028:00
572 15:43:52.260674 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
573 15:43:52.264000 Initialized TPM device CR50 revision 0
574 15:43:52.267626 Enabling S0i3.4
575 15:43:52.274449 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
576 15:43:52.277448 Found a VBT of 8704 bytes after decompression
577 15:43:52.284102 cse_lite: CSE RO boot. HybridStorageMode disabled
578 15:43:52.290920 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
579 15:43:52.367464 FSPS returned 0
580 15:43:52.370903 Executing Phase 1 of FspMultiPhaseSiInit
581 15:43:52.380450 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
582 15:43:52.383833 port C0 DISC req: usage 1 usb3 1 usb2 5
583 15:43:52.387100 Raw Buffer output 0 00000511
584 15:43:52.390467 Raw Buffer output 1 00000000
585 15:43:52.394129 pmc_send_ipc_cmd succeeded
586 15:43:52.401017 port C1 DISC req: usage 1 usb3 2 usb2 3
587 15:43:52.401100 Raw Buffer output 0 00000321
588 15:43:52.404381 Raw Buffer output 1 00000000
589 15:43:52.408220 pmc_send_ipc_cmd succeeded
590 15:43:52.413329 Detected 4 core, 8 thread CPU.
591 15:43:52.416831 Detected 4 core, 8 thread CPU.
592 15:43:52.650830 Display FSP Version Info HOB
593 15:43:52.653831 Reference Code - CPU = a.0.4c.31
594 15:43:52.657240 uCode Version = 0.0.0.86
595 15:43:52.660517 TXT ACM version = ff.ff.ff.ffff
596 15:43:52.663951 Reference Code - ME = a.0.4c.31
597 15:43:52.667201 MEBx version = 0.0.0.0
598 15:43:52.670583 ME Firmware Version = Consumer SKU
599 15:43:52.674215 Reference Code - PCH = a.0.4c.31
600 15:43:52.677385 PCH-CRID Status = Disabled
601 15:43:52.680560 PCH-CRID Original Value = ff.ff.ff.ffff
602 15:43:52.684114 PCH-CRID New Value = ff.ff.ff.ffff
603 15:43:52.687373 OPROM - RST - RAID = ff.ff.ff.ffff
604 15:43:52.690705 PCH Hsio Version = 4.0.0.0
605 15:43:52.693958 Reference Code - SA - System Agent = a.0.4c.31
606 15:43:52.697163 Reference Code - MRC = 2.0.0.1
607 15:43:52.700396 SA - PCIe Version = a.0.4c.31
608 15:43:52.703750 SA-CRID Status = Disabled
609 15:43:52.707072 SA-CRID Original Value = 0.0.0.1
610 15:43:52.710346 SA-CRID New Value = 0.0.0.1
611 15:43:52.713793 OPROM - VBIOS = ff.ff.ff.ffff
612 15:43:52.717120 IO Manageability Engine FW Version = 11.1.4.0
613 15:43:52.720733 PHY Build Version = 0.0.0.e0
614 15:43:52.723771 Thunderbolt(TM) FW Version = 0.0.0.0
615 15:43:52.730453 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
616 15:43:52.733632 ITSS IRQ Polarities Before:
617 15:43:52.733742 IPC0: 0xffffffff
618 15:43:52.737185 IPC1: 0xffffffff
619 15:43:52.737270 IPC2: 0xffffffff
620 15:43:52.740833 IPC3: 0xffffffff
621 15:43:52.743740 ITSS IRQ Polarities After:
622 15:43:52.743841 IPC0: 0xffffffff
623 15:43:52.747130 IPC1: 0xffffffff
624 15:43:52.747208 IPC2: 0xffffffff
625 15:43:52.750169 IPC3: 0xffffffff
626 15:43:52.753599 Found PCIe Root Port #9 at PCI: 00:1d.0.
627 15:43:52.767061 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
628 15:43:52.776708 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
629 15:43:52.789954 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
630 15:43:52.796603 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
631 15:43:52.799965 Enumerating buses...
632 15:43:52.803336 Show all devs... Before device enumeration.
633 15:43:52.806938 Root Device: enabled 1
634 15:43:52.807022 DOMAIN: 0000: enabled 1
635 15:43:52.809951 CPU_CLUSTER: 0: enabled 1
636 15:43:52.813234 PCI: 00:00.0: enabled 1
637 15:43:52.816476 PCI: 00:02.0: enabled 1
638 15:43:52.816560 PCI: 00:04.0: enabled 1
639 15:43:52.819841 PCI: 00:05.0: enabled 1
640 15:43:52.823055 PCI: 00:06.0: enabled 0
641 15:43:52.823139 PCI: 00:07.0: enabled 0
642 15:43:52.826685 PCI: 00:07.1: enabled 0
643 15:43:52.829901 PCI: 00:07.2: enabled 0
644 15:43:52.833506 PCI: 00:07.3: enabled 0
645 15:43:52.833591 PCI: 00:08.0: enabled 1
646 15:43:52.836540 PCI: 00:09.0: enabled 0
647 15:43:52.839756 PCI: 00:0a.0: enabled 0
648 15:43:52.843235 PCI: 00:0d.0: enabled 1
649 15:43:52.843318 PCI: 00:0d.1: enabled 0
650 15:43:52.846562 PCI: 00:0d.2: enabled 0
651 15:43:52.849896 PCI: 00:0d.3: enabled 0
652 15:43:52.853125 PCI: 00:0e.0: enabled 0
653 15:43:52.853209 PCI: 00:10.2: enabled 1
654 15:43:52.856320 PCI: 00:10.6: enabled 0
655 15:43:52.859571 PCI: 00:10.7: enabled 0
656 15:43:52.863042 PCI: 00:12.0: enabled 0
657 15:43:52.863127 PCI: 00:12.6: enabled 0
658 15:43:52.866320 PCI: 00:13.0: enabled 0
659 15:43:52.869558 PCI: 00:14.0: enabled 1
660 15:43:52.869644 PCI: 00:14.1: enabled 0
661 15:43:52.873121 PCI: 00:14.2: enabled 1
662 15:43:52.876344 PCI: 00:14.3: enabled 1
663 15:43:52.879559 PCI: 00:15.0: enabled 1
664 15:43:52.879643 PCI: 00:15.1: enabled 1
665 15:43:52.883000 PCI: 00:15.2: enabled 1
666 15:43:52.886126 PCI: 00:15.3: enabled 1
667 15:43:52.889459 PCI: 00:16.0: enabled 1
668 15:43:52.889544 PCI: 00:16.1: enabled 0
669 15:43:52.892984 PCI: 00:16.2: enabled 0
670 15:43:52.896273 PCI: 00:16.3: enabled 0
671 15:43:52.899478 PCI: 00:16.4: enabled 0
672 15:43:52.899564 PCI: 00:16.5: enabled 0
673 15:43:52.902690 PCI: 00:17.0: enabled 1
674 15:43:52.906212 PCI: 00:19.0: enabled 0
675 15:43:52.909682 PCI: 00:19.1: enabled 1
676 15:43:52.909771 PCI: 00:19.2: enabled 0
677 15:43:52.912714 PCI: 00:1c.0: enabled 1
678 15:43:52.916431 PCI: 00:1c.1: enabled 0
679 15:43:52.916518 PCI: 00:1c.2: enabled 0
680 15:43:52.919369 PCI: 00:1c.3: enabled 0
681 15:43:52.922642 PCI: 00:1c.4: enabled 0
682 15:43:52.925884 PCI: 00:1c.5: enabled 0
683 15:43:52.925969 PCI: 00:1c.6: enabled 1
684 15:43:52.929428 PCI: 00:1c.7: enabled 0
685 15:43:52.932776 PCI: 00:1d.0: enabled 1
686 15:43:52.935789 PCI: 00:1d.1: enabled 0
687 15:43:52.935917 PCI: 00:1d.2: enabled 1
688 15:43:52.939162 PCI: 00:1d.3: enabled 0
689 15:43:52.942546 PCI: 00:1e.0: enabled 1
690 15:43:52.946297 PCI: 00:1e.1: enabled 0
691 15:43:52.946389 PCI: 00:1e.2: enabled 1
692 15:43:52.949291 PCI: 00:1e.3: enabled 1
693 15:43:52.952521 PCI: 00:1f.0: enabled 1
694 15:43:52.955782 PCI: 00:1f.1: enabled 0
695 15:43:52.955927 PCI: 00:1f.2: enabled 1
696 15:43:52.959234 PCI: 00:1f.3: enabled 1
697 15:43:52.962407 PCI: 00:1f.4: enabled 0
698 15:43:52.962494 PCI: 00:1f.5: enabled 1
699 15:43:52.966024 PCI: 00:1f.6: enabled 0
700 15:43:52.969026 PCI: 00:1f.7: enabled 0
701 15:43:52.972624 APIC: 00: enabled 1
702 15:43:52.972710 GENERIC: 0.0: enabled 1
703 15:43:52.975791 GENERIC: 0.0: enabled 1
704 15:43:52.979330 GENERIC: 1.0: enabled 1
705 15:43:52.982715 GENERIC: 0.0: enabled 1
706 15:43:52.982804 GENERIC: 1.0: enabled 1
707 15:43:52.985472 USB0 port 0: enabled 1
708 15:43:52.988813 GENERIC: 0.0: enabled 1
709 15:43:52.988899 USB0 port 0: enabled 1
710 15:43:52.992577 GENERIC: 0.0: enabled 1
711 15:43:52.995770 I2C: 00:1a: enabled 1
712 15:43:52.999438 I2C: 00:31: enabled 1
713 15:43:52.999524 I2C: 00:32: enabled 1
714 15:43:53.002273 I2C: 00:10: enabled 1
715 15:43:53.005760 I2C: 00:15: enabled 1
716 15:43:53.005863 GENERIC: 0.0: enabled 0
717 15:43:53.009353 GENERIC: 1.0: enabled 0
718 15:43:53.012264 GENERIC: 0.0: enabled 1
719 15:43:53.012352 SPI: 00: enabled 1
720 15:43:53.015878 SPI: 00: enabled 1
721 15:43:53.018962 PNP: 0c09.0: enabled 1
722 15:43:53.019051 GENERIC: 0.0: enabled 1
723 15:43:53.022286 USB3 port 0: enabled 1
724 15:43:53.025451 USB3 port 1: enabled 1
725 15:43:53.025536 USB3 port 2: enabled 0
726 15:43:53.028882 USB3 port 3: enabled 0
727 15:43:53.032114 USB2 port 0: enabled 0
728 15:43:53.035785 USB2 port 1: enabled 1
729 15:43:53.035879 USB2 port 2: enabled 1
730 15:43:53.038989 USB2 port 3: enabled 0
731 15:43:53.042079 USB2 port 4: enabled 1
732 15:43:53.042163 USB2 port 5: enabled 0
733 15:43:53.045331 USB2 port 6: enabled 0
734 15:43:53.048745 USB2 port 7: enabled 0
735 15:43:53.052327 USB2 port 8: enabled 0
736 15:43:53.052412 USB2 port 9: enabled 0
737 15:43:53.055557 USB3 port 0: enabled 0
738 15:43:53.058853 USB3 port 1: enabled 1
739 15:43:53.058939 USB3 port 2: enabled 0
740 15:43:53.061897 USB3 port 3: enabled 0
741 15:43:53.065363 GENERIC: 0.0: enabled 1
742 15:43:53.068640 GENERIC: 1.0: enabled 1
743 15:43:53.068725 APIC: 01: enabled 1
744 15:43:53.071800 APIC: 02: enabled 1
745 15:43:53.071904 APIC: 07: enabled 1
746 15:43:53.075310 APIC: 04: enabled 1
747 15:43:53.078487 APIC: 03: enabled 1
748 15:43:53.078574 APIC: 06: enabled 1
749 15:43:53.081984 APIC: 05: enabled 1
750 15:43:53.085369 Compare with tree...
751 15:43:53.085454 Root Device: enabled 1
752 15:43:53.088421 DOMAIN: 0000: enabled 1
753 15:43:53.091782 PCI: 00:00.0: enabled 1
754 15:43:53.095414 PCI: 00:02.0: enabled 1
755 15:43:53.095498 PCI: 00:04.0: enabled 1
756 15:43:53.098590 GENERIC: 0.0: enabled 1
757 15:43:53.101678 PCI: 00:05.0: enabled 1
758 15:43:53.105054 PCI: 00:06.0: enabled 0
759 15:43:53.108479 PCI: 00:07.0: enabled 0
760 15:43:53.108563 GENERIC: 0.0: enabled 1
761 15:43:53.111955 PCI: 00:07.1: enabled 0
762 15:43:53.115183 GENERIC: 1.0: enabled 1
763 15:43:53.118334 PCI: 00:07.2: enabled 0
764 15:43:53.121721 GENERIC: 0.0: enabled 1
765 15:43:53.121805 PCI: 00:07.3: enabled 0
766 15:43:53.124943 GENERIC: 1.0: enabled 1
767 15:43:53.128228 PCI: 00:08.0: enabled 1
768 15:43:53.131648 PCI: 00:09.0: enabled 0
769 15:43:53.134869 PCI: 00:0a.0: enabled 0
770 15:43:53.134953 PCI: 00:0d.0: enabled 1
771 15:43:53.138286 USB0 port 0: enabled 1
772 15:43:53.141526 USB3 port 0: enabled 1
773 15:43:53.144840 USB3 port 1: enabled 1
774 15:43:53.148209 USB3 port 2: enabled 0
775 15:43:53.151583 USB3 port 3: enabled 0
776 15:43:53.151668 PCI: 00:0d.1: enabled 0
777 15:43:53.154860 PCI: 00:0d.2: enabled 0
778 15:43:53.158119 GENERIC: 0.0: enabled 1
779 15:43:53.161532 PCI: 00:0d.3: enabled 0
780 15:43:53.164685 PCI: 00:0e.0: enabled 0
781 15:43:53.164770 PCI: 00:10.2: enabled 1
782 15:43:53.168285 PCI: 00:10.6: enabled 0
783 15:43:53.171354 PCI: 00:10.7: enabled 0
784 15:43:53.174733 PCI: 00:12.0: enabled 0
785 15:43:53.177995 PCI: 00:12.6: enabled 0
786 15:43:53.178081 PCI: 00:13.0: enabled 0
787 15:43:53.181433 PCI: 00:14.0: enabled 1
788 15:43:53.184750 USB0 port 0: enabled 1
789 15:43:53.188225 USB2 port 0: enabled 0
790 15:43:53.191373 USB2 port 1: enabled 1
791 15:43:53.191459 USB2 port 2: enabled 1
792 15:43:53.194639 USB2 port 3: enabled 0
793 15:43:53.197953 USB2 port 4: enabled 1
794 15:43:53.201362 USB2 port 5: enabled 0
795 15:43:53.204709 USB2 port 6: enabled 0
796 15:43:53.208111 USB2 port 7: enabled 0
797 15:43:53.208196 USB2 port 8: enabled 0
798 15:43:53.211539 USB2 port 9: enabled 0
799 15:43:53.214878 USB3 port 0: enabled 0
800 15:43:53.217955 USB3 port 1: enabled 1
801 15:43:53.221250 USB3 port 2: enabled 0
802 15:43:53.221337 USB3 port 3: enabled 0
803 15:43:53.224660 PCI: 00:14.1: enabled 0
804 15:43:53.227990 PCI: 00:14.2: enabled 1
805 15:43:53.231286 PCI: 00:14.3: enabled 1
806 15:43:53.234778 GENERIC: 0.0: enabled 1
807 15:43:53.234875 PCI: 00:15.0: enabled 1
808 15:43:53.237871 I2C: 00:1a: enabled 1
809 15:43:53.241533 I2C: 00:31: enabled 1
810 15:43:53.244391 I2C: 00:32: enabled 1
811 15:43:53.247778 PCI: 00:15.1: enabled 1
812 15:43:53.247897 I2C: 00:10: enabled 1
813 15:43:53.251165 PCI: 00:15.2: enabled 1
814 15:43:53.255179 PCI: 00:15.3: enabled 1
815 15:43:53.257647 PCI: 00:16.0: enabled 1
816 15:43:53.257730 PCI: 00:16.1: enabled 0
817 15:43:53.262313 PCI: 00:16.2: enabled 0
818 15:43:53.265530 PCI: 00:16.3: enabled 0
819 15:43:53.269329 PCI: 00:16.4: enabled 0
820 15:43:53.269413 PCI: 00:16.5: enabled 0
821 15:43:53.272496 PCI: 00:17.0: enabled 1
822 15:43:53.275802 PCI: 00:19.0: enabled 0
823 15:43:53.279169 PCI: 00:19.1: enabled 1
824 15:43:53.279253 I2C: 00:15: enabled 1
825 15:43:53.282348 PCI: 00:19.2: enabled 0
826 15:43:53.286090 PCI: 00:1d.0: enabled 1
827 15:43:53.289087 GENERIC: 0.0: enabled 1
828 15:43:53.292493 PCI: 00:1e.0: enabled 1
829 15:43:53.292577 PCI: 00:1e.1: enabled 0
830 15:43:53.295647 PCI: 00:1e.2: enabled 1
831 15:43:53.345935 SPI: 00: enabled 1
832 15:43:53.346062 PCI: 00:1e.3: enabled 1
833 15:43:53.346167 SPI: 00: enabled 1
834 15:43:53.346424 PCI: 00:1f.0: enabled 1
835 15:43:53.346490 PNP: 0c09.0: enabled 1
836 15:43:53.346576 PCI: 00:1f.1: enabled 0
837 15:43:53.346673 PCI: 00:1f.2: enabled 1
838 15:43:53.346931 GENERIC: 0.0: enabled 1
839 15:43:53.346994 GENERIC: 0.0: enabled 1
840 15:43:53.347051 GENERIC: 1.0: enabled 1
841 15:43:53.347107 PCI: 00:1f.3: enabled 1
842 15:43:53.347163 PCI: 00:1f.4: enabled 0
843 15:43:53.347436 PCI: 00:1f.5: enabled 1
844 15:43:53.347517 PCI: 00:1f.6: enabled 0
845 15:43:53.347818 PCI: 00:1f.7: enabled 0
846 15:43:53.347900 CPU_CLUSTER: 0: enabled 1
847 15:43:53.347957 APIC: 00: enabled 1
848 15:43:53.348012 APIC: 01: enabled 1
849 15:43:53.348067 APIC: 02: enabled 1
850 15:43:53.348122 APIC: 07: enabled 1
851 15:43:53.397767 APIC: 04: enabled 1
852 15:43:53.397919 APIC: 03: enabled 1
853 15:43:53.398195 APIC: 06: enabled 1
854 15:43:53.398267 APIC: 05: enabled 1
855 15:43:53.398328 Root Device scanning...
856 15:43:53.398387 scan_static_bus for Root Device
857 15:43:53.398445 DOMAIN: 0000 enabled
858 15:43:53.398687 CPU_CLUSTER: 0 enabled
859 15:43:53.398750 DOMAIN: 0000 scanning...
860 15:43:53.398807 PCI: pci_scan_bus for bus 00
861 15:43:53.399049 PCI: 00:00.0 [8086/0000] ops
862 15:43:53.399116 PCI: 00:00.0 [8086/9a12] enabled
863 15:43:53.399357 PCI: 00:02.0 [8086/0000] bus ops
864 15:43:53.399420 PCI: 00:02.0 [8086/9a40] enabled
865 15:43:53.399658 PCI: 00:04.0 [8086/0000] bus ops
866 15:43:53.399905 PCI: 00:04.0 [8086/9a03] enabled
867 15:43:53.399971 PCI: 00:05.0 [8086/9a19] enabled
868 15:43:53.405258 PCI: 00:07.0 [0000/0000] hidden
869 15:43:53.405344 PCI: 00:08.0 [8086/9a11] enabled
870 15:43:53.408346 PCI: 00:0a.0 [8086/9a0d] disabled
871 15:43:53.411588 PCI: 00:0d.0 [8086/0000] bus ops
872 15:43:53.414920 PCI: 00:0d.0 [8086/9a13] enabled
873 15:43:53.418164 PCI: 00:14.0 [8086/0000] bus ops
874 15:43:53.421564 PCI: 00:14.0 [8086/a0ed] enabled
875 15:43:53.424964 PCI: 00:14.2 [8086/a0ef] enabled
876 15:43:53.428547 PCI: 00:14.3 [8086/0000] bus ops
877 15:43:53.431775 PCI: 00:14.3 [8086/a0f0] enabled
878 15:43:53.434982 PCI: 00:15.0 [8086/0000] bus ops
879 15:43:53.438296 PCI: 00:15.0 [8086/a0e8] enabled
880 15:43:53.441653 PCI: 00:15.1 [8086/0000] bus ops
881 15:43:53.444739 PCI: 00:15.1 [8086/a0e9] enabled
882 15:43:53.448186 PCI: 00:15.2 [8086/0000] bus ops
883 15:43:53.451449 PCI: 00:15.2 [8086/a0ea] enabled
884 15:43:53.454635 PCI: 00:15.3 [8086/0000] bus ops
885 15:43:53.458144 PCI: 00:15.3 [8086/a0eb] enabled
886 15:43:53.461432 PCI: 00:16.0 [8086/0000] ops
887 15:43:53.464828 PCI: 00:16.0 [8086/a0e0] enabled
888 15:43:53.468141 PCI: Static device PCI: 00:17.0 not found, disabling it.
889 15:43:53.471214 PCI: 00:19.0 [8086/0000] bus ops
890 15:43:53.474613 PCI: 00:19.0 [8086/a0c5] disabled
891 15:43:53.477749 PCI: 00:19.1 [8086/0000] bus ops
892 15:43:53.481054 PCI: 00:19.1 [8086/a0c6] enabled
893 15:43:53.484513 PCI: 00:1d.0 [8086/0000] bus ops
894 15:43:53.487623 PCI: 00:1d.0 [8086/a0b0] enabled
895 15:43:53.491276 PCI: 00:1e.0 [8086/0000] ops
896 15:43:53.494701 PCI: 00:1e.0 [8086/a0a8] enabled
897 15:43:53.497844 PCI: 00:1e.2 [8086/0000] bus ops
898 15:43:53.501157 PCI: 00:1e.2 [8086/a0aa] enabled
899 15:43:53.504538 PCI: 00:1e.3 [8086/0000] bus ops
900 15:43:53.507954 PCI: 00:1e.3 [8086/a0ab] enabled
901 15:43:53.510915 PCI: 00:1f.0 [8086/0000] bus ops
902 15:43:53.514443 PCI: 00:1f.0 [8086/a087] enabled
903 15:43:53.517584 RTC Init
904 15:43:53.521128 Set power on after power failure.
905 15:43:53.521219 Disabling Deep S3
906 15:43:53.524328 Disabling Deep S3
907 15:43:53.524412 Disabling Deep S4
908 15:43:53.527661 Disabling Deep S4
909 15:43:53.531110 Disabling Deep S5
910 15:43:53.531195 Disabling Deep S5
911 15:43:53.534314 PCI: 00:1f.2 [0000/0000] hidden
912 15:43:53.537576 PCI: 00:1f.3 [8086/0000] bus ops
913 15:43:53.541033 PCI: 00:1f.3 [8086/a0c8] enabled
914 15:43:53.544328 PCI: 00:1f.5 [8086/0000] bus ops
915 15:43:53.547494 PCI: 00:1f.5 [8086/a0a4] enabled
916 15:43:53.550851 PCI: Leftover static devices:
917 15:43:53.550937 PCI: 00:10.2
918 15:43:53.554518 PCI: 00:10.6
919 15:43:53.554603 PCI: 00:10.7
920 15:43:53.557635 PCI: 00:06.0
921 15:43:53.557718 PCI: 00:07.1
922 15:43:53.557784 PCI: 00:07.2
923 15:43:53.560855 PCI: 00:07.3
924 15:43:53.560938 PCI: 00:09.0
925 15:43:53.564192 PCI: 00:0d.1
926 15:43:53.564275 PCI: 00:0d.2
927 15:43:53.567527 PCI: 00:0d.3
928 15:43:53.567621 PCI: 00:0e.0
929 15:43:53.567688 PCI: 00:12.0
930 15:43:53.570841 PCI: 00:12.6
931 15:43:53.570926 PCI: 00:13.0
932 15:43:53.574398 PCI: 00:14.1
933 15:43:53.574481 PCI: 00:16.1
934 15:43:53.574547 PCI: 00:16.2
935 15:43:53.577549 PCI: 00:16.3
936 15:43:53.577633 PCI: 00:16.4
937 15:43:53.580819 PCI: 00:16.5
938 15:43:53.580904 PCI: 00:17.0
939 15:43:53.580969 PCI: 00:19.2
940 15:43:53.584087 PCI: 00:1e.1
941 15:43:53.584171 PCI: 00:1f.1
942 15:43:53.587481 PCI: 00:1f.4
943 15:43:53.587565 PCI: 00:1f.6
944 15:43:53.590706 PCI: 00:1f.7
945 15:43:53.590789 PCI: Check your devicetree.cb.
946 15:43:53.594535 PCI: 00:02.0 scanning...
947 15:43:53.597360 scan_generic_bus for PCI: 00:02.0
948 15:43:53.604224 scan_generic_bus for PCI: 00:02.0 done
949 15:43:53.607332 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
950 15:43:53.610541 PCI: 00:04.0 scanning...
951 15:43:53.614036 scan_generic_bus for PCI: 00:04.0
952 15:43:53.617521 GENERIC: 0.0 enabled
953 15:43:53.620510 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
954 15:43:53.627322 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
955 15:43:53.630629 PCI: 00:0d.0 scanning...
956 15:43:53.633656 scan_static_bus for PCI: 00:0d.0
957 15:43:53.633742 USB0 port 0 enabled
958 15:43:53.637111 USB0 port 0 scanning...
959 15:43:53.640246 scan_static_bus for USB0 port 0
960 15:43:53.643734 USB3 port 0 enabled
961 15:43:53.643821 USB3 port 1 enabled
962 15:43:53.646963 USB3 port 2 disabled
963 15:43:53.650519 USB3 port 3 disabled
964 15:43:53.650605 USB3 port 0 scanning...
965 15:43:53.653830 scan_static_bus for USB3 port 0
966 15:43:53.657161 scan_static_bus for USB3 port 0 done
967 15:43:53.663622 scan_bus: bus USB3 port 0 finished in 6 msecs
968 15:43:53.666788 USB3 port 1 scanning...
969 15:43:53.670387 scan_static_bus for USB3 port 1
970 15:43:53.673672 scan_static_bus for USB3 port 1 done
971 15:43:53.676958 scan_bus: bus USB3 port 1 finished in 6 msecs
972 15:43:53.680062 scan_static_bus for USB0 port 0 done
973 15:43:53.686977 scan_bus: bus USB0 port 0 finished in 43 msecs
974 15:43:53.689989 scan_static_bus for PCI: 00:0d.0 done
975 15:43:53.693563 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
976 15:43:53.696803 PCI: 00:14.0 scanning...
977 15:43:53.700154 scan_static_bus for PCI: 00:14.0
978 15:43:53.703293 USB0 port 0 enabled
979 15:43:53.703380 USB0 port 0 scanning...
980 15:43:53.707003 scan_static_bus for USB0 port 0
981 15:43:53.710379 USB2 port 0 disabled
982 15:43:53.713392 USB2 port 1 enabled
983 15:43:53.713478 USB2 port 2 enabled
984 15:43:53.716746 USB2 port 3 disabled
985 15:43:53.720122 USB2 port 4 enabled
986 15:43:53.720209 USB2 port 5 disabled
987 15:43:53.723307 USB2 port 6 disabled
988 15:43:53.726967 USB2 port 7 disabled
989 15:43:53.727053 USB2 port 8 disabled
990 15:43:53.730260 USB2 port 9 disabled
991 15:43:53.730347 USB3 port 0 disabled
992 15:43:53.733290 USB3 port 1 enabled
993 15:43:53.736776 USB3 port 2 disabled
994 15:43:53.736863 USB3 port 3 disabled
995 15:43:53.739816 USB2 port 1 scanning...
996 15:43:53.743253 scan_static_bus for USB2 port 1
997 15:43:53.746569 scan_static_bus for USB2 port 1 done
998 15:43:53.753351 scan_bus: bus USB2 port 1 finished in 6 msecs
999 15:43:53.753437 USB2 port 2 scanning...
1000 15:43:53.756730 scan_static_bus for USB2 port 2
1001 15:43:53.763266 scan_static_bus for USB2 port 2 done
1002 15:43:53.766664 scan_bus: bus USB2 port 2 finished in 6 msecs
1003 15:43:53.769867 USB2 port 4 scanning...
1004 15:43:53.773191 scan_static_bus for USB2 port 4
1005 15:43:53.776401 scan_static_bus for USB2 port 4 done
1006 15:43:53.779656 scan_bus: bus USB2 port 4 finished in 6 msecs
1007 15:43:53.782938 USB3 port 1 scanning...
1008 15:43:53.786258 scan_static_bus for USB3 port 1
1009 15:43:53.789969 scan_static_bus for USB3 port 1 done
1010 15:43:53.796493 scan_bus: bus USB3 port 1 finished in 6 msecs
1011 15:43:53.799786 scan_static_bus for USB0 port 0 done
1012 15:43:53.802801 scan_bus: bus USB0 port 0 finished in 93 msecs
1013 15:43:53.806036 scan_static_bus for PCI: 00:14.0 done
1014 15:43:53.812897 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1015 15:43:53.816113 PCI: 00:14.3 scanning...
1016 15:43:53.819250 scan_static_bus for PCI: 00:14.3
1017 15:43:53.819341 GENERIC: 0.0 enabled
1018 15:43:53.822792 scan_static_bus for PCI: 00:14.3 done
1019 15:43:53.829415 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1020 15:43:53.832868 PCI: 00:15.0 scanning...
1021 15:43:53.835810 scan_static_bus for PCI: 00:15.0
1022 15:43:53.835924 I2C: 00:1a enabled
1023 15:43:53.839975 I2C: 00:31 enabled
1024 15:43:53.840061 I2C: 00:32 enabled
1025 15:43:53.843268 scan_static_bus for PCI: 00:15.0 done
1026 15:43:53.849826 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1027 15:43:53.853053 PCI: 00:15.1 scanning...
1028 15:43:53.856431 scan_static_bus for PCI: 00:15.1
1029 15:43:53.856517 I2C: 00:10 enabled
1030 15:43:53.859887 scan_static_bus for PCI: 00:15.1 done
1031 15:43:53.866332 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1032 15:43:53.869722 PCI: 00:15.2 scanning...
1033 15:43:53.873079 scan_static_bus for PCI: 00:15.2
1034 15:43:53.876400 scan_static_bus for PCI: 00:15.2 done
1035 15:43:53.879566 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1036 15:43:53.883017 PCI: 00:15.3 scanning...
1037 15:43:53.886320 scan_static_bus for PCI: 00:15.3
1038 15:43:53.890002 scan_static_bus for PCI: 00:15.3 done
1039 15:43:53.896192 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1040 15:43:53.896279 PCI: 00:19.1 scanning...
1041 15:43:53.899547 scan_static_bus for PCI: 00:19.1
1042 15:43:53.903055 I2C: 00:15 enabled
1043 15:43:53.906255 scan_static_bus for PCI: 00:19.1 done
1044 15:43:53.913051 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1045 15:43:53.913160 PCI: 00:1d.0 scanning...
1046 15:43:53.919531 do_pci_scan_bridge for PCI: 00:1d.0
1047 15:43:53.919635 PCI: pci_scan_bus for bus 01
1048 15:43:53.923152 PCI: 01:00.0 [1c5c/174a] enabled
1049 15:43:53.926571 GENERIC: 0.0 enabled
1050 15:43:53.929906 Enabling Common Clock Configuration
1051 15:43:53.936140 L1 Sub-State supported from root port 29
1052 15:43:53.936471 L1 Sub-State Support = 0xf
1053 15:43:53.940005 CommonModeRestoreTime = 0x28
1054 15:43:53.946174 Power On Value = 0x16, Power On Scale = 0x0
1055 15:43:53.946509 ASPM: Enabled L1
1056 15:43:53.949931 PCIe: Max_Payload_Size adjusted to 128
1057 15:43:53.956738 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1058 15:43:53.957147 PCI: 00:1e.2 scanning...
1059 15:43:53.963326 scan_generic_bus for PCI: 00:1e.2
1060 15:43:53.963832 SPI: 00 enabled
1061 15:43:53.969982 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1062 15:43:53.973590 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1063 15:43:53.976721 PCI: 00:1e.3 scanning...
1064 15:43:53.979700 scan_generic_bus for PCI: 00:1e.3
1065 15:43:53.983183 SPI: 00 enabled
1066 15:43:53.986812 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1067 15:43:53.993226 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1068 15:43:53.996585 PCI: 00:1f.0 scanning...
1069 15:43:53.999991 scan_static_bus for PCI: 00:1f.0
1070 15:43:54.000516 PNP: 0c09.0 enabled
1071 15:43:54.003052 PNP: 0c09.0 scanning...
1072 15:43:54.006480 scan_static_bus for PNP: 0c09.0
1073 15:43:54.010030 scan_static_bus for PNP: 0c09.0 done
1074 15:43:54.016363 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1075 15:43:54.019671 scan_static_bus for PCI: 00:1f.0 done
1076 15:43:54.022689 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1077 15:43:54.026290 PCI: 00:1f.2 scanning...
1078 15:43:54.030089 scan_static_bus for PCI: 00:1f.2
1079 15:43:54.033228 GENERIC: 0.0 enabled
1080 15:43:54.036175 GENERIC: 0.0 scanning...
1081 15:43:54.040314 scan_static_bus for GENERIC: 0.0
1082 15:43:54.040809 GENERIC: 0.0 enabled
1083 15:43:54.043091 GENERIC: 1.0 enabled
1084 15:43:54.046314 scan_static_bus for GENERIC: 0.0 done
1085 15:43:54.049719 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1086 15:43:54.056355 scan_static_bus for PCI: 00:1f.2 done
1087 15:43:54.059531 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1088 15:43:54.063088 PCI: 00:1f.3 scanning...
1089 15:43:54.066285 scan_static_bus for PCI: 00:1f.3
1090 15:43:54.069335 scan_static_bus for PCI: 00:1f.3 done
1091 15:43:54.072637 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1092 15:43:54.075948 PCI: 00:1f.5 scanning...
1093 15:43:54.079247 scan_generic_bus for PCI: 00:1f.5
1094 15:43:54.086353 scan_generic_bus for PCI: 00:1f.5 done
1095 15:43:54.089300 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1096 15:43:54.092730 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1097 15:43:54.099266 scan_static_bus for Root Device done
1098 15:43:54.102606 scan_bus: bus Root Device finished in 736 msecs
1099 15:43:54.103209 done
1100 15:43:54.108996 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1101 15:43:54.112363 Chrome EC: UHEPI supported
1102 15:43:54.119477 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1103 15:43:54.126183 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1104 15:43:54.129287 SPI flash protection: WPSW=0 SRP0=0
1105 15:43:54.132583 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1106 15:43:54.139040 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1107 15:43:54.142520 found VGA at PCI: 00:02.0
1108 15:43:54.146042 Setting up VGA for PCI: 00:02.0
1109 15:43:54.152378 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1110 15:43:54.155576 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1111 15:43:54.158872 Allocating resources...
1112 15:43:54.159403 Reading resources...
1113 15:43:54.165426 Root Device read_resources bus 0 link: 0
1114 15:43:54.168578 DOMAIN: 0000 read_resources bus 0 link: 0
1115 15:43:54.175170 PCI: 00:04.0 read_resources bus 1 link: 0
1116 15:43:54.178553 PCI: 00:04.0 read_resources bus 1 link: 0 done
1117 15:43:54.185408 PCI: 00:0d.0 read_resources bus 0 link: 0
1118 15:43:54.188666 USB0 port 0 read_resources bus 0 link: 0
1119 15:43:54.191614 USB0 port 0 read_resources bus 0 link: 0 done
1120 15:43:54.198752 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1121 15:43:54.202163 PCI: 00:14.0 read_resources bus 0 link: 0
1122 15:43:54.208391 USB0 port 0 read_resources bus 0 link: 0
1123 15:43:54.212300 USB0 port 0 read_resources bus 0 link: 0 done
1124 15:43:54.218914 PCI: 00:14.0 read_resources bus 0 link: 0 done
1125 15:43:54.221987 PCI: 00:14.3 read_resources bus 0 link: 0
1126 15:43:54.228745 PCI: 00:14.3 read_resources bus 0 link: 0 done
1127 15:43:54.232372 PCI: 00:15.0 read_resources bus 0 link: 0
1128 15:43:54.238368 PCI: 00:15.0 read_resources bus 0 link: 0 done
1129 15:43:54.242109 PCI: 00:15.1 read_resources bus 0 link: 0
1130 15:43:54.248571 PCI: 00:15.1 read_resources bus 0 link: 0 done
1131 15:43:54.252219 PCI: 00:19.1 read_resources bus 0 link: 0
1132 15:43:54.258961 PCI: 00:19.1 read_resources bus 0 link: 0 done
1133 15:43:54.262144 PCI: 00:1d.0 read_resources bus 1 link: 0
1134 15:43:54.268886 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1135 15:43:54.272165 PCI: 00:1e.2 read_resources bus 2 link: 0
1136 15:43:54.278514 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1137 15:43:54.282170 PCI: 00:1e.3 read_resources bus 3 link: 0
1138 15:43:54.288684 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1139 15:43:54.292260 PCI: 00:1f.0 read_resources bus 0 link: 0
1140 15:43:54.298403 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1141 15:43:54.301995 PCI: 00:1f.2 read_resources bus 0 link: 0
1142 15:43:54.305244 GENERIC: 0.0 read_resources bus 0 link: 0
1143 15:43:54.312132 GENERIC: 0.0 read_resources bus 0 link: 0 done
1144 15:43:54.315397 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1145 15:43:54.323010 DOMAIN: 0000 read_resources bus 0 link: 0 done
1146 15:43:54.326437 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1147 15:43:54.332901 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1148 15:43:54.336485 Root Device read_resources bus 0 link: 0 done
1149 15:43:54.340056 Done reading resources.
1150 15:43:54.346435 Show resources in subtree (Root Device)...After reading.
1151 15:43:54.349536 Root Device child on link 0 DOMAIN: 0000
1152 15:43:54.353115 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1153 15:43:54.362991 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1154 15:43:54.372748 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1155 15:43:54.376020 PCI: 00:00.0
1156 15:43:54.386079 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1157 15:43:54.392629 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1158 15:43:54.403056 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1159 15:43:54.412464 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1160 15:43:54.422776 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1161 15:43:54.432419 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1162 15:43:54.442432 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1163 15:43:54.448889 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1164 15:43:54.458926 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1165 15:43:54.469120 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1166 15:43:54.478624 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1167 15:43:54.488786 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1168 15:43:54.495466 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1169 15:43:54.505337 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1170 15:43:54.515037 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1171 15:43:54.525174 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1172 15:43:54.535245 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1173 15:43:54.545259 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1174 15:43:54.551787 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1175 15:43:54.561620 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1176 15:43:54.564824 PCI: 00:02.0
1177 15:43:54.574643 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1178 15:43:54.585140 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1179 15:43:54.594660 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1180 15:43:54.598161 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1181 15:43:54.607718 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1182 15:43:54.610968 GENERIC: 0.0
1183 15:43:54.611138 PCI: 00:05.0
1184 15:43:54.620992 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1185 15:43:54.627632 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1186 15:43:54.627759 GENERIC: 0.0
1187 15:43:54.630741 PCI: 00:08.0
1188 15:43:54.640945 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 15:43:54.641078 PCI: 00:0a.0
1190 15:43:54.644098 PCI: 00:0d.0 child on link 0 USB0 port 0
1191 15:43:54.654466 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1192 15:43:54.661163 USB0 port 0 child on link 0 USB3 port 0
1193 15:43:54.661292 USB3 port 0
1194 15:43:54.664525 USB3 port 1
1195 15:43:54.664639 USB3 port 2
1196 15:43:54.667684 USB3 port 3
1197 15:43:54.670893 PCI: 00:14.0 child on link 0 USB0 port 0
1198 15:43:54.680973 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1199 15:43:54.684411 USB0 port 0 child on link 0 USB2 port 0
1200 15:43:54.687440 USB2 port 0
1201 15:43:54.690889 USB2 port 1
1202 15:43:54.691007 USB2 port 2
1203 15:43:54.694257 USB2 port 3
1204 15:43:54.694332 USB2 port 4
1205 15:43:54.697834 USB2 port 5
1206 15:43:54.698039 USB2 port 6
1207 15:43:54.701422 USB2 port 7
1208 15:43:54.701590 USB2 port 8
1209 15:43:54.704200 USB2 port 9
1210 15:43:54.704338 USB3 port 0
1211 15:43:54.707749 USB3 port 1
1212 15:43:54.708011 USB3 port 2
1213 15:43:54.710800 USB3 port 3
1214 15:43:54.710915 PCI: 00:14.2
1215 15:43:54.721005 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 15:43:54.730950 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1217 15:43:54.737681 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 15:43:54.747574 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 15:43:54.747761 GENERIC: 0.0
1220 15:43:54.753975 PCI: 00:15.0 child on link 0 I2C: 00:1a
1221 15:43:54.764115 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 15:43:54.764279 I2C: 00:1a
1223 15:43:54.767633 I2C: 00:31
1224 15:43:54.767804 I2C: 00:32
1225 15:43:54.770967 PCI: 00:15.1 child on link 0 I2C: 00:10
1226 15:43:54.781077 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 15:43:54.784262 I2C: 00:10
1228 15:43:54.784439 PCI: 00:15.2
1229 15:43:54.794316 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 15:43:54.797490 PCI: 00:15.3
1231 15:43:54.807674 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 15:43:54.808028 PCI: 00:16.0
1233 15:43:54.817707 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 15:43:54.821183 PCI: 00:19.0
1235 15:43:54.824286 PCI: 00:19.1 child on link 0 I2C: 00:15
1236 15:43:54.834632 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 15:43:54.835119 I2C: 00:15
1238 15:43:54.841003 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1239 15:43:54.847474 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1240 15:43:54.857746 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1241 15:43:54.867576 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1242 15:43:54.870652 GENERIC: 0.0
1243 15:43:54.871051 PCI: 01:00.0
1244 15:43:54.880695 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1245 15:43:54.890744 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1246 15:43:54.900415 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1247 15:43:54.900824 PCI: 00:1e.0
1248 15:43:54.913955 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 15:43:54.917000 PCI: 00:1e.2 child on link 0 SPI: 00
1250 15:43:54.927009 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 15:43:54.927414 SPI: 00
1252 15:43:54.930352 PCI: 00:1e.3 child on link 0 SPI: 00
1253 15:43:54.940301 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 15:43:54.943563 SPI: 00
1255 15:43:54.946938 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1256 15:43:54.957043 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1257 15:43:54.957443 PNP: 0c09.0
1258 15:43:54.967118 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1259 15:43:54.970439 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1260 15:43:54.980269 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1261 15:43:54.989915 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1262 15:43:54.993279 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1263 15:43:54.996820 GENERIC: 0.0
1264 15:43:54.997188 GENERIC: 1.0
1265 15:43:55.000272 PCI: 00:1f.3
1266 15:43:55.009771 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1267 15:43:55.019689 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1268 15:43:55.020100 PCI: 00:1f.5
1269 15:43:55.029614 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1270 15:43:55.036522 CPU_CLUSTER: 0 child on link 0 APIC: 00
1271 15:43:55.036886 APIC: 00
1272 15:43:55.037176 APIC: 01
1273 15:43:55.039770 APIC: 02
1274 15:43:55.040160 APIC: 07
1275 15:43:55.040462 APIC: 04
1276 15:43:55.043342 APIC: 03
1277 15:43:55.043706 APIC: 06
1278 15:43:55.046324 APIC: 05
1279 15:43:55.053144 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1280 15:43:55.059647 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1281 15:43:55.066332 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1282 15:43:55.069427 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1283 15:43:55.076190 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1284 15:43:55.079686 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1285 15:43:55.082765 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1286 15:43:55.089693 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1287 15:43:55.099712 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1288 15:43:55.106201 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1289 15:43:55.112463 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1290 15:43:55.119435 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1291 15:43:55.126179 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1292 15:43:55.133210 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1293 15:43:55.142940 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1294 15:43:55.145920 DOMAIN: 0000: Resource ranges:
1295 15:43:55.149218 * Base: 1000, Size: 800, Tag: 100
1296 15:43:55.152788 * Base: 1900, Size: e700, Tag: 100
1297 15:43:55.155917 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1298 15:43:55.162668 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1299 15:43:55.172760 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1300 15:43:55.179260 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1301 15:43:55.185895 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1302 15:43:55.195739 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1303 15:43:55.202120 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1304 15:43:55.209036 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1305 15:43:55.215395 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1306 15:43:55.225531 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1307 15:43:55.232186 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1308 15:43:55.238679 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1309 15:43:55.248738 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1310 15:43:55.255222 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1311 15:43:55.262192 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1312 15:43:55.271807 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1313 15:43:55.278345 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1314 15:43:55.285008 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1315 15:43:55.294919 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1316 15:43:55.301708 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1317 15:43:55.308116 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1318 15:43:55.318320 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1319 15:43:55.325015 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1320 15:43:55.331308 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1321 15:43:55.341547 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1322 15:43:55.344847 DOMAIN: 0000: Resource ranges:
1323 15:43:55.348344 * Base: 7fc00000, Size: 40400000, Tag: 200
1324 15:43:55.351331 * Base: d0000000, Size: 28000000, Tag: 200
1325 15:43:55.357921 * Base: fa000000, Size: 1000000, Tag: 200
1326 15:43:55.361821 * Base: fb001000, Size: 2fff000, Tag: 200
1327 15:43:55.364701 * Base: fe010000, Size: 2e000, Tag: 200
1328 15:43:55.367829 * Base: fe03f000, Size: d41000, Tag: 200
1329 15:43:55.374372 * Base: fed88000, Size: 8000, Tag: 200
1330 15:43:55.378158 * Base: fed93000, Size: d000, Tag: 200
1331 15:43:55.381095 * Base: feda2000, Size: 1e000, Tag: 200
1332 15:43:55.384432 * Base: fede0000, Size: 1220000, Tag: 200
1333 15:43:55.391156 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1334 15:43:55.397813 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1335 15:43:55.404340 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1336 15:43:55.411005 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1337 15:43:55.417720 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1338 15:43:55.424413 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1339 15:43:55.430721 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1340 15:43:55.437840 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1341 15:43:55.444003 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1342 15:43:55.451081 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1343 15:43:55.457883 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1344 15:43:55.464090 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1345 15:43:55.470695 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1346 15:43:55.477439 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1347 15:43:55.484282 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1348 15:43:55.490449 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1349 15:43:55.497127 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1350 15:43:55.503963 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1351 15:43:55.510423 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1352 15:43:55.517201 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1353 15:43:55.523767 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1354 15:43:55.530491 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1355 15:43:55.537114 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1356 15:43:55.543973 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1357 15:43:55.554094 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1358 15:43:55.557392 PCI: 00:1d.0: Resource ranges:
1359 15:43:55.560353 * Base: 7fc00000, Size: 100000, Tag: 200
1360 15:43:55.567047 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1361 15:43:55.573873 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1362 15:43:55.580265 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1363 15:43:55.587041 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1364 15:43:55.596684 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1365 15:43:55.600002 Root Device assign_resources, bus 0 link: 0
1366 15:43:55.603491 DOMAIN: 0000 assign_resources, bus 0 link: 0
1367 15:43:55.613460 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1368 15:43:55.619985 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1369 15:43:55.629976 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1370 15:43:55.636621 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1371 15:43:55.643449 PCI: 00:04.0 assign_resources, bus 1 link: 0
1372 15:43:55.646888 PCI: 00:04.0 assign_resources, bus 1 link: 0
1373 15:43:55.656527 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1374 15:43:55.663040 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1375 15:43:55.673293 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1376 15:43:55.676134 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1377 15:43:55.679771 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1378 15:43:55.689923 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1379 15:43:55.693254 PCI: 00:14.0 assign_resources, bus 0 link: 0
1380 15:43:55.699750 PCI: 00:14.0 assign_resources, bus 0 link: 0
1381 15:43:55.706345 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1382 15:43:55.712655 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1383 15:43:55.723140 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1384 15:43:55.725917 PCI: 00:14.3 assign_resources, bus 0 link: 0
1385 15:43:55.732594 PCI: 00:14.3 assign_resources, bus 0 link: 0
1386 15:43:55.739641 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1387 15:43:55.746036 PCI: 00:15.0 assign_resources, bus 0 link: 0
1388 15:43:55.749607 PCI: 00:15.0 assign_resources, bus 0 link: 0
1389 15:43:55.756153 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1390 15:43:55.762740 PCI: 00:15.1 assign_resources, bus 0 link: 0
1391 15:43:55.765934 PCI: 00:15.1 assign_resources, bus 0 link: 0
1392 15:43:55.776142 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1393 15:43:55.782404 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1394 15:43:55.792671 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1395 15:43:55.799206 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1396 15:43:55.805657 PCI: 00:19.1 assign_resources, bus 0 link: 0
1397 15:43:55.809152 PCI: 00:19.1 assign_resources, bus 0 link: 0
1398 15:43:55.819181 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1399 15:43:55.828980 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1400 15:43:55.835532 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1401 15:43:55.841911 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1402 15:43:55.848782 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1403 15:43:55.855725 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1404 15:43:55.865282 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1405 15:43:55.868452 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1406 15:43:55.878704 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1407 15:43:55.881454 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1408 15:43:55.888757 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1409 15:43:55.895088 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1410 15:43:55.898578 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1411 15:43:55.905297 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1412 15:43:55.908374 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1413 15:43:55.915348 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1414 15:43:55.918243 LPC: Trying to open IO window from 800 size 1ff
1415 15:43:55.928006 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1416 15:43:55.935050 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1417 15:43:55.944615 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1418 15:43:55.948276 DOMAIN: 0000 assign_resources, bus 0 link: 0
1419 15:43:55.951381 Root Device assign_resources, bus 0 link: 0
1420 15:43:55.955083 Done setting resources.
1421 15:43:55.961443 Show resources in subtree (Root Device)...After assigning values.
1422 15:43:55.964821 Root Device child on link 0 DOMAIN: 0000
1423 15:43:55.971924 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1424 15:43:55.981139 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1425 15:43:55.991363 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1426 15:43:55.991942 PCI: 00:00.0
1427 15:43:56.001248 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1428 15:43:56.011095 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1429 15:43:56.021052 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1430 15:43:56.027531 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1431 15:43:56.037634 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1432 15:43:56.047471 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1433 15:43:56.057458 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1434 15:43:56.067269 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1435 15:43:56.077077 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1436 15:43:56.083882 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1437 15:43:56.093876 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1438 15:43:56.104270 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1439 15:43:56.113710 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1440 15:43:56.123544 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1441 15:43:56.130270 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1442 15:43:56.140175 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1443 15:43:56.150287 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1444 15:43:56.160380 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1445 15:43:56.169959 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1446 15:43:56.180151 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1447 15:43:56.180718 PCI: 00:02.0
1448 15:43:56.193851 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1449 15:43:56.203277 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1450 15:43:56.213207 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1451 15:43:56.216413 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1452 15:43:56.226727 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1453 15:43:56.229809 GENERIC: 0.0
1454 15:43:56.230264 PCI: 00:05.0
1455 15:43:56.239691 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1456 15:43:56.246283 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1457 15:43:56.246810 GENERIC: 0.0
1458 15:43:56.249616 PCI: 00:08.0
1459 15:43:56.259771 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1460 15:43:56.260351 PCI: 00:0a.0
1461 15:43:56.266617 PCI: 00:0d.0 child on link 0 USB0 port 0
1462 15:43:56.276470 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1463 15:43:56.279594 USB0 port 0 child on link 0 USB3 port 0
1464 15:43:56.282651 USB3 port 0
1465 15:43:56.283094 USB3 port 1
1466 15:43:56.286330 USB3 port 2
1467 15:43:56.286862 USB3 port 3
1468 15:43:56.293369 PCI: 00:14.0 child on link 0 USB0 port 0
1469 15:43:56.302781 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1470 15:43:56.306159 USB0 port 0 child on link 0 USB2 port 0
1471 15:43:56.309584 USB2 port 0
1472 15:43:56.310114 USB2 port 1
1473 15:43:56.312724 USB2 port 2
1474 15:43:56.313160 USB2 port 3
1475 15:43:56.315788 USB2 port 4
1476 15:43:56.316272 USB2 port 5
1477 15:43:56.319210 USB2 port 6
1478 15:43:56.319753 USB2 port 7
1479 15:43:56.322787 USB2 port 8
1480 15:43:56.323317 USB2 port 9
1481 15:43:56.326073 USB3 port 0
1482 15:43:56.326606 USB3 port 1
1483 15:43:56.329061 USB3 port 2
1484 15:43:56.329501 USB3 port 3
1485 15:43:56.332769 PCI: 00:14.2
1486 15:43:56.342662 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1487 15:43:56.352514 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1488 15:43:56.359124 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1489 15:43:56.369417 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1490 15:43:56.369958 GENERIC: 0.0
1491 15:43:56.375804 PCI: 00:15.0 child on link 0 I2C: 00:1a
1492 15:43:56.385772 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1493 15:43:56.386314 I2C: 00:1a
1494 15:43:56.389192 I2C: 00:31
1495 15:43:56.389722 I2C: 00:32
1496 15:43:56.392656 PCI: 00:15.1 child on link 0 I2C: 00:10
1497 15:43:56.402594 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1498 15:43:56.405520 I2C: 00:10
1499 15:43:56.406053 PCI: 00:15.2
1500 15:43:56.418874 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1501 15:43:56.419416 PCI: 00:15.3
1502 15:43:56.428716 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1503 15:43:56.431945 PCI: 00:16.0
1504 15:43:56.442283 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1505 15:43:56.442825 PCI: 00:19.0
1506 15:43:56.448553 PCI: 00:19.1 child on link 0 I2C: 00:15
1507 15:43:56.458533 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1508 15:43:56.459076 I2C: 00:15
1509 15:43:56.465301 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1510 15:43:56.472111 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1511 15:43:56.485434 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1512 15:43:56.495269 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1513 15:43:56.498561 GENERIC: 0.0
1514 15:43:56.499090 PCI: 01:00.0
1515 15:43:56.508505 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1516 15:43:56.517991 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1517 15:43:56.531548 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1518 15:43:56.532165 PCI: 00:1e.0
1519 15:43:56.541856 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1520 15:43:56.548346 PCI: 00:1e.2 child on link 0 SPI: 00
1521 15:43:56.557780 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1522 15:43:56.558305 SPI: 00
1523 15:43:56.561423 PCI: 00:1e.3 child on link 0 SPI: 00
1524 15:43:56.571598 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1525 15:43:56.574939 SPI: 00
1526 15:43:56.577786 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1527 15:43:56.588196 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1528 15:43:56.588735 PNP: 0c09.0
1529 15:43:56.598197 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1530 15:43:56.601509 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1531 15:43:56.611403 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1532 15:43:56.620839 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1533 15:43:56.624680 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1534 15:43:56.627928 GENERIC: 0.0
1535 15:43:56.628485 GENERIC: 1.0
1536 15:43:56.631098 PCI: 00:1f.3
1537 15:43:56.640971 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1538 15:43:56.651410 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1539 15:43:56.654359 PCI: 00:1f.5
1540 15:43:56.664163 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1541 15:43:56.667418 CPU_CLUSTER: 0 child on link 0 APIC: 00
1542 15:43:56.668035 APIC: 00
1543 15:43:56.671104 APIC: 01
1544 15:43:56.671636 APIC: 02
1545 15:43:56.674365 APIC: 07
1546 15:43:56.674898 APIC: 04
1547 15:43:56.675247 APIC: 03
1548 15:43:56.677309 APIC: 06
1549 15:43:56.677744 APIC: 05
1550 15:43:56.680925 Done allocating resources.
1551 15:43:56.687520 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1552 15:43:56.694084 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1553 15:43:56.697451 Configure GPIOs for I2S audio on UP4.
1554 15:43:56.704428 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1555 15:43:56.707393 Enabling resources...
1556 15:43:56.710689 PCI: 00:00.0 subsystem <- 8086/9a12
1557 15:43:56.711222 PCI: 00:00.0 cmd <- 06
1558 15:43:56.717577 PCI: 00:02.0 subsystem <- 8086/9a40
1559 15:43:56.718099 PCI: 00:02.0 cmd <- 03
1560 15:43:56.720636 PCI: 00:04.0 subsystem <- 8086/9a03
1561 15:43:56.723973 PCI: 00:04.0 cmd <- 02
1562 15:43:56.727644 PCI: 00:05.0 subsystem <- 8086/9a19
1563 15:43:56.730573 PCI: 00:05.0 cmd <- 02
1564 15:43:56.733964 PCI: 00:08.0 subsystem <- 8086/9a11
1565 15:43:56.737540 PCI: 00:08.0 cmd <- 06
1566 15:43:56.740902 PCI: 00:0d.0 subsystem <- 8086/9a13
1567 15:43:56.743801 PCI: 00:0d.0 cmd <- 02
1568 15:43:56.747160 PCI: 00:14.0 subsystem <- 8086/a0ed
1569 15:43:56.750435 PCI: 00:14.0 cmd <- 02
1570 15:43:56.753711 PCI: 00:14.2 subsystem <- 8086/a0ef
1571 15:43:56.756684 PCI: 00:14.2 cmd <- 02
1572 15:43:56.760356 PCI: 00:14.3 subsystem <- 8086/a0f0
1573 15:43:56.760892 PCI: 00:14.3 cmd <- 02
1574 15:43:56.767227 PCI: 00:15.0 subsystem <- 8086/a0e8
1575 15:43:56.767762 PCI: 00:15.0 cmd <- 02
1576 15:43:56.770508 PCI: 00:15.1 subsystem <- 8086/a0e9
1577 15:43:56.773524 PCI: 00:15.1 cmd <- 02
1578 15:43:56.777320 PCI: 00:15.2 subsystem <- 8086/a0ea
1579 15:43:56.780071 PCI: 00:15.2 cmd <- 02
1580 15:43:56.783596 PCI: 00:15.3 subsystem <- 8086/a0eb
1581 15:43:56.786709 PCI: 00:15.3 cmd <- 02
1582 15:43:56.789888 PCI: 00:16.0 subsystem <- 8086/a0e0
1583 15:43:56.793450 PCI: 00:16.0 cmd <- 02
1584 15:43:56.796794 PCI: 00:19.1 subsystem <- 8086/a0c6
1585 15:43:56.799898 PCI: 00:19.1 cmd <- 02
1586 15:43:56.803205 PCI: 00:1d.0 bridge ctrl <- 0013
1587 15:43:56.806995 PCI: 00:1d.0 subsystem <- 8086/a0b0
1588 15:43:56.810161 PCI: 00:1d.0 cmd <- 06
1589 15:43:56.813445 PCI: 00:1e.0 subsystem <- 8086/a0a8
1590 15:43:56.813964 PCI: 00:1e.0 cmd <- 06
1591 15:43:56.819676 PCI: 00:1e.2 subsystem <- 8086/a0aa
1592 15:43:56.820160 PCI: 00:1e.2 cmd <- 06
1593 15:43:56.826859 PCI: 00:1e.3 subsystem <- 8086/a0ab
1594 15:43:56.827378 PCI: 00:1e.3 cmd <- 02
1595 15:43:56.829993 PCI: 00:1f.0 subsystem <- 8086/a087
1596 15:43:56.833256 PCI: 00:1f.0 cmd <- 407
1597 15:43:56.836143 PCI: 00:1f.3 subsystem <- 8086/a0c8
1598 15:43:56.839728 PCI: 00:1f.3 cmd <- 02
1599 15:43:56.843313 PCI: 00:1f.5 subsystem <- 8086/a0a4
1600 15:43:56.846557 PCI: 00:1f.5 cmd <- 406
1601 15:43:56.850264 PCI: 01:00.0 cmd <- 02
1602 15:43:56.855246 done.
1603 15:43:56.858277 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1604 15:43:56.861900 Initializing devices...
1605 15:43:56.864548 Root Device init
1606 15:43:56.868248 Chrome EC: Set SMI mask to 0x0000000000000000
1607 15:43:56.875137 Chrome EC: clear events_b mask to 0x0000000000000000
1608 15:43:56.881617 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1609 15:43:56.884780 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1610 15:43:56.891473 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1611 15:43:56.898309 Chrome EC: Set WAKE mask to 0x0000000000000000
1612 15:43:56.901711 fw_config match found: DB_USB=USB3_ACTIVE
1613 15:43:56.908314 Configure Right Type-C port orientation for retimer
1614 15:43:56.911552 Root Device init finished in 42 msecs
1615 15:43:56.914913 PCI: 00:00.0 init
1616 15:43:56.915445 CPU TDP = 9 Watts
1617 15:43:56.917756 CPU PL1 = 9 Watts
1618 15:43:56.921079 CPU PL2 = 40 Watts
1619 15:43:56.921505 CPU PL4 = 83 Watts
1620 15:43:56.924430 PCI: 00:00.0 init finished in 8 msecs
1621 15:43:56.928028 PCI: 00:02.0 init
1622 15:43:56.931194 GMA: Found VBT in CBFS
1623 15:43:56.934669 GMA: Found valid VBT in CBFS
1624 15:43:56.937791 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1625 15:43:56.947945 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1626 15:43:56.951218 PCI: 00:02.0 init finished in 18 msecs
1627 15:43:56.954446 PCI: 00:05.0 init
1628 15:43:56.957524 PCI: 00:05.0 init finished in 0 msecs
1629 15:43:56.958078 PCI: 00:08.0 init
1630 15:43:56.964037 PCI: 00:08.0 init finished in 0 msecs
1631 15:43:56.964559 PCI: 00:14.0 init
1632 15:43:56.970866 PCI: 00:14.0 init finished in 0 msecs
1633 15:43:56.971408 PCI: 00:14.2 init
1634 15:43:56.973910 PCI: 00:14.2 init finished in 0 msecs
1635 15:43:56.977994 PCI: 00:15.0 init
1636 15:43:56.981437 I2C bus 0 version 0x3230302a
1637 15:43:56.984368 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1638 15:43:56.988155 PCI: 00:15.0 init finished in 6 msecs
1639 15:43:56.991364 PCI: 00:15.1 init
1640 15:43:56.994900 I2C bus 1 version 0x3230302a
1641 15:43:56.998058 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1642 15:43:57.001464 PCI: 00:15.1 init finished in 6 msecs
1643 15:43:57.004572 PCI: 00:15.2 init
1644 15:43:57.007899 I2C bus 2 version 0x3230302a
1645 15:43:57.011173 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1646 15:43:57.014710 PCI: 00:15.2 init finished in 6 msecs
1647 15:43:57.015236 PCI: 00:15.3 init
1648 15:43:57.017528 I2C bus 3 version 0x3230302a
1649 15:43:57.020781 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1650 15:43:57.027572 PCI: 00:15.3 init finished in 6 msecs
1651 15:43:57.028044 PCI: 00:16.0 init
1652 15:43:57.031127 PCI: 00:16.0 init finished in 0 msecs
1653 15:43:57.034986 PCI: 00:19.1 init
1654 15:43:57.037878 I2C bus 5 version 0x3230302a
1655 15:43:57.041228 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1656 15:43:57.044536 PCI: 00:19.1 init finished in 6 msecs
1657 15:43:57.047986 PCI: 00:1d.0 init
1658 15:43:57.051513 Initializing PCH PCIe bridge.
1659 15:43:57.054729 PCI: 00:1d.0 init finished in 3 msecs
1660 15:43:57.058126 PCI: 00:1f.0 init
1661 15:43:57.061407 IOAPIC: Initializing IOAPIC at 0xfec00000
1662 15:43:57.064609 IOAPIC: Bootstrap Processor Local APIC = 0x00
1663 15:43:57.067954 IOAPIC: ID = 0x02
1664 15:43:57.071579 IOAPIC: Dumping registers
1665 15:43:57.074669 reg 0x0000: 0x02000000
1666 15:43:57.075198 reg 0x0001: 0x00770020
1667 15:43:57.078261 reg 0x0002: 0x00000000
1668 15:43:57.081063 PCI: 00:1f.0 init finished in 21 msecs
1669 15:43:57.084665 PCI: 00:1f.2 init
1670 15:43:57.088449 Disabling ACPI via APMC.
1671 15:43:57.091303 APMC done.
1672 15:43:57.094658 PCI: 00:1f.2 init finished in 5 msecs
1673 15:43:57.105992 PCI: 01:00.0 init
1674 15:43:57.108833 PCI: 01:00.0 init finished in 0 msecs
1675 15:43:57.112697 PNP: 0c09.0 init
1676 15:43:57.115693 Google Chrome EC uptime: 8.415 seconds
1677 15:43:57.122254 Google Chrome AP resets since EC boot: 0
1678 15:43:57.125328 Google Chrome most recent AP reset causes:
1679 15:43:57.132199 Google Chrome EC reset flags at last EC boot: reset-pin
1680 15:43:57.135489 PNP: 0c09.0 init finished in 18 msecs
1681 15:43:57.139874 Devices initialized
1682 15:43:57.143282 Show all devs... After init.
1683 15:43:57.146381 Root Device: enabled 1
1684 15:43:57.146814 DOMAIN: 0000: enabled 1
1685 15:43:57.149803 CPU_CLUSTER: 0: enabled 1
1686 15:43:57.153215 PCI: 00:00.0: enabled 1
1687 15:43:57.156784 PCI: 00:02.0: enabled 1
1688 15:43:57.157371 PCI: 00:04.0: enabled 1
1689 15:43:57.159721 PCI: 00:05.0: enabled 1
1690 15:43:57.163426 PCI: 00:06.0: enabled 0
1691 15:43:57.166498 PCI: 00:07.0: enabled 0
1692 15:43:57.167070 PCI: 00:07.1: enabled 0
1693 15:43:57.170183 PCI: 00:07.2: enabled 0
1694 15:43:57.172926 PCI: 00:07.3: enabled 0
1695 15:43:57.176493 PCI: 00:08.0: enabled 1
1696 15:43:57.177083 PCI: 00:09.0: enabled 0
1697 15:43:57.180096 PCI: 00:0a.0: enabled 0
1698 15:43:57.182811 PCI: 00:0d.0: enabled 1
1699 15:43:57.186305 PCI: 00:0d.1: enabled 0
1700 15:43:57.186783 PCI: 00:0d.2: enabled 0
1701 15:43:57.189571 PCI: 00:0d.3: enabled 0
1702 15:43:57.192900 PCI: 00:0e.0: enabled 0
1703 15:43:57.193332 PCI: 00:10.2: enabled 1
1704 15:43:57.196050 PCI: 00:10.6: enabled 0
1705 15:43:57.199788 PCI: 00:10.7: enabled 0
1706 15:43:57.203172 PCI: 00:12.0: enabled 0
1707 15:43:57.203700 PCI: 00:12.6: enabled 0
1708 15:43:57.206439 PCI: 00:13.0: enabled 0
1709 15:43:57.209772 PCI: 00:14.0: enabled 1
1710 15:43:57.213156 PCI: 00:14.1: enabled 0
1711 15:43:57.213695 PCI: 00:14.2: enabled 1
1712 15:43:57.216240 PCI: 00:14.3: enabled 1
1713 15:43:57.219624 PCI: 00:15.0: enabled 1
1714 15:43:57.222852 PCI: 00:15.1: enabled 1
1715 15:43:57.223391 PCI: 00:15.2: enabled 1
1716 15:43:57.226044 PCI: 00:15.3: enabled 1
1717 15:43:57.229300 PCI: 00:16.0: enabled 1
1718 15:43:57.229732 PCI: 00:16.1: enabled 0
1719 15:43:57.232877 PCI: 00:16.2: enabled 0
1720 15:43:57.236301 PCI: 00:16.3: enabled 0
1721 15:43:57.239497 PCI: 00:16.4: enabled 0
1722 15:43:57.240060 PCI: 00:16.5: enabled 0
1723 15:43:57.242482 PCI: 00:17.0: enabled 0
1724 15:43:57.246440 PCI: 00:19.0: enabled 0
1725 15:43:57.249236 PCI: 00:19.1: enabled 1
1726 15:43:57.249670 PCI: 00:19.2: enabled 0
1727 15:43:57.252788 PCI: 00:1c.0: enabled 1
1728 15:43:57.256110 PCI: 00:1c.1: enabled 0
1729 15:43:57.259440 PCI: 00:1c.2: enabled 0
1730 15:43:57.259887 PCI: 00:1c.3: enabled 0
1731 15:43:57.262460 PCI: 00:1c.4: enabled 0
1732 15:43:57.266050 PCI: 00:1c.5: enabled 0
1733 15:43:57.269453 PCI: 00:1c.6: enabled 1
1734 15:43:57.269990 PCI: 00:1c.7: enabled 0
1735 15:43:57.272738 PCI: 00:1d.0: enabled 1
1736 15:43:57.275933 PCI: 00:1d.1: enabled 0
1737 15:43:57.276467 PCI: 00:1d.2: enabled 1
1738 15:43:57.279412 PCI: 00:1d.3: enabled 0
1739 15:43:57.282538 PCI: 00:1e.0: enabled 1
1740 15:43:57.285799 PCI: 00:1e.1: enabled 0
1741 15:43:57.286229 PCI: 00:1e.2: enabled 1
1742 15:43:57.289269 PCI: 00:1e.3: enabled 1
1743 15:43:57.292696 PCI: 00:1f.0: enabled 1
1744 15:43:57.296070 PCI: 00:1f.1: enabled 0
1745 15:43:57.296628 PCI: 00:1f.2: enabled 1
1746 15:43:57.299052 PCI: 00:1f.3: enabled 1
1747 15:43:57.302599 PCI: 00:1f.4: enabled 0
1748 15:43:57.305985 PCI: 00:1f.5: enabled 1
1749 15:43:57.306520 PCI: 00:1f.6: enabled 0
1750 15:43:57.309155 PCI: 00:1f.7: enabled 0
1751 15:43:57.312818 APIC: 00: enabled 1
1752 15:43:57.313400 GENERIC: 0.0: enabled 1
1753 15:43:57.315947 GENERIC: 0.0: enabled 1
1754 15:43:57.319135 GENERIC: 1.0: enabled 1
1755 15:43:57.322619 GENERIC: 0.0: enabled 1
1756 15:43:57.323204 GENERIC: 1.0: enabled 1
1757 15:43:57.325826 USB0 port 0: enabled 1
1758 15:43:57.329120 GENERIC: 0.0: enabled 1
1759 15:43:57.329707 USB0 port 0: enabled 1
1760 15:43:57.332299 GENERIC: 0.0: enabled 1
1761 15:43:57.336021 I2C: 00:1a: enabled 1
1762 15:43:57.339137 I2C: 00:31: enabled 1
1763 15:43:57.339721 I2C: 00:32: enabled 1
1764 15:43:57.342233 I2C: 00:10: enabled 1
1765 15:43:57.346110 I2C: 00:15: enabled 1
1766 15:43:57.346674 GENERIC: 0.0: enabled 0
1767 15:43:57.348953 GENERIC: 1.0: enabled 0
1768 15:43:57.352459 GENERIC: 0.0: enabled 1
1769 15:43:57.353048 SPI: 00: enabled 1
1770 15:43:57.355970 SPI: 00: enabled 1
1771 15:43:57.358888 PNP: 0c09.0: enabled 1
1772 15:43:57.359369 GENERIC: 0.0: enabled 1
1773 15:43:57.362530 USB3 port 0: enabled 1
1774 15:43:57.365462 USB3 port 1: enabled 1
1775 15:43:57.369119 USB3 port 2: enabled 0
1776 15:43:57.369659 USB3 port 3: enabled 0
1777 15:43:57.371884 USB2 port 0: enabled 0
1778 15:43:57.375679 USB2 port 1: enabled 1
1779 15:43:57.376261 USB2 port 2: enabled 1
1780 15:43:57.378747 USB2 port 3: enabled 0
1781 15:43:57.382357 USB2 port 4: enabled 1
1782 15:43:57.382793 USB2 port 5: enabled 0
1783 15:43:57.385239 USB2 port 6: enabled 0
1784 15:43:57.389028 USB2 port 7: enabled 0
1785 15:43:57.392109 USB2 port 8: enabled 0
1786 15:43:57.392656 USB2 port 9: enabled 0
1787 15:43:57.395511 USB3 port 0: enabled 0
1788 15:43:57.398896 USB3 port 1: enabled 1
1789 15:43:57.399481 USB3 port 2: enabled 0
1790 15:43:57.402081 USB3 port 3: enabled 0
1791 15:43:57.405906 GENERIC: 0.0: enabled 1
1792 15:43:57.408614 GENERIC: 1.0: enabled 1
1793 15:43:57.409155 APIC: 01: enabled 1
1794 15:43:57.412348 APIC: 02: enabled 1
1795 15:43:57.412889 APIC: 07: enabled 1
1796 15:43:57.415503 APIC: 04: enabled 1
1797 15:43:57.418513 APIC: 03: enabled 1
1798 15:43:57.418971 APIC: 06: enabled 1
1799 15:43:57.421723 APIC: 05: enabled 1
1800 15:43:57.425447 PCI: 01:00.0: enabled 1
1801 15:43:57.428341 BS: BS_DEV_INIT run times (exec / console): 29 / 536 ms
1802 15:43:57.435229 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1803 15:43:57.438762 ELOG: NV offset 0xf30000 size 0x1000
1804 15:43:57.444984 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1805 15:43:57.451948 ELOG: Event(17) added with size 13 at 2022-09-17 14:33:35 UTC
1806 15:43:57.458514 ELOG: Event(92) added with size 9 at 2022-09-17 14:33:35 UTC
1807 15:43:57.465069 ELOG: Event(93) added with size 9 at 2022-09-17 14:33:35 UTC
1808 15:43:57.472092 ELOG: Event(9E) added with size 10 at 2022-09-17 14:33:35 UTC
1809 15:43:57.478309 ELOG: Event(9F) added with size 14 at 2022-09-17 14:33:35 UTC
1810 15:43:57.484615 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1811 15:43:57.488203 ELOG: Event(A1) added with size 10 at 2022-09-17 14:33:35 UTC
1812 15:43:57.498438 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1813 15:43:57.504630 ELOG: Event(A0) added with size 9 at 2022-09-17 14:33:35 UTC
1814 15:43:57.508037 elog_add_boot_reason: Logged dev mode boot
1815 15:43:57.514994 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1816 15:43:57.515581 Finalize devices...
1817 15:43:57.517973 Devices finalized
1818 15:43:57.524547 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1819 15:43:57.527767 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1820 15:43:57.534679 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1821 15:43:57.538043 ME: HFSTS1 : 0x80030055
1822 15:43:57.544172 ME: HFSTS2 : 0x30280116
1823 15:43:57.547800 ME: HFSTS3 : 0x00000050
1824 15:43:57.551167 ME: HFSTS4 : 0x00004000
1825 15:43:57.557950 ME: HFSTS5 : 0x00000000
1826 15:43:57.560929 ME: HFSTS6 : 0x00400006
1827 15:43:57.564683 ME: Manufacturing Mode : YES
1828 15:43:57.567819 ME: SPI Protection Mode Enabled : NO
1829 15:43:57.571235 ME: FW Partition Table : OK
1830 15:43:57.577751 ME: Bringup Loader Failure : NO
1831 15:43:57.580851 ME: Firmware Init Complete : NO
1832 15:43:57.584046 ME: Boot Options Present : NO
1833 15:43:57.587662 ME: Update In Progress : NO
1834 15:43:57.591100 ME: D0i3 Support : YES
1835 15:43:57.594321 ME: Low Power State Enabled : NO
1836 15:43:57.598019 ME: CPU Replaced : YES
1837 15:43:57.600935 ME: CPU Replacement Valid : YES
1838 15:43:57.607438 ME: Current Working State : 5
1839 15:43:57.610722 ME: Current Operation State : 1
1840 15:43:57.614273 ME: Current Operation Mode : 3
1841 15:43:57.617427 ME: Error Code : 0
1842 15:43:57.620589 ME: Enhanced Debug Mode : NO
1843 15:43:57.623643 ME: CPU Debug Disabled : YES
1844 15:43:57.627405 ME: TXT Support : NO
1845 15:43:57.634071 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1846 15:43:57.640795 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1847 15:43:57.644013 CBFS: 'fallback/slic' not found.
1848 15:43:57.650678 ACPI: Writing ACPI tables at 76b01000.
1849 15:43:57.651263 ACPI: * FACS
1850 15:43:57.653591 ACPI: * DSDT
1851 15:43:57.657227 Ramoops buffer: 0x100000@0x76a00000.
1852 15:43:57.660471 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1853 15:43:57.667356 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1854 15:43:57.670392 Google Chrome EC: version:
1855 15:43:57.673532 ro: voema_v2.0.10114-a447f03e46
1856 15:43:57.676718 rw: voema_v2.0.10114-a447f03e46
1857 15:43:57.677303 running image: 1
1858 15:43:57.683569 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1859 15:43:57.687717 ACPI: * FADT
1860 15:43:57.688275 SCI is IRQ9
1861 15:43:57.694655 ACPI: added table 1/32, length now 40
1862 15:43:57.695235 ACPI: * SSDT
1863 15:43:57.698027 Found 1 CPU(s) with 8 core(s) each.
1864 15:43:57.704539 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1865 15:43:57.708122 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1866 15:43:57.711189 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1867 15:43:57.714537 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1868 15:43:57.721150 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1869 15:43:57.727748 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1870 15:43:57.731065 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1871 15:43:57.737707 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1872 15:43:57.744158 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1873 15:43:57.747995 \_SB.PCI0.RP09: Added StorageD3Enable property
1874 15:43:57.751147 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1875 15:43:57.757677 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1876 15:43:57.764034 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1877 15:43:57.767697 PS2K: Passing 80 keymaps to kernel
1878 15:43:57.773912 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1879 15:43:57.780508 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1880 15:43:57.787221 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1881 15:43:57.794341 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1882 15:43:57.800820 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1883 15:43:57.807402 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1884 15:43:57.813608 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1885 15:43:57.820328 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1886 15:43:57.823993 ACPI: added table 2/32, length now 44
1887 15:43:57.824481 ACPI: * MCFG
1888 15:43:57.827356 ACPI: added table 3/32, length now 48
1889 15:43:57.830520 ACPI: * TPM2
1890 15:43:57.834184 TPM2 log created at 0x769f0000
1891 15:43:57.837012 ACPI: added table 4/32, length now 52
1892 15:43:57.837502 ACPI: * MADT
1893 15:43:57.840826 SCI is IRQ9
1894 15:43:57.843798 ACPI: added table 5/32, length now 56
1895 15:43:57.846982 current = 76b09850
1896 15:43:57.847556 ACPI: * DMAR
1897 15:43:57.850690 ACPI: added table 6/32, length now 60
1898 15:43:57.853794 ACPI: added table 7/32, length now 64
1899 15:43:57.857228 ACPI: * HPET
1900 15:43:57.860335 ACPI: added table 8/32, length now 68
1901 15:43:57.860820 ACPI: done.
1902 15:43:57.863985 ACPI tables: 35216 bytes.
1903 15:43:57.866946 smbios_write_tables: 769ef000
1904 15:43:57.870276 EC returned error result code 3
1905 15:43:57.873598 Couldn't obtain OEM name from CBI
1906 15:43:57.876991 Create SMBIOS type 16
1907 15:43:57.880486 Create SMBIOS type 17
1908 15:43:57.881062 GENERIC: 0.0 (WIFI Device)
1909 15:43:57.883624 SMBIOS tables: 1750 bytes.
1910 15:43:57.890619 Writing table forward entry at 0x00000500
1911 15:43:57.893416 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1912 15:43:57.900625 Writing coreboot table at 0x76b25000
1913 15:43:57.904020 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1914 15:43:57.910772 1. 0000000000001000-000000000009ffff: RAM
1915 15:43:57.913356 2. 00000000000a0000-00000000000fffff: RESERVED
1916 15:43:57.916514 3. 0000000000100000-00000000769eefff: RAM
1917 15:43:57.923396 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1918 15:43:57.930296 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1919 15:43:57.933833 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1920 15:43:57.940468 7. 0000000077000000-000000007fbfffff: RESERVED
1921 15:43:57.943654 8. 00000000c0000000-00000000cfffffff: RESERVED
1922 15:43:57.950254 9. 00000000f8000000-00000000f9ffffff: RESERVED
1923 15:43:57.953129 10. 00000000fb000000-00000000fb000fff: RESERVED
1924 15:43:57.959971 11. 00000000fe000000-00000000fe00ffff: RESERVED
1925 15:43:57.963339 12. 00000000fed80000-00000000fed87fff: RESERVED
1926 15:43:57.969994 13. 00000000fed90000-00000000fed92fff: RESERVED
1927 15:43:57.973517 14. 00000000feda0000-00000000feda1fff: RESERVED
1928 15:43:57.976512 15. 00000000fedc0000-00000000feddffff: RESERVED
1929 15:43:57.983516 16. 0000000100000000-00000002803fffff: RAM
1930 15:43:57.986519 Passing 4 GPIOs to payload:
1931 15:43:57.989727 NAME | PORT | POLARITY | VALUE
1932 15:43:57.996606 lid | undefined | high | high
1933 15:43:58.000039 power | undefined | high | low
1934 15:43:58.006666 oprom | undefined | high | low
1935 15:43:58.009971 EC in RW | 0x000000e5 | high | low
1936 15:43:58.016351 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum d2f4
1937 15:43:58.019462 coreboot table: 1576 bytes.
1938 15:43:58.023215 IMD ROOT 0. 0x76fff000 0x00001000
1939 15:43:58.026157 IMD SMALL 1. 0x76ffe000 0x00001000
1940 15:43:58.032859 FSP MEMORY 2. 0x76c4e000 0x003b0000
1941 15:43:58.036203 VPD 3. 0x76c4d000 0x00000367
1942 15:43:58.039950 RO MCACHE 4. 0x76c4c000 0x00000fdc
1943 15:43:58.043226 CONSOLE 5. 0x76c2c000 0x00020000
1944 15:43:58.046593 FMAP 6. 0x76c2b000 0x00000578
1945 15:43:58.049626 TIME STAMP 7. 0x76c2a000 0x00000910
1946 15:43:58.052788 VBOOT WORK 8. 0x76c16000 0x00014000
1947 15:43:58.056752 ROMSTG STCK 9. 0x76c15000 0x00001000
1948 15:43:58.063295 AFTER CAR 10. 0x76c0a000 0x0000b000
1949 15:43:58.066684 RAMSTAGE 11. 0x76b97000 0x00073000
1950 15:43:58.069424 REFCODE 12. 0x76b42000 0x00055000
1951 15:43:58.073058 SMM BACKUP 13. 0x76b32000 0x00010000
1952 15:43:58.076421 4f444749 14. 0x76b30000 0x00002000
1953 15:43:58.079620 EXT VBT15. 0x76b2d000 0x0000219f
1954 15:43:58.083175 COREBOOT 16. 0x76b25000 0x00008000
1955 15:43:58.085855 ACPI 17. 0x76b01000 0x00024000
1956 15:43:58.089302 ACPI GNVS 18. 0x76b00000 0x00001000
1957 15:43:58.095758 RAMOOPS 19. 0x76a00000 0x00100000
1958 15:43:58.099583 TPM2 TCGLOG20. 0x769f0000 0x00010000
1959 15:43:58.102817 SMBIOS 21. 0x769ef000 0x00000800
1960 15:43:58.103391 IMD small region:
1961 15:43:58.109618 IMD ROOT 0. 0x76ffec00 0x00000400
1962 15:43:58.113022 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1963 15:43:58.116107 POWER STATE 2. 0x76ffeb80 0x00000044
1964 15:43:58.119736 ROMSTAGE 3. 0x76ffeb60 0x00000004
1965 15:43:58.122632 MEM INFO 4. 0x76ffe980 0x000001e0
1966 15:43:58.129103 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1967 15:43:58.132772 MTRR: Physical address space:
1968 15:43:58.139619 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1969 15:43:58.145828 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1970 15:43:58.152591 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1971 15:43:58.155945 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1972 15:43:58.162929 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1973 15:43:58.169180 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1974 15:43:58.176008 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1975 15:43:58.179318 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 15:43:58.185426 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 15:43:58.189003 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 15:43:58.192178 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 15:43:58.195885 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 15:43:58.202349 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 15:43:58.205552 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 15:43:58.209072 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 15:43:58.212430 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 15:43:58.218870 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 15:43:58.222154 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 15:43:58.225187 call enable_fixed_mtrr()
1987 15:43:58.228719 CPU physical address size: 39 bits
1988 15:43:58.231928 MTRR: default type WB/UC MTRR counts: 6/6.
1989 15:43:58.235375 MTRR: UC selected as default type.
1990 15:43:58.242418 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1991 15:43:58.248519 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1992 15:43:58.255023 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1993 15:43:58.262196 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1994 15:43:58.268770 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1995 15:43:58.275200 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1996 15:43:58.275789
1997 15:43:58.276207 MTRR check
1998 15:43:58.278525 Fixed MTRRs : Enabled
1999 15:43:58.281690 Variable MTRRs: Enabled
2000 15:43:58.282167
2001 15:43:58.285123 MTRR: Fixed MSR 0x250 0x0606060606060606
2002 15:43:58.288379 MTRR: Fixed MSR 0x258 0x0606060606060606
2003 15:43:58.295043 MTRR: Fixed MSR 0x259 0x0000000000000000
2004 15:43:58.298557 MTRR: Fixed MSR 0x268 0x0606060606060606
2005 15:43:58.301678 MTRR: Fixed MSR 0x269 0x0606060606060606
2006 15:43:58.304848 MTRR: Fixed MSR 0x26a 0x0606060606060606
2007 15:43:58.312054 MTRR: Fixed MSR 0x26b 0x0606060606060606
2008 15:43:58.315088 MTRR: Fixed MSR 0x26c 0x0606060606060606
2009 15:43:58.318626 MTRR: Fixed MSR 0x26d 0x0606060606060606
2010 15:43:58.321737 MTRR: Fixed MSR 0x26e 0x0606060606060606
2011 15:43:58.328015 MTRR: Fixed MSR 0x26f 0x0606060606060606
2012 15:43:58.335129 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2013 15:43:58.335709 call enable_fixed_mtrr()
2014 15:43:58.342261 Checking cr50 for pending updates
2015 15:43:58.345784 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 15:43:58.349046 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 15:43:58.352215 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 15:43:58.355601 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 15:43:58.358974 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 15:43:58.365586 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 15:43:58.368766 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 15:43:58.372005 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 15:43:58.375541 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 15:43:58.381928 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 15:43:58.385192 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 15:43:58.388428 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 15:43:58.395151 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 15:43:58.395731 call enable_fixed_mtrr()
2029 15:43:58.401778 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 15:43:58.404838 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 15:43:58.408269 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 15:43:58.411970 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 15:43:58.418380 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 15:43:58.421402 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 15:43:58.424785 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 15:43:58.428204 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 15:43:58.434893 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 15:43:58.438224 CPU physical address size: 39 bits
2039 15:43:58.441654 call enable_fixed_mtrr()
2040 15:43:58.444677 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 15:43:58.451441 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 15:43:58.454982 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 15:43:58.458067 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 15:43:58.461550 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 15:43:58.464758 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 15:43:58.471367 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 15:43:58.474345 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 15:43:58.478022 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 15:43:58.481228 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 15:43:58.487722 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 15:43:58.491502 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 15:43:58.494476 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 15:43:58.497876 call enable_fixed_mtrr()
2054 15:43:58.501212 MTRR: Fixed MSR 0x259 0x0000000000000000
2055 15:43:58.507749 MTRR: Fixed MSR 0x268 0x0606060606060606
2056 15:43:58.511364 MTRR: Fixed MSR 0x269 0x0606060606060606
2057 15:43:58.514646 MTRR: Fixed MSR 0x26a 0x0606060606060606
2058 15:43:58.517759 MTRR: Fixed MSR 0x26b 0x0606060606060606
2059 15:43:58.524044 MTRR: Fixed MSR 0x26c 0x0606060606060606
2060 15:43:58.527334 MTRR: Fixed MSR 0x26d 0x0606060606060606
2061 15:43:58.531098 MTRR: Fixed MSR 0x26e 0x0606060606060606
2062 15:43:58.534131 MTRR: Fixed MSR 0x26f 0x0606060606060606
2063 15:43:58.538310 CPU physical address size: 39 bits
2064 15:43:58.545201 call enable_fixed_mtrr()
2065 15:43:58.548648 MTRR: Fixed MSR 0x250 0x0606060606060606
2066 15:43:58.551572 MTRR: Fixed MSR 0x250 0x0606060606060606
2067 15:43:58.555204 MTRR: Fixed MSR 0x258 0x0606060606060606
2068 15:43:58.561774 MTRR: Fixed MSR 0x259 0x0000000000000000
2069 15:43:58.564994 MTRR: Fixed MSR 0x268 0x0606060606060606
2070 15:43:58.568476 MTRR: Fixed MSR 0x269 0x0606060606060606
2071 15:43:58.571512 MTRR: Fixed MSR 0x26a 0x0606060606060606
2072 15:43:58.574937 MTRR: Fixed MSR 0x26b 0x0606060606060606
2073 15:43:58.581550 MTRR: Fixed MSR 0x26c 0x0606060606060606
2074 15:43:58.584637 MTRR: Fixed MSR 0x26d 0x0606060606060606
2075 15:43:58.588093 MTRR: Fixed MSR 0x26e 0x0606060606060606
2076 15:43:58.591617 MTRR: Fixed MSR 0x26f 0x0606060606060606
2077 15:43:58.598969 MTRR: Fixed MSR 0x258 0x0606060606060606
2078 15:43:58.599505 call enable_fixed_mtrr()
2079 15:43:58.605774 MTRR: Fixed MSR 0x259 0x0000000000000000
2080 15:43:58.608801 MTRR: Fixed MSR 0x268 0x0606060606060606
2081 15:43:58.612420 MTRR: Fixed MSR 0x269 0x0606060606060606
2082 15:43:58.615724 MTRR: Fixed MSR 0x26a 0x0606060606060606
2083 15:43:58.622412 MTRR: Fixed MSR 0x26b 0x0606060606060606
2084 15:43:58.625375 MTRR: Fixed MSR 0x26c 0x0606060606060606
2085 15:43:58.628605 MTRR: Fixed MSR 0x26d 0x0606060606060606
2086 15:43:58.632215 MTRR: Fixed MSR 0x26e 0x0606060606060606
2087 15:43:58.639082 MTRR: Fixed MSR 0x26f 0x0606060606060606
2088 15:43:58.642138 CPU physical address size: 39 bits
2089 15:43:58.645801 call enable_fixed_mtrr()
2090 15:43:58.648522 CPU physical address size: 39 bits
2091 15:43:58.652121 CPU physical address size: 39 bits
2092 15:43:58.655518 CPU physical address size: 39 bits
2093 15:43:58.658724 CPU physical address size: 39 bits
2094 15:43:58.662721 Reading cr50 TPM mode
2095 15:43:58.672723 BS: BS_PAYLOAD_LOAD entry times (exec / console): 327 / 7 ms
2096 15:43:58.682515 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2097 15:43:58.685779 Checking segment from ROM address 0xffc02b38
2098 15:43:58.688921 Checking segment from ROM address 0xffc02b54
2099 15:43:58.695626 Loading segment from ROM address 0xffc02b38
2100 15:43:58.696240 code (compression=0)
2101 15:43:58.705668 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2102 15:43:58.715920 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2103 15:43:58.716509 it's not compressed!
2104 15:43:58.855603 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2105 15:43:58.862163 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2106 15:43:58.868845 Loading segment from ROM address 0xffc02b54
2107 15:43:58.869425 Entry Point 0x30000000
2108 15:43:58.872273 Loaded segments
2109 15:43:58.878697 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2110 15:43:58.921567 Finalizing chipset.
2111 15:43:58.924878 Finalizing SMM.
2112 15:43:58.925366 APMC done.
2113 15:43:58.931464 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2114 15:43:58.934935 mp_park_aps done after 0 msecs.
2115 15:43:58.937943 Jumping to boot code at 0x30000000(0x76b25000)
2116 15:43:58.947863 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2117 15:43:58.948359
2118 15:43:58.951471 Starting depthcharge on Voema...
2119 15:43:58.952668 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2120 15:43:58.953241 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2121 15:43:58.953707 Setting prompt string to ['volteer:']
2122 15:43:58.954161 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2123 15:43:58.961539 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2124 15:43:58.968170 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2125 15:43:58.974670 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2126 15:43:58.978122 Failed to find eMMC card reader
2127 15:43:58.978703 Wipe memory regions:
2128 15:43:58.984449 [0x00000000001000, 0x000000000a0000)
2129 15:43:58.987776 [0x00000000100000, 0x00000030000000)
2130 15:43:59.016413 [0x00000032662db0, 0x000000769ef000)
2131 15:43:59.055108 [0x00000100000000, 0x00000280400000)
2132 15:43:59.258376 ec_init: CrosEC protocol v3 supported (256, 256)
2133 15:43:59.690178 R8152: Initializing
2134 15:43:59.693383 Version 6 (ocp_data = 5c30)
2135 15:43:59.696649 R8152: Done initializing
2136 15:43:59.699725 Adding net device
2137 15:44:00.005270 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2138 15:44:00.005851
2139 15:44:00.008948 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2141 15:44:00.110980 volteer: tftpboot 192.168.201.1 7300438/tftp-deploy-ep8bqypb/kernel/bzImage 7300438/tftp-deploy-ep8bqypb/kernel/cmdline 7300438/tftp-deploy-ep8bqypb/ramdisk/ramdisk.cpio.gz
2142 15:44:00.111666 Setting prompt string to 'Starting kernel'
2143 15:44:00.112216 Setting prompt string to ['Starting kernel']
2144 15:44:00.112627 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2145 15:44:00.113047 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:04:42)
2146 15:44:00.116664 tftpboot 192.168.201.1 7300438/tftp-deploy-ep8bqypb/kernel/bzImoy-ep8bqypb/kernel/cmdline 7300438/tftp-deploy-ep8bqypb/ramdisk/ramdisk.cpio.gz
2147 15:44:00.117170 Waiting for link
2148 15:44:00.319528 done.
2149 15:44:00.320136 MAC: 00:24:32:30:77:76
2150 15:44:00.322848 Sending DHCP discover... done.
2151 15:44:00.325984 Waiting for reply... done.
2152 15:44:00.329534 Sending DHCP request... done.
2153 15:44:00.336138 Waiting for reply... done.
2154 15:44:00.336627 My ip is 192.168.201.15
2155 15:44:00.339689 The DHCP server ip is 192.168.201.1
2156 15:44:00.346229 TFTP server IP predefined by user: 192.168.201.1
2157 15:44:00.352380 Bootfile predefined by user: 7300438/tftp-deploy-ep8bqypb/kernel/bzImage
2158 15:44:00.355813 Sending tftp read request... done.
2159 15:44:00.359516 Waiting for the transfer...
2160 15:44:01.039792 00000000 ################################################################
2161 15:44:01.730179 00080000 ################################################################
2162 15:44:02.417350 00100000 ################################################################
2163 15:44:03.109563 00180000 ################################################################
2164 15:44:03.804142 00200000 ################################################################
2165 15:44:04.488426 00280000 ################################################################
2166 15:44:05.147518 00300000 ################################################################
2167 15:44:05.782625 00380000 ################################################################
2168 15:44:06.419066 00400000 ################################################################
2169 15:44:07.031858 00480000 ################################################################
2170 15:44:07.660696 00500000 ################################################################
2171 15:44:08.280007 00580000 ################################################################
2172 15:44:08.917615 00600000 ################################################################ done.
2173 15:44:08.920947 The bootfile was 6815632 bytes long.
2174 15:44:08.924352 Sending tftp read request... done.
2175 15:44:08.927700 Waiting for the transfer...
2176 15:44:09.641398 00000000 ################################################################
2177 15:44:10.359883 00080000 ################################################################
2178 15:44:11.090935 00100000 ################################################################
2179 15:44:11.756821 00180000 ################################################################
2180 15:44:12.304206 00200000 ################################################################
2181 15:44:12.857828 00280000 ################################################################
2182 15:44:13.403295 00300000 ################################################################
2183 15:44:13.982336 00380000 ################################################################
2184 15:44:14.576493 00400000 ################################################################
2185 15:44:15.091375 00480000 ################################################################
2186 15:44:15.332698 00500000 ############################# done.
2187 15:44:15.335904 Sending tftp read request... done.
2188 15:44:15.339076 Waiting for the transfer...
2189 15:44:15.339157 00000000 # done.
2190 15:44:15.349010 Command line loaded dynamically from TFTP file: 7300438/tftp-deploy-ep8bqypb/kernel/cmdline
2191 15:44:15.371978 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7300438/extract-nfsrootfs-ibb3b94y,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2192 15:44:15.375646 Shutting down all USB controllers.
2193 15:44:15.378961 Removing current net device
2194 15:44:15.381992 Finalizing coreboot
2195 15:44:15.388461 Exiting depthcharge with code 4 at timestamp: 25089186
2196 15:44:15.388546
2197 15:44:15.388622 Starting kernel ...
2198 15:44:15.388689
2199 15:44:15.388752
2200 15:44:15.389062 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2201 15:44:15.389162 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2202 15:44:15.389240 Setting prompt string to ['Linux version [0-9]']
2203 15:44:15.389321 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2204 15:44:15.389393 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:05:00)
2206 15:48:42.390174 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2208 15:48:42.391335 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2210 15:48:42.392255 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2213 15:48:42.393745 end: 2 depthcharge-action (duration 00:05:00) [common]
2215 15:48:42.394343 Cleaning after the job
2216 15:48:42.394426 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300438/tftp-deploy-ep8bqypb/ramdisk
2217 15:48:42.394895 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300438/tftp-deploy-ep8bqypb/kernel
2218 15:48:42.395396 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300438/tftp-deploy-ep8bqypb/nfsrootfs
2219 15:48:42.426952 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300438/tftp-deploy-ep8bqypb/modules
2220 15:48:42.427284 start: 5.1 power-off (timeout 00:00:30) [common]
2221 15:48:42.427446 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2222 15:48:42.446801 >> Command sent successfully.
2223 15:48:42.448695 Returned 0 in 0 seconds
2224 15:48:42.549912 end: 5.1 power-off (duration 00:00:00) [common]
2226 15:48:42.551498 start: 5.2 read-feedback (timeout 00:10:00) [common]
2227 15:48:42.552722 Listened to connection for namespace 'common' for up to 1s
2228 15:48:43.557549 Finalising connection for namespace 'common'
2229 15:48:43.558263 Disconnecting from shell: Finalise
2230 15:48:43.659775 end: 5.2 read-feedback (duration 00:00:01) [common]
2231 15:48:43.660460 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7300438
2232 15:48:43.797977 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7300438
2233 15:48:43.798173 JobError: Your job cannot terminate cleanly.