Boot log: asus-C436FA-Flip-hatch

    1 15:49:32.345187  lava-dispatcher, installed at version: 2022.06
    2 15:49:32.345367  start: 0 validate
    3 15:49:32.345498  Start time: 2022-09-17 15:49:32.345490+00:00 (UTC)
    4 15:49:32.345618  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:49:32.345740  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
    6 15:49:32.655677  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:49:32.656449  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-229-gb433f12afe250%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 15:49:32.946187  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:49:32.946905  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 15:49:33.240095  Using caching service: 'http://localhost/cache/?uri=%s'
   11 15:49:33.240797  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-229-gb433f12afe250%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 15:49:33.541762  validate duration: 1.20
   14 15:49:33.542043  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 15:49:33.542149  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 15:49:33.542244  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 15:49:33.542344  Not decompressing ramdisk as can be used compressed.
   18 15:49:33.542431  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220826.0/amd64/initrd.cpio.gz
   19 15:49:33.542501  saving as /var/lib/lava/dispatcher/tmp/7300492/tftp-deploy-x9y3b607/ramdisk/initrd.cpio.gz
   20 15:49:33.542563  total size: 5411076 (5MB)
   21 15:49:33.545568  progress   0% (0MB)
   22 15:49:33.548266  progress   5% (0MB)
   23 15:49:33.550253  progress  10% (0MB)
   24 15:49:33.552567  progress  15% (0MB)
   25 15:49:33.555011  progress  20% (1MB)
   26 15:49:33.557374  progress  25% (1MB)
   27 15:49:33.559467  progress  30% (1MB)
   28 15:49:33.561731  progress  35% (1MB)
   29 15:49:33.564226  progress  40% (2MB)
   30 15:49:33.566528  progress  45% (2MB)
   31 15:49:33.568694  progress  50% (2MB)
   32 15:49:33.571017  progress  55% (2MB)
   33 15:49:33.573465  progress  60% (3MB)
   34 15:49:33.576156  progress  65% (3MB)
   35 15:49:33.577953  progress  70% (3MB)
   36 15:49:33.580614  progress  75% (3MB)
   37 15:49:33.582685  progress  80% (4MB)
   38 15:49:33.584995  progress  85% (4MB)
   39 15:49:33.587118  progress  90% (4MB)
   40 15:49:33.589431  progress  95% (4MB)
   41 15:49:33.591711  progress 100% (5MB)
   42 15:49:33.591940  5MB downloaded in 0.05s (104.52MB/s)
   43 15:49:33.592089  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 15:49:33.592329  end: 1.1 download-retry (duration 00:00:00) [common]
   46 15:49:33.592415  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 15:49:33.592499  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 15:49:33.592599  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-229-gb433f12afe250/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 15:49:33.592665  saving as /var/lib/lava/dispatcher/tmp/7300492/tftp-deploy-x9y3b607/kernel/bzImage
   50 15:49:33.592724  total size: 6815632 (6MB)
   51 15:49:33.592783  No compression specified
   52 15:49:33.594741  progress   0% (0MB)
   53 15:49:33.597643  progress   5% (0MB)
   54 15:49:33.600499  progress  10% (0MB)
   55 15:49:33.603600  progress  15% (1MB)
   56 15:49:33.606262  progress  20% (1MB)
   57 15:49:33.609140  progress  25% (1MB)
   58 15:49:33.612352  progress  30% (1MB)
   59 15:49:33.614902  progress  35% (2MB)
   60 15:49:33.617972  progress  40% (2MB)
   61 15:49:33.620848  progress  45% (2MB)
   62 15:49:33.623539  progress  50% (3MB)
   63 15:49:33.626611  progress  55% (3MB)
   64 15:49:33.629489  progress  60% (3MB)
   65 15:49:33.632607  progress  65% (4MB)
   66 15:49:33.635251  progress  70% (4MB)
   67 15:49:33.638129  progress  75% (4MB)
   68 15:49:33.641280  progress  80% (5MB)
   69 15:49:33.644427  progress  85% (5MB)
   70 15:49:33.646965  progress  90% (5MB)
   71 15:49:33.649896  progress  95% (6MB)
   72 15:49:33.652563  progress 100% (6MB)
   73 15:49:33.652838  6MB downloaded in 0.06s (108.13MB/s)
   74 15:49:33.652990  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 15:49:33.653223  end: 1.2 download-retry (duration 00:00:00) [common]
   77 15:49:33.653309  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 15:49:33.653394  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 15:49:33.653497  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220826.0/amd64/full.rootfs.tar.xz
   80 15:49:33.653564  saving as /var/lib/lava/dispatcher/tmp/7300492/tftp-deploy-x9y3b607/nfsrootfs/full.rootfs.tar
   81 15:49:33.653624  total size: 207120848 (197MB)
   82 15:49:33.653682  Using unxz to decompress xz
   83 15:49:33.657984  progress   0% (0MB)
   84 15:49:34.208854  progress   5% (9MB)
   85 15:49:34.744507  progress  10% (19MB)
   86 15:49:35.334582  progress  15% (29MB)
   87 15:49:35.708033  progress  20% (39MB)
   88 15:49:36.057933  progress  25% (49MB)
   89 15:49:36.638368  progress  30% (59MB)
   90 15:49:37.174422  progress  35% (69MB)
   91 15:49:37.759040  progress  40% (79MB)
   92 15:49:38.301853  progress  45% (88MB)
   93 15:49:38.868424  progress  50% (98MB)
   94 15:49:39.478696  progress  55% (108MB)
   95 15:49:40.141625  progress  60% (118MB)
   96 15:49:40.284197  progress  65% (128MB)
   97 15:49:40.429374  progress  70% (138MB)
   98 15:49:40.524214  progress  75% (148MB)
   99 15:49:40.590654  progress  80% (158MB)
  100 15:49:40.660304  progress  85% (167MB)
  101 15:49:40.764409  progress  90% (177MB)
  102 15:49:41.025075  progress  95% (187MB)
  103 15:49:41.597607  progress 100% (197MB)
  104 15:49:41.603812  197MB downloaded in 7.95s (24.85MB/s)
  105 15:49:41.604102  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 15:49:41.604369  end: 1.3 download-retry (duration 00:00:08) [common]
  108 15:49:41.604460  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 15:49:41.604546  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 15:49:41.604659  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-229-gb433f12afe250/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 15:49:41.604732  saving as /var/lib/lava/dispatcher/tmp/7300492/tftp-deploy-x9y3b607/modules/modules.tar
  112 15:49:41.604794  total size: 51872 (0MB)
  113 15:49:41.604856  Using unxz to decompress xz
  114 15:49:41.609946  progress  63% (0MB)
  115 15:49:41.610300  progress 100% (0MB)
  116 15:49:41.613503  0MB downloaded in 0.01s (5.68MB/s)
  117 15:49:41.613754  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 15:49:41.614007  end: 1.4 download-retry (duration 00:00:00) [common]
  120 15:49:41.614102  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  121 15:49:41.614198  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  122 15:49:43.589513  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7300492/extract-nfsrootfs-wpn5qjys
  123 15:49:43.589747  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  124 15:49:43.589847  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  125 15:49:43.589978  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33
  126 15:49:43.590074  makedir: /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin
  127 15:49:43.590156  makedir: /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/tests
  128 15:49:43.590234  makedir: /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/results
  129 15:49:43.590329  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-add-keys
  130 15:49:43.590456  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-add-sources
  131 15:49:43.590567  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-background-process-start
  132 15:49:43.590674  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-background-process-stop
  133 15:49:43.590780  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-common-functions
  134 15:49:43.590884  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-echo-ipv4
  135 15:49:43.590989  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-install-packages
  136 15:49:43.591095  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-installed-packages
  137 15:49:43.591196  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-os-build
  138 15:49:43.591300  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-probe-channel
  139 15:49:43.591402  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-probe-ip
  140 15:49:43.591505  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-target-ip
  141 15:49:43.591608  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-target-mac
  142 15:49:43.591711  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-target-storage
  143 15:49:43.591816  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-test-case
  144 15:49:43.591927  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-test-event
  145 15:49:43.592029  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-test-feedback
  146 15:49:43.592132  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-test-raise
  147 15:49:43.592233  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-test-reference
  148 15:49:43.592336  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-test-runner
  149 15:49:43.592440  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-test-set
  150 15:49:43.592542  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-test-shell
  151 15:49:43.592645  Updating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-add-keys (debian)
  152 15:49:43.592751  Updating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-add-sources (debian)
  153 15:49:43.592856  Updating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-install-packages (debian)
  154 15:49:43.592961  Updating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-installed-packages (debian)
  155 15:49:43.593065  Updating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/bin/lava-os-build (debian)
  156 15:49:43.593156  Creating /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/environment
  157 15:49:43.593236  LAVA metadata
  158 15:49:43.593298  - LAVA_JOB_ID=7300492
  159 15:49:43.593360  - LAVA_DISPATCHER_IP=192.168.201.1
  160 15:49:43.593451  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  161 15:49:43.593513  skipped lava-vland-overlay
  162 15:49:43.593585  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  163 15:49:43.593664  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  164 15:49:43.593724  skipped lava-multinode-overlay
  165 15:49:43.593795  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  166 15:49:43.593871  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  167 15:49:43.593941  Loading test definitions
  168 15:49:43.594026  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
  169 15:49:43.594095  Using /lava-7300492 at stage 0
  170 15:49:43.594317  uuid=7300492_1.5.2.3.1 testdef=None
  171 15:49:43.594401  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  172 15:49:43.594484  start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
  173 15:49:43.594885  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  175 15:49:43.595106  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
  176 15:49:43.595574  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  178 15:49:43.595803  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
  179 15:49:43.596457  runner path: /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/0/tests/0_timesync-off test_uuid 7300492_1.5.2.3.1
  180 15:49:43.596601  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  182 15:49:43.596826  start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
  183 15:49:43.596897  Using /lava-7300492 at stage 0
  184 15:49:43.596990  Fetching tests from https://github.com/kernelci/test-definitions.git
  185 15:49:43.597068  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/0/tests/1_kselftest-filesystems'
  186 15:49:47.552236  Running '/usr/bin/git checkout kernelci.org
  187 15:49:47.683830  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
  188 15:49:47.684529  uuid=7300492_1.5.2.3.5 testdef=None
  189 15:49:47.684686  end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
  191 15:49:47.684954  start: 1.5.2.3.6 test-overlay (timeout 00:09:46) [common]
  192 15:49:47.685651  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  194 15:49:47.685885  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:46) [common]
  195 15:49:47.686838  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  197 15:49:47.687164  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:46) [common]
  198 15:49:47.688098  runner path: /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/0/tests/1_kselftest-filesystems test_uuid 7300492_1.5.2.3.5
  199 15:49:47.688186  BOARD='asus-C436FA-Flip-hatch'
  200 15:49:47.688251  BRANCH='cip-gitlab'
  201 15:49:47.688311  SKIPFILE='skipfile-lkft.yaml'
  202 15:49:47.688370  TESTPROG_URL='None'
  203 15:49:47.688428  TST_CASENAME=''
  204 15:49:47.688484  TST_CMDFILES='filesystems'
  205 15:49:47.688613  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  207 15:49:47.688820  Creating lava-test-runner.conf files
  208 15:49:47.688883  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7300492/lava-overlay-omil1d33/lava-7300492/0 for stage 0
  209 15:49:47.688971  - 0_timesync-off
  210 15:49:47.689068  - 1_kselftest-filesystems
  211 15:49:47.689165  end: 1.5.2.3 test-definition (duration 00:00:04) [common]
  212 15:49:47.689251  start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
  213 15:49:54.671411  end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
  214 15:49:54.671570  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
  215 15:49:54.671675  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  216 15:49:54.671773  end: 1.5.2 lava-overlay (duration 00:00:11) [common]
  217 15:49:54.671886  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
  218 15:49:54.771977  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  219 15:49:54.772310  start: 1.5.4 extract-modules (timeout 00:09:39) [common]
  220 15:49:54.772417  extracting modules file /var/lib/lava/dispatcher/tmp/7300492/tftp-deploy-x9y3b607/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7300492/extract-nfsrootfs-wpn5qjys
  221 15:49:54.776349  extracting modules file /var/lib/lava/dispatcher/tmp/7300492/tftp-deploy-x9y3b607/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7300492/extract-overlay-ramdisk-4mchw5du/ramdisk
  222 15:49:54.780032  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  223 15:49:54.780137  start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
  224 15:49:54.780220  [common] Applying overlay to NFS
  225 15:49:54.780291  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7300492/compress-overlay-rlkmnks5/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7300492/extract-nfsrootfs-wpn5qjys
  226 15:49:55.214337  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  227 15:49:55.214504  start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
  228 15:49:55.214599  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  229 15:49:55.214687  start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
  230 15:49:55.214771  Building ramdisk /var/lib/lava/dispatcher/tmp/7300492/extract-overlay-ramdisk-4mchw5du/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7300492/extract-overlay-ramdisk-4mchw5du/ramdisk
  231 15:49:55.247521  >> 24431 blocks

  232 15:49:55.700405  rename /var/lib/lava/dispatcher/tmp/7300492/extract-overlay-ramdisk-4mchw5du/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7300492/tftp-deploy-x9y3b607/ramdisk/ramdisk.cpio.gz
  233 15:49:55.700803  end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
  234 15:49:55.700917  start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
  235 15:49:55.701014  start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
  236 15:49:55.701104  No mkimage arch provided, not using FIT.
  237 15:49:55.701191  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  238 15:49:55.701276  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  239 15:49:55.701372  end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
  240 15:49:55.701460  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
  241 15:49:55.701535  No LXC device requested
  242 15:49:55.701618  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  243 15:49:55.701702  start: 1.7 deploy-device-env (timeout 00:09:38) [common]
  244 15:49:55.701782  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  245 15:49:55.701849  Checking files for TFTP limit of 4294967296 bytes.
  246 15:49:55.702225  end: 1 tftp-deploy (duration 00:00:22) [common]
  247 15:49:55.702328  start: 2 depthcharge-action (timeout 00:05:00) [common]
  248 15:49:55.702419  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  249 15:49:55.702546  substitutions:
  250 15:49:55.702612  - {DTB}: None
  251 15:49:55.702675  - {INITRD}: 7300492/tftp-deploy-x9y3b607/ramdisk/ramdisk.cpio.gz
  252 15:49:55.702734  - {KERNEL}: 7300492/tftp-deploy-x9y3b607/kernel/bzImage
  253 15:49:55.702791  - {LAVA_MAC}: None
  254 15:49:55.702846  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7300492/extract-nfsrootfs-wpn5qjys
  255 15:49:55.702903  - {NFS_SERVER_IP}: 192.168.201.1
  256 15:49:55.702957  - {PRESEED_CONFIG}: None
  257 15:49:55.703013  - {PRESEED_LOCAL}: None
  258 15:49:55.703068  - {RAMDISK}: 7300492/tftp-deploy-x9y3b607/ramdisk/ramdisk.cpio.gz
  259 15:49:55.703122  - {ROOT_PART}: None
  260 15:49:55.703176  - {ROOT}: None
  261 15:49:55.703230  - {SERVER_IP}: 192.168.201.1
  262 15:49:55.703283  - {TEE}: None
  263 15:49:55.703336  Parsed boot commands:
  264 15:49:55.703389  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  265 15:49:55.703535  Parsed boot commands: tftpboot 192.168.201.1 7300492/tftp-deploy-x9y3b607/kernel/bzImage 7300492/tftp-deploy-x9y3b607/kernel/cmdline 7300492/tftp-deploy-x9y3b607/ramdisk/ramdisk.cpio.gz
  266 15:49:55.703626  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  267 15:49:55.703712  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  268 15:49:55.703802  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  269 15:49:55.703930  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  270 15:49:55.704002  Not connected, no need to disconnect.
  271 15:49:55.704077  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  272 15:49:55.704156  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  273 15:49:55.704223  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  274 15:49:55.706876  Setting prompt string to ['lava-test: # ']
  275 15:49:55.707152  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  276 15:49:55.707250  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  277 15:49:55.707342  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  278 15:49:55.707434  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  279 15:49:55.707605  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  280 15:49:55.726187  >> Command sent successfully.

  281 15:49:55.728055  Returned 0 in 0 seconds
  282 15:49:55.829156  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  284 15:49:55.830469  end: 2.2.2 reset-device (duration 00:00:00) [common]
  285 15:49:55.830915  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  286 15:49:55.831298  Setting prompt string to 'Starting depthcharge on Helios...'
  287 15:49:55.831614  Changing prompt to 'Starting depthcharge on Helios...'
  288 15:49:55.832010  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  289 15:49:55.833162  [Enter `^Ec?' for help]
  290 15:50:02.351685  
  291 15:50:02.352373  
  292 15:50:02.361938  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  293 15:50:02.364993  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  294 15:50:02.371924  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  295 15:50:02.375068  CPU: AES supported, TXT NOT supported, VT supported
  296 15:50:02.381780  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  297 15:50:02.385059  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  298 15:50:02.391732  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  299 15:50:02.395254  VBOOT: Loading verstage.
  300 15:50:02.398320  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  301 15:50:02.404871  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  302 15:50:02.411364  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  303 15:50:02.411969  CBFS @ c08000 size 3f8000
  304 15:50:02.418167  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  305 15:50:02.421458  CBFS: Locating 'fallback/verstage'
  306 15:50:02.425062  CBFS: Found @ offset 10fb80 size 1072c
  307 15:50:02.428816  
  308 15:50:02.429307  
  309 15:50:02.439327  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  310 15:50:02.453051  Probing TPM: . done!
  311 15:50:02.456382  TPM ready after 0 ms
  312 15:50:02.459957  Connected to device vid:did:rid of 1ae0:0028:00
  313 15:50:02.469940  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  314 15:50:02.473265  Initialized TPM device CR50 revision 0
  315 15:50:02.508762  tlcl_send_startup: Startup return code is 0
  316 15:50:02.509438  TPM: setup succeeded
  317 15:50:02.521409  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  318 15:50:02.525279  Chrome EC: UHEPI supported
  319 15:50:02.528641  Phase 1
  320 15:50:02.532489  FMAP: area GBB found @ c05000 (12288 bytes)
  321 15:50:02.538477  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  322 15:50:02.539056  Phase 2
  323 15:50:02.542194  Phase 3
  324 15:50:02.545705  FMAP: area GBB found @ c05000 (12288 bytes)
  325 15:50:02.552005  VB2:vb2_report_dev_firmware() This is developer signed firmware
  326 15:50:02.558607  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  327 15:50:02.561880  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  328 15:50:02.568458  VB2:vb2_verify_keyblock() Checking keyblock signature...
  329 15:50:02.584102  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  330 15:50:02.587884  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  331 15:50:02.594118  VB2:vb2_verify_fw_preamble() Verifying preamble.
  332 15:50:02.598235  Phase 4
  333 15:50:02.601523  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
  334 15:50:02.608020  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  335 15:50:02.787901  VB2:vb2_rsa_verify_digest() Digest check failed!
  336 15:50:02.794470  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
  337 15:50:02.795050  Saving nvdata
  338 15:50:02.797610  Reboot requested (10020007)
  339 15:50:02.800656  board_reset() called!
  340 15:50:02.801133  full_reset() called!
  341 15:50:07.318629  
  342 15:50:07.319209  
  343 15:50:07.328740  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  344 15:50:07.332077  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  345 15:50:07.338504  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  346 15:50:07.341712  CPU: AES supported, TXT NOT supported, VT supported
  347 15:50:07.348353  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  348 15:50:07.351695  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  349 15:50:07.358278  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  350 15:50:07.361371  VBOOT: Loading verstage.
  351 15:50:07.364987  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  352 15:50:07.372070  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  353 15:50:07.378344  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  354 15:50:07.378938  CBFS @ c08000 size 3f8000
  355 15:50:07.384894  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  356 15:50:07.388451  CBFS: Locating 'fallback/verstage'
  357 15:50:07.391285  CBFS: Found @ offset 10fb80 size 1072c
  358 15:50:07.396105  
  359 15:50:07.396711  
  360 15:50:07.405340  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  361 15:50:07.420033  Probing TPM: . done!
  362 15:50:07.423449  TPM ready after 0 ms
  363 15:50:07.426953  Connected to device vid:did:rid of 1ae0:0028:00
  364 15:50:07.436677  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  365 15:50:07.440028  Initialized TPM device CR50 revision 0
  366 15:50:07.475812  tlcl_send_startup: Startup return code is 0
  367 15:50:07.476445  TPM: setup succeeded
  368 15:50:07.488153  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  369 15:50:07.492192  Chrome EC: UHEPI supported
  370 15:50:07.495301  Phase 1
  371 15:50:07.498584  FMAP: area GBB found @ c05000 (12288 bytes)
  372 15:50:07.505536  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  373 15:50:07.512188  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  374 15:50:07.515342  Recovery requested (1009000e)
  375 15:50:07.521172  Saving nvdata
  376 15:50:07.527300  tlcl_extend: response is 0
  377 15:50:07.535792  tlcl_extend: response is 0
  378 15:50:07.543082  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  379 15:50:07.545860  CBFS @ c08000 size 3f8000
  380 15:50:07.552811  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  381 15:50:07.556004  CBFS: Locating 'fallback/romstage'
  382 15:50:07.559292  CBFS: Found @ offset 80 size 145fc
  383 15:50:07.562880  Accumulated console time in verstage 98 ms
  384 15:50:07.563466  
  385 15:50:07.563883  
  386 15:50:07.576194  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
  387 15:50:07.582968  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  388 15:50:07.586286  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  389 15:50:07.589487  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  390 15:50:07.596492  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
  391 15:50:07.599136  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  392 15:50:07.602672  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
  393 15:50:07.605723  TCO_STS:   0000 0000
  394 15:50:07.609227  GEN_PMCON: e0015238 00000200
  395 15:50:07.612363  GBLRST_CAUSE: 00000000 00000000
  396 15:50:07.612947  prev_sleep_state 5
  397 15:50:07.615777  Boot Count incremented to 38740
  398 15:50:07.622858  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  399 15:50:07.625732  CBFS @ c08000 size 3f8000
  400 15:50:07.632274  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  401 15:50:07.632875  CBFS: Locating 'fspm.bin'
  402 15:50:07.639682  CBFS: Found @ offset 5ffc0 size 71000
  403 15:50:07.642524  Chrome EC: UHEPI supported
  404 15:50:07.648912  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
  405 15:50:07.652913  Probing TPM:  done!
  406 15:50:07.659803  Connected to device vid:did:rid of 1ae0:0028:00
  407 15:50:07.669221  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  408 15:50:07.675283  Initialized TPM device CR50 revision 0
  409 15:50:07.683934  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  410 15:50:07.690558  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  411 15:50:07.693936  MRC cache found, size 1948
  412 15:50:07.696938  bootmode is set to: 2
  413 15:50:07.700173  PRMRR disabled by config.
  414 15:50:07.704010  SPD INDEX = 1
  415 15:50:07.707590  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  416 15:50:07.710211  CBFS @ c08000 size 3f8000
  417 15:50:07.717119  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  418 15:50:07.717769  CBFS: Locating 'spd.bin'
  419 15:50:07.720107  CBFS: Found @ offset 5fb80 size 400
  420 15:50:07.723273  SPD: module type is LPDDR3
  421 15:50:07.726883  SPD: module part is 
  422 15:50:07.733551  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
  423 15:50:07.737028  SPD: device width 4 bits, bus width 8 bits
  424 15:50:07.740333  SPD: module size is 4096 MB (per channel)
  425 15:50:07.743562  memory slot: 0 configuration done.
  426 15:50:07.746902  memory slot: 2 configuration done.
  427 15:50:07.798191  CBMEM:
  428 15:50:07.801453  IMD: root @ 99fff000 254 entries.
  429 15:50:07.805111  IMD: root @ 99ffec00 62 entries.
  430 15:50:07.808288  External stage cache:
  431 15:50:07.811505  IMD: root @ 9abff000 254 entries.
  432 15:50:07.814614  IMD: root @ 9abfec00 62 entries.
  433 15:50:07.817982  Chrome EC: clear events_b mask to 0x0000000020004000
  434 15:50:07.833937  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  435 15:50:07.847714  tlcl_write: response is 0
  436 15:50:07.856351  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  437 15:50:07.863303  MRC: TPM MRC hash updated successfully.
  438 15:50:07.863910  2 DIMMs found
  439 15:50:07.866179  SMM Memory Map
  440 15:50:07.869344  SMRAM       : 0x9a000000 0x1000000
  441 15:50:07.873283   Subregion 0: 0x9a000000 0xa00000
  442 15:50:07.876529   Subregion 1: 0x9aa00000 0x200000
  443 15:50:07.879701   Subregion 2: 0x9ac00000 0x400000
  444 15:50:07.883019  top_of_ram = 0x9a000000
  445 15:50:07.886428  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
  446 15:50:07.892990  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
  447 15:50:07.896644  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  448 15:50:07.902980  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  449 15:50:07.906383  CBFS @ c08000 size 3f8000
  450 15:50:07.909708  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  451 15:50:07.913001  CBFS: Locating 'fallback/postcar'
  452 15:50:07.916108  CBFS: Found @ offset 107000 size 4b44
  453 15:50:07.923337  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
  454 15:50:07.935821  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
  455 15:50:07.938375  Processing 180 relocs. Offset value of 0x97c0c000
  456 15:50:07.947045  Accumulated console time in romstage 286 ms
  457 15:50:07.947632  
  458 15:50:07.948069  
  459 15:50:07.957018  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
  460 15:50:07.963362  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  461 15:50:07.967149  CBFS @ c08000 size 3f8000
  462 15:50:07.970371  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  463 15:50:07.976578  CBFS: Locating 'fallback/ramstage'
  464 15:50:07.979905  CBFS: Found @ offset 43380 size 1b9e8
  465 15:50:07.987280  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
  466 15:50:08.018885  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
  467 15:50:08.022106  Processing 3976 relocs. Offset value of 0x98db0000
  468 15:50:08.028662  Accumulated console time in postcar 52 ms
  469 15:50:08.029269  
  470 15:50:08.029703  
  471 15:50:08.038696  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
  472 15:50:08.045397  FMAP: area RO_VPD found @ c00000 (16384 bytes)
  473 15:50:08.048766  WARNING: RO_VPD is uninitialized or empty.
  474 15:50:08.052609  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  475 15:50:08.058621  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  476 15:50:08.059211  Normal boot.
  477 15:50:08.065338  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
  478 15:50:08.069019  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  479 15:50:08.072029  CBFS @ c08000 size 3f8000
  480 15:50:08.078373  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  481 15:50:08.082148  CBFS: Locating 'cpu_microcode_blob.bin'
  482 15:50:08.085231  CBFS: Found @ offset 14700 size 2ec00
  483 15:50:08.088488  microcode: sig=0x806ec pf=0x4 revision=0xc9
  484 15:50:08.092572  Skip microcode update
  485 15:50:08.098975  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  486 15:50:08.099566  CBFS @ c08000 size 3f8000
  487 15:50:08.105209  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  488 15:50:08.107947  CBFS: Locating 'fsps.bin'
  489 15:50:08.111801  CBFS: Found @ offset d1fc0 size 35000
  490 15:50:08.137321  Detected 4 core, 8 thread CPU.
  491 15:50:08.141373  Setting up SMI for CPU
  492 15:50:08.143969  IED base = 0x9ac00000
  493 15:50:08.144558  IED size = 0x00400000
  494 15:50:08.146855  Will perform SMM setup.
  495 15:50:08.154086  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
  496 15:50:08.159947  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  497 15:50:08.163824  Processing 16 relocs. Offset value of 0x00030000
  498 15:50:08.167392  Attempting to start 7 APs
  499 15:50:08.170567  Waiting for 10ms after sending INIT.
  500 15:50:08.187428  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
  501 15:50:08.188062  done.
  502 15:50:08.190876  AP: slot 5 apic_id 4.
  503 15:50:08.193685  AP: slot 6 apic_id 5.
  504 15:50:08.196744  Waiting for 2nd SIPI to complete...done.
  505 15:50:08.200204  AP: slot 7 apic_id 6.
  506 15:50:08.200826  AP: slot 2 apic_id 7.
  507 15:50:08.203229  AP: slot 1 apic_id 2.
  508 15:50:08.206929  AP: slot 4 apic_id 3.
  509 15:50:08.213215  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  510 15:50:08.216540  Processing 13 relocs. Offset value of 0x00038000
  511 15:50:08.222928  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
  512 15:50:08.229684  Installing SMM handler to 0x9a000000
  513 15:50:08.236787  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
  514 15:50:08.240136  Processing 658 relocs. Offset value of 0x9a010000
  515 15:50:08.249700  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
  516 15:50:08.253136  Processing 13 relocs. Offset value of 0x9a008000
  517 15:50:08.259813  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
  518 15:50:08.265770  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
  519 15:50:08.272733  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
  520 15:50:08.276009  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
  521 15:50:08.283048  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
  522 15:50:08.289894  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
  523 15:50:08.292715  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
  524 15:50:08.299139  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
  525 15:50:08.303533  Clearing SMI status registers
  526 15:50:08.305745  SMI_STS: PM1 
  527 15:50:08.306225  PM1_STS: PWRBTN 
  528 15:50:08.309209  TCO_STS: SECOND_TO 
  529 15:50:08.312572  New SMBASE 0x9a000000
  530 15:50:08.316279  In relocation handler: CPU 0
  531 15:50:08.319250  New SMBASE=0x9a000000 IEDBASE=0x9ac00000
  532 15:50:08.322784  Writing SMRR. base = 0x9a000006, mask=0xff000800
  533 15:50:08.326711  Relocation complete.
  534 15:50:08.329573  New SMBASE 0x99fff400
  535 15:50:08.330143  In relocation handler: CPU 3
  536 15:50:08.336096  New SMBASE=0x99fff400 IEDBASE=0x9ac00000
  537 15:50:08.339497  Writing SMRR. base = 0x9a000006, mask=0xff000800
  538 15:50:08.342664  Relocation complete.
  539 15:50:08.346227  New SMBASE 0x99fffc00
  540 15:50:08.346810  In relocation handler: CPU 1
  541 15:50:08.352708  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
  542 15:50:08.356008  Writing SMRR. base = 0x9a000006, mask=0xff000800
  543 15:50:08.359320  Relocation complete.
  544 15:50:08.359935  New SMBASE 0x99fff000
  545 15:50:08.362631  In relocation handler: CPU 4
  546 15:50:08.369394  New SMBASE=0x99fff000 IEDBASE=0x9ac00000
  547 15:50:08.372569  Writing SMRR. base = 0x9a000006, mask=0xff000800
  548 15:50:08.376195  Relocation complete.
  549 15:50:08.376770  New SMBASE 0x99ffe400
  550 15:50:08.379243  In relocation handler: CPU 7
  551 15:50:08.382235  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
  552 15:50:08.389118  Writing SMRR. base = 0x9a000006, mask=0xff000800
  553 15:50:08.392463  Relocation complete.
  554 15:50:08.393042  New SMBASE 0x99fff800
  555 15:50:08.395881  In relocation handler: CPU 2
  556 15:50:08.399063  New SMBASE=0x99fff800 IEDBASE=0x9ac00000
  557 15:50:08.405933  Writing SMRR. base = 0x9a000006, mask=0xff000800
  558 15:50:08.408838  Relocation complete.
  559 15:50:08.409321  New SMBASE 0x99ffec00
  560 15:50:08.412416  In relocation handler: CPU 5
  561 15:50:08.415702  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
  562 15:50:08.422375  Writing SMRR. base = 0x9a000006, mask=0xff000800
  563 15:50:08.422955  Relocation complete.
  564 15:50:08.425774  New SMBASE 0x99ffe800
  565 15:50:08.428904  In relocation handler: CPU 6
  566 15:50:08.432433  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
  567 15:50:08.439310  Writing SMRR. base = 0x9a000006, mask=0xff000800
  568 15:50:08.439926  Relocation complete.
  569 15:50:08.442641  Initializing CPU #0
  570 15:50:08.445490  CPU: vendor Intel device 806ec
  571 15:50:08.448890  CPU: family 06, model 8e, stepping 0c
  572 15:50:08.452104  Clearing out pending MCEs
  573 15:50:08.455516  Setting up local APIC...
  574 15:50:08.456148   apic_id: 0x00 done.
  575 15:50:08.458920  Turbo is available but hidden
  576 15:50:08.462368  Turbo is available and visible
  577 15:50:08.465398  VMX status: enabled
  578 15:50:08.468459  IA32_FEATURE_CONTROL status: locked
  579 15:50:08.472714  Skip microcode update
  580 15:50:08.473313  CPU #0 initialized
  581 15:50:08.475137  Initializing CPU #3
  582 15:50:08.478597  Initializing CPU #5
  583 15:50:08.479075  Initializing CPU #6
  584 15:50:08.482193  CPU: vendor Intel device 806ec
  585 15:50:08.485562  CPU: family 06, model 8e, stepping 0c
  586 15:50:08.488911  CPU: vendor Intel device 806ec
  587 15:50:08.492332  CPU: family 06, model 8e, stepping 0c
  588 15:50:08.495483  Clearing out pending MCEs
  589 15:50:08.498697  Initializing CPU #1
  590 15:50:08.499271  Initializing CPU #4
  591 15:50:08.501926  CPU: vendor Intel device 806ec
  592 15:50:08.504903  CPU: family 06, model 8e, stepping 0c
  593 15:50:08.508252  CPU: vendor Intel device 806ec
  594 15:50:08.511682  CPU: family 06, model 8e, stepping 0c
  595 15:50:08.515451  Clearing out pending MCEs
  596 15:50:08.518472  Clearing out pending MCEs
  597 15:50:08.522107  Setting up local APIC...
  598 15:50:08.525547  CPU: vendor Intel device 806ec
  599 15:50:08.528227  CPU: family 06, model 8e, stepping 0c
  600 15:50:08.531725  Clearing out pending MCEs
  601 15:50:08.532370  Setting up local APIC...
  602 15:50:08.534844  Setting up local APIC...
  603 15:50:08.538581  Clearing out pending MCEs
  604 15:50:08.542341  Setting up local APIC...
  605 15:50:08.542915   apic_id: 0x01 done.
  606 15:50:08.545030  Initializing CPU #7
  607 15:50:08.548808  Initializing CPU #2
  608 15:50:08.551822  CPU: vendor Intel device 806ec
  609 15:50:08.554928  CPU: family 06, model 8e, stepping 0c
  610 15:50:08.558873  CPU: vendor Intel device 806ec
  611 15:50:08.561557  CPU: family 06, model 8e, stepping 0c
  612 15:50:08.565324  Clearing out pending MCEs
  613 15:50:08.565899  Clearing out pending MCEs
  614 15:50:08.568041   apic_id: 0x03 done.
  615 15:50:08.571611   apic_id: 0x02 done.
  616 15:50:08.572214  VMX status: enabled
  617 15:50:08.575093  VMX status: enabled
  618 15:50:08.577932  IA32_FEATURE_CONTROL status: locked
  619 15:50:08.581214  IA32_FEATURE_CONTROL status: locked
  620 15:50:08.584700  Skip microcode update
  621 15:50:08.585286  Skip microcode update
  622 15:50:08.588043  CPU #4 initialized
  623 15:50:08.591669  CPU #1 initialized
  624 15:50:08.592289  Setting up local APIC...
  625 15:50:08.594486  Setting up local APIC...
  626 15:50:08.597919  VMX status: enabled
  627 15:50:08.598395   apic_id: 0x07 done.
  628 15:50:08.600950  Setting up local APIC...
  629 15:50:08.604486   apic_id: 0x05 done.
  630 15:50:08.607735   apic_id: 0x04 done.
  631 15:50:08.608246  VMX status: enabled
  632 15:50:08.611695  VMX status: enabled
  633 15:50:08.614904  IA32_FEATURE_CONTROL status: locked
  634 15:50:08.618079  IA32_FEATURE_CONTROL status: locked
  635 15:50:08.621466  Skip microcode update
  636 15:50:08.622043  Skip microcode update
  637 15:50:08.625385  CPU #6 initialized
  638 15:50:08.625964  CPU #5 initialized
  639 15:50:08.628040   apic_id: 0x06 done.
  640 15:50:08.631602  VMX status: enabled
  641 15:50:08.632122  VMX status: enabled
  642 15:50:08.634784  IA32_FEATURE_CONTROL status: locked
  643 15:50:08.637571  IA32_FEATURE_CONTROL status: locked
  644 15:50:08.641680  Skip microcode update
  645 15:50:08.644144  Skip microcode update
  646 15:50:08.644623  CPU #2 initialized
  647 15:50:08.647783  CPU #7 initialized
  648 15:50:08.651127  IA32_FEATURE_CONTROL status: locked
  649 15:50:08.654593  Skip microcode update
  650 15:50:08.655168  CPU #3 initialized
  651 15:50:08.660802  bsp_do_flight_plan done after 461 msecs.
  652 15:50:08.664161  CPU: frequency set to 4200 MHz
  653 15:50:08.664641  Enabling SMIs.
  654 15:50:08.667788  Locking SMM.
  655 15:50:08.680653  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  656 15:50:08.684017  CBFS @ c08000 size 3f8000
  657 15:50:08.690977  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  658 15:50:08.691571  CBFS: Locating 'vbt.bin'
  659 15:50:08.693975  CBFS: Found @ offset 5f5c0 size 499
  660 15:50:08.701215  Found a VBT of 4608 bytes after decompression
  661 15:50:08.885565  Display FSP Version Info HOB
  662 15:50:08.888687  Reference Code - CPU = 9.0.1e.30
  663 15:50:08.892504  uCode Version = 0.0.0.ca
  664 15:50:08.895481  TXT ACM version = ff.ff.ff.ffff
  665 15:50:08.899010  Display FSP Version Info HOB
  666 15:50:08.902026  Reference Code - ME = 9.0.1e.30
  667 15:50:08.905155  MEBx version = 0.0.0.0
  668 15:50:08.908460  ME Firmware Version = Consumer SKU
  669 15:50:08.911776  Display FSP Version Info HOB
  670 15:50:08.915446  Reference Code - CML PCH = 9.0.1e.30
  671 15:50:08.918646  PCH-CRID Status = Disabled
  672 15:50:08.921782  PCH-CRID Original Value = ff.ff.ff.ffff
  673 15:50:08.925574  PCH-CRID New Value = ff.ff.ff.ffff
  674 15:50:08.928374  OPROM - RST - RAID = ff.ff.ff.ffff
  675 15:50:08.932032  ChipsetInit Base Version = ff.ff.ff.ffff
  676 15:50:08.935399  ChipsetInit Oem Version = ff.ff.ff.ffff
  677 15:50:08.938797  Display FSP Version Info HOB
  678 15:50:08.945262  Reference Code - SA - System Agent = 9.0.1e.30
  679 15:50:08.948672  Reference Code - MRC = 0.7.1.6c
  680 15:50:08.949151  SA - PCIe Version = 9.0.1e.30
  681 15:50:08.951687  SA-CRID Status = Disabled
  682 15:50:08.954929  SA-CRID Original Value = 0.0.0.c
  683 15:50:08.958376  SA-CRID New Value = 0.0.0.c
  684 15:50:08.961961  OPROM - VBIOS = ff.ff.ff.ffff
  685 15:50:08.965090  RTC Init
  686 15:50:08.968377  Set power on after power failure.
  687 15:50:08.968967  Disabling Deep S3
  688 15:50:08.971443  Disabling Deep S3
  689 15:50:08.971964  Disabling Deep S4
  690 15:50:08.974969  Disabling Deep S4
  691 15:50:08.978164  Disabling Deep S5
  692 15:50:08.978806  Disabling Deep S5
  693 15:50:08.984864  BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 195 exit 1
  694 15:50:08.985441  Enumerating buses...
  695 15:50:08.991479  Show all devs... Before device enumeration.
  696 15:50:08.992114  Root Device: enabled 1
  697 15:50:08.994968  CPU_CLUSTER: 0: enabled 1
  698 15:50:08.997847  DOMAIN: 0000: enabled 1
  699 15:50:09.001590  APIC: 00: enabled 1
  700 15:50:09.002168  PCI: 00:00.0: enabled 1
  701 15:50:09.004555  PCI: 00:02.0: enabled 1
  702 15:50:09.008142  PCI: 00:04.0: enabled 0
  703 15:50:09.011523  PCI: 00:05.0: enabled 0
  704 15:50:09.012061  PCI: 00:12.0: enabled 1
  705 15:50:09.014306  PCI: 00:12.5: enabled 0
  706 15:50:09.018761  PCI: 00:12.6: enabled 0
  707 15:50:09.021439  PCI: 00:14.0: enabled 1
  708 15:50:09.021918  PCI: 00:14.1: enabled 0
  709 15:50:09.024306  PCI: 00:14.3: enabled 1
  710 15:50:09.028224  PCI: 00:14.5: enabled 0
  711 15:50:09.028805  PCI: 00:15.0: enabled 1
  712 15:50:09.031790  PCI: 00:15.1: enabled 1
  713 15:50:09.034980  PCI: 00:15.2: enabled 0
  714 15:50:09.037808  PCI: 00:15.3: enabled 0
  715 15:50:09.038289  PCI: 00:16.0: enabled 1
  716 15:50:09.041141  PCI: 00:16.1: enabled 0
  717 15:50:09.044630  PCI: 00:16.2: enabled 0
  718 15:50:09.048123  PCI: 00:16.3: enabled 0
  719 15:50:09.048698  PCI: 00:16.4: enabled 0
  720 15:50:09.051529  PCI: 00:16.5: enabled 0
  721 15:50:09.054576  PCI: 00:17.0: enabled 1
  722 15:50:09.055182  PCI: 00:19.0: enabled 1
  723 15:50:09.058254  PCI: 00:19.1: enabled 0
  724 15:50:09.061293  PCI: 00:19.2: enabled 0
  725 15:50:09.064534  PCI: 00:1a.0: enabled 0
  726 15:50:09.065114  PCI: 00:1c.0: enabled 0
  727 15:50:09.067435  PCI: 00:1c.1: enabled 0
  728 15:50:09.070883  PCI: 00:1c.2: enabled 0
  729 15:50:09.074442  PCI: 00:1c.3: enabled 0
  730 15:50:09.075030  PCI: 00:1c.4: enabled 0
  731 15:50:09.077318  PCI: 00:1c.5: enabled 0
  732 15:50:09.081621  PCI: 00:1c.6: enabled 0
  733 15:50:09.084263  PCI: 00:1c.7: enabled 0
  734 15:50:09.084742  PCI: 00:1d.0: enabled 1
  735 15:50:09.087744  PCI: 00:1d.1: enabled 0
  736 15:50:09.090810  PCI: 00:1d.2: enabled 0
  737 15:50:09.091386  PCI: 00:1d.3: enabled 0
  738 15:50:09.094565  PCI: 00:1d.4: enabled 0
  739 15:50:09.098306  PCI: 00:1d.5: enabled 1
  740 15:50:09.100781  PCI: 00:1e.0: enabled 1
  741 15:50:09.101264  PCI: 00:1e.1: enabled 0
  742 15:50:09.103971  PCI: 00:1e.2: enabled 1
  743 15:50:09.107344  PCI: 00:1e.3: enabled 1
  744 15:50:09.110981  PCI: 00:1f.0: enabled 1
  745 15:50:09.111458  PCI: 00:1f.1: enabled 1
  746 15:50:09.114265  PCI: 00:1f.2: enabled 1
  747 15:50:09.117554  PCI: 00:1f.3: enabled 1
  748 15:50:09.120623  PCI: 00:1f.4: enabled 1
  749 15:50:09.121121  PCI: 00:1f.5: enabled 1
  750 15:50:09.124119  PCI: 00:1f.6: enabled 0
  751 15:50:09.127374  USB0 port 0: enabled 1
  752 15:50:09.127996  I2C: 00:15: enabled 1
  753 15:50:09.131116  I2C: 00:5d: enabled 1
  754 15:50:09.134165  GENERIC: 0.0: enabled 1
  755 15:50:09.137128  I2C: 00:1a: enabled 1
  756 15:50:09.137607  I2C: 00:38: enabled 1
  757 15:50:09.140660  I2C: 00:39: enabled 1
  758 15:50:09.143931  I2C: 00:3a: enabled 1
  759 15:50:09.144507  I2C: 00:3b: enabled 1
  760 15:50:09.147505  PCI: 00:00.0: enabled 1
  761 15:50:09.150922  SPI: 00: enabled 1
  762 15:50:09.151495  SPI: 01: enabled 1
  763 15:50:09.154029  PNP: 0c09.0: enabled 1
  764 15:50:09.157153  USB2 port 0: enabled 1
  765 15:50:09.157731  USB2 port 1: enabled 1
  766 15:50:09.160501  USB2 port 2: enabled 0
  767 15:50:09.164074  USB2 port 3: enabled 0
  768 15:50:09.164652  USB2 port 5: enabled 0
  769 15:50:09.166955  USB2 port 6: enabled 1
  770 15:50:09.170050  USB2 port 9: enabled 1
  771 15:50:09.170562  USB3 port 0: enabled 1
  772 15:50:09.173858  USB3 port 1: enabled 1
  773 15:50:09.177029  USB3 port 2: enabled 1
  774 15:50:09.180431  USB3 port 3: enabled 1
  775 15:50:09.181009  USB3 port 4: enabled 0
  776 15:50:09.183673  APIC: 02: enabled 1
  777 15:50:09.187046  APIC: 07: enabled 1
  778 15:50:09.187628  APIC: 01: enabled 1
  779 15:50:09.190239  APIC: 03: enabled 1
  780 15:50:09.190821  APIC: 04: enabled 1
  781 15:50:09.193187  APIC: 05: enabled 1
  782 15:50:09.196408  APIC: 06: enabled 1
  783 15:50:09.196888  Compare with tree...
  784 15:50:09.200209  Root Device: enabled 1
  785 15:50:09.203627   CPU_CLUSTER: 0: enabled 1
  786 15:50:09.204246    APIC: 00: enabled 1
  787 15:50:09.206715    APIC: 02: enabled 1
  788 15:50:09.210284    APIC: 07: enabled 1
  789 15:50:09.210766    APIC: 01: enabled 1
  790 15:50:09.213364    APIC: 03: enabled 1
  791 15:50:09.216540    APIC: 04: enabled 1
  792 15:50:09.219774    APIC: 05: enabled 1
  793 15:50:09.220284    APIC: 06: enabled 1
  794 15:50:09.223078   DOMAIN: 0000: enabled 1
  795 15:50:09.226278    PCI: 00:00.0: enabled 1
  796 15:50:09.230029    PCI: 00:02.0: enabled 1
  797 15:50:09.230507    PCI: 00:04.0: enabled 0
  798 15:50:09.233451    PCI: 00:05.0: enabled 0
  799 15:50:09.236533    PCI: 00:12.0: enabled 1
  800 15:50:09.239942    PCI: 00:12.5: enabled 0
  801 15:50:09.243487    PCI: 00:12.6: enabled 0
  802 15:50:09.244100    PCI: 00:14.0: enabled 1
  803 15:50:09.246544     USB0 port 0: enabled 1
  804 15:50:09.250027      USB2 port 0: enabled 1
  805 15:50:09.253330      USB2 port 1: enabled 1
  806 15:50:09.257079      USB2 port 2: enabled 0
  807 15:50:09.257665      USB2 port 3: enabled 0
  808 15:50:09.260448      USB2 port 5: enabled 0
  809 15:50:09.263186      USB2 port 6: enabled 1
  810 15:50:09.266744      USB2 port 9: enabled 1
  811 15:50:09.269571      USB3 port 0: enabled 1
  812 15:50:09.270052      USB3 port 1: enabled 1
  813 15:50:09.273329      USB3 port 2: enabled 1
  814 15:50:09.276829      USB3 port 3: enabled 1
  815 15:50:09.280105      USB3 port 4: enabled 0
  816 15:50:09.283941    PCI: 00:14.1: enabled 0
  817 15:50:09.286585    PCI: 00:14.3: enabled 1
  818 15:50:09.287191    PCI: 00:14.5: enabled 0
  819 15:50:09.289953    PCI: 00:15.0: enabled 1
  820 15:50:09.293054     I2C: 00:15: enabled 1
  821 15:50:09.296422    PCI: 00:15.1: enabled 1
  822 15:50:09.296998     I2C: 00:5d: enabled 1
  823 15:50:09.299800     GENERIC: 0.0: enabled 1
  824 15:50:09.303612    PCI: 00:15.2: enabled 0
  825 15:50:09.306503    PCI: 00:15.3: enabled 0
  826 15:50:09.309601    PCI: 00:16.0: enabled 1
  827 15:50:09.310112    PCI: 00:16.1: enabled 0
  828 15:50:09.312877    PCI: 00:16.2: enabled 0
  829 15:50:09.316876    PCI: 00:16.3: enabled 0
  830 15:50:09.319814    PCI: 00:16.4: enabled 0
  831 15:50:09.322908    PCI: 00:16.5: enabled 0
  832 15:50:09.323434    PCI: 00:17.0: enabled 1
  833 15:50:09.325828    PCI: 00:19.0: enabled 1
  834 15:50:09.329518     I2C: 00:1a: enabled 1
  835 15:50:09.332765     I2C: 00:38: enabled 1
  836 15:50:09.333354     I2C: 00:39: enabled 1
  837 15:50:09.336370     I2C: 00:3a: enabled 1
  838 15:50:09.339880     I2C: 00:3b: enabled 1
  839 15:50:09.342694    PCI: 00:19.1: enabled 0
  840 15:50:09.346084    PCI: 00:19.2: enabled 0
  841 15:50:09.346670    PCI: 00:1a.0: enabled 0
  842 15:50:09.349635    PCI: 00:1c.0: enabled 0
  843 15:50:09.352920    PCI: 00:1c.1: enabled 0
  844 15:50:09.356298    PCI: 00:1c.2: enabled 0
  845 15:50:09.359923    PCI: 00:1c.3: enabled 0
  846 15:50:09.360517    PCI: 00:1c.4: enabled 0
  847 15:50:09.362792    PCI: 00:1c.5: enabled 0
  848 15:50:09.366091    PCI: 00:1c.6: enabled 0
  849 15:50:09.369558    PCI: 00:1c.7: enabled 0
  850 15:50:09.370129    PCI: 00:1d.0: enabled 1
  851 15:50:09.372487    PCI: 00:1d.1: enabled 0
  852 15:50:09.375887    PCI: 00:1d.2: enabled 0
  853 15:50:09.379587    PCI: 00:1d.3: enabled 0
  854 15:50:09.382726    PCI: 00:1d.4: enabled 0
  855 15:50:09.383302    PCI: 00:1d.5: enabled 1
  856 15:50:09.387039     PCI: 00:00.0: enabled 1
  857 15:50:09.389477    PCI: 00:1e.0: enabled 1
  858 15:50:09.392450    PCI: 00:1e.1: enabled 0
  859 15:50:09.396344    PCI: 00:1e.2: enabled 1
  860 15:50:09.396918     SPI: 00: enabled 1
  861 15:50:09.399227    PCI: 00:1e.3: enabled 1
  862 15:50:09.402520     SPI: 01: enabled 1
  863 15:50:09.405857    PCI: 00:1f.0: enabled 1
  864 15:50:09.406471     PNP: 0c09.0: enabled 1
  865 15:50:09.409186    PCI: 00:1f.1: enabled 1
  866 15:50:09.412269    PCI: 00:1f.2: enabled 1
  867 15:50:09.415539    PCI: 00:1f.3: enabled 1
  868 15:50:09.419052    PCI: 00:1f.4: enabled 1
  869 15:50:09.419666    PCI: 00:1f.5: enabled 1
  870 15:50:09.422406    PCI: 00:1f.6: enabled 0
  871 15:50:09.425436  Root Device scanning...
  872 15:50:09.429276  scan_static_bus for Root Device
  873 15:50:09.432792  CPU_CLUSTER: 0 enabled
  874 15:50:09.433299  DOMAIN: 0000 enabled
  875 15:50:09.436124  DOMAIN: 0000 scanning...
  876 15:50:09.439039  PCI: pci_scan_bus for bus 00
  877 15:50:09.442498  PCI: 00:00.0 [8086/0000] ops
  878 15:50:09.446457  PCI: 00:00.0 [8086/9b61] enabled
  879 15:50:09.449663  PCI: 00:02.0 [8086/0000] bus ops
  880 15:50:09.452576  PCI: 00:02.0 [8086/9b41] enabled
  881 15:50:09.455645  PCI: 00:04.0 [8086/1903] disabled
  882 15:50:09.459455  PCI: 00:08.0 [8086/1911] enabled
  883 15:50:09.462066  PCI: 00:12.0 [8086/02f9] enabled
  884 15:50:09.465606  PCI: 00:14.0 [8086/0000] bus ops
  885 15:50:09.469173  PCI: 00:14.0 [8086/02ed] enabled
  886 15:50:09.472181  PCI: 00:14.2 [8086/02ef] enabled
  887 15:50:09.475512  PCI: 00:14.3 [8086/02f0] enabled
  888 15:50:09.478785  PCI: 00:15.0 [8086/0000] bus ops
  889 15:50:09.482134  PCI: 00:15.0 [8086/02e8] enabled
  890 15:50:09.485675  PCI: 00:15.1 [8086/0000] bus ops
  891 15:50:09.488883  PCI: 00:15.1 [8086/02e9] enabled
  892 15:50:09.492529  PCI: 00:16.0 [8086/0000] ops
  893 15:50:09.495731  PCI: 00:16.0 [8086/02e0] enabled
  894 15:50:09.498591  PCI: 00:17.0 [8086/0000] ops
  895 15:50:09.502143  PCI: 00:17.0 [8086/02d3] enabled
  896 15:50:09.505250  PCI: 00:19.0 [8086/0000] bus ops
  897 15:50:09.508761  PCI: 00:19.0 [8086/02c5] enabled
  898 15:50:09.512260  PCI: 00:1d.0 [8086/0000] bus ops
  899 15:50:09.515215  PCI: 00:1d.0 [8086/02b0] enabled
  900 15:50:09.519198  PCI: Static device PCI: 00:1d.5 not found, disabling it.
  901 15:50:09.522002  PCI: 00:1e.0 [8086/0000] ops
  902 15:50:09.526001  PCI: 00:1e.0 [8086/02a8] enabled
  903 15:50:09.528936  PCI: 00:1e.2 [8086/0000] bus ops
  904 15:50:09.532023  PCI: 00:1e.2 [8086/02aa] enabled
  905 15:50:09.535215  PCI: 00:1e.3 [8086/0000] bus ops
  906 15:50:09.538813  PCI: 00:1e.3 [8086/02ab] enabled
  907 15:50:09.541994  PCI: 00:1f.0 [8086/0000] bus ops
  908 15:50:09.545498  PCI: 00:1f.0 [8086/0284] enabled
  909 15:50:09.552144  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  910 15:50:09.559107  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  911 15:50:09.562167  PCI: 00:1f.3 [8086/0000] bus ops
  912 15:50:09.565815  PCI: 00:1f.3 [8086/02c8] enabled
  913 15:50:09.568693  PCI: 00:1f.4 [8086/0000] bus ops
  914 15:50:09.571610  PCI: 00:1f.4 [8086/02a3] enabled
  915 15:50:09.575325  PCI: 00:1f.5 [8086/0000] bus ops
  916 15:50:09.578875  PCI: 00:1f.5 [8086/02a4] enabled
  917 15:50:09.582109  PCI: Leftover static devices:
  918 15:50:09.582694  PCI: 00:05.0
  919 15:50:09.583076  PCI: 00:12.5
  920 15:50:09.584558  PCI: 00:12.6
  921 15:50:09.585040  PCI: 00:14.1
  922 15:50:09.588749  PCI: 00:14.5
  923 15:50:09.589334  PCI: 00:15.2
  924 15:50:09.591430  PCI: 00:15.3
  925 15:50:09.592054  PCI: 00:16.1
  926 15:50:09.592451  PCI: 00:16.2
  927 15:50:09.594923  PCI: 00:16.3
  928 15:50:09.595509  PCI: 00:16.4
  929 15:50:09.598036  PCI: 00:16.5
  930 15:50:09.598630  PCI: 00:19.1
  931 15:50:09.599011  PCI: 00:19.2
  932 15:50:09.601369  PCI: 00:1a.0
  933 15:50:09.601848  PCI: 00:1c.0
  934 15:50:09.605250  PCI: 00:1c.1
  935 15:50:09.605844  PCI: 00:1c.2
  936 15:50:09.606233  PCI: 00:1c.3
  937 15:50:09.607752  PCI: 00:1c.4
  938 15:50:09.608260  PCI: 00:1c.5
  939 15:50:09.611151  PCI: 00:1c.6
  940 15:50:09.611631  PCI: 00:1c.7
  941 15:50:09.614494  PCI: 00:1d.1
  942 15:50:09.614970  PCI: 00:1d.2
  943 15:50:09.615340  PCI: 00:1d.3
  944 15:50:09.617868  PCI: 00:1d.4
  945 15:50:09.618351  PCI: 00:1d.5
  946 15:50:09.621105  PCI: 00:1e.1
  947 15:50:09.621677  PCI: 00:1f.1
  948 15:50:09.622071  PCI: 00:1f.2
  949 15:50:09.624624  PCI: 00:1f.6
  950 15:50:09.627979  PCI: Check your devicetree.cb.
  951 15:50:09.631144  PCI: 00:02.0 scanning...
  952 15:50:09.634809  scan_generic_bus for PCI: 00:02.0
  953 15:50:09.638512  scan_generic_bus for PCI: 00:02.0 done
  954 15:50:09.644417  scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
  955 15:50:09.645003  PCI: 00:14.0 scanning...
  956 15:50:09.648127  scan_static_bus for PCI: 00:14.0
  957 15:50:09.651038  USB0 port 0 enabled
  958 15:50:09.654568  USB0 port 0 scanning...
  959 15:50:09.657914  scan_static_bus for USB0 port 0
  960 15:50:09.658500  USB2 port 0 enabled
  961 15:50:09.661815  USB2 port 1 enabled
  962 15:50:09.664950  USB2 port 2 disabled
  963 15:50:09.665533  USB2 port 3 disabled
  964 15:50:09.667803  USB2 port 5 disabled
  965 15:50:09.671300  USB2 port 6 enabled
  966 15:50:09.671925  USB2 port 9 enabled
  967 15:50:09.674156  USB3 port 0 enabled
  968 15:50:09.674633  USB3 port 1 enabled
  969 15:50:09.677812  USB3 port 2 enabled
  970 15:50:09.681185  USB3 port 3 enabled
  971 15:50:09.681769  USB3 port 4 disabled
  972 15:50:09.684507  USB2 port 0 scanning...
  973 15:50:09.687620  scan_static_bus for USB2 port 0
  974 15:50:09.691252  scan_static_bus for USB2 port 0 done
  975 15:50:09.697915  scan_bus: scanning of bus USB2 port 0 took 9696 usecs
  976 15:50:09.701039  USB2 port 1 scanning...
  977 15:50:09.704438  scan_static_bus for USB2 port 1
  978 15:50:09.707630  scan_static_bus for USB2 port 1 done
  979 15:50:09.710610  scan_bus: scanning of bus USB2 port 1 took 9689 usecs
  980 15:50:09.714261  USB2 port 6 scanning...
  981 15:50:09.717361  scan_static_bus for USB2 port 6
  982 15:50:09.720753  scan_static_bus for USB2 port 6 done
  983 15:50:09.727363  scan_bus: scanning of bus USB2 port 6 took 9696 usecs
  984 15:50:09.730524  USB2 port 9 scanning...
  985 15:50:09.733833  scan_static_bus for USB2 port 9
  986 15:50:09.737528  scan_static_bus for USB2 port 9 done
  987 15:50:09.740978  scan_bus: scanning of bus USB2 port 9 took 9688 usecs
  988 15:50:09.743909  USB3 port 0 scanning...
  989 15:50:09.747698  scan_static_bus for USB3 port 0
  990 15:50:09.750647  scan_static_bus for USB3 port 0 done
  991 15:50:09.757659  scan_bus: scanning of bus USB3 port 0 took 9694 usecs
  992 15:50:09.760503  USB3 port 1 scanning...
  993 15:50:09.764002  scan_static_bus for USB3 port 1
  994 15:50:09.767326  scan_static_bus for USB3 port 1 done
  995 15:50:09.770700  scan_bus: scanning of bus USB3 port 1 took 9708 usecs
  996 15:50:09.773936  USB3 port 2 scanning...
  997 15:50:09.778203  scan_static_bus for USB3 port 2
  998 15:50:09.780766  scan_static_bus for USB3 port 2 done
  999 15:50:09.787369  scan_bus: scanning of bus USB3 port 2 took 9687 usecs
 1000 15:50:09.790281  USB3 port 3 scanning...
 1001 15:50:09.794000  scan_static_bus for USB3 port 3
 1002 15:50:09.797526  scan_static_bus for USB3 port 3 done
 1003 15:50:09.800509  scan_bus: scanning of bus USB3 port 3 took 9703 usecs
 1004 15:50:09.807383  scan_static_bus for USB0 port 0 done
 1005 15:50:09.810686  scan_bus: scanning of bus USB0 port 0 took 155270 usecs
 1006 15:50:09.813699  scan_static_bus for PCI: 00:14.0 done
 1007 15:50:09.820233  scan_bus: scanning of bus PCI: 00:14.0 took 172898 usecs
 1008 15:50:09.823378  PCI: 00:15.0 scanning...
 1009 15:50:09.827174  scan_generic_bus for PCI: 00:15.0
 1010 15:50:09.830240  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
 1011 15:50:09.833460  scan_generic_bus for PCI: 00:15.0 done
 1012 15:50:09.840170  scan_bus: scanning of bus PCI: 00:15.0 took 14289 usecs
 1013 15:50:09.843232  PCI: 00:15.1 scanning...
 1014 15:50:09.847279  scan_generic_bus for PCI: 00:15.1
 1015 15:50:09.850437  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
 1016 15:50:09.854012  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
 1017 15:50:09.860384  scan_generic_bus for PCI: 00:15.1 done
 1018 15:50:09.863600  scan_bus: scanning of bus PCI: 00:15.1 took 18649 usecs
 1019 15:50:09.867004  PCI: 00:19.0 scanning...
 1020 15:50:09.870598  scan_generic_bus for PCI: 00:19.0
 1021 15:50:09.873360  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
 1022 15:50:09.880121  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
 1023 15:50:09.884484  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
 1024 15:50:09.886445  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
 1025 15:50:09.890159  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
 1026 15:50:09.893598  scan_generic_bus for PCI: 00:19.0 done
 1027 15:50:09.900328  scan_bus: scanning of bus PCI: 00:19.0 took 30726 usecs
 1028 15:50:09.903343  PCI: 00:1d.0 scanning...
 1029 15:50:09.906615  do_pci_scan_bridge for PCI: 00:1d.0
 1030 15:50:09.909706  PCI: pci_scan_bus for bus 01
 1031 15:50:09.913206  PCI: 01:00.0 [1c5c/1327] enabled
 1032 15:50:09.916465  Enabling Common Clock Configuration
 1033 15:50:09.919895  L1 Sub-State supported from root port 29
 1034 15:50:09.922857  L1 Sub-State Support = 0xf
 1035 15:50:09.926293  CommonModeRestoreTime = 0x28
 1036 15:50:09.929827  Power On Value = 0x16, Power On Scale = 0x0
 1037 15:50:09.933196  ASPM: Enabled L1
 1038 15:50:09.939830  scan_bus: scanning of bus PCI: 00:1d.0 took 32787 usecs
 1039 15:50:09.940456  PCI: 00:1e.2 scanning...
 1040 15:50:09.946655  scan_generic_bus for PCI: 00:1e.2
 1041 15:50:09.949743  bus: PCI: 00:1e.2[0]->SPI: 00 enabled
 1042 15:50:09.953365  scan_generic_bus for PCI: 00:1e.2 done
 1043 15:50:09.956548  scan_bus: scanning of bus PCI: 00:1e.2 took 14009 usecs
 1044 15:50:09.960012  PCI: 00:1e.3 scanning...
 1045 15:50:09.963410  scan_generic_bus for PCI: 00:1e.3
 1046 15:50:09.969675  bus: PCI: 00:1e.3[0]->SPI: 01 enabled
 1047 15:50:09.972759  scan_generic_bus for PCI: 00:1e.3 done
 1048 15:50:09.976430  scan_bus: scanning of bus PCI: 00:1e.3 took 14003 usecs
 1049 15:50:09.980068  PCI: 00:1f.0 scanning...
 1050 15:50:09.982881  scan_static_bus for PCI: 00:1f.0
 1051 15:50:09.986814  PNP: 0c09.0 enabled
 1052 15:50:09.989716  scan_static_bus for PCI: 00:1f.0 done
 1053 15:50:09.996362  scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
 1054 15:50:09.996943  PCI: 00:1f.3 scanning...
 1055 15:50:10.003048  scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
 1056 15:50:10.006408  PCI: 00:1f.4 scanning...
 1057 15:50:10.009446  scan_generic_bus for PCI: 00:1f.4
 1058 15:50:10.012447  scan_generic_bus for PCI: 00:1f.4 done
 1059 15:50:10.019344  scan_bus: scanning of bus PCI: 00:1f.4 took 10184 usecs
 1060 15:50:10.023098  PCI: 00:1f.5 scanning...
 1061 15:50:10.025680  scan_generic_bus for PCI: 00:1f.5
 1062 15:50:10.029568  scan_generic_bus for PCI: 00:1f.5 done
 1063 15:50:10.035757  scan_bus: scanning of bus PCI: 00:1f.5 took 10192 usecs
 1064 15:50:10.039332  scan_bus: scanning of bus DOMAIN: 0000 took 604871 usecs
 1065 15:50:10.042467  scan_static_bus for Root Device done
 1066 15:50:10.049377  scan_bus: scanning of bus Root Device took 624735 usecs
 1067 15:50:10.049954  done
 1068 15:50:10.053388  Chrome EC: UHEPI supported
 1069 15:50:10.059397  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
 1070 15:50:10.065972  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1071 15:50:10.072844  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
 1072 15:50:10.079919  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
 1073 15:50:10.082600  SPI flash protection: WPSW=0 SRP0=0
 1074 15:50:10.085723  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1075 15:50:10.092699  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
 1076 15:50:10.095990  found VGA at PCI: 00:02.0
 1077 15:50:10.099580  Setting up VGA for PCI: 00:02.0
 1078 15:50:10.102630  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1079 15:50:10.109810  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1080 15:50:10.112060  Allocating resources...
 1081 15:50:10.112540  Reading resources...
 1082 15:50:10.115399  Root Device read_resources bus 0 link: 0
 1083 15:50:10.122514  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1084 15:50:10.125935  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1085 15:50:10.132419  DOMAIN: 0000 read_resources bus 0 link: 0
 1086 15:50:10.139509  PCI: 00:14.0 read_resources bus 0 link: 0
 1087 15:50:10.142444  USB0 port 0 read_resources bus 0 link: 0
 1088 15:50:10.150316  USB0 port 0 read_resources bus 0 link: 0 done
 1089 15:50:10.153985  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1090 15:50:10.160839  PCI: 00:15.0 read_resources bus 1 link: 0
 1091 15:50:10.164154  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1092 15:50:10.170415  PCI: 00:15.1 read_resources bus 2 link: 0
 1093 15:50:10.173755  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1094 15:50:10.181153  PCI: 00:19.0 read_resources bus 3 link: 0
 1095 15:50:10.188067  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1096 15:50:10.191191  PCI: 00:1d.0 read_resources bus 1 link: 0
 1097 15:50:10.198194  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1098 15:50:10.200911  PCI: 00:1e.2 read_resources bus 4 link: 0
 1099 15:50:10.207649  PCI: 00:1e.2 read_resources bus 4 link: 0 done
 1100 15:50:10.211282  PCI: 00:1e.3 read_resources bus 5 link: 0
 1101 15:50:10.217340  PCI: 00:1e.3 read_resources bus 5 link: 0 done
 1102 15:50:10.221388  PCI: 00:1f.0 read_resources bus 0 link: 0
 1103 15:50:10.227485  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1104 15:50:10.234238  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1105 15:50:10.237507  Root Device read_resources bus 0 link: 0 done
 1106 15:50:10.240872  Done reading resources.
 1107 15:50:10.244108  Show resources in subtree (Root Device)...After reading.
 1108 15:50:10.251053   Root Device child on link 0 CPU_CLUSTER: 0
 1109 15:50:10.254210    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1110 15:50:10.254791     APIC: 00
 1111 15:50:10.257714     APIC: 02
 1112 15:50:10.258295     APIC: 07
 1113 15:50:10.261319     APIC: 01
 1114 15:50:10.261903     APIC: 03
 1115 15:50:10.262282     APIC: 04
 1116 15:50:10.264240     APIC: 05
 1117 15:50:10.264826     APIC: 06
 1118 15:50:10.267712    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1119 15:50:10.277103    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1120 15:50:10.287426    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1121 15:50:10.337106     PCI: 00:00.0
 1122 15:50:10.337743     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1123 15:50:10.338566     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1124 15:50:10.338991     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1125 15:50:10.339724     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1126 15:50:10.340143     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1127 15:50:10.387045     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1128 15:50:10.388067     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1129 15:50:10.388865     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1130 15:50:10.389275     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1131 15:50:10.389994     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1132 15:50:10.434537     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1133 15:50:10.435635     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1134 15:50:10.436185     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1135 15:50:10.436970     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1136 15:50:10.437377     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1137 15:50:10.442750     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1138 15:50:10.443366     PCI: 00:02.0
 1139 15:50:10.452660     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1140 15:50:10.462596     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1141 15:50:10.469303     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1142 15:50:10.472762     PCI: 00:04.0
 1143 15:50:10.473348     PCI: 00:08.0
 1144 15:50:10.482792     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1145 15:50:10.486054     PCI: 00:12.0
 1146 15:50:10.495883     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1147 15:50:10.499323     PCI: 00:14.0 child on link 0 USB0 port 0
 1148 15:50:10.508512     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1149 15:50:10.511832      USB0 port 0 child on link 0 USB2 port 0
 1150 15:50:10.515577       USB2 port 0
 1151 15:50:10.516120       USB2 port 1
 1152 15:50:10.518662       USB2 port 2
 1153 15:50:10.519143       USB2 port 3
 1154 15:50:10.522177       USB2 port 5
 1155 15:50:10.525883       USB2 port 6
 1156 15:50:10.526523       USB2 port 9
 1157 15:50:10.528622       USB3 port 0
 1158 15:50:10.529110       USB3 port 1
 1159 15:50:10.532401       USB3 port 2
 1160 15:50:10.532884       USB3 port 3
 1161 15:50:10.535372       USB3 port 4
 1162 15:50:10.535888     PCI: 00:14.2
 1163 15:50:10.545270     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1164 15:50:10.555766     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1165 15:50:10.558869     PCI: 00:14.3
 1166 15:50:10.569730     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1167 15:50:10.572136     PCI: 00:15.0 child on link 0 I2C: 01:15
 1168 15:50:10.581947     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1169 15:50:10.582527      I2C: 01:15
 1170 15:50:10.588312     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1171 15:50:10.598503     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1172 15:50:10.599088      I2C: 02:5d
 1173 15:50:10.601643      GENERIC: 0.0
 1174 15:50:10.602211     PCI: 00:16.0
 1175 15:50:10.611516     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1176 15:50:10.614754     PCI: 00:17.0
 1177 15:50:10.621409     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1178 15:50:10.631732     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1179 15:50:10.641432     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1180 15:50:10.648140     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1181 15:50:10.658811     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1182 15:50:10.665015     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1183 15:50:10.671283     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1184 15:50:10.681249     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1185 15:50:10.681830      I2C: 03:1a
 1186 15:50:10.684529      I2C: 03:38
 1187 15:50:10.685106      I2C: 03:39
 1188 15:50:10.687740      I2C: 03:3a
 1189 15:50:10.688357      I2C: 03:3b
 1190 15:50:10.691527     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1191 15:50:10.701038     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1192 15:50:10.710769     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1193 15:50:10.721001     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1194 15:50:10.721488      PCI: 01:00.0
 1195 15:50:10.731171      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1196 15:50:10.734052     PCI: 00:1e.0
 1197 15:50:10.744031     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1198 15:50:10.754276     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1199 15:50:10.757718     PCI: 00:1e.2 child on link 0 SPI: 00
 1200 15:50:10.767359     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1201 15:50:10.771035      SPI: 00
 1202 15:50:10.774554     PCI: 00:1e.3 child on link 0 SPI: 01
 1203 15:50:10.784241     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1204 15:50:10.784832      SPI: 01
 1205 15:50:10.790625     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1206 15:50:10.797623     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1207 15:50:10.807479     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1208 15:50:10.808098      PNP: 0c09.0
 1209 15:50:10.816951      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1210 15:50:10.817532     PCI: 00:1f.3
 1211 15:50:10.827580     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1212 15:50:10.840215     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1213 15:50:10.840785     PCI: 00:1f.4
 1214 15:50:10.850420     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1215 15:50:10.860283     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1216 15:50:10.860913     PCI: 00:1f.5
 1217 15:50:10.870266     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1218 15:50:10.877117  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1219 15:50:10.883770  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1220 15:50:10.890211  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1221 15:50:10.893436  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1222 15:50:10.897274  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1223 15:50:10.900226  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1224 15:50:10.904038  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1225 15:50:10.909990  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1226 15:50:10.916728  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1227 15:50:10.926429  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1228 15:50:10.933401  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1229 15:50:10.940672  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1230 15:50:10.942924  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1231 15:50:10.953449  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1232 15:50:10.956775  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1233 15:50:10.963193  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1234 15:50:10.966461  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem
 1235 15:50:10.973101  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem
 1236 15:50:10.976635  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem
 1237 15:50:10.979640  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem
 1238 15:50:10.986345  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem
 1239 15:50:10.989572  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem
 1240 15:50:10.996328  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem
 1241 15:50:10.999507  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem
 1242 15:50:11.006105  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem
 1243 15:50:11.009076  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem
 1244 15:50:11.015878  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem
 1245 15:50:11.019806  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem
 1246 15:50:11.025936  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem
 1247 15:50:11.029156  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem
 1248 15:50:11.036275  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem
 1249 15:50:11.039196  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem
 1250 15:50:11.046216  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem
 1251 15:50:11.049416  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem
 1252 15:50:11.052306  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem
 1253 15:50:11.059111  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem
 1254 15:50:11.062346  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem
 1255 15:50:11.072331  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
 1256 15:50:11.075707  avoid_fixed_resources: DOMAIN: 0000
 1257 15:50:11.082441  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1258 15:50:11.088789  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1259 15:50:11.095431  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1260 15:50:11.102481  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 1261 15:50:11.112062  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
 1262 15:50:11.118591  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
 1263 15:50:11.125496  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
 1264 15:50:11.135295  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1265 15:50:11.141854  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1266 15:50:11.148521  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1267 15:50:11.155127  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1268 15:50:11.165925  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1269 15:50:11.166528  Setting resources...
 1270 15:50:11.171918  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1271 15:50:11.175025  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1272 15:50:11.181608  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1273 15:50:11.184882  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1274 15:50:11.188537  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1275 15:50:11.195074  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1276 15:50:11.201494  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1277 15:50:11.208274  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1278 15:50:11.214725  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
 1279 15:50:11.217730  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1280 15:50:11.224635  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1281 15:50:11.228375  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1282 15:50:11.234548  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem
 1283 15:50:11.237683  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem
 1284 15:50:11.244959  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem
 1285 15:50:11.247766  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem
 1286 15:50:11.254622  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem
 1287 15:50:11.257402  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem
 1288 15:50:11.264615  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem
 1289 15:50:11.267684  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem
 1290 15:50:11.274574  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem
 1291 15:50:11.277644  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem
 1292 15:50:11.285015  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem
 1293 15:50:11.287734  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem
 1294 15:50:11.294978  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem
 1295 15:50:11.297550  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem
 1296 15:50:11.300754  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem
 1297 15:50:11.307762  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem
 1298 15:50:11.310509  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem
 1299 15:50:11.317305  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem
 1300 15:50:11.320278  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem
 1301 15:50:11.326956  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem
 1302 15:50:11.333774  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
 1303 15:50:11.340802  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1304 15:50:11.350463  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1305 15:50:11.357635  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1306 15:50:11.360158  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem
 1307 15:50:11.370098  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
 1308 15:50:11.373240  Root Device assign_resources, bus 0 link: 0
 1309 15:50:11.377215  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1310 15:50:11.386717  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1311 15:50:11.393238  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1312 15:50:11.403486  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1313 15:50:11.410214  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
 1314 15:50:11.419701  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
 1315 15:50:11.426206  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
 1316 15:50:11.432743  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1317 15:50:11.436562  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1318 15:50:11.446253  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
 1319 15:50:11.452994  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
 1320 15:50:11.459630  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
 1321 15:50:11.469649  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
 1322 15:50:11.473190  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1323 15:50:11.479877  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1324 15:50:11.486355  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
 1325 15:50:11.492751  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1326 15:50:11.495946  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1327 15:50:11.506455  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
 1328 15:50:11.512264  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
 1329 15:50:11.519435  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
 1330 15:50:11.529573  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1331 15:50:11.535731  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1332 15:50:11.542549  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1333 15:50:11.552421  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
 1334 15:50:11.559155  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
 1335 15:50:11.562987  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1336 15:50:11.569061  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1337 15:50:11.575449  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1338 15:50:11.585660  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1339 15:50:11.595564  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1340 15:50:11.599615  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1341 15:50:11.608825  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
 1342 15:50:11.611758  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1343 15:50:11.621603  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
 1344 15:50:11.628235  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
 1345 15:50:11.631452  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1346 15:50:11.638404  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1347 15:50:11.645255  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
 1348 15:50:11.651583  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1349 15:50:11.654717  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1350 15:50:11.661595  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1351 15:50:11.665411  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1352 15:50:11.671332  LPC: Trying to open IO window from 800 size 1ff
 1353 15:50:11.678910  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
 1354 15:50:11.688047  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
 1355 15:50:11.694752  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
 1356 15:50:11.704780  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
 1357 15:50:11.708302  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1358 15:50:11.711641  Root Device assign_resources, bus 0 link: 0
 1359 15:50:11.714600  Done setting resources.
 1360 15:50:11.721054  Show resources in subtree (Root Device)...After assigning values.
 1361 15:50:11.724798   Root Device child on link 0 CPU_CLUSTER: 0
 1362 15:50:11.730690    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1363 15:50:11.731167     APIC: 00
 1364 15:50:11.731537     APIC: 02
 1365 15:50:11.734332     APIC: 07
 1366 15:50:11.734911     APIC: 01
 1367 15:50:11.737596     APIC: 03
 1368 15:50:11.738066     APIC: 04
 1369 15:50:11.738461     APIC: 05
 1370 15:50:11.740988     APIC: 06
 1371 15:50:11.744245    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1372 15:50:11.754620    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1373 15:50:11.763789    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1374 15:50:11.767536     PCI: 00:00.0
 1375 15:50:11.776905     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1376 15:50:11.787239     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1377 15:50:11.793939     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1378 15:50:11.803748     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1379 15:50:11.813492     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1380 15:50:11.823497     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1381 15:50:11.833304     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1382 15:50:11.843319     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1383 15:50:11.849768     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1384 15:50:11.860060     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1385 15:50:11.869783     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1386 15:50:11.880017     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1387 15:50:11.889739     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1388 15:50:11.899877     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1389 15:50:11.909679     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1390 15:50:11.916328     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1391 15:50:11.919399     PCI: 00:02.0
 1392 15:50:11.929045     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1393 15:50:11.939005     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1394 15:50:11.949003     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1395 15:50:11.952156     PCI: 00:04.0
 1396 15:50:11.952641     PCI: 00:08.0
 1397 15:50:11.962353     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
 1398 15:50:11.965636     PCI: 00:12.0
 1399 15:50:11.975280     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
 1400 15:50:11.978961     PCI: 00:14.0 child on link 0 USB0 port 0
 1401 15:50:11.988459     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
 1402 15:50:11.995357      USB0 port 0 child on link 0 USB2 port 0
 1403 15:50:11.995979       USB2 port 0
 1404 15:50:11.998753       USB2 port 1
 1405 15:50:11.999327       USB2 port 2
 1406 15:50:12.001986       USB2 port 3
 1407 15:50:12.002557       USB2 port 5
 1408 15:50:12.005395       USB2 port 6
 1409 15:50:12.005876       USB2 port 9
 1410 15:50:12.008736       USB3 port 0
 1411 15:50:12.009307       USB3 port 1
 1412 15:50:12.011714       USB3 port 2
 1413 15:50:12.012329       USB3 port 3
 1414 15:50:12.014942       USB3 port 4
 1415 15:50:12.015502     PCI: 00:14.2
 1416 15:50:12.028005     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
 1417 15:50:12.038278     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
 1418 15:50:12.038881     PCI: 00:14.3
 1419 15:50:12.048383     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
 1420 15:50:12.054752     PCI: 00:15.0 child on link 0 I2C: 01:15
 1421 15:50:12.064844     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
 1422 15:50:12.065439      I2C: 01:15
 1423 15:50:12.068076     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1424 15:50:12.081128     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
 1425 15:50:12.081696      I2C: 02:5d
 1426 15:50:12.084272      GENERIC: 0.0
 1427 15:50:12.084756     PCI: 00:16.0
 1428 15:50:12.094423     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
 1429 15:50:12.098115     PCI: 00:17.0
 1430 15:50:12.108177     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
 1431 15:50:12.117588     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
 1432 15:50:12.127134     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1433 15:50:12.134741     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1434 15:50:12.144280     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1435 15:50:12.153522     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
 1436 15:50:12.160533     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1437 15:50:12.170763     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
 1438 15:50:12.171387      I2C: 03:1a
 1439 15:50:12.173853      I2C: 03:38
 1440 15:50:12.174431      I2C: 03:39
 1441 15:50:12.176825      I2C: 03:3a
 1442 15:50:12.177314      I2C: 03:3b
 1443 15:50:12.180005     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1444 15:50:12.190304     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1445 15:50:12.200439     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1446 15:50:12.210152     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1447 15:50:12.213651      PCI: 01:00.0
 1448 15:50:12.223208      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
 1449 15:50:12.227105     PCI: 00:1e.0
 1450 15:50:12.236527     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1451 15:50:12.246699     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
 1452 15:50:12.249888     PCI: 00:1e.2 child on link 0 SPI: 00
 1453 15:50:12.259710     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
 1454 15:50:12.262955      SPI: 00
 1455 15:50:12.266277     PCI: 00:1e.3 child on link 0 SPI: 01
 1456 15:50:12.276464     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
 1457 15:50:12.277049      SPI: 01
 1458 15:50:12.282759     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1459 15:50:12.289366     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1460 15:50:12.299299     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1461 15:50:12.302856      PNP: 0c09.0
 1462 15:50:12.309764      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1463 15:50:12.312480     PCI: 00:1f.3
 1464 15:50:12.322360     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
 1465 15:50:12.332558     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
 1466 15:50:12.336190     PCI: 00:1f.4
 1467 15:50:12.342381     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1468 15:50:12.352087     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
 1469 15:50:12.355504     PCI: 00:1f.5
 1470 15:50:12.365681     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
 1471 15:50:12.368487  Done allocating resources.
 1472 15:50:12.372027  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
 1473 15:50:12.376238  Enabling resources...
 1474 15:50:12.382256  PCI: 00:00.0 subsystem <- 8086/9b61
 1475 15:50:12.382843  PCI: 00:00.0 cmd <- 06
 1476 15:50:12.385381  PCI: 00:02.0 subsystem <- 8086/9b41
 1477 15:50:12.388989  PCI: 00:02.0 cmd <- 03
 1478 15:50:12.392720  PCI: 00:08.0 cmd <- 06
 1479 15:50:12.395782  PCI: 00:12.0 subsystem <- 8086/02f9
 1480 15:50:12.398936  PCI: 00:12.0 cmd <- 02
 1481 15:50:12.402394  PCI: 00:14.0 subsystem <- 8086/02ed
 1482 15:50:12.405765  PCI: 00:14.0 cmd <- 02
 1483 15:50:12.406357  PCI: 00:14.2 cmd <- 02
 1484 15:50:12.412666  PCI: 00:14.3 subsystem <- 8086/02f0
 1485 15:50:12.413259  PCI: 00:14.3 cmd <- 02
 1486 15:50:12.416038  PCI: 00:15.0 subsystem <- 8086/02e8
 1487 15:50:12.419414  PCI: 00:15.0 cmd <- 02
 1488 15:50:12.422361  PCI: 00:15.1 subsystem <- 8086/02e9
 1489 15:50:12.425522  PCI: 00:15.1 cmd <- 02
 1490 15:50:12.429020  PCI: 00:16.0 subsystem <- 8086/02e0
 1491 15:50:12.432588  PCI: 00:16.0 cmd <- 02
 1492 15:50:12.435644  PCI: 00:17.0 subsystem <- 8086/02d3
 1493 15:50:12.438615  PCI: 00:17.0 cmd <- 03
 1494 15:50:12.442679  PCI: 00:19.0 subsystem <- 8086/02c5
 1495 15:50:12.445700  PCI: 00:19.0 cmd <- 02
 1496 15:50:12.449231  PCI: 00:1d.0 bridge ctrl <- 0013
 1497 15:50:12.452529  PCI: 00:1d.0 subsystem <- 8086/02b0
 1498 15:50:12.455404  PCI: 00:1d.0 cmd <- 06
 1499 15:50:12.458699  PCI: 00:1e.0 subsystem <- 8086/02a8
 1500 15:50:12.461758  PCI: 00:1e.0 cmd <- 06
 1501 15:50:12.465534  PCI: 00:1e.2 subsystem <- 8086/02aa
 1502 15:50:12.466125  PCI: 00:1e.2 cmd <- 06
 1503 15:50:12.472446  PCI: 00:1e.3 subsystem <- 8086/02ab
 1504 15:50:12.473029  PCI: 00:1e.3 cmd <- 02
 1505 15:50:12.475198  PCI: 00:1f.0 subsystem <- 8086/0284
 1506 15:50:12.478891  PCI: 00:1f.0 cmd <- 407
 1507 15:50:12.481987  PCI: 00:1f.3 subsystem <- 8086/02c8
 1508 15:50:12.485438  PCI: 00:1f.3 cmd <- 02
 1509 15:50:12.488318  PCI: 00:1f.4 subsystem <- 8086/02a3
 1510 15:50:12.491993  PCI: 00:1f.4 cmd <- 03
 1511 15:50:12.495701  PCI: 00:1f.5 subsystem <- 8086/02a4
 1512 15:50:12.498336  PCI: 00:1f.5 cmd <- 406
 1513 15:50:12.507625  PCI: 01:00.0 cmd <- 02
 1514 15:50:12.512858  done.
 1515 15:50:12.525031  ME: Version: 14.0.39.1367
 1516 15:50:12.532066  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
 1517 15:50:12.535494  Initializing devices...
 1518 15:50:12.536148  Root Device init ...
 1519 15:50:12.541398  Chrome EC: Set SMI mask to 0x0000000000000000
 1520 15:50:12.545244  Chrome EC: clear events_b mask to 0x0000000000000000
 1521 15:50:12.551797  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1522 15:50:12.558628  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
 1523 15:50:12.564987  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
 1524 15:50:12.568762  Chrome EC: Set WAKE mask to 0x0000000000000000
 1525 15:50:12.571436  Root Device init finished in 35180 usecs
 1526 15:50:12.575290  CPU_CLUSTER: 0 init ...
 1527 15:50:12.582344  CPU_CLUSTER: 0 init finished in 2450 usecs
 1528 15:50:12.585760  PCI: 00:00.0 init ...
 1529 15:50:12.589051  CPU TDP: 15 Watts
 1530 15:50:12.592574  CPU PL2 = 64 Watts
 1531 15:50:12.596277  PCI: 00:00.0 init finished in 7073 usecs
 1532 15:50:12.599465  PCI: 00:02.0 init ...
 1533 15:50:12.602335  PCI: 00:02.0 init finished in 2255 usecs
 1534 15:50:12.605957  PCI: 00:08.0 init ...
 1535 15:50:12.609781  PCI: 00:08.0 init finished in 2253 usecs
 1536 15:50:12.612629  PCI: 00:12.0 init ...
 1537 15:50:12.616133  PCI: 00:12.0 init finished in 2253 usecs
 1538 15:50:12.619216  PCI: 00:14.0 init ...
 1539 15:50:12.622078  PCI: 00:14.0 init finished in 2254 usecs
 1540 15:50:12.625290  PCI: 00:14.2 init ...
 1541 15:50:12.628862  PCI: 00:14.2 init finished in 2253 usecs
 1542 15:50:12.632362  PCI: 00:14.3 init ...
 1543 15:50:12.635831  PCI: 00:14.3 init finished in 2271 usecs
 1544 15:50:12.638879  PCI: 00:15.0 init ...
 1545 15:50:12.642292  DW I2C bus 0 at 0xd121f000 (400 KHz)
 1546 15:50:12.645648  PCI: 00:15.0 init finished in 5970 usecs
 1547 15:50:12.649132  PCI: 00:15.1 init ...
 1548 15:50:12.652397  DW I2C bus 1 at 0xd1220000 (400 KHz)
 1549 15:50:12.658926  PCI: 00:15.1 init finished in 5979 usecs
 1550 15:50:12.659505  PCI: 00:16.0 init ...
 1551 15:50:12.665338  PCI: 00:16.0 init finished in 2253 usecs
 1552 15:50:12.668761  PCI: 00:19.0 init ...
 1553 15:50:12.671972  DW I2C bus 4 at 0xd1222000 (400 KHz)
 1554 15:50:12.675180  PCI: 00:19.0 init finished in 5981 usecs
 1555 15:50:12.678707  PCI: 00:1d.0 init ...
 1556 15:50:12.681884  Initializing PCH PCIe bridge.
 1557 15:50:12.684921  PCI: 00:1d.0 init finished in 5286 usecs
 1558 15:50:12.688715  PCI: 00:1f.0 init ...
 1559 15:50:12.691953  IOAPIC: Initializing IOAPIC at 0xfec00000
 1560 15:50:12.698443  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1561 15:50:12.699010  IOAPIC: ID = 0x02
 1562 15:50:12.701502  IOAPIC: Dumping registers
 1563 15:50:12.704753    reg 0x0000: 0x02000000
 1564 15:50:12.708050    reg 0x0001: 0x00770020
 1565 15:50:12.708627    reg 0x0002: 0x00000000
 1566 15:50:12.715446  PCI: 00:1f.0 init finished in 23552 usecs
 1567 15:50:12.718107  PCI: 00:1f.4 init ...
 1568 15:50:12.721261  PCI: 00:1f.4 init finished in 2262 usecs
 1569 15:50:12.731941  PCI: 01:00.0 init ...
 1570 15:50:12.735730  PCI: 01:00.0 init finished in 2253 usecs
 1571 15:50:12.739390  PNP: 0c09.0 init ...
 1572 15:50:12.743028  Google Chrome EC uptime: 11.086 seconds
 1573 15:50:12.749571  Google Chrome AP resets since EC boot: 0
 1574 15:50:12.753126  Google Chrome most recent AP reset causes:
 1575 15:50:12.760327  Google Chrome EC reset flags at last EC boot: reset-pin
 1576 15:50:12.763011  PNP: 0c09.0 init finished in 20579 usecs
 1577 15:50:12.766496  Devices initialized
 1578 15:50:12.769607  Show all devs... After init.
 1579 15:50:12.770184  Root Device: enabled 1
 1580 15:50:12.772631  CPU_CLUSTER: 0: enabled 1
 1581 15:50:12.776335  DOMAIN: 0000: enabled 1
 1582 15:50:12.776917  APIC: 00: enabled 1
 1583 15:50:12.779371  PCI: 00:00.0: enabled 1
 1584 15:50:12.782607  PCI: 00:02.0: enabled 1
 1585 15:50:12.785689  PCI: 00:04.0: enabled 0
 1586 15:50:12.786173  PCI: 00:05.0: enabled 0
 1587 15:50:12.790080  PCI: 00:12.0: enabled 1
 1588 15:50:12.792386  PCI: 00:12.5: enabled 0
 1589 15:50:12.795795  PCI: 00:12.6: enabled 0
 1590 15:50:12.796401  PCI: 00:14.0: enabled 1
 1591 15:50:12.799227  PCI: 00:14.1: enabled 0
 1592 15:50:12.802676  PCI: 00:14.3: enabled 1
 1593 15:50:12.803302  PCI: 00:14.5: enabled 0
 1594 15:50:12.806477  PCI: 00:15.0: enabled 1
 1595 15:50:12.809417  PCI: 00:15.1: enabled 1
 1596 15:50:12.812388  PCI: 00:15.2: enabled 0
 1597 15:50:12.812872  PCI: 00:15.3: enabled 0
 1598 15:50:12.815750  PCI: 00:16.0: enabled 1
 1599 15:50:12.819068  PCI: 00:16.1: enabled 0
 1600 15:50:12.822509  PCI: 00:16.2: enabled 0
 1601 15:50:12.822998  PCI: 00:16.3: enabled 0
 1602 15:50:12.825489  PCI: 00:16.4: enabled 0
 1603 15:50:12.828654  PCI: 00:16.5: enabled 0
 1604 15:50:12.832243  PCI: 00:17.0: enabled 1
 1605 15:50:12.832842  PCI: 00:19.0: enabled 1
 1606 15:50:12.836012  PCI: 00:19.1: enabled 0
 1607 15:50:12.838624  PCI: 00:19.2: enabled 0
 1608 15:50:12.839112  PCI: 00:1a.0: enabled 0
 1609 15:50:12.842108  PCI: 00:1c.0: enabled 0
 1610 15:50:12.845951  PCI: 00:1c.1: enabled 0
 1611 15:50:12.848478  PCI: 00:1c.2: enabled 0
 1612 15:50:12.848975  PCI: 00:1c.3: enabled 0
 1613 15:50:12.852221  PCI: 00:1c.4: enabled 0
 1614 15:50:12.855242  PCI: 00:1c.5: enabled 0
 1615 15:50:12.858882  PCI: 00:1c.6: enabled 0
 1616 15:50:12.859467  PCI: 00:1c.7: enabled 0
 1617 15:50:12.862134  PCI: 00:1d.0: enabled 1
 1618 15:50:12.865376  PCI: 00:1d.1: enabled 0
 1619 15:50:12.869227  PCI: 00:1d.2: enabled 0
 1620 15:50:12.869814  PCI: 00:1d.3: enabled 0
 1621 15:50:12.871800  PCI: 00:1d.4: enabled 0
 1622 15:50:12.875225  PCI: 00:1d.5: enabled 0
 1623 15:50:12.878809  PCI: 00:1e.0: enabled 1
 1624 15:50:12.879402  PCI: 00:1e.1: enabled 0
 1625 15:50:12.881771  PCI: 00:1e.2: enabled 1
 1626 15:50:12.885084  PCI: 00:1e.3: enabled 1
 1627 15:50:12.885569  PCI: 00:1f.0: enabled 1
 1628 15:50:12.888302  PCI: 00:1f.1: enabled 0
 1629 15:50:12.891826  PCI: 00:1f.2: enabled 0
 1630 15:50:12.895288  PCI: 00:1f.3: enabled 1
 1631 15:50:12.895924  PCI: 00:1f.4: enabled 1
 1632 15:50:12.898281  PCI: 00:1f.5: enabled 1
 1633 15:50:12.901971  PCI: 00:1f.6: enabled 0
 1634 15:50:12.905306  USB0 port 0: enabled 1
 1635 15:50:12.905907  I2C: 01:15: enabled 1
 1636 15:50:12.908553  I2C: 02:5d: enabled 1
 1637 15:50:12.911722  GENERIC: 0.0: enabled 1
 1638 15:50:12.912243  I2C: 03:1a: enabled 1
 1639 15:50:12.915328  I2C: 03:38: enabled 1
 1640 15:50:12.918700  I2C: 03:39: enabled 1
 1641 15:50:12.919304  I2C: 03:3a: enabled 1
 1642 15:50:12.921649  I2C: 03:3b: enabled 1
 1643 15:50:12.924723  PCI: 00:00.0: enabled 1
 1644 15:50:12.925228  SPI: 00: enabled 1
 1645 15:50:12.928483  SPI: 01: enabled 1
 1646 15:50:12.931511  PNP: 0c09.0: enabled 1
 1647 15:50:12.932029  USB2 port 0: enabled 1
 1648 15:50:12.935055  USB2 port 1: enabled 1
 1649 15:50:12.938377  USB2 port 2: enabled 0
 1650 15:50:12.938862  USB2 port 3: enabled 0
 1651 15:50:12.941337  USB2 port 5: enabled 0
 1652 15:50:12.944778  USB2 port 6: enabled 1
 1653 15:50:12.948280  USB2 port 9: enabled 1
 1654 15:50:12.948874  USB3 port 0: enabled 1
 1655 15:50:12.951503  USB3 port 1: enabled 1
 1656 15:50:12.954604  USB3 port 2: enabled 1
 1657 15:50:12.955088  USB3 port 3: enabled 1
 1658 15:50:12.958539  USB3 port 4: enabled 0
 1659 15:50:12.961424  APIC: 02: enabled 1
 1660 15:50:12.962013  APIC: 07: enabled 1
 1661 15:50:12.964657  APIC: 01: enabled 1
 1662 15:50:12.968818  APIC: 03: enabled 1
 1663 15:50:12.969406  APIC: 04: enabled 1
 1664 15:50:12.971189  APIC: 05: enabled 1
 1665 15:50:12.971776  APIC: 06: enabled 1
 1666 15:50:12.974762  PCI: 00:08.0: enabled 1
 1667 15:50:12.977832  PCI: 00:14.2: enabled 1
 1668 15:50:12.981041  PCI: 01:00.0: enabled 1
 1669 15:50:12.984907  Disabling ACPI via APMC:
 1670 15:50:12.985394  done.
 1671 15:50:12.991717  FMAP: area RW_ELOG found @ af0000 (16384 bytes)
 1672 15:50:12.994469  ELOG: NV offset 0xaf0000 size 0x4000
 1673 15:50:13.001256  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1674 15:50:13.008129  ELOG: Event(17) added with size 13 at 2022-09-17 15:49:55 UTC
 1675 15:50:13.015039  ELOG: Event(92) added with size 9 at 2022-09-17 15:49:55 UTC
 1676 15:50:13.021579  ELOG: Event(93) added with size 9 at 2022-09-17 15:49:55 UTC
 1677 15:50:13.028178  ELOG: Event(9A) added with size 9 at 2022-09-17 15:49:55 UTC
 1678 15:50:13.034647  ELOG: Event(9E) added with size 10 at 2022-09-17 15:49:55 UTC
 1679 15:50:13.041269  ELOG: Event(9F) added with size 14 at 2022-09-17 15:49:55 UTC
 1680 15:50:13.045089  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
 1681 15:50:13.052086  ELOG: Event(A1) added with size 10 at 2022-09-17 15:49:55 UTC
 1682 15:50:13.061710  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1683 15:50:13.068229  ELOG: Event(A0) added with size 9 at 2022-09-17 15:49:55 UTC
 1684 15:50:13.074773  ELOG: Event(16) added with size 11 at 2022-09-17 15:49:55 UTC
 1685 15:50:13.077824  Erasing flash addr af0000 + 4 KiB
 1686 15:50:13.148056  elog_add_boot_reason: Logged dev mode boot
 1687 15:50:13.148641  Finalize devices...
 1688 15:50:13.150524  PCI: 00:17.0 final
 1689 15:50:13.154264  Devices finalized
 1690 15:50:13.157518  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
 1691 15:50:13.163809  BS: BS_POST_DEVICE times (ms): entry 57 run 0 exit 0
 1692 15:50:13.167224  ME: HFSTS1                  : 0x90000245
 1693 15:50:13.170806  ME: HFSTS2                  : 0x3B850126
 1694 15:50:13.177086  ME: HFSTS3                  : 0x00000020
 1695 15:50:13.180048  ME: HFSTS4                  : 0x00004800
 1696 15:50:13.184014  ME: HFSTS5                  : 0x00000000
 1697 15:50:13.186410  ME: HFSTS6                  : 0x40400006
 1698 15:50:13.190202  ME: Manufacturing Mode      : NO
 1699 15:50:13.193158  ME: FW Partition Table      : OK
 1700 15:50:13.196701  ME: Bringup Loader Failure  : NO
 1701 15:50:13.199950  ME: Firmware Init Complete  : YES
 1702 15:50:13.203780  ME: Boot Options Present    : NO
 1703 15:50:13.206570  ME: Update In Progress      : NO
 1704 15:50:13.209866  ME: D0i3 Support            : YES
 1705 15:50:13.213170  ME: Low Power State Enabled : NO
 1706 15:50:13.216818  ME: CPU Replaced            : NO
 1707 15:50:13.220022  ME: CPU Replacement Valid   : YES
 1708 15:50:13.223439  ME: Current Working State   : 5
 1709 15:50:13.226593  ME: Current Operation State : 1
 1710 15:50:13.229352  ME: Current Operation Mode  : 0
 1711 15:50:13.232883  ME: Error Code              : 0
 1712 15:50:13.236343  ME: CPU Debug Disabled      : YES
 1713 15:50:13.239622  ME: TXT Support             : NO
 1714 15:50:13.246535  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
 1715 15:50:13.252787  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1716 15:50:13.253370  CBFS @ c08000 size 3f8000
 1717 15:50:13.260160  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1718 15:50:13.263031  CBFS: Locating 'fallback/dsdt.aml'
 1719 15:50:13.266408  CBFS: Found @ offset 10bb80 size 3fa5
 1720 15:50:13.272759  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1721 15:50:13.276378  CBFS @ c08000 size 3f8000
 1722 15:50:13.279807  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1723 15:50:13.282534  CBFS: Locating 'fallback/slic'
 1724 15:50:13.287895  CBFS: 'fallback/slic' not found.
 1725 15:50:13.294220  ACPI: Writing ACPI tables at 99b3e000.
 1726 15:50:13.294700  ACPI:    * FACS
 1727 15:50:13.298484  ACPI:    * DSDT
 1728 15:50:13.300813  Ramoops buffer: 0x100000@0x99a3d000.
 1729 15:50:13.304679  FMAP: area RO_VPD found @ c00000 (16384 bytes)
 1730 15:50:13.310838  FMAP: area RW_VPD found @ af8000 (8192 bytes)
 1731 15:50:13.314672  Google Chrome EC: version:
 1732 15:50:13.317769  	ro: helios_v2.0.2659-56403530b
 1733 15:50:13.321666  	rw: helios_v2.0.2849-c41de27e7d
 1734 15:50:13.322238    running image: 1
 1735 15:50:13.325105  ACPI:    * FADT
 1736 15:50:13.325636  SCI is IRQ9
 1737 15:50:13.331820  ACPI: added table 1/32, length now 40
 1738 15:50:13.332436  ACPI:     * SSDT
 1739 15:50:13.335693  Found 1 CPU(s) with 8 core(s) each.
 1740 15:50:13.338566  Error: Could not locate 'wifi_sar' in VPD.
 1741 15:50:13.345608  Checking CBFS for default SAR values
 1742 15:50:13.348471  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1743 15:50:13.351770  CBFS @ c08000 size 3f8000
 1744 15:50:13.358552  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1745 15:50:13.361706  CBFS: Locating 'wifi_sar_defaults.hex'
 1746 15:50:13.365185  CBFS: Found @ offset 5fac0 size 77
 1747 15:50:13.368707  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
 1748 15:50:13.375114  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
 1749 15:50:13.378301  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
 1750 15:50:13.384772  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
 1751 15:50:13.388448  failed to find key in VPD: dsm_calib_r0_0
 1752 15:50:13.398187  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
 1753 15:50:13.401334  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
 1754 15:50:13.404832  failed to find key in VPD: dsm_calib_r0_1
 1755 15:50:13.414378  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
 1756 15:50:13.421037  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
 1757 15:50:13.424912  failed to find key in VPD: dsm_calib_r0_2
 1758 15:50:13.434366  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
 1759 15:50:13.437612  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
 1760 15:50:13.444505  failed to find key in VPD: dsm_calib_r0_3
 1761 15:50:13.451048  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
 1762 15:50:13.457543  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
 1763 15:50:13.460841  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1764 15:50:13.464785  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
 1765 15:50:13.468389  EC returned error result code 1
 1766 15:50:13.471600  EC returned error result code 1
 1767 15:50:13.475474  EC returned error result code 1
 1768 15:50:13.482629  PS2K: Bad resp from EC. Vivaldi disabled!
 1769 15:50:13.485774  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1770 15:50:13.492153  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
 1771 15:50:13.498989  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
 1772 15:50:13.502026  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1773 15:50:13.508508  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1774 15:50:13.515240  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
 1775 15:50:13.521658  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1776 15:50:13.525509  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
 1777 15:50:13.531580  ACPI: added table 2/32, length now 44
 1778 15:50:13.532092  ACPI:    * MCFG
 1779 15:50:13.535527  ACPI: added table 3/32, length now 48
 1780 15:50:13.538495  ACPI:    * TPM2
 1781 15:50:13.541972  TPM2 log created at 99a2d000
 1782 15:50:13.545416  ACPI: added table 4/32, length now 52
 1783 15:50:13.545990  ACPI:    * MADT
 1784 15:50:13.549119  SCI is IRQ9
 1785 15:50:13.551761  ACPI: added table 5/32, length now 56
 1786 15:50:13.552371  current = 99b43ac0
 1787 15:50:13.555094  ACPI:    * DMAR
 1788 15:50:13.558121  ACPI: added table 6/32, length now 60
 1789 15:50:13.561695  ACPI:    * IGD OpRegion
 1790 15:50:13.562270  GMA: Found VBT in CBFS
 1791 15:50:13.564987  GMA: Found valid VBT in CBFS
 1792 15:50:13.568112  ACPI: added table 7/32, length now 64
 1793 15:50:13.571526  ACPI:    * HPET
 1794 15:50:13.575098  ACPI: added table 8/32, length now 68
 1795 15:50:13.578186  ACPI: done.
 1796 15:50:13.578769  ACPI tables: 31744 bytes.
 1797 15:50:13.582159  smbios_write_tables: 99a2c000
 1798 15:50:13.584752  EC returned error result code 3
 1799 15:50:13.588610  Couldn't obtain OEM name from CBI
 1800 15:50:13.592409  Create SMBIOS type 17
 1801 15:50:13.595001  PCI: 00:00.0 (Intel Cannonlake)
 1802 15:50:13.598453  PCI: 00:14.3 (Intel WiFi)
 1803 15:50:13.601426  SMBIOS tables: 939 bytes.
 1804 15:50:13.605554  Writing table forward entry at 0x00000500
 1805 15:50:13.611798  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
 1806 15:50:13.614956  Writing coreboot table at 0x99b62000
 1807 15:50:13.621386   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1808 15:50:13.625249   1. 0000000000001000-000000000009ffff: RAM
 1809 15:50:13.627750   2. 00000000000a0000-00000000000fffff: RESERVED
 1810 15:50:13.634506   3. 0000000000100000-0000000099a2bfff: RAM
 1811 15:50:13.637895   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
 1812 15:50:13.644448   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
 1813 15:50:13.652195   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
 1814 15:50:13.654540   7. 000000009a000000-000000009f7fffff: RESERVED
 1815 15:50:13.661413   8. 00000000e0000000-00000000efffffff: RESERVED
 1816 15:50:13.664454   9. 00000000fc000000-00000000fc000fff: RESERVED
 1817 15:50:13.671578  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1818 15:50:13.674358  11. 00000000fed10000-00000000fed17fff: RESERVED
 1819 15:50:13.678083  12. 00000000fed80000-00000000fed83fff: RESERVED
 1820 15:50:13.684608  13. 00000000fed90000-00000000fed91fff: RESERVED
 1821 15:50:13.688081  14. 00000000feda0000-00000000feda1fff: RESERVED
 1822 15:50:13.694245  15. 0000000100000000-000000045e7fffff: RAM
 1823 15:50:13.697369  Graphics framebuffer located at 0xc0000000
 1824 15:50:13.700717  Passing 5 GPIOs to payload:
 1825 15:50:13.704378              NAME |       PORT | POLARITY |     VALUE
 1826 15:50:13.710968     write protect |  undefined |     high |       low
 1827 15:50:13.714305               lid |  undefined |     high |      high
 1828 15:50:13.720756             power |  undefined |     high |       low
 1829 15:50:13.727380             oprom |  undefined |     high |       low
 1830 15:50:13.730484          EC in RW | 0x000000cb |     high |       low
 1831 15:50:13.733677  Board ID: 4
 1832 15:50:13.737377  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1833 15:50:13.740361  CBFS @ c08000 size 3f8000
 1834 15:50:13.747488  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1835 15:50:13.754677  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
 1836 15:50:13.755259  coreboot table: 1492 bytes.
 1837 15:50:13.757447  IMD ROOT    0. 99fff000 00001000
 1838 15:50:13.760678  IMD SMALL   1. 99ffe000 00001000
 1839 15:50:13.764426  FSP MEMORY  2. 99c4e000 003b0000
 1840 15:50:13.767446  CONSOLE     3. 99c2e000 00020000
 1841 15:50:13.770479  FMAP        4. 99c2d000 0000054e
 1842 15:50:13.774181  TIME STAMP  5. 99c2c000 00000910
 1843 15:50:13.777687  VBOOT WORK  6. 99c18000 00014000
 1844 15:50:13.780916  MRC DATA    7. 99c16000 00001958
 1845 15:50:13.784209  ROMSTG STCK 8. 99c15000 00001000
 1846 15:50:13.787001  AFTER CAR   9. 99c0b000 0000a000
 1847 15:50:13.790290  RAMSTAGE   10. 99baf000 0005c000
 1848 15:50:13.793891  REFCODE    11. 99b7a000 00035000
 1849 15:50:13.797160  SMM BACKUP 12. 99b6a000 00010000
 1850 15:50:13.800174  COREBOOT   13. 99b62000 00008000
 1851 15:50:13.804243  ACPI       14. 99b3e000 00024000
 1852 15:50:13.806716  ACPI GNVS  15. 99b3d000 00001000
 1853 15:50:13.810630  RAMOOPS    16. 99a3d000 00100000
 1854 15:50:13.813623  TPM2 TCGLOG17. 99a2d000 00010000
 1855 15:50:13.817146  SMBIOS     18. 99a2c000 00000800
 1856 15:50:13.820535  IMD small region:
 1857 15:50:13.823762    IMD ROOT    0. 99ffec00 00000400
 1858 15:50:13.827408    FSP RUNTIME 1. 99ffebe0 00000004
 1859 15:50:13.830261    EC HOSTEVENT 2. 99ffebc0 00000008
 1860 15:50:13.833423    POWER STATE 3. 99ffeb80 00000040
 1861 15:50:13.837044    ROMSTAGE    4. 99ffeb60 00000004
 1862 15:50:13.840108    MEM INFO    5. 99ffe9a0 000001b9
 1863 15:50:13.843469    VPD         6. 99ffe920 0000006c
 1864 15:50:13.847022  MTRR: Physical address space:
 1865 15:50:13.853619  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1866 15:50:13.860066  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1867 15:50:13.866932  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
 1868 15:50:13.873376  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
 1869 15:50:13.880162  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 1870 15:50:13.886621  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 1871 15:50:13.893612  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
 1872 15:50:13.896706  MTRR: Fixed MSR 0x250 0x0606060606060606
 1873 15:50:13.899976  MTRR: Fixed MSR 0x258 0x0606060606060606
 1874 15:50:13.902936  MTRR: Fixed MSR 0x259 0x0000000000000000
 1875 15:50:13.906927  MTRR: Fixed MSR 0x268 0x0606060606060606
 1876 15:50:13.912953  MTRR: Fixed MSR 0x269 0x0606060606060606
 1877 15:50:13.916043  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1878 15:50:13.919613  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1879 15:50:13.922923  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1880 15:50:13.929268  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1881 15:50:13.932824  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1882 15:50:13.935665  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1883 15:50:13.939202  call enable_fixed_mtrr()
 1884 15:50:13.942533  CPU physical address size: 39 bits
 1885 15:50:13.949558  MTRR: default type WB/UC MTRR counts: 6/8.
 1886 15:50:13.953143  MTRR: WB selected as default type.
 1887 15:50:13.959452  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
 1888 15:50:13.962702  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
 1889 15:50:13.969078  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1890 15:50:13.976096  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 1891 15:50:13.982492  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
 1892 15:50:13.989374  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
 1893 15:50:13.992538  MTRR: Fixed MSR 0x250 0x0606060606060606
 1894 15:50:13.998882  MTRR: Fixed MSR 0x258 0x0606060606060606
 1895 15:50:14.001860  MTRR: Fixed MSR 0x259 0x0000000000000000
 1896 15:50:14.005319  MTRR: Fixed MSR 0x268 0x0606060606060606
 1897 15:50:14.008575  MTRR: Fixed MSR 0x269 0x0606060606060606
 1898 15:50:14.015723  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1899 15:50:14.018629  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1900 15:50:14.022694  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1901 15:50:14.025719  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1902 15:50:14.031914  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1903 15:50:14.035012  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1904 15:50:14.035588  
 1905 15:50:14.036014  MTRR check
 1906 15:50:14.038268  Fixed MTRRs   : Enabled
 1907 15:50:14.041395  Variable MTRRs: Enabled
 1908 15:50:14.041875  
 1909 15:50:14.044858  call enable_fixed_mtrr()
 1910 15:50:14.048390  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
 1911 15:50:14.051913  CPU physical address size: 39 bits
 1912 15:50:14.058820  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1913 15:50:14.062107  MTRR: Fixed MSR 0x250 0x0606060606060606
 1914 15:50:14.065053  MTRR: Fixed MSR 0x250 0x0606060606060606
 1915 15:50:14.071786  MTRR: Fixed MSR 0x258 0x0606060606060606
 1916 15:50:14.075612  MTRR: Fixed MSR 0x259 0x0000000000000000
 1917 15:50:14.078265  MTRR: Fixed MSR 0x268 0x0606060606060606
 1918 15:50:14.081417  MTRR: Fixed MSR 0x269 0x0606060606060606
 1919 15:50:14.085025  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1920 15:50:14.092110  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1921 15:50:14.094935  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1922 15:50:14.098032  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1923 15:50:14.101604  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1924 15:50:14.107952  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1925 15:50:14.111334  MTRR: Fixed MSR 0x258 0x0606060606060606
 1926 15:50:14.114867  call enable_fixed_mtrr()
 1927 15:50:14.117967  MTRR: Fixed MSR 0x259 0x0000000000000000
 1928 15:50:14.121798  MTRR: Fixed MSR 0x268 0x0606060606060606
 1929 15:50:14.127879  MTRR: Fixed MSR 0x269 0x0606060606060606
 1930 15:50:14.130855  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1931 15:50:14.134216  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1932 15:50:14.137789  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1933 15:50:14.140875  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1934 15:50:14.147706  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1935 15:50:14.151217  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1936 15:50:14.154259  CPU physical address size: 39 bits
 1937 15:50:14.157547  call enable_fixed_mtrr()
 1938 15:50:14.160767  CBFS @ c08000 size 3f8000
 1939 15:50:14.167627  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1940 15:50:14.171557  MTRR: Fixed MSR 0x250 0x0606060606060606
 1941 15:50:14.174066  MTRR: Fixed MSR 0x258 0x0606060606060606
 1942 15:50:14.177413  MTRR: Fixed MSR 0x259 0x0000000000000000
 1943 15:50:14.181108  MTRR: Fixed MSR 0x268 0x0606060606060606
 1944 15:50:14.187379  MTRR: Fixed MSR 0x269 0x0606060606060606
 1945 15:50:14.190698  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1946 15:50:14.193739  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1947 15:50:14.197663  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1948 15:50:14.204128  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1949 15:50:14.207448  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1950 15:50:14.210467  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1951 15:50:14.214018  MTRR: Fixed MSR 0x250 0x0606060606060606
 1952 15:50:14.217059  call enable_fixed_mtrr()
 1953 15:50:14.220504  MTRR: Fixed MSR 0x258 0x0606060606060606
 1954 15:50:14.227575  MTRR: Fixed MSR 0x259 0x0000000000000000
 1955 15:50:14.230117  MTRR: Fixed MSR 0x268 0x0606060606060606
 1956 15:50:14.233455  MTRR: Fixed MSR 0x269 0x0606060606060606
 1957 15:50:14.236577  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1958 15:50:14.243603  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1959 15:50:14.246590  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1960 15:50:14.250192  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1961 15:50:14.253289  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1962 15:50:14.260194  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1963 15:50:14.263691  CPU physical address size: 39 bits
 1964 15:50:14.266859  call enable_fixed_mtrr()
 1965 15:50:14.270018  CPU physical address size: 39 bits
 1966 15:50:14.273241  MTRR: Fixed MSR 0x250 0x0606060606060606
 1967 15:50:14.276773  MTRR: Fixed MSR 0x250 0x0606060606060606
 1968 15:50:14.279946  MTRR: Fixed MSR 0x258 0x0606060606060606
 1969 15:50:14.286786  MTRR: Fixed MSR 0x259 0x0000000000000000
 1970 15:50:14.290055  MTRR: Fixed MSR 0x268 0x0606060606060606
 1971 15:50:14.293740  MTRR: Fixed MSR 0x269 0x0606060606060606
 1972 15:50:14.296586  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1973 15:50:14.303082  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1974 15:50:14.306497  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1975 15:50:14.309839  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1976 15:50:14.313220  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1977 15:50:14.316426  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1978 15:50:14.323427  MTRR: Fixed MSR 0x258 0x0606060606060606
 1979 15:50:14.326660  call enable_fixed_mtrr()
 1980 15:50:14.329420  MTRR: Fixed MSR 0x259 0x0000000000000000
 1981 15:50:14.333171  MTRR: Fixed MSR 0x268 0x0606060606060606
 1982 15:50:14.335946  MTRR: Fixed MSR 0x269 0x0606060606060606
 1983 15:50:14.342876  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1984 15:50:14.345845  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1985 15:50:14.349931  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1986 15:50:14.352515  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1987 15:50:14.355827  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1988 15:50:14.362559  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1989 15:50:14.365847  CPU physical address size: 39 bits
 1990 15:50:14.369155  call enable_fixed_mtrr()
 1991 15:50:14.372230  CBFS: Locating 'fallback/payload'
 1992 15:50:14.376173  CPU physical address size: 39 bits
 1993 15:50:14.378990  CPU physical address size: 39 bits
 1994 15:50:14.382340  CBFS: Found @ offset 1c96c0 size 3f798
 1995 15:50:14.385816  Checking segment from ROM address 0xffdd16f8
 1996 15:50:14.392281  Checking segment from ROM address 0xffdd1714
 1997 15:50:14.395638  Loading segment from ROM address 0xffdd16f8
 1998 15:50:14.399048    code (compression=0)
 1999 15:50:14.405695    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
 2000 15:50:14.415308  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
 2001 15:50:14.419541  it's not compressed!
 2002 15:50:14.510510  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
 2003 15:50:14.516690  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
 2004 15:50:14.519916  Loading segment from ROM address 0xffdd1714
 2005 15:50:14.523119    Entry Point 0x30000000
 2006 15:50:14.526429  Loaded segments
 2007 15:50:14.531661  Finalizing chipset.
 2008 15:50:14.534942  Finalizing SMM.
 2009 15:50:14.538689  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
 2010 15:50:14.541601  mp_park_aps done after 0 msecs.
 2011 15:50:14.548163  Jumping to boot code at 30000000(99b62000)
 2012 15:50:14.554956  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
 2013 15:50:14.555542  
 2014 15:50:14.558209  Starting depthcharge on Helios...
 2015 15:50:14.559371  end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
 2016 15:50:14.559970  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2017 15:50:14.560439  Setting prompt string to ['hatch:']
 2018 15:50:14.560886  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
 2019 15:50:14.568754  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2020 15:50:14.574914  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2021 15:50:14.581416  board_setup: Info: eMMC controller not present; skipping
 2022 15:50:14.585372  New NVMe Controller 0x30053ac0 @ 00:1d:00
 2023 15:50:14.591517  board_setup: Info: SDHCI controller not present; skipping
 2024 15:50:14.598150  vboot_create_vbsd: creating legacy VbSharedDataHeader structure
 2025 15:50:14.598739  Wipe memory regions:
 2026 15:50:14.601257  	[0x00000000001000, 0x000000000a0000)
 2027 15:50:14.604609  	[0x00000000100000, 0x00000030000000)
 2028 15:50:14.674445  	[0x00000030657430, 0x00000099a2c000)
 2029 15:50:14.814650  	[0x00000100000000, 0x0000045e800000)
 2030 15:50:16.197495  R8152: Initializing
 2031 15:50:16.200679  Version 9 (ocp_data = 6010)
 2032 15:50:16.205194  R8152: Done initializing
 2033 15:50:16.208132  Adding net device
 2034 15:50:16.704815  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
 2035 15:50:16.705434  
 2036 15:50:16.706251  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
 2038 15:50:16.807958  hatch: tftpboot 192.168.201.1 7300492/tftp-deploy-x9y3b607/kernel/bzImage 7300492/tftp-deploy-x9y3b607/kernel/cmdline 7300492/tftp-deploy-x9y3b607/ramdisk/ramdisk.cpio.gz
 2039 15:50:16.808748  Setting prompt string to 'Starting kernel'
 2040 15:50:16.809168  Setting prompt string to ['Starting kernel']
 2041 15:50:16.809554  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
 2042 15:50:16.809945  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:04:39)
 2043 15:50:16.813847  tftpboot 192.168.201.1 7300492/tftp-deploy-x9y3b607/kernel/bzImay-x9y3b607/kernel/cmdline 7300492/tftp-deploy-x9y3b607/ramdisk/ramdisk.cpio.gz
 2044 15:50:16.814031  Waiting for link
 2045 15:50:17.014682  done.
 2046 15:50:17.015257  MAC: f4:f5:e8:50:dc:f7
 2047 15:50:17.017962  Sending DHCP discover... done.
 2048 15:50:17.021355  Waiting for reply... done.
 2049 15:50:17.024419  Sending DHCP request... done.
 2050 15:50:17.028070  Waiting for reply... done.
 2051 15:50:17.031083  My ip is 192.168.201.20
 2052 15:50:17.034814  The DHCP server ip is 192.168.201.1
 2053 15:50:17.037907  TFTP server IP predefined by user: 192.168.201.1
 2054 15:50:17.044416  Bootfile predefined by user: 7300492/tftp-deploy-x9y3b607/kernel/bzImage
 2055 15:50:17.047721  Sending tftp read request... done.
 2056 15:50:17.055045  Waiting for the transfer... 
 2057 15:50:17.352514  00000000 ################################################################
 2058 15:50:17.644040  00080000 ################################################################
 2059 15:50:17.928079  00100000 ################################################################
 2060 15:50:18.225598  00180000 ################################################################
 2061 15:50:18.522773  00200000 ################################################################
 2062 15:50:18.817880  00280000 ################################################################
 2063 15:50:19.112828  00300000 ################################################################
 2064 15:50:19.409332  00380000 ################################################################
 2065 15:50:19.706226  00400000 ################################################################
 2066 15:50:20.003054  00480000 ################################################################
 2067 15:50:20.297969  00500000 ################################################################
 2068 15:50:20.593821  00580000 ################################################################
 2069 15:50:20.889200  00600000 ################################################################ done.
 2070 15:50:20.892042  The bootfile was 6815632 bytes long.
 2071 15:50:20.895412  Sending tftp read request... done.
 2072 15:50:20.898853  Waiting for the transfer... 
 2073 15:50:21.276939  00000000 ################################################################
 2074 15:50:21.646180  00080000 ################################################################
 2075 15:50:22.024385  00100000 ################################################################
 2076 15:50:22.399513  00180000 ################################################################
 2077 15:50:22.765909  00200000 ################################################################
 2078 15:50:23.132750  00280000 ################################################################
 2079 15:50:23.499596  00300000 ################################################################
 2080 15:50:23.873655  00380000 ################################################################
 2081 15:50:24.238712  00400000 ################################################################
 2082 15:50:24.628340  00480000 ################################################################
 2083 15:50:24.797242  00500000 ############################# done.
 2084 15:50:24.800605  Sending tftp read request... done.
 2085 15:50:24.804079  Waiting for the transfer... 
 2086 15:50:24.804563  00000000 # done.
 2087 15:50:24.814633  Command line loaded dynamically from TFTP file: 7300492/tftp-deploy-x9y3b607/kernel/cmdline
 2088 15:50:24.837555  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8  console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7300492/extract-nfsrootfs-wpn5qjys,tcp,hard ip=dhcp tftpserverip=192.168.201.1
 2089 15:50:24.843770  ec_init(0): CrosEC protocol v3 supported (256, 256)
 2090 15:50:24.847347  Shutting down all USB controllers.
 2091 15:50:24.850228  Removing current net device
 2092 15:50:24.854111  Finalizing coreboot
 2093 15:50:24.860326  Exiting depthcharge with code 4 at timestamp: 17655492
 2094 15:50:24.860888  
 2095 15:50:24.861269  Starting kernel ...
 2096 15:50:24.861620  
 2097 15:50:24.862139  
 2098 15:50:24.863093  end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
 2099 15:50:24.863831  start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
 2100 15:50:24.864385  Setting prompt string to ['Linux version [0-9]']
 2101 15:50:24.864807  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
 2102 15:50:24.865241  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:05:00)
 2104 15:54:55.864879  end: 2.2.5 auto-login-action (duration 00:04:31) [common]
 2106 15:54:55.866319  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
 2108 15:54:55.867267  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2111 15:54:55.868905  end: 2 depthcharge-action (duration 00:05:00) [common]
 2113 15:54:55.869284  Cleaning after the job
 2114 15:54:55.869365  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300492/tftp-deploy-x9y3b607/ramdisk
 2115 15:54:55.869814  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300492/tftp-deploy-x9y3b607/kernel
 2116 15:54:55.870308  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300492/tftp-deploy-x9y3b607/nfsrootfs
 2117 15:54:55.908588  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300492/tftp-deploy-x9y3b607/modules
 2118 15:54:55.908893  start: 4.1 power-off (timeout 00:00:30) [common]
 2119 15:54:55.909055  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2120 15:54:55.928271  >> Command sent successfully.

 2121 15:54:55.929618  Returned 0 in 0 seconds
 2122 15:54:56.030826  end: 4.1 power-off (duration 00:00:00) [common]
 2124 15:54:56.032462  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2125 15:54:56.033611  Listened to connection for namespace 'common' for up to 1s
 2126 15:54:56.305333  Listened to connection for namespace 'common' for up to 1s
 2127 15:54:56.307710  Listened to connection for namespace 'common' for up to 1s
 2128 15:54:56.311118  Listened to connection for namespace 'common' for up to 1s
 2129 15:54:56.314689  Listened to connection for namespace 'common' for up to 1s
 2130 15:54:56.317960  Listened to connection for namespace 'common' for up to 1s
 2131 15:54:56.321679  Listened to connection for namespace 'common' for up to 1s
 2132 15:54:56.324765  Listened to connection for namespace 'common' for up to 1s
 2133 15:54:56.328191  Listened to connection for namespace 'common' for up to 1s
 2134 15:54:56.331632  Listened to connection for namespace 'common' for up to 1s
 2135 15:54:56.335107  Listened to connection for namespace 'common' for up to 1s
 2136 15:54:56.340560  Listened to connection for namespace 'common' for up to 1s
 2137 15:54:56.344219  Listened to connection for namespace 'common' for up to 1s
 2138 15:54:57.036635  Finalising connection for namespace 'common'
 2139 15:54:57.037339  Disconnecting from shell: Finalise
 2140 15:54:57.037883  
 2141 15:54:57.139481  end: 4.2 read-feedback (duration 00:00:01) [common]
 2142 15:54:57.140161  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7300492
 2143 15:54:57.309646  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7300492
 2144 15:54:57.309842  JobError: Your job cannot terminate cleanly.